From 892daba4c616407f16506415d5a69549519ef11d Mon Sep 17 00:00:00 2001 From: Luis Farias Date: Wed, 22 Jun 2022 13:59:47 -0700 Subject: [PATCH] * INTC Contribution to the O-RAN F Release for O-DU Low Contribute FlexRAN 21.11 to the O-RAN OSC. Issue-Id: ODULOW-17 Change-Id: Idff20bf75a873f1836bb5c717aae09905dfb9c77 Signed-off-by: Luis Farias --- docs/Assumptions_Dependencies.rst | 8 +- docs/PTP-configuration_fh.rst | 57 +- docs/Sample-Application_fh.rst | 2 +- docs/Setup-Configuration_fh.rst | 137 +- ...d-ORAN-Fronthaul-Protocol-Implementation_fh.rst | 2111 +++++++++--------- docs/build_prerequisite.rst | 66 +- docs/conf.py | 1 + docs/ecpri_ddp_profile.rst | 24 +- docs/fapi_5g_tm_build.rst | 2 +- docs/fapi_5g_tm_rel-notes.rst | 8 + ...aul-Process.jpg => O-RAN-Fronthaul-Process.jpg} | Bin ...-Components.jpg => O-RAN-Packet-Components.jpg} | Bin ...h-PHY-and-Configuration-C3-for-Massive-MIMO.jpg | Bin 0 -> 216906 bytes ...O-RAN-Testing-with-PHY-and-Configuration-C3.jpg | Bin 0 -> 181414 bytes docs/images/Setup-for-O-RAN-Testing.jpg | Bin 0 -> 149089 bytes ...N-Testing-with-PHY-and-Configuration-C3-for.jpg | Bin 349572 -> 0 bytes ...-xRAN-Testing-with-PHY-and-Configuration-C3.jpg | Bin 289957 -> 0 bytes docs/images/Setup-for-xRAN-Testing.jpg | Bin 250348 -> 0 bytes docs/index.rst | 6 +- docs/release-notes-fh.rst | 8 + docs/release-notes.rst | 9 + docs/test_cases.rst | 4 +- docs/wls-lib-installation-guide.rst | 4 +- docs/wls-lib-release-notes.rst | 6 + docs/xRAN-Library-Design_fh.rst | 464 ++-- fapi_5g/bin/oran_5g_fapi.cfg | 13 +- fapi_5g/bin/oran_5g_fapi.sh | 9 +- fapi_5g/build/build.sh | 2 +- fapi_5g/build/makefile | 63 +- fapi_5g/include/fapi_interface.h | 17 +- fapi_5g/include/fapi_vendor_extension.h | 7 +- .../source/api/fapi2mac/nr5g_fapi_fapi2mac_api.c | 3 +- .../source/api/fapi2mac/nr5g_fapi_fapi2mac_api.h | 2 +- .../source/api/fapi2mac/nr5g_fapi_proc_error_ind.c | 4 +- .../source/api/fapi2mac/nr5g_fapi_proc_error_ind.h | 2 +- .../api/fapi2mac/p5/nr5g_fapi_fapi2mac_p5_proc.h | 9 +- .../api/fapi2mac/p5/nr5g_fapi_proc_config_resp.c | 3 +- .../p5/nr5g_fapi_proc_dl_iq_samples_resp.c | 6 +- .../fapi2mac/p5/nr5g_fapi_proc_fapi_msg_header.c | 3 +- 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fhi_lib/app/src/app_io_fh_xran.c | 1565 ++++++++++---- fhi_lib/app/src/app_io_fh_xran.h | 59 +- fhi_lib/app/src/app_profile_xran.c | 2 +- fhi_lib/app/src/app_ul_bbu_pool_tasks.c | 675 ++++++ fhi_lib/app/src/aux_cline.c | 743 +++++++ fhi_lib/app/src/aux_cline.h | 55 + fhi_lib/app/src/common.c | 13 +- fhi_lib/app/src/common.h | 16 +- fhi_lib/app/src/config.c | 165 +- fhi_lib/app/src/config.h | 27 +- fhi_lib/app/src/ebbu_pool_cfg.c | 274 +++ fhi_lib/app/src/ebbu_pool_cfg.h | 95 + fhi_lib/app/src/sample-app.c | 328 ++- fhi_lib/app/src/xran_mlog_task_id.h | 376 +++- .../cat_a/mu0_10mhz/12/bbu_pool_cfg_o_du.xml | 65 + .../cat_a/mu0_10mhz/12/bbu_pool_cfg_o_ru.xml | 65 + .../cat_a/mu0_10mhz/12/config_file_o_du.dat | 2 +- .../cat_a/mu0_10mhz/12/config_file_o_ru.dat | 2 +- .../app/usecase/cat_a/mu0_10mhz/12/usecase_du.cfg | 1 + .../usecase/cat_a/mu0_10mhz/bbu_pool_cfg_o_du.xml | 65 + .../usecase/cat_a/mu0_10mhz/bbu_pool_cfg_o_ru.xml | 65 + .../usecase/cat_a/mu0_10mhz/config_file_o_du.dat | 2 +- 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2 +- .../app/usecase/cat_a/mu0_20mhz/22/usecase_du.cfg | 1 + .../cat_a/mu0_20mhz/23/config_file_o_du.dat | 2 +- .../cat_a/mu0_20mhz/23/config_file_o_ru.dat | 2 +- .../app/usecase/cat_a/mu0_20mhz/23/usecase_du.cfg | 1 + .../usecase/cat_a/mu0_20mhz/bbu_pool_cfg_o_du.xml | 65 + .../usecase/cat_a/mu0_20mhz/bbu_pool_cfg_o_ru.xml | 65 + .../usecase/cat_a/mu0_20mhz/config_file_o_du.dat | 19 +- .../usecase/cat_a/mu0_20mhz/config_file_o_ru.dat | 18 +- fhi_lib/app/usecase/cat_a/mu0_20mhz/usecase_du.cfg | 1 + .../usecase/cat_a/mu0_5mhz/bbu_pool_cfg_o_du.xml | 65 + .../usecase/cat_a/mu0_5mhz/bbu_pool_cfg_o_ru.xml | 65 + .../usecase/cat_a/mu0_5mhz/config_file_o_du.dat | 2 +- .../usecase/cat_a/mu0_5mhz/config_file_o_ru.dat | 2 +- fhi_lib/app/usecase/cat_a/mu0_5mhz/usecase_du.cfg | 1 + .../cat_a/mu1_100mhz/101/config_file_o_du.dat | 2 +- .../cat_a/mu1_100mhz/101/config_file_o_ru.dat | 2 +- .../usecase/cat_a/mu1_100mhz/101/usecase_du.cfg | 1 + .../cat_a/mu1_100mhz/102/config_file_o_du.dat | 2 +- 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183 ++ .../cat_a/mu1_100mhz/404/config_file_o_ru_1.dat | 183 ++ .../cat_a/mu1_100mhz/404/config_file_o_ru_2.dat | 183 ++ .../cat_a/mu1_100mhz/404/config_file_o_ru_3.dat | 183 ++ .../usecase/cat_a/mu1_100mhz/404/usecase_du.cfg | 82 + .../usecase/cat_a/mu1_100mhz/404/usecase_ru.cfg | 83 + .../usecase/cat_a/mu1_100mhz/bbu_pool_cfg_o_du.xml | 65 + .../usecase/cat_a/mu1_100mhz/bbu_pool_cfg_o_ru.xml | 65 + .../usecase/cat_a/mu1_100mhz/config_file_o_du.dat | 6 +- .../usecase/cat_a/mu1_100mhz/config_file_o_ru.dat | 7 +- .../app/usecase/cat_a/mu1_100mhz/usecase_du.cfg | 1 + .../cat_a/mu3_100mhz/1/config_file_o_du.dat | 2 +- .../cat_a/mu3_100mhz/1/config_file_o_ru.dat | 2 +- .../cat_a/mu3_100mhz/101/config_file_o_du.dat | 2 +- .../cat_a/mu3_100mhz/101/config_file_o_ru.dat | 2 +- .../cat_a/mu3_100mhz/2/config_file_o_du.dat | 2 +- .../cat_a/mu3_100mhz/2/config_file_o_ru.dat | 2 +- .../cat_a/mu3_100mhz/201/mu3_config_file_o_ru.dat | 194 -- .../cat_a/mu3_100mhz/3/config_file_o_du.dat | 2 +- .../cat_a/mu3_100mhz/3/config_file_o_ru.dat | 2 +- .../cat_a/mu3_100mhz/4/config_file_o_du.dat | 2 +- .../cat_a/mu3_100mhz/4/config_file_o_ru.dat | 2 +- .../cat_a/mu3_100mhz/5/config_file_o_du.dat | 2 +- .../cat_a/mu3_100mhz/5/config_file_o_ru.dat | 2 +- .../cat_a/mu3_100mhz/6/config_file_o_du.dat | 2 +- .../cat_a/mu3_100mhz/6/config_file_o_ru.dat | 2 +- .../cat_a/mu3_100mhz/7/config_file_o_du.dat | 2 +- .../cat_a/mu3_100mhz/7/config_file_o_ru.dat | 2 +- .../app/usecase/cat_a/mu3_100mhz/7/usecase_du.cfg | 1 + .../cat_a/mu3_100mhz/8/config_file_o_du.dat | 170 -- .../cat_a/mu3_100mhz/8/config_file_o_ru.dat | 184 -- .../cat_a/mu3_100mhz/9/config_file_o_du.dat | 170 -- .../cat_a/mu3_100mhz/9/config_file_o_ru.dat | 191 -- .../usecase/cat_a/mu3_100mhz/bbu_pool_cfg_o_du.xml | 65 + .../usecase/cat_a/mu3_100mhz/bbu_pool_cfg_o_ru.xml | 65 + .../usecase/cat_a/mu3_100mhz/config_file_o_du.dat | 2 +- .../usecase/cat_a/mu3_100mhz/config_file_o_ru.dat | 2 +- .../app/usecase/cat_a/mu3_100mhz/usecase_du.cfg | 1 + .../cat_b/mu1_100mhz/1/config_file_o_du.dat | 13 +- .../cat_b/mu1_100mhz/1/config_file_o_ru.dat | 12 +- .../app/usecase/cat_b/mu1_100mhz/1/usecase_du.cfg | 2 +- .../cat_b/mu1_100mhz/101/config_file_o_du.dat | 13 +- .../cat_b/mu1_100mhz/101/config_file_o_ru.dat | 12 +- .../usecase/cat_b/mu1_100mhz/101/usecase_du.cfg | 1 + .../cat_b/mu1_100mhz/102/config_file_o_du.dat | 12 +- .../cat_b/mu1_100mhz/102/config_file_o_ru.dat | 12 +- .../usecase/cat_b/mu1_100mhz/102/usecase_du.cfg | 2 +- .../cat_b/mu1_100mhz/103/config_file_o_du.dat | 12 +- .../cat_b/mu1_100mhz/103/config_file_o_ru.dat | 12 +- .../usecase/cat_b/mu1_100mhz/103/usecase_du.cfg | 2 +- .../cat_b/mu1_100mhz/104/config_file_o_du.dat | 11 +- .../cat_b/mu1_100mhz/104/config_file_o_ru.dat | 12 +- .../usecase/cat_b/mu1_100mhz/104/usecase_du.cfg | 2 +- .../cat_b/mu1_100mhz/105/config_file_o_du.dat | 11 +- .../cat_b/mu1_100mhz/105/config_file_o_ru.dat | 12 +- .../usecase/cat_b/mu1_100mhz/105/usecase_du.cfg | 2 +- .../cat_b/mu1_100mhz/106/config_file_o_du.dat | 12 +- .../cat_b/mu1_100mhz/106/config_file_o_ru.dat | 12 +- .../usecase/cat_b/mu1_100mhz/106/usecase_du.cfg | 2 +- .../cat_b/mu1_100mhz/107/config_file_o_du.dat | 12 +- .../cat_b/mu1_100mhz/107/config_file_o_ru.dat | 12 +- .../usecase/cat_b/mu1_100mhz/107/usecase_du.cfg | 2 +- .../cat_b/mu1_100mhz/108/config_file_o_du.dat | 13 +- .../cat_b/mu1_100mhz/108/config_file_o_ru.dat | 12 +- .../usecase/cat_b/mu1_100mhz/108/usecase_du.cfg | 2 +- .../cat_b/mu1_100mhz/109/config_file_o_du.dat | 12 +- .../cat_b/mu1_100mhz/109/config_file_o_ru.dat | 12 +- .../usecase/cat_b/mu1_100mhz/109/usecase_du.cfg | 2 +- .../cat_b/mu1_100mhz/111/config_file_o_du.dat | 203 -- .../cat_b/mu1_100mhz/111/config_file_o_ru.dat | 229 -- .../cat_b/mu1_100mhz/112/config_file_o_du.dat | 204 -- .../cat_b/mu1_100mhz/112/config_file_o_ru.dat | 225 -- .../cat_b/mu1_100mhz/113/config_file_o_du.dat | 207 -- .../cat_b/mu1_100mhz/113/config_file_o_ru.dat | 228 -- .../usecase/cat_b/mu1_100mhz/113/usecase_du.cfg | 68 - .../cat_b/mu1_100mhz/114/config_file_o_du.dat | 228 -- .../cat_b/mu1_100mhz/114/config_file_o_ru.dat | 262 --- .../usecase/cat_b/mu1_100mhz/114/usecase_du.cfg | 68 - .../cat_b/mu1_100mhz/115/config_file_o_du.dat | 231 -- .../cat_b/mu1_100mhz/115/config_file_o_ru.dat | 261 --- .../usecase/cat_b/mu1_100mhz/115/usecase_du.cfg | 68 - .../cat_b/mu1_100mhz/116/config_file_o_du.dat | 236 -- .../usecase/cat_b/mu1_100mhz/116/usecase_du.cfg | 68 - .../cat_b/mu1_100mhz/117/config_file_o_du.dat | 219 -- .../cat_b/mu1_100mhz/117/config_file_o_ru.dat | 261 --- .../usecase/cat_b/mu1_100mhz/117/usecase_du.cfg | 68 - .../cat_b/mu1_100mhz/118/config_file_o_du.dat | 217 -- .../cat_b/mu1_100mhz/118/config_file_o_ru.dat | 261 --- .../usecase/cat_b/mu1_100mhz/118/usecase_du.cfg | 68 - .../cat_b/mu1_100mhz/119/config_file_o_du.dat | 222 -- .../cat_b/mu1_100mhz/119/config_file_o_ru.dat | 262 --- .../usecase/cat_b/mu1_100mhz/119/usecase_du.cfg | 68 - .../cat_b/mu1_100mhz/142/bbu_pool_cfg_o_du.xml | 65 + .../cat_b/mu1_100mhz/142/bbu_pool_cfg_o_du_icx.xml | 65 + .../cat_b/mu1_100mhz/142/bbu_pool_cfg_o_ru.xml | 65 + .../cat_b/mu1_100mhz/142/config_file_o_du.dat | 237 +++ .../cat_b/mu1_100mhz/142/config_file_o_ru.dat | 287 +++ .../usecase/cat_b/mu1_100mhz/142/usecase_du.cfg | 63 + .../mu1_100mhz/{501 => 142}/usecase_du_icx.cfg | 9 +- .../usecase/cat_b/mu1_100mhz/142/usecase_ru.cfg | 61 + .../cat_b/mu1_100mhz/142/usecase_ru_icx.cfg | 59 + .../cat_b/mu1_100mhz/1421/bbu_pool_cfg_o_du.xml | 65 + .../mu1_100mhz/1421/bbu_pool_cfg_o_du_icx.xml | 65 + .../cat_b/mu1_100mhz/1421/bbu_pool_cfg_o_ru.xml | 65 + .../cat_b/mu1_100mhz/1421/peak_o_du_tst376.dat | 237 +++ .../mu1_100mhz/{3321 => 1421}/peak_o_ru_tst376.dat | 135 +- .../usecase/cat_b/mu1_100mhz/1421/usecase_du.cfg | 65 + .../cat_b/mu1_100mhz/1421/usecase_du_icx.cfg | 60 + .../usecase_ru_csx.cfg => 1421/usecase_ru.cfg} | 16 +- .../cat_b/mu1_100mhz/1421/usecase_ru_icx.cfg | 58 + .../cat_b/mu1_100mhz/184/bbu_pool_cfg_o_du.xml | 65 + .../cat_b/mu1_100mhz/184/bbu_pool_cfg_o_du_icx.xml | 65 + .../cat_b/mu1_100mhz/184/bbu_pool_cfg_o_ru.xml | 65 + .../cat_b/mu1_100mhz/{3331 => 184}/peak_o_du.dat | 102 +- .../app/usecase/cat_b/mu1_100mhz/184/peak_o_ru.dat | 303 +++ .../usecase/cat_b/mu1_100mhz/184/usecase_du.cfg | 63 + .../cat_b/mu1_100mhz/184/usecase_du_icx.cfg | 60 + .../usecase/cat_b/mu1_100mhz/184/usecase_ru.cfg | 61 + .../{801/usecase_ru.cfg => 184/usecase_ru_icx.cfg} | 12 +- .../cat_b/mu1_100mhz/1841/bbu_pool_cfg_o_du.xml | 65 + .../cat_b/mu1_100mhz/1841/bbu_pool_cfg_o_ru.xml | 65 + .../mu1_100mhz/{3321 => 1841}/peak_o_du_tst376.dat | 71 +- .../peak_o_ru.dat => 1841/peak_o_ru_tst376.dat} | 122 +- .../usecase_du_csx.cfg => 1841/usecase_du.cfg} | 10 +- .../mu1_100mhz/{504 => 1841}/usecase_du_icx.cfg | 9 +- .../usecase_ru_csx.cfg => 1841/usecase_ru.cfg} | 16 +- .../usecase_ru.cfg => 1841/usecase_ru_icx.cfg} | 11 +- .../cat_b/mu1_100mhz/2/bbu_pool_cfg_o_du.xml | 65 + .../cat_b/mu1_100mhz/2/bbu_pool_cfg_o_ru.xml | 65 + .../cat_b/mu1_100mhz/2/config_file_o_du.dat | 45 +- .../cat_b/mu1_100mhz/2/config_file_o_ru.dat | 54 +- .../app/usecase/cat_b/mu1_100mhz/2/usecase_du.cfg | 2 +- .../cat_b/mu1_100mhz/201/config_file_o_du.dat | 12 +- .../cat_b/mu1_100mhz/201/config_file_o_ru.dat | 12 +- .../usecase/cat_b/mu1_100mhz/201/usecase_du.cfg | 1 + .../cat_b/mu1_100mhz/202/bbu_pool_cfg_o_du.xml | 65 + .../cat_b/mu1_100mhz/202/bbu_pool_cfg_o_ru.xml | 65 + .../cat_b/mu1_100mhz/202/config_file_o_du.dat | 12 +- .../cat_b/mu1_100mhz/202/config_file_o_ru.dat | 12 +- .../usecase/cat_b/mu1_100mhz/202/usecase_du.cfg | 2 +- .../cat_b/mu1_100mhz/203/config_file_o_du.dat | 12 +- .../cat_b/mu1_100mhz/203/config_file_o_ru.dat | 12 +- .../usecase/cat_b/mu1_100mhz/203/usecase_du.cfg | 2 +- .../cat_b/mu1_100mhz/204/config_file_o_du.dat | 12 +- .../cat_b/mu1_100mhz/204/config_file_o_ru.dat | 12 +- .../usecase/cat_b/mu1_100mhz/204/usecase_du.cfg | 2 +- .../cat_b/mu1_100mhz/205/config_file_o_du.dat | 12 +- .../cat_b/mu1_100mhz/205/config_file_o_ru.dat | 12 +- .../usecase/cat_b/mu1_100mhz/205/usecase_du.cfg | 2 +- .../usecase/cat_b/mu1_100mhz/205/usecase_ru.cfg | 68 - .../cat_b/mu1_100mhz/206/config_file_o_du.dat | 12 +- .../cat_b/mu1_100mhz/206/config_file_o_ru.dat | 12 +- .../usecase/cat_b/mu1_100mhz/206/usecase_du.cfg | 2 +- .../cat_b/mu1_100mhz/211/config_file_o_du.dat | 12 +- .../cat_b/mu1_100mhz/211/config_file_o_ru.dat | 12 +- .../usecase/cat_b/mu1_100mhz/211/usecase_du.cfg | 2 +- .../cat_b/mu1_100mhz/212/bbu_pool_cfg_o_du.xml | 65 + .../cat_b/mu1_100mhz/212/bbu_pool_cfg_o_ru.xml | 65 + .../cat_b/mu1_100mhz/212/config_file_o_du.dat | 53 +- .../cat_b/mu1_100mhz/212/config_file_o_ru.dat | 44 +- .../usecase/cat_b/mu1_100mhz/212/usecase_du.cfg | 32 +- .../usecase/cat_b/mu1_100mhz/212/usecase_ru.cfg | 21 +- .../cat_b/mu1_100mhz/213/config_file_o_du.dat | 12 +- .../cat_b/mu1_100mhz/213/config_file_o_ru.dat | 12 +- .../usecase/cat_b/mu1_100mhz/213/usecase_du.cfg | 2 +- .../cat_b/mu1_100mhz/214/config_file_o_du.dat | 12 +- .../cat_b/mu1_100mhz/214/config_file_o_ru.dat | 12 +- .../usecase/cat_b/mu1_100mhz/214/usecase_du.cfg | 2 +- .../cat_b/mu1_100mhz/215/config_file_o_du.dat | 12 +- .../cat_b/mu1_100mhz/215/config_file_o_ru.dat | 12 +- .../usecase/cat_b/mu1_100mhz/215/usecase_du.cfg | 2 +- .../cat_b/mu1_100mhz/216/config_file_o_du.dat | 12 +- .../cat_b/mu1_100mhz/216/config_file_o_ru.dat | 12 +- .../usecase/cat_b/mu1_100mhz/216/usecase_du.cfg | 2 + .../cat_b/mu1_100mhz/221/config_file_o_du.dat | 212 -- .../cat_b/mu1_100mhz/221/config_file_o_ru.dat | 229 -- .../usecase/cat_b/mu1_100mhz/221/usecase_du.cfg | 68 - .../usecase/cat_b/mu1_100mhz/221/usecase_ru.cfg | 68 - .../cat_b/mu1_100mhz/222/config_file_o_du.dat | 237 --- .../cat_b/mu1_100mhz/222/config_file_o_ru.dat | 265 --- .../usecase/cat_b/mu1_100mhz/222/usecase_du.cfg | 68 - .../usecase/cat_b/mu1_100mhz/222/usecase_ru.cfg | 68 - .../cat_b/mu1_100mhz/223/config_file_o_du.dat | 226 -- .../cat_b/mu1_100mhz/223/config_file_o_ru.dat | 260 --- .../usecase/cat_b/mu1_100mhz/223/usecase_du.cfg | 68 - .../usecase/cat_b/mu1_100mhz/223/usecase_ru.cfg | 68 - .../cat_b/mu1_100mhz/224/config_file_o_du.dat | 226 -- .../cat_b/mu1_100mhz/224/config_file_o_ru.dat | 260 --- .../usecase/cat_b/mu1_100mhz/224/usecase_du.cfg | 68 - .../usecase/cat_b/mu1_100mhz/224/usecase_ru.cfg | 68 - .../cat_b/mu1_100mhz/225/config_file_o_du.dat | 228 -- .../cat_b/mu1_100mhz/225/config_file_o_ru.dat | 262 --- .../usecase/cat_b/mu1_100mhz/225/usecase_du.cfg | 68 - .../usecase/cat_b/mu1_100mhz/225/usecase_ru.cfg | 68 - .../cat_b/mu1_100mhz/226/config_file_o_du.dat | 232 -- .../cat_b/mu1_100mhz/226/config_file_o_ru.dat | 264 --- .../usecase/cat_b/mu1_100mhz/226/usecase_du.cfg | 68 - .../usecase/cat_b/mu1_100mhz/226/usecase_ru.cfg | 68 - .../cat_b/mu1_100mhz/231/config_file_o_du.dat | 212 -- .../cat_b/mu1_100mhz/231/config_file_o_ru.dat | 229 -- .../usecase/cat_b/mu1_100mhz/231/usecase_du.cfg | 68 - .../usecase/cat_b/mu1_100mhz/231/usecase_ru.cfg | 68 - .../cat_b/mu1_100mhz/232/config_file_o_du.dat | 237 --- .../cat_b/mu1_100mhz/232/config_file_o_ru.dat | 265 --- .../usecase/cat_b/mu1_100mhz/232/usecase_du.cfg | 68 - .../usecase/cat_b/mu1_100mhz/232/usecase_ru.cfg | 68 - .../cat_b/mu1_100mhz/233/config_file_o_du.dat | 226 -- .../cat_b/mu1_100mhz/233/config_file_o_ru.dat | 260 --- .../usecase/cat_b/mu1_100mhz/233/usecase_du.cfg | 68 - .../usecase/cat_b/mu1_100mhz/233/usecase_ru.cfg | 68 - .../cat_b/mu1_100mhz/234/config_file_o_du.dat | 226 -- .../cat_b/mu1_100mhz/234/config_file_o_ru.dat | 260 --- .../usecase/cat_b/mu1_100mhz/234/usecase_du.cfg | 68 - .../usecase/cat_b/mu1_100mhz/234/usecase_ru.cfg | 68 - .../cat_b/mu1_100mhz/235/config_file_o_du.dat | 228 -- .../cat_b/mu1_100mhz/235/config_file_o_ru.dat | 262 --- .../usecase/cat_b/mu1_100mhz/235/usecase_du.cfg | 68 - .../usecase/cat_b/mu1_100mhz/235/usecase_ru.cfg | 68 - .../cat_b/mu1_100mhz/236/config_file_o_du.dat | 232 -- .../cat_b/mu1_100mhz/236/config_file_o_ru.dat | 264 --- .../usecase/cat_b/mu1_100mhz/236/usecase_du.cfg | 68 - .../usecase/cat_b/mu1_100mhz/236/usecase_ru.cfg | 68 - .../cat_b/mu1_100mhz/242/peak_o_du_tst376.dat | 237 +++ .../cat_b/mu1_100mhz/242/peak_o_ru_tst376.dat | 287 +++ .../usecase_du_csx.cfg => 242/usecase_du.cfg} | 12 +- .../cat_b/mu1_100mhz/242/usecase_du_icx.cfg | 61 + .../usecase_ru_csx.cfg => 242/usecase_ru.cfg} | 17 +- .../cat_b/mu1_100mhz/242/usecase_ru_icx.cfg | 59 + .../cat_b/mu1_100mhz/2422/bbu_pool_cfg_o_du.xml | 65 + .../mu1_100mhz/2422/bbu_pool_cfg_o_du_icx.xml | 65 + .../cat_b/mu1_100mhz/2422/bbu_pool_cfg_o_ru.xml | 65 + .../cat_b/mu1_100mhz/2422/peak_o_du_tst376.dat | 237 +++ .../mu1_100mhz/{3331 => 2422}/peak_o_ru_tst376.dat | 137 +- .../usecase_du_csx.cfg => 2422/usecase_du.cfg} | 12 +- .../cat_b/mu1_100mhz/2422/usecase_du_icx.cfg | 62 + .../usecase/cat_b/mu1_100mhz/2422/usecase_ru.cfg | 62 + .../cat_b/mu1_100mhz/2422/usecase_ru_icx.cfg | 59 + .../peak_o_du_tst376.dat => 284/peak_o_du.dat} | 103 +- .../app/usecase/cat_b/mu1_100mhz/284/peak_o_ru.dat | 303 +++ .../cat_b/mu1_100mhz/{803 => 284}/usecase_du.cfg | 18 +- .../cat_b/mu1_100mhz/284/usecase_du_icx.cfg | 60 + .../cat_b/mu1_100mhz/{803 => 284}/usecase_ru.cfg | 14 +- .../cat_b/mu1_100mhz/284/usecase_ru_icx.cfg | 59 + .../cat_b/mu1_100mhz/2842/bbu_pool_cfg_o_du.xml | 65 + .../cat_b/mu1_100mhz/2842/bbu_pool_cfg_o_ru.xml | 65 + .../peak_o_du.dat => 2842/peak_o_du_tst376.dat} | 70 +- .../peak_o_ru.dat => 2842/peak_o_ru_tst376.dat} | 124 +- .../usecase/cat_b/mu1_100mhz/2842/usecase_du.cfg | 62 + .../cat_b/mu1_100mhz/2842/usecase_du_icx.cfg | 60 + .../cat_b/mu1_100mhz/{804 => 2842}/usecase_ru.cfg | 14 +- .../cat_b/mu1_100mhz/2842/usecase_ru_icx.cfg | 59 + .../cat_b/mu1_100mhz/3/config_file_o_du.dat | 230 -- .../cat_b/mu1_100mhz/3/config_file_o_ru.dat | 237 --- .../app/usecase/cat_b/mu1_100mhz/3/usecase_du.cfg | 68 - .../app/usecase/cat_b/mu1_100mhz/3/usecase_ru.cfg | 68 - .../cat_b/mu1_100mhz/301/bbu_pool_cfg_o_du.xml | 65 + .../cat_b/mu1_100mhz/301/bbu_pool_cfg_o_du_icx.xml | 65 + .../cat_b/mu1_100mhz/301/config_file_o_du.dat | 11 +- .../cat_b/mu1_100mhz/301/config_file_o_ru.dat | 11 +- .../usecase/cat_b/mu1_100mhz/301/usecase_du.cfg | 2 + .../usecase/cat_b/mu1_100mhz/301/usecase_ru.cfg | 1 + .../cat_b/mu1_100mhz/302/bbu_pool_cfg_o_du.xml | 65 + .../cat_b/mu1_100mhz/302/bbu_pool_cfg_o_du_icx.xml | 65 + .../cat_b/mu1_100mhz/302/bbu_pool_cfg_o_ru.xml | 65 + .../cat_b/mu1_100mhz/302/config_file_o_du.dat | 11 +- .../cat_b/mu1_100mhz/302/config_file_o_ru.dat | 11 +- .../usecase/cat_b/mu1_100mhz/302/usecase_du.cfg | 3 +- .../cat_b/mu1_100mhz/302/usecase_du_icx.cfg | 54 - .../usecase/cat_b/mu1_100mhz/302/usecase_ru.cfg | 2 +- .../cat_b/mu1_100mhz/303/bbu_pool_cfg_o_du.xml | 65 + .../cat_b/mu1_100mhz/303/bbu_pool_cfg_o_du_icx.xml | 65 + .../cat_b/mu1_100mhz/303/bbu_pool_cfg_o_ru.xml | 65 + .../cat_b/mu1_100mhz/303/config_file_o_du.dat | 11 +- .../cat_b/mu1_100mhz/303/config_file_o_ru.dat | 11 +- .../usecase/cat_b/mu1_100mhz/303/usecase_du.cfg | 2 + .../cat_b/mu1_100mhz/303/usecase_du_icx.cfg | 55 - .../cat_b/mu1_100mhz/304/bbu_pool_cfg_o_du.xml | 65 + .../cat_b/mu1_100mhz/304/bbu_pool_cfg_o_du_icx.xml | 65 + .../cat_b/mu1_100mhz/304/bbu_pool_cfg_o_ru.xml | 65 + .../cat_b/mu1_100mhz/304/config_file_o_du.dat | 11 +- .../cat_b/mu1_100mhz/304/config_file_o_ru.dat | 11 +- .../usecase/cat_b/mu1_100mhz/304/usecase_du.cfg | 1 + .../cat_b/mu1_100mhz/304/usecase_du_icx.cfg | 55 - .../cat_b/mu1_100mhz/305/bbu_pool_cfg_o_du.xml | 65 + .../cat_b/mu1_100mhz/305/bbu_pool_cfg_o_du_icx.xml | 65 + .../cat_b/mu1_100mhz/305/bbu_pool_cfg_o_ru.xml | 65 + .../cat_b/mu1_100mhz/305/config_file_o_du.dat | 12 +- .../cat_b/mu1_100mhz/305/config_file_o_ru.dat | 11 +- .../usecase/cat_b/mu1_100mhz/305/usecase_du.cfg | 1 + .../cat_b/mu1_100mhz/306/bbu_pool_cfg_o_du.xml | 65 + .../cat_b/mu1_100mhz/306/bbu_pool_cfg_o_du_icx.xml | 65 + .../cat_b/mu1_100mhz/306/bbu_pool_cfg_o_ru.xml | 65 + .../cat_b/mu1_100mhz/306/config_file_o_du.dat | 11 +- .../cat_b/mu1_100mhz/306/config_file_o_ru.dat | 11 +- .../usecase/cat_b/mu1_100mhz/306/usecase_du.cfg | 1 + .../cat_b/mu1_100mhz/306/usecase_du_icx.cfg | 55 - .../cat_b/mu1_100mhz/311/bbu_pool_cfg_o_du.xml | 65 + .../cat_b/mu1_100mhz/311/bbu_pool_cfg_o_du_icx.xml | 65 + .../cat_b/mu1_100mhz/311/bbu_pool_cfg_o_ru.xml | 65 + .../cat_b/mu1_100mhz/311/config_file_o_du.dat | 11 +- .../cat_b/mu1_100mhz/311/config_file_o_ru.dat | 11 +- .../usecase/cat_b/mu1_100mhz/311/usecase_du.cfg | 2 + .../cat_b/mu1_100mhz/312/bbu_pool_cfg_o_du.xml | 65 + .../cat_b/mu1_100mhz/312/bbu_pool_cfg_o_du_icx.xml | 65 + .../cat_b/mu1_100mhz/312/bbu_pool_cfg_o_ru.xml | 65 + .../cat_b/mu1_100mhz/312/config_file_o_du.dat | 11 +- .../cat_b/mu1_100mhz/312/config_file_o_ru.dat | 11 +- .../usecase/cat_b/mu1_100mhz/312/usecase_du.cfg | 1 + .../cat_b/mu1_100mhz/312/usecase_du_icx.cfg | 55 - .../cat_b/mu1_100mhz/313/bbu_pool_cfg_o_du.xml | 65 + .../cat_b/mu1_100mhz/313/bbu_pool_cfg_o_du_icx.xml | 65 + .../cat_b/mu1_100mhz/313/bbu_pool_cfg_o_ru.xml | 65 + .../cat_b/mu1_100mhz/313/config_file_o_du.dat | 11 +- .../cat_b/mu1_100mhz/313/config_file_o_ru.dat | 11 +- .../usecase/cat_b/mu1_100mhz/313/usecase_du.cfg | 1 + .../cat_b/mu1_100mhz/313/usecase_du_icx.cfg | 55 - .../cat_b/mu1_100mhz/314/bbu_pool_cfg_o_du.xml | 65 + .../cat_b/mu1_100mhz/314/bbu_pool_cfg_o_du_icx.xml | 65 + .../cat_b/mu1_100mhz/314/bbu_pool_cfg_o_ru.xml | 65 + .../cat_b/mu1_100mhz/314/config_file_o_du.dat | 12 +- .../cat_b/mu1_100mhz/314/config_file_o_ru.dat | 12 +- .../usecase/cat_b/mu1_100mhz/314/usecase_du.cfg | 1 + .../cat_b/mu1_100mhz/314/usecase_du_icx.cfg | 55 - .../cat_b/mu1_100mhz/315/bbu_pool_cfg_o_du.xml | 65 + .../cat_b/mu1_100mhz/315/bbu_pool_cfg_o_du_icx.xml | 65 + .../cat_b/mu1_100mhz/315/bbu_pool_cfg_o_ru.xml | 65 + .../cat_b/mu1_100mhz/315/config_file_o_du.dat | 12 +- .../cat_b/mu1_100mhz/315/config_file_o_ru.dat | 11 +- .../usecase/cat_b/mu1_100mhz/315/usecase_du.cfg | 1 + .../cat_b/mu1_100mhz/315/usecase_du_icx.cfg | 55 - .../cat_b/mu1_100mhz/316/bbu_pool_cfg_o_du.xml | 65 + .../cat_b/mu1_100mhz/316/bbu_pool_cfg_o_du_icx.xml | 65 + .../cat_b/mu1_100mhz/316/bbu_pool_cfg_o_ru.xml | 65 + .../cat_b/mu1_100mhz/316/config_file_o_du.dat | 11 +- .../cat_b/mu1_100mhz/316/config_file_o_ru.dat | 11 +- .../usecase/cat_b/mu1_100mhz/316/usecase_du.cfg | 1 + .../cat_b/mu1_100mhz/316/usecase_du_icx.cfg | 55 - .../cat_b/mu1_100mhz/321/bbu_pool_cfg_o_du_icx.xml | 65 + .../cat_b/mu1_100mhz/321/bbu_pool_cfg_o_ru.xml | 65 + .../mu1_100mhz/{601 => 321}/config_file_o_du.dat | 43 +- .../mu1_100mhz/{601 => 321}/config_file_o_ru.dat | 44 +- .../cat_b/mu1_100mhz/{611 => 321}/usecase_du.cfg | 5 +- .../cat_b/mu1_100mhz/321/usecase_du_icx.cfg | 63 + .../cat_b/mu1_100mhz/{605 => 321}/usecase_ru.cfg | 3 +- .../cat_b/mu1_100mhz/322/bbu_pool_cfg_o_du_icx.xml | 65 + .../cat_b/mu1_100mhz/322/bbu_pool_cfg_o_ru.xml | 65 + .../mu1_100mhz/{602 => 322}/config_file_o_du.dat | 27 +- .../mu1_100mhz/{411 => 322}/config_file_o_ru.dat | 75 +- .../cat_b/mu1_100mhz/{602 => 322}/usecase_du.cfg | 0 .../mu1_100mhz/{301 => 322}/usecase_du_icx.cfg | 10 +- .../cat_b/mu1_100mhz/{602 => 322}/usecase_ru.cfg | 0 .../cat_b/mu1_100mhz/323/bbu_pool_cfg_o_du_icx.xml | 65 + .../cat_b/mu1_100mhz/323/bbu_pool_cfg_o_ru.xml | 65 + .../mu1_100mhz/{603 => 323}/config_file_o_du.dat | 29 +- .../mu1_100mhz/{615 => 323}/config_file_o_ru.dat | 36 +- .../cat_b/mu1_100mhz/{603 => 323}/usecase_du.cfg | 0 .../mu1_100mhz/{305 => 323}/usecase_du_icx.cfg | 6 +- .../cat_b/mu1_100mhz/{601 => 323}/usecase_ru.cfg | 0 .../cat_b/mu1_100mhz/324/bbu_pool_cfg_o_du_icx.xml | 65 + .../cat_b/mu1_100mhz/324/bbu_pool_cfg_o_ru.xml | 65 + .../mu1_100mhz/{604 => 324}/config_file_o_du.dat | 30 +- .../mu1_100mhz/{116 => 324}/config_file_o_ru.dat | 63 +- .../cat_b/mu1_100mhz/{601 => 324}/usecase_du.cfg | 4 +- .../mu1_100mhz/{311 => 324}/usecase_du_icx.cfg | 9 +- .../cat_b/mu1_100mhz/{603 => 324}/usecase_ru.cfg | 0 .../cat_b/mu1_100mhz/325/bbu_pool_cfg_o_du_icx.xml | 65 + .../cat_b/mu1_100mhz/325/bbu_pool_cfg_o_ru.xml | 65 + .../mu1_100mhz/{605 => 325}/config_file_o_du.dat | 31 +- .../mu1_100mhz/{605 => 325}/config_file_o_ru.dat | 29 +- .../cat_b/mu1_100mhz/{605 => 325}/usecase_du.cfg | 1 + .../mu1_100mhz/{502 => 325}/usecase_du_icx.cfg | 9 +- .../cat_b/mu1_100mhz/{604 => 325}/usecase_ru.cfg | 0 .../app/usecase/cat_b/mu1_100mhz/3301/avg_o_du.dat | 4 +- .../cat_b/mu1_100mhz/3301/avg_o_du_tst377.dat | 12 +- .../app/usecase/cat_b/mu1_100mhz/3301/avg_o_ru.dat | 4 +- .../cat_b/mu1_100mhz/3301/avg_o_ru_tst377.dat | 12 +- .../mu1_100mhz/3301/avg_o_ru_tst377_dynamic.dat | 292 --- .../cat_b/mu1_100mhz/3301/bbu_pool_cfg_o_du.xml | 65 + .../cat_b/mu1_100mhz/3301/bbu_pool_cfg_o_ru.xml | 65 + .../cat_b/mu1_100mhz/3301/config_file_o_du.dat | 4 +- .../cat_b/mu1_100mhz/3301/config_file_o_ru.dat | 4 +- .../usecase/cat_b/mu1_100mhz/3301/peak_o_du.dat | 4 +- .../cat_b/mu1_100mhz/3301/peak_o_du_tst376.dat | 12 +- .../usecase/cat_b/mu1_100mhz/3301/peak_o_ru.dat | 4 +- .../cat_b/mu1_100mhz/3301/peak_o_ru_tst376.dat | 12 +- .../mu1_100mhz/3301/peak_o_ru_tst376_dynamic.dat | 301 --- .../usecase/cat_b/mu1_100mhz/3301/usecase_du.cfg | 23 +- .../cat_b/mu1_100mhz/3301/usecase_du_csx.cfg | 7 +- .../usecase/cat_b/mu1_100mhz/3301/usecase_ru.cfg | 14 +- .../cat_b/mu1_100mhz/3301/usecase_ru_dynamic.cfg | 62 - .../app/usecase/cat_b/mu1_100mhz/3311/avg_o_du.dat | 4 +- .../cat_b/mu1_100mhz/3311/avg_o_du_tst377.dat | 12 +- .../app/usecase/cat_b/mu1_100mhz/3311/avg_o_ru.dat | 4 +- .../cat_b/mu1_100mhz/3311/avg_o_ru_tst377.dat | 12 +- .../cat_b/mu1_100mhz/3311/config_file_o_du.dat | 4 +- .../cat_b/mu1_100mhz/3311/config_file_o_ru.dat | 4 +- .../usecase/cat_b/mu1_100mhz/3311/peak_o_du.dat | 4 +- .../cat_b/mu1_100mhz/3311/peak_o_du_tst376.dat | 12 +- .../usecase/cat_b/mu1_100mhz/3311/peak_o_ru.dat | 4 +- .../cat_b/mu1_100mhz/3311/peak_o_ru_tst376.dat | 12 +- .../app/usecase/cat_b/mu1_100mhz/3321/avg_o_du.dat | 236 -- .../cat_b/mu1_100mhz/3321/avg_o_du_tst377.dat | 241 --- .../app/usecase/cat_b/mu1_100mhz/3321/avg_o_ru.dat | 288 --- .../cat_b/mu1_100mhz/3321/avg_o_ru_tst377.dat | 289 --- .../cat_b/mu1_100mhz/3321/avg_rxconfig_0.cfg | 31 - .../cat_b/mu1_100mhz/3321/avg_rxconfig_1.cfg | 31 - .../cat_b/mu1_100mhz/3321/avg_rxconfig_2.cfg | 31 - .../cat_b/mu1_100mhz/3321/avg_rxconfig_3.cfg | 31 - .../cat_b/mu1_100mhz/3321/avg_txconfig_0.cfg | 32 - .../cat_b/mu1_100mhz/3321/avg_txconfig_1.cfg | 32 - .../cat_b/mu1_100mhz/3321/avg_txconfig_2.cfg | 32 - .../cat_b/mu1_100mhz/3321/config_file_o_du.dat | 223 -- .../cat_b/mu1_100mhz/3321/config_file_o_ru.dat | 274 --- .../cat_b/mu1_100mhz/3321/peak_rxconfig_0.cfg | 34 - .../cat_b/mu1_100mhz/3321/peak_rxconfig_1.cfg | 34 - .../cat_b/mu1_100mhz/3321/peak_rxconfig_2.cfg | 34 - .../cat_b/mu1_100mhz/3321/peak_rxconfig_3.cfg | 34 - .../cat_b/mu1_100mhz/3321/peak_txconfig_0.cfg | 35 - .../cat_b/mu1_100mhz/3321/peak_txconfig_1.cfg | 35 - .../cat_b/mu1_100mhz/3321/peak_txconfig_2.cfg | 36 - .../usecase/cat_b/mu1_100mhz/3321/usecase_du.cfg | 64 - .../usecase/cat_b/mu1_100mhz/3321/usecase_ru.cfg | 62 - .../app/usecase/cat_b/mu1_100mhz/3331/avg_o_du.dat | 236 -- .../cat_b/mu1_100mhz/3331/avg_o_du_tst377.dat | 241 --- .../app/usecase/cat_b/mu1_100mhz/3331/avg_o_ru.dat | 288 --- .../cat_b/mu1_100mhz/3331/avg_o_ru_tst377.dat | 289 --- .../cat_b/mu1_100mhz/3331/avg_rxconfig_0.cfg | 31 - .../cat_b/mu1_100mhz/3331/avg_rxconfig_1.cfg | 31 - .../cat_b/mu1_100mhz/3331/avg_rxconfig_2.cfg | 31 - .../cat_b/mu1_100mhz/3331/avg_rxconfig_3.cfg | 31 - .../cat_b/mu1_100mhz/3331/avg_txconfig_0.cfg | 32 - .../cat_b/mu1_100mhz/3331/avg_txconfig_1.cfg | 32 - .../cat_b/mu1_100mhz/3331/avg_txconfig_2.cfg | 32 - .../cat_b/mu1_100mhz/3331/config_file_o_du.dat | 223 -- .../cat_b/mu1_100mhz/3331/config_file_o_ru.dat | 274 --- .../cat_b/mu1_100mhz/3331/peak_rxconfig_0.cfg | 34 - .../cat_b/mu1_100mhz/3331/peak_rxconfig_1.cfg | 34 - .../cat_b/mu1_100mhz/3331/peak_rxconfig_2.cfg | 34 - .../cat_b/mu1_100mhz/3331/peak_rxconfig_3.cfg | 34 - .../cat_b/mu1_100mhz/3331/peak_txconfig_0.cfg | 35 - .../cat_b/mu1_100mhz/3331/peak_txconfig_1.cfg | 35 - .../cat_b/mu1_100mhz/3331/peak_txconfig_2.cfg | 36 - .../usecase/cat_b/mu1_100mhz/3331/usecase_du.cfg | 64 - .../usecase/cat_b/mu1_100mhz/3331/usecase_ru.cfg | 62 - .../cat_b/mu1_100mhz/342/peak_o_du_tst376.dat | 237 +++ .../cat_b/mu1_100mhz/342/peak_o_ru_tst376.dat | 287 +++ .../usecase/cat_b/mu1_100mhz/342/usecase_du.cfg | 61 + .../{811/usecase_du.cfg => 342/usecase_du_icx.cfg} | 15 +- .../cat_b/mu1_100mhz/{411 => 342}/usecase_ru.cfg | 17 +- .../cat_b/mu1_100mhz/342/usecase_ru_icx.cfg | 60 + .../app/usecase/cat_b/mu1_100mhz/3501/avg_o_du.dat | 4 +- .../cat_b/mu1_100mhz/3501/avg_o_du_tst377.dat | 9 +- .../app/usecase/cat_b/mu1_100mhz/3501/avg_o_ru.dat | 6 +- .../cat_b/mu1_100mhz/3501/avg_o_ru_tst377.dat | 11 +- .../cat_b/mu1_100mhz/3501/config_file_o_du.dat | 4 +- .../cat_b/mu1_100mhz/3501/config_file_o_ru.dat | 4 +- .../usecase/cat_b/mu1_100mhz/3501/peak_o_du.dat | 4 +- .../cat_b/mu1_100mhz/3501/peak_o_du_tst376.dat | 9 +- .../usecase/cat_b/mu1_100mhz/3501/peak_o_ru.dat | 4 +- .../cat_b/mu1_100mhz/3501/peak_o_ru_tst376.dat | 9 +- .../app/usecase/cat_b/mu1_100mhz/3511/avg_o_du.dat | 4 +- .../cat_b/mu1_100mhz/3511/avg_o_du_tst377.dat | 9 +- .../app/usecase/cat_b/mu1_100mhz/3511/avg_o_ru.dat | 6 +- .../cat_b/mu1_100mhz/3511/avg_o_ru_tst377.dat | 11 +- .../cat_b/mu1_100mhz/3511/config_file_o_du.dat | 4 +- .../cat_b/mu1_100mhz/3511/config_file_o_ru.dat | 4 +- .../usecase/cat_b/mu1_100mhz/3511/peak_o_du.dat | 4 +- .../cat_b/mu1_100mhz/3511/peak_o_du_tst376.dat | 9 +- .../usecase/cat_b/mu1_100mhz/3511/peak_o_ru.dat | 4 +- .../cat_b/mu1_100mhz/3511/peak_o_ru_tst376.dat | 9 +- .../app/usecase/cat_b/mu1_100mhz/3521/avg_o_du.dat | 265 --- .../cat_b/mu1_100mhz/3521/avg_o_du_tst377.dat | 265 --- .../app/usecase/cat_b/mu1_100mhz/3521/avg_o_ru.dat | 315 --- .../cat_b/mu1_100mhz/3521/avg_o_ru_tst377.dat | 315 --- .../cat_b/mu1_100mhz/3521/avg_rxconfig_0.cfg | 31 - .../cat_b/mu1_100mhz/3521/avg_rxconfig_1.cfg | 31 - .../cat_b/mu1_100mhz/3521/avg_rxconfig_2.cfg | 31 - .../cat_b/mu1_100mhz/3521/avg_rxconfig_3.cfg | 31 - .../cat_b/mu1_100mhz/3521/avg_txconfig_0.cfg | 32 - .../cat_b/mu1_100mhz/3521/avg_txconfig_1.cfg | 32 - .../cat_b/mu1_100mhz/3521/avg_txconfig_2.cfg | 32 - .../cat_b/mu1_100mhz/3521/config_file_o_du.dat | 223 -- .../cat_b/mu1_100mhz/3521/config_file_o_ru.dat | 274 --- .../usecase/cat_b/mu1_100mhz/3521/peak_o_du.dat | 305 --- .../cat_b/mu1_100mhz/3521/peak_o_du_tst376.dat | 305 --- .../usecase/cat_b/mu1_100mhz/3521/peak_o_ru.dat | 353 --- .../cat_b/mu1_100mhz/3521/peak_o_ru_tst376.dat | 353 --- .../cat_b/mu1_100mhz/3521/peak_rxconfig_0.cfg | 34 - .../cat_b/mu1_100mhz/3521/peak_rxconfig_1.cfg | 34 - .../cat_b/mu1_100mhz/3521/peak_rxconfig_2.cfg | 34 - .../cat_b/mu1_100mhz/3521/peak_rxconfig_3.cfg | 34 - .../cat_b/mu1_100mhz/3521/peak_txconfig_0.cfg | 35 - .../cat_b/mu1_100mhz/3521/peak_txconfig_1.cfg | 35 - .../cat_b/mu1_100mhz/3521/peak_txconfig_2.cfg | 36 - .../usecase/cat_b/mu1_100mhz/3521/usecase_du.cfg | 65 - .../app/usecase/cat_b/mu1_100mhz/3531/avg_o_du.dat | 265 --- .../cat_b/mu1_100mhz/3531/avg_o_du_tst377.dat | 265 --- .../app/usecase/cat_b/mu1_100mhz/3531/avg_o_ru.dat | 315 --- .../cat_b/mu1_100mhz/3531/avg_o_ru_tst377.dat | 315 --- .../cat_b/mu1_100mhz/3531/avg_rxconfig_0.cfg | 31 - .../cat_b/mu1_100mhz/3531/avg_rxconfig_1.cfg | 31 - .../cat_b/mu1_100mhz/3531/avg_rxconfig_2.cfg | 31 - .../cat_b/mu1_100mhz/3531/avg_rxconfig_3.cfg | 31 - .../cat_b/mu1_100mhz/3531/avg_txconfig_0.cfg | 32 - .../cat_b/mu1_100mhz/3531/avg_txconfig_1.cfg | 32 - .../cat_b/mu1_100mhz/3531/avg_txconfig_2.cfg | 32 - .../cat_b/mu1_100mhz/3531/config_file_o_du.dat | 223 -- .../cat_b/mu1_100mhz/3531/config_file_o_ru.dat | 274 --- .../usecase/cat_b/mu1_100mhz/3531/peak_o_du.dat | 305 --- .../cat_b/mu1_100mhz/3531/peak_o_du_tst376.dat | 305 --- .../usecase/cat_b/mu1_100mhz/3531/peak_o_ru.dat | 353 --- .../cat_b/mu1_100mhz/3531/peak_o_ru_tst376.dat | 353 --- .../cat_b/mu1_100mhz/3531/peak_rxconfig_0.cfg | 34 - .../cat_b/mu1_100mhz/3531/peak_rxconfig_1.cfg | 34 - .../cat_b/mu1_100mhz/3531/peak_rxconfig_2.cfg | 34 - .../cat_b/mu1_100mhz/3531/peak_rxconfig_3.cfg | 34 - .../cat_b/mu1_100mhz/3531/peak_txconfig_0.cfg | 35 - .../cat_b/mu1_100mhz/3531/peak_txconfig_1.cfg | 35 - .../cat_b/mu1_100mhz/3531/peak_txconfig_2.cfg | 36 - .../usecase/cat_b/mu1_100mhz/3531/usecase_du.cfg | 64 - .../usecase/cat_b/mu1_100mhz/3531/usecase_ru.cfg | 62 - .../cat_b/mu1_100mhz/3531/usecase_ru_csx.cfg | 61 - .../app/usecase/cat_b/mu1_100mhz/384/peak_o_du.dat | 253 +++ .../app/usecase/cat_b/mu1_100mhz/384/peak_o_ru.dat | 303 +++ .../usecase_du_csx.cfg => 384/usecase_du.cfg} | 9 +- .../mu1_100mhz/{511 => 384}/usecase_du_icx.cfg | 14 +- .../usecase_ru_csx.cfg => 384/usecase_ru.cfg} | 16 +- .../cat_b/mu1_100mhz/384/usecase_ru_icx.cfg | 61 + .../cat_b/mu1_100mhz/4/config_file_o_du.dat | 223 -- .../cat_b/mu1_100mhz/4/config_file_o_ru.dat | 260 --- .../app/usecase/cat_b/mu1_100mhz/4/usecase_du.cfg | 68 - .../app/usecase/cat_b/mu1_100mhz/4/usecase_ru.cfg | 68 - .../cat_b/mu1_100mhz/401/config_file_o_du.dat | 12 +- .../cat_b/mu1_100mhz/401/config_file_o_ru.dat | 12 +- .../cat_b/mu1_100mhz/411/config_file_o_du.dat | 232 -- .../cat_b/mu1_100mhz/442/peak_o_du_tst376.dat | 237 +++ .../cat_b/mu1_100mhz/442/peak_o_ru_tst376.dat | 287 +++ .../usecase/cat_b/mu1_100mhz/442/usecase_du.cfg | 73 + .../cat_b/mu1_100mhz/442/usecase_du_icx.cfg | 71 + .../usecase/cat_b/mu1_100mhz/442/usecase_ru.cfg | 72 + .../usecase_ru.cfg => 442/usecase_ru_icx.cfg} | 26 +- .../app/usecase/cat_b/mu1_100mhz/484/peak_o_du.dat | 253 +++ .../app/usecase/cat_b/mu1_100mhz/484/peak_o_ru.dat | 303 +++ .../usecase/cat_b/mu1_100mhz/484/usecase_du.cfg | 73 + .../cat_b/mu1_100mhz/484/usecase_du_icx.cfg | 70 + .../usecase/cat_b/mu1_100mhz/484/usecase_ru.cfg | 71 + .../cat_b/mu1_100mhz/484/usecase_ru_icx.cfg | 67 + .../cat_b/mu1_100mhz/501/config_file_o_du.dat | 9 +- .../cat_b/mu1_100mhz/501/config_file_o_ru.dat | 9 +- .../cat_b/mu1_100mhz/502/config_file_o_du.dat | 9 +- .../cat_b/mu1_100mhz/502/config_file_o_ru.dat | 12 +- .../cat_b/mu1_100mhz/503/config_file_o_du.dat | 9 +- .../cat_b/mu1_100mhz/503/config_file_o_ru.dat | 9 +- .../cat_b/mu1_100mhz/504/config_file_o_du.dat | 9 +- .../cat_b/mu1_100mhz/504/config_file_o_ru.dat | 9 +- .../cat_b/mu1_100mhz/505/config_file_o_du.dat | 9 +- .../cat_b/mu1_100mhz/505/config_file_o_ru.dat | 9 +- .../cat_b/mu1_100mhz/505/usecase_du_icx.cfg | 58 - .../cat_b/mu1_100mhz/506/config_file_o_du.dat | 9 +- .../cat_b/mu1_100mhz/506/config_file_o_ru.dat | 9 +- .../cat_b/mu1_100mhz/506/usecase_du_icx.cfg | 58 - .../cat_b/mu1_100mhz/511/config_file_o_du.dat | 9 +- .../cat_b/mu1_100mhz/511/config_file_o_ru.dat | 9 +- .../cat_b/mu1_100mhz/512/config_file_o_du.dat | 9 +- .../cat_b/mu1_100mhz/512/config_file_o_ru.dat | 9 +- .../cat_b/mu1_100mhz/512/usecase_du_icx.cfg | 58 - .../cat_b/mu1_100mhz/513/config_file_o_du.dat | 9 +- .../cat_b/mu1_100mhz/513/config_file_o_ru.dat | 9 +- .../cat_b/mu1_100mhz/513/usecase_du_icx.cfg | 58 - .../cat_b/mu1_100mhz/514/config_file_o_du.dat | 9 +- .../cat_b/mu1_100mhz/514/config_file_o_ru.dat | 9 +- .../cat_b/mu1_100mhz/514/usecase_du_icx.cfg | 58 - .../cat_b/mu1_100mhz/515/config_file_o_du.dat | 9 +- .../cat_b/mu1_100mhz/515/config_file_o_ru.dat | 9 +- .../cat_b/mu1_100mhz/515/usecase_du_icx.cfg | 58 - .../cat_b/mu1_100mhz/516/config_file_o_du.dat | 9 +- .../cat_b/mu1_100mhz/516/config_file_o_ru.dat | 9 +- .../cat_b/mu1_100mhz/516/usecase_du_icx.cfg | 58 - .../cat_b/mu1_100mhz/602/bbu_pool_cfg_o_du.xml | 65 + .../cat_b/mu1_100mhz/602/bbu_pool_cfg_o_du_icx.xml | 65 + .../cat_b/mu1_100mhz/602/bbu_pool_cfg_o_ru.xml | 65 + .../cat_b/mu1_100mhz/602/config_file_o_ru.dat | 250 --- .../mu1_100mhz/{503 => 602}/usecase_du_icx.cfg | 9 +- .../cat_b/mu1_100mhz/603/config_file_o_ru.dat | 250 --- .../cat_b/mu1_100mhz/604/config_file_o_ru.dat | 264 --- .../usecase/cat_b/mu1_100mhz/604/usecase_du.cfg | 55 - .../cat_b/mu1_100mhz/606/config_file_o_du.dat | 208 -- .../cat_b/mu1_100mhz/606/config_file_o_ru.dat | 250 --- .../usecase/cat_b/mu1_100mhz/606/usecase_du.cfg | 55 - .../usecase/cat_b/mu1_100mhz/606/usecase_ru.cfg | 51 - .../cat_b/mu1_100mhz/611/config_file_o_du.dat | 223 -- .../cat_b/mu1_100mhz/611/config_file_o_ru.dat | 272 --- .../usecase/cat_b/mu1_100mhz/611/usecase_ru.cfg | 51 - .../cat_b/mu1_100mhz/612/bbu_pool_cfg_o_du.xml | 65 + .../cat_b/mu1_100mhz/612/bbu_pool_cfg_o_du_icx.xml | 65 + .../cat_b/mu1_100mhz/612/bbu_pool_cfg_o_ru.xml | 65 + .../cat_b/mu1_100mhz/612/config_file_o_du.dat | 11 +- .../cat_b/mu1_100mhz/612/config_file_o_ru.dat | 11 +- .../usecase/cat_b/mu1_100mhz/612/usecase_du.cfg | 1 + .../cat_b/mu1_100mhz/612/usecase_du_icx.cfg | 57 + .../cat_b/mu1_100mhz/613/config_file_o_du.dat | 207 -- .../cat_b/mu1_100mhz/613/config_file_o_ru.dat | 250 --- .../usecase/cat_b/mu1_100mhz/613/usecase_du.cfg | 55 - .../usecase/cat_b/mu1_100mhz/613/usecase_ru.cfg | 51 - .../cat_b/mu1_100mhz/614/config_file_o_du.dat | 217 -- .../cat_b/mu1_100mhz/614/config_file_o_ru.dat | 264 --- .../usecase/cat_b/mu1_100mhz/614/usecase_du.cfg | 55 - .../usecase/cat_b/mu1_100mhz/614/usecase_ru.cfg | 51 - .../cat_b/mu1_100mhz/615/config_file_o_du.dat | 204 -- .../usecase/cat_b/mu1_100mhz/615/usecase_du.cfg | 55 - .../usecase/cat_b/mu1_100mhz/615/usecase_ru.cfg | 51 - .../cat_b/mu1_100mhz/616/config_file_o_du.dat | 208 -- .../cat_b/mu1_100mhz/616/config_file_o_ru.dat | 250 --- .../usecase/cat_b/mu1_100mhz/616/usecase_du.cfg | 55 - .../usecase/cat_b/mu1_100mhz/616/usecase_ru.cfg | 51 - .../cat_b/mu1_100mhz/801/config_file_o_du.dat | 281 --- .../cat_b/mu1_100mhz/801/config_file_o_ru.dat | 328 --- .../usecase/cat_b/mu1_100mhz/801/usecase_du.cfg | 58 - .../cat_b/mu1_100mhz/802/config_file_o_du.dat | 9 +- .../cat_b/mu1_100mhz/802/config_file_o_ru.dat | 13 +- .../cat_b/mu1_100mhz/803/config_file_o_du.dat | 241 --- .../cat_b/mu1_100mhz/803/config_file_o_ru.dat | 284 --- .../cat_b/mu1_100mhz/804/config_file_o_du.dat | 240 --- .../cat_b/mu1_100mhz/804/config_file_o_ru.dat | 290 --- .../usecase/cat_b/mu1_100mhz/804/usecase_du.cfg | 58 - .../cat_b/mu1_100mhz/805/config_file_o_du.dat | 241 --- .../cat_b/mu1_100mhz/805/config_file_o_ru.dat | 285 --- .../usecase/cat_b/mu1_100mhz/805/usecase_du.cfg | 58 - .../cat_b/mu1_100mhz/806/config_file_o_du.dat | 242 --- .../cat_b/mu1_100mhz/806/config_file_o_ru.dat | 284 --- .../usecase/cat_b/mu1_100mhz/806/usecase_du.cfg | 58 - .../usecase/cat_b/mu1_100mhz/806/usecase_ru.cfg | 56 - .../cat_b/mu1_100mhz/811/config_file_o_du.dat | 281 --- .../cat_b/mu1_100mhz/811/config_file_o_ru.dat | 328 --- .../usecase/cat_b/mu1_100mhz/811/usecase_ru.cfg | 56 - .../cat_b/mu1_100mhz/812/config_file_o_du.dat | 9 +- .../cat_b/mu1_100mhz/812/config_file_o_ru.dat | 9 +- .../cat_b/mu1_100mhz/813/config_file_o_du.dat | 241 --- .../cat_b/mu1_100mhz/813/config_file_o_ru.dat | 284 --- .../usecase/cat_b/mu1_100mhz/813/usecase_du.cfg | 58 - .../usecase/cat_b/mu1_100mhz/813/usecase_ru.cfg | 56 - .../cat_b/mu1_100mhz/814/config_file_o_du.dat | 240 --- .../cat_b/mu1_100mhz/814/config_file_o_ru.dat | 284 --- .../usecase/cat_b/mu1_100mhz/814/usecase_du.cfg | 58 - .../usecase/cat_b/mu1_100mhz/814/usecase_ru.cfg | 56 - .../cat_b/mu1_100mhz/815/config_file_o_du.dat | 241 --- .../cat_b/mu1_100mhz/815/config_file_o_ru.dat | 284 --- .../usecase/cat_b/mu1_100mhz/815/usecase_du.cfg | 58 - .../usecase/cat_b/mu1_100mhz/815/usecase_ru.cfg | 56 - .../cat_b/mu1_100mhz/816/config_file_o_du.dat | 242 --- .../cat_b/mu1_100mhz/816/config_file_o_ru.dat | 284 --- .../usecase/cat_b/mu1_100mhz/816/usecase_du.cfg | 58 - .../usecase/cat_b/mu1_100mhz/816/usecase_ru.cfg | 56 - .../usecase/cat_b/mu1_100mhz/bbu_pool_cfg_o_du.xml | 65 + .../usecase/cat_b/mu1_100mhz/bbu_pool_cfg_o_ru.xml | 65 + .../usecase/cat_b/mu1_100mhz/config_file_o_du.dat | 9 +- .../usecase/cat_b/mu1_100mhz/config_file_o_ru.dat | 10 +- .../app/usecase/cat_b/mu1_100mhz/usecase_du.cfg | 2 + .../usecase/dss/mu0_10mhz/10/config_file_o_du.dat | 127 ++ .../usecase/dss/mu0_10mhz/10/config_file_o_ru.dat | 135 ++ .../app/usecase/dss/mu0_10mhz/10/usecase_du.cfg | 73 + .../8 => dss/mu0_10mhz/10}/usecase_ru.cfg | 0 .../usecase/dss/mu0_10mhz/11/config_file_o_du.dat | 133 ++ .../usecase/dss/mu0_10mhz/11/config_file_o_ru.dat | 140 ++ .../app/usecase/dss/mu0_10mhz/11/usecase_du.cfg | 73 + .../9 => dss/mu0_10mhz/11}/usecase_ru.cfg | 0 .../usecase/dss/mu0_10mhz/60/bbu_pool_cfg_o_du.xml | 65 + .../usecase/dss/mu0_10mhz/60/bbu_pool_cfg_o_ru.xml | 65 + .../usecase/dss/mu0_10mhz/60/config_file_o_du.dat | 148 ++ .../usecase/dss/mu0_10mhz/60/config_file_o_ru.dat | 155 ++ .../112 => dss/mu0_10mhz/60}/usecase_du.cfg | 5 + .../111 => dss/mu0_10mhz/60}/usecase_ru.cfg | 0 .../usecase/dss/mu0_10mhz/61/bbu_pool_cfg_o_du.xml | 65 + .../usecase/dss/mu0_10mhz/61/bbu_pool_cfg_o_ru.xml | 65 + .../usecase/dss/mu0_10mhz/61/config_file_o_du.dat | 153 ++ .../usecase/dss/mu0_10mhz/61/config_file_o_ru.dat | 160 ++ .../9 => dss/mu0_10mhz/61}/usecase_du.cfg | 5 + .../112 => dss/mu0_10mhz/61}/usecase_ru.cfg | 0 .../usecase/dss/mu0_10mhz/bbu_pool_cfg_o_du.xml | 65 + .../usecase/dss/mu0_10mhz/bbu_pool_cfg_o_ru.xml | 65 + .../usecase/dss/mu0_20mhz/10/config_file_o_du.dat | 128 ++ .../usecase/dss/mu0_20mhz/10/config_file_o_ru.dat | 135 ++ .../app/usecase/dss/mu0_20mhz/10/usecase_du.cfg | 73 + .../113 => dss/mu0_20mhz/10}/usecase_ru.cfg | 0 .../usecase/dss/mu0_20mhz/11/config_file_o_du.dat | 133 ++ .../usecase/dss/mu0_20mhz/11/config_file_o_ru.dat | 140 ++ .../app/usecase/dss/mu0_20mhz/11/usecase_du.cfg | 73 + .../114 => dss/mu0_20mhz/11}/usecase_ru.cfg | 0 .../usecase/dss/mu0_20mhz/60/bbu_pool_cfg_o_du.xml | 65 + .../usecase/dss/mu0_20mhz/60/bbu_pool_cfg_o_ru.xml | 65 + .../usecase/dss/mu0_20mhz/60/config_file_o_du.dat | 156 ++ .../usecase/dss/mu0_20mhz/60/config_file_o_ru.dat | 165 ++ .../8 => dss/mu0_20mhz/60}/usecase_du.cfg | 5 + .../115 => dss/mu0_20mhz/60}/usecase_ru.cfg | 0 .../usecase/dss/mu0_20mhz/61/bbu_pool_cfg_o_du.xml | 65 + .../usecase/dss/mu0_20mhz/61/bbu_pool_cfg_o_ru.xml | 65 + .../usecase/dss/mu0_20mhz/61/config_file_o_du.dat | 177 ++ .../usecase/dss/mu0_20mhz/61/config_file_o_ru.dat | 185 ++ .../app/usecase/dss/mu0_20mhz/61/usecase_du.cfg | 73 + .../116 => dss/mu0_20mhz/61}/usecase_ru.cfg | 0 .../usecase/dss/mu0_20mhz/bbu_pool_cfg_o_du.xml | 65 + .../usecase/dss/mu0_20mhz/bbu_pool_cfg_o_ru.xml | 65 + .../usecase/dss/mu0_5mhz/10/config_file_o_du.dat | 128 ++ .../usecase/dss/mu0_5mhz/10/config_file_o_ru.dat | 135 ++ fhi_lib/app/usecase/dss/mu0_5mhz/10/usecase_du.cfg | 73 + .../117 => dss/mu0_5mhz/10}/usecase_ru.cfg | 0 .../usecase/dss/mu0_5mhz/11/config_file_o_du.dat | 133 ++ .../usecase/dss/mu0_5mhz/11/config_file_o_ru.dat | 140 ++ fhi_lib/app/usecase/dss/mu0_5mhz/11/usecase_du.cfg | 73 + .../118 => dss/mu0_5mhz/11}/usecase_ru.cfg | 0 .../usecase/dss/mu0_5mhz/60/bbu_pool_cfg_o_du.xml | 65 + .../usecase/dss/mu0_5mhz/60/bbu_pool_cfg_o_ru.xml | 65 + .../usecase/dss/mu0_5mhz/60/config_file_o_du.dat | 148 ++ .../usecase/dss/mu0_5mhz/60/config_file_o_ru.dat | 155 ++ fhi_lib/app/usecase/dss/mu0_5mhz/60/usecase_du.cfg | 74 + fhi_lib/app/usecase/dss/mu0_5mhz/60/usecase_ru.cfg | 68 + .../usecase/dss/mu0_5mhz/61/bbu_pool_cfg_o_du.xml | 65 + .../usecase/dss/mu0_5mhz/61/bbu_pool_cfg_o_ru.xml | 65 + .../usecase/dss/mu0_5mhz/61/config_file_o_du.dat | 153 ++ .../usecase/dss/mu0_5mhz/61/config_file_o_ru.dat | 160 ++ fhi_lib/app/usecase/dss/mu0_5mhz/61/usecase_du.cfg | 73 + .../119 => dss/mu0_5mhz/61}/usecase_ru.cfg | 0 .../app/usecase/dss/mu0_5mhz/bbu_pool_cfg_o_du.xml | 65 + .../app/usecase/dss/mu0_5mhz/bbu_pool_cfg_o_ru.xml | 65 + .../usecase/lte_a/mu0_10mhz/bbu_pool_cfg_o_du.xml | 65 + .../usecase/lte_a/mu0_10mhz/bbu_pool_cfg_o_ru.xml | 65 + .../usecase/lte_a/mu0_10mhz/config_file_o_du.dat | 2 +- .../usecase/lte_a/mu0_10mhz/config_file_o_ru.dat | 2 +- fhi_lib/app/usecase/lte_a/mu0_10mhz/usecase_du.cfg | 1 + .../usecase/lte_a/mu0_20mhz/config_file_o_du.dat | 2 +- .../usecase/lte_a/mu0_20mhz/config_file_o_ru.dat | 2 +- fhi_lib/app/usecase/lte_a/mu0_20mhz/usecase_du.cfg | 1 + .../usecase/lte_a/mu0_5mhz/bbu_pool_cfg_o_du.xml | 65 + .../usecase/lte_a/mu0_5mhz/bbu_pool_cfg_o_ru.xml | 65 + .../usecase/lte_a/mu0_5mhz/config_file_o_du.dat | 2 +- .../usecase/lte_a/mu0_5mhz/config_file_o_ru.dat | 2 +- fhi_lib/app/usecase/lte_a/mu0_5mhz/usecase_du.cfg | 1 + .../usecase/lte_b/mu0_10mhz/1/config_file_o_du.dat | 14 +- .../usecase/lte_b/mu0_10mhz/1/config_file_o_ru.dat | 14 +- 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fhi_lib/lib/src/xran_bfp_cplane16_snc.cpp | 4 +- fhi_lib/lib/src/xran_bfp_cplane32.cpp | 4 +- fhi_lib/lib/src/xran_bfp_cplane32_snc.cpp | 4 +- fhi_lib/lib/src/xran_bfp_cplane64.cpp | 4 +- fhi_lib/lib/src/xran_bfp_cplane64_snc.cpp | 4 +- fhi_lib/lib/src/xran_bfp_cplane8.cpp | 4 +- fhi_lib/lib/src/xran_bfp_cplane8_snc.cpp | 4 +- fhi_lib/lib/src/xran_bfp_uplane.cpp | 4 +- fhi_lib/lib/src/xran_bfp_uplane_snc.cpp | 4 +- fhi_lib/lib/src/xran_cb_proc.c | 206 +- fhi_lib/lib/src/xran_common.c | 723 +++++-- fhi_lib/lib/src/xran_common.h | 30 +- fhi_lib/lib/src/xran_cp_api.c | 520 +++-- fhi_lib/lib/src/xran_cp_proc.c | 674 ++++-- fhi_lib/lib/src/xran_cp_proc.h | 11 +- fhi_lib/lib/src/xran_delay_measurement.c | 63 +- fhi_lib/lib/src/xran_dev.c | 8 +- fhi_lib/lib/src/xran_dev.h | 45 +- fhi_lib/lib/src/xran_frame_struct.c | 25 +- fhi_lib/lib/src/xran_main.c | 1700 +++++++++++++-- fhi_lib/lib/src/xran_main.h | 5 +- fhi_lib/lib/src/xran_mem_mgr.c | 61 +- fhi_lib/lib/src/xran_mem_mgr.h | 1 - fhi_lib/lib/src/xran_rx_proc.c | 334 ++- fhi_lib/lib/src/xran_sync_api.c | 2 +- fhi_lib/lib/src/xran_timer.c | 19 +- fhi_lib/lib/src/xran_transport.c | 1 - fhi_lib/lib/src/xran_tx_proc.c | 2249 ++++++++++++++------ fhi_lib/lib/src/xran_tx_proc.h | 24 +- fhi_lib/lib/src/xran_up_api.c | 92 +- fhi_lib/test/common/common.hpp | 81 +- fhi_lib/test/common/json.hpp | 8 +- fhi_lib/test/common/xran_lib_wrap.hpp | 274 ++- fhi_lib/test/common/xranlib_unit_test_main.cc | 50 +- fhi_lib/test/master.py | 519 ++++- fhi_lib/test/test_xran/Makefile | 72 +- fhi_lib/test/test_xran/c_plane_tests.cc | 234 +- fhi_lib/test/test_xran/chain_tests.cc | 13 +- fhi_lib/test/test_xran/compander_functional.cc | 16 +- fhi_lib/test/test_xran/conf.json | 66 +- fhi_lib/test/test_xran/init_sys_functional.cc | 18 +- fhi_lib/test/test_xran/prach_functional.cc | 40 +- fhi_lib/test/test_xran/prach_performance.cc | 15 +- fhi_lib/test/test_xran/u_plane_functional.cc | 5 +- fhi_lib/test/test_xran/u_plane_performance.cc | 8 +- setupenv.sh | 9 +- wls_lib/Makefile | 43 +- wls_lib/testapp/Makefile | 51 +- wls_lib/wls_lib.c | 836 -------- wls_lib/wls_lib.h | 3 +- wls_lib/wls_lib_dpdk.c | 18 +- 1076 files changed, 44199 insertions(+), 45220 deletions(-) rename docs/images/{ORAN-Fronthaul-Process.jpg => O-RAN-Fronthaul-Process.jpg} (100%) rename docs/images/{xRAN-Packet-Components.jpg => O-RAN-Packet-Components.jpg} (100%) create mode 100644 docs/images/Setup-for-O-RAN-Testing-with-PHY-and-Configuration-C3-for-Massive-MIMO.jpg create mode 100644 docs/images/Setup-for-O-RAN-Testing-with-PHY-and-Configuration-C3.jpg create mode 100644 docs/images/Setup-for-O-RAN-Testing.jpg delete mode 100644 docs/images/Setup-for-xRAN-Testing-with-PHY-and-Configuration-C3-for.jpg delete mode 100644 docs/images/Setup-for-xRAN-Testing-with-PHY-and-Configuration-C3.jpg delete mode 100644 docs/images/Setup-for-xRAN-Testing.jpg delete mode 100644 fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_add_remove_core_msg.c create mode 100644 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fhi_lib/app/usecase/cat_b/mu1_100mhz/119/config_file_o_du.dat delete mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/119/config_file_o_ru.dat delete mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/119/usecase_du.cfg create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/142/bbu_pool_cfg_o_du.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/142/bbu_pool_cfg_o_du_icx.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/142/bbu_pool_cfg_o_ru.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/142/config_file_o_du.dat create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/142/config_file_o_ru.dat create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/142/usecase_du.cfg rename fhi_lib/app/usecase/cat_b/mu1_100mhz/{501 => 142}/usecase_du_icx.cfg (89%) create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/142/usecase_ru.cfg create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/142/usecase_ru_icx.cfg create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/bbu_pool_cfg_o_du.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/bbu_pool_cfg_o_du_icx.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/bbu_pool_cfg_o_ru.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/peak_o_du_tst376.dat rename fhi_lib/app/usecase/cat_b/mu1_100mhz/{3321 => 1421}/peak_o_ru_tst376.dat (69%) create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/usecase_du.cfg create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/usecase_du_icx.cfg rename fhi_lib/app/usecase/cat_b/mu1_100mhz/{3331/usecase_ru_csx.cfg => 1421/usecase_ru.cfg} (88%) create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/usecase_ru_icx.cfg create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/184/bbu_pool_cfg_o_du.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/184/bbu_pool_cfg_o_du_icx.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/184/bbu_pool_cfg_o_ru.xml rename fhi_lib/app/usecase/cat_b/mu1_100mhz/{3331 => 184}/peak_o_du.dat (72%) create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/184/peak_o_ru.dat create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/184/usecase_du.cfg create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/184/usecase_du_icx.cfg create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/184/usecase_ru.cfg rename fhi_lib/app/usecase/cat_b/mu1_100mhz/{801/usecase_ru.cfg => 184/usecase_ru_icx.cfg} (90%) create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/1841/bbu_pool_cfg_o_du.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/1841/bbu_pool_cfg_o_ru.xml rename fhi_lib/app/usecase/cat_b/mu1_100mhz/{3321 => 1841}/peak_o_du_tst376.dat (76%) rename fhi_lib/app/usecase/cat_b/mu1_100mhz/{3321/peak_o_ru.dat => 1841/peak_o_ru_tst376.dat} (73%) rename fhi_lib/app/usecase/cat_b/mu1_100mhz/{3531/usecase_du_csx.cfg => 1841/usecase_du.cfg} (91%) rename fhi_lib/app/usecase/cat_b/mu1_100mhz/{504 => 1841}/usecase_du_icx.cfg (93%) rename fhi_lib/app/usecase/cat_b/mu1_100mhz/{3521/usecase_ru_csx.cfg => 1841/usecase_ru.cfg} (88%) rename fhi_lib/app/usecase/cat_b/mu1_100mhz/{805/usecase_ru.cfg => 1841/usecase_ru_icx.cfg} (90%) create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/2/bbu_pool_cfg_o_du.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/2/bbu_pool_cfg_o_ru.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/202/bbu_pool_cfg_o_du.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/202/bbu_pool_cfg_o_ru.xml delete mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/205/usecase_ru.cfg create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/212/bbu_pool_cfg_o_du.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/212/bbu_pool_cfg_o_ru.xml delete mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/221/config_file_o_du.dat delete mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/221/config_file_o_ru.dat delete mode 100644 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mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/235/config_file_o_du.dat delete mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/235/config_file_o_ru.dat delete mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/235/usecase_du.cfg delete mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/235/usecase_ru.cfg delete mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/236/config_file_o_du.dat delete mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/236/config_file_o_ru.dat delete mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/236/usecase_du.cfg delete mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/236/usecase_ru.cfg create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/242/peak_o_du_tst376.dat create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/242/peak_o_ru_tst376.dat rename fhi_lib/app/usecase/cat_b/mu1_100mhz/{3321/usecase_du_csx.cfg => 242/usecase_du.cfg} (91%) create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/242/usecase_du_icx.cfg rename fhi_lib/app/usecase/cat_b/mu1_100mhz/{3321/usecase_ru_csx.cfg => 242/usecase_ru.cfg} (88%) create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/242/usecase_ru_icx.cfg create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/bbu_pool_cfg_o_du.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/bbu_pool_cfg_o_du_icx.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/bbu_pool_cfg_o_ru.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/peak_o_du_tst376.dat rename fhi_lib/app/usecase/cat_b/mu1_100mhz/{3331 => 2422}/peak_o_ru_tst376.dat (67%) rename fhi_lib/app/usecase/cat_b/mu1_100mhz/{3331/usecase_du_csx.cfg => 2422/usecase_du.cfg} (91%) create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/usecase_du_icx.cfg create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/usecase_ru.cfg create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/usecase_ru_icx.cfg rename fhi_lib/app/usecase/cat_b/mu1_100mhz/{3331/peak_o_du_tst376.dat => 284/peak_o_du.dat} (72%) create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/284/peak_o_ru.dat rename fhi_lib/app/usecase/cat_b/mu1_100mhz/{803 => 284}/usecase_du.cfg (86%) create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/284/usecase_du_icx.cfg rename fhi_lib/app/usecase/cat_b/mu1_100mhz/{803 => 284}/usecase_ru.cfg (89%) create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/284/usecase_ru_icx.cfg create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/2842/bbu_pool_cfg_o_du.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/2842/bbu_pool_cfg_o_ru.xml rename fhi_lib/app/usecase/cat_b/mu1_100mhz/{3321/peak_o_du.dat => 2842/peak_o_du_tst376.dat} (76%) rename fhi_lib/app/usecase/cat_b/mu1_100mhz/{3331/peak_o_ru.dat => 2842/peak_o_ru_tst376.dat} (72%) create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/2842/usecase_du.cfg create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/2842/usecase_du_icx.cfg rename fhi_lib/app/usecase/cat_b/mu1_100mhz/{804 => 2842}/usecase_ru.cfg (88%) create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/2842/usecase_ru_icx.cfg delete mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/3/config_file_o_du.dat delete mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/3/config_file_o_ru.dat delete mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/3/usecase_du.cfg delete mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/3/usecase_ru.cfg create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/301/bbu_pool_cfg_o_du.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/301/bbu_pool_cfg_o_du_icx.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/302/bbu_pool_cfg_o_du.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/302/bbu_pool_cfg_o_du_icx.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/302/bbu_pool_cfg_o_ru.xml delete mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/302/usecase_du_icx.cfg create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/303/bbu_pool_cfg_o_du.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/303/bbu_pool_cfg_o_du_icx.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/303/bbu_pool_cfg_o_ru.xml delete mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/303/usecase_du_icx.cfg create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/304/bbu_pool_cfg_o_du.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/304/bbu_pool_cfg_o_du_icx.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/304/bbu_pool_cfg_o_ru.xml delete mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/304/usecase_du_icx.cfg create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/305/bbu_pool_cfg_o_du.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/305/bbu_pool_cfg_o_du_icx.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/305/bbu_pool_cfg_o_ru.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/306/bbu_pool_cfg_o_du.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/306/bbu_pool_cfg_o_du_icx.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/306/bbu_pool_cfg_o_ru.xml delete mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/306/usecase_du_icx.cfg create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/311/bbu_pool_cfg_o_du.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/311/bbu_pool_cfg_o_du_icx.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/311/bbu_pool_cfg_o_ru.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/312/bbu_pool_cfg_o_du.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/312/bbu_pool_cfg_o_du_icx.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/312/bbu_pool_cfg_o_ru.xml delete mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/312/usecase_du_icx.cfg create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/313/bbu_pool_cfg_o_du.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/313/bbu_pool_cfg_o_du_icx.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/313/bbu_pool_cfg_o_ru.xml delete mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/313/usecase_du_icx.cfg create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/314/bbu_pool_cfg_o_du.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/314/bbu_pool_cfg_o_du_icx.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/314/bbu_pool_cfg_o_ru.xml delete mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/314/usecase_du_icx.cfg create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/315/bbu_pool_cfg_o_du.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/315/bbu_pool_cfg_o_du_icx.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/315/bbu_pool_cfg_o_ru.xml delete mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/315/usecase_du_icx.cfg create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/316/bbu_pool_cfg_o_du.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/316/bbu_pool_cfg_o_du_icx.xml create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/316/bbu_pool_cfg_o_ru.xml delete mode 100644 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fhi_lib/app/usecase/cat_b/mu1_100mhz/384/peak_o_ru.dat rename fhi_lib/app/usecase/cat_b/mu1_100mhz/{3521/usecase_du_csx.cfg => 384/usecase_du.cfg} (92%) rename fhi_lib/app/usecase/cat_b/mu1_100mhz/{511 => 384}/usecase_du_icx.cfg (89%) rename fhi_lib/app/usecase/cat_b/mu1_100mhz/{3301/usecase_ru_csx.cfg => 384/usecase_ru.cfg} (89%) create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/384/usecase_ru_icx.cfg delete mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/4/config_file_o_du.dat delete mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/4/config_file_o_ru.dat delete mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/4/usecase_du.cfg delete mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/4/usecase_ru.cfg delete mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/411/config_file_o_du.dat create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/442/peak_o_du_tst376.dat create mode 100644 fhi_lib/app/usecase/cat_b/mu1_100mhz/442/peak_o_ru_tst376.dat create mode 100644 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mode change 100755 => 100644 fhi_lib/build.sh rename fhi_lib/lib/{src => api}/xran_ecpri_owd_measurements.h (100%) create mode 100644 fhi_lib/lib/api/xran_fh_o_ru.h delete mode 100644 fhi_lib/lib/src/xran_app_frag.c delete mode 100644 fhi_lib/lib/src/xran_app_frag.h delete mode 100644 wls_lib/wls_lib.c diff --git a/docs/Assumptions_Dependencies.rst b/docs/Assumptions_Dependencies.rst index 2021a32..a35cdb3 100644 --- a/docs/Assumptions_Dependencies.rst +++ b/docs/Assumptions_Dependencies.rst @@ -43,13 +43,15 @@ Dependencies ------------ O-RAN library implementation depends on the Data Plane Development Kit -(DPDK v20.11.1). +(DPDK v20.11.3). -DPDK v20.11.1 should be patched with corresponding DPDK patch provided +DPDK v20.11.3 should be patched with corresponding DPDK patch provided with FlexRAN release (see *Table 1*, FlexRAN Reference Solution Software Release Notes) -Intel® C++ Compiler v19.0.3 is used. +Intel OneApi DPC++/C++ Compiler is used. Version 2022.0.0 or newer. + +Intel® C++ Compiler v19.0.3 can also be used but not verified with the f release. - Optionally Octave v3.8.2 can be used to generate reference IQ samples (octave-3.8.2-20.el7.x86_64). diff --git a/docs/PTP-configuration_fh.rst b/docs/PTP-configuration_fh.rst index 9b9ee23..f115466 100644 --- a/docs/PTP-configuration_fh.rst +++ b/docs/PTP-configuration_fh.rst @@ -59,9 +59,9 @@ clock, called Physical Hardware Clock (PHC), to read current time just a moment before the packet is sent to minimalize the delays added by the Kernel processing the packet. Not every NIC supports that feature. To confirm that currently attached NIC support Hardware Timestamps, use -ethtool with the command:: +ethtool with the command: - ethtool -T eth0 +ethtool -T eth0 Where the eth0 is the potential PHC port. The output from the command should say that there is Hardware Timestamps support. @@ -98,9 +98,10 @@ To set up PTP for Linux*: # make && make install -22. Modify configs/default.cfg to control frequency of Sync interval to 0.0625 s. :: +3. Modify configs/default.cfg to control frequency of Sync interval to +0.0625 s. :: - logSyncInterval -4 + logSyncInterval -4 ptp4l ===== @@ -123,12 +124,12 @@ The output below shows what the output on non-master node should look like when synchronization is started. This means that PHC on this machine is synchronized to the master PHC. :: - ptp4l[1434165.358]: port 1: INITIALIZING to LISTENING on INIT_COMPLETE - ptp4l[1434165.358]: port 0: INITIALIZING to LISTENING on INIT_COMPLETE + ptp4l[1434165.358]: port 1: INITIALIZING to LISTENING on INIT_COMPLETE + ptp4l[1434165.358]: port 0: INITIALIZING to LISTENING on INIT_COMPLETE ptp4l[1434166.384]: port 1: new foreign master fcaf6a.fffe.029708-1 ptp4l[1434170.352]: selected best master clock fcaf6a.fffe.029708 - ptp4l[1434170.352]: updating UTC offset to 37 - ptp4l[1434170.352]: port 1: LISTENING to UNCALIBRATED on RS_SLAVE + ptp4l[1434170.352]: updating UTC offset to 37 + ptp4l[1434170.352]: port 1: LISTENING to UNCALIBRATED on RS_SLAVE ptp4l[1434171.763]: master offset -5873 s0 freq -18397 path delay 2778 ptp4l[1434172.763]: master offset -6088 s2 freq -18612 path delay 2778 ptp4l[1434172.763]: port 1: UNCALIBRATED to SLAVE on MASTER_CLOCK_SELECTED @@ -192,11 +193,11 @@ below can be used to instantiate this scenario. The difference is that on the O-DU side, the Fronthaul port can be used as the source of PTP as well as for U-plane and C-plane traffic. -1. Follow the steps in Appendix *B.1.1,* *PTP for Linux\* Requirements* -to install PTP on the O-RU server. +1. Follow the steps in Appendix *B.1.1, PTP for Linux\* Requirements* to +install PTP on the O-RU server. -2.Copy configs/default.cfg to configs/default_slave.cfg and modify the -Copied file as below:: +2. Copy configs/default.cfg to configs/default_slave.cfg and modify the +copied file as below:: diff --git a/configs/default.cfg b/configs/default.cfg old mode 100644 @@ -331,32 +332,32 @@ Example of output:: Example of output:: ./ptp4l -f ./configs/default.cfg -2 -i enp175s0f1 -m - ptp4l[3903857.249]: selected /dev/ptp3 as PTP clock - ptp4l[3903857.266]: port 1: INITIALIZING to LISTENING on INIT_COMPLETE - ptp4l[3903857.267]: port 0: INITIALIZING to LISTENING on INIT_COMPLETE + ptp4l[3903857.249]: selected /dev/ptp3 as PTP clock + ptp4l[3903857.266]: port 1: INITIALIZING to LISTENING on INIT_COMPLETE + ptp4l[3903857.267]: port 0: INITIALIZING to LISTENING on INIT_COMPLETE ptp4l[3903863.734]: port 1: LISTENING to MASTER on ANNOUNCE_RECEIPT_TIMEOUT_EXPIRES ptp4l[3903863.734]: selected local clock 3cfdfe.fffe.bd005d as best master ptp4l[3903863.734]: assuming the grand master role -7. Synchronize local NIC PTP master clock to local NIC PTP slave clock. :: +7.Synchronize local NIC PTP master clock to local NIC PTP slave clock. :: ./phc2sys -c enp175s0f1 -s enp25s0f0 -w -m -R 8 Example of output:: - ./phc2sys -c enp175s0f1 -s enp25s0f0 -w -m -R 8 + ./phc2sys -c enp175s0f1 -s enp25s0f0 -w -m -R 8 phc2sys[3904600.332]: enp175s0f1 phc offset 2042 s0 freq -2445 delay 4525 phc2sys[3904600.458]: enp175s0f1 phc offset 2070 s2 freq -2223 delay 4506 - phc2sys[3904600.584]: enp175s0f1 phc offset 2125 s2 freq -98 delay 4505 - phc2sys[3904600.710]: enp175s0f1 phc offset 1847 s2 freq +262 delay 4518 - phc2sys[3904600.836]: enp175s0f1 phc offset 1500 s2 freq +469 delay 4515 - phc2sys[3904600.961]: enp175s0f1 phc offset 1146 s2 freq +565 delay 4547 - phc2sys[3904601.086]: enp175s0f1 phc offset 877 s2 freq +640 delay 4542 - phc2sys[3904601.212]: enp175s0f1 phc offset 517 s2 freq +543 delay 4517 - phc2sys[3904601.337]: enp175s0f1 phc offset 189 s2 freq +370 delay 4510 - phc2sys[3904601.462]: enp175s0f1 phc offset -125 s2 freq +113 delay 4554 - phc2sys[3904601.587]: enp175s0f1 phc offset -412 s2 freq -212 delay 4513 - phc2sys[3904601.712]: enp175s0f1 phc offset -693 s2 freq -617 delay 4519 + phc2sys[3904600.584]: enp175s0f1 phc offset 2125 s2 freq -98 delay 4505 + phc2sys[3904600.710]: enp175s0f1 phc offset 1847 s2 freq +262 delay 4518 + phc2sys[3904600.836]: enp175s0f1 phc offset 1500 s2 freq +469 delay 4515 + phc2sys[3904600.961]: enp175s0f1 phc offset 1146 s2 freq +565 delay 4547 + phc2sys[3904601.086]: enp175s0f1 phc offset 877 s2 freq +640 delay 4542 + phc2sys[3904601.212]: enp175s0f1 phc offset 517 s2 freq +543 delay 4517 + phc2sys[3904601.337]: enp175s0f1 phc offset 189 s2 freq +370 delay 4510 + phc2sys[3904601.462]: enp175s0f1 phc offset -125 s2 freq +113 delay 4554 + phc2sys[3904601.587]: enp175s0f1 phc offset -412 s2 freq -212 delay 4513 + phc2sys[3904601.712]: enp175s0f1 phc offset -693 s2 freq -617 delay 4519 phc2sys[3904601.837]: enp175s0f1 phc offset -878 s2 freq -1009 delay 4515 phc2sys[3904601.962]: enp175s0f1 phc offset -965 s2 freq -1360 delay 4518 phc2sys[3904602.088]: enp175s0f1 phc offset -1048 s2 freq -1732 delay 4510 @@ -394,7 +395,7 @@ Example of output:: ptp4l[809108.055]: rms 401 max 502 freq +912 +/- 659 10. Synchronize local clock on O-DU for sample application or l1 -Application. :: +application. :: ./phc2sys -s enp181s0f0 -w -m -R 8 diff --git a/docs/Sample-Application_fh.rst b/docs/Sample-Application_fh.rst index 3b24a9f..3baec6f 100644 --- a/docs/Sample-Application_fh.rst +++ b/docs/Sample-Application_fh.rst @@ -52,7 +52,7 @@ U-plane packets for UL and DL direction are constructed the same way except for the direction field. Examples of default configurations used with the sample application for -v21.03 release provided below: +v20.04 release provided below: 1 Cell mmWave 100MHz TDD DDDS: ------------------------------ diff --git a/docs/Setup-Configuration_fh.rst b/docs/Setup-Configuration_fh.rst index fa9ac07..7b387b2 100644 --- a/docs/Setup-Configuration_fh.rst +++ b/docs/Setup-Configuration_fh.rst @@ -31,25 +31,42 @@ below. Steps for running the sample application on the O-DU side and 0-RU side are the same, except configuration file options may be different. -.. image:: images/Setup-for-xRAN-Testing.jpg +.. image:: images/Setup-for-O-RAN-Testing.jpg :width: 400 - :alt: Figure 26. Setup for O-RAN Testing + :alt: Figure 27. Setup for O-RAN Testing -Figure 26. Setup for O-RAN Testing +Figure 27. Setup for O-RAN Testing -.. image:: images/Setup-for-xRAN-Testing-with-PHY-and-Configuration-C3.jpg + + +.. image:: images/Setup-for-O-RAN-Testing-with-PHY-and-Configuration-C3.jpg + :width: 400 + :alt: Figure 28. Setup for O-RAN Testing with PHY and Configuration C3 + +Figure 28. Setup for O-RAN Testing with PHY and Configuration C3 + + + +.. image:: images/Setup-for-O-RAN-Testing-with-PHY-and-Configuration-C3-for-Massive-MIMO.jpg :width: 400 - :alt: Figure 27. Setup for O-RAN Testing with PHY and Configuration C3 + :alt: Figure 29. Setup for O-RAN Testing with PHY and Configuration C3 for + +Figure 29. Setup for O-RAN Testing with PHY and Configuration C3 for +Massive MIMO + -Figure 27. Setup for O-RAN Testing with PHY and Configuration C3 A.2 Prerequisites ----------------- -Each server in Figure 26 requires the following: + +Each server in *Figure 27* requires the following: - Wolfpass server according to recommended BOM for FlexRAN such as Intel® Xeon® Skylake Gold 6148 FC-LGA3647 2.4 GHz 27.5 MB 150W 20 - cores (two sockets) + cores (two sockets) or higher + +- Wilson City or Coyote Pass server with Intel® Xeon® Icelake CPU for + Massive-MIMO with L1 pipeline testing - BIOS settings: @@ -164,11 +181,9 @@ ESX*, FreeBSD*, and EFI/EFI2 are located at: .. -https://downloadmirror.intel.com/682037/readme_8_50.txt -(700 series) +https://downloadcenter.intel.com/download/24769 (700 series) -https://downloadmirror.intel.com/709693/readme_3.10.txt -(E810 series) +https://downloadcenter.intel.com/download/29736 (E810 series) PTP Grand Master is required to be available in the network to provide synchronization of both O-DU and RU to GPS time. @@ -177,9 +192,9 @@ The software package includes Linux\* CentOS\* operating system and RT patch according to FlexRAN Reference Solution Cloud-Native Setup document (refer to Table 2). Only real-time HOST is required. -1. Install Intel® C++ Compiler v19.0.3 +1. Install Intel® C++ Compiler v19.0.3 or OneAPI compiler (preferred) -2. Download DPDK v20.11.1 +2. Download DPDK v20.11.3 3. Patch DPDK with FlexRAN BBDev patch as per given release. @@ -262,7 +277,7 @@ to O-RAN Front haul:: ICE_WRITE_REG(hw, QINT_TQCTL(base_queue + i), val_tx); } -5.Build and install DPDK:: +5.Build and install the DPDK:: See https://doc.dpdk.org/guides/prog_guide/build-sdk-meson.html @@ -517,29 +532,29 @@ Install and Configure Sample Application To install and configure the sample application: -1. Set up the environment:: +1. Set up the environment(shown for icc change for icx):: For Skylake and Cascadelake export GTEST_ROOT=pwd/gtest-1.7.0 - export RTE_SDK=pwd/dpdk-20.11.1 + export RTE_SDK=pwd/dpdk-20.11.3 export RTE_TARGET=x86_64-native-linuxapp-icc export DIR_WIRELESS_SDK_ROOT=pwd/wireless_sdk export WIRELESS_SDK_TARGET_ISA=avx512 export SDK_BUILD=build-${WIRELESS_SDK_TARGET_ISA}-icc export DIR_WIRELESS_SDK=${DIR_WIRELESS_SDK_ROOT}/${SDK_BUILD} - export MLOG_DIR=pwd/flexran_l1_sw/libs/mlog - export XRAN_DIR=pwd/flexran_xran + export MLOG_DIR=`pwd`/flexran_l1_sw/libs/mlog + export XRAN_DIR=`pwd`/flexran_xran for Icelake - export GTEST_ROOT=pwd/gtest-1.7.0 - export RTE_SDK=pwd/dpdk-20.11.1 + export GTEST_ROOT=`pwd`/gtest-1.7.0 + export RTE_SDK=`pwd`/dpdk-20.11 export RTE_TARGET=x86_64-native-linuxapp-icc - export DIR_WIRELESS_SDK_ROOT=pwd/wireless_sdk + export DIR_WIRELESS_SDK_ROOT=`pwd`/wireless_sdk export WIRELESS_SDK_TARGET_ISA=snc export SDK_BUILD=build-${WIRELESS_SDK_TARGET_ISA}-icc export DIR_WIRELESS_SDK=${DIR_WIRELESS_SDK_ROOT}/${SDK_BUILD} - export MLOG_DIR=pwd/flexran_l1_sw/libs/mlog - export XRAN_DIR=pwd/flexran_xran + export MLOG_DIR=`pwd`/flexran_l1_sw/libs/mlog + export XRAN_DIR=`pwd`/flexran_xran 2. export FLEXRAN_SDK=${DIR_WIRELESS_SDK}/install Compile mlog library:: @@ -580,23 +595,30 @@ Install and Configure FlexRAN 5G NR L1 Application The 5G NR layer 1 application can be used for executing the scenario for mmWave with either the RU sample application or just the O-DU side. The current release supports the constant configuration of the slot pattern -and RB allocation on the PHY side. +and RB allocation on the PHY side. The build process follows the same +basic steps as for the sample application above and is similar to +compiling 5G NR l1app for mmWave with Front Haul FPGA. Please follow the +general build process in the FlexRAN 5G NR Reference Solution L1 User +Guide (refer to *Table 2*.) (For information only as a FlexRAN binary blob +is delivered to the community) -1. O-RAN library is enabled by default l1 application: +1. O-RAN library is enabled by default l1 application 2. Get the FlexRAN L1 binary from https://github.com/intel/FlexRAN. Look for the l1/bin/nr5g/gnb/l1 folder for the l1app binary and the corresponding phycfg and xrancfg files. 3. Configure the L1app using bin/nr5g/gnb/l1/phycfg_xran.xml and -xrancfg_sub6.xml (or other xml if it is mmwave or massive MIMO). :: +xrancfg_sub6.xml (or other xml if it is mmW or massive MIMO). :: - - oran_e_maintenance_release_v1.0 - + + oran_f_release_v1.0 + 1 - + 25 - + 1 @@ -705,8 +727,13 @@ xrancfg_sub6.xml (or other xml if it is mmwave or massive MIMO). :: 0x8000000000, 96, 0 + 0x0000000000, 96, 0 0 + + 0 + + 0 0 @@ -752,6 +779,9 @@ xrancfg_sub6.xml (or other xml if it is mmwave or massive MIMO). :: 0 0 + + 0 + 1 0 @@ -764,11 +794,19 @@ xrancfg_sub6.xml (or other xml if it is mmwave or massive MIMO). :: 1 + + 0 - 8 + 9 0 + + 0 + + 16 + 6 + 6 1 @@ -817,14 +855,14 @@ xrancfg_sub6.xml (or other xml if it is mmwave or massive MIMO). :: -4. Modify bin/nr5g/gnb/l1/dpdk.sh (change PCIe addresses from VFs). :: +4. Modify l1/bin/nr5g/gnb/l1/dpdk.sh (change PCIe addresses from VFs). :: $RTE_SDK/usertools/dpdk-devbind.py --bind=vfio-pci 0000:21:02.0 $RTE_SDK/usertools/dpdk-devbind.py --bind=vfio-pci 0000:21:02.1 5. Use configuration of test mac per:: - /bin/nr5g/gnb.testmac/cascade_lake-sp/csxsp_mu1_100mhz_mmimo_hton_xran.cfg + l1//bin/nr5g/gnb.testmac/cascade_lake-sp/csxsp_mu1_100mhz_mmimo_hton_xran.cfg (info only N/A) phystart 4 0 40200 TEST_FD, 1002, 1, fd/mu3_100mhz/2/fd_testconfig_tst2.cfg @@ -832,28 +870,23 @@ xrancfg_sub6.xml (or other xml if it is mmwave or massive MIMO). :: 6. To execute l1app with O-DU functionality according to O-RAN Fronthaul specification, enter:: - [root@xran flexran] cd ./bin/nr5g/gnb/l1 + [root@xran flexran] cd ./l1/bin/nr5g/gnb/l1 [root@xran l1]#./l1.sh –xran -where output corresponding L1 is 7. To execute testmac with O-DU functionality according to O-RAN Fronthaul specification, enter:: - [root@xran flexran] cd ./bin/nr5g/gnb/testmac + [root@xran flexran] cd ./l1/bin/nr5g/gnb/testmac -8. To execute test case type:: +8. To execute test case type (info only as file not available):: ./l2.sh --testfile=./cascade_lake-sp/csxsp_mu1_100mhz_mmimo_hton_xran.cfg -where output corresponding to Test MAC:: - - [root@sc12-xran-sub6 testmac]# ./l2.sh --testfile=./cascade_lake-sp/csxsp_mu1_100mhz_mmimo_hton_xran.cfg - Configure FlexRAN 5G NR L1 Application for multiple O-RUs with multiple numerologies ==================================================================================== @@ -883,10 +916,10 @@ Solution L1 User Guide (refer to Table 2.) Look for the l1/bin/nr5g/gnb/l1 folder for the l1app binary and the corresponding phycfg and xrancfg files. -3. Configure the L1app using bin/nr5g/gnb/l1/xrancfg_sub6_mmimo.xml. +3. Configure the L1app using bin/nr5g/gnb/l1/xrancfg_sub6_mmimo.xml.:: - - oran_e_maintenance_release_v1.0< + + oran_f_release_v1.0< 3 @@ -1182,7 +1215,7 @@ Solution L1 User Guide (refer to Table 2.) 0,273,0,14,1,1,1,9,1,0,0 0,273,0,14,1,1,1,9,1,0,0 - + 4. Modify ./bin/nr5g/gnb/l1/dpdk.sh (change PCIe addresses from VFs). :: @@ -1203,6 +1236,7 @@ Solution L1 User Guide (refer to Table 2.) 5. Use configuration of test mac per:: + (Info only as these files not avilable) /bin/nr5g/gnb/testmac/icelake-sp/icxsp_mu1_100mhz_mmimo_64x64_hton_xran.cfg phystart 4 0 100200 TEST_FD, 3370, 3, fd/mu1_100mhz/376/fd_testconfig_tst376.cfg, @@ -1211,18 +1245,17 @@ Solution L1 User Guide (refer to Table 2.) 6. To execute l1app with O-DU functionality according to O-RAN Fronthaul specification, enter:: - [root@xran flexran] cd ./bin/nr5g/gnb/l1 + [root@xran flexran] cd ./l1/bin/nr5g/gnb/l1 ./l1.sh -xranmmimo Radio mode with XRAN - Sub6 100Mhz Massive-MIMO (CatB) + 7. To execute testmac with O-DU functionality according to O-RAN Fronthaul specification, enter:: - [root@xran flexran] cd ./bin/nr5g/gnb/testmac + [root@xran flexran] cd ./l1/bin/nr5g/gnb/testmac 8. To execute test case type:: + (Info only as file not available) ./l2.sh --testfile=./cascade_lake-sp/csxsp_mu1_100mhz_mmimo_hton_xran.cfg -where output corresponding to Test MAC:: - - root@icelake-scs1-1 testmac]# ./l2.sh --testfile=./icelake-sp/icxsp_mu1_100mhz_mmimo_64x64_hton_xran.cfg diff --git a/docs/Transport-Layer-and-ORAN-Fronthaul-Protocol-Implementation_fh.rst b/docs/Transport-Layer-and-ORAN-Fronthaul-Protocol-Implementation_fh.rst index ac53f54..2ac45df 100644 --- a/docs/Transport-Layer-and-ORAN-Fronthaul-Protocol-Implementation_fh.rst +++ b/docs/Transport-Layer-and-ORAN-Fronthaul-Protocol-Implementation_fh.rst @@ -31,9 +31,9 @@ protocol are implemented. Introduction ------------ -Figure 8 presents an overview of the O-RAN Fronthaul process. +The following figure presents an overview of the O-RAN Fronthaul process. -.. image:: images/ORAN-Fronthaul-Process.jpg +.. image:: images/O-RAN-Fronthaul-Process.jpg :width: 600 :alt: Figure 8. O-RAN Fronthaul Process @@ -43,11 +43,12 @@ The O-RAN library provides support for transporting In-band and Quadrature (IQ) samples between the O-DU and O-RU within the O-RAN architecture based on functional split 7.2x. The library defines the O-RAN packet formats to be used to transport radio samples within Front -Haul according to the O-RAN Fronthaul specification. It provides -functionality for generating O-RAN packets, appending IQ samples in the -packet payload, and extracting IQ samples from O-RAN packets. +Haul according to the O-RAN Fronthaul specification. refer to *Table* 2. +It provides functionality for generating O-RAN packets, appending IQ samples +in the packet payload, and extracting IQ samples from O-RAN packets. -Note: The E Miantenance release version of the library supports U-plane and C-plane only. It is ready to be used in the PTP synchronized environment. +Note: The F release version of the library supports U-plane and C-plane only. +M-plane is not supported. It is ready to be used in the PTP synchronized environment. Note: Regarding the clock model and synchronization topology, configurations C1 and C3 of the connection between O-DU and O-RU are the only @@ -80,15 +81,17 @@ Supported Feature Set --------------------- The O-RAN Fronthaul specification defines a list of mandatory -functionality. Not all features defined as Mandatory for O-DU are -currently supported to fully extended. The following tables contain +functionalities. + +Note: Not all features defined as Mandatory for O-DU are +currently supported to a full extension. The following tables contain information on what is available and the level of validation performed for this release. Note. Cells with a red background are listed as mandatory in the specification but not supported in this implementation of O-RAN. -Table 7. ORAN Mandatory and Optional Feature Support +Table 7. O-RAN Mandatory and Optional Feature Support +-----------------+-----------------+-----------+----------------+ | Category | Feature | O-DU | Support | @@ -233,1014 +236,1017 @@ Table 8. Level of Validation Specified as: -- C: Completed code implementation for O-RAN Library - -- I: Integrated into Intel FlexRAN PHY - -- T: Tested end to end with O-RU - -Table 8. Levels of support - -+------------+------------+------------+------------+-----+-----+-----+ -| Category | Item | Status | C | I | T | -+============+============+============+============+=====+=====+=====+ -| General || Radio | NR | N/A | N/A | N/A | -| || access | | | | | -| || technology | | | | | -| || (LTE / NR) | | | | | -| +------------+------------+------------+-----+-----+-----+ -| || Nominal || 15 | Y | Y | N | -| || sub-carrier || /30/120KHz| | | | -| || spacing | | | | | -| +------------+------------+------------+-----+-----+-----+ -| | FFT size || 512/1024 | Y | Y | N | -| | || /2048/4096| | | | -| +------------+------------+------------+-----+-----+-----+ -| || Channel || 5/10 | Y | Y | N | -| || bandwidth || /20/100Mhz| | | | -| +------------+------------+------------+-----+-----+-----+ -| || Number of | 12 | Y | Y | N | -| || Cells | | | | | -| || (Component | | | | | -| || Carriers) | | | | | -| || | | | | | -| +------------+------------+------------+-----+-----+-----+ -| || RU | A | Y | Y | N | -| || category | | | | | -| +------------+------------+------------+-----+-----+-----+ -| | TDD Config || Supported | Y | Y | N | -| | || Flexible | | | | -| +------------+------------+------------+-----+-----+-----+ -| || FDD | Supported | Y | Y | N | -| || Support | | | | | -| +------------+------------+------------+-----+-----+-----+ -| || Tx/Rx | Supported | Y | Y | N | -| || switching | | | | | -| || based on | | | | | -| || 'data | | | | | -| || Direction' | | | | | -| || field of | | | | | -| || C-plane | | | | | -| || message | | | | | -| +------------+------------+------------+-----+-----+-----+ -| || IP version | N/A | N/A | N/A | N/A | -| || for | | | | | -| || Management | | | | | -| || traffic at | | | | | -| || fronthaul | | | | | -| || network | | | | | -| | | | | | | -+------------+-------------------------+------------+-----+-----+-----+ -| PRACH || One Type 3 | Supported | Y | Y | N | -| || message | | | | | -| || for all | | | | | -| || repeated | | | | | -| || PRACH | | | | | -| || preambles | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || Type 3 | 1 | Y | Y | N | -| || message | | | | | -| || per | | | | | -| || repeated | | | | | -| || PRACH | | | | | -| || preambles | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || timeOffset | Supported | Y | Y | N | -| || including | | | | | -| || cpLength | | | | | -| +-------------------------+------------+-----+-----+-----+ -| | Supported | Supported | Y | Y | N | -| +-------------------------+------------+-----+-----+-----+ -| || PRACH | Supported | Y | Y | N | -| || preamble | | | | | -| || format | | | | | -| || index | | | | | -| || number | | | | | -| || (number of | | | | | -| || occasions) | | | | | -| | | | | | | -+------------+-------------------------+------------+-----+-----+-----+ -|| Delay || Network | Supported | Y | Y | N | -|| management|| delay | | | | | -| || determination | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || lls-CU | Supported | Y | Y | N | -| || timing | | | | | -| || advance | | | | | -| || type | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || Non-delay || Not | N | N | N | -| || managed || supported | | | | -| || U-plane | | | | | -| || traffic | | | | | -| | | | | | | -+------------+-------------------------+------------+-----+-----+-----+ -|| C/U-plane || Transport | Ethernet | Y | Y | N | -|| Transport || encapsulation | | | | | -| || (Ethernet IP) | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || Jumbo | Supported | Y | Y | N | -| || frames | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || Transport | eCPRI | Y | Y | N | -| || header | | | | | -| || (eCPRI RoE) | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || IP version | N/A | N/A | N/A | N/A | -| || when | | | | | -| || Transport | | | | | -| || header is | | | | | -| || IP/UDP | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || eCPRI || Not | N | N | N | -| || Concatenation || supported | | | | -| || when | | | | | -| || Transport | | | | | -| || header is | | | | | -| || eCPRI | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || eAxC ID | 4 \* | Y | Y | N | -| || CU_Port_ID | | | | | -| || bitwidth | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || eAxC ID | 4 \* | Y | Y | N | -| || BandSector_ID | | | | | -| || bitwidth | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || eAxC ID | 4 \* | Y | Y | N | -| || CC_ID | | | | | -| || bitwidth | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || eAxC ID | 4 \* | Y | Y | N | -| || RU_Port_ID | | | | | -| || bitwidth | | | | | -| +-------------------------+------------+-----+-----+-----+ -| | Fragmentation | Supported | Y | Y | N | -| +-------------------------+------------+-----+-----+-----+ -| || Transport | N/A | N | N | N | -| || prioritization | | | | | -| || within | | | | | -| || U-plane | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || Separation | Supported | Y | Y | N | -| || of | | | | | -| || C/U-plane | | | | | -| || and | | | | | -| || M-plane | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || Separation || VLAN ID\ | Y | Y | N | -| || of C-plane || and/or | | | | -| || and || eCpri | | | | -| || U-plane || Messagge | | | | -| | || Type | | | | -| +-------------------------+------------+-----+-----+-----+ -| || Max Number | 16 | Y | Y | N | -| || of VLAN | | | | | -| || per | | | | | -| || physical | | | | | -| || port | | | | | -| | | | | | | -+------------+-------------------------+------------+-----+-----+-----+ -|| Reception | Rx_on_time | Supported | Y | Y | N | -|| Window | | | | | | -|| Monitoring| | | | | | -|| (Counters)| | | | | | -| +-------------------------+------------+-----+-----+-----+ -| | Rx_early | Supported | N | N | N | -| +-------------------------+------------+-----+-----+-----+ -| | Rx_late | Supported | N | N | N | -| +-------------------------+------------+-----+-----+-----+ -| | Rx_corrupt | Supported | N | N | N | -| +-------------------------+------------+-----+-----+-----+ -| || Rx_pkt_dupl | Supported | N | N | N | -| +-------------------------+------------+-----+-----+-----+ -| || Total_msgs_rcvd | Supported | Y | N | N | -| | | | | | | -+------------+-------------------------+------------+-----+-----+-----+ -|| || RU || Index and | Y | Y | N | -|| Beam-\ || beamforming || weights | | | | -|| forming || type || | | | | -| +-------------------------+------------+-----+-----+-----+ -| || Beamforming | C-plane | Y | N | N | -| || control | | | | | -| || method | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || Number of || No res- | Y | Y | N | -| || beams || strictions| | | | -| | | | | | | -+------------+-------------------------+------------+-----+-----+-----+ -|| IQ || U-plane | Supported | Y | Y | Y | -|| compre || data | | | | | -| ssion || compression | | | | | -| || method | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || U-plane || BFP: | Y | Y | Y | -| || data IQ || 8,9,12,14 | | | | -| || bitwidth || bits | | | | -| || (Before / || | | | | -| || After || | | | | -| || compression) || | | | | -| +-------------------------+------------+-----+-----+-----+ -| || Static | Supported | N | N | N | -| || configuration | | | | | -| || of U-plane | | | | | -| || IQ format | | | | | -| || and | | | | | -| || compression | | | | | -| || header | | | | | -| | | | | | | -+------------+-------------------------+------------+-----+-----+-----+ -|| eCPRI || ecpriVersion | 001b | Y | Y | Y | -|| Header || | | | | | -|| Format || | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || ecpriReserved | Supported | Y | Y | Y | -| +-------------------------+------------+-----+-----+-----+ -| || ecpriCon || Not | N | N | N | -| | catenation || supported | | | | -| +------------+------------+------------+-----+-----+-----+ -| || ecpri\ | U-plane | Supported | Y | Y | Y | -| || Message | | | | | | -| | +------------+------------+-----+-----+-----+ -| | | C-plane | Supported | Y | Y | Y | -| | +------------+------------+-----+-----+-----+ -| | || Delay | Supported | Y | Y | Y | -| | || measure | | | | | -| | | ment | | | | | -| +------------+------------+------------+-----+-----+-----+ -| || ecpri\ | Supported | Y | Y | Y | -| || Payload | | | | | -| || (payload | | | | | -| || size in | | | | | -| || bytes) | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || ecpriRtcid | Supported | Y | Y | Y | -| || /ecpriPcid | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || ecpri | Supported | Y | Y | Y | -| || Seqid: | | | | | -| || Sequence | | | | | -| || ID | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || ecpri\ | Supported | Y | Y | Y | -| || Seqid: | | | | | -| || E bit | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || ecpri\ || Not | N | N | N | -| || Seqid: || supported | | | | -| || Sub\ | | | | | -| || sequence | | | | | -| || ID | | | | | -| | | | | | | -+------------+------------+------------+------------+-----+-----+-----+ -|| C-plane || Section || Not | N | N | N | -|| Type || Type 0 || supported | | | | -| +-------------------------+------------+-----+-----+-----+ -| || Section | Supported | Y | Y | Y | -| || Type 1 | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || Section | Supported | Y | Y | Y | -| || Type 3 | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || Section || Not | N | N | N | -| || Type 5 || supported | | | | -| +-------------------------+------------+-----+-----+-----+ -| || Section || Not | N | N | N | -| || Type 6 || supported | | | | -| +-------------------------+------------+-----+-----+-----+ -| || Section || Not | N | N | N | -| || Type 7 || supported | | | | -| | | | | | | -+------------+------------+------------+------------+-----+-----+-----+ -|| C-plane || *Coding*\ || data\ | Supported | Y | Y | N | -|| Packet || *of Infor*|| Direction | | | | | -|| Format | *mation* || (data | | | | | -| || *Elements*|| direction | | | | | -| || *Appli* || (gNB | | | | | -| | *cation* || Tx/Rx)) | | | | | -| || *Layer,*\ || | | | | | -| || *Common* || | | | | | -| | +------------+------------+-----+-----+-----+ -| | || payload || 001b | Y | Y | N | -| | | Version || | | | | -| | || (payload || | | | | -| | || version) || | | | | -| | +------------+------------+-----+-----+-----+ -| | || filter | Supported | Y | Y | N | -| | | Index | | | | | -| | || (filter | | | | | -| | || index) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || frameId | Supported | Y | Y | N | -| | || (frame | | | | | -| | || iden | | | | | -| | | tifier) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || subframeId| Supported | Y | Y | N | -| | || (subframe | | | | | -| | || iden | | | | | -| | | tifier) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || slotId | Supported | Y | Y | N | -| | || (slot | | | | | -| | || iden | | | | | -| | | tifier) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || start\ | Supported | Y | Y | N | -| | || Symbolid | | | | | -| | || (start | | | | | -| | || symbol | | | | | -| | || iden | | | | | -| | | tifier) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || number || up to the | Y | Y | N | -| | || Ofsections|| maximum | | | | -| | || (number of|| number of | | | | -| | || sections) || PRBs | | | | -| | +------------+------------+-----+-----+-----+ -| | || section\ || 1 and 3 | Y | Y | N | -| | || Type || | | | | -| | || (section || | | | | -| | || type) || | | | | -| | +------------+------------+-----+-----+-----+ -| | || udCompHdr | Supported | Y | Y | N | -| | || (user data| | | | | -| | || com | | | | | -| | | pression | | | | | -| | || header) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || number\ || Not | N | N | N | -| | || OfUEs || supported | | | | -| | || (number Of| | | | | -| | || UEs) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || timeOffset| Supported | Y | Y | N | -| | || (time | | | | | -| | || offset) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || frame\ | mu=0,1,3 | Y | Y | N | -| | || Structure | | | | | -| | || (frame | | | | | -| | || structure)| | | | | -| | +------------+------------+-----+-----+-----+ -| | || cpLength | Supported | Y | Y | N | -| | || (cyclic | | | | | -| | || prefix | | | | | -| | || length) | | | | | -| +------------+------------+------------+-----+-----+-----+ -| || *Coding* || sectionId | Supported | Y | Y | N | -| || *of Infor*|| (section | | | | | -| | *mation* || iden | | | | | -| || *Elements*| tifier) | | | | | -| || *Ap* | | | | | | -| | *plication*| | | | | | -| || *Layer,* | | | | | | -| || *Sections*| | | | | | -| | +------------+------------+-----+-----+-----+ -| | || rb | 0 | Y | Y | N | -| | || (resource | | | | | -| | || block | | | | | -| | || indicator)| | | | | -| | +------------+------------+-----+-----+-----+ -| | || symInc | 0 or 1 | Y | Y | N | -| | || (symbol | | | | | -| | || number | | | | | -| | || increment | | | | | -| | || command) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || startPrbc | Supported | Y | Y | N | -| | || (starting | | | | | -| | || PRB of | | | | | -| | || control | | | | | -| | || section) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || reMask | Supported | Y | Y | N | -| | || (resource | | | | | -| | || element | | | | | -| | || mask) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || numPrbc | Supported | Y | Y | N | -| | || (number of| | | | | -| | || contiguous| | | | | -| | || PRBs per | | | | | -| | || control | | | | | -| | || section) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || numSymbol | Supported | Y | Y | N | -| | || (number of| | | | | -| | || symbols) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || ef | Supported | Y | Y | N | -| | || (extension| | | | | -| | || flag) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || beamId | Support | Y | Y | N | -| | || (beam | | | | | -| | || iden | | | | | -| | | tifier) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || ueId (UE || Not | N | N | N | -| | || iden || supported | | | | -| | | tifier) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || freqOffset| Supported | Y | Y | N | -| | || (frequency| | | | | -| | || offset) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || regulari || Not | N | N | N | -| | | zation\ || supported | | | | -| | || Factor || | | | | -| | || (regulari | | | | | -| | | zation | | | | | -| | || Factor) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || ciIsample,|| Not | N | N | N | -| | || ciQsample || supported | | | | -| | || (channel || | | | | -| | || infor | | | | | -| | | mation | | | | | -| | || I and Q | | | | | -| | || values) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || laaMsgType|| Not | N | N | N | -| | || (LAA || supported | | | | -| | || message || | | | | -| | || type) || | | | | -| | +------------+------------+-----+-----+-----+ -| | || laaMsgLen || Not | N | N | N | -| | || (LAA || supported | | | | -| | || message | | | | | -| | || length) | | | | | -| | +------------+------------+-----+-----+-----+ -| | | lbtHandle || Not | N | N | N | -| | | || supported | | | | -| | +------------+------------+-----+-----+-----+ -| | || lbtDefer || Not | N | N | N | -| | || Factor || supported | | | | -| | || (listen || | | | | -| | || before || | | | | -| | || talk || | | | | -| | || defer || | | | | -| | || factor) || | | | | -| | +------------+------------+-----+-----+-----+ -| | || lbtBack || Not | N | N | N | -| | || offCounter|| supported | | | | -| | || (listen || | | | | -| | || before || | | | | -| | || talk || | | | | -| | || backoff || | | | | -| | || counter) || | | | | -| | +------------+------------+-----+-----+-----+ -| | || lbtOffset || Not | N | N | N | -| | || (listen- || supported | | | | -| | || before | | | | | -| | || talk || | | | | -| | || offset) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || MCOT || Not | N | N | N | -| | || (maximum || supported | | | | -| | || channel | | | | | -| | || occupancy | | | | | -| | || time) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || lbtMode || Not | N | N | N | -| | || (LBT Mode)|| supported | | | | -| | +------------+------------+-----+-----+-----+ -| | || lbt || Not | N | N | N | -| | | PdschRes || supported | | | | -| | || (LBT PDSCH|| | | | | -| | || Result) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || sfStatus || Not | N | N | N | -| | || (subframe || supported | | | | -| | || status) || | | | | -| | +------------+------------+-----+-----+-----+ -| | || lbtDrsRes || Not | N | N | N | -| | || (LBT DRS || supported | | | | -| | || Result) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || initial || Not | N | N | N | -| | | PartialSF || supported | | | | -| | || (Initial | | | | | -| | | partial | | | | | -| | | SF) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || lbtBufErr || Not | N | N | N | -| | || (LBT || supported | | | | -| | | Buffer | | | | | -| | || Error) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || sfnSf || Not | N | N | N | -| | || (SFN/SF || supported | | | | -| | | End) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || lbt || Not | N | N | N | -| | || CWConfig_H|| supported | | | | -| | || (HARQ | | | | | -| | || Parameters| | | | | -| | || for | | | | | -| | || Congestion| | | | | -| | || Window | | | | | -| | || mana | | | | | -| | | gement) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || lbt || Not | N | N | N | -| | || CWConfig_T|| supported | | | | -| | || (TB | | | | | -| | | Parameters | | | | | -| | || for | | | | | -| | || Congestion| | | | | -| | || Window | | | | | -| | || mana | | | | | -| | | gement) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || lbtTr || Not | N | N | N | -| | | afficClass || supported | | | | -| | || (Traffic | | | | | -| | || class | | | | | -| | || priority | | | | | -| | || for | | | | | -| | || Congestion| | | | | -| | || Window | | | | | -| | || mana | | | | | -| | | gement) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || lbtCWR_Rst|| Not | N | N | N | -| | || (Noti || supported | | | | -| | | cation | | | | | -| | || about | | | | | -| | || packet | | | | | -| | || reception | | | | | -| | || successful| | | | | -| | || or not) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || reserved | 0 | N | N | N | -| | || (reserved | | | | | -| | || for future| | | | | -| | || use) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || *Section* |   |   |   |   | -| | || *Exten* | | | | | -| | | *sion* | | | | | -| | || *Commands*| | | | | -| | +------------+------------+-----+-----+-----+ -| | || extType | Supported | Y | Y | N | -| | || (extension| | | | | -| | || type) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || ef | Supported | Y | Y | N | -| | | (extension | | | | | -| | || flag) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || extLen | Supported | Y | Y | N | -| | || (extension| | | | | -| | || length) | | | | | -| +------------+------------+------------+-----+-----+-----+ -| || Coding of |   |   |   |   | | -| || Infor | | | | | | -| | mation | | | | | | -| || Elements –| | | | | | -| || Appli | | | | | | -| | cation | | | | | | -| || Layer, | | | | | | -| || Section | | | | | | -| || Exten | | | | | | -| | sions | | | | | | -| +------------+------------+------------+-----+-----+-----+ -| || | | | | | | -| || *Ext*\ || bfw | Supported | Y | Y | N | -| || *Type=1:* || CompHdr | | | | | -| || *Beam* || (beam\ | | | | | -| || *forming* | forming | | | | | -| || *Weights* || weight | | | | | -| || *Exten\* || compre\ | | | | | -| | *sion* | ssion | | | | | -| || *Type* || header) | | | | | -| || +------------+------------+-----+-----+-----+ -| || || | | | | | -| || || bf | Supported | Y | Y | N | -| || | wCompParam | | | | | -| || || (beam | | | | | -| || || forming | | | | | -| || || weight | | | | | -| || || compre\ | | | | | -| || | ssion | | | | | -| || || parameter)| | | | | -| || +------------+------------+-----+-----+-----+ -| || || bfwl | Supported | Y | Y | N | -| || || (beam | | | | | -| || | forming | | | | | -| || || weight | | | | | -| || || in-phase | | | | | -| || || value) | | | | | -| || +------------+------------+-----+-----+-----+ -| || || bfwQ | Supported | Y | Y | N | -| || || (beam | | | | | -| || | forming | | | | | -| || || weight | | | | | -| || || quadrature| | | | | -| || || value) | | | | | -| +------------+------------+------------+-----+-----+-----+ -| || || bfaCompHdr| Supported | Y | N | N | -| || *ExtType*\|| | | | | | -| || *=2:* || (beam\ | | | | | -| || *Beam* | forming | | | | | -| | *forming* || attributes| | | | | -| || *Attribu* || compre | | | | | -| | *tes* | ssion | | | | | -| || *Exten* || header) | | | | | -| || *sion* | | | | | | -| || *Type* | | | | | | -| || +------------+------------+-----+-----+-----+ -| || || bfAzPt | Supported | Y | N | N | -| || || (beam | | | | | -| || | forming | | | | | -| || || azimuth | | | | | -| || || pointing | | | | | -| || || parameter)| | | | | -| || +------------+------------+-----+-----+-----+ -| || || bfZePt | Supported | Y | N | N | -| || || (beam | | | | | -| || | forming | | | | | -| || || zenith | | | | | -| || || pointing | | | | | -| || || parameter)| | | | | -| || +------------+------------+-----+-----+-----+ -| || || bfAz3dd | Supported | Y | N | N | -| || || (beam | | | | | -| || | forming | | | | | -| || || azimuth | | | | | -| || || beamwidth | | | | | -| || || parameter)| | | | | -| || +------------+------------+-----+-----+-----+ -| || || bfZe3dd | Supported | Y | N | N | -| || || (beam | | | | | -| || | forming | | | | | -| || || zenith | | | | | -| || || beamwidth | | | | | -| || || parameter)| | | | | -| || +------------+------------+-----+-----+-----+ -| || || bfAzSl | Supported | Y | N | N | -| || || (beam | | | | | -| || | forming | | | | | -| || || azimuth | | | | | -| || || sidelobe | | | | | -| || || parameter)| | | | | -| || +------------+------------+-----+-----+-----+ -| || || bfZeSl | Supported | Y | N | N | -| || || (beam | | | | | -| || | forming | | | | | -| || || zenith | | | | | -| || || sidelobe | | | | | -| || || parameter)| | | | | -| || +------------+------------+-----+-----+-----+ -| || || zero- | Supported | Y | N | N | -| || | padding | | | | | -| +------------+------------+------------+-----+-----+-----+ -| || || code\ | Supported | Y | N | N | -| || *ExtType* || bookIndex | | | | | -| || *=3:* || | | | | | -| || *DL* || (precoder | | | | | -| || *Preco* || codebook | | | | | -| | *ding* || | | | | | -| || *Exten* || used for | | | | | -| | *sion* || trans | | | | | -| || *Type* | mission | | | | | -| | | | | | | | -| || +------------+------------+-----+-----+-----+ -| || || layerID | Supported | Y | N | N | -| || || (Layer ID | | | | | -| || || for DL | | | | | -| || || trans | | | | | -| || | mission) | | | | | -| || +------------+------------+-----+-----+-----+ -| || || txScheme | Supported | Y | N | N | -| || || (trans | | | | | -| || | mission | | | | | -| || || scheme) | | | | | -| || +------------+------------+-----+-----+-----+ -| || || numLayers | Supported | Y | N | N | -| || || (number of| | | | | -| || || layers | | | | | -| || || used for | | | | | -| || || DL | | | | | -| || || trans | | | | | -| || | mission) | | | | | -| || +------------+------------+-----+-----+-----+ -| || || crsReMask | Supported | Y | N | N | -| || || (CRS | | | | | -| || || resource | | | | | -| || || element | | | | | -| || || mask) | | | | | -| || +------------+------------+-----+-----+-----+ -| | || crs\ | Supported | Y | N | N | -| | || SyumINum | | | | | -| | || (CRS | | | | | -| | || symbol | | | | | -| | || number | | | | | -| | || indi | | | | | -| | | cation) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || crsShift | Supported | Y | N | N | -| | || (crsShift | | | | | -| | || used for | | | | | -| | || DL | | | | | -| | || trans | | | | | -| | | mission) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || beamIdAP1 | Supported | Y | N | N | -| | || (beam id | | | | | -| | || to be used| | | | | -| | || for | | | | | -| | || antenna | | | | | -| | || port 1) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || beamIdAP2 | Supported | Y | N | N | -| | || (beam id | | | | | -| | || to be used| | | | | -| | || for | | | | | -| | || antenna | | | | | -| | || port 2) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || beamIdAP3 | Supported | Y | N | N | -| | || (beam id | | | | | -| | || to be used| | | | | -| | || for | | | | | -| | || antenna | | | | | -| | || port 3) | | | | | -| | | | | | | | -| +------------+------------+------------+-----+-----+-----+ -| | || csf || Supported | Y | Y | N | -| || *ExtType*\|| (cons || | | | | -| || *=4:* | tellation || | | | | -| || *Modula* || shift | | | | | -| | *tion* || flag) | | | | | -| || *Compre* || | | | | | -| | *ssion* || | | | | | -| || *Parame* || | | | | | -| | *ters* || | | | | | -| || *Exten* || | | | | | -| | *sion* | | | | | | -| || *Type* || | | | | | -| | +------------+------------+-----+-----+-----+ -| | || mod || Supported | Y | Y | N | -| | || CompScaler|| | | | | -| | || ( || | | | | -| | || modulation|| | | | | -| | || compre || | | | | -| | | ssion || | | | | -| | || scaler || | | | | -| | | value) || | | | | -| +------------+------------+------------+-----+-----+-----+ -| || || mcScale\ || Supported | Y | N | N | -| || *ExtType*\|| ReMask || | | | | -| || *=5:* || ( || | | | | -| || *Modula* || modulation|| | | | | -| | *tion* || compre || | | | | -| || *Compre* | ssion || | | | | -| | *ssion* || power || | | | | -| || *Additio* || RE || | | | | -| || *Parame* || mask) || | | | | -| || *ters* | || | | | | -| || *Exten* || | | | | | -| | *sion* || | | | | | -| || Type* | || | | | | -| | +------------+------------+-----+-----+-----+ -| | || csf || Supported | Y | N | N | -| | || (cons || | | | | -| | | tellation || | | | | -| | || shift || | | | | -| | || flag) || | | | | -| | +------------+------------+-----+-----+-----+ -| | || mcScale\ | Supported | Y | N | N | -| | || Offset | | | | | -| | || (scaling | | | | | -| | || value for | | | | | -| | || modulation| | | | | -| | || compre | | | | | -| | | ssion) | | | | | -| +------------+------------+------------+-----+-----+-----+ -| || *E* || rbgSize | Supported | Y | N | N | -| | *xtType=6:*|| (resource | | | | | -| || *Non-con* || block | | | | | -| | *tiguous* || group | | | | | -| || *PRB* || size) | | | | | -| || *alloca* | | | | | | -| | *tion in* | | | | | | -| || *time and*| | | | | | -| || *frequen* | | | | | | -| | *cy domain*| | | | | | -| | +------------+------------+-----+-----+-----+ -| | || rbgMask | Supported | Y | N | N | -| | || (resource | | | | | -| | || block | | | | | -| | || group bit | | | | | -| | || mask) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || symbol\ | Supported | Y | N | N | -| | || Mask | | | | | -| | || (symbol | | | | | -| | || bit mask) | | | | | -| +------------+------------+------------+-----+-----+-----+ -| || *Ext* || beam | Supported | Y | N | N | -| | *Type=10:* || GroupType | | | | | -| || *Section* | | | | | | -| || *des\* | | | | | | -| | *cription* | | | | | | -| || *for gro\*| | | | | | -| | *up* | | | | | | -| || *configu\*| | | | | | -| | *ration of*| | | | | | -| || *multiple*| | | | | | -| || *ports* | | | | | | -| | | | | | | | -| | +------------+------------+-----+-----+-----+ -| | | numPortc | Supported | Y | N | N | -| | | | | | | | -| +------------+------------+------------+-----+-----+-----+ -| || *Ext* || b | Supported | Y | Y | N | -| | *Type=11:* | fwCompHdr | | | | | -| || *Flexible*|| (beam | | | | | -| || *Beam* | forming | | | | | -| | *forming* || weight | | | | | -| || *Weights* || compre | | | | | -| || *Exten* | ssion | | | | | -| | *sion* | | | | | | -| || *Type* || header) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || bfw | Supported | Y | Y | N | -| | || CompParam | | | | | -| | || for PRB | | | | | -| | || bundle x | | | | | -| | || (beam | | | | | -| | | forming | | | | | -| | || weight | | | | | -| | || compre | | | | | -| | | ssion | | | | | -| | || parameter)| | | | | -| | +------------+------------+-----+-----+-----+ -| | || numBund\ | Supported | Y | Y | N | -| | | Prb | | | | | -| | || (Number | | | | | -| | || of | | | | | -| | || bundled | | | | | -| | || PRBs per | | | | | -| | || beam | | | | | -| | | forming | | | | | -| | || weights) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || bfwI | Supported | Y | Y | N | -| | || (beam | | | | | -| | | forming | | | | | -| | || weight | | | | | -| | || in-phase | | | | | -| | || value) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || bfwQ | Supported | Y | Y | N | -| | || (beam | | | | | -| | | forming | | | | | -| | || weight | | | | | -| | || quadra | | | | | -| | | ture | | | | | -| | || value) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || disable\ | Supported | Y | Y | N | -| | || BFWs | | | | | -| | || (disable | | | | | -| | || beam | | | | | -| | | forming | | | | | -| | || weights) | | | | | -| | +------------+------------+-----+-----+-----+ -| | || RAD | Supported | Y | Y | N | -| | || (Reset | | | | | -| | || After PRB | | | | | -| | || Discon | | | | | -| | | tinuity) | | | | | -| | | | | | | | -+------------+------------+------------+------------+-----+-----+-----+ -|| U-plane || data\ | Supported | Y | Y | Y | -|| Packet || Direction | | | | | -|| Format || (data | | | | | -| || direction | | | | | -| || (gNB | | | | | -| || Tx/Rx)) | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || payload\ | 001b | Y | Y | Y | -| || Version | | | | | -| || (payload | | | | | -| || version) | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || filter\ | Supported | Y | Y | Y | -| || Index | | | | | -| || (filter | | | | | -| || index) | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || frameId | Supported | Y | Y | Y | -| || (frame | | | | | -| || iden | | | | | -| | tifier) | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || subframeId | Supported | Y | Y | Y | -| || (subframe | | | | | -| || iden | | | | | -| | tifier) | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || slotId | Supported | Y | Y | Y | -| || (slot | | | | | -| || iden | | | | | -| | tifier) | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || symbolId | Supported | Y | Y | Y | -| || (symbol | | | | | -| || iden | | | | | -| | tifier) | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || sectionId | Supported | Y | Y | Y | -| || (section | | | | | -| || iden | | | | | -| | tifier) | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || rb | 0 | Y | Y | Y | -| || (resource | | | | | -| || block | | | | | -| || indicator) | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || symInc | 0 | Y | Y | Y | -| || (symbol | | | | | -| || number | | | | | -| || increment | | | | | -| || command) | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || startPrbu | Supported | Y | Y | Y | -| || (startingPRB | | | | | -| || of user | | | | | -| || plane | | | | | -| || section) | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || numPrbu | Supported | Y | Y | Y | -| || (number of | | | | | -| || PRBs per | | | | | -| || user plane | | | | | -| || section) | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || udCompHdr | Supported | Y | Y | N | -| || (user data | | | | | -| || com | | | | | -| | pression | | | | | -| || header) | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || reserved | 0 | Y | Y | Y | -| || (reserved | | | | | -| || for future | | | | | -| || use) | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || udCompParam | Supported | Y | Y | N | -| || (user data | | | | | -| || compre | | | | | -| | ssion | | | | | -| || parameter) | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || iSample | 16 | Y | Y | Y | -| || (in-phase | | | | | -| | sample) | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || qSample | 16 | Y | Y | Y | -| || ( | | | | | -| | quadrature | | | | | -| | sample) | | | | | -| | | | | | | -+------------+-------------------------+------------+-----+-----+-----+ -| S-plane || Topology | Supported | N | N | N | -| || confi | | | | | -| | guration: | | | | | -| || C1 | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || Topology | Supported | N | N | N | -| || confi | | | | | -| | guration: | | | | | -| || C2 | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || Topology | Supported | Y | Y | Y | -| || confi | | | | | -| | guration: | | | | | -| || C3 | | | | | -| +-------------------------+------------+-----+-----+-----+ -| || Topology | Supported | N | N | N | -| || confi | | | | | -| | guration: | | | | | -| || C4 | | | | | -| | | | | | | -+ +------------+------------+------------+-----+-----+-----+ -| | PTP || Full | Supported | Y | Y | N | -| | || Timing | | | | | -| | || Support | | | | | -| | || (G.8275.1)| | | | | -| | | | | | | | -+------------+------------+------------+------------+-----+-----+-----+ -| M-plane |   |   || Not | N | N | N | -| | | || supported | | | | -| | | | | | | | -+------------+------------+------------+------------+-----+-----+-----+ +- **C**: Completed code implementation for O-RAN Library + +- **I**: Integrated into Intel FlexRAN PHY + +- **T**: Tested end to end with O-RU + +Table 8. Levels of Validation + ++------------+------------+------------+-----------------+-----+-----+-----+ +| Category | Item | Status | C | I | T | ++============+============+============+=================+=====+=====+=====+ +| General || Radio | NR/LTE | N/A | N/A | N/A | +| || access | | | | | +| || technology | | | | | +| || (LTE / NR) | | | | | +| +------------+------------+-----------------+-----+-----+-----+ +| || Nominal || 15 | Y | Y | N | +| || sub-carrier || /30/120KHz | | | | +| || spacing | | | | | +| +------------+------------+-----------------+-----+-----+-----+ +| | FFT size || 512/1024 | Y | Y | N | +| | || /2048/4096 | | | | +| +------------+------------+-----------------+-----+-----+-----+ +| || Channel || 5/10 | Y | Y | N | +| || bandwidth || /20/100Mhz | | | | +| +------------+------------+-----------------+-----+-----+-----+ +| || Number of | 12 | Y | Y | N | +| || Cells | | | | | +| || (Component | | | | | +| || Carriers) | | | | | +| || | | | | | +| +------------+------------+-----------------+-----+-----+-----+ +| || RU | A, B | Y | Y | N | +| || category | | | | | +| +------------+------------+-----------------+-----+-----+-----+ +| | TDD Config || Supported | Y | Y | N | +| | || /Flexible | | | | +| +------------+------------+-----------------+-----+-----+-----+ +| || FDD | Supported | Y | Y | N | +| || Support | | | | | +| +------------+------------+-----------------+-----+-----+-----+ +| || Tx/Rx | Supported | Y | Y | N | +| || switching | | | | | +| || based on | | | | | +| || 'data | | | | | +| || Direction' | | | | | +| || field of | | | | | +| || C-plane | | | | | +| || message | | | | | +| +------------+------------+-----------------+-----+-----+-----+ +| || IP version | N/A | N/A | N/A | N/A | +| || for | | | | | +| || Management | | | | | +| || traffic at | | | | | +| || fronthaul | | | | | +| || network | | | | | +| | | | | | | ++------------+-------------------------+-----------------+-----+-----+-----+ +| PRACH || One Type 3 | Supported | Y | Y | N | +| || message | | | | | +| || for all | | | | | +| || repeated | | | | | +| || PRACH | | | | | +| || preambles | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || Type 3 | 1 | Y | Y | N | +| || message | | | | | +| || per | | | | | +| || repeated | | | | | +| || PRACH | | | | | +| || preambles | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || timeOffset | Supported | Y | Y | N | +| || including | | | | | +| || cpLength | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| | Supported | Supported | Y | Y | N | +| +-------------------------+-----------------+-----+-----+-----+ +| || PRACH | Supported | Y | Y | N | +| || preamble | | | | | +| || format/ | | | | | +| || index | | | | | +| || number | | | | | +| || (number of | | | | | +| || occasions) | | | | | +| | | | | | | ++------------+-------------------------+-----------------+-----+-----+-----+ +|| Delay || Network | Supported | Y | Y | N | +|| management|| delay | | | | | +| || determination | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || lls-CU | Supported | Y | Y | N | +| || timing | | | | | +| || advance | | | | | +| || type | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || Non-delay || Not | N | N | N | +| || managed || supported | | | | +| || U-plane | | | | | +| || traffic | | | | | +| | | | | | | ++------------+-------------------------+-----------------+-----+-----+-----+ +|| C/U-plane || Transport | Ethernet | Y | Y | N | +|| Transport || encapsulation | | | | | +| || (Ethernet/IP) | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || Jumbo | Supported | Y | Y | N | +| || frames | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || Transport | eCPRI | Y | Y | N | +| || header | | | | | +| || (eCPRI/RoE) | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || IP version | N/A | N/A | N/A | N/A | +| || when | | | | | +| || Transport | | | | | +| || header is | | | | | +| || IP/UDP | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || eCPRI || Not | N | N | N | +| || Concatenation || supported | | | | +| || when | | | | | +| || Transport | | | | | +| || header is | | | | | +| || eCPRI | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || eAxC ID | 4 \* | Y | Y | N | +| || CU_Port_ID | | | | | +| || bitwidth | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || eAxC ID | 4 \* | Y | Y | N | +| || BandSector_ID | | | | | +| || bitwidth | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || eAxC ID | 4 \* | Y | Y | N | +| || CC_ID | | | | | +| || bitwidth | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || eAxC ID | 4 \* | Y | Y | N | +| || RU_Port_ID | | | | | +| || bitwidth | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| | Fragmentation | Supported | Y | Y | N | +| +-------------------------+-----------------+-----+-----+-----+ +| || Transport | N/A | N | N | N | +| || prioritization | | | | | +| || within | | | | | +| || U-plane | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || Separation | Supported | Y | Y | N | +| || of | | | | | +| || C/U-plane | | | | | +| || and | | | | | +| || M-plane | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || Separation || VLAN ID | Y | Y | N | +| || of C-plane || | | | | +| || and || | | | | +| || U-plane || | | | | +| | || | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || Max Number | 16 | Y | Y | N | +| || of VLAN | | | | | +| || per | | | | | +| || physical | | | | | +| || port | | | | | +| | | | | | | ++------------+-------------------------+-----------------+-----+-----+-----+ +|| Reception | Rx_on_time | Supported | Y | Y | N | +|| Window | | | | | | +|| Monitoring| | | | | | +|| (Counters)| | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| | Rx_early | Supported | N | N | N | +| +-------------------------+-----------------+-----+-----+-----+ +| | Rx_late | Supported | N | N | N | +| +-------------------------+-----------------+-----+-----+-----+ +| | Rx_corrupt | Supported | N | N | N | +| +-------------------------+-----------------+-----+-----+-----+ +| || Rx_pkt_dupl | Supported | N | N | N | +| +-------------------------+-----------------+-----+-----+-----+ +| || Total_msgs_rcvd | Supported | Y | N | N | +| | | | | | | ++------------+-------------------------+-----------------+-----+-----+-----+ +|| || RU || Index and | Y | Y | N | +|| Beam-\ || beamforming || weights | | | | +|| forming || type || | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || Beamforming | C-plane | Y | N | N | +| || control | | | | | +| || method | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || Number of || No res- | Y | Y | N | +| || beams || strictions | | | | +| | | | | | | ++------------+-------------------------+-----------------+-----+-----+-----+ +|| IQ || U-plane | Supported | Y | Y | Y | +|| compre || data | | | | | +| ssion || compression | | | | | +| || method | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || U-plane || BFP: | Y | Y | Y | +| || data IQ || 8,9,12,14 | | | | +| || bitwidth || bits | | | | +| || (Before / || | | | | +| || After || Modulation | | | | +| || compression) || compression: | | | | +| || || 1,2,3,4 bits | | | | +| || || | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || Static | Supported | N | N | N | +| || configuration | | | | | +| || of U-plane | | | | | +| || IQ format | | | | | +| || and | | | | | +| || compression | | | | | +| || header | | | | | +| | | | | | | ++------------+-------------------------+-----------------+-----+-----+-----+ +|| eCPRI || ecpriVersion | 001b | Y | Y | Y | +|| Header || | | | | | +|| Format || | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || ecpriReserved | Supported | Y | Y | Y | +| +-------------------------+-----------------+-----+-----+-----+ +| || ecpriCon || Not | N | N | N | +| | catenation || supported | | | | +| +------------+------------+-----------------+-----+-----+-----+ +| || ecpri\ | U-plane | Supported | Y | Y | Y | +| || Message | | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | | C-plane | Supported | Y | Y | Y | +| | +------------+-----------------+-----+-----+-----+ +| | || Delay | Supported | Y | Y | Y | +| | || measure | | | | | +| | | ment | | | | | +| +------------+------------+-----------------+-----+-----+-----+ +| || ecpri | Supported | Y | Y | Y | +| || Payload | | | | | +| || (payload | | | | | +| || size in | | | | | +| || bytes) | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || ecpriRtcid | Supported | Y | Y | Y | +| || /ecpriPcid | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || ecpri | Supported | Y | Y | Y | +| || Seqid: | | | | | +| || Sequence | | | | | +| || ID | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || ecpri\ | Supported | Y | Y | Y | +| || Seqid: | | | | | +| || E bit | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || ecpri\ || Not | N | N | N | +| || Seqid: || supported | | | | +| || Sub\ | | | | | +| || sequence | | | | | +| || ID | | | | | +| | | | | | | ++------------+------------+------------+-----------------+-----+-----+-----+ +|| C-plane || Section || Not | N | N | N | +|| Type || Type 0 || supported | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || Section | Supported | Y | Y | Y | +| || Type 1 | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || Section | Supported | Y | Y | Y | +| || Type 3 | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || Section || Not | N | N | N | +| || Type 5 || supported | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || Section || Not | N | N | N | +| || Type 6 || supported | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || Section || Not | N | N | N | +| || Type 7 || supported | | | | +| | | | | | | ++------------+------------+------------+-----------------+-----+-----+-----+ +|| C-plane || *Coding*\ || data\ | Supported | Y | Y | N | +|| Packet || *of Infor*|| Direction | | | | | +|| Format | *mation* || (data | | | | | +| || *Elements*|| direction | | | | | +| || *Appli* || (gNB | | | | | +| | *cation* || Tx/Rx)) | | | | | +| || *Layer,*\ || | | | | | +| || *Common* || | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || payload || 001b | Y | Y | N | +| | | Version || | | | | +| | || (payload || | | | | +| | || version) || | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || filter | Supported | Y | Y | N | +| | | Index | | | | | +| | || (filter | | | | | +| | || index) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || frameId | Supported | Y | Y | N | +| | || (frame | | | | | +| | || iden | | | | | +| | | tifier) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || subframeId| Supported | Y | Y | N | +| | || (subframe | | | | | +| | || iden | | | | | +| | | tifier) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || slotId | Supported | Y | Y | N | +| | || (slot | | | | | +| | || iden | | | | | +| | | tifier) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || start | Supported | Y | Y | N | +| | || Symbolid | | | | | +| | || (start | | | | | +| | || symbol | | | | | +| | || iden | | | | | +| | | tifier) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || number || up to the | Y | Y | N | +| | || Ofsections|| maximum | | | | +| | || (number of|| number of | | | | +| | || sections) || PRBs | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || section || 1 and 3 | Y | Y | N | +| | || Type || | | | | +| | || (section || | | | | +| | || type) || | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || udCompHdr | Supported | Y | Y | N | +| | || (user data| | | | | +| | || com | | | | | +| | | pression | | | | | +| | || header) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || number || Not | N | N | N | +| | || OfUEs || supported | | | | +| | || (number Of| | | | | +| | || UEs) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || timeOffset| Supported | Y | Y | N | +| | || (time | | | | | +| | || offset) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || frame | mu=0,1,3 | Y | Y | N | +| | || Structure | | | | | +| | || (frame | | | | | +| | || structure)| | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || cpLength | Supported | Y | Y | N | +| | || (cyclic | | | | | +| | || prefix | | | | | +| | || length) | | | | | +| +------------+------------+-----------------+-----+-----+-----+ +| || *Coding* || sectionId | Supported | Y | Y | N | +| || *of Infor*|| (section | | | | | +| | *mation* || iden | | | | | +| || *Elements*| tifier) | | | | | +| || *Ap* | | | | | | +| | *plication*| | | | | | +| || *Layer,* | | | | | | +| || *Sections*| | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || rb | 0 | Y | Y | N | +| | || (resource | | | | | +| | || block | | | | | +| | || indicator)| | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || symInc | 0 or 1 | Y | Y | N | +| | || (symbol | | | | | +| | || number | | | | | +| | || increment | | | | | +| | || command) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || startPrbc | Supported | Y | Y | N | +| | || (starting | | | | | +| | || PRB of | | | | | +| | || control | | | | | +| | || section) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || reMask | Supported | Y | Y | N | +| | || (resource | | | | | +| | || element | | | | | +| | || mask) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || numPrbc | Supported | Y | Y | N | +| | || (number of| | | | | +| | || contiguous| | | | | +| | || PRBs per | | | | | +| | || control | | | | | +| | || section) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || numSymbol | Supported | Y | Y | N | +| | || (number of| | | | | +| | || symbols) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || ef | Supported | Y | Y | N | +| | || (extension| | | | | +| | || flag) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || beamId | Support | Y | Y | N | +| | || (beam | | | | | +| | || iden | | | | | +| | | tifier) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || ueId (UE || Not | N | N | N | +| | || iden || supported | | | | +| | | tifier) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || freqOffset| Supported | Y | Y | N | +| | || (frequency| | | | | +| | || offset) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || regulari || Not | N | N | N | +| | | zation || supported | | | | +| | || Factor || | | | | +| | || (regulari | | | | | +| | | zation | | | | | +| | || Factor) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || ciIsample,|| Not | N | N | N | +| | || ciQsample || supported | | | | +| | || (channel || | | | | +| | || infor | | | | | +| | | mation | | | | | +| | || I and Q | | | | | +| | || values) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || laaMsgType|| Not | N | N | N | +| | || (LAA || supported | | | | +| | || message || | | | | +| | || type) || | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || laaMsgLen || Not | N | N | N | +| | || (LAA || supported | | | | +| | || message | | | | | +| | || length) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | | lbtHandle || Not | N | N | N | +| | | || supported | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || lbtDefer || Not | N | N | N | +| | || Factor || supported | | | | +| | || (listen || | | | | +| | || before || | | | | +| | || talk || | | | | +| | || defer || | | | | +| | || factor) || | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || lbtBack || Not | N | N | N | +| | || offCounter|| supported | | | | +| | || (listen || | | | | +| | || before || | | | | +| | || talk || | | | | +| | || backoff || | | | | +| | || counter) || | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || lbtOffset || Not | N | N | N | +| | || (listen- || supported | | | | +| | || before | | | | | +| | || talk || | | | | +| | || offset) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || MCOT || Not | N | N | N | +| | || (maximum || supported | | | | +| | || channel | | | | | +| | || occupancy | | | | | +| | || time) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || lbtMode || Not | N | N | N | +| | || (LBT Mode)|| supported | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || lbt || Not | N | N | N | +| | | PdschRes || supported | | | | +| | || (LBT PDSCH|| | | | | +| | || Result) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || sfStatus || Not | N | N | N | +| | || (subframe || supported | | | | +| | || status) || | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || lbtDrsRes || Not | N | N | N | +| | || (LBT DRS || supported | | | | +| | || Result) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || initial || Not | N | N | N | +| | | PartialSF || supported | | | | +| | || (Initial | | | | | +| | | partial | | | | | +| | | SF) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || lbtBufErr || Not | N | N | N | +| | || (LBT || supported | | | | +| | | Buffer | | | | | +| | || Error) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || sfnSf || Not | N | N | N | +| | || (SFN/SF || supported | | | | +| | | End) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || lbt || Not | N | N | N | +| | || CWConfig_H|| supported | | | | +| | || (HARQ | | | | | +| | || Parameters| | | | | +| | || for | | | | | +| | || Congestion| | | | | +| | || Window | | | | | +| | || mana | | | | | +| | | gement) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || lbt || Not | N | N | N | +| | || CWConfig_T|| supported | | | | +| | || (TB | | | | | +| | | Parameters | | | | | +| | || for | | | | | +| | || Congestion| | | | | +| | || Window | | | | | +| | || mana | | | | | +| | | gement) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || lbtTr || Not | N | N | N | +| | | afficClass || supported | | | | +| | || (Traffic | | | | | +| | || class | | | | | +| | || priority | | | | | +| | || for | | | | | +| | || Congestion| | | | | +| | || Window | | | | | +| | || mana | | | | | +| | | gement) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || lbtCWR_Rst|| Not | N | N | N | +| | || (Noti || supported | | | | +| | | cation | | | | | +| | || about | | | | | +| | || packet | | | | | +| | || reception | | | | | +| | || successful| | | | | +| | || or not) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || reserved | 0 | N | N | N | +| | || (reserved | | | | | +| | || for future| | | | | +| | || use) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || *Section* |   |   |   |   | +| | || *Exten* | | | | | +| | | *sion* | | | | | +| | || *Commands*| | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || extType | Supported | Y | Y | N | +| | || (extension| | | | | +| | || type) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || ef | Supported | Y | Y | N | +| | | (extension | | | | | +| | || flag) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || extLen | Supported | Y | Y | N | +| | || (extension| | | | | +| | || length) | | | | | +| +------------+------------+-----------------+-----+-----+-----+ +| || Coding of |   |   |   |   | | +| || Infor | | | | | | +| | mation | | | | | | +| || Elements –| | | | | | +| || Appli | | | | | | +| | cation | | | | | | +| || Layer, | | | | | | +| || Section | | | | | | +| || Exten | | | | | | +| | sions | | | | | | +| +------------+------------+-----------------+-----+-----+-----+ +| || | | | | | | +| || *Ext*\ || bfw | Supported | Y | Y | N | +| || *Type=1:* || CompHdr | | | | | +| || *Beam* || (beam | | | | | +| || *forming* | forming | | | | | +| || *Weights* || weight | | | | | +| || *Exten\* || compre | | | | | +| | *sion* | ssion | | | | | +| || *Type* || header) | | | | | +| || +------------+-----------------+-----+-----+-----+ +| || || | | | | | +| || || bf | Supported | Y | Y | N | +| || | wCompParam | | | | | +| || || (beam | | | | | +| || || forming | | | | | +| || || weight | | | | | +| || || compre | | | | | +| || | ssion | | | | | +| || || parameter)| | | | | +| || +------------+-----------------+-----+-----+-----+ +| || || bfwl | Supported | Y | Y | N | +| || || (beam | | | | | +| || | forming | | | | | +| || || weight | | | | | +| || || in-phase | | | | | +| || || value) | | | | | +| || +------------+-----------------+-----+-----+-----+ +| || || bfwQ | Supported | Y | Y | N | +| || || (beam | | | | | +| || | forming | | | | | +| || || weight | | | | | +| || || quadrature| | | | | +| || || value) | | | | | +| +------------+------------+-----------------+-----+-----+-----+ +| || || bfaCompHdr| Supported | Y | N | N | +| || *ExtType*\|| | | | | | +| || *=2:* || (beam\ | | | | | +| || *Beam* | forming | | | | | +| | *forming* || attributes| | | | | +| || *Attribu* || compre | | | | | +| | *tes* | ssion | | | | | +| || *Exten* || header) | | | | | +| || *sion* | | | | | | +| || *Type* | | | | | | +| || +------------+-----------------+-----+-----+-----+ +| || || bfAzPt | Supported | Y | N | N | +| || || (beam | | | | | +| || | forming | | | | | +| || || azimuth | | | | | +| || || pointing | | | | | +| || || parameter)| | | | | +| || +------------+-----------------+-----+-----+-----+ +| || || bfZePt | Supported | Y | N | N | +| || || (beam | | | | | +| || | forming | | | | | +| || || zenith | | | | | +| || || pointing | | | | | +| || || parameter)| | | | | +| || +------------+-----------------+-----+-----+-----+ +| || || bfAz3dd | Supported | Y | N | N | +| || || (beam | | | | | +| || | forming | | | | | +| || || azimuth | | | | | +| || || beamwidth | | | | | +| || || parameter)| | | | | +| || +------------+-----------------+-----+-----+-----+ +| || || bfZe3dd | Supported | Y | N | N | +| || || (beam | | | | | +| || | forming | | | | | +| || || zenith | | | | | +| || || beamwidth | | | | | +| || || parameter)| | | | | +| || +------------+-----------------+-----+-----+-----+ +| || || bfAzSl | Supported | Y | N | N | +| || || (beam | | | | | +| || | forming | | | | | +| || || azimuth | | | | | +| || || sidelobe | | | | | +| || || parameter)| | | | | +| || +------------+-----------------+-----+-----+-----+ +| || || bfZeSl | Supported | Y | N | N | +| || || (beam | | | | | +| || | forming | | | | | +| || || zenith | | | | | +| || || sidelobe | | | | | +| || || parameter)| | | | | +| || +------------+-----------------+-----+-----+-----+ +| || || zero- | Supported | Y | N | N | +| || | padding | | | | | +| +------------+------------+-----------------+-----+-----+-----+ +| || || code\ | Supported | Y | N | N | +| || *ExtType* || bookIndex | | | | | +| || *=3:* || | | | | | +| || *DL* || (precoder | | | | | +| || *Preco* || codebook | | | | | +| | *ding* || | | | | | +| || *Exten* || used for | | | | | +| | *sion* || trans | | | | | +| || *Type* | mission | | | | | +| | | | | | | | +| || +------------+-----------------+-----+-----+-----+ +| || || layerID | Supported | Y | N | N | +| || || (Layer ID | | | | | +| || || for DL | | | | | +| || || trans | | | | | +| || | mission) | | | | | +| || +------------+-----------------+-----+-----+-----+ +| || || txScheme | Supported | Y | N | N | +| || || (trans | | | | | +| || | mission | | | | | +| || || scheme) | | | | | +| || +------------+-----------------+-----+-----+-----+ +| || || numLayers | Supported | Y | N | N | +| || || (number of| | | | | +| || || layers | | | | | +| || || used for | | | | | +| || || DL | | | | | +| || || trans | | | | | +| || | mission) | | | | | +| || +------------+-----------------+-----+-----+-----+ +| || || crsReMask | Supported | Y | N | N | +| || || (CRS | | | | | +| || || resource | | | | | +| || || element | | | | | +| || || mask) | | | | | +| || +------------+-----------------+-----+-----+-----+ +| | || crs\ | Supported | Y | N | N | +| | || SyumINum | | | | | +| | || (CRS | | | | | +| | || symbol | | | | | +| | || number | | | | | +| | || indi | | | | | +| | | cation) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || crsShift | Supported | Y | N | N | +| | || (crsShift | | | | | +| | || used for | | | | | +| | || DL | | | | | +| | || trans | | | | | +| | | mission) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || beamIdAP1 | Supported | Y | N | N | +| | || (beam id | | | | | +| | || to be used| | | | | +| | || for | | | | | +| | || antenna | | | | | +| | || port 1) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || beamIdAP2 | Supported | Y | N | N | +| | || (beam id | | | | | +| | || to be used| | | | | +| | || for | | | | | +| | || antenna | | | | | +| | || port 2) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || beamIdAP3 | Supported | Y | N | N | +| | || (beam id | | | | | +| | || to be used| | | | | +| | || for | | | | | +| | || antenna | | | | | +| | || port 3) | | | | | +| | | | | | | | +| +------------+------------+-----------------+-----+-----+-----+ +| | || csf || Supported | Y | Y | N | +| || *ExtType*\|| (cons || | | | | +| || *=4:* | tellation || | | | | +| || *Modula* || shift | | | | | +| | *tion* || flag) | | | | | +| || *Compre* || | | | | | +| | *ssion* || | | | | | +| || *Parame* || | | | | | +| | *ters* || | | | | | +| || *Exten* || | | | | | +| | *sion* | | | | | | +| || *Type* || | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || mod || Supported | Y | Y | N | +| | || CompScaler|| | | | | +| | || ( || | | | | +| | || modulation|| | | | | +| | || compre || | | | | +| | | ssion || | | | | +| | || scaler || | | | | +| | | value) || | | | | +| +------------+------------+-----------------+-----+-----+-----+ +| || || mcScale\ || Supported | Y | N | N | +| || *ExtType*\|| ReMask || | | | | +| || *=5:* || ( || | | | | +| || *Modula* || modulation|| | | | | +| | *tion* || compre || | | | | +| || *Compre* | ssion || | | | | +| | *ssion* || power || | | | | +| || *Additio* || RE || | | | | +| || *Parame* || mask) || | | | | +| || *ters* | || | | | | +| || *Exten* || | | | | | +| | *sion* || | | | | | +| || Type* | || | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || csf || Supported | Y | N | N | +| | || (cons || | | | | +| | | tellation || | | | | +| | || shift || | | | | +| | || flag) || | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || mcScale\ | Supported | Y | N | N | +| | || Offset | | | | | +| | || (scaling | | | | | +| | || value for | | | | | +| | || modulation| | | | | +| | || compre | | | | | +| | | ssion) | | | | | +| +------------+------------+-----------------+-----+-----+-----+ +| || *E* || rbgSize | Supported | Y | N | N | +| | *xtType=6:*|| (resource | | | | | +| || *Non-con* || block | | | | | +| | *tiguous* || group | | | | | +| || *PRB* || size) | | | | | +| || *alloca* | | | | | | +| | *tion in* | | | | | | +| || *time and*| | | | | | +| || *frequen* | | | | | | +| | *cy domain*| | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || rbgMask | Supported | Y | N | N | +| | || (resource | | | | | +| | || block | | | | | +| | || group bit | | | | | +| | || mask) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || symbol\ | Supported | Y | N | N | +| | || Mask | | | | | +| | || (symbol | | | | | +| | || bit mask) | | | | | +| +------------+------------+-----------------+-----+-----+-----+ +| || *Ext* || beam | Supported | Y | N | N | +| | *Type=10:* || GroupType | | | | | +| || *Section* | | | | | | +| || *des\* | | | | | | +| | *cription* | | | | | | +| || *for gro\*| | | | | | +| | *up* | | | | | | +| || *configu\*| | | | | | +| | *ration of*| | | | | | +| || *multiple*| | | | | | +| || *ports* | | | | | | +| | | | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | | numPortc | Supported | Y | N | N | +| | | | | | | | +| +------------+------------+-----------------+-----+-----+-----+ +| || *Ext* || b | Supported | Y | Y | N | +| | *Type=11:* | fwCompHdr | | | | | +| || *Flexible*|| (beam | | | | | +| || *Beam* | forming | | | | | +| | *forming* || weight | | | | | +| || *Weights* || compre | | | | | +| || *Exten* | ssion | | | | | +| | *sion* | | | | | | +| || *Type* || header) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || bfw | Supported | Y | Y | N | +| | || CompParam | | | | | +| | || for PRB | | | | | +| | || bundle x | | | | | +| | || (beam | | | | | +| | | forming | | | | | +| | || weight | | | | | +| | || compre | | | | | +| | | ssion | | | | | +| | || parameter)| | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || numBund\ | Supported | Y | Y | N | +| | | Prb | | | | | +| | || (Number | | | | | +| | || of | | | | | +| | || bundled | | | | | +| | || PRBs per | | | | | +| | || beam | | | | | +| | | forming | | | | | +| | || weights) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || bfwI | Supported | Y | Y | N | +| | || (beam | | | | | +| | | forming | | | | | +| | || weight | | | | | +| | || in-phase | | | | | +| | || value) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || bfwQ | Supported | Y | Y | N | +| | || (beam | | | | | +| | | forming | | | | | +| | || weight | | | | | +| | || quadra | | | | | +| | | ture | | | | | +| | || value) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || disable\ | Supported | Y | Y | N | +| | || BFWs | | | | | +| | || (disable | | | | | +| | || beam | | | | | +| | | forming | | | | | +| | || weights) | | | | | +| | +------------+-----------------+-----+-----+-----+ +| | || RAD | Supported | Y | Y | N | +| | || (Reset | | | | | +| | || After PRB | | | | | +| | || Discon | | | | | +| | | tinuity) | | | | | +| | | | | | | | ++------------+------------+------------+-----------------+-----+-----+-----+ +|| U-plane || data\ | Supported | Y | Y | Y | +|| Packet || Direction | | | | | +|| Format || (data | | | | | +| || direction | | | | | +| || (gNB | | | | | +| || Tx/Rx)) | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || payload\ | 001b | Y | Y | Y | +| || Version | | | | | +| || (payload | | | | | +| || version) | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || filter\ | Supported | Y | Y | Y | +| || Index | | | | | +| || (filter | | | | | +| || index) | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || frameId | Supported | Y | Y | Y | +| || (frame | | | | | +| || iden | | | | | +| | tifier) | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || subframeId | Supported | Y | Y | Y | +| || (subframe | | | | | +| || iden | | | | | +| | tifier) | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || slotId | Supported | Y | Y | Y | +| || (slot | | | | | +| || iden | | | | | +| | tifier) | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || symbolId | Supported | Y | Y | Y | +| || (symbol | | | | | +| || iden | | | | | +| | tifier) | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || sectionId | Supported | Y | Y | Y | +| || (section | | | | | +| || iden | | | | | +| | tifier) | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || rb | 0 | Y | Y | Y | +| || (resource | | | | | +| || block | | | | | +| || indicator) | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || symInc | 0 | Y | Y | Y | +| || (symbol | | | | | +| || number | | | | | +| || increment | | | | | +| || command) | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || startPrbu | Supported | Y | Y | Y | +| || (startingPRB | | | | | +| || of user | | | | | +| || plane | | | | | +| || section) | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || numPrbu | Supported | Y | Y | Y | +| || (number of | | | | | +| || PRBs per | | | | | +| || user plane | | | | | +| || section) | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || udCompHdr | Supported | Y | Y | N | +| || (user data | | | | | +| || com | | | | | +| | pression | | | | | +| || header) | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || reserved | 0 | Y | Y | Y | +| || (reserved | | | | | +| || for future | | | | | +| || use) | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || udCompParam | Supported | Y | Y | N | +| || (user data | | | | | +| || compre | | | | | +| | ssion | | | | | +| || parameter) | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || iSample | 16 | Y | Y | Y | +| || (in-phase | | | | | +| | sample) | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || qSample | 16 | Y | Y | Y | +| || ( | | | | | +| | quadrature | | | | | +| | sample) | | | | | +| | | | | | | ++------------+-------------------------+-----------------+-----+-----+-----+ +| S-plane || Topology | Supported | N | N | N | +| || confi | | | | | +| | guration: | | | | | +| || C1 | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || Topology | Supported | N | N | N | +| || confi | | | | | +| | guration: | | | | | +| || C2 | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || Topology | Supported | Y | Y | Y | +| || confi | | | | | +| | guration: | | | | | +| || C3 | | | | | +| +-------------------------+-----------------+-----+-----+-----+ +| || Topology | Supported | N | N | N | +| || confi | | | | | +| | guration: | | | | | +| || C4 | | | | | +| | | | | | | ++ +------------+------------+-----------------+-----+-----+-----+ +| | PTP || Full | Supported | Y | Y | N | +| | || Timing | | | | | +| | || Support | | | | | +| | || (G.8275.1)| | | | | +| | | | | | | | ++------------+------------+------------+-----------------+-----+-----+-----+ +| M-plane |   |   || Not | N | N | N | +| | | || supported | | | | +| | | | | | | | ++------------+------------+------------+-----------------+-----+-----+-----+ + \* The bit width of each component in eAxC ID can be configurable. @@ -1262,10 +1268,10 @@ Standard DPDK routines are used to perform Transport Layer functionality. VLAN tag functionality is offloaded to NIC as per the configuration of -VF (refer to Setup Configuration). +VF (refer to *Appendix A, Setup Configuration*). -The transport header is defined in the ORAN Fronthaul specification -based on the eCPRI specification. +The transport header is defined in the O-RAN Fronthaul specification +based on the eCPRI specification, Refer to *Table 2*. .. image:: images/eCPRI-Header-Field-Definitions.jpg :width: 600 @@ -1273,8 +1279,8 @@ based on the eCPRI specification. Figure 12. eCPRI Header Field Definitions -Only ECPRI_IQ_DATA = 0x00 and ECPRI_RT_CONTROL_DATA= 0x02 message types -are supported. +Only ECPRI_IQ_DATA = 0x00 , ECPRI_RT_CONTROL_DATA= 0x02 and +ECPRI_DELAY_MEASUREMENT message types are supported. For one-way delay measurements the eCPRI Header Field Definitions are the same as above until the ecpriPayload. The one-delay measurement @@ -1335,7 +1341,10 @@ be defined on the initialization stage of the O-RAN library. Figure 14. Bit Allocations of ecpriRtcid/ecpriPcid For ecpriSeqid only, the support for a sequence number is implemented. -The subsequent number is not supported. +The following number is not supported. + +Comments in the source code can be used to see more information on the +implementation specifics of handling this field. U-plane ------- @@ -1345,15 +1354,15 @@ arrangement with and without compression support. O-RAN packet meant for traffic with compression enabled has the Compression Header added after each Application Header. According to -O-RAN Fronthaul's specification, the Compression Header is part of a -repeated Section Application Header. In the O-RAN library implementation, -the header is implemented as a separate structure, following the +*O-RAN Fronthaul's specification* (Refer to *Table 2*), the Compression +Header is part of a repeated Section Application Header. In the O-RAN library +implementation,the header is implemented as a separate structure, following the Application Section Header. As a result, the Compression Header is not included in the O-RAN packet, if compression is not used. Figure 15 shows the components of an ORAN packet. -.. image:: images/xRAN-Packet-Components.jpg +.. image:: images/O-RAN-Packet-Components.jpg :width: 600 :alt: Figure 15. O-RAN Packet Components @@ -1388,7 +1397,7 @@ Data Section Application Data Header The Common Radio Application Header is followed by the Application Header that is repeated for each Data Section within the eCPRI message. -The relevant section of O-RAN packet is shown in color. +The relevant section of the O-RAN packet is shown in color. .. image:: images/Data-Section-Application-Data-Header.jpg :width: 600 @@ -1398,7 +1407,7 @@ Figure 17. Data Section Application Data Header A single section is used per one Ethernet packet with IQ samples -startPrbu is equal to 0 and numPrbu is wqual to the number of RBs used: +startPrbu is equal to 0 and numPrbu is equal to the number of RBs used: - rb field is not used (value 0). @@ -1407,14 +1416,16 @@ startPrbu is equal to 0 and numPrbu is wqual to the number of RBs used: Data Payload ~~~~~~~~~~~~ -An O-RAN packet data payload contains a number of PRBs. Each PRB is built -of 12 IQ samples. Flexible IQ bit width is supported. If compression is enabled udCompParam is included in the data payload. The data section is shown in colour. +An O-RAN packet data payload contains several PRBs. Each PRB is built of +12 IQ samples. Flexible IQ bit width is supported. If compression is +enabled, udCompParam is included in the data payload. The data section +is shown in color. .. image:: images/Data-Payload.jpg :width: 600 - :alt: Figure 17. Data Payload + :alt: Figure 18. Data Payload -Figure 17. Data Payload +Figure 18. Data Payload C-plane ------- @@ -1422,9 +1433,10 @@ C-plane C-Plane messages are encapsulated using a two-layered header approach. The first layer consists of an eCPRI standard header, including corresponding fields used to indicate the message type, while the second -layer is an application layer including necessary fields for control and -synchronization. Within the application layer, a “section” defines the characteristics of U-plane data to be transferred or received from a -beam with one pattern id. In general, the transport header,application +layer is an application layer, including necessary fields for control +and synchronization. Within the application layer, a “section” defines +the characteristics of U-plane data to be transferred or received from a +beam with one pattern id. In general, the transport header, application header, and sections are all intended to be aligned on 4-byte boundaries and are transmitted in “network byte order” meaning the most significant byte of a multi-byte parameter is transmitted first. @@ -1464,22 +1476,23 @@ Table 9. Section Types Section extensions are not supported in this release. -The definition of the C-Plane packet can be found lib/api/xran_pkt_cp.h +The definition of the C-Plane packet can be found lib/api/xran_pkt_cp.h, and the fields are appropriately re-ordered in order to apply the conversion of network byte order after setting values. -The comments in source code of O-RAN lib can be used to see more information on -implementation specifics of handling sections as well as particular fields. -Additional changes may be needed on C-plane to perform IOT with O-RU depending on the scenario. +The comments in the source code of O-RAN lib can be used to see more +information on the implementation specifics of handling sections as well as +particular fields. Additional changes may be needed on the C-plane to perform +IOT with an O-RU depending on the scenario. Ethernet Header ~~~~~~~~~~~~~~~ -Refer to Figure 11. +Refer to *Figure 11*. eCPRI Header ~~~~~~~~~~~~ -Refer to Figure 12. +Refer to *Figure 12*. This header is defined as the structure of xran_ecpri_hdr in lib/api/xran_pkt.h. @@ -1488,7 +1501,7 @@ Radio Application Common Header ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ The Radio Application Common Header is used for time reference. Its -structure is shown in Figure 18. +structure is shown in *Figure 19*. .. image:: images/Radio-Application-Common-Header.jpg :width: 600 @@ -1499,8 +1512,8 @@ Figure 19. Radio Application Common Header This header is defined as the structure of xran_cp_radioapp_common_header in lib/api/xran_pkt_cp.h. -Please note that the payload version in this header is fixed to -XRAN_PAYLOAD_VER (defined as 1) in this release. +Note: The payload version in this header is fixed to XRAN_PAYLOAD_VER +(defined as 1) in this release. Section Type 0 Structure ~~~~~~~~~~~~~~~~~~~~~~~~ @@ -1552,6 +1565,10 @@ Whole section type 1 message can be described in this summary: | xran_cp_radioapp_section1 | +----------------------------------+ +Note: Even though the API function can support composing multiple sections in +a C-Plane message, the current implementation is limited to composins a single +section per C-Plane message. + Section Type 3 Structure ~~~~~~~~~~~~~~~~~~~~~~~~ @@ -1599,9 +1616,9 @@ Figure 23 describes the structure of Section Type 5. .. image:: images/Section-Type-5-Structure.jpg :width: 600 - :alt: Figure 23. Section Type 5 Structure + :alt: Figure 23. Section Type 5 Structure -Figure 23. Section Type 5 Structure +Figure 23. Section Type 5 Structure Section Type 6 Structure diff --git a/docs/build_prerequisite.rst b/docs/build_prerequisite.rst index 731d4e7..b80daf1 100644 --- a/docs/build_prerequisite.rst +++ b/docs/build_prerequisite.rst @@ -24,6 +24,21 @@ Build Prerequisite :local: This section describes how to install and build the required components needed to build the FHI Library, WLS Library and the 5G FAPI TM modules. +For the f release the ICC compiler is optional and support will be discontinued in future releases + +Download and Install oneAPI +--------------------------- +Download and install the Intel® oneAPI Base Toolkit by issuing the following commands from yor Linux +Console: + +wget https://registrationcenter-download.intel.com/akdlm/irc_nas/18673/l_BaseKit_p_2022.2.0.262_offline.sh + +sudo sh ./l_BaseKit_p_2022.2.0.262_offline.sh + +Then follow the instructions on the installer. +Additional information available from + +https://www.intel.com/content/www/us/en/developer/tools/oneapi/base-toolkit-download.html?operatingsystem=linux&distributions=webdownload&options=offline Install ICC and System Studio ----------------------------- @@ -87,7 +102,7 @@ Here we are using the Linux* Host,Linux* Target and standalone installer as one #cd /opt && mkdir intel && cp $BUILD_DIR/license.lic intel/license.lic #tar -zxvf $BUILD_DIR/system_studio_2019_update_3_composer_edition_offline.tar.gz -Edit system_studio_2029_update_3_composer_edition_offline/silent.cfg to accept the EULA file as below example:: +Edit system_studio_2019_update_3_composer_edition_offline/silent.cfg to accept the EULA file as below example:: ACCEPT_EULA=accept PSET_INSTALL_DIR=opt/intel @@ -98,8 +113,9 @@ Silent installation:: #./install.sh -s silent.cfg -Set env for ICC:: - Check for your installation path. The folloing is an example +Set env for oneAPI or ICC: + Check for your installation path. The following is an example for ICC. + #source /opt/intel_2019/system_studio_2019/compiler_and_libraries_2019.3.206/linux/bin/iccvars.sh intel64 #export PATH=/opt/intel_2019/system_studio_2019/compiler_and_libraries_2019.3.206/linux/bin/:$PATH @@ -108,10 +124,10 @@ Download and Build DPDK ----------------------- - download DPDK:: - #wget http://static.dpdk.org/rel/dpdk-20.11.1.tar.x - #tar -xf dpdk-20.11.1.tar.xz + #wget http://static.dpdk.org/rel/dpdk-20.11.3.tar.x + #tar -xf dpdk-20.11.3.tar.xz #export RTE_TARGET=x86_64-native-linuxapp-icc - #export RTE_SDK=Intallation_DIR/dpdk-20.11.1 + #export RTE_SDK=Intallation_DIR/dpdk-20.11.3 - patch DPDK for O-RAN FHI lib, this patch is specific for O-RAN FHI to reduce the data transmission latency of Intel NIC. This may not be needed for some NICs, please refer to |br| O-RAN FHI Lib Introduction -> setup configuration -> A.2 prerequisites @@ -119,15 +135,27 @@ Download and Build DPDK - build DPDK - This release uses DPDK version 20.11.1 plus patches so the build procedure for the DPDK is the following - - export RTE_TARGET=x86_64-native-linuxapp-icc - export WIRELESS_SDK_TARGET_ISA=avx512 - export WIRELESS_SDK_TOOLCHAIN=icc - export SDK_BUILD=build-${WIRELESS_DSK_TARGET_ISA}-icc + This release uses DPDK version 20.11.3 so the build procedure for the DPDK is the following + + Setup compiler environment - Then locate the shell script file compilervars.sh that goes into the system studio 2019 installation folder and invoke following the example below: - source /opt/intel_2019/system_studio_2019/compilers_and_libraries_2019/linux/bin/compilervars.sh -arch intel64 -platform linux + if [ $oneapi -eq 1 ]; then + export RTE_TARGET=x86_64-native-linuxapp-icx + export WIRELESS_SDK_TOOLCHAIN=icx + export SDK_BUILD=build-${WIRELESS_SDK_TARGET_ISA}-icc + source /opt/intel/oneapi/setvars.sh + export PATH=$PATH:/opt/intel/oneapi/compiler/2022.0.1/linux/bin-llvm/ + echo "Changing the toolchain to GCC 8.3.1 20190311 (Red Hat 8.3.1-3)" + source /opt/rh/devtoolset-8/enable + + else + export RTE_TARGET=x86_64-native-linuxapp-icc + export WIRELESS_SDK_TOOLCHAIN=icc + export SDK_BUILD=build-${WIRELESS_SDK_TARGET_ISA}-icc + source /opt/intel/system_studio_2019/bin/iccvars.sh intel64 -platform linux + + fi + The build procedure uses meson and ninja so if not present in your system please install before the next step @@ -140,8 +168,8 @@ Download and Build DPDK - set DPDK path DPDK path is needed during build and run lib/app:: - #export RTE_SDK=Installation_DIR/dpdk-20.11.1 - #export DESTDIR=Installation_DIR/dpdk-20.11.1 + #export RTE_SDK=Installation_DIR/dpdk-20.11.3 + #export DESTDIR=Installation_DIR/dpdk-20.11.3 Install google test @@ -170,7 +198,7 @@ Download google test from https://github.com/google/googletest/releases Configure FEC card -------------------- -For the E Maintenance Release either a SW FEC, or an FPGA FEC (Vista Creek N3000) or an ASIC FEC (Mount Bryce ACC100) can be used. +For the F Release either a SW FEC, or an FPGA FEC (Vista Creek N3000) or an ASIC FEC (Mount Bryce ACC100) can be used. The procedure to configure the HW based FECs is explained below. Customize a setup environment shell script @@ -179,7 +207,7 @@ Using as an example the provided in the folder phy\\setupenv.sh as the starting customize this script to provide the paths to the tools and libraries that are used building and running the code. You can add for example the following entries based on your particular installation and the -following illustration is just an example:: +following illustration is just an example (use icx for oneApi instead of icc):: - export DIR_ROOT=/home/ - #set the L1 binary root DIR @@ -187,7 +215,7 @@ following illustration is just an example:: - #set the phy root DIR - export DIR_ROOT_PHY=$DIR_ROOT/phy - #set the DPDK root DIR -- #export DIR_ROOT_DPDK=/home/dpdk-20.11.1 +- #export DIR_ROOT_DPDK=/home/dpdk-20.11.3 - #set the GTEST root DIR - #export DIR_ROOT_GTEST=/home/gtest/gtest-1.7.0 - export DIR_WIRELESS_TEST_5G=$DIR_ROOT_L1_BIN/testcase diff --git a/docs/conf.py b/docs/conf.py index 922e22f..aeccaab 100644 --- a/docs/conf.py +++ b/docs/conf.py @@ -4,3 +4,4 @@ linkcheck_ignore = [ 'http://127.0.0.1.*', 'https://gerrit.o-ran-sc.org.*' ] +language = 'en' diff --git a/docs/ecpri_ddp_profile.rst b/docs/ecpri_ddp_profile.rst index 377cf87..0e8ae6e 100644 --- a/docs/ecpri_ddp_profile.rst +++ b/docs/ecpri_ddp_profile.rst @@ -58,7 +58,7 @@ The specific DDP package requires certain firmware and DPDK versions and Intel® Ethernet 800 Series firmware/NVM versions. Support for eCPRI DDP profile included starting from Columbiaville (CVL)release 2.4 or later. This section is for general information purposes as the binaries provided -for this FlexRan release in github.com are built with DPDK 20.11.1 and the +for this FlexRan release in github.com are built with DPDK 20.11.3 and the mix and match of binaries is not supported. The required DPDK version contains the support of loading the specific Wireless Edge DDP package. @@ -73,8 +73,9 @@ Wireless Edge DDP package. - DPDK version— 21.02 (or later) -- For FlexRAN oran_e_maintenance_release_v1.0, corresponding support of CVL 2.4 driver pack and DPDK 21.02 is “experimental” and subject to additional - testing and potential changes. +- For FlexRAN release oran_f_release_v1.0, corresponding support + of CVL 2.4 driver pack and DPDK 21.02 is “experimental” and subject + to additional testing and potential changes. DDP Package Setup ================= @@ -192,12 +193,12 @@ Network Adapters in the system::: 82:00.3 Ethernet controller: Intel Corporation Ethernet Controller E810-C for SFP (rev 01) Use the **lspci** command to obtain the selected device serial -number::: +number:: # lspci -vv -s 06:00.0 \| grep -i Serial Capabilities: [150 v1] Device Serial Number 35-11-a0-ff-ff-ca-05-68 -Or, fully parsed without punctuation::: +Or, fully parsed without punctuation:: # lspci -vv -s 06:00.0 \|grep Serial \|awk '{print $7}'|sed s/-//g 3511a0ffffca0568 @@ -232,7 +233,7 @@ For kernel driver: ================== Example of output of successful load of Wireless Edge Package to all -devices::: +devices:: # dmesg | grep -i "ddp \| safe" [606960.921404] ice 0000:18:00.0: The DDP package was successfully loaded: ICE Wireless Edge Package version 1.3.22.101 @@ -243,13 +244,20 @@ devices::: [606965.017082] ice 0000:51:00.1: DDP package already present on device: ICE Wireless Edge Package version 1.3.22.101 [606965.802115] ice 0000:51:00.2: DDP package already present on device: ICE Wireless Edge Package version 1.3.22.101 [606966.576517] ice 0000:51:00.3: DDP package already present on device: ICE Wireless Edge Package version 1.3.22.101 - + [606960.921404] ice 0000:18:00.0: The DDP package was successfully loaded: ICE Wireless Edge Package version 1.3.22.101 + [606961.672999] ice 0000:18:00.1: DDP package already present on device: ICE Wireless Edge Package version 1.3.22.101 + [606962.439067] ice 0000:18:00.2: DDP package already present on device: ICE Wireless Edge Package version 1.3.22.101 + [606963.198305] ice 0000:18:00.3: DDP package already present on device: ICE Wireless Edge Package version 1.3.22.101 + [606964.252076] ice 0000:51:00.0: The DDP package was successfully loaded: ICE Wireless Edge Package version 1.3.22.101 + [606965.017082] ice 0000:51:00.1: DDP package already present on device: ICE Wireless Edge Package version 1.3.22.101 + [606965.802115] ice 0000:51:00.2: DDP package already present on device: ICE Wireless Edge Package version 1.3.22.101 + [606966.576517] ice 0000:51:00.3: DDP package already present on device: ICE Wireless Edge Package version 1.3.22.101 If using only DPDK driver: ========================== Verify using DPDK's **testpmd** application to indicate the status -And version of the loaded DDP package. +and version of the loaded DDP package. Example of eCPRI config with dpdk-testpmd ----------------------------------------- diff --git a/docs/fapi_5g_tm_build.rst b/docs/fapi_5g_tm_build.rst index fb2100d..055bc45 100644 --- a/docs/fapi_5g_tm_build.rst +++ b/docs/fapi_5g_tm_build.rst @@ -23,7 +23,7 @@ The 5G FAPI TM uses the wls library which uses DPDK as the basis for the shared and requires that DPDK be installed in the system since in the makefile it uses the RTE_SDK environment variable when building the library. |br| -The current release was tested using DPDK version 20.11 but it doesn't preclude the +The current release was tested using DPDK version 20.11.3 but it doesn't preclude the use of newer releases. |br| Also the 5G FAPI TM currently uses the Intel Compiler that is defined as part of the ODULOW documentation. diff --git a/docs/fapi_5g_tm_rel-notes.rst b/docs/fapi_5g_tm_rel-notes.rst index 516c39d..fbc296c 100644 --- a/docs/fapi_5g_tm_rel-notes.rst +++ b/docs/fapi_5g_tm_rel-notes.rst @@ -20,6 +20,14 @@ ORAN 5G FAPI TM Release Notes ============================= +Version FAPI TM oran_f_release_v1.0, June 2022 +---------------------------------------------- + +* Support of oneAPI compiler + +* Support for additional features not properly defined in the SCF 5G FAPI 2.0 specs has been added by + means of vendor specific fields. (FlexRAN 22.11 compatible). + Version FAPI TM oran_e_maintenance_release_v1.0, Mar 2022 --------------------------------------------------------- diff --git a/docs/images/ORAN-Fronthaul-Process.jpg b/docs/images/O-RAN-Fronthaul-Process.jpg similarity index 100% rename from docs/images/ORAN-Fronthaul-Process.jpg rename to docs/images/O-RAN-Fronthaul-Process.jpg diff --git a/docs/images/xRAN-Packet-Components.jpg b/docs/images/O-RAN-Packet-Components.jpg similarity index 100% rename from docs/images/xRAN-Packet-Components.jpg rename to docs/images/O-RAN-Packet-Components.jpg diff --git a/docs/images/Setup-for-O-RAN-Testing-with-PHY-and-Configuration-C3-for-Massive-MIMO.jpg b/docs/images/Setup-for-O-RAN-Testing-with-PHY-and-Configuration-C3-for-Massive-MIMO.jpg new file mode 100644 index 0000000000000000000000000000000000000000..23138da1cdd8831a5b6033698d9cf52b94c194c9 GIT binary patch literal 216906 zcmeFZcT`jB_AX3Q0Yy+mr6WxQ0qMO62m(^1CZUS-(4_YwASxmqq>D5mp%Z#jRC*_& z_nuIc7CPTz?|shJ^V?U({r8y97Rg%cZL>V{ne$z*)KwKoh^dHiaBxTzAIfRq z;9LOV;Nbfco(H~(=Sa82!NFCul9g3gl$B*rceFRRvN6NKVT*ifYx$?Dwtl8^fo@ruU5uQSbEir*4u>;cI=y$$0#!0($8U!+r@@3w-TJ z&#(lKk|R4rExp1_ct8kJc^JVL;RF2kuNy2twk&q{1s2RQ+fB-wlsxzRKhu2JcVZB} zOZl~n;mgJio_io~Gh^dae=_C7*2bc`*ns;p*JU1=;o{@_UBquH-#qu~!7GOg_k5q; zQRNeSUgVK{^CoEh=;Q<(77*aWi{CU!baHZHxOH+e`Bi#z{oXyA7JQu6K$DMMlEgZ| z+`cvgDVnRO;IIS7gg6AaR5<5=BV6DmiA(+OV|iRQ9Q;4N$HT!1vBDwv>l{_!^YkwQ zc%5GJ=O=#D3!DqUe^-H*`+K~9oqYlH9{*p*`2N6eIQKPW6%~O`&8LoLW_C`N_RghF zQANNPL=F$ZPB=K%Sx#TLiW>Vw*c|=4+xbN|D^YU^6XK*@s*f~FO z=d^QT`tv6Lx{sWh(^E$)2WKmLJBHKyJ~6R(ah70YJZ z?$ckmdAROz|NGv+rQ)aGimF?=o7sTntZacf1KN-j77-NxPu^mviW<@qxZzOFOTvsrm9*^7XifGM77>#tN7m^^rJjzTV?sCS;Pwu(J8o_;3kj)B9D3I?XJ@w14(c=ZPCvOyN4Ey0 zh&fY~FPtL;;lGsfT4vvS*6I1`HDTn+n0G=ApEjK&EbtQj5VybDea+u%7a@Z>1Q!q0 z*A_cd-+IwE>Rh|7a%f_4)YEftwZiUrp^$-CDECdB*CUnZem{O(0z6LXMk?uNcqkl` z{%dDU?L32YBjobOi9BZGZPq4_Gp39E1r9D0=irsUfd3GG@b9HVS_D|NIQ+Z{b|O$+ ztHW8V_WBmk=|*2hV-f~Im0Q0zM(UUG2;lSn=zJwS9edtnh2LA6_a;C`&KISb-vx6j z55l9ZBh#Z&qHp)RUT=vGB%k~I2_J9w+F7H)!TU?r@2rV=-+devrD=-7N+~;fRwpA% zVP)21($<4-xF6V#J^%fz;NS&ZC*1dUS)4d3S+9@{aQy+RQ?-RW)JNt?PHwghfTLm( z*-6LTv%0aS78dO<^2L}rnfe#K@C@#Wi$C&oUcR|xZbkZg2?+2fBJgS4{}Rt(*0o=! z!NOZB7sGUiQiFpl`wOqf-Z@8M5m_|y{_T@p?^v2H;z&Tt0qTAih2<9g2SzzuPhYPRA)#m1%zPf%MOHDip7591URybdh-}9sMt6ruWOtcSCjLr3`pizxY=kAD}>!7J(OqXVz+>9sx z+;MclHyU~(rtGWwIx6|l+bwA?aR&0l?4yEVZcWZ0QS^;M3E2@r=n5B13;<9Yhw!Y8 zLi=*X?RPi#R^s@wT#l%M+pbBt8}CqgY^|tXrF1m`Vc2W-jPq=YWM(!+1xr%LU3R{# zbNe)ak4H+gFYpxIdC=-0EETC`reiIe#9``3tKY9wtsdE%EtET3-K1u5TEEF| zOC3W~G$HUbSlq)-_Z9oCYe+Xxg_I(fC`yKO@-X3h1;iqSc|1dQhGIwqSmJswmr7$^ zDaQ3RX>7MW<=rs!ppby1*u0a+RtR$|J7J`u3i@F?#1CEp$y9W5=Vwx`pLA8%DA}CL z8C8w%vW2|cOaOy7M#fkiCkJct$pnM^5yIkKXP7K9hSLG}WD$W7uhG-DHs+?}9cRA> zm|w$W*sDZa=vX`~rzonoQBgb`^tF9mrnT#^xAv6Rq)(_sh)1QqwmR_AnvZwNki>=X z7Gz;Z4E@{SBcOIIs=)IF&8azwWF+$!}2<@{Z$8Oovw4|4^P zZpdO;rfrk`osFd%9CPYQFKXTFp6m12yq{ZGXlV&*FHT+6kbl} zFg{vnj&)qS(4b`aiN1oY==jMex-$$*z;yu3FdD}BYs08OQjb{2@5xOhmKJs3Vg%Ic z?xd}R-rWi!fCmc;pMk0w-s1tV$biL14;gP!8MipKZ6^e_vO1HW9fZEhKP4KFLjKPR+&X0bxS*G}FKG)t}`TdYS^5fm7FOuYi z#>zcVco-i|@H!1X!Wr+P!dCn=if_|&L~V2~+c&>1uD!E6z6!ddSR;?j(oPXBoZn%w zXdP0EQ-ru0PV?%hd$?>mC_Yk&-Mf&%tgG~p>*D0HWHrL}U1p|5t5;3a_@cfTB7@O% zrD{C$i8mahRXjPVS8q@tibx0w@v!$Z(s;3={3w1+1sb~>Q|dR)Bs(e;^D-LFEM7Un=JE^Ya`=Qz|ytxS?8(pM&bLD&^UYt2h zAdCEAPFiYYgy43b7iYyNG3)wn3o)qFQI(DF{WCa?>Z3@K+$T|fpOMjNOL{^B#PUsM zz4dqRh?bR^YrPvo6$TCz&>5IK=pS5*yErNk*K-vQ6_}ggcuz!DG~xS*7g>#Q`~Bs? z+P89X>hY2tU(R7nH=h!~SzIsO`2A|Imr3_rfQNS(avqKHM|{f1#1S497NXh$WtCDH zcV7yyZ}C9oRxavpZ9sIvgT}UG1`PD!RLoBGdOFzxAT_D1x-AdS^20dl$4g*vAcE|| zh2KvYA%Pa4(u8hcd=!TmDrT{eihb*|82JEnPJuME(#1%rc3EZ-(GVk#T~A_9dv-wZkHcIu}+a|LdP zLVlhbht()!FWb)dR=|66V0_FqjRzyy4-#GJ>j8tdM2LC=x2f9uN;*F~p1uYpfZGwf z{ysD&Bdi3_?v;(c^YAAc3>HG+(RV76nRclLP|J9BV}yKS zdBK%id?+oO6V zI{BL*jC>r*tes#+tWT-J2C*FB|3Xs^iBuJ9Lo9*Er4N1E z??xo;Bcl06k=&;Z=PPK=f8A?P^3{29x6bP$Kh(XpR+YTgd0en+ZTxEq2j3fi#J#h9 z-Jg`^ksf84)0Aa68JTWLJ|BQwY5E&2kt)JU!^Z^ zC8<*~T;ykAQZPKRiyrgQQ7CkopIdCrky?+^OdN>W`NI^oC$_o82;}jza3~xX`UE|? z>5?lacX;JBI_v@|eIyV&#t6l&$Bqw2M(L@0zoE1a)3Ci3%W(ry$mu6lSjb{fL5ja)S(WqGk>C2nx2+X3;W7P*PlBCrXgl*p zp?nLD$#c$=q-n=Q3kMc~*9=tYp@eI&HD9kS1h{ieL(6mt0u+9^An2o($ zrh3Lo{LM8?*X!nV3gTjhsO4kQuiHKNz0~3aNM8g(X=!mDp2xg=d|8Hdo*(*g3&)Bc zl$1DSy2bBgZ)-vMp&A+=_$_-Pte)fd(DMhJVWX@78>P&#*yOXfx5s)fMabgqmv3^4 zNjtPEEocuY1d@1n?^uk8^kVD+r=D`Dd8ascY54DNiGz2a`IOX1d91F^aImu)jc7P# zKe})!g5DRz8WqivATr#Sr=myx;l+y=ZK)DorrT)kt2bylt27u4RF_#tE9~R1b0#XM zh`O{-w|>0(`;Y>cpbc0{$n`ptHRNL$Rgv#Or;y`H%avTchI(hQZ7uNDs*r|6L7u6p znGyu@LR&slC(Ihvf^<-9Zz+|`AEC*8s*t`WpED=#NE^!qM{f{s0B*o>&tnk(ZGDlVQg*Al_8*m<;#k>=g-m&B@RF-Ayp=8{SGb% zJGLeyj|7;&F3jkOIs0L8aDQ!uLhHsvd!Iooe-~Ti0w?5QdmLw{ z2MN^4(eV-6Xwef{@}cYf%sFR(MQH|q0O1Kfr7xEMur`9|r%Hzy%jg(HpNfzx1oLri zq)ImGYV@OzXltFEBjlZ+Bz`NCY$DWwOC5>^lll#1i8`-S+4kZr+x7|INv)lvmRht( z6tSzL9K*vR=1Ru20eSs+nCwA=q_vQxk2=s!ofKmClVcypl_4ICus#)dn!O*dCUf`g z?{6>daLU=rN?AJOVREgF^ZL(2v#BU3SOoH2KrZZ4EiDhp%h1;vtIxw!DU#p0cO-{~ zg~h%gp;pw_*B23|)MorWZ|g4&CLjd0e{hTP0xW?_PhN(GfMsWAXL0uBuK0mub&)6? z29>-U4=pWU28D#^H86Hu`-HGY@;+Hn%v<0+(-Q(zHWiLDZB`yG)Z9E>s0scr_=fpEiMdNwkTxznT{OA5iBc3*<->)JW4It>3xA1Xc_)BM{i2O-Tm4abk z?;I|y!6fDkrk+6<5D(g=3qZ$vtj==0)WEs6(pwe8cshPx+0MWOe+af{59$9I>843` zLeLRKhWHt>ajNQQX(>QJ{Le&mLxAvG<9}$-29l*5@@M67p39!5`+R{s8BPl88G=-F zA2|2CoF9zAcw6_)##teG2q2{RN2i$dzXC1&UxEI`l>Aqqe+Etewa`D){QtGkzrgwb zTIio0&3_@s&%D(Cp9+`%haiWae89kfR%=&R-0rSB5fRZI-_`G3zer2aDL{25{s(|M z#1@f|a0j58zM^hYQ|qnl8B66pF;`N0O~jXxk)h^37HuFk{em}jcdceU)9>UsJ1&w* zp{-`UUhf-K740ukXORMci|7;@tZx}_hlYOsxdZ;v>O|t(1DcK}M_4bP>|D*9w)uFY zwQbM$TuUw8V`KV1SiVa*O!@O$53~e*b3qS823{b&?%8p4fITH`I=4Ny(XZmT*KH?i zJsfw2Et1T+>b5lY=AzZwY827Gf@trn04{sgIw3;<-|^I-{smH!Jq)0>uYEk>dth6r zf<|Bp8zwN@()zoTC&#y&UXVmTe~wpmv@<#%e8Z5fc-WxERk1%?MI`~?krE@}sX{Ab zRho$cP;*s)8BzfPa&hkXc1c`lRguP>pPTs|^ki@+5XVRP9__bIeG0rNk^BNyaId5% z7>Djrnxp|&)!fzo50Yw%0Y%q=x*y}ko?oh!fC5P%5U7s$hX}^z>i0{a+mGHcU?;rn ziv|34r$b5{=arU65U{P~euZ!0^!C{kv=W|W$!-%KYhKRzz4rBc^1esgx_syCYg||7 zI{3O{03xNTed(=g|G`E(chckBr{CW2xTquvs-WOtrhL7MI9NfolB(D$|K3y}>0G~> z6a@*`MGRP0l_9DtS8lmY`cwo32PbT%8ns<5LT`4bO6UpNPu#6mg{kt08#m%qtyN=~ zd3pQB-xQ=*yRJfBg@*E(KYsjpVdPsFb?1Iwb$0%X&k|lc{EL*I(AiHf{48D1ADsg9 z%eVdkpeGS{lYj)Y49aa1z%^QfGA{Xgo|ycKHjctt#%lRI)yabqXd%UcDU-t6n2HI{ zcG{Po=igGvbtMY44@_5sn>rHsEZR6L#ux#j(=CN-%OG$dC@4r~aqE24=k;2wnD7+ zURfDG9~$Y>ov9dYI`HxFLJyyVv%z3_Nl8h^M;(cr3@PZq$6KK{xZ~cuxup3Bzw6z* zo16Nh<+jo6+If|BZhqKHAVh6_#$p`6Bxzi&oG+rIZji!tpsr7I=Yi&|?3nv4^INbrq*rg`391?Ujbo>%`6H5y0zTQow-lt@6Nw4%%cP!xYa?%SyW z71`EssbdiT%K`N=fE{1Zb#yGLI__1VZ+&@%spI$vJISpku^lsPKUrVrHDJ-}znvaJ zclBr+scTe~LvxvwR44;t(edsvS^%Wd#Nz$q5@@?hphx0hrF7g)e6xekv0DQB?rDl7 zIOj1c%pZC0`!B_S>;b32SIWbG2)+b~Vy+cglh?Sd3-;rAy){Oa;y zrF_F_EKi%G)HfG1)0?4?rIQa?P*;dXKh&a~MpG7DrWGBasaea_t0*9H-3H+s(tgV8 zC&aiOZ4b7O+Bewl)cO3N`Gn4YgQ>M>M2qHV9$V9n>^whraqjC4BmQ{jt^Bv2k^h_h zbw3Yp3L%XTz`sxpMY*UqzoBFjjY9GnBc-)-`dw`MbJW}}ycgYf>Pi+VP+sst=4p32 zfAV|}tw6uj?e<43C1%==md676oZy8xjABt9+diN!LOXw^it)6gN_Ac8`INkI38Y(S z$T?`>ma>GM5yV5yXbFe>%#cwSoT?!m^FOMgIKEEGu};n>PCJe}r@d+dk9P^rUfSCk zwePI=y~D;9@$n;DYiny{L+LlD z1D3kNJB>Gf4lSe`Z=KrCDWd;b1KY@oD~6{-A}eqW$tfs^3W|F6?AZdS2?bcggdy-?8M+ReZ7k=cC2optxNI%;F1RoE zWi2H8{@C^z7b*(;dFcs-0Y(KNG5!feFdHj0=7saRptUG@Oo9e;tVhanmqzjnBJ+>m z7$eC9Zr%D+_Z9|=^f}m33_MSwAF{R%6n>G?iL-I)mB#?!MKfI00^U#UWtWNzTdXck zHFFl7gTwDSz4k|HzVP{ZB?)!@n6wxFIBAueU1IaVI$Wm>-bcd<6C>Y!)y~h*aN+DL zD!MmZ^dt~mSY|0=5bDzLj;F*0ql3)?jAUf__w!d(`u{_i{TFl$s2Rck1vDXn1_LLj%7+ghn8n4#BRc!8{|tH=)NlR4 zRkQwsJUTpN5D?G?05dZytGqR!L^GN;-8k_2s|%sUfP)L)SQ zGNFxW;8Q;}ar=MzsQ{ddKuWpwB6lsr$>E|Di-g2@S!zm(?Q`XBg;N)GuvVis;fdiC zah!Wul{sx*XjnJbL@E^nK-8MhLU5^kLBp|U?>eNxjw%i?1$B;qv#e^baxJU7o#w5P z{V0KvYNC3r7lVZ9#siJ01JIjWC6WKxIHS-0R-{>bT*54ncU1(^@Z*F3StCUTz}qR! zf1-+Uul3+K1E8CXoM%_ z*}5(FJvcQ!1;Ifn z4wXFvpzBh4*7CoYk>u+=WZHvzt3$;Z;((WAz3C#MsiPAI)L>O#R*Bf}Q|3;XJy>rr zN_C$hDlJT3K85u=Uf4BTJoOZIVIiTxf&6Kh>JOOaF`8`C`PT=rh7+YykM%yWkSJ>sTOlaaBw1rO0wF7<& zcB}Ahm)WoTZ`hxoqTD*Ue?Ymo*LDH#o~c)1$BMI^e6Mya1!7;fH1lF&5>bXgfHE||G} zv_@H^1Jmgw_>d|@LL;mWXd#Psp4Jr-KNsRz04yiq=;X-njO}k@ZaXb>Tp{sr8AU+j zw^oKVPaS2qiMikUL|q@C%H&;6cs~bvWQ2l1zR+koslya&mGn z&sV0W`yEOQ06^OjBCk-$%ED4*7Y(en;acVFTbX_$FAfZ`&-VW0@s3aezg1MOf{KRIW;(DBbH<#M|U)&^4 zz!ZfrxG^t75AnvX+Sj_yb9;=N{Q7m)y}f2XODqsA@%EEoz5+2yJFKuC&4nF$8s5qj zE^hMHzGhXBkL3rzGjtZ8uN1Y`5=!a9zUC;ncTm7R^3CXEe^6%I<2)QFV~FQ&IP7~g z>vbBv07_tQhwQBq^(nF#c3mB51;A^TRe!eQxXWPc1$uAewp7QqJ0;dg_R>NoNW;mo zS7`%aQF^_c#hjNS268o?*PZxA8J%QtLn^-7zZ$PPZq<5nOY1^rG^S~KD z_~!r<(AnpZ_nANqLJWFI-9SOR;xEWJwhpjS21%+vFc3{`g#h$Rok1XK5cb&WRp^{P zwI=Y=uBeM#m5nr*>ipB7?m#rGNcFb9bIsC+P}BXb<+c9Q^jy^w0Fa@}?Z!n*3*c** zt;XEk++aKuV3idCJHJ(O2t@RKRZbSA>+G-#RJGOeli!+~ldj}beFtn(U(Eck21otM zY4W}*-uW8F5_%2#fiwfOUMgR>W3pu}f+a-$YBU4L*?^!Zr{{4}2r0cFX(pxs=*Gy3 z*F?^(6~Ic|78TVNB2hHRklo%5xIjl{V4+>{W45^+h>|mbkZl1ZI}#Ifjr?VHR#xlh z;ESDm=Pq7}ZupkGA@`sF!PLHDx zX4~!nmG&V6WUvk&boQJ9!c>D)pB=F86zKjh8)F%kfC@DHo(D#7aW;Eyc8_b&O;H}+ zA9;d@X1q8@_kZ=Y((ehx12t?*m#E;P4+>tqt+raq4al<7E4O(Tl21Y{$p2(XTi3v> zfaK=AM%ozkD`;UIinbCcZNfOth6yD~18{Skzp@rEJe~EJcEF$B251`okoxoR>hsVr zs^<8z-XeYp34{HeRXv-=Jls5Jn^DSnFuu;<%Q3*ev;!;@=X(7?0S#asw;yhx^z2(n zgvO>M&3|E!$WEgM6wcNg?hH_K>f|HOa^qDbj`IbTpA#-Pc(~+%rg;vV#kc09`C6wc z41$qYK33Olv~jFmfkEU4K`ts)u<7jc??kul02Is*MRh#lhGUlpYH7t>`JwsfL|CX5^{>P|@iFa4wP1f~s#T7(y_~3yB=^V{F3-Cw9y!ys7}O zM8kPWZ`%OHdmuz&c>?^@4)8o3EF`)DrvG8?p93+tfV2dEJJr|yxcJ9#PUo#W#18wf zOsBu}JXz1SDmgiMXIZuAQ9jfQ@V_kL;`#vbX8l=_!PX0t zRBaDWeXfr|pfnW4=jy$oGgnnUWZVu^!Cq4xg$d+E=gKg%_Ejh+&#e2&^VT}Ufe-F%3)P4APY z7YV&NkhFrDy#D=##lu7T)wP>Iw4AUci<@GeTb2pp9wp!;?ZV}OucFoEKz!&es_ImW@ByCw@aMAt z07yWn8USPl_^SB?1$BUeI2O^*{iCkmr|u8e`_vHW&d$u#QgAp+a&mUUgY#BTV}z?$ zufDcr;^tP<(A3NVCeNI?;Cv&spiKmTLXvt0N;SFxzmkV8YuK*?mcK7kk-YoEnva2y z&Y-=Ds;c1pmWXo@*RN`%{unUv_+y%-y0mdZH`aLac|8Rhclm$e#0VLTVbZ<++Ji>_ zp{VRNz;+3LFJWMdr#uD%N3o$Ua9MKY2v`8N#|^jhKWeUqfErzEa%SYuLN6T*Br{yz z*VLEE7yFh@zdTGr=+gH5k4@Y)1OT7F1XQ|`r)0bDtPGn|J*h#vR;L2#j6K(3B>+Y_ z?LW4p{|ROl;_*x~;vXdItZdL5+Rw-&oU$G!IS18;0-cO(}DA9?q=%sns z8ZD0mJ1TDrUAb0&{8%(+H&xVANaPKme@zM&bC zfe03G%Ih7hg82CO%=+NkB|pf32PF7N^Kjz{Z51+&ikf6uol=ls)>Ady{G#jVg;|B_r&5j%MZO;G&+|epZe9-&T;o7NQy_ zh@Z%h|*2SQJl3h(|1oqOx4gWqG6^7yykx!QMwA5D{1z*6Q<1 zV2Xox3^3^X84tjJx12+uj|(fOr@z5L`j)EeAqvO&1t%^Hx{3s(Ur|{(8hgVgO6AcN z8vixen2P>*MxL|v=%WuAA3FFyQI(*%1^>R&Ut`b%HUZTJ=l;FkjhAr&(Z_^_helqo z6W8scYD|Q??s~$ScKiicSRQ11*97|`lY|$2u2+_L!JX{}#|Yq}DnN+U?R@P&D&^QR z0GX!5{VDawz<~DvU&nSJ2rhIfzO-wpb0c(q;Nl-kAke%Yo1A=?o_j>T5u!@FW0B|j zCAYXQSB3o5t5-ajq8GuzJkJr&{cy@@+aj75Y+zINpJxAtO+$Aao=$%2lSt3gdPQ7X z3PH=f?*I~+W~`Zb{~mJy4&k*MMb@PPdEZ(Bg?OS6wbhN~{sOmeEAX2lufXZA6vgTK z9p$3yYN0U{MS`(FE`+Q|Cn|N)`JU{EWZB24T9U%Q%b1Nr8s{2P8O6d)TT%iO0cpZj zqAfoy8kSdl@b@~-vrTatBUuGZeWt!m^TtHN%d!6XxUd&+pxV9GU5p82yPhXy6ifh* zE$k)&aTuj-$p7nNY4ACIV_Fd_gt+T7>b)9@l5Y?Aq7d-xG5c^JhLdFl86)hi-;l9!YlCCrngR} zC_z8ekwLvje~?;j0ycYE)ui6|cbb$vrm+=I$A^-dHTi_m zK;rSO@6?@t`KCr^2VmBk%C0ywJ`=8Q+#VjYIdui{F3W(qQ zYw`}crqmkqDu6}b?7d}-XpV%m0fl}D8g<%&D1YSi<@f*Q?imQr)t-aze>|y`mPHZd z(ve>YQtM*UcE!!XM}2G|q!ff#m@e}9B$1~fifZ)}1QxxryPfdT1plflY~;rE19k)J z%c3sW2`hBb4a7^W?`9n-Ji$Xr-5t8f3)naY3>h_D$Z3^f-oGsodxEqgF039ctJC61 zdJD>e*?#>)RP{Vu)DZzeTE1%des#}XDx)%G_sbZP%^>bkDyzx-=&f7ns^WOI|1PAJ zB#L1*M!udkaZy1zbtJ;m(+@qGZ`*_e$#S}zE9c_@<#yN(p;eP@v<_i(`L`>IRh}{h z+FlJ@tcddJ?h^nLC9>USCqOadG06+UxW1$-2$RAkfLs zO%n~B=Q_9d1O6QSb6o~jb`1!B0jDk1U}PoxW5>HJ20Jv5q7b7y%C4$*uSgAVORA0t z=HCuOYegp_O;|W3^jztcVvtGLw%*J#8Em|AiN~OQaKQ};OHfXA znd(QVyxE$lgI4*fgnrq}?&f3h99W;V_R~y{KuCcs7CUz6t*Fu+;}a6ivdApCmgGHl z$F?yKsT=kxD#Q*jy*l*y5}{X$Jgtl9wE$tgkEAUZzl00pe53VmwbWwAH3D>J`a+jI zC-(A_>M14U-u+|VE&}+Td{*QB1>uzPd{$i8)3m4>s_fR83dx9`?=NSWK$NX$kWtUQ zQ(2RCAWBBn=N|gVNm&^-m=|ldo6pa+!dWn88_DyIOCY86knlpC2X^9x@%jS|fk6~} zCcIJ&()D13O6t*fJ&`zXamy6vkD`QCr_Rn^B?4JD>v@voDdRl15)vQN5v`)*mGFsIQDPwqh*L|gs($Uc~Yz6 zI0;q(MI$zRX`Z7yX-Ghu8yzvW2rj?^!|$(rxiDLBUZ-(?#|uS>a=_>gt>1zP#3A=X zH2?Bl$8YeSq~GF2f3D|s9LkkE!rmLE%J*2UyyGa$gLGKl-zXe+s}h(&>?rOTrW9*U zl;T0g&tok)W)(=BCQH4W?5bv~me-zkr%-pTGxcHaaFk>E}V1&>^4L0 zW)Y|bKKy1%L=;*iUktegD`>I~h7rJ3x6c2miv)p@Yio54crNk<$DtRiuCl$)MG_wq8jzI-x~-EDsc;m9vyfJWxA2i8@Cr`uE2%%&t=Dac`3ftq40p+~>lB7=p&!0_Ei6gwgqdJ+ z9G}&MOX-6BDmR{Tv^!lV0X3YsFIytWBc|lq`0a_ z#EAJ45;e-h?hWtxAGytZ_$ zZZUP@v0YVBJkiy4U$eNo2Bn=b3H!S)eM1m>?FtpI%k7=y*@`-@Z$(^vmdA60^%FE2r9`Cva?Sv$GBUW_uSGatJUjN z+YRP7-uCwMxkpRug~`fkpU1DMOmnJ0*sZ?wtH(%kbza7WS`D=MlHx*#NpjPZPaPT& z>XS8)@%oZurFU*CEvJS*m$mrubjhMa^@?Pi74%3;2gJaBS58!KV!z*4Zzrc^y6m&x zE|-2H69L&rLcA-elL$$neSWal-3mr=yDYD7T|cHBF@Esna(0KtycEav?{SVNJqtQ5 zZKC&M*JP=fx#b$Em}#ebo{kMOd?f}=vKYIxq?!NWiJmJ+56&M>^+Gch$Eg<59pMfx z9Zr0vDn!#}`Bd8TZ#4B<56v(v0ut?aeeSJSHB=d)jiMXkh9_@awiv%rw=(9_nc%qW zuet^+^e&f^e20w|SsN-ze^ia-#Ul3Fg<3Q0J6z}ws>yFqbDDW{MFTFAW`D5A!j4;< zYWMJ9B8sU&Eo%i+>KVsmygfiT22@f_!L3@=fV800C-&3FH4*nHihoeUvq;m>tv_tA z%U=21`HFXGQfk+kK3M7Yy)q|*1hIum?1>;vsc-WG6(%esyZr44F)EK zoj9SxlP4z4^bNe?jY|ZPC-t@}6=rxk7<=sH3;9_U|WEeosT_n>yF`2l zPk7j3ZZSlDqsu}N_4osq)!tU4<0Z)*vm6NWW`d}1rWf(d8#qnXVOsP&$T9H|m6(hu zKg=SpwX7@Lea;6uGIPx+k5elf-o32cm`7sh{Oyk8I?|$Ylx}-~A6((na3EX{p~$sY zsYE5x9$?)vdkJU_UW|))mJY+nY)-|Y04y*!Hgd8 zI&GL4X~e;Y;+RMCuLRl5bG$zmH7T_&6A*}N&gK(0Uzlsfg%afKG^d#zpi@&F&6C_W ztJOM2Z;|>`{|M4u@2}1tfYIHd1n+H(zi5gw_c2#1-`f;f9}-rDAYmrQD&7a5oWXS* zRbS9adJTS}z)MC})^sy~A6(OXB4t`l_3&kQT$c(=xm}b;qYx6qY&O?&9YYysE6I9L z=Y1Ki6&4{#GOMp$*?>`#V9i-<Xfy^+)_FI6~^JEw~=|LUqUKI>tgj)A- zk4P2nr^-S4jo#MQhf@?mFvG>?^o^Zoz4zAjCc&TbwkKVnZOYK*-U!59T-Z#Vqpd=f zi}b9&SfBAcz`^7n`snvj1Iew-rauDN0IBH4r+#7zFP!ad4Z(wabu-hgCEbZ11}AMN zHih)0q_3OViJ9cri0)6OwM+!Q^3~Slf0v9ftvf7x7B24D1YYwrOt1^HNzvP<@8WKE z+NUZ?9nT3A_dX)S@`ZaJG7Xm;yca1Tr@!3~XAs%IB23d#szH)_o>?_E&%_AeUvpzl zMDS1>LfOF@z)q{Ut6VSbIRLLD!Tu&t@-x!S~?x zk>%jFT13T3U;3B$ArEFvLxWmfR-aPYw`N)scj(oMpD)CcZa>pY-Y?85v9_3Y;1guj z(lFYaC3UrEsFYba@oe!?>rLtN?viS#t4W^BEzeataTql_)Bsmh?DlA3PRzXhtn_Dh z=}j6&+#kJ=oSjr7vXzvr^D$2pHW4r3W3whp!1r|H+BjSWV(8FYY1M&G$!Alt3`VqKH@l<2oGIv)&L;%<#D1Xp17(@raL1n8W^hTkZW=dekTB^77&96`GH<^~1qlfn(ybXePg zU6~XrjRf#vV7DwiEiD0KO7CLP-@Ia zjZ@Vd7;kU?gZtWLd+(q16egyC|P6!9N)b5B+T_x>lkz3md4K8$#x?kqb z>E?T)8(%8+$cuKMn##v+&ABK)hm)Hsk+v!<)!r7b?^a~Xgb|U(7U=Z!!>k0b)P+MS zj5%ROGm-_D#0>JWdOxP_mUck#3n%>x~LC^=^w`Q(=4)bM?cS#0kBY4-$cxS#LL!?q6rGsA{>s1on4e5uK{ z3hZ{&F(X(*)%sh@w;xB$``AfkSpMSz33z?0#NL~)!RQ2s2V#58 z5!q`_qofuse%IF{C!+ zUp6|`d~blwg;My{hN|+^y3H_PTZV6SpWMBOO7SKk?iL+ZzzJX=Yw0ePFM;9l0=-VGE9$UQA>1*}h!v2q141lQ`+A2K$rai5jdfs*O+C?MwB?w;ede*MuL9 zFC&W+#CHattmQtJSf6}0^{!U*Y3^Oas;`^Q#RuVUMfG0nSZXefU>nwA{A#y6(w(v- z*jAlV?;6{pisHnD9bY=z_ZO7wCHV` zO}{2TIqLNZM94OxbFWnT;Gr79{ZVOvM*BY3_MZU~RH7+M8zKAGsqSFM%jK#LrC{)T zi{VxZ+p#XysM}mtoQuvMIi!Iygj=^gK85Q8UTgB8y;66sq_$@1W}*HFU0@ z9$Ryn<16+)YHgn({_NH9b{o*N@q|Rg2Bh#a0}hr$LP-Z;9#GZ$27dso=e3zACwzb>AO_ zjbiDesgJkQDKb-qvx-r%PgPu2_A$TSc zN8u~<!vXXW+oT_*_3L4h7?KX~br~P3WR;E~n^4eDEPbBK4BBQnUVAjK$#+opH z4;^%k89mQ0SXg3ipXf}BHF#FYa{J=7ZPpseMQ;7k``<3@GQF!EO=LX~fmYj$dqOhw z;=vjE2BTi6mRSsIzANqiVO<mqE@sjGG9u_Yxo7HQsmx&V^*SereEO0O*hz{SLs(i*_0km z`88W=POtoQSeTUBhKA->;c*tpM-VNN=&;tR63OM0;hM|e+48tN8E)0x$HT>A9w3le zr_CgO$bHQI^@Y;o$I_nbuT5~ph}qcsB0umi*U9?#$SN}sWk#q@HQ1Y5xVo0s3avYL}xt^V$~Tx642 z$AzJ7_u#rh!)2ErGMy!P?$WsxrVm!uW?s(s?>BY6l1a7HAeP|pG}~CObmCUhWVaX< z`1nRO46iSS>GIhJ7a;HElX1avFaV5T9S%2$$NRNySK>Ul+AZJ zJnwx*{Ab?4Li_Ul3yyZ0&Veezwc*iN_N@_Qu*0MFCN8mo~ zw;ihddWed}fLX8a;KvRyJk(`hzmrz~#9p}}NpN?kt8&VQF=*(De}jX3tPwg1uMAJ8 z9L1-OpCB1Pb7ZL1@(WJ|p3c1H$GN`D<2g^*O8$4i5)xXzad9@{Psv@0ccx*{vsz9X+ddy7Bl_Y>0TR|0}8v^vtQXX6^1iXk)~c3(70om`N1e6)&*kgkf2zhHm=% zgu!8)BsXlRIBjTOcL~KdbC`ZE!L|^sLIreccM^mnfoQ^kUL$bZzjGRyGI2QJ?j}ZB zH)3Qc+b1=&#nkjAXpWp;f8<|#S3;`=fd;DYzs*{*+TK8KHmo;W9xSF_p7%+ya7hsb z=*;FJy-bucINyvC?I`<^EH-nraUrV5g3>!nYqk?%jzAKs{)c=-ze*Gb*mq=mcfa+f z-5hm~=8t&Tf~~`iu_uGi#0NJ%p!a0n81=*y_EPVS$U{s%UF788@l)@^72XBhB;1?H zqu26q1392=Ey#txQFEzi-OqF_dwMwU+R=QpM>IC|2#B&ds*JIur!bZ7QjFjaDbu-7 zM82wG(5o24@Y?%qDn-Dc&Kg4+ed@c0P~El=pU7qKV-|!vM`wdscfHp`P?p!Ap}`Qv zCWjKTxh)jrWF!VuGwRH%Cd%WpCU18wowqkG9Lg z$x7E&&(#lNz7p%1xghmDL%;>`BJYuhKfI#d_# zNShvM1cX`94131jHsjM~!?1b=GrC2#1r#YT~^8$|XAuU6uj1Bds+@d3Lw7dvzhdq$ z*4Ct@wcYTL{EF@=2?yDRsITKIwQRkzIK54F=vh3_ty=yfq&1j8g@`3%M_aA~7tj)Z zx$ ztNof7d-}CX<-`}Zl4jXE2hxJ+wTTb*M~5Rbv0a9-Vj}Z%&f;H`CrkF{tD8j9Z+djM zxH|y^n844&s`m>agwuxG!~5JW=M9R#^9?dNyr{LSMCgu|ArbaE?IKJk_%BSL4zxKl z!5~2p$V|b}4o_dr0H8*WrcjPC_W_43phF9jWgZNRgsT9Ej0r1o8TIBR0o zlIU7PHI_ulgo#ceTCG%f?an8z%OD#c)|p(q=_f`VYix|IbV_4TMuHlG&a@#ytdxug zUvio1VKA~w?%9?3?;!s`yxE^l^C{DsUP|PB(zF<2#R0qE=X1lJ1roM1{@IL&+lq{o8filQf*Jq6!Jc}H~ppxO53@UI#P z+TF_M2#;G464}b-X@VaDTO?nK`qWKN!DJk#n^VZMuI-rF!Q*?Ui3F{GEost2Idbvb z*iM-&BhNT|LfuPK6e4B8P5nQNuA z0{ls=u%MfPpww%3CP4}h@}z1IC%i_rvSnoBsT+6Oq)>HL$_3vDPAktMMI>d|Et@$9 zBX}$v-5A;h4H6z)(ViOBKKEweU^1IP%ag^;!-Mn9j~FnW>SN#TaWaC~8xz|-*PB^k+-mfASP?hVPlpUOgN#V(e?+`^V zX*^xe6h;vlo-+m0S97Z0;$0;YU9!-aNl4eTcX^(>(uajaX9){Ep8rTTmoM8QO=jv$ zjxv$jQdz3|%fGm#My65fG%@iUPiGN*JaVZoX7GVUKZh%7*qBNu!-Hy^VV7RY6@jW+ zI!Id3^A%k&vEE}vX2wBAzLtLfg70sKh!XafGG41awNh?vg#Lym*}-N(=MY>1i1*Qj zoGo_z=d8oSSWWpwq26@Q`sbrrDK8Ms@rnJxLj623_m-NvIPbQ9T{(<6iYa%AB*d*6 zAWF96aWTzq{)H^U+J;%6o(){S?`WMp2z~SihR|ulZ5JAK7i?3J1+S@A#{b9$3BLk^ z{9@GT#z7p3Jv&IgD5K&Z(CG_Di`Ld@?1f*`N>}JQkhlXMlt~!L49@THWdZl8}p}nYf z$fDjV;LlxLp*Qe8l+6D555V!6xpqD^>qkQ8cY2lbhHzY4IB>81)2HrO|0k{hzEBCD zt8GM|`9EG&PN87VXuDJ`qOQUU_koA+(+^$Kz_U4{$*sxv&Bb%R({)f^JQ!GZLZF)O zf4;A%stMa(Y7miOui6N_4M0_W-yL~$w~@(NLFKeAA)?*%n&R!g6E^Etlg!eT72VV1 zW_lZ;=*Y?PE%#AV^D&jA8FoJG6Ib$^j~u#IXSbuH_dK#g*EUr@&kxmI+qE>&{>>_7lR%ylxW(8P-*Mx>*wtmRu`Oob5K66Jo>|sK$li267^LnUD9vf zA*+QrJ<#G7IGrz#_onZzXcsWD6T9(h>5*jbiPW&r8*bbWSxjfBSfrP@L z7Y+{kg15IV3~uyYmwOBGE1t!CW=!^jwY^jnWzd{D#<|YwK{G`C9n;#FHas?uI$TYC zb5-~8QkIVczQ5(AYA!!O+XF3#{b&m7dHD#t!l-5`RHzy6 zJF^jgUI<=-a=QG5CSSXoADO(KG75ck=`m16roETw;##ZNN|$7b@~tV2%AS#| z(O%rIv4RqlaSAJ7Hg~wz2f~kPCU+sO17o;oiOUjf6og0zUb7y%NAFrR@XNJnmE@wI zP&YGPPO;|MlV&pz7TI0KseHS1)}m({6KLFH%PNt=WyGr$^*m$*G})4+RlH-4;}8#t zaezG7F*%4xbDm%f;NWlFy)#AA?eO+d^}}|}sn+eS_l@ZcuW%}aX(QU?+9$)z@^O_7 zZR&Ab%MoPIyK~fMN|I`H;Pk7y%^k1q|oge*$H9BVc zr4BC$2NZ~e>nvyFx^iM#I4fJ1eg^az>bEfnJ*gmmj>BK9`?%{?S$5+@R6hqivGWc# z)%2T~8`x)y97$+15?EZ*E!R`(x8Wk!ZXgFy`RwhyuPjzEj;xyu88Bgg=36k{a!n;B z?qj>BX&a0NjHqpLG5*tAG|by~j(E6ax! zog#M3W{Rf>I2ZHy7;O$cP_*THWd>|dkHY65V&xPTI&-1d3!s6Sso*WhauxYVW!jh% zgQwuQHfgYw?p z7*goI4{X1b_B|ie8)&!7`G44#EjqfOd*0lnuh}$I|7e&~3oSEpacO8NM3$SR`+Dr|1@nZrPLpdM=|Ilg1 zJ9Yb40*e(V zQ(p?uezMVo>3#3AbyA_@v;PDswbi6IRjsKp0A#et+OAP)Shd7PcF*c7bs`SExRD{t z5IQRwOE6GGuV%w<3lAm}r}ZmTi$wrczqYKFl!$q#u2hrnR7p3Fc!St=YIPGEp)0Le zwkjji-dhL|DW@kz-$+(S!bsT;f}8HIs|fIZ2~)#$ueu_N1t2C=M6;eeUs~Jorl$yl zV=R<%zop&Vj}VJ1H}?$Y!Cld`@4>?FnkiX767E@EqbP6ROQOl>A5&cBj=$A?cUgor zN*`^VRS%=9GLkQTcBNA7oMjol>}$xqtPsRfY;~i&ZfA+Cn40kygneCCWHnut2I&?D zM-nt^;WLD(k0O_zamg4X7B^^yGjW=vkspWD>l_g1W=;jnqI`Xwk)6;s7 z3##(MVj7(;lIZ3#t$T(Kw?0)t75f#m;ze+>oA*lcwSuqnX_KF9(T2yMD{1UW!}B}~ zcc5l_JBQ=pVOP>@QgN=m?FFpVOkPIdf{P9 zmqaT?-RS=0F4x&&^=*v==ozI(Ziy*mVH4=QK^lCg#~b2NJSKM=PI?Tujm(Kr-0D!4jME3R1O4{T9g|vA=ytVF;ITY@))@L{T6e{qR#eMvm+EUI0nwG)AZ1 zVeWvUehbVpiV@oQ>@3I&Im){##Jl652S(ngQ9_`J`m*upCqmHNk2&}N#gj^mr5POi zAG`1O7@2e7H6#De?5He#JJkys@NWv ztf$wE^Um&ObCjBDmZ4+BN25h%Fva6WUb7K~(~+y4@BtwR+Lbr+z4$&NTaf{W@hDwW#)Enc5U_H-2Q>%uS}fgFJ25-8j4*kE@b>E_SXf;FCc~njBeH z=9)aHN%JsKjfBE!T2Mcq8#q|5^q!<+O8W&!Fdx2sjkSH%enM7Kp*%KERLGko;Yh9< zy^U{Mlf7>j6*}?`5Ym3IzSJXOIbIR%6DR6HMF&VW|LCDb_jgbnwtzEd?Oke3A_8-9 z*x%Al_&SOsWZ3)A25y+XXTQNoVjMW3;7Cak)4)=1#vm@d;?)VH;`sTEC7F)7AXiRA zKgKIcu4tk@Da{xZj55y(OhXn7{3f9~ zTd;}sr*VPcxl?(Cr_jge*OwHi7PQQWwoEhOASJr0JRc{PHrz7=C6TccRMwEBYD|W) zh=jSK7(Zzr{U@2trLUlPaSYZ+%@$?6T{)VAs@Ui$gERkun=`IiZ5DL%jnfb$nZZ*5cy1iBDvt!~zUyY{;$ZjJm8LrJ+N~&)S2|qqjUf<;*K4ME9I5w~f z;W&oe%fk*>lGP>)kOqu9lY8-iEb8Zd?h%0%MOTB|@(AFzB6IA6NFuIJTa%ZnYua>L z{)_`FQDLE_iA)XwFF^#$u030%;kAjpQ)4+($Wy^#^6`!I^5s4I#ReeLyS-;!)$)Y{ zjf@Gdq@-fm`V`|;`E#x1qpccxzbda=f+mCLZ#LzfR6!aG?{d2dl{A5@X>xTMXWC%^ zI;;>;`$xlu=`#J5k?EvQ)CW;QgtC_Cg&q&Pw%RR6k_3E^Y0{5%nOn{e3DcUH(CM99 z{Q^-&e(J7{dt>F@0ZAsF9w4PSbJ@JnGgIVkw0*`=7ESf9qLoUrim|O z330b?J#4q;c-O2)lY@*r3~T0L(I*~{^)gA|>CURu=JA)+gm{V3v8B_;O5RBudkJKC^m zkOtX%as94UbnD~_A97XJ>&A}w5ppRXiuT%g=S99P}5AB;>iwPhG z0R|>!(r$+o3zG?m*?Milq}+)hxY9uSk{@3ZQU)Q3r5y2Ti`90m{DKYW(9sY`{o)#H zygu-FSjUl`YU5@0O!|!L7mm*7%q98ysmC)4vFM>vU7q@}(Y=Cd<;2-l5fR`qOM_+P z!aShkR~(O;(nVIoN*4l095LxFWcccI`@5*5?36-iI9n?C#EHnnmcND@ta}r&t!lpL zLxTx@bUKCnt1)X0>e#=-TF#U;G{M~cEbBQhTtHnfUM4iZcM8KCIwB{V&-qcGXEl%~v1t=+KYT5V9IoJdTxEUc06((%ff zU5RW+A!kJeD&+?1(Ggd2Dx4j})}1^zN_@D#;)J7(hH-wuq-zG9M}eHfqt8A4MtJ)8 zMalcmFvxPz3D<9RAGelM-zSxCa=KLp64mMULY5nS*x)V7S7=L}k`>#yW~#=eE)qDf)7fNa$^-`>)aoB?)kIq}C^ka#hiNC*ook&A8+3 zqFj#Y0F{<HZE?NVg##f^Q-|vEvi4&x7`jjq5WSTKiyG@sfLYE0zZDXc zMZQMQ+P(MZEhg4WEI*+crtZwP+xYFr9U#>N&p!9c8((HIT%k!BBCfGiMXXD>T7jF4 zG8sBR;j~3;m&aX41aLNe<#xxdd3I8@X6~$c&f{!DL#ItB_bwN`EugYh8|EDI3d^Ue z2O)qZu-Y5DncWW#)oy>;_QIdAD`i8>UCOaP@5Sx%P{B3vy21!5pwqyhN>Fm!x9yr& zF`nSc-ws2SSfDpb@EsnI!dL+vSkORfL#R$0bgP>rx$eD2|Bm@^&A^>l=!D%q_IO7h zPJl3}pT^!-1uVBV&hik9es7qP^y47j7qd;XKS|LW0Q$VBMe{2|fyzvD3R3h$Ot!MI z2*?cy)+;$k=laBNjg+)b2Y1#sP%$)HD`*r0K9xt=Dz4c&W(k)kU#+9PfZWRM?a(?!cfSYfgU{8AV{?-|JsK4gv*=*m)5a_13^Kl?}{9Aejr zlwyPoj}q_u{K+p`qd(F9ONi4=lHV^h41h#)(Ohmx)@Jmc?{wtyJ0acp&+$jD@khV+ zG)b<^wB?iiP>Pbp82JeiGgGmw5*|4hqgOTZwTE>ZA1RFC13Tnv4UdmwBHSGBo+a5H zPUb6BqbHj?7<3{%5(1>$S1=>To39C_lDRAMvF6);FIj0ggis54Zb5vSMn zsXA6v(oCay(a`aUu_J$l;Zc_E2ZUNVV^=80A0G&C8g}E$FAs8`9Ugz}|1CA`$|M1A zyF%T$9aXJ{uSDyYO@u&3N0khWyAEKWzXo?827ybAMHUvY#O<=4ZYzuZPr za_@u*GdjbcPfzt`1??rFjr=`nA#8+GO; zOcVqe;J}WLuv-GE@eyv!j3^4jrd%1r!uHb@;^XMRr5mW+0NM!~RxQ4A?S+@Fr)&$C z#TeqJpMJ#%-#Js~$$2$%+ej=O2W&zW69c-dNV*PBYEn`O+n4P=&i_+5Gaw#FIs4)s zZQVuGvmR9&PYjN!UbCx~#mvyE3+Z~H8`-y(xQ$=j`dk`*#T}TzmZ|htK#h%JG-n+! zI+1eLmXKAF$%=PwWrEa^{ASSgamH2B;CNgBIG!cZ<&Z^HFSPGu0O=klZQ$D37!_*1!gy8Uv~ zLT1y7o7si308v7jU3HJ7t%|lp0`+5f9y!jPKrGj5=J>i3cY*!`*m5+FzQe|;qMTAD zoWy#=MZSWl_6tom?=uCtmzVh^7^X;^pgO;HHb z9*WFhex7O?3ba4Z7fkIfV}1a)+E7^pyPW>O9sBWZcrn&3qP47Mxko{2I;V{&l2<%$ z>hn+bgU=B}JRJah&`NGnKq@UxQNl-=Y!}y4MA|LNWnS8yErA3(PdVh*Nnv!_(P$?5 z_E#r_qnHC3y(!6}1alEzfV-=PNlVz4L6I_yqGzQ#X2~T^=~QQRWwXQWj7rItL9CL|k2+$sUk3J8#ujlz z)H3tSVvKRlt=@<02S|g5$g$lULuz|856$Q_tt~3%my`)>R%h!1;BoJ~cub^}xmD$# z#R?QTXk*UdBP@ZGCxahs|0q8c-*!b}osLT%Fi#skH2=zaQAm?rbGUIL1vt>^pk*#^ z7*~*_vO-1md=@1|ga_xC6Sb;Z617rN;`b8dN^LH@?s%n3qp`lU#cjE{Yb=6{r(4Cd zieO*1IGeT=*{I_Ie`t#0R1-Yox}(%f8!C7TFa$hN$(6<`GJl_aXF25Fq)`14(fG$Z z0V}k&B@vku?SOuok^IwO0zy-n!Ml|svh_moR%O3uIdci<0l#b+n`ziaK`MV>8Ll-9 zIufB6iHU69d*AT1RV7x0OgoUn+9Laze*{;1L0zJF81#_fAPw)_;oO20H=#uak8zO3 zV2%-f;1$|%C3Gd{T3M^BoA%3J%$-mq|wOKZ8whowt%Q6#~2aAh@Ugc4}0T=#jnV0E!50`q0niVx^isd2B@E`Wn1cusz*1f907*M!ShPYlGn8UH-JtZwy`y$i73*asFdNuqU zR?0A2_Uf-s!bCrc+JH+8H_&6GBGR;w(aw|wqebYP^So}&(c^*Z8{2{fg>nZ+f8-z54R_2H zAo+V&)$86Mnp`!ZP=G#V|MYmS+*&OWM58~VyTV^_BUh(#mYDa(di8)vC{*&x*1UD( zboIVT@yaPzf>PFul%uxMsZBrH3f17A4HOPiirJb2K25xB>kS#qO@s7*&H{)Ffj;_~ z5rc=B7Z6q>0FQoFGi>uLNm-?34>FdjA_)wiDH#)yr9Fb@J5a4hB27vQP7hjOU+p=H3wD)|k-!qg4iPN%V1Nx?qE~G!8D9_+ zUq4_{d~`Vbz_k?C_MNjb%qLfx(r|!rDeA&dhws3j4trXTeKob4Lh7&LY%U$BG(xSb zI`x{L44nN@g$hjMI(&{|s)r8bdfR=C=#rEsO8NjXw~V`5)#B3-cugjPtbf_2wNF3iQLXE+U`<(wW^E~&Sh$O+zIvq z6b79{v#c2py@|))z{AfmIuq7ne%y%>tzBP?EjubZkX6*QCDHGKM0$M)Ao#&OcL5lx zb4HGi9Iud(5HkZ5kSZ&!`G=`p1<;{F=G^4kd&8wQr=M1v|MZ@TjOITuZ`rQB)?=>_ zT_fn4)DRM92JK?6s3az(T83%k9N3dj`_H0T$68GUOiFG2JmK!A6cjD*yRjnN2#?^! zup7QWymRmg<4rA&N~s;SLjuPWjhQGmM;x*@hqD_2RGYL;Wm#?g1dvHmAnk@Bp{CRa zDs+*qLpN^4bzf=D@g9aNo^nl5$LIw|6||JoZYmJbTK-4DBj!n(uwGE<8M?zrndr&m z9D|56q4}d^{sR{0gf5h(K@l}Y^}x59tI_>yTT)n( zv<3s1-s&%iQp8DhaW1F>yFTM}k8q*-G))OPM@-zLii+#6sh@XTjfmHDGId4+N+);; z!{4d-19LKxLs_}1*}_{NO0!c_LNK;MrjZ}Ier1=i*=KlAYtIPx!TehTye)>@n@quy z8Ny-meB+z6fq{ac^LMJmwh8D#8dmXId71J3~Tu-{}3X zU}{YRr8+pKUV8No(Q#Y4Dyl8eUeLDcAMdH^fSGCS+3tv9X6gLUt?^yr!A%BlP+~Dk zreH-RE`yJ(!i_<+WWyq?0_P-Le%j*XJ$UnaYN@-Hx0`CZkqCX^)i+P;7=f(`KE4iI zVt6gLQPW(hH|MMO=e^tWAshzr0ZFq3G^$);hcv>zLQ$}$>Kxspa|~lobYhAzb|&E{ zT40Wfp7}QGeHw(J%fSd_B-aK(@01o15EZK_rt4)F;27X$L^-ryF{8gLk`<_F=*N<+ zI%7GM8TsXKN_(n|7C{dP(Bn#$pPNXO-Mccnqlgkn{z_qf#4vrvi>-~P^FGy(F#EfD znfT?0qg}sHtOlWY7fqS;>}EQ;xtskY8vt!}9;x??oP2FbDBApIC^o43aN`}@92`hh zHDlWM#*V&;#NM`=@9(XyM*KfptpeHV9MT=Zk~HA>2vig200m&GOiXX5-CdlOY#rhypV8aJh`Y6KjWt_1uJZBVweC zXjM5Z5~HicJ)-&RBb^S3)}^z`c6)?NJoKVlFjmdju;fi@HWylHoqUR3n*a0NfJ>U3 zSw!QT8h}id?Q?llDMd+wpKAccmQI{ekky(z{mc(Df-O}~s24%Z>ZNW3#3h;Ru|lHw z%)yFXpQ3`S`!fJ?(uDcGtG7juA-XNgO5@nP=q83F#YJ>*NCF+Y7LLJ~f+Q|pieLEzy*Gln7CaN`qE z@yebib{(7c?rsH8n&y(WH?HjIt=?mS9x{uk71o?A$+@F*-@4YY;GF{jl^6m4E(S5~ zb;{x>-a+T<#TP)wT5a&`F@5v0;4`&bRTz3Bc$OyCIhS!jLVt;pe1-=ClZ8>p z<0K%^QZtV(r0fQ1fJnPcLgK00Sp+`KOOj--CN>vx{7zExGlb$(jluHith5VX%)}~V zkO}l|Zs&_w#O*JLqkM7~z^|k9YEycZio2TCo&yv&@Qudv9@?r-`Fm1UUHh^`khF{9 z3N>A|(XNnNq)IP&`Al_GvVA&Jj-Yr{V3In>G4!-Zs_0Mtz>OOa5 zDJKB~3%69!6pL2AL7V-cvq$~W!9_j#7i$?&_v(N9gBjFgGaTZEMAo<3xwJ5*2$UU1&`0&L3PHx?Qjm;`h1mqP_C;;MuB$L9?-VTz|Qpbk5W2ADuc9%?U<<;=R&#in$xw5`9-!<7)bJlOt z*YK4=$%pJ`rmi7(9|b7+w#})vW;TAnLz!=Xj2>+BZQX#-`0tjG(K~pEGF5ne+X&s7_b0SoK9)R-Kf1jk3UEl2OZcDmiJKsx>&mF zsBqe@Hk{0YE`&2#^*syWN4st69iP+KAMYZ{ZKMc8M5Vpj61Q5K^0=!R=t^wPI=zoJ z>gGOvqWBfh8OdH=2 zxn{syxn}b!zHO(jdvPn2(F_qgnzr7svN{4C45wz6ytukIf^a(#Hz}(s7r}UU=ykqy z53ICT`HPSh)v;;`LjNQTakux}7pw0e?sl4R3IE?(&+9E6xb9B>A9wRgHnvxX2vVbg zr3KF)2AB=(ERIz{n3g$&(B7*2)7TlFMLWYKH@u5;F5XRWjKtdSpASb^qhk}t0jt)J zxhKK=ypa52&IF|+UQ5raG0x;LdjRe0t=I$w9@NoTVj(+PZAKj=t4M{-l1{F$XITPT zZ$>##9oJIu!&Eg3CABG3ZibyFTc~Pbtxy%r#Xq#gU)M@A2MEO3c?lso^`vqT#fx*I zo-!0nqh%GevYpX1PE5K%da<;Z4ip$ICoxgukAwq$Cwha5NQKk^s=bDdd8ZaZ8X*yo zcYI4g=o}E-q^r>g^pR^o_&qfKTL<|K)9-!wdp%Uy{&)C+tcQWLGs*g|0Y7;~Du!P4 zSBqgo?pOnALkC_sxTBp7{PE2_Iw8APCy7s8`Pyw+IYdwnygtS>21vVWLfL~A6#0`5 zqQvQtf2k*aLj%|_Wvwtb-g!LRXc|rk>TTzg?+L0lTm;p0^xlllAHk{!Ceq^=@ z#B4BG+VV?6kxR0b`uo)`cJVz3jWvmAI`qIOFd?z+%o2&Z?k{tcQ9^Xhj~y`-g4O$9 zSH&lqe#JM)>Ybn385}DeEm8Et&UP<$otTlLgKlOsZ)TTx2o_E^yjGDXb z*AxFXoTMWm)tfczh!PbfT$EOh?~VS0h9J@#`@bLcXz2euss^MT8n@)+(KxW0W-f0S zfM4p+|C{xfYRo&n38}3+Kul*v zU}!^>@R~3wEIhd5o$^g}0zCM5Ak%WJ9m2C@c+?nZ0<+-3K;ifyh(-R#FpnWF3_cd- zIr#_ybOXV1F7OaQzMFs;A2K!^32lp$BZxZi-v=;ydjO639C)xkfX9=y_3xZ|J}~mV z7~<#1q?cI#37HV^NA>onRG+?hqETyqM#A?PW`6rIb5VmMF{H1FYMb+>4*y4Cq49QU zB{M80u=UX8kEsjm+bwKGCL+t31#u7x@6!F}ZXp{f2dRcRE>Dvtq;L;GLKxlZ*uRqoPMyY>;RpAr} z9YDH zp08-yqdyimF|L3_(O$Pb3|ZG3H>g?cUH_D_Wr1ql!56j!`9=-C^pP+Q@SjGJymqFQ z6NC--C$r6Je5Cz-5dpdH!36 z7H_P~95zumN5tBgMTCGu`*rAwXtSOi0iGa74MM+)S$60zP2|;Zb6=2RpEM1T%H{|v zbUFtTMspO^zo-878pCNl-*N@%OP$7kKK=0j6o`}Wpki*^%MOeX1SM8CA!5kiQn5}) zhU}t!#2co=tNH=ouV&s+b?_@s3?c5w;fUmmHnk9Ylgyv442`$n#%G!Cph7cDHr8f- z9`(dkoY8&qmywngu@YzB!bq5&wMFC?&{r(_8q}*m zEIGo!!8fbVR)uIFg2ZpSAQKCno|ks`Z!UuLHCZYH61}CEu~-uSYq>UWCS@a@Yr_v| zDIo}+X2qfn*FbtaqA+NSGh%JiZ!=#77J}vKE7L-P=&^FFvFD=BddF4=^q^?+xx*T= zkuaYt=rc4g-Je}~>W1D1SPoSDfq9(ks7^hN!muqL!7?6XvEbhB^AZ>vqQ1Y z{CAw-Q{=t?DV7X7t`@D&SN3{x6?}?Egb(-hi6@OAiR=F8Cx;pd5idM$=xPD?QhM3c zlhC#V()GoVg|-V!rx`(lM1U_JKr5>d>s;~k^Zd`~5rm-^gIr_z!T!sKFF_oi%batc z!i4>)v@@|ly=!2HX(~t1XPnm%e6`pIr5_O`6Z;yYC_(yF=Su7j{bOsL|0)G$Yr!da zSsl3%ZRV3cMOFN#_i5_tIMb@K|MaQ0iaR{5wWe`iIa6hpyB(;ukyTR@GFc)LsvNC6 zJQm{IEc~q4+D>IFc{O0CEc~s12XpzJ6c>Io*W%y!C8kels!b_EsZ@Oc7mylc^|~%r zF8>HAQ2vJs|7`&seCWD!H7|2d7l5kAn>w84*}>~YXS$6&O1}2p0 zOkhgrpGbeniKsMTU2xi`F4$s}8?VZxa%?mY;&9Y2jRHcFNmSl|{r@1Ex4A#pxdF)c zkQi$y&n!vWjR6#UCi;V{^8y*`8J+ME&&iOZ8If)IaDUHS*iu$=GJ~0OdBkHP?UlZ8 zrH>u*h-D1wN=4qCcOKNjas*7Sng_eZYt+Aw9oXKJd)OmtUv9}u*CJC*7Yuw|p9-6W zwnRSt9V3gi2VfXbv~Q+hqN^~le4lY0NEJUrhv*YGY8+^+PlLt8zxqaHRrP8GC z?u!AMswzjXcod;^OgsCPMEjCp1_lq|4e7gvlw5He$%Q5M!rxU;)Y_Ne>-sMs2wnCK zquJy?fjmd-@0^UA{NJ1$_#|7)OzyMx4r1Hc=7kpXQhFVt0r5c~E;?gtTigGn+G@G%H4x{|`Q ze2U$wC#D(O;C;ngLa<#9e=12~-WP7_BcChei8;T+)}Fc|06 z?>R?Y*1y#kHAt)v2~4EjMd|->QH_fAn`7{HG=2bH<4E{>5vS@j!5-n(ww-+{`Bwk~ zvC6TwJw}~HY4<#ObVZU%!k|h=@C3k;1688p1>KcIYUL18@!bUI&XGV z^|Agefx(vw;z$U&_&-a2JXOS~J4Z`~UKViN5i~P@T4)>?WQC@TwMzJ?+VvOs7`68% zvAHUvT!D#12EP4%m}w;sPHTk2SynUr%6k8Z1n^y{BsDPZB&wCAjZyDsI z&S3};rD_f;Gw25&kNk}m#C58uZlt-$D}O!|715t63%iuGqCMgTgi@w!i117go>f~M zD`&AiN}CkNeHg?9Gn;-(!NUBNIT%f0xQP@GlPUd9@}tD}LiRRCVENNAEsS-)e9)kKc8UA#l6G!Xc1ooL;KBt2oaaT zcM;EOAMyqK@X~KN?=g%loS^oq9>fF zr(e{`kUQ}hG9Am7`a`yLsigXagUV%&JA_J5a^|G2Mbx~K6ToN@$zsD@+27xi2mO=Z zOj*yCAKKZgF~G?B5x2zUqu^LT7(vR+wfaNC z`%Nd<3N&hP)^i<#;199yWB=xm94Y9M?pqAqIeMCGT{}^XCDg~>!2{#hB_by`>1H}0xT6(S z7G^UYBaHCz6>cZ8+AoH)LmJrTL$5U@?1R8=#VKU6llKXw+#&j_Z*keriw)FLN~S%~ zoeP;2fcxVt!SS#@(e&3usG#_#=Ku~y6lc06q0Y}Beo*4Vf^uOLUq3a%c9Q(XB;lrW z3t^_IzQuWqHI)(;fFZc0XlMbz{82{o7IAyR6dBSQ>0KScQ8|yTz4Q%UT-6!$0}Yw3 ztx_DyO3<;FPKFVMg~>h6a^?ji9;RFh%Xq-H@GNa;s*_i*L=TM|slb&+lj6%Xy4_&| zMCYcf;b>2z#M?MM3KE^3Y}l(Mia@Yq!wb7hIT_Os_IMao`GFasul~7twj||nRuX^M z_uK{>$yP`A@ci;++0!!KL_Y)xX+Yuc4IUPP`;7q+SfRtl^KNZ03e2L)e0q8&O}S@{ zhfOsl7E_T4kEBde^`TIun=lq}n~#S>tfn;CN5A)}B8R;2h-yG1)AYN!-Cn2jf|Fdg zt4!HuEEEu-m4y*7kd~p5gt!=^lPun8i*k1Q1j*spLSzK`ESrzoND~fZhzPPvr zT={PadKp5Ml+492^27C#g$hKDIt_{Rgi|+HDfrN!yZEqa4-WBz-Wvxi<%JJ?eQLkF z+w;GrI+4Pi(k{bx`|uOfkdtg;E*YCQ(L9KWX-wYswmP%&~l} z?qWOVzXY0BmJU*V+UsF|3iKnSGGq*v?9chr)Q?~8#eCywJTaF7VaK-<2ngQCC>~7a zs6}v*h)g$y(6NU2M&hFE>DK2c4QK_p7&H#J=LO#1tD$xygQzL8H$|VLV>vhV6(TmjZSJinjy{Pz6qv4DzAV<^z_56Gye7#@!PdW>4(ME}L8di8CX zAsDehsP;HnN>$b+Ev-_ipK6Y$CTp6@pUfzQYV!8wdf&gGMHdXrMoHV;*nJS$a1mYa z(JA$X-yQtDH~*m-9ZH^niyBVN-SXmsJW&zQX}TvclM@_PQ7sC+E83y#l&THHVgDWU zcqQ&_k0H(45@N&Qbr9E?@kEzK9YVsr^o_STUa+H_ zHKCB}Df(lPa`0PGf_*hFcKszB=4Onj*|br`rB^)7ZiQzFJeL} z(4uecY_V3EHD>O2G?4!EsdRAHR0jXNt0ufME>-UF?oFaxx`{FuR_~>v zG`^q3$2^AP;UmB}jNAwx9{YJFx>Zs&lWO_fI7{7e@~IWO%9#r)@mz-VCTwiUHy)%FS zBxeVuWWcT*Vp5c>!gVuEI#X!~N=@9}?A12m7dG}|xwtUn_3zsnJdA~Gg=&<&c z0SbLTb^biKGDZD2Uadqj9zz%yQ=(#D{b5rO4Eu9_U8HM)v**gO>D;D|KiABqG68cf z25a%P@15Swn5Y;B)ZggT?6zCX7tUtm7W^sVR2m#X?cS5E7O5PwDMTnfK0mhv3xEfI zCrJot+=i@lh-Cg0Guuj+z5W)a*{xTGfF}z3}5Kw}zo7WhOO`xsRFM&P3_Tlk@s0%@H(Ru9oc^^f$bLZN%&Or4ZO>g0Po>0vdO zLJikNY2f(sPObrpLTeaXBdn`AP3KtBvev-}A*21_Q-Wp1sa^@?UlC|5csp5yQV~A3 z*lv(Rw|Mr%AvLT`wfxd2F=~ck2Q+1IJ~kjhz+$TZH!aBv2M9Pwi!-6H3oMZ+rH4(} z$-^owsXXf8)8jfHzCrNoVCsz+_a)skRBV)BqU*F1ipZWhlAP$NxOS4!2T&8EC|&wW z!=G+`Wrsga^(^%Xj<3Fo(noNQBC<)%l4%f@dBT%>3)d8V4$C>8S-TF75^jA*r!n~0 zM0oc}KOxAeKcXqu(}TQixml>qd03x){i1)d+S2bUU*ix!o_jIqRc-YF#~Td0n=!9?>*sZ1u#aJaOGWNI^EtJP44RD7Q~>RIixjx(movqGqV2e)Z|I z>i3X}wyGvSRzJG&p_W~y({tB32`K=oE7?V5jM=ghNHYLS!Qe(4qWW1e3Nt$~!e=(u z;lvX)h%dh*o1f^mxj?CbNW0GrSDLk(=;KodFleAo)U()+&NY>8m92r3i!`y{4tqi3_i5n>wP zl@gHV5YkU$a0qn)rr>4{hmXzQZ9o4C7$)v2Zs<_HdZyDl&vgGp?|=9QfF^&gR9vvI za$twD)Qe^Mdp(?_%M2b4jHo0?6+XO}hpn{R3wWVUOfz-mTkmJ2+F$HS(!cWASOZya zp~S5ii>cCD*Tj0nGXE_7|8-dAY$&KJDL~=-T3#gu4g2<926-k5IHbG_z;7HK{~MN# z%-vL---N9)hByi1uzyP$?-gbn!rvD8xEgjOx^RINm!UuX^~dOknm>Y)m)i@Rg{81& z*f)%cmEs@?f09K=K7&T%lvx6I`Y4^?$ef|6@w|)q)-K#n+J11sbml_kOntWKC%8PW zPjI=}f`Zx4ZNNc`hmf+V*x~=X(7`~*_KI=*xPo2gGx7}*tPvM{D-^gnR1YD7#DkhAuz07KGClEU6o;@(v|2Y z!4MWjQb>%XGId7Zmi=ZHn3Oze^R%%Y0GdISt7oJ|C!_kU1*`8D8svaMclVAnAaeFY zFD@PWg4C_0sekIaBqxGH{8a18bdhz5l0VvrAP?Mo!uk7(zb!WY(jA4t`2C!mzj9+* ztv$WmS&5(q8$AeC6EQpgEcgk*oar*RTg>AGIIs!0PfTjo036eIST29eIo0t3jOJEj zL)Mq|KT)s8>FrVu2eTedURmWDe@}Uzs4QhdRVp`^Sy--|z0#U&ASeT8_^^wJ+7bp; zyE^Y0e}GYHZqln}l={h(aJk_bv<^GuyN2erwSGNqk| zL+K@2YbV=Mr2({eUaDfDOnPsF%NlGY&i_^>gqf0-`bA*=n5c;-3bb!+7=OaQ{qFnc zd~JZ>uOm{WN0C%4%$OyH?V7w$m&W23yAvjplgK9_Q=*lhh%Jp-Q$UI$Mcfu2rgP{- zLAGyCGyuXo6w{e5)+1vO)BkF8Um^y>use!;sUhX4C0;5YF@It}hQ! z{mN&d*EaOX0}i#JZ`-zukVY{8MuRlzG~|1Ff}=hV!JQFzGaa$5x4egl6g&xHB`k<} zy>XN@uWzkSio|u(VmQmNjg2$<7SU==u)t80-;sc;ev7co&-@h`6b23crCP11FV6Gmd5JCu%OM$aqdOLHZxA?^#aSVR#1CItE^T zAnMu?U#ey6*m_f92p`7}^~QcgmZoBM`_A4!LM9)BuyNNFkH&!mmiT@~`5#UtxfVSZ z{r055(`=j?dTI>ZfQqnMIiJlK&sF6ueJ?dU0h3pRVBO`a?qydSHQnGU`XJ82c~@0=}5+q|b_c1#la7!!fmC2e-ZK0vck zl|*m~O}3VC+kNmedDkXq{I2b+Pq6LroUspQ-i9e0afWS%MPm4YevS;+t~6YWZbrSY z1e0o0S!`M;@&|UfRms@&_h8Z;L%s*hC>eJXS3O6v6mxD#O*Rkn$De+c#`mQLD!q<` z{}}7b2MPjAaF!T}*iIO%3W4cRxVtwoc$EZqM+wthKaq#Ya*=pZ(`w&J@n9yQWv)E) z2ZvMO0LS@%ki`Y5hPzs#zmbf0rNGWQWgMcgj%<%tDC#D<)t_Gr1f4DbF;ZuyQgd-k zIqMZjcE^E~`nx1WCoq5W9^#3M>V!T*{)OZhdz5PFxib@l-Z>T{ucya38}G7%sz6!u zZW*Im@B)hoJC1N^V)URFG|{nqq+!#3js!bogB47>=&BnvGSP zB9*nzj6}x6C_tBIoNoG0Y=@0nv8I?`@B3UK{Ejd^B7fq^XIiCH9vP)(?#vFNknZgA zE@M*joN`$<;rn{f&b)xF6o;YU{n5A1$zuM|=qu??ZWDbS@zNN1DUmxv;Z*DN!Zz;` zqiaA1N9J~CANn5Gne@^%`0Y(O!Mch4YoiaA^gSJN52h%&#@n5PQLkq94KXk!nU*+K z$Q)ei)LW#F%Um=2|BSf4PGkhIY$hoIzvE{}n+uP-J5V}F>uc%@L#*@<`6cb;(PCgG z(We$DRg7-L7l2OOwkqDi$l$Ue=x?Kta@-t|N6^b&=R^S`Gs07MvLi-gDHXAQWpw&y zjCrAA+yyuz{5d|;60K^96FfAfLTG2;u9k8$j$h}oD$>MO{P<(A_a$X*M%hfey0o~K z;elNNpXf0l+GC`cb0NUn%vg$>a#$*+Il>lWbOqneBuI}mbL0|f4B_YM`%KfSH;&Oj z{mDr#WrUyV~5y1FB z6~Raz7NgjHqGQrQcHR*D8d87rvJWrO>b(;@J5fP72bdNcqMSL|nbt`^pt!WW;5^o^ zvpt>_w%eLivDsEmIp@b{iwcaiJtIx@8EZVlQ;_piuq7sr{W8(LT z+?3Mv^SMj9BWv07I13hU(G4Nq*ne@09n8b-_k`ko){sZ0Dws8?!6VzSkG-ikIr~UV z4w~XzX2AjPiu9qqe)-D(UZRRS?{3R(*=KTE@&j>-nm{s%s3S;HwJwwxt4szv=PP%7 zi|^U4*f&oKW+<`p(hh7((}WEF=2c;Sz%oG=GW#?`4QAE{xQfg-%}*(Vw$u1K1C@pL9dY8mYm+G8x;L zFB$DLf(CVfP{oVaavnH3^&387Np}n*OC_qiH5(JrP-+H!wcblp?IsGg_)vx5@ z!a~zdUsTvLs^qKacOU~t7Ee?v4%xu$+gH2pCgev0r&ibO&*?lry@X?tOWuY6_xk4kndaTDn|i$k?|5+f*ua@x@F*{9tmNl071hj* z0DJoKZ&1G>^w;@N)j_`YrP6wM3^tjC5>c&Yu(940=A5Qq)aTfOa?XsQ&`T zl20%(+W=QoEzwWDwCqaShnD4CWJL^zqBx@?d}n)l5M?MDUg-kw{#V`K)vk6%?*p9^ z!y-JN1`LQ82L^CXDU^TID)fS;1z@jfEaaDHebXIhe}t;fpk?{&-1-W|jqlj05f6|A#Ut z@Pss7xe>`Gd{COTa~j#mesQk0S6xrYLm&yxV*j8#WOe6#4dElkp%J zMm>-t&kto7vn@w-y@=qq{!GBCRHxFp*tnp z$WBRU0}My}=z|e}-w>=3Ihy2p5jz!w3$8x>QB~llAsFUvt5uL{5=?y%DERHL+T;$8 z1Ut6UrF$1I*VaXJ| z8aZ;c0Zy+rf56r_b#p~e(3F~WZMc40Otd&xze z*-B|Xi6B=_oE0%0ixheS6X%vMRVh|nnHmyGPt!tQJ7()u@05z8H8->iBJ=eJ0<%Qsg6ZVr8bxynhpN zp!1<&X+8q6{BVV)nrUv+p6~=x#PIbhhFlfVhY`f6FPcE>mkUL{qZptn>FbyYN&m}H zLW9{C@*x&q-X1ONLBE1XcUoGNkHq-3lk#y-qHrhbHHOz6@SB!Es&&iMS%QxxFBDrg z8(9ZWmrL9Cs+*$}w<^A!@M{K6c+Hmj)>5CDqcw+s2ikmT$uGhoLU7L$k>*Kc+>1&L0ti@l${(AM`3*j{=%Gh< zr&x1T-VcXN4P7zfhC%b>t9FG9S^K3_<&wOXxm z@=g0y6i^nl$&*9+Ba;LRa-t87oB|Bmd5+;BW*+PQim3O{y7?*mtwKaij!2CLUtEKcHuLKHHQN%l&VRXSuPL85Tx905Qk*KNb5%;B z^P!N(-qMyO$^FZ4TGRa3h|)4d0Vxpl&!|aT&A0<95fO&x54eLZr|{IzS_-)l?6~ki zTbj|LR#c(ml1A-dc;Iuff84bB8)$uEi^?6O<?pH+ndjEods)xc+DZ(-L*t|K$bV_CSdv^m8iz7H$3Y z6)XM8VX5GrqXY+F*A?-lstDXxWXslvYdpDY!@O=z2=n#YU7R4KCT`WPuR}$B+IUlr zmz?ch=v1x#defeJZB27NU4xZ#7|6JAQrx6KgI4}Sq-Bs6w4Q+Jdv5H?ne0KtdmQXw zyw*yYAZzY7^s@^60FAFxj8N}8Ag6Z^2>UL96FD0w7G$EX$M-y#aGeJFcjY0MX|!z| zfb`fbt5FF4jYDWl%mE+=6g`u7yjTLayCpyS*5y##MQ|aC0*m~Og)9g^V1P4oA&%>$ z;rmmq8`+5xt}V%9(UpWn&ea==?^2QlQc9K)xnXF;paTsoIB_g5QANdTmas2WFu9XT ze3Nn56p0_Cq>jDcdCiZmY#%kX>Qp#9K_%^6-4=v!V4MG}xQ!(?m-v}68j1#^60o_F z7aHB)Dl{0Lf{fFc`E^e$_?Lc_Mod1D->FROANti*gQZoiuY^b;$X6~UB^T$=0hQNW z?VM*C`%5A@pT#iaiwK2$=*psQ?AU}f<1BKx*%Ds7`uZgn$D!7soP|nd9F@zamt9)y zt1nYu{v!jnpI;_siEFFstFClwv?oAvK$w6H$%Ao9c?K2Q+e+HQE+>{eyg3#g$VF*9iV6zYN4x3k!+;q*R|S(5%(^4+ui7 zkLlBKf^TmNx4*7YnEFix4Tr22p=Zi<3np|7nvbK3CM<+pokv7OvRiF5av%5KevvBo zl9aa6kG5uap5TzN}O-^NzY$u@D6XxoXC#>;(U}mW{U-` zIZTwa`!EZFCfaSiL-%}S&d*QsE#{_UB9UF`P;X}IB#{-0T@>T2EcoMo9Nyg|a&THo z7AWplG+t0vWTwxkF=|wD5{V1Oi)lJ|k<8fz?k(0IaojR$kzAX~lodSW8CiRI z;HPeVR58B&_&7xXnn%t3nB;JO<;he2NKvg`WI0{nIwjMM)y=ngG}E-tB&v7+j_{`V zaw~fQsRAE-y6*q}{HT86`pUN!@try;WDFXNNeOZi+Rf`!Eo4zSi@811zxR1Ny0bDK zTR-?EIVs8da@fH~(%2Kyi^xNqt5RNmvxW{i-Si2$nBXvVJS=*eY^kPGDqo(Gtopqb z>4V=f=da(Gl+?QLfi4(~;YH1&5yTR{*{_doI7zj5iNd`bQbh9shQ?v{dDlTARb;C~ zJ7vY2!jzY(w@m95d&e(PDfylHglEb^UXPhBu8PC$eTd`Jh?pf*58gcTOuj;2rO1`y zXXUx45|B9)}Ka!)Jep~@rQ`@QABTvu( z3T4oMa%#}M9D!rdV68n3=EnthR1JGeU{k!rK0$+t1?VM)f^5B&#Fy)L!VT-4#y=!5 zR+>JkwYiSF6l*V^Rn&|@u9S$JfStO?U4AG~${nd$L1#fNS!ba%3a zY5eZnxG)2sDnM136Z^s_)jM;MJv7eCh>tm4#!Wq+pOytRmE*-k@Ba7d4d5MLksVDYjvw@o?bDVbU(5r##at zSHcDf=KfxZ`pxTTvAdPgjp$sh?Z+1nLQ5g0Psx|(+k&=lOO0I$m;u>^$6p*+C3(m5 z4QF*&tS1`dlM1Htx`uiPZg!Y~pNz&;p0KUQj_ruPq9Uhd{7d;VZ$JgK$`m&-+AoY%7^V!MmRfl)u}TyCq%pZ zMI4hg3-7L|V_E>Wo7U@bE3#8qJ&Uz3FQcZKXSt(O%)W#mYL*Q}6gDp7y|i4hS*q|D z@;*NsBf0(YkN$4dkq4!!J@s%?>?*l00T2#i{U*`wJ(RMa<}}a$;VQ*jJ5_tsgC!j= zjkL!r17+kI@gVb2CiW(i<{Mkx^)d!l%3y^BtK<}%9${f_9s2)+AsPi zxC2+64-NlN$(VbvDlf1Evl znt2YTPbG&Td=MkdHT~Q5mBbRX4CsGa02emZ7)LxqL)>Fs`IjYr1qP5Q2i>#)hzpoE zJ`?b`L%84Y5FmIdT-kr&LFAgrqEnWtJAfIn$F#x|&ru&?(zw*%KU984$$Nz|Ki?)n z@GNzIMS`>%ao-W~(m5ql&X?L-!I-`zXWog)?v-KOt)6@t4bj80gpSqe}-3m?dtFjli!hzxzenn$*l)V-b?pqv+vzHE_~z|2|BaiD$6c2?=M|U z&Q>MYXb9^KCPPooblb5AOnD&pRQ5YBiYdso<@H zseiwS!TxUGlKAaUL#=q#%2G95M|)AyC1&|RW$#fw>fw@Bx9XULa2rV))uA-px3x6$+DMqj)V`(SyVE{1%OSf}O~cDmII3-?f~PK1JLV59;b44}c*9emP}V z;C6(_i*DHgJ^wP|K}$$Wdpnl(Rkq4lsJ<+=NsucdE+p+3 zMc}m@(^xfIZka7W|GYo4sn>!7pvrpGK!*2lxv?3e`Opne6INyk;LEPc3C-nTo^z%_ z+J~YUG%;LDW@if!j$un;s}%~NIInr|oSp4Z3%NV$EB_pft3bOq7zou{S?<$mN@tyRVWhuf_rFI! zAe5#MEGE{5v;H%XRP}q8xlU67yXH(h6FhB~ifdBX9+=?y-LB0L$BEEZQ?^mEC^6Wd zcK2E?9of;fn*k5p9steJgPs`vAj_>eR;qPf->)C=i_1>;t}*G}2pI68 z<((@nTWyZSg-jEEw*OTunXDa^%W1{%DgR{jzPQn~Ss*T{(XAwSK2OWa2kp^@AK#AK z`}5v#NcG%_jpX6VEU|*&wDaPmmqoPLI&+-Wbxgc!@3}bBrXf{9b$jUFaNtV0JjaGcy8V{;Ght&bI1CJo!&4Or+ zDU2G+9dO^iq+otGfW`-xez#Pv0%2;n%KkO{8VH6X(^h2L0t=1kjfnxpSk}0z^7QX* zeSx*^$-V;4#JD_;cH2*S9R*e*2MEj@oNv3xIU*nvq7tJZ;BqIT4PNDUpB*nQcyV!G z*DUca6cxDo`}>C>p^0QkNq@86o;SIp=zb@_sqwQwN?^5L1xJ>wzOK^C{RhB$FD=Mc`tZB8c&U)WsTMfp4lt>=|?D(;)#M?umFy$2aOGm6X3pYUB zkA-ycH_rGGq0Xo)mn#wD6LTc%qmT!k8`aNmk1Uo9^-w zk1&8ba4Kuqj{mh=Q~oQ(D$nUNW#IMMfrIQhrw0-Y!mH#NxV$t$|M=HxfXA-k0_T)Z z-4<^2xL{XmV_0=8AoAf^&PE$Y8YI=Gy{%)^+tF6YnENJQ~0i4n`rDn!LBX&y(^p09ko(MtCss+^6%GP z@}yAQM!$L#r&&VD=29O1aE6uo7KWAa8JhL(`O8wq_|WM$yp1MzzFN3{BLm(cOe-?5D%5||nMM!{cw4_ZRP@IGIL zH@7A+HM*9D^SUJ!61kd;YdoB%*VMa?FOfj36GFIpoqYC~iiB;2jT7TF^bRJ#9FHX0 zEsZ@~Q{0=Cg65Fl|KvpMUpU{NYXmQ#MmUu1dgcBKa0NEaV&rr>cx!ln)5hnJ_xJfk z4@5)fd~TPWsepQgJ1q;nGS#RpeEjvH5;^d^3$kW2d{c`&T3vMY|r+D-gEourh*Q3~>t8lW%I3w#>eTC3N`SWg+HkE6@Ahlmyu zk}Y=T;A=8fjNj^DRD>@piaID^FsdJC)FM8SNOjM%hE{lmd~`fmPCnq~_Wy-KKKC;HZ3dtd-(wJ5@|yD7aiG{KQ#-XWgNZkG3GHj$?1$5))VBzoyeWGJ>L#7a%tb5p^cO(h73$QhR4V%IQ zm^@ZX^ZAATX&?}As$@UM^ug;qw*Vz%JR2Wu9I6w70LdHvs_oM*slzZ}sY$Jq5OtO%kd^ND;`rWm$iZlE7O}ECGB$)qMN7(zJ@&C8 z+|r|3Z~HAt`n2x8QiKknPrCaX0`?8v=(4?VA5`Z_RZ!dMl)jVZfr;EotoJyqS_vK7*TdNVCm{N zL=tgFqRWC9T?V`x39`Wq(YOuII05rxTjgZ7$;D>OyE#V|m4kNVC8n(1njj=wA!_ly zQ<8+RO-CNifj)nP;LA3xL9Bfkn_8jk z>j>Rn@AB~?I}xe;q(o!FCk}L}F`rtQuur>{gOkb5M2qtte+)duBp!{MDd^5medX(R zZ#HFEKytJ`nse+x>YX)9#{=%KgfHW@YLob1_znloEz7k`xL}bg-|G=F5`4hju%R*5 zMARB$cC0Jzs3Y9up;0fABt?M4$yJ9pR`|#0%x$p_5^q0TmOG^^EGwqpKqja?+f`Ko zP26L4`_>b2Nbm4zXu4?#Q)j-eG_17z&DL?JDO}mo-3i3LfoT?MEa>K>jRj9!p_^*} zQLI`+fVo5h@wTs&m#$gI@ikZ_R)2fP<8t%V#oS3YKrBrDmiVJpMRb8RTe#rI!IXnn zRwXf>x`oufh7*1=S_WJ-pmy_HA}Zf3xz=)cvK_6F3s9O9jMG0ylNa?^8-JE^cs##HpxH$B>*(DbBI#*Y>FWe3ona4ry9coAx{~xw~u%=u6=#j6d{uW}A{oHaJ3qssW3$}_8YT73lqBk;`R6Z$} ztxBgSXBNpM^6vai7&;FU6TsgO5^!XH=>=c*Eh|xfTz3_dR9wt7gD4IO&qz@)KWNE^ zgE%9$U{khQVK@DOaj*PyyQ?ixtUh^1n_OLKl$jufGW19=6F$xLs&mVR<>?AFrs($q zSJu)y*R!v5J2Y90a=(iwNjcDt7exP@F17i9@(f+%f8v{RdQWPrTgT;PSMbJ!njLeL zGEb4NPSv7II2Xs5L1cu(azMlQXV;DGjPAQdu-v2KN0oe_gC7gJ2hxibAXP%&#TfIo z*3loS%^XCF5v?)^f@A2Xtwb zF+!Q{PF5Zvo!8Rz_T|e7)~6BIk9$)B9ddAXpCyFoSOuvDWW>yTcQro$9Dq<&*^8*V zxG!-S(|0`aOY@ui!%2OClj;frLc}Y~t1RWJmK0&hD>A^2mz7C!gRRwWb(0PXo>=LT z(`{$h_YP!7PmAu031~if6YOtZ+-$7g2tE#VA;i_FlL6rHx(B7@_JpA(A9pr0kZOt= zFnZ?(LM}sVBiYTI@O@>Og3>cJ5JpxQafXpCO8qiF(@M*BWzhqi~JHXdMJOW{+coY%rNnUkw!t2RnhhV^5z$fcO0 zqij8qwcM1A-<^fUrdrN)@W6gH!r|5nG!)cDA1u{re0k#rGez)6e1NtiUyLuQ72_;} z1|I7D1|3Wc66is-fD=qlRkI%^%$Vl!oZZ!N(@T00UdD2o5`m8Xs=V)lu`P*P?i(n&FYTZluprEwlm7&&? z(Vw&VEiE;y691_h zo0QT;S1U%B{Zo0X{9l##V}Ena=NCdYx&#Y8ft4`7-d^cuMW)x{qKcgUK zfk_u*75n1!_mj0#LpmNfQ%iNwR*-n@R|#s{yC;3qgOx+896QLQ&kNIqZ^!CnAxpDr zc;G4Dh2V*YbPDCD)BZ`HIoG%FN`~F36axt&GDq`#>oJ!yez@R;_!=N3Y~z9LQft&P z=G!#|9*Gt|dWEbU+jd9j76{MQ5wpz68|*V@P81fdM`r-|!^Z6u_u?`l@iSEPMFBX1 zK#R8vpI>Vx0;w&fOfm-Gdj55fFN zM`T2EFsys8g-%N@g>UW-sp6SsalrPYi~b|TY9A{bUd_4P3kU(yZa#~%Jy6npgTXje z@5g;I?`uW#0$%tsnYhX$0QBC|+B<{A=hxpaEO>hGw#6n(HNBqSSV+^+%Ht{_^KY+A zDnukZIR&xICwp58(qxA`hmLRZYuLEp(cl+5nV3;jr#9J+*iNwkG4iGdGU&tyNNeu~h;4Ujd43$sL`rXsx1*j0+wR zaF>8dey(Jwj2EGQw1SO3m%SBt1*OwpDnpvbrUH!>x%$XaKK(X68D_~thfb91iUSSH zia2fvX~P@Xb3Wpg&50r!{Kb}Bnbgx67J@#EA9++hRrT3PxL}Eq9-M!37R5`9zf0bq z11veTSZaiEYQNBAYojw^cg}OoCao^D0STmiTix)pd|$oC=OLX^ke-~)yIDF-)Zx2u z01TQ}vHmE9JQzyBut+L~9sY9 zggx$rs!z~cDdrz6_6oZ7wUkE3T`AfjxzRQ@zvn1f22SeJ<}xZW5-Z5y%g_-bX$*pa zG=TS>d+D}X8!luTb-?xXUCCj*bGi6~lphI^MVO+GyEV7af_gfi2FSBY8cE2Gpkg|O zF<@5DdTt78{s2z2wXrk){x|K~PbM})e<An1$rxF$ zZ{X!L8m^CmC3y@z5%Hs5iZSU=rhysNK(QTVUd&fHAq?eM#5E_K)W7>*!k5tu2Ex4o zf+ch#3JiJA&LDA>(jcRFDW+Syj~fv&x&@EpB5`FM!wud1nxP+LuTIue2pjT%y}eS-7TrXWlqViR z`i?Q6z~FEWOeCRa999~?`Uz!*e&ecKx@HIo6b#eZlmYASm95(tpczbzJZ;VdBn_%$#;wR~_r@FzR?g=lle(3E+f}&(xjowJ2QQ0_=v1+_K3#Foc zy}uf^=G}3d8{hg*u6{hS!VO3xMa3$0!7p4-m9noOoAk>fA&GQ9g*_b1_hu2&v~XI+ zX(l+4675A)4Cs&#=5_Jx42yZFqv31#9l$xnos9n6NOaHqTT(qI;HhUnHy3Bn(52DX z%oAbvHQ_f+(tj|E412@nZM5t>zey!}vh@oj16SHcKLwwS!y#6PfR2HtT&fK~A(wT+#l}1HdEbzL!)L@N(=h>L&Fb?kj#xMs0f7uUJdYZg1$Qxq2yo@>_ zkfQTA_rQ-NQTQ8cD4FjyAk5gyOo$&P^tc{w1eBdKYLAF91L>3=HL`TR2>F@xWVPs) zAs9iqLfYXA)(%;7JL17%FRf+eyRD+pkK;Zt0?Ve1f0=wcgW6}mj4E7P@lWm}21JWr z9H-=;K_t_M*%4-t2gY@&6W8tT_)$)cvO(JW+?XYy^oe3s+?w8Gh#bR((%HUh?~lp} z0uq}0i>ue#AcMIE^%0>w&-KdRM&lE>s=TZ|btC$XLqxpe`dp z#(gLpsLw;DLS-A~Zy{>yQdEXpqtlx^_qaHPk7dUxyk4T|KgjubEnU3PLqnnd=U<2Gr88KUNXE zixWL!4EvQyD1XvHi3s5pVW~u`9@uW2s5^Cap2FOm_V?x(RC6KKYJJsr!h-g)GI^r9 z7nIUoIg?O{3-%;pd8V}decU+!aOnyhqksbPi_2pE@OnI;rzYEqvytTE%g13h#KK)4 z+e1l-)M4t?fm0J*M(u)cqd%BMKv|STYI-T5LquSb!ugQx_h)Gr;dU?u^LUau1O+wu z25QL%@wXz~p3z zYt;db#UmCU;oLd9mI)j4fAw*W4d6aRW`~}=XQR3`U0AWkfjRZU5Ov-ch?9BXJvB@u zaXc10J$FhCGe{cLaI{Uo{vH9KV@#Ksu(?WVV(r75h!a=Zxv`r@m3tPB$9$9qMfIOOMwp24De0aZx?urL_sLOI+@bk)K+3Z;wO9NFOzxfh>| zsfTVtS?G1H;_+&HbnAZToKB-m7&%??0dw(c<;inyQ_d$zmK0Mgk=tRW8Q`E~|6lb0 zXz3ep{Wd&2V5(Mt-s(-vlz!ija0Uw+haGgv<-dH~D@CfqsobNy68EvzClgxAKv}+o zQ~@7YCLSfcVnZBL#*9exVDl3@^9>FmoEh1hE;gzbs1YKy2Af3K)&D}$u&BXO@ruP_ z6GDX8%mky;W8cifAjwfo0L0LF+e)fi>y5XKP8@JvWsa}#x-I;>9y0$PWbNo3UcH)0 z&+&aP!~pu}x%%5iPWWrlx}e~D32FJ8(;R^)EK48gV4%Fni6g%#uGM0}uExx}$=@wk zVbi^_oTy4ID7V~d;d_%;tRq*EkHW0Goj|JjHUt4iQ*<%{AgPGsQeDq&ZdsFWZn}lg za{Qyvcf14+eB)>1th~9ve)hSkPJlao$1mY6MXP&}$?~|Na)9)s;{3+-6Qg=&`}=l`fl^&2QGLaq%#TTQdDyfJ?p@xDzBAdp>$J~$jiMYwxPfiWwE%jUAeuY| zmtb|&i!vY!?b_x6ZFg!C0m_$=fE`(LPs53E!9vwPy``SFI|ISXw0Pgs>4~s#hF06q z=9ty=R&3$&rHUnFWaPeK4D!iRLFlOwc+ppppGQ5F{Rp44Qd_N=%lK5{r$*h14p;5$ zt+P#x`tcEf=`t`4P#@n1kv`E{&dQ+#dewDLQF}6^G#)7Q^s4xAmiL^01{#~Jhyoav zGTnQWDBYHcv;ZL~IlNIn#{hbXw{`#T#_akClk(NT=br>2TJ2sab3RGYUcrnd)5COAUIO2y6s^)Cw%_h@7{27w7dPD#82CwS(d9LOUxD; za^d&ed0YpUANXI(pIUq-vh#C6M~-yvoZhi&5~&&xmozvi7sMhXqM`a+%WgTt!O$tR z_uH`qpHZXT&-D3)#x_s?-Jty3V<6YCm*x3;0cq;Rqd-(;rbL!^T< z>UPLi^TE7(^!N7(G3)9gdOIq!L zc&EkK#-RsJ@aEiN51jy3iP#m`4+1p9O z5YwcmcYz4H6iQyg{`mFm5*`NJt)pxV%rv6)SNk(!hHMAyK3HQ9t!gYPKp>+xA zZa%>FBY1WqeJ#_a>L8gGQQUCT{XNN~Eg9it6f`Lr&=a86eiF@jQttdG@zU}Z^#x}T z{%_B~MJYXoMe;@`4X0(5QgcOjxZL68wx3p4FVh^cdMXvr1TtUi(`wTD7t*_bHFSDr z{n->BpiG^etGFqOdWq(9`KZ4Luh1NVu%#CJ0NSWgq4r!)Bincb1e1&))QVD?lLj4ZI;M5m(^eQ zuP8Hhn4J}&`k|P6(LNslBeeCV23~k_akv5V!e+etpQV&54J4=4KN-dzp1V!qc^oVe zIay8@X8E$y@!^QKw|Dh7ob5eNBWocdAPDS&8fKfCSm|yvb`5k%Ncv}KUfCo>#%8hS zg1Ui=^#|WEtN7jFbS{Lguhku}OG!Ei`h$&9&Cl=aGiX}72}H|KS}|`*T!iFlP$*?T z?yoac7JhFD(&|LjLgWmuK;++|wd;IZS6H9NR)GVVsY2G50GN1Q5(9QpJ&~@U0E-D# zn08`O1=l>o<66GQr+tWnd1j`gg=D$1xnJ@K+6>adRLs$IzT`PnNJ91JGLSEHhv54* z)rBi-XugIlnfDtnl$LAOSWF<#YV$DsDN?O=qZc-DhKC#{Acas1q^w~;| zW_{!SREY)UFp?k-B&5u`Cvqg;<>1;+!ZV-RR?v-VQzJw)12fUq;}EfGmp5mASf6;j zAQU<4@(CLa<}K*?WhG}A-p%);*BKSxqfgG1-s!eb%zAwP>N+x7!{;NlGL-ryVY$~F z%}Gd~av^a;qsOU}#S9JH)cHBV;faT%jUG7$+HUBXg=kKe3N2xc`@#EQXhVWw!*wnF zi!TlipWq)-u(KkbHk>~QX4sB**Ezj7yXuUUa420{zOacmy2`4iqM&F_GZQcX-4tt0 z2z>a!57vsqvRFaqKn%%DMqq5a5pAD&X;sW|}?!jdoG*xv0uoRsm*J$^4v79p~#S5)!O374OkJq7YZ? z-9aWs?K(u;Uj5?KLIlqOlW*p`U(C((swpOxGoI+ZxJu%fW_LhHR6h^1z4>k+qMA(R z_NLab&*stQbZcI4=xb6sWtMb-cy!OXyU18kTYa+QBkAur-oK(7z{iQL%#+MZquHmF ze`W<5pa&ADxTJu83EPp)hQb;v0#vAADD{})LojHJ(vEc8*#$Jg#^mkKESNJo{(1#| zMa_S9N2l|g2QH=;k3FtNe7UhDxZjhM+Px7?Rs6C`GBQn4B5*UD5=)6b{Hm35_GVgl85d`9jdKr= z(AR{C{O2|K#Nv!;a%|bfioZ?K@7W#xF_r9`HN&5*BjRijXK7lG<6$H=EG5W+W{orF ze9Cp5a-4x|y0|_s)ps*9d4WyU5L(s&_xUq8cl7j_u?kUUxyq2|emVx%4}+)&v~VET zJk`ywvfSPj4YRy^X*TUaBF|H($I1xwrN{PtK=HKVa=<|Z$vMxxzP4o0o^p2I{;ve9 zs03qj!C+;lGL+|2SeQoya61g9+TBQ6O{W){|MZ|fe(|aqOS-_>WZHSBU+n3#bPd~N z&mB*3m7#QPo}$QlcK~LQBV{xo2|v|O1U|V>G?)mP;{2~clU&Lu^ruM2v0 z+iL}G04mpp+n5!$+OP8KZYK$6k1uY!#X`IJ70jDl3h_KI*6UEiPK+znp!37I{A8rl z;)Jhqrglz89ZgJD=+@vwByLXnJp++YmHNk+)0t*{rkZZD(!fw?oQwTvWw)!o7hJLX z0cw|qtH;r(qV9Z6j&j@<*HQbF6#ive64^lLwrR}C`=jJT=++=|QIdXAcgO8f7!H4$AO?{8HTfApMSNrO8~BU~y>87*HrQehZS@<_ z&>k5|c)TW*RDH?(bhC7%(^<`{>Gh31~+vdr& zY@!u@=f2Zggb)BlF1nZZ`Mq?@CKqqj5hE~RW958~!mAcbnNMqfswp|}z0$+8e4=96 zZ{{j`bsxF^rVqh_C_{JTWI3$O90lAAB~`=2m5aGwLA(2R$%k>XE~-X4+%D_X5^g&= z3c>PnsrQ#XG42%{EPA`%(zMgx8tsl(!o=KW?N)}jzv}F7T(M7E>mU@q-QW4dtC(vE z8Fv2R@0qZ_qWslEvWfn8^OwSygA2W&_0h6oSS3C*#kYEVmkP*zOY)oY^If;k%6-gL+KDs%(Jsn7xZm~PDmHc!26?z$S20j&{% zmzyF(jw^3EqcP zrRTFE6v`Iy?j0)y1|g}fdg*7+lk(W$T{yq>&joXm#fiI|mbK>jau|$so^`Kz=Wo5f zs?U+N6yUdPOnqCwU3L`L+#0zQI6Lu>CGbpr?r4zs?NQI|d`M67c!#7hBK=Y~PTO_* zjmRsw*$h{`$fQ#VYk5wA(`WtJW)^EXehO*d2(5{TPCj1SkIBoX9tNn3Gs}&6s#PXG zNAT3UW+Ytk=qYrFh>FW^dRr;mVu`EZH~`t5bo$VB56sm>|sNWm19rVa<>!^Xg)k?C%! zkv8gny2yOEo12KCHqW#(5@Si-qMhhk$0e`O+eJ=3whCgKJ%?|@&OJ9z`S^|{i_&c< zTTl8BFRa!ch>coVy2Ux$XrG3uM!EYws(&W!&ana^B3y(jXUBbBo6Msh^7qv_*Kg$CI`oX zFffTg&3dh5j^S8~VdOvjzL^0=oTekGtm&1Z-JViSSneU?MP^bh$y6pQw_+6=AnT)1 z;RrJD@vWwhDt&&F3*3hRqu|8E%zF58m+acxU5Bf=(e+R zCW8@7k?Jau1OW@ooQ)}0g8k*S#VLtQ8>hB%xw|xqqdmu|aH+?h(`v1{fdfAvy5ADG z1G#<^Haoo}eSGfi0cYdYxouH!makKk6t#!brNsJZ=I8MV5XXMCk*mL18wcTOd|h>x zA7H6*Pg;+(k8fqlJ$@)40fERq{)l)jZP$JPAhzs?C-Lb0k?@0rY{G&O>Pay`H%#k@ULX#EV5ggv;~1ti|aG< z2-D$gpg0uyX(plug;$LC&RTQ2dx@h zP8@o?;X#kuqVlsU9h@+T3+%Vz-AtN$>atpA;p7@6NkDz+Z{nOP#1w|c0k3c@;E`6g* z0)H=#T~+7}%kE0cFaSs#|7yn%m;aAP9|A|;X`>Fv)Qe8qWUJIrX`!7>p6~I$B+y_hEQ&dH%8qGpXw_Y*z3Dl4zZWnYqD~edpYszPtDWxDlAWKdF`ri= z21(C#Z(O5Ec=3mWcI5%mxWUAZ$l(R@+0{ly5=no5U#A`=&)MXLs`VoWFx%yzN_Rs9 zX1iEdk+d%rUGaCL}(i0XYP@-dR*9sQvF8 zuZ{dO{K*JU5}9q;1ab&JLu=(~qDCT4-PD{DOL^$LvmRn7;jC66tL=)s2Zi!99uAJ> zgvk?zrv!6Mwt;#3idmq0MqgHyE3V$Ngn_P8;}wVTMQf#^m!B&0roO1}$Nia6_a_F& zom!;^+h_wG8G1y{J1Ye44xBr>j0rhMY9$Nq#^#KqW%X6>W}ehjp4jwF@b~P`@BCgL z?AIRM1=E-N-AB(X@w=^D5em0Wy4bCMkM8ekHw7rLYOIEXFS}+o@(ti0jKON^vXArMSCeyn$c{NgLPil; z(*8|JSrtcvNHdhfPj)ewXOL)gR{iFbs^F=c>bxvptiJ=HRv^xVetJV@?|gAIIY}Uy zH8H{QVNY#C0-IH$bCL70%$d#A&h$6!8so+4vpvl+w}OW5^)YhlFp-Lg=FP~o)DXP@ zg)Hs2PnX@siixu3MIr-JNN>71x$K|I)jdb;$Apxn|IWJ1cpuPFmPgXVvD;ZFa;DAm zzu~oP(Y0u6A+_)66Vp;Eyvh>0)A&?#OB(dY^PcP1Rfi8XW=zXPi}+9KRF+H{j~&%) zU3@0shh}YCQCq5ijuT(uijDg4WT{bA zp{E`ej7sK55PuK-GTq%^?y{Kr%^GiXIG=UVBQvG-PiD)S)`Z|x*lB4ji|PJ@NvlbR zcLE>QzNf1JBx_Qu&nDEsA9z2w3OfM_U-PN_p8((kPv;Bs2SukE1>g@ur5WKMY#f&& zaJuTEsAE&`{WG-nm`0R>g5q9J?p(m&W32Q2igc*yUMb6Quby4@4x(|u7taxGnfK&< z1_9i!I1{&~w<~8Zf*l)0A8mNx7te)pn%~+~rMZM+{4@KwPes$5l7?$wOqQPxu z9c1P3rx?4R^mmA;n0R{E)A%AIzgXSMeXkdMZ#eKP+H|)^Y7)#@brelh4Gr&g%j9ox z6L8xz^`{Q7SYl%n`tMQCXNWhfF5?=mqn1a+MOv#4uhxm2PHvgJ4099abF${d&zg zH}=Kf8zXIEszpX<0vFPdbKBL46yGt*Rg?zd7VQj|DOXpJWX1)gnOA)^JnnV+1^Ej& ztuVmhdhPxYNUQ;PTNkhboPoZl1kkuP?=&vw`*(vU`ofW8{49OP7PdOxkqVqFlsE?q zG>KELtF;wwa=Rbs9_3gh8{3Dgcp|cR+Crrcbr`(TS?4s=3=|ALKRzr}W0!w{ERhqa z$seEQx9mW8L5J7#&Hzj%E@3jAyyZ`i{b-!qpOJUwJ9Pnf;}u9Fy_Oss&8&Qamsmti zC2U$@XJmv`_T6Kf`*r&b)TyAIRt`OcX8O^~+z?Xb6iI)C5LW|_u($bz9qx#q7^6-%dQ!*0b>tI7Kj6Wqyn5csWjCRU^3+lx+ z4ywe!($n{T^b~+}e#+Or_Ak+60Fk_(awEozMl;nnGWF~p958Y-rH-pu4pPecYJg-h=rO$F|;9Ul0Z=8=vvg0NwgE_n|hm^#2v z7Au);SouHy8u$O$?SDMv|DU(u2;X0PgC}X$5bU3|Ag0?%?DW3APO4>dZcAf+N(CAh zPcidv|H2)f5QmGlSoVH2CxeYke#C2&RsqH7$5PIscO-uv)>DzC-iwd0<(GLsWufuD zmgIY?+wGU|ofBd%sd#}6S3GCumj;fWOgJk`M`eUH5$RTW!~`@Kd0~^|6BHDD+E(ec zzwu3;?TUqMk$?1-N^sW0Q|4e0k{=eZ-?KkM46ryohzh5$p4sc-u0j-ktzR1NBq`R0 zK7Ad6E6<$%p*0j|wC1<{83KHKzL({X+!{q)pHFb%G^Z>lMUt!YXr`Ou9DBie&oyW! zc2Y;?CjuxB_nFvSEgufQzw%p;oBN)=YueF;_qPAK0n?uJBCCetH1jZm6el~qePe|c zi-t>M?^GyJfd1e<2-(BOSBvfSvactP z4}|7$MPE{|;K`9)iy;l2bo)Kn3&*2;|4duqyj(W@GIuWMD0ORaHMJ5cI6rfAfCq|v zIZqt6n8I*|;P+ERnC#PU@dl+OrEfF)EK7-X(A%Av$i_8tHn%g;C!v=FYCrfr33xk? z#a-siEPfwQuFSWDlZ$Px;z}GZOCL98DQ>Oe8}6lKhhCqa3k2GDJ+nmjB5{8nhIvp+ zt6hKKkoXea^8~5?x*R8r{2a-AqOY0Y0rN9l9r}hM$#@e$>O>r-Sh&|g$kmU z^u!@Z0*z-{A8tcerLQGzRY5o{ugwKM&vUe|PG=zC(lKb}RP{@n#&syB4@J5hbA zz?Z#vZY=Np=?qP;toU%aik;08i`b~G-zsyz#`Fxm=KID$;%~X(nKuo#nZvQ16o<_V zlehg1l&$PI)(d*J9F${@ndTba0aOMJPp1t69-cPYI$kbko<>ycQ;pVcNUJvOdab0< zX(op!hy3hzs=R+7YH*Ob*sxByT5%X{GG|%j#c2O*UP~pof}<^`9Xx1xTzM06 zcnIAI`n-?&NMz>y_^(0pa5~?yVZP6|FOYM+E>V6}5zW z5kju8LACfV#yhl{q)Q#@Ot3ureisuNC{MOGbCcW|&*iRYV@lTeR8xhMv7<#HP4THk zx&2}2FdY8cis2s?Dz#e&#j)$2$6-{Bo z7<*n{1 z_c5z(YTSw2eimXx?Ft5)hh5U-f}_tnJvj`Lv24;LflKQ*b5Wpr3}0B}pv>DddCPgy z!2S4l>cc>q**D#$grxObvBa3_S#a9&XL3b!l%?gVEaMt1uFw9Es=4tRB{?!lyxc@kgZhuX4V-jtP)djkbx4lO zpyBMHFt3}Dv4X|HvaDG3dVxNkZ)Lhvn+GPN!KIei9EV>L85adu&!bR>;^pO~zJ^6& z9$2Nun{9}uth7Jo2Xh9bWYIg#?jCXsfElZA``oh$u!fnpny@(;`XuPqB}nS|9X|gZ zpdk|m50NTPIQ0{=ICM9WOLM!t7Iig~{aN_3pxM%TN>D^u>FUp13Mv*;I{jlLIg6*t zTk0R_G{?3!t%{z6XI%Ka+@#&cf^@Dmd{B91mU**I8`xwSF)o>J*r0(lZXUD6l3L1l zCE6OJF~Z!A;5sQ##Ttxy;P(mljjwo2p)5v<1D#Sfntr&?zC}?`Qj$iUqOt|ss;3Fr zwAp2fOh=4^<@LCwcv699nl`AI4|pp`y>4U8+xSp;OzJny+4M!VoFjbFc_Lqr7W68D zhW!OhCLR#Yu`JO4M)RkNHUNoNB-RxXL4m}`m`VfYH3+5?pM}9F!#qjYou0u5^PWxy zzmz~`v*DxG-kIkP4p>7qqKQs}nS7Fsp=bS^Mm-YGWA8hMWV zc_7)pmdZdRHjS#XmUheQ`!B+QtZ`^*-uxci&P6+lq?tfixfOn}YJ+VczxmATHPneG zIdT|mUXHa&Dr#>zJTK@09U0z5(2!9a#-8D!R)g1Q+Le!7bx9cyXIRdCYSdXiK~W*Y zSdmmO@(Kg8ur)r-cXdD1FEbZq9BG*nHA7-Re;zyW@rCb|Lf}mvROmZK1KI*L@gdC~ z!CPBmKmcaAO7ZT1H^S!<0CcT68i;UhsaeyoRRs^F^ws@*$9nKWNB$)D6maGs=Xb)B z&OKUs<$F9i`EpHMCe4cx=ArUo}7Tosv>I0yBDf0|L z0T=Qfp`YC(zWAXNTI=^<>qTBSd)tS>YrKZfzG)-0gzNcyZ$6u zDOjiS^F=`pQgJr;y};BMuh&AZF>y4;pe1<`Il1uz&84=0EzhJ`oOP{PI%MzZ1zg+C z(Vl#;4#q3Fg6IyslK87Eb65;roV^Lk1mz*5sdFF$uDe!x6q5!}-}D(5#^03u zCHQ;%2h{?)uJDEA!S=4r-XaAyoe|Bcc`NDpk4|j7sAao}%{&cJ-@|GcPt-C9Fvj&9vgb0BhEp`M z7$N^h;M++eCC0ih`&U{idexZt-*585$S-kT7L^QjOrNgWmF{h+i?LfX7oUDV-|-GU zWDMM66Ux3w%^8huweI;?^vQ!!0+1D&%R)=i1f0=8Jy)%TfX1Zmwy4PpQ~BI@&kx26 za>6@0Y2uahr|WeS-3VIwlfT9Atrc`eDt_Q6OJ3}b`L+wnc)u&rzWu4F+TaX-|NBju znp@z+K7lnPm<|W^M8)hnSezI=kyJzix`|NOIJ~iFCtg*ITXq~lsdIf)%@{`udK~S~ z(NNUmsn&e%!l}^xKkB$HcQRO?giVpGK>{m48*de-fsHHTX-j__-IHO6;R+WTP^|%# z$)6VZ>GNF8>dc(*JxxEK7F5Q_X>sk;&UuUvCp%SXbr&DUH?USt>68PjMLSnKaqVS8 zgu9GbVdEgiZw=(%+|v{Srm5vytG~KJ?M2S!KGnXjFJ_C5EDBnv4-NH9{(#!vUHOxa zUFk9>7i*%i>0PlGZMRIDH+i_y)50#fN4JA^s+JR|PJ1Z~l-g*QHr-vLMd20Lo!SmbmA|>ME?6K^xNJZ)f{6)}-128F?9rem&iziaz ztZ8v`G0t>Krlo*-Z60Xk?&l7U|ANH~u+?;bcOpBjW~y|wCwD9W3l)1eF>@e@l|D*= z|0{_70TCU-A-tB&5~;Ck0*c{Vbo5z2_}jPi{BBi-V+!>&m-SI1oHg%AP03ZS8$x13 z4$GdjL(;u{l*Sfk8P0;%yICes42Ckh#)UIdlCYLl2tE{_8^uP-SDx6e4?cA8 zi$46=L~#2$Kw0BTaE<)2S=FZBBIUEB@nO%($gkY_L-p@UCOX0gR11?mW8c+qF{_BB zOT@S`>8u%58RP3Y#(^(#8cM0N70lL(X8(mtc$Ouu2#`4KT}G9ECWrs2l)+99O$8_2 zfuv|f`;H~DO~tDKL-63{N;*okY-05^OW)C7pDma(rG1OVVnkN=ZbDthgkn7KQzd;| zL#)P3sdg;t@(#YxD~%yOz4^DRtx(Rk^;t7-VBKrObKaw$WOO3XP4d&X_6br{45n68 z;#K;XWwE|$V9N+-Qan9aTmRR!t6;sXsj;k9ps6Q1C(LsN@0@B+))#>Z!QUBu<68-ZVj>_Qbai*P z-iS(f(KGm5Rpj!SXj71Vh4;E)M(Sj}Z)aY}_X#0Vj+QX-Scb@4u#3}e(U>wqu?U5d zk`fd2P5SuUJG;ExDlFeN1*Z7VLMX;~SKA4*V7t%$H35moz1VAql;M(Gr^gPr=14Zf z?IStu=UhQT^Wz2)H+>HBn|^A)6b-@r$;pB?2~!13nNZcrIeKVvv#y+g;nz9)p(1F1>|Ylivf9< zD57YgG-s$mL=;ag6%}8Ih=^d4;RWyS+krl#r_4;C3*h&n{pOutD8lC4S2EU)s#tuT zR`3lnn=m1wA}5*lLP;Z?`=8K(dSZl2XM-MJW+=xH+>w6n1Z``2c@V(YiZmX4$x${9 z+9K5W>ZSk2te>!qWUib*9vdP~=@}Mk*f%gBDKB3v48_9@uHX=X26L(sv}@NkvvRKd zYAP2ec<)3*Nvrv)B`_+~FjlFcMOYXK1zmaBG7qze#aB(=9KH~Xse~8web+u)`gG@& z&D`LJq_z!7H>|6`Q&AxGJ%}D;c0u%q-x0&URSl4kru*Fd3)LRI(prn1q%NwQ)RLZf zEDTxrW498eQV#hvjEd{^fmm^713cv?-K${7Px^FM@?-=RdY9`=4#X=BFz zEgyVOP?_YTn%{9LQxjZN@RFTyeR?ZSi&<&iHYGw~kD>#`-;4V24uon(Y9YjAUNxx9 z54zi~^|32H!Unqjc5<=~cmXX3vP*gVpOrVIfq3o(`!Akj{-n;-6c7H{+Hdj5*iwwF7g$ndZH{9sbI+kkJG{8^ORZfBA$CS+3paw5B_TylA1Ks)Kcf?@&c&q}r2Ey7{XtI;lhS`vq<|o+U*9WuOG;^CH4-8Qh|%VcQjdJhJfxNa znXzM$f;5K60yllw^wximxFfW_YVuNY4gJjbcnWwS=?Bfx%P`NdJ z7FopG+pP{B6XO75`og!z_y-P{GrK$kso98qy;{C%GHQu8??sJ7%azq`yZ&Fk=Ns@n zW#-J)8oLd|ToR~X*biZCbHxP>>{F~1@ zt^mTCa&ayy#?f%!e&>>SOl?n`z2R}`&L!d8NV+afcV~Wk`j@Os%^8q&!sY!fxXFOl{{rvI{;#4iNCfNesAQJcLx*dZCP6 z%xkRHenaK%JTaUoWV^j*Mom^j&*E3?dIv}GTgR@z0XaQ zGJ0sRcywnDRlOJSN{VmgBg#VjZCuD_8MW)DumbU{4k!>adw-Vy3v-6Nuq0B8yWGqV zS)Dy;EHS!4^}@}%<%u}7zoz;b!j?E*tWqI9+_Gsk81MLx)w6z3luL-HMj3C24tR3d zL>g%6^=xzYA}Wxeh?-LC{m<{M@3Gk0@`6Co!>>HY^+{)tvlKuHqNI@k*HRzu0 z<<2YxOV-r**pL<)A%T=jUVhLv?-38mqW#)-&;Mma;~=(buc;`#2U8xwkXSET&7$UC zMXx|R(AKktdJnEUY`@#V%Q>52$S8P}<)ANqK<*&Eym=TQa_~Ap2fpy^)@F-p$1a0{ zd`IA114-RG0cG4;LD#SK$N{NXSu}8x5+{W>tU1A@BJGIxN|Y)B6i`U693k(D_OEWI zc(Gsb7Fb$)^FQC{JrwGaqA(&eA!ECb5}1d?g6vB{frOkFYJ}3|LWm#+N7%-!FErGH zkSO-EfTAk`lj7x56AA|;>DrN{4ez1`tBL&GPyKIdH&doP8(ULUDg!Dt8n%uOXV<)M z^(r5Kjh&0gH^7LAGj8=88T9OxUj-dR$M~%B5SH2_(ofT-s2OWn^7W4&oSe_+>}OYb ztN5}9eW%ro{&La&S{dr~(k4ax?*oYN2E5_iycpz@cs{%cR&ZY&ey9TKB_~dp@R!mr zrvvP~Nvtjfn_P+Q-fbs29R_K#F6|M|Mb?&L`e8ysZXHqa_+6>pLg&bqnB97_$F!kL z7fWI5)jdzvtIpv^Zim1?Q^7=fOHKKn*d8f55`vYqE4M_dBm2e94I_i=X1wN6z|2d# zroGq87{ypGb;92>Pm;^ATa_Ni+)7MjEG;YjuwA+?4FAyhz_~N|ru5}g{R$9xlybgD zWgE&pVtnv#0qr|LDR#3j-2PdHeORg~Z8Vxo**`P|V4WWM+P$%Nf%r9;C?KNh{Tz^K zxWm`!j#bhh*RoV@19G`pBoBl4Q;ob{N*LoX;Jjkf=vVHsyV@HfP z6TF&R8cZTPQMU=_7fQRdR?WX~UV*Pe>R!?h_kSt1in6vyf1sS$Y3x8)Ii zD@q*EhSmyQNG)|Z6+$=n!i`(@ZeM-hSfNx5M?=^$Ti|&hijn-*pVOm?WG|(T)6KSy zvm@0Z-OdGrwd4%l&AObLL-61}{$qz-zL9N{xtk6R#VK>U$=wlv#0q1b%XAgB{pn7H#yTg3OH{jj>d}4;K#`2B*S0MWGKVukv*VJqu6^n#|~x` zoOzLq>S|^Prgc8E)+4N-?3GZ)Lr?fg>pk z3U0&2k5ht2)3;)(M`Q$_Z5cHu>Q6ZtJhml98B)-?cy;Dp9w5dC8S(=Vr25==?<4wE z#>V*jy2kS?v6Us?mGp`GczCK*MS()s?NY5OQ0ro*z9=0#bZ`E%0L;7shAWOx4@TYKd#8 zhRr{L8RnX(BgM;oa^d1Bo#vLHUg!osS>SLm6M^&kn{^HkdWh?u8UxmcnJUA+Ktob; z6!qAOa+?b*RZI;2rdo97@YOIZotEnEtKLI?DhiyPusAtb zrlpov1o=n>oG`3Qcb=0JbeB75jN8WX>It_k6x>O6EWR1pUS(RI0Fu)x$I_?rEkvji51;&*@_~EY1xmW(d_wbGU=0uPhbTvE1gqgs zgn~ujLPoR+SN~!bGDv{s2<$FfRiIVj6Ki2NXE&(Ot5|A9W%bVjGdmxGOpDdv+m5_KcSKdpV}Ls%*_25UfXT=UC;}N>MkaznJ}V>mb@-b zyg?~g>x((f{oMJ9)>};aO+ImB%PBq_-dD%F&8VD*MZ~<(wRs^9buaE{Q$VC9M2xERlX8v4GqB%xt&wnp05>dvU1rg`#1zO!*#AdXCJBfIYeK2 zbS@dH%1B!xwvhV#_1M;c;b@S`OT&e%-y6vXUSqt}J?Il5y_dR9QM(Y&!%^gQb|cQW z=OY2KDgKr8rH0d{n#Zdl2TT(ZBkI$YGV@Dr@En4c!QW1PgVv(_B0>5|V|oKeQ%f3Y|gfcTzM%P0H!?sHLKlp={_h8Z)__ZU@Z=6g&| z61zo=cdRGkkI&=Xa-lYLItxFh8S13y-O%1TOjvHwB-Rqebn$A!iBWe( z&Na6z9MWvib}qBr#U0#=Vp98+<)ve=^2EUom z0r<+vd?f38XNCjVv%c+}(Tw!1MC00~{D1_W4^k*4-&aG%*384ZNhGOe6<}09S`rZ3 zYgC|k_juxE5x@skV?IdVDOW-_;7hEgyAlHuPz4vD_Z0I9h>jnWK7kxcT+?y>@9G^F zkiAyE@XIn}y!Reu{JzjyR6anOq+pg8$afgqB?$iID^^=$ag=e6pU@C^O7M26UIg#Q z_*No?^y~aHb__nN0Dd4|4nSChpYko*_tte;V6|iwrH9Y|E>S)QQw&MotJV;JSr18^ zBZWX^)e2q$3#|3SGa7R3xg&o+Ve4F4aXteJ&C+V3-b;Oz1MBgm>u!E}cQX{X;9ou* zs1L)X)tvEZV|pA23>(%=)2f0pPRYPyn|NnUKG#HFrVf@^xgQ%hbw?!eS(J^>e+_Y576tRC`7KE6Bt9ebPa2*!a}Hyhz2 zivb^zFvR&qi(rL?msHjQeT8F@gHd`*O%E(Nwo8Tiqg;8Il z<{eapmT3Wf61{rhh#}P{ZfiJ@c0KQT{yPXd13hJxFUB(e^D|yR68ruppKDm@LBR`= zo3QN#G^&gD?agVi1fyB^9~88Jf&w9G?p=Ie4UJnjM%yzU&VJA1UF$zE@^%x_dN$`4E57e-k-c z0PNZcz5pBkLn`7U2`_Q96Rg*H(xGpB`Fde!u5@mHeqCG3X!lEo4L^~(=Y5Etf7xbi z*C^y6(bmxH9 zri{7B-N>ci5{5c_wK!haSd<1zS3VsMf>l9xi-|JKu<2-^hY{B=-}3*!zeJg#WR7mszWm`4kErpC^qrfSTiqvJ~( zry9Qo_KLqdjKnWS4{Sc+I0-3g(|U>tpo{3M(!K-AxNp1wHGASJwitt z^SE2$nH&QiSjXiz7-)y)-G^RQ*a~@$KUeces)@Thy$M&AP9$8#pWSd+A?)6+v0QER zwVye9X7zn&W&f@1*o^>yT}>SXoY;>)vSEuSgF~VNMgb<@OMG<~fbJoGhan(d=nlF_ z%e0LNX}VC$w7q}mPgozn;8q6&P@&h)4aKkrOLVwDPq}kF_jD!bK-=&;MimrW-Jw>x z>_6;U&+hi9?z_TXY$dc}F*fTzkUen+1LU5AK2?f;9a>BB-K?)w@71gk(wZ)y_QFSzQ;rvcc$7p1I*(ys|may_^KCLoMvDO5)&${psag;Ha3@EwnvZl4hQ)I? z?V5z)9K$f=r)~dU>r+6A*zLa)>-qRPWobrPgIqn1IV%^Y#kyIw^@4X4MK#z^51+du z_*lcsn5}zr;>*oBuSw@7`G*ewWxOykXC`)RDP^a;4yQ!D0_QKpS-xXIV~QQMn#ID! zJpl?rr=rgZhc22};}&Nn&40B$+sc;oRjJ~6ef9bA3qhXBbHXqAWU+}7DR$jrv*mdV zJi%+Op!+O|dQi8+9h_l49xBQSob8E6%HLS|G(r;m57$qmTEQSFQyBmfbWYjlGz>a! z*{yMn1i)PfVL=~aU)u8DYvT8!f3%|(pfWXYACp>^;K#Xw zsnh}<$+>*(iNTD`;;~TOjThWU6{-r$+Tul9c_ii7ZX^N-dj8fyR_Un$Teob)>FgHX zb~VRy>`fssGZk1W08e=LA`u6c_1N1VM1c7(G75*kjEmxfCJ6Z*zNK@*G@3JEkR@!u zJNqNBu7JR?X+D?04$_QEZ%i(g ze%(#Yulf%#Xh%+K9q#>e+Vekb{|tEuH0%BgWD$OeNKmQ%y!DisEPD|E!SztUWU z5CZ@Q}4BTO%-LNoJcot@A=G1naIk}=fUwUcL^`R`akNN^QTNhYeYzm zzcN_86lL!L+Zv$Lp1=%Tnh9RwbkBc{dN0suWlZz7IT41l@o%`p?aM~AmDm$n`c;D> z<|>n{N1Ayg#m%`mEV_18$6oF>6!0jnoE^G&r$14h*+KZ6eBEOu<2Amz7o5B z+YqvH4Uzm=@rKp@^c8uJ$<*qr7NS9hGUmg}Cmec$+plow2YEY$A>!5DTQ1lFAOxm{zagAO|$steat zY$cbD*wNDy)+sSb@|E!|@pWu_!eL$N#$q4s3na6`QO8pYzOuZmHFjz{XA#0v-LVWe zM6`kyzZp4mPWUz&Ni@Q(5?@la^$mT`;ivSv`{aQA#%*s$tip|?cJ_o^1U;F!Nb?of zkz@-gUGCK8Q}>WTDa=dKF<7ymGs!RvK#T_pmprlI`ubCzKk)^kx; zSU+^(yO&yEA4?TdAj7nIPov8!Bvp~;b|J6v_AT4QSOt4lpMaCXCP~;w7AiHl&0k{q za~YOo6Z9W-OGu5ybEf(%?@Jdx!VJTeQX{pF$vx*N&w{%zz2)4N#Kb9XR@1HZh3W;53@{t0bYm?B=S!(XtK0!kAA{oRcCF$+Onow{1t=2!HQw)R2nY8AB^HA|jU%kM?V zq>1F;hfCeoiNB!xh0<;7_*EL|=9^HA8d(kaQns$oyE50?Lh!#9tlY zaUd+l)$=)o0ct~^Ptd6Z?LdmosQ+gn>9+(1@Y1dBQwCO%&Of;2v(<>{cSGJHyZ9C> zUexK?Un%p7no<;-mQlW-z?&ufp1PIg^h%EuEt*B=x6U&&S$FB>h64HK&6;f4?0V)YzvBkb)fpH0FLW)!xH$8GZWf4q zGISk)SH5gDp(%lZg&NayFqVS(jN+Yz<8ATTnqOVUTG{*3-8AwCVQ52G#3=#cC+tzm zIJq)nLD<_{Y>OE5jQUY6N zCX~#)*x<_jcffCI-(h3z|MZ4kyl#%l$0><;Y0<(vnl0{O$h1ar?H8c|J@nR}(KfBz zx7Tnsp3cP(<|eX2JJc*7D$gd>{Rz4ma$7U_o9j< z*KdDOjCv@~Mqt!5OF~M{UuLz=-yJJIPDQXrX0Yu%o3#D0u@O7GrJ0JkJ+jFaHT>Et zNET(amf$(2AP*Yc;Zo!x2>hAZu!r^_dLK6Ih$t@e0ti(=Vr08ZjU$90uyER*=-0Z-EgWmKy} zM$s^y=AkHBqkPK7&Z?4|Hf{XBSbGbgI=f|CG{FfFf&_O>aCb{^2o~JkHMnbVcY;fh zz{1_LAhs#*W%Kakt0to=PRwgLyRUlFAVPkja{x00pht*xzN&Uj$=>qP(sYNWi1;u-(#Jaa`zp55*-5Cy4Wx>3&9cT`rRpJ}qxzMF;e}BHRWcSI)8~BPLDOs!p%O zOLfHyzb9u(D3}EowJ;!WOEj0<5r1Wc-sNp-k*?#-y$^t)`u!73)hepWykzw|^OH7} zJ$o0mnpQ-f`EsPfy={F+s_hatoH+BakK>0C$_r`Kdkm1-YDjDxK zX3kyvT4R-fJ)xq|OL2fhbniMjPVqGDOJu*`!s=QxkbeL60_qM=@<01?q##f$OXQC}|rJg=K zs&=b3Kmc(>i^#Pr4SqKhJgr)PFekfN9q8*s9L1{7_u+nPo~+3B_3j~b-%F()EYP7r z)38!+Wd!e$Rz;^4oi+o%m6JuH_w^cN4Uf!&A$ZY$uGp|!jpuhdq|w%(w3D)sF$-u$ zXmc;QgtcxtIcEykroyn~zlC|>gn!zNcY97CB}d@}fd@OVTsM*dz8Tb`#B;5dnESeor+0TWZ{c<#RpzU4Qn>QGBV@)gW+iilUzhM)Vu1C)aBR=96 zK$Q58DyDwo%0yaGx$)#_(HSp8#`cI*YwYGqUrF+-!ObvmN7Hmog* zPqU^sI^}A46QRqclrx~?1{XW7~kW6?*|QC)9#sXq9_Cd1z@plmgdGD#JxR2A2r ze%YMfoLy6gi^`P*`M01X5Q2*N4GU*#ixZ+XU8(fng}@OpB4qw_Jvbd+J$iW62aKTR z>rY@HJa8?`L|w{lu5whOD!|G=Kr@Yc^@(0J2*L8Tcxhr%1>rPL)>3HcBKL0duCu7K0XZwI=+6Kn2MRN12!lP7)%g~{ammiJXS<%dgo{+ zYD_gd3Kl#ctiD?rXwBgBeX;O|$7F5QR@Lqy0_LaqwcOHVTe?wdy;9pO_^xlB;j*QT zPD{DG08VHa^Ikyb7M?We>xWD1&>Lv>IkF$<4X%m_Un(1*t}%$@)X6`yU69MC@%Pp6 z-T5R$!P=dHvV$fJ_ zRzP13KKhc*3SG*c`m1^J6_>28V{k~gl`YWF${h1+s(w$uB1=&&>J=_cO6vZVjDBvL zq2*1$y$xqJKII9*pE63(sf)`xd##FZvRan@w#+VKpvFbf?P;kfp} z7Iov;K&nIXcd5=hCKx(Dv4>B$J2*{S)}qySgRpU$oujv1B9G#6{SMbLpWi0#=$3wH zJdfM?ywSp)#HV?fkGG1As@6Pjq{s4(uNQ5+dIyQ-8*2sQ8F9>1g8^t+(;AT%jQ?sp znrh8xkKlm2z&iNamXFhnMFe5ti(P~EO1ODrN92C5B}~d;73G-dRBB8Y&Ti*d7yREn zR(5)wM|i}2-RwZHMqUrZqT)bN=ecgS4j`9m=n+W0sJ3&MVtR(U__mdW?2=n0x=+oe43R@YR2y$nl;*k&UMHY(RK+x(Hr3>UH$aI@f~ zcsmF0dGFWkBf_Zc)@uyu;pLS|4;r+_v^E;(jhh!Cp1Y_z*)NnxR;fk8fB$_9nz7H) znkXaf)rDe?df0G5+)s_a;Yz8&N+bOF6YGCFA>{%<21@+@E?c@kAKV}c>NJ3l6zG5t zU>yG*xj?1{JXQ6^FfRboj+Sf?N`VPTWhKs@)y(>rMh#SoDsXIaJWp}eX`X*rKrP-B z>4$TnjX7`2O5u;~W~!9sRbDL+g921hkH6~?l3Jqu;7_%G8{5D=$&8j)fQpdDdY3on zSW@t6w}rJxiHTy<8MIR#y7=Q@RIUIknT;FIEPVv;mL+f58y^EQ?qVHWVEfQt$jhmG zDLOUDO9L}bwY!7S1BRJNtt`p>OY7R^_JiKrXGu%GT_LnT-y=vhZaUD~FEh z>IXc(kyVGIcKgisJ%__ogh2n zeTVXjg3jC)YNb|@1Jm9a7&K`*gTddJH#yz-bzO_nt&eL@Ge6a@rbot9e<4P}8bUx4 zE4^yPONkwwAjikoq2q1ND&<-=0Lk@_)(x3&!Z%jm4$K)o#`#naO{-7nd}iX-!I}NZ zFo^Dll(rg$4FG&^ISc+SILgWv5xaTV>{_l`PWLmsgcaug%*x>t@E-L+A5PlfMPbjy zz9iXOm$<8RVvr|As3sjh^+hgI#TEa1OLG%p;Do-g7J#iLU@)kuI-4F&GQ(1yoAm=b zA5U2)Mr7|{Y?(5bdoRz+s}dg+?RnryDFnR+N(Fd74sep~ZC%c0Q5_-|A{{#PLah7S z0=y+iUc7kkAT9Pm1+wYdm9i@wk;UYPVLzsin55btww4Y1`U8@0VV3`G{J#zQ{ofh% z_&##UAB^AZh8F0P{o_r!ZhtT-`L#8vSE1ctl=NDQ-R8GhdR!KhxZ8e!(t!H)PM|UP@nAlK;~SrwZe`ylwAh zE_#_%R5#fJDKAqR&2{>h7auz4QoCJ-p?eI(wB=0xmgp&S*<{k}gTtvpfa5=4zd0T@ z`;^V4J6w*W=7U>C!lmgoI(C7@5H?wo@Xpl5&_T|1nQ*A-Goh>|f<*=7S%dyag!Bjta?sj>i^s+Zj?0l=xr zDp8w2cK&rhQSTW}E!Fvy0>{VwGFgz$(*$>U$+|P}af-C(KzMm+Bilu4ji>w#>Vq-8 zu*D9Z+q6+bgs9~>*zs$19iw9t`T7G{lL<}e;Y_WFPP)j4RD5Ge_~M2S1>drT9DZFSQoMkgjPh4RvQ|4*-Gknf^YL^5kmHr&0 zwXY5sdG|Y*K#V1Jj&ql(Xu19XljU$vUR85xt1xoV5We`GY%|j_Kayxn^K@AMf``3v zPYxt$E0Bk8USrejV%}H(0($mk!9RKI0b!bc*1c!oDhp5YDLzk@gSrr}hs`XMt;=mbG!=ma6A zsYi?}lF`{jd3ANE6AJ7fgN013ecEb#E{$#h=QP~9!(Rfu zff`i2O`|R}o!>aXRh%#n!>_#vx31b?=95%^qoh3nziIFOws6@q{jvGU1$B1BcgQ&- zt1v;?(o{W)2dZ|lv@>M(=|c1zx|RT|)ad*nvdtw5tCq{Mo!%?WRghEeDm#b?Rq#S3 zN#TJtME(&aeW+y~X74p1Yzch_UER56=wyDz^Z@YkZz2h2D;SA0jz|`#`rtv! z)cM7?&AV+yzLMgl*@%@qoW>(fKhayN7nJfpv%T?yjeUYIZCECyCuv7Ld}MS~L>y!q zD{9fgf4>V+RxphTamt_IfQK@59Mfa4^1U#w@PNM@+TARW?KBgGKX0|IrbBYZCbU)d^njz_#;X}`0E`HKIF8Ive4&9l=LqzuJ_11 z8MFz->Y4~;5COOxp$Dhwwp-_1{$t(4Dx5QBhoDl#k-Tgvd95hqmW!c_f$N{jb{}Jj z(Yq$S#(Ee0gzY^qFk0osrdPdKHDDhgSkrmHdiYQbkV+MeqCAg!GEO@E;r5y96B zv&FVP_DJJ6sCWCk>LHdpA0$bNdb879LL@*if_7PwbsfVL4)3P$(QJfHW#IKJMj~k( zE!kXT5J;@30-<(n6<4l)#?Yu>v>9Dh`#8M!(pqt)T%Ang1UGCwqnCO6^e3Xx z2>)0{ADp=f#7lS?>)Rb)vpEJ>x5Y5y>5gA!+iPHR&S-%B`Ww-bq_jt&08^7tTyf34 z+Ri)W+Iv-;s*}*7|p?mgBqz0%_dAL6l-&9TW|FRg$ z_clPWip#K)Rq)gg_c%0IoyfoUZH~=5S#ge*^^gy1FE3@=3?hY=T`Z~d6NA-MUcZ7r z)YLfNIXBDhC2*e(-fLe)HoG=gzAS!s!uykXM3ilbaB zYH*}?vsRr%V!2Bb&v^^`98X`ju{lqEhs$`>R9|wlcu1@Y5)xk%td9*MdqC zq(IVvm(y{U7DfLd)v%zt$5cVI@CW1*vBS>+jk9@9jmJzW&2V)l7`MQFWx*9;d*P_o z3u%=L0{_?(KCH5Bl8X`o-j|z24--;L_=#?~O4`c@kEU^h%D>O7H3kZ6rk(2hLh=NY z$ChFy%vXauL8OtJkOa4$QUk`aIDc$V^Mow;9rR_|#!yhT_@nwDWs3rjDFsB6ia*|C z3s6A+70)Br0ts(`(v3d0UU1i%^2;Syw0dj9XXM!aom`=2uz>^52aAtlVtMw zsE!SMmDfb!x7^<7hr;PG5#Wr-Tn5qOjplbJ>~A(J>SK|zod)KdrKMHB7Cp=fz5!XU z`n=?<)$3lP1cV%c*DUv?-AZ)EAw*8(cYfQ58n=_MHKSIje9oUyzza`9l7_XLMMlv_ zC0SmFvDLpPc8z~N3Ujn-?ymS2X_lQ-==b$2+lwwI#IiUIe(eQjT9au6-5kH_1>e#d_!8Y^Jaa-H(A2*hEXN^h zOBomgpc1!4q5A?rmMflZQ~nPr^!Z&F(gCx&{&!NS;u2iumZjCtpkhc^x7Tp*nSPFG z8Xk8EsS?V&T_wxCwcpiemLO18L2SEAXtq@<7DyJtJ0w7%A$hTIT88I%Kz!D;ti|wT ze{ZLfoEQ|-KKLoeZyBTH8#gTFXfvs*HiR70>2=D}ts2N{xAJU$83A9JBCx&_X;yuN zU*m}~aOOJ$xZGfwxM0-d4V?zAAP>B@?sbg-T@%bx^Nzzbb9U${cN<;oRe2X^2wftF znHc-ktm)W_J;Y^6JT~9zA|}o6r1|EezF3jdN;|4`?@R5XYp=pJ+vkR-j@6zWTAk?2 z^VM!dWpr*2^Waibv-V;cKo}K6+TO52to?XFj(R(gsL>!#QlPUUuJ}g~L`<7ejI`sH zEBqM{7GT&r;RCef)2c+cj{s0W9+58qD8UA6&WrvFiT)`I{5kkN;s3;x7WsmuI8YEs zJLRw0IgcK+;saOq=pD)@>s5k+I$EGN&Ux6#uTpYwuTpC?V4g%}B!LXmj&0R_u5Qe~--whKqlb3DCcogm8lN0u{Cd%Q&4@K4|8= zoM(Fjsx5{KpJcmKDM{mt@vW+o=5P~`D^Y+V*QRC@isPV&U9J&kNJ8CqI z>%;DV|h_*Ugp#sD?P9(C&{L?Y*w{xK!jzEUJ$#^-A^tgB~?UCwT_r{=0kKxu$+P&t>Y&_0=p)Z3j7FwONZ3-?OVG9cSeh8u+ zz_jZj%0SgBCci6RRNf0`RH36x2k0y<=lKd4QJpxvB1qEcP+tS%K1W-=D}DdT93ot? zTv|ToGPk&Lg+TLk&G4{O>12v%&5Z$S2}(XObn*TSwSA1)a+7%m(3SoY?~o*;aPPgS z{F!;!5hBh_6wnfD-q564MhE+wE@TFxs5(;`dUaq}$?eWiaf~Wij{_novjXb%r{}8$ znqPO9eyqN+Y#INGrP}?u8hvj4dq9e~k#}W`UIAPBfXp3q9Nly*rsf z*IxeP_C-}L&0|(x#JGJ#naW<_H@FlyaOaToo13egT+M}EK%7c<|C;kRX9X1dB&U;^ z?X1ag8GHbDSkt)_TVClwk_^k$7kEF`SIV7(2C2mdWI;VCxI$(-W0{U*R;j~%H<8B$ zUk_8p`Z5<4y6=LWKKaEmx^<0%5 zDRToQw__gots24ZTS-~0_LHs>6fM^!eBZ1(O-qI+XrD^o*6&^|md+uOqcJ{dPFRIl z!-ix#!g?M%zQcjup@MwwdvZnF3~~bS9EVN!s*lx8V2hT)sXr=v(&w^&(xNLQzbwQ% zO>7FS^4ZnNc(7uc9PbIG^$}6|wa9W!@J>f)ggf!sagNbMfqK3siGskx{805>bTP|y zh0}-tWn$1hsrR__{81Q6)lPe-;gy^)8+17&wr8hLF9cHH_R-Q5cS^0%=w(Xh4H=*= zj5D+)Fuud{-BLImNLlTzNQJ7xm4Vc0o|ay#X_us_8KuoX!}u|ElrP_F@PCYTiVO#$ z09IA6ZeXO{zruxoBjEmUlh0EjSX_XM?SI$kywih`uNo|n9(y>DTKY3G@@Jsu9-rjf zcv^bsV}v}KYiVg6yHUTT<$_R)9G^N4yh-Q4DYQB822{}h}jpS4;nZ~sRH1h7eT?kW%y0*C#^-gWa< z6@vlJPfn&}*in=$4{IbRmrDn%D^6Pt^bxO~@?wNx=DQ=38A z-;vtn*{1MDt!miAtIs(r&sQPkB!Z}LCJuuXvk*k((7KvDF{QN5OEwI$g^HR6F2rTb zLJnl|jYn$EDl~W}aG)%o)#Z;MDz+??K`&ghwdwh36kBVuEm0(jPs>&-^t;oh>?OBP z(etWR;H}kLWi{;enop&eU!H5vl2QR!V1(FTVu7RqVFvA&^R{0${%mWU4JB>~)f!E_ zmvTBk2%KIV2>v1(KdLB?ki^6Yab)y;D#Q zabO*(*OMw98Ho8Dyg*Tej|DRAZIRl4gtTsoMF}3x?Rji)sBpVsfER!Y%`)|n831FN z#s{(kv}f#q_s`ktOe7n13h-1$7J!icKLsi?;5@Rzj<5n^yqMe#A_*`7tz7RJV9S7l z+o*zS92r>*?od~Fo}>>|!@tKZvjH4UfR1g6w*8&8=zys_&4!#)I|`i%X2Q}f-YUbo z3ToD9#lrEh(9iU_79^$Es;nxX`NoA9b9Sr5i8HSGrJ((L)u0R0juBy6C?5J0kx7^%geo7dP%jQw>g;6_8J+Zb(&= z0!pTcbFaXiY6c4d^75s_?0m`{$IW{9;rQ-CjX^5izvsC=Ualpw-YPk>+=j60vh6HG2s6#J9N((jw0}~$he^wU9zHgLt7qc`+H)Rd=#Iy6)?ia zR2-lYb-ZIqp<~Qibz)P6FYb`!ERdN(a{y+qMk~6+$#v?P%sI&2l}GO1Nu(p7Gz(;< zao)lk&u|}n?m$s(&)S=CONFvtMd{}q+#o8JofrTD?+xke=G)_;*aQHva{&+!pcBLY zHFYK{MntSi&uL4I$Jkp?sCoSzz3{eK`5zVPAC8l+h>f**!DQkK8bZA>1kabAI%jD=nI)yHr-N5>aKb{XG6$e>L4Z!eoz- z_Cf+lw(-hk$9Vi#!Nj>XuEDrvXR*O$`S=buQ>P-ZV3nA^gh=^dFu>fLMK`rhgY7-de~K(HcwoiV>tNy6?5QKl;wb3#f zd!QLq`o_ipG$($o&*g zTtuM%tLz;bvZ=6yBEBW(VOJi@Ay04b<7;^GE=?C*~GzACXl%hH{E+A1*$ zTRzRl6I+_sWB*uZ!OHU?1sd1`$vyZheKy;PN!ESFfX3y*Q-ggqb`+%Z9*p;8aAeP| zE2!jy2bo4ILZB)pM*<&wI9qTu*0?a)`BMR)7u@teTLf?t{S}=NeIRUloMnm`2E;VE z{doVd@ot~n51|a6L&YOG@G^So(1GavS@G)p+zTKpKT7|G=AA|-3!nVIr|<#_xqfz_o-Y84 zp7KBTR{+wI-lRbYZ#;-P+GXBI1mA4=#&)>l3TfJ#Lv%s>#SdQ92`dvtf4VmX@}&zM z2_gv%IHh23%7jlPEP6zrIs5y)x2ZH_hpKwMHRfH%Am$q$%Xm9n#+T?fun_cSoPS9b z3~w#wUhA^77l*ShOp+zV7^b`g&WW-r#k0fu3+-<1)EkFD+Je}3<)R+OXemp##2fOEb5JBY@|4~HDG^~!l*q?bw{Pn zH_$e{E}(X+c@O5>XnK!#GlLapS<;=k2++L0RZ^#Z>WaUI)Cf!D_#$%gUm7x$G1dpF zlA_zdSt}NNbuzeljcIXutsX1mfqRBr{OOlqpeWa?tJz zlv)F~vL=DrDOKmv5cbh}5wR?Ta{X#Ws)IY0$Zck!sDs$m?wd#wl*QRGKW2fsM2}8E zQce`JdJEa}o)WC$4dI}x9^X{KprQx}g$8|;iMVAmc0eHKNIi;EuO4 zfJ`8{G98dV(-k9ej0gWMkogCW6MKf^BCef+l&gH1(zk$FcF+9V{pWiUa>v4t`R)~r z{22#l?)M)!K`mUy6O}Q)y1d4~rE}Rzwsd$kC+cVwfmi;DRjT#lfi6e*jrn6ti1vyN z;tD#k^`vbpAFCQjF4pTM4VRA^wYZDVwWtmnxS_X)qGIJaSd zj#g_!XtMoy1qhkY#tN} zZ2;jWpbIR19!gm{)V(E@%kx|VYfQKND81>KG|(vweHfaDt!25sVvjCk=hrX|!zZv& zLdz_jsO))3C+POuy320<%pBeL;kzV@mj^6cP0-AdPO>iOU7mrQLLpZ?GW;RUi|s~$ zTi)5$oZbm63tFyA^bJ_nhj`Y1mUZ@AIVDZv)(Hx95v2)ld`3IdP`*F67Lh^eu9M15 zL#lfNsyD+uobZZ$t{esI??S?h4mdxGf=XjhIloc#M;g&cvl}myD)RP$>gB={Ewac z=7IfsH(^Zo0{Y|3d;8yg84FeiQ#a617oPJuzf?(B_52TT^ndspT5#%01yfHA-iJ-P;F9}=^f zCf5Yjzj_DESmjs0eN^p~0dDqEPaswQtNsRA3I2m5KImorsvMm8b=3%nw)}4tblu;W z={=%NGo&rQw_hyISlD>5bZ_@0d)<1)3)pwEpYAxwv0jA)-DZn!wevt(5FnqHI{x)i zQv84S(D7?#Y_o!+50xeqgXSt85xDdPiJk0)3#L{Y(79*-W6-PbV>ff0X496-Moe|L zp=ER$Lt8iivJR|9l(8F-9Ef6D@&HEu|4C;E^?UK+#naObzvj(<<}e*)!TS@5&-OhP zSZl`G3;fazp!!NC?Z5T`;*h%enwMt@%0uS<2ln-i14_!;SE{%-Zf>bAgwU0;eaOY= z9b^w;J%0>IP@m~skfS-zD6P5K_b0-jc33Swtag_r*J}llvMCc`*lH7C!Aww9nJK*Y zT)wsDXeF~nc}Y$N_Zo98Rm7Kh?YwKl1q@;8t%hCPIMk*!+72qtbKg7*GTo-jhx1%I zCHEau=pJ~=ei_S%@9RbJz(s3N4~s*8+4J#fDwXI|R0NtBjrZm+J9lr#ScJLM zh>y8^FhV)#vF*2<9XCFrF5(}vA;nzKhn%^fX)692+MG!AtNwcgazx!wf9^W^UzNXo*>0TmT3jV8BIG|}S4<~kDitT}K zxIuZkY|>}(DhcE^4nnu*?_Z7!uIr}I5RFg{ME=(b{olNSF{C03 z!~_#C)nIbZB8M47Ut%OYA_tgB{Cp$CQ8v0861-J9q8$=IJaxKDS!}R5G`Ie9$vy)= zX-}wP=G#{x^s%3d=hy2k>b}7lW|f}D16CnftEFQ#iJFuX#DxeAb`Ko`sIv%|sFs`< zAo8ByprGT7TN18z59SvAM|%?zPnkqx^1%85G|P4pDLCtP2Wi9SeSBW!N3sau2_z5! zuFpFMTrdIr-lWN=H*Ww2Y&Tif^S{$xM3UBja^RI#!v%FX3b+j*>9FK;sx9+ktR!@; z5jc|4zz~nNVf-*=7R#|-?S@dGFTK_yNrNlv;9y}!XJA+F784#e6t4=wcYtavgT<{`}Lu`Mc$g^s|c4nQsPz$T~ZZx16uk$HdF3%_)Bv z=g8c8c0o?`f{Go47jhg0%l~|;eF%!tU2T(!krVnM?h(L^ON*@Nr0eNJqKTYO7sOm1bh zXTujJava3R8=`OB3b|t($usllIjuU$jC!3?$#OQ!$c(W9h%pzl5^Yktz^ljJpSO{O zv$lzeypZ{?^X&ho#-UC!h;Txlo&D}hMZ5^Vs>s_fg3MFy64PKNf%R(3r=GLpN zor)fZ`b`AQ=YA!MG4>1cZEuK2TVUxS{K(YWYU=&Fy9aJ3xDI9w<#D6j+g@CT`?gqd zv*uKe@~tHFq(Y%4F3cD0=30d{gnD;~<*!(Y1s_iZu0|fe@AxixQOGn@kXzb>-W3F0 z*)$Y>&s+7;SNk0+6CKR*0nQr9u-EV%2Ivcq#iZ$fY+)n`*zY~mw*R9k_%r!hsA28N z>7azGwYI|1q7Q*3x#j#HCEOi2o6(71Ms|m11DHqfZ8*>43iCR7^Fb|bmo>^!XX&rf zVLdeBKNez>eq%S?s2sAR(w)}0Ij>lKD+py8 z%e!`-mLoT!hvI|`P(5{?Jfnq4TMR~sJh5AJ&UggGo97=-jXBPp5I(nD6{AOZ=O4_e zSGAyA#e)QJe6^&(*(qq(0m~(FRgjEZA+Gi>xb7zhcIraPd8_=L?gWd%ek5&dB8!_9 zDjqEc$4>XH4h=^(NsZKnKfcv5Xw;(fBWo7WbgOH9bs5tYXSbbGhDN?0wUzLI8r>Ji z8t;jGPdE;Sepn$KwiGjquBQWV42(8qzP^mnp)&m6)J5ovImSnAT$KN4z_WX~RTy=Pt>Zr~8f;KBB0kL1p=F&xK)v+u+3>LhSx9Lc0 z1RVTD1$+TNs9Z1$REZ!t`i9VH!X&t3pL@x-DX>?`sYa(Gl3m(Kp}yDNAyisyO)a9h zAhRF)jP$>{tV6)*X;FD&%%4>c88s|_tlBctSG*?D5Z{cq3r!M`q9 z#dyFHA_OR0XahMvf0sKBGvEZr4Vj4pUaFSB&O?LzjUU`J8Hp7DwSd{n2qfkaI#&+9oY4jG|h|%Q~zM5@F zLH|q|NuL%!ZD75cSUkfx5&U7w({i|=u%BXKoynEu@}CVawgZ&CUW-?1udsidQ@4RUc)x1!V|`m5D}zJ`18OoC-$hD zHt*0>S%qW_LC<$=fXc5mZxwcxVEb}Az-#$|=Cc>E9y55bR)0?53sb}_nyvJJ>zAwYG^O}0 z%ojcNvT&G~sDI;?I@JHXq z;~Jxme_v)R)6=-nTkr!eNSb#!p4C}Ez{AU7Z4CcU%3H*(qdj)j2?t~~-Hryqbv7-w zYcnmYYirDuIZCI!i9O$u$WmJ$kF`K>RiDpbSf@sYDj}* zJ|$D;e&SIE1w+H?IJB}2PJ5*}Gz}-u0*cvmewCn+CFb}L{)#;|TB6$>@DouEn`CuJ zvpjfI`}zNDbS@Hb&5oi6{vX^p5RZnu$lngMBvmVG%GaYiY>} z`y8~g-Oy52ee&Zg^qqOKt`M`F9sI_DUAG(4&P23!Y)MEKa^uB$a>9nzZ+FENTYg*n zYVzmoXJIRs@t-8#D(d2WU5;Nx@wvK0jw9?;k+EfQZI@8QDzDzB(xp^2`>FJ}uK`cr ze%$4$uUyWY&tDBpS#a;OZDsn_Rtq>}gyZIKYPyve-F?z(kMW(oUuPQa8AOy1&B-3g z@)Id10oNL}>axO16W{OkP&(p(2{49P7lB$%8Zp6s+CRJfMhtKYZ{m=aBMhS7SU9m$ zXpC@dweUVW=S&IhY*nOR?_cV|+-JKDohOJYTkIC=E5MypuK>4+(q;9`ve=(1?!yU~R*EvC60y zks;KycH!XwHkDkTIbOgVkB(-(JQU9b_WyEBFMLT{IB%@{gieV7bvW(P<8j%76Cz;a z^Yj5T${xSxW~@9<8J93H`I`FJd!3Sp<=SbX_~OHS!sqd)iIa7y0TmZ#FrWV&W9;j;ZyigN!RA;ZjR8w%#GzNQ}cK)R`*dvc5R;f+$TNH6F1p1Qpn94PSVp_ zP&UhH*C*hTdF5+EpYGS!<|}&SWA%Rg0274+Q`<%4Nz&K9L!ipTezD~$2)6dq%9-D_ z@lz%yih_BG|)986(uXX{7jn|;o(oTq|0vLDi}CJI8hq({6wLgZEw zUDMB=h)*Pe;=ePhe}(*6hJf#a2jIhk7rNOV=cda*L3EZ=Y1_vfQO=%l6r?a z`<%ZmCXbZ>M81`f_DIPFyjVvqPq)44LRBUYZGEs-)dqJ$ zLu$$IA|L?nx*E%oye=b=+zCrm)xWTBnFrb7FsBY_|6!b!gVG{znp`v=`%pC;R;Y82 z0^_^!Ze`8$o`Uq1e1R#sB)o}NpLC;y8apFr6!b#A4s-2YuQ?a^>fRY*7oiCIyfX&R z1SLBV@wp&_M#Y?5H7c#KK)C#VJ;*VfX(zU!n%Q<~C;JhY92I^P8r^)~FJA!=mR{5M zs{b}Lao~j%!0N+UV>d+_M8h~+ve7(yx^Tldc_1%VBz&n0H-U`?Abl1({%1YVeY^ouFF%eP8F0g8lfp_{S<7dyTMU^ei+l zD;m$$GduV%P1mV_pvqWx*{mFxNNDEZ0t=kNZ&_+0?1?WSXD?)b={kcXP988Nvaa~WJ%zQAu^l~2g3<7@EOHPDQK>g zBaj|$H@T0UHvC+lc=g*obj0DLU(txve&)~dL$8s@3CALNAgWEV3k@}^Xt8C`@YpGh z9v%I8q`Km!YF3GW6?Ni;0b=F!jm7|#C#mR)eRe^PX|N3(`RJ!Nd75?I?~2dgo%dxOU2^s0pdOh{3(;1>bIa^{h1-dwqJ5o9fn1x+ zf*QTfJzgbD&4zX9Uj_%jLsWCqv4P387F>`*0Gi?W>=per=dN~lF7_vpHn9f{pZ=e? zABBJPXVt6Hy?)iWyd1HCMvEQhQ0YV-^3(#H&u>P~l>o4l+F8f+PxdjL1$fJr+E=F1 z7@)lGntd8TH4{lDf|D08$Bd=8L0IH~A~`ZCq-q`2{A3er*Ff}~B~PLd*H7IDT6ER! z-IGNl`SA+oU#N12k`?mBJ1M{P`gMTOBOAa&vM^Ios+EG@e$gE>_OYwYkoZ%m6NdA1 zl_5ff21q~?#6>`8n^G#dh`Yg&{)2C{0bWh6G(Crc1dcwkjCd-$R|v<|!%Ox0cC0vQ zw0-JkbsG_OpK*iXP4pF-)YRtUK>qigUvV>tHnBd@AD-))k*#Zm!OE=r!KJWAesx^~x~#A^i^QRbl6TDX~!C`kIkqUFnjcj>_SX zl7@0ON}HlZfQ5Sn4{YUYQMsCLa`=g}w%+VFFf{%XQ_CFS4Tto#aQ`c1A%i=R2O^PW z&ET5vNVAHQAY%p$kP94jPdd>{43M0i)ONsEk#n-2?3y0U2KKyJ?NxyH;A)X?@Hp+g z?Ay5cKwPySTsH0NJOV2P%}y|naJlc36_MA^yjkO5&}ak?sSrg$fmMkc8U))4%#@-1TxIn+)d@~pUW~=(#(n?eTU0jp0m-EUfO1I)TN-*!!!qQUFqDxJk+fK#> zur4~0x1l+YuQz|!&TOkI6@E+*^5XXSiFeWTc=^f$%-v>FUD+1))k224!(~5oOnlhU zZCoGaHBYS*ouIXY*Ln+jvH|C{LTdRPTbFnVj~)=B)#ZCJ26DDM6uSHe{P>s)0esYK zmg+lM06L`};p@c&Ye_181`Rxia$6xPBvMEm=r9Z+NhU7zV5{xzKo5oghp@K_i)(AP zK!Za_a19V0J2hx6b2(qBLD!D7x? zRinljH5Zug<2Y%#l0GXQKG`yo&PwCk2Q#l(f#m5kS`sbW@uTKBmH7F0{lcfTv$o9N z`}e;q9ks~%gBa1}A1X?>d`(wp_>3dQi~*cs^`{gYVhcek0ItQFr86%D-;gV{06MO} zC88-@BsVkBcT@wtKfbAcbli%&K`-*hGIp$0x{eOys7E1mQky6?54$Rd_uI}+9s4q$ zBYCRNV2CjNs6SJoJ*T)Ij#RQ9MZE=aeT(_}Vc4SztW_K&o>-3BW@|~fZkH@&z@Q^h zHT#O8TkE|ht!OB;oGFwW@4v;{=>&o|M{`mN>dr;tBWo5;a!)sd z^QPTzQ%x6|e|$cutQeJTz;h*$R;Z!$IB&W&M1RtwmFk7^(L7%)mH(HFv>*op<}Li( zZ!2gQSw%6Uam4URzl2DPzo^?XPDzdXd(L!-5|I5izy8Ue1JEG`j2Ie%S?#$#WKB?O zZ)lq~&op4jvHM4b>%pSQ+Di57G=p}uiZ=e#k9^u}wafWKwb_JBYCPR(SPU31lE?`yb%ev}%PhGDB0HWtH5^1cZTKR^$} zbL5egm7vZVSK?l@9 zC;X*LD1rx|qgG_05)dr%5!G%XhV#U~s}eVncfO==X!?gVT)mAgmuq8WotvxvG{##k zg;-cQVy&!K!2$6?C0?X%S-hvsdx6#If1cTvlk~)ND9;F}xigS}Ov%mK{R(Oe1U1af zH6vx%B7nAMK2{Ig_vqTAnYlHa_?1x(u4N|?kZQee6vF6H2E$tuWXnqbZ$=|$05Vz- zf_3>PAihJTUjrx^gAO>iViKww(C;8vGnL-C){kY{Ovz?7?wU2t7CvD7plhoDjmmey zcI8u54@2fv4=pcUCx!K2(&i^}`wi<}4!oqTRAg&`yL82U zIf`uIxu7dznUFQ;TG!TC_${YE!cj+P+7N3?<8)!x3wD<_QFql&nBiM~W6S>$&wMeEF@gA|fYlmf0gwy|q`GgXd^rFs z318~kdTw4>)d0Dd1o#0*?$47(z*1Vh&;E{yo2><5&{_vH#hcD;CQ$c`?3@f9S%r`z z#xb7>&!fac)xoCEW@js*-&UY?C<&5Vh%H~v^4^R1^(pr0a&AQ9-c?q$x0H}4hxLq@ zXhIU~^@2>zIp;_;`?WS`2zCfE!$Yt!?xF&3ZQ;hnrmf&VL(E4~K#=$Oz?j&)OsgT( zkTWjspiq>2+CQOS|Aa%$xuHl0p~PyN8h`?n|KCu6Z(O&U6aVGrfbVeLARJEyEu1Ji zU<&O()pW!_3JEULJso$9q;A+!*v zk?Of|QH+P9L~DW`YUn0p*WLm_Lt7MkZr|U8r+Z+1PhR7_kW8E>A_q7O_2-xH+%E| zO{6Ws&tJ1Zy+`fxLNIN-Ov#E)JnW630{=W_1RBJL(>)TpW^dw+;|qSt}Jw8{TVT22Imzt6_8(9zGg> zPGWT;;#vy-nLh+WvntmGR66*Zt_lrY8eRKE!WS2K@=|BN`W$wSgD6`_*n$5*5Q`YZ(0;`q{X;jqHm=I|UNNQW{z;(=Oisf0<)MUUt-z_!7(lpdy7uBNQJ-PN3d zu)FwSCK;jZr`GYc@yxXVRuk!^O;RLyFT_1DJy1j*3n&?JJ?}HH0HqfP-pQ@E+Eucw z`ZLSXz<$mGgd=Q5G&bSJtUf0E=+B3@8jA1y=_8L&>6dq&&Iqqxt}#PrnNcL{Me%wv z69W&$ltg~T>`>P0X$2)qC~L!Y^3?}cP{M8;&^?K=-zCCruPZ$Zy`^tW__*#(U?g_`l`ovHOm>_ zxbdyYk92=i><3*c`fB*$UJyBpmeknCFPb%?|2Rj>;&oXSsy#S+!CQy0s?|TM&iny} z#?9VMv;mZ--t#0-N@4#iT9m&5#p7Ut1gXOmtE3MlSF}> z#9jW*_TGe}9vdF%f(=MaybT%%UH2zScT26H4ksg@-(VvdPM#`Cx;0_IR!ag|2omw*QVOW* z(bz08UivXB(*dh3!g7u!PRc&Nss79E8SMKU`yDQtg$`7N3n8hM?vuT@ z4_h!QMCXdL#N#Q;czaL3$Zh|I{N8mYkR8%<-An@AuA&cB8E=xNR?DgaYS@@MNR_jS zfrS|f@|kW#7bFK;rd7sfQg606LNoW+0?_aKaAdMw??Qt^G`gDiW7w7J>`+u6!o`a^ zRwURZTgK&Qsprq`)TFKENHRuSRy#Kbmjb(SYokAvy_%0j8>QKT&B1}B^h5&UNtQpq z54wvd7sA7iXUJd0wuzfeW_1Jcs&`_lMPZBZ2MeRT7ACa0TRvK)F1hGrGhT&O&LjZD zAxZgN1dw3@UoBPs#jgZV{JJ?iul-)rnqs$zJK&f+hSz6V|8t#m=iiBC$Nk?-4t$pd z$8?A+sNl-6VDk=rKl^RFZap88NLH^!Fa{*+u^pxD>*T~wlMl1U!~Ls8qrFX1H@yg( z?sQ$LYgOyp>_OS+A+rYtDS`R${Q89jL3fRJ5xn#5l>|z9tU+cS+Na}4s8vB`we3C^ z-?gb7`bdW|Fn&Ng(HIj(M!+P3Apy$}>zYVvDP3<b3CtL=P~_&UapMsldiqXyVy{&-Yp*~ZTZ^k zn~{5rH2n^^HalRW$RQeue^A}Uy8#f~`n z3R9Mgxu~P2)kWDON78m@VtNpyM@hnJOl%}7 zNBr!WH!Is|?gQ259rCZY;_kCO^zk7-(-z^ac`^YT1y3;-Lm~2PkYk+ozZLB-w51XF zY6rjxlE#N!vi_;(KmJi>6+M})s!n-Zu361CIPE&E5s9Y--12+UaxQDPIV3qJU8xy~ zKm4)q|B#aXQoC0uLQMSpdL@7}YtUv4k=E-W-c}{okS} z_npl)bw-Y_3GJ;^K(BnRUuIxcIu`ESi zy+Wdji}WG!+i_ne*=j*b*-yW~&$d$P@bphBjF0`wx64d#GMeL`T^rtORxvfNv$(!S z>s%-md?MKheCV{BpQ>d&T|Y5WkpBd@e5#-Od`dZ#p1n0QWKNr8_r`qq@Bdt*sW!h= ziOT%x&`j4)29fz~6Hz0$v|9;_+N^u|N;{Ibj7xwujTv~YWAKOfB-l_Ab`l_C|2uVK zz(R5Vt7;eufa8EmU6Ny0m2pzc>Oh#wV2fVy{S(xU^)qywi=GfYoxd9cqLDG4mH1en zhcqzHRF2LBV~PiPc`#*MxpRE0YGFn<7P;I|i5!P!+O=qaGK*>~D4MPhvL%|=X-|u`#w+eH9o4dCTU%cq{J|324b$k{ z9jC+Q(%B+Z6LP0qmO8UV`*=4NdiVId388Pk>f#li-9TT>h(~pLdt$|^L@ihbHV%Kw z3kPoKmD&)Mk{1;Sj$K_QKUUysQ5sTXQ-9`tsos@bJvgzKsUIbNHJ&0>k3CX+)*Sg0 z;J5B`091FouF1aj9)}@KZ!3JdG*?Qj>iBVk*5>6Ap>9_Qqs{(B+L>On%I@V5_Aiags$P*~-x3U56>E^GKd zNJ^Bv7uxC(SdjDp_B=|Ow)uNKgxe+5j*XfSFURd&JNFt#E@n&{s#GRG*4vs?;knAO zXSFj#vlH^d(2UHyntv0%H`fmC8f3R}Lp=CSk>U6>@T4%YrHb6k1?*I{pwJ{g@W;BP zJEOf9-w3tuXq8imYC-(tKLF86xmS8^UcgR0F0a9a9Svd7wq&9`@s@S-wEg5F`I=2F zZd!xS>vT|N36*NzmI}=1;MPj>&BGEMg#IN=Hd=~od@)JmyDI)qsfi~BF*qGk2X*K1 za4O-W>is;Y#8Ls18L3JYShfW764e8%C{Vjuj5~|ubf484ii7kAhh1L=9FIH(_xfj! z88!YE)XFFASNJc)Gh6=<0GRZY{`F_Y8h^gA$u>YlJ3NHB|9*Cu)?1bDt01&5{(QBL zuYJD^i0;_Wa1Tx{LN}z^k~iPokGl4A6Ho_T%GpzE<}<7aS86h>s}DzIswP4aP#Bkb zoDJ~>0^K-JISJeBy@>`g;9l(B;6dEU^(W`moL(WB`Gl8~2`Fw{>SGn}5cqTM#CPN@ z56qQq96z>cK8{UDp9sGbw7X??)QrTv$q1_R4$j+5`MFO~{TygLEkEn0H2j@CFCvCi z2_GPtEbBy9H2~_}oDMVaAIBn8W;un*ETk3n61YIql4EZ1i;fvpz{moLYD#|UB~Pnp zh>N6is_w?pevydtwz$mDYa_PDVNq;~HQz%{_fw6_uZ^Qyr`dbH5yLI66L)h`Jp1`z zYsEt)k47^i4Lg)XJ0V{=i`g<_QF1V}n9Rh)cteY}3#=^DUU`-7TWM9Hi<(Z^hVyW6 zJJ(;j0S&yW^k0i=LnZ@*LnugSD+inoRlen(yXW*(f0z}xIYWylWs7SDx3+v_GOcP= z;EWR{X$(TtII$D=YivM62x+~gq$(&HPaj^JM-2FK;o+bkN4?DqDDxE0;Z|rL*evHi zy+BV>-kk0qQ0?6x_idqNEpvYt)H`tNQ#KzAFhw7wq)*zG*tvYWLgOS!7b zZ21Ivg)eIxXI?Cpu0?d#?E)s$LTPO<2CMufgO47o57{)_ix^4_+A^7w-o<{@fijJg zY4hMg^NDxK1A|zJ9wS#4D<%3#ZFqB=gavdFm2jf*Ot45JRx=3n^`a7RUyWu`k{-9T z${2pfTL4F-MCfR)e~+#r7Lq>Zcq_+m6>H_5;*fQhl7i_-IQ}big8~ll)27^=%^uy} zwOmnYa-vi|9jY%uo@)m;sr>7;LG&Xqa*&isoE;C;xy-x$Rs+zxi zGv2e^G;*fOehSfeUn0hg!|?L9MS5+PLDP#$(*rP4P#>j!WJW^WaQUdKmm`DM8Db0f zQdl01`H>sg)z8`8(+ZdnBUpN)e|I$+%7lK&cYX~Jv5Lte51EM*s_vJxn{~bKtWVF| zNTae6cQ?5y>B;obM1vLD22ivc#=>&H{0tp(dtAX`#vguYTPz8e@R*9-Jg-sUa?hLc zjBjfF&B!EWCJT#|QKy>)gl`ZueAl~TDxl#@0xQe6r(hi$J;kB*yM}{Y1MXZ|20WT~ znK;2nFmZ!Yn$P;zV@&@cU92xti`=!zuWVTR>!`P!kyrj94V8Ho?hxjVuJ8tf`p zbbUm4laq~UF<$c}?pRh>5M7IjD@x0d70=72C&7FtqTKzvy#RLW%+^!rfILxER>kSk0`laIFqyOMpjR>e;C6z@$bmz&n6Etx_|k|E>jPh2^BUPPIrmfVx4 z)psvJAeha^G{8?q)+y-%7!4?4WdGHN$c=##EBVGbFi5-#+)2R=1+a0z!#hkS%md#! zP+(;tlW_!Wucg0fk9U~7Lv*q6^FE4Yftb8+HZ6*lE)Y}&@up(zI`-&gD($F#sbwlX zp-@T{S>b>|Ge_mgpsjnu5~4vgqF%t~@jA5nvpFr^iG$JJEG)yKsxKpwMLpUD1E^NL zTrsupwbOPsV-5uVpvnj^O9*iF>ojca*lXnAC{iCJB%AXZERThru`39Numx}q=c#$P zVnXWKOXWgF?Ei$eu>-y!g83L$!#C**yfh2#h=FAQPx*Uu;wrQ#oaMpNek!7JIY5hI4ofe*mjv?1xCudiV!#tmUPbVAH?&<;`~O&%J02jHY3F2D1e@;E5# zowykge7d#kFrH)UFY6Q98{jepZgrciCh5m8ImoP5XnkrYz4K8BtElUPsGBJDzWGtx zzS14&S(86{o3`xdB|&}bVk*?G-GJUv&gZ*~a4bTDXEr0l{?%ln)r@t-WA0wSj}X!$ z1sK>bT&oP9whl~bV9Jk0H!{t|iP*KutN{NxNIf_4gFmO!?zb^lgqC&>)ML07kg`4& zciyVS-*jhstR*MTcN^$GZ)H)98*EJcTbaAER<#v zw>J_hhFokrYxpC@u5%b%vMS;$KQeUexHh7q83N8)^~u>Avd-g^Rgh|e`KB2f?`x!O z?=U9(<)}odM}(#eOP?A1iXy^_pJh+FO;}@)3?B)y{42tcOzvl;K1clH{@HKGU4D1M zrNUvn6RFAa4~?0Ak>;xp1&^i^trR zUi+9EbE}VNef|a|`hh5#JFDXOjNGqR z_ z2oM9Z3<7GYf9alviwVbPo;-`mR5L9Z*fo1NsIFeqLrqBg>hn6Puh6}C+4lk%xKbCE ze+1lozM47-r7QFdzG!lCc(ACKGlC!|&KhnOcf_BgZzmyXf2~0m>e1O%fjdOV3C4Tg> z;a`jrB&=w4b2#)yoxgaiT+{vw>|CO4l4HeY?PS>SCVPwKRwoO^;Govxi}8CQof;zM zry4k6rd7BoVMOz~P{VSw{GKERe@;&uN=z+yYbqK!A_b^(u8<}4tq&qVF`0kl{I{C@ zhEl0oEAH0sHJ!0A1prct+{Tiw5bDq>S&trt>P?KWpC!?cGX2s%xcvItWxLL_^tOK# z-}lHqPJNjmM*mD+BXi~*gJp!%F~aKU;cNr;`asjW(ZqhksdiWa0WTt<>5%nDlV!-q%Bq0$wkr0BpvpSCm^x%ov)Amfzl}d`KxaXCq0*^?j{`-*glt3ck zGkNdN`T7r_CBigw5CX5mtoqfY}-`)x?cdEpp)0=v!s@sLpNwQuWYr;Y>_5SlP zW7c{$WQNm7^Rt<@TAlel^q~#8xZgu1n`eM8_-8CDPYmERof`XP%K%=)lq#R>-#D@b zo@`c ze1k#SRyX+A%PSkLDlZ1HI^)fVdM(Nsoj+LPWO`v$vGen1P}{?*uOc^PlK4RcnSEzV z?a#@{F70)T-(XD0VzIE~^ zGvGz(1e6t=Y`HkrPf#87O@Naq(5E0{{g$oSj8tphym!o4qt$)Wzj)yL#7;R0mzcY~ zP}(eSYB@O9tiCmRTA$i2`wcRP}nT4OR z0C}%@l@mG-9LQef-~tK&RCUpPN`p%F3J%H#XVL&e4I>u{l!5=Q9V*n&Ex!eJ+ph(1 zM2jSSF!2Zen`8pSz3)Koi6IwBJnyBjJzaDYj7d>`{m^{iXZs?>7;L|)s^?EvGB{>| zm0LLEt2vVhvu%8@+PSS&TG|XAfF9H3Nmc&>31-cEMZdfmN7wBn#>SJl`rnLK4imoz zfQ5uv!F*)$=k%}Y8IK1*jz~hZLM(Licp=W-!0e5)BsIdn3rPb-gBdWu$N%X-{hlHM z&V8#kx)*_pcJOMoLBmkXi+^nazX44DLq)+e)s+6EY%q9H2ef3La6&( zR-by3Tg@iU05qCBG|!j*Dc70qI`PBWp$6D+c2T#2kZ^#`pR<$Ce-&6D3>Sh_U`h|M z7^_AG*w#g=;QCQ?YXADt;{5D?nIu!7)aJ3j`cFIVfT0YYjEY%iKRru$n&2zJiNxK3 z_2@vCvW7vCO;ig}RLK4!*8CB)Ji$Q254vEOStBed&7?(KJqV`Isn>M(BtzJu61pta zosAWFs6}&!iEJp^Y_H^ATOXV2JSvL)W5I(C^hfzRrZ$)mka0+wIH1+Ct4~h+vw&ML zKfYW5k0$VHvh{x-S=k(T!wuZJ zv3*pZBZR{TtXWeH*yCl2zC8F3ZnD%I&Sh>@Zd)vF4Rk~5Ps$!;lM2d?g8VFD3C46r z?}*b*+Wtz?lFyk356ra=Iywl5^;*T)>M?!Kdy%_!vlSZka-(&@x0FL9Vhp|&g}46U zH%kh*7>>e?n}9J1O;VCQ9R_GqC6|YJ*A67i|48Q($yLEz0a@-G|Pn;#Ro&D z6o2>zi2tqKx#_~q)}_^&3W3eDl2nL+&t0svyfIM|E` z$h#V<)mp&1LuU`^uA!BwjWy(R6oBeu8|tY43u;1zeRs8(H0M)_- zU2103;oyO+QjY{(THkHWdOqE8CrgHxvVJyH&{w#wqpxm4biKJm?LRejI(Z-8YHDYF zSJT(@-y6FALWf@zr_b)Nv~~i0fQlSkVB_O;ZKeTkmuQo`?S~g|s!e>tyBEZu@jzew zZ!S@WCS}=F=O`d}k0GL9fGzy3ESt>(t$w43^3C+X3~@a?Uq1ioa)j6fV>xmpLjS8i z>rzG?wIHl$_3X(vY9s13KGQcKPP5Sctr5R^5xU4keToMC#Eq1p-6^F7rJDWe)N)P9 zva-bYg`(RjrRfFx13x~JQ0t?V9B`HBhV~P~-|Y!{D((-oHQ~qUAA+(fs!&WLrYdPKG1Sf5?U$u_9%k`OQ}N-sr`B z>#lZyRc!7;&Mq9Jr1{W2$7@OVig7Mv^6dte9-7!VCVYnZNH*`tHW_ zQ*dbc&pa&kFCwW{j>BHlVrA~S!peVc^+6q24=WMh^=~$YlknF!-T3#6Ec$1arNJp( zRt{0qfylGcF=$G_1YS=MD3?nR+I6fX&+dc(l{z>v9vAk1s&}pow5;z!ed^yZAu7I1 z3cuii8 zWEA>s7jTjU;|ht${t?bav&`5wL+Grp-Iq+ zQoCaZaBK_ft7`wRj`)KVc;X2oAm0B^uw;P@Qxk~7wN~r%ri(Rr-q5^ByQX4RI)TcM zb>_|g+y#)wMDNUAvP>izccKuirI{L=u=W?j-7$}tx|oYriL=XZz@Vlcw8hzF6<@^g z#FF@G7Q5I#)Tp_VTnE%CVg@=>*HiNi(5ohQyR{Z+`O3Pz`nB3njsjsKQ~YO}dz!N# z&|}b-L?-|-!4|KA0>Bo!`GN@^=;%2b661G0K*APH#`<^A7?~dUpN#r+Y#lHmGr1@R zz~tX)b;9pz1z@{uqM|Mp0nDVa5^c{mH12{5 z1=}ww7Z6>L2C5-mL#Yp)2zh(ohWL3gx=JD!X|Rw0zV%H!qBh{FU&BBGYVofw@|kf7 zObBOZ37SZqAXHrB0 zJLGTT`_!RM_$ld!*+4Px;Oj}%0eL}KTxC;fAv(8`g0#x3Tu-i|G8g$2fsi6g6ZJMnp<#`QFQ@@ z>7kR&)#WcE^k=_6Un=@Y*1!jDzu(Nd!&-Yf0wk?D!3Z)?o@ERcBR>Mc^Z!q76Xme{ z1q@tp>L`TxP^8|+BJ&YQbmJ%%9~^W~+QYarQ^*UNiuM{rRSKM-ZQ8=rwD30T#MPiK9^0lO2<~g_vJk_xzFuMWWAVnB%anm)WWJh>b;D>RG9qlGyE2iR{PIl9g| zZNIbTL6V|&mr^rP*CHN5j-e16E13H%6vspqA*-E9XQIe4!}_s|=L2iWzN2!S`qp`R z1*#ggjh2N~Fjyek-fEsWEo|Rw_MjS>E08x?7xaE>|A^kmnyF`Q+RnkVUBj!uM(Ud8 zGchN&Mq4c`^Gj=BW)zjR7l660sAqT2fl?H~QVIh+Ep7(~sT6ceCJX~}fbPXQc#!Om z^%5J2o;L4zZ5xReEh*K)V2s7LF3YoStE*0{vxx&))HeOP?#vtkG3A2Y9<9y zy#O`#Uh32p`t}?Zv2$%nlgtx%gk!7lZcRWCvB+&tPKShN+*_G!rhHaPuiNUUIy(k^ zqrK!qp?^@-%t7&@wm~tbos{6m9c#Dyfn8?Y4ePIucu)2Lc{^SNo-a0#KN1hs`xz7T zb1sp&hF&%nSdwOo4l`NQnh6G4W#4R#`r?gbs;tNU79g!EZ}jBqG7BxKM|w^@C}qTz zyIP535o>Fq`z`8j^n0k=jp~zb1t8T5b$G!3`dMuv9rTvT%H2B?iMf)#ztszOh!ld` zOb@6@CWH|{tCaUiZ!ug78iO&-FYr-scVH^iUkRal=!g3(Wl?nOrkaB zg38Td`p9_j8l~%*`fVQ?0{RzVnyx?1pB(vnnG()xr3WrpKWWwo;TLQ%feg%k&iYov zXfgcqa2oEO7gBVR9n&yLIht26X~GCOR`9F7oU%S|CdK<0Vd~MCPU6_f1^*z(JFgMz z#~8SGYg>;*&%M*NiPE~8Pz|A1r~L>`dBtQv^1j-{EuDmVSZhcfp;~q#j;$(i3b{(w zvx@n=+ycmCS9mkq{klFSaRYl-obs)I%pNfD* z>T!(KE=*$fH-muj`z^8#EU?sC1m-nlk*zYrip3S@OvSmkt`^&}qGcD90e zz8e?xZ*cMOkkP3L^GCZ(D`|ojQG*3p@R<^%$}MwM5-Rs}a1aid`x`nj8A%8(#9+*j zWR#E3V{DIZEp@FD+E%4=uUdH}f&|J-4skE!PWKl(ha;W%Pp^~llEvBI_@nEul+Vo} zXliI`T_Yyh4!1$!XqYzuM<>YO_C9$+u@TuOPK7?#x30lT+F0xi0$~o+9=^ovuVF{O z&ql<*u(mN>TagL8LG|SKWOO%9`YOjKssE0J{}%Qbw=hC{gi znc*$Y7YgXESU{!xi0-+y!GB=tIuxd+XH17fy)>I1kNG#E*$Wui+~kWz3)R~>tkNr2 zRF7rHEWMPbgi;7z1w*2PoP!pYzXW$C@S6sFKTjK576t4PH&Uo3l&18R+Ob{Trk8&s zZ&XUJXpt9;k|kdFt>g_QYj7WEFn^Dk~THX@aq3^DsHyVff2x zc^P@YzNJO5`24DwcPGbm0^irXqsiiPr7a;(w7URTGkX7qUin!UL;wfpfZf!Tfs&tK z5;}jc5CJqayWz$EX(0Rq>>%1?EJWjNr)8U9)yO;Xto_+UzA15XjX872b50G`J8{KQ za;m1(=Y}XPq5Zu>#F_hcC$34JA1=uUyO#Iis$Y8~dFk?RLWaJ|3#kib+zHZf@`DfJ zGe=G3_12dH66p2cRjU&orSV2)RxB3U|M{?UA;>-Sq%mT>=YAL8&P`E0*0bx}KQ>>N zmH553#;~ArF_H%ZvU=iZ(jA2)T)rwa;g1_P8M9rrHo8^d>S~!np*dp8Po-7075~O~ zTdGCrV*P{blHyRdU^PRdqa$r0grQ6%IGw@5*k&FmT}D#GvxtB}0=E+0UKE-wa=L6f z^EkM>7TZnfm)FO%>n#b4EMCw0?p`JOprEGp z+t;fda)_gRIJ+6m$h?8}aK~-cH?JDx4;5eN!MIVKMHjZoE$+fkX*p<>4<;uv`BKo1 zz%Ln~yE*xKfRFzZN*71^vVHdsKaL4mwG(>Neuurj%r5pVD~RN;an~1R(3UvYk3vcw zy|LM_8vMUEnDL(r+)D*At{z`^$I%}UY7@=$&DBJ>-nV(9RrGhqnU|eEXaD)`y}RZA zU^+UtMO#Fu_m>Ap8owlcl$9p}-Fd{^86TtlP}NIXWcEys)z| zM&1_yiN3y$<^)KB&otD^*dGCYKLp)@F=~z&o_@@Ucv=v9hxAx1>pS7^(T5+!jn)*{ zL<`6HnVLJTuwu zD-Ngl9#R&WTv7rr;<)#GEghQ>mAb+brq;#RREteUn(2S%rXPOW(1`&Np8V2X^sM`x zsf0^FkO4)i{)?e)HF{g&*5;+6q9+F(0zGQ$u9Qc)z->Fzq#dW*A?+XHrG&C_|C3+2LI@v>mL!HB$T5`fy?Ax{Dn!B2l+5 z2SdhLj5|sU{w{P}B2ANnPWx+bU2)$JH0rZSF%7WqfqM?WC8XEm_B;Yz-z3SqwEjw1A3B&_OMh2Bx8e0Q@PYY z1uCXYmHc9D6<;E@2mc^1mwC1s>n&Ek=L()QFa5$V`JnBw-)rmGm7OR0psnw~`$WjI z^rKwQ8Z1>M%ip;_BsELjjCvN$vwUJ6}4uhy=*i>vSq<(1usRUjE=hTtT5~ z-?-k?9jhWM-ror2graS2=$<@euf|)-1ESc3a>8s?o`{C#)Ub!b=S6&X=l(Z;J@pLy z=29@YcSG33-E)76S3}i+;oFL@hPR91M38Q|)fCatJxff@KM7$GSjX}RW!H0nkqowu zPyr0pKcv{wSfCH!>aaEOU8EJ8oN~A7w(7iVVt3;ir=1#~eoC`IT%C)B{QXQpNi+qj zGij>smQEgn!MG7#tl60*S9)nUSidrFqnPMkl6#vceK>eOw#0xz-7QCtlOBv}c$vU7 zT~C`~a@ti*KVtayvt8&Ta+EYZTXN;XY=7dRtVFg=1mEG0zV@u?5z7|QVCzd57YDGzodYD zyEo21a3_9>qW}5N!b(D?HEBHGRxtS2ckRB@2RyJn3o;|O&}OW?U&);rK9vI|6~^tp zYWDVrS!FZ8_TrSQ2}NaT;U_cHa3E<7(Cxc1U_`KKyCtS}#l~*Z%}KlcS}9Uju^*~3 z(@qU7;TAP-=O8Q1EHTo{uStZ|Rnlop!xl$xyYSM}G}7f2TzoB_Ck{ZTjH^&^bc%T= zpaTM-gjN>qgXI%b(T-Wd@*owjz~cPYqM@%@;K#h#p?p9u}tNLU}0C;)~||EuUp zgcnXuP>zJos7FPGbl`2YkW4Im2LV?j=Y*8O13V6{<(5v36i9wQ)t*5;0eK#-!uM5cMuSFii4LJnB(uH_%(Z z@sp%*J10UKn_YK{ocs7Q#G^#`@_lLtH>+a>scic{D*QWW!$i5pnOh1Bf_7S4fBrPgSM`x>HYDi-YCc#=XK*cV*m`gu0iO*f#n z6fAQ&_@7F3YkQaj$?2Qow1lTC23sc9AsxWX-rW+(Sq<$-OwJRy{Q@#6J3{45mt8X0_zPs?S z?#R^*`tWlYZqS5&tfs{KDDVSGn7-#2j(YmyR>v%{KL)+12beLOd}pGjFKRWRL|4x1 zMXx{_#M_>BdfMMaLrY&I71dE~qqs>uMhB$W|Cf9F|4gyj*vj@`_?0SxWkHgTWxm%H zT0QGSX_Zv@*ZPPrOL{3HOeK1Vg;}ZjbVV0AW5=J7ezQw8A(P2Ep9vNmn5qxCkBhKU zi!|xg?oL-;IWbvXDumhAi8)_ImxiyfGU{1NW;E({I;5)A&+Cp6%Q0KaR%+5a6piU} z8qbY;7u;%#T-4U{*)bK`T7`8e>b>fiQ8cuH;pvL#_cdG=m%GLDn2sx35tJLcZ*ML9 z6I~c+Ck!6{(vcCzV39^Zz{>r^qFbGfW3Q?u6lr7Kue7PE0*sh4an}^Q?I6wwg}?XP z;9j1^o4}g;UTFP=+^)kONRezbyrqDQSFg)I}+3QypGNdod!mSxdGD4kq(m6Q+AH2 zp46cFl$(ue!adFQ5FuX~6GHUOd3h;0QXQyr3Dx6_*0jF@iR}N9HeoV++1zX}y<9J9 z{CHaCm<+F_6UwaF^sZ?ue$!V*-&}GQdsXbtWOfWv`@$K) z+NLh9UtfyVoA3Lsv_C((H~pFH^@fa7^VU3 z^_>5TPMx^oLEu^n*9*@c9De(G>^iGjTKM+5#rxw)nYgduy6%T%T)yKL>Lo^<-3&6{ zocweV6L+JY9woBd+`<3!zP06A)05|G7GNncN`P8QdZD7r1fdAPp|3%4-FU&kKUn%h z&?i1<_o?VxP8!k#rggFLIHxhZD>${i%gVGymUj7O#!H|pk`$0$F{a3Q4Vrmf#&+0w zDdJ>X(cgFJ!IT^N4nLiUM>Dm06LdZtUl}}O0v{%;h_1N#!yWnf=Y*hO%$RmcCrIQL zkbqG>1emK&>^n59e^eZV5LY zEH9sqe#O`+wJAl@p{7cK-a z1B3WZ1g5Y*_gmT@D+lMM6f!25K_2mAtm-`XW|8=w<@fp&7UYej%n#!qtJ#lWfqRGW zZ;w!L;*kRV_c1`rg_N3bN@NdEp8T0$W*X4HI45ERC>)}JaumRjx(O0M0ejId4CLu- z<^US{aZk8B%bbrU$!Q67tM3O5e&N{F;m+QnZZ1o+1@f z9e6zD#M_C{3lTiadw>zR?Q*$4{1|0m6JeUZnQ#pC*_cD=TJuie&xFUc&i6!FG>yU3;HFHK7}#Csh>~35@$`zmN^(NlEYrf+ z26v&1EB9@0gqx71viM)l^)53hCwpsD&bw|-dHYi-Nv|rt+^w$NJ~Aw_f9-IRu@>Ow z7I9X`)=gygNBf$ZS$?0Bpk(ot;7ep$fcLlI&d`jy-i!pZ>T|JFbK>G^n|JJ*0jIr( z<I5!EAl$|$P@NkYYV;|`jdz6^8^lkjX*a|J})4NrT!D?cmL4|=Ad#j&AN}Xcz6~&p1 z#>#VUYIv-CaDTOKXVxCH<3FX&LBBY~)`dPg9~E3UktT0N2Hr1521|U@UIh+8n5V@e zAlG-L#}}pQDNm4pjJH*ArMZ!8uxRR6My6+6pxNlsStly8FDN!z!QF{M(g|0%m11|J zmNd(!LJTX9z9ObXgHPGDj0LEw!3sGZ{GoFSfgVe9l9}}q8u?MKn8$D(d4}tPehmXU zh1XB`>E-WNcUrVegFe;3x z+SD1l%M1M!IFzxG=ff8}zKb9YO+qP*WzdX}lu_c25!9qt4PE93MpO8?ocB_I8;X=; z*+hMXJ*n6=(=Nt72_S=o+fG|;M0FnPukxhn^!}s=m-&s^^$#AJJ1*-8;UqNCNIFrK z38CISe_h-pSgohh_{M$emg>kE3;7zG+0(JIC`T5$<)bHV&X9J7{5uaC_y6DC7nl#7 zc+&^J_%+bF{#FdFKRw;b8joX?m3qEP!}9a)>_qmd}w^z{Hns(fE@)w1iGX5CBE|Tz*@XmRMkVuG+ zTIGd47R+p);dGV8gb&NWTYu&WF2e=7<@fZCY44!Ts;&6JjX*VnrWWL!)lFSa*YS5* z4THl|P=m3h92;JNaMZyngYQs}E?gxuB`4hf!`Oeu!x?tn1E?8Y^xj28i4r1FqlE;~ z+l!j5>cafGlS7PgCNnP3_+BL-lO+(d){-tJZ6Rr0J2;ZQw+5B&m4a?&&5WmFudDnx@pO!)*{(mk?qDzncXA)y%cZBGCotNy zdBP6cpp6LhFs)JANF_Qh2v7mmF3aJ;LP2jgOr0G0S1NH(O(7``yf~mBEyH zcIKnr5`O*VuTdHEA||mNS%c5I3InE4d<};n^^KSE86IJhctYp6q3Mf7XRK^+d3uf)A}^||VChzUC5Z{EkB zTP;#61DR+)AjCiug#RRiVLbO=J|(8cvg!vE>`NOc;kmH0RDm=rB;W;phs9S7_0>B; zPL?N6@S*(LNCBmt9*?z4e})z=`Kzzv#USXE*T_QYOAXCEL};a*uSfo86FOG{_>h+S0GX_zBgRZXn*$#^DL1+fXD@ynl2ZF}_lYT^ZRzvux4>gXxWe$jAKf5ELuQPQO;D z+UASBuU{+Y;CcW4lv(pfHW3FsV%`$qZe0{=_fNI9tQ2c4Ijg14GmyR#J?1G0giiWS z2|_cj-bajsf7+{?3EW1EGdg^H{uZol21+=g>DHFUP!y)m;&){&Q=cTd5bIP;9xNM8 ztcN%f5+4Ron?sbLKlY6ufonfqSD3ee$}1rwAzztPq1ecp-E+h5B$^Ae4Xl|FiX^uv zCXrKr$*;+ums0i&zA?@_Ic^eKDA@kOHNN~UdES=<4oO!RNDKPz^QFw%e<4Qx)0nH` zm#a(3+CjMnGWc(~L{7Apb4CC;O}Z8pPTMd#_X}b?6~|agbxlM%GbC}n5@yr06Hm0B zmY^SO7?hQkQJj~SOxxM!U??=M8f!TBxX?TQ^0AniHM$V}MBwH-E?K3#?6#<&;yL|!wV#VI$Vc!i14a|3RyYg<0Xd${4 zTs|#tH3zHK=lPSX{|-_>v8vFmjXnTYAO$7FMt6&Aol8%C07Qd)iP zk-Y`yDzz|BV@*ANbc_H61G7V0@q=L-Mag4vTsOxZFJjM|tJE);Es)g_G!u6CY4oT) zf7V4$!LdFH@g9HOCghKz@hu9X*UjXwi6l2ra#yK4^(gN|AFJ+??G9I_^ek_u0eRT( zXMGjk+a&^X|03Og|Cv1WEUfOXWg*V9SrnEYZMt1GWEVEno#XnuNWkPYs&#nrod44| zd6*fyGPd!|chmgnk!ehN$%bpD?9-tBWe#`1g@{PpF!Fu~ayi9u`CI4+OlM7J6n0ot z({3noJUwdqfha+v#>Sp!ocJ1~I<&42#e8RIb`L`Za*P~HGnP^Ya>*pjs^m8Pb@oXAZCl3F_C%^riGgo{RhIH)rs^~`QYvs82tUOQOhwwc`0(7EIp&Ik1YX+aFmgwM9>6iKS6?7+!4FCi zfzk!m=7h@@ip(J#<+(mrVF#bbY=!7Z(!}(F?2&vI4~HbwjS??^yhf2_6IG5s7s38? zwLQw3S%66!PSd_h>gbY(8aA5aIeKw&FSELyS{Xw{)%xf(zS9_Dwou%~lNTJcrsT@o z#SIR|XRyXI3D>XQX$lkGyYX3@#Asduw3%bP+J}W5o`T;mU)Rl9pT{%hjV~y!$-|^l zInk~Y>z2o54kzTaJ_Xolyx)g$&TiJ(%?{!Mz>h6%jYm^UnV*$hpHr3GGD+QY3N$t)y z)KL+;-kIMyHD5i0`UI=>@*7S5rz)_kwjb@;{z2yp#J`hr=@ER1;$P{anXO&dX|Q2c zHqFDt!X_i^r`HW@LkpEmlA}Do7+#red%51DCwvOhzukLNkCpRR3qXBlH{n5VJx%6z z%R%5l%~GE5ag#lABc$Krf%~2b>K*)LK4HxGP}ycVvTH<|my;vQ%{&T;H4Ndr{h@#V z@mpkCxMYp>{c$zVk;@5O9r9bSF_h{rXREr@uYYT^yPL46<>>2}Z|NZwi#_iIuJ(B? zex}a6rydRe5~p@2sLgRL#~BYQpMD0ndhf+o!xEPitrblQqpND-+4(-#V98I$H21Eb zbAmcer>jtuYMizBG!@~ySiP|O#T|H{Z26sgMWP!a&%VoQ3~7g~)-ZQ6uQ+S@mhxMt zM<0%UdOKLO^^IldGDfP^Y=an0@FgvH^p50I%F>vxW@B-}*Vd$Rxd}kH3dquYFu_ca{;`n!LLl|2qb!^V3fd!{wlmQ>o9u4ZF2}ISm2{T zGZ5XZjaWa19}bzt|Da5W#M?+RS@dliAX0c8({f!fG#(8`voXMz8k{ErV;0&Q7y5Dp z7CF(R4Iw|bzn?Z
Ke`{l4`?s&p)InC-DkfLbH)kJdKe=uKr%+!gJgIQdKz-o*u zqq|F#cI2|1uu2z8I=A*$bNn2^IIg-Nu`?70gq5*AR+A1Bmud1=hV3#{*kDd{^j^)g z&-i_Dy{eM&b8d(8&0Oy>mBW#(4W#us#$-uM0WW_x{}H@Y+fc@Hss0kzFAZ?4Jk$Ye z*i8i}e#JRHdj$eIl1xC}(KnN|)r2tjkfhtbY&lBS-6S*O9^hr+DMrcfNY~WFq?n>^ z52Y2ix<@vzMyeIa(0vWm$<1?28+HF$O)ghSdBn7Fk^8j`0(k0lJidg4`k*oFYDMMDs%EHbUactr^8I1;V5)*zt2@ zMw2!ecbL?^GB!-A6cfVST~SCs&%L!IXoMO4asKjfBm3&dq+jBe|HIIYlO$#n9lhAjHd{rZD|zzXNbg7JT&eu;CAeU!MN3&DZ_DPwISgV!ke0bK3veU&L? zfVtI*MQSP2J2jFCG!}~qfHw9nz4x}?M1H(}LdLGpX={|YZsSX;273syd-~7G^ zrB5#~dU&Ewh)(mp=o!1e_(@_OQhzJC!$OR!Y>ZO9UtTGhQM7^hRMEnI?61dl|E$!V zstLQ0t^K6VmPNmiGG$_vQRO;=YlgS#_+CTYSS>k?7S^xf`?rdA}jFCG%JA*HoUrle; zgV3Fh)EM_-0(4YPV}*`4Kge5F377JeSQ$4F~5^ zAUjLP=hlC2fnnZNpZ5-)e;Ag$)<^Na2wdc^#fqsW6Fb_yo9?164%$Efmj|ao z<=oyY)loh?Zmc;>2K z-i#k_SnOzXl|~^-KUKEYR=Z`0{jiHgo8h^-tGvCg6gB=v3lm>@N}j9YizS*&(IqZ9 zWZugU;26_lD%pV7K|?s4p04ycgnX1gVYusX{J?ubWG*gOaa(zTD;UwOhi&wDCY}1( zj4J}&TDN`)go>9KC zpzbIzzjk0Vpwx9_Rq>*`BoK*gSSxMZ-p41gT44>5tr}kY+cvK?*tLFq%tvj>$jp<* zFB4L({A5~acLS+KSp^QV*cDLJ zR%H(n8(eA*wjNPc3VYLc0=HR3!A9jC<286t)EBCudN8arFYkc%`Ub7S*mj)X9O0oY zXO7|-rSmUbXHR}@Si+5`x(t6srQhoJEC}gNT5}~)8idWOgM`#&h%%hLAU zTL&dU8#phn&>73M_Q2oeye9!{#|idRp23p;K4(aK>2NEYH&w>nuRc-1Lv;~3{oMt_ z*zRRN@(>5Y>n2`U=9>crLlNfMyv+z;pT zf4u=+)`u|FQWqobz&MMo_OpRiVfK$39jA&+i>U=f>Qp`sd++d|A1H>uFA!oR4U}HY z+5y=#Wv6AapYz7X2QSlM_0|ZD=H(jo|V;3!mXs) zI7@!|1LtY7n#YK^K`9yfdjsc6^9(KTQlet!I)1;)mXY}Xjo0Bf`1BwGpsPMiSm*Fn z@qCe+=4qQUL8a&5;g~4ZdtU22Kkz(+4>LVR z1{=Fc~Ng%s-GshT+`s2LZ~N45@Wos_UPF<=^)OQKjXU$W=W|T+wyN6f_usjEqOD6X^_S z$PwvW@;fN1QdR7y;ugfJSx#lrGA>!k!Ur0q92_HR zba{TyJ`H0O2lVad7Sm3&YwT?^U$ z4;{kxZ}sR;9y*E-26EFe%p|IW|I>42(P%SJ`%l1x{==-#{%62gu_e*$?sCtuvN_YV zo9W)Kah(Kl5^@HR7ZL&`>rRYL-Jnuc1(e>EC1+FDj^U?%Zwq zS+*dA?@vmqe?o#aqDxFpk6J8iL{cxeF+S{b_n#Z<1=W`cAK8?X^BY)DHaFF#bHDu{ z$fmZZh37)w6^GRWDDG{f4@>e*)6lGnY8DW}L#^#i-k0Lg<&ffNAoO@GXH~*%P00TI zcZ!sZ!}I zm1#y?Z^5FMdEq$j)Re{&aCC@8(A#+_O0AxHN+M|r$*v@EF4LAQE)fV`!* zvL^eY+*c{TrKXG`qqmu0ly_Oj>txfsFXw*SWWA|D<;X?+qM`-F=lwjX=PdW`5{3>0 zldNc$%iNo>>_4V=%uI_qq;@t^IYGYX@LjT#y9?!=m58I;`%M+4N zd#Z|%q@VV}rW^CM6_%?r|_uI*2KW+cZ@w(!TlYNfJPMe$K=SBAECwE6n9Aqpf?YW`;U6xpysLjZiJkk0 zKDfjJQkGLjjB4Ul6KL==gQUK4Aq^U*uScVxAOaP%+hj58C@4yeTfgaZa_a~O~Hz0Ps7AU8UL-Gp1))ZI8TCZFZnMkft z_b;A5(S{5iK*v8;{X2aRax^ja%Ts_AZWNDBO`Z1a8%wMsuTmC7|2(q?cvb(qovL(& zNgLNu1&#s!Scv1tM>=rGe*yHqlykNxWeh2D6-ts!W)`0IO9M zjn8!D=@qP7`&^i4l2<9u>ZU=)vX~Q%S-EMruBjuV(q5+1`bx|yBZpTkHfI1)I2##N5(pQ~lIL^~_uZhQPSO;b<$PatZ6tVc-{ z(g3_>8#o4Pi>T^1z!!0|CQ5xRFzmwsB)m$K9sKB!r(!MgX!lFmxaZg+aq;@;+qF{U zps&K319ovt*Fa((O{9naC+%Az3o`S}a0^na6HfQA(<(msYTGwl!FUVO>dZA()&-*C zY3Kq?K3WkraUpAn zsPI^ipEWz&v$9io4oJdy!Q1cwaN+VUU&e~0x?-Wi+Yecykv!a=j#n?*v24C{fPotl zO{^oAP*sX)kBKZCKDD{MQ=c7Us&ie>KDp;2Lb#WFD3jSa;Nebzhl87S&pF#a1FDF6 z=w__!Zv3C^{0XAQTQZAH-e0&@hwbf%w&GaHyX92AF*K1h{_vP^IZjiIT;fB-e!oK_ z7gVfVMr&TKzV%mhfNRh+i> z{X6gz;9FDB=8L94{Hab3%EpY9f>8h9knHhlUO9KUP=`BbOjZsxff7AChXlh{5oxFG zGILY}|2D2->CI~f_n*#w;Zj#O`^Ud~iIGK_SnR6dwo-No=>Ry96L``MERhvN3W`pkKpqB9`}v_h2*M8o{fE}tHCLe7 zX6?RBUrqgcy{U+fvYrt4ZDGy9H8v3#cFySx(hC_DfobZ@m#ottC_q96Q;TuDb&Gio zz&*?Mc0}ToQIDTCGPH;Z>TEQfi^0CEECg?E?or+Ve6(sJ?>lfsJ^=8(jhdLHvH70Eh|r`g96#5-L6{{^>G~~dDL9Q;gWny%As#70)?JY`-F|mJvjCl^#QpC% zBbGHF*8cSgun=|$o~+10y_JN!B>=B)jK3x@A>@+u={h1c^MpN1?Esv_Lh;c!W~>LYH$_ks z-lB_ILe-pCRgyQgRInT|w`p5- zi^H{D!UU#b&cLO7E$`h5f}@J?T)=adBRlK=zh?npfiXEv7O4h8>nA?mj3k9qH06(2 zrvvh*gboGUpUPZfSW8UqpZ4dSrVDc%*DCP_i(U29MZb2PQ(F++w_=aX+U|}uS3AJw zIgi24I+->R6^h|TU~NZQ%$mh~GM!M5BzJMD?d)dS#JbZm1I_Bdn)YfS=kVo^URG!F z*}1jqt7q``)b55~bq&NWL(!x!NneC8D9O|q%o`U_l;gE!TBoZm>?c^ zI!PC8pR`mjN$^*Ht0*JYPkF`@J;?y4c($Toh>&#rN%@sRbW%7_sXXNU?Mwa$};cX}ajv>anWi@mS5zNA`mM$FU4RqF z^SS-zxCJjYW4rgx<7URJ3$gdjMQkzXQTbk2#!>3Z+~@p7bDY^Ml|{A0N) znUCHNbW%rX3fu>~a+*0$dp>;;;mVxv$R6qA5qF0@F1>{*^d;3^iA?%;Uct26NgXIT zdW6h~%q;I!kx>OiQTec;dJaeVz82#QGR&DPJAw%RqC#M#-J8CElT9A)u|{)pDi;oph*W7VKbrnJghJbk4&3myzu}{oJMQ;TiGHCfjy4B*&*-Aa8@>_Jd6m&jrPDAgT z{nvYAt^H@QGGuVKm_S?|1J=2P!j7l{*vR50F^2gLEZW%heU*lAs8R#YHoV21pFPhH zsnI*_xjlc|0}8G}TfY8Udg^5sMFWM6pLcXoEoSoLJ#nn&oi{Jn2&Z8~_q~T*pJ(J)@?X5L+5Ds^V`Cd#y4Z;4 zg0fW^4VX8YdPyICLAyO2gpb)Xoa*K(l!?OIh)Vz9*}I>iZ?G-VAunWxoMZlfJNa-p zwzmZ_q8H;f6r-}B>zK1TWGuk~5gvPuY*&7vjMwtaD(+t zqJ4XaiyMA63^Nlun!Xc^X=KlMn4TgpPPb(c zODtW$$z@=!da3{LmCYa@ex=U#*Y|9Jo-JDTn?k?lhE`sq)wJeH_EoktjVU{$0Zrkp zlQk1SROzjv;_ltx&zFV{gUk7=nOg0 z+h~yVao_&#d2cDOxj4Q2+gLrRC0bBYP6~;S^8w>@ z)$HcimKgl~AS@%KI*KxP=_1n_#O&=^_y$C}InE3JI0x3>7ucQ0l;6_tp!W74@583x z-ue5v$>^k6yl%E5#<72meX2ZOwZ?Hy+hV3x{T$0gZ13bhz4L(shWSlrV6||;3ebR} zw4XbgcrFJL$uzcxz|X9BQRg`z>x@X$mrir!TTFcEJ={D$;HlkaeYv^k0r!Zam{oQ< z8vTi#-$A$rR=F1x{bAh>G41}?61mJ0B1M83ybY5F=s7cHRs$QD7uMRm$l03YSr)5b zG{1sG)C|yI70O4e60=_|G(aYb?~K!nI$G}j4j30)XgwR2C-iHr37<9=!1jJsoaLfi z8wVd#H79UGR>xl)8!^G%{G3;1AFqwiEHh`{l7}TS`K&p^9f~xtrW$aCs;ZVmb*FIR ziJ5q*qH^2Uww+0T+MPWTery6qn_UP{S{G;9SauNlr(VMpGZ=;8K85D@v`y~YI}riBjupg&hHGN z{XAbM4Ma`A^;b;QK-=(P)(&>yvMKn${IFs5=Z}!jkC$PDg?y%Q2Ui+<3!s( zeyYsX>xi1#opuWXq%m!AtLo19=vo&NTk_9R-WAGSSoW|PLM(>fJ&7JmO`d0nz(CZNR$auMqA3al11({XVRlApaF zM04Cym$c(9h(%idF={&+YnPt-{Y6~yKT;gfi1#^w4a5;Ncjbcu5ua(#=@7P zs~8i_HC6Z%A8jlu+-`B6?>umH?L{0qyWGBww*eBdII)BAd3|QD|B~}2%fj@1Zo=0! z1=HrQ@ou4KB}dL8a`)5}`(Ip!Dh%>|Ys`rL>YC;aJ&6SG*?5|Y z=V#Bga#j{h*b{Dh@*m4;uRT?-P1avz3ViQ=786uRn`yt@N8Q%vA6bd#^pbw3&7Z2! zpdJsk-e=r?72uKfb9yzbvyWU~?n$E2AslksUu@@B6>0FeWyM!TJG0h&+=br11@?$$ z@;vP?3Sl}ex0vL5k{^*SvA^~boY{xi?u$vjwE5yN{M~vTj9#A@-uBV?PN+&-C`dIf zlI4{(8-9`JSQ+?ye)=k%nS048v@X5b@&4(p$tPl0=WTiC9Ocn+R%e;mSPxe~0jQ#Xk&;ORbz3M+>L!Nb^ z&}x#Vi|r+LEF(Bce;&MRO#$D!3;=DJeH;#pyl}f zCrd+!*}#8Jm+a%S;l{H`_N|h%3r2aVh>_X~8P;#xr!PVG`ORBCTB5J7Y6z%A?o*7V zRr`r&Zf6yCQs_FE2!xbQKBtNh;{~CuX-9J1|D*eovw7b%Fqwomz8yf`xtsggv888* z60LBxhN1j~R4I?8x2`ZCp@H6B{DUEsf7MCUr#w06c`F1MdiHFh!ndqvsKcI@>wC9G zyYAx;3Oj5)nxeEI$v?L7pNvb)EWj@U4XA?W4i`UtG}>zKb$dL?9q*bv`FZ#Ne|s_D z{`{=-fnkeB4VSC#U{lwF?v`xik_ZUbX8O<-^Hb%ULb9DsH;e8bXT0bmgD`NaFhl$%!0SD3#QjtLMZniS9S4*CSnDM3FF3LD^U}3-1D!v>ITBtbv-` z$pq|*e`qJz0ii%!`)<(-!0uf0V$uY9k8IKulo0oCA-dDBHw32Xd8#ijcABCCJJxxu zFnzBaq&L79}yCwf+9iROEVaLI-kA=p++WM9OmAt2!sK_*A5|HS3gcUd*8!jg9v z>{9^oUySsHz7#;sXf2~+Wp1ch`i~CT1$8j=aHl!q{rc*D{mZV&Bx&xwe$1fa-$B|m zx=;z8yFByg@kkt3=tPebxBZ6y^)o6c_?f>DPcgRr{GqQdlvj6r@iL9neEc>0I$;C- z@)n+Kh6f&wp^kdpYtH!aU;010Lwci(K(~;M)>W3&UJQ2T4%nXUFeG?9>QkHP?+erP z6R`#42N%e3A;I8rjBa~-rY4V~f4!<+P_f|e5c`_r)ydew^>h3vxW1?Y?&$KReO1gH z)8XZwQOinch?0v}m`1}bCY^gL;-62{u*f@0Vt}yQ%_)9UZ{7Qy1qcxGcDfB7fvDG2pE_Zw&qM#Fh-#Si1pOOZR zw~-qxn#qzL^?K@ybKF{#YW5XgdN=yQV%^qWj`|f4(vC z@aWM|@HTi}T72@C{jLm$Qzv!%^&Rz=H0ua{x?DkB$U_Sp58?5#b{Br1#><`v16LXA z;}Ewm)a`}A+E)UInjc|=PZ88N!dtH1OH&a+#Q4TI;*jWSIxK&`SsGFqXHSTaE07x3 z|1tZE&Fen)$58b%6T+SOM<4eWKE1n7F4#0OOPBm>TyOsPz|0djs!$0hgq;F@swmaZ z+(3OC0jeZQ;^=?K`PB?!?@EAmLG)LTd!q@5A6zKAvp20UYpBJvS_Mh75Yr}=VTS|b z$(4Un6+S8tX2_|~D)^628Jo`xGie1)2w>BrLcXLedWIHP0iJ?9tL?I*JMG97#)F@q z*wAHiQ675_OLp5dwr|;RBAoH*aB!RX~Fl=`)Xg{NvF0WeR-uYAa86^F8S$Dy= z0Nc5XRcO^O>x_9p1$6gP1{tA!=d z|H|4#oqKX?|CCa=|9F0shNWq%FWpu;4j6%Qa(zPpWk)B7MWz<8X0VzaksZ6{k-|J4 z^Wx`u>ena3cdm?_roPBU9WPy#N>Xw(3DMNqXT|K5Z$`VlA+JDLUh%*~&e*f9_G+4( z`RpZ)=7-R153Wd+y{>Scf}+qpcuh{C-OVByBLpDTwnoPHL{fNcdadt~Frr51MgHx< zn=D@;N?Q7ly!^2zFY;Wnz^kpefQlnNMtjJn@0fO^kFrp!fA$tfoLL0j_BDIfMRP4H z9C9vKqPPKak<2O(DP(flpl6t=8;Ly3AAEkYGw(wWJrT40z{Y}>$}O1sdh5h9L?$lF zK__`+WE9A?%IDNqb_SP;z-rlG5@+0xptn11TXBw z8IF3s-N~}fX!BtVApBR=^QU@(3cDQazL;H$$(GNO?}=9EnotY%WZ^~wmZDb9BDpd= z7x9cwkQ8_gF-qkK&}w@}QUTz5dZP(`GOF8dCB)!LwZCZq{%$SPwaNdlBxe_xt7K@P z6j15K1@$Mzoapr}-Rpjncl<5ndNsanZkxp8G^sE@N@QZ{526Pn@5ml#al|Re{^P(> zd*KRoKtG-neu)@Q51rxcOfA5dUewAzl|dfW#_jPJr* z?)N_Yw7`nOiU(pcj|e=L0oxZ;W?U;4QciYzc-^EYEm0YW@_i zpbt|B6c6s(>8j20kaYR+6HG`eE}PdmS&(wDDcmgU!aFl)7e%D=;K<7No~WL}g;tX5g@rSNJw2yy<&2x>sFI1SRp^l3-^3T*sZ@zDNxf%T#h2!NCiU-p z*ELu+QT9l>FuIP`C>E83fGvw|! zt!=flLR?fGFay8nUasE?@}`1r6E7SCFZ2>-I!cg-@$mQ)1X*;*!-o7n;{&*u-8)kA z|CmOGN>60yFoC`E$jNsfdJeF^iw-*HcD6tsKe`JG-@4(Z|6q&sK6>9dGe2W|{}I`V zk7_Xv37*dZUeQJXbL06)!FLBSPNeGejh+A_sVw(mD*wiAm)~z;Tk(?sJ&`fSuGTb& zdO-XGQwQGgy5Ig>_ixA666)1DuhLbmzrXSwBIEB#JV&+W1HUelLWKqc(tgJJ_|Mys z(wH0G`9TA0Grj^A>~U6nfEN50Ycw^X7NJiH9KTXlZppLZ!^c#;a9*mc*ZGG-wtX|2 z18H6{x!`vLfjONIZh4;Bj_wZDq4X9sB1OYF(Y-=SmnAL6kVR)TktIvqpVZuscD6WewH#o6f_-{noh4@W%)!@R!ao zlOzFZ6qx{)?5ZTMF2XuObN(P{;S2ub#ijjd>jAY8y^70Yn1x0E;Nu-k2@E=d-&uBz z2r4gZ&-mC*3?vkeN;WMSoIi%hr5n(Q}g)yjw0)+0~b7N1rgzac$N$~O8CXL`dw@!^&DJcacW@# zq8}uNDv)oQo12J2hh#ITd{+31h1@|&|JvRN6b;Gg&M!;VKZ^m(v_hhtHwRyT(^~KI zZcN1E;m+0=lBR&pdneC_Hu7d}dy@C#%d_ypYy>64W_YIsQFL9pC3nI{!;6_PgK|++a7LZ=r{qy5VZ1Pys@Ukth-HT76JTH3c#vQCjHTijB$gkPd`z85K zM%Cec6OtLOe+wlBj!DXb?7bPVfxWx6_2@+gM381D(V#r@WEc@9BWz!lIi#A4>L8_q zi88_EXibDL^fANa?vsH^SZ@VAMs_#wC%xRol^~!j9%OuK0IpXnF#s6>{lw!8NXmJ9 zzDr7Am{85fs=}LuD75!5DHWi8NS0!W=4|!d@pbv0wtByNVDYGH$+pqvcXZ4Az4zQ6 z5h*mS>rc%nzebGA&JI@^pNmvX8h)SdW zHNH!4F*{@54(LO8$xe~&JU`zV2kWx`V`hJIi?vYM7n?T2D7~uN0crKAKlFz0DTdp` zrB+DETUZeQ>sh8fRXEfSn=prYur=JPfz^oJxv&*iIC0Ey<3~y8V`Q-GFlBC7RwGQX;tnNfbpuN~p*0A|#Mr(IH}hjF4<38)JCW zVoR)5%%P7!sCY9-vlln!IPR-*dPdjyQ3%s_w!Ta8x#hjP5iK_Gz$PT3{BTcc;%j(Y z7GWB&6{XBIUU?PR7)o&QQr^nd&dDN?NXIc0Brh4T=}Gf(jBIj`XLrI4-6z*n_zha` zc)I29xa>TO9H}zGm*J{3wD1r4qg?$xtik$WIVG&=H3A=@+%P01N&Cq4A*$JvtD zwAt8eeb38ZGg;%GzU_4BV!Z}=u7i|HEnbY;kjs~RrIR(xvN!g=#+7u}AD#&RkY#oZ z^^}96h2Zn-9T0%F;o$-W1R#JL97_qLTunFGe>eI(4R55M|Id|VcY>J@HRSgLD~{Gb zz6kP0i41p^XQTot% z{gS5Bd%K2YGKQT=jkI$GMmttzUuoxq=@D z=A2JzrH0?^yLmIV_({8g?-!5+1UHz5=lk%n4nD})fa@L5mUkr{G z!Y}Ra|JM7bmN|6GOu&mj=MJ}aCxlBLU`0XZigt!B#eG2#VBUcUK9vBb9^{NQ7hr;( z8l*imv(ww;hLE0vyAS zS$7X?8WH*#^+J1)L3(MAzCJ_;Ulmy_M22bXdwKm$i`>@=hcPiGMt5FiuiTTD36n|3 zCRi4Xk6KDmOU^21pOWovu#9Vxa+9i`HxKM~Sb-HeyMvr(t)#g6H+Epj)Mf=qd8Clz z+u0YQhy1(l3iQlkU%TY4Ws7JrNG34j%a|I1a(o4FTCDh#XbU~;dHpX(GI?lERr*}~ zn-v!OoKUL%KtA~I=#c6~Kkb0$Ly8&M5*gMd4XR7_P0QAcDUJVG&QE)ZkbRdWY50)D zx`0J`QNo*gn(W$c-ay?m5^;7R3UrH z*fMGu!E|4ignxUEbwhED%5UL)W8lY&zd_IX zKrSJLnfV0TJYztOGLRZcB*dtiE_^=%ZrfI#Y3%If0sZWx!d?YR`y7j0UNk&Tzt|U# zcwe6T{~_$J|Dt@OwqcYmNdf7WZs{1hBm{*S8irQ7yCqbllu%ll8CvNYK)O-7rMnrL z_u~6J@BU@q_ul`(e6Bgqb*>}UvGAh_-o7`!UQ}_BPG52$yr0CGX*|*k|0T99F&%GK z+O|~#g<$*3m5Z#2hRpz?_qyh^8j7eTs1v0QrM0NX;+`lu)Jw%UD$nM-I^78ChoH34 z3tfddmRRZZpx|s@{`;%IA8sS+m78kI17TduaZP9sGCx4w1+V^nrlKoqEs=zRd_@#5 z-%Mqzyos-HxR~7cMmul_i~ZFVIGgWpAIxa6Ma!Ze)(6&ps=!xb7Blrr3&I~aktQJY zzVeJNZ+0D1zPcWRZwep+*GuDl=^q!9m=9*`T7WrI8m^Ev$9Hye{k@QAKq7U;~uY@ z6)vakBbV3A0hN=wnk9SyW=r`Gvu*!xn62pzBBC@<{GX1?$Z7F~)zGU_1Ry6V)!BAU zUta0>s*CQyC^(q9>KYF@XW7u0qQ4ZDK*_b$#L9SYg40j@#O#?fLE zqIlwf0gyyVID$1ReSgi2Lwb+{SzV?sWyec(PkS4l_71dAR}$`wJte{qAj4ITh&b1p zK;4CQj5#WdH(nSlL}%sgZ}DCuS4%zIc=N_&K)4VolQ)KiIqNQ)q@Pl${JsZ;-v2cU zo8RFCEI~)Q6YoGN^aW?urZ>VZ;F(nQjd`&UHH3dgA_eg9`M11|D6my~msiw3vj1mm z=9a-~*nY$ynJnWWcB!*0_?zR}!M#v}$bq5v6Xdul9Ar>~MgbLVfVwx}c#!Y8c>HWd*K&8e?2^-~4t3->w_Q#+rZ5Eo#45IDfwG#gVYEtMH5R zNSsaPT4M3uR$_kMWuiyyVIlBCZYNs0D;QKsiZF`)G-(U;xsZqMIKI%DDm?WYfOi9W zNXzZnDJpUV9z!R3fbT#b#myyh&#z=l*Au)?TCI3sHYG^A@8mU-pO96$bRpJ{j@X;b zX_5DH5eqDlajrW|D|+{G_&7ucmKtErdWy@4pJA z`8lzPq4BCZ1=JP^nLHf9B8GKRW1v7ydrS{qj*zBU637zPn6YBLavPBXg4)Vxe zL+&%b8h=<)veYO~6%bBe`niAm>Pj5>H}2NC9IYSMv}hAN33iy%x)#~z%eYx1>;RW% zyMiPAA+^FF1D`)8pZ?GAVeI1_6pZ{|?jR!><}V6vhTCF*Sy(J3m(;8L+LN_EF0h-j zx-xf$D>@?me*N|}KQIF{F7;V{@dJ_D;X`m&Sw)CqeHuOy()7HZ^4auCI6u>OBGF4% zF1-=3haPHa;nUYr01uw_mxKx!Qc$u^ezmIe$Ys3!>(9dpxJi(LG6%pm*4^bSUblzJ zp2SKId5|r20SvE^Ah#$l-0#oabtgJ@EGVLq+ru194)C`8Q2l{Bs7KC#>b_DTr{c1> zdmQZ2IdG<#0TreP%hdy&Xll8IX~)mMpxB!u7yrLi=EbiUU?UQ^L@Otp=?zZrJ`oaV za`mt`^E4AJ$qDIM@P4c|T3pBLzr`-I<e*|@Lj>GxGumMWl;Uf8u$o^lJ(nv z4N=*D%y3iGkJT)v_z#QXO-PyIc!tnUU$O~2{7pmmF7&afQ{4hzk}J-|!7xg*EGO4B zVzM$L49;ZcZ&8u`(o>;9FbdMjgUc|KGO0sMQiJZsnBf%zh6&o9os8cQU+W1cU#D67 zSIIhY7B&+x;e;0WCDh#R3ByH%^C~oV5g@)<+1)6>~q;Bagt174@)4s#_ zG&Odbq$Alt2NJX&5D7~PK6>sU$&qn^CVnX-?+Fuc6I zwn~5;vx|m!J(p&svAxeOy*zCCKriyQGBN_V&HYG z<##_Z6#$N93TvroMP%f&Px|9vtZFwt|Pc_i)^ zNJD$T82ZbUS9wvvM{AUHXq9<8!0mf8XMjC(^^)`!Gs% zJw6MR$?PmIc2h?Lh-yCSmG4Gs6fAH>mIuP)P@t?ytAPZ@<4;mYZ;xNjOt-C7UsrUz zj5niWjrIp?ckJHM&ixvMWfSbi@%HHqKkD+kYE zE&4-AqZxL$W=~zGsOe`)^?TghHt4=xQr_sTgeCI=qRWpY>llEg;d#tTqvrnKxaS>s zC|cQ${QFs&m;h@Ds%O0I#y~ib=HciI%xrTXGNYnBMB%%<6+UZUzL)ZN;)zmQ^wvHP zVtiRI2r6Ege!x3`uiL6Yv(ZY+g=J0FJ88~S>K6mRpfs4>Q-qOrJGHqfio>eNuWD@6 zQV5LSs^<$(@U8lcRM^fg5Al`hFjW4;5Ld$cb;<9R|Ux&j8q{<;g? zxLBoll(W)9FMU6+giYCVY`U_(b5ULIvfrC2fi_$(Kv5=t5<0|t%$XRHV;ckZ$8jfc+E?ikq?s)VU}{eNMDf zp*ut&4jj=D))@cMCVPnHnBM1!err+I#W@ckUf*^akfE|`sp6k> z`BBFYGNAiaKtd0YO|P@!@Yw-WlPi}8e1+M!xHNymP$seZChJvzoQI<9UvZ|7JY4y{ z^+vATSADsFDz08wvmqb|Vj4CuaCc%gNf-2LUi@2m+3B_uwovJGKhbM`lv6&X=cQr4 zNWmM`7LTSal;OFwdFgj$dr4_I2&}AFq4{SAw1?uC zbctcW=Td@f3;*94pR%4Wxxm~%e_ne=I`Dj_P|*G%Ax(dX-kjSNv`Pniy~uY^r|%qk zF<%i)TvMJj9)}EXX5cY2)hC!+-IccD+ z(|#NMdeOt_XH>EFbKnjpv5Sgbk=*W5IUna<7*7OjQ!n=RdrTau#GOP~ivvf97?ZjL z`14forV$&!_u(+HO2d7$pO1^CJkt9ElV2NR(6mfYF(DIXs??R&IQrmvr~)MF!F@ZS z-6o=JUHtT@)fd_k#<6fqP&+Jxo|P-2r76x{9q>Rpglxh7N%0ViOB5W%8%Z9BQ-FXy zF>9qdaDyEo@JeBo2>X%e=To7;BiaA|?~#;&t`7uCYPw3iXkcB7v2#(pxsBeDa44Y{ z#55T?I;jmfzQhipLRR6HM3g>;3tn~hr-e>b=HcC##F=FZ9UqZovv~BRlBB13n#f}I z|M6elU>NSvmn|bgfkfX2Sw>(zLm0_|3TlC-efs}5y)mkTDQpdn#WiX%6W{8CU08#& zO8a9bR^W2s6|^8J>y?QR`cELELgt5}kX+a80hRQqI2xAy$Jn@o1iQrXe{v?Lv$WEu zecGkh&Ur0&(!HXzdzRuWHsny|65LUq_FR=$A3xE1Sr=nsSo74lz3Ppv|vZz0L_vf7F1(|5l8t;c|%d35FNbXV$DxFn!r8|6jJx{oT4gzIW{!yLj2C&P5fXE%#qgrCZPikhtj&!mrR$eb4f^xr;ucJ5VjG%grKwV{|EaK7)(IO zsH;zc$MwyCnMh}uGL~*}{Ax*jZe=wQ`sgl8nC~TyKNEB)XYVZAEbM{m?00AEIK;p59`E31 ze*(g}m7shXmP(WrIBab-0=`2i$WID9ezdL$6o-@L`^&kZ1oJPN z*97}z^8d#MbN6ftoY zc_r62HBKMRd@Y`?BH!;eYiC3id8l)_V~>BKV1qlG?OJeP+mkCXU3ED}ZEAZ?8D5&D z2w$V%yQ7~Ax%_;pwbJ}xS_BE1cVqUxuOSXFzu-C942j$eiaK8Um#!I2%ZA+Ryk)4O;%qoN@DHC1Ln2Y#*>n<)c?05lLpuH32dL;OLo zfWefRkG==Lz;81j^!9KlT!hva;V$HhF*i$Q2iWfOJK;zfNoj!x-f3270YS3Zi>*G% zdVP)g;L(u8Di7~wPBNigPVN1$n~*jPhCxF`nv*4s`|UdqaIqbx(QadW?052hB>;Zs zaQSZ}Ad0!o5xK*rws92E`u1v7wjaw=-?uzQJkb`t z8@G_@-8pM6GQWt_VIx^$L7{6Ybno4FWla4asHUsl@->=W3biujBeWJvb48$}ZidAYk?rs8Zr+zd&&EU9j^Cufmzh-nWB z0zZZEcMENdi!A25{ifW_HSHm;u+>j?d|i`=vdU92loJ*Qs!bU^)z~9S?Hw*?PD5Yg z9_q3DSVn~TS^R-l?6sfMk{=*`K2;2mfrVI1n3ZC<%bd6AMtG!Vjp7#Bo?_yPAwMUP zd12o7x8mB#?8}$T;-w-%c%@v3oqQxrafxCg}?KfEerJm-50U*#R$2HcGEwm;P zO*Fp&ko1b#oc_rJoXRm&+3-Ek0sMu9Zf6$ZT^%XOL(Y#D!ya2sCJ!QOFAzbADZkPid-}yoZ$bL|Ema=F zhGe;kK3V?~W?X0g3jeK|oz?g3EmK?-SHHrE1U`%1oL4iSLwr#xVbS{dBPOpEc#~DD zqFvL8Duw^VqDPG-@=8zC(H^Z+Vw)7^It zEyOS&uQUieP2{-0(H5R_$-g+!69A+BnW$L&&{5Dv9Cr}!tl!+KF{6oqT~Aw$E4orR z^)&h%cBQyH6frrCq{~k3?>;f0SQ35K@IGGUAdG!{;1^EF(+)1;dHb_>Tdw`FO&MPe z>urXO4X!%Q-?l!y^=w#n6EbEH3p^3O4?eUA9|`$!PC~IQOdsJ^L7&~u6 z2sR!d;-iN@4lDm{YluM09O&^X4@??}Ti9r3)96@jMK`6d3g3_cZf%Yaj;l<$Kr2jU z>ubn=XaR_HUzWQ(HXADS+X+M=+%iRw#6}8wLw||ItX6eZo7eR5c%?f*Qa&rkZxQZJ zI=<(JXi<2DQ^8Ho`h4AKAH-UhuP(_3yWw2D(s=rTg0yY-4Y3zO%UpVIq4(*}7vZ9! z8Jb!^|E%!Xmi4}gtjR^0tn8;UvIEBZ|Gc#C$_B96>PTTVGtgz@ykVqd?qvQ&A?~e}G-l2LBP{|nF! zY-zlBOxtMNmOO=DG+q?sX>;KPr@wDRfuq3==;p=_+YiOPsqcf4^p2Nj62ByNOy~$_ z_QW1i`HwfPC`dc#H7Eo4y~T(y4Zv!f!9+nW-X!Ob2u;Hoj>?Pv*uyI#`fq3$SaLb| zCt0v++mmlz$=e^t*N$_vvacevskB#edmh5$k@fy2ajMOpKn^Cg$H{Lk^#FuA;+N3!OW%2EDt`d-$|9x+hGXLsg#lL zDw`yquh#ijKWbl$fp`|`+z-G}@V(f<(Bu{an#uwp0>$gc-YZwm>ao;m>ea7#{=ZoO zbaR=2<59|qrqmGdEsgi$Qs@KRR}76o)FWob+ZoH&bwCSr#<-*W)#$MWjVc4%oW1a? z`w|Vujtq;5Cuk>U30R(eZ8|E*_LQ}YUB`Qmovi3S?#t(MQ6iQ-Tbx3jl$I3=558tg z{;-fHc@93_F6~|93Y=W3%JGzGRGJ}nFtg*~sR2tdq(oXDltjVeBIIf{3K^0E`w6}H zXocu^py9`_qso7wQ_#nqhb`C+nKTnAGvRld|5*D5glP(?Wt)TJs*nPcQ7t6joUc&A zeJdqzhsIM-b`!O28CNSRh8B}+y0ou$-sSV(QsU~`GM+S-)M%$8chO6`IHeMAFIkU1 zeP9i}O68g}LipcqP9|mnEftV zb7x0?oqT+ybZGbN``knay3bu3kzToe*$6?H*?PObD~-R*1^Q5Qz-zNv4iD3dS%9_S zFUb5!r-}lBgs)_rn1LPe$W7#{-oe$6|D6p}g1w)RFB{ZUPaB1uE$_PBh?%;I^JX8| zZ3p)t%P35kS1sns5;U|0h90O8nqvw?1^ttA-(Y1tVb75)p)pxm#*v$$z2+)~k ze~F};mH_RL^vCQ6na{GKbiZNy(VSCcs2XWr#cT60e7$!Hef9eVjBt`-_bhN$#xli- z&Jji=E^HRPyc$j2>f(~MjH>!11{BI0?;&Am^dq!DOUv8##+{Jc#^+B}lo8apIGU)J z4`4ms^f~v;J%uiu_IvftwSHn;KptuAnX0amYRGo2#AoN<=1u9|k45ifOcA~v9TgMB zWkOehH|HDDJjj7xl1Q2$$(U7ML6nWr4QBGZZ}L|4d>6`*&Cxk#cJGE*g4&zZuCA4p z%w5s{mHUncn#}di{0ePWbWwF}`#H8AC$UrcjJ{q}dJhE_U{jTZxz-h=3?CYuG!A=?V$aY+rvNBgx6wP z`OEX;3B-i9oQfH0JSwZ%ou-%FKD6zu_-e?S%=gE8^)(-QWzUadTFJ(>T~2RDx_-j>yZ^;fVf1acCZoV<7TOxAC{s@F zoc=hLWRqxUKX&tFj~a|%3dR3=%E)zeK2lqc!rEogN}TbU$J5vb@bOJ?OZ_Xc+5CQ; zNG$pkIRv#Vj1}qPM|nEM%V#nR7F&t`n^XR#s$=ve_R~M%{<&1bx@uC-AY84E#_4h&xCtZLaEx6P&YFB!JgJ z`!>7#qF?5=5_Luy1>U*D<%C=59`~o?{aoMI>U-CEBelh?<0%qo5am@9grqkoA)~O1 zy_OsF`Dvbet#h{EYbi&wy0$gZ-zI^ner+P5BJ1#?-t-Gn3?zLRpHIl!a^1ONo<8=X zbUCNGZliUv76(eoarayyggzLSG+y&f+<$wB~$8+SP*` z^PrW%`1L2T!JoeW=eUF1+N@ROMJoX8xnUL8w3r5ltX3ZkFRTj$+Sl4)3YdR7{j5el z{Jv9cRf4YI1$``mFZx?%KFrmxmVrFm0=VeVmW&-5Bxho3N@A$0$I(M~ZXyrf`v%Pw z&-#+g;cV2U#%kq^dsa;E$?lqgVoVMT+V z$Vco%rcB|bGCAI-0oNC8-^^IWvrI#iNF~HmzDIv9MT0F}{uM=j0BOT7mFF^yYd)Fn zeeYj^PP9sC3pAv6bh>ja`%6O%jnAKpyNJJi?V4P(p=?ZpT&oZvUq%x0O1Dpwr9Xj+ z?5sZzd8|hdlS93W^%x8Eml$ED(UVnjv$u7ec3W_@%bxci!~^g|7iWu9zF&O3S8Px^ z6hMazx6iIzZzd`?m=XmEe_hTNyOzGemVW=4sO=l-?$0MHbTdCxOashYvZUqpa}Q57 z2CsB#(5Sc0@naN5sFvD=#NS9wteyWLI#k{G#848V4X<(zc#9u?LtNUj+ez*97W#AU zjv=wfKKv@fPVITzP=I12V1fGQ96^wtKTLPKl-axV6SpPnR@tu}D9L8kQxBR~PKU~8 z^&w2oCoDVPE{b@h2#gP<(mU9Dat=ct!hyoKnYV+w(aR7f32AMYu8mZ2vKQzNSq^fx-h%QH zjSn`5V1LADY*+^N!ozrryKb|7O^O3xO6^of-tQ&vy}AfopNyk4I&-OZDuI|xLUa*y zbKy$}Cl@+-L(GM`YTg--G|F}7~t=w4s&!f z0`@BDB}<;?0B06t@ba1iIG&=fb7V$g9nBjNUi7z`B}*37EzeM{wJ9Ia6w-WW!lMXj49qtv#-s{yF@=!u9>+r!o44HEttrA-ivLVyE3q-OExOW*SPo^}U&l1yCr6Akl5C zj;IETIuW##?ZzJ1m&a$p-z4ocJotrDAKKjLj{mKj4&J2DaGJ|}JX6kQw*4pkt8FiM zK-WHCs+3!&GKAaj^DxuM*w5F#P}222spO?m_QtQ_MMfW>Sfz9>e!8XsYkztYs@4Xm zy%@4?7+>)`WGQS6{~&I&n|jNCRrREo<&+p}cu|2NkF0R?*P7!k-OXYHHhpXG*6}FC z5iljmV{{cYxfj%Q6S+(LH$WV9GED96p5VDw0O1Oo4$QPDZ0Ne#->1!0#P8U7^wXqa zG*MH+PM{&(l(caGNP?(!ziEQA>81fr_HF+HVK;qqt#yPKSDg5@rYiVv$)G3n=5rNB z6VVR_ziof4C^5Z3`yOpg>Mv|FLE(xpevic~u{ps}O#cYf7~vKsOZpK`|6m&oUd z#4APO^%(14NGdb8;Z+1#3rpPL;%_Wu>*OXYt)d|UZ zZaHdyre{M0VR03q91sdze-W5bv6-Sd<Romo?&DUR;9YU5&fiy&X0QlEcRm#ZkE7+0kW zVVi9Gi*2AGL})RmXk~#zsM zeuhW*u}aFpqStNJDv?JurEtN@J_|pM@eAW;s@MNUbW;3i_l9UjZ3NJo2o(M9U*Zu- z;|05Aj(Th~Q?J)#l7_qvp3}~X(Dr1W@S_x@SO~vJUChfA-Gr7AopDjNFF8ERDrMcq zPQ0B~a+f>l3KhE-ow6E;EkuJ1$j~xQH-3ih&VG6&4xzL4gT0(XGf02_)f7(x8!EDH z$vUDM>>`k4MbvvFr`;UP64p=}<)J#K{G7r*f7*pnW?q(#;VyX8cL}}>>sw7ccu)RK z2z7FUaBi!sAGt<$^4+OK+HjjmquTE9mAtR*KN+RX*1386f+4%@l&3YThJ; zNCx}~$9Mfrv((0-qxrOtwwTw56#y}Mea6KAx_)3O1|hL&nkOEhbVx>0<&y%_rOTRl z99zHXEKf>Wgg>Z9lbaOu34`O>xihVZ3lo-;Vq3J&9lVl zw+>bNCqoV}GE?g#f~;FP4|A-l}q{ zR$C@kH_jNseeelcrTxPDGrYKmTS6X>Z`1=5x9KMnf0BC6t-J&rdwo5dug=pj-&P1B zjEV&4My0{n&8@@p*=Lc5OzZGXl8}j@57bgEtphrSNijn{M0p8?7$k4EK@O;axnBlt zXm(W>jNxe; zZrq_0Z{&NNrO=@^n12Jp+i8PRsXH+}KFqv%-i7h6p-)0>&~La(p+RofM#l6=aq_+I z6?{R3vIp5p_GXfjdYVi<_QRpBW^TE}1`Gkaji` zuWaJF5OMurTNJ*uH)J1TB32sWEC-Yy2}0ZCWi@Y3?*a--Z6iU#LUQJcj4|%$2OA=A znx{Yj?1b$-_({EbK(|#hQw+zb67YjWUvu1$Iq*UESAxIg?AV^@EkyA>)0wEQ8^$;A zQ;^zEol2}aqe}4Z#N+!{ zhv45oh!|8Zzf-{GO9R6}a`AzZq<&m~%a1)4xS5|F>(9d(OTFFR+2YlL)Sy#mm7l#$ zjFEocB+6#S;mI0R8~EuvMTb&lE%Q`l^rjipo_hPE0rkH zH=j-XZ7D+mdmQw^xb6psO?(62g+d&?4|;C*k|tZ}d5bll%|h%XP?Q#F%kkJoCJ7Cc zEh1>%1G!ziV2{1pKPZs<&pHgOY==P8=T6(7aX@n8gWEoM96*weEVt?!ciRPLRT&su z;M)c#X)Y0Eu_5}I!ukS|b7*BhyuBT)LW7EgxyR{sGG)W5D&I`o4Oawg7hlwujS%7R z-Rkz(OV;l0Mc($cZ~H#f1+f`FHCSH~b<`LxfG=|)tIlgZ_tXl!{_FI29-~Ie*)GI^ z*;jh5DSJSQ;+40q8+wcy8Tw{~#RWWsyx>s9wy}RI5|EoN?A5)4ACwakWOiPJ@(E(7 zI%xv3DY~DmW>|ZB3-rx6Px_>4a`H`D`nh`@l3~zk`T?8h^FlKb?ks(kOWh2=e;qm|E)EeA z{f%8^v8aZFRMx8$>$qznreDUDt^Qcoj&5e%RQ<_5DUsd%wI6FW9+zu%CH}VcY0}p& zHIQNW-;Af#UcBvl7L$dolGsKrc_Z;TAluj3Vt_s~R_NfQc7S@5() z*w2jg=SsWZa)sNuKG(`PMQ7DAhiyrUX=h7Lfs>QDv<)skSDC&|YEy)e& z^3K}E>%TYu@GiG)g$vfNP6qWtUX;}(r2XaRhm%UyFLrn)oMKi}z#!&sJM?%H0Zftd zkBBp9demk|Jj4Z@{7lEd{6Vr&q=3P(;$+_QB!j?-Y)y3bBP8P&8?Y`e)57%w zNB@1}vbnaxU3hDJr|O}MfAN$hXpBV^Wx?upEV7mpCIC4Y>6)VXBXD@=Nz3}7NK3^4 z!a1j<7wR}JG0uQ4g|#x6PmHgL-%aHfc7zlS|EA8IZy34W%c7HI{wC}V8Z59hd_!}a z7Zv^Pm|2Zpjw$DT5CP6PGGAv@dJLN^8EmOxk19&v*Om6(&!9~~ail zP7C!Rm$x(K!#8+9E1&xX=3W?rHl%3$J#8^xXQW;Ca*8}RZgsGePv+Sy zw1x@KK{~tZ?r>k8O4S2^&M0uH_h6PJt9Vt1PH`(4$hFw3T0J7YQAM6^op#z6^<;Hg zJD&%v7FFfOs9V$>kin_fXTJ}xkd~8nQpHXe3WcfF>;Yxt{0wNNwUq@6*jxnv?I#}n z06bANBt20@KmfhYd=w0r{7ZP@K0g82p>}qjr5rzw8f%bkWfOncRq0-7{2_=jDqZ!p z`Q_BXNM}l?pSY%6&5tf|2`fqXGFXw7H!gdlWFIB1cb}9YG>i^S@Rt?NZS#DUrwiet zVM_RtSOHV~N;zw3O|g-vHYf3c9l{XQA=v7J!FTY7aBNL*Fst~6PFP)%t$#ZC!q$Fb@b-*67ok4ZGCLrL{A2R$<8;MsnK^cU@C$rg)~UoV|*aCx+3 z!p_jretBS}<3h`YEiBBYoKq?J(MPS(!uWdQSB z^NQvNZFEWjMM&KnJ)8?m%ym(Qi3+*{nE-~_&DJvVR4;VAq?_ksZ8bd{JV&qeAYV4Q z0;HcNtR5ZXZ;~Zh)z1#9VG{`JAFfc>=3{eBN8u01BfR>jpPT$Sw~HVj1n`)IuX<#W_Lb8#t?N#fD{Dtbp<{Ra2;)!s|p76S>zMbdg8scli z=mMsRvUkQm3sQW*WnQwDRF6wyfJL!@xKLx^<5}InKb+7#x;pQ!_w*=X0^7 zdc?FDDySjhDY`1ZSH?clktmwQa`#G|Aq}mER%WvgZ&O9#26d9CEPiDu zlZbj4UeaE9+pwf`OpCfl%l)y+D~-%5!EeO80)Toh++9+)_5A`haqSN2`4)nkO`^#St(q3A#jJ8QBm`B5fa{P+NOk ze~b{Gm@PzdAak+QcafDSkh|G(PLK~6;osar!OiuwDpwelYSE31`H~t)1MpLv&iO2a z2B9yc8hrf$8s)KfY%sJKk6~~{&OjGx_;4gYHQ!V0+Bv4<$oTz_{&xxiEOWYM+QX5# z_x4yNMg~x{QfJ!7hJ4aDKtsD?#`m>ZDecbpjzqY0Q-8`{;-EKg=l7Pml~%!b9|rus z`!gfv$7#3a#r~B|v{XSCUb8T=-%#!Mt%PoO)e8HS;hEIvy{ZLTa|HOYmQfDi0ha=p zN}^+I6y7F#1b%ozYV40F5EYMDziXm%^=Obab1V*J{cuj`c(+iqziL+41&r<4u*l{Y zXQ@=DVx7dI37w(8oBZvg&g80E2!gLl^cN0(Hf(vb~+9V2J<_Fq)evXr157@KEW z&R@^N8LX|x9S_EGyJha(ksqB%8ffJtF)w8Th84aqb1ra$Icci(U!YFfvj}K^CiuOo zkCkiJt|@8uV3#Oz{Ucp+{4rU+SZb=JCn zg-!im2Yry;s}PP(e6W;N2$;-N&b<5=2UI1yAI%_{mhf(MK6GMjNNuS?1z|rp0Bbgo zaCG&;oZmjZjpJ_o7ygZb_{#%avBuMSbs|d55t;pwy=_oQ-KZ7s$>5K$SbDhGZ==|( zIK0a7mV}lTy4ZKJl$F&i+yUhfVuym7@C}vToz?xYp7QO8l|>gso$pVUbj{mOSJJXZ@tHrXRbyXB%!_g`#!PW zUFZ4uNxy5Ss&SR4&qaw?C~w$83B<8Y`C?B#^mZNIXeI4e>i%J&VzSV}JS|ue)*XEV zeSvyHVyaMS8A5oFFKtaDqT~3a39#S(K1nehPYKq0A~>8mUlH@D8G!`r=c^zSY1e>!F`y7Tk1}ZBim^_1La^-S<2l#F2N~oikdsQ*cu1t_CIK z)^Lq$hvBh147S+2xC!^d?(g8EBaXT!>g59d&qVhH0M&ZcGDSa3^)pFS&XLVD8@6F=G-1H;_sc2$TGd z;e}>a+0H$%8b`hHT~OuQj%pgwK-`mdUAp>lc^8Nd<&9j>IR-s>`MR|}*qX=xtKDu! zvg&cKSd(k+sOO=*)*RrqZ>cIZP}D_*+kC}0zTuv3#7w2CWhsB=2*kgaq@22JI-7sm zskV&B5L~>H+C|VCp;s2_U!`|G&=-G_*?)^snFV2PA|D0V9znf&XqwTBsI-EFc3Rt% zm5kcLg!cPZvw9bIYUPX0`-ML`sZSiE=~{`P7Yq{y=@}{uj7QxoA)Gt{o11!x zG}9gv%$qPFlm_Zry&u`{&=TFNzPyeVWp$;eJBY_F|J+68?1Curg?B!$)$g>C$*dY$ zHETW!!Xhjjcj2n0p&G8=Xl~$I;yV1P|6+4ULj-pZi#_R`?L?*H|KQjP$3n~<-qX8#E&q3dYQ0|+`jlYMME=D ztmfL`KuysduF*HZn0O9X0IZx@d*Xe+ZjJK-0UgOB^0<&Kr$F@gQ-T=Z4e7+SdiXg- zm0}ny;EaMvJ?Rt{OT}U@ChJO98J?_LF9B-IeUV6ld~!YdvgD`h<_ekrjzT4k<&)H38@c?c%h) zG{N&E@%+#B@>~&Q7Zgcisi@omuxg}W=Y$b`@4R*x+`BGC_)*1r^(blePy%@nv0nVl z{FCW2nkuhJ+4K)-Q$PG{ib29+wU{TQ9*0&5$;{IpndUhzIZ{K@+}oqo5UkvwN{Yq% zQ;x}|dVtpn$NDO^8!{ZPx^yWwe?0MO(9Au;PJ){2AgSkl%e z|6RpjjyHkU*k7{i$w)f+6{2a(VQ$0jMQfL4j@g1^CkeBn7*RR9nI6ljf3^34>`Io` zE!b)32JxKQ6VFT8iv5eZsu!=*+;vbKboHvWsX%CuTo_(Ar&^CrvOFBOzofE#Vm$|+ z=-Z20QogNVvX_yE#2HfW804Mi)y#;e`daVTzJNqji zN!xWRB|XH=9`1=xo@|FPwNkJiTG^%+;c;5TNL?NDc-!^xh{dU=is)LK z8f4?Fla~vY2wAwZ75r+BZN`^5!o9{WefI@#Z}RpzV9N>Z(h>^%cBZ{4Evslp3uShU zT%)9iJg>SMgCvG$jnmKJ+6p=0YX!;R`oIge(m(Xi-p1|&zh}^lw`968w1yQ_>=(O; zx?65nA=lnohO;M#f%_1cB&{Nqz`hHiz1ap|c6%yxh-jx_o1}b=x~1bLc>(2-4%GHb zatBg{Cr88b5{2);Nt?FI)A1F{Ydhx4siSltyZh2>pfossQ4xEEZNTpDtdwK?F&q|c zj0)zJVgl$bf*$8x+)8_Os&<$l1NUnQ7U=)O*jGhW6}H{dCEeW}0wUd#(%rG??(PO9 zMN*^@5ZHA0rn{wEx=Xsw;`{z{ajyPz1A_sKwbvU@&Sy?KO2nN-IXiT+(Z}SOnfZZt zGxY9|-{AqWtp3KuxwB|KA!gqUc#z%jw<+(%5W09n9VwmVjLK&5gJ;uok|@g%w*ELA zFhNRf_F3)Z^-CQZsC;N@+2W|e>Q9)%Bks0D3HnS_?gS)v0*aI;4|gL*AuQFLXRK|) zXMFKFgIu8+=x3vD%bV-hhT7l0nnR4xBVl`2Qk=|M=48qi-$z~{mH;pK@?)yzrk<#ZPAt9DNhJCaGydnwR- zo=3ln>-8<8k|5mK`3(};$M}8$uryKoaVC1zk|` zaQ&_YQ+7Ny9E|?&Lx@0-v6F$|d*~h;893W*}VgtNeuE%YVBc_tI-3ok_1d5%iUAx*y-g)1-7UFRO{WjyezfJmY z=x=|@jhFlR>XE^{*Da~#??}DPov-5a`qiAhT7n0i*%xJcI`l7^_|!jet#TtUpg-N&so0nka(MY6^J1I_p4b+4Zp3A^`8c&D$>oI~F z3OTLbFMkgyMHpl|E>ZYxtpAB$?X=P~Die`n9UICC;6&U&t9-oaCeQq!p#_Vb zG@Q@ol)PYmTRyRwv0>CR(MP6<7#sy>pJ_NiOxyQwQKE~toeRo~-1vtZ#g_~`!WAaM zTa~&Libl(g{@cd_|$``_w z22pJ%Wrx?Y<&}6cP;*QHhZUU1>=#FZaF+3C>9cfF_kRXa8=-ywp0ga>#*TP4;$2@m_zpRt{Q!w4XL(L7 z2LU<4DWv(**)U^w_AXFLBVdR_OHsG1jeTluDaVntuHWgzHE0->qh!>QEqWGl?^zaV zb1zSs%iq|aWG&K z33O@H;P`<{xffLzC(Q+S0!GQp{IkcW^k8>Z4BMBc=hWn%fvXSf@msa06&RZ;I9)GS z92W=gjtf0Y4*9h1UTVc0j@4u$FWQ!3-39sgnN%eNhk0)fm z*fPt|wG#yIHZyM>qLG2ih?&R4W&ol)t|j# zA{`0imC{?LH=mUS4ey?RJK`|v^fm~kvv=(Cxc6xZOQ4eO&PMBWG!s|_E3WMEx zT51mq?XbTA2FY9bm2UZZ3J;2<%nX&QtN~Yt8%6+a94lA-Tf8_KKioNwC}tm0QfKP{ z-s*c?0@SaP3F)T2h?!!zb6u6^P9y+STI1eJB68E7lwBT@ckIl%_B}zdb(#?k(PzCB z7$4xjaW+4JNK`EAneST(tEFh+mq5x@n#5J(+ zE?vAxMkC5?{n;&G*PvndoT1|T#s`)kJO-e>ZMken%5|XZ3NCeS%|GknIX*bcps~-j z4*7W`dspgdTbGR4ydA8%qQv;OmWVp;#%FrH>^3k9IeA*R?iIS}4AnRmt-Lzk`GxDi zR+@(v)xI>Ax#ni*EY6X1LTJ(4%%Q9Khzf<*llK7VUjhaMoP%L9;eseMw0;<}&=`8> zOflN@i$={&p7W)UTb6y}v!GrE%+PEnMfUH)&!QIqOmY{}3DEH{yu9!_e!AK1oZJ~- zL^|~|YRB7qdM2si8P(pC<4VXohw#9;AH%Z4ClG!7GO(gmYw#F*U+?I0k zCG@MdN?5QspQzoNF6csYCMW~CWR`5AzZ^t_)HX`Mf+Ha+camPgRw{($g4C}6JkC)a zt==1xRPEBS_W|AePg7IvMW21lrh0?MXdwc9s5&?=7nIZkE4fOSzh2g7{3xp)LGG<* zT;?-`x1DC;mAjFwJP$&x-&|WgtN8vt{RCXmx^%;FUKx~@d|a$^%BRr}fAh~Q;rF}~ zObqCtwIad9xifR6FvARrMv16wIHt>+nId_zUw(^)8$)*oyu;j2jsJFNcwX@&toa| zJ*B9yziAQ&<4C>8j$HK&ZyOx1DxsF!dQd98E87b)%}ULhh=};_0%aB-E7{X*E$~y=ltL! zpuMB=N;CuQq;MLqjZfZxnH7(eR21|B_8HatA$oj}m9b}kZ=SL>oZdbIW*^MwE{ehX z0kHgh`^?fBXWO7RVuyYPis-2xR0}-RQTq>_LD2K zr60NzuzXH6Wt(D0z->>oSE+e7NiuBWw9cm0!c@gt(JfmRts&M)0~cRPddBo zkT42!?i1pb7hjs$;I1WHt;QF-zu;oqne}~5NSlFypJ0kHCnvv)*8Sng#-+)h9a*-QFE~jS#{0ulCZMnH$s z-JwcLo_)@5(9h$ScO}p7luT#gx1*A+Xd#&|_ER;Oo{SzNu1kC7VKZ!}$38b5tX&oB5wxu+^|uaCk3n zVBu9ItS0$935)RL%ByWj<@)2jamN8yzTP94qY}Bo#mzRSs|2f!X|NPpK%jp^v5ObM zQ$q{ZwQdVLM^svsUug%i?f6<2WUu7+ z?-A`lN6v`7(r89;o;ScXX{*kOv-l)k0=n!55P_X_$&0rUEi$l{{gBL40TmFKxyVGw zaw>`=>NpCqVzJv*ciK9v^S&c>yg6WL*;tMnaOpwRSH$5Ix|rU!Y2K}Ocp&%oki%FJ zU?x|7s-h57r(<=#k`&SusLo=~?r7r*T*(MIT3eMBhgxjS#d>6VR!s7R(NRV|$Ylfa zTD+I@6+{=)``eE)_F}R*iRUOz3Hg772iM!7HznSSO)FMrkO+NlR>bId#q<@r<9}*J z{Q!)dO%t>yB(vv){Y=AHLhB?X$35hAT6V=HUlPApZ!H*zrHD(KT!OEk10E59$ZNJY zle9@R9WSI@942n_kU#N<*56G?rf>yrm2pE zgpfAUXDm|5N~oYqclSNi3Y7_CT^{LWRBNJ@i?ZLpP@C`J2gjKtJ;h6GjaTI-uV+zy z5sPQSl%Y&sh^*TY<^hchb7dKiGwZe>`;jXR4-m_u8kyP8n&-jCWQv6;s4`AvmgRJ| z&s8htUPg}(zEqNnGX&x<00QeWytoS%0cFfUJbQcx_p-4LOnM(7HORs!trUob@{Wl* z){??Qc@SamQKF#zk0;s}U_i+u3!%R+l{SMFAOk|ld^nzqp4zKn)zX06@&D5Nopy!~ z4bJF0Zk=NT2|Lr`!9VSk_Y{Vneo)3wrHO9i{nvCZqtK{yaeg^%^?Logx$NJfYOseh zSn&I&yM7~leP(CIVw5AbgA$!<*!fhp&#U>tS-2ZRG!!K)yLFOxKRhQ>D5PpJO>(`*Ofbv{ z=S?N;YBxURSW;5_HLG6!a4Y#*R^B`R{`_0#<9Ytytb?5Mc%J>%z0X^!!zIKfx^3g0 zpO>KRgUp4xqdqJIl#lzIh+U4pQ^`(?c&P+yMyYl9q8tSISG>fv5Vc_nY#6*HUt|@2 z*jNQGA;+CeorlX_iBU&A%sDK^y*SrF>wjRyg@ID&Ye4=X6HpsZp0K1oI_vwG=Y*=f zak?erV^9fzN4PYIgr5Pg#bBq~S?K^>rB`a1S;f2ditVDl5Z9F{UnCM+g{&+0D>CI#I%{ zaX20&HfhtkybEO~gtY<8Qb&pfPplgJI%MD$s7%WK&1YQN-1eHuI85;SEqU)tozRt) zRvAmZ3p`L!Vs(a{JwmU#RD|ga)a}4~m(+KZ3*EZ(&)Gef#Idu9AT%^K31%rSQIRBN z*zgl{D`27v@`z^;9;nMcF3^2+-xUw{+cO=Hq`nRtvJCG10spO|IUD95k!h|md(a9m zE*Xvg#fG+@%IH14MRh4m5`xU;Ay)zCzaMya01LK*Ez)Ftk!H=#UB}7!@(C>GV`YI( z6J0HL{ZKtVO6DRR+^zC{u${<4=!6!9-9li|nK?jp^OxUQ9jff4w~}>O0=~WN6V1Vo z#5v(_!~D97KS#NKlLdU_3BWEdtwVB51|}=)N{8dtOizv0EICW%P*hdZC9=UQUdrbk zKO1v=)JkqdjCC}narU;SdUx2;4u@Tnvt{!phqBL6?AEP~Su5Qd9H7DDmROHB#pTd* zONWn zR*ZHAZAdi_e$6zK3FLzp#hI<*a6?Q2ifZ8$zI}Hll)~X@n2zCfQOLb=o6~_MER>pyI$I$<2yX03o57QE&Xct z6!OucD9ANL6t1daa-qCUK|2^I{Jla-emUb_X*&+&XFdD_ITVhO2Ku-|IUj{rAfcm2 zBEF{24MoNFL?od@DuOkC4i-+t+Jrs1)UZmjg3REl+iEzh0z{rUcqYf9(Ap>Mh0sfk za8*#!MI=shCXtm5SBNnDn+c-0=(LO3*2tbd!2)WAQMw3Z&7W0GN8n zU-_99HJ~P0F=}x=-XH}j^%1!_{T>{Self_z3!2LQWG|Rul~*|g`@M4}?xh^p=;luY z^Y4yZw)Z9Nx?3V4S6;RliIZ7*OS|00+mT2x-e$fL`CL+krIZsd9{QdIRq0NI_ns1X zYRi|!6)^S_ltIR^$MaZw7zfc*t6LjN8Rh)RF;cBH)wagyJQSnSzT!TsG5S8V-Rr@D zU#SS^_;L5V-u3-f>gWHV_!w_8)v~J70yJgZd?~*?(0JMxF1Y&qR0)0+W`W2ZUCE$J zx>oRgUzk2e)frLa#Q}}wRTiqdWsX1j&;jZ+XI~2a*+si)TtScpLt2|EBlu%vn2wzr94vXJreF>~BDm8i(d%tr|3V3|Aq#Q5T4*8+2#N zLf*v7!%HbK_rgqI{qnjQFgs6}d;4kror8BwTN*!*e^^zvSwHiy>Sxo6BOB3UZBV>L zwzY7X$UUWCy}3u35r&s&9eIeNp~}U6ydj5Fz?S%bSDI&bnv&CB`eQ$Y=>bacHuzY> zJ5Dr-oU+~iFf*s%U&~20;$=zQgCKV8E)bh_Xw-mb z_Z>rxB98kDn{x55Oea7JNZH+0psb>_ccC^46ND#&t=~a_3leTY_9LpwARWzoetbi! ztz)6hmkR>=wW@hgN8R zB?NV@FU`saTr=iIWC$PKYwC0`{1g!+tg>B0y*6-ekr+;b@%C5K7IF^6-a%T8Gh4iL zUOOk|(!gDB8Mr{l@Of!hSx?`1VS6*@g~abIb?=kxFG+N8(xXEx&LY;bJ7?r)sRu z3R!8@ucOyXI)Nod#VF3?7LjGMDR_i_<0{Z#o(3A&x#{H2>RW4cMHgag+t5Aw%*PON z;5UKlA642>O+P_ zu8%NUH{bF&cs22W{wLPv2LXX2F=|wX^R*0C4K5J3iU_-#HG@yag02Jov#l6(MpmNRVoZU)E|+BcYc;x zVP~%*A!qZ2x@Ddv#mFe(i3Hmu^PU5vK7Qxj{+Fa$qNaKqeR2)|JS+P%WMtHoI5v6;4w!9L=WR9%fV7mb}aD8Bg?TsWoS9JLGSReHPt)6CHB*3P!$ddyQfk2#DGc-vbVJXwa|e`;OP_Eo#%yRa@v)88Y(yI8PiYw z)?@|q^QdyHUxJ0Ajt$_BFjpG7uXZ8y!UN zQ?Q39{#kt>wr4xhB-XP9fbfYL$%bW!aD1HKma ztVt7oIA1%&`OR~uk`D4k2F>Q-EqkXCJx%_aLFB#ZffuH69w=_5H7lq|}3Y2u`X4?Barqi}L>+)WFYN$mEW6C)_ns*`>k zz{P6$iS3pCOAe!&8wo6`-Qd)&rvZGGZPHaHtw%2;TTB*rP2UBkc?=mIOmmbo&qiqW zy{*dp9$^~~Uv(nxma5`|RpH`Q?CC|*Ua1=v1z9Y?D_`h5KItT#PWkg3%Jl_=EqToh zK?-+xn7!A|n7t=j@iD!sG{3@hU}-BgKsA>NzAotMxQjWso+cbAO9Y40hWavy113c@A)XOtISRHd(zmDRLJ&KOraO+w|p$ zdw0==lO(VeX>wBSJp}CHb;m18&-!2@uz4hWj&P+FCq zVRQ@!Qawq<R;rK5<3khpB4OOx=_QZp4V+XF#XiJXPAhFnH+bqV*M3GG{?d=p5c> zZRjrt{P+Q0WKa%4LInm}e+c-)VHENtH+&5?V^Dyc@{<_|)$!GwVR(4RP7S}68M1k3 z)Y3vSM?T)A>E!gW%SB+&lJ+sU<7Yc#-RytoGI7Kj?Jx>Cp~08rnD7}z0K~EAV7s)? z0J`e3_vt)DSY=}d{j7XgOp~OQ?T~0I>SzL~x0}xHTcxXS1LbviQd`$zYR?1hX5vwQ zZu&IG%D;Q1rv|#7&%Rczj`3;BU|Y1A2#zY3r(H&5mVe^AW>WD-bQ}?G#tBbk#x&v=Z&YrBd2&$W}tls6Wy7NT^s~U4cH92_WpHWP)%Ijt*2BOJQjit73c+!A98#3PM4IB8zHY z97-a1G=`gjI@CU+S2jW1pZ3MRs5=W&}_4V99tR>L@7g&gb zR&sqjNU2O2f71l;qdgQEFCaiR&~Nu?9#G~Kr)Bz^iNcXivwt;J*FiYNNqQSlz0Ci( z*zfD%Sn0gt@90On+K4p3M{sm-DZtf4qu=2bKoNVii0&0oQ#R&f!?&z&KBs9|C0YPQ z(9x1=$vLF1sc1gk$$J6vXet3d#0uOrbQUmKp~(#}dcPMt_f{Z4R z{5>U{l5q*Px*GR3&o9(5)DPj)TVpxRDLvK29u0W+Kq;7Ao>M?+*U;Sat29u_4JSGg zL;_60>~e}8;D6=jz=A+|$AdeOMgXYpzQ^tna@knCIzP;((Wz$9XCU)Baddq@=T&hO z!kb3gy(OwLXvvFmP-KMWO`@Usovgk3wR3MXPE@VRey;?XU|wt3M`oU#6N!uclHwB&y`u zpTnt(d9uJq=?r?YRh`x7?pBH~T{C*b%E@KOpe*&qX4uodinpVwgaUyM4%FY;X>#2F zYyY{p(L%kS-a<0u0XSy>_^Lq^=vm(ox5~W(%s}6FPtqs=X&ilGs)!8o;0&812DCr) zLI*3ZSRmPDMK;9)?+;@Ir5XP2VtD38Tj`s-pukrU630~sbbs@{{e-KDt>ZD@Mrr4f z;P9Co{F=1_%ZqB4puZPQX2-N$wVDQ8k?-vc&OLtHY~43oQbIa$0(|F{z&LL-yW)`? z5K*>#NShTbV}O(@LNNA!gtrCr`8S+~&t5yHpll&ct_m~5i9R)u;-zRRz1x-kcNAV+ zoG^f)52!a{G*VS61pcx<6L-SkZF`y^Z?Z5a&Az|G7&T5&D2A)CeHdJ-$DI^e?+csl z@B|VHcyl)@KoBn2b+?l{eNL-!M(kYOG_10K%7%?tj;yZ-!jVqOV+Bz-N zrgYanSY0Faoa_zIY-X>!u;#c$Ol?y})L)iX^!|_8bN5I^Z%hRAupMY3Q%xH5fMqC8 zRhh@zhp!@LSTEx=RbfA7MDKF?9`;gq)`}zwOD@z&w##mi=jtQyE_24-XKGNy` zxP}$}Hn188?{Bn0rJ|L=3cRx60+v%iCw9(DNA@sb5QA*fhVRbzFab>*{q4rNd3>wRR4D$1?V= z41HTy7k<9{J!FO~!3Z-(^hGD$zh!>gPhKXJA1&X2*96J2!<~@)!AA7uk!4kIX! zyIaL-fg1q%5{D`dWk>UOkZDgN7@DOI_GP0#kT8QVnrQvhV?40o!U*jQKiaRKp7Lh= zUY4Dn6BktYHHkR59^1|`R_yae|DM-*-IFQaHHxe=W3iVqxItjvVnr6P zsE#lP!AfsN9!FyF_fKDFFb%?W?;&eYXxTlFTDM2pb)ibFvQlhc+kK3xR@Y{zBE}^@ zXb@Gk2-~22=R226Pq84UmrpdTZ{7qwy9f;mpjQw>@v;=H-T4rMu&JX{p^R5JKmH~a zG@t_{n`Z9wW@P}#z?vKJRu`%)3@vvHkXSxk@K)S!0pgD@v{IQe(CXeBPzkob+C|87 zD*5Brd8`DK0XZy7_%;9}>!s(kaydjlYUq-D>8+LyiY!}#BMiBGf6`WMHRt1f{P?_( zO`Q~Dd68*O!`V$xsc;aX+PjG=BLjiQpLpme$wW%2y3IKd&!v*(w%1 zhmJrXO#nvTv4Iq4Gu9VjXHoS1`9e`VMFis;OgPkjt%UtI|1tv-eBT^KlwZxl8&}K9d z+|MG&21WXs_Gh`_beI-PFO9f;sq1hEroelHki8hbh9UcI~#T?k9*Y2*YI;z7@iB_w>Z)goHc z|3qF5&(VAdFdu(}47(oRpIO`Us|8PJlY9O5r7`jM zBW@k{zg}e<$J4deAc3)y%?9NF1(iWq86)BthCrcUwy3K^1G@>>q={JZvm5AL`WO~w z7rxr?HM4u!3cMEY>2KDkUogO`o)Z_;tShNspZ=nF2r>7PG-eVYVyN?(qwA+78b^jP zpj^zyv*M;*Vr@<5WwAR7i$eQNqg-?#e#)K&fx?wqQ6U#0}#_bidYNe>FGe1a`H5k3f0IkRx z;UeKjx|`zc+!k5}yE3?x7_$Euk3nG8^?&yd@!G+{+CEeeVv>#cKiUI=@abHhaxXkZ zkR$cht<^%r^FPYl4&WV=!gm#9YvgVfCov^wjuJi*W?QhL!p-k|d++82V+&hrIQ=fL zl2b??7gQE;;8e~YT`?|Wm?s&iFcXvyHJk!~L3VF5)o7v&TMMsW_iYAa!Fj4g!EyNAptg(J=J@ z&`3`|v7!DfGq@flO<4$0nOz`crA8e?ubypW!Lx22!!D{VKtC}<+{b~b4$Rg)@`2+5 zsHGe~R!Ua?|f*%^d;n$w*+3xutya1aF?HlrY(NhopBT(McW^#JwnD_Z}|cGuy)R9KPnvpbaE zO!TBkEd8i&xQW4;^K8A-T=ACtCGCzB%Sd)(YXU)TkSXRVX%du^vX_4cJ=%J?A{XqO z@PQOchBTaah_Lu8H#Gv*_N=}NFy|z?_EqQ|VHxzC%QLm}48IF*d?WG1m}u^xy>Wb~`nU(FL6w~D8UgVPrvqh^c!$!lNz<^xjE2I2FtJ^BII`_W(XpNfne!Hp!3y(ljac_lD+nt z9(<|{=b2@~pJVS$w#ebWw6`reP7Vefh6Mp&*wl=cW`6>&b8X3abTeN9Wv7W}N-cr8 z(oC^iFBs+;0JojLrn z0fQ**j@)zUhiEc45cD?urNU)meniEhX(-bEEec zLiKhtiQamo6Xq+2$trk0f6_FZy6(7N_^AqR)7k2I(s-Gbv4b9)(XuRn0k|QZ*uC0< z%$)9~A52iz0es-yoOY_P(8MWu^m?O}>39wrtk&tvjzodW^^d8APtArozb@>kLb;fF zs~C2S&~C1KO^5fc=em1%h#juV;xKNz?B?BNUZaBg<9nK$JRfxYA>?4(K;<@_pOsd2 z6@W|+@%8pn!>_jyN%NByGY@=7DgFEb`Av=dcn_>7g_Vq!?r|;zzP%eWyOZJ(eMZ9H zz04HtOs2u&TPH?`|E2L=2Kn#Soh@_0*k2C37k7n*F0cE12G4g4vVuQkOm*gInjOkm z3L2w;6+FpvUFCtRnwyo3|5FJ(@xddpAnuJu21p<@3f@eB2Kj0ZE~L~Cry&kn2Wsx) zaHl|!9sTZeK)yq);a-8c?EO7kfb)eN%f$#iO0E1F+}2~?-^SJ`li}lXC9K_M5$n>S z7v`OBaTwQKS63J&Cu^i!pdIJ#C?#Ao=K)H*>G`ZSC1ZVWxDijwA9*$o7+Mu>)@hh4 zqIs}tN~s$a%3eQ4Y)`USS$iDZyz;xdd~E7p&NKKA_Zn~d>Tb3FmRTS=kJVM*ou_vp zY11iG6>9LT118JuYauj&DsY8k2x}sGoDm?UU9+_l$8k+`c@f5GB-*X*}cNL@_gwft>Rd) z(&C_LM%3tlHz^{@r{S+D1+StT;;cE27fy8mE9*9@AoPsS;jiKzgdcWsO12NRF zU|!+ddX~68Gyy#bk>fu_enZYFIrqgB^d?5LeD^mI-iO6u3+{}KiX(tPX{VbZhS2RY zdfO#Sgoh{Z##)T;#u{gq3rmQkl}-kXj`7noht}CR5A591^O`#?#l%xnj%#r@sv-$2 zxP-s3X{#V>w?;33H2!Y0^7b#(j*~~x&SF{1#$H_1`5?nlZ18nc8W3?1$^s-Xl4WJO=VDf@W$1ihh&0JGe<8 z*ae$|ZoS)lCM*bF`{`L1=<~9FT1RRTkYwV<)?=XejotAu4sf933 z!ok-~0L3ar%#mm*05hnnKu{_7#=5(5lqX%hswz z7HL_mqgVEEpbmEkOVVf<7>NX0It)b+X7A=|C)2Yt>pYiQm&49gVHv9f&N>uM7@! zWu10qKEJ5ZC?+(L2=;*6(QLOepbnX^HF!1p0E984<833y3+L?z8VfOK+n|NYh;u*KV9cE1M#^$}1vVFUz5f5rCSE7j zd>~RT{w_~4PSfI2ze;kywBN3A->jJ`PCaoG%STuD5i90TS^tqVlmFBE-SlkX9gn0c z>lbQjO6vC4_2X*i4XTsVo741rB(Fw6!JS)7&pp92;X({8IS8}9%0##uzrMNFc~|z4 zs$33*Q>$pHD`JbVlRm;6BFAnOoj#) zpSiAx%sFOXQrHkVa(ltoFv+vR1}tkFO(mkm9RW|_OhJTCbks=}Ht2D{mJH|V*_ zSCmg-!*h4}QBjk}{akqqL5f_iXuM@|Rn18(;3y}_S5;kdFzYt?ElBepO>T`DX;rC$ z-da^W6R<|{M0Hu{C$X2SsUUdKNpS0WJ3mK)4EwfM%%fF|GdFjc*^MTlY zsmN9ILzjJrpWWQ$1I?OjmD<_@&zI9(bxMQPT5aG&1h+UCXQgK$>2RrW*2f?gd6Y(f zO>R~DVX-O3UNs4>^%U)0wW@B;u$*)qiQnIVrTWqhOX_>8&h(H!Ju`rEISCpu}>l|ph zRN=bZkDg54ks8a*X}p}H=NJxMP^M1e@SA|`r5lE{=rnSWgTLbT$JQTM+aTF-(R9Jt z)J;FI_?(gtO>1MtlFjrJt=b8O&OS%y9))onw9}PpRYCqjXaD}V=~Z{QO8T=$kqMCn z5&ZX+#iQL7Qu@BoM|7zI3K6{I*!4Zmm>I&%S~L?7ZU^s2%cs#3^inCugB9rU6^~;Y zao4k|M>J|2NhKb-xqJH@*MYxI9ya!HjZm{gC@jroS{OE22Z_xo7nSIPvx$6W3wE$( ztA7mYNWK4q|D9eb@Qi7~cvvkP_xXM!e$cFR*=He3bR9aLV0^C$=rVkgN=%8p;Cf8z z3+8ENN<BYfnv2h#N z5c9ml7?m})B<>(lBO@zK888?QDj8M71Z62gjs6*gs(oo=M=h)_Mtk68j571eM`}n3 z;e~Fz+jh@vza?&E@1&GvAR)6$TebCXz6!i?j^e2dZmCGs@%vkX`S*4Uy+T&ua}V}# z;}1#7ip)4J1|@YeK6%J)vOD9oi@5#pMx0WR`Z?6xuCh(TR?rJ z)AZqdjg9-qDC1!H{@Vyl4$;(w#-WUlFrG1|JeP$1OD@9F*ek|+v@$b!IAHYUpHxh8 zgwAi)z=UuA%8zyp=7HU_+{Md~Cw^i99qrSLRKWqXgR- zBF5Tjs%{d_B{u#Bq=zd%*GELX1hP1p&u3j^BND5VkKcccLfrn^Vr#BR<$o-?&D4DF z&PX^~u4oju7izTi2-~$dU(FkxYprW%1}39xEhehpL@EWfMxm{^+2w5 z*Vam6FYP3ShJk31J`Zaagq9m;T_R=wRXa@%8X?6?5gccBYUN9Daum~}D zwCt8KAjaJQ!U7gI2y@)&(gI+d>FP3&bi#VfE_&9MoAu1dX~2XeHHHo~>NJ8HQVtmU zml^?Ijxa0)v2@!%x7#{Hm;o%yya{lm0CzV12l(djc-VUkY{JCZykr0`B5OWr{xEAF zJoq@zMp%5x>?M(KeH=c^|JdbZh=g?%1_BQ~_fw6p*2Q+$}wANsr6i0Ia0gubn$aP|TYb5kph4GDS>*i9wwk&1jclrs98?{S3b~D1r%$XV+oylNT%~kG( z&Z<9l`Hl0#MfTZ@eDny++$mSUtf|B6Sac_pdB2tt;(FRwdgVDkhwKV0?GA7{rM(=E zQ()(?^%UX27~N|iDRM~Z?}KVwfaaRc&tAZnB2YYWQM2f#d>T{^Ntq457BD)*HB%nUPk46Ey;##ng>EGEr{jeUiB1T?t$eJ;j*eM+N| zst7M7#@vtXF5Bl9%a7$o&@!FJp(e@fJe)s1iC*P%qdeVrE)h0Az@e5l0S6{=7I-UJ z@3r!|x7ca!he8Q3#tXv3pR$=T6sEw)^tMQV5bz%qBnxn^>3qdapP7P2L?P_@1)aIy$0bJT5N~-c$RUa_sDN)!-Wh(P3 zlU$xWajDmTeVMH>eg~`bZduE-pwD||VTO1{ptak5LAtI~6>GrCV<)(tP(UsK85T^V zMHVJ*!D}D$ixiB||1TvaO7pNQ<@*Z|iql2z&ahSkZ=9<0soYU4D_AqU40Y7wYz4bE zp<~+i#NFpSjD&CFI_t_C@8>5_yc#K{SqcUo>(cb}3fyDoE9RL~bC~G+@WUEfJ^n_| zSu*FRnTP$yJ_MnJFL>Q>ETKDk{QM%;S!%&RR5UsSCT*!fW6KJ%l0qHN zSC(r%j7U`-9^!M**qct@!3~e{Xy`}wI7n&a;&{;`N$3fwI<}n)jXtKWXTPF3@T=GQM@F%!h>QEIIHM@9GyxfvIU4K02GQc;E zu9DG`kKbzAd);?|44QJ1Sh5XO{xn>k{K90=^I85IrlrJq_2Oi0v`S>P>y9`=@F@L% zi2CZNsM~03x>LFZldzA&3g`ra|d#@)H%_5P~+WV z>edG!w-p-ix1|ABebJB_w(3iqykc;7`0nV!U-Sqp9hCYpJ*ClQn7qD`FC;aS`xZQ^ zo7OdH^)G^29TJIo;(##cqUOJV{w-^3C`ISqMqGm6_87mx6n+H;%;~WkbpLm1jlc~Z%Tkb!|r<>#Q(U9hEKszVtGr%~`Du)6$#j-NKL0E7gVqskAZ1XIlwiv>`v;K|M{ zYaSHKbpsi+FKNo{B80k-vNF=?T_G232oVGpONv+D8=7X;)NV z0)2<6wP~2+Zr|DIbvj76gM8R9dmRgsQ~i2e>t0j4MyocESsb(wy8WeeTVrSvF0S); zq#cK6OMQnVgEQuj>GC)C`{%dh&>;S&SSRw`PyzRw-V##}pop#`LWRCUA8(%(`M0Se z$;=+z2MEyKKf)`!7FNYYhGjb$?qb%Lotlh4D73N=%(GMbLt_{dGqRYMlSjn#ufsYj zudo>g9)un?8A;EVsE#_`IC`&th~EM67K&h9?ZJm&C|TbK@xagL4VaOHbHuAE6U5g$ zpWs-5M0+Fi_$@qm_wM(HD&HKnJR&fjytA7BTUW-o=(A`Q7_Xw*S2ZC-i5bf|9ikH@}b1(a|xS zvxBO~YR@`>g8+nm`+(u{8zEF^#jIYs0f3;w=C*=nk>n#HxQaPlzcz;@U5t2ufZg@@ z-NMKJe|c>2YZi9=m`&Wqp%X1FGiq4cr#!l-UrS?6n4GY5Vuq#wZ33%?b)JlFCj$e9 zwi(y%yE&rTLro!1MRBeu9K$H_Y2~pq)is$|cjuH@ z2={o#>BL6WxLyetY12*p1g}TVk+nu3{OK1p8>6S2w2>L*Lx3-#>YNqYM@h2O-|z5^_!CI0#RIPfZy=HSS=KY~!7a*J6nO_4oIt%iq+1Y!URu@f6 zQ6te~jB}3HD>^yfNy6<^EnV(M7?{k>f;_Bc&(G7AFqSk1r7`LK-#t#?tT~E?1dbzH zg!|1U2kUxZ1>N=#F@^ohxH4~uv^RoukP8oNfSNmP0!9e~ZfGyfS4|J$e|&}0|81+m z=p>p~x@R9DLWUZeMMWj4rnj~(sS#03Z6dX%?XB+^{>08(@nUO>5W4+JM1g1u{iAOs39?as$_ckD9hzI zf}BCVM{oKU1pi<>jOZUT#ZXgej9j7D@FOH3bweP4z~I^rAXy;wFC1VMRm6* z5JRqWFZLc4ffpo(yR!0dP$@7;b!>zD=iPnb4mu_bM0#2shrut2^%J~Y1r1aYY#msm zVJH1VX<88t(nK{ZHn8==t$Kp5`}c#~dkv2~ISwj40%iegT`WfXPppd#`ey*cMBgRaM>NpoK6m^+5ELa!&c+gaZi+!V9$eiO5udK(NJ;005f8ocIXu%(8=;>e$q{`) z&(-Ie-auGl@6g4tj}GD&eoJLK+3IeQa}yZMdQ0#2QBNIbE;VpXTHR(W@JHQNE;j(X zfZU%R{TSNBQh?QcU}J?wBI+&{8>N8t)HTw~^(83}LHvPy=_iVYZT!9NHe*T=fGUS4 z6PpWV05DeB7{Fuv!h;v{;v37FQjCds zCu^?$hxH*TyoliNLT~n8`FhZ>&3>2$ocDt?@fZ;b4}>|aHX0j^E^<$?rf&BOmMytU zqPxOe@pvjR20*;VO~ML47kkC$kasC@gUqlV(}nOhKMGAn4Mna{nQds_r7f#s*Kmv5x1UuDE7o>{6(Q!jL*{eo7sJ|3~JzX(JRd0I5JJ)dwb3ei!58r(F8#uF&rW>8wPLJZu61x=mCR1h#rHxT1+V z)*kujnG3-(3Dj?qJpZ*9Z(M%5A7qlSJa~;Ne2>X+`wd==krfzi3y0h1M(jfc5Hnuh z;={;a!XQgEpGV(67>tFu74Wm7qAH+fWVqn!T9VSItUrdgZ|qHW6O|6MwJW_N3u8Hdi7G+f;I`T%B`+1U)C=`PJ-vi);9w$D`j)YX-;-&49ny3OjdK28QlBjtuZ z@chM19bVDK)%pp^BMPI9av`eG>S6RnCgNOSdH>;uLZIfKRZ@9(hAZy+5P)@KjGk^G z)G=Mi3D&XY(} z9alj%>UvM+=fAJDwKtoe<3@_Uwv*XCI*X#j9sGo^ByUVVjYiak@Zb4XOFaWynbjpw zvJtxo#~RKy^z*&!{LLuWX$qTyrR{{?((aw9yTbB~I0`Yk-p`)l4jNlcHmaZJvoEqW z`ObgV4yPoow@^Wu&%Et=J%5Z-UGJO-+n!x?Xu%$}ynV@UtB~Avasod5hWkPTZY=ek z`(o*6YHJr%s>Hc5)i=Kobj`EUCqOr@?>Rm)wt_wzn}02z>fo|}Ik3lTPL-$7IaFJ+ zp2()09k_|{z9Ogs-hLIk`;Wzw%xb~cNTOIKx0z_!o-I(C?T9`r|FY+9NHZth82f&n_A>t5H+(&u7oM%x_|<2} zrGf89Hqv6pBTwR-FukiFpM>5@VE_PdiFzs$KOfyoi1VWZIZDU&xCY>HvmAd4L1~}N zJ}4H6aDVG@<2ha>7{5}CcygxzoXFQY@=hPgmbtRlIO zzk@C1jY%QVr@35|Ef?>EhQS^6{$y8nNAb}&btc_|&f$NSx~k1LQ#@Uo_{ZHFPyDnQ zz(hKxg5+xG4Lk{R^B2_r&NctXDjR&mv~l&L{O@%y`I1zD(Jvk@ay;x#35)A5#4sb_ zI&v1xyIg+l1bE$A_805(3?)IjerC_DOuo)4UUCQsGrer`G)lVCsdHAFD5OGbDD+#- z?2=?Ql;_ghAh2W0B?NJohO{nrLo9I;aD9XXr19tdRPp!#R14z zp2C2EQ=gS_KTnM>ZQL^?l1mD1)1bnPtLwVz`jr!a`R&$e6zYsK=-feT5s<$Cu zVA22Dx#6Y(zeAPP-_>AGSh9Oq^~4PPx5qb&>|gy& zDdz?e7qCv_S@`;ZX9~t@6xZ$wEDZ?72c6fqYteksbLkOdj@fkUaeu^q${ic|NsRig z1RExveN#tqLK61+h%u--T*GEUK7ATawz7<$oDp41fe@xGXJ%M`3%r^jTtHaXP-B{) z!Omjg%(E)5$_5eauQzGl+#_q_ogJ<5dtCb1!6yAK$_rjstFjK}@+mw~@r2(G2Xt8< z;Y0((<>uqcqy<-iM!UWoCE1{P#K=8pPr}7^8IUBLewdS+uCQF2dfM&ts=Zy7{Z!iK zs`!miM1(Se(9`1h#~hQhISRmcC$X&|7NXj(VmJru5+TeDrqsBetVS-#7VrlYYrZc7 z!W2fkPC5a!)kTtVrWq3wTTN<=jTIFC^cK$bv+W0XX#J4+H-Y0hGf}Ap91XdkR7iDo zaVHh}fc!uycx6a^xdhq2$)qSE=IsMNQ{?(jBpgtE)zI2r1HzGHC7k|HdqQvI_`!BK z?vieQG5b{H$&~F%Dqkyy2PIeeS9*s5r?N)Y9ojFS)!H=TzjX5N2gl2x*h}4)7h!Iv z)OFJ?wzzGTvS|)+`3O0zJB4@Ebp7}iq^Ev0AzbEcIa9bc6uC$1**BDf&B^QQgO+W> zArUQ|{9&$_A#bv4nb;FGW_lD8v{0JQymY!j7H&NKuKQs{ozp>*BFg!>C8P%l)C|Mx zVRI$}8UV6LF;+VF0L{sgp5awM4}{qY`Utiiz8Mq{?-VnXZM*B}H~LzxkN&U8i;OJZ;(-R7(5xk1J6wq!eQM*VFEwr`G+|%e{lNWG*B{u(}(5=}C)8=Ehkv;1Yq&r)( zT_{DD8*jUqC%o#kL&jtyUssG*&Rm#81mvSm9#q^-sr3`f&)N75ne+(w&YEB~`+P^H zw<-xD@fod`om23YnJU5{k+wcAToBQ2KYV5RyL}&kn)X?Hm=0t@ZD1R(b<>Gem=64>@)J8*$oy|rMSVq86@}N^=W#_wj>f8UE)5Lh zc-YJpXW&s$e$UPGBkXXT0J4~Q^sSBJACypJNUrM9R)ptjQ;XC+W%_j7XAp`2bAmMC ztMiLZLC{0OuaSd~j@hZEL3M{4Y82 zYE39sk#U5BrN8t}dMcFpA%-j(uPI=4AM=L@=az63tQr_=E|&;DM8uyLPGb0dz;&rb zuidLXLW)avqfZoHnkf$=F!AiRS>&cjmRdLZGZiCH73*;FCTIe918_(-%gx}r4D}uP z;g#eGeTKl^mj7Nu$)jEjvjf)>T79_Z?sG0t-C`2)u|WJaz7=1TRCbl{z%^nV;sF~O(;&`~a5Q7jBlJ=)7lO8DZ-v)$x!!a*vKRAf z19Ktmu9T%U%POA5Vo=~GI}u0(Q6kSEgNPuxBARbH@)h(*P*apQynb!GRPe z1Poj767KWdb<8ZZ3Qw!U|uRvW@5jjF|H~|HXpIOI(fkf*kWv8(jtm zzF!G`%P28)r}4X=d`+tU^Y4_=@3wHd&g6UsplMZxC7D-)P`ZV`tGoKj%F2q1hp(9G z?L)6#C&}LWXWiK&E{{IjtS5Nz3Rn5L_Ht~(Iq1EiClPN+_jNO z+lC=WLiBUG>$e4JXcd}}SJi$Hr${TNJ%dV`QQ=>s{nNFD4v8|O1{#5;zV7k)Df5U# zAjgL5WYp!gv@meO1&$M`7a?dO=nAOdXPun;Dker*j5nBhue)IMh)R#u>p&~f=2Tyo zrQB?#xP=H{zP!thz+~y$zt_VD6MZ)#VBS3x!Vu2;@yfKafUBGQ_7D6km0VK`19@ce zGX{Pg_$Cv(NjOgLskOmgLV%1edR3FG6#VlOZ?V-+CqB1aCOMkY+q3S3Ao4iC7mw{NnV8l{m{iJtIALKJO75&N%WhVa9E@uV!Oz7<2mzWR43najA-So#!b%eB6}Cab-KW3!L;}XI&ERV;kHhIGWmelV2_nbeo8$+NB{-3SFw3hG*E~ zEg6F&CLTv>jqiOAYfjE2sfsxCTh}{20~h17B%PT^kpyhJqgeK$ilY9Ex4i?B{<0Tl zqZs&XtJ9V4VjY~-K^+JHyMB~;-e_b|L;tMNB6k>`YqNP8*>Ilji1r+nC##R&hj?1N z3~k?XtB)RU1H@x3rgy;W)BJA%9zx+T?1lsFP0d2hPv5lERqT*kQkv`}G_0Y&E1mJ4H+xNrU@^i7H=Y+SN`YcaB7kjmF7D$HZQ_!4?fO zldL~rXioD?)aGH9UZ;hVjAe)NM;st&MJ<64ATgfzUzHHOln+km;pTQV&hNGZtB{kI z(c*i5#gV}Fo(9S{H-e}yaf8AMoeV1rU7kNoDCJ3zG+q?qQZ%7Yb-`G4W%;UykmFLB>X;@$#ByjKYb@b388}^f+sO zQIae2H5#-uNp0vY0O^$k0un`t@Zc-IMDk<%*ruqpnqbG;>V)r_>XcDMPwMFbdhQli zVWIe?5Q~X5-n4pP^i~iUtN#1~dn4U*1Z*{c(z`&32}ja-t_m{+X3mmCt66=^m}Q zBeKb7{GRlBc%=u+Ug2)yDcAwH?jaJ8)G#W-@ckdT?=gh!!z3jt{;H0wV#M`Zi=Gq~ zG_5YY$5&HzJPw*hy~TuxN@ou;{UjT6%!mk}a6-RVi20rKp(17?rOI#_J0X%nPLEl^ zR8rq`vYA1>Wz|G25-q>KE&Lj6*=jhwpSN5O&4itFlea2*?zKE((Ctg46G6ItZj4jF z`G+QgL;|I!t@p2<0^2xdk}nK-)kJf$SMfeFzDP~3X4ThBtzg+WS=r9cIbetQmg32NArk?qJyS>Kl@&O+HE7 zIqGXF?zV7VamGRO6Q>1+KQ&BQVDV@cCKHLjPkCPo6`nyFt0R$U0VNvy4Hqd%g{=4_9+#6@ES!Kwrg5$Rp#86rFPy}F{S$Z=9tPvLe?P{14~>WplwOxUcyuhp=4 zVLT-i3%Z&RHJH5TZBblO{sxuR5Xq!d(pu1tMO;0qy|CiT?$lJUu}sTqZ5I-l7Q(Gl z+<)SX*0lNs^Hv)V_{T0z5uj_>l`LZ2P~m67L1zW@QG>}HIO6S6S0Z~;5^_|ioJRKi ztQ|5CV22YXmq*C0J5NGB8=kznOO!}y(><*0?HMmbEiHh($GSf!`uY8PO%?BgLgmq-oJ>3vy?1s{(h|Ml|re)r4MW|0V~wwhN&s3wYBs9)qQA0go*tLWC zjmr>qdD5CTyK`{&Jv-N4<+b;tSQeu0+ryD;*35s2Y%OWCU)+b7NXfx03l<#W|6Hf{ zcE+o@S5lA;@4biBCwJ7C48FM6rGCt4u;F?3J^z59MtDb&=MXxj&QhbvO#vjd5rkig z{b9#0U+ZiN7+KUg^eho{#UH3@6tX$6VwI7cb=?ga!wUc{QV6u-eix9#`cdrvKobV* zI1Fg8s&)_eB1y(OKkFjj~TTp700AD0_KNdnX z5QUEj1~oMIplxG1kDt(k{+?S0Va|J}cDVcC@LkWh&v}~6Nac2Lm5&_Ea)s4jAHT5? zo&pTpp6&>|^Q&p@8k&=I|zljdEL`j<|W%`;2Y5cK0IH^Mu3MqXp~A1@~8E#Q<&YgsQxA#AbvBH7LL~XMmZu-D;g-YSmfka-!rQR zAFsPo}*`R&NzEMgRtmN2LKPmzoiKNEG{DXdY!=%AO3Jb zp=Q!`!BQK>-!}!XGbza$R<&6+SPxH2u^YkN80JnNfLTyZZQ46QHltMF(j0Efns>ll z6zeFTDC37q_f|y>aF&6(0|A)dV<;UPz!^I$v7_3Y$b~OwqF06(q0l0MMyP2qa^Bp`A zdu*8djLtK?2y=izobhohrY)7KJoiAzjaU23k3AL@P%_os`TQlq(4+kPS=>$?M^CgP zN;T*uS&wvDdWVc&l7V@(5&VW_U}W_3U>=``g&Xhu@os7+uC2p`%f%CCj=fR!EzB zwDP|>lbC}pwCWe9cgQ!5zWy%Bxc1#r5v>SMhSly6Ttqvm4`C#Wv`ziy;eJZ^D-%U0 zhnqXP7ktg@1GY3>OjDd@|E-nm3&p-ix_i>Pfu`k?)&-JI-eB@3O(^96tN`? zS2dF(fIIxDJ63*T5o?!!Qi#9br#=qXH|RA`x=VNhSVDSK4<3QexybB}zis_LSWtic zLBbPAcjQk4=?W+1XY+U!~ zM?{ZJLJ^XQAZVG@95 z{R8p(5Ysm&gP1?4`Kcm=USMmtXLvFDpIlh4PF}`MB%su&a@VGahZUtE9)K9E?milC z!9*fO&JbyUZZ72c?{KI69{Z_o^0P-jY2(IeN4{$Y>%8og-gL71jU&;u0S+j5uf^im z+D4=(ZQVy62UN^Uk=(`Pi;q@MwTbf{Pl@fny`J%LejRfJ3jKZhyz~{+b|@mC=9uuL zmyZTZX5Rl@b7#w@x1yG3X(C~CbvLlTOgfeMr_uR2%UshX*G z!wSC{_Twwb3yhs84GRtQUfF9?OAxW|_2|+_i~#^3z{W{DrsxrMNa({x zP^L8jYiPExDcoB>>+s_PqDy+%G9NUj^@W@j2Lc2Q!q~3X{sDmXS;wWM<-4m&d;b+~M^1nh;;pd<$jQc|k z`aiJOux+D&ra-ALlv2&#BO!1lme zBkD`MJlp-#uv7g%IyG_yP_8>RtVch)QYUUx&k@5i&D+oZ_!4UE0y<}=E=^zgy1su?< z-RGP!A@JyANY^GthY~>6u9d`}Ksp79z}fHNK7iDpcctxJZ9O!n#QM>q9`|(>p+#x1L&M9TQ%q z(I%2n^u3u~bvbT8O(8F;%GdgH#i zb&|OD+riiEY9#Fow+3@RIu!euebwUioN6hir!aw1r*4DXN4T(6O*o}dfatXq*EWIB z5lM6zen0NgRBI>Zs{K(&a;Cecz=V*mgu?u<84`Q;-V$($IojR z8zKE?)ee)|Y|Q&)Tw~K-uOJ@sgN%J?GQ{=y1S-tKaL^{glZl9nUnmNUR;MXCLXt#q zx~}+tccwwV)-KgeoB#B@CG4F{CT=vDi0l5bb`l*~Z?Z7PPQ0Vx2O?7AT7T%O@&aab z9A+2u8HfeG57Kev$Qk!(Dbly3IG-}Anf6*9EIP}fGHqm9_zP$oH{{RsmR$!rikv2m zJU<2mqlW($Ppd>krU9_*YYfR^2!;isZrcK53r2{$&y~mN-_@2EIQj;Ic|ov;7{%7Bcd~p}Uq2e^QT^`#RrUo@ z0qR=gRriC3BNZtKZSZzh{;>?)Utd{4frzbs5i{*UazEUJO&8J z@n6#SRtm&!{L~G9qdoQwmB~;z|14^JII8!47HRe>Lj(EShUxNa22KMC zB!#zMr%1}&pQMOTV8l&TM%X0heZKt1U&yy&%IA-s2hgznjB2e0)P>aFZ|aXJ>y(qsqE+F%}wo5r$(ZsO|f)1mjcR)%0le!=#(0j!{~p?Mb)SG z6wzwdj!bDaqH%6Tb!R=0kufFCu)xYel1)9G03GRucjqPm z)!FIk{Bfbd2ZCi!|FOwabf;RF zTJ(PW#R7$^Z#LUkp2Hnc02ar9#aJVhP#p!#e)UNk4y3=sNY*jR~zc>p1D#&%KHA3ukVCYigkwpu9(e4}RZy}|n^ ze-bBtE)8^byQx|H#Z%eCjFIHGM)fiZ?+xB-!4hc#01orh4|@Hm`D&pg9}Ll`1d5*u z9jDby;(q{@m_iL*R*wQ);yV?83>cx#1uu66SN{0Gs)gjFu5LwT>KmDhH?Q?oTw~~* zXEMEXg>*>)((5E!8&}+32xA`RyxFwUFTeKXX#5WaJ}f%FfBub6-bvj7xgYw;aC$GC z?)}4&e}Ln5m0rsD)4}4#=&@E*K%W>0d$PsqEi_L6%`-WkHVe$dxmYCiSb=lrc^N3= zawAad26X)f-P$BIbr9zs1>jgU=idL!jWw&voN#;dO9h)5>YN2T2WkB67assu5^)m~ zA9KaaOtBUbqQY2;){+`};O!M>l0S~X+Yj;oax%4B%PQAiO%hY-gY7PxXCzsh@`hBi zCH%--YP}S-Fwu?@giJu!xgILuI@s3w4F-KOxmnhq3SWy6jnPwO4QL&J@G> zzF*{8L^XMVkg?(*z1CXOP76$hz+M%MaF8Jlq1W9MufTlE8u}trFd2B%I5Ljf9^)2? zz>wZRDlNo(hl~CJ0^CH}-w7R`hC)5IP=WdzN7s1fpTE>DJ;$rO<<=q1p$~hU{uBX0`fSjv-SM&Yf=*rnOwsQS$@uSfm2zVt~+fzxUTbFTVp~?Lt`5 z0>mghRDTVS7ex1p85hr>{Q7%IEoZUlb3+y$?kD=g+!W52Rhs0ur)q!ZNJZ}%-rf9zA!|mwairNgd5JpPBzWUj8dpX z*>ISkaFDz;>IWYABGC;#xu)bU#$Pz^tBU%-|5{x&DCfxPjW?_b(4E6%SX!xprX+ES zU|IdYjjk_cpZPI^4r*_34tDmlY+bL^~vEi6~Tx%hUnwr{-ZePpRV(%Zp7@`?|-d5owm`fs4%{mvJ{9U+{Tw4KcP1t?Y z@=elT$YGW$>BN*QX-~+S^E&djN%@vV_%|ewIWxdxXIG6+z2iApNnN8{@g!eOVrMgx4d3{4n6=$5Sx!koCPE z_ghN3mJXnj(_yasdkna=mjrhHQz^OE6Tq=vnw8ArJxnR7y(99KMGBC_V@(KO|FvS1 zn_VZM5*2R#vhVNw=yrkAx$LQv=9Ri`$AF2;26QTEtp?dRE&M~a^1mxk*L=6fG=?fN zSG1E%F|e0VvSJE0TBQg!<+R3dHW|scB?`mq*3mAEMxDee!~@I5@)r=cre1WIIBNYf zAJu2L4OXglFIIij`X!ny%K44Qs)(ig!4E=_(##{>oL{YVm7cz5+??~pc{Xaw-b3Gm z3JZ2qVE*D~q<}Wse(gp&Am}A8EeyiMl;cN+soEY#P5-^ccPPaULIPE`2>nSw-dyKD zWD7B7p~+y~v<_)LZ$fA)Me)8iNAied<3|segHp_e5K?h6`=79 z3UcBy*Zu8m+}<`+o)7?m*%&L`e`)@}3est|q2qaBsi(k7XemE926 ziyill`QJpjhk8F+MK|s?XJj{W#K2FH-BpEnJ*u8aE~xYP2d7v5Y~3puH^eh(ywAns z4s3wn3ovQT(V!7};?&tIGwp8P`XZh&vB|d>6aDK$gjbXlsr=LCj{&0QCVvk%&yZVs z=@w-KsI6iM$zdCA)>nHfLFFA|Xi`=Vqz1Q=Vd_@{5{K%%Agx~pd#ES& zzErOSlEAB3-OYq5m(QVM^CrGU5hNg@^8v0i<5p9 z&J=^Sdc)mR`iew7B`yhr!w6Rc)GY>8GrX=H`Ax* zXS>yn&TGi!-6E-U_W46~*Jpn{%XmDqlES99#(FvPnN?M;N8LRR-F8-HXlvKgllO!6 zLT=g4H>~lcnnqfKvl#Q%{Bkwpx^%Hq&HH4TQ+cY3Nbj>ze#9Ya#>U(Z5rKgW!!kM! z|Ie_-;qgxb`xBwbQkg5mt@@#50ZshZS^!lV@j%AZQlwi+X~?$nQ_3nY%%C+SRo!~O zIy;1f1@m;I7cGX?7x0OS&UnZ>W8nM6iJ1!~MM4Yd5as}&39z+I{jT1=YJ9Y$Y(BFr zZK`C0z@?6eE~y9RGHaMGj4L%99NkANoxoCIdv4l zsug??S+2tCui`I!=lQEa{qejqM^1$LNeD0S zUe0VS_3X&*G0um`=FmJ6{n$ty5V-)3E8<=;>m){=E1TNrUN^waZ|u8u3^;5$qR+;S z;QRk2UQqg!n|5x{>~uf8w3Wox^__gxMV7{eBFdLnbw<{i_Q55!5@!4LE|od_Rdm1yeg?e7*_u-*wCZmz!*GNS(gS4i}|%L#%dPW8wqu` zEMF@YyWSoj=@Klq`n6ASsHDOC!7#d-^QgAQK!1Irr)VKa2bWCf`SO!r+h2Hr2MKlu z-lX};Et`0L`ied&H7gpcZR<(J-|pg+FOzz!nv-*cfqo!Vwl`OWp$TWWkhi<+ylpzt z3eEs)tTOP@v^+L8J96MZS%lFx2OAt*I(faW@35*g``l`nTlZUy0>vQyW0Zvt6!3W+ zGpti}%Kl?_XyY-|0Iji%D}ReE4oJs_(zCB6wnJN=V`jVEnSRTXEiKjw&RvUs881jb;@a;Ll9?L&K*Cd^!IR`7jM&*c_fuX)ZVWr_pMol^PU#t)HPU z>Q>kOw@)g^_Y5W5Kflr&uLA->&QW|kjf8A$n)ub;{}8|MDW2%Y8s@H15Z?h_Bv<4J zjAO%P4ev0ghRR5+yz!eIL^bKqLnS~<>QXEaYwsx6f!8v4{p9M+{}`|#A+h95O|}Ke zVg8-;?9MGU1|)-8H(cGuthajBfS@iZG;kebtMcF6i4R&Vs^yfhDfzBnu~-lF85peY zh(a^AF}Zs5O5sgyJVV0lDrak7lM%qP=C`8n2X`QwFh(wXlhYx6%$ckEXxc2IIQP}y z!Hj0k=F7np4(hw=nsoK2=53ATw~??L zr;PboqK}MzO1|)MHfm+e->2MB9f{Vdp_+z~w}6p=PZAMODi*cR{2NpA1~Y?bY@WloRe6{q&A~(q!b`xi9Ir-rC@I*!N(g@)?dp+VUe7# z_{?)eBrtaN&s1K9fk`AXmz-Yosh0bE4F#MbZXvrY$K}@T2WuDL(Q_GM_{vmi3@3s& zxM(WfZJXntjD$zCSHJA2?rE}AH6>qV}1YI8$&F{4w@eCVeo81@Kk*YVdLD;Rk z-TrX*gz6s+QFs1&`t=4ElsrV=wg}KMuTq(eifn^C?g3kX`(z*L zW#C&w^68>TbYKnVww;TCQd`%S4S?@_ZAvQuL;0aDC^VIM2d9Ryf%wB~ep+U1YSlCZ zBWwtn8Z}f9Jqn=_-8=qNQ>UEdo`KB0`TlE899bu|fu2yBbgD!d_+$ z)a}hIw7gnqTp8iv%Q$ZWSBaX6&=j_cnVX2rUWVZU57*l>(S%+C-gTg*Rn8PR%kZ!C zVX!Ci2PCk-5QBj52&UIQbyne-vm@YDD7uhXB`=HUqS-_I-`Bec#@bM+-9;SI`C+na z$u;DcFG2{FNZUUT6MI?#?rJY5q}Sm+bz*~vVnL4d#k(tKZG2J2#{S(v6j~;>+mM71 z;yc>6%<92115Z-MKed{2`WE|w^{IbaDET8mQ3(HJE<_7(1EKm&Ps{>fsO~3>H_<)# z$CAxtip_`3B7pW!&8&#Q#}loH#QE_<{3y@T?nE}m{p3W2H5-%D>4X+<4+ByQKgI4Z zP&#JM(-(Lf)1!1*72{_4fXruytO=Wh-jPl}cIr&lm(q8NlgF-&ONOHThoQs)p+|+N z;h&ovt6tyT{W83?RGJn~-OeeJh6pmk#Hh4X$JaYoL@d_+$*9nyi8Linu7mmPUVRlr zs6v@Q_u+&B=wT^<49pMs!AD{r@c)%Gn~MzRJyFi)8;4 zLRY(aC0nei8tu$%R7)0Td+?yNaQ`u~sVc;3)v`8N=G9v9#E%LVG1SV6l-Vawpw4up z021iZ&FuXGIs}A1F-?%UwQ;wqm@tCPidgSms3r?1_sFf`I>X3~1VaZ$57m|HHpTP zq_T9M-984SCZ=SCrI|c`w#cBB4ca1H%?yWF(dOx!2BkjNxZ>(&Qfm4EU?EA0&f%UX3zcEj1o&Wbu1e#^c1^Qw=Ld_G|l)|0xwNmkYxpoYjJ zjJQF^FY&Yt`INO4{m#c8m8g!qA(`DZ565_)G zI!|fSuBzE`Y+!qI)yRWV({P8CM2@wdgZM|{u0%dpSiM2QxcE8dO3$hWz|BjQ4+JI* zOny87hJWeQ0fE$#)=z7imw5=1)f+CHmYwQff_FuT**-QQWdfJ)kjv?83Qm*Oyw^G+ zwT}$Pu=>jT!_3JH4&~z--c0Ig-5A6M@g)#MX>3rh#77C`BW zf=X2cq$8+^NKr@#p#|v)MS;*e0zXB1lMW(8k`O`(C3H|}(oN_f0s^5)=>2{CulwG+ z?)}V47MVG7&OUqZIfFmSdrYUcsVvRm>bUmgdL$!{R(C~qPE~-#IZrJMGfKS(urxR) z8@*0cR@ynm06BWemH0Ea$G_vZY`TS2-S4K;PEnL!dBvRnqT$I)>r`l?ywKnK6UEj4 z!xNOJszQI17z+qaMOl{tCO=gRIgL{I=WigM(Z^G;ge|+w>ahX+3Ue}N_P9DUD zDSB&Ec2th&c4yJM>)M|Woc_+Jvn!lG!A}R+D^F7uk`ncE1SB{2sPCMr<}c!mIxS0L z?v@H$9iwkkOsc+yg+8qv%V3!e;uYlhj>R^70UFfjukIY@elNH;rCmQZtR|3JQomvQ zZMLH=K$Pgtc~H&XZFaSA@OKPzF}|gsXQJ)DL#J%Vrt7d$r8Ctgeh7CCdTh>X08wS> zty_2w6CH6?ND3Y~=&AT?w_TPNd-?iDK>3Re1CA8T|5RV=fA$%;S@pm6Idz=2=rgeG zdhZHAvOpsY5XcmBe{%Uz6wltGZn=q1ln;)jI*w}izzej;)$aFKLv z)1?$3auC+pyTFC)IQVhq(7#hxG)PhM1gpX9_oOoBb)SZ&u3N5RpTk}>%I{j3T0W}C z9^3S}34*yv7#{~LeLe@-p>OGac}>>5_;+V!zwDwBGx!CwmHsXETaW%0_45xy?ECoQ zMK8VZSvPCwqT;!M+nVL~`b}i0&$;yigmnaREI8wr{QG6>g)sHvWbM51IEWwRcJXnr z4)#1S>gc17)zdofAn>Jvvpw>3%ir$?S4_$T#sfpRo5F@p8}{7i-_GcaXl9kOw$5{T z;9t&j1DC_}yJi4S|G%Mo|0=LoIuRH;SyZigdpQqqy}WYbex6JR=Kc@;P#=I-55ND? zzMV@u78*w*!nl;gV5nkV=#_0gnO>W7&0)hYU-r}EP33u00?sYEOVD!A@!;XH&%xb$ z%$?;jtrLlnX0|r=tW+y*`^&2x>Ye9uh5U5G7l!rqzFH5D7uKOJ6|XUCSzM0{`}4Tu zJl=#)kJ0z~4XV6y-x+U-?B#}d`)SN8Cs^%@1PVv_J(&`|?HqX2<9i zl05%ld0L(Ud$GJ+B`z6hWjs)z!zrmGlp)7_Y9Pw}Wz{JvPQmca4q2P_jpWPduygbD zTw3_R!L!3zLV+M7*Ylq#zx6^1k8kqZJdkwRs9_Sa;{--PNird3gimCv9zQ<5|0VNv z)5&>_>;}=JjLG}e3e)ZuLheaJZ)8`l&=p}Do;{81sY-tO`91>MNk>*GD2HgE8NbVW zK7sktt~dOrJu_}EPm9N0feMyNoSXY|@@yLO#B4T8 z>F3S=-L*b*4SPAH0R-IFfjb|?fID$qpomO>Z;1HN8vRn0VV*{URZj19+=4BGpB7lc zJx(I#@HZv-!Ljd>E>8CB+sX%PQ2V!w)_c^Jnlp=z2Ep{(DcEa6-|#IzST*;%0rtUz zyE{T&&$Km|4ga#!vBKJ{^0@_cQuxK@GGu>G^cqN_CX{-4zbb|wZ7Qo>n4z*c54zI| zqN+Op%+pu7%0ie5^&`yS65yFK+`m}$l?K7`buK;a4sg(=K!1V}6>vK2)vNb_OR(WW zmJ^$*Sa&n6Esnr}Ng5jQGi{GdAwN}si(yf#}Ek~~o3YWe)i zZ+Y?rxY2DMKSX^8JeBy$`Q0LriM}!p{9Xruz^gg#S4#ja)Vg5>Oc~(1CL!f@cSFZa zz5m9Q1Vsd^JCndEMNNPj-{y|emJgBUQ`O=e-#OE7zBB5%K=U1^9L^R*wJ0)bagR)~ zSLtA-#rQ3Dxjda6du!BBzh!p-nR_wP%eeSwua)NPsf*f{>IUf8^Dg%iDPQ2peW`ek znbmI@DzmgVm?9ba>|$aiRbN-LGZ2CCPIr;uU3*~h&0kFC{;z3d)vvc+a>DFG_%fIz zT#c@ClKn{%b6yP+>ycYkjFFW|_X!S!%C@kO-An(;b@jeGP z?pu2^EJj%A%5`F`%%*>O(wp*g*_}+u2naU1%sM%<0e3SNXb{PFyaAX{Fz_t3tS{fj z-u(D(aTJ$O?P-H&-Jk8PrA)2Png5~r95Y7T0DHFdM^ewFt$Ne$CNR8(Vn(Lj zShq5JCToE&ItR%x^&rbJ13kf?-|ja6>I&@q_Ww|}B~nJu4gm!r?!M8pVoe3R-f%B78wd8G*GmT8HKsj-_Y*lkP8>F@NcOeWup z@@3f|{^wY(R$Z}wWD~aIG}5fT75G_(rkk4%_uk{4j4opr!$78%O?Wc>zojF zczs|HOPTdsNLDkCG0oktTVG>Q<+HEPwSpMIEa-b1plcRF6DKko3oXACIWJf|uS@m6 z3Uo24$%@78|G1X+?^0iX0#{d;-EAHG`GShtG-c>wmA%^In~v3sxWtk^zyEiC)vsgj zW0^3GlI_)$!XqKIAmU=dBJ;ILxk#4jlPNowx?Mi&jXLqJ2j2|Dk<^y=r&j;{r~h!L ztUup)&12L+Nk{J9y%#>S4Eq|fk%9lr7OAeWtRnHl@P!}czl>!0h-RNEYt;S-`hM^` zT94^vEwfxn`F6^JOiaoRdw*H%!9Df0Qm$6)C&D|Lb!nG()D-uR+$A)?tqV8E&@kOv zhs@>N$D^MAsk>hMDVLwnU$<@(IZJi7p!uiUgD#Hw{ReZlOK$)Q$W6tE%UAx@$M!z- zM<9!#jX<9N=uuCXR-I4u4D>Qj8JC!uS#q(r2gF<6f4Ka?bun^h4rH~f4;SDM~v2P|~)b2#!mJYyb^nrMiV!kCwp%>8&AE>)MpR+M+_@uRuQsUm& z_n^Wo+i!_n`_rl9Le1dL@!h7}Xn9~NS6t-LF+McXSFFBh#gPWA&Ddo>ORZSzbZHAm z0Koo2F(8|W{%Bz;VEDIH3{PIpa)H<(-wGTPm;f22_qlC?Jj2G0Q@oP+@2|thp!UmG z#s`FEgLVF9h8C&UFWS6LeOQML82NCY`b4bda4=NCX$Gr)C&=%~(DwCKJ@fX|wk?h+ zFMbv2x96|&$LYJjte4p((_ zJYDz4r9!eIFV|m5g?f$vTZb>v2@9?^?r#6A(Z427OdlweUKmfTaoJH?x0XT;q1f}-~HJX|kFxG#8``GTRaP3vKh*9!buLUtQnWgyXG*JRPx*V=;S z@xPz_l$#_xCxk_hKrRIU+j*(xb$kkmc%$~9Shjr;Ie+;t z8W!f)C}I3%Rb}6<-TD0H4^>bXUB<$I{N*iNl3-;!otz3#FvSbz-2oY3l0NVp^b-(# z&{wy(*^Mnj<&!_Tb+*wDH=YMxH78BIxi&^e)9?2Y#+_09sJGAAJvQX*R8d0pbsCez z#4P~B`31e7&6TKs@GG7{_|xp~nA$@K@ksv?omzN?|9^%>y@kM2UobtJ?yxj zUF|N-Oi80TOvm84+Oe`C-69_07AjQk*b-smL;vLKh)~OpxUM}3vZH=QSwqmfMbak4 z%{{6k#@wbYNxydW?8@PjdoAdWa}r10w0|g9ST`ah{z?OdGbmjdtUy6}c@gA?1J9@M*;MqvuOtR*7l% zu&I{UsTu zaoBQBV$2{ulGR~XPw(<-4JCqnh1AU-v&S??zO?M!7t>Bk8@XffXFpS`M6mAQY6xP|ila=;9Sj!6burTIZax)j%kSPH7Fs z-u56}ofxmVrZ81WmPO@hxS#HJ%;!}q^oXBrdz3`A_&>YxH*#w)Sth$KJ$o+^QKY|p zg?Q-mPB4U2>|ebc#sbl!?}fkT5rIi%;>{&QU~4>Cdz{x{J56tcRcUC!8kCgpFD~MX z%kLENU!p-QOPU#X(@S3Qn9XLy@|_1Qo3w&l&5NKBWIcm%)8Mo6%K1dokr-@o45^sKZKOYg zH`}w~_}8-ch|QIDWBW@vm-l}xM=T81yQf$0Qo=R+l!YRUq`wq;M^e%cS8IvxDo0KS z14WMAU;5Q=thDv@8MwXw)_p5qj;{wXl6!|!RsHelqRbw{R40-T4+TullqE+9E%_b~ z@IsnyXedF?;->k>P=Z~GRq21BB#g&_3WOFMf=J))WPv2(H2rD}TcB3fjcj_VnhLRIKHN=*734`?gP@(md>q{@vAARs5mFj#^AxvpbZFnv%{$|DV_0pY&u~L!C;uV! zUFB|~wZ?YEaR)o6E&}%qO7Ij#U8~dQl=R2mQDMvo-qC;<+tk8qxbTe9w-3@o9}shXH$7n1fN!$E%FsanO1;u@8c`YJ%3aN-(8~ z8`DaLe{iEotG<_}{Y!(Tj?u$9-Ad7HX^7L^6pN!h$8D$TUDv<<&OS641`L5=3Nvd` zp%Ud$hwI-EYf}YJE1{!gl*6#_5fO|Hfv7{ps*t_c;6EW3{YjV7fZ^ z9z&(8aW|CfH{5BMzGk_q|Inu`9Y@sU5C{ns@bA6!v!eE5%Ie@=$RDSYnTD6@JB>4S z_=Y!Jn-fBYWnIXv~^qG+EOaK2Y02;)-bzS$=Q2FKaCY`%15Q)zN_P&|) zSbI(V!8x0XM(7zN;@r$^Lz0!i7Kel zTPF`xA#>`nYV*m9aY^6R2_6UW8)*S~IpTG9a@4^p{1aFN0cSe8{6$6jQ(T7!112#Y zlV@2Ts``Kj@!A5MMfHm@*qgkbo_*!{-tpuyJ9X~pPuCx@QqRad$_jd3)bT@-aR+CD z;qjqO-E0$YRhs{*MHUBSWtnJ-T>NC|-HKlOK>3n(a2CZ38U9-VxY4z_uS9Ut(qq+4 zN&;;^$itAc=qOL}H?;MyN@;SUDC4^iY6howgIo`CZy?rFG`00p1D8{TJdQLrdYLdh z_$M9Kgxle3^Wj{qW;O>+p*)A=Hn9;(;h#K9I?G7e1q|XZ2^@AdQ^02 zp3b`YMQ)IN!HQN~n+GqJ;%HXPB%P;$SSOyNL5%c1+hnFCzr1x=!$Au^ga29hkL6!H z++oyj$$Wn=#gz+K`9k||&KE|dKMyB#>hof0a**0k9n3mg<(z*oRbQu5apq0Kb8Gy= z;LR2-vpTB{OsFwIsAuU|G`f>pJT9TDOe%fvc-}3e=9MQ`rx~-OAO<%vSe!&KG7!es zYvO)7Oppwxpi&6^XhlJSEE6jDOmJn?;lFp^WKPrf;2;J8y2IPw|wD#E45GUlvboH5sW6uAf7W z>lC;O#^Yi@bYNC9&%=XzsB0^G>N_0EV-K_pYIkotJX##-QS_xLh+-yB%n@% z2;aZ!k{K$`Xs3|KLBskU8$-&O;J_=ag}ZpDv`JQBNXv%tqctyrk2XE+ek3$eJ5Xue zYW=01+bOWZ=5gC66a`Q6(+7A12+4oMR#K5a0+e%*ksO3$=<>G?>B z%=@=Spycs4o;x2gxHvKaZd12rR0XB#PLfn3XyLaHV{qJw>9>>HljzQmEUfPx>^87FfT4&eb2VP)IT0tyvn7M?xE)OPdS#8Own5Kbje@_BFF zI;e5AY1W+vL;4xK%Y}mqZmq-n?m~JtyVr-5fuHsDTN}3|um-K)Mo_trTF}k1Q{^ha z+hPo*{*q+H#y3gFzuq~RjbNL#mA*;;eP+&USOPnoL(ardq5*I;{E+r7raU-o8XAhNjSOy9l7YeP6Vr5#btWh z88Bg-Zv+EHp@E*Q$8$|>o)pXSPUe{LuU$}b1jt(tzRuxm$5t~`K?3-x87!WFe>>oGaHs2g_ z2CqB(V@B+H5Xj+8t*k#|ZJ?tzn2nK8 zd%`F^ZO%misb4nk;=K-&QYztQ34e;76AwEJSLmk=S#*A3&O^xof0vMMSoe4s-K(G z5DVGuj6IP$_bFOR2fG@@oiZEQV*D05k=_rWEfgYH-h|Kx%HkRIwyJfub8Y0o7cXVa zMi%5*RvXx1(t&-+u&{mT2a0Jp`q4hGlAiPH`{|;1dKaBcY4_KZe(<|X9h@l=h62)! zE0~350B0RjagGGcCn%yM2P1u}#ugU^9KjS{=^H)^t6Ea5rKHr`;q0oO(- zY)dl*L>UyjfFJjKofGdm-iXeV0g#xKzDM`wrTM;vSSqDrwg1ZtiZV}SlY5iRf0MyI zrF==?dN&Z2}LVATVf~( z{h{K|&TWK2lCw--!dcTPkD@#tiH9mykP_BOknWZz#M@krd7~R|cflvGYJzR%CUwO- z^;Vd?JY!X{a=_WidC@(6j~+XQalVsxfd+A>=l8dK0NmX&u3^$`8Fy6{`p7`Ti-!)N zHGqS2;xq~$?uGhbRvfrlVOa}U(T+~jY5#_7{F!VM&Oyu3ow$P=uH9O|{$| zS8+@Rsehae%Q{9(BpBe_4m%LYto6>HctW{*PT=Y9xrIxMg3>*T_j_h?&7|XdE!OM@ z;G_o*XEf9}+vu*P??N8Kbi~SKnfR_D!l4Dhn;bN`4tETz6Y>P9$Xk4Y*VGBVpZX$7 zgFssy&|^#PFh%H=110Bu%%%2$BvuI0-z*CX4)GzDgqwT4H&Zh>o{$NO3Ea$0wF=(- zufXEw%-6@47@w|%JKFUf+aGS~pc0W&nDJJ0UL^4{J}OVfldp=ra_y1ZX&;IDYf{Q% zA$C|#-2q&S2-|2{(>(aaqHNxSYLY=HC^++aaI%}O?DTW5JmGM#TfQYZv%^=%9kvfZ z+__5W$%{0If+q_WVzAO|sQBS?7RaTAJ^wj+tW~;ue1te`O7sG&oten__*JDp+C*=) zYE)z?xeHz}Rh>`52_suxAIvjcT1cAP9UiCv2?g1gswyB#8!DWV9|yh5W85tnE_rj* zvpmPtb=vOVC80;|j$i+HJtV*>%H?MqDcgV{+f(I6I1ZFWJ1ST>tk3T9&_b4!#yXGn zBpEnUtk|DiKISL&hl4SBNRbu4RFZ+V2Ww}kN*xr%B_v-PA7~YiIXcy4>N(F2-53Zx zo*5q;pKpCL_zwk}lrBbIitYqrhoqsgi4NQ3Z~1j`T~4#7#& zU3HJ7$^Eb07uEH^1c|WO!*4`R!D;EUh9jDjrx?q)-NL+g=(T+ed2=av_c*dLpVdr5 zab@vomRN10Jw_m4$?4!Aq{(!8f6Lip#IwhT;O8b$&{96f*lBG20NmtpGBcm6gJL3h z+0=RC$M5&gI-1jxFMg^-CjmGuEv0f;LKL=kA5_e91J-MzG<;+SKzZ}5s`w9~@@w38 z+yd#b-wrmHJ}}Q~-&lEHCCvWE%kfz%qbE-8Wd!jKD|Dx$ZRF0BpF&j#XWjPChlT&@Bo1sw`E<#^+hh53MZl*T}!zK6s-Iu1p!m2~Fv62#x6|xVa`atKZc--D~At z$jFExJO!;k$Zp*(=lKM`0t2UK|^oxMq$)bMoB-EW7j&012_<< zMK=np)I1hrAM-(I+*CdA^a3@pl4BSJk&5qwitaU6L9NUyl#u;iRpgx?5lmgqOdJV^ znec;NZJ92^jgMkwQqVQZA{>QeE%xEiCVhzm_XG;Yd~rN&W+&W)=>x-bS~7iEu7rvM zsVDa``g!~FJ1_#uwlzCwu1}w(q*>9`f6V(tz>j)2x=VW{s%PskQq^GL0^SfelB@B^ z?O)+3 zr_2`pi)!-H4i?Xsah!U|ez5I;+O=^E?r|zWlV3JJaWZQe=OkQ zo&FPg?7|!UBPa`G*s9>e2LSDfMn3=L%!L;V6`B)cf!Ka^Fka@p#g=U0plcT59UYWdds6U$SV|2@6^F#ZlgsX|8Dp5;dK_ z<@JdXrM}@bjVpF}-*fM|IT>En_=FO;|EXqs!%Vzq#62;@AVaFgF!yG>L7uod)XOm; z62(`$@OfOHLBLC%Q6+0K=&hm&*~d2vN?F8z+<+RZhkHAEDTGMDIdSfpI72%+o_S|)7sJrI$0IFus5^r3&>bUw+)=Kd$jy#<GuBfI#7Lrcyq<0yaXWa$1mLlTlPxcsObZhqDc49C9FS7(`?iPpCq1f z;dxjfHf(zqMwaf#E7kq_UDKJq0nHudty7*` zoV$lw9Wmu_39&4G9-^zkXtsy;RwcqnM4_Dy^+igFM3@Cv+~}s)#Liq()I3hK&WuAq z#UePUH+ml7)1Qji@a@&XnZzHQpyHDFWi*V`4@m+VFh&^Cn2~7{NkP_{g1=_g;%UP0&uh$N+zwl4<`q{A%UMIi=Tm*D5yt zJH6+PKV{pHX+PRaDmd})3Y}(ui5hO^$z6@VoAt-%n?I{vP3JN9irsF-&OM(x!4)K- zK{=!d`!fzS5$b^UKQHWVd`g^f>4;!J^Hn^V&8jzauUQ^)fk}UisYZlln_{gL*72j=`5~A&jU;7K&g|8<%PvePvX3a&9 z9m+@yvOKq!b`XJW02cVP+5hTfnZd5mPwnqcD9Y$HH9J_D zzq2!9q;JgLW29=#OC@8DNek}p^Q)+66W_&PeUC*oPRinSH3d}G6LJ#_QfL~XDSaMNUr`d+LV=e61a2sa zp;XFa@TyK{`pg-RUweOUa)9+OU##Vusi_L@Nm7Tp&xc9hl@lt)T=;cfK*Vy`8iWX* z5Ru$?X4F)__C}a?0Z0*2D7TIkG1%IuSkE38-l2|o+uw~Id;3n5qxLn}4i;u9AWehd zZG|*c&{M;5B8v~_!j;)qB^xRYz$%=mPo))}mxf#R0*rF_D3Mb4tzSs>oT1!Efg_1=9)M{IdR#LK<*Qtj!uSt539qx$SUh zlh-I_anL7a0b9d@F+1=b97e25KSuKF;^i6uR!{zR={E(inze*!<{Q*C7{T$PK(ld# z5EA$>ExQ4CiMw#?5!!4T8=ze1=%4Lx(gAQ?Db- zazY9Btk2P7Q_c29^WE*~$XRkCw#US508Thh=i%r!@)+f^ep@tZ$*XBRQuV2fBBiQHZAJbm$<1`-iTAZS zMx1%3x&6*}F|$(3P6_ggNxOssd~wsEh6AJ1N3k(JBP!To3Q1(ReR`=j2(cI^$4!MvZNE~+_UuZ z+fGPRgDa!U_A5}*M7T7#(d8gRYDEa)=>OcP{x;E#6FIV@Rcm|8H$hF-;@m)-=LEpWASW(|M%@1nSh=W44CWMd2lju>m79j2Y|spxmpz zr96I6*D1OkRo@Twt)o+G>%!)+bn&d}u^bCU4-?_i)cPs#tByXxRyaToxrU+Z)vy3# zw`Nk2NjZr`d91m3c<*MD09nsSHL(XkWcbP#oPb=TCJAMU&i)=MzvMuYnI|v;Vv$#e zuxITLrwJXQOhUoi{-%3i5()=x^6wKlIGS-!O>;QGI^@Ld7Tst4ZNY@mzlq3ees-yI zp+0fPGjYX^bhrSmrlbSCoTIgWGn2n3wK^c{(0yM<5LghwO5QwCHmR6j5Q$QV~l@D}sWDe(Ue))c|U>bWTk{ZkLB>Rjd}3k%$6KR+VhrLrQZ(MulZm8J_b@rm3YfaUhin; zP{d}$j*~--BGBYGQic7xQEh6N2Nl$4}9MDwPU<_$o*2kd8WZK zF|XGE)(}oWPNDsC%UmDk!)^R)rR!&Met$vn*Q%M)lFzA)g#eIZ$8qHp5Cjj6F&-c8 zOVMD|YG6$D$nqzx*@BrZ%Fs36++L5v+Z|n%S$|$Wc8QU-W z=bXdcVi!&$jROSD4t4y})^AV^I zMVjyP{Zv4gNC}XUHT;ze&jR0DmF-$A!=&!IjhO1Rj3ecQUSt668<4V>%uu&svENfR zLVxyObwkw)#S<)1nZ0J>D}&KJNkX;@)yvO$1^kd+>d)&1H3Fa-bvxtKerfH zgSL$GW&^YSlC+TeR@I^scTKp0;wb840r2Ze*;GHH8UMOjK6W!qK)0VpFxa8&KMt1i zIcTjA%POh);pxFUQTvT1k_TxdSei8*%R);UkHQy2JC;T8^Y%Pn+^oel z0=$amw>htt3@X0=JJH0${95Z=nA`bB1t!~n13#j=pqFuVM{N>3R%?_h&78dSn#ah6)fWloBK=?o*}C;&P3($4om-3fXl4w!$o*P zA$sM6ApQ7kB<}(XZS-D4lumijpVwLNr(OeElukAXd?isfe6qK?kHj!sfgNekftA0FaZzFlEExzBi zCWeyQJW6f)1e1}N?G0lYjf1u$yVr9tr48|6yTkCEsbHL0$gg1SfUd@~Hz`lI#157S zirw#1`NL&NKnoB@`hp;lhSu^riOl^nF|-GJtU)t19N>WF+Q0L3_Q?p3nr4YLvk48B zv&Qth$Iu+D;KLtd6@hEyUonab$cCT;v1a$1L5BNOj?@6vS49pZ_WwF~Y<;+sQCa*9r!FSmNC}$l*NtsT{JF%GG){yr&y?kDFHb~= z%FmvO1x^GW(_l^$0h3`ul)|zl#`tt8nrpA1y>V@`wQzqVz9~fMJIwL4xEg9!4yym+ zLJ_1T|MoMZqZPvscT|P}(Vm76du7e9p z*ZilvKRkJe@M_Y&`l)Ej&%__2e;Q8=@4-1RNOX?KHb{j8)f2w^-1NXN>N6n%*9BeP zg%aqlxIKX}0l8gJ^Uf+9P6s}+gbUx?R-K`7w#3>zRrLPBeAV--F13)!^l8BMK|vdQ zWNbJ>0|A+?Y=SmzElVu?-Lzc@Kg*DgZ_t7@70xCW9(Ab!W{sPA>0RQ@LCM&OpV*s~ z9CoFJkqZh7m8_4vLLwzlYc;>#hKA4%9z_Q9kGR~}e;I2aHO(gw{C&OVEK+6ZI3V1a zulybuw2Wm`ZZ`$R>T|nq+-zlIA{_=N?e1L!mel$=_h9Szz0^Z^Vt>v{i6FkfeFpaq204q9S9wtwq_X9+ z{#>=sru|mZu+q}ff(U|SS;}hZ{lriZ>e za3LRvFp$RUc{CvaaMdisc2IF2ej3v7LXe(Iy3wvv0@dl96ZSc)oG`Vzqfb4p`t>J@ zXY~>xt*5kX!WVONOnqvbCb&CZJ8oM5i!H&&_9_4m1}V--e1{;SS=HE7nk zHX~B_1C@C#f>pe_c`7D=fWIhxr5p+sl(Hk(RuK8BpCLh6fjgq^$(4p5MT8Hwo*(Rp zvYr=)4yMbf`_~?yPDOX8T&H&o{d zTLYM;p8GsiL>aP^*r$+PGwGM0(&*%|g_+!PHaR(dmecp-J+`&qlRWrwUPWezobmjW zYT^$j>~2Ra1E%+I7%jD#MTj7PnoDic*P2q+o>1^6it3eS4y8`XW!YnThm^3XX5VH9_w7S+aiR$3rQokbKA&w6HRIJoAzHZp6fX zOZf^dau0mO<=Amt>3%{nQB^uBH0h7vkO*?@+c@4>XY>`IWfn?O zdk$DCc;x_Prn^N%l?$-rZt<%e+(XkT_4PP|Bwum&Q#o+jR_A+ z=UpY;ka1VC6d?CV5#s6`{Lak#QsOQAtB)yN->736y$MMFAEVEJN8(D75Yj?2c^Uy# z$EP@*1@Vw$l)@A}0fQ^I#Zh9WDHLMAO9OR%4?j>u_7GO&G*-B~pP+*OAb|>ul z2W;S@P1ldKP=A%{jnplM)byeCA~?u>JjA($d&2nf8d;Z2 z*vcz{hL^>__z<5Lo|vN`IQMxuH&3ks>L86sL&#i_Jn^T0&lY!jmeE?d#*D}oI@r9z8cKDXo~RN-O`y~ z9jExsMb;bByrJTu=V+NfTebv&YXr|7c4!#Wi(3IO^s8RWIn@imPJA}9=X1ye7>wJC z?f=?YA1tyQ%4=7TR2-XW@wXt)#VJ3B>j>Ov_H~J@G8t9h7uDHGs}Y1q`Aqu73%Nb# zyz8LS?TV^9S%a(maD8UxGv%FWZse#kFsEiVHL0s1Mu-MPR)&*KyCZceC)cz&aRHGL ztDp?Yv4J}q4a<)+)SIbsJ^n3!r>W6mB^9%8hJTlwIAxc7Q4blQVF=Gc>G?UJ_4s_653?5Odn#v1hGS677H zaCrJc$!(dXcUB4!s)xduhx3+e;XGA%2OFo~ZDfZ= zsr@0}xt3{<-i~Q$9pS37z@0uNkEyA$o-_qaNVOr7h?tFV{E)cO=%?X_oPKpcH9Wf& zlZHFLVkZ34q#eWxE#&$dZBXfA8tZ7vL9=I7u(7kQch!H|EyT1g&%>oOd}KM8{jK!? zbBIi>3<4ti303Q;wDj!e5^U`~8JFH0*aA14IBj_|^K(G)BJgcJtxQRl?Vs1k8>G*r2MxuVt_Aa zRT(wJ{8sp0cqnK_T+)vHOjD|t5yA>&ozT!d+VwrR{eTP(^4A`K?fk!Fnr(o$K{dIC zd_>BdJ#e&)CpV&dS;hw`L@3}q$r1?Jo*nY}`OsrH8F4Sbg}lYNCL_*gP!AkevP004Nom}ATuuK&qKkr$|TZ#w5^fGiVLA6;xTk#$kQ<8tadf_ zUH~#V@Gqy_!aFle&$hKD6_X>2&O4^QkC^XF3|dI9nHF!ZKY2JM<8mbM$)6E$hsBUc zij%wr+Kw9b)E!&;BHml8zWvtKz4-Xbs?md!?A;yyfd29p`F+b5Ds?cVP_0b+#n=CE`XG-Jbw?MUSo^wD^Y*+TA)ua(0e|# z4G$U{B??Qy*tJa6Ms7#&^TFq{e9vlK4ANTj z%Ga^GO6}|4VSHoxW+J7QaW4k=yhNhqs|F_HYCcxxfv=KBtxvatcza4Nai(Y(nBB2% zS^#C#!}VtMT331kcH9%rh)x;@zjQ_IDL?9{vHWgn2YO&Ji|p6NFhoe&!?Mm7Fdrb9B0|G{?EY{0vexU z^wa-WbU$W;SRNHdy;eYeHn_H|YzB}%E8{fIWzIg#g3jq-%C3J)P}z4XtGCn4i*dUO zPHJ9uGIiStxfQ=iymk~%Ig8Qat#6dGQcn_Kk}3(?(Hi&$UsPC0I%`7CCYt$JfY%%Vn8Zkf)fdf9z7~5j|M`+(!ou3g!XL+x?(SZ``J!XH z#>b8Vqt*sf=616PnVz4^a`z)x+h4N(zW**6zUJ{mIDHrp483ttvv96)*O{V}V$>St z%g!6X(+B?opY;u>H{cdv#40sf71GQxB*!IjS_Q_jt&Zrp`FfNeub%qdLyQ&QSIe1- zv-h$!Jox*0kostQ(ii(+7Pd48Oc$sOwtz_O<75tF5Lda8IH5kX*&)P<+8u6?- zH~9`Y9x0l@`uIKqpfbCy866Em@`uZfNT6N6EqPvB3s?>=O%V>DS$L45(#TFrHZU%S zMFO`Fz`Lw1BcbwWsEwxML-;^1It--l#a_%o-hIlxK3-%R@2_<5+4ghw8MB|06-IUQ z(4XD5kWe%?SsWMCV-sWtS#!uZoixdib1(nXNuK&*gC=|?x`9-rQOFV=daOdv%PZdx z?(?pT=djt7XhX?x__(XRw&At#Gy5oI*iJFt}@C!vt8Gvhl`JM}7)sj70f{!{MG6{=iAr3nu zJTn*S{P;gV-Z1!m-$RpAX|ZLx!mzBg;?1{Le*P5CiaOo;2U13)l2FX21r*7?5(58EGsB#`vO2yj=`^0{inTNyYhu zqp7MYzMmu$=TT+1s#T5CbIv6zqCJ_E`H};3`#(vs_NR zltXD^5nof<(fvo9vEDyU=@urn8GEugT~l80q5G_>pRD@@zMtIev@^r|7ICyv>}_gE zgW;fhw{$`^*cMY@HNx6z&x@NNxe}!IwqPg!mT(*>JTYZlG>FZpax7pU=5bI+(gH%~ zGEd~S|EW_VT+slS66nsEW~4!&N+9?);1d!@3<;6IXvy%0Mm19T!=I(I6@1M{`RK9! zmfEH&U_@$^*ZREHNcQ&X3-P%xml(r2mLo zujHiOVzl5-)Wcmq6B%13a(AaX>18@1>2MM}R^^cTBYOueImp$AEFrS#N6531B#kQ1 z^;yQm^%?EseY0<2@2f zfk&LwXSw&i-`9P;?|f{xv#V+5 zCf+m8PH%PGS)qCzt69OtjQ(J01}p#Ee*!{ARaVadK0#r1y9KjVq3JBwYYd2gKs9e5 z#nufBZCCi*qZbw)Yf9kSJ~c2qz8m-9E9Y z3G2+kLJfT6UNrUA;}qJlgLFPmhI?2TIvlSTVt3UZ}Ns20&^0^tBIr)<5*hrO&@IkZPCN?w@5c^GY}!!>Ul zy!?Ex>BQw7QmmUM&@WBhq~U#OCdh&dxu)dTo7tXMBnLH~V3-ilZ3{APuE*jnS}A56 z_MYZWoT&QPn#_T$w)BI}q}I2IdI$|-LkkHlX4(eMOsd%LZr)>uM%SDENVtFW$kx7| zxs!E#pK3_G9JivsT5FPe=1ZtM8alY)9yAH=Hw7e;o+JL^xm<^?4q0~}9aDWfh4qBV z)|xO5`Fl00dwp#w8tasHrG+3}FI8#M)$+X& zjHex+2h=9Jqe8LdG`os)s9Du?M~)j~f99?C)(+74#VqU&q6_uRb9yVFIHO`}cXA^5 zFI;&h3Dl`~j87P{6mzsWKi?^{O2G|(vj=?dr)(hd(-%AZjNLU~N~jXan^JF*Aaj*a@1B)#lFqQoMHVY@ng)A2U|)n{hv#;zM-trKEu+ze z#am3+t0ws;4Q^LVe8f=Q}5B;W+E>yh$8@9sQ!ThJJ!FFLWJfV>a(0ZkmSFuYpW-)PK{MUQhWq!&U z+P2|Hfkq5y<~iF2dU=`**kAVqtKnI&q2kja0v^7)&?1vyD{0R2zVF68ZVA4l$(s?z zw=iBsb*ydhseD(1rWEzncJD##8)HC}Cw)w+6oHt^?JD9+zXMXyyeLl{!kjcsIp6X4DOz*kukp-m$(PVH? z8WMCoN*|b-Zs%9u+E?Ljp7DA{a`K7+jj@3)@ zQU+GYSd$D@eGa>RcdxfK!b6v1d>1QQzN@qJJdHQQr3lAo#1#Z z!Mq^5(ZWZtw*7RWuE0lHKn>-I=* zkOFsirAZrlvT(Gt2XCq|DojLFq$E_5Q^A)ziqsi#`kc<8yDPn<1{u}Y2A8)`pEVwP zT+ATwUC+#Hev%^{Av-v4`rd_Ir_gS2;{~wYD7%lqYbZCc0LRna@1u7(VZC^hheYy2 ztyqT-EHINl=NDvPAo{JQk4aD<`n0-aQPNV|-*Ut1Pnm?N`43=+v#oFTys}?m9M-Yn zj%}eSzr)qP=~AVB6`*v=CsvdsuJJznMy%t^rB>t>E(2k_iB=y(96E~+Acdh%@f}A^ z$1~8M6N{;-1twR8cDcHzz=RV!gTJ|WYDAG}ths9KDy-+>5oRJTy!k_riXCUPgk*+A zt$E(_i<|Xie=3`@Y9113sc4bICA1u8B|k=a7d_4&&dI!N)HM1P<;B|VtV6NmXUhTVtdR1~yBvQSNrm3#gKP*^wc0R{yy5=HF82VAsccVq-3nedeQ~jff0pEg%qSYR~6QlV(`aV;FotcWm2UJ|kd~`ctyejf}9>ziN zpm46a#C2YSOR|;_ESzndvQdM=;pj7B3#O9m{A9Md z#0L9FDXj01O+B~}B=pf8L(jD1_gi~I*Mp$zX(^nG+TOoumrwLinKZt!Gd}~B@Alwk zC{Jf5>cZ`(l+I627liYOEhPSEXCkBH0GTS181%S>DtsQ6UXf_JsH2-%6k%XYjR7ua2rO@HL*6X48(b=(h%w89AyCyL>|E$nHO zXg8uXTY5;cnIo=RS=onTudeQYx59 z*mt;lj^hwyOkGiSCkO*ynH#7h|G9XQP&nUU`#AlH zouNS9P0=`oA(z{(D$)3iS$TiKY$Mxp6KN&731E%N5reVFEB5|Ho)`QlFri~vz84;M27?{ z3e|J1LrI-HW>^)Hav?0+JYN!nRj|q+Teb9G*57MJ*aO5?iqGx;$b9hlr}y9`KP~Kk zAXN|uj2H-XjX5`KYhjJSdrIy;g)c^g@#|HF((K^4pfa&@bA6zN(p+?H*w3eOit&Pk zCAe@F6v$osVidsYt@4fLSzt$xDxdD#wS#^(BZaIytR8#0cR94u@uZNJeg2wZ>K=jPmaf^eAJS@TwR>t5~;@QCtfDM|DpK`DT zQ2*!lYn9+rE}_5%rrj;dYI!|+58yYnkmXM~#d?B)zkW3YZBPF?O@MJ+U=};j@_sm& z5F;`a{>$3V?gG~4yB}yp@zy17HeAlW+`9rmbjjI!*E5$GOX(f~(tR%^dujs+hVbXT z8<}iJ?dl~d7F|Py0|opbXJlJ@cS5@n28-Lp(yGs6Kd7_BNEUc2V?B^&?m0r zB<1+4G!`Qs_;HaxJ95GViX_}eyV?)%NFFQSV)~a9N&^OijfIzW?cpgaeEu;Jep+~C zM&;WvfPW<0y1;mX;`vc|Zo~a7bH9-0=4Lk^ky6#jz?S>#HfDRD-5ZK@$2`72p~SGc zRNRBN&i(ZORt(_y&`e|9VK%$Les*@^hW)Yib-@uwVGI73Lvhr?mZmEe*(;J^!^>V9 zEfgQ?gO2xwv=S$))gVTEpz(EH8c?yH8>~Mlh}o>8NE{5ZGy#DgdU)%x<;k6ueb*8R zPKBVcPxyKY;^${_uJmhdd+PpCCHH4Z3_jx%$M*J_uB3 zB%SZim$C8d`C7LH-?dx1bxcv`Qt3KR^2%M)>}IvfK4~hd_Ge<(>M&pTLP+->lz(w) z*CaKHcgL5`#WwY^tCRC$ZaA-~KW81HcKQg|ZGM1@GwFbL9%8W%lkYsEj`6LX-pY+^ z<;BND#u%<#&KYI!7@mM*1OIpXa>aN6;x29C5@UWHFMiq-u6buUNk?fcl4&_c4qq(* zW@WF`haAXcdm1@mx&@ypW<%Y?SMckZ&((UyTqQ{1t}&!<$b>jBVIX97IZ7ipCXnE& zFJt%+B8V>?e?54>uVR|S)`MKhotzGPvQvOc&~VwzC}g=hnIq}J(m=X^8+6Y-VqKl|e zd#bz`DuV(AyZCPfJ9vQ_7n^JoFwDdP_2d%#<0^1&1K8I7@llH+!iKZOa(>dr28Q5b z=^OH{42)-t=8=C>wDY#vkhaNn)1=uu z8b%NhTLenXJX8fBWa`W{IY(k@Jg~l{g&>H6rC692mJ4!3o4g z*O$AQ*9EFMGHG9C-ny5?zTq#Ml#yJ>CX*enLzXrAN($TLp6?GGntlMLFM1rn&S|%zv#*C!-`r2|C z#KLxu_v)8(a>k-?v)A0i4`21SOF-aUDzkm(r()dkvdB6i4Ufv+wacSfgE`Onat^nX zMmT{TTk^&<&kOFC!9ghrXD)7Dx$Ng?X8Ao45p~lrhRtr9i7fY9E5SEa0Az$K_O;5$ z6sQCc#za5*bor28n(*G=gtn+)b3qW-DGNRYG8Q?R^$|3dWpf7#c_n^r@Zm{P=WgsJ zPixhwjuvArJw3f`aeA~vsE03g=YPD~IMwX+j288k6|V3)Jw8#HunQWk3v!B06z-SA zmRt^Vex1s6^LY01?bP3}QCV>6edOvjpDhy&p?;I^>%--lbh zPB&rx9?p#Tq^)Jt^EY{rBn&KJE+2DFp3>0JXwSd2|d?z^qnXysIVR znpHDkTQvi)+qW7GR?Xo5k{N8|L*!k~Rhb$)P}KAJ%!g;C5_k7!pZOh!NL|l7!f{9! z;0aHJCH_Q3)Kb{Vj;NUKqd(H$JSa2ipq$tsdPJ+sqo3tN)|EMZx~I+SjYaljDjq&) zbo4EUFFS=q6g9u2zA#WTljGri#DFA;viauC2VAVO5=7r}{{{d7U@{Ht{_5;T_D_Jl zgUt_GegU+LSl=tz(dzD_yXD@P!v?k~oN_6iIBAL4l~nRWOX#{2;vDhH0pq7qJ zAER`3e2_ROl+hwqV7Ni}y=CaPk-KFPOWg@85(1D-7G|#%)!r(&`SW?LB{J4;NYJQZ zPo&>;Eyrn!Y1cHv=S60|X6g7azfE(bReJZG#HKqe^qXismujBj*n*_uvX>*cuM~D% zz&qQp?VhM7@}F}M1$I{{DOVC^`>Ik3(}EZ1r_b3men8_-IDu1z1t^1sU#n>J*zF8i z(|t3vZq=Rn^Lt(Ws+?y?bZjSeHh39SU6ftzG%N#;a>cH68gEP^4W^yb!5h@E&5!=L zSTxs83-YbgLh}91ywo8zUli3!J?DjsTuHuDbqhyEO0`t9;mE9bx4^hz592DS^$5zh zzzo$A`_Rt0H)c~Lctp&7o-L*3<uKe8=V(2CYnjK?_I+wqm5NPr4tz=f#`+3E zPPrl*9j-6D$2h(;sq=9{&Vsi)rqgX=SNoM~PE)fBML-eM5^>Zl!?A|4qtXY3 zGNX&~_JhoORf@F9Mu^vitz?cMy_=?fb6L53>qm6pqWJ zZ|&IUVeau3Gnt=W6lLgHnCBf`c;~w3PE?tSGDReqkYmY%%t}asWiVX6zw+zLb=r_D z)b&*uM|XQzRIgYY3WK>YEK^8cCnN4+yFG6}5kgrVyA=IC$`{NJ^k?3ao1NA!`cAE> zeUV#VGJj!*cYkHf7s}OYjv)g?yq^p{=1*6J(dPgr1|@c$Ui=1;)HF_ z0!7YEYz=t0ga0*mjD{x9y_1QS@d0m)<=`g6?@+BwHvGjw zk>S86W6`Smz=Tq4a*1tS96U z%dn|2ysh8h$T(Y8l^^$rV$+bEaljx&X86o@+(DDXMGD)>8y{ntcD~8l>mPRhr(}6k z5nyZmChW-RZ7cWwUC2NG@UKev+l`o;;M++$ QuL1wGPv{@dRJRKHe-MqI761SM literal 0 HcmV?d00001 diff --git a/docs/images/Setup-for-O-RAN-Testing-with-PHY-and-Configuration-C3.jpg b/docs/images/Setup-for-O-RAN-Testing-with-PHY-and-Configuration-C3.jpg new file mode 100644 index 0000000000000000000000000000000000000000..0558fcb8fa88687e9492e0bcfd922889488a518f GIT binary patch literal 181414 zcmeFZbyQp1_CJaiYk@-X0x9lkp+IqW4elN&4#C}8pirDZ@e({Z6ewOpgPh_{3j~+q z4lh0ToO|#4eaGRwKi_!cn=y9w%3gcfTyxF&nRBj{H=61S5Adn+(a_KyC@IQnp`qP_ zp`l?!;@(3&d4h}qp`oEG*~`diD#^$IG$F3G_D*0lG`1vb3kwn@F1B7vOACwMK~8pj zh>uou^jj^9knT_2fX|=4zW)SBerICxgOd0Mrp_0%0?_9s$NO&q7j-Q*?u{GH(_m|Mbv}Xc8oz8x zN`t-Y+gro9u&^Lr%&&`hx3{-uN4K|&U6O};PoF;S#YF3iuqquA$JayAHU?~z9Wyx+ z4F~m$1aN?sJpf`1PpfZcZ$I`~t3e4l{?Do4JG*Mq+RMHvjX$kOkc5?9$ z_7!9J^9^BC`uAfX1K`hBJRQXt4Ae9MGOiFXK!E2d&r=3*d;kC-3bC;j){>R~t2pYH z7{g0XPd8y8(8tGz$A^!{6=DZ`CL|;Te98;t<>f}b!R_Ja;%Vv2?c%}suS))|M;7d1 z4Y7Cgw0Cs@{I1v1%GJwLjDg{IL;wE#tDj(B`~S4$;_=t8Py+=1&H+B-c?$e@-Ke6X zzn=&x#}@_ud(y=5r>r_hQS~R>Wl4PcT^gkhLxZ?J{%2A5=}`~O2-#{dmbn7ksN*ZeuzJ&G*SDhSz$yd z2EJk~;61K^CNV(_ZcJMY?ZYl*QeruK2G}EPtTN@j_S3XPVk7^B4AWgm`dm>`;>y_$ z4#e1Y)<-biCNGPs$(J7&69X3ziuTW6R9rvgiJ_liPK4-K#FA+L^!14t5WOV-&-uR# z_C7)nFIBY!7u?+<7HAIh?l&?RB#EKy6;6--sW*RiGZYXL@Q?ldGXtQFg$v_-4UJ>? zX9|4E;UcCbe6XHav>t za;QgOW^s=YTNswV)07D{>SD)qEYOCPHS=BFjz+>+slnVQzjr`sMc|P-u1f=#EMIL++n~3`GVvChCY+Cb5ZX3Ov1~tJpR_ zWOlxBf=B~uYisMkw-3*~cDxOJu99nWKKdrr3(hg6>$hPo%(XW~MTyS0C5ukgC7m(B zpAIv>-_x2vz(8fYRX6g;$^IyRN;pZU1c&&a5B56@KNTY z$yp`akB{isjUy!zRq@thabelBHCT7BS)HWC_CdQ=y$yPEla*yjfCM#U&_Hhj*XS|D zEQCWgQ0JwN>1*Nmdr-2zp_Kf(pRzTgqZP0MhVHhm%c1^=^U(tDYOO7m(_`m!E${An6YeHPw11YQYQN|6p8GO%Su&4 z;ICIsJQlJSf62`v=Pw=0YWn?lDt;a|^|ca}^3n}qRuZM{r2TY;i-?$52QPzSS32`) zlew3jo=BzgQLQrmvlx_2!?l?NaEObWnU!y_(jRTvdI@=*RE*Icm%Qo`s?Gp&2YM7* zb{L%3hTyPkkKLc~bS_P>ybKFDV8yw&`yP*Q%7uLJ+tIBu|*BfHw|sHDU$36w8DcOT=*kqb2fW1`Bj9$AE~Lh6I6}Zqktx9`#Uj+6rwrC@86&C z+Dvdzb>0+yYkepy)Mbr+*KiUaVoZxgAGlMTf7E?Q^+!?M+w6;25M#eKe_6UYKVofd zxvjeN#rSjcUr5~M{EJt0SfCOfv*bqW;B>}GvHQZAtB7ckXy-eDfI3!P05LO%rh|4z z=)g`$b>P(@y*x2;MJIcx5epQ1Gs}>0)n;tvn#L3jQSQe0XMzw*{+Ph73nDI3uYKFu zyRv(1Gd&^J^hnn0(yi_)cxX08o)}zYao0j4?)62dmDS}*(>H<=L0a|;^7Z4u;6o(D zfW>TZ-dk8UP*k+YC`qyhtdl=)$J1Awl3wV#j8BMI&j_J?!6?R3^#@sgMTA{o#eG+O z-Krchj=bHN#vzTJUj0*YXc|AK;yh4K$*C>Ni=S3@UOPWpbz{^7a>#<1n+;ZL&h9_>YbK1#_m!v(W$7wZ`jlB zSDP#J*QDDRFAYEQ7a~d|-xlJg9edVV{-b}o#_g1SL$mVZM`mr?>6`kIVhG4C>*=b7 zp^u_KhZHfCi-h1VBw~lVP7Q*_tb+JqF)ze^jEzUP6gtQ@ms5k{F}Z1FcZ5kfvNR%@ z%o#U-7;a>g%BNP*@xS*IawiaCUffj)h$~IlB}`V9@0ZH0NvG-CX_lvY+6_6`I3Rki1!kGq4PLxijkcU&y@)$y;--f%kcGVTSHJV?k6FV@-E`_;M<%6 z`Vrh_k^DSdUjyb?8B1;;DpF%V`6vpz-gS|XI1A({5JRn9jR_y$A!i`rlHNox<%{k< ziRuL)a|~9Wi1zB77BLwW88cAboPD%0hmYrhl#cpG86o+*se_Uw{- zBA`QlTFH4jR&JRp7I^i_Gq2Ii`SC1wqNC>mQ&EQTK-I1jyqn zRc8vO1hGGcHvB3LnxqyCYYgM(-RLBROod1(Qi=LG5m8<$lXNdLfu>FsukIq}6hXGA z4~Q;CG-RK=SA#9fQeb&@y zLxCsmaaV;zp&KJewAl5DRBp6X24%3#5!NzmF(&uMbY|h70H{8;y@NJkU3I1L!BKVp#iUP>6${0mNpLTVAsFE-JI{7i;H35aq;Ca0E}XL zqLDp(Xt`~7K2nq{^0aBJvpgRQ3oAM*D(YKTmy)mV#|o2L6ATaRX!BjkGVP|S+JVtg zzR?6=xev-4Fs>hZeHVO+;Wu2|{bCYrCC9Ba0D)wm=71<7E%4;HbcXJtsCHQgFh@sTX{dX`T8ipXY zm9;f^w$V9R#K(o*;C(2UaidOPU|`%+4q;&L3`*M~UDSAz$ipX6)hL&(_8JK8Et z>y5tfyjHGn-6N-!+?j3C-)$)m14Z2g|M9rcke?JO4*8<%VL_q>eP5S%T^S{uEV-}tq;=(WYf^uoYl49*PY)K4pd zvv*SJ#=;E`$(MF^c9Jb0N$Er`MmiDSp>#|@KengqA-i)z?8c36Hz_!@1e~V;T`Fmb z9J+97wWAyn52Nw$nDhfOjzRIMP< zjeVIYLggZ5Xp!f}h{IK4_6u(vhN?y4eK*0(h0%smCLXi4z&2*{g+Q$`WwK`Poy_fp zcH^t-t3uFnHwihp?bW2(DK-|C&BRZ;K5sl&-K(6OJN!hF>W^^o@SZvFZOo|4#XL&7 zzC597$T&bESc{a?lQFRIsT1YS0eMTS+BAwfM^! z-X5!@vgJ>3TNrkM%}}$xss&-VW6*9QSn7G=&dM6k_gFP!Ym>VEXpnwt}Q>jwAT zUxH7h=B@OlC{&qux{QSiyDz=^UXn_f+h3NcLB^@~{333o0e*FTtrG|5m6rfDEuXor ziQ~dtN(3&Y|5;XqJqEtdnicUsDqSzW@JtD8@lGYoB-~zfeWmUW7f3CEVhcOxZ_x&+qh5aE=9l0Aket6;-L}JmlB6nk{F5h+VGAMhDt&(l9H0- z6ALc`I7~j)tPJNZvISopu{ZlZGl1!$fvH5r#ERa-g~%Q~vU#OV0W{MA^Ted5mplUM znHy9yDZ^BnEGi%7T%my&ZR8-A~NexUd0) zGBGl_N$`Jb{2vtkUpoFT_xzs@|NmVx|0^l}Cj|fhlcWIj5WF&tO?wtX*CdkA`|gF1 z=WffRfgNtCumx|#Ze^Oek?x?Y;IJ+$O4}ayL(J~bwkSm|4-{s(rMs`<9wKh$!dvCa z-?y~~wKCLaLxBx^{Une7bAA06)CuDvd+`t=W0uijzNGyk24{;RjTNN?^HaCDSfU|0 zj(r(-pngem{I`aIsuOf>W}M2Ck(s}2`1_W9?8YKT(!&891g?tSasNZ!|7RpsjBcA+ zuiCDb#Y-AsbRC?Ebgp`1Ug|H%?4*gI_)IZ(G>nE(_K@;&(%rBD_*@Aj;p#)R*wnIe za;R800R3%w9gHLA?y$UmG~#DJh)bmKtSptykrSI?Q}ln{QSTsQ?;Bn^>wj6xcL)4% z^9rj@dz?-dK*W-`aap4Ik;0ge7a{*Q z2SCC<9dimYoz0O^U2R%WiTQh~zp#ma_i}RwPFlh~G&hda4s!$7g|k-I`4|aouVrT_uk=rkuog<_%?=b^2mzn#q9fu2rtb-Iv0e z;BIoUptO7QB)VT9JpofG7EMaW=mT5q-?Le$@rgvXy|Xdyu|a^6?fu0k8Ye+U9p@KW zHn+Wsiwgz>VMlldbVln9KD#r_6kn{F`$bSQY0dpNSNeqSng&tt271?V3_UhA80lhlz|E&AIffAcF)g?O?N)T zgSnt*>(>7U$y?jge1CaZ=7caBrBcPWB5ou5-wHOVRQFu=zS<{EzLr@Y0xhZ58%avk z{BgUyv}7}xD@GE?91q|q2jX8U{EMMb!E_5e7+j}}!S8UDj8@k0%d3hPZm3TE4qOI* zWeG2>_=syiRl*z%H)*arzWFYddb8&Qh=#Cyy>jA4`7|nlL^x4@(TRs4@dYYg<>f0= zdiC71Rdk{tT{ZKF)-pBLWGg$6I*nLa;^S0nv-)m$^4_AkEWHAN8^3N$yv zz{HFThH+Wy=#9nHU5S@mM$UY+Cy>%9UPNzd#8e^HtuhhnO9$qmLjBaYDdl8x#9of8 z6*+PkSRg~JVVA#P{f~GOw@0$}p^RArPvNsNVmAG$WqrX1JMkFHHubWSldnc@3knLr zdkgK5jYttGoir0X@0h;^Atd*^D{LTX{6}nn;NW2S%F>naR|BGgC`P)`Ou7kjIZSh| zyODjYb_ixU<93-PktG9~naoRIcg@bKT%R^hRCs*wLxtQp1`sExZcX2ixQG75sy{F= zhQir`92A;f^$pATC{L;r^?k6HAeL|bbUaj6f+DAO_2ZtuMX(_=YHDK0Mx~^KQ7m(C zpj?}mHy~`LLQFTUScn( z|KdP5wXhXb!`(eiW@#HTK8huTrYk-4#WZ=L9%^_)93lh;bSCS?CMTuhFlk275ferZ zvmpHRCmz^y$s2qCkJEvPzbFf+4P}lVk&^x#ZX3sjVwcP{6%+CL67J4nRN%hRv)gHr zL>8Njo#8b;`SVQgqy2rQlbd{bo$jf6=q#5cu~*jTY1+RTHwl9s8$^x#7Vma$-|O96 z?W}NqUP2{5`@@HcoHYlGk%mKIOWdH34JvcZ9Of2KZi7WIizDK1hNfz>ga=<%W036q z^svi*YWJ^=9+CnSiny?tQULsYgFMPDB+%(Lz48ksQ}VyOW>&nOe3DxAu;?-dGSNec z%53(1EI)%1K_jbj_J1!^fEY#@9_+|lV|T=IjIg-q*~;iJELKqJIah!tOs*bS5tH@%BF@JKt~E8G*~uWbj>5EE7%N z7s3??m&C`|z=L_>lF`!xcWWn^^|yu2{R3Ryycs?ArsS2e(42R}OAja6dI%7Hb)b2R zSHLTi>HIHGP@*u38ODS_{k3RPsn!&$E$>lx0y7#m}uZ$_D{i}bm&!-Gj+o&LZi9AY(@hhjg zP)6W)FJiA}yy*^^K*_c? zU4?ay=#e1Yr+)J6RI`D)nX$C+VU1ibfF-A|Vx!Wto(EJE;`;<<=bmne>D$aMdBEu5 zx=zXF9D*7*qw}{z!bKPbG)w6{+A~MMEzeea(_cy@4J7_InP)iuebGggDHT--d$S8P z$g!|Lm=OLQ`o<3P6sb1ie8j!?!yNO!Z(eT2WQ+Og4$-%8=*z&E%-tpMIOqX#99W8P zHvPWM-cFQn?Oa^KOhh4rH;;5CAD9Kxk?8QGKdR1DxjOWp2Kw-NS?n+iow-JT3}{iQ z?@>|Al^$9oJz^nry$=oIjOZF1Rm&7Nl0G0m^r{2fGP>E}t>?-4KMgM}Mdw9A_{n6+ zc#ad?%(&-1r6W7P%wDs^rm@F*-r{(P6wQ6=XDtNq?R^Ig>T1<9^*SH#CD-!iJ}HdQ>7z8T1p#sS5(PxhLf z>x#C|>rf(H+9v0RZeT7btso&7DQL)`lE#(P=sau7LN?p+6?=qCwoDubD`3K-kr?Dgfa6_vz=+8b>N**t&uS07w%qh)s09Mk)T zQ@VSb`B+yV2Bj-N1H~EdP4;%2`yK|l8GkBOpDIa*kVYm}Sz>55Awr7;wbxE58p*?$ zs72hc)M{O4vxL4Jh?wMN8dfdc`Zafq*#M%|>qn|2O(3gpy_;4%v@R`sk_mX1x%uvM z7`MI`6)DU0YB#1uO~%FbGUmZvb{{%fehOoO z2o2x8k<7&QtRbeS0M>FaRnZD20yqZ4?Tw{yKo8pW5V`Nnb)7W@_m4)TQXOC#?L7-s zPh$Wa&XaFP3>i_HgMZh4+EE@G^yKrJ%|gPmPBbMml5;ZA+mue@y4c zbr+ePw}}Z0zC3+bBS?<^CO++35%=T=Pcg$(N&aX!iKky+RUq6>Ex~Pad17;RD)W{p#wU(K`n$sQ4ZH6F|I2x!a_pm2k z6UqxzUKl!w8j`2WA@G8!F7t(=X5xOFaFLsPH)S7%VNx<2FvC zNfid{Ooj-hTIWW8KJ;oUddu(~1mgARUxVvG`e@fa7^BykC)YC|J*WoffL{(8tv{2^YlEdG4Jwl{b z^b%^aF+;@pB#|y`KS&U%I-jCIf;2X@0nfwYvW;+mS-b%DR(K)FSu`@*g)6?6ov`O)} zGCxqELadymjJR{jCra~2yZH-QZJy901jrc zv_+-g2=>;&PKUU`?(!bhNOigU7e5S4WKWk!j)0}l_76I$GhZ6cp&v~>{bIEA4eG3P z=iXya4PTt%Sf3OGnWu^mcP4#QY$?`0toil2XE&)J>V#^xI!Ir;xqPD?axjJdCjM>m zqySsudlkRy2s!^2Z)>uKXW)ijpM84)hKjPr95U|*eFCuK@?+|`IZx4g>v zKyW*Cu%Z8gxpo6NNy<`HF3nYy=kCp0(C*SX-$>J_X}515FA{vUJ>FL(5%{B^&Uu-- zV1Si$P3c&8$e5sR{trQVBB)&F&C49!Mk`&a%j>+&Q$668=xoxWoq94}Uc2*v{|VHm zP-WQ8nZmBuHyeIj5hCd3eV?i>g=<04A-J*7Ga3uTj#n!xgi_Tjo(8L0zftgojl@o! zy7W*c(YMP$BXjs%&WF7c=we=?L??g9&n7foM>Cz=vx;Ky$nNoB)Fk3{N_w1MM6d&k z6dCPgM~yK%loVA9>7{e+ggh18!TGzL8iysjHv*$o*IaFMamvA|$CO{`{6``+L|?xr zk6|=yjHucvUHfvdV;}}P%nH030}K+WlH!0OY(;LEeV5z#>dwlqAk^BZ586Y{BF6u7P_R<>peVV!whyvVph226k}XS|?K_Cg$U z)J1t~>^OzIrz+fk-K6ssx-6%?i7j*#E{b|RS@jB0aH{vL(X_@bQ8lNtuXHD=DyNnN zBZKSx-kSYlAlGCyYv7sYp4MXP&-Aalm6VrhyfNi7JTelLKx8@7H4Qg^l?#>v!c|7Mha=4*SOQ)comoYM&HkM5p&{Q43 zFEv)Z2cJiEy#=qv=Vt;AL_h*L~chG(n0c5+4o3<3s)<)mMQd zUeIUxmqmWg!P=J?4$6YZK311tA&(z_qAZ5$Z;D}BHzYdZlKt~g4G6`NdR;s?vH+m$ z>N@Ibr^A2r!cb_Z)TCqjDx)e6nS~Jj1UWunrinHc_LFJ6^)eG}n=ev2CFz!_Sf1rU z@QknNOf@U^Y4<89j}I}DQLm=vGVxOvhih7PS}KXmrRPww>6EfcXW`0GpiTM(pG;o0g* z>Jofat@1LQ31EKE^Uil|V>(Shq>fp22u|(s^K+6`&4t#o`{ExvJO$I^56l@maD0+Izv^r;tfggNS%g#NsslkymEER$=AsQ z=frx2L5UMDwbJ;Alwjbr3#)-?)3f;j4XurHv4u+RhCQM>?&Kw3hX}Uzd{Yj#%MDx2 z;*x-bDxj|M49+kX$S4v$%$W2KiIleh<@N*`ei$l7{opy7BaKw*rNcCtn10~ZJRVHT zQa(vU8)f=jnxDSKhaF{fhAfpuF)7NIjZ@!9yWgX@REkhG(eQ`+AL@? ztry&_eKDP!Ny;3p97h7q#zSq9OR?-g;1#k&&$OG2FHzb~EU_60RJT1Z&(D#`hL2xK zU6MhrAs(etvf!PfiC_+*k_#fxmcS;3>B^9Hw|c18sfh$d+#tb z8-VORiA^)~t``2$5@G=^;a7T$4f4+_aEUbcrm4?(`72a7?RJ_zcF^kFb;v$LVn%d# zja4vBcT~N%O4rUQmU21lJZNQKV@tV@8n5%C0lulIzv*gFjYj-#%^rPkok{0JOUXOY z3l}dk-?Dg47s8}TD`d%}Pv7Ub6U#iXUrJQJ;+iFtE2VpDLT(NGeX1S8&(-hJk^772 zD4C*|-+d-Ze~E0Qh5I`3IBzcjanOe|CZl&;dn+rm5FUK+m6!@T-AdlS+)4AHH#FY-AczT|-M%`yP;Z7`$Z(noX_{_PdxLY-vggQn7R8VA zY7GQ2`E6VX`t;|94c)h{`mUS$^SM_~r37VTHA?br`?~1Nw)mvs~UhHXaKZhw$SN!+l_@NcMQPX9V!bdiQ(e)B8+YbKS-?Yk$|i!@G; z9Oqy;Zz&Jk!BFF1wGGRk6A#K)Dk=OaFYSXCBc6BpAeNi}^;l+`%H}8)$%Z!|< zgicsXg3zy@1=OiN78#kzp3~H&*>}<9d{!Az0Ons_@+&C2t1z-(J1Grzqtlv%g(0 ztY`9Rn=LTu%aDFaxspO(+Sp;I&@dGcmvWijYuC_A6~IjP?tY0!<~hY{W$#$vyK-!B zUWnj$^O3wDI7|gs-V^XXYxVnAu^^7#_F?Av+*-{b6qbY_4;$$U2)jkwMJpOAJpJZ- zhC=(|3N;Nc)dTH18}u7_gzTM0RK_bfOoTPBAOT8K=eT&{&Ns>V6fA@Ww&jVoTZ4)6 zIHt^w_&j~FrHghkJBao{c^R;A2zIuUqa8wdrW$0%FS4F}5gj6d9`t?M zc(C25LJaQtjD@lB+bE@&<*r0+jZ_J&2*km&0Tb)imUgZTBhP%`_4!GVCEM70Lp%y} zAsXi$dFSZ)mi0vaVfB;QWP{%i`FNx8JACynJS$v%Q9GRx!y!A#b8zyMof_9ka;mE_ z%*Oh+`>Yp4Npu?R$u>9ZO}XhIX;-!bA(m4;BRBaAO8x6bl&!k-x+tqHxd6u})j^cvRm31*8Vs zL+@MM7W`z2ce>s=!USKa`X(|ywGA6zsabg(X*OP+mIt?Adie*@j6T zx(QrB{xwI#%I+mya@+Z~F z3p-DBgaS6-T^+7fFa6wLClb9Vyl53w56*f9iZ2WJgqYONY}^E(qc?;1h6d%iTTqs= zhePFQ(@{dkrcA>3k@tQyWUFJfBFthTvyo89%UgA?gq?@x<`V42wJkbTAPx9L-R)&} z-BKMkAMz?gTdUdMw7Gn`9TqW&Bv_-gl&mEIuly7Tz7V5B2xuL`s}DjXBk43xYBQ&gu(EF?OAXz?)gtv9qvAg z9Y-Zwl*?qP7oF;l0;u~(jgF@#{JMfq_w!2}ge$|6!3FlFK*sRWp34Vmc`R|y2vIxs zj5}`pGE&)0KSLC|9gV_EKLmDeo?c_NHudgS-u7i8W8VgiyZoU_y%?0|b^9QziQi#t z<8;t>d`#vmxpUkpmt$BKV-L|D)Qgk69LJU6)O$U*FfE6t`0~k>Ptmzlv_Ou(V*Yz8 z@2u|<)iFkzPZ(P z!zSy+hl<1r=Z#`aR?()<2BuL`V&bLt&MumQ8mE)`QQ-06s5m5ZIsDQ((=X(kY!{+b zowG6+lZ9VPjrN`q;aA`BLH_tHyU1L*-)@3>8pHJ21(6nS<8(`CWkbKGcJyeJQ`0?z zH(A;Bb9`xW8#nLh^ct2uN25wkO_G*$J&dzfRa}X|mqE!|J0b}8^~q~T>6J@;L7MuQ zG;MwoyO~MF58PWXMJuJoUNcT259w?@LWMQ27Y`=9vzVjnmMt*CJW&X*D0U}Jk0H8+ zSzNCp0;`TAy1z2GI`6{MYZ=oy{^Oc!JKLyUjsQ7X|1!63>{{{<&hK?=V`Pr|Gew8J zv!)2DQ4Q58=1GPDB345Jo5Q4g$Z?#pHZhyS@4svk#26#k)U1s8tb1F{Rmv~v>ryhG zo%3ag|J1f#h!DH%YokheyPtVX-Pg0cHVqvo)$s06;mHT?LkDGznu;R687_uA;bRSX^8GtVz?fHo z;1L%W@BzK`E1^aL=eVe#7iPr?^vosdj~mF@4U5B5D|OWLxXC z>U?wcBKU(Bt=Pd#FR;k#QlaAT=y<|=myT{E@>$I zD`p`eSN4^+H%!Ys&EBuqXQq*LHmTPUr<@tSFgqQ1f7=(4aNM;0 z(i)o0o;ZWDUWi!1-zNj&QdH+mCVhsTpWN7cl8H^Ym;~`lJgey`J@C{zmE$~@h zW##q5oaq3$j?KgB+MF0T)rXRfGUwN$L0D>j(^pT*9jPAV&YD~uybFshN+jfE5wDkv z-y;;T722%tC*iQMB`%UFH7nSpy5=*CSL>WPsa?+NQHkV!X;1ONkWRcMV5$lnzXi_o zHswqoGUc0FFrJ^l)sog&Ow^!z9zvz+tVTUctrVZBpxWZI=7BORX5a7C5^X9DHrlE& zAn1<#g6ACzvW0AJ!cLY@jzm+{Ab&{9*82$8K0bzfq$DoAXjHu~%qX@NA zyyJO-)pqR)X>mWP@ulw#^G;DYD!|_1uY=V3x>;nx#nhS4J?@j#Z zGg@C&Jj0%UzR1%|M_v{$l5lkOQGSVmup|UDsODl8IAX9`A&^%<=A~8*%rmg#8d;=p z<#tAvz8m$ke*p6Yynvl+ZJjKbjP>)>Fh$pmJPns@!RC@6@H7vZMjeM+eJv(;jhh}v zVa4>^POM4om>;D-_{p&M+`=mGVNNoIUQu6}W{R;fgOn!d?x(0l0crHtGA5V{Wh%q# zcD|AM`Q)DeWNH5)b==fNsutUSj!5GD5pcLiZvFc4FXlfMRfGnFz+)T8+${t^;j#naTY5c^g;gzhYo1#qA!lEw)CaG|++*z!je|r8S%TTLC ziom-0COOxuf|He6X}D3`&oQ*Zgm-Z&S%62sBW6Xrp+miF#>7q|D`amSaL^76PHTxX zHadOjSmF3%+Kkh*RP|hWGm|hG1lP-<^Q0F~3Feph;V@8he&9JN57~X&T>VU&+#o_~ zzIvqQhN$n@Q9o`3n*dvhUDtzwVX5W&quj1$`J6~z2biJ9aGfCvQ)j4OWqwp@L)mOe ze48EPGOg+f{RqZx7PGFOp0^6dr2$_8_by(}W!pGB~c-!x$V4PnE05Cx0)=33uTmoe%LOkl{>RZhCiG|apLd3?YCU#$Bh zF;?CW5q`CKt#E3e#_Af3;9BPA-xFFKIP0-Txlg+~4*N+bPE%O8_fjnB)kuc3B#fPW zP)Cu=Kl>V?cCC+a$e%yvM9D4XN!a;O5`VYfJ@`#fBsXu!!wI6wMaL#-SXGZ=*TrjO znY%6YjOwd*Up#UZs5F10Z@ejH5lrIJmAX7}<0IT*qMIpUHsWx)MiB)@YODfn23ymi z@e!oKwN2z&jK<{IDMEX@Pi>*q#)`Qa7PkcNn00yw0R5nph>K9q2So|OH`bNoeCs8) zBs$MNy_gsatlc46KlZbwmlh5TI9))Jl)d%pokWg1jQmPk>T?-tJW(riz+Tz^&cB_h zt?G@GB^a&azIHp#2}q+kji`FS?`io3sMMHseW>D9S&}u`vKG)#G!e9V?e6LEPW7?H zL~+0Vl=(QmqsxQTqecZEL(crQ!S^n`ZLO6-Cfs?xI%&an6KGo%ftg2amaQVzqI$== z{ID*q0zI>(OgWShh*NUip*B-(m>gGR-AxqX-Miqm_LhGyq$B3TwlRmU@pm=G_?_kn zw(_i3k8kwLbt>)HQzrn*i>_a@m;x_S0R0SooETKBiAhpA=*ORY*i@> z^ip*yW4k$Mt{_p}h%@=EP&%lwopI+6yT16~IG~K~pgeQQ|M`)_hi8?YQ#?fXf01Y$+dfW?zaD2# zQMj4xsu(;zJEMgx+or5f&`!U#@g#0g;ctI_)ExCzY+a*CLvQev;l1n78oSobZkdmp z4K%&1DXR!$OnPV~&0r_N;)PA!bNlfHEtA#j=Vl$3OQzNrNejb>6kr?Jv{+#w@aExk zN8eSbu07dOn~+0Ys%C@5k(->@tH+nSfOFS|^MKM$hc7O3+fc0r;BYcFks1PKv?mXpAtmsJ`PiC1pxqZ6T<9Xw)jMiOZc zP_aJECpiu+8vNX6H4Xv;jm>P=q2`m}wXevBJ8$wm0}HEbH;IU&Y z$Om#6=5;C`&1Ql(40|BiZ_GzqDou@Vbx#pryKOyt4=-?*i~MusyFct|IBn_+KgzaH zW!?4Rs;wm~_dK-D(bbM-)$uU)XRFSf@z)wxt-}f{V7<0|{^liD+qso)ar`ChgAX&sUifw-k{#EOYJ zaY{LW)AP^TQtgD74$UKxP2x>X{Tt=MPjB6}lqY^XE6Vh5r15WX4PeY3J2VT~qj4Nf zX#^+J_>jw*g04HAZ(LtrJ>MtwO2~aG0IF41qbk1$QxPSWed8efp~iD}U)72lwb>(< z_3VqE^#Ur+W!R~(jW6`Brd>WQbiC0}p7z%kb+QXb@3@Sz)L13Tp4_R{Q%ecHDmJ|A zF?25etl^y))Y`PM1alPLEZ*h%ihdk)sJuv+rnKzU?|M5u{%h`F51(rPV7a@_KW;be zv?J60?JQmEzFGc4LhEtx_m_>@A@t4$?K<5Z61~*f!kY@5C~>FjIN?JnORGDG)^Tj* zvlRe33=r;3Jna#=pMQi-Dod3f2i$msQv9rs%aNjCWA{*oqj-pKyU7dtVBys+d$q!M z4prNKgyi#{GuN{yx7u+kZQ1ox;${VlaC%5Qzm2Y#t$HPT5zKGh;e2Q>v)Y(=#eDtt z`~smNT%ptEep$}vPDgG!d!Wq0TVt@ys? zAf-!(#lWUWafglz=#zKtvnqP&+&MCrqYO{x7g|-X;Sw*$%{wnAUzc{&e2L?26mR5z zeIz~aX@WT}YBi4&1J8U(C+{~4{M=KGm<+nDKS^KNS>tJ8G5#7AtMZ20&ndR}MQ)n& zYq;ZK-=O0%a+#-PBC9~kbrb@epET#EJ=3vwtbImwW48m`+5nPXBnr2I#{H>ZE;zoq z{8qOUQ106m2yd1%-#T$pIH?eFRNb6$U`%Uha^W%0@n40L2;&N52 zU#UlbP@+Y9rqKCCNmhBFecJT%#TKd(o6*3-OXhunK#zd_`jkzo`cZ1xX)~ETGz~wy zE-~+{68ThG98%mu6#!#IDah-3<+wk7@enpX3{5@+BK)AT(0!kDdHCw+#+G}X{CHs9 z{ZsPeR516T1}%9e4a;Ya55r0_Q6#y^v!kXr;!h>DgqK-XNe#dfUF4z7Yuc5g?*#}snzuejeP-t9dU zrO>C?aFq=otisVa{#-S59A2oMgF&*s1|AsQOON%zq8Yq33@>TbB^`;FfhJpjekjj3 zg~ZPaX}X``CrOys$+LJ=#vwN@Zd)k<V~zo;O_43?t={syve=y zeY~pobC{Z9s?P4yyHD@6R(HcO<)Ia#_Cy+5n+cIe1ft(qYuL6C$4uv+Jajn9wGCyc zKBL+YaU5xhVeFSH!@S;U&CilSHG=r22cZhAmjR;7!C|2yc&$EgF$m8uT%c9lk!NAq zTB)hVYxaN8;@)+@;|8!AMw~np-wsm5XedfBq z?Xj9(_nUaM)Rw2<_;eln*D;t-wA6TkeyrX&3Ui-rh3_Jg>Q2ewa4Fy<^3BokQQr0L z_U7A&!4IQnv97=@J56%9cKNfZfGWF^O#qd3XBt^ez7L7C?~5k5)jRUoayeaNt2)VY zxh)9d&0&8NOWtomlXgE_-&EW7c0I<|_Mr8izT8SNIG;_By`~4ax+SHVw zBNF>M2MIaOr*S&bpISGdpt0C_-{N98Q5%?Yk#@7RpvNh`8=vM{B9ve^=Com4R#r!= zPYBdna%K)lOYkq$e(;&yPe>)U+DjNO8`YqEe$^3it}vR zh*!Pw+p-UGEdq>*TFqqZ(^nQizCBy8iEuq;RbXG_S!s?kH3@)jbPaTRM@rh;6Qw}= zDO-RyN{^Yw+H¬7U8RPNPE`$omnt4Hnlwk$n4cM!##_X51$d(^h?)wuGz9q{6?N zI@SupLA`YWAo0ty#|YOtTvjr1c*tU;U94#d1ZAJbRo5X)?UN+tN#wm+UL1@naM7+G zrK4;SN((&IFC=xnle>R^QBe^!ARs`s@euN4cB!HaD#9?x3j=PLA> z>a1qtR7=!MkJ{+*#*2xqs*z%^iclqkd1{_n1-MMODTj|cT=I6;iXZ6X(LHOBrpJ`k zcf%>DOp2F+PXDB_O=V@zb!WBsn{KTa%&;r7x3?txZq6Hd1-#cvxOexE_<6Lg1~8s= zQ9ErliMUgieO0e6`-+lKFUwmnP)3oZOh2+GymY!~b^Xp-u4M0BxTXlT_XxDs3G?Q* zBG_cz_G30gXc?$efBIsy#7Q)CVyTa}&u-PF1J|5|rt^6yKwa%EN9YubOJ(j&%b3eW zlBt&FSyH8k^ebbKEbFz1wvOH?tH>5L7560&Haq!hWfDAPGH2co|AXGIUG>?`=1WVU ze^bAWYmr}e3rkOXCBZ8oKwAjeNi1V}whgfF6|b*mq{-qiXZIHhj0ujZcG@2-Q@Z7j z<4X(87H%(d9;rQGFbA=!LkzLuh`}tp?Zo2Qq|KZHu9M>)mo#`1=;FP6S!*L5EVFu6 zWW$F#U-vhkVa2M2=D5+;F}j}J)h5z;vuruY4Jk`JQ$K!O=hQr>@ctz4Vrc-` z&24X|8h@PEY7xF$gw%Lklm+kW5foXKL26b@naiyo_!qKEC+Q8g%)01>64uUw*T?Eh zW|K@r4$~dJpS$496tq^=p8;(9rud82;%o(Y{-OVbitOi8EDIkL$L6L-9Y3pVR{Ip5 zTU2^iNa&DFDY`G`&!XQ|?G}PF3m)^d+2%h{(wlA>ZO`24hA4}UP9*+)1OmzTEVRldC1 z+*sUMyoNR7*=~wG_ad~|WZF8plbNR}v#cfGoSs)C1>=RA;hVl+7dpWg3c#xF*gbHz z&X}r1OC>aIwdQ1dF*t4TFkU=zFuF}uR(EZ7q`#nsx&P!68Q)8juHQ|eg9zaDH~DSVgIto*`l8!eY>(DMiSycP z8Y@F?7q*J`(96glP=i9|qQ}=$bw2dog6zj?YJ}KIlS(sgu=;UIZue_I`|EgI$)Y7c zmth7BG<74BT&rR^KPr0TnM_Xmu1ICG+Hd!}&R4Z>G)je6?3gc55 zEjM!U_S5Ba(FJ-sMJn>i1Bt#Et=aN{?sKRA!*qaE@9+1zlD04mfZrzGQ{Amo2CH1t zdrXkXKchzx;p4oY`8`#4E!9hj2w+iaHm5&c9Xg&1+&8_IU{$CtTTGbZ@Fi$c=U`+D zNT&oO#*TH<;*{X)xJtUbI8JUJHC=g1r#+iSn!*t|n>3@+wd`aFuJKEZ=^DbLY4_81 zUp+=}NYv-P`XGaLdt8a84~S<`L#zNlULoQff9k~Ufn7WIUUBcRw)MT^t5u=v>F20V z^FDH4$I`o{2`|@rC551vw5eqxTE2y^LP=)zN9BwvSTM z*(YWziBUq0<%QlJU%A1o<$%b`Nq#!%hqSssF6qsr+p00UC2Pddx?qxeZ>_^66%6(C zIMqkS!DWDIjFsqHlf_Kb2bV)h$Ro7bvQE+t0q|S#qo-8M7 z>%gqHRNJUQkmFLTb{iHeMi^vY&e}H1oY2PP6#1Yw|tw2;Mw7Jw50jp+RkYoCAL! zQ+xAo#m2(8(SaS z8CSD#P3Ywgp^J9iw}hTA!#Hzo`SrFs4BZGWoMBq2;kBilS~mGK*oVsxQX9 z|D-kZ6`E!;$6B^ENfb}EcJMZcaE|6DwPD-pPy^TBwC^XgZBfp2*K_#JxKIt`Rs1Tx znfZ8;HJFyx>PyT>7PI1Ws=ZG;B_mM`uY#C7%Q<)J2nW3GWc9#|c|41s#HL+#HFPH-VduR&%EV)rw@aZ?x@seOR%Ua;9S4euAI;P1Ug)!D}SeZE1+sj z-?TXlK)^fCXqFLsr#N4sAN!j21hLI+ZJ{hL$m$3DeD2eJM36@rGPV1m5I~i#K%_Jg zkoQtO5P~;#-IglGnsCZ<7vs&#iD&9m$p)(+5X%WA=F( z@NsVww>Dl;^bP3qPtykyFe|7%v5zNv{7+9X*IVR0Ud3Rps~Nd6o13U;JvD`yeOleK z{Z27dG+FL{wUcQ%@8R*f7v5ioXyqk(Md392n0Wifong0I?giUVVm4ni_fDfGKj^*5 zyk#hcf#60^FK)UvQa9r)s8gP>^|WEVTgKlzN|FP3yDlz!vWxb& zjIP(GkAy(%CNvsE&0>MkYsK}4zW3%AkHJAiX6ma`AG`JK@+uhPvY4IXFEc&eXY0O` zOsU2ZE6k%6(vudqHZa_Nf+&1<(M|kC;1HPBfZM0M#BC@=N5!R_j>(X>zh`{fi@%HG zY*t7WE6TBeofZitFIpPPuq53ecb7oXNsHJXgdqHiql1-sL_kv}y3n5Gf&_FlYae*7 z-6-`|QtZf+&OSPKbP<*>WWKJ%_-cpls5DHs9J-XhbMwQENe)KmTrDyE&%s;G*Rhz^bB3Z6F*ZcodR7e}Taj@1tPD4PRAGUEGot(QqzrTtCUThYre^TT#wtjlt#OYQ!&pmKIe55E}xyBw2v3d0+Zmn-F1?aDwbMx zW7B@TB!O6U|0GCSVA4SL5pni2=O*x}Vbh+S!VwU?kbIr|0A*chHOA=uJV)3xVW#gk zgQ2L?e6yZ-@3!P9<_;RImJKe)epzw)RYy&3Ro8q~JGqofRCX%ORAI3u?y#RjnNMyK5kHH<=lCbP;yn?jivi117&$1Na*;n%nu}mqPnlQ zu6)9DCO9>iuiwpi+u#3Ptap9oZd5z1j(6=l!WD!P{%Kn)j*Bi*rSKDJu`^TZdV~ul zp#h&zD<>f9#eVfBtakh9kU#X^Yea1HUAe{oo3#aHcC;CE zYaXi;VMVPE%fCz@pS69~svErANYxn00xKuFKkyh|U9C~xz+0ousJ^2O4{5F_BHPp5 z_1E!$t{?Be%iZ}Z3JE`B#Kusg*6)%(bA+aa6e4gIY^{7_iWl>sDT$Vw*rStttlFQA zYqP^%nGht;B5Bg#B&`P%eA=1Q)mEzdHYI4_D{<`}wr84Iu9fkN6~v-T9W%vRvF~Wz z@9E*18iz3>L7fRNX7njCg7TusLsjdSDG&hs5GSrjPT=JLCaXcL_cD7bF#+jP+kECt7Sb0l954_v0 zyxO$!u1VrX$Y`3-+}>Iqj4YvT0uD9HZ3glif02EqGTaK*SOaCd&&rvi>)k$lJLXuLP4AHkn>9aESDv&-{n6Ri?%Q9B)mO~JFcu~DW?^x8+mp0nuH3?uI_I8#nt zcqTbmOy-k$dEs^R_I{B>L|hQYt4SXTrDl|tlj*PzZ|hq3rSA%K3|i;c86#9WAJH?4 zsOd4)qLs%hD|?tsZM!{P0XZm(73M#`7HYf|6IlZ@ovwuL`D~Zn;hhIg&B%*+M3i>0AhYi685`gIynV+vwoi68 zr8Nnb%YX484jIMaA-JxO>|BmVxv6n`izb#n(CXxCMYn_clE`=a+3kSt*$gm0CoDkL znnB>z*6wz}Rr{X>|qZ+#WuQ1u~t!~sLUpMi{MDit@HsP%!~-2jJhVj@05 z>}^fNTEKT)$$jU>p$(XkncC4I{J4L4kO523bvHq*dp#sYo!FoYe>LHYoJ&TvyL45a zGg~aIezcv#tuX_a=3B~vR3WgT3@vF8!BPtf1`%QL-ejpMm)V&9dxl#K->=V=RsvCk zE4C0b6F^aco(B;V(1rKbX1Q=_^uhh@8$5Q!hq4`h-bAnkw{xy%KKWv={CaA{uJj(A zc55v?md0aBPD9I0IrGB(I8jI_hgbi`<@&wbUqwO{6q8NS5NhN<60x%%Kcbnks~Bl4 zqfyhL^|IKvk9~vr4PYPe`?AR_ytROCI7?8VID2oQ+&``{NwJ8YNp+lvf0{y;G2*+h z!(ux>%&|wh4T3@k3HpExlJ|*Xv??FadgGDKF+z9?8radTz*YCFJze(-qlc1%2m%aV zQ|CRtm-knfwnrXbxXtK@GsC|IcxoBH3beNYEF~9*#I8e(m~wiMalW=@JiA3pG!c;{ zv;v<$OYgjAa}9{+oz*_KP%jMFQPw73JO2Mr$J+)qAef(~*?LM0+ znHy_g&)y_w+@An1+I&B1tnI)*%+=<6t+g}3Zz3;$z^d8pP|X)Ql3ZKr8q1-G5Px}i zFlv?KzfBhTa%Alvi z9-WzWP;jJ@M0$Odxh%3-%v&ULyV^C%XgE&7`0}*ENpL?ceElN}ZmMZ1Np`ZJE);4A zI$`DGAJMI((n_=T9`(riv*837#c#s7WVS3WH+A)05wboRDMxI^bYwxf&RPv$C?r?) z7|oFVKK;v#2YC?bjWd?t5NWm<`r)<7>q88AyG#@nWJQz2rAOyz}map-u*4DxT(h$L8<80 zqP__?X;RipPXSKIO-(-*T8f*Ab?WSP2GL$<5GYBYo(?68fH|Uq(r{ChFPr|S(tA-4 z(lCm%rCMe;cMA~*a1M=f{?FaZe7TIU%k6$LQc~eW{@VrP)Redj?Mj2!jnNQ@Q?13M zusbtziix@U{oNisc=!Jm3I1lc!qwQ+w0S))(0{htGFfY>tm@KF;A*hd6RJ^X^#$I1 zvjA#tU-0wit4}yA?*PF2KMpbs%7mn0>jLn)?ar=1Pn+C>F5}HmZInDj* z9ZVyt`V&?8ZEEC!u|Nx?V;6PVSRohum4)0+82wG&n>@W>(I)lT|vHJ;YB`vzymf6ZOLXwsxCn- zU6vH(^{Ufz_-!rPISdnu&lc@b^TF43X2nrNa^6TKzAuuyH-rL|Vif5rSZFs_+pY%t zzQ?mNJTc(ST6q-s$SSJ|&ye@%ogC(advPNSbBQ33!&`4~C2HJhTHV1qDGW~8A?y2a zsU`v%P02Go7B5m1dn*5IbpBn9xV!99Mc6nqy+6}P_jcG72I0gkwq4qL2yOtKy9n(? z#DEqNt>*uY)BzgOpsKRl=glYZE^p`ELs5MHL>S-Q8W{lS)3N*9Nf0BEOXZ2{4eiEV zkSmQ|hVC$+(x!_SJpQ+JSj`QBlD?i*fG-qdMfb!r~fr0Z5d7{<2U zZkc{>zje^B&vI)`Lk7=XRB}hO-u()x{z_9-a`Q1EF+_?l%da6Q)raKr%CU1tpu8%i z_X#nuC&H{F&S}*Sc}7k)$^*SS(}(Z2kpc5>2G~HHkh$QFf_936b+)qV>l!EO9T?AU zDpOvH>Ddjb+jDMBjlL z@o2;ErE;oqEXt7DTr@@N!DVv__eZwll~?L00FZ>X>&@FIVl;I+AXN$~sRfrTG!FoN zo1yZ2b3ETMHWw5Uj`~Y~A7MNwDkOZU<7iwC*O`C-1Wa&A;6$f{X~Yh{C5anG7~^7-Yfya7{!l^L?YMDVvX*dvsM{ z=?_PJJ}?HFCo&?@EgzEAw&Z2=ilH+q4p0=HjZiZ3T^r+x7WdBMMAzv3D2^ zS&eiALgkRkkAp|6Xj^}v&6Xn7q^-&6VMLqn5thh-LQ0;xNmQhY`+4lKAIn^kKb8fD zf}zDf!L;LUkBqxpY@^}v&swT}fmkH}4bXXLitD~F{Aci)X6!5&?3b4xm<%a%fiQ@& z>hnQPw9#Ct=2!Fi8guz?md4iBB}eSpLECJ)V7Dp>n_|=9BpUg`fq?;1*sANgcQU8F zUhLHss-lb_997U2g>L!B#Gr~6Hnp^r9B&g*w7_k;V#Auk85hi-VPHz#L7t|L-bT0CUKRYnEK!Ox_0o zR+%2rv=mcb0ns@LuKmx%ZA;LKK=9Tj;vhm&QgK+wR>3T{8d||u&@1L9hm#AS+vB~_ z^VKSZKLNPoYTV<=p#iuf~I# zzU|0(=4G5>TWG6Rrsp=RamIt$CP7XX%bY`gHDC6^@Npu}IxfX%tq??yN2lIx)uD18 zK-G%yi((vL9ZEfm)0!@T7aAOVr&91*h~)mqp;}q-g0cG&=DenZcO$ZYi7$6g`9>d3?^`-Py_Bj$kvhuEmLI3)`D41 zu#@tS^p)pG`LEf^4M0lWDw{QFdEDnUW;q$c`+F@P4JD=uwJg53`;+?;?(wLKfdj2i zJsAs4vz1i+cL0G;-Gk{NTh(D;{U%sYyKgrHi*S=3`WZV+(%!55DoGDgo#M(5`NY3) z;m0yPynAT;e(iApL@HoTjpvw6#Y>0W{m7>Hqsrz2&0T|?LZ0rr=kBDt;a1Qib@RNf zX(q2Oi#zEAk|hwq8o#N2*D~pa)aOW&9ibqRj}K3JRXDS0oF`xCjpyK9w%%JzAo7N|}jp>@tGl;)oq*`V?^UI{h zy%fo2x2<$oKq81xY8}`#kDWE_MGt!@i(krK4k0#Hw7iR$jA2>+o!P&27*tT)v963`_L3A0x{ZIIB20eiUKlNM8XWRRx20Ak@ngk1Ywv-U919x^44cx>;@rnl&LkdY_R3!Z}LpcX7lCrOtd6&n8p<3775TIR70!oF-$cB%q@Ft>=BCx;xsX2ihOQAy-PS z#o=`+t)2|Q1v>or@y1iIDtN~C1&5;_jtfL++ck;C0=0CgZhsl22u5MBf8P+CjeZuD z2UXoA*3{Ir;SLTC_Bk?$VPe=s^Id%ui^R<<7rnkW0#M6^V=?tzY<35Ru#l=JUplyc z>l62Y&3`=MctrW*E%!a#ZnX8{X+vT5er?e+k;;p5aKV|B>4gT~wn$yau4E1tz9 ztrpB>VR%fLeV&D%w!Pi#>DY?T-z9xWzq7~0KQshGMz-1wRKKA0&T}5^jfF(gcvVIX zdq4>PfIYb?*)76KLYGE5N*1x*mE3_EJ;co)<{AKd545 z2&fzp1*Fpgp`ZU{7r=@$)>q^5SveoEfaXSLH=zK78rowkrnfF8S(V~hkWdiWX7Alr z>fL%f(z;N8Ni_RDUL<}!UH4bzG}IjMu@%eO^0=UGIto1a)G?}?P>>Oj!y5bdCgJW^ zbOq5K-Av*H%mB)`Mj8apI?0Q>`NaqqC3jdMM zWJGRAuSpDx<*oHHo9$oq$}CsNES7xVdI8d0`D_er2j5M3bB3+`o*YWzp9GR!_2+N+ zeNwg9m9_+7y5`*JfSb<+!Ju0jm2ry+N4M5frxB48pM=dVKGmO%^$8?_^Q6Msf~V&jw3s^qsmRGh4R#*Z@fH z^vL-iy}fcgb=pe;(W%AND?mLkem#Z(E!oM~VTFtuS zf`KTjo3j&$z)r@Us=Y8qkvBt542lQ?$VPh(U+!q>%D!VIS9BKq#p8+jJyT~aeAp`d zKJMLXp^gwiQ&hzaFPkdIpN7-L+e73hB!|4xgOR|aNZ1Hxf%{fv`h2 zYu_NNGudME-*(qZX)m1R@?zNDYCdy|#K#TPw8*&zf#J26c!^2TH#;QGaa%x3OU%J{ zJ|aK-1|gdG_tKNes^&o+qzj85;%}9}T>+x~c%W_esvlsQ)AS2?!z@uN=1?^)bkbtB zU$g~!@}QKv`>SE59C#)vMjEzz3m=~Hi72b<{I%H?1S_6m%f{M z{R;T7MJW8QsvcQ3K0bb>*TWCU`MUn#*2Cjtya~4CuR1$fhp5llVCL+Riq0n;vg|7h zk@$XN78z+e^>US5%&hjiHP7U4hW@CExLnP~zy0qenn~kNPU_67enfZ1gGG!1V4l*@ z;_-p805bQum*|0#uRAoo%=u$V;Cw3Q%hXKV8Eo&v$L;zM^0+77&_2lWMr(_9M^JmA z0#8S?hD* zI;QjY?>({&tI_r3em%LJf4!HhPWmfilB_OP>S_`7R?Pl#h?$}*u9$1os2zytY2xo& z!j4QA+T6=HF!OzHF_v6UP5E9+cA{jYv@EPF->(jQu5=znV}o?YmHe~l?-8Qp@&PX2GwLKmsFiaeRn4`y z(pj@#+}nS&LzA^mzRc_gksNr#Q1MBpGKk10`k#!9PT&wiY_i3L%l>U<=GwhouO68L zE|F`j4G+$_XT4!cTZPZ!kY;=?RZ^2bzjFm1pKxz4k1yq$m!}6-G}9m#j-9H&dxXfVF^QSj{%Vo8%QBfrHEq-dt^798Rqh6Ed3Vo7VIMwAUorLm!iq=k?wViGVI= zS-9iGL7$~Vxf?O<4zz{+2Y*9$Y@pl907ktzc)BBCiMSZTpO`N}w637eHSs~sk|wx6 zhf5ltD3o(~6r-PFC|B0edavBxS{M{ttKB{s*=bxAfvb-f@Mm(K@khU#3X|-CXs4+6l3HsRVu?RrT)5IE#ca1JZC5*7suV9NIDM}c zg^7*jm18y3Bn&NMjq?I&QK|~26WP*QD#(t48&S=Y#F!bj>$Z+}nfSfV4+c4uhqKKi zjM+AO(Vfa?=BO5$79J~VJ^R3SkRE)GH#E^(q>JiEgGN8HI9+J&a8t%>n#bIg`7=$P zl@4J;=kJpaY6?beCH;RA8{qg25ogyn%HvxP!YM2a05z;IBeZf!QBZ^ZfgcU+eUD-c zhNR!;Yo+{Fi9Y*j(YLX))8k+99`Qbw$LM2x3)_-r-gJ!1y-j^qt8Taw2MO~Fnam)O z7TV27zPcjzW7AXVbn~F$hq-lv^!O)MnlF70kHh}H-jNhy&hN94oYt@I1*0l{H7tS% z^P_#i#xC4)w+H}V4bef!OLAgEw%p`W@iWY(n;gw|*?aMjQc_a-3RWEti_|I8k}nVe z0M0(osSs+%L!PL?o*!PFot<2cdooR-)P&OU4$N#q8YYD12`J z-dvz zWCxW)G2%Joy=gqNs#)zJL;+KT2Eu`d=`dQ#VCZWGuH66P7vF_BDB9`?S*l5tWiU*IcTc zvF|!UaT8H1nZ{7OQ?w~-l*YQrr*uzZOS_yUvVc>QNkh|O*494s^7;bfkC@jq`N>V< zLGJ4)Au4GtHZ4_+wKuG|M=aLr^qnmgeC2e0an;t6xsiF8o|k-j6cx<_7`^dLS}m9H z`J4G@0E>b?Y|c5UYksy;UdD7*uf0#$KM*oK28l(@PAU^dGHvlXewa<}qh#?@q|~Ud z^b}?N(JZ;8NJ-Q%M?vc)h`{k-AIsp+gEpIw)HJ3&rxb9Xw`Y^HJ)HlLr1?gUiJ|w1 zUAF8@Ggvyq(>DLC*%s1fM#|QBP*A=!fnrQkbNMijXZ^v5X36Em&XPxT z2x1Lcn{UV9UTg|M!6K*VF?`B^p%R(9DFh7Dqbcg>t=-Wz?B?Fduq0sXG4vizd!kmU zHdsTqXYclp(}ai~Bk80_lep~`qaDptQPn9kCJ}x01Ry)ZUw3KCU?VhxQIZq;61c1s zgBQ9zIxK2w(eQUK`VV@*8(~l)0=uO$9U3(gnkpSry?=Z?JP)pvwq*SH@eO=mDj=Z2 zX?Cgb$J#(6iW@E4BQy{If@gYeM?wQOB@gW%{7rsxb#UnGk@RlU#+e;Z8X(Z z*0eDL!KEY>mJTt_%D4UGS{%v{g0h(g_(^YubanCOtD#}r}w!_22qZM?t zUWYslsTgHlI4&<(c@^lLa)hC1BEBY7MWc!N#FxdFo}5d16&FGSD|i*mR^7mwaNJ@Z zTnHscJOJ4ykAxNYEMQ1wB}2AY&er)K|e#_u)IN>SS(Vvvp>V z(vzP3la-25j9V)f>hNjn?HZrc(d4{I+a47-mhUd7Xycyww~=wgtc)On0{E{r!g>&| zxPUEbNzezj)}gOZoXQZ}z2#uKlmBJ2iMd<;iT|Ibad;e~Auq#O4-_}1>N{R9zrW4}fpSM~e^2Gdx_3*}0ML@*F$ z-^E(tooiEHs_jSA=Cw{eozK35aJfKt(&jK8Um%HG*0^FT!!wbQVD4o%7Uxj2?ukeh zMabsSX0dwJ_s#wfpw;nH^X*Z^mz@7@T(9;BJO>n`Y!vjAQLXykk%toJuc9?FT9r;a z`t3|?QUix&{u06!c)c{n{=L0*3O*WS25@=J^Hmr7OvCK{dOC!-{;5R@W^06Q@KM)Z z6T{xl_h$0t`$-2pQR26a81I37Bl(Jo8OA}-yt(EOA9*=2#1mxpGUyc70fSLNb%y)G z?MH>itr4tMDa9!n_k6DMJ&10OI0t(0Sci239s`yDhZF; z7?r*8NBBZTb2lPWQ+R$n)mSn`sGcJ-x?T0U%78yNMeu{#ADo(-+kaHEGQ+O3EZ6uO zhm4Fg=i$Mr7#vq!jg&W#vI5Afb935a+ZDAas)7S{d5dM*O_=BM-deHePY?A6=iQ>u zVu)y_mhb-`E(Fe5!_bk?O!?J}X#N)x`2K-XmJV6;kv~GgcHY0ScepB$E4$adQPSv( zKr;%|m=OKn{)BBV$zRVR0x&Cz%H)>p&Sn|i{#21A#eG`8xGDO0SKUcSn#@L1LN@3w zHB=ng(s?}Tp!g>F#UXF{-alD&5B(=!KUP=9j2k}DKfE}yA-NAvG3b&*=R8QS?e^$O z6X`nu-i7;ln0Vg=5d)5-|5bW0{X&rqAs?U25m$Yp&ZLOfk`Z*+N|ql^Vo-kA;>(sI z%}&-Z@-J%4jYczNK$~rGwYOQQ6zYvPlI#R}Lk+h3A{+Not!KXBqV=w+{39@F)3_Ze zGrg`P6SLSX(bv51bQ53Tm^o%qFIBH@7E5V1mQQmAB74;7kBbeG9`gm_;m-DjNv<)Z zW%Fq>B_B0fTrSGZc>c42LE|9_B~@aDL=fiq?|C49pwZt+v+9yGUiTI(k7&(i!ZnHU zp`kz6;+d3}y!4Byzb}9mLjZ0XOjMH-@!4dI& zhdycS>b@vgyZ zG?IvF>%&hE{f(Ef&0XE~1$lQ?uZ##|D=E?&aYqJ`5gO~hornB_0@~1rtu+BHfh8Wz zW_5PF(*YQZW~|`3xzEQOhxnu~ahuc7vSMQ~kJPZ`y|Yc*h}Y($8m5;0=ixoSq`&8K z#WOMnnwVQ|e@jBVtWs+*ek?tqhi2M|WaWI$bCxd_Gxda5P=YZ%Uz?Lf#aG7=2&dHt zx$ArzP1-$~npT?KZ^}HFJ$e{8m-cB4L1dtcORuH8d?Y)XVb%eo2L9cFwC#G4=}B-I!^RU^lS50vZm3gO zveWeqb3QPS-lvY5j_~J_yNh30dn8C#)W+n~fn)!EPF|19m04u>n~KQ6aVs}qEbcggOHx<`iw|nE zK?#{LI9%U}+wQlJDf(GFAQq*%Eo!5w+x+~`_uI7k_=?7IAn)r@&J7?J3LeKNrndX+ zE3Ko6zXupYyCm6c@{IBx9vQp$Txv7-m)o;X?lO@fP`E^Z*{yOD5dxnZyBRMJ>^zz+ zQT;?yzfBHGc#YuBKqYE@8zTS2NgsW4W;DjC+~U-!ypM z*%_bEScewEF>k+Z`NQc##hi|JiSD!jG-o*M4OdUUFQzm1fTn~N-royz!`U1uNlBp` zu}GPtMl?_Ri}=p;Um;502BZ=HE&L7FmqIu$^JYU*8SXcz|KNXNkm?x9L{SlwNAM%r z!aNFGcYvRk5W2k|cX7O@EHOx}*{mTD06cy3T{bPq;$S;BH)&i?rgI!mj)Z0DqB4K2 zo^mHJq!_V;*s<{IKj$Ren`yMc*CHx;V_$o)`xelin&WH(Qw_=ck0Jd#cE$cQhZYWd zx3U|0kz^N}f8pAj%oYt#U<349AR!~O;`FRLuV`9=iF?<3Q(Wa1YCWYGpN z=uO|ojLcc3%o+lb*Q;BeDW%8T(<=LQV5KWsbOFV!(^89T1!28(mgII8QJCY{c69ng9ACMXlQE#-1P!qzx_ZhS-bA@h{Cz< zRZ~oN230Zr(i+01|K+uI=qeJLYN)|cGdighLXgS(e>)ZR-Ow+%cbWPRXJ5t;Ml%0# zj476u8O^4udu8s)`vrlGh97wv>r9k|Kw27T7nSTG(CeRLkY#Q(J<&0ZI2KhOHsE3V zEN5bZXVjcDC+|FmjHa4lF|6_X3mgJqq7^h4$+T!)hmguk4%=)L=QqTII@Kr2Ldy$&?BDmv~)Mx=5XJb449 zeUW(9d!kXAnwqrt4Qbkw_w*FHWW!gwjo)9FY1R3cl+g9c4vCqWQI0$sR`2(OVpy#S z2?Y_Y*z{k|Z7Z!fW2Stk_zL&DPy;nZb-1sgRQ|h^PnG=VMx9^7@0+%M=vi+p`G>mr z&Bn`V|iNv>yPUnvFTzz2qC=W46Fzb zkad)dfT~MDwk>6r&Yqd!J10_SR6KBli2y0%3||E`oFyFAdccu&@%P*#a({Xo`Em(h zcep5M3jW@j8%9P9Qt4$*ApB2UMSb_qubLSCjpjr#zBc?u z5yTI7hs5EQO>OUkFJlz9w_mrX{-z{B#_YEqZ1WgPf&Hyy#s5NvI{v@CWg}^Sw)Qcg z`JHipmBxs!tpe+WhYik2AXQMUkdfBce6JeaFM#7kY#8r5+B3nL?d`1P@vZ0=x#Mt^ z=SW4}ja?~+=--4LgV&*=M@+7MsEUb=Z)6xLsHn);*;V+ zi1S}5%j70}<{es?nPz)A?i`y$1g>RXIJpKlG&FcDP32;6)3E+Kl;N;g{tImXxmlHu z{~p6T{U%(vKQS)kD*nfPQri!NL9*ZZ3;+Tbo! znlgh~{Gzk5#L!$BFg~&-?2wfXuaEj1mJBss)^z%KEwn7AN51?!a&b5sGxY6jp&uS) zq(wz8RF9aHuI^J+z6_;OAQjwHuXJwhj24kUPvF5PJDo&)+Wq=F)i^jA;t?WQ7X0he zl-Wp8aKecProqyO#ju~%Cz~eb@c_d}IZY9FTcRYbJOK{xwLV0`ETx;wj}n;Edum?qoZ|=xc8V{cK@EyAwjt;1VpjdvJ$2 z&HH|L=Kh#jch=%3>zqD&S3ULAQ?+ZiAG$kP5bMbgeqW7@wIJILeIP}sOgFi2XNx~? zY4CMEv)Bod>rZj_8nX+dG(|--VHd&R0f7g?B$mk;*x1;BDOO~~4E@q0HQk+Z^*pif zL!KAc_x-BSTP<#6sB$svMNVmK{=k*Skfb)x#k{hzl06s{!-!e;<75|{<32IOH9{y@ zP4|9`jX-Yz>vx_5-axYTa$3lIYW|1#p_aayU#jU2+ixlJ20{vJv0i7`>rp(X^1C{X7-Yb70HA5G+XdGdGZ7%_f_e`Z>|p}=67&L9_ueJsXCu4dkg zF~tZS?tr+3Dm)|Wj|=r;p3=e3seVlT9|8#nNo&X3qkZo-V4ePYviMQyN*oM!%R3?m z7HNOHOZhFDt9}IIVr!qz&y1i&;X?RRxn$ja92pAOFK!frpyRoe9#5eGwlOD90Q7tL z!a6m}{x(>v=28IP9{OfSJ{;6N?!`K|5L_8d=I-X+7>a=-&*8feT{NR+d|jFGp)mus z1UGKg%lFvlCv^ewo|TRyw8%(w-;LZF?yY+PEh&@+V0Hkh@a;d#Jcl*eZ`5 z-I4{laHa2E-T3i#FVyQVeXGbBc6b>pdHT}9rLlLG0qgDB1x{?DLW=GWNpBE6cvH_3GZI6%eZ#+Z*7VbE z%!NM5RsZs7EJQ2hC+sGjdzV&N#a%BZslfu=;Rsh~q^cHjIE?AOpTxC}wDB1OCAZ4q z0PW9Y8OUy*D5A?8+wsZZu#2xwL^UmdR%94)gqK*lqdv%*6^=TcT zU3~L5I#}Z^74Dn0eJy? zrf2HPTDE|e1la(H#kfvFog!7vZ_^G89+S?Vq|hQy7ba^ZBi4U;ZaR$arCSj90Cew$ zEg57@_lz?Zie7#c7=37)52s&Eg}emJ$vHvbzgms;>16EK{Z4b&zL%r!R`b9YUbAr~P^U%(i7$Pj|evU4HhFt}FS-(DKgy zF;Xn^w~%|0QcP9a!6kO_84>8cj* zd2&*|k^oH<{^E-N#@sM*zl2h_uyk;-6R5Is2LPpRN*_B23f?aUe(sla!!+^S9%S8- zP61!z+jj3xH$ogK*fI5WuU6p0K>14Y?+^Gq(1gqR{UtF3-mLttFG+37j!KtfPt6EZ z>@>vHEh(U(%yD@g_w{QyhxzdGSxSxcU}=b}IjIBtSQHaW=4HH{Cw>icYmK9^1z#$s zZ5YsQOqt7+V?tlb0%nXhVYTU_D$#5UT?MKC@Jz^;rOJ7b`5NV^I9pjog)IwGK^`fp zKBKAsmjq0Oi0D(~wC;Rcox(VHuen?xhlwOT(BJhS*VLF`dyV3l^-l227KnxwT#{SM zYDACjEWC9WwW8Ka{DDog6tOpgF);yU1kN88RiQ<3jtM%VBH~%J*eU`I+)`XpdvKaR z3r&p&lTolXk3L&AaBD6~hJ->qO^?~uM~^V955AzLK0-x*Z?xeRR*uPM*sl&{Z_C8_ zrmWZTJJeq1+xt3DP=i! z-nSvJl{zDA*q(P7Qb|XRRLYzvcToJ9>{LpOzB6HUIt}wNKnLZQ`H}p~bY;c9bI~CU z&u+=F$2PNrV-WcB__;L7c6Ug~fhGj182mxfeH#bsiZ?D+y9oS0l18q%^%-SOJev6^ zLfUceTaKQ6lKLEmh6hS7707NZH^w2C(7OM7B=eKjWI2@5mMH=*+%b=dNW(cBO9jcV zx4U~~bj4VDXrQN=<6;1Tu>%=L`Q|n+z>u~aV^|DG6XcB~L)9|LXtMaAMFL?+$#P$n z+?s~PASpi#vpFK6I_YmQ&Pi%MY$?C2KNB4aOz1mRN7b=pg87q3B3PLKTGYVLYpg0) z2<9;xe+dosV*lG8D`v?&v^`?I@TPC+@6UN_6pp_gZQXnB4QG{|x9R$CzCd4})^bo1 zAUr5?QMLv`*`;KLk>G!!PO5>!+9EQ@Mx_-zH+Lr*ze$O|b@-@^I94M}qK=5Asbk$+ z|I{j3BiO#=4Ilp4@?C;)r!61frpYg}0sprpm-nO`vd`VLWhrF^gQ9UcMo(0q2?=ke z6?MzvH3zmX0Pykg0T`P?B;|c2iMOmDE|$#IcspKDuvRz%4S|R=+pL%Ic@ey2n1K8i zD98SvG?yYqX;GQ0so0^v-497hKfEe#wVGmd@HKJzom1>4mRLJs?W3egs3f4{spC`2 zHMqJ}sw>j$$l6tqX;~fJD2hUqr^Ibkk-Y`e{w~JdLmS__$85Df42`wrlPB5oMym6V zBngRN)D)dUa3A4#-S!c4az~7hXi!Rp_n`Z&seAD1f9^R-2?c|Ge}~VG6pQ)t1$qT> zI-m;e^fr^+cG`{Q&ySDi@cz`gytZa6riC}Xm8fBm4oOf*!ttCJq$5*FbiuKNOb!HE zR=QGx!#;BYj8qx;s@YubT<)4dzd^^w3&k$Tclo`sC zpw-yP_off?wPy>l%Hy>SzTJ}YE1Tb1qA6|$^;egCAKk|gUZr7 zVPS#~{iS2?#+R^YgbfY)w!dBD()qWo4SlTMq% z&JJ9CwB$ogYrfooN(afWd|`MXUygZ3t^HMPCXUuhEtOP}W|l&z3qPf)_Jfia!LVD? zU#9_ajtcK9p3U$6(#3DUWx#!-k;F80rvqh~u65WdDG@H3}(%%Lo$%=`N2LTI4+Ec(6twke{Yb-qmsrK z?75tnt)SN4_^?Cu+#XjNsd{UC0zxZ6MfarI=Y*H7KWf*$jZinfMKM-x zWM!c>Ux}@FN%V`?*;vXjVux7%rT^yIu+jznH6acHAHbYRK)eM1NPeSKF;bKoS4T}4 zAeBRpD&Ru@RZ^*3|BZb?y|{ITHVFcD>r)mHOyX(U8Vzys10CZ%?u zFO$*)Y}Or1i?e>fHs<5QD2khgH)P72tDhS@>Z}%@d*fm%PeF{kwa#?0v(Yy zV@*cvC?x6ouDdeKC=}K^f+jr{EAz*}3dOwj&)na8o42ugOSmz5B@@^NKp=r9DaJ;0 zc|z1RHii5z%C_{1xP`TYdVjuAeXNzM{2g^*zq=n2;)z1ZAV~1iyGjXdv_r~3F}r;j z+V~|ZRG6en8qv}ObjkKn9M@;wF}6lxJg_snv7m|IBBpop(S_{Y(V{8z_4!dOqIV;B zJa6HOSlY8d;nPXnz;})%a<1YD#X#tIOib=SX_FuCvs7+1G6vDv*teNp4*=O16lL7v z#ZhTPsKNTWhTz5T#lyq*V>k*I76$2Z#^uGc6tPv%fP>Z<9Bv{l z&AG8IwwK&NrdgEtJv*a9BzAUo1N^(Pk<7rh9<&7jx?7ty9S2|&{>_o!6BQwmR=ZI9 za&{~^13vbhmCdLx6WtQbJ`GbcGj0q7KGYQ-*UgmNCmd-#xIQ_)ML@ATQ{y_&pf>Uq z%l6KEEl7^{=^KGw|7$B_8?N%}*WJ6sK)=hkZ0s(+D46XZ9*{y;(uu#64g-{Yd0E@@ zvubi_-5RYYVXK$>wU$eN3j7NZ%oZnPyFc;)=luJhM~@zv zl{2K8McM@*lVNJL3L-Dr3z)zCB3w?YCu8KWSa5n}s#{x?#$hNhgWQgLYc=IB_vL(= zFrM!K0;R`53!KQBc(k<(A9$OA^F)uBn;qWnZZi+#aW?{F6l$*hdHWf!jlZx)v7h z!)S7W-PCBiAO#lplQk{JQ^M>AY8($OiiQSye(o#MM{C+{1*7d7j#PUuT{`$bx1>6v z8*07qrDfo4BTP>}ws}sMr}`qvtb-0rLq{${z1RB^4r3`HEWZ%L;9bQ0IlPfGMDn7ULkIgNi~SY9mRDUwHaNu*!1X6&F(7f6R6w??uxt2MAL| z#y9*{v>qJ|Z)KCJ(ql^!@Dsm9F=J-5MI0tBq1OG{Rj+ElTb;#h!9B! z=dg2dRN3BQlH?wJ@5rQJNZ?Zxv$Th&&9$>j^-uDt-~N*=Xz7dnYv?ekmd%L<@DHma zD5^~^}7g*}S~S;^3P@Osb@3^H(j~GWxhzWy^kcJT z2&C?NglHzSTXtRba?H91^yM4NAUCxc-ZmRa`vp`J$&x7+^9G-!r0b3T?!tfGx3)vZ zI6WS+Zh4ODp_8sKBHmXKs#B#dMVV9jStbGz9`BDpGW91XCntxeN~LnCKFXs}>=;*T zbqz;sW?~p}l+2Y$G{4h{yf8x8K~^C81*7NXFuv>}OQMmOf|dg!L40-AB}uB%iJR|1 zhe_gsDhHtendc^OxPDdt6~Wa=Th*7EO`BNl>&Dr&TrXV}WgA@xjY-Ls0`GdKHZY}w z(f7|Z2b{ps?VyqN5bd>~aNN=wkJ^N9xCo%hNE(p(#ZCrKG(a5gWg)=9J!sKtOsvzt z#(i+aE_Vtn@5bUwK!;?>7}o`e;%DeUVPPAKUZY=bZLhM7{bsdcQys%x{0p)|?j(u#=8%=!2P$yP=TMR6FKI!ikQds<+)=HCgT=X9c9>mL z3K)(%<25ILVO%mn^6N)4nNy9`RR&@5uIwVQI6aPZ2V?r?U_znCeVO0{!7?6G6JnwJ z3@QfUi`wSQReg+!?v{Z(&x@pxhTP)vc z0Qhne5>_eJyTsDQFB!?kLYu}0#}M3jBY3H`&Rtb#)g+4KZ#>QAEAZfEoSn`Ln|(e;sf6(OCSenLv@WKvJBIvnzOQbHg8Ag|Lg(9h@h8vXz{Yh~9 zhf#tr8{46xO8@M+Oz%`A$!LM=>wE+&YwK@zVh2)6k?D1eIEq0#yr=Re+@; zz$=A9Eb$hP;C1L8uOhA&85^Z~s=gy)G|qV!M8)yIgXO~QeEX8Tm;?`}A=Gvtm4x0c zBeR8SyxIwrX(Zd1JedqD!cw_D{pLwqm?GYMP5>@3u`z5aqEt!J*~<^YA#axhy(4Pjn9xY--5ag$F(nSJ4jn9cjQ^PBtp5>EH7oPGv!}c zqy-^AV2pmBCdkOh7~lvCEt*q=rE_z;(|wiK6WO|tnvZH`oML1)Px8T1#pgRhUG#TutkUEZF;aA0QFfutma^en%H3g zC|Ok#&?56K8~9(CHB#f-#5yrxU7?I?qi|1m>AjU9lx9ZN?a&eKu`Wok>V=|_k;URt z@86}^@V{=(KYxM_5*A>kCvFc-?fB++g2_+QoD#@_+g+aynE$%0qJ+(bOrgZT@37^y z6@xf-95K&EL!Sq|RIPt;@dHPE?o|jbcmOr%JS8uW8q)idV$+Dpsix-d5Tz!yv`vvJ zyi5IvxYrV_wh|N~&a%IsjzuzwB`PZV{-|gUsHFoa55uefhVqOb8VLksyp9f;i?1lF zV?@R^?)btm&bhmTjgA5ieQAtuY2JAV)~`u3$TWC#CQ5&6Das6L_7OPn+nVP!*84)$ zsKnMQmJFCrF>|4El4CXB_uN^NygSOcs*;k+^2c9? zIs)O-Fi$>s`lZY0?IF~74_KHoSD$q%#oyj zhz`WtK%!)7A07^|z_Q{!Va7m#I4Yedv^K#6QaHadN~4=5S0^s7b3m(7+IS|*ee5(K z;ap+kay;VCA@ddy1&L8?U~#cs!&3^d#hnJ}I#+s#TAe5}0vfFRrd*7w*AGc}UM2mL zoU)3(!{ld7Keeayu+bg;ko39uCz@F2cp9V7gJB#Qn-hY<-c|Tc*YeNg&%X zI=Kt9fS6DZXYhvShPnYEQB)u+th1!Fo9p~!Y=G{$AcE8KW=!;GPb3yLw(4FVte(<* z!r2S>N@@*0JI+7715Zerh!nD03wRdaSW=Z0tdu)-H-!T(*{p~iREC9S|6f4>eN+zt zn$2m9zkyVUF(tbeX5np#y^3Ecefub}GCfo%Pm~OSkP5{^18bRTF)soOzag;v1c
t26&h(_BVmfg@8Z65wmxOz?I$JiU_q_KbAiq;N~F{HnO)Cm9Itw6iRwJsoZSm!Dxu{cmxTPIfnKq8lU) z^Vi|%1{X`AC4ZI4uRQrW7k?v*d%YEt7eg*!nXwdun8xV!u5mX=${Qgs-Z*kEzH-GQ z*|+^W&`P>3PYno&G;kx~Lyu8p!cjF_IaPm)p0AES*B_O&U{uEw`5v??jqzeg#Q0L6 z)@F>v$H!-YzoZ~u1z4c>W30~afF6+3XMKPF3A_K3g0@2wtRlJ_^AzVe!Bzv@^LU{N z)`#VJ)&|(1^NAZ&8zJ0CrV|LGlILFMx8+Tf=n4(8?sA-}9u|^NEl+#-m*J4fjQC{f zu!`_F_&+kXeB9^Vn0&+eLN~6c0M0^lf?mWc1I1n*r*(QCfz60hhE+6E_yR`80jUN* z`7@g@k+cdwuwK1FB__sf(su^3G|rEXfn)-8A`Pl9Hr*3%8y=&9H&?R?LO(^ z!Hdt?PusU;3s{xXK7r1CTE#|oL+fE)ASS%MTTVvcab!^e@Ho(yf|`~V%)o$FY`L>* z$kk7`9%}&hT3+8YS?PFAf-}&Mnq^Y*(*L(m%BxWx9EGoMi;qnJJD&PzsCFR@Y!g?` zc;=HGPr*9+rUGhwa4B=nETj#9CO)76A*{EcU=o0>cN$`wluwn1A@L`i2l`KCd+Pb1 z^h4hmqSG7@&z485c6$>$R5#uv3d{0Cb z7D~^mDJ9?5!C?c{99xxk+;W|xVx**mS5et=U|@+tA^;^@2AmdiK}SlZI%}YQ;2&dA zBo6zwr&attpr-4bA^r8J(t^)_Z&DiDRcPmGEfL7cGl}*H0S$_C0ZaW&1b{YhB`#0R zyCR&hei=?b8?HcD3fosqq5J}XC_Dst3`Tr#2{LoAyu=eo5y5g?^#+P3wk!A1^|N3s zw*5opH#Kd+q|O@3fz_#N{usm2gGkMwW!js|A;aFv`y$h5dj5G&cP|(2JoByhH$U3& zL+KBP{WsYfb&ca@PW_`>a^uiVn%ZlsEU&&AY1rmIp!`#Qy)xmW=4#yq69oUzi#aQRqu+^0?zklYkM0N1qEehc9tQ8 zO3wHDlY2ot*;1`2MPO@kdy1G1&C8hzelmjA5bCUj=`N zZ!_q8M8Uhe+0TEmA11E`UwQu9_VdEZp$#wB>ESz>zClLDcWbLA0cO-}6QjT2$rRmc zv*Q9LlGz>U8B^4h&)Nt!gP@E*#hjj82=!S35DiVkq)an__{*Lu&&0-Ngu!prpQLZO z4;2|;q2Wqk=Gj7Lf)LepF*2=gjIYnPzVrQh@i2Z9(GM|y4~JpwCKwD3Iv;dlYxu(IeDpoM4(!U2OjXIXQ8LzRAYlYiUMIsXq7ccD#+b9z;L7 zx`1{QcwJp1qaf&ye3z!o*Pcg!Mx}z7-}dCa$tZxcmXHHGS3>SgSOr`l4^dlb_Gp<~ z`xY`^@);Vw!$X`I8Wq{M*Wdq_->fI>-HZ#h!PKS2VUSFKcz-SfffUP^I4SL>YoK3& zy1E)8PaQ!?s`YIx+UGV>_4)M(z5Q@mQ72E#&-59h^ArT8!4@|)vz>OXd0ML+qETR1jRnHB~$i@cpx;*F|yYkcmtuR$(oPB%u{IsEt0?gP) z%B=e~q^+$D7%s_RlHd-R`axXse&D|;L|FwOmGnxz_qfNh}o?W+lTLXS)Q)52WXvvzSo%5A#fE z3fyP;7+SM#Ivw7)VA<&4btL~)*z8U$;-sOL$5e_^LEMloqzsv|&w6aO5NFdoy0F70 zTC4_FOFvhL{1El$lE(Gz_W>`DERlRqvQ}#?bl>_=Rx^mx%@b@N1Ola$$`$En7nw3F z<3RM3poo3;kErAS>?wuQ6$NN=SAF@Vw{|G~Mc`bMHTQ)Em&^W$Y7}E1$Oyxcbngs$)`hw7CCt>k8uz-kwt@JEp8Q6h7Pr^>=36GAbko3+ z{16Nu%6W~$f{am_bwY=U8(bS`ze;_gt$CV=D8TuhA?tcrl@Wk{Bsq@B>LNEA-5el; zcTatX-=7PKJM2vdb4z%IQJqh9s9YH*Z@|s}=@q~K?C=gncxr*bdc>$ZL#xdCTQs1} zU?jeJqBzQ1PeDFO@4r?8N*{%mn3x!3%kQ@O=2ND=kE(Rh>kY};d@YsekMg3@4yezb z-QfXYi24SW@O%WKaoxuQlT8>^ZvYj^Kqmb}_)GWK?DS$%=-7|X>ff$;SSt~ew2r+? zZ_vwt=B^)~i4qV9Ec^kf?09H7u@L(!o;z4mczDO3{jI;!bJ0!7+y4~WJ;&FFprB{l z*CI@Q3e7?XzYHMm>k1R>YKT8jH_@GS>*?QP2TEJtV@fHMpTW`~I81dxxf8E8>EP&z zwNuPBJ?~&oo3j?F`L2}KbdAG~z)$AyV!k8=#IqGkk1(BKySmkO{$X2jsI2R}=%bdu zJqy(M5Y@%Q_6v!^m zBR($Iu(ZJ2_8+ZO=HcV{K0I8B=G;W{e_Nn+2f9|gLmRyqIqhrIYZ~~UY{f28MF{v8 z4ifAhZ#Cy-?4Q8 zoOR(Oc(JI&!N2{!QV$<$R%8ELaUXUn`05J^Kn7Ufk)Eq>R(ZZ%i zc<1#Np8SEZ_{4|0hTF@9IB~ioPo=fUgLveFy8pBqtW(ERgv#{fhf=S@x?Tym>TsJ7 z4u${S%ZajH9JRJ~VP+t82@d>E@pur1G$gSD`~X)xsZ7X_2Q@N5CiCTzp-?{P(aRPv z*MeI6PZv)o4PsCu7d7dE`2JY6>2n@lKE?`QNdY^G{HD#Z$prKmYN4bAJ;A7{L>4Vb zCETmU$UO!DJbn_P>J{*t&e$};|E*`TbZ#hw=pHXVlK4TU%DtFm-jd%#D9CHhXrbHY z?3N$N0QWiLu0}xKQsKJkdE@Y}UCNV!o4D4Jap%*q{RTvmmi&|bXUVh_oo`&@n}7<@ zvye2Pj~_tl1XBy0cQ!?u_O>OhDLFVCY>q2zd1kMKYy|Z7-<13IJk2?$Hs z?92D{G(Lro>Y8_%&POfkQ-bo>44g`BQ`z9VEMq*(|ag z9Voq+D2!4pKArb?-u8`*O!edK_mqRPYC^}GeP`{Pt9K~~sDozD&+VBK7i%f9cMTr5 zu@rP@`JfnCHg-{o4Z%WQl*a$!$S+FIPWpiu1w`N+gFk zP4Pwu9$JLZlvY_3F66!_Cfh?b$)8pj{ou|V8o@W?_#;QL`FNG4q~H8dM@gytsPNK( zYl<*Uz0Pdw&8O|CsS=h>-7gvKHmL&9K(kGW%(z_|KP2ejzjmc%x+ zD@j=wn8tX`oLk9h=)Uv;OJzl$e~<)GB&!JxQ35g~*D$&neqN(!;B*An&*e?NykE#< z&M0Fx<`7$Sbi$AjRzGUWRNyoGSvE>eo9}+D8dqWK;5y2}Ud8vEb%WfCOFZ*YE(wCL z;G+7vZLgBrc3u9P#K)boo4iPpX%>ZXZbh4Xy<+(#z06!+hf4kV=v#}lK>E+n@%>{` zL<1-sWYR*+yxoGYZ4K}A>LseK1Qcq;4O`8r1Y1jz z7e5_}d0tl+*E&;39ksf4Z~I@#R+kHTU4u&Q$nAWi>JNXBjY^_ZV0}lw+50T9RBMLGwfSa7GZcc*@Zgx_Co0$t+9zAZHx?8t5fpi)zKy?juDvXJ0 zgeq7n@oxPy|LYrdTCg9*>kL7eC)EFxJf@KE|l$&BB3lGd*U8MKGA zFF>0Bq4j!(1Judb9b3-NT3r<$(a9zr>G zmPi{*Le@SIBlU|H&CblCSJ}35BVW^H&cGhFKJKC@O#cTn=>VjmaYxaH(FM_mD1$&+*T~n3N?>Cio7)vXH zWoJRtWZCs*$;=P!pB}k9z4ggAnwCDNSTm=hI+n^|mF-1eMp#j2r>N&{ap88$>uZ90o7&k~rMcUV&27q5jE|F7nbb3=B?T7y&I%=PJ1gT8=anCQ_AA$06p|f z@exYEIbd0K|7c$vW!jUV2`$ng;z9AhL8Qom8nk;8wcVB?ol`nS&hj169q}pJDy6>YIokcG_xEdEE_*unqB|>T7n0W7GBe11+Qu{uQ^y4m1Xezt zj|ur8Cwjx}L0YWetRr^a%5K3IC|oWS4GpIXYvn2t9lDfS>8~Opth%l zE&0OzB+Ed=cA0YTMWQvd=(s5B1uQ~}h@grQzFeqd42!2#ov9A%vG)e0S)M%~ej8`be_-l=cCM~H zm&Sl|BqE_nnvrLp@uh&?_sh+la%j?ny>NeTA+h^yTTttLhRyBAo%?{=^m*T_FK<6t zHQ{R*@AE+q_A3#?h%`nZqCtF1zm53W zfwTAbIe#1_rNlUQeyv+lYZ?ko_4q?e^8KA*?f~bn^9-Q%Z_@-rpiW72IqGQc;GDsi z*Tmd*Ie5fwEQep63bF56UNUCmz;@_o=q*&JN4y`GydDyvJ(1agtEO^$X}#9{@6Z!01Xodf|+aI_9zHu8MK1%r;oq7!H@D8Yw0OQ_bwCfJazYF zd{0@H0IK-Q?<-GhA=s*`Cz2`0ZR`>tOB=c@_zV+uy@!Rxq@-_6cN4;(veein8K8}= z$d3wpc{TQ0@~rI+_0|*g$K=`s&uPLU^0v>eP`2G{hPF_xq4ZL3z^JfT;jT!53f?7^ zi$6QZ(cSsrlQCi0LHMfsJ@WGc^WnX`47I?AIm0|-pZvWF!z48)OS|S~B=y+*N&Weg zGnqx7qm)G}jj733W64TZx!>@A7I)8i%GR&7TwjB3xEIT#+miUw?6`L&tym~>tllr< zB4Uccfp;k!o~a@MeNsW+-@@F2!Vf^GKf1X8p^lJ*yZjWJp$4-xOq(HYnI%`cq2cjj zL66&)W2XIOJNQ{n(K*hsYd?`otVj{3)RHDl+Lz;TNam za=Ro2W7K&W#sAUsAtXWe=M?$2iSZa&rujSKyl3rWZgy`a3;=pMBrNZaWke zsb+iN(qd)u2^qwhgjz28-WxE|HD@$cptB-I1Hl;{W@PU{fE(Kj0zce%em_o1WHUfP%r9sszE)6a=WvtP8TJ>ZaF{E{)nv`h&(SB!GJt5X(ZN>i zWsMD&&p;c@_7TWWo(uv!*=g6{2Q~_rk?D1i$BhEOcaHGfSB@!j48DMLVC+$(1{?PB z4a$FCj;8{MDYa%pL^p>6T)V$C$X_h%hhtsbM%O0noc{{8FncW==+^VX%GNp`(Ogu9 zOD$DGjS2r$UkuII1QK+ajts(Etm_&C;5YRvz~V3WUV=6Rog-c;0^i+f$PF!8t^k># z!hW6)?5m>%0H$yARj|4c%ox8Rc>Z{zd2`UiBiO<{yT4D@eIFj!{I~K2^De!r`Lx>b z=Q!r;IrZcs{Sx--2jJBw8T`Ok53(8Y z07!=9y8wH+tBT~I^nSY2C0ZP>e~zv1gi7Y@`^x6iMY?6!N_a}@Gg%IV1*Ys zdZ8=Sa3H)p*8nK`1JQ@zCo3j^@r^!lNKab_#RjmF8P;fTttx`igm{k-NvG*>Cg4A-kpAeAwTw{LV$ z2)|>g1VgS2D06-^n0;Y`;SnnE)kjMx|39nZEu_?y@&eb z7wK88AS$(ja_q#Zvf`nZ+64GWeE&RWoK*lu9q!ZxY`@qcJ0Pff zePXajOFRE`f#u$VR!v3F-X-fJrDbF?!w>$Ae$Co^`F`mX9UO>l6}zj`=DXBAQ>r#> zUwg~YzxZA%4@P4@e-sDtOEfb5s9;NyM`Mw5nQ6Oilq|CarXKdB*Ac73mOZ*z&)50rG{h91=fG2JB&X#C9)IAi;bcl-_{(3)?1=>~&FZ04XjDIB z%lspE01r}^qte>~ zBnBPUL3|kgzVPp7$%)Fu&(CZtO~-GD!k2GSO=0nM|MKurPBB}n@0^%rmt70fUGQNV z;mpOpN>wNz==W{3;+Qa#jOy1f(F%xcRWaLjnxQIKB=%N2w>>3z81n5~YRo$W6G(E^yVnZoq@+wy?zaLyhw+PXN(XI)KjWntJRahKuGkzM zwSss7oG=dH8fBX{P0KD*S_H;zY}rLGEEO@zG!%#$&oo92GK?AkD`m%5oVe(!6&HMB zdb2Ssps-b%uQ?p?Ey%E&P(^BSp<0!)nrY`*;#|F0UU-QF+F&>=AR2TA(P*ojhn zMF&zpAx{)Y?q@~WP>ua1tG52I86!^$QjaU6l8Q2xxp%%@J=3#KbHkLlzWLq(j;u{6 zZmE+FQDPVkFW8_bw9bC<_;Ii0^}I#in;TXg^<^xd@Dss|KOACou3J3L3^E7lq@LD- zJ`eA}pqh0Y9Fyz3n$*&L`a04~RNC?yNWAw9C0N!}Oq)>oGX!XlEPyieIMvPEZ(F#D1uC5NADefvS56Hh}8 zTGZ^W0{<)*NbVwkfcl<8i$qwS(;~shg+B#Mv0?}8`6-CA(pV}VwDOO)P(hqR1PPyE^l}tU-VMY_ z_GnlIj=*vHfr9*a5l zff8|f8cACCGLi|FbQO|fp)T0|>=*RfneMpgX$tDg`;3c+d3t6HG?L+8<&a}g6X$F< zse?^SOtmEi8wEw9kEEk8h`0AlO68x=J$Lz;AYkrs+;;MbR*NrRS9j`D&l;O-wYThF zj`Z=J1kc1GXb4$P_%zXCr74787>C6X9LMvfu*MwZ0bf z6>NBSPvSb?L!v(fh=Q3HXYFR_t|v7a52rw`(~*uem%=<&bBmtH#3;(0Sd(3^&lmLQ zP!jZD?iIyy-8ISsF>C}ftsuf|BpAslTJCuHf2Eo2Vf6m??78de^=t7jiowqd!Ey}u zzx+{YKCz5MV1x355{4Jqav(Q*TCL~g4e<}yQh|x=9LAcd^LvBji7)f=G|hO#yTk*| zT83mi&6M7lCNRy^x`Y-KqPMoa58eETYe^(b{_W?5%pqMTp;Es|YJA(7o2L`Ap(O}N zn?N+vl3av7b?!Z{zm>h*yT-i43 zSk7%N62q}wdKqj>78p86vxE;B7(>sij3?5@gqv^E zzdD!rxD>a4h7v`i4~Q&_0Ct1Ij;4bKQ5)4jJblWwmI03LWX}xCwfJNE^qbOay|>xs zQobnd%|&HOPk*mJ*N31HQpMIvkB>yh8NL`~MLDsdkCg*wtLY{Z(tPe8SYLTTR-C{W zt3>m#(b1=SiihsuYPb3gQ-i#1DD7;TP?aX>J-ejg5*)?>c~(e09WMtXWtjrEp@FVe zUOKyZV3G@dF_l3MuDNhOta% z6V*n>!<;n|1omVOJAfK=(cf|&h?@H}CI<>UmWAE3A#hII9mmWi5CDE{^^ZhBrUiNB z4GqhX-f?UCoabo}tuoy+(Ur5lXLGgV7Osf*^-0WBiEcOd)2Obzc?%R~*6v6c`jd8> zY7FlgrdBUd%UYI2LS5Ht2yX@rtJm6_{#DI+{QR!<-??pQRRLoy&8QOOT*yaW)e<*j#=A(|rKHefT~n`0*Fu?7WJ_T~_-< z%TQB3b(#bl(ZWnGH6urwwLT5Mwoh$ogxw<%M9}ey--VxUH*%O&ax_^7N7F8_Cje>X7-ml*1`5@iSqU|zk{};9Pn2|a{iF0t$6>V_n{@en9YrY@NsDt2zKNZa zkdW=duTCy|#bqw%Vh<_KMUaqtdtX~;*N5>G70+$;n+k#GJ5%8@B6`yQT?pdw11KZB z^fOH$VQ!@941A*JZ=M9Cu*$F^d0O#++Yo638qsbZ_)F;~0^Vk8jPtvj_(XW*m%d2n znK!=&Twf_sv(f&TZ;~00XpD-waC2qp=g2UFkiN(O$s5m0dz2}&9n`vvr@TA)6-2T* z^)tq&ph6@@2%NqCI{DX_1MM%d|Ha;0M@8MYd!tecDAFK}-TBiWAGH*L44g4RO0F~QnD5=;4?!H~GP>AxajB(|z0 zp*vG=p2?N{Ev}Waqlk;@B_rB_LHmJ?%@bqmSjq0Gol9cJcGfQE3(g`d@5qDKy;=v3 z7vdmM_3IgWiH68}iXzc+lf=9%Lp^I#86f!6mDhFjp6t;cEt+pU#EzSo2m zh|9vZ78jaN#C3e5AN?7+8Q2q)Ax1_eV&r`8Z#yWu>Q`Kej5n#iD6)k+0x?<~Kci({ z`R4-d)}`o&9|3*Lb@4U+4sX5hPmGU`r_~5AoJql!s05zCyJac}9i&hu+R%)_l-e#T ztX159i0h`W7gWHa!t^>{y@S}656o2imW`S@h12KW;;KxzoS?yzs;BEI5Fw*&if0yE z6V0?ek6C5uPzD%i5Bxs{I9>;=PcLu#X{86>@}8_IM={{*yBVnF|ucwJ?fl*QjkF#Win}uQ}VUpncJ_2%jZFd zF<|QeZvJ&ID8%1iOU$@{>nsp z8Q|tVEuJrziEbC(OJZhf51;z{QIRIV15){lA=x%Rp78m~SpTJnEEVeT`Txt|+czL1 z$y`{pTNZC|W?seAPjfsLeN_)}$ax+c;9xEwlvKYLZzl@Y%y6EgFQX`Rs64JJiIUaD66o5U#^avh2K*{nxjtm!An?M)M^_MI^{Uys!KC&QG zUxqU!E$w4n_3T<*+}e7xLd&R;xqD0m{!2K0r!I0TTfcOJ>2KD302uABEFlt+MapdB$B?`9%!&c2e9^6(Qg6z)$KK_5P{qFJa+igU z341zCcSfm8^$B?O%O#ai2)ctG+5Oe3mdren?(5P03{O6=Ot(y4oKg#jvy@3oIkLFe zDeh{8cXee9zF4aa07*Rz&w;x4Gb6q)B` zi)tP+=AUjydzY4$w4_UnnarG4__LM=!Nfqc+ApPF0VQ-Sxu+WR2=sS?$@fq=)rmR) zr?oI+$HRzlCnPp7}ReKw|5quh@ z#Dy@wzZ}i(XzZ21b*}9J_gcOKB813mubDh8ea_x8l!>Xi9flYDaIF^KH+7}JYEZ-E z3a9oKgC2Vh6RuK_)qGyv!s0l#m1uW$7CV69=!~ptQ=2)`?V&;fs@6&_K)r*M+Jj+zZ># ze(v~cjmmA{sEe7>@94zt$DW)OlIsw&W#{brN4BD7Jvwez}J?*K1eST0A%dHfZ|~~;6{ax^UsZk z8j$Ng$KpGj48@BP8oK3aYk8>d*Oxs!Y%9Gmwr)7lsrHf|YrcBjnpVZvqj(M$m-}3kQX#>7<7{qSqfL)N#0S%>^Wx^On3c3}q-pE$Y6<>xt&k#C!ryPN;vd0-FHh zAKTS{I@>{%$NY3cqwEMn%I1Vh_9;sHzlfh(Tf)DqSE{enGJ(BJG~*8WixB&wT$kK1 zn3Mp5hYo&$iujT{Fuz>$kViHLxC1ru&a<_GLNV4|8lM+-0MuMrEK z=d(r?Aig@7!;tJn1;mh*uX4QI5RQD?f#oC$(ag0c3Wc-hv>ABJSPSVVc8@kV4V^!5 z!C@@y2I`AAtme`vhR#nd$>3PE^dfyG{0*^LK&odC}la z2&5Ued+uTU+CD3=een_U2yDVbnGj8U^i;sq?9Ac(b+t>K$;Ek9tVhyIq|-YQx_9Er zGVBhm1?ps3SS|#%7a{lwl|rLg z0irD0JEATK13iQf-oykrWcOwW7Ms(&pHRo{wHC_9H7rI zIbi`+CnF+NY}AL)Wl<(HA5}!;V$cB4Uu_!8)vK%AgAE#u(IT2B7x{}7`NyelekKMETj*|e*l}t0i2wPlv+XCIb#?U|cXI#NhGw55D6`(|=MzBs1rFI6 zz;L}hzPl(x|3C%!W`j%*#3S%TPKYplVA<)%9a_M`wzEHr`6WL1sAR1Hr5j|itbkjv zrM9%X+L8sJ+QLsoMJ5LoT`dWcPNQ}kBGS>hz#6GL*KBwJ8j!OYFG}^DqJV=l1KHnt z39E|6#Y;=S!H;-(eG^so_~-K9e|*E8>hl+uuZ*wW1yF09eM}M{ep0iAm_kY<`p9h0G0T#YaK9gIY+_by?#(M%NaiuI z*sb^iV5WI=KJ^z1ac_X9_>!j>LSgm`G=9KsszS^2-AB_1Em|Y?|1LsB3!0d4f$2c#s>t;3ww$Zm!ZdJ zM&yg=_lm)4nr|F+Q5 zyf&dCaf<0;aL1i|+1H3YW;g}wyXGNST#SOI_Yy@Cp5qp$@qQEJwPD()!IqO2}V+!^?^a5Avkz$Is5 z80dA-!w1yBlqOz6TvQYw4zOL8??1N#0bGw1vks?U_5LOR4E>9G|36%~MKHzxEbRY_ z6C)1i+}{1zUrUlPEF0_A1#VI=uKPE-vE|E|fZi##wiQT3o)~ifY#Zv^&;M?QRp%if z!rqnvbgn;f5&v(iYr4@j$>H2Zf%5); zxXjXjuP;U=Uu?inWD@{vxDTD^0?aw8v(Q_iFxz|g(NRcoAP=DW&0Tl@K=C)_Lt({n zFJZ-1NS~X8I^@xgKuX%0Q#J?#BDQPpzfM2?k^KK_`4dD#V@yV1h(>Hv=X^8v-yG0t7SX88L6_r~v!!5z zs1&JcC-Q_6+2mCDGBao^D-?aB%%6roSbn#lot&8M`ywtvix|ws6+xe;L);uo-3mO~ z6BaayeGAZiqSRlFQn*(@&(FVzgYgL5pGm%6s$dLu~sLY7XWp4v1ZHNmr=0Rma~p=@+ac_3Axe8u>N z97um3ld1l4eCUq=#cHuYrN2M`mfuQKb1Y!BCdII#Zok@+W@vIK{CBnwsY(0>|4>da z|Lay^T>=K&5{-F$%^Y4(ZIc=o0cFjq?=*T4-d&{@=GkSD_&7x-<)%W!XcE^Dt+0-) zFE<%SFVyxLvI#f%`e@m$lpj4$8w*RF6L8eCZKQu-NH@U@R&?hS7PJ?R5l5W)G2_1J zhD2-OZdroA0taBo?>_|&GAi_yHp!D&KXdDJf;+AiR0Z^J^w~!5+QH+}cbAUtKRjI) z)hZUz%Fbw)o9wHQ>rd|Cbjba%Sg3il<6#>v#L_n1daL939|_qXqyzte6ySK4e-Vb^ zk_Y*w7+w!6XkC3%8JeY5o40z<=NLIsT6a&b@5-BdHuf{?p*Y*bhKBlSK)PK%Ee|u@ z_svB>R?hcptQxX2`NodpYy=M$*tAzlIn5Q=%+;>(0Cr{luWa!*)Zu?**Hs_x{6+FN zPyZghcyre{_3X28#LibAhAc9-&Z63t2~~#~SfU1X#!US4fx^0z#gD}yP%dqZqSc#% zP|#4_2XuQ=wuIHHAaafTAgw~3y3Js?i(TzYI&xrDLjTP$jeQWar}^;7#)zNbCcY0S zlVb?ckI7|@M!L^%-W{hLcg|EO4=y53z|fiT(7*vj<_$qz43=UZ>MNE}eb$N@@X<(- z4=z+KBvZ+Lq-Zdh`U4ACRA=aaFLq>qi@9)d2T9R3skA#w$ec~4q13>V&7PvJnyV|O zbQGVc%1)#F5L8P_w<@c&7cVz(5NqdQ#grLEM{XfnQYDsjr|1wvw5JeJv#L`Ka@A&) zL+IXU7Q_P*@9iW2WcY3J`VU}i;_1zQj!Tf=2|ttBtoywy$`Hu0tnIRysKLxPBOG64 zn^nYN8&bK@Fi?$4X1*$@pRevu2;zU){Hoe4?9@&IKzP!E0dBxSozdSZBOw< z%hH)@Q^HX=L2RM;?gRw4J?|Po9xjPw{{R{QX99IF5Y-oY#B=Gr1^^N0dQU@rm!aoT zGBzm)y|RoV^>E)F-cPdj!$v7}g3Q(4pM9h#Znt9#HXz3mE(zTWmy7F$L79t<$BUKL zEXDS_*BMhZt7uFjKXa()+uUa+tR0MNJy%e!sS;6WpLQHSm4H8)y#G3p;WJ3i0~!zv z+w=GO@9HWh+No3PCeUGeM&~i~#Vsl(B^IHtJsgoP5kJQo zhE^#hDPCj0;O-_V0}j~s8D3uf;o@xK&hVCUS5im`-lgbd&jbX6RW*NBuYbWxp|adX z>a@h$=)pdKK*Co)Dgv43BY1iuqb4)UbS#7>M$Zq#env_Nfrl4 zJF^vl`TcDJLoHQf`h^~zoE7hD zH4~`CC;btUVzaI&7JoO7DZWyXlrS$pK96_Jey>BVC^0pNIWCGmE{a*y{GG(%Pu2}X z{;a$<>czvPpKKJlM1~?d<4yAJWxnwqjGaUh^*joDjAJnzE09*!vX5Xyg5`r0CR7M( zqWA|XAppkvFA9tvCx~dL7OJMty8D$Em=`CB;?u1+VQAJePN|KAY*pMa$$Lo}XK7EDM@s=6AP z)%eOoEkJ5+Vmf?zKDr^X3C8ACZ$9~L#k=wCb$KVKg5ryrN=&(=PKq7Tu**#-f%mx9}y^sgL!nqR9@K5=$;rqj?^duG+%mpy7yfk=E&9aG#hm> z<*qNPYMx}IXcpd84SW`R>~0? zmvP*8mt|Y}RM28$W}FaMRghzqe?ESvB9-!#iJT>|Mvve2O?57Jy6l8Sl^UJnjn6W; z{L0U6Z;GJ25@5K0>y>^7snTJCkD>GOh|6pK18{?MS3O5XSAMdclpR0S~DkdIA)^&N~5z@LRyhgHaZ&qx1-@ zV=yWa3@eWORF4Y-%?*l(19hHuY{K_u=v)|B>!({cQ;j)CR4fY>ESOV@VA*`bN*z(u zRTi`*Ae9?yuDhZvMoQ+1qEgZq$Sa~(_-5V*3G2DdZz$i&8|zT6->n^1tRH76h8h#= zjisG@E%}C=^iMD)4(!sKLQjo=EN+}Xp3BOeVU(LZ3q93NA1S_fpQ9L^(+w~zvpfL) z^alo(f}vO$7vLZuwt$y9p9r?P2DFUPT9G(Yad`qvhvN!Gj#!Q1uDC}D zF2seF`eW*?DY;^#TaLJgcFV)-Jco&^(EWIb4xMDI>!*(?8Z25WFZf;KViJ6o(+sDQ za$C}s>P}PTMu*9Qqf8y10iBD@CZhia6%hwiq@j1{@ZA%^<#1!M=xQ&+MM7pXPVzkS zNNbA5a&swXx*`6RccXfBgJ$u$8`{B>ETp@6%y4ar9Oj&cB<2^Tnd|uskxM<8D~+IM z+EasKNqec5O&R*klB#r#tA-dQ+I!@T|o>Kl- z9u_Lawum=`5V@wB_h+cFn>mH}yS* zOS4a!J<`Ne5X)wxC8xwvc?Mg#-#9h0a3mnV=pKADq z)bJ(rO3DsmBU10Vu(?Lp{rRgDgdu~H6Vb1A0;;|9I2-i7VgIP+>u8P^Bm z?w@)=n(OJR5Q6n@eZzogGXD>f)8CadoKmEV6i5BKEK^$8{iTK0iiZApI*VC#bo65laVPmQ$snWhW zgcf4xNk4ALzg3bFXx)0=xgw)e&XQ~Nqt3+v2h^%ZtkCo2t>x8u^6sY()b{=(=4Y1}a1SH?1Ot*wbi!^eun`kZv1jcm0LV!+VTyngqDRuFwdp(8}NGOv|ioLtw`Mb?JnV>l`PZBV%uLQ&z3hYn7`s;IEANM#6o zRPp(Y%4^dE13ratjxob79zJbC$Kl#Z6OntS;gxkSLh2s#C*dm8RKpf1oV9?b6rW0) zpw#)^AE@)+RkWz@Kb3r(<#8;W+UN~4o{Wd0cOuCtLWrdwqfZ|EvLHwFHpOerdpt!>^tDk8J*XrRH9 z8jCO}FMk4AS z|1$eSl_#Iy4?h|x3oX8 zEXM^&L=AE5*{VWO;lFK2oUOIZeHF0Iq*KOccCNr0;i}XU7ASX^O>Tv)*~SeI%uzJI z#`iF$wTkMLQZK`3ixWe%{7n1&$@QDI{$^X<>xNzwweC60+3X0Fo8S4nBPJyz)TheR zE2HkO*&K@t!U#7bW=W>3niG3 zOTE#4QHng|%oVPJvGi?^6xECG189?X zk$yqroUumazJ=IxLj=1z=ZI-$w0TIx9nh-$8B&W;M>Ru`(p7(+J)d2Ex!4=gNpx%J zCNnL#Ihjmz_)`yW)h9hyXy@2-5a2Eu1vKt{z8)dgxzwkmFv#1AeOSDq{M@crQi8N- znP+Waf8I4AHs9f8ubaNm%b2o)ib+Zloy{`FB4r28+yjfq8ZM*k)w#N427A61xvY>^ zQPAX<2Pn9F3^i@zcl-h3aPfFpFjE_}=4%sgi!c&yr zlhMYnG6kIuqAQ!gn1(-EAAI#_V(uy#O(XJO=2v0ewQ~nEW{>(6x!ClYtb~^8vGFU& zNh$@UR5-=PoY7UsXL%=Bek~7lDgIbOELwj?)!oJYM)x>o@T;Di)={#01PcSZ0KkkQ zxZTeIq>y$%?e@3i41hwmH6?Q{>En>^byoTUdfqs$2XLGJ6*9E`2K#f^n#*UquItUb z%)+y^rOX=c#qFMU*egC$`LU=(Hr-fni1Di_N-3?WHt45Ui@?5(VwkEF=!)SQB?c-` z$vWNo+8#CLdZJUNc)}sGs-ma^h+o6wa1P>;COrW?8^+5~*DP~woeHz{kx8$$MrE)3 zBFTif^`%liA#JVue)&o%b$7_DeO| zMeeP#h?E{`ZKI5VJX7TRi#yB?#r$<}uEkks|0{29U+!c2=o4P|b)AF~Qz25(l7mW9 zr4%B4p-bkfFCQu8Q?<`jM7Zkm)cT%90~EFv{IQ4)9pbIIEUuwC)lA*%ONNLSEC)xv zU%&c(jw*h(zHhTUN26}Wv83Ymc-E zG*GY!pv#$t!@_Gc@-vU;o|X1D2uvT1l@v9+cvn1)P<*5KC z#!Zu5B$?wh{a2yjMBgRWQ6iPWI=WfKOO5HS-CEDMXMICnUnm3@zldnr4ppYtj>`SqSzZJ=!U6O9x$Ez2vNl#PN24mXBfQyU$X}+lrpdPD^P<6o5apfV`0#2&0zUUHc);yOtYVx^oM*?C6_e6FRIf1HB6IoLA&+F{Jze1qNacrB7^$ZQ7xmc&o3wmkD= zqA|;jO}d=cTLH!tmS-iiiq#bjkSE(Fr}Smldq#)p2W3e8nTpm>OOvB#V=UwEG9u1> z*o2N16TyUr=ba)$-(6qZbeqovHj4PM&2c^Iw9+LeEjgO{^g-O-U|9a#SSWI#jPEiX zl!*b>=3)*Q0O~cXe=_swH{=m%3`|=o#jIT^BkK=|oLpJ4l%$mmIStwzBooEu3(3X6 z`~i!+$j6j6HQ%e-R#kHiYK}se*Y)LsZ^#QP(bk}$$Ne0+7O0JG4WSwG%0x!UK>>E$H z1h<K9~q z6+Ur>N$E)Ns4*FYKWntPeGR5@@sc0t)`+#Yv*{^H8j8vC&Gfi9)79a*d?$MKGjdiX zm}9H3*2KFc;gsn`*`f+neipkN4={wr?-OnN#g`nlbkf?hVl0xh#F|Xv&g!Kn#IdA8 ziHTCvVyjK0YfAD~!w*+6M%%u_UQrgu4_%idz3K&C+h^RQq24xgGbTAqj`rhT>&x2Q zOV%^d6?qF!>H54j$cq*`_HE`I+vFzHIFO5-tB~#O0O{~8xzWqX*K8EE$FoLA-iD+z zx_4=~em>SKa@%<+%|dfAbe974rwu)E-dn*uxx+g*ItvC0^0O|b`ZFh$d;-pCQvFU9 z5@3_AQjwrctpU4P1%ZLa#JZ~=TJX8bOtO}9-5v)M*#W-=^hOFS^AA&32?ZIxIQC74 z!8OM@4;$ae#TPvNpeffhePgjCoVMABp=^^T2M-YAk5za5@9MxA_R>KxWH`dDOaj%} zv2hb1i$&ffrRV)en^{mZz!6%idJ07`)(NnIM1G4412v}T_lCh!M4Y{PSFw~LPxQJv zT0Lb%8Ink&%x&Pz)uo*PHS38?d_J_N6v@iRf2L}M!F6>(H~Q6=0m1ZUw6Aq#f7EN3 zxn}X}vDP*5ad8L&Yx|5xna-Kt{`73h`dR>gxOu~|;E22>!ej1`dD3;De(cDP>vStBhsI) zo8N(fSZyXFu?Q_*6B`DhJl7o1kn>j)?|xI^3A~97gRxh_Yy-^k`@Bk%)YsJ`?TQpL zCI{uYiujqc9$-Z9Jb0wgk{TnnSd>cB=^YvcGvuOx#3^?Mb6yP6zzyBRv*)Ph{UURRvY(K17ZJiReD^}c}<1+-OoOTN!ET8N+OddpUAmKC! zxeIY*?2`?f%|f1h3zHKJE3(?*9{iSc=CMY>dU>!rr_`&&=3`-@6g-mvR*g#4nN<^o zwO3ukTXX(t!gIS=M`~Pd-`=&VXLPm32~Y2FPo8)Ad=f)qI2HuOaRp;diu1_5Gm%I$ zO(!Ic-V>-b72_xldi!G?H83GeTAlt5cog$#j*S-3zk++U_t#Uyeplza8yk2=Fyk#b zTI1s}_;EGN`t)EFZAjbWHFIW-d#wE_r;&vL2UigMU1dj9zajqzFu3!bWh@b7IO*Ep zB9N$#>YQfli~99U;|qpVkCm}e=Z{{^Tu(wg<}T@KHp(5N zh#;cfum#zbF~1>qWw5R+eM_L1^Rt+$sqLs zAxG2K0){(@0Xa5>kBb+gE)!SFuCLCnMhp;@H+*KotXEP3G<@hT`0N`J>aSdPzezmK zE-Qmf?o4`-tVSWNIb{fAAz!z`x$i~~3Il9yfSm0Fkh8;r7^d@p<}K2T{8xX8==_cW zNX>wDO7NsANBI?h-_@?A;dELdvsOHN>Yl1;nRn4x=yIe7Oy^^5+otla*1p8O}x_Or9+tpl5-H;ATiNj85htV$iK zxROCCvQNkTpM>Xe&7IL_1sK@BtG}8vRyZHOFzAFgei3F^-x!BnXKm*iRQOZ%wI0xo zr7ulQ2Kdq7IiFKhcw_YW%}5Pd&ZaufnYAIzS`R?A9Yi%(EA?7@Nkug#Cy6{zQ(OG9 zmNhQHoi7-p&R=ZYI(!^-pvnoChtI}@<81Q{D!g+k1*+9L3>Otl>J+Cu{dC*B&^o6~ zfreE^cR^sLUG4*WtYBExE1YQQKoqHx<^LI}lA0kX0@jmc{o#f1AW@7!p+x_j9Jax& ztm2G=(R?zMTJ#>l5_VP&j)-%cluoV_-|z%N9S+1~Vg`7BZeN1A;3n-Q&hpXooY9xL zMfRt?Hhl{H*$Y=_hG+Q-pf*S{{jnqs#g8n!~WH9MOtvklOWBiM2Vv zb8#?Hd3e3b((~L%LxS9h0>X(n(+4vb^dlI(e7g&JT&7kfor6-3?j*|Z8z19L`c5h6 ze_FPlH@eEWsVgpRcYVo~OYo)T=gg?z>|xEeMqBpboM+a$Pse$iT1Ky^Y=onW^(L`4 z^?H7t1yGJj7qdPjH&zHP$r7}t^rq=au-?BCFKf2E-#NKJq5=j{CY2&XKO(ASfx2EhGuDRJN4B=_-kx=}dn~GkqWZ9Of$pw< z>cb*t$Oe;GO~E6W4G(JF-SoxeXVTpTyr)`fiLjr(AN9>SmR6)cP`?rUA;dV^d0Q5Jj^uc_KgZ;DnCt0+tq-(YF@6KMldpYj+(vn`LYv2CCiZ6MlG4=9@;KcUM z<;$fCmH6;}2;}hK)1~(L(*So$Nr$dN&p~Mj%jL{7^@zZuovfii!*MTdgQTf&jS-jf$$S7lHZ{KhF8y%DJ%HOHp;Fe@a zQawMY`n)Q8puN?|eC2GJbpBbxA&Fe8xq9b$J7)8g_BYqu;c6qS@*cJ>?foSE6>ki- zHOp_%A9L>}uD9>&&ZR`I=zc#GRpDFRXn&VsXT^H@qKK-nuf5r8->HL8!R;$}9UO!N zeLwV`-}U@nuw4dB$woAF-YINBs!X*?`y}-~nrn~#kp&G?AhY_giRTM>F`=b?pdD0l zTrBIAfkkU~6S`@msFbtq#c^qDnkaR{ySV6p7z>OBp*J8IY)z7&Jv$#Uc-Tb)D%wLa0NGcwZJrKGQCJ<$<}!hHP* zRWv+q9~#;yZ*z%HhboVBZ-6VA9YNa9T8SFS^EFi-&MrvZu>to@NsZ4-sl18&S?pIu zE*6qxyOzk0kN2tso%OO#N2q1jYrO(bZtBgGve?PGn2I2w@}q6LjGEm`-6=Pb4z$XE z(hBFNGnE+MDdNhd;jf;-13|JU3ews?XXxqKk5YSK;YERgpv7}FY51-mlK{!DGcm@+ zh7D_Yp+U}UI1(B4q@}g*rQ*PFW%KTd5E77@eaL-~9*6`*uoW->j~62-XYL(#+>9E~ zcvLWhxTj_nDrimo^w9^FvZvh|i83Ez>4@CXUSISX1tkH`WE_7ztCiOuauP(-q5DzT z$B3Pd3~(~(>z690lRP~yk-U@pnM`VEw9aoQ?oRdMeS+GUN25b>J9h>`Ivo&5rAV+U zWrr*}!gL!O4N^J&SYA~X3lmH+=ZKDo+Gb420ny{a(08HI(s2Kt+rS=-DybXM(Ged9 zRe?P)bT)(sBJbU%?VQI1%RyB6NP(BO2z0hTA`6At2@)RBD|1kK?(N@~qJ)A#(!m$J zVMbv$GHy%{5on%&W^A)>#Wz*; zbhRkv2bY`r=74Kj2ME54w^2-^59GqrjQme?1kK6NA!JH3HrTgtVG%7c=f9q@WP(&cGi4GMs;Plye=#{1HJ6)E5`@oeIK!ZGkku0(RyXW*I2_q&T zmE-Hw2IFEr(xzvy<;-7MgdsI|z~W)u1ebK^(dg%!x#2SUP=Y(VAs0Ky&C!}spXWLp zl&TA6Wv|I<^P*>4TT&mtm);Ofbt^%uo%2?w;^M0_v~8_bAZ-`m%m7B|zb(Lq@kbm3 z%bXdY1RWg*fe1Xv6CfCOE_$qDka>P$slfctorlM;yJ1xGj& zqe1w{#3R~qU=fI9Q+5U{L4swQ-KPh+8+@VTFowY#nb#z}HsoGlCsvXlZZ{NYPVno6 zi$;Ac5k~f3(-&aOXBu+CSY@GLK8QwuQ|CYJ#C^vXpm1X*@4J!=dysP3ndW}YXRr^={OA~>WY>iKu8eM%_IcC zlK0RN2P3+i3gv;ok_CZ74OQfGV4!FJ^isk30r0>iiI%Edo-_eiwE5oQH}9w~b&Na- zGXkeSmw+**??ho#R!}(7J`#xO~BPzMzs9rW0(zPy6as!0->$9DpIY z3)lspK8ubHZ9w&QFInh&P9)at% z*+FYbfg^v21%7oO8kL3(i>Uk#p;njHCg~*6B4i`LMTAP4MC8zBKNwkI6%X-9e#E!> zEO1F9xX?pLIRDcg^c}tLp2%Hkgr?w9m|71MJ7i&TP`Bsl_vj$vtlMfWUDT0w7X+mn zt!Ts_qPu0B`WElfvJR^Uk3{xGb8||VVgEGHMT6XQ%>-oSA^4AEMfh>AZ$QDyeDyrH z39ca~Rb!IW?Ww`;c@LmPAFwn|h5thIftv`duX}2pKpgD)GhzoR%~-cm_z3rk7jxmG zX0dx8Yw_ax8)TklASvaC4!_IqY}W9zGy7r>e_0wd?d+`7__-TtGDERexz;PopzCow zr1622PGO4yzbnM$Bj?hV0CC+<^oBHB$h#lJ@HSs^@o0BLfp*6do6GVtc&1}#QSj4& zY`AYtXp)c|bf2Qr8D&Lr{>X|>IdQ$KD+TxY72ZrMRF}GKzIi2JIX!^YUzpzRn zFOkisr1zRyadKU8z-(_x%r((Gmqa%4Xzoj=Ul4?AoIGULB|(q!6nV;DQ!iB&{sYQ8 z8DWSO|I_BOh!KCpfWqnH@;%Rsv2O+KO)VJ*njOEW0e5@J`A05~s@!7r zlN{1-sr2do=%xCjuQt`eU4Axz)4VrJ_Al)NwBxV%hf8;pG#tK33v%IXFmyxfx3{`9$9k&d7CVVf^; zx=+K-n-SinpQ27&^X zI568WM6U!I;=g+3KHm$jG4 z&8k7N8drDY$DnW5%qud=s~9d3@#RUUeGRv{ysU(LsnPDDpI+$qk1X@^s2`_++0KcW zoiIh6Z=|uy*mjSNOlArH+)XuP?O|EYcBpv#ZG?>|0=jST+%lPqh|mJF5bzEyNYFuR8f!TKhP?^A=%+l3gO$bpLvbFjhAhLTEs(6ZUydiMX z#qdC+E?3huF~L~Ap!37~^z079$KFrTAT5cScMdesT7l`?=id)K=N*oob_DeB!q#yG zN<-l2gNhS((G<~~I&OpqL3tzC2NPxbl z{V>Kt_&U{kYVtZh429P})vxQza?p4sc^X~vgL(3hbV<_?3q64%WDop78>CV;kk3e@l+I+ zNB!Sg7=RdhaHT@{fglf7j|!*=|BW((2li_5CsAK%$nlKr-a(zkOUEBJ%R3h~ ze9#e1a25wvVE<}o#`u6Lj}t`%(XwYdAc%K%_+TzR^9XIHcH_C1aV+=|0%d5~dBV1s zJZK>G#x5Xrc?k{4LyuA(>)KPpfb>~#e4nnB!vo&Tp%9Yt3z;^d4!=@(oV~uT>x<>6 z^~A}RH0vVr`zYdjCE*KOkj{c|*saLdbl4oHFSYg!w5+2+x8-Dk+lcB#-3IBu?KWi4 zD#Egf3Rlbs#(qBPKYpiKRYSJuvUy(@BUa;1jtnwBF_|atnd*ykI&YSn*B%~Wd?Ml= zqE)Oku$L5Vn@%wt!s6aI#pG8NBd+pAoMnZFIT27zNiMptZnvS>@&-^Fdyqikay$%_ zd!hu~fW*H|dwEC(5eRWi#576J;>_2Vm5vS{2A@;$KPR)8$b!B0(2=G$mjrmGD&Du9J zwKq|5h5BE{6&<+NBEv1zq;hND)1ztcoNw!rj5k6M!~3Vf*)_E}47Ac>;8JOwYO1Lj zNzU`J8~Py19(n(_`C4GOa(5RYgfI<$SBx$D@*Dzr1tuu;w3?p?#qq2!(kvwGEDZ#m zQV?K$)B+^iQ>?Q(ArR?V%wrab3Syr=M+LE~bpMx>xYjeh!RbTrhs4~fn+soYG76<} zh2v|m({{iG-A;$!V}GB5KRzy6 z=>@*&0f1MLGe2)ZifSZD6u_}kOqA@QcPIKZ?XNDeVUy8@L!w;t>|$aO2}?ja4y5Xw z|02RB?TzICA_AAbyf8E%zp=Q%dffFJs1S1+W(gw@Yp4LHSLQPi<8c zawI|VS(b+)Z;q2egWnHKU4w7;#&Cy<%$0wSmuN@l2nLk|B9kB7fB6VVn(1}nslfHd zy)k83`<1nl-~QXIHR7?r+Or#|6#YGpMEc7>BrPuM45A>gDMeknXL0xA;?Bp3pO4z; zJf3}z5R2-sD*>e=@mNBebe?Ku+@8YS1U<~Yktiq?XiCr-3$gVBg~Qf$+w`+Y2uSTZ zfsF3A2tY(kouu;WLh;016=g9lwl^b;xl^-^bcs=q52P+GXb&|))zJ}gA0qvBC^5mz zjb zfiN!vUAFWMX+AugcsrjhqmQw6Qi_SVusKz&5{6%K!#pw3AcQLai?X+jtLj_#N2QTQ zQgQ(b3y_j-kVWUBr9-4kx=U(NA}P(HLAo16LX_?C%a9F+e=`X>Z!`JY*hB;0^ZH{G%LcX;?p`k~Fcm{=lr`8Xlg zNj@R97lx55Bnz0jt_XFl4}9BNcVSO?+rv+@<3J$T;F#=-x^K-s>NHGkkW+}HPh9!zK08s z+j3AZ7l$6hz&?!W`3>i*uv06m^EB5#r&-!h;ZRFMoyzFx25HNL;nu87Xnoy-XiHhRQ*d zewbGtU#o0ia8OE-#I-_!@@7B2^VSdnDm

c_#dLI+r&7qky*ET350!K!m-M1b?6@ zfL~58b!BMH7mb{Qid~Pqzxr&xj%>OW|Gn>{fCtGViV<6w&HPk9Wo$81hc9@4@mk8@ z{K@h8m!jG6^0zV$md~nscB5cdY*|LLN2H#M3x@)f+Ma7G6=v(uh48}bdtpS?9geO2 ztBMUmX90#BjdNMN+PbfZB#XB%coJgD?kx$xCs&bvebs5gPF9)wM4RF~xVOM?c7*%_PinEI`qdmEnjx{kw|*#Q7g| zuL&<({iq4>!w}2#*_u%DE8_Sx2YyKzeaMI`k@(tq3+;I6tyJD0X1+~`=k`p5zNk-R z{4D~h-K%3QMMREo3AAOBYdiu$AAIl*Zd(_lv!^G!~5(!I3a=E6#i;uK4nccv)eF?DSllEBoCzue)$=-|1e%8y0(0#H?_ty$^l z^8u+f@__eIX^Z`(0!V|90C(Ws$ce6_KqQst68Cm0w+#KnyJjUxowungu4>!SqGGPP zL|0Clh{F2Gs!4XQkYaf(D6SulZIab))5LY@U}`4`!hQr~JS?FFMHy;mMje&y5>H!H-G&xqY9%N!*h+b4o>oRl<~g?^HhxR3wcH{q9H|z= zk9VQ(rkON&Wz#7qbh{d=ZCFS7#nLiaz=P1P@pMXD=4_li)8yXmC%b9pQ}^uz4^r*; zn8ug~*_k;#XjCe-7q+~nUEsj`ZeKO2wYsIuK%4NIZPf!AWk9u3=UA&D!84;U>{AeH z2M)G5ya?6F{hjf6S?SY}#0W+g>{ z|H!&O*ZjNC$SRMbx6(5_B7Ixky3+2dcB+W%jm3~#pBPLsUVNKk-TOvF=qwquGcJG< zAPhPw!!5Q*Qu@bFRAC{;Gc4_Jb+29*9JoOncCCE7I;i;g5_N&maPV@D}7e( zd&u1rLlqd4aaq0X^mEOAIkVj7jk0~J}cW1dUGDwQMb*k8Jz%cAWK! z(Cpz$&}z;Q1D=b1MO0#2xezkM5i(hoimtQg_X;(`JKeLY$#q7nZ(#?0`nA*Ce=T%b z%ME`E_kphW$tVR@J~)4{pCf50=(tqy2&q<9SstqRUi64Q!{clX)G;bH9+i|HD6cI1 z%Hq$_)StD%Uc=tzn7ij*QRKzjwHzcZuDq~gr$Ae?f(@XYZ8y3e?K6Uy7O6fR%`s=$ zl{viwu2J3qu-wpwm2;QDR>!n5)39iFpsyuj&g>5H4@aat;raRHZ`X#uv+cA|zs4UA zzp;Mvc8rmh=>-|g7Qls&ndv$}&(&@9;QC*Hv+eY{==62%hdwh4Cc_-8x1+D2A4Z8b z{id%dv78{|DQK+SxpPa>R!3nt8(I&03e!#)u{RNPl}DMp9e~ftQr>Q*<**$7?jmM* z7OQ4$I3QaX^#?APH>XN3)j&AyJ`^-J67y|aef#|y}MYvzJ zvK<|X+V?aVBMF?1B!AH|?P()8I^B&3+-QH>LR?_zL~Yl+t&ryT&DjD}Y;$jVitJ{M zKA&)bw|Tv(OHp%>Yh{Xbc{lS(3M!~dtJNXNh|8-Y*9N26nr<>@{nbKD zC{b85S>sKi@oGdR)|z~WYPOw7$&9h+$|R=^sJ5H0a$dCkt+o>Xx!OwWDw|@ntp5(- zW^Ttuv#?*-a8#`$@w%~c**$3(kE^GzMlnc2+7Gcpl<7WI;mX^hff>QST4&of5IoFf zxe1uBbQw8LXchU84=}{aWg-FJ4?2Fj?|Y0r|B!^~(2uVscnRQllS^o|!+iG5>InHD zX2yfv56?8uvxhxmh`#q6=jGu^rbG8kJI47sWkh#mgpvsI+pQwo?e#44$KChEPHOWd zs2|@!bA%<#fSCxch}zy{<@pc05gaJj9J&Li*K{@)S#N1y7NB21^!7&E%<5+{;MGw_1C znX1TDSEUwvT~I|eK6Gnim`qvyVZy08XoJerk?Q{ZRM&m$pr&rzz_ckcEafDo{^++n z^~#vvK+h&kI6g5+OCRzqK3;;@pcStM0(1{KRziXikfPZmkNGUp!S%STI-LEwJKqbH znPU~9!V=ZHAUoQZSSa3D*EQX}_GkYaNIdZ8W; zyCkI8D{i?`Ts6;ec)CBeYq@+uNb=jH`}?o0*`Lf;wE+&+%NDFPMn;KfVCwlb`NhPa`zcj{dIMH z7=~ih;I~%ek<4pP70tIA7Iq_#1_kM%l)b$~R-)j;zWEc`2_s^LE|`RjEuKjP%wn^V z(wc#Ke#!)@t=dR6q{4pF0dlg*jw z3doB5DSyA*-^fvA zs=ZI-$9qG>t98j+ARlW|tN8!%7F?I1M^CT| ziGpX_6cG#XFrw#)#Y2)`{u&BDKaiLVgQfrUM1+%V9$XAvCpz(;g3SfFaz+kd6{#- zwkWV|NJN3uGEFdutM9BMP1Hsm4yPvs&VL=YsvX*qv@I`|^tF4RO6cqT*_arqq$Yll z1hmGZ@vgZj59RKpD)!lD#7{%ATj@X<^eiwG^1=**65Ibqj2P}lRj&jF}euvU3m1n3!ZmPn3ymTxf<#i>1%84=F)GO}5} zu@RNLZfYgD6|L))GXH5G6!^%PKukSu_tq7Isnzwn(&7Ql=9QQDP}_GSX8=?yJBB&_ zwa=gFAnbX)rG>)}q!6GZQ(UTm;G{#ea{~Ar7&G!O0Cx8BbN%d~hM2mp@bA843}pKT zg2)d9{vQBMt9K>1cPlurKVZag7lN9%N3IYHjW<@pU=;g>qidm9h&pPs=Zl<;p=MN< zY9xD7u)1aej!0KMM%hfy{Vm@@ox0qPiCS}dVDjHcli530We|~rK=^oYJjcsM zKF4-r8t(Li`VchZ(Vyf2L;twVjecuoKpbl(40tgOv>63DMxauiX zJw7ymuoKK%N?=yzWc*tzK0oGz5%ypOO)#zR^@r?N-e3mw2^q$VNrj)G5tAPSqd

u4oW=!!SKvYk!;a3M{qmmGY2{{HH!Muaz^gvZZSgXq1ME*>v8CSB7lv4YAf zC)^tg6_K0bU7cfkr^V0VKRRee;II{u_hsMT-jWtw(pt2XpPf3xnOOlj?Nx4Q@b=fD znsphl4g+i|4cP>4to^O;wrTGr-B2b-}8~)fC&#s%d4sV=YD6 z`p~gq19^!5*R61U@luldQ3cK^(I)yElY0I)Kmyzk|4%7<2^?C?8F|p-q5V`ns|Xxg zLGj=6GW?cuxpqy##+d!{P%YAP796x+-_=_hhCK>5^3zHMq#V!+7& zaJFF6`I$b;_H*Mtg9-!z*1GbWWkN|kk;n8fgMR^c{Kwn-H1IhE9EJpy-Bi$O`5RP7U$dj&8NvCZQ6=E zqrL4N-?OhQa{G!8G;Ir9^8BC2p{~FT6+ss351(v5G#rxVA>aDC1Y7Zj(bf-&dQ;>_ z?Zt?)`jRc}YnSPpsM?TB*@)#7yxg^Z{+_w>$4sw@-y9XhITdgUO7(`wF&@dxsM=p5 z{O(a8_oX6!j3ce+xF)bk3?Q{XLeiJh7TunR*ZSek+Mh= z-Ue4DENQ2mH``~@vT$6AjZ_5!-h-Sd5N`X6L2vX}rd@`P4mIsH^sD?X_*8q8aqGQQYYFfY)c1D< zN$5aKjy`~`;pj7!WIo8d+;}*4H=6>rQyP-yMb*baR406CmVXA9x>bq#rH@0XBG=?w z^y4|DhWwO{I8NetHX5?3ZDQ6(a|$8U0xCX4dAX9qt`xbnh9!2wclBj7dEAl2VJSjF)Y7V+9ix=k zmj@T*6Bj>nk_I}K10!)j{jwwVuGhEY{q3T8B#NAt6>b=c!l25FVDVT56Xr6Q8&7wks8 z^%y(+HVPn-S=@9SKrI&tW1s;bULKwy;InC zsn<2Ymd7&K4VnV9cE@zqziU5bPW2IroF_#1^tX$eGvUIk-)Ddc_;THhef=2ZXG?%u zS}2L30L~wG-lE|pAb2Z*rf)A9rz>oIi%(qLuV_VGxsE&k z&OPKEGzt@FIWC|x&T-jlumD+o_ovvEw%n?D?V|3dKrz}>7q7YGTM|&{#hM%<9J*f5 z@6)eOZS3&yYTj=JVY;Ffr@pNQT|ebU4GOf;w^Jvq(~A#{d(s%T$>lH5O-_b;~U>HbDH ztNsR3!vXyYd?y6{?=&Y&ue$I|+t46jB5#i4B&&}^DSGzBv++;*yzLPh*YWr9sedd62pbt7jLOzi6X&fc zdG41Bd6#3BUMs`0FFW63MMSr{u%6Rrx%AGcK{XCK$d~NUGd2i4Hz;1yqr>0ta(tR} zNcs3mr@nvOj-&G&v^_ZG*RvsCH!PrX$DWook-t}~U1zBU+)oX2q8%cpFv75F_oMf> zOXLw1q5(zFm$p-XX1yQ?^jM3+{+I?bfx8M{yciS5?dJDv#uOR(xV%u62EK&rz5BNQ zc-0f))#|Q$E&-S70XHG$U*YdX3BWE+PXKH9uIABN{lo>@J{TI1tnLbzSK=oO_Bf4q z&GK%yL0Y`=rm<_;MD8zAD&ZzCoIk!Kzud6S%mQ>H%6ky^Fc&sI5dt*CSzbF1kZ2PX zM*BJdD|;;)fl-I8x64`z3KLnpMpxlTUOmehWu_!;X(8U?W_>rJ_`_RnCMg9Z)-QRo zBg3 z!_p|JkN+kldl_pqxfY0d;hC+uOp_vxJ^W1ZAF{S+3RL;rR;)ZQvoQ^wJKcDB^w|MtVUN17x=Exd8T+J^ecV?|FKf?|KdpY%u&D$>QDCFDyf#kz?+y~{SIh)jMP+~%Nds!dr8Q5SBF2T z*A@#FzklQ1w?!%p#9nQn1Gwud=0B9soIHPGnr>^UtEs5fRGm|d+^w~EAA@V*S;&am zbD{z8+X??jGKNy9iIhlbPQ3V>D{i;6wN-1?7{ot2r7SxDfl%^;?enm zMn8mCuGC5xjHvv0_D0T<8?hHa8?@GMu3TjD-5%+}do2*`!N>BUCz1Qvr&$!6eMFg; zf?-T0Hs2+2AC&nSGF3-f4@0|Vg_dgt@lL1biQGeJzx+vSrOuDuN7oQOeJ--|qrAdc zw=@uX6Uo$ZzWu%h-~=AXx2BUc;QqX!KGy#Io(;QfK>rp|R&H67NYFWitudIANa_gR z9Lec0{~~aO5Dr~^mTvEu)W^OY=*+1^lhmwCKhQkr_<>x|1NCfw$E+VvXro4kP-ytf zUjTJxax#>tmfYYOK2dY#qbN0|BlYYrC?0w2rvU7pB`2WIp}a_Yw-Hem4XzDKI%pDzfpy_DC zi69IAnM@?5q+RY?2pL4wsa~S;uc#ktuSQmgTp!J44Q}0@r3m z80koe3f9H+iRnX&sl^urm3WU{gWQ(24dkSxskv*teJ8 zM@By-{;<{U9B>@G6R=>Dc14|xXi@Omq@G&*tg@MKwS$z<91GiAYvttm zKNQqLx1AqaE*7NbT_@Y7?G<*&RI{;}EqwArmvlo=tlc^`OmC47Q`D-X(`)8j@?CjF z<~%p=*4-a&qTDyidsR@;F#oW=>RMCpJq(|UPkG()si&+%B8lQ-<;%v)fh7^ta(tI5 z{u@U(jp$5H5;aEdOyXJ%xgGI^i}Pn+;hW%6tY6B#yPWwZ;8N=Zn>^vLevZ7=u=y@W zx$}{}s`su9dV3*B{)ITBo0>ErIbO@|ihrGIQVkV* zbx+!Q!?L@RFMb=wGo=TBN%D*@=h_#0r43o$DC*Nm;gZV~-6(xGSPNM_jM)Dk>C?0J zM_x(wj--^eE5Yp!Q!7)Lpk2g|nW3kgfOd*+X1hCX04>sNpT%&d)kJ zP8Mu6hL~?GN%v%pZ|`$&m0OP(|M=BM+9-FZmH+DMfP3%C+rCjd5x)E;?Y_2lz_9@v zV>dmh^MhQ>cmJ5F77p|DK>K8mLT~;=l5wQ*y}?w61aIs>w7NpQe&~jl*{}ekGlQmF zIl$5;n6GlH#fgTE;&nJ-bh(87aF$L=w!CdMs2Xyi`yF`LLq3AsBX3~Sa4{@i3im6r zW7XDsQvu&HIh#3@>I3%|eSlt%p7frCragH$V>EKv2noCfqe9pYP5 zjYPmR$0rqZo2iA0);jbwm_)3~B`r3&?JLO*0bJH?@E`+_(&mZysslel8V#~1sy+x1 zN90d&{(fXW(Jq=?S*H8HyC&qR!v=78Ut8?uFA$-g30moV0){pFkL=G{Z#0u<&K*)* zI`MG{XT|jtf3+6(gB@3mbUk4?_4)P*hMAdDj;+1P`Ig!Hj@XyopH52xPX7)dEVOT5y!9Dna z>Z2y5{_0#WAQus;m3G2>O*bCQV0ex0*9>%E{Mo!4c^=kuyuWd{r0mxbTtKDdSCPM* zfZL`jwp~JE*A>hw8a&D(SaBKUrLGgxoZ&$d)5=Z~x-0s8XvyP?>UE%Q#kWrJ(vQNj5}z|uf1Sqa1a4c;<%q=L2!WrbPt7I+=Uu1!qkA|YKyX~e z3Gn_e^=%!cF)fifxQpb;ooKQo$nJ-q7BpfT}Cx`>RHuuYL~e2A)XTPwW* zt^TUOrG9mVkCzuyX2RVDT*R9bO;Bfv*qodeCT{9da!FpS=VFe4AY_N-6i#eQ~=A+ zM66vWE6lT)QAv_hQoKkUac9WkBLOw1L)Ea3ie`vXn$oBJARWt}ZsHT3D&tZ}DziLa z!)0?ms)^n3Cvn3~Hkva0!M3i}=rWEU$JtK&NA5S^HEQ^_B>xS^q{m~(PYzUhl~O}J zPX4Tf(M5+fv^xVSHjU*&<%f@5*9XB7AymPm+~j`+Z-a3&xBvYcM}oGC-mz0SOtPFh zH=-B{i;^q1pLwKm!|T*1jb@+oF5kxCc9kZje~rKSC^mYOGNyW-+s4J2nr;t;WRo(XQiYbixGH9kL@CmvHIcH@UC7Wkg6DC2Ga1Dg;Sjj8M2xAWowOaeb0to8g z#eGj*hSQ;{P%vgad4A@Ys|%IyD58lmxMDoag}x-uB0&+ovUS`R_H@J$QEKkB7Cjuz;#q*{L(Uyn1v8y{IoxA(qwaL#d0mR*ZlUr&=ea*`es+K=i_`xzeOt z4(Lg7PV@&O2}tI@cx2Z8;(xU!y2nl$+ZT!CBJOwthHX#g{5kqW9>kNYkLk8DxNPG9 zYtwJB^75kDaHSl##lK`w7>ALujt8_Icc8U=+b$HzL5G@M*wL<1KDOR-AzJ>8pMes# zba##Si|^*W-iID&!||^i_Agmu9B2nY7vR8c!wWreM$WH%YqK{;!-jsLaX1UQcc92G z9^CJD1@V=K+Q64VM+2+1e0M1~4s#mjtG5LCXyWQKx4oNE)Jp=8is+oo5Ny_-0_7zz z9#f&wg&>epS7Anpx3r>=l-&~_QI)WmiCajp2rMj#c^G)LZ@8JFI% zxW8(CP?+*9dr4bN0+*iVCIc~jqY>mH!J80&R>Yo#Xh2&=CD*=BjAtfxa9QvI)L&5+ z8~)d9!E^ho2O$2{1Io;l%@|!5d~7N_u8m3PO#dW2npAP|0QSV=-*s~{vhHS0^I7d= z(pUljvZS#A@#4*@xgO6ABasi6XP-Y$n~3*AxK(;#&``Ugq`JP-pu)uY4#~#yA*Nk# zc}yB=^8)Ol<>Yx{>zyCdb+{TUwx|_xw4k%0kY|^NxYrWP+ZeU-`}PX4abvXo@GC>M zZ+Emms13rJA^At`c;wFUpC*PMmFzZz8O=>=!*VW-TU%q z${>Xti3Bl3`BXPpsMd`8T6>@gFj32iRf9BdzEgu!o`>B1W&vYOgKc zvEQ}3^9|^=F=<3C9skzn#K0&{D0nzVt+hHYD*SPrP*8_L3D9A#t_S$8;es7IvW}pw==1Z=h!i(`dd8HU|K69D3w7zfJ}F9QpumH%p3w9dM%UC z>8jA}-d6qL=n^CMl0j+Fl|V$8&i&F2`^l)6N@X?Kfsm&#eI)qlY;5`<(I!h6M(u1& zAaV~fZC;4lwa6Z78Wm_evX^*F;QcJi%JAEoeNm?o$nX3)hvT4#zyt|K|A3T$|9chy z?N%FSuM`RdyI;9G$ULe`3TDx-P@Bd6a}fbDK)Mt|TM?4=WwOCzGw$_mMV-_@@PWQE zd1@%lyS10FKijhScoPH@xyrA>S$3-gdaH(il39x4eXz2?RpBuJQb5iY+7}~7RGSZ_ zNw^-*l3}uw;ZUeKWByjRSy)>`r$&!aqN=z>%_hy|2q7##`aYt}q(L&}L?$AFlct3a zosTwr_a%TZbwY$(7f5|)9E>nSAT)CfKc9|v;)O&2dPktZHozCRgmB%n9ph8z!-GoE!(~7)7 zAxdc)LcF%2k;iv`+^o@Ft$h1(zvY}oLo)LuMse8QnXU+l^KO59B&i;BYCye*sXDsZm z?$6tyPSV0n5a2zD@0LGHpqfHGgfnhTw!c0AH7YDO(B&+!#LM8)DM zm!9j2Ay+i?f~54Nq_s5knudTfRh^XR%s5QU`G;w3hjsN>qGlX?lb#iWmazeH14&S? zAwbF(BUA^6jjA3N`OZ(;(>7?Jn%?$ImC^PHy;rz+?8TS6wgzomU--oLS3)J%UPl5d z(aV4wBPpO27D7ni^9E2+d)%u3L;o^bhv=vf138ya=F zPoOMHBvRBqc{&8!F&l$e1`8p_lzeuRtrm8UMn}4S5}Hk-XmcS0f(`?%Lu(uBJ9oTD zMQG(Cr}ODartY%Y+e1*LIoDm)oi~&`E{JspU%T(kFSAEu$`^wHr+%4F=w30VC4^Vx znwYhXUxpX)V!;WEs^Oj@{`8`Nr}^wh{o$_?>YUR!=?O)#{rR^2vlzec+-`Sjr5Y|b zU*n8D){~b>s|dVMK5YKkDO9JXpRwU%xD#lp5h$4gZRZ`-<#a1zcB;%wEcfu1lnCl+ zyWvB1ttc+N&8(@J7ubbt+u=M#S2$m$akVH!kVVHlRh=TQVb<) z?)W%OUN-*utW+)!&$m&9ErE0;9PJel;{%zh4Z{;yvUDxu{3p2kLeZAP@I@vabJxRm z5|RpGIchFpyef^duS_@6VYVh0ULIwyX^9wNdFgtk5$X$CCLNJsG2pX$7oBmV%Z9iL zNQtvU8hu8)XlI=AhIn?c->IwV!RF-j%M0`m2TC-GX1sEb!Gr&|h6~DssrwfNqIX^z z-w>gal6|Gx$S1rH0p%Y|Lyv%R@#zH|Xbvd-@De3#^`~Y2saH_|xpiq$FR#Mo)(7fR zw~?c0jEkAN9MroHoUy41RI}KuwbP|&mhrR7%s7Zjda4#_gBax`wXMa(SMOprp6Oi1 z(4mPJt9YeP9Hs4QmUtfPiK!O`RxWMe-gW-IKSDNQRmu!*+<|#w!{3yfj19iOT?wAZ z*05?9#GA-=%%XLUD)f!FI!Ge8Hl{0;uKhF#w8c83!sV{>RL#&&vh0MWCocL9<=lXq#Z*^(w;Kpx$({j);{jt##w-kwvULNTCgRm}GK z?&ogFogdxTZGX;Y=fresB=3SroHVia+Xr?uU9f)XnC{nzVaI7^!BZw;1zx=JKwG@8 zq^;4dzqzg081W)r9xsx#aCUd>ZWk;&$#~-zlP*+C8i!_XVj<3SxpG43qU7D4jbqPJ zDCR?O7fWrtMGRzq*^Tz(Nh^*xldbDrE#Hc%Cyjn|0Ya@M3bIIW9X3Y(b3UlrHgoUG z-tJ8YBG$mbmcekHwU4{f_t5#P+)HLF(uG4xUv&_d>gOtwMh89$uL$5l)ktHzN1P1Iob8E5E9X|Uj7 zCR=j|ZzoO-Cx{J23%`X-|2J-6q5aWv3qw)}kGOFiW&OS9iv=(FfKA~8qGP{r}j?IyuA;g==yF6-T4AQjKjD}G7%9AWD!gY-^1;j*b z4Y@L>Ui1PkZ?F5E&w!%c71+GAH2&vDOr$zNCm$7X%%kLB6n#nq;x7Id>=hfyc&^MC+Ff-)TFMsl9B zed}d*UFi$I+Qfn^xC1OA5MDZ|$+dED`o#04d5*QsAHf)fEZWM-aZ=i|{$S5! zpW*W%4)=jn8T%rPIn~(!bJ~+BUgx>RS`Yq|cF(76i9L36!5Lh6?`dtX?TwkAljtlM zFKIL(4=lAHW(H*xV^=4SRmBRdy_!ai+^-9D>Kd}Ry63K1n73^nj{9>;kxT8(^GcFV zqC{|4aEe9jC$4>mZZ&1unJDT|!M+QV-`uy#Loi{yM*eZ8M4^CgM1zLe8EJv{34Fx{<1sX_j&IHlOA#i(eBj6b(p&>zl zE)+3tKmzuOWR@B+QOJLOYIQ;z9aAJV*p!eJzc^$ZH+k`dsm9PD^Nq+%NMf4U3?_xc zcOr=@+tVzq86^U%9UqIq!LDfIAgGoe1iw(HJgYW&-y*XYkP?}jfl$$QQ7AV8)U%L@ zCl30EXfBHXiD+b;@m#JEkQ|68pn6N5ta2x|2v-wvc`|mN0&URT+I0DQZgXRH#$`y>$Lk;k-sk_gaso zFvSNfUf85Gelv(VvCW7r+&ol~CoL&gu?Vy)x-XOvSWN3-t{*^?V zPs298Svd#NzAf#>MVFg05aP)r-I3l_j^tC?ZG$rsOQ(|UyYSI@@_>}zFFLv z`yOtl6_p7Y?;q*vZ0?^_jyCEtfe+}!iIXeQ^@1W-v2rxM8wzaDSe!UCGkEeh->DH# z)g|cQT;BSbc71F3Bp>IRy?J!Em_V=fSC*w&e|>B_M7^!zR=|&L5_5$FEHHgivKApK ze;ad3h6ru!C`1tRJ-2Hrb+J4mZ_Q1yi-yU{bo0;GYRE^v*%{Z6e{$9@#}#_i`f&UQn(v)03YZ zes3>grP2cmk$TrxbmSID$P&2uGBYx883oam_|xuh!f7U&7tHXuTMH3ps22lT68E+Z zEOJ3GG-K^|gIh~m?u$)w>I>IDm4<@VzWB{)v6~MMd{%;)Prcu5TH90_{HUej(0jq2 zH>$X-1S>E>a$WH9W-$L&2q&jQal1p0W62xqDPt*7aav+b&yasuN9ntqs0IEymkSS* zbH!!YIt#{xgZa?uwyIOd_7!u7(rX53+zXg2f%lC7-_LSM>%sqSX-IXO{9!=V!p_2D z+l?SL>3w$*E*p;K3CS>$c@$F6*Y-Q$)n||xc$-bWvng_1E#A;9zV=}>+{=8A)1^!p z=xxqG)7N6LHb$a^HH*IRRI$4^;>8E>aX`)ol}~24JagJJk@dc_0p(h1tmRaMZ|REB z;Ic^{)jKq&{1Hl~iqH$;LIgcn$284ry<+O+EFGU`a}P`_zT*lW@%yeB>IWS%s*vpV z_NsG*O}zOzZ96Shr0h1@GSMD04b8b zlvL?8ATd2(0y<9rF@K8&=$k_3GSHNyAH7rK=qDJ5PWEzal6<) z(U1%G$KrCo4XPUNBky`!0m0`u@kM@jt~K5_a^?%oWjU!J%TWEuU#4Z7P1xy0URU&d zzTPEsJd{eG_abx5Y3>f?1=27|3%yo`9A0^|)nFw02E{tfjMcDMsx4{ZAVbcGlo@7R zT+!gWSefAC@J@nui=rGVqP-q-E;02N1XnIL^iMUFTv>$2N6Vs;)NHn*#)uPpOpT%vUr{}u*z6G# zxK3WG=yT!eK9%uM)6KjcA(yj!EU{ceQszKBUO-^mQc^5FV;i>j?r{>@Q7hv=q39_h zRGyc2wNkl1FiB%-_l+bIxC>T%h(6nj2jw>$P0_pcq_5XFQ9l0A`WN6YshTs;Z8uG~8KZ z>0G^jZ6)7TmFT!TAtQR~)@=LJ^3;3qaLV!Z3@2EJv8BL;u1;}B*(E`);x70yg?u>z zBurgyOH^iS&uP{P9}g}bjv{c<^u1ZR8L#v&6j|T@-8c;-L5c?Atz!HMq(v07hAQHz zz7?nh*N|scqC&HsWO{rMpg%S>8tFCtY1DOGxICWIwRLEO#dGb8v^zzq#fl_vcqQnN0w z@D7YQ0)Rb9B1jZt-Vp(~{rsKfA* z0&UJP#M9^T?XF0uHrk;9C^a|>D#L7UBbnq~^r&yJlH7kv2FbT5i^ruGEadcvHxO=i z?KOTpw;${A6G;9UBTi1DBTAH4<2z38seujdoIEm}=*9>;-iea|Vs()REdQ$W!=#V6 zD}=f!HQ2v!e>~RdZ*b<+7UdZwgy`KI2Rj>)bse{JScBEU%pfhCZ*1hQh61g8Z1AUz z&?WRa86zD&iLiM5kDWImrUa<`JapDS1Z!kYkI%<6fITgcAj#yF1+@QBh0*J;mIJ|+ zyxvHl^kf6T!AG5_P?0=uK?H36CJ^Jy**Tt25NXI)<4Jtu}0x(@EH zXZsf#V2}pw1NahDg%wNq7hjV94|x^9ms&ZPKf%I=79M|225f1g;rRGxNd!_xnZ`5j z$)itvi9h!!lPA$-;7}!%;NTXZGw|M(-pv&2Zy)TLTZ$+p;l^2{7qx$;OzqC4&Cz@| z{$Y%u&7X%o)C?S(t^W9t8|_g=`W%QMQ4_Xb5L+bP6(3B&_GR z{rm|a3;Ot&O#i0NQcOE3&Np&m>I^txZ-8+b!0`8Kz(y9peDxaSpx_s?Sy#uLVr zi=HPvNQuk*&`F`%a@xCx@}M1k{b}4S2R7z7v}FneC&+X%E!8T{7;lKyBJUy`AEfgx ztu$OJe76hrZm*_|-Ay}jS}xBtHT=#vy2b^RfM7}v&}SKeLq%AVz1INF`@yfw3I!BK zzT)kc=SUpBVyL4?*3k~B-Ro!W_a&v%dPLgRGMsolbzNl81^>cRXSq4^>dxjP2Ce}w ziZX1>adeG!&QcemHoP2!)SB#C8_Fi z7gbl-0{gFURZCpInl+I3=rW$IhZd6N?4gdApM_c$cDnl6-pc3Katug-;3VbMjFm}v zJ8FYMmUQrh$F4x;9zO@lZ$c_5^<_K_j*^26u`~$Z*A!ECJ{#{!@dpd56Q%z6J3GQl z1sKRxM! z-|vS7l-@Puch0~iH&UpLEyCZ0cXxJT^>!t_iW zc#+}Dd4n5ZP_dJKE{`Lj5qg4_PPBN5rU@6ylc=prBem}&UG0ZVSrFk`!}nJthKpK< z3>6dKzBIJDW+>HO1%HXD{dQMdXS=;gM)(3FSb02ouAWWEchjgiO0zf0G85Nr{7DHf zQUVg1=}to>yYAgPRx)-uF+xnrJ75wc(7!PU_b;?yW;*|@@weClalC&Y;~2&p2Agu} zHJM)o+;ZQxMEYdav08~47@{zs#Hh#Q#YG zAVbAs*`Dzxq@ex${ZnYbGm;Q~JwhWml5ZjmieuksAr?ModFN3=w1_=Bx?MzDlW8^g z)O#E6>N_?Ps^IC=AWDkGUPDt8(3<{5C4Gt7OzqtNhe>pQ6BH4yy|4)|DxjrjmKbno zbfJ|=U;ma6^Z!vofN)`a3~Jb@y{k!M`Qt2uat|TdGQewE6;S=JBxo94HpWz`^ijy! zv^kebJV_&M_HvjPvjM~&D-cW|X8lwQWQV6ydR9Y!SLhp53HQa7y3D(Vsd-Z*8oaU?fz!X z24WIQU!4ICx6njVCBeULIlz+s_l5tT^E3OnK}-l%)*gWB%Hl zH6aUa3iYBhm(2H4iJZ*KWPY3}OKcQTMYRDF`W|C9^aXzz zmDWEQ)qhP?*eWR1j@ASIvsi0-VJzT|1S9cfhpGW-CyA9@-FZTp()nO~QI?K|XGUDD zP0ZqT1k+C)(s}TuFeWQvU5yyV%eJYwCKCl2WgsuY18^j&KE2PT4`gSoQAJYe^f;0g zQ0Wc0V%J?YrDEXnl$+b|tdr;}dFCnXE1|Av+pqw1vsw+j&vG8;8^iJJUkm0g$uziOQ!m^gi2mhO`MepM^^4S=ea8tLC^1Z>3{xy{}1(B`HHl^Ji)-lVXu9rRh5wjicDbmxbLib*GpmkOL3Gj49t3m}NDdvepN<%0^_$Mrg{C z!foPz#d3n|E}NiXDYTqtC0>EQ2CQnjKXB9SS=79UcYx1*+Lsyd+131Kp@R6Nxhs&@ zCo3>029Sn5_N4Ek_WI!;+0}!34 z);8$-0RFeq1!%1UinJ`8E2ODyBUL^Jdshm=T6#0wYNTMs-k)J`ukLtuUH_4)V8qCb zz?2%ov#N<>i(=>0vvnb|@rJ0;EtJ5tGYu-D%pH605u1}#O^jgtlksc_-(y1Ly5-(^ zV^Sq&J84HHx)7W3M9aL6T6>9lyHc0xnO4|YA_X=c1x-z*#v0%DH?_0mN&{AU<8PJw z*iVj!d=~%YOeS}<9&#Xl`4OG;KR$E>*@V~<_SpMa-qEeM?n%4F63Bc9F@gos)t}(Eisd@GdYdT$&Eay5ZhZ}D$CkE{6iWn0z~?x zowPkiAV%t_Nt9tkP0DIjr^WsoDs}E&MxFVHzj#eu1yI1QX2&ZnEu*t-6uw(wxcbL@ zU0?o;ZTvT9XxtB`lD|z2`msFNfd3{Yj*s zHIRx#VX01`8ElikH<*llYzLg~u_`m}Yf+oBQMO8P-d!a##Q9suYwjvE7h9 z!0(|tzr`y8f_h~4`=6<7Yi^Caf2j1x*lRKT;!p5OWyn!-_l`Ay$+A??om(E!%xLlJ zE^-_~6y10_x$0`^PwLjwM2qWz3#sXbC|~Nr#)S;Xc*<@kOz#F*M!pMi{~_e_=eaPt zbE&_~d+^DL@l-vU%J7VPq}r!N_d-PSDX%1Blfmf!oXOrG}Xg1UFD2 zR@&47V_VS;5Hs$N04vSHf9#S8-{K74-}On#&k9LbQLEu;_s@JHvrYP+JB1Hq3vWMs zWJgCI;Hrs=j=l@ULSkPlf}jV&jeBwA4Nf#ap;;uijel>bb1(ACD0rVCFfzNebn%qw zcD$rKSvS(w_zx8Is}o4$-x@4vAID$TEzs0dCb?{9+_k; zyY|8n5ym?PNdQ^?7{%K|_;I;pODRbICM^h^0x6!hIR1(D5>^lJpF*;?#zCY!SEaRpH0#02vonlUVY-q0CW&Na49Y^!QbVzw z#{!}Z%y_>5zq1cTVtt!shiJP@2I+m1^79Ai+EA8)EqTn{nO$pXjk7`>OFR$R*=>Xc zFF!K^jjm^WKtI;Ee_2Vot=iYKiDy-=kw#ni^i&jcDM=#4l1Uxw^jst1GR zLI6oJdUhIi&tpJ`{;K(%!z%E-#K}Fy$PZY%0H6zVkvl-^M%{n^7K+JQ1zG$3Ir-Q` zu8KCMNKvd{RkKR|ob)X@iYD>ytLXpj#@a2VzL zyd;0C;7nf_qKVgNxK8>h(iT1UZ7kT2JYQCg9;?0~r<8ToOl(b@q(wrQr)@*GPHa

xfnYAaL7v3b zJ(oeNR2((TcBYvNZXO5tGbT>hOGBfK|31<;U~qUR9Y(UL;VmHqRHfj0e!~MKrILON zC6(D;9j}u^)PwJvC?@Nr)*Fd5)NS8Rk#9~#JX32>bqCig^!)c1@coZ_MZ~Y~knukg zkILEbTV!nU$kr#>kRaP3M%lgPzLMiwL>h73i}){GW`)ryO_eXlias~w@g9r4xUeRo2pa~$=ulff zF--)jv>Y(JVEL0@FF*@QNOgV+CN1eH`9CNBXhrvKe#X`JJQi@y7f5@G9SOv`>_3uA&s}w~{@3`Ygv7q8P7TW%Kal4wJ;1L6mM7K5uzZ z5xVk2G~f0}w|B5`{9eG=iqeBes%?t?#7<)a#>EFH8N(mGW?npBl~EK|$h9?(YM;}l z4s9&ac%8TD)NgKP`Lgj*#|<@9qcc;m16p1-n!kfJ$RPJ+VxvKOocx9M(u?<^je|?AT3(kuX)D?}7 zBq*OUyS=idt9<*S!Hp=TcJ77Khh1=IkoNraqy^tKWhX3Bc>5c6lS$1fW-AaZfc~#7 zKqc0E=^K;%oMv5jfFN;ZNs(HmtgBk3=iYnvQHe>Nv6I<)RQvWr2b1Bp z_|rW=rYOCMGJ;##)r&l@8!*3GVCNWdO0TxKZR|M=l68&>qXlYQd!{GL*iNfNVj(jK;G!;?td9yaptZ=VesWFB99 zt=hy-gO(WjZ%j+$ZDfs?bZW#YyCbr=S+!Lpzs=#*`uYWJR`)#dZBo<`KILfm188}R z>jC7NiK}uj_Uq$;T7~{r1RouYXWp7%nj%8$0wn=O3SPuM3! zEuTTH?Nv(>oO%YX*v04{T6k(ZY!eCbzEt)KKjH>gt$6+78lg`@Sx(~FT&~PE>kQe3 z4uaX{XSr59xF5LByzOpg$N{qjV1``A_Lsa+9e%;0j+$pb)yIC5_G@PKH{rZ5vN6zN znAl@_uBs{dLYjy1k|}!GIFril)a*HGrq?0N?9PM82yMj)_vkHR-*R|m?Tl8n&-D}8 zj=R2^EQ~YSWF?n$Qg$>MyxYSekaXVig_6qCUuJIDHZo%8o{6Z*XC2rGLmZFo*GVm} z@~;)`YXm}%5R2ZO^#c^~gE7^G9#G*{a({>K=)k#)^O%mID<+|zgg#q#hei$+TDm^x z9cE41fGxA)S~qAu&di%F5P*+*xvis=r;&yuT%IgHepz=WZ>TA3EvV!M9(itaq>XMK^aA|^3wbebCLuEn#B?8p;O z-er1xTBhe`_3>E=8@D!`~)W7sCb|%y#G1Qa)}c}oMZ-zv*?!mRDJJ@ z1?;=tD6#sEaDi7$5khJbWP>$me<^*WqU3xV*dxa|=xBA9Iyu11)jH2D@IJG#D9D>$ z=410|)EHm_GOeX{#Es44XDNbJJ8aLN&lI&uIwjiQdws`J7FH(4DfwuTze{=s3UF3{*`C4KkH<50(^quGzFU_;q|Q^QHt4xpS4CemP=J zF2-8hQdP!LuT1jdEfEC<_FWj>&r8@#a&4#a5e=HpsHpb)1dB_)lIpp+CCydOCondr zZ>0N4CP2aTH?Z?_oM+_Z;jp%oD1`ngW$91I#+xHCCWqSS`QO7_?vi8el_g)9QJqKS z;#>wTpQb;jjy5fA_CMG5F7O)sHQVPLc^PDKmQLJ@vA>trdA9y0ii8dKyo{79uOfEJ z+CYL${!+rxg!gr((28tI%Svz&J+FOvXq;?CJ1_WuBAcPQ-OTG`_xfs;yZq%MIJEPZ z)BUr$yHxoM1&mHO>V(ER@ZhchBwU-DJhd_b%SI9TJ5h_6_YN5;>Fu6y&1N}^DMG^R zS)tX%UbJo_Ay(h8fe`(gnP+~STn=+3+(n6}BHz7$w#tN*J80tb9&*K|=r%6(1oL^mh3bk+w*`Ay(4oNsT9NkRtCex+y zP<0*|>#ia_6BE?0)(j;frmEze3L|>*%l7VJi~`KsasdfAy2?dyh;X_C>R;-Qo?|_m zCktl_C8Fd?Vt?^?lcIEo*+m9=iSE)VFMCJfpvNm&*bNs%NcDA1N#f8FBnQOv`x!V&M&P7P_ zKGscyH*o`+T$j?j;AY{(e{JC}6=*NU_J1y4v{SULF$bQ{tp2~)_eamt$ii(&_*A^!OiNk- zbxuY93|U3@s)-Xq$yyT9Y}^N3t0Qxae&gL99IUf4-h6tsFy_azmW`Cdb!V+>uS%?v zah8IthjCAXmaz)`q71|=JvOzA+m~>i)SjIyB8=HDLKf5u`z3VjZjKUMiNpjx37wYok8QXjymQjP){AFA2-`R0(;sm-Ozet{n^0Qyq_# zDFAG{;@{f#M=up<_?8EL*k9xt$>Q7f4nw4kN1F=@8eL-tkjJ(k?qnusoq4J;Z+f}U z_9G*12(D;&Z$>5&G{4PJ)aSIOM$GI_U!|^#JyH?dwD>q^=cI4xCD7J4U&uB?aU96l z_2H=#_dqvgCODrq)Ed-1&qZsi0V#qma2N{POqM(_U}ob`Pdt|V+)@d6ro(NyBkJ~rAFZ&n;L zY2u(=VeihsOwuw;F)`$nrJ%IO%$tNG5GiA_h6sMECV+&QBa|YDWnvF|WHbc7mU88R2tKcz4iW8Bw#k`pnYovja?jk{hY1R6-G^9K6A0kH;i+?!J zOk?TSXx4V_=5Cr^YDC5<5x1|ZY*QcMqnvMVS;F_E2P?=@)h?OeQ97wWVB2mt5KHLg3hL4yx zPHRd&dDxl`-rqsB@AU7hAm$jkrq#cJT@4k>#96uRB2Apn4u|AdG`~5Pr^YwSgd43A zcv{7_f!FY}cJ6#ky>Ri=vvNvSO}+%B!FK9x)~ zCM}2yQ-@Z*W{i!xcTer&A*G-b%Y0zKYkUEv+E5PXk>{Ta5Y$szHU}+_Q;;^fP+eJ< z>fJL8kM17)c>meHwKzL(FJm?cASl^#^zSTi+l;B+funP1$zkKOANQ^=0sgTR`#bn& z4^T^Ymh-J9ZHrV0iTcam`+EHI-@4hrz=ML}eZ}oL8+0(5j=XD%{ zQ3qgK2VISPT}wzO&DS(r?-|t??#m|H@Y)CGJ@D$-+<0nPJ!#zp+)`>qXE1e}cmrl^ zY|67BhjE+d?R_lUo1t0wP~BtA0%1c(vWs)MeryLS-BP*S)!~%WNRr;TimSCi4vB(J zk7YcZ?tp8v-TK9&oID|q%IwG&B4p%98UB=H;_+ms_h^Sub!o$2Qjv*^@k&bM4P`tf zd-@drIYzjA*eo0iIeD0#ltN|0?o}U;%T77UnNgwS z{+`aJ%*uub12flG@4YTYuqh}f8%}x75EdT8bHd++VIJ;2(wnF!U(0?ihZy){`F$9E z4?+VOhTokJEzhDbB8}lNFe7z{mma{8-MRhP$9NZpkG{%Y07uS(s`@F6;zJAKHwwRx3Twqd5_=vljnU}C zqrM@V6lrr^LB76Zr~100>CSnvP53Nvp)$bFxnmz9`w;wH{cSH>N6NkSce`sM>p%n?iz@+#t z@)XfH44CjCF0uB5yBOf^!bfkcDz_yZv)vWWahJymGI&msWIxN`6|l)byy;mNtm>*g zU3akdi%$1Y?1$7DRyFzhrDSIK-M4vyUOYbfAT~!QFWHMO3&?QvCxdZxd~hc+2f z$-VPJOF8B1y<&G?T*f>O(ftk6AdFQ?j4)=dYrkJefl^OjlsbS7)*%HR;W2;$XMiXy z`A`&zMT#11Z|CT9n?HSl3`4Fb4CGuiVF!ZmVPF)eoWehluL(?0uZF5WcjrO#oNMQ z`v{)DMk4ke)(+wSL_>8RHg7MAHNedHp#@dfkG%k$oTXYC1Jm~`6%W4o#_Rns4I^a1 zjz{GCPJ?CLevpxXQ-``P-#vRq?+NSYV_>lthnHGm| z`+Y~{Ncq)o^Ss4NM!rNm10PD-vUOjem7{Y^mCBH;6RS-3rnSh$Au7fFh}McXvoPsC3K_0}PGi5RyX<1M__S-?g6S-us$o zE!QkxxR!Iyob!pj_h+AlkXi?D*`+7*RLhIY31W7(0Vng}_djOJQhNDoASUph%SJb+ z0zU5Z4;pZNDt*sgmDh0J=)tnt@y#^0(FwjJa29^XIvMW|7**D@AB^~$l+S| z>c!O5kDt&Sb7PrZB8AVZWZtM*T(=K|UsilETx)db?Ehd8P1s6or@{=sV0E{7MespE z8q5RUF)2Sw`8MpRQM}P)klRZs7|67Bfn1?UYm{mY+>>WIy|^oFcT4)B(9xEmS0(-e z>*k#Yd0dxj^E@$4pY>DA6;eD2dV7x@yzD`-JChaASlV8bTOeZpN2Rk+!_-AdN=%luPp5_znke#)AytR|6do4F+C0!8Y1g7>{&x&(__r`a(foTn&@#QVB7XZ4c^yYauRnzl1V9W&+S0qhyqY-kEqzwrT? zmFB~DHe#J`QJuoti;q%}BJ-#T$Vz(3e5gC?RLoBLBZ)7Is<&#gH>~94!4+B9Uw*7w zRWPG1@Wa|~yN!WX{jUC?Wbo*w5^RPcA+Oub#Irc5fOm*LGcF)8N939*UH}*d@%+< zlr$5#!8`*LHGS{n*dq1y6ULVKX1;s7yQtMNh^IMrV!O{F9c`&`v(9O%;FTGw5tsmB zvr6LOP{_v&N{&bzxGzG|PD<+GkKLNK_9>zKSG|YO(vgb|kC36K-?^|q(8^`)Qvatco5VefsC7?i+M0}Zk?8N4@Ts{F;kq+apvJ+ z=?(ulUMsBYna#Mh!Su!ZuRqJl%$cC~7UJU5RL1_+dCk$st(B7W+U71c{O;GXoyR~f z3C!37a>+g9P1YgAuVn8s#LOIhn)f#y9XX|w=VEP_Bg||XhxG#G!Y{tbnT8EGe?7%I z_DYfEan2|$=g7=kmzo`+P7MK_w=sTpfc+jEj9P78sQ=_3q4klYzgON-BUTfA8O`yR zU8G<5Xaa_E-H3aEdk2me_PLVjn>)7oCXiA!;J}eu)%pB5a1?xi59)1zz=gM)(N6zWKj(Gs`aS<8Bm~5af>$){i|SU zJ_m$K`F`5gQy8(Vk<*>7a@>2}3l%yvw1CD+%dkQ@f-{pN~4E5{i;!#4NQM7dQ0 z!vIu08d5CA2FMqh2A_~|4*8lSaiJ-i)belR!EQkal#@vH5vO%rqT<2#VH;a_+hw11 zofkYxqSfPOzD*aD?&oK_c07l%AyU{?5U&SLxHnzBYM3hos)1O-7MYKj_6;K-Wf=}X zqbdtZ&<3L~iU>4_?RLw^&g zU&4}Qeycv?j~euz-88$T6{pyHuVLQL!i+J?yl>(*o+%{HhGzW%xd=uVST1sz#QDHD zH_B<&#Xuc3iL|E{uE&dJ6x{pW7ihHQ5WXkQVi5k@R(kI50%V7B#K!7@Oa#hv9O-@q z=47)N&WO7`2a-+>&hqDjVZ4RtKFp|bYkqVe0_;TG%QMP9sLTh-ZV~iTra%Q4SrX|% zPHCiaRv#3ATzylSC^Rl0T#D)U`essJWOi5QLK-jt$-v`x5|#OFV=a$A&8+seA$NmH znl*uA9X@CyEOflmmL}_)21?b1+Cip`Ku}fso0Hwfq>y?Zr9)q8?O-@}&y0Kd%;v_* zQb1gJTr7dm*4BFu2xx`GZCB4bK7ZaU94X>9zU^#0B0RV;iM@tBU8sfS+2?T*v}g^N z+m3uzj$2X0J;T)tbjnX_r5Op>B^4ZtrNuM^vRNpZ2mgK3>2+-Fy>XJl$uj8w$y`cA zfGSlsd*aS9C8eBINp(Z-1#pB6DQ@-%RXOg>H-}&Q&Ctucb8QWoMimx%qd&=WOK&rj$2)cOF4Z(FK;-akw(l0s-b^-*KEid-hFIPs{UKV?QAy&v_Y|D4dC+H2bKf( z+PXTSuHc5HnNERxFXFhYR$cnFp1BN1I9w4MQzO^9c-x^&V83Wa%>Z#t*{Q5})In2KQM1i@++7A_klfs5^Q zY<3a`mF9);U@2Z&Hav_&!K*mEU)K@JGtG3^mPGTeOm`DI3)j1LQWAl~Lpbb-z?%z> zFzd=9-Y=fH0(;OX3m<5Q%PpPUobZuk{LQn+a#nBZblZu5y*UC>*NyGXeLN*erxiAq z1_#queCEyf>r46($EK0lg_A>s`C{sQ55STdS*rctXS>gs;9?8jPln)pumK&#QSw0L zD98UcCeoE+$7s_2X}I}nwa{(?`$N)L`K{MrC57e3U&sJu2CaP z@OP+MFl5&vbKDkuiph|g^Zk2I?5A*wQFELI`239TO&XV~TP7K6NGo5)NE$LD&RUT8 zVO{$vx6=hGp&9G5Eoe_e?L7`U9{5)9Y1q9A%pmi;+AK4c{r-q!+zaCKJAvasn=K0U zTqmf)UO5knXh|pKRp%*<24Q&hOow(wWdndpm*|=r__(P}9F4v6tz@I}8Q`GdTjhT| z^d)$F{0yfNk=bDb+J}Wbd8aO}pfNOLyhjI7pItkMaGw3C4O96dOq{UtCVL-I>{cmR zL^$VCRHeLL>lBv30#*}mQ5?HvTL+7i0ClEc7)d|{q9hpl`rV~nMWjG zxknEoZ6|dtmblTYfK?Prw&f@MFrKic`e9-q^#jk6-xwrO$AX76A{UB$F7Sk`&$310 zWT8n)9S3upXtGaK_2%pmLH6EIIx^xaUjVQV&ak9Er9#o80%UTEh60@takY8wAO1nqv|5EB? zkGthKkOV?R7$*5pF86njk{Wq5UzsoXFsM6`H3M_;ulsy-gCQH(ccv(Or;UWdu6xe% zQIT_D1|!%Y+a+jXYmKT0Q?grxG_m%u$kKAsL7T0ni>|SjxL5L^n|NH9-Whz>9sag# zJOx5`TjSCfd_-HQB+qiP^Z>3=6!{SqCqYv#^^p(9Vzt{9JUBz23LU$Kk&}UfJg3~Q zkDG_eZNQDytgj^+an8(tXExsNum5#BYV=0V?yr@D326t^BHj10jL}y7!wa1jG;R|_ zQ_J%DlXVNvS2+yFf<0OfASSiqRaGDZ#xY*K?%~KjsykC@0sgNTSt>>Ph~5CbXH);p z9-=-$0XZvjbN_jKaj(`z!LyPwhaM%IFl%bK(^mr%^sTIW;vZ?*c9W3Uu833Xd=UYI z7QIZwQ%&i|ews+Z#Z2p8Zqcq5xH#P3baBdv5B#k}^}9QX2P}$|uBTm*NJ!duc3M}& z32KX2pxsu(AwlYB%=wn$!wL4K%=Jb3Oi^~LCyn03d-cX+tBybgk+WvG*qvqptN0Lr zc-KLE_3(=7WcEU<<@hjaYaq$);E00rxnm3qnVc2)c+}v*ElfeezEs2{Rsr;X#UiJm z9UbnkV&m#ShWl`JgWbEm$}NMnWkVrDWISRAxu=kDA&yz;?J6#*UMzPe7J4!$$*9>T zmREeyE<*QqR|e%=&|sAVquC$uV4cDTD>8qYifJyNEV4>tUPvKY&=ip&-&G0aPsGh! zTQQEgjAitDj+tdPnD$oGL+7^UIzdNSyKOs}Kjr6y*5DRtzC7AryG&PnU`pqZkUe7; z&=u|BSmpkRWpB!i?`npcorFt>$l^qm`97ZDcKQ7+M2gy0ahW9}CnaNbY!Z)%bsd1Q zngz&i;cxQY3F;ol1GNhP39k}BPH(JN<5Bq;F3HWZ*I~}rvU?7)p9vWm!xmMd^yyxX zlFm3&`#Zq+I!f;LO{K=Hf156hP0wp8d1{ARseRx=J!~irZ+kHP&CQ@T;;{KG&(;)y zvq6Xd_XI;?8f~~=OD^TM#Q<x!3fue59!BA?9@o=|D?F&6Rw zCG>KfH^jUPDlAbKks^vKGDq_KSG9BK>9f%MoKKfr0PJ=x-pGfy5LUt9`DDYDpUVB3 zd7@Iu60`W6Z}fLhJvU2De6bu83iRqSu2%>@{&Rq@=K5SD8%yG6+p^5tz@dWNU?FbL zajUYsi%GL1#zovlV%DjfRd8n+?Ql|ere}aoJPi`lpOfr_c{>}lt}-ri#kL>%55N&? z`AccxNG&`KlZ=xlT};Hf2*o|)4+wTH*npXDMTK~RNbRsa$wEUrhqx(ewU-ps=+LV* ze88yIz3ck{n-r@^!cjPDwCT<^h2>mW{*uh_hVcuA`zcpwcGPU7C&ZE7qO85fcy2Jc zUHJtr`4~3u1lw6#?>@f1CaAlxu-qu&`y7qt#{`*3D};J z4-FfTf3-MJm){s4lgRW(RZ?9~SGTarsnXs^UDs7Kh&{{mt{~8`Q^8XmEAtEY(t5+2 zSz(Ze4RTphKBnyHvUfzO3O;ARw|pG4n70RJS9%6=^88}cDK^4;WQ;|!k|b&0!HGO& zK&^B|J40CMWsRwNw?$cjth%9DVG6Dzm2{{E&UcTtBVtA90kXDsPRu6Trr<~Z>$nLa zcZ)sGnj_S*>9`pNO{qAnD$E7@b+T#{>1NP4v|~&?=RBU&;l9T#=rF}Ejx9|pF8^#f znB+hsaL9fk@mu7Wt>NL!QM_P zEO+~&>6EJRu)a%oWd!k5%Ln@;fh!4S!sTx-hG?QylQG7=$`JtALqGPgiR z{7KY_d>lr|N|el8^WPb`!~PZOrX`5b2au zIC6sSv>}>R&NNs-FZlBXW zMu#jF*|7~af9=wejKT>gZh_$#@>=pcMP42#Q_}{kY=nU5Ty=yw%z6{js zid3)hL!_`V@1C&I}x$2rLOmkL% z>8Z7!^;Er_Yk5XxfW))*Om^-Vnz&9aQ{tjxSovQhUt&~ zZp_Rz)?9EF|K^Pv48Gkvul0;Yb(Av7ytk^wUwd70CW|&U$;{Aw>6>EuWwFC2X+v0w z9IpL@&D&0tN^8MmItqh3puAfhA>$p`;kEYBGA)5rUH7E7-C<3P#A$K7#(B_G@UkGp z{$$=kZ>B@Qo#sSpyGN6&+!>K6-EnfqM8K)Em2xTn$rm@J=GV=sb?M@1_NFqp>6M+D zQclb%#mIQ7@7-PBQvvMefNJLJpza3`*Hw7(R|1>v2fC`tcK&!o*2&Sq{rw9-pMY+V zK2cTwnc!*kX8>i7GxtFVDSglVS|uePVd0fMGpR@PKIYAp6cry*Jc`|Ryi%&8dde0p zr4W^deP_^H3p33;lyIB_tCgA`P^hAc$&i6`Jw&qg&sZ zD$ZsDySV*!uN%vz^Sfj*d3kjkgWYqR-QeC=^-ZJm5(m``krqa+YeH1BDab&T!d{~# zjk-nGrn;-tF?=+|rPhY<`bg=fqyGkxmCIs89LBHHrNu}@_c*s(Cilc~zt6Jr_^v+@ zlU7+j5qw=Lysfyj&z0`ofeH95IxRWw?)AU#-nv6B9BLSCb`GF1#+WZkclPO<(e+tG%TFC(*ul-0}wEP7Lz?V?1Fqai+gl`>MHRQgCN0&0))DWR8_$i=|J) zbXT>VL{#an%p8XkulJ>^U|Lp?=<&Q#aiOW}oc;%km%HW|>|$0k=xETElx!z)I1f_* zF0sae>ReaUm8#c7)lvu^iVcb)V<@Fn5gux$;fErLD)= zF_e-yt0)|bV{oz}U)@v20F`oz;&M1_ZR5*C9wkL?yGS`W(KCmHM;J1we&2B_sG@I5^d+(@1l%MRXWySz`8XF6sPU$5bV2eiW28*GK+Q~w*106=B2C1p*^X10^9*+}Wmy=Q|J##^ecoE0UT%mkq; ztg&f!Ra?6F>x)=~KM36SltV+j{27Xv5;B&82xB-vT+Xwx`1{YfiD$WTa+Vcm;}tCp zy)+f|ODFE^ZEh?5zBtr3T;!5nwd6m0jJ8Y5^m90%Iy;=^1UVU1C*S=Q$x`*L(o#H2 zx_$2h^^<2Tyjhrs>Q@V5;s(-Kxs|`rh1aIE{$ZyupWP_I%dOT2LDG=B;La}I(d(@! zOBE>(Ob!=|f3IBbp5=_t7^@Ghy5FgkzBSu|-@SE5!%>4(|EjYg(U5_&ryTdV``-Qc zpD2fl{3|^jFQdea5dXA$SzdX)q21@}mM-H?TweFWLnWhh$8#}<6~`5*F~~uKpzq&` zY5?>p+n`*QX5 zaNXCxIMM&Zqu;&3P8_&X!tnCw=}Pmv?U1WQz19P+RR2B#jG)v`=}c|16DN~6F#v=` zjU!lv*RW)1bzARlnFqr81}P#U$o2`sEXU(bqmUd}26IpGAaC5yHfqQWbSXPU)9m&4 zG6Su?Uvt{HysF%z?S_dTD^97Ou9o9bhV*LmQXVp~!gGD0{+5!ycs#%(yicB%l?*jp z9_*y~jLzHb7nEw47q=DC5ldW>`faa#^ygdwe)RFf?`284{*$ViD#>n<)@{H+@kUe& z9_1Dl*QnozTT}UA%U&COc8u0axC+j6m#NZk>5__U( z!d~@$L)s1kLyAMkZ6(rcnuKaU=LN-YM&@yOZuDFhDtEC5Hn1q(9<;%@?4!; z3ZlZwAkWK+28<~fq$EVF;tq`xq0Y%jCqEI9iQSJxqMgy3r(%?3{0DC?gSzDy$0BKb zPhaaH+DSSSy$IA>wv-2vlcjoW7N$$qyhZS?&azr{fN=Vk#VyX}?TAihulfqF;MH~B zz3*X5eDbq9ph|z0thL5JGMeMu{t2~G>BsIoozbF)vt1=;zwER}G9FHjmO$H*6a9|E zKiV&O;uA~l(u1-tFw0sFnU_2TR^hPw}g?!_MGsM{|*odjc<^+&~m&L`E7b4 zKJRsBtC+d4Hw)|%xlngr-#2Z@_4wiByIL|UZTiTijSCmp~#>2!_-!a-Q%}E;f^-jH~j~U$_cJj_ZKP@dkb8MV>1WLW$RNyx1 z=tZheK-N4dV$!PXjsO{qIij5sbOmN+tW3QWQ^%f!N!Ir@;YdbuG9``>k1x*mZ==S@{4sgn zxf<_+%I1ecY`7cU=w53yrM7_TY3RHcB91SP*DRKcB3L7Hw8mF5jMw2+p`n&R{ygPFngaSax2vg}uXb z86vML(zxB=*(bOTK0XNwE@dm&uLd0uKF=S<5)$nJrkw*c@~#)m^D zQ{0hC>E48TFk+&Q7g>At^ut=gX{_{`p*#|PrGt#m0o0wTm_5(bQ_agA;<~rLm)>(l zel3QzRCcR^=au&TGyvb5?>SjA$MjdL->IY-tH<-10^9;*IRLhj`)<#hVLYHT7{1BU zAUweORw_~mHLWv*xI*o{nFEb|XT@Rg9nD&_49Ubs>5t-HLmaJYHD|zUA{37^o>CdU zSWGF^+N-TitNq?6mn+HWb_DCAzz;mC``tzNaAT{_9J)a zWU@0`>0b#gc(?wlkFXujpVL?~ltDVAQIMgAxYDw)LXF0Zh){6N;?I{zgyI*E{Fdiv z<;-aImkXZKp%^;fNchXMgpd-qlLyZbNez^4DYL26lx^Oh4qn3(r+ zYP!JMKi`-hO6yIgCfG)X4e1|8r@H`16}(%VcmLF*Xc6D6g-$~Kc8FHpvos|kjNlfI$;L+yz`Qz|JBv+@c79wLG5{j6cWjSv#o-^$w1Xs z)6BwcdcgwhG9eM;%VZMoSI>w5;{F{wBkKTAU9mQc_Y?nb+UEc6to&0e(!(8$?#fwF zmp*1x!Ve>T%lP;XzcRpz+>40h`2wgHWlQiyZL=YAR?PYakJ_PgB*mFory}b}rRFlP z)GTJY(s%txY?kEKNO;h-6BReYsW{_j#+cc(n*wYP6d2vFsT}{hu*PKh2O5{p^iJ3M zwtCz02S>B(`VA(CeR-`+yPI@4ICk{mm&T%3Y)_Xz%rfxh7BIAzjxAv(J7G?VMNnnk zJ#0y%p`C8*P#-OWMKY! z&VoOa({VPYKa|1DJv6YGc{t?T-1cy5$?8T|{kxTnqOtH21{(Hxz^;GJK98rfz;CFq zT{8{}WfZD3DLFgMLj-6~I5jeFmUZHS9Vy`rFdqNP?IzOQ4>JPCTf@&kbtmxs_+i`y zG5n!7DDxYT2t**C2@r1XO9yoiPxwd)KVW?Ml>P>JlLDqcaUQ8hV%uZw!4^%vd?sR7 zeyRRAF-0txNSX_;Me!NxnOsi7ql_1@H$}w#V>0mInU|3}MX)a;Em^at^RdSXFl>-K zjdkDg{Hp!zr~SB-2A4zb)R)(`CIUX;i;X)1K`q~~^!jx>@|Kbx@ETL-h$K%$xUuyG z&3w|zT!n2)Hu{qjC;*RiU&|DCIr6hZgb(aHo`(` zI&L@}0{Rjlx@o)1UvK^#U-}WZKPtBV+DfLyMR1ZQvkDaZ9Y+wBg~iBkx4<$5H#uSNj(&Ro zil`z7$_;4vi&vJs%77~~c9Z21=PiTT0aOXclJe{Op9*EJ{z}xXbwS6=*(%>{X;^f; ziARZY(a)k=bfP(~baJ{c?#fFn_NMsTeOo-Z&&PT7`uwB=B;pn%4?GqoLqfn~m-1n= z>3&I}k83mNG}@3A3MlH+(^KvHQ#$ib(}-P!8$6cZV2-EAL#elgQ2t70$_tGPjn7VZ z!uSw%GG@-RqJ6K}Aezd0j4^YxXEBNv2W*ZAknVSL@pYb5UlO%UBBfJSO`ZAea-Wjd z`#E)v@W+^-tZ32AAgAJ;ALc^WadVov`j+bBPGOC2fk`t8aGICJ*+I?@jUS14PDTs7LtsF*r7IB5f3U7XEEncvF?Qk+* zB6!j8QhYp)X1yV7@WLS^ZBHVx1=LO=gZHDocRET4U4-~7f|HBD30ORrby%|RuAH!2 zLX;HF*$TfIQDbe_5a?S{J+VwlM_`XW76{~q8LT5q_cFTft(&7$y8F4xzfao%PCrVm4W%5OCi8IUeuT&mj}l& z6MEO60knRWc_F?2&b@++)ZoldQtnhWweYLGg!{Tz;|ks&nc35AHNP{N@8YLamACRh zu159WoF<`!M@?jg&mQsb)#Viysff>x-7 zgV}V^#?~wWB(yQO8{g;46Vi(}*HMQR(pnG!C2*NKde*yGM%n+Wzk zO_B+PwisWVCyCRXPadMNg7Pts*24nFZO+O$QngCAC%$t^c;wK^fU5U)?q08#gk|X% z!6Cv4ZZBjCM!zMENm8;Ijx}VMX;pfBZ=mo!K;R8Qpv^5NoU7DY&t*8YKE8bwFHh$F z*>CP77;LSO)<8Q{Usi^mO=~XQo=)MsCBOX-g&du4!Wb|JG0em6XA(TTr+4>C9(d zQTsbE>>P33@dC71i%m@>*}eM{ej|n2$Hh3p3Prov35knG%fl&ZKF7UHZX4qS{9W^! zoqslm|D0a%IY+|Q?Z9zf8C7ouYFgHo+Y?Rpt~9^Yfz`^=qT)Kc2jA5quTohNF66PT zR`&C2y_A}NR`bZ~W25ktEM%n`ad>ooh=}8XcpIQ*R52%SB))3@5}n-C!t#RgA3+p& zg9MS@o%5}COw$9pr>W-zVQh4Q$?$nk_RiSz2PUUu5wP%3gS}cSi_x8AA@wIa-4#Q% zAMEI)eRwC%^Ak+5x3U`gLtKM~yBdXup`hR2XV^aHP;I3l@1bWZS1Czs=xSx?2fEx@ z>GpckX4JD-m(z5oYSDxBKB7C2)<5)dnJ((5RyD_|3)K~WbC($H#%){aHLP8rUl%i* zrXe<9iv3uwUz*=0UMH{o7kI*$4Sn{ErIO@#`8R+fGjq5}Za_iyt9&AvzOr+^fWK(G z#&zef<8^CF#8FsPi7Rqm2d3&t+vK7$I;`^yeZeYBmd$oWB{f3rW04*16Io_kwVO(2 zgBo*^7`|uZHX1{t&f8WvB3XB7QuN*d#Vsu{Fn#E6T{9y!S0NUh+j~&2UhjpO`m}WR zQ@7-7uWyvYvqPf_`XcIiw<>4VnxXJ(;8kIp#RH!)OIG|anvO>UBmeX{-)|C2q6lPS zJp9WXj0p1~%IBl+2rzhqiQ+nM&dsQ;TwQ7gh)ax0C-W2)GSc$PFpdfbFNI`^8c9|y zBtox0H`{n;ETu)*2}B$fwU0x@wBS7-b2jn_lPA}7K6>0&t3?#9E?^6~Xkjp?%eB86 zTNdZubkZG(Z_H0;T!}!}?c|%oOX}H_OPRMBU+PXqxz%DKfMln*Qeyr9SSTREy)p4N z`~NHy)%Oi}ldATvy3c`Kozhj$1&WGz>HsHh#e4cj0 ztDfNK>G5RKu74nX888QRgZch3K^Tfo>a%~_Tp~A1W|!Pb>mH}#olma%lJUYj^A{r) zWnqoCvP4WO9|*~$426gAFZTO?1@SBP$SH}(3w<~52aAzU*AMGbwUuX&glh+<|RZ}bjlD=SOx94rgkYC>$#eD)W1)$9_7&pyRAnX4>|AiValb+p|m9? zck*c~-%UVt{TjC-F_ixl%eA@s>?C7tSjOVoLlC~hGK-Asw~U0;u!*FKP1rE%7F)bDe)ngns<_6WWkK z`?ud0knMG?On0GC(}TS!g=}1o-B@8OHd>=?_qn&v3KM4>Qpixxjbre{r0-&i@|nbIc-zOBoG>JYHymRH17Ri=JtS6M-+@j;Zm8s&7vYe-Z_4{Rpwy z+>7`kw%OMk^*N`1PY=K9KitJ{ZbS;>KD!qz!MEPzTfdJMNIAXSaQpqigya_UNJ|pX zl&DH%T!~f~=_{^NB*-7l+P2j|q>8OJP428ECE;!f9xjPqydI5r&GzM0vQ~=9CO9!K zZb+PS3-}M19DIru0zPia<^qr@h6i>3GX0dx249MM0zKx#9F1{7C_1N5or!lI?0-K- zCHt1%N_FCTHi)ksWJWk@A%V8fsvBSwf$MEk9M-ql&V+xZX1;=FuRz?@Qvz_!*0d30 zBK35Y2;&Pamvn~`^^wJi1|L^Pqvmf0{z59N*GMJ(BHjtN2yMMuZO=gw!O_&amg9pd zxB_4E1srv1*fj`xAzHsR8=)9^#k^iZEoa4A+JPrb!02{cRulDacwh%$y>B*;F0>eo z4H@oha&=&W3g;m$wc&QxC3QuySxK^ohzB6ez|j8N>svt(6t_-p!nJeTgOKsk-fU)u zQr%5+(=n~S+4o+bH>QpvLT%H#tMk||hH^2#?CfO5U6PVq#DXK+V_Jw7W2lkk`Hg(D zeS(#%wcdFy6S&bVZRB$6mc`Y(lOf8niN2~F0HIxXg)a&TEN-r-0txnWt_B)^JDt22(9uG{0i05V*4<}sE z#*BoAo^osFQc+iHNy*SvH6 zOi8$vTy|X|XO+@c*_<1`qorZ9PH`{z@!k9QVXSfaFNYWjY+R?cB`{?bMk^4aR$ zw{3Y&(e1h;#t`er+b#24pY!P9?^`4o4~MAOYW ze9%nwLTCe`yawhys`}AT-%8tJ<7tTm0&~QONq{2f@%V|nyaTvEw*J0)e1_(wIyo>! zEA5mAl%%(HQPL#0T05k zkE?wnQ$G^>y5yrHsa5)RUxpS+`!e!etqEC#WtsIcSz6@FUXKh0az0a~ziXAfANKXG zSgP9;88>yVRW9438tKhD#mekR-=-Zgv}#sz@SYj#@bLN@+uk(1DeF(cA>s;vc&UYT z-u{0nNoF(L8LRj4*mU>zuS4M-`|jTUzloHT%YTxSAy3v{U5c>%$9R}lJ2b5fRMK|= zr0ND^KUR)uD70JVa(_Ie^6K!RV45YL3pZ1xTM0HHeoha;WE2V#pVdgKW$d(OR}%{aRha%pGk&ecA+hmlBg55 z%^^0|uw;cD0tVqz#ch5sCCsmNO~f(Pkg>e;kft&>(ojSVHZ;gNY)eN_fAW`BA}j+K zgrANna(@M^Hvy0c-r#yuNy+Y??kGdAdKQmQimFEImMpttlhL1Ew-$n{ta6hBrikjU ze4kJji*bwwhyUy+wGASka_h0mBe&A<2#TSlLuuPOmRPp~NWyM|*#0}mIcu=`VeQh@ zw?qx^)`D?$Y}=eU=CQuVrs|UTy0+tR!Yk!BzCAkWz@>al$+tN1uTBAA`5RnPc^z|= z^F|T#U|CvOS=#1;DM=2d0KK*9L?Xgv42>R9WR17gCTsUur4Z-Y`EjRyhV9w*8oXVa zbjDu*0(D@c%1I**VG8Ee^Zw+(*M80B&%feYVm{)Zy80PV$CgByQK)sO zSiJ9UYAr@=n2zDh5AMLsjrIXP8K^O1BN8{}|1Jpw?i-a>+|5A8)O)k!@_Bv+s~-p) z$-X3O-l~V-LeeXjp`fp_=DpG(p*iLV()<4mvntH(t?Nptx_)G5xyn1Qy$%`r3g(M4 zCZgy0#RHY6ARC&iv!ObCxcy`1t-8w=YJW7}XQZHz77RPk9%}%U#o=}ihk$8=-+b2j zKq%;YsF5~ID2a{bh$J&QdD&H&(0SpkQ5~0guv9OJqmKm8Bi0GeoY`4lLhf)5#6LRx z!{m)(b9f0J^7!$F!nJ}$sC$l%U{`P(~v05m0a3h=(*syi(5MRp=|NrV@0Lqa{JE)tMFs#{I z{PKWQ(6;KG;O=3W!`R$N3s<=4rfMk6Y);nj#W7*1Mp11!>Zf_MYy}UWeNimtHCMymMO6#9ZC2TU$jU9bI9>bLK}Z`tE-i-4`vkVH=zz+v;=Xy?QFOjB_JkT%Ucb)G0n%st z4Nan^uC-Cp%DX2X4TR!yHVREu~=S+*R8Ad z9u98CsYeMz0jj`u8oq9jIT?9mx%$FpP^cck$=+krkkwJQv*Unxt{~d zqAF(>V8n{UP;Jh2GLHUf( zi*4C(soR->=G$<6);;S%`P__gkufVQ`(<7U4#1(`AP z|HOx06HdM%#7-lvB3GAp>h%6{q}C|nwC z#B2A`^ssbeN*~MexA!WIwJJAB#_9i@nEWX5@X_15PXhjaV_`q>-@F?I*~Qj7tb8>q#Dpm#?DFqyl8dCj z-T!p$7r!D*tlWoZQt{)H5Dk>qDYKtuf=-(c_yoaws!zy_6(4g{*Mtumzlkqm3Xcca z6Cn!eS3cFyk#pClKw**%(B6RU+0D}4&+#AQOR8hSb^T1Ntatqo6b?`~GUfajvZ4Y+YAO5-F*%vK~i_C4z{tI^nVSz#RLzPq3jd zTeBXGxCrnqDQ*&fEx}~J4>5;0fekAb_Cm1l*376;BsAS)5@e zi_JfyHR>BYuXT^{vbquRPJ&g=@X6ZbgN|lzI!ot3u<(iLK1H*PuI2eeD^6uj4;fbS}BlaSGKg5v%z5(=lm6t;)~ zuC!)#Kz41l!VyALltur87zRZ-q++J)c~S^AG|2J%XP2k`6+$92vAtM~m^XU0Sy2`c zKO`CIRmb;NIVBnjqN6fxT!BG>RL=BDGe(xeG7Fj)robIL_}5Ynm{ehLzb4V0+2N(a z6M(+VcBKIIr@c%P01`Lhg-Ujkv6W%hLGoT$I;OfT|-ez?3 zBe0UhuX6#Sx2dOJwZuQq#n6lZE|#M*jSKT4U~XA@{o++vJts>;349EVj4G_8bKJ}` z)y&oxDC*5*dh&)o5D@(--+m~OwU{EA6xoW||4TRZBgp6%y%kNzhLR%y09cHffE9uN z0PL>T@-Ik;{;vh>rxQSPwxG?%jqQkfJ{^d@`_v=fyem0ntm5USPFMee==hA0Ket3Bc*ZGO0H`R*2P&Bx(9U!FtBcM^F=aeRf< z>)8BvDE7rpP!hVusN7ie3o=v51{>6MDuoeLu2yh{N=bhF?{aRzK@6*d}xF! zEnK{=quNELDsp=hhLW|F%mtQ=G%tcN?v-pyar{db&wm6WO=|7${WCFl+?Y!Ie@Of4 zsHocYZADZN0U27#A*EBggrSk{4rv7GE~SPXkWK-Gkw!X4VQ49lPRXIAoB1~Hd(Q8i zcdg$a-?zTC_QJJb3w!o+$8}%#bw5w;u%1ae9vCFGB&-x0mjvvQot7vCe)XSiIRRU- zz1<4j@QG7j;Z4w;J9p6N*ClF&|2{x?JNv$wk@j@>LPMRxC}VPs!scfwDuWiH)UTaW zopZ(~5%;5r7nZi$mj>H8c4bmYHg`YoDlEV1LhogXc=3EtF5I6@_u-^Jon2lR;!d+^ zBV10vX`v1OHpa;oIz3DmZew|HBSvd&Y=ngklk9&oX`m6SaC(ie!W48=|5*J*3WHt} zLtW+Lc#xv^EQhzK)3+U1^Ft>;VvCiEQT$yYlJ~w==BqPa1#fqco=1?(^>e2Av%BI8 zQ|(>1P@cAk-s9%pmo(zBuvmUVk@|5j@rgXQ1_^6@8tOsUSiSh&YquYkSKEma31SC_ z{X4F|e~yNmhqn?Im#o@6VexB-t+9P^eQbje zM@`GA<4AudMyP&qeZ7J_cK`Zo#;=0b7P26J9$c%E_3!E?8lw?ckL3F{!*?UH7!e|a z@Lp$#{Wa;3dH+%UR!!t9m6vPZxO>F5IZd>{QgGrjU{Z}8=}rby|WyxBkgK$~~H ziTJ+koar*|@x>7FcJ zG#|OUtXf|0`+JF|>R=49aRAm8h5iUE@Mvl~&ZJ^+??DD?ijT%qrxF?l`aGNoJb!Wm zoWdK`W`jo=+g3CizB1^C4vN)o=C_!a4jSKi#Aq7P?z8aGqQjNm+Py0cajhFT(Z6@< zTkaE|9b5cnYb0+-ZQJcTU78#Eb;FxFU;BHls*MC3D~r6l&2%K*9zBuy8tJ>DJ}1Q?+Iyq8=oCXJVU9I z!MOf24wGa0q4(xq#WN0*>+%?x(u-!`-(L%-n_i6QI_K`4-@|~h{O1~G#2ggKm&ozG zywo9g*nAPx{&KmiMsZ=gW)&N$ChzD2-5M5heA9~}2%k_5Z##pp>B zeuR--;N$@{MepX6-to9t2(1MykLO|R_ixpEa{h|Gu%8#zCl}UO39ldI@ZL8*5u2Up zJ(zIr-VKwWtCe$(Y1zOv4ctLi)Kk(rx4$h|S6>ICQA+lt1&+(0QXglQ;yUM}WUF{F z#ZY9k|4<$%PRuGzY!%`SN!%UwB0Fh4IQK27@LqO)Zt#cB0tBitBg@Sy+}eF}eIvEh zwNYUu!N{U-cL z$e@!zN&cQ){l}Sx5B@_s%4+g8OXY7>V!@K&D()J+R80Bc|6H^m?t~$GW+w_uqogb} z;rb1@VGtZ=ydqf)l4p|O5sb`l%&3GS#*ljVR929nc z=K13s!(l%CDU_(8Pz@7uM&>fgD!(;OTHkg>D1K>|9QjE0HN;~Alph6yzlJzt68A;s z1%EB=!~%?lJ1JqFAPhMyGD`$jmyyj9Io8UBjC))`d&vDnf4V)COinH{jXb82VE$_H zg}S9Xly~?t)Im!1lg=0B6$X#p@ZS@y^g$^NtGFPU$+Mk)17WSP^iV-<07<{_l!A`FxRK3ogOP~y(zxHla`ysDfvOq49o)ZD`TMjv zel!8I`b3QEGVAnX#ccgeDdpqVC4JMj^vGB8vKA347cO(_L%>mYdwE+8gu^?*z49Bg znkQ!5I*5P@RkAmcfb(rKR}$|?7J-+!&f2@xs(ctoRGQ`E^G+HTzSO68Je(EqzXb6I z9Y+mPxb!Ap~y##j7zfd$Dz? zhh8Z15PqSHIZClbs_ft~#}Q8inz=9X@XbpMA|UH9Hq+j{b-90CAzTcSU~XlBa^k{Q z;40#ebvCKM?H|Ou8SicZzG8bVw)9v5u!d)B*xq4~>*8j%Z|rh_lA)U+0W>z^G-&_n z6LP8lOOTYOEK5q8x0s^N5A6QWu0LPVnaRdqyg4T^I$K<~uz^QLGSBx!g23ujtBeGo zwYt7qTq%?$=og<(hk44vbELhQ5xJ083_uI_=vXRT!>lvjM!*NsBaDXmF1u91jsv% z{qW7!OF0u>Ts=8TcW*8I?KmY5{!%Y}0$Qylyr$?jgUCQ$feA zL+k`JK(5iQOs=w2#?1=fsxJ%_cC#p8MbspsE_Yc3%Em|N@V!wH!mB!cz(RbUTQtg$ z0^XJ;yb2fl*5m$tK}haCf+p1F4(Q{CA=ieh%?uwwNoI*upqOlsV5$5t{`Z<-V7)`+ z>CI#nlPnLDV5k(^7p|VwSWs4&iGCSm%=&KqRkYoQvGdl(InWIF`at zrN!S$nVEVPuv9QV+`pEaIqKM&Je$H1W)1q8jPgO{UPnt8N@M$MA-tlX1Z@LSh> zUK2eY-AH)?>KCYh$&Yw$xS7taXFXJLg25X6Iv*!F8-*X4Tz)(hf7otS(O%lDI!r(! zLiD(+ZGw#QinMj9tXYk3&kxC1WQJzW?N8`C@Eh|BGeGFuIG;wnDXIEXh2vhE<1RRW_JG%DPU;gKM z2Eta8k3ky0na+4l&mWs9tHRX>YVW@s}P6*p$jHy!s-@K#y43r+h1f_&26JR=#fGg?J>r5_{Kh4$Cqm(X zfGP2vaIwCOB450H+y{PIx?-hhsBB`c!bff38634+5`GB*k+gYA4_xIx>dNN31e&wE zfuCo`#_jPI*Yo&fFp$@7Ht|ttFF*>6(-d4)uP^z^CbqBd3vjexE~$0Od8lgA!g7^cQfZD)&=_5?38KyAG%iRDsCV zX~s$^Aq@0=GUOwR--g~u1AaR5HZEBGIeqv%vg;AFnZ!Rr+gW)e8?Vtn1M-7{!Zmnd zPh3Y%$Ej4y`jL-9cC-1}G3S)W_*`+Gt6Id-+tYA4dKGYIiW=rT7r zkZEBll`xG>UyMQt?ec!GRLs-tmDv<)eZF_^V|vfNt~8MwI>cbBdVDLf0Q!i8-~XT` z5YVd1!Cs*5WS@}Y<1m^=&%Rfw_)x*K`NMR+hwB18FQ*|(YHS*i5rBR@8SQnRGXOy# zu5gXzs4T?|PE^1nUky8;FJJ(Ud+^TU#lKVkUl<_L3~6wD!aLhP)f7G_eI}z8gMu6zvsTn zAaytPpsXnSRPLWL;zg7w>6R6{;YR~ykEI9&pZ-q$-UH- znlRpK`szL+$x@ZvS_#uJel%>BZcz4nRqAE(Q-x!Jg{(`)t<&Py@nVne4YnweI$qqo zaJ(|gr|l!N+`G_=8{GYLcrDW@obAJ_Ok&+=u$QwF^o>Dz`=Iu>OJfY})K-q%SkP?E zR9ovFfVuo03I@8}#%Ye1bxi+*&u$aQzB;Y^tOMZl&+-PJXn+Jig{ATylT8sw z@G=77qqmqYM4nE~P(BG2d2wc448dGQeldW<0Ber z$U(-iZTrnBfvTQUc(vZ}il?<1MMrX1F?XpC>;p?I^C~KKLY=_UVj%Jr5vX8)>+{@% zGPnvDjx}Ngp5{p9g^v6z_oZ8@&*{s#4H#>Vq&0#Y{4mX@JHeo3i^rGt!Oc0fvDe^x z(2J_Ke%YP@Lk+ldCnDwz{f3pq&fRt7=uZMi7om}T!x?iTJY7M)n~73w=jyU!0huM{pDI4*&Qz2__!N|`QAo8+dz{z5e%w_w~Gr*z|j z+c&{J=5x+u9F`N2waQwNJ;@?xR&n_@W02Zs#!!Bsx58LPg41_bF{#2hv>{1rTVR#< zT=N+LPGNRL-+)5`w;55m$w^X0HUgIB)&99>dR@{qT}3_=SpyvL>JzBCiOVgr76|pA z5yP$@C{%i2dO;?POS!JwZ=mo9IzEj*Sh#-`GU;a(C2pX!tMGiH1$d*M4mGQH0$3py(r_& z?;BTI&g<$Oj$e;_XLzSeo|#0SK#(iv8-Mp~F*UhitCL1XRGDa>OC`=gD}lh0K_lN+ z$IC;j`t?5CdLSfs8VbYVePqt@+ z&+*YRsq54}9FO7}wTjSZ-cMQT%gRPMR9C*m%y)RS0cDuY={FRjZLg$xbIz~I;Y8rV zXZXJ6h!4Cc4A`4YM6=Ri&?{0^sr%+M(8~JZtoG42eJ`qt!viMckerC8hdA(+(_tg< z2%SX9+UzOQq*63&yqZ&X_RrHFK8#kYD7wV!@I!_zLqvrXEHui#^#A~aHH&h_(>sg3 zsLP_vcfU$|4bFZsz$Ysy75`AWT(iEoU#l@=eM1`L|EFP)%6;TLEzwEm?3XTrf$PC5 z)}}bI?-T8&^4sWCkp$jNTT^{YkjR>U$csJYu~)8LRPi@Ow@izG4og1uR9;*^|SFChx`j_#gX+rMF59m=NM%)p&_xKC0i9mS_Sp&vV|kItoOI zkc#h*IhxD3pc8FaXb`eJfFrQM=|~*im*`XugEtwT_I{YW7)5vt(K!X&i_UF(TwW~J zBX-3`L>ZJkSaJQO?HJhU7Tt0YAVhuPwd{>54Z!dE=td1&n5w$b#`t-&WCm2YG8`{3 zJAxJG9|qJM5(!P~$7$${aEuWQQ;1&{wb+5FFXs-0mOhO74_saDEIbB}pdHE%d$7se zPXgMwOH*v&Fuf=BRD_y3W;tb~DMANk@Anzw$4%lBwZ|5Yy5`;|+;jU)EkeLrCuHDf zdqTqq_)~bVtV_m!SS*0i8jb?KT}M01wUr@dk@jYCzEBD5;vA}{f-&+605R@+61u9l z*yfFjWVE=wR>G6x=u{3WAZRMOvw}zbLfuT_-Tl4Sq4G)!$bUh|`g1KIvqS8(gxGOM z)~*5Q8BzH$+PRHK5o-~cqy?UV6axeAj!Hf7> zXYs00CX$cv+3=0(x)+FQ12Lc?(Hcl?b0<_xxi0tHblZG|5)X7OGm*J66r<=jX~U&% zredBu;L?awJCQJHRC#Yeo)_9;RWTd2#K7wwtsWFW!93+7Y}{}rSL%Q4EIjuwFjecD z+=zHfrKmGFc3yx!0Vj%hlxcQL6y!B)wav}tl=RBL{BcjF_4P@MfR_9=1%i0Oip;cG<=o8yDrUHX%+Z_gbEO3s$E!`O z_$p@l@NRLJlz*=DzlzsCx5caX&V-2#u+kNgdLfwk8NeFA=L0!%Zi~6;9LZqV^NJJ} zX7zyE8qF3eY>}S=q9Wsd{;*=+pAEERQDs0?Ahw^ao;~Cd^wrv6IJ+cZTR4(2aU9c%@;{>H z-n|ECXrl7}DlROf9k*Y`G9CK!gm4Q^X^8U1YF*;^BZQ!ff zY4#zab5mds`}tGv`Bv1|z2A3zVhKP3=qo(_fMZT~kww)WayLp1H{UJ!+2+(C$Tm&CnWkp_={lTsrWXRpKg zD>}ip2MS^zSuXE7OAy;1Dv6geih0O7-$K|-dSf*DP&0)A1|S5~i{D1u92M>9r$M0u zGyO6=d=Q{&?CSE7K{jAgjVbm*FF-;Gq}Vkgx7fSw{%@X;aUy^%^EO-3pkx4944o;` zBsxT?LT$n7?C$;O`Hpba+(U(kw$4iii=|~)(2_Pd9^<5h8uplB<%?~o+ivb-zYQmV ztN0e^6+p|=>T*;joai$p;SBTng3x_u3KX6eXC9n%VD6(9C;3AW*z z>Gi6iGuERc5AgkKb{Ae!w4Iak2VECeWSVpvhqgdT&vG1?q{a4sd*H@Jr{2L4v9Q=;7IP1^3ncrZme=TnMV|j)D%G-Dj4TRghOv0-+Fg+Twx?1|Ue~>nl-j!mTSJ<-sGam*mN}RZa5D ze3DFk4Q!IxvxF05!6|_~667@UjK26-$I&?KI9EKjugqbw^vRbwKcG_tF>sPtq4By8 z(AybPu}u|$dx6_o$H@@NAE}Y=oyY99IL~4m0a>|~`~H}^)NE6HQQqsZ**o0a;;nS9 zCnD57awee-$R+|z?S~WyKl02r|EUSxN{H|L9d^EpRQ5DaY8HVC8P|y%vVg7T8yR8a zS_eX4ZlO#$3R0ocep0V<6IbKSWyiBa}hhkuInnqOkx@qkoAvtD7+P6`0#l5w#+&yUeLy z8-%-=GLN-r#+vKftBQ!2v;7{#M%s?Q*`3>|=}^~?LLU9_UElJYT>PpV{W$%r?%hi8 zmh)zo7{|lFTvrSuKNgu`(FfNxzl;`o-7&piJZ%tKex&>o4@Ha;hcPx zYAx!`cC*?Wwb!lMb^|tyyTPe*5K;%0qa#YT54yRf(E7cn!H>(;jAPc4$)b}#0{ui; zjvMeW^_FuZ;eW(cZ=kSUNqq-UK=}%^Qo8^$eNET+7-Y+E3!Jgpn*RpQwq$pmKS9(3 z{W-0>nKVf^ghE1NK+X7{#ft zhb}V3Q>rQ*@dthW5IRn3SoB0zxw2LJM}qVASa|Zm%w10{^3kuK(_f65HMQP$mN*a0 z1)Ma)kjm^}4gzc!;)6|Ss2)v>EfHwT^1J^Q!E>VnLY+3(h@43nYp#^_g8F#o>$Cwl zdnhD`{>F95RgP28tj!0B(0K)*L|mN0celO8EF8Cg(!UwNpNc7*!)w(6IvnSr#>`>J z${8M&G|cHF0ATQU4t)QcE8e7ghM_jFKftj!GEfLZ4O`HP^2bnRLuAIe2rm;+l;KYT+APHC(UBl4#m}(? znX8d&WW-?gxq*U=RsztBMLXqt%oEvQsik?Ws#&Fv+)@^@+n&z!NbMfyPoXIMEMVg- z+`=+hvoVoVvxzL{gh^%!%iXj1tDN<{)3sf7LmcSMp|q6AHDnXR6Wd!+NLl_u}dm;}?<7`rH3uL$zgn`*x=Kdp`vO2l#25d}! ziTGdK2M3(-j!qazl_~*=(DiU^&bqPE(QVXuiJT=`99P6bA05X4*2Y#N&CDO5mcQ(_l3z zTc@-$`a!B;AULeyqRYAS1v#(uFI$s@IVx7ye3#NgSE2E#jo2)CaFvfyLEeinr0t|t zdBT6S4}vkJZp|t~l`mOCKBjW65JqNB(YFed!~woN*)BOn^*0_F#l}nsK8ntADk32e z8?>j3%I}5_>VNUxShM7QCV-!PPl6lBvl2;>x38 zW5e0ps}JW~QC5rK$#SAUPyQewI3a<6A~qd&`n@D9SH>w7CpCxvG4FP^n(-Sk^Uq>j zF3Qi+U}*#h!iS9P-3h%V!yX;K@?zCDYU(Tf16dtt8Ywq$qCFvoeojfMPORRP)Ih@ zyZnbvLUlq9@J;yd%EfNtrnWvRL0>LW z$@{6Va;{fj<6_dxW|tXw@*xnu11%)PL)op=sbIH7{@Yi;prRq7uR|gIP9KOFtsgX0NhSB0lPcmy>5P>p7V`B|&4ZraFEZrW3fmU{`&{(71Dk{$W-XSwRKdu$B z4nPW3hW%mxL^JPiNkOjS$O?Hd_fmZt4*e}>@DvD~4tiWNe^KmacQFhwH4b5xnPVe9 z7aSP*QB4-Iidu3){RzI*^^~}5r#MWp$XKSmh{;JZ$J}G)@qi=DS$?7Ublqq|`R%0G zyFrZ<( zUX_%!{jAI|T~8n!K24f|!4l)Fw!D5%+aNl}sXo(EDH1{8s0g5ulmD!%i%D@>f;OK; zlLu&Zl9O|n@{1WT0p);!SKG)IKQPSqY8oo7q5He%*D;FPbPN?ZdFLZALh$YcAV#a~ zM9kcLDrZx|rnJQ>f8<1ezjw(cWihHI>&W^DO3++uMD`E6=1T(%;z2>wSrm{G1EU)y zZ+SiVtqvpnzUJSRDhYUz7^LkE@v!3_@pCK&5#}Kw?DW&E2_P9@J48G?>@?qAOl3;_ zXYm}4=NoSvuP&^-DM9K9x*xFV0VtWP=_H$K9%09QWNJFtJ-UZ}P((RWN=xngq+$=C zb{EtjNWn(dbG7IwTH500P#|^4$-RD!WZb()QTI1m7HNs#34`$RI64|px`OzZ7m>t* zJXY*Y>MD+Z9%url$)e+Uo5v~ebSNQg^)}|^WuzqialW zntOSLBR_BDJkIqb^5b&=QPPNG)#nOP+x0?)4VE(SsUcGtG9)H&kD`?7g{tRi?%8os z4Ylyc^{s!z);MN1V}qY35CFQE=tx&cwP<%Ftl;2yf8fI1ntIf6j%w}4JD|`bBf{a` z0>N47i*utDzoq29Ke%LJ3jELmRdRtGJWU`h+439?&B}~Y{r12nm$ByY{7MY=`J}N< ztn>OVmPsCYt4kK_p&;Ss%So~ z6stlJ%-t@K)=ziKKL!DB@7j**)!(6k8N&puu0XY^!Rc)eR?i1N1uB$weR>%J!rGeW zasqzOhNww}Z3-9Xaqzx}65KCl_GCZ9+mZ-)0I1Whf2ihRe_F?t-0Ky{x13iq-}=6_ zz~260?>f%DS@WrHm^3sJ-kB-r^U?r2vI_ga79z_RZ!_)%je~FQ(}q;u@}G`%#jQ+F z4dj!i&I3<;hF=8U!&A{KTt$`-zz8dt#qVck2N*hT6sfXFsyE_}+Prb75+8`mL0I#3 zo%Zw4_y87QixDz)NNTy6$@_b@1l9m>JU?vPv5p1QK}(PPn0{2RnpXiMoD1*%LN5PT zNJKr|x9ZOvjV`S*ZAX@`Jen&*s7Mi@{ZejeKZZAPe@E3}HVl)OBN7_1^P*xBGx{DlG;7^%-N`%^!XspsuCsQei;JvlF~#t$N4gxB z%ND{!OfL!gC$@>IWTBBP2dN+ehRwXlNMYK1;EROHuIqikA$gzE*>hbHi33j%K4emR zs7%2@f1&z|m8rM~s^B1_5L&gOvB?+`3Kagehd&|?5aKr>?-k}0BEJ_ z@CT$?kPn!9|Dd>@v;x0Vc5i;d1Ze(GLk!NQ7!r&F4QlT9^AqL4OBHDt1mL<%l>9BE zKQ&`W_ctkA`NyDx$YgGhuq%yT?{>Z@gtv_j$m=pIKE@T1K!t3iFu?n(xc7ix${0_+BI7(92U7COUpFL34k}9~8o7=>ttl zhvkicta1yTq1v9*^VV?D_S zR8BN;gcCgkLw>2NKxKJonSn{0D+vh0#j!_nA{Y*;1h7YPg#k+8>Hk%EX=k0D zNKn)!hEu|y`fI~ZFPEd?_=wx%;F`BByZLTKQ1h%rf2xkg@^MiN==%ulDexzUxn5$> zKY0g)`zLSpAbcs( zGMU)CKi=7_doTC9@mvFz_BiI~nLdNH=gU)R73tIcqGuf3=+rj8LQ4R)X?Ibm>)TLhHH-FaNB&34ZwP@&u1!M zs{cCXDo3MRn8J0*;Pu2URaR==rFDn}NJ{Ve>4SgzJ(kq4Ryh>5+|r>NHjv6sd~)pa z_bqrKs0DN5&2~g5V85AKfaohICtUX za*n7QaEO?bU95YypUfqn89<~XMq@KoDX3gAHRZJqev=bEXt(w<-)}NLTRJ^vk$=n> zw;gsEPn~}W#Ay%%4uA++01H1*3i%5*KikGS3xzN|^@WJ??W%S2m*4}{Pbh?#nZT*} z7tED_MBAA7Rh4eMvJc(Rji9xoDV6!GzIMnC0!=y-cys6EXMSbJND_9@+KFtuG&&}W zKrYIe3_r62T3^WdJvw*rrQMgF^eRP&76D#zBpf2mKnq0Fs2F$w4GXvWCK)Zz6xR;$ zP?zTu{Npxxn@Z{oC&me#6#z5bRaDttV`B2$|3C;B#0UHHntqemsIrpPp$Haw>y>9^ z4lko0=iiK1Chtm08IXWP+>7f~4eh{L+MneI`^KD!;Pn<|7^!dYvkuhVI-iLPvA?GI zTe0BjE^(v`U3X87o9)Lm+okq|8 zfkL*E0kdqSjmmfgRO2osrq|ZYg+nu;(kBC*4Bfa6NAiU*L0?I{atWWLit9^>GGr0& z1elJUV93a=VX#6~zDCGsQbR9940KJ;%Z@!KQbeahi%iq4or4~*hzNTrzbu8km@+Yf z{!|n>a1(weq)yeLb9&H&!!M$E^0DDZI5o&ecHliJAT#j3741-8BJ~sh((+&e*oUw- z3I3BsG5_KTvwBf-7Cio~4xl_B9y6w8^j$?>&9WK!&%RZDxg=ywo)5MsP){zAi;7G*)NW6<#klY@eQk5iD}CMbHga#f{c{m+$72Ga z;*#XWAJLe>;~>!W)Kk|bUrLs4VO8aed#6dc!2^SBH`*D=;sF+Sqx#;Yi8~lpUto`) zojb@{`XfrsWK#NPY8OQuuTB`W_9iL+TuS6gGd58RlDFcC$hBM*q7mi9&hyaxbBSl4 z{q6!iaqHHtT%f}as%?DK7?B(HZn>hkJ|`%|O;yNx&I=^!*&I}-!sM|LmvtSNdXAO} zOr~HePD{Qmno0wl%VCpGK|r?IxOMB>? z2yX%$)3(*;KI&W#YQvB$nS>Pq&5seB3lEA));h<^vo%~+6*@+W48wE!qD|SlhN9~h zF`zYPJ1w}AEhSRxtTy{K(hrwHU0UxIih3R6wOp-gB<*}Tr^yXy@x9N@6foEPu7ir za@ZzlPw)*ZI>4eDhwcptOO+aSgezrrR1{nW;vrfsph`<$j2;|5*H{qE*I)mlLQbx( zxmbkt>|+o=JeNt)A|;5KUiMpI-5_XM3TQkuCK6h%oTgBOSfmGKcNG>G%e#y0oGlmF zO>!TO!cZ9$GH=f*yv$DD<-&fl;}{o+)9)HJ zhyDx|f4J3=hZ~=01t$Tt0Uo20HPGPD0xhxl6~=|a<1C$^@{z~i^I&>3M-b*uRGJ#9PbW2PTx{P}K3X`FQFx7Rv~+Rtk%(k+gXt()J5-#Zjo=si-$c2-k% znberq%FRn$bEa>=F28A-|4d%GF&vol$e#2k*haX}GC6gZ|71DpQ|bN{jrViMGgB3J?_D-kpY&4m<)KFt4?CV zC@TfCxjKbhWPE%lxB%zRI`(_+z_*;zZ6D@~9|;t^9dRe(%nUie?O&a=agdXXex>{q zWKs0}VSayQM*__0>NI?Aqg}UpVsUOS)$IEtVr-?GN!@pOQEyQR_yH?lnWqPhq%kTCHko0WV{PdV*a>0Z6mF&S_uc z^2H7n@YADb8$q+A`SWOGz%VF~6le>@4AL=~4NskpO<{OweVy5W6{N)qoR5E59I#~t zHgMXgf9AI`@^-3NtmgrP|Pj z9&k6eUyQ(1&B+n~Wch#p*~^u(INJm3{`ZuIB*p+>09B2cbVY!wP-nis9$^~CY4he! zERUds5-mQSB!b$Hl<++^)S)hA5sJUQVVR6il@lEu|03>PIXiu^Wm>B9WbDYjri(aR z9Sx(@E^oj-cm%ekex_ML}Zr53NgP{=Aq#qg2!|nJOaXJDDXULFiZ<96KT&QZ0 zVJywsO-SD(XDv4dT6^#a3XJq`)64S@i_nb#2n3f5=k-v)CrK0cxKAvW$N{KQ01z{<`luU+7X6&@S5FTzZ0X1hM4e znTJR2*Y5y|NB*M3jHKXQeLDc=6VFvD$v#qKb$ni-!I_U?On>nEnv^=S=Jj%C_q0_0 zR4UpS8a^R@_+H%Ue54;wwqC_f9K7$IK(BhF7+yRehbZriK$Lcwcla&kTSm06z5Tt^ zjToB~bKQ99dgVTV=JP*UzOPr?h*?CS6NlhW zFJ$wLfFf5?P%;djW5fc0vNT(W;!#5@0pXZ2i?666zy@g%$rJ?CZ{rC%YB?*D<-}i~ zZa^UfcLtQOqpT=M3II97_Ea57^33>0-y#Tw^XKPLz`%k0PDXsqZa~6x0nJap-S>D0 z1eq{f6>OjZ2-^3j3pA>smKZRNKlp0zOeF0LR3W4Qf=Et+Lm-V?%V{!#TC~CSvx3D_ zNd(%)4B)3;Vq`Lq*pOUWSn!@r?5!+x8T3gClV&0LCe-1ksO zYU@+Oz(5KSn;>k%yr@D)BkukEo~b==B1*3?NW8K@H8*+0^@v`lqdv0VY5XV;3RW$Dq~e?SP*bz#Cq>!S_zuT;~TjwwM{mZPyYy*hRj-sbPb-;1sBqmm=5EO{>ErStp?9viV#`yBt#{`6mJ4s{SrFEuC)- zFpNZhY#s?M4$N->@xUE(~NaGO)BKN^dXz8t-oJ9)4} z(I)J|{6+ZPr}Po4Bgo^cL$NiwAL74UCd$Q<+x$(XZgj{3uMsP_ME3&pS*kX({VE;e z_8D!EU5b32c(kulHifxeT*&-;Ey4GPf(L1@LZmE0o!=6%#YCR~0D8d4V0DO)q{u@@Ff|6+g#B%6_Yu5Yh<3#0~X z>R=77Zrs$qHY8ab_y?}SAH7cF36e=A3UyXXG56hw}xOfWJNCLE`4>RKW6Q=e+i5i7z#Uh7?c zR1*A?3PgQDO2#{g2X-;Pwzoc$3V>4f1euMR1k4Vm>?ym(@M{n&xbp$vGncj={h{ zlI2YdC|l#R58IGkLngz=)!mfPyEb!WqnjUuG5j_poc^Rxh1^cLHXw)Yf-LZqdV9&#r< z##Xl{vm29@Q9Y{Dp1R<<9L9H|@1+Q8T62durQ-DrDoYpPF{6@lV%Qps7?_^Dj0@0_ zlVFM(hG$G?aR{z-?7n>|Bg$3|mvZr`oh_*&^Xi` z!Nt9+Zbjan#}dsQZ>>XsFEhxq`Q>DOU5~EaR}z?vL^OG^y8}qqrnvM^Q|Q1;=?}Gn z2D~n=|Bv4pBQa?20qw;66RjrR~S6dYw!xu z0gP_IxZm=Hn_Rp`b;^Gc9&GSm2A%J#9s0eVQmR*=@mx`D!q^adfD*U(pyA=ZOb@kp zGW%#0If`$$r=CYJ3Jdyw>e6!8fGhK42F9a;Z0sZ+mej^4wRA=sk7|Wz>j2PqmB( z9tqZ=4@|EGFXDpegi4zAiE6!oRMUJ+Q2iE2HPy+tgX{k_=);!|q#DM8=!WoH?m{W| zYRF$`ybK2q#LV?F&PZqC0JnMnk6-og#7HKz*P7mA4){4uN^Q|kO7K3gT}<-wN3Y*- z?sLI)tYxxQp_01gsd$pjf=mj4`fr>&sW7dqtpr8j?m=NRj`Di*>egSDKb9pT4hwmI|PTz~oN}2(Jt1ify4kWot== zMxH#q4ue!AeO#4sHc*PT4&13dpZH>2m~*d_<=TiyRV2rk zPp)XS=h6=#P^9#p`j6sMy<;{SMIEi3vFh{`n>krmt(?7s*yaAJK&icYP@iZ6>Wt$o zw=Cj#{Rep+R!A0of=}ujWTFTEvV+m-=C!XAYU1nOmR#G!>LnnkGkonp`;`#r($|mu z1V+!GgAh;CkBDjKGggVjpLJST)UEDb!&X&wJSBi=*pM)cPJyptQiw2@3JdY)bI z5T;*u(=yXhjL8^sd2Nzgd(JigVESv`uSfr`RiQGOqP+Xm$u~fqQfy37xgD12ahazp z77M^{kLihSFvx13o~|!ns3!w08byT&i~;5oVp_Kdc`2&*#IR3((!PF776xd97W;Lf zOT@fYRu?nE&ONK6-j3CNo@dHiDWO`nn>t8T*bp{b_ z0%O^j8MO3+hSm2*#nUR*7g$B8=2pF}iC3+XDe+sYKRv=Xb$t@=IPQK1#Vl0Rvu}b9| zx5czB@OF7Ab|A_FOeKI0bv;GG0-$9vN=>1_{v@`9jCxx%FAYrR& zgF$`n;o_G{VyDw%E5?f)Pu`~3OHDQ40GE6&CI$EJzjj+?E}EZg%*95ATN`?u_J#(^ z@t61$CA0~*5@YGVTa*BJakhr+i-6@oc;i+UE1!urM|-_-e- z>0ypnMcj#AP%P?s9*m6YlCrnt6O634xxevmh(7g#*)Q#9sO`^jD~f+R4g- zS%E0f86L$5Ars9nQ<{Y}R;rYhUscieI=BS9TEC(--=k#Qa8=Kk$2$Rgt5* zH07(^L4j>p2u^_;ChO7`{%Yq1N5R#}dWNm2KWD@d&zR_lIRhFoB{*hdaN?-nb;z9@ zc$|G$xmN1Kn-U;RrPOs>Ih-96`EznaY#_+(x0R8kYgy8>UW{G{|f_Hlt;T^U#Abj2~Q73pL4!AsMQ+MUyFjWGGLy=~bHOokM&JML=L!Wt}Ikf7Dy zKrpozUap&`j0K1I1>E`?I&?4y>Ezo}Aaz+-4sQdSsvwgY= z45nuc`4HNB^U=oD2tZEA(lv*E11GBB33$6D%h8Mu)9T=Ao_{2pdKM6qOj_$z2(noVe=5z1UHOK5B)uD5kyDXv{OUJoVYT zk3KsICo)#rJtXH``dwbV(ZzU0az)xy9_}@Bzois4TBeX*_%G@<>nq*kj|k%jsXkcE zW^e~k-8PKOgn&Aiy`CZK$=@i&@5vuRqU%)%JHdm<@Wg^o5Dx{4+!pw+mk3|$73pe~ zn2VV?R-yDa$6}LA46p16M=np>QsDMCb$Cf7T2#!M9uN*b2yz-D#rLFc!Z>5q{wM{*PXJr^WjopW14v z-ZmRG9MzboneT;e+V2eoKXC74Nw^)3KwZ~1!5S{!{~y-gGAgch*#Zp&f(2`WBuH?V z;O_3hgC|IEm&V;1hv4omY1|=bfZ!T5xCIFA@K*1A&V6^kd;YyM27@1IMn->Mt*V+e zYgVn$uTI-$9@xNemBxWm z4mPg85onkMyg}T^hcxWwuTlyXJ3qHL$~-fLyc23SfxQQLPM<+7L(*3jl+JNsTdxNl zzAGepTEeS>jN(X-A7sNKM2+-_me?A?b!@+Iqwr?hs(&Z+mMhmgT@x83!FQG2JgaQA z0mZewX^l8M{Y-xRRYzStFkLklnB7Y@m!jqF6HhE%NEwsT@xIh=VOdqXrdEhkC{T%! zs8T=OZKgTLB4ZWyn(IyF4)-IYWFA=O1d*{auf#eiYHRrhx^)_gU0C`M(+z&;cmN2g z0NiC$00SO(&IH3Id7;0cXItq@`T5uA&G!}sE(dC6Dw6U(vlD2o(LxPM+Ty{z-BiM# zwiv*`tKje6hCUXr8WdOmd&|N-Fgv1a($&W25@1>f>=T$*3(*F@VKW}fAC-KZNWKkW z&~JPupT!y-3rq$z{eqyqZ?@nBvDdu2y~Ko%Zn;GN9t0!w-=b1?!&H#(mU)!Y{~>z& zODKgG^mC^G{(gZ+?18QTuCYRZzV2jPZS zTE=}1julIqkVM^KsF(NaAvv2NiRsK;^T>)Pu?a}YKOt5pnwUN4`$y0E_Ydpe_PmxxeRPO>kXSLZ4S+h+N?M# zp(8%|u1%u^ENOZYK;+QjAmD+|GJ_Y8Dr}fK63y zX54q+8)&6mm?h>E3|ny$RR83oa5ZDG>vqn6;kr8U1JD}3Vot-5mPA2~F2yE4(Dmfl zRFjDe(U1Pk35X4UKWy#)oo)X0JBJK*|3RwG(|={w9~v+__yMY?I78%r5s6qCe#hpY z4WUTOl6*wmUvVxE=1>3~3@O7%ET#soIEV8${d$t4{V2y(gczIhC2-dvV>13V!!yrB zq6hlC45BA`^hnH^50C)4jBvHLkT6+=IIQqJ5N8R6(U;a?=_;>tF>AT3CC^!zh)H$X z$aL4^ZyCaJ@8rE1S;QIx>u5U44$S z-;mA89QHtrI%-s_swk(q9mQ>NAUety;{9!(Va>-k20X}+=poe#j|1j}iVQ+WR$w*; zy`4s1t2mnP@~4VQq!5ik#O7$T%g_V6dcwEDr#3i}&>mra(o8@q3zR{!2<;Vq_wO+Q z)0D9$bw2vew~u2{Y+=6aEiUTOR>6DcDm{8tG8&Yw|MI;NGwWrC;BkDkcZIq6lMy zAw4w|)-HM&KqK{^lf+>k;K^(I2BAYeNG`L!(#ix&h=Octb$^OxD}uPeTcD=l?eE@* zdbotYN*O0qZX%n)I8F8i4rF{dw;t&XgCy*VN^#4iGn0(7j3;ZblUE3#dx6-=(6{TV zcQ;^vTwR7gJ>g;shD|tDbIG@Z5V#rgV^K5+ITfHdlFfEBIfDpNi5ZD*Rwgo_%88&r z8mJ;UON9RGW9)Rf`3A{L3NAG?uIu($Q+gVx1Q10i+>z0s*}do=2$+gss5 z20F=w&cos{;$sqx57dZtkXa-EMzoy8)!G6uqBdFYZ<_kwWh)1)-(D0S(dG(73~S|T zpHI0$>PKN~KU3O#V~}-;lf?lsk{*!x)8%6i|E^}p!~JAXSXoJ463)LKh}sV^4h2g} z$pskXf$)}aBi5E4o-Y+TNlGkjd!FcNlpGS2-99EieeqrBj845w#?r|0sA8hO-7o9D zM(F*#Nx|&o+v~!oM^3kWw{J&R)lGBOxG~(k2z5|v{`sRxTBldS7Z_^DJ8!aIfw*7K z7+^Ko3Q01;F;Oxb0BYLcTvmB|Lw)Lrv6FfiDN!1sf}) zsPbKjiRnm{?0Ygf$s&Bl_0}flTppK~^=Fpm1V%sW+YVPpwKZ~M;x$cyojm*GjXl)Z z*~DOVsq1Qz13^$@rKOzcsZ-#p(aok8`>^z(OPkC4` z=YSODI}m;S0x>DaDPd1OpqBo}`XZRJ@$bubg~h+jE?s*-ZG^X!u&n?QGjiI6GNDKa z0e2JEIiN@OH(1t(X9Y>wFa06X6y3_jeT_sqvO#xe_Iqb8J zq=b61$E9o-pSan9a#^?~&J>gZ)RIjZhocPAX3$=6`*Rqd>9*E-@u9X#g8qA4!UP%M3mzgz_}ZqJ4avu`ldX>sc8!p8Ebmp1`7XO*nh-#nOgpr zTD^pZlzinEoc8rW!Q(tPi};3p;#i>ZhVZYIhfslZ)a-hh)b-pwq%t!#?3XD}V55X( zaylqaCsnRoerAFW5=O9U^D_Rd3dsE|`j;c?#BTRrX6B*d#9NG7JhG5ipeVtJ^)Wy* z>~^;JX%9eO;>Ezo1g5;~zYq)P-~+%CN-!K_>`471mHul{4@M|#QBMyur%^N@V}^^+ zko~9NoHPwN%rAL{_jRKZiJ$T1VUgBR*#~m+^(lM&N+=P^A=<6A=<)e|R(&k(m_haX z^kBX*T@AEQdicD?fbftK=Chx#@X(niloeh{vgY3LQ0^E;&2Jvrw=B7B?L@ilmDiV4 zIm%&9D)WQ^XSwi^KBED$N86oErz=3or2>mgMnVfI$FTsnAQXeRR44%CQX)9i>7V+# z2AFExh9|U#_7$k-Q}P>DX<(s?Utbv|Rxn^BskI`fL745Z_7K|G4D|F~j`9|9S7pp2 zK~A9dT0q?Gp>X6l1Cf2Ccc1lNV|kr6#co!bDIuKxp2nqURj%MUg&}I&-p6wGy9)iH z!oGPP$_qYKa%zL9lxvPx8uNd;q|5(2R8*?!qwj*XRo)lG?ly`}qyp4S=G}@xIiOxn z6996&*9SRxbl4XqOZYG_1bit#H8)fo9*ORs`z-d?i+zBOP+@N=c9^-&uq0?s|_HbMZ?9D z^(?h|$?k>X8UwND^;RFIdOM%*O-BZmq&08#R5#n^pS5ogD!NnyqQ>4`3ToEZblxl? zMvYS@Rjk+Ul4M0~jW1gx%3Oq{%*wbU^np^mfy_pj7#MFD6G)Q=4(D+Nlvdk4svvV@ zz}3-nd-*hhOffOk+SB|`x@i&C!r;p2`Sc1XMZd~Nr2vaCrMiqXKw)CQar5n`noVH0 z5T*`qG~Y+l`)f${x&1dXcbx(!yeIg9H0ia{s=D4XMc;P?Kv|))fpj~`C-3r+OLOK2 z232LR=#!a7XG1Klc8k(4l~Dr}l`94nyb)-jt=?zM0*p5N6ANz@Q?OiJZ{qcNvZ4oL zKA1BMP->t;EFqw{SPK-fEC;u)=tK^o7OQA*HVgslp6K}}Y|nuE zw%yHl{0L*U0X%Ik#7N~I0Vx@~4H3vY>Kj%2NZ+sJ{%5I}ZhTPJS6QIh~47_78m1z89X?5=5SVh{m_w;Jho+ zT*OFlPtnOyesexNE^D#jAV2i#LBaTa{e_EOEvca}r?wCZYl?Zv?Ypy))}PZv^xxlw z9i&8^lVMUY*K?x|mpk+vL_p0YV zRmb*EmBxOs4Q=LFP7n7m0m+WH!Gf zWsV&1mdF)_PH*Vj?haq%7p^W@xy-o27F0&pOG@X(nomSQ#(^C2vK%k+ z7YuoCM9cupyP0n-uPyx(ui3y-E#c_eJJjG_`}sntA8}$v6d$4VC=#&Y6_utvJvNw$ zgZSa9^??YEGG-uvdbjE7x7dK*u*Kb_)=@s9Wj5qf6jPjKrQW53k=G~^;m4+Sv0DrO z@R@`WlvhQctpGPsL1OJ?H`Y;g;Wjy5VI_1RbV2!JC9+kU<=xz_MpX8=3lHB*A7oaC z!E4J2*Cnb6(4lK%V@nxXGD@$TWjc_W7DH--rE_D=*G3>+rLY5*{?`u(-MYmy`4ucL zo#W&I%AjKZXz1|v*Vo3|p@48Npp!6ld}f;dnvI`bTaB7mibvc~`%p5)M%`!mWaeb} zQRP)s-5UJu4qB9_(e$-y3|4$i>IA=W%8s{Z&8qr!t%$Dwu!%yMuyo%`} z)F`D$S%STWTVO9#rHrmC5h^5UIV~)M0Ei)r0CN6sLZK$mpKynb5VMUzrz=TddVomR zFxdDoy@uS^rrHI+q>kdJx{?gAK?$~oh=~5^9Is!giUygENm-M;(ytQ3~+I4N&*G=M}nrY2L9g5&+Tn) zauqf6m)mqcfAUK)8x=FX1qhS_W1VLER2cTRPgB`PT_38YK0;k<+@gqLK8~sV zDwb>re!&l2s+6{!Bn+cAP!=6kOQDZV{dl$KvhK*W3(b4AZQ^+%!?LnmFQ+80+Nv_6 zqUExz>Zpm%w0t}&s}atR&KJK9g+F$5+^5wSZ7Pa{ih_IA95>3e@IKDw=}Q^gJ*}+i z9!mkM{pUkuf#B0)l22{|Oy7yyQT})H`pCc{hWbQDhu*^^(lOK5@0SFU{$P4>W`v%4{0!OfPN|M9+RQo*h%YJM7!U z!Bm8s_;FQjGpaJyqpPwbTe#pf)mH}9k~%+@F7)=Ec|+U01GmfLMz3ciQYHg&O2+fp zQrP>xsn%MXj-=2)r@#kjGsl(Nvqe5*hXhxnn zq}ayF}`ynB7Hz|(%wgPBawP%WB(nD#~4t*XuR)@pT}u@~1OA*ZC# zxh4lfUs{?6^JMCieq!3#=awSL%9D|34a8$T?}Iqj3pZ60%_-9r#OvY_$=4v`myt5D z{UsjzD>pPdN1>6qF}pI59bsW4c`e*w0%*U8)Wz%#5QANsLR6|>fu6G4&-`l3Y44tD zJ&!Ltex8egKsv}w=NJL1uh0}BuM+8zk;&mzB@y6Ga2e}_@m}G+vdAM42^yE(M}VdgoQ` zRuv)1(z`$>+S#urA}S2}M1~bdiWa8{IZAu`2`tsf$_QZ1_dAm_dq&0;!GVLVWZ{*G zbIps*&y{S8`S+(f%l*T(?%xbRQ$~xeC`P{A$?|*^lh~SzRO=gYUrcUow~rMsHrIMNCCZF zO8TVFLrGa5>O^BxvM?=0NpS#+eilRF@}YhvnwM>c1oeN0?Ds!EU4O9rNFCgGkaF>n zL4oh&pNC-w^ul!o&>?S?c`GU{A;&b~w!%#fAyU z*McS*Qsy;?Sl7GosLKH76Xnd}WodM_=EEOJDD)7W*37wRX{LQ2>Nv|?Vm)MWzSqK) zc2}ERQcE#peSQ5|)<_@)C7}0P!D|^qEXo&-3-E*-2#~#E48ZDM@6q5>fitn<$bCIw z2afO{z#oQ=@W0;`6A}tM2R%K!$n7Gr1VP$wL?VG_{u!QvC@B&O@T3HOi6#pKF38Ui zR*2!n)fX2d=YLHE*jwjP>vLc8_q?6XsDoOHi^A*LtSp)jyslBN0Dc>;5Nt zhDpl#)`7^;*mfXIn5jX1)H&4z*Syrs)1jJ&Hd-S8vMD@V+Bd}DzA0<8eS?!7$=Wm+ zGW3m9k5q;TA?%wgoT$;)9TxKm@z@lfeo`5QF{FCZSQOys?70Yp!Z?1U6Jxc3^Z)w> zL_WF!KEWf95jc*901-_ogzH5XU4QoR+baaeSm1JadG-j{U{A?)+_UoeQ}?Mh!z}*L z%T(TQ4{ia4_O~l>4h3=uX1(?eaTF!Bh>kmAy0#=5mAKobY=!e`eX{r#bA~mCE^0QV z#;TJ7(%k0yi&1cgwGA^XHriz!3E!3J1u%Z6SVsR>J2$NbPeN3#Q}t zK%g_A;d}`#jiOUmRWiQx^*co?+s*LAACIuB+V~*W;`DmzBP9^P0*!LKfyaAy4^8h6 zECI0nmlFW_M|FG8A65CSWAjl)?IY6<+k>x;EtOvvg1(*fnV%9(WXudxse7OhXYx2k z>`X^{&-!DJ{T%HbJuyWS1WPyV9Q~O8aFV%XV^C&oaI})p5{X_ZGd4AUD24|2Gap4~ zKjZo^uv}dF*LTwfog1~}pxhm(a&RU1mJKh-rp%|e;Hxe5%%KCO%caC#O8WLxf0Ta9 z)<@#ym!f&8kfnAY`n5U{&I!(~kzrJ3?f?O8%^?t7yx_7&N?{ zNx)T|yE9X%@QFj6%g2p7yNsGpgZeeDbjKDfIas&vQByT2=_xASQUVZ~Y z3JEU|T5odj5ZK6oGf*dd+%N-98U5pT0gm@pZIitiFs4hOFRC_xH>qhHVWBRWf_h59 zC=hv?`Gj&}fp}v3DD*qmts?Yvz5O2gL8fh45VIuAC?iHfe46l!Z#N?dZK^+sM5m=H zJ*o0ISK}bv!p1w|mU;$ZQ=Z)=z@CvaIVY*e^U6elGqI4v!kSa@wZ4Sf0Pe)~f)V}t zRVC>wm1BdH)gG^X&SR3!z!MUmE4Ox$mCiQu@H4?Tm};1vzA8Rf9@p7P(L9y&|f(Q_}vrFK`9KF4JqWhRC@dN@K>|Mk!-c3+sl3B+p`}W>3XAg87q`#NkqCg4bj2$HO>a>-F;-Z z<@WfYGE<%>$wScTsgrUnZMv9JDMJp{susr|B}~CRut!NLstWco#+s6TyMv`|#A!^> z(PYOBRwLoa;j%1OlKEk{iq;PGn{=sQ$s3MbJ_+Mt@#zVi;+aa7GP@e#(%1*?&kj4kn)me5wbPoOBflB%MBMPW-mmQr7_G#@i#|Ui!$GPDm!q)n=_{ zj!0nR5!qVM(-yR?TZZFC=U)DCohDpK<0CJep2yDP#;-pWj;hNDHd;XtO-Yvdntj+x zlV4IvpP$)Kl`q)HP|T|FiJoD%pnF%2e$P7wmBNa4c1C2HshHXgkM2dd-yF_q_%NM; zp0s}M-n9N#L6<(OlFHUtA?;<+YOi^*Y{u1H5FIsN*In{Qf1-aOqL)-a)(nle{puwi zOHgsMU{Z%gX$!)BDMDHdLk3e*G2dXwpzAyKd;Xt&d-6z%xmGcY{&|OQ)#kdL+=13i=IY9-dAvLUR8%dZQsI18fXb$_gPNhiBZqCH&mSjC|7896!(UCQfH zI3I@+pC5%EC0yi}^*G-g;c~RIEfxDHN+ z1GyK17)<((6c!DU@gu!ufIrC1Oy~vY+!$>vZaUOEkB_?4ot?9lFGsQkY0__gF~Uu)1M>syXhS9zv8%m1}s>QD!O+*4v<6Y!99`{v=oIsy5BsicNYt}v|n(B*Pj{=w8m37eyRVIoHLTB zG25{4NMM{@IJrPC?!-F0wJ&@7b%A@)zz17)6NjmtT%r_uxMjOh?^>3{!bQ?7@90&V zyNR>avchFQK*u>7al94I1JXbd-z@99} zddKJh&b9+!;{Qzx7>B>VgVTQpG;KseozD&OEmUnHhdfpbYNB`OR;X9!F7vI;HwaR| zco2=~+=j`(QbAuNofa~sn9er97%f7B=m-#59Mg^ez{T? z>DEO5HuKIsTkcT3Y~c3;4*lzP;pN-0m|d{)pSVxkyW1lx zbgW1S5OCW-_cy9#b)5w14fnb3L#rMR@Bv8ZR(q^FZyQ1$=Wpw$Zj%TS z?N>dWTGc)$oI-Woo%ybIk~h-Hfc-#XZSqNK#Q_qY z=%QK4(!4uudTSrkAlKZ*ZdN=zHLV%AY0V~K?=~(eUr$@~$`8Xva(8hSY*-K*vK=P# zqY8_Zm>={jC?{xlibaBrbj9J_z#dzmOgCm;N9^D$r~0bECn>HyG}Cq zZ76`F=g|9D6q`DQ6;$Swe&}Ok{494}*~HrNaFT34 z&)>zXR6OuaC}dX+y~Sg9t8eDl%}HgJjDqZ+!D}l5DW)RJ;3Wpkl=tFYw6p7Nf%D5#X9*{xZM;_AJR#=kh+p0@YIsrU(oV@7N1Lug6nB%MGUzdTKBywgzK-ZPX=e5dJCkolV149Dkp;F93ra&qu`Q18CN z!PtVVQzG~xf2isG{CpdUpO5PhrSbDduyK4HMc&>IhEUMXk-Lzi`mkK z`HAIPekbDH+G}tpCI;_5j?I+S*sk!NyqX(@l#LGn9FDgDuQtIOAU4zB{wFqs+t>9s zcdnN}R8?t?nh<|t1M#BLj149h=NWh1ZOMYy)1z(b0RNm~@%Cx;r0#Ifc~=|N^!&mn zvDvp}SP=B(mo2O9-SCea-@J<^KecMAYRqk@&wuB4ka}<@I{Sz{$WU33RJLJmGdFu4 z`c#pJnf!C3_v8p2&-fY^W#O>C3j(2IdnMzF+XxwSM}af$2rzbh4# zVdRuZ70x?U0c>C=;k0wh?sps7nv?A5i^obGgzsJw`P)ja*h}HNOD;!kjhU6Thd5=t zM}bkxC#?qy90Z#P8tGcPle-3~t-E~oI_3NA)*oZre3 zSPVp0x~%Vuhl9N8{7;ML<}UOK2>ebhtd}0N;qrb*nxCm26Xze%HFxqvV9=19^3&6% z%N5_B;(8nedhG0eMh0<~D;~z0H?KH;K(`qg;F0HhgnERZ?{6eep@3rMI}%10Iuz<} zz6~>-Pwd;KaW(k)G#J*?dz#DAJUEaYM-#*%h#HAd)5~`U0gRmlKw$hI#%_IkEZVDD z@wJwC@!NV_MMhn@M0DRgH?6yE{+H&%ZIkqtRlLDT9MQR+*&oELpjOMVV+C!Vg?+&s zSG7|XR~8Z)l~-y$XYpjmb7112?rGkAr)exczsJ+xZ#-_=XXquuK6!Ji0of4dVWiK1 zfcUbD5?w6}$n-e7Yx^$%W|Tb2M}#y5_Q`e|nI+7K$V6~>{VRswqzQ%?|3vPcG`O-RS8zi5@e&G#q!3<1ht zP^W7gfI1Gl^Djo&0ZuO+s@RJrx=#Hp_YHz$2H;w}kMJL_VWjsvJ%mWolX#rQ;^sTW zTwo7VUKW+FlSeY5eSO$47<-fovK^TyKd^0CEa~Y1x2!YoStFw4lOG0Uo_y5&)aSOY zaH?v1+@P?0Lry})i*_;l0iVA`rJ_{Sa^e-At3+^FJ8PYTd@5ZH zH(_-zi;L{WhM8^^y}nOD`)MD3D)!Ht_m3>2140KCynMPuVU@4aFIyxG53ki&8(mwn zd7@U2i`DfSS@a#B($A+EteV~gNDR|X5rdQ$>NBFVix45JK2>qE(==!xehP;cHy<3_ z&@*$k;{qPA6iO7`gi&wu+|{@u3r9J#@_ch-M?<|(|IIpny7|e%ulr}HqIup{_HQv@ zSf=>pf5I}UfbX?xB;rr;8ZL!2lsoZx*nqr&g9yO)(?{0Tlc-;H!? zT4d1?0($*MX}Vwh6&(pQVI>oTts(e@XkK-(*{^S+u{`#l&EepiC4dB{mu3@*3-eSd zKR=a%L6wnwsl;(LEfSGjH~#u|FUCF!?28_M+!6PDoZPgDRttxWVbTdH#)JaJ89DF+ z%0}Ck!D7dS6eXQtio-k>NHFbaxm!SuvO&ptsf)z)H=b^Il;cRq(CpTSn*K^-<50^H zqNnw+FWgG{X-ysjjKn2u#zw|*J_%SVIrc#H;i;b;P>-T>!z#3_*B9e?AFtIaS!1Je z=$2;R6ESE>{6X%7Y^Js0*6VP_xYs*>jbRm$w%^+3)40X>h)^ zCLdHI_GA8yFS7vW+Pm3QWkP^xb1eeRmY+dJJf!cw!@#9Ujy=-ff2GhxJGFj7tABFw z)4AK=ONr;+*md^6mmrHtT3Ns3-;#pbta?UkdU#&iTm$IKdEDR?=WO+37aN<~b2|ow z=ejIl*)p)t`>p$rBQEL-QuLKyS+E-$>TmgGMmbbFK#EaLTA~0g3ddjjxEvs?R!DTd z7-M_XTa8q-!6kT*j-qt42I4kjmC?xJAhCPb?_VFc5A`%09^m#3VfOrG8 z5e0aERWp6l36oIGjT+HUz?Ie?M3_YZ6Cp&X^CE-PR777Rzl;Q~>G=kt)e{hJ-YL=P`rtF&Zr^k7;ufaoHD@Z4b>R6 z{JB1~IEYU!G3mj%SBVjBlT&7D=Bh3TNZV)5kv2Fi8rV7OY^|y4!ACaw!n=m@S5|w5 z00XdYn2Z3o!vtY$2AC@<9LOiXE-YBQ4D0G<`YU|;QGdj%D=$ae-Lt|dYBNVWj&_4r zQGZKy5H|6WC4X2=S+ldqw*<JZazu>Zc-8&@Ny5Q6j&rOD|!KA|Nfe$s|j z8~gT4lPceW`p_rQypJtsVLEU0iSn|5s?N(KUwjx9wD=*&?F|~PDaI1K#K5>oL*{!4 z?j!xuEE4@$*{gQ!3}PL7lUgv>i9iDIq$()m|0lS3HyZswLeI>YbJkHqeE8u?D6#5+ z!Piana~;em(`2@Y$+bU)rwl#9WiNkA$f)X71VJD&hHkfJ+&< zv5FA}8VEB*TLFKh>b=_6uN|RPo>f1UkeU%8G{Q+(^n5R}6kJThj`%Ay6Q#6Yd!BX@ zW-Q|g7Ik+V6|z3)$RLjxTdVIB+Vg>aJG?vP~num`VcvyES&jtYpu z(|nhD9@e684;#J_0FJ}gUBv8+AkZ~+NR05${lJC zm%-_cy_>v0^Q%M29^6qUoC_cOmA<6QZjt5yHbB>ZIKx&JE~-NNWv5gcEr#eF``R9$!4*)rJLpg^QAGGMDOcGbS9RB7Xi z51KLQWd<511h*N#2>>6P!uU^6!^8Fbtyv#kcBj?ob+>EX*k)fF!+Q4hbK0BE>IZ>j ze+W}HSf0rD#fWET$Ro!w4o<_P(vak*JfABB@r-S2{^(Hw%a=1%ohYs37!zpA`s|@e zJH*P|k0<(;hr8y_Nw&(bwsIC8`D&8%EQXVQPK&aB+VwKl%Bv)24m zl2!{PZfxg&aFXh$bSNnRmW%TH06lWz0(DR0cVp{@8WF-9!=GKE&ikmSu`~v5ngs0@ z-u&bzoWFF`8pQh(=)$=d+geg$iNv?oaC1IEzQP*hs~-PsS_#5MyUcg<=Dp}Tk|MUp zpQ+ITXoYRmdwDa3Lj|4|Y6UQ{YX1HcwC;<6!J>R(pF2l0qeQJ$Pu(yr6Va>ZrBBNN zn-odh(y<=~yjN^)Uv-u*=AX}>GV83oDXi%h;0uazSuu+|x*|M#Q&Nf;Ah8ydpbHD3 z!mIy@F)1;V?nt$ym){%u0?s)h?#z2X%qFa?tJyoND;S{}q?~);`-D;N;#$tSRYuC1 z-I+VK&6z4l(>NQ`|GTUv z&<0Ez&FCw9fdPm-J{w~h`I9)PijOrTx0}9Z%_mN@mVyQc+$c~QnMW3-UKV0D#*Q_qaT69+ z^f34qbx9?d9Gp-H8LMuy$^8_bWAIfnlZqS&w)M2h2aDC6l(8lI4lZzksz-EjW`gzf z(EIW)%nmEwj4!X8m@UX>GSz|)4YlUo`o6Oz`6Vcq)(vir;qijE-f?0=OH*p_qcWWs z9yTr#oiDuY97PyqHXmy=Vt4HwOgBq5%MI)bue4mh=*I4{$qrrCJhZ=c8CScH0p}-< zU{eBJzheBUzS`l^cbi%B1-7LOZ;GdOI92)4@E&5nis!xkOa?XrvdDuTfCK(N<#y~r zfW*VHJcs82-|Z;tMv2EEx`dz((aw(haMHX4L4(6NuJf5;^7az;=;d-bEmIzY@=pl0 z%Tq`PzcESde8 zfX?Dqwa_lnj~`%t1;&(#zY4ic47hyfFTg9R4&UX6lQeyN8(!BYb%@67g0dG$9%ZA7 z`m63z@g_FHVR1)$)=|x--wc0M<2kD%?|Z@FzKZANkHlj-lxD%MN3FxX5bYtNx%IJ^ z!%HAV1>b0!ypTmJtJZgwS(So|sqZw<7FX11hUUNTWicdTg2kt@>%hO4Oqq2TLraxf zEIPB6sg}Prc{>`E#m7Sx=R)g-Hi)r{i7%A*3qgE;PKyCOPEoXtW`Kk|<&2n*pQ{Wb z{b;c#W_4i=JpMi92MMkAS+V1a-6Hh{Y@ZXYugLbVk3Td;#>i(i)K{ zhoCR3+|J^lXBkWiYifk-rq>QlD@Afj)~FRKDGDy_l#zH`=PT{+{s|>eArB;-P{6Y7 zfvMQeQ~p!>W0e{pZsR0wpL#*B>z(aYa^v1o!_LLq?Y{1Q-gPfXdFjSb0wt0gFwy`O7g$e9yqrd{;fZE@vr98ghCd825>I*%O_jl zv@I6rBjU01$tZFnA9G;k4lV2aU6e=_D(C`?F>y0+DC1W--=98Y55m9XX1An)9 zi+{p9#@9rM&J^kK)oKD9jd5q?)w~Z;=0me;*#{T2C){G+M?c12Zrlv_ZZ`xvDz2>A zz|Q`9{(;aPyCfD4_`eF}XZ|@Lz==!Pxvw1n@!Pe6^fU!P4TrzY4D>q&XzJZNIx#;O z*@49fFX!DqaCI60{-h!_(z$0(pQB{yu_m8@KNs;!Gl%;5m$nD=t|VQRw5y*GI~^cG4cz>XAdvOF0_hwA50z|oqqBmRwh zxFdbT(Z2p(dzJBCv9CvjvW|>bGHOsx1P;(rH{2fhEgaR+b|AHqc-APuc2USIF7ZYb z-qGtiWI}6lrt=|omb-y^mQz7N)b~jWi>c*b=nol&{@7G{u&4pr_L)0RD^N`FSmd){ zA(H@~1ag~&5x_u%m!b&MzLn^@XlqQdVMYUkOSN|_-^!DQ>U=4JmF$cAU-v@4bcB;7 zFDc=4Q4{kXw7*@hS!V49phn2Sl^H?2b2la}4MHo8kNgK9v~zAXGa zmEepSoac{HP-|`;iZ^oQ*MQr7)X=2bzzO@mAGGct|Ssif=zNGIeece2Q2el*j) zoq&VsV1)l~!?T%IhLM>*=b*D5P0_M7?sSpxUOfgm45r)}=5-YdGosyB(2D8KcKg@NT3u#lFuztD3pbn0h1bskQKU{2 z-eSPI&R+mo^8ZKED^i6F+9H%t)po$v_q`qEfbMzZDKYSzp1s`qYz?iMsH@oYJn!+u zdv6z{>=+xPcZO}#X&5LbH1=iS;PuFtsvN?{wh+8(+i@#G zdV>p4OV)z`^8YA?pVK@OUGGXYwL$|xmGx)f@u)%Rvlsao3u}#i7g_tO{p6VHr&?nn zYNVn<(r&-8_A0tjb?VG;yU?3%hswvmII(pEjoHp1*H{~dM5`SgQN}3!PCigEXl*NZ_&ftwb7pe7ha?|UlWPiPPFUWZOsGa11#~kHv^NlO<6%-+5>huJRp3!9 z8bJHMx6h0MVvvj28(@?oGW137Yh8E{U6I(DFzqvSzF9^qE#~f~+JCNDNet|s zeO!s2avwO7@thG*l8mZGqPt&;i5xgD3fbqijWv{fRNLjQ|7`^pQ% zwGSZ>LUqBBsT8Csg-!Imst(&~elY_A!ba~eG3B9Uv9*a+=67JOx4 zlk-8s$6A)MICW2a#(srPIpy-x_O{tZgAIlW1Kq{TDWNMQ7wa?sWH~Iv+#~@L3r!C04DPFgZ;1E$I4xI}$bevF2bYMu5X199u}F=F;mi z>g`zd@yW{9i)J#=ksKbX${9ZP$Rt0ltQKOrxGG!)%T2Ei-}XGbTzP$x1AWTt4w-Xw z=L_U?eSAK=Et@2ylj!`>`+WdTbp89-w;Ua*#95K-ZCi8ZHpESk^~DbAwU|pAR$BFT@xC6(*qmV1uY`0dV&$jpm08 zx4ZmWigPYo%EPk|6`4=(<0%bTNBSy@uzzV#oE66#HptQ62pt|?<~GEj)qLWTVQxXT=t^H)A_8w#W`clXFUXD)j=F>}s13Aw8C{=lo=t$V7?%edsIBMei zfPU^syhy{X+b6|`raFaeojS#kS988b-Ze2ftGWH`a7_qCjhBbqNswU7yQHQOo;0x< z*5PdFr+UxS^;`FtV|X~F|2^iOMMmr}v2^5++{6%`R8+w$RTRI^A;Xom0t2R- zv-1{P4$DmPRFnr+i}UEFYm)rwd-bsX!rTGQAnpc6D!z|j-1LMF$ zivW<%6o4YVU~!)3-*JA1UZR?ZqA$KDe0bg`7qTF6a}esDiUN)MAqa%}79t-1(x(IX zi;@C?(hErL!=vn&>vYjM$Qzra<>-@LI}=E$_ZA9bM|XL@{kgW zyp$8LkJh?lN88*TF+tYNo|<}X>e2_rFTxLqSw=WLNs*m7MZ+$Dn;Fsr8G?325o&DG+h$lz`HQK^0Xi^=#qJS{Po;J@_45Hy$}2dpc5+SSD~iVT zDJune%CFo&7K|j(LG@2X76~|{SR=076~jbl9AsK=(1BhBDa->Q(k7Umbm1&`1SUKF zRgS5!%N{pr>WKvLfmct%}fgxNH8#c0bA?1UF z4b-)(r_mmDw>m_QDBt;nvG>!lPNk*LYNJVby1E*T8tqK_hbvvET77d=7x6I!zYDL@ zEanZqZVwM_YtHlVTCa~=xb%!0h8cB66|2IB!**W{u=F@K+Y?*8!Delb6Ri2Rj8E?k zl(M_Eil-YM!Q~0F|NfpKCXdqSU5cy{w6054AuH zizlU(Ayg8QG<=G}9}n74IVBqx9cs0**CRY0$o;Jiy)PFBy!#%u&p3Hy`_&xs<-ig7 zVHU>LnbD*Yb_(lXfk3aFauZ3&3G75zx#quV8Vhgm9V0zRlIBFQL0rxyF6fQ!d=DBZ*p%$V&7S=TMqbNE7&2W zb%>GbYRabJ0_lh2)wi!=MlDeJqs4MBL2+290)#~XenN{=X5lcWKTi7O@5>Yn>ycjana^Jm&3-_md4 zzZu0dcrRGVXgSxs2OcOH_52A7F$79RKX{y}R+*v0$!l$<%`|XGwBC>&_=>D*Y-8bC(iqmBVpSdolut zeAmS0ZFtp`(ov_i0Y-`W<5gtbJyeYn!Z}YE_KWgI4^>N&j$>Yo`i6<)N!jUq5t>3}6?k%L81TDpDNJ$M5rE2@D_)V0diP}*E)$%aqOfJPu{ zI_B%6`GVkKj-kouI)c0SlcNQpj?u4x2%4f zS283Lkn&gWVMlphCpa_`*b(c+zmt3pWPs6;OBS0_`6Dlv1di=5GdT~m0tpNw7!W;! zdt9sg(K|Il)pp~lIm_c#p`3XZI=D2;ncToLxV;Q1E3$az<87vZWEXZrzQE^!!uPaE zuN%Iyz-6S;jtp+_2n}wNAhHdm1zmqW6bp_RwB#LKb zeg#CnG^&>D@rK4^puCAQ`K+M}=a z@5&nI@u6J{pSxK2bgi$TA~Iu9*cRwCBN9IONx*kJO5(S70 z6#g7V;Phn0^~R5?UX^935@}u^tUZM;H*v0ah`#&>HMwB=jO2t}S#(@)s4O{392{cc z??h%WDtre_sJTKN_6SQ)Nl}qMl9#_8oXt%Hcy57R%{vT$x7Z5%GgQ1ngNz(4LCcsH zdq_1wiRiDi{~@w?;%y;*-^+LnvP}AOZFTTe9!U~zSfa4K%fbZECl&r1DA+JMSiH%!Gdj&^Fd69v{AY^uQyr-_ zAD|)n)Fxth`G^%8#s_vXyWQsadcSP73!5qJA#bRuOOa0(fUY=*1W-e)+3Q35@#bwa zafR)g=xNHCj~B|jMO9iNySqZ~Qry?m3ewF{1{;vy*+=u9=Fmzl22q9v_@qE?8Mw0mnv z>xsSbssdvGl7~;(2U>fjX46`8gW%R(B0kb7UZXgZD1feZwQZ6Oq^H#m`{6rHkY>3^ zb(xa6V`F%=}axNLK$B3lizcO|BN!7donjo+>;= z+=f%b*cix-FEFF_hgz7EstY(sIITZ-Gs#Fv3k}3)?$c~zsbN%!H2m^#vJef;o2p~C z4u*@}4)eiQBo}p|eY2CPP#++?F{XYE;Rf~dDzgVWl;lmwgXHgjL+w@B7Ll-d0RDnV zuc7aUBs))jT=XSU(G#PN_Cn zB*?eBPaQ%JB$o&YAdS=sC~KcRVcSW68GUOn&=VHcpT;lJy;2x)$pNgr7U_l!v$IKu z`a_({mPC4L*RWQbG1l{5>_s|KD39WYXkNupNu}S$!;ynqhpLkPvJ9h!($)t-U1o=C zM1k^oxx0Os3lMb+lp?UA38fqjUn7g6zKzZ8*hy9YHgtz7h8c}-=cZ=iJc)CzAj^jb zMbMj+bCSb^q}1qDRjgA#x9fgNlxi+*c8?DvgIAcd@YP7m^hZ_WC&y$=6Fk!zPM-rgckf3a31x=ozRdWi zL)`oY0K1$BnsFRnq%8f^Kvz9Ok^ROaqxxxvhDs%k(_n)UI($)N7 z599ma-=ZRgD_!)beGFIyjI_8WlPjbI--=)bBX=K_g`49G8Qc{@REV=2xZ=aL9uvP# zRGwpukKGG>6(a9uXkyS5TJ3_AW=(DkE1l$9n4S+!Db{}}KCL);NGjM7c@Rk~a#1x& zoAB8h1*wJ4MDR`ya(jtcc#!Gb`g3lloy9jH2Hqm=n&VLFHtSIx2-JEA8N@8zt!e1f z-cF9Ne{S51NUWYGYRWnvqavK(qT_6A&$;kuBh8JoG!CfxlL~qQ z1z|Ph!GG6~zW~gR7+y}N-JS+(zVl5@2+z*9q2X(+xj5|QqsP$b(mYfvk7#G|`xUC* zd#tJNNH`nWFC^7c8{Z9vErQ1hL##gFu`y}Mq`S={pPzY5jV6K0wx+_KqQ1XgYGFiw zi~bK)AovSFZ7@azu{)qf?xzO*@5zowdcBdz5Y=sz#L@cHc60!gwm_mpX#$A`DF=x! zo^-P?qz+NVwR;i^wGe3pj=o1m-xlqiu||Y;n-#Fux+w{adId>e8Ck^qiUh?pk4&o! za*H0s&@N84IAULnmnnpHf$m*U&X|J8N43u8Sr}BzrQQVZhR=n}Zt%GJo*|DW$MJP} zgN=SfX*IZJJX^SGNtV2rtfPP`I_S4We zEAp>)h=EpmBC^4cS^Gg>y9;bIdcrQ)#-eE21SXDD)!g=uJh$>} z(o$7&BkLt?UKVwHzR8TxNnG9BwvRpEct3wYR{7P1upX#ylngkl>%bDPXmDiwNQ>CS!X; zX$S9mSJ)aWBRB?lLi`|_3`U(02mMi*YQrdVU0y;+;k+d`*+!R2d~iy1w7)N_$;jfk zmWNc{rcHKYy}3D1>k4{3ve{W17p~95DgM69!;Hz^Lc3HmeD;8xKIz&h_GtE)x5Q<~ z=3oMeP&Ii!-Lmd18ZnRsi*oky#&TdnAxJdBF&&?>)P=o5B=hH#xd-utxl4vwLcNAi zCW*&MK5`hTH3BMjQYfjSX2{$f3Vm8SVuZE*ln{fw&at^&f6mA z>+P}U4@=FN4if9AsMrVSfz7nctLhXHq2d%$_fG#*CB`FPxwAUgc|+0hQHEr#$1CS@ zv?3h)=StW-6yuw?jauU%qRm?oUsIoWu~}9dhS`-2ZI=ua^1>KNXMF8$ZWm+R?>_-B zyJSq+vcOuL9- zPa4o8reCml(c`|+jIy{=whm~4lE1|pnk#>f9@yUIcy5cVI@!Bptb-UJWnG^u~Nxa;nn6bf7Ynd;E0H z3W0L;AfBF?JzRsvZrU7EGVkAPpYROx40*q9t9jiKXe{(%0)&? z-Vadp-<2Ay$%iS+F{yFriWrsL;g%$3Q}V<|^WxviUeAw>k6pj0DRGQ&PUQbI>8Hw? z|8)~WtIeUBsNCJ?RJ{`W&FDdmicp^YNK>8t3|{Bg)Z!$-Bkq3YZ@p1Id@m-Nb(J0@ zNu%KYIkr;cYnXZ5%TBSwT`%T+H3v95RP4D=Efh6{@)c#t4$ndtH)sk6bionRa{%F~ zM9ohPx=%0EeVUwT7Fp%ZYr&P{TOC$W;Lw<0_PA8vE!4|86{;V&A7ve1B+7JS(kC;` zR|v+sfwk;(*iDhKe??)%qtqR4q8KV1>DKYMNV^zc$bqoEYIliX0^EPbMuZmh0UH1o zKE?lm#qT6yj^;n6c+7`Yd(0ffObrQ>W+zi)mLv;5Y1?BzJnB{I{#x2*P>Kn^{*CJg z;81aeIja+{&SU2%daXOpU5t2Q>R%qd4GzSp22V$-HSXCS;P?NDNBp9~lo{|pH+ z0GLX^e1HrcXyPJ!!8?Blu=bX#+Zc%6K+`Hze~=*aZ#J%nh3QAk?B6#s0F-`f(-dVr z8n&P9YM(*Ay6-*Nc8>Yh4S>$0zjNgl`u z6o$N7XOhHAYNr&KR4{LU&bAX^6659(FR`Vmc{Z;dba6?$MUNjQxmq~8*)LW9v%9_C zj_&PFc8S|3zuP*tw57j1P4t{!ngw z%D36i18u%k0U3B$n{yNM=(fg^+CdWjQ|cu1HE<)=QG%KHeI!bM-bm>dKRA*W70U<$ zw*OMKNF@lepgQ^zQwg|HGc9_r?VAwY$;hh7&tqXV0w_{f5s%L<9<}dsL*lYL$g#D= zQqcT_YOnGsLVS>qh5O*-mhz5N0PsRtpF!2#hecS{|1qm{66*rvD^KokwY20oleJ~= zioDNS*0&&JLSB39K*TKU(6ueJkvueXxm+T-~N+lCz#eLl{``;3od~fg#e#=V8f~oObP4g@M zC&f3|NbkLxS3fxWw90edTatOmpMkmyE>Iu*gM8q6P_Qu;EU?{dhg|8+9WCC^w~NPN zn*MZsmEv*dGQQAHuIhfZj~)n|gnJPUU&CT$#0IQ-bBg@-*D;`odR9#O6X-Yg)esJW z6+VGixGuK|VRH*FFIcdCZfRFx%1lzTMA^8rXPdtfom8+k)_q}VUW}%aC={PAhf@4Y z?qHUN)RAT4oggkzk$kn&gdErS`F@r1`fhg+Ml7Zx*D{Ba)onZniyCN^rL8S&+yNxtvorO#-tj|CT47Q2gwsE06l$V_B%z&LsTI(ORh-)}hG=jQwYWCn`+$T%2 zqlkPxI(mk_yf)&J=YgOT%OC;AH{MW6{oN(xM~H%FZ<|4d?&42MDU-JXNxJ(58Kn$d zi`-@dj?)Z(MF{_cpNs%>PcABtMBgtb4R@l38MC4;t4T#|W22Hhx8qc`06#H3sJO`^nxdcuGX7gD2=~lB{rD&*`AyzIt?k-ccU0%FjB;V9^KUb-l2(%j=PR)Su ze;oqY$lfQ*ZC0NJS9DuuP#r^Wi^wXYRo&>lsE*ry%X5!M0}?#H)BMnfq81!XFX=U_K?0{+)x&YD0&aaO|qeO0`hGubfSNB z)@aP_oGDNFAjE34?(mwq<<`=NzmluX)1Q_{`O6l1AW3t}%Dng(>I*UC+|J!bDwlucFSly}qY+G0tzlzmx-${I5Ga3~r59_VAbyWu%K3{W%LhBM|8 zPp?jVoVp}we8_-Iya{;I=5+Mp_Hl!l2koz1Pf#BW3r(5VZWBNSwKXw}5d)~kF`6J@ zkVXu`fNgW8^RJbhegHD95P2|mEGdid7D*jniv4u$c>OW&uJ&En;XM7$b?>|Msu2yG zhN3Ts{!tLK+ZbATBFfURXNu-C>N^-W24|Bw)#VTMXG+F*`*2wZ8=iTlD2mI{PrB-_y?Nc zfz$(&a#Y8EJl|}{&L3)Zq#@}qPp@S0*jgR^Sf0-KP8SClWP>*dtVpmy#`_4~pMT`sfy9jjkre9k_;A1Ntf zB8@JXV6h=+mfK~bJ(91I&>P$g`sY0TAJ0V-M?>IT<>-XrWCci;xD4!of)&hSAw3V{ zKYl{k$4J<1E~^Z;n`Ep7E1^~S-yZxKp0PEdIA>P3|57pFV`10iry^BB5vikT}xs7{K+6oM2)c;p zzp6iH?T1I%XhCHajnhW==YZ;a%6`>ccuD`I%R-o5j^bR3{MHg{TB@4`V8deE&IzP# z)>-Z6dp^|xEPY3}HCEN5JntH#b;%a(qQVwSL$1G=+;%q|NZPx*0ZNxL*60*#SX+|r z|2PT#AXP-gSi2`M;E@4I$CFh2goxkQrB#q~fG|x#SL}_e%%as_byyYMTW3i|P&z)m zlJ^+v-$Ay1-0aKZVVX|Z{iK^?^XHcR=$JFZi@o6eHFGOAc^4iWP=Cl`bRqP z{sSz;5+1tm<9UMxhWhZKfH5fkFA-(T9ykC@Hh)nX2EeA~y$T|)H&lA-5UeMl&u!s) zkTl-%IdXTR$u^Cmw(6EUXV=!wO=>BRncB3%);u``A73gq;0c?$Fmmjr09U)9;TK+7 z9@Q@)IrBtCctrGu4dsy^;(t&BXW|*RDb>ELnpKxd%n_B3b*%>}h1oJpL6{5AzCu36 zi5-1saXYGG9&OXpEI|x}igWb0^8f{*RUoaf9}WKIn1?988`@>s+qiy;dRdz7L$j@e z-FaUSyHK6p>Ob4K#+DLp`*=D|UPy;B@-%5TX2D$J$a{N+#_p9($ipREV%q}%xGfKqNFmZ7wN4v=OdPGu?!;bfW6cXlB zS32an1SsRD<0aFjfokCSIhiBoYa8J4{(&E0>Sm;WQAji&`)Zt*h?pon5Sb`%&0bB^ zMi^JRPjd1lsMWS5-||wD?d#mx_I*=Yo{6qj{De33==jjj z|MbvLmQV4vYweX;UTZmR+TnvaV=Te6$LHHbi1^w$J3dF@)q=9yb}iNUjASQU7CAV> z^+05?6GG&&vqGg){axc!aVT}O)fs4rR2z%D_zmM=g8m2cc#|qVDB?WT9d+uZ$h!Dj zQSTlevnoM1Dd3$pYR=bhtF}|SueY^l$P^D$INu9pxW|)w;Gyl9aQVgM9bjPU8)m79?Q-2n+E1LrtQNU&X;p3h>|x z9LAUiX`Z?g7gtI9+)%u;z?AxkFe5S!YKRtaEopa%6+}-vIVS2>q7Z8ec}3p?zMawH zXa_r7M*n;$Pw8NwYCBm^Kzx{aJ_1m8BpiPi;upQiH>x>Vd*2LKnISByA@OiGGD1kT zsQ=+R;G_FXRwEs-I%9bN?1lbYYqM-6l(}CzwB+Eb4Tu8e+wO;IRho9Y-Ma#(T_yB8 zpnKcNT1(3*cQvGnlP~w>>>vD!CIuW>gv)%OJN|ixGCWtOO;dAYdN?sYf*^REECF!= zXLD?~>Sm!5w^v}yxo$#~f7mNQAfW&f52z=?I?!SAO!gCX20)7fuFal;hp<);$ktnm zm$2o{NWBdB!nhCA+Wl6XQ|?G2P`vA#iv6i@tFS8A`c5(3>Ca1Q=>#kasT^5z!?|g4 z7lOz%P7UjHMgkmFW7PG8C+l0a1aQvj&Y|AE^7-1=jNLmN=^!0$mdw&AZ?U9!p3z+7 zkeLga!kJsP+sT9BKktsl&(LvQwQchSAC@U@%(*L_#@O^Dg8+)AAV1waAEw1mW%zeK z;e|;lmSxxTR%=9~>A_z(^yr3=#^8+1D^>Asgi(Gt_c^F+Ec5;2J7z|-Jppy`h#rIK zRlxkClS?_@nEhxd5D^}MOhG}yia=XvYN75A61I~+Sa)tVhSY&n=NJBeNWT}sz+?D` zez>tJ5h3CoM(!7CRoX&lHja zKgu8YZexSEg~2S#&z0XjJ2!ovGg+XFks7SoBcFj*4G*5v<%6{l0oDjs{n59PDX3o* zIkAEV=WOP}8RJbLi$T;E7#K=h+;Q9m%)HqY@7;%k3vBu->{jKUWRDoX0u(n%F>#3x zDT_FbyYCN}X#>oW_P?y9t`#Fp+j{r?jYI05w_VIHm=%SpoxV(4WFHxp!Acqis?z75 zXJXGgn($4@$UXM*<_hH6Jeq%zK6M|>ZCxeF(O5lk_F3t!R(X*nlVX}CAMQ@) zXaT>V4`q3$*8ZcBYJ5`fCLMs5CQ|2y&p?}?nbUN9}f)GdZ=KirpptW>(bf+s$psgPh4!04}Q*wk%OetD8%?W#zxs#RwYu$ zN3Bp;$1r$2TJ>4sb5{y}HgsaL%r775lpBg@+^pFlvCdW8@88kdO&L!vUgmg&NNjW; z;M@!#%W$2msVFs}9=MG7jE}~N-!v0F@2wczRc9ccN#^R^uK`#dm#xWg3Sfmj6vH;- z|80A|Yyv=-91SQ`kIVGi?d*U67JJz#s}yw85WXVuV0)?zBsbjJDjfX#6li*&LNT=d zNmFnE=YF*QP(;sc%wqmL`18@Z`U)1}2g+aH$bt*YGNe5&=uxpz&t1BY(u(6g$3xKw z+tL1RNT8GRklyO%|9AlafX46>VFVd5(CcUJfDiDXwx7xoy|iIo`b_|6|h3fwLzRN9vDCj#+~dwtfGsZ{q1qn|rBeJ{k{Ga}Qgfe`kxJ{gJz$Sux! zl|S2O*gv$PT3QXRrwNu8XpI! zY-i?8l4n1)$el<~`h1$P`tZ=xrXV!)W%j06K#5HkP#Ry#-*}1xZs4Ag8Ncyi;yFH` z)A7IW4!Eb281Mej?F8YzS!_IL=3;Z=15NF_GTtVbI&|W{sUz6HQ&BG7&B;U0lMFOC61ZEKDsJt6qh(5Bth&2e@c zi``)m4_!%tJO9V6|38N2F+?0NGJyC0l?(_cwN|l!d${_MRnWA;uF3O6F51p`j3bnG z$Aw29dBL?Rl64;q3M@WWs4*ehkS6}_cd>_0T(}gag!D2ekh1LA2vPi+@(lHAtphzZ z#5J{fTz>wkTZQ8gGw7mrEK?j^?ZNW2-M!F+SkAtRX(RMWD(0rrBs}lX`CgDLx@A!9 zQTo+^BKLOt%Rpf&z&-ZVua6JVjM`caiQ7N{*vrHCcXqh+JPpni6 z7&q5N=jXknaCx0WP1?=zbUM+o)4=%&IN1l%D&qH#^O)jyDRGL@{pDkxA)yfg`HcUo znj;>dKkiDIt^65Kmw3&r?ju+V1I{U9;x$-Z!b^w}0M1QC-^Kfh3f!X^!J^HRg^RlY zyz7Sk=1AJebgWCs6pA-7&Fl`i!HqHlcV`KO+Nj7itX49YGdq1d<8j+R_rsBA)lzXx z+NHK$&`U5BzY#Uu((V?=K1y6i@dk%dXlsgTfi6JK-+INkcW!B7^;yHizva4e#RU+| zpNa4iRL&uTJn({*c;6^qDTgNrpSk2xvvi7F!g7iKPqd&B%6w?821T3>e&0S+-YH&q zn{}Tn+S>6`?URV#oVN7MM%678|437E;mFN@m4wl4*IOk*)*HGw%Vl>~^voMb9~ChHB0!ChfQtYWEncDbHQs!BI$kY}mUY5A%sRXgAT+ab7rn!-cCWvgj1!vD!RB2z3%-po)S-Sr=1I+T)4r zV;0w=+{SYxE`GJBfR1x#_%=xMF)0t_VMPaJwMEE|-xC&F+-!RY5qfIs8aVc}8g*V7juYmma zzBrdVvT6|F#OyC`hgF^vFaj_t7+iyvFD=s(~^+i!%<^yA-+KlWNPNva3tod zN4<3Oz)x1i3+0}U8K=n+rYE_k!^nNL%MocU_Tm?61O@_C$1nR0s6l00D{|=7)DbF! zTAM0Tu+;O_&)(|eM_xvWnpR;EriVX+`PUv%>sk3317$UR8%q;17Ow7=7Uw}>1IJSa${$-DE(wB^i0Tp{ zzS!|2AK(~K0zVWs#^}-;o9Fbp(l?WK{TAgk-Tn% z53|7drCcd$YhfklgDoYI9Y)}g5*jGaoads7)v4!XCfA!xL`oSILhB1{ViLghciN&% zC8hcDk;3Q$k~#xLS_a#Y$a2lW4~vOVI2Y52jZ@ikM60k#PQ&4`&%3sH#if=z*S@kC zI`J+qj9teGdCvMJ0@$zp)bX*i?5V8zWISO5{6`a>fwDGEf0cMx*kCmzXCE0g5Sb%= zo`f3H2zW<~kXEf5@#ixf32JyH30$kI;PZO9Tf5J*ofOs^l0J&n_r~M+#TR1{-!@nj;?U{(q+L zh<`fEMjcd^wM9ZZkd&pO%k$-rP=0>cQE!wlWAv@dO`b$JD%@)-s>+446WA!p8XqQ? z%BFgL8`5fLO2Vsp=lz8%Qdl#7HndjtPpdG!2)V|u)v}^EU773#c%835lor=K^K9gM z>>6I;VbdvPxB85NtaQ9a32x#Heg(2uYtCFq$)xJ}oPNy<3Cky-OETjprxnhWmvH?& zO1plLR+2HGTcADw%C|b{@`Ho6DJay5QVOz32A(LaICTwEoh3NoH{+qUMzhe zJY`KE%b4>mv{cqQG$0UUi_+V)_IcMjy11kE7TfVaRm$y>`xfm1f_3TpW}#p&BG|*K z4IboL$3-hlgBtjT<6jy}8$DKc_-#7|$JMR2@^ggLxSv!yW^i>`Rs+#n)wT`($e zD`moP```JOfcFw6?+r*#JL$fFX2pZNP6vn6UDvv$z(R>gxdr+jc0%@jYL+ zsAAg$FFTnU*rv-YOP^Fw@<&jUu+c>yyzbzqM0GB@r%(egwoD&2ZGE9XYN{fpBar?) z)Qd;RjR+38FWc@<>j;q>1iAK5_<tunA1L2vM}JI+>GWJs}LD_1zM-!#GV(icpnQ(Aw;vp4Nt?>v2X{3*gQ zucC8$Pv)nyd}N8up%YeVN}8`lMnt{L!y~%LWUrke7;6_EU;aY#BggP*U?3cisVW|P zN>duei4_~kQ{F8+r7u_Q;E$#+cmqCpW34y{ms~5;&dfO>x+_bYW#6X8DA|J=kboN9@4{Y)}dHx zo)I}27^eArvdhPYwz|P}s~7@yDx;t5IutFuvHlPRXLKHG%D z5HUH#9Y>U(uqwBz2bE8~uz1;9xA|N7bI)6X>V-W9AGd|UKY0%RPJfhz?%>;|r?j8T za|KogR{lYp$_<&R-!cmNvm;N)@kRj?e!=c#N{{XBF03W=rDSinX+=pruYYqq- z6!+9Bw*Y8?vbyH;0(nnVo`sN>oZvyLc zBpdl0^n`2|rybI8qxZdOM-d%(@p&?7O+~~{QUpSp1z@Y+3s(HkoxkWYNQ+kH=4pvZ z_aVItpUgz#N6V^JEanRx7k(Vhsz(d2ce%egJEm{$Z)Gi`>cG&CORELC76%RIc}+idGbMt^@aKZslyJp@0wkmx<}Kl?UABGlU&rbhKDy+^X`VQM1O?A3<@BN@~DxFdtRGt5xuMDmihay7?}Wc;Zl(SH$L zB(EygP+K*oCM$6h^>iK59p|!Rl@sUNX|lU#UT*xfhT_OZOTlSsT-Exvr-^`*zXrt_ z8+(U9$LE}4s};(gKj6h)B+N7b+t0AQ9|VhBrbR1hUxYWO~^~gb!znMN86s_b=)63_*MRI)9m*#7D5}1i)AukDdj?p_JY!bXQzgt!RJ>IeJgX zK2l+G+CgAG=Ucu`)|YjjMkk6#%W*~l|ICFzyM_yFL*Pc)ZFlm42jiZH!>F>AX|Uqq z_M+TU#Y+YeNn^I$jy(o{iyJ>7??hffgtp7gp>~Vmhs`!Mys6ZHxO^Gi02fsZOKu3Q z+@RxIU7|pUWVtUMc3|kmF@)}efytZUH`AQ58Mqr-+wM!x#?rMO6hEZ!fN1Eh-hmiN zkjp8z-xS-mF!{TMVqz|QkgaDqGOrJ6{ZUu=bCfHuJ%UDwV~I8#hc0P_v_W-%aQY2c zTgKBm|Imiz(6K*s6y^3V6Ac^41eA)CnSuF$`|-00$mgEn1blF5>%-yDIg&yV(J> zx%{dZ!_3G*ulQH~w3R5v7r0*tF7ekCPnVX$vWL7^r*O~k6gEW2SPS5w9C@3hL8&l@|FTl{$A17yw*mwM9?h=f3h}yY3Scp}lEUHlH4;m*X_{{Xuyz$Cnli<~ks= zOuRp%dCTi?rhd+xBFSj^ekLQ5AKXN^0$|vd$bBSQ3eV=Rnk%iR9fUFw$PD?%$)Qh| zkze9%2BvI;dvsb~hp|_gx|qgwrRGJ0UGjK=Jk=2!+d_&2`Fbvi6;1yBJ9%8`MGo4P zs3b0q6)~{LUM4p||1L6C*dm+p>@05p{$pCYr~sL`i^7)e2d`@w4BUs{)y2TF+H@{> zIGkNwY;4hL1mH%SCMFWUe!17a5B=1c)E+e-;N(NCKJpRM;!a-4#uO5~=m`E{^Qe(9 zRaPcgT7aE-ompDv=lgmZ4Tgc$mV8$c?;`lNsb$>OXk2ghbl*5qv>YGdU`xuyMDKlA z{o&u0hQ4d_CvQ@t`ixCQ}jGtlRvv zcb2ac!_afPuwKRCavhJ4($^0tis~snFcN}Hb2_1)g{n|{jWZFNg$O+ zyhf&C$})o2#KG?5%ZNv;gX81*Jn3s8LHDTJf1Pi^y>08?F~0Xn>ND^A{F2Miy5F|? z7JoPtb-{jP8Xvw;3c1Y+!m=czeIl!zQzGxaDO4|zBK<}K*;Rvdo0s82me5_Xc(eG{ zHVWhhJL)$rHwoj)Zq&#t@m9uuuB!pRZ(HK8!fqml1mqW&^N6Jtk7*l|rZiq`l`h9L zbun!zjrWY4s&{V|d_U5oo2of4YCLoL`B+MLCryW)<`@}P%9Y}EOTk}|v3l#WbBVRB zbX^{oNHSLIi-R57GL-qvu9COy+tS|g_yNk-V5eUQKy9WrDbqmrV9A8=E=ZuHF7GRq z=u5X(sjGw40*;$>3BF*m?~i5I)B}2g9$V*}+3`R|TW+@!7=qmlESkSKW-1R1V=axF zMM{z%*dkQCNUKBGpa{$6xeRFrELHx~(Vt=ni;2)U&-W;1m1^0k2!FP(Vqh#LF_0?Ro3mcpV zTygJ+X0M0*u6N-FufV+&O?p4lK~lxM>+9eLrRz3cu4f90pfyGEI<822_r}XiN&+`? z`Q@7J{l>TCbBOTLD8f4QdDHIkCQ76O%KL;1$9-R!^8*EDiny7DZHc*w03?BknCtl{ z=bZ|w?f_d7(GRQVB0K@A4M;1avbtXq%Pi1u`OOr$_yWFh2W2^%vk7QOgiy>@7 z4$*T)v#V5FV~zD9e|}GI5x=H0DjJ%nTdu#II0lY9NX5+Pdss1IQ&Hk(@c@3uRWM5n zjVd?bUQS%~WbOJvyX<$0&0^vpUJP6FJmI6f93@*e9n6In**c70w<~6+?bcWcSnM8$r+zA%kbFNs^)4;dkLovt!2hQBbFH zQLzDS=g797{6(BO$J9S!YBhA4Yu&ydx>HN2$WoIj-rMRcZ<^1aoqo{Fal+Q~1+x(R z63%pvJ*N356RIYFu@k|~mqY!+nU`JJs*DC?6{^?Q`qUA}z;MZ2lWn5^r8o@41vR~d zDOJcv1Bpw7B?fvq*8I6}^vmXbTTshhaktT97oMh17ZeAx6EX`1`LAl_i}LY**VETA zXu2--^Yeplhjx(cZTRz2Y9XZj9>Hu*e`Z+Dt6n%5?R1ezWf=)UV{@ z_xdH~U5%aa%sDV@=yFcSy6w+{L)6@rgQWDbyW)r`6xvu@ql@M5TNcE(G}?xlHkSLv zbJqSJ#@;$8%0B!aRzxI3YAMNGmXhucVS%MtLQqmdK^j52B$oz}&Xq<$LOMi11f)y4 zk&y0w@73q`zBAviznS+h=b3RHcRu%ZpU=6@IoEYhOR`qr8~-j}(3u=hzytb2#nk=| zfR0)F{i94+!Lip3I!&(WZ@R$3nl}{l&X$zMOVv*`O=ymo6hrEqGHpAI7fMR}tiF(P zuNtm%?G(<)vqs|;8qgvGu9lDAkP>V0nb2GyZ94$Bxr3NpedZGWLQ*cio=eH@YjNhs51zV}AR@UOQI`x;>3-@TlAdfIJESc0dduzL zIWnk*LoqkQ6>#cO;bj2kNM^t>&e%7j#I~R7HfLW^^~2@1g41W=%j3($#Qv9kCktaQ zpTNNg`$I(}JG3Yf%lAJCON`hATu!rK{dmQz-iuyi6^JQr)4DpzCS)=YE(?|HfXG@52^3_<_htvS zbC7aQpBW|(y_nm{3xt)6G0H{P*PqA#*zoU9PY5zvSAw>OOLFoA}*x7RphSLo;th6f_?SKbxI42)}D>Ju*D-^VUKC zclqj$TSNkTL;Ybv#nUg)B@mpV4nsqQFC}o}{4XWu5meG+SnobdYN3U*YIQHaIdMeY zukTmYq`$uE>#DBDNhQi8j3Y2FCiUk_5ZgkB$ulM*%XAeVz1v_)Rt-D_v%xYZ^L=Cr zaPeI_VWDP1J<`K;EVjYlmc_3-scVmY*iM8*rDjxESW}O{418ERMWb9JAufe{JWHdw zQ0Oy2Jp{lZNKwHH*M8zn$ua%L7A`aNp{IIQ{Blj#>&YiZ*!C`p2mSWES~TQeer`Q< z|Cs-V?KhiU{N`hs#fnO}X^FMZm7_DvYL?&Nr2XOfFMnjI6dCc746% z8%@PmQzhvh%7bb)-yga$4jp{!@|G)pp;^^M<1}N`e2-QkO>QrS!~U#{)68D3vpLaZ zs2H!@VckfnOPdQCRwXN=79SoQ)V}qeGln7bak7#=ogM=DzTvkI3qaz0v$5E?ZbYaI zHSzcD=NoUx7z8@}T-Ey%av$bdkWr0VhMO9y(xfMhU7EG;jZ-H?ReG`_2+Iuhf`|6! zt9~R#sdb)tzrPZ?(F^_>H-CkS(>wS{VB{RTyxEWEYIs1DbEf-7+5k1oSJEyL>8K zLOAd?reK;)(-}t4v@Cn_iM9r>e@+m0CY*KzH&1?R;N@zUZARGJd2f(aKd%R^oCGy} z%{Yfh0E#~EtLQ4j*^JI1Pg<(cKAqWju?MTSPkMH28KIh?Vn2mu$>^mvOlTds?muM~ zc%{Gqj#bhl@Wm6gR`)Y{^YLP9x)${P&B~9j%fAwbE?$#u#KI?RvaSaN;5Q8(mnLa5 zE2NYYniz_2jnVWragdw9LsQd%v>ESLf)E1~W&RVJ-G=gr;*jP6gQ6?BO$)0Ns=QM; z>3o(Wd}7=PPko~Ai!8BS6KYeZc5B5+dsJk-o^Oz#H#xKhtHTS2gSP?p^(aN`54$zN z*pmi;!;K=h+KK@!z18*h0R$m6dzFO8zZMEqnZW}pp_D)T79Rr~2y-(y^y@_O$X4$5 zEjt!)o?_f>k%Uf7Y4C$WE>>YzS9?0FHN~5z`3W7ezDrae3y6rRY>s_h#R2FZT9se_l7!w>LEBkvG^_%H-7EQ=SEdxgjF*a`2q-t98+A z=ibGIC_R35s2u}%uR~zeZS`kVMWLLF-SnkPp_G%!>!9{8{5_jJX|*R8PR_kNrn5Lt zE3RLz8A#b$QJ*brRf>Vza@v@}hTO>ItZce?7BO9EGLa0gd$Co>In;k&xM=&b<nb{54K)glLaoj4cEJ>BPto(>1YEwW`oB)&YDz^Y2i zLUO(`+DO?gXj`=f#o3!+kQzL&6;8Y%Wu@}koXzme{)^5oWiEA@e_xy$WK*v`nB_qJ zdTN(ikE>^`(xZ*{w?!@PjiMCDwxSgGJgUm}d*z|)JNfaRhd*^^ID4>gqqi&M9JV|I z0>`%<5-%Spu@3Z^qkKK|^GSFP-WmO@&ktNxiik(NT~)R$g%J^r_OE3oTATk-`ED~g za05t18=mn$I5rEH_tVM@My)96hDZ+c4r*>ZFT9eGN@I-orL1wE^}GR<5Jdlju74< z(eA%h^wKzzsz&qGT5yk_IA4aasFs}_1%Acz2}@t#bS7bS%?{}6PT}6aBq#*DilXsw zr$F3%xqp~lbn|(cY~oP<`f;7@r;_G)O}@k)-ql!w)`7jXyq@6K$Cgu5l6Y*GvGPaZ0L1{JGuC(YV7K<*_CS z*eof^({>hM9=nhzsy@s~bVFeKHd+0zKVSoV2O2>UVx&~OoGWzIRQhb%cWY31XYHCr zPY|g|QbyPyiyN9f9~eh0`+mt5sY>rUBJiEof#yYX4Fw(7G~|b>N0dpfdQ+MKIeC0& z9801wA#tVRVydr`!mG*$pX1xkUd5eJzae~wh%>1ZgRUv%m*2sKWBX=+Ci={nE|X*BdkM(O@uA!^n_A57 z*h-(`cDe?tn%o7R!Sg;D(<-==#2+6?obexK!fGH)X==Lg1F5>f_TvzguQgdZrvORb ztge=Gt)sbh?nuq>W^luywXkcm600xUW=(1d)LAuqpZTK3Jw4Z9I~nhFrq#Y=ck}fN zHzmP~lW@{a1RcV>J_=;9Z5;o|)n~W4jU~=N$-XvRD#Wa9`0<5ys|qab^~ZFMlR~HL zpIEh*tSKF8Wle-pG_P5{&OCeiP(v-m+QglDQ3>RRZ+GCBxemG+j~#8`}wfF@qw7Z*r< zesi@NlRxD88%L|90S=>qt~|a;YS^6Tyt&=Cb-p%!p6H~`x z7WRYLA+Wuj!eaaGAATf>#`w%7vhXKBso@oE=>bN-7Ivn3FXkdzL38AWPs7kny5ATM zHW4DnfcRT>XbcO03H*{aF!Dx`b#tYuOU8X)ca0zZ-4In5h4+L@9K@ztR|{JujPyeS zzAEb}VoRs2JK3lqS^E?HnW3`{ABi_l1QTx2iHP9IiakUu z?9LbUD{&`4zpc_TobOI1Ppp{>nCQO8tMMJyg99Ip2xN{%&{9a&*W)VJOte3@t@sr4 zlPT#8D)~pj0sTY4+2VjcI!RcR)R_*CBb3+FYuTo8yb)=L(cEuJ7-Y32AzCOYj4u_z zcNk-l0W1f*SKu@F%iMx>yATyKws3^Aq&uJ5Q@n>9kXLE`J_dG^qgk^7+aEmS(wmP9 zWKhLxvcf`$Lq%oW-09vdL0yek(@fj6Ibyb z4!=XXn4#j1jC!F8Ely;LhRt3p@J}5l@vBT1zk^Y@HSxRCI+odIZ>BHnxAs{V=k{Zb z=Xr1&PSt}vSff{Q8s88*Z!L;i7qO3~LU?gQMGHUbk7T-qa|+za+-jkrY492+=9 zrgm;8=07IKma-qMG|;`NT;ft9aFK#*F0||(tKvEDWUH^jhZo8(zTVNWrs@vaONy)W z&St)z&=NgSD3iLnqb#`H_Bq;n{T)#Wf2JA&zdb-?Z}+kI7h*=lXFRyH{H z{)*HRyf^0AKcr;yb6hX#{&?ruZ-7V(9G?DM1$Z=%IL|*23upx$GnHvV(LdAG~_ToiL2}k$2mxDUwbl6=o5` zv4cz0Dn7R0=4*?55V0H}z!cK<%b+OUSBB&-q_l$80~5GTemcObab|`fB*ZI^4>v=7 zo=i(9DGoLs`rX;FDQH#p?T%|O&O0g-422W7_DC^1%Y-39NIM>g!w{qmF1&&l6o{pn z&X9W)H@t7qy9s4pH=8G=a2hyyy`wsa%_;InWB6xjdl zZTZ2_unV2D{WN0mUM-@@p_At(Am2GPVX(t+N)P^#j@Px%Qhc|=^0GWPW>wO%fsokB z2j=B&Hc99_ePZtY+{g@L5Gu`OQ>vQmpIpWX*eNLnb)5g{kOIKz=|^%ue*`?*=fRrm z*#DPYhCIfhpF&PY?D{A3hwQNx6Pyf;$J-fi`(LX2H96tE@qYc@7_K6(GX3j2&RXva zfN}}EVkub7WNNvWAC3ZVD8feG#lTrZ0%L$sLMF>h+t<>|GweKu0w%&apX9VggA_k-$4|1Lm$}-i_^S3)E-h(hb%a#-&xqL{=n;CDuf%U)RSwRfU2(E8hTzH z!%}`wCI|rthugrv(>2U=V|X>R&9^ct44=u9yV{z8c}%`L1urd>MSrsgZ5dBjhI#7k zea-V9T5XohrQ9%$1n|y#1OF#~feuPC7xde@%;ic;}qHQoq9wD1Df-EVOR0jXJjI zX^u^lE*LQ{TqKoiD5;Hv6f9b?K=bl8VqXj{Nhd3FEZ&G)IN;jRWN@}{(YNlZ65r2c z0GE?1217^>N9PikCFvjGh`HoGnrIzR(1KNYHoSyO0bQ_1Q8h^-Be zsH6r1W)%xG!%>CKKx+SHzVQ1vc5b_6u%s)?Oqs=3t){!P8*%Mx+IXJXJ(Ph8f);JR7j<8#_^jsovHfmE;}gnEd;vZ4KxnG!gHmFmtX{@ ztJn4jJ2AFgj)Dbn+(m`yx|;26cg1Xe8ZKbn9sPm;dG8kavx1(>B0mcMX%fnpBAyr4 zK8L4#{OE@wmTanjxFSfPM(@8{aa$>D%`}y2+!yiaZAy18Agp6Y??m?dcVwmAG?jeT zs~V4Tu6$5KGjv-*Q3=$OrlX@*J;O9UwLuPWX1SDp2DCeKE&8txLLQ#usYN+DxAm>g zcO#@H_!4in`|6o|r){_y#`*7Nw^xJfr;fSAL0a}%-%t5<<1${fh6`CRRPG)LZ_@}F zZemuyNsAOSzLY~o73eZRha^O2n%NFmp6%SOiT-|0nqAEFdjt);CsDNxD3>uLtTL#_I~_IZY2j)#AAjzRCObUQ z{pRaicaMi5X7)9EJ>40G56Y5QNa{#H74$CcdW4iog>=0 z5RLxL3=z*8)?m>zop*0Puetc0)bLUBaw$ud9MI%Ju0xp-fC!!V2d)2yNDwZwXso^# zqI~a)WVQ&x@nNaDgXcCFD%o)A%x*xW1pfg6??wK9#}{M;g?6)(0DX{mZLRm8Qp`d7 zi$nL19*cF$EIuac&;<&0$-1%jvr1M8z*~QgwV!$Y`HPrLg!GIaGhs2<(Q)->MSB6< zN7HQ@)mt2(5-$ONu*3K><*aemgP1rM7Ea$qt;^=@Bq%I4?1d6T6poLHGbdaKY3%m5gA3J@*{7zRBp0Se>Vc*G-0zQ`Ft|I!N zUw~mICxC?uLRrfC+VpzzA?W>BPv{2nnNx)D@qiJT0S^nQw-|-S`eFB*trACBcpTku z9mZ5{2HRLBfFUW|<8%NOYnOf)IS%Be_1?$FMDx;D*!@!Hi@S4fqV#5295;6 z4Ryh=?p3VtZ-KB_;x5aPwiV)7S*j|5-Qu+eR~iSY1|OeD{D4x3vUF#^Tb2^?rnOO2 z=KG?!LJegMmhhF9;}DV0aS$AeK2`8*qs=3^{R=tz2oG5f={X8UUv4aqj?nbrWvjJH zRxTQFSw$q(*wBC*CDuq_M|nZ#)_r1mm!yVa5PSK48^auRxW(p4cSfNM3Q^W}$$Ax= zeB*^WO1k&}#-QTc?won;`vQ!RHT$ai{I8sY4oBi@13b70O1%6I&~hl@+gK!_L_o=! zVI}|uBv7bOw%a;NAfk;xY9KxT3W_RY)(mfbPDI@~H7gVr^2l4- zQKX(M5QyA^_`;N+7tHS*X}h^|V#r=VFevW&jfv|h{U!nExfq$wCqE{4zKafV?2r4?@#PssJ=RT=p- zS%R2 zhK3?eulEjOOflYg3DA~Ko{v=F4Et`w!*Oy}@MWXTewodbni>dSm^nRAl!k)K0V@C? zX7@#K9sqJb4%SmyL*UO#6SO?}KSQX%1En0IIZ3O)W_g-#;XGX}%w*CpLdz$$9@*Ov zZo!2S)IOdUC9T#<;y5j4SD%MNp{lo<9xP(d1>9D{cRC{fs%~`XJJJ3}>IU#asKz3P zw}2OK{flE|vNRQtf+~-cKCt>j#k*vragp&fW6B63R`23*RUl)UI&R3UB{b)}?QnVZ zaj@X$(QVvBsYG_|+RS?l()PbkXir2xCd)d^yuN8GE5=oX@nb-t8|#ri$pA&M%%e+B zDSEmrY*!1k>A|qLZ81EgqR{fzwH_& zch(RZnrxm#EYQ9NGf@5SOp?x~r9A6oKR}K$2F>~DNP2yhwnlU&FW z8nhrIPQ67^mI_$XGS6zK`;EL9@xG@|ZIgt4&#$ptx0|{Gn|-e_v0jt))!mrcOzEfY`tak6Y*UJm8TF!^*4);7K)hWl7vRhfU<><3qJop-4m7n>hRy!BT~9;q?a=UM7)p$3_ zc#?>%=Tx74g1nJ;NhislIg)%-%sMG83yvM)*Q$kiSTaEvhN3TRFz6J}3Gsd4J5fCD z-=5(~07~#B%Rg|BACR%{uevlWWUpOu%{o%llS+KFaOSZ}bzcKfh^7~gY!%7O47I$H zT+~;QZm%7Z5aHWB$@c{qdzk(N)eSGTZ(jx#NqMihDHh<_VQfDfx#9)aCVJdaxl7Q*O$rprMSz~>0}_r zj2e^AxtavhJQwBBUCF?S;XEmg$AR7lUU`xiEOiWM_IBHr2%DI=Bm9{2th#BuB**T! ze#2o-M`3AE3SYjX^hS1J|7F#vkDcmooEY<;p3`1>d?E9tH9qYxrR)NAGnKZ%ayA26 zuh_ughbp`tA!_QHi>>CcK~vy%l(Ks$bq8QHbXl0zw7^?-Fa95i2@&AXOFYs9#YNUF z582WIsbd6AvyGJIOq1Emm_D5a862$b zbQ^>vsSk#Wkai0`j^*h{3)@G%)O^6``p0Pef;ov!Z*Ga-dMGLZ{Q8Fxmi$0C#ZqHg zG)a09Eju{^Ddaz(ZK;cKJ<{8q)6l6ZgNlGZjwN0P6HdFp6$h7m2{OZ{e`x=H>P-6T z#NKY4>7Z*WLHhX9L5!FUZi3Bp_$KW|+Uhr}x6{l}8T&oel;JjB9(T?U&@gP|y{AC$ zh@I6w2Vlcuba{fucOY&u_vCdX|Mf`ctvZX*wu=?h)u*W@oM)d$ z^Iz#b){;TFx7&oJxizwHyMWrty#>Wrrfwy^8xnfi`g03|qQPLTtna#WWmkLoqJ{ZD zsSyWxH+|$(g^yfQFlyofWKAmNAA(B>E|NTr7c=qxC3B;W91!vvtxi^uybpv`;WEWp7yA#_ z*k{%OH*}2xE6$<&7^d^(qSg=P zu=ur-aov6MlzaU+b<%ontFL4X{KEZ6KRaG|zL?9Hzm&?DnhRtB`if*w4=4+<#C=~s z;KiE@^-!0^L7qoRm{6Woizkj7-MXL?3RWSv-Eaj~irUAlh`;YKG4^(C-y$(91?FRx zGH`{JtkUpSeuk9#E!S2>IoqxbakP*Ej<2}R-N-V$xubhRO(U<0V-N0}tJFuSBp-T9 zU2Tz#>)LYcb#0T`_P6D0~apZ#L`C1UWoV$q z6i4eq7Ds-E+;nkTjG)xedFzzy=schpH_DdJgm(8+W9i6MMiJ?!vL^E2G$Lo)zBrW4 zRrB21CEvr(#wC>^<5eCJ1yj{tGM|1ZR%BYu!zf-e7vw*YER>3(i6-2XyWR@!3;8l) zkL8?ab0b*3_~<PqCc^nVm<{zt^7x=GCXl^q~5CQi1yIm;jBU4CjCxmAZFk;3;$SW&zbFxcibCBTc!!g$1V_fO zWQ=2jV-w)!Fho=k>@m0yP*vV}oK7_!0MMWSc%yFiGJVwlXBWW#B*t+uEXENZJP`zP z2FjHW_ZB$}S(Ik10nGSZP3f6|rIoo}A$c)byzp7~i|Dc0*^HLl{@5c6<9VDrav#5J zJ>G;GO*}FD9iC9|8xho=<%Hi{3yj*}Z02I=lPp<3oi#VOS*CLs90{3)bIo>H-T+)7 zk>6@>KslvfP4uC+(#xKm!AnvlcvXZC(fMJvv*|s>U=Ti^N{Z8P7S&Z@>Pjsw^lgFr z+7?tyGu;&IIIvlor++SfHd?-7RExJ6WK1MC_$Wuu1^fUrh#v6dbwhGaJvh^=!Zv$cJw7>vRmO4#VnrsBu5#2YH8xfi*x?s;a znPjpl(R1&5(3)sghxJr(C=!Iw%o(WWX!`D}Qv9Uie5o!|z4e5x8o>>JcbOd?lcyzY z@w&Knzx59bVIm|2p0oU2GZ}3l03>tY%$xZ?!2p=WVFEDZZ#AH~v#Io##L{mJ%q>;KdvTS2m`qH8 zFv_A#DE;1koWiBXhDi-onMQnlUr;m<_Z*pI>L{#wEP1wWuU$r-Fvt~CAgGc7tSaA6 z7tm-YPMyx3YpqL%Pz_0>xX;gku67-s4(Xh7rs>Zf(&*5E5q4Q41H6xn*B^$N3n?L; zn78*VA7t5`i6}j?yop7Y$7OobF-d+-5=P#?6&6##z^Y>4yU~+8%t;ks_Cp=vVdkkV zMxzARzKgJ*dGOPxf%ErSgoIj9;f`TNgdwa&{F9)HJB?i1Wdw@s8LQlZ)6a1YOx2Vn zBG&py_m^7BEoDG|lu`o9J&!OhoIBH>Qyx0UgsySwWB%H9U%tp~=BS(FWrbZxT!I*Y;$i-AKRy~Ux{>W%YVtf~696A1n&Jly^T=z-Wr6eK8Ofa01` zY>KtYm`dOQu9Hd@55Rh<_!c<+E4Mpn>Lw%o0UK$@2yhIP*1$&&@0z8u{QKzhr%m8eDEAs8|6Qhfqq(NN1qg+`R+*mjBsnS=xgUpY{OIBFfD)2Qof` z7KxkDYU0EJY;-YkNePtI)wcDAHhKy-nIFHszhO$7nti|djdlqx*`Qx4<|=V_eEa5Z z`XhL4+~8_P{?(yVww}rhrJW1bnfzGGU+h7)U3a_RoR{D_IE=Se2cvkfa<&AHS|XM| z7F#?8hGOC$rL;G}p0Nb&JZf{EmhweH-XadA9NE~6nn}hpF0(~qmO2kxmzR9}N}bKL zJ?G%?ocL~51z*T6CV(=8~`KJ2!@llIPK^pCtA?_@5UnZ50*iN zMzIVDh4V{*Xj(U`2VI$I8?V(*H+cdyJWX(p*;AA*-Yc$T)t@R)6LII{pia7WzQzxc z^4;t)NE+3~(&`MrYPon(ebPk49qqMl;l|iukY^|ZuXii4YAJvs;W{o~MFk9@Rw13d z7toS#)B^wr|7QsS0?nF>$a2$KM?QXQ(A69s@oLqNidT;qYAQ4e zyW^CIHd%r=XRL$5GREUWbF16L_rVmRv>YvC9Fn8HJEgeDQdBex$AQ7;+ROOCCHZEK z@pR8sP4n95x5u4Vi6151+$S>kM&n8Xb%3ePA)Uu+6;XkU;GIxBU{pgIYZjS*AQnj&8td)Ry?+|X+-D3 zqrs_-7g(Pc(D&I3BUisP)|Zd9(?>27nj+dWKh0>~b>8uF#b8Y=B7urJHGfFTo*Gn# z_#RyqQ?SYIhF9uE?6>u~ySm_V?76}iyNb{Dz4~LAIgHVwvQPRo+o4ctXz0dEZME<3 z|0oMUfmo6O7?K*qmW@{#lVs8cXeV#+SzJSKVCaSsfz>_wN83q~cEf0{8MCN=0ggt3 z`XHKqooWQ!)Z7mxPCI9ocq-I6AG!KQytRlwUNw0)vC#kBb1K;{YWDk%%c6mvSk#x0 za3Ryo)Fm#x?PhhR*it%1tq+U>xK@{MY6=ptJcX^ERiW z&Xv|cO!9C`F(P_{liXx7RSlG&%{I8sB7<@xP@kTAv}36ms8)ad-L$PoD;kz46ZV_D zBR4h%?vhU}8_RAL(NsP2iK9jI_e4ZfzklI4^y#X2vhb z%53R!)qSwGuh>Rauhk7b9>}dU-UN$GhGrIBPJs1zV1KB{ZG+Ryav z)qz5{5yb>yz$ZoF_Z?M3&c(1Bqpscyl`jHQHOO>jAS6u(2rgrZD8O36k@K0B_hmr9 zXG)ZN+h1OkwO-x~Bmrk=bPOUQMtd-Q)_*ULfl_oQt9zLuDuRbhc?c|^0Fvcne9I4$ zq#@`|HdZ0=;%_HQf4e1yWyoSMfG}D)j{|l21IjE~(8_84B58La;&n{o%o-p`nY9@taE2Nmfmt zgZE5K+yX3-T5b8_))i@=gs zsi1H2jYJ5V(n}$h^aIc9ifkDBjoLFFf>bQozRZ=pdd8PA&snyA5kR1MF8~@#^0ZH9 zR}k137`utw-;|zhs$D40Tn`e%n;FprM$MpM)3+dZ{6dV{K{p>n2xD0n{i&k9Vo$YI z8D(zNe5RJcK_>9LW<8%bc@=!mr3X&!@-sy|(qcplG+`e%MS=NtRE>vL-$ftWS-XOH+68Df zcCxa8w%NwJ0?BO|6)G~^j?4wjc?v^fEjT`h~)}M zgBlO4*3KwG51P)z*SKq9l7u!w5prQ+(fk)pl4Hqs0xUe~23#*vPlh zy3-+H7ivdF{@Wztc48T|N5c0Dk~mJRlFgK-UOe<7iAd*)3Gv*zJJSDc=w08CY`2n; z0*{UIjl9Ks=Z43SF?-+asy>~^y`TQJ9ng^pM2%bHjj(TE`<)yA*GqVhJJ-bUpFlPS zpZtmvaoD;NwDdLb<)JA5=0*OZ@sdw2mxODYa!qg?Vzr@&`))jIjUERHQCjQ@IqKk0 z@V@7r40ohXXN-@rq!mnW9~@rBNfXQTv+hp>tLG{A2fI}5SZL@9Y$T*9C(3y9_r~12 zYsa6=TEBRg`%Qzq-O-3$katJqHSsqiU^j?&$mRC*1#a$U-da-gc`pN9*5O>IX7_3& z;K!oaNt~|=3*)>$Q=*8#JYTIv&BfrmTAG5J3!GP2Q7+Nv7nEIL8JeD{7yVGh${KdN zIbocPJDU)ZsxDqeU_7{Osi(_R2g0Dl8e5?QJYe|f?;e>!bNt4DzmbC^X&ZD?tKYn* z4d`8a{LhH0-Uqc~(>oF|#k2!2t;%BSuTnmALo*rR=SB!6-{XdhgK#6_;TXwoY}3q4 zQM6-}fOp8Gf+d0L({M+pA)#6!{49+FI^ceI^nJru0Jo>eVUHm*tDrXF6>8*%j3kJN zVVUYesp!StCwWB+xlGf&rlvA4t8eymM^LS|z|xWX4oEFPgl(tnaa#kn-Yh5pS;GG{ z>Szc?G*Z9ptYg04O4=s%w#GCwfv5VTt#iwJCy*Qie@^Qr3uI!KxJaRiuB>cGeE)e| zYg8Q7@6FPXeCGxO0#Nz%iZZ-DWj%T|zh@0&Gy5if1%r{d{4ptU(52;^8(3k@nC>utS}mDYVG^ z+8)l6G0howo}YVclJatM!T#~fEk$1vwUI0N{k%!KTwQ!0p;Zt?(@42HZf>p7=zP)( zFUAQ6@Jg*f}l!y*EfNT5I99&KbsskcbX#crA31A64Skwxm0Jl>JAXU@?6nS8a z(sPV1WdKW-X*{=qaY>+4F~m7-hb31hkI8kjvogqtQ#d_ZPn8g)mZ)bo%5ZylUzBS< z@rq{DQ=dn1s+2~p^quQNcUC7Xb(ob74QIvy&oQa?uo-S&y`aj2#xyrzbjX&Y&I*tm?lR>Zo4gCPnmg&Dc?*Ts zC2OCIV>bbQS!c`VOp9|c|8nIy{xHwIF^e@1(2qN;F5DcYeg(n)kc6MV3ZLQYUQf06 z-F@A1k;Ugqmb&m$FkJKCnti;33%C`VHJ%dT_iNR~p$^l5{ZPssPvl|@rAS<+& zX9AJ^whEEGawm21IMR)N3Z@jdKe!MR7k-dYJ_y~6MnS{eqsjBB!?)!sKLpdq$FMxA zi2xE)t>xYBYj-tt7d)Xi$nOy#5w2Wjxk2%MsSK3H%n+ZI$(GU?laF$?-OnEFajErR zT9l8q=E{ZGW!F*|aK^MgV;$?%Tto{VwT#e745FLzhPja0l)G9tl<}G#G3?_BK-v|D zp)T*v%>#@e*nexMY-;{a#%OtaF1u~=dBl3TKg`YF#^{`U+J3|10p?4Gylqw?B2^s7 z-E5t{VS2>(nAYCdmqDCSf5ju*$Kv>lzHeIO&Gje6WHT^P?2zX7%_s(Fbtntne?w9{ zXc6^();Fv7e|&I(Q5&=g);0wgJ%j*~EN}kVYXtyFkaSiI3+;XPz)<)gQAYqcC5fDX zvyqcZpf}P{;i!XeJX1z%g*Gf+_^wVv;%DV|XF0Ki1K^VZwpfW>EbY-r$F2`It;Z4; z&RL;;mT|1b%c1}_>r{G4Gtj;r2y8TXmMRYnN5ipLvwQvwh8NfM0Sjq-;Qz>Pr+|oO z4tdiWZ=476sSfgJLP~=wt0KzfZ21UUsDghx?(0o$C@++--#3gNgvElS-eHhT3o4B& z$AKJiK;<%Y@R}_bF_Vk*p?ytv7aU^Z(MWtr8vX6y2JYDHO_!hV`S5Ba4(`m%;1UhW z;M`uLO+t+TRBbHiKHJjr;1RIXBiudOx?cqIrK=~&?8XpQ;Ire;tYAc9%I$*~5$H8O zvcMEfDO%G+%3q34F!JlZpM~D=APtTF%ddu?e)=Xgn-PSKz+Hm7f(OQAP%VzP+3*1c ztR+AijDQD`h5as2-y(N#4$yJs*zgfa4Qzj@h)pwLlD|KyUqe#;{!j>75me<+xaL7) z=V?Xo=v5kjjm#iX5H=gcS(7S=f{jyLZDLxc){EjVG{7R!4TLP^2`O-#C$bdN0GA7J z-xUHbhqvfUC;K@7)1ZAg@WD?KK~_^YeGv`CXe= zY&-HD$C;D0*z8NvScTJ5KSsQw}R6c%NK!aeBSNYYybP>Ej5!V9;zTq{f7ZnO@vgwQx0Vc$# z9AFq9UmSjs8dLwGfG0G-!GSb+6$p!KH8+QWg9=~MX$I$7N0+vhPFT4uKH?iXxnX-m z_@gavSU5vI@eQSoavwqIyX}@p@4m#iqKqMi9#1D@oU)}`aw-POg$?S5bML}!`y>wF zk8&JyE`H17&Ge++Q_VT=qu-0e1a>F6Bn&vdUYI=zsPDS5TJs2ucvQe=!8%o7R9K;CjF5&(}+ zV{VzcslA^OhH=vj2xSYCw~19%y*ab7-?dLBsZIA>`7&fo+B%RnDi6x~z6CO=KbrCp z{N1zH)uE)W6Eeh7nTfvkkHu1sy?^9B2N*e9LL(0CU_fsk8+#!SCMpP!Al$8u| zy$>r0S@n+|;P8rSkvPV$`J&a>b<;E$w)Rr#UcCuBG)>d+4bL~3Hk(&OR;b~Ebk^N5 zO>?+=(^;uh4PlVZ*&UzDlB z2Vi9?__cT%V7vk|w=b%I)X9r4i>Uv1Ctjc73p7))jJ>4_#REo240;MetF~R(SgRUA z-j88wBko(mHs-EBQr$!~*_q;ZPMMEyuH$%dN;)JN6;lsi@YT~D2y2Sb_t|l! zT&p+$?F`fDE$fe-XyhUM2l48rn!3I28T!k>p*a1U zxfeS1SY@Kt(7yGv2O5SS@$bifof^5Y2N4|*yA%9(ZGRrDeo~Ff9d~9^ry6e4p{z!I zQ#;@w6Zr)Rf*Cu*7XPJCJj!_zys34L!n zDbtvWEF$MWq$qzG0h35Xx#O%pxccC!W4g~@GVW~ z@5emdeU%!u^H^Qp6eanAS^Rwi>m;3=kBVPz?s(OU2DL%fnm4rsTA9q0Phd^_dKS(w zo)ZWRMwvV;H2#$}RX{9kni~yW(nDyK-zxY#i^c-Hmle8L4E+8*0i)?>Oao(RImCL= zOY$$qS;qMpD}k&$V9U4iBWR`7Lze>}wVTVXG-=B)!wzNlb~|MHO;z}bww1|YtnW?9C=pw< z3UF;j=oT=#rzm!~HRK4Cs@cDyg6eS4P7Crvm65lFxTKGXVYh|fie8jVJl`VCcCtF5 zTfd75n((FpPe`&ElQWv|3%aL#&Tia2+*8#X7G0399K|GJE{|RRG6B8A$EmL^sMB8J z!JT5-`{_QlstOY2>SIIJ&x*CFCqfn`g4*_aHVmB}$g98R_K3}!;ey8HuxQpC{Fz)u z? zv;E7bn)ztXx&NSph!%SriV4jBo z+WJz|2zqNPW?V5c6kVM>|5|*=2@E4CMNffuz_g7EmJtp=vMn8`y^RgD0B!P+Mq!|- zhGZM1vrj7?XRVqk7H_216PWLT*EouEJ(R^rs{H%i?$4S0Mjcsc%+wa;m;WQ+}G36YV!Qg1h(|4;+qI)uJi)EK|aK|E_a6E&M zs5cCgZPnO35C~P8Nn(3p{H?xFbjL^ZLFx1@fMq`k(W3F4?wRKp2(+OY@9*UD7aj&g zF(fHtGu{kbip!P8WXiB>b-?0465V$g+-#k0MqfsMrSS!}J{!5P%$-SwJ?YKO3PZ+f z7PxSK@U7wzNJl{=Lr2sUP~TR+jEpz8qUKzOSa4c3V6vch^Bd;1@0mJ+vI@e&4yA#O zj!NA{Yc)}?fc!3#-cq3^5a_q6T5KsnL#*sSAeJl$#@p6z$kg-&YUFni7X#;N9`tUH znH5Po8^_I|KFv&sb(-RbWz}!yCSAY4Kc->%;AyDjs6w={Ea4y>C^|Sz4@MaHnwAFm zhy(sLId_M0Vws8*QQcW3|A?4fSRPK!ulew=Y^m#K+p&?RvvSzTeP(&C zfL9M62u1zXQ~rMsKqBS7Ff(>*KLavdydMtbohpoS#)(oDtoX`%I;iv!Nixiy`7m|-^Pa@fY5#P`W({PwiqiS_bMSyr80*jqReQ4@#~ z(fFQgSQ`fi(U`4HvT$UTVn#uUumEDbN)Rhxg_O!*Wm6N+#$H^pL_4OPrG^Im#3LIeY&fv ztNR38v`D91JtC;h^6o8`W<{Rsd#T8%nap==x&PzBdd;6+uO{l&0qfHi;O^VYY0ppr z{_fyd0EZzf0(bulxzP#5KX?Bb>Gli66NP4p<&T*5Urz>?Z|Sv~!4Upq0wXG)uVJ&4 zD`BA(f^Xr{K&+1s1dXjU zBq}Bl*1e6$s4on;BI7(VI5blnvdYRnNL!IWJB_>F2|%OYoVRlAfao+z0Tsl*MyJgG zBRc7VA?HrS?^MumZjxEV0rSwo4o=@yZ_k!rXz`KTJL5m~mj3?l+(>rb4)l_zU2NcC zV@pd-537w_sbof}>^377)DJxv>!^#tdC5emu#t~;`D54Iby4<}5y zS5gG{2FB@)Npjh(K>Kc9Z~Lz0-y83s1S7<*9G%EOBj#yCV=5*thZ~q1X0>r;`+3|K zb5zh0>EzcLVZQbVhqlp1#DkKXLBEJ%KRgj=oU-PWeSq|Xn1uLm*5aP4yEVfdCJoo}@;O(N(q0IP!Qc);>xJFi^2%JHjmDf_zxp!XISsy3)c_B=X+>B(&G3>K6MW3~*DT;|R4vqoNq{wb<7v z%lTzUSxkVx*!S&?9aQ=?0~Rkj#DI8&!!A1Tq%COIi+KD>WZD*7&fnU20?CJP%X1Eg ziTu7r{SUYbzXDf3wAx7+d{7++NZAVLJSxKs&aef*0bUKGK#aF;k*`@I4harevUyJ- zC0!;inrnZt%B;#887dV4NMYyVeCCw2JI->QPnsG22^h!J(rPD9tQe2yRJwKC;b6KQ zpGp%qv1GAR5t&iK&EsDFwX(j;7d@EfAa_+1CUG`g7%D*vcCGycx^_#Du6L-ECarK1 zB73dK0@nZuw!*Wg*BO|coTiheaL8>*wLQA46s{vN3e z(Ta%~NJjhjhqs6XB6^W1_Syy=aKuUrBkTenA3+K5_{V`?CG70Z?ec$`qo53bMJ2ST z#G-+4sz2D_PGs2XV2HePJdEVp{%&I4{Z?jVj7W0KKG&eVR&-=S z6_t4YO$n1LK7EpSy0 zPNG%I7FtY-LyThFm!CZ>DgCDWC}+9A<~Cqe?c^oSuIqwVY35cK)^&B-hZR}Vq6A^lLb}^NvN&U&%{0(FogNkCb(~i&uf_AMQf=s#1YuRqOy{(HR2tqW@pZbl3ub z>DFM#_kxcC5BQUm@2FIA!|X&7Za8M*aY4O2i;BYdHPCbNghAGd zZO7JcqQS*9zx)o%G`7)x!I3`bVYGGzPL}Wq+)c3FUWNX}wO0{(eJMsNwn^!@hb6-la{7DF?x!Y*3g)64u%W-Mn%sfP7My? z!lC_|F^Tok=pwlrFiAZz3Z)|b0_LPy^SG+6?uN_ud>_}gSKpBfMCF?5b18$QPPuPi z7Wgqccq2+ zrAD{mR+;LbtEUR|D>th)6U78s`ONmm%_|wezq_%7+M3Iy8#Z9BZb@KO6A@18i22W- zrc9NNr2vQ>y_a}?XI@|zE`WaYzqz_eTa}?Fj4)VaROqfB`wZY|=+a za|#srbAzmj>^h&uUcj*?wdS1PD17O}a#9zV3om{T?w2iP_8(Bfhr{IhGf<#}!K^5O z{d?@fb_xrT;`Yo*nZdbPE=63DxM!6xFf^W8N{kA)Snv>NdCeW+g2Ji%1nkj}^rL_uMP~@f>7%E~}O$Lj7xXgtO zYelBABGB+DqjMR+R~s;cQK=B5MW11@3W5=tPL9`^^)2*=-{{1DtL1~#{F!u!`5OT2JdNIFBC7)v+p`@Z5_+~o=QzIJNlt&Uzh4y`o- zB~`01-P-lH@2lR%`;QA2l}qvLhcIY-#|W2fFQi6VRe}a~9pC4u59d90K73j*z>FC_ z6-+uYJir!o;G%oH{>7vCesRoGq4|dM3#6|IfWSKR2va^?QHalT2OCdoZ4o|M!uDj5 zLnKk*?Or3x_O^MedO=yIg6J%vu>1Y#!O--2E5|&%*36X$IhQ)kQQvnkXzYCVH4^Q# z&B(0Vu*HaC>?ON*?!2t^{d-nbw9BVdQQWEHENazTrzQ9w-6Wzx?r0*${r7yt(H2B! z6-(xMYm^sXi~7FzeXPc?fEN|5V!pO}JUN9s;^beeHbnLWx-fHp)6nrO_+==BG^ z5j7#yAntaWci?BQLT|jPt>QIamqaR`pHpCTVi?C|7;8jsc(i7g89v@7jTfZS-e174 zKn_tKGnqeulR)EYj=PR{4a9Y36d?MT1!pe*;!;%Ya-YmFBgM^^It}+iptDrL{*bIg zj^fIH;x!i-ZRNnt51!xT7HridM*yksnPu`iePF;8-YyJ%NH1)|c;duypbiM9mnSVD zTb!L!&-K0`W>|QpJg~Ng5nZdi#ic=ShhzU}UV@D4m4RdL(?B+c6Q-pnl7o4-!6O!i z0!E|yQv~@J&a6!H*?k?)dtZ6Ga z2zB~1yf_8oKU}w6213_vSl0(!ysJ z$*!>dE4O0k2mBU;dTtsfqN&rl@-@$qCB>D;i(`hBMu=&u(_Co2w00y;Bbo5p=aP%f z6gD#i3H|5yoUu8w7IFe~&(AKLEAvQHXMx??@AZ%V1ZzDFz*{)XkBDVJgHSbm14!+K z^GDzK4Wl}fbAVQCgUWd4;6RA!j_*|Hvy5hY=aFd7zP^y189{{?PbrFDAIV0&-QlC* zD4(fMeRFRi=HDX((qlPfhxdk&;>u?8Y036jvF}Lf98B@6Cyj?+TqBPSr-Hxx36u2X z8+6Ay_0-)7YE0DRyNDX_Ggq58BXb*{PYEH;Kmd6xcYt-({=h=}XZd)2LZcX@V%ILu8ri!P6}ljTB1` zbxcv?_H>?R3~k}1j+CedDNx{QfwYL=d?ULh4y_EvJ+p;(W{W2uXU2p@Bjs=~lcSkP zH5>ZNMPHZH34xh<`#9bX4T~h#vbi13YuxAX1+?6O`CN*@0=X-9Q~Feyba6Wu)PZ@HU&Yxe8V~h(+zmDk^+<8qWa-yqwHwbBc= z#ANQvF8sU5_pB15k$!6X-7HOr#R)qp9*a}Gzo&;JM$`O6&kyXe@w1}#p!1Zf?b!KX zY3#hO8yME=5jHG8rZ_$Dmu#QZcalnx0B=@J7SzLmR!Z%l!r#=4(kp&zcM;y6SprI$ z%Z=0@z8rry*zo%le_z&8KfaU!iiT^W1X#Z|J78#s(YZWBZ}BT_C0p1 z18mq^aX~V-v(SEu#n66|vS2Gamdp)WWn%lY;m;<)S1>;UaTuL1*%J`go3>mjTHGBk zRZWH0aVxWV5A}3`hpLo!^LO>|FGh>~A;x7Z=0rDX8CC862}(q7ff@{CKwv})$auS- z*17S3{9xVG#fgVaF~P|v!-3UEgh8XeSXQl=zy7*MO8~x z^u;D2jOT!>dQz0I+1cOzD}Cuyd!zJ5FK_%eIqM?81i6j0A}JxMket}zADv-D&I7C1 zE|}qH#7tx1Xny;ct@6O*g8>j@mC#n&3&||!?T_St&jdhZW*UY>ai=n)bi7UaQsaMLLqwV8B4yr zQ1M6UMV6pH%w)HC9z1XJ?p_Q??#|q zZ~#LZiK@Q4O>7pj*f_3opTaC!u7RFd$cq>7)zIl3w~fgVrKq_PBhIZ3HQXFwZ5U`i zKK4>>ydaKvYuQ`-ASCIa)%d+o@Y8R(5uPEpvd+Fj?ri(p-kV(KVMVp)K#Twgf}*C7 z!?z~IVWB@LS6M#anSM3fVo_9m?7x~|@p_s*sq;AQ%E$h0!E40hbg@rM@eu;8(vj>B ziAXAq202qqh_g1(_DXJ?&c%RrPuB8g9u{`AVv?XGYYrIgw^=Xz@45KTUGe|0D#;w&mR&uRyZ}MVo$A0@)JV zEm3*2eNwUl>6agl7_sXDE_sb>Zfo2{Tz%3o}Xb2j+I zDRF3FO`y&SpBh+Z{*wd)vi$=?8*|XGEVJJz#xSi%QF6(slCj|G=0itNV8zp?8%)s4 zA{(F~*RRhr2CHw*NK*0tF5v8g9q$^Y)lz z24Y!%Eh+E*7+axX*YCAv-?Nx5Ad?q5jYjT7XvWFK8K7HR7~D7mh7>uBzrc6zZc`-Odm>!Y}%DWm-ss9JfbsJ&_O%d}kjQepDJe&kZ+*rD_r;lMBHtmFW)`ywiQv4+->f4SPN=wcK$P z(Np7O?hSW;mKcuCRa$@dRrVurx$}~NmP#6X)`DFkSc&SB1~A`V5>4fjnQvnOYq zg+*~RrKNiZ+4ao)gtVAA5%U3S!$^i8%x6iz*zs!lKE`ScHuxjy{`Fq+(2YaWB@1_( zmMdHd8^Y-5J9q{%a%P6A&#W?p7u;2XGHS*eWX)egdl0JoYrh}~c#bIb>D%du^O9xUqhu+Jl&}`kBaCtu$cBOX9Y7aftNCv@b-aHCGw<(<-&-+) zjqHn-Bj2dttyBtJd zKZIzRTYw;y3Q=gfQFbI03lqd=TFllZYVys_WGBm|p_@5W#p+}aIt?e?XA6zcXVrG5 zitpMlOgihHY4uY&c!`JZa?p7%&R*M2AGUdy3eDR4gqCXDrLIy=RFrVw;iPP+BqK9M zVZuwFJ)v#j5wZRQ`S^bt=}8{%+UM_9^O!7;{wh-1ozdKM+u9MYf6@{~>07&nd6IVc zinuL6qI=CAp<&sf|2RO+w(~+n|LBDx^>b(~#>KB$Zid_L)+DO+eh~k!p6g9`QAM$Y zk~?pV_gNZ#{|b(b(>H_R%ZAeY=fY3HM<0_@LL&#g3`bGjik{*%1p@OY+Sy{yLvm!T zbAG0oOuISxd6RoRUw%nN%es9?#!eE-p8{_lw13J6_oYy7u{}4Lr{b<<@Hi7l)xsT~ zA<1ut(&kffxIo>Leiqu~x0ID)MMl}GqU<(Q zT)CDtNm_>GwG?2KHDCm11~*7PVmAm@`6Cbt)EiJtXkGFKL9^Tbw26u5FOGwzxoAv$ z3DD2YtFne&B8xR1RNbslBnhpNU;#@l%qo0iT6mNWxcI%~I4nGuQ=2P+IwMz)pAUxA z^8?D|F}xtzi%RO-{|IfafAVX+Om>wcSCa*BB~~jvD-fNECCsLgFl`k;RJN^!PQv^b zm1Za@N<^>`XtW$|600ok?1FSw22{Fed+e2c59wJq=-_xo8*uwH;qP=V!v1LTFiYxc zED1xZ=wRsH)Xk*IWZN%g-o(%m%^TTDU%mAd-wK42;U~jb9~o$ENm2>;3IuzkgE8~V zcK$F~A8EB%vf`Jm1@&6H=H(7a^v^Ssbbrxx^Oce(hiM>$OjC$m{LZJ-1OR0#-DHqm zQXgiW%ii!6ha|0qWy^+mBnF{Xj;p0ie~Ox#b(x}C>POR)&mX;Ypkc6*e4Lo)`|7wA z`?vzbZ7#j#NVn0BS$9scs^9#z&W@pjKXm*b`JLqyUOU#5iSf(>fNcF5a|S#p`Oy&n z=|j2L=B+W?!DQ&tyIPACQ5&CQvLy2!Q%ow4qu;KV#E9r;qx1G{F>g5ZKJjxgjS5Vw zf;aE|K1B{?5Kp^E=$*5P1oo%Qaq&12v~mSS@{*x+=G^PaSsLHXVJ6n1}94=DOc znc_ZNy0c+>x*Xeur%(M#Mo#Xc>|pm!Tb3r{Sr{eL!!`((%SMYzS^7&PM^&>;?%BbBZGWW0Ej^z!J2#>2Ga&dL!^`vhpgU858M|7JETL$G^ z1^z9=SQBi!pC@UAthI%J$QH^U%6KszYlGZC?7vkKTaEdjM;sABcW9>eT=?vI*(QWM zVVRl&zK6&Iz(e9>nrt-8ve^s%sE0$f^@+Z^DK?hOlN5TjEm$9 z@5~S_om+r;`~59dEG%3hW2}dFdY1!xUXL|5w0I8s8>MLhIu+j#JUm^gxZEEB20d7E zL`mV)5+()*m2y$Ui73_RRiEpAxKf7Th#TzlVd8+nXE z+bk&iBb4(Ar)aEG+H-~tK;_041ccGWSqO~pgf2h&>jXqT8t4RJ*C8%>moIg7c`Qw~ zoO*Cb{;>2J^m!Xe&fIZr#q#*M_rYe&)6?8mqu~v@#f+~oQk(?}GqK&PKtLzKoCZ)l z`z&cc;zMMqM|hEd*jg18W0i@J)2hEo&1zi(!{nlqDaOk6#(1rSO29nJS_HW(+)udk z%Smka_jj1~)Ks)O!m2ud;o{s4Cer2~!gom79AThSl4~&yc#4(y`T2#sap7g3OPvU9 zl{ZpP1?8c?6mu#74^sKrD2qxq(a5I;#}f!(tu*)iH_9_a8E1=*-B{R*;x#^v_A2xpbCZnX{&S@1|sgW=prhl^-(%DQ;GcX#S+rXLlbkye=~6k&TC+nsq>L)V%DyRu&8JImRF6; zon7?84PCWuCLM6jN*}v>z~+0dC}(2}Y}dSjaM@_+r#+A++AU%}9bJy$%ZsAM%?Fr4 zdujpvn7^$Cyg3v)8qnJ4-vS-ecZ(s)v-@;K>FRft(sb6dq^C|9q$%XhawLwZqh>a+ ztP?M^rOC7cNH@}!DHowPcpdHz`;r4s*S0PK9L884_})JpjgnQ+DcA+xp{m;X6^h?U zbWIA6YJhe6exkDN)e=W-;~#F0M8;o&L;|k7f)Cj@`UtRzNY|+J-9STb72SP)dKC&I zLU&GA!W&MFp(12r8)Z7E(l&b_5^U+5pIP>f`;~hTKxNE6=+OA-^@yT=L%F*ab7g6s z;=vCCx}%N5!%Povicq0ZNDo&g5VpuXyno(-{BIXP+r$h{BW(Eh&nyxL+X>5&dF{|5 z?e>H5j+@t!8FulMf!2otMb{H=!TEMZA!>QQ6!yiV z(Qr^8(37?9!=aVZy00p%UYML)!|TR7YH9jWpLkvCSkZSHG)Y2Y6gvEjanU5UBKwlF zqpBq5OxbN?vqa*K&m)P@hhz&8XuAG%FiJ*u&`vdUXty*T62x(O%e@k*=Pzkw57LqD zomg)LYmg@cAb2I;wR^C++}Zm(trXk-NusZ@c&Y|)oztV_wxT4caGxAcOg&Zq9x`0b z2z>ZQFf=siDI4bp@_*@>lsS7{)VIE(GdLs^0xM1^U~1`&gCl!?mni0;LQ@fL$yhZY6(goCN(0KJ#!}4cNpXN^i>c4=Dxp06CL_3O za;5iB&&RANwIXFG{weaY4*f?`9j}&dxc5B?Qwc;+UWUzmAkx(qJ$4%zB%{2KMs0b*;?i>XTaY=8u>o%YwpKIYyO<+tc$IDCl0sSdmacPcaoq8>w`6ikDSKf@aOMWaD zxMaZvK6SD91N)Tv1GjCcALh6pG^lwM585dNkR;ul%>#P=zBI*%5?0K0qxh8wVAiQu zL${xwzrkdsu_kg!Aj7y z^ylBk5{q)g+nx%5H&S0hD;sI#S|5y$Pkn15Yk$br*f`wi4Q!MV z2iRxV8?YWQ4No&xiP2-3eD{whcv*Ox>%8P-*lAe;lv# zs&~G;U~g+9i!E#GXAB~nx-epPc;gDsT-n`g=N$mIhkrxKM@%+M<4lNSL|59|Z*sh2 zs(rVDV{J`97d-&!#;%D^7}M)F1v&>=aG)8jxIS!wYZdYfn^USZy4dil2@L_?Ei{_# z)iGhH$=>G@r~tj-{hN)xcAp?^oz_5%cL-rp4k<*RYmy<{^{#%{C0>Ck#v1ot<@2rgNF|K>tHIlEvy`%%)`D*z`W1ezrWY=edF77$u>pdy|2vyl9{jPE zVjz9g)QT5ZQSQy$hBXfh{!qoczNYh(`Wf6Jr(f<)d6r}fTM*y9-y@sv|I|(LQu`4y zZEq2|7m?|zN?DBNiL!G#OWjS2S$9)Y>G$x4##{ida^tq9l&6zb|N2_DG3uqZA7Emh z#ZOD>u6Zv}3BQ2qp))(4R)+`h_qtd9?srOw0{r)^0lzrO=o0I+el|Uqcs;0Fa;11NQ~Uapyw@Gi%Y@bk!47%^{~cw4vp{L|gkz?7hn zLd##g%hWfVyGG-0-q&e+>ojqV*>rp#nbKKm_!7KP6xz;>Y3uc%hg<%LKsiyBa$Trs z!STuKP1o=B`iUeScND4ZhlU@Q<~WBN;I5Q6gg(FAg1e92#_`h7V7~8t7f?otba>3D zbxb(U?2ro;ZinzTt&C}17Mwc)#Z8vKhHkSauWgL zc%~Y=zE7;jeXA{0M0CVZMueS)T;B?+xMP1T@MjDM;w8(p_spt0 zJ)1qB4bUAo26c8Rj>iT4RXgl4rA}PLc{lquh6QWRF8Y}VR|l?d?=Z?1uGJbH>ILzb z(vM>@@5XZ%auyR=|D{pT${p7K=$6d|bIf#LqYBy88Umn`WBxa3QXE?URaw$M6)A52 zPhM}p%?_v4t3`a4BeDF!bwZq=SZfxhZ=paiPlhwB=)4 zh9yxqhnq3UdV~N)q(!YS`_B6vyoROuq_KHjg#c{{4J?}pRD7%@8R!=YI(R#D`aa0Y z*P(25S3vuNH~N-HJzoLsS;O00umMxHukg5H`Teh5azEq+l9Z5f$5JmGU{@U9mp6uK zm0j#0Q}idka$Wk*>F>QLBAAc08U@-D%$PVCL032=fT|lwD9*P>v1cvAm#yBz{|bEvzHeY{iK=;P@im zTRgZsd%>kx`kx{|%c=XZ&b($Z(_uI=Y?Nq1pn1_=k>CcWWo}!FYU?L-Cf;U{jjFC947n(&y?3OLlDoJtMQZaV54KxXE@M8y0zwG>BOhh{g!r1#*unGsWIdeMTZm&ZqC)h_{xYJn7Ki z_w2j;(%n{zyAF@iNM%$-d+V0+GCgOadbPV=#1$YO+rj^&wa|;-z zIPkyTAvrT34UoIp5u^c8N&tU(eFT74FHGqtNI;u9&r!ci@`7GTfrfQ$}DIttn2;1BrcE>1(!uiBZn1(LtL zd~*O@Gc=rubqDuEQ}AI~p?9%jxtEFkA$C#x z^XBq0V%O=z*eiZqfnwdSuLoTudrKK+yf1PMEi^N{u(dB9oF7G*Aama(QvvKboa|TW zOKMeUBIS1vw3VcM+1IKux3nCw%}5*JPf9x8P!H|CgK#tnbR%5@kz^Jsq}O|mJLJhl zY(w4@hdpZ)mPfzoJlyHIILd=>dh25KLk^ynurt2}Gd8qOZKl_QGz9rD>w_Lfx=B60 z+9(p##9{D6u`Mcp4`M%etKc5|RCyqKEu^d#q8qTOl>zbXr-dpVN)AN z;kRh(b9IDQ=7|kZ_ef`84oR{QKzEsOLN>eTaMYl9sij)8u{+$ZyHRFyBcq;Sq~hP` zKNbFN&Cd4503#t&=hHf}MM-FW6Iy9q+a-0-q4DMrJ-}`pJN(zNNk*`R6-R1&7pv*m zG4&#`Xo*xfF9q1S|32MHMD6)7)J^2Wk{2!o>mvN%&H9d?cUdShJ=VAGpvyJumFvLy zYiEjh=G9w)ey>zYZtPbt#j7B?r~-sreIjy;GXOV#jsgA08jPf!Fc>loAX#FfGWGuF z(6}vt5m?B_4?*xqqtD{)M5j`70A4uQV{sYaE%?*GfE6Een1C2TzC8%LsF{Gf!?UX# zZ2hP9b~Z=E*eGa@j(6aD-PR+8_L3Pze8av--H^3h#F>XS*`)~gDaS$4WS#Bv>_zdr zI}q@>p4|MeYkmt~Zc-{o<+{Lo!bq7QIfl4!iiCY2EEfwq(Y(>5n9$JnFWWAzv^vGV z*{Pq886pb-px2uX>F@7i>XHHVyx%WDQ^>s@1~I6Mn(b+I%wjdUl>+)t^PJICO+yje zgl!Tz(CkKj-x^k#(nI$#g2y|ytYUeFrmQZb=qM+}{gPQ8<6Y||9M`-J5=zbHKqvvv zhuPK9HhaCUXI6cV8k46Bm5bXOza8Jp=xb-o%!ab3YyY0;v6U|uWu+Zh`-%K~h#Ic- z=%1iLX~~wz=(ZDuuwzZg-`i7`G&mpLuBd`@y9_W2)_LHLjJmWPIf4UA*AT2P_C{rl98~30nCbszE7-LPA|E(>PXA)VoG#H^C=v zLHKp{8Vo8BZb9&Xsl7|$Xiln!+^Uhy@vji(r7c8|jhouf$SzLnYbk5rHZb_;SB>P> z5%PyHhUeAK1mC{iOF&=rd`$ItZ|8Mjj+>^(m@@T)9B;d>j005}H@}T{rm@iO zewy~M`ad1#S1Fz4wQ-ibeR233P=`L=pu8G)m`1SS1%3ib5*fZ)1kS%vb|w#>3KdB7 zb{>hYzG_U5!(AB%8|~dh5AHi`Y!NAiN-FNv2sCZ_{x6g~0)*%BhGCItA|@7CqWgDF z7HnnvQ{Xw*+4mhA`E@nWNim*@>io)vpL2f}kOix|ZYR$>7X1#{R6#sAm^Pg@32SOZ zCg4bs>Q4-Xj2a6R+1XY@Drz-wO>OJ#^M|!@ks$EXr?8~F1>^wvfSo|%n=?~{4oCRn z4kHpqtsQ{1V!c%XrfP_Pi8*=LF~u!=La6T&;6@(X7dR)+OpWfDki^k-qdl%^NGX4} zwB~~q`ps{lpuf`xRloC@RZl5c;rojn&U$=j!>1P?G*cZ-5LWifabY^;1iMs*6X-t6 z885J#N?WbSdydHFan8Qj@Er!Xbl8b-x__TUSR7`#&*S@TN=HP#3y1l9ip46tUBkcn zyUK$5nP2G2>DQj=g5yW+GDnuzo>#>H)d$#0X=G+&-aTIL!GDA&uI2IaaoU%lTCt7f zNwKjdLxl*_r5^pdT1@M%W8t7@gJ3NZ_riC6Rz;@~vsu^!#&k*ZJv_E_Udl5y`+Dsm z_InFaox&SSPerKk6ZFaT9xe+9BeP^d`qU15G0y3^1PPPejj)A*!8v=a6;`?>=wg3G z*zf~!&S&m|g@(XxUT4myR;wa&;tI)pZlu^14r0sT8)%mp|082Ri&|O%(1X!wSJ}(0 zO!RR0W3JLj&Q+n>W!%6zL8#S^V+}%>V`&|`^VYC$rmAQwp?L54sg|DZU$m}j(n%jA zuLF|@YVh?AYHW|PG&yyxQQ8o_ep``0eA35;^)^j6;ALXbYW`~OxH4sTGX&5A!VC|0 z^l5nAk6oKF0=z`N|5T#ekXIp7Lin%5JHSbSp5%2-1gJ#0^G=M)9f+^U5s_cMHD?~1fFMyGM{Yc>?T=qfwv$6wU!+XmEVb3if2kQ_}Av2vRipV4TV8WQLit&ym< z+FO;2VVmJ8c^G4#SNVXQ7-8JGBh~43+ba>zAt73M%Zl6$Z%`_ewsXo0(6FT!kfI|v zV?8{By2af7#)z-p?pQlJ@Y$$w_Fh8YT&Vc#(g*LLDX%(eE5jDHA%QYFF3e(U+I5b_^Lzd`sHvt@6qF=V*{2lg`$-)t zy_PGkxV_b@)DVN8d6lDR^d}Ck82`XEkyp5;j{u6kPH`Q*2}28JR18n;=Nn%u&A(-M z{1ZYQ?|kO#FR(DUX^iqEShZ-m+3|2|Ew_46;sz#F5<=i1WrD>XCP;JPzI+um@5Po< zE$HhB_N&-0kZKUD7YWqIOWErYocrC?$c91Mw$}e8`QYMnTFLLy^KHMON^hLMS%G>B z#8d&HC}FlIZdP z?J4Ecgiup6!t9@KNaa7lRgd))DfK|UbP;u3o91u_`%>{c#NE6Nz4*Q0Pb3K|Qwj(^ z<*J9GFuI>3t%1Gyvh~|at}6%XPcxZ`qd*ug?tYzz1OT`jjZ#4qYf~c%h1ps~!`ux9 zxH><{zK(g}XUUXAed81clBa!wB1=&9pNZ>%BZoq(&`Tm5z# z+$)yb98o=jatj}~w?i2(;R6>0@Fb5By@NeeOKEoZ+r?t30WW_NdaKOKUKnpMG|UaE z>dP1Y%tvTiycsS9sLt_e#mtkWmeAf_%OXjdsnFchOBz_TTfk@k%1TVo z3_f*=sB~DNJX%&=twpV5axjJ0cL<*t|mKz-$OR z_P)s>vKg)Dz^^VX`?Z~sU{jI`UZSht-#EOsbUfHq2O5*du;jno&Ha0%WZ6XkF{*#j z2WjFH27qa2;%x2JJ2bw=s$-6-&k%FmXylLGCN*fx93IYSf^(bMh|-IKT~;@KQ(TE( zj`w)LNjYoE)a$5r2>U~>qXwvXwK=_q>lHJxlXkr>)cS=H@wLrwWV@a;VZnN z*y3&DZan1KasxrgQYKRD^OOFecIiPmE{c>z_i>I*KU=i|Qhf%?Hjr(Ep7Dt2xO@;e7w^6u@k`zLmkZnTdug2Y2@~eDltj(C}#&;(wKj)Q0@N`@%(nmP& zN_-fPJ-T8yjP4b2e9^b}cS?S3RrbU~rA1Eyg-a@+-oIx6*rh9qwiYsB_=9Z5>iawN zUi1u9#ij44oYOYcW3A1RR(uJqvL0s9G9p%TCTY7gznfqv9gA(rl409Qp+a?qYIpof zpoE1(btnWdWNulJ#ny!KX-7G_ z+H;LTfs#h5pby%u7dVYzy<|-k!)tAG6dl++WLjJ?LYgzh9n|gY)fCGo-od{u8ofo= zyDNZ3^<9-f=*31Gs1M`?g?<*o}{Sb zVCBzzOFN8uT?S^msREgEgXqZU;ZP4EY`8H(kHOHoJDNfyhwP%9t;gp<=(jYy6B@F5 z{N8wkoI2ZC#NpB#DIa*?`(vg1t|-Hi@*IZyROB5tST2TsH5B1{;HrFR&_cx=oyr%i zgWwbmt+^?1*}|S79x=#cL|)dC#=LNlo7?w(+ZVkV-|N z6n8`o*rwoAp&K{7iTTxydjBybsx&j0+odwAP9}8=6J;Ba-))*_@5EF+Ythl@%YVw# zg4t2|Ni2)pKGK+cj%7MY3w{U+g@}3BdiS$Y`5>XG#u17bqPNJCf!^Q;m10;9p1bd* zT1vfjhoS)M;IjfAqHryCRAng?l4QuBRoiPMNHUS&4ZCDG$U4a#G! z-FwP{X+sk)6B90HItreYRw}1?v(-6DEhFrQ$?HYi7!ut7aqOmSpjLds8Xl|pha$cG z|IIc4J|?A(c#Rosu}#O`b6AJ26gAJ2(qP%uRGr{I{4!N`Zf~qexvHk4f3OBXZVu=m zp@tXhyuS(K!_ZLv{zmoczBdqO(R;FEMH!r;7Tna>7ebA*th*VpU%}r(3KR4-A{tHk z8Y2z6IZ{8ZqHp^_DVzi)sb$Lm9Yw}=r>bo^EPTAh$!Tw|>d83qy?CC`9d6U3>h;jC zdkWVCN#&_F-XKQr$%KUh>7ds-krXx z3ZplYtrxTKi64S0>v`boMf$1TE`ALRRvda$ex0hoJCmfCI7=+*fZ(NmUuU~W95677 zixiyYreG98!PN6Yn;as8wo3CTzBwejIqBnu&{DDl zIiKGkae@IqtC!SKB!21`K4FMyMQw`))LYmp?RhiQP{#see3Uisr5~K^9}Fo0E$~L% z`Fh_ zW5;J5)j`xvcuCWZ#`r-xEFE3T{*q6o^OY4KFANPg!h)(BtL5t?m93wI@*7?Bs#^P< zCg#AL>GAf+`MZmuyLP<0qGCE;5kTS*Pox$q><|wkb>9zeU}JWokBMCj?Jf)SFeoPxf^9933ZvoU=67cM?S!Qudc%v(3Csg!Cpp5R3aX z%m6D&V1^yajM5=We{PGLb#*&Kp{8A;nL21%fVR2;QvJa+d7Cl*EnafE5HfwtpqN@` zXbI`XOejDI@@QOyPW%jMukmp?r{rA4DX3t>ajA5nD^bE`1gLoc>v-tQH`)KFUKmW~ z>tQLD>@S%D2F#_Wx!mhl5C;JPc)vp)IINYPIQjq1^+nU4Y+jK#D{w7?1C5$9SKaG! zaBKPfA!?P87o&X9waL29Y5e<1qA2|+g|4@O8%ET3BD|Frve;z6n}XLzrP+e#DMgU| zaMtS1fg+{!&o=lhLVU!TD^Wo&@(r2&Zj)Lwv}+r!Kb}$v0k*L5<6pb;*L+ z!Wl9AvKUWI=*sg3qJ!=&J_&gnF)|Fj>--pSlnn7Ed(^L8HmzHPd!1i3EM&|!-?hw7 zV@vMY;H~6|;=@Cz%>aF}>I-y2w|)QwKJfgBD#-Tgvg0Na1%K;7LWWa-mSgHVblA*D z_vn4)x3{P%zBlzDvvgTue>}F%=81(lkR`|iG0-WLF{ge)1D)X3nW|7e*0ZR2T}eQp zJV#j~t-y;K*hm{h7`%Q<(zPJ|P}F~9+3mQ%x`mZ-qnK3T;ZePIiPD&>8b|KJdE$NV zm8hW+Z+kAAZDVd&OQoZ#hrO`F#TL(#7@bO)=G7MA1pmJdPc~rsq^Qy~xekv6`f@lc z(|0l`K-8Ae6f$6iy~6ddRu)_Q*VIb^g_n)^H!qZa6Vn{6`}WyU#(xFQ$47+H^nC(B z6Zlgga`tx~0cd)88E&x?-_{%`zZVmJ6cpY>&UdRwQI_17W%kvb`P)dk9M({yS()Ky zl?L1awcoqgSqB;W?gjCLHjt}IbIl7O>wEFiuXxNU&EsQB9nu)0;(YxkGos6z1~g@ki|x2B{oT>U|S z-0A)$<~UY_vC4Lq+jAKiDQ5bauHm~hMi`7wHrQnp)8QMzb!U=}p3__c#<0+W*a0}9K)X(+t_|-dJ)j#L#r}5npc2!p^pyJ#1_#a+e zmT2h#VyczKiPR1VFy$8AE?$D7%YZKSU ze~i9h6@Ri0db;4P>za_Q{PX>iKM#@C=let6HjBiK6h@zMkP3D;BteN?21cT4gz30m zr+>(=H+m~vyCgCnrcI*m3|j6Ms@LLSkdZZXeI^ZlXM95r0WavRPnOZ%x{6^(JaP%R zf0qB5BVuA4&g-ko@in*X;Os!q^!CA=ztU1i+St{;lJmY*q{fZQub<4`eN;<;hQ~F| z<`?rgPn;A^M9Wz|l}Dkn1JEB0$8N?V?=ie;YJaT1A|Y|W*!P7V85OX<20NtO1`l7R zk$!kwG56(%m&A}4cnr*kQ>O68)2cFqCG#|9Oeb|eCj)&AP22qDuFDvLW6+d%iMQFCKt=iL>28SQw5^9+T zg!sltQFFT3IKnBRu5=3a`WbwPD<*?{r=pR7;UDNZqZPV_p6s4OrT3y$MXR zAA#x{XRY4;(%mn6c;49+9bGSZ{f9#=2q$j9wcp|G5~5@Km`uw6e&Hv?U zXYXFoaM|<0;39DE6ArFL768B;u;(PL+!6Zf0}thsEn)hXuZ@3z-^<}=?d-(Y^`4~A zeecEAB^s!t@~5MJ__ER}bhj1kQf{=G#r%aUjhh9Y{{OJ`RZ(%STabYO!KHBs?h@Rc zrg3+N;1E2xLvRQdGzsqR9^56kySq!!0P}P1x%Xja-uk82g8rfh1xQH^#T|7id8OWFP}4CA;W8uD> z%Tf|5{6XjH$G%$DPkclZ5sdBD=*}K3Pu9J1pswV0V^+$xL-%9&$l)BGl^!BEu|w){Ej8_ zkW%C7C+2k-3rh{0{90A%A4VDc-zn@u38P%bngVhmDz+i4&{#aS7o;SQB&t18ZIJ2FQT{>iW1%5jr+B8 z{F-(r%C56nOsnz+{qXR9R4XYOD=Z4R^ZV3;(L*H+r^Fpu0sL*-FMO)r`aac1Xe{fN zW=;F5{y}y+wSx~dXrglN@W(C$VRt7F;4dI6unJBvkpeM6=v00#1t*i9e6CL|8=9h0 z<9WnqL}qhFA0rEazyj*q`6-kqT(ocr`+?@~(E6~T6-Dm#o~=?sy3(t3h3?k{EusC- zg6fJGYm!3TW?%t%L=2EeNI&{R#QmGPjgHF{-eM#+@S(2!{z&doWil4Nm&QU|Ade<4 z*VzuWx8b2^Cx7cNk5rQ_@Q1qPN}sGvrzN;$0s~%x1PLq+f&;nOJL8}xmjqjD^z+8V zK!<;7=`z7xku5l&Q|_!xP_RZZpya3EClVq>Y0wvdl{Sl^C~T(vDBpX9(vZouLutd9 z9@O4mk5|uE;F$!CyM*txLrJLSn!oTdwrY$tTZZOQEyr|q#}*hK`Y%iZU_IpJaID)Z z>P>iPjsZ#PBYSXz=gH$!sLRe>q0+KjCoM|?Z6r|ThDieWE1ZU(to45e6s=+RH$0^Z zVdv6V-zQ@r_n|pDeJ(klMSG-spGUa9JxA_d?-=+fzL9NG9g9O!-ts7T=ZGq#-(u(| zQXWIJZPfH*o;87lpB&?Mj3~IXNO?WEAIF}qZ;t^Du2d2tmRvt;BlLdg{%g?_IwnT8 zv*+d!k-OhUTR!vZpZqkS8&Jbd+LQfNRCi{M*ywpC<9AGT!R!qGg+T~0NLbVY<|f4O zq=B|OwSaUO5DL6w9dUHiB=(FMHXwFZn?kvLX@46o5&9z?v;>2B1PGdflM|tHFx2J+ zRGT-l7No7GL_tZm91-7K8n7xm;&_N2^$XUSEB*$FQDLhgiiTkQ_-@4Psgjw=f)of$ z^d1aR5ZOQCh0W^`qi}6E6yEt!q*w-_xhc;(m}PA9#(MoKQvTI=79j(%>XLWgh%eKscEw$I@3l->ky`6Iq2mFbhU%FWg|ubfc#D7RVTxd0 z`1jTHe$^Iy@=H8hvVp6zu_wLtjhAH0%TpOGqs83SiteZ|A7+2F^y%v0=Oke1?p|k0 zADnNccmDnUGS&d4`zc9sbbpxd1mdR$2W{dc+YgSzWItDw{S9?C&zqg7bIDUSPned~ z!h~C!pk~zhSf+kvYPk`N6Yh=on80`>w%nI)@c4NqHIsK&o-vQ~c7nJozO^djlC(;= zYsFUAZ1v?9;_h$}6?TxUtp@o#GSuPxvvB)48q<$6H(0Uz22O7kQpM9TE#mfic3*pv zPCpIS(_lHwY5;vEd@#W}7{boQG!Y4G0)_qsz=)itE3Zk_VtQ~LDr*0-3;aZ@$Lpaa z11hZOJR;;?^Sk1@zYYh*vKP(Xlm_5IP{7U@VFM!BIwj-HOsOx!2s|#H9Gem8aL0AU zSoeo5&`ASY3Dm1$ZtcUpn!>i~G|hU*LBKcG$zmwv&?nx2@Ig6S*BgGdCI;hk{wyd` z+lNQ>1zs}Kq>$+HK2q|)h~{L4dU-fZglHnxN)q4OBWbB}4}{Jgn90FOPS}BAbC<)W zc?SoUba!inPbYuL8J9pFf|T~D1Yvk!PhIrfu3&4H(q{NjTRU^F)Klx5f<G-X1hyXccLcKM?w?7@*uPbI`Mx?`Pb#phy{Z{XVh8msF}5>gNrno>BljF_wf(D!h7`U zw>1M!k0iIqcsn=F|jPM9CpK88-Ni_V}zl2tF%uf73&^bHMr)pL* zhJ6kbJ5V`f_XS-OBdBqd^$m8pWlSA_onoX98em}&V=bLCp+fOlQmW9tbm4(*GJonI zm0?#FzG20UDj#ZF&>u&cHO zL(FcOjuBq3>7N|@ktL*uM~;1Of>hk6tbC(wWmUZOHpR;Nnm^;^;*AVh#Lx|%lno3f zf+{6(oFR*ih=T+AZW;#^ja&p6Jjm`abI2UzVXxYnX}%rDZUl|MWQyi#*B|++_{`n?SK_Lzr#9UD7+TphI2ggV`VBf1vi2a z>ou`r2B5tN4cRn_0S0ffucMPUp#7ZuaA=vRUTOB zVgiGrUMvm@XI4P}mo!o;o|MC8=Y!gGGiU{kX!gdV=3RCQ=@o#P(MnQh6?}IaR2{aJ z#%Aj3tgj(D8;kap_MMTH*zc8ygTGn__4QDk?AOHlEcbFWyf>$G^GLhuTcI_$A|ii4 z>Dks@v%LD7=Qb)DScdbxf2_MhwZfh~;}Ob2o+?S$fm$y*Y3yCu;8QH$iCXbX@OTIE zi5#FRU|+YL04+goGrhF%j)J0LJH$cgE9xNNuSEgMp8+CoK`1EGV{kDt_if*xSf6Rf zTwo{;i9y(;`7G2cCPb~s?BzEq92>d3gCn?)?Cal zF;wn}kWndH>bam*1ozuk?gLepP{>VEVept4i`-j~M;YSOIz(7SV*$UeKghVrcIf#q z0foS|04id;N_FAmTjOkUhb`DCRyI!D332gYD8F?{Qun<#Lz{KPqga8i%Aamp(gHt_1 z;L%J~Fi0-pHvnysi#fiu0A53pa38Ay0ULmC08JBd{l%g4Px)m{LqwkAO}Mm%fX|NU z*P*YXR&{U3F!37Z-XwYd3N|o&Eb88LBm>}4OoCyVFz~$8L!pLla4L)(r=ZQZwz29L zW!iZOSjCIG-tqwV(GTJ%nV*>UjEkXBUcEmdn%l>;_QuXBmqUZAAON%9O}+bBdX5@PBu9CBaj zAq#EoYD7CTSq&e#Wt*OmLvnBXx0hBwUF8Cev^kx2lK+lLEdJi}?a)Y#R7XoYOP@C8 zHy_~n`s+a&QwC^74Tcybj;oV8y6JO>hAj+X8Y_y1ok9ZwRe6X_L%v7{ba-E5!0cZ| zD5KOqgQIydpw2aDoxQ;tCpcU6j$em1mc?A2FaT*6SrmNo4*r9_Vi7d;WotWy5nM#K zLT5>aZD;kLUs!U5bUC3Pso#A4vh`{8fL2({=m$4sg*_XeT2pnA#E8XBF??ADQ%(&a zU6S>Zh6$qv{0r9Pz{umypcl=8wre|2pzN=1MBzu^kE37_p zomF%kt({5227gNGy+R!Si>mM=H6)%UkBn#FOG7eI$J*)=7^BbfFb?geC!0DJ*t7^% zPi4RvUOH1YyozmnS<R8eQF_D6&-9QiRG}ukubOx ziR^PK+=ly6ixw4O?f6?TtHHmAY;PqbL7FCe)gUrr#kvZZ?%tsNpr(%RJ{vXgx7Xv7 zu0P~<^`h+r==hII(h2%TGxJ$fu7V2;{0@mrG|V`KKogkusY41v2y3n-*vNYfnBl6) zOz+}VWziRs_?XhW*%dAs)wR%%0%u;>WAQ^qYo0M5m4-t8tan%cnbyR)F6l>Cklj*TEwJsB$2Zu2_p{>h-3o;CgFkA zQ;sJKTX7goZzu9#s3)Hwq)aG|ZxxLAT(NkU4blLSEwig-a7 z-zRvq?7FeXN+EUzbq1J3I7f7rrQAy;OT?0Q%>iHzL*L^!)x5Yu+K%W*v&4rZKVXjQ z;BF(k5^LW1_g5X=Bmu)qbJ;C&XcW6vgsM*;M2tHKba4roM2sJe??JIzn)=b|Xk+3& zwkTkeO_tLK3-q|jcJa5v^_a+DV*AZ^ik}>h_q-HBYKlQ7_U;6LXHG4T9pyF7|Asso z8HIoa(I>ab z@uDk}x5;Q3K}M_yCkX^vp?pY`H;MEBZcn^ya{{^vqXOvPe*F6@T5yUrc3^e?tL=zv z8XVnc-_<=Y<+pOR>xJQB1Hj))sjESneeD;3p)f}fP<%I~ti?@G;a3G~U4J~o!9mK5 z8^w+Acd}(#*1Qe%%_SYoBP2!Zl&m2+X&eZtqi zhLx);Y-l#208-CeFN>m+d)o<=Q-g-b@IuMx62nT|-xboU?A-mqU69xROPLUy5n!LR zx6vNS)on+k824Ai9|v`?)L#n@T|c4E00SSaX7rsCEj;AJ%DR50qe`&79>ps4KMm3% z4FKh@TAI9H0hsiIL-OpD-0{=dPG%uEBgLxVgHy~I{Wb>farJDp6~meRRCkgm8RU=j?pm+NtV+Rj zs{p`zie|qt9>HwHJTynIxRw-)o~yu*{Z_FlsYO!a=YjRJFYBjER})}Jx=W)G?Oxay zUh+HK2Q5rh*1J^QIG#&d_Vy|x2Enj262XWF{i6imRAPdk{t1Il)0~W*SrW7UdPuQ& zu`8#VQK*17NGm&Mg|lYqBqHMu3=X8(}D1T zAin)}99D9VF1q72VnQD{=7*90o#nk5hJ~@DFZ$}=&+Iq5zoPE%+cH`wG4S%iTWl~A zEGfev@G@?UFtGGP{6r_PSWyr5K7%GXEU$b{*T#Eqka7n zTgwYMEI!WU#wSQdA9Q8%rO!)AJ|q>oC-kRAk$d@hUq3PZtu^Pbi+-zZ9T{w+Xgf7b zms(B=;YLd%NEtXVjYJH|tMds z1|Sdey*4BXat?@BPCpGHed22^A%+&{*OxR+0RMZdd8$CczJuCJ8z;FM!wYYIfNKG> z%rCBB3wo&2{fb0P<>N#tkW&b4Ehp9#Y$rIf)ayb!nAx=YSQ_cVUwUln=Xhb{e)EG4 z?>k0d%cPFL)edojn#*6%ypg`9f}J`P+{dvOahz!4??F0}f_Cm6C>pl(`7O<57uuoL z_COJ$Qkvx7dDKT z1%zqmEm~Ldfz)wKbBx@r^T>QDkb*q%oiqiR$B@m}yFWgCOd3MYOo=||?@ycC`p%PV zh&9@O(k%al&aRP230HqtZ@g8*{p0?AIfU<>p38P{7>=7_^sY2iJ(-BHze^(tm!^MD zpTdm5EXHW=^Av7?A)?)89WRCF((kdA!KtqM{@nH2tN#I zH8ACnIY0*PRxLaV_fPnT=9rja5%Fz0S{KvJ60^rj2W`~D)KaLY0xz$fsA#H>cag1= ztnLFHxb`(}e3$-(q%1C9<7+*bP2}lh5EA=oI4-=YMv}`C3Xut`8*8Z_O)A0`>*F6L9=(>l?mLdQQ9potq;IrI!Kr*>0x!oWXuqF$peq-ztS9xMLeZX$G2 zWt&&P0}(?Y(XUDFc^r^6b_9@cFMoE7Yq^>();`p0bq-27PwHP?ZH!(7t;Nsj5PjKu zQ|ZeJ!TIr*m3jK~1A&sNP#Hj)#@{3UUX(d;WM~k%GZaWA=&z}GCFmSyz?5(3iDl4a z$2Pgy6&J4?yf^r4gX+UpnS4Z^Y^}DQ9IxWoH|@;H%kk1Wau)$^_&L0>`16P3rZk@q zs5UElHyEKd?O*bp`yyZV*8A0V3k5I=>QRpw4Ln)*4FV=NhKR7DD+wbT-iGHbC7E2+ zw5xuQ6};p?=D$Vz^vjm?f)^Mu1L5~S5m?15f~8E6kFk3PJa$mkPN>fPlMc|H$AY*~ zNaLpP8Q;4<{E@={2iz3 zS(`T6^Lq|>o$BQP%@upkX+e!mXMBgHz5C}QY* zOG!C7q}Lj4^T>=}Nkh3zgn9N$0JA*imsVN`6YYB@F{4GA6n98SZ>`T;f$2=hiWm`* zx>Cwq#5gy$Q$zc1eSv5tGTorfo*a*6%%Ki|yO5`dJqmNal1%KJm?Ptz1;ZKV}hSO0E^ zlr)(P@^3zE5>=_&QYyc8z5_R2k3llmKLzr23dDU(4%`e5_;z74JkgJT+#gC-=3OeW zEBJ*bb43bwCvv{AoZ)_7$IY8p-7JB61hoE!w#G)&-fBl$ild!@r4`r zZBPff`}(pzWp)iCw23&dHRu1iMI!Gp?LkyBE+61W7o%c@?SzUEUZ% zfjq!I2P83?2KSp1a-H)f>6YzA&I#T4nx{*J@)}1?-0kk~5;r>h*~`V9`y3JpOrwH0 zg@|V7DQkYOA}$E*AODOKcy{NZM|^czxbb`Xh6DQkCK`cT(B6~Y21$y8Vc90feOPh8 zV*@pjZ{wC(RX4QA78snyb3C3={IPS@>7u9?UF@@jp2!JuSakfB#}Ml8Wcq2_bJupvn#!w$Z*OQ zqgtR>ri2z^9~Rhc!jEN67#_(9$(KwBRnsxliERx7O$bk7$~0^$>^-&1|E;*KKfOZv zC!c9uPJrw-B%A`dh0Nh+-;#TVl8kyr1=-%#^yOWz&*WJGSKm1muqChaR=+j>(^ifC z5nz48+WjaUf)+7qM*bOh-nci!#Rx1I-Zf3^5|o>tmS)=j>jjW)QZt~MjnwX84$EcB zFhd=^4S3B<5(Rw55H<&*2H#5GGy0nWG6($)t3p(KSjhp0>1pwG zB@e+QTb`i0rO%Fqg>s?wwN+V&gQbXjKF=%=DQh^4rVq`UeC&+uV#cWw{X7ji3}fM+ zLfdJjiIkTvXWF2DJRQ{MztLht;0897^+s8ICxn>I5zmp+)!2(-EWG*T0^1~;oWla zDmz^a4I81bw8zT>Sg~>*=7fx;LD$@4@dkbcO)kmDp>p@KV3@f#nnPo&d`&PyV*(lV zQ5Wjx^jy3rV~@$?-~jPzWu zu=QNwURcY7s&d~7DGI9&Suf#)y>sprttiP?D^w21!dGrQ?GddEf!kuvu1CllG zO(=NCLF~_e>lSTMq-uj;x_`{0#XZ51d5!Lbofdd-aEt=8+NSnl?{M2gBU*oQoJI6W zKQsdx7d2G41qUqX_W6wW{oMm6ptc$e1F7Z#P5? zxl!yqe`Xz!iW0A#2|h=s@gQ;|pH~SawLkz9L?C$9lHs`kwwmZ4Xae-IEGvU1u=h>E zAwEjbdSudtPQg==mSmOuVoJ(K;L|KbnV*zlPO*QRh;xgV)* zbl>AG5Snq=s4e7MIeoB=8O}zqFqqf`e>Q#(XO?F)oymhN6(b4;oRv0G;gQP4ER~2D z|K!0_FCl#@q+X)<<;0tSQVq+!n2xO=`<`Inh5#MOLJZ!<)T_>=6Y%SZN_$6N>0*y? zvx5VuGpCi}HSBQcGhMD?BxRmI3go-DvZ{IO>4_qCVn-IO0N>WVBDMk9g86jng8y3R zgh3O%4)jSP!j3uu!=Skp3$mN7+f-FOBeI*k+e8=cKqY`ikZ}b4|EUC=XF^{?-2WCr zTD<>Y{c*Tkfc;hFLDDM7963gJJ}h0ta~0-GTV8E)x|Woc+aqB+PMy_K$BKUt=YEuL z6&8csyH|p`8L1Ats-s?%{1ZB`aLw2268*Ov*iwFS?^GsX~)#PtqQh8#k>R1A|7``A=rJyIKpybw0o z^Z!ISl_DJAaoxsznga}7y-&|#`F5~iC4a1kIDT7d2I%?6KbkNi&)@H%>R3eZ3DW%G zE)%qTJ{HIv3B=wBK!sOu0i}SaTgUB}^8k7ptILZ;ah-bwJRu@0Nu|5pH~Ii38;`!t zdF{u$ALSrpdBUw&EO=C*NNXkebe*tErHr&Ew|bPI$$#@hYVPyQ)WUI5wCi2^tkxCT z11*;9%F*Xm9&ueYjYTvR6j2-Jpi4Vk9D)d?FNLpJS+sX`zfen^R?qnk^s54QdOrK@@-__B70OHO=gg{4(l)x{zH zVyL$xnw&NPuDro+KbMGUE<}mOT;fowSE>ZL3NfAMV`FOM53PpaRs_jE^EQ7Vpo(~+ zGurvbi}sb#TWSJA<5D6`CMwWmExGbEm1Nvfcjx~}*#-iC`jcBGxcV}OT1FKh@arsq zxb&~v=s!2OK*<}y+)+w#8cE-PR3K+U9r2E=trVr@oJNv-=(mR6*Oc{or4;lg_9T<3Bk|1Z;etXgtjoh0j_j z)m>Zm4<3$so}ww7&Q+n2*~HgQ2X7&8F9Hw=^9QUYP_tb+b2o$rHTa#wqkedjEHm83Hf8i9Wt3vlFFoCxJWBr-0PwyU&T%~%(V+Pi%@}>f}=(S4aGR*a2I1=fif;jh&1Wb zj2JU~ATLPCrj#Es)4lVFKXnXGmO$P4O3Q+Buvr$7WAW`0+K0Xf{;zI{D;IDvF}050 zjQlT^0y{`Q9(xjQ8*{~hHnKc<)7Z9Khgxv?x%@u@Bk;h#Ivwxt5iJMr0_`ENRV{)g zzmj{LXt!4`wp3eMhg5`ty|Hih%GAv|cRv4HX}4t%LCem`7CV1FktC-Of;KD_3LDdm zaBHrIy^5mv`~Kwz<~w7X7aqn1jju;9O<%fv4$w}b1}T{>Wgrmr)#oQO?@}NfVz14*kn{Ol4(i-NjV=c+Yr@zzqZ=X+X=fB^N@bbR^WfUx2 zt6=`sCt;YL+Tw}M->ueU*|-w7c={$k^T5V^tL={G!xr1m%E|iST=5y@%5!bZ#9|tg z)J<)V@oVwO^DPqistl!6lu6rr##fBu<~Dqr)U|jX1se{${jSDmsgFB*A@JdQbVS$B zW99>%ItGvE#_#0V-UqI!fq;mtZ?NrC)Ijvmk+2;cf}A%QcI2HwF>cqkMH5(?W_bKo z6Qe1*9^phLDX}8=WB6GE)(7R%cu~wm_n>R-Qce1~0*#yeu&rky1FWo3OyY#ig{kf| z;ycFz`0$+s;)eHT*YxC628^^x72v*Ntm^Boq}Zl?Ne#uatal;HwB-812G^5FM%iD( zR0>MOW=+sB^SJWiO{!Zg3$#oFqoRvSch+VpK7Kk4Uu2*Su1PWEaO|V{h5yF!nCJzx!=(8!GMT`0jQWw*~$43hA`dM4%4+AvF=IiIw$rPFRWEUV@GCjL> zy`t{R&0GeTl*b_$y@WSUX}D-P?S6)6*S46^BZJy^p6bPsT@Gz_US7=`6D3QTR*fV= z1|C=>j6Au&!YcIkadGd7>c^L_GOu!DPS2tZ$_R`!Wq>ZN^z3B@N3EQ@4ivI+nkEsqzL1=nv$yGtgHLjm*?d*3{Xy${%+VcE#4t&yKfDdnad z;m4fNRbqBQ_BnmD0|Mcg!|fgSD=z~N-M>)8e-Rp%I+iYKXvs>I(lYe+6;z18=80d& zM2Qsu@#4vTEY)cCodHek%1M68Tv=q`?Dfj0KS!om5^-(Kf3|5bR;|M10%?OnQxjGO z=I?QhnSLP#R3X&4EF8?$#O_~<9bXffl2tv6>3P`8(pZO|v!TESEeU7cNc;WwSK z_~zVYs$Ayc-=v-gR4h6)IAmdTXU=BVM<@(Cgl+vfdqz)l^j9)!6&YVR`aWYgDVEQT zNj^2jYss2zyI!wYd`zruG+}$P9?x;_ ztAvVdL8|LCNLb}2O^gcHp32Z}>aw>CQF@Hio|EIQ9_l1pO{}4mQ}kgnyQ)m((DGD) zHclMR&fiIKv1z2LAx?y<9JYcTi+ckN>PJ$Bd^dqxXP&!YU{9Bzqx)@T?{|9NHx$W4 zZJtpxkBVo0PHj=#0EV zhex~Yi{DyOsYO9szPfj{ng1^FQhzk{S=}JEN;f8Ich!lTX7dNJyn_G*$r+=Zgd^RU z;IF8_C{&JmO%4gS$j+itXgOaKic2P}DetMZ-z`1f@lIlXs!?`1iOB&%?uahcT2(}xg+JOoS8AnlX*Q?9?=a6h3W{pI4TVQpdg{@lmJw3M*#{yC_6?8{8!07ELj^9dX$iuxhy?04n>zDd7-Hl4kPO z;=t?TdFq}gQQ05)pp9jrs-+{u~S=jV+%8JhH@4RGUd_VZlY;AX9j|{Y$QZpZvWIXU^)u)bNS)g&bpU3 zuEKzQRw{+>@xDb{4Dunb`5fx!aJib2DHCp)#%O#pkizn7=^bnOD#xhj2D68B91s<*Yj_o>7Tc)6BTa+=4I}Zp zPhzN-NIe4RxL=Spzo<=u?cjiXI1P%-N3S&oR_Kh?38H&(Gk2F~GSf+UkU?sUNa(I; zqnqh_MB2kX^@=hv35l#p=~i0vF{Y#4RZcAFvnGTSN1+Nl`@gPuO|U~#MK?BxB*R=V zcKEaJ1$9H|in`X;z;g&aw+KjWngdN_hOuF%^0tb~lWe(l32hjdyT9k2meEguZ_RJ!`0yZz}tM~E)0j$!cm zNH&ouvBdj01kV1`r_TIAZMLx8RfctM|BU*H0uCcKOUxUYufZ1K<&E$+G}+2~EvB1- z?M<*<9HXjs%-?L;8M;5TM+`@$0?~PASPQaANqcUazZ&lLdQq~B+V?J)*V&El;zZ5_A%)z6!a$WyZM1-lQDjHuP22ubtDt}YEhB%L>HbUQk>SjYjvWeSB^s1EV)!+;UV9i}Cs^uz zJYGnSHY4R>6VIbH*qvN~+YGFYH-xFEVCS=z3XLll@NwK=@G#TA__7gnKl>01R0sa9Z5kH(EE>jbq8k}`oWXlBI@j!uW5HM;Hhz*F>n_e21^z+pPhlieA8vfa-qX9LXN8!XMqKm$|8|w9%i^A*yO$xV-svVW7;+R-@+_26 zsNI5gekEF=@L@cT5;F80S{LdBI2Kc1_P$%8(zwr*-+5P6Ft0twv*Y`tQPNni!ETGn z@cNPNR?GQz^Lp+K87-ae=#SYKF`w~Yws;S9r~xrv_^xNd5oM1m%4&?{?+BA!o_}5? z!<2SGKX_!fXk_~6A$z*ngc}h3pkS&$6oUctEqgK&O4Bf}j~^iMxbnqpYb^=-A1Z*Y z<(%Ja{!~gBr4HC%W`q&c2^o?@@k|J&q&?+x2I<}q^|yOPZ+P3y9K9J5*l8-*>#YC) zuvUiu^I5^)y%b-0;-mrKu(FoaOVClK3qdeI?7hNV*M1i(1&6mJGhA&@C?;f8Q0J*O znj=8&q7};pMNrTE5fBu-Z;DwfeI zK?-*k{ra3POIGDX0i>Vu4IWO|(NWqB_4ImwQ!_opxoFUl-cyM=bjJnWh-s;g{oQ`A z+nbI|R}8KAgn*2>3>6dWCV34?QfLE#&+67a6Y^hPJ}CBCAfd_Lix7hi{Hr!Q<<#?j zdO-!GYn`hJL*VW=fB7kV?0&w=m$~AL!VDwb@aU_PDL&^HS_m2O8r6T`4^E{3l7qeX zPbR$q^lUQQ9BbL;){=-Y9}47!-faAqtRezvQ`wk?6f&{1$_zg%>I#1!ML`dWtZQ2T zs+hJ+E+j{c010jAlQFIYBmv)u$#y=3hJ)mLZ7#|lRBQ0M{ z4v-HWqX>ueEWckG3=Ii1*o~qovsT=|8_&n^ZcUsn+}XjF;`4;_vlj-u z9iqu;D#jh!W6uZ;pc(DWq2)4HVYb`Ht{c?;#yns2}4IQS}a{yncDW&$Du9=WbE-+1G@(Z$VS^tf1=m0K& zUoB7s><-no<{k|IBzZ8grYS_M7UBiZz^T*A0HknM(nB>5lC?D$vN!UkXUs!cR3n-d z@2bf3cSl}fzT!o8%%veUnfTRJe^VJU>QkkK>ob87ZZlrZc?YsCQ#qOYMq0 z!p^v-Mg=&cjTWX1-=U9-ljoEp8jV+)G8$Qnm$AyeNRDD(=qIRhX>N3pd_o6^GTb+M z1}&-5FM+}=0iLhn(gySHG}x~nHUi1=V72982_%C)T4pG~BO!Hf3Vxq&0$qyua3#JuWy3)@a61SF(;8Ha3S2m8LI z9cU?%8|!$sMd_Hdei9U18BedKLO#I?ui{wC{^Db{LoR;Z?xkAk+%0r0;Qr-Vwvf-z z<5b%oxsjTB{Sc<-5A{8_M&kz!{ko@NJ%E&=3C-qrbJ||%FTt@V`Hmwn4$yrfW@gnbwS{g=L|Y1`0D_8 zlWM{diiSGVjx4V2YjPqjm|XuofC9p4jO)s&I6z?IW^&4JUxD4$tf@SkAfQx+`aA%W z;y;8i9-KVRLc-|bN$TCQeDMI-o_$y5l#d?r>KL&m4QRuH-Rct^aoGP2E9c`PI7G`9 zAg{_zXg8$(@wdOZyVd7+xqDcfiH2xdjkSj;&2X+!Zkl8P(tv+Yt_jR6F;D2bwKaNs zrUMf9!U;VbkTvNBc0Q2uYWXA5_XAS6C+P1G%;9TV_(RQ>;EX8nAtWXc9S0(_Jp4#S z&e;GhY|9h)^=ntNx(yF5=oj6d(2QBl5aN-SotnqnR+Z&qJ({D6?msQmQEyr63^}@5 zhAX{S6yEboTcKDLmFoI#8*))*W>Ao$T-Ay34TpuTrpuUi=EgUrwEscYIF%A}b&W&O zHCig}O^_qyy%;*3Xl&L+2LEl{hMF2R?8x@JF<$6<8emq-7PwrlIni=Bk?Tl=mm-^> z9iPR*Ad3rzB!7oikpiMSf&AN8sq~1@XJT65V4qRC-v?N;WGaq5oQ^&&eD~iC?wOoa z!NSF*ptusivCWUKiJVdJJVs7HDeRL{6uIBx$ zt`G~R11oehAsP1d?bFFGFJrBKDaNJmA;CY#n(^RI%Sq4IQ`{+g;5J97-d+6JG!;8E z|M|BScjDAC{OfslcELk;Jk!nJ@{2F+MPM&*aMKo>!-nI_}q4%2$hTkeb$`^Zg zbZ+ZS`H}3vhbss%5UdIUcR0H#*@OVe>JSVg8KCJ5Jn{8@S#Cgkzg@=L_VUHl|B(n&tmjG$$GH#TjO!oMO=p2vz})Pi+!&a z+LLAO6YDLb;XjE^io7xnuJWwDTAI$*OKRnfT51t%^=Z9hgbEvX2yr_dO*qV+TJ?U( zw0d(DbW9Y|%8XzMEDTJ)7cVsNqZX~aZbn*-&Q6loo6g^Vx=bjs?ZqhyNzEd0KmH}XDCFmHo%BF3S?!wx!+dd)1{ zB;QFCJWkP1Oj9!xgXeb#dsw{VxsOx2RGLtvqO*8VIqu! zh3w^4Vi>H$tPjH0af#}=k9MMIEYEhG;Or2InJRfRV7UN3G;+03Cf5Oi21qbCe7NvC z@cg=v5RoxZ)`$0=L+MvOtiv)cIQKd0>^5tb9SB1B_7L9w%#C1~BpV3xcB`Pho`OMBT6W}W3~n6=24CNXNocR3q=-0Dcz_S5q*lP6NDGG0ka%sK zB9O602K7)z#L`ki+?sFc%4Mr#E#->r&UnGbEAG6_wdTP+)zxedOJ(rkz;|Wq^BsdA zl4G>kM1CKw(VQ(;u-b%#&abZ%;y~igkP8DwZ|JP-&dvP!s8>lvX5l@C1P16A=PrD> z>rd=x;aDut3vX~FEIAlh?%tAu4I~e2tB#A29UMTs{D=UR7DlV0;_lJ35wj3D&NGd6 z#w7Gbtl*NdC}5a}E?`4H$3gzAPb)1UBvg1=qIKHPAHzO4Y_+4;@-*sn4XZ-oBuI4+ z>6||AQ$FKFOCw%@W2-Ssu`b8#v24Ngh^}Qs_&egBD7lppxeJ3)e8&JS$Wi`Fa&l&B zIrlOz9R^`Uw~|&NWXYM;d08J52vg^P>b1m13YTEH`+!+U^Qt-{M7yb?03VnIu{;6! z`N9Tg3Vti}Ha{#3mW|w48o}?ZRAIco|E+2Whv+W{#lO|phPf8uQa(d&9&PQaX-Q@o zf1Fsd#Ifv}iqZIbx#ReWdD2388KRBfn$>0MRxmZegu0s?uJ5J@W%B;DI>p9LHlAp1 zy|cP^)tk=yJR7)iUqI9Oigl+YI<%y);xHKYyK)6pTV~_O zRBDKoA{!o-F&o--TrrW7x~^j<5=za1S3?Znlx-v@KQ!DCm!L!CDR%MJ1JLcEc!w0? zulpelcT;EGW1gg_F^%^Xnl3HzSLo*sZr!DW2w})Ko$_Zdk@}AZ#$Vmp)EG6eKyL#D zs!VrDVIDl!+uLcj+?zo&BE0A?uGrAzE>{31BB$@cMf0wEYfZP4LIz#q58Qtxakrx!6WF&2O?%MQ-m$J;QIg!cm z*_MyDQJk^_L&edQg*+j<&=y9*FtsfG!*u6E6LG^rPhM5=_sx?(%tI-qjW7U zU!X*N4l%9LTOYiXjixaI7h$6NU=$j z;KNTg3A)GD6cNM8Rmdf!)GquTr;foQPhjJ41t}~HkhWCqaIR9PXi)6k$s%S#^>=a# z6)fG01azcudOSQkXiQ6ZDE;Q;^^eSq8Gz5^r5V&}my=9C7uR z6@|Q@Fkh~?>G#jt(8mc=n-|az%Apn4#xYbMIJys8_s)kyrWC-@zm!R!%YMSFzx35h z=qNz-3EXna$k6Y5g@pA{%AvOk(Tp@sBXo3BMA+ofN_?(ykyxiU2 z&zTrhTCQ#KYv9_S$Rk?S`4&+_`Q<`|8~Vdf*o}Y<`6}}%rsMf!`u52q-@%`cE+r!_ zGLas%#HjCuOBwPIPoNC#6-{@sH|m7HRc)?KF_O=+VMBU)9uM?Bt5i^b_RUKj?Mcm; z-4q$pUd&MmGvlqo@o)Ko(8v?87z`w&kg-np9yBW4G6eU?9TYWsxDWcNUe8gd{aK6s zSz#G?+h%AM4@gH7)LOP0bV%V`V#C<{KY;a%CWaDfBLLpm!an5mODKwXryI2+21|ia&laYQo_S{H5-M^Gp%q~+kSs8IsU@;LZ0IM z+(m4>TAD{@Xz1d8QO&#Qnl=J)_-o|FqYiwn4e{6STbSeQObOc~h>Q;w%x(E$;lbim zpV892>ioB6mGbKeHxg{3J3TlJBJe4p!(6r^U8}z$yf!J(S|KhawAu;Q~o>&C3U@LCodNK zG;HZ7;Ojz|Dv%N5I94X%!HW|QW{PvXHSOJKD@O{ zd4dmu^)%tiL&U`mloV)(TUfv+3y_pXI;6WB&$GUL&KY~W+aK@#;j#xj_dVm9*SzL@7*{pj z-?#E+aOThzKKO-&o`KP~Hfufs0n~4qgaVK3biUhi?6h?BL(fPbAvdrkb{^?iL^*Z2 zX4@RgbbKkK;mUjLc5;;vMT4$tZyK7t+BO`;k2zyxxUc>4lhJN&e1mvv)OW+YPRXF? zLFgHI;XfaQJ3b{OPe;2mf@fmML<~dQ@Fyzk@gOC7@RSlN0_Yt^ntPu}9#t?1UyB$B zaC0Ger&~wBx9xm`I%oPvQ)*_X#i2a)t2C4fJb7+$-usE=l+Yi^oZvhgv-901j(D&~ zp%r?InHm9~a)E#G&hfye3w1$EiEdAE`296d=D;rH8$oxqv{NgXVXki*AWiBz+YBr} z%0O*-f^;}X^Y)Abi{%FDOOUsN59 zZQEw~swtBeeEKJ&YI*3iLPFR(y8DYeJI5{k_YN?=vWm9EZsN(Oa)WYA(EU6E-}~q_ zXI^cv1W9!bM)i{ej_h9U2SIV$g_3t~y|zk0a4mJR5dz7&HKyDU%w>gFJ6GF=B1Z~z!+LumjokHWx}nV%9_`}!P>k^ET0hoe!(de zsPGH;InzsZz6o4f;T@6M z2#-k-LOaQDKtmCR;Kgyfyhpaytav3_Y)X1(e$RR&{e#oXdv#A6+Pib*yw`XK>ILhb^g5(x{j{ZKu4dP6$|J{j1v#?}eTwj~Vr{+z-FFyC~C*7wM^8 z*6@liZSH++4hbGKJh3Z}Rfs)I0AJ_L(Ow|1lo@y}JIMRpxqBI2#xjiFnIhNKg=H94 z%uaz`ujHR!{6>Pkx$K`*#dSX}$K-KglH`g8i#0}|H3z`)Bz?W$P7M+pjQX|}Jq|Et zgFqxdWN$QyWT04#W12q(R@G4OVF(fH76O*1w%^m@UJqE{Ib6?*8yytpwn?23vVv5P zjp$}gN*+1W#$Kob=fK>_XlMS`&sr^(lRt*|FTWIGIi%m0*C$AkrM3*YY3)jRJ4zxG zObiVkULxzXm+EGtqu@+3!fV`GMi_8s_gosB&K1I8Pe%a|6-Pha%^yfLp?}T!botZO zRsv{?jo-_=De_Z@$Lp68t}k!FD?=+X6ovs?SS>bWiuxh|W|Wj} z)M*(3iC9n@!lBJ1aRT-w+oszr3W=6VPu}*4fH*<9@Xgld7!Yv4)UVvucwzUdY{OxV zx_pT=pEs4CzVfv8sQqO@Iqm#A_lW&te4Lg`P%FimC+Dsn;0Sz zXoC73y%i@>`Bj|zZ5n$6wjD=k) zwZZA~T4&1`V(2OFCSudd&|rK0@w4$QjqYqcYZtIc((c(=*q>|%7Xc*jkqO{T#4f-7 z?X(zxH?VkYMu9}nE~5yn*ZlOy`hKI?;LEMu!!%#?YFy5LgL*p*PA#nA8Y4eHA_QIx zvPZ4TA@ne7t2@N#3ab4iOYKE1u~~`FPx^B{K98bk2xA;vIQ*tSnc8k6lmY%SWOFy5JOMaGIzk+5J0RaO3BGQ5T%`Jp zf|f}CBqF7Icl5a-^nFiwH$nfeOAMa~Y$|&=C?7PuFN^D@nl;xHrhcue64Dr`hsFmx zvhW~G438Xw)8*+mqWoeTBeR3G*Y-D*QA6o^sb9OJVf5Q_-wf}M|BgwekM*k+0}ay# ziMavcYdC%j&BqJ~UnKuCe0?p413e6deta$1;&id?ZuN^cgD0_ght#pOiLyUr{pKb1 z?ru<>h5^eli)T=cY>pQJmKElaVqoLkBDrsH34N_X$iI1CJA!9^1N;J=m-lr3BXi{^ z+Z1t#%Jf+;wQOu=vLfP!6zGN+QIHJX9umw6h2B}3zeWJf5x@Pnu4%9Y9YHn&igGq5 z{N{mt4W6vWKHupzwz-YevEznX&9Zgh9*FAw*q>9JoKMoN3vZ|*HKW&(jDO9@hV}&v z?o6Q(Vo2x2*}V)qKk9f6hQ)c<1emun^ps^GtN?zA^=qMwcB_}|zu2{gps(_INA$zKNF?*+CG+$I-~Ff$88WNQ$*fxmoG&whR* zaK1{YH_6WQ-i+Oe^)f){ce#0iW2C71*!BRV!WIR-Aq4dgV#vXQG)fPYoy{8_gH=&H5dK?8D!bYV==TBwP&j8H32F7R@<>iOw+hX0(G z29)YM4sZ_AhWpL#%AJioonFbUQr?^v356g4otqIsec#54YYlgK+ndsni{znVzYDtC z0@^;l?C42$jh~sMiU*;gWI(%&OL9iA65t7Tcmd1*Cs@-Jmzo**9GmOk;_-ws`fv|h zJg9!&{~q}kTw$fX8BhF2#Fog!;b%=kNw(MKvPtjuiv387APp1aVBgx&_u$NZI-p9}5{HfW(1r;NIcuhHN`ZKwnb~73Ge<9zOJwg@`Sr62JHx6|*_Z8?!3Q8-Z=UKsAv8=TtdlS*{PM z7W4sw&MsxN0*K2b=T_SgAfiv^-rcX$LCOXhm;rD)U~=J#uTHv};BeqT0bX1KUeoPg z(Dh*dn2y2O+=lC%qCnLbQ;_iWV<%6%AndXsVA4*GWiE5I0bmrr=F(qS@4T|Lu>;Pb#OK*32 z^qN56l9QA+*(|Bn=|l`QV}xuoIo>Ny@JD>}PC}g(ppIO^BG`rA&Ls?sKx%$(8P)MbHtK%rMj#Y#(bAPm zN%|=>uvJ}7cm)ERZtoV#T_8up0fZ?t%Mm;PNKookE#*ScJdLkliwvaZobq=#H?4)# zUSHd*^`Ja)WA*8WWzTn3KClX~zB^_95av^g-LS-L+u8>kv5y-`-#)nB802++oGn>E zu(P93njREE0~XVpmJ-9jz7{hc=S996$Z?HLx!hGg68e5Q{w1LJ`TV-4~Jc3B=S2&4C|xDbkElG~w*_KD>>4CI+B?tHkIt7pG7`& zlayvv)Z8J>2z^p$jpBx6;eUki*8M5-o+tj}7L~O)>zhd8E;ZSJRzgTuHwftJHajB5 zSDC1AAvug$91IaH#1R=L8rf4GP($2wF!bMo)_JDagYrdIOpN6{@oPuoxR3mc zgc>kS0!6XRrt)$dPetwD-UfVzzPW-{K;V8pb z^XzSYjM`%RS@pd+an#_B?O+|^phcPoV0E2e8g#+|tBX$ii`5;8C)7;r3-N&kyuLCuZoXF;XR zvrD%3c9yhLn6FrwRFfaMwn&Hh(1`)m+qK_R_Ed&m;ns@i4xwWoUSHZecWZWd`j}O$ zB>NN3XR62(w~#K9#{A?!LDt8O?!GPD=yIFi5A0{VcZ(#aurwn$o>c)5Lp+dr{#iKk zq{ozmLW}8Ug}l1e6C!Z>l->7ZT7+U#d;}UzJLt2_{44L5Lp+Zv+HqcR9u@B>%O55G ztYe+ebA^6Z@IHhKCO?M4|UBwK%bW zXW&kPD@lO>C?W!Wu1Mf``XGr=&PIzI0n}75;=&I>S4iLq7!6t=83KFim{u8p?w~i6 z{cWRc4+%xmRw+K8q2(IZowo^m6Y-Bp+w7KYBx;r}J0smJoFLpao5AcuMVXIs%LHhs z^kwj%?Ynh<{k?1yP%}0q`Tdo6NOLBB&IhQ?qM!8Be7$Q+Z=Q(^#4OUq`Rqw4zNvCq z+40z{8Um+8{QXq-J7Yr=Y8n(IcRy``Cq6PW| zO_q33^F%H0d(dIIf_c-)~Td>U{}oNa)E;EY6T z4uaE+1|EOTsB}9GNF^_OK>OxjLQo14<`k8{en-;N1S9ZB9}4bKIIdH?@q@07YnV>u zJE-IIx0^4M=XXwn(gNo{KG9OZ<4%t0!GeYn^TIAv?(RH4Zyk~+IFGGS!1>8J$?8T3 zd3Op#Eb93K1$hRqfs{qd=_XslKaj!EKOSu{QR`TIQYJzqE4JO=jeJQUk?0-&19& z;VyJC!oM**TUwm99GI{vhw;~uY!-f~6{Scc!lq6yLqi8QCe`G;>bP8h4h(@_kEHx@ zXZx$x^D53w8U3{br`WFij9KZH1-9i$x!sThVl?$Xee2T8KRYMvhG_eKC9rk{8D zUYBX1*>YcT^U%lmiO?Tru%Dci3&qGlA2btxFH-=&5=rV1t3TRKZMPSA_}JKkU9M8Y zsO4qRt0VEaRa?HK8~2=AA>!T0hgr-eZ+RfmQq#ohW`6zjIk?uh zV4SBtvIJFUG1dtHpNyfD7Lfvpo*4cw6AS% zD)svAsq{RD_Eu&!R(^vVwwFOlSObrU+{{FG`v5X96A4<#ObgIiTlqGn!npI6Wnwk4 zxyc4I?DX{X<8C&l`{v5Mlwd5Wf+)BmUXy_JR@XzIs@We_Xntu&5Z(u{iX%hIP3aZcy7wWm)z6Y+3oqey%m*VsN==HpT zRUXxok~P^<=k?z7rREL7d{)lkIhhH&cv()Xq+8(c4xO8+?NFq1aC}15Jy{{@+@c`^ zCexxTR=H~-`OpLcYos@dcwP>_7~Q(pth%vxwXKe%5a4P^K(%C;P?pdph#Yl#7{vR z2&riHw>yLb-O9B>omR<-wt-+bEs0=kbynaStg!;|J)t+t-&#q-kduyn7uoEwJx_7C zv^Umc7-+P!7IFQgyuuImD#_|;3`pPlbq>dqoEQS5{|DFOZO{zRe^(c>UlykN47n9X z=i-&fvvg&ujvB^3t}C@#(b499AM+YTtV|batDV z>;LTnND9rtP%zXInc9rAvAF1L_0i!(>LK6K9&xnb4RSvp47ljLGm)X2vBTK!8Mu!6 ze#SKEm>46F{l}quqkI40(GxQ6Vzo%p6r0V^{US`YQ(2ine0^=X?UKNBeB~r`+|Nvp z6!&-#yhKf9sA>TXA5KSrhAU2gq+6N^aVnd?TnIZX=wgGP?-*yMp0Tbouf~|%?6uNm zM!o5hEzT+iFLl)C!7hvzk3CgxdSsB+B~RmQVJN+@nE9*KY}U6gUHUEiea8z64O%mK0A*J%QNWt|QX!mvO%M06!xdq6laN9_EsIVmq_ z8ol~ZJmrtvmV8Z!;Es?7BP&O&F5Sek&My0Kb=md%!^IzaUq29OhmwWO?Vjw*zeWp+ z*$b8|a_+hMUU>#C!?2beSGFM@*z;K90blX!!-7G(2gF;{mFPkq5sVUC6G z{6L}6b}GhUqa7me@4N4>xW@^b<&Pr9wv|<+F!UU!3vH%9-?set1fc^wV*XMz0{XOp zsh&S80(cWIo&?yJGBXkBOQvt2B572f$@}upHUw4z9NL^-;Wm!H8$?&9b5iX3-cR55 z<)KAz!R-L5sPmqAc$nj9COOib*QgQh+}Y;%C5wiR7Tj6=^!2I&0g$gAFl2}DZG}2z z>jr&2cSCR>?EIGXyOM?(Xs~^#q5ROV&eGy71fZ!G41kvSm!Mx#n40{PTEds7m>qXp z6|<+V?e|HiQuF!-E#NXrd+b8`lVvvO`K~7TkZ9Asl|I?k5>)PQU0#l_(9%N;=WZVz z1QkKLxrsa5$%KkAd3qCnSZis86TwxmI1a1)jv^ZY9=CW z$y5{y{oP>R?`2kNS((y=UTd661!fAaDA<8VMTOj~){Qc5t_|SjiCjmN8kJm7ZV};w zJ{k?ZP0yt%&l|)Tq{`V`8NH?#y+GH53PNf8_)_ng51crk3IOH)EsXk1K_TcPN-cLh z4=kGH4=dQhZkWfmt+j;vzof_K0q&(5cfBwLDTa`c5b75nuLe2f3dJuKiwY?gDTN}N zfxhxA4XOnd`vHZLwanKdn4}Jb;;a~(U(9p3`8W_oZa?MLRkZBgcT-9_?5SntVtSU= zloSv&!h!N?1h+5Gue>{QWl@XP=9O?ef4Pxi6F+&3x+fN`t+ABgJ~Ubd?w?lmcJoh2 zkvhl*g~pVK6#|`~={~E(0U+}c0fpp0iw5Cvkv#o(`Ni2N1nU77=pkFB)%5uh<*D4w zV_eW;O8tLUr;tu3^dj=698(38N5wo?tg_H?c8C&aLYddxF!`E6V0_uQ^A)yT-if*~ z8eW6SER4oK#kf9`bab!mM)mwTmynjMPk4zxoS>pBL1ap^yi7N?koZFl>FNDDiZ|rd zN)BpxTve-F(Zus+t?%A1I)eHg<$^YZ#R#?H%-8mnNv_ez-vN?sJ-!=h(@*HMaPL(X zn(!7CsivS8P27ZT|B@et6;>E<1Hii}aDH)W-&~4j-dS~2)4tmLwmU^=q1n-BsfOLD zX09N0b!Fej-|Uh!TV(os#Cdcxz}MistDz!8MMTxsTw74j;eC75_VBItAI<_*XsYXQ zaQUU%`k_#ql$2b5(uKLWR6!`sT*rNh%crVEUr4bg@RxH>7cu0`T%y};b(3o&aGJ{y zeJ4J$18#)l2uJKsVCqU~b`OBwpdzQx=C*A6C{=LTyy3IBm3tVxP9k2~os~!KSY|q( z;Rh&^qLFVzZ1qV`o+jK{fGNg#kpw3@ogzdx`Nd@`s?S~!Qa!5{D+4M~s zCt`^E;%UM|_RahJ=We@6Ki{!)uuhpP6eH02xSOp!-;IiQf9i|GAf41HvL;$!$0A;x z#J7rLJG*>PwLF!mJZ4XV_gis>FLyIbVc-XpfLGRpRLz}dTdx5ju{tQGWUVw}ipETr zrdLZQyTf~zH*_y}_P=f*0{;B_5$*BsDxLWHv)MAW`&D;?*gPLLke4BCPQzIBljjg^ z;O{2q>GNFHbIqE2nyd%=54O13p_Q1d3>3q$I|knXT(PqYv|j#)!HV zGs-Bl8``E5!U?dl68Tj=!C0hXCtS6%N#$J^h;;%Z_Q#+J(=}mKJ|EWeOh%r#IHN)R zi`*HB&jT*U4tm)|nhmbpf=?cd%K}%W>6om_HpkmHKqo_qA24$(vn?4N2<9~Z_n4DZ zNnDDd5Z0pS=5~OLy&9*!d#yUt*It(MBgxRjo9g8SRB7rumhGTz``asVaSz_2XseLH z0hgW*7wTGDgCeR2!?M^USP;>Pt@}xvD=fm91TS33pIfl4l6^0o$R@GQ#OLiQr-m*O z<5c!`9ND18LTjR*qy(xk9EsNqzkIP|ot3f5PrY_SllGR`#FEf2wsa7XN19S?z7BJT z@!lRZC?sG#3Q&#e2k!Hc)=EM9xu}v+I3|cCBIiY>132HK=Wods4&;d|=MBQrdPUS~ z@;)oe4MSW!0r4v~l`u3^K*!ltOHs<@Shfnh>iAncCJMZrEGG5K%B_dbPunYJmpjw$ z`|T8_r<>4FP@Of-bFc2a+PAti{CYt3TF!!WJDGwid2xcvU{;6Q)UQ;KZaC;mod-FD zmjI}$f7cB+;D;_aE?BN8rC}CT3q*eL^yNXy9Peunk1{VNURD`HaX(B_0MfbW8q97y z@{as*RZqqK2bMwu+0pw;*qiL3X*q*3?in;vhZ?4!nuU2DpE}CNPeNIDx_WdK`UBxp zoI;Y5I1sHll~0(t>f^(s`+6zJrjUWQse085soR!^@pk&6y4g-%jCHJ4|JFNte_ka} zjN=^wNSjFcunEw^UJCq0WB`nC1w|~B8_8n4{%4@pqa9htH8V3hVT|mbHQ)mk`rZ!7&B`|_eh|ub4D@}nDUGM&HPLj{87qt zw=P^snJA-KsuuR%RT@ zVAbIVq1*;Ju{Sh>X3@yvYfZ}T`pI1j`Zl#U4osAo`bj^fio|cuRq{wW+G%h@6b%x_ zT4uT$8)q{B!ErzSJ8tn1)9;SAeY0Xls*eNQNHMfg*G?z#n1eNsnzl9}^ZgI0@n}DJ zMzKGfJQKxBHpSDX7sg0&`-zERL_y53K?^WLj_AJt{v1ZqSdr*y73ELCgSOpx(Y`K9 z5|kS32Da(XaPE^H7bB`$XEz$M&bx1%eW?^%5B+ROC^TzBoi1>>qkD2rD$fVvjJ=zW zQl9yTB-JQiBe$JgkHq_+Vq<jUxLvuDG61<^P|b<*ii$2H=e1DBdoonER=>!(|AtY$hA4)dm-iO%Vc;|j`d+rja z+-6a@6)2PB7`O?I-3EG(XT!`P_E}RcRxYhx#nW_j8LAa7L~3gqvNY7_cq5w#rX*-Ur!>Q2glbZn|%u}-BtpC4p^CaLJO^24@7M+ zcIl8<3D8e|1rT5TSG4Rg3JWaAgoc^^d*XBYW+T4WdUT~(jWd5CbKSHdgOQ$$)cc#; z{t<4vxGX8g=d1x0S^V2Zt`3nG&&c1bwH>ai#fxFHn#}pEqm>wF*S%Vi-z4aCv9alEUrjeOT8qRai7EGl3%Xg2#Ph}g0v5ykYXk>c*$I)>sN~{4nRhN8U3GH;Gf@ON`_vG#g5y7 z{}8pi5D?v8e7ze&KxdKe3D2ABcJvWgeXxv`nv>goE0Z90Z|R6UO&__NMRPt=N&d52 zRzUymm}F=AjS)aP7(s37K8E1>#Qx+#VPE@0$d43@Lf`8ISU?15js3McpgUHc?K5f~ zfV3=T{xv=53af^WW`{Eiuc)6H>OsL=xs+_t>kBcFX<=P2E%dOGVgXX-Jhky+nnaNvjM9p0*}VOq=?m?{bFzbo+MGnyv^lW3XJKhbHY%tlvqOxmSx1&qA$)BN<=Hh1D1R@4a9T~+o&YCH2-fmtr1 z2WLjZPK%U5n%vCM^u(()2k#N%U*j6_@v zbG4VTB>xhVq8S1(4%VwJr~t2pySw*fH;QnmEP@QkCjmLl-ZUjV@yg;`7_o%@=H0`c zEVk2rg5QvxATE&mUfD9Lo`c-?)c@kXeLkQM?YJthX}c~m+2+4|nio#VBGb)ylT zfsynC8mV%q0U2gx%&C|&cdff;3n{}-d@!&&2s_y!J;oaYYdxr5OMHj~cXS3#2AED? ziIt~K43jO_*6CV30c4inq;$M;g;9yYz&ws7HoT0v&n*7?*Ih&uGM;fg>R|$L9de92 z4~tz|Bq#WU%x?T2m5=ow)j@H{+A{Eb z)-o3w4HvU5r0-i1wxC&vM(>yMvzay6Iilyv?USLE%Ddja=d+2!`SqdHaQ8#xV~LIW zcT{$Y+_aHcpVBqvN|w|J4TXSi*-jc(LdZfAl<;gAi>HXvaQs0&M(4{N z@@F@$eXg-}t^JuQ^&WUD?gir)n{hy2nM3I4FVNElXySQjiEH5!r3t=M^z#E&%8eh- zjHWE@;6Qab>wVdot-V`sHwlZNnc6)FWRV541f;0wM}<@q2SchY@LQPkL(8bBy%c5j zKg!_LT}8!fQT#Td%RL>T_>`2Q0z_>2>a8bLKfBf-xt@DioR^c4!+mGH%&gV_#_Zhl zjecO026(r4O}vIUpnbDZ|2Pg5WrQBbFxFU@Qrr#+G}J{hAahFUiR~Zq4v_&Hq$dxW zHO5njvquO)p|%)bLs1MorZ4v_rn$*Q-}s>5<9=mpi*?=;OEM+bfn@+JjD@!)bOfT- z-wxJACp0BhM(^v7G=@r;l7R(nZh`;}g~Olzo0h{cXm5$UB_#H|^v225_$xWW!!aGS zLYl^n9uM#Cn?MG(1}A8$D^TL(YL{Mm82&p>(Hv$t$+m5|Po#qSt`YtHhR<{!mA8Iw z&av4VryoKLxHGt{(d}$oJKh3Rs0{9Tsa+h(9>5G0)6ymcUETFY!@L(UCP%|GQ&5O; z+?uSXm}lf*oKHP0Z@H*g zvJC}6o~)D{KamXtxe>)Fdi7t9v@vEczUEQ7IO6V7v*anFclhc_S}(Xj|G7U>^kh+X zLk4s_yTslnxjS%se@?>Z;o~N?q-LIC=E~mys&s_(UzvcNhD*8t$|$uTF=8S2TUl0U zV@*XZ1@D3PCnwt4dT!K~u8bvdu4+mtYwSEV;m^O1kUU&K34_j`G18Uz^Abih#**WN zehkOEFvae2)NCuCu(?(wx_f?%w{1GjA|oo0#dHuRu8YBjIl1oq>9zjL zeN3**Im1scK2irn@xw=xXWBll^PT@fYd`5|ZLXDJz^*>pCg(3Fv5b?YK^GK9&3@TE zMFG3u1HACouCS2!)uOJ}>2j$rPsHf75tWn_QTx&s*6o8sH$GiczEB4#M9Mg`jCi+x zby!wS86w3^v3C{&u%We265L6gIp^?HKVLzC7y}$`LwUTr44KDweoK?qYKlo+q4ct? zSaU49Tlai)*BFCnxt@Lk@%EoAB9LzBRKB{8D}WUImI`v+ohmITJDEmBiyn%)>1&GiA2@(v(ScHL(kennfqBR`?!*fK*-*vW&rrc2;l% zE1QiUD)D-?`s;u^S`9I^|5r1xgT@7vZfH?dx`on)~X{_+g ztZ=ZQG)EtsyGB3ts&ok2;XlzdE}_r6aC>YuG{LVvIq+8z0aOi-^3|1E-dalAxh}qt z{>1;+Cy&n}1ET>}0i-xs zC7tq7Z};m2HwuS#Cs!QEhv~XUkl}CA?ymxzts#;MLDhM@0RoAIvcf z>1M2mOBz1|ZyGr~1gbKerTW@s8wlO6tCW`px4?9# zCT4*oZM+#s**k*?|FbQUgGo9$KZ4G!Km^+DHp7)0yOfT!@!BqGO1YdR&LK$;4oN&9 zqiBm4;JOV;2k6U?FU(H?M+}b{I_0sH%|9HWrX|1|larO_(_xi&mK#(ab}2z(Blix{ zRO>X5S}3feEoua)g$4uuTP2H4MW~H9Wt*$w|*kq)lJq zKm<1iY;HG+<41ilkTFTXgolp!mdCctlSe2i1uRk;M}66DgJ|bgYBiiD09U`yA$8y`{PX-&jggQ@?{hrgg<3_tAm^LXPKB9{Z1Uq47?T7?^|ecE z9<0i6NW{V~t__O9M;Dr4x^K@1NR3oIzY7GCFSoeKvIhhHmxPm6qk0kSTVrkOxC^!-9`L1>EV7|KtOe6t1|)CJq`J@ryO% z%c3)UXM6v8c?eU;=X2FY*u)!4bmGBQxQ0l?eo;U>za4_W~E^QE5RQh(ObkMT1}+q>^57KtK3+OVER3TqW~zA|34}6UssxJqW~T# zNE69xJwQtf*=QSC8Yb(0$&C0Q$!>)KD8?m&r+{HG&Z2kK_N0JywEg^SRZo#86fg+I-Ys_au<{&84AC6 zT6SD?J~aC&8c~WXV95FeiPf&fqc7!2r(|#7Y>vg*nC(+n4!0c;M?7l#q~9?xSwFXu zBg!_VRTT@0eM#OBSHZzu7dIOdwT3;u$R)Db`w0iePR6|O&P zj9X{@%c9PLg{EoCT%2eq`%VTKQ)s6?ozN#lWG40cVl%+~G-9X(Mu^O-Wwm=Tc)FPT z^9wCWtK>UY=I#)61jEfxoUQSiMxfviSPTe+k}d@eu%&3=o~S6cl*UuDP%E?{(F;S<*y%e*V3pl3trKCsZ?aIy< zl}MEvE(r?FR=vou{f^}%;ly1Ub{)q|CR+qp;oZiyK#0yyFDvQm(~luQsWFW5xCLtaGR zt@jD3%tXX36&XUYQ#JNhBP5Y`*QmjNv2BxbDN^CaHx^6t%JuiX+X3$nb!bM!*8gEO z7FBi7Xtkgt`x#!R;qB?A@zj1xll5qh`qrRUE>v9^8^RH616`D{g?2>tsltI3`GJS{JV_3E0f>bIT_)5xA^zzPiN|Yy{9Ek&taC0%{2r#j3A5 z6j5876s|;LK}z#KXYQyQvA7ScSUmR!GSz74<|-i%yxKa*sxopF0eU@dtrT+;`f2*d7cW zN`2mniT1hJQQg=?d?zGldCtUKXuBowbSp|2LpJyh%q;|LP5^7=6n{PSEe1#lrUTm! zW{3DB#ewG|mi&vf0V}ZIA)pN<#V^0 zgLW*}Z6H>j4zY5os_`v|l{@^y$|HmNr*S=`CYVay&iWnhkmg8#jAB^;~4;%WUItJoj@J{caqVsh}SRx#z$Ux!$nRw z2)Yaoq#81~kqW1GwiT?Z**@>RXl!*epgC1v93z#Qe11ZhN$XON-$eLhAelZ|V}Fj2 zTsud0Bu&JyrkmPS(H6$Q&eL z6oi@$?2mokBiobjtTA8GdTM1Hvwf~CFSwnn1fAVD5B>*cr=izn_VGy?dS_EzJRe!o zrdt8e1K%xBN&f9wz-0Kh+3qp6R`>6za(S8}L<=Sp@Bu2C9q}rZ-j;|7FR2pJ0g8VK z3h}+i31yz_Tw}G26`h}zx|ABz!t2`zOHkCKQM2QtZluRy)HEIz<#30k=E zj8%$jA74Aa3hCjViNo?D<|fK_M$)HZrmtUeuYL@Sq*jm_?<{+rocS)fSlk-io{rnXLLRc4U4VGifu37@4HI zM9#PBWu&D#Ni3kEt9ve}f3Vsn5)1WZ@9|9Fw|ob4wOt_kV}J zx5D+FJ6`wcr1!W*Nv%i3FaX4-@fH%bfK3_y+|lwiEl})PRNkK3X+*g$3i>;7g zuSC43*XiUje=Htj-*u^sEU@fDTw7;=D z>7?cvyNh)#ARl@7`SwgJ9vua5ozYI>>Gsx`Kyf0u9amC*+5JqQ>rn@^47_t~tE(+9 z=I&_*IuPbQ=aSG#`O^s~6jtczasZlu*9q0`IaZet+s_mVk&1=4^7b26G?R$Ox#;)#VqovLG;?g`-+vEYkkBQUC7#Trd>wJh5C1{+Jw3Cil7bN=$c_@m;;3=2x3X1sw4`VB?3h+<$1!S(K6& zyN_@6>Z|^rh^doJIKdKc6tNZ}Nw18CtaAK+!`c7@Hzln_s$pQ@t7(K;1ak&wcM}VI z_^@%f^~Md}fN3>6s4rOuHZGhO6ZpTGmOPn7?7+2-DLG1JWJ0c0nVk9Q`2vUFgBPkD zQ$scZ*3l{GSNziVd7ah;JNR}7y5IA5C(wSx$Q5hZAdf#Z*ex(FVLiq&yo^lm$DVA3 zAhP6H=zEXPHwia1x#?>3u7zK&Ps&hnU|io1a(1Q*!-g2r0_wlufYcTxrC{F#LCJy; z-<>5NDRaC~fCtORn9yefpCPvyh5LxS=>YUn-;M(GKVux0GXwK;EL)3Bj@QV}4!$d0 zqX*)nz9&BgU~i)=DM!3Jo^WmoQljFR;Fme;DAD%wo`b%r2wcm@{qnTwRE`LDuli#n z)0`P^5cm=K!UoLSS})J2%TYcmvjb(A zghMIJ%J1_$bSar2%Be5P(D3@Y5O}>a2@gG*($D-hvG-bJD-@J;^w^Clc@EAa4}M_$Rot{SOGOa|8$i6g_9ht|@?*=I z$D8Q3ySq|G2N6+eKYe81b0(eJxu4kYv_C|sTAe~{#e)vQ+H=?@jX;PTlaMZ%L7*D= z)<;JS2q@qs+SP#(%oU|{Az-P@&i#xTuqy95ci@o+BD2W!32gi&1a#hbZI>;vDU{@; zoJDC}eOX>((;S~oQ>>S|oL|`oU_WCdC1|t`9ZAyK_Ja=%(YfFB3mVc^QaT1N;Gu55 zv5P~SP_iT|lVBopcF<{&d3YB4u(=aZY7|;0sBi0--qoQZJG-`;r3RD8SYZZF+R39O z_RQTJ>KaxD{xh-a@k&Cu!R|?#nc}qy3EXR_Kq8TNeR1fIe0kqU!jA3U9)*U6mE`1= z-2LL83P&uY=|uNrrbQuv^AC)XIQZjZR-fGY`^0gb@|Ub>SM>7g${8tq z5>rJykRL6_S-rtgeLg=&RT(_&#hv(k@*m1AWJ&0EYNGi$mM!h7EPNblBtn8#!+H64 zUOJP0RtK#|1q)UO?^p*=*LVG49%csh2opkWS~*Z09wQi~q`R1yDzco|=h1lj9o ziH@`s6NqJV^9H?J&~f)$H`_a(&TbsQJGhd9}B1!(M~l-t*o)X1*@j(m{;x`e6L^tn3@c1<{DUe=tWW z>-~7}osHZ3qNnIj&+(#!A)H#5FH$qtx4r##NS|8Gsy^mWFY7go=fEqa$7BRGFdV)s zSZJLdS&=q(J6h(9uc=sUJ7Uo8P71lh%g%`W-C%tkGimm$o%MNl3ObEPrlU-b2-l=0 zpE-IBHOw9g6-G`k*tYTwWsJF`jRui=qHvx`BJdk6Vh=UC&yi67^}Lc3@O#KoYJ&s_ z_L8^u);y=6l7;gBYX#=A2&uigo3)e|6xSMX@cA)g;=+bq3rr;T>nFa)tiJZxqnaL2 zBXih6NKN@VnCj}UzdL_}Z|^pLkAo5p3V9c_0b0Tf?f9|(3x~t0{PhjH8xw1K%A*+n zmH7enxYxnsn}s&!b0LEXjF^RXQ4~P}e5T=@pvL^2BM}jiwmVxpp(MHeumS&B7SrKm zsa99uP15_g7#IvI5zuJImEtBo^yR=)R8%l}8QoqR_={1SVY@%h`llCTqvav5Er97+ zngL5t^3K%Lh63?fpfJX`uU}DS@Fc6`nYRA^+iOCD~w$$HCzAdC)o z+{U`w6t-NI@E5O#`{V8h%Hdr?pQU;6TUZnEsSw$lEz7iL1sZ9RNn`YpOm$sF=QX_TO(M!^~r*TTs~jpsX?TT)WB zYqt{o7XEbVV^Q*!hPo3dqmPFuf;x54RBklJO!7P4&niOjk%XGtS*@Ri+&V;Tk&09V zI~5)Fu7Y$X$X{fVN*N3dVygLzR@K!8?An?9HckCjJwK2}H*9<3Ky#gwc4Gdx=Z5pEnf3-N*xI$=yHMJka)zSukZHSx zqK*dO9Z8rFlkxejT>6z09*7@!iN-`9=yRA!Vy)MH{K)cWc?Xr%QcYaM%o`%W&UEKF zr#>g24e$Olufpu{ej^?H2bN?q_Ny3D7D?|;nbGRi{lHeh&s=dD3Evh3Gs7e7P)-=k zvdTXD4YvswF)QtL@P6brb&X>_)MstJ+uGd7b3Y#uFz>{RH_l;c_VAA>Uhn0p>##Q< zF9m9&9|cilbYg-*Eh%T)f&@ID9FY=78bhu&JI7dyWMNkyF5Ij?pj2L|BJ^>E`<5To zFN(4c^L={#_UaYzR)S?~h9_}6$x%w~HLCCWn>{}+EwHdZw5#^#?znV{i{+?dPsOI? zwv5i5-wJ<5)NnWfwQy{OFWl+4`w+Xw@+v@$eUuzD(^Th^RD{o~okelnz0P&Qt?Kq> z#5ZFq%5NwU`J~q)Qk4D{O&w*jU4rr4OYqV2-6k+C)e_f*Bu%1haI75L7%OZjURK@O zge5g|#IYyYC4?dB?5{UruVtge^L%N$*YkBfbEv`|ugo1?l~560K%ZEK{HU0@ zjiUQB!a?JxZa;;lZ!03)nXo)OYpO&!!z}g}r1@V3QP`b1{3L0g^on%$KO2`R{2#vF zDk`q9*%rkef(+9)>p)TNdkgpDprAs|l|+jydJ|8j^R=wOZI)4&4voOj}G)DeW8nB0)vU9BkA zT#+b3<6j5d?LGt127&2(xgw$OXn)V<^Q4Krv{h9~-E`{yX`jiNPw6-8{7h7|4HgXHn3J1C_ z0om~QqVO82p~#Fz{qBpcqlf=AdyVbiwdXU7fCKmtkPntWe~5zjww#dkw`|h=$|6`y z5q-Q+W7}Yuklq7Ju`dlo-p}n7rfkB^Rn$pUtHD)C_86k&(9j?o^%3O1K-IQaU^v$O zf>UfkHa)ZbUHwXgVrPJN8@g!$uZ^4JOE0F*g$>Is2%$S-BC=*)2`1xQFrKNl)HDL+ zUg&;4g1}Z}p%?wWgfh?%i|Q-Q6dT=;d*<#E4GHiCph2SSeri#&t}N zq)Es~N5C%o3yR(KQ|(BFYPx*9Gt@Wv1eS(Vtkt#{ir%JG7VXG zW{>FpB$VmEh0K9VkM*JxVD$IyddY!qWbW^~r{O)WAN~Tnj9wOUTE|sB1Oqe9Z^mC| ze>LFWLeVWR+s#?cl#72y@fr*=rc!~m^gJK+8M0Mj>qRMgBC`FV+ZG4P9f@nK>;>P} zerC@`j#(||K`CLPEJg>s32eS#vDb`nLhQ&+>Ye-O$8B~tL)xkX|nn6v|tX@dH1K?a}|YR<>%3Kv~5#$gqvI4 zVcV7lgQUCzCf{Ovr|YE7PkqX3AwU}>iXQHIys`Z>#=G@6_&oVIcNAa^S%I0|To;)+ zVR&^{U7!}|8UT;mc-SZDLuNyw z>ueEJRSa5RvPe04cR+C73@w&&3jQ_R5scbU^6a3=;;(OlPc?sw&7Rupel*m=;FPv> zwCh(tR%~n^$IfbAJkX8`=C?QtSsK5O((9v(nx3b_jjzOB<6)aKJ0C2xS3;(; zx@KL%2wz6VmigMYxzPwcjBR{cw(iLE1Vz);6cM0x&}*&?1-e^Es_jhFg}n6*5kX!` z2;Il`41Di+T{U&j-KNn^Lb4db9M?ZM_q|;5V*1EI_k>uawk=*bAyVpaOQYyztYtb^ zwMQS@{<%x33Oq(e>xxpt6d;-ECAG=jz*enq%ZnwFT{siaUr27y+~qD*9UsNL_ah#e zaKvJE1sd_ewFs);`hL}9RfntwLGqh)|BrSs3}%#$1QbY0XQ?jh&0QCD)j zX@}0LAiRO*7T!Q|LRFTiBfd4U1H-`+wC|H&pg?RN8+rwaVRL#$w{MD$cR+9n)icUnlRwvg|7jiWF!f`G66<(88t)j zd@1((?q=YmpEtt&ZE2LEg3rK~A$L|^qbYTuz3@_PClAT_rtw;L*egSkJib*Zni?#;v9nA{LnKT)UOkw3AKrw_K zrjKK<4rDa2hLxa(OIR~Ub?v~Wp~irsGUyeN8g#z7E(}oam}Sl13pWy3sLZ#Cos5~%4Y7*U zaLM9{D`+>C5g41YddJ>Z$pZVgKZLxXAyVo1AprUIe#Lmo35d`a>xFeGZNJ+Ee3uty zxC?Zl5w3*JGrZfH|8y>4%cs=o+LRr9D!xJwmAi9r7S}T3l0Q_RgrKye4Y(XpqD1vo zxFtd>Th3UcR-ktN*Bsqtwcvn2Nt9&2T4OivF7?hAw0#dhjtyOmWPvGjIfVQbp=1-# zKwj3&+F7OL0hs~)T+dh+lRa|OsgzMDW*%#o%jCuuGF{1h;{}IwMRc;Vmuj@N}}rM=-&MQcnwu|*OH0m@DkZV6~OGq0pn~_^e26GJl3I$W@O@uvmj8^U~FWfl#~^ zC`bQGtAQhOZGEO&dHZC@3mlvl?jqA(vcN7}LJ=t0K=aus7cD^2Z_Cg6%LrtSpiYeo zGe=x{c>Cop1S}^fUMcw8R_~m`!SRf=$ni+Lwb_hW)X18w2Cjm_H-m_%p)5!(gBcP8 zZC|2L27;O|uZKGNCLV}y!x&=dM58&g$pwaDo zD6@iqEqCrvo5J~YqSod41_KM>ku6k+1*qHS?wAL?R1uDctM}AA6R3{9H!(adDK06_=A!ke^7VKeZ@SJu!Bg?KHDg3*!EbO`|D3h`BHh2OnIviw zPXWN2nO>4cAhUd^pgQ(Y1)8eM!f$O`zz(7Bz?}IgQbSzkA*=`#ygg?L8i<4RD9j6T zW81||{@YZ%an0qcPPToU*Z08wV?IxquLaX%l4w@S5eH-yVau)r>q!Kc$g55zb9V{Z97D>extg%Chh@)x zgHjIF=M#g2_2j##+6oXm4MI=cuKdpYQ|T7=S60nImx#?B!O7PfZZQlZB=#)0M1#ji z1U@fKuM*i-b%aQyzGSmqVxszxL= z4he$9&h$JgF6{l0zV6gzNE+2)F8^Wp(*^!#)*Wxff|U6oTzKFGA>){R{2J(_9N-5( zbJz-jp-xs4Ab!Y_2CU_`yzF7TX^ZoRAEm;1s6wi@`x7i}Z!ek?9%s5AN3;-0&IX6M zOg{}7pB01I-CoeO`QCtL=Ihs?L*n6QVS3RWm} zX#MzKFu`L8%t8g#>>mF9%cfB6)5-tYrc7k%6t?<0`zurG|^@ z+j@i&JCvyRSl-FVzB^nNk<~1ro!#@E(N%MS&v(vfFOUc;^9{8PoU|kIfGqGq4~U~D zh!LgW3hU1#|L-mUfW+XGF?Ip~0gYL_Kmim_KEPnv%dq^?4o5n~k@0cZtw_1Pr~YR4 zG49~6vbZ+2fNFO#u4|m_aio;LT_9E9k3pR4kgGQkUH+n`dp-F$benf6(st~O; zM32r~mcCF!TJyN!y+Qx62%YKKQOnA+QsLt-IwwXw|MXna7c52!N{hI%11%^32?4mu zul@<;^9E*gtKVq*JP+aI_Us<@IAZ-`WB4iFnPu#AYuKOL_lo`r33ixX+%Q|*sKbAU z+LrEE>k+4#mTY=#9nn6{_KQ(E^h~YO<*1UhtfbWL6B7F$WYHhf;% z6`c<@DwC^hUkn9ra&XD2VW{99Tl4%0Yj+F9g1O)^5o^aeTf<6NPa@`0je>w~97^^C z3nKs{gBcohzo`?q_Q5)G`*(%QC)bMFHQK=bS~bliW}NCAC^$0qtY)?W@_4bUY{;L8NpLLxwt?pj%eLDbeSHDS^H5i@Gt;Y)jlt=#xJGu z4}PUySufxbFS(iDa9W# z!R=E8pelT}-KXN%$d%RxOD*CL_oz5+xVABU`;^Jk40G^tx2hY~?wRdDz;O0#CPm|X zkEEN-H>0bMNanwdWB6Wc4k+F>%9{B#aLF$B;v?_YXlYsW@OFS zYbc2^2cVUu{DJE0)F=1fC~j!5Mam0pIRBZ?C4u^V9L-Xy&Si#@>nx5JAwx`p33N@gpFyZc+^? zknOFWLGZ5E!=2_5dCb12EHmxvoF!^c)N zwFN~#lma>g`)HdmdriB+ZLT&;`EIEY8{D&qIrlxP_1DvUb~7%<3aBu5OfOQ5LZ+9d zzzw;x(@l~#ti;FT+IG)VEtAWE@xscoSm>*o?WpAC_HTnJ``h=C^ycEXdUB!^3U#Ju zeH8-**D_Ifog&|~PHakr_wN$nsH}#>q9zwp8S9wt%S0)TH8|L?h2O||U?@sm$HvCR zyh<b>OSvc`{pleO!90yS>cj&a1aUUgeE{>evs7feU73Wd7L7)?Xv<|f0Fe0YejPe z=dpDf-WtW=^LRjRBb*;1X@pRtEoA6q@LOtbK+Vx-Fj#-Yb#O>|{iDcv_eeALT<*m* zaT@H`=5EIAH{QOKRUIQG`M=pIIcyoW4$U1){WqA5x;E+x?nqL25tOkLm zeyx>6n2!boFh6vs!Gqh4iiYxi(p_2XtphdKl`R}S5b2QuSXPEl05A*|fXVe=UCE8^ zx*ynyTSqi`{_Lj(O;sykqO9N!d8zn3;DIw6qc@i13DE6wTxQx|13#&CV}oUa>3oNO z-R^|9ZEyA^SKF+Heku=OYAvO^5Ddk#6P-ZvH86+_p@KvE3p)`g(18SgSUW_JKb%F` zj32YtZhJ^7*tfgc;57dJK1&0mxAYC*at9|m*^IvfAJbex^F8Ut4nUNeH zmBXzU>7|8go9pVe&?<0kw3U#BmW&Uh29Kpq7N7BpZ;s=>;vs#J{$z>EDW(!dl%i?C zd#A6YD?ZR*@^_K9OV4XxFCZZaOaA}zW*v|q6sX;Uz3q`p3AR(bof<)*W4hz-hDhyP zg^VMqDzjG&u9V zA#WgNQ+Nf}-;O^(3HOaMP*R8|sa!WvT~tYQTLd1fX6Ks|s4+rm0u#CCQ8b)}i@nob zDBgValJUVzb$WYmqvFL;6K?=~SQK+mecg|fS3AcpDFgv>udj*`JB5~d?KHp(epQh| z8)&d@o<5g*GSz3I{$WZPSCJ%TLdMR%Md7qIj1j+PWA+1SDGf?L?QvUJ2f?up=!JR8 z(gl?kk@Uu#2XB2I|^a>k&|cHthel(id$G%v}43qH^h{;1JH6Doau?> znb4@dAM9@>`^WBN`5yd{XN9XHITdrrHb*3j?_&cHQxMQ15sGut7JT1cp5&f+lK3+= z;=8rAkAfrP;_BAF+qOcPPUQM9u&n?^|527`ffQ>;h{p5AYxP6oj7N0VYmo8tvN>fjYHFKaC?XPEYNmjmMceZ zZp7_OvYr1ug`A20I{7>rIlL$hi?@E85IJUS1`1{Y3RFh1Q^PQGCrZ&}?*E`1@^HQ< z?nJX;;56f~NrHX0Jk*Z_DDP%V*-SqH9qy~XcB5K%7*eq)Md&y)FeCadDws zfsbba5!^TS59F~TU2NuQ--oNx#W3BZHzS};+z5B0ffR2PKTnbr8E_VJp4X5pxo{#z zHKxC_CYN0}^9kNkVrS~4eH!N58J8NOla!s_Gz5Z!yQ($AIUIK`Ecvv@)~xHzFyB^S&Mx>6Kl*t225Rq+N>u(Yo3Xos^(@lA z>XZ%ulkzx02At~8K-a62_v3e-IqVGr74ELtPR%9d#S?4M&A-w_%*bXcPw8`Y`iWO1 zEAfDesN}r6kM@nLbgSqWR(00e1!*>T{4SFTGDvt{|8np!>2Q6`aBcq%AkO+}o544`o;O8Qb7hEq8Wq~@0l3uR-{DkQ39R6*m9*%2fh3nZ|d-FzXO?sH{tyddC>(bb%-94VP_L` zM?3EpMJQloP~yRZ!B`vm0*h(Ac$009)+~<}e#F``-NZf6tvE`>+!yu}k^7s4)dois z$T{lWXzJpZ(jp}nCE@wBq^r@m6&%^69TF{Hvz$a9J!4a5PwjZoRGTXT2?09G9jlf< zQJLFdwz(v65H=y<)gVnFlJfMg%p$ak$UDMMOCz5(6iM8E?8IJC*gVTVqeokzhFBeq zCeKzEh2{c>~Xa8!aft=t~tVh?*JlzV4( zw<~QHBygL73!m{gYm+eBFCAF~XnqaH7G|8O8mLg>jUaI{3|JWIAFGmLe%yX(>;Z7p zrKU$Oc`{!nr!N(TOaJOaqLp3BY$`J?dm&Z%HlW6ufWzQsV1WXNzss#s7e>iFNf3Lj ziBM^%1G9Miy77D7{uAmESFV^4*K6xB)WR7L8fk%VmX@Mo1W{v)iZa*Qst`=4L1f?d zkuTzduY0>r^ux(UuhQ-otIFlyC9hn%dg)msdl#E>lqq7qw8-~Y{hN)xM*veYgSCEE za=m62?na-^j4HQ=gb^x zsBvAIb;QTx{4aEqbz>;}D##*OyLAJ_Iydm6JYmX~Oq~h_!rQ*z_dND9rd+Hv^^#A= zQw(C{s32GtXWePS^54QTbi0(zkY@IBK(gpoL<=!Oiv%T1YnDrRDl|y_GU{Q~4+QsNpEb zOB5jxH0oh@*_!g4=_>?%sRBPvys-Xu=}Wk?WBA7W)2rk4hRx;NNA6bwGcxm6U>)=j z-4Dw~7))m;CvZkaaQ>L)1zyV+>Vj*2ykGfHqH%1roYv?tACx{|v@Wm5*m@8Ta353l z^w)aIRu&rK8Etp%+6|YeUW-D~F=^SKq~xOlSJHz{!iF_QIBtp$B5vC>*UDn4~KEfc8BH>XTmVP$6i*_}kB zBXpFFOjh&IF9;o66>Y=dvV-`_cauBu<(Q>kF$(e9X@$ang05KT;Cqujj0_W+UhLV& zAiMDwc>}K*9{2&HA0xrsOZ0(~gb{R6V5Ed_C;|YJ9l@k%Ay6q2;KYX8+Xp_TO&YJV z?|@PFRJc52M)SH;db^~R{Ax&!-7_iCr!zKIEd%58IE38lpOWAfk*{j2zu%$5EZ+2w z)iY=wQ(4%{HuLiRQAb)m(c~rXz1?)?|G4?Ci(UEa-g1*R>6AC_7Ctc)!_@*RqL1!c zfb+vs2mhu=Vr^^Cud(U`d={V335D5ain3sk4q5yd{t7*MQkyzhcXiyE zJ<0&w?xxcj;>{|J!O}6+u2%AmVx{xZc8ha|nyIiAuZ!pf7%x(@YU|S+Dw`!=74IdM zM#8!Kz$WkEa~>d!MB8T0WZ&m1ue5JnUpV8cQNdH zIe`x*z9?@^GjGKF>Y`IW%B3d_`|1aVij~YxI;%3hIYhU|^(KkH!)BqgK`*4F_U0+1 zK7Xz|ctw%lPS|ZTT^aR=k=b^C#bJj_dfj>a?ho7-v+Q$-yYsOBPmE^&W9FG}yw9?r z2cxn)lXyXI6IQA)Qcj-rY(K^(erjIKhB+U8Jd0~VdyR3AdWg`h&qml}db zmf(Ju-zspo*y!;Q%%G1%d5?wpMas7WOQ5=^W+0l&HfbWQtMhQOLyAJ$WmMK9iAWV$ zh$#Yyk@-^Ec3;TinS`%P^2h@ueVm7d1BxXf_fP>TcSj@wb!z+nD5K( zNpN|wxw;-~Z}wmyu{7JT-et;4N-&h!nwsUR>*gF~RyH@pY$KJd+q13$ylmB!(b{sq zwM>y1H5>|3$gIXAH0UKraJ4^MS?7DK%J6r)oszs%isC{6fKi|IH=V;5`XpZI6B#aA?mrE6rI?YPnSl4g-!KMe1M1ugI z2n5gMbQp!UJj+BHl79MYJD-h)vkFt!dA?bq3+tY{xnJB?zEE-(5N807k5(r1y0L#j zVQ%9``xVb?nGt-bc+Zixaq!i`SUs-DALCxKruXvCg~k#y5oRJH@vX2n;jhxde_pP& zv;PV%A*rtLDPxR5HG@!`NS9JEVHKCp8ap+AucoGT5Xx}HqRNWgu+&%Fj*v26IBNw< z&FidTeylzls6OP&rLH>;}L zBz&QM!3({ThpMX^X`MC6lBvX1P#>$|;7nnGwS1VS^}H{Lw%hKT@>|?!*(cv-;-oKr zXT(S*;AXlXgl?UL=n4W>P%j9~Rj$%l#HP?lhO@lTxy^D8A(KROU!)>X=5@0^}sxJ+eKDRMz9?YNQ28Y@#09Eb!oiD7*eF)P9KM2u1 zrO}RCZy1dS@G{Y0_2Z?bdEW`3yS>3pJ4f~frRSWfOj#IbOv8Q z$)G>@yqpF-UL*Pwc$o2-J|9-V`N~af!_~!(Fr+H$Fi^kf$7P?_bGqPEE1|)cvB6Dj zCr|kgW+t(kbX`(g;CV6O(`U&`F-f#_K~IMi@H54$e%6-*$D_?kT)55L_9mwMFD=Z{ za;?Juqx3qPT2lNK8mB;YWvk%@Qn9tB^tHR<9niBKoex>u-q+gFvY(DsY#Siq%MeY= z@=|@*H>XL`Bz8 zOFgd4E?aHd<`MMH%<*69c78UfJlw@`qzaj}d73YZ>Iq?iR1a93ClmQUD9*W#_oWC3n7;g} z^swAgDc|txv|-G-o@rs+QzXx*Lu4E0fUHfBy4APX`V~P1PBgFeK=b^4J6gCyJx%bl z=+N$<>8C)pz6ENu=Oc$+4m*sr)B0C(JoZ?M=jv8#4(*)Mf&jqov?gxqwIH?leRPd1 zj&@_VBKBcDm!BrpO3D>Q<%6gR#JGRw=V^;M$M(24-k4du896oG4}f^lmYN6c`3yHB za&43g*ceg)e}$Az!X98_08EcblbQu|fL&y7Hafltv-;QrD$LcIu9xXrz0UdiVr2An z$^Qv6HDs>4zGl>l)0wMPo9yzHI-b{IAM+To0^kR=d| z$_P}S)C|B`lyEE8&K#Hf68dblauPnz_9zregy9GAy91j1mArb$!B!^*fI1VLby^vngy_o0r(Fckee^gJ#9<>rDpZaLGWv>sI0V?Y5l-a&dYM`SFWt+%_+Fq~3q2^VPFQD}$WtsRgB zPjaYA>h6kwd$6~^w{!PV7bQ0Ob7*2uvH>>1%-#$+k)W#z1c>4r2P7zNbC$3V*uyr| zxg3`PKSmnC9ITrtbtE77fy6p^RR_2u_PbA1N)$Z|RV%{|EleWZeXZNZ);&_fYPFl2nJ+cT(cJHKmcnc z?Om(Wj{?H)Bj--4P|bs7My+^_T>xI`EJPn4QlEF?Tlcl(p4`2gXw;J*E~9gu=yuiW zgwfwZRR>2W$-1Y`wV~deVyeE##xzLGM_9+F533l&S+dHxlsa4p0a107l`0P#SmssA z_y;;3URs1v_jw1wIFMASFc|9bFhbp;as#0@ofzSgm3Ph(eN)+PT(@Zb2bNy(uMsrw z3e!56dcoIG3qnxSLMd76KuuBXB+p27IvI=tfN!+RNO9uov)HJ=rD)UF+R%$x)#M}Kpv%`Z+8 zlh{qjhZ_MR$<3SFqnT*bV^Q3`h50MF}S6=O{db4@$ESxf89;Mxup~-&wnhZ~rCC4yAMt4*i~|075Y^h~vL7wi%Dnib zZDXTQWA^a+0FOV%EaHR7p>TLtL30wJ8QqJCqH5*l8tqDsw5l1&cFFk%Fyr^!5(=Bn zD#qJ^QbVEG;T^|(tk=oukB^=$9(FIphno%5XK8rag)p6(Y~{xFU8W$%G7x(LNQc=HId3)^b^ps*1tmFJminP!_8H zDi!KDV_-i8{iur^6bLY4%)Um?HF0$2^s3El6 zTy!Z1xIn>A)pWZYn^+P_ZHJjooN8L9sU-OGb%^|2A3h}*+Y^K7$u2SxBXmt6TjUUD9e5JwJTKh-#6 ziCoT144Dmo*AV;n5ADtlK%)9o-^Z2G1l#VyB+3s`bTmvJe zCrWDE3BhdwL5p9-l%y{(awKoQxr+*?o>ZU zI6j!!e{i}dSr=!@H)eCNS3{y%!)3U7m%$2ZQ>2NqRTXJINgk<)hwr|ddWNVX*uSyp zQkD$SkS6NrYL_$0FX=xE(ods5C$auOHAMkGFg>kiAarJ}(R}3nn&a%T?dx|YC<7l> zi4)$x4%v!FO$P1{1FIP>i2N$Y%(UgBi~ z@B!@>jtf8Z@h0C_!Lri0#^FU@p6p?=i&8rfrS$6gxuwATd%(wi`qAl!L>3W=o1dVOSDIM*P9t;s|2U&B0$ z`*U1Wv!h(z9GQo8uYY|x6B2khTf=wu=)t3yPXB&Tg<`LbTY&{@KyGw+7VCP^n{Mb3 zLBx-W28zX$nfrn@Vx{H?dx9gg3tXaZuz%iu;W?ra$zVcLBAWZF4+<(>OhsGRhfe(4 zNa5vFvLCO!^Tl@rX$7$r^qJK4&uN;L!d^#{(lK|iv$?U39mhE=eDujlZ~3q*{x~dC zEX?OIBp&N}8 zcZmR+wXykoa+28LW=$sDQC(O6r3+Xye42JR=g* zXgE@rMzCrgIjwq)f5^$92-TXRwBeT02Wx2PDUMU6nJXF3{&pS7VMDW7{ta3;t1U5T zPp$VD&3D%S+p72dvfs7UMP1uhr*Dkdpk8)PJo6l$@rZ6HK97VAj$FP$2q)RLRXnx#P?tK4cO#j4>K=59pc95g35STE16AiUnu{+_ zn=A9{~cQ74cVx=w2z_#Yi)0ww*2wedUMqQc7!`<+jjd*)*s8#oMt^O zRWF0M{~5mOi7RpGHRbxk(ZJ}BnArtwxEww6rKeA)7t6uHJ#1yTTULn^FR4J0R$b}x z+#^nl66)g1NfY7aJq;3;qG+yz3>DdBP8&rv2Wvn;Ka^Q^wF9J#)Pkl#n+XnJ(lUGf zucLBkGWmS@e(Sw8^gYPa*hnqyvoR1L29IW!d)VLkj-R~09b@%mq)J( zPqhDaxpKN|HeXg-AxS&}Mg2+6cUrFgS%7y%wO;g2w~w}m9@>ylI=@{1>g25Qj9JSr znt4Wx(@jc>?29kFD%-;o88l7uU7Zs@ewxRSv6~XaEu+ayi=nySUoTRv-sv|Z$Wo76 zy1VXz09h&E%imnwNqsJT{oN!(reZ7f{F)$|8yncax-u`7d?A`TMgLSV7)S8lyWvPh zV(pgI@c47+EL15*x%lcZs^nqIo;rlZa5yHLN%QEU;Ae(iCs)_<_?#jX=zB5KvR|}g)w0vEmHpkXX$61|jOxm~gFjR2_Q|OK z=k-zaz@Q?^o|=H?M*+2fK8t_iGe@2CwC@ZnOe1@WVwn{2I!rc8fF!Ms7DcAek>;Km zVP>1>PwyP}F{9tl0!Y%626cUH$?BDKu=w3R<~DN8Q|8HEuIbnG(S+H_@ArSG<54K!uV!`F6 z91kKlY3iNn7VrMMaR`vlHV0+ec2DN5mvT;jrcQijW^TpI`$OK4wi}fwUiM% zC~M$v!rLmz+56|-?T=piNm-JsfZD(nE$*AUz-yh^k|P_OBDQf5C252?n2ZRRI${vU zxyroF7nOnrl}lMhr7{04VDXutfhN;s7T^C=7Vn839`K#4y8UNX6JzOgyA`ffLYohB zo8FNTpxCs#)(+hM$6m_Vh=NFUge`M2*Uk;+g2p9Ce9|s;?hA#qn?aB5beBi{j5=i7 zpb~TPlGW9e;jtX8AT!`z78%fAvcn&NW6>5z`)Bf$oyYeJ;9jqHxsogiu*0UaCc6x? zR}0k{p08~u#`FxB$k6D!7`qv7f2ci1r>$_FM&0zU!D?T#gk?VEIB3*jYE$UC8qE$M zu!GW50;Un`e+#B1*_W^Z-hi*tBtMZ3l>>V>*Y!9cDL*BocwG_8`~Kb@1vhDlp3$etYZ)NPUXq8RMlVVse2c}#0WAr zX1idmORglYVvGNrsDF?DeWEaAcEK&)l}{Qn!+HS!gF>nJU_u(3rHC5`G09iq(Li_v z@3B48aC~@wL}MmGtSrH;dkh|?ZJnX0F)VVEGIFIh83*hOQ`EmT6I!D62sdY%xg#@D zNp;9B4{RN^Iz+^p(QhdZy2Wgvq!hzG4f^4N@@NyEtQGOnc#x=SkzXVX&+;N<6cLci z!w@@;J{n0@KL5=6Tzb45X*jySDNv6jYP3&(BKZ4N1&C5TBkgQ$Sb0cLuHhKDSc|`0 ztj?z|u=!9pMFAuM{gG|no@VNRL8DZ5=}a}urZFQaN%r5MTVOwJSd(}KLFU{teRt%z zxx>Y8v*}o(&KC1y{$8ZJG?5t7C0(mSLOzY5&8Xfaz8%3(**)||t5ojJJcN;to}Vzf z>|-?CH!q3+d#~0f&mc8XcfbR#;;ul!DEaS$Fx*#20kv)fI`ab%(H4ZVsHn-i-R)%$ zv_3W2_waEY4E6n~kM_|Ty{R-#b1D>DtqPZnZ zf|_@iD|9~Z<_RTzCYv!(pnW9%taOkg={W{@(fD4??OUZSl(NtsK1EzsQEpT~za}Yh z5XoukFnGKXS1-w2S(LDr@9L0m3rrU%87$}|!Jxbayw956G*P^N#r!l)3<}h^IHv}5 zeskpDLrLzslh21T9i36hvzG(*;R+2I#)hJ(AL8#v8<=)?3E&H>w)Q?>Ij5mm zxKsEnmqqWrUVcaMyCWHU;u=ZtYgtcGD&vpJ@8tBWfTB&$x*@iP?}M(hL( zHGdjBrc|+m-Sff3_X4%NXrSPWv0S|6v2Y?qn=`vG6c1Deae?j7>$8OOcwe^FnSQNLxG~ zBNRsaOF}q(T38C_z{~HjGV+CdwZ;7?N2wBLpuJySn_rO?FT))UZ=_n8pg|Ki z@o~u{?O4A2Ttn;5?mOSqWIZ*$7?efQU5xrNJGc+=dpJ%&5%GEgCqq4deb06!?w^X5 z)yOcGDoZwfcl7U(n#!O8Yz~0I{3z*Tw#Mw>=7e3nIW%@hNm({rqPz-5c@vVzCM)VF z!n|BfqBszTL*sk-l9niz$sY@S)Ta*=2-2#?LyonIf#K3CzxbE)w=7USYs`spWZS` zuaMT*K#X!Rj0k#Zh}r`LoWd$M;$Xv(LbWF;pGmSagEg7sO!0U8&2>TW!|Z}{O5H>A zw0@VHKW|vmhg<|*&%?XzuFpeydPFrovYNonBG%16{MNlOs@{#3JtUB+I-8ELaRIv4 z^IJE07|L9b>|?tMS^PnHYiE1rQwZ$vSeaIGbk91J<72;FdaUW8IzYEBd)vK0+?*4{ zKJQCuL`ay^{}}5_6bqM`(epi# z!#@)SbKKf=jPgI}W*GHl3G4v#sE%cuArl+eg^BMWOy427T1UAxX1aomz!pO@v0+%h z2re>%HjF-6*YY`toi8_}=wTe?t#RJYSBbP0h7Oin$ijVo42P5vln~u6q!SeS1m!0z zl_4$hc_jj*G;r@vEU|b&c5|$(P%>Tai(+s|NRs9mM zrQ&SD)xtgf%PmjVSlW~yYqf=;ze2XDcO%H;U$mSg(WPTv|JjNUS2$l+n3#)A>HO0S zF>rDxY&I|^ABcMkjL{LJI^LX^MW;8)cSpo3!i1?bf1f8;fy5kHZbz5d9o;>c&aDzB zQ$gHJ4{gEn&as!&_vsSGZBzPk5Bg+XFRNS)xJJMK_$f(pTjMR*hW>Gm)ZM{Jljw$c zgg!ot`RSDgXi%n>xI1A1B!v5K6~+IWJO-*ySP$3MVl%PdDuLnIj5-2X#=YgBuam-L zAq#%{@~A01`b-z~+6GC+$3+I8q^lxO#qZ7O{hh+`u=x?Z2mp(59NKD=zGY0agvOoE zf&DH}3~hMO403IswTVeLSz+SS-o$d*j_9B;vzm)Ogxy-k{a?YM>^X7oNc#U19BOzv z#eNT91Awx~@|!|FlsEt$M&SehQ+l$X0l;CPs!9zA1Vy4IKfwg}&fcmLX_usFSmvtL zm))KigUb#9+-IF!D9qxo{gspcLeUS5NX@+Y-q7{ddShVMw-qd2oFe&BR|^e7cQ-_w zp(H!Om_8M$95`SMhGf@Z*f?t$6b~tbw%lIH_RX0l)W$8>_ve`vW%jV3&X>D`I}4)R zt5Qv8iSx!D1p7Zqic#jnj?ewvcHjW;4zQGJWL0iGx}?;H9uXBq*}Cl+ao)goD`s}aajvEjfaR=9*J(} zZ{=up-e`W?tJXuI;-4lc5?tdcMjrfd7MqMqGH`VI$tmOtdo-(2?azOv5)=0G4O7F% zZZ_L~a`3%H`Bmg;Ind@pEL{cFG69V0pD-Z(ZKIB;TXFy%;X4J!K*?2Wt5QHg0@{<^ zK`X3%r70umW-w(mH*utFFX^g@gHSll6rB|3RbND=vB~phhvSmu6a}rDsM?nBTj#Ns zpvGy$otO14YNx&|A- z4=E?PHE|giU%yys{78KU$!RD;fdcKVzyVga5{H+_bB9lI2E6M7c&6g3bv;;k#Bdz5?IXvXbWB>kp?#{J2nneLmTJ#iLp8-}! z_yC>{Z@(A4n$-nK<`Hv(uz7Sj{6i5)8Tr{rPz^|Y)Gr@TpnGpfL)*+^-G)RN6G2B6 zkuK+ea>mZFyPS=!J3nv#y;9FOd9an)$@E9Sp{aDx+Kn5C@615z{oi`dmm!A0CSLs2 ziWvXXuCpB1n6uxC2spJ2C^HwPec7>17#f4c?)P4%kB8Vf3_CdQrxDa~%NCgLG}>HPd5 zFwoK@Y?!V?2H~j|#AI+7Gy$W4=C$YfX`2^_IzmjqEHBEOI&dWB)fL=X+^}2yDz0)Cd_GC0u0x;)eB}K1~ z$dFZBUCc*X-RL#Su*J?Ynfg__0kK#N1w28jZSR|R$g!DOIcGIY~(RP=xN3_A(nr#O75@gEFx2^A& z+)5m-(xw_&LQT{dl+L}hIts>jv#Gn-4jLI8PLg>WI}nUeP}x{Nb*{FNdn8*;4GN1X zW6OuLC+YuGLbN~`_}>%I65zLN+(-(tKT#{6?VA_#ReT{1gn~c;BT{LL9X#qAymfUh z1q>`>l!Hz-d#p$F)DLDsp*`-iJ(fMGVUPP!v}@4u>(Ik2FxvwlY)VqsesdkzHh0vs#^1P!6u>C#HfzHMMNo$dCro~OzW4bzKj9~XzAKEww z_#*qlk1^3KA}53?*52PN`?XmR?}dx#ksup>y*`Ei_67URnP<%d_=~CoaF5Su?{$Y$ zui}G9+RL@3hd~l99W!E*AJ*af7Dj45C%uw zGcEf8ZXzjtv8l?wq5yEbp+FE|1WZK)8p6tegj5;<7)FBQL!rJRIH1A$C0P8ORS?q0 znIy_VPm6!KP=C#CviXYHz*{{n_pxg&gIIUtV(*8^je|_uRh8Pp3SLl#0Dfjr%L>%y zD(!!(=p^OG#WOYH?ovl}<&l&u3xh5`dfdD8Lwh} z;gI}ApVb0y-9(i#^1+Ey0BM^|mr2{!BCh8qT)|NzfV&J?HzQGBGIj zvP}7qbkfVp73kRcwW8vZ@I$jZJsGvT8}9? zA<06A;uwJ#RdIEWEEoVi*?;wG^6=L#@I&%)`04PAG=cr7S$#KLnyL=u#|4ft?f|Wv z?bBBsxj*ca1Q=CS68eQ|0XL*$n?)RlactzVZ#SMf=U1VUl`7H_qqwJwZrOjR5vi;c z{$_>JW%wF!PZH(io5&-U`+)2WDd-KOKV1aK&!Z5KNO&miV@^n~OK&$ZFwCY0SfQm?q8Om zvGwJ6l4Kc+@wEY6G;UJ^^EPRxti{F8u$cJ=%zMY-Zl4VAS>$fFxojolY8x3^n#y0ier%lFo{pf)bQEM`uX_EI z@_SklKA6c{2KPxI6+vxgUr5Ur z0WD}r4zSZorDb&569=%$|3;wnM|bWG7zdCI@&N zx0cq=nJHE)*`fbz;e8d{g}(9r1|;HzcAws47w-enxVd%l=@ImP+F!#_kozpW-mVgQ z<0w2_!wnN@@Zdy5$d*{Q!2PKJ{T0oZX&<{Sk^kcb5WS!bd#?&?y(_3qd>i1k zRd&F_d|au_l$FkqO`_%tVV@A|KXc$%6ILORDZmsyZ*IS_@npVAqk@quU@Yw{vT>Yf z$rmE95sc*SfHG#WuPM`$;tb|T3Jx|zUQ~l5X^3LXdx^lq^v?2bt3bFNm1)eD`2%KN zd>uS0!K$HEz8OKtuqxxZJA3q58n^5gxch==kbwszh{sBI(fZ0<-YW@NS=FbP|HT1J zut}{5c!4ZJD8DKH!C#a*I!VDZ5J}?l*P`R#z(|%LAQpusVO%{vj&!FctvPYZ@IvV7uM`Sl+oHKiEpqN_0?{-q0bwx1vPUONe$ zF2P!@WLn%*EKLMqXk4!dICIN?B#shMBLG*EMU;BnTj)GAeP!DkGXP|HWIJ6deQHJS z`-*w#C7};-fD~*<0Z5b*GH2Y{f578dukZrrzpbD^8t6s=$_fJtXP4M=FA%K17POD4 zYd+xCL^Db}hs9a>=T^tSsiGW!;ekMwJYBhd-qI0C#r5=B{NhVMNYImbKauL9Ar(yx z5BPNYp05)+sPvQ7>#-kOOe>uMC~wpE!jEI40=%uKb0ES|});!cP=7&bQHbbx`~0E6N^&w3LiBJWfk*JFgL)$pZdGU^HF5vFW>t ze`w3f8;NGGA6>l1fTg{FJFYZWQ#V4o_;g04+mb*p%#MU&{R?gjLw+M}0B-9d3Tcv9 z8n5=lul(PFwhw9e(JDy6sPy0%qZ&8IlC|+&{}?IHnqAbWNpq>j==G07$MHJ8!FMwf zd?>@0Yql{rUw(PH_1+{q0O;k~9hAm%>rBv71?(${bP0+2?glFqy+qo~%%R6`n%>U9 zla$5(Q^vgnj9JMiDqw^*I)`_TF>%WHNV&}@&x{J8Eup!DquazRuLx#HvyEr4+22-kdsplP!u@=dePO{4if=b z>LWhaSCgm317o9N{=yXBEb*;02Ww9EF_Q^;LT?;~zZdZhfi z_)$b4emz8@d9dG3cLz#uMmt01jc$GrN<|38q{!zYN zZ$5a)SRfqBtDodzPTfminEfm>9386yrb7jW&NDeBKsfkW^D!B;_Ac>2o#-xI)}r@< zy8tQm-xLqf2NjRHd7hFOV1ox#n=^h2{tY)KI;|O-v5vK32z^WBeqsx=)U1^G$iNjb zALWOrMz}Lb!^Xi$emlNVmEyEke#w>J+Mk?`~f z^nMeYv&EN`r3Y8vhd-A%;#}-< zNNX#whKRdKHLARf=iP2xBUM=&#FQGF!s29h6!P>rp?B?{Cm1gHasX11CzwHCWyoF} z^T^)&VUz%W7ha~JtSgI)0ljpQ7`R%ETIl=1XEaO#+g5*bR-@a3H@Qocu=*}8iZVUz zD%&dT-lMNhmwHB%ySWgaGNgI8-4`rpwQfUXc{I z$qQltaAJXN@EZ0&xe_h%1b|BY3#jaGmDa_-fQq%YtBIPFFTl`^JWP0opESKkRTZ|u zL%YJ;FzxE;!7eq!5G&uyNV;~$i_B3LqF;+S= z+*AdC5mx0@K)KoynS$37=FBlaQ-%P>^oUUkS=v%>B?}U4*Y8?LBptAk)5iT+j--M8 zp$35Sf7f2z;205~hgMR+F>gIX$)DZ*bKU>m9|ci10neT-K6luWLpk)_XQTs;0v%YA zq(XTdeP{<^goLDBDP)8PCm8XJ3jYyO&EgxFJ-ecy&h!!;eRMzQV!JX1E`MC@#fiST zyRk#FCZri+#}8@(#GDU&ZAhPYeGvH8qm$goaPJwgcM4c}g4A@@(PlNc0UajA{ol7m z5$oM9Tnup3%gbgkv`nbcH=`RE78KfWe+xXMmF|BJB>zzp4*gB3e%>K zqc8cFmrc_6|7?<&~g<8lXE_wzybI16Q1zpp z-ZPMatb!Q$r^SUosEbLQrDV{pb>(B-B@)BQNBtZ%@m z*#45_dt4@H)XKjQcZIPdwD?u12q-HK_}nn2XTgbM9MJ=vni{XMp7wUzf2PFvC(9^+ z1!TUWSB1OB#)#Wd9vkdi$?{RuIB5O5g`MOltQb-p9xD##lCrN78}lLC z5tQ%j#W%LU3+?j!m6Gt)|aafV9SJN(?$iKd?~22yNgJb$kG>ZesL zejao5COaIT9bqt)+|0>&pV9QqTO463A)$+dw?G>67yaF*+H@{AV)Yj{%wIs6^51(A za6(&}3KYvZv$-DWp+4R7FcpN1zaDCaCW1Kn-**NZuoZYQ!-kTwCYFq&X2M5Hl11n@ z2CT&g2d}0^n4b>X{|e}BKT<5Vwh*9TPF;-Ink9t<{PaDx5<81$wz%%s9qKI7T8K%_ z{niQ?X|cj1v$gMi72?<+GDg^Hu^73C{{9_i70ae1s9O4ZtT7Oe7khQZKyAMGd$-;A_?Gl*awoT$9cc4iO4OqL@j#>u=h5 z9>UQrc*TK;<60xm?_Z}W_tXBY?d<$N-Hkm{chr~ksPZ4uqZd_{7RlRNg-7@!66D}s z-J|fWwa~B5#(iO^?<bSWl)a7&^?&kDX9vM?!|?9ac( zER_0n;#Qpd%yi|4-sy&O104yeVyNbYEK&@8@`xJZ*j!lI$f7hX4I;dY;fpsbKO=@h z$D==y%GbQF_)qjc5Nuc=ZxP1~d7#2Cf_bUFVRQCRegLn=GZ$d4{)eoR<4jr9_#X_x z1pXChiK|Y3VesuOnOQ&cD)j@Eh~?aD41(=RRYdp9dZrOHPx}l5W=bLh|DzSg87pMm zQN}<1s(akLv)D^$dG*Wi_o5>WEDt4bQ@GS?>NnqA*n{vs)*y;cg=u|Q8>qz#nizGR z{pG~s&Hcb>LZq9P4%yk#vQ3zD>zF>V`E2S9_Ka7$+w5@DBVtLC;|tu`Xfy=kq!lUKIrs~F!(Kbd=mWt3Ou6Z6d}Kh1U#~$o>sx~Udcw)qxisu z8d6{$uEfjwv-(U!*aJ|rj+5ktRzJ*fDRog+i z;+)}d(kG!NSFN*$x&*yy@F9a`g=4B+XV&hR^1Bk8_R_&Zx3LKrn2qH_*A^< zBxBt4PoEtP*Tyb1H@-EC9Itxu`N+8G@$PcTy2&RkNUY;OIH4-$;9X@Hn_Dq`*hz=Q<`FN#Na#vL+E^!}#_hzx^qNz>k1T z^Bd2v2>1?eKpBQ0I4Q%P17lPUOl!3KI5>aU=BC}(eU_~^ikTv-eShm1q%fg&(9<-; zh9R9@REzNqDD+)LA9Gv9n|M9vSwV9$IIvToa5#E%x(6ofhz7^z&2I1UB;V_lPBl?H za)2kxqXaB`7H?{+YqWd#AEm?s6DOIZ!H2Xlfhq4BT1eUJa$E1Gad@s1G^ScxPt;&= z9Q`KfUKxeM;5`1y&_RP940l~#pc8w1BTU?5L!R!HXf_q|rTakzJAo|eJ8&xAa#E9CZv9T^GNg7;&0 z^;?wK?7-a|d7mW+-e2N_qm%BeNfiLTq%T+b@eE6{EK?tSR1OTd=!;p?TaN)$1DD)r z*o+wPQZBK=wNhW+jvO7QEd(J&9`+LA`wMePH(#IOTfc}g@^%?zS`?p4*28Jx{U9QG zxQ0tYE#ggd`3)@SAk!Y;HJiTT8XT#NO&`$z$tbpw*ZUiM(5i zt@&!w1l105`+m}9|2l35N^UhpN&}Ldk|5-7R^N5$f#OOGAekQK5DZ;Ax2pd~* zfdAoGqf0_4>Xe0k)Or=S|9xElF107%ZWB%W3Hn3QS19ARfz9JJ^^Q*a&IcsG}eU&kEj`^PgX>)07xpcPrNVYo)Bhn}L?$B#+-qO?|{s#T=bYV%En}| z%;uvl5o0Sk3ccJ+B=1+p+W_C+qV&aMt&eKSSIKUjgNkg}1UbY;DW}^#RqQ>?sjGg2 z&~xe05Mkrr@10`_0Wpu&Ah6A6f+dQD`GIHqE!kLtq5OO(0iq=#s7G5vz zA95ULO+2&rvcvhrCmmE%&peP|5M{~aEO1pLYPc7ncaN_HZ6bQC611t0w9blB(o&+M zMs$kT@pAvsdVBe$>84^lHrvfH;VnJAO2%!6XTC%*K{o%mce7}P*J|lRd&e4Fs17WR zJ}okV38r(L({Wwe(T)*7||KL zBBvYoD?@6|9pzJrZUr1s*eB7*?AW+mnmzvTSyhNZUm9wuy}or%ikSKszC9&E#4TkE zGacxZKkGG>*uje#C}$gs{rGw-RA%o@bgt1)Rwbfp_j>~Sex}U9m1jP&QFO}EDHRBp zFeJdbPtXT)ITcDQI+uY|ha)LVrejf-0xWAefNpblCvWgWB!I1ZTGY!gq7FtDrn-0w z)45Ngy4x=`eK(22KTY<|?5Bsy%tx~^eZo(~S`9Rct3EO5`F1^4w>PCtl;F2Ozj0s3 zLa3*;%2EKP+ssUL;7{X|_C2}QyQ{OtDNA~{yuqfla?i)}zRRVGlftKc+}oO&=gK|6 z4mk{EL+$b;_-XDny0gI3P%$FPdX9$0o6S&n$J+hMIYk_`(xbi4*xMCL%8bE}YkC5+ z_=T)sYzc3BO^T+AB41XMUfXw|P^73M#>R|yy80gOL5oi(`&<>E@sN|~kf>u-(%ISk z;NFmgEjoM)av0Hb)ljmW@<;W*6MBR*6&=?x#XjcI8 zwd4YI;r_PG#Z%8uE|pwoUEDI82dM_tgTCKo*;H!-YwU${(0{;T{GkP=#$U&qTkggD zspTPTZqjsS+Uyr1VxG;Ys|-44iA~LXl*ghAllk)ISqVG{gUctz!aGVv$waW@1o1PqGkEV(#FB4XMQf>y^z5#_AqBaP2Q>phhoggp`qEH2xN z?mm3i+s{v`f|;8+6ulsvHRx%e&;h;PyhUA52raR1uca54uGfc}(ucLH=b;O>Z5}Ye zRWLGM2%=Ba5&MVS@JmY^Su(T9JhBiJT9%6PWSxCOe&W^$6 zNJPYK>-Z*{TQeiNJ7u)1Zwgl$9$rUHX&vTcI$HBl+T*6gJzDff%Z5Q~wvqUnus5}& zuNctSeygI8ax{mNwoAk?>$PY_cH9v|Yd-p#`-EgGjwYq~qIZi?@ry%THZQCZVd_&r zVqDy6rL-%az=GRw0Qvakni3;c6aZ^~l|o(p%7n9gAoq$=_XxaE@L(84qC2Dxfqe=4 zTe0&|OSkCyPf)*7;RH9cj-!AK`~5bB&mAC7w9A1C^1ZUk?1qHwg_EJsU$CK@_8U(v zLzVL6Y|d?Ml1DC1@^(xb5`z<_&*LB62P^JQDHCdsZgtH(nzX6bIy*Yv8XUQQ*55&? z2Hesm@COeIkG{CBWY(&CosI(*Mgvs0_v5Ow* z#=*G_ZLPoKd73vj-93~0qKpDA3C5w2eBa`ao^psSDci1&Asz}uXd9$|Sm$V8$o&q4 zvN{)&oZ*<6EzUKZ3qeadfu$4WJL$asojGfKqtM;Z9bxhw<>aNa-ZO#z9t=&lgkHR> zBy(b#(~hP?r>g+ z1+``~eIKL7J)tOg2+r%eAudsEFwzHt#>fBdl!$mH*Ky~^AR-M0#iBmBpm$s#%5#Sf zg+_}Cky0+GlP|~L__3Pc7_L=Ou1N%;NZ0`Y?P?xX%w>U>Bu(z$CuuaAuu)evRUdtN zO7J17$05A@w&ZXnYvnmLs#nWx!Hbu}6gyd7L5t5bRJT_87qC0HayYy3ZXzfHD6fL z+IywbP?SJl!LNRYUmtVbuEi83rx&)U`$N`utxabbDzuYpt<6&Sw26Ovu#f-6q>2Y! z3ju3Jl&eQ4^x8ZFJ0b{ucFGEIoYqYeExfzj;swPDq(4Lm8*8H4DES7x$9U zu<*dxZUHNY-Q+l>cz}Z>qeLHtYuw_~LwD9dpFK@7NF!}Rf!ysvih)(dHe|kIKvZZJ zuKOgN;Iibb7t?&Tam<|KOFD}MW zsii{7_yh$q8X&gUKkjGTt7o`cR$D*cj_7SxVSlXgvP>qm|HYU6@YLsui#P;Dx~$go z@ojwe(AYIl1&3e$?fYBdE<{)7nyc^Ls!uX}Bh=1Ts&0)N5Qj(_`s;etf)870z~R}| zT{5_vAF8d*@E1Q|5#{(!sz%psoz?!gpuon~eMaJ}(9Qf^3lQ)zkKbWeXtg=4?<>rK z311?C0T2mBR}e+sz`n$M(EkS*Fe$>}sGLa9`(ZT?7{1lfc=JZRgu6UW>}r>#F_Uu) zF_Xg0yxQYoDF~i0C{ZR4)PMX(tuJDSITa{fL%I3cP!o&HWzIc{40cO{d98Y6(j!9_ z67RV_M1By{M8j}MeRW@MWa*}c$t4!TW!1wG7U)pH93xMrGZfn)B+lFTnIX1Amv&rM zC#K5yL^PtZbCo>Me)*>TM|v_P;nI0R>(#PuYRI4>CT&&uci9z=LQq%(CT3{+;YZmC z7cQKPy1oFT{4{~D0UnA4u{N}y5*4Q@s;+vx>@QHN>}H9Qy<}QSgdO2m%kz% z(`{$EXetL;izn?ZwlXuQgjCkp-=Bb7Z;x_&YH$#I+SK826IZBO#vG#2x3l?z_PZ^O zEieNd@#LUX}Z{*h(Q` z?ayT152-qzO84MNzLDd+J@OM|ziWZV@n1<{HfnxJ!P6NWFuOhG-vjsiAE21%Btq#~k{Iw}hGbdj_(fdEu|2WW59K2ip8e3^SoPvZAKk~I%`z4GA+@M6^qMqg9T@zdYg4diiG1WW zUg8DYF-xLbcgwpuFrm|2iN%UJ;=wn6D(QwYdhQ03oxSNefRWfrvb8$8#+id#$~^rF5na|+}olAiEDU@$_MQ8Q-OW*r~Fs$EYOqvrsqT#FT6fh zMEDFCGXdwumgRE_pruaX;x8pr0WkC}p!hUX2962GtMLV8;Ft(^LAIMP$eHl)dN!hi zrZ~ZqsKrdv`R~3!oSXIu|K@+xZ)g>AFXtC@EIt6+D>%$BvK%cb_rRr>8rk1FGeqZG zat{`JdugdxfW8-<5b{%-b#hR(k7?LqBL=|2JHY)_>e=LK_(F+H;Do5+?~F1>BFb%| zjGUduWNO#pbk=Db6*t4;uvuQIKCD8)Y3qG= z4WA9-kU)_`%+4$f!3;rn{iupHlbTih)v^}*IQbJ7U=huEu_iAGJR~JUjtvl08BuYI zh1-A)s>#-r#N&ek58O~2GjTojyqYg>@Wi>ud?K zl5g6F9Bpzho3L&JXofi?z^V_)W&U{Di=E)Y-MSUd6ScmHF@3mKB2hDHsjWlTb@}wH zPos3>M@vV@--;1Y1c-Ly?<1PHIv5@Xirj`Vwhz+=tesDiZ|GhV#_r>NUFEN7eH2&Efo9qm-9T>J1DpkQL+6Y=0KyH3OA zsFRU7B($KeuW(%{ogBu8Kiq+FRfJ-JT?!aYtDfbl_7c1R#|#{qJcY`uvy*%Ysrzn^ zWI^+E{(iMTrPV3#|^+xEd`RC75?PviA@cZtP@Gz+0$y%Yy zNFwbK3^8{b>I;5RBG<=E(a9uce)o0c+pMzmxVRHn6`AU~C4kgv+5HCsO9TNYTMJ*5 zi`t{2{n?~NW1Fj{{|RYWppqG*CXZRi2k+<3jo{fCD%;R}!~$tRh~g+R^Z?Gt5hm2k z`R=W*nrYxCQ`I38?q_9f{JJ=?ieyF-?l{DvAZBSr{0~|}C~X@9uxGuN$HN_&Fj%Ed zg_Nna>__VhncP=?yc1%^iaI|wrMZE%E6@p-sATi)-Dy6MW%TV$S7Li|ctwLF`F%zE z_j|w^;k~tsI$yyHh7a}lkLCd($_yu?F&{KqE{una40q|%3qz%@hG#M(DWgS6#)~)5 zMo7l$-`qHh)s=sCJWDtf=7`)hoL`JbG+9`mR$!EJ?ohiCF-|b>>)AtPh-pI5rvt{n zi#o?2+nT~)kGs&kcfQ-jFb9)Hoj4j znFJkjv5&o}1p!YI2JcG(&o5q5{mA9pd&p^of?re#Jm-EX(K(WwFBmqoool9litK(z zZsnel=>qPEkp_Q7D?ycP$e}~V*F{a9(}Bm0$U)SN3PK{TR*b>q0|0s`Hrm`SHFu{N z6}+5&34OZVi!gIfhO#n#qyx0PSTH2LTrasJD7Vw;nP4Z0Ag4a6zO3NCtt;si!SJxfGVk=z@OpZqF-CsAqPmPO%3ykjC)w-e1r!-}GhOezJ{d5u zRQ`}CU`{EpyomFxt7+h;1gu+}4>EA()T=qkC1;GrhMvz&_eaR&S{vpwr5T?3Ixm(t-Cdc6nsI71&`7NV;v8bl+ z;cXgiY6=Bqb&g}~Q?7VCRE!w3O2a}tLV}}5L$G|>E3f#d46E3qix7fGyZ8#rneal& zqn*kfHeyJ;85V|0Hz!J$<7<>%PPau7a+ug{Ds9dZV}l3pGe;AcY`sO{ls1aYAwE?w zIMYuP$Cn4=eFixOLB*;*DDVA&RZA7QfLR8n%hpK(|2@Tv%U}q`ItmnVqrg*vQEG&x zOKF4z`g;h!rOuU>=X1hr0>(k_U|oV_@14^5Z@b>X;iVS!es)ZC3T!$%_ji|iu0W{C z|0(O`aGiSgR2Z%X*BR38%xjB7hiXTJ*lmdsqNA@EG1>;1dmXk;7iehC`YlzpG#xf5 zu)lW?WpH>jy5sRok;l-54XUk7c`c_!Q=4e>`A9o&`f;IdB!}Ty*rMDmSKOez$j;=R_rYQI>F3L7J87nm1 zj`gF#_?ttJXmf;cu4K(0jVhBcL?_AWc}T{EGsW&x;{gDTciU~fxX9f^x<6vn5aQ6u za5tAaSBrGUr~~Z`3OYdr-{t9KKiu`*Zw~XwFau1f6&DzrVq-V+ni80{6y~N!O$-7` zUfCY;C}mSns1gJ^NCOJxV=zoB#C_?o78d8(a)Cm37p}@&mwdT)ye(^4bi4BX-6ZE5XxHvNWUN*9C6zC; zWg?4z4>cq{X*G-Va)v5T0x7iLu4p63`pwcA=Ub^-J}3>k}=v_LC(%oEH^ zNh>|^k?L@iE_jM0uwsoCo834l$o8tMcVqYTHd0E`7kWPG--^sgb zJQ#TQzMspWH>c;fr5k=79jyD)Iaf0qVWC!$0A$CO2!YW+|@G zsG@gDyB+af;1rvdDpc4wfM_ufgsuuCXmEjlKl>_yUydN`)$*~RWOs|uT~=<;HTEvQ zs(!jSTd42bJRkgxyst~21{42mq~0>=u4o8Q1DCi_rnV`L?mUU_J_i{=0uA3*z=Er5 zbnm{|vN`KHCX_8|Qb`!xXQ-+cdD>@#>hXvKa$*-fw~o#Z{qpUf9IulfO-q7%v7(X3 zL-uH~`Kf?gOlNSSTU4`>friQ42s&2u0>dr*B&# z_B%(Oc{L^41s+Y(`YESvs;YOh=d8nOZFm+-?{w%6XZ4(p7u4x@N;WHI1rs}j-s;gS ztU6+NpM(@y2K3jTsGh`yh}ijrX;Nb%c00CFkAF+49ZW=auk{s?MRCOyBdF2p;kp;5 z>gEmyh5fxcV&l&Air&~Z8!n?w-Nnh%pf^R$%i6H7g@E_`8qn%dc#DRxk2bw_6EI*P^3AIBI+EK5e${tlOp3+Z10l0Dta3oF;B zC0b5}4gGm0n7)%qnd=0-=Eff@OIINtH=7>yZ!i2Erk^hS`CTLf9-%~N8-6UWlasFI zm0%dL@DQvPCk1_`z2TT&W6j{(uiq%0otAKkFwhN84!j)L*3N$~gh&yA#l+(PE7?XV zHs9^f5Vay@g}g^Ev|LTAH(Ht|UL)pxBOzgA05i+!Q|j) zGTRUTH&u06*2zsDuB&?~s1CO1{$c5{B`+@D9p5*b96xAkBxogVG3o)gOG;>85K)fH z>8+V>r=TQ(3L}mgYK2@iwpg|E^>l?pe6TMS1ZcFMdwd`liMc(7N7NqXpUaSVi3RebnbgxjTYdN ziZXb~&`6f9x;54b@UuXpFMP?CvY_TQZFJJj6~Lmn$mQzA2m=~$3#YC+5^ky zWe^6(6ktJs?}*iEnskg4Xecf|N%H8>(WQVG%vVOM%W!?)PL}y;L6WMrPA7)5?Ruz9 zS9Ne3(Mxx8O_?JL;Bl{?qBHxQf{A2I6Dl~^I7<-ORU?Qbj*+d+kAd?ziwUL!bjq}8uMzhgI9vw@j*a!$ ztN2WE{t-y}OZ_2W-DJhYdF`3dmwCqoQwsIgMB=fjtoV@_OKZTYOWW}qYmKRWC9eQ} z72g{@PWF@?A&-vXP*DDK%Es^IL--gBubTj=ksksY)z)b>JkwO@bznFeDH| zw$jIfl?=ae6=ZuxF&@Lc5w7kKa`q$rxvkiAnt!};%1yv!dg)RL!xUXS3Cd{opm^a{ z6Q4FkZa4N3<|)QFTF#9$YsJQ&a-jM?rTsZdzI95S&)hJUZj!R8W-Apr@HmaJp9*o2 zX^!dwzUl!jF@P0AqfO@kdJWq%=1co8yHsz8y^ZGu#?$uBmsP=?C@!5uh=-0l%OtH5 zMbs4X0sRn{>OUQ5+dQXO=;impxYsc`4S~w)O0>3Py0o@l)!Nd#pTS?m8d(NnOvIgI z-oh>HLZpK{+AQiHo_w7*7H&&9JCLZpNHUUL&OC3n3=#-2$GZh|DpNyhX<^u8a(>lv z)V`HfHjbWXtd>S<<7Er2YEdrNtUqYealSp@MUpO@VKJ=@vhiB?&p+F3jgV5^UB#;} z(#uGz@m4qw(=1*VeYzYnx8MH5@gDMF2$@86haJ~wa%y?x$}qgX&A!_|hxHNxdr50% zYwc>5#ZB@eeyuqHh(wmJlq~^b+hyQ|>fQ zwFUU#9UfMksylEY*zHCWPuOZ{ndgrL%S;>!yoT?@IfY3C8kBS~=*z|rU={y= z5Ezu@gA~R?g!cDp3^iRO1o8WBZw$y}`gJ!krPHB82@O5H&e#VtOrGr!fsuuI0`$uJ zJHpb9rOFve*ZkA~6yd{^dgOBLPlHD8c!N(Z-=fpXWVKqFG;Q3zG`HSdabqiLe1LFt zvIh(X7B-`yq6T!?Zl}vjbe6MbOC<$~8ja?Mn45nQ{vub;iJ8u-XKs5+p#na4{(q1ES#oB0B4|{3aDQ^ zUE)xBbAg3+Q8ms0Geye^=lH_jk!zZI4oL_04s9GrNes175DZ_JHXvx3C6vFy+gWL; zC*{o2C3khIx#F&)NGqq1`Un$>f#~nt8}cMcwiyPmJh4(%vxB)~`(@59eVhL}z<*Oh zXikUx*)DnUW~Yp|qI=_;Qr5>|E7wCzlYBL=hBSxE^cq9x>q9tm#*mQcQKHnzr|Qe_ zNrNE9c?tQ3uSwrN%g%5d;)i%V0ZEmC1AxXi4fOvSlCi)DXapd7L`;IG*URuQZ+I&S z5Wg3jqhkAnqC_$z%@wO;KkVI1+Ak*g@>--)0!@u!5)O@Fq}o|&DdMxd6;M)+1B25iDNc6`3+kl7VxBW5OMtgl)MTMA}YhPDNGXT*KGG8e^~MFFgT;bK7Ph1)Mh&r zh@R|CQ?>3oO?KV-_ES4gT#7on>I}yW@2?u%WEZROZ&kc^m#YIwd2?c4X!V+J_W5qN?+}) zh(|8hhU3)_a+77=uIe;xcKrF&6J(ts;L1*Qfa!$vhHHZs+per2nC{826sRmXx19bm z0WF~hK$ZJnx|lpz9JSsr!bY0G-P^pCJNFTrgY=4P`Hx{yHE& zyX8j3dlKz{U*1g%hAdTm4Ycc^5d@C}D;s_z8t(K`%XgE6M=O0C&b?aE^K#fzdS?kW zZ#k*;Sa7>wG3Y}BLqmJ+h6FAA- zOh%ruQn1g^C{6(yI+bDChB9FBO6enr;{?3ST`HYBM?H>3dWmKWkz^)l&$<*8X)g7Yn&)~1>Hz`)bt zr!u$PeH~T9`uVzYRdQ9V)0o+gICK;$kZ4)O6=DtgL-$75HufaR!Ay*eoI?gq7kLo4 zN);A6x4zLF%?O!*i{KRP*vRT4ovO+{X!hJ%4zMa~Av+4q zFxI^k>dW(ooDZ|}B!{TSi7o*E(c1G%_K*X>avOtxkVn|VgjW3BUVelLYDd_>vI#1uTf>q4Xgidw}Dm~lQmcr1cSK}vQ6 z{hBiG-98S+;q<~@9X38KakK*#?)Hmx{-?ff7q(%K|3%qX2F1B;+u{)1-60U%A-FZc zCAez>!GpU6hhV{7g1fuByK8WF_xG{SzNcQDvtQMHe;TT*t0}%U*IaXrG3J;wSwgC+ z0eqhO0<7iIK2P_nCfnDyZLHQoi5g(&SfJrirDR0kAWtt~--h6V6-E7m_e*>PBOC~x^nl-}5q75IfSak?1| zOTr2o5nlw$osa$WClquT!gG6U^GO`@q5+P2cQ>M>Zv=osNr zHu_p?=u7YN^~JzbSml=*S45df=(D+u6Mxo1Jzl&5RCUi%5$#5L^%`Mf=S>8clVj@~ zWzj7|W&%=jk)$} zPKL$$anX+5t>~AOpVe$Nu~^C0iTNnTM{&NL-2Fhe_P^sA3R@2YDxo4JPI+kYv~v}1+;76)OY%?MZ$c+iN%B9>sd zolX7((-k#84C1iiw~yLcfZ}|@bL7w`1fKY7QG9m=h1<{oEK>AyzzrPIM(L_DZTiR> zsUBl7_Qm%9cmXWXBdA%`41g^&cUH0NZ z=%^?{>U*FBpIL#Es#+r5>9j$J-ExdS=2LnGTjT-)p?`uTP`M3yBARx&~pDht7_pB zINCG(!x$Pwa4Wg?+*<<%kKg&Pe_)3Oz$hOc{8!H%(%yOWo4If0dh`y$JByaZc--RB zFX#mHvz?Zn$*=SDV13*S(yi3rvA;Lu1gtg6?C~BZbaQWhv;E0I_AogV7lpH!LxHl} z#BnX08@mFO=2ij6WcHVm;>UD(@*hFQjH@5=RvuVHx$^2q?q@{vcV2ZrY7Pz#Z5PwM zzNb^Q9v>e*K>M6I|9$@ZRaBP|+jWiLtFE>ZIPJJSykBq0d0OV!z1jOw7Dwm5ffiXc z)YSqF;A)oOd=H4A{+A+kD0Oh_Gvam}Y_IRIz7Jr%7KQ`fAg+S!V9xo?Nwi74U2b_t z2_+KCgNafFlet)uSOtYfjvrJI`qD%tNp#kpGU z%{2I5%`p#)0_c&C4gw`F!g!qFcb@v|m*V#qoq=luOXiS z2Mg03aMGKch}LK~-DeqWdQB6~Ajq?zZ#Q37Kh9XS)Ig$xe<%#Y|A?UFFmC7!+&BT3 z#EcrYG@P^SkR4zIg*oWO0#JZ=A5#`Y0a~j7!sSc|q_@kl@0U$Ua79uYAJDPrerU#} zYTl`@%0rZv3bcSlQ6z#Kzv@Y9t4dtSJU(fxMoh1QzCzoq?QlEo{g_gjmf-xYTzn2O zIzy!p_QP;6H2TV&|86QqZ5}gyFRfM6lQJG>M*P#}$i3}Y=q3K|#%5!0%>JRFU(`%X zTCNV?XuKL;xm~tbn2P0(MA+R{xoaX)3OK)o&XFMBMnfv&Vf(`?_~66e8O^F=NEDOF zY90fSoVy)RY5XrSSP61y5oWX?-f>WZydsJNPsS-21<_T(6(2>XZz}Rxpy-j|TIwze zy2Jjm6!PNlGQwta>jgInr-2a|p>1ri5HO7RQiiy%hi7WEMYHkjNqM}^f=81AdX06~ zWGnV7S_Wmh2R@8_kf@&vWtXJ3b*}ktXNSdDuK}sFi*#`AClNnJzAA#^8*mU{jNpfH`TatyBMhs5K?maOCk zCDV9&(z3PX8#v(8W_MYOgHugnF zb8(Askk9F!$7L(EY`dpmZE&_EXEbe?m?#Jrx#NiMr-ijIF}r!~-h!UdlI|X!2r0{+ z=_I4 zg$#-a8*ao~w#JAeLj}+;saA{v2#sB z4_&N_X)5Jb)7;t~q;Ya5uWHp=DTwgMeSO=gxj04|W3J-msV zlmZy9QmPX$MJDJn z2`(Zf!Gd)x#frR2XDQBhKH=q}iv{xQt*6*Y=L5nXmO-is(-Qq9`KzZ)(luTH;=KB*)fS&SVG)Xt2$M+CuPAZv-j zvDXwFTZ}hTd|G6!+;k1A_e;ZpLMQmV9aGN^AdVw|?7vokPYQbDGq4nVv@G(GSQ3t; zXhd|o3|cLet|Yh)hs$zQgih7km;FwwyOP3I;Bh6b@EMQidFjZ%9*JEPXRYS5__3}! zupowRL^#b~dmb2IC?B3vQV-KX;ad4Uc#%ObhOwSPrUofkGK6)v-|yS1sQMQfa#+`a zLdTS%nc7y813H{|NwhS*KD1b)O>(sHAiYvj@SqBH1fRRzVw@aq&pBK*MaZzQM&K|S z`Hd0?R9&?pdPjMp{`+AEklE<<;K!xEl{Wzza`>rYq%2|h$tq!Qyoil-&rjL6K1nLf z>^QC{K^51vSRS&Arj&K2(u*O23kyj zL^aTYY1ydnC@-fOyP2LPWoc$`JemH~d%PgtVtez8#n;?*ds$P_K$jb*bd_poE_Qw` zNj8iZPbD(_{R;2LvJ`%Y6?uT&u)=^rCF44>9US&&y`O?+H9wImX|r}Si{debc(m6q zTEuN8GB(R+gG60{($nS)BH-{R(rn5C+7d-<86AL2ZiSWQcfWteu*!_!u+K!fj8-N2 zQ#bjEym6b;POJJ*O=rv#_#SpxU)f8QKt7id#|&%32~=z*Oji$dj7dV+-k`(2`iRHc zQ#LMbZwXQ~HI}hQb-JJ+8}CA?=MS=vzi`rQ{Rr*G(=PTqk!)v=*`|HTd*9b*hd=J?O~%G^fkX~3{{?O1+C@@t;F#<>d5XAOhV^1rx@rNM4QV5RvAe4*%#8V` zShz;LfkV{cB=1Se%%Txh^zks>P*hk-#YLY|0cFm$|)D?hKOIPUWX04)T%sCIgK%JEQ$y}LutRR3SuKx1e zVI!m`aRvtRi@lKA^9DKbbu~}zqj?7Arn^ji?n)XqDprH|tfuEBQO# zmkX{LI6aKG(EfojDewWgNy2{cc5?PduTaHBQy>>$c(vZJIX~*4O13Q6 z&3}A^hd3%$<9(gZiyhu%T_7KiWx?{*9oKa}Q5B4a&#a~G_P|RInm`1Bf**=XGvWKlI(RUc;mZ99AFAlguF zi$PI}DDnNq1eO6*e?k}eEtT2!)O~T>=TOx@7 zC^lA<{{gD|0)_6u-?dulfs6JGvfw2}^XSn_b4=m;Xp}sxSG^z@c1WqBUq@#7)qTyZ z;Wk*U8U`NV1t+*8P7*c3P<$IIpzNQYSm3yH!GQ+1&cP7Y{rOy>lllvK)3scMm#a=f z7sHDzN|ltJ8?643pyWA?)L^P|GS4ug4UzCudDykER4U#bh;=)8ke-nKr>MbWzFDy<+vY8OdL zNB*u*!RgoC^E!M;$O-07hT_fW9a#Sx#hbf-2uZuC8HP#IGX)zAPDVP_RvOOYa#2?e zrooJdifu(GdogyqD;oob!hwV{Pgl*|8I1uC0>gpe=G*b%0t<58Ec3b;5kijm?(AfZ zuj@9@%+!fJS;{Q0SvMT5echXw{M+jQ4b4*T#AS=VC_mCN2dh#Jyz5#kWTwe5xOlN% zHm+20ETxERVDWlsx*L4?0Ah+I*(cTDe2y3jVX2DmEFj3z#OufR5gs4(AE@9%Nh4y( zGUuiH3%O157_R|~NR~g0GXuM+tbDQ?h=AlF3ls|fRs2|yqMiP6w!VD`*gFN6n0EQl zOtO*6r$kmEJ^C2Dd^ZTMQI$*CFWXVsqmW^83&Cyu>Uc5d_EIE!a{ZZACuoQMxgOr*vJb$U~V647*Tj=Z57I|`|{*$}3=-YB*{oRd8ysGU~0Qr%!^LiEzrH7;`1cFfy!PTq7g6y{{dRBOw!`>mij^!+tp?HG}bsN$>pHCuDbwdTiI^#hF z7(Kv#L-UV4p?H?H@p{>?l6T7O8L zMY8eW4bxG0oaiKXOs%RGH`LmM5>v#KK#8@8!*@I?|8>^s@X(7QZK4=H1IPVdQuOO& z!bzobkJ){XgVWILFV-4{>u@+;zvG#UpYzI`^TnNKK&Od67F-z8#tOtK8sMZ-UvpTB z@6+8_W4Z^xRY)qOp1Wv(u1#GqRI+OsQ0kXYXlxS!Jzh3}=q#daZ+&lgpk0Onp+-7= zFmzD+7mPm)3KB1^u--sXEDKKxd!dmOPm-B>jLD_p|1Lyo=GmMQ|pex@_00OcLi?K0ZgvB3r<<7?zeL90T zZJufU6rM>{43~q!MTu&t{4gj;#_|I5AsmxLqy#XA;2$0w^ZSk~TZtCKi6WZqs;mMR zr5wcACPWRZIK?BaM?cqYDj*2qyQ>Y-Tg`|_^H8!K#M|y9O z0h|P=4a(!w*hwMi7-{KXo0#*iOZ3wKle~Zw|Ek)c{OKKNhhcf%*?%JzqqM!ulU?1@ zQ;12U$)HO6F0bk9_M)trIo#M$Ga#O2*MdR}eW~6}oeINy4@^BF1r#*08Qy|BKWp4- zjdaKm7nY$mVE3>Ac4rOuf3J{I)CPx)eB$8=8X}?WgaV5@z5zhggj6A76uItPgi8yP z^*-JmJ;=wCB;?^r!V}m5VnTHc+HP)F3g5=&Cor^Ugn4e_KVSFzF~HsNF1JscjP8&a zR{2FAmnE7ZJd@oN^t1W>Yp+XpXeKT?ahJhzKE!;}C$tzo8Wt`)QS?URC|f`dH|o-R zvMheKd{y6CLM+xfR6)hjdUZG5NYF#Ka`JFJ|RWm&5 z&UGX0eVT^3sd*bE&%-S!OpWL5^B&IML;H$ZxlP%UeDwt-9F8^7^bl@vb>T z)hNZy%ng9Gkf{{z@HL8!+FW4KY=gW-;z~h_3gEC&r$a_f#GyKRH}P>nS(}Xd)hK{o zqY;nV_FX-M3DJ}u z(y+~?^u)kA8$dsu3*Itjo?>1_;$l;W)dEF8YsLQ_oz2dKAdcCZTP9(@*nwi#pw1${ z#Qm^itJO%TRKDF_6AFxo_-5|HXN8< zOtC!|hH|NsZ=toJZeb&X++irmBVfs0xmZY9>_uO-x9l8o(mqZ+D+myx%qxnTSIaiY zv8oOJ+d2jc^#cwqDFBAmV*SIWRRovtYxR7UTkAb;!95Ll_=O9DUNl3O)hb%cFdUB{ zm;7OluP$Ld8PXyFZpwWhO$YOnyLN4?a=kzVPT_*cwwV_-o0b9dG&nQv%VqNv$Jd(S zldAwv!Ler3f>agLS11q6U7aHB(T^{v_XD3Fhk7lyv0Gg_vSej7WLAsP;8Wa|g}873 z2>eCD-i+N2I7zEY<+_OaIf0%Ep7CP##PFGyL|+%Liw<3Qjq@OsNrm9+cN+=hk=-Qd zZ}})|krX5W0QU{|+L!@EaQ~P7jSPOyd>qW-D%B_P_mwVC@jE?M-An+mJgyE-F6UdH zL$aFJYAU<}U@zhOi+tw$>C{WMw;V#fuWsvio?jHJEyvD8yPtGdYt50F1KYcfVbZ$p zMb=&EX;@d*ZsuHlk4vj`z!S!m;ioIhP@VUd!ijHTX-gzvh#pLneq6S&6QV4oOQW3j z%^i8#h(r^n<;l*+Bg`DNYx<&#I&N7ExqPZtJdoERHS{AQH{Zj5aRJv%#vR8erX~Xr zKd>6Pj1XYe9PR#T)!+diFHyI?Ubn_wn$JeNw1hAy;*2qjLKUjeF1G7<(OUuWaRUc4 zJ;GLL)%03pC;k^jqCA6^w=Zg4zMo(IO-OCh_aFC_X3{-epWb4rTy)=OngwTRs7t;xl4Gm@;j;wmjM^f<-K2q2M| zeg-<^OL}bg8E%JC{OM*!QE3TD$(!xS`KoX#@kq%n#vevsc+z-TP=Ku{tkTXuxAF+0 zjJ%8Px{bjr(uA#t$6G5S|tiFfDv+% z)~PU63oPmP%-%ksqXG%h3`}tR9(Rx}9{!TV#-i zx!z~IXSjH;)%Ja8Y^VyBzqZ1UYHd=TLY4m+Qv!yxLUal7eqp|}(zfXF)$E~0@nNQ3 z+@Rs<*-QG0?rZbUCLdfb=FLFQVrY)+bWkzNoA9#0Ti(i2EkI&#+%m9odXZz0#=iXK zQ;CUo*vgsQ-3mvF>ZTOuHysLpUSU;z-lh;k`M51vzlT5M2VeBFN}tT<{Z!`Js6~QK zzk%DsC3kXk*5;TP2qAvoaJ<>d+3ZYv7eKvlwy@>6dy>yS;=XKeAMFXmYXbv>ryD?` z69C>o|D}qe70N2J+4IFZeFiFGa7;kHvpP^zn3C6x?V@43zK^lJrZhLO?0==YdpNgz z$nR)MC%9UZ^Ry`_FRcN+>?9A^d=1n&zD1s1vYAheiw{wSh(hVPM0RVo3e|5g$EMr5hUn1z$Yo%BV9geiXyMJ1=2kF*-7YY{m8HDmuKJrG0#3+zn@%7cGdW?HJ zG!V9&3Tp`Rn!tFF_d{Z=y!?)2+lW z5$fy&D{=;mRLSR|er2X8c;Z^CnGhjEk*jSnMKK?J$l!?UGeSn2c`tB$r2yo(jq>ra$CxNiusJAeS^3r*2^dqre1a!hr3 zAPd@cp9jgleha&HT)}MDTYB%BHyx#G@`CTQA*X;jKU!*rA6!K(TlK|>KF0W2lTg(4 zix*B)l4@Y^bg}D4B_yq)^V2F`3Mk?LIU9oYOA**746{|*JvTCQxWmUfNKA0jRHs3duNP0WE~j=s3`Q*T#7~qc0ZW=85BcU| zG2vHy5~0m5x^}&V9W=DZ8)0_a517WGb7jc44%)U#FAvWGT91yfkz#!V9@fDsJOSZ0 zmn0Eu;-jhd^$w6_o;O-9>nrbNHI!HBLLlxLDz|6ZoT5Eos^e7-IS1c!tuRTq>6Lwg z;l1LsHQuF-geyxy{^Zxf{Rrap8s;19Ndy58P>}}po-YCl{hYoGV#tt$?_(VFn7s#t zvzMfbEOu=iMCr;oUtbd}@%0H2B}N+B^+LKz7oA-(x3?yaT%``6rmchtRn&$ECXR#y zt0*p(85|nQLG=2%t*EI4=V5sv)DjLFGE!K!AZ#4Yz|W$6%<;}~1w z=n4CoWa(FID$T+J^Vq;Z9N%?FLVCP4%55`W^VT5?@CP76^|1g7VO}V!)qAOGNozB7 zOzL@ZK5lXBbn($)CSkuri4Bg}+1e2$!@t>659MKS?5M)IdHe*PX0Xk9=71BY+$ScEjRBM3Q2Z2nB@a=PHsJ5HAo_LxJPk=N+Q)`9yx z|0(@1F9F`bS{$*lT#18uzDcJSJCZJ<$SAUzK=LWgak&_aQqk>zN@ z3HOMQhQ#S_+zg8)@f8qX*fgX1rESNaaECj=HjB37NK^K05JMNxOCQY1CKHsAe6KN* zcj9}z)=1AWUxDL)-6yM9&lN%mMw%-XFhQ5N@&+}#LrPQ&LZc52(IH9{S29gqy`DQK zYzpf9W?LtIxsKv#xLCa>=4m5uy6ungc*qv7S8CHKfh>r)DLyJjjZ8>RrgLd$^~Or%R**HysT zh+UCfot(?D$^sOqmIR!iI{GtUm;HN1#h>hqvYA3ad42Kt&SPu)wS`7+Ok?XCn6t1lE?U~&pQzE-E`bL&&OA(e z0EUZ&i|o1mg=^~81#=a7$i%0iiBlVM+onYwzbvR!YpKE%qMan;vl8eCbivvCRhuSK zkc_5K%)MN)(9pn|Lh-)odar!l=QBKlPyh$|o;uO3F2yP)E6Jx!pm>wS`o8J7`eeLi zw~ULkw!})CH|8Qv^$_ucvVmwflLzg| z45l8|I^9P<%YZ--STHv?Hw>jA0n_CUyxQeukHGP;FP17a1T1Bi%9YPCmG`xlAql7( zrx&>7FvCXXk2y2avZHmzpmmidBA_ z9gx=SdpWtkru*sw(S3L2Hy#YrAmy=9{$T=jlUz35WAzB)jOd5NKvJ(yTU^pFes!Dy)**fNss~ zB#0ZrTYwCRQ`^(dcMHrfwYAHzVq~8&OUu1J&l5Oj{9)26@Os_~PO8IowFZ&xcKU&a z??sA~<^DKbDC_nQjD1j>)Cyo#cyj#Mp5-zr^>P#51jF@e?duTGcQq0X30o8N*sMIT zN4)pIJO}Gi>na8HGe~fJ=Vh_qu7nu?^i3URe+$4vVM(y>q59InE&N<{t$Ae)7sk4M zPj>NLk_GzcD*@9c&&SP{m?ox}E>qP_Oivp53hb{A`CvfFrknxH%8e|IvPzJ9y-5mx zfn{~Rrmyo^uc8i*L>XL^lnfrBI7k6fiU|Oq5+;Eo0Ssi|6wAn`vbA zs;^zNn2qfc5yS$fYKeLofASIN2x?>vdt1lMU9PkxP44y}D`aIK+h(P`EEa)lja1?Z zfs#&|2jANe1zy*3?p5JGG6;6*uIg&)n>z33Pf2)}Kv3vTsvSFmg2z7H3MTR-({M`` zUaOA&u9EhB=fBc)!G;{h%F4ZlZ-^8~1Ch;Fp5hk$-hW3qHS{fw9S2Mk(;bYhN=Z*Hsi!;1I} zu}nsJ0zwXg(D389reHlxLJ;aGEKzy-^3$ZDMpJEf8{r&pfzTWywCy?C%C^5+UcZ_h zc4HCvjpC`D)iAIzd^^E@;H3n4pulv!vyvM~#h=zQaY`G>JT)}h88y!$;at{hI$NKy zU9O+79eua?UhQ{K3ztcW_W79_K+k80F$OE@50|EH^;VS)lA~j$-1r7>6Gu0kRE#u{VF;`B85QZU)H0&Ff)O zf3C)8-ZtV9W-XK&MhN`Y`F54%ss(b)%}ual(F;YGyW;pOvQPzv&YOlrwR*oyob)rv zw7O6@TfOTm^v620qYPEs`Jh@^>%~PbE*OCLOJ=l4hWgKKTB) zk?CV${Gas#HsUuK=p%lNP1rlqPp{&DDt<=p!2Atra{mXYsTvBsM)--j@yyZhp2oKe z@#A;>EQy?IMvH<~^oSTHHIx3S(?X?p$TpnwG3!|8(!A1caZ+b9__~4zaWcK}Y(iVuTZyyiwf$mQJc<5(;79x0v3N=I8 zaUxRT$n_!Mr{Fajkt2UgzEEERm|1&2?N#mU0&n@Y^Z%=9n;|&t}U>2{wyeRx(K;KvO+Y1o0$RiV;MiPNDZ_V$gPRq2Lyo-0>i{2L=y)z1^P2)ux zR6r$A;>~5HwQf$@>?eNYwiMTq_T4J9ZJ^Zq_R|S})q3r+04BU}kSpKQY}!%m*L%RV z56GCnF7wHt)jv(bRRU0xX)1WBhBr6EcmE*cE(E$VZq{9>t)C`+yO_EBp@j@%U$_+} ze97Q5sYMMY zRwJh4jw@ETEYQ~~3;UwrW3SN8-*vohIn%?YO|rUPC~g&~)DSxi4-(jPAb4Ha$jRdY zh8VLXhRwyM3T4d&oP1s4FQ-`V-m=~ZnE8|S>TXm&N=Cuc&+?mx>xf*^Gwv1ab`EGU zZqxK^Y#ZailAwnEflO)m0b2TQn{UIPFBPA*f00pl104z3jYhv&*<3CmHBo)J}~K7C-CK z(fl}UK%a1)FG^Ww8TE8{{S`pqMfXqoOP8Gbd=%;OK4<9r`$FS z(*wv}JIEKM3bB(7ZWtE)D0}M)7(6@l*>pa+s2Ks}WFhfQGD28fsvHq~)|iuqZjjt` zb;uZ>Vv}-pvZyggTezjCgxybJP0wEDc_Q@`mLn8l%sq`m~| zbxj5LGv-IoH0NdSJFp2c%V>$Qpz@A!^}4FnGtc6tOI#od3$lc&ckA`I2%;~X>gC=+ zFT0z7R798<_s^{Xnk}eSei9gMT7y6874&FM7`|K@%m3BM%i&aQ76-4+T>O50kC8@e zj7Ww4LTnX4?Ra_O`wE0;=}^@H`x6~liRF#5mKKG^^r%DS&lx*a3vLuBNTbql^ zUIo%}_<1)fs&k-swl)kxk@*dO`SB06IHQo^F(+J$xS{cgGx{~NL4F<|fL!hI!HP^{vB0(?PeiyW zQa+04q`MFM*lt8UO6$snzc~bOwVtImUk*qmFvNd=#{|5X8^mwoqi^>!Z(_+p)rx;< zkvI#tCbS40!#nQ1JfV)jp;#d+vJyq^xq+_c%px7*lQ!2sTMbhJ4@6NF=wx(j!oLu1 zPNkGg|1;t=TPWW6L;z4{SJ zvz#H{7SBRvr$$;-XVM94-0&ZFQrT;ZFz=?y7XQN4{&i4{%K%S2Pi_{7`&<}_w52!w zf$Be;4_DCW9zjBLcO>ni9(~of(vawMqGT!H0c1+CuCmp`54`2_T-;VqJ{R|c@GcK6 zv5LAd-&k7WpRgBfCxvx#^bToV9=2&Jo$qO}K-4$jxUS~ydSIQbqU$#6XlRn~lp+G{ zA)dNNhrej;#MT=WOx%#|!^-)uV}hz_5w?qO@`*9PJ2slL!b`T7B?E_ieg`H~RRJ38 zwpLa(ffw7F5e7}eq}S?i1vgF-*4&%ktCOru(wx=|ajC0dx|(p5RKOMKieujKo)m5RD|YrL%1=eE#|d=WuAVRGxG^xgqyo_l}F=>6Nl zsK~WTecRmOh9jBzcV-LVU_gt6GCd+6jY`NmiEs~(iW@6sgn3NNVFnLwN`2i1xZ$Zz zCd;VhViQBT1_gEXNJ+eM^s~n17o)E3eZ;$iVXtD?kdGKjE~;{xvqW@Vca2=m76vM9 zq$}Vv9gQP1tLhNvGa$;(M&I#{$cPfikR0mE{_Awh5O^c2BQ!gPrAb*5jwg?D$Rp>E zWZNMWe1zV*)5b@-Isu60f08laSX1-H8EBqow~)Mv9e^pn|0Q;C0-~A#)}02^7!1JK z09|~Ckv9f-!2SNg05T)hAMOb^rsJjGp@h%A6_pK*{!dO1_!@=8M~c97#U{YhDEIf5 z7>gL3wFFvewbJu;rglFx)C8ZvmsXObg%YGs)5|baBFuL2L9r-Q%}*@WL-tH{G_uMvch6WL}{6AMvg@Ef`XnYh)2hSDL~th?1`saRP*_SEe(@X zxrJFFcBx9990NPMvo*ItnHByhk2I}v(QC_X0pHy+CeR@5YwU*vE&!A=RHPb@qDcX! zH=O}X=MoV?reAywI2y$MKBj~KedC1|VCT7I-Sw#e`1vU+7AFUS=B;Bl##Bnx@9$gk zUuPQWo7c09Ux=v<5|Buf0ekoV1hR!lCu+hWQNZywyzYXby1|@XbkP}FI*D$*L116h zzlVieB5aRC_DZC$wtN{(8DZV7;!spQ2-nJ`d=*w-?)u~qQvtM!EuHQRZruv}lGT!G z)}#S5X2$s=+O7xJT1*mcw?JrCa1)?MB7xXZ z2H#3cihw(7A#;rAawTrZ>ui(00y`8ee#}GxbJOwu%Vw>u%fTkr#TC%+>@Id7T%n|7LiC-iT`=eA3t3ha zNLh&tJiOgjJniNA)NdwNe;xfb08OQ?6}7bl^bfmR&QiXoikzopy`)kmHGS(Vsg~{g z0f?Obuh0wtLX$vrCZ-vfB{V+*T)Y1>G=cA{a>)7-?0n0Pik4~L;TuaJvIE%fp?2A< zC8rWYn{e6Qfh~9qOBD25(O8czejpjsjE`A8ytt_PlDP(#z0k`3oD8e=qoPC7^lWQ%2-scl^Y2@R&7hO=)hM!iLGOz>F&-Ag<`etlV zBo4~f=>HB@{t@N__Wdw+P zCSZXe??U%vWfEoS$StqvLZ8J0Zzl93N=Scbd84zAgS%4f*3M4<9-8l$t9~@a*clN4 z?Q)ge5nZOkx%k;;7w;QXWT&IZTGm1}=>qx{+9|<%ZGn3;!1G6$=Q~2|C2eA6WV|K* zALu=V@8o=w`T#gc(+5fy)~Wns=6~EPF(7IrrA*@$sSL zsL$^$HL?2Fjl>5hV2|Ig@YHby+pJc*9B#*swZ)rO&Gt7sw2DiYy@RO#;evRyq>7Bc zDjB};Tf(*49IbFDP|uT&sqMK!=GDDcxqz$tC*o7OtdE*Kn#Z5<%l=>w@1RzGvw%n< zd?@oBaRS7QcjXd)AMc1j3b25gz;Ks_2!4mnuEGeUQWec#*BKCDZ#koPB33QuuiMAp zAugc^&Ae%f@tp@P55T#jtBH~`=7HxP`VUuqAk3W(=lhsG{#27M1|w~hUHN=8-aHKs z^26cv@4^HDW_F=|1Lc;;V6kq4%HC%48M>^tbD5I`M$`)mxoJn(meEYu7QbeSLZ6Gc z_VFzY;b!gIuQ{JyJs^@+cPGzkQCsz2Dor8jtr3g=w^@A39 zHc>vcEth>$plN;!M;7$FZ?@Dx@p!wvvKU%vqq@ldIAh`_=l~qQevc#Nz~g!y~+*l zX3#axgfwyFKcb>P);#C0589nTE-Pj%u5xqgaq-SPa$o5+_SCIK++S02#QP}J=&(;8 zi^pBrS}$c>a`$?30wq;i)QWMYVjllhD~`U*xvnA%M}`@k;OD}-CBGD?Un$XHsIz1# z%+ZOIZ0`nSuuH(u!P6}O5TOUuJU+T0J5Bl7AyNH%<{2ptM5hM62i`=4mH=c%`T5Y#OzIUUU zcTFU7`6<=@NTx+B|T8-Ypf{kz8&AVfW;I$4} zFC{;U6$ughQ|_E@J(9AR^Ig4>RtGuMVJX`w)zh}EVKYl~ZTH>Ptd6dU3)=OpjLqRr zHG_^no4>&(7KYm)W9d*LE~CsLy+4K$Gs}r|?8nz5rA{%N6r!~2Y3e|X@CBYzcbW|6 z&Ep8avgPYuNDzV9U+5F!*a3WeJl1G)ZMDo z#AG}$&6!W7t@+_lNrk+HhM)ndWE&XpqSuu<3<%^t6!W|v#|6@4Z_FghMmo=)uWzU|e_WnzP_YOpcCMDs z2wKOy^gOpQ@8Vs(e<`r?8Mi ziwJV{4Hv7(b9J!~~kB#G|O_MzxrEw+K-qyY0IeA>t5w_8)xj zCNuBc2`lP4Po4|J;4BN(Bj}VAFO4{4gN897*;oCe*S5*K9;(+y;r?R2hM4|1$YsRr zNPC;ywtZ%9kv^vzqMjRXL$ve9K+`Fej;vRUE3d*{v}&b%-2!#uv|7WV?5{{@cL(C) zp4h>iI#Ru_Fid|KBA7zR5gvjA8>r50&Jk1JLgnp~8SXw$nOZhI5myZW6?We(yZ@Qg z=3EM%lJUfd$;T7w09!)4$xQ5{?Nq>>i3wWF;?g}E$F6cnvx4B%Y;G+CO(Z)3x^$Vb zVf*gVtpI)Gytphd+u0()%W6^yjTU&0b<-nipJmp|rwv>gA&h#C9jC^07FX}xEL;;I zeDBe`z?uXj?mevL5A&w-zu{r11s3ZO%oginb?Fs#9^BQ~Zi5m+$Z9Z;l76biFY$BZ zrOh|EofxFft&m)8xNwrF`yqyc_j=ffKeVNsgb4RP+3J$AoXA>Esv%e8DyUQEC-58- ztq}oJv3l&BigqCp?B`S_$V&sS)|NSN=A?lfFi&nJ|9F9g(R4_693ed4+x zv#1%BX2e}7aPV%u8YALeUT@iy+(%AA0?`l*nlmoHzR?voL)@Fyvk~4?gthv^ zwC_tq=X9(1?zd?J?zLDLD@(q4b*5oGH8TX#_)51PCdWOTm!+c%8u1NP&Bjx%^bdn; zQx8|b?tWX28#G|_Twt~%0nq-VRyl#FPHMwGIx3P;3IP%9P?BPU@%QK85XDHnf@beY zxjdM6;e$mDtVHr4f8a1243RQt=I^^bzg2m%#7dvS(%!UtIRMf*lWqhX)=&4l2xgW&R2PU_Uam``r1cJ>(bO330We zOAz8atndOmu=xkDz>o9N86-YD(CA9IUtP^uU+)utD6T{rj+$o+Y8lm1_)95f7;!#L zM*QG(K;4_=fOS-CP|~M{cH!}<3J$g}Qu65*Hd}b)4i@C%-i!4NpQLDGO4~%yd~u-# ze9tlCxcVIL2OaLMt4*bMO&G1@`+Cb_`e+~IJscloVdHN;Kxml~W#_B84sR`O^v=2H zWLvJx0c|(4Qj4?if^%+D$JHwMiDuvV6# zIm_=hdtST{YSKdln?m)dU`?T=S{9Vv&)akKEQl{-nlJKyrZsa)?Tv5ft+Kpznc=qZ zeBKmJeF>?V<)3mTgXpndsmU^&<5M z?MD3m=zIECg7g0WNrhMY>Mug{9zocz7!ver^F)73dOsc^LI8rZ2=?aqWbST=T58DPA9+j zOkQf8QBE3Ud4$WV3+8pFtCpw)^8Tn6x>3s{+}hV|8}W3ME$2>gI?Zu&UZ*VXil6g6 zwpJ}D?L$-E;|8uCeDdGhP*0V0d=vDL(P)51XQi>$)> z>0if=H<(Ybh-NHG)^pfbM-i@r>y--f5 z=oVAY{)di>67@U>0lc)9l0xw})#g!#%bTpBlgDY}6BQZWB@?H-UyRP#uGnh)#{u;r z0-?tD*!AbzN3rNiCM?Ubk2E5>E1MU&tBaDdJk*D&Rn7+gr@ikEr?US8E>uSLj-s+< zRkk?MkTS~5b{Z->WYeh-N-C?&64@iNR}Kk9C8LB6A+mSo`#CC|qw$>gkN2PV`aRdx z(|z5Y`}6(m`MtmQD~4S3f_zbLZw6{%B+j8LUu`^kGLlJG-X_`WiI%-6@}GKR6m~GX%Sl~Q zOYh?j_Z^+l(o-hakmg7)msdS~YRe^71z&UQ>ZJ?YAC=qJ?4c#Z^x-u!&BS^b!58 zBhP||8K1n3i63it!>-j&a^kJKrp2wZ6byDzdi^YP0_oS8cFOl(dfYGQ?RLVMPh!Bx zF7-XTQbhZD;#2K0PbRaaW(NEF_ADDFq>VW)7#n&BTg9~4*3Z`mexp1wCbP*Qrq5F4 zc6z=Gk8kmK()hi%&#gyAw?^I?oW469FH|z@DsrN+D}SLj&yMV6dR{&0Ti4nYzS5D@ zlw$q2(;f3U+@A4Xn(?|5&8Ht5b%?d`JZ)G^kbf&SmQ-|X+@~WCS;C;Z_ZX#Sk>6x6 zHJ_qid$~o2-h#YJK&t)MQTM0KE<>`_`T<9(uCAm!!NO3?%JjdGWl(09cG;)K7o>Mf zhLsy-M@GsOc(lW1m30FAK?>_uSf}$uo^eYs=w%hnY7z~{ADGiE4<7TfuHSh4ZSL@V z!5$$+9{W7!_PrH{59WFnAPJPLRok4nPCFaD)sF62@8cWeV;Y9fPc&R` z*Zo`|Gyk^1rr6r7_QKSb1Y()}Ph8r1H&&iVYt$VJrwpu0Jk_U4wI!jweJ1;+Yuos6 z$7O$~ez%$9*XjyK^O4)>{qJYyW%CY!Z~_e|Zn&tT<0@v>CJRiN3@STo7UvU4bI zJ~D4Q)N$nCg?sb$B0nS8Mo1jl!&5K9i&{GATum%N2&DLcDFaEe0PwS^mWBC8K6$xZ zk7V5UR6iOvmt@Vhe0ijB@q^ZE$c!PI!ZQ>4jKU`u>xcLP44yeEw5E;+8_!qVMdw07 zEohVfc+!lVD^x8R%|x!XFQ`@M$VkIWY1EzK40@^l+=-7nP%P6&ZdreN%ywYVl6H{w z?TIfw#b=9RC>^TG+UwtcY?n7T_$a$<^!VGym~J&AbJ-6w+IhV$>Qo-D$Q)m}oMe|S z+COS*QkQIfudKe%;{2r?m$Z1t#*?xIRgsQ+M`qcLZ&g2UlkQ_|?YADjFt|;BSJ`{< zJ@ZaOYWbpz&-<5#`_r3>HwJW!-|oMVR%MfbEO+USlyB51tY#8&=lyPODl|08yVl#i zGy+{JSf{3PbMJ_k`!`8_8^c8QdT3UTV?lc?U=nkQ6WTc zP|;oFpHiiDI>$%s5UNG~{O;n3cK)DzeNHVW<_xNHT0KFnkQ~T zaRs3f+1noo`c}2Tc(-5hD?Dy&cv(Jz!vt;9UJbL?W&y&2Y`3n25B(7dZ21;mT z*d}&_b8s0*g>O(OqHvm-^2}|Xw-EmFR3YT7rR?Yj{mk^PHkUV*^<^c~DYmg56pB9I zTBX~1J1-TqO)Rw}h`*m2`<{vUK)xnr*m-xX<|ZnX1atZ!lZQ6ZvP>1ngly|{iaE5~KEcIo*mdG^)8R|D*o{Q5`UZ<>p_I&@d^qdEFx zx?4tC%{Fi5m7r{z2r^LW*?Oc80k^=H(|A_@}J#*vJe@4 zID5l*--E3Bq;~}!^k&F2#dOGGnJ$075Iaq~s>+;BM!JA_nCK01kY%&oyo~5N7a8S^ zjRVQNnWDvfr}avG>|9Tr1DXE1qnbpUz<;bL`D!-@E;QIcN*{s; zE)z2<%W7sH|2->@z(}__#R++JfhUmzK|SQsDj+Qt=B+;d8FG%`HnH~ zJ?}g^i+G)*JW-0iRoZj`29kYs+nMsL>UEWGY_IB~^Lsi5T>;gk%{lR)C_+NT=T}Qj zY=>Y!+?)~tG8QeQf>}wqsJyiwlWf@uYz;qgpLErw-6OIm^5b_2&j<>S)|AR(R@_x_ zox+A!r&n}Rn-cZjpwcn@`n?!`IIlBYuc>A`IahsJs32E;)9C&3aS{@`u)bctpSj@* z%)~%w_d8z5`Uqdm64p(}RKsBy#pMZyKXF1MjGFE>=6k{k(tO3FtgCzsQ)!G4^QMv2 zJ@~Ti?WF8TgwUJu_l{SuNA)>#SMGSk(&>cu>u-J~?v}5Jd_{gXKaC#xaH&eZiZ1|5Ro6q)4(d*&az6aO634!wpjECgiwpZ?bX-y;6{#?3DT~|4^1zd*l z)b0<{kXPhp^qyU<@W5H365wWY*+XD!21es7xEcnXD7teufZkIo=Xb2qg=Y9-L}@pC z#E{i4{gAA&Q-!ZRZyP07eY?)x79u}!{$R6Q9njjR@sf79oZEW{ZZ5?`sp&=OyPFtQ z`5<#37;y@C%%-VA|J_@|8Y~H552B71@A44HvMSe3b%lL~4s*Sp5f+CpmwUpmXRadY ze@b_SNAFYsuujj15z`HHGj+%~#6xk!<#HsbM?in;;hzSAC9szqm~3xharPBxwB@0# zudd)S*$Uf)@|yZDCS%LtAixn}xP_jj04`qCL5|7BD~zxdRD>+yh0ThG z5xY_A0o11Qx52pUQqloY8e*#Pw*k`4T`5Oa!vWS@wBhEI2r%`Z=7NQ{5#X?2KYEI2 zCo^0~7tquF3@cb|MAQHv?yG?h;M-SXu`QTj=mI6)5u;;?0YYX6qwe9N)Qt^Hk4x?8 z_4J`Le14}8t_MNHegIHS>FNq`^vZ*Wlf11+=nV86GRt{DLmU@`}L$?6^as;eNYc>1Vju$?K$u3x|g9Bmg@7TFe1zmyMG$ zktcpshuvU+>@g*Ka6OP|BtYnX=VVQE6uhyp)uYusYJ~+_1_0{ARKK|ck>4WU(@gkM zC`EvEEo2G+3hP#J)L^eN{C0oU-jGAkd69UM%5xA$3s5>McKPwY>=LU@0LP9~_$Jv6 zL%8_-S#32wtRzF+fM@7t8J}U$!^_6Ln&e!~4^*Bjo4R8O$#y!6i_#5EfDk!XuWEW8 z>(FoJ;3~m7)CFt+Dw1Ekp~jiT5zmwh+jq>~sNO4Ihh?wnc@ySB z(56SYTJTx`Zq9`nfc(VSYd4e7`Bo%r65WKRqvbJv)oZxgL=14KD&xgaw_)+X$d6>J zRS_0o>}ddWXMgqUC`1>_>#w#daN49+4GY-~bs)rjx*pHf*#VyeH9HH)b_qcXEax^8 zjxZp$SpldEEstZ~kU>HFt^x{Lp}3u1`aGyHGp6@AS;QAhnN&5@fOd`kt74j zdP8%Qdt^|Rp27O9hd8sm4@#aPB8CKr>T*0k?z&sJfT&pHeU+U6iS4A$-5o26^qpIX z6!1b{O{_tFEw+4nK&{DB)W}x+yjc8RT3l_~3~;1q!k&{Hf}%E3K71yCtQ zF`m$UXuWlUq7C9)=9h$Hrt45ec_UP1OVoKjHT@;T?D%w&zBBq%)yKgo@6m?F_&0ns zn$zl-X;i0Xjw&sf^mJ5?RRxh*CFd64`J{Vrb1EZctxpZQa=pz-&70a|E?u<5DM4&v zHy$r&^bAewo{M9y&{I=qc+Hrjhm9HoB)8dSAi6G_-luQ91!Q3}S3C~sV|_rf;r!NA z_{Wo$49YnhNon*{OlLlK*ejM$2cv<+{E#abK@Dw zkS!_<%9bzb#BPgWEr7N&30Id9u?)cQ6D-vq{19Dw-%{KzqACZPpT8j0I>PBqml5!w za(PFvUi=dl3S5Es2*0M_F6H&1a|*MMKLBw(>=l_lC+N+U9T7Wlf4BwPO0-`gW7a|hR-Owl_JoQyy>6faDkQ1k;)rj*g@ zs(dFTL+D}z<%Xr=ldp(~1(CdWk^)w|cXEzGHx$;kDcWTtWs z?!5}=Q3*8PnFf!+pL3p$?>K@l>%cK1yik0Is9mEgqAP@MhP^U`ZUdc#mV;7SYPk}% z0=v9ZT^PE0d8*FL)s=;#UF*`o#zT1PQ_@OxKT0!O{Lq9UUY_xJs|0w*o#cZ5*`>Fi z#Exio6Z2@0t$$Fd68wx4*U^ezL{Zdtuy-sy=~D5lqvR&%3M{r%Yt=w)y(PaTy>RLI zs2fMI%rVs>Eu>PNr9Q4hJeN~`G{*6))TOVOcwa#HaJD50-QjM-qHIvg^wS%U#qK8J z4|Y~9_LyiW@UTB~0m+H`IE#1rGau|@$GQ8?1t7?|J;w{#Dn`7%Yj$Kttk%Z6;vFqKx)2bRsa z`ryMqI%%JKEwA)*&S+?zJlpgj>tL-VksmtsMrj*g=BesH+cU){x{AE%+Vni_d2s9u zv6G~~-dI0vYo#|jp8e{7=CBGO36-%o{)ks_=RHbo#U!_iV*h-$u zozsVodU|`1bLN%Bts+6KF`8fX$+&XUKl2_zXU=_HASBSa_&e5z*}3c!`mDJJLMZ-;#(OHKQsl7;U z`(nU5q>-Cv;=+(pMg@pS2^0^%y<1_>Su}$6h}3i~7-%RupPrw#?QxX!nOV50(RJD3 zKE8ktk{Eyc$fEMG)e98DZm;(mP5MAa%Dv*9aM^nT%U)h2-7+F{XbRBf3O3rz~`IiJ5kD#axbk3t~%Z@l_?fHTWQTzn^yHdcM=${f6A zd#K&{^QAQy1y3KtC66Vr+&=n})@)W^JvA&yRjr>v5=w{FIS2qE_VJbRiFgrv9UKzB z;LD;S=YTF`Q88S=8d)5FEVf5v;luOh_C=Rq=uHYm7W_4kRu<`lI@1m7z=bq$&z_oPvXEz-)S{Y9O54>5es&H zG4~XcvHY!E7wali53X_c%^>nw5tADaDixMbr1hDN;;zjp8V=5J=?gcnPhQDL@94aZ zr+)sI$yZk$W5w4K#goY`jPAsYf3+qZS$yHB=og=}d2OH(6S*ivLKF_9yKGjhgZc5r25RY_bRS`x27 zqR~qzZ&Z_!GqmkW$hv-Jy*Gky)fNOl;PP?V76HJ6mylr zx^q{M)O{p=Xv5>f&xfIb%^g~iNRR6SX;|XQQ)0Y~^~x?eZsx8xUU8%wXz}=kr_4W7 zWEJ|>>DNja|E~&c9W$7(6&?5Py`5|N-fCQ}?^r_0XG%U5XIca7ODl+OalyCf)t};A z#A>0e+P0C0nRuOYUOt@8tg=g6#~fcV1W+Sh7)|tmwjkOUxgukDHySr@!HLAHyg>9r zei(mu0Kdg@XxAvQSaAM@o?6?bd%QkWTcnmIujcP(A&@4=w%~`K9}I~d zBWl~`D&;aLvOCgNt$_I_C5O4*YFJ(L9H7Clm|JpRGLJY z@I>*G1vhj}U0r2fzI=JZiKbo+$K}AfREnlE!|i5hA4;<-f5uI30+hm_$6~0G7(c&( z&OqO}5l^ZAD7h7NDBlgmO&D3rBpTjLFgBa`v5n)Ws^D=OhnI)~s8f1eB@*ClRJ=`j z|9()E4qJ$dwv0e_IhAsc7SH*v%ICL>A8nD0(Si+hf`;r$gd({CXcN>67TA1*GmBhX zbmJen{8N#CVgBwgL~{A3Tl$qD^wbWW{u>k4;F(wgZOx&hQjyr6LbY}VfsdU_hQ~Ao z-GV0Ql;xBWz6A0l_6$fsNYJ^gkx_Y2S4EaU+Gv#FvF2xD#KK5D^9`j+$N$rO= z9d{B3fm)KIw35qia}I^p+g<6uqlM!VKw;9LwQTA5jam+zJ8@g95~0t{Ly0?VfjkPW z-JH#TWB6LZo6-Pj`*ZZ)>2PKptdh_skhEZEBj^z!>5BkWr1mR6d_BjPG0u``Y_~Sr zD$NZV!j9iIM-%wi_kQ=U-4{3zag}1Nh9>U-BtulREZK?t7zM9m{)!epkk~FTZbp&U z`99EV7Ix|5#upF%kADdVu@4OA>&d(aw_y1GrBaQsr`Dkkfuoa1j_gr|cAwnQeSeIN zzgGFlu~@NcNKIyC!(-L*1d5wRj}N-B8kO_V>^!%f zz_l)ybHZX*&pk~{Lm&hEt&;!7xt}!spz`}%x02`5_Mq0vj=NO|W%dr6``~R0Br__3sniiLHXf<9t4V;GgAY?+k@*fFyVQl_;2?8 z(iGHw?4a$F`O;tmd9Q z&ICU8W7sn#^#Fm~H*h+bK#nB(1CrVT$FuApHl}j=5Euba{@Bq^F`|1*G@>j2b5z(b zZv9C&R*{*4fRSq6?jwHzTEz6S_#NE8+uIhHptL4l43%U>RgUkPTGNfiSNmU>pd=vR z=RT;d3y(u|?S9R!NSG?4n1Ht2{Mi6iBThT9t@D2azm`zb2hg)uq#en=jCklxphsR$ zbQL>rdD!$Y7ks5aZW3-!?;q&Kl0Yb>qlsvR4<68`Tu@tO@V_ruq5;KGON;hw1TwA8 z9KUA&JIX&M++Xb!QI)RmYWN5>07gJES?eLP8-%X6f3xo|(X8bi9;u8la!z$dJr{>B zdfU~=iv07(zX%?HnUG#XA*IJV*ipoLiHJbM*^3<;AMe>^vm5H8lLLgN7gpHa14<3Z~T0w!SWvNMMazO^6l$%o`3mV=$I!%$k(eP*TMCAZQ%=_j-bJ*w`*6@iyCHXPw zZ0WuR1!m&i%(*mYM-FKXf2~?7IFbL0z zc4V7N+(756Hc0Yk7W`&G=Yqkz#?_weI88!Vm;H{=^x^|{aONW*aw?F>uMT0qx{v8U zG`+~d?qsCYHh#{&fi4WyOG6-SIePF|Rh5Y)bnDjasQNo2 zL0>5#Ph<9Xj)A{~NC;euhUEaHKs0GgPZ^ahk7ucd{D5s1ItKQW;l2y-llVWw(NG5^ac#Ex5(iBPnJoIhr&xG!VvmEp-4rl) zxl60OtKo$DpMn4G?ydroY{|tpq~YBp;#b=VeJl$e3kWD{eYb&*xiRY&f#N1%fmi$l78RYRJ@HBb`2hmx`DT0;U9!*L%dH_;TDjfLRI=RR@$xs z`?nP}>_AEUna>%bVR#l+JV9s(js_)}N^N_6SSU!!0m(~XIfaM=dt=kCALoJhPom?a z2}JVsMnFE<;|e7U}96q#qQEN z2le_?h^hOUv351@lvtoDr`?TNHPtoRf=zVG<={M&VKSS=67^oIviatt=uj4R z_Q^LTif{(#(tAv0nr|<}i;D9brzq!gMAvXl|7g@E4hr?b=*#ofENNU$nDc{^(@Ya#)qpHvd0P3D0GfH>$TW zOdlJjv{@LcQz|r=h%k0BcCIg|rr!0W41pZ@9OX5gWIJCXTQQ?Bb7OQMKplII9MM&d z`~^YG9+MK@W2y}uB6DAMN?gnH9MME4RkKG|kNa{gBlD*zI>|EJ`lT`B5hJ8d`$qLT zwuyXZF}Cl&hY4wr;Vv8TblWjK&%3-3-#Sv#uKG>oW=6r}jZDY71kpWi$sL{|zZrox z^K6lN`_^sk;*8Ok1`$e%-!nIO&s&c{NaGk znhZ_Su~d4=YC#b-Z<~(noi_7LEk^8W@^hIT&R$a@3R_D(TXtd+o#(%d$bStVeQKi+ z+!wYbwbR*IujH&!M%oYK{AG}+LP+_W(~wHrMr=GMb4SzWV_3#dI{Y#7M^$YoL{%2$ z?PKbgdccNOx;0$CiT#PS_G~nZiu?OLYE%}wB3q9cvM7JtBffQMt~SG4P+?{$Q-FuG zbL#m~q?9dM9#!eU)|=5Wrr|ty_ttRx!*9>F%A&noN5sGR-}D*{WcHr2(Dk#z*96Od~ zT9(~rec`AZq_))Q#^x%s!QYyQT6&-6qg^bW-)P>_pC&chZuj1yNzV3yt4;pM?e=fW z4|HD9Zed*OM6lLsMI+@|H%B8P70$uW95m^Ym;$!30plw!7?^a<`+JDFPC9UrykzYp1WX%|P;NxkkZ(qth zcP_L$=6Uz+n>vD-5|Nd(S^lJLLcy{8GOxnEK|$V!q2bHZlJ2Fg(uuI)=)i1KO!1?< zc8aym4-rM8lc7%=DDU3BpYkN^m2Ei;_=*V+%CE=+GSb{^X?QC zHAnG4vy0KolK6{~LE-5>QnY0f)dr#*MJ}g`rzUE?P1m*)&oC<&Pqk6|dKHdMuh@KG z^`)6BH~Pc9QI#BCHJTLxrC%$poiP3pBbzy9D|IWX`q-H}#*-%|raKqsBhacQWo0dA zy+jIijX!qExBX_ns?dJ7boGAq=Q^B`e)e@!p3g0hx#>*1#eq?K1qU4^l$_r0h6l5dwr(U}Z^_HGw0c_KK(Kha*KBD6L=+)!~Ufb4Y`GR8Vc&FGD2*Qrz zlGB`HwGHj8OM@n*bkQEec9>Tgu+6$`!b#FM!lp;GPJuBlBTZP>Qb*3U)D&Vux$NG(74wZ*j(_3v3`3sXu;U>9n_k#}gMea@^f!L4 zpb2}oCEG8VNhINaH%*@$W9SahFVC{v(`UU;O63G@7XG9cQm09DyJ z_d*pDY9mKud=Ya5bJ)b;l6j?PFNyUfjoFLuR3yv3Yrd zSD3uo>U}HQe0LE~cL?+2icoa(Os>msA?RELgrGJ7>(aG6T+vXL+vU9SZiiMo{PmV><0@%eF# zRYs}ln{TbZ$?n_}K=p2lh4r6NjYAY(__QfwPJi~L?#NAD>d4`npDW`ed^p^f?qL>K zz8DOQDOy-HA+Fo8sMOg{tExZZWtTvflOWPxfxFrZ0NjRp8{4 zCgz@R{i-(T`EF_PyC#n%uz@mKDt+%NwOgta;3<2Ayu`Uah?o``|le}%cWU6i8+?QutLNi%}6(kKPB{+8fM;7kHA k`M0k8iNpW@h+~=K*ii2n83oVaI{5F%LA3+vil$fo57#nL=CWwB8%1nECYwQ6#1O-QX1|Wa@Ye;W z9fzuQm4`j?e3vZo?X}owUHAq8^!S75w8jRsD!1^>f)$j^!x8A1J_B%Z?q55v2(=9i z_+RtFE~{&*Z`h<7xM~2$)1{rNrF0rtFfE$Z_CLs;g7X`%^(q0eH1XyF)x^7CLs0a9P-ABXaP<%}VCUx?6 zUS|?D-2gp|#V>l~iaa}0z%{sAL{$X8125Mi`$-9z`hZ zRP!yG2B zJ(ku2dO$IRza+iZvFP{ovGpB?IAJcv=NUae2;V!<`c-2kv$D?6Kek5OegtRdSBHF+ z5oLKie>=Y`qF9ghT%^Fcq44`KhPy4VQuC!O^GwzePspQ}8mvwCKjh=eu<#IANv%EV zR0-A?4Q3@QHoa++zJn=qrcJmArTRd#@WznjgI@bv5c+7`(l>*nH{s798zW9|VG;G_-NzaPNuLaY!1V48tez83 z!buB$>PxLXWK-76ZwBMeENJea^djC=&_j}7>UV{BRUhEjQ9i{GymjLatv?-+GP;P= zz>wiEUOkKXcQjJ@$AScC=Fw*MGAj+iWJW}f?;T-0x)F|-f15gv`1O;lOWt%XqvXd! z4c5OJ0u8qA&w3GH?aa6xH?VGpm*3yQw0wHG)&2f0Hmd8bG|%Pc{@XD-a*~0kx%@ki z!|rrFRx)Acc}Mp64&4|^7KXOrFV|>AKxr#Xbok&0DpC9wOKS4g2m9ook1NF0`PELO zqtYH@&*6gyAMKt#pAii2C&F(ze<=2~7MY~|CCA%M zAG~O)(dgg^|Br9mTqO$z?0;@iny3$)oSrb7c2VXCd0H&UU9N5B^!OiU(Qp*Wj67Up zcSRQqqiSA3!?60kQlz~WhmOBqz=Tn4^;7@56sR&>ZV%trAX-g^0a7qnU|5h6?S%Cv z8!PZ_D}p|rkr;COHW~YoGXb}-2_lH7v1_mk53TvD?D65gpwG;MH%sL{{au$-XqTB6 z7Z-HX&L36KD7XAt>whJ7hvK|06GdAjhdDx1HT>B)F^{-XanuqXa%06b++9H3ta(jy z3q6&Vu;~qb_)W$J*4w`%V&Aa5xEXgl@G*<--J#d}FZf1oy25K`XtOZnzTw#4G{B7g z=3-B}fl%Ed+ArP<(%i9{!A;TtTWY{0=?EJvzr%H+gAT zWV9cxe$1CAc0_|psnRZfbe$92Ay|GgMVs>MPR8e|EF8sUbUM2afwV3}>+S)(jtRaznZ`@2XD}JPd9`Zujp8kkX z_#MwX>+koU@T3NRd21hMPmah?{Vw+CW0qP8gGb}nIN2W$Rhc*++R|^(2@;J5gay>n z6SjxX$?q^VM^vPvYw$p+p!nGV&hG~lPCjK8m}M?xl4QmdFlr|vwKL1~*DJ<|OU*64 zUvU%*jK)$bEkq(e#(pf1q-c+AOP-Sm6l{)}Ra5vp_iRCYWJO|S zd*#u-$jbc6>0nQ`q~@jkV5;b|(E$fd5f>I0rqXzi#FH4=w9%h$ES5{q$26W3uhXyJ zSbuxduu+=m+HrDCIuM zeY~2fT_|YineLkBT6aLWJ~_5nnz9=1Z0-ESOR}yc=FT@oHirbDs zWQA^X6UFBXTJd^*`)T@x%stq#g+(^3vdH~i<%CzRd!l>F`+S+=W>Anf$sq?zjB+P? z=U@y+jJUR$c3Qrfu9p5}5u-j|{`(=T{GR9auB;A}N<0SGG=wPHcI!o8RHh%|vBGGfF3% z-6Z^POe5xHJ?bf8bw+hqb=cmQdrk+P`{V0}UQz4J-?G-zs898eoX*Qn+%UP(dC|)- zoiP)z9WmH2Xt4BdZohTK6gM6H>Zt3fTlmKCZN@kMx6@y}NBKs(9_q@&DVQTlduOu|2YNR2BxQ5+j-V#2n4$vY9P4O$JV~lkXZy-j1i}%%3|jbL16zb+9#3 zQ(6;yMtfoD6Wd_?MPrM-Q_>1Dv}=92rZsB#UFv207yTxZeA3$PfVR=3T?rvUH*;HG zBg?5euhO&NvztYs!a81-5zFb>kz)*@5he<)ucq6r7!T#s(#2kVu&&9glOnAfDDPOG zlWeCUxp`mvzE4~P@BB~A_3YW~{C>(z4#YtobKX+y@{#k@Ud)39zJ+d>aHN3KD*G$# zg}j*2n6IQiHj;=W%!ds+CMGKDyPT5C9jAv2=VhfYbf~WkV$>Jyh<$3yht3xjt@1e0QZUh)bMg!tWYL+Q|4ZMB&4#tJ>|Qyst!I@u8{-AtuXDYmQU!Yq+|8RMeZ4&>W^RQkx z++n8WTh?0+|2Th3pVAAL#+N6*BA%zaKDSXz{!)-8kzZH)usAiNw{UywUM!thSOQJH zaHgB}s6)p#R_keEV1h>?L)Rozu^PxWe#G%`E-rFdwK>I7jLPL?BK`{>Q%`ZXVDhe{ z+g{D)vES_%vw1v@)yf@ZR_j6Fy!V&lIJ^5hQrd0SaEKjXUEm&o2Q~RqM_n< z+(%BBw|ggBYg)Nd+7MnF23t`FC2R4cUvn01d%|4byBPZL9LOvxwRhHS%u1GAj%;;o z3>Ny{JRcq7%S7&$?zvnhGT7lwZ=7|a3S*`!rm#16ruS>Pj$a(T9F|*X{hFd7DZZMx z6Teq^7IYrlQmAgcxxaXLs8pe`(U6OF6FVUqt06HN?Pnj_r^dPvUhUD_cW-@OGsY%3 zQqvvfy8D3?OypE!7asu_tjrG@VRR9uWyV9KQwIMKSJOG`-J}Y-8i667=NE*_yND6JqAlF zC;;DJQ%4BI*2%)o`97EBW8eagy}X_i8X5`1)#rwS2K^S$|1eZj*I8FZS=7|dhV$hs zI}->e%*OtzA2bk56gahkIKQNY*;v~;iNeGm{dI>ZaDH`}>k;i=w>VpgKhjlsMk{US z2%#0^asYR5IJw(8zl3qvI??^BlfV0U3UM-ZgxWhp?QChU`h96)=i)5>=+V`K{`2>* zaYA6wf1YIP^zUf_6Xd%3g^P!io9jP)15H6!S4E#eVGwJ*r%)S!X23HfM7ViDf8GCo z{qoNfe`~4xPfK1tLH^&H{`S-V*;LC3;wWur13c4N;vatfyYcTo{<|TF>uT!1k>X!; z{_840XbD^p*MFEMfomzyk`M5a68cn46Zi(C?CS4EBXD5;*Eeu}BmYB$*%Lq%q|g+e zKGuZYSewN5N_MH0+_G~`$XuR^+(3s!F<@b0f2QU1%c{5x^eyyg_P*@SH6jgNMXS{* zyiNK>#{ung@%?89?718n84%|TKCxrTo@|9gew)67q`9OyZ?9$$>hKIPy?c?I$#6V( z%4Vr#^h@S7+6{EfTLiRH|MdipPQXkEV|}g1`}7)j13mJhqpMBb`g6xu55FJ$x&i!6 zIT}v*hf(}%q_kUe;{ScLf6qwj+pSw5;vbq1nE$@=-zN(U8RLIL{{Kd0?kp^7gOjHv zC1p)NScuZ9EZaVnF~9RCg|WWV2~Xf+Y6gXhZz&Y$ETpvjKD)C^1gB64*J z6Hyg7!gLK0B+~@6;Jv`))xlU+>Az~&zo;G#xdBJAzg?&hgCi+1RuTVQUjLdY?Iq?4 z1vzTSlO`Z1Frs4pLhf@>5f7ts0(n1EaNq-!TuW2{YS-?kY}7ph*pBRVRE*3SokGYi zsK@tGho`_yJ}TzEj49ZOU2ph4cE|$~B(=jcc8Qa%$L1Q$`0QJn%zTifYtfuYw;XC! zvq=%#I+xH#CRW3ny){56RA3u4YU1F+N#RPxu(3@;oBio=w?4i%U50bbVa zcP~t0B8s!KxvrxNZwLrrtRJ8&uHoovlf}aF*AN-*a4bv&uA3_saM%b=x`xEOkOW#B z5OLyj0@D9hfgAHWBdY^=vZB9fJ*6_kl9+Jv=o;eBd<*VUs*h@nJ!54YjB06H*|D&+ z3`tC}4AL{rna#Ljc#^&KV^Hf0%Jhc*7fCKX%730O*&O=#>dI^agaVj~_`qHsQDDH&M4i^P3Z75B{ZC|8=-hp_pT1W1kD^9tH*l&7NL* zs_+X6Ha}pZp#d`n2Nd^3C?B!Nl@G1oz`X^cqW#o)4T*VA|HXZ^47OA>|DJ!2x>eL} zp@hr`Oe7;CBVM*%@Qp#To|gzFdRh`0+0Z|-k+27|UM;gJG8s%5(bkzZ9e)Dl{%ofE zBT;~E(~oT{$_;EH^=H9`PvEc{e&ww599-uq&MY1l%C@oy+$rv3R>*m{zh|jLUQ+gS zKuECV=fin%fu1C_Tn?LDE5#gEVmXLAG;FwpQ3$GPTkN7Fow;7w+7sNk&=tC~Q!H+j z$oaB-A>O6P<9uP{OKB0fI&s6DJ|R)xw6|uN$3$1FwX)=-e{EZU$Ma+^D=TYBcxtjG zq@&LB$^4lny^Dj3(1~p!KijPw1^R@A0+ZZEh#T&~KOctR7ULz6r#aT`n&D z+OFbL4Oq!}IB7H<_pWe5zl?RmYbijt*wQ;MdvYp!GP5P()rgI{;ShO7^{XnyK)TRG z0ZvtMv&TQ;C0KBHTxez#PwSWZB%AQqR!pswpvsi`RQ;_(^f&SlwS6;vbXI~bNjP+$ z`D)afZ6PBVF;TVww%Jq~1I5jISJoD4JTJgAr(!=CLo zrx`arE&0}xkGCBnIYoLK84{{P#rL(nTUYu;G;J3QBb}McaEwbvapCePa>UG?AIb!op2ewG zCtu8K`G#&zR6Q)?FJtUH(z*p&XN;P}Kvx^xAE5ZNg`q9Py7_8`<(}kAFQ=Nt39#ux z)Hc;cet!P;Nb$VGx3G;+n-C5MG8C(k*^B)w`Q1yZ@6)3qekvI6E$RX=rd^ z59Ti`Yi|3c#gkL@D2L6X+}S`$L&S0!ocK94Ris_9v>9pa0%JGg7VyK%?fzkVBNHwVG&3H_Y<0@a7%Uz zU;O-0>;#=z{(5=ddDOW=1xNCQr4Vt6IeJj?c+0)WM!Jt7*xw$OZB7#?rRb*MfDFID zOloG@^c;Scu=K`g`g&Nd`@vR)3PblpAn_}zP+w_(%_hCpp1|Q0ZXsDsodf3}3;75Q z*k<-^Q(ed=tJ>t&&jj5fTcxCWm@0s`4q;&>-`wmxguBIDwH?EXjY{i}P8fa#FY4eL72|!x<7|=s^SHP>m@3PW0ru6yBt)=Sz3V;aB(ulBD2quZq6aB5h>vr)>P zWHDAwul=CUA~@{pRq2y(RXNX@r~u?pbN$8P;I^~$B4ia4aaXf)aTN>UA=vlk z&k&0H1?EkU85Wl2`?ryy!CW;9aaj)p*_q%-hcvn7eK!z6O08M5?dEMba#Ft72Z$S1 z(?#k3D+KxLnRA5=ukk?)d#Id8-A2NXjGS6_od{up5j#g?5Z}P@p_p~SUUaqUkFU;w zfO$y4OK_aHCv-MNweRhrUOg6Q6gTAsSIlc{<&k3k0#avTukhC1mr6zj>o3SdoRyDnvdFh%rm#0dZR#DBQy zC0MR?DYf9{D5XB#yyydG$G;hI#=-7QW(B7 z1x)d-EL6j5`P0j;qPhYBL4HQmh9Rd#;UPkEkc6R^(1k;$s37&!UPFeEIYAPlNy%g5 ztaQjC*?ieD5lIz?i9 z()hObXO(9(GF6&&HV8FGlI;`Y-zu&u15pnguoHe?g9 zOWG6A7cr$}{SRj9b-Kkywbwk%6+oP8h5Ee90UbusTV7-0wBce`rh^rM8W84hBC$Vh2OykD*M+lO8QqlCkUmAO86|i ziIZ@#R7F=Cl=g2ayzsI*+d|}5cYST>x24yUq}_^g(V)6UUT{a}#V2fpY^+f8tX>+5 zuF(5s31jET{O9le!7Py`%aJ`z%G-JQe4Rigub&jJr8KO4EV*&R8z>WVCmi%-gd#| zi7BWupFU!6mzN8UH0q^(Mh8b?%sTP>d2XM+U;?lzn>pT(v@7oeUzjmLD`yfZ5dFqC z^e@)Cxf@jH&?iJb?aP+y367-{WVjp8Tcs0OR$C-8b-4?`yd1pv*ZtLM2$CMLvrloN z?j{Q->n{5ay#xKZ}0?a1eIWqRBO!*2^m_42CG^8ytPEbolk2tr`50rNjIO}t-MuEf+xEbrX^(2rGog}yYwrNSdY#%Ew?N)& zKaL${zxA8$WqpiSN=!^d#fWVLsGZqDt*sQ%)fCzkXR?_FF(kRRoM-$z{v4nWp_$xG`_`u-yy%FCh*6 zH_)rDksW#_kB%X*wHJz#ZRu2%5NrwEpfnpRhA7qS>eq+J36aQIX~3br#&W@y!H4xH zSUh$o=|3FZs}FWVlzfTmJ+dUqm;#uH5w6kgU1bemTZ4VYKf9JTB{-Z6My@|ZU<^A~ z;JN(7qHbhVmv~B3aH?;xGt6W{cb;XUn$mNlx9JHq-51 zwvB+n#Duh*9NunGAMKipca=P!s~pSA4DtE-%Uk{lF!jdvoy$*!KqZXYdE6uA(9@cdL(D zS6VDsvV$W@RYUsmQxZxF<<&O#2jf7UYL|8V-Qs3unp#oKQ*xzgxz#DUq*j8qL8LT- z0*Zm2q_C=;4dVFuvz(5r^V!hWG+TXXFTELP;qD^+pKZfysZgv9g9A;kCG6qm^lds1 zZ)Df_N?J~FP3+*ivCowm9D+94LA`W-2P@QoEmE(pE-!;IXyf_Ya6C9pIuYTYw4%`)PXC9D`VJJ8R6aZrGt3` z0?RI_<4K74q}lbeDJQmb&qno$#h?OOZbgOA$D9u;`m3|y?P)-M9X4f@e1b~HRXb1J zKwJYn`Vhh_8;6eiCp%A;H%4o1$R}CYEJGHlc^MdksU}TdWMyXqxM=w8_ISM{rBLDM zsji<+RMUH8a2OwAx>`|}O-GVAEYFCh#~P{{)3s`tWwA-Obon(>Zn)`osBqRLb{_;2 zaLZC_*KnST@Om9@zSBa8GGVB;_evNx!)V!q1iG3Q~lx`qa2SNky@g?WQIJ5#^YzPRpJQ20R+SbxoS)FoX%Y%F%C)SC zIPtd129rII_P-mlv$I1P`g~X%2gq{L&w>6t$=6bkanlDAVmJ)Rl_JB^LM23T_-sCO zDWK(47V$if$Wa@oAUFAThQ;IYBksqpjroxp0!3X7xO#Y>Tu|C3f4;Kd%p3qZoL&H0{ z1)+_h!jHh;po1OJfa#U@5EZl=B?J~OB5%|A4Qn!WPHNEy+w}hYNeRwW3oGFrz#BHE z!Be0~YYh#7wiog5MNQG=?+v&pfSkfT0qMFPR(&l+g9AF>>)!@sr^sczOn5mx@-t8N ztTQS^i2g=KOdQDFQ8|T&?koG`4y4nh85P!=9)J>)9g29D-iM}npSU%ta@V9UT_N78 zoXNYitfWP~m6AwHORGpC8*{&jh|T2J_r?f@ZC9h|-j5+kz-q{Rl+NOHG_{h%LL~+{ z9`i2356A%n>DC~vT57ZagHUSY4ePqwY`LE<>uwBEg(I3Bu{e8Ln?t-$trIp4!v}j#p z;b#xu1-O0}m*P5ue$O0^^GN*ol?EhRlnBJi!4Wj5@M5`0jwU20RZBs4c}96YlL-NP zgi!ge;Nmi##(Zo{9?HtWcBON3MM1!F@x!s_-i#3(v{jC&)29i+!&A_)X_r&K z&(t|u$~c(Pw;s_Kk(EPEP86B3*%C?-yEjgl8!4qlp2w>6T^$u+%4hbY4KrCg|M>%A z;^_DWu$ERdWW7pN_3i-{!tr&E(sf)`9kD!{XueWRo>H!02)O{OrKRO;HWJaH>27Il z863}N-h8x;;#2A#92{(pRCvu|SXE##{E|^=CIh=80#|)G!Udbk`B`Rhe_wiW|Co77 z*Sq)@wKxKBrgA{4wExDE>1xcY_8JGChav@4{RMHA<0P<-yVI`er5J`BOa=nH2wb)N_@5e{ z_St1+f-xNWB&8HWW^Xizm{dA6y~!oKVAjf^84q(ya{BZ1zVa@fE~#Um+h8JYp6jDs z!>PS^aVz~sMoCBiLRVrWWPz2JIH9ixU-HaeV;!o(KOpofhd-mUFGQ79IOG8zBatRK zkI7Sh0RfpRexnnSe6;<&ezn%Je0{#h+5A!hp4~~xx;f0*=+T@(u?V$tCN)IVor z1Tuy*3J=f*meNo9uY^nMQ=ch-61u$j1q7ceK%v13Iievc+z-D}8ZA7z95%lihU~iR zwTAI9+%L8dvfP)WN+Dz`|3o=M-O!MVPA>F^rl%r?GKT^Ka)Ewrz^E(R+W>mRB5s`U zE&*5w=j%iPep`^7d?l^4lmjflYIv8+@Fthd;^5)c!|gUguk&yb5_xI0{r&x-m(m*T z*{-JiLPBzSdhSuNn@41V*1E;UF%M);L~K(0KK1ngXg|I|v+AAUn4GD`AWQ!JXzc*S z!rYvk4$RMvXSb@R-@b0>r+z_s9dyEM4L|tVpQ%z>1nC?~R|FeoDuUJ39W*sHUp-M` zP#{J+2ULBYQ%{U+0F%2a7Ft4*L3KCPL#3q`dG#Nt1WAXxYhUS3_N8aF%r+$B(M@(aJo_+J~9T^}g6oD!xRlL}% zbDIg2xGDqz+X~TL2OOld%7(|P!odwbv*Ky)~EG(BU$U3c5TU@d;TQ5urnc^dy!U4_7gt0#JBVXprt27+8uLcTFuC z`FT!6!gZr2j{AuV(kosAfcWt^sB0iqg0}323r%-Xvx5(?{$1pvvw`UJRfOQZ+jpIq z=hJJfI`1yjc0)&3tq1yGvPbj4VhASUBxwTgTA352nSj!9lv2GX!gdQ8PEr0 zF!rhsjq%!RU?$^z=7`n4 zIFa%?d*jOpN4`mUf`5%5hxSV$daS`N3{>IhR34i#m@MJZT@xovmPWNBL z*oBTPQs9Et`QmS1hln@dG@yEHgSaluph!8rC`~ty+!fViL zEHPZhb^c%P{vHCou)hW5jhf?lOigB+0^XwF;tc=Sl%=|{IO{yzf#j>wf`nL(SXW2@ zo&Vffo$Z%PK+sR^78TLGS+`n*>Uez4P&9|j;*-I@2gAqA&ond$-KM?W*bOSUY5dKV z|L?F3i}8z9G*X5yaz&LZ$>@a|_YqK}&wsQqK}4F>07WK~3>$gcuuFJrM@5m4E`iAe ze;?#s<(UEs#0Q&13O+4FLH)&v@ZL{p{5)x$-zWNS=PZv|=Q6khTWaUnE^^XzV|^zC zEayM`5y3+!k2!{+HeGp)r_PfejPrZ{H!~WTjCWUckK6oyd_^jamQ@L7gR{9H z-yThms$YH-v*FTrm$#qe-6B|$gttucx`AFv!ff}PCOUdP-uTOyz}A5Aw@?iCse?;SB@8uvisvXGVV^EE zeAgB3FnA9;gfozTi{E2!DfA227c&K*)oFF_F6sZvR>yE@xFLqxvdzU=5O&1Reo5X` zWJzEDH*A`u#_H7sH24&5iLbQyd6Eyiei{4K;vwFABwgTHj2FDxPrjHP6xuQn z8NDAVl9Gx_N_?rI2U2pW?+~u%o5e#zLlvt9)t_BGttQTn8gxGw`c6IA5OsN~&z_`t zABd$NsH>@w>+|rzhgdY8)IX6?KJZGRA6P4=P+A%oJ=`TYMeu5u{uboUofX#8- zrtf)L4jTHSSimNLc*RT7tos5r?zpCRLn5S7fF#PkNF~K@xubA@^hqp4-%F#@uh_GT z##8q^6xqZ%bidHz%h}0e-VBpE6&eDHbNGl6fDNHe6tvO!1>LH_0{v5z1%E>#kD*39 zp8>481T%ASh4Hub3LHgk;>TUM>7DfU^+g<4Y}TD>!a5EW*j{g!Vj~!p;|Sd^W7C(@%2DSjSVT$z4fXU}93eCQT z86LRrUJ;)wZNm5R97w`S+{W1S1IDtAYIVZ}WhhDFg79jN51wKcKLVfuv25~h8yla^ zpnKj1WrPh;dnnc~M`(K_Nc#G~C5wI$F)PFQ=c4Ko5)ydp6>3bH14oJ>LBOK8DpLI) zqXcXUgwABwWRMC~v2wIf8rkwCsY zXR9Oy!TGyh+F=2v8r7=yAt$Hgjmp1LzH63+CjI4fV~5olmxe>sFh$=7koE`$z&~{_ z1#(^)t6z;?B7SjU!#d>P^+bExHq1OVF z#rNpSIBbR(SBn!}sYO?^SouuKGzJ0leYn9*#Pdjo2Q`3(IM8^fd2N00(D+;I;8V9s zun{dG6w~*XXSV`vfdHuJQ|GbhYI)!*kT>Z0se=p5}{w>k14hTA)~d zD3dwR@0L6A#@5~CbGnjf&BMB)n1A?LO#g*%i=Pt*gx94BBZPGj7TDrGe=*$9|K(+) ziG`LH<5rX(qEAr`>H^f8;d%t(A*2p~(vM=h9J${Ip!UKT&=?}4^ECRsz5Q`h062UE zWS`Gm^_O_XJtAgqxHUEcSQ=sA(EnTmF@-CTZNP7(kCvSjXNy(I*Fg)$`r#H;F@HOP z7si+XL9`g)p$81>ny@ia85``+fXquJY4tp%ZM_ocn?vHi`7*4BUnJqky>A64ziJ(h zg*FI0SU>0qw!vw`I~)4@@S2NUJ-4M^?A-CZrz>0_;upgJN8&zWX8QYG0FH2EEw{*j zw&{n{0p5-B+e+CCFjZV1TyZpb9Vw8I_jGdmZG!=@C-^{UD@vlB#>ZaGV7p7q^lDLG zQSGaFPj@{w|08sar?mQTWJxhNou)lE%UwycY_MfoJEnOjgaPAehv}Na%w8oPPgOBT z8HrjOyZbE(>@Fr{K=N{7{-O z9!PJjfJt=mKSN4iz8;%ca?(zd9G4))6?##72G~x-pQv_VkZi}u3y54P2X&ECHV(ig+VFkoV zlh}qB##$oO=o4BlzEx5OeH9fI^%M$)?o{rj3?kT}6)AcDsQ6L_fWEm>`6--%slT=D z5a)(tT(M+yYhhZFoB}ZxbCzk`wAR?#`o@%T-%Gvk(Rs^qqZ^1gH`eBZK&Mq&c9DQz zSV6F!e@IxPS`v9PLtVfSn|#Q>pfvmqDOtZ4EZ9c8Y$l}4;KZf)3^B)%y2GpaBT1_yJ7u)Y8VLT@yzByhddvTkag*ON$2z zQH&|kALa&uN3(%q10t9r;LvU`|F%E5@;*@Bl~GW4TMyVL9d6z;g0mM1i1^g6a+`uM zx8$AvP+20gfu_aF!=%u2aT{wdS1YeWBB5sKa`8c%NF4+FS2bsEWF`?#;s4ee?r_XL zf}^+vIunEOqV3Kx^=)f#vy=y@r!S--QBIO7qnW}K+75{~CI`IodjgLR+4o4-(CN#b z$?e>rO+pV#?Cp3d60Blkm?cn0_Aa@vhoL>fbuhyPFxp8-uZt-T)ysp=XAg!9Dn z3em_NDq_UN0~jl3_{zKEHEZktNaG}cCR{dWnQy?EHUT9)(7Q5ELT4+#U}p1~7FISv zISD($>n^v`KIi1=98PHHlL{GZ+gpzh5Xdyk@IboTgnwl?dAit)S)9iB9d$yKL<=P6 zL?Tf?QOLcMlXII27qEBDse3ghA``H1#+%|>1APO8H16}nMYdf-;!_95i``+vzH{%y z5pHkL;21MV|m+Kh0PsV^X>1^tZB4^^PyX7JI8xIzVpE)j7Sp z7gMTf-4{AGY^z&Msf<@6wUB*T@B!qy!z9r$?f{s zwOiuiM>B8L!Qe>hgGW*`Xjp*04J2GlM%9c(tf+Eubj63w#@MKX8MmBYgTdUf<=BWJ z>jx3Qs%rz-9TF9tp)|%ojEI99SHJ2uLHqV1;lVB^T+E`dEg}M)1+U66yZp0 zLqArKFImVw2UXbRkgsI+u;i`FNw-M51K-nvP^&sr>i3x}E zH>ON2{&h|stv&^U2TWUg!)!DGo0q54qIl4ewm>qWQbvSfsR)h{f0L6jkI>XvK%{7C zk@V{Z`0aEh`HP*^^44=9$@sJI+Qo|wHl^8tVM(0)ESB|k=)(%U0iaofUm7k^n7e0N3ew zbhys2B)0`g?!{K1de~+Wo*My;_>wg^^02;-dsf`-jDyFlwfUPrM<7ZKH0bzNFM($A-}poP_S$B>xyOdP9I)qYN)akF0ziSA6QE0!!eZ{a9 zbv7S$&_6b|(}N4_UwD6PJ5sL>=z;cN45P1PbaVJaX@E0T>B+cir%YA5IbDfXs2`DT zK81E;!J`h#g_l)dzfqSVybrRE&RVC5+$M*PNpFoO)-O|Sh6x#O!4C{m{`Qw5L?hF_ zJ!_q>fr-c{jenyDU~Qb)_*cTVh=w{$gwJlW7^>s44vFd(NMl2-`g$0)ULXV$$P-Y> zOvdD0?Sx9zbtK|;&udQEkQ*LZoST=$&Bk(CdkBJ>bBMa3@By`zxXukpHeAu;W3{!=?Zd&xd&59^6P#6BrIr` z6^5r~w_0`rZVr#A;KmW}(&sN4_c=J6xk3w`nJ@E(y_b%JH%j!x?>+{c*Q2YXfi(P} z0c=I+K|Ws0%oqbih7Wz~r*eRZ0p}d~09g|F^7%XvyBZ@~x^V8?f&<%h5`Y4aN?bLJ zS-id=|E1i9emh?mD5%oWoiNWT=w*9x=3>pp8=#(SEa;x>z)(Thw2=eUdP+0#Y*Oz& z-y$U?m(Q|DZIz%+38Zu3Xdg1YS#hznm_*r1?W!2ZsozSwlxA#wm(A!rvto-bWqQ2=c*D?MeM3vg>g=X(H79k&V%f+S zADaPNUDACQ7xiSXNeT%QP31U#j!>U&1&1c}ptNE~c~xu!opKJ_s*RO7tLYZoO|XVW z!h^;v9#d3!V`#w3Mvu$e?T1t6hevWdNg)dRl?lJ-P{fOMEPBNrPsUgZ$Q`h;Z-aVcKv#`F6VTLErWS%+Ei-Bd#20Y(mZ_ru8WbecTA&N;gR0naokp9MWnfm$WxxHw;(6qBno~LUo*Cujv6s79* zIGAGibd!{;^0K>P^&l~Fo4>iKy&pBu-&3r)F*Ulov37ChX=Y6GWCm*7TtdTsg_|Im z;!JRM+%=^c=rKl5i}}=6wW{0YkNLu2manodqC+l=zr==`NT+>Vh8xud@<4U&ldBOl zK5OUYH9F!|5)uwmcA^DbDo<`tSN%H6BGVXhVAr8I1vXR3$Gr7uAGHabSls}JKWBjSk2iVkD%nSl|O5p zH)k+TVHGuWq7?(eZ>UQ(VA3O(dGVZW$NLDzBcv81m4sTnef5dmjOrgHkc(nJ?QgL= zTf%YZ(Azx}y$?Y69bpBaI`?)-S$Z^I1THxTAf)?kahfNT#E28v-IG;Upi(g}>~zJ4 zaJha`NiitWPMCC4cZl;i)#gMow!E_(2>gx(=~|>eU6liG7*ej+N*QAzRK2Zrr7 z$wuTP&i9Qj?N3{$&!3<5Fc_~?2u>a~(_Gvmiky+MGg`(Utlt^Mci}g5UJKYRy{xJ+ zl?3Rsi}5|T;7rDA8%*j--uL07smad3^7dQ~aS;@CB8-YI48ixFWlJ6#c_{VC7mM2X z#NO+4H6>u&woc->`8)l${>I!#IH5`BW0ypQ-n-RlRiZ-mlwR$_7vh|!+io6Y?VhKIxH^Uk_1k5zue`z{suA6A@m+4<-ZqSe%*&I&J_ z)q)@J)tOGqUff>msW(5^&j!q;mh$O0AbrBGYc}RY*!KC#T=vm20lQT#KeU6}&~zRv`8K@kS%pCB)jRtN`3vcv2rU`=gv{ zbXj*e8FDB|WbD~fnp~HeVWa9ZSOe>Cb-lDnD;Pd>t+$$4?n(jiAWnDOJ!`!7cks5? z@r`M6V+UO=`ARZDb@uZjo`zGZGucG(ROpx|dRGB-+$)9Zb|CR~4r1_jJp~ePwc~EU z9KV1S2)z{fRM+d*XtxH;`+vz|-b?~;|Lep)3Exk3xS(3pKC)F>p*i4SINLmlnC5h? ze9Z0eadrqrL)IJ8foe|c0A`lO)X?ly&Fqn?65(B`tE!B9g$$Z zespp6ddsFzoP*kXsVYm|)3#CQ&Rm4Uc`#z~-Z-?Hp@k?b_Dhbo0SwI5tBmVJ{ zx-+SSvA)O(2Ix9`T6MEq!nSSJ+3sQ{@v(Zmyb&UBH^;rRSG82J21LtnS&k#dNuB0| z2M0@elI}gnfo_to5Aq)=^g-IwKISo58&8F7J6)a^hupq>4Q>OAHCR0NFGds}m2Pw(3H~u?O@CJ!4)l4Ymg1x@0tc4D$;CYq5T)f#6;7^pY zo7dR*EckN0vD5$Ioj=o_^)lRiwI7o;d$d>yzSr7nxkx3H-3hbo+uF!bay}cc1{hXx z*8*c9eXMEp2OD(0wf3{=(fC^MY*gPSx_NZj^J2)k8V>@2uaywGJ1sBB&#LOeDxl8KYulsN}5}`OMDl4uhV~euMBBfvz4W*XnTDM z>EB;QB|Z>*xFhXHoLGB#xZoiq1@-?crrU#YX*yE7^QMzu>Ki0rJa@F%_`^@=9Utl4i0kK!ZqPcv&RHW{v{Z`^Asp@s4Eg05=N4#Mp_~L0V zZ$aG?!>a0aKdZKBQ8fC_!^C|%_&8pmes+48rLFriG5}KMnML=x{&qF3-sakP z<;EY2?qAeu`vJaRdY>u1)p2>N-Z${Evt23D&7QKV`8Zxg9xtKOXetf%X?RC!<egV-GJA3S9%4(+JadDo?UP_t49uz=K@GF(wYn zLFiR#OihAk=exT{=YB8XDZpxHsudWGI$<5bKy=L3nZxEKquOsh-|fKS{hm@Ova<93 zT-4ZW>?VjMU$KZiL8)3by=QGHjv7XQEIwdJEgO**$6vJoj1su#1~F3Cx>PYVxLoy$ zoa}^!EcAg5CQ(f>3z>8-x+i>Mu-1wuo7>YpZ!>o5sna$d5}X&6Rz##CxqvJNZY&&NqzKW@}P2hcp%}u+o>a8B6 z+!{Cm9u13x-297J7$S_Mz*FnncP4MZMW%mI)+^hk3gxBq1iwQQNLjxFbkn5 zIQX54gZAnj5{t`CH!j97GLc}{&m(jF9q)eCmA2Zoy)&oLTaj7ZUwr^`?XjfoI|?eN))KS#FRY(64-Q@%o65$j#|+a=EW}TtTmDVhR4L zzfya5OqlTmqVD)y)M-61Z7wSt73VXi`SfUfHL#(Nxj;pFRHLg;`m);Ra4fCYaFP>k z1NP9u5077&Eyng>DV;O6u*kQ$RxSJl|6MX_de+A6eQ61IUrqe+X0wOM4VK)=Nor|#r(f{GuKi> zY@kM$i=_SF=>=nrjC^%C!n0jl0-$Rbby^r^+yIR|%^P-Z|Bl^VRVw=|PyOW&y!wYF zM&57!t|e_-+NHo%tbbJC^%Y-v>Z5zlJfAt-p@Hen4y8e5;gXz3bu86b49zK&ps}Ecq#r9 zisx)ZQ{U^yfX_?6e{@xQR^`P&a{F1R$Y>s z^MR$j(hnMjpz3AWMK3(dsMr%T>#Jc*yoZ)``ycN5BTa z;j`E2uJG((3-pxZv7C(nTELbj|uA6NCl*?K zeZh<`w^qbYNDwjKzi3qAle?VAghdb-$oZs2`n1@9Z6X_O(uaI7ZJPA4xV{j?0fHkS zM`wqBp%uXAHH4fcsh|>gx}JWpES#POFJqHWc~^K`y|7G3roT=}6df;fR?<>^gxL51`HsZ!eE9my# z{dhi6HMWOwC+i3D0bgM}(0i%v8=5xE^kuoIxOi1)+p@tsZ&-l8Xr&Oi26FZ8>voV7 z;$;BlpRW94bn6$a9`<%SV9chGxJf-0o-#|1h#eOd9fo4w1wGXv)%&n2I;o}bzt9slXaw^#g_$jquWGab+P?&NyWKgxAL zbFkI>{vqvGB!Pau+5TbG8@3ZVO7CnCDLLLAZmbS|c%-hSLQSCb+DAf?SMg##^Cd^D zb=^qqrWhK?K6af&SAXkG#TqaJDIZspw!W`l?T6<6j5l5@Aif5r_Sdh#kNVihx$ex} zd53=?-(zL9c&!;?Vg#{j$*jh#8D@_RHM`fqOS1={n$3t-a0UT<^|UXAzG zS3Oa`lKp^!Fbut}(Bv2>7T;_p;6?&f{O+9=d(f^Ge=TLkC-c1PF-X2MO&^x3My!fXEw$2W*djj$o8X$+xL)#iDBi- zw=^`G{u@yZ5kbZ5XOHq(KKOIyDubBHmk9cB;|%~#T)QNa-u>&lCrTMpkXL@VUfs7Z zcsJNMsr9DYKR>U#M{vo;FJl5%j<4Fj_HG;ca5o=7+Ql@NsYP>>o4H ze59Fy1;~L97p!(FsFZdp&DXfyr@we}mBn=b+Cr{D#npof8zPw9h7s1&IGOJWco65T zxb}V(h8D@6*I{Vi;rNwk{B>RQxMclI+;C7OJ2X>Tht18F@AmEU!`g&c9CdrUM8Vi{ z+i%Pd91xa&rq;a6PH7CV1*TxF?7EEuLHg{oVwPeeUZ!7B1^|f;ID{STuvV!onZjH% zWq9OAomcoYp`!6DfR*Zh)_l9hyNt$O1`Az!^t6!1L4U@sa_J~fx z?RQ;f=K}bNk+2#DS5{CTZ_eO&7o3ykW9t~(#1_O21SM4?PwJFWC?|xuSNfW;IeT2= zOQhqVHeEx?-hg@xG)wIjn%4_?PzTmG#7B{>bv*%uS(FMhx^f`lW)5s|)2Q(H*r|iU zDPy;B-4C%XJtplyuior){j#`(2kXct5LBC#Jk6Lprt}KtHT=vGkl)DnZ(Wx6#h3bJS>GfotD z3yd2}&Ii@Sq1b?TJ~V!x_V`de@r?9x9fu=E3ya(Y{mKTueo=_J2Po9#O}qSU?j9%h z2nDQ4g6gH71qFAAV z`}&xZ5rGM)Jz(?$d~*$3vLCqE=*-hPqJQk(4Yin?&y&pL%uAW$i$6#ju#S6uZ%=P> zd*NBHV^$eb$`{wd^$f{Jlk$n6GP>Jft;GRRoe9|0%Eg3GU`=}=@FdF5 z?ysxsV9Iy+mn`BVwmqTMrmIm!*dqDQ{jH5vOLoJ!LE+7a_qk3Ey=Lg+nYTS5*$~{d zC)Da4_g?`;(WIgvPv0#cU?O1jXV%o?Y9&X%=};35 zjP_{C)`8C$Yj&zkPEOWju@)u_tW-LQbc=fbV#&zp9|MDx7Ki3-F8P8r_(+k=;0lI# zJ3XEuraE5_;mb*^+DNb-Ar`Px7upwl$Lah;K#3_r5ELOsJ=eS zJPB}{o@Mvw6SVzT=P~*a&zCO9qWw^DkbET~^q3&yXuBDE!y|;=speZtvPi_Eq&f}9 zTc9%Hf;|7gETd9NYcK7#(f0VI;W5G_Sv@**LT@CF$fc#x0fvu~Bq~kzJ00gx^l*iv z!-XvN`T5qJn+EHvIX8qDCN6U z<+uZjg9zQz%V#GzoSbugJy{ZS8hTPlox_6LD_P(2EDyMcs~S^X`c4`&jmQG>?o3x$yxA*%93_)Q zmbZQ!m@dSREY=*xlaJ=|VDEN!b#S+TkR>O!OS0Z(Qv2t+i{a>(33L=feHBb>V%eM;y>@j74HFqC%*=W6-^O^<(y#|hPwvm^uuQEulIFWFT- zj8eH1q#h%1IX#a;sWuHG8Odge@le^;|ET7P%@HBjFbRW9mohq7d?AnNzcfoen9UKs}l25y$wIBxoq>s`KyT{SHE#*2V{X9@a#>5swSUiRs_Dyq3;p6u5uHB!iw zk&K%p69#lxS9YK5N{{2MjKeX?xjqivdcB{sG2w+hj=o$sQ3YQVL*Q!pENTtiR1Dr! zeNLdP4&hH{x<-EwkDb`!>atkca)Saw5pZW0wmK$Elox2n@#-rw%-NsUlRmpz_MTYI zT16A5t6zDc5D}f;wuiZoB8RE9cs!xBG?WgN#ZyX$MR|^2x21i-m~1=Bt2UmI+TzNo z#Jh35NBbhL$Z_%)BZ561!M))m@cxqx+^J5+P#ND@jL(&AiYsIvfNlT>`9aYo1ILUa* zATA7PA3n=X@0Z^V zRuk~XvN&yKh%0#R15jJ{qrTof*-mwE9oNLh^*q=27dQofmj|p&@0D&1l3A?()hM~X z%%FYi*llx611a~s)bEMe;*=WC_KNW_eVQjsFW5IE{Od zhL}vOQlg&D8T;#5(R=Fv-E2)>$gmpv8YD$KOg`*|^6s~cbG=Cftr=b-1B)J+(WEdc zeq>H-FYawya-%C@YvGYG4KA0Gn%QwBX&buI>s+kMdgmRo)8!Vp6|Tz7;h8%3K2!ZX zgY7{mV6F$cW`jFV(s+9B9eYUj$s2{ID`zERd-5ckZ_x#6g3y81o)d+ie?(us!JQt) z;(~@&ry~jOXe{v8Su6UF1U22B8ts>M%G&?*D@njJ3Bhb0!FXo8*oDDD$i>saR(~NQ zxNt2a4gqUWaL9*#)NfLg4B6TsBVEU}u-49iQlYKTEyzkpCSZ?zo+t|ZHX;#!(hFa<+?JN+3JtuZ7h0Ts`+BaQ&3Wb&I zU0u9JqMIuiGUxUBkbflmS3xmL8q$#WIh>Y$AuON-nvbRS2mEz|))ZI(H(`A~;e@tS z@eAGxUKQ{MLIfUL(ska4@uXR#O$U};R!C^M*JMh zPT{?;CK{c)j1`87_?20&(=r{$8n|*o{*$gpPC+avD76?0cnDnTIFu5r>i3KM|7$px z`jC7}wF-O6+I#F)4uG2>yvu|jq>CZGZ)PUxS~O8tEddL)7Y=kIsr{J5-}1kHQYY~R zkzWizy;Z#p#nPjBsE&L=c_Cl%Yq*WACmZ_1;6uF`c6&Hk&uY67%U8fYU$mc*3t8wa`2Q4dPyj)X4`tP^)a+*mvesQC=^ zGDl^_q>{uwFlQozuUX9e?a!{4G}x`$nsswMG7ArRooh8;kKcLk2pQdtu5Z-Fi7XMF z9Av2=xRnYxb(AfE2NNVYA_>EoP?@`DMgw6Hb1N|visb5m8i@JR^}o24M2Nb@2BxVE zyz=B?QayHhdJ@_4R)cXP?Bd#aRYd9&#<$sw?r+y6HMZD$yKyFufw1-tKXYmD*p6@3 zs>P^v3`sIp?w?t2#4yBIRUFe#oJ12($W+KSbB)DFK30Z_G_ ztdpXxhF|Y!GBw*euwHKJmXwtdOP{Xm+lW6f}OiX1y|F$7Ya)|y@GGmO|`j;Z1 zAN2(8Vok4&)}IoA-Z099*535R6mFMLFxKr1Ul7ujB|Ah7+!f+g=^N^1mD0mY+YVv) z7&Lt`5OqEw`+aGC=rt<%2675^>`?oxYXTuZ-xM;M$%&M%#)L7)eA48w@qH^*FUmh? zZ|5eXLFzKT`0MW0o3^>?gs$RTEi`iTN=;R+3^2zGXDzFb-F%c@rBqFR6lq}NO7GK@ zlW<#B=|zv$1K+YJOK=e5{Ss3J{It-pdPP8vae-NsQEY7_ntMEf2(=6HAU#;5n)FZp zT!U(X9jy}r|0|S$t}mn+-!DVmw)F&&(@<4fEL5QR#LKUQ(ySSUiSBaS)KVIwW(b5# z?p)SGY9`fZTFwVJIKR_SISGkdGUGH5R~NI^VoOqmV@6y04QxQT(`g8x^2pk&yI;qB zt3VqQbJ=N}`vE2cd)By9-v)?7Hj;STq6n>X{w7eY82&UMUXJ@^TN@m?v9wUGx8CHu zOK?$ZI?z@;wcb>=unC$tRCl33*TxHw^vX0{-l1o4ADwTDLkjv zY>1_dxSDW7lozn>ZFIk!T})EfjH{F{pH0KYb#pd??o3noDybTRz^DLJ1#Ot6FBq5-6Y4T@0Z#WrNNB)N{y z;Z)gwh;Ot+k!ih?^n188@m;n{v_Lqj*8~s{t&3n@88MCKS^A-_w6w}tth>k@vopqr zdcl3OT%Pk`3!15YN~m$1Vy`3$3QO&@LnV-af4d;6wUmZ1dJ(xVdqNoTMU^ znTWF&#u)M(J0FE+!OLaa-5_NRGsTHO5|g;G;JdjJy7pkNM>eWwIGnxoN6?& zxh!urgafDuvuO$yEJ~(LF}j~%I($Q3=mRl=PU4Ef=S~bS4>hmJ%>i3q?9qd2^6ah9 zFV>VYB(9m`$&_7#P=+<6<+!^DVHM9Jy6+l_m9;Q&r4TazkRh|0j)hH(+Pc~5A;Smf zR!b-!*vw8MFdul05TV^=gwWU-*mbhe&_R9<_jAV~YM?bbvJ89GAfbqIfD_Ret>$uEvUbN|EusbOSRlIZY1 zLxX!e7wfMfM2_qfapO_rJTT9*S`(QybdJ(qRoL0hz*s@k!{j?Enee9t-BR7lvAP{g z2DvMP#IAMr6sd?JV2m$&e?Gk1pjZ=TL8A2CwysO}zDE-Gy_7r)l*78G@&Dp(n`cxD zB{$#>dd_Dq!~9Boi5(Yo`|LXh#RERkH}YQZeN>7sX1+-+C5RTDa25aAe0hi}Mp&`^` zoH@;4z<~U!4k2HV+PL>j@5NVe^8j75dQhTCWglf1vSqDIP_XbrpV@RK)BcP{RVv`K z;kx+&v3n?yJjzBPO#E|Khs~m3T|$5j3S4n*IVvKxK@z{!OAuh~O`pw!?eM-+hRdl5 z6^dfILUl=nCU%`!zJB-8SjXeC3q{s%1J#|p3N=$(<)CFsctfsJd#igoDA-4MPAT>2 zw?U4PZ3>?o|2Xhkq!YY$hC(xZR-^NTJ(>Cw%xJL|9Wwl%Nu!lY3a+h93<;AhiMwtp zRRx-AaRy!|u)bB>pTCR17c7T|hLI%d2z5KX{Y7)6mMSU63I;KRv6Y>R4VR&Su*2!; zfRQiEI8mB1^>K`@V0jyHcbwPa3*cwy|Fjw4N9RmRR;BG!7!8X0cCcrS&+S1)r>;Kk z@CiDIJ&m<63#8rTPB3dbD}Gr@f!>UZjr}Fiiq}yR(fsDRBmYuK6hwM$LROfwbCBz` zw``=w-C?8`tHzWXhHMsXIMo7eZ?sA0Qk(R-L8rnCTubwfsL>?rBVyE288F6$^stZ+ zeWC}y=Hibun(fobdvjS7{7Y^!1(Z3R&-p+9OepGiag9FGvRy8O-)BLm0n=NoR#AU) z6a@}_A_XxS%T0xNlagwm2aBKw0jn4W)*U5JOx}85qJEU)(Se_$6F-2(s+|S7qpLDE z%LPJyFf6F}--%T%*|FYmq4Q6}$ikD$p!H~Q+N zm{i$tJ<04K_X=$l;fXIPwYt4{r5R+Dk8kEnmGxChmKL2UG;KWLHos1mq^MnRN2`=f zM`%VwTk0OZr>FWW9yQM`=B1EFYA2lnn6m)X5jo4ZHnf{VX%844$=TmiNATnf>|>I= zPO(j0K!XHe4pULV0Kb2_(M|yDX}R%O$fvEgxcClC#(Hbz=t|uYxF+{sKX*bM9}nwJ zd?8+s!t`Fba)f#u*DK9fP+!SR$=hiU{MLnFJb~EqZ*s8&&1mg2*iV%^I673roQk6U zV~t*5)(FuER_NP>lZgMBRvLs%Amw)}3MH0Y!fgxB%VJArf57K5Jj`4B*p9@7I~A#+V%*tdXsv!HO%(ZrYCHB@)cxNM)6KYA3VLCglyfpGSJpJndgrtym&(MZ$Y3qCbuHeUru5 z=zPPljInNyYDgHjA79SA&hcn%Wm`xRcn^ZQevkDDiR4V#~$W&b$JED~C)OX2b3Wt0T)N6FH zDkLdDg6mv>w4=lilAy9SrytL<1SgcbXvy|GqBxhL2X(q}IIliZ-i<`cNPVS*t`Q?H zQ;_nGR)_Wf+LrGyR43M@3Qr!i&Sw-q596J7qDSZjJulT&iKwgay`bqOV|$Vw&$AZz zoJD6bc)qZ|EC*oAit=07#^+=veR1&B!~!I6N6Xg!GL8FK1p!QJE)b2A3C=vxmg@|h zP_-bFv$_mo{oa!qgxqMB{S{Aw*FOmKg9*A5;r8L8li6tk8qWM#-<@*=O#;40oMytt zO_4i~?YhwAx6@~BNQK+c54L$y-{^zWV!3+s3KTHtw4|mqUQZ>qwh82fspRQ(=JVuI zSc7Sv=5dsll13N&!E#@r&ut9Vg*^_BP&?-EkZJ(}*7M1faj zd6j!8Y2iwOTaJd?>36-7?pwv8{X^WDec#DuC7#~Djs9f`#MZ`y>(EdF-aSRk#L;WF z17X_Jjg1~cokW+S3)ZL)pAp`_EUDdo`Lb|!8`gtA*+9#5yy%2a*l-wG1xCigV_wD* zEEOv*NJGl`n04J(qd!S+FQx;N37{QU+gu?t)6{poL~jYZ+i2!&a%iyFz{pv6BN`Rk zAcXyh)o_W5wCh{opu|8ZF2Y`$=tid}v<=~(oj$FI?6zqX;kC}i{CEj(GJ4?hjDeS)on#xna$GFKbuCBo(@+-ChN=^Fe2^HNwUfb@zp5+IWDZ7WvZgm?k^RAmH_evK zH+Ws;U#IzMH4IO^utF^fZ>D!ZZTTfLB|9O^)!J-&G7!BLA(iHg(^v_Fp_An{==Eo; zv5hg&HDabZIyub3CvF0c*W`a_@vdGAv~U4LhP!f%UZgk(4Pucn$mgdN;rV{f zE37n2jfoeJo|@4u^;Z8-bG=Xr2q=!y0@8lppB3BlP&y%p0v2!RuFM+^A9f(&1k0wx zIO15*4bwyNi4E`v{%N+qr}1!$9S`&DBgF3#4kVO@S*%dyEP}FbF{)#lW@Yla7VXTl zEYNu5O)cW9@wr@FD%NPI1e;KZ6rP6QpN?;%c>;mmd^zr*;aq*{PLJHx^7#7?zT=nb z&zJRX2jViHr<%Wp% z6y+V!<^I@lo&WLOon|Qfwc$z8&p%{5cc&1L;^ww8C?n!JER+HEAZpk=2NdAmKh2phnU`m;y8( zIn-xN8Y6dT#7tW`cYd*u(#V3hh%r3WyS|e4Pmjes(8P1+Izr`WZYb_Vzn#`&>>sAB zybQ2%{jH&{p`ra=Rhq}}h%6z22!5>j=eR+5gmHpCM(}?sQwh#dYrCeFe$b=2)dxq~ z3rAs#7E~?B3mPcMGEu~jF`YA4vWKgTXPYyFj49Ry(6@d?z2JyHiGO#0cN*k!W@=3G zynH6*Y~;1+{Dh68`z&_vu{*3Cm)&=JFQ&$0%#z%=`>pltTXZ} z8S*P5NI5wFZ;H|^ZMWjPK}28F18lXJ@KNdyk_>B2_a*e4PVBwhYE!^YuAEj6@5tay zSJSIX+A1F4J;+$*@8S7puHa2t%FO^s1iSI3f8!o_5T{%cE^83mMWb}M)I-byvVR)?Mp^$#!)=dl$ z`MuYaD4Vl6UY2l@tcPEdMq*l*#ACei)(0adn^cgnC*l=oC=?Vw!*RwJ)#$mwKq%|L z6UkVcKKguxh!>$Jf>ii=@RcWaE-EtLmJ0}LEHox#85jQg19#oFHSE&$Ur!s3BAi7O zcqw?wO+(enT@aEFTDOcH=;n9T^(y<*5hZY>xFk*Qkld7&nzrx(^v zy76iv@UaZFiq#m z)w!Ron;b_lF*fC8rdT)|+DocJ`@bGj2-@n@K_pLPnh*sVe{uS&V?JHVYs9LpmA2mQ z8P$UGhe$u!?*2y$iY5cj*Gpx|p>VMo+U3$77&E#igpqsiYD8mrYUkX>`+w19#$VN^4+94%wOC(l4C3PSLNp(3^6aAuNQxy9L-p-Da(Tg08~9L4-wh?(frp*9nNc-=(Dx~0N?W7j|#b`px0rCfvrX{4~Nq( z;o7|^gdx}Y7qWfyKYofwPR#~~Na&0+*bW9~9M&lwNp-s>mHVC(aRP9~-AZ7D1m&(J zu#X>Is|z$Loo1yzc2W1J%57n?j&~Re&1>4EI5WXoN#Ox^me8zz`GcLgJoL0NV^+6^ z#PkDEu(AC;R&>l9mB2E!|2ppMWO>LeWqxiYMWb${b;1B5Q%TBi{O=Q9wbRuvMiJC( z#gK$iJxYS-@v_mUuu#S~`Zs=>KjFcnptSVM{UZs+<~;@6q*_;8U}IpD*D0;(J@;Tb zr3@jw^1bBdPYzH5TWKggY=Qwuc+W%v>|i!dboTb%zhLu6>8L}O)KMz^Q4~jYKR!GP z?#4+>pxq)ILOKLamh4(;B38c|5sB$d{DVW_Ns0VFedg}eVUo(}QFq1iZQb`R>@UhC zr3Z;@5)IXUq9g7i8sA6wlUcx=?B>yVWcd|p1Y`vo{Flp~346W|;VuK*`Ks863g%f{ zc<9TmJb)|M7nq*=uQ@;KI{*dVnA}w$oeXn95rm8<9z(+aPPg}g>_-hXC-+M)9}y%p z(bw^<3OQ#(hM?99*ejXN&FNU^Xp*y)+Nz&)-iFYXd=czfC3s`semDDV*I+%KM^%Lp zTbVRwJ#c$wfpl<)k1OmaTD@a9F|xPSFCnOXi?C0S1#%mx2G_ndm+sM$J4Wt>O75-e zBULQzVzeL-Piib{PJjxiSmEC5ZMbc!-^ex?h2NxQi4~(l zrym6lsud3os!p`ACjBB?Zpy^oa6MC0NK@g^jSoOH+`8ubgbEzyT)YZr-j;^|qMcrK zKjy48(a|au^ehuoy8{ulvI~POr5v{Vdl+%=Ly>EcOp1^6pRXcE!x^2e$paU5kHzJiqPIDqyqW*(FBcn!9K;$!IznU3u(z88}BW z)b1d0L43oR^bR^_y3U8AA3Pz?MP%RB`x5lqX1>;DFtafe~AMxLjtzqq73;{gX_YQDiaJv!M`MzSfpF{OX z%9)c|SdjU@y8yV_ra1XpjZ^r-dUR4J?k(v4IGKuP-1&e&EIw^C{7xkT&IKW{r2nBx zY!C$IW=}euh1D*heE_lTQGa+1=0W*Ua@oIu_%(%86Y1n=HcegK^_lzh$JL%HhP0p^ zJ4ikTA{UeaS4qDjOB=^LxnwA>a#1hig!Gw~Gc&^$O6T?r|4i}4Iz&aOEJ5#N^)CF) zuoTHkQe=NOgE1GFw)yogDPR@Ykg~?UH9;jn3X(M;pINw5o*<|eT~5UfXr7fPz%2!d zs)v{U8GREBB8(hzZ5y5`qyB-fV-?YcpnN|s(M<_f$f^9`T?vP5dK;!HKmQa1!w&v$ zo6C>(bT}!m$0`-xIW?c+HuD zm+JJ-X)^;KctDp?w3?+{{-B!T)|sp`BX&Cz@K0Ym(+S~@gbLpKU_5Ynw!&qxNvHzk z1H`ial8Q?E@D)QR73e*hDbmC*tpcae$Vyd8a*q_ZW{Tvw?KdHy5xo4`+xb^lS7X^N zrUh*=@bK^+UtW+sD5aB7nDp8ncX)IYBsl-`480eZVN7D_jtg^3}7&uo7457ijwoTmWp3KzMpW*S$I zbDuA2FZ@_Sa)Dz;G16qJqsjOru=!Rg-D`2STs@qnD3$4mLs>Pypx;r&ml7}4qXSs`Usj{fhDEchh0ngE(q zqk`c&u}9U6kEyp6bImH039K)cMHjL@b~y^{9QfuEGP@2&6wsl?Sa-@5DyCpfmo8$K zMTbibCAL=_gf+p+z1)380dEwDl4p*t+o}`%ViJV&DSfz?-2b@1QI~bYBC;edghUvPn6D7 zr#Oy7i~ozjYA7y@T}u2f({-^*ha_PTSL9P!{*#F@u^g!&f}5TG&fE;1jc~{BuK*yz z-CYv7sumn2U&-dw@M@C>$v?)a%AS0-=ZzTlsrj0fJowf&Xs6=^kh*N8mD}N3 zsoD0?4I_JMk_ArYboF_^H50EMd;@s)5}i~}Tpz$Llof4$z7M z2)RWLlHO-p18VXGs`?+_sX)pDrmFTQ&tHv8({#_b(@^wYm{P`=SWD07lO&uo{$n>X z5k<=~!~p#X2tbpo^{2f107(^u(k0OC~#=>skd%(C6_8EY5{hIcx zuG;-C^#m6vzG>_v_u=Q$qN);qtw;gKr5)YlTS%fVeN0qHYfjUXWq9 z$zbZ%h4+`O$}UlsoXD{{(-Z8O?*qPHZ7vf<+K_ouDj(J#y%3FPMo#P1O&FoCG|&_x z$>M9|#(bjxpWZokycZ=cL8%a#bdcUB@@DUN0qyYE9XFn+ok=el*F_L*{b@S5dAMlz z#09ymUm6Rp5JFxU`aYyG<{LGz%WOv$4g{dZy)hOwybqlsWOWb0#7Mfm+h2l5Dc|b* z+8<>{?f2~d0~@h{E9YO1c|xNZW7zd}+D;CI1Al}O&XgrK$9oY?w`S#VdSZGbpjh6S zcusE{!TEb;&_kV~{~-DC2lYzgYSAzpZvPds8N(1RwN?y$-;E;K>=#PF<3#B0yGd&^ z{QULr59uCZh^w+L4M&1>v&_DAoN4c|X$PHK&&Z{Abf-9iCB~bsk^G-RdO2ACPOn2; zWL0w+OK!zw{n0`cZj z^hkWu4dn_oebNZIg%f3$ULXWE7~y@A>g~huTUSy&rr4)LeUcVc`URe444SYC&IrBo zdiU91m`Auwm8fd!l3&<8Fy^caM!RWQ2m>p~(@8z-?;-??6l8vLl)JpcRJa zOND1=cJYzglMI9#jc^vV7+g-Lzg=}3-yiO<2wq@wuka?mg*E0}+j1eFsxcxA!Yf)j zZGHbsPw#>JphDBzaYV}?@Q9F13QG}XWqn&_2w{NvXj#6X3sY-4}RgEk$0vc|1xc3HI$@aZN0-=Zd%8`6oT{3Fb0wu!xb|tk-NcLL6ry|7`wme_^ zq_!kZusx@$AcS;h8ydP=Iwv-66x=5f@8baWxn3V}GYSpj6hB6=B+&m6a41>dmRsVW zXW3=2KjuQWAM~-Z&?Z9yHT2;m{Wph|zp#4D2}QD@2w z`|3oQicMz=jwgk49>aErLP+=`Z(5vAR&qC)A%hS71cZDO`gZS^Pd@9d_IJ|+WHK>= z$a7emAGm@(lAUG%ZH~<_2ug;NCbCD7$A>b}u!L;Fn+!2S^vq1Gp}xSpim%ie22sBU z?+f&V7BFnorY5hP6gz5JBjXDe(%bUH=OQ-uZm8RewLe&jSBe=XLIS-+$7;VfA230| z$D7f8r=e@<$4zv&g4Br19z(}LD(ZT;n07K=johPAY*EVhXm&cGTjr`9T#2_q2Liew zGunCQ2ZGoJ+}l~mJPxgdeF zendf-^nu-6+VE%mp-S^#Cf&+RhqMZuN!R#7_wSm;yAbJq$r0v4{*S8P_CHC`ot~dBYYU;n zv#p^mk_oB|dJp$`FArM;nT}bTQ3OJ~25J>Q33nJ~2^TMl5>1hQek9-@uG~2rnn42u zC_xKx2SlcDZ8DD&dyPt`q0%EgJTHM|gft`xxF&uQAD2z6hNEy(H6s;<4OH4%;rod{ zE7&ZiFEy9^&7^>Kk0*+6^B*JHi~w=P!v~2DZ5v&m!#Q#$)N`1moC>KCDC)xqTc|q+ z87VqUmEeZ{!c(UDdY#X+ntRxM+I!xr!K(AT$)q8`z$5RBzM$xQWOj5xmSLpExLEhf z+GeV+AbIxRFasSp52tep$Zs;k^gRgsrBLnF0)FmGl@te*u#83QVtx!P?hv1@2}&|7 zvrH+VW+}1JYH>BK|E$%0dd~w6^#5~h2BA8kFR^+5qRy+b`Z)-Af9SI>eQlSw%!GxS zN2l3`k${Vp8u8;pL-`_lqjsSd&wN%!f?j13;THT+V+{~(a3h6~^H zwIQG^0M&;XG{XTmnFgSR`O&q!$>iibk~ocq%GNLb`Cco5r*dm8*kl7W;VIF7S%UN> z+a3MWpX4|285+;>4hzBpFfBLQW&P`&H~V8Xj(bwz-l<;`5)uNTMIHm8S!dcemd-V% zreuRfN=gb|*GQ$~St~J;!~g(lmpS+!+ADKQnjV95pSTpl5Ogo(i2cW`C@&|cQA1#21g}|S4UofMT&*|77?vNzPvqVL zUuPZOYG$lBs=(=|_#hKy#(t%OmH)>Kuh=3rt8jCaX(M;Cg3)qZ$ za0&a8PL3)$dS70_786y>QN)^d!B~2|`$oidBye`@jgvCK# zy>RHCiH$tsXjo%?Hd!oYHVKFx5>_IR2Fq@ljy674@67K<0q?qLgMFgmB!W(`;mPqr ztdzaeC$j5T;3N&frPwu69^6E6j{+`@5|Z+P-Jb{{@YG1RqeNrgCzC+fclmlm!B}%q zJyfjMN;{z~oWZvr^}IU9M*A85>FFuX^)3O&rp0356ODRJVMZUN>_ZIQSCmcTxU0beb#jZTtLH=~ZqI4? zx~PxVg~dAA7A~{lG-NU9q?z5ZKMZF1epdU7nsp)+L5hhFt&sBUkq$jAU7n53Z&Uo9 zXX9AE5BeEVcAa$LuF23H85w_eM+tyO%UMOR!HR4a)z`A;)Le;Ew$QUVRTucm(&>%A zT*gtAUbBc?qH(Cx49^WXoQUZn)fil~UhN@-JZ(eM`Lr)7O6I%b8CIP9EI<$D(6>6^ z%s_kJmbn-KSgF+q`phz9*Msd`rDc(cBQWwZ0Fy-|cO|CE1TLxt6*=xU#bs3P`7+%2 zA~u=w64n1jju93PZz~5E+zl6GOhla(Xz_)dr^`D*thpjJIP{Te^~EBF-GkC`CATbx zY|kp|ei!-$utgm=bmX3xh}fcM46yE^T${Afc?|t_Wylg{0m$wZECS7EF>z6DG^PD^ z72wQD24Lw19ui;8j%b2f@)NxB1LrP)15*`*HFV=k5D5;LI>qRza6U*X_ePtgWaoQ{ z4iU1FAB&X76j%AoaniM&-=^t8Hir{Y`HK<6@%y-whJ({--*7)spO+5^GXuNlcBV~S zW5CIlA``kX+guSrXb$pt~d*r^#T z9^MQQZr4^rMYZ50aYuFL9JHmixV>LJ_a|N;!%GDxGt#k_^A3YJm-4yoNoO@{Ev}5I z48NY-7BT$Xy;5MV^=uw5CZ;Tn(4HoSY>;Xo{j zyL#!7R}8I0;h779IX~B%ij(IbTay-jwi9Ex?}S<;lmY*^BrDcUyhSh3s3)A)u`^BR z8BNmqkN?NiTL4wnaNom-h)PL!cXtR}5Rk4*Bi-HIDc#*%knS$&Zb3r2ySwv$e4h9D zec#L(=8g>DiM`L>Yp=C-ddeVr`<1)iL=Hawv z?kbaQbj*in)WBbdE!}4t7*3&kcZE>kI)UZ<{4Oczee5i^(|PB+lB%=W0zK}f4u`LD z%M(L5yq-4Hm@vf~%x~!;ll&3~ze2l7W>3%MQfq@e=zmx1&+E^|YS`K`L#+mMSA7Xa zvK+vMtwB-TvHV$WdhE?&anWSd!-`oT1O2AB=S1G%8hYL5-5I-`lFiX_J0x1?_=i93 z;8*F_ib%WdZnH5eszJQ$uScJSY9hjQwn1Jtp=$L$`VvCa^iDNa4J25DDKs}r^8V+m!O6gZ&EjRW#w&^;@xV;q8NKH%Q1Hu7*;7zTEFHoO-bz%`yu= zG=N2y2YN$GAHTI3Qre_9>axIUE_7dp@4C`LWwZ*3D3va!yg>`5mHhQ?4F7sLT(51B zdO;LsLt(^v)(SbT;iMu)k2V)cM)LMS%X{bTfy_|SY%$*s0wFIRM(Ipqt#GQ!Vz)xH zwE4Rn+EV}lUTJmnqa^J6iS-#*aT^zr#dgcFs0|nAEl6aRFTgRBeof-JVgry}X?)T` zS&=9JV+S1Lsm8d@&GYJxPb_wOrM7AfeT_l&=?)0(@hjsy;QUJD%#>XCw{o18Ipoji z5SQThjs+v}V~vdR9r#i?Fyvo8TVMjH`|ASE>_DkTCmd!7?b`lV0c!W8cuE+{W2?1M zXViAL2l?M)EPi~(H8C3flglHO>+=iD++RUk*Sm|eL?66uzJcr|2(jXwQ*WTz8~S8H zO*c_4v1u~Bk>3=1$iM0BZiLTqzM|TEB^jbTEg?b@)}`qr1F+{j=18008zoinixWfd zQAEq|UGTj%$Qy4Rff=twNJZY^I*KhviUH7Ny_8XHv#XtzM6Yy3 zlCwt1MS{JPUI^Tkce)?T{^trK0n-5l-}bKd>dn(^V{x8u#R z%a$xQyhN%CjihIyv?pyf$c$=&F(>@NRn;NeHpfyPX zBRZ%$i6nX)?bhGg0k4X?mp1P~^Q=t%ia6L*uwUz0s1HFIT-r7>t>Q zN=a!rQu;X(~Q~wYraV^b(7C=gm~uQ*{E{xIGWp@I3%Z8g>&yF z#LWd#v)SH?Yrm`wqzkztaJcZ((aGwFV zQ>hdrLo<&2d$0zlw#sB1Yrm{k|0StlxDCg!Ayx$)Z7#DMub0h+;+`0Lk*1vCSHGN5 zv|p`}ASNnnO}^+chLTHCxU7aiHw|VghBQ7xi{xKBW!Gs9Vzd0YKu1;nuA5^qn$C4A zwSyvWc}<(auKN^9RR;bp8_7d#)Ul#u)-0?JC&h)Wftuc3f8nGab!q@{>muR}L>RW2 zQ#R{!Kskbv^UJh+bqY~>{b6WB=KHf&mTq4CBSsZ_x z?PhR2)eqUWpj^F6+3YGAj(Hnp1bNeu))&h!o``lE;-?SfbU?5D$F6w5EV6Z>2mcLc z+qaM}(199p-cNUa?unQ1B*cBrq~gM(V%w%4Z41O&7MeU?&`%ka(-8cVskF06F~@KR zK&zwc`AG-mH&O9yV8Kzf_V|%nOkmpQyN6^(1);m<5FFo5)QHx-DB`Ez+E zJO79xgLlojJyPGcC!_v-#vo9GS+){h#(j}v_6ybZruS@2xhN%lZ8_v1c{DxbPq+y( zP2L-XE9F4Hj{Z-lQEyu~!~0VH1usV~g`ccWDRS)9Z`Zfey|7ctVXar2=xaU>NI1;q z*s{2Yq;lf`TFR(IM~KhFKb&LG;X?|*Ii7$97#H%lWa*Xz@fxQb94wgjQid=0n^et- zYT@Hq?cpL}xgO8-rkqtxIntRw|DC%QQ8NPL=Y>c{L_C~9F~iU8hm3%|K?M{H_NBf) zFmVB5-xR;NhFqXh4FlziZ@bs^+gj59HFWXPT9X`+UXJ=R8$Bg-Tusv#DgNWxM zz5t>lMhEVrdC~puj3b458SD5?)QgSos**UaglGJDL!W@CTID=WCku9;qr4K62@bE)eLa8vEqu%<9 zB|#mP_Tb23#L0>)HGHuI^rSI3WWCga)=-4Q;N#jpn}+Ay&n;A>vi6FzAWD)8haP7{RpHz3`~A&?zfW1a&Pjfua=FY zg+nB)sk`Hd;LW%mm&DeWSD($Qx1 z599HAVDFE>>1kE>6nuHQXR+TBzdBjQ16H>7-kz>bG&@<0rg2D39Bhvyr|@}jR%o?Q zKKZ=9@Ua>W`qHb___mwT(Br$!$Q5e0xvv8|Jm^881c0A=FtDvz|6sZ}8`edggIb=Vm-U20-ksJD2pp|S5R-dtz1N(hXu&@B}jEY)IM7~IsW z_1|$?>Jmn$wgEdwstt!wd!rb<()UP?b704$HgWNu%?;6|Uv7F-BNkjWti5yDwYs)4 zhoaohay@K_cIx-&-gXQt=6i<9xB0HCFMGrWmT^}uJ;?_ImRt09&&u<7aY2*QIzD%`Z+kGbzy&2vN@Jv26Y4b|8|$4(T zImAdSHU1T!to7ZjC34Mq@6;E__QSoR0~$0Ojw&)wq@%SGr-Of}(%onLR&Hw1ew*?w zf^-07m>^xbtNd{CcBP0W90eEEKa_qcGv$9MYq(k;3-KC(dE&3Wk-^2W6SBshH{1Yr zhRu@A_tffg9tZgjk}vg^f=~%r_?-c>K!xDLG>{D+9EQ`T!DF9y{2xh^E-Kgn6vbqI zGWia(_bjEK)!|&@xF}C?$x^8*U2L>3Hpqt*^a1;(^9VXW3+C7r9XVmWfe zPiDfAt>7=LI6M*XQNC4I?uy}x!Di@ukmG-;&ki@N7$9c*4Iv0t=-+a8fa1X9*XF`@ zZMEr)YvADjxIZFl!l`8Z9_Y8c8${e@B*O`}Aw|V%*GW(iSwh}Hp+gSU!OV73whIjU zzjV)oLw_h@7#J3=awFYh5d?M$N@%GY0v@$d^<#iz>rDhO$+pOFm6`n4vZ1_R_PkLB zA@%mmnJk@(j>})gQ-MygsC?m2ZzRe~F5j4Jx>CuvBvAO22{9c9B&u-754TB0*?94X zS$~6+WSU^!KaTH`M}qK|rP|&Xw}-_QDdFXa9YSak z925elzY3sS;*t!D?bb-I@t-7LgM!P-K-8;lb9Ey+x4Vo4p zoz(jsXP)ypJo?~e8yd)}Ip!lvgX+{c{&Qnvhg4ZTvxg1PRRRJ9H1to23*o45e(_-H z1QOK@O+~nAO*kvjkjt)92Vk`Rq6FWTH-|0mc7yRt-hlB6s^9r>%+3e!$YpEdzPU@_ z4-SXo{1LiP%7Z14Px0eN|nOQV8Q ze&1tXz56sre)I>8$rhkAwR^vGx!Px2HwuX==i3@D12!E2S_y2Q)Z`Iy?0*i2cTddB zfW7!AC5}IgTU~cwTa*dFXUtjZ$~Vo98<&NuZCg-f_L5)@3ubO`FOqb4;2Mr@!W9M} zb>|4KEy^wNJfdQGW>E|2DJ)`J$~UgIN)9S?GTT)oVa>NbfRJ@rd{U?VKf`gM4-3d< z`FCveeHU2g&qopzj@Wv(KC3A)_UoaRUJVglJipM35i;V%)XxbJqs$wO@eL$&>J@9) zeC+#9+=a<>f`@t32W!}Ju5n0O5#RPLkI3mC*_v*{JMZ^vW+L?g>p~sH7+3CBI2MdF zZ@>g_{a?2ef;<+p*}9spH%fEVgmx&*XfB(`3mjfnnNNz?V==g*5NDL6iIr9#&)z;G z;hki8h4bbFls{^q={vRlt*BG^}f z)33w30h&w<>HwUe@)wI`5H<%0>3a+Hr7;vSD1J#FrpXG9=4&tI?3F}2GsZG`$(VoN zIqjXCL?zOxl8S_(=U}f>zdu1PGM{Ca|G>r>RqGSOe)XZ%vCf1HhhF-ipZK*PwPh1iYt|7 z%MHdPu?sHM4^O{aGR=4|14X^IjiL1Y|9()BA1^)z1LK*{k zCcYowcSFePic)n;CSm!T*)2D_52cGE3_3zmiL+vG;Uy4POai z_2GlVwA*wejbK2gO)*T}yE#K2XW>_|;-z)fiE}C?K3!@KyNS%drzz3=hla%gg+=pv z_QFtCLgi*7o$h?4a4AMrQ1A477K{>@h#+dZ= zpKNoIR`2_W@QI6yE;dqKAw}v*&_qMpm6Ji-6xWt=ADYwlNf8<1{BI7DN#i8 z(Ik8nYfgYtM=nM-r9{-_D@5$e^{&xbSrEWa|zYA5UHQ0dYwHmpa|XC zSQhx5r5#g`qVPo!d5Qmc0twxlYE7cNRHa?}7P_cgKwjPKIsol#9^JdJ7*GKUL3dDt zbc+{Df&2`}_Ft4||5#>MS?HwPGICdirR*&sscCDW(2n4;cGKwQb*g){x!t_!Ik4e? zlgzP;8^HfLi!YxK7g?Jtze)-?r+xOx{`6Ly4^GuYwn)s}(CROpvk2qM&s{>yPrN16 z4Y0rv)pJCYuxF?ZHn}+rX>|1WPhez6f06R0id~W1MDZ=eH853pOn+!XuN80ObJ{2V z=7H7<8Qojqato#$>yLMT>@x7+lE7FfrP`JM)Xr~Y-~os^w0o+&)bNb@J~hyN`DUxO zfG`-CV08v(g*B^TpnlLhE~?u1g9`9enAw#wh+e**fUI^2gxeP zf(!co6``z>-mNLa=Mb%^9L=M_&={&jC{*7rTK<4x_|OP z7fPd!eVPW{B=tTK^~~1&kT5`h3ge@aNNetLMhu-_`R}rFa5gdo=*73i^@6Jd5#Y^R zQU;3icN05VexRZG05{zb{~tbj-j**_wY2wWG7}M_W)m?w0mu~@gVvOZd3X_7hB%kc zBVje)el03ZC(~vk=iT6?e3$<_L0?M6ePE%~U>ZlMJSH%*0E%sDxom;YFUu`12Gd3I zt*u{!k^FC|t9^yYCZL6c&7SVgvDrud4I;a29O5NfdHU1{2kw zWBX)A4?>7Y3oa}e?NN{ih@_KAQ%vg)f2wM=6mit_lF;oY$|c=@Y^@)HQ<^W^%Vq?k ztl}`n>=14rx-6_W-ol$PfW0gX1=MFh3r!?s-k$9_QD^86bl(+BQpQUxp00mf{E#DS z`5L#U6r+k^l+KZsBuTRs%{IPr7|plqWUh}e#o(9PEVE+wDSA~{yOEy|Cx$UpFQcIQ zsMrbp(g*cS7%F^$UMV8w=!jsgyL*_=$NcWb#aM5mfvBBUC74&c%@cN6T|zr_=yF^Y zRtV11rfDpW5*&%x0uHvIV%nQ-rM1>>84PDN`V|;xahnc-)5=Ot3UiBvZK%y zy3xF6vDvm>5tWf9n9Ul}{1r|HXEuOi6yS-H(TaVd4{4%*2a5d+P^gNH6WC`|U#(@( zp>pu)6J|B(0xke-cS@lZybBw~?2nk{5-{6LVX1u;+$lTzpmI7Q`n6GHV6KdX(XLEz z^b&#ZkQzoyNl;{YVY(N934|xQW4oJUlSx@Ja&r`t?w{__K1Adp&3|@&U`=o=rQeLe zHT$?0>aMW5XgSw1yYq|{!>qSq8x{b_Os^-^+={;HBSUE%eoDK#0eiwIQFNAo81!$o zE@+L9^MJaSX)Uysy}siha*GJiCp=)*XzUE zT#cjN%a(#;5rG&=gp^u{o83b{<~}umT3~q+>dESu?Z&J4=;H)ho3Yi9hpCQ`V}2C- zpHY*sP9+3JZ@$Q&sq%u^ILG5h$v^G|Q+M|ylnl}0O4@B!*3&2W-dzC)(?e+wY7ZWA zhxQYvEXKF|Wz^P_9Uq1{Mk}bprGqeMZ|OVy0ih7vCv_AixS>ZtaEJo;~wYcOsxrBil?qA}nw&GFeK?n?Z{f=ktF>A#-znzGb= zR>}!U->!`_qXtZCIdo9&xYf@?!3=9dl*1jzCm4(DXlwvU{vIV07)M?q5TSKr8yYT!V`QAp>Z@_9ydEaB;%` z|4)73BlK@7o0V3f54`d!z&1J-!$IVRPQv%ViVM{4rBEkFkmnuq;9`7A9TfPd{kDH_ z@cWzN#Q{I%Ua;P2(JO%bZZ7?FNMY9VM|O@r5Px0o2}Yy2TCOz#$HRM=cgFwz9q|Py z4RVA-&-SON*lkwuBXK#P-8ypEy&fC^Ykd3A?cv0?em%WF@CZwp66NBZu{T*$l7n?! zla{=2{8cT##;P>mKapMfqmP!dQbdOnDkJ(9o?1eTR`a>4OvWo*Z>j^%Z0u48WS9>1`->+h^fpllrUn{(!beok{ErkoeFbWpI= zz{}H5huGIdnoDFHPZ)%vnoea4+b0YsiJLZ_%&}!OVG#d5_yV_#{lNnHt-(;d5Emv| zCDv4=(AHlDYg>tl04yeHChGj%aQr9n=3= zaXK9MOp1#aUE+uXYc-Sy36Bg8ygK1ZzsYAoOR6sr(9W;!&-F1_U2O_72!wo6Xw%g; zvy{>}%c|9bHlu73!teoMvT8d3d{{IN(B``xZp_Igw@T#nPRAlsKIatXlxZ~znl3cA zr$unFZA`#p#!K;LFxt7t@*x%jW#-Pdd+)yD$?q= zP}SD=-8A2-bxTq(qTJvydwgT3V%gPbMYxUjAXV-|2xZzl@m^UHmx(awc!LYVVt~U< z2Nob7mZMY3eOgL`{zo7A;C*{izt$x?{k`3!0lyXh>be@F@Zr zXqWEbe}W8jBmJQ6-4lTK-))Zv@(bJEIJa?ULU9V)5Y4STFPvTspbbWa&hx>Ch1wUSco)nY z`$5n~Q|GJ>AK{2jLR@C@b?}!uIlY zk&11BtgD}z%#MM>hA9`=jAd*xT7H zS!vX@YC+$C-Te*B|O#*o8^-}0f8Awg?PSW(F#9PT)~X@&-x$)w=7_t+KtFM zDUwa=#|{RUIqv&xZtuxJ0blO$0zpl&2g= zSN!^x^HPf?F;+2jMUP;h?(8+`y|X9bSpJJ>D;!LekS$lu^|0J;S0`e*(>26l1ah__ z7u>n#r z8Y*;g!!zQ^eQ{##Hm)OEtn1LdzcP3DX8>w8yOKNrfL{MbN`}rU|99{Lx`1Q$%?+$q zWf%>xY_`eiFbPT;b>xGl$d995;U5>q;}8bpA3!M=0(@)cqi%jo404`qChnUzZ!%ti zWzx1z9P~kGX9o}0heBFq-vDw*`b`VI4Lup)v2+Q(|d!M&CVlp9X#5tgYJBCk0DybxE{qKn_-Fk>`45 zmxVYR-ju*U78E#Udby0PzJAN@`yzohXJEQKDwHIkV!*YEQYzK}ww0C@1=o!3v|akbKKd*va!KbjjZIyuz7(Zt2l5v3m% zYvRq@ZyBr>o!g$?ICasDL#z(Bw1_`yOzZS?@AQQkxvIvfiq;8G?^38El9Lh`Gc8vb zv+)96Lo2@lc15IylSsRN-~96>;ur+v511p;3VeVuT&O!0`V5w=t5Pfe<_@bJ19|t? z7`bzTEfyq#OH#H5h$gG_wn3UaE($B<0wZt04uz531%KcJY)&V)OMi$i8xN+DbwFYM zc$~VQ5@Yt5WCozXtPv7{p#aU4)DWNpS99}!Mcm03_Q7Bja}nV}wp89KDX+{pTpwvON zUDg=6sHJz?BI~9W(Z6svC!vwA@V7$MuQh_ER^$9rR-1}mWTQXy6s9^Y)A`+x! zqo3okB;+ut;>1_RY5OTrZw!_^ zVhx9C=u2v5AYQ9&fh~y+$uukk;fB}Ui*&Kn z+VMd-a;_I0XXLvRQ;#K_9c>@MHBpC`D%QMnvtl?D&gUpU8%&*QWbSY8!|_ghJu5ZH zRxEC|PCLteTzfYo@lQK0SqYmTxh|L+H}+2@+nuwVmZZ5z6bR|_JH@ixr^*Qi5FvN( zHeM+fQXVdO=<{pn#x)|`?M~EVE8nrkshrG(E>KoRqeEJA)}!=feY>ZaeW1^-By^c! zJSjj!?Tfu4O$|v%M%WY8u^~|o9cL4Z*!fFjfpBhm%#18>{o-G3{yZ*GZByO9^O=XZ zi!|WyvAo0Cs1N}YskmE6OA5+dTMaj%iuDQ&INGywCOdb}^T6 zF=Z>|2XjFU^oPgGYLP){DijB*twrfc1kqQq=g*R0>cw*ryam?>_bVqI);9I+7fO8U z5-fVeFmV6^K9L!h6;LSI<;`@*%YB+`l34PyK+(M3kX^pZE8-VvTUp?pJ2xADd+)N4 z)$x9|dT`e~Qhc0vzPDGb8{Ns)XSd>*w_;YcF{h+XetmZ7Hwj~ZiBJ4Teg2w@INiOk zu8x*;_(|Ii#XACM!(q6@^LfU7By?OTL;H5?w(g+!sKkE6q|DRZQ@_M0biGCM?E5=j zt5Fsu|GfI#1nPDLP%p8QX&2v&o~X38{83AYJ2^a*QqV&`waX-Z2#AQAUfy0RF;M>r z|D^(DLbrL1TJTw2T%nIKF2Mo*hGXD`KBvPWIsD~_3v-b!jACF=0c>g0AC@_$gFT8W zUvP2~%6jc=hX>K96!pSBn$yOd$kFdb{9w;G?pE1fI(p159*hA8cE(1B9MKy#bJIWr zD@D|4xjkf@_K9Ba-di`V!!GW4oVH=PEZGHHX)%^*{zQexq_47yKjtl{cR+{aeRf>y zd{YSjAeBVl)pFWy!Rx)*ADO~okyJy7&>e53t1l?(UQ$#fU}Th!8hQ{$S0P|$SFJ!n zLD5I~We5=+f=;jPgIIrd)k!ghJR3dEJ?<$V;q-0{`tZDV()Qtp8god9m%3VYHS~xN zeXul>ONF@0vU$UX1&LJooLsT8JRwzRg6r%@l9GzP2m;dKSc?a48q7={F0_vuwJ8R% zmDl<8$9J|`+?-fkJSW|4SYhl=8w;|*`S6Wl>^JI4l!cP|M#Kh-4V5^RUK$6}y#fPC z0vVMrXR%(hS_&Dpb>T2~mlkDj&ok!{H+xJ$o!ApdGW0r3TGB z9S`9=JqHF+Me>zL^Ojj^x~S_$YxVCsI!;mXotsUoi}rQm@Gj#$uU+6Bg2QS_pLSwL z(C@77c!Q3Wq*t&fisyR%tozb)<9nL{-b%j11{+~@Sloc6-}C!wn#u1!!+~GjuLwy* zpGV3GQhCZ{2DzdX63fVUuYskQE>d3GrOr#R8+zZF9%z?U14fbU3RtLB&|Lauzrw*7$oNsbk$3@;bi^8LfOb`q@T#{ zIq}Q&o#wTxZ;vRA`?A~X=4a>X-CL;OlJDA!W9=<4O)$I-0i7 z8^x__q8f{0q6XfNyh_!vT;Dpm9v@WNT{1D*Zjc)l`gGj=xO+`;&xOns9Fhf6sgi0^ zy-9=$q~b>t_l1F#?o95U^5xxq<$6&2Muqqd>VL-(U zZDE_{D=&_kuv}lK@dwH>rkjlBK_^R^9AIhc!=k!L7lDp@w6tqx2)&ah*swUgy>b9z zzsoc|h9O_Tcm#xbXFp}xN^X=Mvq5-X=QuZ(UB$B`hIaCq+3~4Ygp81jI(*I;_?9nWa(7^`n7WAHu=U%@#&Ac8hLsbsAFSUeWGQcAoo3F2s1@wh!9 zA*3rA%0=6<5CBr1GF1tnoNcz(3R7hjfuKXma+X)ZItD1mDHvE#t4ZB$(p_~b(B;b? zuyd^L{4gPg(}8SJnL#_0ChH6wd}ub_HC>#tHt@m_pueLi4QPbMVF z53t=lCG6cd(b}@>Sel!dsPIhHYHD%OR@k}w!*IJ6+Ofi*klR3e%nh9O7MxAy@a_2O z$}_brk5#b-hEDzFOjR&q`$4Ip&6}5}fpp^h4!;DAlLtCk-b1 ztY&^R-A8p$0~<-a)ft2(cabSqw)?-~`ocEcIOWo4ZfPnx=t zD@oK_Ji;&R`rHOuLhBa1@9$E?xoy(I?cAz_6H(KRcj zL}fQA7Zdf7x_3UIoCSWZNFF>kHaQhD?VfpOTjJkG$aSd%)`!OYrN{-KpUDN*i?gz! zl_I+peLHJ4{)s_+2Xt}am0hh! zLSBn|4tbmWbPyI-k$ha8^FSWndGvir@3~eW&L^)zZwa^aqt6-fg<(po2`+1~r+D>W z-Mun0$sW?vv!~s>z%UaeAi-j*1=a9i^@7PKT2d}1i4bG zBW2k(s&oHbE)h@eE+5D7kK1XkB+-E8hY-ZpB?@vhT3xFN{72#}0;p`dr$n%{@#Q- z0C}DFVST=tGq8F#g=Zzmk{&6<0RE7uT#Wzh#r8=3vNjP7C@}eK%PHq)j|mJk184~C z9Gzu1XT)cl#VWZF?e!POuHJEpjb#f0EZK?Y*++WN*uB%FO4o>g1m#tS&zA_BjwkF# z$(tq-`p}3lOr0@s|N14?`o@S2a%{Y^+L)9B>GL=EB>FTxDIE^09Zk^r(&I|W*I^AT zrc@iLpKPyl@n?l%FT3^LI=ro3g7?R>M4LL%OW!BsNDC=*a`c()4iGfmj%`>h#z2K$ z5S0ZH^$H^`xc7KAm?GQ)_qco~}FEz#){Xb0wAc>vZ%U z=QL#+&*cMyawy%dpp&iIv&&MOBM#Q^%7tpgvgCI<*MI)}32fB%fIa<4BQO@+IQUHg z>M1nlk1Wro=4je6GodrH03YB~LqT znMlN@qa~4|5^BZC^3;Hk+tXzJ-Xi&*)|-S!usCmaB9mXfE3bM6<#cCir^ou>1^?oO z9msT~jN*QAY@9CF{)FF)q`JQK((xrc7c*ndL~8u?Rvz?xmt}Q5hFnbPbNSdYH`B)8 z`SiltO7fC)8-|`>Od`^ZnaV>?WdkkCeF>d$GZh|uwWRe(IP9c4cKdvcgWqNeh?# z*Js$|=MCe=hArSMwPNHU_#%TZd9@Cf^uJ%3Ci+=pX7#vjTvj{-FMMc@@8X5SMiyW1 ziW&~iV*$M*{gOCz_E|60n~yP_z8~dWahX{=2!Q~vY?{aU7z6ds;rr663uSce0i&;;yAHxbd%^|+x^PhwKmL=`pL z_K-M7Z*W51BPY9_RqW-vLy`C#yXU&k`Qfi8=6#Qg(+RGZ{UYm)wbM#&7uLI2a0^up zO9(75h9RaB4pV?~kqr)fYTbp^aDx{h0la z7|O#ZjkA`^vQrAD6)q|o+Iel(vvdfw(Xh4Z`Vet@Ml6b<;n2uP4+I!@ z8XYI27q56uLBb01@?dhsqGz0MX~O1dVS$|m#l))?TUgT$jI+0yf6?D|qZ)4%5jPy7DaKCC z44HEp&Nt^=B(FDkcn9xz<5NaZNK0gJ?fYfrW`av>W}UZJJqd8X8A-?=5{48f_FKJ+{&Kp#a{* zr_z3feR$d4$FIME<*}(@xPKLN^K5K_B7SxLbn`6NKw&f*5U}N)AL_(MbpK>wW23r) zrXK*}PO-15B&qOHQBKVL77~hh?G!@__>N0Fhc!&NpU@Q$zQ44UTAM% zeD%?$(w1rw4pX>qWY-UP-a!Y-7^1h=uc%g@Z@mbTDt#1gSVLwz(Ct>d+JfXUlh?}dQUK}h4E@{F8}i5pI~ zf;Haq^pnrs+mp6i?Q*jv+a5&MEBVLFx^`5E;rqnI#IO&Bhh@ouin84AShX@$VA0kk zhGpUsRoWj8=(aWw@8R0i{U?G&>r(EmrBCc>`d4dkKULV1NY;s5eFhI}o_t5=@mVL%v zR+vS#3jYQU+}63y2-G&?Fw`Ko9aMS^8qm8DXL?b;vxv3Jnx0hkQRhoF zKW&&lH?4A9|I^J07^c_AHi!$}-rk2&+Z=Z{Vi33*<>IFc~$A%5QLriyA+GS>I(QMAX^OYPqbdc06EkS}zrah_Qyn zHEzHI6_2g^dLWjiR_pW4;^)gzw!~{J9Z!^G9q*s0>*Ch77!c!MY432JCFxjm;_+Wg zluK<7%NxV?;19GG7QErWnZKPl$-1VaY@{OQ6lYsHOYAlc_E59W(3>4*X9sCO*CHX0 z693*YUl@NssK7$qly^}i*g&wr^{cI?h!YR~{dn@x9t~oTcGjsO_1)t)KEeM*Ocf+>48jCjkYjPv%Sn&g7D{B_?};2VjLF8*4xO;hH%A~pay*Mk;g~GW*Jg7G z6O*U}V;jJXlBO#;cqGSTZ-48ke91Vt@w{EhH!iYY%BLUkrf{)&G|KmjkeT7ab`lSp zqS;*{Hl%e3eotMK6AXj_Qeby{W?;j#&bq`*ve1-8Wm^G338=rnKa3qCwy4}G>a%k{ zj*0I5#kQ=|W0=x(`kCXrQS$n{NtTm2SR6cXYL;FP?N+P=$1pERtkWP+)$b-yg91;NE=K?Nz!PVD z04`MYd<6S`Y%Kowx?XC#%!#n!X3lB$x~~O1*UAzSAwn}D*uBEI6LaRGB35(<>3@nY z+YiW67Ji(eOV@T)#|VS~nF)OfjiRIJVXKd!h|vPmh2@ahP8N2DaTxwY(82Nl0;VTT zpb8$`<8J@tcmce8vw>1v%~a|w3M4E%yxMev6deP@EZD;{;UYF6)84@$^M)wm>}uI% zRSzHp$sU{0X*62*0p$5Qj!L)y0Xu+pRuH*6_Yt?UQLt6HUk1=|`mh9ApRI6N0KT~m^H{C2)oNq>dS!me5 zcBhz}%1_n~s~zXpn1{s2zoiN0#&kQH%$Le+Fflf!Ek2I=^5QBD03E`0he|m{$BT_% ziPu7cRV=P@?QFsp;S|1mZG-A>=*|~Q+xSi?qM>r0D~gEbo608*7y~2D&BCUj(!}og ze&Z&Pf-Br=YQY(LyTb?@*}sU7pDn4tI*p@=gQP6$7>_%?w5SK|m8=C80;y@B!O*Hs zbh7FZZrzpRd1yR~ci!zGl8)6}bR}mJk24PD2s)%&AJ+|)d`$pF-5@%*q28mK3j66Kel?M&a`T6;CKOLwL zV85ewiHq7El#Bn!|M5exnDiY*<|xI!0xljNh8-n8|4J_VpP88;fV%coR4VRS(r!3j zb9>UVBh}H-k=lvk{ZNl$EJ_6&92`2g#IT_{pU4Huz=%VxHteOR!kp(}&c)zkMZagm`Q)}B~HC*!lB|~xIHQ;6S z&Jzxn11eWA7%zEDR660|-s7t`Mfu~pToEhAvLIz)2OjS+Q+#eRDKl_Ey@%s`zhFJV=zDorxSjd+IdNj~zX^6S zbiL|-i3G^T#KM37Z6fq?y$XnHJtVC4A@6=oQokPnaA3BF6YTK`_`kaZ8NoEp>O64` zk4Tb`ZT!k`_#CC?XnqG_9*_9%Elf=Q_ZJPB_4uphR+-8+u-_tSoJzZ%e>5_Xo&Jh=Ze0WQ6ymuj@Ou7^Uly=Zq1PLMxjKGu>YzoI_1UJT6HK8ovmH9jC zD+K8N{)-0~G@#(=V#o6XoEWKiU4ZroQgGVefEFwZ!U!PPo0^6_Y^L2Ere3s_^`&XX8!nG{2 zsF?pALthx7P~RK1d<{?J{kSirSN0`NNHsEIYv%{j?9Q$o;WPpe>*ZAD+y%}aMn{TQ8+78;KW;oCv6y0}g58T#bZ?Csh%*8B4Ea#K@NIq$qZ@I5^@`Qi=-eW(FGu zXJ{W()+J`k#T*+SatNN#xw~Ib_rj{O8FETG{-{O&cddwF{)TLq#N~Mm@c8=yc_h<0MOTo#cw|b0ETvlaW<;|1M&TIiGi$+ZLFtjAdY3WSHTTzwffDKezO^Vy<(KR z??z@j)_pFy{7DsKb08BVB$Rb+23|?;z<@;RnK+L|4S!MVMw!0>;}7kkmQUnR$Ur_7 z*pE>N=BHWhT9%EKP)md@nsH#aVv0-=h~VBx(7=Gq+}vDFRrP&pjVzthF$%TK%#UW} zr@Fo0d3in{*J=rij!Lo2m`v8qmY8Hi5o?9yn5+P({8=(KHZ(Ogwcq=OtsSX2fzLA%6-5il9cS9 z4^Kt?xcX24l@4z~j2N~0dc;f-x!gWX33?rp{l?Q$brvK4?K7`N@#A!hhP=wu#*DRs zCV2(FS2L;1P-dlfJ07pp!O}rs4=hj%F^BW*5>HJjD=YtKXqchomXNT~$we}faTjqk zue}3XAHbJOF!vxNJw``EhHD+ z-7cj|xfCR?!+gF;!@rib8;KqHguzjJ2+}m9VFGL1&o}7e~pgom}>-hbV z{QLJv$-`lB4-?3_STFz?eWQA@{}Kp2&Ey;&(?FQ?Sc96#{zsVPzYmkW@YW7nv53-2 zSfK!Bd}9@m71(fk@w2y`r4?N!X%(X=$XUC{jbH)s=vmaF^jo87R*=P1hV{*Ile1{9 z3<|VbEy9HOtg)D=Y(u|1TLvJ6dl(m~(B~Hv$g8X8WfjN3D5zkIZak-K>vD5hLN$wb zPxgZFPiDU)T7Mg!Ds4HJmi_Vk%#-AO$`;a?Hq)>Uzhcx#-OTU# z3X1zaOM!^ezulK!U=MXn4#uNS8)1zrmA`2WIs=hP6e<5P%3cN6?Op|B1<>Yp(|3C_TK=@N_LEZ3FSdG_21Qxmk z?)cTEi?2rV`CAA+prPn>QhDEEKevDmtuFeoK+W__JUJ3{icD=6-KhW%yy~TYZ@jdF%c2}($kUW$5;5|r41?( z<)WTHrDUO{AQ6{^FNCNsC>k(vLF6aWUmj!*<|<`R{0dV0RsAGpKkG)OQ%uN&n|eVI z1?=N)e%@#z0twC)_BzvC%*Zv>Y24UyV+=oZ`nFa(N&5Q(ABO_j@?-k*q;TL0!#)Aw z{z-y(tLkI81SB|YXo-n0*;?pm874BJHDancj^oA2gxb+3uBx(fwLL$_)G7ljpnb92 zeoK4?V|Q8Nx8h=a&q;6u3zeI?f(SjC(^M>e?S55d>qZw(oHv(liQ_`va%e^C)odGD zvuQnTk=$2%v_d31y|VK0Nye<=njwmvln$j_55s_!fW>E%g$=*SjrUg8)L9=_^0ueu zLqP!k6jz6yT1?Y$n^B&N|9h1vF_3^mhahnC>q?8;g(W2E)ltV zb*GJ0?Nr&vemK~m$yO79?)vYh1_yo0%il)T7i(~HG>}?5!^7!#P&S{Lvbx{?B9?^Z z;^ytF8fm^^t3!>Fm;b_T79G7Q3v*z{720ToTNQqz=B6ErfygJ&?ocm~qkumg`^CT& zKVv|h)#JaB78>HMNPy-_jTW{9U&*k5{r@IzChm!w?KFVXHuOf9`;&h7-y?&gyZWTs zDVQi!zE$MaJ_HxhsKi(4zH`9Z_XaJS6`TXz`Z--i=Jh2*p%4+_?04Q7I)1vUY7r*9 z^A;BKP6DFo^=qH<0wdUH8dNM5GKIAv$EM@?I^$>K)eE=m&eNyh0g2X0u~1<*{Vc0w ztz1m~5fZH*G(~W`ilP1C@1x8;R&R%toD@I5aFP@a8tQ(FNwrl_G&+^vA%+4bF0-Zh z&uf%+j~}p1NnEffhI($?Hpt%KjSi6blUL2UVLC}jN_8DXeSs!?%B$N9qblFJYpg-L zDoBo#H-xn3J%LY~6 z>1^Q|Wwzt%e4AZ>{~|v1`pTLKt@dSdHTTx2!k>AOd-%@ z{6&wjK+WBkobo9IH}^17df>DHwj!D(K9IyX&g%WjI^uYQpxjqJI6epZxsDjxK^G%0_`7!+le)V)H4vG`YhNQ?-UvDp3_pX)N_~Fo$6+1)hBaz%@bDcG&Vp+U9JEzU8}07=@Yv`%-fSFecItG0RNQ?p`+q7h;WmFI00xP)^0h}P5|Ry8#`M-+&IRS$mr|m#zy+pd zTQHxb!{jlO+8c~n_P?G_;dtmOs1Ti9oB#58OKOR@hW$-*NDirbr-DM#rH2&N&cr~ZvgasPJ6&PnYZQBt%?F7L;h!5A6e0FP zaI}9aq=%#!AFO=yhHvh8AHG6qI3{~oz=&e(OLwjaIV77PHK$``#s?8WedY7Y0&(Qi zDu>K=1kIG+8M1(UdlwjjL*bS7!(Lz7*3v3)!&R%h93h&gBQ#D!F&WGbT6798GGaXk zJZiOrP93+NIACHK*=SB~99npKQO(^{cN$rkmH=GJ;)R8km597NW>Ru88FYX=BZhdo zz;6N188fv}Mvy(ctBe$shq|$`(b?Z0pi`pbF-~4@8ZoEw>olDVLmD1qKd7KqtStzM z#)RhJ(Q>2p6+X>T7J+Q${}`)QjRQzvz9M-o?l@c_Ck2le{w0r45O2wUvo?{`K-IrL zeAb#_C@pd5#hfWMBYfoHMKCuxHDm!&6cbsz{f=enl=b?gC&I#N%aegH3D@5ur=7Ho zOeAuP+2&=-6PdIzu5GL}UF+qY6m$9>5K4x^}sm71&Y_Tvn+$;};jrM@MlAFYc zwf}HaFXCMwLFBFT#WPdg)|tZ@6*7gokizi6FZser0q(lv#g$xduga%fr>q=KZ#Wt7Yf@R|C#mP3 z?s-{(^4ku=Mdse$4HOvDCQ}w@wq2NS6Kr$E`oGWYZsw?!^Yr;k_S;VW2uQ6C)JZu=0h-tIgetxhN6&suN z06XDEZJ0SEYBA-hBMjb+b1&Z_TKuMbv-V9xY^E7tW56bCB33D1Hn2Q=y ze7G<@rNX1Op^Et;oTz{uT*b=E@Q6dyrFp`{j~94R;mL7E93|mtU4~QHM{^|y6VyPV z&HE2Gfh4v-%T9q<^Ey#a==fW`eF`W0aP@63Zkw9wPdxyNA-bn<-|nJPQ?TlIHr@4b zT})_B=Cc-XQ@6i5=r{s}#M*5puzA*ywfPtIfS}#LZ=)5D*jD^zK4pVfagpY zk55hE!#S&}A6^V10DRLNq5Y5F(e5V+04*_b8HQqDhw?K*4>hV;)KxMaH^A0I5>7)U6bH(~gT zQcvspvc7%0Gp$*GZdza+;mfm|6m#^(s?tq zAQ<(ZDDOr6Rm5pS!4JkJ>@uzZIXohKrtFfmZ@9~rfz}l{Z?$z|j=hIe_Bw=`ml-}R z*C)7NMQ?K$DL_hX2wF&i(#THHtZez5rbJE~<~OjnFpfAs?*WjZ0Lu;o1H(iU7m2aM z)9xgSQu`8laqwn{ItJQ1QXvleO1ve-k%q$FF(jqH*GS4moGgyQUz^?`q>}fgT`xtj zI8w+8`{HAc`uCn&Q@xEPEd8eUqccjqv$ON-`LZt_py_%PXqll4Fcc@KSoFVHasJMG z6kSW3!pDokJ`k#k?$wfocBj3S!e~AAMSR9H_p;5=H&Eli0aLrH>Qx(V^BouS6FX5> z1<`a2SUXiN?)a|Oa3I4Kr`GebBCb;=_Ga~ag%@k)w9v=U6i12|6iyS{**v0<@()k` zVa)sr_8qrFl~Ue;WuCywrnJXGJ9ufZH_$5?cJKFZn?g)~(D9`I=xmI*wPTCkDhx&? zyx8vm5@2Hb8Fbj`{)C46r#t89cWTOoAp-|XEAG<|WX|!NEeVs(r>}ee0+699V{Ad| zGT=I48_8hSMKG?6@@Ws#Bg4nJW9Vn>)M9q|Wuu>_b!T>`;_ii;AVMv&KSb3&#ls74 zb@jqASt_{VvrQWAi>Ny}=WJv!kqVDSeT?5eHd*s98|}PNgQ#1^K1=L7%tosL0Mv=e zVucGyhRQfb52l&pPnSB2QH|{uV<(onUF_pF!d5GyaA`3!>DBccH z)`xwZ`+Cc#9*0IgY z%M*~7j|x;639~uHFD()9e0ZcxVksu-wFxhLMo$gvM&-qP#cG}vc+R3AfHfGiD(g;J z(hO|KW-_M5c>q9>&f6N&{~-;xfh&n-9YD;%i)Y}T!K{5GL)4w0Iy}H33Zb(oTTB9m zo^u9A3@>?Sp!wGN%6SprT)>=O#pQPBhKnn0dN#K_iYT&nU@TTuW{2%46qo;0Q>egLCX&)-QPwJT9H?2dQ=`c{b)h4Gl{@}G{$`+22Cf& z5`EqR@ha)^=aqk9ubqtvDt29Fu%8Kq!X{I)U-R>;vyxv zqN@q?vL9BGKRbvx({q=I872euOLX7?McA}kOl~|eD+($so9?6;gZ9DvHr11_g~AIG z0&Tkg5mA59aCbcuaC0Qp85dvZ8aR5RG;0P|Or}BzOSO~aG_5W^_5UBmSK zEWKY$FKj7*9YqWBW>->D`dVB23MVRh=ZO3fUGm8-QR|y628OX<|GLyboV+~+Ma8Iu z1e1_s;f1_AFu;V~n6xE56$2`oZwE_*f3|_{ej7Y;jsuVy?Jkj~*Agp4j;RX*7njv; zJ+$6ZQ|0UWF=1`2>P-DgpEm(&pSYYBm3b86)I)DInjZ^V+413#AqGft!3^Ukr1LAlfZ$`Z5extR2W0mf(+Yd-;P>#3S2QeCe#o-z zgnoN4nf!-XkCaKr2Z`{cU0EH{rp+F=k&)>ZY~ncc)+N-DB~5=Cr@X*h!`<~4xT7E0 z6SC;iq6!yl9pY6(_AmOEq(aA+>e@CFy6gvx(nd3i%l2{!`-|R}02kv3;E?{NrG0F% zpntPf{ZPG1}iAj1pPDh+aC7rzY}haeSemZo4X!RW+>V? z*8bCh(aS{wuCj53Iuh7QoJ9eGPd9gKt%?QJ=*!>F8t;j9mIoT(Jeb=|SwQ4L`FYIB z%KD+BKXn}&mrMm4Uw#zcDSMlO5)-)ZI0ShYP2TWwftH77*4c!`AJ%O039dLFs`i~7 zxD*!w6q>)YqtCr0-0aso78@;WFD`l=4mnYMH)~b;j8JmVn!tKTL1)UL%)U7Ym$KgyG!*=bLkThpM7*tykN2 zvSER7(*w}JZOnYRD^OJZ?saB4Gozx6-Q{h)y+>s+`~(Ab;vhm-XW*vLmB`hw4`X-E ztS>t|cF}lrB)psxBJvodUcGJA+QLVx5>Mo5a(AW9%(iV8F|+)o-&)KJ z>-J)SxPzLT5h&^d{R#eQ#0PuubsSZ7(x^GVT0tVQi-FgqJpk8DM|@Zzq}=!lSl zTK(pdh9k#&nHs{lz|6NJodhj6>6i`ODJ_9IZ+UPMWR!+!ifDFPvG~|d+5EhA0NF~1 z@V|vOIrmB+wljN>sU%|4rGG1~X2JgInGp)LSP(2Do#?Ewx+lPoUoTD zIm=SLssQJRIuG;CFu0*X*b!7A<)-{uC@LXO)OV=3jzQPq0X>@%C%_9`G+tzu>Y3*& zbR=szO#%tUu@V2pA7Tzeh+WejYPywXk?^6B&X|KqE z)d)bcjAXIEh1Sd4;Lz?E`oVHdMIk8B7YlC$eSsXyHxSd(=!Tp4cL*V(;E-czLD{N?rtF6`geIVkjwoLrZd3_23Hq>XJ{d)(FvO$FJ?scG=SmEOw9UEkA5S;R4LBbM$848~k@O{ zyQO5;aRmSvL8j>0KBW=|>)61(8SuV4_`Caq4p&SGoIBRU)RvHXqN+6-EEc~e^f*Gb zd%eI?n)(~Ni;!XLmP_4AFLLM0p@i3Wmxd89Cc965QSo*CK>ln^)d9crQ zQBB7j#i`}q{eC%^#iP8Fd4`Ex`UD0bmFHAr|3YHc`*s~QzSfRBMBfkg%S|+3)f5N} zc5}-j*PEN>fU@YRauMeF`*}a>H^RvzuvP=rkPatO`eK5mjtJEsAm49a0WJ0}+Y#jF zn|bjCvoCxPuOXK}ctT3n{&Sum+ymBE9<&TicA|8Sn44=|^v$`xZBu9mQCLMg+NGy2 zv<(iHO|`gKi|2{FYD>_-MP|eA?e#r;b2N0C7~;tyIt zSx|+AfBzA+x#dz2*njph(%(F}Pc|@1j)hL-rNTJQ*g_qXB%;&I9WRre`MBLmDY8WE z@dROq3{8nmM_T;Orm~JbcJ}hs?e{&LueBMYc|;v?G%@HM{o+`APNzj7CfVO}$7u-+ z9rNmOPOe?zSn2H(W|)l}35&U0Q+7xb%dHLUe966t7&3&Y+Fr$ZzD=DI5`0BpU>EOY z^|byqAozUrkC1mQ&(jB&W>4HyolPX>ya21hmE`%a;jq&Y$lIOy+Cnw3a-7wUG5tLpN)DdE zbK?s9Z$|FTePbStYPPjTW`VZW54JA;D0*omaBZq0Q)q@petaaH@$=8hvOz@3_V?q% zn+?3xK?B5x=eN~6Zr9%mK^LlbyCw^LArx9_C&fBRxcD}JPsT~1o4J~8N{WU1`@YUYEV16a`8cjnqYba1z@nKRzK*Lr z`U$PwCTph;q05;?gWTx)MMhO<K%(8SR^l92_vcxCh!D*B*B8!;?Q=^ zkESn7&&ZX`I$nQ)1|NkhMGRKEx?k^^v`v)4zEyJ#<$j+$5?u@oqK(Wut|V`Nt&$3tvaNWhLD*Ri#ihtb59}5 z+->YgRQt;>Z2Z2#Z-FeE3y@v{3h?nR8Ucn;Cxl)jBf z!89!+cgUtMXa9_pxzc3K*k_NsQyk=Or%-0{Zqgq-tybhjX)TQYJ=-p367qo&Lz(r1 zZ}qym4hU(uIfj0{{j*yiTkhMTxErm;Y|NJuI2Y<2qtD;V4SxbUpfB%R zC~4AN+v73D-cA+ojR`KNtFNE2Peey!_#ffO@Qaq;w9C5^D+~p*aP)wmx6~8&S>g2F z_uZIY*=#Ay1zvV;5yW~{hoPg^sUz1OXVIc-enkQkEv`oM1L@g|l!+-HaHJT_H+xRV z6?ep=u&Oqa)End8P)5GAX@`vgCvP}R33G9$omQD0` zAtP{4g}3Icl94gWh_lc<)vhTg&Q^xDQ2~Nm4mwORqg;7j71hLpR!MitXB}=+hx0ff z3MQSMrS`o|d8LJ!4kq-F4vEas5dOn2qEhT$xoJ)%+>o7JG8%OQm|o~DAAdsdnI zS!Fw0fL2u3uQu&5qAZZ`U_NQg5&M7V?C#TlwB37%h?*hG=}fWZ4;`KudS2Hf=$7k(p?hY?073HlkGgpY0GPPtYCc0o&%lGKo%!-W$6+>!m-q8*Ihbp$3E%M)bBBVfFVLGf)o^RMn`uixb}WiwzUsR6|4kJ=+7f3yKA3zhNh!q%q+!ByJb znW2S_fQlw|#l;V!YS6cGnU32G?Rd0WrKF^T18dke0HXq6K8|&?%A_z;wIX5?u-+-^ zlVvJ*EdsR3I6-Qz-29AB3)A#EP9i&Rd!Q~;YEc$ig4u1TAW{s_oBAYh@lpjI)2OGb zs~a&jrNP3+2DfC(EaX5)dzp_Lx&!OW{zdvT%xojIQ+8d{%`yS0v?#u|_Wga$&dNF} z;eis){L~s7P?B_b)t*QL3*GmAAmMKnMlBFtNA40M!p9ckV#H{kVzW3et`2Noa-Y{q z44#hy-oLpkDy#Fosa4(x4kz!NW{9Git8brzH3pw1p3o32QSmAdkzH z4G-J3+WoO+WL!vND%2p9&(*;h4rsc!S^hzE|Ff8m|9+!UC~wmDlHrP`NMLz#q8Te( zz-K|GV#CxSR&d72!+|aeIUK8&7B~xemqWqU9Y`Xa_I6XjMnv>Wbl&zd>lkQ$Hu!LA zY%YKL6flbeN+kW=AC5-zA@t4}dMyr)=l-7!4HmZLB}w=!={p)X)Fri1z-%cf)XE0%5ur>`tBL}tu8L}XEZkU{Sl^oo{UdWAI78;WMUP*O0X0$PQiEV)q6wA z!$Sn<3?=iqIK~zTcL3K$DYxc#Z$dya?H%qK@H@`me-{445x!%?q?q_qpTDGp zGM$V&Og7@PG%l#8TgK?ziC8Po}22I4*JFvpKEql$pVp0 zb9t|%LyEj!(K{q_|M>Xnv@M{?i=zQ^osKP5F&$d5$+ zZ+ya_eK{#12~JE*T(mZxEscW$63aUWb}doy1zIiR=rw`g;kF4Nqei&W7D|D~Jw5L& z-+xQ8{};z)9~G=%%z0OfEDjEqhhmg?G!ryPreqd9SAlF6?f9w1kiY7Z)n1_(H_0)$ zo3~>84%<>9lgdfa^jJ4#Py1$Bws_=}9a+K@4j7~_L(-}hD*4CDrpZ@~4t|$ivtD%L%71d-w z;DF!NYa?(mmtXdkP6{k^@s9peZ~~mED&=PzE}(ken>p(J&0dh+a}-aaZ-1Tv`1rj) zEZ!NFZfhzM!$R0zD;DWf1}DiA^76ruv~5Rs{r4zhdxfumw0|WhJPTW10XBthvDPiC3NFb23ThDSt z0i#H)>5_rCyFw1RTy~WVVNK*tvo%+tWLj%v#0hkN`J(~&@($wH|%N%JRF5dpD6fSt;V z1Ovc(_WyUQqUdUc%C@SSIXvY*m4mJ{T9Y9m%yy`PNY0H`X=UTdX`O(XyITvG240Nb ztCw%SId{xf8{x%mgl4wWZO!?CT%jOhHpHVG6WS9U49p_xHOi&ZE<8yTZalpFvNq|3 zF40j}GC(G=qu&_cUYtdSpo^RQ6RlgeUlD)KqCU{Nx4&FZLj#xGku$WfN66m39Kt*} znZe^v{}AAW#uL$+k23Cc$Z*Wx$e>jY<0r3yQwZUL_MuqkcHS6ACmWGZN5MN0Z0(cP zPwDH)R)|l51vz#7haCQ2gwlU;)#c6OSAqL1KdY~}0=K+4vGRfjB~KD~XZ^2-+-iib z=(#yWL+P;1u0>&O-wa0##+%(54<{M3wM8NJ-wP~}XczKwauEIf{c|lMTAwz^z)dr^ zmt8f!dt1mxzZ46rZY6z-x4ODY&cl-mk0F7jVgg(W*8^?9t@FUqS>ks{e0Z<8fAG_{ zPzv}C3Tu&2&pH33sJ+&6}2bFEDs zICEP73)OlsFtWzct#SB(2{p>xB|;qNmm`N+QRM=g`fU~f8cj_^si~>t+VRR4QG@Qs zfaW?r_Um`cZ|)7!i`E7o>Pw$lAW-Pn+rr}+fq>FEyvC!eXA879_P1AWb35)jexqhFVA zs3Ngv{bSlS^$I3mTnA*_^|i{#fM9t@9Q`i%7>IXa89PCY>ik_}pDHd^Bj`|i%b zT8#<{76-p=n*EFBCLoB90x~+<-dY{s02Cg>XI8=V$FE5UTsR*ClGi){pc#1lPfGx( zvi=9d4HD)3ue11$JppAaGevm=toYsRdLETu|*%;aY4~o z6eYaWkuW?8ipVdqe&^?qAMHO{OO|D*5tzrX;sexOv@6QPl<*hk6UzJUSc&)GG(L->5n zG)2|l2BnRi${s@#dXLmrCMny+$hvcdk|%@PSJ5MOzWlglWVWPbtBV(p(V4Was*m7@ z#vBK7?>JbQ(2Rdh-8U>#D|Ok^85zkn);5xQTpc1VbG7ND|7jF-ActTw{oS|qL+0x* z(ZHw(4SdlE;v#YIVJ|KBh1YFdNc^IRO7oY^|4L+@CYFPH_rZXOgX<5q`SIRVgRw0z zN(*Qd9RJZM{OwHA;-U}}UWl9#Ud|GsU>?izz_k5ZO*Ac;yuY-|84)H+NL75WObMBR zSycw39_|$~j;rwSZnlY>tGgn<0*J}uA2eCiUw$$aFR=$Ipx#@ zt?MYnf32CsPw^vdOVKqJC*>- z`LsYapWlEF{t2iwOTV=Hav}q}?eX6+@#&bXbQW;}BfhU$W>biirWF4EUPQ?3E=%)S z2CX=zy^`)q0E|6^D|~j3jSY{yR8NBrr%zl+KeTMz*cs_y^MXn0=LEIF0|+fJ*z)6o z@gK6Sy3;w!-Vt@|_p4!_z(y9z%~={EtcN{Jxju zEr+fJ$n=2!wmXT-%k#NvKTDfs9zdk{`1n6f!&?(XL|FpYWnWYNdX4}Buk&k2vu6QS z4maL2#Hb#H)e0r=YvzFTbze+qz$d!tW55X-1EQPx!xSxu@n3C^F*HAp)Ae%>5=Z+N zj0{d-VtIl3-q{0==&o?z|0Ww+r#Ni9*l>VX(iihpJj$|PXr8fsv)q6emIc-7%ZJN& z0K=-#2R!BVEj-+0xxHK$)r@YI&|aP!Ylc~+EeR&qVXexpt;;3?Sh7U6UnpA0G56CW zhI@a+X>85JCJZF1Keuf7Iwd}*6I|k<8EjMIzAJVr0UUDf|M`#u2jHj|wM6H;2Bci0 zD6(7;FyR48wtc5EWE}cTPXBSm_q7AYj{2bRz8zsnNfgmA{3kJ8S;ByhYPrGn|JMNk zF-k^+F4JJ6EOb_BQDjjvjLrfU0mxz|xn^9p46SE2{T^m$4OpeXd z3J|%}F>Q#l_z07S_9xbh6P@QV8@uS32xCdt8kNq0BM)>?{6S25wSQWH;(GV)XMBam zhc+pHHD&mazw15tK+oNUx(Yn;lv_|BWM=TV`9-;+D!UQv4WvI{gjV<~ffUS%v_0#4 zR#(i2xAzD(=vKDL<9aC{Q~!dFe_+sGa@ zEstJSrRv}j@^RoN4!XtGs2@!Bv%%arqmbRrRVdMW-jH*tL_CgigN@Dj^Ms|ImzEOA z^r^rui|G|bMHV|>Q;3Eb7>IO3gPrM7@C(l?bBP!j<|0nc?827-egFnkhQEy$_X5-* zmmRIYTHfKR_*xX?+&o(t3mdqgRee#}jPkv)wVDi(#)uPGikBL-Y*K2vQXD2l+I6Lx zaGd$}K)UBx`u+%rT;(6T+baa%-Ud7{$6%GXA4q}0LnP!(^8v(dhT9E1q!Bd~7sAx!u zjDD7r3teI{2N~Q(XT4ju(SW#JR9U+d{_@kXwiu3(y90k=GVi~$$gvEUo#1)X9z5^O=IB{HyUI>Sf@Z!|7@zHd5@legR8^nx%*7%4 z^ywVVqDZoLy(zw7EJ&Rfm-cv0!|5w9Rc9L2J+@CK}PxFA0 zQn&&HnCPUcFv%KZQA@Hc7Cf_^4vO^~sR;DliTfBo#>m0(L|r}c4M3A3`jTZSPRm0! zox1CWKi}s=4C>@R!hBL{40QN#A~0oUBAcb2d~S-Y=QQo>nNk z)f-~;6kl^RH}GxS%nhK&>xL!M#hrD;qtkbrPnQ)`BI6VwWv?sX$b#F3D8y(r2{aha zmkPLkuzommWBh#L9tT%!kuM|vr+x4oxTS|=y`+}Gf32d2M!-xYTok}ooknG9uP5rA z=zEP(d1>CHSC1ZPmyxk6654jY2xJScbXFA6XqZr=>W(4jKFO+z(dG2hH|IhDlU+GJ ztMdU6WgYF($KPa$p4?-&0HpqAU6>GRY|nYe)Wf-dMlz$g(dp$y;57mjA~sq zQ?{jy<1g=c@u1d0R@OCo+5*1gx0OWLP?i@S{|GMjK>(J#&DyzZrU6*{!@CN`Yqw`y zfAaiJ6IZryazE?{ z8gVMuy0hYuBpe!+;K(Z+TZ~6x`b*qOeOCD(TVJuAW)<@S0I_*8FtjyfCq?9=%fy~z}1K3_|PW@AnM+p1{u-C6~D#;jkn(?4O2< zJ34XcTB2V}E+YHA_Nkz*p0 z@B45bz@Li>wkvaMgy;t&7)TZ21yS>~2eR0g&one6Zv{`s8SRX>fF%WtL+iaau2@S0 z2TDETg2>&5b%n7(>KejH^&xWw)kKT0vdu2$*sg7~E3DG0ZToxGw77M`JPyuJjXmls z`e^H8_`-+V7dL<@gQ-B?{Li@v-)dqAP2gy-FcFPUbo1Sn4$qmG_^o0l^W*>GggKYZ>8mU)%&igCI8eMn?6F}#lMbQqZ z{MM6BjS=A*N;V}!C&`N`xU8LYbM}|}{WSk+cLhKJJe+Pq*hzeUVo{cln6xg@3GTUi zK~b0d!onW_e>S05pu>%x5VYv($L6C5a^@EujfX1&R*Be3XC8p56Lv?bg2y_ivl*mw z=>SAImkZ&a#?CXp`^8lhuFQEVJVLELM`JGJTSuTOt+0|Ys%*?%Is~Qbpd1=&VjLRl zvi~|7tn0O%5-m2la43~i>24_h!hUfi@Ksu@^DkY#{Jg_wiy`x>U>P5QfEtXI!vPEV zX+0;ihwrTwSiD$eWHQeLz3AhCK0{hZQ(bnOm2@}(aR1HzJ11RxpY}hN4lm#wF>y>XYD4g*xxcPipv3=T{Fjl3QFyeDMoEB(juSyc6LA za(f{z;VSE)B7YljGCfyv^xR9&-tXynLJa{1$2OY<_Y5+T2~GW&QC$ z9cX;ua-+QQTc>OR2yQ-uDr$Jy1D*$QojIX?>)5*KVAP?%Tk0b4?Qteni>$fp;Ssn> z8Kz#Y(Scb1gud&6H?Ih}I65i6y(3C}6{dnv+xa^A%mF-$tyN()(0F|T+S{pb9)Ac| zWTH#)eejs{!9yf|QZoc3umqO#G#?xb9y1Nr*Zd@~ova-_f3<$*dukw?7CG-BK*K#Mlb55* z{t_ClT$bk$)IhL1Lr-#d8U8iR;D#TQ=U3?ph8{=Pme_zOm&8ufCOy>4Iv5)hh1wXx4 zfS9V=NX|Cek4n^KU8B^w=*n8Vy}vH{rnr^bppC^3^gSLf3jMv(h(fI{3mY|QoD5(s zlH0ohRqvIL+Z=K+EpGjEljY>GvA2s2pI6$i;B+_x&3e*0ceSNML#!_S-3eZ$KcA>4 zKo#pGR2$uUmE_xHlu;UXbaH#9t&^fWpIV&8HeQ!YxOPn%d^>n5vyuZQ%#I!^NnF{7 zn#H#b?|_><)fm;(U#)xAaNBOv5hH;G%s-JJfiY1vFakp!z!kM9!G&oZHi^-?Zma4F zbbdWQc{mlBdwyEQdG^GYZPkq9-gcVVk7g5m>e=%)l)XJvJbSY9(!lj%zNEHxwr~1w z=V=FazSl}VgMF9!@V66^<^{5g)#u^5R+zxOr;P3jBIy*N({!7*w~Nf?&p6Kd~`cGj59 z(_%yhRvw1EurY#%?(iH5{5^%J9TB)Ez$ynueB6T%f7U5g$qA-VV4s)Qz07MGdefEw zwfK=UUiBk~3tef&rP=%163Jd! z{K+Llm3O2$nl^XXCuBd+pS@D^q+?vCN`p<-ug9$A*5c{PI58i`&nsdtmL!vshveKM zO8<3|Pv-|Bl2+DqF0? zCID>*1*`(0!-mga8cQ_9^t^!&ciA1SF#3UX-?qIcyAM1M5MZLMCJSaWvHF+mqXmy1 zoDt`DCAVNR($?s|Wg_vihUmBTFEkG# z$!A{&enBX+52)Kc9;-S{T2W5FJrS|UjzlfsZ|eQ=eMPP zEfrbp<%VhFALrk-r-5L7y;#v7TQL?ORlzulfB5;%qlPdg#BfTL+p~iE;Cj8KL6=o( z)bnyxyL{qcUVX=Lc#7F|3!F-FtXsss%+9ypWWeZc^7PZbp+xED-ys>$IAcH&CEWMR zFn|z(c$X)oE4=3qb8E6DUhnS$#`!UvZTIxBlNfU}9D7RNKnIUag}e^Sq!ivtO%`c4 zpfAv_I+Am@J#*}=7lPoI`@JFjdqepJAA8_Hi7n!T+&`-`%GTULYz1x?#wOXaYxoSZ zwJPbZ!`*hYD-K7C;;JE)7R`($O}pn(>xFEi$zE%pRXaHp7nmepk0c$I4}76hXeYrZ z=;`W!;s#4si7M(Gb~Wuxq=tpC#jWh{y$C<>`OfM(9rhW~ZQjO%EVh-iqp~q<9~)Bu z60G*~6TcSlg^T2_*IrPE4Nlj=h?GI61@^s3Z@(W|xVg5+2LvvGmohdNc}EE8X7dZd zGu0=N>xV8H3^$>p2KF2A8>i(ExA_ih4>jvXi!`?BWSy&qyCsA~eAGMlJe%IvBg=Ez z6~@R-!F7C0CPf4Z6=7;dHCFDcD+7G4B|O}##0wi=AP}s-QWWU}A3r2gZmP%5;`JgB zK?r_yM8^2{eHBRg^B)#fN!zmxs>E*VWOW-0pJp1EE)}+%j9+<}BUvUDcfG3_G4${d zR4LZ*-^X?^#)Rr4avIK(aiggVzC!<OrbwXK9aP4oNL3y-!g;P{2Q}+@@3Pr(#Q~x?b{;Pg+eW7x>b=YULan39xNirz z&PvNuHhq;PJSt1atWPc)NHkw+WfXeN1uCGTqN%f{CU`?s)cO`bC{6WkkBS<0| zVyYxULaI)j)Y!O@eOs)wj0_ofTZ)k%?28Y&x(gCmC>|r=(cke{Jn-WHd{`3-q&yvx z+b25~&2Ie8dnHx0Vd1OGnFE>(by2ombpzJAk^c{S?->^5maKuA5CjzwP{~O^G7=<% zh#;{W=q4wXoROT7BubPlp&Lb-maIg{0xCI&CL@w_ZZh1(mVM^TxpQXR_nGtOKJ&we zKX&)`t+lG^t+(E)l_JP{pzvc#p}WX-zEjisYdT@!S0*o=K(rf-&Z2JKuVQ=d9iCGP zQRe98HwHGA*w$M|DOxh^oE~Vy9_!cJPCS?Vws(A2NhJU0@f|%#-7r#k1m;YSbZR}B zThmFO9EdRBGPS*Bd+gFZT5k6BgU+(VoifFd+`~vstFe{g_zNNUNH3 zAfDj4C(Mdcm1{EI=wOVG_7wO0!PB*;aE*q^r&mp*aSLO>wX(a%h7z52CX)+brV+o( zEFlwsjyA1FoIXYhUSaiwo96hOf4c!gH!3*;@+2;1KSs+UcU0*p2bvVehN05>^b=zv zdS_@GUd|=n)JedFd~F~ukxj2A@JxR&xZsy_2Ve0+RmyvfccgjW%tgXwF72R2=$(-h zMzSDzB%ZM0?TScKVHt!$R9f)woHNrHG=rOdK_k5B!>+AmFZ+c1V`sUm?HE7f6$qcZ zxB$H+S|J~9EkCd+z^f6v+mwH-ygk4IsQtH}FaK%onwMxrzXdzY3QL`sdl?}r==}PL zxwFDu2aBzfD8)TBkLKF)*?X@cMGq*`of}XOq`a}Ij12swMpI2{Jom(Jz`-Yjxu)=- zYo92;pWwW^Y@wHaeg8Fyvj&0awP&!Jxq1GxulJP#QDgHePv+J+-miPa2Q?2mMR{aI zMrX>XHYHW}d-WPeuW#uo*w56(wkh~wrIVW0ADPINc`n?%U1b(myFb*Y>MFERPJDb6 zy)d|au!kXRDjtb^==2K(LyN|Ings|O#YEzbI<|{&?Lsfs!Y<&Bvpkg~IQNX`V>?k+ zZ)VTJ)(@?pi;LNCc?xM6{Q4{JeL8PXqYn8(2ek7rw>6StGrCfTKUdz-Ayj^L^!b`t z^_lU;jSD=Uzs&bJ8aQiFCEb)d8SvKg8}Dn4>uG-g&YqBrHCEXbjK+wK@Xli|x>(zN zcfD2TJd@pcS>nMe89x~nMSNqU92o^~^*eP=Tv8<5Jr#f}<_rG|xXP>T-ZhPxL_m|T z-uIlZ!P)(iQ}F0M%Nvx_(HwIs64+MIgC>aP<8R*vh$9C!+PVwy2=ldKF1 z14{AT9%CGxI~ToDsOmeh0JV|@pkLx};C+<_=EfN{umsk!ywr61^!&$zrO@qyir)i9 z2wP9d-+Z*H@2Z^*pRB>9i4oe+0o`MB$6xmD)umLtrSG0fSIp71mN&f_aSiE6R{mgo zr&>PeHaT{ zUkr=%+{9tv*Bi?0>R}NrvYqV|G|H4b9QA2$@NbT*8A_||fuW}~6^zC{m(%;~wkG6G zftwHwB3PUd;IP^OoWpJ=Ny`b+lV_1FHWGNyfmSizQ_S%hVCTsw03uG3mZ;+xl*9v8 zFu`W1q&ZuwYk9&Y*7%crAbQis>hR6@^jxB-p@I_rw^VRLA{foY+R#7yA*LDiwiecz zypp{-S)X02LNB@-!%kI!$v}k?ac7jga5}Eiw-3jr%jHwPqx5}mR~CeJ`sBcNg07&iem5@sqz6Ih zX5%6jtoz6?ufyr-RsajaImb*x0YVeYE>vre!Ie$4cfqMMh*W#re5MUyKl?*+w?~Xo z=<{m@pT0Na9mKaH(<^3c8MRa_nsz4f$pjPzNkiNUXn1R31BD@y#>}M1&8eXmtCKq4 z52(06(X!NV^4IzCC8qn4wVLL@9%rwbCs3BjOy#sZz3s56;TRgyDDSN+x@<&Qmqd%kfe>G#}L!9eplheWD$q8#LN=0oQR8>E6{CfSCX=Gw`5DYefLn_McVk;tPrG`SR~eSRw-!$xAga5MuvN_kHUuG+`Y-c zJom`KB^GmXSt0|VnHdRLDmdBZgBOQ30q7^~*CtLGjjvL`6HEWq5z8f}{F;h4z2Yjxg^RL}TV17)&#+OUNfG*0no%kYf*Cz<&iJ&) zad{MM@&5Qw;{uFfECQqoa@T5MqLe{JH^HN|UY_v#g^9i@fJf6uieq1ZN4xSD9}Vm! zu=0WG^-8!FkSe|*yfVT6sy8Ka+mdK|#a zAeeyN+0mpGjup-n(Hb|`G_j|j_&lGPHMzHt7r*U!7;7>o4(nDME&YY9F4-#s;s2{F)KvRA0?|_X-2~7ZcaT=L$%ID}_2lS4d#BM(x6c5_y)6_*% zV>vEI6Rg3i0D|c7L9%GRWjs3vM7KfnKA!hjpQb4}){& zmA-j)vYTtX_KQrCQP3V|p@Dm<)?^rkJLNU^?|zO!;Dn!Kp3p?V({u&Q(fm4%+>{{9 zyA{0;5Nz;R#uW~gxa2J+Q$=!(LSsSj@EmEe%N%|kg27DQ z%_5i4zTP-R5XE(?u@Mg<1e<0_>7IwUTgBy5T#5hKEf3Y+l8Y}W$Omy&boc$gefKLs zL55@RzAlYAJgfIDxP;>1!N;*u2eeShZG$2G7~HFq-6@hLg4fQKMy6XOXEv8+&F8z7 zk$vYYhP~6Y34xRnG4PS?X23aRJ6|fHRPSnbaq5mjj6dkoip{l(H$#NISw&fJiY2ez zcO}1I{Pff<4xey#Dd#Z^z~AtIX!KXTVv#n7ZkLUXcz-)3GWPubwp>nU%yC5o3Y=OZ zh|PH$sdvB*tf zuZ-0+t`T5h%@m}_pN2xAVjz1pRKG=hn!S31;JC)SmGdY7eaGf2%YYig|Ko?Z9JJu zx6dGf+p#7!L5eeBjmZnyi$;Oy_m{sVb;DiPnbbxJNyZ!ZNqBxm!RPl4z){|-jhPR* zhD_ZA9NJ&PKo$Y$rY_a;E?ALvbV7oZs+KNyS9HVHcI*^)7i>?WHHU28hq6r%7VlmM zH{i+D*|E5|pX!!p<;j@Smqwb*6igqDO7D!1vwhbR!>g9`74F!DuT+*`@^MO$;ln2A zu}+<1x6KsI7*4}zjmr&bgSd5vO?beoKcrd$Xi!@bwhWJ4*EtMBZ~ih&JA3dpkZ_&E zWq|1NU;Whsgbz(5_qt<4qX}0$p_4cX2trh~GT&(Q!rg?~6+%Mt;Wu~pq;TA3mG9)F zN#qP5#|N_J*9&>W=K9)AjBX#+Ys$%(bTQ7X>-k0LxkI+6eM|_ZP!*;33>uOc7h9Uy zZP98-ndT?_%(2OZwb4~@yLm9xiY$r{Lo2%b8s!*DG|ochW_05e3{4OL>YV!BW_1Jz z#kc-+-yhovvwAI75A49bjnk#$CrL}|d*p-!S5LJW4F5q}X6FbSB`6CQa&2!C4>YI3L1Cx9l3#wI)J0DIUR z|5lqCi3mMNBjmopHeDph6&twwBXOT_a- zkL9+ux@-E!4_()Vz4Wh8k2hvH-qrktKflNUpCD}Rm{AHAM;;7G`fE@XlxofsjKJ-> zu&T7eYDO9PMn>r1p3rM*y}{7*uIQtS>N$7m$HtO)^UnQ*;Y*Aqp)J=#Irw2Yjc|R| zxbt#y=!9;kC2gJC_oZhxITmh9uY?f2NyS%kuQE$xs%%qtVojWf2swl`DWUq-omiy; zYvF}4h%iK)SS?JON9bS!__rg58OeVSFhIKPc=aI8)U2YQ)85CH`ZV0a|3g>-v53Mmdb)DE_!$`j^ znZ1Fvd!`2UVlg?d+1ev>{qRxC`UXFYY)X&^b8f3!E)52 z10N@pzlcN>?nPG#&@@2Z^+txV9q*E@#NI?Bc-_qT%BSKt(c)gb>^GCv{WjQmY*-`X zW$Hs6)0(@<23S5!lc>9NX)ToAm+iuby3?kU#|$j6xsElc6z9V}3p8VjSnq+3F}E>U zNKL+TdTKO2q&P7eOEgNnb<;619~4Pg6lSkMamUSHM%Q(mVuZUO@CysQxoOMVoWzBQ znS1|IVMB&*&p?1GDu{YXe|^7;w|N~`g3oFA?eRA5#(ILtjJtk`jhdwQ(Wi;^&2ELI z71c^kQKLz8b(JB+W~jJ-VF@b)=BwfV)qJ7n5|mZgyoh;(E0GmiW{}x;jxJL@E76PL zHF7?EBn}mNQ0QUv(7Aou=(zSJrEW{}a1@gS$>VVB-G(qeW9d?s_kkvMD{HwD+7gv* zH#d|r`XZ>RFHX!b|>-htAr65-jB*vBL|}?##lt*V00Du zx2)#bRT+E&!5Qz22$0JJ@ce|;RbZ@~<99J-Dk16i$GT2m+5JsfWfS6ak?5*WExIqV z5c+6FhNi-ctFs3$hs&~PJxt1J76;e1%DHZm+pm=+CYPksrIhF04!RLh`SpJFVft>F z3Lt|MOf`&`H0yxTH_Y}2M7}QUifWQIp?N7c-sQ;3Hm4xq#U*(4HoC1z5zLV9%A6+& zRvs^XYB?ax#y@bhsJ~xyXep8dOir6u#B&3%W>v}Dr|jnAp!JU?p&5x3v6=liO1Q7S?U=#@Um)zz?Y*;{X4i61C+-``nk*JQbw!y1e)Uu|UcL4AA@ zyFb|B5G%jEZ6tR5tDH-LG5Of4p0xhXV`kElP~GSWU4?#pi-@h1miKanN~xog99Cm~ zy*WkNHNPdi1YO&`hPNhu0g`;O`@9q3HUPPdhzg!&3irW<@t~AaH=srW_Jdg?rIPQP z5|B?DGmiv4g-K1{yb+e&^BTp-AkIGzX!8;FCm1|d(K-E+7j7Lx+$;R8PBr4LKP{1~ zSoifTfeT%VcN#Ac&a_sRW$ZYP9aV_B-r-W<&yvEirP`{0sikT?VkFh3Kk&LfJ5%A^ zl%TmmO1TD&>Ncib<$T&sSQyO7ZGAd(H^+p5n`|J1PuLu=X;ERLi<3b;=34< zVCcJ#Bz|`XVYDpL*Q1-1nJzKa*Np0>H)G}w5o*bs%lfGR7&ka6OZW%HO}E?r&l>R_ z0a7w7P;d>zmf#c?u?MFSF%m3}oY6N=CEb#ITHXy4vTft1QJezXRi@cscOX}c10&jqGDWmzifh^b3ivv;%MBArDCY%(8sy^$p+QF?A<1; zQ?Ax}u8sHjtnbK3^ZdZ}5)vQO5lNBs*FoK#2887uO_L&E2iYb_x6}M)_$0q+mYAD8 z$#3L*zUO!NSOhR9vG1Re+Abc9CQZ3JozOoSnV9+~On97fbI>#pAf@Pm z0j-Rfdx^Lr^*+n#?SxyB@36$8=d=Hw-c8p2w*7fpPNESYFZpl|vD3YvwQ~g4^2jv$ zh096Bv1?VxSu6;6|Gl@v;$J&hq3+p)ytS2DwVaxRZFo@Mw`oyPL?JB_?%DY&dYD`S zBS3gPNJua0E~#rRlgp7RC&;svZT-4Xq=>Av*%iNL5&D*wCzbTo;`yj_c8yq}DFe@b?!%VseJw3}12t#@z?2~3(Mda7QsAx`@24}qgp;?Ai8)?fv&W28liZS!l z2Q|cEI%jljoS$ytWcrV?xW%5`s>=4|B@e71fkyzE-N;RF8gz+Kx;-X2g_voVW?eFV zkg|)}RCOnek!a~u>)r!Bub5>qB@@=p>lShmj8_hiW3-%?V{?pWOj@EG@(wmfv4!5V ziz>T_X7vm8)jrLko~9nC!_iOVTwVtO6^p~%gbwNL8eUJT**U2z^SeLo&2LfH!XD!M z2}VA);}e1EW@6M3mInW?wP5CUT+(hPz@T!BP?DIhrF1UgT_ODo%b5cS6tu+R>>CANpk(CX|L$Tv8@Rgl5 zkVxA%!4P--WB+&g(dzE_;jKbmqE;km^7Fv#Gtgx*u+R%yS%fU5~|l;WDBHrzi3R?I@i%f zafwxE3U1F6ivXElFvPdT2>bp$faOFN)`L&XlJh5zHz=w<-E6> zsr1nib|80N$<+2vQ#mr9=QG-*YU60pbUVr5c5tT1+&)@q(Bhj4X0I1pUY^M#;gj}| zRFAY65K;7hCil<1m|g;!ymN62(BzfLyoRS~3ik<<@q+!fz{L|lGvQShyyeEiKW&`* z8S5Hvf<1&2K-Fcsg2>CX*5tNauc1G2pb zRi2L28Hzt3y0=xSNhx(BDR^HsB35^>ws4{ru`4EQn-TlLOWT8d3 zrixKT|7+4|p#yjZ-3d$3br7`{tlEsVsOf4_O81O@(jAo?6LF55;U^NG8^#FL2wOGDZJ2jHlHRWLh>9F-MV!q0PXvZ>Dn*G;|q)LkNp^L zw8incOA3Ps#RvM1YXJv8cRSa8Z1?*@hl}2OG?uxDTgE0!jIbg+Vra)kOK$t@7zAw! zJoj75B&eS%x(T_kMB%J9sVC4{xWZ?EnVjI#we(hDJfI%(e&4(EMQmd|LnIX+);v~H z59Brhcz-(cx9!-?YJO0jA!^k>DbF+u@xD0S{qtb=pENwMH@pu>a^XJoLTv(9a|Gp4 z@F)7jeDr7is=~dSDAhN@eH;m%T)nl?t!D8tX@s33`dHtf5scC|^pC^)`uNfr>27!I zzuu4)n9c@}Z^%@cv1#*N^Avy5yN^A~1w&KjuS8fM2F3>WIN&>?)yJF_6?)5B+FJqT zt#UQVc&W4Mj>oR>7Y z{WRabRT#+VH;T&#WbQ)FPMX31$BLoW{i{$w`FG3tO%xLYU4Ub4!{@W7r2xjW`(F6t zbCccM+4bR#6r71xE~`g0EzRf^QB^+HH`mLivto7?d^SSF(^pkT*}Y0kr1kZ8Kd(6( z-&vaEHxQ#OZ@unPc33+Vz5bJ9oX2&g(gPyyg7LJ|_aRXb+Kr#dGpFIQ)peN3_MF2d zXok`}3kA{izw)9*-g`hI_|hcrgo>R?COZv}FMPq{avRZ=-lY}wGPt4Ww7yTR6#gks z4BBEF&qm{#GS9GNJ<}7oe%LB8CZ0}oUDMk8k;BC1OT|207B= zqN+2ZtLNJIs{0*0s6M(qtA;_;Etc~l!LRToXnqddAp&$uGC10G~ z)e=+a2i`+>?6yW;oYVX9?UoYHjn~5k4lJ`1K4MPV$U<@5i!1Fm66|AxW&OR|vmXwt zZXl0%9S-A2pO9t*ZR@em|iU3djI(dazV6s#&N7v>u$Y% zmIs>>&i-5AsL)YDjbFWjK=QkKIhgloK&35S!TJeAr)ytLP!fLM*Q67>Za0% zKQS|xNT|lh@W%MXZHuwj6PqNIu?cWCrn4Z9UrvTFGOz{`Ry!TB`URTk3I2R->1ut4 zE${)T9TdeKcH=8c$0G5yr&x5Ga^b8O4>e(goh+qLkWAWJ&6R>A7A8O#ei~NI89R<3 z-=dtEW1b$e?lv{2&MUZYJX%SKkMNmkXo4I%9^}qsM-}L#cCC!@FpLdQa|Uhqp_Q6r z7aoA#-ExyD0vDRfr_sT%_{yOCfz#p{~M0l8(%};8mzix#ahiJ;j^Bd;Nu!?%!7&5zTwP?uw_Y zU=qmeg@$!p%FV<0AAu~*Ut%^^p7FzGAzUx&8%{yM^H%~evPj$II}Hp{noH){{W0}9 zSxtr*zLq+hx)xb^90n055Mfy%-$(GLb453OD|a&_Zkr-w*iwF=Xy6+W_>d;KzzjRN za?p$INfPozjwff4WY{*hzzrX=%5V=LwomWU-cNwwCw!H5^wb@v1w8jYzN8N{PNwkq z)cr6v4Mz?s7g4e~O@yV-u~l4pL2B1RwX-r%Zf3V^I>bX7+LM9)VDD#m@WE1vN%&xI zVl0l^F|P*B%1UA$&>|1{^jM0Ffn4oGjrbc3b-^9cxs7V=9427H``pzZuNC`~<~eS$ z>q)bDLf&{@d?D~)_lUx1v+a16{IQ{DETuPg#Tn7O?kmhN&ZbLhWmQNi3sHB)SHH~r z6YPq=z07r;uH2M|3pB|S*6ywLx0+W9e9k!8(xlIdVGq`CA)Z?gVKaRCiy{~e?^$@% zz+E#h9-r&jaAFYSkZo;%mWer1>~i1OHK`y4_&yD)s{G<9s!re^#{g1AhA!Rb0nEP@olm#B|U!ZyZT z22s!GbJs#7$lb$@YROJXM)FJjD+=u97z5{KlS`!%uIq)mW|Q}HVRPljqx{OG$mzU2|6B(xalB#jiFalylv`3wQ=k=+ zg5rugemCg2*XXi`UaV=#SS7(+$jR>6#qC6P-zpwqnP9gavYekLEGph2EGJEYyJ}~W zFFea&a*BP&8Y1&j`|=Ua+d~OZ!*p3;YsgJVW=ZC|HO?&16;mW*KlmAJMz%#mK*l18 z)pT8SJ4I(B+)4G7oP=2!2_jg@4Yn@Fc5f>53kgzSrp2SF79Yw`v-R#7`e}5P=~Q|f zAsR`z%!`>#w=OmUq!wdy{3rvkixYkKAE~V`A92TuSWO5%v|eeWC%B?wf~DJj&sB2( zYgfc#dpP~hnLk~hYE~nyxs5!wd>d{&3fI%FI-GTTzy3XhnQ?57bL(ya`>2Eqd&nQk zUso(E%ZutxdXee*byJy-`J`{HeD?M^@=Biu>Q=h(2|BeR3f56HlwP|c9x2O2NP6-= zu`BSIy0`zg!qg(TP!YSEB79A4Ld2}|rp^wEoZZ|su9%neLed(Q_o{K@2zJeegxE6e zsJ6r7k=B_m+~pjHhalk)tD@oqP{l=LWV+@~wRAYTB1g!lm_A zO*EtT1EGmywb7!CUbAXW{e4%S`m)=}oDLdU>S^Y=-PWVYqt4vSgw##VqouA>%zBwN zy_!;eZ!l$RFOu)Em<;&aKK9|*R$&{WhRZPQ z(KZ!mK;XOm+>6rf$Rt4>iV5mOj~%Q_ZamM}-(M`C7Gbje+~B#p&|gRsCT3cja_=5J zRKyFO9z4FyTe%n}Kz;eA%dmY9Q!Omu;-9J8KjrEX#^V|4S-APpIkh@D8H7Y?F8Ngt z*R^i7;W4=Q$R(C|W_#G3v>;Z$-`9N+(R1ZeGEv?A?e`{fB2IEWk5mTah7gcOT4fZd zj}ga+hjuDWF&#=#$wGYBG-JOtMFn6DdtX990+?%Vp8d#BLOtvNE?^%sk{L!cz{{NP zBF>C^)4~1&&viT%1%9tjm|FEXljKH)GjrWJU71nP;6PH(>I`kTNuY5efREF3O zBpB}=(j*EmdyNfM-}c$dsmuR(&HLt3g=DpJ<$SQ5+fjlc0v$2v{S_Xy*ULpM_#jz$ z@CvYw-xIYt-w0$zWsbE!$dg2&KdveikRc1&@uJZZ!$g^5#QB)tYP%?|jqI#^miS!tZFg&a2C0OhmY^>$Wn`Q!a+Et3x>l1*mD%p$aBa|C z8Um?_eWdnGVY}`f!2}O{>5XwP^@-eRuLf{~WrX6-Il$z#_u7bl!i?o51>DCHF<39a z!}S>!Po6ld_BVKRK*l3}>C{(QUHeGL`vKgT;%VC{uLMOdFNnMrCppZqrHsOL)<9`C zHHL6eMrR4c8aoN?;Sf_OWj*w=A4(nG`;oePWY&%yO{q$!t@i8;&=u5+k%P6$#rNoR zX3iIC+BRA5XRc3Ck?vxpVyldq!vIgWCi7d;2~#~+d=y&QQMFz&g>c@4>eVDKcLfpa z7!ad`EB@4_ORU4A~N4C{rDhylvq|N-6A>|f{L4kv&Q=g?)etb@Qf^M zE!`~~#0t8;->TEcxP@bXfTg~IbW;b7?#BEZEfjyGbNMpheA|)H(6l!OtLQoF8WnfN zlm?c)$qQyKif!8Sf*Q5psSzk#(bBzK?T=J61?QCiPZ;_|T&JL!(Q2qz$;8wYr8;Ov zZIz%pQ$MiDmAFZkh$R*`$db#w#|A@5mp=1QDW(=wWfFtLS1gf%y>7q$-R`sq!*W8R zL_MT7Cf6cHvcJGOe2FV~TaOh&t%!SA*(Fos!Ak}DbH35J8OQ_X}ReZTFQG6 zAAqzDzi>FKRUVkB;+hukv(pyQyp0`Yu`ON47%hF!BIvRj$CVnhzG$tN-d5aNp5u_? zrSO1<4ND#NsTH!N0d=-Qo?cyU4> zD5o>V`UAnBv33HkD1po;%af zrX#KcJq(|k>)=in%{<5*CzCX9AVyz_348!`Z<@3rAEJ&ZWMNq}azS?*!X`53pZp>N zYcz_VC7HmF@8?jn?#v3rVHxE=yCpnV4DE-IL;jH;8aB(J-qG0*bskK zbHeZMdw@{{9aARC=Rv%a1snc5xdXc>RTw82njsU2_QF(`6GY=flk|_ra~&utSwu^X z{8oE#z4n8KmzT~{kfsz;Erv~{tza_KYoiA&d(r9m%1SzOa(gLjM^8;9@udWrqE50(HI-E0W_85iSuh;&%e60@ zrvlm)ubdMBmtXO~LSLDlGvz2_wO1Vt&di{MA|vw%@>w5jvN!(lsfH7iULR*nV)jlC zm{%su$Xux|P)>MtXPg6g6kFKL$QL4Hg#y|6)4VpB#232_utN0D_!mh)FU9`5dZ{SW zMav5T%o4motB%2L-PN}{T9>z;go_muIxl)S)960-)^%9e2W8wbBf@g58*FMWai&VD zFCveiZD?M}{jD|IT`KFbUNYPakW6u`{Y^_BK?Dbb4et5Ys;fx3dpoFy*M zP69gUw5NApHx&P0FsAb1IV)leqPq!_;0s!kV&BBA6b)ewXxXDvH!JlVBEU@^tM~2} zz1{q1Xc_CuV~X_Zi)dQNb?qgxkFM-*0-{7PyFBkn3N?UcbB$9U+b@ip_w#<;IVES- zu9^8501grNLr^71-{qu!E9f%-Y|@Xx;}!6c$9f$l=8oS~N6;ntZ29ZW2;Mpo>0g?v z!&e^kG998m?rmL(q@doDArV_o9-P4ka_I7`<5az=j6<0$-{Hb!*|G>CWEW!WNg`+) z<~H{KbSgKDVgRd2sbk;{!T=9wQTr{qp*-?a9uaGKNmJYLJ{zk`A)0$PAj@ckV6;a( z{jTRpiqX_)-SmD&Xv?D(m`5NXApo69)H&cm0KDY9}(W+0R})t{syr(2ndZ$a}rT<()KHkM=~W z&ew;pPSSo`DcfC9bVBEClM3ajA#;V@W6@Q@`(E|PtS_@mQ~SQ-`t3+O=y^y_+rXnqjXa+aJ|!=-cZs2z z+k6RO?nVlbwI2&@8ehbNRv869J9XL+pcVo8Z-u%MaEfn$HkCl+{nvx?$2&q zrR?gmDY5n5B>|)|JW~{LEw@KMbTwwM=jzB;pxWhRyo~pYO@ECC=#z&Z-Frd%Qw+F| z__x|xVC$i;&iG1#A{068l3sdQ_X6Z&Sv1wCLy0I%-({C;ND4~^dPQPt(nJyg4rf>m z__ILu2E5pFU&1GXz}2z*>FWMzMs5X!qGZHp&-wq+xIO6O)$B3FHdO7bO0>a%eykn`SLZSXCui(z^|%EGC6ob*hKsbpr!vSzDn@|-sKYr@!U*; zr$k48e^)>O25u5w%PdG?%&T0ChwORVYytu{dTe*Yd=n2UZXELI&+S8k&ove(G$X+F zG5z)JyI*+x9S(Fba_TPmQa!BDmCC*2hQUw#Sd#tApeEm>oKFQM9dCSg4v+A(XnYO4 z<5^$opWNUF?f=W`olG+Lt@CoGun6p7u1^79BD29r*Q8-TI&dwiPs~{qDBzQ$9J? zIFh{Tb@;x9B-pY&=8D8NS~Yp}$3~2*gmVCMJA6Juy?QwmsN;a7e$BNJB7|0XO zfJOJbco8(wnJcHgI_=lBJHbgD$4_2@<|X5^zrW=M4D2@5QqEqp0%b2Gylc9R>J+^5 z7ASG+z}GiE6TgO}Wd8Dg6%R_y*u3$MUepbF|HY~G%tiwTl=4>9lMJ{(-QRbCUSZr0 z8$JzH?Z?)bRRT6>bZg$R9Y*Nt3oy?jdcqSZ`ykIBjT0e7<-z?@(yr^GzL!s1Cpwsc zy^2esc6h)-m;Qx?CVw(rEkU=R>*E4`5p?#q+V05yAOGT6a5rQN7?sfmMz>5{a3uk{ z|78@$X-*|2+IZY@z!D zz5Qq9|50BG02}+{|2a1QIX3^FoO2wsxoY7k-Et>T&9q_K;PCPPv2%V`=2E`6v#+60 zpkfPs@{N=$rl{RRYX8mmRe%%ilZip>y|j8qv^M%tOC1QB zlJ00B2?0|5+n9j+DF6-aU5NeJ41m_;?=uIg%Atg!1|5A&s(Vf z2HpR&2mec#`TsALXp8}lwTk^dEXiW)nLH`~{xpgCzp?5RhQ-5Se*2w1C=Tq7VorRw z{t<*FcXal@vJ-IsNAj77S|DVLVQ&ut(+r5geN^|wh_|D>(@Pnu8_(1e44CQKJ-0GxK(|8@SeF_!ZBq`g9p_U ze6fC#YH9zUq*`F|2$-(|mhQ^`$6!=L@z_!_|Td4>IF<^SQlls_!) zKgZ@DO+EUZV_oz|k_FVME0OQ26RExxIhB3BEBzcmZe` zSmHE)6mL{?Rm+RjnEZ#lRLsB;CqJgi1h(81ise5C3T_EfAY=&qLj(%0Eud7% z$k2|T_Qi?xCpD+mj*6_C=C{-*;3w0{PKqDUprB_Jb|P`J$Xqc>Lz~=XZte7Qn?ebh zV2P#8A+gfw^7L%YJoy%iGV;3&X0-BDz5&E!pbQZ+K3S3uNHMRA|IVkyyToTHW8-cF zF`CH^T|`C?S4lTgWjel6MAWrWyvumgF2{+s>3*3pZG`2azj8MgdD00_MgBc7vyVbm z-~l{Osr_E)PLC!pYuFWH9{cZUF9&9VAIU3MF3(V2$Oq+C76L7CEG3AX;(v|j>T3tg z+MyF>H6%-*DIIfY_^(o_tCtG11j*1KgS^Nr^8p8WjYY9)wA;o!9-9*J=c*@) zliwd2U4`ZM8BKG41mFN`YUht&i!%xqU%alnpRdZn)~o; ze8aqHb-I_L;SLbw3AJ7Nhb$ZS<8#)Hjc=q|gTj6|wx4Yr^HH`p(Go5Xi{Iek*S@UJ z*0Sy}_24KVjcKU;)v}WnDT4&nz2?bQc6EP@CnLE=9ea?5gei)z&47_1Nxk7^WKNu| zta9@!yJRL{cIHjfjjfIGEPCq z?0sSYY~J1f?N!3WfCOG-TmA?acQ6W816S4NSBX-aVAK*);cM=`QqN;w)}l88_ZQ|a zxs5yB+Pr9)b6uHLqBnHs_RYN5NT>95n5C3!{_TD=XjO%g7q~xl0LlhefR}zl+3??J z`)*qE?U#Y8J?HV!?k5E1tH9_>CuP7hta=YO;Cl#nbcS*ZJWeC2eqm(VhS{ODk4IU!fmyIs4m<+t=R?^WoN-w5tDHWE$F3x+m8#&*UhEf*><%JTSIys^rL@x79=~Cs!p{JPa2J|QqNOwXT6w&s8N|h&R1&2?qKD1i zjc6<|IbT~1f9^f)f3r5)r8LCy3vf3l6YG9w0O5bD)ZSjA2BU)A?~lVzavHHuc04B` z_tJfo0-meP+W~I-c0CW&>J}nO=Yt%b1bvcvShG2+@YHY!L|swUt+80mvCG*MhuIo; zCamS1?S&PW;clnnb;^u=5=UB9UNu|i_FHRnKm0yiKq-uKQ8&+ z_v{yA+vT#3KX^|tkKZW6AZ)G8e~%0Z|ezkm{-t7p7+kf1SlX?*T;c9%Qo zFOAXqw=Vu=p|i2nEs54$2j8!>M4lSNj-X^Y`J_Z7yTa>`*$EuFl z&n0N_UDDpRkix0wIJ@wg2wA+85)B5{g*B$Ki8`L|MWb@FeYJVYcZs-bn9an%sOKQWo+kh$c0B1nVJ$u+L$`$Y;}9To7%;>`H) zB#@~bGbB9ZK0JC3mf=MLw+{}l?OV5i_+EZGnt#`yURlOD|7Yx|8gDPsF`;~fH>BoP zmPR&Vme`boBwCpI9^Pd(;AWn*w*2^hB6#^PP3B2U+dobGe``yKKITI}*w8XnKPGAx#F znb<{E4a~E>PTu_NaAAD^Nh@krZYl(Sw^Jl2y za-%Ws{SQ&m!D>{bN!pkpasO@YsAy8uAO_c;7g2;AL_b3ql}944zCkUMzjxCro40DT zO}I+WAnJ7c`E&;W3*?D#K?=~E8$kX0M-LEEyI)h9h7ksr(qGf0#9iU?LC0WHCjJE> z75?DC1Ug_3YQBC{nlC{bQBt4G*jV|5L`oZj;$NAQ1VP;=D9om4msN*kDknQ zxaDe;!|dl7#i;nbujzPP)^ggm{`%qSuACV2NUa0*j_7v7JDh=Mk0leQ9jD|>WtW4y z2f@TQ{7Lj{Vu=yr4he#qtj?GhRV~-U{@YaYMn&V*V{bbsqt3~Qy7k{3-1$e*WSX$y`_0CU=G?7 z4P3>`v<)A6g*7ZbRV!Xb#3mBS#&PO1tZ(ufr>RMUYhSudRub>iiX^n#5RW%Hu_k{5 z0}eZWPdj^pFc&QY5|TirUi^6Zx7j#f>I;bq{E_X}u|LoA@@O|TOPeY-ntke+XmW)V zF)}Z;1%tUpNu+NcAnpkEdX4Iu=Diy2RbL2ixZAZZ-v_a{B-=?<98nz5LnLuajt#Qo zUH`cyN!`9{UdcC^MDfmI`Fk=PUJi=(HjTV2I7R+er zS2Sk;r6BFwlp&z2oqT>|7w{15@b3;G{9}hrj=)fI3{X?BkEf0L`ico*oU zP)w!J5#~UI0}sFYYXWG>JyN7SmBu&B;%dZ$v$Bi~q^!aZ3JXy`yx17D*6QV@u%7kS zk}&Bs_4wv7;h%z`EH_N6%we(uq?%birDUQ8~UXmh^xGUeK>%f3Ixi1tiL#?86E1aaeo;7;=U!Tn!y zW3#j!nwn9=%*(O0NE|IOm8g28IAf_g>V0@Kq|_YeEhj~WnxvdaNfa#a{*s4B)j(P4 z7IIIfj3XZDC(id$X8yBmdk{KaBP>{k#BpF=!{cM?5B#Mpe~k`<1wlMw{hlRRC&$M@ zspw*|xw#HcHH(GsX=|w)4~5gf_#(#kX}{;*=_ja>;6RFq7zh|oLgeqvI6e_D%G`Hd z2jh>S;TvE^=|3pv-8$#{)L8i)OO2Q*5K^9I-A+3!k)|C|e^&c-IlHZA z-B+7h^|Pq1-3pOb@P)J=Id9*uriL#MxeUz9N%k^%_*M;BSYBRIIX`4sR}%LMI-QDL zVlol*E)ZA`LKt*tD2(PibT2p-tod)ar!si2dM}7uFZf3VVcVO1OBpkAsAC7gJsEI! z{M_aunISrjIk$Uwx0UWojMWf~vzYftfg6ipG35WoJ>|ZTDC11NyX}$o(L=uv8ap+- zwblT!-UV0X!DP4H&GhvKqr~2=Bv@v%r(tAt>ZzzO3;Q`X?-l$Vrs)}Qa9p;6$8LlQ z?-hADA@i*ZB7Qm&-mj;$Vx_}bQbyvxPl8RS+;_z{q1L~?BR^f-hZsL3AFJR?J3@`s z;odN+mInj-U`yX-$JAeJUUYb7_XJ*<0ZX^gd%|_8-ekhe)T972TSridv3V5E>j|xY zDxlMwA$EB~#?;e8FDVddhEsTGJ0`%4+q&-D+g*>s`Z+LyPLC0|=R76UE{f)w?Ca;= zO#U}Xk=N5i=_T4p&Ya=6EcZ|nKCA~E_3nQSZ1|T53Mj1qDTkP1elE;iPbSyne(*MR zj2bax>5om8MkhQmX8d}5VOF8J^m=u|U=mudx{4NxntiIZ!R>|CzH9S~Z+q2!04(>K zxj{K7uyw`5w^VSxykK4R1Cx2lc;&b_9`Rv3&u-%n5yfIMhqHc1-BHyvCkT1ohI1*ux2Ssq36M{B#un4u?_gx7M zL5Kbww!gwg{d1)YuLAAs8&yXiV{8UEqTl0`x=s{MhCOtk*P)%%Tzh0|)hJQ3+ZG<$ z`raZk$I56M5&v-M3tzA&y6;_8-UzN*oc489k*Z87Uonz5GVl0|a!am9j%L-WczhT) z*1LJ3WFe4hZBc1ymwkcuO*A%V8|N@f5w)b8)@8DPLyTKTB)oXYziZ=BFa&E|nWt~t zbZok!_?AB_Q>1!q+signqb}=}U#d)SD*ne0oN-bQZhxoi?Dspzaa~Sbk(rKZuy~Nj zs{9*W@ZhtpdC1S0ABX4ZTA(gwyGKLJR2pu zmGWels2*Fy{#W0#OWLL6=%!ZYp;F!>?X|yWH2H9(bEMEU$`<266E#MiVWZ(6(rXl z`R<)-WQ5xMjM1ht5~esZ6B1gF8d5VfX@{7Kycv2#)=7rk3{8zkMX1@&BZ1>}d_!7M zUBBdOe1&5!fsRpV?&O%Mo8O##y&Jolhv%0!NT<9%RrSdBR@EZ;nf()|H%$qKf z#R(#~p_O=KrS;wLMA>H!s<#I-t(>v8R1g3o9-C@VlNuWF-rE(u7|- zTC?a@p|*>rOA-@1jJsn6Bs+_>?A^22VFh|Z#Vu1)f{5K5pVRnrZqDhP&I{}z5}%+? zTZAn6jTQx?@pt1&c;zHvCDcJjPa z`Oa-r?qk*_u-ZIK{uvSevgNRUip zB-m#n^Vfd$1W1Uu#F+6j)TM&j%FcmIBm!R)!1r+lNWO5caSl;FU-$}dBrl3DTz~~* zsbH-Z*_F8l2`>->c&opZ213{jT|<++j#m+Hp<1wZF#kMb>mFcvXH;=?>Q>>ZH_6HS zlNVF4H2#$0I`)+$qh5-}l$>2#HHy64ON;k?BdqbKyrLWqaHefvG7Cz|s^@i|0!hAL z2uiPH@#9bG8zo3}c(9k=Pzc6ZvFMWVA7O>w zH^;5d>RN4=Y_j~alB`%%3PTRz~}asJ76wMYnp9rSkVD%KJ0b_t}(4l(ZIDtcLGKz>$})raBjqnZ}I&>h_ zF413or4Hig`bRr$E1meb7z9BC^qgyDAgU7jgpHTzF{)jQ&+Qvi2PxMKDy#culM_U`0~UYqbTX!#Uj7RJw&DAhVYLMlNC>)_C1z>l ztNtDAr2-N^S_A;o1W%fwLnv%a(TONXuw&J-T5lxqyXx~P!T-p7aX&6XB!pVtb$cg} zB=sGo(tx$h*8iYAKN5tVm^urA1fyYAUn@Xy{ZjAy)@Oo++UFD9slxt-OhKtt$V56{ zVgmctgcl139TMtAMVdQ2Q04L4F7igK5xW!bc)?Hp-J=<4#=hjWFfUDT+DQ-&mp!*k zix{|&d!Wn7nDgQ{&Y1S`E9i6++cWK>*n{2*KdEyiMiTYl+wnl33d`rFBi`0LMY-W7 zMU}34L`6|kLM9*8r9&dIqK1`%raKayN81QDnSi5Laz3KB)lsH~psihe=l6w!O(J@T z0mNtjXAxhsL_8LPoa}Bu<#azfTJaO^KcL$v&O{z){z80}?rk-84<`vDHdWf&SN@J| z11(ZGwRj3LE!hD~G06976c4#X;DZTFWjrLhN<&mq=vZg0mcW zLSjse>-BHqwAYnvaN(&Z&9SmyTp}^MY#~4u5d2P-$O2RWy}zsiZx-hlGf{mW#I#0i z_3LBQZd5|vdDor!cOAj`qMTC1#aeGE_MKk3VWDB( zydPrlytWp~$H$`ZrZtGvfzjKig~P+>tS)1u%EVI^{5nG`HsQHx;-aPuR>rA}JkHF> zvn&uemgkEmXiLJF(yDO&_x4m_t`hMWg{fS-sl*QK>#hm~`m1ku6)r2In^w)ShYY*c zDKV7?qc^g<#Gc(bMbydBklB6mj8J!SZ2iiwJ5Ou#JFIKyVB@M72w#*z3FIqmAX~QG z@<}dK0ULS$rHxu$7xiYYt`>6(O1~OEZQy81Cc5vLjS(f|0Hgg$BK-e0iPV`5ls|KE zR*Su+n8g{Lp%-y4V8Hw$H zUmj7QrbL>| zqR3sHIIyO`I(R@Az@T;)Acx_FbUE>S)A+c(chvZunkhdir6giy{j|9 zY#u!!=2pc;g1rF>2^!nbXB0QU?;sBPAG;XMP$#RXG>JciF$0N!2?~@_lkfVTACVyK zRxca^mf;6*f3ZsxUJM+S!K)J0se+<~5I6a9Q5V1%i6qU?ZnO|4urEC13!&S009`n! zN7Cal>6BZGU+-LYWRHz%!k?<2GBDm5zZSF*2fho;u1t3DRS-3N#5Y#^H+SD|*RR`s zL!q}aohE&PpEfL4RTvhX@rxkU(&^x3anR9sYhq<1OTAD{7M?h)6XyOOflG$AWQ&Dk zZpQ+a4`2gECdJ8j;9qleIMw4Nvo2f*nGD3#g|GCvL>nkKXjWiGTC!jm9|%EP0!a{HnE*e6phQ?i836x6kqne) zLVyW}#8_7bQ^!f2E%zw$90tEZ8bl~|-Wdd{`$`X`5X`M6r9Aq+>}{DadoV_CXKEej z0OpB1KU6Za|IsjubT5EG$sVJG^f`y()*M0!LJfXe+40_gtakfG4OgZ;v0`0JE~kan zV)q+7M)K*|fR~lL*xDABz__dqSriFk?$CI&FK0KnW$n#Dp5)Fn_H-d|On5F|8H zRUnGE3!J4{kszd52LB4Gq%wn_NI)79QZwtk@!Kr$z5SqaGVDL*)EQe5{Td#D1y&4p z;F2J5`F#lT^U4w1ms1#7!=7czA2r-ndiR`KhMhanWr7~@oK{fCgl#jnlZTk{?9tbn z$Kr(Kk3(Kk>YU_13x$Xoxoe15*E(sc7gyO_d*f^O$KPFob66%%FF&*mGUDhwXh1l7 z7qVwt%7cRoe2hN_={0VpT2R+8vBD|143b)Y3oT~-CVk6b)fciz1PN*-6y@fp7{H@rOwDOy=@U<354yDT zMin&Pb<~-r;AiZOa-p9+v146KXmG_SP~$18(AP}VGqMg#pJ1I=T4CgDi*k%i^g(K8 zg(I9PC9ozF;qtW+9ly?JFK~z2ZgI$J>}kh^Eipx8yR?eVT&R0Lz4n8uh~H}tkvESP zbn*T8hzt(2NBQS-ZW%L>Go;(gS`ScD)pm^wu>Wb!X<*4;bkA z%{uKoXV3HSJ6-ASZ|nECcP&FpJg^IH_IJ51H0z_oT9kJ9mE}LO@UbUc5n-^4vUHCY z75ri%>Ma^W+c9xje0+u-HM+#2uDoAQ-)**U={bYX&V=wJh+fQDK!U-d!c|JpfGz~% zZ|JCzq%R8hpAIcaO_-L*7mlU!>R%0;g61m?UjSh+pAoWWHan<^-$%a+$xowFAy_Mb@l~*zhUW=Z!8n-<5 zG7E+bIN-fiEpYLtsNzrFZEtH>fl611XbF(w@wA38N3*3>m&p2dWz0#Il zw!ZkhOWnRd>5zFcnq`@(n=AlKP0KMXAH-^g=7W6U8E9I{)Eq$Kujd*&-66Stx7jas z_>W@ai}D9E3lz@6q5zKT8i9w5*_Q*@z*KcVTmuQlCE4;X(B(2|F+l#)$%(7|3P6G9 z`yxHIS9}ui^X`??-8_DUxeZ2I`A68vn#BuLi-5%8(ctIJ-O8!zKc!npkY7xNA&U>Z zLrQnlVZBx5Pj}S49Xnxq+y#~NuBpc2QRxzFQ)Bva!Hg7-BvYmC)f>WIJ*@Vr)T#H> znpk6(R4w_QOAlt`;Rc^7#VUA z591JYX$JG9Np+~#{2R+3l`0Lx?ya#C{F?sg1OlZf$91DXHifn)=Mn*!^5LJy6agtT zEN=@XzJl{2>#_S&q_ieaeSwGXfjHRz@;tIu%^DMI_!R6=avt%K4u#5Sm2 zYhUVljbj5ukZE~iZWNT16ug(x5?#Sz0jDpk>ivzeLSZ)E*}=o%9dIq+)nDBg6%H90 z4GuE@IQ=5ob=2MR2gXvjIHO0H2s_g!F3he&HGteQ(oPmuAOk4{^g923WB>1^6o@$^ zy=;{?)&ry9CQrt~=Dma;eA@<#UG*1()G|pIe)CI=1(H2lk(xp(^B0s3&?E@P5%5@( zfZ^^^-l;Zm8GfMK6uaiC$j-0IBBQuxQIP73yz3FqQPf5@t5&`CV0o3iBDTzm{mCtz zkt#{8Rg83Wb~K;bg-%(+kQ5^wq4prM?#Z70anIS=_GkREo?>UG%K$G)$+_oGQ#>;f zQL`;6h)6v*KA!%K2`uc}*>21;<3k(vD6 zP=3;~5S$K6BZ`bfeM0f<&pB`970TFqSsDgDdb#h7uH&6=g9YE^?3+eLQn8MG>F-Od zx9*z=u5Nqk;pqGUH6d878ARxrd-0)ELA&I;0Nk(i$&8nAKoCEBPIuUQ)$Huzn(>{3 zQRfv5Vgdm|v^D-806BqvwN{@7jIs{sKo#OoG1qbdOs$VAECwX9@gfmtoIh+9(8Dqm z{!sS<@1s&cIW6I&5%)_1WYJND?`e2Xo1sBWB>z%L^H@n(#R1NO7J`|myhKO%3?a^b z6*oU787p+Z@!FEgY9#Onv1MbU3|T8lyrAw&8~G$ja%E+@E6udMy!Lm+pjsNaK-sUab^oaVJlLf z<7Vmz{u%S7qD|H8A8D4i7Q!{y&SllwevAYHjVQ+{BS7RF1tzzb11MwnS19ws;n9_C z?(f-yoKQar9QXP&PURJLWyvW(tRS5fFnxOq$-q01p zy;W^RL1dS9pElfnD*TDO*qu_z*Q(j1dMMj?4zCa4{v*y*+mlt#9Z^?Z7Dqy7cDqrJ zah-M*E$IGRA%i1Lz2EBIfH5$0??M9g_ltDJWP2c%3-v?ohUAnN%av)Y z=MmfIGJ_`}NTRoLN)9oR5bgWyfPD^tR#ry_>U`9pFIDOg?uKmi2@FFqxYa4-#eNjb zMty9#?e)%c)VC4i676YhqLnhg?yEU25DBn?~wtzLNMN$a1ktNRR4uk4X&FmabaS%y+D zz%5-*Lr$~Rn|}G*wvjZA`)(N0s>f$_DI9Ma)ZUR;A|kQSH^(Ck7KQ@s)$pV zzZ-H^^b)?liGTF8FWs>{v90ReL^X+~Ta6R4Kun``vy?sNTkR6MdMXG*DiKO_cRZQ1 zms0CFD=IoWD4fQtkr!g~7{N31QB}-mqIhCnDI&5qk8TJW;luqaqq&1DwLbqra9W!o ziz(N)T4UDTWXi$4kF)1Q@Zg}%t)V57vxgB<$xZfL^mK$;EI#b=1ZcO)#@eS!0h*l# z(CkS1;X*24WFd$3H=Fu zO3aKOUQT&#{0O@V+W#tjSk;GX0cA@7)D^h`}gR5@`&VgN3 z?d=wRXpBZx^db&}9QKw*kK3-=$f(nkb&0W>kA#(#)%X#RAq0%EAh5=R(ZL)+OCO7_9J{Wpm`xYGUgN zg!jH8?F|G=wA+L_siuV-(-=hk(6@!X1d@lzg#&_z3HskuPrE`qByhW?AYjf(?Ek@> zemKdoigy)io%-{TG<-lzKW7GK|BPtnawffP^`bbVj!=MSQqg-Fzd}1OpGy$ZwXIX9(tVc z*9S~Auz50iJV2ThA&bXwFuACo*;BT}GaukZ&T7k89Ef80Xakiy1@9GGVxq*XS>y7) z<8{03`1w|g?rAe)$ygPMMdQqB6;#VZo})Hgz5amA(y`yE>RwP#NV3kylN%7}i3_al zRVTx!UPse$9DQAALWa=f&V*2v{J`4MGw!R-1tm@$2nf72x;?9H{4tn&UhMoG)m7CR zA;1gJl;S@$1>c596V(;7{jX@s|88hiAa0Xmv8ceakojs+>99@bk(pc(9Cwwazz?MN z@^0SQ|u928Yr|s;fDw zk>+!ZG;i?tsw`o~dG(S}&G$YbM7HiGhUw!|*YUgCLk$o4Q1#f;6p3;fmr$ZcPn$(> zrV-cv>_WwQrH?_twG6`+!b)AmdffBAP**pT@v1P*+`!;nFO6eHGY{ID%OB;+qDKw> zbO|&@_E*By|28fWlS9K2QeN6-98|p+JRj1O-xz7Fp}_2TOr8DyOQb9+4^FzQ5fA## zRO?S2EtIJc7K@5;G9l1B&b{R9wab0Pd3xi1tm7Jt%3V8%CRtIBr@&!5_*xeCvTBY0 zuI$uFdexyXuy?Ee!b?{%{qp!`yX&`0GKRM>YyQPzeauAT`fu;K250Y!rxlyQ`suhX~SSXrID5|S2 zmA#DmrX%{gmkzKygR6_FYzRA0}-v@-{@J&Ym| z5kFb2D_)_2pSaR9a(8cTQeNA>FCg;1skiw;=BYJ`cG#2zF|t&SotzY^9ZN@nBvTzu zJgvO$*)`t|dtg(@SToB)na~2 z_#Aog{4)CS<>PfI>||g;L81bpD!b;poKJ^LvCC@xP_4<#A8P$f32*na$3kb2Sdz-0}Cd0JxWnS6D*hX@pSYS=iw+Wa&;}79Bh7{zsFd zS>uL_6Qu58ok3`IWpT(&cp1cLbC|(Kb=y=M)$nl0M<$41Epl%_EvdTScXC|Iq}uf! zhfzHp@F2CmOoLdtJTxq3cQzfXq>N}FOUegTX7aw>hAVn^{i?tYu+(+3Z!p8*M6^*x z>Ugp93XysCKqD-VW$Uzn>j$y1KabU~52@}sR|4QW_XI$XKLgZ>e}4iYF!2}(wo>@w z4+BL1Zy6w590kl7&eLe+yRlFfL3HLgluR!&D$a5(=kznb+^d%jp4+1_j6pN4ScPDeN%UO4qAY!r${4K!|)3-NWs=_#h&8OMcd zEm}JCM@mZ@QBO}G`cnNzockR2f%4|-c$mH%O7 z+DoS7L#==ye7Ro&Z-Ngd~+;<_96`<%2iM4QLq{4Gnx{f^jhO>h%J ziOg)t;snEH_}&lW{ww9f$k|LnFjK|e3X6Gv?%_mf@WZk0SoN9BxLA>XR=Ix8vjp4O z-K#fB$-X{&CuQACTtY+B0&d=n(a6vX1MT(n z-?i6PkB}gC>No&-a{6-<>%aCoP;p=X4Pz+eHp$a~Vg8Gy7&0K?k9;YD?G@PR#LTyw90muA@M-jat?n;NE}UC|<}} z8Zt`1^CFvWf=;q|wa4FT*1Cj{?*BT&cSID=RyM30KS;{!*@G0ZDDyBx?-_^#%xd4m zB#i2v?Omg1h+)zkwddrP4^xT7*^R+It=6;E+GU8=_rsdDS3hUwe14l$?0m5*aQV$~ zym`v7)kx01Ik-kKaqG@;X(DvPFIMb4+jyIPb($Yoac++RzT3N=RCO>GIPyAgdLUq% zbH$6epvv$NbxwkPaySqcl{lHy5r^Who|Z@HWnC3;dlxqDi8x+MB?4cqgWL*}3ICEY znyG*Dp|D^lZA2^Od!^>a#Q_y5{0=pH>|(`)r_urhbQ18|)MMawkl0tV8b%~Yd3`fu zsR+<>(fwuL^}k%1+aeeed%QB5mV8`OmdwX!Kd&2WUpiV)9 zT;>gkbFJe=1UH5K2sEV4w}c0A8kdT29K68KhfkQpiM`f5+zp2gsOH~#*gWWC3U}9@ zFXTGjJMqiMp5OLPnoqij4t9+Yu=(80UK!_9e~&V|zaQLgj^N@4p`8h6? z$7vD!{ZLF|<2}=o?D^uiI$trf3pP=-0;Rh9GxCbnDlw?C#Wsgt&-o#=DavORea2@} zjP6Ek)5Ru3YV)CNVE#+r&WHD~D6xk#D_txDrfyu{%5XY}mTuu(Nt-ZHPKb zL50jU1|Jp)c7%W1F?pqanDD+534-r0b2;i%t$H)3M<#N~I{#4cBj0M8dFE6vagkf> zl4ielwZ!6yk1B^(>*yLH`dat;xYvB2eDTMAu&4tz_D3I$*Tq8q%Ea!^cDnE{h6cqh z*wJ8*$h1y2tSqMGIfi*JJdgW%YJJ`#!Bo*+ZMP4tO-iAG*TfpZP6pA^L@vWayOS!w zx<@#8{IZ%hy($*aKapDpX%c~fiwbA@syc8r;4iNS{0EvHJfI>WJv=0V`=|fk9cg=M z7``t|t{$4I&)mCpuXCS2SEYWI!}6{%f05a6V;p)QpO|RLcmF`Ng`$6zvL*Y?-1qJVr<{ zmzrJj)Q|7|hVH(Jj0{WL3~mN_oM-Y^q4n0@hbR|NdHX#1`~jG(yXiNZ34uVv+%|OL zC|A_cSIK0J+a__+=%x9k(#Z)vX2+b?DY%x`gAmL!+SGe(9;)@z#hirhhrXu4HN_+s z?et59aceTg3SygYpGDX&vy&!v#B}{8HmMX8OARO9?A=dWK{tO>eDqvn_~^cbUXx0q zeRhk=x&ND(T8AIxB%f1GYI}b!zqMF~-clPnbrK`oUs-M2_-MaGH2%ApDVtYTGh#uP2Doy&$&fEMb@0p zoasy7><-fJbPq0nOUC2_O8iI!vRj(XO`GSVH=>U|dta{24Nh96bQ8;*Twi~nJbK-B z_A-5+%us%aMCe)5$K-&>`{R{wOlF*{eh!R9k_JCXIh+?i8+1j9XGrSFuQ{aG7hT>4 z-qakXFfImG+E%RuZ4SP0wh{JN-e5^@qjh2L4C81FX%8bl+}kgNpwLD8`(CB89P)mB zE9vd??DzL~KZeG~1Mi2_u8;`3>|~r(bi|r_BxXZ9jYgyi8qJBnOL(~&Dn4V;!cU(q zJ6zG^#Jg;s^A2aBXq&0>y|tkUDJ$a&c=OUN{kVH`zRjTvZmTu-*7wnWeyF1!ojT;- z4=DSXalLwlq+d_W+rnO7F&&l2CwOzGLkZuW&O>Q@omyrl=8ld&%%|+PhVt$ZLEpt^_9qOz!Q9BJw5hGR3= zqS)toF@)TK@OL!e$_DCIXxZa{L6h zx$QRu5-MF(A`%(T?_*7}49c{Oe_Jwz6dUsEPq4#( zJpSPBC1pstf?t4$oryVC$x=4XFqVdAe*QYae>^;N6N`;qWP7H<%oQEK-2EJ;Ancxg z`>uE8@V3`je8+Xut={1dO*)Q*S&_c(?ZI1!h(l> zIR?SUeeOV2qHgcsq{}IZcYY^@ZP0Op8|Z-VVR)2V_$<^+W@$;n`}P4d#qG%tl0dB9 z1R+lM_#iEuXyq(yb@~G0aYLp7IFB^O~d-~x5?B={bE)dmH0&-p~iXkXg|Ha z8`^op>EPqIcgZJ{w)KyTN{mgjpG#)GVvtLxU`fdGm={)$tvX1ly&jq-mO3frUQSm9 zp0M`p#)3Te!Gu(;xOlBa|={l<;s`vo~(r-1;RbQp4tc#!0O38 z22%esqf+U_m%C-J&o300yS+PX_WfF8g=u8~+y7E=wHH8Q-+{HphJ9W?&Qx`^cS92N zoP5?rfNiLv`Q1p0g_%ktLY6o8n}%+3S7RI}d8|AL1lDYgF%=(qK%z<(e6O3Slj5Ym z!TY1Qij(JeEW3r-wc^67-P6M?=li<;=?zBP-+95dQiXM>_g^g44(*V>Z|+4!Ts)B7 z6)Bo3l#6-MXQi=Cola4``spO{xe}lA!eR2;`o7Tn#t{CJ8ydORTn+mx)V%(IcfCKa z4}Lr={4R5`GbyROqmtWe>{=GU*pJAOpV@9EJNKY6_1Uv3*gmbcX_bHPt@DUMH?R0n z^0I|UX;!lSD%dt_`zn}AtMc$?kqc7M{IP&B z<|{Z+<|pMG9?ckLCX2*CJRsPoh$VWHN+fhfib-f{PaHB3ai-G$c&ZT%rf&RD8p^OK+0dIa*SAFZFCP`&1QVn{X@xZ@WJ56_Cr!sP z4vO610z@21Am~m02j&f*BZkY*%aVS25z@*rIo_hKF;R%kkCl7Z(`2bE2E}u&z8*VpAaEAD(%u*uVKJ7i zizMRqN$*m<@m!@Wk4w|j@mO@4LX-uOBUfKM z3wtESCTlW?($W3g{Y2EQrl9(M_~G|X(|ym2#7F+$Ja(#;o3>s#h|Wc=^Xq>}NTeh` zu-EIYyQZC*nT|U5>Y%MM2Y+7nEu`XTg?8BrD7*Hs9AsIso;ZcHLWcugB=NHlaUGI> z=aArm+>5MjDzR=d@1Gxp$Q~|SG)=%DRsi{4L;{!?jJlL{04&pC(qN}z4rENki2m(@ z?H6ZG-8(InZ5Icw##ZRrcb9E%GK--;C^mACIw5IVDJNZOvuhn zzz&1Ka=T0N4vXy#k(R!vz&xzxbqv z{v-kai_;GZUWaDS@(U}!znqy3jEI{5(vSP_@`I&pU3~dPt4;bX&gXciyafZ+&xtUAN)7VYVrM9X#T-4q zBU_YyWL#}4#(DKzh``}~lgr^Q-b&QJc-)o*^mdo*O8#6(k+6K>tiOq7WIB8yuTsPN zj$VttQc++_;+rGlN&Ythd6GwpR|c$KoV&Fum%lzp%pRLTo%ThyNJ9)AWT<9{!zDg; z(>-eSzC;y`U6xIMn!GQ|FV9o%0sgqC`$)A!qBfNxvBKd!;+RJZ6Jilf02^U-l|;Fs z5nl%B(>2WE1Tr3Wz_=OzRez|F8J{S-+Q&5Bc|l#v(o3~HLYyiM=AF!Xdhq89Kw}hk z43@Zpf=&bet+W78E`I}l`M*WQpOXH+fVHq8k0Fp^sjDAs-?%d|33L78Dq;mQGe1K& zcts}of^7=2a;A)RCzB<<^wI0TE#r^B?BlXlpU?E*#z_Y*%PPivgye>tRnU$sguljP z2(s}Xk$s!s_B8JOOXl81>@HP%|I%*-3GtP3GfyK^ko2ho{3h6*STGy;CijCV6K`nn zV#B*hGB0;iZ@3<1NtsAyxiqKIp6yvcVPnNqm|vF}a(7+nW}obTaJObzAPrJ; zY<(69V0&hJ8rnT`!tR~CJ z)LhJYgervv#XkSAe+{kRw>G<#WI3g4pR^`=@Vz! zlsy}A$_=d*qW2HsA>gXwO5*v5_$^^iq0cYVja`pZupmM%>5FC?omh}!oN{abYQ114 z@O03xC31lL;Nbm@P5LO`8n6PvNG3lccnzQrDrT7dbD%8XKYeOV4a6RL{>PX{_Roem ze8*Zt+gCzx+VEUI(f6pk7~Zd0K2nX5Q=R#G6G2TU9di&otGW{Xu02F5VafQ3w7W}f zYt_E#wxl$fT!`|7z1zf{7RQai54Hx`sy;6HPjWiZ=@XYRikhEQEnVH43JNjojnT7A z3RHJ3Cq&016D-HWz56N)XAVR|yHCs&<#F8^60 z?@tQrKyi6}{(2ciK?GzU5tzo$6Aw5AN6dnCFz}v{(O^<6(vxW5;~NX`6G7R<`$iCW zdhnY_bh8F~6%+AbpOMp#JPK#Ia$o*nb+A39>c!}J=2;P0E4fiy^U_VFSJJUd=el2K;PON0 z>nGEo)z)ZoC^{d(IZ&3GhOE?j&d zw%Vjm%&y>@_s)rVB_;&Fci3yqF~C?*GQFg24+JKJ=Ikeh-KTKj0?*qZIluk^;LU5m zeWoq6&%20`F(Fqp+w;y$U^o8rRKb589O;RGEO4UO)BVGg*4Vr7Y1Aj-^uR9~$qLKp z6Ts}nKd2}H$zpH#Arl)g(KJ%LVvINr3h>IpMWg@7*}TT9Tr%%;Ovsa$vbL3yRK1`P zuY~S6$1fEE4Vv++HL@4>yb?rZGv#F5lTd8BgTZ`QBMl+9NkLmFrZg$-TPNGx_j0G{ z)36DC`8j%RzLPP`vh`%2vgGY{1;KHd6}j`vqM7!FN&V(Rn*-^^OD@L-mms_}IXVdq zWiBv?HoeQC)=pN~-%l*)*^rOf#_MH^$E1g;s;+XK$p8+ZMZKlg2mbB#upF1!OvKv! zl*0zlx&Qer(E+Da8mVrw1x&?lic9w@0r7H<$9xqo<=)u&BZ5n9I2{d#aqYuRUI&;G=1v6+@LbS5eZrT@|BC-xD)gl*TJ& z{aa|ls$iD;X;I1-&yqd$0)(3Wmw{|4SLRXr{oBU@o(Ne_CNSX@zCqk5cUder7##$T zh{^G=g(Ko3DgF;qyz4m(-SF`Oqx_6)5d12Z7huk335d{BbrE&Et~mNxIU^GE zofP*NvF^DcWfixxpUuHJsjBACFq&is=sf0ZD`=e%$rrhrt_3+ zx&(@9XF_^Nqyx$@ok~(_811&k)769E3+Q;TNPsbSBM4%!AjjZi?%%QR)5&O)`2*p2 zADDOKfUsW9{l5uo++xY?WcEGI0!(Dhm_7lKgsE7&hbk#8uGD}yJEP-QiF-MQsx&t- zFS-)URW9s#m`t=j+VEg>?~cF)M}&h8#pV+xW}W5Vs&3yDk-6(nBn(Fj#${?abbsG0 zjnx20^0J9+B`F6D{D#x&6qCY$T->wx**ltxsOa7LvLTHL*;WRk_uuc5_WT}o0DUXG zG$$>a0}~>c@so)Wh-|^qpF`+C;(qk)VUVT9@XKt4F6sYJuByd%U{t3eK!o|morZHA zyqoU|kxf2hvbg!iDhCo~dP%2=qI%8?;*E(m!6|qZr}2e7J4~`}BBHGNdRQoigV{~Q zP9_L7o}`e7F@@h6zO(!5dCIt%Y25_xyj99fLz0iZ(8Ous2a}15YdbmDWVOfv3Al>u z@io37<7UYNPQSnW%sySsN`Vr9$pC-+$1(Ypn(MJxE&94`wb8&ObAW#+7DRTDan&Xs zU+wYpqqp+aoRQBhqv^3t=Dy`yVpb@<5g)-)OlXUnHvKNG>dNJmQ*7~m_U#;O*tAT+ zMj>3Bh5ow<3{D4sxe>#w2jzG3Kd4CN`^GxLP=o#QS!nxDpa|;%MOf68IS~HR)3w$M zuzA&B=hOEfaBjB3-%$2)jOQfsz+VGBU}PfzS-!1VsehoWt@RB#Kx4{~nN#TeUOWoI zgfzk@vscE6`YiJ$HM`R5Xlwy>RE~{0n5Y6ddllr0f!)8NocKp20fUAu`PAMtQ*>jFK;)9VkhmhI( z>`mQR5O|-2)XEq@z&PaJ*}*{C`2jfde^E{3`LkC7*}m}=zj&AHC&`zabH^=Uu0Z?M zKm2>#aIy&&{g)B@7!!OGHATwrm&OX&jwTK;CdgyOP?MAA{2Jq@tmPg*g8T3az#q7z zOw<*4jJ&m+`tu!l40H#71qKUK4{<+h--r~g*jEX@Z(vY%ok8Z%8(;uxdP*?yARtX- z0|EIL+E7h!iw41b2{_ywLe9KF@p=26r<>8Xz^HYAl)A8&KZq5zeDq^W5Mk?qdPOiERCNjboGf|}SzN5}WI z2O!6P9QS&Tij~Hq-(PIN`>hn0UqM=GRp(KU)iaC5 z&#(xVp~W)#>>wAM|Liy?8g@8;%Af+RM}Q~?H-MwW;l(xqtxzG)zidy24jK98?eVTB z8b9VKKYwhv!dNUh-PdlD7Q@&9NI3t$mS}%pnZ1$8Yo3o~fM4*Y2zx?AtRQ=UzYlEyTY% zATYUG%e&`6umL-^cDQZD74vKC-|agZqFRTV8J&j`XS;V~70L_2`UmIy<6Z6u{L9)> z6052xzoxmBrgU_|u1n2_oEx@>bzXtfoCnTLQkw8XbwBB`zT*TTj zlKo}zO8~;Y@Lpt{A5^R8619!Za3uv}GG{SpRz)Wz!QLt{)Wk7CQg`X&zbRBPIK0%9 z>E$MW`wmi_W+SgX?aV!IMXov=q9nvV+Ef$c^t+1QUK6ttJZz+XHrD+%5Pp^3fa!FC zqcG2ZYH)@+X>@nTkIlxub5f-1wY3vw*!wktDM{HcgEiPZ0REFoG&Cuy6{^zdQxThu z;L-Yg(3B2@Nzh-0$(HLmJI|tz^#lTy7oT(gX|-wmQO-{Q)9eK(f!+$oH>?(pSj#e~ z@ysWH=}?N}Eb>08!h@k_<=3n`#mSq(lFkT0nV_$N-Ivm)Hc$Ly&oV34j3e1fK_CWt z7CKu678zM8=9ko(?KA4fZ{!qu%sEV0b9a&^%Dpwl*~(>8CfLUHR(LiC@t#7=9-a|G zH$L>=HN74k@p(Nt3Om0a%s4`fD%5$gksr0Xh$WOq8M4j&hpf!!8g9<2`-oQWu z6Vgt03LXe+g;IW~tpEX~y7?~!&CJy%8n6h^KUp7T1Kw`~dX5)J#7>aqZmAagD`h~B z0sFpaw0dm(1oBnDu#7-^-MSZeAiVPc|3^$~EH6c`g4|wzjN^u~BMol^k7BHieQN&K zhL36VteWqj_Av`IQK_n`$8X*QjC71T_1kSkY#%6UU(=T3I-EFrhXbWCKA}6t3C~S( zv`AL}#(R}Lz^Wsq>_Nwo=~)!Kg!pQBCc)+uL+t}MNu9&ZWL%+(1ij8I? z;;15RYytuQyZ@#CGZ1S7U4Il@oBzq%r%$OXBMeIgvSbVWW@2HzJ{VE1UTa zX5+OPDa{PVp4?dpvypDknT|OEeTK7(8ve4BdSBe+sX0Fvv0#_GC19TnJibH=j_-1i zNvs;(e3DqfQu}k$=?yR+_%a$F0k}6f;&1v0XDeJlh9DKhgy3{W07;JgN#z2FX#&=JD{eqpsvaykww#Hg-`} zk+mkCACu-f7%_O`$z|d$qVjror_3#MrLFW{#%t%?_?`6#L607;)2PryDQK#lDjOJ| z@SepiZ`*JO!}?i{R&eoqXZKf>b)2;I>Apnldu@Hwj99p1=;m_ve#BcIyBM7D!piql zgP*0NIGGy5N*G{{RkZAvI6y^|_)Ed@-)8pE^#WH(F}N~Q21 zz?DLO3E@oO8gBbP3K04KtN?{{qMHZ`>yEHTc6G3iJvh*RHx?`d@tTCzgtW)8(bEq= zDdWaQ_C)eTL=u9#Yw4V0K#&SUZ%c|FHqv%Gub}o^_OW~nDS{IXg1rw>x`Z%hGqyHZ z`U9byrzn;qkI^j?^v-V3FB)>SA*c;_ z;WwixkEJk5XD`2phbsvcRb0k_giVwLl0rbh_rT~Fi{PC#eDXG2iLo)zEbrnOU}-Pm zG6-yga(+F6{aAe>8M(oGwcXrnUF?cV2f6xJaV5DIS7Sd_a)h{m_;P`-(Yt(!@;~Ah zp=H1x6*1sZqrYh-riw&>+GDo%2Yva0OvPxHng=+W%1<3pHDJPrOC5Yjh5{OH?m^Jq zgc$FFJj@Au_|6T~CD1;5r}r^}gmP8+O(2}|ALNqd6Q+z!&PoTMZ`6+S;ski5lTyoM zV4|~{%OGWyP^ry(%yoRTBx&`<3#&pOM1rF~rNEc=RgKXR|AlMSibgnIi>i;kY#oy4 zas4nBB>AA1ak}K!*XB=uq~ksW&x@=q4uE&yaQ@Rl>&H4QZp_$!%0msTfNt;4*P93c zhG+Sh82z4QZFFDbRaaCyKC%^9c*sv!IIRk4VsF*FfX@t?+p^-iNdGA#hQkkf{yi2a z{m=MCy!h4U+{QIva%<=T|QI>VbA(&j=F3`^4N0BSAUokE#-~d?I|B zscS14-xWwVRBId66ih$K&BY3g?*^7dsJSvfK`&j}qslg|rZ?SEb-eb1PpmJ#zNt{^!f zb2JU>6mHZ*Y>W!<@Zhp-2vv=%k(CL^>m+@cj_M*?}kbE zD$cU3>;;9+(^<2i&8#MyxL4s@YruQEtQL&;)iCb%4&Re*T%aCaEpKh8|LG8A{$Z!e zG<)L3^&JyzN4+EpGeSfVg?m`iTK4*z=d&vIgP@LOn8BEkR2rvC4P57#!cEt(78RTTXpM>}+A$wMW8EaSXM+Az{D1s}2Kk7bP1H10^IyBx z0d1zqqQ!G>SrVpl@Oj?EnsC!!NN@|*;5@IxL{)C8y0$}Kkqx?7e*uQa$0Pj_+pRwx*{eBi+KY~tvR`wiL#yF8} zXw8_X(L2-K$GZLhu=dtLRljZbsM0A7A}O^cB&Aa+$&I8)DUFo$CN?FV(!CLo4h5uB zLb^dpy1Tp1&HFyj%=@16J9D1z%=yPXBcrqV+}C}@TI*ULW=0WAD@>$kc)l zEd}d#gH6^2%tN}C0jUoLG-&i>ew&sd^%M(_NO)>7nI-tbhNIgNAVZO*WfTdnA*KqVX9ogoaurnwS>cwV$mg)ck+ zV3xJ}1(%o?guXP@EP+x4c*_aVKdC?e5qDH6Nvj46k(Po*D?*X!ezq}8tIf>V(hK0X zhS`zq%l)CAQFPAT`Pre+t{~wxnF&~FhM19nv;HsHARTqtz5XWPCE*WA$50_ggq)Fo zxl00|y|`Lc1(5hqas88A^uM^CilP|6#=7NJHVMg1rNgGQ5XsMFp^Hb z`6A)#%}BZK=2U79UgU8sOOUYCTu$-kMuy@EOKTnrE@4s!rsIk1kBV{{Yo5ZPhH)55 zE0{1)P2@lwgs~7zc70cviVHesz_VfaL67ujE0R4wzsy88e$*=H`Aeg9iR&^8LZQnZ zmr<1Ob*TW@b$kGzMD6_`ltXFn7PZFLZdFuR(AjWNGv)u{F(iLe#ZT8MUdDM6=#A~=!0mwczf=`VG zU}S&%&$7qfhZ`c7O!u9_#DiZ)_$4-wWYo<1;D5}TNK;1s|t+e`mvo~ zJGhEe<^j3CUbd;j0CjOAN^s8Slyw_b@r)?nMAb?AKncO~gutgStzms5^25>9KQ-Etot5i? zm=*k1?6|_pkK?h-Sg&-V+dA{JbWV7kUXxQtT#zFl<7OudrcarCjSGk3+e5MQ)(sLq z{hOT&bDdi@QiFYAb>+0G89vt`R}e|5kq>1hkm!MU!9ptWEi>LdJpGU^h1N%p_I(?2 z)FVe4s@JBl&Cp~;sK#0GD+?X*oYDBML+4vP^R%k!q-Kd10VjaOFT~2+_+hah=&^4Z zkjve*|7{VNS4YptQH!My^r@{(bR>eX=R(u>o&obWIzSx$^D(8eJTT7d4wX;DK4pVW zo##;$f*nT&O{K2G^DXQY8n`0_G$LvVlu6YkUOXa+CGUhv3EUA!tbPTXicdj~qu{3m zBco)jfD9o%_7672~ zp9ASTn@`ydN7ND;wT!c0vR(g$s?=S14wm%|+(@?N@+pdMhJC23^n(~!kUzTI{rosg zda&`3vEFs7ieXEQf{FT&pjU8#&OzKi_X8K{GAb4nm7MfZ2udX*I7uBQw$eaQUfiq8 zGzcGKKD<$VU6uG+`Lq4wHw(<9vQpfl8sa~uj9ru2v=Q=2D;5j_p_$4}#x7IuOD#pj99yz}p>fXlOj{bt@69?zkYd@h zmcki0KO+4x3-$xrzUg);k0*YnZY$%pPO?c^pCrb-uE;T z;aeAR_e`R;l=-ExS&-phbU`v>#Mc$Nl&>i_BdSTep8*kztFw^CFqVX|IS(a@|)K)1Na>cG5)8`>5_(%J?;nE`+y+#PNTP%AE*UHKCr5 z%Hp*y9|TuWS50GZL^opq{P)R22F)&P@NZpzb;`VcpMdeUC5GK7_leUtaZ_#)X?nXh zfC0O~aJ!Q)IZJDaSDsGY)}c&F^Pjx#<###GsNxG-b%F9urd|IcM3IIaqRJaH3r`mA zGaM2zl*V)`-ve*+NRI(ChlJtVDhWueN8tGWb77E`8J_KoD`Ta|4c>_KO4voBb1(Vh zs*Yd6+x7wr8^zP#o8#|h11}k64I`oYHdEv*A`RDt4sXOPNSUbj3H&UX-fxB8wRAUK z6Z>?tQ10)ztF^?;>I!*cnR?7qc5>_<{Gs_S0Tj8|#up8>HCHK>bM-s+R`An@VLBeq zOliCxy73h^C%b=_98cySf*t2_F2T)G+^)Io?~8i>$CP9ab_0Lxl50^uTkGl7WK#9m zgvHq{4r#cxM*kKYgHPI15W!~VrMu?$&l*>BRskuC{yiqtl;d}dsaptyN2FcDZE86D z0I%ew3PZy0TKn$jS*?15E?W-o8`wh#6xo;+lYwUyd(VB|k{HEH*7fS~w&BLf`i#8g|jVJ)rBD@-YJ&OfOmJurXo!teTxJDp@)(@)AP_>v9KpXY3> zj;FUBZgE7JoH!?#oY?e^QT0?xg3IkZZ?&hYW(kQ9-NHIP!Tnm9Lzs}}PWb3;eH|MQ zQ5&mmF_(5a!ox;zw|3XH^m9^ z0~$dTW1k^-$0*|xbc2WDO+zh_)5^=y_&}FZ$gJi%%9K0$;IOE7L_Uf6oVzcZNrLWg z_U(l1ZFR?J#+_GX2}R0cU_hbp&wUm7aUmQqGYjp;MX~^=RZ9IQMUpy{`Z9UkXs4B5 z!8yl0{QO%|+-c*y>5GPI3_h{Tj-scEqKA&7974oUJ$qx#8iZemQgczHzV{{Sp0ZvK zqli-poT}JX?6c2laZqUW=;3Be(21kbUC*6QWBiE>tUw1wOPcDcQIK{5{p+LQq8I+# zNVy}-NIbLz*LESBCf$dyiH5h1LvAco`f~81zXwBIeaXA$E{SFBSLc1ClIL1~gm00# zEcScdqHDyNoR_~=QiJ@lRa;9kvHh@jQI7w}rf#|SPy8dtv(pb#-_XuiunTo{6mK)V zRBp+>K;T{sA!A!rUn^?~iGFL?s_8Wqy{*b8|3FZ}G&*kOkcPSo0Tj#)mtzkOKzA8c zDb2WuezZaKrj+lHg@tG*)0PE>X{75N9^m4Y_%?}00slgNxj=l0_S7$=Iep$2T>)OMefUgz}bke@&NG>wV5YgacegXO=$}qNbJN-fQ4qXOpZ?*ZxYig~F!JM-6@~LdAcLW1Vy8iSjN7GWz>IQ0xD?Bd^+l|u=}!Y*Ih6+JR9CB=9*+I7rNvH6+|--IJwat z4;0>@2%7KUzs5Zit0XSA*2{UvIo~mhZMraRa4le}NS^Mr^&uBNGFo>bYtWp~=uV%U zEZloC?d2&(x+6A2d3JoV)NL>qe)X*nG3%+8L!K+$C7|C*6 zG8B%-OP{Q#Ya6vOksy4dCz+p$T&#STkOHR@+@cnR>J^qNxnL3IL-yVU90;Ib|3MGd zQ5&e`d4sBruwh>HSS(DeoPjiL1G~*w>LGfPAAtXMEm&FWq-IIDF!4ak^-?n&w_{SNCB5LQ8A@IJAVz zMa=PtpDRDZIj|V#bwExG$2oa?Q~9j1W3qVeo5r75^A%NpGMmJGKMDAW>p46$9mtKHDWR(Q4xUz7Wj=P7d8 zTS#YwyLcQ)9ih;F`?^4sx;h2)fi4{bN?Cx9%`vwtYL{;&M1+OW?rqp<|G9toSzJ<= zhC!j%>L(NLVr`=a&`F-EC-{eu_^+*w4UxTc&=Pn1?LXu(PkiolA=GtD%!b`U^DHXR z7`CYDjBwYV;QfFFb&diH_V*p(KN2Q_j&NsZZLq+~0Jt%d#{2 z+3`UCwQI@>hf}3UjoU*}>hRaA%%0;h0o-NuAcrr-YHSVQiG}xgx(UCcV{7)hTR4TitH8kl>kq8+|Da~gmp1vY}7{-MV-Hf3){tli3cnjx;-qXCuW zt8oI`6^5)QyfB|Qd*;W|@uA1z?8&6uS`ClFl*LU2-W|2&?SW1#3ew}IWplqRNLG^x z&pU%Vyx)5_`n{K(2|u4yrGa8<0eP>j;pKcJelR^v-3FRU*nGfuo%ZP&uYCtC!?CI7 zf(gxaR~dJUmg2Wr+VRF4qT;Wb)6WCVF`;)yza&3R)S)q-h#8j<}p0?{6Lo+>WdLjeK^GsmxB)STBRqAmxgvO2jno#`qk)!pt(P zCKWHlGl{s?&V{(_)?!(I7k^%+)_YxAjY0ajX>Ta;0zeoA1r(K*aap$xT~VeMwa85lcRx;! zTP&Ndu-+NCqlI$R6U4>1bmZjj{pxPgGvemiIO!%oTEI(4HaUKD-rulpIq99?=|;Lq zN)?7`cCAvFXg$JnHlHT!>G%6A&4*kz-J~0BiL1!#81L=b;Par9QwB?x3cA|grLzE-k(jF>w-@vdp2jz z&O_JZR(9Agdjk(Ph$1Fd^+~HEL25f|?=7a!*GX{cqQmG6y8pSZZApvk^iT~`(+=FB&M zC4^IiNw3r;K8#8p_QEMxgFjEfFUsS>QMh#aBrrrIUvpBsb)RVCe`mbl5D<-6ntENucd5DHGpl;?fQ#^im;qmSOf2eD35=_2K1(!t#7__Y2~F%&OnHRxg*m;Jg3ut*iCz>nT%QCIAUvYS zn3HDY%)llj6&L&R8`H+hPjYpyB4Xi2_aKtOKjEeRtul4?sWdgd+!qvY-gMI8vYe8- zz91u`qx{RKk<6~4rKcV6MOS$Hr)_3_4YI-QF}mGp$6U(TmI1W~+T8hu^|R-=3xZvb zP2jE-q6=~qu)E2**5nf%yA46ed`w3Jq)-V#OapqFcCwLIX<+f>RX7fLL|)>*y#P8^ zOpxMZA80RtmLfk9p9+6Lt}PdAE0y{PTw4lr-cI(_Vm$%S;nVfpWA*icq#%!+zk{=Z ziER!?vr7bNs=?9TQ0{|nRcAVp3uI62VfLsExpI;GUj5AB80t>b9c(y)(qMt`hrW(# zk7>81yrdQ86G`;N1f`h4p>*YG-RkoBP8l%dsU=hY6FgvhirP51Hc|VOUG#G_;RPK2 zd)Rq{RfL5YoV+s^A)Z(bj=}A2`0B2|L+*k*S*ow#2qfufwNm-|c31Y`s_B}7-}6qF zO`8*2>w0tGd}$6LVXeeyQ-4U=n{wtmoOE6{R`LLRH3I%wzhK*^j$4+Pp2J}3&PNMfu^Ht=D=YDl=T|sca((* z7{(!(Wi3>6H_?-F@s%TCP#L$7HhleA-^+0wDd$7EoLtp&ha&79MpJ(gts5j2liZ-T zAFejf-Bw3iAigoCPKW4>t!l4tCFPfM-#>fLkn0`Wb+{;FpSiBy8RaxS!EKc7KnmxQap7ZG9zc_q6l7sg&081-@dp&g$g{DybW0)LjS zRrM#2K3F=`F^@F$H*HOYhGS$Cj-rdZGYZwY5yWzolLj$l_w+R!u0A;g{RLs~@wHUr~(xVZ&ukx|}nkkyIyndcUQRbqF#%a^!NO@|##OJPLgm zK%rd?r4G}b;PE{-r2MXhk(c;2#ng~%@+||Af}(L!p0S7O1~UslsBE=r9C-?~oRUp; zm^2ew5_-{=NtA68b8m-@!A{^MgDF*bocWxC2(4I*_&4n|DVXXIV3iXD&g7=p;p;iT zHyXk(HA!Uz0RISqNkMsGzg%ipuXlf_r8Rz_U>71);@tfYzk^<#E1*UTh{lbQ2x-=$ zX`rM@aTg&S?TZ^I<|=wufu*OXw~nV2hsP`I2_GC#{1OGz;ZzTNRMOn0*42E4K}v=na-9 zd>R>MIVOYCIm}(_FU=`rJSV!}lrHcDdreW{Oh;!!R(j&?HpjMxZo}6?YV7b&QXoe(6Z|{lfv`?5hJoefx_;uqU25vKoXMM{e@$YIw?L zB2${c?tWFk19mn&uFc$6$9c0%`7bYsX83&(q}{Qz&ZK#{cyj;i=>AGe7Tk5uT&t zn&5^eQ_Zw&vEOfdnmlwk04Gx;0HdshV7y(7VK+m+c%|K*8)S?%yps2#RZVxmJuA=M zjlR3;G*j_gZg4CDYq2Jybb5F!kXk$9hneo<=X=RGuhEFp+g|g0Mr+x?f%<%(+2oT?nSYTn6)Bt_P8mf%^qMLfz3#n_I|QK17)m5C)`}yK>ESfI94=8&nY^K~HGF zb|}Cz41i!`olW1<2z4-6)W3}}nwdaGv_jIM?Nf!Ze32lY=LBK)UPXqJ0Ss2&Z7d8b z825qqinyK&4RD!3JZ2mEfL)1wH>E5MiAwD~bViOok>eJ7blg)$Q)X<_@EU6J{Dx^H zMjom=+h0??#UWq$+B8=`YS_)P)!c1dDmG|do$gf(beYLZ!Y@~)c^gjGj{agRMqdHU zI!A!gVRvhv2A&p+;XAL*_?|4}^Vc}es0?*&f}J;M->V_~!SQ^=?X#9cee$osP%1X! zudq6-4DAg$B0_R&Hd3_Pr7FaJ_vDBu;b%|qZytYQgb2|`<=B7yzE~mPvH4=j&Z0{$ zFz>w%&3OroBXAhODE&J;>y#GML28^@Nj1=T;=`O3kc8!E8Cg2X`jcnmXx?b+^OGu> zx<%ut3?VQ!5tDw0t75U;Wd1~j%%VFCtM%&R2GLf#Ure?ch_s-3kNd8aQ5Xti*!3W! zPp<8^$-0>H$Pvpux^bz;87(mtVQCcuJ>C--m<*WT^kt*JKeclewfJAOa#uko=61;b zXl|yOEHTA2k-|7`U{K4*C*#WJkzGwM%RTaMC;D^lOix7H#nA|hBIITRRQDun0!)mF zYu@Lo+??fVEuMNc`CN=_ecE6~Uw(qtgO%9)35b)IyZ03d(j%xeJ-7$B;Ij&vM=;&^ zPZ81!q0SjXqk)h=D5aTWw!H1|C@@>8fAd-S`LC<BC$f`R(`NF0tyDa8wKu$6u29~ zJ9`G&V_`IZPm7`gN(7GHD^eK59R>8yKJ>UqxZ~S{tfl|Ni|>s(Bbv0S-XpnQ8^aac z8{&`dQ5MG^3AAuXOxeHOB=y*fyyH!$@O1b!MEBO3)v%$oghcD_C64c*=gHR5TX)%8Yc6=zi`>72kxbCIP8 zvj>teA)<&}J^1_>LAeM@Pv{pHAW8mDY&X*EmhwdJcNNe-?+(T?iwL41W}=(f2{~JQ zjXw-B?)DBlcdhIg(g{hMT>Pvy^$3xA)8L3*Fz%AV@tk)=?JYN!U3r2;6B|cfS&V7d zdZMmRWy5cXAJdKM+gqAg4j6B!8fWSRIzY#Hgc+N3bJmS*!|G>+{2|}Pk-ejU0!V%{ zh+7CZTW-PPS=8UPof+iwMGortUZv*1N2&gIf*$()A(8dfn#(y_WB%;}1EQ2pW$MK? zb2TRx^))4Zlxvq6gkxctV>Rr!I;X=S&#N~h$a+sw*u|L4Wb(D7M=u+L-qq^e#bxzH zJFFU`i#xxVCBmDb>Y%CDDImduG831GJkH-YRw}7=j3-E6jqBr*CPuJv&jPXNe_|W+ zf4=>7uYp=;!=8qYf5TPkzuK}lQHaIE!Cv5flhHkAB|W2KZ5o_>5SN{YKNOH6ic))( zH8C{?Ie75SrSRq2uG6z2lg;Ink1<_xeoRelAJ$?_f{{#_g$2nLY?KI*NyPpO+V8J9wuYUkl7D-x9RPq`u$<=aEt|gfWEf_J$@#$@b^MV`VLx@* z&*^dQc;|AI%&gO-fS5;VDNf%T*VJQoukEpoo{CuT<*G$YAtN7>n_Nth{$)!_eSqb!oZ!O%n)3`NcW9y`hN!+37Xy$8KMsDG&C`O2)17z#n}3v%5@kN0gwA zF;s2D*X@{BlaV1uBG?!foxSzSGsc4Tsfb(vge1+;qAtv2`*Dni)MxAMAc<8=^n{<& z1jUQ>2nAS(JZY^~-QvV({vJi$?X8L$drw|>Ys5}^lU_(=pQymfR^W2+h1u-|->j!6 z5qr}%x1yz0uTI^xWnQH{;VDhigUIJPfpfPxUGywDNT`>9UdH=HOXdTyFgAW(7C#M+%U-8VK>uH6NzWdEBMPC9Xzla8FCTBg=3CkTD0TmD$JZQ9 zO8Y8?+R_;kN2YEcB5#^o9RfuzOE3~Wt2+H~jh#ZU9iE}y_?Xgw{8jS+N0fzw!5uL(~F!<%btYW5&+hN4 zkCtGgWu+nSosmA=s*p@*18sKkgid)MF}P-K$EH6~blhHK5g7!s$vE$xr8;vqmd~vX zv1&gYXt?|!wG3arxf*C=mfejS+sWc6Zaq0`^z}BryJ{zk?CqX9&j{7pGOP{2Kq^p;VY}bdyIM zb@lVCzvCBn?ptYrCD}82mh@0|QCF|OpYB*EMu%f+E6;3}4leLGWG26aB`8rfRPWky zEQD8VWFwszwEYUrnIGw3d$BmeTFknCBFnB&(T?nnsUB#yFkg_x$tnOgP8#yCOPqkd zgN*P|(7)Ofk(Xf7wF?BQSi26F7v)>;PH8J|PXe`-{Fr)MMh9-0{xx{1eQ5uj_0;FX zy{wlMmt#2zWDpT#69)!P85B0Vmvw3ja;O1`-O3ZCiT^<~DF;}c zlC8}K6&7k^r&Xr=31?NNVl({cAlLztgeBk-(}RPZ)!V@^WCrQs$h9=_yI} zL$>5GZ%=|w12?n68n3QhqEENM3ZQ?dU7HnJDpolFKf@nt9H-_2j-&8{KmJ5Uo-gKOqbMidc*^8fVY z_#Nckja{2x|Ap}J^2BRsZJVAt!?P~2Z*vpUPQk)8q@HyoOS9&2jJw`gU7u7ql4!2Q z+~aAV(Bl|Qg?AhG%^<5R$R+%+oNRbB!}F2BK@Aga<*%`=YCbbt&qV$_!-|i$_*03E znlQ~C$D^pag=QKfSunCsl(LT^)M0MbM+Eh=4T=GYu;(nJrKC&MV5QS+Zo;o{&uvKY zsBGj>+pd~rpPh?Ao3U3&m;32jj{2_3TF~%E&hskI1VG=WHtN1S?G2pI&u1GSFjmmvg zY(%Z6*FrN#!ShG}P3l-|>jvBIe9@271QR+HZ|dc?*EpiY*PDL5fyzb{T%@|ZYyiJ_ z)?ihsb9*904YR2rXlZo4^fAw4=UKrEWpmDYZBz@_`aMoy1;!moqiwHPbf%@)OQZeY z0dDLT{HNy~^|D|lj7X)5{%f-0gP-b?rknbt#Bwl@w&g zQYh10D!$s1M&hQd7{di8(F%GJeUiaV$@Vvxw6nAJlHNR?aT|sHlI62`RFU$~<|jIx z7*lI*d$m{ghdskSmxGGXha_pn+H~n6$0=rdv&#JJCR(&UCxc)_bA2|^syOy;cz2^; zXWzLVrH^R?w>|g6rg| zt9A_+5!?RnciltGB?i|k^yWL;9gxT=e%RbA#Y6(Y@n-Vy zp_63DP^#FWtfDi4X#_ar7=4~O&*ZWbiUwEIMvP=0iO&1ORd&9+rR zrPF;PK=uesi`bukKaFX|M@m|ZAwZ~m4zKLA^#*s6A>PH~r+?FJ%Z0I(9_w8QTj#mg z>6MA%W~w);P(daUEz#jYI($B!UGZad+G&^SbVOSDPF3$5`-)!5*;@$3C3_q)mK#Xr z5Jsh3w{YSQJLpxim*%d=_Qjg@1Ci-6&e^NYF+zm?b|dPqFEj)MTn2mSmCjx6?eptE zxR5bYq9Jruhql~+^Q@R!Okt?sKH^xW&)vv6+;oE?<*X4k{Ay_!-Y<`PGJf|q0HQzp zz6@IrzPljfcQceWV3fp`>-^Q&R_LrXRL!XvSpinSj%T>gi&i+XUAO|j9?e=ciwj>i z*7DCaVXa#H&lnx~v;R}eh<82N7PrGz zO6?GnLU+O7$>ydhJu8*VAe+ba57!)Q1=yum`ULcRG`DtU@UOpu=arwJ)*mO0?40m{ z>+_dtd~eE(ct;t^gthrM%3N#V%kwioK7FTcygHBj!?+vxbdY3&dbPVVl=aofr`LT$ zi4?QArEl*oJ%My#$pNl}1uemQ3i)rV7YU@2dt<@44-^Mq@7D=PSfjmJ@7o#aM1j|Y zfciYp=F|j$L^z4XsU*@VK_@Zd#YhZd%icK{{&zbIG%1Y6>K-9myio`=#tpS#W8OUX zV)B*X7c@Zc{Z%u*0rOK0uav)*&cFkqt4t=C=u(S$nnC2-IFAMPxlLBOzQ5n_fJ%~w zKY!b}Oo;rUe7RUKiV1_al&E!3Qrh-aRdak56lBrU3)sS@$^tX(Vh(%zBp2b=0fuDmL~{XtP*;}-YtF=52vUV zz58Q&y*;3ybbw1n{rM|Kqb6TLhSR`pGaY5ERu*&RZ(%T8UiBu?Dh#83wI6!XC8WVh z&J<`<VC$1gfcE zL(wb5GQ+291LZz#vFMhN{TKChr;mF%QXs>PAy;K0VCIhc%32@}Z^7-v;(KxWXxsMA^U+-6DpcU|OT(uX)ZB?_a-D&H%L`?I zanlF}Z7CLJwVyX5PvXKVe)@4wmU)whD?^K#A~!v4{FlrZOKRq7{G0JrbfYm}+zWbq z^Wp;MJ};^%3RIlQ3=WYIXyXLMq7I6DC%qwJAv%m^K$2sFLI`6_9SQT9zqZ5#Av5*F zaAF7Te{*7cDsS{^sEhILO9(9SkENd}d<5r{ohz>S|AJ#eVW+9dgpZYBs$6Q>eKxMj z^~2Pyru1Svlso`N>`<`mSe{!*FqY#bagCTVd*Ym;8aj8qWTGDO$+3?tLPElj+YyXw z9#~Ko;+v+e^cQ;YEj4t*s;&yjy7q=UJ%4eLdR>NW{1U;v*A9A3#OuUduysvs(&z!a z;II$E!n2@kN;kRovib1qb91ISuJ0xa=07o^Q`S2>OW2><)YPuE=^#hgV?vV|ySw)t zZ{@Duf7f0LRBo@|b3Z5_BvXCJZ;ynqaRtgamV zuP#*g-Z%@}_eIE4RoD|$ky&{p)Yr`;EhBv{;vv&}H+ZjpJ!m}6$6MULA+;i+D|YA+ zja(RkP)0zh&k)unbrth>x2FP)XN67kqE~$#PII?KI=Kt^c3>1&uck_4^M}YDlsgc1 zvObI>FX|K0%y=0|r0};Zp|Ex|O~kP5g`#4)SXV_N29!nIVm0@0Y$s1|D8gHJgrm7| zSz-K1*Cp}etQF6q1L4w0tU%|eRH2wmHTC#x%b4sfH&b=wT9GuQsEQ2_AHV(Bw~fke zOmPVHPoO+UR3J=Uf$lkM-*^{n^h+sDn(;lnIkN%224%ls>sGQYF`0wooFwV-71A-} z=`v^lYwHxiEk3zIH)w4_7<~TNRgyWn(pgS%Y|;?aj)a3I7dxA-{{^uQ0pw&8{mvix1}`X;gbE3;D%`GzRDG^f{kH zZ_Vb|m^aX?!~?Z7`F6_ozl9@Q`dVcKt_FR|_r(Jt@$D3zeD!7YNW%0Y8h#W9HuOT- z2_Ht+p7`fdy>W2vS3(6W-DQRjE4I78i|It+mu>W)hO}w=Ygbo^z+4zg{l5u#h97Vw7T)!o zB;8|yr((h543ju7KEDwG6ka!!yd}nCA^*hWITb;=kV;(vvL`{hV<85*%JV}t3zcCC zlF2`iL#;q#$IV@+aaBlg{ism+6VZ`E+MEP}CR#Z@b@O4Om>K|(#HIEUIs=4z^Fkve zIuN?KKHI%+yc3E;k-PNjzN$a|DT3z;E z+5_>Dts{7sMrjzAVm+rO$8exigL}Jh)H_d$G`5Phjs)emzS2BfN>`VX<*$k-1|x1x z6W6=K5}5IY?KlY+@fdmS@MaXV z(1hHm4zigrCJBRu#ENfm1nKI&!(mXC*Bg>j&l+;A^dKLlJj>#1vE|U{`!3a=8sOBr z29w1#)}k9SrHpv@s#WHFt(uXTQ)wW6SGK)8`2bG{1Q!e0SrO<0*s!QzO5HJzAKmwg^)`k&g^DWC|* znArG??RoO7vhpnXYO|o_{9+9cDpxK^L6I-vICArSF(ccuZ$~TLU0}07K9DcYsU#`3 z@v;sw$cXgAhGkDP4qfS#zHqT_RhgLCoMy{W>c0-j3M??L7}PDu6-^FX6aZKkQ!fPg ztoSC7M##WE?(KH8H@Q-Z%5As~SKEihJpSo;nqqSN^9GEZui_7}x1Lr};ZGp;)v1$1 zBpI?s5Q0*WLa^;jin#~8SO33F_~=CX(nL{hOD5jOS6+44Hia+~4SNX+sxIUg=HjI! zPjSNSKU+X}f^MRoy<(z}I3?4yyD(HzYu}1?ldLjV^t5A}{?yZs^E$&;7nJamA?ayO1|q_of<2VLk8QpyY-Qz zm+KG@zI1{|{v>NzjLl^O+(nYP_DSL3oC;G?Qgll+Lm6Qob6kFxvCXi_mXz_Zm9pFJ zc=mR5Qfe3uqqRkijix5V(iZFDGYaKB8@}*>SmLaXMMPV2kMO`^lJmdN@8SNvyTi8W zY6a@r9dnBc*1K~YeVv&Qylz6P^of2#D=#lMMw`1c3MPl4u{CNRZr7&Sp+B>t-r}$S zd|R8HKv6*ZU|B z$xU(E%n|*`IEU1G|H5`7fK`i-eo{{OH%a9O;2b1OKc!Y+XGrvxPXXx>U|WG@c=lSV z_uT9OekEVklBDczD2*=cBMT)U4Q|ViaXt2G>wehpm^wt>lH4KOdz)RFt}*FJ^&GYU zG=+!v?^yd73?dhfP)_y6+EegbmSCB6M!Toqnx7iLXYJs1WuB8jz;)ggLQmP z1d(&NZ%d4x@gzGYF{w}N`M2R1(@&}ia(+2}z=LHic|#6${N=@8Ln>L`tEka2?zr?p zqL=Lf?CMtAGS$MRD5?GG3BJq;E4$sx8H+9%R>;v^1zOxMk2|wCm<2Z`EULP?jah~tC|;xw!k@@6|@ zK!e4~wWf4rks#PU*0e!DUP#lMK4ap+*?FxvjN{L8oab1db@qfL@%TotKBi}A)6!pF zVg~+3vFJHX6dUi~A{W#8seses$#}=Vl00%B`Eug>#Q+ljbR2n*gYmdQZ|kEB%gl?b z7}FoU?L(K8Ur!vYxoT_`bgC?}3fTNEH_LR#-d0i}CAExfCnrtheiZMeO7-*X+GW__ zsd6w|Bn0gM9m^#aXa~TyBkjN2fqUajRPy+G+>jQvS(UP}(l3>I@LqTDnf4Lwr zAJKDhYP08Td$hZ)eA%QmGd9B`TrTV`?5h7uQA?}AP2;4vaVBkdp#JidtUvR$yp8Tb zjPO|IUxyjSw?bY4-H~V_Gk41h=U(F14Q0Z{lOnyze3%?fr3BMD({Hrj1fbj0;uK=& z*RFS`EM%d>2j*_{)MF_KK51G{M3iHETs*#wiBR#570RfhxZUTpsb8WISe*B-Ua3nT zX@|{s#ex60R&u7u(x#w2Q&6qc$xPUJcUOgvhE`mQ$UJ*wZ_i8Sr4r@K5c*da8))y7 z<^oMZO&2HV!`;~2P&8tL!Z^ql1E8h>f@+nJr{$Z z#$-7T{W?2zKgUuwdS<93R(3trcc{XA(t~c^;L-GK>}7C=__jTW^~6syx7uJ?y5O9D zA@xPmJL39%Om4x53du|57#2>>Y^;orO;Z8N<29q@P^2_-R$=9OX{yMir;v(ps+Y<( zG_5L>W5L~>iqh~*oN?A?^1@k5Z}Bpyz?&ja%W}LgT@>$>AG?j}yyFYR`-O8CRh`{t`7$@_T=&sJTJPq!OyXB}xPttNdN z8^sUnROAzCuNr?l1Eqf+p1R8Ryz{SY;S0e+w#>4wj(qg+niBYtJ8pH<=+L}X-q&^_BZvZM5oN%e#So#coPjmkyN?{^~bj=KVprZlA; z1A}ssgqs2M{h_l)$vE@?-_f}-^S$*qZ}LiRhXt`R7rQAizts9XVD|jtymylD{y_IK zhmsLj#Ln~KuQyFKtL5fJg|BSA9(Z{jnqb3f52n+9lQp@sQhV(>0j|URLf|HrroEsAHGS&t6mvHaG*X?D-XPvV9F_G_| zdL9Vc;$`XM;BviuA+yL8a3Otj6k3&rISd;O{k`!wAVAL_L-R?|k- zE*~ElYXiZA(Eh2bfCu3TrhV3Dk zS48NU-p?Lf*PWP93SGQM`TX+Iotv#WMwfU=Q^GsfPJs#cUr_-*XmPPXM4%BIP53{6 zy4DN0a{kV!g86S^RGzEl~T;d{Nx45YnV9rYm z9Z)r0gD=U{pKrR&pm=5GsVY1xP&b2$&wBQgY(8Des?ztdcpl!p`YTueSGIVyl5~XI z;wkGJJ#Cwc6?76vx>qabPCkW+obOzbLJ#SB%e za?{Q2+B5sn7d^_{7g^1>51{=+tmpa3l?{c*Uu}G+XYVsc<^RYSrNr}1i~<((at{?( z1;@G0+uk6Gf}oT)!PKUO=1>%JJH!P;1tT>9l%2^x^|muG*Y>d|Qu_7G@h1J_0&xs} z=}`Ij2^u@;FdF8$RHNjOK>0lu)fmBTKXy74CR~jRPTieW6>IVUif;UpLskPU%f&|m z2R?@$1^R!P8PQU!C8QlQvl99>P#`3I!QG;x0S4+FpJL^^1Ea|1yS_-x9_fHfd*}`? z=wDCq_M)<4v1PV+(5|Oy%Xfj20^h2}HvecT^Nu z_stVydlV!Q6V;iPQ!30y87Hd)bQ7gB$*+5owD8Z3QSwT$7-O_RKrBB%z)Zy87aaT7 z-A;-8?pU{Ot=Z?l`n+1Hyj-!;MULL;y4|`Lw_o+8Q+M3W*f&kx?o7}>`q?d5Ug7k8 z>PbXZ#nnK=Tn9X|F|V@6(xRl5s7g<6Iv>SuG_cVp1WP>d@3uV-ODBU#ikbRILvKEYGXsFDl z;1@0Pe?Ui5aS6JvxVf@=MB__-OK&H6MSP5-LHdoIdwrAyf4=LFyf;J#yDJ!J zJFrz(1cqmkzq`h+Dd3zc+KO>6Rpm z+yoZxBe0tS*{A*}+uG&AZ_cZ{I-Z}21XR&95;xT!BI#LCHJu#Q+3krVI?$DckhHuu ztTYf<`)!<~KGs2}r@oT+w z%VDiF|99jOG&NkiuN05G^_X+G6>qz*4Uf6WbD9O`+eHR=E#kWmf+67P1{jYHF@zCM zNQrw9kA8aq2}m>#6=vso2#L6r%4K1RDO(aMGoh9{kc;KV>HNQFd&{6WyKP$-cMT3f z0>J|WcS*3|9tiI4?wVl1-5nYyxJ!b&G!ndVclY~n_u03;s&7}F_xw0Npt`!7;#oH5 zm}88!mPF!S_}^>?qYD51pol}Jt%2yhz!>WMW}(wn6YbA-3@8||au~k`Ls!HSiJjR7 z=-k~I`I)z~J6kG*hy@9sN4z`8E;X4^d|{4AvAtiC<}O@{*(x3APMd4-fs@hr${m-* z2ud8D4(Jr_dD8ehn5Ta}%b}cdq$&4m(RRhRH^BV!Ad`s<3Ht;(_FE2HQ77vvxY480 z$}#aJVxJ0vQXq=u+>nQNmxdCkuXo#6CeRMb&7~L`^4=%xEL?_FsO*{Zb>~kbwmSP; zu^KpjK;%+=iSLd`&O;E;^>NmEDJ;a#i`P`v_D^#%7TVP|zW3qNNzYN84_VOHLvZRb zP0F4hvSn#WWmml0Bg@d!HW!m|4|k0G-6iMWW-sy%$CW*vm!STVq7oPdZr=xRUE(Us z*?QT5lAcy!!&JKL;)&D{3w#YU5MV}5!5mSK2~fU6T&F$u6E+GF-{T0OrZ8KF=>y|} z;FU$d;k;M7yQF_GkF|C(h@n4Yo2M{V4w)UZ*mZyUT%R2^q;30 zOd6vbDqDA&Gym4L>e-m}+s}nJU-3BfzK1D(yzL`}5unfAlmkLGTctmO>2&PfdwA)I zSU-I5PZbRtFUg$*GxyInc9L52C95Pw=%Pv)&Lrqs#S+?MzKK8Xiu@+{hv~*YhJd38 z-zPRLi3?le9p>gxkAZ(S78p?_a_4b>l5|<;DvAuuxm~)d;x%Oz&w?3SaeA;s! z+v|s%k7t!A%*4JcS1ImX(?>GPbmi!{YG$u^_C0S!w7<}KdCxN(9pZN(CrgR+Q>7I6 zcW#YUt(fFZyPEfXewaxtsgaAm_SJz+u9qjhC%UaVckzu&45yE%EIBp`B>1H4?Ay>^ zPbdVX#_Sp97FSYFRT=_7#)?zs;OFVHT8G_7&$=75wITkwh>xTAr_QHseBSrpdEJey zxC3N>yB|v~CY05aaNYR~9r71!qY>MhE66)<`)T0Kdx2yqIBHqawY>~`riLSwjHG~* zr1&-zM!duye#{&y%$y2-a>81TG}DQLRvt~>o=DQu@I3G+qF4bzBUd{GDxn7Cy5C8s zM4aJFp0Ksb``y0Sa3>umVV4QPlWlYw-v#Z11OM~tdqXu`T6iHP^y+~JI}h=$hq&j0D?G>K3Z)8?(wzUO?DQk)AToy4c-b9!??f+Qqoh9{3d`dkLLRoFT{gCMA zw1MG$x=vmu(D`)Vn%%pIp=+FZ5P|b&olX(eRN;3Lsn;(f^$@n^%}21qN@~Bwg#)z0 z((aa8`srZRY7W^4--J9l9oMyoGt)VI?dv9J({EAKDpM#4$;}@Nry_Zs%L_sVj`cY) z7#;{`-I~rGG5j>^iBP49D{5t76#AL6#juk!Kk~foQ+RG5YY$p05Is}AjJap%gsJ+w zt3@uPuL{|F$!tbqPh*%Kk2`ts5Oi(8q`ArjF6PK$D=fdogAWJF;i=Pd=d1u?d4?7o z6TC(-J8!g*KPd9+-W<{txW5%E13opuLW>~=Lx_lj)AOuax(%9kcgpy`2x}pK&lCQN zF6peegd-~dNcoX|{eoiOiRyDK7Zq+IyXM#6FTCvxw`#c%Omtd@?=!-B?3DdIlu7W1baw`U2~YbJ-S68!EyAvG@N58TkYMhfrF(8jreoy>9S zJgL_C8)v*Tz>1j{@kIFf6r1t(_NN`BY_(I)#^NS&JS!kNqhwQjqmv);zUE^ zaOp;f*>Lj6?>XTop$~cjiwrMB;tnl?5yURbjpO|ek{@dKO*4s28$Rd#NW@BW=Ls?X%~dD8)uZw`;K4Z@Xe2e~_^nFq(et0kGbuhcW_=A*yf zEIwp)McY27*F4SX%;~GUM?)#F4h@D?h~SzC5zssgpB?YlPEP8m$8>=i>vUF*6l`lj zCfiBl72UMaoX=0bH!Jn#M@Sl61X&!2!#jkFLb@(D#C0y{-&~AL0M72#ZvKVej`!)o z&0wa1Ed036k!BH3)0wZd;*aj+imjdXwxvUj&Wd*>n2#`I@ zE^d)k?{~1aGM_S34Vi<4;hgw8lN&PgVRmL6OQTlMbQ!`aB!lyu(5ae>a}D`#SD@Pe z)Lof1wY+_|@PlmI#ngO&9Pn@|l+L2MOrp zhM~*ADzKn0iNNXM3bn9q=F%y6KONW*O18RI9EkdZ!kEOM8}WfOCGZc@RDd_boa zwsiT*N)QS8Lix{|2lt5#%?zIrv}v{bgy@syM%!tYoAC_Q0H+lpSay0skw>2o2-&*J zOFx7=f1&EYi4;;D5uB>3AdII;vbNn%7UaZ}r2`l-><>T6sj9nG9~H9&gkDU~2~+WX z!2ZyAK^Z~OF6=u`6!q;3n)*--D4%Oso}?)4wHXQpu4yeXv%|5VenVVE5TRch=43k|yhVU_+4G9HrV6^^Pb zs5maVV>~@hi#Aj@GwA~|a{5b`b5Z-UXw&|2{a9X#cPVz3Au%;?7-E*tePt?-qf&ki z;7hTpwptw!#)@wu=KKSGzp#J2hzlJKrmAXKvwK;oIG3%@cKy4F?YHajy(C1}QbpgN zO%@C^)#8ovQYZ{{0hB0C#%1h9*0Yd1Ki?YFm)7!RU-{rV^lniRlT^gS%g6#0zWco$ zZ6cq8eubQ1n9LD7_THymvqmcA6p<_}pHouesEOH5Y`&>g)yt#801?6%C> zrFD@&7d%4SV)0+qWU*{skNl$WLQ!e0aRYPv4vA8r&cX{h3Gv`)WjS`Sm;l1C=b^T6v|%{p5T30=lM zeY~6o6NquQd)|vW%THrcbD<`CV4IirO>9ab&CM!v&{O8E#|7uChof$DAh=WRTBq&+ z3me7ss*kJ~Ucd!FB&*}6tN^F-PEyjzseo2GU#I)cnuT@b&*jhlv|c{|wxm8LgD!>{ zpxUI9fo&3!{-7xxuhi!MN5aX#J0c6{$m!Lr3JxV7-mQT8A8Y8Wrav!E`fSK<+)a{a z%}4oF9n=+UcvXgc_+?Nk3#*{#v-)`?RomjKiha-@M9pq>dgnF{Hg!L&7j(ZK^?~>! zX1IH`8YOX*gnmU6SiY#rOga){1E6k}KBndD3%tu>c3%2Gu7eA07r1G2h|vh(4=s6> z$s(W>=w;N>f?E;z?C18qq@93!;148U?i3EKZF<91w!dj5oMQ1mfLq;c@+{alIocP3 zJQB$gaFi-+HA^cT^1eZ5@kDI_PQ=1{8TG*|D zG1E)K*Qo?}kNVQd(cROgG@^!u%^wZ!dq}(-PMj)+1SR?Jx|G1V2G=EUBBPnwh5H>2 z{S23A5hu|V)qNkjz#1r0?LY_e;Mt>J=9jy0Gh9z3xxn!{tYa>t*9&pX-c4#8Ai^q~ zg&Dlht(xqQga_ac1QotYs~efaH^9<%!McakQW zTxP_V!ZY@y;f*KzZ||tD_|t7|#cpr7eE9b%PVN8|X$mHa^((r7;G733w7k+SywKK+SCa7ixOsX-TLZ>z@X^s!ENLNeM`fzOJ&)BWT{qo;qI znz0*Q&59V)qt5{egAT~faEn>EcI>Y7eY|`|M{aL>>Z0*Z`4i~)211`Jrc4LaXGE$Z zzoqKr((J}{RgYJG*4S>`V7;JOmEPnRR-?(m@lqotB{-`R`%d*21RJTE7l(~zcnF!T zYHuF~b#C>Xf>$aH>cBt8dC_N*^8KXQ1LJ9wrr$<0fbD)Di0}r0ux#!cmjLoWci51} z60)cFfCedv$O9n*`-&OU+j(DOC{tH_#g9#~0B2yZR9X@~=m^6IBpxpekBI+E6%z~4 z26UGA+-GD&g+GIc3VjfJLgD9O1ZT{MjzTS+!f0zz!Xmm0yHvf93pohA(s$6-CED@l z3! z3%WmNjg%bZwSVn&7@Jg0Ey};r)6s7yQQXSZV3=WcTq8Z*w#6~s!Rd0;{PUSRTVl@1 z?H$`h%}_1;n3#$PF$b{?wl2sph9`CMnTdQADpqR{2qitDo^)2 z6bM%o(&6Iy&BkkzuJ16*HSx9y1M;=lF;uc$+6%3bZ)$`{j{yx|CTM!#EsPZj@h+rAIan*g6dsb}W zxCI9GK#y?v!`A&duifwI=;x2r4|K~Xs~%u@q+^+J*MKF9qcyXfy@K(gX}@AK7T3pf zZ?OO@vHE771mzJ>|FK3byb8VV;8vid{ev-P~EE0*pQU;t>M|=1z0yZ zMwcpWIR*xKf!ybB8J>ex5V9eP%VZ>A0X%(5p&ZWxA(f|!*LckRhGTTIUiGmg(39Wa z0yCO|1jSyA79n$};Y93e%*Q^2%Cfbbe$*soQaPYB{4dg%c|w&Mp>oU@)AzJjf^Q{- z$Q-Ax@o~lBt=X}V@?GqpY)C~RByX|ra~6dwpkcv#JM1<-{b9dBpZ&9^Ppq9}_`^;M zk}8W=01CHsYh=(E2!192OEde~F;ArBb%NzjOZ}{wS`(PDzI*e#mTt)J02v6kcjGz^=d2I1lT5WKS`BMupH;VqZPVxeIq2#XYR0zkQAf~UeyD!14YKgQ*5+G6n`VId#4 zsDwp&mqh#CqD$f~cplwSzKPsRKr{8ZBXcj^@8>|b*88E;`7o8@y1@z{9iv(GW2q9U zahaR^4RT?HK`ym?$0;9%y=-Yqzulc(pSx!zIba2-WwjOKLg-nNJ|VnAiKr0a3jj$6 zW)$IU_QYl|NQP}DSgXz>WUVYs26aA}-Gr`PVg^@N*}04H5*Rzmw6aH~g>PV3Dou)X z0Ec%S9>@tGkRb|Nt9xOUfsVUO%$W1cwrs_RRxh*}({qHedb(nu<*Vll|Aqb4`XAm3 z->(Y({W}|-6@XQw2$#5#T(3W7oUhwZr@}Uv4rE7T=>U7AEjT{4BlD1SU$V26eRdjk zeNUO@`)^4lw*3dmzo}6**ZUs36NYdhJ$BpU`uP-p=^h}kII zEZE`RImUU)@sTHDx6DuCX+>Re&7}~}Jv7)O3KF1si&I?VIist>?mzrVN)GP z@}-U%)`y(|d4Ai+&Hp>V3TZ)m*>^6|a`$rrL4tnw^3n|@#A+=381XB9-=w!Q6`nA3 z#v?j(bneQxQtr>lL7NH@j`;wM&^)Q*i3i_T(Ipl@8=O(3=J7FF_W_od7cs*IGC1GJ zPOgy7f4~N4McwYY;$13Qb1}6CDUW~lW^UIlE{ulO6|%Iz0m1_9-3+#+XB#;EV}Ath zjqK`rFgH4{Te)|mN6*AliAQPYGQAX`g4P7xD^8+MRo*jVLSuBWMX$pz!C5&ld@rW4 z%sHn4Qt3k>)Qk67V|}hCn7Q7C^yO`ecn(gtJeuH^Xx_WN&+<{9ct6pSF~Rdpp(WUu z@Iji>yc5(w3*gi&`fm9OFPOidPE}IQ+h%l5mP(N1Q?1edSf@q{lgyl0hn*T%*i@SU zOS%DX^w}F&(wzTrNnid9;Wn^SKLmj6&lhh$HYH-r)5`}?qmgt{~Ss3aM6QVHA0mZQ4V1#B_Iu$-wG0Tc6oI7z;o>dddbFOQh z^$Vhyhr+qxy#YxnbFkz8NS*xV|0I&Qzxj_d&iGdK;GsOWzT_ zCOwD6kz9zO8P-XfAMsK=k8hN?j4ZqpGj?KMHO)!G0Y$NZN!-8W5c$3!_VD)ya;1Xn;;UhrMG(JW5V)X6Kj_t6UUWMl^tG3Na>7Ynh}FnTVJjvrvhrN zPUqv%@9#^!X8R7U%Bci?>_MNq9cus591>N*|um4_mZw5ecnZ)yoey^Hdf8RT8u%F`gn@EQ&v0sl0Aj-^U7XL0rV zFE%M59EM>C+b4x#wFZ5L|2p7VL`)@<9M$w|ZX9L%7A31X~wYX4+HkR ztc4Ob6CAaMp+s0mwsfn;q{!#H(t9OeXXM6@4K1h>Tm|V`h!gWhj{@5^#|WmQfj=pQ z_Yznpv*6sP7?m?5p|irBbZU74_20VwpA@rj?rBZ;K-LZ!sp|IVA6Fu^S!VaQdZ`gI z0L{Z?-42)QhAVC!TZupQ3Fmw6_}$vt|8a=?+9ccsHh(UV2ec>&bwK-_yo%LSqOijy zM0YQx%RkyLwPSyCU{S1}G#`|LU>MW?P`Zc0}8>%KE?y|opv7D|2L4{kR z{p&P&XenEI(@$)A7a=U2))o)Xy%(LVU3p#<8yw%HxY&c4yfZjx{U$!z&ggH;2-Af# zDhy~H?ZySM+QLjY7`YNX>0zSXo$F7%izS5EeM)l100TfcLjk+r4wd~uAHsDCbdXPt zS<3$b$qeL;hWnYzEx#4{=pe)h+DLc-4|@IXtvVbTcJYaw%Tq?1+XtCe$tAy0_|u*Z zgWExHBM!RNv55F0Lw}=Hv+L#iF7WRCmkPQV+gB2yF>hS~cOV7^DEyxl-!lRcNE1eY zcZRN`4N9T6v51XIiJ}BX>@>kq_|y=Bh@8kMS8U+0YiFzt>1pc6!x13+42i-FfGYuI4BBP6<0x(>>Ct%Xd7Y1OxG zil~2L=_*^im=?T(*IT1`tBNvV7>3(Qt@p}_y-$nx7+%UGx$-N(O>QlXi`Nd2Lt^ji zO^>ALQJW|C?NN-weYA-rN9GSy&7beHXr8M`p4NeM`p&iEHMpi_B!9Cg0k4Q>JYrG2=t6y>xTDTEEd(zS!p9OqAXs-r9gkC1>IiN5?{U?PiP#DqA zxA{4~AXqQW2U2MD>0u5HG2(9aXe~H6 z!YFv3v=tV@<8?0+>Uxj|&kFLN7gZb40W-8GrkpMY9+<&Hfk2ng#bCTn<`94f!h3xo zPF)QoFLmf={k<)wLtsyU!pDd{KH=Z;GpA+-GO876fx#&+Vfjh73Gt}sel?B1@Qt45IE?!Ui#$!*!}xOt^nsQn zj6x)*ulG&{b?IP*f_1OVL91cf#jN8ARZemBP*onsksMaxUfd0nh*~p2D}BwBT(oud zf*)j{gvZxo9~;>Ab=<7MS37G-p3UkH;>4wA;0jc8vLRaWy2TyIQVr;{^cx|N2+A*Kb8~e*yd|=A8sF6kq;7DXfMOa_6Zc_c zfH0gg9aq5ky7K3SDC@VQI#Nz)1itF9t^T?>L=x2+CfRRwVSEd&ti7{gwUNP<&eUGE z%j}^?HbJ3rzm_j(jLa9D8K-a-O>lhUkQ6*k!Y}B$R2(X;xXb|EwxZ#m1Pwse4jY>} zaVdF-6vbT@R5FYSKY0nJgYnMm$-rB!QoV>`FDW_I=fM?cTMc`ZD<~h?kx;3~ZkU8^ zc?iKKlotSnU9u`cO4{1ql7*w-9a)Ocu{Y-1xqP?t6=6%?|sX$+xvsqc*+BmTM6FSN{7mb7T)1*?kLnD4+RnL9j)db>b3&mbo$h4U# zF!OqmX+iXiz!MEAhZ(#9#-ip2K%@P)M&eCY8YJsU{fVRMnUTlh+@2H!saw6AN8+A6O_BDvgI%ds*GlhuS7^3KaG zP`*XFeg}tb!lR7T?DCgtyIQ_CV>WhRmL}q_=p2xU9B)e!Q}D1%>}z@OX4oMENTD3^ zzk9sD1CKW!_fIrRAm_?lv9AKCF?CME6AQkk1OSuss#^DN;Avhrq~KsFq(!}2yZWe; z2?2qk&>z?sfj!+;jerMSdYLyM-xirU2#&BSC&pNp$cX;oF`^Q`rv!;<02g5(j?u}d zAycxW!cBPy?HAk^;J`}Pti7w8tF$O(rAW5T_t`a)Z4QjRyhZQidlR2kbSyghEt4?I zxt&Z-psVl!eB^P+XSW$qZMP(~xOj!Ys-Ye*M*R~4T$8}VdYf>3boBmD{MQbiXdtBS zw3s@51sZMnPk_V!xY1C;s-?QEWNJ2o=EYY=cY$GcMrLv`pWeYl7*bHg>xLr+j2MdF znDcxQ6<^3!lZWT4I=GAtphV|(_=eV05ZR|B1f$3%DnL!%Dae%-AAWDFEPMD<<*`jQ z_YPlJ*F`>xa@u+0TIljRWMWl2as?Kj9*{wJXX3pXUO`c~v>|)i>xl0EZ;WU@6fDn{ zRzsfafv&2WyTbsq%c&2^XymlhkKBW9KPn>3FlhM&++=BhKPu>ElbIth!x@FQqwzxf-9+ zBR4Q+%SX`2Da8aUR%b&1g?^bm?c+x;uBC0yYSTw)NdTPeDYE+c0L|{SQlX>50lXXZ z|AR;j2;djQGMITHT(4m%-BLy`uL};SEG%HwrN9nAFa{LXH%3YnEV%ku{c{b7=vEEC zPn6<*Qh8!-$T`&$=>LX%TE5;j(gkh*U2td&%h2$W2pXg%ABW0MUHys4K4f%mSVns1{@9kVLTL^p%Xk^s%oss!Ko3K3=;acBfNW~ z+bRDz4D*71&TSqX7u%?Dn2doEn8b_?C$x{bsI|TvT~g8CT4$Ie?!9z_QmihleOU+Q|PD8!O zG4j?DXHMY*HQ1^UREUS;qNKXThA1$Gs^!D}R6~(5I5$lCFd&66aE#<1U3t_%?_MKd zQpUyoJ@D^A9cx!_I&OmjHs@bGgH9Qazm%k*cN{Xr?$WIvH1Dg_J4pe=>2B1$RAA^ zn(w+33gT2mDof(D98-VMDJlZ7Kvi*=^Y}Ml%eEaX2%w9ZdkqhB!&E^y@Yb){ygo+T z^mX3X-iN!rdQ;5Zi#%tDRU2*$BxK<6$4bK;vQM)(f_TF_Sl^K%#%>H~`et-t5$x|u z$!m28R%lP9U+C78Q8jJ|x#;9M6lxZA0SDmqiPMfzMSqGGC!HTt>f0c!7bH4ht+B~t zb>OAFE{mK0M5!g{CrH!Kc))O!x@%V~b}|L4nn0U1BG%XdEMtu#LmvW2 ziH16t*TowEbZGtu7(Mi~AeoQdl>g}-3imrBaglncP|^22fzSP+9-Ell_q|5j3L=-^ zBBPmCO4HAoF*Cu#TbviVV%kD#EL}KOUx}rBe0QuubwxrenfOYr!YgT8IwCOFylr@^ zXlMJ{vP9-^RuL8FaCYwa){*AOTp}EotV)xu!a3vL1CZvwV1Dw84ZQo%3uhcQP>;MK z|FdH1hCC6B*M1FIPu2jc{lve4!_KJk(CCw=lbv4N#Ir|Ya*4?eHD#c5&pzijzqvj0 zycZRz$9}b|=^HnH@dGP&^IDUem8SJ3SCi5TN^E?%7WB3D9_xy(T}q9%IU-~x;_U|& z8Qh1T#*(D@s%6P1M(!ytn{Sa6Mvd{12;+m7_~@Km2gXM7!7L;Ut3}A!w9;oj)!QVE zH%1g#68&v}WRO|<*edww@84f&7CWGI4%l+ztW?lAf!x^5uuktRL_6&db-1e z%W%&VwHFUY79*m8qW^3qvof02sBro2d5pb-%_PWpp+lQU?*WQozkfVMw9-brDQLu#@u?k;niE&^m zIS8x7Nhq@#@`&U~TpQn3g4z4yEO>TB08P5=`z&IUI>>1v^^OSeQ4xwmKl9>8icJf4 ztQp+56B3DKR$;!_TtGTok^d&DPQ0#%iDB9x0(gm6aE&BYAc8xf0IY+daToeNCBSA7 zQO4lJKm*T_vqAh8xEs?7Qiut$)6t9$XKSIihT$2z)BG4U7K6@NEn7jOT^x@L!)n}3 ze#%5r>b70qOct+WbTENQ%Y}FBIz*pR}%ueuwk3NW5?h4&GmhelAZJEaExwe(1p5Ta-0M zlf$0u?7Mwb6=RTrI(4q=m9ur8Iw}HddK7ri)E|BHj5HD{z!_T|zMdY$0F(1R>~-_d z$6x@pM7~oDP)9vgg`m=P6Tq*(vV8Jbym;{EYOlru7n5*1ZD5YR?gj_k&c60NCC8m* ziYugDdGj+VT!Uwk-&!8bK5?C?s2iitsRR#_NE1&xWYJm{{U*zgG%yg6DN;F@eZQPD zEA9~WCh;KG9%ly8WIAP_*(qZvaZiMFAmxb3Jyd~5$qU{h^#W{SUH(`C^Ds&rpWl96 zbv)|W%*jJ#)yU;tx+}9Z@U}KpjgKzU8TMLK>cMOdL9vJ*k)3>q3h;A?op(|@%cvW|w4UR?sE z!w6exL1@pCvjGkFw_ZcgQMLMGfU`khVIEn3J8n&k)li%iu$Ou8wI+1X14aw)=6>i< zS^*duX}eLAKKN2#j>5Ot!}C}JK0EtK;{obIk@s&u5!slicly#2TRv%2Puy~SSmm0w z#z4)xK&hNWv3L_QPM^K|HUHX(lT{WE(*#NsZG|u=+Q7&T)hyv4sgJejg;3AI)w#5P z#K@>ATlWtx^?rA!;VAZn zMzw*9P~P83IVdrN)mrb-np2b16Lr~iX(?*Ri=b%nmg=q>)xi|U zIdCHXE;Q!|vu}PNCXMi@8ulxsQTG!0G=T+`W&;cUT;z2P=wq|-zyX$jy2>Vec*obM zz>B5Rf(w5w34D4j$!Sq5478_CxKxTniQ)o9V=@dz)ZEttuMKx$U|}e#MO_~QGw4`X z>kh7a%J-J05w^Dae9V!y$>>7JmC>xdwrui&n`zX+(J$k&i9^Hq#&G(;?P!r#-pmVK zx`fRW?0Ro5m$2UyjlHFs^Pos1=pf`sQad#ttyEchbvlEbUb-!jcy^qkA+TG}C%TLV zo^?HFxSnj3U;f*^4%Ngkw02GSd)#dB4s z5@TudDV5E;Fn0ZPYsMGkq>D%TL4;A{MLY!A))Uz!Hd&FxVwl9-mV^3sVb4LKXf7A- z6KN5I_Sw49pyeaOo{XezK(+*q(!N;08$}?quj?8Ef|{3)iEAMU==H+JZMF@VSMCNz zrwQgQK#IaQnX_%?sf&nmd6)Y-36@@8>pw>@jHGBAsPLD6Mw2xf$XkqpaxPA*CR*-E z-ATf~H2Owpf&!V0{5uhQ$mMGAhploOQk&ualU1Q0L>KmwH7GX$nnNtBXilcC{%_Z9 z#&+rzl(_4@Gr2^S8&>gWt++`)12^i=m1!wQgK)mm<9|x57>HSaH4xP@`;dK>fIV$##-n5KSiP@zY5egp>tn%2Bg4QNl3o$jmLz|ne4QTiLR~v% zP&alRQzk0Mgy%(r>&DUopuM#__Ilt#N_gft(`x}l`&H{dAX?&`g%CvgdwFgF(@mPF zZ4UZ#%v;*Cet3dhq0 z$YZk}7aQVm=G41aoIa)>uM2GL{Un3^0ks<2f?b?$|#rCWeHZ*SV!=efOSgLpS z6QL9`(eQO(LD|d%V*1u{T!D)SATy}RJJ6tPY6DTlu>+0`N{NCK2$#}wwAE=%z}Muo zMb9Wu3bdfnE2dxEIETDoH5zj8BkO(h)7>@tq4z)T_K;5yK_+G89&K!4EtNx~k+;mP z76o^lxrql@Esa)j<~5$qc}A*xBLd`ab?X?|BVEWX-+xVAUYRdDjvrQS{kyi`i^&d_@RQZ^dkwk54k!R%ltAIrkB0!^ zza41x|8HwN_^(x!(8-Sw$WP~QIVvWb=rEaNpX3UbA63~JvOm{DqUGC_p-EDVhRGMul*<}x^{h*Jx1x2Fq-w)Z-vClY6Bjj!XZ zZ2#{2n;k0EVj`m2)Ig_%PfH|o2gZy0Zyt8*YGopyZHNc#i~4(9le}sbuVQnw=ambC z3vV;P=0;OjLlf@;XFyzv1&Qq@ncdTbKYo(uzm+ zzq5G?Ha4Q?H41-kM=hfII|UQnUy&zJT>+fm(ksmloZn(m>BVREDuNdM2OP_B57c!A z?xLA+pv#hR%EZ{2l()^~GqJ~$B={CKavi+EP4gOOaJKiaPxAX273LAn_m!gO$ z%cMOVI^(LppFUy8hZ1$I1zu>1OtU^3guXBwWpOgf!2WY97(weks3>*|ijd*BnaB^( zPKJEWN$0m5?uEdO2wx(jP4%h16u}<#zXb%^-otbs$C@EdBbqfbD z{Yv8j56Z4XRZ68->OpIswV5?8_cN+D0*8PLL%sN7{N~v7dC;f`em|k>4@%=kr zCvdnO(^r`}HEDf;eV}13^hwG<>N25r;>HB{lcWFS1?jOG&nAhe=xdoaL-sS~FOoR^ z#3b$<2Y0F11JXIhoc!umJ8i}ub^U(QL!y%{50`p`d7E(4$r@c&68%B%^0E5X(2?RA~!Fv`U-_fYL@8<|!W zY%|yqvkX(vB_CML%Yh#H1*=5Y9 zM)PR81gm;9T3*}C2~Ac8kEz5ikK8XNugW{eNag7iHCVpG0D=`o&B_<_14%tT*4c5A zZZR;2<8W^qkFlD{N<`LrC363)2%3~!YTLM6Z07dQ>Y%tDOAm%@4$d~X+J;|qe0>A4 z`0xXz^>uTqZs$@&7MbB1o@Yhw9J416ShOEWun#$B>f}!X8^QLB`zLGa%W=Zz)Kt5@ z#hpi@#W|Ptq~vj##R(wRrYEd_!Tp7652Mg7>eF;Nf3g-@D(axW%)g7tR%Md>!N|G- zx3JTI>Jo+OZIL@kuF&*7th;MEW;&nXV4Ac?>}#Dn@WWX=n66X>F@XNNf!M>un`a#H zwQmaKA=9)!W6`DSz6&?kw-V?_?}*khedGMZpbIA`7wS0#C-0z*^GGx=gZ*0|*Y+y5 zg|Fs~O7~5^0N>`XxDSk2ITdf*JXV5)ZgMZHm`WSu(7g6<5rVW;9K(Pe$FCtvys0>f z9ypB$OSC3W1p8H<#r}{do6GSUa5-jq$xQ*hP^dgG;uG#iTu2DN_iBs5*1_q`;$-G! zg*EL)HxsUXzCL;PA1E)?NJsOzGL-`+rDkT83YQR5RF_ip+uaXtSt;WKq%;W0Vsf_# z1_JKJoSZuQW``|;1X@l}ysVlGIfK>(YxI?qIq?RCHZwkhgh+#jUo9%jN6s#Y?Ujv+ zur;0&W}{e%Oq0eZ`|U=u?Q%4hcX=K366TIVLa6>Wb%&nUx!ozd`&`;b6Boiz0aXIC zbSxP#JEwk(4%B_#y!z%TC|wnx1~_+TNpz`HMo2%Wg(pgni3J3{o)#6T+rf&+(gjX=6Bh9QSVHO` zCX?4yw>2|bL9?(gyXHwoRq8`c{U?mFg0t zK7WH^ETc8#3$30z+9fnIohf!CqoW0vkdX*0>i?CZZP>DH`jSj@QMP!hw8%&BV>p3P zhiFH=akbeDtNrO+9aBn}y-aNj@5wnKESZfJP(IWJ{u^06)vnXYbAzoOnzYpuTTid? z$%j-zX}FpDEj}h80mr2&X@|mmQ=}j|EoiO0RAB!Nf^|_EQSt{7@=BirJA7duos>9e z^?qeeWKy(Ey2{di6mO^^SrrZ=b7Ob)6bg>9ibF2pz%EcO%19tC_#>R&9;@r#-Io-4 zwdSX+3ZkV)NV3*T-d7VpL!e&(w@z&F1_X7H8tNM%#bvIXAzmt~Bw6Nb3X08(NL(6i1MkR15> z;;OUx3AE;!7&&W9gwNeVZ+?ps&pI^Bm>fzb;z;7CEw1wB5h;-d$vp-;6Hy`te{{yw|2EX zp$J{i-6NTf+&eNZl`>Q8{=XKty=*1g=12N=z_96eJ{hIbufRyPJ9x{>?u(gf@vck7 z)Ol3B>M4LCSQMK>l?1cs!X<;PG8QEQUSJO&O^8$uI~$`k9RAfKgOYfxb<%@o#M!ARvIZo1%59bFxD~( z0z<;k&Y4U^Q2YuQcK_f(egTe?F7fzx1eq|8_Ms|ujhOLz-+rb^vta0IgY-$_ZCLm5 ze2kP?Y1nXKH|ZE3m^z}y=d&*cW{F!SJxuhIoKk%cD;}xMPn=`09t~&{oV|v#__l#V zC(=^MA}TjL*?E1U{YwUPMg9{rt0rWSw(=E=>d7Lw+w@am%$%}-5{jprxf*N3M ztlIm97b!Rm{+75r%8@cL&`*JpRUSRAuzsZkfV%9zJXy1B9LY#ZeS-1-3@4HNAUNcU z3yx3)4zZ#9^2Dv0Y*bz??+mr`vWpEIg5!FvRqc!+z8RzX5v2e{U=NuH0;Y!(Vp0SxLHTi|UO3cb#iU9e>JXXFA^T&ev9eA#iEQ!x`h8DICjuLT9n40YYrIb`#?(b2&uE?2VJR&!QXfL-uNUM`5GQto zz9+aC4J?Nix4vawp-qbeAjkK3LnVswS4w`Iz&x-U2VxNjBkcsd^}5o=@x_9HO;jpC zY&0JF;?eT@wdL?|VI}=X6mv+4cQ?&+y{q9`xn&*4{UEkYWf6qrk0VmjWK5*cKHG9W zPR^vsJ)s^5E0YJ2cuC1dmPc|Yv3(CH;=`ccFOTdk%r~lycU*?;sn72P-xnWdkc_1E zEoCfNF*(z>st)cgGHf#Q8sdrTu8-A6dT`u>W~H6FxgV6bhDw%u=s>|y(7)2%vrCE8 zQgn**8H~Vxw_8%IRCQKGkSe@jce7MOvUr^!8zD<@{CI4qs=C{~f%BtCDqqStNfr(3 zT##~VIMqzdZ42!5`KP+{v22doqvB%c_oantIMuZ9$}cFyQRl&v{FZ(#pNRHGj4~FK zWfoB|fU_epoSm-@_A|(UY*6wDKXLcO(bpdzQ5!gvyp}^8o`Q4Kz1<~!`QsME+bL1x z5vlv3ioK&ksD|r-x)(*Dy`z~_xb1+NdRHx*55u{?SVvGEk_J zxGaa+7GM${z2j!xO<~sG4lJ?qldwbKxpv&K-g&(^2cf*6Cogw(+<^6k- zOkFj&`UN@<_h%Ja*`oS9)*d&?aMcpw`tGNJ_-#7_9#oXPKKsCx(#PTJ2WI3FK8l-g zQts;S^{(1k~6L9T$_7m&A?{%*wQYruJLN0}uk)X+@;{UcXb>HcHHM358EX$mJL9cc=F+LYLno|)Z!2ee{c{TPKxij#)!-}y zH0C-nwYlj3MgQ6!R$ujFqIfHBb{EYZMUKTfAeE9~&ntluk36>xYUS6|uR~({X z`ZZpdlra{?)yqaxou(S=el4_QAhF9xv7s(c@&&tT!orK?P(9;KmU?s9`)%#w5gXH? zVU)BXF4wnG(~)SY>M#$BgVm{@z6`58kR(SYSka4Vh$zMScXZ>yn!K|Ta)-6@2;n=t zTv0bR10?Vp8QrYV?uQ8gyp113Q({llN^__LQ4)p*;;~$(M_u`6nlR4K4+%^P11AJugERDfLRSBA0Dq!1DOaK1|P3jd%c^lx{N z3YjM*ww73uS2dVI6)X4t#k9WbB z_~Nrs$?FE=uJMbb9B&Nf$lb=IX2;w{EpQz*R4yv4?hf=7gqQkXy9?^#?`jjy*#k%1 zg8eRfb{3G)tW@Ospz;=u4duTuaT20B6$8+|VY)5O3y9m|GdZZ#;trd#$cl`Q86IuQsxq>tX8)VXZb@@Jy+6N1Ix9&A9nI z#E8)qkH|M5fWJgHhzom$^*nwEtZa)NAaUc0A@KNH;HY1Y!G0w(E{OZAhNU%k@CU+s zi?>y%1)n~XJRYpcQ@~@EneJUy612x!oE=(;a%wBB_y%q9C_SoDi^*H&%I&d*2!+JCECbR(526Q@nRB=cSM*@3w z0{BV88T9&gMEREkZ$2=+}ld*WKuwjHd$5k;X6_TyhgtCkF5nLm;bkT?Ufq5a`7Koh+GLo zKZb5b^6!~;!$Rugb?k%0Gg7ig*D%%RJou$T?V1(#;kGYde`Hv};h#x&xH~d9$tb)}KDvoDYRz)B8KSkxt;9$vAxLzZ8Su>3_ ze5D3mRLpNUlj$s0MqW74U1nB_zXRo=gG8P>(R44*<&+I{!UefWPZE$}8%x)e#xh2Y z_Z^=B@nmSF=~(-u+Ve^n^V2a^LD9)Z>7d2h1V*G3mJI&7%WV`@=fANW%PANFx@|xEXr$vHh>*G)^Q{;YSsyx5A)lJeQAUkB4dFO2be)1#o5=Ihu z#0bqVoqQH;CDJii{h`o$L93W*WrLT@uXifus`T#f3}leZ~AK@XE=Tl zk~GttzAPi=PfmR||8z=_xYjLYp>s*=y7u;UaP?`DlpUUk%;DwYBmB5x}}UQ9ik@v%)O+zRXwZdi$Y|EKOW{L$WaKV)=6 zrL~yZC!v4v(7Muf)oWjui-u^-e=@ks2s1SF6n5!PX2}y7BfrW+{>76pvH(g4bR$aD zOY*T2t%Xw+d6CFd3;ZF%GSR+y%_GA{d^SO}G$*{|JSMNRB%^1yuu}F4&pq$XW^0=x z5jDw!OnK$?xRegHru2-l+du3ZhRFEb0|wmOw)%Q6u@H&tcMDvVn23$}OLli;X`nyz2YVNjc2Il9|&h9IVuD597KcJ2k}D4Gomt+cEfJdq*Ax& zkaQerFffDNg%$IFODmIGc_VY0)Xno%6qCEsx1x+0flkB?hcz5LQxxvZIppri8wH+HYj-#V7!6*<6;<;!?j(3|^!mjtLVGqx@_MW#g^ z`(3J=Iq$3*bd1{jYHo?S?4kSIHoF%*aI@QX^84Mq?HmzFEimti6XKana4#>5d?Bx1 zT>=Po#PJqll+e({v*mpzuMCTQ;h>?5U5kWTLm!%xrE(bccFT zAazmuKm+oP0y7983Zu=f$owKFAzoT;kAHfz^C#>h-fOH`Ud~`IJ$ITkDUK)^XZB3S38 z<}M3jS$mzFT29?e7eU11Zl+lYEeirpHqX<8SpQM^*Xkys91#_=(EVIn*J-)qLwx^yNiVA=wzvJ-+qS-Xs zxab6UjfdzO6<+BtFCQwqfamQlW^~PUGvOg|CdTK0uGc{6g!og4E+IOHR!%m>xDBYu zEyuGbJH^KWcJULo1DJ z(S4fF>V*J!JR@5TV5*7GFcak9p!FTNT+qZZs8`uqdId{5?Hv}6$bh_COtg~R(%l|% zRwx#Wk2?R;qb)YF-)(;IBeE!1bmyIhA@3w>fo{2q)7r=ST2eu-rPdtbuo0+H&2UO! zRzm-YYBv_Y2!)&Hzr}1voYEhhoob-pxm&m0Z$j6(cPR6e{N0cJPm0A_GtYn)J-Y9E zj?cq8jHzNvZTPd#M+Qv(`?VG(c(&8s+Wwn^{_P1A_v)Uat-!pDDvrT1F&5t#Kta9* z#sBF<1pZv((a7cq&=`P(y-&0E5FCoYc$27i9oA8D?QBUY2HUweLSYIeK8R8~a2OTTFWQ$-Y_ z%YaG|Qzx?&e(o8Ukp=SpAli^qipek%B1^4u|65q?u1v`lSXS0-VetsUoU ze|wnv;l3W|7i3K6QglGKLW`8Jb+E&JL9J(@3QY@lcn$q)kFjjYoNqx#?j*a<# z%t`pqd3Msx)ZqQU{_;#%LGO)TXT}Q*YAzf(Hztfjm07hCt+eDiUGG6p^FF;bXw_kDWrb9-*pCL&5ACxL)7yc$cl%O z*XwLDNytZ1Kbn2wphp`UM|%}H@LAV0`>BB#?1{Q$wjE)(+;afM={RaBiu0xW{&n-r zYrWVK0<(HOEEd$KEF5w*{!MG)DJb@6cI!O)6EZ4mxZ!Wuw>ob_OiD)(c)0$3L*n5Z;!t=_mTwM29EhKPt@%HNh`e5fLhTA1>rKFqXhh1p9# z7VrOP830i45|?~&03Ah5*Q`gPcK zYqr*?KLLf68demjcqX_29IHJ599 z!ukl$kvgLO_-v2ATJ*Be5?cMPjI{V*UtFKdHA?@Hk@Pe%#Kck(*o*aMPAGHy1gF&y z(vx#3%e}N-91k(Yb=Wh9*rCgZ6h=VynWXpuKdvpkeD`Z{cE78OC-aY75E+T z(io+hAuuyrp9mM1kX=3!1H)#7TUc<^rD*S|?YOW^X|h^4%e%30UnFDHC0%G;WCsLu zb1S;jIldoJbJ#i2`@7!%x>Q>3$-AFSFLdU#dL29!_w_ZG4JT27>00=+(zPmya9e+c z8cOj``y4(_O+~>!SC~X3*HcDOZk)FRo64pKyM;oJ#^F*O^scLNZG_0?MMVFG`vQhh?1kf9V3LE6D;|$j}5<%kEjROQsV2mFxwdhhqN@ zc)X*wNb|FYT#?kcmBxw55pCVy`A7+W_S3p^@s@ z90R{Ia#zwE2T$Rq5EXEynzsUWg^l|MNSOr<|x(Bwh)rNT-{}4{)h39G>}XyVB(X3OaK&FwcVP;Xc@>C z;BvBLGp6SpUd8teqt}yx2r{+*!g%iPH~D7og7PC{C443yVTQf@V+SZXU+qMZ&Ql7D zr0*j{XbGZ3lCNUsMnOTO-j!D*dgvS0z6uf zFNt^ZSG)}{Oh6PVki*$BZ{EFGe@sgIyTOH^j|LNyZz=5;CcAH1_cn&qLJx^CZsJvu)qZ8+Q^&MeF#9X|>rJtg+S(FbT+iGe#y)Z1Kd7r_DR`v0?nH zX3j^39vwwclh^9xMWx8LDO3EC_3pu={|c+jX*H})CP$~{l2{MYED2i8c=9hWL?-X~ zC8iv8oIY}Io|o}>Y5B0KmR?YPwc$GC~1eHd@f0YFE)1daaD8atljR3ood$a@4?jZ$nKrp!t{^*V=p`TOER!t z6fwoLlF`mfuDb}-H(Pw#bp@|?GF;UMa^m&ukrf)+3A~*aYO0Cv@98+W@bax^x)UD1 zp=%l|heK$UCNGaEQ{F}?Kdai7-L+e4DULBO`iyG4K4>h+LNCSonF*V8Mp1M0n(i+) zWLy2_f9%9Zk_z>-bbfGG417vDNI%H9mQH!FJ}n9%s4Q=yXbRchakN>9#Y2|)oQV&i ze?poji|Vv@iS5_yJuo%sLTXJnxeQv+Q??ZwHdNT$M zK>SK*<_c>$f7SA#ws6RFg%_s2SIM~{yPqo3m`>Z8DT0C-y4G;JI2sT>g*2$sA0;lX zvMIZ&_dnXKS#BneQZGIJV%qeIFOUGeuC5+1%yebd2H(k4A#&91_mZsM6Qi^8=MP-m zy;d*xps-48qae7qYaiRrC_d9&>rVm&lzFd|NiNNw*F#{+$1R3y{Ys#W$j`bs=>dh| zWjbTmeY3By&!~U@ds##7jatLRJOo}PNF39pRJ1lH%giDDHX6HMS2S0ZXW=A#U|U(l zE!rSP-<0lZ?tA7pcW+F^z3+U!5lh$jqVu1@RKTk{C;b3=g{(#YQ+=K()YBX8`_rt! z=UjB#HO9|f0-pbVA3`l0hcB;<;yT|tYB&C-^uOu2Wn!m{a5^7GD z>OLXu8XLw#`P)=Eb0g@(qw{e@y*+pTE9{C=y15wlbn0ChZ(%t4$>z{w%$EkZe-e}T z^Z(17)@%<+PpaTFcH|MM5AJjha(IZwdU;b?KckkZ7L)YRiCdAK@kaKQ_^rAi(HsKS zY~fRp%2jU`BDvLI4FN3Ih*y{HAeLv$ZTp!C2P_5lBg`u6EoGZZ>Y!A*64(n`s;f`G z8jOSGL3%|$WbOa^p<*@4p~<8&^VzK9wd_~bPiDJ=)gmCr#Vm`qz{+&@+#W5Ln6342 z2#gX5>VXcpL-uvWVu3F4PfT$>FZ*FGDBVSqdU@RAaNG<<4Ct@i7HiIg=5g-8UiAIu zvwqb5rFhkBjwCSedyw;SrQJP5ChaBMil}`(7&j+H`1N0=w+5^> zmy#VfU6?lwM9ZC?Z1&kY_T|=%gZz>#*dDwuTP~{Qr?-&6A{UQy+j!{ZDIcDYK9`n6 zCA!^=@705H%m@?T@1p@}wF>_r$zrT1ImaHy!MNERs^zmdbQ5>1;Oa@n5*qii=+$)h-+TI%a zU<9ak5&z$dyXvvB+Gt`WWPKArP{fj`y!pF467=R;XqDu~}6%e1Vsnts;p;iG^^q zz1tJNUIV0Hx<17+Ce|W7{4op!4WEp^#m#xFgsI4^8j1Q#<#@dvdHL&ZA(_(0QCM`{ z*~*SqXuX+9;r09rvVxE4^xTDYb*H(k_i?F(@9z4T)Q}zR?ZkOO^g?X?$e{U8s*j$~ z3mLEJn4GaQNeni0*JmQ+D7``(Wn4beA387s93y(lX*4KZ(^Fv4AB&D0jp*wF6_=IA z#yH|aK(P{{P`#aj3KCIlS5plW-*>8MyP)HpI;lH0IhkKA^4Y%8ZMUw4isd8Hi;mjD zgo>}+MufBy%<-{teCqe zugmU<{hSA5GVS8O=;7KO^=8T1QfIgYaa3K<7f+OcI{!XKit5U2^*O=N}BJZB}diH}rOZ8(IVZ z!=vERZJ+*><}P7&S#)Rp<$B(zb?^Q2#vCT^#Jn+}kdIE$=P=&>m82Gh)%Q|_T}I8e z?u9(GqwEL|m1iz_Zd{b({N%db4!Jadk7bOEI7)Ia#Sg$&B4|Cx9?|8Elyvx8wRJPQ`B!m`|q z%!=h#lK0CEJ)$2Wouovi9gE_yJool1eO)~J{NtI1#r#L;+#y%5aT8yKNmSRl37Ylp zmxNH*zkkk~rMsH#m^6HqRF&%@VRD_Xal0c5ZI|yp=dAaEs{}8e?m^NaO&a>XCpU31 zFXHQa*BWZ*ML-cpcW>}7-2A)nG_?ptsg`^wz_>raPoSd2G-P1I41g(m55`bJdxW0@ zSL9l=E-t^4zRtKoRj*IaTDSr|Q2%t-&iu)g88zg34zlq*@VXc9^%T-gU#`RLg?7B` zp~E~dsK-AILHoLS*d-?hq=<0np~40Rjz~Fk-{vasQ2$XWt_@hjLdcl9)6A_mmL~bv zs&F#$8e1-D_zmrM#%k!WQQ6YH{#xmtR(|d*zvqyo{=V|CZjjeGMNwqX+OhIHqvr5L z23FUIvR#P+>w7Xwt{?E{MJ>)nVqKu#+uIMeYM#wAnYLmdLK#}+V!{P=#RC=(}>*F+N}R-_ERJ-#z9PEnd z5gu5L_ZQ(?pBe;)no~r!c_yd!ZD(wnDuXEw7TfhR*Q|pI^`iH`CoM%N5M8 z$yO?>qY!x=w0VBQ81<(?TtYz2iiIO|kHpvLUNhuu*Je+8+PR@hCOOSiN=fj~Kp7V3 zQ(+FjQt$NxCXG&?iK>&=F#B(k>BDlE-z%4uQ!b=LMc(ov+EFRPamIPNg3-;6CfuXd zoICgCPISxOfXTiDvazS{sk<_LGAI|_4r^59!GfF#fE@j*Jt8VVnol}^eJx=JpepRBG5ruYwP%~z^wO!%1--(?=SmxoA+#HaWel9XyugzWGoBjx#>@vPEqRrFI zTe;eepRtqF39WZsZ5uOfVyRUo*Qte}Fl{6RyVh+V00qZKEZ@I4N!8&uGML3p+509C z`nGfutc}6ufB%O+zlTvq7OQJ6lVVb59c6Je@-Y>Bqb*)e`v+P#M)Q0saUSPvSbcSAd7#}NT zyf4>`#lv`QV_hWctcM`A`Q>}pKgYY7U|6&qGxJ3m)32yz^dU5lzhkcK)@i z1z&&{FS6vp;=b138X|Ja(4i!9LQD73?T!v-o#LeBcR?2;yR=STUK%>9pg3r~OJNEB;BesjuyyUCg@ z`=;44RFpfqzS9aIRL#DSKkTjOknPxCZ`qaapXH5q3!uGr)VM|Y8(4*+ZstDE$79dk z*BVWVYnCUw2H9@YmS07Vii>uoXIcMwZ|-ZkOzfysPo14i4O1U-y-s)qn!h?U@mMn= zZ;qnWCzF+5Z5E1Y@!6`QAahEw^FMG476_qnB>#tHR8jewrucJoC_NQV8+dqhzZz6| z0vh9pO==ZI;4p|T^-=kPZRVdT0+o9|2hsDR41wnQ*^d!f z+fUdYNk*QFN21O91a18cUv2=}BSyKWXJj8`pdVO_@UzS7{*8}o1)3E5*1NXOp|t#n zVE;yc`X`5Dw_4YBtqP4ylZR?%Xa-s8X4{@h=4ZeTm4Odk z;8T}@!SVgoGT{JAq{4_dHD6gxkAQ#xgo@y2W3{zl%F? z8;nigNv`i7sn|MoltadG{XBQ7=bD?S(3+|h>9F_R|Az3T`CqA^Km~jElSRZ}6c$Jz z-p}^RnSlG!8RKNV5#H$uj|}N7p*qq@w?Tr_94D2huC9?!Xy^Q8qxmzFV;0TIpE;N> zp=>80zCAw}OMm;^A&CgqcTPiSlu-Xuufou@->swd#^9@?*F>e7H?f|=z61m6-&Soe zNcdB0W+?WbR_K5hUveWu#ajS%)V$?Nw7~_6*>o+KEa-$XK*aX_T`>s}Dmr|U2hXar zY{Qk@9vVLYFogv^p$YANLSQ|^qgg4PjxB~#G%fRT`dncE&!2v{N-Cp zP}B4-?qm8K{|2?8?vM%1H0IW4V{Vu$>guM*pvrmrEOy*!iC=@8d+A46(`v!?j8`Xp zf7hh7`YlA*03y&r`{%JZkurGgZ({z?jN1b}NSlZbd+Fy>ZyRj88}K2hMlZy5n`+!J zYYWh~@Vwq_yaw@<_>W!yTWd|RUhuzvug^|g=mS5|XEF(zgZLtS{r!=D_J>cAJ8{?5 zHQXCZDJ}U?i_?4SUo5|Jb5%0T9*8=++|N?^@b2k!qP8pR@ZeV9jfaq1m#WV*MmelP z{I;cc>Ap|N=WgF$!@6Owy1e5@q(R=auUnoWBE!x6q5zMIF8@cSDedy@lP~ zk#I#-&a3)oXNNt4xrzY_UGW+|v!fCJ(*Wt6F`INH}X~QcIV;QNBU?~lVRF?$Z zW3S=ZDxn{?y;qX23A?OBpeYXV2-|98$_2l|@d?Uf>0cQF&&A2uU$(7vw*%P+%h56Z zDXWhSzSz^ytUQUkMaz!>M~dpnUx1Kzdf|W_9cNlh(N?hX^=(Y;%tvWsw7q}NiwRvG zT>}{zAhc69vxfe;`Xpes(!F*Bl$b zxfyByb!;Q848Y@P1R}rPAiIj)-lsMg$>7#%;pV$H65k}}Y2Rtt`+RB+CX)JxTK7g1 z+9fJgPKUxF0qp{{1~fun1Fei}TLTW+;`8ucm3f=#G&+Epmu4EPlpSCKAc_7;9U1}x z)G9bVSO-Ut84B#gL|~mtK*~$49Sy2@7g%*T4(k*2L+YiNH{_+oWr(2K+D}JGBXN@t zlua(R5f2^wosxPQ%Cv*y_13yeXc8in%=g>7v2D+8UOuwikj0vi_jrb&Eug6Gvocw1 z=WP1NQFE**s#`A}@>5Q;q8-RN-cb(w`uR}X#=)u-MxBw57&3TOJgWffl>>2Cp;^+#4chNu9vu# zmK$W_&FjX~hAykeWB32u)kN}3L^Qfc^E;|_IaqSOj8}U%(c$IG9EpU0KE+X=sJlSE zB1E*_Sm3-PpvEXm9ZVXIm@a^^UxxN=^uBx)paq(K;?fxsJ;xGFJ%aowb2C~lVsFV} zly;lHlRuV}T^q3mS5%Aqp}hyeEdc#`MhnnJo+@yE^HXEAv(zEY8Q#0p? z_4cW8u03}3U*1?4UJaR;gn|!PW^cbo2Fv4fj)FJ)Eo8EPaq`{P*2e&Pe*ITf=JY^` zAU4)5=LBHk7M`Shmr==#gU3qpmu5C9hOdE39*oM|-DZFRVX1%i(L%+r2YoI8&wF*9 zgY~okViqM@DmibfrBQsaiEJ5@rh2F1*~5LV&KKVgRnl~v_$7j4*MIq4q>8L4wvbQN zmLaE|ip)usk5$Sh`x2E(%C&c2tz9iG09KUOYc!5gt|?0+1-<)Y!)iD<>@1V;n652oU13g7A{;Wa4(BgsHyy~p5$uD5BsNs z^!&i}I^kG9ROhn+Nvsh;6JJSaJ(D=~VGRoocxj}c5_;g;=V%B2b^Ob@#LT$)8Ek1Y zzcI9pF-4;Nja7cFiyz00B>^>cA{s#M##!Snfd_i;yWj4MU0=EP@J`*wsM15Pw0cZ{ zTKwlNW|%<(pdWj94j#)@cH4}$sCA^Z+I`mf7@yPr8;0Ff3+{UV)3&oK;CmE^3ZFwi z$N_eBELkoXBJM*{d)oUi5m79Kk>7aQ)2c{eUSqfQ&ozpwbE#L{elqMGW$HULi)~R^7J@_g zmzx|29~YC`)u_BZviG(Qvcg3`hYyTs&{iea^;?vbg)zT{R|rc>8T@-KXqyQQCZ@I3cc}~9WuHh*!aq4FBf`S zZrn%1r%)meJ66ZM)Bi~6UTkzjsye2Y1w zbz_upLHwB$+&T4P`uqjjE?nECy%SIjne4P~{Y8U*QuE7dP%B&f6ds-3kPg1g7MFl? zi{5g5kA4GhSj3c$p#y?9LgfmA4uOHL*ysS!v8X?b*Ezl_%8w_w=#+m=m`t$JT&*&+ zG&FUN4An$^6sH|c2BCT-HuU?p6^y)4Jt(2BaopQ19nWzP40G3HE=#zxOd#gpq>4ku=$^!WUENME+*&7)B1w*b^-h1q~<3BaMS zQ{zK40+^^OnpQUi@VPtnzpTA?7#-F*$pv1i0Jgb9aHi}wW2TE-10r~U0OvRrPnKf^ zIX&|)jqxfqmH5N!@LYMd_FV5-+q*wOl)NT^2t>bNMpr#u?EQoT%u$cQO?KF0mxP`8 z8$vAK?MrzW%|t$;dbN;^=R6X>dnLKxGwj0ZS!x|#&UjB9SwIUce2naX$NR*LVA&iM zj}2;`e;adC8(sN!gUE}4iqdF|-{Hrgj3y@&dYmF~Z~q1HhTw%Jb68>xvS`Ki$qR`}u@LUx%yGzz61NwAG7<-b=fMx=}UI45HZe5C=2Zy$*6D@87*dEy&ZfO@<>^#yH zEN;9h_0CBeUp*MccHkS{=M{0iBAN0gXmlFq5e_tD6>w&LK>^r4~wVHR&BT!ue}jeJ%P8;S26$Ofv}@I^x|&78vqgofkh{pvE1|5--? z1i;$rf7P@W3HWDiM*1dbBsG32PNz0p5iU^8YvMtPYjq1 z?HeQb=Xay?#kE7my5gZ`U*pRxGV#P*YSmu47Z)CvV};ny)&#VlweIb`?XlY$l+dYK z@y{>3foMNSmL<~U5@Sp(sXcyH^l*x{zu6p4P_M>SNZE#0KxTzBN2jmrSd;v?&peh$;~%Ym*oxyMSo zGyK~;`g1q3F52&RKD@Or!D6ao!EB_%R? zwfQW7cD3kD->+Xn^}Xtwc)^J#0Svq2{UK1*PXe*yjDy(e3`qlJ;6Nox((n_KMQQY) z0SYlepQ06*^$Ch~IQ>}{W<-0KGz-}jhx1ZgdYWXpY^IVc4MdRck}7A+BV=!MW3FG{ zA`O93UyE+ZtX!rxD^~jKaBt{o6M2P8X1PJMNo@L5%JPV8qmmn~j()A(M1Zsx0>wom zwdQQLLA?Oz%eM@<>DpAKQUUZY>~tZ3%7Pjs$ffcPV11Gb$U$gh^oJt_!@Hp*8F%%C zw@^Uy20zg-1J&?3f%NwGlnC` zH^W4IxSgLB>kVMm&E@EZaHMK@BsyK~P2IOLkw6Vji)Q1r%5RB1idHL; zFTZWf{cgn8Kt!{jI{!3ChCj^C?kB~++_3ea8%KaFK7`8HO>e0XKN)J(NmT@zhcFA$ z4r=gy`NJnLSU1l`&#P2rEcB15Ybwrj0kxl+C8thL=u9Bly7J8O$4t^LUmc{-_kh$c z6)V&X3B0Sh760SSs{;{%@bv|zi*oHx)Q3Ks>-{hgsBqYV0?3JY+U~KK1NLL^Y2pcw zPgsGS$r5g}P6%%zL(j|gK8zzf+2rhbsq{wD_rb4($IkV*r@>*%yLQ%a>OPw=Q}yLq zxWPmvVxwyhQGtArUO|a)BKeuRQRtN*>i8!v>79+S%T_^Tmm_r*O;+?FICEedmNDrK zNSwi-bWM;! z2Xpv+Z{@znYuyab8ZyR;KCWcWXPYp_FX?>kbxu8Ne0;g46s3HHt#5ow>ePDsj_f_V z2M!F5Jimd04tGiD2yoH^-&k{)BZfc_m!fl_XsB?eRVS?tiB` z`+$!s4atV*tW~yH8vrOK--^nGsFL{~lC`qnpCkrl5PUC!))@=JE8SI>zqnO0wa^RL z1H$P3{&GVLuCZQe#j2&r0yM>YhTjH|unZ&;2AIamy}?r5(oHxR%2aFpuImwu? zSk*ilp4fFX^6IC?i?J3ftOpd3=Sz<>`j#Nhi}#e!0q-arUTy&L~)>Z)r@VP2`D?||s)jT_qX6IM=E$#OKs4y&+p?$Gug#UNKBK9R9 zL}5*v;fi6Xz=iLhxJ-j2aQFy(itz4x_#5C!PX08Fkp=ctBH*jGi{BTYplB`e7I$c?vh|v6H0|Ne{^78FBRk{z|o{J_^F24w_RrF#X z)pl$K%QiYq<$>%D1ee9C+sx)!nQ@ujpSj6jbolI=;aPPhRqq8IhyGS?$F#Ltd#n;5 zHj3j#$<(fPdwlM~3`CJaX1PB3z|F>K%KvY;0En|lMn${RcUQ3WWc5lOE%OkU>jqO# zibZKH$pxSXQ_~2T)ny&p;D9;inkL@{%lQO!(yaV7)>v-25LvM1+!hIb+vxS)XByp0 z71~AO69ZQ(m4Tmc*#kOG8vsb~!7v5PA0^-bJk#krr%I*=a4+g0+docqz$!4?r?$uz zuO#e4g=*K?$qZ|ejOrNRM1U^lP9m{xPe4wdZ!w7F6BbRQeK)UuQqM=6U09^19dO#* z^97hrM=3C2GZi<>d)Z9x%qkyG~Ma2*vkXTBXvdzB*MoZD_4Ul;MADm05 z58qSE3$=#e*~?qkXjPTWF?3Tzu*xL5W#Yw2Ze=L_4{p`2g)}^5X~y<2Yc6UUq1qOq zJVUCo9jCfKascsY?#gyiH>Ijvi6tzo+9%fjx<0Dm@zBYxJjV8?5?AkqSZEvnwxR4d3kMK&%i|zQ2wXO>E)$l48Jxc6}9*0`aVg&AUJfZ!``LQ1s%E zBVa8nXs0k>Ckc#nJwX5Yzc6eXCTQLe-P?U)*zaFBhv(m0sDdpEC3c>Q=k;V`=WKoYJw?>CvlLmB7oDE>Tt zDLt!-pBX#mX4imjnw|&eXsQ;pIsi$9{|^XB!tsw}0gFi(5-R*tq%a0L^ITxyxnn+( zh9jM88UkN65w?<(6!2p8_INizANscHmKv3Ho}LFIBy{dMCNL}};MXUSaJqJnWMjd~M?PJTtURi1R2ri70oZnfLF)$KQOyTl*Qy zogxicr zX&dEoFj&uXF>X(0xc27Yg+U}Sd9|*m=Ag|9oKu!=@Bk>B+N29@M^+gl zzvX*tBGm8yk=#?B7UTnNXGFhGQ5pgtdo^lxLbB|3B=}=M3S*IiBjXqh2|_IrR3`{5 zpF&t!j`Ax|boyoh`{l-i^@lKzOA`|4OX5&fk$YhpduZd($7h(aII4N*d{huXlgc4a z8UJR0zR&fSUOZ_KUEH!5mXf26Qu5`DpiYfynTTELJbSe$vDM#tW5Gf}o$bw7LXIJn zE0<5kxk3SUsG#w0E?(Zh@j;+;?>jWztM%&q<((b3i?u-Tv(ohQQ;K_bOR3R9-Lr?o z3(;$_dW&hX=K?pMLxN{WNTZ>q=XQT&%cI9mul)dvlRCijle3lkq68E#FY5l+sTG+6 zp+7t5zNQm(CWLe|Ec_&^5O^x_=2y^!s%Fl5V|vxp8!f%;yqMMr_zqU%Z<|D9Lifnt z@8`i(r)Nl`&{HEb`P}Kn^^1%34KWigY)5Q#H?dP3OO~M2r43Ad@XF(_#e1J)_K$#2 z(04e6`Oo+?qb4x+14?}$X-Fr0?2TLqnX|>m;T!co{6U0|@Ud6;@3HUEYf={DiKO{F z{VwyKWg#3EgOYsX!O-`yL#4kE`~rXepGwT9sx@k_4+$8=jNDhhugGK6K4Kg3X2F3H z)ig`&R`bh2zHjo$BBjkDqf0{GqDuoK=PDEGsK&BL-Z)Ce1$1F6Tg81{Y5)p7ejGZk zcwTczKu|$PeG^GqG=v5vv1$D4?LTPMOV3FYDbV|@K!+XcKIy&+iG2V5vTySKWWzu# zEdBnjvY-LG-0xPld5gDKt*@E0c~@$7ahcp5FdlW(QFS8#9Hv{${#WR=A-%>pNq}Rp zLGCpqw|>Ca-TIOu|G$R+Ejm@*o`E<^mJw*BB!K?YHM4lIeWr63J(-*8b?d2PV}8iE z@yd6%^QX8^{l9e}N~?t=7cKZXvRHqC1EqtJf+;$_za@XEG@(SFkl`nA=n=`v!L$K$ zlR{ydb9~h8eBgOFPk!I2a<5T>BKgi*F(`V@bMRk(o{C(QRAEg+Y=%U|OkR$J@_9lPYMUOb~A)5Dq@8mJ2c& z_qe*b8sAHYF1kG0W`?h-4y9Dvibr}9y_DM!7$cDM_r*e6Nc_xlaxoLN1Q$v7068QORwrDgUo-$F*qoRQs5d3Z^34h>uXO0kAvipbR9AWwIaOXiC* zB2&S4W!6|n2b+sWa%bXLFYIA^bPnt0RZO}(c_ExvGdxc0V2f{hgZrT=h6%tkXwYn4E)Yn1&lA>q0Y8E{w1sYKcu~N zRMpY8HcU#FfOIzq2!hn65tQ0=inNrZbT@(s3J6F`ZAy`Dq`Nz$yE`Pmwa-2GeeXS< zG4B1o?>}`6(cfBg&3NWBpSjVr_|44qZ7OKC&n1<9O+l&RAMiO9ledvT=S_~lazuvzNXQ{2hG zeRhJ~F>fgY@l>Wka2^aNs6^J%Q^G)wa^@e0)rH!XEfc`2-gGzDH^`AS%vyhhPk!q7 zcKgU!z3R-qxG$b@v>zV*uz46cFg4)oWHg(YdmjFV`|SNG3zi}^e-@VAz`kZ2%vB_4 zbDG^_v7rx9?V6T$85A3gpX2ZzF7wU?#rX7%_npVI32c5fibWMOFV78Z{rGuU&)jx) z!m;s|Gg`UEwChhF5ozj^ArVqZZ3Tu7y;*ekku6RrcZ1|^P^SWQLw&h8N)ywvKf#9; zom-?+JZ6Wr3h3Zl|A&>r7pFMYyR8=aWJEKqqjQsf2;$Y?53poM_4qr|v^!#Ce zwpbeAmZ%-@cbKDakNDQJ8xo5DtfNszvTqa5?j@?0KV*upm^n#W&fA@2VTfqT_o(md z;j+-JlMJD6BJ#9-fpeD=9xt$U#E$;gA%${H*U#bqeJq`tt zvm4oQw<*WjXRl7w_48jUvMCcEwjwE43a~`y(oK~I?k1t*?I!cyYjmb4X5{1O{X{JZ zx08|U9hHU-#Juql79?+7d_i>mh+FE3-Io{tsRdA7gDM;%T_m%(^-amEOloFN=t;1T zfwa5#JJ?7cu2mv)u9S@a50hu4B4o-57z3lE?UY;z8OKEFSw7n8csSryIOedtk~ z?>S6mJu_^Z(6sB3Srq?M&WkFfLIfk|GrLKpHM;A_SaeuD#IdyX)6s$aDBn^vUK4a_ zccT4=geJX)mQ8=sV~?_9l%2AOT+#55Pv}rZeNJL4RAy2BseHdjbgc@B=CMd=H+TNl zO_OmxqB&kK;HyQ~;W6?=b?}c5h>>^H-Pq3qrr}A++p!q1Zvg}DXo8pP-h%xguPT>H zf5)(W!h#r^AaPXg%9y4`ncHfz6)TRm%02UyQ4o}2_+fIxFiNPwUd%o+r@ltEXDi5- zuJShd+9AmfGi=-b48>YI<^6eVW1;fJ&E9xeNJ71@_#>JN$+2Px^o(q$9vO}1GRAg5 zvlE~Ke6p|8T%Db1RSnTNKcS={5pe|wgr((Z2Zq7CldtN2iG?4$y5`mdN!eQE9tCCR zz1IS_T06zW|Nl%MLAIF<}APy>~;%mzEK>1ua+pVZOxak*XT zenp1f&hrcAHK3WQQt{Y}@_7!2ePaO>%Kh=T5+TKGqqr7flErtOr3avfeu(8v z_9A8!b-ZF%tn|rZ=IM{lUo3uc@}T_q$-wtgbv|7CFy#)T4c&G5r>i$7&tV&P3|O2n z@5NE(2A{tbdS{5q4_0RZ$Z3iIH3jaT2By%yhOj#50ADX$Br}pB0sk6Wy7ov`2Y3p} z^7M_-xcXow^JeRIRFaj~Z1h%K7IU&-W)?dP@69XF0T{0_7(gu;;!PhGwSbg%?y*ka zet){1R^Gl*^T#>a%%X1bN#`^Iw4xVEJGJEm#vqeQx8E%0mkC6ww6#r)+iZTo5x)U_ zB)lZ?KcN<&cX%OIiWM6>JeKxu{oumB(0+$c(e2LN_nzHo6~WN`MxJXT zP$sS5i3=L0eh6c^s~Vug>sCO#PsAus;%?%-XRFTj!;obdXPaYG{|Y`TZeAOBHa%dh ztnd|m#PTmMW*i>^hK;wA{3ikG#!BQjG|o_LIT>zggq(}CRg4K*_nVJI+XWLz7H{7( z+kA?JJ>ULKSxYk9Z>aI7^bhO1MYiqX63u)1mQXZ83@nvlOC_=N!P?>Vj~P1=#Vn+; zc}LjahU+PM`~BkjAFU_LK3pz1Qh*`v5ReZe61 z({!FW)yU|VD|2WAcc(+q14pPth`iZix58u`&XACC8ZVk^#zVLxeCX6U+QkzM5$yF{ZJ_+;QUFXU_i147w^Qp&)psL#P`8Q!53F>&I%li3BL%#UkI4g**UenvVes1 zqNTZ~>Q`V996fH8C{L4M5$8({U{Uf|D_P(I!xo<2!A&(7j|CdTWNRyXM24l&YBx$_ zVFifIBsZ@?lf)3S?1G@K$5W8!g9X}FRM-F;!eQI5JlW41Tr%~3v)@GGUhaK@QK6mU z8Pm%);}MRZW~xhgV6WJKn-56qF=H@KGKW7e^Ae?ZX`ns$E?!wU0x1d*Vp-(uJ}Al) zCBkuXGFT%*KUCUEb9$5rIT432pLjgBd{3=+ zlqD5{XAVJMeW$7XRYS}IpF(AMIr7K(yK%FfasgP%egPg%vD%ya{JpVVrw6Dd$ITJNy8wW`wvu*~1X>HRv5FJTYI%p^f|w03zpQb^4QWIJJEF9D!ZZy z`&iP~Mz~_AZKa}x$EmR5JwfZ0py>-nkNEEaRY&gIlTtqCt-F4|$p=?L>O zBt}Gw2DMp2J0NdGr~_X=V-snNk40=C2=6v{AN^L69`e=BPjE5ZI6AcAP^&m=i{d@> zt+cm0UVqLhb=B^3%EQzsx&Mv=(sqI49PMvXe=?8uG4PA+dtYi{++S{$ zw@!kd1>5-EOX*`8S+in@Wnn)OyshG|yXhz!_;!!(5qizM;7hCqbDB0n1 z;q10@Ws@M#R8l)JW5&T7v|p}qdu|Ni@%6{_b_}-$c-Zy7B-EHqpi)>2LCdP)(B+Bx17XAhLvh&7IIU|C&L# zA@rNLPJSb9ry;!eU9UzfnQtGFd!{xCTbu#0$91|&ymqRO!9(}jAb%Klze9PC)uV{E z;b{sfKU@B**@VI;uENbwvA{LH)K>b`FhO7hbAw5Is3$lp@Isy6M3%b&?r-#MY5JXmrky}=h+3WAwRcylDKTXdU zkPLhMK2do}w<;g8PS+&XAH6M+=be$OGLXvXBXm``d_*I+GOWPexa)8j-X$qh=?y_E zmv_-W?4$K?+Xi5cDbL(-m$c0Y->+j3;+C#08*{fGiXO7m{%o%HY~Ik>MFix}erxfq znG+fxGH)fA(pOKjlY6xL&-cjD^Sn7xSoFyYA1{aI>s{8=s-M@ruMe&G#{CMkn9#+t zHyCU8tI{SvJzHMOf90ySzU2&pxYHGGzr8Q`p-}NHPE0|#MWs|S@Y1Lnk;5xHSyDEx ze@Mr?QsZI8T-BtdIb0QY$KRW~)fpj|QEy0lkkW-DuFP!5boT12B$IDP3Q|0&lf3vl z<%GiF@A4G#J=?HtP7&7{A4RPk+~0nU4(dHRvTr(?)MaS~YN_1G$pnT3h$Jl(2s`v1 zVI7W5_{*iugwfnx1*CAGl9FMq7#&y^)K|_#Cl?FR;J9e%wEY+6`t2;%GG*X*WpOLc z>YF{1g~aWR@<@1P`uR9H8u%Dd!hh#u0xl6emgolSOL{TX!a;nf=iI>;-0sY;Ar<|_ zFtw>I;~uPL?iwn(h>~`p;6k206?nP&?(jjkzVaMajJZC6$IY+3b=`~@gT(je!?!FR zU&fR7=y$s8^`5lF)f#_fxY@ifg9w--D7wOAECtNF3mwM`%>0nQg&AVWFzBwlL4wYQ zx}roi%v;+>wvt|tVP}X)Of9-Ti*|}zJh{a?h5SH8pzzS z5^Z*qV`U@!*6-UHO2B9mw#fmAY1`L9-hLe}=|FX0G32$i@0r@w~Cy+LA$JqHzKEZ4Q%J3zEqL~_! zvkGD1M+EPUkriJiz7&1REbZOX?Hl@bL(}-UH8i$JxK8d3R-t&pDsoEh4(JwFhUP$a z$Rds2wloc#yON%rogSu0y}0DRoqj#6y#M?oKyx z4(|=3;wysL6Bp9!gUnY*S2Op46L(x(xySZuf2ef#o&t4VM?;v3H#Z|mX^Jc%Dr`%88bI#rmUyj|Q;^d2c_>Ip6PUL4Jk2SYEQSV?Pij zl}hxl`Cd4QznQH~dFZ^ZFtMaS@=GoJ-8`CK$Uxd>tB~4%lC1e{MZJ8lx)SanIleD# zsKk!<)g5;~D-4gRq!t`dkhZ4Y&xcanUGPLkjn1y&DuGJJ*|f(}50udYK*#-GyCn}G zNBp*JEtZG48O(Pm6QlwnZ{M+&^Gl2Oip!irZ9VNeNJAp7Ntc7dLapjQL`fR8x@rD8 zWGH4TR@7oW>Qix+-GCCzegWih@#R~T^!ji+cAQ`uaqd0Q&K>D-g}dCh?dLuu9j^nS zyiNJ9L<;uf^tYI`gM=K=G6#L17W!bi)2qCg&Z%-WLGwj7y*L=%!Pdyy&ek9MLv+2R zg_Sm&-+&rBZ#qnYInv99lAM2N+D)RdnWi6&N4JS#>auH-r=)W@5eO}Pk4*j0J*m}q z+h!j7`-;!Dq^$FWwz2En)3tA*EIL8*sA=#XniBq;``8Ec?WMCnn@RNcP!thR6SiUL zD%SnK5FF3|BdWD7-PM9oJ3LBU8jdHokbTp1QlWgtN`PL6j3>l7hHoJ>0fv$ z$|z|MQSin+Wrt1fQ1_TUIGs%Bf4G2PDGOjx# zMk92)4$)0V3$UMNa&%(ng7i>ddhWy3d^?H5VDa2e9+pv$fj>nFq>+u{43%qM(=JTH zJI4*A$c@^jwAl=jC#Logu|SPW;#`yvgd%x|_idye*w>IQ3uyQo-Fjm@R7k(M_;jrL zq0X^h$2UT@5(}QJYgtkQw-`4Tjy5wUWaxu>_knwJnaxKYZFyNXFQsYm6+LiF4_^XG z3}&Ap@bK%!-(oodqwIf0nn8sy857}Jkz}!GxuA)Zlq3emn$p z6ONT1)WCPx0QRaLxUmAT1LnUo529lIVJIGM%QiDMQ7V@u7|x{PQt!Oe%LKxt22i8! zm?dT83O!`2{6eLAMT;adn@Sb}s@}AgpQQ5~mM?1#Y5PLB4~c+8#Q_!SlxeJu~ z{M}#Zlv_r?j}F|3t)<-J)DA4Q%79?@-iOo+z1m5F{Pc$m?A#Yy9leyb;7b@wsK(pH zd|V&&3S#$rt}pNK)|`=jKPRNDuc79bi0{8 z{vY`pw^=|ftFi4gZ^(h;>Lx(R^()`URQJL1xU;e!JlT^BMUj1WWxV@j+)5+9+;!&d<@ z;Twb!p{{3wU%pdSy6S^ZF|B7Nof4qFDVBJ2DDyf^u-xFWbqk+jk@p*{hNZ7fwZ!~p zQ?a}QK7wnW&ZTrLKaz2sOSebxd_>LKDmz_r6yc}ogKI&Ov-i8yo8NnN{3Xj&H>TA_ zmI@KICFrBX)(-RtX3y<@anuH4JHIOy+I7GNB`ZzTzkorWCPEKaUZq$FCovGRE;x`~4p63l2kcNNx0YPmB<* zlS?Dqg|N+0v(_axB%IkBL#g+f-#?O%qvSj}l)13=Hno=>%8SnIuE*-_^P+5wsZlym zX(AN=op|r-iSK?_h2iN*y_^+IU%I8P+obNiL4pxk=Vlk{W?6jOm|!~P#(X7xy4uw` zh+Htn-wsA~x<9$TZfyJqr#uBfzE%SxU!DVJ-D8q$7L(Z&3IC%GwU^SW8RhWwLhp8t zuNDDnH)E@7!$$nmI18nf6&o@P<$Ig=1f##s^_%14U}A*={Ol*@e`0Wi%&FhaPMfaA zi|j!N-M2k<)!!?*S||;pSyjdUk}#tGo`>c#_;l5J*#zlKg$CpBoE@`k(f zC5`_YQKlajJiiEjqCwTv%+&kEjfKM9WT;!ADHeKCU=DT}S=FUCQ2&F&RW=P@p{e)u z@A8xUu#Gy+`UwJ+F(p+UWMw>VL8!Cgg5%L}>Rgtkt4$6MPt-(i>B`emGrh-U1= zj!hSBJ$X#({BUKY3Y7B2Nm*u#{4faATUFwkWl5^fl645JURV*juZ{QII z7Q-&(KO6oau}u4nbm84thepHZAPV}pvItAoPQv@W`q$&v@hM36SH+66@f;C*OIEeb zW%bXLkoDO7*HM3=)(4b-1ytbq(}s8MqqCn$`+Yw%&$%zX(=U(4pD8ExiIuFi$9fpu z3TFomDrHUxghx%`4W-a_6(Wr;fylXU0f6b;MZrYl9pM+APfHsTOCkdZeKGCNk{&;A zg{H_2Ef{I(3Z-FtYG&gIcq+hCCs9SennlUic!H2Oo!t)_@kd&bEf&w0BQv;)~mp9H$0 zk*F`+*FN*lT$iQ-#8(!B46C3V$JG}`=mZQ=oE+N2`hB~N0G35cb3Wd0Gv2!-Ke__d z$a6d2flQzfN+6?b@g10oRrkM(UxZ%n1#)-=gtH|BmpNI_I%cb}XO1sgCmnd3ajm$U z!(ZTeNL(TI?O*fSF|whYZ=YmT{Yti@jJYuCAoU2VrM^18*V@4pKh|SxA)FxJYL8gN zvd^qXD={z(oW9nu-kUit`&N8K)c%d)`DVZ*tVf6t^7ZP|BwN;c`Z&3xQMT>Dev63CQ^NsQS=oP=2UWDp}@wk(Ov|X2E zLH@j*od5XAg0r@>n*t9=g#vYC6bLFLHt#&-=SVf?84*{>!&s2JFNXW6DtxeO5Zt*c znG{LBJ>~RaJN-h^oK-b7H-1JUa%f6={e9;H$K^useOI9x^#Fb}-OZ~0r$kca3y#s> z@7)N_tw>DycAv9SgKmN1g=+2|e5t(C`CXqI*fiR&ExE;wDG1L~QYvV8DO8R0;P4Q5 z6s$kNqafB%;bFm~ltmO-B@HWoYQn5|d`^VZ{?q-QnomWiZjEvx3UaxMoI2&qyc_4? zn`oRgXU-6k)(1oS~_;lCE$=8rLJTF)@@>qQ^)Sdb^MM71vPvMrFleY4uHgdig=KwI^a; z#E&EVW{>gRM>%FG3lM~=TA zA4U_Q-x3)M{4X)}v66dBTfV<1Ed(74}O8Blq!}a#uYQv<>i@dfIo$>^g zZI|@d*lLc0D`DOUHYGt_iWE~vkDUSU(g-X5`DKa0JrXmzJ9)S+-JW0yRanhN7TDf9 zO+r>t3U73ko3n{y8|A)y#gbBQ+q$bo8L>@P|6>Kj>$% zkV6N{Ivqh-Zt5hR3Kx-^)A-$_C~{9)d3$NKQc0K-j^Rcv4%cGf)<{#@kC!st>+w;V zL>(IA4;39YOu z7mU-49}v*Z6G?5Qez=XL3t~7wWmf zik^8JxXhfNxywEnbYQvIt0}5h1b!u7QQ!wQ4Aennc1emgMZ_-1iUQ z;&~Rz?{!YMd12zAuc=$C&MfYSihCN2AJtLP&_GpU#LtJ6TE99T9>CIDr#{je3m6V0 zb&8L{n`EX~TeJf8>^$Y)IU@BT5j`H%6a{ko)gKo2yN>5XSI8rS?xI~H?sj5Cv{*qc z;ehDW%PM)|9N1!B1h6hD!X5p3qsDR(xT!XSFZ@CVh!mbC zU2Kv|o!Gdx799jRL#_(vd$PAOC{!N;^DwVc8i~FdekMYfTNWImXt9*&yvyN;vtR+d zm5f-Z#pD@^h?SP0$oW2)D2OO0zBl-Qvf)KjU&CE;QsfkmBHC|ijlng0-V4& z@m~#zPDCge>F=rwa(8z+;1`HcoQ+7cVsV=GdOr0Y@w zzriWYgo#Gr^u`TkNl-E2c~6Lz#%?&$b2w-~kHPT<2B*>xz08&%(!ob1I+dAEy|h%B z;yphk${KRT7UP_)K^|8{?oH63lc4rttWgMHMRd5Xl}5J`+uhcAnU>;x_*ssHGjCWw z#X0+vt5|62W@qmb9dFE4=I0+A=hPi(t^XH-bC%`kjxPjBz?Yo?A&YtNnHN(3_L0BA zep2M{jC1`v=p_4I*hLn3PhdJ!F2 zF@4QqeFERhm{g-RqDI8}4>djwUu_(qeO*|o|7eF6_3dIf%uGheObTeBV2k~^zAnjx z;qhyd$5%d}n#B5M;fxtz^#bZj!aE2xDBSEDc z><<(Cheuy8+LK3fW5;KL*cIL@B))Isp?tL1ovIyBR67MX&$l58Hilq*@iuqX2c!`A z#vLgR_H&s4diaFX=V0P8b$E6j!Kg-y`8W~jCI_EoG$Sk{j=!swFyT2{`P}iG2q!nx z7BrI6_kbE8Gb=J@H4?#bPr3NkoR!5j=Gxp#tWR<*=ZA5pyV(Q?IY4Nmb=q86&1aaE zI*pepAC4yxSEMrOg8qut^xw#ZN0WM@Ka7X3?LM5iV*&WG(qmnYpHLB!)-?6u=S_sX z{xDC`Kx@$`29pE^AVXvlBLl`;{~6UgS{);0z?B7*g3!S3PEt#D9nO7tFgfbdg+R^>294Kya zM(F(t=PxPFVCLcZ4`Yt>vM$m8Ma1w;up9a=mt7lj1%7Fp^yzSk8;Nx*52g)C z_MvMdYH|X$201FJvk6#@2oc)Twf1mROG^cMqzNsPAREOs?=+_!2sZ{(bMj@{IpmsP zOoPo(Xaydi6#foSusyPwskj;u*s^{8-xp2bZao%8py+HGbR_yupY?WF zEU^2Mo|3ZvL0UmQ4<8DSbDOXKdRu_*>=)d2l_q5S6YEbLTy0@)!^xHdSp0&U1_8=@ z$fTsv3~zy1MHWiDh2N#-IX|%M|0z$`jzrRJBK$5NQu&mvoXW$K7u|h1ePY1Jk__)# zPIGjwXM@QE7go2Hk^AG&yCv2Kg~*$4t-=Nm)R%Uhg{@IU*)GGSraiVQj0WBTQ`VOj zNCAY2Py?=ga`3@BpiuZ%mxYqH?ahGh&Tx4@?SG z1tBd8B`rQ}K=4g>`s)}KBt|-C#X!2%tdNJaq(~?){G-WNf|pfnu{#=OcMPm@G!K%# zid6Mo)Nc%=l38iWj=V?`IidD)o~_wPJ4s>K`~A-E!ej8=d^dApMKbp9cYFu!N}gp)r5MOfSy6&qY39_tu`#{xrTo-BiO5<>S}E ztP-L0loSN0=A@+Bw2IB9O&wD>?d83;L2 z&8-z=O5`KaUABGOyL>Pk)EkYIh9I^!LMD7WrOI1!FJXwR`$h>`me8XnuoIP>74Vrz z$UXSDDa~iK(*z++G5F_bcR2z?SMr63tDBnfF8)Lm$QN9m%3$IU1Nn@QqPOtYdqfN9 zy^Tpt$OOp4J$z1F(SlO}hWoKk0%dTy&Da|@<11&@YuAX+`emu6spk;hYr`Ki3BA~A z>)PBco~c1kl6P&B6>G&^i8-?kl6rpH*rP)beOpMk?Yh+JF2u_RuNRbFFRhM7rpc-7 z4xx<&^z{$szOt_T^itv3%9IE~`K^|*p>cZ^o7ZW27ey^~-FEpe1_THWIW(JW-0#OkbHF35t=FCEJ^&o?4jCCSaJAnx(oN!~OZu4qN$P<1MNOETe@> zmrXqY^?L|)<-E-32i*Qy+3;4v*RQ%g#wIP*v;449*L^Gc9!?Hck{@Qfr79hj%|};z z;+jnw} zF9wj)4N9TUden{N#a~FTb67q!?p5bnm}Kfg$VQ@|u3ubLcQg6?kWb#Cj)twciPz~n zI)tvzU|H3Wxqn-OsXFUka(^*liM~OidYCcmyz;!VUJr zuMZOVr-dfIX~#^T$i=;TbNH3EVF{bwEq+Acj&2|7$X)x`>f>IvK&rCuHtE_U=9dS; zVW%BWjS0P8F)YT;OH(Oe>ckmg^I!6{^2@rc!K zb@SDRExMyyX=Ae0p?p)U$6~%2m3I*PfasBj6ZK71Y{Z2Ah1yLZciwHyscO&7RgR9~ z!df_;(D;Uy$XaRa>fmpwn)a>O9*dvy_Tn<0$8k;Om@7T$zbO7hC#*it`!z3TG)rrL zqc!sIV|LZ;Bg#%;L<^i4fg_4YPCS7Ybi65_#PZOmJjyWD0fV??3Qjf_ow-AIeL{Ds z;)?Un6YdYJj$V&h_}_$}@$AFmUz1!M%U=J*ba{4f_h^MGgwIMpbp-p2G)sb*|&tTL}!v@LnXzoFU_eM+Jk3USC_Pp{-Vtt@=Gi3*R9k72JUg90Pi z>YcL=2SxzqL;o@YbcoOZ{Tbs^VmwJL{)QroxcXBHBPH@~sy{JE!bR!}*##C0CmXBK z-)?G}V7sF@??of}V&@z?UlLNbypzXMaoFzM0VXZ+?tz-f`h#c(sdr`ZoQC}-ZhHnM5_+}lbMWmir1_o&?A!yZi z9~ej8&=f6oRHFzwb^cO%GkI{LFBY;}(}ys9aZA-c;7&2~&ed4FSg=z}V!z3cbGmBj zNXzN=pYb>Y!XaBC?f0Ql%=hJ=`lYl>Bq2PX*Ud_v8)QV{r_BhP?A=>~w-LLufeSe? za}=*}q!|ZjWtIa8TfGteVLA+CI!SqTPI!c2Fq|EBmiI`#@VdT+zM=wvIkso8a#`@= zUUvAi;uC;Nk9Z+BF2N6W3@hrGO)+`GGO3xfNzWOv`I=g}dcchfv`v zgsSS+bX5G~=U>dT{$Q=iIj3n~u#EyKIM zyn5VW$eO=q5=4*fjzfJF!xb8l1PZuRRIpZ+y|I!6K2IN+9q$pEE!>n!H9V{1{gy7t z(nm5XD8)E4@3hF4yN*kWKdL}m(*IgvfDm&$*hk1m z#37xqCCIYamg1yR?{2{;XKxsssalnoQ&LIYc{y>d!d~`1bOV(Y{doVZ8d&yS`Fx_5 z9gwh1+(3Evuc;i8d*BUr&L#TuwOU+7N8YiwxvU_g(>mWHlKWJuCtuQPk2rQD6U;;b z>*Kx;)`uR+)#GLKv^zZLQM*cTm~~93tRZ4OQpZEc^+5KIeI9&b-BNS^;6;v7GtHKv zn10CVjO88cPV)HU+Cfhe&KY#^%1;cvQh84aY35L1rg-#A6xW7Xi9HlPSD+X&Aio-xbI;Hdf|*e+ zL0fd7w>qH8Pbiy;ducn)&26~@e$W}DRWAkpTo?#o_J(3Tn=I;>hn)s+waVXfHEa{Glb7~S_!MfUh%6S>0(TZl=d z=yQ_vU1UGB#MN9TC3XZRhw_&T*qf*-I*EPi=?W8#+Ijtb_IID0K8!v`$mzQ=)>VC_ zY<0_Lc8jXi-0#No;ge|zN=sC`V=-D4{Y@v{m_gGEQ5;h38am-s-+KD~SGbUp73gwH zabam{vmf)trhs;Xa(=J&d2>~)+ww-?dWEtV_19Z&ZCr)vum$8Mv?qjhoVK*>+*d@u zo0M7Hc6U~Phn*)N$n6iox`mFvNLfwj79$v)y?WJ}1O8v=KSy6VL`w6#z7w~eBfET3 z)7fYMVWDyQOqI|>mYy?-7r=57Cr)c~UpVeEDggP8@b>6Arb~GRYsu>1nh}O-N0*G%6}-YKz0Tn1+NfA`d?i= zdH{>BZVXl0)K+)D=eDg1T2t(X``8na=V;8#-6%w5#R4zm^T+GCRP8gcjBFi(K zZR}w+9nVIF>?s?S1C%`uyAf8+nvTM$w)jKSjweo+oH(h*f@E>Sx;{}F)%=%4+$NQ| zlO9e?BG}4f|B(x%1O`BfkQY)Ej`Rf%@XE94{#w%@ISjt$l7Q+WKs^Vvq99cB7kLZU zR{hSON-i)XQty<<)B0@vQr42*n=kpYi#d-?)t+9*$8f zs8hb_x3E}{edJ`v&xw}iWcPq}prSzMqHUvF756!Z;qwDA#iKIuBHT9ze#jnKRXGNY)H0pKb;b^ms-9^W| zlGPgNI&ub<1k62CHRPpP7|X{17Dh++nZO~Z0#*cg>9}VMN?F^B;_@GN@YMb8>Xja) zDm;_0?0o(c1o!7ZN3(lezDb~qt|1g3V#Q)ZJg5OOrHnh_8lzRE{TD!W0I( zfoL0S5?08XyiN{X+%-d%BDb>346n4CT0;9t7*~08rZSiXlv4gL6WYIez=pBE4 zFAaV^86t^KDINZ3Ws65u^;&5Zi>rV7{c(aNJ>d`KM=7mSbK#(CZL6W#&5c19hIM??`0U$T%eu0nrpKp&m54=78q41I5Bn|%n7G;n|cT%s-tgPg`#QR2k zI6>P)ws4kbu`1}omCY8eV(C>&=w4XNy!PHXYskgf1d=u1lVbgT)M4ZG+I+Tt;^{LN z-a{UtV5*cfcLOx^b{b`DK&&R(+Ap>QB|$-6ii>U{c8_b zzsp>yq%K<$kdm%BHB$u6e0t{3<})mDh1|&eIr_6-xdx_W9WeOqBg*8K0k9zbg}rbw zBn&2x4CVM(MeNVAGn5`XeL~qIG#Xb!pfXyJkB(uDQO&)Fm{GCu+`WeF+d$Xv<5xYL zia$KhJ<%R~WEqJ(Vgzq@9UB3PZUqZ#B3#D<8Wd0|Auh}~cw5X|fw(&oyw1|u?2*i- z0yr8_z~>}El*a{s)IaX>)@DFD-rK-o`=JyGb&(BE%+a!rvL((@kdOam&mtkS+Pg+M zudoOC{INNqC>gLH!GTtpzt8mwMBEm_!?AOCsrx%P$#-Y4W_@tA(MVXTh1eF^9xSp2 zry@WcQA7+vAX9=3%(&1BK2K#kpyJ13L+|wru150wckNf~|I`9#00{rzu)vzpFgX&G z%OB=$7oZm_G=mieQ@*!c70JhE$L1_K@Zns0gce`f{a$sM;Qog{vEPwzsozOK%Mrdi zQbXW7L+QIVpAgfM)&m*$VvaG_tBwVRDMAv^8#^Jv{4mv%?Msf6%$*bNk^HC(-GbzU zdLPPRn=-U|Va2Nn-`yz%`;7T1(J1p4Djt9 ziwpT8Iz}LQUq<+keFr*&-W_-!#Y@f3nKpdheMLc) ze*8qvhzmJwY6*i|Ieh%$DwSRc=xe|oG4^Nrl;D)N>D*Tp3OGnoyDH^CPERBuh_yRWrXJ^GJv;{{1Uhn z*^12+fHyi{73kRjsHw!_-`pseB1v?m)DM6*mPv?yq^`IW7?QjYAvj>HzGA&d4~i?3 zV|zE6o+cYo}Np!-x#!wJ25#R z%uWL+HJ!gQTh^@{C?nGE9f{`$(yy8PVFHC^^p&_mP?la1;vIM6b&j$A56#M}86-;q8y%_4!d08y0u-uUV2It2U zdFyy4;Pp#G;g_!rEPa6ge_ripeS7HjF|zGEh-yTr%6d;te@LIs|ieHMij|0 z&@0Clo~a3AeUp!&jy#Lam;c1o!E5=6>&@_xu`z31e`5~dHSM4MQGNw7`c##g%3^?| zmiYZ!+^2>stUM_8b86;(=;QX&$CMuP&pR;vRWv-6ZMH(L2NE<~=9X-_JkXVuIT*7x zkRqtAj6T_Ks;^QaA_SJB7^!*1-*$PJE&O?SZ1G?`;N!ZXmLB7?rC-t)I`%BHPqzg3 zkxh>t5RXI!u(+-RL1@$_^+n2fI;>CXazW6!dF}kcI&+1+R|M`-;nw$L2hH;MCbr){ zR7r<VER(T3V&LRCyA=))Fi4l226u^R@{3wcS_p)t3`4W(+_LWmw)?{tCn?_}cKWKqw zL*}^QxQ;%+$s6eZ#>tr%!&CJx?|LO)Jj0b<7qqhG;~gV9u}VJyOC-P0EEmjpj%_yJ ze|kXaHq_W>I|%!IGu5MsqVl$jPD`tV2|m9DFRn-GhTh z*LSmJ^1dEibPex#gPZ&gjBbb9(sTIRG~X*E57aLYvNuXv3B@QU ze$WLugm-Rzx(?^$S2+-iHbGm+NQvha5T_WB#tJzu4}Das?8UjI6#f4Y_SIoghugZt z;LzPDslw1mcS!dDLzmK_z<|Vnq?EKuO83y+AqYqcA|Q0=KYr*sdWdR;^H{jQUPr?dl^-3Y?XdP+MlS$a44t@`*)u9Afe zWrFP!6((ZcWkZBUyA02(&o?mkeX8)`K9NZ=>5AH1V~R91gFAWt$p^*5I(O;>S7c|E ze_%W?y``_|z)*8>^oL0&tz;mT^`C@-_+V9)#m$HntZF=|ED6#sWkUc-1xpuNo#&lP(o`8KWXQyonI2+@u~d3fXM?-F=PKn~Evl=5>L zqniKr8}H3eRTWGFWXkYuO(_WW_DI25KAS@qlmn8q4kG5qzhA`2091g{X|h>4$?KF^ zIX~lx^|Z%h$#D*J!4nmB!Q|mo9}+B z%AV}5^j0D7VH$nW=NhZmj39psUPR;j2Xmwq(#3M3 z8QtegrIl%s4QHOnHV6rfMq%MS2(A^bWloNK_0ptb*!qWXc+*R<-i6|pnWfsA8HCd- zWipGj3@k=oig|<+c)Fi;VJ+%=>?2=`^)xbOH67@1%f1T^y%|cLot!>1ol;H zZl7!!+TR|r5ItPj_mI+{ut;mXlki~k;8%c@W`a9Hq*#O{YuVhHb$#-xGxkXx&L$O& zF$pa4)h>YE=as$#-hEYI*Jj8$)}kQD7$mO7g>tApCdg}%%~L_jF=L!XD2>ho`btD`0I3U^xndZ zqnLS`cfehysAcIq)UI7zq$Jru!bGi?tr~+IL~7uk$?ikE*rAr94cOaB`45kZS96#UAM}ap@Ex zu7`;nwI6_cQ&ppv`~ql^Z+=f|j|D?9lOcvPhM4s7xG+yHS4S~BH!#9O+owXfJQ9Pj zrUzV-kLyI34uL&;`^&=EfMTUXmUYSU%YpdCIR7aF-Gw)MsX%lK2b*gwIMz84Kw2-J z+BKGis+f12;IPX>Ewo$E8+Y>5qZ%mr>5+n<0(wx+RV#r#v}daMT(gQA$iJ#CcE($P zF&PD0{|oGnlVdT6Q}nL5HMK;PZt=YRNgmT}PWwS+Jecj?7_*4p;Q0%u=>RP4&-0Bt zh#g5d7K|X^l@I`c_FoFB-K<=*tYo5gRcHECtt4~#y!u=;^nfTlA600 zCtJ3uXr_Jbjg7m`h)KP19U~^Mn7S#TyPwH)&$ED|HWjmM#X9GSK>2qgn@sZ>T#R|v z$|Ead!G@T+)Nn~c#7G24Tq_leCA{-PUgbQ}8{vbQa10IGqoAFB2Oqyh$sL^clV+Pa zqDq7PaVSwrKX?W9oUEm8+TS><-W|S%eUT6rNn;c3W_EGS-!1VG!7sx?+U%%1LZKjS zhLMCcnlK$A>6Gxg#qtLDoXJI=9z%|Tgo_){v>5Z=O%PK9R&V1!SFap9XM&nZ0TB@r zvn{#dKwDZfk3t@bGkVJDrDfY^{|pev>bk=^lAyme%WrBN20T+OJzS%R++W*v&u+ZD zq$9|Dh+9`?QYaI#9HCS7h?PP99t7TtrPu2?f(YV16TtTMUjAmr7>@{4cwsvrdErH$ z;Y|CEA#`uumB7|{=$bIY^z-EN$ZaYjB}jNf(!l7$fu#Haszj)VZ_M|rH}_P=>Ci_4j7c}-Q*wb)D5E|L;IFU=yNKlI zP5bqW%(ohQLR~@{qUjS5<4CiM?ic?Ak{5YMw72`ZLf2QyU^%0UD60BiW<6)h~`;hIE31!@A~6C6VbWsMcGxvABZ%*%tF0@SDS@Q1ifj?%ai6HA2ls*E z*(*S!slo^oMVp^-=?ehR^!-Ar`ve9Up}(QFv6`|{XcMN}<{G%+w23LoJk2!J3wm_8 zbVG6wddz6z4jIk~{QZOTjRk1|n2BUw0h!U*u>Ng7UenV|%SeAL8THp4W0&a!*0^)g zj~o2LOYb=yu`#BR&il5Rtgj!HT= z9jMJEHwsIR{lazm%o|hhUEWhLqoi6X1|RWp_L{*$C+niKJdu;D$9K^9MU-1q=(_`; z?1wQ5-T!C zybNILN=M`dAf;9yf9?!If!L)r{s6m4J08BW)JfnmyX2&AY@Q`vpHXy572-#u{drEf zd#AqAtDrcV{jSusdD`hEe6B6=&HVeoUT^Xc~p4y=SttxGPAje|!W zJo{>)jj4IKRW0zlMN>mW-6nTf*uIAUmd75~Q5QU`h0~4m-7!FFL98jTWF$n}n8q*k zr>83QDsF`&(N^ZFTpDmqYH6)Pg->No9-D5-tTvVWpVvD?6)U4 z?&q3zqd=GW{Psba0mNWE=l_+7Bwa1hR!u3s3)UUJUumh;P*(94E9DlFcPe+W=QBtPw9CB3KSz^!&Rw@Xnl#&EZ&mEKww$oErmKys;$ z`;RFta_B+`9z!9r*4<{kB|}l`@LAw3|IE+Tf{F~sYC+L`0_~}pmCMhZ0KKnb1Dpvu zl6Vo3Nu(xp6C@5Bv7xl&M5%(2Ol)_$R zYC$Bi0u(p|BeTIf&bu-`SGw7jIY{ZcmnJhhaD^}Wst>RVehaX)-&PAL7q?+=rGR#r zRG}r4b}#9qjI=^u5XpX8SC2!1kT%85eY|G=z{U23^mdO)4`z&kCC{g(U3e#43vrf3 zZN7C#zjg2aXB82`QHzlF{5Zsu*}Y5jH-k8P%7$vmhuSN*lc7R*C~Jc2N2L1 z6o{q)?~p_Hp zw~nxM+7#NPinAC1bSwle{k=4`&cuS3UdxmOb*$*UR8;X&4Dw~w{vmC(btjX&7Xz0b zFw5Ys5tnqqFQd&vVe$8m)%wMkvcPD7#K-d-=#Rr5C@i$!!vw>74zfH;Sd?^BcM#c*KMh$HXR1*5@lbwfU~|1E7K3OEG{v&ypurtd79y1s5? ze-plZtlRn|u^=R+=+W8qIYh_&1rc)yO!J9Kd^m}D)kBj<8Sj0Mhfk%2?FH0jmKGGw zhK(jPII>sSXz)Qv2?%dV1?uz@>7Alp8UO^KT*TUFq|AfQZ2>5UlCaUyZ5OtD!r;Jw~%a;{D`26Vt5-knpvqQE-MU0cdP zVaEqbg+&>dg23hyIOYFd2+$)(R%N3H#XC+~5kZI>9tqLjHzKQ2^cFcfzAK8vZ3Z_! zR*X&3#Uc}mTjm^Lzjr97bP#e*9(YnAoWFE^h$mM2sX$BlE){wk8Z!+kQCk zvRYs$TdnYWUc_yrfvxmgB4F9TR%$c-&sy{zLk~sxjqU5`Q1JcI)hL;*q?f80H)r1QK?qZVhpTXv+>F@A5b4IA7ZtA;LtV2dUeNw5)7J1=1@Alpaj? zXQuk0@mKe?LUgRvI#|LPpF(rya9C)-0I?0~Wlkc^_Qy>t)^vTd zDAI@A-5N{VKK9#XE>I6MFJ(nEYQ7*Ov9Eu;DDJha^x}cGSo2#HmKT_`2+bCmL1(ju zuObgS*y@+3>~=0|p5Mjazk7}j%<>V8vvkHy2E&LNB|_R5GW*;&hE{#Ro@*D6HvO6r z@KnQ6P-M3MQ2qdOPUa5X%aVvX9A5!KP(gTOMXyf98Zgtx-~dn}{ueh|fu-Mr0W!@j z9tKx4H6nuIE$n>V%5K685 zF=XIE$hkj&e5|-ZxCw2W06AO;+0h~dq8nm;@J-T3u@JRq@nv_DRWlwE9F$@bz|tkD zAfRILvG8om}}Pl#%h85e-|pxFo?y%^^l$(%N{{^4}9mmXlpm6f|BVWrz+Iv zFBTC5FH&*oL^h}2nDww0_7OHW`|dsVpGNsHQ!&yfEYB5t4bX7K$)0}m3+_)@Fs>h8 zrR7mnvKoX2FJ&F>KewbD`;__kEy$u*mPDo}dO4E{QNT_gn+M!f>HI2-Y`Sn8JdI7# z@TcO+*||^3;~B3$1`d8P7Pqq=e;}{JWRE53aqEC3>j54tq3AFya};=N7?yq7&`u>! zTNWC@M#@H+&r4S#WQ&D>0)D&R##AmqAF3|xe{e+f5$m62Jq&BaEO^sE<~W?sTK*IE zMn573m)lT`IkJ*-OYfOJO6RDfarU?JjkgtJBXX`ajy)bVb^c0Qh;vD(Lf1!qiPDT9 zz{U~vD4B7EyBdN5&fXtip*uN9Es5&*d+kIQCqK#@rcB4bQ5E*Yx02XZXR_Z%GRi#d zdf#aghr>SEy4t5{Pp3&FZAyTQ;Y6$VWg14(%l84h)lRN+my6(e60lpYNwtRhfcVmI zl3bryFHZpzvRPS+>GYmeN$3AQTd$yea0;T_m9DfohfD9K*@B;x1`Jpz?xw z*`WT~Gx%}ONW?xRia}8?gpa4wb>VGBakD`Q`nsP*g(AP{?mKo7_G2S%1y@5&&n1Rl zVq_y;52tHGn4zxFJ`qA7pcO)J_(kEHU-7C!MxC(tB_Zt6tx=;4-r9*-E=EEXO7Nt8ud;X6Q^UKkL z04n#0gjc+pKI8{o%-YG2b5)%&9kUC=9TIoT?-7msKAeHi3lg^uBJoOD4VV5gpXeLF zOaFH&08qUABuG4aT8V2tL>C00gPqUc6z4ePii5A555G;Pn-js_+7olsmWoW0pB-_; zzAXQE66d+}b+x^390T}7GOcf=-t&(eq<}K1b{?`Q6%eAM71`LmG9@#KTzi2g)JwSa{albIf&NgY*c+sYZ180#O!85Z5!rj+GC5uZF@SMW-8;;tK^vF=S& zyJrVIlOAPkh&r83T(}C7oxD|X-oE!_S}w|Gz4(PzGB&ce z-SevMmIwYP#SPC?yf+V1%U+YFGL!hMVNuKP`o;R```>#ZXE2-6}_u1o8XRdNZhYzVN$4+IbTnRCoJe5Jot^%yE(?)fQ5^bEEOS?JgN0;;XH%ax_u{-0(yrMkn`=2K=2@ zJfD<(FbJfpe34CH2{)OK&lnLAs{{?$lPL($`4SzRTp6%X4cJH|q4#|0ZkWUaqx+^J zf9K)o006>V^nZe#Y5?NEn9&VerHpKTQBS{A2nrY}DHA!=6H*BBMb7GXUp8F-_4@oOP5#- zek9~3QAk1|MtAj}5GpL{MUH!}sMci_j-)YvHSC$;0eQLiO4)ma*K1lQ^b(*;=%Q4G z!BJ3g8G%1VhbPFOSKEC5@Xcz*Aezl19s3c0)?nX~g&L@kFx+P96gUATq!}~Xu^DF0 z>G#j3mtwP0sK0I=Rm|#7uGgFvHfvT9jo3VWl+{5@sV7*J5bMJ?%+utB`V3nM`OLC% zYQNZ;ZPU-)d+wDHgYqdrdGD&D#IlTGDtHtgG!Tk>3vY6sx>#0d4I(>f)Owne*n|_i zhchC2n~I&#HN1RXjLmS(-=-MEZr!UpMqkc0;}J+*q7zXYrb#VN5g$sSC62SYf9m%} z&TFB}AFVF)+8VbekH0TywXGwH0L1yxo@Rdun%9{$`L7_WD;@ZBR)cD^MCwoyui`N4TiF7WpypJQJ znE850Xeoo3WJ!V_;XBzXOnki8Y+5M<(g$Unrj4KM{<`@nV4)aMw9XBpu&%`)oc|il zZ_lDc$Ny{0BFB6KUxkEqfHIEjx#b6GS>Inx$R|xjdCb@{in#pWoJ*h1Eq_XJDQlXx z1>Ej*@0URmVOFcR^wZo7gr}8eI3(fg_ph=^&;xu&3JbIy$+DtfRbTk@nW0AO?qXKK z2Kt}naREp=qN|ToCD7*+ao?L&CRHpLa<^~7VquCPiY5akloebcZsGq>8HROlT#D4p zy{F4bC<{qLPLXp&ja35D6`)S07>#P~ll{P~%(cxHo&rF(lmp4&9YoD%G^JEz-Fg!C zaao04p-On%(fJ4UmtC1gTnayx8EYe-xvzRZ$a6IK_qT1#lG?v zi-UU3ZHfE~r0@BQ;)2-Yzt}tR5f9oBlidRnVW0X_)*m(q|49V%FoFOTA0YNbosbFs zxU?UXcSd!Uyw(yAz+!|6{lAwJbu;DaCwJ>>VyM%<{&t!OAhur(3Jka(FM)%Tf!?{} z2(`*UkO+~DjE{6goR}=^A4A%HVar4Ef1n-qSNm8GEyQKKds0vm&U*jScLYg^ zzT#yT&QTK@NOF=*Db^D|accFAd+=ORk!xfbpRbPyl@7|CzHtDQrrMh{6p5UXIl!CK z^8!IOx)9rnirlVqoXQ~~9Jdx_X}^R6G_u~5jp=LymMS*T#0{}u8{JbBmAwqHj`fbF zc-SX#p8HZ!SVik~{XI$GY$TIy?7A~_kzm7Y;0{p-KReZSscYvyiDd~Eq z3RwJauCqtTJ^=pn7~XtUApekxqeqay)5i1lSQecXFs3OaJpcsDQg8%{$E);Lg|*BT zLtmgQqzPqZPqgMvWMxYzj)-RcQqF3U5muZV`2@PZuO0@R=66j8u-pzY+eWcJfBH%? zorfqdV91%BAU z5hP)X&j>9-{s_p!ZsYP^emCOh+;(pOo3gm5q7OE9mho)UNz|Nf=YVVqW#`bv2Cv>lw0K1%AekrI_R^Uv4e-2hikX zKzI3XiW*8o^l;Pz(%>(i> z9|&iODqlZq40zpMOVpGoQ93F8S@PteO{;+jaZu?E+hRQz!SpN4^;O_^t0GPT<#^$e zx}RJkp;Jq#CR^NH1^jESdmG=!PbXKDd173`+bKcpdD<8eDRdCeN>br%AmT=KAncld~ zAZcF#r5biVskyJd-_G?%at`p{YRr40^#U(mT$Hc|8lpWSK;&l4E)_|SAnJP;D!~MI z`EGM>z`)WsTo{-)2?rkZ5h|{N`G2TE)SHw;4KYa^wY6Ofhb{)MHE@;D?*L|z1I<7q zGeF&?9|{m+m>dYU4G2M0d_((0JiMRnoqV{ics@IFia6T#ipt@~p7q^tO^_}_>%~d0 z^acgVrN|xJ^vj*#JY*uG%LwZ--AVzgl{I?I4d(CO&E$1))7E`qo@FMLG(F9L&GG4j zjvCw3DRuiwUEnMfgH?UAnMF^;?W6d2r$A~36Y#&6$*cYUPqL-xC1vhnl?nz3jcbIa zl89R(=d0}Y+k%|>YU47%+SpJ-ol})+&I+Qiqo}apS~K2c;XfS;{mY0(#4(KUWp4h? z1?jBTE|)l9`-A5~US`0TNOj?EA5uF6JzdQwGImRU`JZ|`k(6#zqffI8o&Pj^Ux+D$ zGm<<+han~|8`(^#gCB}Ib}x@2i~hqX`|Lp@<3QT0U4~45b6%I%_omlwUy-!l79Zw5 zfCj`Hr8^4Zd`5lE3ZgF-Bq1KNn@*3mCK8Z#1Qj%(4~u{jQBz(=`n$L*u99(~pk{+o zXbh(5ro36%-V21NcD}a+(O`3omWp>63I&E3WAZd9ly}z?p!e<1j5Qgg_jH{g{21Q4 zK{1IWlNG2}qpZEj&Hmie#(8v5gl3PQ4B{?c=BvN)8S(#tG;gNPb zcx?a6Gdp&4)zXNC!QE$|n2M$S{J!kLT^v;H^8vVR!XRTuB!m<<)hPY3SdN+~Z#dbI zRD>x~{*7JQqt*zvd)h9~W4K#t5zoWfcveU*Rb7YgmIG`Ez5Vu>Z@xmnpgEo2%<1`E zeVo$mU!5Ao9$#85nb%3Cz=6bcv-F{#Qs}ZVOMp1=8XsON8$2U3MdPp38T1N<=ZG`V zcbv|N_7-fSod|t%!dKy>EY#VPc*;K?0~83ArV5wx@3CgsGL=tJ5975^POR~?Ze&(k zgHicZh3Njiry6wrT3sS=Jx7$jp5jjQWm(-FC!Gi_yVoSP!;jOYaQ6Mpf$RP<)9BWJ z;V6iCW%}WdX7HccrxO8!V|$6H#vhXt1_bK^{Z{dn;ugJ+sy{y}VzkH>2XIIf!4AOV zhR)VttiQ^CkOMpX|04whxCS@bD`-RQFJ{IJ)CnbFvO;?MBl{bbj2Az@7Ifr3KLYiX zxM>ZX-eE?8TG95_f~m&6QFpk$NXn&KtWqiHuZk|^X$4Y|QY63&MbyT&JYw#Bio#P5 z@7kYVtd!;bfv5RKE)h!0W|#|>9;b85_$Z#4tu^(hQkxJD8_kk6qrsUrH9X8V^a-lU zp4F$Z+-o5n7h+ELeO|Ol*pz78`ekvyo3(bxdWP95)l6!hsQe4{aP5r~iiGzmi8cMiND_Vri?cjR1%Xj>!R!Fxn08Cm1sqv^I>lY6N znjV0M02UD*#;r44swS=+c)S0RQoR1}MB@S@=ebzEm74bl>L-2Iwp0$XK**e-MSIBz@EU_^OM_s^yH&1<=fS6aOJ+g-iw!o)8Dw@W?y=SEz0^}-SOnRJ## z&OGxU%Y^4ccJ-}Di%&ezG+S4U8=Ge2Bz2HNPOA*>WpCnDB`;TUQlSzwm1yBoFU9p8 z5jxxCkeBHL9v!EgIMC9c)i`^5Vdf^j*qw}*%ts*4k~e}A4QZfJQ;yGU~?58me+*~Z1!wM-^$pxK*_wPv3H`gb24t8 z-0xg&5onIN6qMp{wtO;zdm#K&Hf-xclOz7O8A-g_T}5rs&gm*yya~8AsdymO8Zp$5 z7VpzpgnaqtjRF{Ep~M($5vM=qsS!Z7o^#f>*Lz9~Twyas28o9R2AEEOA>4i1#}ad^ z0nt7XstsB0JRCr;_2*4Zn`lrEA4*J(?+Wi{snTDPmB7Og9`=?s=&iT?w0WkkBs zSZU#Y%uQy#dL0*J>{QrMxg;Q-m!!?QUvk(dR}bMC1>pMR83}@Y>FVC(h_Tzb32;2g zmnovGtX@SX`F6jWT$-$#yvhbDBTB%V zBIq*@7F>%PPhw#8KwO}-K8f>A?%b|=glhj}SYHxuh)yVspj2~;X{qqxNr6gOFfF53 z_vf4zDbum`4>W(mchi4ClPA9vQXRTSkq_wfA@z=RNl0`bjPO=cyIGG7;K#*-7F=9m6FE1$(=FZfl(P)gd3XBFyLv1o?)OYp z4_O(~TH+&Jyk2;XyfxjEds{+b+hDlQi*W`^_GS?gm2U~$QQlbeVeO6#eqmF!JRNjs z-*|){ta36_-78?#b_>{+U)B6|9RARY^LNAI*sMqK_ZQxSg`tr-_rIAq)xW9clL{lI z;v!Y{I?n06j?03rW>y;Go1M{7xy2u!$th~%e#uwu+?tBmAJI4mGJVeLz}7|HQZ_WF z*QN)S7^m7N>*L{wDN1?j16wkJ7UpR}wFt(i{!2BwHNn5#d>>m{1RKcZ4uDX{D?B*x z=K-|f>{r2OUNNTlkaB?UusL8`Zp)fpKgIf05nYD&Rf0}YI!D~@epVl7GJ^GRZnq5I ztuZw?OXosX`@}-vJiyZHkWYAWhR1&nDIwu6H->5umh9sn>8Zm93|zsfeS`h2Hdn)I zY*Mn;%qwE2*E)$P%QtF#oCHb=z}DaYs-0O4%(l!-)zJZX`51e%@_O?k{eqrhAWQbD zXRmjBiOHN_dZp+qhn8~n$OH2out~=z>u^!lZ@;*+?+fS1Bs$cm-4CD3DHV17=AU_u z?~-`)uHDwxX7a1?#K^~~MW+>KR})f(T%=%q#^Y4Od&bJR$mhJ{iv$Hy0*?|~-eN~p zDc59{Jo-SB-G|g{D~xgJ^fwfzvI_Hq4vbk&+u*pb@3)sQ9(-_p;z1}N! zyCnyzuP5s+-3pw?(+8V7aqEO$PkG=pJ5U>!Zi>&SFPy?ntR+_X1rq$!nsyUmQU zyZoz=vnY2>kP&=U-TU)2!a>zO^wE$>tC71h4@EU<;vZ2QreD z*DYD?dk>8)eq8l8arNi9oc!Ndw^G9?2@zd#5(%FrOe)o_O>*c51NnFcyyx-hRlVq$bK+2&Q2$QvRBZ(;iBnb$uz zw#Woeo&bXu%0j z(MG}NtXm~4wW?R{RSob|ROOH9CwU8b54tNmy~_)9%~lujY4^YPtq<7h)M)n1juH?y z?Bo;fu;1~@?sVBfq&%v25~IU^?q*7WYk7J(TSn&j^FTcNYCd@4`1UV~tMTU8-s>>- zZyh3(47t~JK<~A8)Ll|5XCXl5<0!P7O4=EsuSg2-`wrh-N(+3m#%sB;zWRI4{e$WQ zv4A9!?mrLgL@RHPZdDe6C&R&?`|dUXiNyz%Z<)>9KQ`DK>Fa)wW1F-OA(0s=#yzG4 zqrWnN&W6(;d)!*fbLCPx<`9rh^H?Ag?(#o0mrI#6P1Dihc@y=>?x4L75i`CzphY5r zgU0WPi3m2IKZ&-?rs~mG?x9R9oRIiDyfE_k^KgmbYbnyjgRALx!le}vitJmZv%h@- zkHxau0{x}*Ad>jIU!r;?Z`rIM2%S$fPKKtwHXcWz_7zQD!MH!sW>pErz5Evf^K@imu8NS~K3OO@&=*O%R1Zbr|a1mOcnGQ;@qi%@~|=TFZt!itf%cdZF7? zS;wh@%AQhRet9>oll+6Zttvx~i%XAdt3ZZ~#*tcJf|)8AA8vPUruIEZ4pD2{g^aZ7 ziLjK#bH3&4LR(?UoPx94L;VrqK~V!Wo|NJbwuE-z4PI^1Wl@a>q+cdqvGgTTZMl06d%$Or5X$nCxF#X{t zT7muiobD;B=EGbx@Ex8yJ=R1!oFf_fC`86ir14FrRbE?R3n#L&?DmZrpG3Z0U)0&B zwIT9)6nP01pBb?Xs&qoxI`#d%4_bU9eA;)Jg2b{fm0}7H;vc$uL~aG$@Sf7Ji+L`n z`&}pziaa?Nu3r${s^8Tjn)p+-qIlK+DQRSBh@_!7DuaJu4#s!G)TmEi+ylR!`ym{3 z7W_8J^dZc>-*@Cx@x#`eOvR9sFer3heStHvB$p93`F7U@-@8M9-~I_373OW54h!ZN zuj7W1Es$KA7fP83(T(^>wYhg^E*jp{dUBjjaQhvwWx9{8 z3(8JDONy@>kk3~1SaS0iQliY$ZU}y`)b~M?1}&*>4)4K23)=yd^b1WaejFX^<}h-| zQ1l>CN0`9pe(M7*aR~vf!SyoqL4R6Jy+D(Q^2T$$JW)*6BYN%8WCV0}G6d_NP`$7B5LGCls}-JPga0Um5wp-k#P-i)EMK9%kfm zf(Wu4mav82`ti(vr{AQdSj|e6)yfXplC-@nHxgd|u{SjixtgX8A?^_I0kEs%yak1C z^j`jdu7W4w+injj6EB-H9L#vyf5ddzQx`t4_^d1^@tAlo{<2=jRESbF``3kiSF#)T zm#-Wj(u-q*B^B6vFAeVt98BMy!m#{ZxGP%E-#(cdN?WM}HI&5Wsw^9SaMMQb&RxnW z4%Ymx^vC;|UJ)!WxdZ~J4bmq^S7A@OG6dm$jh7z5TG`vOK4bphuV$c0X*znp{n92S z`2FQ_x>87sl4&|=jvMtejlemrhl3w3`Grqo-Ag4?Qdc|&AYL=MAMTMDWV>AUkjkls z&Hm-Sus9X&(N>o{nW~{>ksYhwiQE1V?avpW;Y{vwa|QdLg?)RWK2mn9|IxZI|Lu6d zck|M->h%FVC-A zHz7a$XEk4UX#d4QhGay>Lni?H3rHpqkFlg#fx#=KQ}bP%A$rJR5@~=8swwNhDX)C9 zXkw4h5Kp~Y(P4tgg7ieHPi;rG15JDbaoutx!nNYy6z56rGYbO0cY}l8k@;pa=!ax2 z?6jWfdp411ERtmPf-b-zTyan)>^x_}YFXD!xvK7FB*$rEs?*2LhP znq7XL=68^irj+v!2$V3{e!HGF7(7@ElH1egS>52eX+B>gTzFzLe?6m z)+2*wzYT78V_kv3yZ<*0TddT7IB`KY6S~z^)NC9@Z8}dAu?3*O7zc~?=*oovc?yaB3j+x-E9Z(m4XYlKL<^Cs6#j#%Da`)9Om zvwN4WzvA9$bo@*GX>nw#xv>+7@F@$86vxSTrBqrvk6?y%@xOIYc1N5D>$}Cj9{83A zTGHN-F#7-PnD$2o<&z*==U&$alzn|X@^KdoE8Q&+3r?Z<(G|g?TJxKVIPmt&rQ=s) zAHr8s{)MVr@#m}B1>dW0%%~YSU!GwobVK7nF8Al3TV{^rwwaO7{2vsi>snctx2T1d*T|G#YI#yOCSC z)wqtgWJaHt+$n#XevIc>gogpVMiFpw@7$|N*kJph>c^v$10 zMzKoKYn9PBq9z^A#Mk=Q@uq7CJhoYtWTfa%P1X?6M2|N;nIsYve`w=)3wyklD$uz# z3vcVdV##imsf*lv7@46GKR8kJ*Wlv1XTu_+WSgAnZuQeW?2ut4Iwg`Qr$@qrIt$|}|8NQQ$H!g=Jr=}Qau%A?6 zAp3={z2zNI3jL$T#X;xWr{x7d+=G`0OMiF-8yUTa%3hj{Fm#)5T9P8o=-L5=Kuv*# zsHUrBb}7RWsEO7p(G6pFC(Ni{SH{ZE^`l%DO+i%mP=*DxJ*mWiWR} zx!oR*UbXQv23&JHtx#I!oh~-4d!2pz0)I690eVZ%7%(#WEy%~9ZBvoI=<^Uu6I1(Z zAp7on28Nydec^NzD_bybc{KPL)~z-r_qXMu-gO6g76B`+M*TH3-Hr?T!KJbMd+MKu zpEEeLHX*py;V0P+-QTpdH&QZ<4&URMI)hd;cef7a@5yMNs%nLr;pFsI<0&jc$o$D> z_(BW^=px4z~8S|4l>TQ_xF1LRIxDSP! zJ!vx$Sn6MgdXbG{ykTL z$nykXT6^LSZ7PQnU?AKGNXnX0=nqWT|DkU*Vu@+?k5az{G-W>2Pv@-BADyXP;${aA z`tXE&*w|lv`c}MTHOrxG8NFW$4Z>ybjnB3;4Q*%a|xz9v*QwLLMjYdDWpO-R|!g=oXyfyC{S~fLTK6q9LT2{_t9~0=)^bHikgNxzj^9>=^O3#gYWeZisXgbhflj8v(=sZgnUzDU%!>`0_I=yXim$fc zFCR>f(M4bbLypNySqG`qxxfisRS-SgYg)^&TCPqj~Loqji9@KnpHa{Xeknj1k zbElAM<%NUkc2VMYl?P7(Y)$<}hwUDkm)@r2nu=xF;z^HvKPS$(S%r>rwpU8)z)1rg zkM_wX`HYN$hN&zedss+10=gACL@V845uyY9TqPiurM~( zed-SViJaBrF@8^0S}rJZ`k=zps~1TywwuP8wzL}&=jlCi;?67&)gDam^(BZ8l^`ag z@BJcZ;<(nKfhP^gV?2yKyY$zigNsZCP7>)o?ZcdZ>*4#}uK=0f9$#4{M{PBbG{DK6fEsXSmVY6Ii4(B5={NEMbGk;5q z=rAwpZ;Gwe_S41`Gb~*85V8F-ywWat(31GI-yrhZ%2W0!Y9ms^`TtP%)=^Qv-TE*M z(lH>7QZs|npfsX1NMj(~-5}DP0#YgsLkys#fJhFY5|T4W#}LvnAf3O@Jm)#@d(Qd( z)_d0bkIOal2ea;b-#e~-?Q7=@jm*caL86KCN;bZyFlDiu6#o)vd7G8}N}Z~*$yKaD zf5v8*>(drGzUTSOH@^iz`^Dou{iQLovZEzCT_|h)Wsda%uGG$yTX7>w(AX0K?Ava; zC_6)Z(@4tfv!#!B?HhXPJiy)-krZ;n9ID;HmlL!eb@Rw%?dHMU(Z+->v(7VzI_4Sl z&|$UXgz^jsPXl;y30x}n=j|*|X;I~&C9zrfDydKN;pSd<2G>iRyk}B3?SgF)ysp=G zGoldzr!5>Mi(4JA&FR2%!ji!|0hY0KU&2~`lsvx)wGBRa>G_lB{mLjB2kG6JR<=L# zN8`Bq>mpFq4hUXHv__R5)m6QjRejL;a$^d#@U?c&gu*!ufDvyJb7k{xKaN0MWRpOU?>pp>QIr4 zEz{OsL685Q4i$p#ghSrIPy+#xeDw6Pg$@Tw;zsPH%`2XB zD~2DDb}Nzh2?HT-0S-Rp)nU!+6MZ;MBKK%oPQp0GX+zn4pTHLzT+z&=x zUfTCa56MdO$$ky-AY*U+d&hTYI!fGWT(d4C?l}uNv3T1dTMg=oh_(Yopt#p!wTU8? z`7oiBH#)8e%EOcfJ+{gU3L!f)~HMbL8PWbj`n>aATyWPD3K9t*^X zR*)_iWsg9mECkW-B;Ri7&%;eY7^ZKPLMm6wDURJUfo5`_x3va(z*CcQijb zpKE5g8exu(<7j;N@F5o?Ip=C=nR{bc8PrOwNWNyci{r3nK93yso$ZGe*ceYHvCyQD zwGLQ#JnCD2`<4VJ)e}AfnQ{_Y(7pqX-lEv+Kz5GTlgKi@eOQxfg72#K-uIlb1@y3e zxf3BO@YX?#Wx_jxwei?x{AMw3%Ly@=9DSvgEN+C+~X+n>V@N(w&3OGkO$eE z>*h9Rqv2Nsat=E4elEHsYb7LlQdaU*xk=Ay%U)?3m5fZ$DRXpteWp5li?_!3-pjsy z#l7X0^HQ>Y!kwSNN;bzl$Iu2Kl_%M~>s5o@D^A~-0&p>%FZ#DXV;LmlU%m}Y7Gv#C zuRGIy5>F;`#9jm-b+eLUD6~wq^4EWKny`6C$V8w<6FeRq<4sGuFF(z_D_>grNLgvi z0pqIsQ2ax6h4R&v|DfD}FHv;g#y+_<-Zdrw&ReA9H1kgJ z+nU_in|wXe`^L}0&JHc|N3WF4Snkry=mf2w;NEDdqPhzz#-zlWA1=SIGCKT`Cx4Ye zv;6LXtu`)EUQVXyBz-e}#v=FoTyj|HYfGpmuzM@(il|#5TP}nu2h_H9_C6CB@wzW{ z=R0)yLEvVxsz)Tdzl42UczfHgMJ&DV|!{q|2#)qV1&aDi2sg8cWsl|sEzOwj&^e{eeq+K zC!Js-12J@*MTWOgLT{S7dpdhOiPA!6TYBb~R0KF*1^*WQ#tuQntXpQRHtT3P%0oQ- zm@FebVsaX6ZxY%}7x6TZV%u{I7`KD6F2*5KC<6C}x}X(G zf3HV6!Pi5>*RTk0J|jjY3Ju}y?{`3*+BwQ8CthPyb(~3eR(0P|!nHoDUlG!8;JaJe zM{54%6Fu*}RjKqaOv@zcgTB;vy^@!&LqM{3<@JO|JYt=}IMDV8q{VcFmaCFLSCk#`csQMtYM^iyB&o?1TZeNJ(dp0W-a%sC#^0 z+`O4@eb!tC<$ZMsMtfR^+}2{Q|A{8)0M!fgiJOu*ME6xr_(15*!tMV2($Yd|bHc9B6Drf)NwQRF-vsxl=zB zV?(6*H)%m#wzc@xd(pUC2s-%WtCPJB#z6b;2a0QAv>5NxAwihcmKoa3D7=AVKtb&a zPH8#(&{gM3i@{Io>U7Uz`?Xn2B4>c}>B`zB$)LS#3u4r&5+idPZ2J2}{bzji@i2J@cMw!F_@@KiFCql^6|edTDhTjt z(lVL*LE2)dy_%1MPib-mxFW^Gcn-e$59NwefiRSS+Eu?8A)@pqx)37ANb;&0A~#B%W2d>@@FbX`zK1 zFTd@pk0@$He1q3|sZ<9=g;D@=;)~?ZzQe(Xh~+~ei(&oBbxAq}Zj)%b!iVwNPn8FR zHz!>b)ICm|(j{J@|F+cl>dVH*OBy~Fm_{-F?(qSHYdrc4M!>+zRmod{OJ@2dvcd!M zvkCpXwH)@hFk<4jGa;gncdY{rgFo&H3WEW9eH)JJNjz?+)w(kyRGQveT)5gQ!5235@*WRa+d0+w zPlzRClwyy(&2L;dl#3f)`iQ?oL#OBB;T@N})~SbgPA(H_56`pfM$1JAsJ!L>60n-e z_cK&az`3{7uoF_;QE84Z2|p9bY|uS_N9s0m;<~e-YozpMY0p(HV>;;$INVT#prWiy z_OKmA2|0 z%1npmAxrua4Qv;w??qC=nmaM9xIUn>3@$kb_jDq;43X27*J-{4=Q?w+0Xc(W_6M?> z@CdKDq+c|Rm3q{4@G7g3IQ;r$QfhR%lbTIIYm>Fz zmMdhbggQw5sb+929wD|8k8&}`%_E&@7m?n=l1+}B1w$V!*!4Mq#l;CflgexyPux)KpNMC)CykRoaB!z9xy$7q zWsza*&Cai`orM5b;DWLGcd8}DvF2}aPs5AkGK#;#(#P4=;m*-K%5h`6~R>~~;miR*XF0a)s@94Gl?(6Ry(W{ei zl7eN3g*P6q*5zZ;2yODoKX;^#s~?}hGwVJaa*+;T_3Q@UABduWyjQg7%ONM}09Jo% zFdd0Zh6pKP{W>gEFK8CXjKo~aR}^*c?9r?8rcO2-i4FNGjR09Vs&H%L=iIk)$Ae%_ zUXB6^kFkr8IFU7vbVL7ITm5e8b%%+5HB>o-(c2LKn<08u1)-zsU`l;Uf^Wke~2d&bp zMm@3j>-70}bHJh^`+&qs(t+hrDR*=daT8Zp zZ3!Y2zRyw|9w}%Xi9YM*)OR5OPWv-ilZL!T!J*2{V48kI%hS0i4t=e?79)<;kF8i7j3y^ zAW0CytJ;D07yp^X9Ug14JF4&WJ6!l-jY^~f78DXLCT<@KK;gM!ccR+qM2nx&_}Rx0 z6}zXiMe7?_gZUrxsrVpaa>D6d9U+X*m`>S5FuBbmT>Ionhv{vUI?!FQ5UhxaR=uD? z`3__0uVPQ3bRu;JG%#HH#3Mzc)0=OT4(bTz;2WYoO`nc=v?@0DrobTKO&vFc(4?c1 zU7_c!zCH8~Jd~M9#mmxc^X>>#0nG|8v05-+une)B>=UNu(NypTO~n-g5)+_xMY-Zi z@mMVdErxx#jBq9S6VS&8SaW^g@E2wQWNKaHA|$#9A>bnsO?3xV&_`43x28cQM>&9j z|EYhM3Ne31c)Ds6kF4JgY$cSP)6IE$U(x9_(feZBW*nLsJo~^up!q#A&9Es6Ry>f< zkiE4CtJiIv+-9zaJs~`kczIkd5Kr5<)`#+5W|3fTC+hrO8p!I{nbfx>6M3f85!LU0gSjwkV~fD`u(Q=~agTLtTi+ zK;*GLp8$~|M4jr#U)?o~ht7Af^l!3LW61HhMMDQ?;wmK(i|{;3SS+XfnFs5m37uQtgTS?|<(D7{+jdO+B8(TzQOVI0Hu`cuf=jx!1M{T4JQ46D7zrCjN9sq| zuMeZq*1f?$k1Zcib(P%>F)F@uB28u7} zRD6+lz_ON%a8+;5ENLmTn6*QDEk5Qk9E^3ZbukSf82C{fYii;fcEwh>dA5qS8^B6r zVeCi3347Gehp3@bS=`tq*YB_8N%!2QxO^dG7UPuZ z;o)B=*)FZSAy>>PTUny2O$mJ9e*rbf zxAu+&T{|OQvwyELX{oUtWbU5Mh*reCcdtNR^8<oqH(;@{vh|dmnQEGh(UxUU2d}$Ycl23p>Z@Sd_z({P+T$!^xPkh}k@H7R$tajd zB&3ZIZaVZ>ojgq_2WDQ1YaYiXMHAU&{)rM!o{Z>z6h9u_zUo`QCG-nVdj+4I_s?Zq z4etT{{5Xo|zzEled_vg0GBD{9AXU}9-%PrU3yiz*8f~b|M}Rvf2&-dI9S#pH@n=Ll z;`x4Ff6u3E5}8}k52{Z}l`rXiB6eyYEBdysQ;x{)3tvrG0&FZfTI^cr^?I4wfE!;UFd(u-T5{Oi`=;WP7M;2!hDyr zF$~dr+)Jff5Q=4;gua#RG60G>1<(`^=|`+0qNcM9Q*#6GU7yi$-ry7|Ml5?%V*!R3 z1C6*D?3O}gOkD0Ba<49Xe?(0_l@aM4Q|4??(GM+zH^aX zr+@~SO?~j&>0!Cw9#XMwGg_z!TH-viHr(1V+M=uvzPyE@sCnfP6r1}L=Zn_x0=SY5 zh=zxF@agxM!v(-6g>!J1Kog%BI|Z`tG&zh83}<&9 zTmd+^nic#(ad`hF=>pgV6Lj7f2cfdm2m`SfQAK~Wb2na=9dxEN{gl((qL!Ocd1*Ae>Ppkdwo*Ch6wa zc{f4@#G9*c7}{^Mq?5)EvpYDga8wp=gkJ)YoQx#| zI_q}8BFyMDMRr6lro zkP`<6p=XnG)Fal@-GsSSt`*x$FKF?#Ut*HLUB3`UFewMmUTxiicUYhB?(>^nW8m#P z$1-z1VwpJu&azA`*fq3$daHTA`v9Nt=|E!*hA5^-vxE-DG<&Q(y4_W-E=KHD5a6Gu z_7zMIe~!yy`SJGY-OD5aEZ+D=gKwRv%@<|RktyHC#n|F=49}|~$qT*&&Gk0YY#%De zZHqNpiw2K5xb?sg+R!!=&^?l@PfqurrQ{tFcwc!nz4@G!)S)DO1zclrS?6#pG*$l9{KEP1IANd^<;C+Y&& z6X>OE$}kYy_f=bE?MK^H98&>=Q@nXvTT1gaX9 zOjq2sCP8Am6cxs+WdcV|j2hwR_zi}tyH-xyFe-(DN@n~*$cZ)&oe1ah^$2cn_}X=- zdTuHn+@)80dlmUvf}pI(<&R3BH6mZ4ER}MK!uP}7wT%e2!0`6uiI@5Pxdk(?*pNAK zn$>4X>T#-aws!u>4E$_MI6^&Z7-9IUv&^7775c|H3c){uV&$Q?{s0g07Vr@HoJE1@ zr^(}tsh3#omd|!xnYC&_jPEOs7G10%^b;u@weEfYJk*V{F@Lvb9&VJPdf_g1Do`w9 z^L~P7fzW-@A1XfO0xAJV{v97H@O6!A?o&T`^_${iiZ!I>VZ2Ln-s9By=3s$CX2sNd zc3u+569{S3Ha~&voR*s+xW?Z~mJj+A=F1fvDEGZXdMt)LSWUe}S5W{n2V}hDfL^s0 z88i-08CuW{Pzw7XN|h5yINHN*fA1G`!9@%nlSM!^qpZWg)7AY1a^;8C-kQ=e<`BZ# zk*wk8(EhSS1&3XUKdiZmEszFArMI4C7+H{HJm>i&Xr-%XqiB+@GGu;4omDM{?vF5} z3%WxhvFH-6e%f8$@8>}s+qL%h7(Ss?`HhZW4e7CgR|uNiUbEiUdVFIUGaoLvq}@zg$3RGmm31VY zXp|BCU$K`dBq?UFQzwL6Th=?Zt7*oa`}9G09`pUmxJ=%?y04ZV=pInNd?J~kOJqmn z{Cz`*yY<=SQ!EXlV$fr_-~Bijs(eN69K=3GgId!$r*OU`yAOi)VD03*sfLIX)Lf@3 z6R1P$SiU9iN}u}|H_~q_J^=DDu5zoyAmDsx^e@#Q?BttJkTziT>f0M%nE-Z{mp zwM>*ta*iT|QN`=jD3W%obgarC?+symPD>5q27DTC{37Hf*R1Q#p#DzYX9nMpW|fi) zeZI_}TIyC4C^n`4z&$c|t4f0KL6{a_^Waf4^pRxkVjXXj%;lq4*G*Ix6_N6*$=yvZ znmpySGV}=Cfo! z9y#2-Suk$MoYd~ILr!8bb+I-#rJ|L?cf;sbTx8rdTdNRi#dqeGdTr-gZRcKXQI~c; zCribpmRP!!&L7kx-m0}bp-_BcB>5wnF__!~|GSabUd2=*iq`8WkmUUKc94*FeKXDt`R(79Ej+JDHQ;)M*1Dg;wx zS=DI$<>J4}-PNCMJw-t{f4S-+{-sYh84c))*X-Q;0*LAZ_cpvLVwDEq#%XF4c3l<# z=>E8;&BF1s`rJ*G0B8PYSap3dLzK{l`mmYK)?C=8l>D>GYLq$s5$)!B zO?=AV@v9B=E@h6?c*O2^+WP1PMHBmxw<$qtuTVvgzO9*#1$>3I_Qy12Z(6)|Y!@9* z^uJPgujrS>p8c^9kS+IoMvI2RqtX>|i$EhBp&F6kB2a^=G|(CvTU*?k-Z+;*8j5NM;&^_$-mmm6s8fy6Sr3dqO>Yc1FM=W;Wxk9u9X24$b{R6(0yed_V%a{Wn{%~qkIxd^$qECQ^Jg&BjcXthQPsARK zCE{}Y(|ucmP`BA3irHuY&;Iq?uqfEH+%j>SlESEO-Y+-0Z{uMFQ_f6B5k-mtQxf4# z)McDrQJ*CzA<`bR5C&kB111L1KkilJO~iQ50EWUT$|7R`++8>+CLQ%y9TuvKZ3w5Q zj=KO0Ny=wTV+@?rl?PJps&dmmOYuAnFpo4ZopZUh?W(q<^NLm>eyO-ntrdypA$sX| z_fQpAz%e3(e0w-=xP@q6OX^{&tXW7(xCMM0*2$Aop~a8ig9jpX+-C)kkGG8VJdr#& z^^di>6go|>J2PaKY0C?RzErTQFHi|2RUSgGm-o20`mjh1u^VFOsJL@IVDg3uI(2bX z!r71v6Mj7ciKiz^cX0au*hdU|&<3xmf%KlqHlEuEHvrEmb2?DOPZ!M! z+>VqA?bKb;6*v|?gPV|g7yw;#n4yhUR56a3{a@N!JeZY;9%xi3Ma(T<^-?ENhphJi zJUk!86Smj=N7JhNPa@=?<%_O=DT^QJQBQBa*2q(P;v@n$>JX7~;%OI)`{c8v$+EHH z*;~3V4aG{SZUN2sCoB@qz>Qe`UvFe8&w?jFiomXdqp_ahh*$F+Dh-@AInCM=cg$VF ziMlA*8VGZGx|8JE%6BG3)@UHu{+MqE_@2DI0vX51u#A%4bjg0pY zh6!^oUac8Gdyq_BFIjQ9cX0b1;6Z!z<~B7;`hr`!T}>s&qQoBP$u^1c18%()yVgUV zt&y}BaXOatXGXQtABN?(8-v61j|&IdsCb5+i5n1~4TVQPeIb0~IQFb+0N22gNw@}u z$?Y!Ssq!1DnoTNPF!Z`G4B^{M<16R5=425t-R{zO-wfTPvoIO+K`w$%Y`qJS)nI*c;*pPhDk4V--K8KQ6#+0M; zx35GlKF-mjev{YR+)B$|i%Lt0l$4abXKz(ckP-i093I&djH=8Y&;s>72b@j+^IyG9 zieVO5tQ1%Vmh*3Hzr+H|ELeA&_{o_bj1F6l)m09Ea!4ep{OR6B&$BzZYKv3LR7)EX9V$YfOTxC)22`Fqi&~cdFvxuD zN^o=xV z{}-u+zeo%X2;$+UkhT{*CPq+WdBiG_^RuK8bp_4UT!yOK+}=)DRK=W!Wsh@_EBj{Z z;l@-ZAinK&E)#`$CGs`ohUYQ{GS@@ap-;=TPSg4e_!=k^cL$qFJ~0HZSePBp=2TQyDlo}MK+g8K$P@<|bB5kg&a z5MY(eN+0p202#$FM!nLzq~zFwp(z|g|~J%O`_>GPa%OgvwQMfr|5FkaUwDxsb~G^y^b zXy)|h2bpdt?FkpbkZfeuInJ}HPbDnJm#ud8=|VsqI(o324{RlqtOShH;VzFZ0)qVs z>S|k!z{Ch+BivqV$ePN8rgVfuV|gOLa?(Rgf%<~c=e~RF8&J~eVW~JfC}6ud317{Q z3F+IB)rP}oC9U8zfh*I#*0a9pFchveS9=dy=Y2LwPlkc0m{wtAG|?zILOH|tL)||< zEhJ4>{H^;!AJVUW7m$fYV}UBPrj+&Le_I(Y3UCE!8&4s0HCQ?9mp_nSj7?ncsD8b1-F zf^<(^;1OC(2PO6rVPFYy%l-(is~dH5V4Umh}y7zxEvh*))@vTp?8#QUG#$HMwX^Phat`;bJJg7Rg;uLp{p|}FK zF-wN*tHzt)Z7DajS{X^mkcn)p1ezQl7ONxc?NT-_rMd$ec4Ee?wQcO2& zX#CEx%|9K%ISMBn&58{7*pB)JWkH(hN(Mr!ZjwaBHYh|noEZ$d{rqNjg zq@|IOf#qi$1kzXJan=Nd2J~7grtyA`ow5E#Z{RZ?)t@y?4MRRv(3cVOu?r;i92=h+Cw4uEa?I!l(g+CC&+c*3vwIro+~6uugV z*U)ZO{xJ1J&hx0~vyv%@_O{CAiDopruTEsBH($hmWnXe1JkR^+J{=8g!O#M<9RA_3 zigBU6#b|Zk?#wuy;sx^HM$!147`jN=J`rHNL2frn!`SaHp{ZZ4Q9b-)TaGDSfxUM9 z3yNopF{iDEG18ckq`iX5tvgDdo-iIy`g6MM7c@S`!EcKnG5@FnkD>#pDPPexWc+eJ zBiwu9Q1DDT6BhGwFke|u?KloE3d=lXQ1Vw=ZUYvWla;OiMQI%s!ztwE$ih$ZTtx{KH~Pp>j_f z;w2tYBx_Q)y7OYzPtwF}3LxS+{pv$2hV27>2zA;ZvYZKo!cj*NTU~Q+tRFXFk>n&@ z$pB3MPlhC^zYyTJ>)+UT^6H0j(C$06_;oP-g>k=ZEk`?;wQliMuaJ$dFwR-&AvQcklV^^9KfnK`L}|8=<09_4)_ z)3DO0Kcv2ODfjlt<}b%v6#e*wB9gtNfIlDk{{jU-?hoOqoJsl}1`eqEU=C+*<{m%~ z1qsVE30AeYyqw@FmGdG+M0^^0z3j6V07*)r@Cdkt9MY>?#7iFPrrJyEgRsvX$>QZT z>PSh0wUkY{p+j)=Gu(*>VrSP1@APRCm<4~9IL%XheU*@UFD0+^&SwL9!h=VELpnf^ zpd<)z^GbD%9gIL934t@pA{;Hz&@~sqW?)Rei-)WMC+{Fqp~j|b?hjIhBiDD4I2pU& zAII+=u5N6o8Vv>z9;RF0n;2B^F?rM`?&u{{`WTIp(3>eIPD-zH?y-W81iUYjZp(#9 zi~qT5wF&(RHUD~~pAL8H+`@feDtue(VO!7uOjq7OrW(5B@SIb@RcpIQJLY9Pj^ zxEYr5lp>h=7`-Wzb+HJCkPI&Qx_a}E+g*NqD(qeOkiJB zGfU|ROU4UF+nBz3|3>0J*x6aZ`|tya!j^Ktw(I}ltzOXh^;_$?gQqQqx!ud|#qG&4 zC`b&%Hs4pihyFW-kqggz|4b5UQ9$Ma?v!uripV=HyozgN^E03MYCzhOH0kKAR9$ip z2R@o=)F{i6T6S>FB%UYB_hZg*>xTaC=0k`qH!{s;?lG^cCpIVfhMRA9iYFtR{K)eK zNGKC{ahU_=BF0--gwDrB9wiDKY$^SRYsD}xdUVW_R)PR4zk@qKtq+_ z7aBl9s;%_qfPTtj(I(No+0%{fQ+*7OjQqN5-v~TBO#pfNcRvL9DZ1)LU)caM`=yQ{ z|AxeDpMV5Oo?pFWl9_WNZMv(;#qjq5$rrmm*=7Gtg51BA7%B(dPH z^6>$$dn%nyUw%9jcbfIvQ5V!BAS?$6Db>tTnZS077acx(+BGM=W+?-H9`_HG{r7F= z?*lJPU@mDH=pBpaG(v{V4r!g`Zd~vujH9vzMvWNWPZ=rw>j(gKp8xd-AO$MRiw3@# z21KuRos_w4d%gs56uST24bOyYT6>bZf4nT=F^ibUKt%t_MjuN+d6?$JN|M><)XcWp zi^mVUPDNX0JkI?%^2n~}IQtCKSVG76NU+&M{J~*Rdb+Ov_oqH$;DfvVVY$ns?%Xw- zhyH2~&#B+DFK`1{_69bO{Ezn8f11lZz+4{v&P(dbSTA<7ahPr7kKa+D9Tz{pKXlpk zLtwV1Q)3}vCsvv-rS8qTkw!wSBLfDYlz;G+ii`0LBv#RuO;T-sYwG_k&%CPQrNM-e ziL|o`(558}JZ1;LBE}EZL4r9$VF6OK8+}GYcfN>Y<+U@%y_cB*3GwArH7!~~%_1Pe zmkMW)k8NUuz7N&MZ)ao}F)t$xZ5YCx&|5Vs3_jFIeeCL_6yQt&fZoi(70#~=!v2kV zm#jT6sw%fOM(B&=by=Oz%6z~qsoun_69o$-W-8g#U)E<|egzH&_2RXM>?LmSJ1aVL zAIua;gN88wG#5Nfq=90mR%99aCNI|9%?sH~G#rsxowfJ&+k+_6GYdPd=j*@VOfro-2Y`NogKuj;GKSqdhcOa#lj+h&TCnt2C%;d+!Ws z$X%p2+~@g1PdJ3F@4dvK#j?Qpq>9@Jz;O0gKx&T?y!aer0g%QN3(}Zo!wZOjty2n_ z`n*;mgx+WOx5jyn4AVC3m*V%hJ7>Av1J5JVc&efwEPAQ^K2 zc2ocN$CLY*DDNHTBy>u_454>Av`n)tFOZUZ(1#k%Ui;o*vdyCE_MAe3gt>pYS7x(Q z<_vkI?O_dvk7PSP)>zMXxWsoDJ5V!DNQ|m(W4@GEDgVo@$vs#5;?t=_)x zxhR_*cnB!^`g@L1=PnKWQq?|xau)M?KD-;ut|YJIE5+ph38D37m#Oih>#}s>D}VY#_|;bD{40?#ry;Wu@|QdY^^B)D~g-A@U1Ug_NI)2!)!o#4vh(5xF+#(5SzNL~s*}3YG7&->DJ_uRvC< zu)4}wbtr&zCE#~F@~PxV82-eJlUEQ5=N(o8oKD9r3Z_Ef-kAP*SgOEbN&MkS)9OsK zo`lAkZ6~1@ukfV*e2FouMMiB+P#+S2VaJaABHDSyT&SS_r(&Gv&7+e4gk2xaXRbqxurNSFcvvIs_0n54!AoMERCrFI2B+C_5U;> zcLbfuUk_$!JKpGvQuMCq7v}P%U2ZqrP=(XCIdOx z=gxw@BYFG;{P0aq2sMkV8loM)64nY~@PW~!ChI{8EWXYYs_0+$o}<@!un>4ht2HQV z6(|B_oss4bdlZbdkKkz~WggNTY=~M@<&-YPPSBOAy>NI2Vtj&2Kc|MP&2*TXXxZ~# ze?2}o=6HSUXBkh-=g*-4klrdTURJi>y;%1NqOJLPa(y*`H$&n6`>yvPtVQ0w6zNEG zZt1&U9PWh`vk$F5r@WvwF|i28joD_e>nzYRF~JeQ>p0|5!l0+-A&)y#7P9i4%_xp= z({HzoBAI?p?Uv2w8hywJ7*Rc5Cj+}LS>L>~I&0GXbH%ml=W8`p;h6sX{PY_|1wE#o z>8tNV(FeWhTKPV`CcsUkf2sVZhX)8wf?tLV1dTW3wp}#P?}@oUDZiT=#Zd!iTbRV> zXEhb$QH+9}S(hu73BEsOSPv#_k=8xQ?(W(-^nzhD5 z6@?CeqawTNP`R3=z5l`p7mk-la$I=Bq@%`zvX>oAwmb1fTd$}e{t(R13uBz!6qIXZ zy2m_}s7Mb#W0jc$#tx;DR9@HTqqfffesZ5_5se=YH^3%O8(Qn4HG9j+XD!tF-tXX$|yJSFTo9qkMP z4@(Tq=i}U(Q7pYo@vikZ8@}F+MElM+E$dGgnqM-lDN6sgfYolwx)+e;w^|8uE?OVg z{}TNCcS}vi7n0)^5^vVc&7d1Pid+UY7DQ#~l8{>$2iXkk0(*Q;3+| zMgK%Ng~vfrbwRINkNN>u^qDlaWL@NrGVJ)^V(n! zCOP*(&L(2L@he9svi8eg_)~8H3aIJ%kDk$a_Q!9cZa*~sf-~XbYOt0oMb~*x?&3w` zko5(#aWa>TN7q-uRxfeWI{zfc3o2=&{mhvYn~T1a$3-_i5TCs7n-o5nQ&s{Q69^C> zSq2gN0E|JW4+QuB-aaD4m7!T#(Q52YiCezVR;pR15+Ih%FsjorG7(!r#0jKw51=2(Tl$b-sB6kz8ko*s}N2PA;*rX`AazIWGAd|W(Fm+6UdhxUg zWRG$Z(Hs2y|L$MfX2-vM9Zg?$JRik8Z2H;wA+Zg;oCIs5b0i#SCX`x_9t-tL-1y~~WW`FS0lcg; ziVqhxg`-g)`9mWsBdfY0(*jEBxw{6|mzdlS%at?kd*judseC=P=nkD4`~I)s1SmZ^ zwuLO-Eoyi^;?u)GMlUD99N`d=5_1uIU2`G;ymlb^kr!3<|6paz*pHZhWRxo5asmJC zQxz|%ti{4+_kC7ALd;w7HWl8*V+gRMqV9_pZtk{yk=xb@06sTx@0?|oUqGe1RgZqL zPXW3EF=aH$3h-FT6qTR}ra7m(ooRdBZ2?=v5BW|1^z_i_{iiv3zjcZ0y{ab_GJtRc zvHZ!gVUw>5e+hLTI{qfu&lo{B!BSb>X>~c52H!7wZT6@jlcG{qw{_o18`dE>^!w=- zKUS3*px0uc&s|v>RZ>=x?&}pKiB>C76B~54E}+BK5jmFssPcqmG3jp++1qzwWfHZo zcw%4tAI{!7D(e1g8x@cc36Yc(P*O@722dIVhE8b|>5v#&q`N^RrH1bA?(T-6n?btI zckbu+yl1`7{hoE!Ie)koYj7={Pwda$*LCe{57t+|%Sv=(h*>h#r~HuD6CPRg(g_Nd zm`}0Z3G#ya8w*`6-BU@tA!>)M3PwuL5Jy)6x{!h8pKraXI<`;NrxLvIB$_eLX=0Ff z-{l3$X%qC~0td7oS5R(-0a#krFWI_E22O}&baF`0lkk3qz;u1z#$d)ETB~I+>8HfK zWtaeb#Ox;r&f$LN?z)G=`rn~ID3LlQ$lqoc0_K$XL4{m;7U(Hvzc($2C@gh7x@mtGIk+?rPlT zDf^7=6JPIs(1Mg)fmzyrmwi=8(}5)7`d_J_mr?Y-Xyd=G>$WWNxEmI0ufYkel)=&e%l zmkdj1I}MAsI;rJhITz(;%X=OQ>z>u}EJ+C0RDzua^$L zc8*f4NS;B~`0p;(iH*m|MScr*TtP={lqLXk3Yu5&8{)wZuO|CE0aFnqS(}HwnEXKz zx`hNiwuKjj%eR?Jv-J(ea8{K#;-}W$D=ugSyptKjh|AMHfqVO#fz(@Hs1epzs^6y! z`6qJ&dQ|=gBQb~uI_Xf-druJ5lXwJGb!wWmrwL!6icxj)+v&2Yn+*B1RgX7(73CEB z;$WlK)0qcTSxK0CRbwQ@75UQUk?tnOkq^(6UM9ckKsj(;+eX1`@O;JJ$ds&D`_gl; zVBtgFVe%g7pybR|Bgv-9^o07?cbIYtKpIR3P0}(41WrVs`uHTgPY}YCe?+L>T8J)X zEne?0Xh5|7BFBOcNJxP4Tw-(r{}OO=IbXAVl=^Gp@IKUC!$9eT7Y5}WoYozWL`}Uq zte~gl3pXey9csJWx+U-r1qTFmBd0#x?S2|lJnHxuY~Z+*kfwN!jsg~pxcrg!>|G(F zs8*B?#rBSZ&CP`qxo0u`!ivf5`2H8NjP~sZ_&d+X)u6TpIknXF27I+6)6!5H5DSJS z5Z6?vljaS8@@p4>5dQbFo?-$SocA=l+(PV4RC~`Oxwt9>`qROvg!rnx3hC-|>^zQI z?EG-11SEqPHT0(n@Xg{eV8ge}qBv z0C(!gq5huskJW@DzTEy3AT+4EWZNkjbR&*x_uB*<3GY6{LT)(3XyYT6G01|BTim;k zp;Zx+?G-YIavoRo2^ZyU4+qc_y4gN@w9sc!mX&w%xY*9DkVLOb^ z$;L{;)bg!BMhSP^8v!{kBDlkdDO*RfGMf|mejE16V$K#X34~M_hOcYrzI8dWwtKHD zh9h6i*0lU*I$hRm`@3M|8-o*|P&t}CS*G^*^(C|O9^<0|uHjL;^1G6{U;RlZ9m{lQ z^vGxN^+eQiG@!(;-}q!u;Dk2)J1hvS2GIzftVuhyr39^3Tj5y>CYKf?v9OHW#@7@+HU}`+ zBEW@G8Z0jS3T;eFMJut2f!z-EY^5c7+i{#^U;-)&&NxY6HA&$c%=ShD#Ko#M^~=|jX6~@<+o?M=6!4?-BZtFT_vjpP zN8d1p0{*W~yh(qym_rNOCMlfMHjNUUyx-Ql;j8EROTp57{EY>TD;EN3U4TAbNoBid zFK2+g<{Qwq!mIHE+E}wVi4Npo3S$3CbARDM%Cn8(Zv<`g+5D0oNtL6diY(gN)A&t2 z9y$l^zP+=19g1l}?k+EB){QMI){VQ^;09LYntS}frRJLn2oD$sbp6;0B}~7GA%_IF zV3*MT)X=>^RgLAzpL7CZC6hK%09iL2t?*Ye8kCA<3NWghXDTR zN>V11e*x<&FUQ8OL-4B*84Hw$D+Q7LIyy($2`J8X!-hWXgbfiZRBHj#<56W7aWltm zUl6eteApxxS;DHy+=NgmD4k_y{+Xfu{n?O70g*1U%&fOc$byLhAsBQ(|R3fwTxYUDHh+Z%CJKb0{NU7mi z+&5Cdj*qOX5&${B&p9+^0yD9pvHuRFPeHr5lCPZXUxz1AVZg+7`s=$ZMhCZN_~H5* z*HO}fc#f)LmtO^S6U>y9UwQr>Y=7wd5K-5R#v%PbB(Nx{mVNAv zyQ~N>K@eBG(1P#z@SVQ?YDc~{v1sD^;J+Ia8Gj>jRDhbuRR91Jyxi`-0=h`M_YOX& zaaCKfNp~V2f+`4SEbqWv!&)g}q+hoqjmiP^w>1=yEKP*=f-F)1#M5H@6VTpOiTJ3p zmnke5xf@X;ocxvzp+%%vz4g6%O0C~e%UkiY=Vj?8`0Oglh5}4knIZ0G?b?E zQ&6N9Ng=p2F3W4e=4!=?^DP?(b-p5PJpE|q~*=Ux;QbYJNuETs9YRk9Ud$~hVX z2zzUtJ&3RYbo=}d;`A3PM0pIdBifPjEptcV*`kBZ3oBi-ebV8doFxV2>k~6iBM15L zGA5lApr3AWg!(3(ZjMJpgl=RU9H`o0s|zo{LsjYJ)5+xvcI2OsMI;>OXc`aJk_bLP zGyJiifRTl@CfH1-IT3>vI14W2F6n?KT4vV!Amj}6h7nsR0tg)c zAyuW3C?K-<gv_%7IKMbE;dHTb=ZiW-LOmM zA!MSa8a9_HvW%4Sj@HlT1Y`b zM_SY&4f3;D{H}TpGk{nD&8gzI<2`&pKPZo$+tg?Gzf%LM-&vOM8n-@yUsG~|Nn>2R zk7-xGbr4$U2i5`4XZR>GQmW+laO8P5fOP@{cK=OM-k{uy(|D^g`TZ{gjaX*2Pl*ER z`U2wZhglPh=Cse;-Uq&PCWuI}h1FGP_ve<)M;dRbw_>%%96_s9#U-3wZybE=o~+vubl^BRdV)R91DkZ}Ps^o)mJ7~R<9m7i9oPXRnV+s$uKCSg zO;s`iDqxB)!(ST>?gPfSOpAW*sCKgdOa-1vo;g6N`WmrsT8x;~NRnM-c)?QG6`8`a}&w54lV)V%B89j(U8g$1>nVkr@?O=)Oo?eWdAWe;b-NWSs< zp)q?br%|TL;%=#N@v4)qA;xrB52q9ay9VLkHm z5Vo$vHq;&PHBcJ0F6>4NQ;)p+I%o@|KD&s^_rLS36~JInXst?$?N_6#Gm)R)4r6x| z)X(N`%muAom7bhb;w!mj%ZhE0NaG4EPdWk6r-+c~SjsSE+n)z#nkYI&RiaOftL15( z<7-p^oXpm=qk;(;&jbPKH={;m-!Q_lZ73SfISC-UoNp=}09zcy?7E@I(eW?__J6XT z{GZBRjR=xRFM9)oaBzU5yzb|fw8@7?g+fmTkDQYKFnmJ4U5-%Au`~~h$h?4f)BE$0 zl7+w=1#J(+*|JwMKW<-VbVz$GOoTr^^y$TUS|5&MF5dYQGBDd0jI|v1G@Nu6<2YK{ z$~J&?ohcFU(of6fD-oT5K`v5-^1jLUQNsRQMsWWnqIP>(3H8rwZ8XTKe8%m=^g4KQ zQ>zfT5ZYz@%8;D{^H=+v1*tkJJwA#J=?_U05|ZgC6GAwdMM~@UEcrs{rDmI5n#!(k zk-(>Ts*H!9&+Gw{6NT~lS4B4mH9$f?jP`%uvHvIoIZ)x9Gmd#Ajd?ia!ZDpQM-=?_ z#g0YaiW0rfx+F9|!^FLE$O*P&J~9>l2xFb>M#;;)ed^!|=t=Lc%SO`a`EgnP)M$Sa zPqb3^MtcM^^iMo%bU3BwfZD&(Jr*R8?g7#+h&$85F9LBut1OCGXzDsS=W>AB=1j!W zBp^Y|9_o&j!U;ycMz9Ij#v!6qL4fSd+AvYSnIWC>2_AbJ;~`(uymyM#&Qb7cVlysn z3JiWZ(GW@op{X{W*dwh?<^kPX@`|?kl4@ENQGI&mE3i!2oi}l>2@J#~e)mp-;dlG; zx(B4V&bjv~=^l!vc-lq9n58z~z3*Gqn&S2lV=L-p&=i>0&uX?dpA;uJ;}k3VnvA>% zTH6^`^{Kxt%B%Y5NOd%5IlOt=FiS*eDLBcq9=sAJZ;@}eFF2ilcq}p*dc5q&=O)MI zzGYPa?|*J?mrR4%baSe6wzORc9q-`}lQ#^&Rw`t;evjN`jSAxUQQ<5_wnPH0M5mT< zV@EY((Wq)a)tGdtFfI1@99}S}(P4s?ZZ|Z5?joQUr$p*qm1b;JE;3~g^*fw9%f|6Yc$P=tkYH+3}d z{YcVVZCA~x+W3V`GXSK3Bba7`J3XK*iG&TVy5Veyr~<+~;NeXWh+7hq*Q(Tn9iM-H6Cqfg+&Sa*U2&z8e!1~w$%0~psrHTCy@tP}!p%tluhC(n@}m6c z43vRJg)tk&4L*^er1&ZcIYRF;yGN~({AhdnQa>;(gll!T91QZskkBP<4n?Eocz52r zU91T8I&S;Ac!R#~4Lv#IaBozZtET?gIzg=J+WdA~jr!wQJI=w;2WO*a+8s0U*=Bhb z9H{+5j~|*YpB3skAPtvza(EK`j_?eIn>Z`0awX~ByTxLF{k92!TV(lf8p9neRdtWU zb>Vf2Yh9|!}2e+y`f zQ*MGC=%7*u&#TvYFTGy;QGNT{=eQy@@clY9<~s~`bcyf^$ke93q=bx+Zo(YQR$z)h z^Lio@%|r}vucSlt<;O%1am4}9Z&;p5dPZw40#W-%($;!_NcRpFTA65p;+`o!-etHN z8EAQFTF@E$G!}t#_CSvW)}F80CC^l9jS=p~S~?I>z{~&5)psX^HlQ~4cAHA*bnHJkbZcH{|b@O1qj?58o>YG3?80Plp4;H8A!N@}fR*jvsK zCfgxWUcH9#kOx(~_u)o_Q2{DZVT7Az?C{F_M17-~KO!0Ycgnsm=g%#w?HDx`ynpO7 z4l>uHZ?iQL?I*N+Z2OKwpG^S;oInTaeB>bi-=W}S1Vi`qBh#&OwTdq^aF+&DMg#q} zc-(ky=HTF4<|2>Xd>hU!o4Y_M9IoT(B^^hP3AzqWzB;96{V35I2JGQ}a}z~PlN(F_ zy>%sk+ov_dYlFXLky2e4zgf-8?+?(i)(pvZ)UI!>@j5m;5U~BKDQ^H|Uyxfq=mg`z zC_rSqDehus!pr0xz&$(`{V%X1MRY)U${aJcmI`S5pibuXBAgy{dF5Fw1+iBm#R-C| zmL37Q%y8wuUWh&m0HQc4jc`*rEH!<3wUZ`_;Xgjj9X|*v_+Zx>UeeqiAwKW@f=M+? zHDRDgLau5-%2$;DF3yJcHpcF5kLuCifGg1SR#|k!J3a}a9UY2CVeit$|o`XGH zPb6ggSxk^u>Olu0qg@I!?<9=OMmQ}*EZ*7Ei$0Yu*R)asJyqb=I98M`P(U`SCVd_k z>JzhugiF5DF4bJ~y>kyAHI;6nCy)aCm44~Pc2XL%Y>OP@;i6_~Rx)64Z1-zx22Uq! zc&C7VB7d?h7y0dx)H8@{US~wTq zOE4W_fXIY*lhrf#ZSO!w?6;gEQr=!}hIqqi>z#8ZjFvdWx*_#yS(pt51>*&7|)TK zaW_)~sLwLrP%#2_#F&)OF(qw0)EtBWHb>WJ*8m|Q?j#iVPE<1BgFD!Q(T5d%vwS>` zrI=KB4t>}$Ap&EB-37umUwR=emk-a&?3DPuB~qRe9V++Gp@8hVju&fj65bUJRzJ=x zSzUETTzsvOV%lk)fE({RptZP`qpn;}7>c*|!2+f(#J!=guuy0O%#p5Xs5OSgm+-9G z)GmnZRQmL(M2A2n7;v7^R(Y;5C<*!9(>n1<%@=Br|J12Iv6u!(`BWp95$d(Vf1hB} zRmK$Aw!|YJ`iTggv`~ZXG2j2J=y`}Pme|KJ-n)9xWPdy^nEQnnqAK3Dx$i6~KeRuTw{k<8&GS)1L z+lCZ?Q*7j@QSeZ)5cX?gCb5#@-n$6!a(714brcBEGN6wHzh0sGqku7$%`!{R?~gye z*X2C)`K7SBt8=UqFc7a6jscq{SKTeVsoyU_4%A_}$Po zU)0cE%?b6CFVGS?teQRM2`^SP5srzI(lfeF+l|-M&=UulXVw4L(UrbeFsDKSI{~e9 zY!5uL48c>2eqW@Ow8MPd>TT(o$*rPz z*9sJ&AR`E98ELl9PJ#6OgKl4%$$S5_$9w%3vbDBZk7AR#M1QUpr@us;6Z9I$oXjX~ z$ik{L+$r>AZF*LdJN_VnX(ezfQYGITE46AO7*F*PcME{IcdrNxl_L1{8;B6{@*;UG zn1cumZs^x!{IN6;&l`SVu#5c@EZi=zw80l6vq{OE*dUL)G>x@$vi-4fingjW7t6r@ zOeApj)04Z+^@P^rvG&UEZx#Mr{!OY$Z?OTWCIR>v6slu40lviE-M{7mLWz7%#5P$+ zZ3I4iqq4>Tm=nuTa+cwp&e2SLI(VeuKp&sZ?Y>l-6pb(8Z9meKduiR3k7`j`enX0! zy7e&x4yaG5-GKHA{{4TisJ=J7f>6AI12VFt z4?jlbo=3h=e*FUZ%?r`jZ$7+yO&uHgLcsgUvuA%26@+CO(6G=f7j5GT7N;7D_uW?b z50_-(E#qP;p&q>ahn9(RiKg9m*4q!Kje4<$o6D~$UG>}NUOC5BuK;#cjxhK~o>=ba zj+hBC+hD)fan;^Xc7Fe|iiz8S<1W1wIn^t$d5b}vku)lrz;f&BZTmsN17(5@s%${H zIh9ihWF3)WqNGcRsT`9X$d`7&RGM=;^j=`#^cx^GQHlO%DorY)FEX zQN~K?rUc)xL4-C%?Fu)Rc_Qe|qrRyw-$e78utB<>TbiHk2Qhrx@djJ$?A~Q9c9x;Q zuOf2V3^}P*;SSqxRc!Azau=q^2>Op=8GTfr>*iS91vR76 zYc1fb#J+nQrW2m}gZ=>)Q$uIJX1Ll%UhMar8{)1-E4=Uqb`UBkyI^yjY{zqFQ2$&F zNswlX3l&sGi|Yd>hv*nSWHgSDpM(?yCIfV=>AO&!>9$~ zM+;@LhmSyc=ZO*cq$%rz#j4ryFsbE|ruQK>G}7<>jIu<627b06L00PM9iRkhZ@i~M`FAmN{tQ)VEvtOq<_{$c?VmuIGJSoYN+g4FW?NL)i>I# zw~w>F?~!he8K{4mxmZGD6G+VO^KGhhDwKQR@(*jQ&!J;NRlH=lgtrr6?{}dH%Ujn$ z5?-=Q&Tzm7L^u0p1{EoF?H*8^ets?!gxrTXH71N^i}q)jpp)6^fB^$uRNF%f$K1Ry z|2j@A_`*lLPRi*x3Y(o&3QQV7V z@|E8(=h-@Tf$X=8MW3N6jheR=$@r-Ass_2+X}y)!J;_0*?CpX;7bcI|o)-aI>RkP{;P#9m4(9LWhSb4 z0=3m;jSw6R84(YA9?FJ|K%Ud01>KMaJvIRY?}>?-p>E$lN*e2(q27v5$u1_>%5a@l zGdBSP?7Xu9-r=r5a_10Kb$9B7&(XxXoX_>3gmLFc=o?cDK_81vIYyiD=qX)j z%Q>amzE%{BI)QQ^prC=6Wmmbqn1007?{9M6secZ4_!hQ-qx3osc*q&!TtDrZe?z=P z4wska>!^@DwYp71H1%|DxT*$zYyQY(dZ);%?B)vB&xstUiI5xm37x`DIrp8Ug3EOc zFMaHUg?#c<$kZx0^|RkwX4y$A?ZA4L4dnBo1!0-N;087!|t z&L>_EMUOaVo zb7~e4-cB7UbJ1};_#F>VT$u{tl2gB(+4#-9p}_B zy~Gq@aLhVNO3CYyW=z!eiq&kj0#Kh;Wi{40cB}tyedl`VK7-Gwk`OBY8ReguxPoY6 zx|~3w5L9nV`q2T0RO4%v`L9R8*E)}g%L?(rgcHn&DrbBsM=YC`ENKn-5)%0AUQn(z zhVj6sN7eh$>SXeLyn(-h8D zVl0p4Y2z1WGw-S;8e8X@s*@w_bc5w6SO@Fh#t35aM3?T`-WC#J4}GN*nH%dY$- zwZLU7BWP^_Oq+ebC_OwGbfl~;Y^6lJT`@u4+49V3%>`u{D2MhEovRBfQy(Fg`bJr| zj^ug}0lIKdB6;fPeh#@G^g@@vCt1`G0a?wh*!Ua>QN{v&x)~qx0op|+|15TL0uG!P zlPl^`3*>*|@_-K(;@&cn1g@UqhA2_=_Y~iRIAn(pS?4^{!oO>_Ez}zng1<2gB#&>0 z<;=P$z?+ikNmi#uSXlFXLgmmKt;sH4s&?Whezh;FnPXu&GEJcWeJk-JJ$HJct@xyg zDCC)XlGf(tdw~kG!?lOi`l=eo?N^6!bGxULwbVn!ApCD%io$Muyko7Bn9NX%sP^-{ zyy-diD_yFwl3urY$W?AdT>u zfBQ*hJwB6pHAvlFd|Flf{d0r~ycV!qckFLuF#NBI|-Er^!{L9sK z2eWE@llz_I?d%jMhm}cAz0EQo6-wO9b;WP~|~cECd8QDNj^fOxi= zb`NbyVC9-Vyt9fvLTOIpAh$i@NLTWdi39 z^(f79gJ9v#)0!;{-XeplvV(yKP#Iwts9bZLwS|Ug=ksxdQ1JkA1YrVwN-G9nbZ$&g zknJx6dV74MRkOpt_d~;=nen#?f6gMio%E3WRq3);aCrSF-X*gu@>_7gRqIQL+?=Nj zE$-*OVae~gw=qW3+C?`uG3h@J3N)VY9-**S2u>!|3`$uGw1I{e>b&leC3FfZJBZw@ zqCX3|5cqz#JpCP4IE+4J9Au=ZBe`ib> zpfa)uLFJ#_1{gDqil&RhQSr{2-Xdx1eoICl{Z_eZk$$D5yqS4&#!{6SJ8v)<_X^I7Bb4delpI%ji~podJ_$%a$lg&%IX<^1jQ zEcaG82BDP0IIqxlLuW!+^b`u$)=lU|H*;V zd4XqmTqi=>L);r7Z_A@F+;A921nJ#qS?`PwNti&EWQg-zis(4WtjoA>*_B|*gV-CM z%X8W%qx3Cwm%_CDx zaZDFBa@7${#O$r|3SzH4lR0_{D*wLpiwnZz4`7})oA3?4MD;%tgDwupDKZ>$H;7L5 zt_DD6TuT)F5;You_Vy`{*KY2hLe{8+_?LMib`3@YuvGY`<9%&c8nC+$$<15>2y6fD zTgwfWy&T+l^Q0FT=MeUT?7`D2$B?kCo8lN2!yS=X3xiCeZ9CL{7FwLWNh#!pcRJo3 z$z;M$Z9>(jgkqj#9&Sjxm%3l-3S*ykW2;hcnd)9r&f+EU9;Sr0Wl!UP-IvU{4f`m1 z@<*MHi?jSxss!zhU{>QL;eh>I&j3awg-g^?w=`J9Bs(T$Avw zSv&=4nSGX^7U1-DLECjxqz)|uWRiKoA6UZPDh%A60Qz;z%RV4`c5T!hY z97SEc9I(N%IlqRaVau%#CCO~3@4WRWvtOT!-p^D|<8!`$H0mn=5s#_TqsvHB77 zftpjQQVhQcq$+bikRo=t@ep78BNdDe_J`TjKppl3 z6*OdnV=+4Yrf#~IzJ&j!ioa>DmvKe02RJTMw_!y- z>;Luw0IBi5tfIDuWR#LkGUn^^$^EpvM^r%n#~Kyje4H&QCvp_IL0hh%J1tsu%V(rD z-?KI;)D5)%U?&XQ|0y5)nci2l2$_uw&|jW~?G|O%80vSS6&5Hojb5O;(N8?RnICMs zIz^3{f@OQ@2aRYXR0HER4{~WJejwW?4LM9Spj+W#nqC&&##dqR7dORJZNodS^&Xc% zSQM-6{z8sd7ZkwQIueF#oZpX&H-9A?uRQJ6@?vF@QC`H4y!B)!c>wZI zHj_Q%@#lk1Ys?C9XE69OLwKhvem?D7qG}_NG3$f(rEqOg+%NXG#8@Zn@Jc@v(aCxWuZ>uEKv6ybV^~rqpRf!ELOS$zDkM zoF>dq7I9~rZy!8g-U2jp+cMcD@v`7vdOX@X?g`?)>!3tVU4GQ%I$QD5IPAcVD3NK@ z&93Tm^z>{J@hwnbP~FDgkLhn!ad@X@IN13Ps~RlP3`ANKw2vY}0G8Zn{BO+X;Rlqx z5GKnfFTD7-#r1&o8QFhr;cJnRpGo1T={yFK#+?($kYMq4$k9?-`n(kNkwwX_ZK7*k zS(9^l=S>Q`DZ|m#w7BD511@Wi1{t&V6L8R_ef=+@pG$XZlJ0fYgJ#fZmoW@+NEA9x(Co@GB#`k(=9Q&z!IWPc#?Ap(B8o$rm?Ks5B(pT~}i zdtVTY0=<|+upo7IGM&hkG5H)(r6vL zfS(iOkZP-Zaei-*gd?%CrmrDmX8gpLE(>0AzXL9Gc~L3bhx>t(-YymPR^y&jrZjsG z%&Sb1cW)Jny(-Jd9}Gxn%Y{fddo$`jl2;1Ap0+T20(UK`WjGr&pnpqcyuhd#S>mP7u+=rX|jOZRu zv2`mXQTi41v6=yX2DXRf(+1GTbkX5}gM9v^WdmF5ocnLs0vj$qtN^q9_1U!DR-9>- z9o=q-*)ca06%Duq0m`lW9P39DO}V(gdOyZdq>}ds1)QQHV?(x<1{D9RoC8$QN5%Bb zF)3#~U~S*GGfZyRiNSt@__(i8sS9;HfQ=!_!6^kj(Drf%TOPIg?;`!l@5vdcQ@OE)FM~_}nb6zRcmJ8PI zv=HC^j+;SE!;V<^$i`9Uuwl;E0Q!pB(;QI^S&IK(Pbv`U)3I0zDSXHU&EBr1u8~?6 ziJ*l2$$c(=o83#833S&Ni+OLOn#3GFrvK5?oP+gAUYv8~_2Gcun!xlMvoQt9A|&Ju z^kn;DcUogLPeQ14y*Kr{G_L6sis_f3*)5Nw37Ycw^Fd@NMj8qvm!tc79LU{5A zpo0TF$0Ld9<1OxADV84`oQEWK9^<6Sen#>_?pM#^?XO!Ia+g8d(HieeJp`sxXszt&gP# z1oNMKr^j_?4kL2-r3iEGkfqKnQb$(V5p{9oSiahzi@m}X%R3$nC(28@eYw&%kDPjS zzhAUMUeq3R%lP>^*1VEy?aB9T@6O1g;y4J%$HNWjfl4C_CHprc zq5+q2OkTGbFkRA(S9l+cTo3fd(Ca#dsLB%XDFTlT&ZPM8St#(-o`)7I=QE6Idr!9l zM(UoJacU~NDzIMJ`xwPF!3IYjej?OZMUnMGi(4~A*Y#6$yEnhN0adACIpo(Y9({sm%lQ$lOE8M?(b+8&%M!@=@DH+|`rcl64)|-amJ-<@rF1J);Jw)R3lyrz-t3|T z%KHOv8^%Z+(sM6}V-w?j`spw$l?@!`(_rP(#&?GNrTl}HqO-^aL*%+&6vXI6*S~F= z-mX5MFD>)$!IO8*8Fhj&qSpTPZPyILr|+qXv67F5n$Dge%j<0`N;hKMHwc{Ieo|DQ z&i&GcFCy|%Mam@CxOv!GbH1Az$z|Ousb~2PFQ4gtJ{yHR^{V}>Zw_)0O*<)+Mxd5H zP23s8hylVr1E| z`LdmuB`bfT{WwhLHR`)VH@E?t<@8kpWQPmrY z3c|Iw{|ve94)?okSU;x$oen#xp*;ct0)Jrr6!*bFU@LTZ?T!1>cYlM|RP7<}+X9~L zI=Ah<&onrALa1(B`UIRW680CMA0Xi8|ALe6k-(lNznM#oz%OvUUIgs9l?Tk<4lmp! z;_o&rwv_z(qp)(ZM+bU53ZJgoIpVWJ`ncc!4}q{Fc-`-~xgl!av!+8-*_^$!ek@!| zu0PiB!Un7>_&nxx0=Kp%s=0wpyPEj2sqq=Pb~ChQpk=Ea=2JMUYeB1_hiTRW>tQHd z+8Zh{7@F27&3*t~iLSfWlghA(*tu70ToLOqpCp;i)ck=^mLcLtRKSz{| z&)F5-5fH@!j?5FTOPsIg%4>;NSZ5 z@)e|<84A1<0+~6B%$Su3?$m03Tz?o7KB@1jJWq`&j>rHde= zN8C(QmNDHEBZJTnO9=H_HskT-QDIm3P~7Z#Qkd-HGsY>(Jj)U0NJB5&>*5FwU-fL9 zEW#olL4FV(+~iN(*v4lt0mZjC^QT{K_sZhvZd6!6?G(gR#iAW$(Iv&R0e({A8vE5a z7BkCl>ik3(n!fM56V8WsymG$>QaQ}y+jy%V} zavtek=k8D`!*YM=fNwLO0u4&d_>j|>5C{VbwcJGQQDEs>9t?qjc$G^k6wz2r9lC!=4Tqy5d(b%S+fnQw3QZ}-_5PbV#-4_IOWZMrzofa$jJ$rqnD`42zxK(Y-m=h zKSHk6f$Ob@4|i*nt(0%Q9ucRj=w9DJYR;;q*0{aJsmCjTu)r}=OaV$qf*HGGgo#uSysyW zZ^8M?p9U_+ea|$Qu$E$BW9$wIpz4TE=!KKk@dOEgtR(mml5P z^qS3B{Y@Ln(nL*?&lV!I3vZ^*q?5(G1Y2kfkDo0gF7^RE@ z<{u`G+P}i2ef}P%uszjEx1j~RR*pGHFM)?jQ0w3D4KgqWX&My&3P5qLBMpnXbtF6+ zuOt>-D(T&J3|3rpL=rlh0dbfSFhuq^!F5Hu#_I9G6)WBL8*v&t=1MAsWA2i~hXH_^ zkYh(LI#4VS%qXhg6^xl|4_t~1<6Fl~tNfNvG#m~#Us>mNrt)+au#_V@y1EcIQ6aHh z_IzM-)ql+ZrLU=oc$1zp8tzd=;J+{M;B@eaOlHn1Rm<2wUy$BVe!b+= zz(ue(SJpoQ3wxC3;tXY}R6HJY_ygS^Tl=#FD*gSb_x#!rYar44)p|2Z!oVlvV9~eZ zK)kgMW}cJq{t7(Odn;lee?T9WTE+#|5z4%io6p+G8Hga0L6Put3NQ&p6_n3U9>-)) zZZ|xK8E<&4pYqGafURjy8vZPD;9c?)13 zL;h05=hjEOp)VlzqI6W6SJ}*@;);Jw5}1CD`{uTHOm+bc_hPMOW<)7~ToiVp5nLL$ zm;|}KT{BvIT$2QJ3EMlnF143#0RO3s>S!ss~L6$`mX>*m6ee!Q$K?sg{|DCMT zuQC!~jwe_mr&@ADJTj?DSZ0XfovXc#W-ez-!#_u667r76K=%GPCq~E~Y0HxAW8o>> zzocQmpoCx3+lae=uaOqAZ3d z=Z9ESitA~Qd;XC8EoBK3cwSzG4y!XpBsB-;@#I8d@$?SuP&wiNoCa%^G3HwB`;$(9 zW-ENXM}5Gm6L!x14_H7u5-)n2hD@Zw-3@&t^r@gTp7ss-O_6#~I+rmT!v{KV5l$dF zZ$=a?&09^^;z+5kDpoE4qI(J~+2kqd0KT|)7J^1oHi;D#K=|NNypXZRLygV_h%y2i z4NA0B_vY73vZShf;(uKpEunso?I<20xfWN zw+VSvUvUW0U^W^aj*t zzcpsTxGQ?0IS1`ihVfXOX+#I0)-hf>(mvOPD0{kwAf2z33tb8MU5|sD%6A%I4J|>< zyq_yzTMOHf z_EJn94OB{PAN+y)6iG zDy#Rx<{#8|PP2yx^A>84bk|D?Jb?Sj4gytn)NN4h1yUKNv*<}Bf}L8#N1vJNR0wud z5Yb8H8vEQ9DHUsKXGcV&57)p6;07Y=|KQVIky6_Yoxs=tQ%eBRuAC02(Li<0HpW3ieXG8z*c#)+=9RXj ztQ?`lZ~gN;^Fya!gnLlje*Y9p3Q{WH-6{9Bd@HJyM90X|V@uK1t%Z*5e`o40R{UA! zj{KSnM-A?zTVZ6m%@HH@M?&W*dILSTN627fhOE=?8bhiQ%a_CIpog3I&b63SVY_?^ zQw1PYf|Ua3J$uoak3Y(6(jli7L!CX{#?zQlFTkjBa6_Z+l-@oPpG>+35(VOWw`u`k z)6$k$iuPy`+eZs?+bsh^L-goh5~cJ61dEs88{ZR%yo7KrIbveC7DVJD|0R-&&IAmE zex;{B1|;dakn991y1FT$$}-5!RNwf0!;qIBM#+wiRcrmC>w`SDXgLaZLB4ve5#GuC{Vb7nYz z&N12R(H>-fLVyLIZG+{`oip0CiLQOKehyiac)m?8h}@#hr@mD0q=C&^yI;|1$+SeV z$|%_5hwjNoXv~PkV?!)bk37)Aq_UfO^L-o-Cs}woyotMVG^mxXfV)0@_ny!>v(S|p z3Cueh`y(4l$+mgHi7JQj0`4G)mP2f?oW%_6is?P`&{zNhoyeqe%_jo(C$?O<_s+&=~p6tMiphjr7{po^)vu%`vF89ZDhUFQi7 zC(ojbS{T>|Px;1+8Wh=CpIb-B*AZ)35@~nItj1tU5jjHES`N$!a;V6Ea>e&w;B#rH z1~oOm%7v#b>Tg6kIfx;Z96k@VeWU_d)ZT0=*Fqi@0@n<+2bT>v*C0Q-7jTo00cj4I z08~^Rc!`?;x$XZ{52As%{Yax^s1NlPR(tmKa{!^EfHsER{9#&p{(HUS1ncCGsExBT z9zUyxP2+;85Bu-norzoW105bKB6mN$T^S-7@F3b{nX>$OM5C7za?X>xflIl~jw|m8 ztcnEE4~CJ!n~s%FOl*YEqAGR+Eo+eP|1ZkkGA`27A|5UHU%q#Ma$ zNU5QulvH8pMmnWKN>oxxI;6YH^PPS6|D5O9zx}*;Ucu+~4Sv_X*1h7ouGKR7m1fxe zT%Hqlua)SAR}Aci|?Vp>$5V9>Jq#GFp6?$tiIwG?&A@;%? zc_bU03FG~@JQ+f^99amyxbRp(C002`pe)&E?icC}42nKWFBrjjj}SbHMPXPj%-+#hm;tgTm0pi-LxbLD=k}wC%5usJ=}46s+Tc9TA2Bp4~mNd&j^VMEoeqzcz{_Hz)bw3g_Y-y1U7IuH4){vv2W)+jX#?2NnodvP z#hoVh-q>3)RzAL0{MUmuSR*QGO=|~fjtF5TY>Aw;W&%JYJG_$I`&+6=JE)!qJj?>_ z($;^1p_L%FQQ1?Ky_5G-&_D`}^u;1L;bPtH;;IbdlqjCFB_8sx_LZl>|k(n2JO@s^HCZnJNih}F+UiF5i1 zeJQDFqh&`RR{>wnx?OFXeOjqn4f3h4F7fRl@eJw|9*D74nyW64Z7Ue@SauvTAhdpc zZD0t&(_vO0BMJ!Y1Xe(GlT~Lp@k!m&<5Tkyzes2WcKn3LuuLNZ5D=6o;i~Uk0HA^L ziA#Kx)HSe02h)fr;jKD@Wau+fm7>*8L-wThwt8-$p!o)Cw|F0SG7; zzfijU$56|JSy;1Gv>5owt3ad;Z2qea$j&A%OQ-{DIHL!oT=r5EUPgrZqr<3W-f}M9 z?vItZcEbF*7w=sl6yT@S``dC<6vDs0k z>eoy9v@f`ZYPJ|)$!I3@;#d7MhdtY5QN@${>ZL8_$Uan+WOAlIAel!?S4gHM!wZC^ zf^7SY(hcOXpQR@wK?E<8wQ)%>B?z`toZGBhYO3%@rKaFHtFYr`3P>Q zf9~qGczW${CheL=&<+^m)1@VhglcST6~OD?qCqG&MkXkZ$nxBwD|SuQ+%z1TW-k*g zeg5<^&}ZHBDC0?d4*9Apd-NM!3ziUEZRMUY@cz53b##chAiV0E@Vj1M`A*g^5j{cV zcNhP!-<=BoRnBMXPs4Ior=Z8}+GHjsgQ6+??bJW^ojgC5#j3VMF!1+S87C>?;vteDEyMMqSMcgK$z z+3l4?;7Z!n7^Vsyrhh_or%5tc>+BN}$Kkt9sfd$d&gsi|?bCe_eH2BR32ZHz7Z@_q z%J~;Oocr24+Xy);d8eyMwuM{)Lq|2rm5UU{iYUs1zG3BiW7!M)<#=UUOE{~0=UUpo#C zL)if&2@_D;3(kUwk5Zzx2U(Z50SraiaqHuP1pZG*uEo+nr*^>Hoe|5hyt+y%&cwX@ z@L!j`@{Jwc#i;L1-{-iV+Wo?#*F$KC=Do|m%_tw-Ks(!JtE`YpIah0JgG|GaD)qqx zNn><`9c1XMJf*tU9}6TsLl*Y>s#HsKW1D4IP@lq`C zLfdF~s0Jxi?-Mqx_FbzJkY(4M3%jrdzojS){6tY0H};V=Kx;V%SL`#5)|MZIbtG*R z&QlGNQ@ncJiz!jju3O4VHrkW8L74ajWb{#%6|;CsJlX8vqzNMVWlQqy5ya4RsWr?F{~Wd7GuXz}e2Rh`3&Tc@=y(p|0kUCD~M z6XwP#UIlpvC+C=TLjXpEnz*kT=iQm`vKJ!1l7#90%F(g(y)CYx^j^^pX15`m@T_D)K>^ za__gx=Yb3o`b{M6SW2;6_%oF-6s6_ZaPWJ~Zy2pUro`;bc8qBjRWMqO#$9+=qp;$~ zt*DIWo_P6^h3M-?WJO0%J@R-qV}pc`qp$WVIu%;YF0eEi2d)J?>B@%|hTevX({B(I zWoBXL)fo>l#q|@u@%&h%1@yLI)q&N>aBuqm5$<0s4>?zcPN;NE7R^97DZ zAog7E6s0E_>=jF&0|7tti7`X zU-}J9agXGU=-t;AQum8ErnBE$Af>SmiQf-S#KDk1f(s&<_kVu!NA$QZdH0Lq(`@y8 z=XLEXXE=yU^*C=?J8p03ojkt2^hr>daynZCOTNzZs^1lu7S4^gmrd<+ z6TCUkiV?dU%$?C65BasP(stZpL5IoNF8Gs0|q>G>eTnJ zq?gnnr+Hm9u;amF&*hHV3GKzDan{YM?A;d$o9d>ohITnQMLZ!pW%7Tmt)kZC!nV04 zvs+bmwDe|!>FFE7w~V0v29;&!O-54FQ7ho!M|0+;;n?k>#lvZq7IA^oR%)DWDA(dT zm@t*pgk=9BWOxL?hdy6wfiP(-FvN(vg%pwh-}olRO5iyHXf0E9$a_?Gqq2?6G5~}O zx@9WS=je?j8!60kp@>ITCJVN@y7S44j{+i1Rmm}#skVbK=vCR3;)WHBBeQxE#@5Bq zAsAA}QL?NAj>RFYPWpJurB4ue#OsrNJeFju8eV=JH)U#{+ZMIo@C4=_moi6B*3kfM zQ5G`lV`6gZnh?3Co>U5W_eq60Et}QRLLn)fROpcF3m~iXkw4TOM#ju0phf*3{510r zR{C$bnn@jyM=JtTUDkMO{i3^?#vVD&S{4@+;VNx#hq3U+V*{}Hvu>K!N33qNV;P-< zwYSD5O61uCtYWxAixkw;wIuk?>xsNW9K@(v-QSXd8q*73@p~6VOox?WCXV?87d< zfohhd$!$B}?b_KL{(~dEo<~h@=b<%7B-j4|vituZAbXI3-&2aklN#K$Mg7R_I2@5E(mC%zrUO$`!qyL!Y!Z*XUs&i4RG#04n1 z$r=Fy*HeJXcIAI1V%a#C$wxko4v=!|x>-%~0KG6?w8VU#P`z5#;+FC&Qj-DbHtN4s z5Bhs??R30T+^L}F@C-WrrmEMrXf-~D34gx)@A=P)UX$ztsbv9lx7UjT7I4TU4+0oa zYt}cYfLv-`-&cIc(9QC_WyQGo`kE#!JJO&^U47ZH zT9xzsa|o6cOAp6zZq%z(C0xfQOCRn-??40mZiqA75Bc%kECEoa;VOUMvQCH`JK02^yPqRETth5P zj&)?$n~p_(hi$puO)mG(ljh(0akR;boNtC$;s8kscPdeC-G|_CSUHw!dF?(Pk9WL6R@m4+ip$edXh;5Z}Dcj67MWvU4)0FJ9<6AKmPILzJZg0o?YV$s|t*>-)|a7t0^I&O%Hen_x5j?70-&laSv9`RzdJhKWkvl_ z{~iusRGmI3>6b#wsOQd-tNjTe%I7Y}VuLtrESV$vx^!0Wf0|1_vVIhxcL9LP4d6zT z!>jjIoq{-jXvHz~9;2pAVex-lOfIJh7dwdjT5}W|bIB^D3bN4O9bj+biGdrc=>c2Q zQ2-iA0_vh=251{s7-7o8yT8^23{)K3c>=U@c9EXrv#-qrsEwA6s%pQ`%2`7md3;{i z(8_@zBO7Exbg~!7fpmRUt$oUXBI_7|8iC!-p%q1s>-wjd5Z*lB)`52JgX;2H4DNDl zQt3VESXW?7r`hFd7NdnQ7J<98(**3jfj`1Qn=>c&x9F>oFR=o1#3VJ$|K#ISep^_iXJ(eqen1)R zXGhwE+xsO3bi(#t@I9dC$XL8;!A)Dv^LMKz^~y@U6zc4feN|yEJx}MAbhA5eaTTFlfgx+k z4o_(Xo4Yb_BvGK?8P1l2)X*M(Ax)JF^kARlrWeNh8_1v|nh}|H%Q2|rz=k z1TN_GD2-~k^8Be)7iqZHcK~K46v<4s$g@nC=U|3O&8D{c>!xmu>f@wDD{XN#n*OO& z+_{vBbXkTbpUB&OB3X?+pw&09Qq2L=z|BDL@UP(GgD)^%DylkvDkevH5!nW1&k2uuR`SJ zgg-cp$x_k0UFt65<}F&cDsukuDFiQJ*kHf&?;Dfj%jw4DW+VBd;?w-Yv_$U3&`0LK z3o2RVlw*K3;Q&Z&JxV84XEN>n{OWnAPRu+ocWpkrjVjk!@_Y5<0-)hM9B!7c{jHpf zqM^4)hPA4&O6>w@iT*r`5hV$3j+3#~8qzm^`JKwp*=fdqSl^;OUHBUn)2kudorH;- z2XvgRYJ|}NUJD%`<2n#dkvkW6!W`IB6hn&1cDPCbkR~efC`8%wEnChbq&ekzsqzT` zbLM9krk3W);29RqZp18P$)yln1LX3dE;F*ZN}yv7+T~@w4frUO%B@Hq{VL;+M}f&D zV`9Z!o#$_|O%#rlEO<}CY!*hzXn|PkDVuVkcqX0bg=QD&QhsI+mA};}y9@y&g&=7{ z2mN#X!WDU_7cr&Cw3!m=!5AM}=8MKjy{-r%CD>oA#6tY*r{nL^WXlKH$(Y~3;6jN{ z%TqIZ99)i-@IvxAN1n<+Vbmx4b;mNZjFVRjrJP}tZSp{LY%TK;%VpE3>KYHiT#*4XRnJ%rjNf9NL{ zKTN9{cvSuncK^W6cA6C|^Tc1O`$u2Zf;(C51g#K+xEm-$2A)zvx=|A80?Go1&toWm zAEjY41^r)exqR+#KfDRhP9lQ^-1al=r-P0&Y+4XMO(EI)gT7Bv1#s%FeCbc2Px7%C zl@FUvUz_4vSSzRI-oFg|mASh#Q0f)A8aa_)sri#@As+Nl$735>O#A2Cpif1AMUAxF zVpok&T7`Sd%t{P}T4{~q3dz@%mo&Jwl$c+Tj3%=*9u@(BI771VER_tX;DIB$G!-{8 z%o}~+Nxjj3^HkC-g!SopW4+!XE`{pb=)h|QNhkYOcF9WQD#6CeAX0Hj{&jD@(b98kGVlNa zWRHv@x+KO&S{*DphH;D77oKSQz9xl_Jd%zAT;` zmYG*gDhm;D78DzZx87pkK~W+W2C$jk4+k2lziAeFM)0#LYGCEU^@>QXl1 zcmEzub0OkDa)b*fIz{5u?rrF;d#gpjrUD)A{gayEbyik#=d5goOc+ z2~~YqC&D~K8q@!PuJjXI5)z|;W2IdC0{O_k*huXGreW;J$#bC7YBdzUg72un)ZZbM zzne3jEWzblB(AX|ZBez2y|!U(uf#ciOUog-yU}!BS6%e;PHrl32_5kxLu~h2%|QuH zIDMT+RPCBq%z*|l*Pue^RA+{5=1Kp?2o!>fD9O+7JBXqBbOVbDmpGpaZ^fb!e6u6- zM-;g~5klY!>al?c-V6e3xw5kMz{GA?;a>Q1>=p0j?Z;<;Ka?}J7)lSM;`jf>p15Fm zFY3Akjg~Hb&%$d_s;2OQjVRsaIno8Tk=j=#Mj4A6E@yNLFAx3J`+Ax79fm5D z4ukwyhn-_l;O0| z{ekay-~}x8;koQflaILt3PeuZo4BUXB~PEk3)W*Jd~gl=;i?)Dl^Sh~*?4kkY^tn{tQ24*Y z$~>7RB-CVS%dM{%_sFKtJY8hhEVK`RMl;HDV0<3MRa}h1_AX;}zWlz+Nfc|y#x<*0 z&ropr{N?>easVyGH+M@_u}Kt3Y15<5Y52sumNb(DuFEzV8m8y)({j&2+YmjgKIlcC zTEri!4C`tZWlQ4TdgH9n;{He!ksv({>*0vJFL;jU$D;{koR?c_$od6NHvB`$QeTP8 zrb|8dSp|j^|1uz2()K=+u9pi#>ccEcT*A~0<4#OyG4{QvB7oAX&ITnZx=`h zhXvj4488l6Ksjj39woPWd^;HP#xSh5w%@RWH8}WLQNp0+fK#Z_9&XAmDZ|O_NR8;5 zh_d14dE?bOq2(CK21MJYGOZNYc=6EucgRu}IlNT+>&lR$8RV@AVxXigpWkvubop5n z&`9~?{l)R;VZi#js(*nHn zP(Bk5@cmp(4~Li$7Q z!ReT3Z1Q3%Ocj{*&R^r6(3bOgoe?G_ivzrlseqFgWLr;=DbW+NbL}!9sBYtwMzJN) z0!Jzd3EHu2qyMU7)=0jge*^;T%g8Xc90(?riY5aANYPy`={eC8eM=Y%RWwmGNq@&e z16!fq`|}l3AS*9^K65@xRZ3p-92Ngk3bo2s8f&u|C_mNRKxA%lGGvjT#LhB4TtIQ9 z`!#XpHE}g94G?zArF8-v)o=lRwgHck`cWuT*j7(B5uK>zVI{S2WElW+E`DhBHt|Ml zuKW4^HoyYa^#sJd5SsgRocwp6^}x!rL8QN@dgf|6h@ z0G7-PBuf7&g92=v>7i3F{sSsL;goaEvsKPUWj;kE+OFG5S1mw{`!+Vfos1y>|BbB_dzHA~uCNB`zdOE>L*WgBzocd+g@U?e9V5%*y zaFc~WY8DKuHM<{WUZnQO_thXDudEt|1o32Fb#iJ58G(GiW^8;5B-h``U}lK7+`5EmVN1-KQ$&k{8ZZI#%Thyvxr|OxE(~0|`sco}s|8(z z!gr2F_SjosTY2ndcD&q6Z%wjqZ~;80iq}lDD!oaJt+UG1xdJvjG2n3qnZgv5yi~ad zt(!|0EB8MyS2sRwTEQA=Zp(wjwwoAA;TAiQ5z_yLj%(Rd{A(yVRpz}~XN(T2&D` zUiCRX9QCLXyq?w@Ep4d0TYLJNm>PtO0RC-~g-fCFVehWqPhR}4gAXdgBcuLGc9(hG z@C9yjg){$fyRxjtQyi%0X!9x{&;5!b?2ijA#XF6eLGHNTr=B0Pvg_5mQ!qMWdXtNy zYc7C?^%kJj{-*>34$NvUY`~k3O0yD78#&_as_-!%r|FGmqH91;|2~`JH7YI{LCx|P zYj8;gVO|^kde@pR0f660?r560^zmF>`CQ5_QAAZRZ+OR}?`ouQ_-bGjG;@bOJUNd8 zeIIll*)qryH7j9(&HC38$H{SJMA?5J=v@wL@S6pljov5T2(waBrh;Ex6U*J^cj=7J z7CUB)W9BW`dzd|6ukIhdee3b}Esfrn^X&ZMKP!uebd?&?Cl65Yo##8CqAdp$A4E-q z4q$<=5BPj||GvarX77EFIx%CglzS+p5{4mwmbn|Dxaq6|Pj_j*E}8%P>ukdT6*;o4 zNWkPi@@-^;z~BMb`@Jpz!Hhs2$#J#lk^K+oCH~w67&K2Ujn7T$0R4&jY8#FMI(VIq zh9pLrdqyitD93y($CylVxos%U%o0pQSoeARO-IwyL7xufRA0a<4UzC%&J%zY8KyF6XejK1M=scLOos6F?zyjgeo z{U6gdJ#Jz)iN6oFhLBTIucFP>n~DBc4rzG*qB*P3SYLXrB4NpD{x25)FDzN$-o&|Q z_RTfzJan?Y*#J}x$Q~U2!enC^buuxMtn{-f{L%-&I4Akb++LXdl|ri*I)if_U98G!JPT1vK+7~u7&Ga3lDGq8eHOG{y@uK?4?k)zxu}z!mUy+li zRm`RWBNVJGDvcO-2LWTrAyR*Q$!o_#TfbLavXDQTu+}Y(aWWU^u)&AknT-~TcXbn3 zM=CRxPX%5TOIGwcmR;Dp9tRM zTtfJYvju*9?fTe0ho8(${8NR$viO2dm)mR%+E1P83^^*5@{)=1ecZG?*<=c{iX=YDcn9|3iBaXrcPD64+A`MCmDmBC|ag$W{}6 zSe#mMhjRAsb2|E&qH-#xcHUM98GBAf&~4<}jmFR+T+Td7f{;>RM^9yVAPk>7C<~`P z={&EXi?aUXi-&mY(0&}idq3fTN^^Y6!`p)m-;yhj|LGO&2CcFawF>04l$@1n}fShk?RZ4ZxJNTO*l+Mmvi=G=lpLNjKSJ&6jo{D{D5U%qNL-k$+MqNJG7a zr%+v3-Faw5h|jz!WFe%AWrk>eVLtcQ*jk8IYJNKGen%Uyaq{NR6hy0=psyL9qU+DT+&x~VrGF*OUOp-b?Z$H`SHNAWraNpZb zghe7J%jQaS3|&*R`!$8t`@?gJC%$g8f5;kz*Y2g!t?wyV?y1S*=MmvQ`S8QASppQ# z%?Wgi6EwgHx@;hSf+%IOg zKgXOE~dvI1`xQ^R}yO*RxA52{y-!0r81E- zqXc+Mm8~y0fZ-N$<}bnh!G;L)2FawoQSyB%r3Wx+Nk^RY944GqJsKgI2G56BA+0MYK$usNJO4Sn~p@0$OzxDwAg%Ni{1)6wPObH`# zE@rcQ$=9DPS*6lvE{E9@azs5~R<;186uAG+|GfX8<(MydG5V-SGX$F00tAi&x1kyg zrchG1t4@g&y&bSfnn#pQRXv#XTinu{-nSCC+?~a-v|X79stl`!Ib9eC3L9TMy}E@x zBT0y7>Fh-PCMp%bI?fAFUrhn(Ye3=R3DG^ray@|l@A|_pw2Q6Ae)YUXw$7R=kyCYK zC1xOPZfip`g!TTSaFVM5DGAwdQ(o6V4%A<HcX0DW()#UfgF!z%;&Zg`6#uj^PnHpqjAYkFB5Ug)i+9UHiV>r-bd2X>z^m;-+qeFj2$P zwLnZA6-!6SpQ79D#8M`WRNT+)V}=b1yfe}+3cq$V$W9jLV3&?z%ZcH#JfaDQ z!HsZvDf=pJ-g4a26yT4(NUXQEhck5K#DtI;2%S;E>+1}M;#0d)E&xm%{N>p-wWe_k zCPP&_p+$1`nQOyZB$=orce5q&i& za|l$_T+NOXSlaG;Y2;u2F)~Oa@*aJ?RZ4esoX8XRvp{2hRtGWLk^3Hb%U`YSY-(+sif^0Mg6S}n`6t02K%eUS~0C~r!o%T;?!X2W&3v&oFi$fj z^jlC3n{oOaw|0LwRnYL^$lLh4YI%<%`1tiRY9V{p=pSlpF>lmXJPJ`ETvUk-7b2gR zo}>Yhtcf@kL?%5{D z6!;O^o*Imc3W(u+{vLvh4$<%#`9qc|Cvlv(eTD`B1`ic5W*N%93(4%&Z`_ax=Hy<@ z9neHq8FlM+%MZmtkBYA=Pk(eTSM;XjlSb8hiMI=NcCE#R7H{1F6X||>&heXdWbfic zcuFS*;KP)P7VzZBTp~OFx6~>)c`{YVesa|y7aZXhXa!(rse z2HXldwx4cvnw-L#yqXyIH`LZkF>F4AU7u+f0cKD=xgC`xwm#09H@yxv8a|DVQD_p4fa9iV1lt|NP zYfe6p8Kf_5g<)WV->J2gJR@28s&eK=f5drJT2n)DSb6o7`c8Pp@Kz_{lRz9xNj(LH z4tWb`fiV3ko!5ZHOY1>`NAZC2{37je!XGMN;@C+V+nS6|t;N^^JRm8ilIQvWOXlA~ zb&|*=7!my5gltO~`Kxg0aTw@aWq#1HrSiqN znrpr`-c~h+dq4zZox3mNYj8%~2fmSKf~R~KXiS2=$wPvE&(R~eB2f6jf*LclQC~Gs z!fV>FiT9${C%pIeP8YsyfhyK z$vQ2+Y_Gg93eFuTpv|m9k8;brfk;rUgz zufnnpqG->CHvdAVXX2t}F~;}(Q9bG8If9u_9E}9=d_bT3txOrlGjL(7PP|!YNJKGb z*BA$Jh9{c55nOcTSQ=i$CdID<;qn@Iodlh`x1?Z8YYx~PVo}zVbUvrtFYRAyw7Z1s z1UG`-z#7J%LMQGR7|SO}+#J&P2IKKWq!US?N$Q5?_?Hcm$)uR6Bp9g~LB+JH3H<1U z5B5d$1T@6D&x3yLeoabOwlPxZC$i#9X~bh8eKbf7U2&N}`0X&ejb84XUfKn?ZL}Ug zUSCL-n*89BjkeHz!?4_cK}k$#7gcFeeg9~aUowO$U0EZV!47ln@d0ivTnlF9LQe8z zxDNCZ_HpPcqwnQQ7`0aFk&sm`JF)Ux;Qv~$yxEksO^LYr8lrLHl)ru&Yt~6K?b^(9 zd%R@PSh%72z|$$2ktn#-U|63W{0*&xR-l>{;ye0xWQ$B?X3B{+3LnxIY{5$k2`u@+ z1sS1IIxdYdwA!pryxV{n<@*pDA%cmrYc4j>OMZ}81d506X>>YxO_^PM1O?BiGN*lO zC{SRA7q{s3Ob7+~sVqE4t5afpaNP_N82xc5RgZ7+9?C19(Ck>Z4Of#ah6uOq3uevlE3BzEmwx#hdzd3f^?m3ZYe+D{^5j;_*`@l5?1ggrW3?*^}-$+lp*qGD*i z^G|TQP0F7y;nW2!qBEXX(E6%Ooe-5r{=!^Tu67u>zmr~Yt0bj1nKeq&5y zmym_!y&7=Q=&g;m=5Ki7k#N7qd-nA9z2|)Qq8YT_Ke7FElDKvBV`mSs^As0R(vi@P zA`av!#Yd9RdTeEw%3GV@`437f>=#&TpQ@5lqdxc<&Q-#Be z^VAbd2M{;SK`S$F8j?S!&%|ub_g{>!bCHUfzR9L5lXUU@eMQlFJ<6#y*A_`djRTo- zVzV_+5deRVFEz5u_aY752Lgj*tMcKF%d7HEzK_(xvF!hTkrJJ@h3^N`-%#3@V>`H-%H!zk|od+W*&mO~P)v^cQ1+ zj2yeR+DifOHMoF$aVcT`#8C8UiQ3NZUyT7T@mZ`$WozOwJ}h25qyD zJQ}?4#;cWV*IQCB$MgLj*iAjS$ELC?>Po434 zeg)n!#ff?Qhrz6|7;<(pA1W?(N<)~w_t*bEO!!DKk5xl7c|@a70ft++m$6c+YlY+V zml3A867!@tW4jb?xa0kWig$iM>hEipQjcMJvzvfl+e;bfW!F+)RgT$PgO1Z(Yl24) z{JIGl%U`>yM;0gX#~t^P#Lxmx2D0BJgsY8pY=hheT`G#VG?TGg}&E3kg1=z%2 z1&=3(2T#a0^D{^qA8V5>`BN(vHz@a8J1iet(ld-;^;NtYq5ZXcuDQu$gKK?JtzT~c zGp}!9SitQUp-R%`LCxvs=?wwsuM<h8A zQJ`~Qt>LKeHQF+H9r#+<-U;N%_-0iZo-%? zb=@~dojx0B(~&FnvO&2RhjRJ-;OZpOVJmSj_KD2ch(V*Xj#(wGlWZW?`I&ha7PR@! zq6Tk)W^ZVtv-8KIv5+c;n=veXpGVr+SMo4me;GmfWly(M)4yz0n8TJ*>QN+bhbd2` zUCi4biWrTb0F&)M?`S_{U2zQX+g(t2H4gmc>L07;C____(F3R8V+#jhO#{V(#|n&s z7;J)lOd2{4%R(&0r~;stdbH!xD4NreNm8j%Yno`zl-wV{=lwA8nAdk|dwL(Xs|U@! zR~h8=s@eWPM_GY0wk>)3M#Ce@fBWMh{4_FPM#_R}xk&h198)jB23fkUX3qf$ zKjwQ}!Q(jl<=KkNTGAZr-$(6FNHdG~`erQgTdpEbq9xOm)vO}tYt9y01l2*;zhfay zH+UCnYvv}~9r)bvPqiQqsfiN=mxb^B?vivL|Xa#Ua>3g`8_1~AUIh6V*^9n#7Bma*)W(Usd{k=%#O{Df$Bc0nUnBboH)C>+SVYQ~%79?hAiKADC z0jkI`yE12rPTR951*~ZuyB>6DEhw^nnBRV68i!s@;@3{*xUib|&Rzc~ub7t>^CDA) z>ohjqID&Ko236pdOF4^8ott^dZ=bi78q!`pc3CvXuO(GU$aPV~sU@{d^%U3?dM%}` z79*fSYmZ|}W(^zRpCGLRjg{`oL2;k-B(aYON@1?x{0y#`KA7E3{zeb_?OW*Eg>ZgQ zclNf3YjO8V`*tdzt2(gfexK+9tQ?l!Fl%-0cd<<6_{RKPj@BBhRtIxqhix#mCc&0i z-qg~lRthYJgWp80Q)6-ME8C-Ep67n+9fv~FL`_apZ4H+4oa1kii z8K_)>JKMWlL8Pi(DAV0NDlF}=_ZIc)v+o))J0qo`fnRZnG>11h6pF=7Tk})s`Vrfr z#5%ZF(2>-F6gEJ+aZT8t2=V1Aa7r$%I4!Fc*ho1<`R3Q$eXJz(m|^*?%Bf(lHY*7> z8QwSOZKdz(H+{O4+FJ{k%O2vyQk6o4GKA?{vOPX$dQdUv*Ocbi5NuN#z^2pvujek) zj)e9l3)V5FE=?z&-71=Pl+wyGjq?Y9J7k;ccek`|p>)R-Qsy0X z`LsDMxmwdUg`Q1@V))R{BG{y~-skOk=K3aQxh>d!KTvfSl>Y7gjd?uG=d*e648f$7 zbE_)khLVL{ls|uhzKxCV*i8hJj7y_mR?d=wesScY)>`WOMv7k2aSV<1jMGq!qtz2@ zd$A&_D0KW?EgYFLRJm*gLPL=uZD$h=D zd8Gpn+uE<(XAx3B?lXV1L20*G3bSLigO%x)4cYf8s98!ZKgPdn9SUXHmvaQAH8{(K zIL-DZF4-qa-D?G2Z+*SuI=^^aU!-2Eu>9rbcJI}`Wx(RQ*ERDAfpw}HOhub~-vda< z`=~nD!cn+t6_~MbAVxcubk4tkC_8MN=z0KS0lOxoH&TQ;vH~ybT!8WbD;f@9Xk7Te zQ>5J>g;)02__pM+Y&;-7S1DB^S#6IPoD))8aurU*e#{B!A9<_{S;Bei1^B5tDC$$| zccp1afoRFhhYP$tG>kO;%SJV2F3eq{hBLi+v+Fz{n+mssE*}tQbE2iNhrLxW})ra zY81WsT8X{YHz#F5F|g5Z)8&yBsenZ8Z^KgEI)A#ty}*u0oeiHL<{}quSRUU%XYR<^ zJJnGeAweHjm!zwyeJYO#2kab<{qD+*gJ0`Sk6S6LsGSb%kf23s-;jO55Hx4T41 z;nfN9@kP`uG689Pfih8OAW`&5EFK}*N5(=;=rUOFLen$vXq~XkJwKI1cMyfV!$YO} z>kVd#^VZC@mwKyv<^DL{_Boa?Xu4&J2m1O2R`&cmH--kUq6O-6H<8F1(`PPd4sx2Lp2#e0|O4>Mpd0eYyQVM{R58I8HebZ8fQI946r;~GGL-y!+U-bXfO47Z% zp|rN!aulIyRyvq@9B@Z6`Y;=nzQ6wA$d9A5{o}r%bbY78-%A?Gwx5Yv3PZk}&u4wh zc#3tIiu<&o58|H5R z0zCsEZ(hm*FVj=gfrF0y+x@Ns6L7fB=f>p^JsgAd`bs#Uj*OKUQPyV??C$?#+hdK6 z@QC89f~rf3&@&t$!OAW*CJT*0mTklpPTq9DRrnQ}r^w6~j=?73?!JPWhpwLDo{!i* zl~1F$JFui+`1ycw9W$@(?a7aO+g#G~Ogdw^BYq>ntZh{8g1%^pQ1qlly{?n+WJ0}h zymi)?Ep&RHp$pV|k#RNJE2gJI(q5%_T-ovMBvGsIxuhR+J##293WZyq_)@ zHdbGnu)P_(FzAdh1g%AVYo2)=<8~+&C`dW`F|Y6Io_Y$x6xJgW$J(Fz7D9w*&RoLy z1LaQxcT}6j<%@Ob^E})ph9m~Dt!x{|*u8!O)J#(UxEFgkkU>ugY$HE5aKpSSr9OwE z3WNnz^Sdd#`Sp`;r}M=|QeMwIYTw*!0ykK*o>gn}f06cNGI1|6h18Lzcx`DuFTp$JPNKeue zv&-{@N%#tHGw=<@0 zA5WzfWy`5NnCe%~O}fb$9Xqkbjl|1f>bC2Hnm!!d$2$mz6->Tgg-U`&O$Mysre}rnZq^OXSRht|fstI6ojg5sm4p$HkB+dhEC~y#Hb?-j?>EGn zs3G&>kVBlf@Iq<@3d6E3&OfBlehYWP1qoR1mJ%U)_+yw5W_3w(GRetx6n!Qu204+} zP;Y-;W>%@9{Y3}WLE@QRNgB7N=g@Jyu70)))4a0B1gD)tJ(aaQ~0OUUV}bj(&7WU zw_Z>VP2!?F-s+XjfO*Lq!~Mo4)ihXUiU**-oV^U*QaS@Za5QYu{q0pA(!70sFK9V@ zztpV8;M}WAa^Kb=pj4XFo&~&au*Mb~?E|H+e}&qAXAb#lwkzbSX+K0QYS9=6#yThR z-}`+sKC1#yA}xeJZ|Ql=@3V$s`0tnUtBt^q<|HWw@71Jxbcdy<3(@UfOJ}K;9zc0L zzILES6jbw;WhQBYYtV!lNC%6~&ozxmks(Xd+?6BlQ|E?nb&=-NK!PKJRTXB3T_ zMsT`h=0&4K#GijCjiK+iPp+i5uKnKEp5{ftx=43ssILxLb5!JaQ3=?RC6@73yQTib!kfJt>`BMl+#VbEw%63j8GOjT zl^N6&n)g0;$m;HRSh^Ti{WhevUI*T(uQDO+YEx0q;%c}h{6`p7R4#$MCy&*2cJHIA zmr;H+dATqpedLY_K zOxo;28a5NAI42Oq@>zu4ov)K?xy1FwM~Gq|^xS8>uKH>TJw$h@e5Pc!AE%xFv@f~O zsjO9pB2=Y3knX+IreSE36iYcwg`x)dAF`>NU?gF^AJ;{K*WJP=wogOT-yZZ;|0x_% z7syiL$R^j-hf?rAIHq`hksfbd<+U!h6NeuEH5P~=3-}eI?f@O%WDa>m8sQ6M923$c zlEkkkfIB=74dts+VuU*x1RHEJp%}985Et8sG6yirI7GDf{IJVA&+t>;pvKe+4Ot^T zx8Oa1L9&W^{1#^vNH`oX`Bw5xAN%(yJ3hZr&oW zH3@|rrqwg+!1iyy=`m*%KCz|_;0g$3x?BxiQHKufQDDBJ7AgskYk0KpX2kcVq31`! zZXsh>Kvdgu{Xc zi48b7O0aE!?+TZ_p9mXcvNcRTeSa2inne!!BtPJ4-Rm8{7_5T(V=zylj@N)}8hP=&rbVyk?XPX*u#B z@NvFm_-!WpS^0pWCG5}mA6{Qn3vbo=unU3XnI6aK0Zjp~qVb7X`>L!euJ?LX98QMc zT0%i$B$8qluv|W~02GX{?h5gNIp?;hgP*Ro0m)QSH&3sQ2g0U5UzC2gCB1VDA-CKA z*)a96M)UQ2W$~9C^NYgyR>Q?VxMKBJfz+zWWhN;-x{uEV^0pFWsbU}pbh@Qef5cn# zP?=?b(8KsaL$iPoTmj+sVWdxg0%R#CEj#Sj4yRvP~y0f1oBSi#bw zha6(svdX{Ehc&x#ej6o;`3_hjA&kL18oV_IyT`94hjJfpCBPbXsRk%LEolxBVprlUz5N%^Pb>y3M0WhsUt^wO>@Nwhh0aNdhlvO zVkpve@Lk5t;m4vahID;+!mLp;EH6KfX=nkNb4N}5gtNoTvQO&n`sdBa+2|0X#NG*f zmLTFQPF&)d=AQY1%k6+>%{$FN9Lv5_Q9g`WBWG;O&#beDvVmfqc?of|M_eD?OY>ac ztZlkuYP#L^XjgR+_SZbUT6k4lUnlNcTyugu*HHc?t$ksRR8mLyxj=&g%43&>nxwmj zmenG*ZI*XWIxfFfMehDG?)iAJNUpM=|3)PFP~i>NSl$A{+C_+9kP5JnrlobDAJY-; z>vzcjv}nRZYx&1P!1LtDc5Ld_Xb867TU=vQX8G4b+aedjYM(t3LI-poqd6prbv@;Z zg-(t4aA7zXDGqx|)_spbD%@rS>$&gMJ;bjMIJ64YVh_)gN4SJiQHW-z2;jlGPH^IN zB1`FS(IZ5Yb|8LhYTQKb^Ii3@S8tK1bWB;#Of6r?ypr@Z#i_ywxU<&YRZ1;;K5z&s z!{?KPljGUOtyt^<2ypYTmtU>{2Wm(up4=`)8bBK7CpJjj&tXkvhh^JezsI9%^aI!L z;C#T{HOidC{h943*$ciHuTeFCjcSU`KBzHqu(iRrCi6Q6jmCX}-A3AdiVkCmfmU+ttV_`Y{gWzx`TdPjKnqGG$!>k+exf=+07KF9ajErox>z zKex^CkK9p7vMWC+s(tZ{3g?UGtKOatH;+q<4(pW>q=M3yP>?`_ybZZ=uXBrhfb0g3 z15w#YG{zmah_kXTJuONmGtcdLZjV#LO1(rj(6b8|q7JI%+iEksB4P&UjvhcEgYL=? z*a8gO%!38RlnHpU>R0oM1CX&6IC$N-Q7&m$5tteRFErZUq}}z#g)dLwp^BN-lZe(!*})4*x|u%>8&o;`-8LPm3CBY`ZxdB(B^|IYzhVgDub0`yOfU-- zV7(wGSxd6*J}7r5%_s9@LRVjujQ6o^h%q`s&R-ju9fo#EXt++{UpX+o1L$Vv6WwD$ z0I`|_&=o4HOP@}1A6VavdWablfo(KnT=Xmkj)Da3Sg^>!pVReCxbvkMGix#x6YZ+=`n39Q#A%+e$Bm@g`bK`C$Zt z5awr%aqe$U4bMYh%p53|Br)fu@u`enKwE8QsHhD)^MO5@h&hN;!^=6I2r~X&-d{|( zbW^(Vl{`i0np`5<@jdFHP!v@d!6z)=IRQ*v*IrxCv8IymqK2`ppOzHk@bRo&(%xEg zAjo39b%d$iDcq%B1#2AlAqkyQy@=bsHRpa?;{#*g4FrhSc4oV!a-Jo8A>6n&*NcUG zzYDx%1?rNi|EWuy;22B&*cHTJadteF1>Pj5s_6s!ECau?KXY_1G$96m&bVnMI63P+ z)sK11?*Go`<|0N8tnfI-ZK(QPn@x>#_;;C^R}%lqQqgfv&cLkO%7-V|h6x^EYqHXW z68|=OmPO+&TM11Us9xDe$cQ&;3UJL8OZ}li%C3osEeCxna_$ybFVlK8tFmf!bH4j| zL9W$E%C)Zj^on+Lx@Oy+fIYnsB*xpT`?zkKXNPD-7pOlnW^d{11pq+P+Rw=z43IP` znp?sOR<`#yH951DFoNoy%pB;T6+#07zL0qh(bEVQdi?dLg0fqTsUiY}n$ejcSudL9 z-A!qyzVu2*koskqQCy#=Ol0&ooI1YmcqN&9SxWVoVG%UC)e@)ZJl3F$=4^JpsJl4|;F?COKi_7oD z9J)>Sua8tu!Er=evb0E8bG~x3n1;1POR;2^SamM@&2skaEg*8) zxxFaQSEdZk0?(a+auy_)V&!LL#RW`BcY#kT7%?z`Am=yOk!m|*nZm>^pB|%Jxt!0R zo=(h#AYU&%o_BH&!|RULm*vp*w#lh~tAEI5{q`{C^^sHeG~=2x7Npc%o>mAI@de)L zScZfhbDgHI;w9jOtSdKlO%wR{iFvy^ndW0OB-#HRt|e+~!s`*XpaL@hF`kgBgs4qM-=*0Rjd#56ISu)g9Lei< zbdw=iKP+U#URqsrjy$ndMYZ98@`{P}%e0q7U&?=ldxsEE7kG{qYv)9rWMwH)N*5-1 z6L-Av>bpF&zOY!s8mO2(+Xr#=BbXDOs%V%^;M;r>#kF7~u$}k=&G5BtAeCe9j*Dhd zs-V%81u*IdhJWA|a8-Y)k4U0fEDDcIp1)vI7U4tJB-R5eIXvz2@d7Hd>bXx2D`C%m zOwAt;pEMI`fAPTM6O-{t(r)qu~U3~qEN#`lsc)vj{eF#+IKecHQqlL!RzXQHVGGYY@VsyAN(w`ON1NG67& z1>VeBaq;NEc&aknVp<(2KDuW1ZpaPMN~{_}lln=7#4~^5po<4N9}r^QxF~d7!}~Ng zrPE{4V9kXE{|aU*E9JGkMt6^idUP8l_vGe>+6KnWNC7Ps9%}&qMMM6>g5WzAovDv` zvU%8>lgw@G+5t!FbTc4+oHpeiXE*VhqLop2c^5L>mOhWQS9c*A@&VtkGL|t~Q{*{P>*mI<{VcGcYEOy0 zV?SoMd3G(fK~Mgk)T34%JpeWh4{Ka&RgP-RZ@W<;ckk=!;84*pMM7}D(@PW7MooY{ zIJ?qvOeX@ur1y_WUC*~b+4PRc2c15h7e!n6)1vj&AKrbt5O9*=*Z}fnUG-Ty*Q|I> zT7r6EnHNGel(-^4HLlmFz^kL)=H%FWM9K6en>xzcA%CIb`9M2a3@T~tdN&8byV74! z+r%l}kXWSK$!ptPS`B=CYHn>SOxx$r7oV7Z_wVV9dn%+kb6M*ZG!~54X519Q;xIH| zNeK2sxzp=}01-{-#lIt(6=Q&p*{-nPZXPEmr*Tyf!|kLz#)m5GwNmt^Jf5omTbXRJ zalZ7O!5ED^fJ%~uzZ@3c*jKEBo#wf>P=IeLVQw&+E~{CYpl!I#dG2kswPjFe!70}$ z^zh3?PUB5oonkDN*@P6<{FZFlK0>)fOV$9AsHsH9l+$GEz>-6=R&Q>jLJanNxW7-K z3iDEnsD;`0*FS|C;^l+K=N!NMacTW2?&K)i27ATs(W_MXaUVjH$)Z)?N|hg8jI0xP zz-o!&64TG0A1Y_gQLGL!n|3}fX*MTxw4jzC_}$80%d9E4Pm40o$aCw_rm|q)gjeVD zlMq}hue2ji8w?~e`??7qs0aW^Ss_$k9zi(aPH69TI2Ej7G0ZfCja$SQ>u@4Rgp=$p zFG_tOOM>K?>h0Q%9PVGhc8$x8?Opw1a#rG8u~RN<4EZ!m2XUy6t>fgp_oZHlQ=}C8 zYD|yN=vW~{G1Ym24*@&w7T^8tl~qlXR(ZHpzkYJVXnWt@>>i)5U;umt1$gcMiwc|Q z#T(ErufAIArB+7~j)A<;CKDQo%Coun&VI5x%PD+!QO3(5&c6{b2s8 zdf^djJl(xn?z@8sy4ae+F?E;mJ8HCH%A&Mo?EsW)CRFx*HuDWd#JY%0+J3yc^|Ax# zoO8=Ft~@_2zJ_Vz)`?K0gkRV?YsZ{~jb=^fqoXC81+wYoXDEF=8B5Iv)TSI%ZA-6& z7K+-gg$A*ol+>yPrsjWhHmI654?y^Q8nxHID;#QHs74;q0uu4@p)b~V5XXT1vjz>gnMO%QLRO6hTWG4MF^aI2;ja#Il{ zotz|0O|5_QYan-E3qH)_H6-aWQ&(h8A(R`hzDW0`AcT*%WM;3eb;+rSh35WDXSm*8 zcmXYAI-rMc^M4eN#)M!S?lVGVCWj!*M%~%+Y-%XP;)@H@&irXGy8$QZUo5eqtU1E7ihDWc5{H_o1 zp;JOR!_hvkhzk-h4h)4{c*raPRb zU9&#pZ?eAtWV0ihTdy{7cryPSo^%Kq4GpyFy}60qF#ts|HP`aN!pQuhj3d7#U<16t zTLZF_H(Qml-bPGf-9MYc@1%P*3NegJkBA;-icHB}C7sFD6*cXUsDdtMS{%opcO_f# zvg#U^=Ap30Fd?^nhuN|Uhq**Q`3zsywXnddG}b3SY00WB4yiWt;@nC@$)!*c#z-mx8U8txG&REnmS;1S_d}p z80(-$!*hC7=Ac0N7n*sVL1LUg*4wdsx9RH>fo83~u!Fl|&(x@Ir3PpdhzIN94}AX2 z1M)XkvC!;OhU|l^Q|h0GNw3l4rEk%zGYWMiZ>opYD82!}mm$j`_`Z0*{U14BJ~5cK z{NgolxDu#L%V%!2M@`ZN5)-ZW0-Lhd?7U7h*yb zQFLF!L4u|Cxlt$>fghvZHO~tG$i-(2eHu6*;PF)u_-C`g>V3)JmU9L~wQcqPk*oRw z43~`@e5jlyo|Q{fJEXL_$7^Ea<72T#$Trg+wd7=r<)zOQmziEGWbE4EzSP|h*I%;m zZg+LdsTXUqQP0A7?~0%&Y826yE%~Jvncg!h26P_m&1e8=weG}oOwGf6WIzQ(3xPXd zMJw(r8qWlsi^*O)ix~)q87w$fPr@8Et2>uIvw5}UYnimTku&YOgTsr*vd0nUKE+)p z8*MNfWc|Pk-h?8p?pnL)g~IG%VlbOrMC##sRHIl8;v+dh-V-3H*U(Vqb+c9}KEGxsuTDFfhdd*B zeIx=FX%8eaW|y@a_GJtp&XrcA&)kB~%qSM~v{?o<^zD{QF7(baY_keK_8$52KAL!* zsBst~k&_{9wa7E2o4#(u*APS66z^Nl0ocHkhA%-IQK0p65l_&9?%3>n-F`IV zIsAyoQ$V))P|V~G)h2G8WxpAg*2$YdXXhq6Q=fsQiC^^bmC<Y9*l9F<@$3&4EZLc;dy$VR6zgm5CS+7!0A}TXYwTl11 zlLFV60E}2!(&n&jG=MyK!0n(cFQeCD9$>@aD>h0?f=Gl(_-`cP7fU`6R5u0mO%TKG zUeOzhS(~5N&w!Xd<+padKQFsQ9EP`Z7D;hS62`KBP-A1j(~qU_nGlgc4sI7uHl}{# zW#~PGE7cP=6fkD$WPmDfg?3Me$y~q=W&rDX*tjf<+WH2tAGhe5Ho^!OASP{@{B~Ly zyEij(lLg=}r0*Y%fP7ll?~1F2A@|@pJ-|Nv3q(X*tV%f4i2NJmC8BM|9Om71A>7GV1y7pgoyewOxg|Kv6>(USfR z-CH@LN10#|Bsy&-X}wWID;aaxo-XSZ)7zZga2)mQikDi+jFMj>#>gfXQk&bdBlB^G zzV=VyfKQX}H|oF*NwKh7>w31igtHN#61IRYTpR7YWsHcdnTz-Xp!Pqs2*=foDWuY} z-SlveRy=zdG2(^iN4&K}-hm_EWU>Bd%#_>B1KB|qs7FA-XIW%^3z*ul zW${ijKhS2?RTSfjisOW{Mio`akvt>-ni}{KocCw^_$7a95&)dz{-;$)9nEs)o~8dJ z{YqF%1HO-E|4owb2)mDE;snZ}6}lty`lG>U>Tcz{S&QA$?bp3KXV~7A4$Q#d$avG; zz1GSj%xT&p+;n=lFH*onBKR!ikq%zFED!6`bYqAbJOP2Bn)3KzxsJ867^c=!(s#n@ zZ<4ulbvq3k4{gPB0%~aNv=hCP%e2@Urkt+4b6R)&v_%QLe76w{T#^D}n>9io=BH9T z8q3Go^*3;r#*ciHvM1(nUeUC9m)M^UyLa5g3c(`!V6;7Sx5`i0f|Tt_z`!y01)+e zDFH|#HX!M-&jDxkkf=R=`qwEAvI9>CA}=Qc@2QmkA-FryH5=kC#d_&(_o5r^20fq9 zmE$NgWwp9o3fHc2UYVapQZ1S{J+lM*d05fJT=?AOinTTurX_2R{ywSU{y0YgwrpWj zxoHs%6$@-|+RPO-kiX;!?|!JkVXp+poU)p2hj@q8*ZEWzyeL(d?4=&1C24Yr_hAR( z7o@YM)%g|l=mM1Ct~K2&GX8h~Rb&R-kTZ(gg>Ub-ZoXZy8!5_VV3Vt0$NRo`{Tn8` zE+eLM*FK#@O3SUkn-g_DH~FZp(YsQS$Qi`T8%$)I1V~Xgc>0Z}ZMp6Io@H(Vx`l~F z?HWYFoRRYG6#@2MYs7$J;1Ex0adP997-30(l4}b_gwf zpg{f+Eztfowr0nss-Gw6dzyGni9xRLGx-6@lkCoMWSj`?Ubk4nb3tb`BPK zF_~N;?(q%vYztkod2?Oy1yS(X?k0fFJW`e|0Map~#%B+DJw5WKUwC}G-O9Y6E@Zj3 zO2X<@`77a+QmXkYovYa16}y&U>a-es&B28%s9vBEbpy&IYnEcQLDif;qbTpAEO|(^ zVoa)78gNEqes!t=Z;`jt^XqAVRbHQd8W+B&nC+X__yXpD%sS^JYWJ51KO~q#0nX6$ zwV-VWQ1|+N_(!^rkn;mbcY-lXu}@FId9AEN<8m@Fv#weCAYpC5mjS)DQEl=MOvon+ zKly%0Dblh!s8WpU@=tzk=t)DW#7O{J4{@%YzqBt8z>Oy^U0o+ic!Z~WJVSzuH26fd z*)VLBhxiYocSSi^6t^m|D_QLVFne@C0wf9$>&wqT`H^8{gB^pdDf13%zK0BN^nmz1 zOQH{PiLlmtQ+IG&onv|egt@P4rzIPcq>!GEkkpVQ2)1kyk<-t$Uhlfn59$fX$GCHRK{kme!HVUq%?VCKpK@y$oE{E zuOym~kwrzFiQ8~M^!Aqh%hewf`W>BX|7}!e|vmJ5BV!sxAK02z&o*Pw;`WsL*> zzpe4_L6R2%nEBw?S=aP@Ge4VrK6EzoT%9NQMhje`UgjLe{mH;OntJSqFDGP&&PENj zGuU59jO~4uyuxmjl$dH#0wYbz;9DgX%yS#t4sDi}4Y?~ujexGns7tMUNXxy(V>8#( z&kv)Aboj#ST|8mq<~zH*T(YwC9#;*@vJi9D@wD7lESPsVrViy1AdJ%>qbaGT`X!Pj zPic=Y#}VPuF$E<%>>ssGke=P+f=xNz5|-~#H#=-b^1Gb*!}8ClT7L%S`~I1|YUH^7 zKwR9SkW~Y-ylI?Hf}3q;FZtapiy>n}>t53eO+?01Q#^*|I^yu>$Z&LgCw>fQura-2 z1LO*`>14G-ytlXregp1IM-PlLc(MYL}HX_9TPDhltzV`?t$wkxNl2A^1%kf~cH09uSCKbo2*ea(I36NV7MaD8cl4 zxi8yCvdLzkx_9V#NwgVsb}&>c;a%#OR=f@S;XMc5X|**1;L{jd(pgV0Q^%Usko!Do z5BzTczIBjluxD3$g?JM=WYFv>PJI?M0 ze@c5ZFl75kDkA_M0(`>hN3I-&YG5_$A((ZoYSn%hJ?=<%8R4w**(i<Oxgu_z_5iKv-fH@7o*L*UQrH3|Y#n{;?zL6FCR{;YSyx$)QSO zN8+#-v4OZ+L;D3O<@}ih3N)0t6dROQu3+e%CWMySI$oU#%YT4OoFjh{GUY~a%0)-+ zHou1Go`9VEl(HH6WR z(?_TR8vM}flv_kNS(%sh4A{=?rn0WJky?t`<_qw4Q}s31S(Fr*nzY{{$O|w0-!{lb zj4MF6Y?u=05?>{kr|V-g;S*RUzia1I_+U|I58;xuVHuZ7z7UQLl`DeYzOy3@7LpG8 zJoIeIlva8vTH;NsOF?X;0G+Ue{i}7`R->>Ve%W9Jai5zdte6a>W&1QPvbz^|FX$no z$eT)T&0BpAx*FhJy$4-&g_h!zOQSYo+R`AbmaZ9*Kw@xrNI8 zyV*c=-{V8XpFW{a$Bl4$3J!8xq$S^N(qLco+_DLKO@V%$?)qps`g{6Qlne0*a4!zS z?XFQr$nwW_csaJF@s9fzdcapH}w9WS4*7(gDTtxo< z`Lcv}fhB;O^u>2qe4To!J2^!v6;@)+9$`CoZ@L%+5ub<`RTDCxpNiBdQj3X>=`8d| zrSe@G6kOL5sj$T5r_*;^t^b-Nvt)R`P3gwq{aN zh(rXWG`C_u(j_;uOV#RkN2{`mR4CkQTDHP##ky&7j;k6!snHY0v)-!KPu#3F5w}16 zfnf?NYBo7UeC*m}3wB#U)ZiDnM|t{VAtK8+$<#*&p#e6Xa1fbTRvx~Xj8Ex-o^M0t zsJ9=rW!W5{!;A3Rc(g!Hiq~r6@j%X#R7j!+ZArTg-qaM!%KUZWgi;vcL$Eb=Dbi)ej-XH_1XHGl z-4j0doDViIX!bm+=<|^7J&Vo!?*bHf!N0T(0NcKJ&Lst}FugV}oBM@OPWzz(k|Al5 z21e`CO+X(|jbkj0lh=paL)&>#_aE(uVBw(>>V4yv(N9NKL|!TA+o`cxKek*4C7Qu` zZUT&Oaq6fos0R6vdk@INX}?=7y6S?J-PKB{idEe8w3XoD*TpDA9wv_ySaT|{%KK$S z#2gmj64mKmao(8z$@GcC$>!ae2)R&q0-NX~vq8)a+ZW!Wf8+yGce5|SD3)g?Sw2^8RQ}uIS#}HcyAe{dUZd%_^hRTezQQUnq+A+pK(Odc)6{u$TT@eGB z!&{LIJ^M^{ULDO1Z1iKtFMONl&dbO}KHT>V+9lWOvKNm8i#Z2xdMNI4y-TsP-Tl=_ z)K6zYD^c>)0UN8-jKh!=3M^URT_bu70ZsM^20Y*$=Mo{~1S--&j);r4H{nwY$kwM< zI51t~#<-318o%tCb!6+{8)Jz%K%3 zgyZnKMh||`_yrcD(okMD820)Qq0^kp8E`FwKx;7n&Pshn(L>Dc=>e0Ir*=U{cz4%{ z)KBgEPWWNa||A)v=+IOjVP{ePb5w zpTQk`ChWfpmNy4Jr;=%ScAwUP3GbawYd@Ajc3>ct99y=ZCCrI;Sc}8FADLgdG|>JK z>MLm#*y-@z9I?~;>~82vY4m09m2#&CG{PTco-z$5H!m0a5S)?LpkC<6U`=j{Ig;-c z$Em9Z&$Ce;{3`beAXsQE8bYXY;&kljs-}YS{R3!+yX7#e(9Sab$w&rn%h3k{Fzt72 zW>{2SC9^w($f`9&mwJ$*iY-6d^97JB84uE{_rdG>Ur0o#NfB1-qG$qN%%=Dwy{1>x zBV6>71%voAMuzbwq0OVz26AWhpR-k8;UD=KcQvvEBIN@6<&0Xzb`b;LhVb+06osh} zqqY(AUoK=r0$u4UWJ4NU&GCy9`+(PZVq3_&CvK2=u4VT4*B@4tCVAT1tKly|)6SvN zvG)^z)Vn07$=C14ctg&=j7!R)RwxG~(imNOR!4c*0P?jymJnP;6WcIdjxgzslyq#F z@yimDq>?71AE{e~?8M;o@xmV6gi@kCj02bk<+WVsc;ME_-_VD42le_bE-6seH!f$I zN`(Oc$M3&YD-3Wa+tB@<;kk;?L3K(+S>24u1e6ilLEyiR{7#4pvLMy5Ah)3TgCoJ! zt1hX+-cAMe)ut}_-st>QqO3lw*(YEhwAboPy7FzG8>fl8AuA7yQN|VV+@3fUt2>oE zAaahF?=YHsOWXa(EyInq+$w@5UOr1Z+||yRO!Yc>m6zZ>i-xWzBH%R{P(zX7fuxwq ziO5N1B71JEZ#RDspJSj<`8mFeCjA5I$8K9+b(0&mEj%LXz-BXgiO-_U zpYZh;PCZU1A}IFZTGW2;ob~k+C)Pn#UR&Mtw?^Hm4N%`g+)~}-ntGaN@@0utFHCI- z^2~wo=+Nd7=bfkyL^PRxr^@|w`6J@Ae8uTNsGi`-;O_^(g&WEQ-0 zn#->BdOD*ai!sp}Mt`}GRX;|wi=bruY7|Ci7Tl>n`1;4x{a_3Izk_CkGN$I{+sCFD zPqTiAnziu9pyG~~e0aL2FCK_%Y^d_IprD}1xg{}}6yLJbE}!qL9u}LS@*}Q<(Y#$s z>4qU*JxjNp!_F`9Xt@1^xD^NX>g{Y|mZ7H-y75w!{JK!wh2%F)jQ!tjce0Aidqi=d zqKoU7hn~ey5;-_SfD2W;>n?r!UJCECGBqbNHULPf!zk@@Dn225z}9vL9#JSFZf#F z5uANvtYdv!-*xZ{0y=qB$>eMp#Zrc8_}pdZMVIgFI26g*?68u&nBKVenwQ}ySTUoU zX#|)!7nr{s_#({j_3@K9hMB|Mo0y22cQ#|6&QKbk>voAkmtWHU-S9lW9+W7%<71f%Q2!&;z;^_Z`Kr04Rgd8@8CPj%r0SurP zPOJW*7MNMZ%YBob9sgjgwq{EBb^|D#hD$l%b5Jo(`BV4AD{pPtL!#E_|!;G%-n{_@2qx6$?-e)GxOc(e_ePckN< z`5X&$z5J+9D3&I%?u9Ji4{j*AL|})j>SKRDcKo^V7CK%)5N5f#lk9lkM$6yUC>rG; z$}@lu(WJwpJnAUi-+3-ep|MyFeOu)4A5kl!aK~BYdf2p`YR*B&+LYN7Iwms)9W}ThU6tm=4dT?+XrlG{mWD;pXP=uur`|1HACy}U zCEJ&KTsfqW>1m63{$3pCa!ycNs{~32Lv)upjRpi0>QKtDN%hA-$R6>!3#W4DuHoa4 zqV^+YNj~JQv-ay_N-?!u|FHssE&VnwS2fRN)t)yK}szCMJyrr-~ut9G0hUrOmvA;24yX8NcqH=gh+hDc@aaugcpsV zB`iWu0tn&#(#)DlXq=@FQF_sc3Bg=)FV9E;rv0?xpLm3jL)HMzP~kb;b!JH; z=eEnQ33zW8x|65Y?!eZ}dlgS_sOagsVX_TrMNb8-tOB?IrIVYypk~{aH z#&uHc`m>5+X;84rW%ivPZLe;EY-s!VFM*0^$kx6bRSA0a{pPPAy=FDkiuA8Pu`~~L z+2>RC0@di0seb5VFrH^1QXaTVNrq0}v_$+}q{d4#qaV;kf0-cw=Uf33l;zf~7`t4j zHIrhtcwAp#Y}16)9BXjC{*Vn_ju^BTQvp;L6SuIH1{N9-moL}zcf2jQ83$R0ox{B&x&DL6?{d~_EZ!$D7Z3@5tt>x70bu+bgr>Iz61>?>QTeDmO`P}%Z|9%`z;1z0xe!yFi@1k^nv-S5i4n_oU)%l_~4pb@&NM!e1 zZPnrs3+^qg4W+_Sp-sq}3Vs!<>v@eT|K;w*KN5BmR@;7^jN-5F02_+oRMB9Mci#F`ns{*O|L z@K-t8urdOnGv~(`nsJ&^OGSy42 znb21SDiH&scwmcK$ta2zB9-nLrf^L`c^|Owic*58>hDmdlO2qT6Fg@aB$NZg!EWrh;9aQ!<++?$LG%C!LnTCTb0 zIa*r?N}6wXA&tRrM`ny@?#VS~PMv^nVKzD3G>*UBIcY-f_V4x!kP6|*SiR4yv)ORg zr>V~JsQno7B9&9tNn)RHr=)emufY#hhf~XmRksK{1stZZn{Fqr%EX(wcU~deNxsnvwfmB@w53H9s_iV8eWum#yz@>B@O6m+yIuJf(eQ85f~|~n(qhY z-mK!?(r%;ryY82Wi23-;ems3k@UKq(zrIG);IF2L(p=#5<&8OYhL|^ou)DbwZ!vz| z)v*3L*C%))-v1pv!$TxBwO|C|*6#V)ngwhoy8$b``OV!qWZ`puIvWxX@L1#}&+sEu z(cd$P_r=a8YMM!23vsx=KU5=#zkAZhd-o;-%A;#uo%#1`M^v)l_pxa1M3<$^7JG@G zvb=j_mMh)aoxIjks=KKCKNr&;{Xli0Yn{`h!LQ9;>Y}cD+Tw7m&8#tnip+==-%yoH{Kc=QPpsnNYBWOhP3EC=SG>50}#Z?NldCds-T*cS>VFmb*8^q3b>8GhGXUFm3H(qfTZYQPrgekM}WT2W9 zl;rP|3fpm%vZwi@i5FY}ad`s`H@nf74psI`786e-vUELaK523_|5OuyTlH5(jMZ`Uy%c$PrPcAP zV=kew2{d>D6B1}dWK{r@V?+0)UtoU_8bKaeL|Vu%hO?Qr?rD(34L+a5Ql*+Ek!?-v zKkYnuT0B%6hZNyd6g}#3iL}jj3qc4-+&*Q%;})hlAGbopCvj8e-#uh;aKum`3Z%t? zp7In0D>>ADesQn2`9&AbGJei&Z{Qd;C!gJDn!drmNKiPNQ~dXPmJUJG4xT?1Bv1r2XYWSxAdWFnZm-vQ#+jpu_(@2QSzpsXqNXltv5&BOn{ ztUOOTWR7w`jyQy^#`+AM5ktS<<9mvxBQiRC%~8^x=5oR`6R;8cnl|4~V_F_Cz~#DX zjGhpeL;O0TTq8qsi%Q9|V_yB>1qSi{-;rXJDh9$b^+T)b+awF8y)GzAen|*=C&l5`8(KY{#-bstyYeFjV#ZOK4Zuu7FVa zEw%IibvGbmR1|#;znu+tpt%|2Hg&7D~H7&pLb>DhXKXbRIu~0$zgGLW#hoY<(LC$U+()b-}jE6C_)WT zgJmVS|By-i+K(RcTaKo2|9X7?L`_rbx~ZyeN*FPw0yu_4<+(4{ zlq@Z#ruNIy3n*!mL?3CIfV&XqK+W3U(e&TBYEUS`tArI(W8FJY-+^UF<1&??=;j1? z_2&|yB@6@+dgzP(|IhB%>e+t%B|G`c6s{msCDbBef+N%WpW*dc-~V3=x4C?||L>#O zZ-46Vezz%I@!`u&8C#ryv#$;!votJSe`@+|{l5mT|<>gBI7fw~XuE+h#O0Al;&F<1iG!uO09dKK!4m{=c zJ@;PcI!>2`ny35t4P%gA(q*D4gmrWnM*1V1-n?*;-(L2sPROmmN=8e(&1O zXI%%_?SDA_Uibc&9?-X|^RAynOWlzyWe`Jrva<9 zEo`&WToZsteOUN%teFK_kp>U#85)eKrL#2RO!b(eL2H^%zu2;v!^ghS{?B3iE${!m zd+)bo`E}*XmoL7w&j5BK(fqf>r@`s+@q6M+me>FB&foTY@0Sm&%7NFSL1Er@+scWwxw`@_^NGE)1Dtu_|FQY|t?u}x zKK?gfIm)g@4JZdGmb$m<6JNgEuXOqH450CvyqmI|QL0R2r*8wT=z5#Hwj8vr^aFeS z2lj8gxASiM;_t$+h=8X7IOB#2FluJAEIaE8oD!+~|GobHy?@`f-(GNG zv;5DU<{nk2s@h-uKufmUTpon~m-q1B|9iz*-LN-px4+#==AQ>l1FDm5dE)lse2^E@ z*OiL^y$CAZUYy^5@!gNt=5Kx&zGOfS3=lhEH|L*I_WxUIAAOhGdNAQZ{#sy-ewVq* z9@b{T@X`$_piiP7FWc*)@R{Y_|9{_s&5OM4*-O0)KR;hA4EHdU0c;e%DE;O9@MR;r z+=lCWo|#5xy8T8=>d4$2<;K-q{<>dLJdnMHi|r!}bo1pa(pF-m`?ygXI4xe{Y7?c2 zGehC@x`8jK6ba6M5rNZNaQ|U2)`1q+i+;>likclU@(vbHA20#!`S9JlFd3!$gcOT3 di{JJQ-~oaR?oM!rOaym#f&_ONT#_KcHMj%@w_$MS zHhZ6Q_P+O9>xA#e{kK_bn4a#g>Z-S1d0wdwR8o+_cu4dR2?+^9M*8JzBqTI+BqWrN z5AFeHcDQz4At9k#TZoG*$%uB3I~M@2*oB0rEuYodCM zB8`@DH$oSc_!$~?3?c6OpeAO`=xI~PKfp2#k&!ivNJB>T8HIq@7xs*C-e_xc zzvFbfZfI<{W0Rrn{O0YY<5f!#rXB_C&byEg&!gF3%i=TWNX-zsNPHww)isvfC(=*c zFx%>16H>Gl;ynikx-z`Y!67FtlX;~t?)4OjhcTY1@17`(Y?SMv`(%U^jH|80uvr@Y zT@G&B9ieCOSml&1xfd5Q54ADNNvq;T(P4Lbd*RP3uRGHD+Xj|Ru?$RfQ8Mu z7{rzz757C|Xfj^%mpHYSej7(|x8;;=zm}x`m3P7sN@?(#vF%Af@k0p)j>lG_Ta-QW zA+IMx7;!3$?%8DTp-No5c}(}9ZQ<)HpCWcyqPWi$Y+dmfE5SC{LC-lDy~;!ro@5kZ zxde5R29U43*TE0a?D`;tJejceRr}<9gp$e5gd^lRzjFJ&*z3nBpS6QksNL-uJ!f7- z5R?ppMYo;s)EevMgkO-v3cpoE~#hSjA*k}zQ)WsFUK0%?p6M<3uh%5o`-HW_y&TKW^RI#yE z>xI@J?cFDfUXSnY{c=5RWkf{OJlRFHe0jaw|LMbhSln{#*gnTSe%cF51}!jTr0xd1O&t`g1u1hYo{7g~ ziQQkqQu#@_f3Ee5H(~@AtK;&SpmE2cJ=L!ePf-zOp~oIaAGM&2wi0TDB5$u*KEQo2 zVo4`sL!$g6Km2eJDH(k`xJzQFJbHG1MsL(dQo!eFz9MzK1uq!zKh7g(DVLadw#Dp% zEErDOzJY{d^=+g4%~k?3)^-UUN`uuP_?xIuU4+yDmalfKq6Cde$i``x%!%oW(Z#&_fo zkTWQ7+TK$~+@oz}e6%1O|DHkrUc#dwF$N9Hv3H01Todo4Xg(v{G^WY*`QS$+r;O{9Mm`XYJ|Va_Y?l;s7% zXW1c#DxBF5W0`b=!E4S{DBgibhDa)%2ON&QPmK(%nek;iE7%!$A2EIHE_+pU&+22# zzFHB=W{2?N%aky#w`R2;sCJE0{1rRQ7G!r1PgooAMLy}ZlP`i!)R9B=<=#@C;5`4x z@zMI*lNTHrA!Q%lCcGs|`=anokTNn)v5Lmydu4)T?=uBD)@QcVJ5;>5(}CfEP1HDD z5lhm0bnQ{K*~qUsEJ!V|@&lbdjmn&T&M7g?S;@iAi7TOflbrh|2MXSivN+iBpk%s9=E6{lewg{^17RWCuStZGp1%^V*`IfcmuIP zdC0%9ym9_>AYVlFTKZ>(fYRisy(+&mgEL)qqDS&soMhJI;Cu7+D&(oxT6o*k+jq7< z+|&6k@geK$ctWvqhH|031T2Cr2k)=i?3N`qA3@n)}+9HTj=~gMvBZ8R6^GYmNu|2l4CVqb(WN771PKW9(nc z+P_=+={!A})2|hafV6&Y(@+2E{6WzV{kzh4?eBPg&VI+CZ>jEQxn(g(CWj~xJ7bNL z?(n7XH5#9MU2qLiHo6Z(g{^l?hk!#p<>lnR$y3vA$|)o{C2u6(OI%4P;RV@FnMm?I zV#iG^=C$JV{5ohbI;E> zmN?KG(>GbgrW$JC*>YMiSMjGYtKtEzmYVWvnQBdQ6|?=BvDP>vurb)ib0Ex=z?^Tg zWOyeDG?ZqMZq+h$Re`ecYn{R=?``c;fPe>o5DA|ER1iDGE2T{#R)H@yzn^*a#j541 zKkFIm5bM77hPG~K8BwILVS7L&Rdc;Z{Yss!Ym?w>GvlQn?o`B5&GwFOVRdS?I*z$@ z{&fQ`rLMl)3v17ICzkAcqIdYG95c*7e1MQTkrz!Eu<}sd{3r&fUS(pL}}|F_gqK;FPCmu(7|*mpWaf{aP%xsY6x>^c&%e- zZSBWUq2zpUc^G!*X#0B&g{^{#b9<YoWtIAu_60c zwuy{u^mf#87YjoY1MGFd>$zON>=LgNcT;oA`*#vikFT|9XR=nk9H>-s~h7l zD6TAh;#>8~UhgvZh*+77?OR`OsZHv96E#RI1GnK96EyV){+LYJ7v|%2HM8~AwVZ4A zs=f%hxK|$bT;0nuYCStYdWt42%21}$c)rVu_ECK? z-jg>^d=jEKmj_k1^B41rM@Vv5(vFJgi`L@TPn_ls;-0Q>t@OJ+kLGdQWHx@YQWQ5C zS4q&jlY%R3Hm==0GgH^n=a^dKFsHY#vdYKGuE}op6_)RI#vRQ_A(Q z9tA{ym=0Qlf||R!+BWZ8QxQ>doVx4w)0)-2xrnAio_-$i@j9Go7VD_zxaE0-{jZL% zc^_E(6Z|cGs;`{C8=NgfX=S@;*(j!#m1GGQH#a@2$oMi;irB@DrxFZLA}@ZP<7z!= z-;KE2d7d1UU=hnSjI&+P|?qux-a5-&E zd(`{LnV^Yv4C(bSjln6SCc z7iBk7&%a~Z$#PY^TC;E4(yZc^3*Slc{OCz@T)h(yV)s!xZMcM=3p5IZfzaJ2&gc58s)KE?!LZyCcfA4HtZS`g1o`8pu86WWo8rKPNNdj(XK-2&qv@67YNKJ*lzF0;n&C~ z?GcTy!HlDT`w?WKA!8~pkHiQZKR`mgLxgk}IJyITgzpgl=UDO%Jrc?v=aG?+{4J1B z|8LAuWL{J60{xF$sA@QA$jb>B+1aof7~2_|u)5j2 zz3B%@$V~t^v@vlqpm4LXwsjP615y5QhX8PVbDE8k;*VRLtU#0+@=6rqb`B;KysYf3 z?3BU}DJUp}9E?o`UcZ$5S99POh|=82>8$`8o2#oUt1B0)or4)02R}bQ8#^Z(CnpPV z2aBV-t&@Qpi>)KopPl@>pO+?%Mh+Hloh8Va%9O#N@9_><0moCOFi z{7{JPKZ_>(@S*>PB(RPo7B3Z5fp37zZvO6k1OCzf`3)T3AzRc@{pyW`B#I>SQcTtD z&erUGFC8;?kzFZpMdLA9dF3%CgxdJd9h@KfcZn!Is`1ABe7%;=`S8_yj-e)2o4)<>PDYyQaV0FW$GYBF>2yu{2kj2F_`^lnydoR$RsHCX=4?g7I^?LJU$TMmRcJ7Zs+sbIS z8Oa0mQ?lC(n1cNyDypBKQaOn6Hlw%$c{Y#o-%0SVr}{;_YaM*d2$iC_1=%Pl*q1zi zPhFtv*2g%H35i~`ALZR@6sUe)Shpe9W5O56$l?;(TX44ewVao3$k zuK^KSn45cftA&v1k`fbX!QxCz5RmB34q{zz7i{53*8jz-AH%#+{m!sQzWi6+@aO2n zDr{Q^6&cx6R z850o`%$cq?XhcB(TA5gSn|Y$v0~2+oVz?lcRWAyPwHlKY$HDhl3v5?@gU?~tvGjcL z9Y2TB)aW-~B+zXHosb)niGj{jQ`I(RgYn_sxE^0gaei3+)D%4%+rW8L&zs^RK&y|7kgV-Ic#U!=sAd3=xI$4Z@RW^F~DGDm#b|7)CVIY z!*g?F@_l{fP5C_huumrKNrwpEnpsk+jm^c-Qm^$#_oJ$(+DtTNcRon3I}@;gpSt$> zayr^d=m}h3=m5#}i!hDZ1R7NT2GbPsN~st*rf{0MHSQOEU;O1>>F7*@Tcz1-DSv@z_J`$2y^&P00z-8irv_H` z@}xQCjjWa?U4L3ewE9>Z#kEl76 z=4ci;C)ad-T+%$pA$s*)eY3_o9FgTOp}E&G7gu$;;+I3nl?koMNrYKMSZ?f2oy;{T zz*Rg$Z=*0YKbxb7*N8wlo6n~2FY=Llnxt>kc&Uib9Bxh3{#u)Cg4$VF1&j3Rkp)LR z9`qa#DjGimL-{)Se2$e!gdMfD-(L7MLG>DKt-LM@1Q#d25E~lWfVEvZp4rdIhW+^H z;sQEdZ|_;GRG%Rkur3ZWew@`9r;=OMDK+QzMo#91xCMpz>K7LGj$8t^aIC9Nmh$Fm zTFIZ|9m{ZjkZBnC98}Y6ex2Gd13R0Q(eZWYF+yz1DsGpD-U?I<0D`!DqCohgRY_p6-zqHW2|;?J zUT-2#rK}y)Zk`N&U8C2QMa-17c_OBhwCw^T?FR+ zq_W}#$(ZF7kp4X%(mw^17ReV9;GrJp?pXqhTjI1GUrIq-)5%B1x>dR9I#1wdh^BIu zL1FW5@64769p$ zvZy}2l-hj(_84Oi!;ZYY+NF;&h^b1&o`bydeE#Nx?}e}qlh~mol9t^V6xd?)iiEd~ zS{Rw@{NWH2JmAwnNiY-&Jz45G4p+fU$BU*FB9QcOIo&w9VzUcPj-#d`hy@Xd;t+1w znq&PQ7JPnk7uC-})wvZ#T!wsuX$sc1&V#sS^;R1l8$KN%`6|FvE{G&O|}7j}P@;(jobz~$&cE9!I%3x+wW&telNrxWYY zgTVTE4H=-{+Xu+&Cyxocm4AMHfF4VCnZTV%+3YkFX+I%$-{}#0(^}cOeMiPf7IfoN zgko5Und{~5Sf}A+ko*v!RpZmxIr@cNbbFIQTw_J^gzDP9>e`2c9me`u1UY=Tgx$lM zw=j1xRe-q*+ryO9r{C__E!cDGlz}bwl?qTLC4uWh*tvaXb`ykhgu8q69-J<%dAN+L z^zgQak;)GZ4Mk$0_oebsrD<0%UY#a^VPC6tN~zdmzEs{qJ=0sOeKc}@pI)Idg{|-Jez$xuY!p79CPxtgk;!KyWEC_U*E8>=6x3S zm;)0H6U`J~C7s6A!_u|!)yd6Jl2Esde)m;8Jy?zcr5ocN~Z1HCIIgE5X zQ%%4lCSFWyw}SCV_3c!9%Yr>;4%R9(8hxx9&kw{sZCXq`9liFCu{syHIyD+i`~4uwWiClj=0*LuM&v3=%e||Pw65a1C>^bLDOX6c6uIK=~GrOf3Fz{yOG<8 z3AF(GjHo|{RT7Yn=bjZ?nFrCmu?~tpP9L>8AA^Ru>32wp$<+%ZH8z6_NmC?mXoRraFQt|9G?ZW4cpnyl1c|o1(Hi7dVkRp2HW(+MM=?6~Zyf z>X?jhYHo(eRk(?^|GArGI@v{_TJj=P@LYbY+8gZYDO6?bT{K%krR&qyt2=F{h|JMa=d0XHB0{M!)nW(9 zV7fYSE7C~@WNVHE4I?yv3R_T%DXW|+QMicN^+)b_7-;@;b0baE3n>+c;+%|rm|#;p5DIlDGnR}1&_6(InutAV6z!v<*tUdfA8V#u&?Ym^w_TQb{xJ6Y+ET~ z$QtR>jmHC!2$YlsF>Cyh`qA&T>ATjQyFq;H2NTVyQCnDDF~+iciBVgwz(M61FU@3> z@v92OBX$~1B77oUm8T*;0}O~JE4zT{H#?Ux#=g#5C(qqB0%}1(o3p!{BVZ@6Bt~H< zT-(KxlV%cNHIr8r9n^#SY~vy%zWaMrS@l>dQ8uq~sL#WVyUVbews!NjzQ-7YiIQRC zSS(>RDHELxUHHX;>2uA4F~+k6miK=@gU=13*!TV3bg28Di(af4m2O?B@*gqJk3Mz< zHSn@N_izcz(s8Y>s%|G=VGEa#DO+taBO5!^4=ZMwPKFV;c+z90^Ru!(_h}(vso&B1 z8&IkzlZIMG-+9-cqJy9AF@1{oM6ONB$5I+Hrj3?vYj)HK8^)#WNR)yT9J5Uks?P|B zyx~)Gwh}66=4JIASnr~jq4G?PD$1`0H75zd=?2z~^v$Ily{>caBFY`Z)>QP(t&C(Z z79kRdF@i%Db|=@@b=!CQDq}_vC`kUc%5dwbu@}BJ}bR-3kNbL`^KhJV7}4Mt6*MC=)yx(yS4~) zcQc)V*tty>Pii+2CWy&GcxX}VG)R6mz*Wv_lu26}@VW7JL>0szCgfo$yM z8{89=g~?Arl$>-9jM?s}SEI#3_F^FPxXpLI0ooJ&2;F(1>=qQJ*Zc$i0bLK41sy%N z)spu@RH#eY$jjHX4$eF^f_+|xWfo*^sv7dwr%yVczh5r5HxhSpa%vM)Od>HOX^0gx#+-{ukEWO`jg^P>x8KtW+@ms97#Lc3pk*>84#?(WfJ71S0Ai@0sNyY*dK)l^9yfe*>an85> zLwWHRkgomWj9Xv1qoKy(qmh8+8w5m9(jbziS@EnOi|1+~(`c~`C0EMZ+k3@LfMqfh z&kCj@QvVDe?zZEDEUqcQ^jiag1c}1G!GLoRbo5vns*6VBqq67MwH847tJ7({Z>$&$ z`#ygzFI2%B#Sst{`7VtZJx?}y)+W0zJb4hG+-LS_`E_qsq=NHUo%JLX)a=^_hi!Bw zMQz4?YE{Y&xkZoyGW^E?=79lV0DwAJk6Vyc;INF4%fqQ=ZpQ7L6cJ0D9@;0r?0(;` zLzSm9e%|RdiGZsqfR|nBTm-rYsUD?=VO<`B%CoXw>*ocB-3FqqKYU`ZZ!Y1rFn-)g zF#pyty`a*?%1Ef$K_$hZbxC)+23pimNJpi;M4gHIi!1fR{c#G=xpMO{zTS-};K$W;zPm zC8V#cJn7j=Ga`)kG?qpzd2erSI@jC6#v*tMP%fKg`G}5@@SrYSx`Pvvb#u{VC~sR$ zX&uK^Z8kq|&DIrJJgFe(+)4L{p_`5k&S3sTpY!x$P0bZU$;JLiIW(VJ|4m<`6 zM3V#K5Osg_bxB$&$~{`&ht@b#Z%0$S)|;lg@0a%>HViMVM&+j9V zNRZXLLA>mvF{rk@Jly!s&w8SM$=l!z%Sath>XgxW|KN7o|6t`qJkByfWaYYbRW9Pa zvh*AtqLNurv0A3Iis!=3D=Dr5rgl%u)Gdh8AD>uombgS0Q2f2T6F#^JnPH$RWXu|k z#MzYdB+eD`JXNOCc~d%1$aisil~-CA{HR};e|i@2-O8wK_iPJ_cZ(U_K~4p{>{J|y zT^_DtEzV)3)e5h}`r0GEX``iG1H{q3-cVhG;z*_mG58j``Z3{apf?Ha9h1Vbj_UFG zI8?t4*zltPhDEv|=Ua>h0=da;(64*HO?Ud3p*QE|8InhiZ#Qf4F~j>U)9sQ7*nncB zWH44yQOWl8!yv|wjg3vzEuF6AzjC;yQdS4!nzfvq^fr%;jZHvpz#)VjH<7HMrS;nc ziAD841G%DmuRPe`l}_u!8gUnig08k9PX&1a5vsg<2s(X9;`QShhwaP> z5YmK?^<&;<@)=AN?5eHRic*g(ZEeG*rlx8SSCX@G1fFu_HB!16Lu6nb z?Hw%1umGy?{t#Af-zzE($CaW4A$JFKa$zqlkHsgqnfB|OluWB-4%MSCkPML-H=`=L zO{!=mB_g8w{eHnLN`cIr99lFqo=)iYv{7eRN1mJ{DG{HooT|EdXO4WbkrvM5BtARc z8J}sJa_?yRHD-B9VoMv_AZ)5MVvam2v^zX>Uo#Jh zdE1`(lcialcZ$rBforS-p-VGH;UdB}%ovQ%5@a(C?J)2sB{PbC9Qo-M2>|^yAn1qT z&?hJ$kja2{?+evKH8r*NtZ-qXo_N;KE|uJl@=h{h*LiQ(BHcR5MBO6h4*7&9_etIK zM@Ppb#l^+5?_?b`?(Oa6DfE+a0NLpCq0@b%?IfO|G!nt3-S0+c2kYgGXhba9CvL+f z0+N9`&(&P0Fw zIBa6eS*$^Hz;eBcL60eW8B8N$t|$dDYl#3(s4UfT$~nY7yw z@=xKd_dn03x?3!V3|b%Oe!y)pywqzhiY0QOq^hRgp5adxhjt)zbpk6loUAaHm&7P2 zq7M%W3Nkj%2wJjoccM1P8jBn24R}#(vp#;5z~ySY)pC7RPLmk7wVs<6)YmmG6HRN9 z!z3%ksTCz>6&Ge(HScpS0e~y4rpn}7jPmp7jf$zuT#qqamlj!nAVx~sl_$z&CShV? zB6KwIUZdPg0-c;g2vZPn9P{%7<&$|khG}GtWH}j?1xPgk1weG>zGLMXLvtt7DX1JJ z8vEmLr2nuLtNeR03v+tXP;*@z3L+j$Rfm@9a)a-F*?m6}xXctxUsZ~kzV*D7nA|97 zinZBU)AOV4M22r;MVh$Z{V;-`a+$sa6ce+YB%W4-iw*4-m(RBoKny)%=$>V)C4^p81)QAt znwj)j9@i69UEQ>&?(`rLQhR!x;mvHS$Hg-5B|`y)*IR4PVbUE#$Ym;51%;Zvmzjpz z$mZ}96RYGZaMdf_8Py}Wh0lP(03@g*rW)$h%@WL(yJHjItgnfzn~Tc=f(s~7iSJN9 z=}z2&($ayD=P?Q#aSAGNJ~po;NnS}|zLKJOB`y^z=<$7kYp`qH6L|54EZ-)o`{nabsiECb2&aM<@!k zPxu{fa%Fsm8fSloQX|DED85lv!`tq1xA>KpnMt`%hk+Uj*tx`S)>^bqRnD7Z6IJ#` z){5_6{_LtUSq~7;ini#!ovu&>{PkALw0pjB%$hjh8r#4dK?iI`2)T$b+GDkjdgo2f zk(e)?&@WV&G#MHFUzpLb)Myqm%DbKzuRECGiJSJA+-C&JsV36l`%Z!Z8P)E)A?YTteA78MGpesRDPA!C9Vs5Wzr{D7p83P$C( zMF}aH#$-fNNlEJH=$L{q?ti(H$xShOY6b{Yxk*o)xvg!`jlwPl1{gXFxb&onx3U!G zkAO_M+vN!M`(cK5UTY2V&`|j<`WKN;4f2FE8JJ3ce0)F5tt`vAtl>a?&i(TzPhx&= z2aQS$+Cvk~qFY3e{ThMUV0%5v9to|ksxp?uJWCfT4L!stMs#0-GwT;Wy;C|Pw2(F* z%~S5mdr{3{+MCdOV7$(4f`1FW@^2`5_lgGtR{MGcT730ebFU|=*|`(v4TTnz26w9j-MN{o8y+@>gp9u>fnFY;cH zpHr}pO40Y-hQ&O9WXMKj&Mqdf61wsS0l(MyO4c`+S(O8Tt&DLcw}>GnpzH*gfim`8zo0yg`rAaHlmKEOv&fa$ z-nz7bf*fe#RduhfxOI?%pmqBe0!0H9N~yk-ctXgSX}Erig00V@01rH@Vy~;GVULk* z7rq4_Lc9P2yf;L&1O+O8w2^A)eox<+cQvhB5cH++_o^6zj0a%e!EZ|&ajiU?4uVV5K#`*_i{XVn&4|x9vy#E8<|C>wok5~Br-z&VU(Z-WZoK^k>WH!*e7fi=> zKJTz`kigqq0#2?l9tc5vuiviu@cY;Wuz`yaaLC`y->(7HvzA=#?}0WZ?e`@+rw0*dm z*Ke_h?eha5vhc80dYxW8y@&q)%hTp|^*Gg@xhxz6h84E6pt`jBH}E-hlT%JrYu)hT>%jl5RmQCz`ZLLS%^AivkPt`kK^63Ac z+3JZJfDq?nHS;CSn>SP1;L{?Y6s1sv^tTS`;WGz`aLe`WTlf7fRzNQSffc-I>%mIL zUS3{C7XPB5Kk)xng~p`ZgnnY3R+ariSXEzs8c{>0p&Wer#1g13aJnq{Bn!iu&W-;u z;*S2e(9@CRuZiwu`xUY1Odz&S4D6Q>UpLIoXo_@Zg?KX!o>pEpHw72|jp>z`k$wEw z;$9spirn=(>$Ddw8RqXET=9!L>D|N%>B_RYztn6C)GR|(Kkv)80fpw)`fE9)T)+NC zCQ*v8d<}fISzj+zH8qnL;_JjA7H;%9jgxD{A4M0?xcT@xGiiD%MK%d^u@3(hwuC^Q z04ZkG5OTh;fnAh9U8LiUV;};5zx(d4HO=IwX@a6~Gj+Z;uwuGq)PTA))-p!livqvq zC+|hi&eEi%>0Q)Rr6P5iK znV7g{H%KhZ%g)!XP#-kz_K0F&U?6^|SY_5_Vg6s$oQAJ2k0yL~w&e7G3?Rf;i8J+p zQU-ELk>|b!+|Vj4(k3yt;iIsCZFy3TMyU1U9bqS1&B%}>pEj{`33++>6$xcG^R>~r z=oS1muT;erXjRoqpc2Siu`~pnWV$T;Rrha8<`>hdY$CgOVsWSpR!Ke86d={1$3Xug zqL^#PeOBio?Jejwfs7~Zo1^G^hh7J2GmZZ!O^2L?qe#@V5d61@AbNJ|$9kLc`K_mu z${z%M)5w1a*N(S7Iu3?e@pZ4T|CRoY6z!n0b;};lerWx^q_=ldtCGlcy|(?s zEfT_4{w#`8Pd$E3{zMjU*Hmbt{f{jjgd(kpw(EY_9^zslyHQ1=XXg#r2=}cBMRb(K3WyGUE0n+pk zn5K4)>{&9ydV2DX7x#`^LH_-;AAuSa%`%?-&6p@0}@T>b4+q@M}c20pAkE`S0@c zJ+qA_vO?8f!L5VM3odGZv5f>Bdya==Z-M{=P-;!W@%%DHNXJW3*J*jn(f^o{J?83d z;#FDV)#u6KVIto~JA)a7lViGF$ur0cyaXO7v##^-R__CGHMQ8u`G74sWqiw)!{F9t zoHZ{a4)0kzYwK6K`{2clb}LlBBfQ$pzl;byC$Kb5Kk_Po*55ZaI7cFXjuIN={pikX zpkW?7b@Uc!cRSPFS?NoLC8}W{i_>U3hX1vFk%Al&iAQX>k&RGJzL3+~zX zWRD3qwy&Pe0vH6vv_6}hB-eMCoO=YDZpZ6H6Oyr5&@y*K!R{!hnd12EfH3ajjWHl) zE+rlPtq}z6WWTmpH6i_c_;>wYLEFee{(}r!b-o zub$Uh=$nt^$d{YP}Dr)aADLHo=Nw`2c+z+eA6FN*$8X&tICHoNOe8 zLs)-2L<8h>)O=F6Whj6;r zvt`sEptj5FqKX9sOnta8pN{e`b(Rh+%4Pn#7V4SaXAuEMBVt0VOGTP8Lc4)Vvov z|2HH5fF}im9E7kTem7G$>FLuR=Sz55{OGyc^rcDf; zijotnB?F)E%7L?dJxZ^}ZTmk$RhaQkM-UsGHroZ)vt{&m1oMT;cfhO#oL?&%#RlT+w++5_FyGIPV|Gu8nd1iSZ-u8 zyL0vbdlS_J0WwT$Ou`uqYp$)b!i*90?cC(qy5TFR9(Zd5tx8r_ zvb5}@gJnQ6P5pGyGUA?JSfXxx2)in-ni@c!x-y_Jtl~d*D+UTIpT&4hZZ4o;Wjd~& z0ae=E**)+DM<9Kf7*>8$VwVPmn`&VDa^Ui|nj z?O2V}PoRFP+)LGEBjGEdy|jMb;}*e#z}82|p2UQfidTZe{CJwOvW|e&FzQ^XT~F*L zur(}RyF1)EsH{>DjqO(e6f`(bSA%ISuZDqgvnwC2qY9V`>5m0x(6 z;(R0RDu*E2;|V_GP%vM6j+$(i!S^KT@j^>~iOU2u4u{22LJotC=DKwXZ60rVyH~p8 z)6-L#wxbih+$g6`RNmgRktf;YlH;Ky(F6IwrhWDY$f;r((jsf}S6elg>$T?$kPI>U zcHxHQ7;GC3ud&ey4PMUEfGIv9ekmj+T1wk63&+$m;Br^4+&qeKWpw)Ohe~%8V=+-g202ZZj2W zA!ylMbTT+VKn=-iZhCs!_XsO6R5rakMbKsC3h~v7ysrpec-_Ot?ldsq`}q1e_V{=r z^{gBh25Zq9gCTUVX3l$hU^(y$?<(q%Bxi6G-$B9VhSA9h1BZQ!_~Ne-wtx?cp3dnk z4LSpu$TZXue#blYXVZw2;+8OzefX;vem4B+tlp&jzuHSfROYYpm#VF``*}SZ_QRO2 zS!^#C2r`TLk5$E%yX;QFk~#Qj`vfUz$=|+Q*{l)|@42|_U!9w8S&}Hoc^MCnbJu3J z1@Sp;4&EK)Ppm*NVhwMK?-J0fd?h7XOMr5c&=sA9yFx$!S|>g2o>VdHTsfQ+*4f+M zG-`n<4%i-7?X6y4dCZ)^({~(Bw&z>;O-V1m(F^Nf?o^eZuBnUXN^F!N=Vt9S>PtUVnCx4mLH=$p41Lt85@V?H;`UdM4a( zC(!KZG^LsMVr(-!z&V%*rp?WYutDo}Lun5H zNK~H>GZGI82`VU%Qvz^Po+EbvsBR@K#pq)ONZAn+0>Qn}%Z`pjgqEQ>IV=EDQvY_R zZloWQk!1Wa1E`Jctuju;`W~$($@y*YUCdYc2agGnAhAqwZFF$)K ze6?N0^`g0FL1pf0{rP^=b!kttHnFSjAslh;d#Z6XSWeK$)PFfzQ!#yRNCRw2AFF0s z+$>E>-R@{}_wUrZKByZKt`OYUJ{{Y{Qha~Uo1BKa$?HsPnBR9l^!Y;O@sc}VAKH_a zR+N_0(vxj|l{6W^|<{cwKoSm(^Qc^RRwTa<8*fL_xSO*Ham5 zht(3YmWSwv(lB7-%#$^MuECed_?@!@fI)vH++Tw-n8^{65r1AxN~tEeww^> zRKnEP#irza_C3C>$#tfAGo#n#G9VH$J-zQ~$GiGzi(2&a05VY99QLy?u01DolTxR& zm>54RI&z^?F$o8k_TY-lBHfO=6=USB;rB6?p}3HbA`YVojVROWo9ko6$y}xFR8nF6 zg~!O^?)I^AMv#mshA;Qm6#>9>HR@FS`td|EfR!^YoYPyFd)Svh8!gUWJDa%(j=vIE z?u#EtNsuc&oWaUXwaFp#(r(3-vvfvcdnXpIG#RW3-9VK5&OXBbGWJ;ci|^1V5kg(_LaLIMkQSPTN(95 zW4YFOY3>;epO<)1bPNcW_4p8@zS8^^E^@kByFTqZzKlK6^2k5U-GBrU6l~`rmdVw#!kjyA;f&RQa1;C7;fnf8M-`)- zuS@w{i$Qvq`~^{>o_cY7Eh|eJ(4{(Z)trGDwyV{8k>lkmkZrV`{+jyu6?HSBUGdPZ zg~N!ht<-kotl26&l$1hLKm6|S?i^dmneqi9Zod7!KfLE7x}y%WH>vwjzF9kX4v|6q zlABjO+Go=B@EUjx=Ki^!qV9Q8y$)L{ZDT>bfMgg6?mngvwXVY%KO$45KS){Tfw`;f znO6PVui}ZcDmi^Yg+7(%10ycYZ>;v32doB!gwT{ge3=)4Y{H=Cv*Prf8RMEwWbuY& zhRF|rzYEsFg7N{z!82=h=JgYR+XkV|Ofaj`l+-ez>*OtyWkld+d}kT;`s_%>!Ga)6 zgjKNmeBoe*_)S}xGUytG?UG_Ey+4hl4+G4(s;>I8jqbXP5irpWdZpyYOSps{TXCC< zX6ar!M?0%tTY8Iae2pRvO>|5R_b`Od%Zni2!v?*O%%dwhL1g;G(9z0URK=U6B4)q26K!VuqehZQXTdiTg&R`@MkyI{kw zQ>w(1(j7!RUuRX?d~^u6_lV|ha{>$*4KJ%_P7f%T)Z>NrQI?3Q&xhih`zuXjY z;lHvIIWr+~KakNmTAp%S$p`dIsUVf7c}G#5%*2}FWIAMX=kdNR{B6!?g9-#3Q=&ncf~+1V1t(SA>qEl`)5NVGNpp6wHlR{?kjKQ zITv9Vu1?<9HM#r4mlmHlws6hNl6wVr2T#HauOeo5Y$Wva_%eotfEQLJIUlNe0yW)L z@$VGa_#sU|kd1Kuyb#y$=ePTntfl9}vG!}41g15vI(3(w*H8F-k1HE?`mOa2+S5A> z%=BXRHR>J5%Z7aDQt;xvHfumocqz&$svp@!3)7-;F);1omUIlNy*0wW3PDQiqnMF>`$zti?{m z_G3&ZH=s}DRMF2X+sNiay$1%Iz%nK!l4Alw#xQ|(8i+T;Zk=K?lWo(2Z)HvG$u>OP z)wgVuzHjn_V6oTYC4t#{F2U`fmijGm`^j?;ve?|pZ61+J1Fy|=JvX+K#$eXK@XJ|s z0W5fQDL|>Q5*<8(rmZz=k(C`^>5H|EA0$vfkCSxtyfIeDt!joxAIv z)=^DYp4m@N2aoX8i=U^tZBY_{c52K;DfPYt!>H2xFViYol@u+H;7ovu^rqRYmjL`n z)zRgVQ*Vm08o;G!KCe50g}0<^PjZyHOQjsU&iC2E>-W-qFM~9k;C(l%OYXfhy~yKx z{UN1uIJM@oGk!4+el31<(j$B^V87Q+-VGqkD4zi6QR3Zl#>DsLha=&%R5%#nf#;++ z(JN#`Fw=fn$<4{j-MXf`ep*orZsWA$@+|2m`*tvBPfNsh_l>WH>4spcoIW(7>sVvp zs+{)L?4mO-vuIy5{uq1NpnZfg&iX^hEIxI>u8PJnp3V0lO`~oXGEwg%Ps^;VCdkZX zGtyS)-wuHL&3(HPJMCtAuD+3}_D4pWNy}YNUS%2fR`GMJPQ=sdnXT4)*LYvrhuRW& z`$+lfdY=>Rl|M-CEe2IalnrFRg zmA3QO`!M>5?sb0?_pP+9m%N)@6@%Q3O{^cFiI2(a9MJKUsA1NAlj`BixcTy~V9{KK zOjPRt`F=FC6-oGS4Xb^fEGOu-$RZEVqWd-|oy$jGb!om|1&%N#B#s|FZlYV@@_no- zW6Ic_zpRFMFlXw-&JT3-3s%=nL8&A#^@YQQS#G7Rv0`tN$NmDdRJLYqj>;CqjLUd7 zw?JFv8{Mfl`Dcd>s@XmA8&&*E?a2!V79L&}vjZc4gQwj3B6Ep?ht}=3!LG!Ww^h?c zDRq6Km9I0>T>3YU_mlC66(rCN0|Nt0AE9~V4zf*VlZ0GW-oEz%c_aEZOQ3S~TB-T( z@5Rc-Rkyc4MQOqYU~KeoVQg>7z*B?Q<%%xDirbwldxchk-;wKKR$-vb;lnjfD0&l2 z#N+K;=cc_TfOYAh{Q{5Q-}&E!Lz?SacRT*eH-s+V!$QkdVDEMBRm;D}bSKdz;-Do4 zFPeAXfo@ZA2CEf7)zF#(&v~Ke!j>;-F@dvfoLy6u4h9E#fjHlF)`v8IgDii`IAEOb z=fFJg zTPMqNJoGi^W%J!{=56M|SnEAREQ#T+uXttnZY$}DU!TfIRx{yHyx1I#%Zg`Nj_X=K zI$89ub=|$@Fl6Zw9v?}S9LbcNoawG6A+Zp=`=KUE>;6dexv^qkoGV2tH|s^ZI;J$ie2=ez8< zE~g}nxaxdqF}({Z`!?mfg|(a9?Ej};Dy;@gM32)J`M(p666qZtcR*+W(8odw4+H;S zqeyKONCc!OVt4sGqsSDH^fw+=v)SHF*Yicu%HchyJLm!(>M5m`fOv{T7`7VPy82AnM zyN>}20e7uOOv2}Wfk80`ZzCR`zp!7y-so$&GDvP>YPgACaT7Lwv%i=fP6fP$Iqi;E z+bh@jR-fZyx1Hn`f%;@uF6!z!Ms@0?yC1_i?HmOp)^CCK z1$#Mh^tK16yeYR8`&XKB>)or5f4u_V+u4Qzq+7pxmh`!Pp!ptm%(weHTgdV~r%z6J zK5puOgwGs2J36@)zji$-VMY+<@BnPxlz7;rhN^VE9-5fkm17;gTrM8J;4^#-FYSss z01cb_{{Q0t`hMo04bjJsdh%rKFt(iWI&{|UtHyjfy|a;d34FUhRS2N;&x4rc2IuF= zV?26h*<10kAHB?Uo@Tna`~ZHO>p^N_$l&?QA)|`{bl{^a^wD$xwe6rE4A3u6ZTp&y z0gvLjxFXs8`v-^5I#;{TWT4CTZ)lb&aGsk94wkFSvJH<-g%9r?gh+T&doS-}2ituT zFqI9a3JlD)^D9k-oo^fAjI1eB2dlY_=)E-<43x47h@I}*^mn7*E3Z`Wp5!kMyVBb< zG9LT9R@TQu{oS0N`sM8j)CJairlN~#Ow2y$M6#szrCVbY=*~PVVeYc*DR|cEx&a=YF)DFNmmxtL5O=gL1p(u~S@$d+^ZT0-nI_Z?9#2DC? z)c*MwJT-O{rP^S|hJYvYXu{%d11`gPc-87nB9dZqUs%v9<3eDLe~)?iad@K*MZzGT z-H6NeJ}WS`9g{iUIA+1rVj+VeRU&j3d%SKFJji@5<^m&P8>|*pVsg?U<;w^~qH@XY zpOtnHO$0w88NOE|4Ek*T7_-LN0~gY3b(-fMoX4S*g@&DxppO0&srfta70W;{VYlI<5MtA3-$83Zkjo=UmR9bJ0(s^xobt}% zrIpdz8USAQmsLYu%Bz?&as7qixyvWeL*D~o-tqe!XTe%A-Z$dW1_&g&!0q=Fzh&MQ zrkEQ6aAp`4#>gVW9F_qB6>ElXXzyA^Ff&A)+jxVie{%Q)Qv8kkqeFTq`H5p==sW@} z9}Tm$_(IaOB%4%M;3RkYj0YoQkT#L7{~dB|PBM=$9|;dFq`|AEHzC>x(TJV3R_T#Y zG6un_pc;?zBTW+amsoIvh3ilvDLdm1+Z{x+`3`qANZ7ovyUQ`nYPazYAPYD-D-X9u z4W-38KhUxxZ9KTn3GRsd@L3&I(jJw~es4y!Q%;DGMY-MguV~lkE4cIKItfi`?kP%s zZ|pnwU-G_Pu#GzX^&kL-G=(2J_v69oY~_Lbe%?YEua5V=XI(r%CjYD1_cq&>*uspu zF|qo%G!NQ=YNwnQzg(ILNqie>hA=jhkuy!6!2&pm+BO|>{hV2H0np7AHA<~Y$f2fW z{Ypg04=BjN`K1A|E3lA8RNmPZ0O>$MPn2ggXb}Uy&7H=j8054}A}MJynKV*SJTp?A zr&)b+WYO|guE-_v6Z2FDY(-$ysh1FT&50hr98{NGb@pijA)4Tn&-5%4uw zo1v3?zAq)Jq;WyHRXHXUo71^%hF!hP@8@RGl;pg_YENP3ISY6G>!v3yW&yGN1|5bOT5!s3kIz^t*g%LcF{m_n9_3 z{UV-k@Z*`~y#MLdQYjZnJH*0i_DNWRYni|k<{^1HK2f}F{9#nCDPq*fs6YJ4@)lC; zIUwA;S?F?l^n?S0N+z1?D^^GyK+KlW_u90xGAB{kf`Nv^Vj;5mPi*^bpE#rvD70kf zyZ^qX25W?|irbmT-|ynU&_?l5&}t^6-8LyA-EGZBzEM7%i7%WfoxYa7t5r~54gF`S zAX}J}c+~w?Nyai-W=e4JiXVxRa!(0y-~W(+ju?KU?FNavxwP1MLUp+T);@@_Fh~;J z|0`G!<2{@prpP}pXz1SQJder#Xj06tCq^oq!ij(ty|wyGRpHg^h_>YFh|nbVo4RbR z#V*>8nw-Q)+Ii)n1+1I%Lr7XX6=8OvLy}8NZk3u#Vvg_GY|s`<#{nH|xrY&z0}n{k zW;~dWw(c9*g`RtK8i8eln4}b&2Ut(f!QB3;6dey5U{ z2bV`>9Tiy4>3^dUTfFX}EF94sYX;bqOD1hnZMjuO3O+o}*pW=JB@c_-s-}A@25NgZ z5~|m9=9;c?-s~1AUr|3-7>md^NhcK$$ya4Y^GGz0m{ZL;p-VRs^pA~33%ot&=u*=m zm0>U#q28|@Rgv_(T|Q9tty%SjhlDY*Hkp!O7&%M>kZJ)6zk`P=dE51u9u}`+Wj;Kl z8niu^E4zqsv~IZLkeFk`T)lU_OF4-@nTu5e57m8iG>T zg52gAhkNNI2nK8^j7umg#@{2eFivAhbkb7ZW@#UNi)(v+CNX83L7((eYX5*ui6RtG z3pJTB|858TH;HExcB;xG&4v?{O@3x2_s2FP=kBU!i;6as4peuo7P%pfhH2A-69kDy zNgeN2#a!)*x~~#Q)U<8aU1pBkaGXk{rLf)wyM0r*IqMwS@4b4s$>efjbsi1aSJTwo z9dzK97|v4aG_E*9Tu)fC8UkbrQzA%xP=rq4)5|*n=vnOi>^4i_6RY>EQvJ{|j16XQ zsN=b;i7lp=~tzh%@<9Fss9Z951lkOS&o|v6?Wid~a2i0@$Z9;93znk9WSf9M~{^sjtr;R^|qIt6n9TOxUIzQcW+E5m6et~zq4s$+Ps!+*Ou+O_fWaLiB847t1` zHGeuosr_aYPCZh~s3~g{MxON?LH6)F9bhbF_83RK740E2DiVodH4BH~Bb(ecPA!r- z0B9WgOX>iRE{@605Ut@+BmHhX7gzZ;Y>No-B6qsD-o|2kd;GnFTkEiU+PcRG95u?; z(Q*~CWjQjiSO>$Idzne{#+^iUbF>y|31RUh#H(N-9!N297}reM@z!ynUO8N z(Kk$y(M?};TsS9)=3O{-@SY;}rmau%1u zgJ4B!O_hIp&+Lv3(v~RQCL`$2+-e~8UszlQTyWfD7tl6gr(epYkK{7^pS+V@K$wNJ zEbs)zO*W-$sEJ1!t^U@4zoQ48M0$jpOgP5YWGUFOK zba|q1W&q8R1UpM4k53_wvos&&)Ypz{B8T<{Wge3vhxY}F@ffJ-2;=^pYkbrX>O6B2{!I4&}RMvQ*Pk)rC2Q` z8Jx+ue3yE-Et;-$ru9u0-#5w$X zLKBj-M^>i=reo84+8y`MzBf70WsHMhjhlhL-Sict)c`;}&x z7Frlde6CDzYP$16=}1&OmyJBQ$_3X2iz})*%8o3>GZoK1gDzMa!!f&TJ+N}c#pH&& z6SZSjee#NYcd;LZ?|@`|-Nv~8`2_@A{fE3yS?!}P-^689IBPB722oz57^^Uy0-*~!1+7y43<48msuXTA|D;=EvsMDPGD8W_IHb@vsk!V$G_ zv!X(TvI14;Rn}6J5Y{!CtUoX7;56j8#hJ`y#?}PpV=Ij$nG>r67b!U6y1?6ajGA%* zBQ)ohg?%%-P?U^fRr#>L3_!vWIg4}Q!#^0UWvSaJ8PFo{{8v&lhXnTc8?jMYhqKkw zgua{6$J1ULDU4;6jFi!;4V8M-mo=7i{H4==ybJ-}mmwLA^*7F`#wjzVKtz3ZN)rUa z;z2;_73kr;xjTtj#%RL@lQq5CYxm+=Ab+FN)x7=Y`p5QvCn0vddh+yf_H2m z?9!K)LFme2nCPPoF)QcJl>yt_SSLg7smD!{mH)7dhR!ZWne;>B{qkY>&QRj<-Q_5q zGNi|Ztn+zTdMVxnw+~Nslz;Gc${r-CHj#U&B;ISy*xhw^*h(GVomm(b;&H8TlMVju zt2r=EkJ}-J2M7(N$yK*~d-=SH~6FUSa@WPigdG_hP5SYI*?~axVuddtIu^vLS8I+&fs_Z)f{lS+ugXU z@pYwOc>vS?k6N%$_GpRiRCAAeK17&qKWN_GKiZ9L(91S9DjQ*Xz@c#|9;Q^QIizPbjUm0a&y5LnbaJm5kTUP3PMbbz*Zz1X*g1INsWqv~>jD49 z&5;^ay7HUc8)1G+V;>>esGQv78{Q_CNhE1TUCZ{{8iyzFxhoJ?{Hq zrZg*qsh2$V>mDOS!81V_1pxm6-WAzQLKS3bF%XfO3Ei+zAlzGg2=L??V{H6Gj)#a- z${0g13mGO=Bq@&=fm%R|qMC@jNGMr#FuSs+Y)QMg*>onT?0ia`bz8vZ>u5p2yo2Aj z%r+ot6Y!>o9C7m9(}%BLK=fQGw9j~HuH3E!9^GD;r(~2|wNjr@;>o9cShN`0%emWM z4|ivGWzQMK#DZ4hM)|U1oVnYEZ{d_xY%4#hsFgO8578#=grj(nETr$(Q72g=@q+0D zZ9}C_s4&vz!Qzjm?i0KAj3jUior>+qr?_dy>V%Xfw0TA+ZOCQH` zp>oQh1d%8|*!g}2^hMBW@TMivNJDk48c)1R?d0x9>V!2L-ED_DD=Ci~jdHE_OA5#i zNXkbjo5c^~=a0BtULXkpv z)E05OJ__^{3uMUlN9hlPOA6+$#i#ma+VyEHk54G1ZE5mR}qe=yHXxXj9#<*2M0; z)Um&*Bge^0Q(!7E$J`7Fal>;w#sG0uH2q#=QaRupSE|Zu%25K14}a@$To7Y_J~9qS zPmvG=B0fQdlHK`zfN4B3m{cmESFa%4pmK`8xM1W$!uBe9PNVrjg3UmEeat}45J}YA zY=^+&J(8p>1PmdPN$2)dCe=sHhvX)V#+#JOTCxg%II3Kpb9M6RuXl#`mr=vNTu&&o z_3ipN{`}f1d1-QvjsBcMfViqSZ1o0iY~sGky~t1<)7iB8yE1EzBQq&SD61?o{_uYA zjG{^2lESTO*`GQ4E{)?rT#W%*goaa8hzPj~Wx3e~jRJlNO-Q;$tv9{w9$zo1t+6Zu zPlH~vk#-)H^!NJzDA^z#9M+FtQZ9=ic9kK}2aYEhBPow2$yXwIQ%oepb zQE}7}ThVDPWj^wQIIt2TQHAUh?rr&QrDqn4Apolg!=9rL7;UVGDb z-!Fq1TA|zsltzoXT?HIWKHi}H#tU&TS8RI{K^c$RUC zc5HCG@aK$2jbzT@@k@8q4-KW`#wkVD>I-wGHF>#?H9F6Lh(dW= z`xWw%h^B&6t}pR~^J6K4yQJyn{4cc2!Me>3X^59eVcxmuzIL-QqWt$wQV)qNdhqFv zDt)1F4#mMR;mie^w5+gsXUXGmJ9IFRs>Qi}?olIw=um<{jH%zN7($Yv8r<1gLil%+ zpWmRl6-WHb_xVmPj;W+AjQUjDql0VHaboz+Vhbubi|C#i@Z9qJL)xc)124F;Q%xb{ zPJQ9j`UtF#Q&S6-Bidm1F@-xZs|f0m`a_`-wlvSzY8X8yuQd|=%dQ7R)RKiCKZg-k z6@|G*7scLgLIpIbrtzXaB;<{g0QP?$7m;>SZwwxQU`W}Oa zAE8V&<;uuhMG2teSC(!tlkj*^RaC9TpIk|cXjOEr#Xc+O4g(0`4vGl}|!wy5Gc7~H|d8=P<0mcY_f2t1UFyLj43=LUab zuz)a<6c_#u38qB&^@K+k0xh%)*wJUh@Me+8q>4r+6=8bfjBUfL?QwB!oxM@HmauNT zOT0`eZ9OlqdJ3wz#7^X&D(fN9Uw$+a79-28f1B5B?#b+_%LNzFbHw(k&sRep=eZk@ zw9zXiOZw=Gyx0IKEh?kB22}JWbg)kG8nMLDevrO}azBAYFJ?oek?{?bIsU4@*-dL# z3Gk4O4N~JFk+{(oC-wziS*>%nAztNe4RHVwz9*rRXV01^0Sl+pbQi*Q+TE00Myh?+ zB0TS&zg2(NjCJTDL}tiG%Zyu-u|{$#;$Nd^?p;!-QOe&S%iIfiwwNO6@OH%L349OF zTZ8yg7Dq)YI(}8=Gq_|9HYZ2RccD2OX~M@fN90o2r+vDP8;||y1XA)JL#O% zAUP?_^XA+ORA6q}VMIoh3kT;R@#5+I%=sm_SUgs#Y_+SlhDTK$7nQ;}#Ruc(hT^V1 z$v!%ba_FK}rf-|+rf8);ugGPn{x2!6^4#}a4$?u^nktQB`^9R?Rd<5F7ZW3&Qrcdy zM>ImkVMVy+!Wp|r9x>48ZS;nauO(*jVeGcNu<*UX?88jo9OvSp|5US-8`GZNKbf`VHzl4sHsq@;qpex9Uh~-YhNN&IJ|zpz~(Eh z*M(3q)oxY^m`dhIPnhX~8mO-ydS^kJIJUBMzIt?PaQLHPDxE+>$9~yrX^9<*OJ`K- zy>WP-!;pHP^12oF$^%wTkVXnrDt zI6gPyU6kOTjnE<=39A$Ruw|aZ+3BwJw%Z9D=;p%&LhlAt+49WQv&tOY6$6B!z3@xsecRBBD{mKHES)#RulgN1&7{|eM*wPfJ zQI4qB;o{1zj7~H{1Px1K8yh7hBC~syvx)_3Uszh0(((tW;9w4(oK~l_xcEYCJpVHs zjb6edg@>H6PdB?5+kWV@S(l$=BrnUhZ|p%YP&S|23XWep00A?Q#65Hk>t8@t>XDqUOER+VOV5KV-5xjN<5_ud7 z0Q;7cEyKsyk!j;zAz%L|c#sqp&N0GrFsM@#KpqskXtmK}lR(?)j|NRj1ep3Gp@C>6 z=e5!~2X8v6lbI&aeOC-9mpPcH4$&bJ%`*&SC?>#ay$MlEr(+TypW zh!MfIh}ZU2YOZaVo=iEJ%f;K%ijV-+YFL$K!!}qd2>px{TBJB0?Ex(CIO1pGbRTkh zw>5|Jzm&XRJ?J(-*ZCh^ae0lfVlv0*6XN#{VS8cjE^8-I>}AQ8>DJP6&APK9Zsw|` zmR7R472VCfJj%uHAsx@xmk2etAi`g?UVdH2-WM+0ICj*dq5M4&jnp2U{*(d>0h*vY zi81--yifY9WT>px%fDnC0RaP;A7-9)VuipYy08=B+W4y_03} zeA)Hc72OXT7?J#kCen~XM7}Uwgd3_Sj9_9M(Csp6 zpYnN)uy*vF1Thh`NWlCFYSJ4dv?NlN|E4Z{TrYCg>0ytY3 zb8*Macyy}ewBszM_i!O8#7e?HT2j~*a%tmYj+~VfH5EtCNy8{0HYq$4RCJ}2=cS_V zYTZwJ*HZ#y8vOcJOotf**nG3oopd%|sv*_GzP;DTBWBpNC8d+eUElTtiv(_qubWee zXAvHM#&=r#9KDPD!=wP_eo9?yoFn^iWg>EAiGk0|A5sS()9v@$XuY!j3j=eN1Q&zN zK4p7JLUNs{0UsYBiPEU6^UV2P>qEVxVVl229J}al?_ss4+mm$Zdz*b5ObPr-OU|Pk z@4rfc3**>{HIY%vEs={PGKp@#sc3g4)X<;U*v_+I?%#)4tShQajV>ruj#;>@7E<=T zozS77AxNOWP~@$8N1Yv(QJ-8qXD zE7Ys;l+gHV@`&)uI8-m#CF-K+KbqvN13BWVNnM0IR4wti%W`%|phad5PLa>hp@WeE zhh?#q{c}yJRdK|upI9|*c}aT5$W+9+{oIeha&>tIVK@d(A3{W!H#~fbOOwb_SWqkw zcei)ny$#TJxfE8+hb2V`AGP|EJvC`mJ6T{=t)?yz83;pPk36Kz*zn{FqYI z#11cql4(-qCvjIoUnMh%DXXe}?I%$y6%sQiMHl#^ z0<($WPXNeVplbL9ebWX^ondAxYT=X55*p*7dE~W>^+8^20uYlVPPVQZtZ|1BuX>05 zflr(EZxRLe1x?>-S?XjL5`jLH)XGJDK)vW-9OhPk;B(+Iz>55-1mQnEE8iQ>MZ@pM z!_i;l0+joipHTeV%a#E;q5F4N`#V9QPs}%LR_AZc#=&tQWYhZr>NnSDSHe>k#sM?= z|9Nb|%5`+lA4*lK#DuVCW=h_a@3(TfPsWP#ZnDaElD zaXC8bcZY`;-uZGC15cRNFZU;%h4%xJTeM7WWeB47%EiNV1P9rb3Ej>o=-!PrQ+fc# zU>m-v>pJob4TjE{T4|$C8oTE9kDVcm(uCT`@*!45Jf%O`1q4b#*38F`Pd&gOunv1K zP6T9~zqhDRP<-!!)=Xk_wVSdg8Ee>KakrZXzwD&g+pZMiY&S1gopRqo;0C4=7_K?- zq zvEm2IBh1a)KdA$tx-OA3XOwfchk7jbAW$(Fh1;&l2X-RvT($Q`vK+RZWRy zv2=Dii5f?=8b}X=RR?AXD4%N|>vQdUyT8)9Pn^@zwS6jh(nx9(Qb!)+`C$z*$2eB9 z4LNS1y-3GWQ9^+RfI??vJQ3h6toRV$nA?zuuKM&jw-6vnpQcva_HC2F{+6P7eZpK&k(B zGWT(!1IVQmr&tGO3^)}uU8a&emSb+c~?A(2w%TfPFuUIHA{ zA08p8RLT-huM@LekWhYoiI)RpY~(Wh3d?_k7|D7V-eEw*NdRTKe8w^YBS%MdpbD?; zm2k!7Ee5jU$@#pYKY4t`+4v;1ufy+j`KxHE=D?T@b-#LM1CE#0q@@TDil#!&`EC>NAc)kQtgFJhWtLz0gLdMj28||@)ZxZ5+ zMy6=R~{XbGV-OQ z^L^mL-SMXORUbC7`A}*~I=_1N$_jQFRb8coep+Mfs@uwt!q3i<%dnBo$A64&^u@E} zC7^iB-aqQM*CgE<-oZw|z_3(Q!p~k7nxs@l)h=m#>W0g;C5G$g9=&J(_d-^QOjjJH zEc5}?IX4R$kfKX%D(WZt2?bC>Dz9H9NIyZr{Rvu9+!u&SDQw{F4nnc2v_$=U2&D9B zHk#g|!9ee!m}G*;6F7@r?yhC$b7_xskd(Z;aqIppJ=Y@k7BwXB@?mh%Xu|34=VcEk zDb9nyJ+9L+TsC0e?;;wVK*oMdt&9IOR*w`*j(`DlM+G0+JyPYU2VR`<#C)=4P&y<;8F6bn^I1V@PFKd${L{%QDv5ur>D64U zhVQ63b2nnle!cYS6#-KFi8eh@ftLNh!9WD3qht0%O+5$K(kA@s`TlR?x;>8gtEKTT>1KC3F1yB7~^OPX* zkLz%qqEOLl{n#ROg4%qXljgQ$QCthrPTrxz-uMh6=hSrIF=;2eyQ8jsqyyxq1&gzO zN)oUTAU#6z#p_Rc9gR-Gm2%-^qJbKy4V#j;+i&vt2!`c8dowre+YiOY0_h8Ss_m%Q z-_q`o6>h>k^PFjyv^V0X^tzR# zxlZ)zx#ujlwaUsJW2%P@v}%fp6U-xy`;jV79f!PCqmbGhwTRT>`=a zyZZ^9-$Wr-(rzuI8SgLFG+b@e(2y?QDp*r)Wu?kpTgxri>weU=>@!=Y{ixg#c{Do( zRfWkM{^-CB*Y0-N7sRTrt83~~^$HjcxG^p>8YzSd^xiCusn)!KGbECVsCRysIQK@U zi#(SOzs4i0LYbrSF--XWJd6!?y!YSiY@q;e(6(_XdSLe}Z_8vi@;)*9<hAI)QtUKgn+R8cX z!JShpCf3BniHMNHb)iLB|3A48df?HLXRo0lY7!kRnzr7@9ZM?bdd`LcRtYzHxsW!Q zQA@ilijEp*@wgFs38|(hV?w2{ZIB>$KQAO}C34CkPbqz{rSMo0+bk0?j1TVSkJQ)q zyql@Z0Z*?FRQ@h++87j&l9zp#QsT&hZ)lSyxv=*>(Agp=jRa!+`C-F3j@El*yxlJP z%BF_-cA8W;sRa7`qBIzDWbLyPp*x2OZY?hEl)hUtF@oCQSt=*ReTGNzq6c{x;~8jh zCVlf1U~hgm2YWUnP;e!Ej%Hc&V+zQGskBg$-?q3*enCe3JXuFe;klkO0E{ke%6 zBw#1}PLeZITf>I&g81+jG!g#?=v z7A@ugWxT+_f4ndrYG`4ldR?w|VXE)~X*M*oEv&U=)nw#TbrqZm-A%D;^w_gB*sND@ z@O|KuMhW>l#By%EPM*px{i|grJ2YF&37b<`60G=cvn$;yK`I2lpYPCy-MSA7wesmD z@wGGybJik#?>aSUOA))Mar+TDj#8JVF87Qhu2S% zXqe5}b~Vi;3=Od8Pbmfd`p<|wHjOBI=l;|nmyGDdfh@?i>_*4OK?$6#w%-kS;c^O8 z-z>R47@7AOM%Gd?{@oa_4*9#gmZP3s82w5H#4+EQOtRudQIe{(M@QA zFovH@At&hOh^+u+72lF%s@1}@Q#X|%6O4CfhtiADG0^b)Dyt7OK2&1>Er43D^xBoLf6Z|s5_a}FU)Qbolba#^khfV2@$YH67gWx2$wNQ-_ zDqKmUzj9S+k>YcEM^sOkW$2}cEJW|Q8ccuRBdaf5*T=Jp$j_g2D?fbEAowAbS^0c= zr@oLDB5XoDqsd)o3~`xrCklJi0sZeVN`Zm!>$xl8xI+O`SEw4u{_fEK4Vza zCQLoaRs{BIadtiPemZY>`>eRhtyGB1qvF0YWRCjw>^w$sy^ui}gyK1bXR9H|k6TVL%ltg(^z zLEa}*fQWZ!59*yZk#~IGIt5n>DL*>R7}9Gu4K#434kW zH~V#5qX3~CY37Y6^#@4L{Nyek^B*DaWDZH~6Vxhwwc(Bz(hCGP<>)NGr{cmULSZSh2k$ML@hU>be6lm$u?_ zR2&)vs-wTX=L3HT&$Ml6TXU1&_y3L3r);~OgzKu}@AXH;y+h?DSqB0sVrQwCtA@6Y z_}mrFLp>BOXAw7BsMde~xSeIgS-ii>r(0$g4XBTNagyDOKCFM7RibmL_`dhNJ7X9y znwurTmN?zTd| z{nPJxUv88<`Ll&z7lRp14KY8o2YOJtMb}^;bGyA_cTs7%uJOZt5#T0 zlpON?%~MxBy?*Z5E=;m6kurG`T~`LX)4T7=$9n8>U}~=W7wJqUBr!6?v7~vGBp`DG zmQhq4gn<|%1WiE!2LXlKWE=T@f;Vu}q^SH*kgu}$S2%}T@Z#%_grND|inqaK5|x$$pK%L6`)?p*31Y#g^h&Sv8>=!% z>m&UgP7^4|D)F-{d!D`|Aa3ILJP1Q4Hs24;W4*n~=Wp)om2i6J_}rJWFKt(9jjHYt zbAHgNs66C-k0MJuOf4+2=WFx}E6am@)qBlSBf>SS6m0+gdF-u1QuC(j9;pMqiOXsd zftWpCb7gM>0Nm4OD7SCARLnxZ2?XeIphfB_kop$gfO5D5Drvuybug^>qQ`X_li|Aj zZ}!eiP6Z~`9+(x$XUgM(#jz9d{Y&I*!k!$4>b#Ovi5oP->vD$dNxvo}3Ck>AgA$Xu z-h6_0tK_W}yJqW5?yJuFh%$qTXHsX~p#G%tYll1aOX10N$mvEkxAhKpDP{{!2R_e~ zuzM9?xb2zJBwfeL&fDs4{|?`}+~RpFz%%D$f_+^v!OQasbCs30r1b0m*)rv)z1oav zjD>1^CVN#IUYJ(1xSMggoaG#ks8R~@1toN1Bg`oW#^DllBXw#eU6w2Qa@j~Dfkf~j z!SeHVXrS&DANzsP-at@1BLtjxhE1Bp(5@Fb%8n0|fP|P9`EJL2^tD6%P4v;oo{CCb zFkNX3QpmvXpj!0YG03N;Ofs!Gz3@9IJVC0z*%ti90z}<8AZRuriy~ON{8`pSl|&8^ zH!P2R>va%=!^V7;hDAzo8mk|pi{VQ4hpgw49=k>aai%>6~{%xiS10sMQGvM#T^wrjPs4pP~$&udT?s!A&xnR*Z(k z?9o>e)DwkTG6LaVt-t;bwd7tE^z<-C<5SGK=zZf<_*PL{&d&=8GP`^FC+@eoQump+ z$0$1jfL{nZuI9GDy$#xagsdvXTA&FKuhMfx6lMr-IsH+AqmkM87}Bc^+o(op?`i#w z_cBb~*m>9XOTx7?moo9-!xF1C8(V*aeJhx2RMwgBKQqRk@3U~-{x7u*tlL;BZa0wxwL&Io1LHEMm;|KDm^$09(dzQm z%8oW?IH9uNxN;P6#My{Si+cQ>Cp<-3D~0WJe!X}9ZonsfT0jPGHDp{ac8On%jqK6| z1!d^;WL#K&BXZl*JFR-om~mJ|x|yrVgV`)^pSrp_!9R9Jm!sl1%|UCl7cXomd5S(O zm>B?So%t$?UVslq*bQMc5n*8n%c*u-BAA+dQ-J^Nke0I!H8eSo@?cF~Fg57%kQQom z3hnW|0v>7bd-fW85}<)%wM>*3BppX0|rdg^u4_6!S7 z7}f@u8^H0a>#LS6?OwTz@8msx_uIM4H+LXc>uk0wQXgGT(tYbfRq4G~;#4PsuFZ)W zm#_|$4OTF*iy|sJ$OjJl$*wyEifEImp+BzlCIYTCnWg=>IsOV9x%SJdH@o&3-CxW? z=ka$W$?D1^5A(yzY}UAgzDy z#;it?IH8dWnn_m51ys2{J~yjkqM5_u`!J~u!Qs6FqlUBDZtLn9APrCQu?P5MtAV8; zi6bG;g6Yt+1sORqpcn_za94?lV^BmPnr=f_9I>qCcuXb`AN&M1EzSR{HOdtPY9&rO ztYpqQoslmsR+2}obyZ;stFRfQP<%T~zY9jue2_-6=}OA!3w!4QZvdAleql&bSf<|i z#>7@oAAvp=NgznQg%}+DKQT&EJ*8nOILk*a8ry*YMpvc|m&*%fG`XVqmQWcK`VtnV zJZ*yMRh;K*Ha6Q4{KPe1bB}S!Q9zNe86?3b9bzIP#YD#L|1w{Ab$JtzhGX%?&rj17 z;4aPb1XL^5zlA#MdR<(7bT=A>wa5?j@E(X}r%Zo&n_y6;Dg2#z>5E|tq^^Yscr`Ah z`$lu0F1eEf?=h_dLYwEo#7)-&RgrrGRZ%qX+05ocaod6<10DJC_6BNp&O$QSt2;A@ zOYSwvSto-PbY(53L39_>raQdJ5P0VO^Ck`ZI5yAQXw#;ZC$Il=h!`L%32DBeCY+|w zC2)25dqZ`5)Eo+(eaOst`n)}<`4h*uOVskghSm+#6ntMwMabH+ z&1`V&kZg)l8BHVd3MaW{;-ST*X3f~!*Q#&y9KBwR>n~D5*(7L5i%N<|X%etL9U0=! z0?^js0YmRO3FEZD2Ba4|rF~Ij=dp0_y<0olPNzY`jae?X_IbI6b(giLTL4_a#)#WX zbU?(eAKn*Jw>X)`6dv}WhZ@gsZ2oHheCN8Ez z3@TT4w1l*z#L~#Z(nvSFCwkxC=Xrj= z<9*-b`NuuDcGtbmIcGjI^O-s4!sm$D1mBi+;lsd2scvUIzJ9uz7B5aB2S3_{8rTt! zE8`EB5VBK-TS)lf4byz?bqe*64&s!FovFceEXcatkt9Ew!bs1(6=FFX#3@x; z9fBfL!wwQ`Y?}_8&2%v`<6p3Ed#RUPIMBb>tt0gMHk6cWy1sZ`@2LAO<@rMwJ7_#3 z)z`o}G&y9knWs_ckBO*O3%`D{BAAK(Xop^Ppe}vb067+Dtk+zuFx>H)A^l(|Ed)Bm zC|z?LQbCjHybFUSHu_!97~xWAxymze{xU8BaI|CLX!-=IJ<_SO8qD~D_^5PUXsIgF zWR_FTl9#w8&CRBCCu*MTYA_sglFuUQVZ_mvbQZq#xl~9PJ2SSbUn_op&^9^z`Rqwh z=J88pmwbICD=*1HP^%%;madCd{Vclr4J$W8Ux+%z`mq@NzT(dMXkwQ(G z(KQf8jg}%&Gwmp2+Ap}ckdu;jHxrvDpEqwQ=vG(cy5Gh;N>a7UaPt{&l{1`mGqoWA~g<@rud$wV90lf2)0-m>hrLtBI} zlRfb>S2BLl1ecbERanj^NpxvyxOY?c$*OLIWbuQf3svJA|?X; zZ>N~7JD_u-f081!o_*WvWI*y8Z>eXiiuUO#lFkhK83y^h6+E>xxJIX1Eq2RCH|{c7FHkBtm6U%bS8nn&YFa5!12 zuKU$O&aRYBb)x0uaaIJ$tytBEx)7p)tEro8TgS?koLw^6VVfap4WCGT|6qF@Ls{Eh z3HKELfW|10lY8`44kMk6Pys$ic>QHsR1`)=E9y6oK$%EMY_t*?qV@hsFV79CX$8WJP4^K1z*Fe*N@Sk7k@9&u~= z6|3xiJ@&<;iNX3B#T`eA7$YkCcbLmHf?YwL``4wyJQ5-yAnd= zcyw_BnkOb)Dxc4#&Ex1<{2vB!7ktd~gr_NaIChTlws^a~n5EfROR6>#L>Y%-kQfSm zXc1EdZN0^xqAK5$qTz{2{Jh&>dCUMhQ(QSG87kl5zNQhO---4u#0wGw-sZ5JcBku% zL+J$i7T|hKPU4rRt2En|>Ad{k#Jy&E&+!E=rwuhrCQsv|&dZurbIE@EZMLwa z)j`z8MgA-~wY!o}`Fl{M?$GlR_6s5ZK0v_@+E;b|cFYc>)`&j@?s!PStb@N>6{W1s zX5V#JP_9njRl#07N1V*R&C>V;w_PqQf@MsHOc1)VL=mHAG5E zjjjriNN~i@Q3N3cQ6#Y_+Jrx;Yx86$ezt8Xl(nm0tEl4P=d0k!rgI}w4;w}OtdW^g z*KK`+qRBYoC~EG0j`E`CDA2njr>HgYr=BS8#mNs6(7*TYR_og0n9LNOCA!L2OqOD! zzI9=)Q8B@}!EVA6Xd0jJU7e`#&F!v2M=0_k3RRVJg01Pa_O-3XY>&1MVE4119d7}k z+RQYq>|iAYt_wDdk#F5w!4EMwe1~`*hCdOW%QO+b=%~`Z5Zu)q_5*F*e6um0|Gx2g{b1Aw>)o+Z1ZO^ zq&DirYCn@D`k#6m&RslW;7fpawc1gYWRJ#|kqtp(C9ywk%{AhA`feo4jG_6Aq>&lP zz!;5`$WK$`zE+tL51w>%^S=HlE8i!Vs{Qqg=i_JXK{teHs+g5k$YZN?DDVz*CdlIW z#fi`9v*0y!DzwO7sH<)=xA^A$uR~=TXtmBSXeVntzV?hqvh*X|e<#v)hn``ifBIWv zot279&sD02RjaX=FZW+eq7_qu0iPoz4fFUV7k7N}Da&@uPj6iX-cr>AgC~C#`fXMiwlx#-p2^Y!cK75%QcS%gTC6f4xV%}`5`4GV|WoVotS99A5ofW z?#8s>@9W>sY#(YR7AI`FRHet}LCv-uC|zYKxE?$@H|^}@1CzQmSj|VzBKz_e$qy_e zPF#jhuTe|!R3$bY!?)?VMug?o@+c#9`Dkv3_bN^975yAN*Q9=VG3S~+JUkK$$cLb4 zD;#8TB_!O@njk&qv-1nwd#{HOJzLrC~R4zBdNBgF9R zY6G#}6pzW+sy`VrUF-H_%)B?eyR0c&{@msZ6`GF8A_cCO>D3qFGsRRDZ4>bVKX7g) zD8$sc3XrBrMW&uTzfW&bu-A50F6(`f3(V+7Jf_WLnB-)JjHf17QE8m4_PF(VT(Gz{ zYek}N8W(e&EkRMZA?o0(2V7E~&=_~(Ei}GD^^sW5htgdFP+Ql)GOcL4wj?35Ky%Mz zvkQ%x)SGe%n96OUfApB}S@s*Jm!TqYOqRrXvT^rYg-D!EPu#Xo=iU-%u@rBoj7_Jl zX7r{sy)71MegNVvyV4@lN6H~J8ot_UWMkn)4=PVX8Y5=2-`YMldox5$N8|OpZ!hzZ zrZPo3!OpZk4OghdBaK}yRA#p`5@hn?6c;cs{^TOfwo(-pl+4IbzdidriU1<8@!{04 zNfepxx28?cbwWOq)O51B&wc&kB5z~n(dZPS;b(96TFI|7by^=+rSo(LHIz19z=b&s ziyxuwVl=60Z>(|q8P#JaKG29Iv%|JNP{o9KuOpRGK&UmQm6Dxtx|7A0s;)e0nE2Pq zVUMbGWlaNW03CB*XvFo8Q;HZv6B%1$TlPd;ne86|slQLXSkfz!k4RaZK81f#itX4w zba+D2z1F=+-tm&+L(6evn9>I#iu5mA9b`H-8yD<>aRS1BHsPfACnduATo-xAqf3=8 zX`5vka4OPnZrIU~lzE;}CYihpIu%A`dmZKA`o-mYNWhIN#mAP!9hsTQA+{8(wE@** zV!7@}`MU7v^W8o{x-^54`U+`TvqABiah8V$!sK`U85~u|l)yEiN4;yQz1OE!&iip< z%O0C2s+_RG zhgWVQ0V_%ymm}5lvHErG1FurohL71cFUR?JC!>nRjMYiV?1yp+C;c+|Be>v{QE}8# znCg3MMqG+k55U3sCu9S&<{iq3>L=?uT-B@Sy46AeBE=t=L=&sFB6i z$dBRE5}F+&o9ziauX?aPrAXWNq^o`*v4hofyB8HPcO|rH{->Ho?dg ztmN(t$#ak$<09lfbngPk(;mLA+2MN%CS0%B7=RkZ$PI-kh^U!spzv8Zmp^zM_R0ghp+h*AZ_b{ZGxPm>7@UoJ!-{ z9myaj^47_>=0o;Ah0imnD2X8ldZ4U{4fFnUo~6~p0{Zt)2uj^^xgXw949ZMh((U-B z+xz-aG87TFi3%xvg1Jc{3dqU?jj_kbgc$|d>^NDm&;mgHZ- zytY&drL6<<+O5Mjo)Y0%*Tl2BMjedEbNWV{S=V0KQSp1$X!Vj| zZ3gdWdV*KDs_mHeDB%3Iy<)9)Arx0H2hrUm0ysc$!UL2Q?nbp)d+<59@NR@cqDJcuk{MlLE7aVk1ztbgop3F;kzy-flj?^JS|yy-La)YKlJi2M zD^&HqPHy+lYOjq>Q1E=oic;4qxpmHSz0u2`T+(d{eiee7fGF{bSMyylkxHSilthUT z0pZaTIV;86%SHcQqXr_BsgW|BI^|*O2R}lwSYH%luMKU0qp0G(CMz%(M?}!&1tS~e zL%BO8u486KXDkhQOZvP+`0T+ife7=;R?ijJWeSPM48L7=_P=M4u#n56on!;X-2vu)Fma$k^ z{qZ|297SyH$HLbMfANs>t4TfGq%s3hl!pAp>1QI#y(Xib**s1=XnfU>SN9=Dzxx+p z7O5gAwi}nbywjHNBGLo$bS(#QT!_cC``g8;s&CSKt<=!$KV&@-3XQX5ZBSgj(l&e= zR1*?Xbtig?EUF*9$1Ymi;$Y6hYR+hGWwhwv8laem4ff7t+nnwaF!QdSm*e!Gc>jfC(=%SmJZq{)v0 zU0+6ss)MG5qN0XBY4TB5z!&-Rg9WOuOT1E>GiHN|l=7d37+?CpkGtZwdW;!s21}&0 zD*aR$`l5V#tb32@Q~TlPMB>~t_3~zEH zLnchWx(uJk6)%nU6M97%N2xyKiRU<74m_rEUVn^HYTvh9@bzN)(Sx+-*|P7jrr%uf z61QA@+!H4^set`d+#ktt)yap(N@*e?V@)=^6;`t&CyXI2j92CD7Hj*Y z1EbEBvZY016aCq4>*zEwfYU0D8~Z%fW5^Y~P>qr*mg*@iy0O0d1XB1f6ZjI~e-W~0bH&k*)A5e_=C zd*Gv*X8a+IZ9FMkd_%T*ek`2L`7tU-*H0bv-30_}QF%pqHi6t~R2y!q&`q~beG`&V zj?(F=MXW?K)e~=(+lMq(KSkUXA>~Pgl~MS+<5RQ^P9eDs!q_((-*$gYS32(s5NXt%bB%m=rtS3 zyA_Nu$6T2lOtTxg%M7KBe<`L=j($0PA!)^+R{5|9Ffplb%=gU-#o&n(Z?-OkRkeIn zf6e$^MYbPjAD2*(aXU=BAZo-I{j`6;uiBu?X}qXfV#XSe~Iq4pk_h*))x(HNiUuJ_8y>C<;|&@J?@iwQA77RUOx zS5aNGggB7Ln3CB3qphu_2;~fKE@H-FgGgQ=j}@#k9gE=EQfFB3>uduDWvk?IEb^dy zi{~d4?@Un=20*8;nrCvgbUgcW{HVF^Sxq!rrEJPYnQWDkQ$xyglL+~u<(5+-PXpo5 z!3PYaGW34hbgSAwXb44odth^!?720l){2ouX`@zMnhO(SymXJ{dF3X>_8(sVUS1WO z=BK2p4bPjaC;}57Q$(q^j}xB;#hbmD{mOZc)}ky$6I zl*Gr*6$vn>5zoc3`sd@>v#`m{7r!38nT@#!dRf^Z;N^l$>X_8w!o)8@4s?$gDmCVGce@_-ZK^fEOkjLB;8X4%H_X{`!Oj zWneXVI#e2`GA6cHG&D5CeAlZ!2t&x}Ii79gG8~TTSaIq3YI*8cSH5jpIVwoJsK|A# zZ0lg&?3Gw_9|)T!r)@vj%gcx$#sAJ*tR&`M^C5rKU0p9#g=Ib1s>x_z`Q{C4##qC} z_ThaYp-iiQpB~;yvg9rGc`})!zosJcR|ZbDkB|0O_(Su03@x30t-lQGbNseE;oe!?rt*cnPBgoDqq2;w^X&-8ps?^oRjLhu39Na& zC_$kCL#wb9?@64}2H#CjXi%faru;82B*G~|nu9D>@~~lLK&sQgURFAy2s!<4y;bv* zN=VXAD?WFOf6ltKbGK6HDhYnBG7dENlciV+!>Gb8fA3t@b8zAx<=EACyyC^1fjFNP zW*b(KxwsD8d*;b3Qs}7n$H=oTf){wzaM&HyyWz14@_7GG z3>0{5RJ7*Kwpw=TUD)~3fwW{X z_5v)e9RpGKRRz^(ip5MTkHCcgH>ZIlW?U4SS^_@LU>8L*aU;y!W4w4l)+X-Gs?UOo zU&v>xvc}p^?_WG8NozZmDc;ohftRAz4gZ0tHQ(V8i$tF?|JdJB7Fmj%v*q+j$7haV znFkxGW>a50@yX99!BD_R-7a$w9Q^tcA)5iRTl#c`N^B76l2(yFeP&EsHKa2r2ZG)Z zVh|E5AMp&&Xn^1n8&d@v`6<{xN@m1&Z}9<^sjiU8{s+G9BIFw+B=V1}HQsNi&ip)I zkRzoWBn0>b)6o+wg5%0Q7BpwgkdCdxM90V+Hy_ijuC==v2<*z9U;44A!@giUoS zR8=+ly2YYP)CCs?Cq1uw@%0y~k=~gV$a9}Oj^Xux5O2k)JR`_ZAIO<#*BMC$rGu*% zZ?M7`Rf0X945Tsd8H9&5VJm;7G6Sy_eH1D^!r=Y`JmdDw2AmsF8I62i*6fSCq{l04X;1sGz#|#Rt*y<37amz zqfuoG%w?i`XdZVU+oAj!%Y9w950BeP+9qU7s!arK(Nha$Jb^4F{Z%rXBRQkO+=)n4 znbIM>xtXDAZj8TdM|6xuu7+;MNQu(olJur*os)mJ=p{5P(23xZBRn-cP#KpUrAUJT z>hpZ|{ttK4+q3-ucazJfP7L=JjWeDhqF(O{Zw~t+J$NAV5$)YO(0FOCLyK3!EXz~P z2e!q`O*&BQPrCB@EwC*-5psGE+P#y0e`jd1&-cR$$dJX_aNn@aW!^Q!T;suI1`npl zNCoXKyj<8o>AJDq^Lj%s4SDEni<(UG8Q9N%Lc_ZR=nFD9IS-DWoA+}q1|Z1f@Z&NI z8!nAK?|f>4&5It)hWg^GOwnL#2cuRYTx5Ffq zcF$;r-zHc7h+_x63+LfFd$iAkL=SkfbrdN>aP%Z_!K1%GkLl~0S*+nlzr9y5e&HL- z$ECf=YMr4B{%uk*f@kk6_kj}FU9a3qVWvEG>}BMvHwKFklJusaDSk<3__aevw1Cu3 z45pGdbHn{-qN4ZV;#L~mEy}oK@3HQig9*0xlykG>!0US&4Mv$e%W%E3j68lS6H#CQ z-<0l3bKZt`sifd=leQb}-Mh5+Lf5SRpj?w0GdAOYLpdxFQub#-IrmCq93F#xyH+EA z9`tPH`>Ta;^oNLDp+wKQQ1ZnGacu&#gTAY&c`}K)k*&QAgdd=uMaGBPv(=O<3QBKz zg3b~ikG))V!BPl!p0pY2-2!F8^YRp2P6fMnEFmG5&!4O5Ugg`=VH+2EZPfIB(j~Ex z=k48?C24Su)ie%)K6rQ=>@OqOcX|Et404Gsd_j?pKj(8Up(@$0^dWl^uwNfII}X62 zj7KEtdcbSGVu5xzNXnkd+y$i4-X>i&cPerR63xhWBFONl+*G~`Zj|pm`!R|RFyf}AB_u^(n_(d+zQ={qi1i_x)>HL+>>nff zvrmm`nKB4i@> zFwHO@h@0bmH-Ct!-{W*$bR}{Va3~er9*Fml=sV_p4;q#*{Dg(Ez$p*NWKZQ*1%X-N^oP}zi??l&Ukx8%{OD(gC>qXeg zcj`#%Cv~hfHh%T`p7Vsz5vUgS49oe~x)ygr2Gh7EZZ0nF-qToqihQF46fsL8Ar15e zQ}Z#UG85>9VBd%}jj-hww_R3PJIIrpuQGp052FW)V?7f7ZQV64~hSQ)oJA_JA; z?n9*DA2IAKR!+0VtOaRfX<=rZ!0a$bPf0_a)>pcp2w<@sr->?M3fJ5jH@C+*urvt< zzA6{y%Ml@{REG7u@w(t6M;56TYv(pw^dp#36myJ`@NXOUe&t=(qoqRzm{fgBe9P@w ziW)4PqkhMuLG)d*GOp~N+) zVeEgYjQf$@JxKE2J3^#HCOt-5&GKkW`&_er_wg#D)739enD4}J^gN68XB5RJ8myq4 z&`+;yF|%0J!?5Aqq(A^c@hO=1k)Dd&yN^@~7G9NTwdzHSrs0k^qym14WP#g=*c)PA zSN437T_V!YLPWp{Li@lIf=P?^1fi%~O&=?0Y;1t4%~O-xVP=5sQX%o> z9v|39eApi9WWOV^r-XMbg2Kh|@E#;!TcCmIZfVLsmQlXDQc4zE;dm2_d%RZsDLi!= znx#9jh;k?b(8uPtxDLjJN9bbwj^osOnYE@Tn6^=r-wU_)3}_AJ{hkGOC@bwrp7-Al z#Y}89Ri)>7h|Tz4AbAO$(^d&nd+^i82ae&;p(O-z^%h_SJ$(G)+!`y0{PzC0vp?#G zO!~C;USKxQN&zdD<*vMe#M=(#7o>)fis02XhJ*F5k|N_i&0;kp?Rph1Vr=zPnk(a1 z4r{!_a?)uFdA(4p>$iEr`rA6^j{9mK;b;Y{@yxLceeghut&dyz7@zI9L|eUQ!XZ8V znP~N_H4b7?c_f{6Hfr|^eXlzXftdZkb5|03D|YuTacerZ0{3RaNyy|h-OQBe&|aw9 zTq+tDa#v^%e`dw9Js6Dm$7+y~J#arBJ-Q#5EgfLF{q6zSfbGtb{l_p3T$}Bk#EtaB z*f#4~<@bhX{0&sWp6e+hv07@m%_EJ~oSg9%a40tv{qM@U!B_DxJjXq;f{t8n;3UFi zTQ86L4b^)3y?S=|mL3=`xWcoJ@(#%5@?U=Tm_GjzP|-i8k^Vg?E)}gWK9ph=7EqT2 z@I+4_L+I;4)FEu&tHi8?t;~7!(aH9y?ggyPF`WgY?Tc!6ZEY`=YojMNAKu*P zE4E)N7-#GID;;szttV~(cHx6IqJZEi#XWk#}6^;X~DjRaW?-8O32ALOXy;2 z6y-dmf!QA!3BwJ*=eC6rlH2sN76P-6yf?Ju91G<2PnreJQS##s>ob>{zf!R#6XvYb=u zRGEcT_7tBU`t?PY8|pOM1aMNfX=bn+=W!O4Wuq8vNV(;cFmYGqv+))@0J{%I>ch1`aAQF`ruMhzJhxFq5sNeQdDjuG8+)ur%Y@d#v-Tu* z&ZKaUSu9mn3@d0e>AsfeAKU<M}+iGg+>`yWd5V3;#B|IblwV$p#Ml_>TjwYW~ zy|~>Ji5o!MuV4g(>j#@UxZc+ob>8`v1!B|{$uvqWe7_g1cG~nZ&PjhKrb}dyBwXcY ztAK})$2$7?&o*YqF#7cd3*PxM?GQoKR_FT(s0iKG3bopP(l`p9R z$$V1SF%g)N#xkFK$F-%6PfSn=3JO*^uga#hxdyn(twyCXEQ)!<3nKb1$GQ0U`Qx}6 z^K(sW=eX-@uhcV=kX>skVhEUd#Wa~9MV?1B75WTu1w*t#N+hL5wek+vnH7ES3wC!s z1pHzX!!0t8{mm{0>m5&Yy|Z4PpI@gua)_0>`AwnIVCC@L<&&ONpO91<^P|?SIi|#f zv6rg2#l1bR{yM9tBBUr_UsSr9q0v}D+!V|A5XiBD&Q#ut_`hpL5qn~=Q}v@bi5BfR ziXz0)5o(<)Fw3WbpQ@L~Mu*15&1HEB&`R9b?%AE2_!a_OKgBCeynsK*3cRU2(12@y z(!8~oetU83xBE>WaUAVzVxkNo9;!25Emjkwt-9rHXNXna8v{@;QyP03J*9b$rh$=I zFC~i}aO3?tIE(RfY*r>tWk>BZFTz&4Z+VmwS$tbPo6W^j<&&#i+#@Ci42Sxq192={ z_E4*aw@+VWIGm(+j95?--g)CcE;$FdYAl7H*AMf70}r4e*_ZrG5hwRIugxzWYGnYC94%Rj;^j1oDq z{R*2>->9hg+Nta}c=#11Fk9ef12w|(<2+%SH^JE#YbQ$)TKxfSmyi>mCM2laBIRqRE7U0} z!0hNlS&1S4kM&xuj5v+3wSj)B!+g{EP1r7GoY}9Far4Xh)1<`7x?)=p)5vx`Mkb9$ z&bw{RW>s$^K{?Dg3!8KOehz)G==`fe#u#3_o!fcx$?YSd)0$Qof!A@M)T&kzgw>~Y zcF+`-9A%*E%j7o#tyC;;%&NFo)1#*pn=9mLeB!Nja5z59B2eb3mGg24(l*F65fcjnMp;(Rkbe*<7Q$%1Z);jnYE&(4XxLKpLG?g&pOE;BCc2Bu z{z?*$*ZmUWQ=(3s19X-4{|+{zuZ`7+P{jb~R8_vDLvt%l*qLMjR=9*wRl|C88WERY zY5sw;zDC+*DtWT$Vlv#l@Y~DednN3-78h6cjK+jW%3z( zxn}}?Umz3g4afei)TkMaO^f?SGFyd}?3bmt6yuhye$`WBh%J2;9+_TC)Lt+Q;n;+* zHBEtn2DkWam#z)xrKX{I6CFA~3gAb53B~WdV+UGePKuscu6v<+046g_TOJ(tF<%nV zJxcq{)^L;48g-xlYOtbrp<0p2@cMMIh4iwwDhPHuU}@+a7d~$zyIN39C8#VZj8wAm!1t#V+U8~|cTMqQ!M+HugN1$$3JS!tG zJECv#JquP4K2Xy#qj;>KPw9i-b9Rv|6ctd#;_`~z%nlyumyNN%?}+BN*ZdnGXH|j7 zvY#1|Na2UW#R5&Wa5Gcd)bvksl9sF8?J3ScQ=*-cIAOFKk^Ld`|3W$Ci&2&hEti9> ztZL>~x(3scu8!HNJzFitM1tED0iD+0=fCz7G40un`-h-hnk+uN3=}U6?;cm(D^z`X zlhyF1^oTz&TlEPs#oKR*NVI77GLomBTJVcJSMS79&(%QK;#N~{kx`>$hX3y<=N_fj z7=!g1mRoshrCAQ2X5(x6^JREsY(!sARl)b1m7$i>Ul!#z+n80xJF+P!-D0aB4lAOM z;4vir`_tPLQa$o%ERWoz8b5|55#_O}KkQKZ3xwo2(tFA&kYmbB!4Jr5NRNpn<}>WAN0<$xC5WKzJQm8bQm|gmr$u9>RT>Oz1ROiQInVcw;b%Jqq9|} zmn5f{yuZ8rW4k}M#$NihwTcoe3VBms^Q{|XMyKpuNuTgs_x!&h>8anG{Bl=~E2wc+ z43#_m+9CUFAEm}Dkj{aOCEpl@4&*$x{DvO{5-rFpDauWN#Lei|^M zaZ%mwrJEk=LereB+p^V z_m`~~9k~Z3a>B`ii}q`5&VxP7Os$DR>)YBiS_UIp_hu;0#pZHjg$EVd8u?~d;W!zZ z%?zX9$&yAE={M)CdhabQ?QWu8gc-)~>nSC4uOBq`5#rtZCx9?CN!~u-MmONlY)q zB49-9JppVgmYzI zuP4{4C577)q|O-^>gej~#@?cjCdWfBg>=i0a{E9WVAZ#|ozxK>Nl}6eC<8M_ z01(E{CF@0ujIFj{6n&D&f!XW7EMNcmJteU8Cqf|_az?U3CfjHmc1Cf2jDz=SeC5mA z3inLEp$i`}RGpTpg@s+;G~t+$=p^1es^eg3km+{d%0JUxZr8}<= z0&K{cL}8cJ!_d9`$nn=L{DGq!N@04H)`3eOX5TPfV8s?QB$Lr+W22Nd9y^HMPw;e! z>7bybHM+%hP>LmCgJUsc-l?#@K+b*ckd${rP3y#Gmdi-UP?JS(dQW?~?@^muNliqm zx~J|wfGv<~{WWk>*>__d%34}ds`#6UQ%t<%T2s}w%Pb$Hp@ z+G^t3*z7VuRB%y9MSAq|SYf!ytDRUNva@j5o=FF>r$?Qp)@N2TE}gYM`3Evc$VQgN zHaGQIfVaDY#0M#?<~Y2^a#OvB7&j`rXMHcL9w=TO44WO)2v+wHOjg8_Kz3=N$yfJ( z-#MzDbRV7XVfxol3bW3c1ooYX;Qq&OBeFY$2B4@dBfMre*hP16<9Ma2t2;~IT0a>8 zfb7MJFVZh?TQKI+i2DUUp6ciXG)3&ruRc=L7fw5j}B%j@8zwdq;<`H$4twigTZw}&iJmhf$_ z-X`-CsL_@O#5*bXglizIC!=vIXd9nmrh6c`&ChcGED_K>GqGqre*?e}B~m7|3v6>CVZmb|tIW_+_Ko=W?UkqL~hG?;KS+OJr(e79=(xnEV+wBjIf*Edg3_Z`3#@L-*4^-HM6CTg* zGJ4z`nRsoMZ^h}k*7r)WwDF%~SeHRfhUad58jd$x`4NfEv%}1~+iC3FV~&J#480cK zLHFk|_zWY3;3jm}$)El&So{V|iR|V1=kg7yNT&4D_?k$3iUP=f0egA z72S275sm)u`MkG{N#TSXulQ!P1|~9v1o&HlHBft``&zpgRRP?MN9h;-Yx z1f+TG@0oABF9`GaHVf~?Fe9kXYi`oqh#SJBF zG4mNDGI>hk$Nd`RO`2yeqmaZ|JUD7;iwhhUQ1>@<} zL?Z&H+;fxdqwX?emm9aM_I`xV>KK+nMk&2MHDZqn54a?I$gLJrUQI z2W)IDeTx}$wv$E9T`3id$IFdji!=j<-h2!w`GMK8M#F-hVOJZ)EM_c3hof@lAl0_? zAl%&9DE15vwr%xoE;X$CGNyXa?l@0xze26yTlOZpL;2PFJ!DeWXt0OxT!U_A!lLG= z>#vqL0t~aVv)RtI`;BDeR0)}UYo;NN!g>qtn`^dLZ08NIa~M4SXv@#&Hc)=f!TaQF zb9hKm=)_sVSt_^ExjV2eMrDQCqG#Zi?R1}ib!`vA&VLmd<;QS&UU-#u0RL~)he$I5 zxcOFoG&f2TnYwp(5~RGiQ$?a6UGuIGz_b3CGp7AUXkeex5zU}8`9v2a>m&P>UXOq{ z3A6BxVmqSu-{N81rO>3vAg<7hv_3x2s*Z96yo>A@KPRF8g1@wwsp(0OIcg?QFJH%# zv)>$T^ghFU`Cmu=PdM{zK594UlNuKA@>w(p9lBam=<^S;WxC1!oe|uuXOVebJ2qY& z#b9ex-R!wt)a1}x&X!}}?0YurfgR)yP!Dd}>VR|-o?ihaTADmP^ z7l$R`fAD>!N{nOSgqimYc9>t8FCj^N3sE|h7H(x{igReYl;=IKzBRbeOaV`NfPH2d z8jjqlTD0TcopZ!7YCFHojA@8ksN1NeSS2F4p8DvK>$Bt`93AX%^~&Aw!pUNz=aa@| z4y(FC$kac0Dh0^C^in!BXy4d(N~|FL!YYg3KydG)qVLCpd!!4H{6ZL*jVx**{s$}e zz%`9XS~nSCXSZTG&2GQc>7q!*j9ENR&%I0!FHuFX{c!=6bnqK670|Mn)+?_|n+SWJ=GO9Pga1X0Fr`EBLC zJpzLV9l;Zia)mN{marR6aTb{qrIao=YuO!sxqmes$hp_7!3sF4RTH+*fe4XW~;yZmtm0xa)X{bi5T}PCNfiJv%*9Z zxB_s1&-eX+mc=LnPNH+ZU!_Hpc*;)khr{$_5iu@w77v39lC^z>mG-kZEU$-VUS)(Y zx?47^$?XjeC3{^7_rIb^Z-PSQ)&%K5WMJX$yO=wiD5iKR?+g!panL#ZV<^A}eay;Nn>Dvp(J9#~BbscW^ zr>aZRPZDg+4}RiZmp8v2YB^}yi@(wz8zJp03;qbtGoLgSaxapfKV14%*%5HG!m@YP z7x;ZldD%06uZhI>J>hkB7=23(lnq5JHRjD<4(pxOoghLpfYLD<$cq~H2GZL;1Z$-| zL&g))0lLU;g*2do`;pX4QvB{4zYT#kuZ9@w0C*IV)n~@yt+rr-@VRGyNSFZcT}5qrDL(T(CK;g%Ia*WbTlV*5UhhHV27P|9IFG-8 zTlTm^9qR}^cI(3`7O$>{d*`GaXOCuL4kDv&Y`+WhK>i1Stkf-Jf9?J+N0+4z_NPeF zkNEWDL>eB%H8wUwt?&cU-&OB&bG6C_ieOD3tkbP9)4KM=-MutULk`=_gBG95JvN-U z?Kn$LG#@ATFP;5|-~0tit7bI*C}Qqau56D3$#9BG@tW^~5DK$<=3qbivoIN@jA`FT zYNcvi+sB=+CH4jucrLdq1~P)v<{V>;3@={k9ChSEE5(#qgw0)sIa-oD;UK5ONk5seHJ|I+`M77$a;0&8KBYtlaUJ~sG4A;C{bk2R9p76K z43O^Rb=o46D&OVP(My*i068CyEpz=7Rz160jpP4vHJtEWqk$da8}F0ue;KVsa#T=e zXuBM0s35Vm>fK#a=81+N4YH9mseh&>p;Eg!);~}&_qc*}m{=EH9go5PwLV!4`+c_m zY2HiA*g((hV}fx0Nc?FCs2fJ7_x`UOzy$GVOIx!(@p%rKe$Nz^>jJ4Y6v?YyKjh-}-kb>K7-frC6e&rvJ7MKkQ7kG8=9TNbf z83eT8OAz>M_Ow6$E7F`l3Ih3GiuC8~EJZrOq_muEDkoPx`d5+vshf~*E(|TxfD_eZ z(utnWw)#0O!|r`G8NdwYLQDNmI9T=sZ2^C&s=JioDF|)J_|MgFtK#y*WN6VEl+AxE z0r5T{Aw#4EWSr{5h}XO*VwfKWL;gf@3*g#;5P8BARa{kLGfbpG@Hab2W&c~OAaz_F zq`xfxbD%`>UCB>g{cn6l?`4QOH)u!*jFEWC3h=bow~HR}pI`a2(egl^?3kw9NZ^Kb z8j}HCaj%$P0gvW+Pb6(d%uToVe2{~e*9N}z-Z~xeqQjU~3VUVQnQzu3mo=6odzwh% zpN)uR9LZDo1O#UNn)dAGs;TnC!m_bD1DnU`2V=ju4*G4kE|}QtXDivQ=Xzmj5$yi^ zx;m8>Vr^3cncF;G;qn=*^!x%Iqxd>Ht5*l7mp5r0(R+_8+q_ZD{HNouF0R4lo;{|P*dm9@u2@G2OSNQ~a zdXgA6S|DJsmtV*%AB93wN=KQ9h)P!L8W8<`SF*6-l#YPd@Ou7$;4ha&>H%PYT4(_XKW!zS(Lrf-}q`B3X0tV`gELDaqh8 z#MSLo(|3>i`3x*m5t7TveRM6gCY7N_-gdq<_YofC4dV2|zDh?epgQ_}GX{XPnYT;% z<5x%t!Cfw!aiyiJ;^IdV?@5pngA4m+f@v~zXiub~PXCrnU(4OWfWUuX;Gy#MfsSKL z;+mvRU9o{?`Br>ouCCcEEK)GAVwM=9v+He_O;`i3tD0htLkTt?EL?**2>N*}dYMCY zH#TK#CH#zDE^ufGx&I<~RO_%TSPK#Mte`uHL@bc${46>=b8K*6qxy7Hp{`QQ`DGrP zJrgvxt>sd}>kOI?UFj$dv`uK$wXz@5($o@fyHgN4cJ!*0nyd_hGj!*~wh7M`j@}Y?7#+C;B;nhXXfS5Xl zzp#R6{5{el!(Y~LLpxjiupk(_cV4MEmPlc5&SjE~qpCy6nd9-zn@JLsUN zN4pX|#5HQp^*Iq$&I-YK52!%tF~sxzTN!XS)TVBHSb<~(&5VDm+26A6h{BI_XK{a_ zl2jQ7e9Fxj{f7K+=JD60l|deyCz*07iWTG>^=<13$bd;RL_QVySVYb2qa5tEdATo@@?sEAwzUW)u0ZOL3$~bB?MG!bA|9i*-J*8V_823cU;D znvREc`24CuUYo7ZalPG4meXrLm6Nae4JzH?n@zUL%X3GU{j~&?4Jyhf8p+4qK5P91 zvHVy&fKAr1)Qa-mnh6f`Q2x|hH>nuD;!!?LAW(7i!MBa{dmt9)*VkTKWHB?=6F}ioU*KK$K4D?rte*y=asU2|-do1Zimy0i{b2 zq@@I8CicDH{j{Is9+ z8rU2W)BHX{6+5;4Il*xq9Tk$1A|hR104#Omj1WmkLpbfT7^&-ZNx4Y~-*sp4OZ9Fv zUPB&G0W%~oyiFRFW6m>chgfUl%C}J zvZKGgRE+Q$`r+WYQn(^a=L{#5xrHeqFn$6+H?yxsI*_*bq(aBNT4ulfV1GI?CoXmz zIlc$ZIROgK!f<)!Wo&EKRF#(#VTP80E~D1vp&YTenWWQETC@MXlRXI9e7;gO%}X^R zmiS$`|ArNdnp9!DI4;B>7u_9Qb#gJBVR6|R9MpARdVvNh$*XEYvv#FsKX5-Sz9@R> zELy5;?RLBnXv5rDlF`ru>1K=gdYH`e^Ke4U%}a-9)NSdb-SU^x*rar7$B}Nz7)R1d zW^|2#1u6u7sA}sRTu=w9ZMBFWrrLn0^9pA5bOTN1`fi=l=M=arIbrt8TB$b|Zd98n z;7HdPmwZV>rY*$tTELj_yUcj6E~Cd)mNw@@g?ukatPHb<9FgoV8j^Ef{*;hw?B0uVv#cVeT+4>al?HKVa%lDbl?~+q~kx8+Jin}!Vz8_Fz&4zknX zEHCqdfVh8}Itx+*dMoX5VdjvLQj%Y46y}7~p;sgSh&q;dnWS~K+ol=i7tPPFQW}&i z>&3~cvet_x$~_;8SG$CE8Voo)Llvnx&_5R7gEHqFdC2^z8Nagy-dM7y;Qf}fsD~z~ zkYCa*%{bY)z&)+BLvjOq?&}NJs0n3YIMNm4$KC-&`W0)o0c=t}d{h43R>kFTuIn6g z;q-;AL$gHTbmzq#kCG7cm_4NtEou6x{(QfVq4vZuj%a$;QB&hx_b_tC){D``wt+~XnbFV%IiO`65NC1omc0OW82k^}3-=d1BZq}F&_-g>9 z+6q9bs671qArcdSnuCcVt!Sz@7p|w|eILvd^n=unZcye}|D_iV995MQRie|Ds7a== zrzGqfH zDfTe2wxs&3V5M)YN`>RJ&3EKzHmJ>4XIRwZkkq6*k+FUBkmIE66(z@W%b+kBhBL8K z?{6bAfv@?T(s}uL@w%T^8`VJ7hPHNgZk2%WWyS-n@SzxnlZ^?^_Qq}w_9VA;pZ@vj znzE>_Jc^3-N*NQ#OQoHX2caVnhEQ_qJ;MBmsY^%eopL{<{!+{Eku$}Z-mfwWW7+%` z78Ws!i)I#U#vETa3)uDfY9)bp{Q2^MDtwaiGHp^L=vbYvXu(RF|^X+#K-77va-I)I*9&e z)r_;GlviF!m1uQEP8|9BmDZ0nhOt&Lqwk{3Yw7gqI(2=*cb`6yhmb~<<>^nU*e2~K zWP%`>8F>WW$4XaMfhwm;PPxDbq*0=SwYfT3*;^+-^49(go`Vmb_mZyN2yY0t`B*>+ z{cs;5z*$WZLNLG3pA}#w%iq~nCts)O>0v4dV5xYCGPt^chLKiu*@$dV*5B0|eg)>D z-_p2f2h3XZ9oOkt;B3A1wxWb8p!)Z~h}`GaB!AbStU;p)UIfsX*y8B-05s2>OFjYS zUXlT!T%UjP-@APaN7EQWhX%*Cad^A|Y=hdg2RR00vmUhuUjuZeYrwTFTGbIMKWcnw zf=BfrjzYbMlZy`9Bwi~9E^4q-lnfrh1|Mv)VuXtd;ZWCp@D`BZmrN^MJD5lGBid)7 z4a$hr4``rd^F9LCs>5VWL4xpl#|ncw@W9@3t^Z(TGJ^p8`2W0p@hxHhqu})ae!$_D zu(yQ$pA{mz<=9(}z2(?juK+~LZ&ksqD!5ezx2oV)75t~@mD>%%|23)JTjO* z^dEoY8lYYq8(Zjo$k`T^zfZK-?p3TcR3%yg_R4E}6cfF6er5UnCX=1i9|2;y)7r zx&sAtm?JZx0_^5*-f93^YMkLAf#t8k#T=Z@xqfDJ7qUT|!=NRceh7CSf?Xd(wi%4LQ8mX`5Ee3#drNE@zm{T+!I` zVQ6UmYpZl9S=@vp=#-M-Od(%)EL%k8JKI+QIIZ1JbU6ql@rA_r!=Oq07l54M5mdRs zj|{U>u{mkIB^V?OKTsn3UZ-5?yI?R%Ou({EcA(IaQGqZj8+2k4Mssv@+r)Eav6UYKpz~L&iGA2@~IBhMF ze0+TP;yG-lXrLFq_ND)j4%v;EU)AxnE=zdd5`$uCi-&RTX1Z zqwQAgVCbcrlUhQa&Km-ew?1~EJswm|d+EyK%J_Hrx9j~S+7tp;O zynqH(*FqhfBp%LolR2*E0-ua=hcl%N5R-|mG*BWG+-3J0Yq<~49|1M!#|>6<`WYav z@w5#IV^xSLwc6+J1Jy{%&6L8;x`QoqwkrwC|ZyC|0M?Y}}oQ$SW*wx#z7K-o@`u+Jd% zSl}+t`ROwb*o7NPc|s}ma^qAU;CavjYAy>c}gYKJs3Ea}M>%hBI+db^jy964ko zj*(RZ2PTxSMrcFGUzt`NHti0inGLQLe1;S1RvG%{YC@-c0@~Ek?#(F5K`{!|*Ej<>pBXfhI)4SPFwnd1_%lU5$kNZf`AdR80d2;Tel-!( z5H6GYwj6XyqwsHtxj{>|f+}HU#cfOu1;bYOoK*S%4I&mny!J;cdku39M-30%hjGfM z>ykSOP6tq`+VjRrSJ>KFE)YSVmxiPLroNU7#YGf^2+&zXQRyo7vPB9N67gQF6ST*{ zxF242(_}4$>bk#4_`CEe1ps6hrgRGM=0xzD>Q^J$rNVWxIQyLJ(A?TAlm}{&;FH|de^^zN{%#husy)1M5yUk zfsP@u=h%4)hUUoT)nFKP@c-Yqq)R}#diJc@GpI#^R|2NMg(P^l6k6t1M1~*@eiLJ8 zy0AeDP1vq`VR=i`1NKJ1%(q$tC5aMmM*)&kSsb%2`QP-RRVgw3jt@vdEpOg;7%Gb$ zJY(65dZY)C*JdqUIN4c1Tf15YxUs`7T;UN3FpX8-^P|>v;lY3|m&8r&>5rl30MVooyod8a z4NNqlVpxdJFIA^W@P;kntH8w8O#p-aD`Fe$1+~Fszlzupkk#?Qr+xZxza3Eelg~EZ zjlhtBUklzzjr0H=>fJ?;gRBh3^-f(V0F53Vrr66}F9f0pcy```3-T90xv5j6_6a~; ztlv{Zrj&xeEC|hD2x7Ei%sHq_!xMX>$5R5qBv>S*^?~`IlWmr$F9hUjsh5t)y7_$r z#Crr3B|;h_lv(MJmC68r_P=0x9n_#qj~`0yEg=d<9)yex@c~3)dz8hs95vh&;+Jg3 zHz@xwN(hrk0CS%0tQi8jage3??4XWcw85ACjqv`@wX3V)FtI6g{vLm3O5J%C+}s2x600jAn-x=s=|0G`BvXHP2w zt^ku2lp0N%I9y=B)@Lb>M8Le0hgTrp$e9M1ga$m%E)TS470*3{P{73x@9`IjzR{4_j0lG<#uu^tKWMaK=3~3*CR^XR81QluglIng=MPne^n^8exM{Zh-sEbsYXL zy#PSR!4k!%hS{3jT{l?Adf{Ad&erpLRJ{zd_2(|}2!hDXFQqZ6YW#pj_$*C{(&@LUQf7a)D|1#p(X2%H&edC0e4z zhKjSGeZHe56d!FXcC!xGko`8Gng10w=6nUJ@8LUBZA9#B;JszD;4nr5z&^{J8RnZO z9zr!Fyl8-e>J0~Ar+{(cARUH4y6q&EB5xSyEqE5Nt$zVf9uSG3Wp=15@C8bZLJh=V zFdz?sIe9ba28Cq8;d6ruz1a%{R|5!|Y?CX7hVZOk>Z3pa1sE{AP-2Y> z(=Szs${yuLujD`{fnYKZl#TQ|6Ldr}G*B{xZe`*E`+dzgctC)dsa%UdWt7spZ3j}o z85o&;KmavVXNVAx2O!|%M5A9n2Ne1t5_j*~Bs~G2Vz{WemIqS`zoC@r8h@1t(;7D< zhE`%Y6=mEwxZusHtL9Iy``Zw}Bj!MN6QG-yDUeKHSYVa|6a2E1=$?s$aR4G{^T<@+ zWA~TGFO{sPg6@WKlEAZoZK*P;B0J9@eTd*Zk zZhT^^H4;33tA#e+YxXpRZdM+Y={Uob0@aNxslPS=(;C+#UI%v-MX~=YJp&;fnOC4? z6=Fvb5IKOBhN3B%0H*f;?ZgCwUt$9IhxV;7#@U0kqr`%T#w57y(wL%Ra_3^Qb)$#@ZqKTLuyttkb!uEeb? zaqCLJ{QO&20{PaJxOF9NU5Q&);?|V_F8^&*0(g$MQHk5A#BEgKHY#x&mAHoZ|2IV? zE-B&Q;I6KW?`aq@_#i1dPNF!8ExbZ|3=P`7B@EuZL4CK393+*Wet_X?p3^x=BA zk+cV16?zJG6$*Afda@jC&qKqVVlm}pX&sPX#D~1Lva*`fH_1JE-FJ0l#@DxLnK39Y zys_bIW#Mc#S$*V|JY_!Sepr(RuU+4CA5lHW`r;6ib|_50j3_8G){Vyco*V+*vNT_nGlCD?<5Vj5 z-BYEDZN3!6m*i)&QV5G~t_PlC6k%U~{J;q4-lz88@u>ZqFGd)?gm+LOL5CY5WP}_b zyuJM^h0vC3Q3bj4Td1Li2hJ>Vnq-pNxo6!u9%cgg%qrI=;b7r_y@X&ufVcxD6 zgkeqdw0^(W>YlL$4{eHxxQV0~yyV;J&3tHxxM2TIf{JOYAJV*5HEYynJi1oJVt|%8 zIGFPNyH!EL)LWbU?QPMTT1L5uYHg4Qh&aztS0UP!Eh1t-F_)GQz09UWg~ZbjHEe=7 z7&b>P!}V*ad~9*K^cz7mlaYN3bfTS~80WUbEr{|yNrLvr8>ks3042N&!8lPcl0rlM z+EPQ8t{{HYJ+8p6O0=t7IzZ|M(tz?r5PJ9!WFkV4K(mNeS*rrA^<0~+d=O>5q5q0N z-Y7aGoC0LMS0ZE%-ywd7<`OI$TnCg4Wy3^@2R0I_sINVVwhPt6bjtzb!9N55HY84!owHJ`OZ2Z8C(`ezA#7 zh49opbOMBMX}Jg(Z)OZ10&eVMtN_h;+cNM)Q@Kp;Y6PvObD7{g(^LSj{{)`;{^1!_ z2>8oOrAH5Y3JJW_4zBXfQxG(S6Z%32j|F-<&HqY&hz+tHNGU(%U<>(%83gV)o^~QO zfG`-m`CSKOKWZ%cFAd=Vkxj~S5)Z)SconiSCct~|nD9Tkp0WgjHW#@r!*zm!U4)dnFKp862=vGz*7(5CVUt` zwgE2jX{0w2bTMA^ks*T^=bfGrI+#e7gC(JkWiUf9R3VCoD@G6kDlZ`NsbMRm%_y5L zg&0gOo_@d|%A)W*Uv4CW%7+b%ZVI2?W)1$AE^>kjJ_w9nL{z{qs7BOB7qNa1Hu}5| zSTYd_2RVFz1BgV9^#`%jjE`-2AffO?y*va_wjLVWUQhY11p@5*?Tl`aYwAx!J6Kf5 zmFay2e8S2d!|2mM2XZA`dr7bIL8MncctP%(fn_BOz>WKDAcpK=XCb8o1mV$Onh-O( zHe$>mpo9tZ^fp!+0$J!OIT*-Vu&3(b!Bb@3n-WpbKV1xR^}f)>;IhDc50WGB%T|#v z0nr1*1&jH>r+^9lDVz>GIglSnTPD|hstLC`Zci{E-5*>_h%;DUxVWb<9VbBmMlXWv zGZ6qyk8#_q!@Zlp=-TMdqE?yFEh1%|d|{*SN`NJ!psGwq1?(yJUZD|iZ{KedRFH{e zU>TQ2pnCyLia99{<$}DE>q1lw^)=&fGk~j;ow|7{Fg}qm1bnal*`>P#B<1Yrn|EPi zo5BfhJe>#0C$Wm+G)BQd!nh40&8-dZ;?tPa#_$OyKqq{&e zqgdF_Re`RFrEADA1hQ^n#N#Jr$aEjynid|n0EED)g_+g{K^(qjw{7x<`fsDaRhvcj z;cOV6q;LVwWa+G48U-Qv3S46snArBjf*U>T6bxmP^>lhc$0JSUl5BAJ6M>Iu3HSnS z@Kk%?hr4}13&`JT(Datd3e1P%N&FpZHJB2*xic23iu!&(p#o~) zzPF}C01!UqB7hNN(nkM;$O{G0{Cq#!Lk_w}NtoS-kv<&Se1y%LcjT#|Y?NdXDcuWb zN|WHuP`c|sIlCU+M+Dl20_g+CH;}niz@6#i0;-3XI}Yf#=#Qvn5pXDfLGCP^Jo>;A zC?ow76Pp|AS3}S664;A*1=29re4_jra3;Rlr2PiS-RXTS6oHBDGPLiTSVaa`x)R5a zWzceyHCsoW(T_T)zDNg`%I7;&`lWs&Sb)D7@G~s1rvw2%1Jy!q4tl3tYnZp7KQuKK z!ylh;m=c2NCIvuTu$Tz9-C``_7Mwg&~D(*XyvFbqA(0_bmK?GD!{O2b?zqL#H zjR8um1J-KAYm&0i22YV5{N~r0?>6KTCp% z?LOdp+2nC>gcxJ2<~~rD`0DIAAYCK%LYo~WTtX8n{WL~Cyx?!2_nS|!r^ui$gUv`2EmkR3ckl6%2KgHr5~qIf&~1vkSLdjsS-@^QlMIp z;(?cRtzjsji{UG0PX$^ST`Qp*M`T(R5EU#Y%6pLiN9aLa#)i^`A8O8nQX{?1z~n4q zlu0WghOPHnt=_>%Uj&twyWtE~|I{xV)Xg!fk5>n7&b6Gu+#G0c@LjlGdJVvyax{7* zK(oX$FsK3j#-lRB4=5oFs9)q;qz?cBeXPmr7}wPI769zLYc^>Y@{dnYff7n>=yc1g zftfFu!{PyM>|-pub#rdroLe{N*3E(Pz^$8e>*n0LIk#@kt($Wj&AE-{+(vUcqHd!( z|L3DQ=^72n?o7A@93tHeZs`fj|81hUG+qd?A}Y>1G{Qj61^!VKkDJE5AgpY#IL~zjQEf4 zg41HPL;v=JM(VrDr_e~ue-fce`S z-d%1x263P21?bOgBY#f+Os@pzOHRH-T>ikg$SQjl9Vvc@rZ5N(d{T6}3BY?JG6489 zAbrIucqmUkVC@|UU{*#4Q-DK9dq>`2fyjLcAdz;5R?8@eXMEN;{CFKusDA~ny09DH z4{}axP=1V8DI<+Hnp|jz3L!3hV|)+cOsUxL1>7^9T!uz{YdbU_2gBCjjwLihivtEd z9gmgIv)F#rQJ*KFVSp}9HyKz6qyieGKx21~&ET5fJQpM<2c7XBghS3iq|Uo34Z2f+ z#IvB;y}Qq`Wsr|YtFf6+-_MCs?gW>%Jt~%hXC`Q&0HT`r$Q8*Zn`wKQ#Xl48le|Rxx-kL?hNT7b8r; zwR+qfz$s&@{YKJbd>RwsD+|7hY^z zh!8yI+L3=iW>HN0`nRzP`hLp{nzNy_4Xslm$rREUan3wL00`LFA&Y#0rHp*&5Efst z^6ks8;qvPnvxiZ(*arkg%J1Y2qXcUaS#C^(+$TQ@6-rYULIU-QlDKQam`T6tuIBF= zFDPu)JTpn@O#b6OH$1kpzZoUy*2e2TfBG|ImvjBqZ?AJB-NiuDwJaMEtd1o`Vn?sj zP(~+;7OyL(tk%a1#|?i7v$pt$#P@u&3a{P@PkJ_?>N$2*2b=Z@SPQ=)aXz8) zwd(K=g<*}KgsUuO4(BzPzWl@8E>d%bSi7@Ej!bY?AlSJ7e5>4UA)EGYh`A*HGkWwm zTb4)W3)Mo#lIe3iI;ugz>gh2VKVNNQ*$7XSgNl>->5m3;`2OI)ve}-+oIgxQu|5sq za?)EM&E>ijTLa?z&{UI;9yFHg7gN;%Qhd&y38A44;r+y|sUDz6sNP5g+)xcoVrV7Y zRUrnacE~;uzDZ6@+d<=mNhuF?l_of26+B_V4L zT%}Q0kN*0-7|%xnE>#&@EV=ub_&_3TgXs`|?#t0ey;_yxi_GBly(Vn253l62Y8>07>0D0!a#Wj+2A<10O${I=uX_vgx6?Ku9Y zNT*WP+*xX0c+Fn39M|7Tu3y=F@bD-ro9Vsj;Fp4mQ{3oQalYL*bhwX1C?JC4J^@&E zB$WxNmB(-(JgbNafsq6L3s|)x;&Q(~Dj;E;cTWSFY{C6clM0C(=p`-skBqywOh{(# z#P9crP9P()?)(%#V<@e2y=QP~VWd;!<<>3r`ME(H?!3U(7{}vYx$g!d7?d9NMnXIq zRD^(4ScBiN`TNIrswI6pT?g%+-E48BCXYTL;e;N}vBz>WCMVXtP&drZ6|mfQp4#De zIFvR){b|G&uj0!p(D~`xAKd=9Z>OI7t@_b^2yZX^&_XWPg~n+fw|htbh$-5`4)6Wk z7aN*{Ofh9k7NF!zMMEq0CsFgGeXLT;_%9K6uc@s!-Cb7-;=yZCbjs>@zaw*k-qpe>YiKhhuPZ!cVNy5|;0^yqntVpzgDS3Tf$bm{p@0&t6!3rD?oZInsQw zZ{UOmK~gH2qpUkC#%XS`79@Si9?wsAksUG>zB0_x@lJU`?CgTQ{OtxC&Ret8Ql9ss zGCJFd;_Hzrf%mp2hkyKPdS#YDmK&-?%k#X*iQ%v#Te8k$F?{s>Se`)`h5||OnSAr< zn2oqk|LdA(RRx$fHCDtrLT)<&OQF*lzE62nRk%0bUYVWGF5e+DY^5^W;H=BX9gfxy zdmXU$o+p2hN=0ftpC%^7gVWcjeDiDMTvBwQID4SZqU7hEl^)S-jB^T@sH4rK6CK|~~ zEgc}Dmwn1U1Y85Cy*@Pp2UXGI2GKHk$m`d-cJqr|$0 z>I6yG2ox1iCc(MH%`XZ$O_L*SF4d%$RT_HU#(qSFFveGHcP6PZ|H*dB7qzLSKA~%g zQGg(f7_L2_qTkm^n#{^e&)&8h&%tNk?JdT5<#(yifc=P^p5pGr6nFex2 zvypx?u5+sko-W>Cik5Zgf2EcC^mym1+s+s}61TDCLw&~nRC-QvR}-wtGb4Y!0q)nF zfJ}lemHCpX^csXSvw=^ULh)%S!ob#HI@-i#b}hydxOepTga2U$5*R`1>V#~b6#*4; zLi6pVC^S2$^`B-3v(O+?VwC4ikBX%Zr%jgfu|KXSD=TFU*CGL%NOV;A>J1TVZjiFR zN@!7^D&igZ_m3YP(@`9J?U+5n2#eqAZ#kT;&B98{t3)(#xytzKG|jttJffK$;Zl2; z+A*!PR>nO0B$t^_x;2jNz8aByG68$Vq}S=B+S>yYB$&%1Vmy4&P1%4&IUc3gS?;y; zBQ~{^hL_hdJ~E!*&v*Z+t;XVbp3ZOiyqUOac2O0<4CtbTdqkd>zdef`_T!`itXpW& zFC^zvraq7ryG*df#k>x&T_5(W!06tzAj@IwPXtU#WHVZfd~xR@&WUip^hkW$HepjN z>Va=s8g`6^O~c}Dk$WEj=iRdl@+?2)I#T_cznOt=SDG#YzcaQr2hI2Q{Ia zBK!X|Jx%eHNOd+GUCXz$Hr6(6ZZe@M6>N?kK~DVUGK&cU3RvWbP}5N$6~PG)Hl@iq z-d2CR?{y}wM51!uFWlAQs~a}m7OObTx3)C>oToaV=y#7%gx$Z zNVeu%HK@v_c(tS?DF z+X{s-=$Thkf!;RGOD!wQ0Ev|7LpBO}>)c@@fJV8XX<(NoZR}4fL@Xb8e@5Npjya&b zy@1lL_7-@&Y6BJ<6YR4+oKj??0(qdmGX(Aa)%Bq zCA2K9Wn2!GHAs|ai*wS#ahVdrZ*$16jwiB0E)2?D?wbv21b<-e_t%^4q(h%LIE&q0 zJ~aO4zz4)1PX*{VQzi+E7#c3eDv{T7QcMNh?a$pFaSkysBSlTA-vYY>u+MyA1MLR zaq>=}V8k;rOWs8Nh_K65z7B4COS4{?i;%0jtCRbR{LZBPX&%QRYf_ot_>CTp^!W*I zdEm52n#HRb_;lBt(HQTiq)N1uKbREMz>j;MdUbx_WQF5mc`~l!e%c%&tq?#mW;&2c z7~C70Hx5)o5U%2*XRMbC0o_DWllFgD^eU}GwaI48$=pKujStRGZIA4i zrx7Zmo)Ym$QpdTj_pSa0p7t{U4Y}WI4-T$Paxu+^ZTDZ$fZgiT_wmAEV5{9#T~5z} z3bAhcEjSAfUBQ%Pdki2?D1bF$UJO>Mf}{DeViRvX-)-m#-4t>Ibd8-FL_A+Q7%)}9 zhCjq(Y@jzN%zdsf^>Mzi7yP8_N>S>;yzm^pZD`U;bVLxYT4F{JciX|Yvupb*m9|2u ztY!y)z?ZSzR&11|>lVVC9=LEhRp&uV@F!bN++pBgr}-O8D;>IM^#;>styiqd)w#dC zdQ3pU(i^n29Z%yid>Zr`dxVB?q2t^m>&87d(tuU#&#Iw$lT3${HV@KM^W9%OSj~|S zxj6qM|AO~=M?M5l5Ok?W0Hap3*D(peIZ&jM1P7qR!sCt!Q_u)SSX@y?#;|n-eZB`A zUPbnzkO|zN4}AT0)~n+inhkz0sO3FzMU$VJO_{HM|CBf*?7l#H{ zTg27w>G-pY(|ZEX-;W%8BF1uc>SlJ|h~+eD9^i3biBaH*Q6U|xqNSl0wM6DGdtOID z8p9i`qq!kC@Yjb@teo^Lw1hM=d{lFtGZM!$b9zJTJCWmi8V!zqo=L&MLQ9imU28A6 zS=JfdvYLAf^zhj&Nn7H_JQS0z4opdLjthd$D-P%KnfO(w<1TN_+ zaXUGE`1WWpxAV`3=2P3PsI%>QG#Pa5ws95Q{SG{H4B)&DA|HD!noTm`$P)TP<2ULh zID}dTK0F3aZGjESxKBd1fYb?AtdsncI^aS8P^q3CI4?9PYVKVRu#;3Ma~M9rqRSPM z0Rq-S2`Hd)vG$cK-3y$5kD^DU`xBK25@&BTlzHhF#rB*P z1WCGWyyK2jZ!v~BXs4VOiGhDpd8p{Ql~+go*Us5 zosG*xp{uFVAN-A{Njp8JRuiF>B|U!=oW%d*&DV1FD2S@14$V`&Ds$EyJl vay=%|E(;|S?| zsKL2puHy;@v%S`mLIzUBXNYMvS=eh2{miF`_hp1|!rEKm?Q$hkeSCg5J={A^qoE9x zB-_2qGM|Ndsf-`!Tf)SV=p!-Wa1!@XdGPVE?;y|1wpKLDXt5`er&DG^Tj)DaD)mLE z2gq8xaId?n4qQjH*4Ia|e;z|Y~Ak%t#j>Hyi>nZ#) zJPJG+1?}f1<~Lq*8Z?9xmoQ@vYUl;}@1p(rqir)hi>;|am|C4iW}1d!qTCO#&eX_jtL{E6hGCzh%&#Qzo0~Lun~LnOHxNUDegeT)>G(cFiCDc@fZ_ z0^ey~dDQ?f;^k%r0d#YqyV|G^b=LkDE}MY~{h*|@LuxHWFS|?ZcZG{e5Ew;?0w6rQ zsoh>+`CLBZbR9cP$zPz~FR2ZFvjqR!wL92c@43lAhdH9~oCBH@v)UCSrY)u& zA{M)sB0KlPnxyv0nCX}enbd2r=?6QMRjcmNt7$d@x#pY?tb`H}*lA4rv6;U;8ZhveO~FlU(lAHulE}(OHLT#W;1C&pf;%)7pZ@~{P`gLl2zJ@g z<2*iMNlq)Bj`5X+Ie`{TygcKI2%A*cA3LUs&(#dz0$b+r{Kq2*hNS>-&ym?s;>IhW znnFCY)!C+?RiJ~WAG)@< z`wWk$hVD@r4FlnL_j4iBWg~ajxcP&{E@Yv~ug@Nq;nqZWT8;EaR*#h%s8Q5wqveKJ z+)Wyv2u2^?mLZFJ-I(L@=`&vj-k(In>Vi6t&RI*Mt2i|UE;mbNvjKle8n{u{G{HAH zq%z(6p)Tu^PO3!l$b1xEh2i%KdHV_}Cqi_4`uD%fK6YCWy4;q1^h=rhUB<2&jd&_t z;2j=Qxt_4u*dEdRU~Z30F=v}S{?n8R7s zFclr)jEwH(MeJG62x;TXE4wChDb-RN@d1C|5Ye}d&2cm&2Xm!WPMPaktS>opnxE#! z*;rl8A33ElvNd-h#;z8@O%_=Y40Xj?_?bNH8}Q|v_-QjRO7MrNWsEb?x3XQinWrV* z&34!~z&2Af!S+g$AGTtw@Q#KIm61Hxu#>cq!ltLei-~Ugaei#& zDyAM*HZ#fO>PEACf2J^>m1c@pNrdAhP(ej(}iH|&SMlFrSQF&WTSs5&3;whA?8VA#Pnm{lPuYKnkI~P z2wuQ$EcIRqzF+D&x1%vQesKIVezPRPCT&X6ePHl7Ijw^}G=z`wG`xj*SoIHq)=4l< z-hy^S`I4=F018f&#RhMxK|V92US5tsjt|t3dIn>U7hR+*;PUI<;OM(;p35C=KM;RQ zau!xLx2dG(XH@6LA$i!2j81v6Xw0Mfq;vVJ5{JG<$K47082;(gpx6|;&qR(hzRqI7 zn~yl+Uc5)})MHP;6Sr3xTjW!p6*4S$^-Qc7IVfvx%KU{z$jFKwmx!UMk>W1x(f$Fl zD8-)ZmzqCbd=EaZZ>boW$I>BbUh4VFi@KIDYPPSo)kisZnct0{TbSDAG0c}F4B14uqzq}JL;8N>qoavQr#`WiTt`@M?o&0bh%!ycI`I%b2o&Z^W!YL2a zi7flo(Qg%zgWcAM2!EltIRLkQh+u5Hft+1enEix($add(cke9Kq8VYAOjRHMaoqV| zX5^5&&zf>#3Pi*lI*g5+Wu8gX$ct>9ndB6;$Hjg%yL3d>)m>UyY4}Oi6&# zSi_8+rXHy~QAkhpw&1J_!Vg=H@RVpD4K$g@IpU0Vyqr;PGvYnV3>1le`@Gfu^=?+2 zkiY;Q*eEb`_x<4mk$8J2B2tv{0B=`CuqQ}zFXscDU9JD1&(Xk;qtNs2i;^oeKygn| z;CG4xXpIlWzg4}LDz>*P=YF9zrozzwRj=A9hMGvEtPBUA9{zmIjsIz7fHl7VfVn&f zTheB8U>QxMxe}u=_)i4Hhm8G;$uFOIT{s1Bzy747LQ9`$x$?_B!Y5Pd2iGBC2NRAw zhl|6R?f2);0$7M2&Pv)7>WhvT>Xn}z>+-+Yc<1`{` z(4$}Mj@*B{-SohWN!#XXAzw2^x+_S$_U{J+aW|HXbNsc{*Es&Q`(1;(0xJTNS#~F5 z>a#uO;4EQel;m2&Z`AWr#uvvU{Vi(gRD9u$qbC~Wt{!(NrUrxA-I&oc=svO1h2Mcc zI5uUo8|yE|e~skjzuDj2kqLh+rTqOnyOfmUM{1M>V@WW@Bwr-ebhP<%!PfD1onk(4;&OQfLuqSI5z{km*~<)^vTs2 zv^At9u`d2lFJRJMkma2GJ7BT^bBR6KusAKzR{N#L6$csStHIOL-ze_4WS0pTJj80zIhAw}3MsRW$KZo5X^(+{ zC}r*veJ1-^zBtA2E(rP8p)XtHATB*6shvEAvVYXl<2Z{`OmU3TK%P%B6Vt})t)bST z%u!|?K{hZ~5h!InuZbbV!z4uP`mr+q@EcFFH=VTjsmW*&W`t3dsXBj2etEH?G@0xD zoTVCyONnn|YF}Twvk*G=_M@mQ@7rgKo~LtT#9@+$#;VWmpR@Lgn9?7{H)qf&g45^YSyE?zS z->S|K`#mwlE$MFnLENN?yaq~Mq>z4@?Js4~wubQd%e9wbHSY-ZABJF7a52|n6Le-b zRORW@+o?W&t9($}u`E8EAV7I^Zc)db7M645uMqR1e^ncDkRyy`Es8+D!`pth3zyi> z^dx~9Y`R!gbhVA5tF9^_<}0g>q@1d1!5QsO;y^I7N6WJiU-u}n`A5D%KnN=?!Y7ru z^L8mBA-l}`$+c^8o#8>P29*oAKT)-&NUr4@cm_Q1h`H@J@j7?v=KuVw0R8m&UKiVg z5nX$E9)Vykhp}YN=2_x}W^;|Qi4xkZyqed02`YZnC-)o3ebw?egnRw+FU{UsRwt0e zy)XpjF^DaVB2xA4R_j7L*zpD@VrdgC7{pnY^2|AF?Ksgb+yZPYiu4E=3KE%g(c$j~ zoYe4m=EymO+3*iq&ZNjzrDW`}X6>dZzdzncD5%YgO=uKlNu$TV%iDUV|=eUSlBq2{W4c(y^~K}ch#owL_0i^%S*iu;vMY@zET za)MTFnQn)fraLctsMN~cPdvV;wdZ~!R_ow~tZE>Hxt{Gd9qC(r&-JKtTcm;}>Oe%d z>0t*+!Q3DNS=8wOHwdUjwaS8o)1f#G*+$FDNk@1BMI~gp)n_FjS{t|HdD^^J;Jz6x zIrD3(0vWuz#&g7`ecZ6vAp`?EWN=o0G>1v9-pi}mNn{>tHGUtQe={LuGmEBRvKT@u!;)}+3Ocs4Io)Cj5vee0O?Z6DDh z?U#vbiC=K}LW#hF)SnjeY_#TnKjuVOdw^uG1ie-h63-LnMGuy3=Gz zv>i)BzyuL_7UYu_uA+YcN{XIqn+nstpoACpOZ{Ze%3Z=EXt|U$HXK+hTc>Bw)|gPa zPMef$i8g0q&)KE(%y$=8+=*hd{^MdT&VkJ{y^zWr?8D^sX84o1^&;y>pMGnZbutyw zH#(;6pK2s8wW8zw%!*0L;q~5pgPt`?^Y+9%06h;|fm3YeK+i9=*;<@paw1fV^!{*r zp12nSs156PzVZRKG5KpM^0l)A5q#T%fIwN{hD6i*`|htYeGyVZ_T+b0r+*YhO4i=@ z>PX4K4Ywmd8n#a0RPzrJ+fQH~(sLTJGJa2WU^cTu-m<+hRr7w{qPEjco=8>AZ@$Ax_G>KvnNMz49HXi# z8Rh9HZF4L|w7EL9Qi0{k`IVTjsEqDTTUmlH9}T_7g%)Spw;IB-niZ=7^;Xg^>Gaw} zr@|4w1E&xkqh6a*GTvF`gUm4bXpkz{;E2=k)lw>*6ZU$Gg4B|2{;wB6$d8)xon6!H z*a(MB&sI=Djmx93Nzm4GgiHL$@=^BvD$+e+`GAKF%9-_BBX$T_TY^y*gw3?*rXpOg zjf=R7ZME5lI)6O=TJ2r4RiS1<-=a^hK%~l9Aih27Cw+IS@`_47lJK`>g%ia0{E5IO z+ecWu$!YGuMd(3yR5E}FtH-6_l z%ZQBmUR*zLT6uiKr4L2rZm^uVLn%RnE5LUe%fk>|=fv z?8}6i5tVrCs$Grts?wl77~&O;<5wCYGo1L=m_y7?;&*DMl-Bg`Vly$-_aLjV~m33ki|0^wF9xY)`iXQmjBf_Z z-M^(h3eOG=wpw0$l_L8XQFwX$G#e*Dpx_AtyD@>&Yp z=93SRW?KnG30bVl=+(wjez0qK{N!2)&5V@}H=l7_`R}X0c@N5$R-%ZHmMU$l8f0$MH18Kqo=UfvpQ7g1$CaBDcN0R2JyIoE9hUj&cVfc9g zwt$sBs(odC98Y^A-%^*rs7hVZqz6J3RvG3;DTpx7IJaNw{&Njec=zqfp9OZ8t&H1N z4a%<1NwuD|Amv5bv>r8u5Mr*JO_W>fy@_l|m8A=O#>QY~OIj*JTI4@!pLsVTH1GRD zCxR5sSHDb6T6Hx;_r0ce<~C@8LPMHJNa!Puzqv*X+{c9smiutD%2f*dor8X7m zQ-zl=Q$W^yD8HIcVa+4Bqc057e-^6g+xgZqu;gKhNL}*zNTd2AJ$IV2(OCgvGza3h z-IcL>tX$T8M~tx=YM)9HSAc?_*Zo+e{>PI&Gw=8nu?rJ-PW-5JDny0o%4o5haq8al z!Ls{5m24heT#B~}Ko-W5^sr-X%9HeLMKOo0>V4{Ij7?bg!n~JsR#DQr0K)Uz69+vI z&ofchP zi1}*tLq2|>21wRbg-B2087WVbD$b`pTseGGObjKDY-v&aWwsdRQ-0ZJi3dweG2O4kwg7!*)NlDqDM?}Az2A=yKE&|0J|vNKX9#x^+tn); zqWzwX$e>iOXxMrldGxJREWrXR3o$>5!|QMW<;2bl@r$NnQ{@Q?vkZPt#Mgkrv9!qPZ_?P-5Aq*>p{Lm;9+<1; zbF-*~=mqHUe$~78nu#Zm^0IDgiJ#SP@+!L7`CX*ph4N8}~1oAIf z3mP!j+=WYBjp($V53SI$YgPUV5LFXu4ZvxAC`*Zv4Y|H z`g*@P+tixz@#lX@tmJuYGV{|{wv6;$WeM2iLq7Tnzl1c%@b3zy&|xVyW%ySuwX zAh-v2cXtTxF89mc|32qd-KYD&8?|b!IcIl|9zD7nH&X9;YsQ7Ph1i^(D>_TqTG4#o zPJ}cvab8w1G@_+|j~FM0#Ku!MRq|U0@F_}0XR0&=g+7nl*U1xM?@3ZSy2vqit{7=P7)?+;Q+IL14)f`xwZ@uQ5$zaO9m<|=*WssakoOywtN zu)Ep+fb<0Ks+Ku%-NBX!M9-kIbxPi@3Q_RJkerpZ#Spr3Tcn%;ee^KAcs4Av@Q!p5*$b+O zb(u*z#G^nswzE(ltKoxmi^3s;4HQPE=B_93dW4^|lxnMkW{tX6{9|_6A+|rvAIRcd0(hsm{h+5r?HO%obgJwmqp9V~B z_w@sE8QSgZHN4h_I!wB?&1^tHr-@^ZrfK#biak z?KEt!$zbdRU6<;|3A^-~0m>jgClxhnpS!j92aGG>$9i=J_CxaI=XE0IovG7-oPzv? zp*mw$42mXzKF~exm?0Cz#+AZe_Rd4detg5sXlxS{z2Gz##!N^|w*w~(X`0&u%*`#m>WRFg0VMafGvTeDXuviHjsxN)F1m&BZ{pMykR?o zyYtbkRio|wMD{MirKVyyg&~ErJ0|aUAfy5;IpOouRLi@ViR+$weD&zRTWuI$qX!S;>5u+UtSrrkH_Y(%e=G%XyzX)t(r+xPuW;CopNYDjL6FjCUO4S$mgg#?oG9$@Xk5<{_d8b@S#|%PA)qN8Pd%lI-`6n* zo5Dj^9H>8&1ajd(NBSGTFjYqEi;1`q>+>mjXs-=O->OCq!iZ;sgPk*es~f1*egc#e z%Ghb_mGIdy^3k()!lD-M_wM(RcTDC*MW5T~G_lRj2)fq$Ln6#r8mJ7|02}@PdgWOM z-9si6mvMDIUPGl!hL;D`6Ruf5q|Qs)j8+S`eyudpNjxC)P2UxxlRe>ydVf3pR*}K} zG5cxcI>OS3lj1|^bFhJupSSl$A9I>)vqx(Y(fd=raScOHf`L9PNV8qu<6=BGBIVrW zy-@Ggh%j|uPM=$8N%^`cswoGkq>IZAGyIR~LJf)&$tCsH(=xx#1LjnqzvNdLpaogA z8AP>l$c!F5&t~=Fw=v&Z4g-AO--ZU_K!LhO*y09H%=R$`oP0Re(Na-~rHjTb1vvG( zJVGo43CcfgQ?nO+Udl#whBrHk(Tu|sk)#FaDCW_Gj%>p_dP+Jgtu*rZElKxXSaHY~k43yNR;@^BWG~0Un z5g#$R7NFJ4yYvfh%rh9}w9z|_>X%p_^V8()baRS)3tXWuS2GNka>t@P!})cX$m&IE zpUW{bID{=uW#07%zf)-W%OensQ?z%1L$aeGRfhPUg9Dul0_of}O4SeI10A1(O=N;~ z5-?{JDkWW$p;5b+v22Pe%k}#giPg^An2pZeU;m7Fxa3aFIxz?z1*84`@_nql7XfROSyXZh1_Z_TMhfQd<3@XAx*ny- z@bYy#7Ewv&3utYWddIqtUKrJHkQMg5zm33(JNKl7;}>1oXv~W~<~MvR7;3ZlW^Ebn zB23o2$w}rPY&%6acQfG1md*`>CLkH!=@6pZ@^`2?`)bxQ6-zq_WX9{JCTFCi3=f#w zXK(ftSk&RfE+5$-4=sB#r&){c)Xj)qqF5z`!GmSXT1Spfex=o3#fI zB%vI1F9%j7G#`xM%a{m=!Vw^IQlXj(yYEs(Ikfv!9S%-p*jfKhBO8WbO;PLstIutQ z3FFxPG9k#7W^~VDvx1XSd=K;opH1|)#4OViF{nXxJ zdJEjvun6;$a;fdx@IEC&fZ0mocqkFf$p8Wv(5-U1tQ4gPt8ff-A-{#ZL% z8Hc%Gr0wgjECXeSO(k4OX&0Z%m{9%+ulhG^GU!MSn*^YXBiC7j4eNleR79IRD%$(L zFjuWe1uD4eIR($XP+BZnT0bp#??qMj#1b~IJ~?}6AFS9=xkCGge|mL_vFdBSvh?4Y zIsIzY-v@4|tH%QOMHO3(LN??dqV9cFu+9+yDY6_g$62Ep|7(#_#In625VgJ}v;A!D z?$z6G>y8t?*$D6FOZ%oXzrZHlYlVEPTjA$;v3tpt0pwT|#M!)clZu$BNItvQC76#d zO{aL#d4>5%+D(RNM&D#krQDsd0kt9uZMJ&2>_*cR2j5CHbR(f}n#$?Fq<9d~C{U|h zB?SKXJa=3bwDk&-EgYL|J8f%BFM9d_ZLWT(kWuznxSA8tP}KUTQTuI<58o`|)2eAW zM)xG;MjfR6vB8h^4vx3GX9f!Gcv*Aanx|-M)gV*S)5r!M5(W$JtKOR2wGpH5n*_<@ zBK6YH9P?MdilcUFlGFOB<7PS#?DZDsw4uEj1GWXkMU7#H(!H{owm~G?O=Ga6pH{vJ z@IsXq-gZq)wjFft*-wMbPE?5+MtYbSUNSG%)y0MUPH+iIr;|kWKqZ~J=-6^MA`&Ic zrpmvgVG@@RG{Vu>{Ft-O@Hq|OSge_yQU!}b1&5%EFeU0R&cbv5xIpXGaFp$9guAhd zq-qn!1FB0QFKNar5~3HY!<8^sckh6(qLb}In+8{F7I2wshMu>j@A|SPff>f32ZYKE z$P=uNQNXakQ|T#V?!ObQhO%OO692Uq8rWlb_Q2fBy{QDQ*~T#_;gb;2sC+UHbZG8u zOo|Vpx5GFVg2@KWHm2h3{ z9$LRuA`HzhL+|pcANWa4a=&WaC=Z7azWtuyh35ad`Dkp;wTKN{fNUd#EeWe*v-f=> zs~3X7h;YvsATf&E;u|SGfecBA)?MCcL7T272RQiLUlmv+`Pd%4*mT8Z#EOb26tAYS zye@|)bDh`QoO+X$=WfTMy^Ig!QUS3T89V}U2w5f{zIF2b$9?0joeGCA7@0Z4RAUDm zV+>k0C|}G}+^TlUFbw9Dfy#x?2K7u~2cB4f_>!!?O6VV2-O)q!YYaVnsL|@$XzJoB%tQCx-r8~`vzw~b&O(v$OU>Two@%<(>q3uL z;?}1-I#(pf*OTeMF4PMVelE=1;)_y_R=)>Irv(g0J$(QLT7`Bc^lg1JQ8t}aTM0Ma ze=4d@x1RB)l%1ik;!FOg4~_3`M2K0qU*J9W8ItwQ3}HGq+~7JrJD4amldDR5(hcjf ze(pZ&J4btYP){;RpAPTk@`3c%gd_)J%nmv%reE zQl6%L1n}3Z$jPq^o(QMG=kZ7q;Y^-d2ttMWBTkPesXU{&h>>oz3GP?=Z!$&0LT1^I zO+4hU@Ln-R+Y$xg*50FuOqwEH;zn6~hHaYQi|NNrGqnE240vw`_n0T&u_6 z+{UzzH2XXy87#r^a@fvV>+YKDwtd#++~&AK9+a-=BQuWcA$~%D(TIiNOay~hq4)mL z_+dL<;?ql$32~6z01Xv)%|{GqqGZSOY}sZb0|C*dqZpK6x8iIvGDNyq>kpKCjR%j( zG!no-!xt2}XxYn@h#bmj37}iJ10Gw{+?gngH|u>us?!e0cW~EfC|fSf^p9XbD@gSt zIuNOanSfAOvcuKwd@%NXTvh24t0JhDkp;&O2rbd=UQC#SvsyBlx-Zw!ckryYOL*UN z94@%>T+5x-pEg#4ho$$UI4M+#k%c=WCfhqXgL-6QZNote+5Bk9)rqCj%|C=T7fAco z7!&}Npwz{Ya_QePw0Lz!OC>wd%h}wYN(+zi988g^ajfflkNiLFPB~+O6vJq^n#w0o zb8mu%O6IsE&sW3jUC$#giAl=1m5T(OKhGerY$nYgw0s`1T16Bhscpok2;o$T<@1^A zT^#ds4n~f1B+V`yJ`HCjBpi`DKQqDs6(bG~l1+*L&vLk;I=??q*v|v(Ri#$WHf}QQ z{9>16F2;Y%VEF~W2#e_z-N`eck#t^xxhNk!;BXAmve2RpM{=08T*MtnFH-C+zV=w;D z+#Lsll_G_$)u`(+kJ^W-hk39N%I!!-p zYRc(vKr0Q0FmA%puGex|jVddPLmNslbs|Ssgds=OF79lsKad{v3^>=_k|UvBPz`0*>feHj;g&|D_MU;gLG?SPt?p}j8Ky)s0BMM zw-S&|lx8I;VHpPEGzOM)j1R?M@plyK3Jl0BA&Y&;gxBnG?iZy&S$%BvmlM>WuyDfy zs>hf{S<#>k&st+?+mLR#vjZV|F~BYYReY0`txvwdV?0Rc*xp}Lz!Pw;g#!9>mGN{v z+un+GdhmZGSHKSwSz9>;3I$GYa3pTGO+`sAO#}nkkC5F2&~l2DGk0SZ!|L~FGUNtX z!tQ1cXo~&v;E`&mw(vpmiwQUC1ngPsPlU2S%jCLz3lB`0qvT7gn7`@zt?74b>UUr8vHw!YGfk<4&sLGLM7# zveUW29piZi|6$npDjvwLf+h!AA>w^DvMB9<=k2iDv6j?4qzVwpbO!Xx6D)xwulA#a zaRPk*-pM0zsWSnv(d*hg;*GQ%Vv6l15NUI79(t0HlT#z7>r5HyxTbcWI@1VZkh0(HCgjVu@`=8G-_lt;48Wl)^oX4qR}$NWi*-= zKjQ^@xNsjk0nN_4bbY1#Uy8ZF(oJ)!#sd~qbqMbdw7dMvDFC{XFqIXc3&b>CjgG5` zaAp=Y+F^TfrjcaY6{dcMn$gj18_zucw4jVnqzXmq^Cd@Gizm-%N=;F+@=79l!CSha zbj={Gxj0Cau~tM+p`9&&K$)0Vyx!8Kx+dvG3PW}_$0|~Ej-Z+Qs$(gN+PIff$-pIg zd3}XI^m>T?@n^F_K`uAE>0knf18VT-3)MaXv*GWj`1@Sl4QtewhZQz(2mQ98Mni^php?4(3eBjlc zX35eU2>ssCWa&E%7Y1FW$nkQgkoBz@{DTzg!P+J?1J8K{@i>IP* zkr4DcN3n?LuQSd+m?%^|m0^h7d-Nc~Js-C8#eUujxV!!Oa{POn6!bv>Z-Z7bG_$b) zlTH)GV+*Sqdyllnt2eHQu+<3!QMJanwup63)b+Z8TXSqeskWEWa)ex^%8x)}MA5Cw>k~Cw!D6x{ z{8^H?8)gESJ$%slQ&42Mj6V@Q(7^85qJcsTbd47H3PuQZHT^(62Ks}^U>eVR5`y3! zQ!{7_j#vUSdn?U&E(NcDhU7aC>>a@;vjT0fxR%+?yfc@g?pOPEgZJ`dgJ%2lU+ei@ ze7G#A*zzeJ6GK$zlCbLssmRmEVgr<7x1Q~q)W$BLv_!sYB)3#AADxEgJPK33HY zY?cFoF3GM8@mEF7(I4%yY_n2eHzr%g0|l;D^Tf>SrNf1t7J=$JA&;`>$L>Ci{-Ls& z=AGpzfgD>(pL@8f?e-Ap3s{fNiKoDzR;rQry zXv%?9!~A%n^EakBJ9Qc31xf-pZ^AOK{W#`@&oRZT*9hc(!_A2gUFKN0malpvwmh}@ zroyd5cyC(_Nx8X2R;+5w$yE^KV{1nx;mKiY^I*Aj_LU1u_W z!pI3if(r%+kvzQiVas5rseJdZtz`~)esyth#>?_5#8}Au3Sq{@N!iEMeFN7;WV^R@S9HIM;P5Mn}RUUd+Z0RW3&Kh-O(-T8+`E&kaOkX~q zk`y9OC8BaQliQRIUJn^Ys$NW)CV|1*w>slGbEQm`EjgC5CCF&uXNByS<3DiudrDYg zQb&x>-PI$fv%QB53Z2P@h}Ry9o|TbVznhD_!*N=@t!#D}fG`&u6jkBPkd+V{L@II> zX_A^YioZ16TvB1Kni&kl`<>&YG@v!opaPGvL-+W_YVri`G7s@Nfex8 zoS40O3d-`ct=rcyb0CzPSBo$j678OzGfFK~T#xvX8K zf^;jY6d0Ih&uP?y_25g*i`br|Dridmw`_Q*Xss2dswgRj@Wd~Sy__wG&1Ecsu;9XtUg!kvSlHXEX1P4>%}y2_<;6wR*Zuw671<6`*!}s$tr|_4ho$&|$kVUI zNt@OiO-h9NVHfd~(OaRKW1zjSYmcpXNqR=7hc*25#UJ1AAAT|#%;)wNl+Uy3>?fcm z1fnX^mwB3%)h0(fZlZ*Ki6=KC%pN%v4#*Aou`6a>0h8IzG@8ZbMr0ovXeb8EpJ0iD zZ3J3oIR5Up2W|3BR{VpCM1VdI@sv+OfQZbGoG}0eQrdTC_fs}#VMt7#w;ulXSD9FX z)J9H}6y|r-TPjmgI*~X4aNqS6T)JSR&Ml{FZHvFkdL+?2;(mekyn~;<$j)Y zYr)Gc3j{zC4fA#k5Im)ro%Q{Ly;5K4!yUJ~i#GJ;qljFn+}c3|7awgdGLW{1hQ~s% zFnSJ%-sD6Zv&yf5(E(Pf1WUlW0D3=*-J6_zAXHdO>c#=$HCj)gV-dQGkinzjD>Rh_mGg;%WCYzUuZ z_fXxS73AK7O~J-X$~2V<>J1Lr!EL~)tBjl`rhsedAm^4>-O#K7h-k(L&JBF!Ga39x zaIkz42Jdg&UJo^#t3E&thGej??2dVCD?VJCSgtI>^}Am3L1V30f{&Qd<1RD5CT?(;sMa=xv% zjS?X%_{3!1*>L&~{rDE;kclG9KEGvjH}bY*^SHMgmy~(&Vw5ns~6i{)UTkP8}J>UOPN9wgn`&&VY8YA8jPJ z2mrf~Sz~cN1OEamLa8)}ElfZ}Odo(ac*sz5;nhYu6P>9bM7$Du81-<)&5cZewd+H{+x z^VZfAe-`Zctf(Bgf(4q4`Gkb!#P2IIu?Cwh?LW}x2}!zlyV!o`?^0vYp0V1a81MQ= zV?H4<3rEIRZIEZlJA4?Y0{=CuFgS!@048ds30%e#ArzU{tZU8!#M6wy-6sBV-tZEI;uuT!jcTA%f%>&j{AX zL@u|OI8CL;sidu);7_S55&BT=c=a-LLF5K0to>zWT9z!BWc1C(^DN}M5jb6&mv%Ao ziTEtUJ=bMi!7B=Q(B_Fq%MlN6{O$)}*kZP~mz@qW?dr9=>+THLc>YW&xN&k20jO@^ z0jQGV;#*QesHko*$Xq1I#5Y3KEKm<58f30Tu0pozf0+K{?FO%$)pM$=dSSx|dcGUHlW z7()*%Zu*IPCW>VDc_TEzYakv~v$X?5Q}xB42wApDJ)G&7(C=5r==Qv5qidokrQTWy zjoc=_Gz05NHx3+j*qJ^lzF4(Su1yB3;jb%!33s3B9(2apYcHfm!hBe4GpFx4wN34lG?Wc?3R3jh2hEWvi< zDtjIS*=sa#?B{K{a94no3a{cN3wPZ+yUmmL0;W$&oJnMILSB!9Yhb zhau3wH%4J7W#iofvput0$kq8XcQFZS^+H#r;v1SPGq)0xO%!hSF^KR)fSVq!GtSHl zQ&%MEbePH^MR3#o==)s3jVyp{$fZNZmAH1Seg^s_3hg9JRw;c`aGdZVCL3}2@(&ib zMM9O}MhK#Z5AyjiVsqgVQQF71D?4d5{+7rVM5rL_mn}LtL*B)913p6N`L@n#D zh^OVGoX}9CUg+byzTMte$$mz>DkGmdr+z@Oo^>Z!%97k}va5WRUz!PmMvQm@OS;20zBv1r}D4x1o?uWE;V}w$dT;pnSKq7QrKg3HWaFQjdXY@!c)4n8N z4i_7KtuWB#o!#?c3@s-#6fQ1E@KULfZ3Rm|2W}T|r+H1uLHJjTwF~EBc5l$)OYJuo zhzj+B_X2$vA4>>rz?9>*B}U-q)<(dXH-`GXD^_a>?+wHxH<>YWbgX!gD z-89knf_=Li#?4?dhZ#?2FO$(MlXJ~!C6w!ubLPcvzS=g7fBSotvD_2C@l(Nr{Qk%k zmU9zsUN8K<^%iv85;EBTOx7+Nmm5_EA0@i)TE4?jH|L90DK|&}3$^_Qj+QLJ2}UA^ z7G(0^eI_KltIL@=6ia=hiLkD_IZ#0P6G>nD2(ye8q5HF@7W|KMfpe|8*&IU8-8`+k z@wECRJA4c1p6l|j|1YhR~_*_XTIS-sUwc=!n^F+q6@wiDX^iHVE|ocyN-Q#n@| zGAox|`-0D0Or}4GW>Ey{T%Ai7qfWAeHndoz2EXW($lRB96T1rlpX+1-S-Jxqezlbc z9z<%Q2jW2g2p>4vEa@1`({(`mZ7whz2D>Fa4~{dIJs>}r5rzzma2X9BF?+{AYh~D} z1sB3iH?u(GJjYO+56kA@SM{+k^E)2-(@XDy&W5*!XJPgR$BlFh`Wv@yBlY` zd>w5S{}@7nfu0!TD_zoY0c7ZzYpb0oQV(7owIBUC6n|7-6A^jShMk@QC0j*GNJ8*NNhFj_e6~6LBNRGpjytWWP3T7U7$MNPPB|ptdu}8Ni6g}OK@41n&ecLtsG=@$;UDiafU^-Ntn4M8A zYGNg(b+lFK8d2F_=1gD5B_vX_S6HjJ~Nq*>PtmX>rnVA&OI@cc`bI+TvE86 z`o|c-9bD~3FtkoD$%>VGcEuFf$!&hF}ZWw zvK$^rs&$rM{>k0;nF72*#(7UyV?Q;d9*w1Uif7MG-eUs0NP& zSeGkp@N28bD3W|EHC2FMo_%RXTyoO=)0sL=UN){!6>hi3B|zZd4WG?q7%JM9Rc>(kZ9+w2k}*6C69JA`(tIEdfT2Q}@rMg8Y>}*q)3*^vl-Ok?;}vR^{Pn zjy--i6LpEIOF?_fbCv9IY}fO$sjAH?rVf4n7E``dOU0dSomT?S5G0g$I3rS;Ei9+; zz<@Ox*E8+Lp#_!wy2^cA87)4G+xkf}UdT_0C)Gi8d{__%e1b^Hn%i5<&!g0#14Brm zifxG;M(3Te?K^1YDMcrTe$aQ)9pKspnSMsD6@M7Mw&V<>l3qRR^6LOTS5Hz%F95iJ zZIwbLSK@7+e=Iqy$rRzqhZF<*ie*>d{!cpOCk)6nV@cfso|yg7zK05X9cP3{Djk?J zE^;CbzX)rsqZBfwa>C0G{H;`(9l9U~-KK!}=tTX=LCF;)BC4u7Kk2KWXv2BK5Rx)s6+x)PE z6CYrSAVawNR83J*VVQTu0|yPq7%{tR+Fx%h-8-dJq;TT`xbLa23z-C^E=vXc8UU0q zZpX?z#b89wytWFI9}#DmdrqEIFz^--3j5UT&kWgy3X^)#Tv^$>C+6q!V;mTRz-C8t zBYErK*{AuDl-}}wqLM`rBsyr1W4;h)LV_D2DSy!8>TyNe#jK{SptkUPXVxsR&BuE* zC%Qj_Nn5d~V~#kRms*W6!eOxq_yIzIq|~GdEId zK7DcUNQZU-)OhLaM!Y)Tewyi*+8r}YeJVPU&rs9xP$eCHM_|=oQPPXnB3Nx_dKu&% zU3SR5KN8H2y9waDXNF#rT4FHHLLivF%RNDbAxVQu zPlYw;G|FYt$E1`W38PI=tfn&poqVWMm5X&YJo~iU3WlQSZoqNJe*FW7U3;fN4PdD2 znJ>o;7-sUGE?=0w?LZlCcR%JcGIAGc@*3$JE}&Gl4_-0PV?rRs*LuEdfLqUUzan93qUTC@EP51-qRSRdK+XNm#& z;O9K5mL@Kxw2pK=D+DX?K`0J zXLCf(Y69H{w|qAlXDj8wS_%xb#bKZMOBD>1d7W%l$%9-;xOol?mxQmP(`ImRzoV3qlxEduobeu>}lTn zETG6vPTrQt;3A~=ke~x_>G(}4ZtCD4{G9Rs#?O`IBtH(@6I&r~W(1_DI4o+KZdXlh znk^pKI%j1!Bxay;f1matM0=clALsr8i>Pt`I)p7XiBcT-Nb#^jV@~W#LVxX&UXz_9 zR8EY1i2Qo>Cr?#c{r=`Z3in6P#hrPN~kgMUea9;_tRbifoDwommj8uiCCq?HX!qn000 z4XqV-m9M;~R5ody=F>zfN5yb^AsRM!dVIP+9#>)@AsWN(0q?=pZ=00^7wE<;mBT_| zJ0^>{v*-R&9r+FKr)z}}R^!Z9qk4_`q&5=^tHD|Y->Tx+s+y57vzSR^uB)OAnY979 z>>Hz5EGEpW_V#9!0gQIvw~dYxbzt(_85rM-(^wO%HaR|sfyv~HanQ`+`VgFtnz84| zKq+_-*Kz%YIgs&Qq<=N6xe~B;@##bZTm)VgQZ*kL7BawJfNpm5GWd8<6QP&+D_LA48Bj1Jf|7$DrVCz$J!0NXj(yE|e?42F zfX*O1w(ZyE*`=?IS>$gq9*vEw1;3NW#6x>P3**-qB^ted!8;0npC)0>e}P&-viuz}y_K)vm3oi&*tg|I@CP7dKXF3D z82DZ>W`%FfYc6r`wzH!Q23ot;dkSXWow$%l(@*7lH>>@ba(KM&%>C zp5#u%U>gtcTc;pJaTt6HMgKj}M!satkY-qQH#>kK-sB%Je17fm06ytbqT-@x4u)|ss9t+ ze@LrVmjB9+E%!u!*D z*~NvC$d5B0bW7CbLd&$BFYx&Upu8R`;QAQE#a>mY-t{2;++7T?I*W{(kImWw|HYby zV8>G{JC$wmxn**bSY|oH*ij8s=^l^FK981chgxK!O2+VHpevcif1{$1Sb{wF6x`gc zQI$>_rnZ?om_hMuz9~%@;XAW1Me0A4BX>m^9 zeh$SD5SLKmadZ6vj}`E(0yhcZlX$xp4B@chY8A=kG|4}J#_E!6L2GUmJiRCadzn&@ z-&7WnzCe9_((nm*7z)WfwtUn_9)SRjS&l3nHJWPARCI?D zo}jDnXcJj^DY;aefdB&dew#xd^Gg3~eeZNkVP#8BqDv>AwOn+Bx$kJHn(3PS^r>+(p7kS# z`I$`yr*YE~OJcOp-&X@i+3pY8|6h8|by!DbUF4HX#s9(0*NuyP1ZZm__rs8ykBZN$AuRty&GCmbJy?~>G?ecVkcs_%EuCVjAsj3XLu+Lo)4 zay77txlkPyqQ|E~tiDwL(eXbR5cf2;gN)!vU{n;Mk&840377hUc1Sr-HkWeU zEmjbE`c(|WOsa$6W5qXe{^z|1Lki2lF(oZkmGGyd&jzwjta0|y7|77<@kq%sq$DF@ zCUgbug-hZ2M=CluVVxvJeec0wB*z+G&g79;C=B#&chxU5^#gvSN#h$k;9oHj(uck` zClp+8w zaxk@;}SeN zboC^=9a8whaPK;@FPEx?&)Sf-he(N*Y?z0!F6~M0lsGj|!Z5ei~03K1Aff_i=2qGRlB~ z+P|WdE%f{a#leozWlDr{gp+{fYQh11Q$4Xf$m3lx3&$e%iXpcyTdqC&XP7qzJ0cDz+|o;%=p>{ldyuGBgDF6|rhF9kpp*4N@N$7ymz>*R9o zTtzS^hI;&cb5{pVzpKyQOo?WhLI3&3NM8AX#m4u*WG{5H&utbC8^~`*TQ}vj# zggrK`PBXhrqMy9_aTXf(k7R_5vMRxmImhs%bxa(4a?5EF*?IYfxvF=@cGHV@p%;Fu0o|#!aEUQ>I#a-+GD*%e;x3>A^#pMIwg+cchZ0j?#<#; z%$pnZ87TuX-L_`b&T#H_P&zbt#tIZaK(k3wO8Jxb_;#|ow!O|HF#HCx$W2Y5vaJX# z)b<;|s6v#_d7=MJz2zB)H1YHP17BE~*oJxl_^O3HFWkCn4psd08dv8sqF=K5`uPb_ zQcNSS2MHN9@^Fo#kzEXx`6><9-xYSzP_PUQE}*P|ufS?wOYKlCeC7JsMVD;E&a6XJq8nOQrxnI(Gq-5hP4|yExo`?yK+>*HG0K=8iLiPFiLcN^!bp4NRw#g zgcsbFk+%0;gARd1cjDLJ`eiPQtR>kZL~F4|sK^i{$-LmbGgnT3&nc{UWvkU*Cmw7w zkP@}7*HyIvP>7p-n0XJ3#`Pb_ZBU3)Q$)7~1uv1}AAQ>2QeCq>`DypZD`8(6y^2cx zA7AXz6MGW;s!N;6TKR3RbSq?cG+fjH%oWLlZ&6x_a_t|NXo&I(2h*1EeW~GzkX*jF zS)kC#sHAgf&;||+;Js57utzsuTxQj>EdQ-L4W`=uUk@)o{{=}n@h|D6JhN8%`~Q$$ z!;bPRKY;t7Qzy4Nc57VHYW7Haype12#RfgS5VxlOKOIhF z77uWxb&tQ~VSt%sJS^6^ZFiCZr{I~?Vx0{h)N&3g6m%uV{T~+=lzO&~-GhR?ZBAf4 zLs-FmgKxIBw`T7XcgBj;yQIiScdWO#6BKH0)v|b|?9&4e-^Y?jveSwcTW2j({V3*$ zuYsh5zy;L@nh=fns@ysNcrzPqzvs-P2>bu*_}OfBC^&9^#J)pGQgzFzXu-uz zA1;KzXCFR<#~R-W8>@k9U;d)^!XDaVKKIuaE)|_Qyy6kxhx{Qe)nd1f64(+^GJ91U zI5~mYKsIp;E|gOlGlf^H#&6R<8#qhXLivTsNEbRe1$R2jTm4-PNJ+rSAxSK!l>Wpi zRKI^{BI_hKWJzz9j9+lL@-i0)ks2FX;2$}Xm~i8mHj+m`eI|@Pfo<$EayCN=8l*Sv zM2GE9vfS!rAk%A)Owqpj{ABIHgk6>x#dz6uXUeW4FkdiGIfW7lfwjrN3i!{$+3JQ zkFS@95!U-*&T*oCr8}AY^e{y3?O#6ncq41J3c$5DP6y8lU2+GWm~*JsmCFqM{La#! znd7+|c2$+Qr4c$5|6-NmRSf0GzLC$be=9(FW=E|&KLBXFvq zKbnba=^`fUmYPlAmN<{4UP-Aq|Gi+vfG}8VXa{vOT0&#_G=8C<6pW++^tp$jw(EN# zZ0eo*itPL+XB)D!L>>`U`W^D?js9o%?~gz57w3IQP%feSn)VhbE=g8>9~90Oy;3E10;LRUA91 zQc_ERCSCjYe#Eo)&Y~Gkd`N&<%Rw?fv~Fk-vaGR{;H;5)byV&sesT|lnOnKGucddz zw0jXfdAxFHU_5uP)DJ(Y5Sk3)hvi*<@7@{4?21uKsz?l1^1bqL={PJrUrtIgVqsFIq!_jYaMEUH0xGZ4Ymbpj(-`1kd4=i@#-s zZf`^oEBIxtgm+VkPp+IRXYCEO4pr^`Ojth30mW0HHfT@fME%X4ym)|&hCT2SeZyYw zYk`oz4i1iI&~->AZDtb3Cmu9@p{ zgDyXoZQScf8|^(9Ux#gqdz|aF${{kuEf`-K;aP~<)97xL=g>kR6`D+`^pmu?cv3Cg z8d%x}#L7j-yT?QS*73LF0KQwk(W6N) z?92HEE?AL1VwXCRtwD^jL9>lE5ttLiAAW>-xAA{-I>ef|;%Gd2sNZQ&eF1Yz!`-@V zVp>)YnQI;M-c_mBTAGsw5LQWkmcnTQbl%FpS9iz<#l`&e6D;WPDI>o4l9(;IBVsye zO;6i1pc8sp(-k}27GQlnbr;CouWGw^6Af;tJD_)ARK8G*#MGaqW*uqW&h!v+u$-DH z703kkY%yn1-azHd_w=Z&eL-?qga8Wl!J3ATL4RpqfC&U>U;Qt~5B*wTpro|8kguWu z3Bz6}h!^u84wziUoeBe7hIsIrIS05(atV?C;6)4qGtXf-oEq^JyV5!lh!}By z-4a>oWC{1>M(tlcwBr;RO{2*yixPY<39rZNm*?74IY?^@d<1Ia#^Dv0x4opel)HH4 z7JcfR-nHJ%th>7c4geWocO#2eDo4t-rJwWvQ1+HlQNGdJC?z>GNQ0Ep4Ba6iU4o)? zDJ9+ALwAXEgVNI7Dcv1IcMM(U;dkEud+O8q3anX+dG34fYhSS+m^dc6T-TV*On}xD z5xO?JAN9=gGTqTu>u#20TH$L9bV`}+WBTP!rJG%2h#qhC!c^i^BqC@jA0~kPJR&#e zIm~QO<1a$q+CVQZa|H{V_+x?^%*~TK_oHJr$^A-o7 z1h9r9)&@!d001KdFfSQ^17LwIQ|>KFWw((`sHcK|#nOtyG0d|oCOkRHxTM_9pur@L zuRAg;8|+#yZfcCAm$QQ@6}083Dm!R#8ip2vOVO{@z(dPcg_s!u7ZhmS((+@ZDIvKD z8Jw4F$~%Gp*&5GIRFwj;F1 zGj*9W1cda8KN^x-etKtc`m?eIMMYOQ);bTCje1qoeCC|ng{-`r$;e1 zhd_gFy&%F$`j0^@cKNY+5$*X>TUSy7Y!3i>ah=zA-IzTyoc|mXk$hVEk6QJya^Cm1 zZ&-!o$dG2$Eim)U=Fl`TqNFT87|4rnQor7Agp&=qu4(o9q=oO}CMg!nzogg6R!W0r zCzd9qFHC2xz^NntjIuygUyeq$ArbkxfZ1faM7>ViT3V7zhBkH5S*lHrIEIHjD8H$~ zY1Q4T`3@E2HecDA2;H(W*q41i8o+2vVZOWtr!ccv7CGcLHdC5+v3EFQp7G@) zH0%$%z-LKq!~nhWmzZD!o})@p>AASc3vG_zN4?r_6q_u(Rk0QW5Zo(an`zU2)KGpH zZ+4Zl0N@&<7?{MJHYUsTCY`{G2KYCWA9v@I*~kKPEZsZu+FsOmWj;tFzXQ}nu*bnS zkcbX`{wIt2^sgIV{>~p6&57WSGm$?0=_Ouy!5*%one*Ue0xG&AUNl^2|jp<{4~M_2YM@+D5xu1ox|LLEHmB+A0(^R7a-# zei+ZR-!(M#uQ7Qy0!72bzlrjRM6-!6s|D#3A)**9A`fQmjXPC zyKi~=0tzJW8wks;J3C%Wnw(P{(>=BzwN*`i`Uc)Egx*h*{I&-UVkS`4UG=G7@3H<@B*R&IcFJrHjT_z}62^cj zI#BQ81~j{bOMq#>@ym7Kr~k-tfCQ?#diXLZ*jlOC9+O`{w-KS%uG+0+K88%EH@N?z zND*+?eW<1Z{x2BpYJZLYBgA$7J+A&0%PpGLQV%hhMj=72Yu9lLrO?)c)g8MoW*5yy zV2=Q!hQk6D5o7pmX)sei8*iR;H&0Hy3)`b%*q8ZgT4~Kgbe0(P1)+`-rISuYw0!lLa1sZosxi57*7t7C2?J=+3_56N& z7TE$^dO@LB!(_l=VN5B>f&RbIt}Fk!BY<|#x2x-9x_79R7s5}zb88&+w0_g1;o!ka z@rvIwjA{#7(jgcRjx}}DjmF7pCec|JmXwGn5BaY3nc@4RPVc$Szw?i??B1tf>DQzT z3s$T;lGx?p9Q+=jy8`UqjJQ%)*rR@!;1iBWl@-fqi$h_W2}+d@8y=w+e##D+ll5Rt zl}{-NQ5EO>M|deJ#65K>-MhoB2*%rMo8PGas(xB$OuZ>3 z9BgPIZ);7Y(V0$a(P0BJFl04}nEj+4Tygfmd5~k5lv8o>qduO6V_k~;sa*%koe^ee z`n1S!DgJlZ&uQ|w-TmIIdm8p5Plg1P(e486arF)&Q=9e+EZyyUq z#?$~XoE5_jj1v?1M>cH(?7ge{UztfCj`kan5b0~@Z^m7C*ZvHnfSsgxtwlY4oBeh6 zz@_x`@=85wI32+-HG;KAI3FzjImPpZEyNw&m?**j5`F?t{Pf$aKTNPguAa)kVtZb8 z7>f0&`28u~uNrjdcJTq%WT~%6y**|fUBUE5C>z=yLmq~VMUhzx=XHp*H+j}0s1ZoL zm)XCl1+WetZ(?D_bBonPme?YZ?kWck8k@tij?oMw86m|f$>UDf;s_9iUnTWdGiAmB zX!iZaib8#Aj@iF$VjrgwdzYOYMGLHAK$er+i=WQKuES<8puzT ztN~A;futFB0QxoyKjUYf(El39^n56&31}cB7sO#|FAXGs1n@O>cEuK||7VbB5up*q zwu@_5b$d!>cs#ZBM!|0?0jvJ*E7O@uF)b6`ChR#VUW3$pYCNlFML5Yqt><8 zVPW^+v1!mzs7m-&9VhNKKcN!a+V$9PCiGMmFt({-R7qi8w`Mo816%od z?cKWD#P(x=o^&_3Pp~|5Tlx_OmTJcdD$#6LC7?ulO?DpZOReHSf&OPv-@T+|{Xd%Y zW{_-I51`1U4GgwR8oKPZ)7D$%MRp2KiY=+06ssH34AP#rp4nFk!`(uD#xc;n!QAWdK5nsW! zq690zK8}&|Be^uWMQ7RLr?q6{N?4HhklQ5KE(95q(O@^^xLOLawRTS!Os5q6-g<(7 zJeiZq>qiPunyf?HUrJLe@AXH=?8e6FFWTo8NbdTW#jMzh1Hu?*c3e_ZL=cFH$!Hd$ z;V>JH%%nmH#6Gu*@fB!$fv zOV9sli;m7OfxbZeuNLw&Bg8qw%{gFTJp8~GQl2eG>p)q zkvu9#6_PsY`h~!|`stPD+3>-WQFYku5z!QbIF!^Pz2o?)v&q49Y3a9DBs?_R+Dtg7Z^XI%+#Hxxceo#F7xZ zZ>#IY{Y&n}N{h;s$&_bj3+^&^*btw$_S8Nld~M?y{3GeJ<&hhf>%TNdzEII>yd(9b zaNZmrC5aKPWEW&oCidUb5nLE5n4Jt^-;$_Pm)Hq~rG(~rg*Hv@V)>IO| zvuVN(Wuo)iNh8iKy^a>dr^?HKua5)xv|Du{8i zvZ4n&4qv}r`+4>#6(6uwQ-9y{$x)HV=!+iHapR_$8ZZym3Y)cXJ}K`Cg6aD316o7l z!9w0_oH3BzUM7}7n-<0NAEmYHJMan!lAf%R0}8X-!^e_y8h2C)e6Jyy4v9Uw=i*gd zWcU;8A0lW|k1r0jHi;TXq4}Hvi8o9AJF>_VI+q?XP5a(81WpxcWFOpxVW525!O?Mo zRefRg7~fz1kWMqa#NziaY?1%*gq}Ju%jh|H1q*&|R}EguBdtWa$pOZi{V%BbFLbT^ z38c>Ye>&`G#!yBTKw|)=)!n_|QOPtqaJA`K53IYM{1IZI-~_Jj9E&k43|iqZAf%Sr z*v{g0$In(DvP8ug3MYE1o_3#FBPyM#i})G%^$=~z;!1yN7So~rgxSE-7Q zn$WBtr|f=Z6%4ja*yTDkULF}e8=OG7)IaKb!%UA|mwx%vZ2K*^|2=i(aOir@U4d2} zof$OQNymHiKur3Z72{pr_WIRds#z!QIIOU46Zw_z*crE**mGL-84t)hoX^f$dM0eV zge7o@k`p@^1rMl&%I|#YVp~@lh@bUfF4XK^OmK|WL-GP7gc`Z`pQ_j0e{-E{9k6+Q zPM*!JTnT8-&3p^VE&oEvltlR!<8jG{2roJ_n$Meqqt%f1d&w<^k$KdokCa72bW@d$>ivEoxic9hQ*YPHO%tE9 zHHSL4ne6&tAJoQPiaarJ_R82}w7IDQ(2S40oJv)%lbN@(d@@bMrlVV${Csl|e{u?w zweg$&R+}X;2!T)k5RD>WZpH4_D{r~KeA5F3(ipqc?eDN>J#BKvH8nY{;3Z3Tj<$q) z;!Hu5B2GgH*^MFwAyyl9*6bzXJkktd4htMCe3%#om;`Hh7#DaJAWr&v@|%vs>@SU# zF=f(&s6WiJYm29xadf+?y%`@amHm;OlZ|}LS%C})IM0SDDt#_GO04uKb5p@5HOZrB9FHzZ8zZ$mwVo0hY6 zCy{ZL|288g_zfb$zchMZ$xc_z7v5C(fAgkefD`YdI-XrGAiHi9aGN3Gu`BJ7ck_(` zX!DmgtyU}mD&5^ZzS$a?GwjbF*mdc;pn4?hg>_Hyn_MNbbE2VVUl2e=NQLuKiW6mH zLIxcn(tozRAfH`Tk_%CyJx3dt3JMZ3G_w-1$@$E@1#2g9A;{EGX)f3ZaWw|os);JZx5%uk-^=9b+601ejQi<^OM8!pg%ALH_j>U`PRZCZ6+q@ zaw`l5U+Dz;Zv}bCSoE{zm3wvS4o%NCs%g*r{^Mv9 zmw&z`C|LQRAZ?CIZuUmk{p)a_4wpK_5>pD9M`P(Z9Ybtt1gRU~I@LK*e9QrQ)( z21S81q|3K3PA#nA$={Pp|B#lvZaHk{jCwv=y$nNNwtr0dI{uhfKc4k=ZPR$T%K3^Q z4n_AiKij+~JKL(ee_S}js%v>{Ch4sGBl;{7Hsn%kk&Ets1n+LX3P#^^a=@8A#I8bV zdY4~rDr~@G5c0fz+n82v{!8SNU-c5+S%dX}#I#6{1?opVz!j5f%Op)A50fUDppH70 z@>z$5$Jbv&p%GD)qC)!b2aoBKNSZkFOhr^VJmJIc(*20<#*@;YIDYmHtvT)RAI#$x ztt6oMAH2xjvzaZ$FD{I|N80OBfSJ6PtpWTOd>>x?7m^GjFT|ufU$awqveJVs#5x0* zxK|wJ)n}LuiVB4(C>~D*LiC*-j0}pl*Eq=+PT%F3z61RKBUCrpyzq+AY(rxqN#DHE zOy9>6eWhaPZlc)>tLCM9gGw~R?veF5Z%8@TVQNt>$WE0-6hbI5 zW$n-|35TApR2&M1%e_8k`icA;sAHy2?->^bWUbIP(>u#CIkB=S204d zBg{A$&Wv%kd*3FdBuRMGw>G;Y5(>-v;cj>%pr`c!S2gL03*kM~3VZgnE9Z~?dm7ZY z9AQqojUnRF;>huPpf^0a4KqHNf|&-y0q)*|ktDAL4(yDdn_|}AZ!!0LsTXF>XFnEx zW*ph*;$dHlcPcjc6Z3Gt%gonim(p^8p0}6&RT(GV_Q<(c! z>wFp3TSNAmt>9kI=9;l8+jpN^qdUkl4ziG^SxAK|-1afQ?5DvuF|S~&LW2iB%Xwa-OuPYGdY5`S-`LVGr_$asOK#aO z8}e?%yo**W(?)7~9hu@4+ju^8#&7-6Cl>qR#`cq_o>n#Cz!{dXI~2`t zI(-EQ95g=HIDKh@;y|_w)}GnYSz)!WKwDHL-BeF42o8+|dHmA6J+dcu$EZ`X$uR7fQi za`O$RU8HYZFRdHj+CzgKAkf2xF2HTEH=Z$HTirc&E@B*`?!akec#@+0iJkh)m(Y(I z`R4Xl@8Zws#Ndn^s;@;wnbaws7|b<2{9vwobbo$iw2*+46QfIdza~U`Sp!+2-e2n_ z12V@JT2Up%Bb_U%1wj*tEA<2f%1vmOWjg$@t-{+c2P1Z`IbHT7{~XG_$`K zU-^2RDjBu2rwH#zN@R=sA;_a3&xJGZpcpCN;2`c1DhU zu9r4|=9;c2e?p-J^pDgj%*^LmTddFTTtp%>1e_;>;=Xo7X5J9#DY=u$<{hLL*8^St zq+&QwcS3xn*Sf|>EOg57W94sH62U#KG%?Mt?5y3hHeXgnccJk^R!aSk4x6A6l+{Kw zk1&_9IFmLy12eYP6h6pHpw^x#c1>+XS| zQCic&=Nq9SWu9`j$sP$nHYb}E-1;*?1sH83pgMreC{0fBf57b|PbG54E?c0Jxp z6YUq1#J7*tcG^Fj1tsPzis?CXBk$yeJs6*OOAf^z{jbbR>j7d}LOYI+Bz^ZS;%lrX zOl*BV6;B_#gd8H#WtR3|f1@c@j;l;Yy%fhL?plbK_(*&nLa&xtBX&1}ksxeoV(980 zOmY)wZdsqcQ_Yul3@4`xV*z0*oP|XMNPW%#G$_8;NEy4OlG3u4aQ$8eyQiTq5{3wg z%3Pu<(e$=iy*$~PYiJ95lVykmZyuX!o&9YV>(dmp?_ESMBNsB+Z~Z4D<`w-|8*y!P zVon|W^9W>&$eCPFesHtc^m{WA18IYP1qIIYbWN)xtrFH-8#9WmYV8?Bb*@qRFJ?44 zW&C#;S@f!V8PV!4;#g>)GmaTWF#?K zqiZ*jP4wx=bKj8TfgM@znT4q-r07E2ts2ZPpZZ6QKcT+^RMGy0zxgkoxR=>AnF!!t zrxK*nH~@OKo)L4w_vWGN8NmPC$sd|uIM)Y)>s`1Wfe=~~)pKqhRmW_x+_D>H7+I1W zwhb!k_*Wc3rM;Nwe_)SXcE29&&*G5{EMSh64Nc|9tyZ-@3bb)?w_!NsXnwwgB#@BJ z@vyAQA#J0Z+uq}sx(kem{?x$mon`7IdW^%&YaW9laaio|P-uES>$~1|Rl@-`=+^uR zn`?%6u4D7xIKS*VxsL~#v`9)h^gVRo?y>Qs9W!j96ORjIM8OTaND6)m%?wW>mvE2O z`iy;Ne6W;4oLV3?8mKbWTJ*vjbjbCw+VaG>Cn@@LFwO^cwt~JSQy(VxT=S0T@ccYS zt34yiTSm-}I1IdLYY$^&^{n?in~N0A+8jb`-KU9pChIlmS83v^!5@JmSPgVvNzBlgOfj%{StOjgj0Cay0?X9% zzq*PeNH#lM80%*RX8oFsCXKj=roz0iH>u0uOKi>k``G*z$a**~Jm$tXkn=uVAZr<^ z>uui1)wWzrp^%~NG9H4#u=zU?0)a6xnrYjx87@QFq+Q@MtuA{FMz;zh_C+Y#B~}CN~pjvhDZScKVN+jIaK+p+1;y+!Fy4{8W8Tc z{O+Lw12aps$W`T8h{~!nUfJyi8_=HC(^bD2#qMPtbmthG32?qb4;ma2DV>#XkMR}Q zCEv&{%H&va-_&f5YN;V}U!eaj7Vi3n-H-*DK3#4oj()Prgx5cK_ZyFwiZdDUM0Dl% zaMC$x`E*DRby-#*y5WjX#!VHgyC9mTJQ5S@d8%S}f+;Jo8{P4#Z!r@9HC0M@eMyc064_i_~ibE z0RMud9BGv3&EAZ*#_+JORn7gH#zhv=JBV~H1SzkV2r&N=4ClkW(Z^m+R5L+u0wZ$b z9Mxt;<1YB5Qq|Y|FT4IM0!8Z4<4-2M%+BrOEB5yHL&-ec(?-*^Dry>PzEj;SY1~_V zIq7haL3AlmaAyn>r2ctT|K`7C0q+$j8>KW0(H0R^1yq?^g&OSHae-f?w2t92d-8Ot2k*t6AIq1eSe7+Horo%Y( zLxNOIZrH7=L?2XSE?VAPou|864LFbM%Oug=?*(9}DXgY$b4Mo$HTfrrKmqUYl+?R( zPTK#4ZY(KViwNAE8pyVvg`Gld?D4()1-O_s9+enG^TrW4l)H_F%@ecuOHk# z>C)L$@^+c_mK6xJ+z6-5bZ%}wKJ!?M7gB}LT6jHiuKewC%N3Sd*u;PLWwTqU{qV*( zX0y^*trh!xKSzT8J2mzfOk$(c6u<1(F7TfTM9^%)#dgi8XM++Mm4h+3AZ%|^jVs>z zP?M(av)cIlh@jxQ*HIpd!{qR#Mz(Bni0s&rY7M@em{_mvHQFroz!}-68M>DsA=bj? z&cp6(wbRUP zZA99H+x=}IatM4Q(mAG1_3Wp&f5}G!YH8aS@T^_u$xam;Nx9(q zN9oZx_k47*lM6BUsh~1O141*{g^I;_aqwRgmr_V7KVNU;BMF&f$MN`BK3Neeg}loV zX(M}$B&Mz{7mHz$8pHMYzB?a8V-}+K%OQ~3y<#>66?5Y!^}RL&T}yCO-QF?g&+7A0 zVO=IhY+_2=$tr&gnN|Oms3#iWC2>;KIe*dM;nM|HKta@lr)MQJprHPS*B=*OgS&?~ z&(C(Pi~FATqgB=Z#wZV`2LOk#OhS3%5G&e|#@SfM0)!WjhejGkR1p*2PVF7r_gn(2 z8()9#lw)Wp$J4~~ii}vRVGEAZO*_2V?wZhn zLBhb^AldtV^_cCwlXze@Jl&*zG5~IPR#SbAd#^9zF_+9Sh!-jjZ~%%Y-AvH#3zZ^y zT4N;AODU!A+r-n4@~ zyjWE)s2Otz^y0GqVATo6eV>&3^_4MNb4Hc^Wv(!e;>(@*xpJrrNWuHM&s4=OuRs(7 zlD}6@;a1-OE-KsL!NB$xRnSkJRx1BL@6-=7vph0$K3)RyPNVCXtSD8OB;UT?(RT*IaGoTI9CvT#v4<2UO6T#oxIMe1xLn6Pj$@0eK)%`h(ob_pQqoFZV=h6=q( zBSzXlsqLlJ9x;>FVI6dvP2*N$q_(W_Qd-jAkyB^uKEogB9W13XzKl{))2XCNVf3<_ zIke;`8a2zl3ytWhwUOQfNgtE_Vs zqIA9ZzK#I^z&H~XF0hpOM1{c3K_eL5eUBww z!GM3{agp0P6RD+z{?>AdLiS$<8X3GKr(->cY6bUxGd%RW==Kuk&*cg{<5@H8Ngbt!Jlm}V+=R@r#Ks*WRp^nqoIj(UY( zcGW)e()o>%YcuOlQ6?0=41xS0d=;W@DdIM6`k0^0p)2fX zcZ0!?7_5y%W$j~Qn_qYFeeiUB`bgSwRu7yA0g+Pdh}cp>tB2I2++#3@tKi?hIW~Ek zJI`SJJ9Jf9M2H!hu)MCojQfJ~bmqA@_=Q|CaR2M#1YAOwN1wbELa-wpcCmXGqNg#S zaCcEK;Um19e*mH2B>vCp4P4G*YDx&;%{^RWP-h=`F9_DqtR+FwT=h?gKmt5Qs4BKz z2Any_DSxo@o=MV-u>X9Zy>l@%xbA)07GXX+GqQK|}>?iJ^wSTGbr^yYAD(Es-Z_kB%mUlao6efJIapk_FTs~qQk zgwv|y%p-AHX@^R){-mlLG`kL)6E1zgBYav_DHU;9||FLv<5LDzj{!0%6gmEGHUOz?Eva@R%cDK3R-7zoofa3{9O z3RWS6wV?>aRZSbaHq{rnr4klz7_+!q5h}7c3|d| zD|hm|Kh|tI-QTc+h<}zRKYpIKLs;NMzf_d*%YGY8q|)4mdx=E#coR5YE&SzU7L)OF zzO?q~`fr3vAK09Zg&2h9n7^lCZE-o@H8JT%z5rFYE|YIL#+-dp*I+mEHxsL{|ex;3Y{J93>XycA@=9ZQwZe*;HVO)(y`D z=Vt`SFUG+iT#r9X8j4ZLQlr$tZm4c4l_utIFaL9ExBWS)&z8||^W zRZcr%zVV2ZTBaKT@Z#5;@0{G-#X<^e(te9mIJ9FxfeuTP1Kb)lJ0D-DcPfRieSBB{ z@8Pohe_6-ITltMzX~kh~eP-V-fU#F3Y~^|SGouwMHzCCb|07)A%{QTaM0eiXb~(L;%#Lqb z5rloXN>xg2RcK*#=Qo@CJw&Td4Y?z7Tofnre z_Z z9C3G~-{IBISHAQf#A>s1$VVQPmTh}Q;{RF&|5unxmu@wN(!C4PFvM0Z!D+iZhTB@y zqK;Ma?2pUWkwYbQn|96}M+Au30KJ!7AhEZ3hmZPexeZbvj{Z6&ax7(>#6VW7V@;Ks z_0wm)M@Fw#)h!ypBCfnT!B!sjl%9`;qon>9JCPRZ?}0ng(ldQ?Il1uBR5MKw>*B3B z`|rh%T8nFdpF}q@{r*pcg$E1kw8Zl-VI=I2zj!%Q4Gi?Vsd5d)3xJxQbLnw**q0hO z(}8piE`sU4Cy{QNIOLD@%~oiF0}+z{?mWqOly7GawQ~j?BrCu98%ZPd2`X;R8kG_g zY^j_{3?{7^dbtfz@RCniF|dr2EkWr=V9|=BLbnwwB4{sGzuA#$*L)5_*waFFOV1%n zSeIVLD)cyg<#KigA&R)A$`C?R)+XmY(Kb)`Du7?sj&tw$ede246iHxxJrb_k%m-Z2 zCIq|F+p#~A<{ZcJu+UFo(t6AEx>ShumPQ(u%!;u%jwq0#zic0-b z!ta@QE)$Dr-pEWA49NNV9x15|($q7&XVKp_ckZI5!926)h%^!|Nq0jGRzl4Ah5B#3 zd&fxG*&qLqgO|Jhpr`dAOZ*TvRL9Rf&Zz|xM4c~wwC!`#GD&-xP{Wwb8>%q$(qoYv#bUD~A( z|6gR1Z`+E)N$jduPl#sLMO;KOjw}1^V=nRDkRH3g2D$oteG_Tt;phNM1*0~f?{IoW z92X!!&YuTx&G{o%&kqywfLfzGi`>4PJZjFjF#P)jYlF(hD^e%y=S|(8D62aBs9uMQ zTz%BB?Sj9BI7_LM*4kyK6E1VwL(cwwd6HX~u=KM02os|1h|w;RzmW0E!PsQaCqmZp z+UO+BrsMl~aCi(}{NONH9-+L!H3-`+*X_sltE;f>-(RNosUa)_3ZkG(?^6ZEEI z9sixg#Fh4K@U&)m-7otK44U5u3z2xM77Oeo%aWmSSY>LDK@xD))^Ec)kk{XH3cmO_ zG0R%7KUW!ZjNSS$QYY+~W#>8SI8_nPLE|DgfnQ}VU`EDtpit3Z`zp!%`t=g53oeD< z{qU8{D%+Fj>epxf?MP9SfcuET3vG<6B-PD&n+&4sFpS=3;#_;vkklT;Eul)Yiy;P< zWyUF43i5%gzHGkMk=Nya6wGC_V*jw%lD2bVSV;en;ZaHzjzmUjSmPu3tLn_JTh{;t#;j<@ky zUCzx{WGz&sV`YFZt7AO*_?jF>-aEc!tmFplaY}nZShg7=K8u9l%@gcDN5I5j!DVFV z@n7!Zbw(EIO8^-c97;`!km=t2iF0e-Hg-_AkC3)3d{urVJ zD_u2Mh1T?DMQlQx-i3{`JQ$z>){b{m6<WvXs(qs$w7Z4yi zh#zuKqE9429R_K_iNRy8wq!q{kU9`V@$M5onet+;>aTzI5pjffz*@CAfmz*pKb*}y8MvGc8# zoEO3EC|DmaKA8l{>uljsKQ$(W!|XN65i*(5?VRvwmR4Y8uWm|H#?hAU4R%L8gbkyvaWTYpcz2V@iFRHUwI>-?xiNB9S}`kP_U(71)5xzD#j3@5|bdLQp* z#XK`c1b7j=NlzE{gDYxmty16Wx;-odI(p7 zM!_chT~<_2H^_ID@+nksQ%P9ttVdU?TRt680jsDK+oDv@hrHx0>^NI}Q34njed+Ay zepIW+k9g&!p8OT{eb+$N<3rTp*Fq{RIQ;+VS@5*QTQSQHPRrNMl$p+Wrf%|K zN_#kP^;VWtvF|qi=3V~}+uBv3SmXwBP#<)Qi+ys@Fv4OyLPk*uepiao_Ee3oguTP# zHZrh6JaI;}&Z|?N`Y#ew$V86-*;7`eYL10n=nMto9py#eq?i;#hi3k0=_Rkb-po3$ zkEyv}ViMVgh;`S)*hTi;S2C)ul;ixtVPXv(lh~g7(|STqa!iY*p*D>!lO+c6zQ^8U z2pRbOF0=Ln=y%f7>=;GrPyaNGCj`ya*qoA^mbUDx1C_`-*^w_4#Dkf(jG|$wg}&Lc zqNrUaKRSQ}kLvK6s`Xt@zg!yYpQ!rukY(azQb}Am{8$_+752~MwhasjL~UQPeS(Eh zsMH!PvV^mQ$E>hVYobVq8{GzM#@Wpgw)4}&M5F%E?rXM>;p!6LVwNC)&W7Zo9uRDJ zY7@kws~{~&rza$nWgXSj?}%$RsqS7Y)V4-F&{&~;_-Z#C>XW;L2R)md%&e*0Q7Gf?K{=N1n$a&C6!yVm*&juk zn=VQo)&VhP2(za8N9ipn%}mO=nenut9OhoFyXkR2J3LL48^@kgRJuoS8AJ=3uR)ch zK!VUE^j>=n!y-B)0qKZUKOoJirR`AH=2qi!u@(hOu?0Q<%-FDSt1z97NO$NQTWVKE z4xQLy(eO7n%}ZVFPx<_E7XQzs7?lZ5|IMrlN^;#Kz$TQC)QK$2kWsP!wt@O@(>V~6 z{Le0c|2w!RA!fQgHrF`u!k}08SfxpcKrsaJ*pW(NU-G{iiFXUM zxBk~26YrP(IGU}}f#)!3y@lvUJ-c?+-?9sz{nx!qhQaH)_4A!EejLXdM3Vs_7Loj$ z*)vqL#=@A*7BeNHT7al?-ZUgcYqMB5WWRh>^76OK@Gy>;CowlittCXp9c*QX9JsMOtS}M);Gl!nfRW>Q#(66Yr;X%HQ|o?2H*{ zWn_yOFw77}PeIw06D#sII6B4ghZF7n`blQLnAC-9lJ{rAW^$C)8cMfnlEcn@rZxte{(qx#~9a0hr`AbG69VGf|~^u zHYW5yAZs>=HRJJ%`UAnz@Y4_nu!B-ya16L*y?K653UbFR3%-1_!Zb;R-xm)nu@L-G zUGc8nf7Nt3yj#x^Ag#E-4g+aud8umrTu&dq|Gefyum_Uq5*G` zl{eT8Jlioo-u){D%R>=sq^!aGB+>h$FGq>pcp!;S%FV`W&WQYHlAD0R0sERs>hQRm zfvgx6XF~7L%D30-(lfn89+tAd^~2rQ#=668W0LkAaZdZ%aoC|{zSQB$Nu10kFOIZ+ zokeIEuv-nvcA^ms(3}ZPIZYg^KzV0qjP_HF2CS8UJ>h1bh&>gSY7QWj6XC18E#U9u zY-FtUJ&)Jvyl-W&&-pu52a97x-S^mzG@Bd^wP+(4ezWXukdARCkj~gYlK;X|*TjCWntqW+P}wkT}!y z$ba}gOfVu*C!Qsgi^W6cgMUIX+{Z}OW2+J!`YIO`sPLt_0lnGm@Unik8sW2%{%tX7 z85y&x9onigy|hg zxU;qva#aRR)An}~@F1seF~9=|n@xxS)}p^`tN;{e_I_q2CRNoXpfqNr`d920&jK!U z>+Ehdeb?fm@7Gu*EZz(Dtz=WC)gen<+}h!IgUCr5L>p&8Z3GHIXQGml0S>)1BGhD| zWg39V!}xCOl}?Zh(Tcw$p@(!UtE-I07z(@Jc6A>VYLn5WxhNXbQ*Ur}M4ZS+v4~aD zqcC)Qh6tg9qa%yn=c6DZ_iCE+G8(6t)35zAe6=%t_p0|QlYXIe_*pS5yfor>brcPG z%inFgw#JpYlvpP;93e#({GMx%jf`mPT7jJP*tig|)Q+SmHt(cYbnvmZ{gsa|?1+j| zPGedo1!eHVGtNDi8=6H_+JG9Dd8kH|MGv;K#z)E!ycfRG{;k#v%cJoB532mI1=ua`&1yb-eGxr41e_&CbEjK@|>i)Fob+$Dh8emEfl0XjS zd=3S{QrJW| zvJ%$uvV%sR3LG@-5y}86#{k&MUg1isG9lj zv1HW8mAQ|fc#%XLb-zvf=2p0@eRXV0Mh#XE2Lqg9*}b|Pr0~VVo^dggG!5XHA?6uI zz=!R$-FcpLIvfXNf5emwt+D`@2v7bq5+fjlZbj8bbC$Nkn%74Hq2 z94Z*|<0YS~Sj_WT|2COsnAZH|ai zS{7OTCZ(7jk1oEBx?`3W#4E0nm^DAbD3?h-nA}A4Ag=oUH#l3{0E(j~?50>AA`uq^ zFNuW>FPRvf8zX@zWqE)FO3bh$t9pBkXd_9;bW)gD)ih^+Es`RPtD8My?eXyJjDDT3 z|Jn1rJeKQ7=5$6g$6|#L{onYglMmn5BV7sKvs*)=mGB5$_3_3H#Hm(y4$T^$8zeyaM%d%f=*-rPsr(@8f7l3ZxS6B5~bE5YvP7LLd8ZM}ine~Zer&#or= zJf=K7px^nIOGPrmcRH3aqG-KLalr|==bYTC2K|RtALd=2eRJ(Br+&qV#5c!$-)wL2 zruKANY}_0&R$m;mgOOrupAp*^ZUq&()53F+t^bMCqi7_sSi`=%sX4kIZDg_KkVw>( zhF030_n>My7}S~KLb- z%~2><2%!Azb?BT4JY<8xIgT)&lGjO*4IP|d(yO2f@M-cfr;MLje6CLme5uc`I;jWt zXGEitSj%(rSTf)K5R`~hBTc_lBZ9&0o4M^3cdiHx?k4#qDb4A(w&HVc9MmWYm7N^O z2(32h&AREVLN`8H!(>)xwU$ej_DzEOXdaE+XD5G4>h2RKF+@6B*44CU2x0bcSwkY> zu&@a8;U&3?Wm2&sFX=*OWMtJTh|lW{uesNEDO9ra9wsx`NX9CU+f@h5+hnft9@j04 zduDvn8is@&w#kDwjJ?Z7G)3(>ny0r!3NTT^Jxedm^lmt{lA8m>JshI@A~wB+smy{qLYbRK{pJ;uIhW) zlE)6|AK6zvk}n~HxhIjh!x-KU_CD$d(d6jSdR*a{GI=a0j$}))Ft@j%0cMMrv6%cJ zjR+xUh=3KIa{>gK@kg{)=VYpsUfG{TQETpz^Pr@>mZ9&+g7o#*`LO8O9YgMoz1kvA2DN=k<2Z>hE z4ScPcwp-8l4j+D|tY~GW9*XeMglK<=N|9`mLpj#D!)AX)M_?6;^81r zZiPW@*`Tb%x3*KHzyF656Y##*6ru%=`$F?advd^uXOO}AH+1?e#?k}*BIndyIN>|$ z@_#nPtIynx)+s59%y`1CuVVD=?uYt3R~mP6Iv5si)&Zh*j9VM~1Nn(-mDbnGyqvGi z5^U8}ie-3ENhzQHis(&Y6P!kFM^7;L)7D9Fwk^L5GPtra<)iXZ71J_7OBlg&a2Ac6 zakL*OkMI(v_Ob6HNbg`E2sz9!=rdL7AC)Vj_;0$!L>Yc>D;cS91{wA)GM{qfULEZF zxr}Kxjv-f1QkmxeTi7)nW?lm9AekW_l(n8D@~Us_>noG@g}XVv;K5W*RLJO*j&s;- z4J@EXTqRH8cAQCY{|63Fx2@r#PR>q`fhWmGiLaQy|4KE?+iNx;77pT%M!#!O8UzR7 zO40-2AZtj$x5^QkGSMrOOv-|h!RHg7ac@(Zoc+%QP{>kUUwYH8S<9VO!>MXGsPbP>TodaY#J^CzPQQC=rwuxBv6;>FurQG zkMbEa_p2y8VZl{-4x=J9!3@CrHo$kKKtf*u3=(t8+2UH|x5vS$H6b2;1$9vqi5E zPu01h%rTio!*tjBRb`e zX+(sqQwDo9pBf0XozOgxT#xoc0D%@+9+44c-oIy~gWS3!&aamDA>U>k zg#kH8TBL!Y5cCSz!6!)nR-O6-;Tp^cIIc6z>h^lsK{VS}q58Ocr<~pGu>-3Syzic6 zTkP$D70o}tVI_OmG5yw4z4L2x#7%!Z#}eqb-@TF(hYMprki^eCWy#nwU0mikKxMs)7F5qD26nTBkJ3-fE*O2k zm#T0%w+mw}`N%?%8OjxIF6YVqcC3ah@j*l9y3}-F42k}(jLIDnQ^`|+-~MZEiskab z)|TzEewLkNR1F=h+9EXDdml)zT4pg_LBX*K+ASP~>}q=V^|!0FA4v41W@PnjZR;|ac5T9(mQ-B0wCsLr z+xrWRc*5z8xc_jO{DzicNCXsFCEOqQudbY*L?7JBV9}KW;D9H8mUmZ0by@yBjCO%@ z-kuX*u9UqB`ArvdlEQ?n22=y`n(=!kx?<}pK-$lZq``cS?v;Xha5(|jbs)2JvVk9l-u}+nTzI zEJ7LMGk47J)AT8~lv=utJ3$(%-7ep*Hl`c-J?dFDGH(XQ=Y!BEm%YokTozML{d+;d z_2%TAhbdRi>lZa;nqUsL#HlZ4zH46uw-k7a^rn}oPR;LrjB@2T1R`TE-?Sa7EgBY# zU=A?%@XFcV9Nx4AirOU$!517x`{UgGlJWB0-_$FAGWwqWoLYUO{ZsH>VjFF*&1Ctj z3tV^$;yZFaRwU+{M$)sHiN125L;kEoPwm|0o%Z#&BfZ63s9jdmBI~Cz#%*MWg+JEZ z&w<;8=nR-91&%G}L7cSD$YL@<7_Ok=y?$*xQ*Js`mC&P%8l2Wdt{TtIWufBrYGnS-<2vX9cqN`m6{)T zB1S;&2hTldl|O(xTgz+n{`B<{VUd*k5-^Lew5EOzsv@-fz)FrBsD#M|ejk}Tn*OD% zLe|K+*825Hm^HO)=Sukwrp(wf%IwUx&Ch2&t>!_LcSKr$TZrEAfi{o&b!Y~Vz@T3$ z9uv~=Kyd0CL%<+e{PFS-gBDU?|NGw$<~Sqq|NFVrFKm@qE?kT=NsTHt3=qJLUi)%% zh_7Q7re&OH%}Cu{jyq~_mHHFgGtB+6dO5~*Mc6UbQSL6wh)t8Npp}ZnB*l7D$!oJx zOK<_z{mny6nvTzt%YB8`7c`S%pD+fe#j(kXQ+o~X)!jd+CcH=eqyZwJ-gMmWv6dJZ z6x&Zo7D>;-b`$QXP=U>fw@#Xz=qF7qx>@^^fnAygSV~T~mAT~MpZ!&LH4g%_&eze` zizX@A^Fx-O2p(@yyo&gSDT=h3zcif9OGA znN-MS?&|BGWPgR-#G)ylk)(|T{q2=H;O!zPJMXXqNV`6XJ!Gn>{|;Gp%H#S*LR6%! zUBN%f@gSOy2>Ca_k`zpH&Pnic0u!4~n3;sW5!sIE2%d0z)j9vGsE?lvi20`gEBa{I zL&13Y6N)V)tJ+iUdaRDl-id#9TLyFQ8fgm)O50x_kb(^>tw=l?+!T%q)#D4zJN9Wd z32wnNKWJ?dt7e_$jGR^0*w77@dP&ivX|zp4%J*kaH+~+Ct{{2df!yUe_(gblA#z=# zO<_TQaPL0=H&_)BYO6kAtSqoGiNZMgN$Yg?Qd>1|o)8J5VT6yH?W?w(`F>@GufU{e z!rtJ@vHA(C%~shezRQD>49sS=1`PtvAApfahA2Y{q5!L@b6n4YI0<~CG;@(C=KyPQ z@9Yy1Vek$Ggrt7P z*utVAK1qe5k+Bshmif=%QmEh^{|P%KRV>?H_BNAK|0!VZ`Hf5nIUrg3!DCs@MkApp z&D$1vZ}y@onNj1!FZyDqM5(3|-<|GNSwf+VUUEQ(yq2u3BuRjOFKuD7ut_t>z@Gow zOPM}=Bja(MH=Ni&0hzq2q1FY&tI|CNbsE2noEZ$!7+|wSP2Ap4)T(bSQC~5-A-;&?cBFtxJ z=|NfF&Z@Zn6$?uxeQZLYBrX<&OjTUJiyV7;++`9w(7&2roypf3Pk#GpYIjGbEc3|- zGZXZIyFKlLYiVCn?!HkF&Gc%&X1qFIEn8sNc~bo7CN$%|haixi$m#gDl3P*c4`ql3 zkZmOg7>OehY;)kA8D4QF@&V@(5`~C?OTD=oAyc!(Ot(kj;ybb3dE7pB4LwhE63Qa| zY2b(J*Rc*-D^Ezuk`JcAlItxK*+u#GuydS$Fiinw5!qqc8ov9OL5<^k$NU>-yjgq6 zpBv$bO?0N{wBA0B|4>h#Nj>sl*I6f$p)!{Oqp!ap-}~vtsFdX6K7>>F(|GlocRe3l zs30x6jGRfH2>uzlQjbZDwkw-ZeHZZsxacf0Pf#`!^nTbl=Cb5&QFom|RWdZp5KGAe z{`+!7M3c%4gCvu>0B85C06&N1#pk3oFfSr9EG?_@;}4FG=;x*U>#I*)!C9S~rFqvB zCCyaRqk&*2eXTBZ+w&WdI5@g6kcH9nvG{-zn>T-U32?oM1_?)(?B;>tM1$iUth)U7 zWX=yoo_29UUy~SFfWnWMsLHMc546IH@U$L0k}qAb#{X=EgIoUpw!%bM7!ApFX0Xpg zvA-BlAu-@Q;#*qek#sepY##B8nJ~n^pJtgRb|6Q#0dNTiem4S zqd{64Q)?d~%IC#9KEe#)>hdV~MFR@ce-FXfc17SlLZ8>;ch7qHRow*n zW3fm0I2Mu(ndXkH`&s7s?b^pATYG-iZe<`AXvEBZd+K53QAi0nE}|TcRwf`15UlJS zrT09b&$15*DEriM3>JGI%;EPLlEmwG4qi(65jL?e{4c&G$Z#?R?dJsl_VDhqFY}|u zW9(qj-tFPQ^n)2q?BJprvg)vGO<|4uv|PUb-Do)$Nkk=UhQ_S6m>+I4FJYF*V8Hda zLi;1%XNkj3en?-WYBR3jTP(TT-y9iJ@YK$aI=2Hxeke6x>!>>vj}F_UmJdBYi=ytQ zq^lktsH(vx9PiD_VUO84rNJdO%K68B6PgCWy`vdltQT*X#Li~>!CbsGskuW!oVN6)kpv%G2~N{c8r3!Eq$H}8I9mXMAS;kuFkO|9mK zre8B&*&g~^7vPux=cRls`Z*poGh+InIUrShswI%h``G&(#po~JHxV&YM7CN>7x+l} zWYcFZrt(qDCU=p1j8fLX&C2x`(#S&leU}xqVY+1gn`DE&8vg_CWiffu^xJsHGa{l~ z9)yc$~Da{`@^am_P7zOpIT5I@{83-7Xx49l`%Ve=-@1}e30cE9=$ z>D$$|l6x*d0K8e?5uen9=nD^xUkXPlYlVZL@T(yd^{tBEZ)L+l(0HWr2!YN3k7TG_ zd;5ft+I zwR4Lna*f~9^Wm%F{*(yIhGnibZmLqLdS$tdoDY_BUr+TQ%D{BZP@H}GE&rAlwECP-wtIeD7#L0U*|Vnp-jn}6G1rOy0N z&CN5G9m>j?u$!M5(@9oNR9&E8<%1p1u%4n|Yp=ZYIx{<>P-Q*Gk}Ha z-`Q;oY239oI)X?+qaim96b!7}_&Q0aJcb-IA#G#`Tkn|H4!%SQqzS$a>ue;PxDq=r z*1{)Lljm4fTB#8G>4(XeB4^hgOG{>TZu!CLUH*#f{FG>_7nnOj&|C)_9%{}|V)+L2 zI}zdjr?FK0pTze$D?hstA;y>v7N$()$g5K}l-fBfV+2F7kl#iwVJk>gR zdgz``DzCsBT<|Rdh6KK_trGrN2)05lBIN9qf{xEZNq_Ps;%%~h`PE95hm&$&+)|6G z#5itp-*gFfDyoUUc8u)>Q=;2?R#Jg$sx`j%sja~^CBn!I<>W>Eu$T`D8w!c+iVgZy zc1*LNet%U7_Cw;}Jke)wHy624d5)nIhYq4^x~U35*>@eM8FuLQwPIcYOb#9boLYDN zJxHS850j`}7qGc5w+yDNDZ&r1Fy<9yEw(u)d; zjqbs0y#u+-Kd2XG{33|11FF4cm>x4dZ8q}!%IwE&04o0=8nyyM`&j1mcZ~R#&LzHE z?J++W4)Tb@9IOCjkIdTv9iG)&AQ1}`RXi268o}l~Pwzu++j9CW?wNdErEHLi7k@7a z1i3u#{s(C|$gtW^R}9K>JAog!4cx0sY7OiR&N_-LrN=QtRUA6^d>`xKsH+x^@A)V= z%SFkS@)oNZ#g&m_hJI9TwFSAT&TnxWygQCY=Po#Xmt`+WA%Jh8P(3b40X}G^K5y{? z778met~Vx}sDIzWvAkGmAvCa?DHSh&? z$koFuP)AhVzQ1MxU<-or9u%b|9TAeUBqQ15eRQooVb*ulDFqp5oR*xBKML-^XN3<@ zdMgtw$&wkfj|?XL9m^chP!W^`ESJwFCKc#;m*g?L*mR5F^+3z4Tx;Rd9&3*;8{ls} zMHF66(-=la_Gyc-Kf||Dzg_Jk?4uEp_7}3!wNoXv@=@CZwH_nJD-hiG)O%seqgs=_ z^UT@MMr>*-C1kXo}%&T{}TJmlx( z@ixJD9H7$Xy|f1qzhC&*-D;rOTHh2f$A>%oq){?Xfh&=6@B>+Kq#DJy4rvu%@zuWnB(|+X;=Vh4d*IT#v{ml z<^Ws_sh3-x5a^V{X*7P5uG0)OSDTkwO&__;a&(N1BZHRqNm|F7G51Ylo=Rzi)7qH= z+s>|Zl3(3-HK>lCnEU|A)Se{fnAXfySUxg(eR^8;K==~9bb;|t%tPGoe7UH9;7xn0 zX0(K)3fe((orTf1Msvg3>S?Se;Yfir;p`VNjT@EYgfaziiiAe zU&=;D1Cy5ScsOn?SGQ3@A9$b}CsN{}`{o=F!O~9vbV;n-u^07%4mZHkKWBHb>v}An zEtRbs*10f}o&R*-npW*fHdxAI1m<&nKS^FNVoOyqi74+o-`0b(q4k1={P^%8=f|~+9I(jysN}^rr794s92+Nm{wbpCaH+oi?+!MPI1Hn6 zZiI+^zb#T3gF-Kx@+dr?1m*Cig$(^mL(O4`Lun$RR0GkF5(0{o%1 z=g}8c>fwJ*hpA4@R)p(3&Me)o(CREY!cN z?CTZO0N$*8_jaT!WsYnHqcI5>eSl>ZHuZti+}oR!8;O9+)PAFcfFVPzm(0LR#92*< zZnqPcG?UgRWot)i>+utTJpS(y8J~?Q(_{-~4$(6r5eSu{1i&;bsT#;+4Nrpx(?!?* zdEF-w@Xb&D5xAx^aGN7M(0dy?Qy94W#J=kbTLZtP=o+0CK{)Zc(-F}1FO3)O9ce#x zeJZ{7{LfJ1S^sD;ET%6!vieN#O>kBtHl@_iEJtXevDXrBe~NqRygLHT%&H6JwUi=$`^$CFjIEbyo1DHpY9DF{mSUE$H zk+Tl-jnhpGEhfioT|X%>a`aPq4p`N0RElm!)|4BS(SBrDI@_2=LO%*a$7*~3;qGsr zr^Wih9ZTX*A&EBP_4e4l-A)7abm}ruUID9PL9nra3cc^%(W>dYo(=Z&pxf@o5~Z_o zPYw$VZycddqg7f9!_)RIqeHVr{!gw)1D+NR`vd~E6X&z4sa#B^d*4DzJ6bhkkizhM zZ;w{9)6P?QpWqPUb2lqIozcHH6r~xSXI}PYh~=mRmfs3)i`weiUTvNMqqG$`Qu~G2 z_dZ~#a(xgS7Ma7=S&#Jk1PT_0EhThra*V6=4qUat+~R%C4l=#^%X(^Nit+{t;8@Bl=HJQ?R?~x1 zP987Q{^Np%zM_M^myYf)1U6ad4BWs zRfzb~SN-lZ^mN);H^cW{^K#Rqy~+Y#pSbN$W{L}S!Tt2&SnCG9`+J~7dmh-ddHVNW z4_z+v@^aCXgY?ftHy(Hc;XwS3c>3a<<+rrZc&capsBx0yg(qjnryOAb4fs~?NBOVE zB2o8uvhFj|uFo(newQ>!j%VJfO;qCGx20clS>EeIgNuM#TBSuM)b@hU0kZulzFmw` z<9#k?+O-wA&b15TSk5N2(E#=d|40tXR3q?Pk{ z`K@WZakPlKndkt2pmVYkS(wNq>@T_SIjBmj_n$~uYoQcbpmiujY8{sLwHoe&;4km` ztAEd9&cVpe9DWE?Z@l9=Lxe;yJ`{~vVqosm4EPjP1+Z_Kg^O_B6|^D0 z0t?Mm!D;>w%LKw8k1n-MrRjL_;b~MLg2OLTPD=*QtAl{}X8rwDe%V-s<*xBLXdAUZ zB|kVQMGAWr0Jsi5{(a^CT?oSvNFgYtX@<<8-w8m2vT{hzl)TeON=Bw`y!jb>{xLq7 z3S0pDbZ>O#)sIiR%-XO#{IhLfrR& zf)xqdZc3=vN`?t}^fwbL6ZGC<9~_daZFPGI)%I9`W&%w=BL<~tFIWrmmOYX<4v8;( zXjGqVLsHU7KiAlDwhy8&(~6Qr;0Y-4+e5fbIh?Ao(qB^ZxT@luG$&p8OwN}kWf$sP zfdcIu+VFp3TR8g{<>F{qsB(pb@j+z{A2Rx2zo+3u+*T|YdY}ipFY74V$SKv%cyx?n zA#V_*mGgJfKQ-49S*Rse?d<)!+u=Mo25^PUEpvKai>xHXTGCwft3`lHOmwHe-!6PK2TDICUDVTbLB1U{HYIxxfc zM?HIn!a+ps>ExPNfM2RBx;42*@CqJsNzo05Dt=k2@520sfiVKQdz>g3Xnlr+)pk?! zF&@#HJS-u=r9shWv5Gjm)H@6$?!n-_Gw*x8{t9R5A}lXZk<#Ztn{-4Q6{_R#L<;oa zkR)@bhXH@EIuB*hAn`_=r_(+H#`4{U_MCnbS7N};N7zO-ZD5|*>f%Hkz*&yq z=ls{g2LRC>=n%Dr<=b%{c=hHl2^N|cvO$RbwA!5E2)|}Tlt+bAg0ea#5h0Q$WU`I{ zlnn;NG9~UgfoCj#N#^r?pT(;EF7%m9P&}dJACbBHj?nCl752PhdsB~(?AO6uGEpXX zUy3$_dHf#0FJrj<%d}?15$TRr>n{@2V#ft+a?8Fqoh|#qqQ87b!Qx~+eakp3F_5g9 z;#;_eCaNszl#-haM3XKo0)XfDuPZNhH~Z=Zgv%27^j}sNmWe%L?TV}Zo&cg6ExQj6 z#v8}Ldt#ax`I+oErlt+F@1+1MuD@tP3@PP)nmj5)>hEleD|V`V8`^eN(I<+{Yl-nV z-GscX3J?+ZFD4HgJK)UB46mU*Wg_2v3aSI`NXM*~llRrTH+W^t?t9+yIu1N9X|`(mO$>g-3RQ z%1>QV(zYw1ug^KVDMF3c+tt3-k;*x@QvJf6W89GKM^?y@nC`YX_31S`U3{gusb;AI z3QmesxXSyUi&5b2M@5n)c>qgj6>dvzfp6=qwb-9(GV4Caroj(o8;-O$F;|sKi))QYd<-pKQ zE_h5u?fP;fqps6f`ZgqZ5DBG?ts3PL`KE{5z*!rpLlgs7d$_5x?~T_tduHlUsjdB~ zRs9$V1AuurC7FC%zD3yOF#5VYFW!_C!7D$2b5e?RB8Z>YYUd+H6q(n!&aG80mul<| z&TZrAu=I-dv_?+(Ch!?-(-L>h)*~_q4;PK4N~pU3D=}mr>ZbJf`n%n)HH*4*w5}Z_ zn9yt45W3~~wRx9!S{j*P0zE&?hkLNfx=Xfke!v(3V}G#USBUu~BI_CaFA@1=d{Dvr z^(j^z6$&QW_(}jkZbiPYKVhRnxw*;97i~WXU{=3GVp1Ryi;Mh$&-vdXvD&Jn9Rka% zvLOY0A4(p_09-bMbU8@{KJs5YxN@uN53yo6Yn~+{LceRH1v!ocs;J!(6Ha|?JLDe@ zs>8G!SDv({ojZ?4JyoWzP%w-F2gNy);piwB4$wBnhm!exI1GKh?PTRQ-Oz{*m#+8@ z*5z5;Uu}k|cEL}owkw}ASmsW9H!oidUd=UIU`Cunp_$C0qV|o2<}}T}Z;pstUWKut zW0p+UAN`74%Om{U;s|>u49cUrefxb2TQwu*{>K6P07b3x;03*Vahq{uqb1HY%^G%g zfE?>TWLGuLGsW{;DSRk~%h;E6{ZRR~6GUXFpHmV@!RocmLH+d&r@7FjVp3V1y?~L~aZSTGDQd=E>%bhqAttdL-h6zpk;bdc3!VwfQ;Z_&-BR2tp zG9LJiq&5#8XLq^@%YsP<*6spQ0dAA|(H8TEvX5a2a#~~u21VtchGr{R-yplPkANf9 zqZ4pB<93O|LWn*KC3?PZ<=7oARs~&-dHAnn1k(`y_}1z6osUgw|2)rEp5htuPlnNR zRWr73_p8fy4#^|dz^{SyDC*__o6EpREPM&icmG;+q=yeiKzgAr&;1z+pkKwJzc0I) z0Dm!ei;*b+sKip!d)v(IYM0f@cd7p=K^=zwl3w)UGm3b*G%d5R!{T`fH_Vu7C;CKh z&U&oK>wUkTb0&T-z+}J6&447GTKz^9{Yab_hHw`M$uJ}^%|{L18dG_}I1=bSnc{%* zPcpHvNsRdcXt$npCN?Q+mHKU8^b*a#`5f2H3|C%p`ICpCQbb4^v(QcS%Ao@}*RHbr zTIlF;$l{^as;4pmmllt8XU9)ID`)qo>)kR5?H0cIKZuYkHemv{uB=wCp&^#;lTm*S zc)<+zKunInGnb@TOXqmq4D27xnG@$38RRbX*BJrD_kI`nc{#(=crVFa)kRIUuW|RS z)0~!}>xR+6sV3DEX5@_jl<0s;28Yl=-By;3xcfs*+0J^-hqRR+x6~nmlV|}88co4c zb<@G?zcU_hRlYxk^o*_#BR}iF?lVF>#Nio_0vqmc*HZX5VI@kJnz(IEOa$*)L+OSn z{Mjp^lz0eG@ERZ>`$B0l^+^4Ej7tEl?o5~Ws97Id!&5fCH|@SkK-W+T&K&sMQ&rZL zl+IO-^Tu+BnlnmgM&H&vqs;*@Ae%3vl0ER1NJ&9dCb;_r#_Z`*Ge0uDoQOie@MgxS z8C`_Ro>WQfS$Cp zSqNZ~aRbB8WdE7f#Mvg5763o3JJgrEd?1|PMPHi%KsHDiTmsep>)V{j`szHdbqR|l zXciXH@HX(9nIq(z^31{Eb*t%D0wC8gyuC_F&z5}e?(q?uK*s1f3f(l9rhCr7{YbCJ z!@lWOpjiq_&Mg5pAh+d|dZUhrUZVWt`;@DA(ZAS6i!EBMQIUz!Cbo&|{_VN>=IHIM z`L@ANPCt~9tV^OQLPFj{mm8(oFTiSwF4ppsL|V0Ft*>n@F4}uuw<=z(jh@-*(P^&z zql9~xJ%x4a=hYU<`*en$=b|h{)?$rh=&jGxB8!waVOS)gDJs64Tff2&+q@q8TznQd z9s0o_YY)(11mi|lol|czo01k&-D>I;7+wp~PZpCmP9`C9VrcnV*C+OStqIolX&renRLDe zh$4X_T65!bm|`P9doP8i#(3kneS&%r4WKrm#AYMv`1Hovi`EB|M_z@P@&WZ5dpcg> z@S+k`-{-3nsMwIo2}pTJ9K`VK_L-l1-~!zjObSfZX+|%MQq*hrC~Iu;Z{oKdOh9_) z5uE?X9nZ$1t(~%CEsa_*Z`@nVMkXKB@6u;8N3;}IBH#8WXxF0r88^o@rh8o;Yxaho z@M{Ht7xw6_30MIgGkFiCggO9wOH{kHe0kA8^vv8Jz~d5*qhWa4xEuieMa8rzZi6Q> z)P^?#g08?o3H7Ok`pikMO5(*ATl;VAjl2Y_Duz#%YcIjdsXcadQ))TccfAk>l7YCI z*1nfY@IAO`M#Or(ppF>2XN34w85Cq`8ZLUYXY69kSSENeV2|bdbMgeWzITg5+8bkV zlwBj;)#+}up^yeZa)ic?R0ZG&u+H3+i0%bW(pD{G?mmxMix&TyT#iV|5WsIfsD=@x zJ3F_JWsC%3&66~o-nH0#VAQRCQ6cB0+d9f?o_R%|LdE-NCl?8`E&f$CHZc^`1mLp^RRO zS&B!ABtGr`vce08xbDjBk*$bQ#v(PcYGugk|Seq{{?lRUe>E=#BZ&`J3GP@#vDOjqCY|@slnX z>Zuik1`$NX%K?r1H%He0JJmL#MBx%u8t@ApYuYXLcA&Ogd&Uev<0Sayw4bUE^j5V2 z4htivD9#wpNJ3K5HBQfXQHLio9swwoz>P_-G`{Y^6ut2`PS}OoU2p=!_SYGvPeg+y zVR5J#lh}>2-t7%X^O0j?8aeEM7R>9jC03e$ve3g}U>elpvzMD`ey%N<_mOQ^e*E&3 z_jPVnp*ei|uV>F~|1fN5i0BZ1;8*4kzAPs~e$kL$EthwQdbJfrDUTP}&)?6xCl!N6 zouB-P7?*8XN64_QH@X&&kbtU6H#5&d?w>abR+=|UgWV`-yTdrn`2In18GRVo6CTabJ|vPz#cp`V^>{ zH2@gMw^nH3nZB0|rb{<3zd)c7)TXL4(n?C@&B$6Nr2~@d9g7`M#_!wu5YBJxX!rZw za@W}nqd#f{P|m++XmrN~#M3^CPCz;TKN4D@zJSn?q6p`2@kC2(2)my0ww~5a#vacI zbpyG;6&*SEqq6?kdPiM~ShpB{j1Dhs*H;{3G<3~g^OruR#QNAXM-kQ=FZU5_#9!!D zs906w#MU~0O2p@2LfObLahZjl;9%{sPIBra+tEuc7ZyfS)yP;^_~UZtF_bFcqNM_$ zR~XmmfmevWtzPm}7V0wo!qZsRV;I0I4et@briMH!zJIz`rI0bXyMYd{W22x2%w_%D=XT0Krzd z&P@eiEC?Bh^Es}ffnVQT9?vjLu{R}4`FL}EX~rmsVtn?QyUoYKDwyQy=t}rPf;3*f zOA&BY`%y?dbn<*ck#xn))TU>rj4P&ji(nfwG-N4DmtW^NQ5Oij=|P2P+$J3rnRO^kWZ>bH-<)_n`@iVKfG^wI~=| z?OYOi;gPyD142PG*PH~IgxbC+v!c_&o+d^Qlq%^o+kc6JPGVZXgdG~weP94E zhJdgjy|JXuz=!xtUGsM%z>g27`9qQ|@$F@v*^7`Te=Q3K-BTfVszd*WI~_rBTl-{E zE#Hy!8ic4z<&GWkN!E0GrtI|WfY@bw-Lt6HUlDep+dB3qt;d_zWg1ssz!v3OF%riY zXAxQd>!CK&$Lo`+b@|D#-S2N;U+hdrJ2N`B+0@fb=9+LI5D{pt9xW=gc}sg{)2=6f zCX~teQL(b0`s!N+!t|sHq`?9ul-9Lf@q!6UpXqhG+Bcb`f0zY8bpz!Y3Syye9}BXK zT$BL<&%1*y4nXHKx2Og@>>U#E0E7R<1MHuh^cw{U9B+){h8Sd{4PP@hgwBytFKqZ*Z|W%H&m$4P^B z(#D|zZ%CXG&#VZQqW;6ri1^bD?FU*($WKWY8W7kR{^?z8tR<9Rvy=6wjcNEvOG6nq zAg^pR!{Re@Jgl<0)?zeFvC%S>UiUKe={M2Vd44>=0%Sj5o`pA55_h6xEqr;8y9(K7IpgUlS;A&(a#Im@8r ziU~QAt4%vj45IhpFia^gjAl5eIHnn+VaXAE@IDMzX@~w7>C3TH6NKSu{pxMEW5k9G zCTPDTeLRD6-WLin$$|*3whFM}WGlkg8~`cVz0ZmIL+H;q2@GHrz0F_4vgQsPz5p`4 zh`*qRwhj*98~^vjQ2H#3I*s%RPOL5=D9c0OFe!T-)<*NT51RU*tX-e316Xvflc}LG zO{|(nO`tNXkJfn#Si7=Ou4YvP0XB#Ra-Kr(k8+-RjpH5&u!2Pa++=bruEQB1fzryx zNgm)bB7d$nziXPGUDKS^)9a7?{*_YJw zD?l-iUCiRWW^YGy=Ea`QoYmBu__U-2;Hp0jC3&r<1da(hKHdLr&^6!r8KSiyyxNFV zGQx0fxws#fFTM{!rXN>%e@)56LxG@IDYf43z()!DH7yXEGC^e;-i9rR#2aRNIVRv7 z-UiAcT1LbVUHZY+Lij2+Z0r2}a~R5`+UHOnYzQAh*k!qA%T?K>j*5Op#LHkvNC)Vh z|1UAte_POZoun5G|7)C705;f2D_u+hF~J)(T=L>-)dmZnkS?fe_am!UmmK~;jZ&H1 zm@aUE#vYAW7-V^*Dg-YxuY+e9J9z+dB+Q9yDO* z)-E8P>DsPCH1qx`@s9Mj7#;vj)gJpbh{l6(gwo{li8D5S%Guv zl64NuUDbAC2g4Dd+ChQ%05iJS8$*+e79Ju7^8J_fkxIF!ym(!^%Z6txf^+OVa+6ZB zmKIxSNW8NMol5Kdwl(o)V-A%X47h|UhM!oRl;t%!oX=htS$RvAh?~=Se~Zgb0Ds|V z%-?4K>vR4GppK0GOjUFX^DS#$Ud#9cMQTLe#IH{{4tQNm`{mFfOIs~-lnz~USE{e8 zR74OM)jh)%v=^1~%$NH$amwQv?GZwY2|z0=>pc;D!9XCB_86GT1dL{>)`gL&|DU2; zz!->pu3@2hoN07&4Mi=~}eu(=xYz=QajzRj+|!?=6Yjzi}Js-6D`!mpdiOL>^rl_MiV>m+Kq4k$= zqUD)X?PDi+VRRP_sRHc)i}KAKYC}=pMdhDng!F%Setc&d#pl>LoT!%)pD9&-&UeL% zhKSjxzr5s~6M%OE@zCZ%ejA8~OaKld_<%L)%ge`?-Q0^zRSDCU3oz}z*%0AaJM)?f z@u+Jex!{kh6P?$PeZe}#un1)ymEj@zz308p?G!euc4?~fyVi65Q`j(vuE4fNM0=JR z9ETPFnSzTye#bO%>95mkidGB=KK_c6si+2@0~=>xA6ZwECPlpigK1h69*h7AqLU}t zgE5t2Ga1*XGl&nKx2h&`?eSe;J_sWuiin<>dU!`|{iHtTtR85hc#gof3l1+jq|+Ds z{4YAB|J_KL5|sDPKpDinJRw*E2ibRcoU1hgKpFq;^{i&6t7G@t?2lbtF4O*@53fHd z9q;*Sn>pAsH}q))OHhYHDI7T$!!!gcSMix-o%Y@`@enlp=KsYuxQWj8IN99l_9dUp z#{crEmzveL_T1a>6rVFu>G&X~G!VCkFaw*%zJdKK0aHc*(aPyCN}MecXq?3g6llHE zYUK%>j;lJ!>l(d*tmE}PvsWR`y13hW>Y4m3^z7$gYw!cCo~>4xCX%@1vXoQ)o_wy{f+Um1+GaYuo?k+|ScW>G=dFwZ9pLH0W;>vYR8u;bj4@O4ZsStVm`W@Ba z8wC$p%Xg5k+b&*+I+hcn4N($UC_-+g;la^QPNbY$vukp?O+KU7)8_vM!^|9=_ni6S z*?S01x3GG86^Ju=e_{#`ztywp2#@NF|7fy_tNb)8F=*X5MCNhmjBsp zq5=$>o*BAgE}($@|LQguO9P7TgugPxldPCJTN)=Xxz;#HJw~jKeTgRY4kd_JtWDI; zZ0U)*Cc>^98j&3-hY+-Pw8w@ro&x{6J{4vR$9;=gP!P=%CI-&$oy`GDAFq!;KhQI9 z+%eLXYYuwwPII=2lA-4seGN^=MS6wHDb2o5qViU=9uYdNCBFF;$VM7XwBTlU!0VPI zG(^?gssD@eV3^~C=+FYAiN2*bVMse_>S7>;oli9r5LlGn!fCvu_FhbJTBZSKuBFfeJjau)*?=Jd11mY)2D;e$M+72=2dZ8o)vf{8K;Xut zKo&B-wQ=k~fQHTUsPdijHdquCpqzEk%Nh<4czer%q8sB(ZsSe{6^bB|C-FF}>K`RK z813{x9(uUKRgb690+f3EcSsI{sfhSj%qY-e9n=mf{W)RE3mJqzJ%!QnWlT7#fSe*C zZ=r%s38>8ugy(?LjX!h|LB9XNM8f=l85nbC~wm_M8z*DSk^qFvv@d z;4kNICIWf3XX1p4ti@UirRLte1qxLwJm!2<;9U+R2?Xgt;RwS29ds=ykP71D2EEjL z5&g!{+ika6nn~j*;Fg@%5m_@+!^LV426BIU%UOtraFR8oLo%pff)wg~`*-v>YQ zUk=E?Ltjs_8)*XivCGr(pmkV2-?kPV?#P<5(Y5vy#v5jO`hQsKJn?|8 zU{{rNB+}m$xTv1#LKMH%AOy%^5h=GIpr>}3W{Fu1_iH`=Ri>eL6L^OTH8)BM-YGj? z*Lnuzmx$AxBroqlQcUMgfQ(lL$c=$_IjiOTg!v5-qr#I00oq@c7uoBpqbbZ{Se7+Y zGv9xHROuuxer&d7h0&26b+S3!6LbBOy(=!tgdDP7&LlEFd$`)$q?ECTfKdW$O!(Sm zRdA6iSyY7U%;t|#R2P6h$UzQ1P`w`uRVaVk&4pk=E}rZ1e-QSTVNt$a`{>XJLrD$Y zIDkkvN=OggozmSPNOyN5B{4K2-AW80sgf!w-5@C)`{w!W=Y5~|-T%G!m)qmu@B>`e zigTUoTSWNnJPwF zVFn|0SLaezKc>6X8(1QO)!B%4|V zkZ9A6<#eC@<2%cz|I>F=333E6#~%vW|MHzKkLSql-{BIbh0~V8RhSOC*PdS4U2qX^ ziu&jb#03R2J`2W;I83v_6M;&id`}!Ku}1m+by$uq>}BZ(x>?w`P(%O=*JdcxhcKL3VG-w3#|?$>^g&S;+gjhpYA}tV^EJC#9Uq+w4aZGNS50?KByOj zuqn@E^*;Ot%#78&cxnGN2l)5L40apPWyvDF2n;p8F#(j_gN+Km9txz&_0?Zae>)^o z2Zf?{N`3?lTMDC4SC_uEdF@7}^d}RWayTv~BkQ6`UVcX@_@^}a>wTlOI6-oOUi{K5 z!E8nAQ3)Y$YoNCPtNU&gZieClHHiwu9V#M?WYItzZgpcsvcJk~2P+x85miL-iDEDq zhAw?)@8SDw7*j%vyUxxP!c`M(n0QrVve8L~r=nd)qU5hLaZ6Q`cc!+uelW~- zC;t?9rrxqH#q<3Gx$`|l!L?8<<^N{?QYg8Vf4s!uF7CYogWHC7V-rpABi~X1VnI13 zu}>{>sa3B)jU9;gU+-kHJAZuzzfI{$Cd~_dX-yO!X$DkjUEEXRvC@#fiGiSGB=rs9 z`-9}m&*KWXNf+Kh18~4hn%IwZOs7_^O?DXE-yu#nEDZk=&%%U?3Ut1?*WOE8W}9TVKqkw2zd6UKQs9r z0$&5s8z3U^ava`cb^$l|-`t*vqt2oN@Y}o$0MV}fD1#;Mu|yTwo}{|`2#5p5UM(zU zRx}vcSW0m&+EHLX8@sawFfmdC9vN7@45nJsllAsPJQC73{lFScu~MMZ$ahPtCfvGo z*N-@S?T9^w76*35P4EZ^THalZ@u*8NMkSr*KVfWN&jzO&;`&-6ew6H44q7xrW#cPL zMKfhhUR*yFJT;U%cLnN1Hk}Dp;1+C^o{*AbtbF(Yhqu!bJVkjT?d(f@X}bJ7MT(u2?MwJ_jV>x^24AN1XUlYN z($6j%@H7e-@2O{-Jc+Ck;KcGqb8l||EC3}8kOwvFX#_yzTq#tJo83viIOJH)eo_4D*H*Ub{zJ7GZ-g{YZ9zeI%Dq$(b<|0cpQ$ zZi|=QVl)iWTFWeJ2IuXl>A%%?%wOX8e^-5I0*XkRj=s9m10sTh6bc*=_az~|5v#2O zhAUg$`UE(@KPgX~ga1j`XXf$VK*1AZuBLG-eg@9W^p>N-TN zC+m(mxJ+*!9h?OP>kaHo=pt>$oeDoinzyF>S?%jpZT#^JP&&&?Pej|jG8Zy5IIh>>Y#=9(G=d+g$ub@RNn6_ zqk63xDl=#k912Ve0lwP~<-Ey+8rLErR}2K$IN5Q~Zytyhw0909igz?9RF~*Z7QJSp1?k0mrcgKvcz7k~IfixE#dPsV~va7{1&bu4en$A_aoctSmt4oU_p*MZl^#{Yu|( zSS)+T4ZT85Mk7hz%#PfNx<{2^KM=D$7vU{y4D9l2nOr=EjHPxd&n6Lx+{NDax%gMpQ9TNesjq0 zQj1jeGG09dHeq<%#OYYghAhX@(J201*AL}Djto?8ypF+H|6cs@uQp-ge^v$nx_OA+jW89UGn4HZ#Q(zhe!*&# zLa2MwS_N*Dp-;2*wyAqkKRDt?%LKC-AqETeC;9i$14F=jV-fpv>Ia2dc_KhwrK6C# zW)JF>{vG}iFi!}CG2>JcTp_pO<>jl^6-jf5;ak6=>J_l#CX$g#Yjkl4pTpeiTrtfa zbBc|@Op)^=wV~oAGmaO;FnCcpgB~>A7cv6{gN4A)a*WP$2!a)m& zmW#$~fJn1NmU0!1+OPT#%NW5K_Zqhd*o5Ug(@S`6h_AGPP*ux1(|>B~g>zT%YfxQ& zp|Bum#^TFfNW<8Kkr-l-8r|JuEVi4WGUOHTX7$mM7(j5uTs465G?p?l+J}5><1(UO z#?72k*YEt?m0K77LSjQBh?WyU2W*d1dz^T0Q{Aon+p^8M?g@wg4d1lLJF|K@w+UGQ zUaAjFKOFmilO0LGA^(e!Iu#F@+eZYKQ^o3Jte(8(#g4DKI{NlNP@Qf79or-HcrV~O zKD#Rc*YQbTglAv7Yw<={>M$a)qjPLWgA z0GPe?y`u*9+tLWkq8qV>GZo31Meut`B(`{Ykxv*P7P&Bifzm}O;AF}o$-#trP}odz zGbuy?F@&x%Nve==4ys}{>=;`0Z6=5KA(213A|k!iOaB~JNzj>LW#W^n)+9{sl{#|*(})LSjUQSR6+Z`>a) zOZxxeC}RK1QMO(I4X#0Vh0O=}+3O5As9W-^$a ztmM{bg;Dm1d#WO1k3!)=8DL3J5f3%d#JI@IIxqxE(+}ZsYFvP0fL*zfh`)x%R}!@% zTz|ec>X^IUP8NK2HOGF^6!i%;4ApeBr(t|L1sBWPZ`s8HAIq1#o_Mf(xsd<$;Zg^# z>z7x+UC}Gtev>g_@oiY~_bs3>Z|MkszrQHe5uaiT6u}WVeku=Qo@%@3?pAG*$ z=lJ%@g$_ujb!W*F@dyA}_SeE;c0hL+rWt2Q3!Ja=T-r$1KLF?BPB7E|Y#iS$jy)j< zgkKi3CH8hG5feX-qitL6uD_)Y1>;9CZMktc!$pp7Rvc@jZ+8|apB4~fd}+6HIOHHC zo}4&^z97UdtSHU>GY~RJ;YrGiTS`nQxrC|oxIu;iQ@{%~5kEo<;pO8ueoYl>D_K@? zEsY1Xr2nop=Up#7-PPV}+qSiM;V4H?#Ny3iFSDPRctX&tt>P4^!{9?dPL%Rh0zm*# zHc!+(LZ2*TsrVGB;h#?1%rh@dAY6LEQRmWdfsA?AFFhy|1Za81cj$2-#wh*(H<)zf zm_A5J`3Pc0bBdMjzN$oPJjg^Ae=^-mdZWzGiCZV$4rZzU+}G%E_AG6G5laO1N`QnS zlG$803c-N4^@}V~l1VcSHKP1QHu;NV-Myk(3s?prJy*XIm`>>FyiRd`3py|Y-}2~e5w+OtToV(U8eWHKRV#L$LDKot1VDJ zxyb!K%WNzU-4O05FqK3mv zqTq1XDCjo~;a;j}bbigiqN@+8UNpCy1wwd4{F137kyh`_hht<+jvCMBbp`COF=kI> zmgjh^mko64HrirzQXW4o76PjUHcVLXjN5*wVX5!J(|r1t;0ba}Y+WIH7f8~S8gf!n z!C?=bML_V0V3m#OiN^+GK-XaB#&q7PKWMdmmP@YxD9X^hg9+gQLt7-X@+{XiL669e zpShFi&qffong)lq2iPGA7xLZ8P0pT5p6|Cyp>1v9fYqjLQN!C|{SP`+u3)>;AS&~m zPGl0^!Fd-^%ETBTMGypL%Rcu?_{Uy91{NLb4i@o5vM{+sT|*M@3&*>_oMD>EBwKL6 ziLVHu(aN~o77pgXP`AT1ImCdyt%wB5d#rqNy_vnqd7(Dy@I{*PR6vlZX_D%$B|D@M=L@HM;- zOt7?Y)_oh)#9#(Y{^>bf3U0(p&GY!1YgzyADg;~?;?hA^21&nX8q#NW`_w2F&2Q=l z(w-FN&2kJpt_)hti+}O_S$Cu(6ZZ4sT1@HyMR8mF9bbLXhFU(3S(1WxVU-HKT@M~@ zc5U!f0jM9}?a2Qw6x(@dYydyqnTC;Z@-T82hh9-6Zg|z6A`(gW&u8ZrGUEvJ2X!4sNZGxE{ylzD!x>sUwEk0 z-}*ens{bCIz6M0igyWRDe%Vcdb7DYyPLLkRojnDv$6zN^ukq@h;PiFJ3K<;EOagS^O*UuG_rB|f)WNT=^TaqW|18(%ey zi~->sW;eBV4(1zf?!MJ-n-B?~1x@4K%=@*@{!#39SoKMTlT;( zOJ$;34P4UUo|%-pGtc=?1%TaKJp5BA#Zu$GT94(Kwa73&Jt(-z1yZg;fvb3#|8O7w zo?|t$fBe5_2%s9KL9==!NA};v!pdCL!?Iy{6u8ik3>T(Ad-cn8lv3AT!^0*=3GF;I zJ%Q}=q`qH59rjDEmt(IFib;#T2WdQM9I{Gq!1dF%X1XZw#+bDEP%2W$1dt>ovdb9s zA*zy#^pIj*%Q3gEdzWgn^;v8v5icgModkiL0xE*Mo)2VPCQC=&C(yuR>$E_$LW z+lJW0dffPkyVxR06cfN4455_LA6Rf8ih!eot$=RCz% zKhS}R2p#Z;a!n3(3=b}T+COLGu(Jj=2rmw);`!1^W`UxvJpHS!+{|3n6>mnU3f7%lUs(6&D`2qf?FSt}0#o{+< zykarZtOzNJDGSBA0MjpDRHqO@Je)YNqw}8=|9>}rKv?o0p=ZwHw&i_?ZTSIb_8Kmx zO<^MIyN>T3SF}tSD~>O0^aHU_|4>?NTGKx_IH6CO&MtG_Hfk~Mmf)UwMD~g7=SSY` zk0aWZxBTENGRk2^5LUM#jK`sIOm&B^zBd$Cg6h_xe9B>qHA z{YdYMa+aQR^YiVnZP{ul@{bMJE-x(YoZU!i*z{m}QdMU96$Y54jq2*~j*VdmJn_g} z6%Qa%=s#EhlaB?cJHIpk=mEtu4kcfV5-%@zv5@aX4UaBb8HlBaz} zR;hkqe%Y+GH);j3fVSstGE;>pfU_M={wo#ytFQ3CQvpCzJfz~n67L77)Q$!zxD?9z z81ReYcY#*0II2K9Eoy`p>4zL`Y{AM$lvh;V)OMj-uUo=Yo)4X06{Q(3hRl1 zhl$g|HS}ZJkMd}k!Frm;VX`g3)MZ1tvw%rq`Un_1Ya0dqoG(=l7hZZrfo69qzX6CN zD7*0hrvt|X&>xeByU_g<>Z&~_r+feXB?jTT z#ZMF0+lE7|j*ey(Wl9~ChM^c?+)**On@G2~$1&7G#)_4bnL&2&Lk|Y=^y0E%lmU^w zNz{PLO-Ds!&&gq7QbL^}MYGw(gg5(MjVoz-b~p!Nv8&OK_X?_io@%;*=es_VoXwZE zkG!Fq+@SHIhE#Tv8qv*=W28s{?wayN-T#+H5Tf&iyalkM>2XCsO8Pgx@`vPL^M7cG z{ty3%ANRQBGYp5C+eC>mcrefw$XTA<^jzmP%fp;osl<(A#o&*)b23a2Rv5Th$yy#f z)R&WkIfUL`%jp4o+W>8)Zv*WK!`>U451}Gj+5#qlH3Lt2RVwo+G|gRXB8u=E?C&Fc z9Ah6Bw34(rP9z>xynWexUEh>sPQ8(Em392I`1d3Fl|xK$+1nrq={@IUUG;@tKq4G% zA(sV6yozBtn))PBpZ`e(tqS>?7?ebi35>PKci9;TkhsL2sVpw}I!hAMmS<}3#9v?* zvpMhe?^MO$ipxl*t$92Y)JVui?f7((FfI>sU%oeyoRBGg9@_eW5{;?`Z56iaY8yuE zV)XcT7N|bQEvFu!hg&1A8-Ixrpc+^h&Zzwv?9N=Sfl$^#6v z9jU(Z9^vNY?)$JamW1i*jtU18&U~#ZKMn|^`Q9{S9|WuN=80r%pow^yL32O)+gD7_ z!*Da}dR?{c(}&9Ef(60STheIgvV@BCQo%#-`Yhxrhw9h#nq`jT)>uY!(aCrtlV8MKDUKk&r@@S=k<&fW#jQyr5jzdjFvkzV0LN_3pfFGkmz_szZlwZ_e=T zWZP!m$${ZPuG=5a^KO_$vTTScq7?)Og%g@$@1Hm+lVTXJcB@k0VmxKmSUysq-`XVg z%C5f~qu%elVcBW(cv_%+qTFQdDI`WNy$Hw6Ore}i6qroT!iEQp?~GTHkR2x&HWe?Z zi3KD6Y|Y1ihH_8grSk<4U_`vEHe9Nf954z-e9tzdJwD`Y#{ri-R{P|3z7#{i@AP$T zYo$q`bS*l88luNzSTwA0;+;K8vb|I-K1?cq+C%k=N@c_&Q04ufPRGnws#-p0edwOQ zGnic$P%t9&pGONhyb&B~du=3<+2wvm>EF;=(-ikpmh;?|cE?;l!zCcE+4{-WwAORH zZ&F;2_&`{$76|6Z_X8l>E+rfrG$f%IzEk7J%7uxU zl$u=MZ;N}L6om$)5QteR|O4`L9bCWEk(;qFaB%6e3SuO^5~EPVPbUMmLce-f!9x22*D38E`|RVy`-r1>M<$bwF5oTxPm?gm<$aZbYZ0=p zC&m4U9E+J~T?s>lS96E*;RGiDs-|SNO|LGBuq>}r^8?;>7apg; zoL&_mRqe^T7b9q1Ynqh5*bm9p4@MN||IYo}ym%0Gtd4=~MjNsWK-2muG^WFLLKTu_ z4-33IFMm%}CduBfk(N~vJ+H@f06cx0QTFw9FbaZpXW?X&ExS|6B;F+qYo8mBB9w{< z2|o%0PwVMozc^FxBbRJUp&M94S2Z^d9j)sff?0lEJvn_h!O^(-cl0F8{*${zFivEq zXyB;I81bb)Os5}?8Q_*C&Y%b9@PoO!&J`G*usJ|nmp}E4gBz4!%}%9HDgoHPZ;KfTDmPU`^xb~Wt=nx}{i34Qn%0o9HOqpNwrcz7&6@R=S#`dz zuW1a6H#_fHWv1d=EU%~mTCW=vk)PkT|GZ{QB!iRcW}xDLs}xvOnAJ@N7pxvWXRcb? zV|6+vHEEmJFn!p5k*kgj=rUK$l6i*# zuI6P%k1EPsjp8EBD}9=8nrWW5@ystq{-ovvq#kw^L0GL%_o1ctS#9@?d*1O3V<;sP z829#hOo=BX2rY?_U`lEgByfSJ9{sW}dHsS@6g)fg1$fBmgs^DCIVj9awT-=2KdT5> zg`*jLRY~Ck3y3+RzJ`U*Jb7!Ik6NNBnk#aedV0~L%&y7w700!a{jACb9MFH)@0@~4 zjl;u@o=<$g5^VO==(wqgB=zNcRJi@n+T{u0#J|JzQM3v;aF$-7Jlyjq#ujVm6&4e0 zk$5Oqe;JPw3EI{C08_#<&G_8n)du5}k2E3bhoQHL>K|R6kPfR^U)4n^%8{j#%Q2#Q z>Sm&4JK%8l1z=v#=I4XL4(E{)cI)bS?0cS{&2?<&aPtcZ6Zy7Q@G(9tL*nUfZ9gR~ zGIBA8A0A`NRL4j%y)bS-CZ)BG5Ph6Sq`Z?L)inUT`RC6;4mQ9XTS^{2{;#zJ-9vz2 z^ii&WhYZ-q%^`)Vuhe0D(|1eV%%`lvt9shB`RpZ26a9qzrCk_;wau?BvPbBbeNHi}_k-EjR?w3~zbfi@ck|r8kV4g`QI}gwf+j(@0?V7XfVh{Z7_SVOl-}E74~$~l>sMv6 zk7;8#lulx2{+8Socjgr&I1?g#n_1glHQ+Qo!%E_ zW@n!-J40fT^%UIt8d+~;NL?xb4{e*`rh>jhg;Nn$#by9mTB@!ifCDB^3S1~Df`<$v zf&_BBidJNBx!b*n89)O0L`oX^wh9&AUEiW(XWzAHSxW$t>2+6Q!Q=yZ&>yQt7Xd=5 zfDGP@`?$$8wuSrxO#&H4*TO`vl1?Y6wTMAsIE5mfYDwQ=5#Vm{i06>ms6HCisImwN zO$P83&)7J&bHPmjfQ;=>@li-n#rl?ad8CZ8%2Yv;BrE0w=Za(9M>XS1KgbtM1XbRl za9&2E9hB)zo=;ZJpgaj7BmkjFqEVBWFRr%8!$DI(Zi_bi0T~)jB{eP?n~2abu^|O! z#pHt-0;kpN5jgJpD05{%K$?{IeHAzgf`5lRGrB8xfvJeWd6h_7DtTT|oJ~gS38voi zDs9$y%|S(;`Um>OIjIB&S#79;-3~RosZn74`|d&Fu2_G>7RNZbBgNnjSnW66r%6F} z)6Y!oconZl0?0Q8wSDESZPuo(NhxO~^QH0+XP562o{iD6Yh79bRhcX=)Pj*BXRDv* z4|yRMl#AnqAOxEwq1y^mAVx@-;y~5( z4$S%b3N25>ZaAwD9IE)2tzL*tA_K?JQq0EmrAnJ(G717cR6m?pK@E=e7kxrheV)WQ(d{S zU`CoDg!Z4ci!%+}t0NFfhi{M)zYZ?Z4Y3!br9uc0_v9J2e-2aBVc)qD4|UNPb@c9M z9TsQNvrgZA5L3VboG0aVwem+~Qsp-|;8=4a)$BBaXF!1a$$TbW2)x(X{^fo_XCS9< zm}K}gS4TUb$Vylvg<)}1*~osF{FT8~YGdF)5cU09S$+xi;>iBUT{3sa$sx34(pJ7~ zV%}BEJ+wBANos}^V%JQ6_i}H^>{&(zN`J<8<05CW^A}IrzX-Px5S%Tch|qqFI5}w) zekDFoy@JSlW~2@@M7i`hyeyj*&oQZcs49e(o+KN8g{fs`e+-d@W7`@JyA&fv)lE0_ zE}gb0WL0?`dkV2s+W!7%&E%TAft8|_tHL@mOcD77vSwjez9=r4eAnEnPe51%gd>_3 zypXTSCVoIfY|6f^qMgB6bh8X#YEoaTIPwb0qEV*xVCKN^(HXUzbvtv03NL_N=Y-xa zd_+zqU~TRFl-aHbC-RO>%asR~N5(~*8BPer0lvPDVvdW`y?FC`qrs8G@AonT=B#ey zaK?6)8^Vg{?dT+M+-tTcw#!<<)oeir=s==m1rp^NFr9-Fhm}P(#>E@w>_<%$aUn(M zWR1p1xs`*+D7yj)F)BhR_46f?$8YW3pnwZPx_lcK>)frGCh3gbkgx@d@&*f z?H^x@4eTPv-msG@kX|*323WOeym1f)@G?2ydsUNiaWI|Za4%~a95Ag!@Lcx?z|zEB zU+fxaBLfzhm=tkYk|S!X>924Ju1pKEep%vMCPs04A@g$lBIec*7hesou~tN|Jx#djXHcd15;-#AVaSunUR(8O83toRB!~ zRbpQF z)<*Gr0{mrq@wZ8z$%7fZi6n16)7q8~atG8!bsFZWWR%xf#~4}Il%NoG#z&dlw=CR!J9DydR6JMF@6{+^(;Iqu zYTI(Z;AYxu@Du5IDnr2vvGf6ARxir>*dH{SW`8;3B6uR9D&FKWX?lO|O^umw-%dQv zZlNOu-b@tL)&fv$v*!PXvhMBpU`}#V=!jZiUi%kpxa$23F|k5iZHcJVb@Ta%D@Me- z!PQu_P1-k0%kbn4-gC0=KRJ_cHs zXBit%w{@-x{_FO6;U83Gu=}u{?u026PPeSbmYauGmgz+}`$bdJ18mu|tZLyBU?*8g zh9D|1&LiaVM;_fs+d+$E6d}=IiIFxa=DRu&IK*kiS*SeDc6gY2TplxTqK_=8$<7c^j_lN2Z%Jc{GWsI&gn(gs z^iZ1(^y2*h{883VdQhho4Sd!G2dpRH_gULyu%+}zOa-c=me?%qO>TikN|ToMqUFX5 z6KqVIxGQx_eq%;lo<_Bme8w(xMl}<80m`j>L`G?=XxW(RuUoR(F~Bp&zRuI1Q@|hV zVf%MWGICDBO=F;vloHHi*e#0-w6{`)Bqy6}B03n4SGGQ7ZnTG$YtMIakktzb>xFxS z*G&A>xeMzNsxDBlCMlOp1)v7H;ZrAsdU#o5DpVrM>HX3XR>Z`GUz$Je9j0h+h@+t< zik68#5L6mPa@&&teBfyy2YluRv`XM;nh#tBI;HuMAh+g<@^H=F`0#kxI}KN1q6qEb z^F06F(<2!I`DPq2XIb@m;<7WE=oTRd_nN=2M-e6v{^6D#GOtLJxX--GzYmJHX+AE1 z|CUaVf@i+OIV6;!Um4`O%vw$BIQykJq;e>x5vA^*S^Cu*w>~%gSj;H=wOk=ixsj$E}9~w-B1Zp zi>+?(CS8s}4a76@jCedS=0ie)mnWF}ahzl0Tm1VXCm8Zy4IRI-yUaBh93Vzs(Ulxn z_uG812ohHGBuAz0v(MVWN9$28X2`-J7!SW#M)Ui2WuO|C`jT2?ZhFyOp7&ngFqq+f zR@=T5r%~e{ES3A=ii?X275)h9jUc=!cihm7?{4k%fdys2ovsF`GFqx`1 zBiNY`p6b3h7HR9_5p?iH109#T?^Yt<5q%ankqyctsn$fOnh6N(ZPE>?_{-;jM%FX6 zkx5yjY7)3gF4meV^LZr|cD9qR3KKmD*7vTA`Z7hYG=ID5&c-Je1-v09r!M&F-@5?n zu%a3Jh!V}gMN+MSkoXf|lN~o}@E6DA%3{?kh5s)sEcV}6_}R-xw}TyX+jWs=NvLq8 zdUQLiK&lHh6R4_HSIICtx4Xje_LrQ3phlEKy#X};C>XOn?R@2-K?OFO(K9O+9L4ZO zO4y_{DOB_?$+~kuxOm}H0KF}1Qm_klfvQzP*(CcrZ`BN})rjB9(Fi&ddgwPX zLK8eOaWMF(jk{L@QjEqN)^d|M?ed$_(km3$Nx?!!@R%F@zFy?XUBrPdt!}eMN|xi9 zl+d(^3HCNzD7~knLO@WpL-N&kzvPvyA*Bn2nRbI`;Qg{AVNtOfl7X$)-xWpszxV&K z0Ktx4DLMvKfSIR+?m5j&G8q^y^8Pl_Us8NzapXUv`>kqXb28tu>Zxr~zWR6$d;`BMk2nT=N#c}p3D<;YeaR7a$wm-JiYymCbWO_GRwrxyTI&XHu@1jHf^GP{ z?eLPPRy$j~?eH3kOt@CfSn?EjpToFtf3r*e=+b_lJ%QsSi>@=b`j1aqf==`J_Ur5s zY+39;gFP8gCW7IvAi&a84krhJ)kLdCBybQYRl}^bosK_o-{1#(sc+&a_PVGckmsHin zUS7~uKhlYHhc<~_+lKT%3yk$~>g+z)yE3n+S5a~dBsN^UqVLeAMx5v+C}J!wuY$t4 zFF3df3w4iNqoK?q*iqO)l!ZDJ-0^&Nh3Mm(ePz^8rC>xh$AuFds3Ws9If`-ICI1QV zOvhKO8pa^F170*F_6%lpw)7T}-0SS^;`AsdDTNYk!NQQ| zA}FL<+m#RwquT4?`^#yyT*dsZAF{j7>i> z^e4v?HQ|V0c**v&FBvH3k8yPV$Y#&hC*Ar8upMu;7o9e$k*a(@oNkS9z)jV9CN*LY zy@>d%`!)@Y(~1GEv1SCi|I%F@X*YvS+!p|r%d;DH@~GS&EYcdBHKGEQ9p^6OySVrC zntQ;Do-sT5ZGp-lRJisdLtizNIa*{vewHB4@)taAbk*`6#J*!A!j9CLh_O*vhGoUA zL?R;Q`6xI4snQ3MuW4#^x?wBSuFzzQ+F&e&j#^C)E%vpMG;7uJBrdsRcrtAafr#P} zqJ^hmd?eH*=q0!{cx(}qdZl&||0{z=%FvVrCTkCUE)6z5V{2W?LRDARpf<=ozAO5m zdl90Uimh|_JYZUFy+w0oW({%%Z|``OTm-MnfeHC$OLO_>FouVxJ8kZ)0%Moi)3?wC z#k~TZV}mU#9xHkV@L|k7gdaN~a!c!FPf|25I`kV-^8NHh_H%A(i$Ea%Uq2EV1xoa$ z>qYftfE8l7JT=pz=YC)<2^vWuIB`RKnrd8V@a7)WHw9czL0I&YbEs-{?q=X;1!7Pp=>UGfv#=M@xvcWmO&3 z1JIAxp3%)Bfy`z)Eqsy>MmVwUhh7(?76EYtY#Yqr`&WL65Z1q_`6-tUGj zc;iogyJ7MDtURU44@fxXRT@gMs1~dZWL7*75|ZC`&z`7&u{;JybSwHB$IM`|cp&^J z`&3s0*7lauedIHa>}TZVjk$WSAO24y1MST!A3BPICORYUWSSO{e^gC!3l913f}W}K za@c(g7%UO3`+gZg(xsNQ)Us6gw*|UTpk4x&jau~knvM<#u-&=~g|P$*#|$nujhxIu z(@QpfLWflNNAxw|{^f5Xm=PD>L?nHAG*XT(XF)WjNxX0Icw6h<#aI14Wb=S1e-G$$ z$(F1OS>%C+!L$Nu83>84X`T=+_J~x=NwK>-zsX+I&n;fAScUN)weK#z<}AV7>Q9KY z{bWsN_z{0R+JS(yGKw$^s@Wbv*BwZxgk6wyK~YK@+O?cH<8;c`IVR+#t8fZ>PoD4U z2jKI2%Gdt^JpWZWDofpFWzYpN*i*!56y`n!VYO6#^WtLcAW;mApZjIwEF&Q$e>PvN zQ+EF@hBW@l?63V>nnz!@50@g#lW0m_|CaRX9$^LnAiA%0G%7r- zRdYnpk9O!CyFKI(#$X%Egi3UiFiJ3R+*slgEvLr zP_#`pSUEPWX<}nuY77R?ye12Uk3nK}f*A~I;y?CMW4`Ri`;%^xk1itvJx*gLrN0?@ z>YC?N@^y3grgj`R78PEl_XvQc;?_D$;HFYTRSgbq63vn8%HPd~AVN4jel=|=9kDDn zS`hCG3YkE0bcn+V5BTmVA@zGPr(0vjL{FvW`@rO1Wy!JF7{DH*CDo@1V>2L!Pq>83 zuR8iP(#ei`$HV0Dkj~6)IfWhP>K_jRFvG6!-gl$9f_OjCkXgar&ooEL?}wz7-{b&GZI;WonW%YvBkOGUTI zybI}hh~#1LU#{1s%e$i*4o+s1Wt_e4=9k^V?&iB_u#9Q>)gLH=S=$K3EPp9X&tX*QQ1(Rz@iLA}@&$_+L-=I&YkUz?1{g*}cJa}V1XOq@Z<)3< z=~gD{g)(pl=0Hv}??Qn$(_xAAN>F1$*iT@VdMJX2sMuFFq5c$tEr*<+l0|o^d_5`| z;n53?qPNeoa}U;!OegaOU}|bkBLk~!SdUTnx*ffpCRedyPpR7Q4kD$37&OB~?T;K# zZh6tb6pI{WZ-lIZ%Ha?`ZjE=Y8Ic~W*0x*2sZ)G+DRdS#1~g+0xpRLBl@dC```v{5 z>avRSZ3^gvZ1#+gR~{!;9=dyO(XEs`_URC}F-e?kRhbJm!l-wd=cQY}+?8)L17VoDE>3=oNOMs?1COJSWDt#^} z)i!~azdLvCI1+&3)_f~yc#a*lUF21(0t^jYz*}9zC^BrgAA1jiMNYI(NwkJ3*uT=0 z9p5}+w^Tl^yP8t-(s9W%lN8JU)qWW-o8UrYQ( zaQBLCqmd}l73v-^;0#3K>Gqf;#h*ULe~!&uE8PR$I|jKx5Nns2AQ~Ytte_~jUTjyq z`J@|vUhKF}?&h|~d>46Q;)g5&W1Ap&&=j{YtqCJoh>C9QjJ?HlIdrA|23O-9OHXF= zQ-#lrZc_$%CBMI-<0;dT2SL@pdNj%dbhM?f=h)Xn!^Wg(3Ag0{L4&;_jy6bo6>^L)FtSSaHZHZm5 zfos?$25O;S&HB%^3UYB|bCSAKH&h5Ytc=pT1D*ZBODgAOA(AA%w-_%X{-JeIy` zh4qmShMuskSE~#7z8lVR)BJ8+EWgZJX4^`BkR`4I;*Tmc`x!CB6C~-@c40^BA{m+I z+Qs^0XrFY^A{M|H}S+c#Tyqn3)Luazjm-{{Jv9ZpSh@cU@yoW zyOTKpD?j{zp@IDi1wCbahOLZ6-c_%FJWuPpatpS+oZ{0SewGsr5_SvdS8lc9zDZtS zs7xWwMw}F%h)eVcW~srHCg)scW)}1YL1M`y4AWDd@M_CoJpr#bsGwl?Fp6}~U0`8H z<;wcu1%w_R^OK=+M`FYGLcORcCR3OBX<1zIwU4go<30i!#HOav}rL1+EkzpLn&=|hA2twjHFkLA`GxZH;cgN$LZ{vhB%9uRa z+089!z+EiOxjeah{wBu`23eGAITw+4qt+_dH3LP>Z65K%#pjJ$CZ#A$uz^S`(#q*P zchrn`pi^E%q50e#1Tb_Z^~Wly19%>k37fX9{K~!7os#2w4mnTP za~)!~O+R@r-NHy|SG$DKP`Y)vMNo`;aJ7iUB-#^>L<$&i5z)>9^ptjcI*Z2%FPe%2 z0QnHW4yOQ{H$CUn|4qlqloCN^Mc;X7UCzJG+*DDSETiqJwIV|BysHa_2zx9-7aE?k zoaoz!AzqZ6yheRc1yS6+JS+lqA)hb=no!~5&7EDlPIEZrB`ADh!2VR3J)L0;frR~f z;#&-~U_Vt%OcX~KUC57${0pLB|PS9@@1^1QS=R7K96 z0WZtc8GE$M~x(tAjlA4-QJ zRIjnHEX1hOP4{I0gwMcb%?%M5#!?h{8EDPPH)*VdGvyb#Uxrjog>}xVnGEV|ObwT# z(r5rC2OtE|j;kN=Se`V?cs5jQMTh{RlZ4ewU;K?0U!Jq)E$S{Ej_gf0F7jD#dp>(U(O*ipc_LdtBP5bFDr_m_Y z>$rw`ya@f^H%yG1UsOOhErSzd(f&*UgW1IH@U$1h2g_%Z5DAS~8 z5xJxgeI+*Md<~PqxwFZMO4J4Qf6PR|@!XSpEB?s^c;AcRh&GryiszR!& za?*YDnezypqC^|L>1Fb*@9%{;m=h8v8@hZ~RZlHZyi+Ew`~a{!QI`R zpuvL%3BiK92X}(I1UOi5cXto&1b26LC%D_U`Q_gC`t|*~tNI_PjzX{Yau3&DA$jd#7^5rgrG?q{}bJOZ0+*!|3VVeXMsTzQj$N}sb4aVB<`aL#j7 zVtV_H6%5~Fs49<;qdD}{N>(2!#UN61cGt&#kq{6MrNycJ8lP^e&U-%kP`~s+{%-JQ zT*M-#U#CL~4{0yX2*zc6`f*ZP0krpi*b++>0}*kE`8~=|oD$$>5q8Z&1(ZvakS^PG zpTI!l)V&Zskk2evD=Zv%57ze(9b`1RIhsO{(Rp+rHxY^XF}k)cVzK7aQ46wI9;`mNAUADNJ??>rlhc^Lm=ddb_Os6sfdf6~aVfqwV&>3B!|v zZ8P#ETQa#Srq-}l?ic~&!)@cE8Wm39M4BpD0_wtH-6nDSnn$@P#*}NsT=rv+;CI*b zw!7sS4x697-0`-B!YCw!+2W_fnMyU1AE_3SCtaC*0eY8&=uMEXs7dzrM*me{G;NkZ zmGJ$LZpUYP1%PBSCQtk`{*$meB)OdrIk9EDS+1>?fXzrsppy`q>z9`nPKG`==z^n; zNHAdt_;Xer3Jk=SBw9v9Lom!vSHuVMWQ5rdSa{)hl{s|Dk=wqOcP%TQwH*(NA;N%0 z1N7^<*b}_p#IfuqZ_5b9$OUP)w0`fwx?(i+9{$Y&%}#1eLaIpqkw&sU@eyzD*v|^E zcj)cy?WyxCj29bLuH!FvrV&;Auf_2Nc2(wYhO%{GXa31M{_mElrt#+ zIq4GxU=Y*LH9B?4?PR~;f4$}+1&i%ChoHZ2^U z-qs>*Xg@PF^R|G@FM-C>pSp$?CBi!L;#1FJyL0SvND){9c?#XW>K z+%8ak6?smn0CLNbl7(RbBM)>z{)^zDSht?zE!40d&rvia2D0OlmTra#N%(ydhIHy* zD&g);v%PGzAij`tbM>29?J7_C(=Z$kseuZ;PN zWO>IU^=OB>#R?~YyA*vzm+M|DrhOwT;C?lp-ABxPDpH*mY41BOYg z$~(rJC@&4k0aLLVCu0r$xFghA8eoW;GrC$`O;qQw}m!wGDH}b}0RGFycEw=BqnWD^k z-{At_;~St8ChC5yni3@oyJBuc0?sV?CTK+c1kX_q>XetHYr&szfGFAYxD>ncB z2OE=qAIUn&=6l5S0ZaomNZb#4k>F#tVZkcOBsqFW-^*^$!t4)hlr#N+1ppX7no|J` ztBu{#vqZ--ovoLwg*6`pVF4~8?^StT*9tU=iw0|j*j1l9_fyUxe&XWOOk554@iI3FVM z3ORl7Kj)or@C_tt8DCZ(#T{zg5{yEDp)zl}hNDQtz9$s%Cv!18;eMLD%hZA-;UE|t zT;LMFzJ7pG$mlGFVLt-1_PsYwyQJko zrp(lx2sf-@B&6i2Tv0)&BQaASYS4Ce&1Gfd={NA2Vm*DSFL5mE(lt?foyY%7r_f4@ zuyZA3lCScv-?+XTZ-=~H>i^{9_l=JOGrJX6t{;rZI71hE{R-Z`^cVu0IND2)hRw_5 z31tGr^4Z7i;+;~77@jaCIR+epqOide7{bMu@0k%-! zL++|)e&F9!WAB}?x>q4m4t^*6US3P1szorL&8iU^z-E{kR?)R+4N2WO$qlQ@OJj1C zkbtSSuqKDFB{I85X_d1!;}NFFX<4E4nw-J@5CaLlfuCA0NR6`EM_Z+xTwV?1xPlDT z-Md`zdoScOu6bbgpJAY**l?UG-^N;6eo3o^$g74EikRH^N)qHJD2JU?2R#zha zpeR8ntB;8B1Fe~^elqq;--x;-jU;A-39Vw==-GHEyJ`!QYty|dvn)#Od&k(xs4}Jg z0yDB9A86q-duLzGV`%J6Pe@x_T3AI9aKaCLw#agU!L;T%a0|65M}I)SIDUxqp5o_d z%Fl;TCK6TrbZm@FmYQRbOoP(}5>SjWWVy{KPu)0ATi@CA&Wn_i zz9FJu6|*@ozJ6TU?iY!pmz8QAK%l^9PhFPL#Bi1;XBWyNm&K?>-H1-%Y!XHPHcrtE z7MKPNe+HcmOExIQfNhl6Ww~_FC*6$;iI}AuESA$AglO^ds{{4He9{_cjcqD+<5I&T z>KS<)pIjr3dlAb!^71<%5P5?^a}J^xoQp48|G1+ z9#)CZAG#+(fYzpCFU~iqY;gS&{162w!DGlcxu5WHEJh{Yb;Rj(*AvR`1!~(eE)`(& zMfdJL+0wf*2YZLUs_A{vG2E=7{)Y94LrQkeDoXT04}VQ#FpT3u9>`<8N_acI03%q_ zHc@jHga}bg9U~qf+hF5yU?}T3LNNd>#C@y4y6JpkO%E*m4K++$jnd)X8-ocJeg{+O zk4R(biIHEsd+p3$m4OPMZ`L|h42T?qP+Y(P@w>Kl*24gPp7YCzd4bHg+l175n%Sy4 zKj-LaybkR@zw#Z1sKyQ2wkAEG+%j>JJ$?Ix*-IC z@Od$0l9YCcI)-$*Nm(fYZ0wp%l8uv3n@e?`f@ohAy*+rtx>4l#_&RK1#eWRY(8idM z`XAA*L$4`kcfeBmA7o2+XX0kVih;w-6p)CxL82x(&{lpGoF%TF@ythlz-8$dZT@xg z0H3Xe=J%1$5zhlnFVZz$|3>Dcy;fb?CZMJX^pk>z9Jkr)jPfiw&CHKgFXcO=X3wrc zA}g(lH$_S-?}?^;>lg+T45G%w!e#skE3zqdtP27AJ0o(n)M^zTPF-qW18bfSxJiqA zCrh3tP@u&!Q};_ny~0*EbL--cU+^s+UZAg9=?O)B(36BQ_5nSdKUdx%is3c!{PIQ! zL(Zj53bHkwM^9`1C{@5b27B5rtgIpM^kyO&w-Rx<8D!u;@63y@(EalRjp?%esUMB! zTDR?tK5R`(jcFmD5cnjHg*?B3G)cstrvCq9pMS=xw2H*4=<8VhoUkagdWbg<-Z7(i zpe{&Tncu!3Sw43~-v>nlK!bNo)=|6>ZAaM_U~T`^=M3!CzzYdbSK&egR{RT?0Plx;ZxPZ~8N%J6MpFjYNc6s?YSWE@02y}U963wDuuLaa;)2xGW| zPDIKNBq2v>R%e<>=>W7O@28y2rQ(j#k6y~K1O;7wMlKud*IZ0x+H0i06j!QT!a1j z9UUaL&jbn@r**j=Hhexw>_t#r03Z+6cRnY{k1@wEz#P!9ZHk%}FfJ+Y(OSz4-0Ijc zrE<>7`l!%rd}Sf5vl@uEX@>qOPA%CD0O?0aCV$3~`v(h0KK#}IkfM@mA++t;8Z!1H z*E>{5ThvTaX&5LM*gXbr!-DtK2Oa99hmkcyKB~4F)r?8-O5ld%#C@1Dd}2ztieEMY zr&tx<@j<>K=96(l+ZYgSJW@a?BzluWz+if&I2KxF* zE8%ny1R)v}-~$ddvjK8MH}?FJYvw2#W_ZUSM5|Y-m%Te;f##~|-()v50>=8}7>+@= zM1nE>BHR&lz1=(OpLVGrj{5phqCh`w$ZYNq!e?=|#JMfM_A4166Dr9XJ@q}rg7@F4 zVFEx2f~N!ZQ6bS2t}^K^GnLJ3Ti{UEQNj^0@t(BSEaX>)3kxCW0P`b;$X7@HSe>`3LuWCwNCWRaxxXO#-s7*QepN3a!dhFXKzM z6WZ>egWAiOtNJyb_h#QKGVa$`em%Fp-XpL#%c*fh^w0p8zBI`B)`--PHypTWbD$Nb z#($U0LWp7?`b>BRzy@pU($R6k4K(nTNZJVj*_1hc+N}^GP5G}LreYwt4G^0_m2MG5 zg0dbkLO`Qo@b^T32gYgVZ4$``gP|!5#t^U8GqyK62>DbKm(@m@=^@sf7J4?`Cy&Cp z0C7u@(7u}dWq~|*C^%@LIH=jRvcnO zO4UKaa0b^Q%#9KxGkdI<*z|RDi~AKfLySXKg>W;|=yUjYvB1n-&2xpO^sa)Kv zyFFQYXwO-Y+W_vs@j<7~H84Fy2JCefMG-vOuCEftvtXb@z)?|ROwY#FX54|a4PGfC zheWg1GYmaR(Kd7;)x|E)=^HcMK?L}r_n9HArpZV#c6vmSi)F>3UHU&`*ny$a;7cPN zg5CWVY;sTqKj&YbJjd9=nRi?#Ro`MGMk_i*D_hqz+QY>Vfq>e;m*y}o=Xm*Pd2h}G zeUzL7%_-t#>FDdVjd&dK8cwpVmAF9)9&{&s7b49CJf}*A!j)YVyO>DT`v-edAw;@ZqOTNbEPb5wH##Srh`>k$ANG^oxFGb`gcs!L(MLeM#??fD|k2;t?0 z>olu%>G5Fsj!;Bw&%*4_JpY%|HgB9USM4mpr;G2z{j4&c4iMgl&w++bRm^;@@#V`} zkru0tYhRlzPEpfZxMd;)y@OvSnr#XgA?bpR{of_n3@Zj-s`X>}MV_)UcwSZ~ZL%})ZR@>GP8|NCv+`2= zzZqh_7bt3ZKV~f%*<#<6ESO_^Bejf<~2`XHZ@L|u7b%*-83@8B)0HkW0*48Z(}K9PNW zhU-)^Q4<*T8RvJe9}f;yyh^G_%k_TTvdLEZMwc5k5Vy}IcuDAaw$XaE+uXao*wZd> zoj14N*-gj+Ard;JM{@m;Hr76Gx1GInVSb$m=$LfIya{i>RWtI}&`5nfvdN(C5MB@thDj{G zT6^_#Z@@q$7sYybG-2v*hCx}Y4nsc1B}JfRga*mI?0wbB@#KB5xOV%IgXejfH`E}e ziUX+0F-uPLZyo!3(gMH+(my-bRPwjJHi&_nbpaE2*!B*kgl~;LjS)4hv$%h}GySU6 zCtr*JaZ!5~zd@hbF_VNh9@NEQ+kem7&HBW@XqG)(2hK~6h@$`d+Sm-5CDrc>SqgSP zti1#2o{z7ukPEvg;xGBY$W<*x7y(OSu;AnD$VlZ*-Xm(=()$QH@0E=BKg#h z&Tt&w!;lT&$g+&utYQ&|bc5zN{@jj6=PqS@fnA2K|q2_eAs(<;Mw!3Hh;%)m>L1@ zWm|sUr}b-@)gGE9is`qUP-gaL7>nA)@M=1_*<#yd9jvo_05Z8wSr5elQ3*Rr-^W;i zD`|kh7)&qcZr=qwJcnbzYUyErBB$AO?Z(SJ$a>iD;PoX%l}dPAw&fIcWi-k&A8+|y zP~euFzmsLm0P&igsr@m5S!&Vy`aH)D7tK$H&oL+7@I2O#y9%A<%HXs$=Fc)e?Nqq_ zLseY-XTAM)j}2w~_C`6W2jDfoOWbI>2~@nIr8g@Zoiz;Wn{fUAuq1_m5o|KuB%pUG zuUE()4Iev^i1qrcepcXW1x{97moU#hZ?jytS7i+iI*js79$PRKzP_qGI*di5dzvUL zZLd$b+l4ME5vcyOarHsD!{AMKXZ0&n0MNJ!S|3yaAbI$r)xZ|}D0et@EJGtMT%4@T z%942Pfd>!!8F=@|gLFQ6`VoI*|4ia`q$6?T{X8>t)mFbu4TeUJ{B{I>n_%%wDxmDT zGI(8&@Gd0J|}Os5NsaLlwcrygX`p12XsUuqs|#ub9x>$7zeerkMFTQ6kjQNlghtN$O>R- zl&R9)764phh4Y^fhlxojY49a9`}ZvG?2qRsMP82s|6mPyTqhx1O_yv=TJQ!BSrJ>AI#7x0w(S0T3^-x3s?lHTxkoBQa-97Za}#OK(5JYu|dYwKn3b zc6yfJ{o#?_+Kv|;OHC^MDj)URIP*pRIcL!{JfcZnvRz98Q0$xKr->M^PA2eeKQ+`prp-E1$N9$E!`pdew>{bD) zr38Ql?46O$Cv#=dz;$%Z14NRRUN@M3&MYP08vsDcxjQ(BFaZqYH~jkqK(CIgonR{# zn!~C@kzNKvB%_z3B+S;zTF&j#(~b7pFt{D4`WFbpT6oz*M6)tU>}Lw1z8a7f6h~QR zl_c?Sso-Zgs^IhVZF9G5IhfbzklTv=M&daK{;|c|AHL_q^Q?((CSS$LWK4(xr|#~j zLV7wDL*?@q4Ps89UVDl-RlSX%$y>I@(Eubeyth-e#E5=WH~VSXY;Y_!|JyG7t5%+! z^$*GWq~6@4RpdT5+IajNQ*(lz$tAjp_KeM^nEe$gAO3hv%nP-zST-b@vulH{H?@~a ziM(A$Y)V?V1qwICcUpO|3vvPA$auO02Hs0#FY)_=U#eEqr1Z$$A+NbgL``Pj=xQO` zW)rO{6iCYukuijR{o7x@8j7?Xoeg|hbP-e5e{k6wJi~dL)j{|+J)N$jPoJTKzPZ*6^9R<$D@Xm&~NR74k8cI2PZ}h`h_1BIJP` zYW}k%ak^`9Z0F<=|8h3eSA@p$YtQSEStq-wF?A*G+O7jNp9t8BYN!MI5}=p|x6PWA z(}<#xN+razHZ*rl|(S*v|0fyWcP%cfA%@77&#)wr5E=PSmviL{oSsX z-fzTUJX7NF_xf^0!bYG#Da7k|c;l5sX8A<@@YYzura*5y^Xf zlo$D7oq}b`rxUCfp5DxH*K&=#BDdMOY}Ol&n|c;7ryDLO&U20<03|JJjYy2L0@7C`TAd+)Sei5JV?Z;KV&wKRI|2P*UN$%(A2>^3Kd0~EMXqV-GAV> zAN6pmIsKYEW&Ae0Y+PJ%s{+-M<739G@}+?CGJJ$HCl}b0phGv=zZ(Etxg+hZR(@@^ z%vAzj5v~2B4Y;muYi4J3E}5)l&^H|zx> zE&KWDy5ErV--iSXTrmsUiLMh7wsWRstv!~gRxZ>qz#x(hPB1_3Lt^g1#5pwrB;xgn zt7821YU0tfl1m?js|*~m^}88xj8QAMv{Im?+?_(&Q0&^d;^}!DJaIf2f7jJ~Z%kso zp|4V_kpF+62fumY=Wn1SQ!{wPE-_@~cNeD+;WpfteXzj1(fN8z$+2==J`4)Bd=<42 z8ZVp0_7Sg=%O)2GA2tb%9Xpo=6{ML1(K?>>@@`in)796Eh^Q-lKfg3MX$E{WS7`9+ zdeE%ZKqIxQ{mXPO>FJ{x|}6!t)p(|CMBs?>dJu83n(;xAjw07m?aup9?RAjz+~gFB1|m) zL!rP98bZqLQT$uW<)E4h0r^TBv$?BYL9eh2V(l9cPOy^gp5cMY|AmijLeEl{xc!dpaR)PSCfaDwJnSC^IE6-jr!A^M-=P4 zp7j|1wS(*bk&F=grMr>XC3Mxa4CQkQBk4Z@7}#RBD$0NpM|o!=23(O;&^>;a$vbSf zx1DTCAnO6lKf3k13k-T|T>E8_1Ht$W%nq(lLj|C!HqRT9B09MaYbp5%wV-a5O>|H3pC^R*O*(cY! zP%!SxP6M=jcki-RB@xE3Kb@QUOFqeE4o``&Gks6jfRM_X=M(dn@q6sPTl`iu+!4iZ zKI>8lcL(zzeW_#|w#O<1jIK*k32<|S+K=F9j+?SB8xA!sKPR8ACh@;nO_Yf_dHh20 z_5V9nOXtXH2|Z3Bez%`L5B6QN zmws~2z;{t{hN|=v_R2@U>GnrRObNu9kP^Y=&=-#K zP)fc+Z&@qe!vJLZ*Mw+J9zr5SZ6K2o$k;`XKZ98=E3)9Pe_jo58ZJ?~t+4#fkR$)k zrFrAB{~ou1sa~yn_F2Sn#qT*_%P?`-l6q$f8wr^i)|Q2t=eAiMl-fzMr-h6z6jYyF zCyx`0XCdmBv{&?HuK;g%oi1NE3s#)SjRxuD)jvtNSbtnjKm5C8 zxlPr`AR!&Av}YF`_!L-PqrQ4Xd)7+Y5DTtgoRJSL^9xRRKCZ$eD$<`<+8zbXl;Z4{ zS<1d*-ZOycsl@f;0Mg|}0A4LRppyOV+z}-#Tyg=*-6i!j03oGx_O(^e9i|&lg3TsH z_|iB|&-THvTM&m0AbyQlqQ2~Is>Ux1f zWSb*=F8cF9Tw$6k5k07jaWJzK8rIw&B=->#PF=0Aszo`RJg88lnu`tH7j{p9Lfq_b zT`>PD{*kf>f-o$^(TRX_c-bS0dhO0&@B%pAqY-nEEG6vOvvMuSRkO4R&gtB{K75E;gIqg=gftoDv&aKo=WHd6(sZSpw&t2EFTR3m`hyXUz&>?SuY~ix5b< zKN16^X~|2&O&JV+njD%H7PB0iC;14m{T;j1j%2zCT)#qN@|L6TMI6-N<@qX0F7S$#?(i)puOJ zT~k+#Szv9-$-t{x1OJk&HqH7`3oV}qoaIzI{P6(;a)8G@?@zT1G=|iFwBqF29@7^OcDC6B;2wAc?;91{<4?q&! zpEB*@GdY=%Ix97T?fmeGFpO6cKVfEx)gT=X?nw&8<=PWtg5my$XvU+m2ZE5Oq@mDu z{bD{LD^K245zRkObm`PK1+faAGKOl`ILBEXPBlOS_R|!#O-7t`C!gimN z;r~3%&AKC&6n&&a!^<>vNDP|GVi6HlJ6?yhq5nb|vd^sCp$Jb~iRy#>?<@e8Z94lh z4Yjv@U@|2O6oUimafm_)N8k(ugr>vfJ4Y#CSu(swNlE=J_CHK^il=tKs8!p`BfI?z z!UrtOd;)^iSs;|&xWs475$Vnmo<_D2)~cd_ho^77K$EIa%Rq7-%PmVap>^Bc04!`!%F6GCsnOPF9Tdyv6y>%2S)ekU3e~a-<`*c zv^Z+f=W{fCDWdG(??|)BLVD`tIhHB5-fh_O!^@itWiYLZsC+&xQA%} zgqxT3OkxtbMMH-vk=XsT)G1X9*;JJeF$+Cor;|^d^6`=fBp@04M|K<=dJ0`)&uWCj z{!r^j*j>t9_$8=lrOwfczDPf8J2Kb)iLqWTcOcl6emev+_}0EA%UklRqn zs8}clIQBUPHV%jYZf_;<_Jf2`y92Wlg#lp0?LfoNe5ChZaWemX8n1d^*I7YMm$G>K zmbX5U(DAzdB%i1h#XKaDwEBqJMKbmaSFPW2ZjIU!IuQRzQR=|3QbUwXYtE(ZJHb5| zE=0flZ~|@e>SqISuc%21lzC0drq8uMT=cpYY3;XMZ|c{wzwH)_qT??d5VIhCu#Rv4 zt-V)J&F*RCTYy$BXMU%%=yr!gw_0B?&;*Z)$FnXA{0)sDW@q3l=c(5!6bmi=J!q^F zW}NW=t216qIUL0K5O|h(@RF4}{UwSrg3?BYdF?kZLwY)qnLyfMtM88(TW0B-n8*cq zonPeRz>&P%yVz${i$a9)OM-%UV#8gJ{!pQU zcy}^;byCy3ClebIAx~L1C9S#JBKNIAd96kg=tisNmBq_*Yt&`RKyp55_q%=BWLh3A!#9 z3Ohvf(5A<+d6!m|XwmE^seklzfp2HSrk&K~wUpxgC9bz9Wfm0zN#`@GtsJDdi@Q_w zr|=^L^ngO|+efpjKN&f;KVd3xkRX@_WKpIuX>r&bp66dBs&U#GnviUc@_wUXbhgG9 z`VpKZ_3Zw7@!@zXan)<$eE}^k{?gahS2GRC(HxQ8qimWv`|T|(0wW;ruBq%f$_;0k z-ysL{s;3nVe0wHVe;}aKw(+lgyYt!Z(>dTm`H5zJ1_LRyAsJo}nQVBMMq#3YU8tm! zDeaoPi-5td+w|$)4g|kL7>9?eVG+#2fEht~Pb0=3#W;<#_W59+w8sU$kXzgi?oyWF zqja2YbjtblONlU^1zq#~UfGzxq)0CskzRl1mj;aqxGje(kZN96LFv{)UX2xag+PB!97%SZ7>Y58mErSxU00pPi9x9mu?-TrlEio{_#9cVvy+ z)NADnarN;uDQAfeFp8TldA3VeO{?4+$O}Rm=5>ryKixY##{-&;wq0u${kp_ojf6&K zZbtY$i^Gwf<~Sq|_%bpZrqXs%4*U+@V0`|*+YM4Oy;eS1pNHWD z%HrA?Q0`LolNec|nA?t;tfo;~Kwz+MiL4}PYj zCsvO}jg#y;^~2oiRr-~8?iy!?n`GdhR zVwO+2+;B8S@eiT-alRT&v&gD*MlXvjO$E{s5#)(l{uHiaT$T+zn>JoKIa+O+d>PJC zNX*rGAxum6j4mMJ-5HZ)QY<;)cb-^XtydtgO7OH3QYe&VqKG9{fNCmzA_%QdF1 z2nL{f-rP+T)7fxYBRvy-@B#1HbqNdX?Z?I$WLbA_@|XpL>#qewpR3X^Lv0FBWp%OP zkEV@Q>Qe5|^0SB1u;up6cdxB+eskO|E!Z=koVdTg4MV9EyqE`PhDUDf<_FxtsqI0$M5W45sbDoEV*q}Z@6f~5=QO!F?Mf}kFfwhnxbnW)xNPO9_x$0{&eBK8^ zMaosh7vBNAI9*r+9i_7**1Ty&tNDwcB_J2G(mFV9h`AZ; z(h-`Tj_@UF29Z1Tt@E0`7w?4cyS2;R3uU6^zU&0VCl@ zuQL?thm$B{w?4w^y|B@nhn?AIh^?RfARGw;XNENjF7`bc@|P9cCD720TW-}(?M~Fu zG4mdTp+&qKG8p!5e)R`2b;?y)Ug8H1N#qsA0n7B8V$#wqUF!$#F5!0JolXYXPqX4( zn(n+B*G(Dhk5PD$byKTZu#VhF9m%yO&u&}wVUG%DO^sZ;z+;$?5c)MGJE2%oI0~Y- z!fvZ~s;@g5=}BuXE@P8M6kBXaPFya%Gu6zMn5u6h)4-m702TdyZT#&=uZDW~NMbSW~ zX7I(*`z zos70{C1_g_3jd9t&9gqK#%ejp)(lLDgI2#`G-2GOXGy&oa1C={IogU$?-6o0pmsXR z6SxCPt%l%MtAkzEBz~~{N>uF6B}-G3-z&`3OdOlqzT=|_y|^-bO?Ru~S3q#JIWn-j z+Ox4JX*{Pf+YHb(B9ro`>vx0s$hMPK8^e)S@nqFFcwY6{JEbitOZ_F7I?(JfELuNB~rt%#p-0|ul2+O29;6$N+mJH{1CG#VgHit}8< z4PC>_ZP^on%45G&-EswyLAcQ%T+@6jusCxG<|pEgM|fCvy&@+D#l>lC>Vd5Kp6Vut zYk&F*gFTABvFay;!%TR(yXk8OFCG4pY*rAPC)e%XGz{eSJB=9`ML>j0fxiJ6<}v zxz7W%qE#8}TIUCN4i?zTA6CwZm&WbqcXk1lbL{C|RXt~ZGBi_RfaM~SuF@xN{Y0$U z4!7XsdY&`15zMFuVz$$gH;Dnn98X!Qn=yuUup7tYrH7SWCjP>4ed;wlfMNF3Dm2$P zq+1Y-BRDWo5>$6Wl&utjao8@S9C$TLI2#`3Wi)CtzSg}Q-u@ehFlOdY7mUxbTD#`4 zUcGOFMbh zTU^*dbL|-sxixrm0Qi-c7Xoi#IXs!yDHBfb@KdMd9Ex5QfnbQzN42MuuE}NyMbYNa z+UvDY_haj!AGpK2GP}9A=#`^r=VQ>DpJB1i5HLz<8cs{U_3`vboB-5M%)gTQ)`C_S z{||M~yu#3QNdTOri3-eRe0D>3eZ;Dido0b5Z$_Oi%e$)B7 z9jkYOlvS4{PU)w$@8&D(#TR?6R?Ff>F=q$L+B)@Zv3~XHn=CDqqQr1%*<7&i2tl~> zm&Yw#R(;Eoo?{-9YgEdcaQF6wzVVP-RnbNin339iW}G+OeZo0deE%ApJ;7qNCMX)5 zd+B6IP;4TtH(jBLjkjdrv@}1p`itnr__BBfzFy0?imK|Ri97gCo#0vKVlTxQ=fWX| zLNkC|V)13YLeczgb#ZCJ>xO5VMB_b6&HU6;Jz$A?wJhdPfclvA&z(8+|MfDc2<$6< zs$X)o(s|43P4TXAU%z^XrZm5V(JEEkUuXt#J3MwQnU?OsifugtS$3F4$~ znWEuwA`x73RY;0XMr zY|T~z;z)c35fu(>xwWW%j3tfv_YI=*Xbqj?ctf3{9KwD>ok_5j1_*i-rJ0exxJ|5t z1yq>ZS3U^`?nlbdD1=pqA>cFFw6$#@9x5}jvOAcCOXh`$;^WUhwh1PBy z_f(8`OT7{V%A-t$KX(z%3NFSMs}qp1S*8S>tXt0cFuI#hG{wBAG|&7BI4E!5sTOPc z9aRQ~bh7?Mq$sP|#wDmL86sedr8TcFgg$J*SQ6bW_tVjIbB?Dyso2!+@(~lef zZ7igSUF$o2f&rcB)o6?=vO0%+9rXw+HyOJdA3Q0Vw6#Ma!uR-@lTSudp3{?Ca zb>$lX$h0-aW#1c*0W z#xsCk*{kGJf-)AYy#F6!H)f=Q2s!SiG669q?v_JGFTr4#V>SAK6!yk5hSpB`;?&h@ z!a3a&1ya#lt9vs1FGNPBrgFVHo#3~vPIM*rg%B#hbuUF<)ddoLt>2hW8_LnNs!jqv=0RqHhvH#&&##+<$vwN- zV|g(rtgg=GSLFS+A_R3>lcU%>Tb90~OA5{PXz+2~A)dFbv%pJ%Y_T9C%S{l4z}~27 z)Hi^Oq{FtioVlP#vX{-20H&d7QZ`f}VrnkS+GPfOA-|9{^@Cu%vt9xkFCET#1^Xy^ zT!js@MCt2{WlF6%$!v926U`WWoO{|E#*ocO9U$RQ+N`dsuB!=N>XEWVpgK!LF ztFDzc)d0#cEY>t#*I=nZBupwSY8QdNIR(o3n-F z;mq6H17M*zSTzCw6xKt4mE_;|Na+7Y^!}9AKYLYNke=-nydoLdv`K5$-A;^~+DJj| zMtm9?W@sAqCHLoG>FCOS_bb$n{RdXq(hVW{;>D~FQc6-D2mah>qfv$KyD0YfHM(M7 z?_n94ony{f9~#@J>S=2WF56|E*1H$#*CuQQ96FzoGBU*hP(knz=0Wcrp;!z>%~90a z)^(()*ExANIDg231Zc`DUUK26#&eD3`s#b)3wHcxcMctu%LthZE><3#(Z!zlKq64+ z0r$H)m#L;m#px#Ag_uIzx~lnZ;|ge+0kZ)gS#F7hYpyoISE`Syyk=HW*t%l}yZLtP zyh&Np@f0;%Bkco_LwquXgB_t|DaS5PI5hw`-ukR1eh%2l0>31S0)6MZ_dwE|qhBo+ zEIJFNyxzD9J@Yv5Y%*uCFDlAr8OSp{fdg>;pbwo$hA09WU?a+R|EPNWnreUQn$_f%U((!JQf!}fwBmd! zam(vmeAs$B(@K#uwiPd5FU-!`WD==FP6ZKXG-GSpcOa*0Pg;I6X=r%%=tyUUL1j-* zyoy+{74MV+n$7Q)Bw&l^&dcSHY%woyOs}4E%42{15K*k5^zQ7|=8gw1qUX%r z5Q01kw)>m@J^`_xvgXZ`A9oM48Z50ot=j#U@Xv4}13~+Z7Ykpb9Qhv==W92dOwCLD)De?s9+sgN%3u~(HIz^6tj>;~+)!hA zhlok)?tmerH4t@&qvL5XJ44f4)O$GN{4@I36xlM$g+v(U7B?aaD68Ea*L)EfbT9sj z!(O%%zco4=*ytNWp#hMh1;(Hhji}m?+F}p#rHE6x@3n@u|o} zFdn@N@DaU~i34}=*I%|&JLR&BZ4SS`*Ec;>E6OF88-yJ<`BBcIG{~lBZoo{}iE1r^ z-N)GP7MRh=*#GCV&o;vObfrR(5^U`6U-2>eD$h~K-*c2yJkWm0F|@$x9K0e}66j>W zlUfatLm&_!2T;k_bTx9Vshbrl?doFdD^F2{`=EnDOdxY&JJEDIU zo&;eUj90uW-nWQeR%J*{N}83U7nld#cC6&3qfGmk?d=+^VJ?W!y=EF146qtcYBFl= zuht)U*198*e7=T}ObOA&AABKNNVVCxD#NKqMApdzZ6dNDa$5Rkv*VqXjZrm3H zUmnLHy^MJ0b!>U}jR+xnwfcEgx2#)La)j39Ta$T#3tYx-h;(b&&o29o}^!AZ@)&44_V+VPcKQm-1zNPTFsib%x=iE2Q$ za%^-w5trlt{N%`hM;vTdRr45>P+ELp5H6P&<>FsjyFlP&5h|EnZQmA7 zQe%k;yG^^BUB#AJRaDaQV&%kAEp0Yy#~687_~;IVsoPHD(&$2XG3=CJF+rY-lMs4* zxl=y^-Sx3H7Yeqt7W0cT_Q6*IpG23}PLSQ~sU^SRafm%^t7&$O*@bBvs%&Aj<9PrP zn4MmC|>!=DM+pn(9lB9ZbhL0>=4Q z%E%ezTb-wWf92Kr7`1(1-#(h{m0!%e)bt6Am22$WzxV9kT76#8y)^otYuE%#2u@G-uRAtbiy}4dY zSf5hO0%pw}x!6ot#SauU-=RZ4Wn8bsih`qQb$7nVllx!~QrN4_s2w6J(A<`JgST#j zYQP(}!G%`r6I{r2!t`g78oEgvMe&1Nv#Ld?xmi22mT&9zL8+aqwb1*eD=IzH%!^3l zRSZSSqJcvWD3SxK`7iN85h5FDz3C3^T%TlZV!q}95eQ*P;9WKDL~%DEzIw0rDRDeg z9)$v>+8fO1B|j#OX%AGNPjvj2K|At-c7Df5tgmCpUEXPa66K;y^K2KU5;EBIkWJ2|%}()2~76mP3c4WVSy?tA^!2hkgo)l2l-j z%tZ$byZfByQx}Q22`e~!V8_R+{I-dQyk{SqQ&%RhxDFBLNC*=mfVOhE|D!;EH*86J z9o&Yq=+4r{dnK)PqOq z+_l8(N3BgwQO8-Z^1BxW`Hr05rur(tX&D&k$++{OAhN-G4mn25pI>MTWcl*pAj%0< zxfjD>nmfpYb`ypF6t0mIGxH~>A?gZ_(?H@~R*D)*^Lv)J zb0)YPbD2Kc^sodbT@rxnt@`7M;9h-5f1k#9?Kv9B+DVcD1#Hs!{S#Roa74&Ty+pzI zGC>jqK)@;(R5hFJRU|EF$(5{AbF&i{o4c?DvB*wH%E-JAkt}T^jyn*;EVso$X8pWz zG_#4=R{YvC<{U3uQEUoVlCdZAj-@a2myKP)e(-U?{isW=_)3 zeA6^s#@9vIO*)Y1mZR;LX2S#ICS{`Seo0#}3yw(00O8_#EvM%C6hZd4lbsAA^mu#b zJTK1Xi9Xzm$Q(+9XEp<0$oKvI7+TyYlGcznhn0u5JT`EQ{Q#pOF4XSBy~=W4pd>|9jLfZ(*`9dM#%!-4XviQjLgZ*p1T-#BxkYo!P--taFvOpUhUP1H5K=mLSA z44!hlVm6bCkqOPBL}bEJj*I=viWC(T{ZI59=!M#rfmwmgg0B09hCDI(Tv z^4_^bOIqkQFk!EH9z-RaF(g0?Pr{Z|``1lKNdqWz_F4p*g36no)2pG%xn&_@yUVS# zRj@^Q3-$(Aq|qnvB7fldz{`5(Ade39R_$_lrq(^?usW_HL)!!z8zx{=B>lnp=lZx9 zmVd6c{lC)R=wtKdmqk07zp8j-i!pl81}SBGA_DH6!knDP%t8aKdgkx&V+!PBshZgJHtK_Wa zc=O}YI;A4Tat&sh4ozCJyG$?Hc@3;_8HbI`mp%e!47c?Hx=7{53Yc(9OPK}YMhL#r3%Lhtx>-KBJmw4n?&0Mo*;Aa_rT))IhvRdT=|1!IYv@ppT zir4a|2S{vF3|E;y@+}vP3!U4M1(m~PYF4fuH>(ECW!Sxqco0ZN*kd)dN!haelm*`c z1|kujQb$(AM7&W_>sGVg^b;xM6zRtMjGWPFKadkXWgy6=YbBCQ4;7In7qOY1Q`7XP zt-iuHtq5zKz%%HGTaVIQO?+ zpt$ypZ&arS9$*;_H8w1=CwEhQ3Y7sbTJfQh)YPmdrB?)>0Smbd;btBT%K$kp+@MU6 z-K125Kljo3EYumRa62qz>~b%*nMn6p{jh_1NYG_)hu>C7RN76F0@1`)%H@25CTwHC zMS7z~Mu^HqMecKZlfm9Was>bPU-G2HXjcY+fl(!%Mc2!Jz zMZPhmwr{Qr@b3@q!E>g(8D#X5ot3BiWtV)f!2a$_dvh;b?4^=kGB(s;dz|Mo;!(O= zE$r;4q@#)fdrR4yI}NK5dxLvy(%pcpCi)7;f~o;4oHw7zz6`v5?c(f=*J)taR%b}T zHwyf^>Q;U^WamGp!z7+chLv zJ*IS6C%E_rS@B^;K`b7N5eo^}B>ECjoW}Dx2c;ul65DEHKJTYB2QPoYwD?4Kosa3? z5f^3zXK8f^s+~2i{ZzKor%qxM)+1uI#JOoJa`Q$$f2gJ4H5{jO1u&yp*C)G)pcI}L z&tC-Z0Dsa>)@j*Wjf{M|YG8*h zkPnen`0X`L!s5vG_r@AA6nbH=Xz1+mi|FQoMEk$0*gBUa{XBXv#Xx3Vle*|eY7QY> z7i9j8duf07qXQcmYjyOLf+U^a-yQTN31p283CB}e-0LLa>AgHL)9kLp|-$k6%xf zG2%5Q+~@)qZP!a&DMJNG)YBc&8MiMSsDiu-@QHJr1T+MP1SFh;3LMEX)>C+Z(=*wy zVSdAAV#T~uR!y%a@&w)hxWuyji^`f842MmgFjjNCAYTwLkk{bu0ZnSW>;z}igq@DP z)lVlHyuK3usy09YAytGmb>A#4LuYo_$zYoaK~`JzD)t{ zSed0n$NJV~xff+)RSPn_=@rN|wH{(nSoznqk&d3sdxtyscBz!gCHSYXlRVmYS-c4> z0zLV}g)8ck8lqYKI-16xr{=T76|bYJjv0DNUuTTwR zKg2!&f-0DHRb_Ij%BLZ{+`Oh8A5ziR{a0p<1=Gzn*a0EAIJ(7M`gD@6#HGkXHL@4K zO;bbWP+#Y2i`{7|)n=s7j${)&teZkD$+-4r_I!+mPNWTmcumVZzdRwDBu=lUFmJK8 z1T_AvqA=7xrf{W4mP21bNLXZgRB4-Hlqx0&HDoa<3Fp*lDJo&5gplnHDgwdEdn;ox8S_@0*X5c%kq5C2m1fuy&*pzGcMF_ zJcGco%UmyWhRXeKWFB$$D!9lgBO*x3ny$v)x8Y8`so%2qTWOQwFxKzO73*eWqUW?? zU(dL8`xU6niGzs_OCV;$<7(h?&Is?+x$z1C8DpO(6Z$lxym^fdl^TkoNXCcjbJQ1u zHmDF=y&(Wl@K%+X1~Q?V58nSKOSa!Ho?gesV3GduCU2B@kSVnKYl?c}lMaGhwAj7Q7ewZc2-F;{SU9$E)g*yTy!D{~og%o9N%|22yOK zK=DF&pz;60ynvMuGr-&azn$>a`o~d6AJ+Ek+Q87-?9r}nf2W32^2;?%^S3hc{?bEu z^oUhj^xKBwgl6D6lT!RX@}IQ9LEa$74MGR!kr+<)_nbl^1*(UpA@b$E&CH9l6Fsp ziTDYU%gD;^h@W18I5E?bF~u(T-jK_~qDbgIg4=|(W&3!oRAV^@qiZ|4=4wi^TT6$G z+sWLs-Y;dYp;8)w>kEIdcmP>4 z5@7e|dEVkp)^mn?%NdNo=yb;wH)6w#J0{Ye&YRML9w_-OkYpP2L4>dV_0_e}GbK5l z0T>;#J1xTcINc7JA70M>?Y`2g+C2w@ljP5Z{K8cLYuIhr7YrESX_Mo3tJ&ExR32Uv zVac}E#l&Qc5+hYjovr5m{o?extwo7E$+nGlNr^d@NjWa z&HR7VKQ8~j^-r$zuO26#T=HFS{Ko255cxYB?8ja8_#Tl0r^C;-fb=JFIHhxG<9%N5XfP z*QE7a;+P81kA!eq1+H&C>DBxaFKfSXFM~vl-k~45QskFaIfSsIp)D|&6{=UOCONVg z6@<%;kldv3Mpb<{i#=Em?0ZGV>%BGWD!$CquhOdieU#T5^E`<|fWdwoA2!$&LV!?*ETfNbrPE#SF5K9cOIWN?;Y2NoqQY7qNMNlfSf2fKk~ z!Tb_1Evj5Y0fd33xaRjV8K7uxRew(|faU!Ga>h2%=tihdYExF9X6N7AuRLweY#hu(wu908{Y6PWhDzfLmxpr!9i)myOjOn3HlHmt2xZTrrWAi{zsf|5Y6W>{{%hEFL( zfu3xZE4*kW32V_gDeCxnbDTkCe-?^u*Sv-Qsfx(7bX|M69Nov+juVpzJad7T1o8bo zH{C}uuBZsV0`T+&Xrd)D>?R^>m3X%>^I6ePi5k6QH>NU6-??C48}si;;;whmGB$!m zwB#)AKNEchXs%QF#CTAl_hw_QM<`?Mqv3Cwv(PCG$r6Xp6HW84ryp;Q^55Tc-&J7F znP5mz;x>NDaHJ#|G^@4wGrk7BG5smuI$J}{h7p3wZ97<@x>S`_XqIoz%iD<))83Uy zUPBO8D$r7s(G)5Zwirrv^{QVr>Lqpc8s_cOTe_joI?hDC4C)Mf&BGG3m=`fZwyr1L62rt|^maCcpsHRI_PC|PGk zNd|!bN#C1-Xkjbg@X(>>_lfPUeccPIDeVi!3j>&82n~HZQh8rI9CfB|5QBcqDXrvT zcKZ>)y$nra&J9GshruMijv-Wq+`a|VHgpU;9S_Dj6J8h^8cnNi?Ax3tr{dcfWU8^> zyuf*vkl#s_LZ=l^-VOAfx<=wMLZ&Lnd(blK5yA(n;m~Ynt1|Xbe-d|yfdSRz)HKB1UEnb(ub?0VO&5e4saYniKqBqqq7F-~Ge@~G2DQN!e|2ao_ z7U);aH6{HDth!Rp4OP>cf>&TwegCvyk34mfFB5iG=x-$_ef)wQ7O?Fpd>Qtu;v>!e2nA4B*hws@#h+dmqk8W31NtOVgbOs zmS_9e@#In_!%@S9cbhS1m)e>VXuxp!gcX*+^1BC9WXnMt1pkH%34S%wcFb5FM)Uj= zX~G*+nvfD-M{cYAZmzdXic46y0yywUfzuA(63E zoIF~Jl17RAjrWxrrKG{FG?J-vkmsQhDyCkPt=+jBddJy%n58g`jr|0YhqSl1PfLjL z+{6mwSL%O4Oa_uM8xWl)6cR9zVLXJ?iy#V`W&|4w2+w&Minpfa4aYihB zxla+9Z(zp5hX>aU*GG;$Q(3DjxC+hTAPY5A=dXUv@nIpDGccUWwgZ!s>S9dfE1i40 z701ivvbS>n*2997!BS}3Z~>0%f;6uKFGjNTBcx~UUoa?Y@cGjniH9NSj+PSi0b&8q zh!EE{H2Ta?-VQfCRGUP=)@xRVwW01kV*JaXY0892JFj07V?qEgVSj}o3pgrDG8?uA zc!2%iI-spMk2Z^h(qte>q`-{3(`?~$@Re6Rt)#=GDLeg+h~%^>AjMJ$)%c{+pwYXM zb&z|!%6cWLJ31{@YAsBdLOvROMBZ1}rzmKXV~Ry8JDaqI~5u;6Npkcww}B$~)u-Z$y3m+o&LIX2KUTx^(A zw11anR!^SA!tTyy-?*~*W;iC+lAfopMkUq7wr2ym zP5(i;ZSccmE8jZ)rboB4oz%IStrzKqg$kz$Zul0Mrg+7s9t5IX3P7Elq=dg>t6sGg zZEgPv+z|x2$%N=9R-8yR2RxFXy~c;!szDXVzkH$Fp+*Iak%$gneQJ z1)nFT^&DO$#y^t1ji{B(eSjyJD`2tq|D{CxyXcYp0*(0qJqh|axfR{Bcf0of&HA#( zSy$wsD2^P$q03OQR3EpT4UvEAv8Pkbjo(NG)f_6Y)JXw{V4cOSG(zwkrpf(%sdXTc z>iOVFghVDIUGzQzzEHRPMw;g$cYdRH?Ux^T+sZK(I|C;sw5wgi%^6ePYBM@0Ux*uP z+*ypKQ)3qQ=fjg}5C{vs6IQSLl9vgBQN~Ha4?WhJ%FNOk{nNS2&V?V4avjgj5EL;} zG|pmgZX0nCHC}Xu5LAb$X;P`$_yi@!UR%-+4zX`40kvKi-+&eX2{#U`?4l%rg{)7E z0169@RBREju;T<+cqymVlPoTXLi9G4T^Sk2_7UO5BsI1L5gp^6cAbX=2#VhJm>XdS zV`;4p9-o!WC{#OvNafK@;;_$;21o6oc-g-P)|vqPkh$vm5DE~sf1vzmImw6RFRq9g za6jcIm+}&jIpPy-6XuXNMgtBtZAKwWgv&a==Cdx${6n7^#&c?U$`ZKT3(Lo)UPAC~ zAfYgc$k|^>roF3>?#9!!wJlGlm4?yLV|b^wV&C-S>Z{`ax00CIAt?rMCz0h6#&eqo zj=m{F)F$zW1*kvTI}vB!Qk6yOC>>xxfetB1e3Pv`e(?6|qw6BZJA{K7#D~f}<|F|a zov=$`O5Zd8(ukxI_OiJFH3p&&B|O(y3vCj9Clqf!5=@|0{OlZnPYF)P7$nu^P`)Zq z4fuVsJ|N^5irpj{oJhpsmQz4VQQhuExPWSV9(B_fz6=`lK3k3J;bwUd=7^g*my<25 zsqjS3AkM}){3&7m5wC=^V1SIc*1o9ZlFe+@Z}qYxholEE7pg4Bfk%{tCE?fE;5!hckw4wD{p<(fh#RS&nF#3ooE_2qm0w=yuDr?PL@ zvYi4gjGU~I?AO=R*)|Ghp$nu=fe(jc^0 z<2|oi1SxPk5LMki!vI!Y>sYO@MJ}(k4JWR%YVb$J$2429wt&Q=#THte@wc}{bkF?c%Zj7T%QBgm#Mw+s4G_s!~{gMPA$1eoVJfOFQVP$Hk z^Is}KCJ4Aev4r$k=++T&ld>Ch?I&ESxKW_OpAU7<(4p&2f1T}X>c5mn$Xdc7xJf%L zWcEo?i!(pHFP{ z?Zpo4Bo&?iOguN2cPm<(U27dKbj!o*t#@6(`=Hs-MX!I+Yex{q-i~Jt!ko*oPFy7I zmO)x-KB6Rz|J#XVI2`3-WlZoYB>9rn-{r+RzOv|YP4YXhF+*ClS^0VN)s*$c#H8r# zna{>Q?^*Y=U&{`*t`nTCrJU@E4%VLa#x7C4YKRQv&qyB?tdr}F?Ol-^MoR85qBj$W z>tEpZXuIK4u4Lzjh?(fVZR|eLq4Zc|gEnOMcV|H#skG}MbuHVLbtj~408;>9h@Y>E z8Gyi04A%6Gl60p3SDrAkXz8LM#e#*N9@??~y?adDjazKl)03G_O%GAhxMM3h@5_UE zDM;Y>(xu%f+Gx=gLRvS9V!En)tZ^y8gMWyNKu->N3AU=-gF)vrNzG(=|x2 z3^4E6d{uku-Q=6wj5-7DhEdW@bsz;^OB?yKBPG)UbxP|M;Y0!+yma(jwLrgfICZf- z9UZ#e)Mctw3Cy)_n}K57i|Zd{i8$?ke%O?1MX#j*g1zQ zXzUhDK@o&~nT?`3g#a`QZn6@x5}pA}1}%lONKLF^M({S4}n74Du*JX(Z47?u2*6aw){9 z8W=qo4rX@<^pa&fCgVi{9v zxwR{+N6ebd@xU;kPi~d@dxifnwoGR`Gd8d#qgj2V2B51yayZ7wUi_^&%iL@(fC4Y?oQqI#oBUvH!L4>NrdL( zaK+D@La}$n;qs?)MmJ?#au~0v`8IjKOSTq!b3ft$X>ouMg^LwPh+IrE1bBfsXU~p> z&K=t@eWve&1}S2z8sKUn{u(>?`VwD;SFlZjeQJNMatXmG^RYm#oqN8|Sr(b@8 zqyq-T=lZpC0}bB{^jVUkbFA?YWeItZbbOcJvd?!K$fo#Mug2kEheJJ)y(jOX6CU&W z&eR}oa+?@K``ArS*}mza>KNI7p>wG%ds@L|Hqi;o<03|~=k5}+9h}=W73Opyx#;sD z3QxGQ!kQ}0DmddrhtS99is@k9i6Z$|xec5DGtXo9wiOUhK-`RmeGU%`tjatFxm3xd zolGk87c$}~S7qzQPx(!k_VgD_*G=oZ2*yf-kzdwF=KQ`qd{d7~tix8%cI*i?AteJr z`=yLRZiHDROUvQgl$+du%n;p-2`fF2r1!2ImTx*z9j6Q)p!^qe46W)`ehg6}#pgo{ z?1+r*oDLRU*)+f!e~`zCi94>uF9sovJE zAbJqmTUaoNqpLFSj#}QYPto#^kp42bzBVCa9Sa#em z@@-66PB?>WAreijY0WOv{I_f4S|Xl>SeQN2&>8-^TFMmjN~uZz7mlMqD>tgi3u z(5jDd5Y1^4>-`)i%AaDg#O|M{UQIZ}aYT)f+ES3M_an*^?if(sOkEG{v{IS=vZuRs zSTs)=IvK~v%p${HH}d;xKe^OohWw*K)VS+JTNFn3VArIVOt!oG4Szhu56{Hv7nG#a z%N%V~FkNsX{3aQ*|8-$4-51a|bHLn2sIORX&=qKV&ay@YG2r*>(TI}dSv+NH-4LnF zAaA9DpA&QGj(zom(JS)yeI1cu7Iu1KAA==!BTP z=~hD^NM202g?*_qNvz>~DWqZGXL zWBoioO6N3o`Ns}l2!Qca259jf1_X>kFFsZ>sG;_I1W;}-v^W3u7f=ysdjx8Y%ED@# zka)ncLvjntWPuXDj6Q`1ka=#Rd0v!*l+Y1d)9GdQTt56Y6$vDwp_19~q>k0nuUvdMUzpX&0`T)swuOus%#qOU_qd6>4hKeHKTdgu z7QV(V7cw&6T>W*y-nox1mDp0xHmvn5NC>Ynl^#Hi{KPdKcc^r6-+3i148G9TRcA#t z^al$T(q@EDzLkSi8TxBS$*r6n{k^uWZvO{Xmez;}6DMB_N=WCTCW#TBO7@<_3vQN< z95$-N?Yhn<^0JNW8$Xi5W{o7>*OBy1N-+@m1urd6uT>skR=h6(k?N~E1uLtv z;J6m$b{#K2!r0I^2-_5B3j7m<+#iz&(k)z6`Uj)5ms9BWO9fD#ef`yx|8|~*v+N?a zd8Y)!qWkLG*|4-~a^m)=IpSEOd1ReW+GBBwny!7|p;CpGWl-MB-JthlQaXcTaWdUX z0eZyCNEOR?FD#AqHJ?3kJ4neG*wSFoi+`P4vV;|{3nhaGHWU0Jyno%S#(u_VWfRfB zfE6#9Ia+Fr4eGl8h}hvNxW+_X{TG59$KiMMajL@0oi5900qr5`Y`=>mPDvRJ9BeV{ z82WLZz?o@IB*&4c{O608nrr3iuE@ZvfoZ3c~+pFUsp~ZZU&+(68sGzB`rXyW;>fd%D?Po&oc`k zm=qZMjD4>~#!XK2a5VV_wpW}GlI=MAz2`eI?|Ou;wQxkh=~b*i;V8A3!@x(|88^oL zXn*0P4~6Sx+b->II9}dsxMQqGQiX*5S}i+HJ4DD5!HIHLOFdCUsdL|gn)_k+F|n64@!ReM7P@!C!cQ8*+`v=U*T>&d}o=S}>_xIA{qsQcpWa!D~0b?&StT!h))7K$t zxf@`Qf472vD{aYRP*a~n2yYl?gI+-y88OGTyxbCjw2}8-W&J1f)03H7TN(g;=;B&- zwII+kj86N(jua(1{ZzV5=W%-VxS73i0JOiQE5Fi{5drYQ!jt-eAmBKjffz|{G?B&noSiKL8FMC&G)Dcb1(c(lq)jF;u;rNk~$yLwkqP)m$b2LJJn!z&Z*k% z<2*<@!6io!Mpjk(zH0s?t=7x8(%*J&*=*DbVIwGtDkdhR{~N`E?BHXDd`!>CAyn;G z0P>K;2F2C>uXiuvk#X9(`diMTRj*_EUOLby0zz*+o{4W5#D5mz^wd)LIk*=2(;O*d z`|+V>r>iV&iN=4nG6UPwu7&RZ!SUr<7SXOQyiGvq|kU{@4LP7ZWV`?Gtr1<#0A?=y{3}b?Buf%3NvpB(h9j<3b$sT3 zo|}8M6M+cHi|IQ7_O8^684&!0WWRpW#l0fWrdNCW^l8yV_O$VT`JDPZc3l%dtYEkI z<)srH241k4pBSQ^mJzbqH(QhO0II8+oQD#*N4UcZ3l(Vy5*X!<5s{!A4`*knN{`A$ zT6`DJ-{$YJXADSC#Si=%|4|w}_c@Df(peHMD;9%-9EWLIk&vuSy?Z%x3i^#oM=Hn0 zbhd+PuPAD8SZnhBq-EVIe0R!%%BQQ_tR6M1b$5-zb?3jh|>YsP=iBSC7bL2B%;=tvGjsos;bod#`}^iyzSWx*h}e*=4-C5w&tp`2^8!Jj zty99H1R#a@G}uakv4c5T08q`zHai{uSHu&R*{?4PsLu5Z49MGIIy@?Zk!HNJ$CtQL z78ZnCTn-ipSX7|r2p_Q|%?5pBuqSwB&UYbMcR#(p`8Y66DoUvj$%dG9mlJeUseiT|1x3ePt(=I~ zX6(qT-jwB(*ZA%m?ZFss8BlDBl906Dn%&NBPwIO4a6`ZL8UF*lZk|szats3jN~{_E zzj?cHE|%F4m6E{|b%f0GmsFWTAN-{AB_562!sJPBS8rLU7`0?QG3#5AAbVJvr1=r;BG{$zk> z9^Zze^W%MnRR9S)F{%<3pxY|DEBc6n3#9%Pm%rE@nwJEs@+esbJZe46im!p$4JQ?= z#`I3o{po53Uy#^-K$XY~juz7yvBu-2cfu8FYiCwZs@YGz1~8^cT50IY0e65nZl?_) z&y*S;UVeOoGYB~kWo+pj^+Dc~1cQhHt72$LSmMXx!!1J$|GER(F#njTQ2IQO5*XlR zmBFR>gzNv2BP%)~DVYrbc1N`;uhT=m3KmrSZuSO*+lHe@eb4ctaT>B;>GM-qassgy zl;F3*BC8h7#Lg4n#l%_zoiJ$+nd;A!gy*dcrG6mC6vVQG7=GNBK#N~nd?@1MdZ~yyD3gCd^ttdfrhzDB+mO2nxY~c zmEiVHR1Cw8pmIZh($WPhzR&m{>Bs$xdJb=z2c)q|p6?sj=cE14MOIGCvfPS@;HZMj z=)d;^u&4n2M|Ige#762nrE-=ds!_5;*RlwUlGVz2_r*lIV{(^K#M!W_+Ct{G9txNC zXnLEUI-6=MI1)UK3U;`$W7$8sD_ulif9b?JIEU2D!Iwq+-cRJ##)DO zXG?Z_5K@${dh*$rF~`ffH7p?;dDk*C7WFv_lG2Rf>Z^Zq^Orygi1*6;0rxGnBIodQ*8U*FN)7%~V z=$qJi^2{oC0pTK6z%l}E-Q%8bHTLZlw>4CH=No))a?pLcu86jJfn=iJ6hv3Kl10%S z!{l$wo@_iz7p)czWvsPSVx2X+qwpPcA8!oK{AK>EPxvxXVlbmNlGc5$wuR2e^o0nc zKuh4BK$yN$J+XaI*YD^wG)*8cgIo>9>dR_`O{c}`-H|XCLo$GRcD?@kXY|%eAn1<%A4ymKo^o@y z8dY+b6}woD<2Cl{Z|q3kQh+hNgT>iZ0G}n&;kN`7A7r6#v7aMFbt(a1drS$;Vd&pl z%PL6X4$O)SyE4lG!v#tOWsO(jpuj^pCO}BMMDjT#I5w~bIZm<7B<4HHU9J$NhI|f) zY{=!rg}jt1tkg)JKz51XJ&vdfzLiGvSWK0$#`}?Q7kz_)*Q7~-%YX7twHeyN5J;k7 z-YJb1C!94m*it-!wPo8wPu$gzN!drjU{l$D!}Ac?$k1$v0-zW)a?-5KAD1(+KeA6J zD}DD|2#{g5)9jVUZxO*G+N2n9T3Iu}CZHq!F<%BSoOT-9*0(x1-^#Jeq!95vaq!lj zu#+S~H6P)g69`(*NtTj6)HEbpHcc43_%r~txRQkl^k9IN%&$uzN9>xFWJCqgCzt?& zE&$9&4^aMR07yeRa(GP*_)x~_^%$_jf})=~9&WOrz8qA$)PNIgMz7m7fxaUpyf@b4 zTh|reZ~r@ZJc3ybDjtW!xBlZ*sem11sCx zeaZ4N;8gWDWr_CK!U(;RC2x-jn&q8@Kf|`a#ibRSFxF?5kC!0w{l2J4GTU>DwR4{V zhinjKHu*Dq6w(!K(c$R7)=5rWwVgS*BP^3~i$l9{bdnH}A z-TIZucWNn28nkuku={|awpz;)6|=qHFOjD>!@IM3+ATm(X|oK>3!TOO;BWpo_f24=|$Xz4fG3z)QWPm(8rcvPNKc-ee0(j?Pl_g1*LCV}RQ>5`0VT z#b9D}){`4l=fyolhtx0af!Mc#Pu^C9!fdVcGEUu72kl|3g>3l}3mkk?#Dx*iKgq`F zQq=7K;J*P*H2t+<+$3W+K28`f@lx#zpli3XDQK6I4IvSAtN$HGvLAG)mfKJEbH29q zME9An*b@l$dI5*!@8{PQlQrRH3Iiq51X|{wSD1U`75V-ug_-8>^|`!4c-_geu*$+m z_=T5~Tp5HjR$je6Q!dVXk1>WfoK`ljt}0BUKQPqBB#}IXIG@8xd;(K{fy=(E&^vkE>H_^)sVi-3 zt%hy}A^^Jxz9-l9c!H@OPQ&4v05kRMqU=_qdu+1yt%8gsc!2LIp7V90*ya33$-=fG zy~X1O{3G50zEkg!R5P;pZ_2os*v{fx3FN7U%`xGQ^o0mZNj`YR3O=z1W-JqD4fXD? z*!K<$HfUPoIb$S6TMaDsMRMdzL@@c0?`CVKd&2JhK^j@q)dz;lRNP_dN{h75zRr{c zXsd!)@PqjSY=tyohPQAHnYY)RJ3wLSSOR=;YExOx9^?)X57wN!Ve8lXQ>M2}C*XA)=v4-M8FPQC>d0 z2l4tXLWLhb#M}BOT2?mCbHmWfdgeZu;tT2r8e|-+0JIkx-_W<;3BVw9jM!m93A@!+ zDYlCdMojQ+{X2D;m}zb%A!g&MU$fK7Du}u4P?gw-&R^s)P1!R7ycp$Iqhq zz6ykhmflT+^~E*^}x#tO=PC5u024 zAI-^YiV>K!_cH=GB%kel`z9OeMIi_o5vW8_=rGeGpTcVwuO6Ud_`qpCRSiIlqFA7) zoPbxF6J7y&kT(E(oTP9Yg9;!_vaXUJ3ZP@(1STwO&(C30s{Ys+qI>yeVU1aQ$f1lx z8`gN^2xX{4FOM(Ze%)>I!|@Bu)WPBm^?~Kl$wh?+bg{m3lc?3P{){LmPp%AQ^QV*X zQYM%SA5qA;`BXIFc}q$^P2j&<$RM}tye4fK)|+~{GllzBoII|ldI@Z`w6AaV&J9CD zYv$zb1wS3u#Wx@R^Nv=0ku5;=cBMGEn*A!fck#c8Z zr!;p1&C?$dd9pK=?+AnOpUTMIWUD7q=N~~}zzY$XyrQT0sPIX&s%s)v=ATCU|6q3b zoZe9}n4m+UdNe_Qwz<}cjP@w3dr9&|y!0`5gXhq5JStsC+Dkq$Gh7jE)pLbBBc?_% zYZkj^;9guMEx3e!e$c~_z{W9j<7jI;v~IQ?c8n!)VcgoV;$+;vMNyDPl{5z*^k%*( zVz4M^Klh58?id&J*s~=!={4;C+R^@f#0n^q@AXz<54rQS*Ue5U?@gq(->P0o$GO}` zrylxKnD`!{l9E%b6kA~8hQ@7qPYm>^ZJl~|NY^?RX zP<}GM|Px0~`#jX{K~3r;d`&93Q(~+wH-iQ@@VoWd#OJuEXNSk9~Be{OtpR-y8)?t(3;O z9%Gn0mR9G}L};8|a8_|-IwT4cN6RGgoa2ived9AAU^ChPQT}p9{Qi@eUbi#@-NwxT zkUP_>w&FM<0XZ`RL80p<5T9qu)PWfTVAaZVB&IOH!4=tlTVwwp;W=h&5)m*tG*~Rb z{>&2u_4?v91Ao;sk{W;m3}oarQlmo$H07Di@cg^RSnaTvJCZE!g2^FDeAw%-P?fMt zDtCz_PSfLt{Z~5-N~Hdik_#l+&M5VQBf-PKOITGOyz=|&PhJVHLdD1-2?jc07s>{* zrbIaTm)R^?YK2A*Lh86w|^i>pgWVoNd z>~AsvQG7Mr+B(V&#MEFoVQ5KM>=}JTaq!*1_|BKJm|c4&Ertk4dKtXe?Z+Aqev#2( zxqrSz$Fl#1xy5BIa|%u}!&}*Ckxt80nxB8MP4OEBUU11m!1>B^<^Z92-+`qfwnOOk z$eWusYp<8%ckSqOYo^^TZyr(1O_IUAEWYiTymgd#5g5Ec^9^HdojK4^_)0_Q;{Rdn zt)rrhzQ0jIx}}Eht^q-ih5-Rd0qGQw?(PrGQIqp$_)_LorSdvwR2p|k?XG~Q5z=VeQ;9ZL{N;%iHtPLbnET48WcOm@S)|t1O)gMc5v-&= zj#d~7%Tuk!RU_y}|A&9jqh%d|E8pqpU87?wp#ma~Tt0u@g8+p>_MlYlJ)F|UhCKIW zAgwwefdeR(|MeBW=(M85(|8_w)4#exlI*{IK*=9coK_8xt%!=7d58QTK_dJACP)BC zqi$8*R0eQH!Z>_ig3`cs=PAbBm9vhaBPhdahKA`AF_2Z0*Dv_!z7CtF6ZlEnd>W=a z>Ut&oj$nXL4Csliyhre)phx@geo$C=<0f#8*f87s(e&mqUqbMZ(e$x(lV*ZYb(iKc z><@!nV!ZU-W?W>o>{<3S^n2hJNbFy&=zanURijfxp{+kye`abOMKNKK_?3)xJp3~a zKQuww>USfKBjH<3m;@CvjD^iGD!{dEPo_1B4lf|duh3AphiIq3&Y$mkXue|Cv^yeK z;ZJJLqDBc{yZ&+-{gx5W>QYhi=|LWJ=|BiZ477tn?VYCY#d z6`2Vjed|m8`PR45dEe@wdUL%XIJht1rE?>R&4hRagj z3*WYS9x9*gOwYPfvQ!CCDJXp6u2?t`nu?EW=q2=f_#0;&R%y74e42Y>9*b@o(G|Ed zPV>2u>dG{B;})lUZLlMN!h%r6K&qmj#0w~3?b2TjI|&X0qS&{J^*Es0vp2_#3PvA~ z@nW}DM;kQwBC*$=VFhSy0xK{DOOU`S@_w0_{czt^J-J&gTSqmL6SR0iGF27iU4I;Q z7Egygzz*?R<14Jl^NO9jhR_#`ujqIYi!NRFvGwJK6b5%j&P>K4ehGh4{`itm2n>7#$t< z7ttiaUB)jz)}{sBU%qq_j74n0-KtKJ>#R;k3Ul{qo&JDQkK0KJ-+^h4#>m+nYqcbu#D9k0QL0 z)^zt#ZewDviEl=`^34)Pbv+FE>9i;CbKyDe8rW#=j{o7<7{1m+7YdW8Y9TrDC)a-d zS@Xk;&2PIs4KS(Q`BzPk1zY@S(Q!QE26-WW8fH8@=U5EU?|%!5N0?llOBntZmuK{j zrEIwvc3KwUF5;%mn~QU3cbd5El}7aWBD+4e@(L*iOX9__;z;K$pjROj7H>)e+5dq; z1GMkxO27<=5kLa5meN*#7tDYy>)BN+QWYF5udT2pg(mU_2?ypO^y8M25qo%@82afQ zC~_lpxIO>6a|jtv=}6P}-OFI)Z!5S0#BvO#C8>>!u3EKSw#H02DVxcx15yCd_L=}t zvdND6zZ7=d+hX)&BET84m%0@T==?`X1EjY9X*6%qxMeW?kVAx?_8lo3Yxi{niLo8v z!+=#p$8+7tzt=enAKK;pO%1_t*8egnmG?I14W1V97gF&qd;&u?HS9kLiO-ERccw-u zmXE)topv+?T}Bu1#0a&igh{A%pDjzuz6W=wX1{QCPD#rSwmLJ#2|r*#x0DQ?YqHS_efzSCH<>!<<#8>^FG+pG5iD1 zV@%(>)131ep6>56D3ToT2aC&?Ph6CCEc*ODx~8m9nXf#??qwVK)eU6aw|^XkjyfvZ z$)0Zhyb}?2{fc24!TGSEkP~i}+K$zK++lnj2PP-Gnj783r~qqDd(paaKEHj74q3>4 z5SH-}i{ij0>x$pBIJ;%eR|tfYDd+F}9wR!B*=##c8DZj{@EtnS@DHWizfK*6@2E54 zaP1V8A3czKU%4PU2z=h?*dd0th0=Y4T4vo;eeLk%L)=@blAw6o-92JJuRf7hDLkBR z)}?Znc5S?UbF*a($KbK^NwjDSh3z6(hV}H}-Q~9+4nY+ZJtYJz)Yp zcgu{O!ZwKTzQki>z!*yGn-e6H)n~FLmgd5_llegGQ2UV(7f;leV)5x_dJ&GUy>|Oh zDzScNA?QD7w`MLdBIh#pQ!(~)v9T|DW$O-KNo84Z)M#5|V?Z8P5BK9zalFYCS|1&3 zqg(!OuFFApM-W=hy~O7T5lOEDSRKG6C!hduk`p<`b*@#2=_|5P>n9RMZ!6h{57o<`R2Kmv_O0n zM+b?z_uV@xw~h`s2T2_vt=V^6v+bcU-O0h?a|MVzA#m0wtqxj8w!MXD@|!TnXIJa(M_Z*xB)I_n zU7QhndeoN&Xj2Z~$pA>%;E?wVz~2PPkSIg|pNTU2V4`4720#PmL^fdDK34(J=e;7C zXJ#jlk*2?+|GwW`DL*!CYK|GqFfS3J4>=6Keo=Pg6IXQ`(PP>XemoMV2#Q>5@Vx0R z_=E8MxRvCtYr&(Kqy*mb?X8g0Q#G81by5~n;ma6JM__x& z;n_^3!|;5rcP(Yy{^KfUwQ6_Ds1|fp*?m~cLE#hzBWEsRGwn}P7h^;Gk6|kSWZ-`^ zB>!)QZ74bTpAkF%Qv)3jp1j8;rZL^U&FLPS5%~(%)K$RSqAHVC&*FbHz^-N~?*@G# zy4xhl@aMp$GmW^gupqtu1*-hJfe)nyNV4aj??5MHOw3O)TgQ+rh{$TPnfQQtjuj{N zO4Ac(1RdFz2LHP*Yl%J5C=dJgFNO6@NNo6YO7^Wp8 zjr6U%zl|kb{Y9{&|AsmmJ-_dBc+D=-h$khxr2e&jJrSD#3J(c|rI{Wjl2ABA-ma5H zWC{B%X#Q9^^s9BvEasg%U3AQ{gEvb%aGJk;@WOx?!|(WuvwlbYz8-1CD1*5F*iN}$ zgLXWUjy3|7Kq}Ok8kZ;2ubyTHRvI0I!XcY)%o-Ut4iEcZhw*Iuyu0RU3iB7eJo9&Y zY)>yRP?2QUIGKAE;VdzvPhYkE{%3UVwOL`W!4N%RtIR#A~jn;;7bUbV8R|3 zrHJ$R`AQx{9($!Ml5N02-MHerY8aj=Sh`S8ar9Xvr{l#}&T7XKy3`D6c+5y;3E%?|^Y zgE^IzL|wGbW)?p}?d{T_%3z$6^H%uZ3zYf^ooS3A@=@sNnN~?<<%cdcHNrw?3u3^n zS`aU1k^}BmWld!P@Hi7tC1N5(Sz3KSie%OACxIKb=ra79kf(Wb`@0t%P_wX-qgK$` zkJU~Ipfkq79N3REjtXx%u+u{p9M%G%;!<+Lf}1Gx@@jPYP|ly0MJoCs&VulG9<$Cj z@U2yiHGjE`6g_y$ncK|i0^cddn+PpX%l6T69%Y5FxfUprRyU%--^b!Wct*mfqp>@k zB_R9v>b_)7C)Z#@cixD90vPz#-SY7hMhjYlix8vhPmv{JXk{-kw8`Xqj?ZXdS527Q z$sYRhi|>#cH6+Ksk0&#u0IZnxY6B|hE?<6jkVKL*bZ6kq@&!{yzF=hUHbZtItJL9- z(9iQ$Yzc+cSBayKIvSuH#<;G2MPBY*C`o7+$!Q`u>g=#1sqGqjYGRrbq|-DER}A04 zgxqMqRh%+QxQ%B=wS3-PsJ#Y(%gFZ#e628;t+J@%6Kvf|kVb<5d&Al)d3zcaNhBj zjBun3y%hthsX_X>W0khDf^iroa&Rs_G;bWe5=``SnoGO;mB_OWXw^FT4P-Sp)f3|0 zOCS#_lUi4ccrH=`bzOsfBnqy<5YRl5>Xi{PP+vE)o>R&|w>2hYG=IgI=u-x(wI<-7 z;uk3j?`}2OdR*!9#l88=s1Fag!@(~r`Q?k7ae}720D~8yY;QzLxMV$yMKyMbjeaAx zQs__3K5viNU!uIV;-_C1ignT;SVmhf4DtutX?!o6^? z9qy3bxUGIM!GJa~5x2FwuNpRmB=nl-@B14Pl$k&3DEpe2-qQ=Wb&ZYhoa1oOW0Pgf z;QGGqiFIAE>6elQ(Z3q7=S#h%^8HDw`b_3~cWO`C1+7do;dM~B3Y#3pgvfyQ=Pev| z$I(ZwUqYS2=uVesgs`~pPIzcT1yKtZpMTS=;>8)T6%)o9b*Z_qB!oFMUEiN{6$uO& z#&ermg&^8_ZC{43wY2g;I5$dLUd_zZy5pC9!wrf3+>uSzHTKO>s_EJKYe(Z!;_tWL zVs76SSsbO`(i<)2|7Q5sb(Is2C$i7N7iXuy97;#9z8A-`a<_XqW-$B9TUUWY+mxUS zKZmhh?WwY3=e~)aWE(F=si8ef`*2}rv6F)^;Yh$UAg$G0k*{j8```&%P~t{nxhSNh zFYhL|-uDGLNha!W)M%)hJ@Rg ze%6cVCFCk>QB60YgP>2)&O~T_ZtXVJ4RS(@H34+DT@4+Azk(j;Y4~M!{%BD6RTTIA ze5w4K&3dxHzs~anIbrResD4YeEnjjPTz4|5NJ=BL>@-uX!AO5MY`QL7g`BJ0kW`7v zNO-keG`MNSRK!k?-{_u z#OMkh|0TL#0YD-7RSDJz!IDn$zhPhOO&42CCV;q!a+T-$?pQ<<7Anyt^CX z>5q(SW`oI1<9jdb^hcbfhRX+b2)A0O8i>S)%0F*$*?P<7WqlSgk$Yy= zx$F`HSd&VrFjd!>V#X{&h2PZY&0^BV?^1!I1$9{iZ^=mkHnr4-G>`Xy`BDe~OqjZ+ zC5eUuJS-Zw#0Gt*X+>>aYND8cP=xl&Lmb2P+Ggv`T9%{Rqzq76>K$v+>bS+8Q#-Je zahk(#>>QBPyhJ?V`iNW!b`#G0*oei@6(7p*NjhTSdbA_O{m9Vw)x+MYtvB2o1ClK9 z4R5Knp)*QHbtLC^A?V{J0L0VrjY?`TxjRAb*zh{=QWyioah?t)so@RucLh@qHFQN4u4|Cu--{8E-S1AWXB z6$rD0YwJIOy%nU@IPEw#~z#LIVL)IKy9gwWTWW`^1YB)C?#d~AI*pU5(=Qyse!M?N>*YU2fx z8qHnt&uS1rOE!`jByhrcyg8nA_Rl2zk-8ERmIgI;0Cdph&GLjcWWVQ&QrUL>v67|F zWBz?kFoZPcw|`vQg=V)7(E?U)0 z^F>hzpmi68sGIix)4;ufp1J>z2JSG^|9?cZJf^>q9g`<)$M{IKo#g$M3r+Prcs!|3=jY%J1T0qcNpy@_aGWO&|zUzWE`r=@{q z?x==c^nv+LcvpyfALHU z?xnugHld`^@TdmDmHG6(F$|m!OT4jGDav*<=c|W1r?z$BFH}3{DhRFRUjIakedcd` zxO$@bX(msSA4rmB?8H%}Bl}N?sb+>~(u zgaMjSdoN1(O>oYSQ75+-Pxq;TvLT7B2I3qqZkYH;J_l#zkJZig?M#JgV|$#^Ef@Cu#gHZuPU;Yxw=qMbA3HF4ZC?g|E@C*DZVqUsvFG zl@B$7v!2%zVn4`QoG8i@s-;Nug)QII3H){kTF)#%jjW4{fV}9ubX;dyKA|aqb>%2Z z@oPwrR`WwlIXpBTtht7N?J2i;0_@R3YmLxLXbX#Rsi3~u*Dp)v>MAuAC|_q)GyT{E zpC4~mem;&qXCEXHK$kslSXTSnR|fdfmIJtD^2}OOc2xY{?1V;{?)`;$Gp!vztTA}u zq@UO;c>1#a1Mc{{ zqW{$%MR$VG8Gr{eyv$RUL!CWPryFV0g4VVKM z&;X*JcpKH@$z93J2xO>~0pC2@ehM;hz4ja{9zV<_hK`(l2iI*deVuMWfM1zHE_A$?>ke`M$-wOFTc3PC0Zo^2 z{5;C2qHUDM@66%1JLMeocaDZ@bBTZ1^-R%mlHPOHe%txEqtZ-CZlmvo0#gjUR{&A& z?F1qN>yV9Z+?t_St4Gq=k!|C@%C7O(%#HLOz$^WI&S-5|BYs0W&5pLmwkO^CJTH9W z-=kaDF=GB3eN=PYA^G?nn7*lruE4Pl0zP{NreSPIWHLc;Lcq{J2a%MP0;7Uno(cs9 z3WUPAy&9f{L9tgBREJ^&V8)=)4vH$-1Iz9ixb|A4ZwK>mun2YQaqAk5mY=AFfq%Ei zYU&3GC|7$`i05Tma#sT{FLikN)06w3mU97z+xgPjyMQ+O7RKuyThDGP+p1pCPmWPl z^MlMnOIjUIkTT%0vzpg*`S`6 z$0X$BzAtbP@=g|%=Zo?D5KAMiVNZb_d-)UZ>4MGjrgSq)p;&cO=-3f&v;6BoNR#J6wr~xjHG8q6=T)aTV{mt4k~EmUO|> zVVkLSw2&B@nr+oU(@NM#1IZb%-wc+fI~x^zIwfzA-OR=@HoE zANwrXJm+*ZU>vH#=%ohZ8n6nZV-M%{f0cP18`T_u=WtzjHI25~h4)01*3G?>0hegn z!jh+sbnUpd@MOfRGI03^QPg?P5(fw9V{uMFZeEA<=RQlbsh z`QQ~clXn~MPkQ(ct?QdyQt+qM6aBYoX8S@!!GHg&(|nNoSFefK3Q*J#fL44^>je6O za$51D=$br&@og>cp(Z+rsOLWJhKLgU4Dt#%&p#S%H&u8e*e(#)j@ zgB7J$7Z8gFy6o(%N>UCXp2vEe*vm}xe=m~td-9pBg&z!dh`WkaqPL{qhssaHl;a*! z&f{JRaDhAAY2Zan!Qn=2#7DqA=A0QZX^}PTLT!hl5#2TvF<<}tEC5Oa!;*PA><_D# zG%2O{(2qCmU!Q1!;<@Z~25dvO!FO%5YH_ZYyiI%6G<@8NjqVxL!D*hN7+jaGtKh}R z@68Qa_s9BywT@ey2_651x*aUZj)%tY+lF+db_0*#@jKza#i|y~?~KxOXMifVFRBKn z5tX+df}+#@}$67D2&o^+5%Fn|8sET|5nTK-wUOH^hr$@0Hf!oEZtTwmLa{0 zAo4v!JVRSJ(&ezg*pyZu-cNr@Ty+zb@Sy^*N7J}RV*Fk)e3RI4H?yHJu_8-e_`~hq zp>gP}XB#?A{y+OisQZQwF!(!Z(0YRi53dsL#dIuSS>1p>K(S!FnNda)xYO&@Z`4=p z(rsVUrN*^gzfN|l&pE2ZQ<{kY8qX>t7&FO&-AfxRbU1%wxf{5JX?55` zTtOb6`_@&xDAA;M=T(lQG&iqnVsxU&vyIMQ>egLWChwicXD{|Ezi8iAXr86N*#%dv6(wBE|rd*2_Z z+EbW5bT#-1P+=_t)ae*SAnSM$O6=_itnb;2gA<})Y&yxDYk<|@f0eakW(|c^SM#ze z+Cf=-Dxo(*iNZAop_`H`DLl=We>r`J;J2C^Fk&wisjf*=MU`!Yqprg|YVQH2YmE(< zqDtswEWbqRse^I~r87JIz+yxDY8xTEmjh4sqnXp5{SI@v#Yr1>tW5_1Q(b}TGeg6e zS%EFTLpc=>xy^X4fl#n!w0Nm-+^q7dH{qsa{F4Nz-wwlAgVC zOyxtnP4H!~5EGlqGqgJ%5rRA(s@0FnY64tQFLNN}#{%rPV>yDQ5$ zA}|~~v=F-UMKf#FHkxpD^W3vUa*+i_Bpyp$dR+r)vSN(b*^l)FpI1o(Njt}u&RQ(n z4Y}Xk&z&WO2jp6Jd;Kx?yE-;ma-AaEHAA44C#W_^Vp!OWGrs2)>og9y8a~_oiAMAX zG!ngTaGY4HB4jL4n|~L(B$1dN204p9=T6fBV_Jk5xa34rSJ7JG! zSUg1e<_4|mmL*6g$%(5)Zuz;naqn)%cvR@P@a(L(o#6EA z9k_-@_9OL`8D`ydkwoBQN}>YJ(0EYc^wr*`@aU<<`sr~ptb+873AzIhuOuV^D$q_! zSe`W-l_6UoRf6bMYF1}`)QRI%cPGKemylp8X(P-=Tj%z|QR4W|QSCyBKm+;O_rrt3 z4XUsl{cFc1M{A0{tUXKAIZUVig(JU$vU>|5HE-u3v(fG1&DG!3ZmZ(#E3J=FH8id- z3L2wE7OW+n7H(2VAJ*QFo-Qp^PPlT3Ac|8SQWo1u=xY>?mqvgmKS;P)-)kKm7muD# zqOcK{yDTP2U<#I-#x$b;y_y~$q=Y_9X~I~e5Fs$DPvr${Kde!_R82a^iY%}n5FZe* z32ZFi)yN+b6hz*kLw!2As)r_Rf`)C1{eHdS3GW`$*o6BF4mLV;s0(^;H&-QRIqfw+ z1y{Ypbm}2g4QQbh^r=zWx*AyWtxP*!yw$a9bUS`*I}eZ=5j~<0qMRMLKDzTe=Qo?H zINL97Gn5FtYq?&#rDd+_vRs~h-hHa-kMs1esCv^NaIeW+5}FyGpA{jcGJZbUc~;Kh z?Fby*86U}+s1ikpprKxTCS=oc;j90lO&ydmRf+8B)hf8Nd?kkr&A#uM?N>eaYjyyB z&IA1&=Ag1k1n)_2#*>th$6m(ey?<@%Cd0}Da!kxNh94Y1ig7dVi*dp`|5hZ(sh1L> zfOr)Jc=P;M?Yg@XA~IB%*<>nNH*k9>RhRt^Rk&@&&h_i@luC+(d*ATQl3H`oFYjF~+(hY#L2&b8hnFXi zQuQ9^{pBKI)!g$~2I|`-_4FkL^e3?W9Bi&#h#KA($X39~q5V!-8jv6d zSMuwt8i$iceF)UU+NC6n+$UFtxbXbt(&A7MyzhO_>l@-WZlAe$o^qqRdaWA3OvlfW zuH<^U4LKbbjhkH>IfdbEr#~HUgi~^~9UZeHK5d4aav)&a3z+m1_HM&8fFQEU-;4-( za!^EuJ}ilA32V@5VuHX#W!nzrHFq_o<3MOp)1L_QFhhn)FI-Sn2vvy*n=WHwA9ieA z7if9uH01El`_YXmw|kyDG%^bZL%iJLY6!V3E*h+L!+N*9)2cjjencI~(qdQ-ePgj- zn&A+P3(G026?|=T3wIaPU(Q5w)j(lO+uy%=saha{gq?zQUUS{T!I&O9*yDjf7el*X z)zX9wb>2Btn3MJZT-XjLp65n_vO zZd{5KfCPQfiBARf;jIXzjP+2#!xbh6_xz-I#*s_wZbm-qIuDdJ&3RYBc-+2^qi&Bq zufqd&bGmxpsi2yoZM3~;<`}q%b~dg59O!+HB~D9eb@u1?=d(5202&ntQj8=rz;M5x6NRXfl1NQ~#b-Dldy9%_>{gl;F@NsVyo&ap2UsL+BI zRfnwGuSDfoRGfyMcw6-wHf$FSvDvg$f!oh4b5kJ7(6h5fpv)nZQ`7?IQT-;x= zvQ@6*K`==H`&oA2i?andTfuv=?=2%)b;7kHvH09)(F&Y)_2vT3Kz4n5N9&Y^qRyhM z`NTc6J3lWK(c>1rEqq@Lymej-7=B#(*{=M}c;A^^ZYK>BqnU8OK~5w*z`8>?uXFA3 zO~Q@VT)?=oA}3;F{#3lo8g~!Pe3@ij?%_ zkl7D19%b|2SciY!Lu?E5L zu4UF!;=9LHT1db$I=d@@Czdt$t4l5Svc(dL+#Q>ZZnwzBzDbluLb*eS2$01!(wwJz zmzmfow-sq`DZT+yWzxqr$9Bals^!81?WeQ-?#rC^C*(htGAc_xv7&1Q#rs9K6K#IG z6pr>GjLT1lNDxm^mx{&4XJ)d|qxh)!NITA2S-i`v)+Y$O_FWnOv1ry;;}*c@_91VY zysMdlQb7xZnLI}xGk&Mxx##JKy@Afc-4LHvryYZlUEeW>d-f|3TC(+YC!1%&U54Z~ zp=j`N&dG7a+->F|lD5M@r{fPU8=ti~uwTFNYcp_}Ki?|gvOH*bb^G}YR@G6l_qI*5 zq3mIA$EbW^OzdDb=h0HSPgj`jc~WqNP2>DNHESr2hFQIDXfItG5k&slq(2VF++zO= z5-Rqk%yxEWPY^7-zillE2#ltCc5)h>M7wpsJ9oYDRZ3Ok*8;+%I3P@wR*za{;GxFS z36(F#s^q)x>MEZ+168&?0`-_<=j3dFz}|q?SDub zNc|~UV=kbLZybMrHM_x0z_2{?`Zy2CE{9DB&e+GDSh4d|DT9Gcm$Fb440DkxI(kq< zu$dJ^6wt=udD(*RC?xd?s>i?4LgH3(tL(av-(%(q(ck@wwDnPWyXc(HZ=J*9Vk)h) zTTL`Yz@)?sb0K*C1K=_}h-(j(gPqtreNmC2U2|85Q}f!LYKQNepT;DRe^xbWgyGn? zl5hT)51v7S>KTSN9pg&AbhIk~-S;;J8eb`i<%Zjlg2;y)QUu#qA2GwcEcDX1f9oF) zx8Hf?= zmdo=4i$&SZiOuxsR!jYS8cNamSp9WC_1azS)bSdkAt~tX%KrmWzVe#-#qe%l(QdLL@@cJ|c?@MVe_c zEQ>{i7`}X65N?Qpy@j{*B4VTcAJ+bBrT5{zRUQm4O+U-LZM0(Hd-8-Cmne4VN+b8d z)$&^o&tI07Ms-sJ#Tg*}x=8gU-4ATD=2vP)P>(j5U!z_Xt{@~pF5vd`vyO>MVLDy! zj%t*Rp81Xh`sTg+Er}n#TGtKy!PP-N6(Q;!-ryd*vBmoW{E1;1Je?>LP2>|l&6n_#EyPX z_vU?ntcR!F#=i|7c6(n9LeLz;55@%J5W2ZV?q$!`v6g8Uuf&X-@|t-_jV_ZL2b!Il z>6I=>jh_VAsF`rn4yXF?EU_hI-+ok;>j*)HesoG!W=x!4ks;l%DyMLw8L}>ZjnYyY z1lWsaV`JZIlafZCM&H-S(D@I)8w7!nUC9Q7@7V$%rF;H!^1y)K#A-F8mIYY$5*EJj zZAPC*Da&k+eL7jqdN7l3)iaI)9+SD9t(Lpaz&j@zJlxaNH^#5m@*97B77*Imtnj2c zDRo9NToGz${B7@5$q-v5vQTBjs)o>+fZWOJv7N!#`dEq!l8$8c*d-u8Q%|fY=6nG~ z$C{2us){7?YW^%Zcwu;~A!%>LSieu#2HHqlJ|j2{3L5|V^EHWM`JfP(W2YEPon6b~ z040#2bZvv5DZQxEteAHq$$OSsLNmg-|La>5q#zCjoY{%2dNG%7?qi#saCJSh*X6(( zWPBLA5=7~OAv`k!C@Z#MS&8fM1-62H$AkH{nfmwb*BXWHhX;tSISk)x9sLa!sc?`k zuh)UL^2c&^+~y%D-E2@n+KM+}E`B$$g%E?&u9Kd1R! z_R-h|7&ZS`zWcsdWoTm6t|GuOT01w2fj~*BVi25czVI3wdpiEAO`Q#yoc$flrG4>@ z@8zect^3FP@ur@HnpOigkNWQeGURN7@mka-V}oB-tXEVj+Rivu`~%i+Mh8D$QYw4| ztMjGLJfR>%{brT4a=AHxjZ8y1T3Z9~IqVOGPzoZ10)NLXkH?=V`xQdC*E2q?_|ux6;6L*a;R{ZoAzYL`kIZ zGLAKj&1|Yc!52n4vhu4s&=%`V2(J@Z`e1^KfHo;(FZTSHNVyE4X|^x?>M{Z*u&ZFY zSm6qV!mr4=uaPAW1K+U|rk&d3s+rkyF1IWc1&H7APprtkT(CI9c$VAX%vSn>hAlgW z=-3&bqtElz;*|;O*F&3nJ`~{!gkwX%A=H)q6v^%gf>}4)9<5lw{Ynm`t4M$7;^6Ap zQ(^h>o9w2fwaaFEolS0aE_R}#Vq!mbskUoS2X-a#`)d^H zB@$77+?T(;99?-r_O`qGx&2gubx@&tAZ|cSWMak2%e{l$p;Z<|NPz_P61xb3xiq8q zWh`vXbmtheh5O?+Bay1KAvwFGwqO#F+qi>1<|Mqq4ilA>R`&TUaP3LARs*_%{avM|L6ww~udYn7RZ5okbPZ+82C{nQ zU9g>)>5ILfykXLd#Vf0%>l8Eu=T_zmh-5@kW5WH^L;H+#2F0B83Xxh6Lo=j7bPXsc ziDm^8LBf|m1;fbI6Q{xZZY#h&2` zm-_#$Myj_l#HHz1usJK`3)rqwq)$rG5oL3Z7K))|k_@fXTD~mkv(P_ui)L~K=_#k1 zQ~;Z!b7)=9i_%i~pTji8<^I{#z!(uSjnXV}t&q+wT%6@l_80NBXrF{Z?Tb^d9Z{iH zx!|nn)!gYB=Z<_t$f(4#`&nI|VP!aczo;Y4_iC9@RqViWv)B{fC6eXUIo8Z#2<2CC zoV{G>*l~5a&z~KrlGthg7HM<*oBQ@eaHVi`V3>*m%g8@=>ua4$hZG|8mqymU|RA3A@co$giz7TDbK6U`#w6>804f4YoerE{@P^3Vo$QRL!Vpq0thuYMjjXgE zI=R7@A;Cz~a#s;VItWB6W1h6E%a2QU`#F9FmF?FYT)r)`RpL@8(AXhS6&0mN${^SU z00c29qw~*73<7tJX|rdeoI(p4=*=-@7@5x(oX5X@EBya}h(m1(42@ zgV_Ix9-r0yzv%IQHf7(v&_AyT(`t~)HY;TVN4R@HN&Ck zcz!5g@THkpp~5qwUZA-3A+6mo%U4TePOjrz?yMi?yJevokYwOA_-b=RE|69G z>7>eia(d=8s`{^%_d?XOQR8i&BV6Mj`x$z0U$Y)fCN)0sQRewIdLHz-5`JjBWswG# z9Xk109;n|Cm(5uf5a}v%cj11V)Ox+xugrwPGA)S6NUosTpFep$AQ5!io=fvDJWloy_?*kDmYG_rm;5J-A^J(w_>*5vNlnu6|#7nGy!A_%UA4@SLmTz&|_B5`Dwix1#^U39(0m@59B+2g6Y z%R0K2RX8R+HQIjJq0L=CXU3~?-2$De)??b zhJ5EPnmW~o?s(5=pmBTLpr;R)7)_V?R^U=N#o0Hw;kv?}ZLxp3KUg*M@O`HTA<~8l zPggEI4?rWQzdt}3Y$b|VVjnqab6i&+5)pp`4(58}00r2KxEyA1s7`sxj)n2<(3#HD zQGjOO$Q}emWyFX!sd^_!T#;@B9oxbnn(pW}ZYqclm}o#;$^mTK6tV8TiyAWYj{d$y z)uwZ-rLYD^8Brs5;om#^FtqEN|E7P9tu~nPC^~ei@l4}BHGku2dp}Jse2$L&VF=}o z-*X>h$MXRnoC`~cu`(Widi834XkWa^;yVNGW-wJn)u6ktL)1X994hV`frsZ-BbLr; z+S9dKi=mMfIpLB}##g%0{IY1THDv4&R;_+fe1yhoVPX@z@cHlLD0n|{qfF&FC9D;k z_IOR=-E4Ag)b?g1G0Asu6n^`yvc**UD9h(J!GUkv9Z`!44t+nI30R$a6rKtIR>(6O zY7)O8J!%GB3jvJ076o-`?KK-67rm-4ws*P~-29jm` z5~28I6Y0*Y`4&p(&2K0T5~Q9SmEpsxiGe}9&n9lO|91a{gIIZTR=+l8rr?w7E}oEL zFh76*r}?$MQvXAMaVW>@djMFvG8LO=K0COJM1@+|b4o$xOr;1D2 zt&PkM01s`+uNb%|OwkFKc+s6S6}<;&S|CNoK8@xz3S{a1thq3XYGnLe^eV$l(Gs)t zBz(AIn1~zXUcd>H=vlpyKs&X_>~#OO*yr0pEZd4^eI~4*W%5_v%ETkWv3}CmUcN^jL7lU zi(onlWgom*C#zTCbQ1MSmO~#q)hsXT^3#!|J_H340xNBE;8AJxhz2cdYOmw~%Y?(c zHVK+d_cyZ2bE(+yF%3j-g?suj5<6)Lgt6b4M6eC4K809wU6aBewqF_GaKEDlCy(;1 z3gHb6Yvf>tifert=5RXQv@O(;#-W;mcP1sM z;V>6*mhgbH)*79x)PW5{J-#qOayk03HBzl7HN@&n> zy-7|1{3Ll0xh-&NzzZwK^?WA%$6V%HuTUOf!0&vrLhDHD!t2Dh!evW|1loa;KA&xL zKeMO!{5+n}z4a-OI+nOm%;^PXvXj->+Fd@>?Bx;DwOdV2*uMRaoLd-av$m@ zFLZ;w__=oC;9Bpd6;J>k$NLK~J=g9(d-r+3AM#IV=U@S(8;%-}zqtSmQF-7ms?V^WP-z2)S4NQImwtWn zwH87kD>!?euDCEhQRyusN<2fXoB4qG%j>oG?L3xjvo1lWlmMA9*Q>Fq$CRv~ zeLpb75XRFV+=cv9Qj(JAh?xm?tF-$fiWi)WnwS1`;D9gvlg5trMf&At)0AUIWL-hzo2h>d=KwO8HDmgQ zunLk%Qjgq>8s%1j>wH!HdFgXeA#M5uogR*SiA$@Ghgsw?tS%a<6_wNZb#680@s~ z`Ab3HsAf1!XfbU4N3ms}^9$ZS>sP$9IBzbgM}lAu@(1N+DRBkL^zc zVd|w;?Aht*WOM%b*HaTtDxz-(Zo48XbNmL3xYI6WeM|XSR(x2!qs0ynq|`fkI@Jo* z-+oVxr*C4!s<+*OHy`6BMr+M*vpfAd(J+_Kj2Z(CS z{wAuw5AchD=txlf!EL`f>3G#XkaK$RGoSY&SQy9fB_F)*`U>MaD_s?65;D!iM!54} ztbiM%NSWo$>$Y9GfhBzUHP!Cb3H0eOzZ?JQYJ9v5io5wPKnr*Aj3io|YoNzjk!O~3 zIfN=&S+M+XI-keP!rCW+GBrKQz2o(m3p7+<`U>iUkqCgDm!-ADH9Bc9PnMzA0st}1 z7kki)1gto80#qIvM#VGF@eC53-cJe`@HI&OpIi`#qL zZ4>7iWH)@Gve`9etZ*3pV$>VeUo;66#ZT>h0yUGj%E2tkMs&?xS_KS!2n0Ra^a&F> z=O69FPPZC`b-k5>V}L}_*xQuzl>p!uR4MBz0=e6A@&-G=c>VtwFMRO$An8C+12}U_ zZv!|o5g`G#2|s!80L%Ro9BmvVXhIds|2~sP6m>Su@EOR17PP>z1MDkM`_yyQ%Le{x z8ma4N(=o7gkd(rpYZr-#J;5WQLU5BmIk685{NSmGMoh|zui4)*%kR3cpKFPLMBd~o zllsVqZJn+9V>JEX2S0_ga|<%@+e^N>N9zcIE^9B|;0w=8-_u`u4$Rvvu*BtVYf7H3 zl$iVrj+)vAIfp-6tAh@ild*HY|HRk!ZI8DaCiujwD=z>`sNV9?-wr^87;#}ZgSGaq z)Ps{gpx^>M75OgRQ+;j9cGNB?-02TYVQ=`z5FiL|z9w=)cO<(gtDy%wK8zE=bP<9@ zOlEf?zYN@*^^S%O+0M5h2X8{{2_;c}X|T|4Eh!diQmM1X;6g@vBdw3=?R#|)wyN2~ z)c#?{$=&~({IEa742XXdoPQ}Oz(iN*yMB+}RO?eOpkvkAy{wYblom~J%9cYa29Lnr|#>%;-0ibM#sH;WvhKw5W*-} zj>d~Jx@ZKYOuka5RLEeVjdKA8s*jO| z!1nCZ(v2@4wK`qV4e`dhkSSy5!LO_;(iqE*2ROt>nUDOKGw0@PfICt@Qlm4Z1)M)? zJRuo#z+iAP2$ajON7f~R*mCIWU+8$;%vr^kO$2pRYk2SK+^x09QtwaE1H|I3Jx~5>?<*JA4 zrjB3bhh)!>u|^|tvF7%lQw|Xl44RZ}*3dNpYeiT2>m=i!i&ZUO8hjrhaEB9WHoF9V z&_S8!24BD6vlS)M-+=4!?6LAKj0JlBJ$l?zEia|Nez`Gb<9o)Tlfb%uCr}Iswif&F z{+AwYL^VE}YHrdefPcpwmBB^1VU-;)K9gMYw7=VhI!Wz;`NN1AcUs->nT%uJBxQDZ z|F`CQ)*&fFoD{0)?n|=)y_C&D|MyY?wdITPquc>t^Z1n zT%Jm$Z{P8ms?bfTa{(z$8QJT?DKj3Mr0Nthvy^oypqfplK%$AvoJlzSAxS0s@ZGuB z&?(=(x^MfEwX?O1EIC~J^1O_l2*}rqS8Qo2!^2oQ1xpml*o$|9xEJ=nGt_f_GpaoQ z@X?ng2W424ofhhVH5cIjY5Jw8CzQY@pxIzFxX?h@c?o#o<4XZZU#Nb$3unZ+>#>`gx}EVRCkv^cLmpE=+&D_w`fe2b$Q8WUit_Fg7DhXfJWA{Bp~~ zJvFy0p3^qN&vPC690H%;dY;SNc?#(Ia~E?)e)#fiwru3}8MT@%8D=u+)9{&1bp>L3 zWnFDVmbVpmyQ=Z0uwvi@_Bd#u36MAFI~`b!ER`vzfLpNZeOfiJ1^C=8SeqfYL)oXA zk0irBTxB1;a;#krJLb-F=--xLi*>#?KVGDM{JHk3V-onSVLM{-g3VL$4KSj~(Fhjr z*jgYnG>-X~IU?*UPInS`*m5BbB>b|0vx##h0q|KqScQ@%~jn12jk83<>5xBNi5+K3pNoOTWd7se~o?1$apL*H(x zH5sSLS<245=4kc%WnR*32x+`CXf5I*jqBfeduE<0=NHq~Wh2lBx&eDK*-|i|0L_OC z_%aJq$9m(YD7(?$+YbewGIYSNG?@OWX~~oMpgqn#?$qaxF>`J4OThG-Kn-HbUgK;+ z0W?_+Y$7<&7Qpy);{cuTAt7yo0xu2t`-sZc<;v<%NdRn>7%hrCvS2?Xo4Wl~D*YdKiHQ(wJ$33V|{ardP87Q}M7L39yG=tf;Rx=-VpHg|JRNSH$6I3qr`Vpzsi zG#JzNJ3G7>!UICx%wWVD2)DNk-)~cRetb(9F^gBRM8S>idm`uwI+lxZr+K;Zaf7#U zet-rfOaiqsuGcK?{9fwePf~XFG0MqS#oE`-C1K_Ln8{*W#mjdIF5O!1C_h|eVuYa^ zlCY&09lTBE!LYyyrxqg0jZ>PGWcq3|mW16GM@_8W()sLey;EZK!oMUdRA@;fJzt&a zC^%%5KVm=`@=V&6hk{|kmprMb)kAu|2mRpIozsUzS{EwI*KeV(?G-2J0^_#TtU)N0 z5U~;GfMHBg0>0*;TgDEsq%|H1kNZH`yp@en+TDiM z^;UHvULXKt%ffbc?R!9+c{2rZBf`$=CN&FRNO}OEolb(ozCG_i3|_>-@Tsry41!m9 zo*!asP7;MNuc|SN7-+B?>EBudYlRh%D*l;1Qvd`9&Z9?gJr@uHE0RE2?Mk|ZXtgNV zSaL(06jxr8YnPvbeVa2mn@81u`GW1`pE04&-S43SQE9%lku{zKhS zB8dY&1&|R!Q=b+ZdVga>H!t$`;QgsK!bDWB2aeO9mHsWVGhTfCr=&aL9$)10+(@w4 zOcpa|#7j>M1eUmDRF`Q+A0|L-#nyRLu-g{*#&A>FbOz;0wwxkfy|ySh$ilEokk%#N zxv=3+PSss8b3ZJ}GBgeF2*3SYX>0=5yR^9P!i-BSe)>MR;YfP-B!>a;@0Ch^r*I6-&TAOGI zmvbizkXa!ku_t;K>|#RI9K)NhDWr$y^oPH5AKP^N?Cl+(r?0ViI!R%>^CvWwnlbS} z;;$b0NO`Oa!?$gYBf~&Fi@MJ8iW4dp8k(;^Ux*UKRc2Fyh2`Yj+lwtmF$aww=2W*C z&F?IzdP2XIe!i7#2CR2_Ung7$h~hE+WLt2I;FNXz(${$mMqr8F=yEf&!H!yJ#LLO6PCcNfjeK>M2NuC1D%3~pww@I$eBhWOkYBg-9@+kGBmKCLKMe;iuN>t@yTyg$1M{jQXe2NY)3xvd z&ZV(wx~z#4aMhoE`VUvV)44v?#>Ii^Dh}{Syu?Cw-F-@57p0WA#&d%U8)19@Xbt?D z7@;K1k-1T9qolja7n@u7od8ZuGn>RV#FsWb8>G(=f%k%Sotr{Iwcb$jK>Rhn`+C{z zy)EMYL{j=n{V^RS)p~-%Z}^p;R{oOc9K&=hbj#rA&^^^H;$?yMTv=qza9R-{_0c^cr>g~I%@wefB?ps&As7fG zv~r=&hD?c zu`dv|#piKzdpj0K*#MU}kyuW@=9rh61v@+(vdyUoHUPWNCBAk37XSE-v3tI{ z^B8l4R^#$O-Ik9wxUFNH9xJB-nm!FQl&pfwlxtcR>>AV@$hE?vMLPX2!WMX5mpU6f z%xi#)69ZB5vqM1RDObg4{}n8?=%QPPdZ!8TPOHGUf@RHvT6(L*4w(baaaa6H-Hh+PNZD%9P7I1 zx6GmMrrHp2wb2Vxt zm`vxMubRKXM6{R>cGTk%QJ%GnNFuv8YnJ1dueX%8Rotkv#xxu&KZ;s$X+ViFQ^?ho zG@crj7G3@HH2-Sbh=GOXNm^XEN}m7amQfh%&+2I^JXQ(LOnd(rN2N zVp14ablpkyj}gRs*FMEJU&qEVsi9)LjoxPbs567Wr(slTxmWuMlui5)#^fjyZ6$^ z>Di3nz~}HY!WI-sv{>N%jW)KT&>{1I)*(*!;fFSDJB zFXqdp&5aqb!Y7%aZ1uVZ|9r7?8E-KEvSOz-LSBu~Bfzq2rEXHE9jUj^NIxE2$Qb2Z z7Ho+#BX9ZkJ7G|TC(dj#zp0*B7ZcDU(CH`yJ^_A~%G3xelPS?lS*mF77c3jzH#z~a zred`u4LmV6jhH(t0lQsdtW9<4YRJ@-LlE;iWK&b2<15!@6}ybdbvy{=wB6w39$m>5 zHeT*jHj$^vbKA4F+r0MO3U|mYIgsXikgYDw`dIpp*xzV-w(sQtNzz4usjR83 zROl-SYyiCw`O`93Ti1GNz$_g1U0kfNxY1eUlvW`~X~|z-pyHM|9k%dyYI=03=T{|& zS&28~|xDgO!UQ)WkHtX0sNryFfRiD0D1A9B836h z!WG(u68NdNKC;u<5y?vnr+8!V)kF%|qnw~-pO*xr&>3o`!xaRsfT_8Vu#p3#V&qPl zs>)NKlQLfDO;)v(U3ay zJoZpJDz!7&biwFnukvieCUnQc$hFE2i|b)Ehi^nK<*)62w4 zq{uAEDog~a_$%YR_X5(q2&-PD>3fo-enj3vIBkRnL8y#xSRGn%RlXR+tJlDEfTez} zq-O%Qf4d{SrNhZ+mxv4!G12<}XO^?2yEy*46^#i^KUXX@QX3nA9An8xf zGn=cBt|U>5LVh)k&*@i7`zm`R)FpZrob~zXhgW-QdOgI*b$4I_3A^~~qW5@vb82pg zE#kduOsLhbkFhGlooC@PpX2*-BjWed*s^M4{azjpwmMc^lA5?!X)e+k@(x}D{! z1^^Pj`4T3&f7QEKGMng0*DGj#_@dQ%x9dw)j*FBVL5{>#Kn3OGV23ZxK_MQI7%mh8 zp-w&Tkb%&B;;Dsa8gt-`9a%`Qo4E}GI+J^V3ymlTWw1U^sVqP1akuDXQwT5Bl&jFg z@f00r9?bX^f2^OY?DOH*l1mK-Toer|MP0nAlL2v^JL1>x4gep`f1P*%5MexMV8@K& z;nkHfe?$XsRKNH8eKWc>sYwW2Hp2FeI}e6=1%L|}eRL_UJ` zS>w1P4Q`JCk_$ILP&d{0%9%!DiwE>5k({7nID?!M63l{{F8&e{`6I_4-_5>#BPS+` zk0B(QY!Yh@`f?tyexCdd)}uOpvvJl~97#V_9MNdrsc&J~%sybEF!L<`A!4YD!W}hT z0z$o|^>K@lqZJs;10y^(s;+H_HvilB1uD zFu2ih8h94EHWUyf0#10z7Q#IT%L(I5E5|ZBueA@xq}ngYaD@D_D`#<^S`yq z!~lQ8y9@ z#?GL11VA&^)kTqA2O=3Ek+qJ)5Fw;MA%6K!Cl`502rsVX@zOXb49>zpxK(gyj$E#u zpu7ShwFb)h&nr&jSN8)~-r|?pYNl<>evM8i;UzYb>}&2D)-jy9r^zB&3{d%FZArS{ zrE@&03he(AyqqqaI~piZhpl@|8sC*^LBk4T3@2Vxz!5pCVjPj`?h&Q zokm}wOh6)Kto1e+wHC&>*DgzcYoFtl*I?#TQFy8;gL-nSp%QK>Y{iE~LrbaX(vjY=ll(HT` z^kQdb-cJ$5i8=L42-f1<`9&j%%Vhv4A|cLJT*ydtsp|{9I&%YhPwhWmIbVVcy`pTg zGcZbJTmf)bE+S5{X#~j1{RZD%GXYKK-JPY>%ZmX~tf@I0H@Zr)?Q%V&Sw^S+F5{oX zFwylto{uNZ}F@sWZox@zemw)--Yf>BJqhf%FOSL zeM}`tD9WjFYvRN(MwEHL9uofUd=Sx*kHEE2SNve}%lLDU!}i|AXD4KRC??HD<7|+c z4od=NEK0j%pF6$`Zr5%Z?m)znDRvei|9H!#$oSE_n5YF#v--0yE&pKZ`L0(IbTu(Y zK1kqDi?=FoW@T@OBH=eTy~+$y?y(-3d^1&U z0huYTQrmY1wRKg2!ZHLm#L&0M*k^;TX_#`Cd32a^AlErZ+m^7ylfVN>xO-}Xf&yloW;w@t!$i4DDnE-m-0u}Amn{S~ zqsTAr*J%?;SuJzc>I#D`Z(}H}Yo5WgNJ`!_XJUNU0f=I+5g}4K079NT|Ib7*8Z9!{ z_;PuCKgK*?9X)Vi*fXSi$=7tL@Yt+H@&84PGq?1=I$zPwT73}DJ>w$AHPrgfOmZX1SXnhnLTh zOw%n4gsYVN_FlqgDd|ih1q@TvRAzNBtu+ZBJOko-mz1F9{>`|!M~#VrG1t-gJPacS zS&xxpPy^DGxYJKwy&`&D-k@b*%@t2gu3gGv%_)Fn^rV$HjM}+6uEG021D96_6{CSu zjC(g3XJX_U{3F5t>&WB_DI63uBL-e1VL1fAGL!8`DSPS~Vc(@kp7qUQ@qv_XR}y-~GCQhe9DwZP7V)qGq! z2eGePeIL+aw*}*G_>r8YmZtFUjkO&J#*=43q^OMz$M96i{utwZzKCJW0$sN-A7c1Sr#!MlQQU zL4njC!?1@xr4_%|dUJESWxGB16+|zO%f5F>{-l(GJQ_^T3_MiB4f!V)WRC*a(+L1k zT~T@gL@;eR40d#TCoA6GiYv{O7V(l*FemlU-m!15jzOXb^p5OeR)HhEGWp9n{Rrb< z9o(Xd20*mvb>Q%#WoD)5vC{<5uwnqu)3yJe1@KBj)d&3!NVI*?)(9y;yGf^v8zp|6 z3Brqmg8<}|RqohS3K|-o0s|h16w>|~d9R0@{(f^&k`Cv>0w3RFlL8)HvfU_*-2%c` zp#3!}x9cX&tywPzNboAk5Ljt3BaJw#h(@65Db}Kz`=Lp;7Mg+?h^nc`BolqgCe%sp zd#nb4$GS9oBB-T#7(m#Oe(@&G0oES7Oa*OpeTIgPS9LR)7=`F-q9yF}3?1CyX?3;+ z{KttAvR#x~QJ5B>jW}@za}Y$IpP&gf(W%PMck%JgXtY5@g_9xOQnZVRlW58{SHk`7 zUp?-1NkaOx;2MrndUb#DKGYzXg~uJa9zyDfL2u7(-jpuq7%TjTR0}cXP_3^9bUgAr z>SKSxUh&NLGSbkhYz`F^YW9CpjPH5$HbuYHFl~ErKpr7 zhJ=!w7hk&tFO6H;Cq6q{v=y<~U!+~40+JQokFj^*HtufD*njYd{7MXD@@w;aJFBLq z?`Z-oV{v>BZc_Hn-Os;QkD7i4|06-Ons#V?OQHZl?plPjc}-J2slOR;)~6-=Rh&Xy zo5W|IJS~ap#0q*ou8>SJd?aXY)S4Z5Re?brYt9?d`}*b?R97@AI1vN!&1zm*0o93f zB?4r~W)&N)exMCuznEV>)pYFEdTMjDC<~N=j8tzXARe(;4eW%ALC^Z}yMG$iU0`H` z_p!|<06`RIc~{4=uY(Z*DiaW?QueAhgrG<`ABx8+u6xtFLR zr5{`?hop{v@L}ZC!8J+VQAby103MoJ^k6zWtStJ;M(7tdI8S_h30< zuoRYa1j=1=+@UiaI#3_yWcM-)!xDXV;7wP9-@o}-49fzXFHQahK}1d{0#QNJ>a@|2 z{BGR2{k+-EoKks6X?tbk>2N@hVF+Zc%uc`!ggteC=vHhGAgG*xZ1GcE0D|fz5+oGR z&ZeZXl6@MhUST5HdvRR#!u#BsONNw3_wjvRZIyn~mGE^d^>kP%8;j8PCV}Q4@Sr?X zUuH)B19~2a{Qm+y2EhwFxp1G;M9;v&Ej8lY04#BUof<#-m8eI3j4gy!R_N|Y`_1;F z--O(Bf4I$)-!3Y}AJ&ITm}f7o_lH@!W!;oF;!v|O_j`Ex)}T%RhX+=#vTPItGmAf) zciJ~GTO_gHe^+dl_o%GU42O1N;L0etK?{FEPW@%N)B&+uEiEdA(xTB&wMR%!P8$im zzz*+qAP$~NIQtwQ;7?))K^!SRN?fLe3nhMf9`Ojpb%U3N7rM1BmR^v#o4n|^lHDN2pzlNc z-WjZzlyOkgc*L~vS!Wz?M&XtuGy7|$%wt$Q>+yVMbnNw>SzEao(4uAyjhJ31dect& z+O|<$&?HO@MD-NTK7h zUe6}TQJ5si|wN2f}S)w{0CC&}pc}cvql-`fh+O&}x)z#Q!E8=mB}*4_zf7 zFVH1_^8OZz(H=By8{rOWGY*;)|%n>UKajo_80jawJ^Z{7%X{ z40EFuXF}49#vA+BvlJCII4wT7m{mp?FmpHRqMqCd_fx`P#hraIQFxo&wG(o@YeJt- zb*xA?U8GbGr08p3wL=WRY684I|F}TMwOyos5sy9s{3xnwMq(NvcbouX0&dL*Vw{b` zARJWrSMrv@IU8YY(fwaKm<3&i*pjI&rpLLzCzzC7Y@M~&tCRARZFVFp=C+c11uf~X zzaxV!IRyZUIAY`0@7+p-ar9?$&u}&xC$(}UKGP6#ZWu`=p+hrkSR+WJj$is`_+(Ty3#E>-6pQ-e)u{`XJV2MING{} z=usw|_2uF{rojzlDM8%KML_p}yXG$@fvUC5Vj_T~=;NQx6ieO^* z7rJ{ChFI=_;$V_ zX*b#R78jmw2oyV3mPJ&uE2W*hcm<&WZ-%T3vk+owh6rdVoQ=OD2K&O)K zG|IpCKwgHpNOju1+F_X1eb9GHD2m@l=tzj_ljXksIo5N4GYN4}t%~B9(#LMM^9M!~ z=x5^Itq0+v*iVzkNOcc4G9lN?yb5~w7o7Cwr8`4{PkU=h;ipGrmjwMq9IbAD^gVo^ zLnjp`G}t40Sa?k-bd)*v!CK`TcQYgw!!crBhuaMd$2Bx|0kvE#ccV}Wa#@d|!to$L z1>GafpDz%}KKV|Ko=`FJbo6jVl<}CJN#24z*ISD=1a>7tsd zd2xs@!cM@t21PcBgc|GlMj5BFb?v3- z8_tqLNNG3K&E@;qlDrR2_Ft4-UBvlr{lw+pjW1o+;Wk#SFLIy={{j3j3n^o&{+ud?J{W(F`ucPwqiZ*PU*p48P68G9$D9Pi#Lxk%C{(!pDjX$ zAG|#n@-?3jvf=fjI9{Ub*6J#ROxi{T;>U8xIW{?JaLy-}4zS2Hw%|op6=I%m9ZXsh zUP>*_QDeUah4be4wvJD_PPeEQ+`-0kgJa3SzL8+Pa%Bo*+PBUv9+I!D1j@Ck>ACuLBY9u2tSnPY2?t1#N%Br!3G z>M1!2M2N2c+U%jn68(0=!O&^s@lrbEXlg?wIdvRbE+&a9f%o5k!^2h z69<_NzkB}f;vK;J8v(sX!}vsv(>n2s;&R;IK|(@M-R@XaE=6~vdFuB5y_^^=`nr;e z6Iv}}mRnO#Jq}u?sJ|0G7&R?b0HZDK)3EpX0QE7YYM`iF@b}*w!L2Lc0k$9whB*!! z?)J~wgbS~bFrXZPF%T*B+z(FDCG5ItmzVhda-7~w?W~lEGNISBw@RelmLD(s^-rQTdLDz z+DP->EL(N?t}Lbav{1G6!StLvV4)>;BNGRUzb(qBmE$i3>OF3-9M;U{zR+&D&R`a` z>rtL3Y4gHMQNRXMSn)_-5!flV{3B=Lc7EK9d4C z5u`wOeV!b%#!15S$G*>hF@9BheeRG=fSFpQFvGr=9!a&iPDVn%*-$7R@)pnJByz-) zcC)FG#>cnWx_x>hdIABV{qpd!*dOd0qUogJQZx2$AscFSV8WOFvl5ij85Rz^ABZ;H z)Y%;l)ky-Y3u={9*I4c0g`(fELP}GH|Lqm~pPgPvKBZP7CZ9T<$9wC9Zc=c(afHLD z1y8(fXDN0a`0x9on~6$y?2R*9&#`ku2VrD zB%TjT)M~$-E}D(!U<(V(2?3*w*Z;8jhEacHnnGJM!KS)cz zO*|O17(E_eqZNAL(usSyq$ltoKc$*o-ogzDG5qfJl)ase%Rgh@D4w-a7zhn}F z*`*Kr+VwUsTooQGQB@@~NCTb0B&Jyfk=A#j=h|CI6c&Z~>8(FiL<#HoV9XU13{^m& zEjEw@3L4b&F*EteR*IwR&gGQ>TmW{_8eld+*YeDNa4~=pE+e*d2;c$ZCi+twEQerc z?O_V^3l-B%IV;oQF1R2WLx%LU3k7y;-~UZi5T9H;n!4e0(u&1pD1L-bj@PMmZkhv)FUG$Mx@eZz<}Yvzhl@((y0;e?T;R+MKcZ!Y7Xs`_t| z_fwh+FxBpxMffoviN{bf%C&1h;q@eFYmR-q=V8k+B2M!%Na79J6imjIz_I=W`!bK3 zuZ1gk`(W_j-h~SLUDJZTMJN2+EIED5O{M=<{a@dBYwfK|QID2|Rxs>|2DT_P`v%q` zyFk5nsq>jan^H6YVn?;TvH4*~>kQ^9l6|cb@_Kv37Nk)(z{EJp=JSLM(C%(R zU_W3(O%s4PZ;*wni-6Gb=(bxgXF*tVEe7e$&4&T0tV=O^1=k^+;4`V6Kb0$XlR5wW zSGSVT$7ye8%ATO2h~5_tPdoOI#dp~TxlZY`XMKS!ZJG1bU5=3V;7vnkWXYzY?yaxe zAu*J|Ugfid;wSH?4k@1Vhhe$<*6oTB!={AvLp|x=7E#Wm!X_$-?SOcN*9L6l=vGK) z^Jq3HQC<5DR`v4~-QX;$3;hw69ftI+J_$C@6)v);TTvqMj0yqnjRLc@Qv=aOsb}|K z^5GNKSkO1758V^3T$*kQq}RM^qp7Le2al?clIXl?E?ct9!rB0GT-HU53vl&31C;8J z$xEQ^F}RkMSZ2aRm_?U!9>2@Xi>=eNh>{r^*3x7gH|G)DQNpcJ!O&f+>xYO5{$>`F zOxF&!<}jt0Nrstv_622;0}6` zdo>D3+AsZo_&WiXf|{0Gz-);fk4^|Er9HSb-~X>vP$5aA7e27#Z8r6B0R^CUt~o1& zUdGXa8WcGZbGO*JWBZ4?WiT0fEXn9d*Tmk=$v%b$36M`2Hed*w&W0wPe${763eNQP za}4UjZK@Um4QVxoa6AkS);Tx-*Oqhk6aaCGAFnBqNT=b3fI*O(*j_V+PH`d`B@Mbp z*0Ey0-0zM&ZO=yrpJuHUOOy)EKYm1+|Ao2P{`DEkNBZE%}IJkQFYb!v4x~XD*m|`D= zHhFbxiKG&L=EnuPkU3Yc0N8u&8Ve9!-iD+_d2A1pb)TOM;OX0#VOe|e=p+fl8YD3> z+Nt#%M0geyFmj7sKzjUj3m?~;eXi%Xw|bBl^*O8cxVzO?@Vj?rjsntKX{4?YRu7J` zK@?&AJ7kfhLCdG*)!l5p_0&TJ0h*7bFZ7YXAbME{^gJixhG;Pv1vDpLwkuqG{%gKg z&Mq)7=Re9=|2I<{WWm*Wsk17J2oKx;v)KyKSM$5V+I)qW4c87-m!iTP?n!#3u2y=g7&AN8 zjWdZupeYl_9|=N8^7An6s)s~QPkObl+xH@Z7b;5-I*Y%tE4Wu`?NmwF!W~B6?*Ad0 z)vK9XXUBT^D%hbh>xt$ah0a4q2ZlDsIilD7%YBa;J ztr^ggb+VZP0o`7?#=#4S?U(%<+m{Lq^VkM5+U1XNU%@BR>CF>gWL?i9g9>Mv^L7*) z{QO!@8N~Gb+1WLAfBUxx*-T<{V_iRiF!lt#6i^W<%qUK7_ZjkhTk8XuHGlo?G*H97 z+??@A-N3BjYx`T#_ur5SYJx`97Zsw-7D5}Klr{6 z|1M@QtvxJ8Q&J#7Vt3{N5L)sltj8JU3Euos6O+X@Yf9Zd9@H zB3A^a`J9j~w;BOQkpK)7NkL%@Vo&uf(BcjZE&k9UzlpHJn2>qMCmz(qBHA-u1QHeE zp>Xb*##fITHVPR!WeBFmK!Cj|#f@VhZN&ku=1sfFCDqv!eulhWM2?^-qj)y;anfcF zpGr;3Q9Kv?#D|C2;d(a-B8zXgeQO|KDn09G6)kpPL==5IToryb}IZ2C#5C ziYT|=5ct9o%k~4bBJ6O8^)nqvYrZh8%I267!@dl{e07hT&1g@Ecryuy2Fgr2^tu3r zOUy52M0`E7;{jeLT{RmGMn%_mog@6XU)hmnPd)V#=e-pbA0YBE^7p375~Fxky=@GR zvu^oDp4v5aUOC+o*leYEOzg+lcn3j$%}5Os%d4&%CGv0YLMW^p1sJOPgYd4T7SRk5 z9h%Z59@!ns1>OqV1|dSgZuMUio@G>+ZG17a}{r= zpt5*p=2oC3)PxD)<4fHhz6XBZZ<{nBtBstqY-HC>QJB{sF1gRr0+t*0!VsB}iy)&g zrosMooyPZQA0AFkm-Ate&N}X3*m2*!7N%f?^_80BuVHj#C-09LX(Dh>!~b8njb0U-^YWgWLHZ^*(qvkxO8@;mAg^?3~41}jI!=TWWzlb~F&Cq2Va z^#{q^!=~rme@NO_o!2a}HOHil2Cer-OeVne$RL&Vyj+f|dvSIOatz2YcTIR0v6rv= zkQ0w-%}r*lL9A@AT&#rj#r&C{b0bqE=ZDe0)@S0?{%#~bUrucW$Rw0@sb<7aqcru^ zWvLYY%9(@|W?5FZAZONxc^vApr4}d*8Kj%L8z7SGU&a;Q%ixuR z(0f4mko24VKPE~ZVCqP+O}jnrexxt&8dB4u98AKmkr%I(+o7)-*~Qh= z+t>Dr8DH&HF;~&7KC5`fnZY|ARWcdctr}FSPZUM}QmgXgD|J!B++7(V2G}=Hlc*xA z(hW`S03)2@Y$ZZ8I<-y(w+a=b54EnPv5uYg1Hw5aG z1DIpVxa6D|g|My-`*VN4(4J8#<`^3vUTrW>k#h;U=a2hx!8t&V@$s(!j_skuP$JC% ztYGL9WyD~H)e1b%>I?1$6Y~cROqs2#xV;_=F54zS>^3y7xH{c*UkT{*?pMD1n**4V z%(<3l0GQK;hCrrNzQH7uxMuGf27(L0FNPVZRskzyv`g8y77Vk8_jvp{xc8>NqwP3#$$UJM7us%(JczHDtD1oJaQPK7Y~@$E_2iBJBT2SG!7PV?xp-}kDNR37<%>s zPU36RZpq52n9ECU=oIWo`xFSd;hR=5m*U;y7)CV`M3{o+J8>hcB;G&KkkAtTEb!ju z2~gf2b8X2w*bY7$DPf3_pG}5#K+mp_uggB9ba}cNv+S6v&nA$?ItI(R;}VmR&LkB_ z3C4&le2e89Bo6HZUah}~MVlpHvg1ECQc`j>aOGck2ksDqyS3tYPvvYy$S*7rs3#4quw)MYIfI5uaO$p~a6J&gaGvrRo%qT}gMj_)a2 z&Qilsyib&(_wqz%{WH}q z%$EosO3BR;J4cQvYNogP?ODaf<9XfFv51P-2cg>aY^U35G?4y*D$B5F(~XcK{!+nBv`Y7tm6+ zHT;o2NZWa~4#6dArKXR;nx*Ydl#`DY>o@K=Ua6hKuWDo3>3b|Uz8Z|Q{r!VpTa=g$ z>KX;GIe!i#D+~tI=wuuyK@N4-Oi3pJG_01$&I7p%Ycxwy0h3pnM$+0Y= zHrZQx_F5EIsv1aff~FYWK=`mk=(|IZW5LHmis$uQf2G9q0?M7f;M{iKt4P@yKWx}J zb;fDK#Ob|Y+9<#}-op2q(um5pZh5umaqnAq$IB^t3;OcG8_$ZepG#mTvz3jXwbNzq zqwLP)t+Y`Mgy(K|{$g6~BKw6Nd49+5jM ztgGz1T8B7S+R}X%(jcNuMF|mL#oV+Sh~v5KQ&ljpecK89LBy;!_$;t-dWt?xtdMsD#eC?vxqkDX>yCk+O})RJfhtjUfVq4eEpk zlZr=WHiP&}f{ptIqCwN-+~IAc6au0(OKTRQ9o zztH}B9n zN?9j;*O9eLKl!39w&#BMXJ41kd*bq|T5SZ^B}RU5pPKR1>r<`5tmb0PG~I?LNmlOi z=hz^bD3&-f$*tB)uYCzw$$<^{*bTFM{~gXm2beYIAJs1x9sHPZSUO<=hBus08UFtB zuS?YlzDS4n%4dNxx9Xl91cAXe4oTlbO;=P(kE!>)8B6aBa#v z?xv#8L0KXT#3+GHqcnx6mDO$>Yu9%{@S^+nJ7p-fCRI zn)kS|LI3yjg+1l%%{ceL%fMK782}IBmh$x2OS-d4KR6qwi4yLAcI6(G%WYLWO*Vcb zdywfkF80)qAJx)_r{hI!MO1H{;lA+gfz8=x=Y`MM3y%R@dB~!euE})06RVf zu%j=DWw+K|6Y&gL7#2~Tsia%jq-E?Y>HKNasCB?m#3!tm2FLA;Q2;}TCr70&7KQ_U z$|Pnrb9vEdI)k|{F^n?qCvoZ|9!NhHu40!8-{I99 zT!`VmT5pZZ&*YpOVD0jBAL$HBf=SK}*x5Wi#sx)Qd6yjhK~9a#aS#ybM;9e?F~^_Y zZ)2fn4YyO6tcjki;2mH9I9fYE1^UfhRxp&3|7CoXoDrxq1e(wOx12EAaGuNcKV`A| zi_sUrx!F}4gS5j63N1**GZ?u0TQN~9QF3kFE!q)SF>^n26nokUUPKwV ze-XvA!mcIdScHgQPpDOjLg+Wp`-1W<(``DLfoly^q(J6Ww|(YDE>2lMy5*Adk)_lm0G3E`r)|fHB$6Nn zV0sik6658;@!Wu_bsd`teVe>@C_rZ{@c9+3`66 zQs>`9eM&UWg`q4Cs{Iuv7RuLL-6E`F6mRz_?Yg4=tmc9(vV~j0&+s_+FQkBF<;ilR zI+%zusX-|ZhVZBy-(AOw{wsRJ6rb7?j*_$(ZY2`VW1)l^OSiD@2P<*Gi!o(RDHNV^ zUEMz&0wZDvbgUV0qo<7Cc(7;~l@dfQ`uSC#S}#4ds1&%hGI~aI92o`wu^4~pr>vWs zW)c#Xc4IgstNX%DIrf$`mP^Af(su9-#9~vtSB^JNGJUCFXm-81DJ>uoog7Vk=IRGb zHZiV^{3;DlrXQ&4&NDDzXzK^5$Q^&>KV>Nfu<#(be;cEPdkokx!D$w7a@wjd*fJ0s zOkV!5xe&7I_cV41_mzmmhr=`xH<}A#Zg}S041}vTF>bKRbP_Nq^YeW{?`H80ldgh zDBP~|fZ;gz>TqvZWie6hrCM%b*IgNS6FfkgQ^X{iJyf26wBjDoDvHV$X(M|@@glh+ z;$u4^BB)a;usJ8kubz7wg-ugCPmG$3=9iT4cX&&V#2pB1S7X=-hKX2!&NuR;)h(2` zgtkp1X(e8(2|NF=gwT@mH9hb8RRL~VCr3dQ4|2cssxJS9JF zbV2jxQ5!*Q)7Y7utM8bed6D(UO_pKd2u*9)GyCBTN>6LBvkA{->#E~QTSC@j`3LL} zgYj1?AaNicc(a*vOS9H}Pn!A>OelZhYqT8!Q9ZDa#2(*y_&$OWV?R!pfr0dYJ~JCI z>N54C9eiHE-?46?LqB8XR>%L0eazNV_!(mXG~_CtmPFG#2rQXYW%>-=_9MK8Ud;qxY_rly&&o zY%B}k@rt-t-MIxUPKB`uOe!oM?q?h~tJrRo!_Wkazv=yW^&S{kD=wGUT@C1pa194a zfF-W{mnGJJjp=?`fQfKsy^}cIoj4c>kqbasN3-J+lF`d$IfP!f16ipHWvc6$ItM?d zYbm30^#lIiQ!cvu>4K5@96GtFKXW{>yxu2~UHg=Plt4g3@1iuR(t98(NSEFTpmYSJcOnE- zs)8t;Nben#E=UoiNH5Zrj`YyschGy^d*6G%Z>{hDAFRbn!a652d!GI5XYZLaLoX|L zeV+vt!lg5W^=LHU%5ndE23>N<(9&`=BEqXQ0mu#ANtx$e5rR?gzj?{5+qSJg%!YOT znnxvh{J+hkHafK6GBBB5K0fs4>T#Jpilu!`_Al-ROU3ZMH5*-<&R`+2cVuMbl0EhI zMG_yK8LGc-(l+BaSqJLx(o2z#@FdYPSdsQNw;x8F-vMT}cS)4>@k`|nn7Jz|dXRAa zl4dfQYiyc1R6nC1(E|whupr*tnKIlQ`DpcE4{lG-Uv11SG|SR{H-mLNTr^Tv!bo7G zQZSKEsq|aWm>bQSa4$92x8m&#iUk3qoO^{X6bnISd~LWE_bk7J-=tDFmR@+C0Vj7F zL*JY(C0Tg6M&^0U5HEhvizdbt@Zi;BtZ)GtAMb`+1#C%-J8Z10ua)lfd!>kfY#>67 z9v|?0a3g5{XSg)N^0Ns6FR)jw9hR7JEr)1-@WGdi@pA5aknW$SkVo0|qmst6i>!(Q zemlimKCuRS!f3puC_!0`$ z8kai(uGR(z9-2un_-sAd(rj?%`e%fsgtcGR|yQ4xt z%S7=pq}b-nlrCZ|G9k_pxGbdYW!J*41-p>43*cMOF-3@DnC^*`MbA-pgi^b{33?kI zLw1#l1w9Gu{cG!~Yq+7J?%DVKpx&uTTDU@55cr)knVNa!Q(K!~%bS*;lIOFQcQ9O* zW!XD(MiJd~x5LPv#{8OK2kg-J;-&PoQ0~`teX;4)j&vrYd^OXKq^RzvqioO_OLOP9 zI{xQ#Z+kGKZ(5Dka3*pl(k4nkp@yE_lX0NXo$3yKGf*vSdJ`ciwAL~$CyUe&!I6A2 za^bk_!vhLk#g4SI;Z+iD{4{$HOp(V%ogz5uu=}ZyBwA*nNB*pzF|AhFdcu2RSh;X5 zW`j|(J1M%hzmK8DD^h;NP!mlm>#66}8hnvYat|AVl2)27arHq-l~)mExq9O;DroVM zf>Ev>DK#eoZ(HC#CEg#9jMrbNzG=Ji0!sN}kW&#FEj}!f$(wQz?GtO7!N|<@S_&Z~ zw1G~smDH3(gxR08o@nov>R9JQo0dHa1CKkKe`!}va@2AObL3*MUqEdzlG5%n_rJfg zrlgyS(bF-{_A1Ib(9TYmL-|w;vD|=0W$9;Vl;z$gWUxG5SB)L+<`7cZRooq1b&=w! zi=}=Jo5UjkSEW?i3*O)#5M)>PDz|@=cTHW?rVsQ7YJrW>b9{k^-f|x?aVn6T z#8j3p;V?!U^})IR=nb4lN1_pWhq#JlrBq3jUh`wwy%YY175#2{r$}>iZrKs8bpNEs z^kmeA1s0ou(ajp0o2(;bNK>-@8BhvwZZ&l3S!!}}+-Dy1*)(CVwj)aZlfb44CqhixJc#HQ^j(@I&pULAV-h}}J) zwNW-rifNH2!b7oTN*$tULoG_-tuN-Xg2E)E-^!P=YE86PXBFj5na;+}t4MwYxZpLvs&zj>>{FZsyxtON$GYqNDv z$#n`{6Kp8Jx7cON=&>ixCpjwk&QklTNBeXJDVh-95T!i&bmHK+~-l&i5+w3F=Au24*&rvMCQgnrEIVvb1ZP_!b>!$m;UQztUtm`0VN}>L_ zQmru|0FRBSyTAbu2N3(PW*G3EHg~EaKT?(IO)Xj0{c@eJBowSP*P0+CgR%#lExZ<7xY$!>3c;4hk|5rcmc4ZZ1^E} zZ4O=(S6nxAK)78vwC9TGz~HXlS(Xpc^+`77~1 z`1zxnH5xHg_TjJ^(4Hs~*ve^dx8fU;1e|5h9|(-k+>A2VEHg$UBc269K5QpAHxny= zmqqG3nj}SMEk~a5t}My4&|KB~xNHZjpE1$~joqa2Ox3H#AMCHdU2MiYB2pbXqJCC= zMHex8(AF$Pc{vIQLnKi_(N_YXd;PRNjzUC)Sulk%u~&pw+9pCQW-ZMl`B&)EXw63& zleC;WA(`177N;h~mVzU^+WTzHL-lUC*f;0{w>|x(qL$zaoX_G$R2H;EXWoQz`<0jt z3*)a&@c7Nl45!J%1ZJ(evD&t6gnd0`*ZJd1Xps2aL<3aVT*kIGudkbRo`bN+5 zGZtFK>5=HDL{Cd|z!lKFx5+!xg3j5HVJa z!w))+A|iU(eRj1f7mZNH7Z<&&swyY^{<@+vcGL7jm0>JhjICU#pMH#`A3!eE9Blt;#WN1TZM%Kj@<4*_{ZPw=Q|0s2YAGu%MuD_I}5c z!BWChp2J4Q;X5u}!N;Ax{PyS~5g2%JW^f3&^v5vqv#tXdQB8s)9f!>WZ<UVGOn&0+&i1on31Gu`cXXc(bFg;}Jt zj(nPTX&_tG;FfPyXrRfSdznZA>GOKqa-r&DW7FGZO83=O#Kd>R$||jDXWbk^)pO|F zGrF|28zqe8J&3UD`V5!KUF?77c*GEKndGBEz=}+$xU1{r&v18T@1edlgJeZ{E_8RmvoZ8WTOol7R zIU5^=C#;tfAk0VEk#$Z@swwF1lH6V(>po745{j_o{Ja$fbGno!k!Sr;Rlop}wnZjg z0S;BDc+^Y4T&jeP11|v4rGFm0o5{yQhFfH?>Y$MGt`l5@a$ zb{)ZRLb<4pMp;9Z!uq0rUQClJv4w~U1#nND0Lm!XV}O_BM)yFWPb#`=%in=QqpbSy zMKsA+hgRo55({6+%I<=8Jv$>JZR3BCC~`hI=*BWkj>BO1LIzljbr!7P@&#AIj#Q;b znDa|UX_%eMwpHt?uxJjJrc`uN3eWMAF!@*u9SEMSw3dFW@9LQkq(bA4q99Q#d`q#a z$xBfY8AT1%Om7WVWVCuQ7d5u`b}=tqBeA+s9wd3)ULnv5u&mV4z&_*2QZP&cucYGvq!-xp;v|y|a z+O5i`HB|Q3l`cqyO>Ek~^bHP3#bs$!Sh*M%@+dCEuR&Y-g#ZJHvS*iMHs1rgLtD5l znsDyq-_JFzh*6hif@-P?z_YhvrU#|uo35aS$SH}y()+9ovF2H;9m-PK^JRj8V4l;$H!J*%t*Wvx$^tax8rV)(fuyBiB;6hcMMW)E#O`hx+i6M%nM=@q>PV6J;(brl4} ziLSmDav1Y1pc4ghfx65lcdk-*<@Yxw!@%H;%K6T>uR|3az1)U~3G25$6DO48k#zS2 zyZrJnzz=1R&ZGdG{GW**iXhSS>o;`Ck&Kse90x94%If1sK>#j#d}Za{s$UVj?1=qL za!}bMAE{VHoHdtcn@i26iRjE3_S;LF7A(;nVWXQRIEw`0vDSmT5WGBP78blPsaoXc!K|qy_EH0EBtaP=W zH6{>Xh@+V>TVew6&F9m80B(~`P*w5>W*`wF`Tp3+HbcuCMI>tTs_f?S-w*+A1yLwv4I*Wjqx}2EG_W4O2v1Iu?V95^p zr!)y<_qb%0Rpr}eHNe<;vQY<~`zP<_-SS`O(o!b3=T!AC{it>DVjU*PTp>nj=8oM2 z@Ahra6;WSRnqy|FWd@FuzlXL$`$Y0jt8ZC~pG`B=Xd-O36HDBZvsNlPjA$uIE8D}y zT3sp#LZS)2>jMrNHYAhSaT&<Q}UKd8RueQ zv1;AFBd6_gn_oyfpqH0R+UiQq*$O+~jjw^|JCBZrA35lOELe28rKrn!EL|}vE0%B) zIDm|DxIV{kxpV_{huBd9row;yw!+YH`bcN$iCa+p-f?})u?n85-D#E+? z0oQ>zMDP%Bx<~v^rj>yl%99z1o}QL1WWd3_B;9n6gM1MY3Y+E6Ich`vKt0n3t<=Ny zgEOf}yHK~t$JvHWcYNI(t)c(!c9aTsSH8%z=aYP7L^&28W9^`th+HvX6T?%!f7C=PsM%6ELLfBtr%M)i+y z;wAgYouV|VW3UE(Y`g4F6**L@*?p*c&aEE{Q zz|`$Je3k*TrwJ|Vcs;S-dAImS*Pq3Q)=*Y?`R=g;?j z5f_y@j#|o6Kzcu+sm;s30NEQlt!?;+uyTJa%R_KY*vNtP&XB`HD}6SsIGTy&o6t*5 zc-bq&Yrs`>2}fFEuTihgr7RTO`*)7Jp@dMxdpQj?Ab{vd^MA)nVf?W-F(^a zDI`=*ob;s&9*z~ypA*tCL=KYpDqmgoBJ*3oaQ|BwNm5W>T{(>`GH`mKf@FaZc?&*V zg*Z0#i7v>%e3_Y&Xbb8^N*?5zCiQE4Ok&$D)%XmDGcs$6YIA(IwA5Gr-GO5m;=JCj zH(&6FvrJVD=Gjy|pNQVqD@mPf@3D|9q(C=q?jl%m;IF#`F&km?Bq6#ZNLwGX*-w^s z9_<*Gg7IgOk&$6Z_tA?8lkO9^{5YLbLz8eJ%Wql%GN5z=#PZfq+!O}16u9QH(eBA7 zZr;wc2c$|QC%Ws_0;ty4osNmg%^FF}2_!%|Xa=N%$0R52q;poWX-7Ri`#%N; ze`uhNHXu^AW+m(6F{-4(gh$B>zQ)BPEUDg_hwoXI9g}Ruh)LMr5fOVEa)hGXJXTGJ zNUI!Oz7Sku9H4}F=x-V9%3()s_=@v@6;J>HROQ$NZg-eNy(b257!ZM9cMpnW(5_2K zX%}gqZAQvsWir(UH@y@xzAY?{PExE*)k7$XzHt-els=7ZKo1Sl zb$0!>L{M`r9+dh859|xdwK2a2M?hNo$3a+r_PJMId*21^!Q+tzMXP>%?3AUf5#~Lt zMw~f2QwJ~oo|lm!p2GKawUx=IAN6e#fbm{MT>whe-SInSM|peN%K=gBX5SO?&Nshe zwyAp9tyw{Faa+iGT6Mmooh{srRS~jpBSQqXH5C*j0=G?s=IcPf-fwuv=|;DBdQzU( z-i#?8c4y6-t-^hy)CO!Fsd{5dTN9z!x}QM$hlTN#nSIaocyHY>C0RmBY-$Bot@6M# zV`XzbV<7R`n~shW9k(bOFp3ZoPH3@S9uy9rJMHb;9RhH4ehwu2Xa3E!%t0^{VDGcA z7EK(9uY(0iKz;IYvK!m;X@7P03{a?#CsUc#FMFu(lrP`lHslK6kVkcoxg$d+ zP($j7T)1RN+hw{$z}yeV8E@7gcr9998kuH&@$IS^{4BCQ#)#tWI&on=^kN4QUIWp7(*4@6nanRm z#nr-o!3PV7%)s*S37eD)l$8wyrDjtamEGG~C@m4w;a6OovN(49)&=imyGU&t#U;0G zzrK>MYfGL(z%ZHs0p#Q)NEom}?Ik&)vVg$PbFO{%CQPy8 zO+wBhD5M%@XPD^miXfsS1GJb8vGL@>5Vv$XnAMm#-PB{a}m(pBl0r z2l4_KKxH_jG7mv5J#4Zx>u#|R6Liw4{(}S{_Ri7s0$$HKnM}2Hspg1#I=ryc^lr+C zu2sn$2Ii4DzYa(2s1YxR7Ht+g&*+LeH&8yCFE!23-D+vl%r)=Cg)?4PLItL94FN8+ z5{&%8QYwLcrb^KBOsD=HbJK^vxw-efx$KwfML`g?zSihgmSS8C=d|k0BugJh%0fQo4}Zwx_0-Y!bV<~b3=@?Oqo>r z9S4y=VjpwAD_{gQJnu%U{0EBaAYCbL?d_yCBBGw&{QERbUnRS>f~0G9bq&$ZTAsYn z<2;G&SF+oB+!PH*)DY4Y!j|LM;9EV}DGN0a)$wg3QGm%MA0$xWI70hpfISsL2Uaub z6m~zdoMoYnnUB67NT))UH=or)rEYS^%}948vi^2@UhEWweC2}|d%Z_y%q!bWyFa8k zsZ)FR6N|)(6I+V$HFym#SA0}RfNHL6We(!oJqWWV|#An1uW4$ z21E5+O77baU9iw&5C4PtFp!&CJkh>3Zpd*rBXz#6Jquuep9gezARCoBg-T_)?6?cD zPgz-6%ksB0IYFVCItvAFrxMvBfyW>t6Mfjl&e&r+0SoLz#+$&TS)ZJ_Z8YeH?ITf2O&}L(;&6;y#bOeYO+KK z_;t=%wiXY5X#RdPnZs|TdP$lMEa|(V?ws_Qvz}Gcei8Z5=q2xlvf{$KYdB@;eA7cZ zV!647s8iu}VUj%JD)6xVGaLV6`=s(^pfpO&MS8NMEFvQVlnor?{D_ex6pEvJ8$hn0 zSLw3LAsKUSOw8?hjdPT)z3cZ_1;LC!Vi)$rmI~Gbt49n#srP4mdkXp3;$7W2hBG$s3P`mBBHbAvg^GrZSZ#5*V9*D@XwJ!Xn@=pbJVKtXC}3A zeIq`TQ87tm^P5%R1p#3;@*-p+WG@aOEtKi93PHaknMththSsRl_-s#2%S2aGR`yk+ zHO5Y+t9UfDgp?SdyqkCfGgu~lYfdd6gJUtv*VM-gDfYvfuRR-Yy0WWE#Vy`?OmH4r zcq6W9JLTx)r7YD5^&ejL4r?j!Nb+jDOjGzx;PJJCsA$Udv6RU(IcAg5XjEc^vT1Bt zZPwCD*=SQEOCTw%R?uex;R6|PKi1|cg@_4z(0B_FnRgbsxde%bbxt|=?fm^}9m`t4 zG?9N$IuIGik=ikDq|=O~xcz^25|zbN6XurkHbA=`yqO-{s^)P>pvm)K;VIGPMz!1# zhKq>M;==Q6D|_+Y#v44i$HG60b8J#Fv8ahy?tICal)xDlhP2`mG&fETT|35>)gJTv z)2vuXZ1OE-@4&|})rgM89(U=I#Bg?iD~C$f+dY~?Y^E3SC6dy)PPWmF<(3i3x^nQVDrLFRaRJ-!XAtPT5M%e^ifz? zwD@8*P>`}0ss0y|0Socr%o+M~jHpR{|Cnx3HaohL!NM=JT7|zR#|&gB7wZua4WH~AED#51F{_F;Ydc8%Ny&gqY4L;8 zy^enuEq+xlVChYuMAXwnlC_c|D|-NCRG{pf99zl;Di6@wUnYq$Lb{!$w#fOYpH1Wn z$<)xj4W?k{j|)!u#C4sYopM)?YAjE!uSXA0ACW06W$8T z6F~#8%;!nX4lkIj2?vCAOC^GLowvZu>IFU8 zV*V%__=NIum>w)h{(0G7*!cIWLN$OBSL@%>VuM70os|3W=WpBptLfB=$l$PU-K3PN zl#U34y3~<|gR=W4v4QWW0x+)z*Av6l85H$IfLr{{%{uFVcGYjnjW8i)t^&E4f@G|! z+$GF@8{_vYWHFK7dELo+#Z2uesk&Z^j{_r9^=QLh1lf+k=8Lnf^PF{fT5Vgv&mCz@ zXhEOB=K93(*~M<(LCA)hAOi#ML|$EVnZ5sHpRA)E^=VY}H$>mC$$;Cqr~guG)05X{ zZ)DFxReQ8sb6fgj9H*o#sL~oHO#^=zh=^!*1)u`{t1--;z|cLZ>DD&~9qR#OaPiZq z8vKv;VuK{uod?w!E20AyJ(8$-#$Qt1pVW3W zzHUp3hM8xz#F%&vk7Lr#zuQ;44?Z*TYA^H1G_I1wNHa|L$#^F<9H_o2nS4p}ch|?l znSuhQR`rhu5Jr5NNzBgT{u@W7Y{+PTjK>LvA$nZ$Vi@JIGJUN@ifh=w_fxB2&c^h> zj?{2mf^}q}HaGWSuO<@xB+Ke9WRg2I;NzRK;E_k~E1gsA6Rfs9_r&o+1JBsefqH#R% ze}V}>Fbv`L9^o4``H<=8WHXEwHGSIUy78JSWn$;mPoKl|v#&W$Bvostv*%}+v$_ML zkFL_zsg*s`=X`vnCPo(Csv`V*tKFEfnSiq#OhcNCZ6AGtKp*jV>b2@IzJ^sP2)iRm z_j#~-U>~VB*3$5sR4cpND#FL>W4EnF8`in&=1*fO3up8m`}afVy<2iWSqhp ze(3boY;;7RRvNu_Wh9-wCIZf_hq(1!K6>t>fm+tbv%U%6^V1}cmR`b>{z=p7S;+!I z@Jcw-d7aV5NL^axTJf~KwJab0E6Oi1kpJ>(m>Q_je+j$p$Mk*4gYTB>dSP%s zT(ZyB+j4|SfP+8tp`d{+@)GRjcNLzKaK>tHuM2a@fUp)3y@~$*n5>mc2W9Epea?6B zsduKL8{<`B3OTB*nW~%daAK;N2|Up;C*M4onW^?=6o($GkA3*8Hde+N@_0yP?8?R2 z>$!@1=Yy&TlQZAE-Z0cSe&dy~t~r}+%xNj#Pl43$6G2!>#*Hp!m3521Oq>L)-1Io! z7Knjb8DD(m=HJWkS0BG3>m8or+vVYVK*!gu#@KSdXoNqLFWYh4eceSwOH!h=60zv_ zcjCbYJz?HDU1G4@^b)?DgW>|_pw1}{!|51HCov4=AI8t8?)?wmPd3JZT#(}5OC3$K ztT>NYOgmeEY#7M~2yxr(j+HjF+vE83Jj(HoHCGnJi+>7BJg+(L$@1tb>ljn1vTE`_ z6Wu7wiPpDUyrr7c+3MO?R=0}|#uS^qA2Xdr zX95Hz;=9@(cXr$qQ06!(HKA{{dLPN68W=ws;WlF#w!UC?_)^-%xoi4x$F)8_L)vy= zYg&l}z8SEPmCe@GxGGl|c-nhro>aX)=Gdn?O!+1JAIO^q5uMY2TH_V}S}YT&*P)j} z8!DmJi}UyJ{FjF!$UsAdV>78dEj*tJ!(qbqBQPu3oo>MFh8*SQ)$D(1l7c@dWLv;n~2}Nzxo2a z(q#o|^umTJ;r|Y(zxcRN6E>GDd)71!^>ZIN-*x8$nBTwsd@kvL`)&8;McA#4`z0s^ zB+D=`a{^0TCKlbSXgXg_VHwK^QU^F_qFcQNU}#Lg-`G={<1nBAwsx^5tjpEjtYOE- zjf!my+>FJ91^TYd8wklX?GGQJSAJFM4MCjzH5S?8qG+gEH%NIbSqe&5r(r&sYf ztGWNs=5z60;!C!BVH<}V*D&)H9!a5J|E41@B~PI`pa70f5C2nc_)A0mdR6+a+01Xd z12eoS`_Rb;;Pkd|^|F-&RFAFWj#X#5T)G2ddGmZ`ijlu|bb2R$cl`&S&-Bxk)Rg?O z(Z_*frasez7(*wF!{nlXmdz5tY{oi39h|OV^V&?A^1)AF@u;cS5C%#-t!qGRLIloQ z9MnDTQbM9D)TgaB{Re;C>IvQcFZ#p6DF6aqr4m1z!hem=Um_#^+F|V#FWxEN)2E5f zGFzWFC!!A+O3hA=s3vYM(a-Fyaq?H%uf1(JiF`9rX2f1NUv;%%={T^uBUQ$t=`6c@ zJvp|9j{tn;Jfl^;xoy1>*l?y)g0zm+v9G|KHyssEO=aFM|6xZhvHmf`)9-tMdCJ9> zUNMH&KXG)vV)HpX+qO^AJ%@yZf#Ldf{vo%~+W;Z|)jG0eaX_m{*C^|={Qc9vn5wg& z`P;YThNECJFfxfM#XWgrOv=tv#*ZK51qJzB@R^k{E5=Rr0xG+d=NhZW98JfB1g_LEl(!Pi(MYsYi#O+c`N1YK*dK@*85wpq+?ja@|T5mNm*}hl@da|!5azL7l%{< z4@IXjr5l*+rsCS!@1>~_sqF~=i&Xa3@|vUS`mw_RU;G1DeGfuH#*0cqI=cy)`MZKR@*E}2^gN?q$ zK85+F)l8-OSaqdJ2r;mU?`9TZqDC9~JsfEuX@T{dwkOT(PL~Q1>^qKPA7}DE*7dcy znB#vu8ZRLE=perThC#mja^UH(r#xci*we(aO`b)?Gpujnz>jgX@w;2y&-{v3e&JY5 zUdhy>nZu8*A`8NFdAGcH!b^Vuz;V4$)(&>XUk2dvMOL zNyER8nJx`T%!!3g?r2i+6<0uJ&0BB({}uXD@C-IE9v##p=x}bj4N^9Fls0+0Y_$aNF^bZ$26>Mm*Cn7 zM75y#m7VfLnfJF)Wr2s8+k(T1J-xl-V~V?M-Fs6BU4_wR-oC=JJQ>D$D0h=@pAtgf zynsi>#AfIGLty=}YVD@A6i9#Ld6LFH)}DHXrGv4EfZch&9`%OjrtKd%$mYybcN diff --git a/docs/index.rst b/docs/index.rst index c1ce3d1..606259d 100644 --- a/docs/index.rst +++ b/docs/index.rst @@ -19,7 +19,7 @@ O-RAN O-DU Low ============== -**User Guide, March 2022** +**User Guide, June 2022** .. toctree:: :maxdepth: 2 @@ -80,8 +80,8 @@ Running L1 and TESTMAC * :ref:`search` -Test Cases for the E Maintenance Release -======================================== +Test Cases for the F Release +============================ .. toctree:: :maxdepth: 2 diff --git a/docs/release-notes-fh.rst b/docs/release-notes-fh.rst index 9979753..b05db01 100644 --- a/docs/release-notes-fh.rst +++ b/docs/release-notes-fh.rst @@ -18,6 +18,14 @@ Front Haul Interface Library Release Notes ========================================== + +Version FH oran_f_release_v1.0, June 2022 +----------------------------------------- + +* Update to DPDK 20.11.3 +* oneAPI compiler support +* core optimizations for massive mimo scenarios + Version FH oran_e_maintenance_release_v1.0, March 2022 ------------------------------------------------------ diff --git a/docs/release-notes.rst b/docs/release-notes.rst index d50e97e..4f4d334 100644 --- a/docs/release-notes.rst +++ b/docs/release-notes.rst @@ -19,6 +19,15 @@ O-DU Low Project Release Notes ========================================== +O-DU Low oran_f_release_v1.0. June 2022 +--------------------------------------- + +* Enhanced features and optimizations in support of MMIMO and URLC. +* Enhanced test coverage prior to the comunity release. +* Incorporation of Bug Fixes for E2E connectivity from Commercial product. +* Additional information at the component level release notes. +* Support for oneAPI compiler. + O-DU Low oran_e_maintenance_release_v1.0, Mar 2022 -------------------------------------------------- diff --git a/docs/test_cases.rst b/docs/test_cases.rst index c999c43..4fe93a7 100644 --- a/docs/test_cases.rst +++ b/docs/test_cases.rst @@ -24,10 +24,10 @@ Test Cases :depth: 3 :local: -This section describes the downlink, uplink and full duplex bit exact test cases that are present as part of the E Maintenance Release |br| +This section describes the downlink, uplink and full duplex bit exact test cases that are present as part of the F Release |br| release. All the test config files, IQ samples and reference Inputs are placed under the FlexRAN/testcase folder. These test config files are used for testmac. -There are 3 kinds of tests: dl, ul, and fd. The following test cases are part of the E Maintenance Release and reside in the github repo mentioned earlier in this document. +There are 3 kinds of tests: dl, ul, and fd. The following test cases are part of the F Release and reside in the github repo mentioned earlier in this document. The following DL, UL and PRACH test cases are used for validation. diff --git a/docs/wls-lib-installation-guide.rst b/docs/wls-lib-installation-guide.rst index a825f95..9f3fd57 100644 --- a/docs/wls-lib-installation-guide.rst +++ b/docs/wls-lib-installation-guide.rst @@ -22,8 +22,8 @@ Wls Lib Installation Guide The wls library uses DPDK as the basis for the shared memory operations and requires that DPDK be installed in the system since in the makefile it uses the RTE_SDK environment variable when building the library. |br| -The current release was tested using DPDK version 20.11.1 but it doesn't preclude the -use of newer releases. Since the L1 binaries are built with DPDK 20.11.1 the ODULOW as a whole +The current release was tested using DPDK version 20.11.3 but it doesn't preclude the +use of newer releases. Since the L1 binaries are built with DPDK 20.11.3 the ODULOW as a whole does has the limitation to use only this version of DPDK. Also the library uses the Intel Compiler that is defined as part of the ODULOW documentation. diff --git a/docs/wls-lib-release-notes.rst b/docs/wls-lib-release-notes.rst index fbd2fc8..24b69c3 100644 --- a/docs/wls-lib-release-notes.rst +++ b/docs/wls-lib-release-notes.rst @@ -15,6 +15,12 @@ WLS Library Release Notes ========================= +Version WLS oran_f_release_v1.0, June 2022 +------------------------------------------ + +* Support for oneAPI compiler +* Added flag in WLS_Put for LTE support + Version WLS oran_e_maintenance_release_v1.0, Mar 2022 ----------------------------------------------------- diff --git a/docs/xRAN-Library-Design_fh.rst b/docs/xRAN-Library-Design_fh.rst index 7db7784..077e0aa 100644 --- a/docs/xRAN-Library-Design_fh.rst +++ b/docs/xRAN-Library-Design_fh.rst @@ -25,7 +25,7 @@ O-RAN Library Design The O-RAN Library consists of multiple modules where different functionality is encapsulated. The complete list of all \*.c and \*.h -files as well as Makefile for O-RAN (aka FHI Lib) release is: +files, as well as Makefile for O-RAN (aka FHI Lib)f release is: ├── app @@ -35,8 +35,22 @@ files as well as Makefile for O-RAN (aka FHI Lib) release is: │ ├── Makefile +│ ├── ifft_in.txt + +│ ├── run_o_du.sh + +│ ├── run_o_ru.sh + │ ├── src +│ │ ├── app_bbu_main.c + +│ │ ├── app_bbu_pool.c + +│ │ ├── app_bbu_pool.h + +│ │ ├── app_dl_bbu_pool_tasks.c + │ │ ├── app_io_fh_xran.c │ │ ├── app_io_fh_xran.h @@ -45,6 +59,12 @@ files as well as Makefile for O-RAN (aka FHI Lib) release is: │ │ ├── app_profile_xran.h +│ │ ├── app_ul_bbu_pool_tasks.c + +│ │ ├── aux_line.c + +│ │ ├── aux_line.h + │ │ ├── common.c │ │ ├── common.h @@ -55,6 +75,10 @@ files as well as Makefile for O-RAN (aka FHI Lib) release is: │ │ ├── debug.h +│ │ ├── ebbu_pool_cfg.c + +│ │ ├── ebbu_pool_cfg.h + │ │ ├── sample-app.c │ │ └── xran_mlog_task_id.h @@ -65,6 +89,8 @@ files as well as Makefile for O-RAN (aka FHI Lib) release is: │ ├── cat_b +│ ├── dss + │ ├── lte_a │ ├── lte_b @@ -81,8 +107,12 @@ files as well as Makefile for O-RAN (aka FHI Lib) release is: │ │ ├── xran_cp_api.h +│ │ ├── xran_ecpri_owd_measurements.h + │ │ ├── xran_fh_o_du.h +│ │ ├── xran_fh_o_ru.h + │ │ ├── xran_lib_mlog_tasks_id.h │ │ ├── xran_mlog_lnx.h @@ -115,10 +145,6 @@ files as well as Makefile for O-RAN (aka FHI Lib) release is: │ └── src -│ ├── xran_app_frag.c - -│ ├── xran_app_frag.h - │ ├── xran_bfp_byte_packing_utils.hpp │ ├── xran_bfp_cplane8.cpp @@ -127,7 +153,7 @@ files as well as Makefile for O-RAN (aka FHI Lib) release is: │ ├── xran_bfp_cplane16.cpp - ├── xran_bfp_cplane16_snc.cpp +│ ├── xran_bfp_cplane16_snc.cpp │ ├── xran_bfp_cplane32.cpp @@ -137,8 +163,6 @@ files as well as Makefile for O-RAN (aka FHI Lib) release is: │ ├── xran_bfp_cplane64_snc.cpp -│ ├── xran_bfp_cplane8.cpp - │ ├── xran_bfp_ref.cpp │ ├── xran_bfp_uplane.cpp @@ -173,8 +197,6 @@ files as well as Makefile for O-RAN (aka FHI Lib) release is: │ ├── xran_dev.h -│ ├── xran_ecpri_owd_measurements.h - │ ├── xran_frame_struct.c │ ├── xran_frame_struct.h @@ -213,10 +235,6 @@ files as well as Makefile for O-RAN (aka FHI Lib) release is: │ └── xran_up_api.c -├── Licenses.txt - -├── readme.md - └── test ├── common @@ -241,18 +259,20 @@ files as well as Makefile for O-RAN (aka FHI Lib) release is: └── test_xran + ├── c_plane_tests.cc + ├── chain_tests.cc ├── compander_functional.cc ├── conf.json - - ├── c_plane_tests.cc - + ├── init_sys_functional.cc ├── Makefile + ├── mod_compression_unit_test.cc + ├── prach_functional.cc ├── prach_performance.cc @@ -260,35 +280,37 @@ files as well as Makefile for O-RAN (aka FHI Lib) release is: ├── unittests.cc └── u_plane_functional.cc + + ├── u_plane_performance.cc General Introduction -------------------- -The O-RAN Library functionality is broken down into two main sections: +The O-RAN FHI Library functionality is broken down into two main sections: - O-RAN specific packet handling (src) -- Ethernet and supporting functionality (Ethernet) +- Ethernet and supporting functionality (ethernet) -External functions and structures are available via set of header files -in the API folder. +External functions and structures are available via a set of header +files in the API folder. This library depends on DPDK primitives to perform Ethernet networking -in userspace, including initialization and control of Ethernet ports. +in user space, including initialization and control of Ethernet ports. Ethernet ports are expected to be SRIOV virtual functions (VF) but also -can be physical functions (PF) as well. +can be physical functions (PF) as well This library is expected to be included in the project via xran_fh_o_du.h, statically compiled and linked with the L1 application as well as DPDK libraries. The O-RAN packet processing-specific functionality is encapsulated into this library and not exposed to the -rest of the 5G NR pipeline. +rest of the 5G NR pipeline. -This way, O-RAN specific changes are decoupled from the 5G NR L1 -pipeline. As a result, the design and implementation of the 5G L1 -pipeline code and O-RAN library can be done in parallel, provided the -defined interface is not modified. +This way, O-RAN specific changes are decoupled from the L1 pipeline. As a +result, the design and implementation of the 5G L1 pipeline code and +O-RAN FHI library can be done in parallel, provided the defined interface is +not modified. Ethernet consists of two modules: @@ -328,8 +350,9 @@ Figure 25. Illustration of O-RAN Sublayers A detailed description of functions and input/output arguments, as well as key data structures, can be found in the Doxygen file for the FlexRAN -5G NR release. In this document supplemental information is provided -with respect to the overall design and implementation assumptions. +5G NR release, Refer to Table 2. In this document, supplemental +information is provided for the overall design and implementation +assumptions.(Available only outside of the Community Version) Initialization and Close ------------------------ @@ -351,24 +374,24 @@ of half of the slot of symbols (7 symbols) and Full slot of symbols 14 symbols). 5.Call xran_open() to initialize PRACH configuration, initialize DPDK, -and launch O-RAN timing thread. +and launch xRAN timing thread, 6.Call xran_start() to start processing O-RAN packets for DL and UL. After this is complete 5G L1 runs with O-RAN Front haul interface. During run time for every TTI event, the corresponding call back is called. For packet reception on UL direction, the corresponding call back is called. -OTA time information such as frame id, subframe id and slot id can be +OTA time information such as frame id, subframe id, and slot id can be obtained as result synchronization of the L1 pipeline to GPS time is performed. To stop and close the interface, perform this sequence of steps: -7.Call xran_stop() to stop the processing of DL and UL. +1.Call xran_stop() to stop the processing of DL and UL -8.Call xran_close() to remove usage of O-RAN resources. +2.Call xran_close() to remove usage of xRAN resources -9.Call xran_mm_destroy() to destroy memory management subsystem. +3.Call xran_mm_destroy() to destroy memory management subsystem After this session is complete, a restart of the full L1 application is required. The current version of the library does not support multiple @@ -382,7 +405,7 @@ The sample application gives an example of a test configuration used for LTE and folder /app/usecase/ contains set of examples for different Radio Access technology (LTE|5G NR), different category (A|B) and list of numerologies (0,1,3) and list of bandwidths (5,10,20,100Mhz). -Some configuration options are not used in the current release and are reserved +Note: Some configuration options are not used in the f release and are reserved for future use. The following options are available: @@ -417,9 +440,9 @@ The following options are available: **From an implementation perspective:** -xran_init() performs init of the O-RAN library and interface according to -struct xran_fh_init information as per the start of application -configuration.: +The xran_init() performs init of the O-RAN FHI library and interface +according to struct xran_fh_init information as per the start of +application configuration: - Init DPDK with corresponding networking ports and core assignment @@ -427,13 +450,13 @@ configuration.: - Init DPDK timers and DPDK rings for internal packet processing -- Instantiate ORAN FH thread doing +- Instantiates ORAH FH thread doing - Timing processing (xran_timing_source_thread()) - ETH PMD (process_dpdk_io()) - - IO O-RAN-PHY exchange (ring_processing_func()) + - IO XRAN-PHY exchange (ring_processing_func()) **xran_open()** performs additional configuration as per run scenario: @@ -455,11 +478,11 @@ Data Exchange ~~~~~~~~~~~~~ Exchange of IQ samples, as well as C-plane specific information, is -performed using a set of buffers allocated by O-RAN library from DPDK +performed using a set of buffers allocated by xRAN library from DPDK memory and shared with the l1 application. Buffers are allocated as a -standard mbuf structure and DPDK pools are used to manage the allocation -and free resources. Shared buffers are allocated at the init stage and -are expected to be reused within 80 TTIs (10 ms). +standard mbuf structure, and DPDK pools are used to manage the +allocation and free resources. Shared buffers are allocated at the init +stage and are expected to be reused within 80 TTIs (10 ms). The O-RAN protocol requires U-plane IQ data to be transferred in network byte order, and the L1 application handles IQ sample data in CPU byte @@ -582,10 +605,10 @@ to allocate memory map of PRBs for each TTI.:: }; -For the Bronze release C-plane sections are expected to be provided by L1 -pipeline. If 100% of RBs always allocated single element of RB map +C-plane sections are expected to be provided by the L1 +pipeline. If 100% of the RBs are used they are always allocated as a single element RB map, that is expected to be allocated across all symbols. Dynamic RB allocation is -performed base on C-plane configuration. +performed based on C-plane configuration. The O-RAN library will require that the content of the PRB map should be sorted in increasing order of PRB first and then symbols. @@ -612,7 +635,7 @@ destroy the memory management subsystem. From an implementation perspective, the O-RAN library uses a standard mbuf primitive and allocates a pool of buffers for each sector. This function is performed using rte_pktmbuf_pool_create(), -rte_pktmbuf_alloc(), rte_pktmbuf_append() to allocate one buffer per +rte_pktmbuf_alloc(), and rte_pktmbuf_append() to allocate one buffer per symbol for the mmWave case. More information on mbuf and DPDK pools can be found in the DPDK documentation. @@ -784,8 +807,10 @@ and define structures shared between l1 and O-RAN lib as shown: :: }; -Doxygen file and xran_fh_o_du.h provide more details on the definition -and usage of these structures. +The Doxygen file and xran_fh_o_du.h provides more details on the +definition and usage of these structures. Refer to *Table 2*, for +FlexRAN 5G NR Reference Solution RefPHY (Doxygen).(Not available in +the community version). O-RAN Specific Functionality ---------------------------- @@ -825,8 +850,8 @@ and called directly.:: xran_compression.h – interface to compression/decompression functions -Doxygen files provide detailed information on functions and structures -available. +Source code comments can provide more details on functions and +structures available. .. _c-plane-1: @@ -837,33 +862,36 @@ Implementation of the C-plane set of functions is defined in xran_cp_api.c and is used to prepare the content of C-plane packets according to the given configuration. Users can enable/disable generation of C-plane messages using enableCP field in struct -xran_fh_init structure during init of ORAN front haul. The time of -generation of C-plane message for DL and UL is done “Slot-based,” and -timing can be controlled using O-DU settings according to Table 4. +xran_fh_init structure during the initialization of O-RAN front haul. +The time of generation of C-plane message for DL and UL is done +“Slot-based,” and timing can be controlled using O-DU settings according +to *Table 4*. The C-plane module contains: - initialization of C-plane database to keep track of allocation of resources -- code to prepare C-plane packet for TX (O-DU) +- Code to prepare C-plane packet for TX (O-DU) - eCPRI header - append radio application header - append control section header - append control section -- parser of C-plane packet for RX (O-RU emulation) +- Parser of C-plane packet for RX (O-RU emulation) - parses and checks Section 1 and Section 3 packet content Sending and receiving packets is performed using O-RAN ethdi sublayer functions. +More information on function arguments and parameters can be found in +the comments for the corresponding source code. + Creating a C-Plane Packet ^^^^^^^^^^^^^^^^^^^^^^^^^ -API and Data Structures -''''''''''''''''''''''' +1. API and Data Structures A C-Plane message can be composed using the following API::: @@ -905,12 +933,12 @@ example given below::: dir is the direction of the C-Plane message to be generated. Available parameters are defined as XRAN_DIR_UL and XRAN_DIR_DL. -sectionType is the section type for C-Plane message to generate, as O-RAN -specification defines all sections in a C-Plane message shall have the -same section type. If different section types are required, they shall -be sent with separate C-Plane messages. Available types of sections are -defined as XRAN_CP_SECTIONTYPE_x. Please refer to the Table 5-2 Section -Types in chapter 5.4 of ORAN specification. +sectionType is the section type for C-Plane message to generate, as +O-RAN specification defines all sections in a C-Plane message shall have +the same section type. If different section types are required, they +shall be sent with separate C-Plane messages. Available types of +sections are defined as XRAN_CP_SECTIONTYPE_x. Refer to *Table* 2, +*O-RAN Specification*, Table 5-2 Section Types. numSections is the total number of sections to generate, i.e., the number of the array in sections (struct xran_section_gen_info). @@ -919,7 +947,10 @@ hdr is the structure to hold the information to generate the radio application and section header in the C-Plane message. It is defined as the structure of xran_cp_header_params. Not all parameters in this structure are used for the generation, and the required parameters are -slightly different by the type of section, as described in Table 10. +slightly different by the type of section, as described in Table 10 and +References in the remarks column are corresponding Chapter numbers in +the O-RAN *FrontHaul Working Group Control, User, and Synchronization +Plane Specification* in *Table 2*. Table 10. struct xran_cp_header_params – Common Radio Application Header @@ -1005,7 +1036,7 @@ Table 11. struct xran_cp_header_params – Section Specific Parameters | || are | | | | | | | | | || defined | | | | | | | | | || as | | | | | | | | -| || O-RAN\ | | | | | | | | +| || X-RAN\ | | | | | | | | | | _COMP | | | | | | | | | || METHOD_x\| | | | | | | | | || xxx | | | | | | | | @@ -1039,7 +1070,13 @@ Table 11. struct xran_cp_header_params – Section Specific Parameters | || Length. | | | | | | | | +----------+-----------+----------+---------+---+---+---+---+----------+ -**Only sections types 1 and 3 are supported in the current release.** +**Note:** + +1.Only sections types 1 and 3 are supported in the current release. + +2.References in the remarks column are corresponding Chapter numbers in +the *O-RAN Fronthaul Working Group Control, User, and +Synchronization Plane Specification* in *Table 2*. Sections are the pointer to the array of structure which has the parameters for section(s) and it is defined as below::: @@ -1065,8 +1102,7 @@ parameters for section(s) and it is defined as below::: info is the structure to hold the information to generate section and it is defined as the structure of xran_section_info. Like xran_cp_header_params, all parameters are not required to generate -section and Table 12 describes which |br| -parameters are required for each +section and *Table 12* describes which parameters are required for each section. Table 12. Parameters for Sections @@ -1096,7 +1132,7 @@ Table 12. Parameters for Sections | || de\ | | | | | | | | | fined | | | | | | | | || as | | | | | | | -| || O-RA\| | | | | | | +| || X-RA\| | | | | | | | | N\ | | | | | | | | || _RBI\| | | | | | | | | ND\ | | | | | | | @@ -1233,12 +1269,18 @@ Table 12. Parameters for Sections | | ease. | | | | | | | +-------+-------+-------+-------+-------+-------+-------+-------+ -**Only sections types 1 and 3 are supported in the current release.** +Note: + +1.Only sections types 1 and 3 are supported in the current release. -**The xran_section_info has more parameters – type, startSymId, iqWidth, +2.References in the remarks column are corresponding Chapter numbers in +the *O-RAN FrontHaul Working Group Control, User, and +Synchronization Plane Specification* in *Table 2*. + +Note: xran_section_info has more parameters – type, startSymId, iqWidth, compMeth. These are the same parameters as those of radio application or section header but need to be copied into this structure again for -the section data base.** +the section data base. exDataSize and exData are used to add section extensions for the section. @@ -1284,9 +1326,11 @@ by the type of section extensions like below.:: }; For section extension type 1, the structure of xran_sectionext1_info is -used. Please note that the O-RAN library will use bfwIQ (beamforming -weight) as-is, i.e., O-RAN library will not perform the compression, so -the user should provide proper data to bfwIQ.:: +used. + +Note: The O-RAN library will use beamforming weight (bfwIQ) as-is, i.e., +O-RAN library will not perform the compression, so the user should provide +proper data to bfwIQ.:: struct xran_sectionext2_info { @@ -1315,6 +1359,35 @@ the user should provide proper data to bfwIQ.:: For section extension type 2, the structure of xran_sectionext2_info is used. Each parameter will be packed as specified bit width.:: + struct xran_sectionext3_info { + + uint8_t codebookIdx; + + uint8_t layerId; + + uint8_t numLayers; + + uint8_t txScheme; + + uint16_t crsReMask; + + uint8_t crsShift; + + uint8_t crsSymNum; + + uint16_t numAntPort; + + uint16_t beamIdAP1; + + uint16_t beamIdAP2; + + uint16_t beamIdAP3; + + }; + +For section extension type 3, the structure of xran_sectionext3_info is +used.:: + struct xran_sectionext4_info { uint8_t csf; @@ -1345,8 +1418,9 @@ used.:: }; For section extension type 5, the structure of xran_sectionext5_info is -used. Please note that current implementation supports maximum two sets -of additional parameters.:: +used. + +Note: Current implementation supports maximum two sets of additional parameters.:: struct xran_sectionext6_info { @@ -1360,8 +1434,8 @@ of additional parameters.:: }; - For section extension type 6, the structure of xran_sectionext6_info is - used. +For section extension type 6, the structure of xran_sectionext6_info is +used.:: struct xran_sectionext10_info { @@ -1414,10 +1488,10 @@ app_init_xran_iq_content() from sample-app.c. Detail Procedures in API '''''''''''''''''''''''' -xran_prepare_ctrl_pkt() has several procedures to compose a C-Plane +The xran_prepare_ctrl_pkt() has several procedures to compose a C-Plane packet. -1. Append transport header +1. Append transport header: - Reserve eCPRI header space in the packet buffer @@ -1443,9 +1517,7 @@ packet. 2. Append radio application header: -- xran_append_radioapp_header() checks the type of section through - params->sectionType and determines proper function to append - remaining header components. +- The xran_append_radioapp_header() checks the type of section through params->sectionType and determines proper function to append remaining header components. - Only section type 1 and 3 are supported, returns XRAN_STATUS_INVALID_PARAM for other types. @@ -1454,25 +1526,21 @@ packet. header and size to calculate the total length in the transport header. -For section type 1, xran_prepare_section1_hdr() and sizeof(struct -xran_cp_radioapp_section1_header) +- For section type 1, xran_prepare_section1_hdr() and sizeof(struct xran_cp_radioapp_section1_header) -For section type 3, xran_prepare_section3_hdr() and sizeof(struct -xran_cp_radioapp_section3_header) +- For section type 3, xran_prepare_section3_hdr() and sizeof(struct xran_cp_radioapp_section3_header) -- Reserves the space of common radio application header and composes - header by xran_prepare_radioapp_common_header(). +- Reserves the space of common radio application header and composes header by xran_prepare_radioapp_common_header(). -- The header is stored in network byte order. + The header is stored in network byte order. - Appends remaining header components by the selected function above -- The header is stored in network byte order + The header is stored in network byte order -3. Append section header and section +3. Append section header and section: -- xran_append_control_section() determines proper size and function to - append section header and contents. +- The xran_append_control_section() determines proper size and function to append section header and contents. - For section type 1, xran_prepare_section1() and sizeof(struct xran_cp_radioapp_section1) @@ -1492,12 +1560,9 @@ xran_cp_radioapp_section3_header) - Appends section extensions if it is set (ef=1) -- xran_append_section_extensions() adds all configured extensions by - its type. +- The xran_append_section_extensions() adds all configured extensions by its type. -- xran_prepare_sectionext_x() (x = 1,2,4,5) will be called by the - type from xran_append_section_extensions() and these functions - will create extension field. +- The xran_prepare_sectionext_x() (x = 1,2,4,5) will be called by the type from and these functions will create extension field. Example Usage of API '''''''''''''''''''' @@ -1747,7 +1812,7 @@ APIs to reset the storage for a new slot are: The structure of xran_section_info is used to store/retrieve information. This is the same structure used to generate a C-Plane -message. Please refer to Section 5.4.2.1.1 for more details. +message. Refer to Section *1, API and Data Structures* for more details. The storage for section information is declared as a multi-dimensional array and declared as a local static variable to limit direct access. @@ -1756,15 +1821,11 @@ the number of stored section information items (cur_index) and the array of the information (list), as shown below. /* - \* This structure to store the section information of C-Plane - \* in order to generate and parse corresponding U-Plane \*/ struct xran_sectioninfo_db { - -uint32_t cur_index; /* Current index to store for this eAXC \*/ - +uint32_t cur_index; /* Current index to store for this eAXC*/\ struct xran_section_info list[XRAN_MAX_NUM_SECTIONS]; /* The array of section information \*/ @@ -1783,7 +1844,7 @@ needed. Note. Since the context index is not managed by the library and APIs are expecting it from the caller as a parameter, the caller shall -consider a proper way to manage it to avoid corruption. The +consider a proper method to manage it to avoid corruption. The current reference implementation uses a slot and subframe index to calculate the context index. @@ -1792,52 +1853,50 @@ calculate the context index. There are references to show the usage of APIs as below. -- Initialization and release: +- Initialization and release:: -- xran_cp_init_sectiondb(): xran_open() in lib/src/xran_main.c + xran_cp_init_sectiondb(): xran_open() in lib/src/xran_main.c -- xran_cp_free_sectiondb(): xran_close() in lib/src/xran_main.c + xran_cp_free_sectiondb(): xran_close() in lib/src/xran_main.c -- Store section information: +- Store section information:: -- xran_cp_add_section_info(): send_cpmsg_dlul() and - send_cpmsg_prach()in lib/src/xran_main.c + xran_cp_add_section_info(): send_cpmsg_dlul() and + send_cpmsg_prach()in lib/src/xran_main.c -- Retrieve section information: +- Retrieve section information:: -- xran_cp_iterate_section_info(): xran_process_tx_sym() in - lib/src/xran_main.c + xran_cp_iterate_section_info(): xran_process_tx_sym() in + lib/src/xran_main.c -- xran_cp_getsize_section_info(): xran_process_tx_sym() in - lib/src/xran_main.c + xran_cp_getsize_section_info(): xran_process_tx_sym() in + lib/src/xran_main.c -- Reset the storage for a new slot: +- Reset the storage for a new slot:: -- xran_cp_reset_section_info(): tx_cp_dl_cb() and tx_cp_ul_cb() in - lib/src/xran_main.c + xran_cp_reset_section_info(): tx_cp_dl_cb() and tx_cp_ul_cb() in + lib/src/xran_main.c **Function for RU emulation and Debug** ''''''''''''''''''''''''''''''''''''''' xran_parse_cp_pkt() is a function which can be utilized for RU emulation -or debug. It is defined below: - -int xran_parse_cp_pkt(struct rte_mbuf \*mbuf, - -struct xran_cp_gen_params \*result, +or debug. It is defined below:: -struct xran_recv_packet_info \*pkt_info); + int xran_parse_cp_pkt(struct rte_mbuf \*mbuf, + struct xran_cp_recv_params \*result, + struct xran_recv_packet_info \*pkt_info); It parses a received C-Plane packet and retrieves the information from its headers and sections. The retrieved information is stored in the structures: -struct xran_cp_gen_params: section information from received C-Plane +struct xran_cp_recv_params: section information from received C-Plane packet -struct xran_recv_packet_info: transport layer header information (eCPRI -header) +struct xran_recv_packet_info: transport layer header information +(eCPRI header) These functions can be utilized to debug or RU emulation purposes. @@ -1850,11 +1909,13 @@ Single Section is the default mode of O-RAN packet creation. It assumes that there is only one section per packet, and all IQ samples are attached to it. Compression is not supported. -A message is built in mbuf space given as a parameter. The library +A message is built in the mbuf space given as a parameter. The library builds eCPRI header filling structure fields by taking the IQ sample size and populating a particular packet length and sequence number. -With compression, supported IQ bit widths are 8,9,10,12,14. +With block floating point compression, supported IQ bit widths are +8,9,10,12,14. With modulation compression, supported IQ bit widths are +defined according to modulation order as in section A.5 of O-RAN spec.. Implementation of a U-plane set of functions is defined in xran_up_api.c and is used to prepare U-plane packet content according to the given @@ -1876,7 +1937,10 @@ The following list of functions is implemented for U-plane: The time of generation of a U-plane message for DL and UL is “symbol-based” and can be controlled using O-DU settings (O-RU), -according to Table 4. +according to *Table 4*. + +For more information on function arguments and parameters refer to +corresponding source cod*\ e. Supporting Code --------------- @@ -1892,53 +1956,58 @@ The sense of time for the O-RAN protocol is obtained from system time, where the system timer is synchronized to GPS time via PTP protocol using the Linux PHP package. On the software side, a simple polling loop is utilized to get time up to nanosecond precision and particular packet -processing jobs are scheduled via the DPDK timer. +processing jobs are scheduled via the DPDK timer.::: -long poll_next_tick(int interval) + long poll_next_tick(int interval) -{ + { -struct timespec start_time; + struct timespec start_time; -struct timespec cur_time; + struct timespec cur_time; -long target_time; + long target_time; -long delta; + long delta; -clock_gettime(CLOCK_REALTIME, &start_time); + clock_gettime(CLOCK_REALTIME, &start_time); -target_time = (start_time.tv_sec \* NSEC_PER_SEC + start_time.tv_nsec + -interval \* NSEC_PER_USEC) / (interval \* NSEC_PER_USEC) \* interval; + target_time = (start_time.tv_sec \* NSEC_PER_SEC + start_time.tv_nsec + + interval \* NSEC_PER_USEC) / (interval \* NSEC_PER_USEC) \* interval; -while(1) + while(1) -{ + { -clock_gettime(CLOCK_REALTIME, &cur_time); + clock_gettime(CLOCK_REALTIME, &cur_time); -delta = (cur_time.tv_sec \* NSEC_PER_SEC + cur_time.tv_nsec) - -target_time \* NSEC_PER_USEC; + delta = (cur_time.tv_sec \* NSEC_PER_SEC + cur_time.tv_nsec) - + target_time \* NSEC_PER_USEC; -if(delta > 0 \|\| (delta < 0 && abs(delta) < THRESHOLD)) + if(delta > 0 \|\| (delta < 0 && abs(delta) < THRESHOLD)) -{ + { -break; + break; -} + } -} + } -return delta; + return delta; -} + } Polling is used to achieve the required precision of symbol time. For example, in the mmWave scenario, the symbol time is 125µs/14=~8.9µs. Small deterministic tasks can be executed within the polling interval provided. It’s smaller than the symbol interval time. +Current O-RAN library supports multiple O-RU of multiple numerologies, +thus the sense of timing is based on the O-RU with highest numerology +(smallest symbol time). It is required to configure the O-RU0 with +highest numerology in the O-RAN configuration. + DPDK Timers ~~~~~~~~~~~ @@ -1967,8 +2036,10 @@ Standard port configuration is used as per reference example from DPDK. Jumbo Frames are used by default. Mbufs size is extended to support 9600 bytes packets. -Mac address and VLAN tag are expected to be configured by Infrastructure -software. See Appendix A.4. +Configurable MTU size is supported starting from E release. + +MAC address and VLAN tag are expected to be configured by Infrastructure +software. Refer to *A.4, Install and Configure Sample Application*. From an implementation perspective, modules provide functions to handle: @@ -1978,63 +2049,68 @@ From an implementation perspective, modules provide functions to handle: - Send and Receive mbuf. -O-RAN Ethdi -~~~~~~~~~~~ +xRAN Ethdi +~~~~~~~~~~ Ethdi provides functionality to work with the content of an Ethernet -packet and dispatch processing to/from the O-RAN layer. Ethdi +packet and dispatch processing to/from the xRAN layer. Ethdi instantiates a main PMD driver thread and dispatches packets between the ring and RX/TX using rte_eth_rx_burst() and rte_eth_tx_burst() DPDK functions. For received packets, it maintains a set of handlers for ethertype -handlers and O-RAN layer register one O-RAN ethtype |br| +handlers and xRAN layer register one O-RAN ethtype |br| 0xAEFE, resulting in -packets with this ethertype being routed to the O-RAN processing +packets with this ethertype being routed to the xRAN processing function. This function checks the message type of the eCPRI header and dispatches packet to either C-plane processing or U-plane processing. -Initialization of memory pools, allocation and freeing of mbuf for +Initialization of memory pools, allocation, and freeing of the mbuf for Ethernet packets occur in this layer. O-RAN One Way Delay Measurements ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -The support for the eCPRI one- way delay measurements which are specified by -the O-RAN to be used with the Measured Transport support per Section 2.3.3.3 -of the O-RAN-WG4.CUS.0-v4.00 specification and section 3.2.4.6 of the eCPRI_v2.0 -specification is implemented in the file xran_delay_measurement.c. Structure -definitions used by the owd measurement functions are in the file xran_fh_o_du.h -for common data and port specific variables and parameters. - -The implementation of this feature has been done under the assumption that the requestor -is the O-DU and the recipient is the O-RU. All of the action_types per the eCPRI 2.0 have -been implemented. In the current version the timestamps are obtained using the linux -function clock_gettime using CLOCK_REALTIME as the clock_id argument. - -The implementation supports both the O-RU and the O-DU side in order to do the unit test -in loopback mode. - -The one-delay measurements are enabled at configuration time and run right after the -xran_start() function is executed. The total number of consecutive measurements per port -should be a power of 2 and in order to minimize the system startup it is advisable that -the number is 16 or below. +The support for the eCPRI one- way delay measurements which are +specified by the O-RAN to be used with the Measured Transport support +per Section 2.3.3.3 of the O-RAN-WG4.CUS.0-v4.00 specification and +section 3.2.4.6 of the eCPRI_v2.0 specification is implemented in the +file xran_delay_measurement.c. Structure definitions used by the owd +measurement functions are in the file xran_fh_o_du.h for common data and +port specific variables and parameters. + +The implementation of this feature has been done under the assumption +that the requestor is the O-DU and the recipient is the O-RU. All of the +action_types per the eCPRI 2.0 have been implemented. In the current +version the timestamps are obtained using the linux function +clock_gettime using CLOCK_REALTIME as the clock_id argument. + +The implementation supports both the O-RU and the O-DU side in order to +do the unit test in loopback mode. + +The one-delay measurements are enabled at configuration time and run +right after the xran_start() function is executed. The total number of +consecutive measurements per port should be a power of 2 and in order to +minimize the system startup it is advisable that the number is 16 or +below. The following functions can be found in the xran_delay_measurement.c: -xran_ecpri_one_way_delay_measurement_transmitter() which is invoked from the -process_dpdk_io()function if the one-way delay measurements are enabled. This is -the main function for the owd transmitter. +xran_ecpri_one_way_delay_measurement_transmitter() which is invoked from +the process_dpdk_io() function if the one-way delay measurements are +enabled. This is the main function for the owd transmitter. -xran_generate_delay_meas() is a general function used by the transmitter to send the appropriate -messages based on actionType and filling up all the details for the ethernet and ecpri layers. +xran_generate_delay_meas() is a general function used by the transmitter +to send the appropriate messages based on actionType and filling up all +the details for the ethernet and ecpri layers. -Process_delay_meas() this function is invoked from the handle_ecpri_ethertype() function when -the ecpri message type is ECPRI_DELAY_MEASUREMENT. This is the main owd receiver function. +Process_delay_meas() this function is invoked from the +handle_ecpri_ethertype() function when the ecpri message type is +ECPRI_DELAY_MEASUREMENT. This is the main owd receiver function. -From the Process_delay_meas() and depending on the message received we can execute one -of the following functions +From the Process_delay_meas() and depending on the message received we +can execute one of the following functions xran_process_delmeas_request() If we received a request message. diff --git a/fapi_5g/bin/oran_5g_fapi.cfg b/fapi_5g/bin/oran_5g_fapi.cfg index a1f4101..e864853 100644 --- a/fapi_5g/bin/oran_5g_fapi.cfg +++ b/fapi_5g/bin/oran_5g_fapi.cfg @@ -1,6 +1,6 @@ ;****************************************************************************** ; -; Copyright (c) 2019 Intel. +; Copyright (c) 2021 Intel. ; ; Licensed under the Apache License, Version 2.0 (the "License"); ; you may not use this file except in compliance with the License. @@ -22,22 +22,23 @@ ; Note: ; Schedule Policy [1: SCHED_FIFO 2: SCHED_RR] [MAC2PHY_WORKER] -core_id = 18 +core_id = 10 thread_sched_policy = 1 thread_priority = 89 [PHY2MAC_WORKER] -core_id = 19 +core_id = 11 thread_sched_policy = 1 thread_priority = 89 [URLLC_WORKER] -core_id = 19 +is_enabled = 1 +core_id = 12 thread_sched_policy = 1 thread_priority = 96 [WLS_CFG] -device_name = wls_f0 +device_name = wls0 shmem_size = 2126512128 ; Log level @@ -53,4 +54,4 @@ level = none ; 0 - PA ; 1 - VA dpdk_iova_mode = 0 -dpdk_memory_zone = gnb_f0 +dpdk_memory_zone = gnb0 diff --git a/fapi_5g/bin/oran_5g_fapi.sh b/fapi_5g/bin/oran_5g_fapi.sh index d61191d..b7c74bc 100755 --- a/fapi_5g/bin/oran_5g_fapi.sh +++ b/fapi_5g/bin/oran_5g_fapi.sh @@ -1,6 +1,6 @@ ############################################################################### # -# Copyright (c) 2019 Intel. +# Copyright (c) 2021 Intel. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -37,8 +37,11 @@ fi echo start ORAN 5G FAPI if [ "$1" = "-g" ]; then shift - #gdb-ia --args ./oran_5g_fapi $@ - gdb --args ./oran_5g_fapi $@ + if [ "$RTE_TARGET" == "x86_64-native-linuxapp-icx"]; then + /opt/intel/oneapi/debugger/10.2.4/gdb/intel64/bin/gdb-oneapi --args ./oran_5g_fapi $@ + else + /home/opt/intel/system_studio_2019/bin/gdb-ia --args ./oran_5g_fapi $@ + fi else ./oran_5g_fapi $@ fi diff --git a/fapi_5g/build/build.sh b/fapi_5g/build/build.sh index d8dcc1e..697d3b5 100755 --- a/fapi_5g/build/build.sh +++ b/fapi_5g/build/build.sh @@ -1,7 +1,7 @@ #!/bin/sh ############################################################################### # -# Copyright (c) 2019 Intel. +# Copyright (c) 2021 Intel. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/fapi_5g/build/makefile b/fapi_5g/build/makefile index 800c016..9003e93 100644 --- a/fapi_5g/build/makefile +++ b/fapi_5g/build/makefile @@ -1,6 +1,6 @@ ############################################################################### # -# Copyright (c) 2019 Intel. +# Copyright (c) 2021 Intel. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -23,20 +23,41 @@ ############################################################## # Tools configuration ############################################################## +ifeq ($(WIRELESS_SDK_TOOLCHAIN),icc) CC := icc CPP := icpc AS := as AR := ar LD := icc -OBJDUMP := objdump - -ifeq ($(SHELL),cmd.exe) -MD := mkdir.exe -p -RM := rm.exe -rf +else ifeq ($(WIRELESS_SDK_TOOLCHAIN),icx) + CC := icx + CPP := icx + AS := as + AR := ar + LD := icx else + $(error "Please define WIRELESS_SDK_TOOLCHAIN environment variable") +endif + +ifeq ($(WIRELESS_SDK_TARGET_ISA),sse) + TARGET_PROCESSOR := -xSSE4.2 +else ifeq ($(WIRELESS_SDK_TARGET_ISA),avx2) + TARGET_PROCESSOR := -xCORE-AVX2 +else ifeq ($(WIRELESS_SDK_TARGET_ISA),avx512) + TARGET_PROCESSOR := -xCORE-AVX512 +else ifeq ($(WIRELESS_SDK_TARGET_ISA),snc) + TARGET_PROCESSOR := -xicelake-server +else ifeq ($(WIRELESS_SDK_TARGET_ISA),spr) + TARGET_PROCESSOR := -march=sapphirerapids +endif + +ifeq ($(TARGET_PROCESSOR),) + $(error "Please define valid WIRELESS_SDK_TARGET_ISA environment variable $(WIRELESS_SDK_TARGET_ISA)") +endif +OBJDUMP := objdump MD := mkdir -p +CP := cp -f RM := rm -rf -endif ############################################################## # TARGET @@ -45,11 +66,7 @@ ifeq ($(RTE_SDK),) $(error "Please define RTE_SDK environment variable") endif -ifeq ($(MESON_BUILD),0) -RTE_INC := $(RTE_SDK)/$(RTE_TARGET)/include -else -RTE_INC := $(shell PKG_CONFIG_PATH=$(RTE_SDK)/build/meson-uninstalled pkg-config --cflags-only-I libdpdk) -endif +RTE_INC := $(shell PKG_CONFIG_PATH=/usr/lib64/pkgconfig:$(RTE_SDK)/build/meson-uninstalled pkgconf --cflags-only-I libdpdk) ############################################################## # Projects folders @@ -74,8 +91,8 @@ INC := \ -I$(SRCDIR)/framework/wls/lib \ -I$(SRCDIR)/api/fapi2mac \ -I$(SRCDIR)/api/fapi2phy \ - -I$(FLEXRANDIR)/source/nr5g/api \ - -I$(FLEXRANDIR)/source/common \ + -I$(FLEXRANDIR)/l1/source/nr5g/api \ + -I$(FLEXRANDIR)/l1/source/common \ -I$(SRCDIR)/api/fapi2phy/p5 \ -I$(SRCDIR)/api/fapi2phy/p7 \ -I$(SRCDIR)/api/fapi2mac/p5 \ @@ -99,19 +116,14 @@ endif DEFS := $(addprefix -D,$(DEFS)) -CFLAGS := -g -Wall -Wextra -Wunused -wd9 -Wno-deprecated-declarations -Wimplicit-function-declaration -fasm-blocks -fstack-protector-strong -z,now, -z,relro -z noexecstack -Wformat -Wformat-security -Werror=format-security -fno-strict-overflow -fwrapv $(DEFS) $(INC) +CFLAGS := -g -Wall -Wextra -Wunused -diag-disable9 -Wno-deprecated-declarations -Wimplicit-function-declaration -fasm-blocks -fstack-protector-strong -Wformat -Wformat-security -Werror=format-security -fwrapv -mssse3 $(DEFS) $(INC) ifeq ($(PRINTDBG),) CFLAGS := $(CFLAGS) -Werror endif -#RTE_LIBS := -L$(RTE_SDK)/$(RTE_TARGET)/lib -Wl,--whole-archive -Wl,-lrte_distributor -Wl,-lrte_kni -Wl,-lrte_pipeline -Wl,-lrte_table -Wl,-lrte_port -Wl,-lrte_timer -Wl,-lrte_hash -Wl,-lrte_lpm -Wl,-lrte_power -Wl,-lrte_acl -Wl,-lrte_meter -Wl,-lrte_sched -Wl,-lm -Wl,-lrt -Wl,--start-group -Wl,-lrte_kvargs -Wl,-lrte_mbuf -Wl,-lrte_ip_frag -Wl,-lrte_ethdev -Wl,-lrte_mempool -Wl,-lrte_mempool_ring -Wl,-lrte_ring -Wl,-lrte_bus_pci -Wl,-lrte_bus_vdev -Wl,-lrte_pci -Wl,-lrte_net -Wl,-lrte_eal -Wl,-lrte_cmdline -Wl,-lrte_cfgfile -Wl,-lrte_pmd_bond -Wl,-lrte_pmd_vmxnet3_uio -Wl,-lrte_pmd_i40e -Wl,-lrte_pmd_ixgbe -Wl,-lrte_pmd_e1000 -Wl,-lrte_pmd_ring -Wl,-lrt -Wl,-lm -Wl,-ldl -Wl,--end-group -Wl,--no-whole-archive -ifeq ($(MESON_BUILD),0) -RTE_LIBS := -L$(RTE_SDK)/$(RTE_TARGET)/lib -Wl,--whole-archive -Wl,-lrte_distributor -Wl,-lrte_kni -Wl,-lrte_pipeline -Wl,-lrte_table -Wl,-lrte_timer -Wl,-lrte_hash -Wl,-lrte_lpm -Wl,-lrte_power -Wl,-lrte_acl -Wl,-lrte_meter -Wl,-lrte_sched -Wl,-lm -Wl,-lrt -Wl,--start-group -Wl,-lrte_kvargs -Wl,-lrte_mbuf -Wl,-lrte_ip_frag -Wl,-lrte_ethdev -Wl,-lrte_mempool -Wl,-lrte_mempool_ring -Wl,-lrte_ring -Wl,-lrte_bus_pci -Wl,-lrte_bus_vdev -Wl,-lrte_pci -Wl,-lrte_net -Wl,-lrte_eal -Wl,-lrte_cmdline -Wl,-lrte_cfgfile -Wl,-lrte_pmd_bond -Wl,-lrte_pmd_vmxnet3_uio -Wl,-lrte_pmd_i40e -Wl,-lrte_pmd_ixgbe -Wl,-lrte_pmd_e1000 -Wl,-lrte_pmd_ring -Wl, -lrte_cryptodev -Wl,-lrt -Wl,-lm -Wl,-ldl -Wl,--end-group -Wl,--no-whole-archive -else -RTE_LIBS := -Wl,--whole-archive -Wl,/usr/lib64/libnuma.so -Wl,--as-needed -pthread -L$(RTE_SDK)/build/drivers -L$(RTE_SDK)/build/lib -l:librte_common_cpt.a -l:librte_common_dpaax.a -l:librte_common_iavf.a -l:librte_common_octeontx.a -l:librte_common_octeontx2.a -l:librte_common_sfc_efx.a -l:librte_bus_dpaa.a -l:librte_bus_fslmc.a -l:librte_bus_ifpga.a -l:librte_bus_pci.a -l:librte_bus_vdev.a -l:librte_bus_vmbus.a -l:librte_mempool_bucket.a -l:librte_mempool_dpaa.a -l:librte_mempool_dpaa2.a -l:librte_mempool_octeontx.a -l:librte_mempool_octeontx2.a -l:librte_mempool_ring.a -l:librte_mempool_stack.a -l:librte_net_af_packet.a -l:librte_net_ark.a -l:librte_net_atlantic.a -l:librte_net_avp.a -l:librte_net_axgbe.a -l:librte_net_bond.a -l:librte_net_bnx2x.a -l:librte_net_bnxt.a -l:librte_net_cxgbe.a -l:librte_net_dpaa.a -l:librte_net_dpaa2.a -l:librte_net_e1000.a -l:librte_net_ena.a -l:librte_net_enetc.a -l:librte_net_enic.a -l:librte_net_failsafe.a -l:librte_net_fm10k.a -l:librte_net_i40e.a -l:librte_net_hinic.a -l:librte_net_hns3.a -l:librte_net_iavf.a -l:librte_net_ice.a -l:librte_net_igc.a -l:librte_net_ixgbe.a -l:librte_net_kni.a -l:librte_net_liquidio.a -l:librte_net_memif.a -l:librte_net_netvsc.a -l:librte_net_nfp.a -l:librte_net_null.a -l:librte_net_octeontx.a -l:librte_net_octeontx2.a -l:librte_net_pfe.a -l:librte_net_qede.a -l:librte_net_ring.a -l:librte_net_sfc.a -l:librte_net_tap.a -l:librte_net_thunderx.a -l:librte_net_txgbe.a -l:librte_net_vdev_netvsc.a -l:librte_net_vhost.a -l:librte_net_virtio.a -l:librte_net_vmxnet3.a -l:librte_raw_dpaa2_cmdif.a -l:librte_raw_dpaa2_qdma.a -l:librte_raw_ioat.a -l:librte_raw_ntb.a -l:librte_raw_octeontx2_dma.a -l:librte_raw_octeontx2_ep.a -l:librte_raw_skeleton.a -l:librte_crypto_bcmfs.a -l:librte_crypto_caam_jr.a -l:librte_crypto_dpaa_sec.a -l:librte_crypto_dpaa2_sec.a -l:librte_crypto_nitrox.a -l:librte_crypto_null.a -l:librte_crypto_octeontx.a -l:librte_crypto_octeontx2.a -l:librte_crypto_scheduler.a -l:librte_crypto_virtio.a -l:librte_compress_octeontx.a -l:librte_compress_zlib.a -l:librte_regex_octeontx2.a -l:librte_vdpa_ifc.a -l:librte_event_dlb.a -l:librte_event_dlb2.a -l:librte_event_dpaa.a -l:librte_event_dpaa2.a -l:librte_event_octeontx2.a -l:librte_event_opdl.a -l:librte_event_skeleton.a -l:librte_event_sw.a -l:librte_event_dsw.a -l:librte_event_octeontx.a -l:librte_node.a -l:librte_graph.a -l:librte_bpf.a -l:librte_flow_classify.a -l:librte_pipeline.a -l:librte_table.a -l:librte_fib.a -l:librte_ipsec.a -l:librte_vhost.a -l:librte_stack.a -l:librte_security.a -l:librte_sched.a -l:librte_reorder.a -l:librte_rib.a -l:librte_regexdev.a -l:librte_rawdev.a -l:librte_pdump.a -l:librte_power.a -l:librte_member.a -l:librte_lpm.a -l:librte_latencystats.a -l:librte_kni.a -l:librte_jobstats.a -l:librte_ip_frag.a -l:librte_gso.a -l:librte_gro.a -l:librte_eventdev.a -l:librte_efd.a -l:librte_distributor.a -l:librte_cryptodev.a -l:librte_compressdev.a -l:librte_cfgfile.a -l:librte_bitratestats.a -l:librte_bbdev.a -l:librte_acl.a -l:librte_timer.a -l:librte_hash.a -l:librte_metrics.a -l:librte_cmdline.a -l:librte_pci.a -l:librte_ethdev.a -l:librte_meter.a -l:librte_net.a -l:librte_mbuf.a -l:librte_mempool.a -l:librte_rcu.a -l:librte_ring.a -l:librte_eal.a -l:librte_telemetry.a -l:librte_kvargs.a -lelf -lrte_node -lrte_graph -lrte_bpf -lrte_flow_classify -lrte_pipeline -lrte_table -lrte_fib -lrte_ipsec -lrte_vhost -lrte_stack -lrte_security -lrte_sched -lrte_reorder -lrte_rib -lrte_regexdev -lrte_rawdev -lrte_pdump -lrte_power -lrte_member -lrte_lpm -lrte_latencystats -lrte_kni -lrte_jobstats -lrte_ip_frag -lrte_gso -lrte_gro -lrte_eventdev -lrte_efd -lrte_distributor -lrte_cryptodev -lrte_compressdev -lrte_cfgfile -lrte_bitratestats -lrte_bbdev -lrte_acl -lrte_timer -lrte_hash -lrte_metrics -lrte_cmdline -lrte_pci -lrte_ethdev -lrte_meter -lrte_net -lrte_mbuf -lrte_mempool -lrte_rcu -lrte_ring -lrte_eal -lrte_telemetry -lrte_kvargs -lm -ldl -lnuma -lz -Wl,--no-whole-archive -endif -LDFLAGS := -g -Wl,-lrt -Wl,-lpthread -Wl,-lhugetlbfs -Wl,-lm -Wl,-lnuma -L $(WLSDIR) -lwls +RTE_LIBS := $(shell PKG_CONFIG_PATH=/usr/lib64/pkgconfig:$(RTE_SDK)/build/meson-uninstalled pkgconf --static --libs libdpdk) +LDFLAGS := -z now -z relro -z noexecstack -g -Wl,-lrt -Wl,-lpthread -Wl,-lhugetlbfs -Wl,-lm -Wl,-lnuma -L $(WLSDIR) -lwls LINUX_ORAN_5G_FAPI_SRC := \ $(SRCDIR)/nr5g_fapi.c \ @@ -124,7 +136,8 @@ LINUX_ORAN_5G_FAPI_SRC := \ $(SRCDIR)/utils/nr5g_fapi_snr_conversion.c \ $(SRCDIR)/framework/workers/nr5g_fapi_mac2phy_thread.c \ $(SRCDIR)/framework/workers/nr5g_fapi_phy2mac_thread.c \ - $(SRCDIR)/framework/workers/nr5g_fapi_urllc_thread.c \ + $(SRCDIR)//framework/workers/nr5g_fapi_urllc_phy2mac_thread.c \ + $(SRCDIR)//framework/workers/nr5g_fapi_urllc_mac2phy_thread.c \ $(SRCDIR)/framework/nr5g_fapi_framework.c \ $(SRCDIR)/framework/wls/fapi2mac/nr5g_fapi_fapi2mac_wls.c \ $(SRCDIR)/framework/wls/fapi2phy/nr5g_fapi_fapi2phy_wls.c \ @@ -149,6 +162,7 @@ LINUX_ORAN_5G_FAPI_SRC := \ $(SRCDIR)/api/fapi2phy/nr5g_fapi_fapi2phy_api.c \ $(SRCDIR)/api/fapi2phy/p5/nr5g_fapi_proc_add_remove_core_msg.c \ $(SRCDIR)/api/fapi2phy/p5/nr5g_fapi_proc_config_req.c \ + $(SRCDIR)/api/fapi2phy/p5/nr5g_fapi_proc_param_resp.c \ $(SRCDIR)/api/fapi2phy/p5/nr5g_fapi_proc_start_req.c \ $(SRCDIR)/api/fapi2phy/p5/nr5g_fapi_proc_stop_req.c \ $(SRCDIR)/api/fapi2phy/p5/nr5g_fapi_proc_shutdown_req.c \ @@ -156,6 +170,7 @@ LINUX_ORAN_5G_FAPI_SRC := \ $(SRCDIR)/api/fapi2phy/p5/nr5g_fapi_proc_ul_iq_samples_req.c \ $(SRCDIR)/api/fapi2phy/p7/nr5g_fapi_proc_dl_tti_req.c \ $(SRCDIR)/api/fapi2phy/p7/nr5g_fapi_proc_ul_tti_req.c \ + $(SRCDIR)/api/fapi2phy/p7/nr5g_fapi_proc_tti_req_common.c \ $(SRCDIR)/api/fapi2phy/p7/nr5g_fapi_proc_tx_data_req.c \ $(SRCDIR)/api/fapi2phy/p7/nr5g_fapi_proc_ul_dci_req.c @@ -177,7 +192,7 @@ endif .PHONY: $(APP) $(APP): $(DIRLIST) echo_options $(GEN_DEP) $(OBJS) @echo [LD] $(APP) - @$(CC) -o $(APP) $(OBJS) $(LDFLAGS) $(RTE_LIBS) + @$(CC) -o $(APP) $(OBJS) $(LDFLAGS) $(RTE_LIBS) -lstdc++ # stdc++ flag needed for RTE LIBS # $(OBJDUMP) -d $(APP) > $(APP).asm .PHONY : echo_options diff --git a/fapi_5g/include/fapi_interface.h b/fapi_5g/include/fapi_interface.h index 2a7a9d0..8a85ce7 100644 --- a/fapi_5g/include/fapi_interface.h +++ b/fapi_5g/include/fapi_interface.h @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -253,6 +253,7 @@ extern "C" { #define FAPI_MAX_NUM_TLVS_START 3 // Based on Timer Mode requirement. #define FAPI_MAX_NUM_TLVS_SHUTDOWN 1 // Based on Timer Mode requirement. #define FAPI_MAX_UCI_BIT_BYTE_LEN 256 +#define FAPI_RB_BITMAP_SIZE 36 // Based on 5G FAPI Table 3-38 enum ul_tti_pdu_type_e { FAPI_PRACH_PDU_TYPE = 0, @@ -270,6 +271,16 @@ extern "C" { FAPI_DL_TTI_PDU_TYPE_MAX }; + enum dl_resource_alloc_type_e { // Based on 5G FAPI Table 3-38 + FAPI_DL_RESOURCE_ALLOC_TYPE_0 = 0, + FAPI_DL_RESOURCE_ALLOC_TYPE_1 = 1 + }; + + enum ul_resource_alloc_type_e { // Based on 5G FAPI Table 3-38 + FAPI_UL_RESOURCE_ALLOC_TYPE_0 = 0, + FAPI_UL_RESOURCE_ALLOC_TYPE_1 = 1 + }; + //------------------------------------------------------------------------------------------------------------ // Updated per 5G FAPI typedef struct { @@ -724,7 +735,7 @@ extern "C" { uint16_t dmrsPorts; uint16_t rbStart; uint16_t rbSize; - uint8_t rbBitmap[36]; + uint8_t rbBitmap[FAPI_RB_BITMAP_SIZE]; uint8_t vrbToPrbMapping; uint8_t startSymbIndex; uint8_t nrOfSymbols; @@ -923,7 +934,7 @@ extern "C" { uint16_t dmrsPorts; uint16_t nTpPuschId; uint16_t tpPi2Bpsk; - uint8_t rbBitmap[36]; + uint8_t rbBitmap[FAPI_RB_BITMAP_SIZE]; uint16_t rbStart; uint16_t rbSize; uint8_t vrbToPrbMapping; diff --git a/fapi_5g/include/fapi_vendor_extension.h b/fapi_5g/include/fapi_vendor_extension.h index aa0069b..08144b5 100644 --- a/fapi_5g/include/fapi_vendor_extension.h +++ b/fapi_5g/include/fapi_vendor_extension.h @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -81,6 +81,8 @@ enum { #define FAPI_MAX_NUM_SET_CORE_MASK ( 4 ) #define FAPI_MAX_MASK_OPTIONS ( 4 ) #define FAPI_NUM_SPLIT_OPTIONS ( 22 ) +#define FAPI_MAX_NUM_CELLS ( 32 ) +#define FAPI_MAX_GROUP_NUM ( 32 ) #endif typedef struct { @@ -243,7 +245,7 @@ enum { fapi_start_req_vendor_msg_t start_req_vendor; fapi_stop_req_vendor_msg_t stop_req_vendor; fapi_vendor_p7_msg_t p7_req_vendor; - } fapi_vendor_msg_t; + } fapi_vendor_msg_t; //TODO: union? typedef struct { fapi_msg_t header; @@ -371,6 +373,7 @@ enum { uint32_t eOption; uint64_t nCoreMask[FAPI_MAX_MASK_OPTIONS][FAPI_MAX_NUM_SET_CORE_MASK]; uint32_t nMacOptions[FAPI_NUM_SPLIT_OPTIONS]; + uint8_t nPuschInterOptions[FAPI_MAX_NUM_CELLS][FAPI_MAX_GROUP_NUM]; } fapi_vendor_ext_add_remove_core_info_t; typedef struct { diff --git a/fapi_5g/source/api/fapi2mac/nr5g_fapi_fapi2mac_api.c b/fapi_5g/source/api/fapi2mac/nr5g_fapi_fapi2mac_api.c index 610f9a1..cc7bf1c 100644 --- a/fapi_5g/source/api/fapi2mac/nr5g_fapi_fapi2mac_api.c +++ b/fapi_5g/source/api/fapi2mac/nr5g_fapi_fapi2mac_api.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -24,7 +24,6 @@ #include #include "nr5g_fapi_internal.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_fapi2mac_api.h" #include "nr5g_fapi_fapi2mac_wls.h" #include "nr5g_fapi_log.h" diff --git a/fapi_5g/source/api/fapi2mac/nr5g_fapi_fapi2mac_api.h b/fapi_5g/source/api/fapi2mac/nr5g_fapi_fapi2mac_api.h index ec89d8e..e1f2768 100644 --- a/fapi_5g/source/api/fapi2mac/nr5g_fapi_fapi2mac_api.h +++ b/fapi_5g/source/api/fapi2mac/nr5g_fapi_fapi2mac_api.h @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/fapi_5g/source/api/fapi2mac/nr5g_fapi_proc_error_ind.c b/fapi_5g/source/api/fapi2mac/nr5g_fapi_proc_error_ind.c index 9b39d0d..1988aac 100644 --- a/fapi_5g/source/api/fapi2mac/nr5g_fapi_proc_error_ind.c +++ b/fapi_5g/source/api/fapi2mac/nr5g_fapi_proc_error_ind.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -22,8 +22,8 @@ * **/ +#include "nr5g_mac_phy_api.h" #include "nr5g_fapi_framework.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_fapi2mac_api.h" #include "nr5g_fapi_proc_error_ind.h" diff --git a/fapi_5g/source/api/fapi2mac/nr5g_fapi_proc_error_ind.h b/fapi_5g/source/api/fapi2mac/nr5g_fapi_proc_error_ind.h index 7706db8..a11c198 100644 --- a/fapi_5g/source/api/fapi2mac/nr5g_fapi_proc_error_ind.h +++ b/fapi_5g/source/api/fapi2mac/nr5g_fapi_proc_error_ind.h @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_fapi2mac_p5_proc.h b/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_fapi2mac_p5_proc.h index bdccc6a..42f1672 100644 --- a/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_fapi2mac_p5_proc.h +++ b/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_fapi2mac_p5_proc.h @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -26,7 +26,8 @@ #ifndef _NR5G_FAPI_FAP2MAC_P5_PROC_H_ #define _NR5G_FAPI_FAP2MAC_P5_PROC_H_ -#include "gnb_l1_l2_api.h" +#include "common_mac_phy_api.h" +#include "nr5g_mac_phy_api.h" uint8_t nr5g_fapi_message_header( p_nr5g_fapi_phy_ctx_t p_phy_ctx, @@ -55,11 +56,11 @@ uint8_t nr5g_fapi_start_resp( #ifdef DEBUG_MODE uint8_t nr5g_fapi_dl_iq_samples_response( p_nr5g_fapi_phy_ctx_t p_phy_ctx, - PADD_REMOVE_BBU_CORES p_iapi_resp); + PADD_REMOVE_BBU_CORES_NR5G p_iapi_resp); uint8_t nr5g_fapi_ul_iq_samples_response( p_nr5g_fapi_phy_ctx_t p_phy_ctx, - PADD_REMOVE_BBU_CORES p_iapi_resp); + PADD_REMOVE_BBU_CORES_NR5G p_iapi_resp); uint8_t nr5g_fapi_message_header_for_ul_iq_samples( uint8_t phy_id); diff --git a/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_proc_config_resp.c b/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_proc_config_resp.c index 805cbe7..ad988d4 100644 --- a/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_proc_config_resp.c +++ b/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_proc_config_resp.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -23,7 +23,6 @@ **/ #include "nr5g_fapi_framework.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_fapi2mac_api.h" #include "nr5g_fapi_fapi2mac_p5_proc.h" diff --git a/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_proc_dl_iq_samples_resp.c b/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_proc_dl_iq_samples_resp.c index 4b241e3..40e0dfa 100644 --- a/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_proc_dl_iq_samples_resp.c +++ b/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_proc_dl_iq_samples_resp.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -22,7 +22,6 @@ * **/ #include "nr5g_fapi_framework.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_fapi2mac_api.h" #include "nr5g_fapi_fapi2mac_p5_proc.h" @@ -40,7 +39,7 @@ **/ uint8_t nr5g_fapi_dl_iq_samples_response( p_nr5g_fapi_phy_ctx_t p_phy_ctx, - PADD_REMOVE_BBU_CORES p_iapi_resp) + PADD_REMOVE_BBU_CORES_NR5G p_iapi_resp) { uint8_t phy_id; fapi_vendor_ext_dl_iq_samples_res_t *p_fapi_resp; @@ -87,6 +86,7 @@ uint8_t nr5g_fapi_dl_iq_samples_response( NR5G_FAPI_LOG(INFO_LOG, ("[DL_IQ_SAMPLES.response][%d]", phy_id)); + nr5g_fapi_clean(p_phy_instance); return SUCCESS; } #endif diff --git a/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_proc_fapi_msg_header.c b/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_proc_fapi_msg_header.c index 458b181..d18be6a 100644 --- a/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_proc_fapi_msg_header.c +++ b/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_proc_fapi_msg_header.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -23,7 +23,6 @@ **/ #include "nr5g_fapi_framework.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_fapi2mac_api.h" #include "nr5g_fapi_fapi2mac_p5_proc.h" #include "nr5g_fapi_internal.h" diff --git a/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_proc_shutdown_resp.c b/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_proc_shutdown_resp.c index 4626cd9..f8996a7 100644 --- a/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_proc_shutdown_resp.c +++ b/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_proc_shutdown_resp.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -22,7 +22,6 @@ * **/ #include "nr5g_fapi_framework.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_fapi2mac_api.h" #include "nr5g_fapi_fapi2phy_api.h" #include "nr5g_fapi_fapi2mac_p5_proc.h" @@ -125,6 +124,7 @@ uint8_t nr5g_fapi_shutdown_response( p_stats->fapi_stats.fapi_stop_ind++; NR5G_FAPI_LOG(INFO_LOG, ("[STOP.Indication][%d]", phy_id)); p_phy_instance->shutdown_retries = 0; + nr5g_fapi_clean(p_phy_instance); #endif } else { /* PHY SHUTDOWN Failed. Retrigger Shutdown request for 3 tries before diff --git a/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_proc_start_resp.c b/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_proc_start_resp.c index ee48bec..2e7e399 100644 --- a/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_proc_start_resp.c +++ b/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_proc_start_resp.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -23,7 +23,6 @@ **/ #include "nr5g_fapi_framework.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_fapi2mac_api.h" #include "nr5g_fapi_fapi2mac_p5_proc.h" diff --git a/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_proc_stop_ind.c b/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_proc_stop_ind.c index a51e46d..ced6b98 100644 --- a/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_proc_stop_ind.c +++ b/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_proc_stop_ind.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -23,7 +23,6 @@ **/ #include "nr5g_fapi_framework.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_fapi2mac_api.h" #include "nr5g_fapi_fapi2phy_api.h" #include "nr5g_fapi_fapi2mac_p5_proc.h" diff --git a/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_proc_ul_iq_samples_resp.c b/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_proc_ul_iq_samples_resp.c index fba54b4..83479a5 100644 --- a/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_proc_ul_iq_samples_resp.c +++ b/fapi_5g/source/api/fapi2mac/p5/nr5g_fapi_proc_ul_iq_samples_resp.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -22,7 +22,6 @@ * **/ #include "nr5g_fapi_framework.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_fapi2mac_api.h" #include "nr5g_fapi_fapi2mac_p5_proc.h" @@ -40,7 +39,7 @@ **/ uint8_t nr5g_fapi_ul_iq_samples_response( p_nr5g_fapi_phy_ctx_t p_phy_ctx, - PADD_REMOVE_BBU_CORES p_iapi_resp) + PADD_REMOVE_BBU_CORES_NR5G p_iapi_resp) { uint8_t phy_id; fapi_vendor_ext_ul_iq_samples_res_t *p_fapi_resp; diff --git a/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_fapi2mac_p7_proc.h b/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_fapi2mac_p7_proc.h index 675e1b2..34e4250 100644 --- a/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_fapi2mac_p7_proc.h +++ b/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_fapi2mac_p7_proc.h @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_fapi2mac_p7_pvt_proc.h b/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_fapi2mac_p7_pvt_proc.h index 180bbcf..c24eda2 100644 --- a/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_fapi2mac_p7_pvt_proc.h +++ b/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_fapi2mac_p7_pvt_proc.h @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_add_remove_core_msg.c b/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_add_remove_core_msg.c deleted file mode 100644 index 5164423..0000000 --- a/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_add_remove_core_msg.c +++ /dev/null @@ -1,89 +0,0 @@ -/****************************************************************************** -* -* Copyright (c) 2021 Intel. -* -* Licensed under the Apache License, Version 2.0 (the "License"); -* you may not use this file except in compliance with the License. -* You may obtain a copy of the License at -* -* http://www.apache.org/licenses/LICENSE-2.0 -* -* Unless required by applicable law or agreed to in writing, software -* distributed under the License is distributed on an "AS IS" BASIS, -* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -* See the License for the specific language governing permissions and -* limitations under the License. -* -*******************************************************************************/ - -#include "fapi_vendor_extension.h" -#include "gnb_l1_l2_api.h" -#include "nr5g_fapi_common_types.h" -#include "nr5g_fapi_fapi2phy_api.h" -#include "nr5g_fapi_log.h" - -/** - * @file - * This file consist of implementation of FAPI VENDOR ADD_REMOVE_CORE message. - * - **/ - -/** @ingroup group_source_api_p5_fapi2phy_proc - * - * @param[in] p_fapi_req Pointer to FAPI VENDOR ADD_REMOVE_CORE message structure. - * @return Returns ::SUCCESS and ::FAILURE. - * - * @description - * This is a timer mode specific message used to set options on bbupool cores. - * - */ -#ifdef DEBUG_MODE -uint8_t nr5g_fapi_add_remove_core_message( - bool is_urllc, - fapi_vendor_ext_add_remove_core_msg_t * p_fapi_req) -{ - uint32_t i, k; - PMAC2PHY_QUEUE_EL p_list_elem; - PADD_REMOVE_BBU_CORES p_add_remove_bbu_cores; - - /* Below print is for better logging on console in debug mode. */ - NR5G_FAPI_LOG(INFO_LOG, ("")); - - if (NULL == p_fapi_req) { - NR5G_FAPI_LOG(ERROR_LOG, ("[FAPI_VENDOR_EXT_ADD_REMOVE_CORE] Invalid fapi message")); - return FAILURE; - } - - p_list_elem = nr5g_fapi_fapi2phy_create_api_list_elem( - (uint8_t)MSG_TYPE_PHY_ADD_REMOVE_CORE, 1, (uint32_t) sizeof(ADD_REMOVE_BBU_CORES)); - - if (!p_list_elem) { - NR5G_FAPI_LOG(ERROR_LOG, ("[FAPI_VENDOR_EXT_ADD_REMOVE_CORE] Unable to create " - "list element. Out of memory!!!")); - return FAILURE; - } - - p_add_remove_bbu_cores = (PADD_REMOVE_BBU_CORES) (p_list_elem + 1); - p_add_remove_bbu_cores->sMsgHdr.nMessageType = MSG_TYPE_PHY_ADD_REMOVE_CORE; - p_add_remove_bbu_cores->sMsgHdr.nMessageLen = sizeof(ADD_REMOVE_BBU_CORES); - - for (i = 0; i < FAPI_MAX_NUM_SET_CORE_MASK; ++i) - { - for (k = 0; k < FAPI_MAX_MASK_OPTIONS; ++k) - { - p_add_remove_bbu_cores->nCoreMask[k][i] = p_fapi_req->add_remove_core_info.nCoreMask[k][i]; - } - } - for (i = 0; i < FAPI_NUM_SPLIT_OPTIONS; ++i) - { - p_add_remove_bbu_cores->nMacOptions[i] = p_fapi_req->add_remove_core_info.nMacOptions[i]; - } - p_add_remove_bbu_cores->eOption = (BBUPOOL_CORE_OPERATION)p_fapi_req->add_remove_core_info.eOption; - - nr5g_fapi_fapi2phy_add_to_api_list(is_urllc, p_list_elem); - - NR5G_FAPI_LOG(INFO_LOG, ("[FAPI_VENDOR_EXT_ADD_REMOVE_CORE.message]")); - - return SUCCESS; -} -#endif diff --git a/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_crc_ind.c b/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_crc_ind.c index 9b1cd95..5bf2790 100644 --- a/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_crc_ind.c +++ b/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_crc_ind.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -21,8 +21,8 @@ * **/ +#include "nr5g_mac_phy_api.h" #include "nr5g_fapi_framework.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_fapi2mac_api.h" #include "nr5g_fapi_fapi2mac_p7_proc.h" #include "nr5g_fapi_fapi2mac_p7_pvt_proc.h" diff --git a/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_rach_ind.c b/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_rach_ind.c index fd29b50..e1e9215 100644 --- a/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_rach_ind.c +++ b/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_rach_ind.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -21,8 +21,8 @@ * **/ +#include "nr5g_mac_phy_api.h" #include "nr5g_fapi_framework.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_fapi2mac_api.h" #include "nr5g_fapi_fapi2mac_p7_proc.h" #include "nr5g_fapi_fapi2mac_p7_pvt_proc.h" diff --git a/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_rx_data_ind.c b/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_rx_data_ind.c index 3a1183a..b4a43e7 100644 --- a/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_rx_data_ind.c +++ b/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_rx_data_ind.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -22,8 +22,8 @@ * **/ +#include "nr5g_mac_phy_api.h" #include "nr5g_fapi_framework.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_fapi2mac_api.h" #include "nr5g_fapi_fapi2mac_p7_proc.h" #include "nr5g_fapi_fapi2mac_p7_pvt_proc.h" @@ -213,15 +213,14 @@ uint8_t nr5g_fapi_rx_data_indication_to_fapi_translation( p_fapi_pdu_ind_info->handle = p_pusch_info->handle; p_fapi_pdu_ind_info->rnti = p_rx_ulsch_pdu_data->nRNTI; - p_fapi_pdu_ind_info->harqId = p_pusch_info->harq_process_id; + // upper nibble of pdu_length is passed in upper nibble in harqId (which only takes up to 4 bits) + // this way, pdu_length has 20-bits (up to 1048576) + p_fapi_pdu_ind_info->harqId = ((p_rx_ulsch_pdu_data->nPduLen & 0x000F0000) >> 12) | (p_pusch_info->harq_process_id & 0x0F); p_fapi_pdu_ind_info->ul_cqi = p_pusch_info->ul_cqi; p_fapi_pdu_ind_info->timingAdvance = p_pusch_info->timing_advance; p_fapi_pdu_ind_info->rssi = 880; - p_fapi_pdu_ind_info->pdu_length = p_rx_ulsch_pdu_data->nPduLen; - if (p_fapi_pdu_ind_info->pdu_length > 0) - { + p_fapi_pdu_ind_info->pdu_length = 0xFFFF & p_rx_ulsch_pdu_data->nPduLen; p_fapi_pdu_ind_info->pduData = (void *)p_rx_ulsch_pdu_data->pPayload; - } p_stats->fapi_stats.fapi_rx_data_ind_pdus++; } diff --git a/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_rx_data_uci_ind.c b/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_rx_data_uci_ind.c index 11d04ff..e61119e 100644 --- a/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_rx_data_uci_ind.c +++ b/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_rx_data_uci_ind.c @@ -22,8 +22,8 @@ * **/ +#include "nr5g_mac_phy_api.h" #include "nr5g_fapi_framework.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_fapi2mac_api.h" #include "nr5g_fapi_fapi2mac_p7_proc.h" #include "nr5g_fapi_fapi2mac_p7_pvt_proc.h" diff --git a/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_slot_ind.c b/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_slot_ind.c index 45bf69f..fee2d5d 100644 --- a/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_slot_ind.c +++ b/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_slot_ind.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -22,8 +22,8 @@ * **/ +#include "nr5g_mac_phy_api.h" #include "nr5g_fapi_framework.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_fapi2mac_api.h" #include "nr5g_fapi_fapi2mac_p7_proc.h" diff --git a/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_srs_ind.c b/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_srs_ind.c index b9310ec..662d5f1 100644 --- a/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_srs_ind.c +++ b/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_srs_ind.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -22,8 +22,8 @@ * **/ +#include "nr5g_mac_phy_api.h" #include "nr5g_fapi_framework.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_fapi2mac_api.h" #include "nr5g_fapi_fapi2mac_p7_proc.h" #include "nr5g_fapi_fapi2mac_p7_pvt_proc.h" diff --git a/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_uci_ind.c b/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_uci_ind.c index 793f9f3..d92aa68 100644 --- a/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_uci_ind.c +++ b/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_uci_ind.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -21,8 +21,8 @@ * **/ +#include "nr5g_mac_phy_api.h" #include "nr5g_fapi_framework.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_fapi2mac_api.h" #include "nr5g_fapi_fapi2mac_p7_proc.h" #include "nr5g_fapi_fapi2mac_p7_pvt_proc.h" diff --git a/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_vendor_p7_msgs.c b/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_vendor_p7_msgs.c index 812e225..afa8647 100644 --- a/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_vendor_p7_msgs.c +++ b/fapi_5g/source/api/fapi2mac/p7/nr5g_fapi_proc_vendor_p7_msgs.c @@ -16,8 +16,8 @@ * *******************************************************************************/ +#include "nr5g_mac_phy_api.h" #include "nr5g_fapi_framework.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_fapi2mac_api.h" #include "nr5g_fapi_fapi2mac_p7_proc.h" diff --git a/fapi_5g/source/api/fapi2phy/nr5g_fapi_fapi2phy_api.c b/fapi_5g/source/api/fapi2phy/nr5g_fapi_fapi2phy_api.c index 9a3f1ae..5f37c89 100644 --- a/fapi_5g/source/api/fapi2phy/nr5g_fapi_fapi2phy_api.c +++ b/fapi_5g/source/api/fapi2phy/nr5g_fapi_fapi2phy_api.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -22,9 +22,9 @@ * **/ +#include "nr5g_mac_phy_api.h" #include #include "nr5g_fapi_internal.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_wls.h" #include "nr5g_fapi_fapi2phy_api.h" #include "nr5g_fapi_fapi2phy_wls.h" diff --git a/fapi_5g/source/api/fapi2phy/nr5g_fapi_fapi2phy_api.h b/fapi_5g/source/api/fapi2phy/nr5g_fapi_fapi2phy_api.h index c933be9..1e244b2 100644 --- a/fapi_5g/source/api/fapi2phy/nr5g_fapi_fapi2phy_api.h +++ b/fapi_5g/source/api/fapi2phy/nr5g_fapi_fapi2phy_api.h @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -25,7 +25,7 @@ #ifndef NR5G_FAPI_FAPI2PHY_API_H #define NR5G_FAPI_FAPI2PHY_API_H -#include "gnb_l1_l2_api.h" +#include "common_mac_phy_api.h" #include typedef struct _nr5g_fapi_fapi2phy_queue { diff --git a/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_fapi2phy_p5_proc.h b/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_fapi2phy_p5_proc.h index a9bf7b4..8ef6a72 100644 --- a/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_fapi2phy_p5_proc.h +++ b/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_fapi2phy_p5_proc.h @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -26,6 +26,9 @@ #ifndef _NR5G_FAPI_FAP2PHY_P5_PROC_H_ #define _NR5G_FAPI_FAP2PHY_P5_PROC_H_ +uint8_t nr5g_fapi_param_response( + p_nr5g_fapi_phy_instance_t p_phy_instance); + uint8_t nr5g_fapi_config_request( bool is_urllc, p_nr5g_fapi_phy_instance_t p_phy_instance, diff --git a/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_fapi2phy_p5_pvt_proc.h b/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_fapi2phy_p5_pvt_proc.h index 7f7f4e9..61db225 100644 --- a/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_fapi2phy_p5_pvt_proc.h +++ b/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_fapi2phy_p5_pvt_proc.h @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -26,6 +26,8 @@ #ifndef _NR5G_FAPI_FAP2PHY_P5_PVT_PROC_H_ #define _NR5G_FAPI_FAP2PHY_P5_PVT_PROC_H_ +#include "nr5g_mac_phy_api.h" + //x is 32 bit variable, y is length in bytes #define GETVLFRM32B(x, y) ((x) & ((0xFFFFFFFF) >> (32 - (y << 3)))) diff --git a/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_add_remove_core_msg.c b/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_add_remove_core_msg.c index 5164423..ed0856a 100644 --- a/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_add_remove_core_msg.c +++ b/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_add_remove_core_msg.c @@ -16,8 +16,8 @@ * *******************************************************************************/ +#include "nr5g_mac_phy_api.h" #include "fapi_vendor_extension.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_common_types.h" #include "nr5g_fapi_fapi2phy_api.h" #include "nr5g_fapi_log.h" @@ -44,6 +44,7 @@ uint8_t nr5g_fapi_add_remove_core_message( { uint32_t i, k; PMAC2PHY_QUEUE_EL p_list_elem; + PADD_REMOVE_BBU_CORES_NR5G p_add_remove_bbu_cores_nr5g; PADD_REMOVE_BBU_CORES p_add_remove_bbu_cores; /* Below print is for better logging on console in debug mode. */ @@ -55,7 +56,7 @@ uint8_t nr5g_fapi_add_remove_core_message( } p_list_elem = nr5g_fapi_fapi2phy_create_api_list_elem( - (uint8_t)MSG_TYPE_PHY_ADD_REMOVE_CORE, 1, (uint32_t) sizeof(ADD_REMOVE_BBU_CORES)); + (uint8_t)MSG_TYPE_PHY_ADD_REMOVE_CORE, 1, (uint32_t) sizeof(ADD_REMOVE_BBU_CORES_NR5G)); if (!p_list_elem) { NR5G_FAPI_LOG(ERROR_LOG, ("[FAPI_VENDOR_EXT_ADD_REMOVE_CORE] Unable to create " @@ -63,10 +64,11 @@ uint8_t nr5g_fapi_add_remove_core_message( return FAILURE; } - p_add_remove_bbu_cores = (PADD_REMOVE_BBU_CORES) (p_list_elem + 1); - p_add_remove_bbu_cores->sMsgHdr.nMessageType = MSG_TYPE_PHY_ADD_REMOVE_CORE; - p_add_remove_bbu_cores->sMsgHdr.nMessageLen = sizeof(ADD_REMOVE_BBU_CORES); + p_add_remove_bbu_cores_nr5g = (PADD_REMOVE_BBU_CORES_NR5G) (p_list_elem + 1); + p_add_remove_bbu_cores_nr5g->sMsgHdr.nMessageType = MSG_TYPE_PHY_ADD_REMOVE_CORE; + p_add_remove_bbu_cores_nr5g->sMsgHdr.nMessageLen = sizeof(ADD_REMOVE_BBU_CORES_NR5G); + p_add_remove_bbu_cores = &p_add_remove_bbu_cores_nr5g->sAddRemoveBbuCores; for (i = 0; i < FAPI_MAX_NUM_SET_CORE_MASK; ++i) { for (k = 0; k < FAPI_MAX_MASK_OPTIONS; ++k) @@ -78,6 +80,11 @@ uint8_t nr5g_fapi_add_remove_core_message( { p_add_remove_bbu_cores->nMacOptions[i] = p_fapi_req->add_remove_core_info.nMacOptions[i]; } + for(k = 0; k < FAPI_MAX_NUM_CELLS; ++k) { + for(i = 0; i < FAPI_MAX_GROUP_NUM; ++i) { + p_add_remove_bbu_cores->nPuschInterOptions[k][i] = p_fapi_req->add_remove_core_info.nPuschInterOptions[k][i]; + } + } p_add_remove_bbu_cores->eOption = (BBUPOOL_CORE_OPERATION)p_fapi_req->add_remove_core_info.eOption; nr5g_fapi_fapi2phy_add_to_api_list(is_urllc, p_list_elem); diff --git a/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_config_req.c b/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_config_req.c index e6509f7..14336c4 100644 --- a/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_config_req.c +++ b/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_config_req.c @@ -1,5 +1,5 @@ /****************************************************************************** -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -21,8 +21,8 @@ * **/ +#include "nr5g_mac_phy_api.h" #include "nr5g_fapi_framework.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_fapi2mac_api.h" #include "nr5g_fapi_fapi2phy_api.h" #include "nr5g_fapi_fapi2phy_p5_proc.h" @@ -173,11 +173,13 @@ uint8_t nr5g_fapi_config_req_to_phy_translation( /***** Carrier Config *****/ case FAPI_DL_BANDWIDTH_TAG: p_ia_config_req->nDLBandwidth = - GETVLFRM32B(tlvs[i].value, tlvs[i++].tl.length); + GETVLFRM32B(tlvs[i].value, tlvs[i].tl.length); + ++i; break; case FAPI_DL_FREQUENCY_TAG: - p_ia_config_req->nDLAbsFrePointA = tlvs[i++].value; + p_ia_config_req->nDLAbsFrePointA = tlvs[i].value; + ++i; break; /* FAPI_DL_K0_TAG - NA */ @@ -185,16 +187,19 @@ uint8_t nr5g_fapi_config_req_to_phy_translation( case FAPI_NUM_TX_ANT_TAG: p_ia_config_req->nNrOfTxAnt = - GETVLFRM32B(tlvs[i].value, tlvs[i++].tl.length); + GETVLFRM32B(tlvs[i].value, tlvs[i].tl.length); + ++i; break; case FAPI_UPLINK_BANDWIDTH_TAG: p_ia_config_req->nULBandwidth = - GETVLFRM32B(tlvs[i].value, tlvs[i++].tl.length); + GETVLFRM32B(tlvs[i].value, tlvs[i].tl.length); + ++i; break; case FAPI_UPLINK_FREQUENCY_TAG: - p_ia_config_req->nULAbsFrePointA = tlvs[i++].value; + p_ia_config_req->nULAbsFrePointA = tlvs[i].value; + ++i; break; /* FAPI_UL_K0_TAG - NA */ @@ -203,7 +208,8 @@ uint8_t nr5g_fapi_config_req_to_phy_translation( case FAPI_NUM_RX_ANT_TAG: p_phy_instance->phy_config.n_nr_of_rx_ant = p_ia_config_req->nNrOfRxAnt = - GETVLFRM32B(tlvs[i].value, tlvs[i++].tl.length); + GETVLFRM32B(tlvs[i].value, tlvs[i].tl.length); + ++i; break; /* FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG - NA */ @@ -212,12 +218,14 @@ uint8_t nr5g_fapi_config_req_to_phy_translation( case FAPI_PHY_CELL_ID_TAG: p_phy_instance->phy_config.phy_cell_id = p_ia_config_req->nPhyCellId = - GETVLFRM32B(tlvs[i].value, tlvs[i++].tl.length); + GETVLFRM32B(tlvs[i].value, tlvs[i].tl.length); + ++i; break; case FAPI_FRAME_DUPLEX_TYPE_TAG: p_ia_config_req->nFrameDuplexType = - GETVLFRM32B(tlvs[i].value, tlvs[i++].tl.length); + GETVLFRM32B(tlvs[i].value, tlvs[i].tl.length); + ++i; break; /***** SSB Config *****/ @@ -238,64 +246,76 @@ uint8_t nr5g_fapi_config_req_to_phy_translation( p_ia_config_req->nSubcCommon = p_ia_config_req->nSSBSubcSpacing = p_phy_instance->phy_config.sub_c_common = - GETVLFRM32B(tlvs[i].value, tlvs[i++].tl.length); + GETVLFRM32B(tlvs[i].value, tlvs[i].tl.length); + ++i; break; /***** PRACH Config *****/ case FAPI_PRACH_SUBC_SPACING_TAG: p_ia_config_req->nPrachSubcSpacing = - GETVLFRM32B(tlvs[i].value, tlvs[i++].tl.length); + GETVLFRM32B(tlvs[i].value, tlvs[i].tl.length); + ++i; break; case FAPI_RESTRICTED_SET_CONFIG_TAG: p_ia_config_req->nPrachRestrictSet = - GETVLFRM32B(tlvs[i].value, tlvs[i++].tl.length); + GETVLFRM32B(tlvs[i].value, tlvs[i].tl.length); + ++i; break; case FAPI_NUM_PRACH_FD_OCCASIONS_TAG: p_ia_config_req->nPrachFdm = - GETVLFRM32B(tlvs[i].value, tlvs[i++].tl.length); + GETVLFRM32B(tlvs[i].value, tlvs[i].tl.length); + ++i; break; case FAPI_PRACH_CONFIG_INDEX_TAG: p_ia_config_req->nPrachConfIdx = - GETVLFRM32B(tlvs[i].value, tlvs[i++].tl.length); + GETVLFRM32B(tlvs[i].value, tlvs[i].tl.length); + ++i; break; case FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG: p_ia_config_req->nPrachRootSeqIdx = - GETVLFRM32B(tlvs[i].value, tlvs[i++].tl.length); + GETVLFRM32B(tlvs[i].value, tlvs[i].tl.length); + ++i; break; case FAPI_K1_TAG: p_ia_config_req->nPrachFreqStart = - GETVLFRM32B(tlvs[i].value, tlvs[i++].tl.length); + GETVLFRM32B(tlvs[i].value, tlvs[i].tl.length); + ++i; break; case FAPI_PRACH_ZERO_CORR_CONF_TAG: p_ia_config_req->nPrachZeroCorrConf = - GETVLFRM32B(tlvs[i].value, tlvs[i++].tl.length); + GETVLFRM32B(tlvs[i].value, tlvs[i].tl.length); + ++i; break; case FAPI_SSB_PER_RACH_TAG: p_ia_config_req->nPrachSsbRach = - GETVLFRM32B(tlvs[i].value, tlvs[i++].tl.length); + GETVLFRM32B(tlvs[i].value, tlvs[i].tl.length); + ++i; break; /***** SSB Table *****/ case FAPI_SSB_OFFSET_POINT_A_TAG: p_ia_config_req->nSSBPrbOffset = - GETVLFRM32B(tlvs[i].value, tlvs[i++].tl.length) / (pow(2, - p_ia_config_req->nSubcCommon)); + GETVLFRM32B(tlvs[i].value, tlvs[i].tl.length) / + (pow(2, p_ia_config_req->nSubcCommon)); + ++i; break; case FAPI_SSB_PERIOD_TAG: p_ia_config_req->nSSBPeriod = - GETVLFRM32B(tlvs[i].value, tlvs[i++].tl.length); + GETVLFRM32B(tlvs[i].value, tlvs[i].tl.length); + ++i; break; case FAPI_SSB_SUBCARRIER_OFFSET_TAG: p_ia_config_req->nSSBSubcOffset = - (tlvs[i].value >> tlvs[i++].tl.length); + (tlvs[i].value >> tlvs[i].tl.length); + ++i; break; case FAPI_MIB_TAG: @@ -307,20 +327,23 @@ uint8_t nr5g_fapi_config_req_to_phy_translation( case FAPI_DMRS_TYPE_A_POS_TAG: p_ia_config_req->nDMRSTypeAPos = - GETVLFRM32B(tlvs[i].value, tlvs[i++].tl.length); + GETVLFRM32B(tlvs[i].value, tlvs[i].tl.length); + ++i; break; case FAPI_SSB_MASK_TAG: if (n_ssb_mask_idx < 2) { p_ia_config_req->nSSBMask[n_ssb_mask_idx++] = - tlvs[i++].value; + tlvs[i].value; + ++i; } break; case FAPI_BEAM_ID_TAG: - if (n_beamid_idx < MAX_NUM_ANT) { + if (n_beamid_idx < MAX_NUM_ANT_NR5G) { p_ia_config_req->nBeamId[n_beamid_idx++] = - GETVLFRM32B(tlvs[i].value, tlvs[i++].tl.length); + GETVLFRM32B(tlvs[i].value, tlvs[i].tl.length); + ++i; } break; @@ -331,16 +354,17 @@ uint8_t nr5g_fapi_config_req_to_phy_translation( case FAPI_TDD_PERIOD_TAG: p_ia_config_req->nTddPeriod = nr5g_fapi_calc_phy_tdd_period((uint8_t) - GETVLFRM32B(tlvs[i].value, tlvs[i++].tl.length), + GETVLFRM32B(tlvs[i].value, tlvs[i].tl.length), p_ia_config_req->nSubcCommon); + ++i; break; case FAPI_SLOT_CONFIG_TAG: for (j = 0; j < p_ia_config_req->nTddPeriod; j++) { p_sslot_Config = &p_ia_config_req->sSlotConfig[j]; - for (k = 0; k < MAX_NUM_OF_SYMBOL_PER_SLOT; k++) { + for (k = 0; k < MAX_NUM_OF_SYMBOL_PER_SLOT; k++, i++) { p_sslot_Config->nSymbolType[k] = - GETVLFRM32B(tlvs[i].value, tlvs[i++].tl.length); + GETVLFRM32B(tlvs[i].value, tlvs[i].tl.length); } } break; diff --git a/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_dl_iq_samples_req.c b/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_dl_iq_samples_req.c index 07b722a..ea3c3b2 100644 --- a/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_dl_iq_samples_req.c +++ b/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_dl_iq_samples_req.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -21,7 +21,6 @@ * **/ #include "nr5g_fapi_framework.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_fapi2mac_api.h" #include "nr5g_fapi_fapi2phy_api.h" #include "nr5g_fapi_fapi2phy_p5_proc.h" diff --git a/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_param_resp.c b/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_param_resp.c new file mode 100644 index 0000000..54e5fd2 --- /dev/null +++ b/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_param_resp.c @@ -0,0 +1,76 @@ +/****************************************************************************** +* +* Copyright (c) 2022 Intel. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +* +*******************************************************************************/ + +/** + * @file + * This file consist of implementation of FAPI PARAM.response message. + * + **/ + +#include "nr5g_fapi_framework.h" +#include "nr5g_fapi_fapi2mac_api.h" +#include "nr5g_fapi_fapi2mac_p5_proc.h" + + /** @ingroup group_source_api_p5_fapi2mac_proc + * + * @param[in] p_phy_instance Pointer to PHY instance. + * @return Returns ::SUCCESS and ::FAILURE. + * + * @description + * This message allows PHY to report L2/L3 about PARAM.request's status. + * +**/ +uint8_t nr5g_fapi_param_response( + p_nr5g_fapi_phy_instance_t p_phy_instance) +{ + fapi_param_resp_t *p_fapi_resp; + p_fapi_api_queue_elem_t p_list_elem; + nr5g_fapi_stats_t *p_stats; + + // Create FAPI message header + nr5g_fapi_message_header_per_phy(p_phy_instance->phy_id, false); + + p_stats = &p_phy_instance->stats; + p_stats->iapi_stats.iapi_param_res++; + p_list_elem = + nr5g_fapi_fapi2mac_create_api_list_elem(FAPI_PARAM_RESPONSE, 1, + sizeof(fapi_param_resp_t)); + if (!p_list_elem) { + NR5G_FAPI_LOG(ERROR_LOG, ("[PARAM.response] Unable to create " + "list element. Out of memory!!!")); + return FAILURE; + } + + p_fapi_resp = (fapi_param_resp_t *) (p_list_elem + 1); + p_fapi_resp->header.msg_id = FAPI_PARAM_RESPONSE; + p_fapi_resp->header.length = (uint16_t) sizeof(fapi_param_resp_t); + p_fapi_resp->error_code = + (p_phy_instance->state == FAPI_STATE_RUNNING) ? MSG_INVALID_STATE : MSG_OK; + + /* TLV report is not supported in PHY */ + p_fapi_resp->number_of_tlvs = 0; + + // Add element to send list + nr5g_fapi_fapi2mac_add_api_to_list(p_phy_instance->phy_id, p_list_elem, false); + + p_stats->fapi_stats.fapi_param_res++; + NR5G_FAPI_LOG(INFO_LOG, ("[PARAM.response][%d]", p_phy_instance->phy_id)); + nr5g_fapi_fapi2mac_send_api_list(false); + + return SUCCESS; +} diff --git a/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_shutdown_req.c b/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_shutdown_req.c index b0ada6c..415c74b 100644 --- a/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_shutdown_req.c +++ b/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_shutdown_req.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -22,8 +22,8 @@ * **/ +#include "nr5g_mac_phy_api.h" #include "nr5g_fapi_framework.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_fapi2mac_api.h" #include "nr5g_fapi_fapi2phy_api.h" #include "nr5g_fapi_fapi2phy_p5_proc.h" diff --git a/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_start_req.c b/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_start_req.c index 3a81acc..ff6503c 100644 --- a/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_start_req.c +++ b/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_start_req.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -22,8 +22,8 @@ * **/ +#include "nr5g_mac_phy_api.h" #include "nr5g_fapi_framework.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_fapi2mac_api.h" #include "nr5g_fapi_fapi2phy_api.h" #include "nr5g_fapi_fapi2phy_p5_proc.h" diff --git a/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_stop_req.c b/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_stop_req.c index 3852da3..5321ea3 100644 --- a/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_stop_req.c +++ b/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_stop_req.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -22,8 +22,8 @@ * **/ +#include "nr5g_mac_phy_api.h" #include "nr5g_fapi_framework.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_fapi2mac_api.h" #include "nr5g_fapi_fapi2phy_api.h" #include "nr5g_fapi_fapi2phy_p5_proc.h" diff --git a/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_ul_iq_samples_req.c b/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_ul_iq_samples_req.c index 902ab90..218f0a4 100644 --- a/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_ul_iq_samples_req.c +++ b/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_ul_iq_samples_req.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -22,7 +22,6 @@ * **/ #include "nr5g_fapi_framework.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_fapi2mac_api.h" #include "nr5g_fapi_fapi2phy_api.h" #include "nr5g_fapi_fapi2phy_p5_proc.h" diff --git a/fapi_5g/source/api/fapi2phy/p7/nr5g_fapi_fapi2phy_p7_proc.h b/fapi_5g/source/api/fapi2phy/p7/nr5g_fapi_fapi2phy_p7_proc.h index a4568c8..6a48860 100644 --- a/fapi_5g/source/api/fapi2phy/p7/nr5g_fapi_fapi2phy_p7_proc.h +++ b/fapi_5g/source/api/fapi2phy/p7/nr5g_fapi_fapi2phy_p7_proc.h @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/fapi_5g/source/api/fapi2phy/p7/nr5g_fapi_fapi2phy_p7_pvt_proc.h b/fapi_5g/source/api/fapi2phy/p7/nr5g_fapi_fapi2phy_p7_pvt_proc.h index 4f6b565..8531bf4 100644 --- a/fapi_5g/source/api/fapi2phy/p7/nr5g_fapi_fapi2phy_p7_pvt_proc.h +++ b/fapi_5g/source/api/fapi2phy/p7/nr5g_fapi_fapi2phy_p7_pvt_proc.h @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -25,6 +25,32 @@ #ifndef _NR5G_FAPI_FAP2PHY_P7_PVT_PROC_H_ #define _NR5G_FAPI_FAP2PHY_P7_PVT_PROC_H_ + +#include "nr5g_mac_phy_api.h" +#include "fapi_interface.h" +#include "fapi_vendor_extension.h" +#include "nr5g_fapi_framework.h" + +#ifdef __cplusplus +extern "C" { +#endif + +// DL/UL_TTI.req common +uint8_t nr5g_fapi_calc_n_rbg_size( + uint16_t bwp_size); + +uint32_t nr5g_fapi_calc_rbg_index( + const uint8_t rb_bitmap[FAPI_RB_BITMAP_SIZE], + uint16_t bwp_start, + uint16_t bwp_size, + uint32_t(*get_rbg_index_mask)(uint32_t nth_bit)); + +uint16_t nr5g_fapi_get_rb_bits_for_rbg( + const uint8_t rb_bitmap[FAPI_RB_BITMAP_SIZE], + uint32_t rbg_bit, + uint8_t rbg_size, + uint16_t rb_bitmap_mask); + // DL_TTI.req uint8_t nr5g_fapi_dl_tti_req_to_phy_translation( p_nr5g_fapi_phy_instance_t p_phy_instance, @@ -56,6 +82,11 @@ uint16_t nr5g_fapi_calculate_nEpreRatioOfDmrsToSSB( uint16_t nr5g_fapi_calculate_nEpreRatioOfPDSCHToSSB( uint8_t power_control_offset); +uint32_t nr5g_fapi_calc_pdsch_rbg_index( + const uint8_t rb_bitmap[FAPI_RB_BITMAP_SIZE], + uint16_t bwp_start, + uint16_t bwp_size); + void nr5g_fapi_fill_ssb_pdu( p_nr5g_fapi_phy_instance_t p_phy_instance, PBCHPDUStruct p_bch_pdu, @@ -67,13 +98,11 @@ void nr5g_fapi_fill_csi_rs_pdu( PCSIRSPDUStruct pCSIRSPdu); // UL_TTI.req -uint8_t nr5g_fapi_calc_n_rbg_size( +uint32_t nr5g_fapi_calc_pusch_rbg_index( + const uint8_t rb_bitmap[FAPI_RB_BITMAP_SIZE], + uint16_t bwp_start, uint16_t bwp_size); -uint32_t nr5g_fapi_calc_n_rbg_index_entry( - uint8_t n_rbg_size, - fapi_ul_pusch_pdu_t * p_pusch_pdu); - void nr5g_fapi_pusch_data_to_phy_ulsch_translation( nr5g_fapi_pusch_info_t * p_pusch_info, fapi_pusch_data_t * p_pusch_data, @@ -150,4 +179,8 @@ void nr5g_fapi_tx_data_req_to_phy_translation_vendor_ext( fapi_vendor_msg_t * p_fapi_vendor_msg, PTXRequestStruct p_phy_req); +#ifdef __cplusplus +} +#endif + #endif //_NR5G_FAPI_FAP2PHY_P7_PVT_PROC_H_ diff --git a/fapi_5g/source/api/fapi2phy/p7/nr5g_fapi_proc_dl_tti_req.c b/fapi_5g/source/api/fapi2phy/p7/nr5g_fapi_proc_dl_tti_req.c index 3898686..78a1a2a 100644 --- a/fapi_5g/source/api/fapi2phy/p7/nr5g_fapi_proc_dl_tti_req.c +++ b/fapi_5g/source/api/fapi2phy/p7/nr5g_fapi_proc_dl_tti_req.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -23,7 +23,6 @@ **/ #include #include "nr5g_fapi_framework.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_dpdk.h" #include "nr5g_fapi_fapi2mac_api.h" #include "nr5g_fapi_fapi2phy_api.h" @@ -398,6 +397,32 @@ void nr5g_fapi_fill_dci_pdu( p_stats->iapi_stats.iapi_dl_tti_pdcch_pdus++; } +static uint32_t get_rbg_index_mask_from_MSB(uint32_t nth_bit) { + #define DLSCH_RBG_INDEX_MSB 0x80000000u + return DLSCH_RBG_INDEX_MSB >> nth_bit; +} + +/** @ingroup group_source_api_p7_fapi2phy_proc + * + * @param[in] rb_bitmap Pointer to FAPI DL resource block bitmap. + * @param[in] rbg_size Size of resource block group. + * + * @return Returns IAPI nRBGIndex + * + * @description + * Maps rbBitmap into nRBGIndex bits for pdsch. + * +**/ +uint32_t nr5g_fapi_calc_pdsch_rbg_index( + const uint8_t rb_bitmap[FAPI_RB_BITMAP_SIZE], + uint16_t bwp_start, + uint16_t bwp_size + ) +{ + return nr5g_fapi_calc_rbg_index( + rb_bitmap, bwp_start, bwp_size, get_rbg_index_mask_from_MSB); +} + /** @ingroup group_nr5g_test_config * * @param[in] p_pdsch_pdu @@ -414,14 +439,15 @@ void nr5g_fapi_fill_pdsch_pdu( fapi_dl_pdsch_pdu_t * p_pdsch_pdu, PDLSCHPDUStruct p_dlsch_pdu) { - uint8_t idx, port_index = 0; + uint8_t resource_alloc_type, idx, port_index = 0u; nr5g_fapi_stats_t *p_stats; + uint16_t bwp_start, bwp_size; p_stats = &p_phy_instance->stats; p_stats->fapi_stats.fapi_dl_tti_pdsch_pdus++; - p_dlsch_pdu->nBWPSize = p_pdsch_pdu->bwpSize; - p_dlsch_pdu->nBWPStart = p_pdsch_pdu->bwpStart; + bwp_size = p_dlsch_pdu->nBWPSize = p_pdsch_pdu->bwpSize; + bwp_start = p_dlsch_pdu->nBWPStart = p_pdsch_pdu->bwpStart; p_dlsch_pdu->nSubcSpacing = p_pdsch_pdu->subCarrierSpacing; p_dlsch_pdu->nCpType = p_pdsch_pdu->cyclicPrefix; p_dlsch_pdu->nRNTI = p_pdsch_pdu->rnti; @@ -456,13 +482,14 @@ void nr5g_fapi_fill_pdsch_pdu( } // Resource Allocation Information - if (FAILURE == NR5G_FAPI_MEMCPY(p_dlsch_pdu->nRBGIndex, - sizeof(uint32_t) * MAX_DL_RBG_BIT_NUM, - p_pdsch_pdu->rbBitmap, sizeof(uint32_t) * MAX_DL_RBG_BIT_NUM)) { - NR5G_FAPI_LOG(ERROR_LOG, ("PDSCH: RNTI: %d Pdu Index: %d -- RB Bitmap" - "cpy error.", p_pdsch_pdu->rnti, p_pdsch_pdu->pdu_index)); - } + resource_alloc_type = p_dlsch_pdu->nResourceAllocType = p_pdsch_pdu->resourceAlloc; + if(FAPI_DL_RESOURCE_ALLOC_TYPE_0 == resource_alloc_type) { + p_dlsch_pdu->nRBGSize = nr5g_fapi_calc_n_rbg_size(bwp_size); + p_dlsch_pdu->nRBGIndex = nr5g_fapi_calc_pdsch_rbg_index( + p_pdsch_pdu->rbBitmap, bwp_start, bwp_size); + } + p_dlsch_pdu->nRBStart = p_pdsch_pdu->rbStart; p_dlsch_pdu->nRBSize = p_pdsch_pdu->rbSize; p_dlsch_pdu->nPMI = (p_pdsch_pdu->preCodingAndBeamforming.numPrgs > 0) @@ -643,7 +670,8 @@ uint16_t nr5g_fapi_calculate_nEpreRatioOfDmrsToSSB( **/ uint16_t nr5g_fapi_calculate_nEpreRatioOfPDSCHToSSB(uint8_t power_control_offset) { - static const uint8_t MAPPING_SIZE = 24; + #define MAPPING_SIZE 24U + static const uint16_t power_control_offset_to_epre_ratio[MAPPING_SIZE] = { // 0 1 2 3 4 5 6 7 1, 1, 1, 1000, 2000, 3000, 4000, 5000, diff --git a/fapi_5g/source/api/fapi2phy/p7/nr5g_fapi_proc_tti_req_common.c b/fapi_5g/source/api/fapi2phy/p7/nr5g_fapi_proc_tti_req_common.c new file mode 100644 index 0000000..3ff1d89 --- /dev/null +++ b/fapi_5g/source/api/fapi2phy/p7/nr5g_fapi_proc_tti_req_common.c @@ -0,0 +1,202 @@ +/****************************************************************************** +* +* Copyright (c) 2021 Intel. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +* +*******************************************************************************/ + +#include "nr5g_fapi_framework.h" +#include "nr5g_fapi_fapi2phy_p7_pvt_proc.h" + +#define FAPI_EMPTY_RB_BITMAP_MASK (0u) +#define FAPI_EMPTY_RBG_INDEX (0u) +#define FAPI_MAX_RB_BIT_NUM (273u) + +static uint16_t nr5g_fapi_rb_bitmap_mask( + uint8_t rbg_size) +{ + switch (rbg_size) { + case 2: + return 0x3u; + case 4: + return 0xFu; + case 8: + return 0xFFu; + case 16: + return 0xFFFFu; + default: + return FAPI_EMPTY_RB_BITMAP_MASK; + } +} + +uint16_t nr5g_fapi_get_rb_bits_for_rbg( + const uint8_t rb_bitmap[FAPI_RB_BITMAP_SIZE], + uint32_t nth_rbg_bit, + uint8_t rbg_size, + uint16_t rb_bitmap_mask) +{ + uint16_t rb_bits = 0u; + const uint16_t rb_bits_bit_size = sizeof(rb_bits) * CHAR_BIT; + const uint16_t nth_rb_bit = nth_rbg_bit * rbg_size; + const uint32_t rb_byte_1 = ( nth_rb_bit / rb_bits_bit_size ) * sizeof(rb_bits); + const uint32_t rb_byte_2 = rb_byte_1 + 1u; + if (rb_byte_1 < FAPI_RB_BITMAP_SIZE) + { + rb_bits |= rb_bitmap[rb_byte_1]; + } + if (rb_byte_2 < FAPI_RB_BITMAP_SIZE) + { + rb_bits |= (rb_bitmap[rb_byte_2] << CHAR_BIT); + } + const uint32_t local_rbg_idx = nth_rb_bit % rb_bits_bit_size; + return (rb_bits >> local_rbg_idx) & rb_bitmap_mask; +} + +static bool nr5g_fapi_has_rbg_bits_in_rb_bitmap( + const uint8_t rb_bitmap[FAPI_RB_BITMAP_SIZE], + const uint16_t rbg_bit, + const uint8_t rbg_size, + const uint16_t rb_bitmap_mask) +{ + const uint16_t rb_bits_for_rbg = nr5g_fapi_get_rb_bits_for_rbg( + rb_bitmap, rbg_bit, rbg_size, rb_bitmap_mask); + if (rb_bitmap_mask == rb_bits_for_rbg) + { + return true; + } + else if (FAPI_EMPTY_RB_BITMAP_MASK != rb_bits_for_rbg) + { + NR5G_FAPI_LOG(ERROR_LOG, ("rb_bits don not match rb_bitmap_mask." + " rbg_size %u rbg_bit=%u rb_bits_for_rbg=%#X rb_bitmap_mask=%#X", + rbg_size, rbg_bit, rb_bits_for_rbg, rb_bitmap_mask)); + } + return false; +} + +/** @ingroup group_source_api_p7_fapi2phy_proc + * + * @param[in] rb_bitmap Pointer to FAPI DL resource block bitmap. + * @param[in] bwp_start Value of bandwidth partition start. + * @param[in] bwp_size Value of bandwidth partition size. + * @param[in] rbg_size Value of resource block group size. + * @param[in] get_rbg_index_mask Function placing bit in rbgIndex (bit order). + * + * @return Returns IAPI nRBGIndex + * + * @description + * See TS 138 214 5.1.2.2.1/6.1.2.2.1 for more info. + * IAPI uses bit per Resource Block Group, + * FAPI uses bit per Virtual Resource Block. + * Therefore 1 nRBGIndex bit (IAPI), maps to nRBGSize bits (FAPI) + * Bitmaps mappings representation: + * IAPI: nRBGIndex = RBG-0................RBG-17 (for PDSCH MSB to LSB, + * for PUSCH LSB to MSB) + * FAPI RB-0...RB-272: + * FAPI rbBitmap[i] = RB-(7+i*8)...........RB-(0+i*8) (MSB to LSB) + * +**/ +uint32_t nr5g_fapi_calc_rbg_index( + const uint8_t rb_bitmap[FAPI_RB_BITMAP_SIZE], + uint16_t bwp_start, + uint16_t bwp_size, + uint32_t(*get_rbg_index_mask)(uint32_t nth_bit)) +{ + const uint8_t rbg_size = nr5g_fapi_calc_n_rbg_size(bwp_size); + const uint16_t rb_bitmap_mask = nr5g_fapi_rb_bitmap_mask(rbg_size); + if (FAPI_EMPTY_RB_BITMAP_MASK == rb_bitmap_mask) + { + NR5G_FAPI_LOG(ERROR_LOG, ("Wrong rbg_size=%u. rbg_index set to 0.", + rbg_size)); + return FAPI_EMPTY_RBG_INDEX; + } + if (bwp_start >= FAPI_MAX_RB_BIT_NUM) + { + NR5G_FAPI_LOG(ERROR_LOG, ("Wrong bwp_start=%u. rbg_index set to 0.", + bwp_start)); + return FAPI_EMPTY_RBG_INDEX; + } + + const uint16_t rbg_bit_begin = bwp_start / rbg_size; + const uint16_t rb_bit_end = fmin(FAPI_MAX_RB_BIT_NUM, bwp_start + bwp_size); + const uint16_t rbg_bit_last = ceil((double)rb_bit_end / rbg_size) - 1u; + + const uint16_t start_offset = bwp_start % rbg_size; + uint16_t rb_bitmap_mask_1st_rbg = + rb_bitmap_mask & (rb_bitmap_mask << start_offset); + const uint16_t last_rbg_size = + (0u == rb_bit_end % rbg_size) ? rbg_size : rb_bit_end % rbg_size; + const uint16_t end_offset = rbg_size - last_rbg_size; + uint16_t rb_bitmap_mask_last_rbg = rb_bitmap_mask >> end_offset; + if (rbg_bit_begin == rbg_bit_last) + { + const uint16_t mask = rb_bitmap_mask_1st_rbg & rb_bitmap_mask_last_rbg; + rb_bitmap_mask_1st_rbg = mask; + rb_bitmap_mask_last_rbg = mask; + } + + uint32_t result = 0u; + // fill 1st rbg + if (nr5g_fapi_has_rbg_bits_in_rb_bitmap( + rb_bitmap, rbg_bit_begin, rbg_size, rb_bitmap_mask_1st_rbg)) + { + result |= get_rbg_index_mask(rbg_bit_begin); + } + // fill last rbg + if (nr5g_fapi_has_rbg_bits_in_rb_bitmap( + rb_bitmap, rbg_bit_last, rbg_size, rb_bitmap_mask_last_rbg)) + { + result |= get_rbg_index_mask(rbg_bit_last); + } + // fill rest of rbgs + uint8_t rbg_bit; + for (rbg_bit = rbg_bit_begin + 1u; rbg_bit < rbg_bit_last; rbg_bit++) + { + if (nr5g_fapi_has_rbg_bits_in_rb_bitmap( + rb_bitmap, rbg_bit, rbg_size, rb_bitmap_mask)) + { + result |= get_rbg_index_mask(rbg_bit); + } + } + + return result; +} + + /** @ingroup group_source_api_p7_fapi2phy_proc + * + * @param[in] bwp_size Variable holding the Bandwidth part size. + * + * @return Returns ::RBG Size. + * + * @description + * This functions calculates and return RBG Size from Bandwidth part size + * provided. + * +**/ +uint8_t nr5g_fapi_calc_n_rbg_size( + uint16_t bwp_size) +{ + uint8_t n_rbg_size = 0; + if (bwp_size >= 1 && bwp_size <= 36) { + n_rbg_size = 2; + } else if (bwp_size >= 37 && bwp_size <= 72) { + n_rbg_size = 4; + } else if (bwp_size >= 73 && bwp_size <= 144) { + n_rbg_size = 8; + } else if (bwp_size >= 145 && bwp_size <= 275) { + n_rbg_size = 16; + } else { + n_rbg_size = 0; + } + return n_rbg_size; +} \ No newline at end of file diff --git a/fapi_5g/source/api/fapi2phy/p7/nr5g_fapi_proc_tx_data_req.c b/fapi_5g/source/api/fapi2phy/p7/nr5g_fapi_proc_tx_data_req.c index dbb4bf4..22c3351 100644 --- a/fapi_5g/source/api/fapi2phy/p7/nr5g_fapi_proc_tx_data_req.c +++ b/fapi_5g/source/api/fapi2phy/p7/nr5g_fapi_proc_tx_data_req.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -23,7 +23,6 @@ **/ #include "nr5g_fapi_framework.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_fapi2mac_api.h" #include "nr5g_fapi_fapi2phy_api.h" #include "nr5g_fapi_fapi2phy_p7_proc.h" diff --git a/fapi_5g/source/api/fapi2phy/p7/nr5g_fapi_proc_ul_dci_req.c b/fapi_5g/source/api/fapi2phy/p7/nr5g_fapi_proc_ul_dci_req.c index fde5569..e300049 100644 --- a/fapi_5g/source/api/fapi2phy/p7/nr5g_fapi_proc_ul_dci_req.c +++ b/fapi_5g/source/api/fapi2phy/p7/nr5g_fapi_proc_ul_dci_req.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -23,7 +23,6 @@ **/ #include "nr5g_fapi_framework.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_fapi2mac_api.h" #include "nr5g_fapi_fapi2phy_api.h" #include "nr5g_fapi_fapi2phy_p7_proc.h" diff --git a/fapi_5g/source/api/fapi2phy/p7/nr5g_fapi_proc_ul_tti_req.c b/fapi_5g/source/api/fapi2phy/p7/nr5g_fapi_proc_ul_tti_req.c index 32aaa9f..dd88d6a 100644 --- a/fapi_5g/source/api/fapi2phy/p7/nr5g_fapi_proc_ul_tti_req.c +++ b/fapi_5g/source/api/fapi2phy/p7/nr5g_fapi_proc_ul_tti_req.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -23,7 +23,6 @@ **/ #include "nr5g_fapi_framework.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_fapi2mac_api.h" #include "nr5g_fapi_fapi2phy_api.h" #include "nr5g_fapi_fapi2phy_p7_proc.h" @@ -105,67 +104,30 @@ uint8_t nr5g_fapi_ul_tti_request( return SUCCESS; } - /** @ingroup group_source_api_p7_fapi2phy_proc - * - * @param[in] bwp_size Variable holding the Bandwidth part size. - * - * @return Returns ::RBG Size. - * - * @description - * This functions calculates and return RBG Size from Bandwidth part size provided. - * -**/ -uint8_t nr5g_fapi_calc_n_rbg_size( - uint16_t bwp_size) -{ - uint8_t n_rbg_size = 0; - if (bwp_size >= 1 && bwp_size <= 36) { - n_rbg_size = 2; - } else if (bwp_size >= 37 && bwp_size <= 72) { - n_rbg_size = 4; - } else if (bwp_size >= 73 && bwp_size <= 144) { - n_rbg_size = 8; - } else if (bwp_size >= 145 && bwp_size <= 275) { - n_rbg_size = 16; - } else { - n_rbg_size = 0; - } - return n_rbg_size; +static uint32_t get_rbg_index_mask_from_LSB(uint32_t nth_bit) { + #define ULSCH_RBG_INDEX_LSB 0x1u + return ULSCH_RBG_INDEX_LSB << nth_bit; } /** @ingroup group_source_api_p7_fapi2phy_proc * - * @param[in] n_rbg_size Variable holding the RBG Size - * @param[in] p_push_pdu Pointer to FAPI PUSCH Pdu + * @param[in] rb_bitmap Pointer to FAPI DL resource block bitmap. + * @param[in] rbg_size Size of resource block group. * - * @return Returns ::RBG Bitmap entry + * @return Returns IAPI nRBGIndex * * @description - * This functions derives the RBG Bitmap entry for PUSCH Type-0 allocation. + * Maps rbBitmap into nRBGIndex bits for pusch. * **/ -uint32_t nr5g_fapi_calc_n_rbg_index_entry( - uint8_t n_rbg_size, - fapi_ul_pusch_pdu_t * p_pusch_pdu) +uint32_t nr5g_fapi_calc_pusch_rbg_index( + const uint8_t rb_bitmap[FAPI_RB_BITMAP_SIZE], + uint16_t bwp_start, + uint16_t bwp_size + ) { - uint8_t i, temp, num_bits = 0; - uint32_t n_rbg_bitmap = 0; - uint8_t rb_bitmap_entries, rb_bitmap; - - rb_bitmap_entries = ceil(n_rbg_size / 8); - for (i = 0; i < rb_bitmap_entries; i++) { - num_bits = 0; - temp = 0; - rb_bitmap = p_pusch_pdu->rbBitmap[i]; - while (num_bits < 8) { - if (rb_bitmap & (1 << num_bits)) { - temp |= (1 << (7 - num_bits)); - } - num_bits++; - } - n_rbg_bitmap |= ((n_rbg_bitmap | temp) << (32 - (8 * (i + 1)))); - } - return n_rbg_bitmap; + return nr5g_fapi_calc_rbg_index( + rb_bitmap, bwp_start, bwp_size, get_rbg_index_mask_from_LSB); } /** @ingroup group_source_api_p7_fapi2phy_proc @@ -343,19 +305,24 @@ void nr5g_fapi_pusch_to_phy_ulsch_translation( } p_ul_data_chan->nTPPuschID = p_pusch_pdu->nTpPuschId; p_ul_data_chan->nTpPi2BPSK = p_pusch_pdu->tpPi2Bpsk; + + // Resource Allocation Information + p_ul_data_chan->nResourceAllocType = p_pusch_pdu->resourceAlloc; + if(FAPI_UL_RESOURCE_ALLOC_TYPE_0 == p_pusch_pdu->resourceAlloc) { + // TODO HS check correctness of supporting only config1 //Config-1 alone is supported - n_rbg_size = p_ul_data_chan->nRBGSize = nr5g_fapi_calc_n_rbg_size(bwp_size); + n_rbg_size = p_ul_data_chan->nRBGSize = + nr5g_fapi_calc_n_rbg_size(bwp_size); if (n_rbg_size > 0) { p_ul_data_chan->nNrOfRBGs = ceil((bwp_size + (bwp_start % n_rbg_size)) / n_rbg_size); } - //First entry would be sufficient as maximum no of RBG's is at max 18. - p_ul_data_chan->nRBGIndex[0] = - nr5g_fapi_calc_n_rbg_index_entry(n_rbg_size, p_pusch_pdu); + p_ul_data_chan->nRBGIndex = nr5g_fapi_calc_pusch_rbg_index( + p_pusch_pdu->rbBitmap, bwp_start, bwp_size); + } p_ul_data_chan->nRBStart = p_pusch_pdu->rbStart; p_ul_data_chan->nRBSize = p_pusch_pdu->rbSize; p_ul_data_chan->nVRBtoPRB = p_pusch_pdu->vrbToPrbMapping; - p_ul_data_chan->nResourceAllocType = p_pusch_pdu->resourceAlloc; p_ul_data_chan->nStartSymbolIndex = p_pusch_pdu->startSymbIndex; p_ul_data_chan->nNrOfSymbols = p_pusch_pdu->nrOfSymbols; diff --git a/fapi_5g/source/framework/nr5g_fapi_framework.c b/fapi_5g/source/framework/nr5g_fapi_framework.c index c65b64b..3c1e155 100644 --- a/fapi_5g/source/framework/nr5g_fapi_framework.c +++ b/fapi_5g/source/framework/nr5g_fapi_framework.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -20,7 +20,6 @@ #include "nr5g_fapi_fapi2mac_wls.h" #include "nr5g_fapi_fapi2phy_wls.h" #include "nr5g_fapi_fapi2phy_api.h" -#include "gnb_l1_l2_api.h" #include "rte_memzone.h" #include "nr5g_fapi_memory.h" @@ -86,9 +85,10 @@ uint8_t nr5g_fapi_dpdk_wait( } } #else - pthread_join(p_cfg->mac2phy_thread_info.thread_id, NULL); - pthread_join(p_cfg->phy2mac_thread_info.thread_id, NULL); - pthread_join(p_cfg->urllc_thread_info.thread_id, NULL); + pthread_join(p_cfg->mac2phy_thread_params.thread_info.thread_id, NULL); + pthread_join(p_cfg->phy2mac_thread_params.thread_info.thread_id, NULL); + pthread_join(p_cfg->urllc_phy2mac_thread_params.thread_info.thread_id, NULL); + pthread_join(p_cfg->urllc_mac2phy_thread_params.thread_info.thread_id, NULL); #endif return SUCCESS; } @@ -129,12 +129,86 @@ nr5g_fapi_ul_slot_info_t *nr5g_fapi_get_ul_slot_info( return NULL; } +uint8_t nr5g_fapi_prepare_thread( + nr5g_fapi_thread_params_t* thread_params, + char* thread_name, + void* thread_fun(void*)) +{ + struct sched_param param; + pthread_attr_t* p_thread_attr = &thread_params->thread_info.thread_attr; + pthread_attr_init(p_thread_attr); + if (!pthread_attr_getschedparam(p_thread_attr, ¶m)) { + param.sched_priority = thread_params->thread_worker.thread_priority; + pthread_attr_setschedparam(p_thread_attr, ¶m); + pthread_attr_setschedpolicy(p_thread_attr, SCHED_FIFO); + } + + if (0 != pthread_create(&thread_params->thread_info.thread_id, + p_thread_attr, thread_fun, (void *) + nr5g_fapi_get_nr5g_fapi_phy_ctx())) { + printf("Error: Unable to create threads\n"); + if (p_thread_attr) + pthread_attr_destroy(p_thread_attr); + return FAILURE; + } + pthread_setname_np(thread_params->thread_info.thread_id, + thread_name); + + return SUCCESS; +} + +uint8_t nr5g_fapi_initialise_sempahore( + nr5g_fapi_urllc_thread_params_t* urllc_thread_params) +{ + memset(&urllc_thread_params->urllc_sem_process, 0, sizeof(sem_t)); + memset(&urllc_thread_params->urllc_sem_done, 0, sizeof(sem_t)); + + pthread_mutex_init(&urllc_thread_params->lock, NULL); + urllc_thread_params->p_urllc_list_elem = NULL; + if (0 != sem_init(&urllc_thread_params->urllc_sem_process, 0, 0)) { + printf("Error: Unable to init urllc_sem_process semaphore\n"); + return FAILURE; + } + if (0 != sem_init(&urllc_thread_params->urllc_sem_done, 0, 1)) { + printf("Error: Unable to init urllc_sem_done semaphore\n"); + return FAILURE; + } + + return SUCCESS; +} + +void nr5g_fapi_init_thread(uint8_t worker_core_id) +{ + cpu_set_t cpuset; + pthread_t thread = pthread_self(); + + CPU_ZERO(&cpuset); + CPU_SET(worker_core_id, &cpuset); + pthread_setaffinity_np(thread, sizeof(cpu_set_t), &cpuset); + + usleep(1000); +} + +void nr5g_fapi_urllc_thread_callback( + void *p_list_elem, + nr5g_fapi_urllc_thread_params_t* urllc_params) +{ + if (nr5g_fapi_get_nr5g_fapi_phy_ctx()->is_urllc_enabled){ + sem_wait(&urllc_params->urllc_sem_done); + pthread_mutex_lock(&urllc_params->lock); + urllc_params->p_urllc_list_elem = p_list_elem; + pthread_mutex_unlock(&urllc_params->lock); + sem_post(&urllc_params->urllc_sem_process); + } + else { + NR5G_FAPI_LOG(ERROR_LOG, ("[URLLC] Threads are not running")); + } +} + uint8_t nr5g_fapi_framework_init( p_nr5g_fapi_cfg_t p_cfg) { p_nr5g_fapi_phy_ctx_t p_phy_ctx = nr5g_fapi_get_nr5g_fapi_phy_ctx(); - pthread_attr_t *p_mac2phy_attr, *p_phy2mac_attr, *p_urllc_attr; - struct sched_param param; nr5g_fapi_set_log_level(p_cfg->logger.level); // Set up WLS @@ -144,79 +218,63 @@ uint8_t nr5g_fapi_framework_init( } NR5G_FAPI_LOG(INFO_LOG, ("[FAPI_INT] WLS init Successful")); - p_phy_ctx->phy2mac_worker_core_id = p_cfg->phy2mac_worker.core_id; - p_phy_ctx->mac2phy_worker_core_id = p_cfg->mac2phy_worker.core_id; - p_phy_ctx->urllc_worker_core_id = p_cfg->urllc_worker.core_id; + p_phy_ctx->phy2mac_worker_core_id = p_cfg->phy2mac_thread_params.thread_worker.core_id; + p_phy_ctx->mac2phy_worker_core_id = p_cfg->mac2phy_thread_params.thread_worker.core_id; + p_phy_ctx->urllc_phy2mac_worker_core_id = p_cfg->urllc_phy2mac_thread_params.thread_worker.core_id; + p_phy_ctx->urllc_mac2phy_worker_core_id = p_cfg->urllc_mac2phy_thread_params.thread_worker.core_id; + p_phy_ctx->is_urllc_enabled = p_cfg->is_urllc_enabled; - memset(&p_phy_ctx->urllc_sem_process, 0, sizeof(sem_t)); - memset(&p_phy_ctx->urllc_sem_done, 0, sizeof(sem_t)); - if (0 != sem_init(&p_phy_ctx->urllc_sem_process, 0, 0)) { - printf("Error: Unable to init urllc semaphore\n"); - return FAILURE; - } - if (0 != sem_init(&p_phy_ctx->urllc_sem_done, 0, 1)) { - printf("Error: Unable to init urllc_sem_done semaphore\n"); + if (nr5g_fapi_prepare_thread(&p_cfg->phy2mac_thread_params, + "nr5g_fapi_phy2mac_thread", + nr5g_fapi_phy2mac_thread_func) == FAILURE) { return FAILURE; } - p_phy2mac_attr = &p_cfg->phy2mac_thread_info.thread_attr; - pthread_attr_init(p_phy2mac_attr); - if (!pthread_attr_getschedparam(p_phy2mac_attr, ¶m)) { - param.sched_priority = p_cfg->phy2mac_worker.thread_priority; - pthread_attr_setschedparam(p_phy2mac_attr, ¶m); - pthread_attr_setschedpolicy(p_phy2mac_attr, SCHED_FIFO); - } - if (0 != pthread_create(&p_cfg->phy2mac_thread_info.thread_id, - p_phy2mac_attr, nr5g_fapi_phy2mac_thread_func, (void *) - p_phy_ctx)) { - printf("Error: Unable to create threads\n"); - if (p_phy2mac_attr) - pthread_attr_destroy(p_phy2mac_attr); + if (nr5g_fapi_prepare_thread(&p_cfg->mac2phy_thread_params, + "nr5g_fapi_mac2phy_thread", + nr5g_fapi_mac2phy_thread_func) == FAILURE) { return FAILURE; } - pthread_setname_np(p_cfg->phy2mac_thread_info.thread_id, - "nr5g_fapi_phy2mac_thread"); - p_mac2phy_attr = &p_cfg->mac2phy_thread_info.thread_attr; - pthread_attr_init(p_mac2phy_attr); - if (!pthread_attr_getschedparam(p_mac2phy_attr, ¶m)) { - param.sched_priority = p_cfg->mac2phy_worker.thread_priority; - pthread_attr_setschedparam(p_mac2phy_attr, ¶m); - pthread_attr_setschedpolicy(p_mac2phy_attr, SCHED_FIFO); + if (p_cfg->is_urllc_enabled) + { + if (nr5g_fapi_initialise_sempahore(&p_phy_ctx->urllc_phy2mac_params) == FAILURE) { + return FAILURE; } - if (0 != pthread_create(&p_cfg->mac2phy_thread_info.thread_id, - p_mac2phy_attr, nr5g_fapi_mac2phy_thread_func, (void *) - p_phy_ctx)) { - printf("Error: Unable to create threads\n"); - if (p_mac2phy_attr) - pthread_attr_destroy(p_mac2phy_attr); + if (nr5g_fapi_initialise_sempahore(&p_phy_ctx->urllc_mac2phy_params) == FAILURE) { return FAILURE; } - pthread_setname_np(p_cfg->mac2phy_thread_info.thread_id, - "nr5g_fapi_mac2phy_thread"); - p_urllc_attr = &p_cfg->urllc_thread_info.thread_attr; - pthread_attr_init(p_urllc_attr); - if (!pthread_attr_getschedparam(p_urllc_attr, ¶m)) { - param.sched_priority = p_cfg->urllc_worker.thread_sched_policy; - pthread_attr_setschedparam(p_urllc_attr, ¶m); - pthread_attr_setschedpolicy(p_urllc_attr, SCHED_FIFO); + if (nr5g_fapi_prepare_thread(&p_cfg->urllc_mac2phy_thread_params, + "nr5g_fapi_urllc_mac2phy_thread", + nr5g_fapi_urllc_mac2phy_thread_func) == FAILURE) { + return FAILURE; } - if (0 != pthread_create(&p_cfg->urllc_thread_info.thread_id, - p_urllc_attr, nr5g_fapi_urllc_thread_func, (void *) - p_phy_ctx)) { - printf("Error: Unable to create threads\n"); - if (p_urllc_attr) - pthread_attr_destroy(p_urllc_attr); - sem_destroy(&p_phy_ctx->urllc_sem_process); - sem_destroy(&p_phy_ctx->urllc_sem_done); + + if (nr5g_fapi_prepare_thread(&p_cfg->urllc_phy2mac_thread_params, + "nr5g_fapi_urllc_phy2mac_thread", + nr5g_fapi_urllc_phy2mac_thread_func) == FAILURE) { return FAILURE; } - pthread_setname_np(p_cfg->urllc_thread_info.thread_id, - "nr5g_fapi_urllc_thread"); + } return SUCCESS; } + +void nr5g_fapi_clean( + p_nr5g_fapi_phy_instance_t p_phy_instance) +{ + p_phy_instance->phy_config.n_nr_of_rx_ant = 0; + p_phy_instance->phy_config.phy_cell_id = 0; + p_phy_instance->phy_config.sub_c_common = 0; + p_phy_instance->phy_config.use_vendor_EpreXSSB = 0; + p_phy_instance->shutdown_test_type = 0; + p_phy_instance->phy_id = 0; + p_phy_instance->state = FAPI_STATE_IDLE ; + + memset(p_phy_instance->ul_slot_info, 0, sizeof(nr5g_fapi_ul_slot_info_t)); + wls_fapi_free_send_free_list_urllc(); +} \ No newline at end of file diff --git a/fapi_5g/source/framework/wls/fapi2mac/nr5g_fapi_fapi2mac_wls.c b/fapi_5g/source/framework/wls/fapi2mac/nr5g_fapi_fapi2mac_wls.c index 3944551..ce4b86d 100644 --- a/fapi_5g/source/framework/wls/fapi2mac/nr5g_fapi_fapi2mac_wls.c +++ b/fapi_5g/source/framework/wls/fapi2mac/nr5g_fapi_fapi2mac_wls.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -24,13 +24,27 @@ #include "nr5g_fapi_std.h" #include "nr5g_fapi_common_types.h" #include "nr5g_fapi_wls.h" -#include "gnb_l1_l2_api.h" #include "nr5g_fapi_fapi2mac_wls.h" #include "nr5g_fapi_log.h" -#include "nr5g_fapi_urllc_thread.h" +#include "nr5g_fapi_framework.h" static p_fapi_api_queue_elem_t p_fapi2mac_buffers; +uint64_t *nr5g_fapi_fapi2mac_wls_get( + uint32_t * const msg_size, + uint16_t * const msg_type, + uint16_t * const flags); + +uint8_t nr5g_fapi_fapi2mac_wls_put( + const p_fapi_api_queue_elem_t p_msg, + uint32_t msg_size, + uint16_t msg_type, + uint16_t flags); + +uint8_t nr5g_fapi_fapi2mac_wls_send( + const p_fapi_api_queue_elem_t p_list_elem, + bool is_urllc); + //------------------------------------------------------------------------------ /** @ingroup nr5g_fapi_source_framework_wls_fapi2mac_group * @@ -172,7 +186,7 @@ void nr5g_fapi_fapi2mac_wls_free_buffer( * @return 0 if SUCCESS * * @description - * This function is called at WLS init and waits in an infinite for L1 to respond back with some information + * This function is called at WLS init and waits infinitely for L1 to respond back with some information * needed by the L2 * **/ @@ -193,8 +207,8 @@ uint8_t nr5g_fapi_fapi2mac_wls_ready( * @return Number of blocks of APIs received * * @description - * This functions waits in a infinite loop for L1 to send a list of APIs to MAC. This is called - * during runtime when L2 sends a API to L1 and then waits for response back. + * This functions waits in an infinite loop for L1 to send a list of APIs to MAC. This is called + * during runtime when L2 sends API to L1 and then waits for a response back. * **/ //------------------------------------------------------------------------------ @@ -239,9 +253,9 @@ static inline uint8_t is_msg_present( **/ //------------------------------------------------------------------------------ uint64_t *nr5g_fapi_fapi2mac_wls_get( - uint32_t * msg_size, - uint16_t * msg_type, - uint16_t * flags) + uint32_t * const msg_size, + uint16_t * const msg_type, + uint16_t * const flags) { uint64_t *data = NULL; WLS_HANDLE h_wls; @@ -271,7 +285,7 @@ uint64_t *nr5g_fapi_fapi2mac_wls_get( **/ //------------------------------------------------------------------------------ inline uint8_t nr5g_fapi_fapi2mac_wls_put( - p_fapi_api_queue_elem_t p_msg, + const p_fapi_api_queue_elem_t p_msg, uint32_t msg_size, uint16_t msg_type, uint16_t flags) @@ -301,7 +315,7 @@ inline uint8_t nr5g_fapi_fapi2mac_wls_put( **/ //------------------------------------------------------------------------------ uint8_t nr5g_fapi_fapi2mac_wls_send( - p_fapi_api_queue_elem_t p_list_elem, + const p_fapi_api_queue_elem_t p_list_elem, bool is_urllc) { uint8_t ret = SUCCESS; @@ -452,7 +466,8 @@ p_fapi_api_queue_elem_t nr5g_fapi_fapi2mac_wls_recv( } while (num_elms && is_msg_present(flags)); if (p_urllc_qelm_list) { - nr5g_fapi_urllc_thread_callback(NR5G_FAPI_URLLC_MSG_DIR_MAC2PHY, (void *) p_urllc_qelm_list); + nr5g_fapi_urllc_thread_callback((void *) p_urllc_qelm_list, + &nr5g_fapi_get_nr5g_fapi_phy_ctx()->urllc_mac2phy_params); } tick_total_wls_get_per_tti_dl += __rdtsc() - start_tick; diff --git a/fapi_5g/source/framework/wls/fapi2mac/nr5g_fapi_fapi2mac_wls.h b/fapi_5g/source/framework/wls/fapi2mac/nr5g_fapi_fapi2mac_wls.h index b768f40..282841f 100644 --- a/fapi_5g/source/framework/wls/fapi2mac/nr5g_fapi_fapi2mac_wls.h +++ b/fapi_5g/source/framework/wls/fapi2mac/nr5g_fapi_fapi2mac_wls.h @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -38,8 +38,6 @@ uint8_t nr5g_fapi_fapi2mac_wls_send( p_fapi_api_queue_elem_t nr5g_fapi_fapi2mac_wls_recv( ); -uint8_t nr5g_fapi_fapi2mac_wls_ready( - ); uint32_t nr5g_fapi_fapi2mac_wls_wait( ); diff --git a/fapi_5g/source/framework/wls/fapi2phy/nr5g_fapi_fapi2phy_wls.c b/fapi_5g/source/framework/wls/fapi2phy/nr5g_fapi_fapi2phy_wls.c index f9e0656..33f163e 100644 --- a/fapi_5g/source/framework/wls/fapi2phy/nr5g_fapi_fapi2phy_wls.c +++ b/fapi_5g/source/framework/wls/fapi2phy/nr5g_fapi_fapi2phy_wls.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -21,13 +21,14 @@ * @defgroup nr5g_fapi_source_framework_wls_fapi2phy_group **/ +#include "nr5g_mac_phy_api.h" #include "nr5g_fapi_std.h" #include "nr5g_fapi_common_types.h" #include "nr5g_fapi_internal.h" #include "nr5g_fapi_wls.h" #include "nr5g_fapi_fapi2phy_wls.h" #include "nr5g_fapi_log.h" -#include "nr5g_fapi_urllc_thread.h" +#include "nr5g_fapi_framework.h" static uint32_t g_to_free_send_list_cnt[TO_FREE_SIZE] = { 0 }; static uint64_t g_to_free_send_list[TO_FREE_SIZE][TOTAL_FREE_BLOCKS] = { {0L} }; @@ -37,6 +38,21 @@ static uint64_t g_to_free_recv_list[TO_FREE_SIZE][TOTAL_FREE_BLOCKS] = { {0L} }; static uint32_t g_to_free_send_list_cnt_urllc[TO_FREE_SIZE_URLLC] = { 0 }; static uint64_t g_to_free_send_list_urllc[TO_FREE_SIZE_URLLC][TOTAL_FREE_BLOCKS] = { {0L} }; +static uint32_t g_free_recv_idx = 0; +static uint32_t g_free_send_idx = 0; +static uint32_t g_free_send_idx_urllc = 0; + +uint64_t *nr5g_fapi_fapi2phy_wls_get( + uint32_t * const msg_size, + uint16_t * const msg_type, + uint16_t * const flags); + +uint8_t nr5g_fapi_fapi2phy_wls_put( + uint64_t p_msg, + uint32_t msg_size, + uint16_t msg_type, + uint16_t flags); + //------------------------------------------------------------------------------ /** @ingroup nr5g_fapi_source_framework_wls_fapi2phy_group * @@ -96,9 +112,9 @@ static inline WLS_HANDLE nr5g_fapi_fapi2phy_wls_instance( **/ //---------------------------------------------------------------------------------- inline uint64_t *nr5g_fapi_fapi2phy_wls_get( - uint32_t * msg_size, - uint16_t * msg_type, - uint16_t * flags) + uint32_t * const msg_size, + uint16_t * const msg_type, + uint16_t * const flags) { uint64_t *data = NULL; WLS_HANDLE h_wls; @@ -185,6 +201,21 @@ static inline uint8_t is_msg_present( return (!((flags & WLS_TF_FIN) || (flags == 0))); } +void nr5g_fapi_transfer_to_free_recv_list ( + PMAC2PHY_QUEUE_EL p_qelm_list + /*uint32_t* free_recv_idx*/) +{ + wls_fapi_add_recv_apis_to_free(p_qelm_list, g_free_recv_idx); + (g_free_recv_idx)++; + if ((g_free_recv_idx) >= TO_FREE_SIZE) { + (g_free_recv_idx) = 0; + } + // Free few TTIs Later + wls_fapi_free_recv_free_list(g_free_recv_idx); + + wls_fapi_add_blocks_to_ul(); +} + //---------------------------------------------------------------------------------- /** @ingroup nr5g_fapi_source_framework_wls_fapi2phy_group * @@ -206,7 +237,6 @@ PMAC2PHY_QUEUE_EL nr5g_fapi_fapi2phy_wls_recv( uint32_t msg_size = 0; uint32_t num_elms = 0; uint64_t *p_msg = NULL; - static uint32_t g_free_recv_idx = 0; PMAC2PHY_QUEUE_EL p_qelm_list = NULL, p_urllc_qelm_list = NULL; PMAC2PHY_QUEUE_EL p_qelm = NULL; PMAC2PHY_QUEUE_EL p_tail_qelm = NULL, p_urllc_tail_qelm = NULL; @@ -254,28 +284,13 @@ PMAC2PHY_QUEUE_EL nr5g_fapi_fapi2phy_wls_recv( } while (num_elms && is_msg_present(flags)); if (p_urllc_qelm_list) { - wls_fapi_add_recv_apis_to_free(p_urllc_qelm_list, g_free_recv_idx); - g_free_recv_idx++; - if (g_free_recv_idx >= TO_FREE_SIZE) { - g_free_recv_idx = 0; - } - // Free 10 TTIs Later - wls_fapi_free_recv_free_list(g_free_recv_idx); - - wls_fapi_add_blocks_to_ul(); - nr5g_fapi_urllc_thread_callback(NR5G_FAPI_URLLC_MSG_DIR_PHY2MAC, (void *) p_urllc_qelm_list); + nr5g_fapi_transfer_to_free_recv_list (p_urllc_qelm_list); + nr5g_fapi_urllc_thread_callback((void *) p_urllc_qelm_list, + &nr5g_fapi_get_nr5g_fapi_phy_ctx()->urllc_phy2mac_params); } if (p_qelm_list) { - wls_fapi_add_recv_apis_to_free(p_qelm_list, g_free_recv_idx); - g_free_recv_idx++; - if (g_free_recv_idx >= TO_FREE_SIZE) { - g_free_recv_idx = 0; - } - // Free 10 TTIs Later - wls_fapi_free_recv_free_list(g_free_recv_idx); - - wls_fapi_add_blocks_to_ul(); + nr5g_fapi_transfer_to_free_recv_list (p_qelm_list); } tick_total_wls_get_per_tti_ul += __rdtsc() - start_tick; @@ -410,8 +425,6 @@ uint8_t nr5g_fapi_fapi2phy_wls_send( uint16_t flags_urllc = (is_urllc ? WLS_TF_URLLC : 0); uint8_t ret = SUCCESS; int n_zbc_blocks = 0, is_zbc = 0, count = 0; - static uint32_t g_free_send_idx = 0; - static uint32_t g_free_send_idx_urllc = 0; p_curr_msg = (PMAC2PHY_QUEUE_EL) data; is_urllc ? wls_fapi_add_send_apis_to_free_urllc(p_curr_msg, g_free_send_idx_urllc) @@ -526,8 +539,8 @@ uint8_t nr5g_fapi_fapi2phy_wls_send( } // Free some TTIs Later - is_urllc ? wls_fapi_free_send_free_list_urllc(g_free_send_idx_urllc) - : wls_fapi_free_send_free_list(g_free_send_idx); + is_urllc ? wls_fapi_free_send_free_list_urllc() + : wls_fapi_free_send_free_list(); } if (pthread_mutex_unlock((pthread_mutex_t *) & @@ -751,32 +764,31 @@ void wls_fapi_add_send_apis_to_free( * free array **/ //------------------------------------------------------------------------------ -void wls_fapi_free_send_free_list( - uint32_t idx) +void wls_fapi_free_send_free_list() { PMAC2PHY_QUEUE_EL pNextMsg = NULL; L1L2MessageHdr *p_msg_header = NULL; int count = 0, loc = 0; - if (idx >= TO_FREE_SIZE) { - NR5G_FAPI_LOG(ERROR_LOG, ("%s: list index: %d\n", __func__, idx)); + if (g_free_send_idx >= TO_FREE_SIZE) { + NR5G_FAPI_LOG(ERROR_LOG, ("%s: list index: %d\n", __func__, g_free_send_idx)); return; } - pNextMsg = (PMAC2PHY_QUEUE_EL) g_to_free_send_list[idx][count]; + pNextMsg = (PMAC2PHY_QUEUE_EL) g_to_free_send_list[g_free_send_idx][count]; while (pNextMsg) { p_msg_header = (PL1L2MessageHdr) (pNextMsg + 1); loc = get_stats_location(p_msg_header->nMessageType); wls_fapi_free_buffer(pNextMsg, loc); - g_to_free_send_list[idx][count++] = 0L; - if (g_to_free_send_list[idx][count]) - pNextMsg = (PMAC2PHY_QUEUE_EL) g_to_free_send_list[idx][count]; + g_to_free_send_list[g_free_send_idx][count++] = 0L; + if (g_to_free_send_list[g_free_send_idx][count]) + pNextMsg = (PMAC2PHY_QUEUE_EL) g_to_free_send_list[g_free_send_idx][count]; else pNextMsg = 0L; } NR5G_FAPI_LOG(DEBUG_LOG, ("Free %d\n", count)); - g_to_free_send_list_cnt[idx] = 0; + g_to_free_send_list_cnt[g_free_send_idx] = 0; return; } @@ -832,32 +844,31 @@ void wls_fapi_add_send_apis_to_free_urllc( * free array. Used by urllc thread. **/ //------------------------------------------------------------------------------ -void wls_fapi_free_send_free_list_urllc( - uint32_t idx) +void wls_fapi_free_send_free_list_urllc() { PMAC2PHY_QUEUE_EL pNextMsg = NULL; L1L2MessageHdr *p_msg_header = NULL; int count = 0, loc = 0; - if (idx >= TO_FREE_SIZE_URLLC) { - NR5G_FAPI_LOG(ERROR_LOG, ("%s: list index: %d\n", __func__, idx)); + if (g_free_send_idx_urllc >= TO_FREE_SIZE_URLLC) { + NR5G_FAPI_LOG(ERROR_LOG, ("%s: list index: %d\n", __func__, g_free_send_idx_urllc)); return; } - pNextMsg = (PMAC2PHY_QUEUE_EL) g_to_free_send_list_urllc[idx][count]; + pNextMsg = (PMAC2PHY_QUEUE_EL) g_to_free_send_list_urllc[g_free_send_idx_urllc][count]; while (pNextMsg) { p_msg_header = (PL1L2MessageHdr) (pNextMsg + 1); loc = get_stats_location(p_msg_header->nMessageType); wls_fapi_free_buffer(pNextMsg, loc); - g_to_free_send_list_urllc[idx][count++] = 0L; - if (g_to_free_send_list_urllc[idx][count]) - pNextMsg = (PMAC2PHY_QUEUE_EL) g_to_free_send_list_urllc[idx][count]; + g_to_free_send_list_urllc[g_free_send_idx_urllc][count++] = 0L; + if (g_to_free_send_list_urllc[g_free_send_idx_urllc][count]) + pNextMsg = (PMAC2PHY_QUEUE_EL) g_to_free_send_list_urllc[g_free_send_idx_urllc][count]; else pNextMsg = 0L; } NR5G_FAPI_LOG(DEBUG_LOG, ("Free %d\n", count)); - g_to_free_send_list_cnt_urllc[idx] = 0; + g_to_free_send_list_cnt_urllc[g_free_send_idx_urllc] = 0; return; } diff --git a/fapi_5g/source/framework/wls/fapi2phy/nr5g_fapi_fapi2phy_wls.h b/fapi_5g/source/framework/wls/fapi2phy/nr5g_fapi_fapi2phy_wls.h index 61b96a3..724e8dd 100644 --- a/fapi_5g/source/framework/wls/fapi2phy/nr5g_fapi_fapi2phy_wls.h +++ b/fapi_5g/source/framework/wls/fapi2phy/nr5g_fapi_fapi2phy_wls.h @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -25,7 +25,7 @@ #ifndef _NR5G_FAPI2PHY_WLS_H_ #define _NR5G_FAPI2PHY_WLS_H_ -#include "gnb_l1_l2_api.h" +#include "common_mac_phy_api.h" uint8_t nr5g_fapi_fapi2phy_is_valid_wls_ptr( void *data); @@ -34,18 +34,16 @@ uint8_t nr5g_fapi_fapi2phy_wls_send( bool is_urllc); PMAC2PHY_QUEUE_EL nr5g_fapi_fapi2phy_wls_recv( ); -inline uint32_t nr5g_fapi_fapi2phy_wls_wait( +uint32_t nr5g_fapi_fapi2phy_wls_wait( ); void wls_fapi_add_send_apis_to_free( PMAC2PHY_QUEUE_EL pListElem, uint32_t idx); -void wls_fapi_free_send_free_list( - uint32_t idx); +void wls_fapi_free_send_free_list(); void wls_fapi_add_send_apis_to_free_urllc( PMAC2PHY_QUEUE_EL pListElem, uint32_t idx); -void wls_fapi_free_send_free_list_urllc( - uint32_t idx); +void wls_fapi_free_send_free_list_urllc(); void wls_fapi_add_recv_apis_to_free( PMAC2PHY_QUEUE_EL pListElem, uint32_t idx); diff --git a/fapi_5g/source/framework/wls/lib/nr5g_fapi_wls.c b/fapi_5g/source/framework/wls/lib/nr5g_fapi_wls.c index 16890e0..f7074c2 100644 --- a/fapi_5g/source/framework/wls/lib/nr5g_fapi_wls.c +++ b/fapi_5g/source/framework/wls/lib/nr5g_fapi_wls.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -76,30 +76,6 @@ inline uint8_t nr5g_fapi_fapi2phy_wls_ready( return retval; } -//---------------------------------------------------------------------------------- -/** @ingroup nr5g_fapi_source_framework_wls_fapi2phy_group - * - * @param void - * - * @return 0 if SUCCESS - * - * @description - * This function is called at WLS init and waits in an infinite for L1 to respond back with some information - * needed by the L2 - * -**/ -//---------------------------------------------------------------------------------- -inline uint8_t nr5g_fapi_fapi2mac_wls_ready( - ) -{ - int retval = 0; - p_nr5g_fapi_wls_context_t p_wls = nr5g_fapi_wls_context(); - - retval = WLS_Ready1(p_wls->h_wls[NR5G_FAPI2MAC_WLS_INST]); - - return retval; -} - //------------------------------------------------------------------------------ /** @ingroup nr5g_fapi_source_framework_wls_lib_group * @@ -118,7 +94,7 @@ void nr5g_fapi_wls_show_data( uint32_t size) { uint8_t *d = ptr; - int i; + uint32_t i; for (i = 0; i < size; i++) { if (!(i & 0xf)) diff --git a/fapi_5g/source/framework/wls/lib/nr5g_fapi_wls.h b/fapi_5g/source/framework/wls/lib/nr5g_fapi_wls.h index c34052c..72a4d67 100644 --- a/fapi_5g/source/framework/wls/lib/nr5g_fapi_wls.h +++ b/fapi_5g/source/framework/wls/lib/nr5g_fapi_wls.h @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -28,7 +28,6 @@ #include "nr5g_fapi_std.h" #include "nr5g_fapi_common_types.h" #include "wls_lib.h" -#include "gnb_l1_l2_api.h" typedef void *WLS_HANDLE; @@ -93,11 +92,11 @@ typedef struct _nr5g_fapi_wls_context { extern nr5g_fapi_wls_context_t g_wls_ctx; -inline p_nr5g_fapi_wls_context_t nr5g_fapi_wls_context( +p_nr5g_fapi_wls_context_t nr5g_fapi_wls_context( ); -inline uint8_t nr5g_fapi_fapi2phy_wls_ready( +uint8_t nr5g_fapi_fapi2phy_wls_ready( ); -inline uint8_t nr5g_fapi_fapi2mac_wls_ready( +uint8_t nr5g_fapi_fapi2mac_wls_ready( ); uint8_t nr5g_fapi_wls_init( ); diff --git a/fapi_5g/source/framework/workers/nr5g_fapi_mac2phy_thread.c b/fapi_5g/source/framework/workers/nr5g_fapi_mac2phy_thread.c index dc98de3..32e4ecb 100644 --- a/fapi_5g/source/framework/workers/nr5g_fapi_mac2phy_thread.c +++ b/fapi_5g/source/framework/workers/nr5g_fapi_mac2phy_thread.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -38,8 +38,6 @@ void *nr5g_fapi_mac2phy_thread_func( void *config) { - cpu_set_t cpuset; - pthread_t thread; p_fapi_api_queue_elem_t p_msg_list = NULL; p_nr5g_fapi_phy_ctx_t p_phy_ctx = (p_nr5g_fapi_phy_ctx_t) config; uint64_t start_tick; @@ -48,12 +46,8 @@ void *nr5g_fapi_mac2phy_thread_func( "Core: %d\n", __func__, pthread_self(), p_phy_ctx->mac2phy_worker_core_id)); - thread = p_phy_ctx->mac2phy_tid = pthread_self(); - CPU_ZERO(&cpuset); - CPU_SET(p_phy_ctx->mac2phy_worker_core_id, &cpuset); - pthread_setaffinity_np(thread, sizeof(cpu_set_t), &cpuset); + nr5g_fapi_init_thread(p_phy_ctx->mac2phy_worker_core_id); - usleep(1000); while (!p_phy_ctx->process_exit) { p_msg_list = nr5g_fapi_fapi2mac_wls_recv(); if (p_msg_list) @@ -279,6 +273,14 @@ void nr5g_fapi_mac2phy_api_processing_handler( break; /* P5 Message Processing */ + + case FAPI_PARAM_REQUEST: + { + nr5g_fapi_param_response(p_phy_instance); + } + + break; + case FAPI_CONFIG_REQUEST: { nr5g_fapi_config_request(is_urllc, p_phy_instance, diff --git a/fapi_5g/source/framework/workers/nr5g_fapi_mac2phy_thread.h b/fapi_5g/source/framework/workers/nr5g_fapi_mac2phy_thread.h index 7352abf..c7e3ffa 100644 --- a/fapi_5g/source/framework/workers/nr5g_fapi_mac2phy_thread.h +++ b/fapi_5g/source/framework/workers/nr5g_fapi_mac2phy_thread.h @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/fapi_5g/source/framework/workers/nr5g_fapi_phy2mac_thread.c b/fapi_5g/source/framework/workers/nr5g_fapi_phy2mac_thread.c index 46d7bb8..9e53eb6 100644 --- a/fapi_5g/source/framework/workers/nr5g_fapi_phy2mac_thread.c +++ b/fapi_5g/source/framework/workers/nr5g_fapi_phy2mac_thread.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -37,8 +37,6 @@ void *nr5g_fapi_phy2mac_thread_func( void *config) { - cpu_set_t cpuset; - pthread_t thread; PMAC2PHY_QUEUE_EL p_msg_list = NULL; p_nr5g_fapi_phy_ctx_t p_phy_ctx = (p_nr5g_fapi_phy_ctx_t) config; @@ -46,14 +44,10 @@ void *nr5g_fapi_phy2mac_thread_func( "Core: %d\n", __func__, pthread_self(), p_phy_ctx->phy2mac_worker_core_id)); - thread = p_phy_ctx->phy2mac_tid = pthread_self(); - CPU_ZERO(&cpuset); - CPU_SET(p_phy_ctx->phy2mac_worker_core_id, &cpuset); - pthread_setaffinity_np(thread, sizeof(cpu_set_t), &cpuset); + nr5g_fapi_init_thread(p_phy_ctx->phy2mac_worker_core_id); nr5g_fapi_fapi2mac_init_api_list(); - usleep(1000); while (!p_phy_ctx->process_exit) { p_msg_list = nr5g_fapi_fapi2phy_wls_recv(); if (p_msg_list) @@ -99,14 +93,14 @@ void nr5g_fapi_phy2mac_api_recv_handler( case MSG_TYPE_PHY_DL_IQ_SAMPLES: { nr5g_fapi_dl_iq_samples_response((p_nr5g_fapi_phy_ctx_t) - config, (PADD_REMOVE_BBU_CORES) p_msg_header); + config, (PADD_REMOVE_BBU_CORES_NR5G) p_msg_header); } break; case MSG_TYPE_PHY_UL_IQ_SAMPLES: { nr5g_fapi_ul_iq_samples_response((p_nr5g_fapi_phy_ctx_t) - config, (PADD_REMOVE_BBU_CORES) p_msg_header); + config, (PADD_REMOVE_BBU_CORES_NR5G) p_msg_header); } break; #endif diff --git a/fapi_5g/source/framework/workers/nr5g_fapi_phy2mac_thread.h b/fapi_5g/source/framework/workers/nr5g_fapi_phy2mac_thread.h index 30f5fc4..18c02d3 100644 --- a/fapi_5g/source/framework/workers/nr5g_fapi_phy2mac_thread.h +++ b/fapi_5g/source/framework/workers/nr5g_fapi_phy2mac_thread.h @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -18,7 +18,7 @@ #ifndef _NR5G_FAPI_PHY2MAC_THREAD_H_ #define _NR5G_FAPI_PHY2MAC_THREAD_H_ -#include "gnb_l1_l2_api.h" +#include "common_mac_phy_api.h" void nr5g_fapi_phy2mac_api_recv_handler( bool is_urllc, diff --git a/fapi_5g/source/framework/workers/nr5g_fapi_urllc_mac2phy_thread.c b/fapi_5g/source/framework/workers/nr5g_fapi_urllc_mac2phy_thread.c new file mode 100644 index 0000000..3cb0141 --- /dev/null +++ b/fapi_5g/source/framework/workers/nr5g_fapi_urllc_mac2phy_thread.c @@ -0,0 +1,57 @@ +/****************************************************************************** +* +* Copyright (c) 2022 Intel. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +* +*******************************************************************************/ +#include "nr5g_fapi_std.h" +#include "nr5g_fapi_framework.h" +#include "nr5g_fapi_phy2mac_thread.h" +#include "nr5g_fapi_mac2phy_thread.h" +#include "nr5g_fapi_fapi2mac_api.h" +#include "nr5g_fapi_fapi2phy_api.h" + +void *nr5g_fapi_urllc_mac2phy_thread_func( + void *config) +{ + p_nr5g_fapi_phy_ctx_t p_phy_ctx = (p_nr5g_fapi_phy_ctx_t) config; + uint64_t start_tick; + + NR5G_FAPI_LOG(INFO_LOG, ("[URLLC_MAC2PHY] Thread %s launched LWP:%ld on " + "Core: %d\n", __func__, pthread_self(), + p_phy_ctx->urllc_mac2phy_worker_core_id)); + + nr5g_fapi_init_thread(p_phy_ctx->urllc_mac2phy_worker_core_id); + + while (!p_phy_ctx->process_exit) { + sem_wait(&p_phy_ctx->urllc_mac2phy_params.urllc_sem_process); + pthread_mutex_lock(&p_phy_ctx->urllc_mac2phy_params.lock); + if (p_phy_ctx->urllc_mac2phy_params.p_urllc_list_elem) + { + nr5g_fapi_mac2phy_api_recv_handler(true, config, + (p_fapi_api_queue_elem_t) p_phy_ctx->urllc_mac2phy_params. + p_urllc_list_elem); + start_tick = __rdtsc(); + NR5G_FAPI_LOG(TRACE_LOG, ("[MAC2PHY] Send to PHY urllc..")); + nr5g_fapi_fapi2phy_send_api_list(true); + tick_total_wls_send_per_tti_dl += __rdtsc() - start_tick; + + p_phy_ctx->urllc_mac2phy_params.p_urllc_list_elem = NULL; + } + pthread_mutex_unlock(&p_phy_ctx->urllc_mac2phy_params.lock); + sem_post(&p_phy_ctx->urllc_mac2phy_params.urllc_sem_done); + } + + pthread_exit(NULL); +} \ No newline at end of file diff --git a/fapi_5g/source/framework/workers/nr5g_fapi_urllc_phy2mac_thread.c b/fapi_5g/source/framework/workers/nr5g_fapi_urllc_phy2mac_thread.c new file mode 100644 index 0000000..942d22e --- /dev/null +++ b/fapi_5g/source/framework/workers/nr5g_fapi_urllc_phy2mac_thread.c @@ -0,0 +1,53 @@ +/****************************************************************************** +* +* Copyright (c) 2022 Intel. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +* +*******************************************************************************/ +#include "nr5g_fapi_std.h" +#include "nr5g_fapi_framework.h" +#include "nr5g_fapi_phy2mac_thread.h" +#include "nr5g_fapi_mac2phy_thread.h" +#include "nr5g_fapi_fapi2mac_api.h" +#include "nr5g_fapi_fapi2phy_api.h" + +void *nr5g_fapi_urllc_phy2mac_thread_func( + void *config) +{ + p_nr5g_fapi_phy_ctx_t p_phy_ctx = (p_nr5g_fapi_phy_ctx_t) config; + + NR5G_FAPI_LOG(INFO_LOG, ("[URLLC_PHY2MAC] Thread %s launched LWP:%ld on " + "Core: %d\n", __func__, pthread_self(), + p_phy_ctx->urllc_phy2mac_worker_core_id)); + + nr5g_fapi_init_thread(p_phy_ctx->urllc_phy2mac_worker_core_id); + + while (!p_phy_ctx->process_exit) { + sem_wait(&p_phy_ctx->urllc_phy2mac_params.urllc_sem_process); + pthread_mutex_lock(&p_phy_ctx->urllc_phy2mac_params.lock); + if (p_phy_ctx->urllc_phy2mac_params.p_urllc_list_elem) + { + nr5g_fapi_phy2mac_api_recv_handler(true, config, + (PMAC2PHY_QUEUE_EL) p_phy_ctx->urllc_phy2mac_params. + p_urllc_list_elem); + nr5g_fapi_fapi2mac_send_api_list(true); + + p_phy_ctx->urllc_phy2mac_params.p_urllc_list_elem = NULL; + } + pthread_mutex_unlock(&p_phy_ctx->urllc_phy2mac_params.lock); + sem_post(&p_phy_ctx->urllc_phy2mac_params.urllc_sem_done); + } + + pthread_exit(NULL); +} \ No newline at end of file diff --git a/fapi_5g/source/framework/workers/nr5g_fapi_urllc_thread.c b/fapi_5g/source/framework/workers/nr5g_fapi_urllc_thread.c index ee83d7a..52d7d45 100644 --- a/fapi_5g/source/framework/workers/nr5g_fapi_urllc_thread.c +++ b/fapi_5g/source/framework/workers/nr5g_fapi_urllc_thread.c @@ -32,6 +32,8 @@ void nr5g_fapi_urllc_thread_callback( void *p_list_elem) { p_nr5g_fapi_phy_ctx_t p_phy_ctx = nr5g_fapi_get_nr5g_fapi_phy_ctx(); + if(0u != p_phy_ctx->urllc_tid) + { sem_wait(&p_phy_ctx->urllc_sem_done); pthread_mutex_lock(&lock); p_urllc_list_elem = p_list_elem; @@ -39,6 +41,11 @@ void nr5g_fapi_urllc_thread_callback( pthread_mutex_unlock(&lock); sem_post(&p_phy_ctx->urllc_sem_process); } + else + { + NR5G_FAPI_LOG(ERROR_LOG, ("[URLLC] Thread is not running")); + } +} void *nr5g_fapi_urllc_thread_func( void *config) @@ -66,18 +73,22 @@ void *nr5g_fapi_urllc_thread_func( { switch (urllc_msg_dir) { case NR5G_FAPI_URLLC_MSG_DIR_MAC2PHY: - nr5g_fapi_mac2phy_api_recv_handler(true, config, (p_fapi_api_queue_elem_t) p_urllc_list_elem); + nr5g_fapi_mac2phy_api_recv_handler(true, config, + (p_fapi_api_queue_elem_t) p_urllc_list_elem); start_tick = __rdtsc(); - NR5G_FAPI_LOG(TRACE_LOG, ("[MAC2PHY] Send to PHY urllc..")); + NR5G_FAPI_LOG(TRACE_LOG, + ("[MAC2PHY] Send to PHY urllc..")); nr5g_fapi_fapi2phy_send_api_list(true); tick_total_wls_send_per_tti_dl += __rdtsc() - start_tick; break; case NR5G_FAPI_URLLC_MSG_DIR_PHY2MAC: - nr5g_fapi_phy2mac_api_recv_handler(true, config, (PMAC2PHY_QUEUE_EL) p_urllc_list_elem); + nr5g_fapi_phy2mac_api_recv_handler(true, config, + (PMAC2PHY_QUEUE_EL) p_urllc_list_elem); nr5g_fapi_fapi2mac_send_api_list(true); break; default: - NR5G_FAPI_LOG(ERROR_LOG, ("[URLLC]: Invalid URLLC message direction.\n")); + NR5G_FAPI_LOG(ERROR_LOG, + ("[URLLC]: Invalid URLLC message direction.\n")); break; } diff --git a/fapi_5g/source/framework/workers/nr5g_fapi_urllc_thread.h b/fapi_5g/source/framework/workers/nr5g_fapi_urllc_thread.h deleted file mode 100644 index a3076bf..0000000 --- a/fapi_5g/source/framework/workers/nr5g_fapi_urllc_thread.h +++ /dev/null @@ -1,33 +0,0 @@ -/****************************************************************************** -* -* Copyright (c) 2021 Intel. -* -* Licensed under the Apache License, Version 2.0 (the "License"); -* you may not use this file except in compliance with the License. -* You may obtain a copy of the License at -* -* http://www.apache.org/licenses/LICENSE-2.0 -* -* Unless required by applicable law or agreed to in writing, software -* distributed under the License is distributed on an "AS IS" BASIS, -* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -* See the License for the specific language governing permissions and -* limitations under the License. -* -*******************************************************************************/ -#ifndef _NR5G_FAPI_URLLC_THREAD_H_ -#define _NR5G_FAPI_URLLC_THREAD_H_ - -#include "gnb_l1_l2_api.h" - -typedef enum nr5g_fapi_urllc_msg_dir_e { - NR5G_FAPI_URLLC_MSG_DIR_MAC2PHY = 0, - NR5G_FAPI_URLLC_MSG_DIR_PHY2MAC, - NR5G_FAPI_URLLC_MSG_DIR_LAST -} nr5g_fapi_urllc_msg_dir_t; - -void nr5g_fapi_urllc_thread_callback( - nr5g_fapi_urllc_msg_dir_t msg_dir, - void *p_list_elem); - -#endif diff --git a/fapi_5g/source/include/nr5g_fapi_args.h b/fapi_5g/source/include/nr5g_fapi_args.h index 91cff53..31e917a 100644 --- a/fapi_5g/source/include/nr5g_fapi_args.h +++ b/fapi_5g/source/include/nr5g_fapi_args.h @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/fapi_5g/source/include/nr5g_fapi_cmd.h b/fapi_5g/source/include/nr5g_fapi_cmd.h index fe2d1f0..e3625db 100644 --- a/fapi_5g/source/include/nr5g_fapi_cmd.h +++ b/fapi_5g/source/include/nr5g_fapi_cmd.h @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/fapi_5g/source/include/nr5g_fapi_common_types.h b/fapi_5g/source/include/nr5g_fapi_common_types.h index 9b8a279..5dcdfcf 100644 --- a/fapi_5g/source/include/nr5g_fapi_common_types.h +++ b/fapi_5g/source/include/nr5g_fapi_common_types.h @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/fapi_5g/source/include/nr5g_fapi_config_loader.h b/fapi_5g/source/include/nr5g_fapi_config_loader.h index af97e60..bdbf9dc 100644 --- a/fapi_5g/source/include/nr5g_fapi_config_loader.h +++ b/fapi_5g/source/include/nr5g_fapi_config_loader.h @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -63,16 +63,20 @@ typedef struct _nr5g_fapi_config_log_cfg { nr5g_fapi_log_types_t level; } nr5g_fapi_config_log_cfg_t; +typedef struct _nr5g_fapi_thread_params_t { + nr5g_fapi_config_worker_cfg_t thread_worker; + nr5g_fapi_thread_info_t thread_info; +} nr5g_fapi_thread_params_t; + typedef struct _nr5g_fapi_cfg { char *prgname; - nr5g_fapi_config_worker_cfg_t mac2phy_worker; - nr5g_fapi_config_worker_cfg_t phy2mac_worker; - nr5g_fapi_config_worker_cfg_t urllc_worker; + nr5g_fapi_thread_params_t mac2phy_thread_params; + nr5g_fapi_thread_params_t phy2mac_thread_params; + nr5g_fapi_thread_params_t urllc_mac2phy_thread_params; + nr5g_fapi_thread_params_t urllc_phy2mac_thread_params; + bool is_urllc_enabled; nr5g_fapi_config_wls_cfg_t wls; nr5g_fapi_config_log_cfg_t logger; - nr5g_fapi_thread_info_t mac2phy_thread_info; - nr5g_fapi_thread_info_t phy2mac_thread_info; - nr5g_fapi_thread_info_t urllc_thread_info; nr5g_fapi_config_dpdk_cft_t dpdk; } nr5g_fapi_cfg_t, *p_nr5g_fapi_cfg_t; diff --git a/fapi_5g/source/include/nr5g_fapi_dpdk.h b/fapi_5g/source/include/nr5g_fapi_dpdk.h index 81e65c8..dd4c451 100644 --- a/fapi_5g/source/include/nr5g_fapi_dpdk.h +++ b/fapi_5g/source/include/nr5g_fapi_dpdk.h @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/fapi_5g/source/include/nr5g_fapi_framework.h b/fapi_5g/source/include/nr5g_fapi_framework.h index 63cb237..479c5f0 100644 --- a/fapi_5g/source/include/nr5g_fapi_framework.h +++ b/fapi_5g/source/include/nr5g_fapi_framework.h @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -186,24 +186,30 @@ typedef struct _nr5g_fapi_phy_instance { } nr5g_fapi_phy_instance_t, *p_nr5g_fapi_phy_instance_t; +typedef struct _nr5g_fapi_urllc_thread_params_t { + void *p_urllc_list_elem; + pthread_mutex_t lock; + sem_t urllc_sem_process; + sem_t urllc_sem_done; +} nr5g_fapi_urllc_thread_params_t; + // Phy Context typedef struct _nr5g_fapi_phy_context { uint8_t num_phy_instance; uint8_t mac2phy_worker_core_id; uint8_t phy2mac_worker_core_id; - uint8_t urllc_worker_core_id; - pthread_t phy2mac_tid; - pthread_t mac2phy_tid; - pthread_t urllc_tid; - sem_t urllc_sem_process; - sem_t urllc_sem_done; + uint8_t urllc_mac2phy_worker_core_id; + uint8_t urllc_phy2mac_worker_core_id; + nr5g_fapi_urllc_thread_params_t urllc_mac2phy_params; + nr5g_fapi_urllc_thread_params_t urllc_phy2mac_params; + bool is_urllc_enabled; volatile uint64_t process_exit; nr5g_fapi_phy_instance_t phy_instance[FAPI_MAX_PHY_INSTANCES]; } nr5g_fapi_phy_ctx_t, *p_nr5g_fapi_phy_ctx_t; // Function Declarations -inline p_nr5g_fapi_phy_ctx_t nr5g_fapi_get_nr5g_fapi_phy_ctx( +p_nr5g_fapi_phy_ctx_t nr5g_fapi_get_nr5g_fapi_phy_ctx( ); uint8_t nr5g_fapi_framework_init( ); @@ -219,7 +225,9 @@ void *nr5g_fapi_phy2mac_thread_func( void *config); void *nr5g_fapi_mac2phy_thread_func( void *config); -void *nr5g_fapi_urllc_thread_func( +void *nr5g_fapi_urllc_mac2phy_thread_func( + void *config); +void *nr5g_fapi_urllc_phy2mac_thread_func( void *config); nr5g_fapi_ul_slot_info_t *nr5g_fapi_get_ul_slot_info( bool is_urllc, @@ -232,4 +240,10 @@ void nr5g_fapi_set_ul_slot_info( uint16_t slot_no, uint8_t symbol_no, nr5g_fapi_ul_slot_info_t * p_ul_slot_info); +void nr5g_fapi_init_thread(uint8_t worker_core_id); +void nr5g_fapi_urllc_thread_callback( + void *p_list_elem, + nr5g_fapi_urllc_thread_params_t* urllc_params); +void nr5g_fapi_clean( + p_nr5g_fapi_phy_instance_t p_phy_instance); #endif // _NR5G_FAPI_FRAMEWORK_H_ diff --git a/fapi_5g/source/include/nr5g_fapi_internal.h b/fapi_5g/source/include/nr5g_fapi_internal.h index a1d72c2..33d52b5 100644 --- a/fapi_5g/source/include/nr5g_fapi_internal.h +++ b/fapi_5g/source/include/nr5g_fapi_internal.h @@ -1,5 +1,5 @@ /****************************************************************************** -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/fapi_5g/source/include/nr5g_fapi_log.h b/fapi_5g/source/include/nr5g_fapi_log.h index bc6901e..eb800f3 100644 --- a/fapi_5g/source/include/nr5g_fapi_log.h +++ b/fapi_5g/source/include/nr5g_fapi_log.h @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -28,6 +28,11 @@ #define NR5G_FAPI_STATS_FNAME "FapiStats.txt" + +#ifdef __cplusplus +extern "C" { +#endif + typedef enum _nr5g_fapi_log_types_t { NONE_LOG = 0, INFO_LOG, // default @@ -99,4 +104,8 @@ uint16_t nr5g_fapi_statistic_info_print( uint16_t nr5g_fapi_statistic_info_set_all( ); +#ifdef __cplusplus +} +#endif + #endif // NR5G_FAPI_LOG_H_ diff --git a/fapi_5g/source/include/nr5g_fapi_memory.h b/fapi_5g/source/include/nr5g_fapi_memory.h index 0b877df..4f3ce65 100644 --- a/fapi_5g/source/include/nr5g_fapi_memory.h +++ b/fapi_5g/source/include/nr5g_fapi_memory.h @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -28,20 +28,23 @@ #define NR5G_FAPI_MEMSET(s, x, c, n) nr5g_fapi_memset_bound_check(s, x, c, n) #define NR5G_FAPI_STRCPY(d, x, s, n) nr5g_fapi_strcpy_bound_check(d, x, s, n) -inline uint8_t nr5g_fapi_memcpy_bound_check( - void *d, +#include +#include + +uint8_t nr5g_fapi_memcpy_bound_check( + void * const d, size_t x, - const void *s, + const void * const s, size_t n); -inline uint8_t nr5g_fapi_memset_bound_check( - void *s, +uint8_t nr5g_fapi_memset_bound_check( + void * const s, size_t x, const int32_t c, size_t n); -inline uint8_t nr5g_fapi_strcpy_bound_check( - char *d, +uint8_t nr5g_fapi_strcpy_bound_check( + char * const d, size_t x, - const char *s, + const char * const s, size_t n); #endif // NR5G_FAPI_MEM_H_ diff --git a/fapi_5g/source/include/nr5g_fapi_stats.h b/fapi_5g/source/include/nr5g_fapi_stats.h index 41e0516..17066ca 100644 --- a/fapi_5g/source/include/nr5g_fapi_stats.h +++ b/fapi_5g/source/include/nr5g_fapi_stats.h @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/fapi_5g/source/include/nr5g_fapi_std.h b/fapi_5g/source/include/nr5g_fapi_std.h index a93b154..af84c83 100644 --- a/fapi_5g/source/include/nr5g_fapi_std.h +++ b/fapi_5g/source/include/nr5g_fapi_std.h @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/fapi_5g/source/nr5g_fapi.c b/fapi_5g/source/nr5g_fapi.c index 78133e3..2329ad3 100644 --- a/fapi_5g/source/nr5g_fapi.c +++ b/fapi_5g/source/nr5g_fapi.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -52,9 +52,14 @@ int main( nr5g_fapi_cmgr((void *)config); nr5g_fapi_dpdk_wait(config); - pthread_attr_destroy(&config->phy2mac_thread_info.thread_attr); - pthread_attr_destroy(&config->mac2phy_thread_info.thread_attr); - pthread_attr_destroy(&config->urllc_thread_info.thread_attr); + pthread_attr_destroy(&config->phy2mac_thread_params.thread_info.thread_attr); + pthread_attr_destroy(&config->mac2phy_thread_params.thread_info.thread_attr); + if (config->is_urllc_enabled) + { + pthread_attr_destroy(&config->urllc_phy2mac_thread_params.thread_info.thread_attr); + pthread_attr_destroy(&config->urllc_mac2phy_thread_params.thread_info.thread_attr); + } + free(config); return 0; } diff --git a/fapi_5g/source/utils/nr5g_fapi_args.c b/fapi_5g/source/utils/nr5g_fapi_args.c index 552f472..e7cdd35 100644 --- a/fapi_5g/source/utils/nr5g_fapi_args.c +++ b/fapi_5g/source/utils/nr5g_fapi_args.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/fapi_5g/source/utils/nr5g_fapi_cmd.c b/fapi_5g/source/utils/nr5g_fapi_cmd.c index 87dca8f..4cf3121 100644 --- a/fapi_5g/source/utils/nr5g_fapi_cmd.c +++ b/fapi_5g/source/utils/nr5g_fapi_cmd.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/fapi_5g/source/utils/nr5g_fapi_config_loader.c b/fapi_5g/source/utils/nr5g_fapi_config_loader.c index e79b602..561c309 100644 --- a/fapi_5g/source/utils/nr5g_fapi_config_loader.c +++ b/fapi_5g/source/utils/nr5g_fapi_config_loader.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -25,6 +25,55 @@ char *fgets_s( size_t len, FILE * fp); +void nr5g_fapi_get_worker_info( + struct rte_cfgfile *cfg_file, + unsigned int num_cpus, + nr5g_fapi_thread_params_t * thread_params, + const char* worker_name) +{ + const char *entry; + + entry = rte_cfgfile_get_entry(cfg_file, worker_name, "core_id"); + if (entry) { + thread_params->thread_worker.core_id = (uint8_t) atoi(entry); + if (thread_params->thread_worker.core_id >= (uint8_t) num_cpus) { + printf("Core Id is not in the range 0 to %d: configured: %d\n", + num_cpus, thread_params->thread_worker.core_id); + exit(-1); + } + } + + entry = + rte_cfgfile_get_entry(cfg_file, worker_name, + "thread_sched_policy"); + if (entry) { + thread_params->thread_worker.thread_sched_policy = (uint8_t) atoi(entry); + if (thread_params->thread_worker.thread_sched_policy != SCHED_FIFO && + thread_params->thread_worker.thread_sched_policy != SCHED_RR) { + printf("Thread Policy valid range is Schedule Policy [1: SCHED_FIFO" + " 2: SCHED_RR]: configured: %d\n", + thread_params->thread_worker.thread_sched_policy); + exit(-1); + } + } + + int min_prio = + sched_get_priority_min(thread_params->thread_worker.thread_sched_policy); + int max_prio = + sched_get_priority_max(thread_params->thread_worker.thread_sched_policy); + entry = + rte_cfgfile_get_entry(cfg_file, worker_name, "thread_priority"); + if (entry) { + thread_params->thread_worker.thread_priority = (uint8_t) atoi(entry); + if (thread_params->thread_worker.thread_priority < min_prio && + thread_params->thread_worker.thread_priority > max_prio) { + printf("Thread priority valid range is %d to %d: configured: %d\n", + min_prio, max_prio, thread_params->thread_worker.thread_priority); + exit(-1); + } + } +} + p_nr5g_fapi_cfg_t nr5g_fapi_config_loader( char *prgname, const char *cfg_fname) @@ -69,116 +118,20 @@ p_nr5g_fapi_cfg_t nr5g_fapi_config_loader( } pclose(fp); num_cpus = atoi(max_core); - entry = rte_cfgfile_get_entry(cfg_file, "MAC2PHY_WORKER", "core_id"); - if (entry) { - cfg->mac2phy_worker.core_id = (uint8_t) atoi(entry); - if (cfg->mac2phy_worker.core_id >= (uint8_t) num_cpus) { - printf("Core Id is not in the range 0 to %d: configured: %d\n", - num_cpus, cfg->mac2phy_worker.core_id); - exit(-1); - } - } - entry = - rte_cfgfile_get_entry(cfg_file, "MAC2PHY_WORKER", - "thread_sched_policy"); - if (entry) { - cfg->mac2phy_worker.thread_sched_policy = (uint8_t) atoi(entry); - if (cfg->mac2phy_worker.thread_sched_policy != SCHED_FIFO && - cfg->mac2phy_worker.thread_sched_policy != SCHED_RR) { - printf("Thread Policy valid range is Schedule Policy [1: SCHED_FIFO" - " 2: SCHED_RR]: configured: %d\n", - cfg->mac2phy_worker.thread_sched_policy); - exit(-1); - } + cfg->is_urllc_enabled = TRUE; + entry = rte_cfgfile_get_entry(cfg_file, "URLLC", "is_enabled"); + if (entry) + { + cfg->is_urllc_enabled = (bool)atoi(entry); + if (!cfg->is_urllc_enabled) + printf("URLLC disabled\n"); } - int min_prio = - sched_get_priority_min(cfg->mac2phy_worker.thread_sched_policy); - int max_prio = - sched_get_priority_max(cfg->mac2phy_worker.thread_sched_policy); - entry = - rte_cfgfile_get_entry(cfg_file, "MAC2PHY_WORKER", "thread_priority"); - if (entry) { - cfg->mac2phy_worker.thread_priority = (uint8_t) atoi(entry); - if (cfg->mac2phy_worker.thread_priority < min_prio && - cfg->mac2phy_worker.thread_priority > max_prio) { - printf("Thread priority valid range is %d to %d: configured: %d\n", - min_prio, max_prio, cfg->mac2phy_worker.thread_priority); - exit(-1); - } - } - - entry = rte_cfgfile_get_entry(cfg_file, "PHY2MAC_WORKER", "core_id"); - if (entry) { - cfg->phy2mac_worker.core_id = (uint8_t) atoi(entry); - if (cfg->phy2mac_worker.core_id >= (uint8_t) num_cpus) { - printf("Core Id is not in the range 0 to %d configured: %d\n", - num_cpus, cfg->phy2mac_worker.core_id); - exit(-1); - } - } - - entry = - rte_cfgfile_get_entry(cfg_file, "PHY2MAC_WORKER", - "thread_sched_policy"); - if (entry) { - cfg->phy2mac_worker.thread_sched_policy = (uint8_t) atoi(entry); - if (cfg->phy2mac_worker.thread_sched_policy != SCHED_FIFO && - cfg->phy2mac_worker.thread_sched_policy != SCHED_RR) { - printf("Thread Policy valid range is Schedule Policy [1: SCHED_FIFO" - " 2: SCHED_RR] configured: %d\n", - cfg->phy2mac_worker.thread_sched_policy); - exit(-1); - } - } - - entry = - rte_cfgfile_get_entry(cfg_file, "PHY2MAC_WORKER", "thread_priority"); - if (entry) { - cfg->phy2mac_worker.thread_priority = (uint8_t) atoi(entry); - if (cfg->phy2mac_worker.thread_priority < min_prio && - cfg->phy2mac_worker.thread_priority > max_prio) { - printf("Thread priority valid range is %d to %d configured: %d\n", - min_prio, max_prio, cfg->phy2mac_worker.thread_priority); - exit(-1); - } - } - - entry = rte_cfgfile_get_entry(cfg_file, "URLLC_WORKER", "core_id"); - if (entry) { - cfg->urllc_worker.core_id = (uint8_t) atoi(entry); - if (cfg->urllc_worker.core_id >= (uint8_t) num_cpus) { - printf("Core Id is not in the range 0 to %d configured: %d\n", - num_cpus, cfg->urllc_worker.core_id); - exit(-1); - } - } - - entry = - rte_cfgfile_get_entry(cfg_file, "URLLC_WORKER", "thread_sched_policy"); - if (entry) { - cfg->urllc_worker.thread_sched_policy = (uint8_t) atoi(entry); - if (cfg->urllc_worker.thread_sched_policy != SCHED_FIFO && - cfg->urllc_worker.thread_sched_policy != SCHED_RR) { - printf("Thread Policy valid range is Schedule Policy [1: SCHED_FIFO" - " 2: SCHED_RR] configured: %d\n", - cfg->urllc_worker.thread_sched_policy); - exit(-1); - } - } - - entry = - rte_cfgfile_get_entry(cfg_file, "URLLC_WORKER", "thread_priority"); - if (entry) { - cfg->urllc_worker.thread_priority = (uint8_t) atoi(entry); - if (cfg->urllc_worker.thread_priority < min_prio && - cfg->urllc_worker.thread_priority > max_prio) { - printf("Thread priority valid range is %d to %d configured: %d\n", - min_prio, max_prio, cfg->urllc_worker.thread_priority); - exit(-1); - } - } + nr5g_fapi_get_worker_info(cfg_file, num_cpus, &cfg->mac2phy_thread_params, "MAC2PHY_WORKER"); + nr5g_fapi_get_worker_info(cfg_file, num_cpus, &cfg->phy2mac_thread_params, "PHY2MAC_WORKER"); + nr5g_fapi_get_worker_info(cfg_file, num_cpus, &cfg->urllc_mac2phy_thread_params, "MAC2PHY_URLLC_WORKER"); + nr5g_fapi_get_worker_info(cfg_file, num_cpus, &cfg->urllc_phy2mac_thread_params, "PHY2MAC_URLLC_WORKER"); entry = rte_cfgfile_get_entry(cfg_file, "WLS_CFG", "device_name"); if (entry) { diff --git a/fapi_5g/source/utils/nr5g_fapi_log.c b/fapi_5g/source/utils/nr5g_fapi_log.c index de13ce6..40609ca 100644 --- a/fapi_5g/source/utils/nr5g_fapi_log.c +++ b/fapi_5g/source/utils/nr5g_fapi_log.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/fapi_5g/source/utils/nr5g_fapi_memory.c b/fapi_5g/source/utils/nr5g_fapi_memory.c index fd14581..7bbb4a7 100644 --- a/fapi_5g/source/utils/nr5g_fapi_memory.c +++ b/fapi_5g/source/utils/nr5g_fapi_memory.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -22,14 +22,16 @@ * **/ +#include "nr5g_fapi_memory.h" + #include #include #include "nr5g_fapi_wls.h" inline uint8_t nr5g_fapi_memcpy_bound_check( - void *d, + void * const d, size_t x, - const void *s, + const void * const s, size_t n) { // Memory block size and destination/source boundary check @@ -62,7 +64,7 @@ inline uint8_t nr5g_fapi_memcpy_bound_check( } inline uint8_t nr5g_fapi_memset_bound_check( - void *s, + void * const s, size_t x, int32_t c, size_t n) @@ -79,9 +81,9 @@ inline uint8_t nr5g_fapi_memset_bound_check( } inline uint8_t nr5g_fapi_strcpy_bound_check( - char *d, + char * const d, size_t x, - const char *s, + const char * const s, size_t n) { // Memory block size and destination/source boundary check diff --git a/fapi_5g/source/utils/nr5g_fapi_snr_conversion.c b/fapi_5g/source/utils/nr5g_fapi_snr_conversion.c index 0cd07ac..5870dff 100644 --- a/fapi_5g/source/utils/nr5g_fapi_snr_conversion.c +++ b/fapi_5g/source/utils/nr5g_fapi_snr_conversion.c @@ -25,7 +25,7 @@ #include -#include "gnb_l1_l2_api.h" +#include "nr5g_mac_phy_api.h" uint8_t nr5g_fapi_convert_snr_iapi_to_fapi(const int16_t snr) { diff --git a/fapi_5g/source/utils/nr5g_fapi_stats.c b/fapi_5g/source/utils/nr5g_fapi_stats.c index 71218db..0f81e34 100644 --- a/fapi_5g/source/utils/nr5g_fapi_stats.c +++ b/fapi_5g/source/utils/nr5g_fapi_stats.c @@ -1,6 +1,6 @@ /****************************************************************************** * -* Copyright (c) 2019 Intel. +* Copyright (c) 2021 Intel. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/fapi_5g/utils/indent_options b/fapi_5g/utils/indent_options index ea0d1c5..d00df36 100644 --- a/fapi_5g/utils/indent_options +++ b/fapi_5g/utils/indent_options @@ -1,6 +1,6 @@ ############################################################################### # -# Copyright (c) 2019 Intel. +# Copyright (c) 2021 Intel. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/fhi_lib/app/Makefile b/fhi_lib/app/Makefile index 7678ad4..1f7f9d0 100644 --- a/fhi_lib/app/Makefile +++ b/fhi_lib/app/Makefile @@ -23,11 +23,21 @@ MYCUSTOMSPACE1='------------------------------------------------------------' ############################################################## # Tools configuration ############################################################## +ifeq ($(WIRELESS_SDK_TOOLCHAIN),icc) CC := icc CPP := icpc AS := as AR := ar LD := icc +else ifeq ($(WIRELESS_SDK_TOOLCHAIN),icx) + CC := icx + CPP := icpx + AS := as + AR := llvm-ar + LD := icx +else + $(error "Please define WIRELESS_SDK_TOOLCHAIN environment variable") +endif OBJDUMP := objdump ifeq ($(SHELL),cmd.exe) @@ -40,10 +50,16 @@ CP := cp -f RM := rm -rf endif -PROJECT_NAME := sample-app PROJECT_TYPE := elf PROJECT_DIR := $(XRAN_DIR)/app -BUILDDIR := ./build +ifeq ($(ORU),1) + PROJECT_NAME := sample-app-ru + BUILDDIR := build-oru +else + PROJECT_NAME := sample-app + BUILDDIR := build +endif + PROJECT_BINARY := $(BUILDDIR)/$(PROJECT_NAME) ifeq ($(RTE_SDK),) @@ -51,7 +67,6 @@ ifeq ($(RTE_SDK),) endif RTE_TARGET ?= x86_64-native-linuxapp-gcc - RTE_INC := $(shell PKG_CONFIG_PATH=/usr/lib64/pkgconfig:$(RTE_SDK)/build/meson-uninstalled pkgconf --cflags-only-I libdpdk) API_DIR := $(XRAN_DIR)/lib/api @@ -64,25 +79,59 @@ ifeq ($(MLOG_DIR),) endif endif + +############################################################## +# FRAMEWORK +############################################################## +ifeq ($(FWK), 1) +FW_INC := $(DIR_WIRELESS_FW)/enhanced_bbupool/inc +FW_LIBS := -L$(DIR_WIRELESS_FW)/enhanced_bbupool/build -Wl,--whole-archive -Wl,-lebbupool -Wl,--no-whole-archive +endif + CC_SRC = $(SRC_DIR)/common.c \ $(SRC_DIR)/config.c \ $(SRC_DIR)/app_io_fh_xran.c \ $(SRC_DIR)/app_profile_xran.c \ $(SRC_DIR)/sample-app.c +ifeq ($(FWK), 1) +CC_SRC += $(SRC_DIR)/aux_cline.c \ + $(SRC_DIR)/app_bbu_main.c \ + $(SRC_DIR)/app_bbu_pool.c \ + $(SRC_DIR)/ebbu_pool_cfg.c \ + $(SRC_DIR)/app_dl_bbu_pool_tasks.c \ + $(SRC_DIR)/app_ul_bbu_pool_tasks.c +endif + CC_FLAGS += -std=gnu11 -Wall -Wno-deprecated-declarations \ -fdata-sections \ -ffunction-sections \ -g \ -Wall \ -Wimplicit-function-declaration \ - -g -O3 -wd1786 -mcmodel=large + -g -O3 -mcmodel=large + +ifeq ($(WIRELESS_SDK_TOOLCHAIN),icc) +CC_FLAGS += -wd1786 -xcore-avx512 +endif + +ifeq ($(WIRELESS_SDK_TOOLCHAIN),icx) +CC_FLAGS += -xcore-avx512 -mintrinsic-promote -Wno-unused-function -Wno-intrinsic-promote -Wno-error +endif CPP_FLAGS := -D__STDC_LIMIT_MACROS -D__STDC_CONSTANT_MACROS -D_GNU_SOURCE -D_REENTRANT -pipe -no-prec-div \ -no-prec-div -fp-model fast=2\ -no-prec-sqrt -falign-functions=16 -fast-transcendentals \ -Werror -Wno-unused-variable -std=c++11 -mcmodel=large +ifeq ($(WIRELESS_SDK_TOOLCHAIN),icc) +CPP_FLAGS += -xcore-avx512 -fp-model fast=2 -no-prec-div -no-prec-sqrt -fast-transcendentals -restrict +endif + +ifeq ($(WIRELESS_SDK_TOOLCHAIN),icx) +CPP_FLAGS += -fp-model fast -march=icelake-server -mintrinsic-promote -Wno-unused-function -Wno-intrinsic-promote -Wno-error +endif + INC := -I$(API_DIR) -I$(RTE_INC) -I$(OWD_DIR) DEF := @@ -93,22 +142,47 @@ else DEF += -UMLOG_ENABLED endif +ifeq ($(FWK),1) + INC += -I$(FW_INC) + DEF += -DFWK_ENABLED +else + DEF += -UFWK_ENABLED +endif + +ifeq ($(ORU),1) + DEF += -DXRAN_O_RU_BUILD +else + DEF += -UXRAN_O_RU_BUILD +endif + +ifeq ($(ORU),1) + XRAN_LIB_DIR=$(XRAN_DIR)/lib/build-oru + LD_FLAGS += -L$(XRAN_LIB_DIR) -lxran-oru +else XRAN_LIB_DIR=$(XRAN_DIR)/lib/build LD_FLAGS += -L$(XRAN_LIB_DIR) -lxran +endif RTE_LIBS = $(shell PKG_CONFIG_PATH=/usr/lib64/pkgconfig:$(RTE_SDK)/build/meson-uninstalled pkgconf --static --libs libdpdk) - LD_FLAGS += $(RTE_LIBS) ifeq ($(MLOG),1) LD_FLAGS += -L$(MLOG_DIR)/bin -lmlog endif +ifeq ($(FWK),1) +LD_FLAGS += ${FW_LIBS} +endif + +ifeq ($(WIRELESS_SDK_TOOLCHAIN),icx) +LD_FLAGS += -Wl,-lstdc++ +endif + AS_FLAGS := AR_FLAGS := rc -PROJECT_OBJ_DIR := build/obj +PROJECT_OBJ_DIR := $(BUILDDIR)/obj CC_OBJS := $(patsubst %.c,%.o,$(CC_SRC)) CPP_OBJS := $(patsubst %.cpp,%.o,$(CPP_SRC)) @@ -205,6 +279,7 @@ debug : all release : all $(PROJECT_BINARY): $(DIRLIST) echo_start_build $(GENERATE_DEPS) $(PRE_BUILD) $(CC_OBJTARGETS) $(CPP_OBJTARGETS) $(AS_OBJTARGETS) + @$(MD) $(BUILDDIR) @echo "[LD] $@ " @$(LD) -o $@ $(CC_OBJTARGETS) $(CPP_OBJTARGETS) $(AS_OBJTARGETS) $(LD_FLAGS) -Wl,-L $(BUILDDIR) -lrt -lpthread diff --git a/fhi_lib/app/dpdk.sh b/fhi_lib/app/dpdk.sh index 5ef548a..10f5f79 100755 --- a/fhi_lib/app/dpdk.sh +++ b/fhi_lib/app/dpdk.sh @@ -141,16 +141,20 @@ if [ ${VM_DETECT} == 'HOST' ]; then $RTE_SDK/usertools/dpdk-devbind.py --bind=vfio-pci 0000:19:02.0 $RTE_SDK/usertools/dpdk-devbind.py --bind=vfio-pci 0000:19:02.1 $RTE_SDK/usertools/dpdk-devbind.py --bind=vfio-pci 0000:19:02.2 + $RTE_SDK/usertools/dpdk-devbind.py --bind=vfio-pci 0000:19:02.3 $RTE_SDK/usertools/dpdk-devbind.py --bind=vfio-pci 0000:19:0a.0 $RTE_SDK/usertools/dpdk-devbind.py --bind=vfio-pci 0000:19:0a.1 $RTE_SDK/usertools/dpdk-devbind.py --bind=vfio-pci 0000:19:0a.2 + $RTE_SDK/usertools/dpdk-devbind.py --bind=vfio-pci 0000:19:0a.3 $RTE_SDK/usertools/dpdk-devbind.py --bind=vfio-pci 0000:af:02.0 $RTE_SDK/usertools/dpdk-devbind.py --bind=vfio-pci 0000:af:02.1 $RTE_SDK/usertools/dpdk-devbind.py --bind=vfio-pci 0000:af:02.2 + $RTE_SDK/usertools/dpdk-devbind.py --bind=vfio-pci 0000:af:02.3 $RTE_SDK/usertools/dpdk-devbind.py --bind=vfio-pci 0000:af:0a.0 $RTE_SDK/usertools/dpdk-devbind.py --bind=vfio-pci 0000:af:0a.1 $RTE_SDK/usertools/dpdk-devbind.py --bind=vfio-pci 0000:af:0a.2 + $RTE_SDK/usertools/dpdk-devbind.py --bind=vfio-pci 0000:af:0a.3 else #VM diff --git a/fhi_lib/app/gen_test.m b/fhi_lib/app/gen_test.m index 179a5b4..eb345b2 100644 --- a/fhi_lib/app/gen_test.m +++ b/fhi_lib/app/gen_test.m @@ -46,40 +46,40 @@ nNumRbsPerSymF2 = ... ]; % total number of tests -tests_total = 12 +tests_total = 15 tech_all = ... % 0 - NR 1- LTE [ - 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1 + 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 2, 2, 2 ] sub6_all = ... [ - true, true, true, true, false, true, true, true, true, true, true, true + true, true, true, true, false, true, true, true, true, true, true, true, true, true, true ] mu_all = ... [ - 0, 0, 0, 1, 3, 1, 0, 0, 0, 0, 0, 0 + 0, 0, 0, 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] bw_all = ... [ - 5, 10, 20, 100, 100, 100, 20, 10, 5, 20, 10, 5 + 5, 10, 20, 100, 100, 100, 20, 10, 5, 20, 10, 5, 20, 10, 5 ] ant_num_all = ... [ - 4, 4, 4, 4, 4, 8, 4, 4, 4, 8, 8, 8 + 4, 4, 4, 4, 4, 8, 4, 4, 4, 8, 8, 8, 4, 4, 4 ] bfw_gen_all = ... [ - false, false, false, false, false, true, false, false, false, true, true, true, + false, false, false, false, false, true, false, false, false, true, true, true, false, false, false ] trx_all = ... [ - 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32 + 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32 ] path_to_usecase_all = ... [ @@ -95,13 +95,16 @@ path_to_usecase_all = ... "./usecase/lte_b/mu0_20mhz/"; "./usecase/lte_b/mu0_10mhz/"; "./usecase/lte_b/mu0_5mhz/"; + "./usecase/dss/mu0_20mhz/"; + "./usecase/dss/mu0_10mhz/"; + "./usecase/dss/mu0_5mhz/"; ] path_to_usecase_all = cellstr(path_to_usecase_all) nSlots_all = ... [ - 20,20,20,20,20,20,20,20,20,10,10,10 + 20,20,20,20,20,20,20,20,20,10,10,10,20,20,20 ] %select mu and bw to generate test files diff --git a/fhi_lib/app/run_o_du.sh b/fhi_lib/app/run_o_du.sh index 0467d78..9743711 100755 --- a/fhi_lib/app/run_o_du.sh +++ b/fhi_lib/app/run_o_du.sh @@ -21,7 +21,8 @@ ulimit -c unlimited echo 1 > /proc/sys/kernel/core_uses_pid -./build/sample-app --usecasefile ./usecase/cat_b/mu1_100mhz/3301/usecase_du.cfg --num_eth_vfs 6 \ +./build/sample-app --usecasefile ./usecase/cat_b/mu1_100mhz/3301/usecase_du.cfg --num_eth_vfs 8 \ --vf_addr_o_xu_a "0000:51:01.0,0000:51:09.0" \ --vf_addr_o_xu_b "0000:51:11.0,0000:51:19.0" \ ---vf_addr_o_xu_c "0000:18:01.0,0000:18:09.0" +--vf_addr_o_xu_c "0000:18:01.0,0000:18:09.0" \ +--vf_addr_o_xu_d "0000:18:01.1,0000:18:09.1" diff --git a/fhi_lib/app/run_o_ru.sh b/fhi_lib/app/run_o_ru.sh index 924a1b6..513840d 100755 --- a/fhi_lib/app/run_o_ru.sh +++ b/fhi_lib/app/run_o_ru.sh @@ -21,7 +21,8 @@ ulimit -c unlimited echo 1 > /proc/sys/kernel/core_uses_pid -./build/sample-app --usecasefile ./usecase/cat_b/mu1_100mhz/3301/usecase_ru.cfg --num_eth_vfs 6 \ +./build/sample-app --usecasefile ./usecase/cat_b/mu1_100mhz/3301/usecase_ru.cfg --num_eth_vfs 8 \ --vf_addr_o_xu_a "0000:17:01.0,0000:17:09.0" \ --vf_addr_o_xu_b "0000:17:11.0,0000:17:19.0" \ ---vf_addr_o_xu_c "0000:65:01.0,0000:65:09.0" +--vf_addr_o_xu_c "0000:65:01.0,0000:65:09.0" \ +--vf_addr_o_xu_d "0000:65:01.1,0000:65:09.1" diff --git a/fhi_lib/app/src/app_bbu_main.c b/fhi_lib/app/src/app_bbu_main.c new file mode 100644 index 0000000..93d2897 --- /dev/null +++ b/fhi_lib/app/src/app_bbu_main.c @@ -0,0 +1,562 @@ +/****************************************************************************** +* +* Copyright (c) 2020 Intel. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +* +*******************************************************************************/ + +/** + * @brief This module provides implementation of BBU tasks for sample app + * @file app_bbu_main.c + * @ingroup xran + * @author Intel Corporation + * + **/ + +#define _GNU_SOURCE +#include +#include +#include +#include +#include +#include +#include +#include + + +#include "app_bbu_pool.h" +#include "app_io_fh_xran.h" +#include "xran_mlog_task_id.h" + +/** + * @file app_bbu_main.c + * @brief example pipeline code to use Enhanced BBUPool Framework +*/ + +uint32_t gRunCount = 0; +volatile uint32_t nStopFlag = 1; +int32_t gQueueCtxNum = 1; + +int32_t nSplitNumCell[EBBU_POOL_MAX_TEST_CELL]; + +int32_t nTestCell = 0; +int32_t nTestCore = 0; +volatile uint64_t ttistart = 0; +int32_t dl_ul_count, dl_count, ul_count; + +uint32_t gMaxSlotNum[MAX_PHY_INSTANCES]; +uint32_t gNumDLCtx[MAX_PHY_INSTANCES]; +uint32_t gNumULCtx[MAX_PHY_INSTANCES]; +uint32_t gNumDLBufferCtx[MAX_PHY_INSTANCES]; +uint32_t gNumULBufferCtx[MAX_PHY_INSTANCES]; +uint32_t gDLProcAdvance[MAX_PHY_INSTANCES]; +int32_t gULProcAdvance[MAX_PHY_INSTANCES]; + + +#define EX_FUNC_NUM 9 +int32_t exGenDlFunc[EX_FUNC_NUM] = +{ + DL_CONFIG, + DL_PDSCH_SCRM, +}; +int32_t exGenUlFunc[EX_FUNC_NUM] = +{ + UL_CONFIG, + UL_IQ_DECOMP2, + UL_IQ_DECOMP6, + UL_IQ_DECOMP11, + UL_IQ_DECOMP13, + UL_PRACH, + UL_PUSCH_TB +}; + +int32_t exGenAllFunc[EX_FUNC_NUM] = +{ + DL_CONFIG, + UL_CONFIG, + DL_PDSCH_SCRM, + UL_IQ_DECOMP2, + UL_IQ_DECOMP6, + UL_IQ_DECOMP11, + UL_IQ_DECOMP13, + UL_PRACH, + UL_PUSCH_TB +}; + +peBbuPoolCfgVarsStruct pCfg; +pthread_t tCtrlThread; +eBbuPoolHandler pHandler = NULL; +clock_t tStart, tEnd; +uint32_t ttiCell[EBBU_POOL_MAX_TEST_CELL] = {0}; +uint64_t ttiCountCell[EBBU_POOL_MAX_TEST_CELL] = {0UL}; +uint32_t frameFormatCell[EBBU_POOL_MAX_TEST_CELL] = {0}; +uint64_t tTTI = 0; + + +eBbuPoolHandler app_get_ebbu_pool_handler(void) +{ + return pHandler; +} + + +int32_t +app_bbu_dl_tti_call_back(void * param) +{ + int32_t ret = 0; + uint64_t t1 = MLogTick(); + int32_t iCell = 0; + int32_t nCtx[EBBU_POOL_MAX_TEST_CELL] = {0}, iExFunc = 0, eventId = 0; + int32_t *exGenFuncDl = NULL, *exGenFuncUl = NULL; + int32_t nFuncNumDl = 0, nFuncNumUl = 0; + uint8_t Numerlogy = app_io_xran_fh_config[0].frame_conf.nNumerology; + uint8_t nNrOfSlotInSf = 1<testCellNum; + + for (i = 0; i < p_use_cfg->oXuNum; i++) + nFh_cell += p_o_xu_cfg[i]->numCC; + + if (nFh_cell != nTestCell) { + rte_panic("WARNING: miss match between BBU Cells (%d) and O-RAN FH Cells (%d)", nTestCell, nFh_cell); + } + + if(nTestCell > EBBU_POOL_MAX_TEST_CELL || nTestCell <= 0) + { + printf("Wrong cell num %d\n",nTestCell); + nTestCell = 0; + } + nTestCore = pCfg->testCoreNum; + if(nTestCore > EBBU_POOL_MAX_TEST_CORE || nTestCore <= 0) + { + printf("Wrong core num %d\n",nTestCore); + nTestCore = 0; + } + + gRunCount = 0; + + printf("Test cell %d, test total core num %d, test slots %d\n", nTestCell, nTestCore, gRunCount); + + // Step 1: create Framework handler + ebbu_pool_create_handler(&pHandler, 1, pCfg->mainThreadCoreId); + if(NULL == pHandler) + { + printf("\nFail to init Framework!"); + exit(-1); + } + + // Step 2: create priority queues + // Assume 3 queues + uint32_t nPrioQueue = pCfg->queueNum; + uint32_t nQueueSize = pCfg->queueDepth; + uint32_t pPrioQueueSize[8] = {nQueueSize, nQueueSize, nQueueSize, nQueueSize,nQueueSize, nQueueSize, nQueueSize, nQueueSize}; + QueueConfigStruct sQueueConfig; + sQueueConfig.pQueueDepth = pPrioQueueSize; + sQueueConfig.nPriQueueNum = nPrioQueue; + sQueueConfig.nPriQueueCtxNum = pCfg->ququeCtxNum; + sQueueConfig.nPriQueueCtxMaxFetch = pCfg->ququeCtxNum; + + ebbu_pool_create_queues(pHandler, sQueueConfig); + + ebbu_pool_queue_ctx_set_threshold(pHandler, 2*nTestCell); + + // Step 3: create one report for Framework + ReportCfg sReport; + sReport.nEventHoldNum = 2000; + sReport.pHandler = (void *)pHandler; + ebbu_pool_create_report(sReport); + + // Step 4: start control thread + // pthread_create(&tCtrlThread, NULL, controlThread, (void *)pHandler); + + peBbuPoolCfgVarsStruct pCfg = ebbu_pool_cfg_get_ctx(); + int32_t iCell = 0; + int32_t iCtx = 0; + uint32_t xran_timer = (1000/(1 << p_o_xu_cfg[0]->mu_number)); /* base on O-RU 0 */ + + printf("xran_timer for TTI [%d] us\n", xran_timer); + // Init base timing as per xran_timer + uint64_t tStart = ebbu_pool_tick(); + usleep(xran_timer); + tTTI = ebbu_pool_tick() - tStart; + + // cell specific TTI init + // create cell and create consumer thread + // set events num per cell + for(iCell = 0; iCell < nTestCell; iCell ++) + { + ttiCell[iCell] = pCfg->sTestCell[iCell].tti/xran_timer; + printf("\nttiCell[%d] %d", iCell, ttiCell[iCell]); + + frameFormatCell[iCell] = pCfg->sTestCell[iCell].frameFormat; + if(frameFormatCell[iCell] >= EBBU_POOL_MAX_FRAME_FORMAT) + frameFormatCell[iCell] = 0; + + for(iCtx = 0; iCtx < MAX_TEST_CTX; iCtx ++) + { + event_chain_gen(&gEventChain[iCell][iCtx]); + } + nSplitNumCell[iCell] = 1;//((pCfg->sTestCell[iCell].eventPerTti)-11)/18; //current event chain has 29 events, 19 of them can be split + printf("\nnSplitNumCell[%d] %d", iCell, nSplitNumCell[iCell]); + if(nSplitNumCell[iCell] > MAX_TEST_SPLIT_NUM) + nSplitNumCell[iCell] = MAX_TEST_SPLIT_NUM; + + } + test_buffer_create(); + + // add consumer thread + + /*int32_t corePool[EBBU_POOL_MAX_TEST_CORE] = {4,24,5,25,6,26,7,27, + 8,28,9,29,10,30,11,31, + 12,32,13,33,14,34,15,35, + 16,36,17,37,18,38,19,39, + 2,22,3,23}; + */ + + int32_t iCore = 0; + uint64_t nMask0 = 0UL, nMask1 = 0UL; + uint32_t iCoreIdx = 0; + uint64_t nCoreMask[EBBUPOOL_MAX_CORE_MASK]; + + for(; iCore < nTestCore; iCore ++) + { + iCoreIdx = pCfg->testCoreList[iCore]; + if(iCoreIdx < 64) + nMask0 |= 1UL << iCoreIdx; + else + nMask1 |= 1UL << iCoreIdx; + + } + //printf("\nnStartMask %016lx\n", nStartMask); + + nActiveCoreMask[0] = nCoreMask[0] = nMask0; + nActiveCoreMask[0] = nCoreMask[1] = nMask1; + nActiveCoreMask[0] = nCoreMask[2] = 0; + nActiveCoreMask[0] = nCoreMask[3] = 0; + + ebbu_pool_consumer_set_thread_params(pHandler, 55, SCHED_FIFO, pCfg->sleepFlag); + ebbu_pool_consumer_set_thread_mask(pHandler, nCoreMask); + + usleep(100000); + + /* mMIMO with 64TRX */ + for(iCell = 0; iCell < nTestCell; iCell ++) { + + gDLProcAdvance[iCell] = DL_PROC_ADVANCE_MU1; + gULProcAdvance[iCell] = UL_PROC_ADVANCE_MU1; + gNumDLCtx[iCell] = 5; + gNumDLBufferCtx[iCell] = 3; + gNumULCtx[iCell] = 8; + gNumULBufferCtx[iCell] = 2; + gMaxSlotNum[iCell] = 10240 * (1 << p_o_xu_cfg[0]->mu_number); + } + + return 0; +} + +int32_t app_bbu_close(void) +{ + // Close Mlog Buffer and write to File + // if(pCfg->mlogEnable) + // MLogPrint(NULL); + + // Step 5: release all the threads + ebbu_pool_release_threads(pHandler); + + // Step 6: get report for Framework + int32_t testResult = ebbu_pool_status_report(pHandler); + // Save the test status, 0 means pass, other means fail + char resultString[8] = {'\0'}; + if(testResult == 0) + sprintf(resultString, "PASS"); + else + sprintf(resultString, "FAIL"); + + tEnd = clock(); + + char fResultName[64] = {"sample-app_bbu_pool_test_results.txt"}; + FILE *pFile = fopen(fResultName, "a"); + if(pFile != NULL) + { + fprintf(pFile, "sample-app test case\n"); + fprintf(pFile, "Execution time: %.3f second\n", (double)(tEnd - tStart)/1000000); + fprintf(pFile, "Result: %s\n\n", resultString); + fclose(pFile); + } + + // Step 7: release report for Framework + ebbu_pool_release_report(pHandler); + + // Step 8: release all allocated queues + ebbu_pool_release_queues(pHandler); + + // Step 9: release handler for Framework + ebbu_pool_release_handler(&pHandler); + printf("\n"); + + return 0; +} + +void +app_io_xran_fh_bbu_rx_callback(void *pCallbackTag, xran_status_t status) +{ + eBbuPoolHandler pHandler = app_get_ebbu_pool_handler(); + uint64_t t1 = MLogTick(); + uint32_t mlogVar[10]; + uint32_t mlogVarCnt = 0; + int32_t nCellIdx; + int32_t nCcIdx; + int32_t sym, nSlotIdx, ntti; + uint64_t mlog_start; + struct xran_cb_tag *pTag = (struct xran_cb_tag *) pCallbackTag; + int32_t o_xu_id = pTag->oXuId; + struct xran_io_shared_ctrl *psIoCtrl = app_io_xran_if_ctrl_get(o_xu_id); + struct bbu_xran_io_if *psXranIoIf = app_io_xran_if_get(); + struct xran_fh_config *pXranConf = &app_io_xran_fh_config[o_xu_id]; + uint32_t xran_max_antenna_nr = RTE_MAX(pXranConf->neAxc, pXranConf->neAxcUl); + uint32_t ant_id, sym_id, idxElm; + struct xran_prb_map *pRbMap = NULL; + struct xran_prb_elm *pRbElm = NULL; + + mlog_start = MLogTick(); + nCcIdx = pTag->cellId; + nCellIdx = psXranIoIf->map_cell_id2port[o_xu_id][nCcIdx]; + nSlotIdx = pTag->slotiId; ///((status >> 16) & 0xFFFF); /** TTI aka slotIdx */ + sym = pTag->symbol & 0xFF; /* sym */ + ntti = (nSlotIdx + XRAN_N_FE_BUF_LEN-1) % XRAN_N_FE_BUF_LEN; + + { + mlogVar[mlogVarCnt++] = 0xbcbcbcbc; + mlogVar[mlogVarCnt++] = o_xu_id; + mlogVar[mlogVarCnt++] = nCellIdx; + mlogVar[mlogVarCnt++] = sym; + mlogVar[mlogVarCnt++] = nSlotIdx; + mlogVar[mlogVarCnt++] = ntti; + //mlogVar[mlogVarCnt++] = nSlotIdx % gNumSlotPerSfn[nCellIdx]; + //mlogVar[mlogVarCnt++] = get_slot_type(nCellIdx, nSlotIdx, SLOT_TYPE_UL); + + MLogAddVariables(mlogVarCnt, mlogVar, mlog_start); + } + + if(psIoCtrl == NULL) + { + printf("psIoCtrl NULL! o_xu_id= %d\n", o_xu_id); + return; + } + + if (sym == XRAN_ONE_FOURTHS_CB_SYM) { + // 1/4 of slot + test_func_gen(pHandler, nCellIdx, nSlotIdx, SYM2_WAKE_UP); + } else if (sym == XRAN_HALF_CB_SYM) { + // First Half + test_func_gen(pHandler, nCellIdx, nSlotIdx, SYM6_WAKE_UP); + } else if (sym == XRAN_THREE_FOURTHS_CB_SYM) { + // 2/4 of slot + test_func_gen(pHandler, nCellIdx, nSlotIdx, SYM11_WAKE_UP); + } else if (sym == XRAN_FULL_CB_SYM) { + // Second Half + test_func_gen(pHandler, nCellIdx, nSlotIdx, SYM13_WAKE_UP); + } else { + /* error */ + MLogTask(PID_GNB_SYM_CB, t1, MLogTick()); + + rte_panic("app_io_xran_fh_bbu_rx_callback: sym\n"); + return; + } + + if(sym == XRAN_FULL_CB_SYM) //full slot callback only + { + for(ant_id = 0; ant_id < xran_max_antenna_nr; ant_id++) { + pRbMap = (struct xran_prb_map *) psIoCtrl->sFrontHaulRxPrbMapBbuIoBufCtrl[ntti][nCcIdx][ant_id].sBufferList.pBuffers->pData; + if(pRbMap == NULL){ + printf("(%d:%d:%d)pRbMap == NULL\n", nCcIdx, ntti, ant_id); + exit(-1); + } + for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) { + for(idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++ ) { + pRbElm = &pRbMap->prbMap[idxElm]; + pRbElm->nSecDesc[sym_id] = 0; + } + } + } + } + + rte_pause(); + + MLogTask(PCID_GNB_FH_RX_DATA_CC0+nCellIdx, mlog_start, MLogTick()); + return; +} + +void +app_io_xran_fh_bbu_rx_prach_callback(void *pCallbackTag, xran_status_t status) +{ + eBbuPoolHandler pHandler = app_get_ebbu_pool_handler(); + int32_t nCellIdx, nCcIdx; + int32_t sym, nSlotIdx, ntti; + struct xran_cb_tag *pTag = (struct xran_cb_tag *) pCallbackTag; + int32_t o_xu_id = pTag->oXuId; + uint64_t mlog_start = MLogTick(); + uint32_t mlogVar[10]; + struct bbu_xran_io_if *psXranIoIf = app_io_xran_if_get(); + struct xran_io_shared_ctrl *psIoCtrl = app_io_xran_if_ctrl_get(o_xu_id); + uint32_t mlogVarCnt = 0; + + if(psIoCtrl == NULL || psXranIoIf == NULL) + { + printf("psIoCtrl NULL! o_xu_id= %d\n", o_xu_id); + return; + } + + nCcIdx = pTag->cellId; + nCellIdx = psXranIoIf->map_cell_id2port[o_xu_id][nCcIdx]; + nSlotIdx = pTag->slotiId; ///((status >> 16) & 0xFFFF); /** TTI aka slotIdx */ + sym = pTag->symbol & 0xFF; /* sym */ + ntti = (nSlotIdx + XRAN_N_FE_BUF_LEN-1) % XRAN_N_FE_BUF_LEN; + + mlogVar[mlogVarCnt++] = 0xDDDDDDDD; + mlogVar[mlogVarCnt++] = o_xu_id; + mlogVar[mlogVarCnt++] = nCellIdx; + mlogVar[mlogVarCnt++] = sym; + mlogVar[mlogVarCnt++] = nSlotIdx; + mlogVar[mlogVarCnt++] = ntti; + MLogAddVariables(mlogVarCnt, mlogVar, MLogTick()); + test_func_gen(pHandler, nCellIdx, nSlotIdx, PRACH_WAKE_UP); + + MLogTask(PCID_GNB_FH_RX_PRACH_CC0+nCellIdx, mlog_start, MLogTick()); +} + +void +app_io_xran_fh_bbu_rx_srs_callback(void *pCallbackTag, xran_status_t status) +{ + eBbuPoolHandler pHandler = app_get_ebbu_pool_handler(); + int32_t nCellIdx; + int32_t nCcIdx; + int32_t sym, nSlotIdx, ntti; + struct xran_cb_tag *pTag = (struct xran_cb_tag *) pCallbackTag; + int32_t o_xu_id = pTag->oXuId; + struct xran_io_shared_ctrl *psIoCtrl = app_io_xran_if_ctrl_get(o_xu_id); + struct bbu_xran_io_if *psXranIoIf = app_io_xran_if_get(); + struct xran_fh_config *pXranConf = &app_io_xran_fh_config[o_xu_id]; + uint32_t xran_max_antenna_nr = RTE_MAX(pXranConf->neAxc, pXranConf->neAxcUl); + uint32_t xran_max_ant_array_elm_nr = RTE_MAX(pXranConf->nAntElmTRx, xran_max_antenna_nr); + uint32_t ant_id, sym_id, idxElm; + struct xran_prb_map *pRbMap = NULL; + struct xran_prb_elm *pRbElm = NULL; + uint64_t mlog_start = MLogTick(); + uint32_t mlogVar[10]; + uint32_t mlogVarCnt = 0; + + if(psIoCtrl == NULL || psXranIoIf == NULL) + { + printf("psIoCtrl NULL! o_xu_id= %d\n", o_xu_id); + return; + } + nCcIdx = pTag->cellId; + nCellIdx = psXranIoIf->map_cell_id2port[o_xu_id][nCcIdx]; + nSlotIdx = pTag->slotiId; ///((status >> 16) & 0xFFFF); /** TTI aka slotIdx */ + sym = pTag->symbol & 0xFF; /* sym */ + ntti = (nSlotIdx + XRAN_N_FE_BUF_LEN-1) % XRAN_N_FE_BUF_LEN; + + mlogVar[mlogVarCnt++] = 0xCCCCCCCC; + mlogVar[mlogVarCnt++] = o_xu_id; + mlogVar[mlogVarCnt++] = nCellIdx; + mlogVar[mlogVarCnt++] = sym; + mlogVar[mlogVarCnt++] = nSlotIdx; + mlogVar[mlogVarCnt++] = ntti; + MLogAddVariables(mlogVarCnt, mlogVar, MLogTick()); + test_func_gen(pHandler, nCellIdx, nSlotIdx, SRS_WAKE_UP); + + if(sym == XRAN_FULL_CB_SYM) //full slot callback only + { + for(ant_id = 0; ant_id < xran_max_ant_array_elm_nr; ant_id++) { + pRbMap = (struct xran_prb_map *) psIoCtrl->sFHSrsRxPrbMapBbuIoBufCtrl[ntti][nCcIdx][ant_id].sBufferList.pBuffers->pData; + if(pRbMap == NULL){ + printf("(%d:%d:%d)pRbMap == NULL\n", nCcIdx, ntti, ant_id); + exit(-1); + } + for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) { + for(idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++ ) { + pRbElm = &pRbMap->prbMap[idxElm]; + pRbElm->nSecDesc[sym_id] = 0; + } + } + } + } + MLogTask(PCID_GNB_FH_RX_SRS_CC0+nCellIdx, mlog_start, MLogTick()); +} diff --git a/fhi_lib/app/src/app_bbu_pool.c b/fhi_lib/app/src/app_bbu_pool.c new file mode 100644 index 0000000..fd897c0 --- /dev/null +++ b/fhi_lib/app/src/app_bbu_pool.c @@ -0,0 +1,625 @@ +/****************************************************************************** +* +* Copyright (c) 2020 Intel. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +* +*******************************************************************************/ + +/** + * @brief This module provides implementation of BBU tasks for sample app + * @file app_bbu.c + * @ingroup xran + * @author Intel Corporation + * + **/ + +#include +#include +#include +#include +#include +#include +#include + +#include "app_bbu_pool.h" + +/** + * @file gnb_main_ebbu_pool.c + * @brief example pipeline code to use Enhanced BBUPool Framework +*/ + +extern int32_t gQueueCtxNum; +extern int32_t nSplitNumCell[EBBU_POOL_MAX_TEST_CELL]; + +int32_t test_func_A(void *pCookies); +int32_t test_func_B(void *pCookies); +int32_t test_func_C(void *pCookies); + +void test_pre_func_A(uint32_t nSubframe, uint16_t nCellIdx, TaskPreGen *pPara); +void test_pre_func_B(uint32_t nSubframe, uint16_t nCellIdx, TaskPreGen *pPara); + +int32_t test_func_gen(eBbuPoolHandler pHandler, int32_t nCell, int32_t nSlot, int32_t eventId); + +int32_t simulate_traffic(void *pCookies, int32_t testCount); + +typedef enum +{ + CAT_A = 0, //directly execute + CAT_B, //highest priority + CAT_C, //first priority + CAT_D, //second priority + CAT_E, //third priority + CAT_F, //forth priority + CAT_G, //fifth priority + CAT_H, //sixth priority + CAT_I, //seventh priority + CAT_NUM +} EventCatEnum; + +static int32_t eventSendDic[CAT_NUM] = +{ + EBBUPOOL_PRIO_EXECUTE, + EBBUPOOL_PRIO_HIGHEST, + EBBUPOOL_PRIO_ONE, + EBBUPOOL_PRIO_TWO, + EBBUPOOL_PRIO_THREE, + EBBUPOOL_PRIO_FOUR, + EBBUPOOL_PRIO_FIVE, + EBBUPOOL_PRIO_SIX, + EBBUPOOL_PRIO_SEVEN +}; + +EventConfigStruct testEventTable[MAX_TASK_NUM_G_NB] = +{ + /* Event ID*/ /* Event Name*/ /* pri */ /* event function */ /* pre event function */ /* nExtEvent */ /*prefetch flag */ /*core mask type */ /* core affinity 0~63 */ /* core affinity 64~127 */ + { TTI_START, EVENT_NAME(TTI_START), CAT_B, test_func_A, NULL, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { SYM2_WAKE_UP, EVENT_NAME(SYM2_WAKE_UP), CAT_B, app_bbu_pool_task_sym2_wakeup, NULL, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { SYM6_WAKE_UP, EVENT_NAME(SYM6_WAKE_UP), CAT_B, app_bbu_pool_task_sym6_wakeup, NULL, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { SYM11_WAKE_UP, EVENT_NAME(SYM11_WAKE_UP), CAT_B, app_bbu_pool_task_sym11_wakeup, NULL, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { SYM13_WAKE_UP, EVENT_NAME(SYM13_WAKE_UP), CAT_B, app_bbu_pool_task_sym13_wakeup, NULL, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { PRACH_WAKE_UP, EVENT_NAME(PRACH_WAKE_UP), CAT_B, app_bbu_pool_task_prach_wakeup, NULL, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { SRS_WAKE_UP, EVENT_NAME(SRS_WAKE_UP), CAT_B, app_bbu_pool_task_srs_wakeup, NULL, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { DL_CONFIG, EVENT_NAME(DL_CONFIG), CAT_B, app_bbu_pool_task_dl_config,app_bbu_pool_pre_task_dl_cfg, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { DL_PDSCH_TB, EVENT_NAME(DL_PDSCH_TB), CAT_B, test_func_A, test_pre_func_B, 0, 0, 0, 0x000000ffffffffff, 0xfffffffffffffff}, + { DL_PDSCH_SCRM, EVENT_NAME(DL_PDSCH_SCRM), CAT_C, test_func_A, NULL, 0, 0, 0, 0x000000ffffffffff, 0xfffffffffffffff}, + { DL_PDSCH_SYM, EVENT_NAME(DL_PDSCH_SYM), CAT_C, test_func_B, test_pre_func_A, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { DL_PDSCH_RS, EVENT_NAME(DL_PDSCH_RS), CAT_C, test_func_A, test_pre_func_B, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { DL_CTRL, EVENT_NAME(DL_CTRL), CAT_C, test_func_A, test_pre_func_B, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { UL_CONFIG, EVENT_NAME(UL_CONFIG), CAT_C, app_bbu_pool_task_ul_config,app_bbu_pool_pre_task_ul_cfg, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { UL_IQ_DECOMP2, EVENT_NAME(UL_IQ_DECOMP2), CAT_D, test_func_A, NULL, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { UL_IQ_DECOMP6, EVENT_NAME(UL_IQ_DECOMP6), CAT_D, test_func_A, NULL, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { UL_IQ_DECOMP11, EVENT_NAME(UL_IQ_DECOMP11), CAT_D, test_func_A, NULL, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { UL_IQ_DECOMP13, EVENT_NAME(UL_IQ_DECOMP13), CAT_D, test_func_A, NULL, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { UL_PUSCH_CE0, EVENT_NAME(UL_PUSCH_CE0), CAT_D, test_func_B, test_pre_func_A, 0, 0, 0, 0x000000ffffffffff, 0xfffffffffffffff}, + { UL_PUSCH_CE7, EVENT_NAME(UL_PUSCH_CE7), CAT_D, test_func_B, test_pre_func_A, 0, 0, 0, 0x000000ffffffffff, 0xfffffffffffffff}, + { UL_PUSCH_EQL0, EVENT_NAME(UL_PUSCH_EQL0), CAT_D, test_func_B, test_pre_func_A, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { UL_PUSCH_EQL7, EVENT_NAME(UL_PUSCH_EQL7), CAT_D, test_func_B, test_pre_func_A, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { UL_PUSCH_LLR, EVENT_NAME(UL_PUSCH_LLR), CAT_C, test_func_A, test_pre_func_B, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { UL_PUSCH_DEC, EVENT_NAME(UL_PUSCH_DEC), CAT_C, test_func_A, test_pre_func_B, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { UL_PUSCH_TB, EVENT_NAME(UL_PUSCH_TB), CAT_C, test_func_A, NULL, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { UL_PUCCH, EVENT_NAME(UL_PUCCH), CAT_E, test_func_A, test_pre_func_A, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { UL_PRACH, EVENT_NAME(UL_PRACH), CAT_E, test_func_A, NULL, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { UL_SRS_DECOMP, EVENT_NAME(UL_SRS_DECOMP), CAT_E, test_func_A, test_pre_func_B, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { UL_SRS_CE, EVENT_NAME(UL_SRS_CE), CAT_E, test_func_B, test_pre_func_B, 0, 0, 0, 0x000000ffffffffff, 0xfffffffffffffff}, + { UL_SRS_POST, EVENT_NAME(UL_SRS_POST), CAT_E, test_func_A, test_pre_func_B, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { DL_POST, EVENT_NAME(DL_POST), CAT_B, app_bbu_pool_task_dl_post, app_bbu_pool_pre_task_dl_post, 0, 1, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { UL_POST, EVENT_NAME(UL_POST), CAT_A, test_func_C, NULL, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { DL_BEAM_GEN, EVENT_NAME(DL_BEAM_GEN), CAT_D, test_func_B, test_pre_func_B, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { DL_BEAM_TX, EVENT_NAME(DL_BEAM_TX), CAT_D, test_func_A, test_pre_func_B, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { UL_BEAM_GEN, EVENT_NAME(UL_BEAM_GEN), CAT_D, test_func_B, test_pre_func_B, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, + { UL_BEAM_TX, EVENT_NAME(UL_BEAM_TX), CAT_D, test_func_A, test_pre_func_B, 0, 0, 0, 0x00ffffffffffffff, 0xfffffffffffffff}, +}; + +int32_t gNBNextTaskMap[MAX_TASK_NUM_G_NB][MAX_NEXT_TASK_NUM] = +{ + // TTI_START + {-1, -1, -1, -1, -1, -1, -1, -1}, + + // SYM2_WAKE_UP + {-1, -1, -1, -1, -1, -1, -1, -1}, + + // SYM6_WAKE_UP + {-1, -1, -1, -1, -1, -1, -1, -1}, + + // SYM11_WAKE_UP + {-1, -1, -1, -1, -1, -1, -1, -1}, + + // SYM13_WAKE_UP + {-1, -1, -1, -1, -1, -1, -1, -1}, + + // PRACH_WAKE_UP + {-1, -1, -1, -1, -1, -1, -1, -1}, + + // SRS_WAKE_UP + {-1, -1, -1, -1, -1, -1, -1, -1}, + + // DL_CONFIG + {DL_PDSCH_TB, DL_CTRL, DL_PDSCH_RS, DL_BEAM_GEN, -1, -1, -1, -1}, + + // DL_PDSCH_TB + {DL_PDSCH_SCRM, -1, -1, -1, -1, -1, -1, -1}, + + // DL_PDSCH_SCRM + {DL_PDSCH_SYM, -1, -1, -1, -1, -1, -1, -1}, + + // DL_PDSCH_SYM + {DL_POST, -1, -1, -1, -1, -1, -1, -1}, + + // DL_PDSCH_RS + {DL_PDSCH_SYM, -1, -1, -1, -1, -1, -1, -1}, + + // DL_CTRL + {DL_POST, -1, -1, -1, -1, -1, -1, -1}, + + // UL_CONFIG + {UL_IQ_DECOMP2, UL_IQ_DECOMP6, UL_IQ_DECOMP11, UL_IQ_DECOMP13, UL_PUCCH, UL_PRACH, UL_SRS_DECOMP, UL_BEAM_GEN}, + + // UL_IQ_DECOMP2 + {UL_PUSCH_CE0, UL_PUSCH_CE7, -1, -1, -1, -1, -1, -1}, + + // UL_IQ_DECOMP6 + {UL_PUSCH_EQL0, UL_PUSCH_EQL7, -1, -1, -1, -1, -1, -1}, + + // UL_IQ_DECOMP11 + {UL_PUSCH_CE7, -1, -1, -1, -1, -1, -1, -1}, + + // UL_IQ_DECOMP13 + {UL_PUSCH_EQL7, UL_PUCCH, UL_SRS_DECOMP, -1, -1, -1, -1, -1}, + + // UL_PUSCH_CE0 + {UL_PUSCH_EQL0, UL_PUSCH_EQL7, -1, -1, -1, -1, -1, -1}, + + // UL_PUSCH_CE7 + {UL_PUSCH_EQL7, -1, -1, -1, -1, -1, -1, -1}, + + // UL_PUSCH_EQL0 + {UL_PUSCH_LLR, -1, -1, -1, -1, -1, -1, -1}, + + // UL_PUSCH_EQL7 + {UL_PUSCH_LLR, -1, -1, -1, -1, -1, -1, -1}, + + // UL_PUSCH_LLR + {UL_PUSCH_DEC, -1, -1, -1, -1, -1, -1, -1}, + + // UL_PUSCH_DEC + {UL_PUSCH_TB, -1, -1, -1, -1, -1, -1, -1}, + + // UL_PUSCH_TB + {UL_POST, -1, -1, -1, -1, -1, -1, -1}, + + // UL_PUCCH + {UL_POST, -1, -1, -1, -1, -1, -1, -1}, + + // UL_PRACH + {UL_POST, -1, -1, -1, -1, -1, -1, -1}, + + // UL_SRS_DECOMP + {UL_SRS_CE, -1, -1, -1, -1, -1, -1, -1}, + + // UL_SRS_CE + {UL_SRS_POST, -1, -1, -1, -1, -1, -1, -1}, + + // UL_SRS_POST + {UL_POST, -1, -1, -1, -1, -1, -1, -1}, + + // DL_POST + {-1, -1, -1, -1, -1, -1, -1, -1}, + + // UL_POST + {-1, -1, -1, -1, -1, -1, -1, -1}, + + // DL_BEAM_GEN + {DL_BEAM_TX, -1, -1, -1, -1, -1, -1, -1}, + + // DL_BEAM_TX + {DL_POST, -1, -1, -1, -1, -1, -1, -1}, + + // UL_BEAM_GEN + {UL_BEAM_TX, -1, -1, -1, -1, -1, -1, -1}, + + // UL_BEAM_TX + {UL_POST, -1, -1, -1, -1, -1, -1, -1}, +}; + +__attribute__((aligned(IA_ALIGN))) EventCtrlStruct gEventCtrl[EBBU_POOL_MAX_TEST_CELL][MAX_TEST_CTX][MAX_TASK_NUM_G_NB][MAX_TEST_SPLIT_NUM]; +static __attribute__((aligned(IA_ALIGN))) EventStruct gEvent[EBBU_POOL_MAX_TEST_CELL][MAX_TEST_CTX][MAX_TASK_NUM_G_NB][MAX_TEST_SPLIT_NUM]; +__attribute__((aligned(IA_ALIGN))) EventChainDescStruct gEventChain[EBBU_POOL_MAX_TEST_CELL][MAX_TEST_CTX]; +static SampleSplitStruct gsSampleSplit[EBBU_POOL_MAX_TEST_CELL][MAX_TEST_CTX][MAX_TEST_SPLIT_NUM]; + +static uint64_t dl_start_mlog[EBBU_POOL_MAX_TEST_CELL][MAX_TEST_CTX]; +static uint64_t ul_start_mlog[EBBU_POOL_MAX_TEST_CELL][MAX_TEST_CTX]; +extern volatile uint64_t ttistart; +extern int32_t dl_ul_count, dl_count, ul_count; +int32_t test_buffer_create() +{ + int32_t iCell, iCtx, iTask, iSplit; + for(iCell = 0; iCell < EBBU_POOL_MAX_TEST_CELL; iCell ++) + for(iCtx = 0; iCtx < MAX_TEST_CTX; iCtx ++) + for(iTask = 0; iTask < MAX_TASK_NUM_G_NB; iTask ++) + for(iSplit = 0; iSplit < MAX_TEST_SPLIT_NUM; iSplit ++) + gEventCtrl[iCell][iCtx][iTask][iSplit].dummy0 = (float *)_mm_malloc(sizeof(float), IA_ALIGN); + return 0; +} + +int32_t event_chain_gen(EventChainDescStruct *psEventChain) +{ + /*Construct the next event chain by copying existing array */ + psEventChain->eventChainDepth = MAX_TASK_NUM_G_NB; + memcpy((void *)psEventChain->nextEventChain, (void *)gNBNextTaskMap, sizeof(gNBNextTaskMap)); + //printf("\nCopy gNBNextTaskMap with size %d", sizeof(gNBNextTaskMap)); + memset((void *)&psEventChain->nextEventCount, 0 , sizeof(psEventChain->nextEventCount)); + memset((void *)&psEventChain->preEventCount, 0 , sizeof(psEventChain->preEventCount)); + memset((void *)&psEventChain->preEventStat, 0 , sizeof(psEventChain->preEventStat)); + + /*For each event, find all preceding dependent event */ + int32_t iEvent = 0; + int32_t iNext = 0; + + /* Set the external event Wakeup Dependencies (apart from Task Dependency) */ + for(iEvent = 0; iEvent < MAX_TASK_NUM_G_NB; iEvent++) + { + psEventChain->preEventCountSave[iEvent] = testEventTable[iEvent].nWakeOnExtrernalEvent; + } + + for(iEvent = 0; iEvent < MAX_TASK_NUM_G_NB; iEvent ++) + { + for(iNext = 0; iNext < MAX_NEXT_TASK_NUM; iNext ++) + { + if(psEventChain->nextEventChain[iEvent][iNext] != -1) + { + psEventChain->preEventCountSave[psEventChain->nextEventChain[iEvent][iNext]] ++; + psEventChain->nextEventCount[iEvent] ++; + } + } + } + + /* + for(iEvent = 0; iEvent < MAX_TASK_NUM_G_NB; iEvent ++) + { + printf("\nEvent %d preEvent %d",iEvent,psEventChain->preEventCount[iEvent]); + } + */ + return 0; +} + +int32_t event_chain_reset(EventChainDescStruct *psEventChain) +{ + memset((void *)&psEventChain->preEventStat, 0 , sizeof(psEventChain->preEventStat)); + + /*For each event, find all preceding dependent event */ + int32_t iEvent = 0; + + /* Set the external event Wakeup Dependencies (apart from Task Dependency) */ + for(iEvent = 0; iEvent < MAX_TASK_NUM_G_NB; iEvent++) + { + psEventChain->preEventCount[iEvent] = psEventChain->preEventCountSave[iEvent]; + } + return 0; +} + +static void set_event_info(EventCtrlStruct *pEvenCtrl, int32_t eventId, + int32_t iSplit, EventSendStruct *psEventSend) +{ + int32_t nCell = pEvenCtrl->nCellIdx; + int32_t nSlot = pEvenCtrl->nSlotIdx; + int32_t nCtx = nSlot % MAX_TEST_CTX; + int32_t nQueueCtxNum = nSlot % gQueueCtxNum; + EventStruct * pEvent = &gEvent[nCell][nCtx][eventId][iSplit]; + pEvent->pEventFunc = testEventTable[eventId].pEventFunc; + pEvent->pEventArgs = pEvenCtrl; + pEvent->nEventId = eventId; + pEvent->nEventSentTime = ebbu_pool_tick(); + pEvent->nEventSentTimeMlog = MLogTick(); + pEvent->nEventAliveTime = 10000000; + pEvent->nCoreAffinityMask = _mm256_set_epi64x(0,0,testEventTable[eventId].nCoreMask1,testEventTable[eventId].nCoreMask0); + pEvent->nEventStatus = EBBUPOOL_EVENT_VALID; + + psEventSend->eDisposFlag = EBBUPOOL_NON_DISPOSABLE; + + psEventSend->ePrioCat = eventSendDic[testEventTable[eventId].nEventPrio]; + psEventSend->nQueueCtx = 0; + if(gQueueCtxNum > 1) + psEventSend->nQueueCtx = nQueueCtxNum; + + psEventSend->psEventStruct[0] = pEvent; + psEventSend->nEventNum = 1; + + psEventSend->nPreFlag = testEventTable[eventId].nPrefetchFlag; + + return; +} + +static void set_split_event_info(EventCtrlStruct *pEvenCtrl, int32_t eventId, + int32_t nSplit, EventSendStruct *psEventSend) +{ + int32_t nCell = pEvenCtrl[0].nCellIdx; + int32_t nSlot = pEvenCtrl[0].nSlotIdx; + int32_t nCtx = nSlot % MAX_TEST_CTX; + int32_t nQueueCtxNum = nSlot % gQueueCtxNum; + int32_t iSplit = 0; + for(; iSplit < nSplit; iSplit ++) + { + EventStruct *pEvent = &gEvent[nCell][nCtx][eventId][iSplit]; + pEvent->pEventFunc = testEventTable[eventId].pEventFunc; + pEvent->pEventArgs = &pEvenCtrl[iSplit]; + pEvent->nEventId = eventId; + pEvent->nEventSentTime = ebbu_pool_tick(); + pEvent->nEventSentTimeMlog = MLogTick(); + pEvent->nEventAliveTime = 10000000; + pEvent->nCoreAffinityMask = _mm256_set_epi64x(0,0,testEventTable[eventId].nCoreMask1,testEventTable[eventId].nCoreMask0); + pEvent->nEventStatus = EBBUPOOL_EVENT_VALID; + psEventSend->psEventStruct[iSplit] = pEvent; + } + pEvenCtrl[0].tSendTime = MLogTick(); + psEventSend->eDisposFlag = EBBUPOOL_DISPOSABLE; + psEventSend->ePrioCat = eventSendDic[testEventTable[eventId].nEventPrio]; + psEventSend->nQueueCtx = 0; + if(gQueueCtxNum > 1) + psEventSend->nQueueCtx = nQueueCtxNum; + psEventSend->nEventNum = nSplit; + psEventSend->nPreFlag = testEventTable[eventId].nPrefetchFlag; + + return; +} + +int32_t next_event_unlock(void *pCookies) +{ + EventCtrlStruct *pEvenCtrl = (EventCtrlStruct *)pCookies; + eBbuPoolHandler pHandler = (eBbuPoolHandler)pEvenCtrl->pHandler; + int32_t nCell = pEvenCtrl->nCellIdx; + int32_t nSlot = pEvenCtrl->nSlotIdx; + int32_t nCtx = nSlot % MAX_TEST_CTX; + int32_t eventId = pEvenCtrl->nEventId; + EventChainDescStruct * pEventChain = &gEventChain[nCell][nCtx]; + + if(eventId == DL_POST||eventId == UL_POST) + ebbu_pool_queue_ctx_add(pHandler, nCtx); + + /*Set and check the status of all next event */ + /*Then decide whether to send next event or not */ + int32_t iNext = 0; + int32_t nextEventId = 0; + + for(iNext = 0; iNext < pEventChain->nextEventCount[eventId]; iNext++) + { + nextEventId = pEventChain->nextEventChain[eventId][iNext]; + /*printf("\nnSlot %d event %d nextEventCount %d inext %d next %d next_pre_count %d next_pre_stat %d", + nSlotIdx, nTaskId, pEventChain->nextEventCount[nTaskId], iNext, nextEventId, + pEventChain->preEventCount[nextEventId], pEventChain->preEventStat[nextEventId]); + */ + + if(__atomic_add_fetch(&pEventChain->preEventStat[nextEventId], 1, __ATOMIC_ACQ_REL) == + __atomic_load_n(&pEventChain->preEventCount[nextEventId], __ATOMIC_ACQUIRE)) + { + test_func_gen(pHandler, nCell, nSlot, nextEventId); + } + } + + return 0; +} + +int32_t test_func_gen(eBbuPoolHandler pHandler, int32_t nCell, int32_t nSlot, int32_t eventId) +{ + int j; + if(eventId >= MAX_TASK_NUM_G_NB || nCell >= EBBU_POOL_MAX_TEST_CELL) + { + printf("\nError! Wrong eventId %d max %d nCell %d",eventId, MAX_TASK_NUM_G_NB, nCell); + exit(-1); + } + + int32_t nCtx = nSlot % MAX_TEST_CTX; + int32_t iNext, iNextEventId, nSplitIdx; + EventChainDescStruct * pEventChain = &gEventChain[nCell][nCtx]; + EventSendStruct sEventSend; + EventCtrlStruct *pEventCtrl; + TaskPreGen sPara; + int32_t nSplit = 1, ret = 0; + + uint64_t t1 = MLogTick(); + + if(DL_CONFIG == eventId) + dl_start_mlog[nCell][nCtx] = t1; + else if(UL_CONFIG == eventId) + ul_start_mlog[nCell][nCtx] = t1; + + // Klocwork check + for (j = 0; j < MAX_TEST_SPLIT_NUM; j++) + sPara.pTaskExePara[j] = (void *)&gsSampleSplit[nCell%EBBU_POOL_MAX_TEST_CELL][nSlot%MAX_TEST_CTX][j]; + + if (testEventTable[eventId].pPreEventFunc) + { + /* Run Pre Event and Find out how many split */ + sPara.nTaskNum = 1; + testEventTable[eventId].pPreEventFunc(nSlot, nCell, &sPara); + nSplit = sPara.nTaskNum; + if(nSplit > 1) + { + /* Add the split to all the Nex Next Dependencies */ + for(iNext = 0; iNext < pEventChain->nextEventCount[eventId]; iNext++) + { + iNextEventId = pEventChain->nextEventChain[eventId][iNext]; + __atomic_add_fetch(&pEventChain->preEventCount[iNextEventId], nSplit - 1, __ATOMIC_ACQ_REL); + } + } + } + + //send the splitted events together, save ebbupool internal overhead + for(nSplitIdx = 0; nSplitIdx < nSplit; nSplitIdx++) + { + pEventCtrl = &gEventCtrl[nCell][nCtx][eventId][nSplitIdx]; + pEventCtrl->nEventId = eventId; + pEventCtrl->nSplitIdx = nSplitIdx; + pEventCtrl->nCellIdx = nCell; + pEventCtrl->nSlotIdx = nSlot; + pEventCtrl->pTaskPara = sPara.pTaskExePara[nSplitIdx]; + pEventCtrl->pHandler = pHandler; + } + + set_split_event_info(&gEventCtrl[nCell][nCtx][eventId][0], eventId, nSplit, &sEventSend); + ret = ebbu_pool_send_event(pHandler, sEventSend); + + if(0 != ret) + printf("\nEvent %d gen failed!",eventId); + + MLogTask(MAX_TASK_NUM_G_NB * nCell + eventId + 2000, t1, MLogTick()); + + return 0; +} +void test_pre_func_A(uint32_t nSubframe, uint16_t nCellIdx, TaskPreGen *pPara) +{ + // uint64_t t1 = MLogTick(); + //printf("\nfunc pre A event %d",pEvenCtrl->nEventId); + // int32_t ret = 0; + //do some traffic + //ret = simulate_traffic(pCookies, 1000); + + pPara->nTaskNum = nSplitNumCell[nCellIdx]; + int32_t iSplit = 0; + for(iSplit = 0; iSplit < pPara->nTaskNum; iSplit ++) + { + pPara->pTaskExePara[iSplit] = (void *)&gsSampleSplit[nCellIdx%EBBU_POOL_MAX_TEST_CELL][nSubframe%MAX_TEST_CTX][iSplit]; + } + return; + //MLogTask(MAX_TASK_NUM_G_NB * pInputPara->nCellIdx + pEvenCtrl->nEventId, t1, MLogTick()); +} + + +void test_pre_func_B(uint32_t nSubframe, uint16_t nCellIdx, TaskPreGen *pPara) +{ + // uint64_t t1 = MLogTick(); + //printf("\nfunc pre A event %d",pEvenCtrl->nEventId); + // int32_t ret = 0; + + //do some traffic + //ret = simulate_traffic(pCookies, 1000); + int32_t iSplit = 0; + for(iSplit = 0; iSplit < pPara->nTaskNum; iSplit ++) + { + pPara->pTaskExePara[iSplit] = (void *)&gsSampleSplit[nCellIdx%EBBU_POOL_MAX_TEST_CELL][nSubframe%MAX_TEST_CTX][iSplit]; + } + return; + + pPara->nTaskNum = nSplitNumCell[nCellIdx]; + + //MLogTask(MAX_TASK_NUM_G_NB * pInputPara->nCellIdx + pEvenCtrl->nEventId, t1, MLogTick()); +} + +int32_t test_func_A(void *pCookies) +{ + EventCtrlStruct *pEvenCtrl = (EventCtrlStruct *)pCookies; + + uint64_t t1 = MLogTick(); +#if 0 + //printf("\nfunc A event %d",pEvenCtrl->nEventId); + if(DL_CONFIG == pEvenCtrl->nEventId) + { + app_bbu_pool_task_dl_config(pCookies); + MLogTask(pEvenCtrl->nCellIdx + 4000, pEvenCtrl->tSendTime, t1); + } + + if(UL_CONFIG == pEvenCtrl->nEventId) + { + app_bbu_pool_task_ul_config(pCookies); + MLogTask(pEvenCtrl->nCellIdx + 5000, pEvenCtrl->tSendTime, t1); + } +#endif + // int32_t ret = 0; + + //do some traffic + //ret = simulate_traffic(pCookies, 3000); + //usleep(10); + + //unlock the next task + next_event_unlock(pCookies); + + MLogTask(MAX_TASK_NUM_G_NB * pEvenCtrl->nCellIdx + pEvenCtrl->nEventId, t1, MLogTick()); + //printf("\nfunc a latency %llu",MLogTick()-t1); + + return 0; + +} + +int32_t test_func_B(void *pCookies) +{ + EventCtrlStruct *pEvenCtrl = (EventCtrlStruct *)pCookies; + + uint64_t t1 = MLogTick(); + //printf("\nfunc B event %d",pEvenCtrl->nEventId); + // int32_t ret = 0; + + //do some traffic + //ret = simulate_traffic(pCookies, 5000); + //usleep(10); + + //unlock the next task + next_event_unlock(pCookies); + + MLogTask(MAX_TASK_NUM_G_NB * pEvenCtrl->nCellIdx + pEvenCtrl->nEventId, t1, MLogTick()); + + return 0; +} + +int32_t test_func_C(void *pCookies) +{ + EventCtrlStruct *pEvenCtrl = (EventCtrlStruct *)pCookies; + + uint64_t t1 = MLogTick(); + //printf("\nfunc B event %d",pEvenCtrl->nEventId); + int32_t ret = 0; + + //do some traffic + + MLogTask(MAX_TASK_NUM_G_NB * pEvenCtrl->nCellIdx + pEvenCtrl->nEventId, t1, MLogTick()); + + if(pEvenCtrl->nEventId == DL_POST || pEvenCtrl->nEventId == UL_POST) + { + if(__atomic_sub_fetch(&dl_ul_count, 1, __ATOMIC_ACQ_REL) == 0) + { + MLogTask(MAX_TASK_NUM_G_NB * pEvenCtrl->nCellIdx + 6000, ttistart, MLogTick()); + } + } + + MLogTask(77777, t1, MLogTick()); + return ret; +} + +#if 0 +int32_t simulate_traffic(void *pCookies, int32_t testCount) +{ + //printf("\ndo traffic!"); + EventCtrlStruct *pEvenCtrl = (EventCtrlStruct *)pCookies; + __m256 sigma2 = _mm256_set1_ps(testCount/1234.5); + __m256 ftemp1, ftemp2; + + int32_t m = testCount; + m = m/2; + + while(m > 0) + { + ftemp1 = _mm256_rcp_ps(sigma2); + ftemp2 = _mm256_sub_ps(_mm256_set1_ps(0), sigma2); + ftemp2 = _mm256_fmadd_ps(ftemp1, sigma2, ftemp2); + sigma2 = _mm256_rcp_ps(ftemp2); + m --; + } + + int32_t nfloat = 8; //256bits has eight 32bits + float *dummy = (float *)&sigma2; + *pEvenCtrl->dummy0 = 0; + for(m = 0; m < nfloat; m++) + *pEvenCtrl->dummy0 += dummy[m]; + + return 0; +} +#endif diff --git a/fhi_lib/app/src/app_bbu_pool.h b/fhi_lib/app/src/app_bbu_pool.h new file mode 100644 index 0000000..3852f83 --- /dev/null +++ b/fhi_lib/app/src/app_bbu_pool.h @@ -0,0 +1,261 @@ +/****************************************************************************** +* +* Copyright (c) 2020 Intel. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +* +*******************************************************************************/ + +/** + * @brief Header file to implementation of BBU + * @file app_bbu.h + * @ingroup xran + * @author Intel Corporation + * + **/ + +#ifndef _APP_BBU_POOL_H_ +#define _APP_BBU_POOL_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "ebbu_pool_api.h" +#include "ebbu_pool_cfg.h" + +#include "config.h" +#include "xran_fh_o_du.h" +#include "xran_mlog_lnx.h" + +#ifndef SUCCESS +/** SUCCESS = 0 */ +#define SUCCESS 0 +#endif /* #ifndef SUCCESS */ + +#ifndef FAILURE +/** FAILURE = 1 */ +#define FAILURE 1 +#endif /* #ifndef FAILURE */ + +#define MAX_NEXT_TASK_NUM 8 +#define MAX_TEST_CTX 4 +#define MAX_TEST_SPLIT_NUM 55 // then largest 1000 events per TTI by pre-defined event chain + +#define EVENT_NAME(EVENT_TYPE) #EVENT_TYPE + +#define MAX_PHY_INSTANCES ( 24 ) +#define MAX_NUM_OF_SF_5G_CTX ( 8 ) + +/******Processing Latencies***/ +#define DL_PROC_ADVANCE_MU0 ( 1 ) +#define DL_PROC_ADVANCE_MU1 ( 2 ) +#define DL_PROC_ADVANCE_MU3 ( 2 ) + +#define UL_PROC_ADVANCE_MU0 ( 1 ) +#define UL_PROC_ADVANCE_MU1 ( 1 ) +#define UL_PROC_ADVANCE_MU3 ( 1 ) + +extern uint32_t gMaxSlotNum[MAX_PHY_INSTANCES]; +extern uint32_t gNumDLCtx[MAX_PHY_INSTANCES]; +extern uint32_t gNumULCtx[MAX_PHY_INSTANCES]; +extern uint32_t gNumDLBufferCtx[MAX_PHY_INSTANCES]; +extern uint32_t gNumULBufferCtx[MAX_PHY_INSTANCES]; +extern uint32_t gDLProcAdvance[MAX_PHY_INSTANCES]; +extern int32_t gULProcAdvance[MAX_PHY_INSTANCES]; + +#define get_dl_sf_idx(nSlotNum, nCellIdx) ((nSlotNum + gDLProcAdvance[nCellIdx]) % gMaxSlotNum[nCellIdx]) +#define get_ul_sf_idx(nSlotNum, nCellIdx) ((nSlotNum + gULProcAdvance[nCellIdx]) % gMaxSlotNum[nCellIdx]) +#define get_dl_sf_ctx(nSlotNum, nCellIdx) (nSlotNum % gNumDLCtx[nCellIdx]) +#define get_ul_sf_ctx(nSlotNum, nCellIdx) (nSlotNum % gNumULCtx[nCellIdx]) + +typedef enum +{ + TTI_START = 0, /* 0 First task that will schedule all the other tasks for all Cells */ + SYM2_WAKE_UP, /* 1 Sym2 Arrival which will wake up UL Tasks for all cells */ + SYM6_WAKE_UP, /* 2 Sym6 Arrival which will wake up UL Tasks for all cells */ + SYM11_WAKE_UP, /* 3 Sym11 Arrival which will wake up UL Tasks for all cells */ + SYM13_WAKE_UP, /* 4 Sym13 Arrival which will wake up UL Tasks for all cells */ + PRACH_WAKE_UP, /* 5 PRACH Arrival which will wake up will wake up PRACH for all cells */ + SRS_WAKE_UP, /* 6 (Massive MIMO) SRS Arrival which will wake up SRS Decompression for all cells */ + DL_CONFIG, /* 7 */ + DL_PDSCH_TB, /* 8 */ + DL_PDSCH_SCRM, /* 9 */ + DL_PDSCH_SYM, /* 10 */ + DL_PDSCH_RS, /* 11 */ + DL_CTRL, /* 12 */ + UL_CONFIG, /* 13 */ + UL_IQ_DECOMP2, /* 14 */ + UL_IQ_DECOMP6, /* 15 */ + UL_IQ_DECOMP11, /* 16 */ + UL_IQ_DECOMP13, /* 17 */ + UL_PUSCH_CE0, /* 18 */ + UL_PUSCH_CE7, /* 19 */ + UL_PUSCH_EQL0, /* 20 */ + UL_PUSCH_EQL7, /* 21 */ + UL_PUSCH_LLR, /* 22 */ + UL_PUSCH_DEC, /* 23 */ + UL_PUSCH_TB, /* 24 */ + UL_PUCCH, /* 25 */ + UL_PRACH, /* 26 */ + UL_SRS_DECOMP, /* 27 */ + UL_SRS_CE, /* 28 */ + UL_SRS_POST, /* 29 */ + DL_POST, /* 30 */ + UL_POST, /* 31 */ + DL_BEAM_GEN, /* 32 */ + DL_BEAM_TX, /* 33 */ + UL_BEAM_GEN, /* 34 */ + UL_BEAM_TX, /* 35 */ + MAX_TASK_NUM_G_NB /* 36 */ +} TaskTypeEnum; + +///defines the parameters that multi-tasks are generated. +typedef struct +{ + /*! Indicate how many tasks of the generating type. 1 means that no task splitting. */ + uint16_t nTaskNum; + /*! the parameter list for each splitted task */ + void *pTaskExePara[MAX_TEST_SPLIT_NUM]; +} TaskPreGen; + +typedef enum +{ + RB_SPLIT = 0, + UE_GROUP_SPLIT = 1, + LAYER_SPLIT = 2, + UE_SPLIT = 3, + PORT_SPLIT = 4, + CE_RX_SPLIT = 5, + OFDM_SYMB_SPLIT = 6 +} TaskSplitType; + +typedef struct tSampleSplitStruct +{ + int16_t nGroupStart; + int16_t nGroupNum; + int16_t nUeStart; + int16_t nUeNum; + int16_t nSymbStart; + int16_t nSymbNum; + int16_t nLayerStart; + int16_t nLayerNum; + int16_t nSplitIndex; + TaskSplitType eSplitType; +} SampleSplitStruct; + +typedef struct +{ + int32_t eventChainDepth; + int32_t nextEventChain[MAX_TASK_NUM_G_NB][MAX_NEXT_TASK_NUM]; + int32_t nextEventCount[MAX_TASK_NUM_G_NB]; + int32_t preEventCount[MAX_TASK_NUM_G_NB]; + int32_t preEventCountSave[MAX_TASK_NUM_G_NB]; + int32_t preEventStat[MAX_TASK_NUM_G_NB]; +} __attribute__((aligned(IA_ALIGN))) EventChainDescStruct; + +typedef void (*PreEventExeFunc) (uint32_t nSfIdx, uint16_t nCellIdx, TaskPreGen *pPara); + +typedef struct +{ + int32_t nEventId; + char sTaskName[32]; + int32_t nEventPrio; + EventExeFunc pEventFunc; + PreEventExeFunc pPreEventFunc; + uint32_t nWakeOnExtrernalEvent; + uint32_t nPrefetchFlag; + uint32_t nCoreMaskType; + uint64_t nCoreMask0; + uint64_t nCoreMask1; + //uint64_t nCoreMask2; + //uint64_t nCoreMask3; + //uint64_t nCoreMask4; + //uint64_t nCoreMask5; + //uint64_t nCoreMask6; + //uint64_t nCoreMask7; +} __attribute__((aligned(IA_ALIGN))) EventConfigStruct; + +typedef struct +{ + int32_t nEventId; + int32_t nSplitIdx; + int32_t nCellIdx; + int32_t nSlotIdx; + void *pTaskPara; + void *pHandler; + float *dummy0; + uint64_t tSendTime; + uint8_t nBuffer[240]; +} __attribute__((aligned(IA_ALIGN))) EventCtrlStruct; + +typedef struct +{ + int32_t nEventId; + int32_t nEventPrio; + EventExeFunc pEventFunc; +} __attribute__((aligned(IA_ALIGN))) EventInfo; + +typedef struct +{ + int32_t nCellInd; + EventStruct *pEventStruct; + int16_t *pCEtp; + int16_t *pMIMOouttp; + int16_t *pWeighttp; +} __attribute__((aligned(IA_ALIGN))) gNBCellStruct; + +extern EventChainDescStruct gEventChain[EBBU_POOL_MAX_TEST_CELL][MAX_TEST_CTX]; +extern EventCtrlStruct gEventCtrl[EBBU_POOL_MAX_TEST_CELL][MAX_TEST_CTX][MAX_TASK_NUM_G_NB][MAX_TEST_SPLIT_NUM]; + +int32_t event_chain_gen(EventChainDescStruct *psEventChain); +int32_t event_chain_reset(EventChainDescStruct *psEventChain); +int32_t test_buffer_create(); + +eBbuPoolHandler app_get_ebbu_pool_handler(void); + +int32_t app_bbu_init(int argc, char *argv[], char cfgName[512], UsecaseConfig* p_use_cfg, RuntimeConfig* p_o_xu_cfg[], + uint64_t nActiveCoreMask[EBBUPOOL_MAX_CORE_MASK]); +int32_t app_bbu_close(void); + + +int32_t app_bbu_dl_tti_call_back(void * param); + +int32_t test_func_gen(eBbuPoolHandler pHandler, int32_t nCell, int32_t nSlot, int32_t eventId); +int32_t next_event_unlock(void *pCookies); + +/** tasks */ +int32_t app_bbu_pool_task_dl_post(void *pCookies); +void app_bbu_pool_pre_task_dl_post(uint32_t nSubframe, uint16_t nCellIdx, TaskPreGen *pPara); +int32_t app_bbu_pool_task_dl_config(void *pCookies); +void app_bbu_pool_pre_task_dl_cfg(uint32_t nSubframe, uint16_t nCellIdx, TaskPreGen *pPara); +int32_t app_bbu_pool_task_ul_config(void * pCookies); +void app_bbu_pool_pre_task_ul_cfg(uint32_t nSubframe, uint16_t nCellIdx, TaskPreGen *pPara); + +int32_t app_bbu_pool_task_sym2_wakeup(void *pCookies); +int32_t app_bbu_pool_task_sym6_wakeup(void *pCookies); +int32_t app_bbu_pool_task_sym11_wakeup(void *pCookies); +int32_t app_bbu_pool_task_sym13_wakeup(void *pCookies); +int32_t app_bbu_pool_task_prach_wakeup(void *pCookies); +int32_t app_bbu_pool_task_srs_wakeup(void *pCookies); + +void app_io_xran_fh_bbu_rx_callback(void *pCallbackTag, xran_status_t status); +void app_io_xran_fh_bbu_rx_bfw_callback(void *pCallbackTag, xran_status_t status); +void app_io_xran_fh_bbu_rx_prach_callback(void *pCallbackTag, xran_status_t status); +void app_io_xran_fh_bbu_rx_srs_callback(void *pCallbackTag, xran_status_t status); + + +#ifdef __cplusplus +} +#endif +#endif /*_APP_BBU_POOL_H_*/ \ No newline at end of file diff --git a/fhi_lib/app/src/app_dl_bbu_pool_tasks.c b/fhi_lib/app/src/app_dl_bbu_pool_tasks.c new file mode 100644 index 0000000..a43a5c8 --- /dev/null +++ b/fhi_lib/app/src/app_dl_bbu_pool_tasks.c @@ -0,0 +1,494 @@ +/****************************************************************************** +* +* Copyright (c) 2020 Intel. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +* +*******************************************************************************/ + +/** + * @brief This module provides implementation of BBU tasks for sample app + * @file app_bbu.c + * @ingroup xran + * @author Intel Corporation + * + **/ + +#include +#include +#include +#include +#include +#include +#include + +#include "common.h" +#include "app_bbu_pool.h" +#include "app_io_fh_xran.h" +#include "xran_compression.h" +#include "xran_cp_api.h" +#include "xran_fh_o_du.h" +#include "xran_mlog_task_id.h" + +extern RuntimeConfig* p_startupConfiguration[XRAN_PORTS_NUM]; +static SampleSplitStruct gsDlPostSymbolTaskSplit[MAX_PHY_INSTANCES][MAX_NUM_OF_SF_5G_CTX][MAX_TEST_SPLIT_NUM]; +static SampleSplitStruct gsDlCfgAxCTaskSplit[MAX_PHY_INSTANCES][MAX_NUM_OF_SF_5G_CTX][MAX_TEST_SPLIT_NUM]; + +void app_bbu_pool_pre_task_dl_post(uint32_t nSubframe, uint16_t nCellIdx, TaskPreGen *pPara) +{ + int32_t nSplitGroup = 0; + int32_t iTask = 0; + uint32_t nSfIdx = get_dl_sf_idx(nSubframe, nCellIdx); + uint32_t nCtxNum = get_dl_sf_ctx(nSfIdx, nCellIdx); + SampleSplitStruct *pTaskSplitPara; + int32_t nGroupNum = 0; + int32_t nSymbStart = 0, nSymbPerSplit = 0; + int32_t nTotalLayers = 0, nLayerStart = 0, nLayerPerSplit = 0; + struct bbu_xran_io_if *psXranIoIf = app_io_xran_if_get(); + struct xran_fh_config* pXranConf = NULL; + // struct xran_io_shared_ctrl *psIoCtrl = NULL; + uint32_t nRuCcidx = 0; + int32_t xran_port = 0; + + if(psXranIoIf == NULL) + rte_panic("psXranIoIf == NULL"); + + if(nCellIdx >= MAX_PHY_INSTANCES) + rte_panic("nCellIdx >= MAX_PHY_INSTANCES"); + + xran_port = app_io_xran_map_cellid_to_port(psXranIoIf, nCellIdx, &nRuCcidx); + + if(xran_port < 0) { + printf("incorrect xran_port\n"); + return /*EBBUPOOL_CORRECT*/; + } + + // psIoCtrl = app_io_xran_if_ctrl_get(xran_port); + pXranConf = &app_io_xran_fh_config[xran_port]; + if(pXranConf == NULL) + rte_panic("pXranConf"); + + nTotalLayers = pXranConf->neAxc; + nSplitGroup = pXranConf->neAxc; + + /* all symp per eAxC */ + nSymbStart = 0; + // nTotalSymb = XRAN_NUM_OF_SYMBOL_PER_SLOT; + nSymbPerSplit = XRAN_NUM_OF_SYMBOL_PER_SLOT; + + nLayerPerSplit = nTotalLayers/nSplitGroup; + + pPara->nTaskNum = nSplitGroup; + for (iTask = 0; iTask < (nSplitGroup-1) && iTask < (MAX_TEST_SPLIT_NUM-1); iTask ++) + { + pTaskSplitPara = &(gsDlPostSymbolTaskSplit[nCellIdx][nCtxNum][iTask]); + pTaskSplitPara->nSymbStart = nSymbStart; + pTaskSplitPara->nSymbNum = nSymbPerSplit; + pTaskSplitPara->eSplitType = LAYER_SPLIT; + pTaskSplitPara->nSplitIndex = iTask; + pTaskSplitPara->nGroupStart = 0; + pTaskSplitPara->nGroupNum = nGroupNum; + pTaskSplitPara->nLayerStart = nLayerStart; + pTaskSplitPara->nLayerNum = nLayerPerSplit; + pPara->pTaskExePara[iTask] = pTaskSplitPara; + //nSymbStart += nSymbPerSplit; + nLayerStart += nLayerPerSplit; + } + + pTaskSplitPara = &(gsDlPostSymbolTaskSplit[nCellIdx][nCtxNum][iTask]); + pTaskSplitPara->nSymbStart = nSymbStart; + pTaskSplitPara->nSymbNum = nSymbPerSplit; + pTaskSplitPara->eSplitType = LAYER_SPLIT; + pTaskSplitPara->nSplitIndex = iTask; + pTaskSplitPara->nGroupStart = 0; + pTaskSplitPara->nGroupNum = nGroupNum; + pTaskSplitPara->nLayerStart = nLayerStart; + pTaskSplitPara->nLayerNum = nTotalLayers - nLayerStart; + pPara->pTaskExePara[iTask] = pTaskSplitPara; + + return; +} + +void app_bbu_pool_pre_task_dl_cfg(uint32_t nSubframe, uint16_t nCellIdx, TaskPreGen *pPara) +{ + int32_t nSplitGroup = 0; + int32_t iTask = 0; + uint32_t nSfIdx = get_dl_sf_idx(nSubframe, nCellIdx); + uint32_t nCtxNum = get_dl_sf_ctx(nSfIdx, nCellIdx); + SampleSplitStruct *pTaskSplitPara; + int32_t nGroupNum = 0; + int32_t nSymbStart = 0, nSymbPerSplit = 0; + int32_t nTotalLayers = 0, nLayerStart = 0, nLayerPerSplit = 0; + struct bbu_xran_io_if *psXranIoIf = app_io_xran_if_get(); + struct xran_fh_config* pXranConf = NULL; + // struct xran_io_shared_ctrl *psIoCtrl = NULL; + uint32_t nRuCcidx = 0; + int32_t xran_port = 0; + uint32_t neAxc = 0; + + if(psXranIoIf == NULL) + rte_panic("psXranIoIf == NULL"); + + if(nCellIdx >= MAX_PHY_INSTANCES) + rte_panic("nCellIdx >= MAX_PHY_INSTANCES"); + + xran_port = app_io_xran_map_cellid_to_port(psXranIoIf, nCellIdx, &nRuCcidx); + + if(xran_port < 0) { + printf("incorrect xran_port\n"); + return /*EBBUPOOL_CORRECT*/; + } + + // psIoCtrl = app_io_xran_if_ctrl_get(xran_port); + pXranConf = &app_io_xran_fh_config[xran_port]; + if(pXranConf == NULL) + rte_panic("pXranConf"); + + pXranConf = &app_io_xran_fh_config[xran_port]; + if(pXranConf == NULL) + rte_panic("pXranConf"); + + if(pXranConf->ru_conf.xranCat == XRAN_CATEGORY_A){ + neAxc = pXranConf->neAxc; + nSplitGroup = 1; + } else if (pXranConf->ru_conf.xranCat == XRAN_CATEGORY_B) { + neAxc = pXranConf->neAxc; + nSplitGroup = neAxc; + } else + rte_panic("neAxc"); + + nTotalLayers = neAxc; + + /* all symb per eAxC */ + nSymbStart = 0; + nSymbPerSplit = XRAN_NUM_OF_SYMBOL_PER_SLOT; + + nLayerPerSplit = nTotalLayers/nSplitGroup; + + pPara->nTaskNum = nSplitGroup; + for (iTask = 0; iTask < (nSplitGroup-1) && iTask < (MAX_TEST_SPLIT_NUM-1); iTask ++) + { + pTaskSplitPara = &(gsDlCfgAxCTaskSplit[nCellIdx][nCtxNum][iTask]); + pTaskSplitPara->nSymbStart = nSymbStart; + pTaskSplitPara->nSymbNum = nSymbPerSplit; + pTaskSplitPara->eSplitType = LAYER_SPLIT; + pTaskSplitPara->nSplitIndex = iTask; + pTaskSplitPara->nGroupStart = 0; + pTaskSplitPara->nGroupNum = nGroupNum; + pTaskSplitPara->nLayerStart = nLayerStart; + pTaskSplitPara->nLayerNum = nLayerPerSplit; + pPara->pTaskExePara[iTask] = pTaskSplitPara; + //nSymbStart += nSymbPerSplit; + nLayerStart += nLayerPerSplit; + } + + pTaskSplitPara = &(gsDlCfgAxCTaskSplit[nCellIdx][nCtxNum][iTask]); + pTaskSplitPara->nSymbStart = nSymbStart; + pTaskSplitPara->nSymbNum = nSymbPerSplit; + pTaskSplitPara->eSplitType = LAYER_SPLIT; + pTaskSplitPara->nSplitIndex = iTask; + pTaskSplitPara->nGroupStart = 0; + pTaskSplitPara->nGroupNum = nGroupNum; + pTaskSplitPara->nLayerStart = nLayerStart; + pTaskSplitPara->nLayerNum = nTotalLayers - nLayerStart; + pPara->pTaskExePara[iTask] = pTaskSplitPara; + + return; +} + +//------------------------------------------------------------------------------------------- +/** @ingroup xran +* +* @param[in] pCookies task input parameter +* @return 0 if SUCCESS +* +* @description +* This function takes the DL Config from MAC and stores it into PHY Internal structures. +* and initials the parameter of UL DCI. +* +**/ +//------------------------------------------------------------------------------------------- +int32_t +app_bbu_pool_task_dl_config(void *pCookies) +{ + EventCtrlStruct *pEventCtrl = (EventCtrlStruct *)pCookies; + uint16_t nCellIdx = pEventCtrl->nCellIdx; + uint32_t nSfIdx = get_dl_sf_idx(pEventCtrl->nSlotIdx, nCellIdx); + uint32_t nCtxNum = get_dl_sf_ctx(nSfIdx, nCellIdx); + uint32_t mlogVariablesCnt, mlogVariables[50]; + uint64_t mlog_start = MLogTick(); + uint32_t nRuCcidx = 0; + int32_t xran_port = 0; + SampleSplitStruct *pTaskPara = (SampleSplitStruct*)pEventCtrl->pTaskPara; + struct bbu_xran_io_if *psXranIoIf = app_io_xran_if_get(); + struct xran_fh_config* pXranConf = NULL; + xran_status_t status; + struct xran_io_shared_ctrl *psIoCtrl = NULL; + int32_t cc_id, ant_id, sym_id, tti; + int32_t flowId; + struct o_xu_buffers * p_iq = NULL; + int32_t nSymbMask = 0b11111111111111; + RuntimeConfig *p_o_xu_cfg = NULL; + uint16_t nLayerStart = 0, nLayer = 0; + + if(psXranIoIf == NULL) + rte_panic("psXranIoIf == NULL"); + + xran_port = app_io_xran_map_cellid_to_port(psXranIoIf, nCellIdx, &nRuCcidx); + + if(xran_port < 0) { + printf("incorrect xran_port\n"); + return EBBUPOOL_CORRECT; + } + psIoCtrl = app_io_xran_if_ctrl_get(xran_port); + pXranConf = &app_io_xran_fh_config[xran_port]; + if(pXranConf == NULL) + rte_panic("pXranConf"); + + mlogVariablesCnt = 0; + mlogVariables[mlogVariablesCnt++] = 0xCCBBCCBB; + mlogVariables[mlogVariablesCnt++] = pEventCtrl->nSlotIdx; + mlogVariables[mlogVariablesCnt++] = 0; + mlogVariables[mlogVariablesCnt++] = nCellIdx; + mlogVariables[mlogVariablesCnt++] = nSfIdx; + mlogVariables[mlogVariablesCnt++] = nCtxNum; + mlogVariables[mlogVariablesCnt++] = xran_port; + mlogVariables[mlogVariablesCnt++] = nRuCcidx; + + p_o_xu_cfg = p_startupConfiguration[xran_port]; + + + mlog_start = MLogTick(); + + if(LAYER_SPLIT == pTaskPara->eSplitType) { + // iSplit = pTaskPara->nSplitIndex; + nLayerStart = pTaskPara->nLayerStart; + nLayer = pTaskPara->nLayerNum; + //printf("\nsf %d nSymbStart %d nSymb %d iSplit %d", nSfIdx, nSymbStart, nSymb, iSplit); + } else { + rte_panic("LAYER_SPLIT == pTaskPara->eSplitType"); + } + + if(p_o_xu_cfg->p_buff) { + p_iq = p_o_xu_cfg->p_buff; + } else { + rte_panic("Error p_o_xu_cfg->p_buff\n"); + } + tti = nSfIdx; + for(cc_id = nRuCcidx; cc_id < psXranIoIf->num_cc_per_port[xran_port]; cc_id++) { + if (cc_id >= XRAN_MAX_SECTOR_NR) + { + rte_panic("cell id %d exceeding max number", cc_id); + } + for(ant_id = nLayerStart; ant_id < (nLayerStart + nLayer); ant_id++) { + if(p_o_xu_cfg->appMode == APP_O_DU) { + flowId = p_o_xu_cfg->numAxc * cc_id + ant_id; + } else { + flowId = p_o_xu_cfg->numUlAxc * cc_id + ant_id; + } + for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) { + if(((1 << sym_id) & nSymbMask)) { + if ((status = app_io_xran_iq_content_init_cp_tx(p_o_xu_cfg->appMode, pXranConf, + psXranIoIf, psIoCtrl, p_iq, + cc_id, ant_id, sym_id, tti, flowId)) != 0) { + rte_panic("app_io_xran_iq_content_init_cp_tx"); + } + } + } + } + } + + xran_prepare_cp_dl_slot(xran_port, nSfIdx, nRuCcidx, /*psXranIoIf->num_cc_per_port[xran_port]*/ 1, nSymbMask, nLayerStart, + nLayer, 0, XRAN_NUM_OF_SYMBOL_PER_SLOT); + + if (mlogVariablesCnt) + MLogAddVariables((uint32_t)mlogVariablesCnt, (uint32_t *)mlogVariables, mlog_start); + + //unlock the next task + next_event_unlock(pCookies); + MLogTask(PCID_GNB_DL_CFG_CC0+nCellIdx, mlog_start, MLogTick()); + + return EBBUPOOL_CORRECT; +} + +int32_t +app_io_xran_dl_pack_func(uint16_t nCellIdx, uint32_t nSfIdx, uint32_t nSymMask, + uint32_t nAntStart, uint32_t nAntNum, uint32_t nSymStart, uint32_t nSymNum) +{ + xran_status_t status; + uint32_t nSlotIdx = get_dl_sf_idx(nSfIdx, nCellIdx); + // struct xran_io_shared_ctrl * psBbuXranIo = NULL; + struct bbu_xran_io_if *psXranIoIf = app_io_xran_if_get(); + int32_t xran_port = 0; + uint32_t nRuCcidx = 0; + struct o_xu_buffers * p_iq = NULL; + RuntimeConfig *p_o_xu_cfg = NULL; + int32_t flowId = 0; + struct xran_fh_config *pXranConf = NULL; + int32_t cc_id, ant_id, sym_id, tti; + struct xran_io_shared_ctrl *psIoCtrl = NULL; + + xran_port = app_io_xran_map_cellid_to_port(psXranIoIf, nCellIdx, &nRuCcidx); + + if(xran_port < 0) + { + printf("incorrect xran_port\n"); + return FAILURE; + } + + psIoCtrl = app_io_xran_if_ctrl_get(xran_port); + + if(psIoCtrl == NULL) { + printf("psIoCtrl == NULL\n"); + return FAILURE; + } + + p_o_xu_cfg = p_startupConfiguration[xran_port]; + if(p_o_xu_cfg == NULL) { + printf("p_o_xu_cfg == NULL\n"); + return FAILURE; + } + + if(p_o_xu_cfg->p_buff) { + p_iq = p_o_xu_cfg->p_buff; + } else { + rte_panic("Error p_o_xu_cfg->p_buff\n"); + } + + pXranConf = &app_io_xran_fh_config[xran_port]; + + tti = nSlotIdx; + for(cc_id = nRuCcidx; cc_id < psXranIoIf->num_cc_per_port[xran_port]; cc_id++) { + for(ant_id = nAntStart; ant_id < (nAntStart + nAntNum) && ant_id < pXranConf->neAxc; ant_id++) { + if(p_o_xu_cfg->appMode == APP_O_DU) { + flowId = p_o_xu_cfg->numAxc * cc_id + ant_id; + } else { + flowId = p_o_xu_cfg->numUlAxc * cc_id + ant_id; + } + for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) { + if(((1 << sym_id) & nSymMask)) { + if ((status = app_io_xran_iq_content_init_up_tx(p_o_xu_cfg->appMode, pXranConf, + psXranIoIf, psIoCtrl, p_iq, + cc_id, ant_id, sym_id, tti, flowId)) != 0) { + rte_panic("app_io_xran_iq_content_init_up_tx"); + } + } + } + } + } + + xran_prepare_up_dl_sym(xran_port, nSlotIdx, nRuCcidx, 1, nSymMask, nAntStart, nAntNum, nSymStart, nSymNum); + return SUCCESS; +} + +int32_t +app_io_xran_dl_post_func(uint16_t nCellIdx, uint32_t nSfIdx, uint32_t nSymMask, uint32_t nAntStart, uint32_t nAntNum) +{ + uint16_t phyInstance = nCellIdx; + // uint32_t Ntx_antennas; + uint16_t nOranCellIdx; + + uint64_t tTotal = MLogTick(); + // struct xran_io_shared_ctrl * psBbuXranIo = NULL; + struct bbu_xran_io_if *psXranIoIf = app_io_xran_if_get(); + int32_t xran_port = 0; + uint32_t nRuCcidx = 0; + // struct xran_fh_config *pXranConf = NULL; + + nSymMask = nSymMask + 0; + + nOranCellIdx = nCellIdx; + xran_port = app_io_xran_map_cellid_to_port(psXranIoIf, nOranCellIdx, &nRuCcidx); + if(xran_port < 0) { + printf("incorrect xran_port\n"); + return FAILURE; + } + + // pXranConf = &app_io_xran_fh_config[xran_port]; +// Ntx_antennas = pXranConf->neAxc; + + app_io_xran_dl_pack_func(nCellIdx, nSfIdx, nSymMask, nAntStart, nAntNum, 0, XRAN_NUM_OF_SYMBOL_PER_SLOT); + + MLogTask(PCID_GNB_DL_IQ_COMPRESS_CC0 + phyInstance, tTotal, MLogTick()); + + return SUCCESS; +} + +//------------------------------------------------------------------------------------------- +/** @ingroup group_nr5g_source_phy_pdsch +* +* @param[in] pCookies task input parameter +* @return 0 if SUCCESS +* +* @description +* This function will reset phy dl buffers. +* +**/ +//------------------------------------------------------------------------------------------- +int32_t app_bbu_pool_task_dl_post(void *pCookies) +{ + EventCtrlStruct *pEventCtrl = (EventCtrlStruct *)pCookies; + uint16_t nCellIdx = pEventCtrl->nCellIdx; + uint32_t nSfIdx = get_dl_sf_idx(pEventCtrl->nSlotIdx, nCellIdx); + SampleSplitStruct *pTaskPara = (SampleSplitStruct*)pEventCtrl->pTaskPara; + uint16_t nSymbStart = 0, nSymb = 0, iOfdmSymb = 0, iSplit = 0; + uint32_t nSymMask = 0; + uint64_t mlog_start; + uint32_t mlogVar[10]; + uint32_t mlogVarCnt = 0; + uint16_t nLayerStart = 0, nLayer = 0; + mlog_start = MLogTick(); + + if(LAYER_SPLIT == pTaskPara->eSplitType) { + nSymbStart = pTaskPara->nSymbStart; + nSymb = pTaskPara->nSymbNum; + iSplit = pTaskPara->nSplitIndex; + nLayerStart = pTaskPara->nLayerStart; + nLayer = pTaskPara->nLayerNum; + //printf("\nsf %d nSymbStart %d nSymb %d iSplit %d", nSfIdx, nSymbStart, nSymb, iSplit); + } else if(OFDM_SYMB_SPLIT == pTaskPara->eSplitType) { + nSymbStart = pTaskPara->nSymbStart; + nSymb = pTaskPara->nSymbNum; + iSplit = pTaskPara->nSplitIndex; + rte_panic("\nsf %d nSymbStart %d nSymb %d iSplit %d", nSfIdx, nSymbStart, nSymb, iSplit); + } else { + rte_panic("OFDM_SYMB_SPLIT == pTaskPara->eSplitType"); + } + + // This is the loop of real OFDM symbol index + for(iOfdmSymb = nSymbStart; iOfdmSymb < (nSymbStart + nSymb); iOfdmSymb ++) + nSymMask |= (1 << iOfdmSymb); + + app_io_xran_dl_post_func(pEventCtrl->nCellIdx, pEventCtrl->nSlotIdx, /*0x3FFF*/ nSymMask, nLayerStart, nLayer); + +#if 1 + { + mlogVar[mlogVarCnt++] = 0xefefefef; + mlogVar[mlogVarCnt++] = nCellIdx; + mlogVar[mlogVarCnt++] = nSfIdx; + mlogVar[mlogVarCnt++] = nSymbStart; + mlogVar[mlogVarCnt++] = nSymb; + mlogVar[mlogVarCnt++] = nLayerStart; + mlogVar[mlogVarCnt++] = nLayer; + mlogVar[mlogVarCnt++] = iSplit; + MLogAddVariables(mlogVarCnt, mlogVar, mlog_start); + } +#endif + + //unlock the next task + next_event_unlock(pCookies); + + MLogTask(PCID_GNB_DL_POST_CC0+nCellIdx, mlog_start, MLogTick()); + return EBBUPOOL_CORRECT; +} + diff --git a/fhi_lib/app/src/app_io_fh_xran.c b/fhi_lib/app/src/app_io_fh_xran.c index 9ebec1a..87dc867 100644 --- a/fhi_lib/app/src/app_io_fh_xran.c +++ b/fhi_lib/app/src/app_io_fh_xran.c @@ -33,12 +33,15 @@ #include "xran_mlog_lnx.h" #include "xran_fh_o_du.h" +#include "xran_fh_o_ru.h" #include "xran_compression.h" #include "xran_cp_api.h" #include "xran_sync_api.h" #include "xran_mlog_task_id.h" #include "app_io_fh_xran.h" - +#ifdef FWK_ENABLED +#include "app_bbu_pool.h" +#endif /* buffers size */ uint32_t nFpgaToSW_FTH_RxBufferLen; uint32_t nFpgaToSW_PRACH_RxBufferLen; @@ -54,6 +57,15 @@ void app_io_xran_fh_rx_callback(void *pCallbackTag, int32_t status); void app_io_xran_fh_rx_prach_callback(void *pCallbackTag, int32_t status); void app_io_xran_fh_rx_srs_callback(void *pCallbackTag, xran_status_t status); +#ifndef FWK_ENABLED +void app_io_xran_fh_bbu_rx_callback(void *pCallbackTag, xran_status_t status); +void app_io_xran_fh_bbu_rx_bfw_callback(void *pCallbackTag, xran_status_t status); +void app_io_xran_fh_bbu_rx_prach_callback(void *pCallbackTag, xran_status_t status); +void app_io_xran_fh_bbu_rx_srs_callback(void *pCallbackTag, xran_status_t status); +#endif + +extern RuntimeConfig* p_startupConfiguration[XRAN_PORTS_NUM]; + struct bbu_xran_io_if * app_io_xran_if_alloc(void) { @@ -102,7 +114,7 @@ app_io_xran_sfidx_get(uint8_t nNrOfSlotInSf) uint32_t nSlotIdx; uint64_t nSecond; - uint32_t nXranTime = xran_get_slot_idx(0, &nFrameIdx, &nSubframeIdx, &nSlotIdx, &nSecond); + /*uint32_t nXranTime = */xran_get_slot_idx(0, &nFrameIdx, &nSubframeIdx, &nSlotIdx, &nSecond); nSfIdx = nFrameIdx*NUM_OF_SUBFRAME_PER_FRAME*nNrOfSlotInSf + nSubframeIdx*nNrOfSlotInSf + nSlotIdx; @@ -125,31 +137,79 @@ app_io_xran_fh_rx_callback(void *pCallbackTag, xran_status_t status) uint64_t t1 = MLogTick(); uint32_t mlogVar[10]; uint32_t mlogVarCnt = 0; - uint8_t Numerlogy = app_io_xran_fh_config[0].frame_conf.nNumerology; - uint8_t nNrOfSlotInSf = 1<oXuId; + struct xran_io_shared_ctrl *psIoCtrl = app_io_xran_if_ctrl_get(o_xu_id); + struct xran_fh_config *pXranConf = &app_io_xran_fh_config[o_xu_id]; + uint32_t xran_max_antenna_nr = RTE_MAX(pXranConf->neAxc, pXranConf->neAxcUl); + //int32_t nSectorNum = pXranConf->nCC; + uint32_t ant_id, sym_id, idxElm; + struct xran_prb_map *pRbMap = NULL; + struct xran_prb_elm *pRbElm = NULL; mlog_start = MLogTick(); nCellIdx = pTag->cellId; nSlotIdx = pTag->slotiId; ///((status >> 16) & 0xFFFF); /** TTI aka slotIdx */ sym = pTag->symbol & 0xFF; /* sym */ + ntti = (nSlotIdx + XRAN_N_FE_BUF_LEN -1) % XRAN_N_FE_BUF_LEN; { mlogVar[mlogVarCnt++] = 0xbcbcbcbc; + mlogVar[mlogVarCnt++] = o_xu_id; mlogVar[mlogVarCnt++] = nCellIdx; mlogVar[mlogVarCnt++] = sym; mlogVar[mlogVarCnt++] = nSlotIdx; + mlogVar[mlogVarCnt++] = ntti; //mlogVar[mlogVarCnt++] = nSlotIdx % gNumSlotPerSfn[nCellIdx]; //mlogVar[mlogVarCnt++] = get_slot_type(nCellIdx, nSlotIdx, SLOT_TYPE_UL); MLogAddVariables(mlogVarCnt, mlogVar, mlog_start); } + if(psIoCtrl == NULL) + { + printf("psIoCtrl NULL! o_xu_id= %d\n", o_xu_id); + return; + } + + if (sym == XRAN_HALF_CB_SYM) { + // 1/4 of slot + } else if (sym == XRAN_HALF_CB_SYM) { + // First Half + } else if (sym == XRAN_THREE_FOURTHS_CB_SYM) { + // 2/4 of slot + } else if (sym == XRAN_FULL_CB_SYM) { + // Second Half + } else { + /* error */ + MLogTask(PID_GNB_SYM_CB, t1, MLogTick()); + return; + } + + if(sym == XRAN_FULL_CB_SYM) //full slot callback only + { + for(ant_id = 0; ant_id < xran_max_antenna_nr; ant_id++) { + pRbMap = (struct xran_prb_map *) psIoCtrl->sFrontHaulRxPrbMapBbuIoBufCtrl[ntti][nCellIdx][ant_id].sBufferList.pBuffers->pData; + if(pRbMap == NULL){ + printf("(%d:%d:%d)pRbMap == NULL\n", nCellIdx, ntti, ant_id); + exit(-1); + } + for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) { + for(idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++ ) { + pRbElm = &pRbMap->prbMap[idxElm]; + pRbElm->nSecDesc[sym_id] = 0; + } + } + } + } + rte_pause(); MLogTask(PID_GNB_SYM_CB, t1, MLogTick()); @@ -174,6 +234,67 @@ app_io_xran_fh_rx_prach_callback(void *pCallbackTag, xran_status_t status) void app_io_xran_fh_rx_srs_callback(void *pCallbackTag, xran_status_t status) +{ + uint64_t t1 = MLogTick(); + uint32_t mlogVar[10]; + uint32_t mlogVarCnt = 0; + //uint8_t Numerlogy = app_io_xran_fh_config[0].frame_conf.nNumerology; + //uint8_t nNrOfSlotInSf = 1<oXuId; + struct xran_io_shared_ctrl *psIoCtrl = app_io_xran_if_ctrl_get(o_xu_id); + struct xran_fh_config *pXranConf = &app_io_xran_fh_config[o_xu_id]; + uint32_t xran_max_antenna_nr = RTE_MAX(pXranConf->neAxc, pXranConf->neAxcUl); + //int32_t nSectorNum = pXranConf->nCC; + uint32_t ant_id, sym_id, idxElm; + struct xran_prb_map *pRbMap = NULL; + struct xran_prb_elm *pRbElm = NULL; + uint32_t xran_max_ant_array_elm_nr = RTE_MAX(pXranConf->nAntElmTRx, xran_max_antenna_nr); + + nCellIdx = pTag->cellId; + nSlotIdx = pTag->slotiId; ///((status >> 16) & 0xFFFF); /** TTI aka slotIdx */ + sym = pTag->symbol & 0xFF; /* sym */ + ntti = (nSlotIdx + XRAN_N_FE_BUF_LEN-1) % XRAN_N_FE_BUF_LEN; + + { + mlogVar[mlogVarCnt++] = 0xCCCCCCCC; + mlogVar[mlogVarCnt++] = o_xu_id; + mlogVar[mlogVarCnt++] = nCellIdx; + mlogVar[mlogVarCnt++] = sym; + mlogVar[mlogVarCnt++] = nSlotIdx; + mlogVar[mlogVarCnt++] = ntti; + MLogAddVariables(mlogVarCnt, mlogVar, MLogTick()); + } + + if(psIoCtrl == NULL) + { + printf("psIoCtrl NULL! o_xu_id= %d\n", o_xu_id); + return; + } + + if(sym == XRAN_FULL_CB_SYM) { //full slot callback only + for(ant_id = 0; ant_id < xran_max_ant_array_elm_nr; ant_id++) { + pRbMap = (struct xran_prb_map *) psIoCtrl->sFHSrsRxPrbMapBbuIoBufCtrl[ntti][nCellIdx][ant_id].sBufferList.pBuffers->pData; + if(pRbMap == NULL){ + printf("(%d:%d:%d)pRbMap == NULL\n", nCellIdx, ntti, ant_id); + exit(-1); + } + for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) { + for(idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++ ) { + pRbElm = &pRbMap->prbMap[idxElm]; + pRbElm->nSecDesc[sym_id] = 0; + } + } + } + } + MLogTask(PID_GNB_SRS_CB, t1, MLogTick()); +} + +void +app_io_xran_fh_rx_bfw_callback(void *pCallbackTag, xran_status_t status) { uint64_t t1 = MLogTick(); uint32_t mlogVar[10]; @@ -185,10 +306,9 @@ app_io_xran_fh_rx_srs_callback(void *pCallbackTag, xran_status_t status) MLogAddVariables(mlogVarCnt, mlogVar, MLogTick()); rte_pause(); - MLogTask(PID_GNB_SRS_CB, t1, MLogTick()); + MLogTask(PID_GNB_BFW_CB, t1, MLogTick()); } - int32_t app_io_xran_dl_tti_call_back(void * param) { @@ -243,25 +363,37 @@ app_io_xran_ul_custom_sym_call_back(void * param, struct xran_sense_of_time* tim return 0; } +uint32_t +NEXT_POW2 ( uint32_t x ) +{ + uint32_t value = 1 ; + while ( value <= x) + value = value << 1; + + return value ; +} + int32_t -app_io_xran_interface(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg, UsecaseConfig* p_use_cfg) +app_io_xran_interface(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg, UsecaseConfig* p_use_cfg, struct xran_fh_init* p_xran_fh_init) { xran_status_t status; struct bbu_xran_io_if *psBbuIo = app_io_xran_if_get(); struct xran_io_shared_ctrl *psIoCtrl = app_io_xran_if_ctrl_get(o_xu_id); int32_t nSectorIndex[XRAN_MAX_SECTOR_NR]; int32_t nSectorNum; - int32_t i, j, k, m, z; + int32_t i, j, k = 0, z; void *ptr; void *mb; + void *ring; uint32_t *u32dptr; - uint16_t *u16dptr; - uint8_t *u8dptr; uint32_t xran_max_antenna_nr = RTE_MAX(p_o_xu_cfg->numAxc, p_o_xu_cfg->numUlAxc); uint32_t xran_max_ant_array_elm_nr = RTE_MAX(p_o_xu_cfg->antElmTRx, xran_max_antenna_nr); uint32_t xran_max_sections_per_slot = RTE_MAX(p_o_xu_cfg->max_sections_per_slot, XRAN_MIN_SECTIONS_PER_SLOT); - uint32_t size_of_prb_map = sizeof(struct xran_prb_map) + sizeof(struct xran_prb_elm)*(xran_max_sections_per_slot - 1); + uint32_t xran_max_prb = app_xran_get_num_rbs(p_o_xu_cfg->xranTech, p_o_xu_cfg->mu_number,p_o_xu_cfg->nDLBandwidth, p_o_xu_cfg->nDLAbsFrePointA); + uint32_t numPrbElm = xran_get_num_prb_elm(p_o_xu_cfg->p_PrbMapDl, p_o_xu_cfg->mtu); + uint32_t size_of_prb_map = sizeof(struct xran_prb_map) + sizeof(struct xran_prb_elm)*(numPrbElm); + uint32_t xran_max_antenna_nr_prach = RTE_MIN(xran_max_antenna_nr, XRAN_MAX_PRACH_ANT_NUM); SWXRANInterfaceTypeEnum eInterfaceType; @@ -274,6 +406,9 @@ app_io_xran_interface(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg, UsecaseConfig struct xran_buffer_list *pFthRxSrsBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_N_FE_BUF_LEN]; struct xran_buffer_list *pFthRxSrsPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_N_FE_BUF_LEN]; + struct xran_buffer_list *pFthRxCpPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_N_FE_BUF_LEN]; + struct xran_buffer_list *pFthTxCpPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_N_FE_BUF_LEN]; + if(psBbuIo == NULL) rte_panic("psBbuIo == NULL\n"); @@ -285,6 +420,40 @@ app_io_xran_interface(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg, UsecaseConfig nSectorIndex[nSectorNum] = nSectorNum; } + nSectorNum = p_o_xu_cfg->numCC; + + if(o_xu_id == 0) { + psBbuIo->num_o_ru = p_use_cfg->oXuNum; + psBbuIo->bbu_offload = p_xran_fh_init->io_cfg.bbu_offload; + } + + psIoCtrl->byteOrder = XRAN_NE_BE_BYTE_ORDER; + psIoCtrl->iqOrder = XRAN_I_Q_ORDER; + + for (nSectorNum = 0; nSectorNum < XRAN_MAX_SECTOR_NR; nSectorNum++) + { + nSectorIndex[nSectorNum] = nSectorNum; + } + + if(p_use_cfg->oXuNum > 1 && p_use_cfg->oXuNum <= XRAN_PORTS_NUM) { + nSectorNum = p_o_xu_cfg->numCC; + psBbuIo->num_cc_per_port[o_xu_id] = p_o_xu_cfg->numCC; + printf("port %d has %d CCs\n",o_xu_id, psBbuIo->num_cc_per_port[o_xu_id]); + for(i = 0; i < XRAN_MAX_SECTOR_NR && i < nSectorNum; i++) { + psBbuIo->map_cell_id2port[o_xu_id][i] = (o_xu_id*nSectorNum)+i; + printf("port %d cc_id %d is phy id %d\n", o_xu_id, i, psBbuIo->map_cell_id2port[o_xu_id][i]); + } + } + else { + nSectorNum = p_o_xu_cfg->numCC;; + psBbuIo->num_cc_per_port[o_xu_id] = nSectorNum; + printf("port %d has %d CCs\n",o_xu_id, psBbuIo->num_cc_per_port[o_xu_id]); + for(i = 0; i < XRAN_MAX_SECTOR_NR && i < nSectorNum; i++) { + psBbuIo->map_cell_id2port[o_xu_id][i] = i; + printf("port %d cc_id %d is phy id %d\n", o_xu_id, i, psBbuIo->map_cell_id2port[o_xu_id][i]); + } + } + nSectorNum = p_o_xu_cfg->numCC; printf ("XRAN front haul xran_mm_init \n"); status = xran_mm_init (app_io_xran_handle, (uint64_t) SW_FPGA_FH_TOTAL_BUFFER_LEN, SW_FPGA_SEGMENT_BUFFER_LEN); @@ -296,13 +465,15 @@ app_io_xran_interface(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg, UsecaseConfig psBbuIo->nInstanceNum[o_xu_id] = p_o_xu_cfg->numCC; if (o_xu_id < XRAN_PORTS_NUM) { - status = xran_sector_get_instances (o_xu_id, app_io_xran_handle, psBbuIo->nInstanceNum[o_xu_id], &psBbuIo->nInstanceHandle[o_xu_id][0]); + status = xran_sector_get_instances (o_xu_id, app_io_xran_handle, + psBbuIo->nInstanceNum[o_xu_id], + &psBbuIo->nInstanceHandle[o_xu_id][0]); if (status != XRAN_STATUS_SUCCESS) { - printf ("get sector instance failed %d for XRAN nInstanceNum[%d] %d\n",k, psBbuIo->nInstanceNum[o_xu_id], o_xu_id); + printf ("get sector instance failed for XRAN nInstanceNum[%d] %d\n",psBbuIo->nInstanceNum[o_xu_id], o_xu_id); exit(-1); } for (i = 0; i < psBbuIo->nInstanceNum[o_xu_id]; i++) { - printf("%s [%d]: CC %d handle %p\n", __FUNCTION__, k, i, psBbuIo->nInstanceHandle[o_xu_id][i]); + printf("%s: CC %d handle %p\n", __FUNCTION__, i, psBbuIo->nInstanceHandle[o_xu_id][i]); } } else { printf ("Failed at XRAN front haul xran_mm_init \n"); @@ -319,7 +490,7 @@ app_io_xran_interface(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg, UsecaseConfig eInterfaceType = XRANFTHTX_OUT; printf("nSectorIndex[%d] = %d\n",i, nSectorIndex[i]); status = xran_bm_init(psBbuIo->nInstanceHandle[o_xu_id][i], &psBbuIo->nBufPoolIndex[o_xu_id][nSectorIndex[i]][eInterfaceType], - XRAN_N_FE_BUF_LEN*xran_max_antenna_nr*XRAN_NUM_OF_SYMBOL_PER_SLOT, nSW_ToFpga_FTH_TxBufferLen); + NEXT_POW2(XRAN_N_FE_BUF_LEN*xran_max_antenna_nr*XRAN_NUM_OF_SYMBOL_PER_SLOT)-1, nSW_ToFpga_FTH_TxBufferLen); if(XRAN_STATUS_SUCCESS != status) { rte_panic("Failed at xran_bm_init , status %d\n", status); } @@ -353,23 +524,23 @@ app_io_xran_interface(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg, UsecaseConfig // ptr_temp[2] = z; // Ant // ptr_temp[3] = k; // sym } + if(psBbuIo->bbu_offload){ + status = xran_bm_allocate_ring(psBbuIo->nInstanceHandle[o_xu_id][i], "TXO", i, j, z, k, &ring); + if(XRAN_STATUS_SUCCESS != status){ + rte_panic("Failed at xran_bm_allocate_ring , status %d\n",status); + } + psIoCtrl->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pRing = (void *)ring; } } } - - /* C-plane DL */ - eInterfaceType = XRANFTHTX_SEC_DESC_OUT; - status = xran_bm_init(psBbuIo->nInstanceHandle[o_xu_id][i], &psBbuIo->nBufPoolIndex[o_xu_id][nSectorIndex[i]][eInterfaceType], - XRAN_N_FE_BUF_LEN*xran_max_antenna_nr*XRAN_NUM_OF_SYMBOL_PER_SLOT*xran_max_sections_per_slot*XRAN_MAX_FRAGMENT, sizeof(struct xran_section_desc)); - if(XRAN_STATUS_SUCCESS != status) { - rte_panic("Failed at xran_bm_init , status %d\n", status); } + /* C-plane DL */ printf("size_of_prb_map %d\n", size_of_prb_map); eInterfaceType = XRANFTHTX_PRB_MAP_OUT; status = xran_bm_init(psBbuIo->nInstanceHandle[o_xu_id][i], &psBbuIo->nBufPoolIndex[o_xu_id][nSectorIndex[i]][eInterfaceType], - XRAN_N_FE_BUF_LEN*xran_max_antenna_nr*XRAN_NUM_OF_SYMBOL_PER_SLOT, size_of_prb_map); + NEXT_POW2(XRAN_N_FE_BUF_LEN*xran_max_antenna_nr*XRAN_NUM_OF_SYMBOL_PER_SLOT)-1, size_of_prb_map); if(XRAN_STATUS_SUCCESS != status) { rte_panic("Failed at xran_bm_init , status %d\n", status); } @@ -384,7 +555,6 @@ app_io_xran_interface(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg, UsecaseConfig psIoCtrl->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT; psIoCtrl->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psIoCtrl->sFrontHaulTxPrbMapBuffers[j][i][z]; - { psIoCtrl->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nElementLenInBytes = size_of_prb_map; psIoCtrl->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nNumberOfElements = 1; psIoCtrl->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nOffsetInBytes = 0; @@ -396,36 +566,29 @@ app_io_xran_interface(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg, UsecaseConfig psIoCtrl->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pCtrl = (void *)mb; if(ptr){ - void *sd_ptr; - void *sd_mb; - int32_t elm_id; struct xran_prb_map * p_rb_map = (struct xran_prb_map *)ptr; + memset(p_rb_map, 0, size_of_prb_map); if (p_o_xu_cfg->appMode == APP_O_DU) { if(p_o_xu_cfg->RunSlotPrbMapEnabled) { - memcpy(ptr, p_o_xu_cfg->p_RunSlotPrbMap[XRAN_DIR_DL][j][i][z], size_of_prb_map); + if(p_o_xu_cfg->RunSlotPrbMapBySymbolEnable){ + xran_init_PrbMap_by_symbol_from_cfg(p_o_xu_cfg->p_RunSlotPrbMap[XRAN_DIR_DL][j][i][z], ptr, p_o_xu_cfg->mtu, xran_max_prb); + } + else { + xran_init_PrbMap_from_cfg(p_o_xu_cfg->p_RunSlotPrbMap[XRAN_DIR_DL][j][i][z], ptr, p_o_xu_cfg->mtu); + } } else { - memcpy(ptr, p_o_xu_cfg->p_PrbMapDl, size_of_prb_map); + xran_init_PrbMap_from_cfg(p_o_xu_cfg->p_PrbMapDl, ptr, p_o_xu_cfg->mtu); } } else { if(p_o_xu_cfg->RunSlotPrbMapEnabled) { - memcpy(ptr, p_o_xu_cfg->p_RunSlotPrbMap[XRAN_DIR_UL][j][i][z], size_of_prb_map); - } else { - memcpy(ptr, p_o_xu_cfg->p_PrbMapUl, size_of_prb_map); - } - } - - for (elm_id = 0; elm_id < p_rb_map->nPrbElm; elm_id++){ - struct xran_prb_elm *pPrbElem = &p_rb_map->prbMap[elm_id]; - for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++){ - for(m = 0; m < XRAN_MAX_FRAGMENT; m++){ - status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[o_xu_id][i], psBbuIo->nBufPoolIndex[o_xu_id][nSectorIndex[i]][XRANFTHTX_SEC_DESC_OUT],&sd_ptr, &sd_mb); - if(XRAN_STATUS_SUCCESS != status){ - rte_panic("SD Failed at DESC_OUT xran_bm_allocate_buffer , m %d k %d elm_id %d\n",m,k, elm_id); - } - pPrbElem->p_sec_desc[k][m] = sd_ptr; - memset(sd_ptr,0,sizeof(struct xran_section_desc)); + if(p_o_xu_cfg->RunSlotPrbMapBySymbolEnable){ + xran_init_PrbMap_by_symbol_from_cfg(p_o_xu_cfg->p_RunSlotPrbMap[XRAN_DIR_UL][j][i][z], ptr, p_o_xu_cfg->mtu, xran_max_prb); } + else { + xran_init_PrbMap_from_cfg(p_o_xu_cfg->p_RunSlotPrbMap[XRAN_DIR_UL][j][i][z], ptr, p_o_xu_cfg->mtu); } + } else { + xran_init_PrbMap_from_cfg(p_o_xu_cfg->p_PrbMapUl, ptr, p_o_xu_cfg->mtu); } } } @@ -436,7 +599,8 @@ app_io_xran_interface(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg, UsecaseConfig for(i = 0; inInstanceHandle[o_xu_id][i], &psBbuIo->nBufPoolIndex[o_xu_id][nSectorIndex[i]][eInterfaceType], XRAN_N_FE_BUF_LEN*xran_max_antenna_nr*XRAN_NUM_OF_SYMBOL_PER_SLOT, nSW_ToFpga_FTH_TxBufferLen); + status = xran_bm_init(psBbuIo->nInstanceHandle[o_xu_id][i], &psBbuIo->nBufPoolIndex[o_xu_id][nSectorIndex[i]][eInterfaceType], + NEXT_POW2(XRAN_N_FE_BUF_LEN*xran_max_antenna_nr*XRAN_NUM_OF_SYMBOL_PER_SLOT)-1, nSW_ToFpga_FTH_TxBufferLen); if(XRAN_STATUS_SUCCESS != status) { printf("Failed at xran_bm_init, status %d\n", status); @@ -465,7 +629,7 @@ app_io_xran_interface(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg, UsecaseConfig psIoCtrl->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *) mb; if(ptr){ u32dptr = (uint32_t*)(ptr); - uint8_t *ptr_temp = (uint8_t *)ptr; + //uint8_t *ptr_temp = (uint8_t *)ptr; memset(u32dptr, 0x0, nFpgaToSW_FTH_RxBufferLen); // ptr_temp[0] = j; // TTI // ptr_temp[1] = i; // Sec @@ -477,15 +641,9 @@ app_io_xran_interface(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg, UsecaseConfig } /* C-plane */ - eInterfaceType = XRANFTHTX_SEC_DESC_IN; - status = xran_bm_init(psBbuIo->nInstanceHandle[o_xu_id][i], &psBbuIo->nBufPoolIndex[o_xu_id][nSectorIndex[i]][eInterfaceType], - XRAN_N_FE_BUF_LEN*xran_max_antenna_nr*XRAN_NUM_OF_SYMBOL_PER_SLOT*xran_max_sections_per_slot*XRAN_MAX_FRAGMENT, sizeof(struct xran_section_desc)); - if(XRAN_STATUS_SUCCESS != status) { - rte_panic("Failed at xran_bm_init , status %d\n", status); - } eInterfaceType = XRANFTHRX_PRB_MAP_IN; status = xran_bm_init(psBbuIo->nInstanceHandle[o_xu_id][i], &psBbuIo->nBufPoolIndex[o_xu_id][nSectorIndex[i]][eInterfaceType], - XRAN_N_FE_BUF_LEN*xran_max_antenna_nr*XRAN_NUM_OF_SYMBOL_PER_SLOT, size_of_prb_map); + NEXT_POW2(XRAN_N_FE_BUF_LEN*xran_max_antenna_nr*XRAN_NUM_OF_SYMBOL_PER_SLOT)-1, size_of_prb_map); if(XRAN_STATUS_SUCCESS != status) { rte_panic("Failed at xran_bm_init, status %d\n", status); } @@ -498,7 +656,7 @@ app_io_xran_interface(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg, UsecaseConfig psIoCtrl->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred = 0; psIoCtrl->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT; psIoCtrl->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psIoCtrl->sFrontHaulRxPrbMapBuffers[j][i][z]; - { + psIoCtrl->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nElementLenInBytes = size_of_prb_map; psIoCtrl->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nNumberOfElements = 1; psIoCtrl->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nOffsetInBytes = 0; @@ -509,37 +667,112 @@ app_io_xran_interface(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg, UsecaseConfig psIoCtrl->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pData = (uint8_t *)ptr; psIoCtrl->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pCtrl = (void *)mb; if(ptr){ - void *sd_ptr; - void *sd_mb; - int32_t elm_id; struct xran_prb_map * p_rb_map = (struct xran_prb_map *)ptr; + memset(p_rb_map, 0, size_of_prb_map); if (p_o_xu_cfg->appMode == APP_O_DU) { if(p_o_xu_cfg->RunSlotPrbMapEnabled) { - memcpy(ptr, p_o_xu_cfg->p_RunSlotPrbMap[XRAN_DIR_UL][j][i][z], size_of_prb_map); + if(p_o_xu_cfg->RunSlotPrbMapBySymbolEnable){ + xran_init_PrbMap_by_symbol_from_cfg(p_o_xu_cfg->p_RunSlotPrbMap[XRAN_DIR_UL][j][i][z], ptr, p_o_xu_cfg->mtu, xran_max_prb); + } + else { + xran_init_PrbMap_from_cfg(p_o_xu_cfg->p_RunSlotPrbMap[XRAN_DIR_UL][j][i][z], ptr, p_o_xu_cfg->mtu); + } } else { - memcpy(ptr, p_o_xu_cfg->p_PrbMapUl, size_of_prb_map); + xran_init_PrbMap_from_cfg(p_o_xu_cfg->p_PrbMapUl, ptr, p_o_xu_cfg->mtu); } } else { if(p_o_xu_cfg->RunSlotPrbMapEnabled) { + if(p_o_xu_cfg->RunSlotPrbMapBySymbolEnable){ + xran_init_PrbMap_by_symbol_from_cfg(p_o_xu_cfg->p_RunSlotPrbMap[XRAN_DIR_DL][j][i][z], ptr, p_o_xu_cfg->mtu, xran_max_prb); + } + else { + xran_init_PrbMap_from_cfg(p_o_xu_cfg->p_RunSlotPrbMap[XRAN_DIR_DL][j][i][z], ptr, p_o_xu_cfg->mtu); + } + } else { + xran_init_PrbMap_from_cfg(p_o_xu_cfg->p_PrbMapDl, ptr, p_o_xu_cfg->mtu); + } + } + } + } + } + + if(p_o_xu_cfg->appMode == APP_O_RU){ + /* C-plane Rx */ + eInterfaceType = XRANCP_PRB_MAP_IN_RX; + status = xran_bm_init(psBbuIo->nInstanceHandle[o_xu_id][i], &psBbuIo->nBufPoolIndex[o_xu_id][nSectorIndex[i]][eInterfaceType], + XRAN_N_FE_BUF_LEN*xran_max_antenna_nr*XRAN_NUM_OF_SYMBOL_PER_SLOT, size_of_prb_map); + if(XRAN_STATUS_SUCCESS != status) { + rte_panic("Failed at xran_bm_init, status %d\n", status); + } + + for(j = 0;j < XRAN_N_FE_BUF_LEN; j++) { + for(z = 0; z < xran_max_antenna_nr; z++){ + psIoCtrl->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].bValid = 0; + psIoCtrl->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].nSegGenerated = -1; + psIoCtrl->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].nSegToBeGen = -1; + psIoCtrl->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred = 0; + psIoCtrl->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT; + psIoCtrl->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psIoCtrl->sFrontHaulCpRxPrbMapBbuIoBufCtrl[j][i][z]; + + psIoCtrl->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nElementLenInBytes = size_of_prb_map; + psIoCtrl->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nNumberOfElements = 1; + psIoCtrl->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nOffsetInBytes = 0; + status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[o_xu_id][i],psBbuIo->nBufPoolIndex[o_xu_id][nSectorIndex[i]][eInterfaceType],&ptr, &mb); + if(XRAN_STATUS_SUCCESS != status) { + rte_panic("Failed at xran_bm_allocate_buffer , status %d\n",status); + } + psIoCtrl->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pData = (uint8_t *)ptr; + psIoCtrl->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pCtrl = (void *)mb; + + if(ptr){ + struct xran_prb_map * p_rb_map = (struct xran_prb_map *)ptr; + memset(p_rb_map, 0, size_of_prb_map); + + if(p_o_xu_cfg->RunSlotPrbMapEnabled) { memcpy(ptr, p_o_xu_cfg->p_RunSlotPrbMap[XRAN_DIR_DL][j][i][z], size_of_prb_map); } else { memcpy(ptr, p_o_xu_cfg->p_PrbMapDl, size_of_prb_map); } } + } + } - for (elm_id = 0; elm_id < p_rb_map->nPrbElm; elm_id++){ - struct xran_prb_elm *pPrbElem = &p_rb_map->prbMap[elm_id]; - for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++){ - for(m = 0; m < XRAN_MAX_FRAGMENT; m++){ - status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[o_xu_id][i], psBbuIo->nBufPoolIndex[o_xu_id][nSectorIndex[i]][XRANFTHTX_SEC_DESC_IN],&sd_ptr, &sd_mb); + +/* C-plane Tx */ + eInterfaceType = XRANCP_PRB_MAP_IN_TX; + status = xran_bm_init(psBbuIo->nInstanceHandle[o_xu_id][i], &psBbuIo->nBufPoolIndex[o_xu_id][nSectorIndex[i]][eInterfaceType], + NEXT_POW2(XRAN_N_FE_BUF_LEN*xran_max_antenna_nr*XRAN_NUM_OF_SYMBOL_PER_SLOT)-1, size_of_prb_map); if(XRAN_STATUS_SUCCESS != status){ - rte_panic("SD Failed at DESC_IN xran_bm_allocate_buffer , m %d k %d\n",m,k); - } - pPrbElem->p_sec_desc[k][m] = sd_ptr; - memset(sd_ptr,0,sizeof(struct xran_section_desc)); + rte_panic("Failed at xran_bm_init, status %d\n", status); } + + for(j = 0;j < XRAN_N_FE_BUF_LEN; j++) { + for(z = 0; z < xran_max_antenna_nr; z++){ + psIoCtrl->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].bValid = 0; + psIoCtrl->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].nSegGenerated = -1; + psIoCtrl->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].nSegToBeGen = -1; + psIoCtrl->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred = 0; + psIoCtrl->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT; + psIoCtrl->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psIoCtrl->sFrontHaulCpTxPrbMapBbuIoBufCtrl[j][i][z]; + + psIoCtrl->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nElementLenInBytes = size_of_prb_map; + psIoCtrl->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nNumberOfElements = 1; + psIoCtrl->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nOffsetInBytes = 0; + status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[o_xu_id][i],psBbuIo->nBufPoolIndex[o_xu_id][nSectorIndex[i]][eInterfaceType],&ptr, &mb); + if(XRAN_STATUS_SUCCESS != status) { + rte_panic("Failed at xran_bm_allocate_buffer , status %d\n",status); } + psIoCtrl->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pData = (uint8_t *)ptr; + psIoCtrl->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pCtrl = (void *)mb; + if(ptr){ + struct xran_prb_map * p_rb_map = (struct xran_prb_map *)ptr; + memset(p_rb_map, 0, size_of_prb_map); + + if(p_o_xu_cfg->RunSlotPrbMapEnabled) { + memcpy(ptr, p_o_xu_cfg->p_RunSlotPrbMap[XRAN_DIR_DL][j][i][z], size_of_prb_map); + } else { + xran_init_PrbMap_from_cfg(p_o_xu_cfg->p_PrbMapDl, ptr, p_o_xu_cfg->mtu); } } } @@ -551,18 +784,19 @@ app_io_xran_interface(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg, UsecaseConfig for(i = 0; inInstanceHandle[o_xu_id][i],&psBbuIo->nBufPoolIndex[o_xu_id][nSectorIndex[i]][eInterfaceType],XRAN_N_FE_BUF_LEN*xran_max_antenna_nr*XRAN_NUM_OF_SYMBOL_PER_SLOT, PRACH_PLAYBACK_BUFFER_BYTES); + status = xran_bm_init(psBbuIo->nInstanceHandle[o_xu_id][i],&psBbuIo->nBufPoolIndex[o_xu_id][nSectorIndex[i]][eInterfaceType], + NEXT_POW2(XRAN_N_FE_BUF_LEN*xran_max_antenna_nr_prach*XRAN_NUM_OF_SYMBOL_PER_SLOT)-1, PRACH_PLAYBACK_BUFFER_BYTES); if(XRAN_STATUS_SUCCESS != status) { rte_panic("Failed at xran_bm_init, status %d\n", status); } for(j = 0;j < XRAN_N_FE_BUF_LEN; j++) { - for(z = 0; z < xran_max_antenna_nr; z++){ + for(z = 0; z < xran_max_antenna_nr_prach; z++){ psIoCtrl->sFHPrachRxBbuIoBufCtrl[j][i][z].bValid = 0; psIoCtrl->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1; psIoCtrl->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1; psIoCtrl->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0; - psIoCtrl->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = xran_max_antenna_nr; // ant number. + psIoCtrl->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = xran_max_antenna_nr_prach; // ant number. psIoCtrl->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psIoCtrl->sFHPrachRxBuffers[j][i][z][0]; psIoCtrl->sFHPrachRxBbuIoBufCtrlDecomp[j][i][z].sBufferList.pBuffers = &psIoCtrl->sFHPrachRxBuffersDecomp[j][i][z][0]; for(k = 0; k< XRAN_NUM_OF_SYMBOL_PER_SLOT; k++) @@ -594,7 +828,7 @@ app_io_xran_interface(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg, UsecaseConfig for(i = 0; inInstanceHandle[o_xu_id][i],&psBbuIo->nBufPoolIndex[o_xu_id][nSectorIndex[i]][eInterfaceType], - XRAN_N_FE_BUF_LEN*xran_max_ant_array_elm_nr*XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT, nSW_ToFpga_FTH_TxBufferLen); + NEXT_POW2(XRAN_N_FE_BUF_LEN*xran_max_ant_array_elm_nr*XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT)-1, nSW_ToFpga_FTH_TxBufferLen); if(XRAN_STATUS_SUCCESS != status) { rte_panic("Failed at xran_bm_init, status %d\n", status); @@ -627,15 +861,9 @@ app_io_xran_interface(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg, UsecaseConfig } /* SRS C-plane */ - eInterfaceType = XRANSRS_SEC_DESC_IN; - status = xran_bm_init(psBbuIo->nInstanceHandle[o_xu_id][i], &psBbuIo->nBufPoolIndex[o_xu_id][nSectorIndex[i]][eInterfaceType], - XRAN_N_FE_BUF_LEN*xran_max_ant_array_elm_nr*xran_max_sections_per_slot*XRAN_NUM_OF_SYMBOL_PER_SLOT*XRAN_MAX_FRAGMENT, sizeof(struct xran_section_desc)); - if(XRAN_STATUS_SUCCESS != status) { - rte_panic("Failed at xran_bm_init , status %d\n", status); - } eInterfaceType = XRANSRS_PRB_MAP_IN; status = xran_bm_init(psBbuIo->nInstanceHandle[o_xu_id][i], &psBbuIo->nBufPoolIndex[o_xu_id][nSectorIndex[i]][eInterfaceType], - XRAN_N_FE_BUF_LEN*xran_max_ant_array_elm_nr*XRAN_NUM_OF_SYMBOL_PER_SLOT, size_of_prb_map); + NEXT_POW2(XRAN_N_FE_BUF_LEN*xran_max_ant_array_elm_nr*XRAN_NUM_OF_SYMBOL_PER_SLOT)-1, size_of_prb_map); if(XRAN_STATUS_SUCCESS != status) { rte_panic("Failed at xran_bm_init, status %d\n", status); } @@ -648,7 +876,7 @@ app_io_xran_interface(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg, UsecaseConfig psIoCtrl->sFHSrsRxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred = 0; psIoCtrl->sFHSrsRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT; psIoCtrl->sFHSrsRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psIoCtrl->sFHSrsRxPrbMapBuffers[j][i][z]; - { + psIoCtrl->sFHSrsRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nElementLenInBytes = size_of_prb_map; psIoCtrl->sFHSrsRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nNumberOfElements = 1; psIoCtrl->sFHSrsRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nOffsetInBytes = 0; @@ -660,10 +888,8 @@ app_io_xran_interface(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg, UsecaseConfig psIoCtrl->sFHSrsRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pCtrl = (void *)mb; if(ptr) { - void *sd_ptr; - void *sd_mb; - int32_t elm_id; struct xran_prb_map * p_rb_map = (struct xran_prb_map *)ptr; + memset(p_rb_map, 0, size_of_prb_map); if (p_o_xu_cfg->appMode == APP_O_DU) { if(p_o_xu_cfg->RunSlotPrbMapEnabled) { @@ -675,24 +901,10 @@ app_io_xran_interface(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg, UsecaseConfig if(p_o_xu_cfg->RunSlotPrbMapEnabled) { memcpy(ptr, p_o_xu_cfg->p_RunSrsSlotPrbMap[XRAN_DIR_DL][j][i][z], size_of_prb_map); } else { - memcpy(ptr, p_o_xu_cfg->p_PrbMapSrs, size_of_prb_map); + //memcpy(ptr, p_o_xu_cfg->p_PrbMapSrs, size_of_prb_map); + xran_init_PrbMap_from_cfg(p_o_xu_cfg->p_PrbMapSrs, ptr, p_o_xu_cfg->mtu); } } - - for (elm_id = 0; elm_id < p_rb_map->nPrbElm; elm_id++){ - struct xran_prb_elm *pPrbElem = &p_rb_map->prbMap[elm_id]; - for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++){ - for(m = 0; m < XRAN_MAX_FRAGMENT; m++){ - status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[o_xu_id][i], psBbuIo->nBufPoolIndex[o_xu_id][nSectorIndex[i]][XRANSRS_SEC_DESC_IN],&sd_ptr, &sd_mb); - if(XRAN_STATUS_SUCCESS != status){ - rte_panic("SD Failed at SRS_SEC_DESC_IN xran_bm_allocate_buffer , m %d k %d\n",m,k); - } - pPrbElem->p_sec_desc[k][m] = sd_ptr; - memset(sd_ptr,0,sizeof(struct xran_section_desc)); - } - } - } - } } } } @@ -709,6 +921,8 @@ app_io_xran_interface(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg, UsecaseConfig pFthRxPrbMapBuffer[i][z][j] = NULL; pFthRxRachBuffer[i][z][j] = NULL; pFthRxRachBufferDecomp[i][z][j] = NULL; + pFthRxCpPrbMapBuffer[i][z][j] = NULL; + pFthTxCpPrbMapBuffer[i][z][j] = NULL; } for(z = 0; z < XRAN_MAX_ANT_ARRAY_ELM_NR; z++){ pFthRxSrsBuffer[i][z][j] = NULL; @@ -728,6 +942,8 @@ app_io_xran_interface(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg, UsecaseConfig pFthRxPrbMapBuffer[i][z][j] = &(psIoCtrl->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList); pFthRxRachBuffer[i][z][j] = &(psIoCtrl->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList); pFthRxRachBufferDecomp[i][z][j] = &(psIoCtrl->sFHPrachRxBbuIoBufCtrlDecomp[j][i][z].sBufferList); + pFthRxCpPrbMapBuffer[i][z][j] = &(psIoCtrl->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList); + pFthTxCpPrbMapBuffer[i][z][j] = &(psIoCtrl->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList); } for(z = 0; z < XRAN_MAX_ANT_ARRAY_ELM_NR && xran_max_ant_array_elm_nr; z++){ @@ -742,9 +958,18 @@ app_io_xran_interface(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg, UsecaseConfig /* add pusch callback */ for (i = 0; iRxCbTag[o_xu_id][i].oXuId = o_xu_id; psBbuIo->RxCbTag[o_xu_id][i].cellId = i; psBbuIo->RxCbTag[o_xu_id][i].symbol = 0; psBbuIo->RxCbTag[o_xu_id][i].slotiId = 0; + if(psBbuIo->bbu_offload) + xran_5g_fronthault_config (psBbuIo->nInstanceHandle[o_xu_id][i], + pFthTxBuffer[i], + pFthTxPrbMapBuffer[i], + pFthRxBuffer[i], + pFthRxPrbMapBuffer[i], + app_io_xran_fh_bbu_rx_callback, &psBbuIo->RxCbTag[o_xu_id][i]); + else xran_5g_fronthault_config (psBbuIo->nInstanceHandle[o_xu_id][i], pFthTxBuffer[i], pFthTxPrbMapBuffer[i], @@ -752,21 +977,50 @@ app_io_xran_interface(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg, UsecaseConfig pFthRxPrbMapBuffer[i], app_io_xran_fh_rx_callback, &psBbuIo->RxCbTag[o_xu_id][i]); } + /* add BFWs callback here */ + for (i = 0; iBfwCbTag[o_xu_id][i].cellId = o_xu_id; + psBbuIo->BfwCbTag[o_xu_id][i].cellId = i; + psBbuIo->BfwCbTag[o_xu_id][i].symbol = 0; + psBbuIo->BfwCbTag[o_xu_id][i].slotiId = 0; +#if 0 + if(psBbuIo->bbu_offload) + xran_5g_bfw_config(psBbuIo->nInstanceHandle[o_xu_id][i], + pFthRxCpPrbMapBuffer[i], + pFthTxCpPrbMapBuffer[i], + app_io_xran_fh_bbu_rx_bfw_callback,&psBbuIo->BfwCbTag[o_xu_id][i]); + else +#endif + xran_5g_bfw_config(psBbuIo->nInstanceHandle[o_xu_id][i], + pFthRxCpPrbMapBuffer[i], + pFthTxCpPrbMapBuffer[i], + app_io_xran_fh_rx_bfw_callback,&psBbuIo->BfwCbTag[o_xu_id][i]); + } /* add prach callback here */ for (i = 0; iPrachCbTag[o_xu_id][i].oXuId = o_xu_id; psBbuIo->PrachCbTag[o_xu_id][i].cellId = i; psBbuIo->PrachCbTag[o_xu_id][i].symbol = 0; psBbuIo->PrachCbTag[o_xu_id][i].slotiId = 0; + if(psBbuIo->bbu_offload) + xran_5g_prach_req(psBbuIo->nInstanceHandle[o_xu_id][i], pFthRxRachBuffer[i],pFthRxRachBufferDecomp[i], + app_io_xran_fh_bbu_rx_prach_callback,&psBbuIo->PrachCbTag[o_xu_id][i]); + else xran_5g_prach_req(psBbuIo->nInstanceHandle[o_xu_id][i], pFthRxRachBuffer[i],pFthRxRachBufferDecomp[i], app_io_xran_fh_rx_prach_callback,&psBbuIo->PrachCbTag[o_xu_id][i]); } /* add SRS callback here */ for (i = 0; iSrsCbTag[o_xu_id][i].oXuId = o_xu_id; psBbuIo->SrsCbTag[o_xu_id][i].cellId = i; psBbuIo->SrsCbTag[o_xu_id][i].symbol = 0; psBbuIo->SrsCbTag[o_xu_id][i].slotiId = 0; + if(psBbuIo->bbu_offload) + xran_5g_srs_req(psBbuIo->nInstanceHandle[o_xu_id][i], pFthRxSrsBuffer[i], pFthRxSrsPrbMapBuffer[i], + app_io_xran_fh_bbu_rx_srs_callback,&psBbuIo->SrsCbTag[o_xu_id][i]); + else xran_5g_srs_req(psBbuIo->nInstanceHandle[o_xu_id][i], pFthRxSrsBuffer[i], pFthRxSrsPrbMapBuffer[i], app_io_xran_fh_rx_srs_callback,&psBbuIo->SrsCbTag[o_xu_id][i]); } @@ -776,7 +1030,53 @@ app_io_xran_interface(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg, UsecaseConfig } int32_t -app_io_xran_ext_type11_populate(struct xran_prb_elm* p_pRbMapElm, int16_t *p_tx_dl_bfw_buffer, uint32_t mtu) +app_io_xran_ext_type1_populate(struct xran_prb_elm* p_pRbMapElm, char *p_bfw_buffer, uint32_t mtu, uint16_t* numSetBFW_total) +{ + xran_status_t status = XRAN_STATUS_SUCCESS; + + int16_t ext_len; + int16_t ext_sec_total = 0; + int8_t * ext_buf = NULL; + int8_t * ext_buf_start = NULL; + + ext_len = p_pRbMapElm->bf_weight.maxExtBufSize = mtu; /* MAX_RX_LEN; */ /* Maximum space of external buffer */ + if (p_pRbMapElm->bf_weight.p_ext_start) + ext_buf = (int8_t *)p_pRbMapElm->bf_weight.p_ext_start; + else + ext_buf = (int8_t *)xran_malloc(p_pRbMapElm->bf_weight.maxExtBufSize); + + if(ext_buf == NULL) + rte_panic("xran_malloc return NULL [sz %d]\n", p_pRbMapElm->bf_weight.maxExtBufSize); + + if(ext_buf) { + ext_buf_start = ext_buf; + ext_buf += (RTE_PKTMBUF_HEADROOM + + sizeof(struct xran_ecpri_hdr) + + sizeof(struct xran_cp_radioapp_section1_header)); + + ext_len -= (RTE_PKTMBUF_HEADROOM + + sizeof(struct xran_ecpri_hdr) + + sizeof(struct xran_cp_radioapp_section1_header)); + + ext_sec_total = xran_cp_populate_section_ext_1((int8_t *)ext_buf, + ext_len, + (int16_t *) (p_bfw_buffer + (*numSetBFW_total*p_pRbMapElm->bf_weight.nAntElmTRx)*4), + p_pRbMapElm); + if(ext_sec_total > 0) { + p_pRbMapElm->bf_weight.p_ext_start = ext_buf_start; + p_pRbMapElm->bf_weight.p_ext_section = ext_buf; + p_pRbMapElm->bf_weight.ext_section_sz = ext_sec_total; + } else + rte_panic("xran_cp_populate_section_ext_1 return error [%d]\n", ext_sec_total); + } else { + rte_panic("xran_malloc return NULL\n"); + } + + return status; +} + +int32_t +app_io_xran_ext_type11_populate(struct xran_prb_elm* p_pRbMapElm, char *p_tx_dl_bfw_buffer, uint32_t mtu) { xran_status_t status = XRAN_STATUS_SUCCESS; @@ -785,9 +1085,12 @@ app_io_xran_ext_type11_populate(struct xran_prb_elm* p_pRbMapElm, int16_t *p_tx_ int32_t n_max_set_bfw; p_pRbMapElm->bf_weight.maxExtBufSize = mtu; /* MAX_RX_LEN; */ /* Maximum space of external buffer */ + if (p_pRbMapElm->bf_weight.p_ext_start) + extbuf = (uint8_t *)p_pRbMapElm->bf_weight.p_ext_start; + else extbuf = (uint8_t*)xran_malloc(p_pRbMapElm->bf_weight.maxExtBufSize); if(extbuf == NULL) - rte_panic("xran_malloc return NULL\n"); + rte_panic("xran_malloc return NULL [sz %d]\n", p_pRbMapElm->bf_weight.maxExtBufSize); /* Check BFWs can be fit with MTU size */ n_max_set_bfw = xran_cp_estimate_max_set_bfws(p_pRbMapElm->bf_weight.nAntElmTRx, @@ -840,8 +1143,8 @@ app_io_xran_iq_content_init_cp_rb_map(struct xran_prb_map* pRbMap, pRbMap->prbMap[0].nRBSize = nRBs; pRbMap->prbMap[0].nStartSymb = 0; pRbMap->prbMap[0].numSymb = 14; - pRbMap->prbMap[0].p_sec_desc[sym_id][0]->iq_buffer_offset = 0; - pRbMap->prbMap[0].p_sec_desc[sym_id][0]->iq_buffer_len = nRBs *4L; + pRbMap->prbMap[0].sec_desc[sym_id][0].iq_buffer_offset = 0; + pRbMap->prbMap[0].sec_desc[sym_id][0].iq_buffer_len = nRBs *4L; pRbMap->prbMap[0].nBeamIndex = 0; pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE; @@ -852,22 +1155,31 @@ app_io_xran_iq_content_init_cp_rb_map(struct xran_prb_map* pRbMap, int32_t app_io_xran_iq_content_init_cp_tx(uint8_t appMode, struct xran_fh_config *pXranConf, struct bbu_xran_io_if *psBbuIo, struct xran_io_shared_ctrl *psIoCtrl, struct o_xu_buffers * p_iq, - int32_t cc_id, int32_t ant_id, int32_t sym_id, int32_t tti, int32_t flowId) + int32_t cc_id, int32_t ant_id, int32_t sym_id, int32_t target_tti, int32_t flowId) { int32_t status = 0; struct xran_prb_map* pRbMap = NULL; + char* dl_bfw_pos = NULL; + + int32_t tti_dst = target_tti % XRAN_N_FE_BUF_LEN; + int32_t tti_src = target_tti % p_iq->numSlots; + int32_t tx_dl_bfw_buffer_position = tti_src * (pXranConf->nDLRBs*pXranConf->nAntElmTRx)*4; + uint16_t numSetBFW_total = 0; if(p_iq->p_tx_play_buffer[flowId]) { - pRbMap = (struct xran_prb_map *) psIoCtrl->sFrontHaulTxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData; + cc_id = cc_id % XRAN_MAX_SECTOR_NR; + ant_id = ant_id % XRAN_MAX_ANTENNA_NR; + pRbMap = (struct xran_prb_map *) psIoCtrl->sFrontHaulTxPrbMapBbuIoBufCtrl[tti_dst][cc_id][ant_id].sBufferList.pBuffers->pData; + dl_bfw_pos = ((char*)p_iq->p_tx_dl_bfw_buffer[flowId]) + tx_dl_bfw_buffer_position; if(pRbMap) { if (pXranConf->DynamicSectionEna == 0) { - app_io_xran_iq_content_init_cp_rb_map(pRbMap, XRAN_DIR_DL, cc_id, ant_id, sym_id, tti, pXranConf->nDLRBs); + if(pRbMap->nPrbElm != 1 ) + app_io_xran_iq_content_init_cp_rb_map(pRbMap, XRAN_DIR_DL, cc_id, ant_id, sym_id, tti_dst, pXranConf->nDLRBs); } else if(pXranConf->ru_conf.xranCat == XRAN_CATEGORY_B && appMode == APP_O_DU && sym_id == 0) { /* BFWs are per slot */ int32_t idxElm = 0; - char* dl_bfw_pos = ((char*)p_iq->p_tx_dl_bfw_buffer[flowId]) + p_iq->tx_dl_bfw_buffer_position[flowId]; struct xran_prb_elm* p_pRbMapElm = NULL; for(idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++) { @@ -875,54 +1187,19 @@ app_io_xran_iq_content_init_cp_tx(uint8_t appMode, struct xran_fh_config *pXra p_pRbMapElm->bf_weight.nAntElmTRx = pXranConf->nAntElmTRx; if(p_pRbMapElm->BeamFormingType == XRAN_BEAM_WEIGHT && p_pRbMapElm->bf_weight_update) { - if(p_pRbMapElm->bf_weight.numBundPrb == 0) { - /* No bundled PRB, using extension 1 */ - int16_t ext_len = 9600; - int16_t ext_sec_total = 0; - int8_t * ext_buf =(int8_t*) xran_malloc(ext_len); - int8_t * ext_buf_start = ext_buf; - if(ext_buf) { - ext_buf += (RTE_PKTMBUF_HEADROOM + - sizeof(struct xran_ecpri_hdr) + - sizeof(struct xran_cp_radioapp_section1_header) + - sizeof(struct xran_cp_radioapp_section1)); - - ext_len -= (RTE_PKTMBUF_HEADROOM + - sizeof(struct xran_ecpri_hdr) + - sizeof(struct xran_cp_radioapp_section1_header) + - sizeof(struct xran_cp_radioapp_section1)); - - ext_sec_total = xran_cp_populate_section_ext_1((int8_t *)ext_buf, - ext_len, - (int16_t *) (dl_bfw_pos + (p_pRbMapElm->nRBStart*p_pRbMapElm->bf_weight.nAntElmTRx)*4), - p_pRbMapElm->nRBSize, - p_pRbMapElm->bf_weight.nAntElmTRx, - p_pRbMapElm->iqWidth, p_pRbMapElm->compMethod); - if(ext_sec_total > 0) { - p_pRbMapElm->bf_weight.p_ext_start = ext_buf_start; - p_pRbMapElm->bf_weight.p_ext_section = ext_buf; - p_pRbMapElm->bf_weight.ext_section_sz = ext_sec_total; - } else - rte_panic("xran_cp_populate_section_ext_1 return error [%d]\n", ext_sec_total); + if(p_pRbMapElm->bf_weight.extType == 1) { + app_io_xran_ext_type1_populate(p_pRbMapElm, dl_bfw_pos, app_io_xran_fh_init.mtu, &numSetBFW_total); } else { - rte_panic("xran_malloc return NULL\n"); - } - } else { - app_io_xran_ext_type11_populate(p_pRbMapElm, p_iq->p_tx_dl_bfw_buffer[flowId], app_io_xran_fh_init.mtu); + app_io_xran_ext_type11_populate(p_pRbMapElm, dl_bfw_pos, app_io_xran_fh_init.mtu); } } + numSetBFW_total += p_pRbMapElm->bf_weight.numSetBFWs; } } } else { - printf("DL pRbMap ==NULL\n"); + printf("DL pRbMap ==NULL [%d][%d][%d]\n", tti_dst, cc_id, ant_id); exit(-1); } - - if(pXranConf->ru_conf.xranCat == XRAN_CATEGORY_B && appMode == APP_O_DU && sym_id == 0) { - p_iq->tx_dl_bfw_buffer_position[flowId] += (pXranConf->nDLRBs*pXranConf->nAntElmTRx)*4; - if(p_iq->tx_dl_bfw_buffer_position[flowId] >= p_iq->tx_dl_bfw_buffer_size[flowId]) - p_iq->tx_dl_bfw_buffer_position[flowId] = 0; - } } else { //printf("flowId %d\n", flowId); } @@ -934,22 +1211,30 @@ app_io_xran_iq_content_init_cp_tx(uint8_t appMode, struct xran_fh_config *pXra int32_t app_io_xran_iq_content_init_cp_rx(uint8_t appMode, struct xran_fh_config *pXranConf, struct bbu_xran_io_if *psBbuIo, struct xran_io_shared_ctrl *psIoCtrl, struct o_xu_buffers * p_iq, - int32_t cc_id, int32_t ant_id, int32_t sym_id, int32_t tti, int32_t flowId) + int32_t cc_id, int32_t ant_id, int32_t sym_id, int32_t target_tti, int32_t flowId) { - int32_t status = 0; struct xran_prb_map* pRbMap = NULL; - char *pos = NULL; - void *ptr = NULL; + char* ul_bfw_pos = NULL; + + int32_t tti_dst = target_tti % XRAN_N_FE_BUF_LEN; + int32_t tti_src = target_tti % p_iq->numSlots; + int32_t tx_ul_bfw_buffer_position = tti_src * (pXranConf->nULRBs*pXranConf->nAntElmTRx)*4; + + uint16_t numSetBFW_total = 0; - pRbMap = (struct xran_prb_map *) psIoCtrl->sFrontHaulRxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData; + cc_id = cc_id % XRAN_MAX_SECTOR_NR; + ant_id = ant_id % XRAN_MAX_ANTENNA_NR; + + pRbMap = (struct xran_prb_map *) psIoCtrl->sFrontHaulRxPrbMapBbuIoBufCtrl[tti_dst][cc_id][ant_id].sBufferList.pBuffers->pData; + ul_bfw_pos = ((char*)p_iq->p_tx_ul_bfw_buffer[flowId]) + tx_ul_bfw_buffer_position; if(pRbMap) { if (pXranConf->DynamicSectionEna == 0) { - app_io_xran_iq_content_init_cp_rb_map(pRbMap, XRAN_DIR_UL, cc_id, ant_id, sym_id, tti, pXranConf->nULRBs); + if(pRbMap->nPrbElm != 1 ) + app_io_xran_iq_content_init_cp_rb_map(pRbMap, XRAN_DIR_UL, cc_id, ant_id, sym_id, tti_dst, pXranConf->nULRBs); } else if(pXranConf->ru_conf.xranCat == XRAN_CATEGORY_B && appMode == APP_O_DU && sym_id == 0) { int32_t idxElm = 0; - char * ul_bfw_pos = ((char*)p_iq->p_tx_ul_bfw_buffer[flowId]) + p_iq->tx_ul_bfw_buffer_position[flowId]; struct xran_prb_elm* p_pRbMapElm = NULL; for(idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++) { @@ -957,53 +1242,15 @@ app_io_xran_iq_content_init_cp_rx(uint8_t appMode, struct xran_fh_config *pXra p_pRbMapElm->bf_weight.nAntElmTRx = pXranConf->nAntElmTRx; if(p_pRbMapElm->BeamFormingType == XRAN_BEAM_WEIGHT && p_pRbMapElm->bf_weight_update) { - if(p_pRbMapElm->bf_weight.numBundPrb == 0) { - /* No bundled PRB, using extension 1 */ - - int16_t ext_len = 9600; - int16_t ext_sec_total = 0; - int8_t * ext_buf =(int8_t*) xran_malloc(ext_len); - int8_t * ext_buf_start = ext_buf; - int32_t idRb = 0; - int16_t *ptr = NULL; - int32_t i; - if(ext_buf) { - ext_buf += (RTE_PKTMBUF_HEADROOM + - sizeof(struct xran_ecpri_hdr) + - sizeof(struct xran_cp_radioapp_section1_header) + - sizeof(struct xran_cp_radioapp_section1)); - - ext_len -= (RTE_PKTMBUF_HEADROOM + - sizeof(struct xran_ecpri_hdr) + - sizeof(struct xran_cp_radioapp_section1_header) + - sizeof(struct xran_cp_radioapp_section1)); - - ptr = (int16_t*)(ul_bfw_pos +(p_pRbMapElm->nRBStart*p_pRbMapElm->bf_weight.nAntElmTRx)*4); - ext_sec_total = xran_cp_populate_section_ext_1((int8_t *)ext_buf, - ext_len, - (int16_t *) (ul_bfw_pos + (p_pRbMapElm->nRBStart*p_pRbMapElm->bf_weight.nAntElmTRx)*4), - p_pRbMapElm->nRBSize, - p_pRbMapElm->bf_weight.nAntElmTRx, - p_pRbMapElm->iqWidth, p_pRbMapElm->compMethod); - if(ext_sec_total > 0) { - p_pRbMapElm->bf_weight.p_ext_start = ext_buf_start; - p_pRbMapElm->bf_weight.p_ext_section = ext_buf; - p_pRbMapElm->bf_weight.ext_section_sz = ext_sec_total; + if(p_pRbMapElm->bf_weight.extType == 1) { + app_io_xran_ext_type1_populate(p_pRbMapElm, ul_bfw_pos, app_io_xran_fh_init.mtu, &numSetBFW_total); } else { - rte_panic("xran_cp_populate_section_ext_1 return error [%d]\n", ext_sec_total); - } - } else { - rte_panic("xran_malloc return NULL\n"); - } - } else { - app_io_xran_ext_type11_populate(p_pRbMapElm, p_iq->p_tx_ul_bfw_buffer[flowId], app_io_xran_fh_init.mtu); - } - } + app_io_xran_ext_type11_populate(p_pRbMapElm, ul_bfw_pos, app_io_xran_fh_init.mtu); } + } /* if(p_pRbMapElm->BeamFormingType == XRAN_BEAM_WEIGHT && p_pRbMapElm->bf_weight_update) */ + numSetBFW_total += p_pRbMapElm->bf_weight.numSetBFWs; + } /* for(idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++) */ } - p_iq->tx_ul_bfw_buffer_position[flowId] += (pXranConf->nULRBs*pXranConf->nAntElmTRx)*4; - if(p_iq->tx_ul_bfw_buffer_position[flowId] >= p_iq->tx_ul_bfw_buffer_size[flowId]) - p_iq->tx_ul_bfw_buffer_position[flowId] = 0; } else { rte_panic("DL pRbMap ==NULL\n"); } @@ -1014,7 +1261,7 @@ app_io_xran_iq_content_init_cp_rx(uint8_t appMode, struct xran_fh_config *pXra int32_t app_io_xran_iq_content_init_up_tx(uint8_t appMode, struct xran_fh_config *pXranConf, struct bbu_xran_io_if *psBbuIo, struct xran_io_shared_ctrl *psIoCtrl, struct o_xu_buffers * p_iq, - int32_t cc_id, int32_t ant_id, int32_t sym_id, int32_t tti, int32_t flowId) + int32_t cc_id, int32_t ant_id, int32_t sym_id, int32_t target_tti, int32_t flowId) { char *pos = NULL; void *ptr = NULL; @@ -1022,14 +1269,18 @@ app_io_xran_iq_content_init_up_tx(uint8_t appMode, struct xran_fh_config *pXra struct xran_prb_map* pRbMap = NULL; enum xran_comp_hdr_type staticEn = XRAN_COMP_HDR_TYPE_DYNAMIC; + int32_t tti_dst = target_tti % XRAN_N_FE_BUF_LEN; + int32_t tti_src = target_tti % p_iq->numSlots; + int32_t tx_play_buffer_position = tti_src * (XRAN_NUM_OF_SYMBOL_PER_SLOT*pXranConf->nDLRBs*N_SC_PER_PRB*4) + (sym_id * pXranConf->nDLRBs*N_SC_PER_PRB*4); + if (pXranConf != NULL) { staticEn = pXranConf->ru_conf.xranCompHdrType; - pRbMap = (struct xran_prb_map *) psIoCtrl->sFrontHaulTxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData; - pos = ((char*)p_iq->p_tx_play_buffer[flowId]) + p_iq->tx_play_buffer_position[flowId]; - ptr = psIoCtrl->sFrontHaulTxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData; + pRbMap = (struct xran_prb_map *) psIoCtrl->sFrontHaulTxPrbMapBbuIoBufCtrl[tti_dst][cc_id][ant_id].sBufferList.pBuffers->pData; + pos = ((char*)p_iq->p_tx_play_buffer[flowId]) + tx_play_buffer_position; + ptr = psIoCtrl->sFrontHaulTxBbuIoBufCtrl[tti_dst][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData; if(ptr && pos) { int32_t idxElm = 0; @@ -1038,13 +1289,26 @@ app_io_xran_iq_content_init_up_tx(uint8_t appMode, struct xran_fh_config *pXra uint8_t *dst = (uint8_t *)u8dptr; uint8_t *src = (uint8_t *)pos; + uint16_t num_sections, idx, comp_method; + uint16_t prb_per_section; struct xran_prb_elm* p_prbMapElm = &pRbMap->prbMap[idxElm]; dst = xran_add_hdr_offset(dst, ((staticEn == XRAN_COMP_HDR_TYPE_DYNAMIC) ? p_prbMapElm->compMethod : XRAN_COMPMETHOD_NONE)); for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++) { struct xran_section_desc *p_sec_desc = NULL; p_prbMapElm = &pRbMap->prbMap[idxElm]; - p_sec_desc = p_prbMapElm->p_sec_desc[sym_id][0]; + p_sec_desc = &p_prbMapElm->sec_desc[sym_id][0]; + + if(p_prbMapElm->bf_weight.extType == 1) + { + num_sections = p_prbMapElm->bf_weight.numSetBFWs; + prb_per_section = p_prbMapElm->bf_weight.numBundPrb; + } + else + { + num_sections = 1; + prb_per_section = p_prbMapElm->UP_nRBSize; + } if(p_sec_desc == NULL) { rte_panic ("p_sec_desc == NULL\n"); @@ -1057,10 +1321,20 @@ app_io_xran_iq_content_init_up_tx(uint8_t appMode, struct xran_fh_config *pXra continue; } - src = (uint8_t *)(pos + p_prbMapElm->nRBStart*N_SC_PER_PRB*4L); + src = (uint8_t *)(pos + p_prbMapElm->UP_nRBStart*N_SC_PER_PRB*4L); + p_sec_desc->iq_buffer_offset = RTE_PTR_DIFF(dst, u8dptr); + p_sec_desc->iq_buffer_len = 0; + + for(idx=0; idx < num_sections ; idx++) + { + //printf("\nidx %hu u8dptr %p dst %p",idx,u8dptr,dst); + + if((idx+1)*prb_per_section > p_prbMapElm->UP_nRBSize){ + prb_per_section = (p_prbMapElm->UP_nRBSize - idx*prb_per_section); + } if(p_prbMapElm->compMethod == XRAN_COMPMETHOD_NONE) { - payload_len = p_prbMapElm->nRBSize*N_SC_PER_PRB*4L; + payload_len = prb_per_section*N_SC_PER_PRB*4L; memcpy(dst, src, payload_len); } else if ((p_prbMapElm->compMethod == XRAN_COMPMETHOD_BLKFLOAT) || (p_prbMapElm->compMethod == XRAN_COMPMETHOD_MODULATION)) { @@ -1071,8 +1345,8 @@ app_io_xran_iq_content_init_up_tx(uint8_t appMode, struct xran_fh_config *pXra memset(&bfp_com_rsp, 0, sizeof(struct xranlib_compress_response)); bfp_com_req.data_in = (int16_t*)src; - bfp_com_req.numRBs = p_prbMapElm->nRBSize; - bfp_com_req.len = p_prbMapElm->nRBSize*N_SC_PER_PRB*4L; + bfp_com_req.numRBs = prb_per_section; + bfp_com_req.len = prb_per_section*N_SC_PER_PRB*4L; bfp_com_req.compMethod = p_prbMapElm->compMethod; bfp_com_req.iqWidth = p_prbMapElm->iqWidth; bfp_com_req.ScaleFactor= p_prbMapElm->ScaleFactor; @@ -1090,23 +1364,41 @@ app_io_xran_iq_content_init_up_tx(uint8_t appMode, struct xran_fh_config *pXra exit(-1); } + if(num_sections != 1) + src += prb_per_section*N_SC_PER_PRB*4L; + /* update RB map for given element */ - p_sec_desc->iq_buffer_offset = RTE_PTR_DIFF(dst, u8dptr); - p_sec_desc->iq_buffer_len = payload_len; + //p_sec_desc->iq_buffer_offset = RTE_PTR_DIFF(dst, u8dptr); + p_sec_desc->iq_buffer_len += payload_len; /* add headroom for ORAN headers between IQs for chunk of RBs*/ dst += payload_len; + if(idx+1 == num_sections) /* Create space for (eth + eCPRI + radio app + section + comp) headers required by next prbElement */ + { dst = xran_add_hdr_offset(dst, ((staticEn == XRAN_COMP_HDR_TYPE_DYNAMIC) ? p_prbMapElm->compMethod : XRAN_COMPMETHOD_NONE)); } + else + { + /* Create space for section/compression header in current prbElement */ + //TODO: Check if alignment required for this case + dst += sizeof(struct data_section_hdr); + p_sec_desc->iq_buffer_len += sizeof(struct data_section_hdr); - p_iq->tx_play_buffer_position[flowId] += pXranConf->nDLRBs*N_SC_PER_PRB*4; - if(p_iq->tx_play_buffer_position[flowId] >= p_iq->tx_play_buffer_size[flowId]) - p_iq->tx_play_buffer_position[flowId] = 0; - } else { - rte_panic("ptr ==NULL\n"); + comp_method = ((staticEn == XRAN_COMP_HDR_TYPE_DYNAMIC) ? p_prbMapElm->compMethod : XRAN_COMPMETHOD_NONE); + + if( comp_method != XRAN_COMPMETHOD_NONE) + { + dst += sizeof (struct data_section_compression_hdr); + p_sec_desc->iq_buffer_len += sizeof(struct data_section_compression_hdr); } } - + } /*for num_section */ + } /* for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++) */ + } /* if(ptr && pos) */ + else { + rte_panic("ptr ==NULL\n"); + } + } /* if (pXranConf != NULL) */ return 0; } @@ -1124,7 +1416,7 @@ app_io_xran_iq_content_init_up_prach(uint8_t appMode, struct xran_fh_config *p ptr = psIoCtrl->sFHPrachRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData; if(ptr && pos) { - int32_t compMethod = pXranConf->ru_conf.compMeth; + int32_t compMethod = pXranConf->ru_conf.compMeth_PRACH; if(compMethod == XRAN_COMPMETHOD_NONE) { u32dptr = (uint32_t*)(ptr); @@ -1142,7 +1434,7 @@ app_io_xran_iq_content_init_up_prach(uint8_t appMode, struct xran_fh_config *p comp_req.len = RTE_MIN(PRACH_PLAYBACK_BUFFER_BYTES, p_iq->tx_prach_play_buffer_size[flowId]); comp_req.numRBs = comp_req.len / 12 / 4; /* 12RE, 4bytes */ comp_req.compMethod = compMethod; - comp_req.iqWidth = pXranConf->ru_conf.iqWidth; + comp_req.iqWidth = pXranConf->ru_conf.iqWidth_PRACH; comp_req.ScaleFactor = 0; /* TODO */ comp_req.reMask = 0xfff; /* TODO */ @@ -1196,7 +1488,7 @@ app_io_xran_iq_content_init_up_srs(uint8_t appMode, struct xran_fh_config *pXr for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++) { struct xran_section_desc *p_sec_desc = NULL; p_prbMapElm = &pRbMap->prbMap[idxElm]; - p_sec_desc = p_prbMapElm->p_sec_desc[sym_id][0]; + p_sec_desc = &p_prbMapElm->sec_desc[sym_id][0]; if(p_sec_desc == NULL){ rte_panic ("p_sec_desc == NULL\n"); @@ -1209,10 +1501,10 @@ app_io_xran_iq_content_init_up_srs(uint8_t appMode, struct xran_fh_config *pXr continue; } - src = (uint8_t *)(pos + p_prbMapElm->nRBStart*N_SC_PER_PRB*4L); + src = (uint8_t *)(pos + p_prbMapElm->UP_nRBStart*N_SC_PER_PRB*4L); if(p_prbMapElm->compMethod == XRAN_COMPMETHOD_NONE) { - payload_len = p_prbMapElm->nRBSize*N_SC_PER_PRB*4L; + payload_len = p_prbMapElm->UP_nRBSize*N_SC_PER_PRB*4L; memcpy(dst, src, payload_len); } else if (p_prbMapElm->compMethod == XRAN_COMPMETHOD_BLKFLOAT @@ -1224,8 +1516,8 @@ app_io_xran_iq_content_init_up_srs(uint8_t appMode, struct xran_fh_config *pXr memset(&bfp_com_rsp, 0, sizeof(struct xranlib_compress_response)); bfp_com_req.data_in = (int16_t*)src; - bfp_com_req.numRBs = p_prbMapElm->nRBSize; - bfp_com_req.len = p_prbMapElm->nRBSize*N_SC_PER_PRB*4L; + bfp_com_req.numRBs = p_prbMapElm->UP_nRBSize; + bfp_com_req.len = p_prbMapElm->UP_nRBSize*N_SC_PER_PRB*4L; bfp_com_req.compMethod = p_prbMapElm->compMethod; bfp_com_req.iqWidth = p_prbMapElm->iqWidth; bfp_com_req.ScaleFactor= p_prbMapElm->ScaleFactor; @@ -1273,25 +1565,18 @@ app_io_xran_iq_content_init(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg) int32_t cc_id, ant_id, sym_id, tti; int32_t flowId; - uint8_t frame_id = 0; - uint8_t subframe_id = 0; - uint8_t slot_id = 0; - uint8_t sym = 0; - - void *ptr; - uint32_t *u32dptr; - uint16_t *u16dptr; - uint8_t *u8dptr; + //uint8_t frame_id = 0; + //uint8_t subframe_id = 0; + //uint8_t slot_id = 0; + //uint8_t sym = 0; struct xran_fh_config *pXranConf = &app_io_xran_fh_config[o_xu_id]; - struct xran_fh_init *pXranInit = &app_io_xran_fh_init; + //struct xran_fh_init *pXranInit = &app_io_xran_fh_init; struct o_xu_buffers * p_iq = NULL; uint32_t xran_max_antenna_nr = RTE_MAX(p_o_xu_cfg->numAxc, p_o_xu_cfg->numUlAxc); uint32_t xran_max_ant_array_elm_nr = RTE_MAX(p_o_xu_cfg->antElmTRx, xran_max_antenna_nr); - - char *pos = NULL; - struct xran_prb_map *pRbMap = NULL; + uint32_t xran_max_antenna_nr_prach = RTE_MIN(xran_max_antenna_nr, XRAN_MAX_PRACH_ANT_NUM); if(psBbuIo == NULL){ rte_panic("psBbuIo == NULL\n"); @@ -1345,13 +1630,13 @@ app_io_xran_iq_content_init(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg) /* prach TX for RU only */ if(p_o_xu_cfg->appMode == APP_O_RU && p_o_xu_cfg->enablePrach) { - for(ant_id = 0; ant_id < xran_max_antenna_nr; ant_id++) { + for(ant_id = 0; ant_id < xran_max_antenna_nr_prach; ant_id++) { for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) { - flowId = p_o_xu_cfg->numAxc*cc_id + ant_id; + flowId = xran_max_antenna_nr_prach * cc_id + ant_id; if ((status = app_io_xran_iq_content_init_up_prach(p_o_xu_cfg->appMode, pXranConf, psBbuIo, psIoCtrl, p_iq, cc_id, ant_id, sym_id, tti, flowId)) != 0) { - rte_panic("app_io_xran_iq_content_init_cp_tx"); + rte_panic("app_io_xran_iq_content_init_up_prach"); } } } @@ -1381,7 +1666,7 @@ app_io_xran_iq_content_init(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg) if ((status = app_io_xran_iq_content_init_up_srs(p_o_xu_cfg->appMode, pXranConf, psBbuIo, psIoCtrl, p_iq, cc_id, ant_id, sym_id, tti, flowId)) != 0){ - rte_panic("app_io_xran_iq_content_init_cp_tx"); + rte_panic("app_io_xran_iq_content_init_up_srs"); } } } @@ -1395,7 +1680,6 @@ app_io_xran_iq_content_init(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg) void app_io_xran_if_stop(void) { xran_status_t status = 0; - SWXRANInterfaceTypeEnum eInterfaceType; status += xran_mm_destroy(app_io_xran_handle)*2; @@ -1406,83 +1690,93 @@ void app_io_xran_if_stop(void) } int32_t -app_io_xran_iq_content_get(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg) +app_io_xran_iq_content_get_up_prach(uint8_t appMode, struct xran_fh_config *pXranConf, + struct bbu_xran_io_if *psBbuIo, struct xran_io_shared_ctrl *psIoCtrl, struct o_xu_buffers * p_iq, + int32_t cc_id, int32_t ant_id, int32_t sym_id, int32_t target_tti, int32_t flowId) { - struct bbu_xran_io_if *psBbuIo = app_io_xran_if_get(); - struct xran_io_shared_ctrl *psIoCtrl = app_io_xran_if_ctrl_get(o_xu_id); - xran_status_t status; - int32_t nSectorIndex[XRAN_MAX_SECTOR_NR]; - int32_t nSectorNum; - int32_t cc_id, ant_id, sym_id, tti; - int32_t flowId; - - uint8_t frame_id = 0; - uint8_t subframe_id = 0; - uint8_t slot_id = 0; - uint8_t sym = 0; - uint16_t idxDesc = 0; - - void *ptr; - uint32_t *u32dptr; - uint16_t *u16dptr; - uint8_t *u8dptr; + xran_status_t status = 0; + int32_t prach_len = 0; + void *ptr = NULL; + char *pos = NULL; - struct xran_fh_config *pXranConf = &app_io_xran_fh_config[o_xu_id]; + int32_t tti_src = target_tti % XRAN_N_FE_BUF_LEN; + int32_t tti_dst = target_tti % p_iq->numSlots; + int32_t prach_log_buffer_position; - uint32_t xran_max_antenna_nr = RTE_MAX(p_o_xu_cfg->numAxc, p_o_xu_cfg->numUlAxc); - uint32_t xran_max_ant_array_elm_nr = RTE_MAX(p_o_xu_cfg->antElmTRx, xran_max_antenna_nr); + prach_len = (3 * pXranConf->ru_conf.iqWidth_PRACH) * pXranConf->prach_conf.numPrbc; /* 12RE*2pairs/8bits (12*2/8=3)*/ + prach_log_buffer_position = tti_dst * (XRAN_NUM_OF_SYMBOL_PER_SLOT*prach_len) + (sym_id * prach_len); - char *pos = NULL; - struct o_xu_buffers *p_iq = NULL; + if(p_iq->p_prach_log_buffer[flowId]) { + pos = ((char*)p_iq->p_prach_log_buffer[flowId]) + prach_log_buffer_position; + ptr = psIoCtrl->sFHPrachRxBbuIoBufCtrlDecomp[tti_src][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData; + if(ptr) { + int32_t compMethod = pXranConf->ru_conf.compMeth_PRACH; + if(compMethod == XRAN_COMPMETHOD_NONE) { + memcpy(pos, (uint32_t *)(ptr), prach_len); + } else { + struct xranlib_decompress_request decomp_req; + struct xranlib_decompress_response decomp_rsp; + int32_t parm_size; + + memset(&decomp_req, 0, sizeof(struct xranlib_decompress_request)); + memset(&decomp_rsp, 0, sizeof(struct xranlib_decompress_response)); + + switch(compMethod) { + case XRAN_COMPMETHOD_BLKFLOAT: parm_size = 1; break; + case XRAN_COMPMETHOD_MODULATION: parm_size = 0; break; + default: + parm_size = 0; + } - if(psBbuIo == NULL) - rte_panic("psBbuIo == NULL\n"); + decomp_req.data_in = (int8_t *)ptr; + decomp_req.numRBs = pXranConf->prach_conf.numPrbc; + decomp_req.len = (3 * pXranConf->ru_conf.iqWidth_PRACH + parm_size) * pXranConf->prach_conf.numPrbc; /* 12RE*2pairs/8bits (12*2/8=3)*/ + decomp_req.compMethod = compMethod; + decomp_req.iqWidth = pXranConf->ru_conf.iqWidth_PRACH; + decomp_req.ScaleFactor = 0; /* TODO */ + decomp_req.reMask = 0xfff; /* TODO */ - if(psIoCtrl == NULL) - rte_panic("psIoCtrl == NULL\n"); + decomp_rsp.data_out = (int16_t *)pos; + decomp_rsp.len = 0; - for (nSectorNum = 0; nSectorNum < XRAN_MAX_SECTOR_NR; nSectorNum++) { - nSectorIndex[nSectorNum] = nSectorNum; + xranlib_decompress(&decomp_req, &decomp_rsp); } + } + } /* if(p_iq->p_prach_log_buffer[flowId]) */ - nSectorNum = p_o_xu_cfg->numCC; - printf ("app_io_xran_iq_content_get\n"); - - if(p_o_xu_cfg->p_buff) { - p_iq = p_o_xu_cfg->p_buff; - } else { - printf("Error p_o_xu_cfg->p_buff\n"); - exit(-1); + return status; } - for(cc_id = 0; cc_id sFrontHaulRxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData; + void *ptr = NULL; + char *pos = NULL; + uint32_t *u32dptr; + + int32_t tti_src = target_tti % XRAN_N_FE_BUF_LEN; + int32_t tti_dst = target_tti % p_iq->numSlots; + int32_t srs_log_buffer_position = tti_dst * (XRAN_NUM_OF_SYMBOL_PER_SLOT*pXranConf->nULRBs*N_SC_PER_PRB*4) + (sym_id * pXranConf->nULRBs*N_SC_PER_PRB*4); + + pRbMap = (struct xran_prb_map *) psIoCtrl->sFHSrsRxPrbMapBbuIoBufCtrl[tti_src][cc_id][ant_id].sBufferList.pBuffers->pData; if(pRbMap == NULL){ - printf("pRbMap == NULL\n"); - exit(-1); + rte_panic("pRbMap == NULL\n"); } - if(p_o_xu_cfg->appMode == APP_O_RU) - flowId = p_o_xu_cfg->numAxc * cc_id + ant_id; - else - flowId = p_o_xu_cfg->numUlAxc * cc_id + ant_id; - for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) { + if(p_iq->p_srs_log_buffer[flowId]) { pRbElm = &pRbMap->prbMap[0]; - if(pRbMap->nPrbElm == 1){ - if(p_iq->p_rx_log_buffer[flowId]) { - pos = ((char*)p_iq->p_rx_log_buffer[flowId]) + p_iq->rx_log_buffer_position[flowId]; - uint32_t one_rb_size = (((pRbElm->iqWidth == 0) || (pRbElm->iqWidth == 16)) ? (N_SC_PER_PRB*2*2) : (3 * pRbElm->iqWidth + 1)); - if (app_io_xran_fh_init.mtu < pRbElm->nRBSize * one_rb_size) - { - ptr = psIoCtrl->sFrontHaulRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData; + /*if(pRbMap->nPrbElm == 1) { + if(sym_id >= pRbElm->nStartSymb && sym_id < pRbElm->nStartSymb + pRbElm->numSymb) { + pos = ((char*)p_iq->p_srs_log_buffer[flowId]) + p_iq->srs_log_buffer_position[flowId]; + ptr = psIoCtrl->sFHSrsRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData; if(ptr){ int32_t payload_len = 0; u32dptr = (uint32_t*)(ptr); @@ -1493,7 +1787,6 @@ app_io_xran_iq_content_get(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg) memset(&bfp_decom_req, 0, sizeof(struct xranlib_decompress_request)); memset(&bfp_decom_rsp, 0, sizeof(struct xranlib_decompress_response)); - switch(pRbElm->compMethod) { case XRAN_COMPMETHOD_BLKFLOAT: parm_size = 1; @@ -1510,8 +1803,6 @@ app_io_xran_iq_content_get(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg) bfp_decom_req.len = (3 * pRbElm->iqWidth + parm_size) * pRbElm->nRBSize; bfp_decom_req.compMethod = pRbElm->compMethod; bfp_decom_req.iqWidth = pRbElm->iqWidth; - bfp_decom_req.reMask = pRbElm->reMask; - bfp_decom_req.ScaleFactor= pRbElm->ScaleFactor; bfp_decom_rsp.data_out = (int16_t *)(pos + pRbElm->nRBStart*N_SC_PER_PRB*4); bfp_decom_rsp.len = 0; @@ -1524,18 +1815,18 @@ app_io_xran_iq_content_get(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg) memcpy(pos + pRbElm->nRBStart*N_SC_PER_PRB*4L , u32dptr, pRbElm->nRBSize*N_SC_PER_PRB*4L); } }else { - printf("%s:%d [%d][%d][%d][%d]ptr ==NULL\n", __FUNCTION__, __LINE__, tti,cc_id,ant_id, sym_id); + printf("[%d][%d][%d][%d]ptr ==NULL\n",tti,cc_id,ant_id, sym_id); } } - else - { - p_sec_desc = pRbElm->p_sec_desc[sym_id][0]; - if(p_iq->p_rx_log_buffer[flowId] && p_sec_desc){ + } else*/ { + for(idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++ ) { + pRbElm = &pRbMap->prbMap[idxElm]; + p_sec_desc = &pRbElm->sec_desc[sym_id][0]; + if(p_iq->p_srs_log_buffer[flowId] && p_sec_desc) { if(sym_id >= pRbElm->nStartSymb && sym_id < pRbElm->nStartSymb + pRbElm->numSymb){ - pos = ((char*)p_iq->p_rx_log_buffer[flowId]) + p_iq->rx_log_buffer_position[flowId]; + pos = ((char*)p_iq->p_srs_log_buffer[flowId]) + srs_log_buffer_position; ptr = p_sec_desc->pData; if(ptr){ - int32_t payload_len = 0; u32dptr = (uint32_t*)(ptr); if (pRbElm->compMethod != XRAN_COMPMETHOD_NONE){ struct xranlib_decompress_request bfp_decom_req; @@ -1560,44 +1851,84 @@ app_io_xran_iq_content_get(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg) bfp_decom_req.len = (3 * pRbElm->iqWidth + parm_size)*pRbElm->nRBSize; bfp_decom_req.compMethod = pRbElm->compMethod; bfp_decom_req.iqWidth = pRbElm->iqWidth; - bfp_decom_req.reMask = pRbElm->reMask; - bfp_decom_req.ScaleFactor= pRbElm->ScaleFactor; bfp_decom_rsp.data_out = (int16_t *)(pos + pRbElm->nRBStart*N_SC_PER_PRB*4); bfp_decom_rsp.len = 0; xranlib_decompress(&bfp_decom_req, &bfp_decom_rsp); - payload_len = bfp_decom_rsp.len; - - } - else { + } else { memcpy(pos + pRbElm->nRBStart*N_SC_PER_PRB*4 , u32dptr, pRbElm->nRBSize*N_SC_PER_PRB*4); } } - else { - printf("%s:%d [%d][%d][%d][%d]ptr ==NULL\n", __FUNCTION__, __LINE__, tti,cc_id,ant_id, sym_id); } + } else { + printf("(%d : %d : %d) flowid %d, p_sec_desc is empty\n", target_tti, sym_id, ant_id,flowId); } } - else - printf("(%d : %d : %d) flowid %d, p_sec_desc is empty\n", tti, sym_id, ant_id,flowId); } } - } else { + + return status; +} + +int32_t +app_io_xran_iq_content_get_up_rx(uint8_t appMode, struct xran_fh_config *pXranConf, + struct bbu_xran_io_if *psBbuIo, struct xran_io_shared_ctrl *psIoCtrl, struct o_xu_buffers * p_iq, + int32_t cc_id, int32_t ant_id, int32_t sym_id, int32_t target_tti, int32_t flowId) +{ + xran_status_t status = 0; + int32_t idxElm = 0; + int32_t idxSection = 0; + struct xran_prb_map *pRbMap = NULL; + struct xran_prb_elm *pRbElm = NULL; + struct xran_prb_elm *pRbElmRx = NULL; + struct xran_section_desc *p_sec_desc = NULL; + + uint16_t idxDesc = 0; + + void *ptr = NULL; + char *pos = NULL; + uint32_t *u32dptr; + struct data_section_hdr* data_hdr; + uint16_t num_prbu = 0, start_prbu = 0, prb_idx; + char *src; + const int16_t data_size = sizeof(struct data_section_hdr); + const int16_t compr_size = sizeof(struct data_section_compression_hdr); + + int32_t tti_src = target_tti % XRAN_N_FE_BUF_LEN; + int32_t tti_dst = target_tti % p_iq->numSlots; + int32_t rx_log_buffer_position = tti_dst * (XRAN_NUM_OF_SYMBOL_PER_SLOT*pXranConf->nULRBs*N_SC_PER_PRB*4) + (sym_id * pXranConf->nULRBs*N_SC_PER_PRB*4); + + pRbMap = (struct xran_prb_map *) psIoCtrl->sFrontHaulRxPrbMapBbuIoBufCtrl[tti_src][cc_id][ant_id].sBufferList.pBuffers->pData; + if(pRbMap == NULL) { + printf("pRbMap == NULL\n"); + exit(-1); + } + + if(0 == pXranConf->RunSlotPrbMapBySymbolEnable) + { for(idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++ ) { pRbElm = &pRbMap->prbMap[idxElm]; - p_sec_desc = pRbElm->p_sec_desc[sym_id][0]; + for (idxDesc = 0; idxDesc < XRAN_MAX_FRAGMENT; idxDesc++) { + p_sec_desc = &pRbElm->sec_desc[sym_id][idxDesc]; if(p_iq->p_rx_log_buffer[flowId] && p_sec_desc){ if(sym_id >= pRbElm->nStartSymb && sym_id < pRbElm->nStartSymb + pRbElm->numSymb){ - pos = ((char*)p_iq->p_rx_log_buffer[flowId]) + p_iq->rx_log_buffer_position[flowId]; + if (!p_sec_desc->pCtrl) + continue; + pos = ((char*)p_iq->p_rx_log_buffer[flowId]) + rx_log_buffer_position; ptr = p_sec_desc->pData; - if(ptr){ - int32_t payload_len = 0; - u32dptr = (uint32_t*)(ptr); + src = (char *)ptr; + data_hdr = (struct data_section_hdr *)src; + num_prbu = p_sec_desc->num_prbu; + start_prbu = p_sec_desc->start_prbu; + prb_idx = start_prbu; + while(prb_idx < (pRbElm->UP_nRBStart + pRbElm->UP_nRBSize) && num_prbu != 0){ + if(src){ + u32dptr = (uint32_t*)(src); if (pRbElm->compMethod != XRAN_COMPMETHOD_NONE){ struct xranlib_decompress_request bfp_decom_req; struct xranlib_decompress_response bfp_decom_rsp; - int32_t parm_size; + int32_t parm_size = 0; memset(&bfp_decom_req, 0, sizeof(struct xranlib_decompress_request)); memset(&bfp_decom_rsp, 0, sizeof(struct xranlib_decompress_response)); @@ -1613,117 +1944,76 @@ app_io_xran_iq_content_get(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg) } bfp_decom_req.data_in = (int8_t *)u32dptr; - bfp_decom_req.numRBs = pRbElm->nRBSize; - bfp_decom_req.len = (3 * pRbElm->iqWidth + parm_size)*pRbElm->nRBSize; + bfp_decom_req.numRBs = num_prbu; + bfp_decom_req.len = (3 * pRbElm->iqWidth + parm_size)*num_prbu; bfp_decom_req.compMethod = pRbElm->compMethod; bfp_decom_req.iqWidth = pRbElm->iqWidth; bfp_decom_req.reMask = pRbElm->reMask; bfp_decom_req.ScaleFactor= pRbElm->ScaleFactor; - bfp_decom_rsp.data_out = (int16_t *)(pos + pRbElm->nRBStart*N_SC_PER_PRB*4); + bfp_decom_rsp.data_out = (int16_t *)(pos + start_prbu*N_SC_PER_PRB*4); bfp_decom_rsp.len = 0; xranlib_decompress(&bfp_decom_req, &bfp_decom_rsp); - payload_len = bfp_decom_rsp.len; + src += (3 * pRbElm->iqWidth + parm_size)*num_prbu; } else { - memcpy(pos + pRbElm->nRBStart*N_SC_PER_PRB*4 , u32dptr, pRbElm->nRBSize*N_SC_PER_PRB*4); + memcpy(pos + start_prbu*N_SC_PER_PRB*4 , u32dptr, num_prbu*N_SC_PER_PRB*4); + src += num_prbu*N_SC_PER_PRB*4; } } else { - // printf("%s:%d [%d][%d][%d][%d]ptr ==NULL\n", __FUNCTION__, __LINE__, tti,cc_id,ant_id, sym_id); - } + // printf("%s:%d [%d][%d][%d][%d]src ==NULL\n", __FUNCTION__, __LINE__, tti,cc_id,ant_id, sym_id); } + data_hdr = (struct data_section_hdr *)src; + if(pRbElm->bf_weight.extType == 1 && data_hdr != NULL) + { + data_hdr->fields.all_bits = rte_be_to_cpu_32(data_hdr->fields.all_bits); + num_prbu = data_hdr->fields.num_prbu; + start_prbu = data_hdr->fields.start_prbu; + prb_idx += num_prbu; + src += data_size; + if (pRbElm->compMethod != XRAN_COMPMETHOD_NONE && pXranConf->ru_conf.xranCompHdrType == XRAN_COMP_HDR_TYPE_DYNAMIC) + src += compr_size; } else - printf("(%d : %d : %d) flowid %d, p_sec_desc is empty\n", tti, sym_id, ant_id,flowId); - } + break; } - p_iq->rx_log_buffer_position[flowId] += pXranConf->nULRBs*N_SC_PER_PRB*4; - - if(p_iq->rx_log_buffer_position[flowId] >= p_iq->rx_log_buffer_size[flowId]) - p_iq->rx_log_buffer_position[flowId] = 0; } - - - flowId = p_o_xu_cfg->numAxc * cc_id + ant_id; - prach_len = (3 * pXranConf->ru_conf.iqWidth_PRACH) * pXranConf->prach_conf.numPrbc; /* 12RE*2pairs/8bits (12*2/8=3)*/ - for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) { - - if(p_iq->p_prach_log_buffer[flowId]) { - pos = ((char*)p_iq->p_prach_log_buffer[flowId]) + p_iq->prach_log_buffer_position[flowId]; - ptr = psIoCtrl->sFHPrachRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData; - if(ptr) { - int32_t compMethod = pXranConf->ru_conf.compMeth_PRACH; - - if(compMethod == XRAN_COMPMETHOD_NONE) { - memcpy(pos, (uint32_t *)(ptr), prach_len); - } - else { - struct xranlib_decompress_request decomp_req; - struct xranlib_decompress_response decomp_rsp; - int32_t parm_size; - - memset(&decomp_req, 0, sizeof(struct xranlib_decompress_request)); - memset(&decomp_rsp, 0, sizeof(struct xranlib_decompress_response)); - - switch(compMethod) { - case XRAN_COMPMETHOD_BLKFLOAT: parm_size = 1; break; - case XRAN_COMPMETHOD_MODULATION: parm_size = 0; break; - default: - parm_size = 0; } - - decomp_req.data_in = (int8_t *)ptr; - decomp_req.numRBs = pXranConf->prach_conf.numPrbc; - decomp_req.len = (3 * pXranConf->ru_conf.iqWidth_PRACH + parm_size) * pXranConf->prach_conf.numPrbc; /* 12RE*2pairs/8bits (12*2/8=3)*/ - decomp_req.compMethod = compMethod; - decomp_req.iqWidth = pXranConf->ru_conf.iqWidth_PRACH; - decomp_req.ScaleFactor = 0; /* TODO */ - decomp_req.reMask = 0xfff; /* TODO */ - - decomp_rsp.data_out = (int16_t *)pos; - decomp_rsp.len = 0; - - xranlib_decompress(&decomp_req, &decomp_rsp); + else + printf("(%d : %d : %d) flowid %d, p_sec_desc is empty\n", target_tti, sym_id, ant_id,flowId); } } - - p_iq->prach_log_buffer_position[flowId] += prach_len; - - if(p_iq->prach_log_buffer_position[flowId] >= p_iq->prach_log_buffer_size[flowId]) - p_iq->prach_log_buffer_position[flowId] = 0; - } /* if(p_iq->p_prach_log_buffer[flowId]) */ - } /* for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) */ - } /* for(ant_id = 0; ant_id < xran_max_antenna_nr; ant_id++) */ - - /* SRS RX for O-DU only */ - if(p_o_xu_cfg->appMode == APP_O_DU && p_o_xu_cfg->enableSrs) { - for(ant_id = 0; ant_id < xran_max_ant_array_elm_nr; ant_id++) { - int32_t idxElm = 0; - struct xran_prb_map *pRbMap = NULL; - struct xran_prb_elm *pRbElm = NULL; - struct xran_section_desc *p_sec_desc = NULL; - pRbMap = (struct xran_prb_map *) psIoCtrl->sFHSrsRxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData; - if(pRbMap == NULL) { - printf("pRbMap == NULL\n"); - exit(-1); } - flowId = p_o_xu_cfg->antElmTRx*cc_id + ant_id; - if(p_iq->p_srs_log_buffer[flowId]) { - for(sym_id = 0; sym_id < XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT; sym_id++) { - pRbElm = &pRbMap->prbMap[0]; - /*if(pRbMap->nPrbElm == 1) { + else + { + for(idxSection = 0; idxSection < pRbMap->nPrbElm; idxSection++ ) { + pRbElmRx = &pRbMap->prbMap[idxSection]; + for (idxDesc = 0; idxDesc < XRAN_MAX_FRAGMENT; idxDesc++) { + p_sec_desc = &pRbElmRx->sec_desc[sym_id][idxDesc]; + if(p_iq->p_rx_log_buffer[flowId] && p_sec_desc){ + if(!p_sec_desc->pCtrl) + continue; + for(idxElm = idxSection; idxElm < pRbMap->nPrbElm; idxElm++ ) + { + pRbElm = &pRbMap->prbMap[idxElm]; if(sym_id >= pRbElm->nStartSymb && sym_id < pRbElm->nStartSymb + pRbElm->numSymb) { - pos = ((char*)p_iq->p_srs_log_buffer[flowId]) + p_iq->srs_log_buffer_position[flowId]; - ptr = psIoCtrl->sFHSrsRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData; - if(ptr){ - int32_t payload_len = 0; - u32dptr = (uint32_t*)(ptr); + pos = ((char*)p_iq->p_rx_log_buffer[flowId]) + rx_log_buffer_position; + ptr = p_sec_desc->pData; + src = (char *)ptr; + data_hdr = (struct data_section_hdr *)src; + num_prbu = p_sec_desc->num_prbu; + start_prbu = p_sec_desc->start_prbu; + prb_idx = start_prbu; + while(prb_idx < (pRbElm->UP_nRBStart + pRbElm->UP_nRBSize) && num_prbu != 0){ + // while(prb_idx < (pRbElm->nRBStart + pRbElm->nRBSize) && num_prbu != 0){ + if(src){ + u32dptr = (uint32_t*)(src); if (pRbElm->compMethod != XRAN_COMPMETHOD_NONE){ struct xranlib_decompress_request bfp_decom_req; struct xranlib_decompress_response bfp_decom_rsp; - int32_t parm_size; + int32_t parm_size = 0; memset(&bfp_decom_req, 0, sizeof(struct xranlib_decompress_request)); memset(&bfp_decom_rsp, 0, sizeof(struct xranlib_decompress_response)); @@ -1739,87 +2029,352 @@ app_io_xran_iq_content_get(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg) } bfp_decom_req.data_in = (int8_t *)u32dptr; - bfp_decom_req.numRBs = pRbElm->nRBSize; - bfp_decom_req.len = (3* pRbElm->iqWidth + parm_size)*pRbElm->nRBSize; + bfp_decom_req.numRBs = num_prbu; + bfp_decom_req.len = (3 * pRbElm->iqWidth + parm_size)*num_prbu; bfp_decom_req.compMethod = pRbElm->compMethod; bfp_decom_req.iqWidth = pRbElm->iqWidth; + bfp_decom_req.reMask = pRbElm->reMask; + bfp_decom_req.ScaleFactor= pRbElm->ScaleFactor; - bfp_decom_rsp.data_out = (int16_t *)(pos + pRbElm->nRBStart*N_SC_PER_PRB*4); + bfp_decom_rsp.data_out = (int16_t *)(pos + start_prbu*N_SC_PER_PRB*4); bfp_decom_rsp.len = 0; xranlib_decompress(&bfp_decom_req, &bfp_decom_rsp); - payload_len = bfp_decom_rsp.len; + src += (3 * pRbElm->iqWidth + parm_size)*num_prbu; } else { - u32dptr = (uint32_t*)(ptr); - memcpy(pos + pRbElm->nRBStart*N_SC_PER_PRB*4L , u32dptr, pRbElm->nRBSize*N_SC_PER_PRB*4L); + memcpy(pos + start_prbu*N_SC_PER_PRB*4 , u32dptr, num_prbu*N_SC_PER_PRB*4); + src += num_prbu*N_SC_PER_PRB*4; + } + } + else { + // printf("%s:%d [%d][%d][%d][%d]src ==NULL\n", __FUNCTION__, __LINE__, tti,cc_id,ant_id, sym_id); + } + data_hdr = (struct data_section_hdr *)src; + if(pRbElm->bf_weight.extType == 1 && data_hdr != NULL) + { + data_hdr->fields.all_bits = rte_be_to_cpu_32(data_hdr->fields.all_bits); + num_prbu = data_hdr->fields.num_prbu; + start_prbu = data_hdr->fields.start_prbu; + prb_idx += num_prbu; + src += data_size; + if (pRbElm->compMethod != XRAN_COMPMETHOD_NONE && pXranConf->ru_conf.xranCompHdrType == XRAN_COMP_HDR_TYPE_DYNAMIC) + src += compr_size; + } + else + break; + } + // break; + } + } + } + else + printf("(%d : %d : %d) flowid %d, p_sec_desc is empty\n", target_tti, sym_id, ant_id,flowId); + } + } + } + return status; +} + + + +int32_t +app_io_xran_iq_content_get(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg) +{ + struct bbu_xran_io_if *psBbuIo = app_io_xran_if_get(); + struct xran_io_shared_ctrl *psIoCtrl = app_io_xran_if_ctrl_get(o_xu_id); + xran_status_t status; + int32_t nSectorIndex[XRAN_MAX_SECTOR_NR]; + int32_t nSectorNum; + int32_t cc_id, ant_id, sym_id, tti; + int32_t flowId; + struct xran_fh_config *pXranConf = &app_io_xran_fh_config[o_xu_id]; + char *pos = NULL; + + uint32_t xran_max_antenna_nr = RTE_MAX(p_o_xu_cfg->numAxc, p_o_xu_cfg->numUlAxc); + uint32_t xran_max_ant_array_elm_nr = RTE_MAX(p_o_xu_cfg->antElmTRx, xran_max_antenna_nr); + uint32_t xran_max_antenna_nr_prach = RTE_MIN(xran_max_antenna_nr, XRAN_MAX_PRACH_ANT_NUM); + + struct o_xu_buffers *p_iq = NULL; + + if(psBbuIo == NULL) + rte_panic("psBbuIo == NULL\n"); + + if(psIoCtrl == NULL) + rte_panic("psIoCtrl == NULL\n"); + + for (nSectorNum = 0; nSectorNum < XRAN_MAX_SECTOR_NR; nSectorNum++) { + nSectorIndex[nSectorNum] = nSectorNum; } + + nSectorNum = p_o_xu_cfg->numCC; + printf ("app_io_xran_iq_content_get\n"); + + if(p_o_xu_cfg->p_buff) { + p_iq = p_o_xu_cfg->p_buff; }else { - printf("[%d][%d][%d][%d]ptr ==NULL\n",tti,cc_id,ant_id, sym_id); + printf("Error p_o_xu_cfg->p_buff\n"); + exit(-1); } + + if(p_o_xu_cfg->p_buff) { + p_iq = p_o_xu_cfg->p_buff; + } else { + rte_panic("Error p_o_xu_cfg->p_buff\n"); } - } else*/ { + + if(psBbuIo->bbu_offload == 0) { + for(cc_id = 0; cc_id appMode == APP_O_RU) + flowId = p_o_xu_cfg->numAxc * cc_id + ant_id; + else + flowId = p_o_xu_cfg->numUlAxc * cc_id + ant_id; + + for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) { + if ((status = app_io_xran_iq_content_get_up_rx(p_o_xu_cfg->appMode, pXranConf, + psBbuIo, psIoCtrl, p_iq, + cc_id, ant_id, sym_id, tti, flowId)) != 0) { + rte_panic("app_io_xran_iq_content_get_up_rx"); + } + } + if(p_o_xu_cfg->appMode == APP_O_DU && p_o_xu_cfg->enablePrach && (ant_id < xran_max_antenna_nr_prach)) { + flowId = xran_max_antenna_nr_prach * cc_id + ant_id; + for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) { + if ((status = app_io_xran_iq_content_get_up_prach(p_o_xu_cfg->appMode, pXranConf, + psBbuIo, psIoCtrl, p_iq, + cc_id, ant_id, sym_id, tti, flowId)) != 0) { + rte_panic("app_io_xran_iq_content_get_up_prach"); + } + } + } + } /* for(ant_id = 0; ant_id < xran_max_antenna_nr; ant_id++) */ + + /* SRS RX for O-DU only */ + if(p_o_xu_cfg->appMode == APP_O_DU && p_o_xu_cfg->enableSrs) { + for(ant_id = 0; ant_id < xran_max_ant_array_elm_nr; ant_id++) { + flowId = p_o_xu_cfg->antElmTRx*cc_id + ant_id; + for(sym_id = 0; sym_id < XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT; sym_id++) { + if ((status = app_io_xran_iq_content_get_up_srs(p_o_xu_cfg->appMode, pXranConf, + psBbuIo, psIoCtrl, p_iq, + cc_id, ant_id, sym_id, tti, flowId)) != 0) { + rte_panic("app_io_xran_iq_content_get_up_srs"); + } + } + } + } + + /* CP - DL for O-RU only */ + if(p_o_xu_cfg->appMode == APP_O_RU && p_o_xu_cfg->xranCat == 1 && p_o_xu_cfg->extType == 1) { + for(ant_id = 0; ant_id < xran_max_antenna_nr; ant_id++) { + uint16_t idxElm = 0; + int i = 0, len; + uint8_t *src_buf; + char *src = NULL; + struct xran_prb_map *pRbMap = NULL; + struct xran_prb_elm *pRbElm = NULL; + int8_t *iq_data = NULL; + uint16_t N = pXranConf->nAntElmTRx; + uint8_t parm_size; + int32_t tti_dst = tti % p_iq->numSlots ; + int32_t tx_dl_bfw_buffer_position = tti_dst * (pXranConf->nDLRBs*pXranConf->nAntElmTRx)*4; + uint16_t iq_size; + struct xran_cp_radioapp_section_ext1 * ext1; + uint8_t bfwIqWidth; + uint8_t total_ext1_len = 0; + pRbMap = (struct xran_prb_map *) psIoCtrl->sFHCpRxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData; + if(pRbMap == NULL) { + printf("pRbMap == NULL\n"); + exit(-1); + } + flowId = p_o_xu_cfg->numAxc * cc_id + ant_id; + pos = (char*)p_iq->p_tx_dl_bfw_log_buffer[flowId] + tx_dl_bfw_buffer_position; for(idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++ ) { pRbElm = &pRbMap->prbMap[idxElm]; - p_sec_desc = pRbElm->p_sec_desc[sym_id][0]; - if(p_iq->p_srs_log_buffer[flowId] && p_sec_desc) { - if(sym_id >= pRbElm->nStartSymb && sym_id < pRbElm->nStartSymb + pRbElm->numSymb) { - pos = ((char*)p_iq->p_srs_log_buffer[flowId]) + p_iq->srs_log_buffer_position[flowId]; - ptr = p_sec_desc->pData; - if(ptr) { - int32_t payload_len = 0; - u32dptr = (uint32_t*)(ptr); - if (pRbElm->compMethod != XRAN_COMPMETHOD_NONE) { - struct xranlib_decompress_request bfp_decom_req; - struct xranlib_decompress_response bfp_decom_rsp; - int32_t parm_size; - - memset(&bfp_decom_req, 0, sizeof(struct xranlib_decompress_request)); - memset(&bfp_decom_rsp, 0, sizeof(struct xranlib_decompress_response)); - switch(pRbElm->compMethod) { - case XRAN_COMPMETHOD_BLKFLOAT: + bfwIqWidth = pRbElm->bf_weight.bfwIqWidth; + if(p_iq->p_tx_dl_bfw_log_buffer[flowId]) { + src = (char *)pRbElm->bf_weight.p_ext_section; + if(!pRbElm->bf_weight.p_ext_start) + continue; + + for(i = 0; i < (pRbElm->bf_weight.numSetBFWs); i++) { + if(src){ + src_buf = (uint8_t *)src; + ext1 = (struct xran_cp_radioapp_section_ext1 *)src_buf; + src_buf += sizeof(struct xran_cp_radioapp_section_ext1); + if(src_buf == NULL) + break; + + iq_data = (int8_t *)(src_buf); + total_ext1_len = ext1->extLen * XRAN_SECTIONEXT_ALIGN; + if (pRbElm->bf_weight.bfwCompMeth == XRAN_COMPMETHOD_NONE){ + iq_size = N * bfwIqWidth * 2; // total in bits + parm_size = iq_size>>3; // total in bytes (/8) + if(iq_size%8) parm_size++; // round up + len = parm_size; + memcpy(pos,iq_data,len); + } + else { + switch(pRbElm->bf_weight.bfwCompMeth) { + case XRAN_BFWCOMPMETHOD_BLKFLOAT: parm_size = 1; break; - case XRAN_COMPMETHOD_MODULATION: - parm_size = 0; + + case XRAN_BFWCOMPMETHOD_BLKSCALE: + parm_size = 1; + break; + + case XRAN_BFWCOMPMETHOD_ULAW: + parm_size = 1; + break; + + case XRAN_BFWCOMPMETHOD_BEAMSPACE: + parm_size = N>>3; if(N%8) parm_size++; parm_size *= 8; break; + default: parm_size = 0; } + len = parm_size; + /* Get BF weights */ + iq_size = N * bfwIqWidth * 2; // total in bits + parm_size = iq_size>>3; // total in bytes (/8) + if(iq_size%8) parm_size++; // round up + len += parm_size; + struct xranlib_decompress_request bfp_decom_req; + struct xranlib_decompress_response bfp_decom_rsp; - bfp_decom_req.data_in = (int8_t *)u32dptr; - bfp_decom_req.numRBs = pRbElm->nRBSize; - bfp_decom_req.len = (3 * pRbElm->iqWidth + parm_size)*pRbElm->nRBSize; - bfp_decom_req.compMethod = pRbElm->compMethod; - bfp_decom_req.iqWidth = pRbElm->iqWidth; - - bfp_decom_rsp.data_out = (int16_t *)(pos + pRbElm->nRBStart*N_SC_PER_PRB*4); - bfp_decom_rsp.len = 0; + memset(&bfp_decom_req, 0, sizeof(struct xranlib_decompress_request)); + memset(&bfp_decom_rsp, 0, sizeof(struct xranlib_decompress_response)); - xranlib_decompress(&bfp_decom_req, &bfp_decom_rsp); - payload_len = bfp_decom_rsp.len; + bfp_decom_req.data_in = (int8_t*)iq_data; + bfp_decom_req.numRBs = 1; + bfp_decom_req.numDataElements = N*2; + bfp_decom_req.len = len; + bfp_decom_req.compMethod = pRbElm->bf_weight.bfwCompMeth; + bfp_decom_req.iqWidth = bfwIqWidth; - } else { - memcpy(pos + pRbElm->nRBStart*N_SC_PER_PRB*4 , u32dptr, pRbElm->nRBSize*N_SC_PER_PRB*4); + bfp_decom_rsp.data_out = (int16_t *)(pos); + bfp_decom_rsp.len = 0; + xranlib_decompress_bfw(&bfp_decom_req, &bfp_decom_rsp); } + pos += N*4; } + src += (total_ext1_len + sizeof(struct xran_cp_radioapp_section1)); } - } else { - printf("(%d : %d : %d) flowid %d, p_sec_desc is empty\n", tti, sym_id, ant_id,flowId); } } - } - p_iq->srs_log_buffer_position[flowId] += pXranConf->nULRBs*N_SC_PER_PRB*4; - if(p_iq->srs_log_buffer_position[flowId] >= p_iq->srs_log_buffer_size[flowId]) - p_iq->srs_log_buffer_position[flowId] = 0; + } /* for(ant_id = 0; ant_id < xran_max_antenna_nr; ant_id++) */ + } /* if(p_o_xu_cfg->appMode == APP_O_RU) */ + + + /* CP - UL for O-RU only */ + if(p_o_xu_cfg->appMode == APP_O_RU && p_o_xu_cfg->xranCat == 1 && p_o_xu_cfg->extType == 1) { + for(ant_id = 0; ant_id < p_o_xu_cfg->numUlAxc; ant_id++) { + uint16_t idxElm = 0; + int i = 0, len; + uint8_t *src_buf; + char *src = NULL; + struct xran_prb_map *pRbMap = NULL; + struct xran_prb_elm *pRbElm = NULL; + int8_t *iq_data = NULL; + uint16_t N = pXranConf->nAntElmTRx; + uint8_t parm_size; + uint16_t iq_size; + struct xran_cp_radioapp_section_ext1 * ext1; + uint8_t bfwIqWidth; + uint8_t total_ext1_len = 0; + int32_t tti_dst = tti % p_iq->numSlots; + int32_t tx_ul_bfw_buffer_position = tti_dst * (pXranConf->nULRBs*pXranConf->nAntElmTRx)*4; + pRbMap = (struct xran_prb_map *) psIoCtrl->sFHCpTxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData; + if(pRbMap == NULL) { + printf("pRbMap == NULL\n"); + exit(-1); + } + flowId = p_o_xu_cfg->numUlAxc * cc_id + ant_id; + pos = ((char*)p_iq->p_tx_ul_bfw_log_buffer[flowId]) + tx_ul_bfw_buffer_position; + for(idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++ ) { + pRbElm = &pRbMap->prbMap[idxElm]; + bfwIqWidth = pRbElm->bf_weight.bfwIqWidth; + if(p_iq->p_tx_ul_bfw_log_buffer[flowId]) { + src = (char *)pRbElm->bf_weight.p_ext_section; + if(!pRbElm->bf_weight.p_ext_start) + continue; + + for(i = 0; i < (pRbElm->bf_weight.numSetBFWs); i++) { + if(src){ + src_buf = (uint8_t *)src; + ext1 = (struct xran_cp_radioapp_section_ext1 *)src_buf; + src_buf += sizeof(struct xran_cp_radioapp_section_ext1); + if(src_buf == NULL) + break; + + iq_data = (int8_t *)(src_buf); + total_ext1_len = ext1->extLen * XRAN_SECTIONEXT_ALIGN; + if (pRbElm->bf_weight.bfwCompMeth == XRAN_COMPMETHOD_NONE){ + iq_size = N * bfwIqWidth * 2; // total in bits + parm_size = iq_size>>3; // total in bytes (/8) + if(iq_size%8) parm_size++; // round up + len = parm_size; + memcpy(pos,iq_data,len); } + else { + switch(pRbElm->bf_weight.bfwCompMeth) { + case XRAN_BFWCOMPMETHOD_BLKFLOAT: + parm_size = 1; + break; + + case XRAN_BFWCOMPMETHOD_BLKSCALE: + parm_size = 1; + break; + + case XRAN_BFWCOMPMETHOD_ULAW: + parm_size = 1; + break; + + case XRAN_BFWCOMPMETHOD_BEAMSPACE: + parm_size = N>>3; if(N%8) parm_size++; parm_size *= 8; + break; + + default: + parm_size = 0; } + len = parm_size; + /* Get BF weights */ + iq_size = N * bfwIqWidth * 2; // total in bits + parm_size = iq_size>>3; // total in bytes (/8) + if(iq_size%8) parm_size++; // round up + len += parm_size; + struct xranlib_decompress_request bfp_decom_req; + struct xranlib_decompress_response bfp_decom_rsp; + + memset(&bfp_decom_req, 0, sizeof(struct xranlib_decompress_request)); + memset(&bfp_decom_rsp, 0, sizeof(struct xranlib_decompress_response)); + + bfp_decom_req.data_in = (int8_t*)iq_data; + bfp_decom_req.numRBs = 1; + bfp_decom_req.numDataElements = N*2; + bfp_decom_req.len = len; + bfp_decom_req.compMethod = pRbElm->bf_weight.bfwCompMeth; + bfp_decom_req.iqWidth = bfwIqWidth; + + bfp_decom_rsp.data_out = (int16_t *)(pos); + bfp_decom_rsp.len = 0; + xranlib_decompress_bfw(&bfp_decom_req, &bfp_decom_rsp); } + pos += N*4; } + src += (total_ext1_len + sizeof(struct xran_cp_radioapp_section1)); } } - + } + } /* for(ant_id = 0; ant_id < xran_max_antenna_nr; ant_id++) */ + } /* if(p_o_xu_cfg->appMode == APP_O_RU) */ + } /*for(tti = 0; tti < XRAN_N_FE_BUF_LEN; tti++)*/ + } /*for(cc_id = 0; cc_id prach_conf.nPrachFreqStart = 0; p_xran_fh_cfg->prach_conf.nPrachFilterIdx = XRAN_FILTERINDEX_PRACH_ABC; p_xran_fh_cfg->prach_conf.nPrachConfIdx = p_o_xu_cfg->prachConfigIndex; + p_xran_fh_cfg->prach_conf.nPrachConfIdxLTE = p_o_xu_cfg->prachConfigIndexLTE; //will be used in case of dss only p_xran_fh_cfg->prach_conf.nPrachFreqOffset = -792; - p_xran_fh_cfg->srs_conf.symbMask = p_o_xu_cfg->srsSymMask; + p_xran_fh_cfg->srs_conf.symbMask = p_o_xu_cfg->srsSymMask; // deprecated + + if(p_o_xu_cfg->numAxc > XRAN_MAX_PRACH_ANT_NUM) + p_xran_fh_cfg->srs_conf.eAxC_offset = p_o_xu_cfg->numAxc + XRAN_MAX_PRACH_ANT_NUM; /* PUSCH, PRACH, SRS */ + else p_xran_fh_cfg->srs_conf.eAxC_offset = 2 * p_o_xu_cfg->numAxc; /* PUSCH, PRACH, SRS */ + p_xran_fh_cfg->srs_conf.slot = p_o_xu_cfg->srsSlot; + p_xran_fh_cfg->srs_conf.ndm_offset = p_o_xu_cfg->srsNdmOffset; + p_xran_fh_cfg->srs_conf.ndm_txduration = p_o_xu_cfg->srsNdmTxDuration; p_xran_fh_cfg->ru_conf.xranTech = p_o_xu_cfg->xranTech; p_xran_fh_cfg->ru_conf.xranCompHdrType = p_o_xu_cfg->CompHdrType; p_xran_fh_cfg->ru_conf.xranCat = p_o_xu_cfg->xranCat; + + if (p_xran_fh_cfg->ru_conf.xranCat == XRAN_CATEGORY_A) + p_xran_fh_cfg->neAxcUl = p_xran_fh_cfg->neAxc; + p_xran_fh_cfg->ru_conf.iqWidth = p_o_xu_cfg->p_PrbMapDl->prbMap[0].iqWidth; if (p_o_xu_cfg->compression == 0) @@ -2025,7 +2592,6 @@ app_io_xran_fh_config_init(UsecaseConfig* p_use_cfg, RuntimeConfig* p_o_xu_cfg, if (p_o_xu_cfg->prachCompMethod == 0) p_o_xu_cfg->prachiqWidth = 16; p_xran_fh_cfg->ru_conf.iqWidth_PRACH = p_o_xu_cfg->prachiqWidth; - p_xran_fh_cfg->ru_conf.fftSize = 0; while (p_o_xu_cfg->nULFftSize >>= 1) @@ -2051,6 +2617,7 @@ app_io_xran_fh_config_init(UsecaseConfig* p_use_cfg, RuntimeConfig* p_o_xu_cfg, p_xran_fh_cfg->max_sections_per_slot = RTE_MAX(p_o_xu_cfg->max_sections_per_slot, XRAN_MIN_SECTIONS_PER_SLOT); p_xran_fh_cfg->max_sections_per_symbol = RTE_MAX(p_o_xu_cfg->max_sections_per_symbol, XRAN_MIN_SECTIONS_PER_SLOT); + p_xran_fh_cfg->RunSlotPrbMapBySymbolEnable = p_o_xu_cfg->RunSlotPrbMapBySymbolEnable; printf("Max Sections: %d per symb %d per slot\n", p_xran_fh_cfg->max_sections_per_slot, p_xran_fh_cfg->max_sections_per_symbol); if(p_o_xu_cfg->maxFrameId) @@ -2088,6 +2655,12 @@ app_io_xran_fh_config_init(UsecaseConfig* p_use_cfg, RuntimeConfig* p_o_xu_cfg, p_xran_fh_cfg->cp_vlan_tag = p_o_xu_cfg->cp_vlan_tag; p_xran_fh_cfg->up_vlan_tag = p_o_xu_cfg->up_vlan_tag; + p_xran_fh_cfg->dssEnable = p_o_xu_cfg->dssEnable; + p_xran_fh_cfg->dssPeriod = p_o_xu_cfg->dssPeriod; + for(i=0; idssPeriod; i++) { + p_xran_fh_cfg->technology[i] = p_o_xu_cfg->technology[i]; + } + return ret; } @@ -2123,6 +2696,7 @@ app_io_xran_fh_init_init(UsecaseConfig* p_use_cfg, RuntimeConfig* p_o_xu_cfg, s p_xran_fh_init->io_cfg.eowd_cmn[APP_O_DU].measId = p_use_cfg->owdmMeasId; p_xran_fh_init->io_cfg.eowd_cmn[APP_O_DU].owdm_enable = p_use_cfg->owdmEnable; p_xran_fh_init->io_cfg.eowd_cmn[APP_O_DU].owdm_PlLength = p_use_cfg->owdmPlLength; + p_xran_fh_init->dlCpProcBurst = p_use_cfg->dlCpProcBurst; } else { printf("set O-RU\n"); @@ -2144,6 +2718,20 @@ app_io_xran_fh_init_init(UsecaseConfig* p_use_cfg, RuntimeConfig* p_o_xu_cfg, s p_xran_fh_init->io_cfg.eowd_cmn[APP_O_RU].owdm_PlLength = p_use_cfg->owdmPlLength; } + if(p_use_cfg->bbu_offload) { + if (p_xran_fh_init->io_cfg.id == 0) { /* O-DU */ + p_xran_fh_init->io_cfg.bbu_offload = 1; + p_xran_fh_init->dlCpProcBurst = 1; + } else { + p_xran_fh_init->io_cfg.bbu_offload = 0; + } + } else { + p_xran_fh_init->io_cfg.bbu_offload = 0; + } + + if (p_xran_fh_init->io_cfg.bbu_offload == 0 && XRAN_N_FE_BUF_LEN < 20) + rte_panic("Sample application with out BBU requires XRAN_N_FE_BUF_LEN to be at least 20 TTIs\n"); + p_xran_fh_init->io_cfg.io_sleep = p_use_cfg->io_sleep; p_xran_fh_init->io_cfg.dpdkMemorySize = p_use_cfg->dpdk_mem_sz; p_xran_fh_init->io_cfg.bbdev_mode = XRAN_BBDEV_NOT_USED; @@ -2152,6 +2740,11 @@ app_io_xran_fh_init_init(UsecaseConfig* p_use_cfg, RuntimeConfig* p_o_xu_cfg, s p_xran_fh_init->io_cfg.nEthLinePerPort = p_use_cfg->EthLinesNumber; p_xran_fh_init->io_cfg.nEthLineSpeed = p_use_cfg->EthLinkSpeed; + if(p_use_cfg->mlogxrandisable == 1) + p_xran_fh_init->mlogxranenable = 0; + else + p_xran_fh_init->mlogxranenable = 1; + app_io_xran_eAxCid_conf_set(&p_xran_fh_init->eAxCId_conf, p_o_xu_cfg); i = 0; @@ -2267,3 +2860,53 @@ app_io_xran_buffers_max_sz_set (RuntimeConfig* p_o_xu_cfg) printf("nSW_ToFpga_FTH_TxBufferLen %d\n", nSW_ToFpga_FTH_TxBufferLen); return 0; } + +int32_t +app_io_xran_map_cellid_to_port(struct bbu_xran_io_if * p_xran_io, uint32_t cell_id, uint32_t *ret_cc_id) +{ + int32_t port_id; + int32_t cc_id; + + if(p_xran_io) { + if(cell_id < XRAN_PORTS_NUM*XRAN_MAX_SECTOR_NR) { + for (port_id = 0 ; port_id < XRAN_PORTS_NUM && port_id < p_xran_io->num_o_ru; port_id++) { + for(cc_id = 0; cc_id < XRAN_MAX_SECTOR_NR && cc_id < p_xran_io->num_cc_per_port[port_id]; cc_id++) + if(cell_id == (uint32_t)p_xran_io->map_cell_id2port[port_id][cc_id]) { + if(ret_cc_id) { + *ret_cc_id = cc_id; + return port_id; + } + } + } + } + } + + printf("%s error [cell_id %d]\n", __FUNCTION__, cell_id); + return -1; +} + +#ifndef FWK_ENABLED +void +app_io_xran_fh_bbu_rx_callback(void *pCallbackTag, xran_status_t status) +{ + app_io_xran_fh_rx_callback(pCallbackTag, status); +} + +void +app_io_xran_fh_bbu_rx_bfw_callback(void *pCallbackTag, xran_status_t status) +{ + app_io_xran_fh_rx_bfw_callback(pCallbackTag, status); +} + +void +app_io_xran_fh_bbu_rx_prach_callback(void *pCallbackTag, xran_status_t status) +{ + app_io_xran_fh_rx_prach_callback(pCallbackTag, status); +} + +void +app_io_xran_fh_bbu_rx_srs_callback(void *pCallbackTag, xran_status_t status) +{ + app_io_xran_fh_rx_srs_callback(pCallbackTag, status); +} +#endif diff --git a/fhi_lib/app/src/app_io_fh_xran.h b/fhi_lib/app/src/app_io_fh_xran.h index 652db55..86fa605 100644 --- a/fhi_lib/app/src/app_io_fh_xran.h +++ b/fhi_lib/app/src/app_io_fh_xran.h @@ -72,6 +72,8 @@ typedef enum { XRANFTHRACH_IN, XRANSRS_IN, XRANSRS_PRB_MAP_IN, + XRANCP_PRB_MAP_IN_RX, + XRANCP_PRB_MAP_IN_TX, XRANSRS_SEC_DESC_IN, MAX_SW_XRAN_INTERFACE_NUM } SWXRANInterfaceTypeEnum; @@ -93,6 +95,9 @@ struct xran_io_buf_ctrl { }; struct xran_io_shared_ctrl { + enum xran_input_byte_order byteOrder; /* Order of bytes in int16_t in buffer. Big or little endian */ + enum xran_input_i_q_order iqOrder; /* order of IQs in the buffer */ + /* io struct */ struct xran_io_buf_ctrl sFrontHaulTxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR]; struct xran_io_buf_ctrl sFrontHaulTxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR]; @@ -105,6 +110,9 @@ struct xran_io_shared_ctrl { struct xran_io_buf_ctrl sFHSrsRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR]; struct xran_io_buf_ctrl sFHSrsRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR]; + struct xran_io_buf_ctrl sFHCpRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR]; + struct xran_io_buf_ctrl sFHCpTxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR]; + /* buffers lists */ struct xran_flat_buffer sFrontHaulTxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT]; struct xran_flat_buffer sFrontHaulTxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR]; @@ -113,9 +121,14 @@ struct xran_io_shared_ctrl { struct xran_flat_buffer sFHPrachRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT]; struct xran_flat_buffer sFHPrachRxBuffersDecomp[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT]; + struct xran_flat_buffer sFrontHaulCpRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR]; + struct xran_flat_buffer sFrontHaulCpTxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR]; + /* Cat B SRS buffers */ struct xran_flat_buffer sFHSrsRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT]; struct xran_flat_buffer sFHSrsRxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR]; + + // struct xran_flat_buffer sFHCpRxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR]; }; struct bbu_xran_io_if { @@ -124,7 +137,14 @@ struct bbu_xran_io_if { uint16_t nInstanceNum[XRAN_PORTS_NUM]; /**< instance is equivalent to CC */ uint16_t DynamicSectionEna; + uint16_t DynamicSectionEnaUL; uint32_t nPhaseCompFlag; + uint32_t xranModCompEna; + uint32_t xranCompMethod; + uint32_t iqWidth; + uint32_t mtu; + + int32_t bbu_offload; /**< enable packet handling on BBU cores */ int32_t num_o_ru; int32_t num_cc_per_port[XRAN_PORTS_NUM]; @@ -135,6 +155,7 @@ struct bbu_xran_io_if { struct xran_cb_tag RxCbTag[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR]; struct xran_cb_tag PrachCbTag[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR]; struct xran_cb_tag SrsCbTag[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR]; + struct xran_cb_tag BfwCbTag[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR]; }; struct bbu_xran_io_if* app_io_xran_if_alloc(void); @@ -143,7 +164,7 @@ void app_io_xran_if_free(void); struct xran_io_shared_ctrl * app_io_xran_if_ctrl_get(uint32_t o_xu_id); int32_t app_io_xran_sfidx_get(uint8_t nNrOfSlotInSf); -int32_t app_io_xran_interface(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg, UsecaseConfig* p_use_cfg); +int32_t app_io_xran_interface(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg, UsecaseConfig* p_use_cfg, struct xran_fh_init* p_xran_fh_init); int32_t app_io_xran_iq_content_init(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg); int32_t app_io_xran_iq_content_get(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg); int32_t app_io_xran_eAxCid_conf_set(struct xran_eaxcid_config *p_eAxC_cfg, RuntimeConfig * p_s_cfg); @@ -151,11 +172,47 @@ int32_t app_io_xran_fh_config_init(UsecaseConfig* p_use_cfg, RuntimeConfig* p_o int32_t app_io_xran_fh_init_init(UsecaseConfig* p_use_cfg, RuntimeConfig* p_o_xu_cfg, struct xran_fh_init* p_xran_fh_init); int32_t app_io_xran_buffers_max_sz_set (RuntimeConfig* p_o_xu_cfg); +int32_t app_io_xran_dl_post_func(uint16_t nCellIdx, uint32_t nSfIdx, uint32_t nSymMask, uint32_t nAntStart, uint32_t nAntNum); + int32_t app_io_xran_dl_tti_call_back(void * param); int32_t app_io_xran_ul_half_slot_call_back(void * param); int32_t app_io_xran_ul_full_slot_call_back(void * param); int32_t app_io_xran_ul_custom_sym_call_back(void * param, struct xran_sense_of_time* time); +int32_t app_io_xran_map_cellid_to_port(struct bbu_xran_io_if * p_xran_io, uint32_t cell_id, uint32_t *ret_cc_id); + +int32_t app_io_xran_iq_content_init_cp_tx(uint8_t appMode, struct xran_fh_config *pXranConf, + struct bbu_xran_io_if *psBbuIo, struct xran_io_shared_ctrl *psIoCtrl, struct o_xu_buffers * p_iq, + int32_t cc_id, int32_t ant_id, int32_t sym_id, int32_t tti, int32_t flowId); + +int32_t app_io_xran_iq_content_init_cp_rx(uint8_t appMode, struct xran_fh_config *pXranConf, + struct bbu_xran_io_if *psBbuIo, struct xran_io_shared_ctrl *psIoCtrl, struct o_xu_buffers * p_iq, + int32_t cc_id, int32_t ant_id, int32_t sym_id, int32_t tti, int32_t flowId); + +int32_t app_io_xran_iq_content_init_up_tx(uint8_t appMode, struct xran_fh_config *pXranConf, + struct bbu_xran_io_if *psBbuIo, struct xran_io_shared_ctrl *psIoCtrl, struct o_xu_buffers * p_iq, + int32_t cc_id, int32_t ant_id, int32_t sym_id, int32_t tti, int32_t flowId); + +int32_t app_io_xran_iq_content_init_up_prach(uint8_t appMode, struct xran_fh_config *pXranConf, + struct bbu_xran_io_if *psBbuIo, struct xran_io_shared_ctrl *psIoCtrl, struct o_xu_buffers * p_iq, + int32_t cc_id, int32_t ant_id, int32_t sym_id, int32_t tti, int32_t flowId); + +int32_t app_io_xran_iq_content_init_up_srs(uint8_t appMode, struct xran_fh_config *pXranConf, + struct bbu_xran_io_if *psBbuIo, struct xran_io_shared_ctrl *psIoCtrl, struct o_xu_buffers * p_iq, + int32_t cc_id, int32_t ant_id, int32_t sym_id, int32_t tti, int32_t flowId); + +int32_t app_io_xran_iq_content_get_up_rx(uint8_t appMode, struct xran_fh_config *pXranConf, + struct bbu_xran_io_if *psBbuIo, struct xran_io_shared_ctrl *psIoCtrl, struct o_xu_buffers * p_iq, + int32_t cc_id, int32_t ant_id, int32_t sym_id, int32_t tti, int32_t flowId); + +int32_t app_io_xran_iq_content_get_up_prach(uint8_t appMode, struct xran_fh_config *pXranConf, + struct bbu_xran_io_if *psBbuIo, struct xran_io_shared_ctrl *psIoCtrl, struct o_xu_buffers * p_iq, + int32_t cc_id, int32_t ant_id, int32_t sym_id, int32_t tti, int32_t flowId); + +int32_t app_io_xran_iq_content_get_up_srs(uint8_t appMode, struct xran_fh_config *pXranConf, + struct bbu_xran_io_if *psBbuIo, struct xran_io_shared_ctrl *psIoCtrl, struct o_xu_buffers * p_iq, + int32_t cc_id, int32_t ant_id, int32_t sym_id, int32_t tti, int32_t flowId); + void app_io_xran_if_stop(void); #ifdef __cplusplus diff --git a/fhi_lib/app/src/app_profile_xran.c b/fhi_lib/app/src/app_profile_xran.c index 377aa86..f6ed277 100644 --- a/fhi_lib/app/src/app_profile_xran.c +++ b/fhi_lib/app/src/app_profile_xran.c @@ -229,7 +229,7 @@ xran_get_mlog_stats(char *usecase, UsecaseConfig *puConf, RuntimeConfig *psConf[ MLogGetStats(PID_TTI_TIMER, &tti.cnt, &tti.max, &tti.min, &tti.avg); if (tti.cnt != 0) { - sprintf(stats_file, "%s-%s-%s\0", XRAN_REPORT_FILE, (puConf->appMode == APP_O_DU)? "o-du" : "o-ru", usecase); + sprintf(stats_file, "%s-%s-%s", XRAN_REPORT_FILE, (puConf->appMode == APP_O_DU)? "o-du" : "o-ru", usecase); printf("xran report file: %s\n", stats_file); ret = xran_init_mlog_stats(stats_file, mlog_times_p->ticks_per_usec); if (ret != 0) diff --git a/fhi_lib/app/src/app_ul_bbu_pool_tasks.c b/fhi_lib/app/src/app_ul_bbu_pool_tasks.c new file mode 100644 index 0000000..5990b62 --- /dev/null +++ b/fhi_lib/app/src/app_ul_bbu_pool_tasks.c @@ -0,0 +1,675 @@ + /****************************************************************************** +* +* Copyright (c) 2020 Intel. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +* +*******************************************************************************/ + +/** + * @brief This module provides implementation of BBU tasks for sample app + * @file app_bbu.c + * @ingroup xran + * @author Intel Corporation + * + **/ + + +/******************************************************************************* + * Include public/global header files + *******************************************************************************/ +#include +#include +#include +#include +#include +#include +#include + +#include "common.h" +#include "app_bbu_pool.h" +#include "app_io_fh_xran.h" +#include "xran_compression.h" +#include "xran_cp_api.h" +#include "xran_fh_o_du.h" +#include "xran_mlog_task_id.h" + +extern RuntimeConfig* p_startupConfiguration[XRAN_PORTS_NUM]; +static SampleSplitStruct gsUlCfgAxCTaskSplit[MAX_PHY_INSTANCES][MAX_NUM_OF_SF_5G_CTX][MAX_TEST_SPLIT_NUM]; + +void app_bbu_pool_pre_task_ul_cfg(uint32_t nSubframe, uint16_t nCellIdx, TaskPreGen *pPara) +{ + int32_t nSplitGroup = 0; + int32_t iTask = 0; + uint32_t nSfIdx = get_dl_sf_idx(nSubframe, nCellIdx); + uint32_t nCtxNum = get_dl_sf_ctx(nSfIdx, nCellIdx); + SampleSplitStruct *pTaskSplitPara; + int32_t nGroupNum = 0; + int32_t nSymbStart = 0, nSymbPerSplit = 0; + int32_t nTotalLayers = 0, nLayerStart = 0, nLayerPerSplit = 0; + struct bbu_xran_io_if *psXranIoIf = app_io_xran_if_get(); + struct xran_fh_config* pXranConf = NULL; + // struct xran_io_shared_ctrl *psIoCtrl = NULL; + uint32_t nRuCcidx = 0; + int32_t xran_port = 0; + uint32_t neAxc = 0; + + if(psXranIoIf == NULL) + rte_panic("psXranIoIf == NULL"); + + if(nCellIdx >= MAX_PHY_INSTANCES) + rte_panic("nCellIdx >= MAX_PHY_INSTANCES"); + + xran_port = app_io_xran_map_cellid_to_port(psXranIoIf, nCellIdx, &nRuCcidx); + + if(xran_port < 0) { + printf("incorrect xran_port\n"); + return /*EBBUPOOL_CORRECT*/; + } + + // psIoCtrl = app_io_xran_if_ctrl_get(xran_port); + pXranConf = &app_io_xran_fh_config[xran_port]; + if(pXranConf == NULL) + rte_panic("pXranConf"); + + if(pXranConf->ru_conf.xranCat == XRAN_CATEGORY_A) { + neAxc = pXranConf->neAxc; + nSplitGroup = 1; + } else if (pXranConf->ru_conf.xranCat == XRAN_CATEGORY_B) { + neAxc = pXranConf->neAxcUl; + nSplitGroup = neAxc; + } else + rte_panic("neAxc"); + + nTotalLayers = neAxc; + + /* all symb per eAxC */ + nSymbStart = 0; + // nTotalSymb = XRAN_NUM_OF_SYMBOL_PER_SLOT; + nSymbPerSplit = XRAN_NUM_OF_SYMBOL_PER_SLOT; + + nLayerPerSplit = nTotalLayers/nSplitGroup; + + pPara->nTaskNum = nSplitGroup; + for (iTask = 0; iTask < (nSplitGroup-1) && iTask < (MAX_TEST_SPLIT_NUM-1); iTask ++) + { + pTaskSplitPara = &(gsUlCfgAxCTaskSplit[nCellIdx][nCtxNum][iTask]); + pTaskSplitPara->nSymbStart = nSymbStart; + pTaskSplitPara->nSymbNum = nSymbPerSplit; + pTaskSplitPara->eSplitType = LAYER_SPLIT; + pTaskSplitPara->nSplitIndex = iTask; + pTaskSplitPara->nGroupStart = 0; + pTaskSplitPara->nGroupNum = nGroupNum; + pTaskSplitPara->nLayerStart = nLayerStart; + pTaskSplitPara->nLayerNum = nLayerPerSplit; + pPara->pTaskExePara[iTask] = pTaskSplitPara; + //nSymbStart += nSymbPerSplit; + nLayerStart += nLayerPerSplit; + } + + pTaskSplitPara = &(gsUlCfgAxCTaskSplit[nCellIdx][nCtxNum][iTask]); + pTaskSplitPara->nSymbStart = nSymbStart; + pTaskSplitPara->nSymbNum = nSymbPerSplit; + pTaskSplitPara->eSplitType = LAYER_SPLIT; + pTaskSplitPara->nSplitIndex = iTask; + pTaskSplitPara->nGroupStart = 0; + pTaskSplitPara->nGroupNum = nGroupNum; + pTaskSplitPara->nLayerStart = nLayerStart; + pTaskSplitPara->nLayerNum = nTotalLayers - nLayerStart; + pPara->pTaskExePara[iTask] = pTaskSplitPara; + + return; +} + +/*! \brief Task function for UL configuration in PHY. + \param [in] pCookies Task input parameter. + \return BBU pool state +*/ +int32_t app_bbu_pool_task_ul_config(void * pCookies) +{ + EventCtrlStruct *pEventCtrl = (EventCtrlStruct *)pCookies; + uint16_t nCellIdx = pEventCtrl->nCellIdx; + uint32_t nSfIdx = get_ul_sf_idx(pEventCtrl->nSlotIdx, nCellIdx); + uint32_t nCtxNum = get_ul_sf_ctx(nSfIdx, nCellIdx); + uint64_t mlog_start = MLogTick();// nTtiStartTime = gTtiStartTime; + uint32_t mlogVariablesCnt, mlogVariables[50]; + uint32_t nRuCcidx = 0; + int32_t xran_port = 0; + struct bbu_xran_io_if *psXranIoIf = app_io_xran_if_get(); + struct xran_fh_config* pXranConf = NULL; + // uint32_t neAxc = 0; + xran_status_t status; + struct xran_io_shared_ctrl *psIoCtrl = NULL; + int32_t cc_id, ant_id, sym_id, tti; + int32_t flowId; + struct o_xu_buffers * p_iq = NULL; + int32_t nSymbMask = 0b11111111111111; + RuntimeConfig *p_o_xu_cfg = NULL; + SampleSplitStruct *pTaskPara = (SampleSplitStruct*)pEventCtrl->pTaskPara; + uint16_t nLayerStart = 0, nLayer = 0;//, iSplit =0; + + if(psXranIoIf == NULL) + rte_panic("psXranIoIf == NULL"); + + xran_port = app_io_xran_map_cellid_to_port(psXranIoIf, nCellIdx, &nRuCcidx); + + if(xran_port < 0) { + printf("incorrect xran_port\n"); + return EBBUPOOL_CORRECT; + } + psIoCtrl = app_io_xran_if_ctrl_get(xran_port); + if(psIoCtrl == NULL) + rte_panic("psIoCtrl"); + + pXranConf = &app_io_xran_fh_config[xran_port]; + if(pXranConf == NULL) + rte_panic("pXranConf"); + +#if 0 + if(pXranConf->ru_conf.xranCat == XRAN_CATEGORY_A) + neAxc = pXranConf->neAxc; + else if (pXranConf->ru_conf.xranCat == XRAN_CATEGORY_B) + neAxc = pXranConf->neAxcUl; + else + rte_panic("neAxc"); +#endif + mlogVariablesCnt = 0; + mlogVariables[mlogVariablesCnt++] = 0xCCEECCEE; + mlogVariables[mlogVariablesCnt++] = pEventCtrl->nSlotIdx; + mlogVariables[mlogVariablesCnt++] = 0; + mlogVariables[mlogVariablesCnt++] = nCellIdx; + mlogVariables[mlogVariablesCnt++] = nSfIdx; + mlogVariables[mlogVariablesCnt++] = nCtxNum; + mlogVariables[mlogVariablesCnt++] = xran_port; + mlogVariables[mlogVariablesCnt++] = nRuCcidx; + + p_o_xu_cfg = p_startupConfiguration[xran_port]; + if(p_o_xu_cfg == NULL) + rte_panic("p_o_xu_cfg"); + + if(LAYER_SPLIT == pTaskPara->eSplitType) { + // iSplit = pTaskPara->nSplitIndex; + nLayerStart = pTaskPara->nLayerStart; + nLayer = pTaskPara->nLayerNum; + //printf("\nsf %d nSymbStart %d nSymb %d iSplit %d", nSfIdx, nSymbStart, nSymb, iSplit); + } else { + rte_panic("LAYER_SPLIT == pTaskPara->eSplitType"); + } + + if(p_o_xu_cfg->p_buff) { + p_iq = p_o_xu_cfg->p_buff; + } else { + rte_panic("Error p_o_xu_cfg->p_buff\n"); + } + tti = nSfIdx; + for(cc_id = nRuCcidx; cc_id < psXranIoIf->num_cc_per_port[xran_port]; cc_id++) { + if (cc_id >= XRAN_MAX_SECTOR_NR) + { + rte_panic("cell id %d exceeding max number", cc_id); + } + for(ant_id = nLayerStart; ant_id < (nLayerStart + nLayer); ant_id++) { + if(p_o_xu_cfg->appMode == APP_O_DU) { + flowId = p_o_xu_cfg->numAxc * cc_id + ant_id; + } else { + flowId = p_o_xu_cfg->numUlAxc * cc_id + ant_id; + } + for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) { + if(((1 << sym_id) & nSymbMask)) { + if ((status = app_io_xran_iq_content_init_cp_rx(p_o_xu_cfg->appMode, pXranConf, + psXranIoIf, psIoCtrl, p_iq, + cc_id, ant_id, sym_id, tti, flowId)) != 0) { + rte_panic("app_io_xran_iq_content_init_cp_rx"); + } + } + } + } + } + + xran_prepare_cp_ul_slot(xran_port, nSfIdx, nRuCcidx, /*psXranIoIf->num_cc_per_port[xran_port]*/ 1, nSymbMask, nLayerStart, + nLayer, 0, XRAN_NUM_OF_SYMBOL_PER_SLOT); + + if (mlogVariablesCnt) + MLogAddVariables((uint32_t)mlogVariablesCnt, (uint32_t *)mlogVariables, mlog_start); + + //unlock the next task + next_event_unlock(pCookies); + MLogTask(PCID_GNB_UL_CFG_CC0+nCellIdx, mlog_start, MLogTick()); + + return EBBUPOOL_CORRECT; +} + +int32_t +app_io_xran_ul_decomp_func(uint16_t nCellIdx, uint32_t nSfIdx, uint32_t nSymMask, + uint32_t nAntStart, uint32_t nAntNum, uint32_t nSymStart, uint32_t nSymNum) +{ + xran_status_t status; + struct bbu_xran_io_if *psXranIoIf = app_io_xran_if_get(); + int32_t xran_port = 0; + uint32_t nRuCcidx = 0; + struct o_xu_buffers * p_iq = NULL; + RuntimeConfig *p_o_xu_cfg = NULL; + int32_t flowId = 0; + struct xran_fh_config *pXranConf = NULL; + int32_t cc_id, ant_id, sym_id, tti; + struct xran_io_shared_ctrl *psIoCtrl = NULL; + uint32_t xran_max_antenna_nr; + // uint32_t xran_max_ant_array_elm_nr; + // uint32_t xran_max_antenna_nr_prach; + + xran_port = app_io_xran_map_cellid_to_port(psXranIoIf, nCellIdx, &nRuCcidx); + + if(xran_port < 0) { + printf("incorrect xran_port\n"); + return FAILURE; + } + + psIoCtrl = app_io_xran_if_ctrl_get(xran_port); + + if(psIoCtrl == NULL) { + printf("psIoCtrl == NULL\n"); + return FAILURE; + } + + p_o_xu_cfg = p_startupConfiguration[xran_port]; + if(p_o_xu_cfg == NULL) { + printf("p_o_xu_cfg == NULL\n"); + return FAILURE; + } + + if(p_o_xu_cfg->p_buff) { + p_iq = p_o_xu_cfg->p_buff; + } else { + rte_panic("Error p_o_xu_cfg->p_buff\n"); + } + + pXranConf = &app_io_xran_fh_config[xran_port]; + + xran_max_antenna_nr = RTE_MAX(p_o_xu_cfg->numAxc, p_o_xu_cfg->numUlAxc); + // xran_max_ant_array_elm_nr = RTE_MAX(p_o_xu_cfg->antElmTRx, xran_max_antenna_nr); + // xran_max_antenna_nr_prach = RTE_MIN(xran_max_antenna_nr, XRAN_MAX_PRACH_ANT_NUM); + + tti = nSfIdx; + for(cc_id = nRuCcidx; cc_id < psXranIoIf->num_cc_per_port[xran_port]; cc_id++) { + for(ant_id = nAntStart; ant_id < (nAntStart + nAntNum) && ant_id < xran_max_antenna_nr; ant_id++) { + if(p_o_xu_cfg->appMode == APP_O_DU) { + flowId = p_o_xu_cfg->numUlAxc * cc_id + ant_id; + } else { + flowId = p_o_xu_cfg->numAxc * cc_id + ant_id; + } + for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) { + if(((1 << sym_id) & nSymMask)) { + if ((status = app_io_xran_iq_content_get_up_rx(p_o_xu_cfg->appMode, pXranConf, + psXranIoIf, psIoCtrl, p_iq, + cc_id, ant_id, sym_id, tti, flowId)) != 0) { + rte_panic("app_io_xran_iq_content_get_up_rx"); + } + } + } + } + } + + return SUCCESS; +} + +int32_t +app_io_xran_prach_decomp_func(uint16_t nCellIdx, uint32_t nSfIdx, uint32_t nSymMask, + uint32_t nAntStart, uint32_t nAntNum, uint32_t nSymStart, uint32_t nSymNum) +{ + xran_status_t status; + struct bbu_xran_io_if *psXranIoIf = app_io_xran_if_get(); + int32_t xran_port = 0; + uint32_t nRuCcidx = 0; + struct o_xu_buffers * p_iq = NULL; + RuntimeConfig *p_o_xu_cfg = NULL; + int32_t flowId = 0; + struct xran_fh_config *pXranConf = NULL; + int32_t cc_id, ant_id, sym_id, tti; + struct xran_io_shared_ctrl *psIoCtrl = NULL; + uint32_t xran_max_antenna_nr; + // uint32_t xran_max_ant_array_elm_nr; + uint32_t xran_max_antenna_nr_prach; + + xran_port = app_io_xran_map_cellid_to_port(psXranIoIf, nCellIdx, &nRuCcidx); + + if(xran_port < 0) { + printf("incorrect xran_port\n"); + return FAILURE; + } + + psIoCtrl = app_io_xran_if_ctrl_get(xran_port); + + if(psIoCtrl == NULL) { + printf("psIoCtrl == NULL\n"); + return FAILURE; + } + + p_o_xu_cfg = p_startupConfiguration[xran_port]; + if(p_o_xu_cfg == NULL) { + printf("p_o_xu_cfg == NULL\n"); + return FAILURE; + } + + if(p_o_xu_cfg->p_buff) { + p_iq = p_o_xu_cfg->p_buff; + } else { + rte_panic("Error p_o_xu_cfg->p_buff\n"); + } + + pXranConf = &app_io_xran_fh_config[xran_port]; + + xran_max_antenna_nr = RTE_MAX(p_o_xu_cfg->numAxc, p_o_xu_cfg->numUlAxc); + // xran_max_ant_array_elm_nr = RTE_MAX(p_o_xu_cfg->antElmTRx, xran_max_antenna_nr); + xran_max_antenna_nr_prach = RTE_MIN(xran_max_antenna_nr, XRAN_MAX_PRACH_ANT_NUM); + + tti = nSfIdx; + for(cc_id = nRuCcidx; cc_id < psXranIoIf->num_cc_per_port[xran_port]; cc_id++) { + for(ant_id = nAntStart; ant_id < (nAntStart + nAntNum) && ant_id < xran_max_antenna_nr_prach; ant_id++) { + flowId = xran_max_antenna_nr_prach * cc_id + ant_id; + + for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) { + if(((1 << sym_id) & nSymMask)) { + if ((status = app_io_xran_iq_content_get_up_prach(p_o_xu_cfg->appMode, pXranConf, + psXranIoIf, psIoCtrl, p_iq, + cc_id, ant_id, sym_id, tti, flowId)) != 0) { + rte_panic("app_io_xran_iq_content_get_up_prach"); + } + } + } + + } + } + + return SUCCESS; +} + +int32_t +app_io_xran_srs_decomp_func(uint16_t nCellIdx, uint32_t nSfIdx, uint32_t nSymMask, + uint32_t nAntStart, uint32_t nAntNum, uint32_t nSymStart, uint32_t nSymNum) +{ + xran_status_t status; + struct bbu_xran_io_if *psXranIoIf = app_io_xran_if_get(); + int32_t xran_port = 0; + uint32_t nRuCcidx = 0; + struct o_xu_buffers * p_iq = NULL; + RuntimeConfig *p_o_xu_cfg = NULL; + int32_t flowId = 0; + struct xran_fh_config *pXranConf = NULL; + int32_t cc_id, ant_id, sym_id, tti; + struct xran_io_shared_ctrl *psIoCtrl = NULL; + uint32_t xran_max_antenna_nr; + uint32_t xran_max_ant_array_elm_nr; + + xran_port = app_io_xran_map_cellid_to_port(psXranIoIf, nCellIdx, &nRuCcidx); + + if(xran_port < 0) { + printf("incorrect xran_port\n"); + return FAILURE; + } + + psIoCtrl = app_io_xran_if_ctrl_get(xran_port); + + if(psIoCtrl == NULL) { + printf("psIoCtrl == NULL\n"); + return FAILURE; + } + + p_o_xu_cfg = p_startupConfiguration[xran_port]; + if(p_o_xu_cfg == NULL) { + printf("p_o_xu_cfg == NULL\n"); + return FAILURE; + } + + if(p_o_xu_cfg->appMode == APP_O_DU && p_o_xu_cfg->enableSrs){ + if(p_o_xu_cfg->p_buff) { + p_iq = p_o_xu_cfg->p_buff; + } else { + rte_panic("Error p_o_xu_cfg->p_buff\n"); + } + + pXranConf = &app_io_xran_fh_config[xran_port]; + + xran_max_antenna_nr = RTE_MAX(p_o_xu_cfg->numAxc, p_o_xu_cfg->numUlAxc); + xran_max_ant_array_elm_nr = RTE_MAX(p_o_xu_cfg->antElmTRx, xran_max_antenna_nr); + + tti = nSfIdx; + for(cc_id = nRuCcidx; cc_id < psXranIoIf->num_cc_per_port[xran_port]; cc_id++) { + for(ant_id = nAntStart; ant_id < (nAntStart + nAntNum) && ant_id < xran_max_ant_array_elm_nr; ant_id++) { + flowId = pXranConf->nAntElmTRx*cc_id + ant_id; + for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) { + if(((1 << sym_id) & nSymMask)) { + if ((status = app_io_xran_iq_content_get_up_srs(p_o_xu_cfg->appMode, pXranConf, + psXranIoIf, psIoCtrl, p_iq, + cc_id, ant_id, sym_id, tti, flowId)) != 0) { + rte_panic("app_io_xran_iq_content_get_up_srs"); + } + } + } + } + } + } + return SUCCESS; +} + + +int32_t +app_bbu_pool_task_symX_wakeup(void *pCookies, uint32_t nSym) +{ + EventCtrlStruct *pEventCtrl = (EventCtrlStruct *)pCookies; + uint16_t nCellIdx = pEventCtrl->nCellIdx; + uint32_t nSfIdx = pEventCtrl->nSlotIdx;/*get_ul_sf_idx(pEventCtrl->nSlotIdx, nCellIdx);*/ + + uint32_t nSymbMask = 0; + uint32_t nSymStart = 0; + // uint32_t nSymNum = 0; + + uint32_t Nrx_antennas; + uint16_t nOranCellIdx; + + struct bbu_xran_io_if *psXranIoIf = app_io_xran_if_get(); + + int32_t xran_port = 0; + uint32_t nRuCcidx = 0; + struct xran_fh_config *pXranConf = NULL; + + nOranCellIdx = nCellIdx; + xran_port = app_io_xran_map_cellid_to_port(psXranIoIf, nOranCellIdx, &nRuCcidx); + if(xran_port < 0) { + printf("incorrect xran_port\n"); + return FAILURE; + } + + pXranConf = &app_io_xran_fh_config[xran_port]; + Nrx_antennas = pXranConf->neAxcUl; + + if(Nrx_antennas == 0) + rte_panic("[p %d cell %d] Nrx_antennas == 0\n", xran_port, nCellIdx); + + nSymStart = 0; + // nSymNum = XRAN_NUM_OF_SYMBOL_PER_SLOT; + + switch(nSym) + { + case 2: /* [0,1,2] */ + nSymbMask = 0x7; + break; + case 6: /* [3,4,5,6] */ + nSymbMask = 0x78; + break; + case 11: /* [7,8,9,10,11] */ + nSymbMask = 0xF80; + break; + case 13: /* [12,13] */ + nSymbMask = 0x3000; + break; + default: + rte_panic("nSym %d\n", nSym); + } + + + if (nSym == 13) /* w/a to run copy to IQ buffer as single short */ + { + nSymbMask = 0b11111111111111; + app_io_xran_ul_decomp_func(nCellIdx, nSfIdx, nSymbMask, 0, Nrx_antennas, nSymStart, XRAN_NUM_OF_SYMBOL_PER_SLOT); + } + + return EBBUPOOL_CORRECT; +} + +int32_t +app_bbu_pool_task_sym2_wakeup(void *pCookies) +{ + int32_t ret = 0; + // EventCtrlStruct *pEventCtrl = (EventCtrlStruct *)pCookies; + // uint16_t nCellIdx = pEventCtrl->nCellIdx; + uint64_t mlog_start = MLogTick(); + + ret = app_bbu_pool_task_symX_wakeup(pCookies, 2); + + //unlock the next task + next_event_unlock(pCookies); + MLogTask(PID_GNB_SYM2_WAKEUP, mlog_start, MLogTick()); + + return ret; +} + +int32_t +app_bbu_pool_task_sym6_wakeup(void *pCookies) +{ + int32_t ret = 0; + // EventCtrlStruct *pEventCtrl = (EventCtrlStruct *)pCookies; + uint64_t mlog_start = MLogTick(); + + ret = app_bbu_pool_task_symX_wakeup(pCookies, 6); + + //unlock the next task + next_event_unlock(pCookies); + MLogTask(PID_GNB_SYM6_WAKEUP, mlog_start, MLogTick()); + return ret; +} + +int32_t +app_bbu_pool_task_sym11_wakeup(void *pCookies) +{ + int32_t ret = 0; + // EventCtrlStruct *pEventCtrl = (EventCtrlStruct *)pCookies; + uint64_t mlog_start = MLogTick(); + + ret = app_bbu_pool_task_symX_wakeup(pCookies, 11); + + //unlock the next task + next_event_unlock(pCookies); + MLogTask(PID_GNB_SYM11_WAKEUP, mlog_start, MLogTick()); + return ret; +} + +int32_t +app_bbu_pool_task_sym13_wakeup(void *pCookies) +{ + int32_t ret = 0; + // EventCtrlStruct *pEventCtrl = (EventCtrlStruct *)pCookies; + uint64_t mlog_start = MLogTick(); + + ret = app_bbu_pool_task_symX_wakeup(pCookies, 13); + + //unlock the next task + next_event_unlock(pCookies); + MLogTask(PID_GNB_SYM13_WAKEUP, mlog_start, MLogTick()); + return ret; +} + +int32_t +app_bbu_pool_task_prach_wakeup(void *pCookies) +{ + EventCtrlStruct *pEventCtrl = (EventCtrlStruct *)pCookies; + uint16_t nCellIdx = pEventCtrl->nCellIdx; + uint32_t nSfIdx = pEventCtrl->nSlotIdx;// get_ul_sf_idx(pEventCtrl->nSlotIdx, nCellIdx); + + uint32_t nSymbMask = 0; + uint32_t nSymStart = 0; + // uint32_t nSymNum = 0; + + uint32_t Nrx_antennas; + uint16_t nOranCellIdx; + + struct bbu_xran_io_if *psXranIoIf = app_io_xran_if_get(); + + int32_t xran_port = 0; + uint32_t nRuCcidx = 0; + struct xran_fh_config *pXranConf = NULL; + uint64_t mlog_start = MLogTick(); + nOranCellIdx = nCellIdx; + xran_port = app_io_xran_map_cellid_to_port(psXranIoIf, nOranCellIdx, &nRuCcidx); + if(xran_port < 0) { + printf("incorrect xran_port\n"); + return FAILURE; + } + + pXranConf = &app_io_xran_fh_config[xran_port]; + Nrx_antennas = RTE_MIN(pXranConf->neAxcUl, XRAN_MAX_PRACH_ANT_NUM); + + if(Nrx_antennas == 0) + rte_panic("Nrx_antennas == 0\n"); + + nSymStart = 0; + // nSymNum = XRAN_NUM_OF_SYMBOL_PER_SLOT; + nSymbMask = 0b11111111111111; + + app_io_xran_prach_decomp_func(nCellIdx, nSfIdx, nSymbMask, 0, Nrx_antennas, nSymStart, XRAN_NUM_OF_SYMBOL_PER_SLOT); + + //unlock the next task + next_event_unlock(pCookies); + MLogTask(PID_GNB_PRACH_WAKEUP, mlog_start, MLogTick()); + return EBBUPOOL_CORRECT; +} + +int32_t +app_bbu_pool_task_srs_wakeup(void *pCookies) +{ + int32_t ret = 0; + EventCtrlStruct *pEventCtrl = (EventCtrlStruct *)pCookies; + uint16_t nCellIdx = pEventCtrl->nCellIdx; + uint32_t nSfIdx = pEventCtrl->nSlotIdx;// get_ul_sf_idx(pEventCtrl->nSlotIdx, nCellIdx); + + uint32_t nSymbMask = 0; + uint32_t nSymStart = 0; + // uint32_t nSymNum = 0; + + uint32_t Nrx_antennas; + uint16_t nOranCellIdx; + + struct bbu_xran_io_if *psXranIoIf = app_io_xran_if_get(); + + int32_t xran_port = 0; + uint32_t nRuCcidx = 0; + struct xran_fh_config *pXranConf = NULL; + uint64_t mlog_start = MLogTick(); + nOranCellIdx = nCellIdx; + xran_port = app_io_xran_map_cellid_to_port(psXranIoIf, nOranCellIdx, &nRuCcidx); + if(xran_port < 0) { + printf("incorrect xran_port\n"); + return FAILURE; + } + + pXranConf = &app_io_xran_fh_config[xran_port]; + Nrx_antennas = pXranConf->nAntElmTRx; + + nSymStart = 0; + // nSymNum = XRAN_NUM_OF_SYMBOL_PER_SLOT; + nSymbMask = 0b11111111111111; + + ret = app_io_xran_srs_decomp_func(nCellIdx, nSfIdx, nSymbMask, 0, Nrx_antennas, nSymStart, XRAN_NUM_OF_SYMBOL_PER_SLOT); + //unlock the next task + next_event_unlock(pCookies); + MLogTask(PID_GNB_SRS_WAKEUP, mlog_start, MLogTick()); + return ret; +} diff --git a/fhi_lib/app/src/aux_cline.c b/fhi_lib/app/src/aux_cline.c new file mode 100644 index 0000000..071a6df --- /dev/null +++ b/fhi_lib/app/src/aux_cline.c @@ -0,0 +1,743 @@ +/****************************************************************************** +* +* Copyright (c) 2020 Intel. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +* +*******************************************************************************/ + +/** + * @brief This file has utilities to parse the parameters passed in through the command + * line and configure the application based on these parameters + * @file aux_cline.c + * @ingroup xran + * @author Intel Corporation + **/ + + +#include "aux_cline.h" + +#include +#include +#include +#include +#include +#include + + +typedef struct _CLINE_KEY_TABLE_ +{ + char *name; + char *value; +} CLINE_KEY_TABLE; + + +#define CLINE_MAXKEYS (256) +#define CLINE_MAX_STRING_LENGTH (128) +#define CLINE_MAXKEYSIZE (2048) + +static CLINE_KEY_TABLE PhyAppKeys[CLINE_MAXKEYS]; +static uint32_t pPhyCfgNumEntries = 0; + + + +//------------------------------------------------------------------------------------------- +/** @ingroup group_source_auxlib_cline + * + * @param void + * + * @return 0 if AUX_SUCCESS + * + * @description + * Initialize Cline Interface + * +**/ +//------------------------------------------------------------------------------------------- +int cline_init(void) +{ + uint32_t i; + pPhyCfgNumEntries = 0; + for (i = 0; i < CLINE_MAXKEYS; i++) + { + PhyAppKeys[i].name = NULL; + PhyAppKeys[i].value = NULL; + } + + return AUX_SUCCESS; +} + + + +//------------------------------------------------------------------------------------------- +/** @ingroup group_source_auxlib_cline + * + * @param[in] *name String to search for + * @param[out] *value Pointer to location where number needs to be stored + * @param[in] deflt Default value to put into the value field if string is not found + * + * @return 0 if AUX_SUCCESS + * + * @description + * This funtion searchs for a string from the phycfg.xml file and returns the number that + * was associated in file + * +**/ +//------------------------------------------------------------------------------------------- +uint32_t cline_set_int(const char *name, int *value, int deflt) +{ + uint32_t i; + + for (i = 0; i < pPhyCfgNumEntries; i++) + { + if (PhyAppKeys[i].name) + { + if (strcasecmp(name, PhyAppKeys[i].name) == 0) + { + char *p1 = PhyAppKeys[i].value; + if (strstr(p1, "0x") || strstr(p1, "0X")) + { + uint64_t core; + if (cline_covert_hex_2_dec(p1, &core) != AUX_SUCCESS) + { + printf("cline_set_int Failed (%s)\n", p1); + return AUX_FAILURE; + } + *value = (int)core; + } + else + { + *value = (int)strtol(PhyAppKeys[i].value, NULL, 0); + if ((*value == 0 && errno == EINVAL) || (*value == INT_MAX && errno == ERANGE)) + { + *value = deflt; + return AUX_FAILURE; + } + } + break; + } + } + else + { + // End of list reached + *value = deflt; + printf("incomming setting in XML: param \"%s\" is not found!\n", name); + return AUX_FAILURE; + } + } + + return AUX_SUCCESS; +} + + + + + +//------------------------------------------------------------------------------------------- +/** @ingroup group_source_auxlib_cline + * + * @param[in] *name String to search for + * @param[out] *value Pointer to location where number needs to be stored + * @param[in] deflt Default value to put into the value field if string is not found + * + * @return 0 if AUX_SUCCESS + * + * @description + * This funtion searchs for a string from the phycfg.xml file and returns the number that + * was associated in file + * +**/ +//------------------------------------------------------------------------------------------- +uint32_t cline_set_uint64(const char *name, uint64_t *value, uint64_t deflt) +{ + uint32_t i; + + for (i = 0; i < pPhyCfgNumEntries; i++) + { + if (PhyAppKeys[i].name) + { + if (strcasecmp(name, PhyAppKeys[i].name) == 0) + { + if (strstr(PhyAppKeys[i].value, "0x") || strstr(PhyAppKeys[i].value, "0X")) + { + if (cline_covert_hex_2_dec(PhyAppKeys[i].value, value) != AUX_SUCCESS) + { + printf("cline_covert_hex_2_dec Failed (%s)\n", PhyAppKeys[i].value); + return AUX_FAILURE; + } + } + else + { + *value = strtoull(PhyAppKeys[i].value, NULL, 0); + } + if ((*value == 0 && errno == EINVAL) || (*value == LONG_MAX && errno == ERANGE)) + { + *value = deflt; + return AUX_FAILURE; + } + break; + } + } + else + { + // End of list reached + *value = deflt; + printf("incomming setting in XML: param \"%s\" is not found!\n", name); + return AUX_FAILURE; + } + } + + return AUX_SUCCESS; +} + + +//------------------------------------------------------------------------------------------- +/** @ingroup group_source_auxlib_cline + * + * @param[in] *pStr String to search for + * @param[out] *pDst Pointer to location where number needs to be stored + * + * @return 0 if AUX_SUCCESS + * + * @description + * This funtion takes a char string as input and converts it to a unit61_t + * +**/ +//------------------------------------------------------------------------------------------- +uint32_t cline_covert_hex_2_dec(char *pStr, uint64_t *pDst) +{ + char nibble; + int32_t i; + uint32_t len; + uint64_t value = 0, mult = 1, nibble_val = 0; + + // Skip over "0x" + pStr += 2; + + len = strlen(pStr); + if (len > 16) + { + printf("String Length is invalid: %p [%d]\n", pStr, len); + } + + for (i = len - 1; i >= 0; i--) + { + nibble = pStr[i]; + if ((nibble >= '0') && (nibble <= '9')) + { + nibble_val = nibble - '0'; + } + else if ((nibble >= 'A') && (nibble <= 'F')) + { + nibble_val = nibble - 'A' + 10; + } + else if ((nibble >= 'a') && (nibble <= 'f')) + { + nibble_val = nibble - 'a' + 10; + } + else + { + printf("String is invalid: %p[%d] %c\n", pStr, i, nibble); + return AUX_FAILURE; + } + + value += (nibble_val * mult); + + mult = mult * 16; + } + + *pDst = value; + + return AUX_SUCCESS; +} + + +//------------------------------------------------------------------------------------------- +/** @ingroup group_source_auxlib_cline + * + * @param[in] *name String to search for + * @param[out] *core Pointer to location where core id needs to be stored + * @param[out] *priority Pointer to location where priority needs to be stored + * @param[out] *policy Pointer to location where policy needs to be stored + * + * @return 0 if AUX_SUCCESS + * + * @description + * This funtion searchs for a string from the phycfg.xml file stores all thread related info into + * output locations + * +**/ +//------------------------------------------------------------------------------------------- +uint32_t cline_set_thread_info(const char *name, uint64_t *core, int *priority, int *policy) +{ +#ifndef TEST_APP + uint32_t i; + int sched; + char *p1, *p2, *p3; + + for (i = 0; i < pPhyCfgNumEntries; i++) + { + if (PhyAppKeys[i].name) + { + if (strcasecmp(name, PhyAppKeys[i].name) == 0) + { + p1 = (char*)PhyAppKeys[i].value; + p2 = strstr(p1, ","); + if (p2) + { + *p2 = '\0'; + p2++; + p3 = strstr(p2, ","); + if (p3) + { + *p3 = '\0'; + p3++; + + if (strstr(p1, "0x") || strstr(p1, "0X")) + { + if (cline_covert_hex_2_dec(p1, core) != AUX_SUCCESS) + { + printf("cline_covert_hex_2_dec Failed (%s)\n", p1); + return AUX_FAILURE; + } + } + else + { + *core = strtoull(p1, NULL, 0); + } + *priority = strtol(p2, NULL, 0); + sched = strtol(p3, NULL, 0); + + *policy = (sched ? SCHED_RR : SCHED_FIFO); + + //print_info_log("%s %ld %d %d\n", name, *core, *priority, *policy); + + return AUX_SUCCESS; + } + else + { + printf("p3 is null %s\n", p2); + } + } + else + { + printf("p2 is null %s\n", p1); + } + + printf("%s FAIL1\n", name); + return AUX_FAILURE; + } + } + else + { + // End of list reached + printf("incomming setting in XML: param \"%s\" is not found!\n", name); + + printf("cline_set_thread_info: %s FAIL2\n", name); + return AUX_FAILURE; + } + } + + printf("cline_set_thread_info: %s FAIL3\n", name); + return AUX_FAILURE; +#else + return AUX_SUCCESS; +#endif +} + +//------------------------------------------------------------------------------------------- +/** @ingroup group_source_auxlib_cline + * + * @param[in] *name String to search for + * @param[in] maxLen Max lenth of output array + * @param[out] *dataOut Pointer to the data array filled by each int element of the input string + * @param[out] *outLen Filled length of the array + * + * @return 0 if AUX_SUCCESS + * + * @description + * This funtion searchs for a string from the phycfg.xml file stores all int value to output array + * +**/ +//------------------------------------------------------------------------------------------- +uint32_t cline_set_int_array(const char *name, int maxLen, int *dataOut, int *outLen) +{ + uint32_t i; + char *p1, *p2; + *outLen = 0; + + for (i = 0; i < pPhyCfgNumEntries; i++) + { + if (PhyAppKeys[i].name) + { + if (strcasecmp(name, PhyAppKeys[i].name) == 0) + { + p1 = (char*)PhyAppKeys[i].value; + while(*outLen < maxLen) + { + p2 = strstr(p1, ","); + if(p2) + { + *p2 = '\0'; + p2 ++; + dataOut[*outLen] = strtol(p1, NULL, 0); + //printf("\ngranularity %d in idx %d",dataOut[*outLen],*outLen); + p1 = p2; + *outLen += 1; + } + else + { + dataOut[*outLen] = strtol(p1, NULL, 0); + //printf("\ngranularity %d in idx %d",dataOut[*outLen],*outLen); + *outLen += 1; + break; + } + } + return AUX_SUCCESS; + } + } + } + + //printf("cline_set_int_array: Could not find %s\n", name); + + return AUX_SUCCESS; +} + + + +//------------------------------------------------------------------------------------------- +/** @ingroup group_source_auxlib_cline + * + * @param[in] *name String to search for + * @param[out] *value Pointer to location where string needs to be stored + * @param[in] deflt Default value to put into the value field if string is not found + * + * @return 0 if AUX_SUCCESS + * + * @description + * This funtion searchs for a string from the phycfg.xml file and returns the string that + * was associated in file + * +**/ +//------------------------------------------------------------------------------------------- +uint32_t cline_set_str(const char *name, char *value, const char *deflt) +{ + uint32_t i; + + for (i = 0; i < CLINE_MAXKEYS; i++) + { + if (PhyAppKeys[i].name) + { + if (strcasecmp(name, PhyAppKeys[i].name) == 0) + { + strcpy(value, PhyAppKeys[i].value); + break; + } + } + else + { + // End of list reached + strcpy(value, deflt); + return AUX_FAILURE; + } + } + + return AUX_SUCCESS; +} + + + + +//------------------------------------------------------------------------------------------- +/** @ingroup group_source_auxlib_cline + * + * @param[in] *pString Pointer to string that needs to be parsed + * + * @return 0 if AUX_SUCCESS + * + * @description + * This function takes a line from phycfg.xml and parses it and if valid fields are found, + * stores the xml tag and the value associated with the tag into a global structure. + * +**/ +//------------------------------------------------------------------------------------------- +int cline_parse_line(char *pString) +{ + char *stringLocal, *ptr1, *ptr2, *ptr3; +// char stringName[CLINE_MAX_STRING_LENGTH] = "", stringValue[CLINE_MAX_STRING_LENGTH] = ""; + char *stringName, *stringValue; + + stringLocal = NULL; + stringName = NULL; + stringValue = NULL; + ptr1 = ptr2 = ptr3 = NULL; + uint32_t strLen = strlen(pString); + if (strLen) + { + stringLocal = (char *)malloc(strLen + 1); + if (stringLocal == NULL) + { + printf("Cannot allocate stringLocal of size %d\n", (strLen + 1)); + return AUX_FAILURE; + } + } + + // Dont Destroy Original String + if (stringLocal) + strcpy(stringLocal, pString); + + if (stringLocal) + { + if (strlen(stringLocal) <= 2) // Probably line feed + { + if (stringLocal) + free(stringLocal); + return AUX_SUCCESS; + } + } + ptr1 = stringLocal; + + // Locate Starting + if (ptr1) + ptr2 = strstr(ptr1, "<"); + if (ptr2 == NULL) + { + if (stringLocal) + free(stringLocal); + printf("no begin at parameters string"); + return AUX_FAILURE; + } + + // See if this is a comment + if (ptr2) + ptr3 = strstr(ptr2, "!--"); + if (ptr3 != NULL) + { + if (stringLocal) + free(stringLocal); + return AUX_SUCCESS; + } + + // Locate Ending + if (ptr2) + ptr3 = strstr(ptr2, ">"); + if (ptr3 == NULL) + { + if (stringLocal) + free(stringLocal); + printf("no ending at parameters string"); + return AUX_FAILURE; + } + + // Copy string + if (ptr3) + *ptr3 = '\0'; + if (ptr2) + strLen = strlen(ptr2 + 1); + if (strLen) + { + stringName = (char *)malloc(strLen + 1); + if (stringName == NULL) + { + if (stringLocal) + free(stringLocal); + printf("Cannot allocate stringName of size %d\n", (strLen + 1)); + return AUX_FAILURE; + } + else + { + if (ptr2) + strcpy(stringName, ptr2 + 1); + } + } + + ptr1 = ptr3+1; + + // Locate Starting + if (ptr1) + ptr2 = strstr(ptr1, "<"); + if (ptr2 != NULL) + { + // Locate Ending + if (ptr2) + ptr3 = strstr(ptr2, ">"); + if (ptr3 == NULL) + { + if (stringName) + free(stringName); + if (stringLocal) + free(stringLocal); + printf("no ending at parameters string"); + return AUX_FAILURE; + } + + // Copy string + strLen = 0; + if (ptr2) + *ptr2 = '\0'; + if (ptr1) + strLen = strlen(ptr1); + if (strLen) + { + stringValue = (char *)malloc(strLen + 1); + if (stringValue == NULL) + { + if (stringName) + free(stringName); + if (stringLocal) + free(stringLocal); + printf("Cannot allocate stringValue of size %d\n", (strLen + 1)); + return AUX_FAILURE; + } + if (ptr1) + strcpy(stringValue, ptr1); + } + +#ifdef WIN32 + printf("Found String: %s with Value: %s\n", stringName, stringValue); +#endif + { + uint32_t len = 0; + + if (stringName) + { + len = strlen(stringName); + if (len) + { + PhyAppKeys[pPhyCfgNumEntries].name = (char *) malloc(len+1); + if (PhyAppKeys[pPhyCfgNumEntries].name == NULL) + { + if (stringName) + free(stringName); + if (stringLocal) + free(stringLocal); + if (stringValue) + free(stringValue); + printf("Cannot allocate PhyAppKeys[pPhyCfgNumEntries].name of size %d\n", (strLen + 1)); + return AUX_FAILURE; + } + if (stringName) + strcpy(PhyAppKeys[pPhyCfgNumEntries].name, stringName); + } + } + + len = 0; + if (stringValue) + { + len = strlen(stringValue); + if (len) + { + PhyAppKeys[pPhyCfgNumEntries].value = (char *)malloc(len + 1); + if (PhyAppKeys[pPhyCfgNumEntries].value == NULL) + { + if (stringName) + free(stringName); + if (stringLocal) + free(stringLocal); + if (stringValue) + free(stringValue); + printf("Cannot allocate PhyAppKeys[pPhyCfgNumEntries].value of size %d\n", (strLen + 1)); + return AUX_FAILURE; + } + if (stringValue) + strcpy(PhyAppKeys[pPhyCfgNumEntries].value, stringValue); + } + } + } + pPhyCfgNumEntries++; + } + + if(stringLocal) + free(stringLocal); + if (stringName) + free(stringName); + if (stringValue) + free(stringValue); + + return AUX_SUCCESS; +} + + + +//------------------------------------------------------------------------------------------- +/** @ingroup group_source_auxlib_cline + * + * @param void + * + * @return void + * + * @description + * This function prints all the tags and values found in the phycfg.xml file after parsing + * +**/ +//------------------------------------------------------------------------------------------- +void cline_print_info(void) +{ +#ifndef TEST_APP + uint32_t i; + + for (i = 0; i < pPhyCfgNumEntries; i++) + { + if (PhyAppKeys[i].name) + { + printf(" --%s=%s\n", PhyAppKeys[i].name, PhyAppKeys[i].value); + } + } + printf("\n"); +#endif + return; +} + + + +//------------------------------------------------------------------------------------------- +/** @ingroup group_source_auxlib_cline + * + * @param[in] argc Number of command line params + * @param[in] *argv[] Array of command line params + * @param[in] pString String to search for + * @param[out] *pDest Location where to store the payload + * + * @return 0 if AUX_SUCCESS + * + * @description + * This function looks for a string passed in from the command line and returns the immediate + * next parameter passed after this. + * +**/ +//------------------------------------------------------------------------------------------- +uint32_t cline_get_string(int argc, char *argv[], char* pString, char *pDest) +{ + uint32_t ret = AUX_FAILURE; + int i = 1, length = (int)strlen(pString); + char *filename = NULL; + + //print_info_log("Searching for string: %s. Length of string: %d\n", pString, length); + while (i < argc) + { + if (strstr(argv[i], pString) != NULL) + { + filename = strstr(argv[i], pString); + filename += (length + 1); + + //print_info_log("Found %s: Val = %s\n", pString, filename); + strcpy(pDest, filename); + + ret = AUX_SUCCESS; + break; + } + + i++; + } + + return ret; +} diff --git a/fhi_lib/app/src/aux_cline.h b/fhi_lib/app/src/aux_cline.h new file mode 100644 index 0000000..5831d59 --- /dev/null +++ b/fhi_lib/app/src/aux_cline.h @@ -0,0 +1,55 @@ +/****************************************************************************** +* +* Copyright (c) 2020 Intel. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +* +*******************************************************************************/ + +/** + * @brief This file has utilities to parse the parameters passed in through the command + * line and configure the application based on these parameters + * @file aux_cline.h + * @ingroup xran + * @author Intel Corporation + **/ + +#ifndef _AUX_CLINE_H_ +#define _AUX_CLINE_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include + +#define AUX_SUCCESS 0 +#define AUX_FAILURE 1 + +int cline_init (void); +uint32_t cline_set_int(const char *name, int *value, int deflt); +uint32_t cline_set_uint64(const char *name, uint64_t *value, uint64_t deflt); +uint32_t cline_covert_hex_2_dec(char *pStr, uint64_t *pDst); +uint32_t cline_set_thread_info(const char *name, uint64_t *core, int *priority, int *sched); +uint32_t cline_set_int_array(const char *name, int maxLen, int *dataOut, int *outLen); +uint32_t cline_set_str(const char *name, char *value, const char *deflt); +int cline_parse_line(char *pString); +void cline_print_info(void); +uint32_t cline_get_string(int argc, char *argv[], char* pString, char *pDest); + +#ifdef __cplusplus +} +#endif + +#endif /*_AUX_CLINE_H_*/ + diff --git a/fhi_lib/app/src/common.c b/fhi_lib/app/src/common.c index f165ef4..e3135c7 100644 --- a/fhi_lib/app/src/common.c +++ b/fhi_lib/app/src/common.c @@ -95,12 +95,7 @@ int16_t nCpSizeF2[2][4][2] = {{68, 36}, {136, 72}, {272, 144}, {544, 288}}, // Numerology 3 (120KHz) }; -uint32_t gMaxSlotNum; -uint32_t gNumDLCtx; -uint32_t gNumULCtx; -uint32_t gDLResetAdvance; -uint32_t gDLProcAdvance; -uint32_t gULProcAdvance; +uint32_t gLocMaxSlotNum; static uint16_t g_NumSlotTDDLoop[XRAN_MAX_SECTOR_NR] = { XRAN_NUM_OF_SLOT_IN_TDD_LOOP }; static uint16_t g_NumDLSymSp[XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SLOT_IN_TDD_LOOP] = {0}; @@ -339,11 +334,11 @@ uint32_t app_xran_cal_nrarfcn(uint32_t nCenterFreq) int32_t app_xran_slot_limit(int32_t nSfIdx) { while (nSfIdx < 0) { - nSfIdx += gMaxSlotNum; + nSfIdx += gLocMaxSlotNum; } - while (nSfIdx >= gMaxSlotNum) { - nSfIdx -= gMaxSlotNum; + while (nSfIdx >= gLocMaxSlotNum) { + nSfIdx -= gLocMaxSlotNum; } return nSfIdx; diff --git a/fhi_lib/app/src/common.h b/fhi_lib/app/src/common.h index 7508117..ac5f471 100644 --- a/fhi_lib/app/src/common.h +++ b/fhi_lib/app/src/common.h @@ -28,7 +28,7 @@ #include #include -#define VERSIONX "oran_e_maintenance_release_v1.0" +#define VERSIONX "oran_f_release_v1.0" #define APP_O_DU 0 #define APP_O_RU 1 @@ -80,9 +80,10 @@ struct o_xu_buffers { int iq_srs_buffer_size_ul; + int numSlots; /**< number of slots in IQ vector */ + int16_t *p_tx_play_buffer[MAX_ANT_CARRIER_SUPPORTED]; int32_t tx_play_buffer_size[MAX_ANT_CARRIER_SUPPORTED]; - int32_t tx_play_buffer_position[MAX_ANT_CARRIER_SUPPORTED]; int16_t *p_tx_prach_play_buffer[MAX_ANT_CARRIER_SUPPORTED]; int32_t tx_prach_play_buffer_size[MAX_ANT_CARRIER_SUPPORTED]; @@ -94,15 +95,12 @@ struct o_xu_buffers { int16_t *p_rx_log_buffer[MAX_ANT_CARRIER_SUPPORTED]; int32_t rx_log_buffer_size[MAX_ANT_CARRIER_SUPPORTED]; - int32_t rx_log_buffer_position[MAX_ANT_CARRIER_SUPPORTED]; int16_t *p_prach_log_buffer[MAX_ANT_CARRIER_SUPPORTED]; int32_t prach_log_buffer_size[MAX_ANT_CARRIER_SUPPORTED]; - int32_t prach_log_buffer_position[MAX_ANT_CARRIER_SUPPORTED]; int16_t *p_srs_log_buffer[MAX_ANT_CARRIER_SUPPORTED_CAT_B]; int32_t srs_log_buffer_size[MAX_ANT_CARRIER_SUPPORTED_CAT_B]; - int32_t srs_log_buffer_position[MAX_ANT_CARRIER_SUPPORTED_CAT_B]; int16_t *p_tx_buffer[MAX_ANT_CARRIER_SUPPORTED]; int32_t tx_buffer_size[MAX_ANT_CARRIER_SUPPORTED]; @@ -112,12 +110,16 @@ struct o_xu_buffers { /* beamforming weights for UL (O-DU) */ int16_t *p_tx_dl_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED]; int32_t tx_dl_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED]; - int32_t tx_dl_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED]; + + int16_t *p_tx_dl_bfw_log_buffer[MAX_ANT_CARRIER_SUPPORTED]; + int32_t tx_dl_bfw_log_buffer_size[MAX_ANT_CARRIER_SUPPORTED]; /* beamforming weights for UL (O-DU) */ int16_t *p_tx_ul_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED]; int32_t tx_ul_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED]; - int32_t tx_ul_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED]; + + int16_t *p_tx_ul_bfw_log_buffer[MAX_ANT_CARRIER_SUPPORTED]; + int32_t tx_ul_bfw_log_buffer_size[MAX_ANT_CARRIER_SUPPORTED]; /* beamforming weights for UL (O-RU) */ int16_t *p_rx_dl_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED]; diff --git a/fhi_lib/app/src/config.c b/fhi_lib/app/src/config.c index 71406d0..14fb3e8 100644 --- a/fhi_lib/app/src/config.c +++ b/fhi_lib/app/src/config.c @@ -83,8 +83,11 @@ #define KEY_FILE_ULBFWUE "UlBfwUe" #define KEY_FILE_O_XU_CFG "oXuCfgFile" +#define KEY_FILE_O_XU_BBU_CFG "oXuBbuCfgFile" #define KEY_O_XU_PCIE_BUS "PciBusAddoXu" #define KEY_O_XU_REM_MAC "oXuRem" +#define KEY_DL_CP_BURST "dlCpProcBurst" +#define KEY_XRAN_MLOG_DIS "xranMlogDisable" #define KEY_FILE_ULSRS "antSrsC" @@ -113,13 +116,17 @@ #define KEY_FILE_SLOT_TX "SlotNumTx" #define KEY_FILE_SLOT_RX "SlotNumRx" -#define KEY_PRACH_ENABLE "rachEanble" -#define KEY_SRS_ENABLE "srsEanble" +#define KEY_PRACH_ENABLE "rachEnable" +#define KEY_SRS_ENABLE "srsEnable" #define KEY_PUSCH_MASK_ENABLE "puschMaskEnable" #define KEY_PUSCH_MASK_SLOT "puschMaskSlot" #define KEY_PRACH_CFGIDX "prachConfigIndex" +#define KEY_PRACH_CFGIDX_LTE "prachConfigIndexLTE" #define KEY_SRS_SYM_IDX "srsSym" +#define KEY_SRS_SLOT "srsSlot" +#define KEY_SRS_NDM_OFFSET "srsNdmOffset" +#define KEY_SRS_NDM_TXDUR "srsNdmTxDuration" #define KEY_MAX_FRAME_ID "maxFrameId" @@ -160,6 +167,7 @@ #define KEY_DEBUG_STOP_CNT "debugStopCount" #define KEY_BBDEV_MODE "bbdevMode" #define KEY_DYNA_SEC_ENA "DynamicSectionEna" +#define EXT_TYPE "extType" #define KEY_ALPHA "Gps_Alpha" #define KEY_BETA "Gps_Beta" @@ -178,7 +186,11 @@ #define KEY_PRBELEM_SRS "PrbElemSrs" #define KEY_MAX_SEC_SYM "max_sections_per_symbol" #define KEY_MAX_SEC_SLOT "max_sections_per_slot" +#define KEY_PRBMAP_BY_SYMB "RunSlotPrbMapBySymbolEna" +#define KEY_DSS_ENABLE "dssEnable" +#define KEY_DSS_PERIOD "dssPeriod" +#define KEY_TECHNOLOGY "technology" typedef int (*fillConfigStruct_fn)(void* cbPram, const char *key, const char *value); struct slot_cfg_to_pars { @@ -192,10 +204,10 @@ struct slot_cfg_to_pars { * * @todo Initialize missing parameters. */ -static void init_config(RuntimeConfig* config) -{ - memset(config , 0, sizeof(RuntimeConfig)); -} +//static void init_config(RuntimeConfig* config) +//{ +// memset(config , 0, sizeof(RuntimeConfig)); +//} static int32_t parseFileViaCb (char *filename, fillConfigStruct_fn cbFn, void* cbParm); @@ -213,7 +225,6 @@ static void trim(char* input) static int fillConfigStruct(RuntimeConfig *config, const char *key, const char *value) { - int32_t parse_res = 0; static uint32_t section_idx_dl = 0; static uint32_t section_idx_ul = 0; static uint32_t section_idx_srs = 0; @@ -470,6 +481,18 @@ static int fillConfigStruct(RuntimeConfig *config, const char *key, const char * } else if (strcmp(key, KEY_SRS_ENABLE) == 0) { config->enableSrs = atoi(value); printf("Srs enable: %d\n",config->enableSrs); + } else if (strcmp(key, KEY_SRS_SYM_IDX) == 0) { + config->srsSymMask = atoi(value); + printf("Srs symbol [0-13]: %d\n",config->srsSymMask); + } else if (strcmp(key, KEY_SRS_SLOT) == 0) { + config->srsSlot = atoi(value); + printf("Srs slot: %d\n",config->srsSlot); + } else if (strcmp(key, KEY_SRS_NDM_OFFSET) == 0) { + config->srsNdmOffset = atoi(value); + printf("Srs NDM Offset: %d\n",config->srsNdmOffset); + } else if (strcmp(key, KEY_SRS_NDM_TXDUR) == 0) { + config->srsNdmTxDuration = atoi(value); + printf("Srs NDM TX duration: %d\n",config->srsNdmTxDuration); } else if (strcmp(key, KEY_PUSCH_MASK_ENABLE) == 0) { config->puschMaskEnable = atoi(value); printf("PUSCH mask enable: %d\n",config->puschMaskEnable); @@ -479,9 +502,9 @@ static int fillConfigStruct(RuntimeConfig *config, const char *key, const char * } else if (strcmp(key, KEY_PRACH_CFGIDX) == 0) { config->prachConfigIndex = atoi(value); printf("Prach config index: %d\n",config->prachConfigIndex); - } else if (strcmp(key, KEY_SRS_SYM_IDX) == 0) { - config->srsSymMask = atoi(value); - printf("Srs symbol [0-13]: %d\n",config->srsSymMask); + } else if (strcmp(key, KEY_PRACH_CFGIDX_LTE) == 0) { + config->prachConfigIndexLTE = atoi(value); + printf("Prach config index LTE for DSS: %d\n",config->prachConfigIndexLTE); } else if (strncmp(key, KEY_FILE_PRACH_AxC, strlen(KEY_FILE_PRACH_AxC)) == 0) { unsigned int ant_num = 0; sscanf(key,"antPrachC%02u",&ant_num); @@ -564,6 +587,9 @@ static int fillConfigStruct(RuntimeConfig *config, const char *key, const char * } else if (strcmp(key, KEY_DYNA_SEC_ENA) == 0) { config->DynamicSectionEna = atoi(value); printf("DynamicSectionEna: %d\n",config->DynamicSectionEna); + } else if (strcmp(key, EXT_TYPE) == 0) { + config->extType = atoi(value); + printf("ExtType: %d\n",config->extType); } else if (strcmp(key, KEY_ALPHA) == 0) { config->GPS_Alpha = atoi(value); printf("GPS_Alpha: %d\n",config->GPS_Alpha); @@ -618,16 +644,17 @@ static int fillConfigStruct(RuntimeConfig *config, const char *key, const char * } else{ struct xran_prb_elm *pPrbElem = &config->p_PrbMapUl->prbMap[section_idx_ul]; - sscanf(value, "%hhu,%hhu,%hhu,%hhu,%hhu,%hhu", + sscanf(value, "%hhu,%hhu,%hhu,%hhu,%hhu,%hhu,%hhu", (uint8_t*)&pPrbElem->bf_weight.numBundPrb, (uint8_t*)&pPrbElem->bf_weight.numSetBFWs, (uint8_t*)&pPrbElem->bf_weight.RAD, (uint8_t*)&pPrbElem->bf_weight.disableBFWs, (uint8_t*)&pPrbElem->bf_weight.bfwIqWidth, - (uint8_t*)&pPrbElem->bf_weight.bfwCompMeth); + (uint8_t*)&pPrbElem->bf_weight.bfwCompMeth, + (uint8_t*)&pPrbElem->bf_weight.extType); printf(KEY_EXTBFW_UL"%d: ", section_idx_ul); - printf("numBundPrb %d, numSetBFW %d, RAD %d, disableBFW %d, bfwIqWidth %d, bfwCompMeth %d\n", - pPrbElem->bf_weight.numBundPrb, pPrbElem->bf_weight.numSetBFWs, pPrbElem->bf_weight.RAD, pPrbElem->bf_weight.disableBFWs, pPrbElem->bf_weight.bfwIqWidth, pPrbElem->bf_weight.bfwCompMeth); + printf("numBundPrb %d, numSetBFW %d, RAD %d, disableBFW %d, bfwIqWidth %d, bfwCompMeth %d, extType %d\n", + pPrbElem->bf_weight.numBundPrb, pPrbElem->bf_weight.numSetBFWs, pPrbElem->bf_weight.RAD, pPrbElem->bf_weight.disableBFWs, pPrbElem->bf_weight.bfwIqWidth, pPrbElem->bf_weight.bfwCompMeth, pPrbElem->bf_weight.extType); } }else if (strcmp(key, KEY_NPRBELEM_DL ) == 0) { config->p_PrbMapDl->nPrbElm = atoi(value); @@ -667,16 +694,17 @@ static int fillConfigStruct(RuntimeConfig *config, const char *key, const char * } else{ struct xran_prb_elm *pPrbElem = &config->p_PrbMapDl->prbMap[section_idx_dl]; - sscanf(value, "%hhu,%hhu,%hhu,%hhu,%hhu,%hhu", + sscanf(value, "%hhu,%hhu,%hhu,%hhu,%hhu,%hhu,%hhu", (uint8_t*)&pPrbElem->bf_weight.numBundPrb, (uint8_t*)&pPrbElem->bf_weight.numSetBFWs, (uint8_t*)&pPrbElem->bf_weight.RAD, (uint8_t*)&pPrbElem->bf_weight.disableBFWs, (uint8_t*)&pPrbElem->bf_weight.bfwIqWidth, - (uint8_t*)&pPrbElem->bf_weight.bfwCompMeth); + (uint8_t*)&pPrbElem->bf_weight.bfwCompMeth, + (uint8_t*)&pPrbElem->bf_weight.extType); printf(KEY_EXTBFW_DL"%d: ", section_idx_dl); - printf("numBundPrb %d, numSetBFW %d, RAD %d, disableBFW %d, bfwIqWidth %d, bfwCompMeth %d\n", - pPrbElem->bf_weight.numBundPrb, pPrbElem->bf_weight.numSetBFWs, pPrbElem->bf_weight.RAD, pPrbElem->bf_weight.disableBFWs, pPrbElem->bf_weight.bfwIqWidth, pPrbElem->bf_weight.bfwCompMeth); + printf("numBundPrb %d, numSetBFW %d, RAD %d, disableBFW %d, bfwIqWidth %d, bfwCompMeth %d, extType %d\n", + pPrbElem->bf_weight.numBundPrb, pPrbElem->bf_weight.numSetBFWs, pPrbElem->bf_weight.RAD, pPrbElem->bf_weight.disableBFWs, pPrbElem->bf_weight.bfwIqWidth, pPrbElem->bf_weight.bfwCompMeth, pPrbElem->bf_weight.extType); } } else if (strcmp(key, KEY_NPRBELEM_SRS ) == 0) { config->p_PrbMapSrs->nPrbElm = atoi(value); @@ -706,18 +734,48 @@ static int fillConfigStruct(RuntimeConfig *config, const char *key, const char * printf("nRBStart %d,nRBSize %d,nStartSymb %d,numSymb %d,nBeamIndex %d, bf_weight_update %d compMethod %d, iqWidth %d BeamFormingType %d\n", pPrbElem->nRBStart,pPrbElem->nRBSize,pPrbElem->nStartSymb,pPrbElem->numSymb,pPrbElem->nBeamIndex, pPrbElem->bf_weight_update, pPrbElem->compMethod, pPrbElem->iqWidth, pPrbElem->BeamFormingType); } + } else if (strcmp(key, KEY_PRBMAP_BY_SYMB ) == 0) { + config->RunSlotPrbMapBySymbolEnable = atoi(value); + printf("RunSlotPrbMapBySymbolEnable: %d\n",config->RunSlotPrbMapBySymbolEnable); + } else if (strcmp(key, KEY_DSS_ENABLE ) == 0) { + config->dssEnable = atoi(value); + printf("dssEnable: %d\n",config->dssEnable); + } else if (strcmp(key, KEY_DSS_PERIOD ) == 0) { + config->dssPeriod = atoi(value); + printf("dssPeriod: %d\n",config->dssPeriod); + } else if (strcmp(key, KEY_TECHNOLOGY ) == 0) { + int i = 0; + sscanf(value, "%02hhx,%02hhx,%02hhx,%02hhx,%02hhx,%02hhx,%02hhx,%02hhx,%02hhx,%02hhx,%02hhx,%02hhx,%02hhx,%02hhx,%02hhx", + (uint8_t *)&config->technology[0], + (uint8_t *)&config->technology[1], + (uint8_t *)&config->technology[2], + (uint8_t *)&config->technology[3], + (uint8_t *)&config->technology[4], + (uint8_t *)&config->technology[5], + (uint8_t *)&config->technology[6], + (uint8_t *)&config->technology[7], + (uint8_t *)&config->technology[8], + (uint8_t *)&config->technology[9], + (uint8_t *)&config->technology[10], + (uint8_t *)&config->technology[11], + (uint8_t *)&config->technology[12], + (uint8_t *)&config->technology[13], + (uint8_t *)&config->technology[14]); + printf("technology:"); + for( i=0; idssPeriod; i++) { + printf("%d ",config->technology[i]); + } + printf("\n"); }else { printf("Unsupported configuration key [%s]\n", key); return -1; } - return 0; } static int fillUsecaseStruct(UsecaseConfig *config, const char *key, const char *value) { - int32_t parse_res = 0; if (strcmp(key, KEY_APP_MODE) == 0){ config->appMode = atoi(value); printf("appMode %d \n", config->appMode); @@ -772,6 +830,9 @@ fillUsecaseStruct(UsecaseConfig *config, const char *key, const char *value) strncpy(&config->o_xu_cfg_file[o_xu_id][0], value, strlen(value)); printf("oXuCfgFile%d: %s\n",o_xu_id, config->o_xu_cfg_file[o_xu_id]); } + } else if (strncmp(key, KEY_FILE_O_XU_BBU_CFG, strlen(KEY_FILE_O_XU_BBU_CFG)) == 0) { + strncpy(&config->o_xu_bbu_cfg_file[0], value, strlen(value)); + printf("oXuBbuCfgFile: %s\n", config->o_xu_bbu_cfg_file); } else if (strncmp(key, KEY_OWDM_INIT_EN, strlen(KEY_OWDM_INIT_EN)) == 0) { config->owdmInitEn = atoi(value); printf("owdmInitEn %d\n", config->owdmInitEn); @@ -836,6 +897,13 @@ fillUsecaseStruct(UsecaseConfig *config, const char *key, const char *value) config->remote_o_xu_addr[xu_num][vf_num].addr_bytes[4], config->remote_o_xu_addr[xu_num][vf_num].addr_bytes[5]); } + } + else if (strncmp(key, KEY_DL_CP_BURST, strlen(KEY_DL_CP_BURST)) == 0) { + config->dlCpProcBurst = atoi(value); + printf("dlCpProcBurst %d\n", config->dlCpProcBurst); + } else if (strncmp(key, KEY_XRAN_MLOG_DIS, strlen(KEY_XRAN_MLOG_DIS)) == 0) { + config->mlogxrandisable = atoi(value); + printf("xranMlogDisable %d\n", config->mlogxrandisable); } else { printf("Unsupported configuration key [%s]\n", key); return -1; @@ -908,16 +976,17 @@ fillSlotStructAsCb(void* cbParam, const char *key, const char *value) printf("section_idx %d of bfw exceeds nPrbElemUl\n",section_idx); }else{ struct xran_prb_elm *pPrbElem = &config->p_SlotPrbMap[direction][slot_idx]->prbMap[section_idx]; - sscanf(value, "%hhu,%hhu,%hhu,%hhu,%hhu,%hhu", + sscanf(value, "%hhu,%hhu,%hhu,%hhu,%hhu,%hhu,%hhu", (uint8_t*)&pPrbElem->bf_weight.numBundPrb, (uint8_t*)&pPrbElem->bf_weight.numSetBFWs, (uint8_t*)&pPrbElem->bf_weight.RAD, (uint8_t*)&pPrbElem->bf_weight.disableBFWs, (uint8_t*)&pPrbElem->bf_weight.bfwIqWidth, - (uint8_t*)&pPrbElem->bf_weight.bfwCompMeth); + (uint8_t*)&pPrbElem->bf_weight.bfwCompMeth, + (uint8_t*)&pPrbElem->bf_weight.extType); printf(KEY_EXTBFW_UL"%d: ", section_idx); - printf("numBundPrb %d, numSetBFW %d, RAD %d, disableBFW %d, bfwIqWidth %d, bfwCompMeth %d\n", - pPrbElem->bf_weight.numBundPrb, pPrbElem->bf_weight.numSetBFWs, pPrbElem->bf_weight.RAD, pPrbElem->bf_weight.disableBFWs, pPrbElem->bf_weight.bfwIqWidth, pPrbElem->bf_weight.bfwCompMeth); + printf("numBundPrb %d, numSetBFW %d, RAD %d, disableBFW %d, bfwIqWidth %d, bfwCompMeth %d, extType %d\n", + pPrbElem->bf_weight.numBundPrb, pPrbElem->bf_weight.numSetBFWs, pPrbElem->bf_weight.RAD, pPrbElem->bf_weight.disableBFWs, pPrbElem->bf_weight.bfwIqWidth, pPrbElem->bf_weight.bfwCompMeth, pPrbElem->bf_weight.extType); } }else if (strcmp(key, KEY_NPRBELEM_DL ) == 0) { config->p_SlotPrbMap[direction][slot_idx]->nPrbElm = atoi(value); @@ -973,16 +1042,17 @@ fillSlotStructAsCb(void* cbParam, const char *key, const char *value) } else{ struct xran_prb_elm *pPrbElem = &config->p_SlotPrbMap[direction][slot_idx]->prbMap[section_idx]; - sscanf(value, "%hhu,%hhu,%hhu,%hhu,%hhu,%hhu", + sscanf(value, "%hhu,%hhu,%hhu,%hhu,%hhu,%hhu,%hhu", (uint8_t*)&pPrbElem->bf_weight.numBundPrb, (uint8_t*)&pPrbElem->bf_weight.numSetBFWs, (uint8_t*)&pPrbElem->bf_weight.RAD, (uint8_t*)&pPrbElem->bf_weight.disableBFWs, (uint8_t*)&pPrbElem->bf_weight.bfwIqWidth, - (uint8_t*)&pPrbElem->bf_weight.bfwCompMeth); + (uint8_t*)&pPrbElem->bf_weight.bfwCompMeth, + (uint8_t*)&pPrbElem->bf_weight.extType); printf(KEY_EXTBFW_DL"%d: ",section_idx); - printf("numBundPrb %d, numSetBFW %d, RAD %d, disableBFW %d, bfwIqWidth %d, bfwCompMeth %d\n", - pPrbElem->bf_weight.numBundPrb, pPrbElem->bf_weight.numSetBFWs, pPrbElem->bf_weight.RAD, pPrbElem->bf_weight.disableBFWs, pPrbElem->bf_weight.bfwIqWidth, pPrbElem->bf_weight.bfwCompMeth); + printf("numBundPrb %d, numSetBFW %d, RAD %d, disableBFW %d, bfwIqWidth %d, bfwCompMeth %d, extType %d\n", + pPrbElem->bf_weight.numBundPrb, pPrbElem->bf_weight.numSetBFWs, pPrbElem->bf_weight.RAD, pPrbElem->bf_weight.disableBFWs, pPrbElem->bf_weight.bfwIqWidth, pPrbElem->bf_weight.bfwCompMeth, pPrbElem->bf_weight.extType); } } else { printf("Unsupported configuration key [%s]\n", key); @@ -995,7 +1065,8 @@ fillSlotStructAsCb(void* cbParam, const char *key, const char *value) struct xran_prb_map* config_malloc_prb_map(void) { - uint32_t size = sizeof(struct xran_prb_map) + (XRAN_MAX_SECTIONS_PER_SLOT -1) * sizeof(struct xran_prb_elm); + //uint32_t size = sizeof(struct xran_prb_map) + (XRAN_MAX_SECTIONS_PER_SLOT -1) * sizeof(struct xran_prb_elm); + uint32_t size = sizeof(struct xran_prb_map) + (8) * sizeof(struct xran_prb_elm); void *ret = NULL; ret = malloc(size); @@ -1011,7 +1082,7 @@ config_malloc_prb_map(void) int32_t config_init(RuntimeConfig *p_o_xu_cfg) { - int32_t i, j, k, z; + int32_t i, j; memset(p_o_xu_cfg, 0, sizeof(RuntimeConfig)); p_o_xu_cfg->p_PrbMapDl = config_malloc_prb_map(); @@ -1024,6 +1095,7 @@ config_init(RuntimeConfig *p_o_xu_cfg) } } +#if 0 for (i = 0; i < XRAN_DIR_MAX; i++) { for (j = 0; j < XRAN_N_FE_BUF_LEN; j++) { for (k = 0; k < XRAN_MAX_SECTOR_NR; k++) { @@ -1034,13 +1106,32 @@ config_init(RuntimeConfig *p_o_xu_cfg) } } } +#endif return 0; } +int32_t +config_init2(RuntimeConfig *p_o_xu_cfg) +{ + int32_t i, j, k, z; + for (i = 0; i < XRAN_DIR_MAX; i++) { + for (j = 0; j < XRAN_N_FE_BUF_LEN; j++) { + for (k = 0; k < p_o_xu_cfg->numCC; k++) { + for (z = 0; z < p_o_xu_cfg->numAxc; z++) { + p_o_xu_cfg->p_RunSlotPrbMap[i][j][k][z] = config_malloc_prb_map(); + p_o_xu_cfg->p_RunSrsSlotPrbMap[i][j][k][z] = config_malloc_prb_map(); + } + } + } + } + + return 0; +} + int -parseConfigFile(char *filename, RuntimeConfig *config) +parseConfigFile(const char *filename, RuntimeConfig *config) { char inputLine[MAX_LINE_SIZE] = {0}; int inputLen = 0; @@ -1069,8 +1160,6 @@ parseConfigFile(char *filename, RuntimeConfig *config) } } - if (inputLine[strlen(inputLine)-1] == '\n') - inputLine[strlen(inputLine)-1] == '\0'; lineNum++; inputLen = strlen(inputLine); @@ -1120,14 +1209,12 @@ parseConfigFile(char *filename, RuntimeConfig *config) } int32_t -parseSlotConfigFile(char *dir, RuntimeConfig *config) +parseSlotConfigFile(const char *dir, RuntimeConfig *config) { int32_t ret = 0; char filename[512]; size_t len; int32_t slot_idx = 0; - int32_t cc_idx = 0; - int32_t ant_idx = 0; int32_t direction = 0; struct slot_cfg_to_pars slot_cfg_param; @@ -1197,8 +1284,6 @@ parseFileViaCb (char *filename, fillConfigStruct_fn cbFn, void* cbParm) } } - if (inputLine[strlen(inputLine)-1] == '\n') - inputLine[strlen(inputLine)-1] == '\0'; lineNum++; inputLen = strlen(inputLine); @@ -1253,7 +1338,7 @@ parseFileViaCb (char *filename, fillConfigStruct_fn cbFn, void* cbParm) return 0; } -int parseUsecaseFile(char *filename, UsecaseConfig *usecase_cfg) +int parseUsecaseFile(const char *filename, UsecaseConfig *usecase_cfg) { char inputLine[MAX_LINE_SIZE] = {0}; int inputLen = 0; @@ -1280,8 +1365,6 @@ int parseUsecaseFile(char *filename, UsecaseConfig *usecase_cfg) } } - if (inputLine[strlen(inputLine)-1] == '\n') - inputLine[strlen(inputLine)-1] == '\0'; lineNum++; inputLen = strlen(inputLine); diff --git a/fhi_lib/app/src/config.h b/fhi_lib/app/src/config.h index c968cb3..4745c26 100644 --- a/fhi_lib/app/src/config.h +++ b/fhi_lib/app/src/config.h @@ -79,6 +79,7 @@ typedef struct _RuntimeConfig Set by SIB2, prach-FreqOffset in E-UTRA. */ uint8_t prachConfigIndex;/**< TS36.211 - Table 5.7.1-2 : PRACH Configuration Index */ + uint8_t prachConfigIndexLTE;/**< PRACH Configuration Index for LTE in dss case*/ uint8_t iqswap; /**< do swap of IQ before send to ETH */ uint8_t nebyteorderswap; /**< do swap of byte order from host byte order to network byte order. ETH */ uint8_t compression; /**< enable use case with compression */ @@ -89,10 +90,14 @@ typedef struct _RuntimeConfig uint16_t totalBfWeights; /**< The total number of beamforming weights on RU */ uint8_t enableSrs; /**< enable SRS (valid for Cat B only) */ - uint16_t srsSymMask; /**< SRS symbol mask [014] within S/U slot [0-13] def is 13 */ + uint16_t srsSymMask; /* deprecated */ + uint16_t srsSlot; /**< SRS slot within TDD period (special slot), for O-RU emulation */ + uint8_t srsNdmOffset; /**< tti offset to delay the transmission of NDM SRS UP, for O-RU emulation */ + uint16_t srsNdmTxDuration; /**< symbol duration for NDM SRS UP transmisson, for O-RU emulation */ uint8_t puschMaskEnable; /**< enable PUSCH mask, which means not tranfer PUSCH in some UL slot */ uint8_t puschMaskSlot; /**< PUSCH channel will not tranfer in slot module Frame */ + uint8_t extType; uint16_t maxFrameId; /**< max value of frame id */ @@ -142,6 +147,10 @@ typedef struct _RuntimeConfig struct xran_prb_map* p_PrbMapUl; struct xran_prb_map* p_PrbMapSrs; + uint8_t dssEnable; /**< enable DSS (extension-9) */ + uint8_t dssPeriod; /**< DSS pattern period for LTE/NR */ + uint8_t technology[XRAN_MAX_DSS_PERIODICITY]; /**< technology array represents slot is LTE(0)/NR(1) */ + uint16_t SlotPrbCCmask[XRAN_DIR_MAX][XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTIONS_PER_SLOT]; uint64_t SlotPrbAntCMask[XRAN_DIR_MAX][XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTIONS_PER_SLOT]; struct xran_prb_map* p_SlotPrbMap[XRAN_DIR_MAX][XRAN_N_FE_BUF_LEN]; @@ -161,6 +170,7 @@ typedef struct _RuntimeConfig uint16_t max_sections_per_slot; uint16_t max_sections_per_symbol; + int32_t RunSlotPrbMapBySymbolEnable; } RuntimeConfig; /** use case configuration */ @@ -201,8 +211,14 @@ typedef struct _UsecaseConfig char o_xu_cfg_file [XRAN_PORTS_NUM][512]; /**< file with config for each O-XU */ char o_xu_pcie_bus_addr[XRAN_PORTS_NUM][XRAN_VF_MAX][512]; /**< VFs used for each O-RU|O-DU */ - char prefix_name[256]; + char o_xu_bbu_cfg_file[512]; /**< file with config for each O-XU */ + + char prefix_name[256]; + uint8_t dlCpProcBurst; /**< When set to 1, dl cp processing will be done on single symbol. When set to 0, DL CP processing + will be spread across all allowed symbols and multiple cores to reduce burstiness */ + int32_t bbu_offload; /**< enable packet handling on BBU cores */ + int32_t mlogxrandisable; /**< set to 1 to disable mlog 0 - default mlog enabled */ } UsecaseConfig; /** @@ -210,22 +226,23 @@ typedef struct _UsecaseConfig * * @param filename The name of the configuration file to be parsed. * @param config The configuration structure to be filled with parsed data. */ -int parseConfigFile(char *filename, RuntimeConfig *config); +int parseConfigFile(const char *filename, RuntimeConfig *config); /** * Parse application use case file. * * @param filename The name of the use case file to be parsed. * @param config The configuration structure to be filled with parsed data. */ -int parseUsecaseFile(char *filename, UsecaseConfig *config); +int parseUsecaseFile(const char *filename, UsecaseConfig *config); /** * Parse slot config file. * * @param dir folder name. * @param config The configuration structure to be filled with parsed data. */ -int32_t parseSlotConfigFile(char *dir, RuntimeConfig *config); +int32_t parseSlotConfigFile(const char *dir, RuntimeConfig *config); int32_t config_init(RuntimeConfig *p_o_xu_cfg); +int32_t config_init2(RuntimeConfig *p_o_xu_cfg); struct xran_prb_map* config_malloc_prb_map(void); #endif /* _SAMPLEAPP__CONFIG_H_ */ diff --git a/fhi_lib/app/src/ebbu_pool_cfg.c b/fhi_lib/app/src/ebbu_pool_cfg.c new file mode 100644 index 0000000..e30608a --- /dev/null +++ b/fhi_lib/app/src/ebbu_pool_cfg.c @@ -0,0 +1,274 @@ +/****************************************************************************** +* +* Copyright (c) 2020 Intel. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +* +*******************************************************************************/ + +/** + * @brief This file consists of parameters that are to be read from ebbu_pool_cfg.xml + * to configure the application at system initialization + * @file ebbu_pool_cfg.h + * @ingroup xran + * @author Intel Corporation + **/ + + +#include "ebbu_pool_cfg.h" + +#include +#include +#include + +static eBbuPoolCfgVarsStruct geBbuPoolCfgVars; +char eBbuPoolCfgFileName[512]; + +uint32_t nD2USwitch[EBBU_POOL_MAX_FRAME_FORMAT][EBBU_POOL_TDD_PERIOD] = +{ + {0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3}, //FDD + {0x1, 0x1, 0x1, 0x3, 0x2, 0x1, 0x1, 0x1, 0x3, 0x2}, //DDDSU + {0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x2, 0x2} //DDDDDDDSUU +}; + +//------------------------------------------------------------------------------------------- +/** @ingroup group_test_ebbu_pool + * + * @param void + * + * @return eBBUPool Config Local Context Structure Pointer + * + * @description + * Returns the eBBUPool Config Local Context Structure Pointer + * +**/ +//------------------------------------------------------------------------------------------- +peBbuPoolCfgVarsStruct ebbu_pool_cfg_get_ctx(void) +{ + return &geBbuPoolCfgVars; +} + + + +//------------------------------------------------------------------------------------------- +/** @ingroup group_test_ebbu_pool + * + * @param void + * + * @return void + * + * @description + * Initialize the geBbuPoolCfgVars. This is called at application bootup + * +**/ +//------------------------------------------------------------------------------------------- +void ebbu_pool_cfg_init_vars(void) +{ + memset(&geBbuPoolCfgVars, 0, sizeof(eBbuPoolCfgVarsStruct)); +} + + + +//------------------------------------------------------------------------------------------- +/** @ingroup group_test_ebbu_pool + * + * @param[in] *pCfgFile Pointer to FILE descriptor to read from + * + * @return 0 if SUCCESS + * + * @description + * This function parses the XML file that was opened and reads all the tags and associated + * values and stores them + * +**/ +//------------------------------------------------------------------------------------------- +uint32_t ebbu_pool_cfg_parse_xml(FILE *pCfgFile) +{ + // peBbuPoolCfgVarsStruct geBbuPoolCfgVars = ebbu_pool_cfg_get_ctx(); + uint32_t lineNum = 0, retCode; + char string[1024]; + + while(!feof(pCfgFile)) + { + fgets(string, 1024, pCfgFile); + lineNum++; + retCode = cline_parse_line(string); + + if (retCode != EBBU_POOL_CFG_ERRORCODE__SUCCESS) + { + printf("Something wrong in file %s ErrorCode[%d] at line[%d]: %s\n", eBbuPoolCfgFileName, (int) retCode, (int)lineNum, string); + return EBBU_POOL_CFG_ERRORCODE__FAIL; + } + } + + return EBBU_POOL_CFG_ERRORCODE__SUCCESS; +} + + +//------------------------------------------------------------------------------------------- +/** @ingroup group_test_ebbu_pool + * + * @param void + * + * @return 0 if SUCCESS + * + * @description + * This function searches for tags from xml and applies the values to the eBBUPool test + * +**/ +//------------------------------------------------------------------------------------------- +uint32_t ebbu_pool_cfg_apply(void) +{ + printf("ebbu_pool_cfg_apply\n"); + peBbuPoolCfgVarsStruct geBbuPoolCfgVars = ebbu_pool_cfg_get_ctx(); + int rc = EBBU_POOL_CFG_ERRORCODE__SUCCESS; + int32_t coreNum, cellNum, iCell; + uint32_t cellFrameCfg[EBBU_POOL_MAX_TEST_CELL], cellTtiCfg[EBBU_POOL_MAX_TEST_CELL], cellEventCfg[EBBU_POOL_MAX_TEST_CELL]; + + cline_print_info(); + + //---------------------------------------------------- + // eBbuPool general config + //---------------------------------------------------- + rc |= cline_set_int((const char *) "eBbuPoolMainThreadCore", (int *) &geBbuPoolCfgVars->mainThreadCoreId, 0); + rc |= cline_set_int((const char *) "eBbuPoolConsumerSleep", (int *) &geBbuPoolCfgVars->sleepFlag, 1); + + //---------------------------------------------------- + // Queue config + //---------------------------------------------------- + rc |= cline_set_int((const char *) "QueueDepth", (int *) &geBbuPoolCfgVars->queueDepth, 1024); + rc |= cline_set_int((const char *) "QueueNum", (int *) &geBbuPoolCfgVars->queueNum, 3); + rc |= cline_set_int((const char *) "QueuCtxNum", (int *) &geBbuPoolCfgVars->ququeCtxNum, 1); + + //---------------------------------------------------- + // Test Config + //---------------------------------------------------- + rc |= cline_set_int((const char *) "TimerThreadCore", (int *) &geBbuPoolCfgVars->timerCoreId, 0); + rc |= cline_set_int((const char *) "CtrlThreadNum", (int *) &geBbuPoolCfgVars->ctrlThreadNum, 0); + rc |= cline_set_int_array((const char *) "CtrlThreadCoreList", EBBU_POOL_MAX_CTRL_THREAD,(int *) &geBbuPoolCfgVars->ctrlThreadCoreId[0], &coreNum); + rc |= cline_set_int((const char *) "TestCellNum", (int *) &geBbuPoolCfgVars->testCellNum, 0); + rc |= cline_set_int((const char *) "TestCoreNum", (int *) &geBbuPoolCfgVars->testCoreNum, 0); + rc |= cline_set_int_array((const char *) "TestCoreList", EBBU_POOL_MAX_TEST_CORE, (int *) &geBbuPoolCfgVars->testCoreList[0], &coreNum); + rc |= cline_set_int_array((const char *) "TestCellFrameFormat", EBBU_POOL_MAX_TEST_CELL, (int *) &cellFrameCfg[0], &cellNum); + rc |= cline_set_int_array((const char *) "TestCellTti", EBBU_POOL_MAX_TEST_CELL, (int *) &cellTtiCfg[0], &cellNum); + rc |= cline_set_int_array((const char *) "TestCellEventNum", EBBU_POOL_MAX_TEST_CELL, (int *) &cellEventCfg[0], &cellNum); + rc |= cline_set_int((const char *) "MlogEnable", (int *) &geBbuPoolCfgVars->mlogEnable, 0); + + if(cellNum > geBbuPoolCfgVars->testCellNum) + cellNum = geBbuPoolCfgVars->testCellNum; + + for(iCell = 0; iCell < cellNum; iCell ++) + { + geBbuPoolCfgVars->sTestCell[iCell].frameFormat = cellFrameCfg[iCell]; + geBbuPoolCfgVars->sTestCell[iCell].tti = cellTtiCfg[iCell]; + geBbuPoolCfgVars->sTestCell[iCell].eventPerTti = cellEventCfg[iCell]; + } + + + printf("eBbuPool config completely read: %x\n", rc); + + printf("\n"); + + return rc; +} + + + + +//------------------------------------------------------------------------------------------- +/** @ingroup group_test_ebbu_pool + * + * @param void + * + * @return 0 if SUCCESS + * + * @description + * This function is called from main() and initializes the EBBU_POOL_CFG layer. It reads the xml + * file and configures the application based on xml tags and values from file. + * +**/ +//------------------------------------------------------------------------------------------- +uint32_t ebbu_pool_cfg_init_from_xml(void) +{ + // peBbuPoolCfgVarsStruct geBbuPoolCfgVars = ebbu_pool_cfg_get_ctx(); + FILE *pCfgFile; + pCfgFile = fopen(eBbuPoolCfgFileName, "r"); + + ebbu_pool_cfg_init_vars(); + + cline_init(); + + if (pCfgFile == NULL) + { + printf("ERROR: %s file is not found in directory\n", eBbuPoolCfgFileName); + printf(" Please contact Intel to get the correct config file\n"); + return EBBU_POOL_CFG_ERRORCODE__FAIL; + } + + if (ebbu_pool_cfg_parse_xml(pCfgFile) != EBBU_POOL_CFG_ERRORCODE__SUCCESS) + { + printf("Could not Parse the XML File.\n"); + fclose(pCfgFile); + return EBBU_POOL_CFG_ERRORCODE__FAIL; + } + printf("PhyCfg XML file parsed\n"); + + if (ebbu_pool_cfg_apply() != EBBU_POOL_CFG_ERRORCODE__SUCCESS) + { + printf("Could not Apply the settings from XML File.\n"); + fclose(pCfgFile); + return EBBU_POOL_CFG_ERRORCODE__FAIL; + } + + fclose(pCfgFile); + return EBBU_POOL_CFG_ERRORCODE__SUCCESS; +} + + +//------------------------------------------------------------------------------------------- +/** @ingroup group_test_ebbu_pool + * + * @param[in] argc Number of command line arguments + * @param[in] *argv[] Array of command line arguments + * + * @return void + * + * @description + * This function parses the command line parameters entered while running the eBbuPool test application + * and searches for string "cfgfile" and takes the immediate next field and uses it as the + * xml file name. If it is not found, it uses default file name "bbdev_cfg.xml" and tries to open + * this. + * +**/ +//------------------------------------------------------------------------------------------- +void ebbu_pool_cfg_set_cfg_filename(int argc, char *argv[], char filename[512]) +{ + // peBbuPoolCfgVarsStruct geBbuPoolCfgVars = ebbu_pool_cfg_get_ctx(); +#if 0 + uint32_t ret; + ret = cline_get_string(argc, argv, "cfgfile", eBbuPoolCfgFileName); + + if (ret != AUX_SUCCESS) + { + printf("ebbu_pool_cfg_set_cfg_filename: Coult not find string 'cfgfile' in command line. Using default File: %s\n", EBBU_POOL_FILE_NAME); + strcpy(eBbuPoolCfgFileName, EBBU_POOL_FILE_NAME); + } + strcpy(filename, eBbuPoolCfgFileName); +#else + strncpy(eBbuPoolCfgFileName, filename, MIN(strnlen(filename, 511),511) ); + eBbuPoolCfgFileName[511] = '\0'; + printf("eBbuPoolCfgFileName %s\n", eBbuPoolCfgFileName); +#endif + return; +} + diff --git a/fhi_lib/app/src/ebbu_pool_cfg.h b/fhi_lib/app/src/ebbu_pool_cfg.h new file mode 100644 index 0000000..949794d --- /dev/null +++ b/fhi_lib/app/src/ebbu_pool_cfg.h @@ -0,0 +1,95 @@ +/****************************************************************************** +* +* Copyright (c) 2020 Intel. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +* +*******************************************************************************/ + +/** + * @brief This file consists of parameters that are to be read from ebbu_pool_cfg.xml + * to configure the application at system initialization + * @file ebbu_pool_cfg.h + * @ingroup xran + * @author Intel Corporation +**/ + +#ifndef _EBBUPOOLCFG_H_ +#define _EBBUPOOLCFG_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "ebbu_pool_api.h" +#include "aux_cline.h" + +#define EBBU_POOL_FILE_NAME "config_file/ebbu_pool_cfg_basic.xml" + +#define EBBU_POOL_CFG_ERRORCODE__SUCCESS ( 0 ) +#define EBBU_POOL_CFG_ERRORCODE__FAIL ( 1 ) +#define EBBU_POOL_CFG_ERRORCODE__VER_MISMATCH ( 2 ) + +#define EBBU_POOL_MAX_TEST_CELL 40 +#define EBBU_POOL_MAX_TEST_CORE 256 +#define EBBU_POOL_MAX_CTRL_THREAD 8 + + +#define EBBU_POOL_MAX_FRAME_FORMAT 3 +#define EBBU_POOL_TDD_PERIOD 10 +#define EBBU_POOL_TEST_DL 1 +#define EBBU_POOL_TEST_UL 2 + +extern uint32_t nD2USwitch[EBBU_POOL_MAX_FRAME_FORMAT][EBBU_POOL_TDD_PERIOD]; + +typedef struct +{ + uint32_t frameFormat; //FDD or TDD:DDDSU, DDDDDDDSUU + uint32_t tti; //micro-second + uint32_t eventPerTti; +}eBbuPoolTestCellStruc; + +typedef struct +{ + //eBbuPool general config + uint32_t mainThreadCoreId; + uint32_t sleepFlag; + + //Queus config + uint32_t queueDepth; + uint32_t queueNum; + uint32_t ququeCtxNum; + + //Test config + uint32_t timerCoreId; + uint32_t ctrlThreadNum; + uint32_t ctrlThreadCoreId[EBBU_POOL_MAX_CTRL_THREAD]; + uint32_t testCellNum; + eBbuPoolTestCellStruc sTestCell[EBBU_POOL_MAX_TEST_CELL]; + uint32_t testCoreNum; + uint32_t testCoreList[EBBU_POOL_MAX_TEST_CORE]; + + //Misc + uint32_t mlogEnable; +} eBbuPoolCfgVarsStruct, *peBbuPoolCfgVarsStruct; + +peBbuPoolCfgVarsStruct ebbu_pool_cfg_get_ctx(void); +uint32_t ebbu_pool_cfg_init_from_xml(void); +void ebbu_pool_cfg_set_cfg_filename(int argc, char *argv[], char filename[512]); + +#ifdef __cplusplus +} +#endif + +#endif /* #ifndef _EBBUPOOLCFG_H_ */ + diff --git a/fhi_lib/app/src/sample-app.c b/fhi_lib/app/src/sample-app.c index 713a58b..43582f5 100644 --- a/fhi_lib/app/src/sample-app.c +++ b/fhi_lib/app/src/sample-app.c @@ -54,6 +54,9 @@ #include "xran_mlog_task_id.h" #include "app_io_fh_xran.h" #include "app_profile_xran.h" +#ifdef FWK_ENABLED +#include "app_bbu_pool.h" +#endif #include "xran_ecpri_owd_measurements.h" #define MAX_BBU_POOL_CORE_MASK (4) @@ -78,16 +81,14 @@ struct app_sym_cb_ctx { static enum app_state state; static uint64_t ticks_per_usec; -static volatile uint64_t timer_last_irq_tick = 0; -static uint64_t tsc_resolution_hz = 0; UsecaseConfig* p_usecaseConfiguration = {NULL}; -RuntimeConfig* p_startupConfiguration[XRAN_PORTS_NUM] = {NULL,NULL,NULL,NULL}; +RuntimeConfig* p_startupConfiguration[XRAN_PORTS_NUM] = {NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL}; struct app_sym_cb_ctx cb_sym_ctx[XRAN_CB_SYM_MAX]; -long old_rx_counter[XRAN_PORTS_NUM] = {0,0,0,0}; -long old_tx_counter[XRAN_PORTS_NUM] = {0,0,0,0}; +long old_rx_counter[XRAN_PORTS_NUM] = {0,0,0,0,0,0,0,0}; +long old_tx_counter[XRAN_PORTS_NUM] = {0,0,0,0,0,0,0,0}; static void app_print_menu() @@ -167,11 +168,19 @@ app_version_print(void) char sysversion[100]; char *compilation_date = __DATE__; char *compilation_time = __TIME__; - - uint32_t nLen; + char compiler[100]; snprintf(sysversion, 99, "Version: %s", VERSIONX); - nLen = strlen(sysversion); + +#if defined(__clang__) + snprintf(compiler, 99, "family clang: %s", __clang_version__); +#elif defined(__ICC) || defined(__INTEL_COMPILER) + snprintf(compiler, 99, "family icc: version %d", __INTEL_COMPILER); +#elif defined(__INTEL_LLVM_COMPILER) + snprintf(compiler, 99, "family icx: version %d", __INTEL_LLVM_COMPILER); +#elif defined(__GNUC__) || defined(__GNUG__) + snprintf(compiler, 99, "family gcc: version %d.%d.%d", __GNUC__, __GNUC_MINOR__,__GNUC_PATCHLEVEL__); +#endif printf("\n\n"); printf("===========================================================================================================\n"); @@ -181,6 +190,7 @@ app_version_print(void) printf("%s\n", sysversion); printf("build-date: %s\n", compilation_date); printf("build-time: %s\n", compilation_time); + printf("build-with: %s\n", compiler); } static void @@ -223,15 +233,13 @@ app_help(void) static int32_t app_parse_cmdline_args(int argc, char ** argv, struct sample_app_params* params) { - int32_t ret = 0; int32_t c = 0; int32_t vf_cnt = 0; - int32_t *pInt; int32_t cnt = 0; size_t optlen = 0; char *saveptr = NULL; char *token = NULL; - int32_t port = 4; + int32_t port = 8; static struct option long_options[] = { {"cfgfile", required_argument, 0, 'z'}, @@ -241,6 +249,10 @@ app_parse_cmdline_args(int argc, char ** argv, struct sample_app_params* params) {"vf_addr_o_xu_b", required_argument, 0, 'b'}, {"vf_addr_o_xu_c", required_argument, 0, 'c'}, {"vf_addr_o_xu_d", required_argument, 0, 'd'}, + {"vf_addr_o_xu_e", required_argument, 0, 'e'}, + {"vf_addr_o_xu_f", required_argument, 0, 'F'}, + {"vf_addr_o_xu_g", required_argument, 0, 'g'}, + {"vf_addr_o_xu_h", required_argument, 0, 'H'}, {"help", no_argument, 0, 'h'}, {0, 0, 0, 0} }; @@ -251,14 +263,13 @@ app_parse_cmdline_args(int argc, char ** argv, struct sample_app_params* params) //int this_option_optind = optind ? optind : 1; int option_index = 0; - c = getopt_long(argc, argv, "a:b:c:d:f:h:p:u:v", long_options, &option_index); + c = getopt_long(argc, argv, "a:b:c:d:e:f:F:g:h:H:p:u:v", long_options, &option_index); if (c == -1) break; cnt += 1; - pInt = NULL; - port = 4; + port = 8; switch (c) { case 'f': @@ -283,6 +294,14 @@ app_parse_cmdline_args(int argc, char ** argv, struct sample_app_params* params) port -= 1; case 'd': port -= 1; + case 'e': + port -= 1; + case 'F': + port -= 1; + case 'g': + port -= 1; + case 'H': + port -= 1; vf_cnt = 0; optlen = strlen(optarg) + 1; printf("%s:%d: port %d %s [len %ld]\n",__FUNCTION__, __LINE__, port, optarg, optlen); @@ -360,6 +379,7 @@ app_parse_all_cfgs(struct sample_app_params* p_args, UsecaseConfig* p_use_cfg, int32_t vf_num = 0; int32_t o_xu_id = 0; char filename[512]; + char bbu_filename[512]; char *dir; size_t len; @@ -370,17 +390,7 @@ app_parse_all_cfgs(struct sample_app_params* p_args, UsecaseConfig* p_use_cfg, exit(-1); } - if (p_o_xu_cfg) { - int32_t i; - RuntimeConfig* p_o_xu_cfg_loc = p_o_xu_cfg; - for (i = 0; i < XRAN_PORTS_NUM; i++) { - config_init(p_o_xu_cfg_loc); - p_o_xu_cfg_loc++; - } - } else { - printf("p_o_xu_cfg error.\n"); - exit(-1); - } + p_use_cfg->dlCpProcBurst = 1; if (p_args) { if (p_args->usecase_file) { /* use case for multiple O-RUs */ @@ -390,7 +400,7 @@ app_parse_all_cfgs(struct sample_app_params* p_args, UsecaseConfig* p_use_cfg, printf("app_parse_all_cfgs: Name of p_args->usecase_file, %s is too long. Maximum is 511 characters!!\n", p_args->usecase_file); return -1; } else { - strncpy(filename, p_args->usecase_file, len); + strncpy(filename, p_args->usecase_file, RTE_MIN (512,len)); } if (parseUsecaseFile(filename, p_use_cfg) != 0) { printf("Use case config file error.\n"); @@ -401,13 +411,57 @@ app_parse_all_cfgs(struct sample_app_params* p_args, UsecaseConfig* p_use_cfg, return -1; } + if (p_o_xu_cfg) { + int32_t i; + RuntimeConfig* p_o_xu_cfg_loc = p_o_xu_cfg; + for (i = 0; i < p_use_cfg->oXuNum; i++) { + config_init(p_o_xu_cfg_loc); + p_o_xu_cfg_loc++; + } + } else { + printf("p_o_xu_cfg error.\n"); + exit(-1); + } /* use cmdline pcie address */ for (o_xu_id = 0; o_xu_id < p_use_cfg->oXuNum && o_xu_id < XRAN_PORTS_NUM; o_xu_id++) { for (vf_num = 0; vf_num < XRAN_VF_MAX && p_args->num_vfs ; vf_num++) { - strncpy(&p_use_cfg->o_xu_pcie_bus_addr[o_xu_id][vf_num][0], &p_args->vf_pcie_addr[o_xu_id][vf_num][0], strlen(&p_args->vf_pcie_addr[o_xu_id][vf_num][0])); + strncpy(&p_use_cfg->o_xu_pcie_bus_addr[o_xu_id][vf_num][0], &p_args->vf_pcie_addr[o_xu_id][vf_num][0], RTE_MIN (512,strlen(&p_args->vf_pcie_addr[o_xu_id][vf_num][0]))); } } + + dir = dirname(p_args->usecase_file); + if(strlen(p_use_cfg->o_xu_bbu_cfg_file)){ + memset(bbu_filename, 0, sizeof(bbu_filename)); + printf("dir (%s)\n",dir); + len = strlen(dir) + 1; + if (len > 511){ + printf("app_parse_all_cfgs: Name of directory, %s, xu_id = %d is too long. Maximum is 511 characters!!\n", dir, o_xu_id); + return -1; + } else { + strncpy(bbu_filename, dir, RTE_MIN(512,len)); + } + strncat(bbu_filename, "/", 1); + len +=1; + len = (sizeof(bbu_filename)) - len; + if (len > strlen(p_use_cfg->o_xu_bbu_cfg_file)) { + strncat(bbu_filename, p_use_cfg->o_xu_bbu_cfg_file, RTE_MIN (len, strlen(p_use_cfg->o_xu_bbu_cfg_file))); + } else { + printf("File name error\n"); + return -1; + } + strncpy(p_use_cfg->o_xu_bbu_cfg_file, bbu_filename, RTE_MIN (512, strlen(bbu_filename))); + printf("bbu_cfg_file (%s)\n",p_use_cfg->o_xu_bbu_cfg_file); +#ifdef FWK_ENABLED + p_use_cfg->bbu_offload = 1; +#else + p_use_cfg->bbu_offload = 0; +#endif + } else { + printf("bbu_cfg_file is not provided\n"); + p_use_cfg->bbu_offload = 0; + } + for (o_xu_id = 0; o_xu_id < p_use_cfg->oXuNum && o_xu_id < XRAN_PORTS_NUM; o_xu_id++) { memset(filename, 0, sizeof(filename)); printf("dir (%s)\n",dir); @@ -416,7 +470,7 @@ app_parse_all_cfgs(struct sample_app_params* p_args, UsecaseConfig* p_use_cfg, printf("app_parse_all_cfgs: Name of directory, %s, xu_id = %d is too long. Maximum is 511 characters!!\n", dir, o_xu_id); return -1; } else { - strncpy(filename, dir, len); + strncpy(filename, dir, RTE_MIN (512,len)); } strncat(filename, "/", 1); len +=1; @@ -435,6 +489,7 @@ app_parse_all_cfgs(struct sample_app_params* p_args, UsecaseConfig* p_use_cfg, return -1; } p_o_xu_cfg->o_xu_id = o_xu_id; + config_init2(p_o_xu_cfg); if (p_o_xu_cfg->SlotNum_fileEnabled) { if (parseSlotConfigFile(dir, p_o_xu_cfg) != 0) { printf("parseSlotConfigFiles\n"); @@ -445,6 +500,7 @@ app_parse_all_cfgs(struct sample_app_params* p_args, UsecaseConfig* p_use_cfg, return -1; } } + p_o_xu_cfg++; } } else { @@ -473,6 +529,8 @@ app_setup_o_xu_buffers(UsecaseConfig* p_use_cfg, RuntimeConfig* p_o_xu_cfg, str p_iq = p_o_xu_cfg->p_buff; printf("IQ files size is %d slots\n", p_o_xu_cfg->numSlots); + //printf("numSlots=%u\n", p_o_xu_cfg->numSlots); + //getchar(); p_iq->iq_playback_buffer_size_dl = (p_o_xu_cfg->numSlots * N_SYM_PER_SLOT * N_SC_PER_PRB * app_xran_get_num_rbs(p_o_xu_cfg->xranTech, p_o_xu_cfg->mu_number, p_o_xu_cfg->nDLBandwidth, p_o_xu_cfg->nDLAbsFrePointA) *4L); @@ -482,13 +540,13 @@ app_setup_o_xu_buffers(UsecaseConfig* p_use_cfg, RuntimeConfig* p_o_xu_cfg, str p_o_xu_cfg->nULBandwidth, p_o_xu_cfg->nULAbsFrePointA) *4L); - /* 10 * [14*32*273*2*2] = 4892160 bytes */ + /* 10 * [273*32*2*2] = 349440 bytes */ p_iq->iq_bfw_buffer_size_dl = (p_o_xu_cfg->numSlots * N_SYM_PER_SLOT * p_o_xu_cfg->antElmTRx * app_xran_get_num_rbs(p_o_xu_cfg->xranTech, p_o_xu_cfg->mu_number, p_o_xu_cfg->nDLBandwidth, p_o_xu_cfg->nDLAbsFrePointA) *4L); - /* 10 * [14*32*273*2*2] = 4892160 bytes */ - p_iq->iq_bfw_buffer_size_ul = (p_o_xu_cfg->numSlots * N_SYM_PER_SLOT * + /* 10 * [273*32*2*2] = 349440 bytes */ + p_iq->iq_bfw_buffer_size_ul = (p_o_xu_cfg->numSlots * N_SYM_PER_SLOT * p_o_xu_cfg->antElmTRx * app_xran_get_num_rbs(p_o_xu_cfg->xranTech, p_o_xu_cfg->mu_number, p_o_xu_cfg->nULBandwidth, p_o_xu_cfg->nULAbsFrePointA) *4L); @@ -497,6 +555,8 @@ app_setup_o_xu_buffers(UsecaseConfig* p_use_cfg, RuntimeConfig* p_o_xu_cfg, str app_xran_get_num_rbs(p_o_xu_cfg->xranTech, p_o_xu_cfg->mu_number, p_o_xu_cfg->nULBandwidth, p_o_xu_cfg->nULAbsFrePointA)*4L); + p_iq->numSlots = p_o_xu_cfg->numSlots; + for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->numAxc); i++) { p_iq->p_tx_play_buffer[i] = (int16_t*)malloc(p_iq->iq_playback_buffer_size_dl); p_iq->tx_play_buffer_size[i] = (int32_t)p_iq->iq_playback_buffer_size_dl; @@ -504,12 +564,12 @@ app_setup_o_xu_buffers(UsecaseConfig* p_use_cfg, RuntimeConfig* p_o_xu_cfg, str if (p_iq->p_tx_play_buffer[i] == NULL) exit(-1); + p_iq->tx_play_buffer_size[i] = sys_load_file_to_buff(p_o_xu_cfg->ant_file[i], "DL IFFT IN IQ Samples in binary format", (uint8_t*)p_iq->p_tx_play_buffer[i], p_iq->tx_play_buffer_size[i], 1); - p_iq->tx_play_buffer_position[i] = 0; } if (p_o_xu_cfg->appMode == APP_O_DU && p_o_xu_cfg->xranCat == XRAN_CATEGORY_B) { @@ -526,7 +586,6 @@ app_setup_o_xu_buffers(UsecaseConfig* p_use_cfg, RuntimeConfig* p_o_xu_cfg, str (uint8_t*) p_iq->p_tx_dl_bfw_buffer[i], p_iq->tx_dl_bfw_buffer_size[i], 1); - p_iq->tx_dl_bfw_buffer_position[i] = 0; } } @@ -544,7 +603,6 @@ app_setup_o_xu_buffers(UsecaseConfig* p_use_cfg, RuntimeConfig* p_o_xu_cfg, str (uint8_t*) p_iq->p_tx_ul_bfw_buffer[i], p_iq->tx_ul_bfw_buffer_size[i], 1); - p_iq->tx_ul_bfw_buffer_position[i] = 0; } } @@ -598,8 +656,6 @@ app_setup_o_xu_buffers(UsecaseConfig* p_use_cfg, RuntimeConfig* p_o_xu_cfg, str if (p_iq->p_rx_log_buffer[i] == NULL) exit(-1); - p_iq->rx_log_buffer_position[i] = 0; - memset(p_iq->p_rx_log_buffer[i], 0, p_iq->rx_log_buffer_size[i]); } @@ -613,7 +669,6 @@ app_setup_o_xu_buffers(UsecaseConfig* p_use_cfg, RuntimeConfig* p_o_xu_cfg, str exit(-1); memset(p_iq->p_prach_log_buffer[i], 0, p_iq->prach_log_buffer_size[i]); - p_iq->prach_log_buffer_position[i] = 0; } /* log of SRS */ @@ -629,7 +684,33 @@ app_setup_o_xu_buffers(UsecaseConfig* p_use_cfg, RuntimeConfig* p_o_xu_cfg, str exit(-1); memset(p_iq->p_srs_log_buffer[i], 0, p_iq->iq_srs_buffer_size_ul); - p_iq->srs_log_buffer_position[i] = 0; + } + } + + /* log of BFWs */ + if (p_o_xu_cfg->appMode == APP_O_RU && p_o_xu_cfg->xranCat == XRAN_CATEGORY_B) { + for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->numAxc); i++) { + + p_iq->p_tx_dl_bfw_log_buffer[i] = (int16_t*)malloc(p_iq->iq_bfw_buffer_size_dl); + p_iq->tx_dl_bfw_log_buffer_size[i] = (int32_t)p_iq->iq_bfw_buffer_size_dl; + + if (p_iq->p_tx_dl_bfw_log_buffer[i] == NULL) + exit(-1); + + memset(p_iq->p_tx_dl_bfw_log_buffer[i], 0, p_iq->iq_bfw_buffer_size_dl); + } + } + + if (p_o_xu_cfg->appMode == APP_O_RU && p_o_xu_cfg->xranCat == XRAN_CATEGORY_B) { + for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(p_o_xu_cfg->numCC * p_o_xu_cfg->numAxc); i++) { + + p_iq->p_tx_ul_bfw_log_buffer[i] = (int16_t*)malloc(p_iq->iq_bfw_buffer_size_ul); + p_iq->tx_ul_bfw_log_buffer_size[i] = (int32_t)p_iq->iq_bfw_buffer_size_ul; + + if (p_iq->p_tx_ul_bfw_log_buffer[i] == NULL) + exit(-1); + + memset(p_iq->p_tx_ul_bfw_log_buffer[i], 0, p_iq->iq_bfw_buffer_size_ul); } } @@ -946,6 +1027,39 @@ app_dump_o_xu_buffers(UsecaseConfig* p_use_cfg, RuntimeConfig* p_o_xu_cfg) (uint8_t*) p_iq->p_rx_log_buffer[i], p_iq->rx_log_buffer_size[i]/sizeof(short), sizeof(short)); + + if (p_o_xu_cfg->appMode == APP_O_RU && p_o_xu_cfg->xranCat == XRAN_CATEGORY_B) { + snprintf(filename, sizeof(filename),"./logs/%s%d-dl_bfw_log_ue%d.txt",((p_o_xu_cfg->appMode == APP_O_DU) ? "o-du" : "o-ru"), p_o_xu_cfg->o_xu_id, i); + sys_save_buf_to_file_txt(filename, + "DL Beamformig weights IQ Samples in human readable format", + (uint8_t*) p_iq->p_tx_dl_bfw_log_buffer[i], + p_iq->tx_dl_bfw_log_buffer_size[i], + 1); + + snprintf(filename, sizeof(filename),"./logs/%s%d-dl_bfw_log_ue%d.bin",((p_o_xu_cfg->appMode == APP_O_DU) ? "o-du" : "o-ru"),p_o_xu_cfg->o_xu_id, i); + sys_save_buf_to_file(filename, + "DL Beamformig weightsIQ Samples in binary format", + (uint8_t*) p_iq->p_tx_dl_bfw_log_buffer[i], + p_iq->tx_dl_bfw_log_buffer_size[i]/sizeof(short), + sizeof(short)); + + } + if (p_o_xu_cfg->appMode == APP_O_RU && p_o_xu_cfg->xranCat == XRAN_CATEGORY_B) { + snprintf(filename, sizeof(filename),"./logs/%s%d-ul_bfw_log_ue%d.txt",((p_o_xu_cfg->appMode == APP_O_DU) ? "o-du" : "o-ru"), p_o_xu_cfg->o_xu_id, i); + sys_save_buf_to_file_txt(filename, + "DL Beamformig weights IQ Samples in human readable format", + (uint8_t*) p_iq->p_tx_ul_bfw_log_buffer[i], + p_iq->tx_ul_bfw_log_buffer_size[i], + 1); + + snprintf(filename, sizeof(filename),"./logs/%s%d-ul_bfw_log_ue%d.bin",((p_o_xu_cfg->appMode == APP_O_DU) ? "o-du" : "o-ru"),p_o_xu_cfg->o_xu_id, i); + sys_save_buf_to_file(filename, + "DL Beamformig weightsIQ Samples in binary format", + (uint8_t*) p_iq->p_tx_ul_bfw_log_buffer[i], + p_iq->tx_ul_bfw_log_buffer_size[i]/sizeof(short), + sizeof(short)); + } + } if (p_o_xu_cfg->appMode == APP_O_DU && p_o_xu_cfg->enableSrs) { @@ -1040,7 +1154,7 @@ app_set_main_core(UsecaseConfig* p_usecase) else return -1; - if (result = pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpuset)) + if ((result = pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpuset))) { printf("pthread_setaffinity_np failed: coreId = 2, result = %d\n",result); } @@ -1083,22 +1197,19 @@ app_alloc_all_cfgs(void) int main(int argc, char *argv[]) { - int i; - int j, len; int32_t o_xu_id = 0; - int lcore_id = 0; char filename[256]; int32_t xret = 0; struct stat st = {0}; uint32_t filenameLength = strlen(argv[1]); enum xran_if_state xran_curr_if_state = XRAN_INIT; struct sample_app_params arg_params; - + uint64_t nActiveCoreMask[MAX_BBU_POOL_CORE_MASK] = {0}; uint64_t nTotalTime; uint64_t nUsedTime; uint32_t nCoresUsed; uint32_t nCoreUsedNum[64]; - float nUsedPercent; + //float nUsedPercent; app_version_print(); app_timer_set_tsc_freq_from_clock(); @@ -1127,7 +1238,38 @@ int main(int argc, char *argv[]) printf("app_parse_all_cfgs failed %d\n", xret); exit(-1); } +#ifdef FWK_ENABLED + if(p_usecaseConfiguration->bbu_offload) { + if(p_startupConfiguration[0]->appMode == APP_O_DU) { + if ((xret = app_bbu_init(argc, argv, p_usecaseConfiguration->o_xu_bbu_cfg_file, p_usecaseConfiguration, p_startupConfiguration, + nActiveCoreMask)) < 0) { + printf("app_bbu_init failed %d\n", xret); + } + uint32_t i; + uint64_t nMask = 1; + /* use only 1 worker for BBU offload */ + for (i = 0; i < 64; i++) + { + if(p_usecaseConfiguration->io_core < 64) { + if (nMask & p_usecaseConfiguration->io_worker) { + p_usecaseConfiguration->io_worker = nMask; + p_usecaseConfiguration->io_worker_64_127 = 0; + break; + } + } + if(p_usecaseConfiguration->io_core >= 64) { + if (nMask & p_usecaseConfiguration->io_worker_64_127) { + p_usecaseConfiguration->io_worker_64_127 = nMask; + p_usecaseConfiguration->io_worker = 0; + break; + } + } + nMask = nMask << 1; + } + } + } +#endif if ((xret = app_set_main_core(p_usecaseConfiguration)) < 0) { printf("app_set_main_core failed %d\n", xret); exit(-1); @@ -1137,7 +1279,6 @@ int main(int argc, char *argv[]) /* one init for all O-XU */ app_io_xran_fh_init_init(p_usecaseConfiguration, p_startupConfiguration[0], &app_io_xran_fh_init); - xret = xran_init(argc, argv, &app_io_xran_fh_init, argv[0], &app_io_xran_handle); if (xret != XRAN_STATUS_SUCCESS) { printf("xran_init failed %d\n", xret); @@ -1151,6 +1292,40 @@ int main(int argc, char *argv[]) mkdir("./logs", 0777); } + snprintf(filename, sizeof(filename),"mlog-%s", p_usecaseConfiguration->appMode == 0 ? "o-du" : "o-ru"); + + /* Init mlog */ + unsigned int mlogSubframes = 128; + unsigned int mlogCores = 32; + unsigned int mlogSize = 10000; + + // Open Mlog Buffers and initalize variables + MLogOpen(mlogSubframes, mlogCores, mlogSize, 0, filename); + MLogSetMask(0); + + puts("----------------------------------------"); + printf("MLog Info: virt=0x%p size=%d\n", MLogGetFileLocation(), MLogGetFileSize()); + puts("----------------------------------------"); + + + uint32_t totalCC = 0; + + if(((1 << app_io_xran_fh_init.io_cfg.timing_core) | app_io_xran_fh_init.io_cfg.pkt_proc_core) & nActiveCoreMask[0]) + rte_panic("[0 - 63] BBU and IO cores conflict\n"); + if(app_io_xran_fh_init.io_cfg.pkt_proc_core_64_127 & nActiveCoreMask[1]) + rte_panic("[64-127] BBU and IO cores conflict\n"); + + nActiveCoreMask[0] |= ((1 << app_io_xran_fh_init.io_cfg.timing_core) | app_io_xran_fh_init.io_cfg.pkt_proc_core); + nActiveCoreMask[1] |= app_io_xran_fh_init.io_cfg.pkt_proc_core_64_127; + + MLogSetup(nActiveCoreMask[0], nActiveCoreMask[1], nActiveCoreMask[2], nActiveCoreMask[3]); + + for (o_xu_id = 0; o_xu_id < p_usecaseConfiguration->oXuNum; o_xu_id++) { + RuntimeConfig* p_o_xu_cfg = p_startupConfiguration[o_xu_id]; + totalCC += p_o_xu_cfg->numCC; + } + MLogAddTestCase(nActiveCoreMask, totalCC); + /** process all the O-RU|O-DU for use case */ for (o_xu_id = 0; o_xu_id < p_usecaseConfiguration->oXuNum; o_xu_id++) { RuntimeConfig* p_o_xu_cfg = p_startupConfiguration[o_xu_id]; @@ -1182,16 +1357,28 @@ int main(int argc, char *argv[]) printf("xran_open failed %d\n", xret); exit(-1); } - - if (app_io_xran_interface(o_xu_id, p_startupConfiguration[o_xu_id], p_usecaseConfiguration) != 0) + if (app_io_xran_interface(o_xu_id, p_startupConfiguration[o_xu_id], p_usecaseConfiguration, &app_io_xran_fh_init) != 0) exit(-1); app_io_xran_iq_content_init(o_xu_id, p_startupConfiguration[o_xu_id]); - +#ifdef FWK_ENABLED + if(p_o_xu_cfg->appMode == APP_O_DU && p_usecaseConfiguration->bbu_offload) { + if ((xret = xran_reg_physide_cb(app_io_xran_handle, app_bbu_dl_tti_call_back, NULL, 10, XRAN_CB_TTI)) != XRAN_STATUS_SUCCESS) { + printf("xran_reg_physide_cb failed %d\n", xret); + exit(-1); + } + } else { + if ((xret = xran_reg_physide_cb(app_io_xran_handle, app_io_xran_dl_tti_call_back, NULL, 10, XRAN_CB_TTI)) != XRAN_STATUS_SUCCESS) { + printf("xran_reg_physide_cb failed %d\n", xret); + exit(-1); + } + } +#else if ((xret = xran_reg_physide_cb(app_io_xran_handle, app_io_xran_dl_tti_call_back, NULL, 10, XRAN_CB_TTI)) != XRAN_STATUS_SUCCESS) { printf("xran_reg_physide_cb failed %d\n", xret); exit(-1); } +#endif if ((xret = xran_reg_physide_cb(app_io_xran_handle, app_io_xran_ul_half_slot_call_back, NULL, 10, XRAN_CB_HALF_SLOT_RX)) != XRAN_STATUS_SUCCESS) { printf("xran_reg_physide_cb failed %d\n", xret); exit(-1); @@ -1235,27 +1422,7 @@ int main(int argc, char *argv[]) #endif } - snprintf(filename, sizeof(filename),"mlog-%s", p_usecaseConfiguration->appMode == 0 ? "o-du" : "o-ru"); - - /* MLogOpen(0, 32, 0, 0xFFFFFFFF, filename);*/ - MLogOpen(128, 7, 20000, 0, filename); - MLogSetMask(0); - - puts("----------------------------------------"); - printf("MLog Info: virt=0x%016lx size=%d\n", MLogGetFileLocation(), MLogGetFileSize()); - puts("----------------------------------------"); - - uint64_t nActiveCoreMask[MAX_BBU_POOL_CORE_MASK] = {0}; - uint32_t totalCC = 0; - nActiveCoreMask[0] = ((1 << app_io_xran_fh_init.io_cfg.timing_core) | app_io_xran_fh_init.io_cfg.pkt_proc_core); - nActiveCoreMask[1] = app_io_xran_fh_init.io_cfg.pkt_proc_core_64_127; - - for (o_xu_id = 0; o_xu_id < p_usecaseConfiguration->oXuNum; o_xu_id++) { - RuntimeConfig* p_o_xu_cfg = p_startupConfiguration[o_xu_id]; - totalCC += p_o_xu_cfg->numCC; - } - MLogAddTestCase(nActiveCoreMask, totalCC); fcntl(0, F_SETFL, fcntl(0, F_GETFL) | O_NONBLOCK); @@ -1275,10 +1442,10 @@ int main(int argc, char *argv[]) for (o_xu_id = 0; o_xu_id < p_usecaseConfiguration->oXuNum; o_xu_id++) { if (o_xu_id == 0) { xran_get_time_stats(&nTotalTime, &nUsedTime, &nCoresUsed, nCoreUsedNum, 1); - nUsedPercent = 0.0; - if (nTotalTime) { - nUsedPercent = ((float)nUsedTime * 100.0) / (float)nTotalTime; - } + //nUsedPercent = 0.0; + //if (nTotalTime) { + // nUsedPercent = ((float)nUsedTime * 100.0) / (float)nTotalTime; + //} mlog_times.core_total_time += nTotalTime; mlog_times.core_used_time += nUsedTime; @@ -1294,7 +1461,7 @@ int main(int argc, char *argv[]) printf("\n"); #endif } - printf("[%s%d][rx %7ld pps %7ld kbps %7ld][tx %7ld pps %7ld kbps %7ld] [on_time %ld early %ld late %ld corrupt %ld pkt_dupl %ld Total %ld]\n", + printf("[%s%d][rx %7ld pps %7ld kbps %7ld][tx %7ld pps %7ld kbps %7ld] [on_time %ld early %ld late %ld corrupt %ld pkt_dupl %ld Invalid_Ext1_packets %ld Total %ld]\n", ((p_usecaseConfiguration->appMode == APP_O_DU) ? "o-du" : "o-ru"), o_xu_id, x_counters[o_xu_id].rx_counter, @@ -1308,6 +1475,7 @@ int main(int argc, char *argv[]) x_counters[o_xu_id].Rx_late, x_counters[o_xu_id].Rx_corrupt, x_counters[o_xu_id].Rx_pkt_dupl, + x_counters[o_xu_id].rx_invalid_ext1_packets, x_counters[o_xu_id].Total_msgs_rcvd); if (x_counters[o_xu_id].rx_counter > old_rx_counter[o_xu_id]) @@ -1383,14 +1551,15 @@ int main(int argc, char *argv[]) } } - + MLogSetMask(0x0); puts("Closing l1 app... Ending all threads..."); xran_close(app_io_xran_handle); - if(is_mlog_on) { - app_profile_xran_print_mlog_stats(arg_params.usecase_file); - rte_pause(); +#ifdef FWK_ENABLED + if(p_startupConfiguration[0]->appMode == APP_O_DU && p_usecaseConfiguration->bbu_offload) { + app_bbu_close(); } +#endif app_io_xran_if_stop(); puts("Dump IQs..."); @@ -1398,6 +1567,11 @@ int main(int argc, char *argv[]) app_dump_o_xu_buffers(p_usecaseConfiguration, p_startupConfiguration[o_xu_id]); } + if(is_mlog_on) { + app_profile_xran_print_mlog_stats(arg_params.usecase_file); + rte_pause(); + } + app_io_xran_if_free(); return 0; } diff --git a/fhi_lib/app/src/xran_mlog_task_id.h b/fhi_lib/app/src/xran_mlog_task_id.h index 0af4826..55dd187 100644 --- a/fhi_lib/app/src/xran_mlog_task_id.h +++ b/fhi_lib/app/src/xran_mlog_task_id.h @@ -56,10 +56,384 @@ extern "C" { #define PID_GNB_PROC_TIMING 70 #define PID_GNB_PROC_TIMING_TIMEOUT 71 -#define PID_GNB_SYM_CB 72 #define PID_GNB_PRACH_CB 73 +#define PID_GNB_SYM_CB 72 #define PID_GNB_SRS_CB 74 +#define PID_GNB_BFW_CB 75 +//#define NR5G_SUBTASK_PROFILING_ON +//#define WLS_SUBTASK_ON + +//-------------------------------------------------------------------- +// MAC2PHY API PROC +//-------------------------------------------------------------------- +#define PID_MAC2PHY_API_HANDLER 1 +#define PID_MAC2PHY_API_HANDLER_NULL 2 +#define PID_MAC2PHY_API_CHECK_LATE_API 3 +#define PID_MAC2PHY_API_RECV 4 +#define PID_MAC2PHY_API_RECV_NULL 5 +#define PID_MAC2PHY_API_CLEANUP 6 +#define PID_MAC2PHY_API_ERROR_CHECK 7 +#define PID_MAC2PHY_API_PARSE 8 +#define PID_MAC2PHY_TX_SDU_PROC 9 +#define PID_MAC2PHY_TX_VECTOR_PROC_DATA 10 +#define PID_MAC2PHY_TX_SDU_ZBC 11 +#define PID_MAC2PHY_RX_VECTOR_PROC 12 +#define PID_MAC2PHY_API_PROC 13 + +//-------------------------------------------------------------------- +// PHY2MAC API PROC +//-------------------------------------------------------------------- +#define PID_PHY2MAC_API_PROC_PUSCH 20 +#define PID_PHY2MAC_API_PROC_PUCCH 21 +#define PID_PHY2MAC_API_PROC_UPDATE 22 +#define PID_PHY2MAC_API_PROC_SEND 23 +#define PID_PHY2MAC_URLLC_API_PROC_SEND 24 + +//-------------------------------------------------------------------- +// PHYSTATS +//-------------------------------------------------------------------- +#define PID_PHYSTATS 30 + +//-------------------------------------------------------------------- +// PHYDI +//-------------------------------------------------------------------- +#define PID_PHYDI_IQ_COPY_DL 35 +#define PID_PHYDI_IQ_COPY_UL 36 +#define PID_PHYDI_IQ_COPY_DL_FRB 37 +#define PID_PHYDI_IQ_COPY_UL_FRB 38 +#define PID_PHYDI_IQ_COPY_PRACH_UL 39 +#define PID_PHYDI_IQ_COPY_SRS_UL 40 + +//-------------------------------------------------------------------- +// DISPATCH eBbuPool TASKS +//-------------------------------------------------------------------- +#define PID_GNB_TTI_START_GEN_EXECUTE 43 +#define PID_GNB_SYM2_WAKEUP_GEN_EXECUTE 44 +#define PID_GNB_SYM6_WAKEUP_GEN_EXECUTE 45 +#define PID_GNB_SYM11_WAKEUP_GEN_EXECUTE 46 +#define PID_GNB_SYM13_WAKEUP_GEN_EXECUTE 47 +#define PID_GNB_PRACH_WAKEUP_GEN_EXECUTE 48 +#define PID_GNB_SRS_WAKEUP_GEN_EXECUTE 49 + +//-------------------------------------------------------------------- +// POLLING +//-------------------------------------------------------------------- +#define PID_AUX_BBDEV_DL_POLL 50 +#define PID_AUX_BBDEV_DL_POLL_DISPATCH 51 +#define PID_AUX_BBDEV_UL_POLL 52 +#define PID_AUX_BBDEV_UL_POLL_DISPATCH 53 + +//-------------------------------------------------------------------- +// WLS +//-------------------------------------------------------------------- +#define PID_AUX_WLS_RX_PROCESS 55 +#define PID_AUX_WLS_SEND_API 56 +#define PID_AUX_WLS_ADD_TO_QUEUE 57 +#define PID_AUX_WLS_REMOVE_FROM_QUEUE 58 +#define PID_AUX_WLS_URLLC_RX_PROCESS 59 + +//-------------------------------------------------------------------- +// BBU-POOL-TASKS +//-------------------------------------------------------------------- +#define PID_BBUPOOL_TTI_COMPLETE 60 +#define PID_BBUPOOL_TTI_COMPLETE_PRINT 61 +#define PID_BBUPOOL_TTI_TO_TTI_DURATION 62 + +#define PID_BBUPOOL_ACTIVATE_CELL 63 +#define PID_BBUPOOL_DE_ACTIVATE_CELL 64 +#define PID_BBUPOOL_CREATE_EMPTY_LIST 65 +#define PID_BBUPOOL_RX_HANDLER 66 + +//-------------------------------------------------------------------- +// Timing Tasks +//-------------------------------------------------------------------- +#define PID_GNB_PROC_TIMING 70 +#define PID_GNB_PROC_TIMING_TIMEOUT 71 +#define PID_GNB_TTI_START 72 +#define PID_GNB_SYM2_WAKEUP 73 +#define PID_GNB_SYM6_WAKEUP 74 +#define PID_GNB_SYM11_WAKEUP 75 +#define PID_GNB_SYM13_WAKEUP 76 +#define PID_GNB_PRACH_WAKEUP 77 +#define PID_GNB_SRS_WAKEUP 78 + +//-------------------------------------------------------------------- +// URLLC Tasks +//-------------------------------------------------------------------- +#define PID_GNB_URLLC_DL_TASK 80 +#define PID_GNB_URLLC_DL_TOTAL_TASK 81 +#define PID_GNB_URLLC_UL_TASK 82 +#define PID_GNB_URLLC_UL_TOTAL_TASK 83 +#define PID_GNB_URLLC_TASK 84 +#define PID_GNB_URLLC_DL_CALL_BACK 85 +#define PID_GNB_URLLC_UL_CALL_BACK 86 +#define PID_GNB_URLLC_API_CALL_BACK 87 + +//-------------------------------------------------------------------- +// Latency Tasks (Need 4 values (one per Numerology)) +//-------------------------------------------------------------------- +#define PID_GNB_DL_LINK_PRINT 88 +#define PID_GNB_UL_LINK_PRINT 92 +#define PID_GNB_SRS_LINK_PRINT 96 + +//-------------------------------------------------------------------- +// GNB UL BBU Tasks (there is gap of 24 for 24 cell support) +//-------------------------------------------------------------------- +#define PCID_GNB_FH_RX_DATA_CC0 100 +#define PCID_GNB_FH_RX_SRS_CC0 124 +#define PCID_GNB_PUSCH_CE_SYMB0_CC0 148 +#define PCID_GNB_PUSCH_MMSE_SYMB0_CC0 172 +#define PCID_GNB_PUSCH_MMSE_SYMB7_CC0 196 +#define PCID_GNB_PUSCH_REDEMAP_SYMB0_CC0 220 +#define PCID_GNB_PUSCH_REDEMAP_SYMB7_CC0 244 +#define PCID_GNB_PUSCH_LAYDEMAP_SYMB0_CC0 268 +#define PCID_GNB_PUSCH_LAYDEMAP_SYMB7_CC0 292 +#define PCID_GNB_PUSCH_PN_SYMB0_CC0 316 +#define PCID_GNB_PUSCH_PN_SYMB7_CC0 340 +#define PCID_GNB_PUSCH_DEMOD_SYMB0_CC0 364 +#define PCID_GNB_PUSCH_DEMOD_SYMB7_CC0 388 +#define PCID_GNB_PUSCH_DESCRAMBLE_CC0 412 +#define PCID_GNB_PUSCH_DECODER_CC0 436 +#define PCID_GNB_PUSCH_TB_CC0 460 +#define PCID_GNB_UL_CFG_CC0 484 +#define PCID_GNB_PUSCH_DECODER_CB_CC0 508 +#define PCID_GNB_PUSCH_RX_SYMB0_CC0 532 +#define PCID_GNB_PUSCH_RX_SYMB7_CC0 556 +#define PCID_GNB_PRACH_PROCESS_CC0 580 +#define PCID_GNB_PUCCH_RX_CC0 604 +#define PCID_GNB_SRS_RX_CC0 628 +#define PCID_GNB_PUSCH_UCI_DECODER_CC0 652 +#define PCID_GNB_UL_POST_CC0 676 +#define PCID_GNB_UL_IQ_LOG_CC0 700 +#define PCID_GNB_FH_RX_PRACH_CC0 724 +#define PCID_GNB_PUSCH_RX_LINK_CC0 748 +#define PCID_GNB_UL_LINK_CC0 772 +#define PCID_GNB_PUSCH_CE_SYMB7_CC0 796 +#define PCID_GNB_SRS_RX_LINK_CC0 820 + + +#define PID_GNB_TASKLIST_NOT_COMPLETED 899 +//-------------------------------------------------------------------- +// GNB DL BBU Tasks (there is gap of 24 for 24 cell support) +//-------------------------------------------------------------------- +#define PCID_GNB_DL_CFG_CC0 900 +#define PCID_GNB_PDSCH_TB_CC0 924 +#define PCID_GNB_PDSCH_SCRAMBLER_CC0 948 +#define PCID_GNB_PDSCH_MOD_CC0 972 +#define PCID_GNB_PDSCH_PRECODE_CC0 996 +#define PCID_GNB_PDSCH_RS_CC0 1020 +#define PCID_GNB_PDSCH_REMAP_CC0 1044 +#define PCID_GNB_DL_RESET_BUF_CC0 1068 +#define PCID_GNB_DL_SYMBOL_PROC_CC0 1092 +#define PCID_GNB_DL_CSI_PROC_CC0 1116 +#define PCID_GNB_DL_DCI_PROC_CC0 1140 +#define PCID_GNB_DL_UCI_PROC_CC0 1164 +#define PCID_GNB_DL_PBCH_PROC_CC0 1188 +#define PCID_GNB_DL_POST_CC0 1212 +#define PCID_GNB_PDSCH_TB_QUEUE_CC0 1236 +#define PCID_GNB_DL_LINK_CC0 1260 +#define PCID_GNB_DL_DCI_PRECODER_CC0 1284 +#define PCID_GNB_PDSCH_TB_CRC_CC0 1308 +#define PCID_GNB_PDSCH_CB_SETUP_CC0 1332 + +//-------------------------------------------------------------------- +// Other DL / UL tasks (there is gap of 24 for 24 cell support) +//-------------------------------------------------------------------- +#define PCID_GNB_PUSCH_TB_CRC_CC0 1500 +#define PCID_GNB_PUSCH_CB_SETUP_CC0 1524 +#define PCID_GNB_DL_BEAM_WEIGHT_TASK_CC0 1548 +#define PCID_GNB_UL_BEAM_WEIGHT_TASK_CC0 1572 +#define PCID_GNB_SRS_CE_CC0 1596 +#define PCID_GNB_SRS_REPORT_CC0 1620 +#define PCID_GNB_DL_BEAM_WEIGHT_COMPRESS_CC0 1644 +#define PCID_GNB_UL_BEAM_WEIGHT_COMPRESS_CC0 1668 +#define PCID_GNB_DL_IQ_COMPRESS_CC0 1692 +#define PCID_GNB_UL_IQ_DECOMPRESS_CC0 1712 +#define PCID_GNB_UL_IQ_FROM_XRAN_CC0 1736 +#define PCID_GNB_UL_IQ_SP_SLOT_FROM_XRAN_CC0 1760 +#define PCID_GNB_UL_SRS_IQ_DECOMPRESS_CC0 1784 +#define PCID_GNB_DL_OFDM_CTRL_COMPRESS_CC0 1808 +#define PCID_GNB_DL_OFDM_RS_COMPRESS_CC0 1832 +#define PCID_GNB_DL_OFDM_DATA_COMPRESS_CC0 1856 + +//-------------------------------------------------------------------- +// GNB UL Sub Tasks +//-------------------------------------------------------------------- +#define PID_GNB_PUCCH_F0_SEQ_GEN 2000 +#define PID_GNB_PUCCH_F0_DETECT 2001 +#define PID_GNB_PUCCH_F1_SEQ_GEN1 2002 +#define PID_GNB_PUCCH_F1_SEQ_GEN2 2003 +#define PID_GNB_PUCCH_F1_DESPRD 2004 +#define PID_GNB_PUCCH_F1_DEMOD 2005 +#define PID_GNB_PUCCH_F2_DMRS_GEN 2006 +#define PID_GNB_PUCCH_F2_CE 2007 +#define PID_GNB_PUCCH_F2_EQU 2008 +#define PID_GNB_PUCCH_F2_DEMOD 2009 +#define PID_GNB_PUCCH_F2_DESCR 2010 +#define PID_GNB_PUCCH_F2_DEC 2011 +#define PID_GNB_PUCCH_F3_F4_DMRS_GEN 2012 +#define PID_GNB_PUCCH_F3_F4_CE 2013 +#define PID_GNB_PUCCH_F3_F4_EQU 2014 +#define PID_GNB_PUCCH_F3_F4_IDFT 2015 +#define PID_GNB_PUCCH_F3_F4_DESPRD 2016 +#define PID_GNB_PUCCH_F3_F4_DEMOD 2017 +#define PID_GNB_PUCCH_F3_F4_DESCR 2018 +#define PID_GNB_PUCCH_F3_F4_DEC 2019 + +//-------------------------------------------------------------------- +// GNB UL BBU Creation Tasks +//-------------------------------------------------------------------- +#define PID_GNB_PUSCH_DMRS0_GEN_BYPASS 2700 +#define PID_GNB_PUSCH_DMRS0_GEN_EXECUTE 2701 +#define PID_GNB_PUSCH_DMRS1_GEN_BYPASS 2702 +#define PID_GNB_PUSCH_DMRS1_GEN_EXECUTE 2703 +#define PID_GNB_PRACH_GEN_BYPASS 2704 +#define PID_GNB_PRACH_GEN_EXECUTE 2705 +#define PID_GNB_PUCCH_GEN_BYPASS 2706 +#define PID_GNB_PUCCH_GEN_EXECUTE 2707 +#define PID_GNB_SRS_GEN_BYPASS 2708 +#define PID_GNB_SRS_GEN_EXECUTE 2709 +#define PID_GNB_UL_CFG_GEN_BYPASS 2710 +#define PID_GNB_UL_CFG_GEN_EXECUTE 2711 +#define PID_GNB_PUSCH_TB_TASK_GEN_BYPASS 2712 +#define PID_GNB_PUSCH_TB_TASK_GEN_EXECUTE 2713 +#define PID_GNB_PUSCH_DECODE_TASK_GEN_BYPASS 2714 +#define PID_GNB_PUSCH_DECODE_TASK_GEN_EXECUTE 2715 +#define PID_GNB_PUSCH_DATA0_GEN_BYPASS 2716 +#define PID_GNB_PUSCH_DATA0_GEN_EXECUTE 2717 +#define PID_GNB_PUSCH_DATA1_GEN_BYPASS 2718 +#define PID_GNB_PUSCH_DATA1_GEN_EXECUTE 2719 + +//-------------------------------------------------------------------- +// GNB DL BBU Creation Tasks +//-------------------------------------------------------------------- +#define PID_GNB_DL_SCRAMBLER_GEN_BYPASS 2720 +#define PID_GNB_DL_SCRAMBLER_GEN_EXECUTE 2721 +#define PID_GNB_DL_CONFIG_GEN_BYPASS 2722 +#define PID_GNB_DL_CONFIG_GEN_EXECUTE 2723 +#define PID_GNB_DL_BEAM_GEN_BYPASS 2724 +#define PID_GNB_DL_BEAM_GEN_EXECUTE 2725 + +//-------------------------------------------------------------------- +// GNB Pre Tasks +//-------------------------------------------------------------------- +#define PID_GNB_DL_PDSCH_SYMBOL_PRE_TASK 2730 +#define PID_GNB_UL_PUSCH_CE0_PRE_TASK 2731 +#define PID_GNB_UL_PUSCH_CE7_PRE_TASK 2732 +#define PID_GNB_UL_PUSCH_MMSE0_PRE_TASK 2733 +#define PID_GNB_UL_PUSCH_MMSE7_PRE_TASK 2734 +#define PID_GNB_UL_PUCCH_PRE_TASK 2735 +#define PID_GNB_UL_SRS_PRE_TASK 2736 +#define PID_GNB_UL_PUSCH_LLR_RX_PRE_TASK 2737 +#define PID_GNB_DL_BEAM_WEIGHT_PRE_TASK 2738 +#define PID_GNB_UL_BEAM_WEIGHT_PRE_TASK 2739 +#define PID_GNB_UL_PUSCH_DECODE_PRE_TASK 2740 + +//-------------------------------------------------------------------- +// GNB Post Tasks +//-------------------------------------------------------------------- +#define PID_GNB_UL_PUCCH_POST_TASK 2745 + +//-------------------------------------------------------------------- +// Other tasks +//-------------------------------------------------------------------- +#define PID_GNB_DL_IFFT0 2750 +#define PID_GNB_DL_IFFT1 2751 +#define PID_GNB_DL_IFFT2 2752 +#define PID_GNB_DL_IFFT3 2753 +#define PID_GNB_DL_IFFT4 2754 +#define PID_GNB_DL_IFFT5 2755 +#define PID_GNB_DL_IFFT6 2756 +#define PID_GNB_DL_IFFT7 2757 +#define PID_GNB_UL_FFT0 2758 +#define PID_GNB_UL_FFT1 2759 +#define PID_GNB_UL_FFT2 2760 +#define PID_GNB_UL_FFT3 2761 +#define PID_GNB_UL_FFT4 2762 +#define PID_GNB_UL_FFT5 2763 +#define PID_GNB_UL_FFT6 2764 +#define PID_GNB_UL_FFT7 2765 + +#define PID_DLIFFT 2766 +#define PID_DLIFFT_ADD_CP 2767 +#define PID_ULFFT 2768 + +//-------------------------------------------------------------------- +// AUX RADIO +//-------------------------------------------------------------------- +#define PID_AUX_RADIO_RX_BYPASS_PROC 2900 +#define PID_AUX_RADIO_RX_STOP 2901 +#define PID_AUX_RADIO_RX_UL_IQ 2902 +#define PID_AUX_RADIO_PRACH_PKT 2903 +#define PID_AUX_RADIO_FE_COMPRESS 2904 +#define PID_AUX_RADIO_FE_DECOMPRESS 2905 +#define PID_AUX_RADIO_TX_BYPASS_PROC 2906 +#define PID_AUX_RADIO_ETH_TX_BURST 2907 +#define PID_AUX_RADIO_TX_DL_IQ 2908 +#define PID_AUX_RADIO_RX_VALIDATE 2909 +#define PID_AUX_RADIO_RX_IRQ_ON 2910 +#define PID_AUX_RADIO_RX_IRQ_OFF 2911 +#define PID_AUX_RADIO_RX_EPOLL_WAIT 2912 +#define PID_AUX_RADIO_TX_LTEMODE_PROC 2913 +#define PID_AUX_RADIO_RX_LTEMODE_PROC 2914 +#define PID_AUX_RADIO_TX_PLAY_BACK_IQ 2915 + +#define PCID_BBUPOOL_RADIO_DL_COMPRESSION_TASK_CC0 2940 +#define PCID_BBUPOOL_RADIO_DL_IQ_LOG_LTE_TASK_CC0 2960 +#define PCID_BBUPOOL_RADIO_UL_IQ_LOG_LTE_TASK_CC0 2980 + +//-------------------------------------------------------------------- +// XRAN +//-------------------------------------------------------------------- +#define PID_XRAN_TTI_TIMER 3100 +#define PID_XRAN_TTI_CB 3101 +#define PID_XRAN_SYM_TIMER 3102 +#define PID_XRAN_PROC_TIMING_TIMEOUT 3103 +#define PID_XRAN_TIME_SYSTIME_POLL 3104 +#define PID_XRAN_TIME_SYSTIME_STOP 3105 +#define PID_XRAN_TIME_ARM_TIMER 3106 + +#define PID_XRAN_FREQ_RX_PKT 3107 +#define PID_XRAN_RX_STOP 3108 +#define PID_XRAN_RX_UL_IQ 3109 +#define PID_XRAN_PRACH_PKT 3110 +#define PID_XRAN_FE_COMPRESS 3111 +#define PID_XRAN_FE_DECOMPRESS 3112 +#define PID_XRAN_TX_BYPASS_PROC 3113 +#define PID_XRAN_ETH_TX_BURST 3114 +#define PID_XRAN_TX_DL_IQ 3115 +#define PID_XRAN_RX_VALIDATE 3116 +#define PID_XRAN_RX_IRQ_ON 3117 +#define PID_XRAN_RX_IRQ_OFF 3118 +#define PID_XRAN_RX_EPOLL_WAIT 3119 +#define PID_XRAN_TX_LTEMODE_PROC 3120 +#define PID_XRAN_RX_LTEMODE_PROC 3121 +#define PID_XRAN_TX_PLAY_BACK_IQ 3122 +#define PID_XRAN_PROCESS_TX_SYM 3123 +#define PID_XRAN_DISPATCH_TX_SYM 3124 +#define PID_XRAN_PREPARE_TX_PKT 3125 +#define PID_XRAN_ATTACH_EXT_BUF 3126 +#define PID_XRAN_ETH_ENQUEUE_BURST 3127 + +#define PID_XRAN_CP_DL_CB 3128 +#define PID_XRAN_CP_UL_CB 3129 +#define PID_XRAN_UP_DL_CB 3130 +#define PID_XRAN_SYM_OTA_CB 3131 +#define PID_XRAN_TTI_CB_TO_PHY 3132 +#define PID_XRAN_HALF_SLOT_CB_TO_PHY 3133 +#define PID_XRAN_FULL_SLOT_CB_TO_PHY 3134 +#define PID_XRAN_UP_UL_HALF_DEAD_LINE_CB 3135 +#define PID_XRAN_UP_UL_FULL_DEAD_LINE_CB 3136 +#define PID_XRAN_UP_UL_USER_DEAD_LINE_CB 3137 + +#define PID_XRAN_PROCESS_UP_PKT 3140 +#define PID_XRAN_PROCESS_UP_PKT_SRS 3141 +#define PID_XRAN_PROCESS_UP_PKT_PARSE 3142 +#define PID_XRAN_PROCESS_CP_PKT 3143 +#define PID_XRAN_PROCESS_DELAY_MEAS_PKT 3144 +#define PID_XRAN_TIME_ARM_TIMER_DEADLINE 3150 +#define PID_XRAN_TIME_ARM_USER_TIMER_DEADLINE 3151 #ifdef __cplusplus } diff --git a/fhi_lib/app/usecase/cat_a/mu0_10mhz/12/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_a/mu0_10mhz/12/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..0d387ec --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu0_10mhz/12/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 5 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 6 + + 0,0,0,0,0,0,0,0,0,0,0,0 + + 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000 + + 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_a/mu0_10mhz/12/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_a/mu0_10mhz/12/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu0_10mhz/12/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_a/mu0_10mhz/12/config_file_o_du.dat b/fhi_lib/app/usecase/cat_a/mu0_10mhz/12/config_file_o_du.dat index a2cc38f..1618add 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_10mhz/12/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_a/mu0_10mhz/12/config_file_o_du.dat @@ -106,7 +106,7 @@ antC45=./usecase/cat_a/mu0_10mhz/ant_1.bin #CC11 antC46=./usecase/cat_a/mu0_10mhz/ant_2.bin #CC11 antC47=./usecase/cat_a/mu0_10mhz/ant_3.bin #CC11 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_a/mu0_10mhz/12/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_a/mu0_10mhz/12/config_file_o_ru.dat index 4d16009..5fba6e1 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_10mhz/12/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_a/mu0_10mhz/12/config_file_o_ru.dat @@ -106,7 +106,7 @@ antC45=./usecase/cat_a/mu0_10mhz/ant_1.bin #CC11 antC46=./usecase/cat_a/mu0_10mhz/ant_2.bin #CC11 antC47=./usecase/cat_a/mu0_10mhz/ant_3.bin #CC11 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index antPrachC0=./usecase/cat_a/mu0_10mhz/ant_0.bin diff --git a/fhi_lib/app/usecase/cat_a/mu0_10mhz/12/usecase_du.cfg b/fhi_lib/app/usecase/cat_a/mu0_10mhz/12/usecase_du.cfg index 5c067f4..84a7872 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_10mhz/12/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_a/mu0_10mhz/12/usecase_du.cfg @@ -20,6 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/cat_a/mu0_10mhz/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_a/mu0_10mhz/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..ea87359 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu0_10mhz/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 0,0,0,0 + + 1000, 1000, 1000, 1000 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_a/mu0_10mhz/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_a/mu0_10mhz/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu0_10mhz/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_a/mu0_10mhz/config_file_o_du.dat b/fhi_lib/app/usecase/cat_a/mu0_10mhz/config_file_o_du.dat index 732317a..1585580 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_10mhz/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_a/mu0_10mhz/config_file_o_du.dat @@ -106,7 +106,7 @@ antC45=./usecase/cat_a/mu0_10mhz/ant_13.bin #CC11 antC46=./usecase/cat_a/mu0_10mhz/ant_14.bin #CC11 antC47=./usecase/cat_a/mu0_10mhz/ant_15.bin #CC11 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_a/mu0_10mhz/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_a/mu0_10mhz/config_file_o_ru.dat index 051ba45..f9b49db 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_10mhz/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_a/mu0_10mhz/config_file_o_ru.dat @@ -106,7 +106,7 @@ antC45=./usecase/cat_a/mu0_10mhz/ant_13.bin #CC11 antC46=./usecase/cat_a/mu0_10mhz/ant_14.bin #CC11 antC47=./usecase/cat_a/mu0_10mhz/ant_15.bin #CC11 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index antPrachC0=./usecase/cat_a/mu0_10mhz/ant_0.bin diff --git a/fhi_lib/app/usecase/cat_a/mu0_10mhz/usecase_du.cfg b/fhi_lib/app/usecase/cat_a/mu0_10mhz/usecase_du.cfg index 5c067f4..84a7872 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_10mhz/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_a/mu0_10mhz/usecase_du.cfg @@ -20,6 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..0711d4a --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 8 + + 8 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 6 + + 0,0,0,0,0,0,0,0,0,0,0,0 + + 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000 + + 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/config_file_o_du.dat b/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/config_file_o_du.dat index 92d90a3..c8efaad 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/config_file_o_du.dat @@ -106,7 +106,7 @@ antC45=./usecase/cat_a/mu0_20mhz/ant_1.bin #CC11 antC46=./usecase/cat_a/mu0_20mhz/ant_2.bin #CC11 antC47=./usecase/cat_a/mu0_20mhz/ant_3.bin #CC11 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index ########################################################### diff --git a/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/config_file_o_du_0.dat b/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/config_file_o_du_0.dat index d1f3391..c85f07f 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/config_file_o_du_0.dat +++ b/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/config_file_o_du_0.dat @@ -179,7 +179,7 @@ antC47=../usecase/cat_a/mu0_20mhz/12/uliq3.bin #CC0 #antC46=../usecase/cat_a/mu0_20mhz/12/ant_14.bin #CC11 #antC47=../usecase/cat_a/mu0_20mhz/12/ant_15.bin #CC11 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/config_file_o_du_1.dat b/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/config_file_o_du_1.dat index f395c78..1d07ef3 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/config_file_o_du_1.dat +++ b/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/config_file_o_du_1.dat @@ -179,7 +179,7 @@ antC47=../usecase/cat_a/mu0_20mhz/12/uliq3.bin #CC0 #antC46=../usecase/cat_a/mu0_20mhz/12/ant_14.bin #CC11 #antC47=../usecase/cat_a/mu0_20mhz/12/ant_15.bin #CC11 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/config_file_o_ru.dat index 08c3de2..2edfc4d 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/config_file_o_ru.dat @@ -107,7 +107,7 @@ antC45=./usecase/cat_a/mu0_20mhz/ant_1.bin #CC11 antC46=./usecase/cat_a/mu0_20mhz/ant_2.bin #CC11 antC47=./usecase/cat_a/mu0_20mhz/ant_3.bin #CC11 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index antPrachC0=./usecase/cat_a/mu0_20mhz/ant_0.bin diff --git a/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/config_file_o_ru_0.dat b/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/config_file_o_ru_0.dat index 98fe643..b7daba4 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/config_file_o_ru_0.dat +++ b/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/config_file_o_ru_0.dat @@ -179,7 +179,7 @@ antC47=../usecase/cat_a/mu0_20mhz/12/uliq3.bin #CC0 #antC46=../usecase/cat_a/mu0_20mhz/12/ant_14.bin #CC11 #antC47=../usecase/cat_a/mu0_20mhz/12/ant_15.bin #CC11 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index antPrachC0=../usecase/cat_a/mu0_20mhz/12/ant_0.bin diff --git a/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/config_file_o_ru_1.dat b/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/config_file_o_ru_1.dat index b80a9b1..1406774 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/config_file_o_ru_1.dat +++ b/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/config_file_o_ru_1.dat @@ -179,7 +179,7 @@ antC47=../usecase/cat_a/mu0_20mhz/12/uliq3.bin #CC0 #antC46=../usecase/cat_a/mu0_20mhz/12/ant_14.bin #CC11 #antC47=../usecase/cat_a/mu0_20mhz/12/ant_15.bin #CC11 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index antPrachC0=../usecase/cat_a/mu0_20mhz/12/ant_0.bin diff --git a/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/usecase_du.cfg b/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/usecase_du.cfg index 44af819..5afdd45 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_a/mu0_20mhz/12/usecase_du.cfg @@ -22,6 +22,7 @@ ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] #dpdkMemorySize=10240 oXuNum=1 # numbers of O-RU connected to O-DU +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) diff --git a/fhi_lib/app/usecase/cat_a/mu0_20mhz/20/config_file_o_du.dat b/fhi_lib/app/usecase/cat_a/mu0_20mhz/20/config_file_o_du.dat index f5d2d26..b9429db 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_20mhz/20/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_a/mu0_20mhz/20/config_file_o_du.dat @@ -74,7 +74,7 @@ antC14=./usecase/cat_a/mu0_20mhz/ant_14.bin #CC3 antC15=./usecase/cat_a/mu0_20mhz/ant_15.bin #CC3 ## RACH TODO: update for PRACH -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index diff --git a/fhi_lib/app/usecase/cat_a/mu0_20mhz/20/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_a/mu0_20mhz/20/config_file_o_ru.dat index 208fee5..b87671b 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_20mhz/20/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_a/mu0_20mhz/20/config_file_o_ru.dat @@ -75,7 +75,7 @@ antC14=./usecase/cat_a/mu0_20mhz/ant_14.bin #CC3 antC15=./usecase/cat_a/mu0_20mhz/ant_15.bin #CC3 ## RACH TODO: update for PRACH -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration #rachOffset=43 # RB offset for prach detection (see RIU spec) prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index diff --git a/fhi_lib/app/usecase/cat_a/mu0_20mhz/20/usecase_du.cfg b/fhi_lib/app/usecase/cat_a/mu0_20mhz/20/usecase_du.cfg index 5546c0e..52e6d02 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_20mhz/20/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_a/mu0_20mhz/20/usecase_du.cfg @@ -20,6 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/cat_a/mu0_20mhz/21/config_file_o_du.dat b/fhi_lib/app/usecase/cat_a/mu0_20mhz/21/config_file_o_du.dat index f5d2d26..b9429db 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_20mhz/21/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_a/mu0_20mhz/21/config_file_o_du.dat @@ -74,7 +74,7 @@ antC14=./usecase/cat_a/mu0_20mhz/ant_14.bin #CC3 antC15=./usecase/cat_a/mu0_20mhz/ant_15.bin #CC3 ## RACH TODO: update for PRACH -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index diff --git a/fhi_lib/app/usecase/cat_a/mu0_20mhz/21/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_a/mu0_20mhz/21/config_file_o_ru.dat index 208fee5..b87671b 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_20mhz/21/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_a/mu0_20mhz/21/config_file_o_ru.dat @@ -75,7 +75,7 @@ antC14=./usecase/cat_a/mu0_20mhz/ant_14.bin #CC3 antC15=./usecase/cat_a/mu0_20mhz/ant_15.bin #CC3 ## RACH TODO: update for PRACH -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration #rachOffset=43 # RB offset for prach detection (see RIU spec) prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index diff --git a/fhi_lib/app/usecase/cat_a/mu0_20mhz/21/usecase_du.cfg b/fhi_lib/app/usecase/cat_a/mu0_20mhz/21/usecase_du.cfg index a1d3e6f..a082168 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_20mhz/21/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_a/mu0_20mhz/21/usecase_du.cfg @@ -20,6 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/cat_a/mu0_20mhz/22/config_file_o_du.dat b/fhi_lib/app/usecase/cat_a/mu0_20mhz/22/config_file_o_du.dat index f5d2d26..b9429db 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_20mhz/22/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_a/mu0_20mhz/22/config_file_o_du.dat @@ -74,7 +74,7 @@ antC14=./usecase/cat_a/mu0_20mhz/ant_14.bin #CC3 antC15=./usecase/cat_a/mu0_20mhz/ant_15.bin #CC3 ## RACH TODO: update for PRACH -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index diff --git a/fhi_lib/app/usecase/cat_a/mu0_20mhz/22/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_a/mu0_20mhz/22/config_file_o_ru.dat index 208fee5..b87671b 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_20mhz/22/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_a/mu0_20mhz/22/config_file_o_ru.dat @@ -75,7 +75,7 @@ antC14=./usecase/cat_a/mu0_20mhz/ant_14.bin #CC3 antC15=./usecase/cat_a/mu0_20mhz/ant_15.bin #CC3 ## RACH TODO: update for PRACH -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration #rachOffset=43 # RB offset for prach detection (see RIU spec) prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index diff --git a/fhi_lib/app/usecase/cat_a/mu0_20mhz/22/usecase_du.cfg b/fhi_lib/app/usecase/cat_a/mu0_20mhz/22/usecase_du.cfg index 9f7faec..d168f8e 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_20mhz/22/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_a/mu0_20mhz/22/usecase_du.cfg @@ -20,6 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/cat_a/mu0_20mhz/23/config_file_o_du.dat b/fhi_lib/app/usecase/cat_a/mu0_20mhz/23/config_file_o_du.dat index 4abf087..472d248 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_20mhz/23/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_a/mu0_20mhz/23/config_file_o_du.dat @@ -74,7 +74,7 @@ antC14=./usecase/cat_a/mu0_20mhz/ant_14.bin #CC3 antC15=./usecase/cat_a/mu0_20mhz/ant_15.bin #CC3 ## RACH TODO: update for PRACH -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index diff --git a/fhi_lib/app/usecase/cat_a/mu0_20mhz/23/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_a/mu0_20mhz/23/config_file_o_ru.dat index 0aed8c8..42b4ae6 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_20mhz/23/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_a/mu0_20mhz/23/config_file_o_ru.dat @@ -75,7 +75,7 @@ antC14=./usecase/cat_a/mu0_20mhz/ant_14.bin #CC3 antC15=./usecase/cat_a/mu0_20mhz/ant_15.bin #CC3 ## RACH TODO: update for PRACH -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration #rachOffset=43 # RB offset for prach detection (see RIU spec) prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index diff --git a/fhi_lib/app/usecase/cat_a/mu0_20mhz/23/usecase_du.cfg b/fhi_lib/app/usecase/cat_a/mu0_20mhz/23/usecase_du.cfg index f98f420..2470c10 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_20mhz/23/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_a/mu0_20mhz/23/usecase_du.cfg @@ -20,6 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/cat_a/mu0_20mhz/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_a/mu0_20mhz/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..ea87359 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu0_20mhz/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 0,0,0,0 + + 1000, 1000, 1000, 1000 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_a/mu0_20mhz/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_a/mu0_20mhz/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu0_20mhz/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_a/mu0_20mhz/config_file_o_du.dat b/fhi_lib/app/usecase/cat_a/mu0_20mhz/config_file_o_du.dat index f5d2d26..fa2940a 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_20mhz/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_a/mu0_20mhz/config_file_o_du.dat @@ -74,9 +74,26 @@ antC14=./usecase/cat_a/mu0_20mhz/ant_14.bin #CC3 antC15=./usecase/cat_a/mu0_20mhz/ant_15.bin #CC3 ## RACH TODO: update for PRACH -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=1 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,106,0,14,0,1,0,16,1 +PrbElemDl1=50,56,0,14,0,1,0,16,1 +nPrbElemUl=1 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,106,0,14,0,1,0,16,1 +PrbElemUl1=50,56,0,14,0,1,0,16,1 +########################################################### + + ## control of IQ byte order iqswap=0 #do swap of IQ before send buffer to eth diff --git a/fhi_lib/app/usecase/cat_a/mu0_20mhz/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_a/mu0_20mhz/config_file_o_ru.dat index 208fee5..5493bb9 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_20mhz/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_a/mu0_20mhz/config_file_o_ru.dat @@ -75,7 +75,7 @@ antC14=./usecase/cat_a/mu0_20mhz/ant_14.bin #CC3 antC15=./usecase/cat_a/mu0_20mhz/ant_15.bin #CC3 ## RACH TODO: update for PRACH -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration #rachOffset=43 # RB offset for prach detection (see RIU spec) prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index @@ -83,7 +83,21 @@ antPrachC0=./usecase/cat_a/mu0_20mhz/ant_0.bin antPrachC1=./usecase/cat_a/mu0_20mhz/ant_1.bin antPrachC2=./usecase/cat_a/mu0_20mhz/ant_2.bin antPrachC3=./usecase/cat_a/mu0_20mhz/ant_3.bin - +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=1 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,106,0,14,0,1,0,16,1 +PrbElemDl1=50,56,0,14,0,1,0,16,1 +nPrbElemUl=1 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,106,0,14,0,1,0,16,1 +PrbElemUl1=50,56,0,14,0,1,0,16,1 +########################################################### ## control of IQ byte order iqswap=0 #do swap of IQ before send buffer to eth diff --git a/fhi_lib/app/usecase/cat_a/mu0_20mhz/usecase_du.cfg b/fhi_lib/app/usecase/cat_a/mu0_20mhz/usecase_du.cfg index 5c067f4..84a7872 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_20mhz/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_a/mu0_20mhz/usecase_du.cfg @@ -20,6 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/cat_a/mu0_5mhz/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_a/mu0_5mhz/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..ea87359 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu0_5mhz/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 0,0,0,0 + + 1000, 1000, 1000, 1000 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_a/mu0_5mhz/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_a/mu0_5mhz/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu0_5mhz/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_a/mu0_5mhz/config_file_o_du.dat b/fhi_lib/app/usecase/cat_a/mu0_5mhz/config_file_o_du.dat index 37c8968..006947d 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_5mhz/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_a/mu0_5mhz/config_file_o_du.dat @@ -75,7 +75,7 @@ antC14=./usecase/cat_a/mu0_5mhz/ant_14.bin #CC3 antC15=./usecase/cat_a/mu0_5mhz/ant_15.bin #CC3 ## RACH TODO: update for PRACH -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration #rachOffset=43 # RB offset for prach detection (see RIU spec) #prachConfigIndex=1 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index diff --git a/fhi_lib/app/usecase/cat_a/mu0_5mhz/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_a/mu0_5mhz/config_file_o_ru.dat index bd9cd87..8d3ff81 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_5mhz/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_a/mu0_5mhz/config_file_o_ru.dat @@ -74,7 +74,7 @@ antC14=./usecase/cat_a/mu0_5mhz/ant_14.bin #CC3 antC15=./usecase/cat_a/mu0_5mhz/ant_15.bin #CC3 ## RACH TODO: update for PRACH -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration #rachOffset=43 # RB offset for prach detection (see RIU spec) #prachConfigIndex=1 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index antPrachC0=./usecase/cat_a/mu0_10mhz/ant_0.bin diff --git a/fhi_lib/app/usecase/cat_a/mu0_5mhz/usecase_du.cfg b/fhi_lib/app/usecase/cat_a/mu0_5mhz/usecase_du.cfg index 5c067f4..84a7872 100644 --- a/fhi_lib/app/usecase/cat_a/mu0_5mhz/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_a/mu0_5mhz/usecase_du.cfg @@ -20,6 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/101/config_file_o_du.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/101/config_file_o_du.dat index 0c80dee..22c2cd1 100644 --- a/fhi_lib/app/usecase/cat_a/mu1_100mhz/101/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/101/config_file_o_du.dat @@ -84,7 +84,7 @@ antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index ########################################################### diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/101/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/101/config_file_o_ru.dat index 40cca8a..beeb72e 100644 --- a/fhi_lib/app/usecase/cat_a/mu1_100mhz/101/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/101/config_file_o_ru.dat @@ -101,7 +101,7 @@ antPrachC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 antPrachC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 antPrachC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index ########################################################### diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/101/usecase_du.cfg b/fhi_lib/app/usecase/cat_a/mu1_100mhz/101/usecase_du.cfg index 5c067f4..12d06c3 100644 --- a/fhi_lib/app/usecase/cat_a/mu1_100mhz/101/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/101/usecase_du.cfg @@ -20,6 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/102/config_file_o_du.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/102/config_file_o_du.dat index 19fdafb..57b63dc 100644 --- a/fhi_lib/app/usecase/cat_a/mu1_100mhz/102/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/102/config_file_o_du.dat @@ -84,7 +84,7 @@ antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index ########################################################### diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/102/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/102/config_file_o_ru.dat index a7209cb..f5c88c6 100644 --- a/fhi_lib/app/usecase/cat_a/mu1_100mhz/102/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/102/config_file_o_ru.dat @@ -101,7 +101,7 @@ antPrachC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 antPrachC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 antPrachC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index ########################################################### diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/102/usecase_du.cfg b/fhi_lib/app/usecase/cat_a/mu1_100mhz/102/usecase_du.cfg index 5c067f4..12d06c3 100644 --- a/fhi_lib/app/usecase/cat_a/mu1_100mhz/102/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/102/usecase_du.cfg @@ -20,6 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/2/config_file_o_du.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/2/config_file_o_du.dat index 0d4d03c..1fe1649 100644 --- a/fhi_lib/app/usecase/cat_a/mu1_100mhz/2/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/2/config_file_o_du.dat @@ -83,7 +83,7 @@ antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration ## control of IQ byte order iqswap=0 #do swap of IQ before send buffer to eth diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/2/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/2/config_file_o_ru.dat index 86e3219..e8dcf92 100644 --- a/fhi_lib/app/usecase/cat_a/mu1_100mhz/2/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/2/config_file_o_ru.dat @@ -100,7 +100,7 @@ antPrachC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 antPrachC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 antPrachC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=1 ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/2/usecase_du.cfg b/fhi_lib/app/usecase/cat_a/mu1_100mhz/2/usecase_du.cfg index 5c067f4..12d06c3 100644 --- a/fhi_lib/app/usecase/cat_a/mu1_100mhz/2/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/2/usecase_du.cfg @@ -20,6 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/201/mu3_config_file_o_du.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/201/config_file_o_du.dat similarity index 50% rename from fhi_lib/app/usecase/cat_a/mu3_100mhz/201/mu3_config_file_o_du.dat rename to fhi_lib/app/usecase/cat_a/mu1_100mhz/201/config_file_o_du.dat index 726eec3..71779af 100644 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/201/mu3_config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/201/config_file_o_du.dat @@ -16,7 +16,6 @@ # #******************************************************************************/ - # This is simple configuration file. Use '#' sign for comments instanceId=0 # 0,1,2,... in case more than 1 application started on the same system appMode=0 # O-DU(0) | RU(1) @@ -25,28 +24,24 @@ ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (de antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B ##Numerology -mu=3 #mmWave 120Khz Sub Carrier Spacing -ttiPeriod=125 # in us TTI period (mmWave default 125us) -nDLAbsFrePointA=27968160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=27968160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=1024 -nULFftSize=1024 +nDLFftSize=4096 +nULFftSize=4096 nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=4 #[0-5] TDD priod e.g. DDDS 4 +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,2,2,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -# not used -#sSlotConfig4=0,2,2,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) @@ -55,67 +50,66 @@ Gps_Beta=0 ioCore=5 # Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_a/mu3_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_a/mu3_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_a/mu3_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_a/mu3_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_a/mu3_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_a/mu3_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_a/mu3_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_a/mu3_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_a/mu3_100mhz/ant_8.bin #CC2 -antC9=./usecase/cat_a/mu3_100mhz/ant_9.bin #CC2 -antC10=./usecase/cat_a/mu3_100mhz/ant_10.bin #CC2 -antC11=./usecase/cat_a/mu3_100mhz/ant_11.bin #CC2 -antC12=./usecase/cat_a/mu3_100mhz/ant_12.bin #CC3 -antC13=./usecase/cat_a/mu3_100mhz/ant_13.bin #CC3 -antC14=./usecase/cat_a/mu3_100mhz/ant_14.bin #CC3 -antC15=./usecase/cat_a/mu3_100mhz/ant_15.bin #CC3 - -rachEanble=1 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=81 +antC0=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antC2=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +#antC3=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + ########################################################### ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=8 -max_sections_per_symbol=8 -nPrbElemDl=1 +nPrbElemDl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams -PrbElemDl0=0,36,0,14,1,1,0,16,1 -PrbElemDl1=36,36,0,14,2,1,0,16,1 -PrbElemDl2=72,36,0,14,3,1,0,16,1 -PrbElemDl3=108,36,0,14,4,1,0,16,1 -PrbElemDl4=144,36,0,14,5,1,0,16,1 -PrbElemDl5=180,36,0,14,6,1,0,16,1 -PrbElemDl6=216,36,0,14,7,1,0,16,1 -PrbElemDl7=252,21,0,14,8,1,0,16,1 +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 -nPrbElemUl=1 +nPrbElemUl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams -PrbElemUl0=0,36,0,14,1,1,0,16,1 -PrbElemUl1=36,36,0,14,2,1,0,16,1 -PrbElemUl2=72,36,0,14,3,1,0,16,1 -PrbElemUl3=108,36,0,14,4,1,0,16,1 -PrbElemUl4=144,36,0,14,5,1,0,16,1 -PrbElemUl5=180,36,0,14,6,1,0,16,1 -PrbElemUl6=216,36,0,14,7,1,0,16,1 -PrbElemUl7=252,21,0,14,8,1,0,16,1 +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 ########################################################### @@ -129,49 +123,45 @@ debugStopCount=0 #if this value is >0 then stop app after x transmission packets bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled -c_plane_vlan_tag=1 #VLAN Tag used for C-Plane -u_plane_vlan_tag=2 #VLAN Tag used for U-Plane ##O-RU Settings totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 #in us TODO: update per RU implementation - #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages - +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages #Reception Window C-plane DL -T2a_min_cp_dl=50 #in us -T2a_max_cp_dl=140 #in us +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us #Reception Window C-plane UL -T2a_min_cp_ul=50 #in us -T2a_max_cp_ul=140 #in us +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us #Reception Window U-plane -T2a_min_up=25 #in us -T2a_max_up=70 #in us +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us #Transmission Window -Ta3_min=20 #in us -Ta3_max=32 #in us +Ta3_min=50 # in us +Ta3_max=171 # in us ########################################################### ##O-DU Settings #C-plane #Transmission Window Fast C-plane DL -T1a_min_cp_dl=70 -T1a_max_cp_dl=100 +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 ##Transmission Window Fast C-plane UL -T1a_min_cp_ul=60 -T1a_max_cp_ul=70 +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 #U-plane ##Transmission Window -T1a_min_up=35 -T1a_max_up=50 +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us #Reception Window -Ta4_min=0 -Ta4_max=45 +Ta4_min=50 # in us +Ta4_max=331 # in us ########################################################### diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/201/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/201/config_file_o_ru.dat new file mode 100644 index 0000000..204bed5 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/201/config_file_o_ru.dat @@ -0,0 +1,183 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=15 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antC2=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +#antC3=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +antPrachC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antPrachC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antPrachC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +#antPrachC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antPrachC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antPrachC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antPrachC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antPrachC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antPrachC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antPrachC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antPrachC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antPrachC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antPrachC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antPrachC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antPrachC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/411/usecase_du.cfg b/fhi_lib/app/usecase/cat_a/mu1_100mhz/201/usecase_du.cfg similarity index 94% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/411/usecase_du.cfg rename to fhi_lib/app/usecase/cat_a/mu1_100mhz/201/usecase_du.cfg index 281607d..1405c36 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/411/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/201/usecase_du.cfg @@ -20,9 +20,9 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU - oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs @@ -54,16 +54,17 @@ oXuRem0Mac1=00:11:22:33:00:11 oXuRem0Mac2=00:11:22:33:00:21 oXuRem0Mac3=00:11:22:33:00:31 -# remote O-XU 1 Eth Link 0 +# #remote O-XU 1 Eth Link 0 oXuRem1Mac0=00:11:22:33:01:01 oXuRem1Mac1=00:11:22:33:01:11 # remote O-XU 1 Eth Link 1 oXuRem1Mac2=00:11:22:33:01:21 oXuRem1Mac3=00:11:22:33:01:31 -# remote O-XU 2 Eth Link 0 +#remote O-XU 2 Eth Link 0 oXuRem2Mac0=00:11:22:33:02:01 oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 +#remote O-XU 2 Eth Link 1 oXuRem2Mac2=00:11:22:33:02:21 oXuRem2Mac3=00:11:22:33:02:31 + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/201/usecase_ru.cfg b/fhi_lib/app/usecase/cat_a/mu1_100mhz/201/usecase_ru.cfg new file mode 100644 index 0000000..449faa3 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/201/usecase_ru.cfg @@ -0,0 +1,68 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ +# This is simple configuration file. Use '#' sign for comments +appMode=1 # All O-DU(0) | O-RU(1) +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +ioCore=15 # core id +ioWorker=0x800000000 # mask [0- no workers] + +oXuNum=1 # numbers of O-RU connected to O-DU +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./config_file_o_ru.dat #O-RU0 + +#O-XU 0 +#PciBusAddoXu0Vf0=0000:51:11.0 +#PciBusAddoXu0Vf1=0000:51:11.1 +#PciBusAddoXu0Vf2=0000:51:11.2 +#PciBusAddoXu0Vf3=0000:51:11.3 + +#O-XU 1 +#PciBusAddoXu1Vf0=0000:51:11.4 +#PciBusAddoXu1Vf1=0000:51:11.5 +#PciBusAddoXu1Vf2=0000:51:11.6 +#PciBusAddoXu1Vf3=0000:51:11.7 + +#O-XU 2 +#PciBusAddoXu2Vf0=0000:51:12.0 +#PciBusAddoXu2Vf1=0000:51:12.1 +#PciBusAddoXu2Vf2=0000:51:12.2 +#PciBusAddoXu2Vf3=0000:51:12.3 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:00 +oXuRem0Mac1=00:11:22:33:00:10 +# remote O-XU 0 Eth Link 1 +oXuRem1Mac2=00:11:22:33:00:20 +oXuRem1Mac3=00:11:22:33:00:30 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:00 +oXuRem1Mac1=00:11:22:33:01:10 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:20 +oXuRem1Mac3=00:11:22:33:01:30 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:00 +oXuRem2Mac1=00:11:22:33:02:10 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:20 +oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/202/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_a/mu1_100mhz/202/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..9ff6cfe --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/202/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 2 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/202/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_a/mu1_100mhz/202/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..9ff6cfe --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/202/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 2 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/202/config_file_o_du_0.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/202/config_file_o_du_0.dat new file mode 100644 index 0000000..71779af --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/202/config_file_o_du_0.dat @@ -0,0 +1,167 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU(0) | RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antC2=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +#antC3=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/202/config_file_o_du_1.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/202/config_file_o_du_1.dat new file mode 100644 index 0000000..32d5b7e --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/202/config_file_o_du_1.dat @@ -0,0 +1,167 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU(0) | RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +#antC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/202/config_file_o_ru_0.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/202/config_file_o_ru_0.dat new file mode 100644 index 0000000..204bed5 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/202/config_file_o_ru_0.dat @@ -0,0 +1,183 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=15 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antC2=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +#antC3=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +antPrachC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antPrachC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antPrachC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +#antPrachC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antPrachC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antPrachC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antPrachC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antPrachC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antPrachC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antPrachC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antPrachC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antPrachC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antPrachC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antPrachC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antPrachC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/202/config_file_o_ru_1.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/202/config_file_o_ru_1.dat new file mode 100644 index 0000000..d29143f --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/202/config_file_o_ru_1.dat @@ -0,0 +1,183 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=15 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +#antC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +antPrachC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antPrachC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antPrachC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +#antPrachC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antPrachC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antPrachC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antPrachC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antPrachC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antPrachC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antPrachC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antPrachC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antPrachC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antPrachC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antPrachC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antPrachC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/202/usecase_du.cfg b/fhi_lib/app/usecase/cat_a/mu1_100mhz/202/usecase_du.cfg new file mode 100644 index 0000000..fe44778 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/202/usecase_du.cfg @@ -0,0 +1,72 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ +# This is simple configuration file. Use '#' sign for comments +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +ioCore=5 # core id +ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml + + +oXuNum=2 # numbers of O-RU connected to O-DU +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./config_file_o_du_0.dat #O-RU0 +oXuCfgFile1=./config_file_o_du_1.dat #O-RU1 + +#O-XU 0 +#PciBusAddoXu0Vf0=0000:51:01.0 +#PciBusAddoXu0Vf1=0000:51:01.1 +#PciBusAddoXu0Vf2=0000:51:01.2 +#PciBusAddoXu0Vf3=0000:51:01.3 + +#O-XU 1 +#PciBusAddoXu1Vf0=0000:51:01.4 +#PciBusAddoXu1Vf1=0000:51:01.5 +#PciBusAddoXu1Vf2=0000:51:01.6 +#PciBusAddoXu1Vf3=0000:51:01.7 + +#O-XU 2 +#PciBusAddoXu2Vf0=0000:51:02.0 +#PciBusAddoXu2Vf1=0000:51:02.1 +#PciBusAddoXu2Vf2=0000:51:02.2 +#PciBusAddoXu2Vf3=0000:51:02.3 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# #remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +#remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +#remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 + diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/201/usecase_ru.cfg b/fhi_lib/app/usecase/cat_a/mu1_100mhz/202/usecase_ru.cfg similarity index 88% rename from fhi_lib/app/usecase/cat_a/mu3_100mhz/201/usecase_ru.cfg rename to fhi_lib/app/usecase/cat_a/mu1_100mhz/202/usecase_ru.cfg index d0136a5..6200ecb 100644 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/201/usecase_ru.cfg +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/202/usecase_ru.cfg @@ -22,12 +22,12 @@ ioCore=15 # core id ioWorker=0x800000000 # mask [0- no workers] oXuNum=2 # numbers of O-RU connected to O-DU - oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs -oXuCfgFile0=./mu3_config_file_o_ru.dat #O-RU0 -oXuCfgFile1=./mu1_config_file_o_ru.dat #O-RU1 +oXuCfgFile0=./config_file_o_ru_0.dat #O-RU0 +oXuCfgFile1=./config_file_o_ru_1.dat #O-RU1 #O-XU 0 #PciBusAddoXu0Vf0=0000:51:11.0 diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..7c34e7e --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 3 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..7c34e7e --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 3 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/config_file_o_du_0.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/config_file_o_du_0.dat new file mode 100644 index 0000000..71779af --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/config_file_o_du_0.dat @@ -0,0 +1,167 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU(0) | RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antC2=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +#antC3=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/config_file_o_du_1.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/config_file_o_du_1.dat new file mode 100644 index 0000000..32d5b7e --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/config_file_o_du_1.dat @@ -0,0 +1,167 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU(0) | RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +#antC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/config_file_o_du_2.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/config_file_o_du_2.dat new file mode 100644 index 0000000..3c0406d --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/config_file_o_du_2.dat @@ -0,0 +1,167 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU(0) | RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +#antC2=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antC3=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU +Tadv_cp_dl=125 # in us +# C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/config_file_o_ru_0.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/config_file_o_ru_0.dat new file mode 100644 index 0000000..204bed5 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/config_file_o_ru_0.dat @@ -0,0 +1,183 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=15 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antC2=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +#antC3=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +antPrachC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antPrachC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antPrachC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +#antPrachC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antPrachC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antPrachC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antPrachC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antPrachC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antPrachC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antPrachC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antPrachC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antPrachC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antPrachC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antPrachC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antPrachC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/config_file_o_ru_1.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/config_file_o_ru_1.dat new file mode 100644 index 0000000..d29143f --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/config_file_o_ru_1.dat @@ -0,0 +1,183 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=15 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +#antC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +antPrachC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antPrachC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antPrachC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +#antPrachC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antPrachC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antPrachC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antPrachC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antPrachC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antPrachC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antPrachC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antPrachC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antPrachC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antPrachC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antPrachC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antPrachC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/config_file_o_ru_2.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/config_file_o_ru_2.dat new file mode 100644 index 0000000..02756f6 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/config_file_o_ru_2.dat @@ -0,0 +1,183 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=15 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +#antC2=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antC3=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +antPrachC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antPrachC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antPrachC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +#antPrachC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antPrachC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antPrachC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antPrachC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antPrachC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antPrachC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antPrachC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antPrachC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antPrachC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antPrachC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antPrachC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antPrachC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/usecase_du.cfg b/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/usecase_du.cfg new file mode 100644 index 0000000..489d02a --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/usecase_du.cfg @@ -0,0 +1,75 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ +# This is simple configuration file. Use '#' sign for comments +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +ioCore=5 # core id +ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml + +dpdkMemorySize=8192 #18432 +iovaMode=0 + +oXuNum=3 # numbers of O-RU connected to O-DU +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./config_file_o_du_0.dat #O-RU0 +oXuCfgFile1=./config_file_o_du_1.dat #O-RU1 +oXuCfgFile2=./config_file_o_du_2.dat #O-RU2 + +#O-XU 0 +#PciBusAddoXu0Vf0=0000:51:01.0 +#PciBusAddoXu0Vf1=0000:51:01.1 +#PciBusAddoXu0Vf2=0000:51:01.2 +#PciBusAddoXu0Vf3=0000:51:01.3 + +#O-XU 1 +#PciBusAddoXu1Vf0=0000:51:01.4 +#PciBusAddoXu1Vf1=0000:51:01.5 +#PciBusAddoXu1Vf2=0000:51:01.6 +#PciBusAddoXu1Vf3=0000:51:01.7 + +#O-XU 2 +#PciBusAddoXu2Vf0=0000:51:02.0 +#PciBusAddoXu2Vf1=0000:51:02.1 +#PciBusAddoXu2Vf2=0000:51:02.2 +#PciBusAddoXu2Vf3=0000:51:02.3 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# #remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +#remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +#remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/usecase_ru.cfg b/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/usecase_ru.cfg new file mode 100644 index 0000000..abd02cd --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/203/usecase_ru.cfg @@ -0,0 +1,73 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ +# This is simple configuration file. Use '#' sign for comments +appMode=1 # All O-DU(0) | O-RU(1) +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +ioCore=15 # core id +ioWorker=0x800000000 # mask [0- no workers] + +dpdkMemorySize=8192 #18432 +iovaMode=0 + +oXuNum=3 # numbers of O-RU connected to O-DU +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./config_file_o_ru_0.dat #O-RU0 +oXuCfgFile1=./config_file_o_ru_1.dat #O-RU1 +oXuCfgFile2=./config_file_o_ru_2.dat #O-RU2 + +#O-XU 0 +#PciBusAddoXu0Vf0=0000:51:11.0 +#PciBusAddoXu0Vf1=0000:51:11.1 +#PciBusAddoXu0Vf2=0000:51:11.2 +#PciBusAddoXu0Vf3=0000:51:11.3 + +#O-XU 1 +#PciBusAddoXu1Vf0=0000:51:11.4 +#PciBusAddoXu1Vf1=0000:51:11.5 +#PciBusAddoXu1Vf2=0000:51:11.6 +#PciBusAddoXu1Vf3=0000:51:11.7 + +#O-XU 2 +#PciBusAddoXu2Vf0=0000:51:12.0 +#PciBusAddoXu2Vf1=0000:51:12.1 +#PciBusAddoXu2Vf2=0000:51:12.2 +#PciBusAddoXu2Vf3=0000:51:12.3 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:00 +oXuRem0Mac1=00:11:22:33:00:10 +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:20 +oXuRem0Mac3=00:11:22:33:00:30 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:00 +oXuRem1Mac1=00:11:22:33:01:10 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:20 +oXuRem1Mac3=00:11:22:33:01:30 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:00 +oXuRem2Mac1=00:11:22:33:02:10 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:20 +oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..ad68b78 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 4 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..ad68b78 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 4 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/config_file_o_du_0.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/config_file_o_du_0.dat new file mode 100644 index 0000000..71779af --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/config_file_o_du_0.dat @@ -0,0 +1,167 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU(0) | RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antC2=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +#antC3=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/config_file_o_du_1.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/config_file_o_du_1.dat new file mode 100644 index 0000000..32d5b7e --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/config_file_o_du_1.dat @@ -0,0 +1,167 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU(0) | RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +#antC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/config_file_o_du_2.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/config_file_o_du_2.dat new file mode 100644 index 0000000..3c0406d --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/config_file_o_du_2.dat @@ -0,0 +1,167 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU(0) | RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +#antC2=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antC3=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU +Tadv_cp_dl=125 # in us +# C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/config_file_o_du_3.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/config_file_o_du_3.dat new file mode 100644 index 0000000..32d5b7e --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/config_file_o_du_3.dat @@ -0,0 +1,167 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU(0) | RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +#antC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/config_file_o_ru_0.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/config_file_o_ru_0.dat new file mode 100644 index 0000000..204bed5 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/config_file_o_ru_0.dat @@ -0,0 +1,183 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=15 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antC2=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +#antC3=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +antPrachC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antPrachC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antPrachC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +#antPrachC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antPrachC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antPrachC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antPrachC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antPrachC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antPrachC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antPrachC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antPrachC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antPrachC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antPrachC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antPrachC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antPrachC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/config_file_o_ru_1.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/config_file_o_ru_1.dat new file mode 100644 index 0000000..d29143f --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/config_file_o_ru_1.dat @@ -0,0 +1,183 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=15 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +#antC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +antPrachC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antPrachC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antPrachC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +#antPrachC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antPrachC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antPrachC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antPrachC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antPrachC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antPrachC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antPrachC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antPrachC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antPrachC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antPrachC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antPrachC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antPrachC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/config_file_o_ru_2.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/config_file_o_ru_2.dat new file mode 100644 index 0000000..02756f6 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/config_file_o_ru_2.dat @@ -0,0 +1,183 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=15 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +#antC2=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antC3=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +antPrachC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antPrachC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antPrachC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +#antPrachC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antPrachC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antPrachC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antPrachC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antPrachC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antPrachC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antPrachC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antPrachC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antPrachC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antPrachC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antPrachC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antPrachC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/config_file_o_ru_3.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/config_file_o_ru_3.dat new file mode 100644 index 0000000..d29143f --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/config_file_o_ru_3.dat @@ -0,0 +1,183 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=15 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +#antC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +antPrachC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antPrachC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antPrachC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +#antPrachC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antPrachC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antPrachC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antPrachC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antPrachC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antPrachC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antPrachC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antPrachC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antPrachC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antPrachC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antPrachC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antPrachC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/usecase_du.cfg b/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/usecase_du.cfg new file mode 100644 index 0000000..cf03f0d --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/usecase_du.cfg @@ -0,0 +1,82 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ +# This is simple configuration file. Use '#' sign for comments +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +ioCore=5 # core id +ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml + +dpdkMemorySize=10240 +iovaMode=0 + +oXuNum=4 # numbers of O-RU connected to O-DU +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./config_file_o_du_0.dat #O-RU0 +oXuCfgFile1=./config_file_o_du_1.dat #O-RU1 +oXuCfgFile2=./config_file_o_du_2.dat #O-RU2 +oXuCfgFile3=./config_file_o_du_3.dat #O-RU3 + +#O-XU 0 +#PciBusAddoXu0Vf0=0000:51:01.0 +#PciBusAddoXu0Vf1=0000:51:01.1 +#PciBusAddoXu0Vf2=0000:51:01.2 +#PciBusAddoXu0Vf3=0000:51:01.3 + +#O-XU 1 +#PciBusAddoXu1Vf0=0000:51:01.4 +#PciBusAddoXu1Vf1=0000:51:01.5 +#PciBusAddoXu1Vf2=0000:51:01.6 +#PciBusAddoXu1Vf3=0000:51:01.7 + +#O-XU 2 +#PciBusAddoXu2Vf0=0000:51:02.0 +#PciBusAddoXu2Vf1=0000:51:02.1 +#PciBusAddoXu2Vf2=0000:51:02.2 +#PciBusAddoXu2Vf3=0000:51:02.3 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# #remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +#remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +#remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 + +#remote O-XU 3 Eth Link 0 +oXuRem3Mac0=00:11:22:33:03:01 +oXuRem3Mac1=00:11:22:33:03:11 +#remote O-XU 3 Eth Link 1 +oXuRem3Mac2=00:11:22:33:03:21 +oXuRem3Mac3=00:11:22:33:03:31 diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/usecase_ru.cfg b/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/usecase_ru.cfg new file mode 100644 index 0000000..b292a0f --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/204/usecase_ru.cfg @@ -0,0 +1,83 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ +# This is simple configuration file. Use '#' sign for comments +appMode=1 # All O-DU(0) | O-RU(1) +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +mainCore=20 #core for main() +systemCore=21 +ioCore=22 # core id +ioWorker=0x4000000000000000 # mask [0- no workers] + +dpdkMemorySize=10240 +iovaMode=0 + +oXuNum=4 # numbers of O-RU connected to O-DU +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./config_file_o_ru_0.dat #O-RU0 +oXuCfgFile1=./config_file_o_ru_1.dat #O-RU1 +oXuCfgFile2=./config_file_o_ru_2.dat #O-RU2 +oXuCfgFile3=./config_file_o_ru_3.dat #O-RU3 + +#O-XU 0 +#PciBusAddoXu0Vf0=0000:51:11.0 +#PciBusAddoXu0Vf1=0000:51:11.1 +#PciBusAddoXu0Vf2=0000:51:11.2 +#PciBusAddoXu0Vf3=0000:51:11.3 + +#O-XU 1 +#PciBusAddoXu1Vf0=0000:51:11.4 +#PciBusAddoXu1Vf1=0000:51:11.5 +#PciBusAddoXu1Vf2=0000:51:11.6 +#PciBusAddoXu1Vf3=0000:51:11.7 + +#O-XU 2 +#PciBusAddoXu2Vf0=0000:51:12.0 +#PciBusAddoXu2Vf1=0000:51:12.1 +#PciBusAddoXu2Vf2=0000:51:12.2 +#PciBusAddoXu2Vf3=0000:51:12.3 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:00 +oXuRem0Mac1=00:11:22:33:00:10 +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:20 +oXuRem0Mac3=00:11:22:33:00:30 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:00 +oXuRem1Mac1=00:11:22:33:01:10 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:20 +oXuRem1Mac3=00:11:22:33:01:30 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:00 +oXuRem2Mac1=00:11:22:33:02:10 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:20 +oXuRem2Mac3=00:11:22:33:02:30 + +# remote O-XU 3 Eth Link 0 +oXuRem3Mac0=00:11:22:33:03:00 +oXuRem3Mac1=00:11:22:33:03:10 +# remote O-XU 3 Eth Link 1 +oXuRem3Mac2=00:11:22:33:03:20 +oXuRem3Mac3=00:11:22:33:03:30 \ No newline at end of file diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/3/config_file_o_du.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/3/config_file_o_du.dat index a5ab347..12bc09e 100644 --- a/fhi_lib/app/usecase/cat_a/mu1_100mhz/3/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/3/config_file_o_du.dat @@ -85,7 +85,7 @@ antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index ########################################################### diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/3/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/3/config_file_o_ru.dat index e37b8af..72738dc 100644 --- a/fhi_lib/app/usecase/cat_a/mu1_100mhz/3/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/3/config_file_o_ru.dat @@ -102,7 +102,7 @@ antPrachC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 antPrachC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 antPrachC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index ########################################################### diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/3/usecase_du.cfg b/fhi_lib/app/usecase/cat_a/mu1_100mhz/3/usecase_du.cfg index 5c067f4..12d06c3 100644 --- a/fhi_lib/app/usecase/cat_a/mu1_100mhz/3/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/3/usecase_du.cfg @@ -20,6 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/201/mu1_config_file_o_du.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/401/config_file_o_du.dat similarity index 61% rename from fhi_lib/app/usecase/cat_a/mu3_100mhz/201/mu1_config_file_o_du.dat rename to fhi_lib/app/usecase/cat_a/mu1_100mhz/401/config_file_o_du.dat index 1b1fb09..1594eac 100644 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/201/mu1_config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/401/config_file_o_du.dat @@ -16,13 +16,12 @@ # #******************************************************************************/ - # This is simple configuration file. Use '#' sign for comments instanceId=0 # 0,1,2,... in case more than 1 application started on the same system appMode=0 # O-DU(0) | RU(1) xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) -antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B ##Numerology mu=1 #30Khz Sub Carrier Spacing @@ -37,17 +36,12 @@ nDLFftSize=4096 nULFftSize=4096 nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) @@ -56,68 +50,66 @@ Gps_Beta=0 ioCore=5 # Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app numSlots=20 #number of slots per IQ files antC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 antC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 antC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 antC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 -antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 -antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 -antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 -antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 -antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 -antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 -antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 - -rachEanble=1 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=159 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index ########################################################### ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=8 -max_sections_per_symbol=8 -nPrbElemDl=1 +nPrbElemDl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams -PrbElemDl0=0,273,0,14,0,0,0,16,0 -PrbElemDl1=36,36,0,14,2,1,0,16,1 -PrbElemDl2=72,36,0,14,3,1,0,16,1 -PrbElemDl3=108,36,0,14,4,1,0,16,1 -PrbElemDl4=144,36,0,14,5,1,0,16,1 -PrbElemDl5=180,36,0,14,6,1,0,16,1 -PrbElemDl6=216,36,0,14,7,1,0,16,1 -PrbElemDl7=252,21,0,14,8,1,0,16,1 +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 nPrbElemUl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams -PrbElemUl0=0,136,0,14,0,0,0,16,0 -PrbElemUl1=136,137,0,14,0,0,0,16,0 -PrbElemUl2=72,36,0,14,3,1,0,16,1 -PrbElemUl3=108,36,0,14,4,1,0,16,1 -PrbElemUl4=144,36,0,14,5,1,0,16,1 -PrbElemUl5=180,36,0,14,6,1,0,16,1 -PrbElemUl6=216,36,0,14,7,1,0,16,1 -PrbElemUl7=252,21,0,14,8,1,0,16,1 +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 ########################################################### @@ -135,42 +127,42 @@ CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled ##O-RU Settings totalBFWeights=32 # Total number of Beamforming Weights on RU -Tadv_cp_dl=25 # in us +Tadv_cp_dl=125 # in us # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages #Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us #Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us #Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us #Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us +Ta3_min=50 # in us +Ta3_max=171 # in us ########################################################### ##O-DU Settings #C-plane #Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=392 +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 ##Transmission Window Fast C-plane UL T1a_min_cp_ul=285 -T1a_max_cp_ul=300 +T1a_max_cp_ul=336 #U-plane ##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us #Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us +Ta4_min=50 # in us +Ta4_max=331 # in us ########################################################### diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/201/mu1_config_file_o_ru.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/401/config_file_o_ru.dat similarity index 56% rename from fhi_lib/app/usecase/cat_a/mu3_100mhz/201/mu1_config_file_o_ru.dat rename to fhi_lib/app/usecase/cat_a/mu1_100mhz/401/config_file_o_ru.dat index 9a3c574..0bf0e81 100644 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/201/mu1_config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/401/config_file_o_ru.dat @@ -16,13 +16,12 @@ # #******************************************************************************/ - # This is simple configuration file. Use '#' sign for comments instanceId=1 # 0,1,2,... in case more than 1 application started on the same system appMode=1 # O-DU(0) | O-RU(1) xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) -antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B ##Numerology mu=1 #30Khz Sub Carrier Spacing @@ -37,17 +36,12 @@ nDLFftSize=4096 nULFftSize=4096 nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) @@ -56,85 +50,83 @@ Gps_Beta=0 ioCore=10 # Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app numSlots=20 #number of slots per IQ files antC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 antC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 antC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 antC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 -antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 -antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 -antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 -antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 -antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 -antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 -antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 antPrachC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 antPrachC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 antPrachC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 antPrachC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 -antPrachC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 -antPrachC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 -antPrachC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 -antPrachC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 -antPrachC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 -antPrachC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 -antPrachC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 - -rachEanble=1 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=159 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index +#antPrachC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antPrachC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antPrachC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antPrachC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antPrachC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antPrachC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antPrachC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antPrachC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antPrachC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antPrachC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antPrachC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index ########################################################### ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=8 -max_sections_per_symbol=8 -nPrbElemDl=1 +nPrbElemDl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams -PrbElemDl0=0,273,0,14,0,0,0,16,0 -PrbElemDl1=36,36,0,14,2,1,0,16,1 -PrbElemDl2=72,36,0,14,3,1,0,16,1 -PrbElemDl3=108,36,0,14,4,1,0,16,1 -PrbElemDl4=144,36,0,14,5,1,0,16,1 -PrbElemDl5=180,36,0,14,6,1,0,16,1 -PrbElemDl6=216,36,0,14,7,1,0,16,1 -PrbElemDl7=252,21,0,14,8,1,0,16,1 +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 nPrbElemUl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams -PrbElemUl0=0,136,0,14,0,0,0,16,0 -PrbElemUl1=136,137,0,14,0,0,0,16,0 -PrbElemUl2=72,36,0,14,3,1,0,16,1 -PrbElemUl3=108,36,0,14,4,1,0,16,1 -PrbElemUl4=144,36,0,14,5,1,0,16,1 -PrbElemUl5=180,36,0,14,6,1,0,16,1 -PrbElemUl6=216,36,0,14,7,1,0,16,1 -PrbElemUl7=252,21,0,14,8,1,0,16,1 +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 ########################################################### @@ -147,45 +139,45 @@ debugStop=1 #stop app on 1pps boundary (gps_second % 30) debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled ##O-RU Settings -Tadv_cp_dl=25 # in us +Tadv_cp_dl=125 # in us # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages #Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=392 # 428.12us +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us #Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us #Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us #Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us +Ta3_min=50 # in us +Ta3_max=171 # in us ########################################################### ##O-DU Settings #C-plane #Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=392 +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 ##Transmission Window Fast C-plane UL T1a_min_cp_ul=285 -T1a_max_cp_ul=300 +T1a_max_cp_ul=336 #U-plane ##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us #Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us +Ta4_min=50 # in us +Ta4_max=331 # in us ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/111/usecase_du.cfg b/fhi_lib/app/usecase/cat_a/mu1_100mhz/401/usecase_du.cfg similarity index 98% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/111/usecase_du.cfg rename to fhi_lib/app/usecase/cat_a/mu1_100mhz/401/usecase_du.cfg index 5c067f4..12d06c3 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/111/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/401/usecase_du.cfg @@ -20,6 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/401/usecase_ru.cfg b/fhi_lib/app/usecase/cat_a/mu1_100mhz/401/usecase_ru.cfg new file mode 100644 index 0000000..a400176 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/401/usecase_ru.cfg @@ -0,0 +1,69 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ +# This is simple configuration file. Use '#' sign for comments +appMode=1 # All O-DU(0) | O-RU(1) +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +ioCore=15 # core id +ioWorker=0x800000000 # mask [0- no workers] + +oXuNum=1 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./config_file_o_ru.dat #O-RU0 + +#O-XU 0 +#PciBusAddoXu0Vf0=0000:51:11.0 +#PciBusAddoXu0Vf1=0000:51:11.1 +#PciBusAddoXu0Vf2=0000:51:11.2 +#PciBusAddoXu0Vf3=0000:51:11.3 + +#O-XU 1 +#PciBusAddoXu1Vf0=0000:51:11.4 +#PciBusAddoXu1Vf1=0000:51:11.5 +#PciBusAddoXu1Vf2=0000:51:11.6 +#PciBusAddoXu1Vf3=0000:51:11.7 + +#O-XU 2 +#PciBusAddoXu2Vf0=0000:51:12.0 +#PciBusAddoXu2Vf1=0000:51:12.1 +#PciBusAddoXu2Vf2=0000:51:12.2 +#PciBusAddoXu2Vf3=0000:51:12.3 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:00 +oXuRem0Mac1=00:11:22:33:00:10 +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:20 +oXuRem0Mac3=00:11:22:33:00:30 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:00 +oXuRem1Mac1=00:11:22:33:01:10 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:20 +oXuRem1Mac3=00:11:22:33:01:30 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:00 +oXuRem2Mac1=00:11:22:33:02:10 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:20 +oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/402/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_a/mu1_100mhz/402/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..9ff6cfe --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/402/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 2 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/402/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_a/mu1_100mhz/402/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..9ff6cfe --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/402/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 2 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/402/config_file_o_du_0.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/402/config_file_o_du_0.dat new file mode 100644 index 0000000..5f6c3b5 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/402/config_file_o_du_0.dat @@ -0,0 +1,167 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU(0) | RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +antC2=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antC3=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/402/config_file_o_du_1.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/402/config_file_o_du_1.dat new file mode 100644 index 0000000..d8aeb05 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/402/config_file_o_du_1.dat @@ -0,0 +1,167 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU(0) | RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +antC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/402/config_file_o_ru_0.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/402/config_file_o_ru_0.dat new file mode 100644 index 0000000..d947593 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/402/config_file_o_ru_0.dat @@ -0,0 +1,183 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=15 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +antC2=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antC3=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +antPrachC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antPrachC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +antPrachC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antPrachC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antPrachC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antPrachC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antPrachC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antPrachC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antPrachC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antPrachC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antPrachC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antPrachC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antPrachC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antPrachC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antPrachC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/402/config_file_o_ru_1.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/402/config_file_o_ru_1.dat new file mode 100644 index 0000000..b7bf81b --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/402/config_file_o_ru_1.dat @@ -0,0 +1,183 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=15 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +antC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +antPrachC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antPrachC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +antPrachC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antPrachC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antPrachC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antPrachC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antPrachC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antPrachC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antPrachC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antPrachC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antPrachC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antPrachC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antPrachC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antPrachC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antPrachC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/201/usecase_du.cfg b/fhi_lib/app/usecase/cat_a/mu1_100mhz/402/usecase_du.cfg similarity index 85% rename from fhi_lib/app/usecase/cat_a/mu3_100mhz/201/usecase_du.cfg rename to fhi_lib/app/usecase/cat_a/mu1_100mhz/402/usecase_du.cfg index 3d005c4..d4e45eb 100644 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/201/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/402/usecase_du.cfg @@ -20,14 +20,15 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml oXuNum=2 # numbers of O-RU connected to O-DU - oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs -oXuCfgFile0=./mu3_config_file_o_du.dat #O-DU0 -oXuCfgFile1=./mu1_config_file_o_du.dat #O-DU1 +oXuCfgFile0=./config_file_o_du_0.dat #O-RU0 +oXuCfgFile1=./config_file_o_du_1.dat #O-RU1 #O-XU 0 #PciBusAddoXu0Vf0=0000:51:01.0 @@ -54,16 +55,17 @@ oXuRem0Mac1=00:11:22:33:00:11 oXuRem0Mac2=00:11:22:33:00:21 oXuRem0Mac3=00:11:22:33:00:31 -# remote O-XU 1 Eth Link 0 +# #remote O-XU 1 Eth Link 0 oXuRem1Mac0=00:11:22:33:01:01 oXuRem1Mac1=00:11:22:33:01:11 # remote O-XU 1 Eth Link 1 oXuRem1Mac2=00:11:22:33:01:21 oXuRem1Mac3=00:11:22:33:01:31 -# remote O-XU 2 Eth Link 0 +#remote O-XU 2 Eth Link 0 oXuRem2Mac0=00:11:22:33:02:01 oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 +#remote O-XU 2 Eth Link 1 oXuRem2Mac2=00:11:22:33:02:21 oXuRem2Mac3=00:11:22:33:02:31 + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/402/usecase_ru.cfg b/fhi_lib/app/usecase/cat_a/mu1_100mhz/402/usecase_ru.cfg new file mode 100644 index 0000000..6200ecb --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/402/usecase_ru.cfg @@ -0,0 +1,69 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ +# This is simple configuration file. Use '#' sign for comments +appMode=1 # All O-DU(0) | O-RU(1) +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +ioCore=15 # core id +ioWorker=0x800000000 # mask [0- no workers] + +oXuNum=2 # numbers of O-RU connected to O-DU +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./config_file_o_ru_0.dat #O-RU0 +oXuCfgFile1=./config_file_o_ru_1.dat #O-RU1 + +#O-XU 0 +#PciBusAddoXu0Vf0=0000:51:11.0 +#PciBusAddoXu0Vf1=0000:51:11.1 +#PciBusAddoXu0Vf2=0000:51:11.2 +#PciBusAddoXu0Vf3=0000:51:11.3 + +#O-XU 1 +#PciBusAddoXu1Vf0=0000:51:11.4 +#PciBusAddoXu1Vf1=0000:51:11.5 +#PciBusAddoXu1Vf2=0000:51:11.6 +#PciBusAddoXu1Vf3=0000:51:11.7 + +#O-XU 2 +#PciBusAddoXu2Vf0=0000:51:12.0 +#PciBusAddoXu2Vf1=0000:51:12.1 +#PciBusAddoXu2Vf2=0000:51:12.2 +#PciBusAddoXu2Vf3=0000:51:12.3 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:00 +oXuRem0Mac1=00:11:22:33:00:10 +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:20 +oXuRem0Mac3=00:11:22:33:00:30 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:00 +oXuRem1Mac1=00:11:22:33:01:10 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:20 +oXuRem1Mac3=00:11:22:33:01:30 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:00 +oXuRem2Mac1=00:11:22:33:02:10 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:20 +oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..7c34e7e --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 3 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..7c34e7e --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 3 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/config_file_o_du_0.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/config_file_o_du_0.dat new file mode 100644 index 0000000..5f6c3b5 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/config_file_o_du_0.dat @@ -0,0 +1,167 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU(0) | RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +antC2=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antC3=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/config_file_o_du_1.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/config_file_o_du_1.dat new file mode 100644 index 0000000..d8aeb05 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/config_file_o_du_1.dat @@ -0,0 +1,167 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU(0) | RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +antC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/config_file_o_du_2.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/config_file_o_du_2.dat new file mode 100644 index 0000000..6c97a1e --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/config_file_o_du_2.dat @@ -0,0 +1,167 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU(0) | RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antC2=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +antC3=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU +Tadv_cp_dl=125 # in us +# C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/config_file_o_ru_0.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/config_file_o_ru_0.dat new file mode 100644 index 0000000..d947593 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/config_file_o_ru_0.dat @@ -0,0 +1,183 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=15 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +antC2=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antC3=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +antPrachC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antPrachC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +antPrachC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antPrachC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antPrachC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antPrachC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antPrachC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antPrachC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antPrachC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antPrachC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antPrachC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antPrachC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antPrachC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antPrachC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antPrachC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/config_file_o_ru_1.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/config_file_o_ru_1.dat new file mode 100644 index 0000000..b7bf81b --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/config_file_o_ru_1.dat @@ -0,0 +1,183 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=15 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +antC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +antPrachC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antPrachC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +antPrachC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antPrachC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antPrachC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antPrachC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antPrachC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antPrachC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antPrachC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antPrachC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antPrachC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antPrachC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antPrachC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antPrachC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antPrachC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/config_file_o_ru_2.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/config_file_o_ru_2.dat new file mode 100644 index 0000000..f3c06a3 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/config_file_o_ru_2.dat @@ -0,0 +1,183 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=15 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antC2=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +antC3=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +antPrachC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antPrachC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +antPrachC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antPrachC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antPrachC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antPrachC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antPrachC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antPrachC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antPrachC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antPrachC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antPrachC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antPrachC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antPrachC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antPrachC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antPrachC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/usecase_du.cfg b/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/usecase_du.cfg new file mode 100644 index 0000000..8651e6b --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/usecase_du.cfg @@ -0,0 +1,75 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ +# This is simple configuration file. Use '#' sign for comments +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +ioCore=5 # core id +ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml + +dpdkMemorySize=8192 +iovaMode=0 + +oXuNum=3 # numbers of O-RU connected to O-DU +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./config_file_o_du_0.dat #O-RU0 +oXuCfgFile1=./config_file_o_du_1.dat #O-RU1 +oXuCfgFile2=./config_file_o_du_2.dat #O-RU2 + +#O-XU 0 +#PciBusAddoXu0Vf0=0000:51:01.0 +#PciBusAddoXu0Vf1=0000:51:01.1 +#PciBusAddoXu0Vf2=0000:51:01.2 +#PciBusAddoXu0Vf3=0000:51:01.3 + +#O-XU 1 +#PciBusAddoXu1Vf0=0000:51:01.4 +#PciBusAddoXu1Vf1=0000:51:01.5 +#PciBusAddoXu1Vf2=0000:51:01.6 +#PciBusAddoXu1Vf3=0000:51:01.7 + +#O-XU 2 +#PciBusAddoXu2Vf0=0000:51:02.0 +#PciBusAddoXu2Vf1=0000:51:02.1 +#PciBusAddoXu2Vf2=0000:51:02.2 +#PciBusAddoXu2Vf3=0000:51:02.3 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# #remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +#remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +#remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/usecase_ru.cfg b/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/usecase_ru.cfg new file mode 100644 index 0000000..09e13be --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/403/usecase_ru.cfg @@ -0,0 +1,76 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ +# This is simple configuration file. Use '#' sign for comments +appMode=1 # All O-DU(0) | O-RU(1) +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +mainCore=20 #core for main() +systemCore=21 +ioCore=22 # core id + +ioWorker=0x4000000000000000 # mask [0- no workers] + +dpdkMemorySize=16384 +iovaMode=0 + +oXuNum=3 # numbers of O-RU connected to O-DU +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./config_file_o_ru_0.dat #O-RU0 +oXuCfgFile1=./config_file_o_ru_1.dat #O-RU1 +oXuCfgFile2=./config_file_o_ru_2.dat #O-RU2 + +#O-XU 0 +#PciBusAddoXu0Vf0=0000:51:11.0 +#PciBusAddoXu0Vf1=0000:51:11.1 +#PciBusAddoXu0Vf2=0000:51:11.2 +#PciBusAddoXu0Vf3=0000:51:11.3 + +#O-XU 1 +#PciBusAddoXu1Vf0=0000:51:11.4 +#PciBusAddoXu1Vf1=0000:51:11.5 +#PciBusAddoXu1Vf2=0000:51:11.6 +#PciBusAddoXu1Vf3=0000:51:11.7 + +#O-XU 2 +#PciBusAddoXu2Vf0=0000:51:12.0 +#PciBusAddoXu2Vf1=0000:51:12.1 +#PciBusAddoXu2Vf2=0000:51:12.2 +#PciBusAddoXu2Vf3=0000:51:12.3 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:00 +oXuRem0Mac1=00:11:22:33:00:10 +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:20 +oXuRem0Mac3=00:11:22:33:00:30 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:00 +oXuRem1Mac1=00:11:22:33:01:10 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:20 +oXuRem1Mac3=00:11:22:33:01:30 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:00 +oXuRem2Mac1=00:11:22:33:02:10 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:20 +oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..ab4426e --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 6 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 4 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..ad68b78 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 4 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/config_file_o_du_0.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/config_file_o_du_0.dat new file mode 100644 index 0000000..5f6c3b5 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/config_file_o_du_0.dat @@ -0,0 +1,167 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU(0) | RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +antC2=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antC3=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/config_file_o_du_1.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/config_file_o_du_1.dat new file mode 100644 index 0000000..d8aeb05 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/config_file_o_du_1.dat @@ -0,0 +1,167 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU(0) | RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +antC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/config_file_o_du_2.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/config_file_o_du_2.dat new file mode 100644 index 0000000..6c97a1e --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/config_file_o_du_2.dat @@ -0,0 +1,167 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU(0) | RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antC2=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +antC3=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU +Tadv_cp_dl=125 # in us +# C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/config_file_o_du_3.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/config_file_o_du_3.dat new file mode 100644 index 0000000..d8aeb05 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/config_file_o_du_3.dat @@ -0,0 +1,167 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU(0) | RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +antC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/config_file_o_ru_0.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/config_file_o_ru_0.dat new file mode 100644 index 0000000..d947593 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/config_file_o_ru_0.dat @@ -0,0 +1,183 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=15 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +antC2=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antC3=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +antPrachC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antPrachC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +antPrachC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antPrachC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antPrachC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antPrachC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antPrachC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antPrachC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antPrachC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antPrachC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antPrachC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antPrachC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antPrachC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antPrachC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antPrachC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/config_file_o_ru_1.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/config_file_o_ru_1.dat new file mode 100644 index 0000000..b7bf81b --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/config_file_o_ru_1.dat @@ -0,0 +1,183 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=15 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +antC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +antPrachC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antPrachC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +antPrachC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antPrachC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antPrachC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antPrachC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antPrachC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antPrachC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antPrachC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antPrachC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antPrachC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antPrachC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antPrachC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antPrachC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antPrachC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/config_file_o_ru_2.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/config_file_o_ru_2.dat new file mode 100644 index 0000000..f3c06a3 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/config_file_o_ru_2.dat @@ -0,0 +1,183 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=15 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antC2=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +antC3=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +antPrachC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antPrachC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +antPrachC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antPrachC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antPrachC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antPrachC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antPrachC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antPrachC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antPrachC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antPrachC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antPrachC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antPrachC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antPrachC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antPrachC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antPrachC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/config_file_o_ru_3.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/config_file_o_ru_3.dat new file mode 100644 index 0000000..b7bf81b --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/config_file_o_ru_3.dat @@ -0,0 +1,183 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=15 +# Eth 0 +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app + +#Eth 1 +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +antC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +antPrachC0=./usecase/cat_a/mu1_100mhz/ant_0.bin #CC0 +antPrachC1=./usecase/cat_a/mu1_100mhz/ant_1.bin #CC0 +antPrachC2=./usecase/cat_a/mu1_100mhz/ant_2.bin #CC0 +antPrachC3=./usecase/cat_a/mu1_100mhz/ant_3.bin #CC0 +#antPrachC4=./usecase/cat_a/mu1_100mhz/ant_4.bin #CC1 +#antPrachC5=./usecase/cat_a/mu1_100mhz/ant_5.bin #CC1 +#antPrachC6=./usecase/cat_a/mu1_100mhz/ant_6.bin #CC1 +#antPrachC7=./usecase/cat_a/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_a/mu1_100mhz/ant_8.bin #CC2 +#antPrachC9=./usecase/cat_a/mu1_100mhz/ant_9.bin #CC2 +#antPrachC10=./usecase/cat_a/mu1_100mhz/ant_10.bin #CC2 +#antPrachC11=./usecase/cat_a/mu1_100mhz/ant_11.bin #CC2 +#antPrachC12=./usecase/cat_a/mu1_100mhz/ant_12.bin #CC3 +#antPrachC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 +#antPrachC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 +#antPrachC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 + +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=147 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,137,0,14,0,0,0,16,0 +PrbElemDl1=137,136,0,14,0,0,0,16,0 +#PrbElemDl2=72,36,0,14,3,1,0,16,1 +#PrbElemDl3=108,36,0,14,4,1,0,16,1 +#PrbElemDl4=144,36,0,14,5,1,0,16,1 +#PrbElemDl5=180,36,0,14,6,1,0,16,1 +#PrbElemDl6=216,36,0,14,7,1,0,16,1 +#PrbElemDl7=252,21,0,14,8,1,0,16,1 + + +nPrbElemUl=2 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl1=137,136,0,14,0,0,0,16,0 +#PrbElemUl2=72,36,0,14,3,1,0,16,1 +#PrbElemUl3=108,36,0,14,4,1,0,16,1 +#PrbElemUl4=144,36,0,14,5,1,0,16,1 +#PrbElemUl5=180,36,0,14,6,1,0,16,1 +#PrbElemUl6=216,36,0,14,7,1,0,16,1 +#PrbElemUl7=252,21,0,14,8,1,0,16,1 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +Tadv_cp_dl=125 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=419 # 285.42us +T2a_max_cp_dl=470 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=125 # 285.42us +T2a_max_cp_ul=336 # 428.12us + +#Reception Window U-plane +T2a_min_up=134 # 71.35in us +T2a_max_up=345 # 428.12us + +#Transmission Window +Ta3_min=50 # in us +Ta3_max=171 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=419 +T1a_max_cp_dl=470 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=336 + +#U-plane +##Transmission Window +T1a_min_up=294 #71 + 25 us +T1a_max_up=345 #71 + 25 us + +#Reception Window +Ta4_min=50 # in us +Ta4_max=331 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/usecase_du.cfg b/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/usecase_du.cfg new file mode 100644 index 0000000..3be8fe2 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/usecase_du.cfg @@ -0,0 +1,82 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ +# This is simple configuration file. Use '#' sign for comments +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +ioCore=5 # core id +ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml + +dpdkMemorySize=16384 +iovaMode=0 + +oXuNum=4 # numbers of O-RU connected to O-DU +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./config_file_o_du_0.dat #O-RU0 +oXuCfgFile1=./config_file_o_du_1.dat #O-RU1 +oXuCfgFile2=./config_file_o_du_2.dat #O-RU2 +oXuCfgFile3=./config_file_o_du_3.dat #O-RU3 + +#O-XU 0 +#PciBusAddoXu0Vf0=0000:51:01.0 +#PciBusAddoXu0Vf1=0000:51:01.1 +#PciBusAddoXu0Vf2=0000:51:01.2 +#PciBusAddoXu0Vf3=0000:51:01.3 + +#O-XU 1 +#PciBusAddoXu1Vf0=0000:51:01.4 +#PciBusAddoXu1Vf1=0000:51:01.5 +#PciBusAddoXu1Vf2=0000:51:01.6 +#PciBusAddoXu1Vf3=0000:51:01.7 + +#O-XU 2 +#PciBusAddoXu2Vf0=0000:51:02.0 +#PciBusAddoXu2Vf1=0000:51:02.1 +#PciBusAddoXu2Vf2=0000:51:02.2 +#PciBusAddoXu2Vf3=0000:51:02.3 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# #remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +#remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +#remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 + +#remote O-XU 3 Eth Link 0 +oXuRem3Mac0=00:11:22:33:03:01 +oXuRem3Mac1=00:11:22:33:03:11 +#remote O-XU 3 Eth Link 1 +oXuRem3Mac2=00:11:22:33:03:21 +oXuRem3Mac3=00:11:22:33:03:31 diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/usecase_ru.cfg b/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/usecase_ru.cfg new file mode 100644 index 0000000..8984b75 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/404/usecase_ru.cfg @@ -0,0 +1,83 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ +# This is simple configuration file. Use '#' sign for comments +appMode=1 # All O-DU(0) | O-RU(1) +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +mainCore=20 #core for main() +systemCore=21 +ioCore=22 # core id +ioWorker=0x800000 # mask [0- no workers] + +dpdkMemorySize=16384 +iovaMode=0 + +oXuNum=4 # numbers of O-RU connected to O-DU +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./config_file_o_ru_0.dat #O-RU0 +oXuCfgFile1=./config_file_o_ru_1.dat #O-RU1 +oXuCfgFile2=./config_file_o_ru_2.dat #O-RU2 +oXuCfgFile3=./config_file_o_ru_3.dat #O-RU3 + +#O-XU 0 +#PciBusAddoXu0Vf0=0000:51:11.0 +#PciBusAddoXu0Vf1=0000:51:11.1 +#PciBusAddoXu0Vf2=0000:51:11.2 +#PciBusAddoXu0Vf3=0000:51:11.3 + +#O-XU 1 +#PciBusAddoXu1Vf0=0000:51:11.4 +#PciBusAddoXu1Vf1=0000:51:11.5 +#PciBusAddoXu1Vf2=0000:51:11.6 +#PciBusAddoXu1Vf3=0000:51:11.7 + +#O-XU 2 +#PciBusAddoXu2Vf0=0000:51:12.0 +#PciBusAddoXu2Vf1=0000:51:12.1 +#PciBusAddoXu2Vf2=0000:51:12.2 +#PciBusAddoXu2Vf3=0000:51:12.3 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:00 +oXuRem0Mac1=00:11:22:33:00:10 +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:20 +oXuRem0Mac3=00:11:22:33:00:30 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:00 +oXuRem1Mac1=00:11:22:33:01:10 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:20 +oXuRem1Mac3=00:11:22:33:01:30 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:00 +oXuRem2Mac1=00:11:22:33:02:10 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:20 +oXuRem2Mac3=00:11:22:33:02:30 + +# remote O-XU 3 Eth Link 0 +oXuRem3Mac0=00:11:22:33:03:00 +oXuRem3Mac1=00:11:22:33:03:10 +# remote O-XU 3 Eth Link 1 +oXuRem3Mac2=00:11:22:33:03:20 +oXuRem3Mac3=00:11:22:33:03:30 diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_a/mu1_100mhz/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_a/mu1_100mhz/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/config_file_o_du.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/config_file_o_du.dat index 865a361..2690868 100644 --- a/fhi_lib/app/usecase/cat_a/mu1_100mhz/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/config_file_o_du.dat @@ -85,7 +85,7 @@ antC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 antC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 antC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=159 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index prachCompMethod=0 prachiqWidth=16 @@ -109,10 +109,10 @@ PrbElemDl6=216,36,0,14,7,1,0,16,1 PrbElemDl7=252,21,0,14,8,1,0,16,1 -nPrbElemUl=2 +nPrbElemUl=1 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams -PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl0=0,273,0,14,0,0,0,16,0 PrbElemUl1=137,136,0,14,0,0,0,16,0 PrbElemUl2=72,36,0,14,3,1,0,16,1 PrbElemUl3=108,36,0,14,4,1,0,16,1 diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_a/mu1_100mhz/config_file_o_ru.dat index e7b87c9..d206ca9 100644 --- a/fhi_lib/app/usecase/cat_a/mu1_100mhz/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/config_file_o_ru.dat @@ -24,6 +24,7 @@ xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + ##Numerology mu=1 #30Khz Sub Carrier Spacing @@ -102,7 +103,7 @@ antPrachC13=./usecase/cat_a/mu1_100mhz/ant_13.bin #CC3 antPrachC14=./usecase/cat_a/mu1_100mhz/ant_14.bin #CC3 antPrachC15=./usecase/cat_a/mu1_100mhz/ant_15.bin #CC3 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=159 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index prachCompMethod=0 prachiqWidth=16 @@ -126,10 +127,10 @@ PrbElemDl6=216,36,0,14,7,1,0,16,1 PrbElemDl7=252,21,0,14,8,1,0,16,1 -nPrbElemUl=2 +nPrbElemUl=1 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams -PrbElemUl0=0,137,0,14,0,0,0,16,0 +PrbElemUl0=0,273,0,14,0,0,0,16,0 PrbElemUl1=137,136,0,14,0,0,0,16,0 PrbElemUl2=72,36,0,14,3,1,0,16,1 PrbElemUl3=108,36,0,14,4,1,0,16,1 diff --git a/fhi_lib/app/usecase/cat_a/mu1_100mhz/usecase_du.cfg b/fhi_lib/app/usecase/cat_a/mu1_100mhz/usecase_du.cfg index 5c067f4..84a7872 100644 --- a/fhi_lib/app/usecase/cat_a/mu1_100mhz/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_a/mu1_100mhz/usecase_du.cfg @@ -20,6 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/1/config_file_o_du.dat b/fhi_lib/app/usecase/cat_a/mu3_100mhz/1/config_file_o_du.dat index f3c3af6..ef9505a 100644 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/1/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_a/mu3_100mhz/1/config_file_o_du.dat @@ -103,7 +103,7 @@ antC13=./usecase/cat_a/mu3_100mhz/ant_13.bin #CC3 antC14=./usecase/cat_a/mu3_100mhz/ant_14.bin #CC3 antC15=./usecase/cat_a/mu3_100mhz/ant_15.bin #CC3 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=81 ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/1/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_a/mu3_100mhz/1/config_file_o_ru.dat index e8ea0a4..f0e0194 100644 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/1/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_a/mu3_100mhz/1/config_file_o_ru.dat @@ -120,7 +120,7 @@ antPrachC13=./usecase/cat_a/mu3_100mhz/ant_13.bin #CC3 antPrachC14=./usecase/cat_a/mu3_100mhz/ant_14.bin #CC3 antPrachC15=./usecase/cat_a/mu3_100mhz/ant_15.bin #CC3 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=81 ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/101/config_file_o_du.dat b/fhi_lib/app/usecase/cat_a/mu3_100mhz/101/config_file_o_du.dat index 75f9e50..eceea0d 100644 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/101/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_a/mu3_100mhz/101/config_file_o_du.dat @@ -85,7 +85,7 @@ antC12=./usecase/cat_a/mu3_100mhz/ant_12.bin #CC3 antC13=./usecase/cat_a/mu3_100mhz/ant_13.bin #CC3 antC14=./usecase/cat_a/mu3_100mhz/ant_14.bin #CC3 antC15=./usecase/cat_a/mu3_100mhz/ant_15.bin #CC3 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=81 ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/101/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_a/mu3_100mhz/101/config_file_o_ru.dat index 8d37d50..2cca1d6 100644 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/101/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_a/mu3_100mhz/101/config_file_o_ru.dat @@ -103,7 +103,7 @@ antPrachC13=./usecase/cat_a/mu3_100mhz/ant_13.bin #CC3 antPrachC14=./usecase/cat_a/mu3_100mhz/ant_14.bin #CC3 antPrachC15=./usecase/cat_a/mu3_100mhz/ant_15.bin #CC3 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=81 ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/2/config_file_o_du.dat b/fhi_lib/app/usecase/cat_a/mu3_100mhz/2/config_file_o_du.dat index e344d31..9677848 100644 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/2/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_a/mu3_100mhz/2/config_file_o_du.dat @@ -108,7 +108,7 @@ antC13=./usecase/cat_a/mu3_100mhz/ant_13.bin #CC3 antC14=./usecase/cat_a/mu3_100mhz/ant_14.bin #CC3 antC15=./usecase/cat_a/mu3_100mhz/ant_15.bin #CC3 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=81 ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/2/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_a/mu3_100mhz/2/config_file_o_ru.dat index 575cfbb..8e405a2 100644 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/2/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_a/mu3_100mhz/2/config_file_o_ru.dat @@ -122,7 +122,7 @@ antPrachC13=./usecase/cat_a/mu3_100mhz/ant_13.bin #CC3 antPrachC14=./usecase/cat_a/mu3_100mhz/ant_14.bin #CC3 antPrachC15=./usecase/cat_a/mu3_100mhz/ant_15.bin #CC3 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=81 ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/201/mu3_config_file_o_ru.dat b/fhi_lib/app/usecase/cat_a/mu3_100mhz/201/mu3_config_file_o_ru.dat deleted file mode 100644 index 14f774e..0000000 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/201/mu3_config_file_o_ru.dat +++ /dev/null @@ -1,194 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) -antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B - -##Numerology -mu=3 #mmWave 120Khz Sub Carrier Spacing -ttiPeriod=125 # in us TTI period (mmWave default 125us) -nDLAbsFrePointA=27968160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=27968160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=1024 -nULFftSize=1024 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=4 #[0-5] TDD priod e.g. DDDS 4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,2,2,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - #not used -#sSlotConfig4=0,2,2,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=10 -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_a/mu3_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_a/mu3_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_a/mu3_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_a/mu3_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_a/mu3_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_a/mu3_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_a/mu3_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_a/mu3_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_a/mu3_100mhz/ant_8.bin #CC2 -antC9=./usecase/cat_a/mu3_100mhz/ant_9.bin #CC2 -antC10=./usecase/cat_a/mu3_100mhz/ant_10.bin #CC2 -antC11=./usecase/cat_a/mu3_100mhz/ant_11.bin #CC2 -antC12=./usecase/cat_a/mu3_100mhz/ant_12.bin #CC3 -antC13=./usecase/cat_a/mu3_100mhz/ant_13.bin #CC3 -antC14=./usecase/cat_a/mu3_100mhz/ant_14.bin #CC3 -antC15=./usecase/cat_a/mu3_100mhz/ant_15.bin #CC3 - -antPrachC0=./usecase/cat_a/mu3_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_a/mu3_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_a/mu3_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_a/mu3_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_a/mu3_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_a/mu3_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_a/mu3_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_a/mu3_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_a/mu3_100mhz/ant_8.bin #CC2 -antPrachC9=./usecase/cat_a/mu3_100mhz/ant_9.bin #CC2 -antPrachC10=./usecase/cat_a/mu3_100mhz/ant_10.bin #CC2 -antPrachC11=./usecase/cat_a/mu3_100mhz/ant_11.bin #CC2 -antPrachC12=./usecase/cat_a/mu3_100mhz/ant_12.bin #CC3 -antPrachC13=./usecase/cat_a/mu3_100mhz/ant_13.bin #CC3 -antPrachC14=./usecase/cat_a/mu3_100mhz/ant_14.bin #CC3 -antPrachC15=./usecase/cat_a/mu3_100mhz/ant_15.bin #CC3 - -rachEanble=1 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=81 -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=8 -max_sections_per_symbol=8 - -nPrbElemDl=1 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,36,0,14,1,1,0,16,1 -PrbElemDl1=36,36,0,14,2,1,0,16,1 -PrbElemDl2=72,36,0,14,3,1,0,16,1 -PrbElemDl3=108,36,0,14,4,1,0,16,1 -PrbElemDl4=144,36,0,14,5,1,0,16,1 -PrbElemDl5=180,36,0,14,6,1,0,16,1 -PrbElemDl6=216,36,0,14,7,1,0,16,1 -PrbElemDl7=252,21,0,14,8,1,0,16,1 - - -nPrbElemUl=1 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,36,0,14,1,1,0,16,1 -PrbElemUl1=36,36,0,14,2,1,0,16,1 -PrbElemUl2=72,36,0,14,3,1,0,16,1 -PrbElemUl3=108,36,0,14,4,1,0,16,1 -PrbElemUl4=144,36,0,14,5,1,0,16,1 -PrbElemUl5=180,36,0,14,6,1,0,16,1 -PrbElemUl6=216,36,0,14,7,1,0,16,1 -PrbElemUl7=252,21,0,14,8,1,0,16,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order - -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled -c_plane_vlan_tag=1 #VLAN Tag used for C-Plane -u_plane_vlan_tag=2 #VLAN Tag used for U-Plane - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 #in us TODO: update per RU implementation - #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages - -#Reception Window C-plane DL -T2a_min_cp_dl=50 #in us -T2a_max_cp_dl=140 #in us - -#Reception Window C-plane UL -T2a_min_cp_ul=50 #in us -T2a_max_cp_ul=140 #in us - -#Reception Window U-plane -T2a_min_up=25 #in us -T2a_max_up=70 #in us - -#Transmission Window -Ta3_min=20 #in us -Ta3_max=32 #in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=70 -T1a_max_cp_dl=100 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=60 -T1a_max_cp_ul=70 - -#U-plane -##Transmission Window -T1a_min_up=35 -T1a_max_up=50 - -#Reception Window -Ta4_min=0 -Ta4_max=45 -########################################################### - diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/3/config_file_o_du.dat b/fhi_lib/app/usecase/cat_a/mu3_100mhz/3/config_file_o_du.dat index 1ab9aa6..9fd7310 100644 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/3/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_a/mu3_100mhz/3/config_file_o_du.dat @@ -108,7 +108,7 @@ antC13=./usecase/cat_a/mu3_100mhz/ant_13.bin #CC3 antC14=./usecase/cat_a/mu3_100mhz/ant_14.bin #CC3 antC15=./usecase/cat_a/mu3_100mhz/ant_15.bin #CC3 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=81 ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/3/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_a/mu3_100mhz/3/config_file_o_ru.dat index ba78b37..f929cd6 100644 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/3/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_a/mu3_100mhz/3/config_file_o_ru.dat @@ -128,7 +128,7 @@ antPrachC13=./usecase/cat_a/mu3_100mhz/ant_13.bin #CC3 antPrachC14=./usecase/cat_a/mu3_100mhz/ant_14.bin #CC3 antPrachC15=./usecase/cat_a/mu3_100mhz/ant_15.bin #CC3 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=81 ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/4/config_file_o_du.dat b/fhi_lib/app/usecase/cat_a/mu3_100mhz/4/config_file_o_du.dat index 17e5b97..21f2798 100644 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/4/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_a/mu3_100mhz/4/config_file_o_du.dat @@ -109,7 +109,7 @@ antC13=./usecase/cat_a/mu3_100mhz/ant_13.bin #CC3 antC14=./usecase/cat_a/mu3_100mhz/ant_14.bin #CC3 antC15=./usecase/cat_a/mu3_100mhz/ant_15.bin #CC3 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=81 ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/4/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_a/mu3_100mhz/4/config_file_o_ru.dat index f50f3bc..7164ae8 100644 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/4/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_a/mu3_100mhz/4/config_file_o_ru.dat @@ -129,7 +129,7 @@ antPrachC13=./usecase/cat_a/mu3_100mhz/ant_13.bin #CC3 antPrachC14=./usecase/cat_a/mu3_100mhz/ant_14.bin #CC3 antPrachC15=./usecase/cat_a/mu3_100mhz/ant_15.bin #CC3 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=81 ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/5/config_file_o_du.dat b/fhi_lib/app/usecase/cat_a/mu3_100mhz/5/config_file_o_du.dat index 61517aa..4fcd733 100644 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/5/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_a/mu3_100mhz/5/config_file_o_du.dat @@ -108,7 +108,7 @@ antC13=./usecase/cat_a/mu3_100mhz/ant_13.bin #CC3 antC14=./usecase/cat_a/mu3_100mhz/ant_14.bin #CC3 antC15=./usecase/cat_a/mu3_100mhz/ant_15.bin #CC3 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=81 ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/5/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_a/mu3_100mhz/5/config_file_o_ru.dat index 1fb8176..5010c62 100644 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/5/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_a/mu3_100mhz/5/config_file_o_ru.dat @@ -129,7 +129,7 @@ antPrachC13=./usecase/cat_a/mu3_100mhz/ant_13.bin #CC3 antPrachC14=./usecase/cat_a/mu3_100mhz/ant_14.bin #CC3 antPrachC15=./usecase/cat_a/mu3_100mhz/ant_15.bin #CC3 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=81 ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/6/config_file_o_du.dat b/fhi_lib/app/usecase/cat_a/mu3_100mhz/6/config_file_o_du.dat index 9be637d..85ac998 100644 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/6/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_a/mu3_100mhz/6/config_file_o_du.dat @@ -113,7 +113,7 @@ antC13=./usecase/cat_a/mu3_100mhz/ant_13.bin #CC3 antC14=./usecase/cat_a/mu3_100mhz/ant_14.bin #CC3 antC15=./usecase/cat_a/mu3_100mhz/ant_15.bin #CC3 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=81 ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/6/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_a/mu3_100mhz/6/config_file_o_ru.dat index bceb969..db85643 100644 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/6/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_a/mu3_100mhz/6/config_file_o_ru.dat @@ -129,7 +129,7 @@ antPrachC13=./usecase/cat_a/mu3_100mhz/ant_13.bin #CC3 antPrachC14=./usecase/cat_a/mu3_100mhz/ant_14.bin #CC3 antPrachC15=./usecase/cat_a/mu3_100mhz/ant_15.bin #CC3 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=81 ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/7/config_file_o_du.dat b/fhi_lib/app/usecase/cat_a/mu3_100mhz/7/config_file_o_du.dat index f1d9e82..134da87 100644 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/7/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_a/mu3_100mhz/7/config_file_o_du.dat @@ -103,7 +103,7 @@ antC13=./usecase/cat_a/mu3_100mhz/ant_13.bin #CC3 antC14=./usecase/cat_a/mu3_100mhz/ant_14.bin #CC3 antC15=./usecase/cat_a/mu3_100mhz/ant_15.bin #CC3 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=81 ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/7/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_a/mu3_100mhz/7/config_file_o_ru.dat index b56ed33..0cc2c01 100644 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/7/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_a/mu3_100mhz/7/config_file_o_ru.dat @@ -120,7 +120,7 @@ antPrachC13=./usecase/cat_a/mu3_100mhz/ant_13.bin #CC3 antPrachC14=./usecase/cat_a/mu3_100mhz/ant_14.bin #CC3 antPrachC15=./usecase/cat_a/mu3_100mhz/ant_15.bin #CC3 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=81 ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/7/usecase_du.cfg b/fhi_lib/app/usecase/cat_a/mu3_100mhz/7/usecase_du.cfg index 5c067f4..12d06c3 100644 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/7/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_a/mu3_100mhz/7/usecase_du.cfg @@ -20,6 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/8/config_file_o_du.dat b/fhi_lib/app/usecase/cat_a/mu3_100mhz/8/config_file_o_du.dat deleted file mode 100644 index 57ef800..0000000 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/8/config_file_o_du.dat +++ /dev/null @@ -1,170 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # lls-CU(0) | RU(1) -xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) -antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B - -####################################################################### -#Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=3 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,22,0,14,0,1,1,14,1 -PrbElemDl1=22,22,0,14,1,1,1,14,1 -PrbElemDl2=44,22,0,14,2,1,1,14,1 - -nPrbElemUl=3 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,22,0,14,0,1,1,14,1 -PrbElemUl1=22,22,0,14,1,1,1,14,1 -PrbElemUl2=44,22,0,14,2,1,1,14,1 -####################################################################### - -##Numerology -mu=3 #mmWave 120Khz Sub Carrier Spacing -ttiPeriod=125 # in us TTI period (mmWave default 125us) -nDLAbsFrePointA=27968160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=27968160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=1024 -nULFftSize=1024 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=4 #[0-5] TDD priod e.g. DDDS 4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,2,2,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -# not used -#sSlotConfig4=0,2,2,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -#3c:fd:fe:b9:f8:b5 -# -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=3c:fd:fe:b9:f8:b5 -#00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -maxFrameId=99 # set for compatibility with O-RU - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_a/mu3_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_a/mu3_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_a/mu3_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_a/mu3_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_a/mu3_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_a/mu3_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_a/mu3_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_a/mu3_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_a/mu3_100mhz/ant_8.bin #CC2 -antC9=./usecase/cat_a/mu3_100mhz/ant_9.bin #CC2 -antC10=./usecase/cat_a/mu3_100mhz/ant_10.bin #CC2 -antC11=./usecase/cat_a/mu3_100mhz/ant_11.bin #CC2 -antC12=./usecase/cat_a/mu3_100mhz/ant_12.bin #CC3 -antC13=./usecase/cat_a/mu3_100mhz/ant_13.bin #CC3 -antC14=./usecase/cat_a/mu3_100mhz/ant_14.bin #CC3 -antC15=./usecase/cat_a/mu3_100mhz/ant_15.bin #CC3 - -rachEanble=1 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=81 - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=0 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled -c_plane_vlan_tag=1 #VLAN Tag used for C-Plane -u_plane_vlan_tag=2 #VLAN Tag used for U-Plane - -##RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 #in us TODO: update per RU implementation - #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages - -#Reception Window C-plane DL -T2a_min_cp_dl=50 #in us -T2a_max_cp_dl=140 #in us - -#Reception Window C-plane UL -T2a_min_cp_ul=50 #in us -T2a_max_cp_ul=140 #in us - -#Reception Window U-plane -T2a_min_up=25 #in us -T2a_max_up=140 #in us - -#Transmission Window -Ta3_min=20 #in us -Ta3_max=32 #in us - -########################################################### -##lls-CU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=70 -T1a_max_cp_dl=100 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=60 -T1a_max_cp_ul=70 - -#U-plane -##Transmission Window -T1a_min_up=35 -T1a_max_up=50 - -#Reception Window -Ta4_min=0 -Ta4_max=45 -########################################################### - diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/8/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_a/mu3_100mhz/8/config_file_o_ru.dat deleted file mode 100644 index f68b5c4..0000000 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/8/config_file_o_ru.dat +++ /dev/null @@ -1,184 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) -antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B - -####################################################################### -#Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=3 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,22,0,14,0,1,1,14,1 -PrbElemDl1=22,22,0,14,1,1,1,14,1 -PrbElemDl2=44,22,0,14,2,1,1,14,1 - -nPrbElemUl=3 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,22,0,14,0,1,1,14,1 -PrbElemUl1=22,22,0,14,1,1,1,14,1 -PrbElemUl2=44,22,0,14,2,1,1,14,1 -####################################################################### - -##Numerology -mu=3 #mmWave 120Khz Sub Carrier Spacing -ttiPeriod=125 # in us TTI period (mmWave default 125us) -nDLAbsFrePointA=27968160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=27968160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=1024 -nULFftSize=1024 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=4 #[0-5] TDD priod e.g. DDDS 4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,2,2,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - #not used -#sSlotConfig4=0,2,2,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=10 -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -maxFrameId=99 # set for compatibility with O-RU - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_a/mu3_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_a/mu3_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_a/mu3_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_a/mu3_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_a/mu3_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_a/mu3_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_a/mu3_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_a/mu3_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_a/mu3_100mhz/ant_8.bin #CC2 -antC9=./usecase/cat_a/mu3_100mhz/ant_9.bin #CC2 -antC10=./usecase/cat_a/mu3_100mhz/ant_10.bin #CC2 -antC11=./usecase/cat_a/mu3_100mhz/ant_11.bin #CC2 -antC12=./usecase/cat_a/mu3_100mhz/ant_12.bin #CC3 -antC13=./usecase/cat_a/mu3_100mhz/ant_13.bin #CC3 -antC14=./usecase/cat_a/mu3_100mhz/ant_14.bin #CC3 -antC15=./usecase/cat_a/mu3_100mhz/ant_15.bin #CC3 - -antPrachC0=./usecase/cat_a/mu3_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_a/mu3_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_a/mu3_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_a/mu3_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_a/mu3_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_a/mu3_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_a/mu3_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_a/mu3_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_a/mu3_100mhz/ant_8.bin #CC2 -antPrachC9=./usecase/cat_a/mu3_100mhz/ant_9.bin #CC2 -antPrachC10=./usecase/cat_a/mu3_100mhz/ant_10.bin #CC2 -antPrachC11=./usecase/cat_a/mu3_100mhz/ant_11.bin #CC2 -antPrachC12=./usecase/cat_a/mu3_100mhz/ant_12.bin #CC3 -antPrachC13=./usecase/cat_a/mu3_100mhz/ant_13.bin #CC3 -antPrachC14=./usecase/cat_a/mu3_100mhz/ant_14.bin #CC3 -antPrachC15=./usecase/cat_a/mu3_100mhz/ant_15.bin #CC3 - -rachEanble=1 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=81 - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled -c_plane_vlan_tag=1 #VLAN Tag used for C-Plane -u_plane_vlan_tag=2 #VLAN Tag used for U-Plane - -##RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 #in us TODO: update per RU implementation - #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages - -#Reception Window C-plane DL -T2a_min_cp_dl=50 #in us -T2a_max_cp_dl=140 #in us - -#Reception Window C-plane UL -T2a_min_cp_ul=50 #in us -T2a_max_cp_ul=140 #in us - -#Reception Window U-plane -T2a_min_up=25 #in us -T2a_max_up=70 #in us - -#Transmission Window -Ta3_min=20 #in us -Ta3_max=32 #in us - -########################################################### -##lls-CU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=70 -T1a_max_cp_dl=100 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=60 -T1a_max_cp_ul=70 - -#U-plane -##Transmission Window -T1a_min_up=35 -T1a_max_up=50 - -#Reception Window -Ta4_min=0 -Ta4_max=45 -########################################################### - diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/9/config_file_o_du.dat b/fhi_lib/app/usecase/cat_a/mu3_100mhz/9/config_file_o_du.dat deleted file mode 100644 index b835103..0000000 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/9/config_file_o_du.dat +++ /dev/null @@ -1,170 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # lls-CU(0) | RU(1) -xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) -antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B - -####################################################################### -#Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=1 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,66,0,14,0,1,1,9,1 -PrbElemDl1=22,22,0,14,1,1,1,9,1 -PrbElemDl2=44,22,0,14,2,1,1,9,1 - -nPrbElemUl=1 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,66,0,14,0,1,1,9,1 -PrbElemUl1=22,22,0,14,1,1,1,9,1 -PrbElemUl2=44,22,0,14,2,1,1,9,1 -####################################################################### - -##Numerology -mu=3 #mmWave 120Khz Sub Carrier Spacing -ttiPeriod=125 # in us TTI period (mmWave default 125us) -nDLAbsFrePointA=27968160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=27968160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=1024 -nULFftSize=1024 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-5] TDD priod e.g. DDDS 4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - #not used -#sSlotConfig4=0,2,2,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 -#9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - - -maxFrameId=99 # set for compatibility with O-RU - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_a/mu3_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_a/mu3_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_a/mu3_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_a/mu3_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_a/mu3_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_a/mu3_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_a/mu3_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_a/mu3_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_a/mu3_100mhz/ant_8.bin #CC2 -antC9=./usecase/cat_a/mu3_100mhz/ant_9.bin #CC2 -antC10=./usecase/cat_a/mu3_100mhz/ant_10.bin #CC2 -antC11=./usecase/cat_a/mu3_100mhz/ant_11.bin #CC2 -antC12=./usecase/cat_a/mu3_100mhz/ant_12.bin #CC3 -antC13=./usecase/cat_a/mu3_100mhz/ant_13.bin #CC3 -antC14=./usecase/cat_a/mu3_100mhz/ant_14.bin #CC3 -antC15=./usecase/cat_a/mu3_100mhz/ant_15.bin #CC3 - -rachEanble=1 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=81 - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled -c_plane_vlan_tag=1 #VLAN Tag used for C-Plane -u_plane_vlan_tag=2 #VLAN Tag used for U-Plane - -##RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 #in us TODO: update per RU implementation - #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages - -#Reception Window C-plane DL -T2a_min_cp_dl=50 #in us -T2a_max_cp_dl=140 #in us - -#Reception Window C-plane UL -T2a_min_cp_ul=50 #in us -T2a_max_cp_ul=140 #in us - -#Reception Window U-plane -T2a_min_up=25 #in us -T2a_max_up=140 #in us - -#Transmission Window -Ta3_min=20 #in us -Ta3_max=32 #in us - -########################################################### -##lls-CU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=70 -T1a_max_cp_dl=100 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=60 -T1a_max_cp_ul=70 - -#U-plane -##Transmission Window -T1a_min_up=35 -T1a_max_up=50 - -#Reception Window -Ta4_min=0 -Ta4_max=45 -########################################################### - diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/9/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_a/mu3_100mhz/9/config_file_o_ru.dat deleted file mode 100644 index 7b01f32..0000000 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/9/config_file_o_ru.dat +++ /dev/null @@ -1,191 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) -antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B - -####################################################################### -#Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=1 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,66,0,14,0,1,1,9,1 -PrbElemDl1=22,22,0,14,1,1,1,9,1 -PrbElemDl2=44,22,0,14,2,1,1,9,1 - -nPrbElemUl=1 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,66,0,14,0,1,1,9,1 -PrbElemUl1=22,22,0,14,1,1,1,9,1 -PrbElemUl2=44,22,0,14,2,1,1,9,1 -####################################################################### - -##Numerology -mu=3 #mmWave 120Khz Sub Carrier Spacing -ttiPeriod=125 # in us TTI period (mmWave default 125us) -nDLAbsFrePointA=27968160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=27968160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=1024 -nULFftSize=1024 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-5] TDD priod e.g. DDDS 4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - #not used -#sSlotConfig4=0,2,2,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -#sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 -#9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=10 -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -maxFrameId=99 # set for compatibility with O-RU - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_a/mu3_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_a/mu3_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_a/mu3_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_a/mu3_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_a/mu3_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_a/mu3_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_a/mu3_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_a/mu3_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_a/mu3_100mhz/ant_8.bin #CC2 -antC9=./usecase/cat_a/mu3_100mhz/ant_9.bin #CC2 -antC10=./usecase/cat_a/mu3_100mhz/ant_10.bin #CC2 -antC11=./usecase/cat_a/mu3_100mhz/ant_11.bin #CC2 -antC12=./usecase/cat_a/mu3_100mhz/ant_12.bin #CC3 -antC13=./usecase/cat_a/mu3_100mhz/ant_13.bin #CC3 -antC14=./usecase/cat_a/mu3_100mhz/ant_14.bin #CC3 -antC15=./usecase/cat_a/mu3_100mhz/ant_15.bin #CC3 - -#antPrachC0=./usecase/cat_a/mu3_100mhz/uliq00_prach_tst20.bin #CC0 -#antPrachC1=./usecase/cat_a/mu3_100mhz/uliq01_prach_tst20.bin #CC0 -#antPrachC2=./usecase/cat_a/mu3_100mhz/uliq00_prach_tst20.bin #CC0 -#antPrachC3=./usecase/cat_a/mu3_100mhz/uliq01_prach_tst20.bin #CC0 - -antPrachC0=./usecase/cat_a/mu3_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_a/mu3_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_a/mu3_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_a/mu3_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_a/mu3_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_a/mu3_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_a/mu3_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_a/mu3_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_a/mu3_100mhz/ant_8.bin #CC2 -antPrachC9=./usecase/cat_a/mu3_100mhz/ant_9.bin #CC2 -antPrachC10=./usecase/cat_a/mu3_100mhz/ant_10.bin #CC2 -antPrachC11=./usecase/cat_a/mu3_100mhz/ant_11.bin #CC2 -antPrachC12=./usecase/cat_a/mu3_100mhz/ant_12.bin #CC3 -antPrachC13=./usecase/cat_a/mu3_100mhz/ant_13.bin #CC3 -antPrachC14=./usecase/cat_a/mu3_100mhz/ant_14.bin #CC3 -antPrachC15=./usecase/cat_a/mu3_100mhz/ant_15.bin #CC3 - -rachEanble=1 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=81 - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled -c_plane_vlan_tag=1 #VLAN Tag used for C-Plane -u_plane_vlan_tag=2 #VLAN Tag used for U-Plane - -##RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 #in us TODO: update per RU implementation - #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages - -#Reception Window C-plane DL -T2a_min_cp_dl=50 #in us -T2a_max_cp_dl=140 #in us - -#Reception Window C-plane UL -T2a_min_cp_ul=50 #in us -T2a_max_cp_ul=140 #in us - -#Reception Window U-plane -T2a_min_up=25 #in us -T2a_max_up=70 #in us - -#Transmission Window -Ta3_min=20 #in us -Ta3_max=32 #in us - -########################################################### -##lls-CU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=70 -T1a_max_cp_dl=100 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=60 -T1a_max_cp_ul=70 - -#U-plane -##Transmission Window -T1a_min_up=35 -T1a_max_up=50 - -#Reception Window -Ta4_min=0 -Ta4_max=45 -########################################################### - diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_a/mu3_100mhz/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..aad7283 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu3_100mhz/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 125, 125, 125, 125 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_a/mu3_100mhz/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_a/mu3_100mhz/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/config_file_o_du.dat b/fhi_lib/app/usecase/cat_a/mu3_100mhz/config_file_o_du.dat index ee6b146..983cfec 100644 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_a/mu3_100mhz/config_file_o_du.dat @@ -86,7 +86,7 @@ antC13=./usecase/cat_a/mu3_100mhz/ant_13.bin #CC3 antC14=./usecase/cat_a/mu3_100mhz/ant_14.bin #CC3 antC15=./usecase/cat_a/mu3_100mhz/ant_15.bin #CC3 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=81 ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_a/mu3_100mhz/config_file_o_ru.dat index a710a6e..fdeb91e 100644 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_a/mu3_100mhz/config_file_o_ru.dat @@ -103,7 +103,7 @@ antPrachC13=./usecase/cat_a/mu3_100mhz/ant_13.bin #CC3 antPrachC14=./usecase/cat_a/mu3_100mhz/ant_14.bin #CC3 antPrachC15=./usecase/cat_a/mu3_100mhz/ant_15.bin #CC3 -rachEanble=1 # Enable (1)| disable (0) PRACH configuration +rachEnable=1 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=81 ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/usecase_du.cfg b/fhi_lib/app/usecase/cat_a/mu3_100mhz/usecase_du.cfg index 5c067f4..84a7872 100644 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_a/mu3_100mhz/usecase_du.cfg @@ -20,6 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/1/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1/config_file_o_du.dat index 395cc77..ad4f9e2 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/1/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1/config_file_o_du.dat @@ -115,11 +115,14 @@ UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX anten UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -172,6 +175,10 @@ ExtBfwUl4=12,3,0,0,9,1 ExtBfwUl5=12,3,0,0,9,1 ExtBfwUl6=12,3,0,0,9,1 ExtBfwUl7=7,3,0,0,9,1 + +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/1/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1/config_file_o_ru.dat index d149f4e..35378b1 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/1/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1/config_file_o_ru.dat @@ -110,11 +110,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -179,6 +182,9 @@ PrbElemUl5=180,36,0,14,6,1,1,9,1 PrbElemUl6=216,36,0,14,7,1,1,9,1 PrbElemUl7=252,21,0,14,8,1,1,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/1/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1/usecase_du.cfg index 5c067f4..9f52c58 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/1/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1/usecase_du.cfg @@ -20,7 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] - +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/101/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/101/config_file_o_du.dat index 2fa96ef..49f7f39 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/101/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/101/config_file_o_du.dat @@ -116,11 +116,14 @@ UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX anten UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -145,6 +148,10 @@ PrbElemUl1=64,26,0,14,1,1,1,9,1 # numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth ExtBfwUl0=64,2,0,0,9,1 ExtBfwUl1=13,2,0,0,9,1 + +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/101/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/101/config_file_o_ru.dat index 9a114c3..f6c147f 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/101/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/101/config_file_o_ru.dat @@ -113,11 +113,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -171,6 +174,9 @@ nPrbElemUl=2 PrbElemUl0=0,64,0,14,0,1,1,9,1 PrbElemUl1=64,26,0,14,1,1,1,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/101/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/101/usecase_du.cfg index 5c067f4..12d06c3 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/101/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/101/usecase_du.cfg @@ -20,6 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/102/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/102/config_file_o_du.dat index c2141f0..eb40204 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/102/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/102/config_file_o_du.dat @@ -116,11 +116,14 @@ UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX anten UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -146,6 +149,9 @@ PrbElemUl1=64,26,0,14,1,1,1,9,1 ExtBfwUl0=64,2,0,0,9,1 ExtBfwUl1=13,2,0,0,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/102/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/102/config_file_o_ru.dat index 916a3d4..eee7051 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/102/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/102/config_file_o_ru.dat @@ -112,11 +112,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # enable (1)| disable (0) srs +srsSym=4 # deprecated +srsSlot=3 # scheduled srs slot within tdd period +srsNdmOffset=3 # delay offset to start ndm srs u-plane +srsNdmTxDuration=4 # tx duration for ndm srts u-plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -167,6 +170,9 @@ nPrbElemUl=2 PrbElemUl0=0,64,0,14,0,1,1,9,1 PrbElemUl1=64,26,0,14,1,1,1,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/102/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/102/usecase_du.cfg index 5c067f4..9f52c58 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/102/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/102/usecase_du.cfg @@ -20,7 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] - +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/103/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/103/config_file_o_du.dat index 31b7e0b..b8c47b4 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/103/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/103/config_file_o_du.dat @@ -117,11 +117,14 @@ UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX anten UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # enable (1)| disable (0) srs +srsSym=4 # deprecated +srsSlot=3 # scheduled srs slot within tdd period +srsNdmOffset=3 # delay offset to start ndm srs u-plane +srsNdmTxDuration=4 # tx duration for ndm srts u-plane (numberof of symbols) #DL PRB / % Used RBs UL PRB / % Used RBs #66% 180 33% 90 @@ -149,6 +152,9 @@ PrbElemUl1=64,26,0,14,1,1,1,9,1 ExtBfwUl0=30,3,0,0,9,1 ExtBfwUl1=30,3,0,0,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/103/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/103/config_file_o_ru.dat index 123740c..b4b192c 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/103/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/103/config_file_o_ru.dat @@ -112,11 +112,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # enable (1)| disable (0) srs +srsSym=4 # deprecated +srsSlot=3 # scheduled srs slot within tdd period +srsNdmOffset=3 # delay offset to start ndm srs u-plane +srsNdmTxDuration=4 # tx duration for ndm srts u-plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -170,6 +173,9 @@ nPrbElemUl=2 PrbElemUl0=0,64,0,14,0,1,1,9,1 PrbElemUl1=64,26,0,14,1,1,1,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/103/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/103/usecase_du.cfg index 5c067f4..9f52c58 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/103/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/103/usecase_du.cfg @@ -20,7 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] - +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/104/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/104/config_file_o_du.dat index a160231..e844024 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/104/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/104/config_file_o_du.dat @@ -133,11 +133,13 @@ UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX ante UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # enable (1)| disable (0) srs srssym=4 # deprecated +srsSlot=3 # scheduled srs slot within tdd period +srsNdmOffset=3 # delay offset to start ndm srs u-plane +srsNdmTxDuration=4 # tx duration for ndm srts u-plane (numberof of symbols) #DL PRB / % Used RBs UL PRB / % Used RBs #33% 90 33% 90 @@ -170,6 +172,9 @@ ExtBfwUl0=10,3,0,0,9,1 ExtBfwUl1=10,3,0,0,9,1 ExtBfwUl2=10,3,0,0,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/104/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/104/config_file_o_ru.dat index beee6f9..cf3f7a8 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/104/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/104/config_file_o_ru.dat @@ -112,11 +112,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # enable (1)| disable (0) srs +srsSym=4 # deprecated +srsSlot=3 # scheduled srs slot within tdd period +srsNdmOffset=3 # delay offset to start ndm srs u-plane +srsNdmTxDuration=4 # tx duration for ndm srts u-plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -204,6 +207,9 @@ PrbElemUl0=0,30,0,14,0,1,1,9,1 PrbElemUl1=30,30,0,14,1,1,1,9,1 PrbElemUl2=60,30,0,14,2,1,1,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/104/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/104/usecase_du.cfg index 5c067f4..9f52c58 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/104/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/104/usecase_du.cfg @@ -20,7 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] - +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/105/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/105/config_file_o_du.dat index 1697e3a..58e5ff4 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/105/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/105/config_file_o_du.dat @@ -135,11 +135,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) #DL PRB / % Used RBs UL PRB / % Used RBs #33% 90 33% 90 @@ -172,6 +175,8 @@ ExtBfwUl0=10,3,0,0,9,1 ExtBfwUl1=10,3,0,0,9,1 ExtBfwUl2=10,3,0,0,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/105/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/105/config_file_o_ru.dat index 53f0687..34f3a00 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/105/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/105/config_file_o_ru.dat @@ -112,11 +112,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -203,6 +206,9 @@ PrbElemUl0=0,30,0,14,0,1,1,9,1 PrbElemUl1=30,30,0,14,1,1,1,9,1 PrbElemUl2=60,30,0,14,2,1,1,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/105/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/105/usecase_du.cfg index 5c067f4..9f52c58 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/105/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/105/usecase_du.cfg @@ -20,7 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] - +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/106/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/106/config_file_o_du.dat index 31ca615..bb7572f 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/106/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/106/config_file_o_du.dat @@ -135,11 +135,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) #DL PRB / % Used RBs UL PRB / % Used RBs #66% 180 33% 90 @@ -178,6 +181,9 @@ ExtBfwUl0=10,3,0,0,9,1 ExtBfwUl1=10,3,0,0,9,1 ExtBfwUl2=10,3,0,0,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/106/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/106/config_file_o_ru.dat index 075a5b3..03ced3b 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/106/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/106/config_file_o_ru.dat @@ -113,11 +113,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -208,6 +211,9 @@ PrbElemUl0=0,30,0,14,0,1,1,9,1 PrbElemUl1=30,30,0,14,1,1,1,9,1 PrbElemUl2=60,30,0,14,2,1,1,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/106/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/106/usecase_du.cfg index 5c067f4..9f52c58 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/106/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/106/usecase_du.cfg @@ -20,7 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] - +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/107/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/107/config_file_o_du.dat index 0c37790..0b650c9 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/107/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/107/config_file_o_du.dat @@ -124,11 +124,14 @@ UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX ante UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) #DL PRB / % Used RBs UL PRB / % Used RBs #33% 90 33% 90 @@ -161,6 +164,9 @@ ExtBfwUl0=10,3,0,0,9,1 ExtBfwUl1=10,3,0,0,9,1 ExtBfwUl2=10,3,0,0,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/107/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/107/config_file_o_ru.dat index af78222..b8e3325 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/107/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/107/config_file_o_ru.dat @@ -112,11 +112,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -203,6 +206,9 @@ PrbElemUl0=0,30,0,14,0,1,1,9,1 PrbElemUl1=30,30,0,14,1,1,1,9,1 PrbElemUl2=60,30,0,14,2,1,1,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/107/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/107/usecase_du.cfg index 5c067f4..9f52c58 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/107/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/107/usecase_du.cfg @@ -20,7 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] - +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/108/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/108/config_file_o_du.dat index 98b723e..d17ca2e 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/108/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/108/config_file_o_du.dat @@ -124,12 +124,14 @@ UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX ante UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -159,6 +161,9 @@ ExtBfwUl0=10,3,0,0,9,1 ExtBfwUl1=10,3,0,0,9,1 ExtBfwUl2=10,3,0,0,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/108/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/108/config_file_o_ru.dat index 2b1d8f0..46a6d86 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/108/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/108/config_file_o_ru.dat @@ -112,11 +112,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -203,6 +206,9 @@ PrbElemUl0=0,30,0,14,0,1,1,9,1 PrbElemUl1=30,30,0,14,1,1,1,9,1 PrbElemUl2=60,30,0,14,2,1,1,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/108/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/108/usecase_du.cfg index 5c067f4..9f52c58 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/108/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/108/usecase_du.cfg @@ -20,7 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] - +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/109/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/109/config_file_o_du.dat index a2f0b88..18ced63 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/109/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/109/config_file_o_du.dat @@ -124,11 +124,14 @@ UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX ante UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -164,6 +167,9 @@ ExtBfwUl0=10,3,0,0,9,1 ExtBfwUl1=10,3,0,0,9,1 ExtBfwUl2=10,3,0,0,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/109/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/109/config_file_o_ru.dat index fd9b75c..c0ae2c5 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/109/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/109/config_file_o_ru.dat @@ -112,11 +112,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -204,6 +207,9 @@ PrbElemUl0=0,30,0,14,0,1,1,9,1 PrbElemUl1=30,30,0,14,1,1,1,9,1 PrbElemUl2=60,30,0,14,2,1,1,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/109/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/109/usecase_du.cfg index 5c067f4..9f52c58 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/109/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/109/usecase_du.cfg @@ -20,7 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] - +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/111/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/111/config_file_o_du.dat deleted file mode 100644 index 669aab4..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/111/config_file_o_du.dat +++ /dev/null @@ -1,203 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD 1 8T8R 100 4 2 MAX MAX 33% 33% 4.25 1.725 0% DU - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 # core id -ioWorker=0x2000000 # mask 0-no workers - -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/64qam_ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/64qam_ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/64qam_ant_0.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/64qam_ant_1.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType, Scalefactor, REMask -# weight base beams -PrbElemDl0=0,64,0,14,0,1,4,3,1,5064,4095 -PrbElemDl1=64,26,0,14,1,1,4,3,1,5064,4095 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=32,2,0,0,9,1 -ExtBfwDl1=13,2,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,64,0,14,0,1,1,9,1 -PrbElemUl1=64,26,0,14,1,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=64,2,0,0,9,1 -ExtBfwUl1=13,2,0,0,9,1 -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/111/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/111/config_file_o_ru.dat deleted file mode 100644 index 07535db..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/111/config_file_o_ru.dat +++ /dev/null @@ -1,229 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD 1 8T8R 100 4 2 MAX MAX 33% 33% 4.25 1.725 0% DU - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=15 # core id -ioWorker=0x800000000 # mask 0-no workers - -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin - -#DL PRB / % Used RBs UL PRB / % Used RBs -#33% 90 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType, Scalefactor, REMask -# weight base beams -PrbElemDl0=0,64,0,14,0,1,4,3,1,5064,4095 -PrbElemDl1=64,26,0,14,1,1,4,3,1,5064,4095 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,64,0,14,0,1,1,9,1 -PrbElemUl1=64,26,0,14,1,1,1,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/112/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/112/config_file_o_du.dat deleted file mode 100644 index 3ec2f65..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/112/config_file_o_du.dat +++ /dev/null @@ -1,204 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD 1 8T8R 100 4 2 MAX 16QAM 0.5 33% 90 33% 90 4.25 1.15 0% DU - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/16qam_ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/16qam_ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/16qam_ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/16qam_ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType, Scalefactor, REMask -# weight base beams -PrbElemDl0=0,64,0,14,0,1,4,2,1,10360,4095 -PrbElemDl1=64,26,0,14,1,1,4,2,1,10360,4095 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=32,2,0,0,9,1 -ExtBfwDl1=13,2,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,64,0,14,0,1,1,9,1 -PrbElemUl1=64,26,0,14,1,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=64,2,0,0,9,1 -ExtBfwUl1=13,2,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/112/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/112/config_file_o_ru.dat deleted file mode 100644 index ecababe..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/112/config_file_o_ru.dat +++ /dev/null @@ -1,225 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD 1 8T8R 100 4 2 MAX 16QAM 0.5 33% 90 33% 90 4.25 1.15 0% DU - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=15 # core id - -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType, Scalefactor, REMask -# weight base beams -PrbElemDl0=0,64,0,14,0,1,4,2,1,10360,4095 -PrbElemDl1=64,26,0,14,1,1,4,2,1,10360,4095 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,64,0,14,0,1,1,9,1 -PrbElemUl1=64,26,0,14,1,1,1,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/113/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/113/config_file_o_du.dat deleted file mode 100644 index 3acd68a..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/113/config_file_o_du.dat +++ /dev/null @@ -1,207 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD 1 8T8R 100 4 2 64QAM 0.5 16QAM 0.5 66% 180 33% 90 3.425 1.15 DU - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/qpsk_ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/qpsk_ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/qpsk_ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/qpsk_ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) -#DL PRB / % Used RBs UL PRB / % Used RBs -#66% 180 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType, Scalefactor, REMask -# weight base beams -PrbElemDl0=0,90,0,14,0,1,4,1,1,8192,4095 -PrbElemDl1=90,90,0,14,1,1,4,1,1,8192,4095 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=30,3,0,0,9,1 -ExtBfwDl1=30,3,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,64,0,14,0,1,1,9,1 -PrbElemUl1=64,26,0,14,1,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=30,3,0,0,9,1 -ExtBfwUl1=30,3,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/113/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/113/config_file_o_ru.dat deleted file mode 100644 index 8d13ad2..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/113/config_file_o_ru.dat +++ /dev/null @@ -1,228 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD 1 8T8R 100 4 2 64QAM 0.5 16QAM 0.5 66% 180 33% 90 3.425 1.15 DU - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=15 -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin - -#DL PRB / % Used RBs UL PRB / % Used RBs -#66% 180 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType, Scalefactor, REMask -# weight base beams -PrbElemDl0=0,90,0,14,0,1,4,1,1,8192,4095 -PrbElemDl1=90,90,0,14,1,1,4,1,1,8192,4095 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,64,0,14,0,1,1,9,1 -PrbElemUl1=64,26,0,14,1,1,1,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/113/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/113/usecase_du.cfg deleted file mode 100644 index 5c067f4..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/113/usecase_du.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:01.0 -#PciBusAddoXu0Vf1=0000:51:01.1 -#PciBusAddoXu0Vf2=0000:51:01.2 -#PciBusAddoXu0Vf3=0000:51:01.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:01.4 -#PciBusAddoXu1Vf1=0000:51:01.5 -#PciBusAddoXu1Vf2=0000:51:01.6 -#PciBusAddoXu1Vf3=0000:51:01.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:02.0 -#PciBusAddoXu2Vf1=0000:51:02.1 -#PciBusAddoXu2Vf2=0000:51:02.2 -#PciBusAddoXu2Vf3=0000:51:02.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/114/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/114/config_file_o_du.dat deleted file mode 100644 index aed7f0e..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/114/config_file_o_du.dat +++ /dev/null @@ -1,228 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD 1 64T64R 100 16 8 MAX MAX 33% 90 33% 90 17 6.9 0% DU - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -#DL PRB / % Used RBs UL PRB / % Used RBs -#33% 90 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=3 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,30,0,14,0,1,1,9,1 -PrbElemDl1=30,30,0,14,1,1,1,9,1 -PrbElemDl2=60,30,0,14,2,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=10,3,0,0,9,1 -ExtBfwDl1=10,3,0,0,9,1 -ExtBfwDl2=10,3,0,0,9,1 - -nPrbElemUl=3 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,30,0,14,0,1,1,9,1 -PrbElemUl1=30,30,0,14,1,1,1,9,1 -PrbElemUl2=60,30,0,14,2,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=10,3,0,0,9,1 -ExtBfwUl1=10,3,0,0,9,1 -ExtBfwUl2=10,3,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/114/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/114/config_file_o_ru.dat deleted file mode 100644 index a627c5e..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/114/config_file_o_ru.dat +++ /dev/null @@ -1,262 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD 1 8T8R 100 4 2 64QAM 0.5 16QAM 0.5 66% 180 33% 90 3.425 1.15 DU - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=15 -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - -#DL PRB / % Used RBs UL PRB / % Used RBs -#33% 90 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=3 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,30,0,14,0,1,1,9,1 -PrbElemDl1=30,30,0,14,1,1,1,9,1 -PrbElemDl2=60,30,0,14,2,1,1,9,1 - -nPrbElemUl=3 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,30,0,14,0,1,1,9,1 -PrbElemUl1=30,30,0,14,1,1,1,9,1 -PrbElemUl2=60,30,0,14,2,1,1,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/114/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/114/usecase_du.cfg deleted file mode 100644 index 5c067f4..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/114/usecase_du.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:01.0 -#PciBusAddoXu0Vf1=0000:51:01.1 -#PciBusAddoXu0Vf2=0000:51:01.2 -#PciBusAddoXu0Vf3=0000:51:01.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:01.4 -#PciBusAddoXu1Vf1=0000:51:01.5 -#PciBusAddoXu1Vf2=0000:51:01.6 -#PciBusAddoXu1Vf3=0000:51:01.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:02.0 -#PciBusAddoXu2Vf1=0000:51:02.1 -#PciBusAddoXu2Vf2=0000:51:02.2 -#PciBusAddoXu2Vf3=0000:51:02.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/115/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/115/config_file_o_du.dat deleted file mode 100644 index 6232d88..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/115/config_file_o_du.dat +++ /dev/null @@ -1,231 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD 1 64T64R 100 16 8 MAX 16QAM 0.5 33% 90 33% 90 17 4.6 DU - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -#DL PRB / % Used RBs UL PRB / % Used RBs -#33% 90 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=3 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,30,0,14,0,1,1,9,1 -PrbElemDl1=30,30,0,14,1,1,1,9,1 -PrbElemDl2=60,30,0,14,2,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=10,3,0,0,9,1 -ExtBfwDl1=10,3,0,0,9,1 -ExtBfwDl2=10,3,0,0,9,1 - -nPrbElemUl=3 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,30,0,14,0,1,1,9,1 -PrbElemUl1=30,30,0,14,1,1,1,9,1 -PrbElemUl2=60,30,0,14,2,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=10,3,0,0,9,1 -ExtBfwUl1=10,3,0,0,9,1 -ExtBfwUl2=10,3,0,0,9,1 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/115/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/115/config_file_o_ru.dat deleted file mode 100644 index 152c925..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/115/config_file_o_ru.dat +++ /dev/null @@ -1,261 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD 1 64T64R 100 16 8 MAX 16QAM 0.5 33% 90 33% 90 17 4.6 DU - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=15 -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin -#DL PRB / % Used RBs UL PRB / % Used RBs -#33% 90 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=3 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,30,0,14,0,1,1,9,1 -PrbElemDl1=30,30,0,14,1,1,1,9,1 -PrbElemDl2=60,30,0,14,2,1,1,9,1 - -nPrbElemUl=3 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,30,0,14,0,1,1,9,1 -PrbElemUl1=30,30,0,14,1,1,1,9,1 -PrbElemUl2=60,30,0,14,2,1,1,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/115/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/115/usecase_du.cfg deleted file mode 100644 index 5c067f4..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/115/usecase_du.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:01.0 -#PciBusAddoXu0Vf1=0000:51:01.1 -#PciBusAddoXu0Vf2=0000:51:01.2 -#PciBusAddoXu0Vf3=0000:51:01.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:01.4 -#PciBusAddoXu1Vf1=0000:51:01.5 -#PciBusAddoXu1Vf2=0000:51:01.6 -#PciBusAddoXu1Vf3=0000:51:01.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:02.0 -#PciBusAddoXu2Vf1=0000:51:02.1 -#PciBusAddoXu2Vf2=0000:51:02.2 -#PciBusAddoXu2Vf3=0000:51:02.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/116/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/116/config_file_o_du.dat deleted file mode 100644 index 1821c6c..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/116/config_file_o_du.dat +++ /dev/null @@ -1,236 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD 1 64T64R 100 16 8 64QAM 0.5 16QAM 0.5 66% 180 33% 90 13.7 4.6 0% - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -#DL PRB / % Used RBs UL PRB / % Used RBs -#66% 180 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,30,0,14,0,1,1,9,1 -PrbElemDl1=30,30,0,14,1,1,1,9,1 -PrbElemDl2=60,30,0,14,2,1,1,9,1 -PrbElemDl3=90,30,0,14,3,1,1,9,1 -PrbElemDl4=120,30,0,14,4,1,1,9,1 -PrbElemDl5=150,30,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=10,3,0,0,9,1 -ExtBfwDl1=10,3,0,0,9,1 -ExtBfwDl2=10,3,0,0,9,1 -ExtBfwDl3=10,3,0,0,9,1 -ExtBfwDl4=10,3,0,0,9,1 -ExtBfwDl5=10,3,0,0,9,1 - -nPrbElemUl=3 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,30,0,14,0,1,1,9,1 -PrbElemUl1=30,30,0,14,1,1,1,9,1 -PrbElemUl2=60,30,0,14,2,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=10,3,0,0,9,1 -ExtBfwUl1=10,3,0,0,9,1 -ExtBfwUl2=10,3,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/116/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/116/usecase_du.cfg deleted file mode 100644 index 5c067f4..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/116/usecase_du.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:01.0 -#PciBusAddoXu0Vf1=0000:51:01.1 -#PciBusAddoXu0Vf2=0000:51:01.2 -#PciBusAddoXu0Vf3=0000:51:01.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:01.4 -#PciBusAddoXu1Vf1=0000:51:01.5 -#PciBusAddoXu1Vf2=0000:51:01.6 -#PciBusAddoXu1Vf3=0000:51:01.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:02.0 -#PciBusAddoXu2Vf1=0000:51:02.1 -#PciBusAddoXu2Vf2=0000:51:02.2 -#PciBusAddoXu2Vf3=0000:51:02.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/117/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/117/config_file_o_du.dat deleted file mode 100644 index bca0aec..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/117/config_file_o_du.dat +++ /dev/null @@ -1,219 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD 1 64T64R 100 8 4 MAX MAX 33% 90 33% 90 8.5 3.45 0% DU - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -#DL PRB / % Used RBs UL PRB / % Used RBs -#33% 90 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=3 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,30,0,14,0,1,1,9,1 -PrbElemDl1=30,30,0,14,1,1,1,9,1 -PrbElemDl2=60,30,0,14,2,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=10,3,0,0,9,1 -ExtBfwDl1=10,3,0,0,9,1 -ExtBfwDl2=10,3,0,0,9,1 - -nPrbElemUl=3 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,30,0,14,0,1,1,9,1 -PrbElemUl1=30,30,0,14,1,1,1,9,1 -PrbElemUl2=60,30,0,14,2,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=10,3,0,0,9,1 -ExtBfwUl1=10,3,0,0,9,1 -ExtBfwUl2=10,3,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/117/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/117/config_file_o_ru.dat deleted file mode 100644 index 64c7256..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/117/config_file_o_ru.dat +++ /dev/null @@ -1,261 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD 1 64T64R 100 8 4 MAX MAX 33% 90 33% 90 8.5 3.45 0% DU - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=15 -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin -#DL PRB / % Used RBs UL PRB / % Used RBs -#33% 90 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=3 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,30,0,14,0,1,1,9,1 -PrbElemDl1=30,30,0,14,1,1,1,9,1 -PrbElemDl2=60,30,0,14,2,1,1,9,1 - -nPrbElemUl=3 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,30,0,14,0,1,1,9,1 -PrbElemUl1=30,30,0,14,1,1,1,9,1 -PrbElemUl2=60,30,0,14,2,1,1,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/117/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/117/usecase_du.cfg deleted file mode 100644 index 5c067f4..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/117/usecase_du.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:01.0 -#PciBusAddoXu0Vf1=0000:51:01.1 -#PciBusAddoXu0Vf2=0000:51:01.2 -#PciBusAddoXu0Vf3=0000:51:01.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:01.4 -#PciBusAddoXu1Vf1=0000:51:01.5 -#PciBusAddoXu1Vf2=0000:51:01.6 -#PciBusAddoXu1Vf3=0000:51:01.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:02.0 -#PciBusAddoXu2Vf1=0000:51:02.1 -#PciBusAddoXu2Vf2=0000:51:02.2 -#PciBusAddoXu2Vf3=0000:51:02.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/118/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/118/config_file_o_du.dat deleted file mode 100644 index a182ecd..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/118/config_file_o_du.dat +++ /dev/null @@ -1,217 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD 1 64T64R 100 8 4 MAX 16QAM 0.5 33% 90 33% 90 8.5 2.3 DU - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=3 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,30,0,14,0,1,1,9,1 -PrbElemDl1=30,30,0,14,1,1,1,9,1 -PrbElemDl2=60,30,0,14,2,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=10,3,0,0,9,1 -ExtBfwDl1=10,3,0,0,9,1 -ExtBfwDl2=10,3,0,0,9,1 - -nPrbElemUl=3 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,30,0,14,0,1,1,9,1 -PrbElemUl1=30,30,0,14,1,1,1,9,1 -PrbElemUl2=60,30,0,14,2,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=10,3,0,0,9,1 -ExtBfwUl1=10,3,0,0,9,1 -ExtBfwUl2=10,3,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/118/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/118/config_file_o_ru.dat deleted file mode 100644 index 8af8306..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/118/config_file_o_ru.dat +++ /dev/null @@ -1,261 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD 1 64T64R 100 8 4 MAX 16QAM 0.5 33% 90 33% 90 8.5 2.3 DU - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=15 -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin -#DL PRB / % Used RBs UL PRB / % Used RBs -#33% 90 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=3 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,30,0,14,0,1,1,9,1 -PrbElemDl1=30,30,0,14,1,1,1,9,1 -PrbElemDl2=60,30,0,14,2,1,1,9,1 - -nPrbElemUl=3 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,30,0,14,0,1,1,9,1 -PrbElemUl1=30,30,0,14,1,1,1,9,1 -PrbElemUl2=60,30,0,14,2,1,1,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/118/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/118/usecase_du.cfg deleted file mode 100644 index 5c067f4..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/118/usecase_du.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:01.0 -#PciBusAddoXu0Vf1=0000:51:01.1 -#PciBusAddoXu0Vf2=0000:51:01.2 -#PciBusAddoXu0Vf3=0000:51:01.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:01.4 -#PciBusAddoXu1Vf1=0000:51:01.5 -#PciBusAddoXu1Vf2=0000:51:01.6 -#PciBusAddoXu1Vf3=0000:51:01.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:02.0 -#PciBusAddoXu2Vf1=0000:51:02.1 -#PciBusAddoXu2Vf2=0000:51:02.2 -#PciBusAddoXu2Vf3=0000:51:02.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/119/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/119/config_file_o_du.dat deleted file mode 100644 index fd71303..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/119/config_file_o_du.dat +++ /dev/null @@ -1,222 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD 1 64T64R 100 8 4 64QAM 0.5 16QAM 0.5 66% 180 33% 90 6.85 2.3 0% - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,30,0,14,0,1,1,9,1 -PrbElemDl1=30,30,0,14,1,1,1,9,1 -PrbElemDl2=60,30,0,14,2,1,1,9,1 -PrbElemDl3=90,30,0,14,3,1,1,9,1 -PrbElemDl4=120,30,0,14,4,1,1,9,1 -PrbElemDl5=150,30,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=10,3,0,0,9,1 -ExtBfwDl1=10,3,0,0,9,1 -ExtBfwDl2=10,3,0,0,9,1 -ExtBfwDl3=10,3,0,0,9,1 -ExtBfwDl4=10,3,0,0,9,1 -ExtBfwDl5=10,3,0,0,9,1 - -nPrbElemUl=3 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,30,0,14,0,1,1,9,1 -PrbElemUl1=30,30,0,14,1,1,1,9,1 -PrbElemUl2=60,30,0,14,2,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=10,3,0,0,9,1 -ExtBfwUl1=10,3,0,0,9,1 -ExtBfwUl2=10,3,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/119/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/119/config_file_o_ru.dat deleted file mode 100644 index da1a8b3..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/119/config_file_o_ru.dat +++ /dev/null @@ -1,262 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD 1 64T64R 100 8 4 64QAM 0.5 16QAM 0.5 66% 180 33% 90 6.85 2.3 0% - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=15 -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,30,0,14,0,1,1,9,1 -PrbElemDl1=30,30,0,14,1,1,1,9,1 -PrbElemDl2=60,30,0,14,2,1,1,9,1 -PrbElemDl3=90,30,0,14,3,1,1,9,1 -PrbElemDl4=120,30,0,14,4,1,1,9,1 -PrbElemDl5=150,30,0,14,5,1,1,9,1 - -nPrbElemUl=3 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,30,0,14,0,1,1,9,1 -PrbElemUl1=30,30,0,14,1,1,1,9,1 -PrbElemUl2=60,30,0,14,2,1,1,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/119/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/119/usecase_du.cfg deleted file mode 100644 index 5c067f4..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/119/usecase_du.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:01.0 -#PciBusAddoXu0Vf1=0000:51:01.1 -#PciBusAddoXu0Vf2=0000:51:01.2 -#PciBusAddoXu0Vf3=0000:51:01.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:01.4 -#PciBusAddoXu1Vf1=0000:51:01.5 -#PciBusAddoXu1Vf2=0000:51:01.6 -#PciBusAddoXu1Vf3=0000:51:01.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:02.0 -#PciBusAddoXu2Vf1=0000:51:02.1 -#PciBusAddoXu2Vf2=0000:51:02.2 -#PciBusAddoXu2Vf3=0000:51:02.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/142/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/142/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..d4b1e56 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/142/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 10 + + 10 + + 30,70,31,71,32,72,33,73,34,74,35,75,36,76,37,77,38,78,39,79 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/142/bbu_pool_cfg_o_du_icx.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/142/bbu_pool_cfg_o_du_icx.xml new file mode 100644 index 0000000..81b0e03 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/142/bbu_pool_cfg_o_du_icx.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 6 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/142/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/142/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/142/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/142/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/142/config_file_o_du.dat new file mode 100644 index 0000000..b91d4ae --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/142/config_file_o_du.dat @@ -0,0 +1,237 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +#Peak: 100 % +#301 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU(0) | O-RU(1) +xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B +antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B +antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R + +#UEs +muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources +DlLayersPerUe=1 #number of RX anntennas on DL UE side +UlLayersPerUe=1 #number of TX anntennas on UL UE side + + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 +antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 +antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 + +#SlotNumTx0=./peak_txconfig_1.cfg +#SlotNumTx1=./peak_txconfig_1.cfg +#SlotNumTx2=./peak_txconfig_1.cfg +#SlotNumTx3=./peak_txconfig_2.cfg +#SlotNumTx4=./peak_txconfig_0.cfg + +#SlotNumTx5=./peak_txconfig_1.cfg +#SlotNumTx6=./peak_txconfig_1.cfg +#SlotNumTx7=./peak_txconfig_1.cfg +#SlotNumTx8=./peak_txconfig_2.cfg +#SlotNumTx9=./peak_txconfig_0.cfg + +#SlotNumRx0=./peak_rxconfig_0.cfg +#SlotNumRx1=./peak_rxconfig_0.cfg +#SlotNumRx2=./peak_rxconfig_0.cfg +#SlotNumRx3=./peak_rxconfig_2.cfg +#SlotNumRx4=./peak_rxconfig_1.cfg + +#SlotNumRx5=./peak_rxconfig_0.cfg +#SlotNumRx6=./peak_rxconfig_0.cfg +#SlotNumRx7=./peak_rxconfig_0.cfg +#SlotNumRx8=./peak_rxconfig_3.cfg +#SlotNumRx9=./peak_rxconfig_1.cfg + +#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] +DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] + +#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] +UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] + + +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=189 + +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used +extType=1 +nPrbElemDl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,48,0,14,0,1,1,9,1 +PrbElemDl1=48,48,0,14,1,1,1,9,1 +PrbElemDl2=96,48,0,14,2,1,1,9,1 +PrbElemDl3=144,48,0,14,3,1,1,9,1 +PrbElemDl4=192,48,0,14,4,1,1,9,1 +PrbElemDl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,24,0,0,9,1,1 +ExtBfwDl1=2,24,0,0,9,1,1 +ExtBfwDl2=2,24,0,0,9,1,1 +ExtBfwDl3=2,24,0,0,9,1,1 +ExtBfwDl4=2,24,0,0,9,1,1 +ExtBfwDl5=2,17,0,0,9,1,1 + +nPrbElemUl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,48,0,14,0,1,1,9,1 +PrbElemUl1=48,48,0,14,1,1,1,9,1 +PrbElemUl2=96,48,0,14,2,1,1,9,1 +PrbElemUl3=144,48,0,14,3,1,1,9,1 +PrbElemUl4=192,48,0,14,4,1,1,9,1 +PrbElemUl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,24,0,0,9,1,1 +ExtBfwUl1=2,24,0,0,9,1,1 +ExtBfwUl2=2,24,0,0,9,1,1 +ExtBfwUl3=2,24,0,0,9,1,1 +ExtBfwUl4=2,24,0,0,9,1,1 +ExtBfwUl5=2,17,0,0,9,1,1 + +nPrbElemSrs=1 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order +compression=1 # (1) compression enabled (0) compression disabled + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +Tadv_cp_dl=25 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=285 # 285.42us +T2a_max_cp_dl=429 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=285 # 285.42us +T2a_max_cp_ul=429 # 428.12us + +#Reception Window U-plane +T2a_min_up=71 # 71.35in us +T2a_max_up=428 # 428.12us + +#Transmission Window +Ta3_min=20 # in us +Ta3_max=32 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=285 +T1a_max_cp_dl=429 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=300 + +#U-plane +##Transmission Window +T1a_min_up=96 #71 + 25 us +T1a_max_up=196 #71 + 25 us + +#Reception Window +Ta4_min=0 # in us +Ta4_max=75 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/142/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/142/config_file_o_ru.dat new file mode 100644 index 0000000..d4a6e0a --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/142/config_file_o_ru.dat @@ -0,0 +1,287 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +#Peak: 100 % +#301 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % + + + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B +antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B +antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R + +#UEs +muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources +DlLayersPerUe=1 #number of RX anntennas on DL UE side +UlLayersPerUe=1 #number of TX anntennas on UL UE side + + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 +antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 +antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 + +#SlotNumTx0=./peak_txconfig_1.cfg +#SlotNumTx1=./peak_txconfig_1.cfg +#SlotNumTx2=./peak_txconfig_1.cfg +#SlotNumTx3=./peak_txconfig_2.cfg +#SlotNumTx4=./peak_txconfig_0.cfg + +#SlotNumTx5=./peak_txconfig_1.cfg +#SlotNumTx6=./peak_txconfig_1.cfg +#SlotNumTx7=./peak_txconfig_1.cfg +#SlotNumTx8=./peak_txconfig_2.cfg +#SlotNumTx9=./peak_txconfig_0.cfg + +#SlotNumRx0=./peak_rxconfig_0.cfg +#SlotNumRx1=./peak_rxconfig_0.cfg +#SlotNumRx2=./peak_rxconfig_0.cfg +#SlotNumRx3=./peak_rxconfig_2.cfg +#SlotNumRx4=./peak_rxconfig_1.cfg + +#SlotNumRx5=./peak_rxconfig_0.cfg +#SlotNumRx6=./peak_rxconfig_0.cfg +#SlotNumRx7=./peak_rxconfig_0.cfg +#SlotNumRx8=./peak_rxconfig_3.cfg +#SlotNumRx9=./peak_rxconfig_1.cfg + +antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 +antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 +antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 +antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 +#antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 +#antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 +#antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 +#antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 +#antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 +#antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 +#antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 +#antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 +#antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 +#antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 +#antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 + +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=189 + +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) + +antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin +antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin +antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin +antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin + +#DL PRB / % Used RBs UL PRB / % Used RBs +#66% 180 33% 90 + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used +extType=1 +nPrbElemDl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,48,0,14,0,1,1,9,1 +PrbElemDl1=48,48,0,14,1,1,1,9,1 +PrbElemDl2=96,48,0,14,2,1,1,9,1 +PrbElemDl3=144,48,0,14,3,1,1,9,1 +PrbElemDl4=192,48,0,14,4,1,1,9,1 +PrbElemDl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,24,0,0,9,1,1 +ExtBfwDl1=2,24,0,0,9,1,1 +ExtBfwDl2=2,24,0,0,9,1,1 +ExtBfwDl3=2,24,0,0,9,1,1 +ExtBfwDl4=2,24,0,0,9,1,1 +ExtBfwDl5=2,17,0,0,9,1,1 + +nPrbElemUl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,48,0,14,0,1,1,9,1 +PrbElemUl1=48,48,0,14,1,1,1,9,1 +PrbElemUl2=96,48,0,14,2,1,1,9,1 +PrbElemUl3=144,48,0,14,3,1,1,9,1 +PrbElemUl4=192,48,0,14,4,1,1,9,1 +PrbElemUl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,24,0,0,9,1,1 +ExtBfwUl1=2,24,0,0,9,1,1 +ExtBfwUl2=2,24,0,0,9,1,1 +ExtBfwUl3=2,24,0,0,9,1,1 +ExtBfwUl4=2,24,0,0,9,1,1 +ExtBfwUl5=2,17,0,0,9,1,1 + +nPrbElemSrs=1 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order +compression=1 # (1) compression enabled (0) compression disabled + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +Tadv_cp_dl=25 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=285 # 285.42us +T2a_max_cp_dl=429 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=285 # 285.42us +T2a_max_cp_ul=429 # 428.12us + +#Reception Window U-plane +T2a_min_up=71 # 71.35in us +T2a_max_up=428 # 428.12us + +#Transmission Window +Ta3_min=20 # in us +Ta3_max=32 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=285 +T1a_max_cp_dl=429 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=300 + +#U-plane +##Transmission Window +T1a_min_up=96 #71 + 25 us +T1a_max_up=196 #71 + 25 us + +#Reception Window +Ta4_min=0 # in us +Ta4_max=75 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/142/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/142/usecase_du.cfg new file mode 100644 index 0000000..7f18d32 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/142/usecase_du.cfg @@ -0,0 +1,63 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ +#===== Test case for 32T32R antElm, 4 DL 2 UL layers , 1 CC ===== +# This is simple configuration file. Use '#' sign for comments +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system + +mainCore=20 #core for main() +systemCore=22 +ioCore=28 # core id +#ioWorker=0x000000000 # mask [0- no workers] +#ioWorker=0x8000040000 # mask [0- no workers] +ioWorker=0x100000000 # mask [0- no workers] +#ioWorker=0x700000600 +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml +dlCpProcBurst=1 + +dpdkMemorySize=8192 +iovaMode=0 + +oXuNum=1 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./config_file_o_du.dat #O-DU0 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/501/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/142/usecase_du_icx.cfg similarity index 89% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/501/usecase_du_icx.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/142/usecase_du_icx.cfg index 78303c3..54d2c78 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/501/usecase_du_icx.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/142/usecase_du_icx.cfg @@ -15,15 +15,16 @@ # limitations under the License. # #******************************************************************************/ +#===== Test case for 32T32R antElm, 4 DL 2 UL layers , 1 CC ===== # This is simple configuration file. Use '#' sign for comments appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system mainCore=0 #core for main() systemCore=2 -ioCore=21 # core id -#ioWorker=0x200000000000 # mask [0- no workers] -ioWorker=0xE00000C00000 # mask [0- no workers] +ioCore=8 # core id +ioWorker=0x200 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du_icx.xml dpdkMemorySize=8192 iovaMode=0 @@ -33,7 +34,7 @@ oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs -oXuCfgFile0=./config_file_o_du.dat #O-RU0 +oXuCfgFile0=./config_file_o_du.dat #O-DU0 # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:01 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/142/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/142/usecase_ru.cfg new file mode 100644 index 0000000..17b6ee1 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/142/usecase_ru.cfg @@ -0,0 +1,61 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +#===== Test case for 32T32R antElm, 4 DL 2 UL layers , 1 CC ===== +appMode=1 # All O-DU(0) | O-RU(1) +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +mainCore=0 #core for main() +systemCore=2 +ioCore=8 # core id +#ioWorker=0x800000000 # mask [0- no workers] +#ioWorker=0x800004000 # mask [0- no workers] +#ioWorker=0xc000000 # second socket +ioWorker=0x3E00 # second socket + +dpdkMemorySize=8192 +iovaMode=0 + +oXuNum=1 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./config_file_o_ru.dat #O-RU0 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:00 +oXuRem0Mac1=00:11:22:33:00:10 +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:20 +oXuRem0Mac3=00:11:22:33:00:30 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:00 +oXuRem1Mac1=00:11:22:33:01:10 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:20 +oXuRem1Mac3=00:11:22:33:01:30 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:00 +oXuRem2Mac1=00:11:22:33:02:10 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:20 +oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/142/usecase_ru_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/142/usecase_ru_icx.cfg new file mode 100644 index 0000000..4ffef94 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/142/usecase_ru_icx.cfg @@ -0,0 +1,59 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +#===== Test case for 32T32R antElm, 4 DL 2 UL layers , 1 CC ===== +appMode=1 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +mainCore=0 #core for main() +systemCore=2 +ioCore=8 # core id +ioWorker=0x3E00 # mask [0- no workers] +oXuBbuCfgFile=../bbu_pool_cfg_o_du_icx.xml + +dpdkMemorySize=8192 +iovaMode=0 + +oXuNum=1 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./config_file_o_ru.dat #O-RU0 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:00 +oXuRem0Mac1=00:11:22:33:00:10 +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:20 +oXuRem0Mac3=00:11:22:33:00:30 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:00 +oXuRem1Mac1=00:11:22:33:01:10 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:20 +oXuRem1Mac3=00:11:22:33:01:30 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:00 +oXuRem2Mac1=00:11:22:33:02:10 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:20 +oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..6bed8f1 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,56,17,57,18,58,19,59,21,61,22,62,23,63,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/bbu_pool_cfg_o_du_icx.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/bbu_pool_cfg_o_du_icx.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/bbu_pool_cfg_o_du_icx.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/peak_o_du_tst376.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/peak_o_du_tst376.dat new file mode 100644 index 0000000..57d20fd --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/peak_o_du_tst376.dat @@ -0,0 +1,237 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +#Peak: 100 % +#301 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU(0) | O-RU(1) +xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B +antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B +antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R + +#UEs +muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources +DlLayersPerUe=1 #number of RX anntennas on DL UE side +UlLayersPerUe=1 #number of TX anntennas on UL UE side + + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 +antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 +antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 + +#SlotNumTx0=./peak_txconfig_1.cfg +#SlotNumTx1=./peak_txconfig_1.cfg +#SlotNumTx2=./peak_txconfig_1.cfg +#SlotNumTx3=./peak_txconfig_2.cfg +#SlotNumTx4=./peak_txconfig_0.cfg + +#SlotNumTx5=./peak_txconfig_1.cfg +#SlotNumTx6=./peak_txconfig_1.cfg +#SlotNumTx7=./peak_txconfig_1.cfg +#SlotNumTx8=./peak_txconfig_2.cfg +#SlotNumTx9=./peak_txconfig_0.cfg + +#SlotNumRx0=./peak_rxconfig_0.cfg +#SlotNumRx1=./peak_rxconfig_0.cfg +#SlotNumRx2=./peak_rxconfig_0.cfg +#SlotNumRx3=./peak_rxconfig_2.cfg +#SlotNumRx4=./peak_rxconfig_1.cfg + +#SlotNumRx5=./peak_rxconfig_0.cfg +#SlotNumRx6=./peak_rxconfig_0.cfg +#SlotNumRx7=./peak_rxconfig_0.cfg +#SlotNumRx8=./peak_rxconfig_3.cfg +#SlotNumRx9=./peak_rxconfig_1.cfg + +#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] +DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] + +#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] +UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] + + +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=189 + +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,48,0,14,0,1,1,9,1 +PrbElemDl1=48,48,0,14,1,1,1,9,1 +PrbElemDl2=96,48,0,14,2,1,1,9,1 +PrbElemDl3=144,48,0,14,3,1,1,9,1 +PrbElemDl4=192,48,0,14,4,1,1,9,1 +PrbElemDl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth +ExtBfwDl0=2,24,0,0,9,1 +ExtBfwDl1=2,24,0,0,9,1 +ExtBfwDl2=2,24,0,0,9,1 +ExtBfwDl3=2,24,0,0,9,1 +ExtBfwDl4=2,24,0,0,9,1 +ExtBfwDl5=2,17,0,0,9,1 + +nPrbElemUl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,48,0,14,0,1,1,9,1 +PrbElemUl1=48,48,0,14,1,1,1,9,1 +PrbElemUl2=96,48,0,14,2,1,1,9,1 +PrbElemUl3=144,48,0,14,3,1,1,9,1 +PrbElemUl4=192,48,0,14,4,1,1,9,1 +PrbElemUl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth +ExtBfwUl0=2,24,0,0,9,1 +ExtBfwUl1=2,24,0,0,9,1 +ExtBfwUl2=2,24,0,0,9,1 +ExtBfwUl3=2,24,0,0,9,1 +ExtBfwUl4=2,24,0,0,9,1 +ExtBfwUl5=2,17,0,0,9,1 + +nPrbElemSrs=1 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order +compression=1 # (1) compression enabled (0) compression disabled + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +Tadv_cp_dl=25 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=285 # 285.42us +T2a_max_cp_dl=429 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=285 # 285.42us +T2a_max_cp_ul=429 # 428.12us + +#Reception Window U-plane +T2a_min_up=71 # 71.35in us +T2a_max_up=428 # 428.12us + +#Transmission Window +Ta3_min=20 # in us +Ta3_max=32 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=285 +T1a_max_cp_dl=429 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=300 + +#U-plane +##Transmission Window +T1a_min_up=96 #71 + 25 us +T1a_max_up=196 #71 + 25 us + +#Reception Window +Ta4_min=0 # in us +Ta4_max=75 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_o_ru_tst376.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/peak_o_ru_tst376.dat similarity index 69% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_o_ru_tst376.dat rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/peak_o_ru_tst376.dat index 364f411..1e0f13d 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_o_ru_tst376.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/peak_o_ru_tst376.dat @@ -26,9 +26,9 @@ instanceId=1 # 0,1,2,... in case more than 1 application started on the same sys appMode=1 # O-DU(0) | O-RU(1) xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B +antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B +antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R #UEs muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources @@ -62,22 +62,10 @@ Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec Gps_Beta=0 numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/uliq00_tst376.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/uliq01_tst376.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/uliq02_tst376.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/uliq03_tst376.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/uliq04_tst376.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/uliq05_tst376.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/uliq06_tst376.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/uliq07_tst376.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 +antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 +antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 +antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 #SlotNumTx0=./peak_txconfig_1.cfg #SlotNumTx1=./peak_txconfig_1.cfg @@ -103,30 +91,31 @@ antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 #SlotNumRx8=./peak_rxconfig_3.cfg #SlotNumRx9=./peak_rxconfig_1.cfg - - antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +#antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 +#antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 +#antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 +#antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 +#antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 +#antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 +#antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 +#antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 +#antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 +#antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 +#antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 + +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -160,38 +149,38 @@ antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin #DL PRB / % Used RBs UL PRB / % Used RBs #66% 180 33% 90 @@ -237,8 +226,8 @@ ExtBfwUl4=2,24,0,0,9,1 ExtBfwUl5=2,17,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 -#PrbElemSrs1=136,137,0,14,0,0,0,16,0 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### @@ -246,7 +235,7 @@ PrbElemSrs0=0,273,0,14,0,0,1,9,0 iqswap=0 #do swap of IQ before send buffer to eth nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane + ##Debug debugStop=1 #stop app on 1pps boundary (gps_second % 30) debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary @@ -255,7 +244,7 @@ bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardw CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled ##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU +totalBFWeights=32 # Total number of Beamforming Weights on RU Tadv_cp_dl=25 # in us # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/usecase_du.cfg new file mode 100644 index 0000000..6c56cd8 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/usecase_du.cfg @@ -0,0 +1,65 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ +#===== Test case for 32T32R antElm, 4 DL 2 UL layers , 1 CC ===== +# This is simple configuration file. Use '#' sign for comments +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system + +mainCore=20 #core for main() +systemCore=22 +ioCore=28 # core id +#ioWorker=0x000000000 # mask [0- no workers] +#ioWorker=0x8000040000 # mask [0- no workers] +ioWorker=0x100000000 # mask [0- no workers] +#ioWorker=0x700000600 + +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml +dlCpProcBurst=1 + +dpdkMemorySize=8192 +iovaMode=0 + +oXuNum=1 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./peak_o_du_tst376.dat #O-DU0 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 + +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/usecase_du_icx.cfg new file mode 100644 index 0000000..fe1237b --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/usecase_du_icx.cfg @@ -0,0 +1,60 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ +#===== Test case for 32T32R antElm, 4 DL 2 UL layers , 1 CC ===== +# This is simple configuration file. Use '#' sign for comments +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system + +mainCore=0 #core for main() +systemCore=2 +ioCore=8 # core id +ioWorker=0x200 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du_icx.xml +dpdkMemorySize=8192 +iovaMode=0 + +oXuNum=1 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + + +oXuCfgFile0=./peak_o_du_tst376.dat #O-DU0 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 + +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/usecase_ru_csx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/usecase_ru.cfg similarity index 88% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/usecase_ru_csx.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/usecase_ru.cfg index 8ee5ce3..59af749 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/usecase_ru_csx.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/usecase_ru.cfg @@ -15,29 +15,29 @@ # limitations under the License. # #******************************************************************************/ + # This is simple configuration file. Use '#' sign for comments +#===== Test case for 32T32R antElm, 4 DL 2 UL layers , 1 CC ===== appMode=1 # All O-DU(0) | O-RU(1) instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -mainCore=20 #core for main() -systemCore=22 -ioCore=28 # core id +mainCore=0 #core for main() +systemCore=2 +ioCore=8 # core id #ioWorker=0x800000000 # mask [0- no workers] #ioWorker=0x800004000 # mask [0- no workers] #ioWorker=0xc000000 # second socket -ioWorker=0x3E0000000 # second socket +ioWorker=0x3E00 # second socket -dpdkMemorySize=16384 +dpdkMemorySize=8192 iovaMode=0 -oXuNum=3 # numbers of O-RU connected to O-DU +oXuNum=1 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs oXuCfgFile0=./peak_o_ru_tst376.dat #O-RU0 -oXuCfgFile1=./avg_o_ru_tst377.dat #O-RU1 -oXuCfgFile2=./avg_o_ru_tst377.dat #O-RU2 # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:00 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/usecase_ru_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/usecase_ru_icx.cfg new file mode 100644 index 0000000..853f94f --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1421/usecase_ru_icx.cfg @@ -0,0 +1,58 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +#===== Test case for 32T32R antElm, 4 DL 2 UL layers , 1 CC ===== +appMode=1 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +mainCore=0 #core for main() +systemCore=2 +ioCore=8 # core id +ioWorker=0x3E00 # mask [0- no workers] + +dpdkMemorySize=8192 +iovaMode=0 + +oXuNum=1 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./peak_o_ru_tst376.dat #O-RU0 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:00 +oXuRem0Mac1=00:11:22:33:00:10 +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:20 +oXuRem0Mac3=00:11:22:33:00:30 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:00 +oXuRem1Mac1=00:11:22:33:01:10 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:20 +oXuRem1Mac3=00:11:22:33:01:30 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:00 +oXuRem2Mac1=00:11:22:33:02:10 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:20 +oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/184/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/184/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..d4b1e56 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/184/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 10 + + 10 + + 30,70,31,71,32,72,33,73,34,74,35,75,36,76,37,77,38,78,39,79 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/184/bbu_pool_cfg_o_du_icx.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/184/bbu_pool_cfg_o_du_icx.xml new file mode 100644 index 0000000..f2dfa93 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/184/bbu_pool_cfg_o_du_icx.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 10 + + 10 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/184/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/184/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/184/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/184/peak_o_du.dat similarity index 72% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_o_du.dat rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/184/peak_o_du.dat index 98821a4..9b75f77 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/184/peak_o_du.dat @@ -17,7 +17,7 @@ #******************************************************************************/ #Peak: 100 % -#311 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 16 100% 273 3276 100% 273 3276 Peak: 100 % +#184 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % @@ -26,9 +26,9 @@ instanceId=0 # 0,1,2,... in case more than 1 application started on the same sys appMode=0 # O-DU(0) | O-RU(1) xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R +antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B +antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B +antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R #UEs muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources @@ -70,14 +70,14 @@ antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 +#antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 +#antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 +#antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 +#antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 +#antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 +#antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 +#antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 +#antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 #SlotNumTx0=./peak_txconfig_1.cfg #SlotNumTx1=./peak_txconfig_1.cfg @@ -112,14 +112,14 @@ DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX anten DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] #UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] @@ -130,27 +130,32 @@ UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX anten UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used nPrbElemDl=6 +extType=1 + #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemDl0=0,48,0,14,0,1,1,9,1 @@ -160,13 +165,13 @@ PrbElemDl3=144,48,0,14,3,1,1,9,1 PrbElemDl4=192,48,0,14,4,1,1,9,1 PrbElemDl5=240,33,0,14,5,1,1,9,1 # Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,24,0,0,9,1 -ExtBfwDl1=2,24,0,0,9,1 -ExtBfwDl2=2,24,0,0,9,1 -ExtBfwDl3=2,24,0,0,9,1 -ExtBfwDl4=2,24,0,0,9,1 -ExtBfwDl5=2,17,0,0,9,1 +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,24,0,0,9,1,1 +ExtBfwDl1=2,24,0,0,9,1,1 +ExtBfwDl2=2,24,0,0,9,1,1 +ExtBfwDl3=2,24,0,0,9,1,1 +ExtBfwDl4=2,24,0,0,9,1,1 +ExtBfwDl5=2,17,0,0,9,1,1 nPrbElemUl=6 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType @@ -178,16 +183,17 @@ PrbElemUl3=144,48,0,14,3,1,1,9,1 PrbElemUl4=192,48,0,14,4,1,1,9,1 PrbElemUl5=240,33,0,14,5,1,1,9,1 # Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,24,0,0,9,1 -ExtBfwUl1=2,24,0,0,9,1 -ExtBfwUl2=2,24,0,0,9,1 -ExtBfwUl3=2,24,0,0,9,1 -ExtBfwUl4=2,24,0,0,9,1 -ExtBfwUl5=2,17,0,0,9,1 +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,24,0,0,9,1,1 +ExtBfwUl1=2,24,0,0,9,1,1 +ExtBfwUl2=2,24,0,0,9,1,1 +ExtBfwUl3=2,24,0,0,9,1,1 +ExtBfwUl4=2,24,0,0,9,1,1 +ExtBfwUl5=2,17,0,0,9,1,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### @@ -195,7 +201,7 @@ PrbElemSrs0=0,273,0,14,0,0,1,9,0 iqswap=0 #do swap of IQ before send buffer to eth nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane + ##Debug debugStop=1 #stop app on 1pps boundary (gps_second % 30) debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary @@ -204,7 +210,7 @@ bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardw CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled ##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU +totalBFWeights=32 # Total number of Beamforming Weights on RU Tadv_cp_dl=25 # in us # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/184/peak_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/184/peak_o_ru.dat new file mode 100644 index 0000000..64be055 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/184/peak_o_ru.dat @@ -0,0 +1,303 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +#Peak: 100 % +#184 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % + + + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) +antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B +antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B +antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R + +#UEs +muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources +DlLayersPerUe=1 #number of RX anntennas on DL UE side +UlLayersPerUe=1 #number of TX anntennas on UL UE side + + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 +antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 +antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 +antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 +antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 +antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 +antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 +#antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 +#antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 +#antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 +#antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 +#antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 +#antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 +#antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 + +#SlotNumTx0=./peak_txconfig_1.cfg +#SlotNumTx1=./peak_txconfig_1.cfg +#SlotNumTx2=./peak_txconfig_1.cfg +#SlotNumTx3=./peak_txconfig_2.cfg +#SlotNumTx4=./peak_txconfig_0.cfg + +#SlotNumTx5=./peak_txconfig_1.cfg +#SlotNumTx6=./peak_txconfig_1.cfg +#SlotNumTx7=./peak_txconfig_1.cfg +#SlotNumTx8=./peak_txconfig_2.cfg +#SlotNumTx9=./peak_txconfig_0.cfg + +#SlotNumRx0=./peak_rxconfig_0.cfg +#SlotNumRx1=./peak_rxconfig_0.cfg +#SlotNumRx2=./peak_rxconfig_0.cfg +#SlotNumRx3=./peak_rxconfig_2.cfg +#SlotNumRx4=./peak_rxconfig_1.cfg + +#SlotNumRx5=./peak_rxconfig_0.cfg +#SlotNumRx6=./peak_rxconfig_0.cfg +#SlotNumRx7=./peak_rxconfig_0.cfg +#SlotNumRx8=./peak_rxconfig_3.cfg +#SlotNumRx9=./peak_rxconfig_1.cfg + + +#TODO: +antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 +antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 +antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 +antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 +antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 +antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 +antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 +antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 +#antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 +#antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 +#antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 +#antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 +#antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 +#antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 +#antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 + +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=189 + +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) + +antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin +antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin +antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin +antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin + +#DL PRB / % Used RBs UL PRB / % Used RBs +#66% 180 33% 90 + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=6 +extType=1 + +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,48,0,14,0,1,1,9,1 +PrbElemDl1=48,48,0,14,1,1,1,9,1 +PrbElemDl2=96,48,0,14,2,1,1,9,1 +PrbElemDl3=144,48,0,14,3,1,1,9,1 +PrbElemDl4=192,48,0,14,4,1,1,9,1 +PrbElemDl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,24,0,0,9,1,1 +ExtBfwDl1=2,24,0,0,9,1,1 +ExtBfwDl2=2,24,0,0,9,1,1 +ExtBfwDl3=2,24,0,0,9,1,1 +ExtBfwDl4=2,24,0,0,9,1,1 +ExtBfwDl5=2,17,0,0,9,1,1 + +nPrbElemUl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,48,0,14,0,1,1,9,1 +PrbElemUl1=48,48,0,14,1,1,1,9,1 +PrbElemUl2=96,48,0,14,2,1,1,9,1 +PrbElemUl3=144,48,0,14,3,1,1,9,1 +PrbElemUl4=192,48,0,14,4,1,1,9,1 +PrbElemUl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,24,0,0,9,1,1 +ExtBfwUl1=2,24,0,0,9,1,1 +ExtBfwUl2=2,24,0,0,9,1,1 +ExtBfwUl3=2,24,0,0,9,1,1 +ExtBfwUl4=2,24,0,0,9,1,1 +ExtBfwUl5=2,17,0,0,9,1,1 + +nPrbElemSrs=1 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order +compression=1 # (1) compression enabled (0) compression disabled + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +Tadv_cp_dl=25 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=285 # 285.42us +T2a_max_cp_dl=429 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=285 # 285.42us +T2a_max_cp_ul=429 # 428.12us + +#Reception Window U-plane +T2a_min_up=71 # 71.35in us +T2a_max_up=428 # 428.12us + +#Transmission Window +Ta3_min=20 # in us +Ta3_max=32 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=285 +T1a_max_cp_dl=429 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=300 + +#U-plane +##Transmission Window +T1a_min_up=96 #71 + 25 us +T1a_max_up=196 #71 + 25 us + +#Reception Window +Ta4_min=0 # in us +Ta4_max=75 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/184/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/184/usecase_du.cfg new file mode 100644 index 0000000..8deba5f --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/184/usecase_du.cfg @@ -0,0 +1,63 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +#===== Test case for 32T32R antElm, 8 DL 4 UL layers , 1 CC ===== +# This is simple configuration file. Use '#' sign for comments +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system + +mainCore=20 #core for main() +systemCore=22 +ioCore=28 # core id +#ioWorker=0x000000000 # mask [0- no workers] +#ioWorker=0x8000040000 # mask [0- no workers] +ioWorker=0x020000000 # mask [0- no workers] +#ioWorker=0x700000600 +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml +dpdkMemorySize=8192 +iovaMode=0 + +oXuNum=1 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./peak_o_du.dat #O-DU0 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 + +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/184/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/184/usecase_du_icx.cfg new file mode 100644 index 0000000..d9eb3fe --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/184/usecase_du_icx.cfg @@ -0,0 +1,60 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system + +mainCore=0 #core for main() +systemCore=2 +ioCore=8 # core id +ioWorker=0x200 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du_icx.xml + +dpdkMemorySize=8192 +iovaMode=0 + +oXuNum=1 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./peak_o_du.dat #O-DU0 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 + +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/184/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/184/usecase_ru.cfg new file mode 100644 index 0000000..a5a19c8 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/184/usecase_ru.cfg @@ -0,0 +1,61 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +#===== Test case for 32T32R antElm, 8 DL 4 UL layers , 1 CC ===== +appMode=1 # All O-DU(0) | O-RU(1) +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +mainCore=0 #core for main() +systemCore=2 +ioCore=8 # core id +#ioWorker=0x800000000 # mask [0- no workers] +#ioWorker=0x800004000 # mask [0- no workers] +#ioWorker=0xc000000 # second socket +ioWorker=0x3E00 # second socket + +dpdkMemorySize=8192 +iovaMode=0 + +oXuNum=1 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./peak_o_ru.dat #O-RU0 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:00 +oXuRem0Mac1=00:11:22:33:00:10 +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:20 +oXuRem0Mac3=00:11:22:33:00:30 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:00 +oXuRem1Mac1=00:11:22:33:01:10 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:20 +oXuRem1Mac3=00:11:22:33:01:30 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:00 +oXuRem2Mac1=00:11:22:33:02:10 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:20 +oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/801/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/184/usecase_ru_icx.cfg similarity index 90% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/801/usecase_ru.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/184/usecase_ru_icx.cfg index 6aa5aad..33b0917 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/801/usecase_ru.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/184/usecase_ru_icx.cfg @@ -15,15 +15,16 @@ # limitations under the License. # #******************************************************************************/ + # This is simple configuration file. Use '#' sign for comments appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system mainCore=0 #core for main() systemCore=2 -ioCore=4 # core id -ioWorker=0x3E0 # second socket +ioCore=8 # core id +ioWorker=0x3E00 # second socket + dpdkMemorySize=8192 -#dpdkMemorySize=17408 iovaMode=0 oXuNum=1 # numbers of O-RU connected to O-DU @@ -32,8 +33,7 @@ oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 - +oXuCfgFile0=./peak_o_ru.dat #O-RU0 # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:00 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/1841/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1841/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1841/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/1841/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1841/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1841/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_o_du_tst376.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1841/peak_o_du_tst376.dat similarity index 76% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_o_du_tst376.dat rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/1841/peak_o_du_tst376.dat index 94876e3..803946f 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_o_du_tst376.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1841/peak_o_du_tst376.dat @@ -26,9 +26,9 @@ instanceId=0 # 0,1,2,... in case more than 1 application started on the same sys appMode=0 # O-DU(0) | O-RU(1) xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R +antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B +antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B +antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R #UEs muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources @@ -70,14 +70,14 @@ antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 +#antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 +#antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 +#antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 +#antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 +#antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 +#antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 +#antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 +#antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 #SlotNumTx0=./peak_txconfig_1.cfg #SlotNumTx1=./peak_txconfig_1.cfg @@ -112,14 +112,14 @@ DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX anten DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] #UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] @@ -130,21 +130,24 @@ UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX anten UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -187,8 +190,8 @@ ExtBfwUl4=2,24,0,0,9,1 ExtBfwUl5=2,17,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 -#PrbElemSrs1=136,137,0,14,0,0,0,16,0 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### @@ -196,7 +199,7 @@ PrbElemSrs0=0,273,0,14,0,0,1,9,0 iqswap=0 #do swap of IQ before send buffer to eth nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane + ##Debug debugStop=1 #stop app on 1pps boundary (gps_second % 30) debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary @@ -205,7 +208,7 @@ bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardw CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled ##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU +totalBFWeights=32 # Total number of Beamforming Weights on RU Tadv_cp_dl=25 # in us # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1841/peak_o_ru_tst376.dat similarity index 73% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_o_ru.dat rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/1841/peak_o_ru_tst376.dat index c156347..69ffee9 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1841/peak_o_ru_tst376.dat @@ -26,9 +26,9 @@ instanceId=1 # 0,1,2,... in case more than 1 application started on the same sys appMode=1 # O-DU(0) | O-RU(1) xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R +antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B +antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B +antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R #UEs muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources @@ -70,14 +70,14 @@ antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 +#antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 +#antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 +#antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 +#antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 +#antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 +#antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 +#antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 +#antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 #SlotNumTx0=./peak_txconfig_1.cfg #SlotNumTx1=./peak_txconfig_1.cfg @@ -104,7 +104,7 @@ antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 #SlotNumRx9=./peak_rxconfig_1.cfg - +#TODO: antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 @@ -113,20 +113,23 @@ antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +#antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 +#antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 +#antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 +#antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 +#antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 +#antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 +#antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 +#antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 + +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=0 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -160,38 +163,38 @@ antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin #DL PRB / % Used RBs UL PRB / % Used RBs #66% 180 33% 90 @@ -237,7 +240,8 @@ ExtBfwUl4=2,24,0,0,9,1 ExtBfwUl5=2,17,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### @@ -245,7 +249,7 @@ PrbElemSrs0=0,273,0,14,0,0,1,9,0 iqswap=0 #do swap of IQ before send buffer to eth nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane + ##Debug debugStop=1 #stop app on 1pps boundary (gps_second % 30) debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary @@ -254,7 +258,7 @@ bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardw CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled ##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU +totalBFWeights=32 # Total number of Beamforming Weights on RU Tadv_cp_dl=25 # in us # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/usecase_du_csx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1841/usecase_du.cfg similarity index 91% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/usecase_du_csx.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/1841/usecase_du.cfg index 4d9f87d..095675b 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/usecase_du_csx.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1841/usecase_du.cfg @@ -15,6 +15,8 @@ # limitations under the License. # #******************************************************************************/ + +#===== Test case for 32T32R antElm, 8 DL 4 UL layers , 1 CC ===== # This is simple configuration file. Use '#' sign for comments appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system @@ -24,21 +26,19 @@ systemCore=22 ioCore=28 # core id #ioWorker=0x000000000 # mask [0- no workers] #ioWorker=0x8000040000 # mask [0- no workers] -ioWorker=0x1E0000000 # mask [0- no workers] +ioWorker=0x020000000 # mask [0- no workers] #ioWorker=0x700000600 -dpdkMemorySize=16384 +dpdkMemorySize=8192 iovaMode=0 -oXuNum=3 # numbers of O-RU connected to O-DU +oXuNum=1 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs oXuCfgFile0=./peak_o_du_tst376.dat #O-DU0 -oXuCfgFile1=./avg_o_du_tst377.dat #O-DU1 -oXuCfgFile2=./avg_o_du_tst377.dat #O-DU2 # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:01 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/504/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1841/usecase_du_icx.cfg similarity index 93% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/504/usecase_du_icx.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/1841/usecase_du_icx.cfg index 71f7c1d..47f24f1 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/504/usecase_du_icx.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1841/usecase_du_icx.cfg @@ -15,16 +15,17 @@ # limitations under the License. # #******************************************************************************/ + # This is simple configuration file. Use '#' sign for comments appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system mainCore=0 #core for main() systemCore=2 -ioCore=21 # core id -ioWorker=0x200000000000 # mask [0- no workers] -dpdkMemorySize=8192 +ioCore=8 # core id +ioWorker=0x200 # mask [0- no workers] +dpdkMemorySize=8192 iovaMode=0 oXuNum=1 # numbers of O-RU connected to O-DU @@ -33,7 +34,7 @@ oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs -oXuCfgFile0=./config_file_o_du.dat #O-RU0 +oXuCfgFile0=./peak_o_du_tst376.dat #O-DU0 # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:01 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/usecase_ru_csx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1841/usecase_ru.cfg similarity index 88% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/usecase_ru_csx.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/1841/usecase_ru.cfg index 8ee5ce3..20435ec 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/usecase_ru_csx.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1841/usecase_ru.cfg @@ -15,29 +15,29 @@ # limitations under the License. # #******************************************************************************/ + # This is simple configuration file. Use '#' sign for comments +#===== Test case for 32T32R antElm, 8 DL 4 UL layers , 1 CC ===== appMode=1 # All O-DU(0) | O-RU(1) instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -mainCore=20 #core for main() -systemCore=22 -ioCore=28 # core id +mainCore=0 #core for main() +systemCore=2 +ioCore=8 # core id #ioWorker=0x800000000 # mask [0- no workers] #ioWorker=0x800004000 # mask [0- no workers] #ioWorker=0xc000000 # second socket -ioWorker=0x3E0000000 # second socket +ioWorker=0x3E00 # second socket -dpdkMemorySize=16384 +dpdkMemorySize=8192 iovaMode=0 -oXuNum=3 # numbers of O-RU connected to O-DU +oXuNum=1 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs oXuCfgFile0=./peak_o_ru_tst376.dat #O-RU0 -oXuCfgFile1=./avg_o_ru_tst377.dat #O-RU1 -oXuCfgFile2=./avg_o_ru_tst377.dat #O-RU2 # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:00 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/805/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1841/usecase_ru_icx.cfg similarity index 90% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/805/usecase_ru.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/1841/usecase_ru_icx.cfg index 7d7d28a..0b67ec2 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/805/usecase_ru.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/1841/usecase_ru_icx.cfg @@ -15,15 +15,16 @@ # limitations under the License. # #******************************************************************************/ + # This is simple configuration file. Use '#' sign for comments appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system mainCore=0 #core for main() systemCore=2 -ioCore=4 # core id -ioWorker=0x3E0 # second socket +ioCore=8 # core id +ioWorker=0x3E00 # second socket + dpdkMemorySize=8192 -#dpdkMemorySize=17408 iovaMode=0 oXuNum=1 # numbers of O-RU connected to O-DU @@ -32,7 +33,7 @@ oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 +oXuCfgFile0=./peak_o_ru_tst376.dat #O-RU0 # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:00 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/2/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..f2dfa93 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 10 + + 10 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/2/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/2/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2/config_file_o_du.dat index 90f1fab..f352ca4 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/2/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2/config_file_o_du.dat @@ -21,7 +21,7 @@ instanceId=0 # 0,1,2,... in case more than 1 application started on the same system appMode=0 # O-DU(0) | O-RU(1) xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=2 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R @@ -64,19 +64,19 @@ Gps_Beta=0 ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] -ioSleep=1 +#ioSleep=1 # Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app # Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app numSlots=20 #number of slots per IQ files antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 @@ -133,16 +133,19 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=0 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=0 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - +extType=1 nPrbElemDl=4 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams @@ -154,6 +157,13 @@ PrbElemDl4=144,36,0,14,5,1,1,9,1 PrbElemDl5=180,36,0,14,6,1,1,9,1 PrbElemDl6=216,36,0,14,7,1,1,9,1 PrbElemDl7=252,21,0,14,8,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,24,0,0,9,1,1 +ExtBfwDl1=2,24,0,0,9,1,1 +ExtBfwDl2=2,24,0,0,9,1,1 +ExtBfwDl3=2,24,0,0,9,1,1 + nPrbElemUl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams @@ -165,6 +175,13 @@ PrbElemUl4=144,36,0,14,5,1,1,9,1 PrbElemUl5=180,36,0,14,6,1,1,9,1 PrbElemUl6=216,36,0,14,7,1,1,9,1 PrbElemUl7=252,21,0,14,8,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,24,0,0,9,1,1 +ExtBfwUl1=2,24,0,0,9,1,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/2/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2/config_file_o_ru.dat index 1031aea..3ec32b7 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/2/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2/config_file_o_ru.dat @@ -21,7 +21,7 @@ instanceId=1 # 0,1,2,... in case more than 1 application started on the same system appMode=1 # O-DU(0) | O-RU(1) xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=2 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R @@ -64,19 +64,19 @@ Gps_Beta=0 ioCore=15 ioWorker=0x800000000 -ioSleep=1 + # Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app +#duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF +#ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app # Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app +#duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF +#ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app numSlots=20 #number of slots per IQ files antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 @@ -113,11 +113,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=0 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=0 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -188,7 +191,7 @@ antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin ########################################################### ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - +extType=1 nPrbElemDl=4 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams @@ -196,12 +199,35 @@ PrbElemDl0=0,48,0,14,1,1,1,9,1 PrbElemDl1=48,48,0,14,2,1,1,9,1 PrbElemDl2=96,48,0,14,3,1,1,9,1 PrbElemDl3=144,48,0,14,4,1,1,9,1 +PrbElemDl4=144,36,0,14,5,1,1,9,1 +PrbElemDl5=180,36,0,14,6,1,1,9,1 +PrbElemDl6=216,36,0,14,7,1,1,9,1 +PrbElemDl7=252,21,0,14,8,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,24,0,0,9,1,1 +ExtBfwDl1=2,24,0,0,9,1,1 +ExtBfwDl2=2,24,0,0,9,1,1 +ExtBfwDl3=2,24,0,0,9,1,1 nPrbElemUl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemUl0=0,48,0,14,1,1,1,9,1 PrbElemUl1=48,48,0,14,2,1,1,9,1 +PrbElemUl2=72,36,0,14,3,1,1,9,1 +PrbElemUl3=108,36,0,14,4,1,1,9,1 +PrbElemUl4=144,36,0,14,5,1,1,9,1 +PrbElemUl5=180,36,0,14,6,1,1,9,1 +PrbElemUl6=216,36,0,14,7,1,1,9,1 +PrbElemUl7=252,21,0,14,8,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,24,0,0,9,1,1 +ExtBfwUl1=2,24,0,0,9,1,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/2/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2/usecase_du.cfg index 5c067f4..bcbc49a 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/2/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2/usecase_du.cfg @@ -20,7 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] - +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/201/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/201/config_file_o_du.dat index 04bd7b4..2f7da13 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/201/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/201/config_file_o_du.dat @@ -116,11 +116,14 @@ UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX anten UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -154,6 +157,9 @@ ExtBfwUl1=12,4,0,0,9,1 ExtBfwUl2=12,4,0,0,9,1 ExtBfwUl3=12,4,0,0,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/201/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/201/config_file_o_ru.dat index 6b0db13..48ed086 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/201/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/201/config_file_o_ru.dat @@ -111,11 +111,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -171,6 +174,9 @@ PrbElemUl1=48,48,0,14,2,1,1,9,1 PrbElemUl2=96,48,0,14,3,1,1,9,1 PrbElemUl3=144,48,0,14,4,1,1,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/201/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/201/usecase_du.cfg index 5c067f4..12d06c3 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/201/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/201/usecase_du.cfg @@ -20,6 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/202/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/202/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..2bf7e5f --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/202/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 8 + + 8 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/202/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/202/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/202/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/202/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/202/config_file_o_du.dat index 8f05147..dc96cae 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/202/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/202/config_file_o_du.dat @@ -133,11 +133,14 @@ UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX ante UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -179,6 +182,9 @@ ExtBfwUl3=12,4,0,0,9,1 ExtBfwUl4=12,4,0,0,9,1 ExtBfwUl5=11,3,0,0,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/202/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/202/config_file_o_ru.dat index a82daec..42876c4 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/202/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/202/config_file_o_ru.dat @@ -112,11 +112,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -207,6 +210,9 @@ PrbElemUl3=144,48,0,14,4,1,1,9,1 PrbElemUl4=192,48,0,14,5,1,1,9,1 PrbElemUl5=240,33,0,14,6,1,1,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/202/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/202/usecase_du.cfg index 5c067f4..bcbc49a 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/202/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/202/usecase_du.cfg @@ -20,7 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] - +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/203/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/203/config_file_o_du.dat index 38e4f73..587821f 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/203/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/203/config_file_o_du.dat @@ -134,11 +134,14 @@ UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX ante UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -168,6 +171,9 @@ PrbElemUl1=48,48,0,14,2,1,1,9,1 ExtBfwUl0=12,4,0,0,9,1 ExtBfwUl1=12,4,0,0,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/203/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/203/config_file_o_ru.dat index def1a53..875aab1 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/203/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/203/config_file_o_ru.dat @@ -113,11 +113,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -202,6 +205,9 @@ nPrbElemUl=2 PrbElemUl0=0,48,0,14,1,1,1,9,1 PrbElemUl1=48,48,0,14,2,1,1,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/203/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/203/usecase_du.cfg index 5c067f4..9f52c58 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/203/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/203/usecase_du.cfg @@ -20,7 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] - +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/204/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/204/config_file_o_du.dat index 8369d0d..892e621 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/204/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/204/config_file_o_du.dat @@ -134,11 +134,14 @@ UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX ante UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -168,6 +171,9 @@ PrbElemUl1=48,48,0,14,2,1,1,9,1 ExtBfwUl0=12,4,0,0,9,1 ExtBfwUl1=12,4,0,0,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/204/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/204/config_file_o_ru.dat index f998ef7..615ec40 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/204/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/204/config_file_o_ru.dat @@ -113,11 +113,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -202,6 +205,9 @@ nPrbElemUl=2 PrbElemUl0=0,48,0,14,1,1,1,9,1 PrbElemUl1=48,48,0,14,2,1,1,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/204/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/204/usecase_du.cfg index 5c067f4..9f52c58 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/204/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/204/usecase_du.cfg @@ -20,7 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] - +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/205/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/205/config_file_o_du.dat index f3ef96c..6ca1995 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/205/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/205/config_file_o_du.dat @@ -133,11 +133,14 @@ UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX ante UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) #DL PRB / % Used RBs UL PRB / % Used RBs #33% 90 33% 90 @@ -170,6 +173,9 @@ PrbElemUl1=48,48,0,14,2,1,1,9,1 ExtBfwUl0=12,4,0,0,9,1 ExtBfwUl1=12,4,0,0,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/205/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/205/config_file_o_ru.dat index 88b8476..9b5a1e5 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/205/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/205/config_file_o_ru.dat @@ -112,11 +112,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -204,6 +207,9 @@ nPrbElemUl=2 PrbElemUl0=0,48,0,14,1,1,1,9,1 PrbElemUl1=48,48,0,14,2,1,1,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/205/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/205/usecase_du.cfg index 5c067f4..9f52c58 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/205/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/205/usecase_du.cfg @@ -20,7 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] - +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/205/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/205/usecase_ru.cfg deleted file mode 100644 index 1ab0180..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/205/usecase_ru.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -ioCore=15 # core id -ioWorker=0x800000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:11.0 -#PciBusAddoXu0Vf1=0000:51:11.1 -#PciBusAddoXu0Vf2=0000:51:11.2 -#PciBusAddoXu0Vf3=0000:51:11.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:11.4 -#PciBusAddoXu1Vf1=0000:51:11.5 -#PciBusAddoXu1Vf2=0000:51:11.6 -#PciBusAddoXu1Vf3=0000:51:11.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:12.0 -#PciBusAddoXu2Vf1=0000:51:12.1 -#PciBusAddoXu2Vf2=0000:51:12.2 -#PciBusAddoXu2Vf3=0000:51:12.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/206/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/206/config_file_o_du.dat index c6d502e..5d0d560 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/206/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/206/config_file_o_du.dat @@ -133,11 +133,14 @@ UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX ante UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) #DL PRB / % Used RBs UL PRB / % Used RBs #33% 90 33% 90 @@ -174,6 +177,9 @@ ExtBfwUl1=12,4,0,0,9,1 ExtBfwUl2=12,4,0,0,9,1 ExtBfwUl3=12,4,0,0,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/206/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/206/config_file_o_ru.dat index 6eef136..bec4aa6 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/206/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/206/config_file_o_ru.dat @@ -112,11 +112,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -206,6 +209,9 @@ PrbElemUl1=48,48,0,14,2,1,1,9,1 PrbElemUl2=96,48,0,14,3,1,1,9,1 PrbElemUl3=144,48,0,14,4,1,1,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/206/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/206/usecase_du.cfg index 5c067f4..9f52c58 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/206/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/206/usecase_du.cfg @@ -20,7 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] - +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/211/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/211/config_file_o_du.dat index a619b7e..f302665 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/211/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/211/config_file_o_du.dat @@ -116,11 +116,14 @@ UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX anten UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -154,6 +157,9 @@ ExtBfwUl1=12,4,0,0,9,1 ExtBfwUl2=12,4,0,0,9,1 ExtBfwUl3=12,4,0,0,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/211/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/211/config_file_o_ru.dat index 715ab9c..fb2f1a0 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/211/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/211/config_file_o_ru.dat @@ -111,11 +111,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -171,6 +174,9 @@ PrbElemUl1=48,48,0,14,2,1,1,9,1 PrbElemUl2=96,48,0,14,3,1,1,9,1 PrbElemUl3=144,48,0,14,4,1,1,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/211/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/211/usecase_du.cfg index 5c067f4..9f52c58 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/211/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/211/usecase_du.cfg @@ -20,7 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] - +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/212/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/212/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..2bf7e5f --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/212/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 8 + + 8 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/212/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/212/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/212/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/212/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/212/config_file_o_du.dat index 3616b8b..859e486 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/212/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/212/config_file_o_du.dat @@ -25,7 +25,7 @@ appMode=0 # O-DU(0) | O-RU(1) xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B +antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R #UEs @@ -64,21 +64,6 @@ MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protoco Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec Gps_Beta=0 -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - numSlots=20 #number of slots per IQ files antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 @@ -133,11 +118,14 @@ UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX ante UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -154,12 +142,12 @@ PrbElemDl4=192,48,0,14,5,1,1,9,1 PrbElemDl5=240,33,0,14,6,1,1,9,1 # Extension Parameters for Beamforming weights # numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=12,4,0,0,9,1 -ExtBfwDl4=12,4,0,0,9,1 -ExtBfwDl5=11,3,0,0,9,1 +ExtBfwDl0=2,24,0,0,9,1 +ExtBfwDl1=2,24,0,0,9,1 +ExtBfwDl2=2,24,0,0,9,1 +ExtBfwDl3=2,24,0,0,9,1 +ExtBfwDl4=2,24,0,0,9,1 +ExtBfwDl5=2,17,0,0,9,1 nPrbElemUl=6 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType @@ -172,12 +160,15 @@ PrbElemUl4=192,48,0,14,5,1,1,9,1 PrbElemUl5=240,33,0,14,6,1,1,9,1 # Extension Parameters for Beamforming weights # numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=12,4,0,0,9,1 -ExtBfwUl4=12,4,0,0,9,1 -ExtBfwUl5=11,3,0,0,9,1 +ExtBfwUl0=2,24,0,0,9,1 +ExtBfwUl1=2,24,0,0,9,1 +ExtBfwUl2=2,24,0,0,9,1 +ExtBfwUl3=2,24,0,0,9,1 +ExtBfwUl4=2,24,0,0,9,1 +ExtBfwUl5=2,17,0,0,9,1 + +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/212/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/212/config_file_o_ru.dat index 73297e7..aa7e82d 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/212/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/212/config_file_o_ru.dat @@ -25,7 +25,7 @@ appMode=1 # O-DU(0) | O-RU(1) xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B +antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R #UEs @@ -64,19 +64,6 @@ MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protoco Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec Gps_Beta=0 -ioCore=15 -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - numSlots=20 #number of slots per IQ files antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 @@ -112,11 +99,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -196,6 +186,15 @@ PrbElemDl2=96,48,0,14,3,1,1,9,1 PrbElemDl3=144,48,0,14,4,1,1,9,1 PrbElemDl4=192,48,0,14,5,1,1,9,1 PrbElemDl5=240,33,0,14,6,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth +ExtBfwDl0=2,24,0,0,9,1 +ExtBfwDl1=2,24,0,0,9,1 +ExtBfwDl2=2,24,0,0,9,1 +ExtBfwDl3=2,24,0,0,9,1 +ExtBfwDl4=2,24,0,0,9,1 +ExtBfwDl5=2,17,0,0,9,1 + nPrbElemUl=6 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType @@ -206,6 +205,17 @@ PrbElemUl2=96,48,0,14,3,1,1,9,1 PrbElemUl3=144,48,0,14,4,1,1,9,1 PrbElemUl4=192,48,0,14,5,1,1,9,1 PrbElemUl5=240,33,0,14,6,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth +ExtBfwUl0=2,24,0,0,9,1 +ExtBfwUl1=2,24,0,0,9,1 +ExtBfwUl2=2,24,0,0,9,1 +ExtBfwUl3=2,24,0,0,9,1 +ExtBfwUl4=2,24,0,0,9,1 +ExtBfwUl5=2,17,0,0,9,1 + +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/212/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/212/usecase_du.cfg index 5c067f4..358e178 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/212/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/212/usecase_du.cfg @@ -18,37 +18,27 @@ # This is simple configuration file. Use '#' sign for comments appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] +mainCore=0 #core for main() +systemCore=2 +ioCore=10 # core id +ioWorker=0x4000000000000 # mask [0- no workers] +dpdkMemorySize=8192 +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml + +iovaMode=0 oXuNum=1 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs oXuCfgFile0=./config_file_o_du.dat #O-RU0 -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:01.0 -#PciBusAddoXu0Vf1=0000:51:01.1 -#PciBusAddoXu0Vf2=0000:51:01.2 -#PciBusAddoXu0Vf3=0000:51:01.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:01.4 -#PciBusAddoXu1Vf1=0000:51:01.5 -#PciBusAddoXu1Vf2=0000:51:01.6 -#PciBusAddoXu1Vf3=0000:51:01.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:02.0 -#PciBusAddoXu2Vf1=0000:51:02.1 -#PciBusAddoXu2Vf2=0000:51:02.2 -#PciBusAddoXu2Vf3=0000:51:02.3 - # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:01 oXuRem0Mac1=00:11:22:33:00:11 + # remote O-XU 0 Eth Link 1 oXuRem0Mac2=00:11:22:33:00:21 oXuRem0Mac3=00:11:22:33:00:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/212/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/212/usecase_ru.cfg index 1ab0180..3ab240f 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/212/usecase_ru.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/212/usecase_ru.cfg @@ -24,28 +24,11 @@ ioWorker=0x800000000 # mask [0- no workers] oXuNum=1 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs oXuCfgFile0=./config_file_o_ru.dat #O-RU0 -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:11.0 -#PciBusAddoXu0Vf1=0000:51:11.1 -#PciBusAddoXu0Vf2=0000:51:11.2 -#PciBusAddoXu0Vf3=0000:51:11.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:11.4 -#PciBusAddoXu1Vf1=0000:51:11.5 -#PciBusAddoXu1Vf2=0000:51:11.6 -#PciBusAddoXu1Vf3=0000:51:11.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:12.0 -#PciBusAddoXu2Vf1=0000:51:12.1 -#PciBusAddoXu2Vf2=0000:51:12.2 -#PciBusAddoXu2Vf3=0000:51:12.3 - # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:00 oXuRem0Mac1=00:11:22:33:00:10 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/213/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/213/config_file_o_du.dat index 65b7ec2..b5f6bb9 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/213/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/213/config_file_o_du.dat @@ -134,11 +134,14 @@ UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX ante UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -168,6 +171,9 @@ PrbElemUl1=48,48,0,14,2,1,1,9,1 ExtBfwUl0=12,4,0,0,9,1 ExtBfwUl1=12,4,0,0,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/213/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/213/config_file_o_ru.dat index 9d85f04..15c8885 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/213/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/213/config_file_o_ru.dat @@ -113,11 +113,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -202,6 +205,9 @@ nPrbElemUl=2 PrbElemUl0=0,48,0,14,1,1,1,9,1 PrbElemUl1=48,48,0,14,2,1,1,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/213/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/213/usecase_du.cfg index 5c067f4..9f52c58 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/213/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/213/usecase_du.cfg @@ -20,7 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] - +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/214/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/214/config_file_o_du.dat index 68b8ab5..faef29c 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/214/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/214/config_file_o_du.dat @@ -134,11 +134,14 @@ UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX ante UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -168,6 +171,9 @@ PrbElemUl1=48,48,0,14,2,1,1,9,1 ExtBfwUl0=12,4,0,0,9,1 ExtBfwUl1=12,4,0,0,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/214/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/214/config_file_o_ru.dat index 25a2865..c895ae6 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/214/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/214/config_file_o_ru.dat @@ -113,11 +113,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -202,6 +205,9 @@ nPrbElemUl=2 PrbElemUl0=0,48,0,14,1,1,1,9,1 PrbElemUl1=48,48,0,14,2,1,1,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/214/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/214/usecase_du.cfg index 5c067f4..9f52c58 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/214/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/214/usecase_du.cfg @@ -20,7 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] - +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/215/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/215/config_file_o_du.dat index e56d192..07cdeb4 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/215/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/215/config_file_o_du.dat @@ -133,11 +133,14 @@ UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX ante UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) #DL PRB / % Used RBs UL PRB / % Used RBs #33% 90 33% 90 @@ -170,6 +173,9 @@ PrbElemUl1=48,48,0,14,2,1,1,9,1 ExtBfwUl0=12,4,0,0,9,1 ExtBfwUl1=12,4,0,0,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/215/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/215/config_file_o_ru.dat index cfecdaf..7277c44 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/215/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/215/config_file_o_ru.dat @@ -112,11 +112,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -204,6 +207,9 @@ nPrbElemUl=2 PrbElemUl0=0,48,0,14,1,1,1,9,1 PrbElemUl1=48,48,0,14,2,1,1,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/215/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/215/usecase_du.cfg index 5c067f4..9f52c58 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/215/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/215/usecase_du.cfg @@ -20,7 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] - +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/216/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/216/config_file_o_du.dat index badad92..c1faafc 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/216/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/216/config_file_o_du.dat @@ -133,11 +133,14 @@ UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX ante UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) #DL PRB / % Used RBs UL PRB / % Used RBs #33% 90 33% 90 @@ -174,6 +177,9 @@ ExtBfwUl1=12,4,0,0,9,1 ExtBfwUl2=12,4,0,0,9,1 ExtBfwUl3=12,4,0,0,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/216/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/216/config_file_o_ru.dat index 84aaebb..ac02a9d 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/216/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/216/config_file_o_ru.dat @@ -112,11 +112,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -206,6 +209,9 @@ PrbElemUl1=48,48,0,14,2,1,1,9,1 PrbElemUl2=96,48,0,14,3,1,1,9,1 PrbElemUl3=144,48,0,14,4,1,1,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/216/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/216/usecase_du.cfg index 5c067f4..dba74dd 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/216/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/216/usecase_du.cfg @@ -26,6 +26,8 @@ oXuNum=1 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml + oXuCfgFile0=./config_file_o_du.dat #O-RU0 #O-XU 0 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/221/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/221/config_file_o_du.dat deleted file mode 100644 index 140e216..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/221/config_file_o_du.dat +++ /dev/null @@ -1,212 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD DDDSUUDDDD: S it's 6:4:4 1 8T8R 100 8 4 70.3% 192 2304 70.0% 191 2292 new added 70% with 8T8R - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,1,1,1,9,1 -PrbElemDl1=48,48,0,14,2,1,1,9,1 -PrbElemDl2=96,48,0,14,3,1,1,9,1 -PrbElemDl3=144,48,0,14,4,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=12,4,0,0,9,1 - -nPrbElemUl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,1,1,1,9,1 -PrbElemUl1=48,48,0,14,2,1,1,9,1 -PrbElemUl2=96,48,0,14,3,1,1,9,1 -PrbElemUl3=144,48,0,14,4,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=12,4,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/221/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/221/config_file_o_ru.dat deleted file mode 100644 index 0e02bd3..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/221/config_file_o_ru.dat +++ /dev/null @@ -1,229 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD DDDSUUDDDD: S it's 6:4:4 1 8T8R 100 8 4 70.3% 192 2304 70.0% 191 2292 new added 70% with 8T8R - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=15 -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin - - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,1,1,1,9,1 -PrbElemDl1=48,48,0,14,2,1,1,9,1 -PrbElemDl2=96,48,0,14,3,1,1,9,1 -PrbElemDl3=144,48,0,14,4,1,1,9,1 - -nPrbElemUl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,1,1,1,9,1 -PrbElemUl1=48,48,0,14,2,1,1,9,1 -PrbElemUl2=96,48,0,14,3,1,1,9,1 -PrbElemUl3=144,48,0,14,4,1,1,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/221/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/221/usecase_du.cfg deleted file mode 100644 index 5c067f4..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/221/usecase_du.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:01.0 -#PciBusAddoXu0Vf1=0000:51:01.1 -#PciBusAddoXu0Vf2=0000:51:01.2 -#PciBusAddoXu0Vf3=0000:51:01.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:01.4 -#PciBusAddoXu1Vf1=0000:51:01.5 -#PciBusAddoXu1Vf2=0000:51:01.6 -#PciBusAddoXu1Vf3=0000:51:01.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:02.0 -#PciBusAddoXu2Vf1=0000:51:02.1 -#PciBusAddoXu2Vf2=0000:51:02.2 -#PciBusAddoXu2Vf3=0000:51:02.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/221/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/221/usecase_ru.cfg deleted file mode 100644 index 1ab0180..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/221/usecase_ru.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -ioCore=15 # core id -ioWorker=0x800000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:11.0 -#PciBusAddoXu0Vf1=0000:51:11.1 -#PciBusAddoXu0Vf2=0000:51:11.2 -#PciBusAddoXu0Vf3=0000:51:11.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:11.4 -#PciBusAddoXu1Vf1=0000:51:11.5 -#PciBusAddoXu1Vf2=0000:51:11.6 -#PciBusAddoXu1Vf3=0000:51:11.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:12.0 -#PciBusAddoXu2Vf1=0000:51:12.1 -#PciBusAddoXu2Vf2=0000:51:12.2 -#PciBusAddoXu2Vf3=0000:51:12.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/222/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/222/config_file_o_du.dat deleted file mode 100644 index e1aea1f..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/222/config_file_o_du.dat +++ /dev/null @@ -1,237 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD DDDSUUDDDD: S it's 6:4:5 1 64T64R 100 16 8 100.0% 273 3276 100.0% 273 3276 1 peak - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,1,1,1,9,1 -PrbElemDl1=48,48,0,14,2,1,1,9,1 -PrbElemDl2=96,48,0,14,3,1,1,9,1 -PrbElemDl3=144,48,0,14,4,1,1,9,1 -PrbElemDl4=192,48,0,14,5,1,1,9,1 -PrbElemDl5=240,33,0,14,6,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=12,4,0,0,9,1 -ExtBfwDl4=12,4,0,0,9,1 -ExtBfwDl5=11,3,0,0,9,1 - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,1,1,1,9,1 -PrbElemUl1=48,48,0,14,2,1,1,9,1 -PrbElemUl2=96,48,0,14,3,1,1,9,1 -PrbElemUl3=144,48,0,14,4,1,1,9,1 -PrbElemUl4=192,48,0,14,5,1,1,9,1 -PrbElemUl5=240,33,0,14,6,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=12,4,0,0,9,1 -ExtBfwUl4=12,4,0,0,9,1 -ExtBfwUl5=11,3,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/222/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/222/config_file_o_ru.dat deleted file mode 100644 index da111a9..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/222/config_file_o_ru.dat +++ /dev/null @@ -1,265 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD DDDSUUDDDD: S it's 6:4:5 1 64T64R 100 16 8 100.0% 273 3276 100.0% 273 3276 1 peak - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=15 -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,1,1,1,9,1 -PrbElemDl1=48,48,0,14,2,1,1,9,1 -PrbElemDl2=96,48,0,14,3,1,1,9,1 -PrbElemDl3=144,48,0,14,4,1,1,9,1 -PrbElemDl4=192,48,0,14,5,1,1,9,1 -PrbElemDl5=240,33,0,14,6,1,1,9,1 - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,1,1,1,9,1 -PrbElemUl1=48,48,0,14,2,1,1,9,1 -PrbElemUl2=96,48,0,14,3,1,1,9,1 -PrbElemUl3=144,48,0,14,4,1,1,9,1 -PrbElemUl4=192,48,0,14,5,1,1,9,1 -PrbElemUl5=240,33,0,14,6,1,1,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/222/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/222/usecase_du.cfg deleted file mode 100644 index 5c067f4..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/222/usecase_du.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:01.0 -#PciBusAddoXu0Vf1=0000:51:01.1 -#PciBusAddoXu0Vf2=0000:51:01.2 -#PciBusAddoXu0Vf3=0000:51:01.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:01.4 -#PciBusAddoXu1Vf1=0000:51:01.5 -#PciBusAddoXu1Vf2=0000:51:01.6 -#PciBusAddoXu1Vf3=0000:51:01.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:02.0 -#PciBusAddoXu2Vf1=0000:51:02.1 -#PciBusAddoXu2Vf2=0000:51:02.2 -#PciBusAddoXu2Vf3=0000:51:02.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/222/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/222/usecase_ru.cfg deleted file mode 100644 index 1ab0180..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/222/usecase_ru.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -ioCore=15 # core id -ioWorker=0x800000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:11.0 -#PciBusAddoXu0Vf1=0000:51:11.1 -#PciBusAddoXu0Vf2=0000:51:11.2 -#PciBusAddoXu0Vf3=0000:51:11.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:11.4 -#PciBusAddoXu1Vf1=0000:51:11.5 -#PciBusAddoXu1Vf2=0000:51:11.6 -#PciBusAddoXu1Vf3=0000:51:11.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:12.0 -#PciBusAddoXu2Vf1=0000:51:12.1 -#PciBusAddoXu2Vf2=0000:51:12.2 -#PciBusAddoXu2Vf3=0000:51:12.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/223/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/223/config_file_o_du.dat deleted file mode 100644 index 6b33fe0..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/223/config_file_o_du.dat +++ /dev/null @@ -1,226 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 16 4 70.3% 192 2304 35.0% 96 1152 35% center - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,1,1,1,9,1 -PrbElemDl1=48,48,0,14,2,1,1,9,1 -PrbElemDl2=96,48,0,14,3,1,1,9,1 -PrbElemDl3=144,48,0,14,4,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=12,4,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,1,1,1,9,1 -PrbElemUl1=48,48,0,14,2,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/223/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/223/config_file_o_ru.dat deleted file mode 100644 index 12a6ff3..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/223/config_file_o_ru.dat +++ /dev/null @@ -1,260 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 16 4 70.3% 192 2304 35.0% 96 1152 35% center - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=15 -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,1,1,1,9,1 -PrbElemDl1=48,48,0,14,2,1,1,9,1 -PrbElemDl2=96,48,0,14,3,1,1,9,1 -PrbElemDl3=144,48,0,14,4,1,1,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,1,1,1,9,1 -PrbElemUl1=48,48,0,14,2,1,1,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/223/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/223/usecase_du.cfg deleted file mode 100644 index 5c067f4..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/223/usecase_du.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:01.0 -#PciBusAddoXu0Vf1=0000:51:01.1 -#PciBusAddoXu0Vf2=0000:51:01.2 -#PciBusAddoXu0Vf3=0000:51:01.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:01.4 -#PciBusAddoXu1Vf1=0000:51:01.5 -#PciBusAddoXu1Vf2=0000:51:01.6 -#PciBusAddoXu1Vf3=0000:51:01.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:02.0 -#PciBusAddoXu2Vf1=0000:51:02.1 -#PciBusAddoXu2Vf2=0000:51:02.2 -#PciBusAddoXu2Vf3=0000:51:02.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/223/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/223/usecase_ru.cfg deleted file mode 100644 index 1ab0180..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/223/usecase_ru.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -ioCore=15 # core id -ioWorker=0x800000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:11.0 -#PciBusAddoXu0Vf1=0000:51:11.1 -#PciBusAddoXu0Vf2=0000:51:11.2 -#PciBusAddoXu0Vf3=0000:51:11.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:11.4 -#PciBusAddoXu1Vf1=0000:51:11.5 -#PciBusAddoXu1Vf2=0000:51:11.6 -#PciBusAddoXu1Vf3=0000:51:11.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:12.0 -#PciBusAddoXu2Vf1=0000:51:12.1 -#PciBusAddoXu2Vf2=0000:51:12.2 -#PciBusAddoXu2Vf3=0000:51:12.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/224/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/224/config_file_o_du.dat deleted file mode 100644 index b6bee4f..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/224/config_file_o_du.dat +++ /dev/null @@ -1,226 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 16 4 70.3% 192 2304 35.0% 96 1152 45% mid - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,1,1,1,9,1 -PrbElemDl1=48,48,0,14,2,1,1,9,1 -PrbElemDl2=96,48,0,14,3,1,1,9,1 -PrbElemDl3=144,48,0,14,4,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=12,4,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,1,1,1,9,1 -PrbElemUl1=48,48,0,14,2,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/224/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/224/config_file_o_ru.dat deleted file mode 100644 index 4a53408..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/224/config_file_o_ru.dat +++ /dev/null @@ -1,260 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 16 4 70.3% 192 2304 35.0% 96 1152 45% mid - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=15 -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,1,1,1,9,1 -PrbElemDl1=48,48,0,14,2,1,1,9,1 -PrbElemDl2=96,48,0,14,3,1,1,9,1 -PrbElemDl3=144,48,0,14,4,1,1,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,1,1,1,9,1 -PrbElemUl1=48,48,0,14,2,1,1,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/224/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/224/usecase_du.cfg deleted file mode 100644 index 5c067f4..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/224/usecase_du.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:01.0 -#PciBusAddoXu0Vf1=0000:51:01.1 -#PciBusAddoXu0Vf2=0000:51:01.2 -#PciBusAddoXu0Vf3=0000:51:01.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:01.4 -#PciBusAddoXu1Vf1=0000:51:01.5 -#PciBusAddoXu1Vf2=0000:51:01.6 -#PciBusAddoXu1Vf3=0000:51:01.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:02.0 -#PciBusAddoXu2Vf1=0000:51:02.1 -#PciBusAddoXu2Vf2=0000:51:02.2 -#PciBusAddoXu2Vf3=0000:51:02.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/224/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/224/usecase_ru.cfg deleted file mode 100644 index 1ab0180..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/224/usecase_ru.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -ioCore=15 # core id -ioWorker=0x800000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:11.0 -#PciBusAddoXu0Vf1=0000:51:11.1 -#PciBusAddoXu0Vf2=0000:51:11.2 -#PciBusAddoXu0Vf3=0000:51:11.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:11.4 -#PciBusAddoXu1Vf1=0000:51:11.5 -#PciBusAddoXu1Vf2=0000:51:11.6 -#PciBusAddoXu1Vf3=0000:51:11.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:12.0 -#PciBusAddoXu2Vf1=0000:51:12.1 -#PciBusAddoXu2Vf2=0000:51:12.2 -#PciBusAddoXu2Vf3=0000:51:12.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/225/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/225/config_file_o_du.dat deleted file mode 100644 index 385ab3b..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/225/config_file_o_du.dat +++ /dev/null @@ -1,228 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 4 1 70.3% 192 2304 35.0% 96 1152 20% edge - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=1 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -#DL PRB / % Used RBs UL PRB / % Used RBs -#33% 90 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,1,1,1,9,1 -PrbElemDl1=48,48,0,14,2,1,1,9,1 -PrbElemDl2=96,48,0,14,3,1,1,9,1 -PrbElemDl3=144,48,0,14,4,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=12,4,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,1,1,1,9,1 -PrbElemUl1=48,48,0,14,2,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/225/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/225/config_file_o_ru.dat deleted file mode 100644 index 2e5a82a..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/225/config_file_o_ru.dat +++ /dev/null @@ -1,262 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 4 1 70.3% 192 2304 35.0% 96 1152 20% edge - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=1 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=15 -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - -#DL PRB / % Used RBs UL PRB / % Used RBs -#33% 90 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,1,1,1,9,1 -PrbElemDl1=48,48,0,14,2,1,1,9,1 -PrbElemDl2=96,48,0,14,3,1,1,9,1 -PrbElemDl3=144,48,0,14,4,1,1,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,1,1,1,9,1 -PrbElemUl1=48,48,0,14,2,1,1,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/225/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/225/usecase_du.cfg deleted file mode 100644 index 5c067f4..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/225/usecase_du.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:01.0 -#PciBusAddoXu0Vf1=0000:51:01.1 -#PciBusAddoXu0Vf2=0000:51:01.2 -#PciBusAddoXu0Vf3=0000:51:01.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:01.4 -#PciBusAddoXu1Vf1=0000:51:01.5 -#PciBusAddoXu1Vf2=0000:51:01.6 -#PciBusAddoXu1Vf3=0000:51:01.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:02.0 -#PciBusAddoXu2Vf1=0000:51:02.1 -#PciBusAddoXu2Vf2=0000:51:02.2 -#PciBusAddoXu2Vf3=0000:51:02.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/225/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/225/usecase_ru.cfg deleted file mode 100644 index 1ab0180..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/225/usecase_ru.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -ioCore=15 # core id -ioWorker=0x800000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:11.0 -#PciBusAddoXu0Vf1=0000:51:11.1 -#PciBusAddoXu0Vf2=0000:51:11.2 -#PciBusAddoXu0Vf3=0000:51:11.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:11.4 -#PciBusAddoXu1Vf1=0000:51:11.5 -#PciBusAddoXu1Vf2=0000:51:11.6 -#PciBusAddoXu1Vf3=0000:51:11.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:12.0 -#PciBusAddoXu2Vf1=0000:51:12.1 -#PciBusAddoXu2Vf2=0000:51:12.2 -#PciBusAddoXu2Vf3=0000:51:12.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/226/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/226/config_file_o_du.dat deleted file mode 100644 index 1fec4ba..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/226/config_file_o_du.dat +++ /dev/null @@ -1,232 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 8 4 70.3% 192 2304 70.0% 191 2292 70% - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -#DL PRB / % Used RBs UL PRB / % Used RBs -#33% 90 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,1,1,1,9,1 -PrbElemDl1=48,48,0,14,2,1,1,9,1 -PrbElemDl2=96,48,0,14,3,1,1,9,1 -PrbElemDl3=144,48,0,14,4,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=12,4,0,0,9,1 - -nPrbElemUl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,1,1,1,9,1 -PrbElemUl1=48,48,0,14,2,1,1,9,1 -PrbElemUl2=96,48,0,14,3,1,1,9,1 -PrbElemUl3=144,48,0,14,4,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=12,4,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/226/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/226/config_file_o_ru.dat deleted file mode 100644 index aa63777..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/226/config_file_o_ru.dat +++ /dev/null @@ -1,264 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 8 4 70.3% 192 2304 70.0% 191 2292 70% - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=15 -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - -#DL PRB / % Used RBs UL PRB / % Used RBs -#33% 90 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,1,1,1,9,1 -PrbElemDl1=48,48,0,14,2,1,1,9,1 -PrbElemDl2=96,48,0,14,3,1,1,9,1 -PrbElemDl3=144,48,0,14,4,1,1,9,1 - -nPrbElemUl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,1,1,1,9,1 -PrbElemUl1=48,48,0,14,2,1,1,9,1 -PrbElemUl2=96,48,0,14,3,1,1,9,1 -PrbElemUl3=144,48,0,14,4,1,1,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/226/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/226/usecase_du.cfg deleted file mode 100644 index 5c067f4..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/226/usecase_du.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:01.0 -#PciBusAddoXu0Vf1=0000:51:01.1 -#PciBusAddoXu0Vf2=0000:51:01.2 -#PciBusAddoXu0Vf3=0000:51:01.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:01.4 -#PciBusAddoXu1Vf1=0000:51:01.5 -#PciBusAddoXu1Vf2=0000:51:01.6 -#PciBusAddoXu1Vf3=0000:51:01.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:02.0 -#PciBusAddoXu2Vf1=0000:51:02.1 -#PciBusAddoXu2Vf2=0000:51:02.2 -#PciBusAddoXu2Vf3=0000:51:02.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/226/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/226/usecase_ru.cfg deleted file mode 100644 index 1ab0180..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/226/usecase_ru.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -ioCore=15 # core id -ioWorker=0x800000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:11.0 -#PciBusAddoXu0Vf1=0000:51:11.1 -#PciBusAddoXu0Vf2=0000:51:11.2 -#PciBusAddoXu0Vf3=0000:51:11.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:11.4 -#PciBusAddoXu1Vf1=0000:51:11.5 -#PciBusAddoXu1Vf2=0000:51:11.6 -#PciBusAddoXu1Vf3=0000:51:11.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:12.0 -#PciBusAddoXu2Vf1=0000:51:12.1 -#PciBusAddoXu2Vf2=0000:51:12.2 -#PciBusAddoXu2Vf3=0000:51:12.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/231/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/231/config_file_o_du.dat deleted file mode 100644 index f0bb6c7..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/231/config_file_o_du.dat +++ /dev/null @@ -1,212 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD DDDSUUDDDD: S it's 6:4:4 1 8T8R 100 8 4 70.3% 192 2304 70.0% 191 2292 new added 70% with 8T8R - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,1,1,1,9,1 -PrbElemDl1=48,48,0,14,2,1,1,9,1 -PrbElemDl2=96,48,0,14,3,1,1,9,1 -PrbElemDl3=144,48,0,14,4,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=12,4,0,0,9,1 - -nPrbElemUl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,1,1,1,9,1 -PrbElemUl1=48,48,0,14,2,1,1,9,1 -PrbElemUl2=96,48,0,14,3,1,1,9,1 -PrbElemUl3=144,48,0,14,4,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=12,4,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/231/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/231/config_file_o_ru.dat deleted file mode 100644 index 2008a8f..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/231/config_file_o_ru.dat +++ /dev/null @@ -1,229 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD DDDSUUDDDD: S it's 6:4:4 1 8T8R 100 8 4 70.3% 192 2304 70.0% 191 2292 new added 70% with 8T8R - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=15 -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin - - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,1,1,1,9,1 -PrbElemDl1=48,48,0,14,2,1,1,9,1 -PrbElemDl2=96,48,0,14,3,1,1,9,1 -PrbElemDl3=144,48,0,14,4,1,1,9,1 - -nPrbElemUl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,1,1,1,9,1 -PrbElemUl1=48,48,0,14,2,1,1,9,1 -PrbElemUl2=96,48,0,14,3,1,1,9,1 -PrbElemUl3=144,48,0,14,4,1,1,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/231/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/231/usecase_du.cfg deleted file mode 100644 index 5c067f4..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/231/usecase_du.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:01.0 -#PciBusAddoXu0Vf1=0000:51:01.1 -#PciBusAddoXu0Vf2=0000:51:01.2 -#PciBusAddoXu0Vf3=0000:51:01.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:01.4 -#PciBusAddoXu1Vf1=0000:51:01.5 -#PciBusAddoXu1Vf2=0000:51:01.6 -#PciBusAddoXu1Vf3=0000:51:01.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:02.0 -#PciBusAddoXu2Vf1=0000:51:02.1 -#PciBusAddoXu2Vf2=0000:51:02.2 -#PciBusAddoXu2Vf3=0000:51:02.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/231/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/231/usecase_ru.cfg deleted file mode 100644 index 1ab0180..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/231/usecase_ru.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -ioCore=15 # core id -ioWorker=0x800000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:11.0 -#PciBusAddoXu0Vf1=0000:51:11.1 -#PciBusAddoXu0Vf2=0000:51:11.2 -#PciBusAddoXu0Vf3=0000:51:11.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:11.4 -#PciBusAddoXu1Vf1=0000:51:11.5 -#PciBusAddoXu1Vf2=0000:51:11.6 -#PciBusAddoXu1Vf3=0000:51:11.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:12.0 -#PciBusAddoXu2Vf1=0000:51:12.1 -#PciBusAddoXu2Vf2=0000:51:12.2 -#PciBusAddoXu2Vf3=0000:51:12.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/232/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/232/config_file_o_du.dat deleted file mode 100644 index 9a1d176..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/232/config_file_o_du.dat +++ /dev/null @@ -1,237 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD DDDSUUDDDD: S it's 6:4:5 1 64T64R 100 16 8 100.0% 273 3276 100.0% 273 3276 1 peak - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,1,1,1,9,1 -PrbElemDl1=48,48,0,14,2,1,1,9,1 -PrbElemDl2=96,48,0,14,3,1,1,9,1 -PrbElemDl3=144,48,0,14,4,1,1,9,1 -PrbElemDl4=192,48,0,14,5,1,1,9,1 -PrbElemDl5=240,33,0,14,6,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=12,4,0,0,9,1 -ExtBfwDl4=12,4,0,0,9,1 -ExtBfwDl5=11,3,0,0,9,1 - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,1,1,1,9,1 -PrbElemUl1=48,48,0,14,2,1,1,9,1 -PrbElemUl2=96,48,0,14,3,1,1,9,1 -PrbElemUl3=144,48,0,14,4,1,1,9,1 -PrbElemUl4=192,48,0,14,5,1,1,9,1 -PrbElemUl5=240,33,0,14,6,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=12,4,0,0,9,1 -ExtBfwUl4=12,4,0,0,9,1 -ExtBfwUl5=11,3,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/232/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/232/config_file_o_ru.dat deleted file mode 100644 index 126046e..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/232/config_file_o_ru.dat +++ /dev/null @@ -1,265 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD DDDSUUDDDD: S it's 6:4:5 1 64T64R 100 16 8 100.0% 273 3276 100.0% 273 3276 1 peak - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=15 -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,1,1,1,9,1 -PrbElemDl1=48,48,0,14,2,1,1,9,1 -PrbElemDl2=96,48,0,14,3,1,1,9,1 -PrbElemDl3=144,48,0,14,4,1,1,9,1 -PrbElemDl4=192,48,0,14,5,1,1,9,1 -PrbElemDl5=240,33,0,14,6,1,1,9,1 - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,1,1,1,9,1 -PrbElemUl1=48,48,0,14,2,1,1,9,1 -PrbElemUl2=96,48,0,14,3,1,1,9,1 -PrbElemUl3=144,48,0,14,4,1,1,9,1 -PrbElemUl4=192,48,0,14,5,1,1,9,1 -PrbElemUl5=240,33,0,14,6,1,1,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/232/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/232/usecase_du.cfg deleted file mode 100644 index 5c067f4..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/232/usecase_du.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:01.0 -#PciBusAddoXu0Vf1=0000:51:01.1 -#PciBusAddoXu0Vf2=0000:51:01.2 -#PciBusAddoXu0Vf3=0000:51:01.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:01.4 -#PciBusAddoXu1Vf1=0000:51:01.5 -#PciBusAddoXu1Vf2=0000:51:01.6 -#PciBusAddoXu1Vf3=0000:51:01.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:02.0 -#PciBusAddoXu2Vf1=0000:51:02.1 -#PciBusAddoXu2Vf2=0000:51:02.2 -#PciBusAddoXu2Vf3=0000:51:02.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/232/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/232/usecase_ru.cfg deleted file mode 100644 index 1ab0180..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/232/usecase_ru.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -ioCore=15 # core id -ioWorker=0x800000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:11.0 -#PciBusAddoXu0Vf1=0000:51:11.1 -#PciBusAddoXu0Vf2=0000:51:11.2 -#PciBusAddoXu0Vf3=0000:51:11.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:11.4 -#PciBusAddoXu1Vf1=0000:51:11.5 -#PciBusAddoXu1Vf2=0000:51:11.6 -#PciBusAddoXu1Vf3=0000:51:11.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:12.0 -#PciBusAddoXu2Vf1=0000:51:12.1 -#PciBusAddoXu2Vf2=0000:51:12.2 -#PciBusAddoXu2Vf3=0000:51:12.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/233/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/233/config_file_o_du.dat deleted file mode 100644 index 097bc50..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/233/config_file_o_du.dat +++ /dev/null @@ -1,226 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 16 4 70.3% 192 2304 35.0% 96 1152 35% center - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,1,1,1,9,1 -PrbElemDl1=48,48,0,14,2,1,1,9,1 -PrbElemDl2=96,48,0,14,3,1,1,9,1 -PrbElemDl3=144,48,0,14,4,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=12,4,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,1,1,1,9,1 -PrbElemUl1=48,48,0,14,2,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/233/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/233/config_file_o_ru.dat deleted file mode 100644 index e16cd9c..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/233/config_file_o_ru.dat +++ /dev/null @@ -1,260 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 16 4 70.3% 192 2304 35.0% 96 1152 35% center - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=15 -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,1,1,1,9,1 -PrbElemDl1=48,48,0,14,2,1,1,9,1 -PrbElemDl2=96,48,0,14,3,1,1,9,1 -PrbElemDl3=144,48,0,14,4,1,1,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,1,1,1,9,1 -PrbElemUl1=48,48,0,14,2,1,1,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/233/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/233/usecase_du.cfg deleted file mode 100644 index 5c067f4..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/233/usecase_du.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:01.0 -#PciBusAddoXu0Vf1=0000:51:01.1 -#PciBusAddoXu0Vf2=0000:51:01.2 -#PciBusAddoXu0Vf3=0000:51:01.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:01.4 -#PciBusAddoXu1Vf1=0000:51:01.5 -#PciBusAddoXu1Vf2=0000:51:01.6 -#PciBusAddoXu1Vf3=0000:51:01.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:02.0 -#PciBusAddoXu2Vf1=0000:51:02.1 -#PciBusAddoXu2Vf2=0000:51:02.2 -#PciBusAddoXu2Vf3=0000:51:02.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/233/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/233/usecase_ru.cfg deleted file mode 100644 index 1ab0180..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/233/usecase_ru.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -ioCore=15 # core id -ioWorker=0x800000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:11.0 -#PciBusAddoXu0Vf1=0000:51:11.1 -#PciBusAddoXu0Vf2=0000:51:11.2 -#PciBusAddoXu0Vf3=0000:51:11.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:11.4 -#PciBusAddoXu1Vf1=0000:51:11.5 -#PciBusAddoXu1Vf2=0000:51:11.6 -#PciBusAddoXu1Vf3=0000:51:11.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:12.0 -#PciBusAddoXu2Vf1=0000:51:12.1 -#PciBusAddoXu2Vf2=0000:51:12.2 -#PciBusAddoXu2Vf3=0000:51:12.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/234/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/234/config_file_o_du.dat deleted file mode 100644 index 59fa3d1..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/234/config_file_o_du.dat +++ /dev/null @@ -1,226 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 16 4 70.3% 192 2304 35.0% 96 1152 45% mid - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,1,1,1,9,1 -PrbElemDl1=48,48,0,14,2,1,1,9,1 -PrbElemDl2=96,48,0,14,3,1,1,9,1 -PrbElemDl3=144,48,0,14,4,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=12,4,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,1,1,1,9,1 -PrbElemUl1=48,48,0,14,2,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/234/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/234/config_file_o_ru.dat deleted file mode 100644 index 5086e26..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/234/config_file_o_ru.dat +++ /dev/null @@ -1,260 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 16 4 70.3% 192 2304 35.0% 96 1152 45% mid - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=15 -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,1,1,1,9,1 -PrbElemDl1=48,48,0,14,2,1,1,9,1 -PrbElemDl2=96,48,0,14,3,1,1,9,1 -PrbElemDl3=144,48,0,14,4,1,1,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,1,1,1,9,1 -PrbElemUl1=48,48,0,14,2,1,1,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/234/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/234/usecase_du.cfg deleted file mode 100644 index 5c067f4..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/234/usecase_du.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:01.0 -#PciBusAddoXu0Vf1=0000:51:01.1 -#PciBusAddoXu0Vf2=0000:51:01.2 -#PciBusAddoXu0Vf3=0000:51:01.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:01.4 -#PciBusAddoXu1Vf1=0000:51:01.5 -#PciBusAddoXu1Vf2=0000:51:01.6 -#PciBusAddoXu1Vf3=0000:51:01.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:02.0 -#PciBusAddoXu2Vf1=0000:51:02.1 -#PciBusAddoXu2Vf2=0000:51:02.2 -#PciBusAddoXu2Vf3=0000:51:02.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/234/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/234/usecase_ru.cfg deleted file mode 100644 index 1ab0180..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/234/usecase_ru.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -ioCore=15 # core id -ioWorker=0x800000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:11.0 -#PciBusAddoXu0Vf1=0000:51:11.1 -#PciBusAddoXu0Vf2=0000:51:11.2 -#PciBusAddoXu0Vf3=0000:51:11.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:11.4 -#PciBusAddoXu1Vf1=0000:51:11.5 -#PciBusAddoXu1Vf2=0000:51:11.6 -#PciBusAddoXu1Vf3=0000:51:11.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:12.0 -#PciBusAddoXu2Vf1=0000:51:12.1 -#PciBusAddoXu2Vf2=0000:51:12.2 -#PciBusAddoXu2Vf3=0000:51:12.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/235/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/235/config_file_o_du.dat deleted file mode 100644 index aab708b..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/235/config_file_o_du.dat +++ /dev/null @@ -1,228 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 4 1 70.3% 192 2304 35.0% 96 1152 20% edge - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -#DL PRB / % Used RBs UL PRB / % Used RBs -#33% 90 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,1,1,1,9,1 -PrbElemDl1=48,48,0,14,2,1,1,9,1 -PrbElemDl2=96,48,0,14,3,1,1,9,1 -PrbElemDl3=144,48,0,14,4,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=12,4,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,1,1,1,9,1 -PrbElemUl1=48,48,0,14,2,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/235/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/235/config_file_o_ru.dat deleted file mode 100644 index d8014bf..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/235/config_file_o_ru.dat +++ /dev/null @@ -1,262 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 4 1 70.3% 192 2304 35.0% 96 1152 20% edge - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=15 -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - -#DL PRB / % Used RBs UL PRB / % Used RBs -#33% 90 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,1,1,1,9,1 -PrbElemDl1=48,48,0,14,2,1,1,9,1 -PrbElemDl2=96,48,0,14,3,1,1,9,1 -PrbElemDl3=144,48,0,14,4,1,1,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,1,1,1,9,1 -PrbElemUl1=48,48,0,14,2,1,1,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/235/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/235/usecase_du.cfg deleted file mode 100644 index 5c067f4..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/235/usecase_du.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:01.0 -#PciBusAddoXu0Vf1=0000:51:01.1 -#PciBusAddoXu0Vf2=0000:51:01.2 -#PciBusAddoXu0Vf3=0000:51:01.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:01.4 -#PciBusAddoXu1Vf1=0000:51:01.5 -#PciBusAddoXu1Vf2=0000:51:01.6 -#PciBusAddoXu1Vf3=0000:51:01.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:02.0 -#PciBusAddoXu2Vf1=0000:51:02.1 -#PciBusAddoXu2Vf2=0000:51:02.2 -#PciBusAddoXu2Vf3=0000:51:02.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/235/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/235/usecase_ru.cfg deleted file mode 100644 index 1ab0180..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/235/usecase_ru.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -ioCore=15 # core id -ioWorker=0x800000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:11.0 -#PciBusAddoXu0Vf1=0000:51:11.1 -#PciBusAddoXu0Vf2=0000:51:11.2 -#PciBusAddoXu0Vf3=0000:51:11.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:11.4 -#PciBusAddoXu1Vf1=0000:51:11.5 -#PciBusAddoXu1Vf2=0000:51:11.6 -#PciBusAddoXu1Vf3=0000:51:11.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:12.0 -#PciBusAddoXu2Vf1=0000:51:12.1 -#PciBusAddoXu2Vf2=0000:51:12.2 -#PciBusAddoXu2Vf3=0000:51:12.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/236/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/236/config_file_o_du.dat deleted file mode 100644 index 1a094fb..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/236/config_file_o_du.dat +++ /dev/null @@ -1,232 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 8 4 70.3% 192 2304 70.0% 191 2292 70% - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -#DL PRB / % Used RBs UL PRB / % Used RBs -#33% 90 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,1,1,1,9,1 -PrbElemDl1=48,48,0,14,2,1,1,9,1 -PrbElemDl2=96,48,0,14,3,1,1,9,1 -PrbElemDl3=144,48,0,14,4,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=12,4,0,0,9,1 - -nPrbElemUl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,1,1,1,9,1 -PrbElemUl1=48,48,0,14,2,1,1,9,1 -PrbElemUl2=96,48,0,14,3,1,1,9,1 -PrbElemUl3=144,48,0,14,4,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=12,4,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/236/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/236/config_file_o_ru.dat deleted file mode 100644 index ad2e573..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/236/config_file_o_ru.dat +++ /dev/null @@ -1,264 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 8 4 70.3% 192 2304 70.0% 191 2292 70% - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=15 -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - -#DL PRB / % Used RBs UL PRB / % Used RBs -#33% 90 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,1,1,1,9,1 -PrbElemDl1=48,48,0,14,2,1,1,9,1 -PrbElemDl2=96,48,0,14,3,1,1,9,1 -PrbElemDl3=144,48,0,14,4,1,1,9,1 - -nPrbElemUl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,1,1,1,9,1 -PrbElemUl1=48,48,0,14,2,1,1,9,1 -PrbElemUl2=96,48,0,14,3,1,1,9,1 -PrbElemUl3=144,48,0,14,4,1,1,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/236/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/236/usecase_du.cfg deleted file mode 100644 index 5c067f4..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/236/usecase_du.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:01.0 -#PciBusAddoXu0Vf1=0000:51:01.1 -#PciBusAddoXu0Vf2=0000:51:01.2 -#PciBusAddoXu0Vf3=0000:51:01.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:01.4 -#PciBusAddoXu1Vf1=0000:51:01.5 -#PciBusAddoXu1Vf2=0000:51:01.6 -#PciBusAddoXu1Vf3=0000:51:01.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:02.0 -#PciBusAddoXu2Vf1=0000:51:02.1 -#PciBusAddoXu2Vf2=0000:51:02.2 -#PciBusAddoXu2Vf3=0000:51:02.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/236/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/236/usecase_ru.cfg deleted file mode 100644 index 1ab0180..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/236/usecase_ru.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -ioCore=15 # core id -ioWorker=0x800000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:11.0 -#PciBusAddoXu0Vf1=0000:51:11.1 -#PciBusAddoXu0Vf2=0000:51:11.2 -#PciBusAddoXu0Vf3=0000:51:11.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:11.4 -#PciBusAddoXu1Vf1=0000:51:11.5 -#PciBusAddoXu1Vf2=0000:51:11.6 -#PciBusAddoXu1Vf3=0000:51:11.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:12.0 -#PciBusAddoXu2Vf1=0000:51:12.1 -#PciBusAddoXu2Vf2=0000:51:12.2 -#PciBusAddoXu2Vf3=0000:51:12.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/242/peak_o_du_tst376.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/242/peak_o_du_tst376.dat new file mode 100644 index 0000000..b91d4ae --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/242/peak_o_du_tst376.dat @@ -0,0 +1,237 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +#Peak: 100 % +#301 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU(0) | O-RU(1) +xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B +antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B +antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R + +#UEs +muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources +DlLayersPerUe=1 #number of RX anntennas on DL UE side +UlLayersPerUe=1 #number of TX anntennas on UL UE side + + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 +antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 +antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 + +#SlotNumTx0=./peak_txconfig_1.cfg +#SlotNumTx1=./peak_txconfig_1.cfg +#SlotNumTx2=./peak_txconfig_1.cfg +#SlotNumTx3=./peak_txconfig_2.cfg +#SlotNumTx4=./peak_txconfig_0.cfg + +#SlotNumTx5=./peak_txconfig_1.cfg +#SlotNumTx6=./peak_txconfig_1.cfg +#SlotNumTx7=./peak_txconfig_1.cfg +#SlotNumTx8=./peak_txconfig_2.cfg +#SlotNumTx9=./peak_txconfig_0.cfg + +#SlotNumRx0=./peak_rxconfig_0.cfg +#SlotNumRx1=./peak_rxconfig_0.cfg +#SlotNumRx2=./peak_rxconfig_0.cfg +#SlotNumRx3=./peak_rxconfig_2.cfg +#SlotNumRx4=./peak_rxconfig_1.cfg + +#SlotNumRx5=./peak_rxconfig_0.cfg +#SlotNumRx6=./peak_rxconfig_0.cfg +#SlotNumRx7=./peak_rxconfig_0.cfg +#SlotNumRx8=./peak_rxconfig_3.cfg +#SlotNumRx9=./peak_rxconfig_1.cfg + +#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] +DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] + +#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] +UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] + + +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=189 + +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used +extType=1 +nPrbElemDl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,48,0,14,0,1,1,9,1 +PrbElemDl1=48,48,0,14,1,1,1,9,1 +PrbElemDl2=96,48,0,14,2,1,1,9,1 +PrbElemDl3=144,48,0,14,3,1,1,9,1 +PrbElemDl4=192,48,0,14,4,1,1,9,1 +PrbElemDl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,24,0,0,9,1,1 +ExtBfwDl1=2,24,0,0,9,1,1 +ExtBfwDl2=2,24,0,0,9,1,1 +ExtBfwDl3=2,24,0,0,9,1,1 +ExtBfwDl4=2,24,0,0,9,1,1 +ExtBfwDl5=2,17,0,0,9,1,1 + +nPrbElemUl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,48,0,14,0,1,1,9,1 +PrbElemUl1=48,48,0,14,1,1,1,9,1 +PrbElemUl2=96,48,0,14,2,1,1,9,1 +PrbElemUl3=144,48,0,14,3,1,1,9,1 +PrbElemUl4=192,48,0,14,4,1,1,9,1 +PrbElemUl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,24,0,0,9,1,1 +ExtBfwUl1=2,24,0,0,9,1,1 +ExtBfwUl2=2,24,0,0,9,1,1 +ExtBfwUl3=2,24,0,0,9,1,1 +ExtBfwUl4=2,24,0,0,9,1,1 +ExtBfwUl5=2,17,0,0,9,1,1 + +nPrbElemSrs=1 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order +compression=1 # (1) compression enabled (0) compression disabled + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +Tadv_cp_dl=25 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=285 # 285.42us +T2a_max_cp_dl=429 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=285 # 285.42us +T2a_max_cp_ul=429 # 428.12us + +#Reception Window U-plane +T2a_min_up=71 # 71.35in us +T2a_max_up=428 # 428.12us + +#Transmission Window +Ta3_min=20 # in us +Ta3_max=32 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=285 +T1a_max_cp_dl=429 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=300 + +#U-plane +##Transmission Window +T1a_min_up=96 #71 + 25 us +T1a_max_up=196 #71 + 25 us + +#Reception Window +Ta4_min=0 # in us +Ta4_max=75 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/242/peak_o_ru_tst376.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/242/peak_o_ru_tst376.dat new file mode 100644 index 0000000..d4a6e0a --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/242/peak_o_ru_tst376.dat @@ -0,0 +1,287 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +#Peak: 100 % +#301 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % + + + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B +antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B +antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R + +#UEs +muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources +DlLayersPerUe=1 #number of RX anntennas on DL UE side +UlLayersPerUe=1 #number of TX anntennas on UL UE side + + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 +antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 +antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 + +#SlotNumTx0=./peak_txconfig_1.cfg +#SlotNumTx1=./peak_txconfig_1.cfg +#SlotNumTx2=./peak_txconfig_1.cfg +#SlotNumTx3=./peak_txconfig_2.cfg +#SlotNumTx4=./peak_txconfig_0.cfg + +#SlotNumTx5=./peak_txconfig_1.cfg +#SlotNumTx6=./peak_txconfig_1.cfg +#SlotNumTx7=./peak_txconfig_1.cfg +#SlotNumTx8=./peak_txconfig_2.cfg +#SlotNumTx9=./peak_txconfig_0.cfg + +#SlotNumRx0=./peak_rxconfig_0.cfg +#SlotNumRx1=./peak_rxconfig_0.cfg +#SlotNumRx2=./peak_rxconfig_0.cfg +#SlotNumRx3=./peak_rxconfig_2.cfg +#SlotNumRx4=./peak_rxconfig_1.cfg + +#SlotNumRx5=./peak_rxconfig_0.cfg +#SlotNumRx6=./peak_rxconfig_0.cfg +#SlotNumRx7=./peak_rxconfig_0.cfg +#SlotNumRx8=./peak_rxconfig_3.cfg +#SlotNumRx9=./peak_rxconfig_1.cfg + +antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 +antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 +antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 +antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 +#antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 +#antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 +#antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 +#antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 +#antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 +#antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 +#antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 +#antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 +#antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 +#antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 +#antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 + +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=189 + +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) + +antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin +antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin +antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin +antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin + +#DL PRB / % Used RBs UL PRB / % Used RBs +#66% 180 33% 90 + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used +extType=1 +nPrbElemDl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,48,0,14,0,1,1,9,1 +PrbElemDl1=48,48,0,14,1,1,1,9,1 +PrbElemDl2=96,48,0,14,2,1,1,9,1 +PrbElemDl3=144,48,0,14,3,1,1,9,1 +PrbElemDl4=192,48,0,14,4,1,1,9,1 +PrbElemDl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,24,0,0,9,1,1 +ExtBfwDl1=2,24,0,0,9,1,1 +ExtBfwDl2=2,24,0,0,9,1,1 +ExtBfwDl3=2,24,0,0,9,1,1 +ExtBfwDl4=2,24,0,0,9,1,1 +ExtBfwDl5=2,17,0,0,9,1,1 + +nPrbElemUl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,48,0,14,0,1,1,9,1 +PrbElemUl1=48,48,0,14,1,1,1,9,1 +PrbElemUl2=96,48,0,14,2,1,1,9,1 +PrbElemUl3=144,48,0,14,3,1,1,9,1 +PrbElemUl4=192,48,0,14,4,1,1,9,1 +PrbElemUl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,24,0,0,9,1,1 +ExtBfwUl1=2,24,0,0,9,1,1 +ExtBfwUl2=2,24,0,0,9,1,1 +ExtBfwUl3=2,24,0,0,9,1,1 +ExtBfwUl4=2,24,0,0,9,1,1 +ExtBfwUl5=2,17,0,0,9,1,1 + +nPrbElemSrs=1 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order +compression=1 # (1) compression enabled (0) compression disabled + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +Tadv_cp_dl=25 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=285 # 285.42us +T2a_max_cp_dl=429 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=285 # 285.42us +T2a_max_cp_ul=429 # 428.12us + +#Reception Window U-plane +T2a_min_up=71 # 71.35in us +T2a_max_up=428 # 428.12us + +#Transmission Window +Ta3_min=20 # in us +Ta3_max=32 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=285 +T1a_max_cp_dl=429 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=300 + +#U-plane +##Transmission Window +T1a_min_up=96 #71 + 25 us +T1a_max_up=196 #71 + 25 us + +#Reception Window +Ta4_min=0 # in us +Ta4_max=75 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/usecase_du_csx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/242/usecase_du.cfg similarity index 91% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/usecase_du_csx.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/242/usecase_du.cfg index 4d9f87d..867f4d9 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/usecase_du_csx.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/242/usecase_du.cfg @@ -15,7 +15,9 @@ # limitations under the License. # #******************************************************************************/ + # This is simple configuration file. Use '#' sign for comments + appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system @@ -24,21 +26,19 @@ systemCore=22 ioCore=28 # core id #ioWorker=0x000000000 # mask [0- no workers] #ioWorker=0x8000040000 # mask [0- no workers] -ioWorker=0x1E0000000 # mask [0- no workers] +ioWorker=0x760000000 # mask [0- no workers] #ioWorker=0x700000600 - -dpdkMemorySize=16384 +dpdkMemorySize=8192 iovaMode=0 -oXuNum=3 # numbers of O-RU connected to O-DU +oXuNum=2 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs oXuCfgFile0=./peak_o_du_tst376.dat #O-DU0 -oXuCfgFile1=./avg_o_du_tst377.dat #O-DU1 -oXuCfgFile2=./avg_o_du_tst377.dat #O-DU2 +oXuCfgFile1=./peak_o_du_tst376.dat #O-DU1 # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:01 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/242/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/242/usecase_du_icx.cfg new file mode 100644 index 0000000..8f37eb0 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/242/usecase_du_icx.cfg @@ -0,0 +1,61 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system + +mainCore=0 #core for main() +systemCore=2 +ioCore=8 # core id + +ioWorker=0xE00 # mask [0- no workers] + +dpdkMemorySize=8192 +iovaMode=0 + +oXuNum=2 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./peak_o_du_tst376.dat #O-DU0 +oXuCfgFile1=./peak_o_du_tst376.dat #O-DU1 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 + +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/usecase_ru_csx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/242/usecase_ru.cfg similarity index 88% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/usecase_ru_csx.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/242/usecase_ru.cfg index 8ee5ce3..a90be3d 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/usecase_ru_csx.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/242/usecase_ru.cfg @@ -15,29 +15,30 @@ # limitations under the License. # #******************************************************************************/ + # This is simple configuration file. Use '#' sign for comments + appMode=1 # All O-DU(0) | O-RU(1) instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -mainCore=20 #core for main() -systemCore=22 -ioCore=28 # core id +mainCore=0 #core for main() +systemCore=2 +ioCore=8 # core id #ioWorker=0x800000000 # mask [0- no workers] #ioWorker=0x800004000 # mask [0- no workers] #ioWorker=0xc000000 # second socket -ioWorker=0x3E0000000 # second socket +ioWorker=0x3E00 # second socket -dpdkMemorySize=16384 +dpdkMemorySize=8192 iovaMode=0 -oXuNum=3 # numbers of O-RU connected to O-DU +oXuNum=2 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs oXuCfgFile0=./peak_o_ru_tst376.dat #O-RU0 -oXuCfgFile1=./avg_o_ru_tst377.dat #O-RU1 -oXuCfgFile2=./avg_o_ru_tst377.dat #O-RU2 +oXuCfgFile1=./peak_o_ru_tst376.dat #O-RU1 # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:00 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/242/usecase_ru_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/242/usecase_ru_icx.cfg new file mode 100644 index 0000000..0e1668e --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/242/usecase_ru_icx.cfg @@ -0,0 +1,59 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +appMode=1 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +mainCore=0 #core for main() +systemCore=2 +ioCore=8 # core id + +ioWorker=0x3E00 # mask [0- no workers] + +dpdkMemorySize=8192 +iovaMode=0 + +oXuNum=2 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./peak_o_ru_tst376.dat #O-RU0 +oXuCfgFile1=./peak_o_ru_tst376.dat #O-RU1 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:00 +oXuRem0Mac1=00:11:22:33:00:10 +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:20 +oXuRem0Mac3=00:11:22:33:00:30 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:00 +oXuRem1Mac1=00:11:22:33:01:10 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:20 +oXuRem1Mac3=00:11:22:33:01:30 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:00 +oXuRem2Mac1=00:11:22:33:02:10 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:20 +oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..dbcbfab --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 14 + + 14 + + 12,52,13,53,14,54,15,55,16,56,17,57,18,59,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 2 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/bbu_pool_cfg_o_du_icx.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/bbu_pool_cfg_o_du_icx.xml new file mode 100644 index 0000000..a86e9b1 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/bbu_pool_cfg_o_du_icx.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 10 + + 10 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 2 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/peak_o_du_tst376.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/peak_o_du_tst376.dat new file mode 100644 index 0000000..57d20fd --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/peak_o_du_tst376.dat @@ -0,0 +1,237 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +#Peak: 100 % +#301 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU(0) | O-RU(1) +xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B +antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B +antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R + +#UEs +muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources +DlLayersPerUe=1 #number of RX anntennas on DL UE side +UlLayersPerUe=1 #number of TX anntennas on UL UE side + + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 +antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 +antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 + +#SlotNumTx0=./peak_txconfig_1.cfg +#SlotNumTx1=./peak_txconfig_1.cfg +#SlotNumTx2=./peak_txconfig_1.cfg +#SlotNumTx3=./peak_txconfig_2.cfg +#SlotNumTx4=./peak_txconfig_0.cfg + +#SlotNumTx5=./peak_txconfig_1.cfg +#SlotNumTx6=./peak_txconfig_1.cfg +#SlotNumTx7=./peak_txconfig_1.cfg +#SlotNumTx8=./peak_txconfig_2.cfg +#SlotNumTx9=./peak_txconfig_0.cfg + +#SlotNumRx0=./peak_rxconfig_0.cfg +#SlotNumRx1=./peak_rxconfig_0.cfg +#SlotNumRx2=./peak_rxconfig_0.cfg +#SlotNumRx3=./peak_rxconfig_2.cfg +#SlotNumRx4=./peak_rxconfig_1.cfg + +#SlotNumRx5=./peak_rxconfig_0.cfg +#SlotNumRx6=./peak_rxconfig_0.cfg +#SlotNumRx7=./peak_rxconfig_0.cfg +#SlotNumRx8=./peak_rxconfig_3.cfg +#SlotNumRx9=./peak_rxconfig_1.cfg + +#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] +DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] + +#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] +UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] + + +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=189 + +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +nPrbElemDl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,48,0,14,0,1,1,9,1 +PrbElemDl1=48,48,0,14,1,1,1,9,1 +PrbElemDl2=96,48,0,14,2,1,1,9,1 +PrbElemDl3=144,48,0,14,3,1,1,9,1 +PrbElemDl4=192,48,0,14,4,1,1,9,1 +PrbElemDl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth +ExtBfwDl0=2,24,0,0,9,1 +ExtBfwDl1=2,24,0,0,9,1 +ExtBfwDl2=2,24,0,0,9,1 +ExtBfwDl3=2,24,0,0,9,1 +ExtBfwDl4=2,24,0,0,9,1 +ExtBfwDl5=2,17,0,0,9,1 + +nPrbElemUl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,48,0,14,0,1,1,9,1 +PrbElemUl1=48,48,0,14,1,1,1,9,1 +PrbElemUl2=96,48,0,14,2,1,1,9,1 +PrbElemUl3=144,48,0,14,3,1,1,9,1 +PrbElemUl4=192,48,0,14,4,1,1,9,1 +PrbElemUl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth +ExtBfwUl0=2,24,0,0,9,1 +ExtBfwUl1=2,24,0,0,9,1 +ExtBfwUl2=2,24,0,0,9,1 +ExtBfwUl3=2,24,0,0,9,1 +ExtBfwUl4=2,24,0,0,9,1 +ExtBfwUl5=2,17,0,0,9,1 + +nPrbElemSrs=1 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order +compression=1 # (1) compression enabled (0) compression disabled + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +Tadv_cp_dl=25 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=285 # 285.42us +T2a_max_cp_dl=429 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=285 # 285.42us +T2a_max_cp_ul=429 # 428.12us + +#Reception Window U-plane +T2a_min_up=71 # 71.35in us +T2a_max_up=428 # 428.12us + +#Transmission Window +Ta3_min=20 # in us +Ta3_max=32 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=285 +T1a_max_cp_dl=429 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=300 + +#U-plane +##Transmission Window +T1a_min_up=96 #71 + 25 us +T1a_max_up=196 #71 + 25 us + +#Reception Window +Ta4_min=0 # in us +Ta4_max=75 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_o_ru_tst376.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/peak_o_ru_tst376.dat similarity index 67% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_o_ru_tst376.dat rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/peak_o_ru_tst376.dat index ed99005..1e0f13d 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_o_ru_tst376.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/peak_o_ru_tst376.dat @@ -17,7 +17,7 @@ #******************************************************************************/ #Peak: 100 % -#311 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 16 100% 273 3276 100% 273 3276 Peak: 100 % +#301 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % @@ -26,9 +26,9 @@ instanceId=1 # 0,1,2,... in case more than 1 application started on the same sys appMode=1 # O-DU(0) | O-RU(1) xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B +antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B +antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R #UEs muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources @@ -62,22 +62,10 @@ Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec Gps_Beta=0 numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/uliq00_tst376.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/uliq01_tst376.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/uliq02_tst376.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/uliq03_tst376.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/uliq04_tst376.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/uliq05_tst376.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/uliq06_tst376.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/uliq07_tst376.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 +antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 +antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 +antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 #SlotNumTx0=./peak_txconfig_1.cfg #SlotNumTx1=./peak_txconfig_1.cfg @@ -103,30 +91,31 @@ antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 #SlotNumRx8=./peak_rxconfig_3.cfg #SlotNumRx9=./peak_rxconfig_1.cfg - - antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +#antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 +#antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 +#antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 +#antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 +#antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 +#antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 +#antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 +#antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 +#antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 +#antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 +#antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 + +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -160,38 +149,38 @@ antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin #DL PRB / % Used RBs UL PRB / % Used RBs #66% 180 33% 90 @@ -237,8 +226,8 @@ ExtBfwUl4=2,24,0,0,9,1 ExtBfwUl5=2,17,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 -#PrbElemSrs1=136,137,0,14,0,0,0,16,0 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### @@ -246,7 +235,7 @@ PrbElemSrs0=0,273,0,14,0,0,1,9,0 iqswap=0 #do swap of IQ before send buffer to eth nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane + ##Debug debugStop=1 #stop app on 1pps boundary (gps_second % 30) debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary @@ -255,7 +244,7 @@ bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardw CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled ##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU +totalBFWeights=32 # Total number of Beamforming Weights on RU Tadv_cp_dl=25 # in us # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/usecase_du_csx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/usecase_du.cfg similarity index 91% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/usecase_du_csx.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/usecase_du.cfg index 4d9f87d..25cfb44 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/usecase_du_csx.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/usecase_du.cfg @@ -15,7 +15,9 @@ # limitations under the License. # #******************************************************************************/ + # This is simple configuration file. Use '#' sign for comments + appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system @@ -24,21 +26,21 @@ systemCore=22 ioCore=28 # core id #ioWorker=0x000000000 # mask [0- no workers] #ioWorker=0x8000040000 # mask [0- no workers] -ioWorker=0x1E0000000 # mask [0- no workers] +ioWorker=0x020000000 # mask [0- no workers] #ioWorker=0x700000600 -dpdkMemorySize=16384 +dpdkMemorySize=8192 iovaMode=0 -oXuNum=3 # numbers of O-RU connected to O-DU +oXuNum=2 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml oXuCfgFile0=./peak_o_du_tst376.dat #O-DU0 -oXuCfgFile1=./avg_o_du_tst377.dat #O-DU1 -oXuCfgFile2=./avg_o_du_tst377.dat #O-DU2 +oXuCfgFile1=./peak_o_du_tst376.dat #O-DU1 # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:01 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/usecase_du_icx.cfg new file mode 100644 index 0000000..f56c265 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/usecase_du_icx.cfg @@ -0,0 +1,62 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system + +mainCore=0 #core for main() +systemCore=2 +ioCore=8 # core id + +ioWorker=0x200 # mask [0- no workers] + +dpdkMemorySize=8192 +iovaMode=0 + +oXuNum=2 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuBbuCfgFile=./bbu_pool_cfg_o_du_icx.xml +oXuCfgFile0=./peak_o_du_tst376.dat #O-DU0 +oXuCfgFile1=./peak_o_du_tst376.dat #O-DU1 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 + +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/usecase_ru.cfg new file mode 100644 index 0000000..a90be3d --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/usecase_ru.cfg @@ -0,0 +1,62 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments + +appMode=1 # All O-DU(0) | O-RU(1) +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +mainCore=0 #core for main() +systemCore=2 +ioCore=8 # core id +#ioWorker=0x800000000 # mask [0- no workers] +#ioWorker=0x800004000 # mask [0- no workers] +#ioWorker=0xc000000 # second socket +ioWorker=0x3E00 # second socket + +dpdkMemorySize=8192 +iovaMode=0 + +oXuNum=2 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./peak_o_ru_tst376.dat #O-RU0 +oXuCfgFile1=./peak_o_ru_tst376.dat #O-RU1 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:00 +oXuRem0Mac1=00:11:22:33:00:10 +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:20 +oXuRem0Mac3=00:11:22:33:00:30 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:00 +oXuRem1Mac1=00:11:22:33:01:10 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:20 +oXuRem1Mac3=00:11:22:33:01:30 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:00 +oXuRem2Mac1=00:11:22:33:02:10 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:20 +oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/usecase_ru_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/usecase_ru_icx.cfg new file mode 100644 index 0000000..0e1668e --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2422/usecase_ru_icx.cfg @@ -0,0 +1,59 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +appMode=1 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +mainCore=0 #core for main() +systemCore=2 +ioCore=8 # core id + +ioWorker=0x3E00 # mask [0- no workers] + +dpdkMemorySize=8192 +iovaMode=0 + +oXuNum=2 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./peak_o_ru_tst376.dat #O-RU0 +oXuCfgFile1=./peak_o_ru_tst376.dat #O-RU1 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:00 +oXuRem0Mac1=00:11:22:33:00:10 +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:20 +oXuRem0Mac3=00:11:22:33:00:30 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:00 +oXuRem1Mac1=00:11:22:33:01:10 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:20 +oXuRem1Mac3=00:11:22:33:01:30 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:00 +oXuRem2Mac1=00:11:22:33:02:10 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:20 +oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_o_du_tst376.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/284/peak_o_du.dat similarity index 72% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_o_du_tst376.dat rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/284/peak_o_du.dat index 23a9a7e..c27de92 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_o_du_tst376.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/284/peak_o_du.dat @@ -17,7 +17,7 @@ #******************************************************************************/ #Peak: 100 % -#311 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 16 100% 273 3276 100% 273 3276 Peak: 100 % +#284 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % @@ -26,9 +26,9 @@ instanceId=0 # 0,1,2,... in case more than 1 application started on the same sys appMode=0 # O-DU(0) | O-RU(1) xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R +antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B +antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B +antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R #UEs muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources @@ -70,14 +70,14 @@ antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 +#antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 +#antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 +#antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 +#antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 +#antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 +#antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 +#antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 +#antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 #SlotNumTx0=./peak_txconfig_1.cfg #SlotNumTx1=./peak_txconfig_1.cfg @@ -112,14 +112,14 @@ DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX anten DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] #UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] @@ -130,26 +130,31 @@ UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX anten UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used +extType=1 + nPrbElemDl=6 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams @@ -160,13 +165,13 @@ PrbElemDl3=144,48,0,14,3,1,1,9,1 PrbElemDl4=192,48,0,14,4,1,1,9,1 PrbElemDl5=240,33,0,14,5,1,1,9,1 # Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,24,0,0,9,1 -ExtBfwDl1=2,24,0,0,9,1 -ExtBfwDl2=2,24,0,0,9,1 -ExtBfwDl3=2,24,0,0,9,1 -ExtBfwDl4=2,24,0,0,9,1 -ExtBfwDl5=2,17,0,0,9,1 +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,24,0,0,9,1,1 +ExtBfwDl1=2,24,0,0,9,1,1 +ExtBfwDl2=2,24,0,0,9,1,1 +ExtBfwDl3=2,24,0,0,9,1,1 +ExtBfwDl4=2,24,0,0,9,1,1 +ExtBfwDl5=2,17,0,0,9,1,1 nPrbElemUl=6 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType @@ -178,17 +183,17 @@ PrbElemUl3=144,48,0,14,3,1,1,9,1 PrbElemUl4=192,48,0,14,4,1,1,9,1 PrbElemUl5=240,33,0,14,5,1,1,9,1 # Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,24,0,0,9,1 -ExtBfwUl1=2,24,0,0,9,1 -ExtBfwUl2=2,24,0,0,9,1 -ExtBfwUl3=2,24,0,0,9,1 -ExtBfwUl4=2,24,0,0,9,1 -ExtBfwUl5=2,17,0,0,9,1 +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,24,0,0,9,1,1 +ExtBfwUl1=2,24,0,0,9,1,1 +ExtBfwUl2=2,24,0,0,9,1,1 +ExtBfwUl3=2,24,0,0,9,1,1 +ExtBfwUl4=2,24,0,0,9,1,1 +ExtBfwUl5=2,17,0,0,9,1,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 -#PrbElemSrs1=136,137,0,14,0,0,0,16,0 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### @@ -196,7 +201,7 @@ PrbElemSrs0=0,273,0,14,0,0,1,9,0 iqswap=0 #do swap of IQ before send buffer to eth nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane + ##Debug debugStop=1 #stop app on 1pps boundary (gps_second % 30) debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary @@ -205,7 +210,7 @@ bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardw CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled ##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU +totalBFWeights=32 # Total number of Beamforming Weights on RU Tadv_cp_dl=25 # in us # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/284/peak_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/284/peak_o_ru.dat new file mode 100644 index 0000000..c9f1c54 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/284/peak_o_ru.dat @@ -0,0 +1,303 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +#Peak: 100 % +#284 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % + + + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) +antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B +antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B +antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R + +#UEs +muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources +DlLayersPerUe=1 #number of RX anntennas on DL UE side +UlLayersPerUe=1 #number of TX anntennas on UL UE side + + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 +antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 +antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 +antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 +antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 +antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 +antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 +#antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 +#antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 +#antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 +#antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 +#antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 +#antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 +#antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 + +#SlotNumTx0=./peak_txconfig_1.cfg +#SlotNumTx1=./peak_txconfig_1.cfg +#SlotNumTx2=./peak_txconfig_1.cfg +#SlotNumTx3=./peak_txconfig_2.cfg +#SlotNumTx4=./peak_txconfig_0.cfg + +#SlotNumTx5=./peak_txconfig_1.cfg +#SlotNumTx6=./peak_txconfig_1.cfg +#SlotNumTx7=./peak_txconfig_1.cfg +#SlotNumTx8=./peak_txconfig_2.cfg +#SlotNumTx9=./peak_txconfig_0.cfg + +#SlotNumRx0=./peak_rxconfig_0.cfg +#SlotNumRx1=./peak_rxconfig_0.cfg +#SlotNumRx2=./peak_rxconfig_0.cfg +#SlotNumRx3=./peak_rxconfig_2.cfg +#SlotNumRx4=./peak_rxconfig_1.cfg + +#SlotNumRx5=./peak_rxconfig_0.cfg +#SlotNumRx6=./peak_rxconfig_0.cfg +#SlotNumRx7=./peak_rxconfig_0.cfg +#SlotNumRx8=./peak_rxconfig_3.cfg +#SlotNumRx9=./peak_rxconfig_1.cfg + + +#TODO: +antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 +antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 +antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 +antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 +antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 +antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 +antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 +antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 +#antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 +#antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 +#antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 +#antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 +#antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 +#antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 +#antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 + +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=189 + +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) + +antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin +antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin +antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin +antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin + +#DL PRB / % Used RBs UL PRB / % Used RBs +#66% 180 33% 90 + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +extType=1 + +nPrbElemDl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,48,0,14,0,1,1,9,1 +PrbElemDl1=48,48,0,14,1,1,1,9,1 +PrbElemDl2=96,48,0,14,2,1,1,9,1 +PrbElemDl3=144,48,0,14,3,1,1,9,1 +PrbElemDl4=192,48,0,14,4,1,1,9,1 +PrbElemDl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,24,0,0,9,1,1 +ExtBfwDl1=2,24,0,0,9,1,1 +ExtBfwDl2=2,24,0,0,9,1,1 +ExtBfwDl3=2,24,0,0,9,1,1 +ExtBfwDl4=2,24,0,0,9,1,1 +ExtBfwDl5=2,17,0,0,9,1,1 + +nPrbElemUl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,48,0,14,0,1,1,9,1 +PrbElemUl1=48,48,0,14,1,1,1,9,1 +PrbElemUl2=96,48,0,14,2,1,1,9,1 +PrbElemUl3=144,48,0,14,3,1,1,9,1 +PrbElemUl4=192,48,0,14,4,1,1,9,1 +PrbElemUl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,24,0,0,9,1,1 +ExtBfwUl1=2,24,0,0,9,1,1 +ExtBfwUl2=2,24,0,0,9,1,1 +ExtBfwUl3=2,24,0,0,9,1,1 +ExtBfwUl4=2,24,0,0,9,1,1 +ExtBfwUl5=2,17,0,0,9,1,1 + +nPrbElemSrs=1 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order +compression=1 # (1) compression enabled (0) compression disabled + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +Tadv_cp_dl=25 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=285 # 285.42us +T2a_max_cp_dl=429 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=285 # 285.42us +T2a_max_cp_ul=429 # 428.12us + +#Reception Window U-plane +T2a_min_up=71 # 71.35in us +T2a_max_up=428 # 428.12us + +#Transmission Window +Ta3_min=20 # in us +Ta3_max=32 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=285 +T1a_max_cp_dl=429 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=300 + +#U-plane +##Transmission Window +T1a_min_up=96 #71 + 25 us +T1a_max_up=196 #71 + 25 us + +#Reception Window +Ta4_min=0 # in us +Ta4_max=75 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/803/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/284/usecase_du.cfg similarity index 86% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/803/usecase_du.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/284/usecase_du.cfg index f6efede..8c99ba3 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/803/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/284/usecase_du.cfg @@ -15,25 +15,29 @@ # limitations under the License. # #******************************************************************************/ + # This is simple configuration file. Use '#' sign for comments + appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -mainCore=0 #core for main() -systemCore=2 -ioCore=10 # core id -ioWorker=0x4000000000000 # mask [0- no workers] -dpdkMemorySize=8192 +mainCore=20 #core for main() +systemCore=22 +ioCore=28 # core id +ioWorker=0x020000000 # mask [0- no workers] +dpdkMemorySize=8192 iovaMode=0 -oXuNum=1 # numbers of O-RU connected to O-DU +oXuNum=2 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs -oXuCfgFile0=./config_file_o_du.dat #O-RU0 +oXuCfgFile0=./peak_o_du.dat #O-DU0 +oXuCfgFile1=./peak_o_du.dat #O-DU1 +#oXuCfgFile2=./avg_o_du_tst377.dat #O-DU2 # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:01 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/284/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/284/usecase_du_icx.cfg new file mode 100644 index 0000000..eb5480d --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/284/usecase_du_icx.cfg @@ -0,0 +1,60 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments + +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +mainCore=0 #core for main() +systemCore=2 +ioCore=8 # core id +ioWorker=0x200 # mask [0- no workers] + +dpdkMemorySize=8192 +iovaMode=0 + +oXuNum=2 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./peak_o_du.dat #O-DU0 +oXuCfgFile1=./peak_o_du.dat #O-DU1 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 + +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/803/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/284/usecase_ru.cfg similarity index 89% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/803/usecase_ru.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/284/usecase_ru.cfg index 7d7d28a..19b8b78 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/803/usecase_ru.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/284/usecase_ru.cfg @@ -15,24 +15,28 @@ # limitations under the License. # #******************************************************************************/ + # This is simple configuration file. Use '#' sign for comments + appMode=1 # All O-DU(0) | O-RU(1) instanceId=1 # 0,1,2,... in case more than 1 application started on the same system mainCore=0 #core for main() systemCore=2 -ioCore=4 # core id -ioWorker=0x3E0 # second socket +ioCore=8 # core id +ioWorker=0x3E00 # second socket + dpdkMemorySize=8192 -#dpdkMemorySize=17408 iovaMode=0 -oXuNum=1 # numbers of O-RU connected to O-DU +oXuNum=2 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 +oXuCfgFile0=./peak_o_ru.dat #O-RU0 +oXuCfgFile1=./peak_o_ru.dat #O-RU1 +#oXuCfgFile2=./avg_o_ru_tst377.dat #O-RU2 # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:00 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/284/usecase_ru_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/284/usecase_ru_icx.cfg new file mode 100644 index 0000000..4fccbd8 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/284/usecase_ru_icx.cfg @@ -0,0 +1,59 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments + +appMode=1 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +mainCore=0 #core for main() +systemCore=2 +ioCore=8 # core id +ioWorker=0x3E00 # second socket + +dpdkMemorySize=8192 +iovaMode=0 + +oXuNum=2 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./peak_o_ru.dat #O-RU0 +oXuCfgFile1=./peak_o_ru.dat #O-RU1 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:00 +oXuRem0Mac1=00:11:22:33:00:10 +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:20 +oXuRem0Mac3=00:11:22:33:00:30 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:00 +oXuRem1Mac1=00:11:22:33:01:10 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:20 +oXuRem1Mac3=00:11:22:33:01:30 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:00 +oXuRem2Mac1=00:11:22:33:02:10 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:20 +oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/2842/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2842/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2842/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/2842/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2842/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2842/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2842/peak_o_du_tst376.dat similarity index 76% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_o_du.dat rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/2842/peak_o_du_tst376.dat index b4327a2..803946f 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2842/peak_o_du_tst376.dat @@ -26,9 +26,9 @@ instanceId=0 # 0,1,2,... in case more than 1 application started on the same sys appMode=0 # O-DU(0) | O-RU(1) xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R +antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B +antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B +antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R #UEs muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources @@ -70,14 +70,14 @@ antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 +#antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 +#antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 +#antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 +#antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 +#antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 +#antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 +#antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 +#antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 #SlotNumTx0=./peak_txconfig_1.cfg #SlotNumTx1=./peak_txconfig_1.cfg @@ -112,14 +112,14 @@ DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX anten DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] #UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] @@ -130,21 +130,24 @@ UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX anten UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -187,7 +190,8 @@ ExtBfwUl4=2,24,0,0,9,1 ExtBfwUl5=2,17,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### @@ -195,7 +199,7 @@ PrbElemSrs0=0,273,0,14,0,0,1,9,0 iqswap=0 #do swap of IQ before send buffer to eth nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane + ##Debug debugStop=1 #stop app on 1pps boundary (gps_second % 30) debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary @@ -204,7 +208,7 @@ bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardw CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled ##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU +totalBFWeights=32 # Total number of Beamforming Weights on RU Tadv_cp_dl=25 # in us # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2842/peak_o_ru_tst376.dat similarity index 72% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_o_ru.dat rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/2842/peak_o_ru_tst376.dat index b5a2502..69ffee9 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2842/peak_o_ru_tst376.dat @@ -17,7 +17,7 @@ #******************************************************************************/ #Peak: 100 % -#311 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 16 100% 273 3276 100% 273 3276 Peak: 100 % +#301 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % @@ -26,9 +26,9 @@ instanceId=1 # 0,1,2,... in case more than 1 application started on the same sys appMode=1 # O-DU(0) | O-RU(1) xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R +antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B +antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B +antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R #UEs muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources @@ -70,14 +70,14 @@ antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 +#antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 +#antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 +#antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 +#antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 +#antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 +#antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 +#antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 +#antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 #SlotNumTx0=./peak_txconfig_1.cfg #SlotNumTx1=./peak_txconfig_1.cfg @@ -104,7 +104,7 @@ antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 #SlotNumRx9=./peak_rxconfig_1.cfg - +#TODO: antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 @@ -113,20 +113,23 @@ antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +#antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 +#antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 +#antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 +#antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 +#antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 +#antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 +#antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 +#antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 + +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -160,38 +163,38 @@ antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin #DL PRB / % Used RBs UL PRB / % Used RBs #66% 180 33% 90 @@ -237,7 +240,8 @@ ExtBfwUl4=2,24,0,0,9,1 ExtBfwUl5=2,17,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### @@ -245,7 +249,7 @@ PrbElemSrs0=0,273,0,14,0,0,1,9,0 iqswap=0 #do swap of IQ before send buffer to eth nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane + ##Debug debugStop=1 #stop app on 1pps boundary (gps_second % 30) debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary @@ -254,7 +258,7 @@ bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardw CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled ##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU +totalBFWeights=32 # Total number of Beamforming Weights on RU Tadv_cp_dl=25 # in us # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/2842/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2842/usecase_du.cfg new file mode 100644 index 0000000..eccf8af --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2842/usecase_du.cfg @@ -0,0 +1,62 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments + +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system + +mainCore=20 #core for main() +systemCore=22 +ioCore=28 # core id +ioWorker=0x020000000 # mask [0- no workers] + +dpdkMemorySize=8192 +iovaMode=0 + +oXuNum=2 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./peak_o_du_tst376.dat #O-DU0 +oXuCfgFile1=./peak_o_du_tst376.dat #O-DU1 +#oXuCfgFile2=./avg_o_du_tst377.dat #O-DU2 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 + +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/2842/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2842/usecase_du_icx.cfg new file mode 100644 index 0000000..c7172f9 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2842/usecase_du_icx.cfg @@ -0,0 +1,60 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments + +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +mainCore=0 #core for main() +systemCore=2 +ioCore=8 # core id +ioWorker=0x200 # mask [0- no workers] + +dpdkMemorySize=8192 +iovaMode=0 + +oXuNum=2 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./peak_o_du_tst376.dat #O-DU0 +oXuCfgFile1=./peak_o_du_tst376.dat #O-DU1 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 + +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/804/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2842/usecase_ru.cfg similarity index 88% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/804/usecase_ru.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/2842/usecase_ru.cfg index 7d7d28a..d784c80 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/804/usecase_ru.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2842/usecase_ru.cfg @@ -15,24 +15,28 @@ # limitations under the License. # #******************************************************************************/ + # This is simple configuration file. Use '#' sign for comments + appMode=1 # All O-DU(0) | O-RU(1) instanceId=1 # 0,1,2,... in case more than 1 application started on the same system mainCore=0 #core for main() systemCore=2 -ioCore=4 # core id -ioWorker=0x3E0 # second socket +ioCore=8 # core id +ioWorker=0x3E00 # second socket + dpdkMemorySize=8192 -#dpdkMemorySize=17408 iovaMode=0 -oXuNum=1 # numbers of O-RU connected to O-DU +oXuNum=2 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 +oXuCfgFile0=./peak_o_ru_tst376.dat #O-RU0 +oXuCfgFile1=./peak_o_ru_tst376.dat #O-RU1 +#oXuCfgFile2=./avg_o_ru_tst377.dat #O-RU2 # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:00 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/2842/usecase_ru_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2842/usecase_ru_icx.cfg new file mode 100644 index 0000000..1f250f4 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/2842/usecase_ru_icx.cfg @@ -0,0 +1,59 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments + +appMode=1 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +mainCore=0 #core for main() +systemCore=2 +ioCore=8 # core id +ioWorker=0x3E00 # second socket + +dpdkMemorySize=8192 +iovaMode=0 + +oXuNum=2 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./peak_o_ru_tst376.dat #O-RU0 +oXuCfgFile1=./peak_o_ru_tst376.dat #O-RU1 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:00 +oXuRem0Mac1=00:11:22:33:00:10 +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:20 +oXuRem0Mac3=00:11:22:33:00:30 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:00 +oXuRem1Mac1=00:11:22:33:01:10 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:20 +oXuRem1Mac3=00:11:22:33:01:30 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:00 +oXuRem2Mac1=00:11:22:33:02:10 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:20 +oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3/config_file_o_du.dat deleted file mode 100644 index 2fad5c7..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3/config_file_o_du.dat +++ /dev/null @@ -1,230 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 # core id -ioWorker=0x2000000 # mask 0-no workers - -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=8 -max_sections_per_symbol=8 - -nPrbElemDl=8 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,36,0,14,1,1,1,9,1 -PrbElemDl1=36,36,0,14,2,1,1,9,1 -PrbElemDl2=72,36,0,14,3,1,1,9,1 -PrbElemDl3=108,36,0,14,4,1,1,9,1 -PrbElemDl4=144,36,0,14,5,1,1,9,1 -PrbElemDl5=180,36,0,14,6,1,1,9,1 -PrbElemDl6=216,36,0,14,7,1,1,9,1 -PrbElemDl7=252,21,0,14,8,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,3,0,0,9,1 -ExtBfwDl1=12,3,0,0,9,1 -ExtBfwDl2=12,3,0,0,9,1 -ExtBfwDl3=12,3,0,0,9,1 -ExtBfwDl4=12,3,0,0,9,1 -ExtBfwDl5=12,3,0,0,9,1 -ExtBfwDl6=12,3,0,0,9,1 -ExtBfwDl7=7,3,0,0,9,1 - -nPrbElemUl=8 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,36,0,14,1,1,1,9,1 -PrbElemUl1=36,36,0,14,2,1,1,9,1 -PrbElemUl2=72,36,0,14,3,1,1,9,1 -PrbElemUl3=108,36,0,14,4,1,1,9,1 -PrbElemUl4=144,36,0,14,5,1,1,9,1 -PrbElemUl5=180,36,0,14,6,1,1,9,1 -PrbElemUl6=216,36,0,14,7,1,1,9,1 -PrbElemUl7=252,21,0,14,8,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,3,0,0,9,1 -ExtBfwUl1=12,3,0,0,9,1 -ExtBfwUl2=12,3,0,0,9,1 -ExtBfwUl3=12,3,0,0,9,1 -ExtBfwUl4=12,3,0,0,9,1 -ExtBfwUl5=12,3,0,0,9,1 -ExtBfwUl6=12,3,0,0,9,1 -ExtBfwUl7=7,3,0,0,9,1 -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3/config_file_o_ru.dat deleted file mode 100644 index 28424d5..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3/config_file_o_ru.dat +++ /dev/null @@ -1,237 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=15 -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=8 -max_sections_per_symbol=8 - -nPrbElemDl=8 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,36,0,14,1,1,1,9,1 -PrbElemDl1=36,36,0,14,2,1,1,9,1 -PrbElemDl2=72,36,0,14,3,1,1,9,1 -PrbElemDl3=108,36,0,14,4,1,1,9,1 -PrbElemDl4=144,36,0,14,5,1,1,9,1 -PrbElemDl5=180,36,0,14,6,1,1,9,1 -PrbElemDl6=216,36,0,14,7,1,1,9,1 -PrbElemDl7=252,21,0,14,8,1,1,9,1 - -nPrbElemUl=8 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,36,0,14,1,1,1,9,1 -PrbElemUl1=36,36,0,14,2,1,1,9,1 -PrbElemUl2=72,36,0,14,3,1,1,9,1 -PrbElemUl3=108,36,0,14,4,1,1,9,1 -PrbElemUl4=144,36,0,14,5,1,1,9,1 -PrbElemUl5=180,36,0,14,6,1,1,9,1 -PrbElemUl6=216,36,0,14,7,1,1,9,1 -PrbElemUl7=252,21,0,14,8,1,1,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3/usecase_du.cfg deleted file mode 100644 index 5c067f4..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3/usecase_du.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:01.0 -#PciBusAddoXu0Vf1=0000:51:01.1 -#PciBusAddoXu0Vf2=0000:51:01.2 -#PciBusAddoXu0Vf3=0000:51:01.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:01.4 -#PciBusAddoXu1Vf1=0000:51:01.5 -#PciBusAddoXu1Vf2=0000:51:01.6 -#PciBusAddoXu1Vf3=0000:51:01.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:02.0 -#PciBusAddoXu2Vf1=0000:51:02.1 -#PciBusAddoXu2Vf2=0000:51:02.2 -#PciBusAddoXu2Vf3=0000:51:02.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3/usecase_ru.cfg deleted file mode 100644 index 1ab0180..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3/usecase_ru.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -ioCore=15 # core id -ioWorker=0x800000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:11.0 -#PciBusAddoXu0Vf1=0000:51:11.1 -#PciBusAddoXu0Vf2=0000:51:11.2 -#PciBusAddoXu0Vf3=0000:51:11.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:11.4 -#PciBusAddoXu1Vf1=0000:51:11.5 -#PciBusAddoXu1Vf2=0000:51:11.6 -#PciBusAddoXu1Vf3=0000:51:11.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:12.0 -#PciBusAddoXu2Vf1=0000:51:12.1 -#PciBusAddoXu2Vf2=0000:51:12.2 -#PciBusAddoXu2Vf3=0000:51:12.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/301/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/301/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..c27a25f --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/301/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 6 + + 5,45,6,46,7,47,8,48,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/301/bbu_pool_cfg_o_du_icx.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/301/bbu_pool_cfg_o_du_icx.xml new file mode 100644 index 0000000..f2dfa93 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/301/bbu_pool_cfg_o_du_icx.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 10 + + 10 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/301/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/301/config_file_o_du.dat index c375dd4..64916c0 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/301/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/301/config_file_o_du.dat @@ -116,11 +116,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -163,7 +166,7 @@ ExtBfwUl4=2,24,0,0,9,1 ExtBfwUl5=2,17,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/301/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/301/config_file_o_ru.dat index 0dfd4bd..3a496c8 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/301/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/301/config_file_o_ru.dat @@ -97,11 +97,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -212,7 +215,7 @@ ExtBfwUl4=2,24,0,0,9,1 ExtBfwUl5=2,17,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/301/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/301/usecase_du.cfg index f6efede..0d03372 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/301/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/301/usecase_du.cfg @@ -24,6 +24,7 @@ systemCore=2 ioCore=10 # core id ioWorker=0x4000000000000 # mask [0- no workers] dpdkMemorySize=8192 +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml iovaMode=0 @@ -33,6 +34,7 @@ oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + oXuCfgFile0=./config_file_o_du.dat #O-RU0 # remote O-XU 0 Eth Link 0 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/301/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/301/usecase_ru.cfg index 3ab240f..a85a2c3 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/301/usecase_ru.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/301/usecase_ru.cfg @@ -27,6 +27,7 @@ oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs +oXuBbuCfgFile=./bbu_pool_cfg_o_ru.xml #O-RU0 oXuCfgFile0=./config_file_o_ru.dat #O-RU0 # remote O-XU 0 Eth Link 0 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/302/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/302/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..c27a25f --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/302/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 6 + + 5,45,6,46,7,47,8,48,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/302/bbu_pool_cfg_o_du_icx.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/302/bbu_pool_cfg_o_du_icx.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/302/bbu_pool_cfg_o_du_icx.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/302/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/302/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/302/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/302/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/302/config_file_o_du.dat index 752ea96..900c8d7 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/302/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/302/config_file_o_du.dat @@ -115,11 +115,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -146,7 +149,7 @@ ExtBfwUl0=2,25,0,0,9,1 ExtBfwUl1=2,25,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/302/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/302/config_file_o_ru.dat index af91417..e6657bd 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/302/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/302/config_file_o_ru.dat @@ -95,11 +95,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -190,7 +193,7 @@ ExtBfwUl0=2,25,0,0,9,1 ExtBfwUl1=2,25,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/302/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/302/usecase_du.cfg index d7b23b7..0c4ccbb 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/302/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/302/usecase_du.cfg @@ -22,12 +22,13 @@ mainCore=0 #core for main() systemCore=2 ioCore=10 # core id ioWorker=0x4000000000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml dpdkMemorySize=8192 oXuNum=1 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs oXuCfgFile0=./config_file_o_du.dat #O-RU0 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/302/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/302/usecase_du_icx.cfg deleted file mode 100644 index c46970e..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/302/usecase_du_icx.cfg +++ /dev/null @@ -1,54 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -mainCore=0 #core for main() -systemCore=2 -ioCore=21 # core id -ioWorker=0x200000000000 # mask [0- no workers] -dpdkMemorySize=8192 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/302/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/302/usecase_ru.cfg index 78ef5d1..3ab240f 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/302/usecase_ru.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/302/usecase_ru.cfg @@ -24,7 +24,7 @@ ioWorker=0x800000000 # mask [0- no workers] oXuNum=1 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs oXuCfgFile0=./config_file_o_ru.dat #O-RU0 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/303/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/303/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..c27a25f --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/303/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 6 + + 5,45,6,46,7,47,8,48,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/303/bbu_pool_cfg_o_du_icx.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/303/bbu_pool_cfg_o_du_icx.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/303/bbu_pool_cfg_o_du_icx.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/303/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/303/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/303/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/303/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/303/config_file_o_du.dat index 7e3eb43..032c36e 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/303/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/303/config_file_o_du.dat @@ -116,11 +116,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -147,7 +150,7 @@ ExtBfwUl0=2,25,0,0,9,1 ExtBfwUl1=2,25,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/303/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/303/config_file_o_ru.dat index d229a17..d56af3c 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/303/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/303/config_file_o_ru.dat @@ -95,11 +95,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -190,7 +193,7 @@ ExtBfwUl0=2,25,0,0,9,1 ExtBfwUl1=2,25,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/303/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/303/usecase_du.cfg index 5eb0082..a8c572b 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/303/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/303/usecase_du.cfg @@ -23,6 +23,7 @@ mainCore=0 #core for main() systemCore=2 ioCore=10 # core id ioWorker=0x4000000000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml dpdkMemorySize=8192 oXuNum=1 # numbers of O-RU connected to O-DU @@ -45,6 +46,7 @@ oXuRem1Mac0=00:11:22:33:01:01 oXuRem1Mac1=00:11:22:33:01:11 # remote O-XU 1 Eth Link 1 oXuRem1Mac2=00:11:22:33:01:21 + oXuRem1Mac3=00:11:22:33:01:31 # remote O-XU 2 Eth Link 0 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/303/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/303/usecase_du_icx.cfg deleted file mode 100644 index a8f6be4..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/303/usecase_du_icx.cfg +++ /dev/null @@ -1,55 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -mainCore=0 #core for main() - -systemCore=2 -ioCore=21 # core id -ioWorker=0x200000000000 # mask [0- no workers] -dpdkMemorySize=8192 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/304/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/304/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..c27a25f --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/304/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 6 + + 5,45,6,46,7,47,8,48,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/304/bbu_pool_cfg_o_du_icx.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/304/bbu_pool_cfg_o_du_icx.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/304/bbu_pool_cfg_o_du_icx.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/304/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/304/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/304/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/304/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/304/config_file_o_du.dat index 6b43cb4..47ebbd9 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/304/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/304/config_file_o_du.dat @@ -130,11 +130,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -159,6 +162,8 @@ PrbElemUl1=50,50,0,14,1,1,1,9,1 ExtBfwUl0=2,25,0,0,9,1 ExtBfwUl1=2,25,0,0,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/304/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/304/config_file_o_ru.dat index 4e8e300..7a1a7f3 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/304/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/304/config_file_o_ru.dat @@ -108,11 +108,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -206,6 +209,8 @@ PrbElemUl1=50,50,0,14,1,1,1,9,1 ExtBfwUl0=2,25,0,0,9,1 ExtBfwUl1=2,25,0,0,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/304/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/304/usecase_du.cfg index da0df27..a21446d 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/304/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/304/usecase_du.cfg @@ -24,6 +24,7 @@ systemCore=2 ioCore=10 # core id ioWorker=0x4000000000000 # mask [0- no workers] dpdkMemorySize=8192 +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/304/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/304/usecase_du_icx.cfg deleted file mode 100644 index 0248866..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/304/usecase_du_icx.cfg +++ /dev/null @@ -1,55 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=21 # core id -ioWorker=0x200000000000 # mask [0- no workers] -dpdkMemorySize=8192 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/305/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/305/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..c27a25f --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/305/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 6 + + 5,45,6,46,7,47,8,48,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/305/bbu_pool_cfg_o_du_icx.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/305/bbu_pool_cfg_o_du_icx.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/305/bbu_pool_cfg_o_du_icx.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/305/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/305/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/305/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/305/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/305/config_file_o_du.dat index 763aae0..cbab3a5 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/305/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/305/config_file_o_du.dat @@ -116,11 +116,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -146,6 +149,9 @@ PrbElemUl1=50,50,0,14,1,1,1,9,1 ExtBfwUl0=2,25,0,0,9,1 ExtBfwUl1=2,25,0,0,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/305/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/305/config_file_o_ru.dat index f337c32..1b399b5 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/305/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/305/config_file_o_ru.dat @@ -95,11 +95,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -191,7 +194,7 @@ ExtBfwUl0=2,25,0,0,9,1 ExtBfwUl1=2,25,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/305/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/305/usecase_du.cfg index da0df27..d008bcc 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/305/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/305/usecase_du.cfg @@ -23,6 +23,7 @@ mainCore=0 #core for main() systemCore=2 ioCore=10 # core id ioWorker=0x4000000000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml dpdkMemorySize=8192 oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/306/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/306/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..c27a25f --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/306/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 6 + + 5,45,6,46,7,47,8,48,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/306/bbu_pool_cfg_o_du_icx.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/306/bbu_pool_cfg_o_du_icx.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/306/bbu_pool_cfg_o_du_icx.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/306/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/306/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/306/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/306/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/306/config_file_o_du.dat index ab6d63f..d9f82fd 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/306/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/306/config_file_o_du.dat @@ -117,11 +117,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -148,7 +151,7 @@ ExtBfwUl0=2,25,0,0,9,1 ExtBfwUl1=2,25,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/306/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/306/config_file_o_ru.dat index 2694156..fe954c5 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/306/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/306/config_file_o_ru.dat @@ -95,11 +95,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -190,7 +193,7 @@ ExtBfwUl0=2,25,0,0,9,1 ExtBfwUl1=2,25,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/306/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/306/usecase_du.cfg index 5eb0082..d565dd2 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/306/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/306/usecase_du.cfg @@ -23,6 +23,7 @@ mainCore=0 #core for main() systemCore=2 ioCore=10 # core id ioWorker=0x4000000000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml dpdkMemorySize=8192 oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/306/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/306/usecase_du_icx.cfg deleted file mode 100644 index a8f6be4..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/306/usecase_du_icx.cfg +++ /dev/null @@ -1,55 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -mainCore=0 #core for main() - -systemCore=2 -ioCore=21 # core id -ioWorker=0x200000000000 # mask [0- no workers] -dpdkMemorySize=8192 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/311/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/311/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..c27a25f --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/311/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 6 + + 5,45,6,46,7,47,8,48,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/311/bbu_pool_cfg_o_du_icx.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/311/bbu_pool_cfg_o_du_icx.xml new file mode 100644 index 0000000..f2dfa93 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/311/bbu_pool_cfg_o_du_icx.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 10 + + 10 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/311/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/311/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/311/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/311/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/311/config_file_o_du.dat index d976fbd..e3621d7 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/311/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/311/config_file_o_du.dat @@ -116,11 +116,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -163,7 +166,7 @@ ExtBfwUl4=2,24,0,0,9,1 ExtBfwUl5=2,17,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/311/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/311/config_file_o_ru.dat index 58f09f7..01f67d1 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/311/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/311/config_file_o_ru.dat @@ -97,11 +97,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -212,7 +215,7 @@ ExtBfwUl4=2,24,0,0,9,1 ExtBfwUl5=2,17,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/311/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/311/usecase_du.cfg index b741686..c38b9f3 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/311/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/311/usecase_du.cfg @@ -23,6 +23,7 @@ mainCore=0 #core for main() systemCore=2 ioCore=10 # core id ioWorker=0x4000000000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml dpdkMemorySize=8192 iovaMode=0 @@ -33,6 +34,7 @@ oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs #oXuRxqNumber=48 # number of HW RX Queues per VF (should >= RX IQ stream per VF) + oXuCfgFile0=./config_file_o_du.dat #O-RU0 # remote O-XU 0 Eth Link 0 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/312/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/312/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..c27a25f --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/312/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 6 + + 5,45,6,46,7,47,8,48,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/312/bbu_pool_cfg_o_du_icx.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/312/bbu_pool_cfg_o_du_icx.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/312/bbu_pool_cfg_o_du_icx.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/312/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/312/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/312/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/312/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/312/config_file_o_du.dat index fafc862..1a4ad8e 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/312/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/312/config_file_o_du.dat @@ -115,11 +115,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -146,7 +149,7 @@ ExtBfwUl0=2,25,0,0,9,1 ExtBfwUl1=2,25,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/312/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/312/config_file_o_ru.dat index 61282ce..c9f5a3a 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/312/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/312/config_file_o_ru.dat @@ -95,11 +95,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -190,7 +193,7 @@ ExtBfwUl0=2,25,0,0,9,1 ExtBfwUl1=2,25,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/312/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/312/usecase_du.cfg index da0df27..d008bcc 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/312/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/312/usecase_du.cfg @@ -23,6 +23,7 @@ mainCore=0 #core for main() systemCore=2 ioCore=10 # core id ioWorker=0x4000000000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml dpdkMemorySize=8192 oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/312/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/312/usecase_du_icx.cfg deleted file mode 100644 index 0248866..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/312/usecase_du_icx.cfg +++ /dev/null @@ -1,55 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=21 # core id -ioWorker=0x200000000000 # mask [0- no workers] -dpdkMemorySize=8192 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/313/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/313/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..c27a25f --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/313/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 6 + + 5,45,6,46,7,47,8,48,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/313/bbu_pool_cfg_o_du_icx.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/313/bbu_pool_cfg_o_du_icx.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/313/bbu_pool_cfg_o_du_icx.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/313/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/313/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/313/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/313/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/313/config_file_o_du.dat index a35ca5e..44b9795 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/313/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/313/config_file_o_du.dat @@ -116,11 +116,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -147,7 +150,7 @@ ExtBfwUl0=2,25,0,0,9,1 ExtBfwUl1=2,25,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/313/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/313/config_file_o_ru.dat index 5735405..29f60d7 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/313/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/313/config_file_o_ru.dat @@ -95,11 +95,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -190,7 +193,7 @@ ExtBfwUl0=2,25,0,0,9,1 ExtBfwUl1=2,25,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/313/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/313/usecase_du.cfg index da0df27..d008bcc 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/313/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/313/usecase_du.cfg @@ -23,6 +23,7 @@ mainCore=0 #core for main() systemCore=2 ioCore=10 # core id ioWorker=0x4000000000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml dpdkMemorySize=8192 oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/313/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/313/usecase_du_icx.cfg deleted file mode 100644 index 0248866..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/313/usecase_du_icx.cfg +++ /dev/null @@ -1,55 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=21 # core id -ioWorker=0x200000000000 # mask [0- no workers] -dpdkMemorySize=8192 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/314/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/314/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..c27a25f --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/314/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 6 + + 5,45,6,46,7,47,8,48,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/314/bbu_pool_cfg_o_du_icx.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/314/bbu_pool_cfg_o_du_icx.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/314/bbu_pool_cfg_o_du_icx.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/314/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/314/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/314/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/314/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/314/config_file_o_du.dat index cf9dd6e..5f08ce3 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/314/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/314/config_file_o_du.dat @@ -130,11 +130,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -159,6 +162,9 @@ PrbElemUl1=50,50,0,14,1,1,1,9,1 ExtBfwUl0=2,25,0,0,9,1 ExtBfwUl1=2,25,0,0,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/314/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/314/config_file_o_ru.dat index cee1913..aa09063 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/314/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/314/config_file_o_ru.dat @@ -108,11 +108,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -206,6 +209,9 @@ PrbElemUl1=50,50,0,14,1,1,1,9,1 ExtBfwUl0=2,25,0,0,9,1 ExtBfwUl1=2,25,0,0,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/314/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/314/usecase_du.cfg index da0df27..d008bcc 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/314/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/314/usecase_du.cfg @@ -23,6 +23,7 @@ mainCore=0 #core for main() systemCore=2 ioCore=10 # core id ioWorker=0x4000000000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml dpdkMemorySize=8192 oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/314/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/314/usecase_du_icx.cfg deleted file mode 100644 index 0248866..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/314/usecase_du_icx.cfg +++ /dev/null @@ -1,55 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=21 # core id -ioWorker=0x200000000000 # mask [0- no workers] -dpdkMemorySize=8192 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/315/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/315/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..c27a25f --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/315/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 6 + + 5,45,6,46,7,47,8,48,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/315/bbu_pool_cfg_o_du_icx.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/315/bbu_pool_cfg_o_du_icx.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/315/bbu_pool_cfg_o_du_icx.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/315/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/315/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/315/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/315/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/315/config_file_o_du.dat index 788735e..5943fad 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/315/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/315/config_file_o_du.dat @@ -116,11 +116,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -146,6 +149,9 @@ PrbElemUl1=50,50,0,14,1,1,1,9,1 ExtBfwUl0=2,25,0,0,9,1 ExtBfwUl1=2,25,0,0,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/315/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/315/config_file_o_ru.dat index 90fd63f..ba0163f 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/315/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/315/config_file_o_ru.dat @@ -95,11 +95,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -191,7 +194,7 @@ ExtBfwUl0=2,25,0,0,9,1 ExtBfwUl1=2,25,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/315/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/315/usecase_du.cfg index da0df27..d008bcc 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/315/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/315/usecase_du.cfg @@ -23,6 +23,7 @@ mainCore=0 #core for main() systemCore=2 ioCore=10 # core id ioWorker=0x4000000000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml dpdkMemorySize=8192 oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/315/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/315/usecase_du_icx.cfg deleted file mode 100644 index 0248866..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/315/usecase_du_icx.cfg +++ /dev/null @@ -1,55 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=21 # core id -ioWorker=0x200000000000 # mask [0- no workers] -dpdkMemorySize=8192 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/316/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/316/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..c27a25f --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/316/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 6 + + 5,45,6,46,7,47,8,48,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/316/bbu_pool_cfg_o_du_icx.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/316/bbu_pool_cfg_o_du_icx.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/316/bbu_pool_cfg_o_du_icx.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/316/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/316/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/316/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/316/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/316/config_file_o_du.dat index bc19617..ab31ea2 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/316/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/316/config_file_o_du.dat @@ -117,11 +117,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -148,7 +151,7 @@ ExtBfwUl0=2,25,0,0,9,1 ExtBfwUl1=2,25,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/316/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/316/config_file_o_ru.dat index 7d97cb4..4f2b46b 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/316/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/316/config_file_o_ru.dat @@ -95,11 +95,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -190,7 +193,7 @@ ExtBfwUl0=2,25,0,0,9,1 ExtBfwUl1=2,25,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/316/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/316/usecase_du.cfg index da0df27..d008bcc 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/316/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/316/usecase_du.cfg @@ -23,6 +23,7 @@ mainCore=0 #core for main() systemCore=2 ioCore=10 # core id ioWorker=0x4000000000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml dpdkMemorySize=8192 oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/316/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/316/usecase_du_icx.cfg deleted file mode 100644 index 0248866..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/316/usecase_du_icx.cfg +++ /dev/null @@ -1,55 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=21 # core id -ioWorker=0x200000000000 # mask [0- no workers] -dpdkMemorySize=8192 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/321/bbu_pool_cfg_o_du_icx.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/321/bbu_pool_cfg_o_du_icx.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/321/bbu_pool_cfg_o_du_icx.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/321/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/321/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/321/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/601/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/321/config_file_o_du.dat similarity index 93% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/601/config_file_o_du.dat rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/321/config_file_o_du.dat index 42b4504..b8ab7bc 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/601/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/321/config_file_o_du.dat @@ -116,16 +116,21 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used +extType=1 + nPrbElemDl=6 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams @@ -136,13 +141,13 @@ PrbElemDl3=144,48,0,14,3,1,1,9,1 PrbElemDl4=192,48,0,14,4,1,1,9,1 PrbElemDl5=240,33,0,14,5,1,1,9,1 # Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,24,0,0,9,1 -ExtBfwDl1=2,24,0,0,9,1 -ExtBfwDl2=2,24,0,0,9,1 -ExtBfwDl3=2,24,0,0,9,1 -ExtBfwDl4=2,24,0,0,9,1 -ExtBfwDl5=2,17,0,0,9,1 +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,24,0,0,9,1,1 +ExtBfwDl1=2,24,0,0,9,1,1 +ExtBfwDl2=2,24,0,0,9,1,1 +ExtBfwDl3=2,24,0,0,9,1,1 +ExtBfwDl4=2,24,0,0,9,1,1 +ExtBfwDl5=2,17,0,0,9,1,1 nPrbElemUl=6 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType @@ -154,16 +159,16 @@ PrbElemUl3=144,48,0,14,3,1,1,9,1 PrbElemUl4=192,48,0,14,4,1,1,9,1 PrbElemUl5=240,33,0,14,5,1,1,9,1 # Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,24,0,0,9,1 -ExtBfwUl1=2,24,0,0,9,1 -ExtBfwUl2=2,24,0,0,9,1 -ExtBfwUl3=2,24,0,0,9,1 -ExtBfwUl4=2,24,0,0,9,1 -ExtBfwUl5=2,17,0,0,9,1 +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,24,0,0,9,1,1 +ExtBfwUl1=2,24,0,0,9,1,1 +ExtBfwUl2=2,24,0,0,9,1,1 +ExtBfwUl3=2,24,0,0,9,1,1 +ExtBfwUl4=2,24,0,0,9,1,1 +ExtBfwUl5=2,17,0,0,9,1,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### @@ -171,7 +176,7 @@ PrbElemSrs0=0,273,0,14,0,0,1,9,0 iqswap=0 #do swap of IQ before send buffer to eth nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane + ##Debug debugStop=1 #stop app on 1pps boundary (gps_second % 30) debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/601/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/321/config_file_o_ru.dat similarity index 93% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/601/config_file_o_ru.dat rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/321/config_file_o_ru.dat index 9db693f..67f351f 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/601/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/321/config_file_o_ru.dat @@ -18,7 +18,7 @@ #Peak: 100 % #301 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % - + # This is simple configuration file. Use '#' sign for comments instanceId=1 # 0,1,2,... in case more than 1 application started on the same system @@ -97,11 +97,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -175,6 +178,7 @@ antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used +extType=1 nPrbElemDl=6 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams @@ -185,13 +189,13 @@ PrbElemDl3=144,48,0,14,3,1,1,9,1 PrbElemDl4=192,48,0,14,4,1,1,9,1 PrbElemDl5=240,33,0,14,5,1,1,9,1 # Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,24,0,0,9,1 -ExtBfwDl1=2,24,0,0,9,1 -ExtBfwDl2=2,24,0,0,9,1 -ExtBfwDl3=2,24,0,0,9,1 -ExtBfwDl4=2,24,0,0,9,1 -ExtBfwDl5=2,17,0,0,9,1 +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,24,0,0,9,1,1 +ExtBfwDl1=2,24,0,0,9,1,1 +ExtBfwDl2=2,24,0,0,9,1,1 +ExtBfwDl3=2,24,0,0,9,1,1 +ExtBfwDl4=2,24,0,0,9,1,1 +ExtBfwDl5=2,17,0,0,9,1,1 nPrbElemUl=6 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType @@ -203,16 +207,16 @@ PrbElemUl3=144,48,0,14,3,1,1,9,1 PrbElemUl4=192,48,0,14,4,1,1,9,1 PrbElemUl5=240,33,0,14,5,1,1,9,1 # Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,24,0,0,9,1 -ExtBfwUl1=2,24,0,0,9,1 -ExtBfwUl2=2,24,0,0,9,1 -ExtBfwUl3=2,24,0,0,9,1 -ExtBfwUl4=2,24,0,0,9,1 -ExtBfwUl5=2,17,0,0,9,1 +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,24,0,0,9,1,1 +ExtBfwUl1=2,24,0,0,9,1,1 +ExtBfwUl2=2,24,0,0,9,1,1 +ExtBfwUl3=2,24,0,0,9,1,1 +ExtBfwUl4=2,24,0,0,9,1,1 +ExtBfwUl5=2,17,0,0,9,1,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### @@ -220,7 +224,7 @@ PrbElemSrs0=0,273,0,14,0,0,1,9,0 iqswap=0 #do swap of IQ before send buffer to eth nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane + ##Debug debugStop=1 #stop app on 1pps boundary (gps_second % 30) debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/611/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/321/usecase_du.cfg similarity index 94% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/611/usecase_du.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/321/usecase_du.cfg index f6efede..acb472b 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/611/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/321/usecase_du.cfg @@ -22,8 +22,8 @@ instanceId=0 # 0,1,2,... in case more than 1 application started on the same sys mainCore=0 #core for main() systemCore=2 ioCore=10 # core id -ioWorker=0x4000000000000 # mask [0- no workers] -dpdkMemorySize=8192 +ioWorker=0x7000000000000 # mask [0- no workers] +dpdkMemorySize=10240 iovaMode=0 @@ -33,6 +33,7 @@ oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml #O-RU0 oXuCfgFile0=./config_file_o_du.dat #O-RU0 # remote O-XU 0 Eth Link 0 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/321/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/321/usecase_du_icx.cfg new file mode 100644 index 0000000..94db133 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/321/usecase_du_icx.cfg @@ -0,0 +1,63 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ +# This is simple configuration file. Use '#' sign for comments +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system + +mainCore=0 #core for main() +systemCore=2 +ioCore=11 # core id +ioWorker=0xF8000000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du_icx.xml + +dpdkMemorySize=10240 + +iovaMode=0 + +oXuNum=1 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./config_file_o_du.dat #O-RU0 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 + +# oXuRem0Mac0=68:05:ca:c1:bf:10 +# oXuRem0Mac1=68:05:ca:c1:bf:11 + +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/605/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/321/usecase_ru.cfg similarity index 95% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/605/usecase_ru.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/321/usecase_ru.cfg index 3ab240f..ccf666f 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/605/usecase_ru.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/321/usecase_ru.cfg @@ -19,7 +19,7 @@ appMode=1 # All O-DU(0) | O-RU(1) instanceId=1 # 0,1,2,... in case more than 1 application started on the same system ioCore=15 # core id -ioWorker=0x800000000 # mask [0- no workers] +ioWorker=0xF10000000 # mask [0- no workers] oXuNum=1 # numbers of O-RU connected to O-DU @@ -27,6 +27,7 @@ oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs +oXuBbuCfgFile=./bbu_pool_cfg_o_ru.xml #O-RU0 oXuCfgFile0=./config_file_o_ru.dat #O-RU0 # remote O-XU 0 Eth Link 0 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/322/bbu_pool_cfg_o_du_icx.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/322/bbu_pool_cfg_o_du_icx.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/322/bbu_pool_cfg_o_du_icx.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/322/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/322/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/322/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/602/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/322/config_file_o_du.dat similarity index 95% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/602/config_file_o_du.dat rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/322/config_file_o_du.dat index 89f734f..b295624 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/602/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/322/config_file_o_du.dat @@ -115,25 +115,30 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used +extType=1 + nPrbElemDl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemDl0=0,50,0,14,0,1,1,9,1 PrbElemDl1=50,50,0,14,1,1,1,9,1 # Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,25,0,0,9,1 -ExtBfwDl1=2,25,0,0,9,1 +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,25,0,0,9,1,1 +ExtBfwDl1=2,25,0,0,9,1,1 nPrbElemUl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType @@ -141,12 +146,12 @@ nPrbElemUl=2 PrbElemUl0=0,50,0,14,0,1,1,9,1 PrbElemUl1=50,50,0,14,1,1,1,9,1 # Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,25,0,0,9,1 -ExtBfwUl1=2,25,0,0,9,1 +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,25,0,0,9,1,1 +ExtBfwUl1=2,25,0,0,9,1,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### @@ -154,7 +159,7 @@ PrbElemSrs0=0,273,0,14,0,0,1,9,0 iqswap=0 #do swap of IQ before send buffer to eth nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane + ##Debug debugStop=1 #stop app on 1pps boundary (gps_second % 30) debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/411/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/322/config_file_o_ru.dat similarity index 87% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/411/config_file_o_ru.dat rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/322/config_file_o_ru.dat index 65b3486..2fb9fee 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/411/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/322/config_file_o_ru.dat @@ -16,17 +16,16 @@ # #******************************************************************************/ -#Peak: 100 % -#301 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % - - +#Peak +#4% +#302 TDD DDDFU: S it's 10:2:2 1 64T64R 100 8 8 37% 100 1200 37% 100 1200 Peak: 4 % # This is simple configuration file. Use '#' sign for comments instanceId=1 # 0,1,2,... in case more than 1 application started on the same system appMode=1 # O-DU(0) | O-RU(1) xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B +antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R @@ -61,28 +60,6 @@ MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protoco Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec Gps_Beta=0 -ioCore=15 -# Eth 0 -duMac0=00:11:22:33:44:00 # asigned MAC of O-DU VF -duMac1=00:11:22:33:44:10 # asigned MAC of O-DU VF - -ruMac0=00:11:22:33:44:01 # O-RU VF for O-RU app -ruMac1=00:11:22:33:44:11 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:20 # asigned MAC of O-DU VF -duMac3=00:11:22:33:44:30 # asigned MAC of O-DU VF - -ruMac2=00:11:22:33:44:21 # O-RU VF for O-RU app -ruMac3=00:11:22:33:44:31 # O-RU VF for O-RU app - -# Eth 1 -duMac4=00:11:22:33:44:40 # asigned MAC of O-DU VF -duMac5=00:11:22:33:44:50 # asigned MAC of O-DU VF -ruMac4=00:11:22:33:44:41 # O-RU VF for O-RU app -ruMac5=00:11:22:33:44:51 # O-RU VF for O-RU app - - numSlots=20 #number of slots per IQ files antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 @@ -118,11 +95,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -188,27 +168,34 @@ antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - -#DL PRB / % Used RBs UL PRB / % Used RBs -#66% 180 33% 90 - ########################################################### ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -nPrbElemDl=3 +extType=1 + +nPrbElemDl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams -PrbElemDl0=0,128,0,14,0,1,1,9,1 -PrbElemDl1=128,128,0,14,1,1,1,9,1 -PrbElemDl2=256,17,0,14,2,1,1,9,1 - -nPrbElemUl=3 +PrbElemDl0=0,50,0,14,0,1,1,9,1 +PrbElemDl1=50,50,0,14,1,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,25,0,0,9,1,1 +ExtBfwDl1=2,25,0,0,9,1,1 + +nPrbElemUl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams -PrbElemUl0=0,128,0,14,0,1,1,9,1 -PrbElemUl1=128,128,0,14,1,1,1,9,1 -PrbElemUl2=256,17,0,14,2,1,1,9,1 +PrbElemUl0=0,50,0,14,0,1,1,9,1 +PrbElemUl1=50,50,0,14,1,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,25,0,0,9,1,1 +ExtBfwUl1=2,25,0,0,9,1,1 + +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### @@ -216,7 +203,7 @@ PrbElemUl2=256,17,0,14,2,1,1,9,1 iqswap=0 #do swap of IQ before send buffer to eth nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane + ##Debug debugStop=1 #stop app on 1pps boundary (gps_second % 30) debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/602/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/322/usecase_du.cfg similarity index 100% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/602/usecase_du.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/322/usecase_du.cfg diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/301/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/322/usecase_du_icx.cfg similarity index 94% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/301/usecase_du_icx.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/322/usecase_du_icx.cfg index df51878..95f2781 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/301/usecase_du_icx.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/322/usecase_du_icx.cfg @@ -19,14 +19,13 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -mainCore=0 #core for main() mainCore=0 #core for main() systemCore=2 -ioCore=21 # core id -ioWorker=0x200000000000 # mask [0- no workers] -dpdkMemorySize=8192 +ioCore=11 # core id +ioWorker=0x80000000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du_icx.xml -iovaMode=0 +dpdkMemorySize=8192 oXuNum=1 # numbers of O-RU connected to O-DU @@ -39,7 +38,6 @@ oXuCfgFile0=./config_file_o_du.dat #O-RU0 # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:01 oXuRem0Mac1=00:11:22:33:00:11 - # remote O-XU 0 Eth Link 1 oXuRem0Mac2=00:11:22:33:00:21 oXuRem0Mac3=00:11:22:33:00:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/602/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/322/usecase_ru.cfg similarity index 100% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/602/usecase_ru.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/322/usecase_ru.cfg diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/323/bbu_pool_cfg_o_du_icx.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/323/bbu_pool_cfg_o_du_icx.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/323/bbu_pool_cfg_o_du_icx.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/323/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/323/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/323/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/603/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/323/config_file_o_du.dat similarity index 94% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/603/config_file_o_du.dat rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/323/config_file_o_du.dat index e0d9e92..fdfcea9 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/603/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/323/config_file_o_du.dat @@ -18,7 +18,7 @@ #NC #12% -#303 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 4 37% 100 1200 37% 100 1200 NC: 12% +#323 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 4 37% 100 1200 37% 100 1200 NC: 12% # This is simple configuration file. Use '#' sign for comments @@ -116,25 +116,30 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used +extType=1 + nPrbElemDl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemDl0=0,50,0,14,0,1,1,9,1 PrbElemDl1=50,50,0,14,1,1,1,9,1 # Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,25,0,0,9,1 -ExtBfwDl1=2,25,0,0,9,1 +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,25,0,0,9,1,1 +ExtBfwDl1=2,25,0,0,9,1,1 nPrbElemUl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType @@ -142,12 +147,12 @@ nPrbElemUl=2 PrbElemUl0=0,50,0,14,0,1,1,9,1 PrbElemUl1=50,50,0,14,1,1,1,9,1 # Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,25,0,0,9,1 -ExtBfwUl1=2,25,0,0,9,1 +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,25,0,0,9,1,1 +ExtBfwUl1=2,25,0,0,9,1,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### @@ -155,7 +160,7 @@ PrbElemSrs0=0,273,0,14,0,0,1,9,0 iqswap=0 #do swap of IQ before send buffer to eth nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane + ##Debug debugStop=1 #stop app on 1pps boundary (gps_second % 30) debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/615/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/323/config_file_o_ru.dat similarity index 93% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/615/config_file_o_ru.dat rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/323/config_file_o_ru.dat index 21b1981..7fa60be 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/615/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/323/config_file_o_ru.dat @@ -16,16 +16,16 @@ # #******************************************************************************/ -#MEC -#28% -#315 TDD DDDFU: S it's 10:2:2 1 64T64R 100 4 4 37% 100 1200 37% 100 1200 MEC: 28% +#NC +#12% +#323 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 4 37% 100 1200 37% 100 1200 NC: 12% # This is simple configuration file. Use '#' sign for comments instanceId=1 # 0,1,2,... in case more than 1 application started on the same system appMode=1 # O-DU(0) | O-RU(1) xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B +antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R @@ -95,11 +95,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -165,20 +168,21 @@ antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - ########################################################### ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used +extType=1 + nPrbElemDl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemDl0=0,50,0,14,0,1,1,9,1 PrbElemDl1=50,50,0,14,1,1,1,9,1 # Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,25,0,0,9,1 -ExtBfwDl1=2,25,0,0,9,1 +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,25,0,0,9,1,1 +ExtBfwDl1=2,25,0,0,9,1,1 nPrbElemUl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType @@ -186,12 +190,12 @@ nPrbElemUl=2 PrbElemUl0=0,50,0,14,0,1,1,9,1 PrbElemUl1=50,50,0,14,1,1,1,9,1 # Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,25,0,0,9,1 -ExtBfwUl1=2,25,0,0,9,1 +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,25,0,0,9,1,1 +ExtBfwUl1=2,25,0,0,9,1,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### @@ -199,7 +203,7 @@ PrbElemSrs0=0,273,0,14,0,0,1,9,0 iqswap=0 #do swap of IQ before send buffer to eth nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane + ##Debug debugStop=1 #stop app on 1pps boundary (gps_second % 30) debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/603/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/323/usecase_du.cfg similarity index 100% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/603/usecase_du.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/323/usecase_du.cfg diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/305/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/323/usecase_du_icx.cfg similarity index 94% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/305/usecase_du_icx.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/323/usecase_du_icx.cfg index 0248866..1b62744 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/305/usecase_du_icx.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/323/usecase_du_icx.cfg @@ -21,9 +21,9 @@ instanceId=0 # 0,1,2,... in case more than 1 application started on the same sys mainCore=0 #core for main() systemCore=2 -ioCore=21 # core id -ioWorker=0x200000000000 # mask [0- no workers] -dpdkMemorySize=8192 +ioCore=11 # core id +ioWorker=0x80000000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du_icx.xml oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/601/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/323/usecase_ru.cfg similarity index 100% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/601/usecase_ru.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/323/usecase_ru.cfg diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/324/bbu_pool_cfg_o_du_icx.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/324/bbu_pool_cfg_o_du_icx.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/324/bbu_pool_cfg_o_du_icx.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/324/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/324/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/324/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/604/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/324/config_file_o_du.dat similarity index 95% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/604/config_file_o_du.dat rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/324/config_file_o_du.dat index 55d2fc0..0119310 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/604/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/324/config_file_o_du.dat @@ -18,7 +18,7 @@ #MC #20% -#304 TDD DDDFU: S it's 10:2:2 1 64T64R 100 8 4 37% 100 1200 37% 100 1200 MC: 20% +#324 TDD DDDFU: S it's 10:2:2 1 64T64R 100 8 4 37% 100 1200 37% 100 1200 MC: 20% # This is simple configuration file. Use '#' sign for comments instanceId=0 # 0,1,2,... in case more than 1 application started on the same system @@ -130,24 +130,30 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +extType=1 + nPrbElemDl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemDl0=0,50,0,14,0,1,1,9,1 PrbElemDl1=50,50,0,14,1,1,1,9,1 # Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,25,0,0,9,1 -ExtBfwDl1=2,25,0,0,9,1 +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,25,0,0,9,1,1 +ExtBfwDl1=2,25,0,0,9,1,1 nPrbElemUl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType @@ -155,17 +161,19 @@ nPrbElemUl=2 PrbElemUl0=0,50,0,14,0,1,1,9,1 PrbElemUl1=50,50,0,14,1,1,1,9,1 # Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,25,0,0,9,1 -ExtBfwUl1=2,25,0,0,9,1 +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,25,0,0,9,1,1 +ExtBfwUl1=2,25,0,0,9,1,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### ## control of IQ byte order iqswap=0 #do swap of IQ before send buffer to eth nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane + ##Debug debugStop=1 #stop app on 1pps boundary (gps_second % 30) debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/116/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/324/config_file_o_ru.dat similarity index 88% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/116/config_file_o_ru.dat rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/324/config_file_o_ru.dat index 4b8d207..87b8195 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/116/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/324/config_file_o_ru.dat @@ -16,17 +16,17 @@ # #******************************************************************************/ -#TDD 1 64T64R 100 16 8 64QAM 0.5 16QAM 0.5 66% 180 33% 90 13.7 4.6 0% - - +#MC +#20% +#324 TDD DDDFU: S it's 10:2:2 1 64T64R 100 8 4 37% 100 1200 37% 100 1200 MC: 20% # This is simple configuration file. Use '#' sign for comments instanceId=1 # 0,1,2,... in case more than 1 application started on the same system appMode=1 # O-DU(0) | O-RU(1) xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B +antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B +antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R #UEs @@ -48,17 +48,12 @@ nDLFftSize=4096 nULFftSize=4096 nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 +nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) @@ -113,11 +108,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -191,30 +189,37 @@ antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -nPrbElemDl=6 +extType=1 + +nPrbElemDl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams -PrbElemDl0=0,30,0,14,0,1,1,9,1 -PrbElemDl1=30,30,0,14,1,1,1,9,1 -PrbElemDl2=60,30,0,14,2,1,1,9,1 -PrbElemDl3=90,30,0,14,3,1,1,9,1 -PrbElemDl4=120,30,0,14,4,1,1,9,1 -PrbElemDl5=150,30,0,14,5,1,1,9,1 - -nPrbElemUl=3 +PrbElemDl0=0,50,0,14,0,1,1,9,1 +PrbElemDl1=50,50,0,14,1,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,25,0,0,9,1,1 +ExtBfwDl1=2,25,0,0,9,1,1 + +nPrbElemUl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams -PrbElemUl0=0,30,0,14,0,1,1,9,1 -PrbElemUl1=30,30,0,14,1,1,1,9,1 -PrbElemUl2=60,30,0,14,2,1,1,9,1 - +PrbElemUl0=0,50,0,14,0,1,1,9,1 +PrbElemUl1=50,50,0,14,1,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,25,0,0,9,1,1 +ExtBfwUl1=2,25,0,0,9,1,1 + +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### ## control of IQ byte order iqswap=0 #do swap of IQ before send buffer to eth nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane + ##Debug debugStop=1 #stop app on 1pps boundary (gps_second % 30) debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/601/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/324/usecase_du.cfg similarity index 98% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/601/usecase_du.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/324/usecase_du.cfg index f6efede..a21446d 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/601/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/324/usecase_du.cfg @@ -24,8 +24,7 @@ systemCore=2 ioCore=10 # core id ioWorker=0x4000000000000 # mask [0- no workers] dpdkMemorySize=8192 - -iovaMode=0 +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU @@ -38,7 +37,6 @@ oXuCfgFile0=./config_file_o_du.dat #O-RU0 # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:01 oXuRem0Mac1=00:11:22:33:00:11 - # remote O-XU 0 Eth Link 1 oXuRem0Mac2=00:11:22:33:00:21 oXuRem0Mac3=00:11:22:33:00:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/311/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/324/usecase_du_icx.cfg similarity index 94% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/311/usecase_du_icx.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/324/usecase_du_icx.cfg index 71f7c1d..95f2781 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/311/usecase_du_icx.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/324/usecase_du_icx.cfg @@ -21,11 +21,11 @@ instanceId=0 # 0,1,2,... in case more than 1 application started on the same sys mainCore=0 #core for main() systemCore=2 -ioCore=21 # core id -ioWorker=0x200000000000 # mask [0- no workers] -dpdkMemorySize=8192 +ioCore=11 # core id +ioWorker=0x80000000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du_icx.xml -iovaMode=0 +dpdkMemorySize=8192 oXuNum=1 # numbers of O-RU connected to O-DU @@ -38,7 +38,6 @@ oXuCfgFile0=./config_file_o_du.dat #O-RU0 # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:01 oXuRem0Mac1=00:11:22:33:00:11 - # remote O-XU 0 Eth Link 1 oXuRem0Mac2=00:11:22:33:00:21 oXuRem0Mac3=00:11:22:33:00:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/603/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/324/usecase_ru.cfg similarity index 100% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/603/usecase_ru.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/324/usecase_ru.cfg diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/325/bbu_pool_cfg_o_du_icx.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/325/bbu_pool_cfg_o_du_icx.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/325/bbu_pool_cfg_o_du_icx.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/325/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/325/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/325/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/605/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/325/config_file_o_du.dat similarity index 94% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/605/config_file_o_du.dat rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/325/config_file_o_du.dat index 91cf79a..e2a9d18 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/605/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/325/config_file_o_du.dat @@ -18,7 +18,7 @@ #MEC #28% -#305 TDD DDDFU: S it's 10:2:2 1 64T64R 100 4 2 37% 100 1200 37% 100 1200 MEC: 28% +#325 TDD DDDFU: S it's 10:2:2 1 64T64R 100 4 2 37% 100 1200 37% 100 1200 MEC: 28% # This is simple configuration file. Use '#' sign for comments @@ -116,25 +116,31 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used nPrbElemDl=2 + +extType=1 + #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemDl0=0,50,0,14,0,1,1,9,1 PrbElemDl1=50,50,0,14,1,1,1,9,1 # Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,25,0,0,9,1 -ExtBfwDl1=2,25,0,0,9,1 +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,25,0,0,9,1,1 +ExtBfwDl1=2,25,0,0,9,1,1 nPrbElemUl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType @@ -142,9 +148,12 @@ nPrbElemUl=2 PrbElemUl0=0,50,0,14,0,1,1,9,1 PrbElemUl1=50,50,0,14,1,1,1,9,1 # Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,25,0,0,9,1 -ExtBfwUl1=2,25,0,0,9,1 +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,25,0,0,9,1,1 +ExtBfwUl1=2,25,0,0,9,1,1 + +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### @@ -152,7 +161,7 @@ ExtBfwUl1=2,25,0,0,9,1 iqswap=0 #do swap of IQ before send buffer to eth nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane + ##Debug debugStop=1 #stop app on 1pps boundary (gps_second % 30) debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/605/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/325/config_file_o_ru.dat similarity index 94% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/605/config_file_o_ru.dat rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/325/config_file_o_ru.dat index b4a59f9..234633f 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/605/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/325/config_file_o_ru.dat @@ -18,7 +18,7 @@ #MEC #28% -#305 TDD DDDFU: S it's 10:2:2 1 64T64R 100 4 2 37% 100 1200 37% 100 1200 MEC: 28% +#325 TDD DDDFU: S it's 10:2:2 1 64T64R 100 4 2 37% 100 1200 37% 100 1200 MEC: 28% # This is simple configuration file. Use '#' sign for comments instanceId=1 # 0,1,2,... in case more than 1 application started on the same system @@ -95,11 +95,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -170,15 +173,17 @@ antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used +extType=1 + nPrbElemDl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemDl0=0,50,0,14,0,1,1,9,1 PrbElemDl1=50,50,0,14,1,1,1,9,1 # Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,25,0,0,9,1 -ExtBfwDl1=2,25,0,0,9,1 +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,25,0,0,9,1,1 +ExtBfwDl1=2,25,0,0,9,1,1 nPrbElemUl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType @@ -186,12 +191,12 @@ nPrbElemUl=2 PrbElemUl0=0,50,0,14,0,1,1,9,1 PrbElemUl1=50,50,0,14,1,1,1,9,1 # Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,25,0,0,9,1 -ExtBfwUl1=2,25,0,0,9,1 +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,25,0,0,9,1,1 +ExtBfwUl1=2,25,0,0,9,1,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### @@ -199,7 +204,7 @@ PrbElemSrs0=0,273,0,14,0,0,1,9,0 iqswap=0 #do swap of IQ before send buffer to eth nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane + ##Debug debugStop=1 #stop app on 1pps boundary (gps_second % 30) debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/605/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/325/usecase_du.cfg similarity index 98% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/605/usecase_du.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/325/usecase_du.cfg index da0df27..d008bcc 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/605/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/325/usecase_du.cfg @@ -23,6 +23,7 @@ mainCore=0 #core for main() systemCore=2 ioCore=10 # core id ioWorker=0x4000000000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml dpdkMemorySize=8192 oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/502/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/325/usecase_du_icx.cfg similarity index 94% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/502/usecase_du_icx.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/325/usecase_du_icx.cfg index 71f7c1d..95f2781 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/502/usecase_du_icx.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/325/usecase_du_icx.cfg @@ -21,11 +21,11 @@ instanceId=0 # 0,1,2,... in case more than 1 application started on the same sys mainCore=0 #core for main() systemCore=2 -ioCore=21 # core id -ioWorker=0x200000000000 # mask [0- no workers] -dpdkMemorySize=8192 +ioCore=11 # core id +ioWorker=0x80000000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du_icx.xml -iovaMode=0 +dpdkMemorySize=8192 oXuNum=1 # numbers of O-RU connected to O-DU @@ -38,7 +38,6 @@ oXuCfgFile0=./config_file_o_du.dat #O-RU0 # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:01 oXuRem0Mac1=00:11:22:33:00:11 - # remote O-XU 0 Eth Link 1 oXuRem0Mac2=00:11:22:33:00:21 oXuRem0Mac3=00:11:22:33:00:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/604/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/325/usecase_ru.cfg similarity index 100% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/604/usecase_ru.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/325/usecase_ru.cfg diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/avg_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/avg_o_du.dat index f63a17f..7b5a06d 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/avg_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/avg_o_du.dat @@ -140,10 +140,10 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=0 # Enable (1)| disable (0) SRS +srsEnable=0 # Enable (1)| disable (0) SRS srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/avg_o_du_tst377.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/avg_o_du_tst377.dat index a2b81a5..668fc51 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/avg_o_du_tst377.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/avg_o_du_tst377.dat @@ -141,11 +141,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -180,8 +183,7 @@ ExtBfwUl2=12,4,0,0,9,1 ExtBfwUl3=10,4,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 -#PrbElemSrs1=136,137,0,14,0,0,0,16,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/avg_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/avg_o_ru.dat index 04ea30c..b974c28 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/avg_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/avg_o_ru.dat @@ -121,10 +121,10 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS +srsEnable=1 # Enable (1)| disable (0) SRS srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/avg_o_ru_tst377.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/avg_o_ru_tst377.dat index 4d21c4f..2d4ea16 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/avg_o_ru_tst377.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/avg_o_ru_tst377.dat @@ -121,11 +121,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -228,8 +231,7 @@ ExtBfwUl2=12,4,0,0,9,1 ExtBfwUl3=10,4,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 -#PrbElemSrs1=136,137,0,14,0,0,0,16,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/avg_o_ru_tst377_dynamic.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/avg_o_ru_tst377_dynamic.dat deleted file mode 100644 index c2bd27d..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/avg_o_ru_tst377_dynamic.dat +++ /dev/null @@ -1,292 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#MC -#20% -#TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 Avg: 36 % - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -puschMaskEnable=1 # Enable (1)| disable (0) PUSCH Mask -puschMaskSlot=3 # (num mode Frame) slots will not transfer PUSCH channel (def: sym 13) - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/uliq00_tst377.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/uliq01_tst377.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/uliq02_tst377.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/uliq03_tst377.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/uliq04_tst377.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/uliq05_tst377.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/uliq06_tst377.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/uliq07_tst377.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#SlotNumTx0=./avg_txconfig_1.cfg -#SlotNumTx1=./avg_txconfig_1.cfg -#SlotNumTx2=./avg_txconfig_1.cfg -#SlotNumTx3=./avg_txconfig_2.cfg -#SlotNumTx4=./avg_txconfig_0.cfg - -#SlotNumTx5=./avg_txconfig_1.cfg -#SlotNumTx6=./avg_txconfig_1.cfg -#SlotNumTx7=./avg_txconfig_1.cfg -#SlotNumTx8=./avg_txconfig_2.cfg -#SlotNumTx9=./avg_txconfig_0.cfg - -#SlotNumRx0=./avg_rxconfig_0.cfg -#SlotNumRx1=./avg_rxconfig_0.cfg -#SlotNumRx2=./avg_rxconfig_0.cfg -#SlotNumRx3=./avg_rxconfig_2.cfg -#SlotNumRx4=./avg_rxconfig_1.cfg - -#SlotNumRx5=./avg_rxconfig_0.cfg -#SlotNumRx6=./avg_rxconfig_0.cfg -#SlotNumRx7=./avg_rxconfig_0.cfg -#SlotNumRx8=./avg_rxconfig_3.cfg -#SlotNumRx9=./avg_rxconfig_1.cfg - - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - -#DL PRB / % Used RBs UL PRB / % Used RBs -#66% 180 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,24,0,0,9,1 -ExtBfwDl1=2,24,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=10,4,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,64,0,14,0,1,1,9,1 -PrbElemUl1=64,36,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,24,0,0,9,1 -ExtBfwUl1=2,24,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=10,4,0,0,9,1 - -nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 -#PrbElemSrs1=136,137,0,14,0,0,0,16,0 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled - -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..96def3b --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 20 + + 20 + + 16,48,17,49,18,50,19,51,20,52,21,53,22,54,23,55,24,56,25,57,26,58,27,59 + + 3 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..600a5b9 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 10 + + 8,48,9,49,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/config_file_o_du.dat index 50e08af..f94fd77 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/config_file_o_du.dat @@ -119,10 +119,10 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS +srsEnable=1 # Enable (1)| disable (0) SRS srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/config_file_o_ru.dat index 4fb9aa4..3d258da 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/config_file_o_ru.dat @@ -118,10 +118,10 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS +srsEnable=1 # Enable (1)| disable (0) SRS srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/peak_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/peak_o_du.dat index 0220c92..5091620 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/peak_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/peak_o_du.dat @@ -140,10 +140,10 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS +srsEnable=1 # Enable (1)| disable (0) SRS srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/peak_o_du_tst376.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/peak_o_du_tst376.dat index 86f752c..9f5e8d0 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/peak_o_du_tst376.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/peak_o_du_tst376.dat @@ -140,11 +140,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -187,8 +190,7 @@ ExtBfwUl4=2,24,0,0,9,1 ExtBfwUl5=2,17,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 -#PrbElemSrs1=136,137,0,14,0,0,0,16,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/peak_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/peak_o_ru.dat index e029b0e..cda7097 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/peak_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/peak_o_ru.dat @@ -122,10 +122,10 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=0 # Enable (1)| disable (0) SRS +srsEnable=0 # Enable (1)| disable (0) SRS srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/peak_o_ru_tst376.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/peak_o_ru_tst376.dat index a3edf84..b633b85 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/peak_o_ru_tst376.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/peak_o_ru_tst376.dat @@ -122,11 +122,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -237,8 +240,7 @@ ExtBfwUl4=2,24,0,0,9,1 ExtBfwUl5=2,17,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 -#PrbElemSrs1=136,137,0,14,0,0,0,16,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/peak_o_ru_tst376_dynamic.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/peak_o_ru_tst376_dynamic.dat deleted file mode 100644 index 332fe8f..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/peak_o_ru_tst376_dynamic.dat +++ /dev/null @@ -1,301 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak: 100 % -#301 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -puschMaskEnable=1 # Enable (1)| disable (0) PUSCH Mask -puschMaskSlot=3 # (num mode Frame) slots will not transfer PUSCH channel (def: sym 13) - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/uliq00_tst376.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/uliq01_tst376.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/uliq02_tst376.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/uliq03_tst376.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/uliq04_tst376.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/uliq05_tst376.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/uliq06_tst376.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/uliq07_tst376.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#SlotNumTx0=./peak_txconfig_1.cfg -#SlotNumTx1=./peak_txconfig_1.cfg -#SlotNumTx2=./peak_txconfig_1.cfg -#SlotNumTx3=./peak_txconfig_2.cfg -#SlotNumTx4=./peak_txconfig_0.cfg - -#SlotNumTx5=./peak_txconfig_1.cfg -#SlotNumTx6=./peak_txconfig_1.cfg -#SlotNumTx7=./peak_txconfig_1.cfg -#SlotNumTx8=./peak_txconfig_2.cfg -#SlotNumTx9=./peak_txconfig_0.cfg - -#SlotNumRx0=./peak_rxconfig_0.cfg -#SlotNumRx1=./peak_rxconfig_0.cfg -#SlotNumRx2=./peak_rxconfig_0.cfg -#SlotNumRx3=./peak_rxconfig_2.cfg -#SlotNumRx4=./peak_rxconfig_1.cfg - -#SlotNumRx5=./peak_rxconfig_0.cfg -#SlotNumRx6=./peak_rxconfig_0.cfg -#SlotNumRx7=./peak_rxconfig_0.cfg -#SlotNumRx8=./peak_rxconfig_3.cfg -#SlotNumRx9=./peak_rxconfig_1.cfg - - - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - -#DL PRB / % Used RBs UL PRB / % Used RBs -#66% 180 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,48,0,14,3,1,1,9,1 -PrbElemDl4=192,48,0,14,4,1,1,9,1 -PrbElemDl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,24,0,0,9,1 -ExtBfwDl1=2,24,0,0,9,1 -ExtBfwDl2=2,24,0,0,9,1 -ExtBfwDl3=2,24,0,0,9,1 -ExtBfwDl4=2,24,0,0,9,1 -ExtBfwDl5=2,17,0,0,9,1 - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,46,0,14,0,1,1,9,1 -PrbElemUl1=46,46,0,14,1,1,1,9,1 -PrbElemUl2=92,46,0,14,2,1,1,9,1 -PrbElemUl3=138,46,0,14,3,1,1,9,1 -PrbElemUl4=184,46,0,14,4,1,1,9,1 -PrbElemUl5=230,43,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,24,0,0,9,1 -ExtBfwUl1=2,24,0,0,9,1 -ExtBfwUl2=2,24,0,0,9,1 -ExtBfwUl3=2,24,0,0,9,1 -ExtBfwUl4=2,24,0,0,9,1 -ExtBfwUl5=2,17,0,0,9,1 - -nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 -#PrbElemSrs1=136,137,0,14,0,0,0,16,0 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled - -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/usecase_du.cfg index 29bacc1..c40e036 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/usecase_du.cfg @@ -16,20 +16,24 @@ # #******************************************************************************/ # This is simple configuration file. Use '#' sign for comments -# 3301 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % -# TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 Avg: 36 % -# TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 Avg: 36 % - appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system mainCore=0 #core for main() systemCore=2 -ioCore=22 # core id -ioWorker=0xC00000800000 # mask [0- no workers] +ioCore=10 # core id +#ioWorker=0x200000000000 # mask [0- no workers] +#ioWorker=0x3C00000 # mask [0- no workers] +#ioWorker=0x40000000000 +ioWorker=0x800 +#dpdkMemorySize=8192 +#ioWorker=0x000000000 # mask [0- no workers] +#ioWorker=0x8000040000 # mask [0- no workers] +#ioWorker=0x1E0000000 # mask [0- no workers] +#ioWorker=0x700000600 +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml dpdkMemorySize=18432 - iovaMode=0 oXuNum=3 # numbers of O-RU connected to O-DU @@ -37,8 +41,11 @@ oXuNum=3 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs -#oXuRxqNumber=41 # number of HW RX Queues per VF (should >= RX IQ streams per VF) +dlCpProcBurst=1 # (1) - send CP as burst +xranMlogDisable=1 # (1) to reduce Mlog (disable) (0) - keep all mlog (enable default) + oXuCfgFile0=./peak_o_du_tst376.dat #O-DU0 +#oXuCfgFile0=./avg_o_du_tst377.dat #O-DU1 oXuCfgFile1=./avg_o_du_tst377.dat #O-DU1 oXuCfgFile2=./avg_o_du_tst377.dat #O-DU2 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/usecase_du_csx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/usecase_du_csx.cfg index 4d9f87d..3057984 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/usecase_du_csx.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/usecase_du_csx.cfg @@ -27,16 +27,17 @@ ioCore=28 # core id ioWorker=0x1E0000000 # mask [0- no workers] #ioWorker=0x700000600 -dpdkMemorySize=16384 +dpdkMemorySize=18432 iovaMode=0 -oXuNum=3 # numbers of O-RU connected to O-DU +oXuNum=1 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs -oXuCfgFile0=./peak_o_du_tst376.dat #O-DU0 +#oXuCfgFile0=./peak_o_du_tst376.dat #O-DU0 +oXuCfgFile0=./avg_o_du_tst377.dat #O-DU1 oXuCfgFile1=./avg_o_du_tst377.dat #O-DU1 oXuCfgFile2=./avg_o_du_tst377.dat #O-DU2 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/usecase_ru.cfg index c99d2d0..c87490c 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/usecase_ru.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/usecase_ru.cfg @@ -16,17 +16,17 @@ # #******************************************************************************/ # This is simple configuration file. Use '#' sign for comments -# 3301 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % -# TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 Avg: 36 % -# TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 Avg: 36 % - appMode=1 # All O-DU(0) | O-RU(1) instanceId=1 # 0,1,2,... in case more than 1 application started on the same system mainCore=0 #core for main() systemCore=2 ioCore=8 # core id +#ioWorker=0x800000000 # mask [0- no workers] +#ioWorker=0x800004000 # mask [0- no workers] +#ioWorker=0xc000000 # second socket ioWorker=0x3E00 # second socket - +ioWorker=0x0200 # second socket +oXuBbuCfgFile=./bbu_pool_cfg_o_ru.xml dpdkMemorySize=18432 iovaMode=0 @@ -35,14 +35,16 @@ oXuNum=3 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs +dlCpProcBurst=1 # (1) - send CP as burst +xranMlogDisable=1 # (1) to reduce Mlog (disable) (0) - keep all mlog (enable default) oXuCfgFile0=./peak_o_ru_tst376.dat #O-RU0 +#oXuCfgFile0=./avg_o_ru_tst377.dat #O-RU1 oXuCfgFile1=./avg_o_ru_tst377.dat #O-RU1 oXuCfgFile2=./avg_o_ru_tst377.dat #O-RU2 # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:00 - oXuRem0Mac1=00:11:22:33:00:10 # remote O-XU 0 Eth Link 1 oXuRem0Mac2=00:11:22:33:00:20 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/usecase_ru_dynamic.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/usecase_ru_dynamic.cfg deleted file mode 100644 index 5b957bb..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/usecase_ru_dynamic.cfg +++ /dev/null @@ -1,62 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -# 3301 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % -# TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 Avg: 36 % -# TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 Avg: 36 % - -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -mainCore=0 #core for main() -systemCore=2 -ioCore=8 # core id -ioWorker=0x3E00 # second socket - -dpdkMemorySize=18432 -iovaMode=0 - -oXuNum=3 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./peak_o_ru_tst376_dynamic.dat #O-RU0 -oXuCfgFile1=./avg_o_ru_tst377_dynamic.dat #O-RU1 -oXuCfgFile2=./avg_o_ru_tst377_dynamic.dat #O-RU2 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/avg_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/avg_o_du.dat index 6007dd5..017e4e1 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/avg_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/avg_o_du.dat @@ -140,10 +140,10 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=0 # Enable (1)| disable (0) SRS +srsEnable=0 # Enable (1)| disable (0) SRS srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/avg_o_du_tst377.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/avg_o_du_tst377.dat index 83e136e..a89f5ef 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/avg_o_du_tst377.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/avg_o_du_tst377.dat @@ -141,11 +141,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -180,8 +183,7 @@ ExtBfwUl2=12,4,0,0,9,1 ExtBfwUl3=10,4,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 -#PrbElemSrs1=136,137,0,14,0,0,0,16,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/avg_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/avg_o_ru.dat index f53a3df..4b1323c 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/avg_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/avg_o_ru.dat @@ -121,10 +121,10 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS +srsEnable=1 # Enable (1)| disable (0) SRS srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/avg_o_ru_tst377.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/avg_o_ru_tst377.dat index a55c524..138eee5 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/avg_o_ru_tst377.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/avg_o_ru_tst377.dat @@ -121,11 +121,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -228,8 +231,7 @@ ExtBfwUl2=12,4,0,0,9,1 ExtBfwUl3=10,4,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 -#PrbElemSrs1=136,137,0,14,0,0,0,16,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/config_file_o_du.dat index ee44aed..1000502 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/config_file_o_du.dat @@ -119,10 +119,10 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS +srsEnable=1 # Enable (1)| disable (0) SRS srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/config_file_o_ru.dat index f3f2dc8..b394e64 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/config_file_o_ru.dat @@ -118,10 +118,10 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS +srsEnable=1 # Enable (1)| disable (0) SRS srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/peak_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/peak_o_du.dat index 9d6b5b7..da029bc 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/peak_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/peak_o_du.dat @@ -140,10 +140,10 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS +srsEnable=1 # Enable (1)| disable (0) SRS srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/peak_o_du_tst376.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/peak_o_du_tst376.dat index ab287c0..de7fb5e 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/peak_o_du_tst376.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/peak_o_du_tst376.dat @@ -140,11 +140,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -187,8 +190,7 @@ ExtBfwUl4=2,24,0,0,9,1 ExtBfwUl5=2,17,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 -#PrbElemSrs1=136,137,0,14,0,0,0,16,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/peak_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/peak_o_ru.dat index 8d676a0..6c658cc 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/peak_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/peak_o_ru.dat @@ -122,10 +122,10 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS +srsEnable=1 # Enable (1)| disable (0) SRS srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/peak_o_ru_tst376.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/peak_o_ru_tst376.dat index 2418048..c3b0721 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/peak_o_ru_tst376.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3311/peak_o_ru_tst376.dat @@ -122,11 +122,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -237,8 +240,7 @@ ExtBfwUl4=2,24,0,0,9,1 ExtBfwUl5=2,17,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 -#PrbElemSrs1=136,137,0,14,0,0,0,16,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_o_du.dat deleted file mode 100644 index d37454a..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_o_du.dat +++ /dev/null @@ -1,236 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#MC -#20% -#TDD DDDFU 1 64T64R 100 8 4 65% 178 65% 178 - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=10 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#SlotNumTx0=./avg_txconfig_1.cfg -#SlotNumTx1=./avg_txconfig_1.cfg -#SlotNumTx2=./avg_txconfig_1.cfg -#SlotNumTx3=./avg_txconfig_2.cfg -#SlotNumTx4=./avg_txconfig_0.cfg - -#SlotNumTx5=./avg_txconfig_1.cfg -#SlotNumTx6=./avg_txconfig_1.cfg -#SlotNumTx7=./avg_txconfig_1.cfg -#SlotNumTx8=./avg_txconfig_2.cfg -#SlotNumTx9=./avg_txconfig_0.cfg - -#SlotNumRx0=./avg_rxconfig_0.cfg -#SlotNumRx1=./avg_rxconfig_0.cfg -#SlotNumRx2=./avg_rxconfig_0.cfg -#SlotNumRx3=./avg_rxconfig_2.cfg -#SlotNumRx4=./avg_rxconfig_1.cfg - -#SlotNumRx5=./avg_rxconfig_0.cfg -#SlotNumRx6=./avg_rxconfig_0.cfg -#SlotNumRx7=./avg_rxconfig_0.cfg -#SlotNumRx8=./avg_rxconfig_3.cfg -#SlotNumRx9=./avg_rxconfig_1.cfg - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=0 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=10,4,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=10,4,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_o_du_tst377.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_o_du_tst377.dat deleted file mode 100644 index 5364ece..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_o_du_tst377.dat +++ /dev/null @@ -1,241 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#MC -#20% -#TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 Avg: 36 % - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Component Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX antennas on DL UE side -UlLayersPerUe=1 #number of TX antennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#SlotNumTx0=./avg_txconfig_1.cfg -#SlotNumTx1=./avg_txconfig_1.cfg -#SlotNumTx2=./avg_txconfig_1.cfg -#SlotNumTx3=./avg_txconfig_2.cfg -#SlotNumTx4=./avg_txconfig_0.cfg - -#SlotNumTx5=./avg_txconfig_1.cfg -#SlotNumTx6=./avg_txconfig_1.cfg -#SlotNumTx7=./avg_txconfig_1.cfg -#SlotNumTx8=./avg_txconfig_2.cfg -#SlotNumTx9=./avg_txconfig_0.cfg - -#SlotNumRx0=./avg_rxconfig_0.cfg -#SlotNumRx1=./avg_rxconfig_0.cfg -#SlotNumRx2=./avg_rxconfig_0.cfg -#SlotNumRx3=./avg_rxconfig_2.cfg -#SlotNumRx4=./avg_rxconfig_1.cfg - -#SlotNumRx5=./avg_rxconfig_0.cfg -#SlotNumRx6=./avg_rxconfig_0.cfg -#SlotNumRx7=./avg_rxconfig_0.cfg -#SlotNumRx8=./avg_rxconfig_3.cfg -#SlotNumRx9=./avg_rxconfig_1.cfg - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,24,0,0,9,1 -ExtBfwDl1=2,24,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=10,4,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,24,0,0,9,1 -ExtBfwUl1=2,24,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=10,4,0,0,9,1 - -nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 -#PrbElemSrs1=136,137,0,14,0,0,0,16,0 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_o_ru.dat deleted file mode 100644 index c42caec..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_o_ru.dat +++ /dev/null @@ -1,288 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#MC -#20% -#TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 Avg: 36 % - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#SlotNumTx0=./avg_txconfig_1.cfg -#SlotNumTx1=./avg_txconfig_1.cfg -#SlotNumTx2=./avg_txconfig_1.cfg -#SlotNumTx3=./avg_txconfig_2.cfg -#SlotNumTx4=./avg_txconfig_0.cfg - -#SlotNumTx5=./avg_txconfig_1.cfg -#SlotNumTx6=./avg_txconfig_1.cfg -#SlotNumTx7=./avg_txconfig_1.cfg -#SlotNumTx8=./avg_txconfig_2.cfg -#SlotNumTx9=./avg_txconfig_0.cfg - -#SlotNumRx0=./avg_rxconfig_0.cfg -#SlotNumRx1=./avg_rxconfig_0.cfg -#SlotNumRx2=./avg_rxconfig_0.cfg -#SlotNumRx3=./avg_rxconfig_2.cfg -#SlotNumRx4=./avg_rxconfig_1.cfg - -#SlotNumRx5=./avg_rxconfig_0.cfg -#SlotNumRx6=./avg_rxconfig_0.cfg -#SlotNumRx7=./avg_rxconfig_0.cfg -#SlotNumRx8=./avg_rxconfig_3.cfg -#SlotNumRx9=./avg_rxconfig_1.cfg - - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - -#DL PRB / % Used RBs UL PRB / % Used RBs -#66% 180 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=10,4,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=10,4,0,0,9,1 - -nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_o_ru_tst377.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_o_ru_tst377.dat deleted file mode 100644 index 9e50500..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_o_ru_tst377.dat +++ /dev/null @@ -1,289 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#MC -#20% -#TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 Avg: 36 % - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/uliq00_tst377.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/uliq01_tst377.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/uliq02_tst377.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/uliq03_tst377.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/uliq04_tst377.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/uliq05_tst377.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/uliq06_tst377.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/uliq07_tst377.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#SlotNumTx0=./avg_txconfig_1.cfg -#SlotNumTx1=./avg_txconfig_1.cfg -#SlotNumTx2=./avg_txconfig_1.cfg -#SlotNumTx3=./avg_txconfig_2.cfg -#SlotNumTx4=./avg_txconfig_0.cfg - -#SlotNumTx5=./avg_txconfig_1.cfg -#SlotNumTx6=./avg_txconfig_1.cfg -#SlotNumTx7=./avg_txconfig_1.cfg -#SlotNumTx8=./avg_txconfig_2.cfg -#SlotNumTx9=./avg_txconfig_0.cfg - -#SlotNumRx0=./avg_rxconfig_0.cfg -#SlotNumRx1=./avg_rxconfig_0.cfg -#SlotNumRx2=./avg_rxconfig_0.cfg -#SlotNumRx3=./avg_rxconfig_2.cfg -#SlotNumRx4=./avg_rxconfig_1.cfg - -#SlotNumRx5=./avg_rxconfig_0.cfg -#SlotNumRx6=./avg_rxconfig_0.cfg -#SlotNumRx7=./avg_rxconfig_0.cfg -#SlotNumRx8=./avg_rxconfig_3.cfg -#SlotNumRx9=./avg_rxconfig_1.cfg - - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - -#DL PRB / % Used RBs UL PRB / % Used RBs -#66% 180 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,24,0,0,9,1 -ExtBfwDl1=2,24,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=10,4,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,24,0,0,9,1 -ExtBfwUl1=2,24,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=10,4,0,0,9,1 - -nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 -#PrbElemSrs1=136,137,0,14,0,0,0,16,0 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_rxconfig_0.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_rxconfig_0.cfg deleted file mode 100644 index 1143077..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_rxconfig_0.cfg +++ /dev/null @@ -1,31 +0,0 @@ -nPrbElemUl=4 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=10,4,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_rxconfig_1.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_rxconfig_1.cfg deleted file mode 100644 index 1143077..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_rxconfig_1.cfg +++ /dev/null @@ -1,31 +0,0 @@ -nPrbElemUl=4 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=10,4,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_rxconfig_2.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_rxconfig_2.cfg deleted file mode 100644 index 1143077..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_rxconfig_2.cfg +++ /dev/null @@ -1,31 +0,0 @@ -nPrbElemUl=4 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=10,4,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_rxconfig_3.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_rxconfig_3.cfg deleted file mode 100644 index 1143077..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_rxconfig_3.cfg +++ /dev/null @@ -1,31 +0,0 @@ -nPrbElemUl=4 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=10,4,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_txconfig_0.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_txconfig_0.cfg deleted file mode 100644 index 1f4514c..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_txconfig_0.cfg +++ /dev/null @@ -1,32 +0,0 @@ -nPrbElemDl=4 - -# 0-15 CCs S -PrbElemDlCCMask0=0f -PrbElemDlCCMask1=0f -PrbElemDlCCMask2=0f -PrbElemDlCCMask3=0f -PrbElemDlCCMask4=0f -PrbElemDlCCMask5=0f - -# 0-63 AntC -PrbElemDlAntCMask0=ffffffffffffffff -PrbElemDlAntCMask1=ffffffffffffffff -PrbElemDlAntCMask2=ffffffffffffffff -PrbElemDlAntCMask3=ffffffffffffffff -PrbElemDlAntCMask4=ffffffffffffffff -PrbElemDlAntCMask5=ffffffffffffffff - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=10,4,0,0,9,1 - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_txconfig_1.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_txconfig_1.cfg deleted file mode 100644 index 1f4514c..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_txconfig_1.cfg +++ /dev/null @@ -1,32 +0,0 @@ -nPrbElemDl=4 - -# 0-15 CCs S -PrbElemDlCCMask0=0f -PrbElemDlCCMask1=0f -PrbElemDlCCMask2=0f -PrbElemDlCCMask3=0f -PrbElemDlCCMask4=0f -PrbElemDlCCMask5=0f - -# 0-63 AntC -PrbElemDlAntCMask0=ffffffffffffffff -PrbElemDlAntCMask1=ffffffffffffffff -PrbElemDlAntCMask2=ffffffffffffffff -PrbElemDlAntCMask3=ffffffffffffffff -PrbElemDlAntCMask4=ffffffffffffffff -PrbElemDlAntCMask5=ffffffffffffffff - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=10,4,0,0,9,1 - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_txconfig_2.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_txconfig_2.cfg deleted file mode 100644 index 1f4514c..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/avg_txconfig_2.cfg +++ /dev/null @@ -1,32 +0,0 @@ -nPrbElemDl=4 - -# 0-15 CCs S -PrbElemDlCCMask0=0f -PrbElemDlCCMask1=0f -PrbElemDlCCMask2=0f -PrbElemDlCCMask3=0f -PrbElemDlCCMask4=0f -PrbElemDlCCMask5=0f - -# 0-63 AntC -PrbElemDlAntCMask0=ffffffffffffffff -PrbElemDlAntCMask1=ffffffffffffffff -PrbElemDlAntCMask2=ffffffffffffffff -PrbElemDlAntCMask3=ffffffffffffffff -PrbElemDlAntCMask4=ffffffffffffffff -PrbElemDlAntCMask5=ffffffffffffffff - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=10,4,0,0,9,1 - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/config_file_o_du.dat deleted file mode 100644 index 92c8e3d..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/config_file_o_du.dat +++ /dev/null @@ -1,223 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak: 100 % -#301 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -numSlots=10 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,48,0,14,3,1,1,9,1 -PrbElemDl4=192,48,0,14,4,1,1,9,1 -PrbElemDl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=12,4,0,0,9,1 -ExtBfwDl4=12,4,0,0,9,1 -ExtBfwDl5=11,3,0,0,9,1 - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,48,0,14,3,1,1,9,1 -PrbElemUl4=192,48,0,14,4,1,1,9,1 -PrbElemUl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=12,4,0,0,9,1 -ExtBfwUl4=12,4,0,0,9,1 -ExtBfwUl5=11,3,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/config_file_o_ru.dat deleted file mode 100644 index cb9411c..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/config_file_o_ru.dat +++ /dev/null @@ -1,274 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak: 100 % -#301 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=15 -# Eth 0 -duMac0=00:11:22:33:44:00 # asigned MAC of O-DU VF -duMac1=00:11:22:33:44:10 # asigned MAC of O-DU VF - -ruMac0=00:11:22:33:44:01 # O-RU VF for O-RU app -ruMac1=00:11:22:33:44:11 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:20 # asigned MAC of O-DU VF -duMac3=00:11:22:33:44:30 # asigned MAC of O-DU VF - -ruMac2=00:11:22:33:44:21 # O-RU VF for O-RU app -ruMac3=00:11:22:33:44:31 # O-RU VF for O-RU app - -# Eth 1 -duMac4=00:11:22:33:44:40 # asigned MAC of O-DU VF -duMac5=00:11:22:33:44:50 # asigned MAC of O-DU VF -ruMac4=00:11:22:33:44:41 # O-RU VF for O-RU app -ruMac5=00:11:22:33:44:51 # O-RU VF for O-RU app - - -numSlots=10 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - -#DL PRB / % Used RBs UL PRB / % Used RBs -#66% 180 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,48,0,14,3,1,1,9,1 -PrbElemDl4=192,48,0,14,4,1,1,9,1 -PrbElemDl5=240,33,0,14,5,1,1,9,1 - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,48,0,14,3,1,1,9,1 -PrbElemUl4=192,48,0,14,4,1,1,9,1 -PrbElemUl5=240,33,0,14,5,1,1,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_rxconfig_0.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_rxconfig_0.cfg deleted file mode 100644 index 41d084a..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_rxconfig_0.cfg +++ /dev/null @@ -1,34 +0,0 @@ -nPrbElemUl=6 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,48,0,14,3,1,1,9,1 -PrbElemUl4=192,48,0,14,4,1,1,9,1 -PrbElemUl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=12,4,0,0,9,1 -ExtBfwUl4=12,4,0,0,9,1 -ExtBfwUl5=11,3,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_rxconfig_1.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_rxconfig_1.cfg deleted file mode 100644 index 41d084a..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_rxconfig_1.cfg +++ /dev/null @@ -1,34 +0,0 @@ -nPrbElemUl=6 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,48,0,14,3,1,1,9,1 -PrbElemUl4=192,48,0,14,4,1,1,9,1 -PrbElemUl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=12,4,0,0,9,1 -ExtBfwUl4=12,4,0,0,9,1 -ExtBfwUl5=11,3,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_rxconfig_2.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_rxconfig_2.cfg deleted file mode 100644 index 41d084a..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_rxconfig_2.cfg +++ /dev/null @@ -1,34 +0,0 @@ -nPrbElemUl=6 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,48,0,14,3,1,1,9,1 -PrbElemUl4=192,48,0,14,4,1,1,9,1 -PrbElemUl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=12,4,0,0,9,1 -ExtBfwUl4=12,4,0,0,9,1 -ExtBfwUl5=11,3,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_rxconfig_3.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_rxconfig_3.cfg deleted file mode 100644 index 41d084a..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_rxconfig_3.cfg +++ /dev/null @@ -1,34 +0,0 @@ -nPrbElemUl=6 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,48,0,14,3,1,1,9,1 -PrbElemUl4=192,48,0,14,4,1,1,9,1 -PrbElemUl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=12,4,0,0,9,1 -ExtBfwUl4=12,4,0,0,9,1 -ExtBfwUl5=11,3,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_txconfig_0.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_txconfig_0.cfg deleted file mode 100644 index b705198..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_txconfig_0.cfg +++ /dev/null @@ -1,35 +0,0 @@ -nPrbElemDl=6 - -# 0-15 CCs S -PrbElemDlCCMask0=0f -PrbElemDlCCMask1=0f -PrbElemDlCCMask2=0f -PrbElemDlCCMask3=0f -PrbElemDlCCMask4=0f -PrbElemDlCCMask5=0f - -# 0-63 AntC -PrbElemDlAntCMask0=ffffffffffffffff -PrbElemDlAntCMask1=ffffffffffffffff -PrbElemDlAntCMask2=ffffffffffffffff -PrbElemDlAntCMask3=ffffffffffffffff -PrbElemDlAntCMask4=ffffffffffffffff -PrbElemDlAntCMask5=ffffffffffffffff - -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,48,0,14,3,1,1,9,1 -PrbElemDl4=192,48,0,14,4,1,1,9,1 -PrbElemDl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=12,4,0,0,9,1 -ExtBfwDl4=12,4,0,0,9,1 -ExtBfwDl5=11,3,0,0,9,1 - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_txconfig_1.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_txconfig_1.cfg deleted file mode 100644 index 9359005..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_txconfig_1.cfg +++ /dev/null @@ -1,35 +0,0 @@ -nPrbElemDl=6 - -# 0-15 CCs -PrbElemDlCCMask0=0f -PrbElemDlCCMask1=0f -PrbElemDlCCMask2=0f -PrbElemDlCCMask3=0f -PrbElemDlCCMask4=0f -PrbElemDlCCMask5=0f - -# 0-63 AntC -PrbElemDlAntCMask0=ffffffffffffffff -PrbElemDlAntCMask1=ffffffffffffffff -PrbElemDlAntCMask2=ffffffffffffffff -PrbElemDlAntCMask3=ffffffffffffffff -PrbElemDlAntCMask4=ffffffffffffffff -PrbElemDlAntCMask5=ffffffffffffffff - -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,48,0,14,3,1,1,9,1 -PrbElemDl4=192,48,0,14,4,1,1,9,1 -PrbElemDl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=12,4,0,0,9,1 -ExtBfwDl4=12,4,0,0,9,1 -ExtBfwDl5=11,3,0,0,9,1 - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_txconfig_2.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_txconfig_2.cfg deleted file mode 100644 index 6184512..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/peak_txconfig_2.cfg +++ /dev/null @@ -1,36 +0,0 @@ -nPrbElemDl=6 - -# 0-15 CCs -PrbElemDlCCMask0=0f -PrbElemDlCCMask1=0f -PrbElemDlCCMask2=0f -PrbElemDlCCMask3=0f -PrbElemDlCCMask4=0f -PrbElemDlCCMask5=0f - -# 0-63 AntC -PrbElemDlAntCMask0=ffffffffffffffff -PrbElemDlAntCMask1=ffffffffffffffff -PrbElemDlAntCMask2=ffffffffffffffff -PrbElemDlAntCMask3=ffffffffffffffff -PrbElemDlAntCMask4=ffffffffffffffff -PrbElemDlAntCMask5=ffffffffffffffff - - -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,48,0,14,3,1,1,9,1 -PrbElemDl4=192,48,0,14,4,1,1,9,1 -PrbElemDl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=12,4,0,0,9,1 -ExtBfwDl4=12,4,0,0,9,1 -ExtBfwDl5=11,3,0,0,9,1 - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/usecase_du.cfg deleted file mode 100644 index bf76a2f..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/usecase_du.cfg +++ /dev/null @@ -1,64 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -# 3301 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % -# TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 Avg: 36 % -# TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 Avg: 36 % - -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=22 # core id -ioWorker=0xC00000800000 # mask [0- no workers] - -dpdkMemorySize=18432 -iovaMode=0 - -oXuNum=3 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./peak_o_du_tst376.dat #O-DU0 -oXuCfgFile1=./avg_o_du_tst377.dat #O-DU1 -oXuCfgFile2=./avg_o_du_tst377.dat #O-DU2 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 - -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/usecase_ru.cfg deleted file mode 100644 index 9d02494..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3321/usecase_ru.cfg +++ /dev/null @@ -1,62 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -# 3301 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % -# TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 Avg: 36 % -# TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 Avg: 36 % - -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -mainCore=0 #core for main() -systemCore=2 -ioCore=8 # core id -ioWorker=0x3E00 # second socket - -dpdkMemorySize=18432 -iovaMode=0 - -oXuNum=3 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./peak_o_ru_tst376.dat #O-RU0 -oXuCfgFile1=./avg_o_ru_tst377.dat #O-RU1 -oXuCfgFile2=./avg_o_ru_tst377.dat #O-RU2 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_o_du.dat deleted file mode 100644 index 036d629..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_o_du.dat +++ /dev/null @@ -1,236 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#MC -#20% -#TDD DDDFU 1 64T64R 100 8 4 65% 178 65% 178 - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=10 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#SlotNumTx0=./avg_txconfig_1.cfg -#SlotNumTx1=./avg_txconfig_1.cfg -#SlotNumTx2=./avg_txconfig_1.cfg -#SlotNumTx3=./avg_txconfig_2.cfg -#SlotNumTx4=./avg_txconfig_0.cfg - -#SlotNumTx5=./avg_txconfig_1.cfg -#SlotNumTx6=./avg_txconfig_1.cfg -#SlotNumTx7=./avg_txconfig_1.cfg -#SlotNumTx8=./avg_txconfig_2.cfg -#SlotNumTx9=./avg_txconfig_0.cfg - -#SlotNumRx0=./avg_rxconfig_0.cfg -#SlotNumRx1=./avg_rxconfig_0.cfg -#SlotNumRx2=./avg_rxconfig_0.cfg -#SlotNumRx3=./avg_rxconfig_2.cfg -#SlotNumRx4=./avg_rxconfig_1.cfg - -#SlotNumRx5=./avg_rxconfig_0.cfg -#SlotNumRx6=./avg_rxconfig_0.cfg -#SlotNumRx7=./avg_rxconfig_0.cfg -#SlotNumRx8=./avg_rxconfig_3.cfg -#SlotNumRx9=./avg_rxconfig_1.cfg - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=0 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=10,4,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=10,4,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_o_du_tst377.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_o_du_tst377.dat deleted file mode 100644 index d1e9642..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_o_du_tst377.dat +++ /dev/null @@ -1,241 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#MC -#20% -#TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 16 37% 100 1200 37% 100 1200 Avg: 36 % - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Component Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX antennas on DL UE side -UlLayersPerUe=1 #number of TX antennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#SlotNumTx0=./avg_txconfig_1.cfg -#SlotNumTx1=./avg_txconfig_1.cfg -#SlotNumTx2=./avg_txconfig_1.cfg -#SlotNumTx3=./avg_txconfig_2.cfg -#SlotNumTx4=./avg_txconfig_0.cfg - -#SlotNumTx5=./avg_txconfig_1.cfg -#SlotNumTx6=./avg_txconfig_1.cfg -#SlotNumTx7=./avg_txconfig_1.cfg -#SlotNumTx8=./avg_txconfig_2.cfg -#SlotNumTx9=./avg_txconfig_0.cfg - -#SlotNumRx0=./avg_rxconfig_0.cfg -#SlotNumRx1=./avg_rxconfig_0.cfg -#SlotNumRx2=./avg_rxconfig_0.cfg -#SlotNumRx3=./avg_rxconfig_2.cfg -#SlotNumRx4=./avg_rxconfig_1.cfg - -#SlotNumRx5=./avg_rxconfig_0.cfg -#SlotNumRx6=./avg_rxconfig_0.cfg -#SlotNumRx7=./avg_rxconfig_0.cfg -#SlotNumRx8=./avg_rxconfig_3.cfg -#SlotNumRx9=./avg_rxconfig_1.cfg - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,24,0,0,9,1 -ExtBfwDl1=2,24,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=10,4,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,24,0,0,9,1 -ExtBfwUl1=2,24,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=10,4,0,0,9,1 - -nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 -#PrbElemSrs1=136,137,0,14,0,0,0,16,0 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_o_ru.dat deleted file mode 100644 index 6fd054e..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_o_ru.dat +++ /dev/null @@ -1,288 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#MC -#20% -#TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 16 37% 100 1200 37% 100 1200 Avg: 36 % - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Component Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX antennas on DL UE side -UlLayersPerUe=1 #number of TX antennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#SlotNumTx0=./avg_txconfig_1.cfg -#SlotNumTx1=./avg_txconfig_1.cfg -#SlotNumTx2=./avg_txconfig_1.cfg -#SlotNumTx3=./avg_txconfig_2.cfg -#SlotNumTx4=./avg_txconfig_0.cfg - -#SlotNumTx5=./avg_txconfig_1.cfg -#SlotNumTx6=./avg_txconfig_1.cfg -#SlotNumTx7=./avg_txconfig_1.cfg -#SlotNumTx8=./avg_txconfig_2.cfg -#SlotNumTx9=./avg_txconfig_0.cfg - -#SlotNumRx0=./avg_rxconfig_0.cfg -#SlotNumRx1=./avg_rxconfig_0.cfg -#SlotNumRx2=./avg_rxconfig_0.cfg -#SlotNumRx3=./avg_rxconfig_2.cfg -#SlotNumRx4=./avg_rxconfig_1.cfg - -#SlotNumRx5=./avg_rxconfig_0.cfg -#SlotNumRx6=./avg_rxconfig_0.cfg -#SlotNumRx7=./avg_rxconfig_0.cfg -#SlotNumRx8=./avg_rxconfig_3.cfg -#SlotNumRx9=./avg_rxconfig_1.cfg - - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - -#DL PRB / % Used RBs UL PRB / % Used RBs -#66% 180 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,24,0,0,9,1 -ExtBfwDl1=2,24,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=10,4,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,24,0,0,9,1 -ExtBfwUl1=2,24,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=10,4,0,0,9,1 - -nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_o_ru_tst377.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_o_ru_tst377.dat deleted file mode 100644 index 21a992e..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_o_ru_tst377.dat +++ /dev/null @@ -1,289 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#MC -#20% -#TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 16 37% 100 1200 37% 100 1200 Avg: 36 % - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Component Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX antennas on DL UE side -UlLayersPerUe=1 #number of TX antennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/uliq00_tst377.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/uliq01_tst377.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/uliq02_tst377.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/uliq03_tst377.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/uliq04_tst377.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/uliq05_tst377.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/uliq06_tst377.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/uliq07_tst377.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#SlotNumTx0=./avg_txconfig_1.cfg -#SlotNumTx1=./avg_txconfig_1.cfg -#SlotNumTx2=./avg_txconfig_1.cfg -#SlotNumTx3=./avg_txconfig_2.cfg -#SlotNumTx4=./avg_txconfig_0.cfg - -#SlotNumTx5=./avg_txconfig_1.cfg -#SlotNumTx6=./avg_txconfig_1.cfg -#SlotNumTx7=./avg_txconfig_1.cfg -#SlotNumTx8=./avg_txconfig_2.cfg -#SlotNumTx9=./avg_txconfig_0.cfg - -#SlotNumRx0=./avg_rxconfig_0.cfg -#SlotNumRx1=./avg_rxconfig_0.cfg -#SlotNumRx2=./avg_rxconfig_0.cfg -#SlotNumRx3=./avg_rxconfig_2.cfg -#SlotNumRx4=./avg_rxconfig_1.cfg - -#SlotNumRx5=./avg_rxconfig_0.cfg -#SlotNumRx6=./avg_rxconfig_0.cfg -#SlotNumRx7=./avg_rxconfig_0.cfg -#SlotNumRx8=./avg_rxconfig_3.cfg -#SlotNumRx9=./avg_rxconfig_1.cfg - - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - -#DL PRB / % Used RBs UL PRB / % Used RBs -#66% 180 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,24,0,0,9,1 -ExtBfwDl1=2,24,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=10,4,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,24,0,0,9,1 -ExtBfwUl1=2,24,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=10,4,0,0,9,1 - -nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 -#PrbElemSrs1=136,137,0,14,0,0,0,16,0 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_rxconfig_0.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_rxconfig_0.cfg deleted file mode 100644 index 1143077..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_rxconfig_0.cfg +++ /dev/null @@ -1,31 +0,0 @@ -nPrbElemUl=4 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=10,4,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_rxconfig_1.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_rxconfig_1.cfg deleted file mode 100644 index 1143077..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_rxconfig_1.cfg +++ /dev/null @@ -1,31 +0,0 @@ -nPrbElemUl=4 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=10,4,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_rxconfig_2.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_rxconfig_2.cfg deleted file mode 100644 index 1143077..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_rxconfig_2.cfg +++ /dev/null @@ -1,31 +0,0 @@ -nPrbElemUl=4 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=10,4,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_rxconfig_3.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_rxconfig_3.cfg deleted file mode 100644 index 1143077..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_rxconfig_3.cfg +++ /dev/null @@ -1,31 +0,0 @@ -nPrbElemUl=4 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=10,4,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_txconfig_0.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_txconfig_0.cfg deleted file mode 100644 index 1f4514c..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_txconfig_0.cfg +++ /dev/null @@ -1,32 +0,0 @@ -nPrbElemDl=4 - -# 0-15 CCs S -PrbElemDlCCMask0=0f -PrbElemDlCCMask1=0f -PrbElemDlCCMask2=0f -PrbElemDlCCMask3=0f -PrbElemDlCCMask4=0f -PrbElemDlCCMask5=0f - -# 0-63 AntC -PrbElemDlAntCMask0=ffffffffffffffff -PrbElemDlAntCMask1=ffffffffffffffff -PrbElemDlAntCMask2=ffffffffffffffff -PrbElemDlAntCMask3=ffffffffffffffff -PrbElemDlAntCMask4=ffffffffffffffff -PrbElemDlAntCMask5=ffffffffffffffff - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=10,4,0,0,9,1 - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_txconfig_1.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_txconfig_1.cfg deleted file mode 100644 index 1f4514c..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_txconfig_1.cfg +++ /dev/null @@ -1,32 +0,0 @@ -nPrbElemDl=4 - -# 0-15 CCs S -PrbElemDlCCMask0=0f -PrbElemDlCCMask1=0f -PrbElemDlCCMask2=0f -PrbElemDlCCMask3=0f -PrbElemDlCCMask4=0f -PrbElemDlCCMask5=0f - -# 0-63 AntC -PrbElemDlAntCMask0=ffffffffffffffff -PrbElemDlAntCMask1=ffffffffffffffff -PrbElemDlAntCMask2=ffffffffffffffff -PrbElemDlAntCMask3=ffffffffffffffff -PrbElemDlAntCMask4=ffffffffffffffff -PrbElemDlAntCMask5=ffffffffffffffff - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=10,4,0,0,9,1 - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_txconfig_2.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_txconfig_2.cfg deleted file mode 100644 index 1f4514c..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/avg_txconfig_2.cfg +++ /dev/null @@ -1,32 +0,0 @@ -nPrbElemDl=4 - -# 0-15 CCs S -PrbElemDlCCMask0=0f -PrbElemDlCCMask1=0f -PrbElemDlCCMask2=0f -PrbElemDlCCMask3=0f -PrbElemDlCCMask4=0f -PrbElemDlCCMask5=0f - -# 0-63 AntC -PrbElemDlAntCMask0=ffffffffffffffff -PrbElemDlAntCMask1=ffffffffffffffff -PrbElemDlAntCMask2=ffffffffffffffff -PrbElemDlAntCMask3=ffffffffffffffff -PrbElemDlAntCMask4=ffffffffffffffff -PrbElemDlAntCMask5=ffffffffffffffff - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=10,4,0,0,9,1 - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/config_file_o_du.dat deleted file mode 100644 index d8f320c..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/config_file_o_du.dat +++ /dev/null @@ -1,223 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak: 100 % -#301 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -numSlots=10 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,48,0,14,3,1,1,9,1 -PrbElemDl4=192,48,0,14,4,1,1,9,1 -PrbElemDl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=12,4,0,0,9,1 -ExtBfwDl4=12,4,0,0,9,1 -ExtBfwDl5=11,3,0,0,9,1 - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,48,0,14,3,1,1,9,1 -PrbElemUl4=192,48,0,14,4,1,1,9,1 -PrbElemUl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=12,4,0,0,9,1 -ExtBfwUl4=12,4,0,0,9,1 -ExtBfwUl5=11,3,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/config_file_o_ru.dat deleted file mode 100644 index b08fde6..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/config_file_o_ru.dat +++ /dev/null @@ -1,274 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak: 100 % -#301 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=15 -# Eth 0 -duMac0=00:11:22:33:44:00 # asigned MAC of O-DU VF -duMac1=00:11:22:33:44:10 # asigned MAC of O-DU VF - -ruMac0=00:11:22:33:44:01 # O-RU VF for O-RU app -ruMac1=00:11:22:33:44:11 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:20 # asigned MAC of O-DU VF -duMac3=00:11:22:33:44:30 # asigned MAC of O-DU VF - -ruMac2=00:11:22:33:44:21 # O-RU VF for O-RU app -ruMac3=00:11:22:33:44:31 # O-RU VF for O-RU app - -# Eth 1 -duMac4=00:11:22:33:44:40 # asigned MAC of O-DU VF -duMac5=00:11:22:33:44:50 # asigned MAC of O-DU VF -ruMac4=00:11:22:33:44:41 # O-RU VF for O-RU app -ruMac5=00:11:22:33:44:51 # O-RU VF for O-RU app - - -numSlots=10 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - -#DL PRB / % Used RBs UL PRB / % Used RBs -#66% 180 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,48,0,14,3,1,1,9,1 -PrbElemDl4=192,48,0,14,4,1,1,9,1 -PrbElemDl5=240,33,0,14,5,1,1,9,1 - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,48,0,14,3,1,1,9,1 -PrbElemUl4=192,48,0,14,4,1,1,9,1 -PrbElemUl5=240,33,0,14,5,1,1,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_rxconfig_0.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_rxconfig_0.cfg deleted file mode 100644 index 41d084a..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_rxconfig_0.cfg +++ /dev/null @@ -1,34 +0,0 @@ -nPrbElemUl=6 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,48,0,14,3,1,1,9,1 -PrbElemUl4=192,48,0,14,4,1,1,9,1 -PrbElemUl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=12,4,0,0,9,1 -ExtBfwUl4=12,4,0,0,9,1 -ExtBfwUl5=11,3,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_rxconfig_1.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_rxconfig_1.cfg deleted file mode 100644 index 41d084a..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_rxconfig_1.cfg +++ /dev/null @@ -1,34 +0,0 @@ -nPrbElemUl=6 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,48,0,14,3,1,1,9,1 -PrbElemUl4=192,48,0,14,4,1,1,9,1 -PrbElemUl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=12,4,0,0,9,1 -ExtBfwUl4=12,4,0,0,9,1 -ExtBfwUl5=11,3,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_rxconfig_2.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_rxconfig_2.cfg deleted file mode 100644 index 41d084a..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_rxconfig_2.cfg +++ /dev/null @@ -1,34 +0,0 @@ -nPrbElemUl=6 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,48,0,14,3,1,1,9,1 -PrbElemUl4=192,48,0,14,4,1,1,9,1 -PrbElemUl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=12,4,0,0,9,1 -ExtBfwUl4=12,4,0,0,9,1 -ExtBfwUl5=11,3,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_rxconfig_3.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_rxconfig_3.cfg deleted file mode 100644 index 41d084a..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_rxconfig_3.cfg +++ /dev/null @@ -1,34 +0,0 @@ -nPrbElemUl=6 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,48,0,14,3,1,1,9,1 -PrbElemUl4=192,48,0,14,4,1,1,9,1 -PrbElemUl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=12,4,0,0,9,1 -ExtBfwUl4=12,4,0,0,9,1 -ExtBfwUl5=11,3,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_txconfig_0.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_txconfig_0.cfg deleted file mode 100644 index b705198..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_txconfig_0.cfg +++ /dev/null @@ -1,35 +0,0 @@ -nPrbElemDl=6 - -# 0-15 CCs S -PrbElemDlCCMask0=0f -PrbElemDlCCMask1=0f -PrbElemDlCCMask2=0f -PrbElemDlCCMask3=0f -PrbElemDlCCMask4=0f -PrbElemDlCCMask5=0f - -# 0-63 AntC -PrbElemDlAntCMask0=ffffffffffffffff -PrbElemDlAntCMask1=ffffffffffffffff -PrbElemDlAntCMask2=ffffffffffffffff -PrbElemDlAntCMask3=ffffffffffffffff -PrbElemDlAntCMask4=ffffffffffffffff -PrbElemDlAntCMask5=ffffffffffffffff - -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,48,0,14,3,1,1,9,1 -PrbElemDl4=192,48,0,14,4,1,1,9,1 -PrbElemDl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=12,4,0,0,9,1 -ExtBfwDl4=12,4,0,0,9,1 -ExtBfwDl5=11,3,0,0,9,1 - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_txconfig_1.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_txconfig_1.cfg deleted file mode 100644 index 9359005..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_txconfig_1.cfg +++ /dev/null @@ -1,35 +0,0 @@ -nPrbElemDl=6 - -# 0-15 CCs -PrbElemDlCCMask0=0f -PrbElemDlCCMask1=0f -PrbElemDlCCMask2=0f -PrbElemDlCCMask3=0f -PrbElemDlCCMask4=0f -PrbElemDlCCMask5=0f - -# 0-63 AntC -PrbElemDlAntCMask0=ffffffffffffffff -PrbElemDlAntCMask1=ffffffffffffffff -PrbElemDlAntCMask2=ffffffffffffffff -PrbElemDlAntCMask3=ffffffffffffffff -PrbElemDlAntCMask4=ffffffffffffffff -PrbElemDlAntCMask5=ffffffffffffffff - -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,48,0,14,3,1,1,9,1 -PrbElemDl4=192,48,0,14,4,1,1,9,1 -PrbElemDl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=12,4,0,0,9,1 -ExtBfwDl4=12,4,0,0,9,1 -ExtBfwDl5=11,3,0,0,9,1 - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_txconfig_2.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_txconfig_2.cfg deleted file mode 100644 index 6184512..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/peak_txconfig_2.cfg +++ /dev/null @@ -1,36 +0,0 @@ -nPrbElemDl=6 - -# 0-15 CCs -PrbElemDlCCMask0=0f -PrbElemDlCCMask1=0f -PrbElemDlCCMask2=0f -PrbElemDlCCMask3=0f -PrbElemDlCCMask4=0f -PrbElemDlCCMask5=0f - -# 0-63 AntC -PrbElemDlAntCMask0=ffffffffffffffff -PrbElemDlAntCMask1=ffffffffffffffff -PrbElemDlAntCMask2=ffffffffffffffff -PrbElemDlAntCMask3=ffffffffffffffff -PrbElemDlAntCMask4=ffffffffffffffff -PrbElemDlAntCMask5=ffffffffffffffff - - -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,48,0,14,3,1,1,9,1 -PrbElemDl4=192,48,0,14,4,1,1,9,1 -PrbElemDl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=12,4,0,0,9,1 -ExtBfwDl4=12,4,0,0,9,1 -ExtBfwDl5=11,3,0,0,9,1 - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/usecase_du.cfg deleted file mode 100644 index c9b501f..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/usecase_du.cfg +++ /dev/null @@ -1,64 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -# 3311 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 16 100% 273 3276 100% 273 3276 Peak: 100 % -# TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 16 37% 100 1200 37% 100 1200 Avg: 36 % -# TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 16 37% 100 1200 37% 100 1200 Avg: 36 % - -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=22 # core id -ioWorker=0xC00000800000 # mask [0- no workers] - -dpdkMemorySize=18432 -iovaMode=0 - -oXuNum=3 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./peak_o_du_tst376.dat #O-DU0 -oXuCfgFile1=./avg_o_du_tst377.dat #O-DU1 -oXuCfgFile2=./avg_o_du_tst377.dat #O-DU2 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 - -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/usecase_ru.cfg deleted file mode 100644 index 9d02494..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3331/usecase_ru.cfg +++ /dev/null @@ -1,62 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -# 3301 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % -# TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 Avg: 36 % -# TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 Avg: 36 % - -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -mainCore=0 #core for main() -systemCore=2 -ioCore=8 # core id -ioWorker=0x3E00 # second socket - -dpdkMemorySize=18432 -iovaMode=0 - -oXuNum=3 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./peak_o_ru_tst376.dat #O-RU0 -oXuCfgFile1=./avg_o_ru_tst377.dat #O-RU1 -oXuCfgFile2=./avg_o_ru_tst377.dat #O-RU2 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/342/peak_o_du_tst376.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/342/peak_o_du_tst376.dat new file mode 100644 index 0000000..b91d4ae --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/342/peak_o_du_tst376.dat @@ -0,0 +1,237 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +#Peak: 100 % +#301 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU(0) | O-RU(1) +xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B +antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B +antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R + +#UEs +muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources +DlLayersPerUe=1 #number of RX anntennas on DL UE side +UlLayersPerUe=1 #number of TX anntennas on UL UE side + + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 +antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 +antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 + +#SlotNumTx0=./peak_txconfig_1.cfg +#SlotNumTx1=./peak_txconfig_1.cfg +#SlotNumTx2=./peak_txconfig_1.cfg +#SlotNumTx3=./peak_txconfig_2.cfg +#SlotNumTx4=./peak_txconfig_0.cfg + +#SlotNumTx5=./peak_txconfig_1.cfg +#SlotNumTx6=./peak_txconfig_1.cfg +#SlotNumTx7=./peak_txconfig_1.cfg +#SlotNumTx8=./peak_txconfig_2.cfg +#SlotNumTx9=./peak_txconfig_0.cfg + +#SlotNumRx0=./peak_rxconfig_0.cfg +#SlotNumRx1=./peak_rxconfig_0.cfg +#SlotNumRx2=./peak_rxconfig_0.cfg +#SlotNumRx3=./peak_rxconfig_2.cfg +#SlotNumRx4=./peak_rxconfig_1.cfg + +#SlotNumRx5=./peak_rxconfig_0.cfg +#SlotNumRx6=./peak_rxconfig_0.cfg +#SlotNumRx7=./peak_rxconfig_0.cfg +#SlotNumRx8=./peak_rxconfig_3.cfg +#SlotNumRx9=./peak_rxconfig_1.cfg + +#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] +DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] + +#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] +UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] + + +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=189 + +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used +extType=1 +nPrbElemDl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,48,0,14,0,1,1,9,1 +PrbElemDl1=48,48,0,14,1,1,1,9,1 +PrbElemDl2=96,48,0,14,2,1,1,9,1 +PrbElemDl3=144,48,0,14,3,1,1,9,1 +PrbElemDl4=192,48,0,14,4,1,1,9,1 +PrbElemDl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,24,0,0,9,1,1 +ExtBfwDl1=2,24,0,0,9,1,1 +ExtBfwDl2=2,24,0,0,9,1,1 +ExtBfwDl3=2,24,0,0,9,1,1 +ExtBfwDl4=2,24,0,0,9,1,1 +ExtBfwDl5=2,17,0,0,9,1,1 + +nPrbElemUl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,48,0,14,0,1,1,9,1 +PrbElemUl1=48,48,0,14,1,1,1,9,1 +PrbElemUl2=96,48,0,14,2,1,1,9,1 +PrbElemUl3=144,48,0,14,3,1,1,9,1 +PrbElemUl4=192,48,0,14,4,1,1,9,1 +PrbElemUl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,24,0,0,9,1,1 +ExtBfwUl1=2,24,0,0,9,1,1 +ExtBfwUl2=2,24,0,0,9,1,1 +ExtBfwUl3=2,24,0,0,9,1,1 +ExtBfwUl4=2,24,0,0,9,1,1 +ExtBfwUl5=2,17,0,0,9,1,1 + +nPrbElemSrs=1 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order +compression=1 # (1) compression enabled (0) compression disabled + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +Tadv_cp_dl=25 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=285 # 285.42us +T2a_max_cp_dl=429 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=285 # 285.42us +T2a_max_cp_ul=429 # 428.12us + +#Reception Window U-plane +T2a_min_up=71 # 71.35in us +T2a_max_up=428 # 428.12us + +#Transmission Window +Ta3_min=20 # in us +Ta3_max=32 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=285 +T1a_max_cp_dl=429 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=300 + +#U-plane +##Transmission Window +T1a_min_up=96 #71 + 25 us +T1a_max_up=196 #71 + 25 us + +#Reception Window +Ta4_min=0 # in us +Ta4_max=75 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/342/peak_o_ru_tst376.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/342/peak_o_ru_tst376.dat new file mode 100644 index 0000000..d4a6e0a --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/342/peak_o_ru_tst376.dat @@ -0,0 +1,287 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +#Peak: 100 % +#301 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % + + + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B +antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B +antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R + +#UEs +muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources +DlLayersPerUe=1 #number of RX anntennas on DL UE side +UlLayersPerUe=1 #number of TX anntennas on UL UE side + + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 +antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 +antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 + +#SlotNumTx0=./peak_txconfig_1.cfg +#SlotNumTx1=./peak_txconfig_1.cfg +#SlotNumTx2=./peak_txconfig_1.cfg +#SlotNumTx3=./peak_txconfig_2.cfg +#SlotNumTx4=./peak_txconfig_0.cfg + +#SlotNumTx5=./peak_txconfig_1.cfg +#SlotNumTx6=./peak_txconfig_1.cfg +#SlotNumTx7=./peak_txconfig_1.cfg +#SlotNumTx8=./peak_txconfig_2.cfg +#SlotNumTx9=./peak_txconfig_0.cfg + +#SlotNumRx0=./peak_rxconfig_0.cfg +#SlotNumRx1=./peak_rxconfig_0.cfg +#SlotNumRx2=./peak_rxconfig_0.cfg +#SlotNumRx3=./peak_rxconfig_2.cfg +#SlotNumRx4=./peak_rxconfig_1.cfg + +#SlotNumRx5=./peak_rxconfig_0.cfg +#SlotNumRx6=./peak_rxconfig_0.cfg +#SlotNumRx7=./peak_rxconfig_0.cfg +#SlotNumRx8=./peak_rxconfig_3.cfg +#SlotNumRx9=./peak_rxconfig_1.cfg + +antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 +antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 +antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 +antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 +#antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 +#antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 +#antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 +#antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 +#antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 +#antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 +#antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 +#antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 +#antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 +#antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 +#antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 + +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=189 + +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) + +antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin +antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin +antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin +antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin + +#DL PRB / % Used RBs UL PRB / % Used RBs +#66% 180 33% 90 + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used +extType=1 +nPrbElemDl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,48,0,14,0,1,1,9,1 +PrbElemDl1=48,48,0,14,1,1,1,9,1 +PrbElemDl2=96,48,0,14,2,1,1,9,1 +PrbElemDl3=144,48,0,14,3,1,1,9,1 +PrbElemDl4=192,48,0,14,4,1,1,9,1 +PrbElemDl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,24,0,0,9,1,1 +ExtBfwDl1=2,24,0,0,9,1,1 +ExtBfwDl2=2,24,0,0,9,1,1 +ExtBfwDl3=2,24,0,0,9,1,1 +ExtBfwDl4=2,24,0,0,9,1,1 +ExtBfwDl5=2,17,0,0,9,1,1 + +nPrbElemUl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,48,0,14,0,1,1,9,1 +PrbElemUl1=48,48,0,14,1,1,1,9,1 +PrbElemUl2=96,48,0,14,2,1,1,9,1 +PrbElemUl3=144,48,0,14,3,1,1,9,1 +PrbElemUl4=192,48,0,14,4,1,1,9,1 +PrbElemUl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,24,0,0,9,1,1 +ExtBfwUl1=2,24,0,0,9,1,1 +ExtBfwUl2=2,24,0,0,9,1,1 +ExtBfwUl3=2,24,0,0,9,1,1 +ExtBfwUl4=2,24,0,0,9,1,1 +ExtBfwUl5=2,17,0,0,9,1,1 + +nPrbElemSrs=1 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order +compression=1 # (1) compression enabled (0) compression disabled + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +Tadv_cp_dl=25 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=285 # 285.42us +T2a_max_cp_dl=429 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=285 # 285.42us +T2a_max_cp_ul=429 # 428.12us + +#Reception Window U-plane +T2a_min_up=71 # 71.35in us +T2a_max_up=428 # 428.12us + +#Transmission Window +Ta3_min=20 # in us +Ta3_max=32 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=285 +T1a_max_cp_dl=429 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=300 + +#U-plane +##Transmission Window +T1a_min_up=96 #71 + 25 us +T1a_max_up=196 #71 + 25 us + +#Reception Window +Ta4_min=0 # in us +Ta4_max=75 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/342/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/342/usecase_du.cfg new file mode 100644 index 0000000..936cff6 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/342/usecase_du.cfg @@ -0,0 +1,61 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ +# This is simple configuration file. Use '#' sign for comments +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system + +mainCore=20 #core for main() +systemCore=22 +ioCore=28 # core id + +ioWorker=0x7E0000000 # mask [0- no workers] + +dpdkMemorySize=16384 +iovaMode=0 + +oXuNum=3 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./peak_o_du_tst376.dat #O-DU0 +oXuCfgFile1=./peak_o_du_tst376.dat #O-DU1 +oXuCfgFile2=./peak_o_du_tst376.dat #O-DU2 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 + +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/811/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/342/usecase_du_icx.cfg similarity index 88% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/811/usecase_du.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/342/usecase_du_icx.cfg index 81c8cff..9d6dcda 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/811/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/342/usecase_du_icx.cfg @@ -21,20 +21,23 @@ instanceId=0 # 0,1,2,... in case more than 1 application started on the same sys mainCore=0 #core for main() systemCore=2 -ioCore=10 # core id -#ioWorker=0xE00000C00000 # mask [0- no workers] -ioWorker=0x1C000000001800 +ioCore=8 # core id + +ioWorker=0x3E00 # mask [0- no workers] + + dpdkMemorySize=16384 -#8192 iovaMode=0 -oXuNum=1 # numbers of O-RU connected to O-DU +oXuNum=3 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs -oXuCfgFile0=./config_file_o_du.dat #O-RU0 +oXuCfgFile0=./peak_o_du_tst376.dat #O-DU0 +oXuCfgFile1=./peak_o_du_tst376.dat #O-DU1 +oXuCfgFile2=./peak_o_du_tst376.dat #O-DU2 # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:01 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/411/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/342/usecase_ru.cfg similarity index 88% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/411/usecase_ru.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/342/usecase_ru.cfg index b5fd930..218a3a5 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/411/usecase_ru.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/342/usecase_ru.cfg @@ -15,23 +15,28 @@ # limitations under the License. # #******************************************************************************/ + # This is simple configuration file. Use '#' sign for comments appMode=1 # All O-DU(0) | O-RU(1) instanceId=1 # 0,1,2,... in case more than 1 application started on the same system mainCore=0 #core for main() systemCore=2 ioCore=8 # core id -ioWorker=0x10000000 # mask [0- no workers] -oXuNum=1 # numbers of O-RU connected to O-DU +ioWorker=0x3E00 # second socket + +dpdkMemorySize=16384 +iovaMode=0 + +oXuNum=3 # numbers of O-RU connected to O-DU + oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 - +oXuCfgFile0=./peak_o_ru_tst376.dat #O-RU0 +oXuCfgFile1=./peak_o_ru_tst376.dat #O-RU1 +oXuCfgFile2=./peak_o_ru_tst376.dat #O-RU2 # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:00 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/342/usecase_ru_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/342/usecase_ru_icx.cfg new file mode 100644 index 0000000..fe27f49 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/342/usecase_ru_icx.cfg @@ -0,0 +1,60 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +appMode=1 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +mainCore=0 #core for main() +systemCore=2 +ioCore=8 # core id + +ioWorker=0x3E00 # second socket + +dpdkMemorySize=16384 +iovaMode=0 + +oXuNum=3 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./peak_o_ru_tst376.dat #O-RU0 +oXuCfgFile1=./peak_o_ru_tst376.dat #O-RU1 +oXuCfgFile2=./peak_o_ru_tst376.dat #O-RU2 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:00 +oXuRem0Mac1=00:11:22:33:00:10 +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:20 +oXuRem0Mac3=00:11:22:33:00:30 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:00 +oXuRem1Mac1=00:11:22:33:01:10 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:20 +oXuRem1Mac3=00:11:22:33:01:30 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:00 +oXuRem2Mac1=00:11:22:33:02:10 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:20 +oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/avg_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/avg_o_du.dat index b10a961..176071a 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/avg_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/avg_o_du.dat @@ -140,10 +140,10 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS +srsEnable=1 # Enable (1)| disable (0) SRS srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/avg_o_du_tst377.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/avg_o_du_tst377.dat index b10a961..b5c2dce 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/avg_o_du_tst377.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/avg_o_du_tst377.dat @@ -140,11 +140,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/avg_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/avg_o_ru.dat index 0cc7dd4..d75630b 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/avg_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/avg_o_ru.dat @@ -121,10 +121,10 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS +srsEnable=1 # Enable (1)| disable (0) SRS srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin @@ -193,7 +193,7 @@ antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin -srsEanble=1 # Enable (1)| disable (0) SRS +srsEnable=1 # Enable (1)| disable (0) SRS srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/avg_o_ru_tst377.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/avg_o_ru_tst377.dat index e989e85..fb6bf8b 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/avg_o_ru_tst377.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/avg_o_ru_tst377.dat @@ -121,11 +121,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -193,7 +196,7 @@ antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin -srsEanble=1 # Enable (1)| disable (0) SRS +srsEnable=1 # Enable (1)| disable (0) SRS srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/config_file_o_du.dat index 50e08af..f94fd77 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/config_file_o_du.dat @@ -119,10 +119,10 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS +srsEnable=1 # Enable (1)| disable (0) SRS srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/config_file_o_ru.dat index 4fb9aa4..3d258da 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/config_file_o_ru.dat @@ -118,10 +118,10 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS +srsEnable=1 # Enable (1)| disable (0) SRS srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/peak_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/peak_o_du.dat index 5033f5c..1a793f5 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/peak_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/peak_o_du.dat @@ -140,10 +140,10 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS +srsEnable=1 # Enable (1)| disable (0) SRS srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/peak_o_du_tst376.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/peak_o_du_tst376.dat index 5033f5c..017a2ec 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/peak_o_du_tst376.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/peak_o_du_tst376.dat @@ -140,11 +140,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/peak_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/peak_o_ru.dat index c67c653..9151f31 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/peak_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/peak_o_ru.dat @@ -122,10 +122,10 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS +srsEnable=1 # Enable (1)| disable (0) SRS srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/peak_o_ru_tst376.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/peak_o_ru_tst376.dat index 67e96a1..6d13ecc 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/peak_o_ru_tst376.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3501/peak_o_ru_tst376.dat @@ -122,11 +122,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/avg_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/avg_o_du.dat index 33f6e6d..701add6 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/avg_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/avg_o_du.dat @@ -140,10 +140,10 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS +srsEnable=1 # Enable (1)| disable (0) SRS srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/avg_o_du_tst377.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/avg_o_du_tst377.dat index 33f6e6d..79b9f98 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/avg_o_du_tst377.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/avg_o_du_tst377.dat @@ -140,11 +140,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/avg_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/avg_o_ru.dat index d661b5f..2e3cd2f 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/avg_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/avg_o_ru.dat @@ -121,10 +121,10 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS +srsEnable=1 # Enable (1)| disable (0) SRS srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin @@ -193,7 +193,7 @@ antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin -srsEanble=1 # Enable (1)| disable (0) SRS +srsEnable=1 # Enable (1)| disable (0) SRS srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/avg_o_ru_tst377.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/avg_o_ru_tst377.dat index 9fa1310..73f7a56 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/avg_o_ru_tst377.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/avg_o_ru_tst377.dat @@ -121,11 +121,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -193,7 +196,7 @@ antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin -srsEanble=1 # Enable (1)| disable (0) SRS +srsEnable=1 # Enable (1)| disable (0) SRS srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/config_file_o_du.dat index 50e08af..f94fd77 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/config_file_o_du.dat @@ -119,10 +119,10 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS +srsEnable=1 # Enable (1)| disable (0) SRS srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/config_file_o_ru.dat index 4fb9aa4..3d258da 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/config_file_o_ru.dat @@ -118,10 +118,10 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS +srsEnable=1 # Enable (1)| disable (0) SRS srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/peak_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/peak_o_du.dat index 4f3b677..9fb9abd 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/peak_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/peak_o_du.dat @@ -140,10 +140,10 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS +srsEnable=1 # Enable (1)| disable (0) SRS srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/peak_o_du_tst376.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/peak_o_du_tst376.dat index 4f3b677..f195d1d 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/peak_o_du_tst376.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/peak_o_du_tst376.dat @@ -140,11 +140,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/peak_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/peak_o_ru.dat index 7305818..34afb0d 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/peak_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/peak_o_ru.dat @@ -122,10 +122,10 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS +srsEnable=1 # Enable (1)| disable (0) SRS srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/peak_o_ru_tst376.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/peak_o_ru_tst376.dat index 1a8c62c..fc6ed87 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/peak_o_ru_tst376.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3511/peak_o_ru_tst376.dat @@ -122,11 +122,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_o_du.dat deleted file mode 100644 index a682dc2..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_o_du.dat +++ /dev/null @@ -1,265 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak -#4% -#302 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 Peak: 4 % - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Component Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX antennas on DL UE side -UlLayersPerUe=1 #number of TX antennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#SlotNumTx0=./avg_txconfig_1.cfg -#SlotNumTx1=./avg_txconfig_1.cfg -#SlotNumTx2=./avg_txconfig_1.cfg -#SlotNumTx3=./avg_txconfig_2.cfg -#SlotNumTx4=./avg_txconfig_0.cfg - -#SlotNumTx5=./avg_txconfig_1.cfg -#SlotNumTx6=./avg_txconfig_1.cfg -#SlotNumTx7=./avg_txconfig_1.cfg -#SlotNumTx8=./avg_txconfig_2.cfg -#SlotNumTx9=./avg_txconfig_0.cfg - -#SlotNumRx0=./avg_rxconfig_0.cfg -#SlotNumRx1=./avg_rxconfig_0.cfg -#SlotNumRx2=./avg_rxconfig_0.cfg -#SlotNumRx3=./avg_rxconfig_2.cfg -#SlotNumRx4=./avg_rxconfig_1.cfg - -#SlotNumRx5=./avg_rxconfig_0.cfg -#SlotNumRx6=./avg_rxconfig_0.cfg -#SlotNumRx7=./avg_rxconfig_0.cfg -#SlotNumRx8=./avg_rxconfig_3.cfg -#SlotNumRx9=./avg_rxconfig_1.cfg - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=12 -max_sections_per_symbol=12 - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,5,0,0,9,1 - - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,5,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_o_du_tst377.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_o_du_tst377.dat deleted file mode 100644 index a682dc2..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_o_du_tst377.dat +++ /dev/null @@ -1,265 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak -#4% -#302 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 Peak: 4 % - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Component Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX antennas on DL UE side -UlLayersPerUe=1 #number of TX antennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#SlotNumTx0=./avg_txconfig_1.cfg -#SlotNumTx1=./avg_txconfig_1.cfg -#SlotNumTx2=./avg_txconfig_1.cfg -#SlotNumTx3=./avg_txconfig_2.cfg -#SlotNumTx4=./avg_txconfig_0.cfg - -#SlotNumTx5=./avg_txconfig_1.cfg -#SlotNumTx6=./avg_txconfig_1.cfg -#SlotNumTx7=./avg_txconfig_1.cfg -#SlotNumTx8=./avg_txconfig_2.cfg -#SlotNumTx9=./avg_txconfig_0.cfg - -#SlotNumRx0=./avg_rxconfig_0.cfg -#SlotNumRx1=./avg_rxconfig_0.cfg -#SlotNumRx2=./avg_rxconfig_0.cfg -#SlotNumRx3=./avg_rxconfig_2.cfg -#SlotNumRx4=./avg_rxconfig_1.cfg - -#SlotNumRx5=./avg_rxconfig_0.cfg -#SlotNumRx6=./avg_rxconfig_0.cfg -#SlotNumRx7=./avg_rxconfig_0.cfg -#SlotNumRx8=./avg_rxconfig_3.cfg -#SlotNumRx9=./avg_rxconfig_1.cfg - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=12 -max_sections_per_symbol=12 - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,5,0,0,9,1 - - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,5,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_o_ru.dat deleted file mode 100644 index 942cea2..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_o_ru.dat +++ /dev/null @@ -1,315 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak -#4% -#302 TDD DDDFU: S it's 10:2:2 1 64T64R 100 8 8 37% 100 1200 37% 100 1200 Peak: 4 % - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#SlotNumTx0=./avg_txconfig_1.cfg -#SlotNumTx1=./avg_txconfig_1.cfg -#SlotNumTx2=./avg_txconfig_1.cfg -#SlotNumTx3=./avg_txconfig_2.cfg -#SlotNumTx4=./avg_txconfig_0.cfg - -#SlotNumTx5=./avg_txconfig_1.cfg -#SlotNumTx6=./avg_txconfig_1.cfg -#SlotNumTx7=./avg_txconfig_1.cfg -#SlotNumTx8=./avg_txconfig_2.cfg -#SlotNumTx9=./avg_txconfig_0.cfg - -#SlotNumRx0=./avg_rxconfig_0.cfg -#SlotNumRx1=./avg_rxconfig_0.cfg -#SlotNumRx2=./avg_rxconfig_0.cfg -#SlotNumRx3=./avg_rxconfig_2.cfg -#SlotNumRx4=./avg_rxconfig_1.cfg - -#SlotNumRx5=./avg_rxconfig_0.cfg -#SlotNumRx6=./avg_rxconfig_0.cfg -#SlotNumRx7=./avg_rxconfig_0.cfg -#SlotNumRx8=./avg_rxconfig_3.cfg -#SlotNumRx9=./avg_rxconfig_1.cfg - - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=12 -max_sections_per_symbol=12 - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,5,0,0,9,1 - - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,5,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_o_ru_tst377.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_o_ru_tst377.dat deleted file mode 100644 index 27ea2f5..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_o_ru_tst377.dat +++ /dev/null @@ -1,315 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak -#4% -#302 TDD DDDFU: S it's 10:2:2 1 64T64R 100 8 8 37% 100 1200 37% 100 1200 Peak: 4 % - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/uliq00_tst377.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/uliq01_tst377.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/uliq02_tst377.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/uliq03_tst377.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/uliq04_tst377.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/uliq05_tst377.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/uliq06_tst377.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/uliq07_tst377.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#SlotNumTx0=./avg_txconfig_1.cfg -#SlotNumTx1=./avg_txconfig_1.cfg -#SlotNumTx2=./avg_txconfig_1.cfg -#SlotNumTx3=./avg_txconfig_2.cfg -#SlotNumTx4=./avg_txconfig_0.cfg - -#SlotNumTx5=./avg_txconfig_1.cfg -#SlotNumTx6=./avg_txconfig_1.cfg -#SlotNumTx7=./avg_txconfig_1.cfg -#SlotNumTx8=./avg_txconfig_2.cfg -#SlotNumTx9=./avg_txconfig_0.cfg - -#SlotNumRx0=./avg_rxconfig_0.cfg -#SlotNumRx1=./avg_rxconfig_0.cfg -#SlotNumRx2=./avg_rxconfig_0.cfg -#SlotNumRx3=./avg_rxconfig_2.cfg -#SlotNumRx4=./avg_rxconfig_1.cfg - -#SlotNumRx5=./avg_rxconfig_0.cfg -#SlotNumRx6=./avg_rxconfig_0.cfg -#SlotNumRx7=./avg_rxconfig_0.cfg -#SlotNumRx8=./avg_rxconfig_3.cfg -#SlotNumRx9=./avg_rxconfig_1.cfg - - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=12 -max_sections_per_symbol=12 - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,5,0,0,9,1 - - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,5,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_rxconfig_0.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_rxconfig_0.cfg deleted file mode 100644 index 1143077..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_rxconfig_0.cfg +++ /dev/null @@ -1,31 +0,0 @@ -nPrbElemUl=4 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=10,4,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_rxconfig_1.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_rxconfig_1.cfg deleted file mode 100644 index 1143077..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_rxconfig_1.cfg +++ /dev/null @@ -1,31 +0,0 @@ -nPrbElemUl=4 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=10,4,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_rxconfig_2.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_rxconfig_2.cfg deleted file mode 100644 index 1143077..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_rxconfig_2.cfg +++ /dev/null @@ -1,31 +0,0 @@ -nPrbElemUl=4 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=10,4,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_rxconfig_3.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_rxconfig_3.cfg deleted file mode 100644 index 1143077..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_rxconfig_3.cfg +++ /dev/null @@ -1,31 +0,0 @@ -nPrbElemUl=4 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=10,4,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_txconfig_0.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_txconfig_0.cfg deleted file mode 100644 index 1f4514c..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_txconfig_0.cfg +++ /dev/null @@ -1,32 +0,0 @@ -nPrbElemDl=4 - -# 0-15 CCs S -PrbElemDlCCMask0=0f -PrbElemDlCCMask1=0f -PrbElemDlCCMask2=0f -PrbElemDlCCMask3=0f -PrbElemDlCCMask4=0f -PrbElemDlCCMask5=0f - -# 0-63 AntC -PrbElemDlAntCMask0=ffffffffffffffff -PrbElemDlAntCMask1=ffffffffffffffff -PrbElemDlAntCMask2=ffffffffffffffff -PrbElemDlAntCMask3=ffffffffffffffff -PrbElemDlAntCMask4=ffffffffffffffff -PrbElemDlAntCMask5=ffffffffffffffff - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=10,4,0,0,9,1 - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_txconfig_1.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_txconfig_1.cfg deleted file mode 100644 index 1f4514c..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_txconfig_1.cfg +++ /dev/null @@ -1,32 +0,0 @@ -nPrbElemDl=4 - -# 0-15 CCs S -PrbElemDlCCMask0=0f -PrbElemDlCCMask1=0f -PrbElemDlCCMask2=0f -PrbElemDlCCMask3=0f -PrbElemDlCCMask4=0f -PrbElemDlCCMask5=0f - -# 0-63 AntC -PrbElemDlAntCMask0=ffffffffffffffff -PrbElemDlAntCMask1=ffffffffffffffff -PrbElemDlAntCMask2=ffffffffffffffff -PrbElemDlAntCMask3=ffffffffffffffff -PrbElemDlAntCMask4=ffffffffffffffff -PrbElemDlAntCMask5=ffffffffffffffff - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=10,4,0,0,9,1 - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_txconfig_2.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_txconfig_2.cfg deleted file mode 100644 index 1f4514c..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/avg_txconfig_2.cfg +++ /dev/null @@ -1,32 +0,0 @@ -nPrbElemDl=4 - -# 0-15 CCs S -PrbElemDlCCMask0=0f -PrbElemDlCCMask1=0f -PrbElemDlCCMask2=0f -PrbElemDlCCMask3=0f -PrbElemDlCCMask4=0f -PrbElemDlCCMask5=0f - -# 0-63 AntC -PrbElemDlAntCMask0=ffffffffffffffff -PrbElemDlAntCMask1=ffffffffffffffff -PrbElemDlAntCMask2=ffffffffffffffff -PrbElemDlAntCMask3=ffffffffffffffff -PrbElemDlAntCMask4=ffffffffffffffff -PrbElemDlAntCMask5=ffffffffffffffff - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=10,4,0,0,9,1 - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/config_file_o_du.dat deleted file mode 100644 index 92c8e3d..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/config_file_o_du.dat +++ /dev/null @@ -1,223 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak: 100 % -#301 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -numSlots=10 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,48,0,14,3,1,1,9,1 -PrbElemDl4=192,48,0,14,4,1,1,9,1 -PrbElemDl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=12,4,0,0,9,1 -ExtBfwDl4=12,4,0,0,9,1 -ExtBfwDl5=11,3,0,0,9,1 - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,48,0,14,3,1,1,9,1 -PrbElemUl4=192,48,0,14,4,1,1,9,1 -PrbElemUl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=12,4,0,0,9,1 -ExtBfwUl4=12,4,0,0,9,1 -ExtBfwUl5=11,3,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/config_file_o_ru.dat deleted file mode 100644 index cb9411c..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/config_file_o_ru.dat +++ /dev/null @@ -1,274 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak: 100 % -#301 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=15 -# Eth 0 -duMac0=00:11:22:33:44:00 # asigned MAC of O-DU VF -duMac1=00:11:22:33:44:10 # asigned MAC of O-DU VF - -ruMac0=00:11:22:33:44:01 # O-RU VF for O-RU app -ruMac1=00:11:22:33:44:11 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:20 # asigned MAC of O-DU VF -duMac3=00:11:22:33:44:30 # asigned MAC of O-DU VF - -ruMac2=00:11:22:33:44:21 # O-RU VF for O-RU app -ruMac3=00:11:22:33:44:31 # O-RU VF for O-RU app - -# Eth 1 -duMac4=00:11:22:33:44:40 # asigned MAC of O-DU VF -duMac5=00:11:22:33:44:50 # asigned MAC of O-DU VF -ruMac4=00:11:22:33:44:41 # O-RU VF for O-RU app -ruMac5=00:11:22:33:44:51 # O-RU VF for O-RU app - - -numSlots=10 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - -#DL PRB / % Used RBs UL PRB / % Used RBs -#66% 180 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,48,0,14,3,1,1,9,1 -PrbElemDl4=192,48,0,14,4,1,1,9,1 -PrbElemDl5=240,33,0,14,5,1,1,9,1 - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,48,0,14,3,1,1,9,1 -PrbElemUl4=192,48,0,14,4,1,1,9,1 -PrbElemUl5=240,33,0,14,5,1,1,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_o_du.dat deleted file mode 100644 index 2aa2510..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_o_du.dat +++ /dev/null @@ -1,305 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak: 100 % -#301 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#SlotNumTx0=./peak_txconfig_1.cfg -#SlotNumTx1=./peak_txconfig_1.cfg -#SlotNumTx2=./peak_txconfig_1.cfg -#SlotNumTx3=./peak_txconfig_2.cfg -#SlotNumTx4=./peak_txconfig_0.cfg - -#SlotNumTx5=./peak_txconfig_1.cfg -#SlotNumTx6=./peak_txconfig_1.cfg -#SlotNumTx7=./peak_txconfig_1.cfg -#SlotNumTx8=./peak_txconfig_2.cfg -#SlotNumTx9=./peak_txconfig_0.cfg - -#SlotNumRx0=./peak_rxconfig_0.cfg -#SlotNumRx1=./peak_rxconfig_0.cfg -#SlotNumRx2=./peak_rxconfig_0.cfg -#SlotNumRx3=./peak_rxconfig_2.cfg -#SlotNumRx4=./peak_rxconfig_1.cfg - -#SlotNumRx5=./peak_rxconfig_0.cfg -#SlotNumRx6=./peak_rxconfig_0.cfg -#SlotNumRx7=./peak_rxconfig_0.cfg -#SlotNumRx8=./peak_rxconfig_3.cfg -#SlotNumRx9=./peak_rxconfig_1.cfg - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=16 -max_sections_per_symbol=16 - -nPrbElemDl=16 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,18,0,14,5,1,1,9,1 -PrbElemDl6=108,18,0,14,6,1,1,9,1 -PrbElemDl7=126,18,0,14,7,1,1,9,1 -PrbElemDl8=144,18,0,14,8,1,1,9,1 -PrbElemDl9=162,18,0,14,9,1,1,9,1 -PrbElemDl10=180,18,0,14,10,1,1,9,1 -PrbElemDl11=198,18,0,14,11,1,1,9,1 -PrbElemDl12=216,18,0,14,12,1,1,9,1 -PrbElemDl13=234,18,0,14,13,1,1,9,1 -PrbElemDl14=252,18,0,14,14,1,1,9,1 -PrbElemDl15=270,3,0,14,15,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,9,0,0,9,1 -ExtBfwDl6=2,9,0,0,9,1 -ExtBfwDl7=2,9,0,0,9,1 -ExtBfwDl8=2,9,0,0,9,1 -ExtBfwDl9=2,9,0,0,9,1 -ExtBfwDl10=2,9,0,0,9,1 -ExtBfwDl11=2,9,0,0,9,1 -ExtBfwDl12=2,9,0,0,9,1 -ExtBfwDl13=2,9,0,0,9,1 -ExtBfwDl14=2,9,0,0,9,1 -ExtBfwDl15=2,2,0,0,9,1 - - -nPrbElemUl=16 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,18,0,14,5,1,1,9,1 -PrbElemUl6=108,18,0,14,6,1,1,9,1 -PrbElemUl7=126,18,0,14,7,1,1,9,1 -PrbElemUl8=144,18,0,14,8,1,1,9,1 -PrbElemUl9=162,18,0,14,9,1,1,9,1 -PrbElemUl10=180,18,0,14,10,1,1,9,1 -PrbElemUl11=198,18,0,14,11,1,1,9,1 -PrbElemUl12=216,18,0,14,12,1,1,9,1 -PrbElemUl13=234,18,0,14,13,1,1,9,1 -PrbElemUl14=252,18,0,14,14,1,1,9,1 -PrbElemUl15=270,3,0,14,15,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,9,0,0,9,1 -ExtBfwUl6=2,9,0,0,9,1 -ExtBfwUl7=2,9,0,0,9,1 -ExtBfwUl8=2,9,0,0,9,1 -ExtBfwUl9=2,9,0,0,9,1 -ExtBfwUl10=2,9,0,0,9,1 -ExtBfwUl11=2,9,0,0,9,1 -ExtBfwUl12=2,9,0,0,9,1 -ExtBfwUl13=2,9,0,0,9,1 -ExtBfwUl14=2,9,0,0,9,1 -ExtBfwUl15=2,2,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_o_du_tst376.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_o_du_tst376.dat deleted file mode 100644 index 2aa2510..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_o_du_tst376.dat +++ /dev/null @@ -1,305 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak: 100 % -#301 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#SlotNumTx0=./peak_txconfig_1.cfg -#SlotNumTx1=./peak_txconfig_1.cfg -#SlotNumTx2=./peak_txconfig_1.cfg -#SlotNumTx3=./peak_txconfig_2.cfg -#SlotNumTx4=./peak_txconfig_0.cfg - -#SlotNumTx5=./peak_txconfig_1.cfg -#SlotNumTx6=./peak_txconfig_1.cfg -#SlotNumTx7=./peak_txconfig_1.cfg -#SlotNumTx8=./peak_txconfig_2.cfg -#SlotNumTx9=./peak_txconfig_0.cfg - -#SlotNumRx0=./peak_rxconfig_0.cfg -#SlotNumRx1=./peak_rxconfig_0.cfg -#SlotNumRx2=./peak_rxconfig_0.cfg -#SlotNumRx3=./peak_rxconfig_2.cfg -#SlotNumRx4=./peak_rxconfig_1.cfg - -#SlotNumRx5=./peak_rxconfig_0.cfg -#SlotNumRx6=./peak_rxconfig_0.cfg -#SlotNumRx7=./peak_rxconfig_0.cfg -#SlotNumRx8=./peak_rxconfig_3.cfg -#SlotNumRx9=./peak_rxconfig_1.cfg - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=16 -max_sections_per_symbol=16 - -nPrbElemDl=16 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,18,0,14,5,1,1,9,1 -PrbElemDl6=108,18,0,14,6,1,1,9,1 -PrbElemDl7=126,18,0,14,7,1,1,9,1 -PrbElemDl8=144,18,0,14,8,1,1,9,1 -PrbElemDl9=162,18,0,14,9,1,1,9,1 -PrbElemDl10=180,18,0,14,10,1,1,9,1 -PrbElemDl11=198,18,0,14,11,1,1,9,1 -PrbElemDl12=216,18,0,14,12,1,1,9,1 -PrbElemDl13=234,18,0,14,13,1,1,9,1 -PrbElemDl14=252,18,0,14,14,1,1,9,1 -PrbElemDl15=270,3,0,14,15,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,9,0,0,9,1 -ExtBfwDl6=2,9,0,0,9,1 -ExtBfwDl7=2,9,0,0,9,1 -ExtBfwDl8=2,9,0,0,9,1 -ExtBfwDl9=2,9,0,0,9,1 -ExtBfwDl10=2,9,0,0,9,1 -ExtBfwDl11=2,9,0,0,9,1 -ExtBfwDl12=2,9,0,0,9,1 -ExtBfwDl13=2,9,0,0,9,1 -ExtBfwDl14=2,9,0,0,9,1 -ExtBfwDl15=2,2,0,0,9,1 - - -nPrbElemUl=16 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,18,0,14,5,1,1,9,1 -PrbElemUl6=108,18,0,14,6,1,1,9,1 -PrbElemUl7=126,18,0,14,7,1,1,9,1 -PrbElemUl8=144,18,0,14,8,1,1,9,1 -PrbElemUl9=162,18,0,14,9,1,1,9,1 -PrbElemUl10=180,18,0,14,10,1,1,9,1 -PrbElemUl11=198,18,0,14,11,1,1,9,1 -PrbElemUl12=216,18,0,14,12,1,1,9,1 -PrbElemUl13=234,18,0,14,13,1,1,9,1 -PrbElemUl14=252,18,0,14,14,1,1,9,1 -PrbElemUl15=270,3,0,14,15,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,9,0,0,9,1 -ExtBfwUl6=2,9,0,0,9,1 -ExtBfwUl7=2,9,0,0,9,1 -ExtBfwUl8=2,9,0,0,9,1 -ExtBfwUl9=2,9,0,0,9,1 -ExtBfwUl10=2,9,0,0,9,1 -ExtBfwUl11=2,9,0,0,9,1 -ExtBfwUl12=2,9,0,0,9,1 -ExtBfwUl13=2,9,0,0,9,1 -ExtBfwUl14=2,9,0,0,9,1 -ExtBfwUl15=2,2,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_o_ru.dat deleted file mode 100644 index aee9e19..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_o_ru.dat +++ /dev/null @@ -1,353 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak: 100 % -#301 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - - - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#SlotNumTx0=./peak_txconfig_1.cfg -#SlotNumTx1=./peak_txconfig_1.cfg -#SlotNumTx2=./peak_txconfig_1.cfg -#SlotNumTx3=./peak_txconfig_2.cfg -#SlotNumTx4=./peak_txconfig_0.cfg - -#SlotNumTx5=./peak_txconfig_1.cfg -#SlotNumTx6=./peak_txconfig_1.cfg -#SlotNumTx7=./peak_txconfig_1.cfg -#SlotNumTx8=./peak_txconfig_2.cfg -#SlotNumTx9=./peak_txconfig_0.cfg - -#SlotNumRx0=./peak_rxconfig_0.cfg -#SlotNumRx1=./peak_rxconfig_0.cfg -#SlotNumRx2=./peak_rxconfig_0.cfg -#SlotNumRx3=./peak_rxconfig_2.cfg -#SlotNumRx4=./peak_rxconfig_1.cfg - -#SlotNumRx5=./peak_rxconfig_0.cfg -#SlotNumRx6=./peak_rxconfig_0.cfg -#SlotNumRx7=./peak_rxconfig_0.cfg -#SlotNumRx8=./peak_rxconfig_3.cfg -#SlotNumRx9=./peak_rxconfig_1.cfg - - - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=16 -max_sections_per_symbol=16 - -nPrbElemDl=16 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,18,0,14,5,1,1,9,1 -PrbElemDl6=108,18,0,14,6,1,1,9,1 -PrbElemDl7=126,18,0,14,7,1,1,9,1 -PrbElemDl8=144,18,0,14,8,1,1,9,1 -PrbElemDl9=162,18,0,14,9,1,1,9,1 -PrbElemDl10=180,18,0,14,10,1,1,9,1 -PrbElemDl11=198,18,0,14,11,1,1,9,1 -PrbElemDl12=216,18,0,14,12,1,1,9,1 -PrbElemDl13=234,18,0,14,13,1,1,9,1 -PrbElemDl14=252,18,0,14,14,1,1,9,1 -PrbElemDl15=270,3,0,14,15,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,9,0,0,9,1 -ExtBfwDl6=2,9,0,0,9,1 -ExtBfwDl7=2,9,0,0,9,1 -ExtBfwDl8=2,9,0,0,9,1 -ExtBfwDl9=2,9,0,0,9,1 -ExtBfwDl10=2,9,0,0,9,1 -ExtBfwDl11=2,9,0,0,9,1 -ExtBfwDl12=2,9,0,0,9,1 -ExtBfwDl13=2,9,0,0,9,1 -ExtBfwDl14=2,9,0,0,9,1 -ExtBfwDl15=2,2,0,0,9,1 - - -nPrbElemUl=16 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,18,0,14,5,1,1,9,1 -PrbElemUl6=108,18,0,14,6,1,1,9,1 -PrbElemUl7=126,18,0,14,7,1,1,9,1 -PrbElemUl8=144,18,0,14,8,1,1,9,1 -PrbElemUl9=162,18,0,14,9,1,1,9,1 -PrbElemUl10=180,18,0,14,10,1,1,9,1 -PrbElemUl11=198,18,0,14,11,1,1,9,1 -PrbElemUl12=216,18,0,14,12,1,1,9,1 -PrbElemUl13=234,18,0,14,13,1,1,9,1 -PrbElemUl14=252,18,0,14,14,1,1,9,1 -PrbElemUl15=270,3,0,14,15,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,9,0,0,9,1 -ExtBfwUl6=2,9,0,0,9,1 -ExtBfwUl7=2,9,0,0,9,1 -ExtBfwUl8=2,9,0,0,9,1 -ExtBfwUl9=2,9,0,0,9,1 -ExtBfwUl10=2,9,0,0,9,1 -ExtBfwUl11=2,9,0,0,9,1 -ExtBfwUl12=2,9,0,0,9,1 -ExtBfwUl13=2,9,0,0,9,1 -ExtBfwUl14=2,9,0,0,9,1 -ExtBfwUl15=2,2,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_o_ru_tst376.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_o_ru_tst376.dat deleted file mode 100644 index f8d871c..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_o_ru_tst376.dat +++ /dev/null @@ -1,353 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak: 100 % -#301 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/uliq00_tst376.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/uliq01_tst376.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/uliq02_tst376.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/uliq03_tst376.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/uliq04_tst376.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/uliq05_tst376.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/uliq06_tst376.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/uliq07_tst376.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#SlotNumTx0=./peak_txconfig_1.cfg -#SlotNumTx1=./peak_txconfig_1.cfg -#SlotNumTx2=./peak_txconfig_1.cfg -#SlotNumTx3=./peak_txconfig_2.cfg -#SlotNumTx4=./peak_txconfig_0.cfg - -#SlotNumTx5=./peak_txconfig_1.cfg -#SlotNumTx6=./peak_txconfig_1.cfg -#SlotNumTx7=./peak_txconfig_1.cfg -#SlotNumTx8=./peak_txconfig_2.cfg -#SlotNumTx9=./peak_txconfig_0.cfg - -#SlotNumRx0=./peak_rxconfig_0.cfg -#SlotNumRx1=./peak_rxconfig_0.cfg -#SlotNumRx2=./peak_rxconfig_0.cfg -#SlotNumRx3=./peak_rxconfig_2.cfg -#SlotNumRx4=./peak_rxconfig_1.cfg - -#SlotNumRx5=./peak_rxconfig_0.cfg -#SlotNumRx6=./peak_rxconfig_0.cfg -#SlotNumRx7=./peak_rxconfig_0.cfg -#SlotNumRx8=./peak_rxconfig_3.cfg -#SlotNumRx9=./peak_rxconfig_1.cfg - - - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=16 -max_sections_per_symbol=16 - -nPrbElemDl=16 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,18,0,14,5,1,1,9,1 -PrbElemDl6=108,18,0,14,6,1,1,9,1 -PrbElemDl7=126,18,0,14,7,1,1,9,1 -PrbElemDl8=144,18,0,14,8,1,1,9,1 -PrbElemDl9=162,18,0,14,9,1,1,9,1 -PrbElemDl10=180,18,0,14,10,1,1,9,1 -PrbElemDl11=198,18,0,14,11,1,1,9,1 -PrbElemDl12=216,18,0,14,12,1,1,9,1 -PrbElemDl13=234,18,0,14,13,1,1,9,1 -PrbElemDl14=252,18,0,14,14,1,1,9,1 -PrbElemDl15=270,3,0,14,15,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,9,0,0,9,1 -ExtBfwDl6=2,9,0,0,9,1 -ExtBfwDl7=2,9,0,0,9,1 -ExtBfwDl8=2,9,0,0,9,1 -ExtBfwDl9=2,9,0,0,9,1 -ExtBfwDl10=2,9,0,0,9,1 -ExtBfwDl11=2,9,0,0,9,1 -ExtBfwDl12=2,9,0,0,9,1 -ExtBfwDl13=2,9,0,0,9,1 -ExtBfwDl14=2,9,0,0,9,1 -ExtBfwDl15=2,2,0,0,9,1 - - -nPrbElemUl=16 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,18,0,14,5,1,1,9,1 -PrbElemUl6=108,18,0,14,6,1,1,9,1 -PrbElemUl7=126,18,0,14,7,1,1,9,1 -PrbElemUl8=144,18,0,14,8,1,1,9,1 -PrbElemUl9=162,18,0,14,9,1,1,9,1 -PrbElemUl10=180,18,0,14,10,1,1,9,1 -PrbElemUl11=198,18,0,14,11,1,1,9,1 -PrbElemUl12=216,18,0,14,12,1,1,9,1 -PrbElemUl13=234,18,0,14,13,1,1,9,1 -PrbElemUl14=252,18,0,14,14,1,1,9,1 -PrbElemUl15=270,3,0,14,15,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,9,0,0,9,1 -ExtBfwUl6=2,9,0,0,9,1 -ExtBfwUl7=2,9,0,0,9,1 -ExtBfwUl8=2,9,0,0,9,1 -ExtBfwUl9=2,9,0,0,9,1 -ExtBfwUl10=2,9,0,0,9,1 -ExtBfwUl11=2,9,0,0,9,1 -ExtBfwUl12=2,9,0,0,9,1 -ExtBfwUl13=2,9,0,0,9,1 -ExtBfwUl14=2,9,0,0,9,1 -ExtBfwUl15=2,2,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_rxconfig_0.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_rxconfig_0.cfg deleted file mode 100644 index 41d084a..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_rxconfig_0.cfg +++ /dev/null @@ -1,34 +0,0 @@ -nPrbElemUl=6 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,48,0,14,3,1,1,9,1 -PrbElemUl4=192,48,0,14,4,1,1,9,1 -PrbElemUl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=12,4,0,0,9,1 -ExtBfwUl4=12,4,0,0,9,1 -ExtBfwUl5=11,3,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_rxconfig_1.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_rxconfig_1.cfg deleted file mode 100644 index 41d084a..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_rxconfig_1.cfg +++ /dev/null @@ -1,34 +0,0 @@ -nPrbElemUl=6 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,48,0,14,3,1,1,9,1 -PrbElemUl4=192,48,0,14,4,1,1,9,1 -PrbElemUl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=12,4,0,0,9,1 -ExtBfwUl4=12,4,0,0,9,1 -ExtBfwUl5=11,3,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_rxconfig_2.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_rxconfig_2.cfg deleted file mode 100644 index 41d084a..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_rxconfig_2.cfg +++ /dev/null @@ -1,34 +0,0 @@ -nPrbElemUl=6 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,48,0,14,3,1,1,9,1 -PrbElemUl4=192,48,0,14,4,1,1,9,1 -PrbElemUl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=12,4,0,0,9,1 -ExtBfwUl4=12,4,0,0,9,1 -ExtBfwUl5=11,3,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_rxconfig_3.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_rxconfig_3.cfg deleted file mode 100644 index 41d084a..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_rxconfig_3.cfg +++ /dev/null @@ -1,34 +0,0 @@ -nPrbElemUl=6 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,48,0,14,3,1,1,9,1 -PrbElemUl4=192,48,0,14,4,1,1,9,1 -PrbElemUl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=12,4,0,0,9,1 -ExtBfwUl4=12,4,0,0,9,1 -ExtBfwUl5=11,3,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_txconfig_0.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_txconfig_0.cfg deleted file mode 100644 index b705198..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_txconfig_0.cfg +++ /dev/null @@ -1,35 +0,0 @@ -nPrbElemDl=6 - -# 0-15 CCs S -PrbElemDlCCMask0=0f -PrbElemDlCCMask1=0f -PrbElemDlCCMask2=0f -PrbElemDlCCMask3=0f -PrbElemDlCCMask4=0f -PrbElemDlCCMask5=0f - -# 0-63 AntC -PrbElemDlAntCMask0=ffffffffffffffff -PrbElemDlAntCMask1=ffffffffffffffff -PrbElemDlAntCMask2=ffffffffffffffff -PrbElemDlAntCMask3=ffffffffffffffff -PrbElemDlAntCMask4=ffffffffffffffff -PrbElemDlAntCMask5=ffffffffffffffff - -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,48,0,14,3,1,1,9,1 -PrbElemDl4=192,48,0,14,4,1,1,9,1 -PrbElemDl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=12,4,0,0,9,1 -ExtBfwDl4=12,4,0,0,9,1 -ExtBfwDl5=11,3,0,0,9,1 - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_txconfig_1.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_txconfig_1.cfg deleted file mode 100644 index 9359005..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_txconfig_1.cfg +++ /dev/null @@ -1,35 +0,0 @@ -nPrbElemDl=6 - -# 0-15 CCs -PrbElemDlCCMask0=0f -PrbElemDlCCMask1=0f -PrbElemDlCCMask2=0f -PrbElemDlCCMask3=0f -PrbElemDlCCMask4=0f -PrbElemDlCCMask5=0f - -# 0-63 AntC -PrbElemDlAntCMask0=ffffffffffffffff -PrbElemDlAntCMask1=ffffffffffffffff -PrbElemDlAntCMask2=ffffffffffffffff -PrbElemDlAntCMask3=ffffffffffffffff -PrbElemDlAntCMask4=ffffffffffffffff -PrbElemDlAntCMask5=ffffffffffffffff - -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,48,0,14,3,1,1,9,1 -PrbElemDl4=192,48,0,14,4,1,1,9,1 -PrbElemDl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=12,4,0,0,9,1 -ExtBfwDl4=12,4,0,0,9,1 -ExtBfwDl5=11,3,0,0,9,1 - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_txconfig_2.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_txconfig_2.cfg deleted file mode 100644 index 6184512..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/peak_txconfig_2.cfg +++ /dev/null @@ -1,36 +0,0 @@ -nPrbElemDl=6 - -# 0-15 CCs -PrbElemDlCCMask0=0f -PrbElemDlCCMask1=0f -PrbElemDlCCMask2=0f -PrbElemDlCCMask3=0f -PrbElemDlCCMask4=0f -PrbElemDlCCMask5=0f - -# 0-63 AntC -PrbElemDlAntCMask0=ffffffffffffffff -PrbElemDlAntCMask1=ffffffffffffffff -PrbElemDlAntCMask2=ffffffffffffffff -PrbElemDlAntCMask3=ffffffffffffffff -PrbElemDlAntCMask4=ffffffffffffffff -PrbElemDlAntCMask5=ffffffffffffffff - - -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,48,0,14,3,1,1,9,1 -PrbElemDl4=192,48,0,14,4,1,1,9,1 -PrbElemDl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=12,4,0,0,9,1 -ExtBfwDl4=12,4,0,0,9,1 -ExtBfwDl5=11,3,0,0,9,1 - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/usecase_du.cfg deleted file mode 100644 index 4dd5356..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/usecase_du.cfg +++ /dev/null @@ -1,65 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -# 3301 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % -# TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 Avg: 36 % -# TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 Avg: 36 % - -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=21 # core id -ioWorker=0xE00000C00000 # mask [0- no workers] -dpdkMemorySize=8192 - -dpdkMemorySize=18432 -iovaMode=0 - -oXuNum=3 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./peak_o_du_tst376.dat #O-DU0 -oXuCfgFile1=./avg_o_du_tst377.dat #O-DU1 -oXuCfgFile2=./avg_o_du_tst377.dat #O-DU2 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 - -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_o_du.dat deleted file mode 100644 index d92540c..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_o_du.dat +++ /dev/null @@ -1,265 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak -#4% -#302 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 Peak: 4 % - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Component Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX antennas on DL UE side -UlLayersPerUe=1 #number of TX antennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#SlotNumTx0=./avg_txconfig_1.cfg -#SlotNumTx1=./avg_txconfig_1.cfg -#SlotNumTx2=./avg_txconfig_1.cfg -#SlotNumTx3=./avg_txconfig_2.cfg -#SlotNumTx4=./avg_txconfig_0.cfg - -#SlotNumTx5=./avg_txconfig_1.cfg -#SlotNumTx6=./avg_txconfig_1.cfg -#SlotNumTx7=./avg_txconfig_1.cfg -#SlotNumTx8=./avg_txconfig_2.cfg -#SlotNumTx9=./avg_txconfig_0.cfg - -#SlotNumRx0=./avg_rxconfig_0.cfg -#SlotNumRx1=./avg_rxconfig_0.cfg -#SlotNumRx2=./avg_rxconfig_0.cfg -#SlotNumRx3=./avg_rxconfig_2.cfg -#SlotNumRx4=./avg_rxconfig_1.cfg - -#SlotNumRx5=./avg_rxconfig_0.cfg -#SlotNumRx6=./avg_rxconfig_0.cfg -#SlotNumRx7=./avg_rxconfig_0.cfg -#SlotNumRx8=./avg_rxconfig_3.cfg -#SlotNumRx9=./avg_rxconfig_1.cfg - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=12 -max_sections_per_symbol=12 - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,5,0,0,9,1 - - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,5,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_o_du_tst377.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_o_du_tst377.dat deleted file mode 100644 index d92540c..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_o_du_tst377.dat +++ /dev/null @@ -1,265 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak -#4% -#302 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 Peak: 4 % - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Component Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX antennas on DL UE side -UlLayersPerUe=1 #number of TX antennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#SlotNumTx0=./avg_txconfig_1.cfg -#SlotNumTx1=./avg_txconfig_1.cfg -#SlotNumTx2=./avg_txconfig_1.cfg -#SlotNumTx3=./avg_txconfig_2.cfg -#SlotNumTx4=./avg_txconfig_0.cfg - -#SlotNumTx5=./avg_txconfig_1.cfg -#SlotNumTx6=./avg_txconfig_1.cfg -#SlotNumTx7=./avg_txconfig_1.cfg -#SlotNumTx8=./avg_txconfig_2.cfg -#SlotNumTx9=./avg_txconfig_0.cfg - -#SlotNumRx0=./avg_rxconfig_0.cfg -#SlotNumRx1=./avg_rxconfig_0.cfg -#SlotNumRx2=./avg_rxconfig_0.cfg -#SlotNumRx3=./avg_rxconfig_2.cfg -#SlotNumRx4=./avg_rxconfig_1.cfg - -#SlotNumRx5=./avg_rxconfig_0.cfg -#SlotNumRx6=./avg_rxconfig_0.cfg -#SlotNumRx7=./avg_rxconfig_0.cfg -#SlotNumRx8=./avg_rxconfig_3.cfg -#SlotNumRx9=./avg_rxconfig_1.cfg - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=12 -max_sections_per_symbol=12 - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,5,0,0,9,1 - - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,5,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_o_ru.dat deleted file mode 100644 index dfebe7c..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_o_ru.dat +++ /dev/null @@ -1,315 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak -#4% -#302 TDD DDDFU: S it's 10:2:2 1 64T64R 100 8 8 37% 100 1200 37% 100 1200 Peak: 4 % - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#SlotNumTx0=./avg_txconfig_1.cfg -#SlotNumTx1=./avg_txconfig_1.cfg -#SlotNumTx2=./avg_txconfig_1.cfg -#SlotNumTx3=./avg_txconfig_2.cfg -#SlotNumTx4=./avg_txconfig_0.cfg - -#SlotNumTx5=./avg_txconfig_1.cfg -#SlotNumTx6=./avg_txconfig_1.cfg -#SlotNumTx7=./avg_txconfig_1.cfg -#SlotNumTx8=./avg_txconfig_2.cfg -#SlotNumTx9=./avg_txconfig_0.cfg - -#SlotNumRx0=./avg_rxconfig_0.cfg -#SlotNumRx1=./avg_rxconfig_0.cfg -#SlotNumRx2=./avg_rxconfig_0.cfg -#SlotNumRx3=./avg_rxconfig_2.cfg -#SlotNumRx4=./avg_rxconfig_1.cfg - -#SlotNumRx5=./avg_rxconfig_0.cfg -#SlotNumRx6=./avg_rxconfig_0.cfg -#SlotNumRx7=./avg_rxconfig_0.cfg -#SlotNumRx8=./avg_rxconfig_3.cfg -#SlotNumRx9=./avg_rxconfig_1.cfg - - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=12 -max_sections_per_symbol=12 - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,5,0,0,9,1 - - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,5,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_o_ru_tst377.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_o_ru_tst377.dat deleted file mode 100644 index 6c70acc..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_o_ru_tst377.dat +++ /dev/null @@ -1,315 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak -#4% -#302 TDD DDDFU: S it's 10:2:2 1 64T64R 100 8 8 37% 100 1200 37% 100 1200 Peak: 4 % - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/uliq00_tst377.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/uliq01_tst377.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/uliq02_tst377.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/uliq03_tst377.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/uliq04_tst377.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/uliq05_tst377.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/uliq06_tst377.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/uliq07_tst377.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#SlotNumTx0=./avg_txconfig_1.cfg -#SlotNumTx1=./avg_txconfig_1.cfg -#SlotNumTx2=./avg_txconfig_1.cfg -#SlotNumTx3=./avg_txconfig_2.cfg -#SlotNumTx4=./avg_txconfig_0.cfg - -#SlotNumTx5=./avg_txconfig_1.cfg -#SlotNumTx6=./avg_txconfig_1.cfg -#SlotNumTx7=./avg_txconfig_1.cfg -#SlotNumTx8=./avg_txconfig_2.cfg -#SlotNumTx9=./avg_txconfig_0.cfg - -#SlotNumRx0=./avg_rxconfig_0.cfg -#SlotNumRx1=./avg_rxconfig_0.cfg -#SlotNumRx2=./avg_rxconfig_0.cfg -#SlotNumRx3=./avg_rxconfig_2.cfg -#SlotNumRx4=./avg_rxconfig_1.cfg - -#SlotNumRx5=./avg_rxconfig_0.cfg -#SlotNumRx6=./avg_rxconfig_0.cfg -#SlotNumRx7=./avg_rxconfig_0.cfg -#SlotNumRx8=./avg_rxconfig_3.cfg -#SlotNumRx9=./avg_rxconfig_1.cfg - - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=12 -max_sections_per_symbol=12 - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,5,0,0,9,1 - - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,5,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_rxconfig_0.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_rxconfig_0.cfg deleted file mode 100644 index 1143077..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_rxconfig_0.cfg +++ /dev/null @@ -1,31 +0,0 @@ -nPrbElemUl=4 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=10,4,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_rxconfig_1.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_rxconfig_1.cfg deleted file mode 100644 index 1143077..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_rxconfig_1.cfg +++ /dev/null @@ -1,31 +0,0 @@ -nPrbElemUl=4 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=10,4,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_rxconfig_2.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_rxconfig_2.cfg deleted file mode 100644 index 1143077..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_rxconfig_2.cfg +++ /dev/null @@ -1,31 +0,0 @@ -nPrbElemUl=4 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=10,4,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_rxconfig_3.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_rxconfig_3.cfg deleted file mode 100644 index 1143077..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_rxconfig_3.cfg +++ /dev/null @@ -1,31 +0,0 @@ -nPrbElemUl=4 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=10,4,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_txconfig_0.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_txconfig_0.cfg deleted file mode 100644 index 1f4514c..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_txconfig_0.cfg +++ /dev/null @@ -1,32 +0,0 @@ -nPrbElemDl=4 - -# 0-15 CCs S -PrbElemDlCCMask0=0f -PrbElemDlCCMask1=0f -PrbElemDlCCMask2=0f -PrbElemDlCCMask3=0f -PrbElemDlCCMask4=0f -PrbElemDlCCMask5=0f - -# 0-63 AntC -PrbElemDlAntCMask0=ffffffffffffffff -PrbElemDlAntCMask1=ffffffffffffffff -PrbElemDlAntCMask2=ffffffffffffffff -PrbElemDlAntCMask3=ffffffffffffffff -PrbElemDlAntCMask4=ffffffffffffffff -PrbElemDlAntCMask5=ffffffffffffffff - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=10,4,0,0,9,1 - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_txconfig_1.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_txconfig_1.cfg deleted file mode 100644 index 1f4514c..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_txconfig_1.cfg +++ /dev/null @@ -1,32 +0,0 @@ -nPrbElemDl=4 - -# 0-15 CCs S -PrbElemDlCCMask0=0f -PrbElemDlCCMask1=0f -PrbElemDlCCMask2=0f -PrbElemDlCCMask3=0f -PrbElemDlCCMask4=0f -PrbElemDlCCMask5=0f - -# 0-63 AntC -PrbElemDlAntCMask0=ffffffffffffffff -PrbElemDlAntCMask1=ffffffffffffffff -PrbElemDlAntCMask2=ffffffffffffffff -PrbElemDlAntCMask3=ffffffffffffffff -PrbElemDlAntCMask4=ffffffffffffffff -PrbElemDlAntCMask5=ffffffffffffffff - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=10,4,0,0,9,1 - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_txconfig_2.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_txconfig_2.cfg deleted file mode 100644 index 1f4514c..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/avg_txconfig_2.cfg +++ /dev/null @@ -1,32 +0,0 @@ -nPrbElemDl=4 - -# 0-15 CCs S -PrbElemDlCCMask0=0f -PrbElemDlCCMask1=0f -PrbElemDlCCMask2=0f -PrbElemDlCCMask3=0f -PrbElemDlCCMask4=0f -PrbElemDlCCMask5=0f - -# 0-63 AntC -PrbElemDlAntCMask0=ffffffffffffffff -PrbElemDlAntCMask1=ffffffffffffffff -PrbElemDlAntCMask2=ffffffffffffffff -PrbElemDlAntCMask3=ffffffffffffffff -PrbElemDlAntCMask4=ffffffffffffffff -PrbElemDlAntCMask5=ffffffffffffffff - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,34,0,14,3,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=10,4,0,0,9,1 - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/config_file_o_du.dat deleted file mode 100644 index 92c8e3d..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/config_file_o_du.dat +++ /dev/null @@ -1,223 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak: 100 % -#301 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -numSlots=10 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,48,0,14,3,1,1,9,1 -PrbElemDl4=192,48,0,14,4,1,1,9,1 -PrbElemDl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=12,4,0,0,9,1 -ExtBfwDl4=12,4,0,0,9,1 -ExtBfwDl5=11,3,0,0,9,1 - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,48,0,14,3,1,1,9,1 -PrbElemUl4=192,48,0,14,4,1,1,9,1 -PrbElemUl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=12,4,0,0,9,1 -ExtBfwUl4=12,4,0,0,9,1 -ExtBfwUl5=11,3,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/config_file_o_ru.dat deleted file mode 100644 index cb9411c..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/config_file_o_ru.dat +++ /dev/null @@ -1,274 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak: 100 % -#301 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=15 -# Eth 0 -duMac0=00:11:22:33:44:00 # asigned MAC of O-DU VF -duMac1=00:11:22:33:44:10 # asigned MAC of O-DU VF - -ruMac0=00:11:22:33:44:01 # O-RU VF for O-RU app -ruMac1=00:11:22:33:44:11 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:20 # asigned MAC of O-DU VF -duMac3=00:11:22:33:44:30 # asigned MAC of O-DU VF - -ruMac2=00:11:22:33:44:21 # O-RU VF for O-RU app -ruMac3=00:11:22:33:44:31 # O-RU VF for O-RU app - -# Eth 1 -duMac4=00:11:22:33:44:40 # asigned MAC of O-DU VF -duMac5=00:11:22:33:44:50 # asigned MAC of O-DU VF -ruMac4=00:11:22:33:44:41 # O-RU VF for O-RU app -ruMac5=00:11:22:33:44:51 # O-RU VF for O-RU app - - -numSlots=10 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - -#DL PRB / % Used RBs UL PRB / % Used RBs -#66% 180 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,48,0,14,3,1,1,9,1 -PrbElemDl4=192,48,0,14,4,1,1,9,1 -PrbElemDl5=240,33,0,14,5,1,1,9,1 - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,48,0,14,3,1,1,9,1 -PrbElemUl4=192,48,0,14,4,1,1,9,1 -PrbElemUl5=240,33,0,14,5,1,1,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_o_du.dat deleted file mode 100644 index a8238ac..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_o_du.dat +++ /dev/null @@ -1,305 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak: 100 % -#301 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#SlotNumTx0=./peak_txconfig_1.cfg -#SlotNumTx1=./peak_txconfig_1.cfg -#SlotNumTx2=./peak_txconfig_1.cfg -#SlotNumTx3=./peak_txconfig_2.cfg -#SlotNumTx4=./peak_txconfig_0.cfg - -#SlotNumTx5=./peak_txconfig_1.cfg -#SlotNumTx6=./peak_txconfig_1.cfg -#SlotNumTx7=./peak_txconfig_1.cfg -#SlotNumTx8=./peak_txconfig_2.cfg -#SlotNumTx9=./peak_txconfig_0.cfg - -#SlotNumRx0=./peak_rxconfig_0.cfg -#SlotNumRx1=./peak_rxconfig_0.cfg -#SlotNumRx2=./peak_rxconfig_0.cfg -#SlotNumRx3=./peak_rxconfig_2.cfg -#SlotNumRx4=./peak_rxconfig_1.cfg - -#SlotNumRx5=./peak_rxconfig_0.cfg -#SlotNumRx6=./peak_rxconfig_0.cfg -#SlotNumRx7=./peak_rxconfig_0.cfg -#SlotNumRx8=./peak_rxconfig_3.cfg -#SlotNumRx9=./peak_rxconfig_1.cfg - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=16 -max_sections_per_symbol=16 - -nPrbElemDl=16 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,18,0,14,5,1,1,9,1 -PrbElemDl6=108,18,0,14,6,1,1,9,1 -PrbElemDl7=126,18,0,14,7,1,1,9,1 -PrbElemDl8=144,18,0,14,8,1,1,9,1 -PrbElemDl9=162,18,0,14,9,1,1,9,1 -PrbElemDl10=180,18,0,14,10,1,1,9,1 -PrbElemDl11=198,18,0,14,11,1,1,9,1 -PrbElemDl12=216,18,0,14,12,1,1,9,1 -PrbElemDl13=234,18,0,14,13,1,1,9,1 -PrbElemDl14=252,18,0,14,14,1,1,9,1 -PrbElemDl15=270,3,0,14,15,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,9,0,0,9,1 -ExtBfwDl6=2,9,0,0,9,1 -ExtBfwDl7=2,9,0,0,9,1 -ExtBfwDl8=2,9,0,0,9,1 -ExtBfwDl9=2,9,0,0,9,1 -ExtBfwDl10=2,9,0,0,9,1 -ExtBfwDl11=2,9,0,0,9,1 -ExtBfwDl12=2,9,0,0,9,1 -ExtBfwDl13=2,9,0,0,9,1 -ExtBfwDl14=2,9,0,0,9,1 -ExtBfwDl15=2,2,0,0,9,1 - - -nPrbElemUl=16 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,18,0,14,5,1,1,9,1 -PrbElemUl6=108,18,0,14,6,1,1,9,1 -PrbElemUl7=126,18,0,14,7,1,1,9,1 -PrbElemUl8=144,18,0,14,8,1,1,9,1 -PrbElemUl9=162,18,0,14,9,1,1,9,1 -PrbElemUl10=180,18,0,14,10,1,1,9,1 -PrbElemUl11=198,18,0,14,11,1,1,9,1 -PrbElemUl12=216,18,0,14,12,1,1,9,1 -PrbElemUl13=234,18,0,14,13,1,1,9,1 -PrbElemUl14=252,18,0,14,14,1,1,9,1 -PrbElemUl15=270,3,0,14,15,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,9,0,0,9,1 -ExtBfwUl6=2,9,0,0,9,1 -ExtBfwUl7=2,9,0,0,9,1 -ExtBfwUl8=2,9,0,0,9,1 -ExtBfwUl9=2,9,0,0,9,1 -ExtBfwUl10=2,9,0,0,9,1 -ExtBfwUl11=2,9,0,0,9,1 -ExtBfwUl12=2,9,0,0,9,1 -ExtBfwUl13=2,9,0,0,9,1 -ExtBfwUl14=2,9,0,0,9,1 -ExtBfwUl15=2,2,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_o_du_tst376.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_o_du_tst376.dat deleted file mode 100644 index a8238ac..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_o_du_tst376.dat +++ /dev/null @@ -1,305 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak: 100 % -#301 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#SlotNumTx0=./peak_txconfig_1.cfg -#SlotNumTx1=./peak_txconfig_1.cfg -#SlotNumTx2=./peak_txconfig_1.cfg -#SlotNumTx3=./peak_txconfig_2.cfg -#SlotNumTx4=./peak_txconfig_0.cfg - -#SlotNumTx5=./peak_txconfig_1.cfg -#SlotNumTx6=./peak_txconfig_1.cfg -#SlotNumTx7=./peak_txconfig_1.cfg -#SlotNumTx8=./peak_txconfig_2.cfg -#SlotNumTx9=./peak_txconfig_0.cfg - -#SlotNumRx0=./peak_rxconfig_0.cfg -#SlotNumRx1=./peak_rxconfig_0.cfg -#SlotNumRx2=./peak_rxconfig_0.cfg -#SlotNumRx3=./peak_rxconfig_2.cfg -#SlotNumRx4=./peak_rxconfig_1.cfg - -#SlotNumRx5=./peak_rxconfig_0.cfg -#SlotNumRx6=./peak_rxconfig_0.cfg -#SlotNumRx7=./peak_rxconfig_0.cfg -#SlotNumRx8=./peak_rxconfig_3.cfg -#SlotNumRx9=./peak_rxconfig_1.cfg - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=16 -max_sections_per_symbol=16 - -nPrbElemDl=16 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,18,0,14,5,1,1,9,1 -PrbElemDl6=108,18,0,14,6,1,1,9,1 -PrbElemDl7=126,18,0,14,7,1,1,9,1 -PrbElemDl8=144,18,0,14,8,1,1,9,1 -PrbElemDl9=162,18,0,14,9,1,1,9,1 -PrbElemDl10=180,18,0,14,10,1,1,9,1 -PrbElemDl11=198,18,0,14,11,1,1,9,1 -PrbElemDl12=216,18,0,14,12,1,1,9,1 -PrbElemDl13=234,18,0,14,13,1,1,9,1 -PrbElemDl14=252,18,0,14,14,1,1,9,1 -PrbElemDl15=270,3,0,14,15,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,9,0,0,9,1 -ExtBfwDl6=2,9,0,0,9,1 -ExtBfwDl7=2,9,0,0,9,1 -ExtBfwDl8=2,9,0,0,9,1 -ExtBfwDl9=2,9,0,0,9,1 -ExtBfwDl10=2,9,0,0,9,1 -ExtBfwDl11=2,9,0,0,9,1 -ExtBfwDl12=2,9,0,0,9,1 -ExtBfwDl13=2,9,0,0,9,1 -ExtBfwDl14=2,9,0,0,9,1 -ExtBfwDl15=2,2,0,0,9,1 - - -nPrbElemUl=16 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,18,0,14,5,1,1,9,1 -PrbElemUl6=108,18,0,14,6,1,1,9,1 -PrbElemUl7=126,18,0,14,7,1,1,9,1 -PrbElemUl8=144,18,0,14,8,1,1,9,1 -PrbElemUl9=162,18,0,14,9,1,1,9,1 -PrbElemUl10=180,18,0,14,10,1,1,9,1 -PrbElemUl11=198,18,0,14,11,1,1,9,1 -PrbElemUl12=216,18,0,14,12,1,1,9,1 -PrbElemUl13=234,18,0,14,13,1,1,9,1 -PrbElemUl14=252,18,0,14,14,1,1,9,1 -PrbElemUl15=270,3,0,14,15,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,9,0,0,9,1 -ExtBfwUl6=2,9,0,0,9,1 -ExtBfwUl7=2,9,0,0,9,1 -ExtBfwUl8=2,9,0,0,9,1 -ExtBfwUl9=2,9,0,0,9,1 -ExtBfwUl10=2,9,0,0,9,1 -ExtBfwUl11=2,9,0,0,9,1 -ExtBfwUl12=2,9,0,0,9,1 -ExtBfwUl13=2,9,0,0,9,1 -ExtBfwUl14=2,9,0,0,9,1 -ExtBfwUl15=2,2,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_o_ru.dat deleted file mode 100644 index 01009ac..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_o_ru.dat +++ /dev/null @@ -1,353 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak: 100 % -#301 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - - - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#SlotNumTx0=./peak_txconfig_1.cfg -#SlotNumTx1=./peak_txconfig_1.cfg -#SlotNumTx2=./peak_txconfig_1.cfg -#SlotNumTx3=./peak_txconfig_2.cfg -#SlotNumTx4=./peak_txconfig_0.cfg - -#SlotNumTx5=./peak_txconfig_1.cfg -#SlotNumTx6=./peak_txconfig_1.cfg -#SlotNumTx7=./peak_txconfig_1.cfg -#SlotNumTx8=./peak_txconfig_2.cfg -#SlotNumTx9=./peak_txconfig_0.cfg - -#SlotNumRx0=./peak_rxconfig_0.cfg -#SlotNumRx1=./peak_rxconfig_0.cfg -#SlotNumRx2=./peak_rxconfig_0.cfg -#SlotNumRx3=./peak_rxconfig_2.cfg -#SlotNumRx4=./peak_rxconfig_1.cfg - -#SlotNumRx5=./peak_rxconfig_0.cfg -#SlotNumRx6=./peak_rxconfig_0.cfg -#SlotNumRx7=./peak_rxconfig_0.cfg -#SlotNumRx8=./peak_rxconfig_3.cfg -#SlotNumRx9=./peak_rxconfig_1.cfg - - - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=16 -max_sections_per_symbol=16 - -nPrbElemDl=16 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,18,0,14,5,1,1,9,1 -PrbElemDl6=108,18,0,14,6,1,1,9,1 -PrbElemDl7=126,18,0,14,7,1,1,9,1 -PrbElemDl8=144,18,0,14,8,1,1,9,1 -PrbElemDl9=162,18,0,14,9,1,1,9,1 -PrbElemDl10=180,18,0,14,10,1,1,9,1 -PrbElemDl11=198,18,0,14,11,1,1,9,1 -PrbElemDl12=216,18,0,14,12,1,1,9,1 -PrbElemDl13=234,18,0,14,13,1,1,9,1 -PrbElemDl14=252,18,0,14,14,1,1,9,1 -PrbElemDl15=270,3,0,14,15,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,9,0,0,9,1 -ExtBfwDl6=2,9,0,0,9,1 -ExtBfwDl7=2,9,0,0,9,1 -ExtBfwDl8=2,9,0,0,9,1 -ExtBfwDl9=2,9,0,0,9,1 -ExtBfwDl10=2,9,0,0,9,1 -ExtBfwDl11=2,9,0,0,9,1 -ExtBfwDl12=2,9,0,0,9,1 -ExtBfwDl13=2,9,0,0,9,1 -ExtBfwDl14=2,9,0,0,9,1 -ExtBfwDl15=2,2,0,0,9,1 - - -nPrbElemUl=16 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,18,0,14,5,1,1,9,1 -PrbElemUl6=108,18,0,14,6,1,1,9,1 -PrbElemUl7=126,18,0,14,7,1,1,9,1 -PrbElemUl8=144,18,0,14,8,1,1,9,1 -PrbElemUl9=162,18,0,14,9,1,1,9,1 -PrbElemUl10=180,18,0,14,10,1,1,9,1 -PrbElemUl11=198,18,0,14,11,1,1,9,1 -PrbElemUl12=216,18,0,14,12,1,1,9,1 -PrbElemUl13=234,18,0,14,13,1,1,9,1 -PrbElemUl14=252,18,0,14,14,1,1,9,1 -PrbElemUl15=270,3,0,14,15,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,9,0,0,9,1 -ExtBfwUl6=2,9,0,0,9,1 -ExtBfwUl7=2,9,0,0,9,1 -ExtBfwUl8=2,9,0,0,9,1 -ExtBfwUl9=2,9,0,0,9,1 -ExtBfwUl10=2,9,0,0,9,1 -ExtBfwUl11=2,9,0,0,9,1 -ExtBfwUl12=2,9,0,0,9,1 -ExtBfwUl13=2,9,0,0,9,1 -ExtBfwUl14=2,9,0,0,9,1 -ExtBfwUl15=2,2,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_o_ru_tst376.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_o_ru_tst376.dat deleted file mode 100644 index 9b3f143..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_o_ru_tst376.dat +++ /dev/null @@ -1,353 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak: 100 % -#301 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/uliq00_tst376.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/uliq01_tst376.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/uliq02_tst376.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/uliq03_tst376.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/uliq04_tst376.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/uliq05_tst376.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/uliq06_tst376.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/uliq07_tst376.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#SlotNumTx0=./peak_txconfig_1.cfg -#SlotNumTx1=./peak_txconfig_1.cfg -#SlotNumTx2=./peak_txconfig_1.cfg -#SlotNumTx3=./peak_txconfig_2.cfg -#SlotNumTx4=./peak_txconfig_0.cfg - -#SlotNumTx5=./peak_txconfig_1.cfg -#SlotNumTx6=./peak_txconfig_1.cfg -#SlotNumTx7=./peak_txconfig_1.cfg -#SlotNumTx8=./peak_txconfig_2.cfg -#SlotNumTx9=./peak_txconfig_0.cfg - -#SlotNumRx0=./peak_rxconfig_0.cfg -#SlotNumRx1=./peak_rxconfig_0.cfg -#SlotNumRx2=./peak_rxconfig_0.cfg -#SlotNumRx3=./peak_rxconfig_2.cfg -#SlotNumRx4=./peak_rxconfig_1.cfg - -#SlotNumRx5=./peak_rxconfig_0.cfg -#SlotNumRx6=./peak_rxconfig_0.cfg -#SlotNumRx7=./peak_rxconfig_0.cfg -#SlotNumRx8=./peak_rxconfig_3.cfg -#SlotNumRx9=./peak_rxconfig_1.cfg - - - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=16 -max_sections_per_symbol=16 - -nPrbElemDl=16 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,18,0,14,5,1,1,9,1 -PrbElemDl6=108,18,0,14,6,1,1,9,1 -PrbElemDl7=126,18,0,14,7,1,1,9,1 -PrbElemDl8=144,18,0,14,8,1,1,9,1 -PrbElemDl9=162,18,0,14,9,1,1,9,1 -PrbElemDl10=180,18,0,14,10,1,1,9,1 -PrbElemDl11=198,18,0,14,11,1,1,9,1 -PrbElemDl12=216,18,0,14,12,1,1,9,1 -PrbElemDl13=234,18,0,14,13,1,1,9,1 -PrbElemDl14=252,18,0,14,14,1,1,9,1 -PrbElemDl15=270,3,0,14,15,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,9,0,0,9,1 -ExtBfwDl6=2,9,0,0,9,1 -ExtBfwDl7=2,9,0,0,9,1 -ExtBfwDl8=2,9,0,0,9,1 -ExtBfwDl9=2,9,0,0,9,1 -ExtBfwDl10=2,9,0,0,9,1 -ExtBfwDl11=2,9,0,0,9,1 -ExtBfwDl12=2,9,0,0,9,1 -ExtBfwDl13=2,9,0,0,9,1 -ExtBfwDl14=2,9,0,0,9,1 -ExtBfwDl15=2,2,0,0,9,1 - - -nPrbElemUl=16 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,18,0,14,5,1,1,9,1 -PrbElemUl6=108,18,0,14,6,1,1,9,1 -PrbElemUl7=126,18,0,14,7,1,1,9,1 -PrbElemUl8=144,18,0,14,8,1,1,9,1 -PrbElemUl9=162,18,0,14,9,1,1,9,1 -PrbElemUl10=180,18,0,14,10,1,1,9,1 -PrbElemUl11=198,18,0,14,11,1,1,9,1 -PrbElemUl12=216,18,0,14,12,1,1,9,1 -PrbElemUl13=234,18,0,14,13,1,1,9,1 -PrbElemUl14=252,18,0,14,14,1,1,9,1 -PrbElemUl15=270,3,0,14,15,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,9,0,0,9,1 -ExtBfwUl6=2,9,0,0,9,1 -ExtBfwUl7=2,9,0,0,9,1 -ExtBfwUl8=2,9,0,0,9,1 -ExtBfwUl9=2,9,0,0,9,1 -ExtBfwUl10=2,9,0,0,9,1 -ExtBfwUl11=2,9,0,0,9,1 -ExtBfwUl12=2,9,0,0,9,1 -ExtBfwUl13=2,9,0,0,9,1 -ExtBfwUl14=2,9,0,0,9,1 -ExtBfwUl15=2,2,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_rxconfig_0.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_rxconfig_0.cfg deleted file mode 100644 index 41d084a..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_rxconfig_0.cfg +++ /dev/null @@ -1,34 +0,0 @@ -nPrbElemUl=6 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,48,0,14,3,1,1,9,1 -PrbElemUl4=192,48,0,14,4,1,1,9,1 -PrbElemUl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=12,4,0,0,9,1 -ExtBfwUl4=12,4,0,0,9,1 -ExtBfwUl5=11,3,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_rxconfig_1.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_rxconfig_1.cfg deleted file mode 100644 index 41d084a..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_rxconfig_1.cfg +++ /dev/null @@ -1,34 +0,0 @@ -nPrbElemUl=6 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,48,0,14,3,1,1,9,1 -PrbElemUl4=192,48,0,14,4,1,1,9,1 -PrbElemUl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=12,4,0,0,9,1 -ExtBfwUl4=12,4,0,0,9,1 -ExtBfwUl5=11,3,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_rxconfig_2.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_rxconfig_2.cfg deleted file mode 100644 index 41d084a..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_rxconfig_2.cfg +++ /dev/null @@ -1,34 +0,0 @@ -nPrbElemUl=6 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,48,0,14,3,1,1,9,1 -PrbElemUl4=192,48,0,14,4,1,1,9,1 -PrbElemUl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=12,4,0,0,9,1 -ExtBfwUl4=12,4,0,0,9,1 -ExtBfwUl5=11,3,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_rxconfig_3.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_rxconfig_3.cfg deleted file mode 100644 index 41d084a..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_rxconfig_3.cfg +++ /dev/null @@ -1,34 +0,0 @@ -nPrbElemUl=6 - -# 0-15 CCs -PrbElemUlCCMask0=0f -PrbElemUlCCMask1=0f -PrbElemUlCCMask2=0f -PrbElemUlCCMask3=0f -PrbElemUlCCMask4=0f -PrbElemUlCCMask5=0f - -# 0-63 AntC -PrbElemUlAntCMask0=ffffffffffffffff -PrbElemUlAntCMask1=ffffffffffffffff -PrbElemUlAntCMask2=ffffffffffffffff -PrbElemUlAntCMask3=ffffffffffffffff -PrbElemUlAntCMask4=ffffffffffffffff -PrbElemUlAntCMask5=ffffffffffffffff - -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,48,0,14,3,1,1,9,1 -PrbElemUl4=192,48,0,14,4,1,1,9,1 -PrbElemUl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=12,4,0,0,9,1 -ExtBfwUl1=12,4,0,0,9,1 -ExtBfwUl2=12,4,0,0,9,1 -ExtBfwUl3=12,4,0,0,9,1 -ExtBfwUl4=12,4,0,0,9,1 -ExtBfwUl5=11,3,0,0,9,1 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_txconfig_0.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_txconfig_0.cfg deleted file mode 100644 index b705198..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_txconfig_0.cfg +++ /dev/null @@ -1,35 +0,0 @@ -nPrbElemDl=6 - -# 0-15 CCs S -PrbElemDlCCMask0=0f -PrbElemDlCCMask1=0f -PrbElemDlCCMask2=0f -PrbElemDlCCMask3=0f -PrbElemDlCCMask4=0f -PrbElemDlCCMask5=0f - -# 0-63 AntC -PrbElemDlAntCMask0=ffffffffffffffff -PrbElemDlAntCMask1=ffffffffffffffff -PrbElemDlAntCMask2=ffffffffffffffff -PrbElemDlAntCMask3=ffffffffffffffff -PrbElemDlAntCMask4=ffffffffffffffff -PrbElemDlAntCMask5=ffffffffffffffff - -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,48,0,14,3,1,1,9,1 -PrbElemDl4=192,48,0,14,4,1,1,9,1 -PrbElemDl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=12,4,0,0,9,1 -ExtBfwDl4=12,4,0,0,9,1 -ExtBfwDl5=11,3,0,0,9,1 - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_txconfig_1.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_txconfig_1.cfg deleted file mode 100644 index 9359005..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_txconfig_1.cfg +++ /dev/null @@ -1,35 +0,0 @@ -nPrbElemDl=6 - -# 0-15 CCs -PrbElemDlCCMask0=0f -PrbElemDlCCMask1=0f -PrbElemDlCCMask2=0f -PrbElemDlCCMask3=0f -PrbElemDlCCMask4=0f -PrbElemDlCCMask5=0f - -# 0-63 AntC -PrbElemDlAntCMask0=ffffffffffffffff -PrbElemDlAntCMask1=ffffffffffffffff -PrbElemDlAntCMask2=ffffffffffffffff -PrbElemDlAntCMask3=ffffffffffffffff -PrbElemDlAntCMask4=ffffffffffffffff -PrbElemDlAntCMask5=ffffffffffffffff - -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,48,0,14,3,1,1,9,1 -PrbElemDl4=192,48,0,14,4,1,1,9,1 -PrbElemDl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=12,4,0,0,9,1 -ExtBfwDl4=12,4,0,0,9,1 -ExtBfwDl5=11,3,0,0,9,1 - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_txconfig_2.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_txconfig_2.cfg deleted file mode 100644 index 6184512..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/peak_txconfig_2.cfg +++ /dev/null @@ -1,36 +0,0 @@ -nPrbElemDl=6 - -# 0-15 CCs -PrbElemDlCCMask0=0f -PrbElemDlCCMask1=0f -PrbElemDlCCMask2=0f -PrbElemDlCCMask3=0f -PrbElemDlCCMask4=0f -PrbElemDlCCMask5=0f - -# 0-63 AntC -PrbElemDlAntCMask0=ffffffffffffffff -PrbElemDlAntCMask1=ffffffffffffffff -PrbElemDlAntCMask2=ffffffffffffffff -PrbElemDlAntCMask3=ffffffffffffffff -PrbElemDlAntCMask4=ffffffffffffffff -PrbElemDlAntCMask5=ffffffffffffffff - - -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,48,0,14,3,1,1,9,1 -PrbElemDl4=192,48,0,14,4,1,1,9,1 -PrbElemDl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=12,4,0,0,9,1 -ExtBfwDl1=12,4,0,0,9,1 -ExtBfwDl2=12,4,0,0,9,1 -ExtBfwDl3=12,4,0,0,9,1 -ExtBfwDl4=12,4,0,0,9,1 -ExtBfwDl5=11,3,0,0,9,1 - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/usecase_du.cfg deleted file mode 100644 index fff013d..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/usecase_du.cfg +++ /dev/null @@ -1,64 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -# 3301 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % -# TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 Avg: 36 % -# TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 Avg: 36 % - -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=22 # core id -ioWorker=0xE00000C00000 # mask [0- no workers] - -dpdkMemorySize=18432 -iovaMode=0 - -oXuNum=3 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./peak_o_du_tst376.dat #O-DU0 -oXuCfgFile1=./avg_o_du_tst377.dat #O-DU1 -oXuCfgFile2=./avg_o_du_tst377.dat #O-DU2 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 - -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/usecase_ru.cfg deleted file mode 100644 index 84cdcc2..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/usecase_ru.cfg +++ /dev/null @@ -1,62 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -# 3501 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % -# TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 Avg: 36 % -# TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 Avg: 36 % - -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -mainCore=0 #core for main() -systemCore=2 -ioCore=8 # core id -ioWorker=0x3E00 # second socket - -dpdkMemorySize=18432 -iovaMode=0 - -oXuNum=3 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./peak_o_ru_tst376.dat #O-RU0 -oXuCfgFile1=./avg_o_ru_tst377.dat #O-RU1 -oXuCfgFile2=./avg_o_ru_tst377.dat #O-RU2 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/usecase_ru_csx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/usecase_ru_csx.cfg deleted file mode 100644 index 8ee5ce3..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3531/usecase_ru_csx.cfg +++ /dev/null @@ -1,61 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -mainCore=20 #core for main() -systemCore=22 -ioCore=28 # core id -#ioWorker=0x800000000 # mask [0- no workers] -#ioWorker=0x800004000 # mask [0- no workers] -#ioWorker=0xc000000 # second socket -ioWorker=0x3E0000000 # second socket - -dpdkMemorySize=16384 -iovaMode=0 - -oXuNum=3 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./peak_o_ru_tst376.dat #O-RU0 -oXuCfgFile1=./avg_o_ru_tst377.dat #O-RU1 -oXuCfgFile2=./avg_o_ru_tst377.dat #O-RU2 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/384/peak_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/384/peak_o_du.dat new file mode 100644 index 0000000..9c57748 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/384/peak_o_du.dat @@ -0,0 +1,253 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +#Peak: 100 % +#384 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % + + + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU(0) | O-RU(1) +xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) +antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B +antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B +antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R + +#UEs +muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources +DlLayersPerUe=1 #number of RX anntennas on DL UE side +UlLayersPerUe=1 #number of TX anntennas on UL UE side + + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 +antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 +antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 +antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 +antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 +antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 +antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 +#antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 +#antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 +#antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 +#antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 +#antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 +#antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 +#antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 + +#SlotNumTx0=./peak_txconfig_1.cfg +#SlotNumTx1=./peak_txconfig_1.cfg +#SlotNumTx2=./peak_txconfig_1.cfg +#SlotNumTx3=./peak_txconfig_2.cfg +#SlotNumTx4=./peak_txconfig_0.cfg + +#SlotNumTx5=./peak_txconfig_1.cfg +#SlotNumTx6=./peak_txconfig_1.cfg +#SlotNumTx7=./peak_txconfig_1.cfg +#SlotNumTx8=./peak_txconfig_2.cfg +#SlotNumTx9=./peak_txconfig_0.cfg + +#SlotNumRx0=./peak_rxconfig_0.cfg +#SlotNumRx1=./peak_rxconfig_0.cfg +#SlotNumRx2=./peak_rxconfig_0.cfg +#SlotNumRx3=./peak_rxconfig_2.cfg +#SlotNumRx4=./peak_rxconfig_1.cfg + +#SlotNumRx5=./peak_rxconfig_0.cfg +#SlotNumRx6=./peak_rxconfig_0.cfg +#SlotNumRx7=./peak_rxconfig_0.cfg +#SlotNumRx8=./peak_rxconfig_3.cfg +#SlotNumRx9=./peak_rxconfig_1.cfg + +#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] +DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] + +#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] +UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] + + +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=189 + +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +extType=1 + +nPrbElemDl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,48,0,14,0,1,1,9,1 +PrbElemDl1=48,48,0,14,1,1,1,9,1 +PrbElemDl2=96,48,0,14,2,1,1,9,1 +PrbElemDl3=144,48,0,14,3,1,1,9,1 +PrbElemDl4=192,48,0,14,4,1,1,9,1 +PrbElemDl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,24,0,0,9,1,1 +ExtBfwDl1=2,24,0,0,9,1,1 +ExtBfwDl2=2,24,0,0,9,1,1 +ExtBfwDl3=2,24,0,0,9,1,1 +ExtBfwDl4=2,24,0,0,9,1,1 +ExtBfwDl5=2,17,0,0,9,1,1 + +nPrbElemUl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,48,0,14,0,1,1,9,1 +PrbElemUl1=48,48,0,14,1,1,1,9,1 +PrbElemUl2=96,48,0,14,2,1,1,9,1 +PrbElemUl3=144,48,0,14,3,1,1,9,1 +PrbElemUl4=192,48,0,14,4,1,1,9,1 +PrbElemUl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,24,0,0,9,1,1 +ExtBfwUl1=2,24,0,0,9,1,1 +ExtBfwUl2=2,24,0,0,9,1,1 +ExtBfwUl3=2,24,0,0,9,1,1 +ExtBfwUl4=2,24,0,0,9,1,1 +ExtBfwUl5=2,17,0,0,9,1,1 + +nPrbElemSrs=1 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order +compression=1 # (1) compression enabled (0) compression disabled + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +Tadv_cp_dl=25 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=285 # 285.42us +T2a_max_cp_dl=429 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=285 # 285.42us +T2a_max_cp_ul=429 # 428.12us + +#Reception Window U-plane +T2a_min_up=71 # 71.35in us +T2a_max_up=428 # 428.12us + +#Transmission Window +Ta3_min=20 # in us +Ta3_max=32 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=285 +T1a_max_cp_dl=429 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=300 + +#U-plane +##Transmission Window +T1a_min_up=96 #71 + 25 us +T1a_max_up=196 #71 + 25 us + +#Reception Window +Ta4_min=0 # in us +Ta4_max=75 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/384/peak_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/384/peak_o_ru.dat new file mode 100644 index 0000000..6e004aa --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/384/peak_o_ru.dat @@ -0,0 +1,303 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +#Peak: 100 % +#384 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % + + + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) +antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B +antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B +antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R + +#UEs +muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources +DlLayersPerUe=1 #number of RX anntennas on DL UE side +UlLayersPerUe=1 #number of TX anntennas on UL UE side + + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 +antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 +antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 +antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 +antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 +antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 +antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 +#antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 +#antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 +#antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 +#antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 +#antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 +#antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 +#antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 + +#SlotNumTx0=./peak_txconfig_1.cfg +#SlotNumTx1=./peak_txconfig_1.cfg +#SlotNumTx2=./peak_txconfig_1.cfg +#SlotNumTx3=./peak_txconfig_2.cfg +#SlotNumTx4=./peak_txconfig_0.cfg + +#SlotNumTx5=./peak_txconfig_1.cfg +#SlotNumTx6=./peak_txconfig_1.cfg +#SlotNumTx7=./peak_txconfig_1.cfg +#SlotNumTx8=./peak_txconfig_2.cfg +#SlotNumTx9=./peak_txconfig_0.cfg + +#SlotNumRx0=./peak_rxconfig_0.cfg +#SlotNumRx1=./peak_rxconfig_0.cfg +#SlotNumRx2=./peak_rxconfig_0.cfg +#SlotNumRx3=./peak_rxconfig_2.cfg +#SlotNumRx4=./peak_rxconfig_1.cfg + +#SlotNumRx5=./peak_rxconfig_0.cfg +#SlotNumRx6=./peak_rxconfig_0.cfg +#SlotNumRx7=./peak_rxconfig_0.cfg +#SlotNumRx8=./peak_rxconfig_3.cfg +#SlotNumRx9=./peak_rxconfig_1.cfg + + +#TODO: +antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 +antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 +antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 +antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 +antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 +antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 +antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 +antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 +#antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 +#antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 +#antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 +#antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 +#antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 +#antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 +#antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 + +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=189 + +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) + +antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin +antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin +antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin +antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin + +#DL PRB / % Used RBs UL PRB / % Used RBs +#66% 180 33% 90 + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +extType=1 + +nPrbElemDl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,48,0,14,0,1,1,9,1 +PrbElemDl1=48,48,0,14,1,1,1,9,1 +PrbElemDl2=96,48,0,14,2,1,1,9,1 +PrbElemDl3=144,48,0,14,3,1,1,9,1 +PrbElemDl4=192,48,0,14,4,1,1,9,1 +PrbElemDl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,24,0,0,9,1,1 +ExtBfwDl1=2,24,0,0,9,1,1 +ExtBfwDl2=2,24,0,0,9,1,1 +ExtBfwDl3=2,24,0,0,9,1,1 +ExtBfwDl4=2,24,0,0,9,1,1 +ExtBfwDl5=2,17,0,0,9,1,1 + +nPrbElemUl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,48,0,14,0,1,1,9,1 +PrbElemUl1=48,48,0,14,1,1,1,9,1 +PrbElemUl2=96,48,0,14,2,1,1,9,1 +PrbElemUl3=144,48,0,14,3,1,1,9,1 +PrbElemUl4=192,48,0,14,4,1,1,9,1 +PrbElemUl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,24,0,0,9,1,1 +ExtBfwUl1=2,24,0,0,9,1,1 +ExtBfwUl2=2,24,0,0,9,1,1 +ExtBfwUl3=2,24,0,0,9,1,1 +ExtBfwUl4=2,24,0,0,9,1,1 +ExtBfwUl5=2,17,0,0,9,1,1 + +nPrbElemSrs=1 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order +compression=1 # (1) compression enabled (0) compression disabled + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +Tadv_cp_dl=25 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=285 # 285.42us +T2a_max_cp_dl=429 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=285 # 285.42us +T2a_max_cp_ul=429 # 428.12us + +#Reception Window U-plane +T2a_min_up=71 # 71.35in us +T2a_max_up=428 # 428.12us + +#Transmission Window +Ta3_min=20 # in us +Ta3_max=32 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=285 +T1a_max_cp_dl=429 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=300 + +#U-plane +##Transmission Window +T1a_min_up=96 #71 + 25 us +T1a_max_up=196 #71 + 25 us + +#Reception Window +Ta4_min=0 # in us +Ta4_max=75 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/usecase_du_csx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/384/usecase_du.cfg similarity index 92% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/usecase_du_csx.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/384/usecase_du.cfg index 4d9f87d..a50bbe2 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/usecase_du_csx.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/384/usecase_du.cfg @@ -15,6 +15,7 @@ # limitations under the License. # #******************************************************************************/ + # This is simple configuration file. Use '#' sign for comments appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system @@ -24,7 +25,7 @@ systemCore=22 ioCore=28 # core id #ioWorker=0x000000000 # mask [0- no workers] #ioWorker=0x8000040000 # mask [0- no workers] -ioWorker=0x1E0000000 # mask [0- no workers] +ioWorker=0x060000000 # mask [0- no workers] #ioWorker=0x700000600 dpdkMemorySize=16384 @@ -36,9 +37,9 @@ oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs -oXuCfgFile0=./peak_o_du_tst376.dat #O-DU0 -oXuCfgFile1=./avg_o_du_tst377.dat #O-DU1 -oXuCfgFile2=./avg_o_du_tst377.dat #O-DU2 +oXuCfgFile0=./peak_o_du.dat #O-DU0 +oXuCfgFile1=./peak_o_du.dat #O-DU1 +oXuCfgFile2=./peak_o_du.dat #O-DU2 # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:01 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/511/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/384/usecase_du_icx.cfg similarity index 89% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/511/usecase_du_icx.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/384/usecase_du_icx.cfg index 2732d63..9210c6f 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/511/usecase_du_icx.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/384/usecase_du_icx.cfg @@ -15,25 +15,29 @@ # limitations under the License. # #******************************************************************************/ + # This is simple configuration file. Use '#' sign for comments appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system mainCore=0 #core for main() systemCore=2 -ioCore=21 # core id -ioWorker=0xE00000C00000 # mask [0- no workers] +ioCore=8 # core id + +ioWorker=0x200 # mask [0- no workers] + dpdkMemorySize=16384 -#8192 iovaMode=0 -oXuNum=1 # numbers of O-RU connected to O-DU +oXuNum=3 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs -oXuCfgFile0=./config_file_o_du.dat #O-RU0 +oXuCfgFile0=./peak_o_du.dat #O-DU0 +oXuCfgFile1=./peak_o_du.dat #O-DU1 +oXuCfgFile2=./peak_o_du.dat #O-DU2 # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:01 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/usecase_ru_csx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/384/usecase_ru.cfg similarity index 89% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/usecase_ru_csx.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/384/usecase_ru.cfg index 8ee5ce3..e6f4789 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3301/usecase_ru_csx.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/384/usecase_ru.cfg @@ -15,16 +15,18 @@ # limitations under the License. # #******************************************************************************/ + # This is simple configuration file. Use '#' sign for comments + appMode=1 # All O-DU(0) | O-RU(1) instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -mainCore=20 #core for main() -systemCore=22 -ioCore=28 # core id +mainCore=0 #core for main() +systemCore=2 +ioCore=8 # core id #ioWorker=0x800000000 # mask [0- no workers] #ioWorker=0x800004000 # mask [0- no workers] #ioWorker=0xc000000 # second socket -ioWorker=0x3E0000000 # second socket +ioWorker=0x3E00 # second socket dpdkMemorySize=16384 iovaMode=0 @@ -35,9 +37,9 @@ oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs -oXuCfgFile0=./peak_o_ru_tst376.dat #O-RU0 -oXuCfgFile1=./avg_o_ru_tst377.dat #O-RU1 -oXuCfgFile2=./avg_o_ru_tst377.dat #O-RU2 +oXuCfgFile0=./peak_o_ru.dat #O-RU0 +oXuCfgFile1=./peak_o_ru.dat #O-RU1 +oXuCfgFile2=./peak_o_ru.dat #O-RU2 # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:00 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/384/usecase_ru_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/384/usecase_ru_icx.cfg new file mode 100644 index 0000000..51dacfe --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/384/usecase_ru_icx.cfg @@ -0,0 +1,61 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments + +appMode=1 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +mainCore=0 #core for main() +systemCore=2 +ioCore=8 # core id + +ioWorker=0x3E00 # second socket + +dpdkMemorySize=16384 +iovaMode=0 + +oXuNum=3 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./peak_o_ru.dat #O-RU0 +oXuCfgFile1=./peak_o_ru.dat #O-RU1 +oXuCfgFile2=./peak_o_ru.dat #O-RU2 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:00 +oXuRem0Mac1=00:11:22:33:00:10 +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:20 +oXuRem0Mac3=00:11:22:33:00:30 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:00 +oXuRem1Mac1=00:11:22:33:01:10 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:20 +oXuRem1Mac3=00:11:22:33:01:30 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:00 +oXuRem2Mac1=00:11:22:33:02:10 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:20 +oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/4/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/4/config_file_o_du.dat deleted file mode 100644 index d74a2d3..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/4/config_file_o_du.dat +++ /dev/null @@ -1,223 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=2 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] -ioSleep=1 - -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=0 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,1,1,1,9,1 -PrbElemDl1=48,48,0,14,2,1,1,9,1 -PrbElemDl2=96,48,0,14,3,1,1,9,1 -PrbElemDl3=144,48,0,14,4,1,1,9,1 -PrbElemDl4=144,36,0,14,5,1,1,9,1 -PrbElemDl5=180,36,0,14,6,1,1,9,1 -PrbElemDl6=216,36,0,14,7,1,1,9,1 -PrbElemDl7=252,21,0,14,8,1,1,9,1 -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,1,1,1,9,1 -PrbElemUl1=48,48,0,14,2,1,1,9,1 -PrbElemUl2=72,36,0,14,3,1,1,9,1 -PrbElemUl3=108,36,0,14,4,1,1,9,1 -PrbElemUl4=144,36,0,14,5,1,1,9,1 -PrbElemUl5=180,36,0,14,6,1,1,9,1 -PrbElemUl6=216,36,0,14,7,1,1,9,1 -PrbElemUl7=252,21,0,14,8,1,1,9,1 -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/4/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/4/config_file_o_ru.dat deleted file mode 100644 index 5020c29..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/4/config_file_o_ru.dat +++ /dev/null @@ -1,260 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=2 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=15 -ioWorker=0x800000000 -ioSleep=1 - -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=0 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=4 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,1,1,1,9,1 -PrbElemDl1=48,48,0,14,2,1,1,9,1 -PrbElemDl2=96,48,0,14,3,1,1,9,1 -PrbElemDl3=144,48,0,14,4,1,1,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,1,1,1,9,1 -PrbElemUl1=48,48,0,14,2,1,1,9,1 -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=32 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/4/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/4/usecase_du.cfg deleted file mode 100644 index 5c067f4..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/4/usecase_du.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:01.0 -#PciBusAddoXu0Vf1=0000:51:01.1 -#PciBusAddoXu0Vf2=0000:51:01.2 -#PciBusAddoXu0Vf3=0000:51:01.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:01.4 -#PciBusAddoXu1Vf1=0000:51:01.5 -#PciBusAddoXu1Vf2=0000:51:01.6 -#PciBusAddoXu1Vf3=0000:51:01.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:02.0 -#PciBusAddoXu2Vf1=0000:51:02.1 -#PciBusAddoXu2Vf2=0000:51:02.2 -#PciBusAddoXu2Vf3=0000:51:02.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/4/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/4/usecase_ru.cfg deleted file mode 100644 index 1ab0180..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/4/usecase_ru.cfg +++ /dev/null @@ -1,68 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -ioCore=15 # core id -ioWorker=0x800000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) - -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 - -#O-XU 0 -#PciBusAddoXu0Vf0=0000:51:11.0 -#PciBusAddoXu0Vf1=0000:51:11.1 -#PciBusAddoXu0Vf2=0000:51:11.2 -#PciBusAddoXu0Vf3=0000:51:11.3 - -#O-XU 1 -#PciBusAddoXu1Vf0=0000:51:11.4 -#PciBusAddoXu1Vf1=0000:51:11.5 -#PciBusAddoXu1Vf2=0000:51:11.6 -#PciBusAddoXu1Vf3=0000:51:11.7 - -#O-XU 2 -#PciBusAddoXu2Vf0=0000:51:12.0 -#PciBusAddoXu2Vf1=0000:51:12.1 -#PciBusAddoXu2Vf2=0000:51:12.2 -#PciBusAddoXu2Vf3=0000:51:12.3 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/401/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/401/config_file_o_du.dat index 70e39b3..72f078e 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/401/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/401/config_file_o_du.dat @@ -140,11 +140,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -174,6 +177,9 @@ ExtBfwUl0=2,64,0,0,9,1 ExtBfwUl1=2,64,0,0,9,1 ExtBfwUl2=2,9,0,0,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/401/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/401/config_file_o_ru.dat index a5c9062..39b8149 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/401/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/401/config_file_o_ru.dat @@ -118,11 +118,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +rsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -210,6 +213,9 @@ PrbElemUl0=0,128,0,14,0,1,1,9,1 PrbElemUl1=128,128,0,14,1,1,1,9,1 PrbElemUl2=256,17,0,14,2,1,1,9,1 +nPrbElemSrs=1 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/411/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/411/config_file_o_du.dat deleted file mode 100644 index eefdbe7..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/411/config_file_o_du.dat +++ /dev/null @@ -1,232 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak: 100 % -#301 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -# Eth 0 -duMac0=00:11:22:33:44:00 # asigned MAC of O-DU VF -duMac1=00:11:22:33:44:10 # asigned MAC of O-DU VF - -ruMac0=00:11:22:33:44:01 # O-RU VF for O-RU app -ruMac1=00:11:22:33:44:11 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:20 # asigned MAC of O-DU VF -duMac3=00:11:22:33:44:30 # asigned MAC of O-DU VF - -ruMac2=00:11:22:33:44:21 # O-RU VF for O-RU app -ruMac3=00:11:22:33:44:31 # O-RU VF for O-RU app - -# Eth 1 -duMac4=00:11:22:33:44:40 # asigned MAC of O-DU VF -duMac5=00:11:22:33:44:50 # asigned MAC of O-DU VF -ruMac4=00:11:22:33:44:41 # O-RU VF for O-RU app -ruMac5=00:11:22:33:44:51 # O-RU VF for O-RU app - - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=3 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,128,0,14,0,1,1,9,1 -PrbElemDl1=128,128,0,14,1,1,1,9,1 -PrbElemDl2=256,17,0,14,2,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,64,0,0,9,1 -ExtBfwDl1=2,64,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 - -nPrbElemUl=3 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,128,0,14,0,1,1,9,1 -PrbElemUl1=128,128,0,14,1,1,1,9,1 -PrbElemUl2=256,17,0,14,2,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,64,0,0,9,1 -ExtBfwUl1=2,64,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/442/peak_o_du_tst376.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/442/peak_o_du_tst376.dat new file mode 100644 index 0000000..b91d4ae --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/442/peak_o_du_tst376.dat @@ -0,0 +1,237 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +#Peak: 100 % +#301 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU(0) | O-RU(1) +xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B +antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B +antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R + +#UEs +muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources +DlLayersPerUe=1 #number of RX anntennas on DL UE side +UlLayersPerUe=1 #number of TX anntennas on UL UE side + + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 +antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 +antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 + +#SlotNumTx0=./peak_txconfig_1.cfg +#SlotNumTx1=./peak_txconfig_1.cfg +#SlotNumTx2=./peak_txconfig_1.cfg +#SlotNumTx3=./peak_txconfig_2.cfg +#SlotNumTx4=./peak_txconfig_0.cfg + +#SlotNumTx5=./peak_txconfig_1.cfg +#SlotNumTx6=./peak_txconfig_1.cfg +#SlotNumTx7=./peak_txconfig_1.cfg +#SlotNumTx8=./peak_txconfig_2.cfg +#SlotNumTx9=./peak_txconfig_0.cfg + +#SlotNumRx0=./peak_rxconfig_0.cfg +#SlotNumRx1=./peak_rxconfig_0.cfg +#SlotNumRx2=./peak_rxconfig_0.cfg +#SlotNumRx3=./peak_rxconfig_2.cfg +#SlotNumRx4=./peak_rxconfig_1.cfg + +#SlotNumRx5=./peak_rxconfig_0.cfg +#SlotNumRx6=./peak_rxconfig_0.cfg +#SlotNumRx7=./peak_rxconfig_0.cfg +#SlotNumRx8=./peak_rxconfig_3.cfg +#SlotNumRx9=./peak_rxconfig_1.cfg + +#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] +DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] + +#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] +UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] + + +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=189 + +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used +extType=1 +nPrbElemDl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,48,0,14,0,1,1,9,1 +PrbElemDl1=48,48,0,14,1,1,1,9,1 +PrbElemDl2=96,48,0,14,2,1,1,9,1 +PrbElemDl3=144,48,0,14,3,1,1,9,1 +PrbElemDl4=192,48,0,14,4,1,1,9,1 +PrbElemDl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,24,0,0,9,1,1 +ExtBfwDl1=2,24,0,0,9,1,1 +ExtBfwDl2=2,24,0,0,9,1,1 +ExtBfwDl3=2,24,0,0,9,1,1 +ExtBfwDl4=2,24,0,0,9,1,1 +ExtBfwDl5=2,17,0,0,9,1,1 + +nPrbElemUl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,48,0,14,0,1,1,9,1 +PrbElemUl1=48,48,0,14,1,1,1,9,1 +PrbElemUl2=96,48,0,14,2,1,1,9,1 +PrbElemUl3=144,48,0,14,3,1,1,9,1 +PrbElemUl4=192,48,0,14,4,1,1,9,1 +PrbElemUl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,24,0,0,9,1,1 +ExtBfwUl1=2,24,0,0,9,1,1 +ExtBfwUl2=2,24,0,0,9,1,1 +ExtBfwUl3=2,24,0,0,9,1,1 +ExtBfwUl4=2,24,0,0,9,1,1 +ExtBfwUl5=2,17,0,0,9,1,1 + +nPrbElemSrs=1 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order +compression=1 # (1) compression enabled (0) compression disabled + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +Tadv_cp_dl=25 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=285 # 285.42us +T2a_max_cp_dl=429 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=285 # 285.42us +T2a_max_cp_ul=429 # 428.12us + +#Reception Window U-plane +T2a_min_up=71 # 71.35in us +T2a_max_up=428 # 428.12us + +#Transmission Window +Ta3_min=20 # in us +Ta3_max=32 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=285 +T1a_max_cp_dl=429 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=300 + +#U-plane +##Transmission Window +T1a_min_up=96 #71 + 25 us +T1a_max_up=196 #71 + 25 us + +#Reception Window +Ta4_min=0 # in us +Ta4_max=75 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/442/peak_o_ru_tst376.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/442/peak_o_ru_tst376.dat new file mode 100644 index 0000000..d4a6e0a --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/442/peak_o_ru_tst376.dat @@ -0,0 +1,287 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +#Peak: 100 % +#301 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % + + + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B +antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B +antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R + +#UEs +muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources +DlLayersPerUe=1 #number of RX anntennas on DL UE side +UlLayersPerUe=1 #number of TX anntennas on UL UE side + + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 +antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 +antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 + +#SlotNumTx0=./peak_txconfig_1.cfg +#SlotNumTx1=./peak_txconfig_1.cfg +#SlotNumTx2=./peak_txconfig_1.cfg +#SlotNumTx3=./peak_txconfig_2.cfg +#SlotNumTx4=./peak_txconfig_0.cfg + +#SlotNumTx5=./peak_txconfig_1.cfg +#SlotNumTx6=./peak_txconfig_1.cfg +#SlotNumTx7=./peak_txconfig_1.cfg +#SlotNumTx8=./peak_txconfig_2.cfg +#SlotNumTx9=./peak_txconfig_0.cfg + +#SlotNumRx0=./peak_rxconfig_0.cfg +#SlotNumRx1=./peak_rxconfig_0.cfg +#SlotNumRx2=./peak_rxconfig_0.cfg +#SlotNumRx3=./peak_rxconfig_2.cfg +#SlotNumRx4=./peak_rxconfig_1.cfg + +#SlotNumRx5=./peak_rxconfig_0.cfg +#SlotNumRx6=./peak_rxconfig_0.cfg +#SlotNumRx7=./peak_rxconfig_0.cfg +#SlotNumRx8=./peak_rxconfig_3.cfg +#SlotNumRx9=./peak_rxconfig_1.cfg + +antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 +antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 +antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 +antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 +#antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 +#antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 +#antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 +#antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 +#antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 +#antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 +#antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 +#antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 +#antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 +#antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 +#antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 + +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=189 + +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) + +antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin +antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin +antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin +antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin + +#DL PRB / % Used RBs UL PRB / % Used RBs +#66% 180 33% 90 + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used +extType=1 +nPrbElemDl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,48,0,14,0,1,1,9,1 +PrbElemDl1=48,48,0,14,1,1,1,9,1 +PrbElemDl2=96,48,0,14,2,1,1,9,1 +PrbElemDl3=144,48,0,14,3,1,1,9,1 +PrbElemDl4=192,48,0,14,4,1,1,9,1 +PrbElemDl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,24,0,0,9,1,1 +ExtBfwDl1=2,24,0,0,9,1,1 +ExtBfwDl2=2,24,0,0,9,1,1 +ExtBfwDl3=2,24,0,0,9,1,1 +ExtBfwDl4=2,24,0,0,9,1,1 +ExtBfwDl5=2,17,0,0,9,1,1 + +nPrbElemUl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,48,0,14,0,1,1,9,1 +PrbElemUl1=48,48,0,14,1,1,1,9,1 +PrbElemUl2=96,48,0,14,2,1,1,9,1 +PrbElemUl3=144,48,0,14,3,1,1,9,1 +PrbElemUl4=192,48,0,14,4,1,1,9,1 +PrbElemUl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,24,0,0,9,1,1 +ExtBfwUl1=2,24,0,0,9,1,1 +ExtBfwUl2=2,24,0,0,9,1,1 +ExtBfwUl3=2,24,0,0,9,1,1 +ExtBfwUl4=2,24,0,0,9,1,1 +ExtBfwUl5=2,17,0,0,9,1,1 + +nPrbElemSrs=1 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order +compression=1 # (1) compression enabled (0) compression disabled + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +Tadv_cp_dl=25 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=285 # 285.42us +T2a_max_cp_dl=429 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=285 # 285.42us +T2a_max_cp_ul=429 # 428.12us + +#Reception Window U-plane +T2a_min_up=71 # 71.35in us +T2a_max_up=428 # 428.12us + +#Transmission Window +Ta3_min=20 # in us +Ta3_max=32 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=285 +T1a_max_cp_dl=429 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=300 + +#U-plane +##Transmission Window +T1a_min_up=96 #71 + 25 us +T1a_max_up=196 #71 + 25 us + +#Reception Window +Ta4_min=0 # in us +Ta4_max=75 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/442/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/442/usecase_du.cfg new file mode 100644 index 0000000..6b79748 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/442/usecase_du.cfg @@ -0,0 +1,73 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system + +mainCore=20 #core for main() +systemCore=22 +ioCore=28 # core id +#ioWorker=0x000000000 # mask [0- no workers] +#ioWorker=0x8000040000 # mask [0- no workers] +ioWorker=0x7E00000000 # mask [0- no workers] +#ioWorker=0x700000600 + +dpdkMemorySize=16384 +iovaMode=0 + +oXuNum=4 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./peak_o_du_tst376.dat #O-DU0 +oXuCfgFile1=./peak_o_du_tst376.dat #O-DU1 +oXuCfgFile2=./peak_o_du_tst376.dat #O-DU2 +oXuCfgFile3=./peak_o_du_tst376.dat #O-DU3 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 + +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 + +# remote O-XU 3 Eth Link 0 +oXuRem3Mac0=00:11:22:33:03:01 +oXuRem3Mac1=00:11:22:33:03:11 + +# remote O-XU 3 Eth Link 1 +oXuRem3Mac2=00:11:22:33:03:21 +oXuRem3Mac3=00:11:22:33:03:31 \ No newline at end of file diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/442/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/442/usecase_du_icx.cfg new file mode 100644 index 0000000..f2780c8 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/442/usecase_du_icx.cfg @@ -0,0 +1,71 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system + +mainCore=0 #core for main() +systemCore=2 +ioCore=8 # core id + +ioWorker=0x7E00 # mask [0- no workers] + +dpdkMemorySize=16384 +iovaMode=0 + +oXuNum=4 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./peak_o_du_tst376.dat #O-DU0 +oXuCfgFile1=./peak_o_du_tst376.dat #O-DU1 +oXuCfgFile2=./peak_o_du_tst376.dat #O-DU2 +oXuCfgFile3=./peak_o_du_tst376.dat #O-DU3 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 + +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 + +# remote O-XU 3 Eth Link 0 +oXuRem3Mac0=00:11:22:33:03:01 +oXuRem3Mac1=00:11:22:33:03:11 + +# remote O-XU 3 Eth Link 1 +oXuRem3Mac2=00:11:22:33:03:21 +oXuRem3Mac3=00:11:22:33:03:31 \ No newline at end of file diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/442/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/442/usecase_ru.cfg new file mode 100644 index 0000000..8540123 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/442/usecase_ru.cfg @@ -0,0 +1,72 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments + +appMode=1 # All O-DU(0) | O-RU(1) +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +mainCore=0 #core for main() +systemCore=2 +ioCore=8 # core id +#ioWorker=0x800000000 # mask [0- no workers] +#ioWorker=0x800004000 # mask [0- no workers] +#ioWorker=0xc000000 # second socket +ioWorker=0x7E00 # second socket + +dpdkMemorySize=16384 +iovaMode=0 + +oXuNum=4 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./peak_o_ru_tst376.dat #O-RU0 +oXuCfgFile1=./peak_o_ru_tst376.dat #O-RU1 +oXuCfgFile2=./peak_o_ru_tst376.dat #O-RU2 +oXuCfgFile3=./peak_o_ru_tst376.dat #O-RU3 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:00 +oXuRem0Mac1=00:11:22:33:00:10 +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:20 +oXuRem0Mac3=00:11:22:33:00:30 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:00 +oXuRem1Mac1=00:11:22:33:01:10 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:20 +oXuRem1Mac3=00:11:22:33:01:30 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:00 +oXuRem2Mac1=00:11:22:33:02:10 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:20 +oXuRem2Mac3=00:11:22:33:02:30 + +# remote O-XU 3 Eth Link 0 +oXuRem3Mac0=00:11:22:33:03:00 +oXuRem3Mac1=00:11:22:33:03:10 +# remote O-XU 3 Eth Link 1 +oXuRem3Mac2=00:11:22:33:03:20 +oXuRem3Mac3=00:11:22:33:03:30 + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/442/usecase_ru_icx.cfg similarity index 78% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/usecase_ru.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/442/usecase_ru_icx.cfg index 84cdcc2..86f9016 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/3521/usecase_ru.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/442/usecase_ru_icx.cfg @@ -15,30 +15,30 @@ # limitations under the License. # #******************************************************************************/ + # This is simple configuration file. Use '#' sign for comments -# 3501 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % -# TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 Avg: 36 % -# TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 Avg: 36 % appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system mainCore=0 #core for main() systemCore=2 ioCore=8 # core id -ioWorker=0x3E00 # second socket -dpdkMemorySize=18432 +ioWorker=0x7E00 # second socket + +dpdkMemorySize=16384 iovaMode=0 -oXuNum=3 # numbers of O-RU connected to O-DU +oXuNum=4 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs oXuCfgFile0=./peak_o_ru_tst376.dat #O-RU0 -oXuCfgFile1=./avg_o_ru_tst377.dat #O-RU1 -oXuCfgFile2=./avg_o_ru_tst377.dat #O-RU2 +oXuCfgFile1=./peak_o_ru_tst376.dat #O-RU1 +oXuCfgFile2=./peak_o_ru_tst376.dat #O-RU2 +oXuCfgFile3=./peak_o_ru_tst376.dat #O-RU3 # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:00 @@ -60,3 +60,11 @@ oXuRem2Mac1=00:11:22:33:02:10 # remote O-XU 2 Eth Link 1 oXuRem2Mac2=00:11:22:33:02:20 oXuRem2Mac3=00:11:22:33:02:30 + +# remote O-XU 3 Eth Link 0 +oXuRem3Mac0=00:11:22:33:03:00 +oXuRem3Mac1=00:11:22:33:03:10 +# remote O-XU 3 Eth Link 1 +oXuRem3Mac2=00:11:22:33:03:20 +oXuRem3Mac3=00:11:22:33:03:30 + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/484/peak_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/484/peak_o_du.dat new file mode 100644 index 0000000..28d1993 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/484/peak_o_du.dat @@ -0,0 +1,253 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +#Peak: 100 % +#484 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % + + + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU(0) | O-RU(1) +xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) +antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B +antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B +antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R + +#UEs +muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources +DlLayersPerUe=1 #number of RX anntennas on DL UE side +UlLayersPerUe=1 #number of TX anntennas on UL UE side + + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 +antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 +antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 +antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 +antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 +antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 +antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 +#antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 +#antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 +#antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 +#antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 +#antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 +#antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 +#antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 + +#SlotNumTx0=./peak_txconfig_1.cfg +#SlotNumTx1=./peak_txconfig_1.cfg +#SlotNumTx2=./peak_txconfig_1.cfg +#SlotNumTx3=./peak_txconfig_2.cfg +#SlotNumTx4=./peak_txconfig_0.cfg + +#SlotNumTx5=./peak_txconfig_1.cfg +#SlotNumTx6=./peak_txconfig_1.cfg +#SlotNumTx7=./peak_txconfig_1.cfg +#SlotNumTx8=./peak_txconfig_2.cfg +#SlotNumTx9=./peak_txconfig_0.cfg + +#SlotNumRx0=./peak_rxconfig_0.cfg +#SlotNumRx1=./peak_rxconfig_0.cfg +#SlotNumRx2=./peak_rxconfig_0.cfg +#SlotNumRx3=./peak_rxconfig_2.cfg +#SlotNumRx4=./peak_rxconfig_1.cfg + +#SlotNumRx5=./peak_rxconfig_0.cfg +#SlotNumRx6=./peak_rxconfig_0.cfg +#SlotNumRx7=./peak_rxconfig_0.cfg +#SlotNumRx8=./peak_rxconfig_3.cfg +#SlotNumRx9=./peak_rxconfig_1.cfg + +#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] +DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] + +#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] +UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] +#UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] + + +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=189 + +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +extType=1 + +nPrbElemDl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,48,0,14,0,1,1,9,1 +PrbElemDl1=48,48,0,14,1,1,1,9,1 +PrbElemDl2=96,48,0,14,2,1,1,9,1 +PrbElemDl3=144,48,0,14,3,1,1,9,1 +PrbElemDl4=192,48,0,14,4,1,1,9,1 +PrbElemDl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,24,0,0,9,1,1 +ExtBfwDl1=2,24,0,0,9,1,1 +ExtBfwDl2=2,24,0,0,9,1,1 +ExtBfwDl3=2,24,0,0,9,1,1 +ExtBfwDl4=2,24,0,0,9,1,1 +ExtBfwDl5=2,17,0,0,9,1,1 + +nPrbElemUl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,48,0,14,0,1,1,9,1 +PrbElemUl1=48,48,0,14,1,1,1,9,1 +PrbElemUl2=96,48,0,14,2,1,1,9,1 +PrbElemUl3=144,48,0,14,3,1,1,9,1 +PrbElemUl4=192,48,0,14,4,1,1,9,1 +PrbElemUl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,24,0,0,9,1,1 +ExtBfwUl1=2,24,0,0,9,1,1 +ExtBfwUl2=2,24,0,0,9,1,1 +ExtBfwUl3=2,24,0,0,9,1,1 +ExtBfwUl4=2,24,0,0,9,1,1 +ExtBfwUl5=2,17,0,0,9,1,1 + +nPrbElemSrs=1 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order +compression=1 # (1) compression enabled (0) compression disabled + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +Tadv_cp_dl=25 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=285 # 285.42us +T2a_max_cp_dl=429 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=285 # 285.42us +T2a_max_cp_ul=429 # 428.12us + +#Reception Window U-plane +T2a_min_up=71 # 71.35in us +T2a_max_up=428 # 428.12us + +#Transmission Window +Ta3_min=20 # in us +Ta3_max=32 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=285 +T1a_max_cp_dl=429 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=300 + +#U-plane +##Transmission Window +T1a_min_up=96 #71 + 25 us +T1a_max_up=196 #71 + 25 us + +#Reception Window +Ta4_min=0 # in us +Ta4_max=75 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/484/peak_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/484/peak_o_ru.dat new file mode 100644 index 0000000..45d4cbe --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/484/peak_o_ru.dat @@ -0,0 +1,303 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +#Peak: 100 % +#484 TDD DDDFU: S it's 6:4:4 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % + + + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) +antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B +antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B +antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R + +#UEs +muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources +DlLayersPerUe=1 #number of RX anntennas on DL UE side +UlLayersPerUe=1 #number of TX anntennas on UL UE side + + +##Numerology +mu=1 #30Khz Sub Carrier Spacing + +ttiPeriod=500 # in us TTI period (30Khz default 500us) + +nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=4096 +nULFftSize=4096 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 +antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 +antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 +antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 +antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 +antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 +antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 +antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 +#antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 +#antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 +#antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 +#antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 +#antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 +#antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 +#antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 +#antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 + +#SlotNumTx0=./peak_txconfig_1.cfg +#SlotNumTx1=./peak_txconfig_1.cfg +#SlotNumTx2=./peak_txconfig_1.cfg +#SlotNumTx3=./peak_txconfig_2.cfg +#SlotNumTx4=./peak_txconfig_0.cfg + +#SlotNumTx5=./peak_txconfig_1.cfg +#SlotNumTx6=./peak_txconfig_1.cfg +#SlotNumTx7=./peak_txconfig_1.cfg +#SlotNumTx8=./peak_txconfig_2.cfg +#SlotNumTx9=./peak_txconfig_0.cfg + +#SlotNumRx0=./peak_rxconfig_0.cfg +#SlotNumRx1=./peak_rxconfig_0.cfg +#SlotNumRx2=./peak_rxconfig_0.cfg +#SlotNumRx3=./peak_rxconfig_2.cfg +#SlotNumRx4=./peak_rxconfig_1.cfg + +#SlotNumRx5=./peak_rxconfig_0.cfg +#SlotNumRx6=./peak_rxconfig_0.cfg +#SlotNumRx7=./peak_rxconfig_0.cfg +#SlotNumRx8=./peak_rxconfig_3.cfg +#SlotNumRx9=./peak_rxconfig_1.cfg + + +#TODO: +antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 +antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 +antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 +antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 +antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 +antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 +antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 +antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 +#antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 +#antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 +#antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 +#antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 +#antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 +#antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 +#antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 +#antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 + +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=189 + +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) + +antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin +antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin +antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin +antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin +antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin +antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin +antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin +antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin +antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin +antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin +antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin +#antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin +#antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin +#antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin +#antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin +#antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin +#antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin +#antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin +#antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin + +#DL PRB / % Used RBs UL PRB / % Used RBs +#66% 180 33% 90 + +########################################################### +##Section Settings +DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used + +extType=1 + +nPrbElemDl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemDl0=0,48,0,14,0,1,1,9,1 +PrbElemDl1=48,48,0,14,1,1,1,9,1 +PrbElemDl2=96,48,0,14,2,1,1,9,1 +PrbElemDl3=144,48,0,14,3,1,1,9,1 +PrbElemDl4=192,48,0,14,4,1,1,9,1 +PrbElemDl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,24,0,0,9,1,1 +ExtBfwDl1=2,24,0,0,9,1,1 +ExtBfwDl2=2,24,0,0,9,1,1 +ExtBfwDl3=2,24,0,0,9,1,1 +ExtBfwDl4=2,24,0,0,9,1,1 +ExtBfwDl5=2,17,0,0,9,1,1 + +nPrbElemUl=6 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +# weight base beams +PrbElemUl0=0,48,0,14,0,1,1,9,1 +PrbElemUl1=48,48,0,14,1,1,1,9,1 +PrbElemUl2=96,48,0,14,2,1,1,9,1 +PrbElemUl3=144,48,0,14,3,1,1,9,1 +PrbElemUl4=192,48,0,14,4,1,1,9,1 +PrbElemUl5=240,33,0,14,5,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,24,0,0,9,1,1 +ExtBfwUl1=2,24,0,0,9,1,1 +ExtBfwUl2=2,24,0,0,9,1,1 +ExtBfwUl3=2,24,0,0,9,1,1 +ExtBfwUl4=2,24,0,0,9,1,1 +ExtBfwUl5=2,17,0,0,9,1,1 + +nPrbElemSrs=1 +#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType +PrbElemSrs0=0,273,13,1,0,0,1,9,0 + +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order +compression=1 # (1) compression enabled (0) compression disabled + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##O-RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +Tadv_cp_dl=25 # in us + # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages +#Reception Window C-plane DL +T2a_min_cp_dl=285 # 285.42us +T2a_max_cp_dl=429 # 428.12us + +#Reception Window C-plane UL +T2a_min_cp_ul=285 # 285.42us +T2a_max_cp_ul=429 # 428.12us + +#Reception Window U-plane +T2a_min_up=71 # 71.35in us +T2a_max_up=428 # 428.12us + +#Transmission Window +Ta3_min=20 # in us +Ta3_max=32 # in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_min_cp_dl=285 +T1a_max_cp_dl=429 + +##Transmission Window Fast C-plane UL +T1a_min_cp_ul=285 +T1a_max_cp_ul=300 + +#U-plane +##Transmission Window +T1a_min_up=96 #71 + 25 us +T1a_max_up=196 #71 + 25 us + +#Reception Window +Ta4_min=0 # in us +Ta4_max=75 # in us +########################################################### + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/484/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/484/usecase_du.cfg new file mode 100644 index 0000000..bb6bd43 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/484/usecase_du.cfg @@ -0,0 +1,73 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system + +mainCore=20 #core for main() +systemCore=22 +ioCore=28 # core id +#ioWorker=0x000000000 # mask [0- no workers] +#ioWorker=0x8000040000 # mask [0- no workers] +ioWorker=0x060000000 # mask [0- no workers] +#ioWorker=0x700000600 + +dpdkMemorySize=16384 +iovaMode=0 + +oXuNum=4 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./peak_o_du.dat #O-DU0 +oXuCfgFile1=./peak_o_du.dat #O-DU1 +oXuCfgFile2=./peak_o_du.dat #O-DU2 +oXuCfgFile3=./peak_o_du.dat #O-DU3 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 + +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 + +# remote O-XU 3 Eth Link 0 +oXuRem3Mac0=00:11:22:33:03:01 +oXuRem3Mac1=00:11:22:33:03:11 + +# remote O-XU 3 Eth Link 1 +oXuRem3Mac2=00:11:22:33:03:21 +oXuRem3Mac3=00:11:22:33:03:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/484/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/484/usecase_du_icx.cfg new file mode 100644 index 0000000..ea1ea0e --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/484/usecase_du_icx.cfg @@ -0,0 +1,70 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system + +mainCore=0 #core for main() +systemCore=2 +ioCore=8 # core id +ioWorker=0x200 # mask [0- no workers] + +dpdkMemorySize=16384 +iovaMode=0 + +oXuNum=4 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./peak_o_du.dat #O-DU0 +oXuCfgFile1=./peak_o_du.dat #O-DU1 +oXuCfgFile2=./peak_o_du.dat #O-DU2 +oXuCfgFile3=./peak_o_du.dat #O-DU3 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 + +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 + +# remote O-XU 3 Eth Link 0 +oXuRem3Mac0=00:11:22:33:03:01 +oXuRem3Mac1=00:11:22:33:03:11 + +# remote O-XU 3 Eth Link 1 +oXuRem3Mac2=00:11:22:33:03:21 +oXuRem3Mac3=00:11:22:33:03:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/484/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/484/usecase_ru.cfg new file mode 100644 index 0000000..4fff8c4 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/484/usecase_ru.cfg @@ -0,0 +1,71 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments + +appMode=1 # All O-DU(0) | O-RU(1) +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +mainCore=0 #core for main() +systemCore=2 +ioCore=8 # core id +#ioWorker=0x800000000 # mask [0- no workers] +#ioWorker=0x800004000 # mask [0- no workers] +#ioWorker=0xc000000 # second socket +ioWorker=0x7E00 # second socket + +dpdkMemorySize=16384 +iovaMode=0 + +oXuNum=4 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./peak_o_ru.dat #O-RU0 +oXuCfgFile1=./peak_o_ru.dat #O-RU1 +oXuCfgFile2=./peak_o_ru.dat #O-RU2 +oXuCfgFile3=./peak_o_ru.dat #O-RU3 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:00 +oXuRem0Mac1=00:11:22:33:00:10 +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:20 +oXuRem0Mac3=00:11:22:33:00:30 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:00 +oXuRem1Mac1=00:11:22:33:01:10 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:20 +oXuRem1Mac3=00:11:22:33:01:30 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:00 +oXuRem2Mac1=00:11:22:33:02:10 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:20 +oXuRem2Mac3=00:11:22:33:02:30 + +# remote O-XU 3 Eth Link 0 +oXuRem3Mac0=00:11:22:33:03:00 +oXuRem3Mac1=00:11:22:33:03:10 +# remote O-XU 3 Eth Link 1 +oXuRem3Mac2=00:11:22:33:03:20 +oXuRem3Mac3=00:11:22:33:03:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/484/usecase_ru_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/484/usecase_ru_icx.cfg new file mode 100644 index 0000000..37990df --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/484/usecase_ru_icx.cfg @@ -0,0 +1,67 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +appMode=1 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +mainCore=0 #core for main() +systemCore=2 +ioCore=8 # core id +ioWorker=0x7E00 # second socket + +dpdkMemorySize=16384 +iovaMode=0 + +oXuNum=4 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./peak_o_ru.dat #O-RU0 +oXuCfgFile1=./peak_o_ru.dat #O-RU1 +oXuCfgFile2=./peak_o_ru.dat #O-RU2 +oXuCfgFile3=./peak_o_ru.dat #O-RU3 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:00 +oXuRem0Mac1=00:11:22:33:00:10 +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:20 +oXuRem0Mac3=00:11:22:33:00:30 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:00 +oXuRem1Mac1=00:11:22:33:01:10 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:20 +oXuRem1Mac3=00:11:22:33:01:30 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:00 +oXuRem2Mac1=00:11:22:33:02:10 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:20 +oXuRem2Mac3=00:11:22:33:02:30 + +# remote O-XU 3 Eth Link 0 +oXuRem3Mac0=00:11:22:33:03:00 +oXuRem3Mac1=00:11:22:33:03:10 +# remote O-XU 3 Eth Link 1 +oXuRem3Mac2=00:11:22:33:03:20 +oXuRem3Mac3=00:11:22:33:03:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/501/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/501/config_file_o_du.dat index a6ea3d6..31dc2d3 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/501/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/501/config_file_o_du.dat @@ -116,11 +116,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/501/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/501/config_file_o_ru.dat index c67dc08..d4855fa 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/501/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/501/config_file_o_ru.dat @@ -97,11 +97,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/502/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/502/config_file_o_du.dat index f459e44..95889ef 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/502/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/502/config_file_o_du.dat @@ -115,11 +115,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/502/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/502/config_file_o_ru.dat index 97c9ac9..1f8bb41 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/502/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/502/config_file_o_ru.dat @@ -95,11 +95,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -167,9 +170,6 @@ antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - ########################################################### ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/503/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/503/config_file_o_du.dat index 5555847..62d6cab 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/503/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/503/config_file_o_du.dat @@ -116,11 +116,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/503/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/503/config_file_o_ru.dat index dd2af52..fe55652 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/503/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/503/config_file_o_ru.dat @@ -95,11 +95,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/504/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/504/config_file_o_du.dat index 2decc04..3523948 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/504/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/504/config_file_o_du.dat @@ -115,11 +115,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/504/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/504/config_file_o_ru.dat index 3b66420..69486f0 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/504/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/504/config_file_o_ru.dat @@ -95,11 +95,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/505/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/505/config_file_o_du.dat index accadfc..c1a5789 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/505/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/505/config_file_o_du.dat @@ -116,11 +116,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/505/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/505/config_file_o_ru.dat index c92991e..bd3a72b 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/505/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/505/config_file_o_ru.dat @@ -95,11 +95,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/505/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/505/usecase_du_icx.cfg deleted file mode 100644 index 71f7c1d..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/505/usecase_du_icx.cfg +++ /dev/null @@ -1,58 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=21 # core id -ioWorker=0x200000000000 # mask [0- no workers] -dpdkMemorySize=8192 - -iovaMode=0 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 - -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/506/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/506/config_file_o_du.dat index 6d52750..c15f5a3 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/506/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/506/config_file_o_du.dat @@ -117,11 +117,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/506/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/506/config_file_o_ru.dat index dbc01f7..013f06e 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/506/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/506/config_file_o_ru.dat @@ -95,11 +95,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/506/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/506/usecase_du_icx.cfg deleted file mode 100644 index 71f7c1d..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/506/usecase_du_icx.cfg +++ /dev/null @@ -1,58 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=21 # core id -ioWorker=0x200000000000 # mask [0- no workers] -dpdkMemorySize=8192 - -iovaMode=0 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 - -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/511/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/511/config_file_o_du.dat index 508118a..50e9060 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/511/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/511/config_file_o_du.dat @@ -116,11 +116,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/511/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/511/config_file_o_ru.dat index 1ebc95c..a9ef82a 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/511/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/511/config_file_o_ru.dat @@ -97,11 +97,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/512/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/512/config_file_o_du.dat index 431e4cd..b49ff59 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/512/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/512/config_file_o_du.dat @@ -115,11 +115,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/512/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/512/config_file_o_ru.dat index 43436a8..4063bb3 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/512/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/512/config_file_o_ru.dat @@ -95,11 +95,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/512/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/512/usecase_du_icx.cfg deleted file mode 100644 index 71f7c1d..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/512/usecase_du_icx.cfg +++ /dev/null @@ -1,58 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=21 # core id -ioWorker=0x200000000000 # mask [0- no workers] -dpdkMemorySize=8192 - -iovaMode=0 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 - -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/513/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/513/config_file_o_du.dat index a84ed42..6dc7486 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/513/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/513/config_file_o_du.dat @@ -116,11 +116,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/513/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/513/config_file_o_ru.dat index 89dd171..9705708 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/513/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/513/config_file_o_ru.dat @@ -95,11 +95,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/513/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/513/usecase_du_icx.cfg deleted file mode 100644 index 71f7c1d..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/513/usecase_du_icx.cfg +++ /dev/null @@ -1,58 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=21 # core id -ioWorker=0x200000000000 # mask [0- no workers] -dpdkMemorySize=8192 - -iovaMode=0 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 - -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/514/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/514/config_file_o_du.dat index 250ccc0..ffdb267 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/514/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/514/config_file_o_du.dat @@ -115,11 +115,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/514/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/514/config_file_o_ru.dat index 229fa02..2df68f1 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/514/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/514/config_file_o_ru.dat @@ -95,11 +95,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/514/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/514/usecase_du_icx.cfg deleted file mode 100644 index 71f7c1d..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/514/usecase_du_icx.cfg +++ /dev/null @@ -1,58 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=21 # core id -ioWorker=0x200000000000 # mask [0- no workers] -dpdkMemorySize=8192 - -iovaMode=0 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 - -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/515/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/515/config_file_o_du.dat index b3e2145..8169e94 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/515/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/515/config_file_o_du.dat @@ -116,11 +116,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/515/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/515/config_file_o_ru.dat index 93c5b17..55c78cd 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/515/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/515/config_file_o_ru.dat @@ -95,11 +95,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/515/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/515/usecase_du_icx.cfg deleted file mode 100644 index 71f7c1d..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/515/usecase_du_icx.cfg +++ /dev/null @@ -1,58 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=21 # core id -ioWorker=0x200000000000 # mask [0- no workers] -dpdkMemorySize=8192 - -iovaMode=0 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 - -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/516/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/516/config_file_o_du.dat index 259eeee..86e9829 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/516/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/516/config_file_o_du.dat @@ -117,11 +117,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/516/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/516/config_file_o_ru.dat index b2290d7..fb63025 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/516/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/516/config_file_o_ru.dat @@ -95,11 +95,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/516/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/516/usecase_du_icx.cfg deleted file mode 100644 index 71f7c1d..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/516/usecase_du_icx.cfg +++ /dev/null @@ -1,58 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=21 # core id -ioWorker=0x200000000000 # mask [0- no workers] -dpdkMemorySize=8192 - -iovaMode=0 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 - -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/602/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/602/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/602/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/602/bbu_pool_cfg_o_du_icx.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/602/bbu_pool_cfg_o_du_icx.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/602/bbu_pool_cfg_o_du_icx.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/602/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/602/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/602/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/602/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/602/config_file_o_ru.dat deleted file mode 100644 index d8f49d6..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/602/config_file_o_ru.dat +++ /dev/null @@ -1,250 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak -#4% -#302 TDD DDDFU: S it's 10:2:2 1 64T64R 100 8 8 37% 100 1200 37% 100 1200 Peak: 4 % - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,50,0,14,0,1,1,9,1 -PrbElemDl1=50,50,0,14,1,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,25,0,0,9,1 -ExtBfwDl1=2,25,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,50,0,14,0,1,1,9,1 -PrbElemUl1=50,50,0,14,1,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,25,0,0,9,1 -ExtBfwUl1=2,25,0,0,9,1 - -nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/503/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/602/usecase_du_icx.cfg similarity index 94% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/503/usecase_du_icx.cfg rename to fhi_lib/app/usecase/cat_b/mu1_100mhz/602/usecase_du_icx.cfg index 71f7c1d..95f2781 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/503/usecase_du_icx.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/602/usecase_du_icx.cfg @@ -21,11 +21,11 @@ instanceId=0 # 0,1,2,... in case more than 1 application started on the same sys mainCore=0 #core for main() systemCore=2 -ioCore=21 # core id -ioWorker=0x200000000000 # mask [0- no workers] -dpdkMemorySize=8192 +ioCore=11 # core id +ioWorker=0x80000000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du_icx.xml -iovaMode=0 +dpdkMemorySize=8192 oXuNum=1 # numbers of O-RU connected to O-DU @@ -38,7 +38,6 @@ oXuCfgFile0=./config_file_o_du.dat #O-RU0 # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:01 oXuRem0Mac1=00:11:22:33:00:11 - # remote O-XU 0 Eth Link 1 oXuRem0Mac2=00:11:22:33:00:21 oXuRem0Mac3=00:11:22:33:00:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/603/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/603/config_file_o_ru.dat deleted file mode 100644 index feb5e1c..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/603/config_file_o_ru.dat +++ /dev/null @@ -1,250 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#NC -#12% -#303 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 4 37% 100 1200 37% 100 1200 NC: 12% - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,50,0,14,0,1,1,9,1 -PrbElemDl1=50,50,0,14,1,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,25,0,0,9,1 -ExtBfwDl1=2,25,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,50,0,14,0,1,1,9,1 -PrbElemUl1=50,50,0,14,1,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,25,0,0,9,1 -ExtBfwUl1=2,25,0,0,9,1 - -nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/604/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/604/config_file_o_ru.dat deleted file mode 100644 index ef27bc7..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/604/config_file_o_ru.dat +++ /dev/null @@ -1,264 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#MC -#20% -#304 TDD DDDFU: S it's 10:2:2 1 64T64R 100 8 4 37% 100 1200 37% 100 1200 MC: 20% - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=15 -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - -#DL PRB / % Used RBs UL PRB / % Used RBs -#66% 180 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,50,0,14,0,1,1,9,1 -PrbElemDl1=50,50,0,14,1,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,25,0,0,9,1 -ExtBfwDl1=2,25,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,50,0,14,0,1,1,9,1 -PrbElemUl1=50,50,0,14,1,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,25,0,0,9,1 -ExtBfwUl1=2,25,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/604/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/604/usecase_du.cfg deleted file mode 100644 index da0df27..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/604/usecase_du.cfg +++ /dev/null @@ -1,55 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=10 # core id -ioWorker=0x4000000000000 # mask [0- no workers] -dpdkMemorySize=8192 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/606/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/606/config_file_o_du.dat deleted file mode 100644 index 68c65bd..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/606/config_file_o_du.dat +++ /dev/null @@ -1,208 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#EC -#36% -#306 TDD DDDFU: S it's 10:2:2 1 64T64R 100 2 1 37% 100 1200 37% 100 1200 EC: 36% - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=1 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,50,0,14,0,1,1,9,1 -PrbElemDl1=50,50,0,14,1,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,25,0,0,9,1 -ExtBfwDl1=2,25,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,50,0,14,0,1,1,9,1 -PrbElemUl1=50,50,0,14,1,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,25,0,0,9,1 -ExtBfwUl1=2,25,0,0,9,1 - -nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/606/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/606/config_file_o_ru.dat deleted file mode 100644 index 955acd8..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/606/config_file_o_ru.dat +++ /dev/null @@ -1,250 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#EC -#36% -#306 TDD DDDFU: S it's 10:2:2 1 64T64R 100 2 1 37% 100 1200 37% 100 1200 EC: 36% - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=1 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,50,0,14,0,1,1,9,1 -PrbElemDl1=50,50,0,14,1,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,25,0,0,9,1 -ExtBfwDl1=2,25,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,50,0,14,0,1,1,9,1 -PrbElemUl1=50,50,0,14,1,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,25,0,0,9,1 -ExtBfwUl1=2,25,0,0,9,1 - -nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/606/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/606/usecase_du.cfg deleted file mode 100644 index 5eb0082..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/606/usecase_du.cfg +++ /dev/null @@ -1,55 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -mainCore=0 #core for main() - -systemCore=2 -ioCore=10 # core id -ioWorker=0x4000000000000 # mask [0- no workers] -dpdkMemorySize=8192 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/606/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/606/usecase_ru.cfg deleted file mode 100644 index 3ab240f..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/606/usecase_ru.cfg +++ /dev/null @@ -1,51 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -ioCore=15 # core id -ioWorker=0x800000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/611/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/611/config_file_o_du.dat deleted file mode 100644 index 153598f..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/611/config_file_o_du.dat +++ /dev/null @@ -1,223 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak: 100 % -#311 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 16 100% 273 3276 100% 273 3276 Peak: 100 % - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,48,0,14,3,1,1,9,1 -PrbElemDl4=192,48,0,14,4,1,1,9,1 -PrbElemDl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,24,0,0,9,1 -ExtBfwDl1=2,24,0,0,9,1 -ExtBfwDl2=2,24,0,0,9,1 -ExtBfwDl3=2,24,0,0,9,1 -ExtBfwDl4=2,24,0,0,9,1 -ExtBfwDl5=2,17,0,0,9,1 - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,48,0,14,3,1,1,9,1 -PrbElemUl4=192,48,0,14,4,1,1,9,1 -PrbElemUl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,24,0,0,9,1 -ExtBfwUl1=2,24,0,0,9,1 -ExtBfwUl2=2,24,0,0,9,1 -ExtBfwUl3=2,24,0,0,9,1 -ExtBfwUl4=2,24,0,0,9,1 -ExtBfwUl5=2,17,0,0,9,1 - -nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/611/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/611/config_file_o_ru.dat deleted file mode 100644 index 62b891d..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/611/config_file_o_ru.dat +++ /dev/null @@ -1,272 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak: 100 % -#311 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 16 100% 273 3276 100% 273 3276 Peak: 100 % - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - - - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - -#DL PRB / % Used RBs UL PRB / % Used RBs -#66% 180 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,48,0,14,0,1,1,9,1 -PrbElemDl1=48,48,0,14,1,1,1,9,1 -PrbElemDl2=96,48,0,14,2,1,1,9,1 -PrbElemDl3=144,48,0,14,3,1,1,9,1 -PrbElemDl4=192,48,0,14,4,1,1,9,1 -PrbElemDl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,24,0,0,9,1 -ExtBfwDl1=2,24,0,0,9,1 -ExtBfwDl2=2,24,0,0,9,1 -ExtBfwDl3=2,24,0,0,9,1 -ExtBfwDl4=2,24,0,0,9,1 -ExtBfwDl5=2,17,0,0,9,1 - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,48,0,14,0,1,1,9,1 -PrbElemUl1=48,48,0,14,1,1,1,9,1 -PrbElemUl2=96,48,0,14,2,1,1,9,1 -PrbElemUl3=144,48,0,14,3,1,1,9,1 -PrbElemUl4=192,48,0,14,4,1,1,9,1 -PrbElemUl5=240,33,0,14,5,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,24,0,0,9,1 -ExtBfwUl1=2,24,0,0,9,1 -ExtBfwUl2=2,24,0,0,9,1 -ExtBfwUl3=2,24,0,0,9,1 -ExtBfwUl4=2,24,0,0,9,1 -ExtBfwUl5=2,17,0,0,9,1 - -nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/611/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/611/usecase_ru.cfg deleted file mode 100644 index 3ab240f..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/611/usecase_ru.cfg +++ /dev/null @@ -1,51 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -ioCore=15 # core id -ioWorker=0x800000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/612/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/612/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/612/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/612/bbu_pool_cfg_o_du_icx.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/612/bbu_pool_cfg_o_du_icx.xml new file mode 100644 index 0000000..81b0e03 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/612/bbu_pool_cfg_o_du_icx.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 6 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/612/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/612/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/612/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/612/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/612/config_file_o_du.dat index 603692c..8b72589 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/612/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/612/config_file_o_du.dat @@ -115,11 +115,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings @@ -146,7 +149,7 @@ ExtBfwUl0=2,25,0,0,9,1 ExtBfwUl1=2,25,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/612/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/612/config_file_o_ru.dat index 30ff1f5..b93a2e8 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/612/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/612/config_file_o_ru.dat @@ -95,11 +95,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -190,7 +193,7 @@ ExtBfwUl0=2,25,0,0,9,1 ExtBfwUl1=2,25,0,0,9,1 nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 +PrbElemSrs0=0,273,13,1,0,0,1,9,0 ########################################################### diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/612/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/612/usecase_du.cfg index da0df27..f40da1c 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/612/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/612/usecase_du.cfg @@ -31,6 +31,7 @@ oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml oXuCfgFile0=./config_file_o_du.dat #O-RU0 # remote O-XU 0 Eth Link 0 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/612/usecase_du_icx.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/612/usecase_du_icx.cfg new file mode 100644 index 0000000..95f2781 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/612/usecase_du_icx.cfg @@ -0,0 +1,57 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ +# This is simple configuration file. Use '#' sign for comments +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system + +mainCore=0 #core for main() +systemCore=2 +ioCore=11 # core id +ioWorker=0x80000000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du_icx.xml + +dpdkMemorySize=8192 + +oXuNum=1 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs + +oXuCfgFile0=./config_file_o_du.dat #O-RU0 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/613/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/613/config_file_o_du.dat deleted file mode 100644 index ab47156..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/613/config_file_o_du.dat +++ /dev/null @@ -1,207 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#NC -#12% -#313 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 NC: 12% - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,50,0,14,0,1,1,9,1 -PrbElemDl1=50,50,0,14,1,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,25,0,0,9,1 -ExtBfwDl1=2,25,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,50,0,14,0,1,1,9,1 -PrbElemUl1=50,50,0,14,1,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,25,0,0,9,1 -ExtBfwUl1=2,25,0,0,9,1 - -nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/613/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/613/config_file_o_ru.dat deleted file mode 100644 index e0f31a0..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/613/config_file_o_ru.dat +++ /dev/null @@ -1,250 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#NC -#12% -#313 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 NC: 12% - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,50,0,14,0,1,1,9,1 -PrbElemDl1=50,50,0,14,1,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,25,0,0,9,1 -ExtBfwDl1=2,25,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,50,0,14,0,1,1,9,1 -PrbElemUl1=50,50,0,14,1,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,25,0,0,9,1 -ExtBfwUl1=2,25,0,0,9,1 - -nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/613/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/613/usecase_du.cfg deleted file mode 100644 index da0df27..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/613/usecase_du.cfg +++ /dev/null @@ -1,55 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=10 # core id -ioWorker=0x4000000000000 # mask [0- no workers] -dpdkMemorySize=8192 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/613/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/613/usecase_ru.cfg deleted file mode 100644 index 3ab240f..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/613/usecase_ru.cfg +++ /dev/null @@ -1,51 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -ioCore=15 # core id -ioWorker=0x800000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/614/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/614/config_file_o_du.dat deleted file mode 100644 index e58caba..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/614/config_file_o_du.dat +++ /dev/null @@ -1,217 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#MC -#20% -#314 TDD DDDFU: S it's 10:2:2 1 64T64R 100 8 8 37% 100 1200 37% 100 1200 MC: 20% - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] - -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,50,0,14,0,1,1,9,1 -PrbElemDl1=50,50,0,14,1,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,25,0,0,9,1 -ExtBfwDl1=2,25,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,50,0,14,0,1,1,9,1 -PrbElemUl1=50,50,0,14,1,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,25,0,0,9,1 -ExtBfwUl1=2,25,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/614/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/614/config_file_o_ru.dat deleted file mode 100644 index 7c83eff..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/614/config_file_o_ru.dat +++ /dev/null @@ -1,264 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#MC -#20% -#314 TDD DDDFU: S it's 10:2:2 1 64T64R 100 8 8 37% 100 1200 37% 100 1200 MC: 20% - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -ioCore=15 -# Eth 0 -duMac0=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac0=00:11:22:33:44:55 # O-RU VF for O-RU app -duMac1=00:11:22:33:44:66 # asigned MAC of O-DU VF -ruMac1=00:11:22:33:44:55 # O-RU VF for O-RU app - -# Eth 1 -duMac2=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac2=00:11:22:33:44:44 # O-RU VF for O-RU app -duMac3=00:11:22:33:44:77 # asigned MAC of O-DU VF -ruMac3=00:11:22:33:44:44 # O-RU VF for O-RU app - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - -#DL PRB / % Used RBs UL PRB / % Used RBs -#66% 180 33% 90 - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,50,0,14,0,1,1,9,1 -PrbElemDl1=50,50,0,14,1,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,25,0,0,9,1 -ExtBfwDl1=2,25,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,50,0,14,0,1,1,9,1 -PrbElemUl1=50,50,0,14,1,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,25,0,0,9,1 -ExtBfwUl1=2,25,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/614/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/614/usecase_du.cfg deleted file mode 100644 index da0df27..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/614/usecase_du.cfg +++ /dev/null @@ -1,55 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=10 # core id -ioWorker=0x4000000000000 # mask [0- no workers] -dpdkMemorySize=8192 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/614/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/614/usecase_ru.cfg deleted file mode 100644 index 3ab240f..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/614/usecase_ru.cfg +++ /dev/null @@ -1,51 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -ioCore=15 # core id -ioWorker=0x800000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/615/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/615/config_file_o_du.dat deleted file mode 100644 index 345f321..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/615/config_file_o_du.dat +++ /dev/null @@ -1,204 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#MEC -#28% -#315 TDD DDDFU: S it's 10:2:2 1 64T64R 100 4 4 37% 100 1200 37% 100 1200 MEC: 28% - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,50,0,14,0,1,1,9,1 -PrbElemDl1=50,50,0,14,1,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,25,0,0,9,1 -ExtBfwDl1=2,25,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,50,0,14,0,1,1,9,1 -PrbElemUl1=50,50,0,14,1,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,25,0,0,9,1 -ExtBfwUl1=2,25,0,0,9,1 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/615/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/615/usecase_du.cfg deleted file mode 100644 index da0df27..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/615/usecase_du.cfg +++ /dev/null @@ -1,55 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=10 # core id -ioWorker=0x4000000000000 # mask [0- no workers] -dpdkMemorySize=8192 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/615/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/615/usecase_ru.cfg deleted file mode 100644 index 3ab240f..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/615/usecase_ru.cfg +++ /dev/null @@ -1,51 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -ioCore=15 # core id -ioWorker=0x800000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/616/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/616/config_file_o_du.dat deleted file mode 100644 index 1b4968e..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/616/config_file_o_du.dat +++ /dev/null @@ -1,208 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#EC -#36% -#316 TDD DDDFU: S it's 10:2:2 1 64T64R 100 2 2 37% 100 1200 37% 100 1200 EC: 36% - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,50,0,14,0,1,1,9,1 -PrbElemDl1=50,50,0,14,1,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,25,0,0,9,1 -ExtBfwDl1=2,25,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,50,0,14,0,1,1,9,1 -PrbElemUl1=50,50,0,14,1,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,25,0,0,9,1 -ExtBfwUl1=2,25,0,0,9,1 - -nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/616/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/616/config_file_o_ru.dat deleted file mode 100644 index b981033..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/616/config_file_o_ru.dat +++ /dev/null @@ -1,250 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#EC -#36% -#316 TDD DDDFU: S it's 10:2:2 1 64T64R 100 2 2 37% 100 1200 37% 100 1200 EC: 36% - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - -nPrbElemDl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,50,0,14,0,1,1,9,1 -PrbElemDl1=50,50,0,14,1,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,25,0,0,9,1 -ExtBfwDl1=2,25,0,0,9,1 - -nPrbElemUl=2 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,50,0,14,0,1,1,9,1 -PrbElemUl1=50,50,0,14,1,1,1,9,1 -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,25,0,0,9,1 -ExtBfwUl1=2,25,0,0,9,1 - -nPrbElemSrs=1 -PrbElemSrs0=0,273,0,14,0,0,1,9,0 - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/616/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/616/usecase_du.cfg deleted file mode 100644 index da0df27..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/616/usecase_du.cfg +++ /dev/null @@ -1,55 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=10 # core id -ioWorker=0x4000000000000 # mask [0- no workers] -dpdkMemorySize=8192 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/616/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/616/usecase_ru.cfg deleted file mode 100644 index 3ab240f..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/616/usecase_ru.cfg +++ /dev/null @@ -1,51 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -ioCore=15 # core id -ioWorker=0x800000000 # mask [0- no workers] - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/801/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/801/config_file_o_du.dat deleted file mode 100644 index 48aaac1..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/801/config_file_o_du.dat +++ /dev/null @@ -1,281 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak: 100 % -#301 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=16 -max_sections_per_symbol=16 - -nPrbElemDl=16 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,18,0,14,5,1,1,9,1 -PrbElemDl6=108,18,0,14,6,1,1,9,1 -PrbElemDl7=126,18,0,14,7,1,1,9,1 -PrbElemDl8=144,18,0,14,8,1,1,9,1 -PrbElemDl9=162,18,0,14,9,1,1,9,1 -PrbElemDl10=180,18,0,14,10,1,1,9,1 -PrbElemDl11=198,18,0,14,11,1,1,9,1 -PrbElemDl12=216,18,0,14,12,1,1,9,1 -PrbElemDl13=234,18,0,14,13,1,1,9,1 -PrbElemDl14=252,18,0,14,14,1,1,9,1 -PrbElemDl15=270,3,0,14,15,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,9,0,0,9,1 -ExtBfwDl6=2,9,0,0,9,1 -ExtBfwDl7=2,9,0,0,9,1 -ExtBfwDl8=2,9,0,0,9,1 -ExtBfwDl9=2,9,0,0,9,1 -ExtBfwDl10=2,9,0,0,9,1 -ExtBfwDl11=2,9,0,0,9,1 -ExtBfwDl12=2,9,0,0,9,1 -ExtBfwDl13=2,9,0,0,9,1 -ExtBfwDl14=2,9,0,0,9,1 -ExtBfwDl15=2,2,0,0,9,1 - - -nPrbElemUl=16 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,18,0,14,5,1,1,9,1 -PrbElemUl6=108,18,0,14,6,1,1,9,1 -PrbElemUl7=126,18,0,14,7,1,1,9,1 -PrbElemUl8=144,18,0,14,8,1,1,9,1 -PrbElemUl9=162,18,0,14,9,1,1,9,1 -PrbElemUl10=180,18,0,14,10,1,1,9,1 -PrbElemUl11=198,18,0,14,11,1,1,9,1 -PrbElemUl12=216,18,0,14,12,1,1,9,1 -PrbElemUl13=234,18,0,14,13,1,1,9,1 -PrbElemUl14=252,18,0,14,14,1,1,9,1 -PrbElemUl15=270,3,0,14,15,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,9,0,0,9,1 -ExtBfwUl6=2,9,0,0,9,1 -ExtBfwUl7=2,9,0,0,9,1 -ExtBfwUl8=2,9,0,0,9,1 -ExtBfwUl9=2,9,0,0,9,1 -ExtBfwUl10=2,9,0,0,9,1 -ExtBfwUl11=2,9,0,0,9,1 -ExtBfwUl12=2,9,0,0,9,1 -ExtBfwUl13=2,9,0,0,9,1 -ExtBfwUl14=2,9,0,0,9,1 -ExtBfwUl15=2,2,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/801/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/801/config_file_o_ru.dat deleted file mode 100644 index 0e3f297..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/801/config_file_o_ru.dat +++ /dev/null @@ -1,328 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak: 100 % -#301 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 100% 273 3276 100% 273 3276 Peak: 100 % - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - - - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=16 -max_sections_per_symbol=16 - -nPrbElemDl=16 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,18,0,14,5,1,1,9,1 -PrbElemDl6=108,18,0,14,6,1,1,9,1 -PrbElemDl7=126,18,0,14,7,1,1,9,1 -PrbElemDl8=144,18,0,14,8,1,1,9,1 -PrbElemDl9=162,18,0,14,9,1,1,9,1 -PrbElemDl10=180,18,0,14,10,1,1,9,1 -PrbElemDl11=198,18,0,14,11,1,1,9,1 -PrbElemDl12=216,18,0,14,12,1,1,9,1 -PrbElemDl13=234,18,0,14,13,1,1,9,1 -PrbElemDl14=252,18,0,14,14,1,1,9,1 -PrbElemDl15=270,3,0,14,15,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,9,0,0,9,1 -ExtBfwDl6=2,9,0,0,9,1 -ExtBfwDl7=2,9,0,0,9,1 -ExtBfwDl8=2,9,0,0,9,1 -ExtBfwDl9=2,9,0,0,9,1 -ExtBfwDl10=2,9,0,0,9,1 -ExtBfwDl11=2,9,0,0,9,1 -ExtBfwDl12=2,9,0,0,9,1 -ExtBfwDl13=2,9,0,0,9,1 -ExtBfwDl14=2,9,0,0,9,1 -ExtBfwDl15=2,2,0,0,9,1 - - -nPrbElemUl=16 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,18,0,14,5,1,1,9,1 -PrbElemUl6=108,18,0,14,6,1,1,9,1 -PrbElemUl7=126,18,0,14,7,1,1,9,1 -PrbElemUl8=144,18,0,14,8,1,1,9,1 -PrbElemUl9=162,18,0,14,9,1,1,9,1 -PrbElemUl10=180,18,0,14,10,1,1,9,1 -PrbElemUl11=198,18,0,14,11,1,1,9,1 -PrbElemUl12=216,18,0,14,12,1,1,9,1 -PrbElemUl13=234,18,0,14,13,1,1,9,1 -PrbElemUl14=252,18,0,14,14,1,1,9,1 -PrbElemUl15=270,3,0,14,15,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,9,0,0,9,1 -ExtBfwUl6=2,9,0,0,9,1 -ExtBfwUl7=2,9,0,0,9,1 -ExtBfwUl8=2,9,0,0,9,1 -ExtBfwUl9=2,9,0,0,9,1 -ExtBfwUl10=2,9,0,0,9,1 -ExtBfwUl11=2,9,0,0,9,1 -ExtBfwUl12=2,9,0,0,9,1 -ExtBfwUl13=2,9,0,0,9,1 -ExtBfwUl14=2,9,0,0,9,1 -ExtBfwUl15=2,2,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/801/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/801/usecase_du.cfg deleted file mode 100644 index 9b90a1c..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/801/usecase_du.cfg +++ /dev/null @@ -1,58 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=10 # core id -#ioWorker=0xE00000C00000 # mask [0- no workers] -ioWorker=0x1C000000001800 -dpdkMemorySize=8192 -iovaMode=0 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 - -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/802/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/802/config_file_o_du.dat index 292f860..6edb472 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/802/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/802/config_file_o_du.dat @@ -115,11 +115,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/802/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/802/config_file_o_ru.dat index 2835621..e625496 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/802/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/802/config_file_o_ru.dat @@ -95,11 +95,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin @@ -166,10 +169,6 @@ antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - ########################################################### ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/803/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/803/config_file_o_du.dat deleted file mode 100644 index 4307fd6..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/803/config_file_o_du.dat +++ /dev/null @@ -1,241 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#NC -#12% -#303 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 4 37% 100 1200 37% 100 1200 NC: 12% - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=12 -max_sections_per_symbol=12 - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,5,0,0,9,1 - - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,5,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/803/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/803/config_file_o_ru.dat deleted file mode 100644 index d8a0383..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/803/config_file_o_ru.dat +++ /dev/null @@ -1,284 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#NC -#12% -#303 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 4 37% 100 1200 37% 100 1200 NC: 12% - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=12 -max_sections_per_symbol=12 - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,5,0,0,9,1 - - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,5,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/804/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/804/config_file_o_du.dat deleted file mode 100644 index 37ef4be..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/804/config_file_o_du.dat +++ /dev/null @@ -1,240 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#MC -#20% -#304 TDD DDDFU: S it's 10:2:2 1 64T64R 100 8 4 37% 100 1200 37% 100 1200 MC: 20% - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=12 -max_sections_per_symbol=12 - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,5,0,0,9,1 - - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,5,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/804/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/804/config_file_o_ru.dat deleted file mode 100644 index 6347d8e..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/804/config_file_o_ru.dat +++ /dev/null @@ -1,290 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#MC -#20% -#304 TDD DDDFU: S it's 10:2:2 1 64T64R 100 8 4 37% 100 1200 37% 100 1200 MC: 20% - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - -#DL PRB / % Used RBs UL PRB / % Used RBs -#66% 180 33% 90 - -########################################################### -##Section Settings -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=12 -max_sections_per_symbol=12 - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,5,0,0,9,1 - - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,5,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/804/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/804/usecase_du.cfg deleted file mode 100644 index f6efede..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/804/usecase_du.cfg +++ /dev/null @@ -1,58 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=10 # core id -ioWorker=0x4000000000000 # mask [0- no workers] -dpdkMemorySize=8192 - -iovaMode=0 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 - -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/805/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/805/config_file_o_du.dat deleted file mode 100644 index b743972..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/805/config_file_o_du.dat +++ /dev/null @@ -1,241 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#MEC -#28% -#305 TDD DDDFU: S it's 10:2:2 1 64T64R 100 4 2 37% 100 1200 37% 100 1200 MEC: 28% - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=12 -max_sections_per_symbol=12 - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,5,0,0,9,1 - - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,5,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/805/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/805/config_file_o_ru.dat deleted file mode 100644 index adefa71..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/805/config_file_o_ru.dat +++ /dev/null @@ -1,285 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#MEC -#28% -#305 TDD DDDFU: S it's 10:2:2 1 64T64R 100 4 2 37% 100 1200 37% 100 1200 MEC: 28% - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=12 -max_sections_per_symbol=12 - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,5,0,0,9,1 - - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,5,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/805/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/805/usecase_du.cfg deleted file mode 100644 index f6efede..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/805/usecase_du.cfg +++ /dev/null @@ -1,58 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=10 # core id -ioWorker=0x4000000000000 # mask [0- no workers] -dpdkMemorySize=8192 - -iovaMode=0 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 - -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/806/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/806/config_file_o_du.dat deleted file mode 100644 index c9d4c3e..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/806/config_file_o_du.dat +++ /dev/null @@ -1,242 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#EC -#36% -#306 TDD DDDFU: S it's 10:2:2 1 64T64R 100 2 1 37% 100 1200 37% 100 1200 EC: 36% - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=1 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=12 -max_sections_per_symbol=12 - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,5,0,0,9,1 - - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,5,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/806/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/806/config_file_o_ru.dat deleted file mode 100644 index 14964ca..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/806/config_file_o_ru.dat +++ /dev/null @@ -1,284 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#EC -#36% -#306 TDD DDDFU: S it's 10:2:2 1 64T64R 100 2 1 37% 100 1200 37% 100 1200 EC: 36% - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=1 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=12 -max_sections_per_symbol=12 - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,5,0,0,9,1 - - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,5,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/806/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/806/usecase_du.cfg deleted file mode 100644 index f6efede..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/806/usecase_du.cfg +++ /dev/null @@ -1,58 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=10 # core id -ioWorker=0x4000000000000 # mask [0- no workers] -dpdkMemorySize=8192 - -iovaMode=0 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 - -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/806/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/806/usecase_ru.cfg deleted file mode 100644 index 7d7d28a..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/806/usecase_ru.cfg +++ /dev/null @@ -1,56 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -mainCore=0 #core for main() -systemCore=2 -ioCore=4 # core id -ioWorker=0x3E0 # second socket -dpdkMemorySize=8192 -#dpdkMemorySize=17408 -iovaMode=0 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/811/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/811/config_file_o_du.dat deleted file mode 100644 index d5d4660..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/811/config_file_o_du.dat +++ /dev/null @@ -1,281 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak: 100 % -#311 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 16 100% 273 3276 100% 273 3276 Peak: 100 % - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=16 -max_sections_per_symbol=16 - -nPrbElemDl=16 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,18,0,14,5,1,1,9,1 -PrbElemDl6=108,18,0,14,6,1,1,9,1 -PrbElemDl7=126,18,0,14,7,1,1,9,1 -PrbElemDl8=144,18,0,14,8,1,1,9,1 -PrbElemDl9=162,18,0,14,9,1,1,9,1 -PrbElemDl10=180,18,0,14,10,1,1,9,1 -PrbElemDl11=198,18,0,14,11,1,1,9,1 -PrbElemDl12=216,18,0,14,12,1,1,9,1 -PrbElemDl13=234,18,0,14,13,1,1,9,1 -PrbElemDl14=252,18,0,14,14,1,1,9,1 -PrbElemDl15=270,3,0,14,15,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,9,0,0,9,1 -ExtBfwDl6=2,9,0,0,9,1 -ExtBfwDl7=2,9,0,0,9,1 -ExtBfwDl8=2,9,0,0,9,1 -ExtBfwDl9=2,9,0,0,9,1 -ExtBfwDl10=2,9,0,0,9,1 -ExtBfwDl11=2,9,0,0,9,1 -ExtBfwDl12=2,9,0,0,9,1 -ExtBfwDl13=2,9,0,0,9,1 -ExtBfwDl14=2,9,0,0,9,1 -ExtBfwDl15=2,2,0,0,9,1 - - -nPrbElemUl=16 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,18,0,14,5,1,1,9,1 -PrbElemUl6=108,18,0,14,6,1,1,9,1 -PrbElemUl7=126,18,0,14,7,1,1,9,1 -PrbElemUl8=144,18,0,14,8,1,1,9,1 -PrbElemUl9=162,18,0,14,9,1,1,9,1 -PrbElemUl10=180,18,0,14,10,1,1,9,1 -PrbElemUl11=198,18,0,14,11,1,1,9,1 -PrbElemUl12=216,18,0,14,12,1,1,9,1 -PrbElemUl13=234,18,0,14,13,1,1,9,1 -PrbElemUl14=252,18,0,14,14,1,1,9,1 -PrbElemUl15=270,3,0,14,15,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,9,0,0,9,1 -ExtBfwUl6=2,9,0,0,9,1 -ExtBfwUl7=2,9,0,0,9,1 -ExtBfwUl8=2,9,0,0,9,1 -ExtBfwUl9=2,9,0,0,9,1 -ExtBfwUl10=2,9,0,0,9,1 -ExtBfwUl11=2,9,0,0,9,1 -ExtBfwUl12=2,9,0,0,9,1 -ExtBfwUl13=2,9,0,0,9,1 -ExtBfwUl14=2,9,0,0,9,1 -ExtBfwUl15=2,2,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/811/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/811/config_file_o_ru.dat deleted file mode 100644 index 4b1fc45..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/811/config_file_o_ru.dat +++ /dev/null @@ -1,328 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#Peak: 100 % -#311 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 16 100% 273 3276 100% 273 3276 Peak: 100 % - - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - - - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin - - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=16 -max_sections_per_symbol=16 - -nPrbElemDl=16 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,18,0,14,5,1,1,9,1 -PrbElemDl6=108,18,0,14,6,1,1,9,1 -PrbElemDl7=126,18,0,14,7,1,1,9,1 -PrbElemDl8=144,18,0,14,8,1,1,9,1 -PrbElemDl9=162,18,0,14,9,1,1,9,1 -PrbElemDl10=180,18,0,14,10,1,1,9,1 -PrbElemDl11=198,18,0,14,11,1,1,9,1 -PrbElemDl12=216,18,0,14,12,1,1,9,1 -PrbElemDl13=234,18,0,14,13,1,1,9,1 -PrbElemDl14=252,18,0,14,14,1,1,9,1 -PrbElemDl15=270,3,0,14,15,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,9,0,0,9,1 -ExtBfwDl6=2,9,0,0,9,1 -ExtBfwDl7=2,9,0,0,9,1 -ExtBfwDl8=2,9,0,0,9,1 -ExtBfwDl9=2,9,0,0,9,1 -ExtBfwDl10=2,9,0,0,9,1 -ExtBfwDl11=2,9,0,0,9,1 -ExtBfwDl12=2,9,0,0,9,1 -ExtBfwDl13=2,9,0,0,9,1 -ExtBfwDl14=2,9,0,0,9,1 -ExtBfwDl15=2,2,0,0,9,1 - - -nPrbElemUl=16 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,18,0,14,5,1,1,9,1 -PrbElemUl6=108,18,0,14,6,1,1,9,1 -PrbElemUl7=126,18,0,14,7,1,1,9,1 -PrbElemUl8=144,18,0,14,8,1,1,9,1 -PrbElemUl9=162,18,0,14,9,1,1,9,1 -PrbElemUl10=180,18,0,14,10,1,1,9,1 -PrbElemUl11=198,18,0,14,11,1,1,9,1 -PrbElemUl12=216,18,0,14,12,1,1,9,1 -PrbElemUl13=234,18,0,14,13,1,1,9,1 -PrbElemUl14=252,18,0,14,14,1,1,9,1 -PrbElemUl15=270,3,0,14,15,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,9,0,0,9,1 -ExtBfwUl6=2,9,0,0,9,1 -ExtBfwUl7=2,9,0,0,9,1 -ExtBfwUl8=2,9,0,0,9,1 -ExtBfwUl9=2,9,0,0,9,1 -ExtBfwUl10=2,9,0,0,9,1 -ExtBfwUl11=2,9,0,0,9,1 -ExtBfwUl12=2,9,0,0,9,1 -ExtBfwUl13=2,9,0,0,9,1 -ExtBfwUl14=2,9,0,0,9,1 -ExtBfwUl15=2,2,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/811/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/811/usecase_ru.cfg deleted file mode 100644 index 7d7d28a..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/811/usecase_ru.cfg +++ /dev/null @@ -1,56 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -mainCore=0 #core for main() -systemCore=2 -ioCore=4 # core id -ioWorker=0x3E0 # second socket -dpdkMemorySize=8192 -#dpdkMemorySize=17408 -iovaMode=0 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/812/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/812/config_file_o_du.dat index 8b7dcdb..cf55ede 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/812/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/812/config_file_o_du.dat @@ -115,11 +115,14 @@ UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX ante UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/812/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/812/config_file_o_ru.dat index 7f07925..f647eae 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/812/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/812/config_file_o_ru.dat @@ -95,11 +95,14 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=2 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/813/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/813/config_file_o_du.dat deleted file mode 100644 index badeb9e..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/813/config_file_o_du.dat +++ /dev/null @@ -1,241 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#NC -#12% -#313 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 NC: 12% - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=12 -max_sections_per_symbol=12 - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,5,0,0,9,1 - - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,5,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/813/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/813/config_file_o_ru.dat deleted file mode 100644 index 2ac67b0..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/813/config_file_o_ru.dat +++ /dev/null @@ -1,284 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#NC -#12% -#313 TDD DDDFU: S it's 10:2:2 1 64T64R 100 16 8 37% 100 1200 37% 100 1200 NC: 12% - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=12 -max_sections_per_symbol=12 - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,5,0,0,9,1 - - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,5,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/813/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/813/usecase_du.cfg deleted file mode 100644 index f6efede..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/813/usecase_du.cfg +++ /dev/null @@ -1,58 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=10 # core id -ioWorker=0x4000000000000 # mask [0- no workers] -dpdkMemorySize=8192 - -iovaMode=0 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 - -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/813/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/813/usecase_ru.cfg deleted file mode 100644 index 7d7d28a..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/813/usecase_ru.cfg +++ /dev/null @@ -1,56 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -mainCore=0 #core for main() -systemCore=2 -ioCore=4 # core id -ioWorker=0x3E0 # second socket -dpdkMemorySize=8192 -#dpdkMemorySize=17408 -iovaMode=0 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/814/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/814/config_file_o_du.dat deleted file mode 100644 index 92d8164..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/814/config_file_o_du.dat +++ /dev/null @@ -1,240 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#MC -#20% -#314 TDD DDDFU: S it's 10:2:2 1 64T64R 100 8 8 37% 100 1200 37% 100 1200 MC: 20% - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=12 -max_sections_per_symbol=12 - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,5,0,0,9,1 - - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,5,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/814/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/814/config_file_o_ru.dat deleted file mode 100644 index 59a261a..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/814/config_file_o_ru.dat +++ /dev/null @@ -1,284 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#MC -#20% -#314 TDD DDDFU: S it's 10:2:2 1 64T64R 100 8 8 37% 100 1200 37% 100 1200 MC: 20% - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=12 -max_sections_per_symbol=12 - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,5,0,0,9,1 - - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,5,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/814/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/814/usecase_du.cfg deleted file mode 100644 index f6efede..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/814/usecase_du.cfg +++ /dev/null @@ -1,58 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=10 # core id -ioWorker=0x4000000000000 # mask [0- no workers] -dpdkMemorySize=8192 - -iovaMode=0 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 - -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/814/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/814/usecase_ru.cfg deleted file mode 100644 index 7d7d28a..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/814/usecase_ru.cfg +++ /dev/null @@ -1,56 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -mainCore=0 #core for main() -systemCore=2 -ioCore=4 # core id -ioWorker=0x3E0 # second socket -dpdkMemorySize=8192 -#dpdkMemorySize=17408 -iovaMode=0 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/815/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/815/config_file_o_du.dat deleted file mode 100644 index 8c5624e..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/815/config_file_o_du.dat +++ /dev/null @@ -1,241 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#MEC -#28% -#315 TDD DDDFU: S it's 10:2:2 1 64T64R 100 4 4 37% 100 1200 37% 100 1200 MEC: 28% - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=12 -max_sections_per_symbol=12 - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,5,0,0,9,1 - - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,5,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/815/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/815/config_file_o_ru.dat deleted file mode 100644 index 1f26676..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/815/config_file_o_ru.dat +++ /dev/null @@ -1,284 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#MEC -#28% -#315 TDD DDDFU: S it's 10:2:2 1 64T64R 100 4 4 37% 100 1200 37% 100 1200 MEC: 28% - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=12 -max_sections_per_symbol=12 - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,5,0,0,9,1 - - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,5,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/815/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/815/usecase_du.cfg deleted file mode 100644 index f6efede..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/815/usecase_du.cfg +++ /dev/null @@ -1,58 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=10 # core id -ioWorker=0x4000000000000 # mask [0- no workers] -dpdkMemorySize=8192 - -iovaMode=0 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 - -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/815/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/815/usecase_ru.cfg deleted file mode 100644 index 7d7d28a..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/815/usecase_ru.cfg +++ /dev/null @@ -1,56 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -mainCore=0 #core for main() -systemCore=2 -ioCore=4 # core id -ioWorker=0x3E0 # second socket -dpdkMemorySize=8192 -#dpdkMemorySize=17408 -iovaMode=0 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/816/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/816/config_file_o_du.dat deleted file mode 100644 index 598fce0..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/816/config_file_o_du.dat +++ /dev/null @@ -1,242 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#EC -#36% -#316 TDD DDDFU: S it's 10:2:2 1 64T64R 100 2 2 37% 100 1200 37% 100 1200 EC: 36% - - - -# This is simple configuration file. Use '#' sign for comments -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system -appMode=0 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)] -DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - -#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)] -UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] -UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] - - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=12 -max_sections_per_symbol=12 - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,5,0,0,9,1 - - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,5,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/816/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/816/config_file_o_ru.dat deleted file mode 100644 index 4fece74..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/816/config_file_o_ru.dat +++ /dev/null @@ -1,284 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ - -#EC -#36% -#316 TDD DDDFU: S it's 10:2:2 1 64T64R 100 2 2 37% 100 1200 37% 100 1200 EC: 36% - -# This is simple configuration file. Use '#' sign for comments -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -appMode=1 # O-DU(0) | O-RU(1) -xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU) -ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4) -antNum=2 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B -antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B -antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R - -#UEs -muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources -DlLayersPerUe=1 #number of RX anntennas on DL UE side -UlLayersPerUe=1 #number of TX anntennas on UL UE side - - -##Numerology -mu=1 #30Khz Sub Carrier Spacing - -ttiPeriod=500 # in us TTI period (30Khz default 500us) - -nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 -nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400 -nDLFftSize=4096 -nULFftSize=4096 - -nFrameDuplexType=1 # 0 - FDD 1 - TDD -nTddPeriod=5 #[0-9] DDDFU, for S it's 10:2:2 -sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD -sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD - -MTUSize=1500 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single - #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) -Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec -Gps_Beta=0 - -numSlots=20 #number of slots per IQ files -antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0 -antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0 -antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0 -antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0 -antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1 -antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1 -antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1 -antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1 -antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2 -antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2 -antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2 -antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2 -antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3 -antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 -antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 -antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 - -rachEanble=0 # Enable (1)| disable (0) PRACH configuration -prachConfigIndex=189 - -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=1 # (1<<13) symbol used for SRS (def: sym 13) - -antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin -antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin -antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin -antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin -antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin -antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin -antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin -antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin -antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin -########################################################### -##Section Settings -DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used -max_sections_per_slot=12 -max_sections_per_symbol=12 - -nPrbElemDl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemDl0=0,18,0,14,0,1,1,9,1 -PrbElemDl1=18,18,0,14,1,1,1,9,1 -PrbElemDl2=36,18,0,14,2,1,1,9,1 -PrbElemDl3=54,18,0,14,3,1,1,9,1 -PrbElemDl4=72,18,0,14,4,1,1,9,1 -PrbElemDl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwDl0=2,9,0,0,9,1 -ExtBfwDl1=2,9,0,0,9,1 -ExtBfwDl2=2,9,0,0,9,1 -ExtBfwDl3=2,9,0,0,9,1 -ExtBfwDl4=2,9,0,0,9,1 -ExtBfwDl5=2,5,0,0,9,1 - - -nPrbElemUl=6 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -# weight base beams -PrbElemUl0=0,18,0,14,0,1,1,9,1 -PrbElemUl1=18,18,0,14,1,1,1,9,1 -PrbElemUl2=36,18,0,14,2,1,1,9,1 -PrbElemUl3=54,18,0,14,3,1,1,9,1 -PrbElemUl4=72,18,0,14,4,1,1,9,1 -PrbElemUl5=90,10,0,14,5,1,1,9,1 - -# Extension Parameters for Beamforming weights -# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth -ExtBfwUl0=2,9,0,0,9,1 -ExtBfwUl1=2,9,0,0,9,1 -ExtBfwUl2=2,9,0,0,9,1 -ExtBfwUl3=2,9,0,0,9,1 -ExtBfwUl4=2,9,0,0,9,1 -ExtBfwUl5=2,5,0,0,9,1 - - -nPrbElemSrs=11 -#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType -PrbElemSrs0=0,30,0,1,0,0,1,9,0 -PrbElemSrs1=30,30,0,1,0,0,1,9,0 -PrbElemSrs2=60,30,0,1,0,0,1,9,0 -PrbElemSrs3=90,30,0,1,0,0,1,9,0 -PrbElemSrs4=120,30,0,1,0,0,1,9,0 -PrbElemSrs5=150,30,0,1,0,0,1,9,0 -PrbElemSrs6=180,30,0,1,0,0,1,9,0 -PrbElemSrs7=210,30,0,1,0,0,1,9,0 -PrbElemSrs8=240,30,0,1,0,0,1,9,0 -PrbElemSrs9=270,30,0,1,0,0,1,9,0 -PrbElemSrs10=270,3,0,1,0,0,1,9,0 - - -########################################################### - -## control of IQ byte order -iqswap=0 #do swap of IQ before send buffer to eth -nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order -compression=1 # (1) compression enabled (0) compression disabled -compType=1 # (1) Static Compression with config info sent over the M-Plane (0) Dynamic compression with configuration sent over the C and U Plane -##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) -debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary -bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode - -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled - -##O-RU Settings -totalBFWeights=64 # Total number of Beamforming Weights on RU - -Tadv_cp_dl=25 # in us - # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages -#Reception Window C-plane DL -T2a_min_cp_dl=285 # 285.42us -T2a_max_cp_dl=429 # 428.12us - -#Reception Window C-plane UL -T2a_min_cp_ul=285 # 285.42us -T2a_max_cp_ul=429 # 428.12us - -#Reception Window U-plane -T2a_min_up=71 # 71.35in us -T2a_max_up=428 # 428.12us - -#Transmission Window -Ta3_min=20 # in us -Ta3_max=32 # in us - -########################################################### -##O-DU Settings -#C-plane -#Transmission Window Fast C-plane DL -T1a_min_cp_dl=285 -T1a_max_cp_dl=429 - -##Transmission Window Fast C-plane UL -T1a_min_cp_ul=285 -T1a_max_cp_ul=300 - -#U-plane -##Transmission Window -T1a_min_up=96 #71 + 25 us -T1a_max_up=196 #71 + 25 us - -#Reception Window -Ta4_min=0 # in us -Ta4_max=75 # in us -########################################################### - diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/816/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/816/usecase_du.cfg deleted file mode 100644 index f6efede..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/816/usecase_du.cfg +++ /dev/null @@ -1,58 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=0 # All O-DU(0) | O-RU(1) -instanceId=0 # 0,1,2,... in case more than 1 application started on the same system - -mainCore=0 #core for main() -systemCore=2 -ioCore=10 # core id -ioWorker=0x4000000000000 # mask [0- no workers] -dpdkMemorySize=8192 - -iovaMode=0 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_du.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:01 -oXuRem0Mac1=00:11:22:33:00:11 - -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:21 -oXuRem0Mac3=00:11:22:33:00:31 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:01 -oXuRem1Mac1=00:11:22:33:01:11 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:21 -oXuRem1Mac3=00:11:22:33:01:31 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:01 -oXuRem2Mac1=00:11:22:33:02:11 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:21 -oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/816/usecase_ru.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/816/usecase_ru.cfg deleted file mode 100644 index 7d7d28a..0000000 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/816/usecase_ru.cfg +++ /dev/null @@ -1,56 +0,0 @@ -#****************************************************************************** -# -# Copyright (c) 2019 Intel. -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -#******************************************************************************/ -# This is simple configuration file. Use '#' sign for comments -appMode=1 # All O-DU(0) | O-RU(1) -instanceId=1 # 0,1,2,... in case more than 1 application started on the same system -mainCore=0 #core for main() -systemCore=2 -ioCore=4 # core id -ioWorker=0x3E0 # second socket -dpdkMemorySize=8192 -#dpdkMemorySize=17408 -iovaMode=0 - -oXuNum=1 # numbers of O-RU connected to O-DU - -oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU -oXuLinesNumber=2 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) -oXuCPon1Vf=1 # (1) - C- plane and U-plane on the same set of VFs. (0) - C-plane and U-Plane use dedicated VFs - -oXuCfgFile0=./config_file_o_ru.dat #O-RU0 - -# remote O-XU 0 Eth Link 0 -oXuRem0Mac0=00:11:22:33:00:00 -oXuRem0Mac1=00:11:22:33:00:10 -# remote O-XU 0 Eth Link 1 -oXuRem0Mac2=00:11:22:33:00:20 -oXuRem0Mac3=00:11:22:33:00:30 - -# remote O-XU 1 Eth Link 0 -oXuRem1Mac0=00:11:22:33:01:00 -oXuRem1Mac1=00:11:22:33:01:10 -# remote O-XU 1 Eth Link 1 -oXuRem1Mac2=00:11:22:33:01:20 -oXuRem1Mac3=00:11:22:33:01:30 - -# remote O-XU 2 Eth Link 0 -oXuRem2Mac0=00:11:22:33:02:00 -oXuRem2Mac1=00:11:22:33:02:10 -# remote O-XU 2 Eth Link 1 -oXuRem2Mac2=00:11:22:33:02:20 -oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..81b0e03 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 6 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/cat_b/mu1_100mhz/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/config_file_o_du.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/config_file_o_du.dat index ba953d9..61572f7 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/config_file_o_du.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/config_file_o_du.dat @@ -113,11 +113,14 @@ UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX anten UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points] UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points] -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) ########################################################### ##Section Settings diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/config_file_o_ru.dat b/fhi_lib/app/usecase/cat_b/mu1_100mhz/config_file_o_ru.dat index fecb7e4..cfb7c1f 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/config_file_o_ru.dat @@ -110,11 +110,15 @@ antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3 antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3 antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3 -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 -srsEanble=1 # Enable (1)| disable (0) SRS -srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) +srsEnable=1 # Enable (1)| disable (0) SRS +srsSym=4 # deprecated +srsSlot=3 # scheduled SRS slot within TDD period +srsNdmOffset=3 # delay offset to start NDM SRS U-Plane +srsNdmTxDuration=4 # TX duration for NDM SRTS U-Plane (numberof of symbols) + antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/usecase_du.cfg b/fhi_lib/app/usecase/cat_b/mu1_100mhz/usecase_du.cfg index 5c067f4..1c0bb78 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/usecase_du.cfg +++ b/fhi_lib/app/usecase/cat_b/mu1_100mhz/usecase_du.cfg @@ -26,6 +26,8 @@ oXuNum=1 # numbers of O-RU connected to O-DU oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml + oXuCfgFile0=./config_file_o_du.dat #O-RU0 #O-XU 0 diff --git a/fhi_lib/app/usecase/dss/mu0_10mhz/10/config_file_o_du.dat b/fhi_lib/app/usecase/dss/mu0_10mhz/10/config_file_o_du.dat new file mode 100644 index 0000000..796d557 --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_10mhz/10/config_file_o_du.dat @@ -0,0 +1,127 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU (0) | RU(1) +xranRanTech=1 # 5G-NR (0) | LTE (1) +xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=0 #15Khz Sub Carrier Spacing +ttiPeriod=1000 # in us TTI period (15Khz default 1000us) +nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=1024 +nULFftSize=1024 + +nFrameDuplexType=0 # 0 - FDD 1 - TDD +nTddPeriod=0 #TDD priod e.g. DDDS 4 + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +ioSleep=1 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/dss/mu0_10mhz/ant_0.bin #CC0 +antC1=./usecase/dss/mu0_10mhz/ant_1.bin #CC0 +antC2=./usecase/dss/mu0_10mhz/ant_2.bin #CC0 +antC3=./usecase/dss/mu0_10mhz/ant_3.bin #CC0 + +## RACH TODO: update for PRACH +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index +prachConfigIndexLTE=189 # PRACH config index for LTE +########################################################### +##Section Settings +dssEnable=1 # Enable (1)| disable (0) - flag to enable extType-9 +dssPeriod=5 +technology=1,1,0,0,1 #Consider each comma separated value as a technology(NR/LTE) for a given slot. 1-NR, 0-LTE. this pattern repeats after every dssPeriod +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +#CID settings +DU_Port_ID_bitwidth=2 +BandSector_ID_bitwidth=3 +CC_ID_bitwidth=3 +RU_Port_ID_bitwidth=8 + +# LTE-FDD-FR1-CAT-A-NoBF / LTE-FDD-FR1-CAT-A-DBF +# O-RAN.WG4.IOT.0-v02.00 +# Table A.2.3.2-1: LTE FDD IOT Profile 2 - LTE-FDD-FR1-CAT-A-NoBF + +#U-plane +##Transmission Window +T1a_max_up=437 +T1a_min_up=366 + +#Reception Window U-plane +T2a_max_up=437 +T2a_min_up=206 + +Tadv_cp_dl=125 + +#Transmission Window +Ta3_max=232 #in us +Ta3_min=70 #in us + +#Reception Window +Ta4_max=392 +Ta4_min=70 + +##Transmission Window Fast C-plane UL +T1a_max_cp_ul=356 +T1a_min_cp_ul=285 + +#Reception Window C-plane UL +T2a_max_cp_ul=356 #in us +T2a_min_cp_ul=125 #in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_max_cp_dl=562 #in T1a_max_up + Tcp_adv_dl as per Annex B +T1a_min_cp_dl=491 #in T1a_min_up + Tcp_adv_dl as per Annex B + +#O-RU Reception Window C-plane DL +T2a_max_cp_dl=562 #in T2a_max_up + Tcp_adv_dl as per Annex B +T2a_min_cp_dl=331 #in T2a_min_up + Tcp_adv_dl as per Annex B +########################################################### + diff --git a/fhi_lib/app/usecase/dss/mu0_10mhz/10/config_file_o_ru.dat b/fhi_lib/app/usecase/dss/mu0_10mhz/10/config_file_o_ru.dat new file mode 100644 index 0000000..57419db --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_10mhz/10/config_file_o_ru.dat @@ -0,0 +1,135 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranRanTech=1 # 5G-NR (0) | LTE (1) +xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=0 #15Khz Sub Carrier Spacing +ttiPeriod=1000 # in us TTI period (15Khz default 1000us) +nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=1024 +nULFftSize=1024 + +nFrameDuplexType=0 # 0 - FDD 1 - TDD +nTddPeriod=0 #TDD priod e.g. DDDS 4 + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=10 +ioSleep=1 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/dss/mu0_10mhz/ant_0.bin #CC0 +antC1=./usecase/dss/mu0_10mhz/ant_1.bin #CC0 +antC2=./usecase/dss/mu0_10mhz/ant_2.bin #CC0 +antC3=./usecase/dss/mu0_10mhz/ant_3.bin #CC0 + +## RACH TODO: update for PRACH +rachEnable=1 # Enable (1)| disable (0) PRACH configuration +prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index +prachConfigIndexLTE=189 # PRACH config index for LTE + +antPrachC0=./usecase/lte_a/mu0_20mhz/ant_0.bin +antPrachC1=./usecase/lte_a/mu0_20mhz/ant_1.bin +antPrachC2=./usecase/lte_a/mu0_20mhz/ant_2.bin +antPrachC3=./usecase/lte_a/mu0_20mhz/ant_3.bin + +########################################################### +##Section Settings +dssEnable=1 # Enable (1)| disable (0) - flag to enable extType-9 +dssPeriod=5 +technology=1,1,0,0,1 #Consider each comma separated value as a technology(NR/LTE) for a given slot. 1-NR, 0-LTE. this pattern repeats after every dssPeriod +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled +c_plane_vlan_tag=1 #VLAN Tag used for C-Plane +u_plane_vlan_tag=2 #VLAN Tag used for U-Plane + +##RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +#CID settings +DU_Port_ID_bitwidth=2 +BandSector_ID_bitwidth=3 +CC_ID_bitwidth=3 +RU_Port_ID_bitwidth=8 + +# LTE-FDD-FR1-CAT-A-NoBF / LTE-FDD-FR1-CAT-A-DBF +# O-RAN.WG4.IOT.0-v02.00 +# Table A.2.3.2-1: LTE FDD IOT Profile 2 - LTE-FDD-FR1-CAT-A-NoBF + +#U-plane +##Transmission Window +T1a_max_up=437 +T1a_min_up=366 + +#Reception Window U-plane +T2a_max_up=437 +T2a_min_up=206 + +Tadv_cp_dl=125 + +#Transmission Window +Ta3_max=232 #in us +Ta3_min=70 #in us + +#Reception Window +Ta4_max=392 +Ta4_min=70 + +##Transmission Window Fast C-plane UL +T1a_max_cp_ul=356 +T1a_min_cp_ul=285 + +#Reception Window C-plane UL +T2a_max_cp_ul=356 #in us +T2a_min_cp_ul=125 #in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_max_cp_dl=562 #in T1a_max_up + Tcp_adv_dl as per Annex B +T1a_min_cp_dl=491 #in T1a_min_up + Tcp_adv_dl as per Annex B + +#O-RU Reception Window C-plane DL +T2a_max_cp_dl=562 #in T2a_max_up + Tcp_adv_dl as per Annex B +T2a_min_cp_dl=331 #in T2a_min_up + Tcp_adv_dl as per Annex B +########################################################### + diff --git a/fhi_lib/app/usecase/dss/mu0_10mhz/10/usecase_du.cfg b/fhi_lib/app/usecase/dss/mu0_10mhz/10/usecase_du.cfg new file mode 100644 index 0000000..8b923ae --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_10mhz/10/usecase_du.cfg @@ -0,0 +1,73 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ +# This is simple configuration file. Use '#' sign for comments +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +ioCore=5 # core id +ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml + +oXuNum=1 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) + +oXuCfgFile0=./config_file_o_du.dat #O-RU0 + +#O-XU 0 +#PciBusAddoXu0Vf0=0000:51:01.0 +#PciBusAddoXu0Vf1=0000:51:01.1 +#PciBusAddoXu0Vf2=0000:51:01.2 +#PciBusAddoXu0Vf3=0000:51:01.3 + +#O-XU 1 +#PciBusAddoXu1Vf0=0000:51:01.4 +#PciBusAddoXu1Vf1=0000:51:01.5 +#PciBusAddoXu1Vf2=0000:51:01.6 +#PciBusAddoXu1Vf3=0000:51:01.7 + +#O-XU 2 +#PciBusAddoXu2Vf0=0000:51:02.0 +#PciBusAddoXu2Vf1=0000:51:02.1 +#PciBusAddoXu2Vf2=0000:51:02.2 +#PciBusAddoXu2Vf3=0000:51:02.3 + +# remote O-XU 0 Eth Link 0 +#oXuRem0Mac0=b4:96:91:94:de:40 +#oXuRem0Mac1=b4:96:91:94:de:41 +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 + +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/8/usecase_ru.cfg b/fhi_lib/app/usecase/dss/mu0_10mhz/10/usecase_ru.cfg similarity index 100% rename from fhi_lib/app/usecase/cat_a/mu3_100mhz/8/usecase_ru.cfg rename to fhi_lib/app/usecase/dss/mu0_10mhz/10/usecase_ru.cfg diff --git a/fhi_lib/app/usecase/dss/mu0_10mhz/11/config_file_o_du.dat b/fhi_lib/app/usecase/dss/mu0_10mhz/11/config_file_o_du.dat new file mode 100644 index 0000000..554fb10 --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_10mhz/11/config_file_o_du.dat @@ -0,0 +1,133 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU (0) | RU(1) +xranRanTech=1 # 5G-NR (0) | LTE (1) +xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=0 #15Khz Sub Carrier Spacing +ttiPeriod=1000 # in us TTI period (15Khz default 1000us) +nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=1024 +nULFftSize=1024 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +ioSleep=1 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/dss/mu0_10mhz/ant_0.bin #CC0 +antC1=./usecase/dss/mu0_10mhz/ant_1.bin #CC0 +antC2=./usecase/dss/mu0_10mhz/ant_2.bin #CC0 +antC3=./usecase/dss/mu0_10mhz/ant_3.bin #CC0 + +## RACH TODO: update for PRACH +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +#rachOffset=43 # RB offset for prach detection (see RIU spec) +#rachCfgIdx=14 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +dssEnable=1 # Enable (1)| disable (0) - flag to enable extType-9 +dssPeriod=5 +technology=1,1,0,0,1 #Consider each comma separated value as a technology(NR/LTE) for a given slot. 1-NR, 0-LTE. this pattern repeats after every dssPeriod +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +#CID settings +DU_Port_ID_bitwidth=2 +BandSector_ID_bitwidth=3 +CC_ID_bitwidth=3 +RU_Port_ID_bitwidth=8 + +# LTE-FDD-FR1-CAT-A-NoBF / LTE-FDD-FR1-CAT-A-DBF +# O-RAN.WG4.IOT.0-v02.00 +# Table A.2.3.2-1: LTE FDD IOT Profile 2 - LTE-FDD-FR1-CAT-A-NoBF + +#U-plane +##Transmission Window +T1a_max_up=437 +T1a_min_up=366 + +#Reception Window U-plane +T2a_max_up=437 +T2a_min_up=206 + +Tadv_cp_dl=125 + +#Transmission Window +Ta3_max=232 #in us +Ta3_min=70 #in us + +#Reception Window +Ta4_max=392 +Ta4_min=70 + +##Transmission Window Fast C-plane UL +T1a_max_cp_ul=356 +T1a_min_cp_ul=285 + +#Reception Window C-plane UL +T2a_max_cp_ul=356 #in us +T2a_min_cp_ul=125 #in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_max_cp_dl=562 #in T1a_max_up + Tcp_adv_dl as per Annex B +T1a_min_cp_dl=491 #in T1a_min_up + Tcp_adv_dl as per Annex B + +#O-RU Reception Window C-plane DL +T2a_max_cp_dl=562 #in T2a_max_up + Tcp_adv_dl as per Annex B +T2a_min_cp_dl=331 #in T2a_min_up + Tcp_adv_dl as per Annex B +########################################################### + diff --git a/fhi_lib/app/usecase/dss/mu0_10mhz/11/config_file_o_ru.dat b/fhi_lib/app/usecase/dss/mu0_10mhz/11/config_file_o_ru.dat new file mode 100644 index 0000000..ac5a5cf --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_10mhz/11/config_file_o_ru.dat @@ -0,0 +1,140 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranRanTech=1 # 5G-NR (0) | LTE (1) +xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=0 #15Khz Sub Carrier Spacing +ttiPeriod=1000 # in us TTI period (15Khz default 1000us) +nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=1024 +nULFftSize=1024 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=10 +ioSleep=1 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/dss/mu0_10mhz/ant_0.bin #CC0 +antC1=./usecase/dss/mu0_10mhz/ant_1.bin #CC0 +antC2=./usecase/dss/mu0_10mhz/ant_2.bin #CC0 +antC3=./usecase/dss/mu0_10mhz/ant_3.bin #CC0 + +## RACH TODO: update for PRACH +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +#rachOffset=43 # RB offset for prach detection (see RIU spec) +prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +antPrachC0=./usecase/lte_a/mu0_20mhz/ant_0.bin +antPrachC1=./usecase/lte_a/mu0_20mhz/ant_1.bin +antPrachC2=./usecase/lte_a/mu0_20mhz/ant_2.bin +antPrachC3=./usecase/lte_a/mu0_20mhz/ant_3.bin + +########################################################### +##Section Settings +dssEnable=1 # Enable (1)| disable (0) - flag to enable extType-9 +dssPeriod=5 +technology=1,1,0,0,1 #Consider each comma separated value as a technology(NR/LTE) for a given slot. 1-NR, 0-LTE. this pattern repeats after every dssPeriod +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled +c_plane_vlan_tag=1 #VLAN Tag used for C-Plane +u_plane_vlan_tag=2 #VLAN Tag used for U-Plane + +##RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +#CID settings +DU_Port_ID_bitwidth=2 +BandSector_ID_bitwidth=3 +CC_ID_bitwidth=3 +RU_Port_ID_bitwidth=8 + +# LTE-FDD-FR1-CAT-A-NoBF / LTE-FDD-FR1-CAT-A-DBF +# O-RAN.WG4.IOT.0-v02.00 +# Table A.2.3.2-1: LTE FDD IOT Profile 2 - LTE-FDD-FR1-CAT-A-NoBF + +#U-plane +##Transmission Window +T1a_max_up=437 +T1a_min_up=366 + +#Reception Window U-plane +T2a_max_up=437 +T2a_min_up=206 + +Tadv_cp_dl=125 + +#Transmission Window +Ta3_max=232 #in us +Ta3_min=70 #in us + +#Reception Window +Ta4_max=392 +Ta4_min=70 + +##Transmission Window Fast C-plane UL +T1a_max_cp_ul=356 +T1a_min_cp_ul=285 + +#Reception Window C-plane UL +T2a_max_cp_ul=356 #in us +T2a_min_cp_ul=125 #in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_max_cp_dl=562 #in T1a_max_up + Tcp_adv_dl as per Annex B +T1a_min_cp_dl=491 #in T1a_min_up + Tcp_adv_dl as per Annex B + +#O-RU Reception Window C-plane DL +T2a_max_cp_dl=562 #in T2a_max_up + Tcp_adv_dl as per Annex B +T2a_min_cp_dl=331 #in T2a_min_up + Tcp_adv_dl as per Annex B +########################################################### + diff --git a/fhi_lib/app/usecase/dss/mu0_10mhz/11/usecase_du.cfg b/fhi_lib/app/usecase/dss/mu0_10mhz/11/usecase_du.cfg new file mode 100644 index 0000000..8b923ae --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_10mhz/11/usecase_du.cfg @@ -0,0 +1,73 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ +# This is simple configuration file. Use '#' sign for comments +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +ioCore=5 # core id +ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml + +oXuNum=1 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) + +oXuCfgFile0=./config_file_o_du.dat #O-RU0 + +#O-XU 0 +#PciBusAddoXu0Vf0=0000:51:01.0 +#PciBusAddoXu0Vf1=0000:51:01.1 +#PciBusAddoXu0Vf2=0000:51:01.2 +#PciBusAddoXu0Vf3=0000:51:01.3 + +#O-XU 1 +#PciBusAddoXu1Vf0=0000:51:01.4 +#PciBusAddoXu1Vf1=0000:51:01.5 +#PciBusAddoXu1Vf2=0000:51:01.6 +#PciBusAddoXu1Vf3=0000:51:01.7 + +#O-XU 2 +#PciBusAddoXu2Vf0=0000:51:02.0 +#PciBusAddoXu2Vf1=0000:51:02.1 +#PciBusAddoXu2Vf2=0000:51:02.2 +#PciBusAddoXu2Vf3=0000:51:02.3 + +# remote O-XU 0 Eth Link 0 +#oXuRem0Mac0=b4:96:91:94:de:40 +#oXuRem0Mac1=b4:96:91:94:de:41 +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 + +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/9/usecase_ru.cfg b/fhi_lib/app/usecase/dss/mu0_10mhz/11/usecase_ru.cfg similarity index 100% rename from fhi_lib/app/usecase/cat_a/mu3_100mhz/9/usecase_ru.cfg rename to fhi_lib/app/usecase/dss/mu0_10mhz/11/usecase_ru.cfg diff --git a/fhi_lib/app/usecase/dss/mu0_10mhz/60/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/dss/mu0_10mhz/60/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..0d387ec --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_10mhz/60/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 5 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 6 + + 0,0,0,0,0,0,0,0,0,0,0,0 + + 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000 + + 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/dss/mu0_10mhz/60/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/dss/mu0_10mhz/60/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_10mhz/60/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/dss/mu0_10mhz/60/config_file_o_du.dat b/fhi_lib/app/usecase/dss/mu0_10mhz/60/config_file_o_du.dat new file mode 100644 index 0000000..15ce846 --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_10mhz/60/config_file_o_du.dat @@ -0,0 +1,148 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU (0) | RU(1) +xranRanTech=1 # 5G-NR (0) | LTE (1) +xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) +ccNum=6 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=0 #15Khz Sub Carrier Spacing +ttiPeriod=1000 # in us TTI period (15Khz default 1000us) +nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=1024 +nULFftSize=1024 + +nFrameDuplexType=0 # 0 - FDD 1 - TDD +nTddPeriod=0 #TDD priod e.g. DDDS 4 + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +#ioSleep=1 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/dss/mu0_10mhz/ant_0.bin #CC0 +antC1=./usecase/dss/mu0_10mhz/ant_1.bin #CC0 +antC2=./usecase/dss/mu0_10mhz/ant_2.bin #CC0 +antC3=./usecase/dss/mu0_10mhz/ant_3.bin #CC0 +antC4=./usecase/dss/mu0_10mhz/ant_0.bin #CC1 +antC5=./usecase/dss/mu0_10mhz/ant_1.bin #CC1 +antC6=./usecase/dss/mu0_10mhz/ant_2.bin #CC1 +antC7=./usecase/dss/mu0_10mhz/ant_3.bin #CC1 +antC8=./usecase/dss/mu0_10mhz/ant_0.bin #CC2 +antC9=./usecase/dss/mu0_10mhz/ant_1.bin #CC2 +antC10=./usecase/dss/mu0_10mhz/ant_2.bin #CC2 +antC11=./usecase/dss/mu0_10mhz/ant_3.bin #CC2 +antC12=./usecase/dss/mu0_10mhz/ant_0.bin #CC3 +antC13=./usecase/dss/mu0_10mhz/ant_1.bin #CC3 +antC14=./usecase/dss/mu0_10mhz/ant_2.bin #CC3 +antC15=./usecase/dss/mu0_10mhz/ant_3.bin #CC3 +antC16=./usecase/dss/mu0_10mhz/ant_0.bin #CC4 +antC17=./usecase/dss/mu0_10mhz/ant_1.bin #CC4 +antC18=./usecase/dss/mu0_10mhz/ant_2.bin #CC4 +antC19=./usecase/dss/mu0_10mhz/ant_3.bin #CC4 +antC20=./usecase/dss/mu0_10mhz/ant_0.bin #CC5 +antC21=./usecase/dss/mu0_10mhz/ant_1.bin #CC5 +antC22=./usecase/dss/mu0_10mhz/ant_2.bin #CC5 +antC23=./usecase/dss/mu0_10mhz/ant_3.bin #CC5 + +## RACH TODO: update for PRACH +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +#rachOffset=43 # RB offset for prach detection (see RIU spec) +#rachCfgIdx=14 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +dssEnable=1 # Enable (1)| disable (0) - flag to enable extType-9 +dssPeriod=5 +technology=1,1,0,0,1 #Consider each comma separated value as a technology(NR/LTE) for a given slot. 1-NR, 0-LTE. this pattern repeats after every dssPeriod +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +#CID settings +DU_Port_ID_bitwidth=2 +BandSector_ID_bitwidth=3 +CC_ID_bitwidth=3 +RU_Port_ID_bitwidth=8 + +# LTE-FDD-FR1-CAT-A-NoBF / LTE-FDD-FR1-CAT-A-DBF +# O-RAN.WG4.IOT.0-v02.00 +# Table A.2.3.2-1: LTE FDD IOT Profile 2 - LTE-FDD-FR1-CAT-A-NoBF + +#U-plane +##Transmission Window +T1a_max_up=437 +T1a_min_up=366 + +#Reception Window U-plane +T2a_max_up=437 +T2a_min_up=206 + +Tadv_cp_dl=125 + +#Transmission Window +Ta3_max=232 #in us +Ta3_min=70 #in us + +#Reception Window +Ta4_max=392 +Ta4_min=70 + +##Transmission Window Fast C-plane UL +T1a_max_cp_ul=356 +T1a_min_cp_ul=285 + +#Reception Window C-plane UL +T2a_max_cp_ul=356 #in us +T2a_min_cp_ul=125 #in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_max_cp_dl=562 #in T1a_max_up + Tcp_adv_dl as per Annex B +T1a_min_cp_dl=491 #in T1a_min_up + Tcp_adv_dl as per Annex B + +#O-RU Reception Window C-plane DL +T2a_max_cp_dl=562 #in T2a_max_up + Tcp_adv_dl as per Annex B +T2a_min_cp_dl=331 #in T2a_min_up + Tcp_adv_dl as per Annex B +########################################################### + diff --git a/fhi_lib/app/usecase/dss/mu0_10mhz/60/config_file_o_ru.dat b/fhi_lib/app/usecase/dss/mu0_10mhz/60/config_file_o_ru.dat new file mode 100644 index 0000000..29a17e1 --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_10mhz/60/config_file_o_ru.dat @@ -0,0 +1,155 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranRanTech=1 # 5G-NR (0) | LTE (1) +xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) +ccNum=6 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=0 #15Khz Sub Carrier Spacing +ttiPeriod=1000 # in us TTI period (15Khz default 1000us) +nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=1024 +nULFftSize=1024 + +nFrameDuplexType=0 # 0 - FDD 1 - TDD +nTddPeriod=0 #TDD priod e.g. DDDS 4 + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=10 +#ioSleep=1 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/dss/mu0_10mhz/ant_0.bin #CC0 +antC1=./usecase/dss/mu0_10mhz/ant_1.bin #CC0 +antC2=./usecase/dss/mu0_10mhz/ant_2.bin #CC0 +antC3=./usecase/dss/mu0_10mhz/ant_3.bin #CC0 +antC4=./usecase/dss/mu0_10mhz/ant_0.bin #CC1 +antC5=./usecase/dss/mu0_10mhz/ant_1.bin #CC1 +antC6=./usecase/dss/mu0_10mhz/ant_2.bin #CC1 +antC7=./usecase/dss/mu0_10mhz/ant_3.bin #CC1 +antC8=./usecase/dss/mu0_10mhz/ant_0.bin #CC2 +antC9=./usecase/dss/mu0_10mhz/ant_1.bin #CC2 +antC10=./usecase/dss/mu0_10mhz/ant_2.bin #CC2 +antC11=./usecase/dss/mu0_10mhz/ant_3.bin #CC2 +antC12=./usecase/dss/mu0_10mhz/ant_0.bin #CC3 +antC13=./usecase/dss/mu0_10mhz/ant_1.bin #CC3 +antC14=./usecase/dss/mu0_10mhz/ant_2.bin #CC3 +antC15=./usecase/dss/mu0_10mhz/ant_3.bin #CC3 +antC16=./usecase/dss/mu0_10mhz/ant_0.bin #CC4 +antC17=./usecase/dss/mu0_10mhz/ant_1.bin #CC4 +antC18=./usecase/dss/mu0_10mhz/ant_2.bin #CC4 +antC19=./usecase/dss/mu0_10mhz/ant_3.bin #CC4 +antC20=./usecase/dss/mu0_10mhz/ant_0.bin #CC5 +antC21=./usecase/dss/mu0_10mhz/ant_1.bin #CC5 +antC22=./usecase/dss/mu0_10mhz/ant_2.bin #CC5 +antC23=./usecase/dss/mu0_10mhz/ant_3.bin #CC5 + +## RACH TODO: update for PRACH +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +#rachOffset=43 # RB offset for prach detection (see RIU spec) +prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +antPrachC0=./usecase/lte_a/mu0_20mhz/ant_0.bin +antPrachC1=./usecase/lte_a/mu0_20mhz/ant_1.bin +antPrachC2=./usecase/lte_a/mu0_20mhz/ant_2.bin +antPrachC3=./usecase/lte_a/mu0_20mhz/ant_3.bin + +########################################################### +##Section Settings +dssEnable=1 # Enable (1)| disable (0) - flag to enable extType-9 +dssPeriod=5 +technology=1,1,0,0,1 #Consider each comma separated value as a technology(NR/LTE) for a given slot. 1-NR, 0-LTE. this pattern repeats after every dssPeriod +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled +c_plane_vlan_tag=1 #VLAN Tag used for C-Plane +u_plane_vlan_tag=2 #VLAN Tag used for U-Plane + +##RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +#CID settings +DU_Port_ID_bitwidth=2 +BandSector_ID_bitwidth=3 +CC_ID_bitwidth=3 +RU_Port_ID_bitwidth=8 + +# LTE-FDD-FR1-CAT-A-NoBF / LTE-FDD-FR1-CAT-A-DBF +# O-RAN.WG4.IOT.0-v02.00 +# Table A.2.3.2-1: LTE FDD IOT Profile 2 - LTE-FDD-FR1-CAT-A-NoBF + +#U-plane +##Transmission Window +T1a_max_up=437 +T1a_min_up=366 + +#Reception Window U-plane +T2a_max_up=437 +T2a_min_up=206 + +Tadv_cp_dl=125 + +#Transmission Window +Ta3_max=232 #in us +Ta3_min=70 #in us + +#Reception Window +Ta4_max=392 +Ta4_min=70 + +##Transmission Window Fast C-plane UL +T1a_max_cp_ul=356 +T1a_min_cp_ul=285 + +#Reception Window C-plane UL +T2a_max_cp_ul=356 #in us +T2a_min_cp_ul=125 #in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_max_cp_dl=562 #in T1a_max_up + Tcp_adv_dl as per Annex B +T1a_min_cp_dl=491 #in T1a_min_up + Tcp_adv_dl as per Annex B + +#O-RU Reception Window C-plane DL +T2a_max_cp_dl=562 #in T2a_max_up + Tcp_adv_dl as per Annex B +T2a_min_cp_dl=331 #in T2a_min_up + Tcp_adv_dl as per Annex B +########################################################### + diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/112/usecase_du.cfg b/fhi_lib/app/usecase/dss/mu0_10mhz/60/usecase_du.cfg similarity index 94% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/112/usecase_du.cfg rename to fhi_lib/app/usecase/dss/mu0_10mhz/60/usecase_du.cfg index 5c067f4..868f3da 100644 --- a/fhi_lib/app/usecase/cat_b/mu1_100mhz/112/usecase_du.cfg +++ b/fhi_lib/app/usecase/dss/mu0_10mhz/60/usecase_du.cfg @@ -20,6 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU @@ -46,9 +47,13 @@ oXuCfgFile0=./config_file_o_du.dat #O-RU0 #PciBusAddoXu2Vf2=0000:51:02.2 #PciBusAddoXu2Vf3=0000:51:02.3 +# remote O-XU 0 Eth Link 0 +#oXuRem0Mac0=b4:96:91:94:de:40 +#oXuRem0Mac1=b4:96:91:94:de:41 # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:01 oXuRem0Mac1=00:11:22:33:00:11 + # remote O-XU 0 Eth Link 1 oXuRem0Mac2=00:11:22:33:00:21 oXuRem0Mac3=00:11:22:33:00:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/111/usecase_ru.cfg b/fhi_lib/app/usecase/dss/mu0_10mhz/60/usecase_ru.cfg similarity index 100% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/111/usecase_ru.cfg rename to fhi_lib/app/usecase/dss/mu0_10mhz/60/usecase_ru.cfg diff --git a/fhi_lib/app/usecase/dss/mu0_10mhz/61/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/dss/mu0_10mhz/61/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..0d387ec --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_10mhz/61/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 5 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 6 + + 0,0,0,0,0,0,0,0,0,0,0,0 + + 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000 + + 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/dss/mu0_10mhz/61/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/dss/mu0_10mhz/61/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_10mhz/61/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/dss/mu0_10mhz/61/config_file_o_du.dat b/fhi_lib/app/usecase/dss/mu0_10mhz/61/config_file_o_du.dat new file mode 100644 index 0000000..5b489d2 --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_10mhz/61/config_file_o_du.dat @@ -0,0 +1,153 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU (0) | RU(1) +xranRanTech=1 # 5G-NR (0) | LTE (1) +xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) +ccNum=6 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=0 #15Khz Sub Carrier Spacing +ttiPeriod=1000 # in us TTI period (15Khz default 1000us) +nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=1024 +nULFftSize=1024 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +#ioSleep=1 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/dss/mu0_10mhz/ant_0.bin #CC0 +antC1=./usecase/dss/mu0_10mhz/ant_1.bin #CC0 +antC2=./usecase/dss/mu0_10mhz/ant_2.bin #CC0 +antC3=./usecase/dss/mu0_10mhz/ant_3.bin #CC0 +antC4=./usecase/dss/mu0_10mhz/ant_0.bin #CC1 +antC5=./usecase/dss/mu0_10mhz/ant_1.bin #CC1 +antC6=./usecase/dss/mu0_10mhz/ant_2.bin #CC1 +antC7=./usecase/dss/mu0_10mhz/ant_3.bin #CC1 +antC8=./usecase/dss/mu0_10mhz/ant_0.bin #CC2 +antC9=./usecase/dss/mu0_10mhz/ant_1.bin #CC2 +antC10=./usecase/dss/mu0_10mhz/ant_2.bin #CC2 +antC11=./usecase/dss/mu0_10mhz/ant_3.bin #CC2 +antC12=./usecase/dss/mu0_10mhz/ant_0.bin #CC3 +antC13=./usecase/dss/mu0_10mhz/ant_1.bin #CC3 +antC14=./usecase/dss/mu0_10mhz/ant_2.bin #CC3 +antC15=./usecase/dss/mu0_10mhz/ant_3.bin #CC3 +antC16=./usecase/dss/mu0_10mhz/ant_0.bin #CC4 +antC17=./usecase/dss/mu0_10mhz/ant_1.bin #CC4 +antC18=./usecase/dss/mu0_10mhz/ant_2.bin #CC4 +antC19=./usecase/dss/mu0_10mhz/ant_3.bin #CC4 +antC20=./usecase/dss/mu0_10mhz/ant_0.bin #CC5 +antC21=./usecase/dss/mu0_10mhz/ant_1.bin #CC5 +antC22=./usecase/dss/mu0_10mhz/ant_2.bin #CC5 +antC23=./usecase/dss/mu0_10mhz/ant_3.bin #CC5 + +## RACH TODO: update for PRACH +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +#rachOffset=43 # RB offset for prach detection (see RIU spec) +#rachCfgIdx=14 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +dssEnable=1 # Enable (1)| disable (0) - flag to enable extType-9 +dssPeriod=5 +technology=1,1,0,0,1 #Consider each comma separated value as a technology(NR/LTE) for a given slot. 1-NR, 0-LTE. this pattern repeats after every dssPeriod +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +#CID settings +DU_Port_ID_bitwidth=2 +BandSector_ID_bitwidth=3 +CC_ID_bitwidth=3 +RU_Port_ID_bitwidth=8 + +# LTE-FDD-FR1-CAT-A-NoBF / LTE-FDD-FR1-CAT-A-DBF +# O-RAN.WG4.IOT.0-v02.00 +# Table A.2.3.2-1: LTE FDD IOT Profile 2 - LTE-FDD-FR1-CAT-A-NoBF + +#U-plane +##Transmission Window +T1a_max_up=437 +T1a_min_up=366 + +#Reception Window U-plane +T2a_max_up=437 +T2a_min_up=206 + +Tadv_cp_dl=125 + +#Transmission Window +Ta3_max=232 #in us +Ta3_min=70 #in us + +#Reception Window +Ta4_max=392 +Ta4_min=70 + +##Transmission Window Fast C-plane UL +T1a_max_cp_ul=356 +T1a_min_cp_ul=285 + +#Reception Window C-plane UL +T2a_max_cp_ul=356 #in us +T2a_min_cp_ul=125 #in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_max_cp_dl=562 #in T1a_max_up + Tcp_adv_dl as per Annex B +T1a_min_cp_dl=491 #in T1a_min_up + Tcp_adv_dl as per Annex B + +#O-RU Reception Window C-plane DL +T2a_max_cp_dl=562 #in T2a_max_up + Tcp_adv_dl as per Annex B +T2a_min_cp_dl=331 #in T2a_min_up + Tcp_adv_dl as per Annex B +########################################################### + diff --git a/fhi_lib/app/usecase/dss/mu0_10mhz/61/config_file_o_ru.dat b/fhi_lib/app/usecase/dss/mu0_10mhz/61/config_file_o_ru.dat new file mode 100644 index 0000000..b798394 --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_10mhz/61/config_file_o_ru.dat @@ -0,0 +1,160 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranRanTech=1 # 5G-NR (0) | LTE (1) +xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) +ccNum=6 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=0 #15Khz Sub Carrier Spacing +ttiPeriod=1000 # in us TTI period (15Khz default 1000us) +nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=1024 +nULFftSize=1024 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=10 +#ioSleep=1 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/dss/mu0_10mhz/ant_0.bin #CC0 +antC1=./usecase/dss/mu0_10mhz/ant_1.bin #CC0 +antC2=./usecase/dss/mu0_10mhz/ant_2.bin #CC0 +antC3=./usecase/dss/mu0_10mhz/ant_3.bin #CC0 +antC4=./usecase/dss/mu0_10mhz/ant_0.bin #CC1 +antC5=./usecase/dss/mu0_10mhz/ant_1.bin #CC1 +antC6=./usecase/dss/mu0_10mhz/ant_2.bin #CC1 +antC7=./usecase/dss/mu0_10mhz/ant_3.bin #CC1 +antC8=./usecase/dss/mu0_10mhz/ant_0.bin #CC2 +antC9=./usecase/dss/mu0_10mhz/ant_1.bin #CC2 +antC10=./usecase/dss/mu0_10mhz/ant_2.bin #CC2 +antC11=./usecase/dss/mu0_10mhz/ant_3.bin #CC2 +antC12=./usecase/dss/mu0_10mhz/ant_0.bin #CC3 +antC13=./usecase/dss/mu0_10mhz/ant_1.bin #CC3 +antC14=./usecase/dss/mu0_10mhz/ant_2.bin #CC3 +antC15=./usecase/dss/mu0_10mhz/ant_3.bin #CC3 +antC16=./usecase/dss/mu0_10mhz/ant_0.bin #CC4 +antC17=./usecase/dss/mu0_10mhz/ant_1.bin #CC4 +antC18=./usecase/dss/mu0_10mhz/ant_2.bin #CC4 +antC19=./usecase/dss/mu0_10mhz/ant_3.bin #CC4 +antC20=./usecase/dss/mu0_10mhz/ant_0.bin #CC5 +antC21=./usecase/dss/mu0_10mhz/ant_1.bin #CC5 +antC22=./usecase/dss/mu0_10mhz/ant_2.bin #CC5 +antC23=./usecase/dss/mu0_10mhz/ant_3.bin #CC5 + +## RACH TODO: update for PRACH +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +#rachOffset=43 # RB offset for prach detection (see RIU spec) +prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +antPrachC0=./usecase/lte_a/mu0_20mhz/ant_0.bin +antPrachC1=./usecase/lte_a/mu0_20mhz/ant_1.bin +antPrachC2=./usecase/lte_a/mu0_20mhz/ant_2.bin +antPrachC3=./usecase/lte_a/mu0_20mhz/ant_3.bin + +########################################################### +##Section Settings +dssEnable=1 # Enable (1)| disable (0) - flag to enable extType-9 +dssPeriod=5 +technology=1,1,0,0,1 #Consider each comma separated value as a technology(NR/LTE) for a given slot. 1-NR, 0-LTE. this pattern repeats after every dssPeriod +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled +c_plane_vlan_tag=1 #VLAN Tag used for C-Plane +u_plane_vlan_tag=2 #VLAN Tag used for U-Plane + +##RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +#CID settings +DU_Port_ID_bitwidth=2 +BandSector_ID_bitwidth=3 +CC_ID_bitwidth=3 +RU_Port_ID_bitwidth=8 + +# LTE-FDD-FR1-CAT-A-NoBF / LTE-FDD-FR1-CAT-A-DBF +# O-RAN.WG4.IOT.0-v02.00 +# Table A.2.3.2-1: LTE FDD IOT Profile 2 - LTE-FDD-FR1-CAT-A-NoBF + +#U-plane +##Transmission Window +T1a_max_up=437 +T1a_min_up=366 + +#Reception Window U-plane +T2a_max_up=437 +T2a_min_up=206 + +Tadv_cp_dl=125 + +#Transmission Window +Ta3_max=232 #in us +Ta3_min=70 #in us + +#Reception Window +Ta4_max=392 +Ta4_min=70 + +##Transmission Window Fast C-plane UL +T1a_max_cp_ul=356 +T1a_min_cp_ul=285 + +#Reception Window C-plane UL +T2a_max_cp_ul=356 #in us +T2a_min_cp_ul=125 #in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_max_cp_dl=562 #in T1a_max_up + Tcp_adv_dl as per Annex B +T1a_min_cp_dl=491 #in T1a_min_up + Tcp_adv_dl as per Annex B + +#O-RU Reception Window C-plane DL +T2a_max_cp_dl=562 #in T2a_max_up + Tcp_adv_dl as per Annex B +T2a_min_cp_dl=331 #in T2a_min_up + Tcp_adv_dl as per Annex B +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/9/usecase_du.cfg b/fhi_lib/app/usecase/dss/mu0_10mhz/61/usecase_du.cfg similarity index 94% rename from fhi_lib/app/usecase/cat_a/mu3_100mhz/9/usecase_du.cfg rename to fhi_lib/app/usecase/dss/mu0_10mhz/61/usecase_du.cfg index 5c067f4..868f3da 100644 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/9/usecase_du.cfg +++ b/fhi_lib/app/usecase/dss/mu0_10mhz/61/usecase_du.cfg @@ -20,6 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU @@ -46,9 +47,13 @@ oXuCfgFile0=./config_file_o_du.dat #O-RU0 #PciBusAddoXu2Vf2=0000:51:02.2 #PciBusAddoXu2Vf3=0000:51:02.3 +# remote O-XU 0 Eth Link 0 +#oXuRem0Mac0=b4:96:91:94:de:40 +#oXuRem0Mac1=b4:96:91:94:de:41 # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:01 oXuRem0Mac1=00:11:22:33:00:11 + # remote O-XU 0 Eth Link 1 oXuRem0Mac2=00:11:22:33:00:21 oXuRem0Mac3=00:11:22:33:00:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/112/usecase_ru.cfg b/fhi_lib/app/usecase/dss/mu0_10mhz/61/usecase_ru.cfg similarity index 100% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/112/usecase_ru.cfg rename to fhi_lib/app/usecase/dss/mu0_10mhz/61/usecase_ru.cfg diff --git a/fhi_lib/app/usecase/dss/mu0_10mhz/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/dss/mu0_10mhz/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..ea87359 --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_10mhz/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 0,0,0,0 + + 1000, 1000, 1000, 1000 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/dss/mu0_10mhz/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/dss/mu0_10mhz/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_10mhz/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/dss/mu0_20mhz/10/config_file_o_du.dat b/fhi_lib/app/usecase/dss/mu0_20mhz/10/config_file_o_du.dat new file mode 100644 index 0000000..8d46ae1 --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_20mhz/10/config_file_o_du.dat @@ -0,0 +1,128 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU (0) | RU(1) +xranRanTech=1 # 5G-NR (0) | LTE (1) +xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=0 #15Khz Sub Carrier Spacing +ttiPeriod=1000 # in us TTI period (15Khz default 1000us) +nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=2048 +nULFftSize=2048 + +nFrameDuplexType=0 # 0 - FDD 1 - TDD +nTddPeriod=0 #TDD priod e.g. DDDS 4 + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +ioSleep=1 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/dss/mu0_20mhz/ant_0.bin #CC0 +antC1=./usecase/dss/mu0_20mhz/ant_1.bin #CC0 +antC2=./usecase/dss/mu0_20mhz/ant_2.bin #CC0 +antC3=./usecase/dss/mu0_20mhz/ant_3.bin #CC0 + +## RACH TODO: update for PRACH +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +#rachOffset=43 # RB offset for prach detection (see RIU spec) +#rachCfgIdx=14 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +dssEnable=1 # Enable (1)| disable (0) - flag to enable extType-9 +dssPeriod=5 +technology=1,1,0,0,1 #Consider each comma separated value as a technology(NR/LTE) for a given slot. 1-NR, 0-LTE. this pattern repeats after every dssPeriod +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +#CID settings +DU_Port_ID_bitwidth=2 +BandSector_ID_bitwidth=3 +CC_ID_bitwidth=3 +RU_Port_ID_bitwidth=8 + +# LTE-FDD-FR1-CAT-A-NoBF / LTE-FDD-FR1-CAT-A-DBF +# O-RAN.WG4.IOT.0-v02.00 +# Table A.2.3.2-1: LTE FDD IOT Profile 2 - LTE-FDD-FR1-CAT-A-NoBF + +#U-plane +##Transmission Window +T1a_max_up=437 +T1a_min_up=366 + +#Reception Window U-plane +T2a_max_up=437 +T2a_min_up=206 + +Tadv_cp_dl=125 + +#Transmission Window +Ta3_max=232 #in us +Ta3_min=70 #in us + +#Reception Window +Ta4_max=392 +Ta4_min=70 + +##Transmission Window Fast C-plane UL +T1a_max_cp_ul=356 +T1a_min_cp_ul=285 + +#Reception Window C-plane UL +T2a_max_cp_ul=356 #in us +T2a_min_cp_ul=125 #in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_max_cp_dl=562 #in T1a_max_up + Tcp_adv_dl as per Annex B +T1a_min_cp_dl=491 #in T1a_min_up + Tcp_adv_dl as per Annex B + +#O-RU Reception Window C-plane DL +T2a_max_cp_dl=562 #in T2a_max_up + Tcp_adv_dl as per Annex B +T2a_min_cp_dl=331 #in T2a_min_up + Tcp_adv_dl as per Annex B +########################################################### + diff --git a/fhi_lib/app/usecase/dss/mu0_20mhz/10/config_file_o_ru.dat b/fhi_lib/app/usecase/dss/mu0_20mhz/10/config_file_o_ru.dat new file mode 100644 index 0000000..2f95565 --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_20mhz/10/config_file_o_ru.dat @@ -0,0 +1,135 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranRanTech=1 # 5G-NR (0) | LTE (1) +xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=0 #15Khz Sub Carrier Spacing +ttiPeriod=1000 # in us TTI period (15Khz default 1000us) +nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=2048 +nULFftSize=2048 + +nFrameDuplexType=0 # 0 - FDD 1 - TDD +nTddPeriod=0 #TDD priod e.g. DDDS 4 + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=10 +ioSleep=1 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/dss/mu0_20mhz/ant_0.bin #CC0 +antC1=./usecase/dss/mu0_20mhz/ant_1.bin #CC0 +antC2=./usecase/dss/mu0_20mhz/ant_2.bin #CC0 +antC3=./usecase/dss/mu0_20mhz/ant_3.bin #CC0 + +## RACH TODO: update for PRACH +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +#rachOffset=43 # RB offset for prach detection (see RIU spec) +prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +antPrachC0=./usecase/lte_a/mu0_20mhz/ant_0.bin +antPrachC1=./usecase/lte_a/mu0_20mhz/ant_1.bin +antPrachC2=./usecase/lte_a/mu0_20mhz/ant_2.bin +antPrachC3=./usecase/lte_a/mu0_20mhz/ant_3.bin + +########################################################### +##Section Settings +dssEnable=1 # Enable (1)| disable (0) - flag to enable extType-9 +dssPeriod=5 +technology=1,1,0,0,1 #Consider each comma separated value as a technology(NR/LTE) for a given slot. 1-NR, 0-LTE. this pattern repeats after every dssPeriod +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled +c_plane_vlan_tag=1 #VLAN Tag used for C-Plane +u_plane_vlan_tag=2 #VLAN Tag used for U-Plane + +##RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +#CID settings +DU_Port_ID_bitwidth=2 +BandSector_ID_bitwidth=3 +CC_ID_bitwidth=3 +RU_Port_ID_bitwidth=8 + +# LTE-FDD-FR1-CAT-A-NoBF / LTE-FDD-FR1-CAT-A-DBF +# O-RAN.WG4.IOT.0-v02.00 +# Table A.2.3.2-1: LTE FDD IOT Profile 2 - LTE-FDD-FR1-CAT-A-NoBF + +#U-plane +##Transmission Window +T1a_max_up=437 +T1a_min_up=366 + +#Reception Window U-plane +T2a_max_up=437 +T2a_min_up=206 + +Tadv_cp_dl=125 + +#Transmission Window +Ta3_max=232 #in us +Ta3_min=70 #in us + +#Reception Window +Ta4_max=392 +Ta4_min=70 + +##Transmission Window Fast C-plane UL +T1a_max_cp_ul=356 +T1a_min_cp_ul=285 + +#Reception Window C-plane UL +T2a_max_cp_ul=356 #in us +T2a_min_cp_ul=125 #in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_max_cp_dl=562 #in T1a_max_up + Tcp_adv_dl as per Annex B +T1a_min_cp_dl=491 #in T1a_min_up + Tcp_adv_dl as per Annex B + +#O-RU Reception Window C-plane DL +T2a_max_cp_dl=562 #in T2a_max_up + Tcp_adv_dl as per Annex B +T2a_min_cp_dl=331 #in T2a_min_up + Tcp_adv_dl as per Annex B +########################################################### + diff --git a/fhi_lib/app/usecase/dss/mu0_20mhz/10/usecase_du.cfg b/fhi_lib/app/usecase/dss/mu0_20mhz/10/usecase_du.cfg new file mode 100644 index 0000000..8b923ae --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_20mhz/10/usecase_du.cfg @@ -0,0 +1,73 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ +# This is simple configuration file. Use '#' sign for comments +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +ioCore=5 # core id +ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml + +oXuNum=1 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) + +oXuCfgFile0=./config_file_o_du.dat #O-RU0 + +#O-XU 0 +#PciBusAddoXu0Vf0=0000:51:01.0 +#PciBusAddoXu0Vf1=0000:51:01.1 +#PciBusAddoXu0Vf2=0000:51:01.2 +#PciBusAddoXu0Vf3=0000:51:01.3 + +#O-XU 1 +#PciBusAddoXu1Vf0=0000:51:01.4 +#PciBusAddoXu1Vf1=0000:51:01.5 +#PciBusAddoXu1Vf2=0000:51:01.6 +#PciBusAddoXu1Vf3=0000:51:01.7 + +#O-XU 2 +#PciBusAddoXu2Vf0=0000:51:02.0 +#PciBusAddoXu2Vf1=0000:51:02.1 +#PciBusAddoXu2Vf2=0000:51:02.2 +#PciBusAddoXu2Vf3=0000:51:02.3 + +# remote O-XU 0 Eth Link 0 +#oXuRem0Mac0=b4:96:91:94:de:40 +#oXuRem0Mac1=b4:96:91:94:de:41 +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 + +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/113/usecase_ru.cfg b/fhi_lib/app/usecase/dss/mu0_20mhz/10/usecase_ru.cfg similarity index 100% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/113/usecase_ru.cfg rename to fhi_lib/app/usecase/dss/mu0_20mhz/10/usecase_ru.cfg diff --git a/fhi_lib/app/usecase/dss/mu0_20mhz/11/config_file_o_du.dat b/fhi_lib/app/usecase/dss/mu0_20mhz/11/config_file_o_du.dat new file mode 100644 index 0000000..3b1489a --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_20mhz/11/config_file_o_du.dat @@ -0,0 +1,133 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU (0) | RU(1) +xranRanTech=1 # 5G-NR (0) | LTE (1) +xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=0 #15Khz Sub Carrier Spacing +ttiPeriod=1000 # in us TTI period (15Khz default 1000us) +nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=2048 +nULFftSize=2048 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +ioSleep=1 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/dss/mu0_20mhz/ant_0.bin #CC0 +antC1=./usecase/dss/mu0_20mhz/ant_1.bin #CC0 +antC2=./usecase/dss/mu0_20mhz/ant_2.bin #CC0 +antC3=./usecase/dss/mu0_20mhz/ant_3.bin #CC0 + +## RACH TODO: update for PRACH +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +#rachOffset=43 # RB offset for prach detection (see RIU spec) +#rachCfgIdx=14 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +dssEnable=1 # Enable (1)| disable (0) - flag to enable extType-9 +dssPeriod=5 +technology=1,1,0,0,1 #Consider each comma separated value as a technology(NR/LTE) for a given slot. 1-NR, 0-LTE. this pattern repeats after every dssPeriod +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +#CID settings +DU_Port_ID_bitwidth=2 +BandSector_ID_bitwidth=3 +CC_ID_bitwidth=3 +RU_Port_ID_bitwidth=8 + +# LTE-FDD-FR1-CAT-A-NoBF / LTE-FDD-FR1-CAT-A-DBF +# O-RAN.WG4.IOT.0-v02.00 +# Table A.2.3.2-1: LTE FDD IOT Profile 2 - LTE-FDD-FR1-CAT-A-NoBF + +#U-plane +##Transmission Window +T1a_max_up=437 +T1a_min_up=366 + +#Reception Window U-plane +T2a_max_up=437 +T2a_min_up=206 + +Tadv_cp_dl=125 + +#Transmission Window +Ta3_max=232 #in us +Ta3_min=70 #in us + +#Reception Window +Ta4_max=392 +Ta4_min=70 + +##Transmission Window Fast C-plane UL +T1a_max_cp_ul=356 +T1a_min_cp_ul=285 + +#Reception Window C-plane UL +T2a_max_cp_ul=356 #in us +T2a_min_cp_ul=125 #in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_max_cp_dl=562 #in T1a_max_up + Tcp_adv_dl as per Annex B +T1a_min_cp_dl=491 #in T1a_min_up + Tcp_adv_dl as per Annex B + +#O-RU Reception Window C-plane DL +T2a_max_cp_dl=562 #in T2a_max_up + Tcp_adv_dl as per Annex B +T2a_min_cp_dl=331 #in T2a_min_up + Tcp_adv_dl as per Annex B +########################################################### + diff --git a/fhi_lib/app/usecase/dss/mu0_20mhz/11/config_file_o_ru.dat b/fhi_lib/app/usecase/dss/mu0_20mhz/11/config_file_o_ru.dat new file mode 100644 index 0000000..7082717 --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_20mhz/11/config_file_o_ru.dat @@ -0,0 +1,140 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranRanTech=1 # 5G-NR (0) | LTE (1) +xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=0 #15Khz Sub Carrier Spacing +ttiPeriod=1000 # in us TTI period (15Khz default 1000us) +nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=2048 +nULFftSize=2048 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=10 +ioSleep=1 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/dss/mu0_20mhz/ant_0.bin #CC0 +antC1=./usecase/dss/mu0_20mhz/ant_1.bin #CC0 +antC2=./usecase/dss/mu0_20mhz/ant_2.bin #CC0 +antC3=./usecase/dss/mu0_20mhz/ant_3.bin #CC0 + +## RACH TODO: update for PRACH +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +#rachOffset=43 # RB offset for prach detection (see RIU spec) +prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +antPrachC0=./usecase/lte_a/mu0_20mhz/ant_0.bin +antPrachC1=./usecase/lte_a/mu0_20mhz/ant_1.bin +antPrachC2=./usecase/lte_a/mu0_20mhz/ant_2.bin +antPrachC3=./usecase/lte_a/mu0_20mhz/ant_3.bin + +########################################################### +##Section Settings +dssEnable=1 # Enable (1)| disable (0) - flag to enable extType-9 +dssPeriod=5 +technology=1,1,0,0,1 #Consider each comma separated value as a technology(NR/LTE) for a given slot. 1-NR, 0-LTE. this pattern repeats after every dssPeriod +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled +c_plane_vlan_tag=1 #VLAN Tag used for C-Plane +u_plane_vlan_tag=2 #VLAN Tag used for U-Plane + +##RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +#CID settings +DU_Port_ID_bitwidth=2 +BandSector_ID_bitwidth=3 +CC_ID_bitwidth=3 +RU_Port_ID_bitwidth=8 + +# LTE-FDD-FR1-CAT-A-NoBF / LTE-FDD-FR1-CAT-A-DBF +# O-RAN.WG4.IOT.0-v02.00 +# Table A.2.3.2-1: LTE FDD IOT Profile 2 - LTE-FDD-FR1-CAT-A-NoBF + +#U-plane +##Transmission Window +T1a_max_up=437 +T1a_min_up=366 + +#Reception Window U-plane +T2a_max_up=437 +T2a_min_up=206 + +Tadv_cp_dl=125 + +#Transmission Window +Ta3_max=232 #in us +Ta3_min=70 #in us + +#Reception Window +Ta4_max=392 +Ta4_min=70 + +##Transmission Window Fast C-plane UL +T1a_max_cp_ul=356 +T1a_min_cp_ul=285 + +#Reception Window C-plane UL +T2a_max_cp_ul=356 #in us +T2a_min_cp_ul=125 #in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_max_cp_dl=562 #in T1a_max_up + Tcp_adv_dl as per Annex B +T1a_min_cp_dl=491 #in T1a_min_up + Tcp_adv_dl as per Annex B + +#O-RU Reception Window C-plane DL +T2a_max_cp_dl=562 #in T2a_max_up + Tcp_adv_dl as per Annex B +T2a_min_cp_dl=331 #in T2a_min_up + Tcp_adv_dl as per Annex B +########################################################### + diff --git a/fhi_lib/app/usecase/dss/mu0_20mhz/11/usecase_du.cfg b/fhi_lib/app/usecase/dss/mu0_20mhz/11/usecase_du.cfg new file mode 100644 index 0000000..8b923ae --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_20mhz/11/usecase_du.cfg @@ -0,0 +1,73 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ +# This is simple configuration file. Use '#' sign for comments +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +ioCore=5 # core id +ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml + +oXuNum=1 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) + +oXuCfgFile0=./config_file_o_du.dat #O-RU0 + +#O-XU 0 +#PciBusAddoXu0Vf0=0000:51:01.0 +#PciBusAddoXu0Vf1=0000:51:01.1 +#PciBusAddoXu0Vf2=0000:51:01.2 +#PciBusAddoXu0Vf3=0000:51:01.3 + +#O-XU 1 +#PciBusAddoXu1Vf0=0000:51:01.4 +#PciBusAddoXu1Vf1=0000:51:01.5 +#PciBusAddoXu1Vf2=0000:51:01.6 +#PciBusAddoXu1Vf3=0000:51:01.7 + +#O-XU 2 +#PciBusAddoXu2Vf0=0000:51:02.0 +#PciBusAddoXu2Vf1=0000:51:02.1 +#PciBusAddoXu2Vf2=0000:51:02.2 +#PciBusAddoXu2Vf3=0000:51:02.3 + +# remote O-XU 0 Eth Link 0 +#oXuRem0Mac0=b4:96:91:94:de:40 +#oXuRem0Mac1=b4:96:91:94:de:41 +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 + +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/114/usecase_ru.cfg b/fhi_lib/app/usecase/dss/mu0_20mhz/11/usecase_ru.cfg similarity index 100% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/114/usecase_ru.cfg rename to fhi_lib/app/usecase/dss/mu0_20mhz/11/usecase_ru.cfg diff --git a/fhi_lib/app/usecase/dss/mu0_20mhz/60/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/dss/mu0_20mhz/60/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..0d387ec --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_20mhz/60/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 5 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 6 + + 0,0,0,0,0,0,0,0,0,0,0,0 + + 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000 + + 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/dss/mu0_20mhz/60/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/dss/mu0_20mhz/60/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_20mhz/60/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/dss/mu0_20mhz/60/config_file_o_du.dat b/fhi_lib/app/usecase/dss/mu0_20mhz/60/config_file_o_du.dat new file mode 100644 index 0000000..ec1a58d --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_20mhz/60/config_file_o_du.dat @@ -0,0 +1,156 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU (0) | RU(1) +xranRanTech=1 # 5G-NR (0) | LTE (1) +xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) +ccNum=6 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=0 #15Khz Sub Carrier Spacing +ttiPeriod=1000 # in us TTI period (15Khz default 1000us) +nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=2048 +nULFftSize=2048 + +nFrameDuplexType=0 # 0 - FDD 1 - TDD +nTddPeriod=0 #TDD priod e.g. DDDS 4 + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +#ioSleep=1 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/dss/mu0_20mhz/ant_0.bin #CC0 +antC1=./usecase/dss/mu0_20mhz/ant_1.bin #CC0 +antC2=./usecase/dss/mu0_20mhz/ant_2.bin #CC0 +antC3=./usecase/dss/mu0_20mhz/ant_3.bin #CC0 +antC4=./usecase/dss/mu0_20mhz/ant_0.bin #CC0 +antC5=./usecase/dss/mu0_20mhz/ant_1.bin #CC0 +antC6=./usecase/dss/mu0_20mhz/ant_2.bin #CC0 +antC7=./usecase/dss/mu0_20mhz/ant_3.bin #CC0 +antC8=./usecase/dss/mu0_20mhz/ant_0.bin #CC0 +antC9=./usecase/dss/mu0_20mhz/ant_1.bin #CC0 +antC10=./usecase/dss/mu0_20mhz/ant_2.bin #CC0 +antC11=./usecase/dss/mu0_20mhz/ant_3.bin #CC0 +antC12=./usecase/dss/mu0_20mhz/ant_0.bin #CC0 +antC13=./usecase/dss/mu0_20mhz/ant_1.bin #CC0 +antC14=./usecase/dss/mu0_20mhz/ant_2.bin #CC0 +antC15=./usecase/dss/mu0_20mhz/ant_3.bin #CC0 +antC16=./usecase/dss/mu0_20mhz/ant_0.bin #CC0 +antC17=./usecase/dss/mu0_20mhz/ant_1.bin #CC0 +antC18=./usecase/dss/mu0_20mhz/ant_2.bin #CC0 +antC19=./usecase/dss/mu0_20mhz/ant_3.bin #CC0 +antC20=./usecase/dss/mu0_20mhz/ant_0.bin #CC0 +antC21=./usecase/dss/mu0_20mhz/ant_1.bin #CC0 +antC22=./usecase/dss/mu0_20mhz/ant_2.bin #CC0 +antC23=./usecase/dss/mu0_20mhz/ant_3.bin #CC0 +antC24=./usecase/dss/mu0_20mhz/ant_0.bin #CC0 +antC25=./usecase/dss/mu0_20mhz/ant_1.bin #CC0 +antC26=./usecase/dss/mu0_20mhz/ant_2.bin #CC0 +antC27=./usecase/dss/mu0_20mhz/ant_3.bin #CC0 +antC28=./usecase/dss/mu0_20mhz/ant_0.bin #CC0 +antC29=./usecase/dss/mu0_20mhz/ant_1.bin #CC0 +antC30=./usecase/dss/mu0_20mhz/ant_2.bin #CC0 +antC31=./usecase/dss/mu0_20mhz/ant_3.bin #CC0 + +## RACH TODO: update for PRACH +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +#rachOffset=43 # RB offset for prach detection (see RIU spec) +#rachCfgIdx=14 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +dssEnable=1 # Enable (1)| disable (0) - flag to enable extType-9 +dssPeriod=5 +technology=1,1,0,0,1 #Consider each comma separated value as a technology(NR/LTE) for a given slot. 1-NR, 0-LTE. this pattern repeats after every dssPeriod +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +#CID settings +DU_Port_ID_bitwidth=2 +BandSector_ID_bitwidth=3 +CC_ID_bitwidth=3 +RU_Port_ID_bitwidth=8 + +# LTE-FDD-FR1-CAT-A-NoBF / LTE-FDD-FR1-CAT-A-DBF +# O-RAN.WG4.IOT.0-v02.00 +# Table A.2.3.2-1: LTE FDD IOT Profile 2 - LTE-FDD-FR1-CAT-A-NoBF + +#U-plane +##Transmission Window +T1a_max_up=437 +T1a_min_up=366 + +#Reception Window U-plane +T2a_max_up=437 +T2a_min_up=206 + +Tadv_cp_dl=125 + +#Transmission Window +Ta3_max=232 #in us +Ta3_min=70 #in us + +#Reception Window +Ta4_max=392 +Ta4_min=70 + +##Transmission Window Fast C-plane UL +T1a_max_cp_ul=356 +T1a_min_cp_ul=285 + +#Reception Window C-plane UL +T2a_max_cp_ul=356 #in us +T2a_min_cp_ul=125 #in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_max_cp_dl=562 #in T1a_max_up + Tcp_adv_dl as per Annex B +T1a_min_cp_dl=491 #in T1a_min_up + Tcp_adv_dl as per Annex B + +#O-RU Reception Window C-plane DL +T2a_max_cp_dl=562 #in T2a_max_up + Tcp_adv_dl as per Annex B +T2a_min_cp_dl=331 #in T2a_min_up + Tcp_adv_dl as per Annex B +########################################################### + diff --git a/fhi_lib/app/usecase/dss/mu0_20mhz/60/config_file_o_ru.dat b/fhi_lib/app/usecase/dss/mu0_20mhz/60/config_file_o_ru.dat new file mode 100644 index 0000000..8abf55f --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_20mhz/60/config_file_o_ru.dat @@ -0,0 +1,165 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranRanTech=1 # 5G-NR (0) | LTE (1) +xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) +ccNum=6 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=0 #15Khz Sub Carrier Spacing +ttiPeriod=1000 # in us TTI period (15Khz default 1000us) +nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=2048 +nULFftSize=2048 + +nFrameDuplexType=0 # 0 - FDD 1 - TDD +nTddPeriod=0 #TDD priod e.g. DDDS 4 + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=10 +#ioSleep=1 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/dss/mu0_20mhz/ant_0.bin #CC0 +antC1=./usecase/dss/mu0_20mhz/ant_1.bin #CC0 +antC2=./usecase/dss/mu0_20mhz/ant_2.bin #CC0 +antC3=./usecase/dss/mu0_20mhz/ant_3.bin #CC0 +antC4=./usecase/dss/mu0_20mhz/ant_0.bin #CC0 +antC5=./usecase/dss/mu0_20mhz/ant_1.bin #CC0 +antC6=./usecase/dss/mu0_20mhz/ant_2.bin #CC0 +antC7=./usecase/dss/mu0_20mhz/ant_3.bin #CC0 +antC8=./usecase/dss/mu0_20mhz/ant_0.bin #CC0 +antC9=./usecase/dss/mu0_20mhz/ant_1.bin #CC0 +antC10=./usecase/dss/mu0_20mhz/ant_2.bin #CC0 +antC11=./usecase/dss/mu0_20mhz/ant_3.bin #CC0 +antC12=./usecase/dss/mu0_20mhz/ant_0.bin #CC0 +antC13=./usecase/dss/mu0_20mhz/ant_1.bin #CC0 +antC14=./usecase/dss/mu0_20mhz/ant_2.bin #CC0 +antC15=./usecase/dss/mu0_20mhz/ant_3.bin #CC0 +antC16=./usecase/dss/mu0_20mhz/ant_0.bin #CC0 +antC17=./usecase/dss/mu0_20mhz/ant_1.bin #CC0 +antC18=./usecase/dss/mu0_20mhz/ant_2.bin #CC0 +antC19=./usecase/dss/mu0_20mhz/ant_3.bin #CC0 +antC20=./usecase/dss/mu0_20mhz/ant_0.bin #CC0 +antC21=./usecase/dss/mu0_20mhz/ant_1.bin #CC0 +antC22=./usecase/dss/mu0_20mhz/ant_2.bin #CC0 +antC23=./usecase/dss/mu0_20mhz/ant_3.bin #CC0 +antC24=./usecase/dss/mu0_20mhz/ant_0.bin #CC0 +antC25=./usecase/dss/mu0_20mhz/ant_1.bin #CC0 +antC26=./usecase/dss/mu0_20mhz/ant_2.bin #CC0 +antC27=./usecase/dss/mu0_20mhz/ant_3.bin #CC0 +antC28=./usecase/dss/mu0_20mhz/ant_0.bin #CC0 +antC29=./usecase/dss/mu0_20mhz/ant_1.bin #CC0 +antC30=./usecase/dss/mu0_20mhz/ant_2.bin #CC0 +antC31=./usecase/dss/mu0_20mhz/ant_3.bin #CC0 + + + +## RACH TODO: update for PRACH +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +#rachOffset=43 # RB offset for prach detection (see RIU spec) +prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +antPrachC0=./usecase/lte_a/mu0_20mhz/ant_0.bin +antPrachC1=./usecase/lte_a/mu0_20mhz/ant_1.bin +antPrachC2=./usecase/lte_a/mu0_20mhz/ant_2.bin +antPrachC3=./usecase/lte_a/mu0_20mhz/ant_3.bin + +########################################################### +##Section Settings +dssEnable=1 # Enable (1)| disable (0) - flag to enable extType-9 +dssPeriod=5 +technology=1,1,0,0,1 #Consider each comma separated value as a technology(NR/LTE) for a given slot. 1-NR, 0-LTE. this pattern repeats after every dssPeriod +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled +c_plane_vlan_tag=1 #VLAN Tag used for C-Plane +u_plane_vlan_tag=2 #VLAN Tag used for U-Plane + +##RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +#CID settings +DU_Port_ID_bitwidth=2 +BandSector_ID_bitwidth=3 +CC_ID_bitwidth=3 +RU_Port_ID_bitwidth=8 + +# LTE-FDD-FR1-CAT-A-NoBF / LTE-FDD-FR1-CAT-A-DBF +# O-RAN.WG4.IOT.0-v02.00 +# Table A.2.3.2-1: LTE FDD IOT Profile 2 - LTE-FDD-FR1-CAT-A-NoBF + +#U-plane +##Transmission Window +T1a_max_up=437 +T1a_min_up=366 + +#Reception Window U-plane +T2a_max_up=437 +T2a_min_up=206 + +Tadv_cp_dl=125 + +#Transmission Window +Ta3_max=232 #in us +Ta3_min=70 #in us + +#Reception Window +Ta4_max=392 +Ta4_min=70 + +##Transmission Window Fast C-plane UL +T1a_max_cp_ul=356 +T1a_min_cp_ul=285 + +#Reception Window C-plane UL +T2a_max_cp_ul=356 #in us +T2a_min_cp_ul=125 #in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_max_cp_dl=562 #in T1a_max_up + Tcp_adv_dl as per Annex B +T1a_min_cp_dl=491 #in T1a_min_up + Tcp_adv_dl as per Annex B + +#O-RU Reception Window C-plane DL +T2a_max_cp_dl=562 #in T2a_max_up + Tcp_adv_dl as per Annex B +T2a_min_cp_dl=331 #in T2a_min_up + Tcp_adv_dl as per Annex B +########################################################### + diff --git a/fhi_lib/app/usecase/cat_a/mu3_100mhz/8/usecase_du.cfg b/fhi_lib/app/usecase/dss/mu0_20mhz/60/usecase_du.cfg similarity index 94% rename from fhi_lib/app/usecase/cat_a/mu3_100mhz/8/usecase_du.cfg rename to fhi_lib/app/usecase/dss/mu0_20mhz/60/usecase_du.cfg index 5c067f4..868f3da 100644 --- a/fhi_lib/app/usecase/cat_a/mu3_100mhz/8/usecase_du.cfg +++ b/fhi_lib/app/usecase/dss/mu0_20mhz/60/usecase_du.cfg @@ -20,6 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU @@ -46,9 +47,13 @@ oXuCfgFile0=./config_file_o_du.dat #O-RU0 #PciBusAddoXu2Vf2=0000:51:02.2 #PciBusAddoXu2Vf3=0000:51:02.3 +# remote O-XU 0 Eth Link 0 +#oXuRem0Mac0=b4:96:91:94:de:40 +#oXuRem0Mac1=b4:96:91:94:de:41 # remote O-XU 0 Eth Link 0 oXuRem0Mac0=00:11:22:33:00:01 oXuRem0Mac1=00:11:22:33:00:11 + # remote O-XU 0 Eth Link 1 oXuRem0Mac2=00:11:22:33:00:21 oXuRem0Mac3=00:11:22:33:00:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/115/usecase_ru.cfg b/fhi_lib/app/usecase/dss/mu0_20mhz/60/usecase_ru.cfg similarity index 100% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/115/usecase_ru.cfg rename to fhi_lib/app/usecase/dss/mu0_20mhz/60/usecase_ru.cfg diff --git a/fhi_lib/app/usecase/dss/mu0_20mhz/61/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/dss/mu0_20mhz/61/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..0d387ec --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_20mhz/61/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 5 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 6 + + 0,0,0,0,0,0,0,0,0,0,0,0 + + 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000 + + 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/dss/mu0_20mhz/61/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/dss/mu0_20mhz/61/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_20mhz/61/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/dss/mu0_20mhz/61/config_file_o_du.dat b/fhi_lib/app/usecase/dss/mu0_20mhz/61/config_file_o_du.dat new file mode 100644 index 0000000..ba63733 --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_20mhz/61/config_file_o_du.dat @@ -0,0 +1,177 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU (0) | RU(1) +xranRanTech=1 # 5G-NR (0) | LTE (1) +xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) +ccNum=6 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=0 #15Khz Sub Carrier Spacing +ttiPeriod=1000 # in us TTI period (15Khz default 1000us) +nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=2048 +nULFftSize=2048 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +#ioSleep=1 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/dss/mu0_20mhz/ant_0.bin #CC0 +antC1=./usecase/dss/mu0_20mhz/ant_1.bin #CC0 +antC2=./usecase/dss/mu0_20mhz/ant_2.bin #CC0 +antC3=./usecase/dss/mu0_20mhz/ant_3.bin #CC0 +antC4=./usecase/dss/mu0_20mhz/ant_0.bin #CC1 +antC5=./usecase/dss/mu0_20mhz/ant_1.bin #CC1 +antC6=./usecase/dss/mu0_20mhz/ant_2.bin #CC1 +antC7=./usecase/dss/mu0_20mhz/ant_3.bin #CC1 +antC8=./usecase/dss/mu0_20mhz/ant_0.bin #CC2 +antC9=./usecase/dss/mu0_20mhz/ant_1.bin #CC2 +antC10=./usecase/dss/mu0_20mhz/ant_2.bin #CC2 +antC11=./usecase/dss/mu0_20mhz/ant_3.bin #CC2 +antC12=./usecase/dss/mu0_20mhz/ant_0.bin #CC3 +antC13=./usecase/dss/mu0_20mhz/ant_1.bin #CC3 +antC14=./usecase/dss/mu0_20mhz/ant_2.bin #CC3 +antC15=./usecase/dss/mu0_20mhz/ant_3.bin #CC3 +antC16=./usecase/dss/mu0_20mhz/ant_0.bin #CC4 +antC17=./usecase/dss/mu0_20mhz/ant_1.bin #CC4 +antC18=./usecase/dss/mu0_20mhz/ant_2.bin #CC4 +antC19=./usecase/dss/mu0_20mhz/ant_3.bin #CC4 +antC20=./usecase/dss/mu0_20mhz/ant_0.bin #CC5 +antC21=./usecase/dss/mu0_20mhz/ant_1.bin #CC5 +antC22=./usecase/dss/mu0_20mhz/ant_2.bin #CC5 +antC23=./usecase/dss/mu0_20mhz/ant_3.bin #CC5 +antC24=./usecase/dss/mu0_20mhz/ant_0.bin #CC6 +antC25=./usecase/dss/mu0_20mhz/ant_1.bin #CC6 +antC26=./usecase/dss/mu0_20mhz/ant_2.bin #CC6 +antC27=./usecase/dss/mu0_20mhz/ant_3.bin #CC6 +antC28=./usecase/dss/mu0_20mhz/ant_0.bin #CC7 +antC29=./usecase/dss/mu0_20mhz/ant_1.bin #CC7 +antC30=./usecase/dss/mu0_20mhz/ant_2.bin #CC7 +antC31=./usecase/dss/mu0_20mhz/ant_3.bin #CC7 +antC32=./usecase/dss/mu0_20mhz/ant_0.bin #CC8 +antC33=./usecase/dss/mu0_20mhz/ant_1.bin #CC8 +antC34=./usecase/dss/mu0_20mhz/ant_2.bin #CC8 +antC35=./usecase/dss/mu0_20mhz/ant_3.bin #CC8 +antC36=./usecase/dss/mu0_20mhz/ant_0.bin #CC9 +antC37=./usecase/dss/mu0_20mhz/ant_1.bin #CC9 +antC38=./usecase/dss/mu0_20mhz/ant_2.bin #CC9 +antC39=./usecase/dss/mu0_20mhz/ant_3.bin #CC9 +antC40=./usecase/dss/mu0_20mhz/ant_0.bin #CC10 +antC41=./usecase/dss/mu0_20mhz/ant_1.bin #CC10 +antC42=./usecase/dss/mu0_20mhz/ant_2.bin #CC10 +antC43=./usecase/dss/mu0_20mhz/ant_3.bin #CC10 +antC44=./usecase/dss/mu0_20mhz/ant_0.bin #CC11 +antC45=./usecase/dss/mu0_20mhz/ant_1.bin #CC11 +antC46=./usecase/dss/mu0_20mhz/ant_2.bin #CC11 +antC47=./usecase/dss/mu0_20mhz/ant_3.bin #CC11 + +## RACH TODO: update for PRACH +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +#rachOffset=43 # RB offset for prach detection (see RIU spec) +#rachCfgIdx=14 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +dssEnable=1 # Enable (1)| disable (0) - flag to enable extType-9 +dssPeriod=5 +technology=1,1,0,0,1 #Consider each comma separated value as a technology(NR/LTE) for a given slot. 1-NR, 0-LTE. this pattern repeats after every dssPeriod +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +#CID settings +DU_Port_ID_bitwidth=2 +BandSector_ID_bitwidth=3 +CC_ID_bitwidth=3 +RU_Port_ID_bitwidth=8 + +# LTE-FDD-FR1-CAT-A-NoBF / LTE-FDD-FR1-CAT-A-DBF +# O-RAN.WG4.IOT.0-v02.00 +# Table A.2.3.2-1: LTE FDD IOT Profile 2 - LTE-FDD-FR1-CAT-A-NoBF + +#U-plane +##Transmission Window +T1a_max_up=437 +T1a_min_up=366 + +#Reception Window U-plane +T2a_max_up=437 +T2a_min_up=206 + +Tadv_cp_dl=125 + +#Transmission Window +Ta3_max=232 #in us +Ta3_min=70 #in us + +#Reception Window +Ta4_max=392 +Ta4_min=70 + +##Transmission Window Fast C-plane UL +T1a_max_cp_ul=356 +T1a_min_cp_ul=285 + +#Reception Window C-plane UL +T2a_max_cp_ul=356 #in us +T2a_min_cp_ul=125 #in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_max_cp_dl=562 #in T1a_max_up + Tcp_adv_dl as per Annex B +T1a_min_cp_dl=491 #in T1a_min_up + Tcp_adv_dl as per Annex B + +#O-RU Reception Window C-plane DL +T2a_max_cp_dl=562 #in T2a_max_up + Tcp_adv_dl as per Annex B +T2a_min_cp_dl=331 #in T2a_min_up + Tcp_adv_dl as per Annex B +########################################################### + diff --git a/fhi_lib/app/usecase/dss/mu0_20mhz/61/config_file_o_ru.dat b/fhi_lib/app/usecase/dss/mu0_20mhz/61/config_file_o_ru.dat new file mode 100644 index 0000000..f86fc98 --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_20mhz/61/config_file_o_ru.dat @@ -0,0 +1,185 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranRanTech=1 # 5G-NR (0) | LTE (1) +xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) +ccNum=6 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=0 #15Khz Sub Carrier Spacing +ttiPeriod=1000 # in us TTI period (15Khz default 1000us) +nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=2048 +nULFftSize=2048 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=10 +#ioSleep=1 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/dss/mu0_20mhz/ant_0.bin #CC0 +antC1=./usecase/dss/mu0_20mhz/ant_1.bin #CC0 +antC2=./usecase/dss/mu0_20mhz/ant_2.bin #CC0 +antC3=./usecase/dss/mu0_20mhz/ant_3.bin #CC0 +antC4=./usecase/dss/mu0_20mhz/ant_0.bin #CC1 +antC5=./usecase/dss/mu0_20mhz/ant_1.bin #CC1 +antC6=./usecase/dss/mu0_20mhz/ant_2.bin #CC1 +antC7=./usecase/dss/mu0_20mhz/ant_3.bin #CC1 +antC8=./usecase/dss/mu0_20mhz/ant_0.bin #CC2 +antC9=./usecase/dss/mu0_20mhz/ant_1.bin #CC2 +antC10=./usecase/dss/mu0_20mhz/ant_2.bin #CC2 +antC11=./usecase/dss/mu0_20mhz/ant_3.bin #CC2 +antC12=./usecase/dss/mu0_20mhz/ant_0.bin #CC3 +antC13=./usecase/dss/mu0_20mhz/ant_1.bin #CC3 +antC14=./usecase/dss/mu0_20mhz/ant_2.bin #CC3 +antC15=./usecase/dss/mu0_20mhz/ant_3.bin #CC3 +antC16=./usecase/dss/mu0_20mhz/ant_0.bin #CC4 +antC17=./usecase/dss/mu0_20mhz/ant_1.bin #CC4 +antC18=./usecase/dss/mu0_20mhz/ant_2.bin #CC4 +antC19=./usecase/dss/mu0_20mhz/ant_3.bin #CC4 +antC20=./usecase/dss/mu0_20mhz/ant_0.bin #CC5 +antC21=./usecase/dss/mu0_20mhz/ant_1.bin #CC5 +antC22=./usecase/dss/mu0_20mhz/ant_2.bin #CC5 +antC23=./usecase/dss/mu0_20mhz/ant_3.bin #CC5 +antC24=./usecase/dss/mu0_20mhz/ant_0.bin #CC6 +antC25=./usecase/dss/mu0_20mhz/ant_1.bin #CC6 +antC26=./usecase/dss/mu0_20mhz/ant_2.bin #CC6 +antC27=./usecase/dss/mu0_20mhz/ant_3.bin #CC6 +antC28=./usecase/dss/mu0_20mhz/ant_0.bin #CC7 +antC29=./usecase/dss/mu0_20mhz/ant_1.bin #CC7 +antC30=./usecase/dss/mu0_20mhz/ant_2.bin #CC7 +antC31=./usecase/dss/mu0_20mhz/ant_3.bin #CC7 +antC32=./usecase/dss/mu0_20mhz/ant_0.bin #CC8 +antC33=./usecase/dss/mu0_20mhz/ant_1.bin #CC8 +antC34=./usecase/dss/mu0_20mhz/ant_2.bin #CC8 +antC35=./usecase/dss/mu0_20mhz/ant_3.bin #CC8 +antC36=./usecase/dss/mu0_20mhz/ant_0.bin #CC9 +antC37=./usecase/dss/mu0_20mhz/ant_1.bin #CC9 +antC38=./usecase/dss/mu0_20mhz/ant_2.bin #CC9 +antC39=./usecase/dss/mu0_20mhz/ant_3.bin #CC9 +antC40=./usecase/dss/mu0_20mhz/ant_0.bin #CC10 +antC41=./usecase/dss/mu0_20mhz/ant_1.bin #CC10 +antC42=./usecase/dss/mu0_20mhz/ant_2.bin #CC10 +antC43=./usecase/dss/mu0_20mhz/ant_3.bin #CC10 +antC44=./usecase/dss/mu0_20mhz/ant_0.bin #CC11 +antC45=./usecase/dss/mu0_20mhz/ant_1.bin #CC11 +antC46=./usecase/dss/mu0_20mhz/ant_2.bin #CC11 +antC47=./usecase/dss/mu0_20mhz/ant_3.bin #CC11 + + +## RACH TODO: update for PRACH +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +#rachOffset=43 # RB offset for prach detection (see RIU spec) +prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +antPrachC0=./usecase/lte_a/mu0_20mhz/ant_0.bin +antPrachC1=./usecase/lte_a/mu0_20mhz/ant_1.bin +antPrachC2=./usecase/lte_a/mu0_20mhz/ant_2.bin +antPrachC3=./usecase/lte_a/mu0_20mhz/ant_3.bin + +########################################################### +##Section Settings +dssEnable=1 # Enable (1)| disable (0) - flag to enable extType-9 +dssPeriod=5 +technology=1,1,0,0,1 #Consider each comma separated value as a technology(NR/LTE) for a given slot. 1-NR, 0-LTE. this pattern repeats after every dssPeriod +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled +c_plane_vlan_tag=1 #VLAN Tag used for C-Plane +u_plane_vlan_tag=2 #VLAN Tag used for U-Plane + +##RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +#CID settings +DU_Port_ID_bitwidth=2 +BandSector_ID_bitwidth=3 +CC_ID_bitwidth=3 +RU_Port_ID_bitwidth=8 + +# LTE-FDD-FR1-CAT-A-NoBF / LTE-FDD-FR1-CAT-A-DBF +# O-RAN.WG4.IOT.0-v02.00 +# Table A.2.3.2-1: LTE FDD IOT Profile 2 - LTE-FDD-FR1-CAT-A-NoBF + +#U-plane +##Transmission Window +T1a_max_up=437 +T1a_min_up=366 + +#Reception Window U-plane +T2a_max_up=437 +T2a_min_up=206 + +Tadv_cp_dl=125 + +#Transmission Window +Ta3_max=232 #in us +Ta3_min=70 #in us + +#Reception Window +Ta4_max=392 +Ta4_min=70 + +##Transmission Window Fast C-plane UL +T1a_max_cp_ul=356 +T1a_min_cp_ul=285 + +#Reception Window C-plane UL +T2a_max_cp_ul=356 #in us +T2a_min_cp_ul=125 #in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_max_cp_dl=562 #in T1a_max_up + Tcp_adv_dl as per Annex B +T1a_min_cp_dl=491 #in T1a_min_up + Tcp_adv_dl as per Annex B + +#O-RU Reception Window C-plane DL +T2a_max_cp_dl=562 #in T2a_max_up + Tcp_adv_dl as per Annex B +T2a_min_cp_dl=331 #in T2a_min_up + Tcp_adv_dl as per Annex B +########################################################### + diff --git a/fhi_lib/app/usecase/dss/mu0_20mhz/61/usecase_du.cfg b/fhi_lib/app/usecase/dss/mu0_20mhz/61/usecase_du.cfg new file mode 100644 index 0000000..868f3da --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_20mhz/61/usecase_du.cfg @@ -0,0 +1,73 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ +# This is simple configuration file. Use '#' sign for comments +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +ioCore=5 # core id +ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml + +oXuNum=1 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) + +oXuCfgFile0=./config_file_o_du.dat #O-RU0 + +#O-XU 0 +#PciBusAddoXu0Vf0=0000:51:01.0 +#PciBusAddoXu0Vf1=0000:51:01.1 +#PciBusAddoXu0Vf2=0000:51:01.2 +#PciBusAddoXu0Vf3=0000:51:01.3 + +#O-XU 1 +#PciBusAddoXu1Vf0=0000:51:01.4 +#PciBusAddoXu1Vf1=0000:51:01.5 +#PciBusAddoXu1Vf2=0000:51:01.6 +#PciBusAddoXu1Vf3=0000:51:01.7 + +#O-XU 2 +#PciBusAddoXu2Vf0=0000:51:02.0 +#PciBusAddoXu2Vf1=0000:51:02.1 +#PciBusAddoXu2Vf2=0000:51:02.2 +#PciBusAddoXu2Vf3=0000:51:02.3 + +# remote O-XU 0 Eth Link 0 +#oXuRem0Mac0=b4:96:91:94:de:40 +#oXuRem0Mac1=b4:96:91:94:de:41 +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 + +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/116/usecase_ru.cfg b/fhi_lib/app/usecase/dss/mu0_20mhz/61/usecase_ru.cfg similarity index 100% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/116/usecase_ru.cfg rename to fhi_lib/app/usecase/dss/mu0_20mhz/61/usecase_ru.cfg diff --git a/fhi_lib/app/usecase/dss/mu0_20mhz/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/dss/mu0_20mhz/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..ea87359 --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_20mhz/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 0,0,0,0 + + 1000, 1000, 1000, 1000 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/dss/mu0_20mhz/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/dss/mu0_20mhz/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_20mhz/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/dss/mu0_5mhz/10/config_file_o_du.dat b/fhi_lib/app/usecase/dss/mu0_5mhz/10/config_file_o_du.dat new file mode 100644 index 0000000..ae8a71f --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_5mhz/10/config_file_o_du.dat @@ -0,0 +1,128 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU (0) | RU(1) +xranRanTech=1 # 5G-NR (0) | LTE (1) +xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=0 #15Khz Sub Carrier Spacing +ttiPeriod=1000 # in us TTI period (15Khz default 1000us) +nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=5 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=5 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=512 +nULFftSize=512 + +nFrameDuplexType=0 # 0 - FDD 1 - TDD +nTddPeriod=0 #TDD priod e.g. DDDS 4 + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +ioSleep=1 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/dss/mu0_5mhz/ant_0.bin #CC0 +antC1=./usecase/dss/mu0_5mhz/ant_1.bin #CC0 +antC2=./usecase/dss/mu0_5mhz/ant_2.bin #CC0 +antC3=./usecase/dss/mu0_5mhz/ant_3.bin #CC0 + +## RACH TODO: update for PRACH +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +#rachOffset=43 # RB offset for prach detection (see RIU spec) +#rachCfgIdx=14 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +dssEnable=1 # Enable (1)| disable (0) - flag to enable extType-9 +dssPeriod=5 +technology=1,1,0,0,1 #Consider each comma separated value as a technology(NR/LTE) for a given slot. 1-NR, 0-LTE. this pattern repeats after every dssPeriod +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +#CID settings +DU_Port_ID_bitwidth=2 +BandSector_ID_bitwidth=3 +CC_ID_bitwidth=3 +RU_Port_ID_bitwidth=8 + +# LTE-FDD-FR1-CAT-A-NoBF / LTE-FDD-FR1-CAT-A-DBF +# O-RAN.WG4.IOT.0-v02.00 +# Table A.2.3.2-1: LTE FDD IOT Profile 2 - LTE-FDD-FR1-CAT-A-NoBF + +#U-plane +##Transmission Window +T1a_max_up=437 +T1a_min_up=366 + +#Reception Window U-plane +T2a_max_up=437 +T2a_min_up=206 + +Tadv_cp_dl=125 + +#Transmission Window +Ta3_max=232 #in us +Ta3_min=70 #in us + +#Reception Window +Ta4_max=392 +Ta4_min=70 + +##Transmission Window Fast C-plane UL +T1a_max_cp_ul=356 +T1a_min_cp_ul=285 + +#Reception Window C-plane UL +T2a_max_cp_ul=356 #in us +T2a_min_cp_ul=125 #in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_max_cp_dl=562 #in T1a_max_up + Tcp_adv_dl as per Annex B +T1a_min_cp_dl=491 #in T1a_min_up + Tcp_adv_dl as per Annex B + +#O-RU Reception Window C-plane DL +T2a_max_cp_dl=562 #in T2a_max_up + Tcp_adv_dl as per Annex B +T2a_min_cp_dl=331 #in T2a_min_up + Tcp_adv_dl as per Annex B +########################################################### + diff --git a/fhi_lib/app/usecase/dss/mu0_5mhz/10/config_file_o_ru.dat b/fhi_lib/app/usecase/dss/mu0_5mhz/10/config_file_o_ru.dat new file mode 100644 index 0000000..49a4417 --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_5mhz/10/config_file_o_ru.dat @@ -0,0 +1,135 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranRanTech=1 # 5G-NR (0) | LTE (1) +xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=0 #15Khz Sub Carrier Spacing +ttiPeriod=1000 # in us TTI period (15Khz default 1000us) +nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=5 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=5 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=512 +nULFftSize=512 + +nFrameDuplexType=0 # 0 - FDD 1 - TDD +nTddPeriod=0 #TDD priod e.g. DDDS 4 + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=10 +ioSleep=1 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/dss/mu0_5mhz/ant_0.bin #CC0 +antC1=./usecase/dss/mu0_5mhz/ant_1.bin #CC0 +antC2=./usecase/dss/mu0_5mhz/ant_2.bin #CC0 +antC3=./usecase/dss/mu0_5mhz/ant_3.bin #CC0 + +## RACH TODO: update for PRACH +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +#rachOffset=43 # RB offset for prach detection (see RIU spec) +prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +antPrachC0=./usecase/lte_a/mu0_20mhz/ant_0.bin +antPrachC1=./usecase/lte_a/mu0_20mhz/ant_1.bin +antPrachC2=./usecase/lte_a/mu0_20mhz/ant_2.bin +antPrachC3=./usecase/lte_a/mu0_20mhz/ant_3.bin + +########################################################### +##Section Settings +dssEnable=1 # Enable (1)| disable (0) - flag to enable extType-9 +dssPeriod=5 +technology=1,1,0,0,1 #Consider each comma separated value as a technology(NR/LTE) for a given slot. 1-NR, 0-LTE. this pattern repeats after every dssPeriod +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled +c_plane_vlan_tag=1 #VLAN Tag used for C-Plane +u_plane_vlan_tag=2 #VLAN Tag used for U-Plane + +##RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +#CID settings +DU_Port_ID_bitwidth=2 +BandSector_ID_bitwidth=3 +CC_ID_bitwidth=3 +RU_Port_ID_bitwidth=8 + +# LTE-FDD-FR1-CAT-A-NoBF / LTE-FDD-FR1-CAT-A-DBF +# O-RAN.WG4.IOT.0-v02.00 +# Table A.2.3.2-1: LTE FDD IOT Profile 2 - LTE-FDD-FR1-CAT-A-NoBF + +#U-plane +##Transmission Window +T1a_max_up=437 +T1a_min_up=366 + +#Reception Window U-plane +T2a_max_up=437 +T2a_min_up=206 + +Tadv_cp_dl=125 + +#Transmission Window +Ta3_max=232 #in us +Ta3_min=70 #in us + +#Reception Window +Ta4_max=392 +Ta4_min=70 + +##Transmission Window Fast C-plane UL +T1a_max_cp_ul=356 +T1a_min_cp_ul=285 + +#Reception Window C-plane UL +T2a_max_cp_ul=356 #in us +T2a_min_cp_ul=125 #in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_max_cp_dl=562 #in T1a_max_up + Tcp_adv_dl as per Annex B +T1a_min_cp_dl=491 #in T1a_min_up + Tcp_adv_dl as per Annex B + +#O-RU Reception Window C-plane DL +T2a_max_cp_dl=562 #in T2a_max_up + Tcp_adv_dl as per Annex B +T2a_min_cp_dl=331 #in T2a_min_up + Tcp_adv_dl as per Annex B +########################################################### + diff --git a/fhi_lib/app/usecase/dss/mu0_5mhz/10/usecase_du.cfg b/fhi_lib/app/usecase/dss/mu0_5mhz/10/usecase_du.cfg new file mode 100644 index 0000000..8b923ae --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_5mhz/10/usecase_du.cfg @@ -0,0 +1,73 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ +# This is simple configuration file. Use '#' sign for comments +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +ioCore=5 # core id +ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml + +oXuNum=1 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) + +oXuCfgFile0=./config_file_o_du.dat #O-RU0 + +#O-XU 0 +#PciBusAddoXu0Vf0=0000:51:01.0 +#PciBusAddoXu0Vf1=0000:51:01.1 +#PciBusAddoXu0Vf2=0000:51:01.2 +#PciBusAddoXu0Vf3=0000:51:01.3 + +#O-XU 1 +#PciBusAddoXu1Vf0=0000:51:01.4 +#PciBusAddoXu1Vf1=0000:51:01.5 +#PciBusAddoXu1Vf2=0000:51:01.6 +#PciBusAddoXu1Vf3=0000:51:01.7 + +#O-XU 2 +#PciBusAddoXu2Vf0=0000:51:02.0 +#PciBusAddoXu2Vf1=0000:51:02.1 +#PciBusAddoXu2Vf2=0000:51:02.2 +#PciBusAddoXu2Vf3=0000:51:02.3 + +# remote O-XU 0 Eth Link 0 +#oXuRem0Mac0=b4:96:91:94:de:40 +#oXuRem0Mac1=b4:96:91:94:de:41 +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 + +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/117/usecase_ru.cfg b/fhi_lib/app/usecase/dss/mu0_5mhz/10/usecase_ru.cfg similarity index 100% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/117/usecase_ru.cfg rename to fhi_lib/app/usecase/dss/mu0_5mhz/10/usecase_ru.cfg diff --git a/fhi_lib/app/usecase/dss/mu0_5mhz/11/config_file_o_du.dat b/fhi_lib/app/usecase/dss/mu0_5mhz/11/config_file_o_du.dat new file mode 100644 index 0000000..c6fab97 --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_5mhz/11/config_file_o_du.dat @@ -0,0 +1,133 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU (0) | RU(1) +xranRanTech=1 # 5G-NR (0) | LTE (1) +xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=0 #15Khz Sub Carrier Spacing +ttiPeriod=1000 # in us TTI period (15Khz default 1000us) +nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=5 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=5 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=512 +nULFftSize=512 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +ioSleep=1 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/dss/mu0_20mhz/ant_0.bin #CC0 +antC1=./usecase/dss/mu0_20mhz/ant_1.bin #CC0 +antC2=./usecase/dss/mu0_20mhz/ant_2.bin #CC0 +antC3=./usecase/dss/mu0_20mhz/ant_3.bin #CC0 + +## RACH TODO: update for PRACH +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +#rachOffset=43 # RB offset for prach detection (see RIU spec) +#rachCfgIdx=14 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +dssEnable=1 # Enable (1)| disable (0) - flag to enable extType-9 +dssPeriod=5 +technology=1,1,0,0,1 #Consider each comma separated value as a technology(NR/LTE) for a given slot. 1-NR, 0-LTE. this pattern repeats after every dssPeriod +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +#CID settings +DU_Port_ID_bitwidth=2 +BandSector_ID_bitwidth=3 +CC_ID_bitwidth=3 +RU_Port_ID_bitwidth=8 + +# LTE-FDD-FR1-CAT-A-NoBF / LTE-FDD-FR1-CAT-A-DBF +# O-RAN.WG4.IOT.0-v02.00 +# Table A.2.3.2-1: LTE FDD IOT Profile 2 - LTE-FDD-FR1-CAT-A-NoBF + +#U-plane +##Transmission Window +T1a_max_up=437 +T1a_min_up=366 + +#Reception Window U-plane +T2a_max_up=437 +T2a_min_up=206 + +Tadv_cp_dl=125 + +#Transmission Window +Ta3_max=232 #in us +Ta3_min=70 #in us + +#Reception Window +Ta4_max=392 +Ta4_min=70 + +##Transmission Window Fast C-plane UL +T1a_max_cp_ul=356 +T1a_min_cp_ul=285 + +#Reception Window C-plane UL +T2a_max_cp_ul=356 #in us +T2a_min_cp_ul=125 #in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_max_cp_dl=562 #in T1a_max_up + Tcp_adv_dl as per Annex B +T1a_min_cp_dl=491 #in T1a_min_up + Tcp_adv_dl as per Annex B + +#O-RU Reception Window C-plane DL +T2a_max_cp_dl=562 #in T2a_max_up + Tcp_adv_dl as per Annex B +T2a_min_cp_dl=331 #in T2a_min_up + Tcp_adv_dl as per Annex B +########################################################### + diff --git a/fhi_lib/app/usecase/dss/mu0_5mhz/11/config_file_o_ru.dat b/fhi_lib/app/usecase/dss/mu0_5mhz/11/config_file_o_ru.dat new file mode 100644 index 0000000..251bab4 --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_5mhz/11/config_file_o_ru.dat @@ -0,0 +1,140 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranRanTech=1 # 5G-NR (0) | LTE (1) +xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) +ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=0 #15Khz Sub Carrier Spacing +ttiPeriod=1000 # in us TTI period (15Khz default 1000us) +nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=5 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=5 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=2048 +nULFftSize=2048 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=10 +ioSleep=1 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/dss/mu0_20mhz/ant_0.bin #CC0 +antC1=./usecase/dss/mu0_20mhz/ant_1.bin #CC0 +antC2=./usecase/dss/mu0_20mhz/ant_2.bin #CC0 +antC3=./usecase/dss/mu0_20mhz/ant_3.bin #CC0 + +## RACH TODO: update for PRACH +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +#rachOffset=43 # RB offset for prach detection (see RIU spec) +prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +antPrachC0=./usecase/lte_a/mu0_20mhz/ant_0.bin +antPrachC1=./usecase/lte_a/mu0_20mhz/ant_1.bin +antPrachC2=./usecase/lte_a/mu0_20mhz/ant_2.bin +antPrachC3=./usecase/lte_a/mu0_20mhz/ant_3.bin + +########################################################### +##Section Settings +dssEnable=1 # Enable (1)| disable (0) - flag to enable extType-9 +dssPeriod=5 +technology=1,1,0,0,1 #Consider each comma separated value as a technology(NR/LTE) for a given slot. 1-NR, 0-LTE. this pattern repeats after every dssPeriod +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled +c_plane_vlan_tag=1 #VLAN Tag used for C-Plane +u_plane_vlan_tag=2 #VLAN Tag used for U-Plane + +##RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +#CID settings +DU_Port_ID_bitwidth=2 +BandSector_ID_bitwidth=3 +CC_ID_bitwidth=3 +RU_Port_ID_bitwidth=8 + +# LTE-FDD-FR1-CAT-A-NoBF / LTE-FDD-FR1-CAT-A-DBF +# O-RAN.WG4.IOT.0-v02.00 +# Table A.2.3.2-1: LTE FDD IOT Profile 2 - LTE-FDD-FR1-CAT-A-NoBF + +#U-plane +##Transmission Window +T1a_max_up=437 +T1a_min_up=366 + +#Reception Window U-plane +T2a_max_up=437 +T2a_min_up=206 + +Tadv_cp_dl=125 + +#Transmission Window +Ta3_max=232 #in us +Ta3_min=70 #in us + +#Reception Window +Ta4_max=392 +Ta4_min=70 + +##Transmission Window Fast C-plane UL +T1a_max_cp_ul=356 +T1a_min_cp_ul=285 + +#Reception Window C-plane UL +T2a_max_cp_ul=356 #in us +T2a_min_cp_ul=125 #in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_max_cp_dl=562 #in T1a_max_up + Tcp_adv_dl as per Annex B +T1a_min_cp_dl=491 #in T1a_min_up + Tcp_adv_dl as per Annex B + +#O-RU Reception Window C-plane DL +T2a_max_cp_dl=562 #in T2a_max_up + Tcp_adv_dl as per Annex B +T2a_min_cp_dl=331 #in T2a_min_up + Tcp_adv_dl as per Annex B +########################################################### + diff --git a/fhi_lib/app/usecase/dss/mu0_5mhz/11/usecase_du.cfg b/fhi_lib/app/usecase/dss/mu0_5mhz/11/usecase_du.cfg new file mode 100644 index 0000000..8b923ae --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_5mhz/11/usecase_du.cfg @@ -0,0 +1,73 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ +# This is simple configuration file. Use '#' sign for comments +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +ioCore=5 # core id +ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml + +oXuNum=1 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) + +oXuCfgFile0=./config_file_o_du.dat #O-RU0 + +#O-XU 0 +#PciBusAddoXu0Vf0=0000:51:01.0 +#PciBusAddoXu0Vf1=0000:51:01.1 +#PciBusAddoXu0Vf2=0000:51:01.2 +#PciBusAddoXu0Vf3=0000:51:01.3 + +#O-XU 1 +#PciBusAddoXu1Vf0=0000:51:01.4 +#PciBusAddoXu1Vf1=0000:51:01.5 +#PciBusAddoXu1Vf2=0000:51:01.6 +#PciBusAddoXu1Vf3=0000:51:01.7 + +#O-XU 2 +#PciBusAddoXu2Vf0=0000:51:02.0 +#PciBusAddoXu2Vf1=0000:51:02.1 +#PciBusAddoXu2Vf2=0000:51:02.2 +#PciBusAddoXu2Vf3=0000:51:02.3 + +# remote O-XU 0 Eth Link 0 +#oXuRem0Mac0=b4:96:91:94:de:40 +#oXuRem0Mac1=b4:96:91:94:de:41 +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 + +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/118/usecase_ru.cfg b/fhi_lib/app/usecase/dss/mu0_5mhz/11/usecase_ru.cfg similarity index 100% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/118/usecase_ru.cfg rename to fhi_lib/app/usecase/dss/mu0_5mhz/11/usecase_ru.cfg diff --git a/fhi_lib/app/usecase/dss/mu0_5mhz/60/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/dss/mu0_5mhz/60/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..0d387ec --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_5mhz/60/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 5 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 6 + + 0,0,0,0,0,0,0,0,0,0,0,0 + + 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000 + + 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/dss/mu0_5mhz/60/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/dss/mu0_5mhz/60/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_5mhz/60/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/dss/mu0_5mhz/60/config_file_o_du.dat b/fhi_lib/app/usecase/dss/mu0_5mhz/60/config_file_o_du.dat new file mode 100644 index 0000000..cf594ad --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_5mhz/60/config_file_o_du.dat @@ -0,0 +1,148 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU (0) | RU(1) +xranRanTech=1 # 5G-NR (0) | LTE (1) +xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) +ccNum=6 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=0 #15Khz Sub Carrier Spacing +ttiPeriod=1000 # in us TTI period (15Khz default 1000us) +nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=5 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=5 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=512 +nULFftSize=512 + +nFrameDuplexType=0 # 0 - FDD 1 - TDD +nTddPeriod=0 #TDD priod e.g. DDDS 4 + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +#ioSleep=1 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/dss/mu0_5mhz/ant_0.bin #CC0 +antC1=./usecase/dss/mu0_5mhz/ant_1.bin #CC0 +antC2=./usecase/dss/mu0_5mhz/ant_2.bin #CC0 +antC3=./usecase/dss/mu0_5mhz/ant_3.bin #CC0 +antC4=./usecase/dss/mu0_5mhz/ant_0.bin #CC1 +antC5=./usecase/dss/mu0_5mhz/ant_1.bin #CC1 +antC6=./usecase/dss/mu0_5mhz/ant_2.bin #CC1 +antC7=./usecase/dss/mu0_5mhz/ant_3.bin #CC1 +antC8=./usecase/dss/mu0_5mhz/ant_0.bin #CC2 +antC9=./usecase/dss/mu0_5mhz/ant_1.bin #CC2 +antC10=./usecase/dss/mu0_5mhz/ant_2.bin #CC2 +antC11=./usecase/dss/mu0_5mhz/ant_3.bin #CC2 +antC12=./usecase/dss/mu0_5mhz/ant_0.bin #CC3 +antC13=./usecase/dss/mu0_5mhz/ant_1.bin #CC3 +antC14=./usecase/dss/mu0_5mhz/ant_2.bin #CC3 +antC15=./usecase/dss/mu0_5mhz/ant_3.bin #CC3 +antC16=./usecase/dss/mu0_5mhz/ant_0.bin #CC4 +antC17=./usecase/dss/mu0_5mhz/ant_1.bin #CC4 +antC18=./usecase/dss/mu0_5mhz/ant_2.bin #CC4 +antC19=./usecase/dss/mu0_5mhz/ant_3.bin #CC4 +antC20=./usecase/dss/mu0_5mhz/ant_0.bin #CC5 +antC21=./usecase/dss/mu0_5mhz/ant_1.bin #CC5 +antC22=./usecase/dss/mu0_5mhz/ant_2.bin #CC5 +antC23=./usecase/dss/mu0_5mhz/ant_3.bin #CC5 + +## RACH TODO: update for PRACH +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +#rachOffset=43 # RB offset for prach detection (see RIU spec) +#rachCfgIdx=14 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +dssEnable=1 # Enable (1)| disable (0) - flag to enable extType-9 +dssPeriod=5 +technology=1,1,0,0,1 #Consider each comma separated value as a technology(NR/LTE) for a given slot. 1-NR, 0-LTE. this pattern repeats after every dssPeriod +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +#CID settings +DU_Port_ID_bitwidth=2 +BandSector_ID_bitwidth=3 +CC_ID_bitwidth=3 +RU_Port_ID_bitwidth=8 + +# LTE-FDD-FR1-CAT-A-NoBF / LTE-FDD-FR1-CAT-A-DBF +# O-RAN.WG4.IOT.0-v02.00 +# Table A.2.3.2-1: LTE FDD IOT Profile 2 - LTE-FDD-FR1-CAT-A-NoBF + +#U-plane +##Transmission Window +T1a_max_up=437 +T1a_min_up=366 + +#Reception Window U-plane +T2a_max_up=437 +T2a_min_up=206 + +Tadv_cp_dl=125 + +#Transmission Window +Ta3_max=232 #in us +Ta3_min=70 #in us + +#Reception Window +Ta4_max=392 +Ta4_min=70 + +##Transmission Window Fast C-plane UL +T1a_max_cp_ul=356 +T1a_min_cp_ul=285 + +#Reception Window C-plane UL +T2a_max_cp_ul=356 #in us +T2a_min_cp_ul=125 #in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_max_cp_dl=562 #in T1a_max_up + Tcp_adv_dl as per Annex B +T1a_min_cp_dl=491 #in T1a_min_up + Tcp_adv_dl as per Annex B + +#O-RU Reception Window C-plane DL +T2a_max_cp_dl=562 #in T2a_max_up + Tcp_adv_dl as per Annex B +T2a_min_cp_dl=331 #in T2a_min_up + Tcp_adv_dl as per Annex B +########################################################### + diff --git a/fhi_lib/app/usecase/dss/mu0_5mhz/60/config_file_o_ru.dat b/fhi_lib/app/usecase/dss/mu0_5mhz/60/config_file_o_ru.dat new file mode 100644 index 0000000..dcddecd --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_5mhz/60/config_file_o_ru.dat @@ -0,0 +1,155 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranRanTech=1 # 5G-NR (0) | LTE (1) +xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) +ccNum=6 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=0 #15Khz Sub Carrier Spacing +ttiPeriod=1000 # in us TTI period (15Khz default 1000us) +nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=5 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=5 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=512 +nULFftSize=512 + +nFrameDuplexType=0 # 0 - FDD 1 - TDD +nTddPeriod=0 #TDD priod e.g. DDDS 4 + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=10 +#ioSleep=1 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/dss/mu0_5mhz/ant_0.bin #CC0 +antC1=./usecase/dss/mu0_5mhz/ant_1.bin #CC0 +antC2=./usecase/dss/mu0_5mhz/ant_2.bin #CC0 +antC3=./usecase/dss/mu0_5mhz/ant_3.bin #CC0 +antC4=./usecase/dss/mu0_5mhz/ant_0.bin #CC1 +antC5=./usecase/dss/mu0_5mhz/ant_1.bin #CC1 +antC6=./usecase/dss/mu0_5mhz/ant_2.bin #CC1 +antC7=./usecase/dss/mu0_5mhz/ant_3.bin #CC1 +antC8=./usecase/dss/mu0_5mhz/ant_0.bin #CC2 +antC9=./usecase/dss/mu0_5mhz/ant_1.bin #CC2 +antC10=./usecase/dss/mu0_5mhz/ant_2.bin #CC2 +antC11=./usecase/dss/mu0_5mhz/ant_3.bin #CC2 +antC12=./usecase/dss/mu0_5mhz/ant_0.bin #CC3 +antC13=./usecase/dss/mu0_5mhz/ant_1.bin #CC3 +antC14=./usecase/dss/mu0_5mhz/ant_2.bin #CC3 +antC15=./usecase/dss/mu0_5mhz/ant_3.bin #CC3 +antC16=./usecase/dss/mu0_5mhz/ant_0.bin #CC4 +antC17=./usecase/dss/mu0_5mhz/ant_1.bin #CC4 +antC18=./usecase/dss/mu0_5mhz/ant_2.bin #CC4 +antC19=./usecase/dss/mu0_5mhz/ant_3.bin #CC4 +antC20=./usecase/dss/mu0_5mhz/ant_0.bin #CC5 +antC21=./usecase/dss/mu0_5mhz/ant_1.bin #CC5 +antC22=./usecase/dss/mu0_5mhz/ant_2.bin #CC5 +antC23=./usecase/dss/mu0_5mhz/ant_3.bin #CC5 + +## RACH TODO: update for PRACH +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +#rachOffset=43 # RB offset for prach detection (see RIU spec) +prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +antPrachC0=./usecase/lte_a/mu0_20mhz/ant_0.bin +antPrachC1=./usecase/lte_a/mu0_20mhz/ant_1.bin +antPrachC2=./usecase/lte_a/mu0_20mhz/ant_2.bin +antPrachC3=./usecase/lte_a/mu0_20mhz/ant_3.bin + +########################################################### +##Section Settings +dssEnable=1 # Enable (1)| disable (0) - flag to enable extType-9 +dssPeriod=5 +technology=1,1,0,0,1 #Consider each comma separated value as a technology(NR/LTE) for a given slot. 1-NR, 0-LTE. this pattern repeats after every dssPeriod +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled +c_plane_vlan_tag=1 #VLAN Tag used for C-Plane +u_plane_vlan_tag=2 #VLAN Tag used for U-Plane + +##RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +#CID settings +DU_Port_ID_bitwidth=2 +BandSector_ID_bitwidth=3 +CC_ID_bitwidth=3 +RU_Port_ID_bitwidth=8 + +# LTE-FDD-FR1-CAT-A-NoBF / LTE-FDD-FR1-CAT-A-DBF +# O-RAN.WG4.IOT.0-v02.00 +# Table A.2.3.2-1: LTE FDD IOT Profile 2 - LTE-FDD-FR1-CAT-A-NoBF + +#U-plane +##Transmission Window +T1a_max_up=437 +T1a_min_up=366 + +#Reception Window U-plane +T2a_max_up=437 +T2a_min_up=206 + +Tadv_cp_dl=125 + +#Transmission Window +Ta3_max=232 #in us +Ta3_min=70 #in us + +#Reception Window +Ta4_max=392 +Ta4_min=70 + +##Transmission Window Fast C-plane UL +T1a_max_cp_ul=356 +T1a_min_cp_ul=285 + +#Reception Window C-plane UL +T2a_max_cp_ul=356 #in us +T2a_min_cp_ul=125 #in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_max_cp_dl=562 #in T1a_max_up + Tcp_adv_dl as per Annex B +T1a_min_cp_dl=491 #in T1a_min_up + Tcp_adv_dl as per Annex B + +#O-RU Reception Window C-plane DL +T2a_max_cp_dl=562 #in T2a_max_up + Tcp_adv_dl as per Annex B +T2a_min_cp_dl=331 #in T2a_min_up + Tcp_adv_dl as per Annex B +########################################################### + diff --git a/fhi_lib/app/usecase/dss/mu0_5mhz/60/usecase_du.cfg b/fhi_lib/app/usecase/dss/mu0_5mhz/60/usecase_du.cfg new file mode 100644 index 0000000..66f92dc --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_5mhz/60/usecase_du.cfg @@ -0,0 +1,74 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ +# This is simple configuration file. Use '#' sign for comments +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +ioCore=5 # core id +ioWorker=0x6000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml + +oXuNum=1 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) + +oXuCfgFile0=./config_file_o_du.dat #O-RU0 +#oXuCfgFile1=./config_file_o_du.dat #O-RU0 + +#O-XU 0 +#PciBusAddoXu0Vf0=0000:51:01.0 +#PciBusAddoXu0Vf1=0000:51:01.1 +#PciBusAddoXu0Vf2=0000:51:01.2 +#PciBusAddoXu0Vf3=0000:51:01.3 + +#O-XU 1 +#PciBusAddoXu1Vf0=0000:51:01.4 +#PciBusAddoXu1Vf1=0000:51:01.5 +#PciBusAddoXu1Vf2=0000:51:01.6 +#PciBusAddoXu1Vf3=0000:51:01.7 + +#O-XU 2 +#PciBusAddoXu2Vf0=0000:51:02.0 +#PciBusAddoXu2Vf1=0000:51:02.1 +#PciBusAddoXu2Vf2=0000:51:02.2 +#PciBusAddoXu2Vf3=0000:51:02.3 + +# remote O-XU 0 Eth Link 0 +#oXuRem0Mac0=b4:96:91:94:de:40 +#oXuRem0Mac1=b4:96:91:94:de:41 +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 + +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/dss/mu0_5mhz/60/usecase_ru.cfg b/fhi_lib/app/usecase/dss/mu0_5mhz/60/usecase_ru.cfg new file mode 100644 index 0000000..b24b453 --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_5mhz/60/usecase_ru.cfg @@ -0,0 +1,68 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ +# This is simple configuration file. Use '#' sign for comments +appMode=1 # All O-DU(0) | O-RU(1) +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +ioCore=15 # core id +ioWorker=0x60000000 # mask [0- no workers] + +oXuNum=1 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) + +oXuCfgFile0=./config_file_o_ru.dat #O-RU0 +#oXuCfgFile1=./config_file_o_ru.dat +#O-XU 0 +#PciBusAddoXu0Vf0=0000:51:11.0 +#PciBusAddoXu0Vf1=0000:51:11.1 +#PciBusAddoXu0Vf2=0000:51:11.2 +#PciBusAddoXu0Vf3=0000:51:11.3 + +#O-XU 1 +#PciBusAddoXu1Vf0=0000:51:11.4 +#PciBusAddoXu1Vf1=0000:51:11.5 +#PciBusAddoXu1Vf2=0000:51:11.6 +#PciBusAddoXu1Vf3=0000:51:11.7 + +#O-XU 2 +#PciBusAddoXu2Vf0=0000:51:12.0 +#PciBusAddoXu2Vf1=0000:51:12.1 +#PciBusAddoXu2Vf2=0000:51:12.2 +#PciBusAddoXu2Vf3=0000:51:12.3 + +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:00 +oXuRem0Mac1=00:11:22:33:00:10 +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:20 +oXuRem0Mac3=00:11:22:33:00:30 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:00 +oXuRem1Mac1=00:11:22:33:01:10 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:20 +oXuRem1Mac3=00:11:22:33:01:30 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:00 +oXuRem2Mac1=00:11:22:33:02:10 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:20 +oXuRem2Mac3=00:11:22:33:02:30 diff --git a/fhi_lib/app/usecase/dss/mu0_5mhz/61/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/dss/mu0_5mhz/61/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..0d387ec --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_5mhz/61/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 5 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 6 + + 0,0,0,0,0,0,0,0,0,0,0,0 + + 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000 + + 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/dss/mu0_5mhz/61/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/dss/mu0_5mhz/61/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_5mhz/61/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/dss/mu0_5mhz/61/config_file_o_du.dat b/fhi_lib/app/usecase/dss/mu0_5mhz/61/config_file_o_du.dat new file mode 100644 index 0000000..d3e226b --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_5mhz/61/config_file_o_du.dat @@ -0,0 +1,153 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +appMode=0 # O-DU (0) | RU(1) +xranRanTech=1 # 5G-NR (0) | LTE (1) +xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) +ccNum=6 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=0 #15Khz Sub Carrier Spacing +ttiPeriod=1000 # in us TTI period (15Khz default 1000us) +nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=5 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=5 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=512 +nULFftSize=512 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=5 +#ioSleep=1 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/dss/mu0_5mhz/ant_0.bin #CC0 +antC1=./usecase/dss/mu0_5mhz/ant_1.bin #CC0 +antC2=./usecase/dss/mu0_5mhz/ant_2.bin #CC0 +antC3=./usecase/dss/mu0_5mhz/ant_3.bin #CC0 +antC4=./usecase/dss/mu0_5mhz/ant_0.bin #CC1 +antC5=./usecase/dss/mu0_5mhz/ant_1.bin #CC1 +antC6=./usecase/dss/mu0_5mhz/ant_2.bin #CC1 +antC7=./usecase/dss/mu0_5mhz/ant_3.bin #CC1 +antC8=./usecase/dss/mu0_5mhz/ant_0.bin #CC2 +antC9=./usecase/dss/mu0_5mhz/ant_1.bin #CC2 +antC10=./usecase/dss/mu0_5mhz/ant_2.bin #CC2 +antC11=./usecase/dss/mu0_5mhz/ant_3.bin #CC2 +antC12=./usecase/dss/mu0_5mhz/ant_0.bin #CC3 +antC13=./usecase/dss/mu0_5mhz/ant_1.bin #CC3 +antC14=./usecase/dss/mu0_5mhz/ant_2.bin #CC3 +antC15=./usecase/dss/mu0_5mhz/ant_3.bin #CC3 +antC16=./usecase/dss/mu0_5mhz/ant_0.bin #CC4 +antC17=./usecase/dss/mu0_5mhz/ant_1.bin #CC4 +antC18=./usecase/dss/mu0_5mhz/ant_2.bin #CC4 +antC19=./usecase/dss/mu0_5mhz/ant_3.bin #CC4 +antC20=./usecase/dss/mu0_5mhz/ant_0.bin #CC5 +antC21=./usecase/dss/mu0_5mhz/ant_1.bin #CC5 +antC22=./usecase/dss/mu0_5mhz/ant_2.bin #CC5 +antC23=./usecase/dss/mu0_5mhz/ant_3.bin #CC5 + +## RACH TODO: update for PRACH +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +#rachOffset=43 # RB offset for prach detection (see RIU spec) +#rachCfgIdx=14 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +########################################################### +##Section Settings +dssEnable=1 # Enable (1)| disable (0) - flag to enable extType-9 +dssPeriod=5 +technology=1,1,0,0,1 #Consider each comma separated value as a technology(NR/LTE) for a given slot. 1-NR, 0-LTE. this pattern repeats after every dssPeriod +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled + +##RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +#CID settings +DU_Port_ID_bitwidth=2 +BandSector_ID_bitwidth=3 +CC_ID_bitwidth=3 +RU_Port_ID_bitwidth=8 + +# LTE-FDD-FR1-CAT-A-NoBF / LTE-FDD-FR1-CAT-A-DBF +# O-RAN.WG4.IOT.0-v02.00 +# Table A.2.3.2-1: LTE FDD IOT Profile 2 - LTE-FDD-FR1-CAT-A-NoBF + +#U-plane +##Transmission Window +T1a_max_up=437 +T1a_min_up=366 + +#Reception Window U-plane +T2a_max_up=437 +T2a_min_up=206 + +Tadv_cp_dl=125 + +#Transmission Window +Ta3_max=232 #in us +Ta3_min=70 #in us + +#Reception Window +Ta4_max=392 +Ta4_min=70 + +##Transmission Window Fast C-plane UL +T1a_max_cp_ul=356 +T1a_min_cp_ul=285 + +#Reception Window C-plane UL +T2a_max_cp_ul=356 #in us +T2a_min_cp_ul=125 #in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_max_cp_dl=562 #in T1a_max_up + Tcp_adv_dl as per Annex B +T1a_min_cp_dl=491 #in T1a_min_up + Tcp_adv_dl as per Annex B + +#O-RU Reception Window C-plane DL +T2a_max_cp_dl=562 #in T2a_max_up + Tcp_adv_dl as per Annex B +T2a_min_cp_dl=331 #in T2a_min_up + Tcp_adv_dl as per Annex B +########################################################### + diff --git a/fhi_lib/app/usecase/dss/mu0_5mhz/61/config_file_o_ru.dat b/fhi_lib/app/usecase/dss/mu0_5mhz/61/config_file_o_ru.dat new file mode 100644 index 0000000..e54c66c --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_5mhz/61/config_file_o_ru.dat @@ -0,0 +1,160 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ + +# This is simple configuration file. Use '#' sign for comments +instanceId=1 # 0,1,2,... in case more than 1 application started on the same system +appMode=1 # O-DU(0) | O-RU(1) +xranRanTech=1 # 5G-NR (0) | LTE (1) +xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) +ccNum=6 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) +antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B + +##Numerology +mu=0 #15Khz Sub Carrier Spacing +ttiPeriod=1000 # in us TTI period (15Khz default 1000us) +nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 +nDLBandwidth=5 #Carrier bandwidth for in MHz. Value: 5->400 +nULBandwidth=5 #Carrier bandwidth for in MHz. Value: 5->400 +nDLFftSize=512 +nULFftSize=512 + +nFrameDuplexType=1 # 0 - FDD 1 - TDD +nTddPeriod=5 #[0-4] DDDSU, for S it's 10:2:2 +sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig3=0,0,0,0,0,0,0,0,0,0,2,2,1,1 # (0) - DL (1) - UL (2) - GUARD +sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD + +MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single + #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) +Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec +Gps_Beta=0 + +ioCore=10 +#ioSleep=1 + +numSlots=20 #number of slots per IQ files +antC0=./usecase/dss/mu0_5mhz/ant_0.bin #CC0 +antC1=./usecase/dss/mu0_5mhz/ant_1.bin #CC0 +antC2=./usecase/dss/mu0_5mhz/ant_2.bin #CC0 +antC3=./usecase/dss/mu0_5mhz/ant_3.bin #CC0 +antC4=./usecase/dss/mu0_5mhz/ant_0.bin #CC1 +antC5=./usecase/dss/mu0_5mhz/ant_1.bin #CC1 +antC6=./usecase/dss/mu0_5mhz/ant_2.bin #CC1 +antC7=./usecase/dss/mu0_5mhz/ant_3.bin #CC1 +antC8=./usecase/dss/mu0_5mhz/ant_0.bin #CC2 +antC9=./usecase/dss/mu0_5mhz/ant_1.bin #CC2 +antC10=./usecase/dss/mu0_5mhz/ant_2.bin #CC2 +antC11=./usecase/dss/mu0_5mhz/ant_3.bin #CC2 +antC12=./usecase/dss/mu0_5mhz/ant_0.bin #CC3 +antC13=./usecase/dss/mu0_5mhz/ant_1.bin #CC3 +antC14=./usecase/dss/mu0_5mhz/ant_2.bin #CC3 +antC15=./usecase/dss/mu0_5mhz/ant_3.bin #CC3 +antC16=./usecase/dss/mu0_5mhz/ant_0.bin #CC4 +antC17=./usecase/dss/mu0_5mhz/ant_1.bin #CC4 +antC18=./usecase/dss/mu0_5mhz/ant_2.bin #CC4 +antC19=./usecase/dss/mu0_5mhz/ant_3.bin #CC4 +antC20=./usecase/dss/mu0_5mhz/ant_0.bin #CC5 +antC21=./usecase/dss/mu0_5mhz/ant_1.bin #CC5 +antC22=./usecase/dss/mu0_5mhz/ant_2.bin #CC5 +antC23=./usecase/dss/mu0_5mhz/ant_3.bin #CC5 + +## RACH TODO: update for PRACH +rachEnable=0 # Enable (1)| disable (0) PRACH configuration +#rachOffset=43 # RB offset for prach detection (see RIU spec) +prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index + +antPrachC0=./usecase/lte_a/mu0_20mhz/ant_0.bin +antPrachC1=./usecase/lte_a/mu0_20mhz/ant_1.bin +antPrachC2=./usecase/lte_a/mu0_20mhz/ant_2.bin +antPrachC3=./usecase/lte_a/mu0_20mhz/ant_3.bin + +########################################################### +##Section Settings +dssEnable=1 # Enable (1)| disable (0) - flag to enable extType-9 +dssPeriod=5 +technology=1,1,0,0,1 #Consider each comma separated value as a technology(NR/LTE) for a given slot. 1-NR, 0-LTE. this pattern repeats after every dssPeriod +########################################################### + +## control of IQ byte order +iqswap=0 #do swap of IQ before send buffer to eth +nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order + +##Debug +debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary +bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode + +CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled +c_plane_vlan_tag=1 #VLAN Tag used for C-Plane +u_plane_vlan_tag=2 #VLAN Tag used for U-Plane + +##RU Settings +totalBFWeights=32 # Total number of Beamforming Weights on RU + +#CID settings +DU_Port_ID_bitwidth=2 +BandSector_ID_bitwidth=3 +CC_ID_bitwidth=3 +RU_Port_ID_bitwidth=8 + +# LTE-FDD-FR1-CAT-A-NoBF / LTE-FDD-FR1-CAT-A-DBF +# O-RAN.WG4.IOT.0-v02.00 +# Table A.2.3.2-1: LTE FDD IOT Profile 2 - LTE-FDD-FR1-CAT-A-NoBF + +#U-plane +##Transmission Window +T1a_max_up=437 +T1a_min_up=366 + +#Reception Window U-plane +T2a_max_up=437 +T2a_min_up=206 + +Tadv_cp_dl=125 + +#Transmission Window +Ta3_max=232 #in us +Ta3_min=70 #in us + +#Reception Window +Ta4_max=392 +Ta4_min=70 + +##Transmission Window Fast C-plane UL +T1a_max_cp_ul=356 +T1a_min_cp_ul=285 + +#Reception Window C-plane UL +T2a_max_cp_ul=356 #in us +T2a_min_cp_ul=125 #in us + +########################################################### +##O-DU Settings +#C-plane +#Transmission Window Fast C-plane DL +T1a_max_cp_dl=562 #in T1a_max_up + Tcp_adv_dl as per Annex B +T1a_min_cp_dl=491 #in T1a_min_up + Tcp_adv_dl as per Annex B + +#O-RU Reception Window C-plane DL +T2a_max_cp_dl=562 #in T2a_max_up + Tcp_adv_dl as per Annex B +T2a_min_cp_dl=331 #in T2a_min_up + Tcp_adv_dl as per Annex B +########################################################### + diff --git a/fhi_lib/app/usecase/dss/mu0_5mhz/61/usecase_du.cfg b/fhi_lib/app/usecase/dss/mu0_5mhz/61/usecase_du.cfg new file mode 100644 index 0000000..868f3da --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_5mhz/61/usecase_du.cfg @@ -0,0 +1,73 @@ +#****************************************************************************** +# +# Copyright (c) 2019 Intel. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#******************************************************************************/ +# This is simple configuration file. Use '#' sign for comments +appMode=0 # All O-DU(0) | O-RU(1) +instanceId=0 # 0,1,2,... in case more than 1 application started on the same system +ioCore=5 # core id +ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml + +oXuNum=1 # numbers of O-RU connected to O-DU + +oXuEthLinkSpeed=25 # 10G,25G,40G,100G speed of Physical connection on O-RU +oXuLinesNumber=1 # 1, 2, 3 total number of links per O-RU (Fronthaul Ethernet link) + +oXuCfgFile0=./config_file_o_du.dat #O-RU0 + +#O-XU 0 +#PciBusAddoXu0Vf0=0000:51:01.0 +#PciBusAddoXu0Vf1=0000:51:01.1 +#PciBusAddoXu0Vf2=0000:51:01.2 +#PciBusAddoXu0Vf3=0000:51:01.3 + +#O-XU 1 +#PciBusAddoXu1Vf0=0000:51:01.4 +#PciBusAddoXu1Vf1=0000:51:01.5 +#PciBusAddoXu1Vf2=0000:51:01.6 +#PciBusAddoXu1Vf3=0000:51:01.7 + +#O-XU 2 +#PciBusAddoXu2Vf0=0000:51:02.0 +#PciBusAddoXu2Vf1=0000:51:02.1 +#PciBusAddoXu2Vf2=0000:51:02.2 +#PciBusAddoXu2Vf3=0000:51:02.3 + +# remote O-XU 0 Eth Link 0 +#oXuRem0Mac0=b4:96:91:94:de:40 +#oXuRem0Mac1=b4:96:91:94:de:41 +# remote O-XU 0 Eth Link 0 +oXuRem0Mac0=00:11:22:33:00:01 +oXuRem0Mac1=00:11:22:33:00:11 + +# remote O-XU 0 Eth Link 1 +oXuRem0Mac2=00:11:22:33:00:21 +oXuRem0Mac3=00:11:22:33:00:31 + +# remote O-XU 1 Eth Link 0 +oXuRem1Mac0=00:11:22:33:01:01 +oXuRem1Mac1=00:11:22:33:01:11 +# remote O-XU 1 Eth Link 1 +oXuRem1Mac2=00:11:22:33:01:21 +oXuRem1Mac3=00:11:22:33:01:31 + +# remote O-XU 2 Eth Link 0 +oXuRem2Mac0=00:11:22:33:02:01 +oXuRem2Mac1=00:11:22:33:02:11 +# remote O-XU 2 Eth Link 1 +oXuRem2Mac2=00:11:22:33:02:21 +oXuRem2Mac3=00:11:22:33:02:31 diff --git a/fhi_lib/app/usecase/cat_b/mu1_100mhz/119/usecase_ru.cfg b/fhi_lib/app/usecase/dss/mu0_5mhz/61/usecase_ru.cfg similarity index 100% rename from fhi_lib/app/usecase/cat_b/mu1_100mhz/119/usecase_ru.cfg rename to fhi_lib/app/usecase/dss/mu0_5mhz/61/usecase_ru.cfg diff --git a/fhi_lib/app/usecase/dss/mu0_5mhz/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/dss/mu0_5mhz/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..ea87359 --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_5mhz/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 0,0,0,0 + + 1000, 1000, 1000, 1000 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/dss/mu0_5mhz/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/dss/mu0_5mhz/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/dss/mu0_5mhz/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/lte_a/mu0_10mhz/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/lte_a/mu0_10mhz/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..ea87359 --- /dev/null +++ b/fhi_lib/app/usecase/lte_a/mu0_10mhz/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 0,0,0,0 + + 1000, 1000, 1000, 1000 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/lte_a/mu0_10mhz/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/lte_a/mu0_10mhz/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/lte_a/mu0_10mhz/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/lte_a/mu0_10mhz/config_file_o_du.dat b/fhi_lib/app/usecase/lte_a/mu0_10mhz/config_file_o_du.dat index 5cf9eba..b21987e 100644 --- a/fhi_lib/app/usecase/lte_a/mu0_10mhz/config_file_o_du.dat +++ b/fhi_lib/app/usecase/lte_a/mu0_10mhz/config_file_o_du.dat @@ -77,7 +77,7 @@ antC14=./usecase/lte_a/mu0_10mhz/ant_14.bin #CC3 antC15=./usecase/lte_a/mu0_10mhz/ant_15.bin #CC3 ## RACH TODO: update for PRACH -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration #rachOffset=43 # RB offset for prach detection (see RIU spec) #rachCfgIdx=14 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index diff --git a/fhi_lib/app/usecase/lte_a/mu0_10mhz/config_file_o_ru.dat b/fhi_lib/app/usecase/lte_a/mu0_10mhz/config_file_o_ru.dat index 45a83ce..c996234 100644 --- a/fhi_lib/app/usecase/lte_a/mu0_10mhz/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/lte_a/mu0_10mhz/config_file_o_ru.dat @@ -78,7 +78,7 @@ antC14=./usecase/lte_a/mu0_10mhz/ant_14.bin #CC3 antC15=./usecase/lte_a/mu0_10mhz/ant_15.bin #CC3 ## RACH TODO: update for PRACH -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration #rachOffset=43 # RB offset for prach detection (see RIU spec) prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index diff --git a/fhi_lib/app/usecase/lte_a/mu0_10mhz/usecase_du.cfg b/fhi_lib/app/usecase/lte_a/mu0_10mhz/usecase_du.cfg index 5c067f4..84a7872 100644 --- a/fhi_lib/app/usecase/lte_a/mu0_10mhz/usecase_du.cfg +++ b/fhi_lib/app/usecase/lte_a/mu0_10mhz/usecase_du.cfg @@ -20,6 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/lte_a/mu0_20mhz/config_file_o_du.dat b/fhi_lib/app/usecase/lte_a/mu0_20mhz/config_file_o_du.dat index 9f1ab05..22fff2a 100644 --- a/fhi_lib/app/usecase/lte_a/mu0_20mhz/config_file_o_du.dat +++ b/fhi_lib/app/usecase/lte_a/mu0_20mhz/config_file_o_du.dat @@ -77,7 +77,7 @@ antC14=./usecase/lte_a/mu0_20mhz/ant_14.bin #CC3 antC15=./usecase/lte_a/mu0_20mhz/ant_15.bin #CC3 ## RACH TODO: update for PRACH -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration #rachOffset=43 # RB offset for prach detection (see RIU spec) #rachCfgIdx=14 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index diff --git a/fhi_lib/app/usecase/lte_a/mu0_20mhz/config_file_o_ru.dat b/fhi_lib/app/usecase/lte_a/mu0_20mhz/config_file_o_ru.dat index a0d9ebc..c7d908a 100644 --- a/fhi_lib/app/usecase/lte_a/mu0_20mhz/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/lte_a/mu0_20mhz/config_file_o_ru.dat @@ -78,7 +78,7 @@ antC14=./usecase/lte_a/mu0_20mhz/ant_14.bin #CC3 antC15=./usecase/lte_a/mu0_20mhz/ant_15.bin #CC3 ## RACH TODO: update for PRACH -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration #rachOffset=43 # RB offset for prach detection (see RIU spec) prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index diff --git a/fhi_lib/app/usecase/lte_a/mu0_20mhz/usecase_du.cfg b/fhi_lib/app/usecase/lte_a/mu0_20mhz/usecase_du.cfg index 5c067f4..84a7872 100644 --- a/fhi_lib/app/usecase/lte_a/mu0_20mhz/usecase_du.cfg +++ b/fhi_lib/app/usecase/lte_a/mu0_20mhz/usecase_du.cfg @@ -20,6 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/lte_a/mu0_5mhz/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/lte_a/mu0_5mhz/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..ea87359 --- /dev/null +++ b/fhi_lib/app/usecase/lte_a/mu0_5mhz/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 0,0,0,0 + + 1000, 1000, 1000, 1000 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/lte_a/mu0_5mhz/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/lte_a/mu0_5mhz/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/lte_a/mu0_5mhz/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/lte_a/mu0_5mhz/config_file_o_du.dat b/fhi_lib/app/usecase/lte_a/mu0_5mhz/config_file_o_du.dat index d114adb..ba81fd4 100644 --- a/fhi_lib/app/usecase/lte_a/mu0_5mhz/config_file_o_du.dat +++ b/fhi_lib/app/usecase/lte_a/mu0_5mhz/config_file_o_du.dat @@ -77,7 +77,7 @@ antC14=./usecase/lte_a/mu0_5mhz/ant_14.bin #CC3 antC15=./usecase/lte_a/mu0_5mhz/ant_15.bin #CC3 ## RACH TODO: update for PRACH -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration #rachOffset=43 # RB offset for prach detection (see RIU spec) #rachCfgIdx=14 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index diff --git a/fhi_lib/app/usecase/lte_a/mu0_5mhz/config_file_o_ru.dat b/fhi_lib/app/usecase/lte_a/mu0_5mhz/config_file_o_ru.dat index 4c5c9de..c0a90bc 100644 --- a/fhi_lib/app/usecase/lte_a/mu0_5mhz/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/lte_a/mu0_5mhz/config_file_o_ru.dat @@ -78,7 +78,7 @@ antC14=./usecase/lte_a/mu0_5mhz/ant_14.bin #CC3 antC15=./usecase/lte_a/mu0_5mhz/ant_15.bin #CC3 ## RACH TODO: update for PRACH -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration #rachOffset=43 # RB offset for prach detection (see RIU spec) prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index diff --git a/fhi_lib/app/usecase/lte_a/mu0_5mhz/usecase_du.cfg b/fhi_lib/app/usecase/lte_a/mu0_5mhz/usecase_du.cfg index 5c067f4..84a7872 100644 --- a/fhi_lib/app/usecase/lte_a/mu0_5mhz/usecase_du.cfg +++ b/fhi_lib/app/usecase/lte_a/mu0_5mhz/usecase_du.cfg @@ -20,6 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/lte_b/mu0_10mhz/1/config_file_o_du.dat b/fhi_lib/app/usecase/lte_b/mu0_10mhz/1/config_file_o_du.dat index 279df40..409ef6c 100644 --- a/fhi_lib/app/usecase/lte_b/mu0_10mhz/1/config_file_o_du.dat +++ b/fhi_lib/app/usecase/lte_b/mu0_10mhz/1/config_file_o_du.dat @@ -131,28 +131,36 @@ UlBfwUe15=./usecase/lte_b/mu0_10mhz/ul_bfw_ue_7.bin #UE7 weights for TRX anten ## RACH TODO: update for PRACH -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration #rachOffset=43 # RB offset for prach detection (see RIU spec) #rachCfgIdx=14 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index prachConfigIndex=189 -srsEanble=0 # Enable (1)| disable (0) SRS +srsEnable=0 # Enable (1)| disable (0) SRS srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) ########################################################### ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - +extType=1 nPrbElemDl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemDl0=0,25,0,14,1,1,1,9,1 PrbElemDl1=25,25,0,14,2,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=1,25,0,0,9,1,1 +ExtBfwDl1=1,25,0,0,9,1,1 nPrbElemUl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemUl0=0,25,0,14,1,1,1,9,1 PrbElemUl1=25,25,0,14,2,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=1,25,0,0,9,1,1 +ExtBfwUl1=1,25,0,0,9,1,1 ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/lte_b/mu0_10mhz/1/config_file_o_ru.dat b/fhi_lib/app/usecase/lte_b/mu0_10mhz/1/config_file_o_ru.dat index 82ba60f..1375d5e 100644 --- a/fhi_lib/app/usecase/lte_b/mu0_10mhz/1/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/lte_b/mu0_10mhz/1/config_file_o_ru.dat @@ -96,7 +96,7 @@ antC14=./usecase/lte_b/mu0_10mhz/ant_14.bin #CC3 antC15=./usecase/lte_b/mu0_10mhz/ant_15.bin #CC3 ## RACH TODO: update for PRACH -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration antPrachC0=./usecase/lte_a/mu0_10mhz/ant_0.bin antPrachC1=./usecase/lte_a/mu0_10mhz/ant_1.bin @@ -105,23 +105,31 @@ antPrachC3=./usecase/lte_a/mu0_10mhz/ant_3.bin #rachCfgIdx=14 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index prachConfigIndex=189 -srsEanble=0 # Enable (1)| disable (0) SRS +srsEnable=0 # Enable (1)| disable (0) SRS srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) ########################################################### ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - +extType=1 nPrbElemDl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemDl0=0,25,0,14,1,1,1,9,1 PrbElemDl1=25,25,0,14,2,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=1,25,0,0,9,1,1 +ExtBfwDl1=1,25,0,0,9,1,1 nPrbElemUl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemUl0=0,25,0,14,1,1,1,9,1 PrbElemUl1=25,25,0,14,2,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=1,25,0,0,9,1,1 +ExtBfwUl1=1,25,0,0,9,1,1 ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/lte_b/mu0_10mhz/1/usecase_du.cfg b/fhi_lib/app/usecase/lte_b/mu0_10mhz/1/usecase_du.cfg index 5c067f4..bd5c7e3 100644 --- a/fhi_lib/app/usecase/lte_b/mu0_10mhz/1/usecase_du.cfg +++ b/fhi_lib/app/usecase/lte_b/mu0_10mhz/1/usecase_du.cfg @@ -19,7 +19,8 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] +ioWorker=0x3000000 # mask [0- no workers] +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/lte_b/mu0_10mhz/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/lte_b/mu0_10mhz/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..ea87359 --- /dev/null +++ b/fhi_lib/app/usecase/lte_b/mu0_10mhz/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 0,0,0,0 + + 1000, 1000, 1000, 1000 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/lte_b/mu0_10mhz/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/lte_b/mu0_10mhz/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/lte_b/mu0_10mhz/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/lte_b/mu0_10mhz/config_file_o_du.dat b/fhi_lib/app/usecase/lte_b/mu0_10mhz/config_file_o_du.dat index 4d18f94..f6d1ed5 100644 --- a/fhi_lib/app/usecase/lte_b/mu0_10mhz/config_file_o_du.dat +++ b/fhi_lib/app/usecase/lte_b/mu0_10mhz/config_file_o_du.dat @@ -131,28 +131,36 @@ UlBfwUe15=./usecase/lte_b/mu0_10mhz/ul_bfw_ue_7.bin #UE7 weights for TRX anten ## RACH TODO: update for PRACH -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration #rachOffset=43 # RB offset for prach detection (see RIU spec) #rachCfgIdx=14 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index prachConfigIndex=189 -srsEanble=0 # Enable (1)| disable (0) SRS +srsEnable=0 # Enable (1)| disable (0) SRS srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) ########################################################### ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - +extType=1 nPrbElemDl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemDl0=0,25,0,14,1,1,1,9,1 PrbElemDl1=25,25,0,14,2,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=1,25,0,0,9,1,1 +ExtBfwDl1=1,25,0,0,9,1,1 nPrbElemUl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemUl0=0,25,0,14,1,1,1,9,1 PrbElemUl1=25,25,0,14,2,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=1,25,0,0,9,1,1 +ExtBfwUl1=1,25,0,0,9,1,1 ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/lte_b/mu0_10mhz/config_file_o_ru.dat b/fhi_lib/app/usecase/lte_b/mu0_10mhz/config_file_o_ru.dat index a9030f8..71133bb 100644 --- a/fhi_lib/app/usecase/lte_b/mu0_10mhz/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/lte_b/mu0_10mhz/config_file_o_ru.dat @@ -96,7 +96,7 @@ antC14=./usecase/lte_b/mu0_10mhz/ant_14.bin #CC3 antC15=./usecase/lte_b/mu0_10mhz/ant_15.bin #CC3 ## RACH TODO: update for PRACH -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration antPrachC0=./usecase/lte_a/mu0_10mhz/ant_0.bin antPrachC1=./usecase/lte_a/mu0_10mhz/ant_1.bin @@ -105,23 +105,31 @@ antPrachC3=./usecase/lte_a/mu0_10mhz/ant_3.bin #rachCfgIdx=14 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index prachConfigIndex=189 -srsEanble=0 # Enable (1)| disable (0) SRS +srsEnable=0 # Enable (1)| disable (0) SRS srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) ########################################################### ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - +extType=1 nPrbElemDl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemDl0=0,25,0,14,1,1,1,9,1 PrbElemDl1=25,25,0,14,2,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=1,25,0,0,9,1,1 +ExtBfwDl1=1,25,0,0,9,1,1 nPrbElemUl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemUl0=0,25,0,14,1,1,1,9,1 PrbElemUl1=25,25,0,14,2,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=1,25,0,0,9,1,1 +ExtBfwUl1=1,25,0,0,9,1,1 ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/lte_b/mu0_10mhz/usecase_du.cfg b/fhi_lib/app/usecase/lte_b/mu0_10mhz/usecase_du.cfg index 5c067f4..54b412b 100644 --- a/fhi_lib/app/usecase/lte_b/mu0_10mhz/usecase_du.cfg +++ b/fhi_lib/app/usecase/lte_b/mu0_10mhz/usecase_du.cfg @@ -19,7 +19,8 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] +ioWorker=0x3000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/lte_b/mu0_20mhz/1/config_file_o_du.dat b/fhi_lib/app/usecase/lte_b/mu0_20mhz/1/config_file_o_du.dat index 3e40b3c..1f3537c 100644 --- a/fhi_lib/app/usecase/lte_b/mu0_20mhz/1/config_file_o_du.dat +++ b/fhi_lib/app/usecase/lte_b/mu0_20mhz/1/config_file_o_du.dat @@ -131,28 +131,36 @@ UlBfwUe15=./usecase/lte_b/mu0_20mhz/ul_bfw_ue_7.bin #UE7 weights for TRX anten ## RACH TODO: update for PRACH -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration #rachOffset=43 # RB offset for prach detection (see RIU spec) #rachCfgIdx=14 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index prachConfigIndex=189 -srsEanble=0 # Enable (1)| disable (0) SRS +srsEnable=0 # Enable (1)| disable (0) SRS srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) ########################################################### ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - +extType=1 nPrbElemDl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemDl0=0,50,0,14,1,1,1,9,1 PrbElemDl1=50,50,0,14,2,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,25,0,0,9,1,1 +ExtBfwDl1=2,25,0,0,9,1,1 nPrbElemUl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemUl0=0,50,0,14,1,1,1,9,1 PrbElemUl1=50,50,0,14,2,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,25,0,0,9,1,1 +ExtBfwUl1=2,25,0,0,9,1,1 ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/lte_b/mu0_20mhz/1/config_file_o_ru.dat b/fhi_lib/app/usecase/lte_b/mu0_20mhz/1/config_file_o_ru.dat index afb3e80..0d55010 100644 --- a/fhi_lib/app/usecase/lte_b/mu0_20mhz/1/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/lte_b/mu0_20mhz/1/config_file_o_ru.dat @@ -96,7 +96,7 @@ antC14=./usecase/lte_b/mu0_20mhz/ant_14.bin #CC3 antC15=./usecase/lte_b/mu0_20mhz/ant_15.bin #CC3 ## RACH TODO: update for PRACH -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration antPrachC0=./usecase/lte_a/mu0_20mhz/ant_0.bin antPrachC1=./usecase/lte_a/mu0_20mhz/ant_1.bin @@ -105,23 +105,31 @@ antPrachC3=./usecase/lte_a/mu0_20mhz/ant_3.bin #rachCfgIdx=14 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index prachConfigIndex=189 -srsEanble=0 # Enable (1)| disable (0) SRS +srsEnable=0 # Enable (1)| disable (0) SRS srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) ########################################################### ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - +extType=1 nPrbElemDl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemDl0=0,50,0,14,1,1,1,9,1 PrbElemDl1=50,50,0,14,2,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,25,0,0,9,1,1 +ExtBfwDl1=2,25,0,0,9,1,1 nPrbElemUl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemUl0=0,50,0,14,1,1,1,9,1 PrbElemUl1=50,50,0,14,2,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,25,0,0,9,1,1 +ExtBfwUl1=2,25,0,0,9,1,1 ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/lte_b/mu0_20mhz/1/usecase_du.cfg b/fhi_lib/app/usecase/lte_b/mu0_20mhz/1/usecase_du.cfg index 5c067f4..bd5c7e3 100644 --- a/fhi_lib/app/usecase/lte_b/mu0_20mhz/1/usecase_du.cfg +++ b/fhi_lib/app/usecase/lte_b/mu0_20mhz/1/usecase_du.cfg @@ -19,7 +19,8 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] +ioWorker=0x3000000 # mask [0- no workers] +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/lte_b/mu0_20mhz/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/lte_b/mu0_20mhz/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..ea87359 --- /dev/null +++ b/fhi_lib/app/usecase/lte_b/mu0_20mhz/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 0,0,0,0 + + 1000, 1000, 1000, 1000 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/lte_b/mu0_20mhz/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/lte_b/mu0_20mhz/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/lte_b/mu0_20mhz/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/lte_b/mu0_20mhz/config_file_o_du.dat b/fhi_lib/app/usecase/lte_b/mu0_20mhz/config_file_o_du.dat index bddeb8c..18ed8db 100644 --- a/fhi_lib/app/usecase/lte_b/mu0_20mhz/config_file_o_du.dat +++ b/fhi_lib/app/usecase/lte_b/mu0_20mhz/config_file_o_du.dat @@ -131,28 +131,36 @@ UlBfwUe15=./usecase/lte_b/mu0_20mhz/ul_bfw_ue_7.bin #UE7 weights for TRX anten ## RACH TODO: update for PRACH -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration #rachOffset=43 # RB offset for prach detection (see RIU spec) #rachCfgIdx=14 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index prachConfigIndex=189 -srsEanble=0 # Enable (1)| disable (0) SRS +srsEnable=0 # Enable (1)| disable (0) SRS srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) ########################################################### ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - +extType=1 nPrbElemDl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemDl0=0,50,0,14,1,1,1,9,1 PrbElemDl1=50,50,0,14,2,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,25,0,0,9,1,1 +ExtBfwDl1=2,25,0,0,9,1,1 nPrbElemUl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemUl0=0,50,0,14,1,1,1,9,1 PrbElemUl1=50,50,0,14,2,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,25,0,0,9,1,1 +ExtBfwUl1=2,25,0,0,9,1,1 ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/lte_b/mu0_20mhz/config_file_o_ru.dat b/fhi_lib/app/usecase/lte_b/mu0_20mhz/config_file_o_ru.dat index 6d1776e..3f59e10 100644 --- a/fhi_lib/app/usecase/lte_b/mu0_20mhz/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/lte_b/mu0_20mhz/config_file_o_ru.dat @@ -96,7 +96,7 @@ antC14=./usecase/lte_b/mu0_20mhz/ant_14.bin #CC3 antC15=./usecase/lte_b/mu0_20mhz/ant_15.bin #CC3 ## RACH TODO: update for PRACH -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration antPrachC0=./usecase/lte_a/mu0_20mhz/ant_0.bin antPrachC1=./usecase/lte_a/mu0_20mhz/ant_1.bin @@ -105,23 +105,31 @@ antPrachC3=./usecase/lte_a/mu0_20mhz/ant_3.bin #rachCfgIdx=14 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index prachConfigIndex=189 -srsEanble=0 # Enable (1)| disable (0) SRS +srsEnable=0 # Enable (1)| disable (0) SRS srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) ########################################################### ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - +extType=1 nPrbElemDl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemDl0=0,50,0,14,1,1,1,9,1 PrbElemDl1=50,50,0,14,2,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=2,25,0,0,9,1,1 +ExtBfwDl1=2,25,0,0,9,1,1 nPrbElemUl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemUl0=0,50,0,14,1,1,1,9,1 PrbElemUl1=50,50,0,14,2,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=2,25,0,0,9,1,1 +ExtBfwUl1=2,25,0,0,9,1,1 ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/lte_b/mu0_20mhz/usecase_du.cfg b/fhi_lib/app/usecase/lte_b/mu0_20mhz/usecase_du.cfg index 5c067f4..54b412b 100644 --- a/fhi_lib/app/usecase/lte_b/mu0_20mhz/usecase_du.cfg +++ b/fhi_lib/app/usecase/lte_b/mu0_20mhz/usecase_du.cfg @@ -19,7 +19,8 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id -ioWorker=0x2000000 # mask [0- no workers] +ioWorker=0x3000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/lte_b/mu0_5mhz/1/config_file_o_du.dat b/fhi_lib/app/usecase/lte_b/mu0_5mhz/1/config_file_o_du.dat index 7805084..7cb7eb6 100644 --- a/fhi_lib/app/usecase/lte_b/mu0_5mhz/1/config_file_o_du.dat +++ b/fhi_lib/app/usecase/lte_b/mu0_5mhz/1/config_file_o_du.dat @@ -131,28 +131,36 @@ UlBfwUe15=./usecase/lte_b/mu0_10mhz/ul_bfw_ue_7.bin #UE7 weights for TRX anten ## RACH TODO: update for PRACH -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration #rachOffset=43 # RB offset for prach detection (see RIU spec) #rachCfgIdx=14 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index prachConfigIndex=189 -srsEanble=0 # Enable (1)| disable (0) SRS +srsEnable=0 # Enable (1)| disable (0) SRS srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) ########################################################### ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - +extType=1 nPrbElemDl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemDl0=0,15,0,14,1,1,1,9,1 PrbElemDl1=15,10,0,14,2,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=1,15,0,0,9,1,1 +ExtBfwDl1=1,10,0,0,9,1,1 nPrbElemUl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemUl0=0,15,0,14,1,1,1,9,1 PrbElemUl1=15,10,0,14,2,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=1,15,0,0,9,1,1 +ExtBfwUl1=1,10,0,0,9,1,1 ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/lte_b/mu0_5mhz/1/config_file_o_ru.dat b/fhi_lib/app/usecase/lte_b/mu0_5mhz/1/config_file_o_ru.dat index 06d1473..c31be8c 100644 --- a/fhi_lib/app/usecase/lte_b/mu0_5mhz/1/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/lte_b/mu0_5mhz/1/config_file_o_ru.dat @@ -96,7 +96,7 @@ antC14=./usecase/lte_b/mu0_10mhz/ant_14.bin #CC3 antC15=./usecase/lte_b/mu0_10mhz/ant_15.bin #CC3 ## RACH TODO: update for PRACH -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration antPrachC0=./usecase/lte_a/mu0_10mhz/ant_0.bin antPrachC1=./usecase/lte_a/mu0_10mhz/ant_1.bin @@ -105,23 +105,31 @@ antPrachC3=./usecase/lte_a/mu0_10mhz/ant_3.bin #rachCfgIdx=14 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index prachConfigIndex=189 -srsEanble=0 # Enable (1)| disable (0) SRS +srsEnable=0 # Enable (1)| disable (0) SRS srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) ########################################################### ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - +extType=1 nPrbElemDl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemDl0=0,15,0,14,1,1,1,9,1 PrbElemDl1=15,10,0,14,2,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=1,15,0,0,9,1,1 +ExtBfwDl1=1,10,0,0,9,1,1 nPrbElemUl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemUl0=0,15,0,14,1,1,1,9,1 PrbElemUl1=15,10,0,14,2,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=1,15,0,0,9,1,1 +ExtBfwUl1=1,10,0,0,9,1,1 ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/lte_b/mu0_5mhz/1/usecase_du.cfg b/fhi_lib/app/usecase/lte_b/mu0_5mhz/1/usecase_du.cfg index 5c067f4..12d06c3 100644 --- a/fhi_lib/app/usecase/lte_b/mu0_5mhz/1/usecase_du.cfg +++ b/fhi_lib/app/usecase/lte_b/mu0_5mhz/1/usecase_du.cfg @@ -20,6 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=../bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/app/usecase/lte_b/mu0_5mhz/bbu_pool_cfg_o_du.xml b/fhi_lib/app/usecase/lte_b/mu0_5mhz/bbu_pool_cfg_o_du.xml new file mode 100644 index 0000000..ea87359 --- /dev/null +++ b/fhi_lib/app/usecase/lte_b/mu0_5mhz/bbu_pool_cfg_o_du.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 0,0,0,0 + + 1000, 1000, 1000, 1000 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/lte_b/mu0_5mhz/bbu_pool_cfg_o_ru.xml b/fhi_lib/app/usecase/lte_b/mu0_5mhz/bbu_pool_cfg_o_ru.xml new file mode 100644 index 0000000..8068127 --- /dev/null +++ b/fhi_lib/app/usecase/lte_b/mu0_5mhz/bbu_pool_cfg_o_ru.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + 21.03 + + + + 0 + + 1 + + + + + 1024 + + 4 + + 1 + + + + + 1 + + 1 + + 6 + + 4 + + 16,48,17,49,18,50,19,51,20,52,4,44,5,45,22,23,24,25,6,26,7,27,8,28,9,29,10,30,11,31,12,32,13,33,13,34,15,35,16,36,17,37,18,38,19,39 + + 1 + + 1,1,1,1 + + 500, 500, 500, 500 + + 50, 50, 50, 50 + + + + + 1 + + + + diff --git a/fhi_lib/app/usecase/lte_b/mu0_5mhz/config_file_o_du.dat b/fhi_lib/app/usecase/lte_b/mu0_5mhz/config_file_o_du.dat index d6439f9..3829947 100644 --- a/fhi_lib/app/usecase/lte_b/mu0_5mhz/config_file_o_du.dat +++ b/fhi_lib/app/usecase/lte_b/mu0_5mhz/config_file_o_du.dat @@ -131,28 +131,36 @@ UlBfwUe15=./usecase/lte_b/mu0_10mhz/ul_bfw_ue_7.bin #UE7 weights for TRX anten ## RACH TODO: update for PRACH -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration #rachOffset=43 # RB offset for prach detection (see RIU spec) #rachCfgIdx=14 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index prachConfigIndex=189 -srsEanble=0 # Enable (1)| disable (0) SRS +srsEnable=0 # Enable (1)| disable (0) SRS srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) ########################################################### ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - +extType=1 nPrbElemDl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemDl0=0,15,0,14,1,1,1,9,1 PrbElemDl1=15,10,0,14,2,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=1,15,0,0,9,1,1 +ExtBfwDl1=1,10,0,0,9,1,1 nPrbElemUl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemUl0=0,15,0,14,1,1,1,9,1 PrbElemUl1=15,10,0,14,2,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=1,15,0,0,9,1,1 +ExtBfwUl1=1,10,0,0,9,1,1 ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/lte_b/mu0_5mhz/config_file_o_ru.dat b/fhi_lib/app/usecase/lte_b/mu0_5mhz/config_file_o_ru.dat index 4b628c0..f7b2385 100644 --- a/fhi_lib/app/usecase/lte_b/mu0_5mhz/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/lte_b/mu0_5mhz/config_file_o_ru.dat @@ -96,7 +96,7 @@ antC14=./usecase/lte_b/mu0_10mhz/ant_14.bin #CC3 antC15=./usecase/lte_b/mu0_10mhz/ant_15.bin #CC3 ## RACH TODO: update for PRACH -rachEanble=0 # Enable (1)| disable (0) PRACH configuration +rachEnable=0 # Enable (1)| disable (0) PRACH configuration antPrachC0=./usecase/lte_a/mu0_10mhz/ant_0.bin antPrachC1=./usecase/lte_a/mu0_10mhz/ant_1.bin @@ -105,23 +105,31 @@ antPrachC3=./usecase/lte_a/mu0_10mhz/ant_3.bin #rachCfgIdx=14 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index prachConfigIndex=189 -srsEanble=0 # Enable (1)| disable (0) SRS +srsEnable=0 # Enable (1)| disable (0) SRS srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13) ########################################################### ##Section Settings DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used - +extType=1 nPrbElemDl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemDl0=0,15,0,14,1,1,1,9,1 PrbElemDl1=15,10,0,14,2,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwDl0=1,15,0,0,9,1,1 +ExtBfwDl1=1,10,0,0,9,1,1 nPrbElemUl=2 #nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType # weight base beams PrbElemUl0=0,15,0,14,1,1,1,9,1 PrbElemUl1=15,10,0,14,2,1,1,9,1 +# Extension Parameters for Beamforming weights +# numBundPrb, numSetBFW, RAD, disableBFW, bfwIqWidth, bfwCompMeth, extType +ExtBfwUl0=1,15,0,0,9,1,1 +ExtBfwUl1=1,10,0,0,9,1,1 ########################################################### ## control of IQ byte order diff --git a/fhi_lib/app/usecase/lte_b/mu0_5mhz/usecase_du.cfg b/fhi_lib/app/usecase/lte_b/mu0_5mhz/usecase_du.cfg index 5c067f4..84a7872 100644 --- a/fhi_lib/app/usecase/lte_b/mu0_5mhz/usecase_du.cfg +++ b/fhi_lib/app/usecase/lte_b/mu0_5mhz/usecase_du.cfg @@ -20,6 +20,7 @@ appMode=0 # All O-DU(0) | O-RU(1) instanceId=0 # 0,1,2,... in case more than 1 application started on the same system ioCore=5 # core id ioWorker=0x2000000 # mask [0- no workers] +oXuBbuCfgFile=./bbu_pool_cfg_o_du.xml oXuNum=1 # numbers of O-RU connected to O-DU diff --git a/fhi_lib/build.sh b/fhi_lib/build.sh old mode 100755 new mode 100644 index 22859b5..c977b61 --- a/fhi_lib/build.sh +++ b/fhi_lib/build.sh @@ -27,6 +27,7 @@ XRAN_FH_TEST_DIR=$XRAN_DIR/test/test_xran LIBXRANSO=0 MLOG=0 COMMAND_LINE= +SAMPLEAPP=0 echo Number of commandline arguments: $# while [[ $# -ne 0 ]] @@ -41,6 +42,12 @@ case $key in MLOG) MLOG=1 ;; + FWK) + FWK=1 + ;; + SAMPLEAPP) + SAMPLEAPP=1 + ;; xclean) COMMAND_LINE+=$key COMMAND_LINE+=" " @@ -65,16 +72,52 @@ else MLOG=1 fi -echo 'Building xRAN Library' +if [ -z "$DIR_WIRELESS_FW" ] +then + echo 'DIR_WIRELESS_FW folder is not set. Disable FWK (DIR_WIRELESS_FW='$DIR_WIRELESS_FW')' + FWK=0 +else + echo 'DIR_WIRELESS_FW folder is set. Enable FWK (DIR_WIRELESS_FW='$DIR_WIRELESS_FW')' + FWK=1 +fi + +ORU=1 +echo 'Building xRAN Library for O-RU' +echo "LIBXRANSO = ${LIBXRANSO}" +echo "MLOG = ${MLOG}" +echo "FWK = ${FWK}" +echo "ORU = ${ORU}" + +cd $XRAN_FH_LIB_DIR +make $COMMAND_LINE MLOG=${MLOG} LIBXRANSO=${LIBXRANSO} ORU=${ORU} + +if [ "$SAMPLEAPP" -eq "1" ] +then + echo 'Building xRAN O-RU Test Application' + cd $XRAN_FH_APP_DIR + make $COMMAND_LINE MLOG=${MLOG} FWK=${FWK} ORU=${ORU} +else + echo 'Not building xRAN Test Application...' +fi + +ORU=0 +echo 'Building xRAN Library for O-DU' echo "LIBXRANSO = ${LIBXRANSO}" echo "MLOG = ${MLOG}" +echo "FWK = ${FWK}" +echo "ORU = ${ORU}" cd $XRAN_FH_LIB_DIR -make $COMMAND_LINE MLOG=${MLOG} LIBXRANSO=${LIBXRANSO} #DEBUG=1 VERBOSE=1 +make $COMMAND_LINE MLOG=${MLOG} LIBXRANSO=${LIBXRANSO} ORU=${ORU} -echo 'Building xRAN Test Application' +if [ "$SAMPLEAPP" -eq "1" ] +then + echo 'Building xRAN O-DU Test Application' cd $XRAN_FH_APP_DIR -make $COMMAND_LINE MLOG=${MLOG} #DEBUG=1 VERBOSE=1 + make $COMMAND_LINE MLOG=${MLOG} FWK=${FWK} ORU=${ORU} +else + echo 'Not building xRAN Test Application...' +fi if [ -z ${GTEST_ROOT+x} ]; then diff --git a/fhi_lib/lib/Makefile b/fhi_lib/lib/Makefile index de141bf..eccc4ae 100644 --- a/fhi_lib/lib/Makefile +++ b/fhi_lib/lib/Makefile @@ -23,11 +23,22 @@ MYCUSTOMSPACE1='------------------------------------------------------------' ############################################################## # Tools configuration ############################################################## +ifeq ($(WIRELESS_SDK_TOOLCHAIN),icc) CC := icc CPP := icpc AS := as AR := ar LD := icc +else ifeq ($(WIRELESS_SDK_TOOLCHAIN),icx) + CC := icx + CPP := icpx + AS := as + AR := llvm-ar + LD := icx +else + $(error "Please define WIRELESS_SDK_TOOLCHAIN environment variable") +endif + OBJDUMP := objdump ifeq ($(SHELL),cmd.exe) @@ -40,10 +51,15 @@ CP := cp -f RM := rm -rf endif +ifeq ($(ORU),1) + PROJECT_NAME := libxran-oru + BUILDDIR := build-oru +else PROJECT_NAME := libxran + BUILDDIR := build +endif PROJECT_TYPE := lib PROJECT_DIR := $(XRAN_DIR)/lib -BUILDDIR := ./build ifeq ($(XRAN_LIB_SO),) PROJECT_BINARY := $(BUILDDIR)/$(PROJECT_NAME).a @@ -56,8 +72,8 @@ ifeq ($(RTE_SDK),) endif RTE_TARGET ?= x86_64-native-linux-icc - RTE_INC := $(shell PKG_CONFIG_PATH=/usr/lib64/pkgconfig:$(RTE_SDK)/build/meson-uninstalled pkgconf --cflags-only-I libdpdk) + API_DIR := $(PROJECT_DIR)/api SRC_DIR := $(PROJECT_DIR)/src ETH_DIR := $(PROJECT_DIR)/ethernet @@ -78,7 +94,6 @@ CC_SRC = $(ETH_DIR)/ethdi.c \ $(SRC_DIR)/xran_common.c \ $(SRC_DIR)/xran_ul_tables.c \ $(SRC_DIR)/xran_frame_struct.c \ - $(SRC_DIR)/xran_app_frag.c \ $(SRC_DIR)/xran_dev.c \ $(SRC_DIR)/xran_rx_proc.c \ $(SRC_DIR)/xran_tx_proc.c \ @@ -112,12 +127,28 @@ CC_FLAGS += -std=gnu11 -Wall -Wno-deprecated-declarations \ -fPIC \ -Wall \ -Wimplicit-function-declaration \ - -g -O3 -wd1786 -mcmodel=large + -g -O3 -mcmodel=large + +ifeq ($(WIRELESS_SDK_TOOLCHAIN),icc) +CC_FLAGS += -wd1786 -restrict +endif + +ifeq ($(WIRELESS_SDK_TOOLCHAIN),icx) +CC_FLAGS += -march=icelake-server -mintrinsic-promote -Wno-unused-function -Wno-intrinsic-promote -Wno-error +endif + +CPP_FLAGS := -D__STDC_LIMIT_MACROS -D__STDC_CONSTANT_MACROS -D_GNU_SOURCE -D_REENTRANT -pipe \ + -falign-functions=16 \ + -Werror -Wno-unused-variable -std=c++14 -mcmodel=large -fPIC + +ifeq ($(WIRELESS_SDK_TOOLCHAIN),icc) +CPP_FLAGS += -fp-model fast=2 -no-prec-div -no-prec-sqrt -fast-transcendentals -restrict +endif + +ifeq ($(WIRELESS_SDK_TOOLCHAIN),icx) +CPP_FLAGS += -fp-model fast -march=icelake-server -mintrinsic-promote -Wno-unused-function -Wno-intrinsic-promote -Wno-error +endif -CPP_FLAGS := -D__STDC_LIMIT_MACROS -D__STDC_CONSTANT_MACROS -D_GNU_SOURCE -D_REENTRANT -pipe -no-prec-div \ - -no-prec-div -fp-model fast=2 -fPIC \ - -no-prec-sqrt -falign-functions=16 -fast-transcendentals \ - -Werror -Wno-unused-variable -std=c++14 -mcmodel=large INC := -I$(API_DIR) -I$(ETH_DIR) -I$(SRC_DIR) -I$(RTE_INC) DEF := @@ -128,6 +159,11 @@ else DEF += -UMLOG_ENABLED endif +ifeq ($(ORU),1) + DEF += -DXRAN_O_RU_BUILD +else + DEF += -UXRAN_O_RU_BUILD +endif #DEF += -DFCN_ADAPT #DEF += -DFCN_1_2_6_EARLIER @@ -135,7 +171,7 @@ endif AS_FLAGS := AR_FLAGS := rc -PROJECT_OBJ_DIR := build/obj +PROJECT_OBJ_DIR := $(BUILDDIR)/obj CC_OBJS := $(patsubst %.c,%.o,$(CC_SRC)) CPP_OBJS := $(patsubst %.cpp,%.o,$(CPP_SRC)) @@ -150,8 +186,8 @@ CPP_SNC_OBJTARGETS := $(addprefix $(PROJECT_OBJ_DIR)/,$(CPP_OBJS_SNC)) AS_OBJTARGETS := $(addprefix $(PROJECT_OBJ_DIR)/,$(AS_OBJS)) #-qopt-report=5 -qopt-matmul -qopt-report-phase=all -CPP_COMP := -O3 -DNDEBUG -xcore-avx512 -fPIE -restrict -fasm-blocks -CPP_COMP_SNC := -O3 -DNDEBUG -march=icelake-server -fPIE -restrict -fasm-blocks +CPP_COMP := -O3 -DNDEBUG -xcore-avx512 -fPIE -fasm-blocks +CPP_COMP_SNC := -O3 -DNDEBUG -march=icelake-server -fPIE -fasm-blocks CC_FLAGS_FULL := $(CC_FLAGS) $(INC) $(DEF) CPP_FLAGS_FULL := $(CPP_FLAGS) $(CPP_COMP) $(INC) $(DEF) CPP_FLAGS_FULL_SNC := $(CPP_FLAGS) $(CPP_COMP_SNC) $(INC) $(DEF) diff --git a/fhi_lib/lib/api/xran_cp_api.h b/fhi_lib/lib/api/xran_cp_api.h index c45b5b6..6a461f3 100644 --- a/fhi_lib/lib/api/xran_cp_api.h +++ b/fhi_lib/lib/api/xran_cp_api.h @@ -36,9 +36,9 @@ extern "C" { #include "xran_pkt_cp.h" #include "xran_transport.h" -#define XRAN_MAX_SECTIONDB_CTX 2 +#define XRAN_MAX_SECTIONDB_CTX 4 -#define XRAN_MAX_NUM_EXTENSIONS XRAN_MAX_PRBS /* Maximum number of extensions in a section [up to 1 ext section per RB]*/ +#define XRAN_MAX_NUM_EXTENSIONS 10//XRAN_MAX_PRBS /* Maximum number of extensions in a section [up to 1 ext section per RB]*/ #define XRAN_MAX_NUM_UE 16 /* Maximum number of UEs/Lyaers */ #define XRAN_MAX_NUM_ANT_BF 64 /* Maximum number of beamforming antenna, * could be defined as XRAN_MAX_ANTENNA_NR */ @@ -221,27 +221,31 @@ enum xran_cp_rbgsize { /** * This structure contains the information to generate the section body of C-Plane message */ struct xran_section_info { - uint8_t type; /* type of this section */ + /** for U-plane */ + struct xran_section_desc sec_desc[XRAN_NUM_OF_SYMBOL_PER_SLOT]; + int32_t freqOffset; /* X 24bits */ + uint32_t startPrbc:9; /* X X X X X 9bits */ + uint32_t numPrbc:9; /* X X X X X 8bits */ /* will be converted to zero if >255 */ + uint32_t type:4; /* type of this section */ /* section type bit- */ /* 0 1 3 5 6 7 length */ - uint8_t startSymId; /* X X X X X X 4bits */ - uint8_t numSymbol; /* X X X X 4bits */ - uint8_t symInc; /* X X X X X 1bit */ - uint16_t id; /* X X X X X 12bits */ - uint16_t reMask; /* X X X X 12bits */ - uint16_t startPrbc; /* X X X X X 10bits */ - uint16_t numPrbc; /* X X X X X 8bits */ /* will be converted to zero if >255 */ - uint8_t rb; /* X X X X X 1bit */ - uint8_t compMeth; /* X X X 4bits */ - uint8_t iqWidth; /* X X X 4bits */ - uint8_t ef; /* X X X X 1bit */ - int32_t freqOffset; /* X 24bits */ + uint32_t startSymId:4; /* X X X X X X 4bits */ + uint32_t numSymbol:4; /* X X X X 4bits */ + uint32_t res:2; uint16_t beamId; /* X X 15bits */ uint16_t ueId; /* X X 15bits */ uint16_t regFactor; /* X 16bits */ - uint16_t pad0; - /** for U-plane */ - struct xran_section_desc sec_desc[XRAN_NUM_OF_SYMBOL_PER_SLOT]; + uint16_t id; /* X X X X X 12bits */ + uint16_t reMask; /* X X X X 12bits */ + + uint8_t symInc:1; /* X X X X X 1bit */ + uint8_t rb:1; /* X X X X X 1bit */ + uint8_t ef:1; /* X X X X 1bit */ + uint8_t prbElemBegin:1; /* Flag to indicate beginning of a PRB element */ + uint8_t prbElemEnd:1; /* Flag to indicate end of a PRB element */ + uint8_t reserved:3; + uint8_t compMeth:4; /* X X X 4bits */ + uint8_t iqWidth:4; /* X X X 4bits */ }; @@ -250,7 +254,7 @@ struct xran_sectionext1_info { uint16_t bfwNumber; /**< number of bf weights in this section */ uint8_t bfwIqWidth; uint8_t bfwCompMeth; - int16_t *p_bfwIQ; /**< pointer to formed section extention */ + int8_t *p_bfwIQ; /**< pointer to formed section extention */ int16_t bfwIQ_sz; /**< size of buffer with section extention information */ union { uint8_t exponent; @@ -320,6 +324,7 @@ struct xran_sectionext8_info { struct xran_sectionext9_info { uint8_t technology; + uint8_t reserved; }; struct xran_sectionext10_info { @@ -411,13 +416,14 @@ struct xran_section_ext_gen_info { /** * This structure to hold the information to generate the sections of C-Plane message */ struct xran_section_gen_info { - struct xran_section_info info; /**< The information for section */ + struct xran_section_info *info; /**< The information for section */ - uint32_t exDataSize; /**< The number of Extensions or type 6/7 data */ /** the array to store section extension */ struct xran_section_ext_gen_info exData[XRAN_MAX_NUM_EXTENSIONS]; + uint32_t exDataSize; /**< The number of Extensions or type 6/7 data */ }; + /** * This structure to hold the information to generate a C-Plane message */ struct xran_cp_gen_params { @@ -442,6 +448,7 @@ struct xran_section_ext_recv_info { struct xran_sectionext4_info ext4; struct xran_sectionext5_info ext5; struct xran_sectionext6_info ext6; + struct xran_sectionext9_info ext9; struct xran_sectionext10_info ext10; struct xran_sectionext11_recv_info ext11; } u; @@ -452,7 +459,7 @@ struct xran_section_ext_recv_info { struct xran_section_recv_info { struct xran_section_info info; /**< The information for received section */ - int32_t numExts; + uint32_t numExts; /** the array to store section extension */ struct xran_section_ext_recv_info exts[XRAN_MAX_NUM_EXTENSIONS]; }; @@ -463,6 +470,12 @@ struct xran_cp_recv_params { uint8_t dir; /**< UL or DL */ uint8_t sectionType; /**< each section must have same type with this */ uint16_t numSections; /**< the number of sections received */ + uint8_t numSetBFW; /** */ uint8_t puschMaskSlot; /**< specific which slot pusch channel masked> */ uint8_t cp_vlan_tag; /**< C-plane vlan tag */ @@ -681,6 +712,11 @@ struct xran_fh_config { uint16_t max_sections_per_slot; /**< M-Plane settings for section */ uint16_t max_sections_per_symbol; /**< M-Plane settings for section */ + int32_t RunSlotPrbMapBySymbolEnable; /**< enable prb mapping by symbol with multisection*/ + + uint8_t dssEnable; /**< enable DSS (extension-9) */ + uint8_t dssPeriod; /**< DSS pattern period for LTE/NR */ + uint8_t technology[XRAN_MAX_DSS_PERIODICITY]; /**< technology array represents slot is LTE(0)/NR(1) */ }; /** @@ -705,7 +741,10 @@ struct xran_common_counters{ uint64_t rx_pusch_packets[XRAN_MAX_ANTENNA_NR]; uint64_t rx_prach_packets[XRAN_MAX_ANTENNA_NR]; uint64_t rx_srs_packets; + uint64_t rx_invalid_ext1_packets; /**< Counts the invalid extType-1 packets - valid for packets received from O-DU*/ + uint64_t timer_missed_sym; + uint64_t timer_missed_slot; }; /** @@ -732,9 +771,9 @@ struct xran_flat_buffer uint32_t nNumberOfElements; /**< The number of elements in the physical contiguous memory segment */ uint32_t nOffsetInBytes; /**< Offset in bytes to the start of the data in the physical contiguous * memory segment */ - uint32_t nIsPhyAddr; uint8_t *pData; /**< The data pointer is a virtual address */ void *pCtrl; /**< pointer to control section coresponding to data buffer */ + void *pRing; /**< pointer to ring with prepared mbufs */ }; /** @@ -851,6 +890,31 @@ int32_t xran_bm_init (void * pHandle, uint32_t * pPoolIndex, uint32_t nNumberOfB */ int32_t xran_bm_allocate_buffer(void * pHandle, uint32_t nPoolIndex, void **ppData, void **ppCtrl); +/** + * @ingroup xran + * + * Function allocates buffer used between XRAN layer and PHY. In general case it's DPDK mbuf. + * + * @param pHandle + * Pointer to XRAN layer handle for given CC + * @param rng_name_prefix + * prefix of ring name + * @param cc_id + * Component Carrier ID + * @param buff_id + * Buffer id for given ring + * @param ant_id + * Antenna id for given ring + * @param symb_id + * Symbol id for given ring + * @param ppRing + * Pointer to pointer where to store address of internal DDPD ring + * + * @return + * 0 - on success + */ +int32_t xran_bm_allocate_ring(void * pHandle, const char *rng_name_prefix, uint16_t cc_id, uint16_t buff_id, uint16_t ant_id, uint16_t symb_id, void **ppRing); + /** * @ingroup xran * @@ -1082,6 +1146,31 @@ int32_t xran_reg_sym_cb(void *pHandle, xran_callback_sym_fn symCb, void * symCbP */ int32_t xran_reg_physide_cb(void *pHandle, xran_fh_tti_callback_fn Cb, void *cbParam, int skipTtiNum, enum callback_to_phy_id); +/** + * @ingroup xran + * + * Function registers callback to XRAN layer. Function support callbacks align to OTA time. TTI even, half of slot, + * full slot with respect to PTP time. + * + * @param pHandle + * Pointer to XRAN layer handle for given CC + * @param Cb + * pointer to callback function + * @param cbParam + * pointer to Callback Function parameters + * @param skipTtiNum + * number of calls to be skipped before first call + * @param callback_to_phy_id + * call back time identification (see enum callback_to_phy_id) + * @param xran_port_id + * XRAN device ID + * + * @return + * 0 - in case of success + * -1 - in case of failure + */ +int32_t xran_reg_physide_cb_by_dev_id(void *pHandle, xran_fh_tti_callback_fn Cb, void *cbParam, int skipTtiNum, enum callback_to_phy_id, uint8_t xran_port_id); + /** * @ingroup xran * @@ -1221,6 +1310,90 @@ uint8_t *xran_add_cp_hdr_offset(uint8_t *dst); * 0 - on success */ int32_t xran_set_debug_stop(int32_t value, int32_t count); + +/** + * @ingroup xran + * + * function initialize PRB map from config input + * + * @param p_PrbMapIn + * Input PRBmap from config + * @param p_PrbMapOut + * Output PRBmap + * @return + * 0 - on success + */ +int32_t xran_init_PrbMap_from_cfg(struct xran_prb_map* p_PrbMapIn, struct xran_prb_map* p_PrbMapOut, uint32_t mtu); + +/** + * @ingroup xran + * + * function initialize PRB map from config input + * + * @param p_PrbMapIn + * Input PRBmap from config for Rx + * @param p_PrbMapOut + * Output PRBmap + * @return + * 0 - on success + */ + +int32_t xran_init_PrbMap_from_cfg_for_rx(struct xran_prb_map* p_PrbMapIn, struct xran_prb_map* p_PrbMapOut, uint32_t mtu); + +int32_t xran_get_num_prb_elm(struct xran_prb_map* p_PrbMapIn, uint32_t mtu); + +/** + * @ingroup xran + * + * function initialize PRB map from config input by symbol + * + * @param p_PrbMapIn + * Input PRBmap from config + * @param p_PrbMapOut + * Output PRBmap + * @return + * 0 - on success + */ +int32_t xran_init_PrbMap_by_symbol_from_cfg(struct xran_prb_map* p_PrbMapIn, struct xran_prb_map* p_PrbMapOut, uint32_t mtu, uint32_t xran_max_prb); + +/** + * @ingroup xran + * + * Function prepares DL U-plane packets for symbol for O-RAN FH. Enques resulting packet to ring for TX at appropriate time + * + * @param pHandle + * pointer to O-RU port structure + * @return + * 0 - on success + */ +int32_t xran_prepare_up_dl_sym(uint16_t xran_port_id, uint32_t nSlotIdx, uint32_t nCcStart, uint32_t nCcNum, uint32_t nSymMask, uint32_t nAntStart, + uint32_t nAntNum, uint32_t nSymStart, uint32_t nSymNum); +/** + * @ingroup xran + * + * Function prepares DL C-plane packets for slot for O-RAN FH. Enques resulting packet to ring for TX at appropriate time + * + * @param pHandle + * pointer to O-RU port structure + * @return + * 0 - on success + */ +int32_t xran_prepare_cp_dl_slot(uint16_t xran_port_id, uint32_t nSlotIdx, uint32_t nCcStart, uint32_t nCcNum, uint32_t nSymMask, uint32_t nAntStart, + uint32_t nAntNum, uint32_t nSymStart, uint32_t nSymNum); + +/** + * @ingroup xran + * + * Function prepares UL C-plane packets for slot for O-RAN FH. Enques resulting packet to ring for TX at appropriate time + * + * @param pHandle + * pointer to O-RU port structure + * @return + * 0 - on success + */ +int32_t xran_prepare_cp_ul_slot(uint16_t xran_port_id, uint32_t nSlotIdx, uint32_t nCcStart, uint32_t nCcNum, uint32_t nSymMask, uint32_t nAntStart, + uint32_t nAntNum, uint32_t nSymStart, uint32_t nSymNum); + #ifdef __cplusplus } #endif diff --git a/fhi_lib/lib/api/xran_fh_o_ru.h b/fhi_lib/lib/api/xran_fh_o_ru.h new file mode 100644 index 0000000..7812399 --- /dev/null +++ b/fhi_lib/lib/api/xran_fh_o_ru.h @@ -0,0 +1,81 @@ +/****************************************************************************** +* +* Copyright (c) 2020 Intel. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +* +*******************************************************************************/ + +/** + * @brief This file provides public interface to xRAN Front Haul layer implementation as defined in the + * ORAN-WG4.CUS.0-v01.00 spec. Implementation specific to + * (O-DU): a logical node that includes the eNB/gNB functions as + * listed in section 2.1 split option 7-2x. + * + * + * @file xran_fh_o_ru.h + * @ingroup group_lte_source_xran + * @author Intel Corporation + * + **/ + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "xran_fh_o_du.h" + +/** + * @ingroup + * + * Function configures TX and RX output buffers + * + * @param pHandle + * Pointer to XRAN layer handle for given CC + * @param pSrcRxCpBuffer + * list of memory buffers to use to deliver BFWs from XRAN layer to the application for Validation + * @param pSrcTxCpBuffer + * list of memory buffers to use to deliver BFWs from XRAN layer to the application for Validation + * @param xran_transport_callback_fn pCallback + * Callback function to call with arrival of C-Plane packets for given CC + * @param pCallbackTag + * Parameters of Callback function + * + * @return + * 0 - on success + * -1 - on error + */ + +int32_t xran_5g_bfw_config(void * pHandle, struct xran_buffer_list *pSrcRxCpBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN], + struct xran_buffer_list *pSrcTxCpBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN], + xran_transport_callback_fn pCallback, + void *pCallbackTag); + + +#ifdef __cplusplus +} +#endif \ No newline at end of file diff --git a/fhi_lib/lib/api/xran_lib_mlog_tasks_id.h b/fhi_lib/lib/api/xran_lib_mlog_tasks_id.h index d0b63ac..c013e02 100644 --- a/fhi_lib/lib/api/xran_lib_mlog_tasks_id.h +++ b/fhi_lib/lib/api/xran_lib_mlog_tasks_id.h @@ -64,62 +64,61 @@ extern "C" { #define PID_XRAN_BBDEV_UL_POLL 53 #define PID_XRAN_BBDEV_UL_POLL_DISPATCH 54 -#define PID_TTI_TIMER 2100 -#define PID_TTI_CB 2101 - -#define PID_SYM_TIMER 2102 -//#define PID_GNB_PROC_TIMING_TIMEOUT 2103 - -#define PID_TIME_SYSTIME_POLL 2104 -#define PID_TIME_SYSTIME_STOP 2105 -#define PID_TIME_ARM_TIMER 2106 -#define PID_TIME_ARM_TIMER_DEADLINE 2107 -#define PID_TIME_ARM_USER_TIMER_DEADLINE 2108 - - -#define PID_RADIO_FREQ_RX_PKT 2400 -#define PID_RADIO_RX_STOP 2401 -#define PID_RADIO_RX_UL_IQ 2402 -#define PID_RADIO_PRACH_PKT 2403 -#define PID_RADIO_FE_COMPRESS 2404 -#define PID_RADIO_FE_DECOMPRESS 2405 -#define PID_RADIO_TX_BYPASS_PROC 2406 -#define PID_RADIO_ETH_TX_BURST 2407 -#define PID_RADIO_TX_DL_IQ 2408 -#define PID_RADIO_RX_VALIDATE 2409 - -#define PID_RADIO_RX_IRQ_ON 2410 -#define PID_RADIO_RX_IRQ_OFF 2411 -#define PID_RADIO_RX_EPOLL_WAIT 2412 - -#define PID_RADIO_TX_LTEMODE_PROC 2413 -#define PID_RADIO_RX_LTEMODE_PROC 2414 - -#define PID_RADIO_TX_PLAY_BACK_IQ 2415 - -#define PID_PROCESS_TX_SYM 2416 -#define PID_DISPATCH_TX_SYM 2417 -#define PID_PREPARE_TX_PKT 2418 -#define PID_ATTACH_EXT_BUF 2419 -#define PID_ETH_ENQUEUE_BURST 2420 - -#define PID_CP_DL_CB 2500 -#define PID_CP_UL_CB 2501 -#define PID_UP_DL_CB 2502 -#define PID_SYM_OTA_CB 2503 -#define PID_TTI_CB_TO_PHY 2504 -#define PID_HALF_SLOT_CB_TO_PHY 2505 -#define PID_FULL_SLOT_CB_TO_PHY 2506 -#define PID_UP_UL_HALF_DEAD_LINE_CB 2507 -#define PID_UP_UL_FULL_DEAD_LINE_CB 2508 -#define PID_UP_UL_USER_DEAD_LINE_CB 2509 - -#define PID_PROCESS_UP_PKT 2600 -#define PID_PROCESS_UP_PKT_SRS 2601 -#define PID_PROCESS_UP_PKT_PARSE 2602 -#define PID_PROCESS_CP_PKT 2700 -#define PID_PROCESS_DELAY_MEAS_PKT 2800 - +#define PID_TTI_TIMER 3100 +#define PID_TTI_CB 3101 + +#define PID_SYM_TIMER 3102 +//#define PID_GNB_PROC_TIMING_TIMEOUT 3103 + +#define PID_TIME_SYSTIME_POLL 3104 +#define PID_TIME_SYSTIME_STOP 3105 +#define PID_TIME_ARM_TIMER 3106 + +#define PID_RADIO_FREQ_RX_PKT 3107 +#define PID_RADIO_RX_STOP 3108 +#define PID_RADIO_RX_UL_IQ 3109 +#define PID_RADIO_PRACH_PKT 3110 +#define PID_RADIO_FE_COMPRESS 3111 +#define PID_RADIO_FE_DECOMPRESS 3112 +#define PID_RADIO_TX_BYPASS_PROC 3113 +#define PID_RADIO_ETH_TX_BURST 3114 +#define PID_RADIO_TX_DL_IQ 3115 +#define PID_RADIO_RX_VALIDATE 3116 +#define PID_RADIO_RX_IRQ_ON 3117 +#define PID_RADIO_RX_IRQ_OFF 3118 +#define PID_RADIO_RX_EPOLL_WAIT 3119 +#define PID_RADIO_TX_LTEMODE_PROC 3120 +#define PID_RADIO_RX_LTEMODE_PROC 3121 +#define PID_RADIO_TX_PLAY_BACK_IQ 3122 +#define PID_PROCESS_TX_SYM 3123 +#define PID_DISPATCH_TX_SYM 3124 +#define PID_PREPARE_TX_PKT 3125 +#define PID_ATTACH_EXT_BUF 3126 +#define PID_ETH_ENQUEUE_BURST 3127 + +#define PID_CP_DL_CB 3128 +#define PID_CP_UL_CB 3129 +#define PID_UP_DL_CB 3130 +#define PID_SYM_OTA_CB 3131 +#define PID_TTI_CB_TO_PHY 3132 +#define PID_HALF_SLOT_CB_TO_PHY 3133 +#define PID_FULL_SLOT_CB_TO_PHY 3134 +#define PID_UP_UL_HALF_DEAD_LINE_CB 3135 +#define PID_UP_UL_FULL_DEAD_LINE_CB 3136 +#define PID_UP_UL_USER_DEAD_LINE_CB 3137 +#define PID_PROCESS_UP_PKT 3140 +#define PID_PROCESS_UP_PKT_SRS 3141 +#define PID_PROCESS_UP_PKT_PARSE 3142 +#define PID_PROCESS_CP_PKT 3143 +#define PID_PROCESS_DELAY_MEAS_PKT 3144 +#define PID_UP_UL_ONE_FOURTHS_DEAD_LINE_CB 3145 +#define PID_UP_UL_THREE_FOURTHS_DEAD_LINE_CB 3146 +#define PID_UP_STATIC_SRS_DEAD_LINE_CB 3147 + +#define PID_TIME_ARM_TIMER_DEADLINE 3150 +#define PID_TIME_ARM_USER_TIMER_DEADLINE 3151 + +#define PID_REQUEUE_TX_SYM 3160 #ifdef __cplusplus } diff --git a/fhi_lib/lib/api/xran_mlog_lnx.h b/fhi_lib/lib/api/xran_mlog_lnx.h index e0913c7..e42a8a6 100644 --- a/fhi_lib/lib/api/xran_mlog_lnx.h +++ b/fhi_lib/lib/api/xran_mlog_lnx.h @@ -32,6 +32,7 @@ extern "C" #define MLOG_FALSE ( 0 ) #define MLogOpen(a, b, c, d, e) MLOG_FALSE +#define MLogSetup(a, b, c, d) MLOG_FALSE #define MLogRestart(a) MLOG_FALSE #define MLogPrint(a) MLOG_FALSE #define MLogGetFileLocation() NULL @@ -55,6 +56,9 @@ extern "C" #endif /* MLOG_ENABLED */ +void MLogXRANTask(uint32_t taskid, uint64_t ticksstart, uint64_t ticksstop); +uint64_t MLogXRANTick(void); + #ifdef __cplusplus } #endif /* #ifdef __cplusplus */ diff --git a/fhi_lib/lib/api/xran_pkt.h b/fhi_lib/lib/api/xran_pkt.h index edf4352..314b8d6 100644 --- a/fhi_lib/lib/api/xran_pkt.h +++ b/fhi_lib/lib/api/xran_pkt.h @@ -67,7 +67,7 @@ extern "C" { #define XRAN_MTU_DEFAULT RTE_ETHER_MTU #define XRAN_APP_LAYER_MAX_SIZE_L2_DEFAUT (XRAN_MTU_DEFAULT - 8) /**< In case of L2 only solution, application layer maximum transmission unit size is standard IEEE 802.3 Ethernet frame payload - size (1500 bytes) – transport overhead (8 bytes) = 1492 bytes (or larger for Jumbo frames) */ + size (1500 bytes) ? transport overhead (8 bytes) = 1492 bytes (or larger for Jumbo frames) */ #ifndef OK #define OK 0 /* Function executed correctly */ @@ -201,7 +201,7 @@ struct xran_ecpri_delay_meas_pl TimeStamp ts; /**< Table 2-17 Octet 7-16 */ int64_t CompensationValue; /**< Table 2-17 Octet 17 */ uint8_t DummyBytes[1400]; /**< Table 2-17 Octet 25 */ -} __rte_packed; +} /*__rte_packed*/; /** ****************************************************************************** @@ -215,7 +215,7 @@ struct xran_ecpri_delay_meas_pl { union xran_ecpri_cmn_hdr cmnhdr; struct xran_ecpri_delay_meas_pl deMeasPl; -} __rte_packed; + }/*__rte_packed*/; /** ****************************************************************************** diff --git a/fhi_lib/lib/api/xran_pkt_cp.h b/fhi_lib/lib/api/xran_pkt_cp.h index 531c51f..33e96b3 100644 --- a/fhi_lib/lib/api/xran_pkt_cp.h +++ b/fhi_lib/lib/api/xran_pkt_cp.h @@ -401,11 +401,11 @@ struct xran_cp_radioapp_section_ext8 { * The structure does not need the conversion of byte order. */ struct xran_cp_radioapp_section_ext9 { + uint8_t reserved; + uint8_t technology; /**< 5.4.7.9.1 technology (interface name) */ + uint8_t extLen; /**< 5.4.6.3 extension length, in 32bits words */ uint8_t extType:7; /**< 5.4.6.1 extension type */ uint8_t ef:1; /**< 5.4.6.2 extension flag */ - uint8_t extLen; /**< 5.4.6.3 extension length, in 32bits words */ - uint8_t technology; /**< 5.4.7.9.1 technology (interface name) */ - uint8_t reserved; } __attribute__((__packed__)); /** @@ -457,11 +457,11 @@ union xran_cp_radioapp_section_ext11 { uint8_t numBundPrb; /**< 5.4.7.11.3 Number of bundled PRBs per beamforming weights */ uint8_t bfwCompMeth:4; /**< 5.4.7.11.1 Beamforming weight Compression method (5.4.7.1.1) */ uint8_t bfwIqWidth:4; /**< 5.4.7.11.1 Beamforming weight IQ bit width (5.4.7.1.1) */ - } all_bits; + } __attribute__((__packed__)) all_bits; struct{ uint32_t data_field1; uint16_t data_field2; - }data_field; + } __attribute__((__packed__)) data_field; /* * bfwCompParam 5.4.7.11.2 beamforming weight compression parameter for PRB bundle * beamId beam ID for PRB bundle (15bits) diff --git a/fhi_lib/lib/api/xran_timer.h b/fhi_lib/lib/api/xran_timer.h index a7e9330..e9a0632 100644 --- a/fhi_lib/lib/api/xran_timer.h +++ b/fhi_lib/lib/api/xran_timer.h @@ -61,7 +61,7 @@ long poll_next_tick(long interval_ns, unsigned long *used_tick); long sleep_next_tick(long interval); int timing_set_debug_stop(int value, int count); int timing_get_debug_stop(void); -inline uint64_t timing_get_current_second(void); +uint64_t timing_get_current_second(void); uint8_t timing_get_numerology(void); int timing_set_numerology(uint8_t value); uint32_t xran_max_ota_sym_idx(uint8_t numerlogy); diff --git a/fhi_lib/lib/api/xran_up_api.h b/fhi_lib/lib/api/xran_up_api.h index 7d3afc5..46e0e1d 100644 --- a/fhi_lib/lib/api/xran_up_api.h +++ b/fhi_lib/lib/api/xran_up_api.h @@ -91,7 +91,7 @@ int32_t xran_extract_iq_samples(struct rte_mbuf *mbuf, uint8_t *compMeth, uint8_t *iqWidth); -inline int xran_prepare_iq_symbol_portion( +int xran_prepare_iq_symbol_portion( struct rte_mbuf *mbuf, const void *iq_data_start, const enum xran_input_byte_order iq_buf_byte_order, @@ -101,7 +101,10 @@ inline int xran_prepare_iq_symbol_portion( uint8_t Ant_ID, uint8_t seq_id, enum xran_comp_hdr_type staticEn, - uint32_t do_copy); + uint32_t do_copy, + uint16_t num_sections, + uint16_t section_id_start, + uint16_t iq_offset); #ifdef __cplusplus } diff --git a/fhi_lib/lib/ethernet/ethdi.c b/fhi_lib/lib/ethernet/ethdi.c index b6ba257..f5b2fd6 100644 --- a/fhi_lib/lib/ethernet/ethdi.c +++ b/fhi_lib/lib/ethernet/ethdi.c @@ -38,6 +38,7 @@ #include #include #include +#include #include #include #include @@ -154,13 +155,11 @@ int xran_handle_ether(uint16_t ethertype, struct rte_mbuf* pkt_q[], uint16_t xpo /* Process vlan tag. Cut the ethernet header. Call the etherype handlers. */ int xran_ethdi_filter_packet(struct rte_mbuf *pkt_q[], uint16_t vf_id, uint16_t q_id, uint16_t num) { - int ret; struct xran_ethdi_ctx *ctx = xran_ethdi_get_ctx(); - struct rte_ether_hdr* eth_hdr; uint16_t port_id = ctx->vf2xran_port[vf_id]; struct xran_eaxc_info *p_cid = &ctx->vf_and_q2cid[vf_id][q_id]; - ret = xran_handle_ether(ETHER_TYPE_ECPRI, pkt_q, port_id, p_cid, num); + xran_handle_ether(ETHER_TYPE_ECPRI, pkt_q, port_id, p_cid, num); return MBUF_FREE; } @@ -330,14 +329,16 @@ xran_ethdi_init_dpdk_io(char *name, const struct xran_io_cfg *io_cfg, char socket_limit[32] = "--socket-limit=8192"; char ring_name[32] = ""; int32_t xran_port = -1; - portid_t port_id; queueid_t qi = 0; - uint16_t count; + uint32_t cpu = 0; + uint32_t node = 0; + + cpu = sched_getcpu(); + node = numa_node_of_cpu(cpu); char *argv[] = { name, core_mask, "-n2", iova_mode, socket_mem, socket_limit, "--proc-type=auto", "--file-prefix", name, "-a0000:00:00.0", bbdev_wdev, bbdev_vdev}; - if (io_cfg == NULL) return 0; if(io_cfg->bbdev_mode != XRAN_BBDEV_NOT_USED){ @@ -345,17 +346,12 @@ xran_ethdi_init_dpdk_io(char *name, const struct xran_io_cfg *io_cfg, if (io_cfg->bbdev_mode == XRAN_BBDEV_MODE_HW_ON){ // hw-accelerated bbdev printf("hw-accelerated bbdev %s\n", io_cfg->bbdev_dev[0]); - snprintf(bbdev_wdev, RTE_DIM(bbdev_wdev), "-a%s", io_cfg->bbdev_dev[0]); - } else if (io_cfg->bbdev_mode == XRAN_BBDEV_MODE_HW_OFF){ - snprintf(bbdev_wdev, RTE_DIM(bbdev_wdev), "%s", "--vdev=baseband_turbo_sw"); } else if (io_cfg->bbdev_mode == XRAN_BBDEV_MODE_HW_SW){ printf("software and hw-accelerated bbdev %s\n", io_cfg->bbdev_dev[0]); - snprintf(bbdev_wdev, RTE_DIM(bbdev_wdev), "-a%s", io_cfg->bbdev_dev[0]); - snprintf(bbdev_vdev, RTE_DIM(bbdev_vdev), "%s", "--vdev=baseband_turbo_sw"); } else { rte_panic("Cannot init DPDK incorrect [bbdev_mode %d]\n", io_cfg->bbdev_mode); @@ -367,8 +363,14 @@ xran_ethdi_init_dpdk_io(char *name, const struct xran_io_cfg *io_cfg, } if (io_cfg->dpdkMemorySize){ - snprintf(socket_mem, RTE_DIM(socket_mem), "--socket-mem=%d", io_cfg->dpdkMemorySize); - snprintf(socket_limit, RTE_DIM(socket_limit), "--socket-limit=%d", io_cfg->dpdkMemorySize); + printf("node %d\n", node); + if (node == 1){ + snprintf(socket_mem, RTE_DIM(socket_mem), "--socket-mem=0,%d", io_cfg->dpdkMemorySize); + snprintf(socket_limit, RTE_DIM(socket_limit), "--socket-limit=0,%d", io_cfg->dpdkMemorySize); + } else { + snprintf(socket_mem, RTE_DIM(socket_mem), "--socket-mem=%d,0", io_cfg->dpdkMemorySize); + snprintf(socket_limit, RTE_DIM(socket_limit), "--socket-limit=%d,0", io_cfg->dpdkMemorySize); + } } if (io_cfg->core < 64) @@ -564,8 +566,7 @@ static inline uint16_t xran_tx_from_ring(int port, struct rte_ring *r) struct rte_mbuf *mbufs[BURST_SIZE]; uint16_t dequeued, sent = 0; uint32_t remaining; - int i; - long t1 = MLogTick(); + long t1 = MLogXRANTick(); dequeued = rte_ring_dequeue_burst(r, (void **)mbufs, BURST_SIZE, &remaining); @@ -575,7 +576,7 @@ static inline uint16_t xran_tx_from_ring(int port, struct rte_ring *r) while (1) { /* When tx queue is full it is trying again till succeed */ sent += rte_eth_tx_burst(port, 0, &mbufs[sent], dequeued - sent); if (sent == dequeued){ - MLogTask(PID_RADIO_ETH_TX_BURST, t1, MLogTick()); + MLogXRANTask(PID_RADIO_ETH_TX_BURST, t1, MLogXRANTick()); return remaining; } } @@ -601,18 +602,18 @@ int32_t process_dpdk_io(void* args) const uint16_t rxed = rte_eth_rx_burst(port[port_id], qi, mbufs, BURST_RX_IO_SIZE); if (rxed != 0){ unsigned enq_n = 0; - long t1 = MLogTick(); + long t1 = MLogXRANTick(); ctx->rx_vf_queue_cnt[port[port_id]][qi] += rxed; enq_n = rte_ring_enqueue_burst(ctx->rx_ring[port_id][qi], (void*)mbufs, rxed, NULL); if(rxed - enq_n) rte_panic("error enq\n"); - MLogTask(PID_RADIO_RX_VALIDATE, t1, MLogTick()); + MLogXRANTask(PID_RADIO_RX_VALIDATE, t1, MLogXRANTick()); } } /* TX */ - const uint16_t sent = xran_tx_from_ring(port[port_id], ctx->tx_ring[port_id]); + xran_tx_from_ring(port[port_id], ctx->tx_ring[port_id]); /* One way Delay Measurements */ if ((cfg->eowd_cmn[cfg->id].owdm_enable != 0) && (cfg->eowd_cmn[cfg->id].measVf == port_id)) { @@ -648,11 +649,10 @@ int32_t process_dpdk_io_tx(void* args) //rte_timer_manage(); for (port_id = 0; port_id < XRAN_VF_MAX && port_id < ctx->io_cfg.num_vfs; port_id++){ - struct rte_mbuf *mbufs[BURST_RX_IO_SIZE]; if(port[port_id] == 0xFF) return 0; /* TX */ - const uint16_t sent = xran_tx_from_ring(port[port_id], ctx->tx_ring[port_id]); + xran_tx_from_ring(port[port_id], ctx->tx_ring[port_id]); if (XRAN_STOPPED == xran_if_current_state) return -1; @@ -674,6 +674,9 @@ int32_t process_dpdk_io_rx(void* args) rte_timer_manage(); + if (XRAN_RUNNING != xran_if_current_state) + return 0; + for (port_id = 0; port_id < XRAN_VF_MAX && port_id < ctx->io_cfg.num_vfs; port_id++){ struct rte_mbuf *mbufs[BURST_RX_IO_SIZE]; if(port[port_id] == 0xFF) @@ -684,12 +687,12 @@ int32_t process_dpdk_io_rx(void* args) const uint16_t rxed = rte_eth_rx_burst(port[port_id], qi, mbufs, BURST_RX_IO_SIZE); if (rxed != 0){ unsigned enq_n = 0; - long t1 = MLogTick(); + long t1 = MLogXRANTick(); ctx->rx_vf_queue_cnt[port[port_id]][qi] += rxed; enq_n = rte_ring_enqueue_burst(ctx->rx_ring[port_id][qi], (void*)mbufs, rxed, NULL); if(rxed - enq_n) rte_panic("error enq\n"); - MLogTask(PID_RADIO_RX_VALIDATE, t1, MLogTick()); + MLogXRANTask(PID_RADIO_RX_VALIDATE, t1, MLogXRANTick()); } } if (XRAN_STOPPED == xran_if_current_state) diff --git a/fhi_lib/lib/ethernet/ethdi.h b/fhi_lib/lib/ethernet/ethdi.h index dec93eb..5a5bf80 100644 --- a/fhi_lib/lib/ethernet/ethdi.h +++ b/fhi_lib/lib/ethernet/ethdi.h @@ -73,8 +73,8 @@ enum xran_entities_id }; static char *const entity_names[] = { - "ORAN O-DU sim app", - "ORAN O-RU sim app" + (char *)"ORAN O-DU sim app", + (char *)"ORAN O-RU sim app" }; typedef int (*PROCESS_CB)(void * arg); diff --git a/fhi_lib/lib/ethernet/ethernet.c b/fhi_lib/lib/ethernet/ethernet.c index 0930665..edda598 100644 --- a/fhi_lib/lib/ethernet/ethernet.c +++ b/fhi_lib/lib/ethernet/ethernet.c @@ -74,7 +74,7 @@ struct rte_mempool *_eth_mbuf_pkt_gen = NULL; struct rte_mempool *socket_direct_pool = NULL; struct rte_mempool *socket_indirect_pool = NULL; -struct rte_mempool *_eth_mbuf_pool_vf_rx[16][RTE_MAX_QUEUES_PER_PORT] = {NULL}; +struct rte_mempool *_eth_mbuf_pool_vf_rx[16][RTE_MAX_QUEUES_PER_PORT] = {}; struct rte_mempool *_eth_mbuf_pool_vf_small[16] = {NULL}; void @@ -121,7 +121,6 @@ rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id, uint16_t nb_rx_desc, unsigned int socket_id, struct rte_eth_rxconf *rx_conf, struct rte_mempool *mp) { - unsigned int i, mp_n; int ret; #ifndef RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT #define RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT 0x00100000 @@ -273,14 +272,7 @@ void xran_init_port(int p_id, uint16_t num_rxq, uint32_t mtu) void xran_init_port_mempool(int p_id, uint32_t mtu) { - int ret; - int sock_id = rte_eth_dev_socket_id(p_id); char rx_pool_name[32] = ""; - uint16_t data_room_size = MBUF_POOL_ELEMENT; - - if (mtu <= 1500) { - data_room_size = MBUF_POOL_ELM_SMALL; -} snprintf(rx_pool_name, RTE_DIM(rx_pool_name), "%s_%d", "mempool_small_", p_id); printf("[%d] %s\n", p_id, rx_pool_name); @@ -289,13 +281,12 @@ void xran_init_port_mempool(int p_id, uint32_t mtu) if (_eth_mbuf_pool_vf_small[p_id] == NULL) rte_panic("Cannot create mbuf pool: %s\n", rte_strerror(rte_errno)); - - } /* Prepend ethernet header, possibly vlan tag. */ void xran_add_eth_hdr_vlan(struct rte_ether_addr *dst, uint16_t ethertype, struct rte_mbuf *mb) { + /* add in the ethernet header */ struct rte_ether_hdr *h = (struct rte_ether_hdr *)rte_pktmbuf_mtod(mb, struct rte_ether_hdr*); @@ -305,7 +296,22 @@ void xran_add_eth_hdr_vlan(struct rte_ether_addr *dst, uint16_t ethertype, struc rte_eth_macaddr_get(mb->port, &h->s_addr); /* set source addr */ h->d_addr = *dst; /* set dst addr */ h->ether_type = rte_cpu_to_be_16(ethertype); /* ethertype too */ - +#if 0 + struct rte_ether_addr *s = &h->s_addr; + printf("src=%x:%x:%x:%x:%x:%x, dst=%x:%x:%x:%x:%x:%x\n", s->addr_bytes[0], + s->addr_bytes[1], + s->addr_bytes[2], + s->addr_bytes[3], + s->addr_bytes[4], + s->addr_bytes[5], + dst->addr_bytes[0], + dst->addr_bytes[1], + dst->addr_bytes[2], + dst->addr_bytes[3], + dst->addr_bytes[4], + dst->addr_bytes[5] + ); +#endif #if defined(DPDKIO_DEBUG) && DPDKIO_DEBUG > 1 { char dst[RTE_ETHER_ADDR_FMT_SIZE] = "(empty)"; diff --git a/fhi_lib/lib/src/xran_app_frag.c b/fhi_lib/lib/src/xran_app_frag.c deleted file mode 100644 index cb526ee..0000000 --- a/fhi_lib/lib/src/xran_app_frag.c +++ /dev/null @@ -1,324 +0,0 @@ -/****************************************************************************** -* -* Copyright (c) 2020 Intel. -* -* Licensed under the Apache License, Version 2.0 (the "License"); -* you may not use this file except in compliance with the License. -* You may obtain a copy of the License at -* -* http://www.apache.org/licenses/LICENSE-2.0 -* -* Unless required by applicable law or agreed to in writing, software -* distributed under the License is distributed on an "AS IS" BASIS, -* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -* See the License for the specific language governing permissions and -* limitations under the License. -* -*******************************************************************************/ - -/** - * @brief xRAN application fragmentation for U-plane packets - * - * @file xran_app_frag.c - * @ingroup group_source_xran - * @author Intel Corporation - **/ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include "xran_app_frag.h" -#include "xran_cp_api.h" -#include "xran_pkt_up.h" -#include "xran_printf.h" -#include "xran_common.h" - -static inline void __fill_xranhdr_frag(struct xran_up_pkt_hdr *dst, - const struct xran_up_pkt_hdr *src, uint16_t rblen_bytes, - uint16_t rboff_bytes, uint16_t startPrbc, uint16_t numPrbc, uint32_t mf, uint8_t *seqid, uint8_t iqWidth) -{ - struct data_section_hdr loc_data_sec_hdr; - struct xran_ecpri_hdr loc_ecpri_hdr; - - rte_memcpy(dst, src, sizeof(*dst)); - - dst->ecpri_hdr.ecpri_seq_id.bits.seq_id = (*seqid)++; - - print_dbg("sec [%d %d] sec %d mf %d g_sec %d\n",startPrbc, numPrbc, dst->ecpri_hdr.ecpri_seq_id.seq_id, mf, *seqid); - - loc_data_sec_hdr.fields.all_bits = rte_be_to_cpu_32(dst->data_sec_hdr.fields.all_bits); - - /* update RBs */ - loc_data_sec_hdr.fields.start_prbu = startPrbc + rboff_bytes/XRAN_PAYLOAD_1_RB_SZ(iqWidth); - loc_data_sec_hdr.fields.num_prbu = rblen_bytes/XRAN_PAYLOAD_1_RB_SZ(iqWidth); - - print_dbg("sec [%d %d] pkt [%d %d] rboff_bytes %d rblen_bytes %d\n",startPrbc, numPrbc, loc_data_sec_hdr.fields.start_prbu, loc_data_sec_hdr.fields.num_prbu, - rboff_bytes, rblen_bytes); - - dst->data_sec_hdr.fields.all_bits = rte_cpu_to_be_32(loc_data_sec_hdr.fields.all_bits); - - dst->ecpri_hdr.cmnhdr.bits.ecpri_payl_size = rte_cpu_to_be_16(sizeof(struct radio_app_common_hdr) + - sizeof(struct data_section_hdr) + rblen_bytes + xran_get_ecpri_hdr_size()); -} - -static inline void __fill_xranhdr_frag_comp(struct xran_up_pkt_hdr_comp *dst, - const struct xran_up_pkt_hdr_comp *src, uint16_t rblen_bytes, - uint16_t rboff_bytes, uint16_t startPrbc, uint16_t numPrbc, uint32_t mf, uint8_t *seqid, uint8_t iqWidth) -{ - struct data_section_hdr loc_data_sec_hdr; - struct xran_ecpri_hdr loc_ecpri_hdr; - - rte_memcpy(dst, src, sizeof(*dst)); - - dst->ecpri_hdr.ecpri_seq_id.bits.seq_id = (*seqid)++; - - print_dbg("sec [%d %d] sec %d mf %d g_sec %d\n", startPrbc, numPrbc, dst->ecpri_hdr.ecpri_seq_id.seq_id, mf, *seqid); - - loc_data_sec_hdr.fields.all_bits = rte_be_to_cpu_32(dst->data_sec_hdr.fields.all_bits); - - /* update RBs */ - loc_data_sec_hdr.fields.start_prbu = startPrbc + rboff_bytes/XRAN_PAYLOAD_1_RB_SZ(iqWidth); - loc_data_sec_hdr.fields.num_prbu = rblen_bytes/XRAN_PAYLOAD_1_RB_SZ(iqWidth); - - print_dbg("sec [%d %d] pkt [%d %d] rboff_bytes %d rblen_bytes %d\n",startPrbc, numPrbc, loc_data_sec_hdr.fields.start_prbu, loc_data_sec_hdr.fields.num_prbu, - rboff_bytes, rblen_bytes); - - dst->data_sec_hdr.fields.all_bits = rte_cpu_to_be_32(loc_data_sec_hdr.fields.all_bits); - - dst->ecpri_hdr.cmnhdr.bits.ecpri_payl_size = rte_cpu_to_be_16(sizeof(struct radio_app_common_hdr) + - sizeof(struct data_section_hdr) + sizeof(struct data_section_compression_hdr) + rblen_bytes + xran_get_ecpri_hdr_size()); -} - - - -static inline void __free_fragments(struct rte_mbuf *mb[], uint32_t num) -{ - uint32_t i; - for (i = 0; i != num; i++) - rte_pktmbuf_free(mb[i]); -} - -/** - * XRAN fragmentation. - * - * This function implements the application fragmentation of XRAN packets. - * - * @param pkt_in - * The input packet. - * @param pkts_out - * Array storing the output fragments. - * @param mtu_size - * Size in bytes of the Maximum Transfer Unit (MTU) for the outgoing XRAN - * datagrams. This value includes the size of the XRAN headers. - * @param pool_direct - * MBUF pool used for allocating direct buffers for the output fragments. - * @param pool_indirect - * MBUF pool used for allocating indirect buffers for the output fragments. - * @return - * Upon successful completion - number of output fragments placed - * in the pkts_out array. - * Otherwise - (-1) * . - */ -int32_t -xran_app_fragment_packet(struct rte_mbuf *pkt_in, /* eth hdr is prepended */ - struct rte_mbuf **pkts_out, - uint16_t nb_pkts_out, - uint16_t mtu_size, - struct rte_mempool *pool_direct, - struct rte_mempool *pool_indirect, - int16_t nRBStart, /**< start RB of RB allocation */ - int16_t nRBSize, /**< number of RBs used */ - uint8_t *seqid, - uint8_t iqWidth, - uint8_t isUdCompHdr) -{ - struct rte_mbuf *in_seg = NULL; - uint32_t out_pkt_pos = 0, in_seg_data_pos = 0; - uint32_t more_in_segs; - uint16_t fragment_offset, frag_size; - uint16_t frag_bytes_remaining; - struct eth_xran_up_pkt_hdr *in_hdr; - struct xran_up_pkt_hdr *in_hdr_xran; - - struct eth_xran_up_pkt_hdr_comp *in_hdr_comp = NULL; - struct xran_up_pkt_hdr_comp *in_hdr_xran_comp = NULL; - - int32_t eth_xran_up_headers_sz = 0; - eth_xran_up_headers_sz = sizeof(struct eth_xran_up_pkt_hdr); - - if(isUdCompHdr) - eth_xran_up_headers_sz += sizeof(struct data_section_compression_hdr); - - /* - * Ensure the XRAN payload length of all fragments is aligned to a - * multiple of 48 bytes (1 RB with IQ of 16 bits each) - */ - frag_size = ((mtu_size - eth_xran_up_headers_sz - RTE_PKTMBUF_HEADROOM)/XRAN_PAYLOAD_1_RB_SZ(iqWidth))*XRAN_PAYLOAD_1_RB_SZ(iqWidth); - - print_dbg("frag_size %d\n",frag_size); - - if(isUdCompHdr){ - in_hdr_comp = rte_pktmbuf_mtod(pkt_in, struct eth_xran_up_pkt_hdr_comp*); - in_hdr_xran_comp = &in_hdr_comp->xran_hdr; - if (unlikely(frag_size * nb_pkts_out < - (uint16_t)(pkt_in->pkt_len - sizeof (struct xran_up_pkt_hdr_comp)))){ - print_err("-EINVAL\n"); - return -EINVAL; - } - }else { - in_hdr = rte_pktmbuf_mtod(pkt_in, struct eth_xran_up_pkt_hdr *); - in_hdr_xran = &in_hdr->xran_hdr; - /* Check that pkts_out is big enough to hold all fragments */ - if (unlikely(frag_size * nb_pkts_out < - (uint16_t)(pkt_in->pkt_len - sizeof (struct xran_up_pkt_hdr)))){ - print_err("-EINVAL\n"); - return -EINVAL; - } - } - - in_seg = pkt_in; - if(isUdCompHdr){ - in_seg_data_pos = sizeof(struct eth_xran_up_pkt_hdr_comp); - }else{ - in_seg_data_pos = sizeof(struct eth_xran_up_pkt_hdr); - } - out_pkt_pos = 0; - fragment_offset = 0; - - more_in_segs = 1; - while (likely(more_in_segs)) { - struct rte_mbuf *out_pkt = NULL, *out_seg_prev = NULL; - uint32_t more_out_segs; - struct xran_up_pkt_hdr *out_hdr; - struct xran_up_pkt_hdr_comp *out_hdr_comp; - - /* Allocate direct buffer */ - out_pkt = rte_pktmbuf_alloc(pool_direct); - if (unlikely(out_pkt == NULL)) { - print_err("pool_direct -ENOMEM\n"); - __free_fragments(pkts_out, out_pkt_pos); - return -ENOMEM; - } - - print_dbg("[%d] out_pkt %p\n",more_in_segs, out_pkt); - - /* Reserve space for the XRAN header that will be built later */ - //out_pkt->data_len = sizeof(struct xran_up_pkt_hdr); - //out_pkt->pkt_len = sizeof(struct xran_up_pkt_hdr); - if(isUdCompHdr){ - if(rte_pktmbuf_append(out_pkt, sizeof(struct xran_up_pkt_hdr_comp)) ==NULL){ - rte_panic("sizeof(struct xran_up_pkt_hdr)"); - } - }else{ - if(rte_pktmbuf_append(out_pkt, sizeof(struct xran_up_pkt_hdr)) ==NULL){ - rte_panic("sizeof(struct xran_up_pkt_hdr)"); - } - } - - frag_bytes_remaining = frag_size; - - out_seg_prev = out_pkt; - more_out_segs = 1; - while (likely(more_out_segs && more_in_segs)) { - uint32_t len; -#ifdef XRAN_ATTACH_MBUF - struct rte_mbuf *out_seg = NULL; - - /* Allocate indirect buffer */ - print_dbg("Allocate indirect buffer \n"); - out_seg = rte_pktmbuf_alloc(pool_indirect); - if (unlikely(out_seg == NULL)) { - print_err("pool_indirect -ENOMEM\n"); - rte_pktmbuf_free(out_pkt); - __free_fragments(pkts_out, out_pkt_pos); - return -ENOMEM; - } - - print_dbg("[%d %d] out_seg %p\n",more_out_segs, more_in_segs, out_seg); - out_seg_prev->next = out_seg; - out_seg_prev = out_seg; - - /* Prepare indirect buffer */ - rte_pktmbuf_attach(out_seg, in_seg); -#endif - len = frag_bytes_remaining; - if (len > (in_seg->data_len - in_seg_data_pos)) { - len = in_seg->data_len - in_seg_data_pos; - } -#ifdef XRAN_ATTACH_MBUF - out_seg->data_off = in_seg->data_off + in_seg_data_pos; - out_seg->data_len = (uint16_t)len; - out_pkt->pkt_len = (uint16_t)(len + - out_pkt->pkt_len); - out_pkt->nb_segs += 1; -#else -{ - char* pChar = rte_pktmbuf_mtod(in_seg, char*); - void *iq_src = (pChar + in_seg_data_pos); - void *iq_dst = rte_pktmbuf_append(out_pkt, len); - - print_dbg("rte_pktmbuf_attach\n"); - if(iq_src && iq_dst) - rte_memcpy(iq_dst, iq_src, len); - else - print_err("iq_src %p iq_dst %p\n len %d room %d\n", iq_src, iq_dst, len, rte_pktmbuf_tailroom(out_pkt)); -} -#endif - in_seg_data_pos += len; - frag_bytes_remaining -= len; - - /* Current output packet (i.e. fragment) done ? */ - if (unlikely(frag_bytes_remaining == 0)) - more_out_segs = 0; - - /* Current input segment done ? */ - if (unlikely(in_seg_data_pos == in_seg->data_len)) { - in_seg = in_seg->next; - in_seg_data_pos = 0; - - if (unlikely(in_seg == NULL)) - more_in_segs = 0; - } - } - - /* Build the XRAN header */ - print_dbg("Build the XRAN header\n"); - - - if(isUdCompHdr){ - out_hdr_comp = rte_pktmbuf_mtod(out_pkt, struct xran_up_pkt_hdr_comp*); - __fill_xranhdr_frag_comp(out_hdr_comp, in_hdr_xran_comp, - (uint16_t)out_pkt->pkt_len - sizeof(struct xran_up_pkt_hdr_comp), - fragment_offset, nRBStart, nRBSize, more_in_segs, seqid, iqWidth); - - fragment_offset = (uint16_t)(fragment_offset + - out_pkt->pkt_len - sizeof(struct xran_up_pkt_hdr_comp)); - } else { - out_hdr = rte_pktmbuf_mtod(out_pkt, struct xran_up_pkt_hdr *); - __fill_xranhdr_frag(out_hdr, in_hdr_xran, - (uint16_t)out_pkt->pkt_len - sizeof(struct xran_up_pkt_hdr), - fragment_offset, nRBStart, nRBSize, more_in_segs, seqid, iqWidth); - - fragment_offset = (uint16_t)(fragment_offset + - out_pkt->pkt_len - sizeof(struct xran_up_pkt_hdr)); - } - - //out_pkt->l3_len = sizeof(struct xran_up_pkt_hdr); - - /* Write the fragment to the output list */ - pkts_out[out_pkt_pos] = out_pkt; - print_dbg("out_pkt_pos %d data_len %d pkt_len %d\n", out_pkt_pos, out_pkt->data_len, out_pkt->pkt_len); - out_pkt_pos ++; - //rte_pktmbuf_dump(stdout, out_pkt, 96); - } - - return out_pkt_pos; -} - - diff --git a/fhi_lib/lib/src/xran_app_frag.h b/fhi_lib/lib/src/xran_app_frag.h deleted file mode 100644 index 5f5e0e8..0000000 --- a/fhi_lib/lib/src/xran_app_frag.h +++ /dev/null @@ -1,65 +0,0 @@ -/****************************************************************************** -* -* Copyright (c) 2020 Intel. -* -* Licensed under the Apache License, Version 2.0 (the "License"); -* you may not use this file except in compliance with the License. -* You may obtain a copy of the License at -* -* http://www.apache.org/licenses/LICENSE-2.0 -* -* Unless required by applicable law or agreed to in writing, software -* distributed under the License is distributed on an "AS IS" BASIS, -* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -* See the License for the specific language governing permissions and -* limitations under the License. -* -*******************************************************************************/ - - -/** - * @brief Header file for functions to perform application level fragmentation - * - * @file xran_app_frag.h - * @ingroup group_source_xran - * @author Intel Corporation - **/ - -#ifndef _XRAN_APP_FRAG_ -#define _XRAN_APP_FRAG_ - -#ifdef __cplusplus -extern "C" { -#endif - -#include -#include - -#include -#include -#include -#include -#include - -#include "xran_fh_o_du.h" -#include "xran_cp_api.h" - -int32_t -xran_app_fragment_packet(struct rte_mbuf *pkt_in, /* eth hdr is prepended */ - struct rte_mbuf **pkts_out, - uint16_t nb_pkts_out, - uint16_t mtu_size, - struct rte_mempool *pool_direct, - struct rte_mempool *pool_indirect, - int16_t nRBStart, /**< start RB of RB allocation */ - int16_t nRBSize, /**< number of RBs used */ - uint8_t *seqid, - uint8_t iqWidth, - uint8_t isUdCompHdr); - -#ifdef __cplusplus -} -#endif - -#endif /* _XRAN_APP_FRAG_ */ - diff --git a/fhi_lib/lib/src/xran_bfp_cplane16.cpp b/fhi_lib/lib/src/xran_bfp_cplane16.cpp index d678d4a..2056d9a 100644 --- a/fhi_lib/lib/src/xran_bfp_cplane16.cpp +++ b/fhi_lib/lib/src/xran_bfp_cplane16.cpp @@ -193,7 +193,7 @@ namespace BFP_CPlane_16 inline void compress8_16RB(const BlockFloatCompander::ExpandedData& dataIn, BlockFloatCompander::CompressedData* dataOut, const __m512i totShiftBits) { - const auto exponents = computeExponent_16RB(dataIn, totShiftBits); + const __m512i exponents = computeExponent_16RB(dataIn, totShiftBits); const __m512i* dataInAddr = reinterpret_cast(dataIn.dataExpanded); #pragma unroll(16) for (int n = 0; n < 16; ++n) @@ -206,7 +206,7 @@ namespace BFP_CPlane_16 inline void compress8_4RB(const BlockFloatCompander::ExpandedData& dataIn, BlockFloatCompander::CompressedData* dataOut, const __m512i totShiftBits) { - const auto exponents = computeExponent_4RB(dataIn, totShiftBits); + const __m512i exponents = computeExponent_4RB(dataIn, totShiftBits); const __m512i* dataInAddr = reinterpret_cast(dataIn.dataExpanded); #pragma unroll(4) for (int n = 0; n < 4; ++n) diff --git a/fhi_lib/lib/src/xran_bfp_cplane16_snc.cpp b/fhi_lib/lib/src/xran_bfp_cplane16_snc.cpp index 02fb9f7..1d72b5c 100644 --- a/fhi_lib/lib/src/xran_bfp_cplane16_snc.cpp +++ b/fhi_lib/lib/src/xran_bfp_cplane16_snc.cpp @@ -188,7 +188,7 @@ namespace BFP_CPlane_16_SNC inline void compress8_16RB(const BlockFloatCompander::ExpandedData& dataIn, BlockFloatCompander::CompressedData* dataOut, const __m512i totShiftBits) { - const auto exponents = computeExponent_16RB(dataIn, totShiftBits); + const __m512i exponents = computeExponent_16RB(dataIn, totShiftBits); const __m512i* dataInAddr = reinterpret_cast(dataIn.dataExpanded); #pragma unroll(16) for (int n = 0; n < 16; ++n) @@ -201,7 +201,7 @@ namespace BFP_CPlane_16_SNC inline void compress8_4RB(const BlockFloatCompander::ExpandedData& dataIn, BlockFloatCompander::CompressedData* dataOut, const __m512i totShiftBits) { - const auto exponents = computeExponent_4RB(dataIn, totShiftBits); + const __m512i exponents = computeExponent_4RB(dataIn, totShiftBits); const __m512i* dataInAddr = reinterpret_cast(dataIn.dataExpanded); #pragma unroll(4) for (int n = 0; n < 4; ++n) diff --git a/fhi_lib/lib/src/xran_bfp_cplane32.cpp b/fhi_lib/lib/src/xran_bfp_cplane32.cpp index 8d63e8c..a110791 100644 --- a/fhi_lib/lib/src/xran_bfp_cplane32.cpp +++ b/fhi_lib/lib/src/xran_bfp_cplane32.cpp @@ -209,7 +209,7 @@ namespace BFP_CPlane_32 inline void compress8_16RB(const BlockFloatCompander::ExpandedData& dataIn, BlockFloatCompander::CompressedData* dataOut, const __m512i totShiftBits) { - const auto exponents = computeExponent_16RB(dataIn, totShiftBits); + const __m512i exponents = computeExponent_16RB(dataIn, totShiftBits); const __m512i* dataInAddr = reinterpret_cast(dataIn.dataExpanded); #pragma unroll(16) for (int n = 0; n < 16; ++n) @@ -222,7 +222,7 @@ namespace BFP_CPlane_32 inline void compress8_4RB(const BlockFloatCompander::ExpandedData& dataIn, BlockFloatCompander::CompressedData* dataOut, const __m512i totShiftBits) { - const auto exponents = computeExponent_4RB(dataIn, totShiftBits); + const __m512i exponents = computeExponent_4RB(dataIn, totShiftBits); const __m512i* dataInAddr = reinterpret_cast(dataIn.dataExpanded); #pragma unroll(4) for (int n = 0; n < 4; ++n) diff --git a/fhi_lib/lib/src/xran_bfp_cplane32_snc.cpp b/fhi_lib/lib/src/xran_bfp_cplane32_snc.cpp index 76b5eee..e73f56f 100644 --- a/fhi_lib/lib/src/xran_bfp_cplane32_snc.cpp +++ b/fhi_lib/lib/src/xran_bfp_cplane32_snc.cpp @@ -204,7 +204,7 @@ namespace BFP_CPlane_32_SNC inline void compress8_16RB(const BlockFloatCompander::ExpandedData& dataIn, BlockFloatCompander::CompressedData* dataOut, const __m512i totShiftBits) { - const auto exponents = computeExponent_16RB(dataIn, totShiftBits); + const __m512i exponents = computeExponent_16RB(dataIn, totShiftBits); const __m512i* dataInAddr = reinterpret_cast(dataIn.dataExpanded); #pragma unroll(16) for (int n = 0; n < 16; ++n) @@ -217,7 +217,7 @@ namespace BFP_CPlane_32_SNC inline void compress8_4RB(const BlockFloatCompander::ExpandedData& dataIn, BlockFloatCompander::CompressedData* dataOut, const __m512i totShiftBits) { - const auto exponents = computeExponent_4RB(dataIn, totShiftBits); + const __m512i exponents = computeExponent_4RB(dataIn, totShiftBits); const __m512i* dataInAddr = reinterpret_cast(dataIn.dataExpanded); #pragma unroll(4) for (int n = 0; n < 4; ++n) diff --git a/fhi_lib/lib/src/xran_bfp_cplane64.cpp b/fhi_lib/lib/src/xran_bfp_cplane64.cpp index 3139516..ac39679 100644 --- a/fhi_lib/lib/src/xran_bfp_cplane64.cpp +++ b/fhi_lib/lib/src/xran_bfp_cplane64.cpp @@ -209,7 +209,7 @@ namespace BFP_CPlane_64 inline void compress8_16RB(const BlockFloatCompander::ExpandedData& dataIn, BlockFloatCompander::CompressedData* dataOut, const __m512i totShiftBits) { - const auto exponents = computeExponent_16RB(dataIn, totShiftBits); + const __m512i exponents = computeExponent_16RB(dataIn, totShiftBits); const __m512i* dataInAddr = reinterpret_cast(dataIn.dataExpanded); #pragma unroll(16) for (int n = 0; n < 16; ++n) @@ -222,7 +222,7 @@ namespace BFP_CPlane_64 inline void compress8_4RB(const BlockFloatCompander::ExpandedData& dataIn, BlockFloatCompander::CompressedData* dataOut, const __m512i totShiftBits) { - const auto exponents = computeExponent_4RB(dataIn, totShiftBits); + const __m512i exponents = computeExponent_4RB(dataIn, totShiftBits); const __m512i* dataInAddr = reinterpret_cast(dataIn.dataExpanded); #pragma unroll(4) for (int n = 0; n < 4; ++n) diff --git a/fhi_lib/lib/src/xran_bfp_cplane64_snc.cpp b/fhi_lib/lib/src/xran_bfp_cplane64_snc.cpp index 9279ea0..84ecf21 100644 --- a/fhi_lib/lib/src/xran_bfp_cplane64_snc.cpp +++ b/fhi_lib/lib/src/xran_bfp_cplane64_snc.cpp @@ -204,7 +204,7 @@ namespace BFP_CPlane_64_SNC inline void compress8_16RB(const BlockFloatCompander::ExpandedData& dataIn, BlockFloatCompander::CompressedData* dataOut, const __m512i totShiftBits) { - const auto exponents = computeExponent_16RB(dataIn, totShiftBits); + const __m512i exponents = computeExponent_16RB(dataIn, totShiftBits); const __m512i* dataInAddr = reinterpret_cast(dataIn.dataExpanded); #pragma unroll(16) for (int n = 0; n < 16; ++n) @@ -217,7 +217,7 @@ namespace BFP_CPlane_64_SNC inline void compress8_4RB(const BlockFloatCompander::ExpandedData& dataIn, BlockFloatCompander::CompressedData* dataOut, const __m512i totShiftBits) { - const auto exponents = computeExponent_4RB(dataIn, totShiftBits); + const __m512i exponents = computeExponent_4RB(dataIn, totShiftBits); const __m512i* dataInAddr = reinterpret_cast(dataIn.dataExpanded); #pragma unroll(4) for (int n = 0; n < 4; ++n) diff --git a/fhi_lib/lib/src/xran_bfp_cplane8.cpp b/fhi_lib/lib/src/xran_bfp_cplane8.cpp index 20672f6..676ba46 100644 --- a/fhi_lib/lib/src/xran_bfp_cplane8.cpp +++ b/fhi_lib/lib/src/xran_bfp_cplane8.cpp @@ -245,7 +245,7 @@ namespace BFP_CPlane_8 inline void compress8_16RB(const BlockFloatCompander::ExpandedData& dataIn, BlockFloatCompander::CompressedData* dataOut, const __m512i totShiftBits) { - const auto exponents = computeExponent_16RB(dataIn, totShiftBits); + const __m512i exponents = computeExponent_16RB(dataIn, totShiftBits); const __m256i* dataInAddr = reinterpret_cast(dataIn.dataExpanded); #pragma unroll(16) for (int n = 0; n < 16; ++n) @@ -258,7 +258,7 @@ namespace BFP_CPlane_8 inline void compress8_4RB(const BlockFloatCompander::ExpandedData& dataIn, BlockFloatCompander::CompressedData* dataOut, const __m512i totShiftBits) { - const auto exponents = computeExponent_4RB(dataIn, totShiftBits); + const __m512i exponents = computeExponent_4RB(dataIn, totShiftBits); const __m256i* dataInAddr = reinterpret_cast(dataIn.dataExpanded); #pragma unroll(4) for (int n = 0; n < 4; ++n) diff --git a/fhi_lib/lib/src/xran_bfp_cplane8_snc.cpp b/fhi_lib/lib/src/xran_bfp_cplane8_snc.cpp index ebc2ab1..08c9bd0 100644 --- a/fhi_lib/lib/src/xran_bfp_cplane8_snc.cpp +++ b/fhi_lib/lib/src/xran_bfp_cplane8_snc.cpp @@ -238,7 +238,7 @@ namespace BFP_CPlane_8_SNC inline void compress8_16RB(const BlockFloatCompander::ExpandedData& dataIn, BlockFloatCompander::CompressedData* dataOut, const __m512i totShiftBits) { - const auto exponents = computeExponent_16RB(dataIn, totShiftBits); + const __m512i exponents = computeExponent_16RB(dataIn, totShiftBits); const __m256i* dataInAddr = reinterpret_cast(dataIn.dataExpanded); #pragma unroll(16) for (int n = 0; n < 16; ++n) @@ -251,7 +251,7 @@ namespace BFP_CPlane_8_SNC inline void compress8_4RB(const BlockFloatCompander::ExpandedData& dataIn, BlockFloatCompander::CompressedData* dataOut, const __m512i totShiftBits) { - const auto exponents = computeExponent_4RB(dataIn, totShiftBits); + const __m512i exponents = computeExponent_4RB(dataIn, totShiftBits); const __m256i* dataInAddr = reinterpret_cast(dataIn.dataExpanded); #pragma unroll(4) for (int n = 0; n < 4; ++n) diff --git a/fhi_lib/lib/src/xran_bfp_uplane.cpp b/fhi_lib/lib/src/xran_bfp_uplane.cpp index a345df4..59b6850 100644 --- a/fhi_lib/lib/src/xran_bfp_uplane.cpp +++ b/fhi_lib/lib/src/xran_bfp_uplane.cpp @@ -215,7 +215,7 @@ namespace BFP_UPlane void compress8_16RB(const BlockFloatCompander::ExpandedData& dataIn, BlockFloatCompander::CompressedData* dataOut, const __m512i totShiftBits) { - const auto exponents = computeExponent_16RB(dataIn, totShiftBits); + const __m512i exponents = computeExponent_16RB(dataIn, totShiftBits); #pragma unroll(16) for (int n = 0; n < 16; ++n) { @@ -228,7 +228,7 @@ namespace BFP_UPlane void compress8_4RB(const BlockFloatCompander::ExpandedData& dataIn, BlockFloatCompander::CompressedData* dataOut, const __m512i totShiftBits) { - const auto exponents = computeExponent_4RB(dataIn, totShiftBits); + const __m512i exponents = computeExponent_4RB(dataIn, totShiftBits); #pragma unroll(4) for (int n = 0; n < 4; ++n) { diff --git a/fhi_lib/lib/src/xran_bfp_uplane_snc.cpp b/fhi_lib/lib/src/xran_bfp_uplane_snc.cpp index 8710bc6..995d632 100644 --- a/fhi_lib/lib/src/xran_bfp_uplane_snc.cpp +++ b/fhi_lib/lib/src/xran_bfp_uplane_snc.cpp @@ -212,7 +212,7 @@ namespace BFP_UPlane_SNC void compress8_16RB(const BlockFloatCompander::ExpandedData& dataIn, BlockFloatCompander::CompressedData* dataOut, const __m512i totShiftBits) { - const auto exponents = computeExponent_16RB(dataIn, totShiftBits); + const __m512i exponents = computeExponent_16RB(dataIn, totShiftBits); #pragma unroll(16) for (int n = 0; n < 16; ++n) { @@ -225,7 +225,7 @@ namespace BFP_UPlane_SNC void compress8_4RB(const BlockFloatCompander::ExpandedData& dataIn, BlockFloatCompander::CompressedData* dataOut, const __m512i totShiftBits) { - const auto exponents = computeExponent_4RB(dataIn, totShiftBits); + const __m512i exponents = computeExponent_4RB(dataIn, totShiftBits); #pragma unroll(4) for (int n = 0; n < 4; ++n) { diff --git a/fhi_lib/lib/src/xran_cb_proc.c b/fhi_lib/lib/src/xran_cb_proc.c index b35d55c..08660f3 100644 --- a/fhi_lib/lib/src/xran_cb_proc.c +++ b/fhi_lib/lib/src/xran_cb_proc.c @@ -51,19 +51,19 @@ typedef void (*rx_dpdk_sym_cb_fn)(struct rte_timer *tim, void *arg); void xran_timer_arm(struct rte_timer *tim, void* arg, void *p_dev_ctx) { struct xran_device_ctx * p_xran_dev_ctx = (struct xran_device_ctx *)p_dev_ctx; - uint64_t t3 = MLogTick(); + uint64_t t3 = MLogXRANTick(); if (xran_if_current_state == XRAN_RUNNING){ rte_timer_cb_t fct = (rte_timer_cb_t)arg; rte_timer_reset_sync(tim, 0, SINGLE, p_xran_dev_ctx->fh_init.io_cfg.timing_core, fct, p_dev_ctx); } - MLogTask(PID_TIME_ARM_TIMER, t3, MLogTick()); + MLogXRANTask(PID_TIME_ARM_TIMER, t3, MLogXRANTick()); } void xran_timer_arm_cp_dl(struct rte_timer *tim, void* arg, void *p_dev_ctx) { struct xran_device_ctx * p_xran_dev_ctx = (struct xran_device_ctx *)p_dev_ctx; - uint64_t t3 = MLogTick(); + uint64_t t3 = MLogXRANTick(); unsigned tim_lcore = xran_schedule_to_worker(XRAN_JOB_TYPE_CP_DL, p_xran_dev_ctx); @@ -71,13 +71,13 @@ void xran_timer_arm_cp_dl(struct rte_timer *tim, void* arg, void *p_dev_ctx) rte_timer_cb_t fct = (rte_timer_cb_t)arg; rte_timer_reset_sync(tim, 0, SINGLE, tim_lcore, fct, p_dev_ctx); } - MLogTask(PID_TIME_ARM_TIMER, t3, MLogTick()); + MLogXRANTask(PID_TIME_ARM_TIMER, t3, MLogXRANTick()); } void xran_timer_arm_cp_ul(struct rte_timer *tim, void* arg, void *p_dev_ctx) { struct xran_device_ctx * p_xran_dev_ctx = (struct xran_device_ctx *)p_dev_ctx; - uint64_t t3 = MLogTick(); + uint64_t t3 = MLogXRANTick(); unsigned tim_lcore = xran_schedule_to_worker(XRAN_JOB_TYPE_CP_UL, p_xran_dev_ctx); @@ -85,18 +85,17 @@ void xran_timer_arm_cp_ul(struct rte_timer *tim, void* arg, void *p_dev_ctx) rte_timer_cb_t fct = (rte_timer_cb_t)arg; rte_timer_reset_sync(tim, 0, SINGLE, tim_lcore, fct, p_dev_ctx); } - MLogTask(PID_TIME_ARM_TIMER, t3, MLogTick()); + MLogXRANTask(PID_TIME_ARM_TIMER, t3, MLogXRANTick()); } void xran_timer_arm_for_deadline(struct rte_timer *tim, void* arg, void *p_dev_ctx) { struct xran_device_ctx * p_xran_dev_ctx = (struct xran_device_ctx *)p_dev_ctx; - uint64_t t3 = MLogTick(); + uint64_t t3 = MLogXRANTick(); unsigned tim_lcore = xran_schedule_to_worker(XRAN_JOB_TYPE_DEADLINE, p_xran_dev_ctx); int32_t rx_tti; - int32_t cc_id; uint32_t nFrameIdx; uint32_t nSubframeIdx; uint32_t nSlotIdx; @@ -113,19 +112,18 @@ void xran_timer_arm_for_deadline(struct rte_timer *tim, void* arg, void *p_dev_ rte_timer_reset_sync(tim, 0, SINGLE, tim_lcore, fct, p_xran_dev_ctx); } - MLogTask(PID_TIME_ARM_TIMER_DEADLINE, t3, MLogTick()); + MLogXRANTask(PID_TIME_ARM_TIMER_DEADLINE, t3, MLogXRANTick()); } void xran_timer_arm_user_cb(struct rte_timer *tim, void* arg, void *p_ctx) { struct cb_user_per_sym_ctx* p_sym_cb_ctx = (struct cb_user_per_sym_ctx *)p_ctx; struct xran_device_ctx * p_xran_dev_ctx = (struct xran_device_ctx *)p_sym_cb_ctx->p_dev; - uint64_t t3 = MLogTick(); + uint64_t t3 = MLogXRANTick(); unsigned tim_lcore = xran_schedule_to_worker(XRAN_JOB_TYPE_SYM_CB, NULL); int32_t rx_tti; - int32_t cc_id; uint32_t nFrameIdx = 0; uint32_t nSubframeIdx = 0; uint32_t nSlotIdx = 0; @@ -148,38 +146,35 @@ void xran_timer_arm_user_cb(struct rte_timer *tim, void* arg, void *p_ctx) p_sym_cb_ctx->user_timer_put = 0; } - MLogTask(PID_TIME_ARM_USER_TIMER_DEADLINE, t3, MLogTick()); + MLogXRANTask(PID_TIME_ARM_USER_TIMER_DEADLINE, t3, MLogXRANTick()); } void xran_timer_arm_ex(struct rte_timer *tim, void* CbFct, void *CbArg, unsigned tim_lcore) { - uint64_t t3 = MLogTick(); + uint64_t t3 = MLogXRANTick(); if (xran_if_current_state == XRAN_RUNNING){ rte_timer_cb_t fct = (rte_timer_cb_t)CbFct; rte_timer_reset_sync(tim, 0, SINGLE, tim_lcore, fct, CbArg); } - MLogTask(PID_TIME_ARM_TIMER, t3, MLogTick()); + MLogXRANTask(PID_TIME_ARM_TIMER, t3, MLogXRANTick()); } int32_t xran_timing_create_cbs(void *args) { - int32_t res = XRAN_STATUS_SUCCESS; - int32_t do_reset = 0; - uint64_t t1 = 0; - int32_t result1,i,j; - uint32_t delay_cp_dl; + //int32_t res = XRAN_STATUS_SUCCESS; + int32_t j; + uint32_t delay_cp_dl_max, delay_cp_dl_min; uint32_t delay_cp_ul; uint32_t delay_up; uint32_t time_diff_us; uint32_t delay_cp2up; - uint32_t sym_cp_dl; + uint32_t sym_cp_dl_max, sym_cp_dl_min; uint32_t sym_cp_ul; uint32_t time_diff_nSymb; int32_t sym_up; struct xran_device_ctx * p_dev_ctx = (struct xran_device_ctx *)args; - uint64_t tWake = 0, tWakePrev = 0, tUsed = 0; struct cb_elem_entry * cb_elm = NULL; uint32_t interval_us_local = p_dev_ctx->interval_us_local; @@ -189,20 +184,75 @@ xran_timing_create_cbs(void *args) if (p_dev_ctx->fh_init.io_cfg.id == O_DU) { - delay_cp_dl = interval_us_local - p_dev_ctx->fh_cfg.T1a_max_cp_dl; + delay_cp_dl_max = interval_us_local - p_dev_ctx->fh_cfg.T1a_max_cp_dl; + delay_cp_dl_min = interval_us_local - p_dev_ctx->fh_cfg.T1a_min_cp_dl; delay_cp_ul = interval_us_local - p_dev_ctx->fh_cfg.T1a_max_cp_ul; + + uint8_t numSlots=0; /* How many slots you need to go backwards from OTA */ + uint32_t max_dl_delay_offset=interval_us_local; /* Start of the slot in which you will start CP DL */ + while(p_dev_ctx->fh_cfg.T1a_max_cp_dl > max_dl_delay_offset) + { + max_dl_delay_offset += interval_us_local; + numSlots++; + } + + /* Delay from start of 'a' slot */ + delay_cp_dl_max = max_dl_delay_offset - p_dev_ctx->fh_cfg.T1a_max_cp_dl; + /* Symbol on which we will start CP transmission */ + sym_cp_dl_max = delay_cp_dl_max*1000/(interval_us_local*1000/N_SYM_PER_SLOT)+1; + /* Backward offset from OTA in terms of symbols when Cp transmission will start + * i.e. cp transmission will start 'max_dl_offset_sym' symbols before OTA + */ + uint8_t max_dl_offset_sym = (numSlots+1)*N_SYM_PER_SLOT - sym_cp_dl_max; + /* Handle corner case of symbol-0*/ + sym_cp_dl_max%=N_SYM_PER_SLOT; + + uint32_t min_dl_delay_offset=interval_us_local; + numSlots=0; + while(p_dev_ctx->fh_cfg.T1a_min_cp_dl > min_dl_delay_offset) + { + min_dl_delay_offset += interval_us_local; + numSlots++; + } + delay_cp_dl_min = min_dl_delay_offset - p_dev_ctx->fh_cfg.T1a_min_cp_dl; + sym_cp_dl_min = delay_cp_dl_min*1000/(interval_us_local*1000/N_SYM_PER_SLOT) - 1; + uint8_t min_dl_offset_sym = (numSlots+1)*N_SYM_PER_SLOT - sym_cp_dl_min; + sym_cp_dl_min%=N_SYM_PER_SLOT; + + + uint32_t ul_delay_offset=interval_us_local; + numSlots=0; + while(p_dev_ctx->fh_cfg.T1a_max_cp_ul > ul_delay_offset) + { + ul_delay_offset += interval_us_local; + numSlots++; + } + delay_cp_ul = ul_delay_offset - p_dev_ctx->fh_cfg.T1a_max_cp_ul; + sym_cp_ul = (delay_cp_ul*1000/(interval_us_local*1000/N_SYM_PER_SLOT)+1); + uint8_t ul_offset_sym = (numSlots+1)*N_SYM_PER_SLOT - sym_cp_ul; + sym_cp_ul%=N_SYM_PER_SLOT; + + printf("delay_cp_dl_max=%u, sym_cp_dl_max=%u, max_dl_offset_sym=%u\n" + "delay_cp_dl_min=%u, sym_cp_dl_min=%u, min_dl_offset_sym=%u\n" + "delay_cp_ul=%u, sym_cp_ul=%u, ul_offset_sym=%u\n", + delay_cp_dl_max, sym_cp_dl_max, max_dl_offset_sym, + delay_cp_dl_min, sym_cp_dl_min, min_dl_offset_sym, + delay_cp_ul, sym_cp_ul, ul_offset_sym); + + delay_up = p_dev_ctx->fh_cfg.T1a_max_up; time_diff_us = p_dev_ctx->fh_cfg.Ta4_max; - delay_cp2up = delay_up-delay_cp_dl; + delay_cp2up = delay_up-delay_cp_dl_max; + - sym_cp_dl = delay_cp_dl*1000/(interval_us_local*1000/N_SYM_PER_SLOT)+1; - sym_cp_ul = delay_cp_ul*1000/(interval_us_local*1000/N_SYM_PER_SLOT)+1; time_diff_nSymb = time_diff_us*1000/(interval_us_local*1000/N_SYM_PER_SLOT); p_dev_ctx->sym_up = sym_up = -(delay_up*1000/(interval_us_local*1000/N_SYM_PER_SLOT)); p_dev_ctx->sym_up_ul = time_diff_nSymb = (time_diff_us*1000/(interval_us_local*1000/N_SYM_PER_SLOT)+1); - printf("Start C-plane DL %d us after TTI [trigger on sym %d]\n", delay_cp_dl, sym_cp_dl); + printf("C-plane DL from %d us after TTI [trigger on sym %d] to %d us after TTI [trigger on sym %d]\n", + delay_cp_dl_max, sym_cp_dl_max, delay_cp_dl_min, sym_cp_dl_min); + printf("Start C-plane UL %d us after TTI [trigger on sym %d]\n", delay_cp_ul, sym_cp_ul); printf("Start U-plane DL %d us before OTA [offset in sym %d]\n", delay_up, sym_up); printf("Start U-plane UL %d us OTA [offset in sym %d]\n", time_diff_us, time_diff_nSymb); @@ -210,16 +260,39 @@ xran_timing_create_cbs(void *args) printf("C-plane to U-plane delay %d us after TTI\n", delay_cp2up); printf("Start Sym timer %ld ns\n", TX_TIMER_INTERVAL/N_SYM_PER_SLOT); - cb_elm = xran_create_cb(xran_timer_arm_cp_dl, tx_cp_dl_cb, (void*)p_dev_ctx); - if(cb_elm){ - LIST_INSERT_HEAD(&p_dev_ctx->sym_cb_list_head[sym_cp_dl], - cb_elm, - pointers); - } else { + if(1 == p_dev_ctx->fh_init.dlCpProcBurst){ + p_dev_ctx->numSymsForDlCP = 1; + } + else{ + if(max_dl_offset_sym >= min_dl_offset_sym) /* corner case where only 1 symbol is available for transmission */ + p_dev_ctx->numSymsForDlCP = max_dl_offset_sym - min_dl_offset_sym + 1; + else + p_dev_ctx->numSymsForDlCP = 1; + + } + + int count=0; + while (count < p_dev_ctx->numSymsForDlCP) + { + cb_elm = + xran_create_cb (xran_timer_arm_cp_dl, tx_cp_dl_cb, (void *) p_dev_ctx); + if (cb_elm) + { + LIST_INSERT_HEAD (&p_dev_ctx->sym_cb_list_head[sym_cp_dl_max], + cb_elm, pointers); + } + else + { print_err("cb_elm is NULL\n"); - res = XRAN_STATUS_FAIL; + //res = XRAN_STATUS_FAIL; goto err0; } + printf ("created sym cp dl cb for symbol %u\n", sym_cp_dl_max); + + sym_cp_dl_max = (sym_cp_dl_max+1)%N_SYM_PER_SLOT; + max_dl_offset_sym--; + count++; + } cb_elm = xran_create_cb(xran_timer_arm_cp_ul, tx_cp_ul_cb, (void*)p_dev_ctx); if(cb_elm){ @@ -228,31 +301,55 @@ xran_timing_create_cbs(void *args) pointers); } else { print_err("cb_elm is NULL\n"); - res = XRAN_STATUS_FAIL; + //res = XRAN_STATUS_FAIL; goto err0; } /* Full slot UL OTA + time_diff_us */ cb_elm = xran_create_cb(xran_timer_arm_for_deadline, rx_ul_deadline_full_cb, (void*)p_dev_ctx); if(cb_elm){ - LIST_INSERT_HEAD(&p_dev_ctx->sym_cb_list_head[time_diff_nSymb], + LIST_INSERT_HEAD(&p_dev_ctx->sym_cb_list_head[time_diff_nSymb % XRAN_NUM_OF_SYMBOL_PER_SLOT], cb_elm, pointers); } else { print_err("cb_elm is NULL\n"); - res = XRAN_STATUS_FAIL; + //res = XRAN_STATUS_FAIL; + goto err0; + } + + /* 1/4 UL OTA + time_diff_us*/ + cb_elm = xran_create_cb(xran_timer_arm_for_deadline, rx_ul_deadline_one_fourths_cb, (void*)p_dev_ctx); + if(cb_elm){ + LIST_INSERT_HEAD(&p_dev_ctx->sym_cb_list_head[(time_diff_nSymb + 1*(N_SYM_PER_SLOT/4)) % XRAN_NUM_OF_SYMBOL_PER_SLOT], + cb_elm, + pointers); + } else { + print_err("cb_elm is NULL\n"); + //res = XRAN_STATUS_FAIL; goto err0; } /* Half slot UL OTA + time_diff_us*/ cb_elm = xran_create_cb(xran_timer_arm_for_deadline, rx_ul_deadline_half_cb, (void*)p_dev_ctx); if(cb_elm){ - LIST_INSERT_HEAD(&p_dev_ctx->sym_cb_list_head[time_diff_nSymb + N_SYM_PER_SLOT/2], + LIST_INSERT_HEAD(&p_dev_ctx->sym_cb_list_head[(time_diff_nSymb + N_SYM_PER_SLOT/2) % XRAN_NUM_OF_SYMBOL_PER_SLOT], cb_elm, pointers); } else { print_err("cb_elm is NULL\n"); - res = XRAN_STATUS_FAIL; + //res = XRAN_STATUS_FAIL; + goto err0; + } + + /* 3/4 UL OTA + time_diff_us*/ + cb_elm = xran_create_cb(xran_timer_arm_for_deadline, rx_ul_deadline_three_fourths_cb, (void*)p_dev_ctx); + if(cb_elm){ + LIST_INSERT_HEAD(&p_dev_ctx->sym_cb_list_head[(time_diff_nSymb + 4*(N_SYM_PER_SLOT/4)) % XRAN_NUM_OF_SYMBOL_PER_SLOT], + cb_elm, + pointers); + } else { + print_err("cb_elm is NULL\n"); + //res = XRAN_STATUS_FAIL; goto err0; } } else { // APP_O_RU @@ -261,7 +358,7 @@ xran_timing_create_cbs(void *args) p_dev_ctx->sym_up = sym_up = delay_up*1000/(interval_us_local*1000/N_SYM_PER_SLOT)+1; printf("Start UL U-plane %d us after OTA [offset in sym %d]\n", delay_up, sym_up); - /* calcualte when to Receive DL U-plane */ + /* calculate when to Receive DL U-plane */ delay_up = p_dev_ctx->fh_cfg.T2a_max_up; sym_up = delay_up*1000/(interval_us_local*1000/N_SYM_PER_SLOT)+1; printf("Receive DL U-plane %d us after OTA [offset in sym %d]\n", delay_up, sym_up); @@ -269,12 +366,12 @@ xran_timing_create_cbs(void *args) /* Full slot UL OTA + time_diff_us */ cb_elm = xran_create_cb(xran_timer_arm_for_deadline, rx_ul_deadline_full_cb, (void*)p_dev_ctx); if(cb_elm){ - LIST_INSERT_HEAD(&p_dev_ctx->sym_cb_list_head[sym_up], + LIST_INSERT_HEAD(&p_dev_ctx->sym_cb_list_head[sym_up % XRAN_NUM_OF_SYMBOL_PER_SLOT], cb_elm, pointers); } else { print_err("cb_elm is NULL\n"); - res = -1; + //res = -1; goto err0; } @@ -306,12 +403,9 @@ xran_timing_create_cbs(void *args) int32_t xran_timing_destroy_cbs(void *args) { - int res = XRAN_STATUS_SUCCESS; - int32_t do_reset = 0; - uint64_t t1 = 0; - int32_t result1,i,j; + //int res = XRAN_STATUS_SUCCESS; + int32_t j; struct xran_device_ctx * p_dev_ctx = (struct xran_device_ctx *)args; - struct cb_elem_entry * cb_elm = NULL; for (j = 0; j< XRAN_NUM_OF_SYMBOL_PER_SLOT; j++){ struct cb_elem_entry *cb_elm; @@ -623,6 +717,26 @@ xran_reg_physide_cb(void *pHandle, xran_fh_tti_callback_fn Cb, void *cbParam, in return 0; } +int32_t +xran_reg_physide_cb_by_dev_id(void *pHandle, xran_fh_tti_callback_fn Cb, void *cbParam, int skipTtiNum, enum callback_to_phy_id id, uint8_t xran_port_id) +{ + struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx_by_id(xran_port_id); + if (!p_xran_dev_ctx) + { + print_err("Null xRAN context on port id %u!!\n", xran_port_id); + return -1; + } + + if(xran_get_if_state() == XRAN_RUNNING) { + print_err("Cannot register callback while running!!\n"); + return (-1); + } + p_xran_dev_ctx->ttiCb[id] = Cb; + p_xran_dev_ctx->TtiCbParam[id] = cbParam; + p_xran_dev_ctx->SkipTti[id] = skipTtiNum; + + return 0; +} diff --git a/fhi_lib/lib/src/xran_common.c b/fhi_lib/lib/src/xran_common.c index baa673f..dc40ad9 100644 --- a/fhi_lib/lib/src/xran_common.c +++ b/fhi_lib/lib/src/xran_common.c @@ -33,6 +33,8 @@ #include #include #include +#include +#include #include "xran_common.h" #include "ethdi.h" @@ -49,6 +51,8 @@ static struct timespec sleeptime = {.tv_nsec = 1E3 }; /* 1 us */ +extern int32_t first_call; + #define MBUFS_CNT 16 extern int32_t xran_process_rx_sym(void *arg, @@ -150,6 +154,7 @@ int process_mbuf_batch(struct rte_mbuf* pkt_q[], void* handle, int16_t num, stru uint16_t sym_inc[MBUFS_CNT]; uint16_t rb[MBUFS_CNT]; uint16_t sect_id[MBUFS_CNT]; + uint16_t prb_elem_id[MBUFS_CNT] = {0}; uint8_t compMeth[MBUFS_CNT] = { 0 }; uint8_t iqWidth[MBUFS_CNT] = { 0 }; @@ -158,8 +163,6 @@ int process_mbuf_batch(struct rte_mbuf* pkt_q[], void* handle, int16_t num, stru uint32_t pkt_size[MBUFS_CNT]; - void* pHandle = NULL; - int32_t valid_res, res_loc; int expect_comp = (p_dev_ctx->fh_cfg.ru_conf.compMeth != XRAN_COMPMETHOD_NONE); enum xran_comp_hdr_type staticComp = p_dev_ctx->fh_cfg.ru_conf.xranCompHdrType; @@ -191,7 +194,8 @@ int process_mbuf_batch(struct rte_mbuf* pkt_q[], void* handle, int16_t num, stru struct rte_mbuf* mb = NULL; struct xran_prb_map* pRbMap = NULL; struct xran_prb_elm* prbMapElm = NULL; - uint16_t iq_sample_size_bits; + //uint16_t iq_sample_size_bits; + uint16_t idxElm = 0, total_sections = 0; #if XRAN_MLOG_VAR uint32_t mlogVar[10]; @@ -199,7 +203,7 @@ int process_mbuf_batch(struct rte_mbuf* pkt_q[], void* handle, int16_t num, stru #endif if (xran_port < 0) { - print_err("Invalid pHandle - %p", pHandle); + print_err("Invalid pHandle"); return MBUF_FREE; } @@ -208,6 +212,12 @@ int process_mbuf_batch(struct rte_mbuf* pkt_q[], void* handle, int16_t num, stru return MBUF_FREE; } + if(first_call == 0) { + for(i = 0; i < num; i++ ) + ret_data[i] = MBUF_FREE; + return MBUF_FREE; + } + conf = &(p_dev_ctx->eAxc_id_cfg); if (conf == NULL) { rte_panic("conf == NULL"); @@ -362,7 +372,6 @@ int process_mbuf_batch(struct rte_mbuf* pkt_q[], void* handle, int16_t num, stru { compMeth[i] = compMeth_ini; iqWidth[i] = iqWidth_ini; - valid_res = XRAN_STATUS_SUCCESS; frame_id[i] = radio_hdr[i]->frame_id; subframe_id[i] = radio_hdr[i]->sf_slot_sym.subframe_id; @@ -375,6 +384,9 @@ int process_mbuf_batch(struct rte_mbuf* pkt_q[], void* handle, int16_t num, stru rb[i] = data_hdr[i]->fields.rb; sect_id[i] = data_hdr[i]->fields.sect_id; + if (num_prbu[i] == 0) + num_prbu[i] = p_dev_ctx->fh_cfg.nULRBs; + if (expect_comp && (staticComp != XRAN_COMP_HDR_TYPE_STATIC)) { compMeth[i] = data_compr_hdr[i]->ud_comp_hdr.ud_comp_meth; @@ -384,7 +396,6 @@ int process_mbuf_batch(struct rte_mbuf* pkt_q[], void* handle, int16_t num, stru if (CC_ID[i] >= XRAN_MAX_CELLS_PER_PORT || Ant_ID[i] >= max_ant_num || symb_id[i] >= XRAN_NUM_OF_SYMBOL_PER_SLOT) { ptr_seq_id_num_port[CC_ID[i] * max_ant_num + Ant_ID[i]] = seq_id[i]; // for next - valid_res = XRAN_STATUS_FAIL; pCnt->Rx_pkt_dupl++; // print_err("Invalid CC ID - %d or antenna ID or Symbol ID- %d", CC_ID[i], Ant_ID[i], symb_id[i]); } @@ -396,6 +407,19 @@ int process_mbuf_batch(struct rte_mbuf* pkt_q[], void* handle, int16_t num, stru pCnt->rx_counter++; pCnt->Rx_on_time++; pCnt->Total_msgs_rcvd++; + struct xran_prach_cp_config *PrachCfg = NULL; + if(p_dev_ctx->dssEnable){ + tti = frame_id[i] * SLOTS_PER_SYSTEMFRAME(p_dev_ctx->interval_us_local) + + subframe_id[i] * SLOTNUM_PER_SUBFRAME(p_dev_ctx->interval_us_local) + slot_id[i]; + int techSlot = (tti % p_dev_ctx->dssPeriod); + if(p_dev_ctx->technology[techSlot] == 1) + PrachCfg = &(p_dev_ctx->PrachCPConfig); + else + PrachCfg = &(p_dev_ctx->PrachCPConfigLTE); + } + else{ + PrachCfg = &(p_dev_ctx->PrachCPConfig); + } if (Ant_ID[i] >= p_dev_ctx->srs_cfg.eAxC_offset && p_dev_ctx->fh_cfg.srsEnable) { @@ -407,9 +431,9 @@ int process_mbuf_batch(struct rte_mbuf* pkt_q[], void* handle, int16_t num, stru pCnt->rx_srs_packets++; } } - else if (Ant_ID[i] >= p_dev_ctx->PrachCPConfig.eAxC_offset && p_dev_ctx->fh_cfg.prachEnable) + else if (Ant_ID[i] >= PrachCfg->eAxC_offset && p_dev_ctx->fh_cfg.prachEnable) { - Ant_ID[i] -= p_dev_ctx->PrachCPConfig.eAxC_offset; + Ant_ID[i] -= PrachCfg->eAxC_offset; if (last[i] == 1) { prach_idx[num_prach] = i; @@ -440,7 +464,7 @@ int process_mbuf_batch(struct rte_mbuf* pkt_q[], void* handle, int16_t num, stru print_dbg("Completed receiving PRACH symbol %d, size=%d bytes\n", symb_id[i], num_bytes[i]); - int16_t res = xran_process_prach_sym(p_dev_ctx, + xran_process_prach_sym(p_dev_ctx, pkt, iq_samp_buf[i], num_bytes[i], @@ -466,8 +490,8 @@ int process_mbuf_batch(struct rte_mbuf* pkt_q[], void* handle, int16_t num, stru print_dbg("SRS receiving symbol %d, size=%d bytes\n", symb_id[i], symbol_total_bytes[p_dev_ctx->xran_port_id][CC_ID[i]][Ant_ID[i]]); - uint64_t t1 = MLogTick(); - int16_t res = xran_process_srs_sym(p_dev_ctx, + uint64_t t1 = MLogXRANTick(); + xran_process_srs_sym(p_dev_ctx, pkt, iq_samp_buf[i], num_bytes[i], @@ -486,16 +510,16 @@ int process_mbuf_batch(struct rte_mbuf* pkt_q[], void* handle, int16_t num, stru expect_comp, compMeth[i], iqWidth[i]); - MLogTask(PID_PROCESS_UP_PKT_SRS, t1, MLogTick()); + MLogXRANTask(PID_PROCESS_UP_PKT_SRS, t1, MLogXRANTick()); } if (num_pusch == MBUFS_CNT) { for (i = 0; i < MBUFS_CNT; i++) { - iq_sample_size_bits = 16; - if (expect_comp) - iq_sample_size_bits = iqWidth[i]; + //iq_sample_size_bits = 16; + //if (expect_comp) + // iq_sample_size_bits = iqWidth[i]; tti = frame_id[i] * SLOTS_PER_SYSTEMFRAME(p_dev_ctx->interval_us_local) + subframe_id[i] * SLOTNUM_PER_SUBFRAME(p_dev_ctx->interval_us_local) + slot_id[i]; @@ -504,10 +528,28 @@ int process_mbuf_batch(struct rte_mbuf* pkt_q[], void* handle, int16_t num, stru if (pRbMap) { - prbMapElm = &pRbMap->prbMap[sect_id[i]]; - if (sect_id[i] >= pRbMap->nPrbElm) + /** Get the prb_elem_id */ + total_sections=0; + if(pRbMap->prbMap[0].bf_weight.extType == 1) + { + for(idxElm=0 ; idxElm < pRbMap->nPrbElm ; idxElm++) + { + total_sections += pRbMap->prbMap[idxElm].bf_weight.numSetBFWs; + if(total_sections >= (sect_id[i] + 1)) { -// print_err("sect_id %d !=pRbMap->nPrbElm %d\n", sect_id[i], pRbMap->nPrbElm); + prb_elem_id[i] = idxElm; + break; + } + } + } + else + { + prb_elem_id[i] = sect_id[i]; + } + + if (prb_elem_id[i] >= pRbMap->nPrbElm) + { + print_err("sect_id %d, prb_elem_id %d !=pRbMap->nPrbElm %d\n", sect_id[i], prb_elem_id[i], pRbMap->nPrbElm); ret_data[i] = MBUF_FREE; continue; } @@ -528,8 +570,9 @@ int process_mbuf_batch(struct rte_mbuf* pkt_q[], void* handle, int16_t num, stru else { struct xran_section_desc* p_sec_desc = NULL; - prbMapElm = &pRbMap->prbMap[sect_id[i]]; - p_sec_desc = prbMapElm->p_sec_desc[symb_id[i]][0]; + prbMapElm = &pRbMap->prbMap[prb_elem_id[i]]; + int16_t nSecDesc = prbMapElm->nSecDesc[symb_id[i]]; + p_sec_desc = &prbMapElm->sec_desc[symb_id[i]][nSecDesc]; if (p_sec_desc) { @@ -544,6 +587,7 @@ int process_mbuf_batch(struct rte_mbuf* pkt_q[], void* handle, int16_t num, stru p_sec_desc->iq_buffer_len = num_bytes_pusch[i]; p_sec_desc->iq_buffer_offset = iq_offset[i]; ret_data[i] = MBUF_KEEP; + prbMapElm->nSecDesc[symb_id[i]] += 1; } else { @@ -559,9 +603,9 @@ int process_mbuf_batch(struct rte_mbuf* pkt_q[], void* handle, int16_t num, stru { i = pusch_idx[j]; - iq_sample_size_bits = 16; - if (expect_comp) - iq_sample_size_bits = iqWidth[i]; + //iq_sample_size_bits = 16; + //if (expect_comp) + // iq_sample_size_bits = iqWidth[i]; tti = frame_id[i] * SLOTS_PER_SYSTEMFRAME(p_dev_ctx->interval_us_local) + subframe_id[i] * SLOTNUM_PER_SUBFRAME(p_dev_ctx->interval_us_local) + slot_id[i]; @@ -570,10 +614,28 @@ int process_mbuf_batch(struct rte_mbuf* pkt_q[], void* handle, int16_t num, stru if (pRbMap) { - prbMapElm = &pRbMap->prbMap[sect_id[i]]; - if (sect_id[i] >= pRbMap->nPrbElm) + /** Get the prb_elem_id */ + total_sections=0; + if(pRbMap->prbMap[0].bf_weight.extType == 1) + { + for(idxElm=0 ; idxElm < pRbMap->nPrbElm ; idxElm++) + { + total_sections += pRbMap->prbMap[idxElm].bf_weight.numSetBFWs; + if(total_sections >= (sect_id[i] + 1)) + { + prb_elem_id[i] = idxElm; + break; + } + } + } + else + { + prb_elem_id[i] = sect_id[i]; + } + + if (prb_elem_id[i] >= pRbMap->nPrbElm) { -// print_err("sect_id %d !=pRbMap->nPrbElm %d\n", sect_id[i], pRbMap->nPrbElm); + print_err("sect_id %d, prb_elem_id %d !=pRbMap->nPrbElm %d\n", sect_id[i], prb_elem_id[i], pRbMap->nPrbElm); ret_data[i] = MBUF_FREE; continue; } @@ -594,8 +656,9 @@ int process_mbuf_batch(struct rte_mbuf* pkt_q[], void* handle, int16_t num, stru else { struct xran_section_desc* p_sec_desc = NULL; - prbMapElm = &pRbMap->prbMap[sect_id[i]]; - p_sec_desc = prbMapElm->p_sec_desc[symb_id[i]][0]; + prbMapElm = &pRbMap->prbMap[prb_elem_id[i]]; + int16_t nSecDesc = prbMapElm->nSecDesc[symb_id[i]]; + p_sec_desc = &prbMapElm->sec_desc[symb_id[i]][nSecDesc]; if (p_sec_desc) { @@ -610,6 +673,7 @@ int process_mbuf_batch(struct rte_mbuf* pkt_q[], void* handle, int16_t num, stru p_sec_desc->iq_buffer_len = num_bytes_pusch[i]; p_sec_desc->iq_buffer_offset = iq_offset[i]; ret_data[i] = MBUF_KEEP; + prbMapElm->nSecDesc[symb_id[i]] += 1; } else { @@ -625,7 +689,7 @@ int process_mbuf_batch(struct rte_mbuf* pkt_q[], void* handle, int16_t num, stru int process_mbuf(struct rte_mbuf *pkt, void* handle, struct xran_eaxc_info *p_cid) { - uint64_t tt1 = MLogTick(); + uint64_t tt1 = MLogXRANTick(); struct xran_device_ctx *p_dev_ctx = (struct xran_device_ctx *)handle; void *iq_samp_buf; union ecpri_seq_id seq; @@ -650,194 +714,164 @@ process_mbuf(struct rte_mbuf *pkt, void* handle, struct xran_eaxc_info *p_cid) uint8_t compMeth = 0; uint8_t iqWidth = 0; - void *pHandle = NULL; int ret = MBUF_FREE; uint32_t mb_free = 0; int32_t valid_res = 0; int expect_comp = (p_dev_ctx->fh_cfg.ru_conf.compMeth != XRAN_COMPMETHOD_NONE); enum xran_comp_hdr_type staticComp = p_dev_ctx->fh_cfg.ru_conf.xranCompHdrType; + if(first_call == 0) + return ret; + if (staticComp == XRAN_COMP_HDR_TYPE_STATIC) { compMeth = p_dev_ctx->fh_cfg.ru_conf.compMeth; iqWidth = p_dev_ctx->fh_cfg.ru_conf.iqWidth; } - if(p_dev_ctx->xran2phy_mem_ready == 0) + if(p_dev_ctx->xran2phy_mem_ready == 0 || first_call == 0) return MBUF_FREE; - num_bytes = xran_extract_iq_samples(pkt, - &iq_samp_buf, - &CC_ID, - &Ant_ID, - &frame_id, - &subframe_id, - &slot_id, - &symb_id, - &seq, - &num_prbu, - &start_prbu, - &sym_inc, - &rb, - §_id, - expect_comp, - staticComp, - &compMeth, - &iqWidth); - if (num_bytes <= 0){ + num_bytes = xran_extract_iq_samples(pkt, &iq_samp_buf, + &CC_ID, &Ant_ID, &frame_id, &subframe_id, &slot_id, &symb_id, &seq, + &num_prbu, &start_prbu, &sym_inc, &rb, §_id, + expect_comp, staticComp, &compMeth, &iqWidth); + if (num_bytes <= 0) + { print_err("num_bytes is wrong [%d]\n", num_bytes); return MBUF_FREE; } + if (num_prbu == 0) + num_prbu = p_dev_ctx->fh_cfg.nULRBs; - valid_res = xran_pkt_validate(p_dev_ctx, - pkt, - iq_samp_buf, - num_bytes, - CC_ID, - Ant_ID, - frame_id, - subframe_id, - slot_id, - symb_id, - &seq, - num_prbu, - start_prbu, - sym_inc, - rb, - sect_id); -#ifndef FCN_ADAPT - if(valid_res != 0) { - print_dbg("valid_res is wrong [%d] ant %u (%u : %u : %u : %u) seq %u num_bytes %d\n", valid_res, Ant_ID, frame_id, subframe_id, slot_id, symb_id, seq.seq_id, num_bytes); - return MBUF_FREE; - } -#endif - MLogTask(PID_PROCESS_UP_PKT_PARSE, tt1, MLogTick()); - if (Ant_ID >= p_dev_ctx->srs_cfg.eAxC_offset && p_dev_ctx->fh_cfg.srsEnable) { + MLogXRANTask(PID_PROCESS_UP_PKT_PARSE, tt1, MLogXRANTick()); + /* do not validate for NDM SRS */ + if (Ant_ID >= p_dev_ctx->srs_cfg.eAxC_offset && p_dev_ctx->fh_cfg.srsEnable) + { /* SRS packet has ruportid = 2*num_eAxc + ant_id */ Ant_ID -= p_dev_ctx->srs_cfg.eAxC_offset; symbol_total_bytes[p_dev_ctx->xran_port_id][CC_ID][Ant_ID] += num_bytes; - if (seq.bits.e_bit == 1) { + if (seq.bits.e_bit == 1) + { print_dbg("SRS receiving symbol %d, size=%d bytes\n", symb_id, symbol_total_bytes[p_dev_ctx->xran_port_id][CC_ID][Ant_ID]); - if (symbol_total_bytes[p_dev_ctx->xran_port_id][CC_ID][Ant_ID]) { - uint64_t t1 = MLogTick(); + if (symbol_total_bytes[p_dev_ctx->xran_port_id][CC_ID][Ant_ID]) + { + uint64_t t1 = MLogXRANTick(); int16_t res = xran_process_srs_sym(p_dev_ctx, - pkt, - iq_samp_buf, - num_bytes, - CC_ID, - Ant_ID, - frame_id, - subframe_id, - slot_id, - symb_id, - num_prbu, - start_prbu, - sym_inc, - rb, - sect_id, - &mb_free, - expect_comp, - compMeth, - iqWidth); - if(res == symbol_total_bytes[p_dev_ctx->xran_port_id][CC_ID][Ant_ID]) { + pkt, iq_samp_buf, num_bytes, + CC_ID, Ant_ID, frame_id, subframe_id, slot_id, symb_id, + num_prbu, start_prbu, sym_inc, rb, sect_id, + &mb_free, expect_comp, compMeth, iqWidth); + if(res == symbol_total_bytes[p_dev_ctx->xran_port_id][CC_ID][Ant_ID]) ret = mb_free; - } else { + else print_err("res != symbol_total_bytes[p_dev_ctx->xran_port_id][CC_ID][Ant_ID]\n"); - } + pCnt->rx_srs_packets++; - MLogTask(PID_PROCESS_UP_PKT_SRS, t1, MLogTick()); + MLogXRANTask(PID_PROCESS_UP_PKT_SRS, t1, MLogXRANTick()); } symbol_total_bytes[p_dev_ctx->xran_port_id][CC_ID][Ant_ID] = 0; } - else { + else print_dbg("Transport layer fragmentation (eCPRI) is not supported\n"); + } /* if (Ant_ID >= p_dev_ctx->srs_cfg.eAxC_offset && p_dev_ctx->fh_cfg.srsEnable) */ + + else + { + valid_res = xran_pkt_validate(p_dev_ctx, + pkt, iq_samp_buf, num_bytes, + CC_ID, Ant_ID, frame_id, subframe_id, slot_id, symb_id, + &seq, num_prbu, start_prbu, sym_inc, rb, sect_id); +#ifndef FCN_ADAPT + if(valid_res != 0) + { + print_dbg("valid_res is wrong [%d] ant %u (%u : %u : %u : %u) seq %u num_bytes %d\n", valid_res, Ant_ID, frame_id, subframe_id, slot_id, symb_id, seq.bits.seq_id, num_bytes); + return MBUF_FREE; + } +#endif + int tti = 0; + struct xran_prach_cp_config *PrachCfg = NULL; + if(p_dev_ctx->dssEnable){ + tti = frame_id * SLOTS_PER_SYSTEMFRAME(p_dev_ctx->interval_us_local) + + subframe_id * SLOTNUM_PER_SUBFRAME(p_dev_ctx->interval_us_local) + slot_id; + int techSlot = (tti % p_dev_ctx->dssPeriod); + if(p_dev_ctx->technology[techSlot] == 1) + PrachCfg = &(p_dev_ctx->PrachCPConfig); + else + PrachCfg = &(p_dev_ctx->PrachCPConfigLTE); + } + else{ + PrachCfg = &(p_dev_ctx->PrachCPConfig); } - } else if (Ant_ID >= p_dev_ctx->PrachCPConfig.eAxC_offset && p_dev_ctx->fh_cfg.prachEnable) { + if (Ant_ID >= PrachCfg->eAxC_offset && p_dev_ctx->fh_cfg.prachEnable) + { /* PRACH packet has ruportid = num_eAxc + ant_id */ - Ant_ID -= p_dev_ctx->PrachCPConfig.eAxC_offset; + Ant_ID -= PrachCfg->eAxC_offset; symbol_total_bytes[p_dev_ctx->xran_port_id][CC_ID][Ant_ID] += num_bytes; - if (seq.bits.e_bit == 1) { + if (seq.bits.e_bit == 1) + { print_dbg("Completed receiving PRACH symbol %d, size=%d bytes\n", symb_id, num_bytes); - if (symbol_total_bytes[p_dev_ctx->xran_port_id][CC_ID][Ant_ID]) { + if (symbol_total_bytes[p_dev_ctx->xran_port_id][CC_ID][Ant_ID]) + { int16_t res = xran_process_prach_sym(p_dev_ctx, - pkt, - iq_samp_buf, - num_bytes, - CC_ID, - Ant_ID, - frame_id, - subframe_id, - slot_id, - symb_id, - num_prbu, - start_prbu, - sym_inc, - rb, - sect_id, - &mb_free); - if(res == symbol_total_bytes[p_dev_ctx->xran_port_id][CC_ID][Ant_ID]) { + pkt, iq_samp_buf, num_bytes, + CC_ID, Ant_ID, frame_id, subframe_id, slot_id, symb_id, + num_prbu, start_prbu, sym_inc, rb, sect_id, &mb_free); + if(res == symbol_total_bytes[p_dev_ctx->xran_port_id][CC_ID][Ant_ID]) ret = mb_free; - } else { + else print_err("res != symbol_total_bytes[p_dev_ctx->xran_port_id][CC_ID][Ant_ID]\n"); - } + pCnt->rx_prach_packets[Ant_ID]++; } symbol_total_bytes[p_dev_ctx->xran_port_id][CC_ID][Ant_ID] = 0; - } else { + } + else print_dbg("Transport layer fragmentation (eCPRI) is not supported\n"); } - - } else { /* PUSCH */ + else + { + /* PUSCH */ symbol_total_bytes[p_dev_ctx->xran_port_id][CC_ID][Ant_ID] += num_bytes; - if (seq.bits.e_bit == 1) { + if (seq.bits.e_bit == 1) + { print_dbg("Completed receiving symbol %d, size=%d bytes\n", symb_id, symbol_total_bytes[p_dev_ctx->xran_port_id][CC_ID][Ant_ID]); - if (symbol_total_bytes[p_dev_ctx->xran_port_id][CC_ID][Ant_ID]) { - uint64_t t1 = MLogTick(); + if (symbol_total_bytes[p_dev_ctx->xran_port_id][CC_ID][Ant_ID]) + { + uint64_t t1 = MLogXRANTick(); int res = xran_process_rx_sym(p_dev_ctx, - pkt, - iq_samp_buf, - symbol_total_bytes[p_dev_ctx->xran_port_id][CC_ID][Ant_ID], - CC_ID, - Ant_ID, - frame_id, - subframe_id, - slot_id, - symb_id, - num_prbu, - start_prbu, - sym_inc, - rb, - sect_id, - &mb_free, - expect_comp, - compMeth, - iqWidth); - if(res == symbol_total_bytes[p_dev_ctx->xran_port_id][CC_ID][Ant_ID]) { + pkt, iq_samp_buf, symbol_total_bytes[p_dev_ctx->xran_port_id][CC_ID][Ant_ID], + CC_ID, Ant_ID, frame_id, subframe_id, slot_id, symb_id, + num_prbu, start_prbu, sym_inc, rb, sect_id, + &mb_free, expect_comp, compMeth, iqWidth); + if(res == symbol_total_bytes[p_dev_ctx->xran_port_id][CC_ID][Ant_ID]) ret = mb_free; - } else { + else print_err("res != symbol_total_bytes[p_dev_ctx->xran_port_id][CC_ID][Ant_ID]\n"); - } + pCnt->rx_pusch_packets[Ant_ID]++; - MLogTask(PID_PROCESS_UP_PKT, t1, MLogTick()); + MLogXRANTask(PID_PROCESS_UP_PKT, t1, MLogXRANTick()); } symbol_total_bytes[p_dev_ctx->xran_port_id][CC_ID][Ant_ID] = 0; - } else { - print_dbg("Transport layer fragmentation (eCPRI) is not supported\n"); } + else + print_dbg("Transport layer fragmentation (eCPRI) is not supported\n"); } + } /* else */ return ret; } +#if 0 static int set_iq_bit_width(uint8_t iq_bit_width, struct data_section_compression_hdr *compr_hdr) { if (iq_bit_width == MAX_IQ_BIT_WIDTH) @@ -848,10 +882,11 @@ static int set_iq_bit_width(uint8_t iq_bit_width, struct data_section_compressio return 0; } +#endif /* Send a single 5G symbol over multiple packets */ inline int32_t prepare_symbol_ex(enum xran_pkt_dir direction, - uint16_t section_id, + uint16_t section_id_start, struct rte_mbuf *mb, uint8_t *data, uint8_t compMeth, @@ -867,15 +902,17 @@ inline int32_t prepare_symbol_ex(enum xran_pkt_dir direction, uint8_t RU_Port_ID, uint8_t seq_id, uint32_t do_copy, - enum xran_comp_hdr_type staticEn) + enum xran_comp_hdr_type staticEn, + uint16_t num_sections, + uint16_t iq_offset) { - int32_t n_bytes; + int32_t n_bytes , iq_len_aggr = 0; int32_t prep_bytes; - int16_t nPktSize; - uint32_t off; + int16_t nPktSize,idx, nprb_per_section; + uint32_t curr_sect_id; int parm_size; - struct xran_up_pkt_gen_params xp = { 0 }; - + struct xran_up_pkt_gen_params xp[XRAN_MAX_SECTIONS_PER_SLOT] = { 0 }; + bool prbElemBegin , prbElemEnd; iqWidth = (iqWidth==0) ? 16 : iqWidth; switch(compMeth) { @@ -884,60 +921,104 @@ inline int32_t prepare_symbol_ex(enum xran_pkt_dir direction, default: parm_size = 0; } - n_bytes = (3 * iqWidth + parm_size) * prb_num; - n_bytes = RTE_MIN(n_bytes, XRAN_MAX_MBUF_LEN); - nPktSize = sizeof(struct rte_ether_hdr) + nprb_per_section = prb_num/num_sections; + if(prb_num%num_sections) + nprb_per_section++; + + n_bytes = (3 * iqWidth + parm_size)*nprb_per_section; + // n_bytes = RTE_MIN(n_bytes, XRAN_MAX_MBUF_LEN); + + for(idx=0 ; idx < num_sections ; idx++) + { + prbElemBegin = (idx == 0) ? 1 : 0; + prbElemEnd = (idx + 1 == num_sections) ? 1 : 0; + curr_sect_id = section_id_start + idx ; + + iq_len_aggr += n_bytes; + + if(prbElemBegin) + { + nPktSize = sizeof(struct rte_ether_hdr) + sizeof(struct xran_ecpri_hdr) - + sizeof(struct radio_app_common_hdr) - + sizeof(struct data_section_hdr) - + n_bytes; - if ((compMeth != XRAN_COMPMETHOD_NONE)&&(staticEn == XRAN_COMP_HDR_TYPE_DYNAMIC)) - nPktSize += sizeof(struct data_section_compression_hdr); + + sizeof(struct radio_app_common_hdr) ; + } - /* radio app header */ - xp.app_params.data_feature.value = 0x10; - xp.app_params.data_feature.data_direction = direction; - //xp.app_params.payl_ver = 1; - //xp.app_params.filter_id = 0; - xp.app_params.frame_id = frame_id; - xp.app_params.sf_slot_sym.subframe_id = subframe_id; - xp.app_params.sf_slot_sym.slot_id = xran_slotid_convert(slot_id, 0); - xp.app_params.sf_slot_sym.symb_id = symbol_no; + if(prbElemEnd){ + if(((idx+1)*nprb_per_section) > prb_num){ + nprb_per_section = (prb_num - idx*nprb_per_section); + // n_bytes = (3 * iqWidth + parm_size)*(nprb_per_section); + } + } + + nPktSize += sizeof(struct data_section_hdr); + + if ((compMeth != XRAN_COMPMETHOD_NONE)&&(staticEn == XRAN_COMP_HDR_TYPE_DYNAMIC)) + nPktSize += sizeof(struct data_section_compression_hdr); + + nPktSize += n_bytes; + + /** radio app header + * Setting app_params is redundant , its needed only once to create common Radio app header. + */ + xp[idx].app_params.data_feature.value = 0x10; + xp[idx].app_params.data_feature.data_direction = direction; + // xp[idx].app_params.payl_ver = 1; + // xp[idx].app_params.filter_id = 0; + xp[idx].app_params.frame_id = frame_id; + xp[idx].app_params.sf_slot_sym.subframe_id = subframe_id; + xp[idx].app_params.sf_slot_sym.slot_id = xran_slotid_convert(slot_id, 0); + xp[idx].app_params.sf_slot_sym.symb_id = symbol_no; /* convert to network byte order */ - xp.app_params.sf_slot_sym.value = rte_cpu_to_be_16(xp.app_params.sf_slot_sym.value); + xp[idx].app_params.sf_slot_sym.value = rte_cpu_to_be_16(xp[idx].app_params.sf_slot_sym.value); - xp.sec_hdr.fields.all_bits = 0; - xp.sec_hdr.fields.sect_id = section_id; - xp.sec_hdr.fields.num_prbu = (uint8_t)prb_num; - xp.sec_hdr.fields.start_prbu = (uint8_t)prb_start; - //xp.sec_hdr.fields.sym_inc = 0; - //xp.sec_hdr.fields.rb = 0; + // printf("start_prbu = %d, prb_num = %d,num_sections = %d, nprb_per_section = %d,curr_sect_id = %d\n",(prb_start + idx*nprb_per_section),prb_num,num_sections,nprb_per_section,curr_sect_id); + xp[idx].sec_hdr.fields.all_bits = 0; + xp[idx].sec_hdr.fields.sect_id = curr_sect_id; + xp[idx].sec_hdr.fields.num_prbu = XRAN_CONVERT_NUMPRBC(nprb_per_section); //(uint8_t)prb_num; + xp[idx].sec_hdr.fields.start_prbu = prb_start; + xp[idx].sec_hdr.fields.sym_inc = 0; + xp[idx].sec_hdr.fields.rb = 0; /* compression */ - xp.compr_hdr_param.ud_comp_hdr.ud_comp_meth = compMeth; - xp.compr_hdr_param.ud_comp_hdr.ud_iq_width = XRAN_CONVERT_IQWIDTH(iqWidth); - xp.compr_hdr_param.rsrvd = 0; + xp[idx].compr_hdr_param.ud_comp_hdr.ud_comp_meth = compMeth; + xp[idx].compr_hdr_param.ud_comp_hdr.ud_iq_width = XRAN_CONVERT_IQWIDTH(iqWidth); + xp[idx].compr_hdr_param.rsrvd = 0; + prb_start += nprb_per_section; + +#if 0 + printf("\nidx %hu num_prbu %u sect_id %u start_prbu %u sym_inc %u curr_sec_id %u",idx,(uint32_t)xp[idx].sec_hdr.fields.num_prbu, + (uint32_t)xp[idx].sec_hdr.fields.sect_id, + (uint32_t)xp[idx].sec_hdr.fields.start_prbu, + (uint32_t)xp[idx].sec_hdr.fields.sym_inc,curr_sect_id); + +#endif /* network byte order */ - xp.sec_hdr.fields.all_bits = rte_cpu_to_be_32(xp.sec_hdr.fields.all_bits); + xp[idx].sec_hdr.fields.all_bits = rte_cpu_to_be_32(xp[idx].sec_hdr.fields.all_bits); if (mb == NULL){ MLogPrint(NULL); errx(1, "out of mbufs after %d packets", 1); } + } /* for(idx=0 ; idx < num_sections ; idx++) */ + + //printf("\niq_len_aggr %u",iq_len_aggr); prep_bytes = xran_prepare_iq_symbol_portion(mb, data, iq_buf_byte_order, - n_bytes, - &xp, + iq_len_aggr, + xp, CC_ID, RU_Port_ID, seq_id, staticEn, - do_copy); + do_copy, + num_sections, + section_id_start, + iq_offset); if (prep_bytes <= 0) errx(1, "failed preparing symbol"); @@ -974,7 +1055,122 @@ int32_t prepare_sf_slot_sym (enum xran_pkt_dir direction, return 0; } +int send_symbol_mult_section_ex(void *handle, + enum xran_pkt_dir direction, + uint16_t section_id, + struct rte_mbuf *mb, uint8_t *data, + uint8_t compMeth, uint8_t iqWidth, + const enum xran_input_byte_order iq_buf_byte_order, + uint8_t frame_id, uint8_t subframe_id, + uint8_t slot_id, uint8_t symbol_no, + int prb_start, int prb_num, + uint8_t CC_ID, uint8_t RU_Port_ID, uint8_t seq_id) +{ + uint32_t do_copy = 0; + int32_t n_bytes; + int hdr_len, parm_size; + int32_t sent=0; + uint32_t loop = 0; + struct xran_device_ctx *p_dev_ctx = (struct xran_device_ctx *)handle; + struct xran_common_counters *pCnt = &p_dev_ctx->fh_counters; + enum xran_comp_hdr_type staticEn= XRAN_COMP_HDR_TYPE_DYNAMIC; + + if (p_dev_ctx != NULL) + { + staticEn = p_dev_ctx->fh_cfg.ru_conf.xranCompHdrType; + + hdr_len = sizeof(struct xran_ecpri_hdr) + + sizeof(struct radio_app_common_hdr) + + sizeof(struct data_section_hdr); + if ((compMeth != XRAN_COMPMETHOD_NONE)&&(staticEn == XRAN_COMP_HDR_TYPE_DYNAMIC)) + hdr_len += sizeof(struct data_section_compression_hdr); + + switch(compMeth) { + case XRAN_COMPMETHOD_BLKFLOAT: parm_size = 1; break; + case XRAN_COMPMETHOD_MODULATION: parm_size = 0; break; + default: + parm_size = 0; + } + int prb_num_pre_sec = (prb_num+2)/3; + int prb_offset = 0; + int data_offset = 0; + int prb_num_sec; + rte_iova_t ext_buff_iova = 0; + + struct rte_mbuf *send_mb; + char *p_sec_iq = NULL; + char *ext_buff = NULL; + uint16_t ext_buff_len = 0; + struct rte_mbuf_ext_shared_info * p_share_data = NULL; + struct rte_mbuf *eth_oran_hdr = NULL; + struct rte_mbuf *tmp = NULL; + for (loop = 0; loop < 3;loop++) + { + seq_id = xran_get_upul_seqid(handle, CC_ID, RU_Port_ID); + + prb_num_sec = ((loop+1)*prb_num_pre_sec > prb_num) ? (prb_num - loop*prb_num_pre_sec) : prb_num_pre_sec; + n_bytes = (3 * iqWidth + parm_size) * prb_num_sec; + char * pChar = NULL; + + send_mb = xran_ethdi_mbuf_alloc(); /* will be freede by ETH */ + if(send_mb == NULL) { + MLogPrint(NULL); + errx(1, "out of mbufs after %d packets", 1); + } + + pChar = rte_pktmbuf_append(send_mb, hdr_len + n_bytes); + if(pChar == NULL) { + MLogPrint(NULL); + errx(1, "incorrect mbuf size %d packets", 1); + } + pChar = rte_pktmbuf_prepend(send_mb, sizeof(struct rte_ether_hdr)); + if(pChar == NULL) { + MLogPrint(NULL); + errx(1, "incorrect mbuf size %d packets", 1); + } + do_copy = 1; /* new mbuf hence copy of IQs */ + pChar = rte_pktmbuf_mtod(send_mb, char*); + char *pdata_start = (pChar + sizeof(struct rte_ether_hdr) + hdr_len); + memcpy(pdata_start,data + data_offset,n_bytes); + + + sent = prepare_symbol_ex(direction, + section_id, + send_mb, + data + data_offset, + compMeth, + iqWidth, + iq_buf_byte_order, + frame_id, + subframe_id, + slot_id, + symbol_no, + prb_start+prb_offset, + prb_num_sec, + CC_ID, + RU_Port_ID, + seq_id, + do_copy, + staticEn, + 1, + 0); /*Send a single section */ + prb_offset += prb_num_sec; + data_offset += n_bytes; + if(sent) { + pCnt->tx_counter++; + pCnt->tx_bytes_counter += rte_pktmbuf_pkt_len(send_mb); + p_dev_ctx->send_upmbuf2ring(send_mb, ETHER_TYPE_ECPRI, xran_map_ecpriPcid_to_vf(p_dev_ctx, direction, CC_ID, RU_Port_ID)); + } + + } + +#ifdef DEBUG + printf("Symbol %2d sent (%d packets, %d bytes)\n", symbol_no, i, n_bytes); +#endif + } + return sent; +} /* Send a single 5G symbol over multiple packets */ @@ -1034,6 +1230,14 @@ int send_symbol_ex(void *handle, errx(1, "incorrect mbuf size %d packets", 1); } do_copy = 1; /* new mbuf hence copy of IQs */ + + /**copy prach data start**/ + pChar = rte_pktmbuf_mtod(mb, char*); + char *pdata_start = (pChar + sizeof(struct rte_ether_hdr) + hdr_len); + memcpy(pdata_start,data,n_bytes); + /**copy prach data end**/ + + } else { rte_pktmbuf_refcnt_update(mb, 1); /* make sure eth won't free our mbuf */ @@ -1056,7 +1260,9 @@ int send_symbol_ex(void *handle, RU_Port_ID, seq_id, do_copy, - staticEn); + staticEn, + 1, + 0); /*Send a single section */ if(sent){ pCnt->tx_counter++; @@ -1092,7 +1298,7 @@ int send_cpmsg(void *pHandle, struct rte_mbuf *mbuf,struct xran_cp_gen_params *p for(i=0; iinterval_us_local))%XRAN_MAX_SECTIONDB_CTX, - §_geninfo[i].info); + sect_geninfo[i].info); return (ret); } @@ -1116,25 +1322,25 @@ int generate_cpmsg_dlul(void *pHandle, struct xran_cp_gen_params *params, struct params->hdr.compMeth = comp_method; nsection = 0; - sect_geninfo[nsection].info.type = params->sectionType; // for database - sect_geninfo[nsection].info.startSymId = params->hdr.startSymId; // for database - sect_geninfo[nsection].info.iqWidth = params->hdr.iqWidth; // for database - sect_geninfo[nsection].info.compMeth = params->hdr.compMeth; // for database - sect_geninfo[nsection].info.id = xran_alloc_sectionid(pHandle, dir, cc_id, ru_port_id, slot_id); - sect_geninfo[nsection].info.rb = XRAN_RBIND_EVERY; - sect_geninfo[nsection].info.symInc = symInc; - sect_geninfo[nsection].info.startPrbc = prb_start; - sect_geninfo[nsection].info.numPrbc = prb_num; - sect_geninfo[nsection].info.numSymbol = numsym; - sect_geninfo[nsection].info.reMask = 0xfff; - sect_geninfo[nsection].info.beamId = beam_id; + sect_geninfo[nsection].info->type = params->sectionType; // for database + sect_geninfo[nsection].info->startSymId = params->hdr.startSymId; // for database + sect_geninfo[nsection].info->iqWidth = params->hdr.iqWidth; // for database + sect_geninfo[nsection].info->compMeth = params->hdr.compMeth; // for database + sect_geninfo[nsection].info->id = xran_alloc_sectionid(pHandle, dir, cc_id, ru_port_id, subframe_id, slot_id); + sect_geninfo[nsection].info->rb = XRAN_RBIND_EVERY; + sect_geninfo[nsection].info->symInc = symInc; + sect_geninfo[nsection].info->startPrbc = prb_start; + sect_geninfo[nsection].info->numPrbc = prb_num; + sect_geninfo[nsection].info->numSymbol = numsym; + sect_geninfo[nsection].info->reMask = 0xfff; + sect_geninfo[nsection].info->beamId = beam_id; for (loc_sym = 0; loc_sym < XRAN_NUM_OF_SYMBOL_PER_SLOT; loc_sym++) { - sect_geninfo[0].info.sec_desc[loc_sym].iq_buffer_offset = iq_buffer_offset; - sect_geninfo[0].info.sec_desc[loc_sym].iq_buffer_len = iq_buffer_len; + sect_geninfo[0].info->sec_desc[loc_sym].iq_buffer_offset = iq_buffer_offset; + sect_geninfo[0].info->sec_desc[loc_sym].iq_buffer_len = iq_buffer_len; } - sect_geninfo[nsection].info.ef = 0; + sect_geninfo[nsection].info->ef = 0; sect_geninfo[nsection].exDataSize = 0; // sect_geninfo[nsection].exData = NULL; nsection++; @@ -1147,7 +1353,7 @@ int generate_cpmsg_dlul(void *pHandle, struct xran_cp_gen_params *params, struct return (-1); } - ret = xran_prepare_ctrl_pkt(mbuf, params, cc_id, ru_port_id, seq_id); + ret = xran_prepare_ctrl_pkt(mbuf, params, cc_id, ru_port_id, seq_id,0); if(ret < 0){ print_err("Fail to build control plane packet - [%d:%d:%d] dir=%d\n", frame_id, subframe_id, slot_id, dir); @@ -1158,11 +1364,25 @@ int generate_cpmsg_dlul(void *pHandle, struct xran_cp_gen_params *params, struct } int generate_cpmsg_prach(void *pHandle, struct xran_cp_gen_params *params, struct xran_section_gen_info *sect_geninfo, struct rte_mbuf *mbuf, struct xran_device_ctx *pxran_lib_ctx, - uint8_t frame_id, uint8_t subframe_id, uint8_t slot_id, + uint8_t frame_id, uint8_t subframe_id, uint8_t slot_id, int tti, uint16_t beam_id, uint8_t cc_id, uint8_t prach_port_id, uint16_t occasionid, uint8_t seq_id) { int nsection, ret; - struct xran_prach_cp_config *pPrachCPConfig = &(pxran_lib_ctx->PrachCPConfig); + struct xran_prach_cp_config *pPrachCPConfig = NULL;; + int i=0; + if(pxran_lib_ctx->dssEnable){ + i = tti % pxran_lib_ctx->dssPeriod; + if(pxran_lib_ctx->technology[i]==1) { + pPrachCPConfig = &(pxran_lib_ctx->PrachCPConfig); + } + else + { + pPrachCPConfig = &(pxran_lib_ctx->PrachCPConfigLTE); + } + } + else + pPrachCPConfig = &(pxran_lib_ctx->PrachCPConfig); + uint16_t timeOffset; uint16_t nNumerology = pxran_lib_ctx->fh_cfg.frame_conf.nNumerology; uint8_t startSymId; @@ -1188,9 +1408,17 @@ int generate_cpmsg_prach(void *pHandle, struct xran_cp_gen_params *params, struc { timeOffset += startSymId * (2048 + 144); } + + if(XRAN_FILTERINDEX_PRACH_ABC == pPrachCPConfig->filterIdx) + { timeOffset = timeOffset >> nNumerology; //original number is Tc, convert to Ts based on mu if ((slot_id == 0) || (slot_id == (SLOTNUM_PER_SUBFRAME(pxran_lib_ctx->interval_us_local) >> 1))) timeOffset += 16; + } + else + { + //when prach scs lower than 15khz, timeOffset base 15khz not need to adjust. + } params->dir = XRAN_DIR_UL; params->sectionType = XRAN_CP_SECTIONTYPE_3; @@ -1204,27 +1432,52 @@ int generate_cpmsg_prach(void *pHandle, struct xran_cp_gen_params *params, struc /* use timeOffset field for the CP length value for prach sequence */ params->hdr.timeOffset = timeOffset; params->hdr.fftSize = xran_get_conf_fftsize(pHandle); + /*convert to o-ran ecpri specs scs index*/ + switch(pPrachCPConfig->filterIdx) + { + case XRAN_FILTERINDEX_PRACH_012: + params->hdr.scs = 12; + break; + case XRAN_FILTERINDEX_NPRACH: + params->hdr.scs = 13; + break; + case XRAN_FILTERINDEX_PRACH_3: + params->hdr.scs = 14; + break; + case XRAN_FILTERINDEX_LTE4: + params->hdr.scs = 15; + break; + case XRAN_FILTERINDEX_PRACH_ABC: params->hdr.scs = xran_get_conf_prach_scs(pHandle); + break; + default: + print_err("prach filterIdx error - [%d:%d:%d]--%d\n", frame_id, subframe_id, slot_id,pPrachCPConfig->filterIdx); + params->hdr.scs = 0; + break; + } params->hdr.cpLength = 0; nsection = 0; - sect_geninfo[nsection].info.type = params->sectionType; // for database - sect_geninfo[nsection].info.startSymId = params->hdr.startSymId; // for database - sect_geninfo[nsection].info.iqWidth = params->hdr.iqWidth; // for database - sect_geninfo[nsection].info.compMeth = params->hdr.compMeth; // for database - sect_geninfo[nsection].info.id = xran_alloc_sectionid(pHandle, XRAN_DIR_UL, cc_id, prach_port_id, slot_id); - sect_geninfo[nsection].info.rb = XRAN_RBIND_EVERY; - sect_geninfo[nsection].info.symInc = XRAN_SYMBOLNUMBER_NOTINC; - sect_geninfo[nsection].info.startPrbc = pPrachCPConfig->startPrbc; - sect_geninfo[nsection].info.numPrbc = pPrachCPConfig->numPrbc, - sect_geninfo[nsection].info.numSymbol = pPrachCPConfig->numSymbol; - sect_geninfo[nsection].info.reMask = 0xfff; - sect_geninfo[nsection].info.beamId = beam_id; - sect_geninfo[nsection].info.freqOffset = pPrachCPConfig->freqOffset; + sect_geninfo[nsection].info->type = params->sectionType; // for database + sect_geninfo[nsection].info->startSymId = params->hdr.startSymId; // for database + sect_geninfo[nsection].info->iqWidth = params->hdr.iqWidth; // for database + sect_geninfo[nsection].info->compMeth = params->hdr.compMeth; // for database + sect_geninfo[nsection].info->id = xran_alloc_sectionid(pHandle, XRAN_DIR_UL, cc_id, prach_port_id, subframe_id, slot_id); + sect_geninfo[nsection].info->rb = XRAN_RBIND_EVERY; + sect_geninfo[nsection].info->symInc = XRAN_SYMBOLNUMBER_NOTINC; + sect_geninfo[nsection].info->startPrbc = pPrachCPConfig->startPrbc; + sect_geninfo[nsection].info->numPrbc = pPrachCPConfig->numPrbc, + sect_geninfo[nsection].info->numSymbol = pPrachCPConfig->numSymbol; + sect_geninfo[nsection].info->reMask = 0xfff; + sect_geninfo[nsection].info->beamId = beam_id; + sect_geninfo[nsection].info->freqOffset = pPrachCPConfig->freqOffset; + sect_geninfo[nsection].info->prbElemBegin = 1; + sect_geninfo[nsection].info->prbElemEnd = 1; + pxran_lib_ctx->prach_last_symbol[cc_id] = pPrachCPConfig->startSymId + pPrachCPConfig->numSymbol*pPrachCPConfig->occassionsInPrachSlot - 1; - sect_geninfo[nsection].info.ef = 0; + sect_geninfo[nsection].info->ef = 0; sect_geninfo[nsection].exDataSize = 0; // sect_geninfo[nsection].exData = NULL; nsection++; @@ -1232,7 +1485,7 @@ int generate_cpmsg_prach(void *pHandle, struct xran_cp_gen_params *params, struc params->numSections = nsection; params->sections = sect_geninfo; - ret = xran_prepare_ctrl_pkt(mbuf, params, cc_id, prach_port_id, seq_id); + ret = xran_prepare_ctrl_pkt(mbuf, params, cc_id, prach_port_id, seq_id,0); if(ret < 0){ print_err("Fail to build prach control packet - [%d:%d:%d]\n", frame_id, subframe_id, slot_id); rte_pktmbuf_free(mbuf); @@ -1246,9 +1499,8 @@ int process_ring(struct rte_ring *r, uint16_t ring_id, uint16_t q_id) assert(r); struct rte_mbuf *mbufs[MBUFS_CNT]; - int i; uint32_t remaining; - uint64_t t1; + //uint64_t t1; const uint16_t dequeued = rte_ring_dequeue_burst(r, (void **)mbufs, RTE_DIM(mbufs), &remaining); @@ -1274,22 +1526,22 @@ int32_t ring_processing_func(void* args) rte_timer_manage(); if (ctx->bbdev_dec) { - t1 = MLogTick(); + t1 = MLogXRANTick(); retPoll = ctx->bbdev_dec(); if (retPoll == 1) { - t2 = MLogTick(); - MLogTask(PID_XRAN_BBDEV_UL_POLL + retPoll, t1, t2); + t2 = MLogXRANTick(); + MLogXRANTask(PID_XRAN_BBDEV_UL_POLL + retPoll, t1, t2); } } if (ctx->bbdev_enc) { - t1 = MLogTick(); + t1 = MLogXRANTick(); retPoll = ctx->bbdev_enc(); if (retPoll == 1) { - t2 = MLogTick(); - MLogTask(PID_XRAN_BBDEV_DL_POLL + retPoll, t1, t2); + t2 = MLogXRANTick(); + MLogXRANTask(PID_XRAN_BBDEV_DL_POLL + retPoll, t1, t2); } } @@ -1333,8 +1585,8 @@ xran_generic_worker_thread(void *args) break; } - if (XRAN_STOPPED == xran_if_current_state) - return -1; + if (XRAN_STOPPED == xran_if_current_state) + return -1; if(p_io_cfg->io_sleep) nanosleep(&sleeptime,NULL); @@ -1370,4 +1622,3 @@ int ring_processing_thread(void *args) puts("Pkt processing thread finished."); return 0; } - diff --git a/fhi_lib/lib/src/xran_common.h b/fhi_lib/lib/src/xran_common.h index 3ed75cd..04076fd 100644 --- a/fhi_lib/lib/src/xran_common.h +++ b/fhi_lib/lib/src/xran_common.h @@ -146,6 +146,24 @@ int xran_process_delmeas_rem_request_w_fup(struct rte_mbuf *pkt, void* handle, s int xran_process_delmeas_follow_up(struct rte_mbuf *pkt, void* handle, struct xran_ecpri_del_meas_pkt*, uint16_t port_id); void xran_initialize_ecpri_del_meas_port(struct xran_ecpri_del_meas_cmn* pCmn, struct xran_ecpri_del_meas_port* pPort,uint16_t full_init); +int send_symbol_mult_section_ex(void* handle, + enum xran_pkt_dir direction, + uint16_t section_id, + struct rte_mbuf *mb, + uint8_t *data, + uint8_t compMeth, + uint8_t iqWidth, + const enum xran_input_byte_order iq_buf_byte_order, + uint8_t frame_id, + uint8_t subframe_id, + uint8_t slot_id, + uint8_t symbol_no, + int prb_start, + int prb_num, + uint8_t CC_ID, + uint8_t RU_Port_ID, + uint8_t seq_id); + int send_symbol_ex(void* handle, enum xran_pkt_dir direction, uint16_t section_id, @@ -181,8 +199,10 @@ int32_t prepare_symbol_ex(enum xran_pkt_dir direction, uint8_t RU_Port_ID, uint8_t seq_id, uint32_t do_copy, - enum xran_comp_hdr_type staticEn); -inline int32_t prepare_sf_slot_sym (enum xran_pkt_dir direction, + enum xran_comp_hdr_type staticEn, + uint16_t num_sections, + uint16_t iq_buffer_offset); +int32_t prepare_sf_slot_sym (enum xran_pkt_dir direction, uint8_t frame_id, uint8_t subframe_id, uint8_t slot_id, @@ -215,16 +235,16 @@ int32_t generate_cpmsg_dlul(void *pHandle, struct xran_cp_gen_params *params, st uint16_t beam_id, uint8_t cc_id, uint8_t ru_port_id, uint8_t comp_method, uint8_t iqWidth, uint8_t seq_id, uint8_t symInc); int generate_cpmsg_prach(void *pHandle, struct xran_cp_gen_params *params, struct xran_section_gen_info *sect_geninfo, struct rte_mbuf *mbuf, struct xran_device_ctx *pxran_lib_ctx, - uint8_t frame_id, uint8_t subframe_id, uint8_t slot_id, + uint8_t frame_id, uint8_t subframe_id, uint8_t slot_id, int tti, uint16_t beam_id, uint8_t cc_id, uint8_t prach_port_id, uint16_t occasionid, uint8_t seq_id); struct xran_eaxcid_config *xran_get_conf_eAxC(void *pHandle); int xran_register_cb_mbuf2ring(xran_ethdi_mbuf_send_fn mbuf_send_cp, xran_ethdi_mbuf_send_fn mbuf_send_up); -uint16_t xran_alloc_sectionid(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ant_id, uint8_t slot_id); +//uint16_t xran_alloc_sectionid(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ant_id, uint8_t slot_id); uint8_t xran_get_seqid(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ant_id, uint8_t slot_id); int32_t ring_processing_func(void* arg); -int xran_init_prach(struct xran_fh_config* pConf, struct xran_device_ctx * p_xran_dev_ctx); +int xran_init_prach(struct xran_fh_config* pConf, struct xran_device_ctx * p_xran_dev_ctx, enum xran_ran_tech xran_tech); void xran_updateSfnSecStart(void); uint32_t xran_slotid_convert(uint16_t slot_id, uint16_t dir); diff --git a/fhi_lib/lib/src/xran_cp_api.c b/fhi_lib/lib/src/xran_cp_api.c index 02ba81c..4498b33 100644 --- a/fhi_lib/lib/src/xran_cp_api.c +++ b/fhi_lib/lib/src/xran_cp_api.c @@ -37,7 +37,7 @@ #include "xran_compression.h" #include "xran_dev.h" -PSECTION_DB_TYPE p_sectiondb[XRAN_PORTS_NUM] = {NULL, NULL, NULL, NULL}; +PSECTION_DB_TYPE p_sectiondb[XRAN_PORTS_NUM] = {NULL, NULL, NULL, NULL,NULL, NULL, NULL, NULL}; static const uint8_t zeropad[XRAN_SECTIONEXT_ALIGN] = { 0, 0, 0, 0 }; static const uint8_t bitmask[] = { 0x00, 0x03, 0x07, 0x0f, 0x1f, 0x3f, 0x7f, 0xff }; @@ -280,6 +280,39 @@ xran_cp_add_section_info(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t rupo return (XRAN_STATUS_SUCCESS); } + +struct xran_section_info * +xran_cp_get_section_info_ptr(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ruport_id, uint8_t ctx_id) +{ + struct xran_sectioninfo_db *ptr; + struct xran_section_info *list; + + ptr = xran_get_section_db(pHandle, dir, cc_id, ruport_id, ctx_id); + if(unlikely(ptr == NULL)) { + return NULL; + } + + if(unlikely(ptr->cur_index >= XRAN_MAX_NUM_SECTIONS)) { + print_err("No more space to add section information!"); + return NULL; + } + + list = xran_get_section_info(ptr, ptr->cur_index); + if (list) + { + ptr->cur_index++; + return list; + } + else + { + print_err("Null list in section db\n!"); + return NULL; + } + +} + + + int32_t xran_cp_add_multisection_info(void *pHandle, uint8_t cc_id, uint8_t ruport_id, uint8_t ctx_id, struct xran_cp_gen_params *gen_info) { @@ -305,7 +338,7 @@ xran_cp_add_multisection_info(void *pHandle, uint8_t cc_id, uint8_t ruport_id, u if (list) { for(i=0; isections[i].info, sizeof(struct xran_section_info)); + memcpy(&list[i], gen_info->sections[i].info, sizeof(struct xran_section_info)); ptr->cur_index++; } } @@ -343,26 +376,17 @@ xran_cp_add_multisection_info(void *pHandle, uint8_t cc_id, uint8_t ruport_id, u struct xran_section_info * xran_cp_find_section_info(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ruport_id, uint8_t ctx_id, uint16_t section_id) { - int32_t index, num_index; struct xran_sectioninfo_db *ptr; ptr = xran_get_section_db(pHandle, dir, cc_id, ruport_id, ctx_id); if(unlikely(ptr == NULL)) return (NULL); - if(ptr->cur_index > XRAN_MAX_NUM_SECTIONS) - num_index = XRAN_MAX_NUM_SECTIONS; - else - num_index = ptr->cur_index; - - for(index=0; index < num_index; index++) { - if(ptr->list[index].id == section_id) { - return (xran_get_section_info(ptr, index)); + if(section_id > ptr->cur_index || section_id < 0) + { + print_err("No section ID in the list - %d, ptr->cur_index is %d", section_id, ptr->cur_index); } - } - - print_dbg("No section ID in the list - %d", section_id); - return (NULL); + return (xran_get_section_info(ptr, section_id)); } /** @@ -431,7 +455,6 @@ xran_cp_iterate_section_info(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t int32_t xran_cp_getsize_section_info(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ruport_id, uint8_t ctx_id) { - int32_t index; struct xran_sectioninfo_db *ptr; ptr = xran_get_section_db(pHandle, dir, cc_id, ruport_id, ctx_id); @@ -478,22 +501,23 @@ xran_cp_reset_section_info(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ru int32_t xran_cp_populate_section_ext_1(int8_t *p_ext1_dst, /**< destination buffer */ uint16_t ext1_dst_len, /**< dest buffer size */ int16_t *p_bfw_iq_src, /**< source buffer of IQs */ - uint16_t rbNum, /* number RBs to ext1 chain */ - uint16_t bfwNumPerRb, /* number of bf weights per RB (i.e. antenna elements) */ - uint8_t bfwiqWidth, /* bit size of IQs */ - uint8_t bfwCompMeth) /* compression method */ + struct xran_prb_elm *p_pRbMapElm) { struct xran_cp_radioapp_section_ext1 *p_ext1; - uint8_t *p_bfw_content = NULL; int32_t parm_size = 0; int32_t bfw_iq_bits = 0; int32_t total_len = 0; - int32_t comp_len = 0; - uint8_t ext_flag = XRAN_EF_F_ANOTHER_ONE; - int16_t idxRb = 0; + uint16_t idxSection = 0; + int32_t section_len = 0; + int16_t numCPSections = (p_pRbMapElm->bf_weight.numSetBFWs == 0 ? 1 : p_pRbMapElm->bf_weight.numSetBFWs); + int16_t cur_ext_len = 0; int8_t *p_ext1_dst_cur = NULL; + int16_t bfwNumPerRb = p_pRbMapElm->bf_weight.nAntElmTRx; + uint8_t bfwiqWidth = p_pRbMapElm->bf_weight.bfwIqWidth; + uint8_t bfwCompMeth = p_pRbMapElm->bf_weight.bfwCompMeth; + struct xran_cp_radioapp_section1 *p_section1; struct xranlib_compress_request bfp_com_req; struct xranlib_compress_response bfp_com_rsp; @@ -509,16 +533,27 @@ int32_t xran_cp_populate_section_ext_1(int8_t *p_ext1_dst, /**< destination else return (XRAN_STATUS_INVALID_PARAM); - /* create extType=1 section for each RB */ - for (idxRb = 0; idxRb < rbNum; idxRb++) { - print_dbg("%s RB %d\n", __FUNCTION__, idxRb); + /* create section for each PRB bundle */ + for (idxSection = 0; idxSection < numCPSections ; idxSection++) { + print_dbg("%s Section %d\n", __FUNCTION__, idxSection); if(total_len >= ext1_dst_len){ print_err("p_ext1_dst overflow\n"); - return -1; + return XRAN_STATUS_RESOURCE; + } + + cur_ext_len = 0; + p_section1 = (struct xran_cp_radioapp_section1 *)p_ext1_dst_cur; + if(p_section1 == NULL) { + print_err("p_section is null!\n"); + return (XRAN_STATUS_INVALID_PARAM); } - cur_ext_len = 0; /** populate one extType=1 section with BFW for 1 RB */ + section_len = sizeof(struct xran_cp_radioapp_section1); + + p_ext1_dst_cur = p_ext1_dst_cur + section_len; + total_len += section_len; + parm_size = sizeof(struct xran_cp_radioapp_section_ext1); p_ext1 = (struct xran_cp_radioapp_section_ext1 *)p_ext1_dst_cur; if(p_ext1 == NULL) { @@ -528,11 +563,8 @@ int32_t xran_cp_populate_section_ext_1(int8_t *p_ext1_dst, /**< destination cur_ext_len += parm_size; - if(idxRb+1 == rbNum) - ext_flag = XRAN_EF_F_LAST; - p_ext1->extType = XRAN_CP_SECTIONEXTCMD_1; - p_ext1->ef = ext_flag; + p_ext1->ef = XRAN_EF_F_LAST; //only one ext-1 per CP section p_ext1->bfwCompMeth = bfwCompMeth; p_ext1->bfwIqWidth = XRAN_CONVERT_BFWIQWIDTH(bfwiqWidth); @@ -552,7 +584,7 @@ int32_t xran_cp_populate_section_ext_1(int8_t *p_ext1_dst, /**< destination print_dbg("req 0x%08p iqWidth %d\n",bfp_com_req.data_in, bfp_com_req.iqWidth); - parm_size = 1; /* exponent as part of bfwCompParam 1 octet */ + parm_size = 1; /* (reserved + exponent) as part of bfwCompParam 1 octet */ break; case XRAN_BFWCOMPMETHOD_BLKSCALE: rte_panic("XRAN_BFWCOMPMETHOD_BLKSCALE"); @@ -585,13 +617,13 @@ int32_t xran_cp_populate_section_ext_1(int8_t *p_ext1_dst, /**< destination parm_size++; print_dbg("copy BF W %p -> %p size %d \n", p_bfw_iq_src, p_bfw_content, parm_size); - if (p_ext1->bfwIqWidth == 0 || p_ext1->bfwIqWidth == 16){ + + if (p_ext1->bfwCompMeth == XRAN_BFWCOMPMETHOD_NONE){ //5.4.7.1.1 memcpy(p_bfw_content, p_bfw_iq_src, parm_size); } else { bfp_com_rsp.data_out = (int8_t*)p_bfw_content; if(xranlib_compress_bfw(&bfp_com_req, &bfp_com_rsp) == 0){ - comp_len = bfp_com_rsp.len; - print_dbg("comp_len %d parm_size %d\n", comp_len, parm_size); + print_dbg("comp_len %d parm_size %d\n", bfp_com_rsp.len, parm_size); } else { print_err("compression failed\n"); return (XRAN_STATUS_FAIL); @@ -604,8 +636,8 @@ int32_t xran_cp_populate_section_ext_1(int8_t *p_ext1_dst, /**< destination parm_size = cur_ext_len % XRAN_SECTIONEXT_ALIGN; if(parm_size) { parm_size = XRAN_SECTIONEXT_ALIGN - parm_size; - p_bfw_content = (uint8_t *)(p_bfw_content + parm_size); memcpy(p_bfw_content, zeropad, RTE_MIN(parm_size, sizeof(zeropad))); + p_bfw_content += parm_size; cur_ext_len += parm_size; print_dbg("zeropad %d cur_ext_len %d\n", parm_size, cur_ext_len); } @@ -614,14 +646,14 @@ int32_t xran_cp_populate_section_ext_1(int8_t *p_ext1_dst, /**< destination rte_panic("ext1 should be aligned on 4-bytes boundary"); p_ext1->extLen = cur_ext_len / XRAN_SECTIONEXT_ALIGN; - print_dbg("[%d] %p iq %p p_ext1->extLen %d\n",idxRb, p_ext1, p_ext1+1, p_ext1->extLen); + print_dbg("%p iq %p p_ext1->extLen %d\n",p_ext1, p_ext1+1, p_ext1->extLen); /* update for next RB */ p_ext1_dst_cur += cur_ext_len; p_bfw_iq_src = p_bfw_iq_src + bfwNumPerRb*2; total_len += cur_ext_len; - } + } /*for(idxSection < numCPSections */ print_dbg("total_len %d\n", total_len); return (total_len); @@ -886,6 +918,30 @@ xran_prepare_sectionext_4(struct rte_mbuf *mbuf, struct xran_sectionext4_info *p return (parm_size); } +static int32_t +xran_prepare_sectionext_9(struct rte_mbuf *mbuf, struct xran_sectionext9_info * params, int32_t last_flag) +{ + struct xran_cp_radioapp_section_ext9 *ext9; + int32_t parm_size; + + parm_size = sizeof(struct xran_cp_radioapp_section_ext9); + ext9 = (struct xran_cp_radioapp_section_ext9 *)rte_pktmbuf_append(mbuf, parm_size); + if(ext9 == NULL) { + print_err("Fail to allocate the space for section extension 9"); + return(XRAN_STATUS_RESOURCE); + } + + ext9->extType = XRAN_CP_SECTIONEXTCMD_9; + ext9->ef = last_flag; + ext9->extLen = parm_size / XRAN_SECTIONEXT_ALIGN; + ext9->technology = params->technology; + ext9->reserved = params->reserved; + + *(uint32_t *)ext9 = rte_cpu_to_be_32(*(uint32_t*)ext9); + + return (parm_size); +} + static int32_t xran_prepare_sectionext_5(struct rte_mbuf *mbuf, struct xran_sectionext5_info *params, int32_t last_flag) { @@ -1100,7 +1156,7 @@ xran_cp_estimate_max_set_bfws(uint8_t numBFWs, uint8_t iqWidth, uint8_t compMeth /* Exclude headers can be present */ avail_len = mtu - ( RTE_PKTMBUF_HEADROOM \ + sizeof(struct xran_ecpri_hdr) \ - + sizeof(struct xran_cp_radioapp_common_header) \ + + sizeof(struct xran_cp_radioapp_section1_header) \ + sizeof(struct xran_cp_radioapp_section1) \ + sizeof(union xran_cp_radioapp_section_ext6) \ + sizeof(union xran_cp_radioapp_section_ext10) ); @@ -1134,7 +1190,7 @@ xran_cp_get_hdroffset_section1(uint32_t exthdr_size) hdr_len = ( RTE_PKTMBUF_HEADROOM \ + sizeof(struct xran_ecpri_hdr) \ - + sizeof(struct xran_cp_radioapp_common_header) \ + + sizeof(struct xran_cp_radioapp_section1_header) \ + sizeof(struct xran_cp_radioapp_section1) \ + exthdr_size ); return (hdr_len); @@ -1200,7 +1256,7 @@ int32_t xran_cp_prepare_ext11_bfws(uint8_t numSetBFW, uint8_t numBFW, hdr_offset = xran_cp_get_hdroffset_section1(sizeof(union xran_cp_radioapp_section_ext11)); /* Copy BFWs to destination buffer */ - ptr = dst + hdr_offset + 2; + ptr = dst + hdr_offset; switch(compMeth) { /* No compression */ case XRAN_BFWCOMPMETHOD_NONE: @@ -1364,7 +1420,7 @@ xran_prepare_sectionext_11(struct rte_mbuf *mbuf, */ int32_t xran_append_section_extensions(struct rte_mbuf *mbuf, struct xran_section_gen_info *params) { - int32_t i, ret; + int32_t i; uint32_t totalen; int32_t last_flag; int32_t ext_size; @@ -1376,13 +1432,10 @@ int32_t xran_append_section_extensions(struct rte_mbuf *mbuf, struct xran_sectio totalen = 0; - ret = XRAN_STATUS_SUCCESS; - print_dbg("params->exDataSize %d\n", params->exDataSize); for(i=0; i < params->exDataSize; i++) { if(params->exData[i].data == NULL) { print_err("Invalid parameter - extension data %d is NULL", i); - ret = XRAN_STATUS_INVALID_PARAM; continue; } @@ -1407,6 +1460,9 @@ int32_t xran_append_section_extensions(struct rte_mbuf *mbuf, struct xran_sectio case XRAN_CP_SECTIONEXTCMD_6: ext_size = xran_prepare_sectionext_6(mbuf, params->exData[i].data, last_flag); break; + case XRAN_CP_SECTIONEXTCMD_9: + ext_size = xran_prepare_sectionext_9(mbuf, params->exData[i].data, last_flag); + break; case XRAN_CP_SECTIONEXTCMD_10: ext_size = xran_prepare_sectionext_10(mbuf, params->exData[i].data, last_flag); break; @@ -1415,7 +1471,6 @@ int32_t xran_append_section_extensions(struct rte_mbuf *mbuf, struct xran_sectio break; default: print_err("Extension Type %d is not supported!", params->exData[i].type); - ret = XRAN_STATUS_INVALID_PARAM; ext_size = 0; } @@ -1445,20 +1500,20 @@ static int32_t xran_prepare_section0(struct xran_cp_radioapp_section0 *section, struct xran_section_gen_info *params) { #if (XRAN_STRICT_PARM_CHECK) - if(unlikely(params->info.numSymbol > XRAN_SYMBOLNUMBER_MAX)) { - print_err("Invalid number of Symbols - %d", params->info.numSymbol); + if(unlikely(params->info->numSymbol > XRAN_SYMBOLNUMBER_MAX)) { + print_err("Invalid number of Symbols - %d", params->info->numSymbol); return (XRAN_STATUS_INVALID_PARAM); } #endif - section->hdr.u1.common.sectionId = params->info.id; - section->hdr.u1.common.rb = params->info.rb; - section->hdr.u1.common.symInc = params->info.symInc; - section->hdr.u1.common.startPrbc = params->info.startPrbc; - section->hdr.u1.common.numPrbc = XRAN_CONVERT_NUMPRBC(params->info.numPrbc); + section->hdr.u1.common.sectionId = params->info->id; + section->hdr.u1.common.rb = params->info->rb; + section->hdr.u1.common.symInc = params->info->symInc; + section->hdr.u1.common.startPrbc = params->info->startPrbc; + section->hdr.u1.common.numPrbc = XRAN_CONVERT_NUMPRBC(params->info->numPrbc); - section->hdr.u.s0.reMask = params->info.reMask; - section->hdr.u.s0.numSymbol = params->info.numSymbol; + section->hdr.u.s0.reMask = params->info->reMask; + section->hdr.u.s0.numSymbol = params->info->numSymbol; section->hdr.u.s0.reserved = 0; // for network byte order @@ -1507,32 +1562,32 @@ xran_prepare_section1(struct xran_cp_radioapp_section1 *section, struct xran_section_gen_info *params) { #if (XRAN_STRICT_PARM_CHECK) - if(unlikely(params->info.numSymbol > XRAN_SYMBOLNUMBER_MAX)) { - print_err("Invalid number of Symbols - %d", params->info.numSymbol); + if(unlikely(params->info->numSymbol > XRAN_SYMBOLNUMBER_MAX)) { + print_err("Invalid number of Symbols - %d", params->info->numSymbol); return (XRAN_STATUS_INVALID_PARAM); } #endif - /*section->hdr.u1.common.sectionId = params->info.id; - section->hdr.u1.common.rb = params->info.rb; - section->hdr.u1.common.symInc = params->info.symInc; - section->hdr.u1.common.startPrbc = params->info.startPrbc; - section->hdr.u1.common.numPrbc = XRAN_CONVERT_NUMPRBC(params->info.numPrbc); - - section->hdr.u.s1.reMask = params->info.reMask; - section->hdr.u.s1.numSymbol = params->info.numSymbol; - section->hdr.u.s1.beamId = params->info.beamId; - section->hdr.u.s1.ef = params->info.ef;*/ - - section->hdr.u.first_4byte = (params->info.reMask << xran_cp_radioapp_sec_hdr_sc_ReMask) - | (params->info.numSymbol << xran_cp_radioapp_sec_hdr_sc_NumSym) - | (params->info.ef << xran_cp_radioapp_sec_hdr_sc_Ef) - | (params->info.beamId << xran_cp_radioapp_sec_hdr_sc_BeamID); - section->hdr.u1.second_4byte = (params->info.id << xran_cp_radioapp_sec_hdr_c_SecId) - | (params->info.rb << xran_cp_radioapp_sec_hdr_c_RB) - | (params->info.symInc << xran_cp_radioapp_sec_hdr_c_SymInc) - | (params->info.startPrbc << xran_cp_radioapp_sec_hdr_c_StartPrbc) - | ((XRAN_CONVERT_NUMPRBC(params->info.numPrbc)) << xran_cp_radioapp_sec_hdr_c_NumPrbc); + /*section->hdr.u1.common.sectionId = params->info->id; + section->hdr.u1.common.rb = params->info->rb; + section->hdr.u1.common.symInc = params->info->symInc; + section->hdr.u1.common.startPrbc = params->info->startPrbc; + section->hdr.u1.common.numPrbc = XRAN_CONVERT_NUMPRBC(params->info->numPrbc); + + section->hdr.u.s1.reMask = params->info->reMask; + section->hdr.u.s1.numSymbol = params->info->numSymbol; + section->hdr.u.s1.beamId = params->info->beamId; + section->hdr.u.s1.ef = params->info->ef;*/ + + section->hdr.u.first_4byte = (params->info->reMask << xran_cp_radioapp_sec_hdr_sc_ReMask) + | (params->info->numSymbol << xran_cp_radioapp_sec_hdr_sc_NumSym) + | (params->info->ef << xran_cp_radioapp_sec_hdr_sc_Ef) + | (params->info->beamId << xran_cp_radioapp_sec_hdr_sc_BeamID); + section->hdr.u1.second_4byte = (params->info->id << xran_cp_radioapp_sec_hdr_c_SecId) + | (params->info->rb << xran_cp_radioapp_sec_hdr_c_RB) + | (params->info->symInc << xran_cp_radioapp_sec_hdr_c_SymInc) + | (params->info->startPrbc << xran_cp_radioapp_sec_hdr_c_StartPrbc) + | ((XRAN_CONVERT_NUMPRBC(params->info->numPrbc)) << xran_cp_radioapp_sec_hdr_c_NumPrbc); // for network byte order *((uint64_t *)section) = rte_cpu_to_be_64(*((uint64_t *)section)); @@ -1578,34 +1633,34 @@ xran_prepare_section3(struct xran_cp_radioapp_section3 *section, struct xran_section_gen_info *params) { #if (XRAN_STRICT_PARM_CHECK) - if(unlikely(params->info.numSymbol > XRAN_SYMBOLNUMBER_MAX)) { - print_err("Invalid number of Symbols - %d", params->info.numSymbol); + if(unlikely(params->info->numSymbol > XRAN_SYMBOLNUMBER_MAX)) { + print_err("Invalid number of Symbols - %d", params->info->numSymbol); return (XRAN_STATUS_INVALID_PARAM); } #endif - /*section->hdr.u1.common.sectionId = params->info.id; - section->hdr.u1.common.rb = params->info.rb; - section->hdr.u1.common.symInc = params->info.symInc; - section->hdr.u1.common.startPrbc = params->info.startPrbc; - section->hdr.u1.common.numPrbc = XRAN_CONVERT_NUMPRBC(params->info.numPrbc); - - section->hdr.u.s3.reMask = params->info.reMask; - section->hdr.u.s3.numSymbol = params->info.numSymbol; - section->hdr.u.s3.beamId = params->info.beamId; - section->hdr.u.s3.ef = params->info.ef;*/ - - section->hdr.u.first_4byte = (params->info.reMask << xran_cp_radioapp_sec_hdr_sc_ReMask) - | (params->info.numSymbol << xran_cp_radioapp_sec_hdr_sc_NumSym) - | (params->info.ef << xran_cp_radioapp_sec_hdr_sc_Ef) - | (params->info.beamId << xran_cp_radioapp_sec_hdr_sc_BeamID); - section->hdr.u1.second_4byte = (params->info.id << xran_cp_radioapp_sec_hdr_c_SecId) - | (params->info.rb << xran_cp_radioapp_sec_hdr_c_RB) - | (params->info.symInc << xran_cp_radioapp_sec_hdr_c_SymInc) - | (params->info.startPrbc << xran_cp_radioapp_sec_hdr_c_StartPrbc) - | ((XRAN_CONVERT_NUMPRBC(params->info.numPrbc)) << xran_cp_radioapp_sec_hdr_c_NumPrbc); - - section->freqOffset = rte_cpu_to_be_32(params->info.freqOffset)>>8; + /*section->hdr.u1.common.sectionId = params->info->id; + section->hdr.u1.common.rb = params->info->rb; + section->hdr.u1.common.symInc = params->info->symInc; + section->hdr.u1.common.startPrbc = params->info->startPrbc; + section->hdr.u1.common.numPrbc = XRAN_CONVERT_NUMPRBC(params->info->numPrbc); + + section->hdr.u.s3.reMask = params->info->reMask; + section->hdr.u.s3.numSymbol = params->info->numSymbol; + section->hdr.u.s3.beamId = params->info->beamId; + section->hdr.u.s3.ef = params->info->ef;*/ + + section->hdr.u.first_4byte = (params->info->reMask << xran_cp_radioapp_sec_hdr_sc_ReMask) + | (params->info->numSymbol << xran_cp_radioapp_sec_hdr_sc_NumSym) + | (params->info->ef << xran_cp_radioapp_sec_hdr_sc_Ef) + | (params->info->beamId << xran_cp_radioapp_sec_hdr_sc_BeamID); + section->hdr.u1.second_4byte = (params->info->id << xran_cp_radioapp_sec_hdr_c_SecId) + | (params->info->rb << xran_cp_radioapp_sec_hdr_c_RB) + | (params->info->symInc << xran_cp_radioapp_sec_hdr_c_SymInc) + | (params->info->startPrbc << xran_cp_radioapp_sec_hdr_c_StartPrbc) + | ((XRAN_CONVERT_NUMPRBC(params->info->numPrbc)) << xran_cp_radioapp_sec_hdr_c_NumPrbc); + + section->freqOffset = rte_cpu_to_be_32(params->info->freqOffset)>>8; section->reserved = 0; /* for network byte order (header, 8 bytes) */ @@ -1652,9 +1707,9 @@ xran_prepare_section3_hdr(struct xran_cp_radioapp_section3_header *s3hdr, * XRAN_STATUS_RESOURCE if failed to allocate the space to packet buffer */ int32_t -xran_append_control_section(struct rte_mbuf *mbuf, struct xran_cp_gen_params *params) +xran_append_control_section(struct rte_mbuf *mbuf, struct xran_cp_gen_params *params,uint16_t start_sect_id) { - int32_t i, ret, ext_flag; + int32_t i, ret; uint32_t totalen; void *section; int32_t section_size; @@ -1692,13 +1747,13 @@ xran_append_control_section(struct rte_mbuf *mbuf, struct xran_cp_gen_params *pa return (XRAN_STATUS_INVALID_PARAM); } - for(i=0; i < params->numSections; i++) { + for(i=start_sect_id; i < (start_sect_id + params->numSections); i++) { section = rte_pktmbuf_append(mbuf, section_size); if(section == NULL) { print_err("Fail to allocate the space for section[%d]!", i); return (XRAN_STATUS_RESOURCE); } - print_dbg("%s %d ef %d\n", __FUNCTION__, i, params->sections[i].info.ef); + print_dbg("%s %d ef %d\n", __FUNCTION__, i, params->sections[i].info->ef); ret = xran_prepare_section_func((void *)section, (void *)¶ms->sections[i]); if(ret < 0){ @@ -1707,8 +1762,8 @@ xran_append_control_section(struct rte_mbuf *mbuf, struct xran_cp_gen_params *pa } totalen += section_size; - if(params->sections[i].info.ef) { - print_dbg("sections[%d].info.ef %d exDataSize %d type %d\n", i, params->sections[i].info.ef, + if(params->sections[i].info->ef) { + print_dbg("sections[%d].info.ef %d exDataSize %d type %d\n", i, params->sections[i].info->ef, params->sections[i].exDataSize, params->sections[i].exData[0].type); ret = xran_append_section_extensions(mbuf, ¶ms->sections[i]); if(ret < 0) @@ -1878,7 +1933,8 @@ int32_t xran_prepare_ctrl_pkt(struct rte_mbuf *mbuf, struct xran_cp_gen_params *params, uint8_t CC_ID, uint8_t Ant_ID, - uint8_t seq_id) + uint8_t seq_id, + uint16_t start_sect_id) { int32_t ret; uint32_t payloadlen; @@ -1893,7 +1949,7 @@ xran_prepare_ctrl_pkt(struct rte_mbuf *mbuf, } payloadlen += ret; - ret = xran_append_control_section(mbuf, params); + ret = xran_append_control_section(mbuf, params,start_sect_id); if(ret < 0) { print_err("%s %d\n", __FUNCTION__, ret); return (ret); @@ -1915,7 +1971,7 @@ xran_parse_section_ext1(void *ext, struct xran_sectionext1_info *extinfo) int32_t total_len; struct xran_cp_radioapp_section_ext1 *ext1; uint8_t *data; - int32_t parm_size, iq_size; + int32_t parm_size = 0, iq_size, iq_size_bytes; int32_t N; void *pHandle; @@ -1934,6 +1990,7 @@ xran_parse_section_ext1(void *ext, struct xran_sectionext1_info *extinfo) len += sizeof(struct xran_cp_radioapp_section_ext1); data += sizeof(struct xran_cp_radioapp_section_ext1); + extinfo->p_bfwIQ = (int8_t*)(data); switch(ext1->bfwCompMeth) { case XRAN_BFWCOMPMETHOD_NONE: @@ -1967,14 +2024,16 @@ xran_parse_section_ext1(void *ext, struct xran_sectionext1_info *extinfo) len += parm_size; data += parm_size; + iq_size_bytes = parm_size; /* Get BF weights */ iq_size = N * extinfo->bfwIqWidth * 2; // total in bits parm_size = iq_size>>3; // total in bytes (/8) if(iq_size%8) parm_size++; // round up + iq_size_bytes += parm_size; //memcpy(data, extinfo->p_bfwIQ, parm_size); - extinfo->p_bfwIQ = (int16_t*)data; + extinfo->bfwIQ_sz = iq_size_bytes; len += parm_size; @@ -1983,7 +2042,7 @@ xran_parse_section_ext1(void *ext, struct xran_sectionext1_info *extinfo) len += (XRAN_SECTIONEXT_ALIGN - parm_size); if(len != total_len) { - // TODO: fix this print_err("The size of extension 1 is not correct! [%d:%d]", len, total_len); + print_err("The size of extension 1 is not correct! [%d:%d]", len, total_len); } return (total_len); @@ -2165,7 +2224,6 @@ int32_t xran_parse_section_ext5(void *ext, struct xran_sectionext5_info *extinfo) { - int32_t len; struct xran_cp_radioapp_section_ext_hdr *ext_hdr; struct xran_cp_radioapp_section_ext5 ext5; int32_t parm_size; @@ -2186,7 +2244,6 @@ xran_parse_section_ext5(void *ext, parm_size = XRAN_MAX_MODCOMP_ADDPARMS; } - len = 0; data = (uint8_t *)(ext_hdr + 1); i = 0; @@ -2248,6 +2305,46 @@ xran_parse_section_ext6(void *ext, return (total_len); } +int32_t +xran_parse_section_ext9(void *ext, + struct xran_sectionext9_info *extinfo, struct xran_cp_recv_params *result) +{ + int32_t len = 0; + int32_t total_len; + int8_t dssSlot = 0; + int8_t presumed_technology = -1; + struct xran_cp_radioapp_section_ext9 *ext9; + + ext9 = (struct xran_cp_radioapp_section_ext9 *)ext; + *(uint32_t *)ext9 = rte_be_to_cpu_32(*(uint32_t *)ext9); + + total_len = ext9->extLen * XRAN_SECTIONEXT_ALIGN; + + if(result) { + dssSlot = result->tti % result->dssPeriod; + presumed_technology = result->technology_arr[dssSlot]; + } else { + print_err("\nTechnology verification parameters not received"); + // return (-1); + } + + if(presumed_technology != ext9->technology) { + print_err("\nWrong technology recieved! [%d,%d]", presumed_technology, ext9->technology); + // return (-1); + } + + extinfo->technology = ext9->technology; + extinfo->reserved = ext9->reserved; + + len += sizeof(struct xran_cp_radioapp_section_ext9); + if(len != total_len) { + print_err("\nThe size of extension 9 is not correct! [%d:%d]", len, total_len); + } + + return (total_len); +} + + int32_t xran_parse_section_ext10(void *ext, struct xran_sectionext10_info *extinfo) @@ -2376,7 +2473,7 @@ xran_parse_section_ext11(void *ext, len += (XRAN_SECTIONEXT_ALIGN - parm_size); if(len != total_len) { - print_err("The size of extension 11 is not correct! [%d:%d]", len, total_len); + //print_err("The size of extension 11 is not correct! [%d:%d]", len, total_len); } return (total_len); @@ -2384,9 +2481,10 @@ xran_parse_section_ext11(void *ext, int32_t xran_parse_section_extension(struct rte_mbuf *mbuf, - void *ext, - struct xran_section_recv_info *section) + void *ext, struct xran_cp_recv_params *result, + int32_t section_idx) { + struct xran_section_recv_info *section = &result->sections[section_idx]; int32_t total_len, len, numext; uint8_t *ptr; int32_t flag_last; @@ -2408,6 +2506,7 @@ xran_parse_section_extension(struct rte_mbuf *mbuf, section->exts[numext].type = ext_type; switch(ext_type) { case XRAN_CP_SECTIONEXTCMD_1: + result->ext1count++; len = xran_parse_section_ext1(ptr, §ion->exts[numext].u.ext1); break; case XRAN_CP_SECTIONEXTCMD_2: @@ -2425,6 +2524,9 @@ xran_parse_section_extension(struct rte_mbuf *mbuf, case XRAN_CP_SECTIONEXTCMD_6: len = xran_parse_section_ext6(ptr, §ion->exts[numext].u.ext6); break; + case XRAN_CP_SECTIONEXTCMD_9: + len = xran_parse_section_ext9(ptr, §ion->exts[numext].u.ext9, result); + break; case XRAN_CP_SECTIONEXTCMD_10: len = xran_parse_section_ext10(ptr, §ion->exts[numext].u.ext10); break; @@ -2471,21 +2573,35 @@ xran_parse_section_extension(struct rte_mbuf *mbuf, int32_t xran_parse_cp_pkt(struct rte_mbuf *mbuf, struct xran_cp_recv_params *result, - struct xran_recv_packet_info *pkt_info) + struct xran_recv_packet_info *pkt_info, void* handle, uint32_t *mb_free) { struct xran_ecpri_hdr *ecpri_hdr; struct xran_cp_radioapp_common_header *apphdr; - int32_t i, ret; - int32_t extlen; - + struct xran_common_counters* pCnt = NULL; + struct xran_prb_map *pRbMap = NULL; + struct xran_prb_map *pRbMap_desc = NULL; + struct xran_prb_elm * prbMapElm = NULL; + struct rte_mbuf *mb = NULL; + int32_t i, j, ret, extlen; + int tti = 0,interval = 0; + uint8_t idx = 0, ctx_id = 0; + struct xran_device_ctx * p_dev_ctx = NULL; + struct xran_device_ctx * p_xran_dev_ctx = (struct xran_device_ctx *)handle; + if(unlikely(p_xran_dev_ctx == NULL)){ + print_err("p_xran_dev_ctx is NULL\n"); + return XRAN_STATUS_INVALID_PARAM; + } + p_dev_ctx = xran_dev_get_ctx(); ret = xran_parse_ecpri_hdr(mbuf, &ecpri_hdr, pkt_info); + struct xran_eaxc_info eaxc = pkt_info->eaxc; + struct xran_section_info *info = NULL; if(ret < 0 && ecpri_hdr == NULL) return (XRAN_STATUS_INVALID_PACKET); /* Process radio header. */ apphdr = (void *)rte_pktmbuf_adj(mbuf, sizeof(struct xran_ecpri_hdr)); - if(apphdr == NULL) { - print_err("Invalid packet - radio app hedaer!"); + if(unlikely(apphdr == NULL)) { + print_err("Invalid packet - radio app header!"); return (XRAN_STATUS_INVALID_PACKET); } @@ -2504,7 +2620,12 @@ xran_parse_cp_pkt(struct rte_mbuf *mbuf, result->hdr.startSymId = apphdr->field.startSymbolId; result->sectionType = apphdr->sectionType; result->numSections = apphdr->numOfSections; + result->ext1count = 0; + interval = p_xran_dev_ctx->interval_us_local; + tti = apphdr->field.frameId * SLOTS_PER_SYSTEMFRAME(interval) + apphdr->field.subframeId * SLOTNUM_PER_SUBFRAME(interval) + apphdr->field.slotId; + result->tti = tti; + ctx_id = tti % XRAN_MAX_SECTIONDB_CTX; #if 0 printf("[CP%5d] eAxC[%d:%d:%02d:%02d] %s seq[%03d-%03d-%d] sec[%d-%d] frame[%3d-%2d-%2d] sym%02d\n", pkt_info->payload_len, @@ -2573,7 +2694,7 @@ xran_parse_cp_pkt(struct rte_mbuf *mbuf, result->hdr.compMeth = hdr->udComp.udCompMeth; section = (void *)rte_pktmbuf_adj(mbuf, sizeof(struct xran_cp_radioapp_section1_header)); - if(section == NULL) { + if(unlikely(section == NULL)) { print_err("Invalid packet: section type1 - radio app hedaer!"); return (XRAN_STATUS_INVALID_PACKET); } @@ -2594,20 +2715,96 @@ xran_parse_cp_pkt(struct rte_mbuf *mbuf, section = (void *)rte_pktmbuf_adj(mbuf, sizeof(struct xran_cp_radioapp_section1)); - if(section == NULL) { + if(unlikely(section == NULL)) { print_err("Invalid packet: section type1 - number of section [%d:%d]!", result->numSections, i); result->numSections = i; ret = XRAN_STATUS_INVALID_PACKET; break; } + if (eaxc.ruPortId < p_xran_dev_ctx->srs_cfg.eAxC_offset) + { + struct xran_flat_buffer *pBuffer = NULL; + if(result->dir == 1) + pBuffer = p_xran_dev_ctx->sFHCpRxPrbMapBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][eaxc.ccId][eaxc.ruPortId].sBufferList.pBuffers; + else if(result->dir == 0) + pBuffer = p_xran_dev_ctx->sFHCpTxPrbMapBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][eaxc.ccId][eaxc.ruPortId].sBufferList.pBuffers; + if(pBuffer) + pRbMap = (struct xran_prb_map *)pBuffer->pData; + if(p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][eaxc.ccId][eaxc.ruPortId].sBufferList.pBuffers) + pRbMap_desc = (struct xran_prb_map *) p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][eaxc.ccId][eaxc.ruPortId].sBufferList.pBuffers->pData; + + if(i == 0){ + if((pRbMap_desc != NULL) && (pRbMap_desc->nPrbElm <= p_xran_dev_ctx->sectiondb_elm[ctx_id][result->dir][eaxc.ccId][eaxc.ruPortId])){ + p_xran_dev_ctx->sectiondb_elm[ctx_id][result->dir][eaxc.ccId][eaxc.ruPortId]=0; + xran_cp_reset_section_info(handle, result->dir, eaxc.ccId, eaxc.ruPortId, ctx_id); + } + idx = p_xran_dev_ctx->sectiondb_elm[ctx_id][result->dir][eaxc.ccId][eaxc.ruPortId]++; + + if(p_dev_ctx){ + result->numSetBFW = p_dev_ctx->numSetBFWs_arr[idx]; + if(likely(pRbMap!=NULL)){ + prbMapElm = &pRbMap->prbMap[idx]; + mb = prbMapElm->bf_weight.p_ext_start; + if(mb){ + rte_pktmbuf_free(mb); + } + prbMapElm->bf_weight.p_ext_start = mbuf; + prbMapElm->bf_weight.p_ext_section = (void *)section; + *mb_free = MBUF_KEEP; + } + } + } + info = xran_cp_get_section_info_ptr(handle, result->dir, eaxc.ccId, eaxc.ruPortId, ctx_id); + if(likely(info != NULL)) + { + info->prbElemBegin = (i == 0 ) ? 1 : 0; + info->prbElemEnd = (i == (result->numSections -1)) ? 1 : 0; + info->ef = result->sections[i].info.ef; + info->startPrbc = result->sections[i].info.startPrbc; + info->numPrbc = result->sections[i].info.numPrbc; + info->type = result->sections[i].info.type; + info->startSymId = result->hdr.startSymId; + info->iqWidth = result->hdr.iqWidth; + info->compMeth = result->hdr.compMeth; + info->id = result->sections[i].info.id; + info->rb = XRAN_RBIND_EVERY; + info->numSymbol = result->sections[i].info.numSymbol; + info->reMask = 0xfff; + info->beamId = result->sections[i].info.beamId; + info->symInc = XRAN_SYMBOLNUMBER_NOTINC; + + int loc_sym=0; + if(likely(pRbMap_desc != NULL)){ + prbMapElm = &pRbMap_desc->prbMap[idx]; + for(loc_sym = 0; loc_sym < XRAN_NUM_OF_SYMBOL_PER_SLOT; loc_sym++) + { + struct xran_section_desc *p_sec_desc = &prbMapElm->sec_desc[loc_sym][0]; + + if(likely(p_sec_desc!=NULL)) + { + info->sec_desc[loc_sym].iq_buffer_offset = p_sec_desc->iq_buffer_offset; + info->sec_desc[loc_sym].iq_buffer_len = p_sec_desc->iq_buffer_len; + + p_sec_desc->section_id = info->id; + } + else + { + print_err("section desc is NULL\n"); + } + } /* for(loc_sym = 0; loc_sym < XRAN_NUM_OF_SYMBOL_PER_SLOT; loc_sym++) */ + } + } if(result->sections[i].info.ef) { - // parse section extension - extlen = xran_parse_section_extension(mbuf, (void *)section, &result->sections[i]); + result->dssPeriod = p_xran_dev_ctx->dssPeriod; + for( j=0; j< p_xran_dev_ctx->dssPeriod; j++) { + result->technology_arr[j] = p_xran_dev_ctx->technology[j]; + } + extlen = xran_parse_section_extension(mbuf, (void *)section, result, i); if(extlen > 0) { section = (void *)rte_pktmbuf_adj(mbuf, extlen); - if(section == NULL) { + if(unlikely(section == NULL)) { print_err("Invalid packet: section type1 - section extension [%d]!", i); ret = XRAN_STATUS_INVALID_PACKET; break; @@ -2616,6 +2813,67 @@ xran_parse_cp_pkt(struct rte_mbuf *mbuf, } else extlen = 0; } + else if((eaxc.ruPortId >= p_xran_dev_ctx->srs_cfg.eAxC_offset) && p_xran_dev_ctx->fh_cfg.srsEnable){ + int32_t ant_id = ((eaxc.ruPortId - p_xran_dev_ctx->srs_cfg.eAxC_offset) & 0x3F); /*Klocwork fix*/ + if(p_xran_dev_ctx->sFHSrsRxPrbMapBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][eaxc.ccId][ant_id].sBufferList.pBuffers){ + pRbMap_desc = (struct xran_prb_map *) p_xran_dev_ctx->sFHSrsRxPrbMapBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][eaxc.ccId][ant_id].sBufferList.pBuffers->pData; + } + if(i == 0){ + if((pRbMap_desc != NULL) && (pRbMap_desc->nPrbElm <= p_xran_dev_ctx->sectiondb_elm[ctx_id][result->dir][eaxc.ccId][eaxc.ruPortId])){ + p_xran_dev_ctx->sectiondb_elm[ctx_id][result->dir][eaxc.ccId][eaxc.ruPortId]=0; + xran_cp_reset_section_info(handle, result->dir, eaxc.ccId, eaxc.ruPortId, ctx_id); + } + idx = p_xran_dev_ctx->sectiondb_elm[ctx_id][result->dir][eaxc.ccId][eaxc.ruPortId]++; + } + info = xran_cp_get_section_info_ptr(handle, result->dir, eaxc.ccId, eaxc.ruPortId, ctx_id); + if(likely(info != NULL)) + { + info->prbElemBegin = (i == 0 ) ? 1 : 0; + info->prbElemEnd = (i == (result->numSections -1)) ? 1 : 0; + info->ef = result->sections[i].info.ef; + info->type = result->sections[i].info.type; + info->startSymId = result->hdr.startSymId; + info->iqWidth = result->hdr.iqWidth; + info->compMeth = result->hdr.compMeth; + info->id = result->sections[i].info.id; + info->rb = XRAN_RBIND_EVERY; + info->numSymbol = result->sections[i].info.numSymbol; + info->reMask = 0xfff; + info->beamId = result->sections[i].info.beamId; + info->symInc = XRAN_SYMBOLNUMBER_NOTINC; + int loc_sym=0; + if(likely(pRbMap_desc != NULL)){ + prbMapElm = &pRbMap_desc->prbMap[idx]; + info->startPrbc = prbMapElm->nRBStart; + info->numPrbc = prbMapElm->nRBSize; + + struct xran_section_desc *p_sec_desc = NULL; + for(loc_sym = 0; loc_sym < XRAN_NUM_OF_SYMBOL_PER_SLOT; loc_sym++) + { + p_sec_desc = &prbMapElm->sec_desc[loc_sym][0]; + + if(likely(p_sec_desc!=NULL)) + { + info->sec_desc[loc_sym].iq_buffer_offset = p_sec_desc->iq_buffer_offset; + info->sec_desc[loc_sym].iq_buffer_len = p_sec_desc->iq_buffer_len; + p_sec_desc->section_id = info->id; + } + else + { + print_err("section desc is NULL\n"); + } + } /* for(loc_sym = 0; loc_sym < XRAN_NUM_OF_SYMBOL_PER_SLOT; loc_sym++) */ + } + } + /*Assuming SRS CP will not have extension, removed the ef flag check and extension processing*/ + } + } + pCnt = &p_xran_dev_ctx->fh_counters; + /* SRS should not have extension */ + if(pCnt && (result->sections[0].info.ef) && (result->sections[0].exts[0].type == 1) && (result->numSections != result->numSetBFW) && (result->ext1count != result->numSetBFW)){ + print_err("extension 1 is not Valid! [%d:%d:%d]", result->numSections, result->numSetBFW, result->ext1count); + pCnt->rx_invalid_ext1_packets++; + } } break; @@ -2670,7 +2928,7 @@ xran_parse_cp_pkt(struct rte_mbuf *mbuf, if(result->sections[i].info.ef) { // parse section extension - extlen = xran_parse_section_extension(mbuf, (void *)section, &result->sections[i]); + extlen = xran_parse_section_extension(mbuf, (void *)section, result, i); if(extlen > 0) { section = (void *)rte_pktmbuf_adj(mbuf, extlen); if(section == NULL) { diff --git a/fhi_lib/lib/src/xran_cp_proc.c b/fhi_lib/lib/src/xran_cp_proc.c index e40ce72..789c6fd 100644 --- a/fhi_lib/lib/src/xran_cp_proc.c +++ b/fhi_lib/lib/src/xran_cp_proc.c @@ -46,6 +46,7 @@ #include #include #include +#include #include "xran_fh_o_du.h" @@ -60,7 +61,6 @@ #include "xran_dev.h" #include "xran_frame_struct.h" #include "xran_printf.h" -#include "xran_app_frag.h" #include "xran_cp_proc.h" #include "xran_tx_proc.h" @@ -76,9 +76,11 @@ struct xran_recv_packet_info parse_recv[XRAN_PORTS_NUM]; ////////////////////////////////////////// // For RU emulation -struct xran_section_recv_info *recvSections[XRAN_PORTS_NUM] = {NULL,NULL,NULL,NULL}; +struct xran_section_recv_info *recvSections[XRAN_PORTS_NUM] = {NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL}; struct xran_cp_recv_params recvCpInfo[XRAN_PORTS_NUM]; +extern int32_t first_call; + static void extbuf_free_callback(void *addr __rte_unused, void *opaque __rte_unused) { @@ -141,14 +143,14 @@ xran_init_seqid(void *pHandle) int32_t process_cplane(struct rte_mbuf *pkt, void* handle) { + uint32_t mb_free = MBUF_FREE; struct xran_device_ctx * p_xran_dev_ctx = (struct xran_device_ctx *)handle; - if(p_xran_dev_ctx) { + if(p_xran_dev_ctx && xran_if_current_state == XRAN_RUNNING) { if(xran_dev_get_ctx_by_id(0)->fh_cfg.debugStop) /* check CP with standard tests only */ - xran_parse_cp_pkt(pkt, &recvCpInfo[p_xran_dev_ctx->xran_port_id], &parse_recv[p_xran_dev_ctx->xran_port_id]); + xran_parse_cp_pkt(pkt, &recvCpInfo[p_xran_dev_ctx->xran_port_id], &parse_recv[p_xran_dev_ctx->xran_port_id],(void*)p_xran_dev_ctx, &mb_free); } - - return (MBUF_FREE); + return (mb_free); } int32_t @@ -188,23 +190,21 @@ xran_check_symbolrange(int symbol_type, uint32_t PortId, int cc_id, int tti, } struct rte_mbuf * -xran_attach_cp_ext_buf(uint16_t vf_id, int8_t* p_ext_buff_start, int8_t* p_ext_buff, uint16_t ext_buff_len, +xran_attach_cp_ext_buf(uint16_t vf_id, int8_t* p_ext_buff_start/*ext_start*/, int8_t* p_ext_buff/*ext-section*/, uint16_t ext_buff_len, struct rte_mbuf_ext_shared_info * p_share_data) { struct rte_mbuf *mb_oran_hdr_ext = NULL; - struct rte_mbuf *tmp = NULL; + //struct rte_mbuf *tmp = NULL; int8_t *ext_buff = NULL; rte_iova_t ext_buff_iova = 0; ext_buff = p_ext_buff - (RTE_PKTMBUF_HEADROOM + sizeof(struct xran_ecpri_hdr) + - sizeof(struct xran_cp_radioapp_section1_header) + - sizeof(struct xran_cp_radioapp_section1)); + sizeof(struct xran_cp_radioapp_section1_header)); ext_buff_len += (RTE_PKTMBUF_HEADROOM + sizeof(struct xran_ecpri_hdr) + - sizeof(struct xran_cp_radioapp_section1_header) + - sizeof(struct xran_cp_radioapp_section1)) + 18; + sizeof(struct xran_cp_radioapp_section1_header) + 18); // mb_oran_hdr_ext = rte_pktmbuf_alloc(_eth_mbuf_pool_small); mb_oran_hdr_ext = xran_ethdi_mbuf_indir_alloc(); @@ -237,59 +237,154 @@ xran_attach_cp_ext_buf(uint16_t vf_id, int8_t* p_ext_buff_start, int8_t* p_ext_b return mb_oran_hdr_ext; } +/* TO DO: __thread is slow. We should allocate global 2D array and index it using current core index + * for better performance. + */ +__thread struct xran_section_gen_info sect_geninfo[XRAN_MAX_SECTIONS_PER_SLOT]; + int32_t xran_cp_create_and_send_section(void *pHandle, uint8_t ru_port_id, int dir, int tti, int cc_id, - struct xran_prb_map *prbMap, enum xran_category category, uint8_t ctx_id) + struct xran_prb_map *prbMap, struct xran_prb_elm_proc_info_t *prbElmProcInfo, enum xran_category category, uint8_t ctx_id) { int32_t ret = 0; struct xran_device_ctx *p_x_ctx = (struct xran_device_ctx *)pHandle; struct xran_common_counters *pCnt = &p_x_ctx->fh_counters; struct xran_cp_gen_params params; - struct xran_section_gen_info sect_geninfo[1]; struct rte_mbuf *mbuf; uint32_t interval = p_x_ctx->interval_us_local; uint8_t PortId = p_x_ctx->xran_port_id; + int16_t numCPSections=0, ext_offset=0, start_sect_id=0; - - uint32_t i, j, loc_sym; + uint32_t i, j, loc_sym,idx; uint32_t nsection = 0; struct xran_prb_elm *pPrbMapElem = NULL; - struct xran_prb_elm *pPrbMapElemPrev = NULL; + // struct xran_prb_elm *pPrbMapElemPrev = NULL; uint32_t slot_id = XranGetSlotNum(tti, SLOTNUM_PER_SUBFRAME(interval)); uint32_t subframe_id = XranGetSubFrameNum(tti,SLOTNUM_PER_SUBFRAME(interval), SUBFRAMES_PER_SYSTEMFRAME); uint32_t frame_id = XranGetFrameNum(tti,xran_getSfnSecStart(),SUBFRAMES_PER_SYSTEMFRAME, SLOTNUM_PER_SUBFRAME(interval)); uint8_t seq_id = 0; - uint16_t vf_id = 0; + uint16_t vf_id = 0 , curr_sec_id = 0 , prb_per_section, start_Prb; + int32_t startSym = 0, numSyms = 0; - int next; + int next=0; struct xran_sectionext1_info ext1; struct xran_sectionext4_info ext4 = {0}; + struct xran_sectionext9_info ext9; struct xran_sectionext11_info ext11; - //frame_id = (frame_id & 0xff); /* ORAN frameId, 8 bits, [0, 255] */ - frame_id = ((frame_id + ((0 == tti)?NUM_OF_FRAMES_PER_SECOND:0)) & 0xff); /* ORAN frameId, 8 bits, [0, 255] */ + frame_id = (frame_id & 0xff); /* ORAN frameId, 8 bits, [0, 255] */ + if(unlikely((category != XRAN_CATEGORY_A) && (category != XRAN_CATEGORY_B))) + { + print_err("Unsupported Category %d\n", category); + return (-1); + } + + /* Generate a C-Plane message per each section, + * not a C-Plane message with multi sections */ + if(0 == p_x_ctx->RunSlotPrbMapBySymbolEnable) + { if(prbMap) { + + nsection = prbMap->nPrbElm; + i=0; + if(XRAN_DIR_DL == dir) + { + if(0 == p_x_ctx->numSymsForDlCP) + { + print_dbg("No symbol available for DL CP transmission\n"); + return (-1); + } + + if(prbMap->nPrbElm == prbElmProcInfo->nPrbElmProcessed && 0 != prbElmProcInfo->numSymsRemaining) + { + prbElmProcInfo->numSymsRemaining--; + print_dbg("All sections already processed\n"); + return (-1); + } + + if(0== prbElmProcInfo->numSymsRemaining) + { /* new slot */ + prbElmProcInfo->numSymsRemaining = p_x_ctx->numSymsForDlCP; + prbElmProcInfo->nPrbElmPerSym = prbMap->nPrbElm/p_x_ctx->numSymsForDlCP; + prbElmProcInfo->nPrbElmProcessed = 0; + } + + if(1 == prbElmProcInfo->numSymsRemaining) + {/* last symbol:: send all remaining */ nsection = prbMap->nPrbElm; + } + else + { + if(0 == prbElmProcInfo->nPrbElmPerSym) + nsection=prbElmProcInfo->nPrbElmProcessed + 1; + else + nsection = prbElmProcInfo->nPrbElmProcessed + prbElmProcInfo->nPrbElmPerSym; + } + + i=prbElmProcInfo->nPrbElmProcessed; + prbElmProcInfo->numSymsRemaining--; + + } //dir = DL + else + { + nsection = prbMap->nPrbElm; + i=0; + } //dir = UL + pPrbMapElem = &prbMap->prbMap[0]; - } else { + } + else + { print_err("prbMap is NULL\n"); return (-1); } + + curr_sec_id = 0; + if(pPrbMapElem->bf_weight.extType == 1) + { + for(j=0;jprbMap[j].bf_weight.numSetBFWs; + } + else + curr_sec_id = i; + + // start_id=curr_sec_id; + uint8_t generateCpPkt=0; + uint8_t replacePrbStartNSize=0; /* In case of application fragmentation, we send 1 cplane packets for multiple + uplane packets i.e. 1 cp packet for multiple PRBs. This flag is used to + achieve that by setting different values for cp packet preparation and for + cp-up database update */ + /* Generate a C-Plane message per each section, * not a C-Plane message with multi sections */ - for (i = 0; i < nsection; i++) { + for (; i < nsection; i++) { int startSym, numSyms; pPrbMapElem = &prbMap->prbMap[i]; + prb_per_section = pPrbMapElem->bf_weight.numBundPrb; + start_Prb = pPrbMapElem->nRBStart; + + if((pPrbMapElem->bf_weight.extType == 1) && + (((i+1)prbMap[i+1].IsNewSect==1) || + (i+1) == nsection)) + { /*ext1*/ + generateCpPkt=1; + } + else if(pPrbMapElem->IsNewSect) + generateCpPkt=1; + else + generateCpPkt=0; + /* For Special Subframe, * Check validity of given symbol range with slot configuration * and adjust symbol range accordingly. */ if(xran_fs_get_slot_type(PortId, cc_id, tti, XRAN_SLOT_TYPE_FDD) != 1 - && xran_fs_get_slot_type(PortId, cc_id, tti, XRAN_SLOT_TYPE_SP) == 1) { + && xran_fs_get_slot_type(PortId, cc_id, tti, XRAN_SLOT_TYPE_SP) == 1) + { /* This function cannot handle two or more groups of consecutive same type of symbol. * If there are two or more, then it might cause an error */ startSym = xran_check_symbolrange( @@ -297,7 +392,8 @@ xran_cp_create_and_send_section(void *pHandle, uint8_t ru_port_id, int dir, int PortId, cc_id, tti, pPrbMapElem->nStartSymb, pPrbMapElem->numSymb, &numSyms); - if(startSym < 0 || numSyms == 0) { + if(startSym < 0 || numSyms == 0) + { /* if start symbol is not valid, then skip this section */ print_err("Skip section %d due to invalid symbol range - [%d:%d], [%d:%d]", i, @@ -305,7 +401,9 @@ xran_cp_create_and_send_section(void *pHandle, uint8_t ru_port_id, int dir, int startSym, numSyms); continue; } - } else { + } + else + { startSym = pPrbMapElem->nStartSymb; numSyms = pPrbMapElem->numSymb; } @@ -324,135 +422,189 @@ xran_cp_create_and_send_section(void *pHandle, uint8_t ru_port_id, int dir, int print_dbg("cp[%d:%d:%d] ru_port_id %d dir=%d\n", frame_id, subframe_id, slot_id, ru_port_id, dir); - seq_id = xran_get_cp_seqid(pHandle, XRAN_DIR_DL, cc_id, ru_port_id); - - sect_geninfo[0].info.type = params.sectionType; - sect_geninfo[0].info.startSymId = params.hdr.startSymId; - sect_geninfo[0].info.iqWidth = params.hdr.iqWidth; - sect_geninfo[0].info.compMeth = params.hdr.compMeth; - - sect_geninfo[0].info.id = i; /* do not revert 'i' to - xran_alloc_sectionid(pHandle, dir, cc_id, ru_port_id, slot_id); */ - - if(sect_geninfo[0].info.id > XRAN_MAX_SECTIONS_PER_SLOT) - print_err("sectinfo->id %d\n", sect_geninfo[0].info.id); -#if 0 - if (dir == XRAN_DIR_UL) { - for(loc_sym = 0; loc_sym < XRAN_NUM_OF_SYMBOL_PER_SLOT; loc_sym++) { - int32_t sec_desc_idx = pPrbMapElem->nSecDesc[loc_sym]; - struct xran_section_desc *p_sec_desc = pPrbMapElem->p_sec_desc[loc_sym][0]; - if(p_sec_desc) { - p_sec_desc->section_id = sect_geninfo[0].info.id; - if(p_sec_desc->pCtrl) { - rte_pktmbuf_free(p_sec_desc->pCtrl); - p_sec_desc->pCtrl = NULL; - p_sec_desc->pData = NULL; + if(pPrbMapElem->bf_weight.extType == 1) + { + /* Send multiple CP sections per prbElement for ext-1 */ + numCPSections = pPrbMapElem->bf_weight.numSetBFWs; + } + else + { + numCPSections = 1; + replacePrbStartNSize = 1; /* in case of no app fragmentation, UP_nRBSize will be same as nRBSize. So, + always replacing the elements when ext1 is not in use */ + } + + /** Prepare section info for multiple sections in a PRB element */ + for(idx=0; idx < numCPSections; idx++) { + + sect_geninfo[curr_sec_id].exDataSize=0; + sect_geninfo[curr_sec_id].info = xran_cp_get_section_info_ptr(pHandle, dir, cc_id, ru_port_id, ctx_id); + if(unlikely(sect_geninfo[curr_sec_id].info == NULL)) + { + rte_panic("xran_cp_get_section_info_ptr failed\n"); } + + struct xran_section_info *info = sect_geninfo[curr_sec_id].info; + info->prbElemBegin = (idx == 0 ) ? 1 : 0; + info->prbElemEnd = (idx + 1 == numCPSections) ? 1 : 0; + info->ef = 0; + info->freqOffset = 0; + info->ueId = 0; + info->regFactor = 0; + + if((idx+1)*prb_per_section > pPrbMapElem->nRBSize){ + prb_per_section = pPrbMapElem->nRBSize - idx*prb_per_section; } - else { - print_err("section desc is NULL\n"); + + if(numCPSections == 1) + { + info->startPrbc = pPrbMapElem->nRBStart; + info->numPrbc = pPrbMapElem->nRBSize; } - sec_desc_idx--; - pPrbMapElem->nSecDesc[loc_sym] = 0; + else + { + info->startPrbc = start_Prb; + info->numPrbc = prb_per_section; + start_Prb += prb_per_section; } + + info->type = params.sectionType; + info->startSymId = params.hdr.startSymId; + info->iqWidth = params.hdr.iqWidth; + info->compMeth = params.hdr.compMeth; + info->id = curr_sec_id; + + if(info->prbElemBegin && pPrbMapElem->IsNewSect==1) + { + start_sect_id = info->id; } -#endif - sect_geninfo[0].info.rb = XRAN_RBIND_EVERY; - sect_geninfo[0].info.startPrbc = pPrbMapElem->nRBStart; - sect_geninfo[0].info.numPrbc = pPrbMapElem->nRBSize; - sect_geninfo[0].info.numSymbol = numSyms; - sect_geninfo[0].info.reMask = 0xfff; - sect_geninfo[0].info.beamId = pPrbMapElem->nBeamIndex; - sect_geninfo[0].info.symInc = XRAN_SYMBOLNUMBER_NOTINC; - - for(loc_sym = 0; loc_sym < XRAN_NUM_OF_SYMBOL_PER_SLOT; loc_sym++) { - struct xran_section_desc *p_sec_desc = pPrbMapElem->p_sec_desc[loc_sym][0]; - if(p_sec_desc) { - p_sec_desc->section_id = sect_geninfo[0].info.id; - - sect_geninfo[0].info.sec_desc[loc_sym].iq_buffer_offset = p_sec_desc->iq_buffer_offset; - sect_geninfo[0].info.sec_desc[loc_sym].iq_buffer_len = p_sec_desc->iq_buffer_len; - } else { - print_err("section desc is NULL\n"); + if(unlikely(info->id > XRAN_MAX_SECTIONS_PER_SLOT)) + print_err("sectinfo->id %d\n", info->id); + + info->rb = XRAN_RBIND_EVERY; + info->numSymbol = numSyms; + info->reMask = 0xfff; + info->beamId = pPrbMapElem->nBeamIndex; + info->symInc = XRAN_SYMBOLNUMBER_NOTINC; + + for(loc_sym = 0; loc_sym < XRAN_NUM_OF_SYMBOL_PER_SLOT; loc_sym++) + { + struct xran_section_desc *p_sec_desc = &pPrbMapElem->sec_desc[loc_sym][0]; + + if(p_sec_desc) + { + info->sec_desc[loc_sym].iq_buffer_offset = p_sec_desc->iq_buffer_offset; + info->sec_desc[loc_sym].iq_buffer_len = p_sec_desc->iq_buffer_len; + + p_sec_desc->section_id = info->id; } + else + { + print_err("section desc is NULL\n"); } - if(unlikely((category != XRAN_CATEGORY_A) && (category != XRAN_CATEGORY_B))) { - print_err("Unsupported Category %d\n", category); - return (-1); - } + } /* for(loc_sym = 0; loc_sym < XRAN_NUM_OF_SYMBOL_PER_SLOT; loc_sym++) */ /* Add extentions if required */ + if((category == XRAN_CATEGORY_B) && (pPrbMapElem->bf_weight_update)) + { + if(pPrbMapElem->bf_weight.extType == 1) /* Prepare section data for ext-1 */ + { next = 0; - sect_geninfo[0].exDataSize = 0; + sect_geninfo[curr_sec_id].exDataSize = 0; + memset(&ext1, 0, sizeof (struct xran_sectionext1_info)); + ext1.bfwNumber = pPrbMapElem->bf_weight.nAntElmTRx; + ext1.bfwIqWidth = pPrbMapElem->iqWidth; + ext1.bfwCompMeth = pPrbMapElem->compMethod; + /* ext-1 buffer contains CP sections */ + ext1.bfwIQ_sz = ONE_EXT_LEN(pPrbMapElem); //76 + + ext_offset = (idx*ONE_CPSEC_EXT_LEN(pPrbMapElem)) + sizeof(struct xran_cp_radioapp_section1); + ext1.p_bfwIQ = (int8_t*)(pPrbMapElem->bf_weight.p_ext_section + ext_offset); + + sect_geninfo[curr_sec_id].exData[next].type = XRAN_CP_SECTIONEXTCMD_1; + sect_geninfo[curr_sec_id].exData[next].len = sizeof(ext1); + sect_geninfo[curr_sec_id].exData[next].data = &ext1; + + info->ef = 1; + sect_geninfo[curr_sec_id].exDataSize++; + next++; + } + else + { + /*ext-11*/ + } + + } /* if((category == XRAN_CATEGORY_B) && (pPrbMapElem->bf_weight_update)) */ + + curr_sec_id++; + } /* for(idx=0; idx < numCPSections;idx++) */ + + if (dir==XRAN_DIR_UL || generateCpPkt) //only send actual new CP section + { /* Extension 4 for modulation compression */ - if(pPrbMapElem->compMethod == XRAN_COMPMETHOD_MODULATION) { + if(pPrbMapElem->compMethod == XRAN_COMPMETHOD_MODULATION) + { mbuf = xran_ethdi_mbuf_alloc(); ext4.csf = 0; //no shift for now only ext4.modCompScaler = pPrbMapElem->ScaleFactor; + /* TO DO: Should this be the current section id? */ sect_geninfo[0].exData[next].type = XRAN_CP_SECTIONEXTCMD_4; sect_geninfo[0].exData[next].len = sizeof(ext4); sect_geninfo[0].exData[next].data = &ext4; - sect_geninfo[0].info.ef = 1; + sect_geninfo[0].info->ef = 1; sect_geninfo[0].exDataSize++; next++; } /* Extension 1 or 11 for Beam forming weights */ - if((category == XRAN_CATEGORY_B) && (pPrbMapElem->bf_weight_update)) { - /* add extantion section for BF Weights if update is needed */ - if(pPrbMapElem->bf_weight.numBundPrb == 0) { - /* No bundled PRBs, using Extension 1 */ - struct rte_mbuf_ext_shared_info * p_share_data = &p_x_ctx->cp_share_data.sh_data[tti % XRAN_N_FE_BUF_LEN][cc_id][ru_port_id][sect_geninfo[0].info.id]; - - /*add extention section for BF Weights if update is needed */ - if(pPrbMapElem->bf_weight.p_ext_start) { + /* add section extention for BF Weights if update is needed */ + if((category == XRAN_CATEGORY_B) && (pPrbMapElem->bf_weight_update)) + { + if(pPrbMapElem->bf_weight.extType == 1) /* Using Extension 1 */ + { + //TODO: Should this change ? + struct rte_mbuf_ext_shared_info * p_share_data = + &p_x_ctx->cp_share_data.sh_data[tti % XRAN_N_FE_BUF_LEN][cc_id][ru_port_id][sect_geninfo[0].info->id]; + + if(pPrbMapElem->bf_weight.p_ext_start) + { /* use buffer with BF Weights for mbuf */ mbuf = xran_attach_cp_ext_buf(vf_id, pPrbMapElem->bf_weight.p_ext_start, pPrbMapElem->bf_weight.p_ext_section, pPrbMapElem->bf_weight.ext_section_sz, p_share_data); - } else { + } + else + { print_err("p %d cc %d dir %d Alloc fail!\n", PortId, cc_id, dir); - return (-1); + ret=-1; + goto _create_and_send_section_error; } - - memset(&ext1, 0, sizeof (struct xran_sectionext1_info)); - ext1.bfwNumber = pPrbMapElem->bf_weight.nAntElmTRx; - ext1.bfwIqWidth = pPrbMapElem->iqWidth; - ext1.bfwCompMeth = pPrbMapElem->compMethod; - ext1.p_bfwIQ = (int16_t*)pPrbMapElem->bf_weight.p_ext_section; - ext1.bfwIQ_sz = pPrbMapElem->bf_weight.ext_section_sz; - - sect_geninfo[0].exData[next].type = XRAN_CP_SECTIONEXTCMD_1; - sect_geninfo[0].exData[next].len = sizeof(ext1); - sect_geninfo[0].exData[next].data = &ext1; - - sect_geninfo[0].info.ef = 1; - sect_geninfo[0].exDataSize++; - next++; - } else { /* if(pPrbMapElem->bf_weight.numBundPrb == 0) */ + } /* if(pPrbMapElem->bf_weight.extType == 1) */ + else + { /* Using Extension 11 */ struct rte_mbuf_ext_shared_info *shared_info; + next = 0; - shared_info = &p_x_ctx->bfw_share_data.sh_data[tti % XRAN_N_FE_BUF_LEN][cc_id][ru_port_id][sect_geninfo[0].info.id]; - - + shared_info = &p_x_ctx->bfw_share_data.sh_data[tti % XRAN_N_FE_BUF_LEN][cc_id][ru_port_id][sect_geninfo[0].info->id]; shared_info->free_cb = NULL; shared_info->fcb_opaque = NULL; mbuf = xran_ethdi_mbuf_indir_alloc(); if(unlikely(mbuf == NULL)) { rte_panic("Alloc fail!\n"); - return (-1); } //mbuf = rte_pktmbuf_alloc(_eth_mbuf_pool_vf_small[vf_id]); - if(xran_cp_attach_ext_buf(mbuf, (uint8_t *)pPrbMapElem->bf_weight.p_ext_start, pPrbMapElem->bf_weight.maxExtBufSize, shared_info) < 0) { + if(xran_cp_attach_ext_buf(mbuf, (uint8_t *)pPrbMapElem->bf_weight.p_ext_start, pPrbMapElem->bf_weight.maxExtBufSize, shared_info) < 0) + { rte_pktmbuf_free(mbuf); - return (-1); + ret=-1; + goto _create_and_send_section_error; } rte_mbuf_ext_refcnt_update(shared_info, 0); @@ -476,29 +628,64 @@ xran_cp_create_and_send_section(void *pHandle, uint8_t ru_port_id, int dir, int sect_geninfo[0].exData[next].len = sizeof(ext11); sect_geninfo[0].exData[next].data = &ext11; - sect_geninfo[0].info.ef = 1; + sect_geninfo[0].info->ef = 1; sect_geninfo[0].exDataSize++; next++; } - } else { /* if((category == XRAN_CATEGORY_B) && (pPrbMapElem->bf_weight_update)) */ + } /* if((category == XRAN_CATEGORY_B) && (pPrbMapElem->bf_weight_update)) */ + else + { mbuf = xran_ethdi_mbuf_alloc(); - sect_geninfo[0].info.ef = 0; + + sect_geninfo[0].info->ef = 0; sect_geninfo[0].exDataSize = 0; + + if(p_x_ctx->dssEnable == 1) { + uint8_t dssSlot = 0; + dssSlot = tti % (p_x_ctx->dssPeriod); + + ext9.technology = p_x_ctx->technology[dssSlot]; + ext9.reserved = 0; + + sect_geninfo[0].exData[next].type = XRAN_CP_SECTIONEXTCMD_9; + sect_geninfo[0].exData[next].len = sizeof(ext9); + sect_geninfo[0].exData[next].data = &ext9; + + sect_geninfo[0].info->ef = 1; + sect_geninfo[0].exDataSize++; + next++; + } } - if(unlikely(mbuf == NULL)) { + if(unlikely(mbuf == NULL)) + { print_err("Alloc fail!\n"); - return (-1); + ret=-1; + goto _create_and_send_section_error; } - params.numSections = 1;//nsection; + params.numSections = numCPSections; params.sections = sect_geninfo; - ret = xran_prepare_ctrl_pkt(mbuf, ¶ms, cc_id, ru_port_id, seq_id); - if(ret < 0) { + seq_id = xran_get_cp_seqid(pHandle, ((XRAN_DIR_DL == dir)? XRAN_DIR_DL : XRAN_DIR_UL), cc_id, ru_port_id); + ret = xran_prepare_ctrl_pkt(mbuf, ¶ms, cc_id, ru_port_id, seq_id,start_sect_id); + } /* if (dir==XRAN_DIR_UL || generateCpPkt) */ + + if(replacePrbStartNSize && XRAN_DIR_DL == dir) + { + sect_geninfo[curr_sec_id-1].info->startPrbc = pPrbMapElem->UP_nRBStart; + sect_geninfo[curr_sec_id-1].info->numPrbc = pPrbMapElem->UP_nRBSize; + } + + if(ret < 0) + { print_err("Fail to build control plane packet - [%d:%d:%d] dir=%d\n", frame_id, subframe_id, slot_id, dir); - } else { + } + else + { + if((dir==XRAN_DIR_UL) || generateCpPkt) //only send actual new CP section + { int32_t cp_sent = 0; int32_t pkt_len = 0; /* add in the ethernet header */ @@ -508,14 +695,255 @@ xran_cp_create_and_send_section(void *pHandle, uint8_t ru_port_id, int dir, int pCnt->tx_bytes_counter += pkt_len; //rte_pktmbuf_pkt_len(mbuf); if(pkt_len > p_x_ctx->fh_init.mtu) rte_panic("section %d: pkt_len = %d maxExtBufSize %d\n", i, pkt_len, pPrbMapElem->bf_weight.maxExtBufSize); - //rte_mbuf_sanity_check(mbuf, 0); + cp_sent = p_x_ctx->send_cpmbuf2ring(mbuf, ETHER_TYPE_ECPRI, vf_id); - if(cp_sent != 1) { + if(cp_sent != 1) + { rte_pktmbuf_free(mbuf); } - xran_cp_add_section_info(pHandle, dir, cc_id, ru_port_id, ctx_id, §_geninfo[0].info); + } } } /* for (i=0; inPrbElm) + { + print_dbg("prbMap->nPrbElm is %d\n",prbMap->nPrbElm); + return 0; + } + + nsection = prbMap->nPrbElm; + i=0; + if(XRAN_DIR_DL == dir) + { + prbElmProcInfo->numSymsRemaining = 0; + prbElmProcInfo->nPrbElmProcessed = 0; + prbElmProcInfo->nPrbElmPerSym = prbMap->nPrbElm; + nsection = prbMap->nPrbElm; + } //dir = DL + else + { + nsection = prbMap->nPrbElm; + } //dir = UL + } + else + { + print_err("prbMap is NULL\n"); + return (-1); + } + + pPrbMapElem = &prbMap->prbMap[0]; + + if(xran_fs_get_slot_type(PortId, cc_id, tti, XRAN_SLOT_TYPE_FDD) != 1 + && xran_fs_get_slot_type(PortId, cc_id, tti, XRAN_SLOT_TYPE_SP) == 1) + { + startSym = xran_check_symbolrange( + ((dir==XRAN_DIR_DL)?XRAN_SYMBOL_TYPE_DL:XRAN_SYMBOL_TYPE_UL), + PortId, cc_id, tti, + pPrbMapElem->nStartSymb, + pPrbMapElem->numSymb, &numSyms); + + if(startSym < 0 || numSyms == 0) + { + /* if start symbol is not valid, then skip this section */ + print_err("Skip section %d due to invalid symbol range - [%d:%d], [%d:%d]", + i, + pPrbMapElem->nStartSymb, pPrbMapElem->numSymb, + startSym, numSyms); + } + } + else + { + startSym = pPrbMapElem->nStartSymb; + numSyms = pPrbMapElem->numSymb; + } + + vf_id = xran_map_ecpriRtcid_to_vf(p_x_ctx, dir, cc_id, ru_port_id); + params.dir = dir; + params.sectionType = XRAN_CP_SECTIONTYPE_1; + params.hdr.filterIdx = XRAN_FILTERINDEX_STANDARD; + params.hdr.frameId = frame_id; + params.hdr.subframeId = subframe_id; + params.hdr.slotId = slot_id; + params.hdr.startSymId = startSym; + params.hdr.iqWidth = pPrbMapElem->iqWidth; + params.hdr.compMeth = pPrbMapElem->compMethod; + params.sections = sect_geninfo; + + for (i = 0, j = 0; j < nsection; j++) + { + sect_geninfo[i].exDataSize=0; + sect_geninfo[i].info = xran_cp_get_section_info_ptr(pHandle, dir, cc_id, ru_port_id, ctx_id); + sect_geninfo[i].info->prbElemBegin = ((j == 0 ) ? 1 : 0); + sect_geninfo[i].info->prbElemEnd = ((j + 1 == nsection) ? 1 : 0); + if(sect_geninfo[i].info == NULL) + { + rte_panic("xran_cp_get_section_info_ptr failed\n"); + } + pPrbMapElem = &prbMap->prbMap[j]; + + sect_geninfo[i].info->type = XRAN_CP_SECTIONTYPE_1; + sect_geninfo[i].info->startSymId = pPrbMapElem->nStartSymb; + sect_geninfo[i].info->iqWidth = params.hdr.iqWidth; + sect_geninfo[i].info->compMeth = params.hdr.compMeth; + sect_geninfo[i].info->id = pPrbMapElem->nSectId; + + if(sect_geninfo[i].info->id > XRAN_MAX_SECTIONS_PER_SLOT) + print_err("sectinfo->id %d\n", sect_geninfo[i].info->id); + + sect_geninfo[i].info->rb = XRAN_RBIND_EVERY; + sect_geninfo[i].info->startPrbc = pPrbMapElem->UP_nRBStart; + sect_geninfo[i].info->numPrbc = pPrbMapElem->UP_nRBSize; + sect_geninfo[i].info->numSymbol = pPrbMapElem->numSymb; + sect_geninfo[i].info->reMask = 0xfff; + sect_geninfo[i].info->beamId = pPrbMapElem->nBeamIndex; + + if(startSym == pPrbMapElem->nStartSymb) + sect_geninfo[i].info->symInc = XRAN_SYMBOLNUMBER_NOTINC; + else + { + if((startSym + numSyms) == pPrbMapElem->nStartSymb) + { + sect_geninfo[i].info->symInc = XRAN_SYMBOLNUMBER_INC; + startSym = pPrbMapElem->nStartSymb; + numSyms = pPrbMapElem->numSymb; + } + else + { + sect_geninfo[i].info->startSymId = startSym; + sect_geninfo[i].info->numSymbol = numSyms; + print_dbg("Last startSym is %d. Last numSyms is %d. But current pPrbMapElem->nStartSymb is %d.\n", startSym, numSyms, pPrbMapElem->nStartSymb); + } + } + + + for(loc_sym = 0; loc_sym < XRAN_NUM_OF_SYMBOL_PER_SLOT; loc_sym++) + { + struct xran_section_desc *p_sec_desc = &pPrbMapElem->sec_desc[loc_sym][0]; + if(p_sec_desc) + { + p_sec_desc->section_id = sect_geninfo[i].info->id; + + sect_geninfo[i].info->sec_desc[loc_sym].iq_buffer_offset = p_sec_desc->iq_buffer_offset; + sect_geninfo[i].info->sec_desc[loc_sym].iq_buffer_len = p_sec_desc->iq_buffer_len; + } + else + { + print_err("section desc is NULL\n"); + } + } + + next = 0; + sect_geninfo[i].exDataSize = 0; + + /* Extension 4 for modulation compression */ + if(pPrbMapElem->compMethod == XRAN_COMPMETHOD_MODULATION) + { + // print_dbg("[%s]:%d Modulation Compression need to verify for this code branch and may not be available\n"); + print_err("[%s]:%d Modulation Compression need to verify for this code branch and may not be available\n",__FUNCTION__, __LINE__); + } + /* Extension 1 or 11 for Beam forming weights */ + /* add section extention for BF Weights if update is needed */ + if((category == XRAN_CATEGORY_B) && (pPrbMapElem->bf_weight_update)) + { + // print_dbg("[%s]:%d Category B need to verify for this code branch and may not be available\n"); + print_err("[%s]:%d Category B need to verify for this code branch and may not be available\n",__FUNCTION__, __LINE__); + } /* if((category == XRAN_CATEGORY_B) && (pPrbMapElem->bf_weight_update)) */ + else + { + sect_geninfo[i].info->ef = 0; + sect_geninfo[i].exDataSize = 0; + + if(p_x_ctx->dssEnable == 1) { + uint8_t dssSlot = 0; + dssSlot = tti % (p_x_ctx->dssPeriod); + + ext9.technology = p_x_ctx->technology[dssSlot]; + ext9.reserved = 0; + + sect_geninfo[i].exData[next].type = XRAN_CP_SECTIONEXTCMD_9; + sect_geninfo[i].exData[next].len = sizeof(ext9); + sect_geninfo[i].exData[next].data = &ext9; + + sect_geninfo[i].info->ef = 1; + sect_geninfo[i].exDataSize++; + next++; + } + } + + // xran_cp_add_section_info(pHandle, dir, cc_id, ru_port_id, ctx_id, §_geninfo[i].info); + + if(pPrbMapElem->IsNewSect == 1) + { + sect_geninfo[i].info->startPrbc = pPrbMapElem->nRBStart; + sect_geninfo[i].info->numPrbc = pPrbMapElem->nRBSize; + i++; + } + } + + params.numSections = i; + + mbuf = xran_ethdi_mbuf_alloc(); + if(unlikely(mbuf == NULL)) + { + print_err("Alloc fail!\n"); + ret=-1; + goto _create_and_send_section_error; + } + + seq_id = xran_get_cp_seqid(pHandle, ((XRAN_DIR_DL == dir)? XRAN_DIR_DL : XRAN_DIR_UL), cc_id, ru_port_id); + ret = xran_prepare_ctrl_pkt(mbuf, ¶ms, cc_id, ru_port_id, seq_id,start_sect_id); + + if(ret < 0) + { + print_err("Fail to build control plane packet - [%d:%d:%d] dir=%d\n", + frame_id, subframe_id, slot_id, dir); + } + else + { + + int32_t cp_sent = 0; + int32_t pkt_len = 0; + /* add in the ethernet header */ + struct rte_ether_hdr *const h = (void *)rte_pktmbuf_prepend(mbuf, sizeof(*h)); + pkt_len = rte_pktmbuf_pkt_len(mbuf); + pCnt->tx_counter++; + pCnt->tx_bytes_counter += pkt_len; //rte_pktmbuf_pkt_len(mbuf); + if(pkt_len > p_x_ctx->fh_init.mtu) + rte_panic("section %d: pkt_len = %d maxExtBufSize %d\n", i, pkt_len, pPrbMapElem->bf_weight.maxExtBufSize); + + cp_sent = p_x_ctx->send_cpmbuf2ring(mbuf, ETHER_TYPE_ECPRI, vf_id); + if(cp_sent != 1) + { + rte_pktmbuf_free(mbuf); + } + } + + struct xran_section_info *info; + for (j = 0; j < nsection; j++) + { + pPrbMapElem = &prbMap->prbMap[j]; + info = xran_cp_find_section_info(pHandle, dir, cc_id, ru_port_id, ctx_id,j); + if(info == NULL) + { + rte_panic("xran_cp_get_section_info_ptr failed\n"); + } + info->startPrbc = pPrbMapElem->UP_nRBStart; + info->numPrbc = pPrbMapElem->UP_nRBSize; + } + } +#endif +_create_and_send_section_error: + if(XRAN_DIR_DL == dir) + { + prbElmProcInfo->nPrbElmProcessed = nsection; + } return ret; } @@ -541,7 +969,7 @@ xran_ruemul_init(void *pHandle) } recvSections[xran_port_id] = malloc(sizeof(struct xran_section_recv_info) * XRAN_MAX_NUM_SECTIONS); - if(recvSections == NULL) { + if(recvSections[xran_port_id] == NULL) { print_err("Fail to allocate memory!"); return (-1); } diff --git a/fhi_lib/lib/src/xran_cp_proc.h b/fhi_lib/lib/src/xran_cp_proc.h index 1d627fd..ba83447 100644 --- a/fhi_lib/lib/src/xran_cp_proc.h +++ b/fhi_lib/lib/src/xran_cp_proc.h @@ -49,12 +49,17 @@ int32_t xran_init_seqid(void *pHandle); int32_t process_cplane(struct rte_mbuf *pkt, void* handle); int32_t xran_cp_create_and_send_section(void *pHandle, uint8_t ru_port_id, int dir, int tti, int cc_id, struct xran_prb_map *prbMap, + struct xran_prb_elm_proc_info_t *prbElmProcInfo, enum xran_category category, uint8_t ctx_id); + int32_t xran_ruemul_init(void *pHandle); int32_t xran_ruemul_release(void *pHandle); +#define ONE_EXT_LEN(prbMap) (prbMap->bf_weight.ext_section_sz / prbMap->bf_weight.numSetBFWs) - sizeof(struct xran_cp_radioapp_section1) +#define ONE_CPSEC_EXT_LEN(prbMap) (prbMap->bf_weight.ext_section_sz / prbMap->bf_weight.numSetBFWs) + static __rte_always_inline uint16_t -xran_alloc_sectionid(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ant_id, uint8_t slot_id) +xran_alloc_sectionid(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ant_id, uint8_t subframe_id, uint8_t slot_id) { int8_t xran_port = 0; if((xran_port = xran_dev_ctx_get_port_id(pHandle)) < 0 ){ @@ -73,9 +78,9 @@ xran_alloc_sectionid(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ant_id, /* if new slot has been started, * then initializes section id again for new start */ - if(xran_section_id_curslot[xran_port][dir][cc_id][ant_id] != slot_id) { + if(xran_section_id_curslot[xran_port][dir][cc_id][ant_id] != (subframe_id * 2 + slot_id)) { xran_section_id[xran_port][dir][cc_id][ant_id] = 0; - xran_section_id_curslot[xran_port][dir][cc_id][ant_id] = slot_id; + xran_section_id_curslot[xran_port][dir][cc_id][ant_id] = (subframe_id * 2 + slot_id); } return(xran_section_id[xran_port][dir][cc_id][ant_id]++); diff --git a/fhi_lib/lib/src/xran_delay_measurement.c b/fhi_lib/lib/src/xran_delay_measurement.c index 931aceb..4c943c8 100644 --- a/fhi_lib/lib/src/xran_delay_measurement.c +++ b/fhi_lib/lib/src/xran_delay_measurement.c @@ -529,9 +529,8 @@ int xran_ecpri_one_way_delay_measurement_transmitter(uint16_t port_id, void* han int xran_generate_delay_meas(uint16_t port_id, void* handle, uint8_t actionType, uint8_t MeasurementID ) { struct xran_device_ctx* p_xran_dev_ctx = (struct xran_device_ctx *)handle; - struct xran_ecpri_delay_meas_pkt *ecpri_delmeas_pkt; int pkt_len; - struct rte_mbuf *mbuf,*pkt; + struct rte_mbuf *mbuf; char* pChar; struct xran_ecpri_delay_meas_pl * pdm= NULL; uint64_t tcv1,tr2m,trm; @@ -801,21 +800,18 @@ int xran_generate_delay_meas(uint16_t port_id, void* handle, uint8_t actionType, int xran_process_delmeas_request(struct rte_mbuf *pkt, void* handle, struct xran_ecpri_del_meas_pkt* ptr, uint16_t port_id) { int ret_value = FAIL; - - struct xran_ecpri_delay_meas_pl *txDelayHdr; TimeStamp pt1; struct rte_mbuf* pkt1; - char* pchar; + //char* pchar; uint64_t tcv1, tcv2,t2m,trm, td12, t1m; struct xran_ecpri_del_meas_pkt *pdm= NULL; - union xran_ecpri_cmn_hdr *cmn; struct timespec tr, t2; struct xran_device_ctx* p_xran_dev_ctx = (struct xran_device_ctx *)handle; struct xran_ecpri_del_meas_cmn* powdc = &p_xran_dev_ctx->fh_init.io_cfg.eowd_cmn[p_xran_dev_ctx->fh_init.io_cfg.id]; struct xran_ecpri_del_meas_port* powdp = &p_xran_dev_ctx->fh_init.io_cfg.eowd_port[p_xran_dev_ctx->fh_init.io_cfg.id][port_id]; struct rte_ether_hdr *eth_hdr; struct rte_ether_addr addr; - struct xran_ethdi_ctx *ctx = xran_ethdi_get_ctx(); + //struct xran_ethdi_ctx *ctx = xran_ethdi_get_ctx(); //101620 struct xran_io_cfg* cfg = &p_xran_dev_ctx->fh_init.io_cfg; // struct xran_io_cfg *cfg = &ctx->io_cfg; @@ -837,7 +833,7 @@ int xran_process_delmeas_request(struct rte_mbuf *pkt, void* handle, struct xran // 2) Copy MeasurementID to the Delay Measurement Response packet // but first prepend ethernet header since the info is still in the buffer // pchar = rte_pktmbuf_prepend(pkt, (uint16_t)(sizeof(struct rte_ether_hdr)+ sizeof(union xran_ecpri_cmn_hdr ))); // Pointer to new data start address 10/20/20 Now not removing ecpri_cmn in process_delay_meas - pchar = rte_pktmbuf_prepend(pkt, (uint16_t)sizeof(struct rte_ether_hdr)); + /*pchar = */rte_pktmbuf_prepend(pkt, (uint16_t)sizeof(struct rte_ether_hdr)); pkt1 = rte_pktmbuf_copy(pkt, _eth_mbuf_pool, 0, UINT32_MAX); pdm = (struct xran_ecpri_del_meas_pkt*)rte_pktmbuf_mtod_offset(pkt1, struct xran_ecpri_del_meas_pkt*, sizeof(struct rte_ether_hdr)); // 3) Get time stamp T1 from the Timestamp field i.e. t1 @@ -874,8 +870,8 @@ int xran_process_delmeas_request(struct rte_mbuf *pkt, void* handle, struct xran // Still need to define the DB to save the info and run averages td12 = t2m - tcv2 - (t1m + tcv1); // 12) Send the response right away - struct rte_ether_hdr *h = (struct rte_ether_hdr *)rte_pktmbuf_mtod(pkt1, struct rte_ether_hdr*); #ifdef XRAN_OWD_DEBUG_PKTS + struct rte_ether_hdr *h = (struct rte_ether_hdr *)rte_pktmbuf_mtod(pkt1, struct rte_ether_hdr*); uint8_t *pc = &h->s_addr.addr_bytes[0]; printf(" Src MAC from packet: %02"PRIx8" %02"PRIx8" %02"PRIx8" %02"PRIx8" %02"PRIx8" %02"PRIx8"\n", pc[0],pc[1],pc[2],pc[3],pc[4],pc[5]); uint8_t *pd = &h->d_addr.addr_bytes[0]; @@ -930,18 +926,15 @@ int xran_process_delmeas_request(struct rte_mbuf *pkt, void* handle, struct xran int xran_process_delmeas_request_w_fup(struct rte_mbuf *pkt, void* handle, struct xran_ecpri_del_meas_pkt* ptr, uint16_t port_id) { int ret_value = FAIL; - struct xran_ecpri_delay_meas_pl* txDelayHdr; - TimeStamp pt2; - struct rte_mbuf* pkt1; uint64_t trm; struct xran_ecpri_del_meas_pkt* pdm= ptr; struct timespec tr; struct xran_device_ctx* p_xran_dev_ctx = (struct xran_device_ctx *)handle; - struct xran_ecpri_del_meas_cmn* powdc = &p_xran_dev_ctx->fh_init.io_cfg.eowd_cmn[p_xran_dev_ctx->fh_init.io_cfg.id]; + //struct xran_ecpri_del_meas_cmn* powdc = &p_xran_dev_ctx->fh_init.io_cfg.eowd_cmn[p_xran_dev_ctx->fh_init.io_cfg.id]; struct xran_ecpri_del_meas_port* powdp = &p_xran_dev_ctx->fh_init.io_cfg.eowd_port[p_xran_dev_ctx->fh_init.io_cfg.id][port_id]; - struct xran_ethdi_ctx *const ctx = xran_ethdi_get_ctx(); - struct xran_io_cfg *cfg = &ctx->io_cfg; - int32_t* port = &cfg->port[port_id]; + //struct xran_ethdi_ctx *const ctx = xran_ethdi_get_ctx(); + //struct xran_io_cfg *cfg = &ctx->io_cfg; + //int32_t* port = &cfg->port[port_id]; // Since we are processing the receipt of a delay measurement request with follow up packet the following actions // need to be taken (Per eCPRI V2.0 Figure 26) @@ -972,19 +965,17 @@ int xran_process_delmeas_request_w_fup(struct rte_mbuf *pkt, void* handle, struc int xran_process_delmeas_response(struct rte_mbuf *pkt, void* handle, struct xran_ecpri_del_meas_pkt* ptr, uint16_t port_id) { int ret_value = 1; - struct xran_ecpri_delay_meas_pl* txDelayHdr; TimeStamp pt2; - struct rte_mbuf* pkt1; - uint64_t tcv1, tcv2,t2m,trm, td12; + uint64_t tcv2,t2m; struct xran_ecpri_del_meas_pkt* pdm; - struct timespec tr, t2; + //struct timespec t2; struct xran_device_ctx* p_xran_dev_ctx = (struct xran_device_ctx *)handle; struct xran_ecpri_del_meas_cmn* powdc = &p_xran_dev_ctx->fh_init.io_cfg.eowd_cmn[p_xran_dev_ctx->fh_init.io_cfg.id]; struct xran_ecpri_del_meas_port* powdp = &p_xran_dev_ctx->fh_init.io_cfg.eowd_port[p_xran_dev_ctx->fh_init.io_cfg.id][port_id]; - struct xran_ethdi_ctx *const ctx = xran_ethdi_get_ctx(); - struct xran_io_cfg *cfg = &ctx->io_cfg; - struct xran_io_cfg* cfg1 = &p_xran_dev_ctx->fh_init.io_cfg; - int32_t* port = &cfg->port[port_id]; + //struct xran_ethdi_ctx *const ctx = xran_ethdi_get_ctx(); + //struct xran_io_cfg *cfg = &ctx->io_cfg; + //struct xran_io_cfg* cfg1 = &p_xran_dev_ctx->fh_init.io_cfg; + //int32_t* port = &cfg->port[port_id]; // Since we are processing the receipt of a delay measurement response packet the following actions @@ -1056,11 +1047,10 @@ int xran_process_delmeas_response(struct rte_mbuf *pkt, void* handle, struct xra int xran_process_delmeas_rem_request(struct rte_mbuf *pkt, void* handle, struct xran_ecpri_del_meas_pkt* ptr, uint16_t port_id) { int ret_value = FAIL; - struct xran_ecpri_delay_meas_pl* txDelayHdr; struct rte_mbuf* pkt1; uint64_t tcv1,tr2m,trm; struct xran_ecpri_del_meas_pkt* pdm; - char* pchar; + //char* pchar; struct timespec tr2, tr; struct rte_ether_hdr *eth_hdr; struct rte_ether_addr addr; @@ -1086,7 +1076,7 @@ int xran_process_delmeas_rem_request(struct rte_mbuf *pkt, void* handle, struct trm = xran_timespec_to_ns(&tr); // 2) Copy MeasurementID to the Delay Measurement Request packet // but first prepend ethernet header since the info is still in the buffer - pchar = rte_pktmbuf_prepend(pkt, (uint16_t)sizeof(struct rte_ether_hdr)); + /*pchar = */rte_pktmbuf_prepend(pkt, (uint16_t)sizeof(struct rte_ether_hdr)); pkt1 = rte_pktmbuf_copy(pkt, _eth_mbuf_pool, 0, UINT32_MAX); pdm = (struct xran_ecpri_del_meas_pkt*)rte_pktmbuf_mtod_offset(pkt1, struct xran_ecpri_del_meas_pkt*, sizeof(struct rte_ether_hdr)); @@ -1135,19 +1125,17 @@ int xran_process_delmeas_rem_request(struct rte_mbuf *pkt, void* handle, struct int xran_process_delmeas_rem_request_w_fup(struct rte_mbuf* pkt, void* handle, struct xran_ecpri_del_meas_pkt* ptr, uint16_t port_id) { int ret_value = FAIL; - struct xran_ecpri_delay_meas_pl* txDelayHdr; - TimeStamp pt2; struct rte_mbuf* pkt1; struct rte_mbuf* pkt2; uint64_t tcv1,tsm,t1; struct rte_ether_hdr *eth_hdr; struct rte_ether_addr addr; struct xran_device_ctx* p_xran_dev_ctx = (struct xran_device_ctx *)handle; - struct xran_ecpri_del_meas_cmn* powdc = &p_xran_dev_ctx->fh_init.io_cfg.eowd_cmn[p_xran_dev_ctx->fh_init.io_cfg.id]; + //struct xran_ecpri_del_meas_cmn* powdc = &p_xran_dev_ctx->fh_init.io_cfg.eowd_cmn[p_xran_dev_ctx->fh_init.io_cfg.id]; struct xran_ecpri_del_meas_port* powdp = &p_xran_dev_ctx->fh_init.io_cfg.eowd_port[p_xran_dev_ctx->fh_init.io_cfg.id][port_id]; struct xran_ecpri_del_meas_pkt* pdm; struct timespec tr, ts; - char* pchar; + //char* pchar; struct xran_ethdi_ctx *const ctx = xran_ethdi_get_ctx(); @@ -1171,7 +1159,7 @@ int xran_process_delmeas_rem_request_w_fup(struct rte_mbuf* pkt, void* handle, s t1 = xran_timespec_to_ns(&tr); // 2) Copy MeasurementID to the Delay Measurement Request packet // but first prepend ethernet header since the info is still in the buffer - pchar = rte_pktmbuf_prepend(pkt, (uint16_t)sizeof(struct rte_ether_hdr)); + /*pchar = */rte_pktmbuf_prepend(pkt, (uint16_t)sizeof(struct rte_ether_hdr)); pkt1 = rte_pktmbuf_copy(pkt, _eth_mbuf_pool, 0, UINT32_MAX); pdm = (struct xran_ecpri_del_meas_pkt*)rte_pktmbuf_mtod_offset(pkt1, struct xran_ecpri_del_meas_pkt*, sizeof(struct rte_ether_hdr)); @@ -1239,12 +1227,11 @@ int xran_process_delmeas_rem_request_w_fup(struct rte_mbuf* pkt, void* handle, s int xran_process_delmeas_follow_up(struct rte_mbuf *pkt, void* handle, struct xran_ecpri_del_meas_pkt* ptr, uint16_t port_id) { int ret_value = FAIL; - struct xran_ecpri_delay_meas_pl *txDelayHdr; struct rte_mbuf *pkt1; - char* pChar= NULL; + //char* pChar= NULL; uint64_t tcv1,tr2m, tcv2, t1; struct xran_ecpri_del_meas_pkt *pdm; - struct timespec tr2, tr; + struct timespec tr2; struct rte_ether_hdr *eth_hdr; struct rte_ether_addr addr; TimeStamp pt1; @@ -1271,7 +1258,7 @@ int xran_process_delmeas_follow_up(struct rte_mbuf *pkt, void* handle, struct xr // 2) Copy MeasurementID to the Delay Measurement Response packet // but first prepend ethernet header since the info is still in the buffer - pChar = rte_pktmbuf_prepend(pkt, (uint16_t)sizeof(struct rte_ether_hdr)); + /*pChar = */rte_pktmbuf_prepend(pkt, (uint16_t)sizeof(struct rte_ether_hdr)); pkt1 = rte_pktmbuf_copy(pkt, _eth_mbuf_pool, 0, UINT32_MAX); pdm = (struct xran_ecpri_del_meas_pkt*)rte_pktmbuf_mtod_offset(pkt1, struct xran_ecpri_del_meas_pkt*, sizeof(struct rte_ether_hdr)); @@ -1359,13 +1346,13 @@ int process_delay_meas(struct rte_mbuf *pkt, void* handle, uint16_t port_id) { struct xran_device_ctx * p_xran_dev_ctx = (struct xran_device_ctx *)handle; struct xran_ecpri_del_meas_pkt *ecpri_delmeas_pkt; - union xran_ecpri_cmn_hdr * ecpricmn; + //union xran_ecpri_cmn_hdr * ecpricmn; int ret_value = FAIL; #ifdef XRAN_OWD_DEBUG_PKTS printf("pdm Device is %d\n", p_xran_dev_ctx->fh_init.io_cfg.id); #endif - /* Process eCPRI cmn header. */ + /* Process eCPRI cmn header. */ // (void *)rte_pktmbuf_adj(pkt, sizeof(*ecpricmn)); ecpri_delmeas_pkt = (struct xran_ecpri_del_meas_pkt *)rte_pktmbuf_mtod(pkt, struct xran_ecpri_del_meas_pkt *); // The processing of the delay measurement here corresponds to eCPRI sections 3.2.4.6.2 and 3.42.6.3 diff --git a/fhi_lib/lib/src/xran_dev.c b/fhi_lib/lib/src/xran_dev.c index fef64c8..4acade1 100644 --- a/fhi_lib/lib/src/xran_dev.c +++ b/fhi_lib/lib/src/xran_dev.c @@ -53,7 +53,7 @@ #include "ethdi.h" #include "xran_printf.h" -static struct xran_device_ctx *g_xran_dev_ctx[XRAN_PORTS_NUM] = {NULL, NULL, NULL, NULL}; +static struct xran_device_ctx *g_xran_dev_ctx[XRAN_PORTS_NUM] = {NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL}; int32_t xran_dev_create_ctx(uint32_t xran_ports_num) @@ -102,7 +102,7 @@ struct xran_device_ctx *xran_dev_get_ctx_by_id(uint32_t xran_port_id) return g_xran_dev_ctx[xran_port_id]; } -static struct xran_fh_config *xran_lib_get_ctx_fhcfg(void *pHandle) +static inline struct xran_fh_config *xran_lib_get_ctx_fhcfg(void *pHandle) { struct xran_device_ctx * p_dev_ctx = (struct xran_device_ctx*)pHandle; return (&(p_dev_ctx->fh_cfg)); @@ -415,7 +415,7 @@ xran_init_vf_rxq_to_pcid_mapping(void *pHandle) int32_t xran_init_vfs_mapping(void *pHandle) { - int ctx, dir, cc, ant, i; + int dir, cc, ant, i; struct xran_device_ctx* p_dev = NULL; uint8_t xran_port_id = 0; uint16_t vf_id = 0; @@ -452,7 +452,7 @@ xran_init_vfs_mapping(void *pHandle) for(dir=0; dir < 2; dir++){ for(cc=0; cc < xran_get_num_cc(p_dev); cc++){ for(ant=0; ant < xran_get_num_eAxc(p_dev)*2 + xran_get_num_ant_elm(p_dev); ant++){ - if(total_vf_cnt = 2 && eth_ctx->io_cfg.one_vf_cu_plane){ + if((total_vf_cnt == 2) && eth_ctx->io_cfg.one_vf_cu_plane){ if(ant & 1) { /* split ant half and half on VFs */ vf_id = vf_id_all[XRAN_UP_VF+1]; xran_set_map_ecpriPcid_to_vf(p_dev, dir, cc, ant, vf_id); diff --git a/fhi_lib/lib/src/xran_dev.h b/fhi_lib/lib/src/xran_dev.h index 7d3412f..0371a53 100644 --- a/fhi_lib/lib/src/xran_dev.h +++ b/fhi_lib/lib/src/xran_dev.h @@ -72,7 +72,7 @@ struct xran_timer_ctx { uint64_t current_second; }; -#define XRAN_MAX_POOLS_PER_SECTOR_NR 8 /**< 2x(TX_OUT, RX_IN, PRACH_IN, SRS_IN) with C-plane */ +#define XRAN_MAX_POOLS_PER_SECTOR_NR 10 /**< 2x(TX_OUT, RX_IN, PRACH_IN, SRS_IN, BFW_BUF) with C-plane */ typedef struct sectorHandleInfo { @@ -91,7 +91,7 @@ typedef struct sectorHandleInfo }XranSectorHandleInfo, *PXranSectorHandleInfo; typedef void (*XranSymCallbackFn)(struct rte_timer *tim, void* arg, void *p_dev_ctx); -typedef int32_t (*tx_sym_gen_fn)(void* pHandle, uint8_t ctx_id, uint32_t tti, int32_t num_cc, int32_t num_ant, uint32_t frame_id, +typedef int32_t (*tx_sym_gen_fn)(void* pHandle, uint8_t ctx_id, uint32_t tti, int32_t start_cc, int32_t num_cc, int32_t start_ant, int32_t num_ant, uint32_t frame_id, uint32_t subframe_id, uint32_t slot_id, uint32_t sym_id, enum xran_comp_hdr_type compType, enum xran_pkt_dir direction, uint16_t xran_port_id, PSECTION_DB_TYPE p_sec_db); @@ -134,6 +134,8 @@ typedef struct { #define XRAN_IQ_FLOW_MAX 512 /**< Maximum flow IQ flows per XRAN port */ +#define XRAN_MAX_MEM_IF_RING_SIZE 8*32 + struct mbuf_table { uint16_t len; struct rte_mbuf *m_table[MBUF_TABLE_SIZE]; @@ -173,6 +175,17 @@ struct xran_shared_data_srs_t { struct rte_mbuf_ext_shared_info sh_data[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR]; }; + +/** Structure to hold the information for tracking the prb element processing across symbols. + * C-Plane processing for every slot is spread equally across symbols that fall within allowed window. + * This structure is used to keep track of processing that is done. + */ +struct xran_prb_elm_proc_info_t { + uint16_t nPrbElmPerSym; /**< Number of prb elements to be processed per symbol */ + uint16_t nPrbElmProcessed; /**< Holds the number of PrbElms Processed in a given symbol time by xran. */ + uint8_t numSymsRemaining; /**< Number of symbols for DL CP transmission remaining in this slot */ +}; + struct __rte_cache_aligned xran_device_ctx { uint8_t sector_id; @@ -181,16 +194,20 @@ struct __rte_cache_aligned xran_device_ctx struct xran_fh_init fh_init; struct xran_fh_config fh_cfg; struct xran_prach_cp_config PrachCPConfig; + struct xran_prach_cp_config PrachCPConfigLTE; uint32_t enablePrach; uint32_t enableCP; int32_t DynamicSectionEna; + int32_t RunSlotPrbMapBySymbolEnable; int64_t offset_sec; int64_t offset_nsec; //offset to GPS time calcuated based on alpha and beta uint32_t interval_us_local; uint32_t enableSrs; + uint16_t enableSrsCp; + uint16_t nSrsDelaySym; uint8_t puschMaskEnable; uint8_t puschMaskSlot; struct xran_srs_config srs_cfg; /** configuration of SRS */ @@ -205,6 +222,9 @@ struct __rte_cache_aligned xran_device_ctx BbuIoBufCtrlStruct sFHSrsRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR]; BbuIoBufCtrlStruct sFHSrsRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR]; + BbuIoBufCtrlStruct sFHCpRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR]; + BbuIoBufCtrlStruct sFHCpTxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR]; + /* buffers lists */ struct xran_flat_buffer sFrontHaulTxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT]; struct xran_flat_buffer sFrontHaulTxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT]; @@ -216,6 +236,8 @@ struct __rte_cache_aligned xran_device_ctx struct xran_flat_buffer sFHSrsRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT]; struct xran_flat_buffer sFHSrsRxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR]; + // struct xran_flat_buffer sFHCpRxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR]; + xran_transport_callback_fn pCallback[XRAN_MAX_SECTOR_NR]; void *pCallbackTag[XRAN_MAX_SECTOR_NR]; @@ -227,6 +249,8 @@ struct __rte_cache_aligned xran_device_ctx LIST_HEAD(sym_cb_elem_list, cb_elem_entry) sym_cb_list_head[XRAN_NUM_OF_SYMBOL_PER_SLOT]; + uint8_t numSetBFWs_arr[XRAN_MAX_SECTIONS_PER_SLOT]; + int32_t sym_up; /**< when we start sym 0 of up with respect to OTA time as measured in symbols */ int32_t sym_up_ul; @@ -250,8 +274,8 @@ struct __rte_cache_aligned xran_device_ctx struct xran_common_counters fh_counters; - xran_ethdi_mbuf_send_fn send_cpmbuf2ring; /**< callback to send mbufs of C-Plane packets to the ring */ - xran_ethdi_mbuf_send_fn send_upmbuf2ring; /**< callback to send mbufs of U-Plane packets to the ring */ + xran_ethdi_mbuf_send_fn send_cpmbuf2ring; /**< callback to send mbufs of C-Plane packets to the VF ring */ + xran_ethdi_mbuf_send_fn send_upmbuf2ring; /**< callback to send mbufs of U-Plane packets to the VF ring */ struct xran_timer_ctx timer_ctx[MAX_NUM_OF_XRAN_CTX]; struct xran_timer_ctx cb_timer_ctx[MAX_CB_TIMER_CTX]; @@ -283,6 +307,19 @@ struct __rte_cache_aligned xran_device_ctx struct rte_flow *p_iq_flow[XRAN_IQ_FLOW_MAX]; uint32_t iq_flow_cnt; /**< number of IQ flows configured */ + + uint8_t ndm_srs_scheduled; /* set if SRS has been scheduled */ + uint8_t ndm_srs_schedperiod; /* SRS slot within TDD period */ + uint32_t ndm_srs_txtti; /* first slot for transmit SRS within TDD period */ + uint32_t ndm_srs_tti; /* original SRS slot */ + uint8_t numSymsForDlCP; /**< number of symbols for DL CP transmission */ + struct xran_prb_elm_proc_info_t prbElmProcInfo[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR]; + + uint8_t dssEnable; /**< enable DSS (extension-9) */ + uint8_t dssPeriod; /**< DSS pattern period for LTE/NR */ + uint8_t technology[XRAN_MAX_DSS_PERIODICITY]; /**< technology array represents slot is LTE(0)/NR(1) */ + /* Keeps track of how many sections are processed while parsing C-plan packet */ + uint8_t sectiondb_elm[XRAN_MAX_SECTIONDB_CTX][XRAN_DIR_MAX][XRAN_COMPONENT_CARRIERS_MAX][XRAN_MAX_ANTENNA_NR * 2 + XRAN_MAX_ANT_ARRAY_ELM_NR]; }; struct xran_eaxcid_config *xran_get_conf_eAxC(void *pHandle); diff --git a/fhi_lib/lib/src/xran_frame_struct.c b/fhi_lib/lib/src/xran_frame_struct.c index f531fb0..fbb1298 100644 --- a/fhi_lib/lib/src/xran_frame_struct.c +++ b/fhi_lib/lib/src/xran_frame_struct.c @@ -76,6 +76,7 @@ static uint16_t nTtiInterval[4] = 125 // mu = 3 }; +#if 0 // F1 Tables 38.101-1 Table F.5.3. Window length for normal CP static uint16_t nCpSizeF1[3][13][2] = { @@ -92,16 +93,18 @@ static int16_t nCpSizeF2[2][4][2] = { {0, 0}, {104, 72}, {208, 144}, {416, 288}}, // Numerology 2 (60KHz) {{68, 36}, {136, 72}, {272, 144}, {544, 288}}, // Numerology 3 (120KHz) }; +#endif -static uint32_t xran_fs_max_slot_num[XRAN_PORTS_NUM] = {8000, 8000, 8000, 8000}; -static uint32_t xran_fs_max_slot_num_SFN[XRAN_PORTS_NUM] = {20480,20480,20480,20480}; /* max slot number counted as SFN is 0-1023 */ -static uint16_t xran_fs_num_slot_tdd_loop[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR] = { XRAN_NUM_OF_SLOT_IN_TDD_LOOP }; -static uint16_t xran_fs_num_dl_sym_sp[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SLOT_IN_TDD_LOOP] = {0}; -static uint16_t xran_fs_num_ul_sym_sp[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SLOT_IN_TDD_LOOP] = {0}; -static uint8_t xran_fs_slot_type[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SLOT_IN_TDD_LOOP] = {{XRAN_SLOT_TYPE_INVALID}}; -static uint8_t xran_fs_slot_symb_type[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SLOT_IN_TDD_LOOP][XRAN_NUM_OF_SYMBOL_PER_SLOT] = {{{XRAN_SLOT_TYPE_INVALID}}}; -static float xran_fs_ul_rate[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR] = {0.0}; -static float xran_fs_dl_rate[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR] = {0.0}; + +static uint32_t xran_fs_max_slot_num[XRAN_PORTS_NUM] = {8000, 8000, 8000, 8000, 8000, 8000, 8000, 8000}; +static uint32_t xran_fs_max_slot_num_SFN[XRAN_PORTS_NUM] = {20480,20480,20480,20480,20480,20480,20480,20480}; /* max slot number counted as SFN is 0-1023 */ +static uint16_t xran_fs_num_slot_tdd_loop[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR] = {{ XRAN_NUM_OF_SLOT_IN_TDD_LOOP }}; +static uint16_t xran_fs_num_dl_sym_sp[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SLOT_IN_TDD_LOOP] = {{{0}}}; +static uint16_t xran_fs_num_ul_sym_sp[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SLOT_IN_TDD_LOOP] = {{{0}}}; +static uint8_t xran_fs_slot_type[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SLOT_IN_TDD_LOOP] = {{{XRAN_SLOT_TYPE_INVALID}}}; +static uint8_t xran_fs_slot_symb_type[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SLOT_IN_TDD_LOOP][XRAN_NUM_OF_SYMBOL_PER_SLOT] = {{{{XRAN_SLOT_TYPE_INVALID}}}}; +static float xran_fs_ul_rate[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR] = {{0.0}}; +static float xran_fs_dl_rate[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR] = {{0.0}}; extern uint16_t xran_max_frame; @@ -348,7 +351,9 @@ int32_t xran_fs_set_slot_type(uint32_t PortId, uint32_t nPhyInstanceId, uint32_t uint32_t nSlotNum, nSymNum, nVal, i, j; uint32_t numDlSym, numUlSym, numGuardSym; uint32_t numDlSlots = 0, numUlSlots = 0, numSpDlSlots = 0, numSpUlSlots = 0, numSpSlots = 0; +#ifdef PRINTF_DBG_OK char sSlotPattern[XRAN_SLOT_TYPE_LAST][10] = {"IN\0", "DL\0", "UL\0", "SP\0", "FD\0"}; +#endif // nPhyInstanceId Carrier ID // nFrameDuplexType 0 = FDD 1 = TDD @@ -507,7 +512,7 @@ int32_t xran_fs_get_slot_type(uint32_t PortId, int32_t nCellIdx, int32_t nSlotdx int32_t xran_fs_get_symbol_type(uint32_t PortId, int32_t nCellIdx, int32_t nSlotdx, int32_t nSymbIdx) { - int32_t nSfIdxMod, nSfType, ret = 0; + int32_t nSfIdxMod; nSfIdxMod = xran_fs_slot_limit(PortId, nSlotdx) % ((xran_fs_num_slot_tdd_loop[PortId][nCellIdx] > 0) ? xran_fs_num_slot_tdd_loop[PortId][nCellIdx]: 1); diff --git a/fhi_lib/lib/src/xran_main.c b/fhi_lib/lib/src/xran_main.c index 89dcc1f..7c472d7 100644 --- a/fhi_lib/lib/src/xran_main.c +++ b/fhi_lib/lib/src/xran_main.c @@ -36,7 +36,7 @@ #include #include #include - +#include #include #include #include @@ -52,6 +52,7 @@ #include #endif #include "xran_fh_o_du.h" +#include "xran_fh_o_ru.h" #include "xran_main.h" #include "ethdi.h" @@ -68,7 +69,6 @@ #include "xran_dev.h" #include "xran_frame_struct.h" #include "xran_printf.h" -#include "xran_app_frag.h" #include "xran_cp_proc.h" #include "xran_tx_proc.h" #include "xran_rx_proc.h" @@ -77,13 +77,13 @@ #include "xran_mlog_lnx.h" -static xran_cc_handle_t pLibInstanceHandles[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR] = {NULL}; +static xran_cc_handle_t pLibInstanceHandles[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR] = {{NULL}}; uint64_t interval_us = 1000; //the TTI interval of the cell with maximum numerology -uint32_t xran_lib_ota_tti[XRAN_PORTS_NUM] = {0,0,0,0}; /**< Slot index in a second [0:(1000000/TTI-1)] */ -uint32_t xran_lib_ota_sym[XRAN_PORTS_NUM] = {0,0,0,0}; /**< Symbol index in a slot [0:13] */ -uint32_t xran_lib_ota_sym_idx[XRAN_PORTS_NUM] = {0,0,0,0}; /**< Symbol index in a second [0 : 14*(1000000/TTI)-1] +uint32_t xran_lib_ota_tti[XRAN_PORTS_NUM] = {0,0,0,0,0,0,0,0}; /**< Slot index in a second [0:(1000000/TTI-1)] */ +uint32_t xran_lib_ota_sym[XRAN_PORTS_NUM] = {0,0,0,0,0,0,0,0}; /**< Symbol index in a slot [0:13] */ +uint32_t xran_lib_ota_sym_idx[XRAN_PORTS_NUM] = {0,0,0,0,0,0,0,0}; /**< Symbol index in a second [0 : 14*(1000000/TTI)-1] where TTI is TTI interval in microseconds */ uint16_t xran_SFN_at_Sec_Start = 0; /**< SFN at current second start */ @@ -92,7 +92,8 @@ uint16_t xran_max_frame = 1023; /**< value of max frame used. expected static uint64_t xran_total_tick = 0, xran_used_tick = 0; static uint32_t xran_num_cores_used = 0; static uint32_t xran_core_used[64] = {0}; -static int32_t first_call = 0; +int32_t first_call = 0; +int32_t mlogxranenable = 0; struct cp_up_tx_desc * xran_pkt_gen_desc_alloc(void); int32_t xran_pkt_gen_desc_free(struct cp_up_tx_desc *p_desc); @@ -126,6 +127,7 @@ xran_updateSfnSecStart(void) } } +#if 0 static inline int32_t xran_getSlotIdxSecond(uint32_t interval) { @@ -133,6 +135,7 @@ xran_getSlotIdxSecond(uint32_t interval) int32_t slotIndxSecond = frameIdxSecond * SLOTS_PER_SYSTEMFRAME(interval); return slotIndxSecond; } +#endif enum xran_if_state xran_get_if_state(void) @@ -191,9 +194,15 @@ xran_init_srs(struct xran_fh_config* pConf, struct xran_device_ctx * p_xran_dev_ struct xran_srs_config *p_srs = &(p_xran_dev_ctx->srs_cfg); if(p_srs){ - p_srs->symbMask = pConf->srs_conf.symbMask; + p_srs->symbMask = pConf->srs_conf.symbMask; /* deprecated */ + p_srs->slot = pConf->srs_conf.slot; + p_srs->ndm_offset = pConf->srs_conf.ndm_offset; + p_srs->ndm_txduration = pConf->srs_conf.ndm_txduration; p_srs->eAxC_offset = pConf->srs_conf.eAxC_offset; - print_dbg("SRS sym %d\n", p_srs->symbMask ); + + print_dbg("SRS sym %d\n", p_srs->slot); + print_dbg("SRS NDM offset %d\n", p_srs->ndm_offset); + print_dbg("SRS NDM Tx %d\n", p_srs->ndm_txduration); print_dbg("SRS eAxC_offset %d\n", p_srs->eAxC_offset); } return (XRAN_STATUS_SUCCESS); @@ -203,20 +212,34 @@ int32_t xran_init_prach_lte(struct xran_fh_config* pConf, struct xran_device_ctx * p_xran_dev_ctx) { /* update Rach for LTE */ - return xran_init_prach(pConf, p_xran_dev_ctx); + return xran_init_prach(pConf, p_xran_dev_ctx, XRAN_RAN_LTE); } int32_t -xran_init_prach(struct xran_fh_config* pConf, struct xran_device_ctx * p_xran_dev_ctx) +xran_init_prach(struct xran_fh_config* pConf, struct xran_device_ctx * p_xran_dev_ctx, enum xran_ran_tech xran_tech) { int32_t i; uint8_t slotNr; struct xran_prach_config* pPRACHConfig = &(pConf->prach_conf); const xRANPrachConfigTableStruct *pxRANPrachConfigTable; uint8_t nNumerology = pConf->frame_conf.nNumerology; - uint8_t nPrachConfIdx = pPRACHConfig->nPrachConfIdx; - struct xran_prach_cp_config *pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfig); - + uint8_t nPrachConfIdx = -1;// = pPRACHConfig->nPrachConfIdx; + struct xran_prach_cp_config *pPrachCPConfig = NULL; + if(pConf->dssEnable){ + /*Check Slot type and */ + if(xran_tech == XRAN_RAN_5GNR){ + pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfig); + nPrachConfIdx = pPRACHConfig->nPrachConfIdx; + } + else{ + pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfigLTE); + nPrachConfIdx = pPRACHConfig->nPrachConfIdxLTE; + } + } + else{ + pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfig); + nPrachConfIdx = pPRACHConfig->nPrachConfIdx; + } if (nNumerology > 2) pxRANPrachConfigTable = &gxranPrachDataTable_mmw[nPrachConfIdx]; else if (pConf->frame_conf.nFrameDuplexType == 1) @@ -230,7 +253,18 @@ xran_init_prach(struct xran_fh_config* pConf, struct xran_device_ctx * p_xran_de if(pConf->log_level) printf("xRAN open PRACH config: Numerology %u ConfIdx %u, preambleFmrt %u startsymb %u, numSymbol %u, occassionsInPrachSlot %u\n", nNumerology, nPrachConfIdx, preambleFmrt, pxRANPrachConfigTable->startingSym, pxRANPrachConfigTable->duration, pxRANPrachConfigTable->occassionsInPrachSlot); + if (preambleFmrt <= 2) + { + pPrachCPConfig->filterIdx = XRAN_FILTERINDEX_PRACH_012; // 1 PRACH preamble format 0 1 2 + } + else if (preambleFmrt == 3) + { + pPrachCPConfig->filterIdx = XRAN_FILTERINDEX_PRACH_3; // 1 PRACH preamble format 3 + } + else + { pPrachCPConfig->filterIdx = XRAN_FILTERINDEX_PRACH_ABC; // 3, PRACH preamble format A1~3, B1~4, C0, C2 + } pPrachCPConfig->startSymId = pxRANPrachConfigTable->startingSym; pPrachCPConfig->startPrbc = pPRACHConfig->nPrachFreqStart; pPrachCPConfig->numPrbc = (preambleFmrt >= FORMAT_A1)? 12 : 70; @@ -326,7 +360,7 @@ void sym_ota_cb(struct rte_timer *tim, void *arg, unsigned long *used_tick) { struct xran_device_ctx * p_xran_dev_ctx = (struct xran_device_ctx *)arg; - long t1 = MLogTick(), t2; + long t1 = MLogXRANTick(), t2; long t3; if(XranGetSymNum(xran_lib_ota_sym_idx[p_xran_dev_ctx->xran_port_id], XRAN_NUM_OF_SYMBOL_PER_SLOT) == 0){ @@ -350,8 +384,8 @@ sym_ota_cb(struct rte_timer *tim, void *arg, unsigned long *used_tick) } } - t2 = MLogTick(); - MLogTask(PID_SYM_OTA_CB, t1, t2); + t2 = MLogXRANTick(); + MLogXRANTask(PID_SYM_OTA_CB, t1, t2); } uint32_t @@ -421,10 +455,8 @@ tti_ota_cb(struct rte_timer *tim, void *arg) uint32_t mlogVar[10]; uint32_t mlogVarCnt = 0; uint64_t t1 = MLogTick(); - uint64_t t3 = 0; uint32_t reg_tti = 0; uint32_t reg_sfn = 0; - uint32_t i; struct xran_device_ctx * p_xran_dev_ctx = (struct xran_device_ctx *)arg; struct xran_timer_ctx *pTCtx = (struct xran_timer_ctx *)p_xran_dev_ctx->timer_ctx; @@ -455,6 +487,20 @@ tti_ota_cb(struct rte_timer *tim, void *arg) pTCtx[(xran_lib_ota_tti[PortId] & 1) ^ 1].tti_to_process = xran_lib_ota_tti[PortId]; + /** tti as seen from PHY */ + int32_t nSfIdx = -1; + uint32_t nFrameIdx; + uint32_t nSubframeIdx; + uint32_t nSlotIdx; + uint64_t nSecond; + uint8_t Numerlogy = p_xran_dev_ctx->fh_cfg.frame_conf.nNumerology; + uint8_t nNrOfSlotInSf = 1<timer_ctx[0]; + uint32_t interval_us_local = p_xran_dev_ctx->interval_us_local; + uint8_t PortId = p_xran_dev_ctx->xran_port_id; + pHandle = p_xran_dev_ctx; + + num_eAxc = xran_get_num_eAxc(pHandle); + num_CCPorts = xran_get_num_cc(pHandle); + + if(first_call && p_xran_dev_ctx->enableCP) + { + tti = nSlotIdx ;//pTCtx[(xran_lib_ota_tti[PortId] & 1) ^ 1].tti_to_process; + buf_id = tti % XRAN_N_FE_BUF_LEN; + + slot_id = XranGetSlotNum(tti, SLOTNUM_PER_SUBFRAME(interval_us_local)); + subframe_id = XranGetSubFrameNum(tti,SLOTNUM_PER_SUBFRAME(interval_us_local), SUBFRAMES_PER_SYSTEMFRAME); + frame_id = XranGetFrameNum(tti,xran_getSfnSecStart(),SUBFRAMES_PER_SYSTEMFRAME, SLOTNUM_PER_SUBFRAME(interval_us_local)); + if (tti == 0) + { + /* Wrap around to next second */ + frame_id = (frame_id + NUM_OF_FRAMES_PER_SECOND) & 0x3ff; + } + + ctx_id = tti % XRAN_MAX_SECTIONDB_CTX; + + print_dbg("[%d]SFN %d sf %d slot %d\n", tti, frame_id, subframe_id, slot_id); +#if defined(__INTEL_COMPILER) +#pragma vector always +#endif + for(ant_id = nAntStart; (ant_id < (nAntStart + nAntNum) && ant_id < num_eAxc); ++ant_id) { + for(cc_id = nCcStart; (cc_id < (nCcStart + nCcNum) && cc_id < num_CCPorts); cc_id++) { + /* start new section information list */ + xran_cp_reset_section_info(pHandle, XRAN_DIR_DL, cc_id, ant_id, ctx_id); + if(xran_fs_get_slot_type(PortId, cc_id, tti, XRAN_SLOT_TYPE_DL) == 1) { + if(p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[buf_id][cc_id][ant_id].sBufferList.pBuffers) { + if(p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[buf_id][cc_id][ant_id].sBufferList.pBuffers->pData) { + /*num_list = */xran_cp_create_and_send_section(pHandle, ant_id, XRAN_DIR_DL, tti, cc_id, + (struct xran_prb_map *)p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[buf_id][cc_id][ant_id].sBufferList.pBuffers->pData, + &(p_xran_dev_ctx->prbElmProcInfo[buf_id][cc_id][ant_id]), + p_xran_dev_ctx->fh_cfg.ru_conf.xranCat, ctx_id); + } else { + print_err("[%d]SFN %d sf %d slot %d: ant_id %d cc_id %d [pData]\n", tti, frame_id, subframe_id, slot_id, ant_id, cc_id); + } + } else { + print_err("[%d]SFN %d sf %d slot %d: ant_id %d cc_id %d [pBuffers] \n", tti, frame_id, subframe_id, slot_id, ant_id, cc_id); + } + } /* if(xran_fs_get_slot_type(cc_id, tti, XRAN_SLOT_TYPE_DL) == 1) */ + } /* for(cc_id = 0; cc_id < num_CCPorts; cc_id++) */ + } /* for(ant_id = 0; ant_id < num_eAxc; ++ant_id) */ + MLogXRANTask(PID_CP_DL_CB, t1, MLogXRANTick()); + } + return ret; } void tx_cp_dl_cb(struct rte_timer *tim, void *arg) { - long t1 = MLogTick(); + long t1 = MLogXRANTick(); int tti, buf_id; uint32_t slot_id, subframe_id, frame_id; int cc_id; uint8_t ctx_id; uint8_t ant_id, num_eAxc, num_CCPorts; void *pHandle; - int num_list; + //int num_list; struct xran_device_ctx * p_xran_dev_ctx = (struct xran_device_ctx *)arg; - if(!p_xran_dev_ctx) + + if(unlikely(!p_xran_dev_ctx)) { print_err("Null xRAN context!!\n"); return; } + + if (p_xran_dev_ctx->fh_init.io_cfg.bbu_offload) + return; + struct xran_timer_ctx *pTCtx = (struct xran_timer_ctx *)&p_xran_dev_ctx->timer_ctx[0]; uint32_t interval_us_local = p_xran_dev_ctx->interval_us_local; uint8_t PortId = p_xran_dev_ctx->xran_port_id; @@ -527,58 +653,222 @@ tx_cp_dl_cb(struct rte_timer *tim, void *arg) num_eAxc = xran_get_num_eAxc(pHandle); num_CCPorts = xran_get_num_cc(pHandle); - if(first_call && p_xran_dev_ctx->enableCP) { - + if(first_call && p_xran_dev_ctx->enableCP) + { tti = pTCtx[(xran_lib_ota_tti[PortId] & 1) ^ 1].tti_to_process; buf_id = tti % XRAN_N_FE_BUF_LEN; slot_id = XranGetSlotNum(tti, SLOTNUM_PER_SUBFRAME(interval_us_local)); subframe_id = XranGetSubFrameNum(tti,SLOTNUM_PER_SUBFRAME(interval_us_local), SUBFRAMES_PER_SYSTEMFRAME); frame_id = XranGetFrameNum(tti,xran_getSfnSecStart(),SUBFRAMES_PER_SYSTEMFRAME, SLOTNUM_PER_SUBFRAME(interval_us_local)); - if (tti == 0){ + if (tti == 0) + { /* Wrap around to next second */ frame_id = (frame_id + NUM_OF_FRAMES_PER_SECOND) & 0x3ff; } - ctx_id = XranGetSlotNum(tti, SLOTS_PER_SYSTEMFRAME(interval_us_local)) % XRAN_MAX_SECTIONDB_CTX; + ctx_id = tti % XRAN_MAX_SECTIONDB_CTX; print_dbg("[%d]SFN %d sf %d slot %d\n", tti, frame_id, subframe_id, slot_id); for(ant_id = 0; ant_id < num_eAxc; ++ant_id) { for(cc_id = 0; cc_id < num_CCPorts; cc_id++ ) { - /* start new section information list */ + if(0== p_xran_dev_ctx->prbElmProcInfo[buf_id][cc_id][ant_id].numSymsRemaining) + {/* Start of new slot - reset the section info */ xran_cp_reset_section_info(pHandle, XRAN_DIR_DL, cc_id, ant_id, ctx_id); + } if(xran_fs_get_slot_type(PortId, cc_id, tti, XRAN_SLOT_TYPE_DL) == 1) { if(p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[buf_id][cc_id][ant_id].sBufferList.pBuffers) { if(p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[buf_id][cc_id][ant_id].sBufferList.pBuffers->pData){ - num_list = xran_cp_create_and_send_section(pHandle, ant_id, XRAN_DIR_DL, tti, cc_id, + /*num_list = */xran_cp_create_and_send_section(pHandle, ant_id, XRAN_DIR_DL, tti, cc_id, (struct xran_prb_map *)p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[buf_id][cc_id][ant_id].sBufferList.pBuffers->pData, + &(p_xran_dev_ctx->prbElmProcInfo[buf_id][cc_id][ant_id]), p_xran_dev_ctx->fh_cfg.ru_conf.xranCat, ctx_id); - } else { - print_err("[%d]SFN %d sf %d slot %d: ant_id %d cc_id %d [pData]\n", tti, frame_id, subframe_id, slot_id, ant_id, cc_id); } - } else { - print_err("[%d]SFN %d sf %d slot %d: ant_id %d cc_id %d [pBuffers] \n", tti, frame_id, subframe_id, slot_id, ant_id, cc_id); + else + print_err("[%d]SFN %d sf %d slot %d: ant_id %d cc_id %d [pData]\n", tti, frame_id, subframe_id, slot_id, ant_id, cc_id); } } /* if(xran_fs_get_slot_type(cc_id, tti, XRAN_SLOT_TYPE_DL) == 1) */ } /* for(cc_id = 0; cc_id < num_CCPorts; cc_id++) */ } /* for(ant_id = 0; ant_id < num_eAxc; ++ant_id) */ - MLogTask(PID_CP_DL_CB, t1, MLogTick()); + MLogXRANTask(PID_CP_DL_CB, t1, MLogXRANTick()); + } +} + +void +rx_ul_static_srs_cb(struct rte_timer *tim, void *arg) +{ + long t1 = MLogXRANTick(); + struct xran_device_ctx * p_xran_dev_ctx = (struct xran_device_ctx *)arg; + xran_status_t status = 0; + int32_t rx_tti = 0;// = (int32_t)XranGetTtiNum(xran_lib_ota_sym_idx, XRAN_NUM_OF_SYMBOL_PER_SLOT); + int32_t cc_id = 0; + //uint32_t nFrameIdx; + //uint32_t nSubframeIdx; + //uint32_t nSlotIdx; + //uint64_t nSecond; + struct xran_timer_ctx* p_timer_ctx = NULL; + + if(p_xran_dev_ctx->xran2phy_mem_ready == 0) + return; + + p_timer_ctx = &p_xran_dev_ctx->cb_timer_ctx[p_xran_dev_ctx->timer_put++ % MAX_CB_TIMER_CTX]; + + if (p_xran_dev_ctx->timer_put >= MAX_CB_TIMER_CTX) + p_xran_dev_ctx->timer_put = 0; + + rx_tti = p_timer_ctx->tti_to_process; + + if(rx_tti == 0) + rx_tti = (xran_fs_get_max_slot_SFN(p_xran_dev_ctx->xran_port_id)-1); + else + rx_tti -= 1; /* end of RX for prev TTI as measured against current OTA time */ + + /* U-Plane */ + for(cc_id = 0; cc_id < xran_get_num_cc(p_xran_dev_ctx); cc_id++) { + + if(0 == p_xran_dev_ctx->enableSrsCp) + { + if(p_xran_dev_ctx->pSrsCallback[cc_id]){ + struct xran_cb_tag *pTag = p_xran_dev_ctx->pSrsCallbackTag[cc_id]; + if(pTag) { + //pTag->cellId = cc_id; + pTag->slotiId = rx_tti; + pTag->symbol = XRAN_FULL_CB_SYM; /* last 7 sym means full slot of Symb */ + p_xran_dev_ctx->pSrsCallback[cc_id](p_xran_dev_ctx->pSrsCallbackTag[cc_id], status); + } + } + } + } + MLogXRANTask(PID_UP_STATIC_SRS_DEAD_LINE_CB, t1, MLogXRANTick()); +} + + + +void +rx_ul_deadline_one_fourths_cb(struct rte_timer *tim, void *arg) +{ + long t1 = MLogXRANTick(); + struct xran_device_ctx * p_xran_dev_ctx = (struct xran_device_ctx *)arg; + xran_status_t status; + /* half of RX for current TTI as measured against current OTA time */ + int32_t rx_tti; + int32_t cc_id; + //uint32_t nFrameIdx; + //uint32_t nSubframeIdx; + //uint32_t nSlotIdx; + //uint64_t nSecond; + struct xran_timer_ctx* p_timer_ctx = NULL; + /*xran_get_slot_idx(&nFrameIdx, &nSubframeIdx, &nSlotIdx, &nSecond); + rx_tti = nFrameIdx*SUBFRAMES_PER_SYSTEMFRAME*SLOTNUM_PER_SUBFRAME + + nSubframeIdx*SLOTNUM_PER_SUBFRAME + + nSlotIdx;*/ + if(p_xran_dev_ctx->xran2phy_mem_ready == 0) + return; + + p_timer_ctx = &p_xran_dev_ctx->cb_timer_ctx[p_xran_dev_ctx->timer_put++ % MAX_CB_TIMER_CTX]; + if (p_xran_dev_ctx->timer_put >= MAX_CB_TIMER_CTX) + p_xran_dev_ctx->timer_put = 0; + + rx_tti = p_timer_ctx->tti_to_process; + + for(cc_id = 0; cc_id < xran_get_num_cc(p_xran_dev_ctx); cc_id++) { + if(p_xran_dev_ctx->rx_packet_callback_tracker[rx_tti % XRAN_N_FE_BUF_LEN][cc_id] == 0){ + if(p_xran_dev_ctx->pCallback[cc_id]) { + struct xran_cb_tag *pTag = p_xran_dev_ctx->pCallbackTag[cc_id]; + if(pTag) { + //pTag->cellId = cc_id; + pTag->slotiId = rx_tti; + pTag->symbol = XRAN_ONE_FOURTHS_CB_SYM; + status = XRAN_STATUS_SUCCESS; + + p_xran_dev_ctx->pCallback[cc_id](p_xran_dev_ctx->pCallbackTag[cc_id], status); + } + } + } else { + p_xran_dev_ctx->rx_packet_callback_tracker[rx_tti % XRAN_N_FE_BUF_LEN][cc_id] = 0; + } + } + + if(p_xran_dev_ctx->ttiCb[XRAN_CB_HALF_SLOT_RX]){ + if(p_xran_dev_ctx->SkipTti[XRAN_CB_HALF_SLOT_RX] <= 0){ + p_xran_dev_ctx->ttiCb[XRAN_CB_HALF_SLOT_RX](p_xran_dev_ctx->TtiCbParam[XRAN_CB_HALF_SLOT_RX]); + }else{ + p_xran_dev_ctx->SkipTti[XRAN_CB_HALF_SLOT_RX]--; + } } + + MLogXRANTask(PID_UP_UL_ONE_FOURTHS_DEAD_LINE_CB, t1, MLogXRANTick()); } void rx_ul_deadline_half_cb(struct rte_timer *tim, void *arg) { - long t1 = MLogTick(); + long t1 = MLogXRANTick(); struct xran_device_ctx * p_xran_dev_ctx = (struct xran_device_ctx *)arg; xran_status_t status; /* half of RX for current TTI as measured against current OTA time */ int32_t rx_tti; int32_t cc_id; - uint32_t nFrameIdx; - uint32_t nSubframeIdx; - uint32_t nSlotIdx; - uint64_t nSecond; + //uint32_t nFrameIdx; + //uint32_t nSubframeIdx; + //uint32_t nSlotIdx; + //uint64_t nSecond; + struct xran_timer_ctx* p_timer_ctx = NULL; + /*xran_get_slot_idx(&nFrameIdx, &nSubframeIdx, &nSlotIdx, &nSecond); + rx_tti = nFrameIdx*SUBFRAMES_PER_SYSTEMFRAME*SLOTNUM_PER_SUBFRAME + + nSubframeIdx*SLOTNUM_PER_SUBFRAME + + nSlotIdx;*/ + if(p_xran_dev_ctx->xran2phy_mem_ready == 0) + return; + + p_timer_ctx = &p_xran_dev_ctx->cb_timer_ctx[p_xran_dev_ctx->timer_put++ % MAX_CB_TIMER_CTX]; + if (p_xran_dev_ctx->timer_put >= MAX_CB_TIMER_CTX) + p_xran_dev_ctx->timer_put = 0; + + rx_tti = p_timer_ctx->tti_to_process; + + for(cc_id = 0; cc_id < xran_get_num_cc(p_xran_dev_ctx); cc_id++) { + if(p_xran_dev_ctx->rx_packet_callback_tracker[rx_tti % XRAN_N_FE_BUF_LEN][cc_id] == 0){ + if(p_xran_dev_ctx->pCallback[cc_id]) { + struct xran_cb_tag *pTag = p_xran_dev_ctx->pCallbackTag[cc_id]; + if(pTag) { + //pTag->cellId = cc_id; + pTag->slotiId = rx_tti; + pTag->symbol = XRAN_HALF_CB_SYM; + status = XRAN_STATUS_SUCCESS; + + p_xran_dev_ctx->pCallback[cc_id](p_xran_dev_ctx->pCallbackTag[cc_id], status); + } + } + } else { + p_xran_dev_ctx->rx_packet_callback_tracker[rx_tti % XRAN_N_FE_BUF_LEN][cc_id] = 0; + } + } + + if(p_xran_dev_ctx->ttiCb[XRAN_CB_HALF_SLOT_RX]){ + if(p_xran_dev_ctx->SkipTti[XRAN_CB_HALF_SLOT_RX] <= 0){ + p_xran_dev_ctx->ttiCb[XRAN_CB_HALF_SLOT_RX](p_xran_dev_ctx->TtiCbParam[XRAN_CB_HALF_SLOT_RX]); + }else{ + p_xran_dev_ctx->SkipTti[XRAN_CB_HALF_SLOT_RX]--; + } + } + + MLogXRANTask(PID_UP_UL_HALF_DEAD_LINE_CB, t1, MLogXRANTick()); +} + +void +rx_ul_deadline_three_fourths_cb(struct rte_timer *tim, void *arg) +{ + long t1 = MLogXRANTick(); + struct xran_device_ctx * p_xran_dev_ctx = (struct xran_device_ctx *)arg; + xran_status_t status; + /* half of RX for current TTI as measured against current OTA time */ + int32_t rx_tti; + int32_t cc_id; + //uint32_t nFrameIdx; + //uint32_t nSubframeIdx; + //uint32_t nSlotIdx; + //uint64_t nSecond; struct xran_timer_ctx* p_timer_ctx = NULL; /*xran_get_slot_idx(&nFrameIdx, &nSubframeIdx, &nSlotIdx, &nSecond); rx_tti = nFrameIdx*SUBFRAMES_PER_SYSTEMFRAME*SLOTNUM_PER_SUBFRAME @@ -600,7 +890,7 @@ rx_ul_deadline_half_cb(struct rte_timer *tim, void *arg) if(pTag) { //pTag->cellId = cc_id; pTag->slotiId = rx_tti; - pTag->symbol = 0; /* last 7 sym means full slot of Symb */ + pTag->symbol = XRAN_THREE_FOURTHS_CB_SYM; status = XRAN_STATUS_SUCCESS; p_xran_dev_ctx->pCallback[cc_id](p_xran_dev_ctx->pCallbackTag[cc_id], status); @@ -619,21 +909,21 @@ rx_ul_deadline_half_cb(struct rte_timer *tim, void *arg) } } - MLogTask(PID_UP_UL_HALF_DEAD_LINE_CB, t1, MLogTick()); + MLogXRANTask(PID_UP_UL_THREE_FOURTHS_DEAD_LINE_CB, t1, MLogXRANTick()); } void rx_ul_deadline_full_cb(struct rte_timer *tim, void *arg) { - long t1 = MLogTick(); + long t1 = MLogXRANTick(); struct xran_device_ctx * p_xran_dev_ctx = (struct xran_device_ctx *)arg; xran_status_t status = 0; int32_t rx_tti = 0;// = (int32_t)XranGetTtiNum(xran_lib_ota_sym_idx, XRAN_NUM_OF_SYMBOL_PER_SLOT); int32_t cc_id = 0; - uint32_t nFrameIdx; - uint32_t nSubframeIdx; - uint32_t nSlotIdx; - uint64_t nSecond; + //uint32_t nFrameIdx; + //uint32_t nSubframeIdx; + //uint32_t nSlotIdx; + //uint64_t nSecond; struct xran_timer_ctx* p_timer_ctx = NULL; if(p_xran_dev_ctx->xran2phy_mem_ready == 0) @@ -662,7 +952,7 @@ rx_ul_deadline_full_cb(struct rte_timer *tim, void *arg) if(pTag) { //pTag->cellId = cc_id; pTag->slotiId = rx_tti; - pTag->symbol = 7; /* last 7 sym means full slot of Symb */ + pTag->symbol = XRAN_FULL_CB_SYM; /* last 7 sym means full slot of Symb */ status = XRAN_STATUS_SUCCESS; p_xran_dev_ctx->pCallback[cc_id](p_xran_dev_ctx->pCallbackTag[cc_id], status); } @@ -673,21 +963,24 @@ rx_ul_deadline_full_cb(struct rte_timer *tim, void *arg) if(pTag) { //pTag->cellId = cc_id; pTag->slotiId = rx_tti; - pTag->symbol = 7; /* last 7 sym means full slot of Symb */ + pTag->symbol = XRAN_FULL_CB_SYM; /* last 7 sym means full slot of Symb */ p_xran_dev_ctx->pPrachCallback[cc_id](p_xran_dev_ctx->pPrachCallbackTag[cc_id], status); } } + if(p_xran_dev_ctx->enableSrsCp) + { if(p_xran_dev_ctx->pSrsCallback[cc_id]){ struct xran_cb_tag *pTag = p_xran_dev_ctx->pSrsCallbackTag[cc_id]; if(pTag) { //pTag->cellId = cc_id; pTag->slotiId = rx_tti; - pTag->symbol = 7; /* last 7 sym means full slot of Symb */ + pTag->symbol = XRAN_FULL_CB_SYM; /* last 7 sym means full slot of Symb */ p_xran_dev_ctx->pSrsCallback[cc_id](p_xran_dev_ctx->pSrsCallbackTag[cc_id], status); } } } + } /* user call backs if any */ if(p_xran_dev_ctx->ttiCb[XRAN_CB_FULL_SLOT_RX]){ @@ -698,22 +991,16 @@ rx_ul_deadline_full_cb(struct rte_timer *tim, void *arg) } } - MLogTask(PID_UP_UL_FULL_DEAD_LINE_CB, t1, MLogTick()); + MLogXRANTask(PID_UP_UL_FULL_DEAD_LINE_CB, t1, MLogXRANTick()); } void rx_ul_user_sym_cb(struct rte_timer *tim, void *arg) { - long t1 = MLogTick(); + long t1 = MLogXRANTick(); struct xran_device_ctx * p_dev_ctx = NULL; struct cb_user_per_sym_ctx *p_sym_cb_ctx = (struct cb_user_per_sym_ctx *)arg; - xran_status_t status = 0; int32_t rx_tti = 0; //(int32_t)XranGetTtiNum(xran_lib_ota_sym_idx, XRAN_NUM_OF_SYMBOL_PER_SLOT); - int32_t cc_id = 0; - uint32_t nFrameIdx; - uint32_t nSubframeIdx; - uint32_t nSlotIdx; - uint64_t nSecond; uint32_t interval, ota_sym_idx = 0; uint8_t nNumerology = 0; struct xran_timer_ctx* p_timer_ctx = NULL; @@ -765,105 +1052,332 @@ rx_ul_user_sym_cb(struct rte_timer *tim, void *arg) p_sym_cb_ctx->symCb(p_sym_cb_ctx->symCbParam, p_sym_cb_ctx->symCbTimeInfo); } - MLogTask(PID_UP_UL_USER_DEAD_LINE_CB, t1, MLogTick()); + MLogXRANTask(PID_UP_UL_USER_DEAD_LINE_CB, t1, MLogXRANTick()); } -void -tx_cp_ul_cb(struct rte_timer *tim, void *arg) +int32_t +xran_prepare_cp_ul_slot(uint16_t xran_port_id, uint32_t nSlotIdx, uint32_t nCcStart, uint32_t nCcNum, uint32_t nSymMask, uint32_t nAntStart, + uint32_t nAntNum, uint32_t nSymStart, uint32_t nSymNum) { - long t1 = MLogTick(); + int32_t ret = XRAN_STATUS_SUCCESS; + long t1 = MLogXRANTick(); int tti, buf_id; - int ret; uint32_t slot_id, subframe_id, frame_id; int32_t cc_id; - int ant_id, prach_port_id; + int ant_id, port_id; uint16_t occasionid; uint16_t beam_id; uint8_t num_eAxc, num_CCPorts; uint8_t ctx_id; void *pHandle; - int num_list; + uint32_t interval; + uint8_t PortId; - struct xran_device_ctx * p_xran_dev_ctx = (struct xran_device_ctx *)arg; - if(!p_xran_dev_ctx) + //struct xran_timer_ctx *pTCtx; + struct xran_buffer_list *pBufList; + struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx_by_id(xran_port_id); + if(unlikely(!p_xran_dev_ctx)) { print_err("Null xRAN context!!\n"); - return; + return ret; } - struct xran_prach_cp_config *pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfig); - struct xran_timer_ctx *pTCtx = &p_xran_dev_ctx->timer_ctx[0]; - uint32_t interval = p_xran_dev_ctx->interval_us_local; - uint8_t PortId = p_xran_dev_ctx->xran_port_id; - tti = pTCtx[(xran_lib_ota_tti[PortId] & 1) ^ 1].tti_to_process; - buf_id = tti % XRAN_N_FE_BUF_LEN; - slot_id = XranGetSlotNum(tti, SLOTNUM_PER_SUBFRAME(interval)); - subframe_id = XranGetSubFrameNum(tti,SLOTNUM_PER_SUBFRAME(interval), SUBFRAMES_PER_SYSTEMFRAME); - frame_id = XranGetFrameNum(tti,xran_getSfnSecStart(),SUBFRAMES_PER_SYSTEMFRAME, SLOTNUM_PER_SUBFRAME(interval)); - if (tti == 0) { - //Wrap around to next second - frame_id = (frame_id + NUM_OF_FRAMES_PER_SECOND) & 0x3ff; - } - ctx_id = XranGetSlotNum(tti, SLOTS_PER_SYSTEMFRAME(interval)) % XRAN_MAX_SECTIONDB_CTX; + if(first_call && p_xran_dev_ctx->enableCP) + { + pHandle = p_xran_dev_ctx; + //pTCtx = &p_xran_dev_ctx->timer_ctx[0]; + interval = p_xran_dev_ctx->interval_us_local; + PortId = p_xran_dev_ctx->xran_port_id; + tti = nSlotIdx; //pTCtx[(xran_lib_ota_tti[PortId] & 1) ^ 1].tti_to_process; + + buf_id = tti % XRAN_N_FE_BUF_LEN; + ctx_id = tti % XRAN_MAX_SECTIONDB_CTX; + slot_id = XranGetSlotNum(tti, SLOTNUM_PER_SUBFRAME(interval)); + subframe_id = XranGetSubFrameNum(tti,SLOTNUM_PER_SUBFRAME(interval), SUBFRAMES_PER_SYSTEMFRAME); + frame_id = XranGetFrameNum(tti,xran_getSfnSecStart(),SUBFRAMES_PER_SYSTEMFRAME, SLOTNUM_PER_SUBFRAME(interval)); + + /* Wrap around to next second */ + if(tti == 0) + frame_id = (frame_id + NUM_OF_FRAMES_PER_SECOND) & 0x3ff; + if(xran_get_ru_category(pHandle) == XRAN_CATEGORY_A) + num_eAxc = xran_get_num_eAxc(pHandle); + else + num_eAxc = xran_get_num_eAxcUl(pHandle); + num_CCPorts = xran_get_num_cc(pHandle); - pHandle = p_xran_dev_ctx; - if(xran_get_ru_category(pHandle) == XRAN_CATEGORY_A) + print_dbg("[%d]SFN %d sf %d slot %d\n", tti, frame_id, subframe_id, slot_id); + + /* General Uplink */ +#if defined(__INTEL_COMPILER) +#pragma vector always +#endif + for(ant_id = nAntStart; (ant_id < (nAntStart + nAntNum) && ant_id < num_eAxc); ++ant_id) { + for(cc_id = nCcStart; (cc_id < (nCcStart + nCcNum) && cc_id < num_CCPorts); cc_id++) { + /* start new section information list */ + xran_cp_reset_section_info(pHandle, XRAN_DIR_UL, cc_id, ant_id, ctx_id); + if(xran_fs_get_slot_type(PortId, cc_id, tti, XRAN_SLOT_TYPE_UL) == 1) + { + pBufList = &(p_xran_dev_ctx->sFrontHaulRxPrbMapBbuIoBufCtrl[buf_id][cc_id][ant_id].sBufferList); /* To shorten reference */ + if(pBufList->pBuffers && pBufList->pBuffers->pData) + { + ret = xran_cp_create_and_send_section(pHandle, ant_id, XRAN_DIR_UL, tti, cc_id, + (struct xran_prb_map *)(pBufList->pBuffers->pData), NULL, + p_xran_dev_ctx->fh_cfg.ru_conf.xranCat, ctx_id); + } + } + } + } /* for(ant_id = 0; ant_id < num_eAxc; ++ant_id) */ + + /* PRACH */ + if(p_xran_dev_ctx->enablePrach) + { + struct xran_prach_cp_config *pPrachCPConfig = NULL; + //check for dss enable and fill based on technology select the p_xran_dev_ctx->PrachCPConfig NR/LTE. + if(p_xran_dev_ctx->dssEnable){ + int i = tti % p_xran_dev_ctx->dssPeriod; + if(p_xran_dev_ctx->technology[i]==1) { + pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfig); + } + else{ + pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfigLTE); + } + } + else{ + pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfig); + } + uint32_t is_prach_slot = xran_is_prach_slot(PortId, subframe_id, slot_id); + + if(((frame_id % pPrachCPConfig->x) == pPrachCPConfig->y[0]) + && (is_prach_slot==1)) + { + for(ant_id = 0; ant_id < num_eAxc; ant_id++) + { + port_id = ant_id + pPrachCPConfig->eAxC_offset; + for(cc_id = 0; cc_id < num_CCPorts; cc_id++) + { + /* start new section information list */ + xran_cp_reset_section_info(pHandle, XRAN_DIR_UL, cc_id, port_id, ctx_id); + for(occasionid = 0; occasionid < pPrachCPConfig->occassionsInPrachSlot; occasionid++) + { + struct xran_cp_gen_params params; + struct xran_section_gen_info sect_geninfo[8]; + struct xran_section_info sectInfo[8]; + for(int secId=0;secId<8;secId++) + sect_geninfo[secId].info = §Info[secId]; + struct rte_mbuf *mbuf = xran_ethdi_mbuf_alloc(); + uint8_t seqid = xran_get_cp_seqid(pHandle, XRAN_DIR_UL, cc_id, port_id); + + beam_id = xran_get_beamid(pHandle, XRAN_DIR_UL, cc_id, port_id, slot_id); + ret = generate_cpmsg_prach(pHandle, ¶ms, sect_geninfo, mbuf, p_xran_dev_ctx, + frame_id, subframe_id, slot_id, tti, + beam_id, cc_id, port_id, occasionid, seqid); + if(ret == XRAN_STATUS_SUCCESS) + send_cpmsg(pHandle, mbuf, ¶ms, sect_geninfo, + cc_id, port_id, seqid); + } + } + } + } + } /* if(p_xran_dev_ctx->enablePrach) */ + + /* SRS */ + if(p_xran_dev_ctx->enableSrsCp) + { + struct xran_srs_config *pSrsCfg = &(p_xran_dev_ctx->srs_cfg); + + for(ant_id = 0; ant_id < xran_get_num_ant_elm(pHandle); ant_id++) + { + port_id = ant_id + pSrsCfg->eAxC_offset; + for(cc_id = 0; cc_id < num_CCPorts; cc_id++) + { + /* start new section information list */ + xran_cp_reset_section_info(pHandle, XRAN_DIR_UL, cc_id, port_id, ctx_id); + if(xran_fs_get_slot_type(PortId, cc_id, tti, XRAN_SLOT_TYPE_SP) == 1) + { + pBufList = &(p_xran_dev_ctx->sFHSrsRxPrbMapBbuIoBufCtrl[buf_id][cc_id][ant_id].sBufferList); /* To shorten reference */ + if(pBufList->pBuffers && pBufList->pBuffers->pData) + { + ret = xran_cp_create_and_send_section(pHandle, port_id, XRAN_DIR_UL, tti, cc_id, + (struct xran_prb_map *)(pBufList->pBuffers->pData), NULL, + p_xran_dev_ctx->fh_cfg.ru_conf.xranCat, ctx_id); + } + } + } + } + } /* if(p_xran_dev_ctx->enableSrs) */ + + MLogXRANTask(PID_CP_UL_CB, t1, MLogXRANTick()); + } /* if(p_xran_dev_ctx->enableCP) */ + + return ret; +} + + +void +tx_cp_ul_cb(struct rte_timer *tim, void *arg) +{ + long t1 = MLogXRANTick(); + int tti, buf_id; + int ret; + uint32_t slot_id, subframe_id, frame_id; + int32_t cc_id; + int ant_id, port_id; + uint16_t occasionid = 0; + uint16_t beam_id; + uint8_t num_eAxc, num_CCPorts; + uint8_t ctx_id; + + void *pHandle; + uint32_t interval; + uint8_t PortId; + + struct xran_timer_ctx *pTCtx; + struct xran_buffer_list *pBufList; + struct xran_device_ctx *p_xran_dev_ctx; + + if(unlikely(!arg)) + { + print_err("Null xRAN context!!\n"); + return; + } + + p_xran_dev_ctx = (struct xran_device_ctx *)arg; + + if (p_xran_dev_ctx->fh_init.io_cfg.bbu_offload) + return; + + /* */ + if(first_call && p_xran_dev_ctx->enableCP) + { + pHandle = p_xran_dev_ctx; + pTCtx = &p_xran_dev_ctx->timer_ctx[0]; + interval = p_xran_dev_ctx->interval_us_local; + PortId = p_xran_dev_ctx->xran_port_id; + tti = pTCtx[(xran_lib_ota_tti[PortId] & 1) ^ 1].tti_to_process; + + buf_id = tti % XRAN_N_FE_BUF_LEN; + ctx_id = tti % XRAN_MAX_SECTIONDB_CTX; + slot_id = XranGetSlotNum(tti, SLOTNUM_PER_SUBFRAME(interval)); + subframe_id = XranGetSubFrameNum(tti,SLOTNUM_PER_SUBFRAME(interval), SUBFRAMES_PER_SYSTEMFRAME); + frame_id = XranGetFrameNum(tti,xran_getSfnSecStart(),SUBFRAMES_PER_SYSTEMFRAME, SLOTNUM_PER_SUBFRAME(interval)); + + /* Wrap around to next second */ + if(tti == 0) + frame_id = (frame_id + NUM_OF_FRAMES_PER_SECOND) & 0x3ff; + if(xran_get_ru_category(pHandle) == XRAN_CATEGORY_A) num_eAxc = xran_get_num_eAxc(pHandle); else num_eAxc = xran_get_num_eAxcUl(pHandle); num_CCPorts = xran_get_num_cc(pHandle); - if(first_call && p_xran_dev_ctx->enableCP) { - print_dbg("[%d]SFN %d sf %d slot %d\n", tti, frame_id, subframe_id, slot_id); - for(ant_id = 0; ant_id < num_eAxc; ++ant_id) { - for(cc_id = 0; cc_id < num_CCPorts; cc_id++) { - if(xran_fs_get_slot_type(PortId, cc_id, tti, XRAN_SLOT_TYPE_UL) == 1 - /* || xran_fs_get_slot_type(cc_id, tti, XRAN_SLOT_TYPE_SP) == 1*/ ) { + /* General Uplink */ + for(ant_id = 0; ant_id < num_eAxc; ant_id++) + { + for(cc_id = 0; cc_id < num_CCPorts; cc_id++) + { /* start new section information list */ xran_cp_reset_section_info(pHandle, XRAN_DIR_UL, cc_id, ant_id, ctx_id); - if(p_xran_dev_ctx->sFrontHaulRxPrbMapBbuIoBufCtrl[buf_id][cc_id][ant_id].sBufferList.pBuffers){ - if(p_xran_dev_ctx->sFrontHaulRxPrbMapBbuIoBufCtrl[buf_id][cc_id][ant_id].sBufferList.pBuffers->pData){ - num_list = xran_cp_create_and_send_section(pHandle, ant_id, XRAN_DIR_UL, tti, cc_id, - (struct xran_prb_map *)p_xran_dev_ctx->sFrontHaulRxPrbMapBbuIoBufCtrl[buf_id][cc_id][ant_id].sBufferList.pBuffers->pData, + if(xran_fs_get_slot_type(PortId, cc_id, tti, XRAN_SLOT_TYPE_UL) == 1) + { + pBufList = &(p_xran_dev_ctx->sFrontHaulRxPrbMapBbuIoBufCtrl[buf_id][cc_id][ant_id].sBufferList); /* To shorten reference */ + if(pBufList->pBuffers && pBufList->pBuffers->pData) + { + ret = xran_cp_create_and_send_section(pHandle, ant_id, XRAN_DIR_UL, tti, cc_id, + (struct xran_prb_map *)(pBufList->pBuffers->pData), NULL, p_xran_dev_ctx->fh_cfg.ru_conf.xranCat, ctx_id); } } } + } /* for(ant_id = 0; ant_id < num_eAxc; ++ant_id) */ + + /* PRACH */ + if(p_xran_dev_ctx->enablePrach) + { + struct xran_prach_cp_config *pPrachCPConfig = NULL; + //check for dss enable and fill based on technology select the p_xran_dev_ctx->PrachCPConfig NR/LTE. + if(p_xran_dev_ctx->dssEnable){ + int i = tti % p_xran_dev_ctx->dssPeriod; + if(p_xran_dev_ctx->technology[i]==1) { + pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfig); + } + else{ + pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfigLTE); + } } + else{ + pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfig); } - if(p_xran_dev_ctx->enablePrach) { uint32_t is_prach_slot = xran_is_prach_slot(PortId, subframe_id, slot_id); - if(((frame_id % pPrachCPConfig->x) == pPrachCPConfig->y[0]) && (is_prach_slot==1)) { //is prach slot - for(ant_id = 0; ant_id < num_eAxc; ++ant_id) { - for(cc_id = 0; cc_id < num_CCPorts; cc_id++) { - for (occasionid = 0; occasionid < pPrachCPConfig->occassionsInPrachSlot; occasionid++) { + + if(((frame_id % pPrachCPConfig->x) == pPrachCPConfig->y[0]) + && (is_prach_slot==1)) + { + for(ant_id = 0; ant_id < num_eAxc; ant_id++) + { + port_id = ant_id + pPrachCPConfig->eAxC_offset; + for(cc_id = 0; cc_id < num_CCPorts; cc_id++) + { + /* start new section information list */ + xran_cp_reset_section_info(pHandle, XRAN_DIR_UL, cc_id, port_id, ctx_id); +#ifndef FCN_ADAPT +//for FCN only send C-P for first occasion + for(occasionid = 0; occasionid < pPrachCPConfig->occassionsInPrachSlot; occasionid++) +#endif + { struct xran_cp_gen_params params; struct xran_section_gen_info sect_geninfo[8]; + struct xran_section_info sectInfo[8]; + for(int secId=0;secId<8;secId++) + sect_geninfo[secId].info = §Info[secId]; + struct rte_mbuf *mbuf = xran_ethdi_mbuf_alloc(); - prach_port_id = ant_id + num_eAxc; - /* start new section information list */ - xran_cp_reset_section_info(pHandle, XRAN_DIR_UL, cc_id, prach_port_id, ctx_id); + uint8_t seqid = xran_get_cp_seqid(pHandle, XRAN_DIR_UL, cc_id, port_id); - beam_id = xran_get_beamid(pHandle, XRAN_DIR_UL, cc_id, prach_port_id, slot_id); + beam_id = xran_get_beamid(pHandle, XRAN_DIR_UL, cc_id, port_id, slot_id); ret = generate_cpmsg_prach(pHandle, ¶ms, sect_geninfo, mbuf, p_xran_dev_ctx, - frame_id, subframe_id, slot_id, - beam_id, cc_id, prach_port_id, occasionid, - xran_get_cp_seqid(pHandle, XRAN_DIR_UL, cc_id, prach_port_id)); + frame_id, subframe_id, slot_id, tti, + beam_id, cc_id, port_id, occasionid, seqid); if (ret == XRAN_STATUS_SUCCESS) send_cpmsg(pHandle, mbuf, ¶ms, sect_geninfo, - cc_id, prach_port_id, xran_get_cp_seqid(pHandle, XRAN_DIR_UL, cc_id, prach_port_id)); + cc_id, port_id, seqid); + } + } } } + } /* if(p_xran_dev_ctx->enablePrach) */ + + /* SRS */ + if(p_xran_dev_ctx->enableSrsCp) + { + struct xran_srs_config *pSrsCfg = &(p_xran_dev_ctx->srs_cfg); + + for(ant_id = 0; ant_id < xran_get_num_ant_elm(pHandle); ant_id++) + { + port_id = ant_id + pSrsCfg->eAxC_offset; + for(cc_id = 0; cc_id < num_CCPorts; cc_id++) + { + /* start new section information list */ + xran_cp_reset_section_info(pHandle, XRAN_DIR_UL, cc_id, port_id, ctx_id); + if(xran_fs_get_slot_type(PortId, cc_id, tti, XRAN_SLOT_TYPE_SP) == 1) + { + pBufList = &(p_xran_dev_ctx->sFHSrsRxPrbMapBbuIoBufCtrl[buf_id][cc_id][ant_id].sBufferList); /* To shorten reference */ + if(pBufList->pBuffers && pBufList->pBuffers->pData) + { + ret = xran_cp_create_and_send_section(pHandle, port_id, XRAN_DIR_UL, tti, cc_id, + (struct xran_prb_map *)(pBufList->pBuffers->pData), NULL, + p_xran_dev_ctx->fh_cfg.ru_conf.xranCat, ctx_id); } } } - } /* if(p_xran_dev_ctx->enableCP) */ + } + } /* if(p_xran_dev_ctx->enableSrs) */ - MLogTask(PID_CP_UL_CB, t1, MLogTick()); + MLogXRANTask(PID_CP_UL_CB, t1, MLogXRANTick()); + } /* if(p_xran_dev_ctx->enableCP) */ } void @@ -902,19 +1416,12 @@ xran_timing_source_thread(void *args) { int res = 0; cpu_set_t cpuset; - int32_t do_reset = 0; - uint64_t t1 = 0; - uint64_t delta; - int32_t result1,i,j; - + int32_t result1; uint32_t xran_port_id = 0; static int owdm_init_done = 0; - struct sched_param sched_param; struct xran_device_ctx * p_dev_ctx = (struct xran_device_ctx *) args ; uint64_t tWake = 0, tWakePrev = 0, tUsed = 0; - struct cb_elem_entry * cb_elm = NULL; - struct xran_device_ctx * p_dev_ctx_run = NULL; /* ToS = Top of Second start +- 1.5us */ struct timespec ts; @@ -928,7 +1435,7 @@ xran_timing_source_thread(void *args) CPU_ZERO(&cpuset); CPU_SET(p_dev_ctx->fh_init.io_cfg.timing_core, &cpuset); - if (result1 = pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpuset)) + if ((result1 = pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpuset))) { printf("pthread_setaffinity_np failed: coreId = 2, result1 = %d\n",result1); } @@ -992,10 +1499,15 @@ xran_timing_source_thread(void *args) tWakePrev = tWake; tUsed = 0; - delta = poll_next_tick(interval_us*1000L/N_SYM_PER_SLOT, &tUsed); + int64_t delta = poll_next_tick(interval_us*1000L/N_SYM_PER_SLOT, &tUsed); if (XRAN_STOPPED == xran_if_current_state) break; + if (delta > 3E5 && tUsed > 0)//300us about 9 symbols + { + print_err("poll_next_tick too long, delta:%ld(ns), tUsed:%ld(tick)", delta, tUsed); + } + if (likely(XRAN_RUNNING == xran_if_current_state)) { for(xran_port_id = 0; xran_port_id < XRAN_PORTS_NUM; xran_port_id++ ) { p_dev_ctx_run = xran_dev_get_ctx_by_id(xran_port_id); @@ -1027,11 +1539,10 @@ xran_timing_source_thread(void *args) int32_t handle_ecpri_ethertype(struct rte_mbuf* pkt_q[], uint16_t xport_id, struct xran_eaxc_info *p_cid, uint16_t num) { - struct rte_mbuf* pkt, * pkt0; + struct rte_mbuf *pkt; uint16_t i; struct rte_ether_hdr* eth_hdr; struct xran_ecpri_hdr* ecpri_hdr; - union xran_ecpri_cmn_hdr* ecpri_cmn; unsigned long t1; int32_t ret = MBUF_FREE; uint32_t ret_data[MBUFS_CNT] = { MBUFS_CNT * MBUF_FREE }; @@ -1086,7 +1597,7 @@ int32_t handle_ecpri_ethertype(struct rte_mbuf* pkt_q[], uint16_t xport_id, stru { for (i = 0; i < MBUFS_CNT; i++) { - ret_data[i] == MBUF_FREE; + ret_data[i] = MBUF_FREE; } if (p_dev_ctx->fh_init.io_cfg.id == O_DU || p_dev_ctx->fh_init.io_cfg.id == O_RU) @@ -1120,7 +1631,7 @@ int32_t handle_ecpri_ethertype(struct rte_mbuf* pkt_q[], uint16_t xport_id, stru for (i = 0; i < num_control; i++) { - t1 = MLogTick(); + t1 = MLogXRANTick(); if (p_dev_ctx->fh_init.io_cfg.id == O_RU) { ret = process_cplane(pkt_control[i], (void*)p_dev_ctx); @@ -1132,17 +1643,22 @@ int32_t handle_ecpri_ethertype(struct rte_mbuf* pkt_q[], uint16_t xport_id, stru { print_err("O-DU recevied C-Plane message!"); } - MLogTask(PID_PROCESS_CP_PKT, t1, MLogTick()); + MLogXRANTask(PID_PROCESS_CP_PKT, t1, MLogXRANTick()); } for (i = 0; i < num_meas; i++) { - t1 = MLogTick(); + + /*if(p_dev_ctx->fh_init.io_cfg.id == O_RU) + printf("Got delay_meas_pkt xport_id %d p_dev_ctx %08"PRIx64" %d\n", xport_id,(int64_t*)p_dev_ctx, num_meas) ;*/ + t1 = MLogXRANTick(); + if(xran_if_current_state != XRAN_RUNNING) ret = process_delay_meas(pkt_meas[i], (void*)p_dev_ctx, xport_id); - // printf("Got delay_meas_pkt xport_id %d p_dev_ctx %08"PRIx64"\n", xport_id,(int64_t*)p_dev_ctx) ; + else + ret = MBUF_FREE; if (ret == MBUF_FREE) rte_pktmbuf_free(pkt_meas[i]); - MLogTask(PID_PROCESS_DELAY_MEAS_PKT, t1, MLogTick()); + MLogXRANTask(PID_PROCESS_DELAY_MEAS_PKT, t1, MLogXRANTick()); } } @@ -1152,12 +1668,11 @@ int32_t handle_ecpri_ethertype(struct rte_mbuf* pkt_q[], uint16_t xport_id, stru int32_t xran_packet_and_dpdk_timer_thread(void *args) { - struct xran_ethdi_ctx *const ctx = xran_ethdi_get_ctx(); + //struct xran_ethdi_ctx *const ctx = xran_ethdi_get_ctx(); uint64_t prev_tsc = 0; uint64_t cur_tsc = rte_rdtsc(); uint64_t diff_tsc = cur_tsc - prev_tsc; - cpu_set_t cpuset; struct sched_param sched_param; int res = 0; printf("%s [CPU %2d] [PID: %6d]\n", __FUNCTION__, rte_lcore_id(), getpid()); @@ -1212,13 +1727,9 @@ xran_init(int argc, char *argv[], int32_t i; int32_t j; int32_t o_xu_id = 0; - struct xran_io_cfg *p_io_cfg = NULL; struct xran_device_ctx * p_xran_dev_ctx = NULL; - int32_t lcore_id = 0; - char filename[64]; - const char *version = rte_version(); if (version == NULL) @@ -1231,7 +1742,7 @@ xran_init(int argc, char *argv[], print_err("fh_init xran_ports= %d is wrong [%d]\n", p_xran_fh_init->xran_ports, ret); return ret; } - + mlogxranenable = p_xran_fh_init->mlogxranenable; p_io_cfg = (struct xran_io_cfg *)&p_xran_fh_init->io_cfg; if ((ret = xran_dev_create_ctx(p_xran_fh_init->xran_ports)) < 0) { @@ -1348,7 +1859,6 @@ int32_t xran_sector_get_instances (uint32_t xran_port, void * pDevHandle, uint16_t nNumInstances, xran_cc_handle_t * pSectorInstanceHandles) { - xran_status_t nStatus = XRAN_STATUS_FAIL; struct xran_device_ctx *pDev = (struct xran_device_ctx *)pDevHandle; XranSectorHandleInfo *pCcHandle = NULL; int32_t i = 0; @@ -1396,7 +1906,7 @@ xran_5g_fronthault_config (void * pHandle, xran_transport_callback_fn pCallback, void *pCallbackTag) { - int j, i = 0, z, k; + int j, i = 0, z; XranSectorHandleInfo* pXranCc = NULL; struct xran_device_ctx * p_xran_dev_ctx = NULL; @@ -1470,7 +1980,6 @@ xran_5g_fronthault_config (void * pHandle, p_xran_dev_ctx->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList = *pDstCpBuffer[z][j]; else memset(&p_xran_dev_ctx->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList, 0, sizeof(*pDstCpBuffer[z][j])); - } } @@ -1484,6 +1993,60 @@ xran_5g_fronthault_config (void * pHandle, return XRAN_STATUS_SUCCESS; } +int32_t xran_5g_bfw_config(void * pHandle, + struct xran_buffer_list *pSrcRxCpBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN], + struct xran_buffer_list *pSrcTxCpBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN], + xran_transport_callback_fn pCallback, + void *pCallbackTag){ + int j, i = 0, z; + XranSectorHandleInfo* pXranCc = NULL; + struct xran_device_ctx * p_xran_dev_ctx = NULL; + + if(NULL == pHandle) { + printf("Handle is NULL!\n"); + return XRAN_STATUS_FAIL; + } + pXranCc = (XranSectorHandleInfo*) pHandle; + p_xran_dev_ctx = xran_dev_get_ctx_by_id(pXranCc->nXranPort); + if (p_xran_dev_ctx == NULL) { + printf ("p_xran_dev_ctx is NULL\n"); + return XRAN_STATUS_FAIL; + } + + i = pXranCc->nIndex; + + for(j = 0; j < XRAN_N_FE_BUF_LEN; j++) { + for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){ + /* C-plane RX - RU */ + p_xran_dev_ctx->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].bValid = 0; + p_xran_dev_ctx->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].nSegGenerated = -1; + p_xran_dev_ctx->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].nSegToBeGen = -1; + p_xran_dev_ctx->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred = 0; + p_xran_dev_ctx->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT; + p_xran_dev_ctx->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &p_xran_dev_ctx->sFrontHaulRxPrbMapBuffers[j][i][z][0]; + + if(pSrcRxCpBuffer[z][j]) + p_xran_dev_ctx->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList = *pSrcRxCpBuffer[z][j]; + else + memset(&p_xran_dev_ctx->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList, 0, sizeof(*pSrcRxCpBuffer[z][j])); + + /* C-plane TX - RU */ + p_xran_dev_ctx->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].bValid = 0; + p_xran_dev_ctx->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].nSegGenerated = -1; + p_xran_dev_ctx->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].nSegToBeGen = -1; + p_xran_dev_ctx->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred = 0; + p_xran_dev_ctx->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT; + p_xran_dev_ctx->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &p_xran_dev_ctx->sFrontHaulTxPrbMapBuffers[j][i][z][0]; + + if(pSrcTxCpBuffer[z][j]) + p_xran_dev_ctx->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList = *pSrcTxCpBuffer[z][j]; + else + memset(&p_xran_dev_ctx->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList, 0, sizeof(*pSrcTxCpBuffer[z][j])); + } + } + return XRAN_STATUS_SUCCESS; +} + int32_t xran_5g_prach_req (void * pHandle, struct xran_buffer_list *pDstBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN], @@ -1510,12 +2073,12 @@ xran_5g_prach_req (void * pHandle, i = pXranCc->nIndex; for(j = 0; j < XRAN_N_FE_BUF_LEN; j++) { - for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){ + for(z = 0; z < XRAN_MAX_PRACH_ANT_NUM; z++){ p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[j][i][z].bValid = 0; p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1; p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1; p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0; - p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_MAX_ANTENNA_NR; // ant number. + p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_MAX_PRACH_ANT_NUM; // ant number. p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &p_xran_dev_ctx->sFHPrachRxBuffers[j][i][z][0]; if(pDstBuffer[z][j]) p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList = *pDstBuffer[z][j]; @@ -1525,7 +2088,6 @@ xran_5g_prach_req (void * pHandle, p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrlDecomp[j][i][z].sBufferList.pBuffers = &p_xran_dev_ctx->sFHPrachRxBuffersDecomp[j][i][z][0]; if(pDstBufferDecomp[z][j]) p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrlDecomp[j][i][z].sBufferList = *pDstBufferDecomp[z][j]; - } } @@ -1655,7 +2217,6 @@ int32_t xran_pkt_gen_process_ring(struct rte_ring *r) { assert(r); - int32_t retval = 0; struct rte_mbuf *mbufs[16]; int i; uint32_t remaining; @@ -1664,17 +2225,20 @@ xran_pkt_gen_process_ring(struct rte_ring *r) const uint16_t dequeued = rte_ring_dequeue_burst(r, (void **)mbufs, RTE_DIM(mbufs), &remaining); + if (!dequeued) return 0; - t1 = MLogTick(); + t1 = MLogXRANTick(); for (i = 0; i < dequeued; ++i) { struct cp_up_tx_desc * p_tx_desc = (struct cp_up_tx_desc *)rte_pktmbuf_mtod(mbufs[i], struct cp_up_tx_desc *); - retval = xran_process_tx_sym_cp_on_opt(p_tx_desc->pHandle, + xran_process_tx_sym_cp_on_opt(p_tx_desc->pHandle, p_tx_desc->ctx_id, p_tx_desc->tti, - p_tx_desc->cc_id, - p_tx_desc->ant_id, + p_tx_desc->start_cc, + p_tx_desc->cc_num, + p_tx_desc->start_ant, + p_tx_desc->ant_num, p_tx_desc->frame_id, p_tx_desc->subframe_id, p_tx_desc->slot_id, @@ -1686,7 +2250,7 @@ xran_pkt_gen_process_ring(struct rte_ring *r) xran_pkt_gen_desc_free(p_tx_desc); if (XRAN_STOPPED == xran_if_current_state){ - MLogTask(PID_PROCESS_TX_SYM, t1, MLogTick()); + MLogXRANTask(PID_PROCESS_TX_SYM, t1, MLogXRANTick()); return -1; } } @@ -1694,7 +2258,7 @@ xran_pkt_gen_process_ring(struct rte_ring *r) if(p_io_cfg->io_sleep) nanosleep(&sleeptime,NULL); - MLogTask(PID_PROCESS_TX_SYM, t1, MLogTick()); + MLogXRANTask(PID_PROCESS_TX_SYM, t1, MLogXRANTick()); return remaining; } @@ -1720,6 +2284,20 @@ xran_dl_pkt_ring_processing_func(void* args) return 0; } +int32_t xran_fh_rx_and_up_tx_processing(void *port_mask) +{ + int32_t ret_val=0; + + ret_val = ring_processing_func((void *)0); + if(ret_val != 0) + return ret_val; + + ret_val = xran_dl_pkt_ring_processing_func(port_mask); + if(ret_val != 0) + return ret_val; + + return 0; +} /** Function to peforms serves of DPDK times */ int32_t xran_processing_timer_only_func(void* args) @@ -1762,9 +2340,7 @@ int32_t ring_processing_func_per_port(void* args) { struct xran_ethdi_ctx *const ctx = xran_ethdi_get_ctx(); - int16_t retPoll = 0; int32_t i; - uint64_t t1, t2; uint16_t port_id = (uint16_t)((uint64_t)args & 0xFFFF); queueid_t qi; @@ -1794,13 +2370,14 @@ xran_spawn_workers(void) uint32_t worker_num_cores = 0; uint32_t icx_cpu = 0; int32_t core_map[2*sizeof(uint64_t)*8]; - uint32_t xran_port_mask = 0; + uint64_t xran_port_mask = 0; struct xran_ethdi_ctx *eth_ctx = xran_ethdi_get_ctx(); struct xran_device_ctx *p_dev = NULL; struct xran_fh_init *fh_init = NULL; struct xran_fh_config *fh_cfg = NULL; struct xran_worker_th_ctx* pThCtx = NULL; + void *worker_ports=NULL; p_dev = xran_dev_get_ctx_by_id(0); if(p_dev == NULL) { @@ -1849,7 +2426,7 @@ xran_spawn_workers(void) printf("O-RU eAxC %d\n", fh_cfg->neAxc); for (i = 0; i < fh_init->xran_ports; i++){ - xran_port_mask |= 1<xran_ports; i++) { @@ -1943,7 +2520,7 @@ xran_spawn_workers(void) print_err("unsupported configuration Cat %d numports %d total_num_cores = %d\n", fh_cfg->ru_conf.xranCat, fh_init->xran_ports, total_num_cores); return XRAN_STATUS_FAIL; } - } else if (fh_cfg->ru_conf.xranCat == XRAN_CATEGORY_B && fh_init->xran_ports == 1) { + } else if ((fh_cfg->ru_conf.xranCat == XRAN_CATEGORY_B && fh_init->xran_ports == 1) || fh_init->io_cfg.bbu_offload) { switch(total_num_cores) { case 1: /** only timing core */ print_err("unsupported configuration Cat %d numports %d total_num_cores = %d\n", fh_cfg->ru_conf.xranCat, fh_init->xran_ports, total_num_cores); @@ -1954,6 +2531,9 @@ xran_spawn_workers(void) eth_ctx->time_wrk_cfg.arg = NULL; eth_ctx->time_wrk_cfg.state = 1; + if (p_dev->fh_init.io_cfg.bbu_offload) + p_dev->tx_sym_gen_func = xran_process_tx_sym_cp_on_ring; + else p_dev->tx_sym_gen_func = xran_process_tx_sym_cp_on_opt; pThCtx = (struct xran_worker_th_ctx*) _mm_malloc(sizeof(struct xran_worker_th_ctx), 64); @@ -1971,7 +2551,7 @@ xran_spawn_workers(void) eth_ctx->pkt_wrk_cfg[0].arg = pThCtx; break; case 3: - if(icx_cpu) { + if(1) { /* timing core */ eth_ctx->time_wrk_cfg.f = xran_eth_trx_tasks; eth_ctx->time_wrk_cfg.arg = NULL; @@ -2025,7 +2605,7 @@ xran_spawn_workers(void) } break; case 4: - if(icx_cpu) { + if(1) { /* timing core */ eth_ctx->time_wrk_cfg.f = xran_eth_trx_tasks; eth_ctx->time_wrk_cfg.arg = NULL; @@ -2058,7 +2638,7 @@ xran_spawn_workers(void) pThCtx->worker_core_id = core_map[pThCtx->worker_id]; snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_cp_gen", core_map[pThCtx->worker_id]); pThCtx->task_func = xran_dl_pkt_ring_processing_func; - pThCtx->task_arg = (void*)(((1<<1) | (1<<2) |(1<<0)) & xran_port_mask); + pThCtx->task_arg = (void*)(((1L<<1) | (1L<<2) |(1L<<0)) & xran_port_mask); eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; @@ -2073,7 +2653,7 @@ xran_spawn_workers(void) pThCtx->worker_core_id = core_map[pThCtx->worker_id]; snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_tx_gen", core_map[pThCtx->worker_id]); pThCtx->task_func = xran_dl_pkt_ring_processing_func; - pThCtx->task_arg = (void*)((1<<0) & xran_port_mask); + pThCtx->task_arg = (void*)((1L<<0) & xran_port_mask); eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; @@ -2094,7 +2674,7 @@ xran_spawn_workers(void) } break; case 5: - if(icx_cpu) { + if(1) { /* timing core */ eth_ctx->time_wrk_cfg.f = xran_eth_rx_tasks; eth_ctx->time_wrk_cfg.arg = NULL; @@ -2127,7 +2707,7 @@ xran_spawn_workers(void) pThCtx->worker_core_id = core_map[pThCtx->worker_id]; snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_cp_gen", core_map[pThCtx->worker_id]); pThCtx->task_func = xran_dl_pkt_ring_processing_func; - pThCtx->task_arg = (void*)(((1<<1) | (1<<2) |(1<<0)) & xran_port_mask); + pThCtx->task_arg = (void*)(((1L<<1) | (1L<<2) |(1L<<0)) & xran_port_mask); eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; @@ -2142,7 +2722,7 @@ xran_spawn_workers(void) pThCtx->worker_core_id = core_map[pThCtx->worker_id]; snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_tx_gen", core_map[pThCtx->worker_id]); pThCtx->task_func = xran_dl_pkt_ring_processing_func; - pThCtx->task_arg = (void*)((1<<0) & xran_port_mask); + pThCtx->task_arg = (void*)((1L<<0) & xran_port_mask); eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; @@ -2157,7 +2737,7 @@ xran_spawn_workers(void) pThCtx->worker_core_id = core_map[pThCtx->worker_id]; snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_tx_gen", core_map[pThCtx->worker_id]); pThCtx->task_func = xran_dl_pkt_ring_processing_func; - pThCtx->task_arg = (void*)((1<<0) & xran_port_mask); + pThCtx->task_arg = (void*)((1L<<0) & xran_port_mask); eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; @@ -2227,7 +2807,7 @@ xran_spawn_workers(void) pThCtx->worker_core_id = core_map[pThCtx->worker_id]; snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_cp_gen", core_map[pThCtx->worker_id]); pThCtx->task_func = xran_dl_pkt_ring_processing_func; - pThCtx->task_arg = (void*)(((1<<1) | (1<<2) |(1<<0)) & xran_port_mask); + pThCtx->task_arg = (void*)(((1L<<1) | (1L<<2) |(1L<<0)) & xran_port_mask); eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; @@ -2242,7 +2822,7 @@ xran_spawn_workers(void) pThCtx->worker_core_id = core_map[pThCtx->worker_id]; snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_tx_gen", core_map[pThCtx->worker_id]); pThCtx->task_func = xran_dl_pkt_ring_processing_func; - pThCtx->task_arg = (void*)((1<<0) & xran_port_mask); + pThCtx->task_arg = (void*)((1L<<0) & xran_port_mask); eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; @@ -2257,7 +2837,7 @@ xran_spawn_workers(void) pThCtx->worker_core_id = core_map[pThCtx->worker_id]; snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_tx_gen", core_map[pThCtx->worker_id]); pThCtx->task_func = xran_dl_pkt_ring_processing_func; - pThCtx->task_arg = (void*)((1<<0) & xran_port_mask); + pThCtx->task_arg = (void*)((1L<<0) & xran_port_mask); eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; @@ -2366,9 +2946,54 @@ xran_spawn_workers(void) } else if (fh_cfg->ru_conf.xranCat == XRAN_CATEGORY_B && fh_init->xran_ports > 1) { switch(total_num_cores) { case 1: + print_err("unsupported configuration Cat %d numports %d total_num_cores = %d\n", fh_cfg->ru_conf.xranCat, fh_init->xran_ports, total_num_cores); + return XRAN_STATUS_FAIL; + break; + case 2: + if(fh_init->xran_ports == 2) + worker_ports = (void *)((1L<<0 | 1L<<1) & xran_port_mask); + else if(fh_init->xran_ports == 3) + worker_ports = (void *)((1L<<0 | 1L<<1 | 1L<<2) & xran_port_mask); + else if(fh_init->xran_ports == 4) + worker_ports = (void *)((1L<<0 | 1L<<1 | 1L<<2 | 1L<<3) & xran_port_mask); + else + { print_err("unsupported configuration Cat %d numports %d total_num_cores = %d\n", fh_cfg->ru_conf.xranCat, fh_init->xran_ports, total_num_cores); return XRAN_STATUS_FAIL; + } + + eth_ctx->time_wrk_cfg.f = xran_eth_trx_tasks; + eth_ctx->time_wrk_cfg.arg = NULL; + eth_ctx->time_wrk_cfg.state = 1; + + /* p_dev->tx_sym_gen_func = xran_process_tx_sym_cp_on_opt; */ + + pThCtx = (struct xran_worker_th_ctx*) _mm_malloc(sizeof(struct xran_worker_th_ctx), 64); + if(pThCtx == NULL){ + print_err("pThCtx allocation error\n"); + return XRAN_STATUS_FAIL; + } + memset(pThCtx, 0, sizeof(struct xran_worker_th_ctx)); + pThCtx->worker_id = 0; + pThCtx->worker_core_id = core_map[pThCtx->worker_id]; + snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_rx_bbdev", core_map[pThCtx->worker_id]); + pThCtx->task_func = xran_fh_rx_and_up_tx_processing; + pThCtx->task_arg = worker_ports; + eth_ctx->pkt_wrk_cfg[0].f = xran_generic_worker_thread; + eth_ctx->pkt_wrk_cfg[0].arg = pThCtx; + + for (i = 1; i < fh_init->xran_ports; i++) { + struct xran_device_ctx * p_dev_update = xran_dev_get_ctx_by_id(i); + if(p_dev_update == NULL) { + print_err("p_dev_update\n"); + return XRAN_STATUS_FAIL; + } + p_dev_update->job2wrk_id[XRAN_JOB_TYPE_CP_DL] = pThCtx->worker_id; + p_dev_update->job2wrk_id[XRAN_JOB_TYPE_CP_UL] = pThCtx->worker_id; + printf("p:%d XRAN_JOB_TYPE_CP_DL worker id %d\n", i, p_dev_update->job2wrk_id[XRAN_JOB_TYPE_CP_DL]); + printf("p:%d XRAN_JOB_TYPE_CP_UL worker id %d\n", i, p_dev_update->job2wrk_id[XRAN_JOB_TYPE_CP_UL]); + } break; case 3: if(icx_cpu) { @@ -2419,13 +3044,70 @@ xran_spawn_workers(void) pThCtx->task_arg = (void*)xran_port_mask; eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; - } else { + } + else /* csx cpu */ + { + if(fh_init->xran_ports == 3) + worker_ports = (void *)(1L<<2 & xran_port_mask); + else if(fh_init->xran_ports == 4) + worker_ports = (void *)((1L<<2 | 1L<<3) & xran_port_mask); + else{ print_err("unsupported configuration Cat %d numports %d total_num_cores = %d\n", fh_cfg->ru_conf.xranCat, fh_init->xran_ports, total_num_cores); return XRAN_STATUS_FAIL; } + /* timing core */ + eth_ctx->time_wrk_cfg.f = xran_eth_trx_tasks; + eth_ctx->time_wrk_cfg.arg = NULL; + eth_ctx->time_wrk_cfg.state = 1; + + /* workers */ + /** 0 **/ + pThCtx = (struct xran_worker_th_ctx*) _mm_malloc(sizeof(struct xran_worker_th_ctx), 64); + if(pThCtx == NULL){ + print_err("pThCtx allocation error\n"); + return XRAN_STATUS_FAIL; + } + memset(pThCtx, 0, sizeof(struct xran_worker_th_ctx)); + pThCtx->worker_id = 0; + pThCtx->worker_core_id = core_map[pThCtx->worker_id]; + snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_rx_bbdev", core_map[pThCtx->worker_id]); + pThCtx->task_func = xran_dl_pkt_ring_processing_func; + pThCtx->task_arg = (void *)((1L<<0|1L<<1) & xran_port_mask); + eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; + eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; + + for (i = 1; i < fh_init->xran_ports; i++) { + struct xran_device_ctx * p_dev_update = xran_dev_get_ctx_by_id(i); + if(p_dev_update == NULL) { + print_err("p_dev_update\n"); + return XRAN_STATUS_FAIL; + } + p_dev_update->job2wrk_id[XRAN_JOB_TYPE_CP_DL] = pThCtx->worker_id; + p_dev_update->job2wrk_id[XRAN_JOB_TYPE_CP_UL] = pThCtx->worker_id; + printf("p:%d XRAN_JOB_TYPE_CP_DL worker id %d\n", i, p_dev_update->job2wrk_id[XRAN_JOB_TYPE_CP_DL]); + printf("p:%d XRAN_JOB_TYPE_CP_UL worker id %d\n", i, p_dev_update->job2wrk_id[XRAN_JOB_TYPE_CP_UL]); + } + + /** 1 - CP GEN **/ + pThCtx = (struct xran_worker_th_ctx*) _mm_malloc(sizeof(struct xran_worker_th_ctx), 64); + if(pThCtx == NULL){ + print_err("pThCtx allocation error\n"); + return XRAN_STATUS_FAIL; + } + memset(pThCtx, 0, sizeof(struct xran_worker_th_ctx)); + pThCtx->worker_id = 1; + pThCtx->worker_core_id = core_map[pThCtx->worker_id]; + snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_cp_gen", core_map[pThCtx->worker_id]); + pThCtx->task_func = xran_fh_rx_and_up_tx_processing; + pThCtx->task_arg = worker_ports; + eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; + eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; + } + break; + case 4: - if(icx_cpu) { + if(1) { /* timing core */ eth_ctx->time_wrk_cfg.f = xran_eth_trx_tasks; eth_ctx->time_wrk_cfg.arg = NULL; @@ -2458,7 +3140,7 @@ xran_spawn_workers(void) pThCtx->worker_core_id = core_map[pThCtx->worker_id]; snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_cp_gen", core_map[pThCtx->worker_id]); pThCtx->task_func = xran_dl_pkt_ring_processing_func; - pThCtx->task_arg = (void*)(((1<<1) | (1<<2)) & xran_port_mask); + pThCtx->task_arg = (void*)(((1L<<1) | (1L<<2)) & xran_port_mask); eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; @@ -2473,7 +3155,7 @@ xran_spawn_workers(void) pThCtx->worker_core_id = core_map[pThCtx->worker_id]; snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_tx_gen", core_map[pThCtx->worker_id]); pThCtx->task_func = xran_dl_pkt_ring_processing_func; - pThCtx->task_arg = (void*)((1<<0) & xran_port_mask); + pThCtx->task_arg = (void*)((1L<<0) & xran_port_mask); eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; @@ -2488,7 +3170,8 @@ xran_spawn_workers(void) printf("p:%d XRAN_JOB_TYPE_CP_DL worker id %d\n", i, p_dev_update->job2wrk_id[XRAN_JOB_TYPE_CP_DL]); printf("p:%d XRAN_JOB_TYPE_CP_UL worker id %d\n", i, p_dev_update->job2wrk_id[XRAN_JOB_TYPE_CP_UL]); } - } else { + } + else { print_err("unsupported configuration Cat %d numports %d total_num_cores = %d\n", fh_cfg->ru_conf.xranCat, fh_init->xran_ports, total_num_cores); return XRAN_STATUS_FAIL; } @@ -2526,7 +3209,7 @@ xran_spawn_workers(void) pThCtx->worker_core_id = core_map[pThCtx->worker_id]; snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_cp_gen", core_map[pThCtx->worker_id]); pThCtx->task_func = xran_dl_pkt_ring_processing_func; - pThCtx->task_arg = (void*)(1<<0); + pThCtx->task_arg = (void*)((1<<0) & xran_port_mask); eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; @@ -2541,7 +3224,7 @@ xran_spawn_workers(void) pThCtx->worker_core_id = core_map[pThCtx->worker_id]; snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_up_gen", core_map[pThCtx->worker_id]); pThCtx->task_func = xran_dl_pkt_ring_processing_func; - pThCtx->task_arg = (void*)(1<<1); + pThCtx->task_arg = (void*)((1<<1) & xran_port_mask); eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; @@ -2556,9 +3239,23 @@ xran_spawn_workers(void) pThCtx->worker_core_id = core_map[pThCtx->worker_id]; snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_up_gen", core_map[pThCtx->worker_id]); pThCtx->task_func = xran_dl_pkt_ring_processing_func; - pThCtx->task_arg = (void*)(1<<2); + pThCtx->task_arg = (void*)((1<<2) & xran_port_mask); eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; + + + if(eth_ctx->io_cfg.id == O_DU && 0 == fh_init->dlCpProcBurst) { + for (i = 1; i < fh_init->xran_ports; i++) { + struct xran_device_ctx * p_dev_update = xran_dev_get_ctx_by_id(i); + if(p_dev_update == NULL) { + print_err("p_dev_update\n"); + return XRAN_STATUS_FAIL; + } + p_dev_update->job2wrk_id[XRAN_JOB_TYPE_CP_DL] = i+1; + printf("p:%d XRAN_JOB_TYPE_CP_DL worker id %d\n", i, p_dev_update->job2wrk_id[XRAN_JOB_TYPE_CP_DL]); + } + } + break; case 6: if(eth_ctx->io_cfg.id == O_DU){ @@ -2609,7 +3306,7 @@ xran_spawn_workers(void) pThCtx->worker_core_id = core_map[pThCtx->worker_id]; snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_tx_gen", core_map[pThCtx->worker_id]); pThCtx->task_func = xran_dl_pkt_ring_processing_func; - pThCtx->task_arg = (void*)(1<<0); + pThCtx->task_arg = (void*)((1<<0) & xran_port_mask); eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; @@ -2624,7 +3321,7 @@ xran_spawn_workers(void) pThCtx->worker_core_id = core_map[pThCtx->worker_id]; snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_tx_gen", core_map[pThCtx->worker_id]); pThCtx->task_func = xran_dl_pkt_ring_processing_func; - pThCtx->task_arg = (void*)(1<<1); + pThCtx->task_arg = (void*)((1<<1) & xran_port_mask); eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; @@ -2639,7 +3336,7 @@ xran_spawn_workers(void) pThCtx->worker_core_id = core_map[pThCtx->worker_id]; snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_tx_gen", core_map[pThCtx->worker_id]); pThCtx->task_func = xran_dl_pkt_ring_processing_func; - pThCtx->task_arg = (void*)(1<<2); + pThCtx->task_arg = (void*)((1<<2) & xran_port_mask); eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; } else { @@ -2721,29 +3418,268 @@ xran_spawn_workers(void) pThCtx->worker_core_id = core_map[pThCtx->worker_id]; snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_eth_tx", core_map[pThCtx->worker_id]); pThCtx->task_func = process_dpdk_io_tx; - pThCtx->task_arg = (void*)2; + pThCtx->task_arg = NULL; eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; } break; - default: - print_err("unsupported configuration Cat %d numports %d total_num_cores = %d\n", fh_cfg->ru_conf.xranCat, fh_init->xran_ports, total_num_cores); - return XRAN_STATUS_FAIL; - } - } else { - print_err("unsupported configuration\n"); - return XRAN_STATUS_FAIL; - } + case 7: + /*** O_RU specific config */ + if((fh_init->xran_ports == 4) && (eth_ctx->io_cfg.id == O_RU)) + { + /*** O_RU specific config */ + /* timing core */ + eth_ctx->time_wrk_cfg.f = NULL; + eth_ctx->time_wrk_cfg.arg = NULL; + eth_ctx->time_wrk_cfg.state = 1; - nWorkerCore = 1LL; - if(eth_ctx->io_cfg.pkt_proc_core) { - for (i = 0; i < coreNum && i < 64; i++) { - if (nWorkerCore & (uint64_t)eth_ctx->io_cfg.pkt_proc_core) { - xran_core_used[xran_num_cores_used++] = i; - if (rte_eal_remote_launch(eth_ctx->pkt_wrk_cfg[eth_ctx->num_workers].f, eth_ctx->pkt_wrk_cfg[eth_ctx->num_workers].arg, i)) - rte_panic("eth_ctx->pkt_wrk_cfg[eth_ctx->num_workers].f() failed to start\n"); - eth_ctx->pkt_wrk_cfg[i].state = 1; - if(eth_ctx->pkt_proc_core_id == 0) + /* workers */ + /** 0 Eth RX */ + pThCtx = (struct xran_worker_th_ctx*) _mm_malloc(sizeof(struct xran_worker_th_ctx), 64); + if(pThCtx == NULL){ + print_err("pThCtx allocation error\n"); + return XRAN_STATUS_FAIL; + } + memset(pThCtx, 0, sizeof(struct xran_worker_th_ctx)); + pThCtx->worker_id = 0; + pThCtx->worker_core_id = core_map[pThCtx->worker_id]; + snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_eth_rx", core_map[pThCtx->worker_id]); + pThCtx->task_func = process_dpdk_io_rx; + pThCtx->task_arg = NULL; + eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; + eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; + + /** 1 FH RX and BBDEV */ + pThCtx = (struct xran_worker_th_ctx*) _mm_malloc(sizeof(struct xran_worker_th_ctx), 64); + if(pThCtx == NULL){ + print_err("pThCtx allocation error\n"); + return XRAN_STATUS_FAIL; + } + memset(pThCtx, 0, sizeof(struct xran_worker_th_ctx)); + pThCtx->worker_id = 1; + pThCtx->worker_core_id = core_map[pThCtx->worker_id]; + snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_rx_p0", core_map[pThCtx->worker_id]); + pThCtx->task_func = ring_processing_func_per_port; + pThCtx->task_arg = (void*)0; + eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; + eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; + + /** 2 FH RX and BBDEV */ + pThCtx = (struct xran_worker_th_ctx*) _mm_malloc(sizeof(struct xran_worker_th_ctx), 64); + if(pThCtx == NULL){ + print_err("pThCtx allocation error\n"); + return XRAN_STATUS_FAIL; + } + memset(pThCtx, 0, sizeof(struct xran_worker_th_ctx)); + pThCtx->worker_id = 2; + pThCtx->worker_core_id = core_map[pThCtx->worker_id]; + snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_rx_p1", core_map[pThCtx->worker_id]); + pThCtx->task_func = ring_processing_func_per_port; + pThCtx->task_arg = (void*)1; + eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; + eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; + + /** 3 FH RX and BBDEV */ + pThCtx = (struct xran_worker_th_ctx*) _mm_malloc(sizeof(struct xran_worker_th_ctx), 64); + if(pThCtx == NULL){ + print_err("pThCtx allocation error\n"); + return XRAN_STATUS_FAIL; + } + memset(pThCtx, 0, sizeof(struct xran_worker_th_ctx)); + pThCtx->worker_id = 3; + pThCtx->worker_core_id = core_map[pThCtx->worker_id]; + snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_rx_p2", core_map[pThCtx->worker_id]); + pThCtx->task_func = ring_processing_func_per_port; + pThCtx->task_arg = (void*)2; + eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; + eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; + + /** 4 FH RX and BBDEV */ + pThCtx = (struct xran_worker_th_ctx*) _mm_malloc(sizeof(struct xran_worker_th_ctx), 64); + if(pThCtx == NULL){ + print_err("pThCtx allocation error\n"); + return XRAN_STATUS_FAIL; + } + memset(pThCtx, 0, sizeof(struct xran_worker_th_ctx)); + pThCtx->worker_id = 4; + pThCtx->worker_core_id = core_map[pThCtx->worker_id]; + snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_rx_p3", core_map[pThCtx->worker_id]); + pThCtx->task_func = ring_processing_func_per_port; + pThCtx->task_arg = (void*)3; + eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; + eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; + + /** FH TX and BBDEV */ + pThCtx = (struct xran_worker_th_ctx*) _mm_malloc(sizeof(struct xran_worker_th_ctx), 64); + if(pThCtx == NULL){ + print_err("pThCtx allocation error\n"); + return XRAN_STATUS_FAIL; + } + memset(pThCtx, 0, sizeof(struct xran_worker_th_ctx)); + pThCtx->worker_id = 5; + pThCtx->worker_core_id = core_map[pThCtx->worker_id]; + snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_eth_tx", core_map[pThCtx->worker_id]); + pThCtx->task_func = process_dpdk_io_tx; + pThCtx->task_arg = NULL; + eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; + eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; + + } /* -- if xran->ports == 4 -- */ + else if(eth_ctx->io_cfg.id == O_DU){ + if(fh_init->xran_ports == 3) + worker_ports = (void *)((1<<2) & xran_port_mask); + else if(fh_init->xran_ports == 4) + worker_ports = (void *)((1<<3) & xran_port_mask); + /* timing core */ + eth_ctx->time_wrk_cfg.f = xran_eth_trx_tasks; + eth_ctx->time_wrk_cfg.arg = NULL; + eth_ctx->time_wrk_cfg.state = 1; + + /* workers */ + /** 0 **/ + pThCtx = (struct xran_worker_th_ctx*) _mm_malloc(sizeof(struct xran_worker_th_ctx), 64); + if(pThCtx == NULL){ + print_err("pThCtx allocation error\n"); + return XRAN_STATUS_FAIL; + } + memset(pThCtx, 0, sizeof(struct xran_worker_th_ctx)); + pThCtx->worker_id = 0; + pThCtx->worker_core_id = core_map[pThCtx->worker_id]; + snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_rx_bbdev", core_map[pThCtx->worker_id]); + pThCtx->task_func = ring_processing_func; + pThCtx->task_arg = NULL; + eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; + eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; + + for (i = 2; i < fh_init->xran_ports; i++) { + struct xran_device_ctx * p_dev_update = xran_dev_get_ctx_by_id(i); + if(p_dev_update == NULL) { + print_err("p_dev_update\n"); + return XRAN_STATUS_FAIL; + } + p_dev_update->job2wrk_id[XRAN_JOB_TYPE_CP_UL] = pThCtx->worker_id; + printf("p:%d XRAN_JOB_TYPE_CP_UL worker id %d\n", i, p_dev_update->job2wrk_id[XRAN_JOB_TYPE_CP_UL]); + } + + /** 1 - CP GEN **/ + pThCtx = (struct xran_worker_th_ctx*) _mm_malloc(sizeof(struct xran_worker_th_ctx), 64); + if(pThCtx == NULL){ + print_err("pThCtx allocation error\n"); + return XRAN_STATUS_FAIL; + } + memset(pThCtx, 0, sizeof(struct xran_worker_th_ctx)); + pThCtx->worker_id = 1; + pThCtx->worker_core_id = core_map[pThCtx->worker_id]; + snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_cp_gen", core_map[pThCtx->worker_id]); + pThCtx->task_func = xran_processing_timer_only_func; + pThCtx->task_arg = NULL; + eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; + eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; + + /** 2 UP GEN **/ + pThCtx = (struct xran_worker_th_ctx*) _mm_malloc(sizeof(struct xran_worker_th_ctx), 64); + if(pThCtx == NULL){ + print_err("pThCtx allocation error\n"); + return XRAN_STATUS_FAIL; + } + memset(pThCtx, 0, sizeof(struct xran_worker_th_ctx)); + pThCtx->worker_id = 2; + pThCtx->worker_core_id = core_map[pThCtx->worker_id]; + snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_tx_gen", core_map[pThCtx->worker_id]); + pThCtx->task_func = xran_dl_pkt_ring_processing_func; + pThCtx->task_arg = (void*)((1<<0) & xran_port_mask); + eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; + eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; + + for (i = (fh_init->xran_ports-1); i < fh_init->xran_ports; i++) { + struct xran_device_ctx * p_dev_update = xran_dev_get_ctx_by_id(i); + if(p_dev_update == NULL) { + print_err("p_dev_update\n"); + return XRAN_STATUS_FAIL; + } + p_dev_update->job2wrk_id[XRAN_JOB_TYPE_CP_DL] = pThCtx->worker_id; + printf("p:%d XRAN_JOB_TYPE_CP_DL worker id %d\n", i, p_dev_update->job2wrk_id[XRAN_JOB_TYPE_CP_DL]); + } + + /** 3 UP GEN **/ + pThCtx = (struct xran_worker_th_ctx*) _mm_malloc(sizeof(struct xran_worker_th_ctx), 64); + if(pThCtx == NULL){ + print_err("pThCtx allocation error\n"); + return XRAN_STATUS_FAIL; + } + memset(pThCtx, 0, sizeof(struct xran_worker_th_ctx)); + pThCtx->worker_id = 3; + pThCtx->worker_core_id = core_map[pThCtx->worker_id]; + snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_tx_gen", core_map[pThCtx->worker_id]); + pThCtx->task_func = xran_dl_pkt_ring_processing_func; + pThCtx->task_arg = (void*)((1<<1) & xran_port_mask); + eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; + eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; + + for (i = (fh_init->xran_ports - 2); i < (fh_init->xran_ports - 1); i++) { + struct xran_device_ctx * p_dev_update = xran_dev_get_ctx_by_id(i); + if(p_dev_update == NULL) { + print_err("p_dev_update\n"); + return XRAN_STATUS_FAIL; + } + p_dev_update->job2wrk_id[XRAN_JOB_TYPE_CP_DL] = pThCtx->worker_id; + printf("p:%d XRAN_JOB_TYPE_CP_DL worker id %d\n", i, p_dev_update->job2wrk_id[XRAN_JOB_TYPE_CP_DL]); + } + + /** 4 UP GEN **/ + pThCtx = (struct xran_worker_th_ctx*) _mm_malloc(sizeof(struct xran_worker_th_ctx), 64); + if(pThCtx == NULL){ + print_err("pThCtx allocation error\n"); + return XRAN_STATUS_FAIL; + } + memset(pThCtx, 0, sizeof(struct xran_worker_th_ctx)); + pThCtx->worker_id = 4; + pThCtx->worker_core_id = core_map[pThCtx->worker_id]; + snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_tx_gen", core_map[pThCtx->worker_id]); + pThCtx->task_func = xran_dl_pkt_ring_processing_func; + pThCtx->task_arg = (void*)((1<<2) & xran_port_mask); + eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; + eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; + + /** 5 UP GEN **/ + pThCtx = (struct xran_worker_th_ctx*) _mm_malloc(sizeof(struct xran_worker_th_ctx), 64); + if(pThCtx == NULL){ + print_err("pThCtx allocation error\n"); + return XRAN_STATUS_FAIL; + } + memset(pThCtx, 0, sizeof(struct xran_worker_th_ctx)); + pThCtx->worker_id = 5; + pThCtx->worker_core_id = core_map[pThCtx->worker_id]; + snprintf(pThCtx->worker_name, RTE_DIM(pThCtx->worker_name), "%s-%d", "fh_tx_gen", core_map[pThCtx->worker_id]); + pThCtx->task_func = xran_dl_pkt_ring_processing_func; + pThCtx->task_arg = worker_ports; + eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].f = xran_generic_worker_thread; + eth_ctx->pkt_wrk_cfg[pThCtx->worker_id].arg = pThCtx; + } + else{ + print_err("unsupported configuration Cat %d numports %d total_num_cores = %d\n", fh_cfg->ru_conf.xranCat, fh_init->xran_ports, total_num_cores); + return XRAN_STATUS_FAIL; + } + break; + + default: + print_err("unsupported configuration Cat %d numports %d total_num_cores = %d\n", fh_cfg->ru_conf.xranCat, fh_init->xran_ports, total_num_cores); + return XRAN_STATUS_FAIL; + } + } else { + print_err("unsupported configuration\n"); + return XRAN_STATUS_FAIL; + } + + nWorkerCore = 1LL; + if(eth_ctx->io_cfg.pkt_proc_core) { + for (i = 0; i < coreNum && i < 64; i++) { + if (nWorkerCore & (uint64_t)eth_ctx->io_cfg.pkt_proc_core) { + xran_core_used[xran_num_cores_used++] = i; + if (rte_eal_remote_launch(eth_ctx->pkt_wrk_cfg[eth_ctx->num_workers].f, eth_ctx->pkt_wrk_cfg[eth_ctx->num_workers].arg, i)) + rte_panic("eth_ctx->pkt_wrk_cfg[eth_ctx->num_workers].f() failed to start\n"); + eth_ctx->pkt_wrk_cfg[i].state = 1; + if(eth_ctx->pkt_proc_core_id == 0) eth_ctx->pkt_proc_core_id = i; printf("spawn worker %d core %d\n",eth_ctx->num_workers, i); eth_ctx->worker_core[eth_ctx->num_workers++] = i; @@ -2777,7 +3713,6 @@ xran_open(void *pHandle, struct xran_fh_config* pConf) int32_t ret = XRAN_STATUS_SUCCESS; int32_t i; uint8_t nNumerology = 0; - int32_t lcore_id = 0; struct xran_device_ctx *p_xran_dev_ctx = NULL; struct xran_fh_config *pFhCfg = NULL; struct xran_fh_init *fh_init = NULL; @@ -2788,7 +3723,7 @@ xran_open(void *pHandle, struct xran_fh_config* pConf) if(pConf->dpdk_port < XRAN_PORTS_NUM) { p_xran_dev_ctx = xran_dev_get_ctx_by_id(pConf->dpdk_port); } else { - print_err("@0x%08p [ru %d ] pConf->dpdk_port > XRAN_PORTS_NUM\n", pConf, pConf->dpdk_port); + print_err("@0x%p [ru %d ] pConf->dpdk_port > XRAN_PORTS_NUM\n", pConf, pConf->dpdk_port); return XRAN_STATUS_FAIL; } @@ -2813,9 +3748,17 @@ xran_open(void *pHandle, struct xran_fh_config* pConf) p_xran_dev_ctx->enableCP = pConf->enableCP; p_xran_dev_ctx->enablePrach = pConf->prachEnable; p_xran_dev_ctx->enableSrs = pConf->srsEnable; + p_xran_dev_ctx->enableSrsCp = pConf->srsEnableCp; + p_xran_dev_ctx->nSrsDelaySym = pConf->SrsDelaySym; p_xran_dev_ctx->puschMaskEnable = pConf->puschMaskEnable; p_xran_dev_ctx->puschMaskSlot = pConf->puschMaskSlot; p_xran_dev_ctx->DynamicSectionEna = pConf->DynamicSectionEna; + p_xran_dev_ctx->RunSlotPrbMapBySymbolEnable = pConf->RunSlotPrbMapBySymbolEnable; + p_xran_dev_ctx->dssEnable = pConf->dssEnable; + p_xran_dev_ctx->dssPeriod = pConf->dssPeriod; + for(i=0; idssPeriod; i++) { + p_xran_dev_ctx->technology[i] = pConf->technology[i]; + } if(pConf->GPS_Alpha || pConf->GPS_Beta ){ offset_sec = pConf->GPS_Beta / 100; /* resolution of beta is 10ms */ @@ -2848,8 +3791,15 @@ xran_open(void *pHandle, struct xran_fh_config* pConf) } /* setup PRACH configuration for C-Plane */ + if(pConf->dssEnable){ + if((ret = xran_init_prach(pConf, p_xran_dev_ctx, XRAN_RAN_5GNR))< 0) + return ret; + if((ret = xran_init_prach_lte(pConf, p_xran_dev_ctx))< 0) + return ret; + } + else{ if(pConf->ru_conf.xranTech == XRAN_RAN_5GNR) { - if((ret = xran_init_prach(pConf, p_xran_dev_ctx))< 0){ + if((ret = xran_init_prach(pConf, p_xran_dev_ctx, XRAN_RAN_5GNR))< 0){ return ret; } } else if (pConf->ru_conf.xranTech == XRAN_RAN_LTE) { @@ -2857,6 +3807,7 @@ xran_open(void *pHandle, struct xran_fh_config* pConf) return ret; } } + } if((ret = xran_init_srs(pConf, p_xran_dev_ctx))< 0){ return ret; @@ -2927,6 +3878,9 @@ xran_open(void *pHandle, struct xran_fh_config* pConf) p_xran_dev_ctx->tx_sym_gen_func = xran_process_tx_sym_cp_on_dispatch_opt; } + if (p_xran_dev_ctx->fh_init.io_cfg.bbu_offload) + p_xran_dev_ctx->tx_sym_gen_func = xran_process_tx_sym_cp_on_ring; + printf("bbu_offload %d\n", p_xran_dev_ctx->fh_init.io_cfg.bbu_offload); if(pConf->dpdk_port == 0) { /* create all thread on open of port 0 */ xran_num_cores_used = 0; @@ -2976,8 +3930,14 @@ xran_start(void *pHandle) /* ToS = Top of Second start +- 1.5us */ struct timespec ts; char buff[100]; - + int i; struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx(); + struct xran_prb_map * prbMap0 = (struct xran_prb_map *) p_xran_dev_ctx->sFrontHaulRxPrbMapBbuIoBufCtrl[0][0][0].sBufferList.pBuffers->pData; + for(i = 0; i < XRAN_MAX_SECTIONS_PER_SLOT && i < prbMap0->nPrbElm; i++) + { + p_xran_dev_ctx->numSetBFWs_arr[i] = prbMap0->prbMap[i].bf_weight.numSetBFWs; + } + if(xran_get_if_state() == XRAN_RUNNING) { print_err("Already STARTED!!"); return (-1); @@ -3079,3 +4039,351 @@ xran_set_debug_stop(int32_t value, int32_t count) { return timing_set_debug_stop(value, count); } + + +int32_t xran_get_num_prb_elm(struct xran_prb_map* p_PrbMapIn, uint32_t mtu) +{ + int32_t i,j = 0; + int16_t iqwidth = p_PrbMapIn->prbMap[0].iqWidth; + struct xran_prb_elm *p_prb_elm_src; + int32_t nRBremain; + // int32_t eth_xran_up_headers_sz = sizeof(struct eth_xran_up_pkt_hdr); + // int32_t nmaxRB = (mtu - eth_xran_up_headers_sz - RTE_PKTMBUF_HEADROOM)/XRAN_PAYLOAD_1_RB_SZ(iqwidth); + int32_t eth_xran_up_headers_sz = sizeof(struct eth_xran_up_pkt_hdr) - sizeof(struct data_section_hdr); + int32_t nmaxRB = (mtu - eth_xran_up_headers_sz - RTE_PKTMBUF_HEADROOM)/(XRAN_PAYLOAD_1_RB_SZ(iqwidth)+sizeof(struct data_section_hdr)); + uint32_t nRBSize=0; + + if (mtu==9600) + nmaxRB--; //for some reason when mtu is 9600, only 195 RB can be sent, not 196 + + for (i = 0;i < p_PrbMapIn->nPrbElm; i++) + { + p_prb_elm_src = &p_PrbMapIn->prbMap[i]; + if (p_prb_elm_src->nRBSize <= nmaxRB) //no fragmentation needed + { + j++; + } + else + { + nRBremain = p_prb_elm_src->nRBSize - nmaxRB; + j++; + while (nRBremain > 0) + { + nRBSize = RTE_MIN(nmaxRB, nRBremain); + nRBremain -= nRBSize; + j++; + } + } + } + + return j; +} + + +int32_t xran_init_PrbMap_from_cfg(struct xran_prb_map* p_PrbMapIn, struct xran_prb_map* p_PrbMapOut, uint32_t mtu) +{ + int32_t i,j = 0; + int16_t iqwidth = p_PrbMapIn->prbMap[0].iqWidth; + struct xran_prb_elm *p_prb_elm_src, *p_prb_elm_dst; + int32_t nRBStart_tmp, nRBremain; + // int32_t eth_xran_up_headers_sz = sizeof(struct eth_xran_up_pkt_hdr); + // int32_t nmaxRB = (mtu - eth_xran_up_headers_sz - RTE_PKTMBUF_HEADROOM)/XRAN_PAYLOAD_1_RB_SZ(iqwidth); + int32_t eth_xran_up_headers_sz = sizeof(struct eth_xran_up_pkt_hdr) - sizeof(struct data_section_hdr); + int32_t nmaxRB = (mtu - eth_xran_up_headers_sz - RTE_PKTMBUF_HEADROOM)/(XRAN_PAYLOAD_1_RB_SZ(iqwidth)+sizeof(struct data_section_hdr)); + + if (mtu==9600) + nmaxRB--; //for some reason when mtu is 9600, only 195 RB can be sent, not 196 + + memcpy(p_PrbMapOut, p_PrbMapIn, sizeof(struct xran_prb_map)); + for (i = 0;i < p_PrbMapIn->nPrbElm; i++) + { + p_prb_elm_src = &p_PrbMapIn->prbMap[i]; + p_prb_elm_dst = &p_PrbMapOut->prbMap[j]; + memcpy(p_prb_elm_dst, p_prb_elm_src, sizeof(struct xran_prb_elm)); + + // int32_t nStartSymb, nEndSymb, numSymb, nRBStart, nRBEnd, nRBSize; + // nStartSymb = p_prb_elm_src->nStartSymb; + // nEndSymb = nStartSymb + p_prb_elm_src->numSymb; + if (p_prb_elm_src->nRBSize <= nmaxRB) //no fragmentation needed + { + p_prb_elm_dst->IsNewSect = 1; + p_prb_elm_dst->UP_nRBSize = p_prb_elm_src->nRBSize; + p_prb_elm_dst->UP_nRBStart = p_prb_elm_src->nRBStart; + p_prb_elm_dst->nSectId = i; + j++; + } + else + { + nRBStart_tmp = p_prb_elm_src->nRBStart + nmaxRB; + nRBremain = p_prb_elm_src->nRBSize - nmaxRB; + p_prb_elm_dst->IsNewSect = 1; + p_prb_elm_dst->UP_nRBSize = nmaxRB; + p_prb_elm_dst->UP_nRBStart = p_prb_elm_src->nRBStart; + p_prb_elm_dst->nSectId = i; + j++; + while (nRBremain > 0) + { + p_prb_elm_dst = &p_PrbMapOut->prbMap[j]; + memcpy(p_prb_elm_dst, p_prb_elm_src, sizeof(struct xran_prb_elm)); + p_prb_elm_dst->IsNewSect = 0; + p_prb_elm_dst->UP_nRBSize = RTE_MIN(nmaxRB, nRBremain); + p_prb_elm_dst->UP_nRBStart = nRBStart_tmp; + nRBremain -= p_prb_elm_dst->UP_nRBSize; + nRBStart_tmp += p_prb_elm_dst->UP_nRBSize; + p_prb_elm_dst->nSectId = i; + j++; + } + } + } + + p_PrbMapOut->nPrbElm = j; + return 0; +} + + +int32_t xran_init_PrbMap_from_cfg_for_rx(struct xran_prb_map* p_PrbMapIn, struct xran_prb_map* p_PrbMapOut, uint32_t mtu) +{ + int32_t i,j = 0; + int16_t iqwidth = p_PrbMapIn->prbMap[0].iqWidth; + struct xran_prb_elm *p_prb_elm_src, *p_prb_elm_dst; + int32_t nRBStart_tmp, nRBremain; + // int32_t eth_xran_up_headers_sz = sizeof(struct eth_xran_up_pkt_hdr); + // int32_t nmaxRB = (mtu - eth_xran_up_headers_sz - RTE_PKTMBUF_HEADROOM)/XRAN_PAYLOAD_1_RB_SZ(iqwidth); + int32_t eth_xran_up_headers_sz = sizeof(struct eth_xran_up_pkt_hdr) - sizeof(struct data_section_hdr); + int32_t nmaxRB = (mtu - eth_xran_up_headers_sz - RTE_PKTMBUF_HEADROOM)/(XRAN_PAYLOAD_1_RB_SZ(iqwidth)+sizeof(struct data_section_hdr)); + + if (mtu==9600) + nmaxRB--; //for some reason when mtu is 9600, only 195 RB can be sent, not 196 + nmaxRB *= XRAN_MAX_FRAGMENT; + + memcpy(p_PrbMapOut, p_PrbMapIn, sizeof(struct xran_prb_map)); + for (i = 0;i < p_PrbMapIn->nPrbElm; i++) + { + p_prb_elm_src = &p_PrbMapIn->prbMap[i]; + p_prb_elm_dst = &p_PrbMapOut->prbMap[j]; + memcpy(p_prb_elm_dst, p_prb_elm_src, sizeof(struct xran_prb_elm)); + + if (p_prb_elm_src->nRBSize <= nmaxRB) //no fragmentation needed + { + p_prb_elm_dst->IsNewSect = 1; + p_prb_elm_dst->UP_nRBSize = p_prb_elm_src->nRBSize; + p_prb_elm_dst->UP_nRBStart = p_prb_elm_src->nRBStart; + p_prb_elm_dst->nSectId = j; + j++; + } + else + { + nRBStart_tmp = p_prb_elm_src->nRBStart + nmaxRB; + nRBremain = p_prb_elm_src->nRBSize - nmaxRB; + p_prb_elm_dst->IsNewSect = 1; + p_prb_elm_dst->nRBSize = nmaxRB; + p_prb_elm_dst->UP_nRBSize = nmaxRB; + p_prb_elm_dst->UP_nRBStart = p_prb_elm_src->nRBStart; + p_prb_elm_dst->nSectId = j; + j++; + while (nRBremain > 0) + { + p_prb_elm_dst = &p_PrbMapOut->prbMap[j]; + memcpy(p_prb_elm_dst, p_prb_elm_src, sizeof(struct xran_prb_elm)); + p_prb_elm_dst->IsNewSect = 1; + p_prb_elm_dst->nRBSize = RTE_MIN(nmaxRB, nRBremain); + p_prb_elm_dst->nRBStart = nRBStart_tmp; + p_prb_elm_dst->UP_nRBSize = RTE_MIN(nmaxRB, nRBremain); + p_prb_elm_dst->UP_nRBStart = nRBStart_tmp; + nRBremain -= p_prb_elm_dst->UP_nRBSize; + nRBStart_tmp += p_prb_elm_dst->UP_nRBSize; + p_prb_elm_dst->nSectId = j; + j++; + } + } + } + + p_PrbMapOut->nPrbElm = j; + return 0; +} + + +int32_t xran_init_PrbMap_by_symbol_from_cfg(struct xran_prb_map* p_PrbMapIn, struct xran_prb_map* p_PrbMapOut, uint32_t mtu, uint32_t xran_max_prb) +{ + int32_t i = 0, j = 0, nPrbElm = 0; + int16_t iqwidth = p_PrbMapIn->prbMap[0].iqWidth; + struct xran_prb_elm *p_prb_elm_src, *p_prb_elm_dst; + struct xran_prb_elm prbMapTemp[XRAN_NUM_OF_SYMBOL_PER_SLOT]; + int32_t nRBStart_tmp, nRBremain, nStartSymb, nEndSymb, nRBStart, nRBEnd, nRBSize; + // int32_t eth_xran_up_headers_sz = sizeof(struct eth_xran_up_pkt_hdr); + // int32_t nmaxRB = (mtu - eth_xran_up_headers_sz - RTE_PKTMBUF_HEADROOM)/XRAN_PAYLOAD_1_RB_SZ(iqwidth); + int32_t eth_xran_up_headers_sz = sizeof(struct eth_xran_up_pkt_hdr) - sizeof(struct data_section_hdr); + int32_t nmaxRB = (mtu - eth_xran_up_headers_sz - RTE_PKTMBUF_HEADROOM)/(XRAN_PAYLOAD_1_RB_SZ(iqwidth)+sizeof(struct data_section_hdr)); + if (mtu==9600) + nmaxRB--; //for some reason when mtu is 9600, only 195 RB can be sent, not 196 + + + memcpy(p_PrbMapOut, p_PrbMapIn, sizeof(struct xran_prb_map)); + for(i = 0; i < XRAN_NUM_OF_SYMBOL_PER_SLOT; i++) + { + p_prb_elm_dst = &prbMapTemp[i]; + // nRBStart = 273; + nRBStart = xran_max_prb; + nRBEnd = 0; + + for(j = 0; j < p_PrbMapIn->nPrbElm; j++) + { + p_prb_elm_src = &(p_PrbMapIn->prbMap[j]); + nStartSymb = p_prb_elm_src->nStartSymb; + nEndSymb = nStartSymb + p_prb_elm_src->numSymb; + + if((i >= nStartSymb) && (i < nEndSymb)) + { + if(nRBStart > p_prb_elm_src->nRBStart) + { + nRBStart = p_prb_elm_src->nRBStart; + } + if(nRBEnd < (p_prb_elm_src->nRBStart + p_prb_elm_src->nRBSize)) + { + nRBEnd = (p_prb_elm_src->nRBStart + p_prb_elm_src->nRBSize); + } + + p_prb_elm_dst->nBeamIndex = p_prb_elm_src->nBeamIndex; + p_prb_elm_dst->bf_weight_update = p_prb_elm_src->bf_weight_update; + p_prb_elm_dst->compMethod = p_prb_elm_src->compMethod; + p_prb_elm_dst->iqWidth = p_prb_elm_src->iqWidth; + p_prb_elm_dst->ScaleFactor = p_prb_elm_src->ScaleFactor; + p_prb_elm_dst->reMask = p_prb_elm_src->reMask; + p_prb_elm_dst->BeamFormingType = p_prb_elm_src->BeamFormingType; + } + } + + if(nRBEnd < nRBStart) + { + p_prb_elm_dst->nRBStart = 0; + p_prb_elm_dst->nRBSize = 0; + p_prb_elm_dst->nStartSymb = i; + p_prb_elm_dst->numSymb = 1; + } + else + { + p_prb_elm_dst->nRBStart = nRBStart; + p_prb_elm_dst->nRBSize = nRBEnd - nRBStart; + p_prb_elm_dst->nStartSymb = i; + p_prb_elm_dst->numSymb = 1; + } + } + + for(i = 0; i < XRAN_NUM_OF_SYMBOL_PER_SLOT; i++) + { + if((prbMapTemp[i].nRBSize != 0)) + { + nRBStart = prbMapTemp[i].nRBStart; + nRBSize = prbMapTemp[i].nRBSize; + prbMapTemp[nPrbElm].nRBStart = prbMapTemp[i].nRBStart; + prbMapTemp[nPrbElm].nRBSize = prbMapTemp[i].nRBSize; + prbMapTemp[nPrbElm].nStartSymb = prbMapTemp[i].nStartSymb; + prbMapTemp[nPrbElm].nBeamIndex = prbMapTemp[i].nBeamIndex; + prbMapTemp[nPrbElm].bf_weight_update = prbMapTemp[i].bf_weight_update; + prbMapTemp[nPrbElm].compMethod = prbMapTemp[i].compMethod; + prbMapTemp[nPrbElm].iqWidth = prbMapTemp[i].iqWidth; + prbMapTemp[nPrbElm].ScaleFactor = prbMapTemp[i].ScaleFactor; + prbMapTemp[nPrbElm].reMask = prbMapTemp[i].reMask; + prbMapTemp[nPrbElm].BeamFormingType = prbMapTemp[i].BeamFormingType; + i++; + break; + } + } + + for(; i < XRAN_NUM_OF_SYMBOL_PER_SLOT; i++) + { + if((nRBStart == prbMapTemp[i].nRBStart) && (nRBSize == prbMapTemp[i].nRBSize)) + { + prbMapTemp[nPrbElm].numSymb++; + } + else + { + nPrbElm++; + prbMapTemp[nPrbElm].nStartSymb = prbMapTemp[i].nStartSymb; + prbMapTemp[nPrbElm].nRBStart = prbMapTemp[i].nRBStart; + prbMapTemp[nPrbElm].nRBSize = prbMapTemp[i].nRBSize; + prbMapTemp[nPrbElm].nBeamIndex = prbMapTemp[i].nBeamIndex; + prbMapTemp[nPrbElm].bf_weight_update = prbMapTemp[i].bf_weight_update; + prbMapTemp[nPrbElm].compMethod = prbMapTemp[i].compMethod; + prbMapTemp[nPrbElm].iqWidth = prbMapTemp[i].iqWidth; + prbMapTemp[nPrbElm].ScaleFactor = prbMapTemp[i].ScaleFactor; + prbMapTemp[nPrbElm].reMask = prbMapTemp[i].reMask; + prbMapTemp[nPrbElm].BeamFormingType = prbMapTemp[i].BeamFormingType; + + nRBStart = prbMapTemp[i].nRBStart; + nRBSize = prbMapTemp[i].nRBSize; + } + } + + for(i = 0; i < nPrbElm; i++) + { + if(prbMapTemp[i].nRBSize == 0) + prbMapTemp[i].nRBSize = 1; + } + + if(prbMapTemp[nPrbElm].nRBSize != 0) + nPrbElm++; + + + j = 0; + + for (i = 0;i < nPrbElm; i++) + { + p_prb_elm_src = &prbMapTemp[i]; + p_prb_elm_dst = &p_PrbMapOut->prbMap[j]; + memcpy(p_prb_elm_dst, p_prb_elm_src, sizeof(struct xran_prb_elm)); + if (p_prb_elm_src->nRBSize <= nmaxRB) //no fragmentation needed + { + p_prb_elm_dst->IsNewSect = 1; + p_prb_elm_dst->UP_nRBSize = p_prb_elm_src->nRBSize; + p_prb_elm_dst->UP_nRBStart = p_prb_elm_src->nRBStart; + p_prb_elm_dst->nSectId = i; + j++; + } + else + { + nRBStart_tmp = p_prb_elm_src->nRBStart + nmaxRB; + nRBremain = p_prb_elm_src->nRBSize - nmaxRB; + p_prb_elm_dst->IsNewSect = 1; + p_prb_elm_dst->UP_nRBSize = nmaxRB; + p_prb_elm_dst->UP_nRBStart = p_prb_elm_src->nRBStart; + p_prb_elm_dst->nSectId = i; + j++; + while (nRBremain > 0) + { + p_prb_elm_dst = &p_PrbMapOut->prbMap[j]; + memcpy(p_prb_elm_dst, p_prb_elm_src, sizeof(struct xran_prb_elm)); + p_prb_elm_dst->IsNewSect = 0; + p_prb_elm_dst->UP_nRBSize = RTE_MIN(nmaxRB, nRBremain); + p_prb_elm_dst->UP_nRBStart = nRBStart_tmp; + nRBremain -= p_prb_elm_dst->UP_nRBSize; + nRBStart_tmp += p_prb_elm_dst->UP_nRBSize; + p_prb_elm_dst->nSectId = i; + j++; + } + } + } + + p_PrbMapOut->nPrbElm = j; + + return 0; +} + +inline void MLogXRANTask(uint32_t taskid, uint64_t ticksstart, uint64_t ticksstop) +{ + if (mlogxranenable) + { + MLogTask(taskid, ticksstart, ticksstop); + } + return; +} + +inline uint64_t MLogXRANTick(void) +{ + if (mlogxranenable) + return MLogTick(); + else + return 0; +} + + diff --git a/fhi_lib/lib/src/xran_main.h b/fhi_lib/lib/src/xran_main.h index b20c1e5..90053ff 100644 --- a/fhi_lib/lib/src/xran_main.h +++ b/fhi_lib/lib/src/xran_main.h @@ -47,7 +47,6 @@ extern uint16_t xran_SFN_at_Sec_Start; extern uint16_t xran_max_frame; static struct timespec sleeptime = {.tv_nsec = 1E3 }; /* 1 us */ - uint32_t xran_schedule_to_worker(enum xran_job_type_id job_type_id, struct xran_device_ctx * p_xran_dev_ctx); uint16_t xran_getSfnSecStart(void); void tx_cp_dl_cb(struct rte_timer *tim, void *arg); @@ -57,6 +56,10 @@ void tti_to_phy_cb(struct rte_timer *tim, void *arg); void rx_ul_deadline_full_cb(struct rte_timer *tim, void *arg); void rx_ul_user_sym_cb(struct rte_timer *tim, void *arg); void rx_ul_deadline_half_cb(struct rte_timer *tim, void *arg); +void rx_ul_deadline_one_fourths_cb(struct rte_timer *tim, void *arg); +void rx_ul_deadline_three_fourths_cb(struct rte_timer *tim, void *arg); +void rx_ul_static_srs_cb(struct rte_timer *tim, void *arg); +int32_t xran_fh_rx_and_up_tx_processing(void *port_mask); #ifdef __cplusplus } diff --git a/fhi_lib/lib/src/xran_mem_mgr.c b/fhi_lib/lib/src/xran_mem_mgr.c index 3e401e6..e1dcb6c 100644 --- a/fhi_lib/lib/src/xran_mem_mgr.c +++ b/fhi_lib/lib/src/xran_mem_mgr.c @@ -63,6 +63,10 @@ xran_mm_init (void * pHandle, uint64_t nMemorySize, int32_t xran_bm_init (void * pHandle, uint32_t * pPoolIndex, uint32_t nNumberOfBuffers, uint32_t nBufferSize) { + //printf("nNumberOfBuffers=%u\n", nNumberOfBuffers); + if(nNumberOfBuffers == 280) + nNumberOfBuffers = 560; + XranSectorHandleInfo* pXranCc = (XranSectorHandleInfo*) pHandle; uint32_t nAllocBufferSize; @@ -82,18 +86,20 @@ xran_bm_init (void * pHandle, uint32_t * pPoolIndex, uint32_t nNumberOfBuffers, return -1; } - printf("%s: [ handle %p %d %d ] [nPoolIndex %d] nNumberOfBuffers %d nBufferSize %d\n", pool_name, - pXranCc, pXranCc->nXranPort, pXranCc->nIndex, pXranCc->nBufferPoolIndex, nNumberOfBuffers, nBufferSize); + printf("%s: [ handle %p %d %d ] [nPoolIndex %d] nNumberOfBuffers %d nBufferSize %d socket_id %d\n", pool_name, + pXranCc, pXranCc->nXranPort, pXranCc->nIndex, pXranCc->nBufferPoolIndex, nNumberOfBuffers, nBufferSize, rte_socket_id()); pXranCc->p_bufferPool[pXranCc->nBufferPoolIndex] = rte_pktmbuf_pool_create(pool_name, nNumberOfBuffers, - MBUF_CACHE, 0, nAllocBufferSize, rte_socket_id()); + /*MBUF_CACHE*/0, 0, nAllocBufferSize, rte_socket_id()); + if(pXranCc->p_bufferPool[pXranCc->nBufferPoolIndex] == NULL){ - rte_panic("rte_pktmbuf_pool_create failed [ handle %p %d %d ] [nPoolIndex %d] nNumberOfBuffers %d nBufferSize %d errno %s\n", - pXranCc, pXranCc->nXranPort, pXranCc->nIndex, pXranCc->nBufferPoolIndex, nNumberOfBuffers, nBufferSize, rte_strerror(rte_errno)); + rte_panic("rte_pktmbuf_pool_create failed [poolName=%s, handle %p %d %d ] [nPoolIndex %d] nNumberOfBuffers %d nBufferSize %d errno %s\n", + pool_name, pXranCc, pXranCc->nXranPort, pXranCc->nIndex, pXranCc->nBufferPoolIndex, nNumberOfBuffers, nBufferSize, rte_strerror(rte_errno)); return -1; } - + //printf("press enter (RTE_MEMPOOL_NAMESIZE=%u)\n", RTE_MEMPOOL_NAMESIZE); + //getchar(); pXranCc->bufferPoolElmSz[pXranCc->nBufferPoolIndex] = nBufferSize; pXranCc->bufferPoolNumElm[pXranCc->nBufferPoolIndex] = nNumberOfBuffers; @@ -150,9 +156,50 @@ xran_bm_allocate_buffer(void * pHandle, uint32_t nPoolIndex, void **ppData, voi } int32_t -xran_bm_free_buffer(void * pHandle, void *pData, void *pCtrl) +xran_bm_allocate_ring(void * pHandle, const char *rng_name_prefix, uint16_t cc_id, uint16_t buff_id, uint16_t ant_id, uint16_t symb_id, void **ppRing) { + int32_t ret = 0; XranSectorHandleInfo* pXranCc = (XranSectorHandleInfo*) pHandle; + uint32_t xran_port_id; + char ring_name[32] = ""; + struct rte_ring *ring = NULL; + ssize_t r_size; + + if(pHandle){ + xran_port_id = pXranCc->nXranPort; + *ppRing = NULL; + snprintf(ring_name, RTE_DIM(ring_name), "%srb%dp%dcc%dant%dsym%d", rng_name_prefix, buff_id, xran_port_id, cc_id, ant_id, symb_id); + print_dbg("%s\n", ring_name); + r_size = rte_ring_get_memsize(XRAN_MAX_MEM_IF_RING_SIZE); + ring = (struct rte_ring *)xran_malloc(r_size); + if(ring == NULL) { + print_err("[%srb%dp%dcc%dant%dsym%d] ring alloc failed \n", rng_name_prefix, buff_id, xran_port_id, cc_id, ant_id, symb_id); + return -1; + } + ret = rte_ring_init(ring, ring_name, XRAN_MAX_MEM_IF_RING_SIZE, /*RING_F_SC_DEQ*/0); + if(ret != 0){ + print_err("[%srb%dp%dcc%dant%dsym%d] rte_ring_init failed \n", rng_name_prefix, buff_id, xran_port_id, cc_id, ant_id, symb_id); + return -1; + } + + if(ring) { + *ppRing = (void *)ring; + }else { + print_err("[%srb%dp%dcc%dant%dsym%d] ring alloc failed \n", rng_name_prefix, buff_id, xran_port_id, cc_id, ant_id, symb_id); + return -1; + } + } else { + print_err("pHandle failed \n"); + return -1; + } + + return 0; +} + +int32_t +xran_bm_free_buffer(void * pHandle, void *pData, void *pCtrl) +{ + //XranSectorHandleInfo* pXranCc = (XranSectorHandleInfo*) pHandle; if(pCtrl) rte_pktmbuf_free(pCtrl); diff --git a/fhi_lib/lib/src/xran_mem_mgr.h b/fhi_lib/lib/src/xran_mem_mgr.h index 95ef89a..58b3372 100644 --- a/fhi_lib/lib/src/xran_mem_mgr.h +++ b/fhi_lib/lib/src/xran_mem_mgr.h @@ -39,7 +39,6 @@ extern "C" { #include "xran_fh_o_du.h" - #ifdef __cplusplus } #endif diff --git a/fhi_lib/lib/src/xran_rx_proc.c b/fhi_lib/lib/src/xran_rx_proc.c index 36bd72c..e7056f4 100644 --- a/fhi_lib/lib/src/xran_rx_proc.c +++ b/fhi_lib/lib/src/xran_rx_proc.c @@ -60,7 +60,6 @@ #include "xran_dev.h" #include "xran_frame_struct.h" #include "xran_printf.h" -#include "xran_app_frag.h" #include "xran_rx_proc.h" #include "xran_cp_proc.h" @@ -87,8 +86,8 @@ int xran_process_prach_sym(void *arg, struct xran_device_ctx * p_xran_dev_ctx = (struct xran_device_ctx *)arg; uint8_t symb_id_offset; uint32_t tti = 0; - xran_status_t status; - void *pHandle = NULL; + uint32_t ttt_det = 0; + //xran_status_t status; struct rte_mbuf *mb; uint32_t interval = p_xran_dev_ctx->interval_us_local; @@ -97,13 +96,92 @@ int xran_process_prach_sym(void *arg, tti = frame_id * SLOTS_PER_SYSTEMFRAME(interval) + subframe_id * SLOTNUM_PER_SUBFRAME(interval) + slot_id; - status = tti << 16 | symb_id; + //status = tti << 16 | symb_id; + + + struct xran_prach_cp_config *pPrachCPConfig; + uint32_t StartUsedFirstSym; + if(p_xran_dev_ctx->dssEnable){ + int i = tti % p_xran_dev_ctx->dssPeriod; + if(p_xran_dev_ctx->technology[i]==1) { + pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfig); + } + else{ + pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfigLTE); + } + } + else{ + pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfig); + } + + + if (1500 == p_xran_dev_ctx->fh_init.mtu && pPrachCPConfig->filterIdx == XRAN_FILTERINDEX_PRACH_012) + { + /*one prach for more then one pkg*/ + StartUsedFirstSym = 1; + } + else{ + StartUsedFirstSym = 0; + } + if(CC_ID < XRAN_MAX_SECTOR_NR && Ant_ID < XRAN_MAX_ANTENNA_NR && symb_id < XRAN_NUM_OF_SYMBOL_PER_SLOT){ + uint8_t numerology = xran_get_conf_numerology(p_xran_dev_ctx); + if (numerology > 0 && pPrachCPConfig->filterIdx == XRAN_FILTERINDEX_PRACH_012) ttt_det = (1<fh_cfg.ru_conf.compMeth; + uint8_t iqWidth = p_xran_dev_ctx->fh_cfg.ru_conf.iqWidth; + uint32_t iqLenPrePrb,dataOffset,dataLen; + uint8_t * pdata; + symb_id_offset = 0; + if (XRAN_COMPMETHOD_NONE == compMeth) + { + iqLenPrePrb = 48; + } + else + { + iqLenPrePrb = 3*iqWidth+1; + } + dataOffset = start_prbu*iqLenPrePrb; + dataLen = num_prbu*iqLenPrePrb; + + if(iq_data_start && size) { + pdata = p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrlDecomp[(tti + ttt_det)% XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id_offset].pData + dataOffset; + mb = p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrlDecomp[(tti + ttt_det)% XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id_offset].pCtrl; + if(mb) + rte_pktmbuf_free(mb); + + if(p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder == XRAN_CPU_LE_BYTE_ORDER) { + int idx = 0; + uint16_t *psrc = (uint16_t *)iq_data_start; + uint16_t *pdst = (uint16_t *)pdata; + for (idx = 0; idx < dataLen; idx++){ + pdst[idx] = (psrc[idx]>>8) | (psrc[idx]<<8); //rte_be_to_cpu_16(psrc[idx]); + } + //*mb_free = MBUF_FREE; + } + else{ + memcpy(pdata,iq_data_start,dataLen); + } + + p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrlDecomp[(tti + ttt_det) % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id_offset].pCtrl = mbuf; + *mb_free = MBUF_KEEP; + } + else { + //print_err("pos %p iq_data_start %p size %d\n",pos, iq_data_start, size); + print_err("iq_data_start %p size %d\n", iq_data_start, size); + } + + } + else + { symb_id_offset = symb_id - p_xran_dev_ctx->prach_start_symbol[CC_ID]; //make the storing of prach packets to start from 0 for easy of processing within PHY // pos = (char*) p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id_offset].pData; if(iq_data_start && size) { - mb = p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id_offset].pCtrl; + mb = p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrlDecomp[(tti + ttt_det) % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id_offset].pCtrl; if(mb) rte_pktmbuf_free(mb); @@ -117,15 +195,17 @@ int xran_process_prach_sym(void *arg, //*mb_free = MBUF_FREE; } - p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrlDecomp[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id_offset].pData = iq_data_start; - p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrlDecomp[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id_offset].pCtrl = mbuf; - + p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrlDecomp[(tti + ttt_det) % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id_offset].pData = iq_data_start; + p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrlDecomp[(tti + ttt_det) % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id_offset].pCtrl = mbuf; *mb_free = MBUF_KEEP; } else { //print_err("pos %p iq_data_start %p size %d\n",pos, iq_data_start, size); print_err("iq_data_start %p size %d\n", iq_data_start, size); } + + } + } else { print_err("TTI %d(f_%d sf_%d slot_%d) CC %d Ant_ID %d symb_id %d\n",tti, frame_id, subframe_id, slot_id, CC_ID, Ant_ID, symb_id); } @@ -156,8 +236,6 @@ int32_t xran_process_srs_sym(void *arg, char *pos = NULL; struct xran_device_ctx * p_xran_dev_ctx = (struct xran_device_ctx *)arg; uint32_t tti = 0; - xran_status_t status; - void *pHandle = NULL; struct rte_mbuf *mb = NULL; struct xran_prb_map * pRbMap = NULL; struct xran_prb_elm * prbMapElm = NULL; @@ -173,39 +251,128 @@ int32_t xran_process_srs_sym(void *arg, tti = frame_id * SLOTS_PER_SYSTEMFRAME(interval) + subframe_id * SLOTNUM_PER_SUBFRAME(interval) + slot_id; - status = tti << 16 | symb_id; - if(CC_ID != 0) rte_panic("CC_ID != 0"); - if(CC_ID < XRAN_MAX_SECTOR_NR && Ant_ID < p_xran_dev_ctx->fh_cfg.nAntElmTRx && symb_id < XRAN_NUM_OF_SYMBOL_PER_SLOT) { + + if(CC_ID < XRAN_MAX_SECTOR_NR + && Ant_ID < p_xran_dev_ctx->fh_cfg.nAntElmTRx + && symb_id < XRAN_NUM_OF_SYMBOL_PER_SLOT) + { + if (0 == p_xran_dev_ctx->enableSrsCp) + { + + struct xran_section_desc *p_sec_desc = NULL; pos = (char*) p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id].pData; pRbMap = (struct xran_prb_map *) p_xran_dev_ctx->sFHSrsRxPrbMapBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers->pData; - if(pRbMap){ + + + if(pRbMap && pRbMap->nPrbElm > 0) + { + prbMapElm = &pRbMap->prbMap[0]; + if (symb_id < prbMapElm->nStartSymb || symb_id >= (prbMapElm->nStartSymb + prbMapElm->numSymb)) + { + print_err("%dnot srs symbole, srs sym start is %d,num is %d\n", symb_id,prbMapElm->nStartSymb,prbMapElm->numSymb); + *mb_free = MBUF_FREE; + return size; + } + sec_desc_idx = prbMapElm->nSecDesc[0]; + p_sec_desc = &(prbMapElm->sec_desc[0][0]); + if(sec_desc_idx >= XRAN_NUM_OF_SYMBOL_PER_SLOT*XRAN_MAX_FRAGMENT) + { + print_err("sec_desc_idx %d is more then %d\n", sec_desc_idx,XRAN_NUM_OF_SYMBOL_PER_SLOT*XRAN_MAX_FRAGMENT); + *mb_free = MBUF_FREE; + return size; + } + + pos += start_prbu * XRAN_PAYLOAD_1_RB_SZ(iq_sample_size_bits); + if(pos && iq_data_start && size) + { + if (p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder == XRAN_CPU_LE_BYTE_ORDER) + { + rte_panic("XRAN_CPU_LE_BYTE_ORDER is not supported 0x16%lx\n", (long)mb); + } + else if (likely(p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder == XRAN_NE_BE_BYTE_ORDER)) + { + p_sec_desc += sec_desc_idx; + if(p_sec_desc) + { + mb = p_sec_desc->pCtrl; + if(mb) + { + rte_pktmbuf_free(mb); + } + p_sec_desc->pData = iq_data_start; + p_sec_desc->pCtrl = mbuf; + p_sec_desc->start_prbu = start_prbu; + p_sec_desc->num_prbu = num_prbu; + p_sec_desc->iq_buffer_len = size; + p_sec_desc->iq_buffer_offset = RTE_PTR_DIFF(iq_data_start, mbuf); + prbMapElm->nSecDesc[0] += 1; + } + else + { + print_err("p_sec_desc==NULL tti %u ant %d symb_id %d sec_desc_idx %d\n", tti, Ant_ID, symb_id, sec_desc_idx); + *mb_free = MBUF_FREE; + return size; + } + *mb_free = MBUF_KEEP; + } /* else if (likely(p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder == XRAN_NE_BE_BYTE_ORDER)) */ + } /* if(pos && iq_data_start && size) */ + else + { + print_err("pos %p iq_data_start %p size %d\n",pos, iq_data_start, size); + } + + } + else + { + print_err("pRbMap==NULL\n"); + *mb_free = MBUF_FREE; + return size; + } + + } + else + { + pos = (char*) p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id].pData; + pRbMap = (struct xran_prb_map *) p_xran_dev_ctx->sFHSrsRxPrbMapBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers->pData; + if(pRbMap) + { prbMapElm = &pRbMap->prbMap[sect_id]; - if(sect_id >= pRbMap->nPrbElm) { + if(sect_id >= pRbMap->nPrbElm) + { print_err("sect_id %d !=pRbMap->nPrbElm %d\n", sect_id,pRbMap->nPrbElm); *mb_free = MBUF_FREE; return size; } - } else { + } + else + { print_err("pRbMap==NULL\n"); *mb_free = MBUF_FREE; return size; } + pos += start_prbu * XRAN_PAYLOAD_1_RB_SZ(iq_sample_size_bits); - if(pos && iq_data_start && size){ - if (p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder == XRAN_CPU_LE_BYTE_ORDER) { + if(pos && iq_data_start && size) + { + if (p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder == XRAN_CPU_LE_BYTE_ORDER) + { int idx = 0; uint16_t *psrc = (uint16_t *)iq_data_start; uint16_t *pdst = (uint16_t *)pos; rte_panic("XRAN_CPU_LE_BYTE_ORDER is not supported 0x16%lx\n", (long)mb); /* network byte (be) order of IQ to CPU byte order (le) */ - for (idx = 0; idx < size/sizeof(int16_t); idx++){ + for (idx = 0; idx < size/sizeof(int16_t); idx++) + { pdst[idx] = (psrc[idx]>>8) | (psrc[idx]<<8); //rte_be_to_cpu_16(psrc[idx]); } - } else if (likely(p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder == XRAN_NE_BE_BYTE_ORDER)){ - /*if (pRbMap->nPrbElm == 1){ + } + else if (likely(p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder == XRAN_NE_BE_BYTE_ORDER)) + { + /*if (pRbMap->nPrbElm == 1) + { if (likely (p_xran_dev_ctx->fh_init.mtu >= p_xran_dev_ctx->fh_cfg.nULRBs * XRAN_PAYLOAD_1_RB_SZ(iq_sample_size_bits))) { @@ -219,28 +386,38 @@ int32_t xran_process_srs_sym(void *arg, p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id].pData = iq_data_start; p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id].pCtrl = mbuf; *mb_free = MBUF_KEEP; - } else { + } + else + { // packet can be fragmented copy RBs memcpy(pos, iq_data_start, size); *mb_free = MBUF_FREE; } - } else */{ + } + else */ + { struct xran_section_desc *p_sec_desc = NULL; prbMapElm = &pRbMap->prbMap[sect_id]; - sec_desc_idx = 0;//prbMapElm->nSecDesc[symb_id]; + // sec_desc_idx = 0;//prbMapElm->nSecDesc[symb_id]; + sec_desc_idx = prbMapElm->nSecDesc[symb_id]; - if (sec_desc_idx < XRAN_MAX_FRAGMENT) { - p_sec_desc = prbMapElm->p_sec_desc[symb_id][sec_desc_idx]; - } else { - print_err("sect_id %d: sec_desc_idx %d tti %u ant %d symb_id %d sec_desc_idx %d\n", sect_id, sec_desc_idx, tti, Ant_ID, symb_id, sec_desc_idx); + if (sec_desc_idx < XRAN_MAX_FRAGMENT) + { + p_sec_desc = &prbMapElm->sec_desc[symb_id][sec_desc_idx]; + } + else + { + print_err("[p %d]sect_id %d: sec_desc_idx %d tti %u ant %d symb_id %d sec_desc_idx %d\n", p_xran_dev_ctx->xran_port_id, sect_id, sec_desc_idx, tti, Ant_ID, symb_id, sec_desc_idx); prbMapElm->nSecDesc[symb_id] = 0; *mb_free = MBUF_FREE; return size; } - if(p_sec_desc){ + if(p_sec_desc) + { mb = p_sec_desc->pCtrl; - if(mb){ + if(mb) + { rte_pktmbuf_free(mb); } p_sec_desc->pData = iq_data_start; @@ -249,19 +426,26 @@ int32_t xran_process_srs_sym(void *arg, p_sec_desc->num_prbu = num_prbu; p_sec_desc->iq_buffer_len = size; p_sec_desc->iq_buffer_offset = RTE_PTR_DIFF(iq_data_start, mbuf); - //prbMapElm->nSecDesc[symb_id] += 1; - } else { + prbMapElm->nSecDesc[symb_id] += 1; + } + else + { print_err("p_sec_desc==NULL tti %u ant %d symb_id %d sec_desc_idx %d\n", tti, Ant_ID, symb_id, sec_desc_idx); *mb_free = MBUF_FREE; return size; } *mb_free = MBUF_KEEP; } - } - } else { + } /* else if (likely(p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder == XRAN_NE_BE_BYTE_ORDER)) */ + } /* if(pos && iq_data_start && size) */ + else + { print_err("pos %p iq_data_start %p size %d\n",pos, iq_data_start, size); } - } else { + } + } /* if(CC_ID < XRAN_MAX_SECTOR_NR && Ant_ID < p_xran_dev_ctx->fh_cfg.nAntElmTRx && symb_id < XRAN_NUM_OF_SYMBOL_PER_SLOT) */ + else + { print_err("o-xu%d: TTI %d(f_%d sf_%d slot_%d) CC %d Ant_ID %d symb_id %d\n",p_xran_dev_ctx->xran_port_id, tti, frame_id, subframe_id, slot_id, CC_ID, Ant_ID, symb_id); } @@ -333,29 +517,48 @@ int32_t xran_process_rx_sym(void *arg, char *pos = NULL; struct xran_device_ctx * p_xran_dev_ctx = (struct xran_device_ctx *)arg; uint32_t tti = 0; - xran_status_t status; - void *pHandle = NULL; + //xran_status_t status; struct rte_mbuf *mb = NULL; struct xran_prb_map * pRbMap = NULL; struct xran_prb_elm * prbMapElm = NULL; uint16_t iq_sample_size_bits = 16; - uint16_t sec_desc_idx; + uint16_t sec_desc_idx, prb_elem_id=0; uint32_t interval = p_xran_dev_ctx->interval_us_local; + uint16_t i=0, total_sections=0; if(expect_comp) iq_sample_size_bits = iqWidth; tti = frame_id * SLOTS_PER_SYSTEMFRAME(interval) + subframe_id * SLOTNUM_PER_SUBFRAME(interval) + slot_id; - status = tti << 16 | symb_id; + //status = tti << 16 | symb_id; if(CC_ID < XRAN_MAX_SECTOR_NR && Ant_ID < XRAN_MAX_ANTENNA_NR && symb_id < XRAN_NUM_OF_SYMBOL_PER_SLOT){ pos = (char*) p_xran_dev_ctx->sFrontHaulRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id].pData; pRbMap = (struct xran_prb_map *) p_xran_dev_ctx->sFrontHaulRxPrbMapBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers->pData; if(pRbMap){ - prbMapElm = &pRbMap->prbMap[sect_id]; - if(sect_id >= pRbMap->nPrbElm) { - print_err("sect_id %d !=pRbMap->nPrbElm %d\n", sect_id,pRbMap->nPrbElm); + /** Get the prb_elem_id */ + total_sections=0; + if(pRbMap->prbMap[0].bf_weight.extType == 1) + { + for(i=0 ; i < pRbMap->nPrbElm ; i++) + { + total_sections += pRbMap->prbMap[i].bf_weight.numSetBFWs; + if(total_sections >= (sect_id + 1)) + { + prb_elem_id = i; + break; + } + } + } + else + { + prb_elem_id = sect_id; + } + + prbMapElm = &pRbMap->prbMap[prb_elem_id]; + if(prb_elem_id >= pRbMap->nPrbElm) { + print_err("sect id %d prb_elem_id %d !=pRbMap->nPrbElm %d\n",sect_id, prb_elem_id,pRbMap->nPrbElm); *mb_free = MBUF_FREE; return size; } @@ -377,47 +580,15 @@ int32_t xran_process_rx_sym(void *arg, pdst[idx] = (psrc[idx]>>8) | (psrc[idx]<<8); //rte_be_to_cpu_16(psrc[idx]); } } else if (likely(p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder == XRAN_NE_BE_BYTE_ORDER)){ - if (pRbMap->nPrbElm == 1){ - prbMapElm = &pRbMap->prbMap[0]; - if (likely (p_xran_dev_ctx->fh_init.mtu >= - prbMapElm->nRBSize * XRAN_PAYLOAD_1_RB_SZ(iq_sample_size_bits))) - { - /* no fragmentation */ - struct xran_section_desc *p_sec_desc = NULL; - sec_desc_idx = 0;//prbMapElm->nSecDesc[symb_id]; - p_sec_desc = prbMapElm->p_sec_desc[symb_id][sec_desc_idx]; - - if(p_sec_desc){ - mb = p_sec_desc->pCtrl; - if(mb){ - rte_pktmbuf_free(mb); - } - p_sec_desc->pData = iq_data_start; - p_sec_desc->pCtrl = mbuf; - p_sec_desc->start_prbu = start_prbu; - p_sec_desc->num_prbu = num_prbu; - p_sec_desc->iq_buffer_len = size; - p_sec_desc->iq_buffer_offset = RTE_PTR_DIFF(iq_data_start, mbuf); - } else { - print_err("p_sec_desc==NULL tti %u ant %d symb_id %d sec_desc_idx %d\n", tti, Ant_ID, symb_id, sec_desc_idx); - *mb_free = MBUF_FREE; - return size; - } - *mb_free = MBUF_KEEP; - } else { - /* packet can be fragmented copy RBs */ - memcpy(pos, iq_data_start, size); - *mb_free = MBUF_FREE; - } - } else { struct xran_section_desc *p_sec_desc = NULL; - prbMapElm = &pRbMap->prbMap[sect_id]; - sec_desc_idx = 0;//prbMapElm->nSecDesc[symb_id]; + prbMapElm = &pRbMap->prbMap[prb_elem_id]; + sec_desc_idx = prbMapElm->nSecDesc[symb_id]; if (sec_desc_idx < XRAN_MAX_FRAGMENT) { - p_sec_desc = prbMapElm->p_sec_desc[symb_id][sec_desc_idx]; + p_sec_desc = &prbMapElm->sec_desc[symb_id][sec_desc_idx]; } else { - print_err("sect_id %d: sec_desc_idx %d tti %u ant %d symb_id %d sec_desc_idx %d\n", sect_id, sec_desc_idx, tti, Ant_ID, symb_id, sec_desc_idx); + print_err("[p: %d] sect_id %d: sec_desc_idx %d tti %u ant %d symb_id %d sec_desc_idx %d\n",p_xran_dev_ctx->xran_port_id, + sect_id, sec_desc_idx, tti, Ant_ID, symb_id, sec_desc_idx); prbMapElm->nSecDesc[symb_id] = 0; *mb_free = MBUF_FREE; return size; @@ -434,14 +605,14 @@ int32_t xran_process_rx_sym(void *arg, p_sec_desc->num_prbu = num_prbu; p_sec_desc->iq_buffer_len = size; p_sec_desc->iq_buffer_offset = RTE_PTR_DIFF(iq_data_start, mbuf); - //prbMapElm->nSecDesc[symb_id] += 1; + prbMapElm->nSecDesc[symb_id] += 1; } else { print_err("p_sec_desc==NULL tti %u ant %d symb_id %d sec_desc_idx %d\n", tti, Ant_ID, symb_id, sec_desc_idx); *mb_free = MBUF_FREE; return size; } *mb_free = MBUF_KEEP; - } + } } else { print_err("pos %p iq_data_start %p size %d\n",pos, iq_data_start, size); @@ -449,6 +620,5 @@ int32_t xran_process_rx_sym(void *arg, } else { print_err("o-xu%d: TTI %d(f_%d sf_%d slot_%d) CC %d Ant_ID %d symb_id %d\n",p_xran_dev_ctx->xran_port_id, tti, frame_id, subframe_id, slot_id, CC_ID, Ant_ID, symb_id); } - return size; } diff --git a/fhi_lib/lib/src/xran_sync_api.c b/fhi_lib/lib/src/xran_sync_api.c index 71c2b16..a8e18f9 100644 --- a/fhi_lib/lib/src/xran_sync_api.c +++ b/fhi_lib/lib/src/xran_sync_api.c @@ -67,7 +67,7 @@ static int is_process_running(char *pname) } struct dirent *entry = NULL; - while (entry = readdir(dir)) { + while ((entry = readdir(dir))) { long pid = atol(entry->d_name); if (0 == pid) continue; diff --git a/fhi_lib/lib/src/xran_timer.c b/fhi_lib/lib/src/xran_timer.c index b13101a..14a6a41 100644 --- a/fhi_lib/lib/src/xran_timer.c +++ b/fhi_lib/lib/src/xran_timer.c @@ -165,7 +165,7 @@ long poll_next_tick(long interval_ns, unsigned long *used_tick) struct xran_common_counters* pCnt = &p_xran_dev_ctx->fh_counters; long target_time; - long delta; + long delta, tm_threshold_high, tm_threshold_low;//Update tm threhsolds static int counter = 0; static long sym_acc = 0; static long sym_cnt = 0; @@ -188,7 +188,19 @@ long poll_next_tick(long interval_ns, unsigned long *used_tick) if(unlikely(p_xran_dev_ctx->offset_sec || p_xran_dev_ctx->offset_nsec)) timing_adjust_gps_second(p_cur_time); delta = (p_cur_time->tv_sec * NSEC_PER_SEC + p_cur_time->tv_nsec) - target_time; - if(delta > 0 || (delta < 0 && abs(delta) < THRESHOLD)) { + tm_threshold_high = interval_ns * N_SYM_PER_SLOT * 2;//2 slots + tm_threshold_low = interval_ns * 2; //2 symbols + //add tm exception handling + if (unlikely(labs(delta) > tm_threshold_low)) { + print_dbg("poll_next_tick exceed 2 symbols threshold with delta:%ld(ns), used_tick:%ld(tick) \n", delta, used_tick); + pCnt->timer_missed_sym++; + if(unlikely(labs(delta) > tm_threshold_high)) { + print_dbg("poll_next_tick exceed 2 slots threshold, stop xran! delta:%ld(ns), used_tick:%ld(tick) \n", delta, used_tick); + //xran_if_current_state = XRAN_STOPPED; + pCnt->timer_missed_slot++; + } + } + if(delta > 0 || (delta < 0 && labs(delta) < THRESHOLD)) { if (debugStop &&(debugStopCount > 0) && (pCnt->tx_counter >= debugStopCount)){ uint64_t t1; printf("STOP:[%ld.%09ld], debugStopCount %d, tx_counter %ld\n", p_cur_time->tv_sec, p_cur_time->tv_nsec, debugStopCount, pCnt->tx_counter); @@ -229,6 +241,7 @@ long poll_next_tick(long interval_ns, unsigned long *used_tick) for (i=1; i < p_xran_dev_ctx->fh_init.xran_ports; i++) { struct xran_device_ctx * p_other_ctx = xran_dev_get_ctx_by_id(i); + if(p_other_ctx) xran_lib_ota_sym_idx[i] = xran_lib_ota_sym_idx[0] >> (numerlogy - xran_get_conf_numerology(p_other_ctx)); } /* adjust to sym boundary */ @@ -248,7 +261,7 @@ long poll_next_tick(long interval_ns, unsigned long *used_tick) if(debugStop && delta < interval_ns*10) MLogTask(PID_TIME_SYSTIME_POLL, (p_last_time->tv_sec * NSEC_PER_SEC + p_last_time->tv_nsec), (p_cur_time->tv_sec * NSEC_PER_SEC + p_cur_time->tv_nsec)); #else - MLogTask(PID_TIME_SYSTIME_POLL, last_tick, curr_tick); + MLogXRANTask(PID_TIME_SYSTIME_POLL, last_tick, curr_tick); last_tick = curr_tick; #endif diff --git a/fhi_lib/lib/src/xran_transport.c b/fhi_lib/lib/src/xran_transport.c index 881f6f6..72249bc 100644 --- a/fhi_lib/lib/src/xran_transport.c +++ b/fhi_lib/lib/src/xran_transport.c @@ -154,7 +154,6 @@ int xran_build_ecpri_hdr(struct rte_mbuf *mbuf, uint32_t payloadlen; struct xran_ecpri_hdr *tmp; - tmp = (struct xran_ecpri_hdr *)rte_pktmbuf_append(mbuf, sizeof(struct xran_ecpri_hdr)); if(unlikely(tmp == NULL)) { print_err("Fail to allocate the space for eCPRI hedaer!"); diff --git a/fhi_lib/lib/src/xran_tx_proc.c b/fhi_lib/lib/src/xran_tx_proc.c index 3cfb2be..45a17a8 100644 --- a/fhi_lib/lib/src/xran_tx_proc.c +++ b/fhi_lib/lib/src/xran_tx_proc.c @@ -46,6 +46,7 @@ #include #include #include +#include #include "xran_fh_o_du.h" @@ -61,7 +62,6 @@ #include "xran_dev.h" #include "xran_frame_struct.h" #include "xran_printf.h" -#include "xran_app_frag.h" #include "xran_tx_proc.h" #include "xran_cp_proc.h" @@ -74,6 +74,7 @@ enum xran_in_period XRAN_IN_NEXT_PERIOD }; +extern int32_t first_call; struct rte_mbuf * xran_attach_up_ext_buf(uint16_t vf_id, int8_t* p_ext_buff_start, int8_t* p_ext_buff, uint16_t ext_buff_len, @@ -177,8 +178,6 @@ static inline int32_t prepare_symbol_opt(enum xran_pkt_dir direction, int32_t n_bytes; int32_t prep_bytes; int16_t nPktSize; - uint32_t off; - iqWidth = (iqWidth==0) ? 16 : iqWidth; switch(compMeth) { @@ -242,7 +241,10 @@ static inline int32_t prepare_symbol_opt(enum xran_pkt_dir direction, RU_Port_ID, seq_id, staticEn, - do_copy); + do_copy, + 1, + section_id, + 0); if (prep_bytes <= 0) errx(1, "failed preparing symbol"); @@ -264,21 +266,20 @@ int32_t xran_process_tx_sym_cp_off(void *pHandle, uint8_t ctx_id, uint32_t tti, char *p_sec_iq = NULL; void *mb = NULL; void *send_mb = NULL; - int prb_num = 0; - uint16_t iq_sample_size_bits = 16; - uint16_t vf_id = 0; + // int prb_num = 0; + uint16_t vf_id = 0 , num_sections = 0, curr_sect_id = 0 ; struct xran_prb_map *prb_map = NULL; - uint8_t num_ant_elm = 0; + //uint8_t num_ant_elm = 0; struct xran_device_ctx * p_xran_dev_ctx = (struct xran_device_ctx *)pHandle; if (p_xran_dev_ctx == NULL) return retval; struct xran_common_counters * pCnt = &p_xran_dev_ctx->fh_counters; - struct xran_prach_cp_config *pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfig); - struct xran_srs_config *p_srs_cfg = &(p_xran_dev_ctx->srs_cfg); + //struct xran_prach_cp_config *pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfig); + //struct xran_srs_config *p_srs_cfg = &(p_xran_dev_ctx->srs_cfg); - num_ant_elm = xran_get_num_ant_elm(pHandle); + //num_ant_elm = xran_get_num_ant_elm(pHandle); enum xran_pkt_dir direction; enum xran_comp_hdr_type staticEn = XRAN_COMP_HDR_TYPE_DYNAMIC; @@ -298,10 +299,10 @@ int32_t xran_process_tx_sym_cp_off(void *pHandle, uint8_t ctx_id, uint32_t tti, struct rte_mbuf_ext_shared_info * p_share_data = NULL; if(p_xran_dev_ctx->fh_init.io_cfg.id == O_DU) { direction = XRAN_DIR_DL; /* O-DU */ - prb_num = p_xran_dev_ctx->fh_cfg.nDLRBs; + //prb_num = p_xran_dev_ctx->fh_cfg.nDLRBs; } else { direction = XRAN_DIR_UL; /* RU */ - prb_num = p_xran_dev_ctx->fh_cfg.nULRBs; + //prb_num = p_xran_dev_ctx->fh_cfg.nULRBs; } if(xran_fs_get_slot_type(PortId, cc_id, tti, ((p_xran_dev_ctx->fh_init.io_cfg.id == O_DU)? XRAN_SLOT_TYPE_DL : XRAN_SLOT_TYPE_UL)) == 1 @@ -321,16 +322,19 @@ int32_t xran_process_tx_sym_cp_off(void *pHandle, uint8_t ctx_id, uint32_t tti, int32_t elmIdx = 0; for (elmIdx = 0; elmIdx < prb_map->nPrbElm && elmIdx < XRAN_MAX_SECTIONS_PER_SLOT; elmIdx++){ //print_err("tti is %d, cc_id is %d, ant_id is %d, prb_map->nPrbElm id - %d", tti % XRAN_N_FE_BUF_LEN, cc_id, ant_id, prb_map->nPrbElm); - uint16_t sec_id = elmIdx; struct xran_prb_elm * prb_map_elm = &prb_map->prbMap[elmIdx]; struct xran_section_desc * p_sec_desc = NULL; + uint16_t sec_id = prb_map_elm->nSectId; p_share_data = &p_xran_dev_ctx->share_data.sh_data[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id][sec_id]; + if(unlikely(sym_id < prb_map_elm->nStartSymb || sym_id >= (prb_map_elm->nStartSymb + prb_map_elm->numSymb))) + continue; + if(prb_map_elm == NULL){ rte_panic("p_sec_desc == NULL\n"); } - p_sec_desc = prb_map_elm->p_sec_desc[sym_id][0]; + p_sec_desc = &prb_map_elm->sec_desc[sym_id][0]; p_sec_iq = ((char*)pos + p_sec_desc->iq_buffer_offset); @@ -389,240 +393,307 @@ int32_t xran_process_tx_sym_cp_off(void *pHandle, uint8_t ctx_id, uint32_t tti, xran_get_upul_seqid(pHandle, cc_id, ant_id); + if(p_xran_dev_ctx->fh_init.io_cfg.id == O_RU + && xran_get_ru_category(pHandle) == XRAN_CATEGORY_B) + { + num_sections = (prb_map_elm->bf_weight.extType == 1) ? prb_map_elm->bf_weight.numSetBFWs : 1 ; + if (prb_map_elm->bf_weight.extType != 1) + curr_sect_id = sec_id; + } + else + num_sections = 1; /* first all PRBs */ - int32_t num_bytes = prepare_symbol_ex(direction, sec_id, + prepare_symbol_ex(direction, curr_sect_id, send_mb, (uint8_t *)p_sec_iq, prb_map_elm->compMethod, prb_map_elm->iqWidth, p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder, frame_id, subframe_id, slot_id, sym_id, - prb_map_elm->nRBStart, prb_map_elm->nRBSize, + prb_map_elm->UP_nRBStart, prb_map_elm->UP_nRBSize, cc_id, ant_id, seq_id, - 0, - staticEn); + 0, + staticEn, + num_sections, + p_sec_desc->iq_buffer_offset); + + curr_sect_id += num_sections; rte_mbuf_sanity_check((struct rte_mbuf *)send_mb, 0); pCnt->tx_counter++; pCnt->tx_bytes_counter += rte_pktmbuf_pkt_len((struct rte_mbuf *)send_mb); p_xran_dev_ctx->send_upmbuf2ring((struct rte_mbuf *)send_mb, ETHER_TYPE_ECPRI, vf_id); - } + } /* for (elmIdx = 0; elmIdx < prb_map->nPrbElm && elmIdx < XRAN_MAX_SECTIONS_PER_SLOT; elmIdx++) */ } else { printf("(%d %d %d %d) prb_map == NULL\n", tti % XRAN_N_FE_BUF_LEN, cc_id, ant_id, sym_id); } - if(p_xran_dev_ctx->enablePrach - && (p_xran_dev_ctx->fh_init.io_cfg.id == O_RU)) { /* Only RU needs to send PRACH I/Q */ - uint32_t is_prach_slot = xran_is_prach_slot(PortId, subframe_id, slot_id); - - if(((frame_id % pPrachCPConfig->x) == pPrachCPConfig->y[0]) - && (is_prach_slot == 1) - && (sym_id >= p_xran_dev_ctx->prach_start_symbol[cc_id]) - && (sym_id <= p_xran_dev_ctx->prach_last_symbol[cc_id])) { - int prach_port_id = ant_id + pPrachCPConfig->eAxC_offset; - int compMethod, parm_size; - uint8_t symb_id_offset = sym_id - p_xran_dev_ctx->prach_start_symbol[cc_id]; - - compMethod = p_xran_dev_ctx->fh_cfg.ru_conf.compMeth_PRACH; - switch(compMethod) { - case XRAN_COMPMETHOD_BLKFLOAT: parm_size = 1; break; - case XRAN_COMPMETHOD_MODULATION: parm_size = 0; break; - default: - parm_size = 0; - } - pos = (char*) p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[symb_id_offset].pData; - //pos += (sym_id - p_xran_dev_ctx->prach_start_symbol[cc_id]) * pPrachCPConfig->numPrbc * N_SC_PER_PRB * 4; - /*pos += (sym_id - p_xran_dev_ctx->prach_start_symbol[cc_id]) - * (3*p_xran_dev_ctx->fh_cfg.ru_conf.iqWidth + parm_size) - * pPrachCPConfig->numPrbc;*/ - mb = NULL;//(void*) p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[0].pCtrl; - - send_symbol_ex(pHandle, - direction, - xran_alloc_sectionid(pHandle, direction, cc_id, prach_port_id, slot_id), - (struct rte_mbuf *)mb, - (uint8_t *)pos, - compMethod, - p_xran_dev_ctx->fh_cfg.ru_conf.iqWidth_PRACH, - p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder, - frame_id, subframe_id, slot_id, sym_id, - pPrachCPConfig->startPrbc, pPrachCPConfig->numPrbc, - cc_id, prach_port_id, - xran_get_upul_seqid(pHandle, cc_id, prach_port_id)); - retval = 1; - } - } /* if(p_xran_dev_ctx->enablePrach ..... */ } /* RU mode or C-Plane is not used */ } - return retval; } - -int32_t -xran_process_tx_srs_cp_off(void *pHandle, uint8_t ctx_id, uint32_t tti, int32_t cc_id, int32_t ant_id, uint32_t frame_id, uint32_t subframe_id, uint32_t slot_id, uint32_t sym_id) +int32_t xran_process_tx_prach_cp_off(void *pHandle, uint8_t ctx_id, uint32_t tti, int32_t cc_id, int32_t ant_id, uint32_t frame_id, uint32_t subframe_id, uint32_t slot_id, uint32_t sym_id) { int32_t retval = 0; char *pos = NULL; - char *p_sec_iq = NULL; void *mb = NULL; - void *send_mb = NULL; - int prb_num = 0; - uint16_t iq_sample_size_bits = 16; - - struct xran_prb_map *prb_map = NULL; - uint8_t num_ant_elm = 0; struct xran_device_ctx * p_xran_dev_ctx = (struct xran_device_ctx *)pHandle; - struct xran_common_counters * pCnt = &p_xran_dev_ctx->fh_counters; - struct xran_prach_cp_config *pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfig); - struct xran_srs_config *p_srs_cfg = &(p_xran_dev_ctx->srs_cfg); + if (p_xran_dev_ctx == NULL) + return retval; - num_ant_elm = xran_get_num_ant_elm(pHandle); - enum xran_pkt_dir direction; + struct xran_prach_cp_config *pPrachCPConfig; + if(p_xran_dev_ctx->dssEnable){ + int i = tti % p_xran_dev_ctx->dssPeriod; + if(p_xran_dev_ctx->technology[i]==1) { + pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfig); + } + else{ + pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfigLTE); + } + } + else{ + pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfig); + } - struct rte_mbuf *eth_oran_hdr = NULL; - char *ext_buff = NULL; - uint16_t ext_buff_len = 0; - struct rte_mbuf *tmp = NULL; - rte_iova_t ext_buff_iova = 0; - int32_t ant_elm_eAxC_id = ant_id + p_srs_cfg->eAxC_offset; - uint32_t vf_id = 0; - enum xran_comp_hdr_type staticEn = XRAN_COMP_HDR_TYPE_DYNAMIC; + enum xran_pkt_dir direction = XRAN_DIR_UL; + uint8_t PortId = p_xran_dev_ctx->xran_port_id; - if (p_xran_dev_ctx != NULL) - { - if(p_xran_dev_ctx->xran_port_id >= XRAN_PORTS_NUM) + if(PortId >= XRAN_PORTS_NUM) rte_panic("incorrect PORT ID\n"); - struct rte_mbuf_ext_shared_info * p_share_data = NULL; - if(p_xran_dev_ctx->fh_init.io_cfg.id == O_DU) { - direction = XRAN_DIR_DL; /* O-DU */ - prb_num = p_xran_dev_ctx->fh_cfg.nDLRBs; - rte_panic("incorrect O_DU\n"); - } else { - direction = XRAN_DIR_UL; /* RU */ - prb_num = p_xran_dev_ctx->fh_cfg.nULRBs; - } + if(p_xran_dev_ctx->enablePrach + && (p_xran_dev_ctx->fh_init.io_cfg.id == O_RU) && (ant_id < XRAN_MAX_PRACH_ANT_NUM)){ + if(xran_fs_get_symbol_type(PortId, cc_id, tti, sym_id) == XRAN_SYMBOL_TYPE_UL + || xran_fs_get_symbol_type(PortId, cc_id, tti, sym_id) == XRAN_SYMBOL_TYPE_FDD) { /* Only RU needs to send PRACH I/Q */ - staticEn = p_xran_dev_ctx->fh_cfg.ru_conf.xranCompHdrType; + uint32_t is_prach_slot = xran_is_prach_slot(PortId, subframe_id, slot_id); + if(((frame_id % pPrachCPConfig->x) == pPrachCPConfig->y[0]) + && (is_prach_slot == 1) + && (sym_id >= p_xran_dev_ctx->prach_start_symbol[cc_id]) + && (sym_id <= p_xran_dev_ctx->prach_last_symbol[cc_id])) { + int prach_port_id = ant_id + pPrachCPConfig->eAxC_offset; + int compMethod; + //int parm_size; + uint8_t symb_id_offset = sym_id - p_xran_dev_ctx->prach_start_symbol[cc_id]; -#if 1 - if (tti % 5 == 3) { - { -#else - if(xran_fs_get_slot_type(cc_id, tti, XRAN_SLOT_TYPE_UL) == 1 - || xran_fs_get_slot_type(cc_id, tti, XRAN_SLOT_TYPE_FDD) == 1) { - if(xran_fs_get_symbol_type(cc_id, tti, sym_id) == XRAN_SYMBOL_TYPE_UL - || xran_fs_get_symbol_type(cc_id, tti, sym_id) == XRAN_SYMBOL_TYPE_FDD) { + compMethod = p_xran_dev_ctx->fh_cfg.ru_conf.compMeth_PRACH; +#if 0 + switch(compMethod) { + case XRAN_COMPMETHOD_BLKFLOAT: parm_size = 1; break; + case XRAN_COMPMETHOD_MODULATION: parm_size = 0; break; + default: + parm_size = 0; + } #endif - pos = (char*) p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData; - mb = (void*) p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[sym_id].pCtrl; - prb_map = (struct xran_prb_map *) p_xran_dev_ctx->sFHSrsRxPrbMapBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers->pData; - vf_id = xran_map_ecpriPcid_to_vf(p_xran_dev_ctx, direction, cc_id, ant_elm_eAxC_id); - - if(prb_map) { - int32_t elmIdx = 0; - for (elmIdx = 0; elmIdx < prb_map->nPrbElm && elmIdx < XRAN_MAX_SECTIONS_PER_SLOT; elmIdx++) { - uint16_t sec_id = elmIdx; - struct xran_prb_elm * prb_map_elm = &prb_map->prbMap[elmIdx]; - struct xran_section_desc * p_sec_desc = NULL; - - if(prb_map_elm == NULL) { - rte_panic("p_sec_desc == NULL\n"); + pos = (char*) p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[symb_id_offset].pData; + //pos += (sym_id - p_xran_dev_ctx->prach_start_symbol[cc_id]) * pPrachCPConfig->numPrbc * N_SC_PER_PRB * 4; + /*pos += (sym_id - p_xran_dev_ctx->prach_start_symbol[cc_id]) + * (3*p_xran_dev_ctx->fh_cfg.ru_conf.iqWidth + parm_size) + * pPrachCPConfig->numPrbc;*/ + mb = NULL;//(void*) p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[0].pCtrl; + + struct xran_prach_cp_config *pPrachCPConfig; + if(p_xran_dev_ctx->dssEnable){ + int i = tti % p_xran_dev_ctx->dssPeriod; + if(p_xran_dev_ctx->technology[i]==1) { + pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfig); } + else{ + pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfigLTE); + } + } + else{ + pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfig); + } + + + if (1500 == p_xran_dev_ctx->fh_init.mtu && pPrachCPConfig->filterIdx == XRAN_FILTERINDEX_PRACH_012) + { + pos = (char*) p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[0].pData; + mb = (void*) p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[0].pCtrl; + /*one prach for more then one pkg*/ + send_symbol_mult_section_ex(pHandle, + direction, + xran_alloc_sectionid(pHandle, direction, cc_id, prach_port_id, subframe_id, slot_id), + (struct rte_mbuf *)mb, + (uint8_t *)pos, + compMethod, + p_xran_dev_ctx->fh_cfg.ru_conf.iqWidth, + p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder, + frame_id, subframe_id, slot_id, sym_id, + pPrachCPConfig->startPrbc, pPrachCPConfig->numPrbc, + cc_id, prach_port_id, + 0); + } + else{ + send_symbol_ex(pHandle, + direction, + xran_alloc_sectionid(pHandle, direction, cc_id, prach_port_id, subframe_id, slot_id), + (struct rte_mbuf *)mb, + (uint8_t *)pos, + compMethod, + p_xran_dev_ctx->fh_cfg.ru_conf.iqWidth_PRACH, + p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder, + frame_id, subframe_id, slot_id, sym_id, + pPrachCPConfig->startPrbc, pPrachCPConfig->numPrbc, + cc_id, prach_port_id, + xran_get_upul_seqid(pHandle, cc_id, prach_port_id)); + } + retval = 1; + } + } /* if(p_xran_dev_ctx->enablePrach ..... */ + } + return retval; +} +int32_t +xran_process_tx_srs_cp_off(void *pHandle, uint8_t ctx_id, uint32_t tti, int32_t cc_id, int32_t ant_id, + uint32_t frame_id, uint32_t subframe_id, uint32_t slot_id) +{ + int32_t retval = 0; + char *pos = NULL; + char *p_sec_iq = NULL; + void *mb = NULL; + char *ext_buff = NULL; + uint16_t ext_buff_len = 0 , num_sections=0 , section_id=0; + int32_t antElm_eAxC_id; + uint32_t vf_id = 0; + int32_t elmIdx; + uint32_t sym_id; + enum xran_pkt_dir direction; + enum xran_comp_hdr_type staticEn; - /* skip, if not scheduled */ - if(sym_id < prb_map_elm->nStartSymb || sym_id >= prb_map_elm->nStartSymb + prb_map_elm->numSymb) - return 0; + rte_iova_t ext_buff_iova = 0; + struct rte_mbuf *tmp = NULL; + struct xran_prb_map *prb_map = NULL; + struct xran_device_ctx * p_xran_dev_ctx; + struct xran_common_counters *pCnt; + //struct xran_prach_cp_config *pPrachCPConfig; + struct xran_srs_config *p_srs_cfg; + struct rte_mbuf *eth_oran_hdr = NULL; + struct rte_mbuf_ext_shared_info *p_share_data = NULL; - p_share_data = &p_xran_dev_ctx->srs_share_data.sh_data[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id]; - p_sec_desc = prb_map_elm->p_sec_desc[sym_id][0]; - p_sec_iq = ((char*)pos + p_sec_desc->iq_buffer_offset); - /* calculate offset for external buffer */ - ext_buff_len = p_sec_desc->iq_buffer_len; - ext_buff = p_sec_iq - (RTE_PKTMBUF_HEADROOM + - sizeof (struct xran_ecpri_hdr) + - sizeof (struct radio_app_common_hdr) + - sizeof(struct data_section_hdr)); + p_xran_dev_ctx = (struct xran_device_ctx *)pHandle; + if(p_xran_dev_ctx == NULL) + { + print_err("dev_ctx is NULL. ctx_id=%d, tti=%d, cc_id=%d, ant_id=%d, frame_id=%d, subframe_id=%d, slot_id=%d\n", + ctx_id, tti, cc_id, ant_id, frame_id, subframe_id, slot_id); + return 0; + } - ext_buff_len += RTE_PKTMBUF_HEADROOM + - sizeof (struct xran_ecpri_hdr) + - sizeof (struct radio_app_common_hdr) + - sizeof(struct data_section_hdr) + 18; + if(p_xran_dev_ctx->xran_port_id >= XRAN_PORTS_NUM) + rte_panic("incorrect PORT ID\n"); - if ((prb_map_elm->compMethod != XRAN_COMPMETHOD_NONE)&&(staticEn == XRAN_COMP_HDR_TYPE_DYNAMIC)){ - ext_buff -= sizeof (struct data_section_compression_hdr); - ext_buff_len += sizeof (struct data_section_compression_hdr); - } + pCnt = &p_xran_dev_ctx->fh_counters; + //pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfig); + p_srs_cfg = &(p_xran_dev_ctx->srs_cfg); -// eth_oran_hdr = rte_pktmbuf_alloc(_eth_mbuf_pool_small); - eth_oran_hdr = xran_ethdi_mbuf_indir_alloc(); + /* Only O-RU sends SRS U-Plane */ + direction = XRAN_DIR_UL; + staticEn = p_xran_dev_ctx->fh_cfg.ru_conf.xranCompHdrType; + antElm_eAxC_id = ant_id + p_srs_cfg->eAxC_offset; - if (unlikely (( eth_oran_hdr) == NULL)) { - rte_panic("Failed rte_pktmbuf_alloc\n"); - } + prb_map = (struct xran_prb_map *)p_xran_dev_ctx->sFHSrsRxPrbMapBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers->pData; + if(prb_map) + { + for(elmIdx = 0; elmIdx < prb_map->nPrbElm && elmIdx < XRAN_MAX_SECTIONS_PER_SLOT; elmIdx++) + { + struct xran_prb_elm *prb_map_elm = &prb_map->prbMap[elmIdx]; + struct xran_section_desc * p_sec_desc = NULL; - p_share_data->free_cb = extbuf_free_callback; - p_share_data->fcb_opaque = NULL; - rte_mbuf_ext_refcnt_set(p_share_data, 1); + if(prb_map_elm == NULL) + rte_panic("p_sec_desc == NULL\n"); - ext_buff_iova = rte_mempool_virt2iova(mb); - if (unlikely (( ext_buff_iova) == 0)) { - rte_panic("Failed rte_mem_virt2iova \n"); - } + sym_id = prb_map->prbMap[elmIdx].nStartSymb; + pos = (char*)p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData; + mb = (void*)p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[sym_id].pCtrl; - if (unlikely (( (rte_iova_t)ext_buff_iova) == RTE_BAD_IOVA)) { - rte_panic("Failed rte_mem_virt2iova RTE_BAD_IOVA \n"); - } - rte_pktmbuf_attach_extbuf(eth_oran_hdr, - ext_buff, - ext_buff_iova + RTE_PTR_DIFF(ext_buff , mb), - ext_buff_len, - p_share_data); + p_share_data = &p_xran_dev_ctx->srs_share_data.sh_data[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id]; + p_sec_desc = &prb_map_elm->sec_desc[sym_id][0]; + p_sec_iq = ((char*)pos + p_sec_desc->iq_buffer_offset); - rte_pktmbuf_reset_headroom(eth_oran_hdr); + /* calculate offset for external buffer */ + ext_buff_len = p_sec_desc->iq_buffer_len; - tmp = (struct rte_mbuf *)rte_pktmbuf_prepend(eth_oran_hdr, sizeof(struct rte_ether_hdr)); - if (unlikely (( tmp) == NULL)) { - rte_panic("Failed rte_pktmbuf_prepend \n"); - } - send_mb = eth_oran_hdr; + ext_buff = p_sec_iq - (RTE_PKTMBUF_HEADROOM + + sizeof (struct xran_ecpri_hdr) + + sizeof (struct radio_app_common_hdr) + + sizeof(struct data_section_hdr)); - uint8_t seq_id = (p_xran_dev_ctx->fh_init.io_cfg.id == O_DU) ? - xran_get_updl_seqid(pHandle, cc_id, ant_elm_eAxC_id) : - xran_get_upul_seqid(pHandle, cc_id, ant_elm_eAxC_id); - /* first all PRBs */ - int32_t num_bytes = prepare_symbol_ex(direction, sec_id, - send_mb, - (uint8_t *)p_sec_iq, - prb_map_elm->compMethod, - prb_map_elm->iqWidth, - p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder, - frame_id, subframe_id, slot_id, sym_id, - prb_map_elm->nRBStart, prb_map_elm->nRBSize, - cc_id, ant_elm_eAxC_id, - seq_id, - 0, - staticEn); + ext_buff_len += RTE_PKTMBUF_HEADROOM + + sizeof (struct xran_ecpri_hdr) + + sizeof (struct radio_app_common_hdr) + + sizeof(struct data_section_hdr) + 18; - rte_mbuf_sanity_check((struct rte_mbuf *)send_mb, 0); - pCnt->tx_counter++; - pCnt->tx_bytes_counter += rte_pktmbuf_pkt_len((struct rte_mbuf *)send_mb); - p_xran_dev_ctx->send_upmbuf2ring((struct rte_mbuf *)send_mb, ETHER_TYPE_ECPRI, vf_id); - } - } else { - printf("(%d %d %d %d) prb_map == NULL\n", tti % XRAN_N_FE_BUF_LEN, cc_id, ant_elm_eAxC_id, sym_id); + if((prb_map_elm->compMethod != XRAN_COMPMETHOD_NONE) + && (staticEn == XRAN_COMP_HDR_TYPE_DYNAMIC)) + { + ext_buff -= sizeof (struct data_section_compression_hdr); + ext_buff_len += sizeof (struct data_section_compression_hdr); } - } - } + + eth_oran_hdr = xran_ethdi_mbuf_indir_alloc(); + if(unlikely(eth_oran_hdr == NULL)) + rte_panic("Failed rte_pktmbuf_alloc\n"); + + p_share_data->free_cb = extbuf_free_callback; + p_share_data->fcb_opaque = NULL; + rte_mbuf_ext_refcnt_set(p_share_data, 1); + + ext_buff_iova = rte_mempool_virt2iova(mb); + if(unlikely(ext_buff_iova == 0 || ext_buff_iova == RTE_BAD_IOVA)) + rte_panic("Failed rte_mem_virt2iova : %lu\n", ext_buff_iova); + + rte_pktmbuf_attach_extbuf(eth_oran_hdr, + ext_buff, + ext_buff_iova + RTE_PTR_DIFF(ext_buff , mb), + ext_buff_len, + p_share_data); + + rte_pktmbuf_reset_headroom(eth_oran_hdr); + + tmp = (struct rte_mbuf *)rte_pktmbuf_prepend(eth_oran_hdr, sizeof(struct rte_ether_hdr)); + if(unlikely(tmp == NULL)) + rte_panic("Failed rte_pktmbuf_prepend \n"); + + uint8_t seq_id = xran_get_upul_seqid(pHandle, cc_id, antElm_eAxC_id); + + num_sections = (prb_map_elm->bf_weight.extType == 1) ? prb_map_elm->bf_weight.numSetBFWs : 1 ; + + prepare_symbol_ex(direction, prb_map_elm->nSectId, + (void *)eth_oran_hdr, (uint8_t *)p_sec_iq, + prb_map_elm->compMethod, prb_map_elm->iqWidth, + p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder, + frame_id, subframe_id, slot_id, sym_id, + prb_map_elm->UP_nRBStart, prb_map_elm->UP_nRBSize, + cc_id, antElm_eAxC_id, + seq_id, + 0, + staticEn, + num_sections, + 0); + + section_id += num_sections; + + rte_mbuf_sanity_check(eth_oran_hdr, 0); + + vf_id = xran_map_ecpriPcid_to_vf(p_xran_dev_ctx, direction, cc_id, antElm_eAxC_id); + pCnt->tx_counter++; + pCnt->tx_bytes_counter += rte_pktmbuf_pkt_len(eth_oran_hdr); + p_xran_dev_ctx->send_upmbuf2ring(eth_oran_hdr, ETHER_TYPE_ECPRI, vf_id); + } /* for(elmIdx = 0; elmIdx < prb_map->nPrbElm && elmIdx < XRAN_MAX_SECTIONS_PER_SLOT; elmIdx++) */ + } /* if(prb_map) */ + else + { + printf("(%d %d %d) prb_map == NULL\n", tti % XRAN_N_FE_BUF_LEN, cc_id, antElm_eAxC_id); } return retval; @@ -685,7 +756,7 @@ xran_attach_up_ext_buf(uint16_t vf_id, int8_t* p_ext_buff_start, int8_t* p_ext_b return mb_oran_hdr_ext; } -int32_t xran_process_tx_sym_cp_on_dispatch_opt(void* pHandle, uint8_t ctx_id, uint32_t tti, int32_t num_cc, int32_t num_ant, uint32_t frame_id, +int32_t xran_process_tx_sym_cp_on_dispatch_opt(void* pHandle, uint8_t ctx_id, uint32_t tti, int32_t start_cc, int32_t num_cc, int32_t start_ant, int32_t num_ant, uint32_t frame_id, uint32_t subframe_id, uint32_t slot_id, uint32_t sym_id, enum xran_comp_hdr_type compType, enum xran_pkt_dir direction, uint16_t xran_port_id, PSECTION_DB_TYPE p_sec_db) { @@ -699,14 +770,16 @@ int32_t xran_process_tx_sym_cp_on_dispatch_opt(void* pHandle, uint8_t ctx_id, ui p_desc->pHandle = pHandle; p_desc->ctx_id = ctx_id; p_desc->tti = tti; - p_desc->cc_id = num_cc; - p_desc->ant_id = num_ant; + p_desc->start_cc = start_cc; + p_desc->cc_num = num_cc; + p_desc->start_ant = start_ant; + p_desc->ant_num = num_ant; p_desc->frame_id = frame_id; p_desc->subframe_id = subframe_id; p_desc->slot_id = slot_id; p_desc->sym_id = sym_id; p_desc->compType = (uint32_t)compType; - p_desc->direction = (uint32_t)direction; + p_desc->direction = (uint32_t)direction; p_desc->xran_port_id = xran_port_id; p_desc->p_sec_db = (void*)p_sec_db; @@ -726,7 +799,7 @@ int32_t xran_process_tx_sym_cp_on_dispatch_opt(void* pHandle, uint8_t ctx_id, ui } int32_t -xran_process_tx_sym_cp_on_dispatch(void *pHandle, uint8_t ctx_id, uint32_t tti, int32_t cc_id, int32_t ant_id, uint32_t frame_id, uint32_t subframe_id, +xran_process_tx_sym_cp_on_dispatch(void *pHandle, uint8_t ctx_id, uint32_t tti, int32_t start_cc, int32_t num_cc, int32_t start_ant, int32_t num_ant, uint32_t frame_id, uint32_t subframe_id, uint32_t slot_id, uint32_t sym_id) { int32_t retval = 0; @@ -739,8 +812,10 @@ xran_process_tx_sym_cp_on_dispatch(void *pHandle, uint8_t ctx_id, uint32_t tti, p_desc->pHandle = pHandle; p_desc->ctx_id = ctx_id; p_desc->tti = tti; - p_desc->cc_id = cc_id; - p_desc->ant_id = ant_id; + p_desc->start_cc = start_cc; + p_desc->cc_num = num_cc; + p_desc->start_ant = start_ant; + p_desc->ant_num = num_ant; p_desc->frame_id = frame_id; p_desc->subframe_id = subframe_id; p_desc->slot_id = slot_id; @@ -762,29 +837,22 @@ xran_process_tx_sym_cp_on_dispatch(void *pHandle, uint8_t ctx_id, uint32_t tti, } int32_t -xran_process_tx_sym_cp_on(void *pHandle, uint8_t ctx_id, uint32_t tti, int32_t cc_id, int32_t ant_id, uint32_t frame_id, uint32_t subframe_id, +xran_process_tx_sym_cp_on(void *pHandle, uint8_t ctx_id, uint32_t tti, int32_t start_cc, int32_t cc_id, int32_t start_ant, int32_t ant_id, uint32_t frame_id, uint32_t subframe_id, uint32_t slot_id, uint32_t sym_id) { int32_t retval = 0; - - struct rte_mbuf *eth_oran_hdr = NULL; - char *ext_buff = NULL; uint16_t ext_buff_len = 0; - struct rte_mbuf *tmp = NULL; - rte_iova_t ext_buff_iova = 0; char *pos = NULL; char *p_sec_iq = NULL; void *mb = NULL; struct rte_mbuf *to_free_mbuf = NULL; - int prb_num = 0; + //int prb_num = 0; uint16_t iq_sample_size_bits = 16; uint32_t next = 0; int32_t num_sections = 0; uint16_t len = 0; int16_t len2 = 0; uint16_t i = 0; - - uint64_t t1; struct mbuf_table loc_tx_mbufs; struct xran_up_pkt_gen_params loc_xp; @@ -800,513 +868,818 @@ xran_process_tx_sym_cp_on(void *pHandle, uint8_t ctx_id, uint32_t tti, int32_t c { compType = p_xran_dev_ctx->fh_cfg.ru_conf.xranCompHdrType; + if(p_xran_dev_ctx->fh_init.io_cfg.id == O_DU) { + direction = XRAN_DIR_DL; /* O-DU */ + //prb_num = p_xran_dev_ctx->fh_cfg.nDLRBs; + } else { + direction = XRAN_DIR_UL; /* RU */ + //prb_num = p_xran_dev_ctx->fh_cfg.nULRBs; + } - if(p_xran_dev_ctx->fh_init.io_cfg.id == O_DU) { - direction = XRAN_DIR_DL; /* O-DU */ - prb_num = p_xran_dev_ctx->fh_cfg.nDLRBs; - } else { - direction = XRAN_DIR_UL; /* RU */ - prb_num = p_xran_dev_ctx->fh_cfg.nULRBs; - } - - vf_id = xran_map_ecpriPcid_to_vf(p_xran_dev_ctx, direction, cc_id, ant_id); - next = 0; - num_sections = xran_cp_getsize_section_info(pHandle, direction, cc_id, ant_id, ctx_id); - /* iterate C-Plane configuration to generate corresponding U-Plane */ - if(num_sections) - prepare_sf_slot_sym(direction, frame_id, subframe_id, slot_id, sym_id, &loc_xp); + vf_id = xran_map_ecpriPcid_to_vf(p_xran_dev_ctx, direction, cc_id, ant_id); + next = 0; + num_sections = xran_cp_getsize_section_info(pHandle, direction, cc_id, ant_id, ctx_id); + /* iterate C-Plane configuration to generate corresponding U-Plane */ + if(num_sections) + prepare_sf_slot_sym(direction, frame_id, subframe_id, slot_id, sym_id, &loc_xp); - loc_tx_mbufs.len = 0; - while(next < num_sections) { - sectinfo = xran_cp_iterate_section_info(pHandle, direction, cc_id, ant_id, ctx_id, &next); + loc_tx_mbufs.len = 0; + while(next < num_sections) { + sectinfo = xran_cp_iterate_section_info(pHandle, direction, cc_id, ant_id, ctx_id, &next); - if(sectinfo == NULL) - break; + if(sectinfo == NULL) + break; - if(sectinfo->type != XRAN_CP_SECTIONTYPE_1) { /* only supports type 1 */ - print_err("Invalid section type in section DB - %d", sectinfo->type); - continue; - } + if(sectinfo->type != XRAN_CP_SECTIONTYPE_1) { /* only supports type 1 */ + print_err("Invalid section type in section DB - %d", sectinfo->type); + continue; + } - /* skip, if not scheduled */ - if(sym_id < sectinfo->startSymId || sym_id >= sectinfo->startSymId + sectinfo->numSymbol) - continue; + /* skip, if not scheduled */ + if(sym_id < sectinfo->startSymId || sym_id >= sectinfo->startSymId + sectinfo->numSymbol) + continue; - if(sectinfo->compMeth) - iq_sample_size_bits = sectinfo->iqWidth; + if(sectinfo->compMeth) + iq_sample_size_bits = sectinfo->iqWidth; - print_dbg(">>> sym %2d [%d] type%d id %d startPrbc=%d numPrbc=%d startSymId=%d numSymbol=%d\n", sym_id, next, - sectinfo->type, sectinfo->id, sectinfo->startPrbc, - sectinfo->numPrbc,sectinfo->startSymId, sectinfo->numSymbol); + print_dbg(">>> sym %2d [%d] type%d id %d startPrbc=%d numPrbc=%d startSymId=%d numSymbol=%d\n", sym_id, next, + sectinfo->type, sectinfo->id, sectinfo->startPrbc, + sectinfo->numPrbc,sectinfo->startSymId, sectinfo->numSymbol); - p_share_data = &p_xran_dev_ctx->share_data.sh_data[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id][sectinfo->id]; + p_share_data = &p_xran_dev_ctx->share_data.sh_data[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id][sectinfo->id]; - len = loc_tx_mbufs.len; - len2 = 0; - i = 0; + len = loc_tx_mbufs.len; + len2 = 0; + i = 0; - //Added for Klocworks - if (len >= MBUF_TABLE_SIZE) { - len = MBUF_TABLE_SIZE - 1; - rte_panic("len >= MBUF_TABLE_SIZE\n"); - } + //Added for Klocworks + if (len >= MBUF_TABLE_SIZE) { + len = MBUF_TABLE_SIZE - 1; + rte_panic("len >= MBUF_TABLE_SIZE\n"); + } - to_free_mbuf = p_xran_dev_ctx->to_free_mbuf[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id][sym_id][sectinfo->id]; - pos = (char*) p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData; - mb = p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[sym_id].pCtrl; + to_free_mbuf = p_xran_dev_ctx->to_free_mbuf[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id][sym_id][sectinfo->id]; + pos = (char*) p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData; + mb = p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[sym_id].pCtrl; - if(mb == NULL) { - rte_panic("mb == NULL\n"); - } + if(mb == NULL) { + rte_panic("mb == NULL\n"); + } - p_sec_iq = ((char*)pos + sectinfo->sec_desc[sym_id].iq_buffer_offset); - ext_buff_len = sectinfo->sec_desc[sym_id].iq_buffer_len; + p_sec_iq = ((char*)pos + sectinfo->sec_desc[sym_id].iq_buffer_offset); + ext_buff_len = sectinfo->sec_desc[sym_id].iq_buffer_len; - mb = xran_attach_up_ext_buf(vf_id, (int8_t *)mb, (int8_t *) p_sec_iq, - (uint16_t) ext_buff_len, - p_share_data, (enum xran_compression_method) sectinfo->compMeth, compType); - p_xran_dev_ctx->to_free_mbuf[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id][sym_id][sectinfo->id] = mb; - rte_pktmbuf_refcnt_update(mb, 1); /* make sure eth won't free our mbuf */ + mb = xran_attach_up_ext_buf(vf_id, (int8_t *)mb, (int8_t *) p_sec_iq, + (uint16_t) ext_buff_len, + p_share_data, (enum xran_compression_method) sectinfo->compMeth, compType); + p_xran_dev_ctx->to_free_mbuf[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id][sym_id][sectinfo->id] = mb; + rte_pktmbuf_refcnt_update(mb, 1); /* make sure eth won't free our mbuf */ - if(to_free_mbuf) { - rte_pktmbuf_free(to_free_mbuf); - } + if(to_free_mbuf) { + rte_pktmbuf_free(to_free_mbuf); + } - /* first all PRBs */ - prepare_symbol_opt(direction, sectinfo->id, - mb, - (struct rb_map *)p_sec_iq, - sectinfo->compMeth, - sectinfo->iqWidth, - p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder, - sectinfo->startPrbc, - sectinfo->numPrbc, - cc_id, - ant_id, - xran_get_updl_seqid(pHandle, cc_id, ant_id), - 0, - &loc_xp, - compType); - - /* if we don't need to do any fragmentation */ - if (likely (p_xran_dev_ctx->fh_init.mtu >= - sectinfo->numPrbc * (3*iq_sample_size_bits + 1))) { - /* no fragmentation */ - loc_tx_mbufs.m_table[len] = mb; - len2 = 1; - } else { - /* fragmentation */ - uint8_t * seq_num = xran_get_updl_seqid_addr(pHandle, cc_id, ant_id); - if(seq_num) - (*seq_num)--; - else - rte_panic("pointer to seq number is NULL [CC %d Ant %d]\n", cc_id, ant_id); - - len2 = xran_app_fragment_packet(mb, - &loc_tx_mbufs.m_table[len], - (uint16_t)(MBUF_TABLE_SIZE - len), - p_xran_dev_ctx->fh_init.mtu, - p_xran_dev_ctx->direct_pool, - p_xran_dev_ctx->indirect_pool, - sectinfo->startPrbc, - sectinfo->numPrbc, - seq_num, + /* first all PRBs */ + prepare_symbol_opt(direction, sectinfo->id, + mb, + (struct rb_map *)p_sec_iq, + sectinfo->compMeth, sectinfo->iqWidth, - ((sectinfo->iqWidth == 16)||(compType==XRAN_COMP_HDR_TYPE_STATIC)) ? 0 : 1); - - /* Free input packet */ - rte_pktmbuf_free(mb); - - /* If we fail to fragment the packet */ - if (unlikely (len2 < 0)){ - print_err("len2= %d\n", len2); + p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder, + sectinfo->startPrbc, + sectinfo->numPrbc, + cc_id, + ant_id, + xran_get_updl_seqid(pHandle, cc_id, ant_id), + 0, + &loc_xp, + compType); + + /* if we don't need to do any fragmentation */ + if (likely (p_xran_dev_ctx->fh_init.mtu >= + sectinfo->numPrbc * (3*iq_sample_size_bits + 1))) { + /* no fragmentation */ + loc_tx_mbufs.m_table[len] = mb; + len2 = 1; + } else { + /* current code should not go to fragmentation as it should be taken care of by section allocation already */ + print_err("should not go to fragmentation mtu %d packet size %d\n", p_xran_dev_ctx->fh_init.mtu, sectinfo->numPrbc * (3*iq_sample_size_bits + 1)); return 0; } - } - if(len2 > 1){ - for (i = len; i < len + len2; i ++) { - struct rte_mbuf *m; - m = loc_tx_mbufs.m_table[i]; - struct rte_ether_hdr *eth_hdr = (struct rte_ether_hdr *) - rte_pktmbuf_prepend(m, (uint16_t)sizeof(struct rte_ether_hdr)); - if (eth_hdr == NULL) { - rte_panic("No headroom in mbuf.\n"); + if(len2 > 1){ + for (i = len; i < len + len2; i ++) { + struct rte_mbuf *m; + m = loc_tx_mbufs.m_table[i]; + struct rte_ether_hdr *eth_hdr = (struct rte_ether_hdr *) + rte_pktmbuf_prepend(m, (uint16_t)sizeof(struct rte_ether_hdr)); + if (eth_hdr == NULL) { + rte_panic("No headroom in mbuf.\n"); + } } } - } - len += len2; - if (unlikely(len > XRAN_MAX_PKT_BURST_PER_SYM)) { - rte_panic("XRAN_MAX_PKT_BURST_PER_SYM\n"); - } - loc_tx_mbufs.len = len; - } /* while(section) */ + len += len2; + if (unlikely(len > XRAN_MAX_PKT_BURST_PER_SYM)) { + rte_panic("XRAN_MAX_PKT_BURST_PER_SYM\n"); + } + loc_tx_mbufs.len = len; + } /* while(section) */ - /* Transmit packets */ - xran_send_burst(p_xran_dev_ctx, &loc_tx_mbufs, vf_id); - loc_tx_mbufs.len = 0; - retval = 1; + /* Transmit packets */ + xran_send_burst(p_xran_dev_ctx, &loc_tx_mbufs, vf_id); + loc_tx_mbufs.len = 0; + retval = 1; } return retval; } -//#define TRANSMIT_BURST -//#define ENABLE_DEBUG_COREDUMP - -#define ETHER_TYPE_ECPRI_BE (0xFEAE) - -int32_t xran_process_tx_sym_cp_on_opt(void* pHandle, uint8_t ctx_id, uint32_t tti, int32_t num_cc, int32_t num_ant, uint32_t frame_id, - uint32_t subframe_id, uint32_t slot_id, uint32_t sym_id, enum xran_comp_hdr_type compType, enum xran_pkt_dir direction, - uint16_t xran_port_id, PSECTION_DB_TYPE p_sec_db) +int32_t +xran_prepare_up_dl_sym(uint16_t xran_port_id, uint32_t nSlotIdx, uint32_t nCcStart, uint32_t nCcNum, uint32_t nSymMask, uint32_t nAntStart, + uint32_t nAntNum, uint32_t nSymStart, uint32_t nSymNum) { - uint8_t seq_id = 0; - int32_t cc_id = 0, ant_id = 0; - char* ext_buff = NULL; - uint16_t ext_buff_len = 0; - rte_iova_t ext_buff_iova = 0; - char* pos = NULL; - char* p_sec_iq = NULL; - void* mb = NULL, *mb_base = NULL; - struct rte_mbuf* to_free_mbuf = NULL; - uint16_t iq_sample_size_bits = 16; - uint32_t next = 0; - int32_t num_sections = 0, total_sections = 0; - uint16_t len = 0, len2 = 0, len_frag = 0; - char* pStart = 0; - uint16_t cid = 0; - uint8_t compMeth = 0; - uint8_t iqWidth = 0; - int parm_size = 0; - int32_t n_bytes = 0, elm_bytes = 0; - uint16_t section_id; - uint16_t prb_num = 0; - uint16_t prb_start = 0; - int16_t nPktSize = 0; - uint16_t ecpri_payl_size = 0; -#ifdef TRANSMIT_BURST - struct mbuf_table loc_tx_mbufs; + int32_t retval = 0; + uint32_t tti=0; + uint32_t numSlotMu1 = 5; +#if XRAN_MLOG_VAR + uint32_t mlogVar[15]; + uint32_t mlogVarCnt = 0; #endif - struct mbuf_table loc_tx_mbufs_fragmented; - struct xran_up_pkt_gen_params xp; - struct xran_ethdi_ctx* eth_ctx = xran_ethdi_get_ctx(); - struct xran_section_info* sectinfo = NULL; - struct xran_device_ctx* p_xran_dev_ctx = (struct xran_device_ctx*)pHandle; - uint16_t vf_id = 0; - struct rte_mbuf_ext_shared_info* p_share_data = NULL; - struct xran_sectioninfo_db* ptr_sect_elm = NULL; - struct rte_mbuf* mb_oran_hdr_ext = NULL; - struct rte_mempool_objhdr* iova_hdr = NULL; - struct xran_eaxcid_config* conf = &(p_xran_dev_ctx->eAxc_id_cfg); - struct rte_ether_hdr* ether_hdr = NULL; - struct xran_ecpri_hdr* ecpri_hdr = NULL; - struct radio_app_common_hdr* app_hdr = NULL; - struct data_section_hdr* section_hdr = NULL; - struct data_section_compression_hdr* compression_hdr = NULL; - const int16_t ccid_pos = conf->bit_ccId; - const int16_t ccid_mask = conf->mask_ccId; - const int16_t antid_pos = conf->bit_ruPortId; - const int16_t antid_mask = conf->mask_ruPortId; - - const int16_t rte_ether_hdr_size = sizeof(struct rte_ether_hdr); - const int16_t rte_mempool_objhdr_size = sizeof(struct rte_mempool_objhdr); - uint16_t comp_head_upd = 0; + unsigned long t1 = MLogXRANTick(); - const int16_t total_header_size = (RTE_PKTMBUF_HEADROOM + - sizeof(struct xran_ecpri_hdr) + - sizeof(struct radio_app_common_hdr) + - sizeof(struct data_section_hdr)); + void *pHandle = NULL; + int32_t ant_id = 0; + int32_t cc_id = 0; + uint8_t num_eAxc = 0; + uint8_t num_eAxc_prach = 0; + uint8_t num_eAxAntElm = 0; + uint8_t num_CCPorts = 0; + uint32_t frame_id = 0; + uint32_t subframe_id = 0; + uint32_t slot_id = 0; + uint32_t sym_id = 0; + uint32_t sym_idx_to_send = 0; + uint32_t idxSym; + uint8_t ctx_id; + enum xran_in_period inPeriod; + uint32_t interval; + uint8_t PortId; + struct xran_device_ctx * p_xran_dev_ctx = NULL; - uint16_t* __restrict pSrc = NULL; - uint16_t* __restrict pDst = NULL; + p_xran_dev_ctx = xran_dev_get_ctx_by_id(xran_port_id); - const enum xran_input_byte_order iq_buf_byte_order = p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder; + if(p_xran_dev_ctx == NULL) + return 0; - /* radio app header */ - xp.app_params.data_feature.value = 0x10; - xp.app_params.data_feature.data_direction = direction; - xp.app_params.frame_id = frame_id; - xp.app_params.sf_slot_sym.subframe_id = subframe_id; - xp.app_params.sf_slot_sym.slot_id = slot_id; - xp.app_params.sf_slot_sym.symb_id = sym_id; - /* convert to network byte order */ - xp.app_params.sf_slot_sym.value = rte_cpu_to_be_16(xp.app_params.sf_slot_sym.value); + if(p_xran_dev_ctx->xran2phy_mem_ready == 0) + return 0; + interval = p_xran_dev_ctx->interval_us_local; + PortId = p_xran_dev_ctx->xran_port_id; - for (cc_id = 0; cc_id < num_cc; cc_id++) - { - for (ant_id = 0; ant_id < num_ant; ant_id++) - { - ptr_sect_elm = p_sec_db->p_sectiondb_elm[ctx_id][direction][cc_id][ant_id]; - if (unlikely(ptr_sect_elm == NULL)) - return (0); - num_sections = ptr_sect_elm->cur_index; + pHandle = p_xran_dev_ctx; - /* iterate C-Plane configuration to generate corresponding U-Plane */ - vf_id = p_xran_dev_ctx->map2vf[direction][cc_id][ant_id][XRAN_UP_VF]; - pos = (char*)p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData; - mb_base = p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[sym_id].pCtrl; - if (unlikely(mb_base == NULL)) + for (idxSym = nSymStart; idxSym < (nSymStart + nSymNum) && idxSym < XRAN_NUM_OF_SYMBOL_PER_SLOT; idxSym++) { + t1 = MLogXRANTick(); + if(((1 << idxSym) & nSymMask) ) { + sym_idx_to_send = nSlotIdx*XRAN_NUM_OF_SYMBOL_PER_SLOT + idxSym; + XranOffsetSym(p_xran_dev_ctx->sym_up, sym_idx_to_send, XRAN_NUM_OF_SYMBOL_PER_SLOT*SLOTNUM_PER_SUBFRAME(interval)*1000, &inPeriod); + tti = XranGetTtiNum(sym_idx_to_send, XRAN_NUM_OF_SYMBOL_PER_SLOT); + slot_id = XranGetSlotNum(tti, SLOTNUM_PER_SUBFRAME(interval)); + subframe_id = XranGetSubFrameNum(tti,SLOTNUM_PER_SUBFRAME(interval), SUBFRAMES_PER_SYSTEMFRAME); + + uint16_t sfnSecStart = xran_getSfnSecStart(); + if(unlikely(inPeriod == XRAN_IN_NEXT_PERIOD)) { - rte_panic("mb == NULL\n"); + // For DU + sfnSecStart = (sfnSecStart + NUM_OF_FRAMES_PER_SECOND) & 0x3ff; } - - cid = ((cc_id << ccid_pos) & ccid_mask) | ((ant_id << antid_pos) & antid_mask); - cid = rte_cpu_to_be_16(cid); - iq_sample_size_bits = 16; - -#ifdef TRANSMIT_BURST - loc_tx_mbufs.len = 0; -#endif - loc_tx_mbufs_fragmented.len = 0; - len_frag = 0; -#pragma loop_count min=1, max=16 - for (next=0; next< num_sections; next++) + else if(unlikely(inPeriod == XRAN_IN_PREV_PERIOD)) { - sectinfo = &ptr_sect_elm->list[next]; - - if (unlikely(sectinfo == NULL)) - break; - if (unlikely(sectinfo->type != XRAN_CP_SECTIONTYPE_1)) - { /* only supports type 1 */ - print_err("Invalid section type in section DB - %d", sectinfo->type); - continue; + // For RU + if (sfnSecStart >= NUM_OF_FRAMES_PER_SECOND) + { + sfnSecStart -= NUM_OF_FRAMES_PER_SECOND; + } + else + { + sfnSecStart += NUM_OF_FRAMES_PER_SFN_PERIOD - NUM_OF_FRAMES_PER_SECOND; } - /* skip, if not scheduled */ - if (unlikely(sym_id < sectinfo->startSymId || sym_id >= sectinfo->startSymId + sectinfo->numSymbol)) - continue; + } + frame_id = XranGetFrameNum(tti,sfnSecStart,SUBFRAMES_PER_SYSTEMFRAME, SLOTNUM_PER_SUBFRAME(interval)); + // ORAN frameId, 8 bits, [0, 255] + frame_id = (frame_id & 0xff); - compMeth = sectinfo->compMeth; - iqWidth = sectinfo->iqWidth; - section_id = sectinfo->id; - prb_start = sectinfo->startPrbc; - prb_num = sectinfo->numPrbc; - seq_id = xran_updl_seq_id_num[xran_port_id][cc_id][ant_id]++; - len2 = 0; + sym_id = XranGetSymNum(sym_idx_to_send, XRAN_NUM_OF_SYMBOL_PER_SLOT); + ctx_id = tti % XRAN_MAX_SECTIONDB_CTX; - if (compMeth) - iq_sample_size_bits = iqWidth; + print_dbg("[%d]SFN %d sf %d slot %d\n", tti, frame_id, subframe_id, slot_id); - comp_head_upd = ((compMeth != XRAN_COMPMETHOD_NONE) && (compType == XRAN_COMP_HDR_TYPE_DYNAMIC)); +#if XRAN_MLOG_VAR + mlogVarCnt = 0; + mlogVar[mlogVarCnt++] = 0xAAAAAAAA; + mlogVar[mlogVarCnt++] = xran_lib_ota_sym_idx[PortId]; + mlogVar[mlogVarCnt++] = idxSym; + mlogVar[mlogVarCnt++] = abs(p_xran_dev_ctx->sym_up); + mlogVar[mlogVarCnt++] = tti; + mlogVar[mlogVarCnt++] = frame_id; + mlogVar[mlogVarCnt++] = subframe_id; + mlogVar[mlogVarCnt++] = slot_id; + mlogVar[mlogVarCnt++] = sym_id; + mlogVar[mlogVarCnt++] = PortId; + MLogAddVariables(mlogVarCnt, mlogVar, MLogTick()); +#endif + if(p_xran_dev_ctx->fh_init.io_cfg.id == O_RU + && xran_get_ru_category(pHandle) == XRAN_CATEGORY_B) + { + num_eAxc = xran_get_num_eAxcUl(pHandle); + } + else + { + num_eAxc = xran_get_num_eAxc(pHandle); + } - print_dbg(">>> sym %2d [%d] type%d id %d startPrbc=%d numPrbc=%d startSymId=%d numSymbol=%d\n", sym_id, next, - sectinfo->type, sectinfo->id, sectinfo->startPrbc, - sectinfo->numPrbc, sectinfo->startSymId, sectinfo->numSymbol); + num_eAxc_prach = ((num_eAxc > XRAN_MAX_PRACH_ANT_NUM)? XRAN_MAX_PRACH_ANT_NUM : num_eAxc); + num_CCPorts = xran_get_num_cc(pHandle); - p_share_data = &p_xran_dev_ctx->share_data.sh_data[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id][section_id]; - p_share_data->free_cb = extbuf_free_callback; - p_share_data->fcb_opaque = NULL; - rte_mbuf_ext_refcnt_set(p_share_data, 1); + /* U-Plane */ + if(p_xran_dev_ctx->fh_init.io_cfg.id == O_DU && p_xran_dev_ctx->enableCP) { + enum xran_comp_hdr_type compType; + enum xran_pkt_dir direction; + //uint32_t prb_num; + uint32_t loc_ret = 1; + uint16_t xran_port_id; + PSECTION_DB_TYPE p_sec_db = NULL; -#ifdef TRANSMIT_BURST - len = loc_tx_mbufs.len; - //Added for Klocworks - if (unlikely(len >= MBUF_TABLE_SIZE)) + compType = p_xran_dev_ctx->fh_cfg.ru_conf.xranCompHdrType; + + if(p_xran_dev_ctx->fh_init.io_cfg.id == O_DU) { - len = MBUF_TABLE_SIZE - 1; - rte_panic("len >= MBUF_TABLE_SIZE\n"); + direction = XRAN_DIR_DL; /* O-DU */ + //prb_num = p_xran_dev_ctx->fh_cfg.nDLRBs; + } + else + { + direction = XRAN_DIR_UL; /* RU */ + //prb_num = p_xran_dev_ctx->fh_cfg.nULRBs; } -#endif - p_sec_iq = ((char*)pos + sectinfo->sec_desc[sym_id].iq_buffer_offset); - ext_buff_len = sectinfo->sec_desc[sym_id].iq_buffer_len; - ext_buff = p_sec_iq - total_header_size; - ext_buff_len += (total_header_size + 18); + if(unlikely(p_xran_dev_ctx->xran_port_id > XRAN_PORTS_NUM)) + { + print_err("Invalid Port id - %d", p_xran_dev_ctx->xran_port_id); + loc_ret = 0; + } - if (comp_head_upd) + if(unlikely(ctx_id > XRAN_MAX_SECTIONDB_CTX)) { - ext_buff -= sizeof(struct data_section_compression_hdr); - ext_buff_len += sizeof(struct data_section_compression_hdr); + print_err("Invalid Context id - %d", ctx_id); + loc_ret = 0; } - mb_oran_hdr_ext = rte_pktmbuf_alloc(_eth_mbuf_pool_vf_small[vf_id]); - if (unlikely((mb_oran_hdr_ext) == NULL)) + if(unlikely(direction > XRAN_DIR_MAX)) { - rte_panic("[core %d]Failed rte_pktmbuf_alloc on vf %d\n", rte_lcore_id(), vf_id); + print_err("Invalid direction - %d", direction); + loc_ret = 0; } - iova_hdr = (struct rte_mempool_objhdr*)RTE_PTR_SUB(mb_base, rte_mempool_objhdr_size); - ext_buff_iova = iova_hdr->iova; + if(unlikely(num_CCPorts > XRAN_COMPONENT_CARRIERS_MAX)) + { + print_err("Invalid CC id - %d", num_CCPorts); + loc_ret = 0; + } -#ifdef ENABLE_DEBUG_COREDUMP - if (unlikely(ext_buff_iova == 0)) + if(unlikely(num_eAxc > (XRAN_MAX_ANTENNA_NR * 2 + XRAN_MAX_ANT_ARRAY_ELM_NR))) { - rte_panic("Failed rte_mem_virt2iova\n"); + print_err("Invalid eAxC id - %d", num_eAxc); + loc_ret = 0; } - if (unlikely(((rte_iova_t)ext_buff_iova) == RTE_BAD_IOVA)) + + xran_port_id = p_xran_dev_ctx->xran_port_id; + p_sec_db = p_sectiondb[p_xran_dev_ctx->xran_port_id]; + if(unlikely(p_sec_db == NULL)) { - rte_panic("Failed rte_mem_virt2iova RTE_BAD_IOVA \n"); + print_err("p_sec_db == NULL\n"); + loc_ret = 0; + } + + if (loc_ret) { + retval = xran_process_tx_sym_cp_on_opt(pHandle, ctx_id, tti, + nCcStart, nCcNum, nAntStart, nAntNum, frame_id, subframe_id, slot_id, idxSym, + compType, direction, xran_port_id, p_sec_db); + } else { + print_err("loc_ret %d\n", loc_ret); + retval = 0; } + } else { + for (ant_id = 0; ant_id < num_eAxc; ant_id++) { + for (cc_id = 0; cc_id < num_CCPorts; cc_id++) { + //struct xran_srs_config *p_srs_cfg = &(p_xran_dev_ctx->srs_cfg); + if(p_xran_dev_ctx->puschMaskEnable) + { + if((tti % numSlotMu1) != p_xran_dev_ctx->puschMaskSlot) + retval = xran_process_tx_sym_cp_off(pHandle, ctx_id, tti, cc_id, ant_id, frame_id, subframe_id, slot_id, sym_id, 0); + } + else + retval = xran_process_tx_sym_cp_off(pHandle, ctx_id, tti, cc_id, ant_id, frame_id, subframe_id, slot_id, sym_id, 0); + + if(p_xran_dev_ctx->enablePrach && (ant_id < num_eAxc_prach) ) + { + retval = xran_process_tx_prach_cp_off(pHandle, ctx_id, tti, cc_id, ant_id, frame_id, subframe_id, slot_id, sym_id); + } + } + } + } + + /* SRS U-Plane, only for O-RU emulation with Cat B */ + if(p_xran_dev_ctx->fh_init.io_cfg.id == O_RU + && xran_get_ru_category(pHandle) == XRAN_CATEGORY_B + && p_xran_dev_ctx->enableSrs + && ((p_xran_dev_ctx->srs_cfg.symbMask >> idxSym)&1)) + { + struct xran_srs_config *pSrsCfg = &(p_xran_dev_ctx->srs_cfg); + + for(cc_id = 0; cc_id < num_CCPorts; cc_id++) + { + /* check special frame */ + if((xran_fs_get_slot_type(PortId, cc_id, tti, XRAN_SLOT_TYPE_SP) == 1) + || (xran_fs_get_slot_type(PortId, cc_id, tti, XRAN_SLOT_TYPE_UL) == 1)) + { + if(((tti % p_xran_dev_ctx->fh_cfg.frame_conf.nTddPeriod) == pSrsCfg->slot) + && (p_xran_dev_ctx->ndm_srs_scheduled == 0)) + { + int elmIdx; + struct xran_prb_map *prb_map; + prb_map = (struct xran_prb_map *)p_xran_dev_ctx->sFHSrsRxPrbMapBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][0].sBufferList.pBuffers->pData; + + /* if PRB map is present in first antenna, assume SRS might be scheduled. */ + if(prb_map && prb_map->nPrbElm) + { + /* NDM U-Plane is not enabled */ + if(pSrsCfg->ndm_offset == 0) + { + + if (prb_map->nPrbElm > 0) + { + /* Check symbol range in PRB Map */ + if(sym_id >= prb_map->prbMap[0].nStartSymb + && sym_id < (prb_map->prbMap[0].nStartSymb + prb_map->prbMap[0].numSymb)) + for(ant_id=0; ant_id < xran_get_num_ant_elm(pHandle); ant_id++) + xran_process_tx_srs_cp_off(pHandle, ctx_id, tti, cc_id, ant_id, frame_id, subframe_id, slot_id); + } + + } + /* NDM U-Plane is enabled, SRS U-Planes will be transmitted after ndm_offset (in slots) */ + else + { + p_xran_dev_ctx->ndm_srs_scheduled = 1; + p_xran_dev_ctx->ndm_srs_tti = tti; + p_xran_dev_ctx->ndm_srs_txtti = (tti + pSrsCfg->ndm_offset)%2000; + p_xran_dev_ctx->ndm_srs_schedperiod = pSrsCfg->slot; + } + } + } + } + /* check SRS NDM UP has been scheduled in non special slots */ + else if(p_xran_dev_ctx->ndm_srs_scheduled + && p_xran_dev_ctx->ndm_srs_txtti == tti) + { + int ndm_step; + uint32_t srs_tti, srsFrame, srsSubframe, srsSlot; + uint8_t srsCtx; + + srs_tti = p_xran_dev_ctx->ndm_srs_tti; + num_eAxAntElm = xran_get_num_ant_elm(pHandle); + ndm_step = num_eAxAntElm / pSrsCfg->ndm_txduration; + + srsSlot = XranGetSlotNum(srs_tti, SLOTNUM_PER_SUBFRAME(interval)); + srsSubframe = XranGetSubFrameNum(srs_tti,SLOTNUM_PER_SUBFRAME(interval), SUBFRAMES_PER_SYSTEMFRAME); + srsFrame = XranGetFrameNum(srs_tti,sfnSecStart,SUBFRAMES_PER_SYSTEMFRAME, SLOTNUM_PER_SUBFRAME(interval)); + srsFrame = (srsFrame & 0xff); + srsCtx = srs_tti % XRAN_MAX_SECTIONDB_CTX; + + if(sym_id < pSrsCfg->ndm_txduration) + { + for(ant_id=sym_id*ndm_step; ant_id < (sym_id+1)*ndm_step; ant_id++) + xran_process_tx_srs_cp_off(pHandle, srsCtx, srs_tti, cc_id, ant_id, srsFrame, srsSubframe, srsSlot); + } + else + { + p_xran_dev_ctx->ndm_srs_scheduled = 0; + p_xran_dev_ctx->ndm_srs_tti = 0; + p_xran_dev_ctx->ndm_srs_txtti = 0; + p_xran_dev_ctx->ndm_srs_schedperiod = 0; + } + } + } + } + } + MLogXRANTask(PID_DISPATCH_TX_SYM, t1, MLogXRANTick()); + } + + return retval; +} + + +static inline uint16_t +xran_tx_sym_from_ring(struct xran_device_ctx* p_xran_dev_ctx, struct rte_ring *r, uint16_t vf_id) +{ + struct rte_mbuf *mbufs[XRAN_MAX_MEM_IF_RING_SIZE]; + uint16_t dequeued, sent = 0; + uint32_t remaining; + //long t1 = MLogXRANTick(); + + dequeued = rte_ring_dequeue_burst(r, (void **)mbufs, XRAN_MAX_MEM_IF_RING_SIZE, + &remaining); + if (!dequeued) + return 0; /* Nothing to send. */ + + while (1) { + //sent += p_xran_dev_ctx->send_upmbuf2ring(mbufs[sent], ETHER_TYPE_ECPRI, vf_id); + sent += rte_eth_tx_burst(vf_id, 0, &mbufs[sent], dequeued - sent); + if (sent == dequeued){ + // MLogXRANTask(PID_REQUEUE_TX_SYM, t1, MLogXRANTick()); + return remaining; + } + } +} + +int32_t +xran_process_tx_sym_cp_on_ring(void* pHandle, uint8_t ctx_id, uint32_t tti, int32_t start_cc, int32_t num_cc, int32_t start_ant, int32_t num_ant, uint32_t frame_id, + uint32_t subframe_id, uint32_t slot_id, uint32_t sym_id, enum xran_comp_hdr_type compType, enum xran_pkt_dir direction, + uint16_t xran_port_id, PSECTION_DB_TYPE p_sec_db) +{ + struct rte_ring *ring = NULL; + struct xran_device_ctx* p_xran_dev_ctx = (struct xran_device_ctx*)pHandle; + int32_t cc_id = 0; + int32_t ant_id = 0; + uint16_t vf_id = 0; + + for (cc_id = start_cc; cc_id < (start_cc + num_cc); cc_id++) { + for (ant_id = start_ant; ant_id < (start_ant + num_ant); ant_id++) { + vf_id = p_xran_dev_ctx->map2vf[direction][cc_id][ant_id][XRAN_UP_VF]; + ring = p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[sym_id].pRing; + xran_tx_sym_from_ring(p_xran_dev_ctx, ring, vf_id); + } + } + return 0; +} + +//#define TRANSMIT_BURST +//#define ENABLE_DEBUG_COREDUMP + +#define ETHER_TYPE_ECPRI_BE (0xFEAE) + +int32_t +xran_process_tx_sym_cp_on_opt(void* pHandle, uint8_t ctx_id, uint32_t tti, int32_t start_cc, int32_t num_cc, int32_t start_ant, int32_t num_ant, uint32_t frame_id, + uint32_t subframe_id, uint32_t slot_id, uint32_t sym_id, enum xran_comp_hdr_type compType, enum xran_pkt_dir direction, + uint16_t xran_port_id, PSECTION_DB_TYPE p_sec_db) +{ + struct xran_up_pkt_gen_params *pxp; + struct data_section_hdr *pDataSec; + char* ext_buff; + void *mb_base; + struct rte_ring *ring; + char* pStart; + struct xran_ethdi_ctx* eth_ctx = xran_ethdi_get_ctx(); + struct xran_section_info* sectinfo; + struct xran_device_ctx* p_xran_dev_ctx = (struct xran_device_ctx*)pHandle; + struct rte_mbuf_ext_shared_info* p_share_data; + struct xran_sectioninfo_db* ptr_sect_elm = NULL; + struct rte_mbuf* mb_oran_hdr_ext = NULL; + struct xran_ecpri_hdr* ecpri_hdr = NULL; + //uint16_t* __restrict pSrc = NULL; + uint16_t* __restrict pDst = NULL; + + uint16_t next; + uint16_t ext_buff_len = 0; + uint16_t iq_sample_size_bytes=0; + uint16_t num_sections = 0, total_sections = 0; + uint16_t n_bytes; + uint16_t elm_bytes = 0; + uint16_t section_id; + uint16_t nPktSize=0; + uint16_t cid; + uint16_t vf_id; + const int16_t rte_mempool_objhdr_size = sizeof(struct rte_mempool_objhdr); + uint8_t seq_id = 0; + uint8_t cc_id, ant_id; + +#ifdef TRANSMIT_BURST + uint16_t len = 0; +#endif + //uint16_t len2 = 0, len_frag = 0; + uint8_t compMeth; + uint8_t iqWidth; + uint8_t parm_size; +#ifdef TRANSMIT_BURST + struct mbuf_table loc_tx_mbufs; + struct mbuf_table loc_tx_mbufs_fragmented = {0}; #endif - mb_oran_hdr_ext->buf_addr = ext_buff; - mb_oran_hdr_ext->buf_iova = ext_buff_iova + RTE_PTR_DIFF(ext_buff, mb_base); - mb_oran_hdr_ext->buf_len = ext_buff_len; - mb_oran_hdr_ext->ol_flags |= EXT_ATTACHED_MBUF; - mb_oran_hdr_ext->shinfo = p_share_data; - mb_oran_hdr_ext->data_off = (uint16_t)RTE_MIN((uint16_t)RTE_PKTMBUF_HEADROOM, (uint16_t)mb_oran_hdr_ext->buf_len) - rte_ether_hdr_size; - mb_oran_hdr_ext->data_len = (uint16_t)(mb_oran_hdr_ext->data_len + rte_ether_hdr_size); - mb_oran_hdr_ext->pkt_len = mb_oran_hdr_ext->pkt_len + rte_ether_hdr_size; - mb_oran_hdr_ext->port = eth_ctx->io_cfg.port[vf_id]; - - mb = (void*)mb_oran_hdr_ext; - - to_free_mbuf = p_xran_dev_ctx->to_free_mbuf[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id][sym_id][section_id]; - p_xran_dev_ctx->to_free_mbuf[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id][sym_id][section_id] = mb; - rte_pktmbuf_refcnt_update(mb, 1); /* make sure eth won't free our mbuf */ - if (to_free_mbuf) + uint8_t fragNeeded=0; + + const uint8_t rte_ether_hdr_size = sizeof(struct rte_ether_hdr); + uint8_t comp_head_upd = 0; + + const uint8_t total_header_size = (RTE_PKTMBUF_HEADROOM + + sizeof(struct xran_ecpri_hdr) + + sizeof(struct radio_app_common_hdr) + + sizeof(struct data_section_hdr)); + + + for (cc_id = start_cc; cc_id < (start_cc + num_cc); cc_id++) + { + for (ant_id = start_ant; ant_id < (start_ant + num_ant); ant_id++) + { + ptr_sect_elm = p_sec_db->p_sectiondb_elm[ctx_id][direction][cc_id][ant_id]; + if (unlikely(ptr_sect_elm == NULL)){ + rte_panic("ptr_sect_elm == NULL\n"); + return (0); + } + + if(0!=ptr_sect_elm->cur_index) + { + num_sections = ptr_sect_elm->cur_index; + /* iterate C-Plane configuration to generate corresponding U-Plane */ + vf_id = p_xran_dev_ctx->map2vf[direction][cc_id][ant_id][XRAN_UP_VF]; + mb_base = p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[sym_id].pCtrl; + ring = p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[sym_id].pRing; + if (unlikely(mb_base == NULL)) { - rte_pktmbuf_free(to_free_mbuf); + rte_panic("mb == NULL\n"); } + cid = ((cc_id << p_xran_dev_ctx->eAxc_id_cfg.bit_ccId) & p_xran_dev_ctx->eAxc_id_cfg.mask_ccId) | ((ant_id << p_xran_dev_ctx->eAxc_id_cfg.bit_ruPortId) & p_xran_dev_ctx->eAxc_id_cfg.mask_ruPortId); + cid = rte_cpu_to_be_16(cid); + +#ifdef TRANSMIT_BURST + loc_tx_mbufs.len = 0; +#endif + //len_frag = 0; +#pragma loop_count min=1, max=16 + for (next=0; next< num_sections; next++) + { + sectinfo = &ptr_sect_elm->list[next]; - pStart = (char*)((char*)mb_oran_hdr_ext->buf_addr + mb_oran_hdr_ext->data_off); + if (unlikely(sectinfo == NULL)) { + print_err("sectinfo == NULL\n"); + break; + } + if (unlikely(sectinfo->type != XRAN_CP_SECTIONTYPE_1)) + { /* only supports type 1 */ + print_err("Invalid section type in section DB - %d", sectinfo->type); + continue; + } + /* skip, if not scheduled */ + if (unlikely(sym_id < sectinfo->startSymId || sym_id >= sectinfo->startSymId + sectinfo->numSymbol)) + continue; + + compMeth = sectinfo->compMeth; + iqWidth = sectinfo->iqWidth; + section_id = sectinfo->id; + + comp_head_upd = ((compMeth != XRAN_COMPMETHOD_NONE) && (compType == XRAN_COMP_HDR_TYPE_DYNAMIC)); + + if(sectinfo->prbElemBegin || p_xran_dev_ctx->RunSlotPrbMapBySymbolEnable) + { + if(p_xran_dev_ctx->fh_init.io_cfg.id == O_DU) + seq_id = xran_updl_seq_id_num[xran_port_id][cc_id][ant_id]++; + else + seq_id = xran_upul_seq_id_num[xran_port_id][cc_id][ant_id]++; + iq_sample_size_bytes = 18 + sizeof(struct xran_ecpri_hdr) + + sizeof(struct radio_app_common_hdr); + } + + + if (compMeth) + { + iq_sample_size_bytes += sizeof(struct data_section_hdr) ; + + if (comp_head_upd) + { + iq_sample_size_bytes += sizeof(struct data_section_compression_hdr); + } + + iq_sample_size_bytes += sectinfo->numPrbc*(iqWidth*3 + 1); + } - ether_hdr = (struct rte_ether_hdr*)pStart; + print_dbg(">>> sym %2d [%d] type%d id %d startPrbc=%d numPrbc=%d startSymId=%d numSymbol=%d\n", sym_id, next, + sectinfo->type, sectinfo->id, sectinfo->startPrbc, + sectinfo->numPrbc, sectinfo->startSymId, sectinfo->numSymbol); - /* Fill in the ethernet header. */ + +#ifdef TRANSMIT_BURST + len = loc_tx_mbufs.len; + //Added for Klocworks + if (unlikely(len >= MBUF_TABLE_SIZE)) + { + len = MBUF_TABLE_SIZE - 1; + rte_panic("len >= MBUF_TABLE_SIZE\n"); + } +#endif + if(sectinfo->prbElemBegin || p_xran_dev_ctx->RunSlotPrbMapBySymbolEnable) + { + p_share_data = &p_xran_dev_ctx->share_data.sh_data[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id][section_id]; + p_share_data->free_cb = extbuf_free_callback; + p_share_data->fcb_opaque = NULL; + rte_mbuf_ext_refcnt_set(p_share_data, 1); + + /* Create ethernet + eCPRI + radio app header */ + ext_buff_len = sectinfo->sec_desc[sym_id].iq_buffer_len; + + ext_buff = ((char*)p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData + sectinfo->sec_desc[sym_id].iq_buffer_offset) - total_header_size; + ext_buff_len += (total_header_size + 18); + + if (comp_head_upd) + { + ext_buff -= sizeof(struct data_section_compression_hdr); + ext_buff_len += sizeof(struct data_section_compression_hdr); + } + + mb_oran_hdr_ext = rte_pktmbuf_alloc(_eth_mbuf_pool_vf_small[vf_id]); + if (unlikely((mb_oran_hdr_ext) == NULL)) + { + rte_panic("[core %d]Failed rte_pktmbuf_alloc on vf %d\n", rte_lcore_id(), vf_id); + } + +#ifdef ENABLE_DEBUG_COREDUMP + if (unlikely((struct rte_mempool_objhdr*)RTE_PTR_SUB(mb_base, rte_mempool_objhdr_size)->iova == 0)) + { + rte_panic("Failed rte_mem_virt2iova\n"); + } + if (unlikely(((rte_iova_t)(struct rte_mempool_objhdr*)RTE_PTR_SUB(mb_base, rte_mempool_objhdr_size)->iova) == RTE_BAD_IOVA)) + { + rte_panic("Failed rte_mem_virt2iova RTE_BAD_IOVA \n"); + } +#endif + mb_oran_hdr_ext->buf_addr = ext_buff; + mb_oran_hdr_ext->buf_iova = ((struct rte_mempool_objhdr*)RTE_PTR_SUB(mb_base, rte_mempool_objhdr_size))->iova + RTE_PTR_DIFF(ext_buff, mb_base); + mb_oran_hdr_ext->buf_len = ext_buff_len; + mb_oran_hdr_ext->ol_flags |= EXT_ATTACHED_MBUF; + mb_oran_hdr_ext->shinfo = p_share_data; + mb_oran_hdr_ext->data_off = (uint16_t)RTE_MIN((uint16_t)RTE_PKTMBUF_HEADROOM, (uint16_t)mb_oran_hdr_ext->buf_len) - rte_ether_hdr_size; + mb_oran_hdr_ext->data_len = (uint16_t)(mb_oran_hdr_ext->data_len + rte_ether_hdr_size); + mb_oran_hdr_ext->pkt_len = mb_oran_hdr_ext->pkt_len + rte_ether_hdr_size; + mb_oran_hdr_ext->port = eth_ctx->io_cfg.port[vf_id]; + + p_xran_dev_ctx->to_free_mbuf[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id][sym_id][section_id] = (void*)mb_oran_hdr_ext; + rte_pktmbuf_refcnt_update((void*)mb_oran_hdr_ext, 1); /* make sure eth won't free our mbuf */ + if (p_xran_dev_ctx->to_free_mbuf[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id][sym_id][section_id]) + { + rte_pktmbuf_free(p_xran_dev_ctx->to_free_mbuf[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id][sym_id][section_id]); + } + + pStart = (char*)((char*)mb_oran_hdr_ext->buf_addr + mb_oran_hdr_ext->data_off); + + /* Fill in the ethernet header. */ #ifndef TRANSMIT_BURST - rte_eth_macaddr_get(mb_oran_hdr_ext->port, ðer_hdr->s_addr); /* set source addr */ - ether_hdr->d_addr = eth_ctx->entities[vf_id][ID_O_RU]; /* set dst addr */ - ether_hdr->ether_type = ETHER_TYPE_ECPRI_BE; /* ethertype */ + rte_eth_macaddr_get(mb_oran_hdr_ext->port, &((struct rte_ether_hdr*)pStart)->s_addr); /* set source addr */ + ((struct rte_ether_hdr*)pStart)->d_addr = eth_ctx->entities[vf_id][ID_O_RU]; /* set dst addr */ + ((struct rte_ether_hdr*)pStart)->ether_type = ETHER_TYPE_ECPRI_BE; /* ethertype */ #endif - iqWidth = (iqWidth == 0) ? 16 : iqWidth; - switch (compMeth) - { + nPktSize = sizeof(struct rte_ether_hdr) + + sizeof(struct xran_ecpri_hdr) + + sizeof(struct radio_app_common_hdr) ; + + ecpri_hdr = (struct xran_ecpri_hdr*)(pStart + sizeof(struct rte_ether_hdr)); + + ecpri_hdr->cmnhdr.data.data_num_1 = 0x0; + ecpri_hdr->cmnhdr.bits.ecpri_ver = XRAN_ECPRI_VER; + ecpri_hdr->cmnhdr.bits.ecpri_mesg_type = ECPRI_IQ_DATA; + + /* one to one lls-CU to RU only and band sector is the same */ + ecpri_hdr->ecpri_xtc_id = cid; + + /* no transport layer fragmentation supported */ + ecpri_hdr->ecpri_seq_id.data.data_num_1 = 0x8000; + ecpri_hdr->ecpri_seq_id.bits.seq_id = seq_id; + ecpri_hdr->cmnhdr.bits.ecpri_payl_size = sizeof(struct radio_app_common_hdr) + XRAN_ECPRI_HDR_SZ; //xran_get_ecpri_hdr_size();;; + + } /* if(sectinfo->prbElemBegin) */ + + /* Prepare U-Plane section hdr */ + iqWidth = (iqWidth == 0) ? 16 : iqWidth; + switch (compMeth) + { case XRAN_COMPMETHOD_BLKFLOAT: parm_size = 1; break; case XRAN_COMPMETHOD_MODULATION: parm_size = 0; break; default: parm_size = 0; - } - n_bytes = (3 * iqWidth + parm_size) * prb_num; - n_bytes = RTE_MIN(n_bytes, XRAN_MAX_MBUF_LEN); - - nPktSize = sizeof(struct rte_ether_hdr) - + sizeof(struct xran_ecpri_hdr) - + sizeof(struct radio_app_common_hdr) - + sizeof(struct data_section_hdr) - + n_bytes; - - if (comp_head_upd) - nPktSize += sizeof(struct data_section_compression_hdr); - - xp.sec_hdr.fields.sect_id = section_id; - xp.sec_hdr.fields.num_prbu = (uint8_t)XRAN_CONVERT_NUMPRBC(prb_num); - xp.sec_hdr.fields.start_prbu = (uint8_t)prb_start; - xp.sec_hdr.fields.sym_inc = 0; - xp.sec_hdr.fields.rb = 0; - /* network byte order */ - xp.sec_hdr.fields.all_bits = rte_cpu_to_be_32(xp.sec_hdr.fields.all_bits); + } - /* compression */ - xp.compr_hdr_param.ud_comp_hdr.ud_comp_meth = compMeth; - xp.compr_hdr_param.ud_comp_hdr.ud_iq_width = XRAN_CONVERT_IQWIDTH(iqWidth); - xp.compr_hdr_param.rsrvd = 0; - - ecpri_hdr = (struct xran_ecpri_hdr*)(pStart + sizeof(struct rte_ether_hdr)); - - ecpri_payl_size = n_bytes - + sizeof(struct data_section_hdr) - + sizeof(struct radio_app_common_hdr) - + XRAN_ECPRI_HDR_SZ; //xran_get_ecpri_hdr_size(); - - if (comp_head_upd) - ecpri_payl_size += sizeof(struct data_section_compression_hdr); - - ecpri_hdr->cmnhdr.data.data_num_1 = 0x0; - ecpri_hdr->cmnhdr.bits.ecpri_ver = XRAN_ECPRI_VER; - ecpri_hdr->cmnhdr.bits.ecpri_mesg_type = ECPRI_IQ_DATA; - ecpri_hdr->cmnhdr.bits.ecpri_payl_size = rte_cpu_to_be_16(ecpri_payl_size); - - /* one to one lls-CU to RU only and band sector is the same */ - ecpri_hdr->ecpri_xtc_id = cid; - - /* no transport layer fragmentation supported */ - ecpri_hdr->ecpri_seq_id.data.data_num_1 = 0x8000; - ecpri_hdr->ecpri_seq_id.bits.seq_id = seq_id; - - pSrc = (uint16_t*)&(xp.app_params); - pDst = (uint16_t*)(pStart + sizeof(struct rte_ether_hdr) + sizeof(struct xran_ecpri_hdr)); - *pDst++ = *pSrc++; - *pDst++ = *pSrc++; - *pDst++ = *pSrc++; - *pDst++ = *pSrc++; - if (comp_head_upd) - { - *pDst++ = *pSrc++; - } + n_bytes = (3 * iqWidth + parm_size) * sectinfo->numPrbc; //Dont understand this + n_bytes = RTE_MIN(n_bytes, XRAN_MAX_MBUF_LEN); - rte_pktmbuf_pkt_len(mb_oran_hdr_ext) = nPktSize; - rte_pktmbuf_data_len(mb_oran_hdr_ext) = nPktSize; + /* Ethernet & eCPRI added already */ + nPktSize += sizeof(struct data_section_hdr) + n_bytes; - elm_bytes += nPktSize; + if (comp_head_upd) + nPktSize += sizeof(struct data_section_compression_hdr); - /* Restore fragmentation support in this code version */ - /* if we don't need to do any fragmentation */ - if (likely(p_xran_dev_ctx->fh_init.mtu >= sectinfo->numPrbc * (3 * iq_sample_size_bits + 1))) - { - /* no fragmentation */ - len2 = 1; -#ifdef TRANSMIT_BURST - loc_tx_mbufs.m_table[len++] = mb; - if (unlikely(len > XRAN_MAX_PKT_BURST_PER_SYM)) + if(likely((ecpri_hdr!=NULL))) { - rte_panic("XRAN_MAX_PKT_BURST_PER_SYM\n"); + ecpri_hdr->cmnhdr.bits.ecpri_payl_size += sizeof(struct data_section_hdr) + n_bytes ; + + if (comp_head_upd) + ecpri_hdr->cmnhdr.bits.ecpri_payl_size += sizeof(struct data_section_compression_hdr); } - loc_tx_mbufs.len = len; -#else - xran_enqueue_mbuf(mb_oran_hdr_ext, eth_ctx->tx_ring[vf_id]); -#endif - } - else - { - /* fragmentation */ - /* only burst transmission mode is supported for fragmented packets*/ - uint8_t* p_seq_num = &xran_updl_seq_id_num[xran_port_id][cc_id][ant_id]; - (*p_seq_num)--; - - len2 = xran_app_fragment_packet(mb_oran_hdr_ext, - &loc_tx_mbufs_fragmented.m_table[len_frag], - (uint16_t)(MBUF_TABLE_SIZE - len_frag), - p_xran_dev_ctx->fh_init.mtu, - p_xran_dev_ctx->direct_pool, - p_xran_dev_ctx->indirect_pool, - prb_start, - prb_num, - p_seq_num, - iqWidth, - ((iqWidth == 16) || (compType == XRAN_COMP_HDR_TYPE_STATIC)) ? 0 : 1); - - /* Free input packet */ - rte_pktmbuf_free(mb_oran_hdr_ext); - - /* If we fail to fragment the packet */ - if (unlikely(len2 < 0)) + else { - print_err("len2= %d\n", len2); - continue; + print_err("ecpri_hdr should not be NULL\n"); + } + //ecpri_hdr->cmnhdr.bits.ecpri_payl_size += ecpri_payl_size; + + /* compression */ + + if(sectinfo->prbElemBegin || p_xran_dev_ctx->RunSlotPrbMapBySymbolEnable) + { + pDst = (uint16_t*)(pStart + sizeof(struct rte_ether_hdr) + sizeof(struct xran_ecpri_hdr)); + pxp = (struct xran_up_pkt_gen_params *)pDst; + /* radio app header */ + pxp->app_params.data_feature.value = 0x10; + pxp->app_params.data_feature.data_direction = direction; + pxp->app_params.frame_id = frame_id; + pxp->app_params.sf_slot_sym.subframe_id = subframe_id; + pxp->app_params.sf_slot_sym.slot_id = slot_id; + pxp->app_params.sf_slot_sym.symb_id = sym_id; + /* convert to network byte order */ + pxp->app_params.sf_slot_sym.value = rte_cpu_to_be_16(pxp->app_params.sf_slot_sym.value); + pDst += 2; + } + + pDataSec = (struct data_section_hdr *)pDst; + if(pDataSec){ + pDataSec->fields.sect_id = section_id; + pDataSec->fields.num_prbu = (uint8_t)XRAN_CONVERT_NUMPRBC(sectinfo->numPrbc); + pDataSec->fields.start_prbu = (sectinfo->startPrbc & 0x03ff); + pDataSec->fields.sym_inc = 0; + pDataSec->fields.rb = 0; + /* network byte order */ + pDataSec->fields.all_bits = rte_cpu_to_be_32(pDataSec->fields.all_bits); + pDst += 2; } - if (unlikely(len2 > 1)) + else + { + print_err("pDataSec is NULL idx = %u num_sections = %u\n", next, num_sections); + // return 0; + } + + if (comp_head_upd) + { + if(pDst == NULL){ + print_err("pDst == NULL\n"); + return 0; + } + ((struct data_section_compression_hdr *)pDst)->ud_comp_hdr.ud_comp_meth = compMeth; + ((struct data_section_compression_hdr *)pDst)->ud_comp_hdr.ud_iq_width = XRAN_CONVERT_IQWIDTH(iqWidth); + ((struct data_section_compression_hdr *)pDst)->rsrvd = 0; + pDst++; + } + + //Increment by IQ data len + pDst = (uint16_t *)((uint8_t *)pDst + n_bytes) ; + if(mb_oran_hdr_ext){ + rte_pktmbuf_pkt_len(mb_oran_hdr_ext) = nPktSize; + rte_pktmbuf_data_len(mb_oran_hdr_ext) = nPktSize; + } + + if(sectinfo->prbElemEnd || p_xran_dev_ctx->RunSlotPrbMapBySymbolEnable) /* Transmit the packet */ { - for (int32_t i = len_frag; i < len_frag + len2; i++) + if(likely((ecpri_hdr!=NULL))) + ecpri_hdr->cmnhdr.bits.ecpri_payl_size = rte_cpu_to_be_16(ecpri_hdr->cmnhdr.bits.ecpri_payl_size); + else + print_err("ecpri_hdr should not be NULL\n"); + /* if we don't need to do any fragmentation */ + if (likely(p_xran_dev_ctx->fh_init.mtu >= (iq_sample_size_bytes))) { - struct rte_mbuf* m; - m = loc_tx_mbufs_fragmented.m_table[i]; - struct rte_ether_hdr* eth_hdr = (struct rte_ether_hdr*) - rte_pktmbuf_prepend(m, (uint16_t)sizeof(struct rte_ether_hdr)); - if (eth_hdr == NULL) + /* no fragmentation */ + //len2 = 1; +#ifdef TRANSMIT_BURST + loc_tx_mbufs.m_table[len++] = (void*)mb_oran_hdr_ext; + if (unlikely(len > XRAN_MAX_PKT_BURST_PER_SYM)) { - rte_panic("No headroom in mbuf.\n"); + rte_panic("XRAN_MAX_PKT_BURST_PER_SYM\n"); + } + loc_tx_mbufs.len = len; +#else + + if(p_xran_dev_ctx->fh_init.io_cfg.bbu_offload){ + rte_ring_enqueue(ring, mb_oran_hdr_ext); + } else { + xran_enqueue_mbuf(mb_oran_hdr_ext, eth_ctx->tx_ring[vf_id]); } +#endif } - } + else + { + /* current code should not go to fragmentation as it should be taken care of by section allocation already */ + // print_err("should not go into fragmentation mtu %d packet size %d\n", p_xran_dev_ctx->fh_init.mtu, sectinfo->numPrbc * (3*iq_sample_size_bits + 1)); + return 0; + } + elm_bytes += nPktSize; + } /* if(prbElemEnd) */ + }/* section loop */ + } /* if ptr_sect_elm->cur_index */ - len_frag += len2; - if (unlikely(len_frag > XRAN_MAX_PKT_BURST_PER_SYM)) { - rte_panic("XRAN_MAX_PKT_BURST_PER_SYM\n"); - } - loc_tx_mbufs_fragmented.len = len_frag; - } - } /* section loop */ total_sections += num_sections; /* Transmit packets */ @@ -1315,19 +1688,28 @@ int32_t xran_process_tx_sym_cp_on_opt(void* pHandle, uint8_t ctx_id, uint32_t tt { for (int32_t i = 0; i < loc_tx_mbufs.len; i++) { - p_xran_dev_ctx->send_upmbuf2ring(loc_tx_mbufs.m_table[i], ETHER_TYPE_ECPRI, vf_id); + if(p_xran_dev_ctx->fh_init.io_cfg.bbu_offload){ + rte_ring_enqueue(ring, loc_tx_mbufs_fragmented.m_table[i]); + } else { + p_xran_dev_ctx->send_upmbuf2ring(loc_tx_mbufs.m_table[i], ETHER_TYPE_ECPRI, vf_id); + } } loc_tx_mbufs.len = 0; } #endif /* Transmit fragmented packets */ - if (unlikely(loc_tx_mbufs_fragmented.len)) + if (unlikely(fragNeeded)) { +#if 0 /* There is no logic populating loc_tx_mbufs_fragmented. hence disabling this code */ for (int32_t i = 0; i < loc_tx_mbufs_fragmented.len; i++) { - p_xran_dev_ctx->send_upmbuf2ring(loc_tx_mbufs_fragmented.m_table[i], ETHER_TYPE_ECPRI, vf_id); + if(p_xran_dev_ctx->fh_init.io_cfg.bbu_offload){ + rte_ring_enqueue(ring, loc_tx_mbufs_fragmented.m_table[i]); + } else { + p_xran_dev_ctx->send_upmbuf2ring(loc_tx_mbufs_fragmented.m_table[i], ETHER_TYPE_ECPRI, vf_id); + } } - loc_tx_mbufs_fragmented.len = 0; +#endif } } /* for(cc_id = 0; cc_id < num_CCPorts; cc_id++) */ } /* for(ant_id = 0; ant_id < num_eAxc; ant_id++) */ @@ -1339,6 +1721,309 @@ int32_t xran_process_tx_sym_cp_on_opt(void* pHandle, uint8_t ctx_id, uint32_t tt return 1; } +int32_t +xran_process_tx_srs_cp_on(void* pHandle, uint8_t ctx_id, uint32_t tti, int32_t start_cc, int32_t num_cc, int32_t start_ant, int32_t num_ant, uint32_t frame_id, + uint32_t subframe_id, uint32_t slot_id, uint32_t sym_id, enum xran_comp_hdr_type compType, enum xran_pkt_dir direction, + uint16_t xran_port_id, PSECTION_DB_TYPE p_sec_db) +{ + struct xran_up_pkt_gen_params *pxp; + struct data_section_hdr *pDataSec; + int32_t antElm_eAxC_id = 0;// = ant_id + p_srs_cfg->eAxC_offset; + + struct xran_srs_config *p_srs_cfg; + + char* ext_buff; + void *mb_base; + char* pStart; + struct xran_ethdi_ctx* eth_ctx = xran_ethdi_get_ctx(); + struct xran_section_info* sectinfo; + struct xran_device_ctx* p_xran_dev_ctx = (struct xran_device_ctx*)pHandle; + p_srs_cfg = &(p_xran_dev_ctx->srs_cfg); + struct rte_mbuf_ext_shared_info* p_share_data; + struct xran_sectioninfo_db* ptr_sect_elm = NULL; + struct rte_mbuf* mb_oran_hdr_ext = NULL; + struct xran_ecpri_hdr* ecpri_hdr = NULL; + uint16_t* __restrict pDst = NULL; + + uint16_t next; + uint16_t ext_buff_len = 0; + uint16_t iq_sample_size_bytes=0; + uint16_t num_sections = 0, total_sections = 0; + uint16_t n_bytes; + uint16_t elm_bytes = 0; + uint16_t section_id; + uint16_t nPktSize=0; + uint16_t cid; + uint16_t vf_id; + const int16_t rte_mempool_objhdr_size = sizeof(struct rte_mempool_objhdr); + uint8_t seq_id = 0; + uint8_t cc_id, ant_id; + uint8_t compMeth; + uint8_t iqWidth; + uint8_t parm_size; + + const uint8_t rte_ether_hdr_size = sizeof(struct rte_ether_hdr); + uint8_t comp_head_upd = 0; + + const uint8_t total_header_size = (RTE_PKTMBUF_HEADROOM + + sizeof(struct xran_ecpri_hdr) + + sizeof(struct radio_app_common_hdr) + + sizeof(struct data_section_hdr)); + + for (cc_id = start_cc; cc_id < (start_cc + num_cc); cc_id++) + { + for (ant_id = start_ant; ant_id < (start_ant + num_ant); ant_id++) + { + antElm_eAxC_id = ant_id + p_srs_cfg->eAxC_offset; + ptr_sect_elm = p_sec_db->p_sectiondb_elm[ctx_id][direction][cc_id][antElm_eAxC_id]; + + if (unlikely(ptr_sect_elm == NULL)){ + printf("ant_id = %d ctx_id = %d,start_ant = %d, num_ant = %d, antElm_eAxC_id = %d\n",ant_id,ctx_id,start_ant,num_ant,antElm_eAxC_id); + rte_panic("ptr_sect_elm == NULL\n"); + return (0); + } + if(0!=ptr_sect_elm->cur_index) + { + num_sections = ptr_sect_elm->cur_index; + /* iterate C-Plane configuration to generate corresponding U-Plane */ + vf_id = xran_map_ecpriPcid_to_vf(p_xran_dev_ctx, direction, cc_id, antElm_eAxC_id);//p_xran_dev_ctx->map2vf[direction][cc_id][antElm_eAxC_id][XRAN_UP_VF]; + mb_base = p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[sym_id].pCtrl; + if (unlikely(mb_base == NULL)) + { + rte_panic("mb == NULL\n"); + } + cid = ((cc_id << p_xran_dev_ctx->eAxc_id_cfg.bit_ccId) & p_xran_dev_ctx->eAxc_id_cfg.mask_ccId) | ((antElm_eAxC_id << p_xran_dev_ctx->eAxc_id_cfg.bit_ruPortId) & p_xran_dev_ctx->eAxc_id_cfg.mask_ruPortId); + cid = rte_cpu_to_be_16(cid); +#pragma loop_count min=1, max=16 + for (next=0; next< num_sections; next++) + { + sectinfo = &ptr_sect_elm->list[next]; + + if (unlikely(sectinfo == NULL)) { + print_err("sectinfo == NULL\n"); + break; + } + if (unlikely(sectinfo->type != XRAN_CP_SECTIONTYPE_1)) + { /* only supports type 1 */ + print_err("Invalid section type in section DB - %d", sectinfo->type); + continue; + } + /* skip, if not scheduled */ + if (unlikely(sym_id < sectinfo->startSymId || sym_id >= sectinfo->startSymId + sectinfo->numSymbol)) + continue; + compMeth = sectinfo->compMeth; + iqWidth = sectinfo->iqWidth; + section_id = sectinfo->id; + + comp_head_upd = ((compMeth != XRAN_COMPMETHOD_NONE) && (compType == XRAN_COMP_HDR_TYPE_DYNAMIC)); + + if(sectinfo->prbElemBegin) + { + seq_id = xran_get_upul_seqid(pHandle, cc_id, antElm_eAxC_id); + iq_sample_size_bytes = 18 + sizeof(struct xran_ecpri_hdr) + + sizeof(struct radio_app_common_hdr); + } + + if (compMeth) + { + iq_sample_size_bytes += sizeof(struct data_section_hdr) ; + + if (comp_head_upd) + { + iq_sample_size_bytes += sizeof(struct data_section_compression_hdr); + } + + iq_sample_size_bytes += sectinfo->numPrbc*(iqWidth*3 + 1); + } + + print_dbg(">>> sym %2d [%d] type%d id %d startPrbc=%d numPrbc=%d startSymId=%d numSymbol=%d\n", sym_id, next, + sectinfo->type, sectinfo->id, sectinfo->startPrbc, + sectinfo->numPrbc, sectinfo->startSymId, sectinfo->numSymbol); + + if(sectinfo->prbElemBegin) + { + p_share_data = &p_xran_dev_ctx->srs_share_data.sh_data[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id]; + p_share_data->free_cb = extbuf_free_callback; + p_share_data->fcb_opaque = NULL; + rte_mbuf_ext_refcnt_set(p_share_data, 1); + + /* Create ethernet + eCPRI + radio app header */ + ext_buff_len = sectinfo->sec_desc[sym_id].iq_buffer_len; + + ext_buff = ((char*)p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData + sectinfo->sec_desc[sym_id].iq_buffer_offset) - total_header_size; + ext_buff_len += (total_header_size + 18); + + if (comp_head_upd) + { + ext_buff -= sizeof(struct data_section_compression_hdr); + ext_buff_len += sizeof(struct data_section_compression_hdr); + } + + mb_oran_hdr_ext = xran_ethdi_mbuf_indir_alloc(); + if (unlikely((mb_oran_hdr_ext) == NULL)) + { + rte_panic("[core %d]Failed rte_pktmbuf_alloc on vf %d\n", rte_lcore_id(), vf_id); + } + +#ifdef ENABLE_DEBUG_COREDUMP + if (unlikely((struct rte_mempool_objhdr*)RTE_PTR_SUB(mb_base, rte_mempool_objhdr_size)->iova == 0)) + { + rte_panic("Failed rte_mem_virt2iova\n"); + } + if (unlikely(((rte_iova_t)(struct rte_mempool_objhdr*)RTE_PTR_SUB(mb_base, rte_mempool_objhdr_size)->iova) == RTE_BAD_IOVA)) + { + rte_panic("Failed rte_mem_virt2iova RTE_BAD_IOVA \n"); + } +#endif + mb_oran_hdr_ext->buf_addr = ext_buff; + mb_oran_hdr_ext->buf_iova = ((struct rte_mempool_objhdr*)RTE_PTR_SUB(mb_base, rte_mempool_objhdr_size))->iova + RTE_PTR_DIFF(ext_buff, mb_base); + mb_oran_hdr_ext->buf_len = ext_buff_len; + mb_oran_hdr_ext->ol_flags |= EXT_ATTACHED_MBUF; + mb_oran_hdr_ext->shinfo = p_share_data; + mb_oran_hdr_ext->data_off = (uint16_t)RTE_MIN((uint16_t)RTE_PKTMBUF_HEADROOM, (uint16_t)mb_oran_hdr_ext->buf_len) - rte_ether_hdr_size; + mb_oran_hdr_ext->data_len = (uint16_t)(mb_oran_hdr_ext->data_len + rte_ether_hdr_size); + mb_oran_hdr_ext->pkt_len = mb_oran_hdr_ext->pkt_len + rte_ether_hdr_size; + mb_oran_hdr_ext->port = eth_ctx->io_cfg.port[vf_id]; + pStart = (char*)((char*)mb_oran_hdr_ext->buf_addr + mb_oran_hdr_ext->data_off); + + /* Fill in the ethernet header. */ + rte_eth_macaddr_get(mb_oran_hdr_ext->port, &((struct rte_ether_hdr*)pStart)->s_addr); /* set source addr */ + ((struct rte_ether_hdr*)pStart)->d_addr = eth_ctx->entities[vf_id][ID_O_RU]; /* set dst addr */ + ((struct rte_ether_hdr*)pStart)->ether_type = ETHER_TYPE_ECPRI_BE; /* ethertype */ + + nPktSize = sizeof(struct rte_ether_hdr) + + sizeof(struct xran_ecpri_hdr) + + sizeof(struct radio_app_common_hdr) ; + + ecpri_hdr = (struct xran_ecpri_hdr*)(pStart + sizeof(struct rte_ether_hdr)); + + ecpri_hdr->cmnhdr.data.data_num_1 = 0x0; + ecpri_hdr->cmnhdr.bits.ecpri_ver = XRAN_ECPRI_VER; + ecpri_hdr->cmnhdr.bits.ecpri_mesg_type = ECPRI_IQ_DATA; + + /* one to one lls-CU to RU only and band sector is the same */ + ecpri_hdr->ecpri_xtc_id = cid; + + /* no transport layer fragmentation supported */ + ecpri_hdr->ecpri_seq_id.data.data_num_1 = 0x8000; + ecpri_hdr->ecpri_seq_id.bits.seq_id = seq_id; + ecpri_hdr->cmnhdr.bits.ecpri_payl_size = sizeof(struct radio_app_common_hdr) + XRAN_ECPRI_HDR_SZ; //xran_get_ecpri_hdr_size();;; + + } /* if(sectinfo->prbElemBegin) */ + + /* Prepare U-Plane section hdr */ + iqWidth = (iqWidth == 0) ? 16 : iqWidth; + switch (compMeth) + { + case XRAN_COMPMETHOD_BLKFLOAT: parm_size = 1; break; + case XRAN_COMPMETHOD_MODULATION: parm_size = 0; break; + default: + parm_size = 0; + } + + n_bytes = (3 * iqWidth + parm_size) * sectinfo->numPrbc; + n_bytes = RTE_MIN(n_bytes, XRAN_MAX_MBUF_LEN); + + /* Ethernet & eCPRI added already */ + nPktSize += sizeof(struct data_section_hdr) + n_bytes; + + if (comp_head_upd) + nPktSize += sizeof(struct data_section_compression_hdr); + + if(likely((ecpri_hdr!=NULL))) + { + ecpri_hdr->cmnhdr.bits.ecpri_payl_size += sizeof(struct data_section_hdr) + n_bytes ; + + if (comp_head_upd) + ecpri_hdr->cmnhdr.bits.ecpri_payl_size += sizeof(struct data_section_compression_hdr); + } + else + { + print_err("ecpri_hdr should not be NULL\n"); + } + + if(sectinfo->prbElemBegin) + { + pDst = (uint16_t*)(pStart + sizeof(struct rte_ether_hdr) + sizeof(struct xran_ecpri_hdr)); + pxp = (struct xran_up_pkt_gen_params *)pDst; + /* radio app header */ + pxp->app_params.data_feature.value = 0x10; + pxp->app_params.data_feature.data_direction = direction; + pxp->app_params.frame_id = frame_id; + pxp->app_params.sf_slot_sym.subframe_id = subframe_id; + pxp->app_params.sf_slot_sym.slot_id = slot_id; + pxp->app_params.sf_slot_sym.symb_id = sym_id; + /* convert to network byte order */ + pxp->app_params.sf_slot_sym.value = rte_cpu_to_be_16(pxp->app_params.sf_slot_sym.value); + pDst += 2; + } + + pDataSec = (struct data_section_hdr *)pDst; + if(pDataSec){ + pDataSec->fields.sect_id = section_id; + pDataSec->fields.num_prbu = (uint8_t)XRAN_CONVERT_NUMPRBC(sectinfo->numPrbc); + pDataSec->fields.start_prbu = (sectinfo->startPrbc & 0x03ff); + pDataSec->fields.sym_inc = 0; + pDataSec->fields.rb = 0; + /* network byte order */ + pDataSec->fields.all_bits = rte_cpu_to_be_32(pDataSec->fields.all_bits); + pDst += 2; + } + else + { + print_err("pDataSec is NULL idx = %u num_sections = %u\n", next, num_sections); + // return 0; + } + + if (comp_head_upd) + { + if(pDst == NULL){ + print_err("pDst == NULL\n"); + return 0; + } + ((struct data_section_compression_hdr *)pDst)->ud_comp_hdr.ud_comp_meth = compMeth; + ((struct data_section_compression_hdr *)pDst)->ud_comp_hdr.ud_iq_width = XRAN_CONVERT_IQWIDTH(iqWidth); + ((struct data_section_compression_hdr *)pDst)->rsrvd = 0; + pDst++; + } + + //Increment by IQ data len + pDst = (uint16_t *)((uint8_t *)pDst + n_bytes) ; + if(mb_oran_hdr_ext){ + rte_pktmbuf_pkt_len(mb_oran_hdr_ext) = nPktSize; + rte_pktmbuf_data_len(mb_oran_hdr_ext) = nPktSize; + } + + if(sectinfo->prbElemEnd) /* Transmit the packet */ + { + if(likely((ecpri_hdr!=NULL))) + ecpri_hdr->cmnhdr.bits.ecpri_payl_size = rte_cpu_to_be_16(ecpri_hdr->cmnhdr.bits.ecpri_payl_size); + else + print_err("ecpri_hdr should not be NULL\n"); + /* if we don't need to do any fragmentation */ + if (likely(p_xran_dev_ctx->fh_init.mtu >= (iq_sample_size_bytes))) + { + p_xran_dev_ctx->send_upmbuf2ring(mb_oran_hdr_ext, ETHER_TYPE_ECPRI, vf_id); + } + else + { + return 0; + } + elm_bytes += nPktSize; + } /* if(prbElemEnd) */ + }/* section loop */ + } /* if ptr_sect_elm->cur_index */ + total_sections += num_sections; + } /* for(cc_id = 0; cc_id < num_CCPorts; cc_id++) */ + } /* for(ant_id = 0; ant_id < num_eAxc; ant_id++) */ + + struct xran_common_counters* pCnt = &p_xran_dev_ctx->fh_counters; + pCnt->tx_counter += total_sections; + pCnt->tx_bytes_counter += elm_bytes; + return 1; +} + + int32_t xran_process_tx_sym(void *arg) { @@ -1349,12 +2034,13 @@ int32_t xran_process_tx_sym(void *arg) uint32_t mlogVar[15]; uint32_t mlogVarCnt = 0; #endif - unsigned long t1 = MLogTick(); + unsigned long t1 = MLogXRANTick(); void *pHandle = NULL; int32_t ant_id = 0; int32_t cc_id = 0; uint8_t num_eAxc = 0; + uint8_t num_eAxc_prach = 0; uint8_t num_eAxAntElm = 0; uint8_t num_CCPorts = 0; uint32_t frame_id = 0; @@ -1362,7 +2048,6 @@ int32_t xran_process_tx_sym(void *arg) uint32_t slot_id = 0; uint32_t sym_id = 0; uint32_t sym_idx = 0; - uint8_t ctx_id; struct xran_device_ctx * p_xran_dev_ctx = (struct xran_device_ctx *) arg; enum xran_in_period inPeriod; @@ -1383,12 +2068,12 @@ int32_t xran_process_tx_sym(void *arg) subframe_id = XranGetSubFrameNum(tti,SLOTNUM_PER_SUBFRAME(interval), SUBFRAMES_PER_SYSTEMFRAME); uint16_t sfnSecStart = xran_getSfnSecStart(); - if (unlikely(inPeriod == XRAN_IN_NEXT_PERIOD)) + if(unlikely(inPeriod == XRAN_IN_NEXT_PERIOD)) { // For DU sfnSecStart = (sfnSecStart + NUM_OF_FRAMES_PER_SECOND) & 0x3ff; } - else if (unlikely(inPeriod == XRAN_IN_PREV_PERIOD)) + else if(unlikely(inPeriod == XRAN_IN_PREV_PERIOD)) { // For RU if (sfnSecStart >= NUM_OF_FRAMES_PER_SECOND) @@ -1405,7 +2090,7 @@ int32_t xran_process_tx_sym(void *arg) frame_id = (frame_id & 0xff); sym_id = XranGetSymNum(sym_idx, XRAN_NUM_OF_SYMBOL_PER_SLOT); - ctx_id = XranGetSlotNum(tti, SLOTS_PER_SYSTEMFRAME(interval)) % XRAN_MAX_SECTIONDB_CTX; + ctx_id = tti % XRAN_MAX_SECTIONDB_CTX; print_dbg("[%d]SFN %d sf %d slot %d\n", tti, frame_id, subframe_id, slot_id); @@ -1423,67 +2108,62 @@ int32_t xran_process_tx_sym(void *arg) MLogAddVariables(mlogVarCnt, mlogVar, MLogTick()); #endif - if(p_xran_dev_ctx->fh_init.io_cfg.id == O_RU && xran_get_ru_category(pHandle) == XRAN_CATEGORY_B) { + if(p_xran_dev_ctx->fh_init.io_cfg.id == O_RU + && xran_get_ru_category(pHandle) == XRAN_CATEGORY_B) + { num_eAxc = xran_get_num_eAxcUl(pHandle); - } else { + } + else + { num_eAxc = xran_get_num_eAxc(pHandle); } + num_eAxc_prach = ((num_eAxc > XRAN_MAX_PRACH_ANT_NUM)? XRAN_MAX_PRACH_ANT_NUM : num_eAxc); num_CCPorts = xran_get_num_cc(pHandle); /* U-Plane */ if(p_xran_dev_ctx->fh_init.io_cfg.id == O_DU && p_xran_dev_ctx->enableCP) { - if(p_xran_dev_ctx->tx_sym_gen_func) { + if(p_xran_dev_ctx->tx_sym_gen_func) + { enum xran_comp_hdr_type compType; - enum xran_pkt_dir direction; - uint32_t prb_num, loc_ret = 1; + uint8_t loc_ret = 1; uint16_t xran_port_id; PSECTION_DB_TYPE p_sec_db = NULL; compType = p_xran_dev_ctx->fh_cfg.ru_conf.xranCompHdrType; - if (p_xran_dev_ctx->fh_init.io_cfg.id == O_DU) { - direction = XRAN_DIR_DL; /* O-DU */ - prb_num = p_xran_dev_ctx->fh_cfg.nDLRBs; - } - else { - direction = XRAN_DIR_UL; /* RU */ - prb_num = p_xran_dev_ctx->fh_cfg.nULRBs; - } - - if (unlikely(p_xran_dev_ctx->xran_port_id > XRAN_PORTS_NUM)) { + if(unlikely(p_xran_dev_ctx->xran_port_id > XRAN_PORTS_NUM)) + { print_err("Invalid Port id - %d", p_xran_dev_ctx->xran_port_id); loc_ret = 0; } - if (unlikely(ctx_id > XRAN_MAX_SECTIONDB_CTX)) { + if(unlikely(ctx_id > XRAN_MAX_SECTIONDB_CTX)) + { print_err("Invalid Context id - %d", ctx_id); loc_ret = 0; } - if (unlikely(direction > XRAN_DIR_MAX)) { - print_err("Invalid direction - %d", direction); - loc_ret = 0; - } - - if (unlikely(num_CCPorts > XRAN_COMPONENT_CARRIERS_MAX)) { + if(unlikely(num_CCPorts > XRAN_COMPONENT_CARRIERS_MAX)) + { print_err("Invalid CC id - %d", num_CCPorts); loc_ret = 0; } - if (unlikely(num_eAxc > (XRAN_MAX_ANTENNA_NR * 2 + XRAN_MAX_ANT_ARRAY_ELM_NR))) { + if(unlikely(num_eAxc > (XRAN_MAX_ANTENNA_NR * 2 + XRAN_MAX_ANT_ARRAY_ELM_NR))) + { print_err("Invalid eAxC id - %d", num_eAxc); loc_ret = 0; } xran_port_id = p_xran_dev_ctx->xran_port_id; - p_sec_db = p_sectiondb[p_xran_dev_ctx->xran_port_id]; + p_sec_db = p_sectiondb[xran_port_id]; - if (loc_ret) - { - retval = p_xran_dev_ctx->tx_sym_gen_func(pHandle, ctx_id, tti, num_CCPorts, num_eAxc, frame_id, subframe_id, slot_id, sym_id, - compType, direction, xran_port_id, p_sec_db); + if (loc_ret) { + p_xran_dev_ctx->tx_sym_gen_func(pHandle, ctx_id, tti, + 0, num_CCPorts, 0, num_eAxc, frame_id, subframe_id, slot_id, sym_id, + compType, XRAN_DIR_DL, xran_port_id, p_sec_db); } else { @@ -1495,45 +2175,244 @@ int32_t xran_process_tx_sym(void *arg) rte_panic("p_xran_dev_ctx->tx_sym_gen_func== NULL\n"); } } - else + else if(p_xran_dev_ctx->fh_init.io_cfg.id == O_RU && p_xran_dev_ctx->enableCP) { - for (ant_id = 0; ant_id < num_eAxc; ant_id++) - { - for (cc_id = 0; cc_id < num_CCPorts; cc_id++) - { - struct xran_srs_config *p_srs_cfg = &(p_xran_dev_ctx->srs_cfg); + if(first_call) { + enum xran_comp_hdr_type compType; + uint16_t xran_port_id; + PSECTION_DB_TYPE p_sec_db = NULL; - if(p_xran_dev_ctx->puschMaskEnable) - { - if((tti % numSlotMu1 == p_xran_dev_ctx->puschMaskSlot)) - ; + if(xran_fs_get_slot_type(PortId, cc_id, tti, XRAN_SLOT_TYPE_UL) == 1 + || xran_fs_get_slot_type(PortId, cc_id, tti, XRAN_SLOT_TYPE_SP) == 1 + || xran_fs_get_slot_type(PortId, cc_id, tti, XRAN_SLOT_TYPE_FDD) == 1){ + + if(xran_fs_get_symbol_type(PortId, cc_id, tti, sym_id) == XRAN_SYMBOL_TYPE_UL + || xran_fs_get_symbol_type(PortId, cc_id, tti, sym_id) == XRAN_SYMBOL_TYPE_FDD){ + + uint8_t loc_ret = 1; + compType = p_xran_dev_ctx->fh_cfg.ru_conf.xranCompHdrType; + if(unlikely(p_xran_dev_ctx->xran_port_id > XRAN_PORTS_NUM)) + { + print_err("Invalid Port id - %d", p_xran_dev_ctx->xran_port_id); + loc_ret = 0; + } + + if(unlikely(ctx_id > XRAN_MAX_SECTIONDB_CTX)) + { + print_err("Invalid Context id - %d", ctx_id); + loc_ret = 0; + } + + if(unlikely(num_CCPorts > XRAN_COMPONENT_CARRIERS_MAX)) + { + print_err("Invalid CC id - %d", num_CCPorts); + loc_ret = 0; + } + + if(unlikely(num_eAxc > (XRAN_MAX_ANTENNA_NR * 2 + XRAN_MAX_ANT_ARRAY_ELM_NR))) + { + print_err("Invalid eAxC id - %d", num_eAxc); + loc_ret = 0; + } + + xran_port_id = p_xran_dev_ctx->xran_port_id; + p_sec_db = p_sectiondb[xran_port_id]; + + if (loc_ret) { + xran_process_tx_sym_cp_on_opt(pHandle, ctx_id, tti, + 0, num_CCPorts, 0, num_eAxc, frame_id, subframe_id, slot_id, sym_id, + compType, XRAN_DIR_UL, xran_port_id, p_sec_db); + } else - retval = xran_process_tx_sym_cp_off(pHandle, ctx_id, tti, cc_id, ant_id, frame_id, subframe_id, slot_id, sym_id, 0); + { + retval = 0; + } } - else - retval = xran_process_tx_sym_cp_off(pHandle, ctx_id, tti, cc_id, ant_id, frame_id, subframe_id, slot_id, sym_id, 0); + } + + if(xran_get_ru_category(pHandle) == XRAN_CATEGORY_B + && p_xran_dev_ctx->enableSrs + && ((p_xran_dev_ctx->srs_cfg.symbMask >> sym_id)&1)) + { + xran_port_id = p_xran_dev_ctx->xran_port_id; + p_sec_db = p_sectiondb[xran_port_id]; + compType = p_xran_dev_ctx->fh_cfg.ru_conf.xranCompHdrType; + struct xran_srs_config *pSrsCfg = &(p_xran_dev_ctx->srs_cfg); + struct xran_prb_map *prb_map; + /* check special frame */ + if(xran_fs_get_slot_type(PortId, cc_id, tti, XRAN_SLOT_TYPE_SP) == 1) + { + if(((tti % p_xran_dev_ctx->fh_cfg.frame_conf.nTddPeriod) == pSrsCfg->slot) + && (p_xran_dev_ctx->ndm_srs_scheduled == 0)) + { - if(p_xran_dev_ctx->enableSrs && (p_srs_cfg->symbMask & (1 << sym_id))) + prb_map = (struct xran_prb_map *)p_xran_dev_ctx->sFHSrsRxPrbMapBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][0].sBufferList.pBuffers->pData; + /* NDM U-Plane is not enabled */ + if(pSrsCfg->ndm_offset == 0) + { + retval = xran_process_tx_srs_cp_on(pHandle, ctx_id, tti, + 0, num_CCPorts, 0, xran_get_num_ant_elm(pHandle), frame_id, subframe_id, slot_id, sym_id, + compType, XRAN_DIR_UL, xran_port_id, p_sec_db); + } + /* NDM U-Plane is enabled, SRS U-Planes will be transmitted after ndm_offset (in slots) */ + else + { + p_xran_dev_ctx->ndm_srs_scheduled = 1; + p_xran_dev_ctx->ndm_srs_tti = tti; + p_xran_dev_ctx->ndm_srs_txtti = (tti + pSrsCfg->ndm_offset)%2000; + p_xran_dev_ctx->ndm_srs_schedperiod = pSrsCfg->slot; + } + } + } + /* check SRS NDM UP has been scheduled in non special slots */ + else if(p_xran_dev_ctx->ndm_srs_scheduled + && p_xran_dev_ctx->ndm_srs_txtti == tti) { - retval = xran_process_tx_srs_cp_off(pHandle, ctx_id, tti, cc_id, ant_id, frame_id, subframe_id, slot_id, sym_id); + prb_map = (struct xran_prb_map *)p_xran_dev_ctx->sFHSrsRxPrbMapBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][0].sBufferList.pBuffers->pData; + xran_port_id = p_xran_dev_ctx->xran_port_id; + p_sec_db = p_sectiondb[xran_port_id]; + int ndm_step; + uint32_t srs_tti, srsFrame, srsSubframe, srsSlot, srs_sym; + uint8_t srsCtx; + if(prb_map && prb_map->nPrbElm) + { + srs_sym = prb_map->prbMap[0].nStartSymb; + + srs_tti = p_xran_dev_ctx->ndm_srs_tti; + num_eAxAntElm = xran_get_num_ant_elm(pHandle); + ndm_step = num_eAxAntElm / pSrsCfg->ndm_txduration; + + srsSlot = XranGetSlotNum(srs_tti, SLOTNUM_PER_SUBFRAME(interval)); + srsSubframe = XranGetSubFrameNum(srs_tti,SLOTNUM_PER_SUBFRAME(interval), SUBFRAMES_PER_SYSTEMFRAME); + srsFrame = XranGetFrameNum(srs_tti,sfnSecStart,SUBFRAMES_PER_SYSTEMFRAME, SLOTNUM_PER_SUBFRAME(interval)); + srsFrame = (srsFrame & 0xff); + srsCtx = srs_tti % XRAN_MAX_SECTIONDB_CTX; + + if(sym_id < pSrsCfg->ndm_txduration) + { + retval = xran_process_tx_srs_cp_on(pHandle, srsCtx, srs_tti, + 0, num_CCPorts, sym_id*ndm_step, ndm_step, srsFrame, srsSubframe, srsSlot, srs_sym, + compType, XRAN_DIR_UL, xran_port_id, p_sec_db); + } + else + { + p_xran_dev_ctx->ndm_srs_scheduled = 0; + p_xran_dev_ctx->ndm_srs_tti = 0; + p_xran_dev_ctx->ndm_srs_txtti = 0; + p_xran_dev_ctx->ndm_srs_schedperiod = 0; + } + } } } } } + else { + if(first_call) { + for (ant_id = 0; ant_id < num_eAxc; ant_id++) + { + for (cc_id = 0; cc_id < num_CCPorts; cc_id++) + { + //struct xran_srs_config *p_srs_cfg = &(p_xran_dev_ctx->srs_cfg); + if(p_xran_dev_ctx->puschMaskEnable) + { + if((tti % numSlotMu1) != p_xran_dev_ctx->puschMaskSlot) + retval = xran_process_tx_sym_cp_off(pHandle, ctx_id, tti, cc_id, ant_id, frame_id, subframe_id, slot_id, sym_id, 0); + } + else + retval = xran_process_tx_sym_cp_off(pHandle, ctx_id, tti, cc_id, ant_id, frame_id, subframe_id, slot_id, sym_id, 0); + + if(p_xran_dev_ctx->enablePrach && (ant_id < num_eAxc_prach) ) + { + retval = xran_process_tx_prach_cp_off(pHandle, ctx_id, tti, cc_id, ant_id, frame_id, subframe_id, slot_id, sym_id); + } + } + } + + if(xran_get_ru_category(pHandle) == XRAN_CATEGORY_B + && p_xran_dev_ctx->enableSrs + && ((p_xran_dev_ctx->srs_cfg.symbMask >> sym_id)&1)) + { + struct xran_srs_config *pSrsCfg = &(p_xran_dev_ctx->srs_cfg); + + for(cc_id = 0; cc_id < num_CCPorts; cc_id++) + { + /* check special frame */ + if((xran_fs_get_slot_type(PortId, cc_id, tti, XRAN_SLOT_TYPE_SP) == 1) + ||(xran_fs_get_slot_type(PortId, cc_id, tti, XRAN_SLOT_TYPE_UL) == 1)) + { + if(((tti % p_xran_dev_ctx->fh_cfg.frame_conf.nTddPeriod) == pSrsCfg->slot) + && (p_xran_dev_ctx->ndm_srs_scheduled == 0)) + { + int elmIdx; + struct xran_prb_map *prb_map; + prb_map = (struct xran_prb_map *)p_xran_dev_ctx->sFHSrsRxPrbMapBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][0].sBufferList.pBuffers->pData; - if(p_xran_dev_ctx->fh_init.io_cfg.id == O_RU && p_xran_dev_ctx->enableSrs && xran_get_ru_category(pHandle) == XRAN_CATEGORY_B) { - num_eAxAntElm = xran_get_num_ant_elm(pHandle); - struct xran_srs_config *p_srs_cfg = &(p_xran_dev_ctx->srs_cfg); - for(num_eAxc = 0; ant_id < num_eAxAntElm; ant_id++) { - for(cc_id = 0; cc_id < num_CCPorts; cc_id++) { - if( p_srs_cfg->symbMask & (1 << sym_id)) { - retval = xran_process_tx_srs_cp_off(pHandle, ctx_id, tti, cc_id, ant_id, frame_id, subframe_id, slot_id, sym_id); + /* if PRB map is present in first antenna, assume SRS might be scheduled. */ + if(prb_map && prb_map->nPrbElm) + { + /* NDM U-Plane is not enabled */ + if(pSrsCfg->ndm_offset == 0) + { + + if (prb_map->nPrbElm > 0) + { + if(sym_id >= prb_map->prbMap[0].nStartSymb + && sym_id < (prb_map->prbMap[0].nStartSymb + prb_map->prbMap[0].numSymb)) + for(ant_id=0; ant_id < xran_get_num_ant_elm(pHandle); ant_id++) + xran_process_tx_srs_cp_off(pHandle, ctx_id, tti, cc_id, ant_id, frame_id, subframe_id, slot_id); + } + + } + /* NDM U-Plane is enabled, SRS U-Planes will be transmitted after ndm_offset (in slots) */ + else + { + p_xran_dev_ctx->ndm_srs_scheduled = 1; + p_xran_dev_ctx->ndm_srs_tti = tti; + p_xran_dev_ctx->ndm_srs_txtti = (tti + pSrsCfg->ndm_offset)%2000; + p_xran_dev_ctx->ndm_srs_schedperiod = pSrsCfg->slot; + } + } + } + } + /* check SRS NDM UP has been scheduled in non special slots */ + /*NDM feature enables the spread of SRS packets + Non delay measurement SRS PDSCH PUSCH delay measure it*/ + else if(p_xran_dev_ctx->ndm_srs_scheduled + && p_xran_dev_ctx->ndm_srs_txtti == tti) + { + int ndm_step; + uint32_t srs_tti, srsFrame, srsSubframe, srsSlot; + uint8_t srsCtx; + + srs_tti = p_xran_dev_ctx->ndm_srs_tti; + num_eAxAntElm = xran_get_num_ant_elm(pHandle); + ndm_step = num_eAxAntElm / pSrsCfg->ndm_txduration; + + srsSlot = XranGetSlotNum(srs_tti, SLOTNUM_PER_SUBFRAME(interval)); + srsSubframe = XranGetSubFrameNum(srs_tti,SLOTNUM_PER_SUBFRAME(interval), SUBFRAMES_PER_SYSTEMFRAME); + srsFrame = XranGetFrameNum(srs_tti,sfnSecStart,SUBFRAMES_PER_SYSTEMFRAME, SLOTNUM_PER_SUBFRAME(interval)); + srsFrame = (srsFrame & 0xff); + srsCtx = srs_tti % XRAN_MAX_SECTIONDB_CTX; + + if(sym_id < pSrsCfg->ndm_txduration) + { + for(ant_id=sym_id*ndm_step; ant_id < (sym_id+1)*ndm_step; ant_id++) + xran_process_tx_srs_cp_off(pHandle, srsCtx, srs_tti, cc_id, ant_id, srsFrame, srsSubframe, srsSlot); + } + else + { + p_xran_dev_ctx->ndm_srs_scheduled = 0; + p_xran_dev_ctx->ndm_srs_tti = 0; + p_xran_dev_ctx->ndm_srs_txtti = 0; + p_xran_dev_ctx->ndm_srs_schedperiod = 0; + } + } } } } } - MLogTask(PID_DISPATCH_TX_SYM, t1, MLogTick()); + MLogXRANTask(PID_DISPATCH_TX_SYM, t1, MLogXRANTick()); return retval; } diff --git a/fhi_lib/lib/src/xran_tx_proc.h b/fhi_lib/lib/src/xran_tx_proc.h index 6bd84e2..a70b564 100644 --- a/fhi_lib/lib/src/xran_tx_proc.h +++ b/fhi_lib/lib/src/xran_tx_proc.h @@ -49,8 +49,10 @@ struct cp_up_tx_desc { void *pHandle; uint8_t ctx_id; uint32_t tti; - int32_t cc_id; - int32_t ant_id; + int32_t start_cc; + int32_t cc_num; + int32_t start_ant; + int32_t ant_num; uint32_t frame_id; uint32_t subframe_id; uint32_t slot_id; @@ -67,18 +69,24 @@ struct cp_up_tx_desc * xran_pkt_gen_desc_alloc(void); int32_t xran_pkt_gen_desc_free(struct cp_up_tx_desc *p_desc); uint16_t xran_getSfnSecStart(void); -int32_t xran_process_tx_sym_cp_on_dispatch(void *pHandle, uint8_t ctx_id, uint32_t tti, int32_t cc_id, int32_t ant_id, uint32_t frame_id, uint32_t subframe_id, +int32_t xran_process_tx_sym_cp_on_dispatch(void *pHandle, uint8_t ctx_id, uint32_t tti, int32_t start_cc, int32_t cc_id, int32_t start_ant, int32_t ant_id, uint32_t frame_id, uint32_t subframe_id, uint32_t slot_id, uint32_t sym_id); -int32_t xran_process_tx_sym_cp_on(void *pHandle, uint8_t ctx_id, uint32_t tti, int32_t cc_id, int32_t ant_id, uint32_t frame_id, uint32_t subframe_id, +int32_t xran_process_tx_sym_cp_on(void *pHandle, uint8_t ctx_id, uint32_t tti, int32_t start_cc, int32_t cc_id, int32_t start_ant, int32_t ant_id, uint32_t frame_id, uint32_t subframe_id, uint32_t slot_id, uint32_t sym_id); -int32_t xran_process_tx_sym_cp_on_dispatch(void *pHandle, uint8_t ctx_id, uint32_t tti, int32_t cc_id, int32_t ant_id, uint32_t frame_id, uint32_t subframe_id, +int32_t xran_process_tx_sym_cp_on_dispatch(void *pHandle, uint8_t ctx_id, uint32_t tti, int32_t start_cc, int32_t cc_id, int32_t start_ant, int32_t ant_id, uint32_t frame_id, uint32_t subframe_id, uint32_t slot_id, uint32_t sym_id); -int32_t xran_process_tx_sym_cp_on_dispatch_opt(void* pHandle, uint8_t ctx_id, uint32_t tti, int32_t num_cc, int32_t num_ant, uint32_t frame_id, +int32_t xran_process_tx_sym_cp_on_dispatch_opt(void* pHandle, uint8_t ctx_id, uint32_t tti, int32_t start_cc, int32_t num_cc, int32_t start_ant, int32_t num_ant, uint32_t frame_id, + uint32_t subframe_id, uint32_t slot_id, uint32_t sym_id, enum xran_comp_hdr_type compType, enum xran_pkt_dir direction, + uint16_t xran_port_id, PSECTION_DB_TYPE p_sec_db); + +int32_t xran_process_tx_sym_cp_on_opt(void* pHandle, uint8_t ctx_id, uint32_t tti, int32_t start_cc, int32_t num_cc, int32_t start_ant, int32_t num_ant, uint32_t frame_id, + uint32_t subframe_id, uint32_t slot_id, uint32_t sym_id, enum xran_comp_hdr_type compType, enum xran_pkt_dir direction, + uint16_t xran_port_id, PSECTION_DB_TYPE p_sec_db); + +int32_t xran_process_tx_sym_cp_on_ring(void* pHandle, uint8_t ctx_id, uint32_t tti, int32_t start_cc, int32_t num_cc, int32_t start_ant, int32_t num_ant, uint32_t frame_id, uint32_t subframe_id, uint32_t slot_id, uint32_t sym_id, enum xran_comp_hdr_type compType, enum xran_pkt_dir direction, uint16_t xran_port_id, PSECTION_DB_TYPE p_sec_db); -int32_t xran_process_tx_sym_cp_on_opt(void* pHandle, uint8_t ctx_id, uint32_t tti, int32_t num_cc, int32_t num_ant, uint32_t frame_id, uint32_t subframe_id, - uint32_t slot_id, uint32_t sym_id, enum xran_comp_hdr_type compType, enum xran_pkt_dir direction, uint16_t xran_port_id, PSECTION_DB_TYPE p_sec_db); extern int rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr* mac_addr); extern PSECTION_DB_TYPE p_sectiondb[XRAN_PORTS_NUM]; diff --git a/fhi_lib/lib/src/xran_up_api.c b/fhi_lib/lib/src/xran_up_api.c index 397853a..fe22a1f 100644 --- a/fhi_lib/lib/src/xran_up_api.c +++ b/fhi_lib/lib/src/xran_up_api.c @@ -35,6 +35,8 @@ #include "xran_mlog_lnx.h" #include "xran_common.h" + +#if 0 /** * @brief Builds eCPRI header in xRAN packet * @@ -88,6 +90,7 @@ static int build_ecpri_hdr(struct rte_mbuf *mbuf, return 0; } +#endif /** * @brief Builds eCPRI header in xRAN packet * @@ -111,12 +114,10 @@ static inline int xran_build_ecpri_hdr_ex(struct rte_mbuf *mbuf, { char *pChar = rte_pktmbuf_mtod(mbuf, char*); struct xran_ecpri_hdr *ecpri_hdr = (struct xran_ecpri_hdr *)(pChar + sizeof(struct rte_ether_hdr)); + uint16_t ecpri_payl_size = payl_size - + sizeof(struct data_section_hdr) + sizeof(struct radio_app_common_hdr) + XRAN_ECPRI_HDR_SZ; //xran_get_ecpri_hdr_size(); - if ((comp_meth != XRAN_COMPMETHOD_NONE)&&(staticEn == XRAN_COMP_HDR_TYPE_DYNAMIC)) - ecpri_payl_size += sizeof(struct data_section_compression_hdr); if (NULL == ecpri_hdr) return 1; @@ -171,23 +172,26 @@ static inline int build_application_layer( * * @param mbuf Initialized rte_mbuf packet * @param sec_hdr Section header structure to be set in mbuf packet + * @param offset Offset to create the section header * @return int 0 on success, non zero on failure */ static inline int build_section_hdr( struct rte_mbuf *mbuf, - const struct data_section_hdr *sec_hdr) + const struct data_section_hdr *sec_hdr, + uint32_t offset) { char *pChar = rte_pktmbuf_mtod(mbuf, char*); - struct data_section_hdr *section_hdr = (struct data_section_hdr *) - (pChar + sizeof(struct rte_ether_hdr) + sizeof (struct xran_ecpri_hdr) + sizeof(struct radio_app_common_hdr)); + struct data_section_hdr *section_hdr = (struct data_section_hdr *)(pChar + offset); if (NULL == section_hdr) return 1; - memcpy(section_hdr, sec_hdr, sizeof(struct data_section_hdr)); + memcpy(section_hdr, &sec_hdr->fields.all_bits, sizeof(struct data_section_hdr)); return 0; } + +#if 0 /** * @brief Function for appending IQ samples data to the mbuf. * @@ -266,6 +270,7 @@ static uint16_t append_iq_samples( return iq_bytes_to_send; } +#endif /** * @brief Builds compression header in xRAN packet @@ -273,16 +278,17 @@ static uint16_t append_iq_samples( * @param mbuf Initialized rte_mbuf packet * @param compression_hdr Section compression header structure * to be set in mbuf packet + * @param offset mbuf data offset to create compression header * @return int 0 on success, non zero on failure */ static inline int build_compression_hdr( struct rte_mbuf *mbuf, - const struct data_section_compression_hdr *compr_hdr) + const struct data_section_compression_hdr *compr_hdr, + uint32_t offset) { char *pChar = rte_pktmbuf_mtod(mbuf, char*); - struct data_section_compression_hdr *compression_hdr = (struct data_section_compression_hdr *) - (pChar + sizeof(struct rte_ether_hdr) + sizeof (struct xran_ecpri_hdr) + sizeof(struct radio_app_common_hdr) - + sizeof(struct data_section_hdr)); + struct data_section_compression_hdr *compression_hdr = + (struct data_section_compression_hdr *)(pChar + offset); if (NULL == compression_hdr) return 1; @@ -292,6 +298,7 @@ static inline int build_compression_hdr( return 0; } +#if 0 /** * @brief Appends compression parameter in xRAN packet * @@ -311,7 +318,7 @@ static int append_comp_param(struct rte_mbuf *mbuf, union compression_params *ud return 0; } - +#endif /** * @brief Function for extracting all IQ samples from xRAN packet * holding a single data section @@ -458,6 +465,7 @@ int32_t xran_extract_iq_samples(struct rte_mbuf *mbuf, * @param iq_data_offset IQ data bytes already sent. * @param alignment Size of IQ data alignment. * @param pkt_gen_params Struct with parameters used for building packet + * @param num_sections Number of data sections to be created * @return int Number of bytes that have been appended to the packet within all appended sections. */ @@ -471,41 +479,73 @@ int32_t xran_prepare_iq_symbol_portion( uint8_t Ant_ID, uint8_t seq_id, enum xran_comp_hdr_type staticEn, - uint32_t do_copy) + uint32_t do_copy, + uint16_t num_sections, + uint16_t section_id_start, + uint16_t iq_offset) { - int offset; + uint32_t offset=0 , ret_val=0; + uint16_t idx , iq_len=0; + const void *iq_data; + uint16_t iq_n_section_size; //All data_section + compression hdrs + iq + + iq_n_section_size = iq_data_num_bytes + num_sections*sizeof(struct data_section_hdr); + + if ((params[0].compr_hdr_param.ud_comp_hdr.ud_comp_meth != XRAN_COMPMETHOD_NONE)&&(staticEn == XRAN_COMP_HDR_TYPE_DYNAMIC)) +{ + iq_n_section_size += num_sections*sizeof(struct data_section_compression_hdr); + } if(xran_build_ecpri_hdr_ex(mbuf, ECPRI_IQ_DATA, - iq_data_num_bytes, + (int)iq_n_section_size, CC_ID, Ant_ID, seq_id, - params->compr_hdr_param.ud_comp_hdr.ud_comp_meth, + params[0].compr_hdr_param.ud_comp_hdr.ud_comp_meth, staticEn)){ print_err("xran_build_ecpri_hdr_ex return 0\n"); return 0; } - if (build_application_layer(mbuf, &(params->app_params)) != 0){ + if (build_application_layer(mbuf, &(params[0].app_params)) != 0){ print_err("build_application_layer return != 0\n"); return 0; } - if (build_section_hdr(mbuf, &(params->sec_hdr)) != 0){ + offset = sizeof(struct rte_ether_hdr) + + sizeof(struct xran_ecpri_hdr) + + sizeof(struct radio_app_common_hdr); + for(idx=0 ; idx < num_sections ; idx++) + { + if (build_section_hdr(mbuf, &(params[idx].sec_hdr),offset) != 0){ print_err("build_section_hdr return != 0\n"); return 0; } - - offset = sizeof(struct rte_ether_hdr) - + sizeof(struct xran_ecpri_hdr) - + sizeof(struct radio_app_common_hdr) - + sizeof(struct data_section_hdr); - if ((params->compr_hdr_param.ud_comp_hdr.ud_comp_meth != XRAN_COMPMETHOD_NONE)&&(staticEn == XRAN_COMP_HDR_TYPE_DYNAMIC)) { - if (build_compression_hdr(mbuf, &(params->compr_hdr_param)) !=0) + offset += sizeof(struct data_section_hdr); + if ((params[idx].compr_hdr_param.ud_comp_hdr.ud_comp_meth != XRAN_COMPMETHOD_NONE)&&(staticEn == XRAN_COMP_HDR_TYPE_DYNAMIC)) { + if (build_compression_hdr(mbuf, &(params[idx].compr_hdr_param),offset) !=0) return 0; + offset += sizeof(struct data_section_compression_hdr); } - return (do_copy ? append_iq_samples_ex(mbuf, offset, iq_data_start, iq_data_num_bytes, iq_buf_byte_order, do_copy) : iq_data_num_bytes); + + /** IQ buffer contains space for data section/compression hdr in case of multiple sections.*/ + iq_data = (const void *)((uint8_t *)iq_data_start + + idx*(sizeof(struct data_section_hdr) + iq_data_num_bytes/num_sections)); + + if ((params[idx].compr_hdr_param.ud_comp_hdr.ud_comp_meth != XRAN_COMPMETHOD_NONE)&&(staticEn == XRAN_COMP_HDR_TYPE_DYNAMIC)) + iq_data = (const void *)((uint8_t *)iq_data + idx*sizeof(struct data_section_compression_hdr)); + + //ret_val = (do_copy ? append_iq_samples_ex(mbuf, offset, iq_data_start, iq_data_num_bytes/num_sections, iq_buf_byte_order, do_copy) : iq_data_num_bytes/num_sections); + ret_val = iq_data_num_bytes/num_sections; + + if(!ret_val) + return ret_val; + + iq_len += ret_val; + offset += ret_val; + } + return iq_len; } diff --git a/fhi_lib/test/common/common.hpp b/fhi_lib/test/common/common.hpp index 1efbd87..2516dba 100644 --- a/fhi_lib/test/common/common.hpp +++ b/fhi_lib/test/common/common.hpp @@ -1,19 +1,6 @@ /******************************************************************************* * - * Copyright (c) 2020 Intel. - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * + * * *******************************************************************************/ @@ -242,6 +229,29 @@ protected: parallelization_factor = factor; } + /*! + \brief Run the given function and return the mean run time and stddev. + \param [in] function Function to benchmark. + \param [in] args Function's arguments. + \return std::pair where the first element is mean and the second one is standard deviation. + */ + template + std::pair run_benchmark(F function, Args ... args) + { + std::vector results((unsigned long) BenchmarkParameters::repetition); + + for(unsigned int outer_loop = 0; outer_loop < BenchmarkParameters::repetition; outer_loop++) { + const auto start_time = __rdtsc(); + for (unsigned int inner_loop = 0; inner_loop < BenchmarkParameters::loop; inner_loop++) { + function(args ...); + } + const auto end_time = __rdtsc(); + results.push_back(end_time - start_time); + } + + return calculate_statistics(results); + }; + /*! \brief Run performance test case for a given function. \param [in] isa Used Instruction Set. @@ -588,29 +598,6 @@ private: const double stddev); }; -/*! - \brief Run the given function and return the mean run time and stddev. - \param [in] function Function to benchmark. - \param [in] args Function's arguments. - \return std::pair where the first element is mean and the second one is standard deviation. -*/ -template -std::pair run_benchmark(F function, Args ... args) -{ - std::vector results((unsigned long) BenchmarkParameters::repetition); - - for(unsigned int outer_loop = 0; outer_loop < BenchmarkParameters::repetition; outer_loop++) { - const auto start_time = __rdtsc(); - for (unsigned int inner_loop = 0; inner_loop < BenchmarkParameters::loop; inner_loop++) { - function(args ...); - } - const auto end_time = __rdtsc(); - results.push_back(end_time - start_time); - } - - return calculate_statistics(results); -}; - /*! \brief Assert elements of two arrays. It calls ASSERT_EQ for each element of the array. \param [in] reference Array with reference values. @@ -618,7 +605,7 @@ std::pair run_benchmark(F function, Args ... args) \param [in] size Size of the array. */ template -void assert_array_eq(const T* reference, const T* actual, const int size) +inline void assert_array_eq(const T* reference, const T* actual, const int size) { for(int index = 0; index < size ; index++) { @@ -635,7 +622,7 @@ void assert_array_eq(const T* reference, const T* actual, const int size) \param [in] precision Precision fo the comparision used by ASSERT_NEAR. */ template -void assert_array_near(const T* reference, const T* actual, const int size, const double precision) +inline void assert_array_near(const T* reference, const T* actual, const int size, const double precision) { for(int index = 0; index < size ; index++) { @@ -645,7 +632,7 @@ void assert_array_near(const T* reference, const T* actual, const int size, cons } template <> -void assert_array_near(const complex_float* reference, const complex_float* actual, const int size, const double precision) +inline void assert_array_near(const complex_float* reference, const complex_float* actual, const int size, const double precision) { for(int index = 0; index < size ; index++) { @@ -664,7 +651,7 @@ void assert_array_near(const complex_float* reference, const comp \param [in] precision Precision for the comparison used by ASSERT_GT. */ template -void assert_avg_greater_complex(const T* reference, const T* actual, const int size, const double precision) +inline void assert_avg_greater_complex(const T* reference, const T* actual, const int size, const double precision) { float mseDB, MSE; double avgMSEDB = 0.0; @@ -714,7 +701,7 @@ void assert_avg_greater_complex(const T* reference, const T* actual, const int s \return Pointer to the allocated memory. */ template -T* aligned_malloc(const int size, const unsigned alignment) +inline T* aligned_malloc(const int size, const unsigned alignment) { #ifdef _BBLIB_DPDK_ return (T*) rte_malloc(NULL, sizeof(T) * size, alignment); @@ -736,7 +723,7 @@ T* aligned_malloc(const int size, const unsigned alignment) \param [in] ptr Pointer to the allocated memory. */ template -void aligned_free(T* ptr) +inline void aligned_free(T* ptr) { #ifdef _BBLIB_DPDK_ rte_free((void*)ptr); @@ -763,7 +750,7 @@ void aligned_free(T* ptr) \return Pointer to the allocated memory with random data. */ template -T* generate_random_numbers(const long size, const unsigned alignment, U& distribution) +inline T* generate_random_numbers(const long size, const unsigned alignment, U& distribution) { auto array = (T*) aligned_malloc(size * sizeof(T), alignment); @@ -788,7 +775,7 @@ T* generate_random_numbers(const long size, const unsigned alignment, U& distrib \return Pointer to the allocated memory with random data. */ template -T* generate_random_data(const long size, const unsigned alignment) +inline T* generate_random_data(const long size, const unsigned alignment) { std::uniform_int_distribution<> random(0, 255); @@ -810,7 +797,7 @@ T* generate_random_data(const long size, const unsigned alignment) \return Pointer to the allocated memory with random data. */ template -T* generate_random_int_numbers(const long size, const unsigned alignment, const T lo_range, +inline T* generate_random_int_numbers(const long size, const unsigned alignment, const T lo_range, const T up_range) { std::uniform_int_distribution random(lo_range, up_range); @@ -833,7 +820,7 @@ T* generate_random_int_numbers(const long size, const unsigned alignment, const \return Pointer to the allocated memory with random data. */ template -T* generate_random_real_numbers(const long size, const unsigned alignment, const T lo_range, +inline T* generate_random_real_numbers(const long size, const unsigned alignment, const T lo_range, const T up_range) { std::uniform_real_distribution distribution(lo_range, up_range); diff --git a/fhi_lib/test/common/json.hpp b/fhi_lib/test/common/json.hpp index ac24e66..321e4ba 100644 --- a/fhi_lib/test/common/json.hpp +++ b/fhi_lib/test/common/json.hpp @@ -7840,9 +7840,9 @@ class basic_json // include at least decoding support for them even without such // support. An example of a small decoder for half-precision // floating-point numbers in the C language is shown in Fig. 3. - const int half = (v.at(current_idx + 1) << 8) + v.at(current_idx + 2); - const int exp = (half >> 10) & 0x1f; - const int mant = half & 0x3ff; + const int int16_t = (v.at(current_idx + 1) << 8) + v.at(current_idx + 2); + const int exp = (int16_t >> 10) & 0x1f; + const int mant = int16_t & 0x3ff; double val; if (exp == 0) { @@ -7858,7 +7858,7 @@ class basic_json ? std::numeric_limits::infinity() : std::numeric_limits::quiet_NaN(); } - return (half & 0x8000) != 0 ? -val : val; + return (int16_t & 0x8000) != 0 ? -val : val; } case 0xfa: // Single-Precision Float (four-byte IEEE 754) diff --git a/fhi_lib/test/common/xran_lib_wrap.hpp b/fhi_lib/test/common/xran_lib_wrap.hpp index 2829ebd..a323f7f 100644 --- a/fhi_lib/test/common/xran_lib_wrap.hpp +++ b/fhi_lib/test/common/xran_lib_wrap.hpp @@ -1,19 +1,6 @@ /******************************************************************************* * - * Copyright (c) 2020 Intel. - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * + * * *******************************************************************************/ @@ -31,6 +18,7 @@ #include "common.hpp" #include "xran_fh_o_du.h" +#include "xran_fh_o_ru.h" #include "xran_common.h" #include "xran_frame_struct.h" @@ -74,6 +62,8 @@ public: XRANFTHTX_SEC_DESC_OUT, XRANFTHRX_IN, XRANFTHRX_PRB_MAP_IN, + XRANCP_PRB_MAP_IN_RX, + XRANCP_PRB_MAP_IN_TX, XRANFTHTX_SEC_DESC_IN, XRANFTHRACH_IN, MAX_SW_XRAN_INTERFACE_NUM @@ -108,6 +98,9 @@ struct xran_io_shared_ctrl { struct xran_io_buf_ctrl sFHSrsRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR]; struct xran_io_buf_ctrl sFHSrsRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR]; + struct xran_io_buf_ctrl sFHCpRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR]; + struct xran_io_buf_ctrl sFHCpTxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR]; + /* buffers lists */ struct xran_flat_buffer sFrontHaulTxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT]; struct xran_flat_buffer sFrontHaulTxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR]; @@ -116,6 +109,9 @@ struct xran_io_shared_ctrl { struct xran_flat_buffer sFHPrachRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT]; struct xran_flat_buffer sFHPrachRxBuffersDecomp[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT]; + struct xran_flat_buffer sFrontHaulCpRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR]; + struct xran_flat_buffer sFrontHaulCpTxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR]; + /* Cat B SRS buffers */ struct xran_flat_buffer sFHSrsRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT]; struct xran_flat_buffer sFHSrsRxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR]; @@ -228,7 +224,7 @@ private: int init_memory(uint32_t o_xu_id) { xran_status_t status; - int32_t i, j, k, z, m; + uint32_t i, j, k, z, m; SWXRANInterfaceTypeEnum eInterfaceType; void *ptr; void *mb; @@ -239,8 +235,8 @@ private: struct bbu_xran_io_if *psBbuIo = (struct bbu_xran_io_if*)&m_gsXranIoIf; struct xran_io_shared_ctrl *psIoCtrl = (struct xran_io_shared_ctrl *)&psBbuIo->ioCtrl[o_xu_id]; - uint32_t xran_max_antenna_nr = RTE_MAX(get_num_eaxc(), get_num_eaxc_ul()); - uint32_t xran_max_ant_array_elm_nr = RTE_MAX(get_num_antelmtrx(), xran_max_antenna_nr); + uint32_t xran_max_antenna_nr = (uint32_t)RTE_MAX((uint32_t)get_num_eaxc(), (uint32_t)get_num_eaxc_ul()); + uint32_t xran_max_ant_array_elm_nr = (uint32_t)RTE_MAX((uint32_t)get_num_antelmtrx(), (uint32_t)xran_max_antenna_nr); std::cout << "XRAN front haul xran_mm_init" << std::endl; @@ -253,7 +249,7 @@ private: /* initialize maximum instances to have flexibility for the tests */ /* initialize maximum supported CC to have flexibility on the test */ - int32_t nSectorNum = 6;//XRAN_MAX_SECTOR_NR; + uint32_t nSectorNum = 6;//XRAN_MAX_SECTOR_NR; k = o_xu_id; psBbuIo->nInstanceNum[k] = nSectorNum; @@ -309,14 +305,6 @@ private: } /* C-plane DL */ - eInterfaceType = XRANFTHTX_SEC_DESC_OUT; - status = xran_bm_init(psBbuIo->nInstanceHandle[o_xu_id][i], - &psBbuIo->nBufPoolIndex[o_xu_id][m_nSectorIndex[i]][eInterfaceType], - XRAN_N_FE_BUF_LEN * xran_max_antenna_nr * XRAN_NUM_OF_SYMBOL_PER_SLOT*XRAN_MAX_SECTIONS_PER_SLOT*XRAN_MAX_FRAGMENT, sizeof(struct xran_section_desc)); - if(XRAN_STATUS_SUCCESS != status) { - std::cout << __LINE__ << " Failed at xran_bm_init, status " << status << std::endl; - return (-1); - } eInterfaceType = XRANFTHTX_PRB_MAP_OUT; status = xran_bm_init(psBbuIo->nInstanceHandle[o_xu_id][i], &psBbuIo->nBufPoolIndex[o_xu_id][m_nSectorIndex[i]][eInterfaceType], @@ -346,24 +334,73 @@ private: } psIoCtrl->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pData = (uint8_t *)ptr; psIoCtrl->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pCtrl = (void *)mb; - void *sd_ptr; - void *sd_mb; - int elm_id; + struct xran_prb_map * p_rb_map = (struct xran_prb_map *)ptr; //memcpy(ptr, &startupConfiguration.PrbMap, sizeof(struct xran_prb_map)); - for (elm_id = 0; elm_id < XRAN_MAX_SECTIONS_PER_SLOT; elm_id++){ - struct xran_prb_elm *pPrbElem = &p_rb_map->prbMap[elm_id]; - for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++){ - for(m = 0; m < XRAN_MAX_FRAGMENT; m++){ - status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[o_xu_id][i], psBbuIo->nBufPoolIndex[o_xu_id][m_nSectorIndex[i]][XRANFTHTX_SEC_DESC_OUT], &sd_ptr, &sd_mb); + } + } + /* C-plane */ + eInterfaceType = XRANCP_PRB_MAP_IN_RX; + status = xran_bm_init(psBbuIo->nInstanceHandle[o_xu_id][i], + &psBbuIo->nBufPoolIndex[o_xu_id][m_nSectorIndex[i]][eInterfaceType], + XRAN_N_FE_BUF_LEN * xran_max_antenna_nr * XRAN_NUM_OF_SYMBOL_PER_SLOT, + sizeof(struct xran_prb_map)); if(XRAN_STATUS_SUCCESS != status){ - std::cout << __LINE__ << "SD Failed at xran_bm_allocate_buffer , status %d\n" << status << std::endl; - return (-1); + rte_panic("Failed at xran_bm_init, status %d\n", status); } - pPrbElem->p_sec_desc[k][m] = (struct xran_section_desc *)sd_ptr; + + for(j = 0;j < XRAN_N_FE_BUF_LEN; j++) { + for(z = 0; z < xran_max_antenna_nr; z++){ + psIoCtrl->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].bValid = 0; + psIoCtrl->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].nSegGenerated = -1; + psIoCtrl->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].nSegToBeGen = -1; + psIoCtrl->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred = 0; + psIoCtrl->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT; + psIoCtrl->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psIoCtrl->sFrontHaulCpRxPrbMapBbuIoBufCtrl[j][i][z]; + + psIoCtrl->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nElementLenInBytes = sizeof(struct xran_prb_map); + psIoCtrl->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nNumberOfElements = 1; + psIoCtrl->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nOffsetInBytes = 0; + status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[o_xu_id][i], psBbuIo->nBufPoolIndex[o_xu_id][m_nSectorIndex[i]][eInterfaceType], &ptr, &mb); + if(XRAN_STATUS_SUCCESS != status) { + rte_panic("Failed at xran_bm_allocate_buffer , status %d\n",status); } + psIoCtrl->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pData = (uint8_t *)ptr; + psIoCtrl->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pCtrl = (void *)mb; + struct xran_prb_map * p_rb_map = (struct xran_prb_map *)ptr; } } + + + /* C-plane Tx */ + eInterfaceType = XRANCP_PRB_MAP_IN_TX; + status = xran_bm_init(psBbuIo->nInstanceHandle[o_xu_id][i], + &psBbuIo->nBufPoolIndex[o_xu_id][m_nSectorIndex[i]][eInterfaceType], + XRAN_N_FE_BUF_LEN * xran_max_antenna_nr * XRAN_NUM_OF_SYMBOL_PER_SLOT, + sizeof(struct xran_prb_map)); + if(XRAN_STATUS_SUCCESS != status) { + rte_panic("Failed at xran_bm_init, status %d\n", status); + } + + for(j = 0;j < XRAN_N_FE_BUF_LEN; j++) { + for(z = 0; z < xran_max_antenna_nr; z++){ + psIoCtrl->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].bValid = 0; + psIoCtrl->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].nSegGenerated = -1; + psIoCtrl->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].nSegToBeGen = -1; + psIoCtrl->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred = 0; + psIoCtrl->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT; + psIoCtrl->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psIoCtrl->sFrontHaulCpTxPrbMapBbuIoBufCtrl[j][i][z]; + + psIoCtrl->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nElementLenInBytes = sizeof(struct xran_prb_map); + psIoCtrl->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nNumberOfElements = 1; + psIoCtrl->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nOffsetInBytes = 0; + status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[o_xu_id][i],psBbuIo->nBufPoolIndex[o_xu_id][m_nSectorIndex[i]][eInterfaceType],&ptr, &mb); + if(XRAN_STATUS_SUCCESS != status) { + rte_panic("Failed at xran_bm_allocate_buffer , status %d\n",status); + } + psIoCtrl->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pData = (uint8_t *)ptr; + psIoCtrl->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pCtrl = (void *)mb; + struct xran_prb_map * p_rb_map = (struct xran_prb_map *)ptr; } } } @@ -407,14 +444,6 @@ private: } } - eInterfaceType = XRANFTHTX_SEC_DESC_IN; - status = xran_bm_init(psBbuIo->nInstanceHandle[o_xu_id][i], - &psBbuIo->nBufPoolIndex[o_xu_id][m_nSectorIndex[i]][eInterfaceType], - XRAN_N_FE_BUF_LEN * xran_max_antenna_nr * XRAN_NUM_OF_SYMBOL_PER_SLOT*XRAN_MAX_SECTIONS_PER_SLOT*XRAN_MAX_FRAGMENT, sizeof(struct xran_section_desc)); - if(XRAN_STATUS_SUCCESS != status) { - std::cout << __LINE__ << " Failed at xran_bm_init, status " << status << std::endl; - return (-1); - } eInterfaceType = XRANFTHRX_PRB_MAP_IN; status = xran_bm_init(psBbuIo->nInstanceHandle[o_xu_id][i], &psBbuIo->nBufPoolIndex[o_xu_id][m_nSectorIndex[i]][eInterfaceType], @@ -444,24 +473,8 @@ private: } psIoCtrl->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pData = (uint8_t *)ptr; psIoCtrl->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pCtrl = (void *)mb; - void *sd_ptr; - void *sd_mb; - int elm_id; struct xran_prb_map * p_rb_map = (struct xran_prb_map *)ptr; //memcpy(ptr, &startupConfiguration.PrbMap, sizeof(struct xran_prb_map)); - for (elm_id = 0; elm_id < XRAN_MAX_SECTIONS_PER_SLOT; elm_id++){ - struct xran_prb_elm *pPrbElem = &p_rb_map->prbMap[elm_id]; - for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++){ - for(m = 0; m < XRAN_MAX_FRAGMENT; m++){ - status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[o_xu_id][i], psBbuIo->nBufPoolIndex[o_xu_id][m_nSectorIndex[i]][XRANFTHTX_SEC_DESC_IN], &sd_ptr, &sd_mb); - if(XRAN_STATUS_SUCCESS != status){ - std::cout << __LINE__ << "SD Failed at xran_bm_allocate_buffer , status %d\n" << status << std::endl; - return (-1); - } - pPrbElem->p_sec_desc[k][m] = (struct xran_section_desc *)sd_ptr; - } - } - } } } } @@ -593,7 +606,7 @@ public: m_xranInit.eAxCId_conf.mask_ruPortId = get_eaxcid_mask(bitnum_ruport, m_xranInit.eAxCId_conf.bit_ruPortId); m_xranInit.totalBfWeights = get_globalcfg(XRAN_UT_KEY_GLOBALCFG_RU, "totalBfWeights"); - m_xranInit.filePrefix = "wls"; + m_xranInit.filePrefix = (char *)"wls"; m_bSub6 = get_globalcfg(XRAN_UT_KEY_GLOBALCFG_RU, "sub6"); @@ -639,7 +652,7 @@ public: std::stringstream slotcfgname; slotcfgname << "slot" << i; std::vector slotcfg = get_globalcfg_array(slotcfg_key, slotcfgname.str()); - for(int j=0; j < slotcfg.size(); j++) { + for(int j=0; j < (int)slotcfg.size(); j++) { m_xranConf.frame_conf.sSlotConfig[i].nSymbolType[j] = slotcfg[j]; } m_xranConf.frame_conf.sSlotConfig[i].reserved[0] = 0; @@ -794,7 +807,7 @@ public: int Init(uint32_t o_xu_id, struct xran_fh_config *pCfg = nullptr) { xran_status_t status; - int32_t nSectorNum; + uint32_t nSectorNum; int32_t i, j, k, z; void *ptr; void *mb; @@ -802,10 +815,11 @@ public: uint16_t *u16dptr; uint8_t *u8dptr; SWXRANInterfaceTypeEnum eInterfaceType; - int32_t cc_id, ant_id, sym_id, tti; + uint32_t cc_id, ant_id, sym_id, tti; int32_t flowId; char *pos = NULL; struct xran_prb_map *pRbMap = NULL; + struct xran_prb_map tmppRbMap; struct bbu_xran_io_if *psBbuIo = (struct bbu_xran_io_if*)&m_gsXranIoIf; struct xran_io_shared_ctrl *psIoCtrl = (struct xran_io_shared_ctrl *)&psBbuIo->ioCtrl[o_xu_id]; @@ -836,7 +850,7 @@ public: iq_bfw_buffer_size_dl = (m_nSlots * N_SYM_PER_SLOT * get_num_antelmtrx() * get_num_dlrbs() * 4L); iq_bfw_buffer_size_ul = (m_nSlots * N_SYM_PER_SLOT * get_num_antelmtrx() * get_num_ulrbs() * 4L); - for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(get_num_cc() * get_num_eaxc()); i++) { + for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (get_num_cc() * get_num_eaxc()); i++) { p_tx_dl_bfw_buffer[i] = (int16_t*)malloc(iq_bfw_buffer_size_dl); tx_dl_bfw_buffer_size[i] = (int32_t)iq_bfw_buffer_size_dl; if(p_tx_dl_bfw_buffer[i] == NULL) @@ -891,12 +905,12 @@ public: int iPrb; char *dl_bfw_pos = ((char*)p_tx_dl_bfw_buffer[flowId]) + tx_dl_bfw_buffer_position[flowId]; struct xran_prb_elm* p_prbMap = NULL; - int num_antelm; + // int num_antelm; pRbMap->prbMap[0].BeamFormingType = XRAN_BEAM_WEIGHT; pRbMap->prbMap[0].bf_weight_update = 1; - num_antelm = get_num_antelmtrx(); + // num_antelm = get_num_antelmtrx(); #if 0 /* populate beam weights to C-plane for each elm */ pRbMap->bf_weight.nAntElmTRx = num_antelm; @@ -909,11 +923,103 @@ public: } #endif } /* else if(get_rucategory() == XRAN_CATEGORY_B) */ + memcpy(&tmppRbMap, pRbMap, sizeof(struct xran_prb_map)); + xran_init_PrbMap_from_cfg(&tmppRbMap, pRbMap, m_xranInit.mtu); } /* if(pRbMap) */ else { std::cout << "DL pRbMap ==NULL" << std::endl; } + if(get_rucategory() == XRAN_CATEGORY_B){ + pRbMap = (struct xran_prb_map *)psIoCtrl->sFHCpRxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData; + if(pRbMap) { + pRbMap->dir = XRAN_DIR_DL; + pRbMap->xran_port = 0; + pRbMap->band_id = 0; + pRbMap->cc_id = cc_id; + pRbMap->ru_port_id = ant_id; + pRbMap->tti_id = tti; + pRbMap->start_sym_id = 0; + + pRbMap->nPrbElm = 1; + pRbMap->prbMap[0].nRBStart = 0; + pRbMap->prbMap[0].nRBSize = get_num_dlrbs(); + pRbMap->prbMap[0].nStartSymb = 0; + pRbMap->prbMap[0].numSymb = 14; + pRbMap->prbMap[0].nBeamIndex = 0; + pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE; + uint32_t idxElm; + int iPrb; + char *dl_bfw_pos = ((char*)p_tx_dl_bfw_buffer[flowId]) + tx_dl_bfw_buffer_position[flowId]; + struct xran_prb_elm* p_prbMap = NULL; + int num_antelm; + + pRbMap->prbMap[0].BeamFormingType = XRAN_BEAM_WEIGHT; + pRbMap->prbMap[0].bf_weight_update = 1; + + num_antelm = get_num_antelmtrx(); +#if 1 + /* populate beam weights to C-plane for each elm */ + // pRbMap->bf_weight.nAntElmTRx = num_antelm; + for(idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++){ + p_prbMap = &pRbMap->prbMap[idxElm]; + for (iPrb = p_prbMap->nRBStart; iPrb < (p_prbMap->nRBStart + p_prbMap->nRBSize); iPrb++) { + /* copy BF W IQs for 1 PRB of */ + p_prbMap->bf_weight.nAntElmTRx = num_antelm; + // memcpy(&p_prbMap->bf_weight.p_ext_section[iPrb][0], (dl_bfw_pos + (iPrb * num_antelm)*4), num_antelm*4); + } + } +#endif + } /* if(pRbMap) */ + else { + std::cout << "Cp DL pRbMap ==NULL" << std::endl; + } + + pRbMap = (struct xran_prb_map *)psIoCtrl->sFHCpTxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData; + if(pRbMap) { + pRbMap->dir = XRAN_DIR_DL; + pRbMap->xran_port = 0; + pRbMap->band_id = 0; + pRbMap->cc_id = cc_id; + pRbMap->ru_port_id = ant_id; + pRbMap->tti_id = tti; + pRbMap->start_sym_id = 0; + + pRbMap->nPrbElm = 1; + pRbMap->prbMap[0].nRBStart = 0; + pRbMap->prbMap[0].nRBSize = get_num_dlrbs(); + pRbMap->prbMap[0].nStartSymb = 0; + pRbMap->prbMap[0].numSymb = 14; + pRbMap->prbMap[0].nBeamIndex = 0; + pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE; + int idxElm; + int iPrb; + char *dl_bfw_pos = ((char*)p_tx_dl_bfw_buffer[flowId]) + tx_dl_bfw_buffer_position[flowId]; + struct xran_prb_elm* p_prbMap = NULL; + // int num_antelm; + + pRbMap->prbMap[0].BeamFormingType = XRAN_BEAM_WEIGHT; + pRbMap->prbMap[0].bf_weight_update = 1; + + // num_antelm = get_num_antelmtrx(); +#if 0 + /* populate beam weights to C-plane for each elm */ + pRbMap->bf_weight.nAntElmTRx = num_antelm; + for(idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++){ + p_prbMap = &pRbMap->prbMap[idxElm]; + for (iPrb = p_prbMap->nRBStart; iPrb < (p_prbMap->nRBStart + p_prbMap->nRBSize); iPrb++) { + /* copy BF W IQs for 1 PRB of */ + memcpy(&pRbMap->bf_weight.weight[iPrb][0], (dl_bfw_pos + (iPrb * num_antelm)*4), num_antelm*4); + } + } +#endif + } /* if(pRbMap) */ + else { + std::cout << "Cp UL pRbMap ==NULL" << std::endl; + } + } + + /* C-plane UL */ pRbMap = (struct xran_prb_map *)psIoCtrl->sFrontHaulRxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData; if(pRbMap) { @@ -944,12 +1050,12 @@ public: int iPrb; char *ul_bfw_pos = ((char*)p_tx_ul_bfw_buffer[flowId]) + tx_ul_bfw_buffer_position[flowId]; struct xran_prb_elm* p_prbMap = NULL; - int num_antelm; + // int num_antelm; pRbMap->prbMap[0].BeamFormingType = XRAN_BEAM_WEIGHT; pRbMap->prbMap[0].bf_weight_update = 1; - num_antelm = get_num_antelmtrx(); + // num_antelm = get_num_antelmtrx(); #if 0 /* populate beam weights to C-plane for each elm */ pRbMap->bf_weight.nAntElmTRx = num_antelm; @@ -962,7 +1068,8 @@ public: } #endif } /* else if(get_rucategory() == XRAN_CATEGORY_B) */ - + memcpy(&tmppRbMap, pRbMap, sizeof(struct xran_prb_map)); + xran_init_PrbMap_from_cfg(&tmppRbMap, pRbMap, m_xranInit.mtu); } /* if(pRbMap) */ else { std::cout << "UL: pRbMap ==NULL" << std::endl; @@ -979,15 +1086,15 @@ public: int i; if(get_rucategory() == XRAN_CATEGORY_B) { - for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(get_num_cc() * get_num_eaxc()); i++) { + for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (get_num_cc() * get_num_eaxc()); i++) { if(p_tx_dl_bfw_buffer[i]) { free(p_tx_dl_bfw_buffer[i]); - p_tx_dl_bfw_buffer[i] == NULL; + p_tx_dl_bfw_buffer[i] = NULL; } if(p_tx_ul_bfw_buffer[i]) { free(p_tx_ul_bfw_buffer[i]); - p_tx_ul_bfw_buffer[i] == NULL; + p_tx_ul_bfw_buffer[i] = NULL; } } } @@ -997,7 +1104,7 @@ public: void Open(uint32_t o_xu_id, xran_ethdi_mbuf_send_fn send_cp, xran_ethdi_mbuf_send_fn send_up, - void *fh_rx_callback, void *fh_rx_prach_callback, void *fh_srs_callback) + void *fh_rx_callback, void *fh_bfw_callback, void *fh_rx_prach_callback, void *fh_srs_callback) { struct xran_fh_config *pXranConf; int32_t nSectorNum; @@ -1018,6 +1125,9 @@ public: struct xran_buffer_list *pFthRxSrsBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_N_FE_BUF_LEN]; struct xran_buffer_list *pFthRxSrsPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_N_FE_BUF_LEN]; + struct xran_buffer_list *pFthRxCpPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_N_FE_BUF_LEN]; + struct xran_buffer_list *pFthTxCpPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_N_FE_BUF_LEN]; + #if 0 xran_reg_physide_cb(xranHandle, physide_dl_tti_call_back, NULL, 10, XRAN_CB_TTI); xran_reg_physide_cb(xranHandle, physide_ul_half_slot_call_back, NULL, 10, XRAN_CB_HALF_SLOT_RX); @@ -1034,6 +1144,8 @@ public: pFthRxPrbMapBuffer[i][z][j] = NULL; pFthRxRachBuffer[i][z][j] = NULL; pFthRxRachBufferDecomp[i][z][j] = NULL; + pFthRxCpPrbMapBuffer[i][z][j] = NULL; + pFthTxCpPrbMapBuffer[i][z][j] = NULL; } for(z = 0; z < /*xran_max_ant_array_elm_nr*/XRAN_MAX_ANT_ARRAY_ELM_NR; z++) { pFthRxSrsBuffer[i][z][j] = NULL; @@ -1051,6 +1163,8 @@ public: pFthRxPrbMapBuffer[i][z][j] = &(psIoCtrl->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList); pFthRxRachBuffer[i][z][j] = &(psIoCtrl->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList); pFthRxRachBufferDecomp[i][z][j] = &(psIoCtrl->sFHPrachRxBbuIoBufCtrlDecomp[j][i][z].sBufferList); + pFthRxCpPrbMapBuffer[i][z][j] = &(psIoCtrl->sFHCpRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList); + pFthTxCpPrbMapBuffer[i][z][j] = &(psIoCtrl->sFHCpTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList); } for(z = 0; z < XRAN_MAX_ANT_ARRAY_ELM_NR /*xran_max_ant_array_elm_nr && xran_max_ant_array_elm_nr*/; z++) { pFthRxSrsBuffer[i][z][j] = &(psIoCtrl->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList); @@ -1065,6 +1179,12 @@ public: pFthTxBuffer[i], pFthTxPrbMapBuffer[i], pFthRxBuffer[i], pFthRxPrbMapBuffer[i], (void (*)(void *, xran_status_t))fh_rx_callback, &pFthRxBuffer[i][0]); + + xran_5g_bfw_config(psBbuIo->nInstanceHandle[o_xu_id][i], + pFthRxCpPrbMapBuffer[i], + pFthTxCpPrbMapBuffer[i], + (void (*)(void *, xran_status_t))fh_bfw_callback, &pFthRxCpPrbMapBuffer[i][0]); + xran_5g_prach_req(psBbuIo->nInstanceHandle[o_xu_id][i], pFthRxRachBuffer[i],pFthRxRachBufferDecomp[i], (void (*)(void *, xran_status_t))fh_rx_prach_callback, &pFthRxRachBuffer[i]); } @@ -1162,7 +1282,7 @@ public: slotcfgname << "slot" << i; std::vector slotcfg = get_globalcfg_array(cfgname, slotcfgname.str()); - for(j=0; j < slotcfg.size(); j++) + for(j=0; j < (int)slotcfg.size(); j++) pCfg->sSlotConfig[i].nSymbolType[j] = slotcfg[j]; pCfg->sSlotConfig[i].reserved[0] = 0; pCfg->sSlotConfig[i].reserved[1] = 0; } @@ -1227,7 +1347,7 @@ public: int get_num_eaxc_ul() { return(m_xranConf.neAxcUl); } int get_num_dlrbs() { return(m_xranConf.nDLRBs); } int get_num_ulrbs() { return(m_xranConf.nULRBs); } - int get_num_antelmtrx() { return(m_xranConf.nAntElmTRx); } + uint32_t get_num_antelmtrx() { return(m_xranConf.nAntElmTRx); } bool is_cpenable() { return(m_xranConf.enableCP); }; bool is_prachenable() { return(m_xranConf.prachEnable); }; diff --git a/fhi_lib/test/common/xranlib_unit_test_main.cc b/fhi_lib/test/common/xranlib_unit_test_main.cc index 991dfc4..8cab03d 100644 --- a/fhi_lib/test/common/xranlib_unit_test_main.cc +++ b/fhi_lib/test/common/xranlib_unit_test_main.cc @@ -1,19 +1,6 @@ /******************************************************************************* * - * Copyright (c) 2020 Intel. - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * + * * *******************************************************************************/ #include @@ -42,9 +29,40 @@ static int parse_input_parameter(std::string executable, std::string option) xranLibWraper *xranlib; +void +ut_version_print(void) +{ + char sysversion[100]; + char *compilation_date = (char *)__DATE__; + char *compilation_time = (char *)__TIME__; + char compiler[100]; + + //snprintf(sysversion, 99, "Version: %s", VERSIONX); + +#if defined(__clang__) + snprintf(compiler, 99, "family clang: %s", __clang_version__); +#elif defined(__ICC) || defined(__INTEL_COMPILER) + snprintf(compiler, 99, "family icc: version %d", __INTEL_COMPILER); +#elif defined(__INTEL_LLVM_COMPILER) + snprintf(compiler, 99, "family icx: version %d", __INTEL_LLVM_COMPILER); +#elif defined(__GNUC__) || defined(__GNUG__) + snprintf(compiler, 99, "family gcc: version %d.%d.%d", __GNUC__, __GNUC_MINOR__,__GNUC_PATCHLEVEL__); +#endif + + printf("\n\n"); + printf("===========================================================================================================\n"); + printf("UNITTESTS VERSION\n"); + printf("===========================================================================================================\n"); + + //printf("%s\n", sysversion); + printf("build-date: %s\n", compilation_date); + printf("build-time: %s\n", compilation_time); + printf("build-with: %s\n", compiler); +} + int main(int argc, char** argv) { int all_test_ret = 0; - + ut_version_print(); /* Enable xml output by default */ ::testing::GTEST_FLAG(output) = "xml:test_results.xml"; @@ -109,7 +127,7 @@ int main(int argc, char** argv) { if(xranlib != nullptr) { delete xranlib; - xranlib == nullptr; + xranlib = nullptr; } return all_test_ret; diff --git a/fhi_lib/test/master.py b/fhi_lib/test/master.py index 8d43186..b5f0d55 100755 --- a/fhi_lib/test/master.py +++ b/fhi_lib/test/master.py @@ -35,7 +35,7 @@ import json from threading import Timer import socket -timeout_sec = 60*3 #3 min max +timeout_sec = 60*5 #5 min max nLteNumRbsPerSymF1 = [ # 5MHz 10MHz 15MHz 20 MHz @@ -68,60 +68,75 @@ vf_addr_o_xu=[] # values for Jenkins server vf_addr_o_xu_jenkins = [ - #vf_addr_o_xu_a vf_addr_o_xu_b vf_addr_o_xu_c - ["0000:19:02.0,0000:19:0a.0", "0000:19:02.1,0000:19:0a.1", "0000:19:02.2,0000:19:0a.2" ], #O-DU - ["0000:af:02.0,0000:af:0a.0", "0000:af:02.1,0000:af:0a.1", "0000:af:02.2,0000:af:0a.2" ], #O-RU + #vf_addr_o_xu_a vf_addr_o_xu_b vf_addr_o_xu_c vf_addr_o_xu_d + ["0000:18:01.0,0000:18:01.1", "0000:18:09.0,0000:18:09.1", "0000:18:11.0,0000:18:11.1", "0000:18:19.0,0000:18:19.1" ], #O-DU + ["0000:af:01.0,0000:af:01.1", "0000:af:09.0,0000:af:09.1", "0000:af:11.0,0000:af:11.1", "0000:af:19.0,0000:af:19.1" ], #O-RU ] vf_addr_o_xu_sc12 = [ # 2x2x25G with loopback FVL0:port0 to FVL1:port 0 FVL0:port1 to FVL1:port 1 #vf_addr_o_xu_a vf_addr_o_xu_b vf_addr_o_xu_c - ["0000:88:02.0,0000:88:0a.0", "0000:88:02.1,0000:88:0a.1", "0000:88:02.2,0000:88:0a.2" ], #O-DU - ["0000:86:02.0,0000:86:0a.0", "0000:86:02.1,0000:86:0a.1", "0000:86:02.2,0000:86:0a.2" ], #O-RU + ["0000:88:02.0,0000:88:0a.0", "0000:88:02.1,0000:88:0a.1", "0000:88:02.2,0000:88:0a.2", "0000:88:02.3,0000:88:0a.3" ], #O-DU + ["0000:86:02.0,0000:86:0a.0", "0000:86:02.1,0000:86:0a.1", "0000:86:02.2,0000:86:0a.2", "0000:86:02.3,0000:86:0a.3" ], #O-RU ] vf_addr_o_xu_sc12_cvl = [ #vf_addr_o_xu_a vf_addr_o_xu_b vf_addr_o_xu_c - ["0000:af:01.0,0000:af:09.0", "0000:af:11.0,0000:af:19.0", "0000:22:01.0,0000:22:09.0" ], #O-DU - ["0000:af:01.0,0000:af:09.0", "0000:af:11.0,0000:af:19.0", "0000:1a:01.0,0000:1a:09.0" ], #O-RU + ["0000:af:01.0,0000:af:09.0", "0000:af:11.0,0000:af:19.0", "0000:1b:01.0,0000:1b:09.0", "0000:1b:11.0,0000:1b:19.0" ], #O-DU + ["0000:af:01.0,0000:af:09.0", "0000:af:11.0,0000:af:19.0", "0000:1a:01.0,0000:1a:09.0", "0000:1a:11.0,0000:1a:19.0" ], #O-RU ] vf_addr_o_xu_scs1_30 = [ - ["0000:65:01.0,0000:65:01.1,0000:65:01.2,0000:65:01.3", "0000:65:01.4,0000:65:01.5,0000:65:01.6,0000:65:01.7", "0000:65:02.0,0000:65:02.1,0000:65:02.2,0000:65:02.3" ], #O-DU - ["0000:65:09.0,0000:65:09.1,0000:65:09.2,0000:65:09.3", "0000:65:09.4,0000:65:09.5,0000:65:09.6,0000:65:09.7", "0000:65:0a.0,0000:65:0a.1,0000:65:0a.2,0000:65:0a.3" ], #O-RU + ["0000:65:01.0,0000:65:01.1,0000:65:01.2,0000:65:01.3", "0000:65:01.4,0000:65:01.5,0000:65:01.6,0000:65:01.7", "0000:65:02.0,0000:65:02.1,0000:65:02.2,0000:65:02.3", "0000:65:02.4,0000:65:02.5,0000:65:02.6,0000:65:02.7" ], #O-DU + ["0000:65:09.0,0000:65:09.1,0000:65:09.2,0000:65:09.3", "0000:65:09.4,0000:65:09.5,0000:65:09.6,0000:65:09.7", "0000:65:0a.0,0000:65:0a.1,0000:65:0a.2,0000:65:0a.3", "0000:65:0a.4,0000:65:0a.5,0000:65:0a.6,0000:65:0a.7" ], #O-RU ] vf_addr_o_xu_scs1_repo = [ - ["0000:18:01.0,0000:18:01.1,0000:18:01.2,0000:18:01.3", "0000:18:01.4,0000:18:01.5,0000:18:01.6,0000:18:01.7", "0000:18:02.0,0000:18:02.1,0000:18:02.2,0000:18:02.3" ], #O-DU - ["0000:18:11.0,0000:18:11.1,0000:18:11.2,0000:18:11.3", "0000:18:11.4,0000:18:11.5,0000:18:11.6,0000:18:11.7", "0000:18:12.0,0000:18:12.1,0000:18:12.2,0000:18:12.3" ], #O-RU + ["0000:18:01.0,0000:18:01.1,0000:18:01.2,0000:18:01.3", "0000:18:01.4,0000:18:01.5,0000:18:01.6,0000:18:01.7", "0000:18:02.0,0000:18:02.1,0000:18:02.2,0000:18:02.3", "0000:18:02.4,0000:18:02.5,0000:18:02.6,0000:18:02.7" ], #O-DU + ["0000:18:11.0,0000:18:11.1,0000:18:11.2,0000:18:11.3", "0000:18:11.4,0000:18:11.5,0000:18:11.6,0000:18:11.7", "0000:18:12.0,0000:18:12.1,0000:18:12.2,0000:18:12.3", "0000:18:12.4,0000:18:12.5,0000:18:12.6,0000:18:12.7" ], #O-RU ] vf_addr_o_xu_icelake_scs1_1 = [ - #vf_addr_o_xu_a vf_addr_o_xu_b vf_addr_o_xu_c - ["0000:51:01.0,0000:51:09.0", "0000:51:11.0,0000:51:19.0", "0000:18:01.0,0000:18:09.0" ], #O-DU - ["0000:17:01.0,0000:17:09.0", "0000:17:11.0,0000:17:19.0", "0000:65:01.0,0000:65:09.0" ], #O-RU + #vf_addr_o_xu_a vf_addr_o_xu_b vf_addr_o_xu_c vf_addr_o_xu_d + ["0000:51:01.0,0000:51:09.0", "0000:51:11.0,0000:51:19.0", "0000:18:01.0,0000:18:09.0", "0000:18:01.1,0000:18:09.1" ], #O-DU + ["0000:17:01.0,0000:17:09.0", "0000:17:11.0,0000:17:19.0", "0000:65:01.0,0000:65:09.0", "0000:65:01.1,0000:65:09.1" ], #O-RU ] vf_addr_o_xu_icx_npg_scs1_coyote4 = [ - #vf_addr_o_xu_a vf_addr_o_xu_b vf_addr_o_xu_c - ["0000:51:01.0,0000:51:09.0", "0000:51:11.0,0000:51:19.0", "0000:54:01.0,0000:54:11.0" ], #O-DU - ["0000:17:01.0,0000:17:09.0", "0000:17:11.0,0000:17:19.0", "0000:65:01.0,0000:65:09.0" ], #O-RU + #vf_addr_o_xu_a vf_addr_o_xu_b vf_addr_o_xu_c vf_addr_o_xu_d + ["0000:51:01.0,0000:51:09.0", "0000:51:11.0,0000:51:19.0", "0000:51:11.1,0000:51:19.1", "0000:51:01.1,0000:51:09.1" ], #O-DU + ["0000:17:01.0,0000:17:09.0", "0000:17:11.0,0000:17:19.0", "0000:17:11.1,0000:17:19.1", "0000:17:01.1,0000:17:09.1" ], #O-RU ] vf_addr_o_xu_scs1_35 = [ - ["0000:88:01.0,0000:88:01.1,0000:88:01.2,0000:88:01.3", "0000:88:01.4,0000:88:01.5,0000:88:01.6,0000:88:01.7", "0000:88:02.0,0000:88:02.1,0000:88:02.2,0000:88:02.3" ], #O-DU - ["0000:88:11.0,0000:88:11.1,0000:88:11.2,0000:88:11.3", "0000:88:11.4,0000:88:11.5,0000:88:11.6,0000:88:11.7", "0000:88:12.0,0000:88:12.1,0000:88:12.2,0000:88:12.3" ], #O-RU + ["0000:86:01.0,0000:86:01.1,0000:86:01.2,0000:86:01.3", "0000:86:01.4,0000:86:01.5,0000:86:01.6,0000:86:01.7", "0000:86:02.0,0000:86:02.1,0000:86:02.2,0000:86:02.3", "0000:86:02.4,0000:86:02.5,0000:86:02.6,0000:86:02.7" ], #O-DU + ["0000:86:11.0,0000:86:11.1,0000:86:11.2,0000:86:11.3", "0000:86:11.4,0000:86:11.5,0000:86:11.6,0000:86:11.7", "0000:86:12.0,0000:86:12.1,0000:86:12.2,0000:86:12.3", "0000:86:12.4,0000:86:12.5,0000:86:12.6,0000:86:12.7" ], #O-RU ] vf_addr_o_xu_csl_npg_scs1_33 = [ #vf_addr_o_xu_a vf_addr_o_xu_b vf_addr_o_xu_c - ["0000:1a:01.0,0000:1a:01.1", "0000:1a:01.2,0000:1a:01.3", "0000:1a:01.4,0000:1a:01.5" ], #O-DU - ["0000:1a:11.0,0000:1a:11.1", "0000:1a:11.2,0000:1a:11.3", "0000:1a:11.4,0000:1a:11.5" ], #O-RU + ["0000:1a:01.0,0000:1a:01.1", "0000:1a:01.2,0000:1a:01.3", "0000:1a:01.4,0000:1a:01.5", "0000:1a:01.6,0000:1a:01.7" ], #O-DU + ["0000:1a:11.0,0000:1a:11.1", "0000:1a:11.2,0000:1a:11.3", "0000:1a:11.4,0000:1a:11.5", "0000:1a:11.6,0000:1a:11.7" ], #O-RU +] + +vf_addr_o_xu_skx_5gnr_sd6 = [ + #vf_addr_o_xu_a vf_addr_o_xu_b vf_addr_o_xu_c vf_addr_o_xu_d + ["0000:af:01.0,0000:af:09.0", "0000:af:11.0,0000:af:19.0", "0000:af:11.1,0000:af:19.1", "0000:af:01.1,0000:af:09.1"], #O-DU + ["0000:18:01.0,0000:18:09.0", "0000:18:11.0,0000:18:19.0", "0000:18:11.1,0000:18:19.1", "0000:18:01.1,0000:18:09.1"], #O-RU ] + # table of all test cases # (ran, cat, mu, bw, test case, "test case description") #Cat A NR_test_cases_A = [(0, 0, 0, 5, 0, "NR_Sub6_Cat_A_5MHz_1_Cell_0"), + (0, 0, 0, 10, 12, "NR_Sub6_Cat_A_10MHz_12_Cell_12"), + (0, 0, 0, 20, 12, "NR_Sub6_Cat_A_20MHz_12_Cell_12"), + (0, 0, 0, 20, 20, "NR_Sub6_Cat_A_20MHz_1_Cell_owd_req_resp"), + (0, 0, 1, 100, 0, "NR_Sub6_Cat_A_100MHz_1_Cell_0"), + (0, 0, 3, 100, 7, "NR_mmWave_Cat_A_100MHz_1_Cell_0_sc"), +] + +NR_test_cases_A_ext = [(0, 0, 0, 5, 0, "NR_Sub6_Cat_A_5MHz_1_Cell_0"), (0, 0, 0, 10, 0, "NR_Sub6_Cat_A_10MHz_1_Cell_0"), (0, 0, 0, 10, 12, "NR_Sub6_Cat_A_10MHz_12_Cell_12"), (0, 0, 0, 20, 0, "NR_Sub6_Cat_A_20MHz_1_Cell_0"), @@ -135,15 +150,48 @@ NR_test_cases_A = [(0, 0, 0, 5, 0, "NR_Sub6_Cat_A_5MHz_1_Cell_0"), (0, 0, 3, 100, 7, "NR_mmWave_Cat_A_100MHz_1_Cell_0_sc"), ] +j_test_cases_A = [(0, 0, 1, 100, 204,"NR_Sub6_Cat_A_100MHz_4_O_RU_2Ant"), + (0, 0, 1, 100, 404,"NR_Sub6_Cat_A_100MHz_4_O_RU_4Ant") +] + +j_test_cases_A_ext = [(0, 0, 1, 100, 201,"NR_Sub6_Cat_A_100MHz_1_O_RU_2Ant"), + (0, 0, 1, 100, 202,"NR_Sub6_Cat_A_100MHz_2_O_RU_2Ant"), + (0, 0, 1, 100, 203,"NR_Sub6_Cat_A_100MHz_3_O_RU_2Ant"), + (0, 0, 1, 100, 204,"NR_Sub6_Cat_A_100MHz_4_O_RU_2Ant"), + (0, 0, 1, 100, 401,"NR_Sub6_Cat_A_100MHz_1_O_RU_4Ant"), + (0, 0, 1, 100, 402,"NR_Sub6_Cat_A_100MHz_2_O_RU_4Ant"), + (0, 0, 1, 100, 403,"NR_Sub6_Cat_A_100MHz_3_O_RU_4Ant"), + (0, 0, 1, 100, 404,"NR_Sub6_Cat_A_100MHz_4_O_RU_4Ant") +] + + LTE_test_cases_A = [(1, 0, 0, 5, 0, "LTE_Cat_A_5Hz_1_Cell_0"), (1, 0, 0, 10, 0, "LTE_Cat_A_10Hz_1_Cell_0"), (1, 0, 0, 20, 0, "LTE_Cat_A_20Hz_1_Cell_0"), ] +DSS_test_cases_A = [(2, 0, 0, 20, 10, "DSS_Cat_A_20MHz_FDD_1_Cell"), + (2, 0, 0, 20, 11, "DSS_Cat_A_20MHz_TDD_1_Cell"), + (2, 0, 0, 20, 60, "DSS_Cat_A_20MHz_FDD_6_Cell"), + (2, 0, 0, 20, 61, "DSS_Cat_A_20MHz_TDD_6_Cell"), + (2, 0, 0, 10, 10, "DSS_Cat_A_10MHz_FDD_1_Cell"), + (2, 0, 0, 10, 11, "DSS_Cat_A_10MHz_TDD_1_Cell"), + (2, 0, 0, 10, 60, "DSS_Cat_A_10MHz_FDD_6_Cell"), + (2, 0, 0, 10, 61, "DSS_Cat_A_10MHz_TDD_6_Cell"), + (2, 0, 0, 5, 10, "DSS_Cat_A_5MHz_FDD_1_Cell"), + (2, 0, 0, 5, 11, "DSS_Cat_A_5MHz_TDD_1_Cell"), + (2, 0, 0, 5, 60, "DSS_Cat_A_5MHz_FDD_6_Cell"), + (2, 0, 0, 5, 61, "DSS_Cat_A_5MHz_TDD_6_Cell"), +] + #Cat B NR_test_cases_B = [(0, 1, 1, 100, 0, "NR_Sub6_Cat_B_100MHz_1_Cell_0"), - (0, 1, 1, 100, 2, "NR_Sub6_Cat_B_100MHz_1_Cell_2"), + (0, 1, 1, 100, 216, "NR_Sub6_Cat_B_100MHz_1_Cell_216"), +] + +NR_test_cases_B_ext = [(0, 1, 1, 100, 0, "NR_Sub6_Cat_B_100MHz_1_Cell_0"), (0, 1, 1, 100, 1, "NR_Sub6_Cat_B_100MHz_1_Cell_1"), + (0, 1, 1, 100, 2, "NR_Sub6_Cat_B_100MHz_1_Cell_1_ext1"), (0, 1, 1, 100, 101, "NR_Sub6_Cat_B_100MHz_1_Cell_101"), (0, 1, 1, 100, 102, "NR_Sub6_Cat_B_100MHz_1_Cell_102"), (0, 1, 1, 100, 103, "NR_Sub6_Cat_B_100MHz_1_Cell_103"), @@ -165,10 +213,12 @@ NR_test_cases_B = [(0, 1, 1, 100, 0, "NR_Sub6_Cat_B_100MHz_1_Cell_0"), (0, 1, 1, 100, 214, "NR_Sub6_Cat_B_100MHz_1_Cell_214"), (0, 1, 1, 100, 215, "NR_Sub6_Cat_B_100MHz_1_Cell_215"), (0, 1, 1, 100, 216, "NR_Sub6_Cat_B_100MHz_1_Cell_216"), - #(0, 1, 1, 100, 401, "NR_Sub6_Cat_B_100MHz_1_Cell_401") 25G not enough ] -LTE_test_cases_B = [(1, 1, 0, 5, 0, "LTE_Cat_B_5MHz_1_Cell_0"), +LTE_test_cases_B = [(1, 1, 0, 20, 0, "LTE_Cat_B_20MHz_1_Cell_0"), +] + +LTE_test_cases_B_ext = [(1, 1, 0, 5, 0, "LTE_Cat_B_5MHz_1_Cell_0"), (1, 1, 0, 10, 0, "LTE_Cat_B_10MHz_1_Cell_0"), (1, 1, 0, 20, 0, "LTE_Cat_B_20MHz_1_Cell_0"), (1, 1, 0, 5, 1, "LTE_Cat_B_5Hz_1_Cell_0_sc"), @@ -177,7 +227,13 @@ LTE_test_cases_B = [(1, 1, 0, 5, 0, "LTE_Cat_B_5MHz_1_Cell_0"), ] + V_test_cases_B = [ + # (0, 1, 1, 100, 301, "NR_Sub6_Cat_B_100MHz_1_Cell_301"), + (0, 1, 1, 100, 602, "NR_Sub6_Cat_B_100MHz_1_Cell_602_sc"), +] + +V_test_cases_B_ext = [ (0, 1, 1, 100, 301, "NR_Sub6_Cat_B_100MHz_1_Cell_301"), (0, 1, 1, 100, 302, "NR_Sub6_Cat_B_100MHz_1_Cell_302"), (0, 1, 1, 100, 303, "NR_Sub6_Cat_B_100MHz_1_Cell_303"), @@ -187,7 +243,14 @@ V_test_cases_B = [ (0, 1, 1, 100, 602, "NR_Sub6_Cat_B_100MHz_1_Cell_602_sc"), ] + V_test_cases_B_2xUL = [ + # (0, 1, 1, 100, 311, "NR_Sub6_Cat_B_100MHz_1_Cell_311"), + (0, 1, 1, 100, 612, "NR_Sub6_Cat_B_100MHz_1_Cell_612_sc"), + +] + +V_test_cases_B_2xUL_ext = [ (0, 1, 1, 100, 311, "NR_Sub6_Cat_B_100MHz_1_Cell_311"), (0, 1, 1, 100, 312, "NR_Sub6_Cat_B_100MHz_1_Cell_312"), (0, 1, 1, 100, 313, "NR_Sub6_Cat_B_100MHz_1_Cell_313"), @@ -228,11 +291,36 @@ V_test_cases_B_3Cells_mtu_1500 = [ (0, 1, 1, 100, 3511, "NR_Sub6_Cat_B_100MHz_1_Cell_3511") ] -all_test_cases = NR_test_cases_A + LTE_test_cases_A + LTE_test_cases_B + NR_test_cases_B + V_test_cases_B + V_test_cases_B_2xUL + +J_test_cases_B_4Cells = [ + (0, 1, 1, 100, 1421, "NR_Sub6_Cat_B_100MHz_1_Cell_DL4UL2"), + (0, 1, 1, 100, 4424, "NR_Sub6_Cat_B_100MHz_4_Cell_DL4UL2") +] + +J_test_cases_B_4Cells_ext = [ + (0, 1, 1, 100, 1421, "NR_Sub6_Cat_B_100MHz_1_Cell_DL4UL2"), + (0, 1, 1, 100, 2422, "NR_Sub6_Cat_B_100MHz_2_Cell_DL4UL2"), + (0, 1, 1, 100, 3423, "NR_Sub6_Cat_B_100MHz_3_Cell_DL4UL2"), + (0, 1, 1, 100, 4424, "NR_Sub6_Cat_B_100MHz_4_Cell_DL4UL2") +] + +Ext1_test_cases_B_4Cells = [ + (0, 1, 1, 100, 142, "NR_Sub6_Cat_B_100MHz_ext1_1_Cell_DL4UL2"), + (0, 1, 1, 100, 242, "NR_Sub6_Cat_B_100MHz_ext1_2_Cell_DL4UL2"), + (0, 1, 1, 100, 342, "NR_Sub6_Cat_B_100MHz_ext1_3_Cell_DL4UL2"), + (0, 1, 1, 100, 442, "NR_Sub6_Cat_B_100MHz_ext1_4_Cell_DL4UL2") +] + +all_test_cases = [] + +#reduced duration test cycle +all_test_cases_short = NR_test_cases_A + LTE_test_cases_A + j_test_cases_A + LTE_test_cases_B + NR_test_cases_B + V_test_cases_B + V_test_cases_B_2xUL + J_test_cases_B_4Cells + +all_test_cases_long = NR_test_cases_A_ext + LTE_test_cases_A + j_test_cases_A_ext + DSS_test_cases_A + LTE_test_cases_B_ext + NR_test_cases_B_ext + V_test_cases_B_ext + V_test_cases_B_2xUL_ext + J_test_cases_B_4Cells_ext + Ext1_test_cases_B_4Cells dic_dir = dict({0:'DL', 1:'UL'}) dic_xu = dict({0:'o-du', 1:'o-ru'}) -dic_ran_tech = dict({0:'5g_nr', 1:'lte'}) +dic_ran_tech = dict({0:'5g_nr', 1:'lte', 2:'dss'}) def init_logger(console_level, logfile_level): """Initializes console and logfile logger with given logging levels""" @@ -254,8 +342,8 @@ def parse_args(args): # Parser configuration parser = argparse.ArgumentParser(description="Run test cases: category numerology bandwidth test_num") - parser.add_argument("--rem_o_ru_host", type=str, default="", help="remot host to run O-RU", metavar="root@10.10.10.1", dest="rem_o_ru_host") - parser.add_argument("--ran", type=int, default=0, help="Radio Access Tehcnology 0 (5G NR) or 1 (LTE)", metavar="ran", dest="rantech") + parser.add_argument("--rem_o_ru_host", type=str, default="", help="remote host to run O-RU", metavar="root@10.10.10.1", dest="rem_o_ru_host") + parser.add_argument("--ran", type=int, default=0, help="Radio Access Technology 0 (5G NR) , 1 (LTE) or 2 DSS (5G NR and LTE)", metavar="ran", dest="rantech") parser.add_argument("--cat", type=int, default=0, help="Category: 0 (A) or 1 (B)", metavar="cat", dest="category") parser.add_argument("--mu", type=int, default=0, help="numerology [0,1,3]", metavar="num", dest="numerology") parser.add_argument("--bw", type=int, default=20, help="bandwidth [5,10,20,100]", metavar="bw", dest="bandwidth") @@ -298,7 +386,7 @@ def get_re_map(nRB, direction): #print(PrbElemContent,"RBStart: ", xRBStart, "RBSize: ",xRBSize, list(range(xRBStart, xRBStart + xRBSize))) prb_map = prb_map + list(range(xRBStart*12, xRBStart*12 + xRBSize*12)) else: - nPrbElm = 0; + nPrbElm = 0 elif direction == 1: #UL @@ -319,7 +407,7 @@ def get_re_map(nRB, direction): elif direction == 2: #UL if 'nPrbElemSrs' in globals(): - nPrbElm = nPrbElemUl + nPrbElm = nPrbElemSrs for i in range(0, nPrbElm): elm = str('PrbElemSrs'+str(i)) #print(elm) @@ -337,6 +425,30 @@ def get_re_map(nRB, direction): return prb_map +def get_bfw_map(direction): + bfw_map = [] + bfwElemContent = [] + if direction == 0: + #DL + if 'nPrbElemDl' in globals(): + nPrbElm = nPrbElemDl + numsetBFW_total = 0 + for i in range(0, nPrbElm): + elm = str('ExtBfwDl'+str(i)) + #print(elm) + if elm in globals(): + bfwElemContent.insert(i,list(globals()[elm])) + numBundPrb = bfwElemContent[i][0] + numsetBFW = bfwElemContent[i][1] + bfw_map = bfw_map + list(range(antElmTRx*numsetBFW_total, antElmTRx*numsetBFW_total + numsetBFW*antElmTRx)) + numsetBFW_total += numsetBFW + else: + nPrbElm = 0 + if nPrbElm == 0 : + bfw_map = list(range(0, (nPrbElm-1)*numsetBFW*antElmTRx)) + + return bfw_map, numsetBFW_total + def check_for_string_present_in_file(file_name, search_string): res = 1 with open(file_name, 'r') as read_obj: @@ -362,7 +474,15 @@ def check_owdm_test_results(xran_path, o_xu_id): def compare_results(o_xu_id, rantech, cat, mu, bw, tcase, xran_path, test_cfg, direction): res = 0 re_map = [] - if rantech==1: + if rantech==2: + if mu == 0: + nDlRB = nLteNumRbsPerSymF1[mu][nRChBwOptions.get(str(nDLBandwidth))] + nUlRB = nLteNumRbsPerSymF1[mu][nRChBwOptions.get(str(nULBandwidth))] + else: + print("Incorrect arguments\n") + res = -1 + return res + elif rantech==1: if mu == 0: nDlRB = nLteNumRbsPerSymF1[mu][nRChBwOptions.get(str(nDLBandwidth))] nUlRB = nLteNumRbsPerSymF1[mu][nRChBwOptions.get(str(nULBandwidth))] @@ -388,20 +508,25 @@ def compare_results(o_xu_id, rantech, cat, mu, bw, tcase, xran_path, test_cfg, d else: comp = 0 - if 'srsEanble' in globals(): - srs_enb = srsEanble + if 'srsEnable' in globals(): + srs_enb = srsEnable else: srs_enb = 0 - if 'rachEanble' in globals(): - rach = rachEanble + if 'rachEnable' in globals(): + rach = rachEnable else: rach = 0 + if 'extType' in globals(): + ext_type = extType + else: + ext_type = 0 + print("O-RU {} compare results: {} [compression {}]\n".format(o_xu_id, dic_dir.get(direction), comp)) #if cat == 1: - # print("WARNING: Skip checking IQs and BF Weights for CAT B for now\n"); + # print("WARNING: Skip checking IQs and BF Weights for CAT B for now\n") # return res #get slot config @@ -492,8 +617,8 @@ def compare_results(o_xu_id, rantech, cat, mu, bw, tcase, xran_path, test_cfg, d print(len(tst)) print(len(ref)) - file_tst.close(); - file_ref.close(); + file_tst.close() + file_ref.close() print(numSlots) @@ -614,8 +739,8 @@ def compare_results(o_xu_id, rantech, cat, mu, bw, tcase, xran_path, test_cfg, d print(len(tst)) print(len(ref)) - file_tst.close(); - file_ref.close(); + file_tst.close() + file_ref.close() print(numSlots) @@ -673,6 +798,222 @@ def compare_results(o_xu_id, rantech, cat, mu, bw, tcase, xran_path, test_cfg, d except GetOutOfLoops: return res + if ((cat == 1) and (direction == 0) and (ext_type == 1)): #Cat B, DL and Extension type = 1 + try: + if (direction == 0) & (cat == 1): #DL + flowId = ccNum*antNum + if direction == 0: + bfw_map, numsetBFW_total = get_bfw_map(direction) + else: + raise Exception('Direction is not supported %d'.format(direction)) + + for i in range(0, flowId): + #read ref and test files + tst = [] + ref = [] + if direction == 0: + # DL + file_tst = xran_path+"/app/logs/"+"o-ru"+str(o_xu_id)+"-dl_bfw_log_ue"+str(i)+".txt" + file_ref = xran_path+"/app/logs/"+"o-du"+str(o_xu_id)+"-dl_bfw_ue"+str(i)+".txt" + else: + raise Exception('Direction is not supported %d'.format(direction)) + + print("test result :", file_tst) + print("test reference:", file_ref) + if os.path.exists(file_tst): + try: + file_tst = open(file_tst, 'r') + except OSError: + print ("Could not open/read file:", file_tst) + sys.exit() + else: + print(file_tst, "doesn't exist") + res = -1 + return res + if os.path.exists(file_ref): + try: + file_ref = open(file_ref, 'r') + except OSError: + print ("Could not open/read file:", file_ref) + sys.exit() + else: + print(file_tst, "doesn't exist") + res = -1 + return res + + tst = file_tst.readlines() + ref = file_ref.readlines() + + print(len(tst)) + print(len(ref)) + + file_tst.close() + file_ref.close() + + print(numSlots) + + for slot_idx in range(0, numSlots): + skip_tti = 1 + if nFrameDuplexType==1: + #skip tti if UL slot + if direction == 0: + #DL + for sym_idx in range(0,14): + sym_dir = SlotConfig[slot_idx%nTddPeriod][sym_idx] + if(sym_dir == 0): + skip_tti = 0 + break + if(skip_tti == 1): + continue + for line_idx in bfw_map: + offset = slot_idx * (nDlRB*antElmTRx) #(slot_idx*numsetBFW_total*antElmTRx) + line_idx + try: + line_tst = tst[offset].rstrip() + except IndexError: + res = -1 + print("FAIL:","IndexError on tst: ant:[",i,"]:",offset, slot_idx, line_idx, len(tst)) + raise GetOutOfLoops + try: + line_ref = ref[offset].rstrip() + except IndexError: + res = -1 + print("FAIL:","IndexError on ref: ant:[",i,"]:",offset, slot_idx, line_idx, len(ref)) + raise GetOutOfLoops + + if comp == 1: + # discard LSB bits as BFP compression is not "bit exact" + tst_i_value = int(line_tst.split(" ")[0]) & 0xFF80 + tst_q_value = int(line_tst.split(" ")[1]) & 0xFF80 + ref_i_value = int(line_ref.split(" ")[0]) & 0xFF80 + ref_q_value = int(line_ref.split(" ")[1]) & 0xFF80 + + tst_i_act = int(line_tst.split(" ")[0]) + tst_q_act = int(line_tst.split(" ")[1]) + ref_i_act = int(line_ref.split(" ")[0]) + ref_q_act = int(line_ref.split(" ")[1]) + + #print("check:","ant:[",i,"]:",offset, slot_idx, sym_idx, line_idx,":","tst: ", tst_i_value, " ", tst_q_value, " " , "ref: ", ref_i_value, " ", ref_q_value, " ") + if (tst_i_value != ref_i_value) or (tst_q_value != ref_q_value) : + print("868 Actual:","bfw:[",i,"]:",offset, slot_idx, line_idx,":","tst: ", tst_i_act, " ", tst_q_act, " " , "ref: ", ref_i_act, " ", ref_q_act, " ") + print("FAIL:","bfw:[",i,"]:",offset, slot_idx, line_idx,":","tst: ", tst_i_value, " ", tst_q_value, " " , "ref: ", ref_i_value, " ", ref_q_value, " ") + res = -1 + raise GetOutOfLoops + else: + #if line_idx == 0: + #print("Check:", offset,"[",i,"]", slot_idx, sym_idx,":",line_tst, line_ref) + if line_ref != line_tst: + print("876 Actual:","bfw:[",i,"]:",offset, slot_idx, line_idx,":","tst: ", tst_i_act, " ", tst_q_act, " " , "ref: ", ref_i_act, " ", ref_q_act, " ") + print("FAIL:","bfw:[",i,"]:",offset, slot_idx, line_idx,":","tst:", line_tst, "ref:", line_ref) + res = -1 + raise GetOutOfLoops + except GetOutOfLoops: + res = 0 # Not treating it as a test case fail criteria for now + # return res + + try: + if (direction == 0) & (cat == 1): #DL + flowId = ccNum*antNumUL + if direction == 0: + bfw_map, numsetBFW_total = get_bfw_map(direction) + else: + raise Exception('Direction is not supported %d'.format(direction)) + + for i in range(0, flowId): + #read ref and test files + tst = [] + ref = [] + if direction == 0: + # DL + file_tst = xran_path+"/app/logs/"+"o-ru"+str(o_xu_id)+"-ul_bfw_log_ue"+str(i)+".txt" + file_ref = xran_path+"/app/logs/"+"o-du"+str(o_xu_id)+"-ul_bfw_ue"+str(i)+".txt" + else: + raise Exception('Direction is not supported %d'.format(direction)) + + print("test result :", file_tst) + print("test reference:", file_ref) + if os.path.exists(file_tst): + try: + file_tst = open(file_tst, 'r') + except OSError: + print ("Could not open/read file:", file_tst) + sys.exit() + else: + print(file_tst, "doesn't exist") + res = -1 + return res + if os.path.exists(file_ref): + try: + file_ref = open(file_ref, 'r') + except OSError: + print ("Could not open/read file:", file_ref) + sys.exit() + else: + print(file_tst, "doesn't exist") + res = -1 + return res + + tst = file_tst.readlines() + ref = file_ref.readlines() + + print(len(tst)) + print(len(ref)) + + file_tst.close() + file_ref.close() + + print(numSlots) + + for slot_idx in range(0, numSlots): + skip_tti = 1 + if nFrameDuplexType==1: + #skip tti if UL slot + if direction == 0: + #DL + for sym_idx in range(0,14): + sym_dir = SlotConfig[slot_idx%nTddPeriod][sym_idx] + if(sym_dir == 1): + skip_tti = 0 + break + if(skip_tti == 1): + continue + for line_idx in bfw_map: + offset = slot_idx * (nUlRB*antElmTRx) #(slot_idx*numsetBFW_total*antElmTRx) + line_idx + try: + line_tst = tst[offset].rstrip() + except IndexError: + res = -1 + print("FAIL:","IndexError on tst: ant:[",i,"]:",offset, slot_idx, line_idx, len(tst)) + raise GetOutOfLoops + try: + line_ref = ref[offset].rstrip() + except IndexError: + res = -1 + print("FAIL:","IndexError on ref: ant:[",i,"]:",offset, slot_idx, line_idx, len(ref)) + raise GetOutOfLoops + + if comp == 1: + # discard LSB bits as BFP compression is not "bit exact" + tst_i_value = int(line_tst.split(" ")[0]) & 0xFF80 + tst_q_value = int(line_tst.split(" ")[1]) & 0xFF80 + ref_i_value = int(line_ref.split(" ")[0]) & 0xFF80 + ref_q_value = int(line_ref.split(" ")[1]) & 0xFF80 + + #print("check:","ant:[",i,"]:",offset, slot_idx, sym_idx, line_idx,":","tst: ", tst_i_value, " ", tst_q_value, " " , "ref: ", ref_i_value, " ", ref_q_value, " ") + if (tst_i_value != ref_i_value) or (tst_q_value != ref_q_value) : + print("FAIL:","bfw:[",i,"]:",offset, slot_idx, line_idx,":","tst: ", tst_i_value, " ", tst_q_value, " " , "ref: ", ref_i_value, " ", ref_q_value, " ") + res = -1 + raise GetOutOfLoops + else: + #if line_idx == 0: + #print("Check:", offset,"[",i,"]", slot_idx, sym_idx,":",line_tst, line_ref) + if line_ref != line_tst: + print("FAIL:","bfw:[",i,"]:",offset, slot_idx, line_idx,":","tst:", line_tst, "ref:", line_ref) + res = -1 + raise GetOutOfLoops + except GetOutOfLoops: + res = 0 # Not treating it as a test case fail criteria for now + # return res + if (direction == 0) | (cat == 0) | (srs_enb == 0): #DL or Cat A #done return res @@ -680,7 +1021,20 @@ def compare_results(o_xu_id, rantech, cat, mu, bw, tcase, xran_path, test_cfg, d print("O-RU {} compare results: {} [compression {}]\n".format(o_xu_id, 'SRS', comp)) #srs - symbMask = srsSym + PrbElemContent = [] + if 'nPrbElemSrs' in globals(): + for i in range(0, nPrbElemSrs): + elm = str('PrbElemSrs'+str(i)) + #print(elm) + if (elm in globals()): + PrbElemContent.insert(i,list(globals()[elm])) + symbMask = 1 << PrbElemContent[i][2] # start symbol + print(symbMask) + #print(PrbElemContent,"RBStart: ", xRBStart, "RBSize: ",xRBSize, list(range(xRBStart, xRBStart + xRBSize))) + else: + print("Cannot find SRS PRB map!") + symbMask = 0 + re_map = get_re_map(nUlRB, 2) try: flowId = ccNum*antElmTRx @@ -726,14 +1080,14 @@ def compare_results(o_xu_id, rantech, cat, mu, bw, tcase, xran_path, test_cfg, d print(len(tst)) print(len(ref)) - file_tst.close(); - file_ref.close(); + file_tst.close() + file_ref.close() print(numSlots) for slot_idx in range(0, numSlots - (1*direction)): for sym_idx in range(0, 14): - if symbMask & (1 << sym_idx) and slot_idx%nTddPeriod == 3: + if symbMask & (1 << sym_idx) and slot_idx%nTddPeriod == srsSlot: print("SRS check sym ", slot_idx, sym_idx) if nFrameDuplexType==1: #skip sym if TDD @@ -913,7 +1267,13 @@ def make_copy_mlog(rantech, cat, mu, bw, tcase, xran_path): def run_tcase(rem_o_ru_host, rantech, cat, mu, bw, tcase, verbose, xran_path, vf_addr_o_xu): - if rantech == 1: #LTE + if rantech == 2: #LTE and #5G NR + if cat == 0: + test_config =xran_path+"/app/usecase/dss/mu{0:d}_{1:d}mhz".format(mu, bw) + else: + print("Incorrect cat argument\n") + return -1 + elif rantech == 1: #LTE if cat == 1: test_config =xran_path+"/app/usecase/lte_b/mu{0:d}_{1:d}mhz".format(mu, bw) elif cat == 0 : @@ -936,7 +1296,7 @@ def run_tcase(rem_o_ru_host, rantech, cat, mu, bw, tcase, verbose, xran_path, vf if(tcase > 0) : test_config = test_config+"/"+str(tcase) - app = xran_path+"/app/build/sample-app" + app = [xran_path+"/app/build/sample-app", xran_path+"/app/build-oru/sample-app-ru"] logging.debug("run: %s %s", app, test_config) logging.debug("Started script: master.py, XRAN path %s", xran_path) @@ -944,6 +1304,45 @@ def run_tcase(rem_o_ru_host, rantech, cat, mu, bw, tcase, verbose, xran_path, vf test_cfg = [] global oXuOwdmEnabled oXuOwdmEnabled = 0 #Default is owdm measurements are disabled + REM_O_RU_HOST=rem_o_ru_host + + if(os.system('lscpu | grep -q -i AVX512IFMA') == 0): + cpu = 'icx' + else: + cpu = 'csx' + + #O-DU + if REM_O_RU_HOST == "": + + if (cpu == 'icx'): + if ((os.path.isfile(test_config+"/usecase_du_icx.cfg")) & (os.path.isfile(test_config+"/usecase_ru_icx.cfg"))): + test_cfg.append(test_config+"/usecase_du_icx.cfg") + test_cfg.append(test_config+"/usecase_ru_icx.cfg") + else: + test_cfg.append(test_config+"/usecase_du.cfg") + test_cfg.append(test_config+"/usecase_ru.cfg") + else: #(csx_cpu) + if ((os.path.isfile(test_config+"/usecase_du_csx.cfg")) & (os.path.isfile(test_config+"/usecase_ru_csx.cfg"))): + test_cfg.append(test_config+"/usecase_du_csx.cfg") + test_cfg.append(test_config+"/usecase_ru_csx.cfg") + else: + test_cfg.append(test_config+"/usecase_du.cfg") + test_cfg.append(test_config+"/usecase_ru.cfg") + else: # O-RU remote always CSX-SP + if (cpu == 'icx'): + if (os.path.isfile(test_config+"/usecase_du_icx.cfg")): + test_cfg.append(test_config+"/usecase_du_icx.cfg") + else: + test_cfg.append(test_config+"/usecase_du.cfg") + if (os.path.isfile(test_config+"/usecase_ru_csx.cfg")): + test_cfg.append(test_config+"/usecase_ru_csx.cfg") + else: + test_cfg.append(test_config+"/usecase_ru.cfg") + else: #(csx_cpu) + if ((os.path.isfile(test_config+"/usecase_du_csx.cfg")) & (os.path.isfile(test_config+"/usecase_ru_csx.cfg"))): + test_cfg.append(test_config+"/usecase_du_csx.cfg") + test_cfg.append(test_config+"/usecase_ru_csx.cfg") + else: test_cfg.append(test_config+"/usecase_du.cfg") test_cfg.append(test_config+"/usecase_ru.cfg") @@ -959,23 +1358,24 @@ def run_tcase(rem_o_ru_host, rantech, cat, mu, bw, tcase, verbose, xran_path, vf timer = [] os.system('pkill -9 "sample-app"') + os.system('pkill -9 "sample-app-ru"') os.system('rm -rf ./logs') usecase_cfg = parse_usecase_cfg(rantech, cat, mu, bw, tcase, xran_path, test_cfg) - REM_O_RU_HOST=rem_o_ru_host + for i in range(2): log_file_name.append("sampleapp_log_{}_{}_cat_{}_mu{}_{}mhz_tst_{}.log".format(dic_ran_tech.get(rantech), dic_xu.get(i),cat, mu, bw, tcase)) with open(log_file_name[i], "w") as f: - run_cmd = [app, "--usecasefile", test_cfg[i], "--num_eth_vfs", "6", "--vf_addr_o_xu_a", vf_addr_o_xu[i][0], "--vf_addr_o_xu_b", vf_addr_o_xu[i][1],"--vf_addr_o_xu_c", vf_addr_o_xu[i][2]] + run_cmd = [app[i], "--usecasefile", test_cfg[i], "--num_eth_vfs", "8", "--vf_addr_o_xu_a", vf_addr_o_xu[i][0], "--vf_addr_o_xu_b", vf_addr_o_xu[i][1],"--vf_addr_o_xu_c", vf_addr_o_xu[i][2],"--vf_addr_o_xu_d", vf_addr_o_xu[i][3]] #, stdout=f, stderr=f if (verbose==1): if i == 0 or REM_O_RU_HOST == "": p = subprocess.Popen(run_cmd) else: CMD = ' '.join([str(elem) for elem in run_cmd]) - ssh = ["ssh", "%s" % REM_O_RU_HOST, "cd " + xran_path + "/app"+"; hostname; pwd; pkill -9 sample-app; rm -rf ./logs;" + CMD] + ssh = ["ssh", "%s" % REM_O_RU_HOST, "cd " + xran_path + "/app"+"; hostname; pwd; pkill -9 sample-app; rm -rf ./logs; ulimit -c unlimited; echo 1 > /proc/sys/kernel/core_uses_pid; " + CMD] print(ssh) print("my_cmd: ", ' '.join([str(elem) for elem in ssh])) p = subprocess.Popen(ssh, shell=False) @@ -984,7 +1384,7 @@ def run_tcase(rem_o_ru_host, rantech, cat, mu, bw, tcase, verbose, xran_path, vf p = subprocess.Popen(run_cmd, stdout=f, stderr=f) else : CMD = ' '.join([str(elem) for elem in run_cmd]) - ssh = ["ssh", "%s" % REM_O_RU_HOST, "cd " + xran_path + "/app"+"; hostname; pwd; pkill -9 sample-app; rm -rf ./logs; " + CMD] + ssh = ["ssh", "%s" % REM_O_RU_HOST, "cd " + xran_path + "/app"+"; hostname; pwd; pkill -9 sample-app; rm -rf ./logs; ulimit -c unlimited; echo 1 > /proc/sys/kernel/core_uses_pid; " + CMD] p = subprocess.Popen(ssh, shell=False, stdout=f, stderr=f) #stdout=subprocess.PIPE, stderr=subprocess.PIPE) @@ -1005,8 +1405,8 @@ def run_tcase(rem_o_ru_host, rantech, cat, mu, bw, tcase, verbose, xran_path, vf p.wait() except (KeyboardInterrupt, SystemExit): for i in range(2): - timer[i].cancel(); - timer[i].cancel(); + timer[i].cancel() + timer[i].cancel() for pp, ff in processes: pp.send_signal(signal.SIGINT) pp.wait() @@ -1022,8 +1422,8 @@ def run_tcase(rem_o_ru_host, rantech, cat, mu, bw, tcase, verbose, xran_path, vf f.close() for i in range(2): - timer[i].cancel(); - timer[i].cancel(); + timer[i].cancel() + timer[i].cancel() logging.info("O-DU and O-RU are done\n") @@ -1086,7 +1486,6 @@ def run_tcase(rem_o_ru_host, rantech, cat, mu, bw, tcase, verbose, xran_path, vf def main(): test_results = [] - test_executed_total = 0 run_total = 0 test_fail_cnt = 0 test_pass_cnt = 0 @@ -1112,6 +1511,7 @@ def main(): options = parse_args(sys.argv[1:]) rem_o_ru_host = options.rem_o_ru_host + all_test_cases = all_test_cases_long if host_name == "sc12-xran-sub6": if rem_o_ru_host: vf_addr_o_xu = vf_addr_o_xu_sc12_cvl @@ -1129,11 +1529,14 @@ def main(): vf_addr_o_xu = vf_addr_o_xu_scs1_35 elif host_name == "csl-npg-scs1-33": vf_addr_o_xu = vf_addr_o_xu_csl_npg_scs1_33 + elif host_name == "skx-5gnr-sd6": + vf_addr_o_xu = vf_addr_o_xu_skx_5gnr_sd6 else: vf_addr_o_xu = vf_addr_o_xu_jenkins + all_test_cases = all_test_cases_short - print(vf_addr_o_xu[0][0],vf_addr_o_xu[0][1],vf_addr_o_xu[0][2]) - print(vf_addr_o_xu[1][0],vf_addr_o_xu[1][1],vf_addr_o_xu[1][2]) + print(vf_addr_o_xu[0][0],vf_addr_o_xu[0][1],vf_addr_o_xu[0][2],vf_addr_o_xu[0][3]) + print(vf_addr_o_xu[1][0],vf_addr_o_xu[1][1],vf_addr_o_xu[1][2],vf_addr_o_xu[1][3]) # Parse input arguments if len(sys.argv) == 1 or (len(sys.argv) == 3 and rem_o_ru_host): diff --git a/fhi_lib/test/test_xran/Makefile b/fhi_lib/test/test_xran/Makefile index ebe415e..8564236 100644 --- a/fhi_lib/test/test_xran/Makefile +++ b/fhi_lib/test/test_xran/Makefile @@ -22,12 +22,24 @@ ############################################################## # Tools configuration ############################################################## +ifeq ($(WIRELESS_SDK_TOOLCHAIN),icc) CC := icc CXX := icpc CPP := icpc AS := as AR := ar LD := icc +else ifeq ($(WIRELESS_SDK_TOOLCHAIN),icx) + CC := icx + CXX := icpx + CPP := icpx + AS := as + AR := llvm-ar + LD := icx +else + $(error "Please define WIRELESS_SDK_TOOLCHAIN environment variable") +endif + OBJDUMP := objdump ifeq ($(SHELL),cmd.exe) @@ -39,6 +51,25 @@ MD := mkdir -p CP := cp -f RM := rm -rf endif +TARGET_PROCESSOR = + +ifeq ($(WIRELESS_SDK_TOOLCHAIN),icx) + ifeq ($(WIRELESS_SDK_TARGET_ISA),sse) + TARGET_PROCESSOR := -xSSE4.2 + else ifeq ($(WIRELESS_SDK_TARGET_ISA),avx2) + TARGET_PROCESSOR := -xCORE-AVX2 + else ifeq ($(WIRELESS_SDK_TARGET_ISA),avx512) + TARGET_PROCESSOR := -xCORE-AVX512 + else ifeq ($(WIRELESS_SDK_TARGET_ISA),snc) + TARGET_PROCESSOR := -xicelake-server + else ifeq ($(WIRELESS_SDK_TARGET_ISA),spr) + TARGET_PROCESSOR := -march=sapphirerapids + endif + + ifeq ($(TARGET_PROCESSOR),) + $(error "Please define valid WIRELESS_SDK_TARGET_ISA environment variable $(WIRELESS_SDK_TARGET_ISA)") + endif +endif ifeq ($(RTE_SDK),) $(error "Please define RTE_SDK environment variable") @@ -48,12 +79,9 @@ ifeq ($(MLOG_DIR),) MLOG_DIR=$(XRAN_DIR)/../mlog endif -RTE_TARGET ?= x86_64-native-linuxapp-icc - RTE_LIBS = $(shell PKG_CONFIG_PATH=/usr/lib64/pkgconfig:$(RTE_SDK)/build/meson-uninstalled pkgconf --static --libs libdpdk) RTE_INC := $(shell PKG_CONFIG_PATH=/usr/lib64/pkgconfig:$(RTE_SDK)/build/meson-uninstalled pkgconf --cflags-only-I libdpdk) - # Where to find user code. COMMON_TEST_DIR = $(XRAN_DIR)/test/common USER_DIR = $(XRAN_DIR)/lib/src @@ -63,10 +91,13 @@ USER_API = $(XRAN_DIR)/lib/api # Flags passed to the preprocessor. # Set Google Test's header directory as a system directory, such that # the compiler doesn't generate warnings in Google Test headers. -CPPFLAGS += -isystem $(GTEST_ROOT)/include +CPPFLAGS += -isystem $(GTEST_ROOT)/include -Wno-unused-variable # Flags passed to the C++ compiler. -CXXFLAGS += -g -std=c++14 -Wall -Wextra -pthread -mcmodel=large -I$(USER_API) -I$(USER_DIR) -I$(USER_ETH) -I$(MLOG_DIR)/source -I $(COMMON_TEST_DIR) -I$(RTE_INC) +CXXFLAGS += -g -std=c++14 -pthread -D__STDC_LIMIT_MACROS -D__STDC_CONSTANT_MACROS -D_GNU_SOURCE -D_REENTRANT -pipe -mcmodel=large -Wno-unused-variable -fPIC \ + -falign-functions=16 $(TARGET_PROCESSOR) -I$(USER_API) -I$(USER_DIR) -I$(USER_ETH) -I$(MLOG_DIR)/source -I $(COMMON_TEST_DIR) -I$(RTE_INC) + + # All tests produced by this Makefile. Remember to add new tests you # created to the list. @@ -83,10 +114,22 @@ CFLAGS += -std=gnu11 -Wall -Wno-deprecated-declarations \ -g \ -Wall \ -Wimplicit-function-declaration \ - -wd1786 \ -mcmodel=large \ + -Wno-unused-variable \ + -Wno-unused-parameter \ + $(TARGET_PROCESSOR) \ -I$(USER_API) -I$(USER_DIR) -I$(USER_ETH) -I$(MLOG_DIR)/source -I$(RTE_INC) +ifeq ($(WIRELESS_SDK_TOOLCHAIN),icc) +CXXFLAGS += -Wall -Wextra +CFLAGS += -wd1786 -restrict +endif + +ifeq ($(WIRELESS_SDK_TOOLCHAIN),icx) +CFLAGS += -mintrinsic-promote -Wno-intrinsic-promote -Wno-error -Wno-unused-but-set-variable +endif + + C_SRC = \ $(USER_ETH)/ethdi.c \ $(USER_ETH)/ethernet.c \ @@ -98,7 +141,6 @@ C_SRC = \ $(USER_DIR)/xran_common.c \ $(USER_DIR)/xran_ul_tables.c \ $(USER_DIR)/xran_frame_struct.c \ - $(USER_DIR)/xran_app_frag.c \ $(USER_DIR)/xran_dev.c \ $(USER_DIR)/xran_rx_proc.c \ $(USER_DIR)/xran_tx_proc.c \ @@ -150,8 +192,18 @@ CPP_SNC_OBJS := $(patsubst %.cpp,%.o,$(CPP_SRC_SNC)) CPPFLAGS += -I$(USER_DIR) -I$(USER_API) #-qopt-report=5 -qopt-matmul -qopt-report-phase=all -CPP_COMP := -O3 -DNDEBUG -xcore-avx512 -fPIE -restrict -fasm-blocks -CPP_COMP_SNC := -O3 -DNDEBUG -march=icelake-server -fPIE -restrict -fasm-blocks +CPP_COMP := -O3 -DNDEBUG -xcore-avx512 -fPIE -fasm-blocks +CPP_COMP_SNC := -O3 -DNDEBUG -march=icelake-server -fPIE -fasm-blocks + +ifeq ($(WIRELESS_SDK_TOOLCHAIN),icc) +CPP_COMP += -fp-model fast=2 -no-prec-div -no-prec-sqrt -fast-transcendentals -restrict +CPP_COMP_SNC += -fp-model fast=2 -no-prec-div -no-prec-sqrt -fast-transcendentals -restrict +endif + +ifeq ($(WIRELESS_SDK_TOOLCHAIN),icx) +CPP_COMP += -fp-model fast -mintrinsic-promote -Wno-intrinsic-promote -Wno-error -Wno-unused-variable +CPP_COMP_SNC += -fp-model fast -mintrinsic-promote -Wno-intrinsic-promote -Wno-error -Wno-unused-variable +endif CPP_COMP := $(CPP_COMP) CPP_COMP_SNC := $(CPP_COMP_SNC) @@ -250,4 +302,4 @@ $(C_OBJS) : $(TESTS) : $(CC_OBJS) $(CPP_OBJS) $(CPP_SNC_OBJS) $(C_OBJS) $(GTEST_ROOT)/libgtest.a @echo "[LD] $@" - $(CXX) $(CPPFLAGS) $(CXXFLAGS) -L$(MLOG_DIR)/bin -Wl, $(RTE_LIBS) -lpthread -lnuma $^ -o $@ + @$(CXX) $(CPPFLAGS) $(CXXFLAGS) -L$(MLOG_DIR)/bin -Wl, $(RTE_LIBS) -lpthread -lnuma -Wl,-lstdc++ $^ -o $@ diff --git a/fhi_lib/test/test_xran/c_plane_tests.cc b/fhi_lib/test/test_xran/c_plane_tests.cc index df6bd43..79b87c4 100644 --- a/fhi_lib/test/test_xran/c_plane_tests.cc +++ b/fhi_lib/test/test_xran/c_plane_tests.cc @@ -48,10 +48,10 @@ extern "C" /* wrapper function for performace tests to reset mbuf */ int xran_ut_prepare_cp(struct xran_cp_gen_params *params, - uint8_t cc_id, uint8_t ant_id, uint8_t seq_id) + uint8_t cc_id, uint8_t ant_id, uint8_t seq_id, uint16_t start_sect_id) { - register int ret; - register struct rte_mbuf *mbuf; + int ret; + struct rte_mbuf *mbuf; mbuf = xran_ethdi_mbuf_alloc(); if(mbuf == NULL) { @@ -59,7 +59,7 @@ int xran_ut_prepare_cp(struct xran_cp_gen_params *params, return (-1); } - ret = xran_prepare_ctrl_pkt(mbuf, params, cc_id, ant_id, seq_id); + ret = xran_prepare_ctrl_pkt(mbuf, params, cc_id, ant_id, seq_id, start_sect_id); rte_pktmbuf_free(mbuf); return (ret); @@ -121,10 +121,14 @@ protected: int m_numSections; struct rte_mbuf *m_pTestBuffer = nullptr; + struct xran_fh_config *m_fh_cfg; + struct xran_srs_config *m_srs_cfg; + struct xran_device_ctx m_xran_dev_ctx; struct xran_cp_gen_params m_params; struct xran_recv_packet_info m_pktInfo; struct xran_cp_recv_params m_result; + struct xran_prb_elm *m_prb_ele = nullptr; struct xran_sectionext1_info m_temp_ext1[XRAN_MAX_PRBS]; @@ -144,6 +148,8 @@ protected: uint8_t m_scs; uint16_t m_cpLength; + uint32_t mb_free = MBUF_FREE; + struct sectinfo *m_sections; struct extcfginfo *m_extcfgs; int m_nextcfgs; @@ -172,6 +178,10 @@ protected: m_dirStr = get_input_parameter("direction"); + memset(&m_xran_dev_ctx, 0, sizeof(struct xran_device_ctx)); + m_srs_cfg = &m_xran_dev_ctx.srs_cfg; + m_fh_cfg = &m_xran_dev_ctx.fh_cfg; + if(!m_dirStr.compare("DL")) m_dir = XRAN_DIR_DL; else if(!m_dirStr.compare("UL")) m_dir = XRAN_DIR_UL; else FAIL() << "Invalid direction!"; @@ -188,6 +198,10 @@ protected: m_compMethod = get_input_parameter("comp_method"); m_iqWidth = get_input_parameter("iq_width"); + m_xran_dev_ctx.interval_us_local = get_input_parameter("interval"); + m_srs_cfg->eAxC_offset = XRAN_MAX_ANTENNA_NR;//m_antId + 4; + m_fh_cfg->neAxc = m_antId + 1; + switch(m_sectionType) { case XRAN_CP_SECTIONTYPE_1: m_filterIndex = XRAN_FILTERINDEX_STANDARD; @@ -249,6 +263,7 @@ protected: ext_type = get_input_parameter("extensions", i, "type"); switch(ext_type) { case XRAN_CP_SECTIONEXTCMD_1: + { /* if section extension type 1 is present, then ignore other extensions */ if(i != 0 && m_nextcfgs != 1) { std::cout << "### Extension 1 configuration, ignore other extensions !!\n" << std::endl; @@ -259,8 +274,10 @@ protected: m_extcfgs[i].u.ext1.bfwCompMeth = get_input_parameter ("extensions", i, "bfwCompMeth"); m_extcfgs[i].u.ext1.bfwIqWidth = get_input_parameter ("extensions", i, "bfwIqWidth"); m_antElmTRx = get_input_parameter ("extensions", i, "antelm_trx"); + struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx(); + p_xran_dev_ctx->numSetBFWs_arr[0] = m_numSections; break; - + } case XRAN_CP_SECTIONEXTCMD_2: m_extcfgs[i].u.ext2.bfAzPtWidth = get_input_parameter("extensions", i, "bfAzPtWidth") & 0x7; m_extcfgs[i].u.ext2.bfAzPt = get_input_parameter("extensions", i, "bfAzPt") & 0xf; @@ -326,6 +343,12 @@ protected: m_extcfgs[i].u.ext6.symbolMask = get_input_parameter("extensions", i, "symbolMask"); break; + case XRAN_CP_SECTIONEXTCMD_9: + { + m_extcfgs[i].u.ext9.technology = get_input_parameter ("extensions", i, "technology"); + m_xran_dev_ctx.dssPeriod = 1; + } + break; case XRAN_CP_SECTIONEXTCMD_10: m_extcfgs[i].u.ext10.numPortc = get_input_parameter ("extensions", i, "numPortc"); m_extcfgs[i].u.ext10.beamGrpType= get_input_parameter ("extensions", i, "beamGrpType"); @@ -430,6 +453,11 @@ protected: m_pTestBuffer = nullptr; } + if(m_prb_ele){ + xran_free(m_prb_ele); + m_prb_ele = nullptr; + } + if(m_pBfwIQ_ext){ xran_free(m_pBfwIQ_ext); m_pBfwIQ_ext = nullptr; @@ -463,7 +491,7 @@ int C_plane::prepare_extensions() for(sect_num=0; sect_num < m_numSections; sect_num++) { numext = 0; - for(i=0; i < m_sections[sect_num].exts.size(); i++) { + for(i=0; i < (int)(m_sections[sect_num].exts.size()); i++) { ext_id = m_sections[sect_num].exts[i]; if(ext_id >= m_nextcfgs) { @@ -495,6 +523,10 @@ int C_plane::prepare_extensions() m_params.sections[sect_num].exData[numext].len = sizeof(m_extcfgs[ext_id].u.ext6); m_params.sections[sect_num].exData[numext].data = &m_extcfgs[ext_id].u.ext6; break; + case XRAN_CP_SECTIONEXTCMD_9: + m_params.sections[sect_num].exData[numext].len = sizeof(m_extcfgs[ext_id].u.ext9); + m_params.sections[sect_num].exData[numext].data = &m_extcfgs[ext_id].u.ext9; + break; case XRAN_CP_SECTIONEXTCMD_10: m_params.sections[sect_num].exData[numext].len = sizeof(m_extcfgs[ext_id].u.ext10); m_params.sections[sect_num].exData[numext].data = &m_extcfgs[ext_id].u.ext10; @@ -519,11 +551,11 @@ int C_plane::prepare_extensions() if(numext) { m_params.sections[sect_num].exDataSize = numext; - m_params.sections[sect_num].info.ef = 1; + m_params.sections[sect_num].info->ef = 1; } else { m_params.sections[sect_num].exDataSize = 0; - m_params.sections[sect_num].info.ef = 0; + m_params.sections[sect_num].info->ef = 0; } } /* for(sect_num=0; sect_num < m_numSections; sect_num++) */ @@ -564,25 +596,26 @@ int C_plane::prepare_sections(void) } for(numsec=0; numsec < m_numSections; numsec++) { - m_params.sections[numsec].info.type = m_params.sectionType; - m_params.sections[numsec].info.startSymId = m_params.hdr.startSymId; - m_params.sections[numsec].info.iqWidth = m_params.hdr.iqWidth; - m_params.sections[numsec].info.compMeth = m_params.hdr.compMeth; - m_params.sections[numsec].info.id = m_sections[numsec].sectionId; - m_params.sections[numsec].info.rb = m_sections[numsec].rb; - m_params.sections[numsec].info.symInc = m_sections[numsec].symInc; - m_params.sections[numsec].info.startPrbc = m_sections[numsec].startPrbc; - m_params.sections[numsec].info.numPrbc = m_sections[numsec].numPrbc; - m_params.sections[numsec].info.reMask = m_sections[numsec].reMask; - m_params.sections[numsec].info.numSymbol = m_sections[numsec].numSymbol; - m_params.sections[numsec].info.beamId = m_sections[numsec].beamId; + m_params.sections[numsec].info = new struct xran_section_info; + m_params.sections[numsec].info->type = m_params.sectionType; + m_params.sections[numsec].info->startSymId = m_params.hdr.startSymId; + m_params.sections[numsec].info->iqWidth = m_params.hdr.iqWidth; + m_params.sections[numsec].info->compMeth = m_params.hdr.compMeth; + m_params.sections[numsec].info->id = m_sections[numsec].sectionId; + m_params.sections[numsec].info->rb = m_sections[numsec].rb; + m_params.sections[numsec].info->symInc = m_sections[numsec].symInc; + m_params.sections[numsec].info->startPrbc = m_sections[numsec].startPrbc; + m_params.sections[numsec].info->numPrbc = m_sections[numsec].numPrbc; + m_params.sections[numsec].info->reMask = m_sections[numsec].reMask; + m_params.sections[numsec].info->numSymbol = m_sections[numsec].numSymbol; + m_params.sections[numsec].info->beamId = m_sections[numsec].beamId; switch(m_sectionType) { case XRAN_CP_SECTIONTYPE_1: break; case XRAN_CP_SECTIONTYPE_3: - m_params.sections[numsec].info.freqOffset = m_sections[numsec].freqOffset; + m_params.sections[numsec].info->freqOffset = m_sections[numsec].freqOffset; break; default: @@ -625,39 +658,40 @@ void C_plane::verify_sections(void) default: FAIL() << "Invalid Section Type - " << m_sectionType << "\n"; } - + // printf("m_result.numSections = %d , m_params.numSections = %d\n",m_result.numSections,i,m_params.numSections); ASSERT_TRUE(m_result.numSections == m_params.numSections); for(i=0; i < m_result.numSections; i++) { - EXPECT_TRUE(m_result.sections[i].info.id == m_params.sections[i].info.id); - EXPECT_TRUE(m_result.sections[i].info.rb == m_params.sections[i].info.rb); - EXPECT_TRUE(m_result.sections[i].info.symInc == m_params.sections[i].info.symInc); - EXPECT_TRUE(m_result.sections[i].info.startPrbc == m_params.sections[i].info.startPrbc); - if(m_params.sections[i].info.numPrbc > 255) + // printf("m_result.sections[%d].info.id = %d , m_params.sections[%d].info.id = %d\n",i,m_result.sections[i].info.id,i,m_params.sections[i].info.id); + EXPECT_TRUE(m_result.sections[i].info.id == m_params.sections[i].info->id); + EXPECT_TRUE(m_result.sections[i].info.rb == m_params.sections[i].info->rb); + EXPECT_TRUE(m_result.sections[i].info.symInc == m_params.sections[i].info->symInc); + EXPECT_TRUE(m_result.sections[i].info.startPrbc == m_params.sections[i].info->startPrbc); + if(m_params.sections[i].info->numPrbc > 255) EXPECT_TRUE(m_result.sections[i].info.numPrbc == 0); else - EXPECT_TRUE(m_result.sections[i].info.numPrbc == m_params.sections[i].info.numPrbc); - EXPECT_TRUE(m_result.sections[i].info.numSymbol == m_params.sections[i].info.numSymbol); - EXPECT_TRUE(m_result.sections[i].info.reMask == m_params.sections[i].info.reMask); - EXPECT_TRUE(m_result.sections[i].info.beamId == m_params.sections[i].info.beamId); - EXPECT_TRUE(m_result.sections[i].info.ef == m_params.sections[i].info.ef); + EXPECT_TRUE(m_result.sections[i].info.numPrbc == m_params.sections[i].info->numPrbc); + EXPECT_TRUE(m_result.sections[i].info.numSymbol == m_params.sections[i].info->numSymbol); + EXPECT_TRUE(m_result.sections[i].info.reMask == m_params.sections[i].info->reMask); + EXPECT_TRUE(m_result.sections[i].info.beamId == m_params.sections[i].info->beamId); + EXPECT_TRUE(m_result.sections[i].info.ef == m_params.sections[i].info->ef); switch(m_sectionType) { case XRAN_CP_SECTIONTYPE_1: break; case XRAN_CP_SECTIONTYPE_3: - EXPECT_TRUE(m_result.sections[i].info.freqOffset == m_params.sections[i].info.freqOffset); + EXPECT_TRUE(m_result.sections[i].info.freqOffset == m_params.sections[i].info->freqOffset); break; default: FAIL() << "Invalid Section Type - " << m_sectionType << "\n"; } - if(m_params.sections[i].info.ef) { + if(m_params.sections[i].info->ef) { //printf("[%d] %d == %d\n",i, m_result.sections[i].exDataSize, m_params.sections[i].exDataSize); EXPECT_TRUE(m_result.sections[i].numExts == m_params.sections[i].exDataSize); - for(j=0; j < m_params.sections[i].exDataSize; j++) { + for(j=0; j < (int)m_params.sections[i].exDataSize; j++) { EXPECT_TRUE(m_result.sections[i].exts[j].type == m_params.sections[i].exData[j].type); switch(m_params.sections[i].exData[j].type) { @@ -801,6 +835,15 @@ void C_plane::verify_sections(void) EXPECT_TRUE(ext6_result->symbolMask == ext6_params->symbolMask); } break; + case XRAN_CP_SECTIONEXTCMD_9: + { + struct xran_sectionext9_info *ext9_params, *ext9_result; + + ext9_params = (struct xran_sectionext9_info *)m_params.sections[i].exData[j].data; + ext9_result = &m_result.sections[i].exts[j].u.ext9; + EXPECT_TRUE(ext9_result->technology == ext9_params->technology); + } + break; case XRAN_CP_SECTIONEXTCMD_10: { struct xran_sectionext10_info *ext10_params, *ext10_result; @@ -860,6 +903,8 @@ void C_plane::verify_sections(void) } } } + if(m_params.sections[i].info != NULL) + delete m_params.sections[i].info; } return; @@ -873,10 +918,11 @@ void C_plane::test_ext1(void) int32_t nAntElm = 64; int8_t iqWidth = 9; int8_t compMethod = XRAN_COMPMETHOD_BLKFLOAT; + int numSections = 0; int8_t *p_ext1_dst = NULL; int8_t *bfw_payload = NULL; - int32_t expected_len = ((nAntElm/16*4*iqWidth)+1)*nRbs + /* bfwCompParam + IQ = */ - sizeof(struct xran_cp_radioapp_section_ext1)*nRbs; /* ext1 Headers */ + // int32_t expected_len = ((nAntElm/16*4*iqWidth)+1)*nRbs + /* bfwCompParam + IQ = */ + // sizeof(struct xran_cp_radioapp_section_ext1)*nRbs; /* ext1 Headers */ int16_t ext_len = 9600; int16_t ext_sec_total = 0; @@ -886,30 +932,37 @@ void C_plane::test_ext1(void) struct xran_section_gen_info* loc_pSectGenInfo = m_params.sections; struct xran_sectionext1_info m_prep_ext1; struct xran_cp_radioapp_section_ext1 *p_ext1; + struct xran_cp_radioapp_section1 *p_section1; struct rte_mbuf_ext_shared_info share_data; struct rte_mbuf *mbuf = NULL; + struct xran_sectionext1_info ext1; nAntElm = m_antElmTRx; - nRbs = m_params.sections[0].info.numPrbc; + nRbs = m_params.sections[0].info->numPrbc; iqWidth = m_extcfgs[0].u.ext1.bfwIqWidth; compMethod = m_extcfgs[0].u.ext1.bfwCompMeth; + numSections = m_numSections; +#if 0 switch(compMethod) { case XRAN_BFWCOMPMETHOD_NONE: - expected_len = (3+1)*nRbs + nAntElm*nRbs*4; + // expected_len = (3+1)*nRbs + nAntElm*nRbs*4; + expected_len = sizeof(struct xran_cp_radioapp_section1)*numSections + \ + sizeof(struct xran_cp_radioapp_section_ext1)*numSections + \ + nAntElm*numSections*4; break; case XRAN_BFWCOMPMETHOD_BLKFLOAT: - expected_len = ((nAntElm/16*4*iqWidth)+1)*nRbs + /* bfwCompParam + IQ = */ - sizeof(struct xran_cp_radioapp_section_ext1)*nRbs; /* ext1 Headers */ + expected_len = ((nAntElm/16*iqWidth)+1)*numSections*4 + /* bfwCompParam + IQ = */ + sizeof(struct xran_cp_radioapp_section1)*numSections + \ + sizeof(struct xran_cp_radioapp_section_ext1)*numSections; /* ext1 Headers */ break; default: FAIL() << "Unsupported Compression Method - " << compMethod << std::endl; } +#endif - if(loc_pSectGenInfo->info.type == XRAN_CP_SECTIONTYPE_1) { - /* extType 1 only with Section 1 for now */ - + if(loc_pSectGenInfo->info->type == XRAN_CP_SECTIONTYPE_1) { ext_buf = ext_buf_init = (int8_t*) xran_malloc(ext_len); if (ext_buf) { ptr = m_p_bfw_iq_src; @@ -921,84 +974,64 @@ void C_plane::test_ext1(void) ext_buf += (RTE_PKTMBUF_HEADROOM + sizeof (struct xran_ecpri_hdr) + - sizeof(struct xran_cp_radioapp_common_header) + - sizeof(struct xran_cp_radioapp_section1)); + sizeof(struct xran_cp_radioapp_common_header)); ext_len -= (RTE_PKTMBUF_HEADROOM + sizeof(struct xran_ecpri_hdr) + - sizeof(struct xran_cp_radioapp_common_header) + - sizeof(struct xran_cp_radioapp_section1)); + sizeof(struct xran_cp_radioapp_common_header)); + m_prb_ele = (xran_prb_elm *) xran_malloc(sizeof(struct xran_prb_elm)); + + m_prb_ele->bf_weight.bfwIqWidth = iqWidth; + m_prb_ele->bf_weight.bfwCompMeth = compMethod; + m_prb_ele->bf_weight.numSetBFWs = numSections; + m_prb_ele->bf_weight.nAntElmTRx = nAntElm; ext_sec_total = xran_cp_populate_section_ext_1((int8_t *)ext_buf, ext_len, m_p_bfw_iq_src, - nRbs, - nAntElm, - iqWidth, - compMethod); + m_prb_ele); - ASSERT_TRUE(ext_sec_total == expected_len); + // ASSERT_TRUE(ext_sec_total == expected_len); p_ext1_dst = ext_buf; memset(&m_temp_ext1[0], 0, sizeof (struct xran_sectionext1_info)*XRAN_MAX_PRBS); idRb = 0; do { - p_ext1 = (struct xran_cp_radioapp_section_ext1 *)p_ext1_dst; + p_section1 = (struct xran_cp_radioapp_section1 *)p_ext1_dst; + p_ext1 = (struct xran_cp_radioapp_section_ext1 *)(p_section1+1); bfw_payload = (int8_t*)(p_ext1+1); - p_ext1_dst += p_ext1->extLen*XRAN_SECTIONEXT_ALIGN; + m_pSectGenInfo[idRb].info->id = idRb; - m_temp_ext1[idRb].bfwNumber = nAntElm; - m_temp_ext1[idRb].bfwIqWidth = iqWidth; - m_temp_ext1[idRb].bfwCompMeth = compMethod; + m_pSectGenInfo[idRb].exData[0].type = XRAN_CP_SECTIONEXTCMD_1; + m_pSectGenInfo[idRb].exData[0].len = sizeof(ext1); - if(compMethod == XRAN_BFWCOMPMETHOD_BLKFLOAT) { - m_temp_ext1[idRb].bfwCompParam.exponent = *bfw_payload++ & 0xF; - } - m_temp_ext1[idRb].p_bfwIQ = (int16_t*)bfw_payload; - m_temp_ext1[idRb].bfwIQ_sz = p_ext1->extLen*XRAN_SECTIONEXT_ALIGN; + m_pSectGenInfo[idRb].info->ef = 1; + m_pSectGenInfo[idRb].exDataSize = 1; - loc_pSectGenInfo->exData[idRb].type = XRAN_CP_SECTIONEXTCMD_1; - loc_pSectGenInfo->exData[idRb].len = sizeof(m_temp_ext1[idRb]); - loc_pSectGenInfo->exData[idRb].data = &m_temp_ext1[idRb]; + p_ext1_dst += sizeof(struct xran_cp_radioapp_section1) /*+ sizeof(struct xran_cp_radioapp_section_ext1)*/ + p_ext1->extLen*XRAN_SECTIONEXT_ALIGN; + m_temp_ext1[0].bfwNumber = nAntElm; + m_temp_ext1[0].bfwIqWidth = iqWidth; + m_temp_ext1[0].bfwCompMeth = compMethod; + m_temp_ext1[0].p_bfwIQ = (int8_t*)bfw_payload; + m_temp_ext1[0].bfwIQ_sz = p_ext1->extLen*XRAN_SECTIONEXT_ALIGN; + if(compMethod == XRAN_BFWCOMPMETHOD_BLKFLOAT) { + m_temp_ext1[0].bfwCompParam.exponent = *bfw_payload++ & 0xF; + } + m_pSectGenInfo[idRb].exData[0].data = &m_temp_ext1[0]; idRb++; - } while(p_ext1->ef != XRAN_EF_F_LAST); + } while(idRb < numSections); /*p_ext1->ef != XRAN_EF_F_LAST);*/ - ASSERT_TRUE(idRb == nRbs); + ASSERT_TRUE(idRb == numSections); mbuf = xran_attach_cp_ext_buf(0, ext_buf_init, ext_buf, ext_sec_total, &share_data); - - /* Update section information */ - memset(&m_prep_ext1, 0, sizeof (struct xran_sectionext1_info)); - m_prep_ext1.bfwNumber = nAntElm; - m_prep_ext1.bfwIqWidth = iqWidth; - m_prep_ext1.bfwCompMeth = compMethod; - m_prep_ext1.p_bfwIQ = (int16_t*)ext_buf; - m_prep_ext1.bfwIQ_sz = ext_sec_total; - - - loc_pSectGenInfo->exData[0].type = XRAN_CP_SECTIONEXTCMD_1; - loc_pSectGenInfo->exData[0].len = sizeof(m_prep_ext1); - loc_pSectGenInfo->exData[0].data = &m_prep_ext1; - - loc_pSectGenInfo->info.ef = 1; - loc_pSectGenInfo->exDataSize = 1; /* append all extType1 as one shot - (as generated via xran_cp_populate_section_ext_1)*/ - - m_params.numSections = 1; + m_params.numSections = numSections; /* Generating C-Plane packet */ - ASSERT_TRUE(xran_prepare_ctrl_pkt(/*m_pTestBuffer*/mbuf, &m_params, m_ccId, m_antId, m_seqId) == XRAN_STATUS_SUCCESS); - - /** to match O-RU parsing */ - loc_pSectGenInfo->exDataSize = nRbs; - loc_pSectGenInfo->exData[0].len = sizeof(m_temp_ext1[0]); - loc_pSectGenInfo->exData[0].data = &m_temp_ext1[0]; - - /* Parsing generated packet */ - EXPECT_TRUE(xran_parse_cp_pkt(/*m_pTestBuffer*/mbuf, &m_result, &m_pktInfo) == XRAN_STATUS_SUCCESS); + ASSERT_TRUE(xran_prepare_ctrl_pkt(/*m_pTestBuffer*/mbuf, &m_params, m_ccId, m_antId, m_seqId, 0) == XRAN_STATUS_SUCCESS); + EXPECT_TRUE(xran_parse_cp_pkt(/*m_pTestBuffer*/mbuf, &m_result, &m_pktInfo, (void *)&m_xran_dev_ctx, &mb_free) == XRAN_STATUS_SUCCESS); } else { FAIL() << "xran_malloc failed\n"; @@ -1052,14 +1085,14 @@ TEST_P(C_plane, CPacketGen) ASSERT_FALSE(m_pTestBuffer == nullptr); } + xran_cp_init_sectiondb((void *)&m_xran_dev_ctx); /* Generating C-Plane packet */ - ASSERT_TRUE(xran_prepare_ctrl_pkt(m_pTestBuffer, &m_params, m_ccId, m_antId, m_seqId) == XRAN_STATUS_SUCCESS); + ASSERT_TRUE(xran_prepare_ctrl_pkt(m_pTestBuffer, &m_params, m_ccId, m_antId, m_seqId, 0) == XRAN_STATUS_SUCCESS); /* Linearize data in the chain of mbufs to parse generated packet*/ ASSERT_TRUE(rte_pktmbuf_linearize(m_pTestBuffer) == 0); - /* Parsing generated packet */ - EXPECT_TRUE(xran_parse_cp_pkt(m_pTestBuffer, &m_result, &m_pktInfo) == XRAN_STATUS_SUCCESS); + EXPECT_TRUE(xran_parse_cp_pkt(m_pTestBuffer, &m_result, &m_pktInfo, (void *)&m_xran_dev_ctx, &mb_free) == XRAN_STATUS_SUCCESS); /* Verify the result */ verify_sections(); @@ -1079,9 +1112,10 @@ TEST_P(C_plane, Perf) FAIL() << "Invalid Section extension configuration\n"; } + xran_cp_init_sectiondb((void *)&m_xran_dev_ctx); /* using wrapper function to reset mbuf */ performance("C", module_name, - &xran_ut_prepare_cp, &m_params, m_ccId, m_antId, m_seqId); + &xran_ut_prepare_cp, &m_params, m_ccId, m_antId, m_seqId, 0); } diff --git a/fhi_lib/test/test_xran/chain_tests.cc b/fhi_lib/test/test_xran/chain_tests.cc index 6757656..c0dac46 100644 --- a/fhi_lib/test/test_xran/chain_tests.cc +++ b/fhi_lib/test/test_xran/chain_tests.cc @@ -117,6 +117,11 @@ void utcp_fh_rx_callback(void *pCallbackTag, xran_status_t status) return; } +void utcp_fh_bfw_callback(void *pCallbackTag, xran_status_t status) +{ + return; +} + void utcp_fh_srs_callback(void *pCallbackTag, xran_status_t status) { return; @@ -234,7 +239,7 @@ TEST_P(TestChain, CPlaneDLPerf) { xranlib->Init(0, &m_xranConf); xranlib->Open(0, send_mbuf_cp_perf, send_mbuf_up, - (void *)utcp_fh_rx_callback, (void *)utcp_fh_rx_prach_callback, (void *)utcp_fh_srs_callback); + (void *)utcp_fh_rx_callback, (void *)utcp_fh_bfw_callback, (void *)utcp_fh_rx_prach_callback, (void *)utcp_fh_srs_callback); performance("C", module_name, xran_ut_tx_cp_dl); @@ -247,7 +252,7 @@ TEST_P(TestChain, CPlaneULPerf) { xranlib->Init(0, &m_xranConf); xranlib->Open(0, send_mbuf_cp_perf, send_mbuf_up, - (void *)utcp_fh_rx_callback, (void *)utcp_fh_rx_prach_callback, (void *)utcp_fh_srs_callback); + (void *)utcp_fh_rx_callback, (void *)utcp_fh_bfw_callback, (void *)utcp_fh_rx_prach_callback, (void *)utcp_fh_srs_callback); performance("C", module_name, xran_ut_tx_cp_ul); @@ -268,7 +273,7 @@ TEST_P(TestChain, UPlaneDLPerf) /* need to disable CP to make U-Plane work without CP */ xranlib->apply_cpenable(false); xranlib->Open(0, send_mbuf_cp_perf, send_mbuf_up, - (void *)utcp_fh_rx_callback, (void *)utcp_fh_rx_prach_callback, (void *)utcp_fh_srs_callback); + (void *)utcp_fh_rx_callback, (void *)utcp_fh_bfw_callback, (void *)utcp_fh_rx_prach_callback, (void *)utcp_fh_srs_callback); performance("C", module_name, xran_ut_tx_up_dl); @@ -292,7 +297,7 @@ TEST_P(TestChain, APlaneDLPerf) /* Enable CP by force to make UP work by CP's section information */ xranlib->apply_cpenable(true); xranlib->Open(0, send_mbuf_cp_perf, send_mbuf_up, - (void *)utcp_fh_rx_callback, (void *)utcp_fh_rx_prach_callback, (void *)utcp_fh_srs_callback); + (void *)utcp_fh_rx_callback, (void *)utcp_fh_bfw_callback, (void *)utcp_fh_rx_prach_callback, (void *)utcp_fh_srs_callback); performance("C", module_name, xran_ut_tx_cpup_dl); diff --git a/fhi_lib/test/test_xran/compander_functional.cc b/fhi_lib/test/test_xran/compander_functional.cc index 7323a3d..4b5fc86 100644 --- a/fhi_lib/test/test_xran/compander_functional.cc +++ b/fhi_lib/test/test_xran/compander_functional.cc @@ -732,8 +732,8 @@ TEST_P(BfpCheck, AVX512_sweep_xranlib) expandedData.dataExpanded = &loc_dataExpandedIn[0]; BlockFloatCompander::ExpandedData expandedDataRes; expandedDataRes.dataExpanded = &loc_dataExpandedRes[0]; - for (int iq_w_id = 0; iq_w_id < sizeof(iqWidth)/sizeof(iqWidth[0]); iq_w_id ++){ - for (int tc = 0; tc < sizeof(numRBs)/sizeof(numRBs[0]); tc ++){ + for (unsigned int iq_w_id = 0; iq_w_id < sizeof(iqWidth)/sizeof(iqWidth[0]); iq_w_id ++){ + for (unsigned int tc = 0; tc < sizeof(numRBs)/sizeof(numRBs[0]); tc ++){ //printf("[%d]numRBs %d [%d] iqWidth %d\n",tc, numRBs[tc], iq_w_id, iqWidth[iq_w_id]); // Generate random test data for compression kernel @@ -819,8 +819,8 @@ TEST_P(BfpCheck, AVXSNC_sweep_xranlib) expandedData.dataExpanded = &loc_dataExpandedIn[0]; BlockFloatCompander::ExpandedData expandedDataRes; expandedDataRes.dataExpanded = &loc_dataExpandedRes[0]; - for (int iq_w_id = 0; iq_w_id < sizeof(iqWidth)/sizeof(iqWidth[0]); iq_w_id ++){ - for (int tc = 0; tc < sizeof(numRBs)/sizeof(numRBs[0]); tc ++){ + for (unsigned int iq_w_id = 0; iq_w_id < sizeof(iqWidth)/sizeof(iqWidth[0]); iq_w_id ++){ + for (unsigned int tc = 0; tc < sizeof(numRBs)/sizeof(numRBs[0]); tc ++){ //printf("[%d]numRBs %d [%d] iqWidth %d\n",tc, numRBs[tc], iq_w_id, iqWidth[iq_w_id]); // Generate random test data for compression kernel @@ -903,8 +903,8 @@ TEST_P(BfpCheck, AVX512_cp_sweep_xranlib) BlockFloatCompander::ExpandedData expandedDataRes; expandedDataRes.dataExpanded = &loc_dataExpandedRes[0]; - for (int iq_w_id = 0; iq_w_id < sizeof(iqWidth)/sizeof(iqWidth[0]); iq_w_id ++){ - for (int tc = 0; tc < sizeof(antElm)/sizeof(antElm[0]); tc ++){ + for (unsigned int iq_w_id = 0; iq_w_id < sizeof(iqWidth)/sizeof(iqWidth[0]); iq_w_id ++){ + for (unsigned int tc = 0; tc < sizeof(antElm)/sizeof(antElm[0]); tc ++){ numDataElements = 2*antElm[tc]; @@ -992,8 +992,8 @@ TEST_P(BfpCheck, AVXSNC_cp_sweep_xranlib) if(_may_i_use_cpu_feature(_FEATURE_AVX512IFMA52) == 0) return; - for (int iq_w_id = 0; iq_w_id < sizeof(iqWidth)/sizeof(iqWidth[0]); iq_w_id ++){ - for (int tc = 0; tc < sizeof(antElm)/sizeof(antElm[0]); tc ++){ + for (unsigned int iq_w_id = 0; iq_w_id < sizeof(iqWidth)/sizeof(iqWidth[0]); iq_w_id ++){ + for (unsigned int tc = 0; tc < sizeof(antElm)/sizeof(antElm[0]); tc ++){ numDataElements = 2*antElm[tc]; diff --git a/fhi_lib/test/test_xran/conf.json b/fhi_lib/test/test_xran/conf.json index d71253c..f658e26 100644 --- a/fhi_lib/test/test_xran/conf.json +++ b/fhi_lib/test/test_xran/conf.json @@ -12,7 +12,7 @@ "dpdkBasebandFecMode": 0, "dpdkBasebandDevice": "", "dpdkMemorySize": 8192, - "mtu": 1500, + "mtu": 9600, "o_du_macaddr": "00:11:22:33:44:66", "o_ru_macaddr": "00:11:22:33:44:55", "cp_vlan_tag": 1, @@ -123,6 +123,7 @@ "symbol_start": 0, "comp_method": 0, "iq_width": 16, + "interval": 500, "sections": [ { "sectionId": 1, @@ -152,6 +153,7 @@ "symbol_start": 0, "comp_method": 0, "iq_width": 16, + "interval": 500, "sections": [ { "sectionId": 1, @@ -190,6 +192,7 @@ "symbol_start": 0, "comp_method": 0, "iq_width": 16, + "interval": 500, "sections": [ { "sectionId": 1, @@ -228,6 +231,7 @@ "symbol_start": 6, "comp_method": 0, "iq_width": 16, + "interval": 500, "sections": [ { "sectionId": 1, @@ -306,6 +310,7 @@ "symbol_start": 5, "comp_method": 0, "iq_width": 16, + "interval": 500, "sections": [ { "sectionId": 1, @@ -364,6 +369,7 @@ "symbol_start": 5, "comp_method": 0, "iq_width": 16, + "interval": 500, "sections": [ { "sectionId": 1, @@ -502,6 +508,7 @@ "symbol_start": 0, "comp_method": 0, "iq_width": 16, + "interval": 500, "sections": [ { "sectionId": 1, @@ -530,6 +537,7 @@ "symbol_start": 0, "comp_method": 0, "iq_width": 16, + "interval": 500, "sections": [ { "sectionId": 1, @@ -558,6 +566,7 @@ "symbol_start": 0, "comp_method": 0, "iq_width": 16, + "interval": 500, "sections": [ { "sectionId": 1, @@ -606,6 +615,7 @@ "symbol_start": 0, "comp_method": 0, "iq_width": 16, + "interval": 500, "sections": [ { "sectionId": 1, @@ -664,6 +674,7 @@ "symbol_start": 0, "comp_method": 0, "iq_width": 16, + "interval": 500, "sections": [ { "sectionId": 1, @@ -710,6 +721,7 @@ "symbol_start": 0, "comp_method": 0, "iq_width": 16, + "interval": 500, "sections": [ { "sectionId": 1, @@ -748,6 +760,7 @@ "symbol_start": 0, "comp_method": 0, "iq_width": 16, + "interval": 500, "sections": [ { "sectionId": 1, @@ -786,6 +799,7 @@ "symbol_start": 0, "comp_method": 0, "iq_width": 16, + "interval": 500, "sections": [ { "sectionId": 1, @@ -824,6 +838,7 @@ "symbol_start": 0, "comp_method": 1, "iq_width": 9, + "interval": 500, "sections": [ { "sectionId": 1, @@ -862,6 +877,7 @@ "symbol_start": 0, "comp_method": 0, "iq_width": 16, + "interval": 500, "sections": [ { "sectionId": 1, @@ -905,6 +921,7 @@ "symbol_start": 0, "comp_method": 1, "iq_width": 9, + "interval": 500, "sections": [ { "sectionId": 1, @@ -955,6 +972,7 @@ "symbol_start": 0, "comp_method": 0, "iq_width": 16, + "interval": 500, "sections": [ { "sectionId": 1, @@ -1048,6 +1066,7 @@ "fft_size": 10, "scs": 3, "cp_length": 0, + "interval": 500, "sections": [ { "sectionId": 1, @@ -1062,6 +1081,43 @@ } ] } + }, + { + "name": "DL_SectionType1_SingleSection_Ext9", + "parameters": { + "direction": "DL", + "section_type": 1, + "cc_id": 0, + "ant_id": 0, + "seq_id": 0, + "frame_id": 0, + "subframe_id": 0, + "slot_id": 0, + "symbol_start": 0, + "comp_method": 0, + "iq_width": 16, + "interval": 500, + "sections": [ + { + "sectionId": 0, + "rb": 0, + "symInc": 0, + "startPrbc": 0, + "numPrbc": 273, + "reMask": 4095, + "numSymbol": 14, + "beamId": 0, + "exts": [ 0 ] + } + ], + "extensions": [ + { + "name": "ext9", + "type": 9, + "technology": 1 + } + ] + } } ], @@ -1273,7 +1329,7 @@ "dpdkBasebandDevice": "none", "filePrefix": "wls", "xranCat": 0, - "mtu": 1500, + "mtu": 9600, "p_o_du_addr": "00:11:22:33:44:66", "p_o_ru_addr": "00:11:22:33:44:55", "Tadv_cp_dl": 0, @@ -1323,7 +1379,8 @@ "antId": 0, "iqWidth": 16, "compMeth": 0, - "fftSize": 10 + "fftSize": 10, + "dssperiod": 1 }, "references": { @@ -1363,7 +1420,8 @@ "slotId": 0, "beamId": 0, "ccId": 0, - "antId": 0 + "antId": 0, + "dssperiod": 1 }, "references": { diff --git a/fhi_lib/test/test_xran/init_sys_functional.cc b/fhi_lib/test/test_xran/init_sys_functional.cc index e00d022..fa9b7d1 100644 --- a/fhi_lib/test/test_xran/init_sys_functional.cc +++ b/fhi_lib/test/test_xran/init_sys_functional.cc @@ -66,6 +66,12 @@ void xran_fh_rx_callback(void *pCallbackTag, xran_status_t status) return; } +void xran_fh_bfw_callback(void *pCallbackTag, xran_status_t status) +{ + rte_pause(); + return; +} + void xran_fh_srs_callback(void *pCallbackTag, xran_status_t status) { rte_pause(); @@ -86,7 +92,7 @@ protected: void SetUp() override { xranlib->Init(0); - xranlib->Open(0, nullptr, nullptr, (void *)xran_fh_rx_callback, (void *)xran_fh_rx_prach_callback, (void *)xran_fh_srs_callback); + xranlib->Open(0, nullptr, nullptr, (void *)xran_fh_rx_callback, (void *)xran_fh_bfw_callback, (void *)xran_fh_rx_prach_callback, (void *)xran_fh_srs_callback); } /* It's called after an execution of the each test case.*/ @@ -104,6 +110,8 @@ public: BbuIoBufCtrlStruct sFrontHaulRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR]; BbuIoBufCtrlStruct sFHPrachRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR]; + BbuIoBufCtrlStruct sFHCpRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR]; + BbuIoBufCtrlStruct sFHCpTxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR]; /* buffers lists */ struct xran_flat_buffer sFrontHaulTxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT]; struct xran_flat_buffer sFrontHaulTxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR]; @@ -256,19 +264,19 @@ TEST_P(Init_Sys_Check, Test_xran_reg_physide_cb) int16_t ret = 0; ret = xran_reg_physide_cb(xranlib->get_xranhandle(), physide_dl_tti_call_back, NULL, 10, XRAN_CB_TTI); ASSERT_EQ(0,ret); - ASSERT_EQ(physide_dl_tti_call_back, p_xran_dev_ctx->ttiCb[XRAN_CB_TTI]); + ASSERT_EQ((long long)physide_dl_tti_call_back, (long long)p_xran_dev_ctx->ttiCb[XRAN_CB_TTI]); ASSERT_EQ(NULL, p_xran_dev_ctx->TtiCbParam[XRAN_CB_TTI]); ASSERT_EQ(10, p_xran_dev_ctx->SkipTti[XRAN_CB_TTI]); ret = xran_reg_physide_cb(xranlib->get_xranhandle(), physide_ul_half_slot_call_back, NULL, 10, XRAN_CB_HALF_SLOT_RX); ASSERT_EQ(0,ret); - ASSERT_EQ(physide_ul_half_slot_call_back, p_xran_dev_ctx->ttiCb[XRAN_CB_HALF_SLOT_RX]); - ASSERT_EQ(NULL, p_xran_dev_ctx->TtiCbParam[XRAN_CB_HALF_SLOT_RX]); + ASSERT_EQ((long long)physide_ul_half_slot_call_back, (long long)p_xran_dev_ctx->ttiCb[XRAN_CB_HALF_SLOT_RX]); + ASSERT_EQ((long long)NULL, (long long)p_xran_dev_ctx->TtiCbParam[XRAN_CB_HALF_SLOT_RX]); ASSERT_EQ(10, p_xran_dev_ctx->SkipTti[XRAN_CB_HALF_SLOT_RX]); ret = xran_reg_physide_cb(xranlib->get_xranhandle(), physide_ul_full_slot_call_back, NULL, 10, XRAN_CB_FULL_SLOT_RX); ASSERT_EQ(0,ret); - ASSERT_EQ(physide_ul_full_slot_call_back, p_xran_dev_ctx->ttiCb[XRAN_CB_FULL_SLOT_RX]); + ASSERT_EQ((long long)physide_ul_full_slot_call_back,(long long) p_xran_dev_ctx->ttiCb[XRAN_CB_FULL_SLOT_RX]); ASSERT_EQ(NULL, p_xran_dev_ctx->TtiCbParam[XRAN_CB_FULL_SLOT_RX]); ASSERT_EQ(10, p_xran_dev_ctx->SkipTti[XRAN_CB_FULL_SLOT_RX]); diff --git a/fhi_lib/test/test_xran/prach_functional.cc b/fhi_lib/test/test_xran/prach_functional.cc index 33213a5..ca01c76 100644 --- a/fhi_lib/test/test_xran/prach_functional.cc +++ b/fhi_lib/test/test_xran/prach_functional.cc @@ -33,7 +33,7 @@ const std::string module_name = "Prach_test"; class PrachCheck : public KernelTests { private: - struct xran_section_gen_info *m_pSectResult = NULL; + struct xran_section_recv_info *m_pSectResult = NULL; /*Not used*/ protected: struct xran_fh_config *m_xranConf; @@ -100,6 +100,7 @@ protected: m_pRUConfig = &m_xranConf->ru_conf; m_pPrachCPConfig = &m_xran_dev_ctx.PrachCPConfig; //initialize input parameters + m_xran_dev_ctx.dssPeriod = get_input_parameter("dssperiod"); m_xranConf->frame_conf.nNumerology = get_input_parameter("Numerology"); m_xranConf->frame_conf.nFrameDuplexType = get_input_parameter("FrameDuplexType"); m_xranConf->log_level = get_input_parameter("loglevel"); @@ -156,6 +157,7 @@ protected: m_pSectGenInfo = new struct xran_section_gen_info[8]; ASSERT_NE(m_pSectGenInfo, nullptr); m_params.sections = m_pSectGenInfo; + m_params.sections[0].info = new struct xran_section_info; /* allocating an mbuf for packet generatrion */ m_pTestBuffer = (struct rte_mbuf*)rte_pktmbuf_alloc(_eth_mbuf_pool); @@ -181,7 +183,7 @@ TEST_P(PrachCheck, PrachPacketGen)//TestCaseName TestName void *pHandle = NULL; /* Preparing input data for prach config */ - ret = xran_init_prach(m_xranConf, &m_xran_dev_ctx); + ret = xran_init_prach(m_xranConf, &m_xran_dev_ctx, XRAN_RAN_5GNR); ASSERT_TRUE(ret == XRAN_STATUS_SUCCESS); /* Verify the result */ @@ -209,7 +211,7 @@ TEST_P(PrachCheck, PrachPacketGen)//TestCaseName TestName ASSERT_TRUE(ret == XRAN_STATUS_SUCCESS); ret = generate_cpmsg_prach(&m_xran_dev_ctx, &m_params, m_pSectGenInfo, m_pTestBuffer, &m_xran_dev_ctx, - m_frameId, m_subframeId, m_slotId, + m_frameId, m_subframeId, m_slotId, 0, m_beamId, m_ccId, m_antId, 0, 0); ASSERT_TRUE(ret == XRAN_STATUS_SUCCESS); /* Verify the result */ @@ -228,24 +230,26 @@ TEST_P(PrachCheck, PrachPacketGen)//TestCaseName TestName EXPECT_EQ(m_params.hdr.cpLength, 0); EXPECT_EQ(m_params.numSections, 1); - EXPECT_EQ(m_params.sections[0].info.type, XRAN_CP_SECTIONTYPE_3); - EXPECT_EQ(m_params.sections[0].info.startSymId, m_startSymId); - EXPECT_EQ(m_params.sections[0].info.iqWidth, (m_pRUConfig->iqWidth==16)?0:m_pRUConfig->iqWidth); - EXPECT_EQ(m_params.sections[0].info.compMeth, m_pRUConfig->compMeth); - - EXPECT_EQ(m_params.sections[0].info.id, m_id); - EXPECT_EQ(m_params.sections[0].info.rb, XRAN_RBIND_EVERY); - EXPECT_EQ(m_params.sections[0].info.symInc, XRAN_SYMBOLNUMBER_NOTINC); - EXPECT_EQ(m_params.sections[0].info.startPrbc, m_startPrbc); - EXPECT_EQ(m_params.sections[0].info.numPrbc, m_numPrbc); - EXPECT_EQ(m_params.sections[0].info.numSymbol, m_numSymbol); - EXPECT_EQ(m_params.sections[0].info.reMask, 0xfff); - EXPECT_EQ(m_params.sections[0].info.beamId, m_beamId); - EXPECT_EQ(m_params.sections[0].info.freqOffset, m_freqOffset); + EXPECT_EQ(m_params.sections[0].info->type, XRAN_CP_SECTIONTYPE_3); + EXPECT_EQ(m_params.sections[0].info->startSymId, m_startSymId); + EXPECT_EQ(m_params.sections[0].info->iqWidth, (m_pRUConfig->iqWidth==16)?0:m_pRUConfig->iqWidth); + EXPECT_EQ(m_params.sections[0].info->compMeth, m_pRUConfig->compMeth); + + EXPECT_EQ(m_params.sections[0].info->id, m_id); + EXPECT_EQ(m_params.sections[0].info->rb, XRAN_RBIND_EVERY); + EXPECT_EQ(m_params.sections[0].info->symInc, XRAN_SYMBOLNUMBER_NOTINC); + EXPECT_EQ(m_params.sections[0].info->startPrbc, m_startPrbc); + EXPECT_EQ(m_params.sections[0].info->numPrbc, m_numPrbc); + EXPECT_EQ(m_params.sections[0].info->numSymbol, m_numSymbol); + EXPECT_EQ(m_params.sections[0].info->reMask, 0xfff); + EXPECT_EQ(m_params.sections[0].info->beamId, m_beamId); + EXPECT_EQ(m_params.sections[0].info->freqOffset, m_freqOffset); EXPECT_EQ(m_xran_dev_ctx.prach_last_symbol[m_ccId], m_prach_last_symbol); - EXPECT_EQ(m_params.sections[0].info.ef, 0); + EXPECT_EQ(m_params.sections[0].info->ef, 0); EXPECT_EQ(m_params.sections[0].exDataSize, 0); + if(m_params.sections[0].info != NULL) + delete[] m_params.sections[0].info; } diff --git a/fhi_lib/test/test_xran/prach_performance.cc b/fhi_lib/test/test_xran/prach_performance.cc index f5f5a7e..9696d14 100644 --- a/fhi_lib/test/test_xran/prach_performance.cc +++ b/fhi_lib/test/test_xran/prach_performance.cc @@ -33,8 +33,8 @@ const std::string module_name = "Prach_test"; class PrachPerf : public KernelTests { - private: - struct xran_section_gen_info *m_pSectResult = NULL; + // private: + // struct xran_section_recv_info *m_pSectResult = NULL; /*Not used*/ protected: struct xran_fh_config m_xranConf; @@ -101,6 +101,7 @@ class PrachPerf : public KernelTests m_xranConf.frame_conf.nFrameDuplexType = get_input_parameter("FrameDuplexType"); m_xranConf.log_level = get_input_parameter("loglevel"); + m_xran_dev_ctx.dssPeriod = get_input_parameter("dssperiod"); m_pPRACHConfig->nPrachConfIdx = get_input_parameter("PrachConfIdx"); m_pPRACHConfig->nPrachFreqStart = get_input_parameter("PrachFreqStart"); m_pPRACHConfig->nPrachFreqOffset = get_input_parameter("PrachFreqOffset"); @@ -150,6 +151,7 @@ class PrachPerf : public KernelTests m_pSectGenInfo = new struct xran_section_gen_info[8]; ASSERT_NE(m_pSectGenInfo, nullptr); m_params.sections = m_pSectGenInfo; + m_params.sections[0].info = new xran_section_info; /* allocating an mbuf for packet generatrion */ m_pTestBuffer = (struct rte_mbuf*)rte_pktmbuf_alloc(_eth_mbuf_pool); @@ -178,7 +180,7 @@ void performance_cp(void *pHandle,struct xran_cp_gen_params *params, struct xran mbuf = (struct rte_mbuf*)rte_pktmbuf_alloc(_eth_mbuf_pool); generate_cpmsg_prach(pxran_lib_ctx, params, sect_geninfo, mbuf, pxran_lib_ctx, - frame_id, subframe_id, slot_id, + frame_id, subframe_id, slot_id, 0, beam_id, cc_id, prach_port_id, 0, seq_id); seq_id++; @@ -192,12 +194,12 @@ TEST_P(PrachPerf, PrachPerfPacketGen)//TestCaseName TestName void *pHandle = NULL; /* Preparing input data for prach config */ - ret = xran_init_prach(&m_xranConf, &m_xran_dev_ctx); + ret = xran_init_prach(&m_xranConf, &m_xran_dev_ctx, XRAN_RAN_5GNR); ASSERT_TRUE(ret == XRAN_STATUS_SUCCESS); ret = generate_cpmsg_prach(&m_xran_dev_ctx, &m_params, m_pSectGenInfo, m_pTestBuffer, &m_xran_dev_ctx, - m_frameId, m_subframeId, m_slotId, + m_frameId, m_subframeId, m_slotId, 0, m_beamId, m_ccId, m_antId, 0, 0); ASSERT_TRUE(ret == XRAN_STATUS_SUCCESS); @@ -206,6 +208,9 @@ TEST_P(PrachPerf, PrachPerfPacketGen)//TestCaseName TestName &performance_cp, pHandle, &m_params, m_pSectGenInfo, &m_xran_dev_ctx, m_frameId, m_subframeId, m_slotId, m_beamId, m_ccId, m_antId, 0); + + if(m_params.sections[0].info) + delete[] m_params.sections[0].info; } diff --git a/fhi_lib/test/test_xran/u_plane_functional.cc b/fhi_lib/test/test_xran/u_plane_functional.cc index 13afda3..599819b 100644 --- a/fhi_lib/test/test_xran/u_plane_functional.cc +++ b/fhi_lib/test/test_xran/u_plane_functional.cc @@ -61,6 +61,7 @@ TEST_P(U_planeCheck, Test_DLUL) { enum xran_pkt_dir direction = XRAN_DIR_DL; uint16_t section_id = 7; + uint16_t num_sections = 1; enum xran_input_byte_order iq_buf_byte_order = XRAN_CPU_LE_BYTE_ORDER; uint8_t frame_id = 99; uint8_t subframe_id = 9; @@ -102,7 +103,9 @@ TEST_P(U_planeCheck, Test_DLUL) RU_Port_ID, seq_id, do_copy, - staticEn); + staticEn, + num_sections, + 0); ASSERT_EQ(prep_bytes, 3168); diff --git a/fhi_lib/test/test_xran/u_plane_performance.cc b/fhi_lib/test/test_xran/u_plane_performance.cc index 757a9b9..b4b1169 100644 --- a/fhi_lib/test/test_xran/u_plane_performance.cc +++ b/fhi_lib/test/test_xran/u_plane_performance.cc @@ -43,6 +43,7 @@ const std::string module_name = "U-Plane"; { enum xran_pkt_dir direction = XRAN_DIR_DL; uint16_t section_id = 7; + uint16_t num_sections = 1; enum xran_input_byte_order iq_buf_byte_order = XRAN_CPU_LE_BYTE_ORDER; uint8_t frame_id = 99; uint8_t subframe_id = 9; @@ -58,9 +59,8 @@ const std::string module_name = "U-Plane"; enum xran_comp_hdr_type staticEn = XRAN_COMP_HDR_TYPE_DYNAMIC; uint8_t iqWidth = 16; - int32_t prep_bytes; - prep_bytes = prepare_symbol_ex(direction, + prepare_symbol_ex(direction, section_id, test_buffer, (uint8_t *)iq_offset, @@ -77,7 +77,9 @@ const std::string module_name = "U-Plane"; RU_Port_ID, seq_id, do_copy, - staticEn); + staticEn, + num_sections, + 0); /*union xran_cp_radioapp_section_ext11 *ext11 = NULL; struct xran_sectionext11_info *params = NULL; diff --git a/setupenv.sh b/setupenv.sh index ec5248e..0cd8254 100755 --- a/setupenv.sh +++ b/setupenv.sh @@ -1,12 +1,12 @@ #!/bin/bash -export DIR_ROOT=/home/ +export DIR_ROOT=$HOME #set the L1 binary root DIR export DIR_ROOT_L1_BIN=$DIR_ROOT/FlexRAN #set the phy root DIR export DIR_ROOT_PHY=$DIR_ROOT/phy #set the DPDK root DIR -#export DIR_ROOT_DPDK=/home/dpdk-19.11 +export DIR_ROOT_DPDK=/$DIR_ROOT/dpdk #set the GTEST root DIR #export DIR_ROOT_GTEST=/home/gtest/gtest-1.7.0 @@ -17,9 +17,10 @@ export DIR_WIRELESS_TABLE_5G=$DIR_ROOT_L1_BIN/l1/bin/nr5g/gnb/l1/table export XRAN_DIR=$DIR_ROOT_PHY/fhi_lib export XRAN_LIB_SO=true export RTE_TARGET=x86_64-native-linuxapp-icc -#export RTE_SDK=$DIR_ROOT_DPDK -#export DESTDIR="" +export RTE_SDK=$DIR_ROOT_DPDK +export DESTDIR=$DIR_ROOT_DPDK +#Uncomment to run tests - it's commented to make builds faster. #export GTEST_ROOT=$DIR_ROOT_GTEST export ORAN_5G_FAPI=true diff --git a/wls_lib/Makefile b/wls_lib/Makefile index b258e09..2f8e4b2 100644 --- a/wls_lib/Makefile +++ b/wls_lib/Makefile @@ -23,21 +23,42 @@ MYCUSTOMSPACE1='------------------------------------------------------------' ############################################################## # Tools configuration ############################################################## +ifeq ($(WIRELESS_SDK_TOOLCHAIN),icc) CC := icc + CPP := icpc AS := as AR := ar LD := icc -OBJDUMP := objdump - -ifeq ($(SHELL),cmd.exe) -MD := mkdir.exe -p -CP := cp.exe -f -RM := rm.exe -rf +else ifeq ($(WIRELESS_SDK_TOOLCHAIN),icx) + CC := icx + CPP := icx + AS := as + AR := ar + LD := icx else + $(error "Please define WIRELESS_SDK_TOOLCHAIN environment variable") +endif + +ifeq ($(WIRELESS_SDK_TARGET_ISA),sse) + TARGET_PROCESSOR := -xSSE4.2 +else ifeq ($(WIRELESS_SDK_TARGET_ISA),avx2) + TARGET_PROCESSOR := -xCORE-AVX2 +else ifeq ($(WIRELESS_SDK_TARGET_ISA),avx512) + TARGET_PROCESSOR := -xCORE-AVX512 +else ifeq ($(WIRELESS_SDK_TARGET_ISA),snc) + TARGET_PROCESSOR := -xicelake-server +else ifeq ($(WIRELESS_SDK_TARGET_ISA),spr) + TARGET_PROCESSOR := -march=sapphirerapids +endif + +ifeq ($(TARGET_PROCESSOR),) + $(error "Please define valid WIRELESS_SDK_TARGET_ISA environment variable $(WIRELESS_SDK_TARGET_ISA)") +endif + +OBJDUMP := objdump MD := mkdir -p CP := cp -f RM := rm -rf -endif PROJECT_NAME := libwls PROJECT_TYPE := lib @@ -49,11 +70,7 @@ ifeq ($(RTE_SDK),) $(error "Please define RTE_SDK environment variable") endif -ifeq ($(MESON_BUILD),0) -RTE_INC := $(RTE_SDK)/$(RTE_TARGET)/include -else -RTE_INC := $(shell PKG_CONFIG_PATH=$(RTE_SDK)/build/meson-uninstalled pkg-config --cflags-only-I libdpdk) -endif +RTE_INC := $(shell PKG_CONFIG_PATH=/usr/lib64/pkgconfig:$(RTE_SDK)/build/meson-uninstalled pkgconf --cflags-only-I libdpdk) CC_SRC = wls_lib_dpdk.c \ syslib.c @@ -65,7 +82,7 @@ CC_FLAGS += -std=gnu11 -Wall -Wno-deprecated-declarations \ -fPIC \ -Wall \ -Wimplicit-function-declaration \ - -g -O3 -wd1786 -mcmodel=large + -g -O3 -mcmodel=large $(TARGET_PROCESSOR) INC := -I$(RTE_INC) DEF := diff --git a/wls_lib/testapp/Makefile b/wls_lib/testapp/Makefile index bc47f96..c06028e 100644 --- a/wls_lib/testapp/Makefile +++ b/wls_lib/testapp/Makefile @@ -23,21 +23,42 @@ MYCUSTOMSPACE1='------------------------------------------------------------' ############################################################## # Tools configuration ############################################################## +ifeq ($(WIRELESS_SDK_TOOLCHAIN),icc) CC := icc + CPP := icpc AS := as AR := ar LD := icc -OBJDUMP := objdump - -ifeq ($(SHELL),cmd.exe) -MD := mkdir.exe -p -CP := cp.exe -f -RM := rm.exe -rf +else ifeq ($(WIRELESS_SDK_TOOLCHAIN),icx) + CC := icx + CPP := icx + AS := as + AR := ar + LD := icx else + $(error "Please define WIRELESS_SDK_TOOLCHAIN environment variable") +endif + +ifeq ($(WIRELESS_SDK_TARGET_ISA),sse) + TARGET_PROCESSOR := -xSSE4.2 +else ifeq ($(WIRELESS_SDK_TARGET_ISA),avx2) + TARGET_PROCESSOR := -xCORE-AVX2 +else ifeq ($(WIRELESS_SDK_TARGET_ISA),avx512) + TARGET_PROCESSOR := -xCORE-AVX512 +else ifeq ($(WIRELESS_SDK_TARGET_ISA),snc) + TARGET_PROCESSOR := -xicelake-server +else ifeq ($(WIRELESS_SDK_TARGET_ISA),spr) + TARGET_PROCESSOR := -march=sapphirerapids +endif + +ifeq ($(TARGET_PROCESSOR),) + $(error "Please define valid WIRELESS_SDK_TARGET_ISA environment variable $(WIRELESS_SDK_TARGET_ISA)") +endif + +OBJDUMP := objdump MD := mkdir -p CP := cp -f RM := rm -rf -endif PROJECT_NAME := wls_test PROJECT_TYPE := elf @@ -49,14 +70,8 @@ ifeq ($(RTE_SDK),) $(error "Please define RTE_SDK environment variable") endif -ifeq ($(MESON_BUILD),0) -RTE_INC := $(RTE_SDK)/$(RTE_TARGET)/include -RTE_LIBS := -L$(RTE_SDK)/$(RTE_TARGET)/lib -Wl,--whole-archive -Wl,-lrte_mempool_ring -Wl,-lrte_pci -Wl,-lrte_bus_pci -Wl,-lrte_bus_vdev -Wl,-lrte_net -Wl,-lrte_distributor -Wl,-lrte_reorder -Wl,-lrte_kni -Wl,-lrte_pipeline -Wl,-lrte_table -Wl,-lrte_timer -Wl,-lrte_hash -Wl,-lrte_jobstats -Wl,-lrte_lpm -Wl,-lrte_power -Wl,-lrte_acl -Wl,-lrte_meter -Wl,-lrte_sched -Wl,-lrte_vhost -Wl,--start-group -Wl,-lrte_kvargs -Wl,-lrte_mbuf -Wl,-lrte_ip_frag -Wl,-lrte_ethdev -Wl,-lrte_cryptodev -Wl,-lrte_mempool -Wl,-lrte_ring -Wl,-lrte_eal -Wl,-lrte_cmdline -Wl,-lrte_cfgfile -Wl,-lrte_pmd_bond -Wl,-lrte_pmd_vmxnet3_uio -Wl,-lrte_pmd_virtio -Wl,-lrte_pmd_cxgbe -Wl,-lrte_pmd_enic -Wl,-lrte_pmd_i40e -Wl,-lrte_pmd_fm10k -Wl,-lrte_pmd_ixgbe -Wl,-lrte_pmd_e1000 -Wl,-lrte_pmd_ring -Wl,-lrte_pmd_af_packet -Wl,-lrte_pmd_null -Wl,-lrt -Wl,-lm -Wl,-ldl -Wl,--end-group -Wl,--no-whole-archive -RTE_LIBS += -Wl,--whole-archive -Wl,/usr/lib64/libnuma.so -Wl,--no-whole-archive -else -RTE_INC := $(shell PKG_CONFIG_PATH=$(RTE_SDK)/build/meson-uninstalled pkg-config --cflags-only-I libdpdk) -RTE_LIBS := -Wl,--whole-archive -Wl,/usr/lib64/libnuma.so -Wl,--as-needed -pthread -L$(RTE_SDK)/build/drivers -L$(RTE_SDK)/build/lib -l:librte_common_cpt.a -l:librte_common_dpaax.a -l:librte_common_iavf.a -l:librte_common_octeontx.a -l:librte_common_octeontx2.a -l:librte_common_sfc_efx.a -l:librte_bus_dpaa.a -l:librte_bus_fslmc.a -l:librte_bus_ifpga.a -l:librte_bus_pci.a -l:librte_bus_vdev.a -l:librte_bus_vmbus.a -l:librte_mempool_bucket.a -l:librte_mempool_dpaa.a -l:librte_mempool_dpaa2.a -l:librte_mempool_octeontx.a -l:librte_mempool_octeontx2.a -l:librte_mempool_ring.a -l:librte_mempool_stack.a -l:librte_net_af_packet.a -l:librte_net_ark.a -l:librte_net_atlantic.a -l:librte_net_avp.a -l:librte_net_axgbe.a -l:librte_net_bond.a -l:librte_net_bnx2x.a -l:librte_net_bnxt.a -l:librte_net_cxgbe.a -l:librte_net_dpaa.a -l:librte_net_dpaa2.a -l:librte_net_e1000.a -l:librte_net_ena.a -l:librte_net_enetc.a -l:librte_net_enic.a -l:librte_net_failsafe.a -l:librte_net_fm10k.a -l:librte_net_i40e.a -l:librte_net_hinic.a -l:librte_net_hns3.a -l:librte_net_iavf.a -l:librte_net_ice.a -l:librte_net_igc.a -l:librte_net_ixgbe.a -l:librte_net_kni.a -l:librte_net_liquidio.a -l:librte_net_memif.a -l:librte_net_netvsc.a -l:librte_net_nfp.a -l:librte_net_null.a -l:librte_net_octeontx.a -l:librte_net_octeontx2.a -l:librte_net_pfe.a -l:librte_net_qede.a -l:librte_net_ring.a -l:librte_net_sfc.a -l:librte_net_tap.a -l:librte_net_thunderx.a -l:librte_net_txgbe.a -l:librte_net_vdev_netvsc.a -l:librte_net_vhost.a -l:librte_net_virtio.a -l:librte_net_vmxnet3.a -l:librte_raw_dpaa2_cmdif.a -l:librte_raw_dpaa2_qdma.a -l:librte_raw_ioat.a -l:librte_raw_ntb.a -l:librte_raw_octeontx2_dma.a -l:librte_raw_octeontx2_ep.a -l:librte_raw_skeleton.a -l:librte_crypto_bcmfs.a -l:librte_crypto_caam_jr.a -l:librte_crypto_dpaa_sec.a -l:librte_crypto_dpaa2_sec.a -l:librte_crypto_nitrox.a -l:librte_crypto_null.a -l:librte_crypto_octeontx.a -l:librte_crypto_octeontx2.a -l:librte_crypto_scheduler.a -l:librte_crypto_virtio.a -l:librte_compress_octeontx.a -l:librte_compress_zlib.a -l:librte_regex_octeontx2.a -l:librte_vdpa_ifc.a -l:librte_event_dlb.a -l:librte_event_dlb2.a -l:librte_event_dpaa.a -l:librte_event_dpaa2.a -l:librte_event_octeontx2.a -l:librte_event_opdl.a -l:librte_event_skeleton.a -l:librte_event_sw.a -l:librte_event_dsw.a -l:librte_event_octeontx.a -l:librte_node.a -l:librte_graph.a -l:librte_bpf.a -l:librte_flow_classify.a -l:librte_pipeline.a -l:librte_table.a -l:librte_fib.a -l:librte_ipsec.a -l:librte_vhost.a -l:librte_stack.a -l:librte_security.a -l:librte_sched.a -l:librte_reorder.a -l:librte_rib.a -l:librte_regexdev.a -l:librte_rawdev.a -l:librte_pdump.a -l:librte_power.a -l:librte_member.a -l:librte_lpm.a -l:librte_latencystats.a -l:librte_kni.a -l:librte_jobstats.a -l:librte_ip_frag.a -l:librte_gso.a -l:librte_gro.a -l:librte_eventdev.a -l:librte_efd.a -l:librte_distributor.a -l:librte_cryptodev.a -l:librte_compressdev.a -l:librte_cfgfile.a -l:librte_bitratestats.a -l:librte_bbdev.a -l:librte_acl.a -l:librte_timer.a -l:librte_hash.a -l:librte_metrics.a -l:librte_cmdline.a -l:librte_pci.a -l:librte_ethdev.a -l:librte_meter.a -l:librte_net.a -l:librte_mbuf.a -l:librte_mempool.a -l:librte_rcu.a -l:librte_ring.a -l:librte_eal.a -l:librte_telemetry.a -l:librte_kvargs.a -lelf -lrte_node -lrte_graph -lrte_bpf -lrte_flow_classify -lrte_pipeline -lrte_table -lrte_fib -lrte_ipsec -lrte_vhost -lrte_stack -lrte_security -lrte_sched -lrte_reorder -lrte_rib -lrte_regexdev -lrte_rawdev -lrte_pdump -lrte_power -lrte_member -lrte_lpm -lrte_latencystats -lrte_kni -lrte_jobstats -lrte_ip_frag -lrte_gso -lrte_gro -lrte_eventdev -lrte_efd -lrte_distributor -lrte_cryptodev -lrte_compressdev -lrte_cfgfile -lrte_bitratestats -lrte_bbdev -lrte_acl -lrte_timer -lrte_hash -lrte_metrics -lrte_cmdline -lrte_pci -lrte_ethdev -lrte_meter -lrte_net -lrte_mbuf -lrte_mempool -lrte_rcu -lrte_ring -lrte_eal -lrte_telemetry -lrte_kvargs -lm -ldl -lnuma -lz -Wl,--no-whole-archive -endif +RTE_LIBS := -Wl,--whole-archive -Wl,/usr/lib64/libnuma.so $(shell PKG_CONFIG_PATH=/usr/lib64/pkgconfig:$(RTE_SDK)/build/meson-uninstalled pkgconf --static --libs libdpdk) -Wl,--no-whole-archive +RTE_INC := $(shell PKG_CONFIG_PATH=/usr/lib64/pkgconfig:$(RTE_SDK)/build/meson-uninstalled pkgconf --cflags-only-I libdpdk) CC_SRC = pool.c \ testapp.c @@ -67,7 +82,7 @@ CC_FLAGS += -std=gnu11 -Wall -Wno-deprecated-declarations \ -g \ -Wall \ -Wimplicit-function-declaration \ - -g -O3 -wd1786 -mcmodel=large + -g -O3 -mcmodel=large $(TARGET_PROCESSOR) INC := -I../ -I$(RTE_INC) DEF := @@ -77,6 +92,10 @@ LD_FLAGS += -L$(WLS_LIB_DIR) -lwls -lpthread -lhugetlbfs -lrt LD_FLAGS += $(RTE_LIBS) +ifeq ($(WIRELESS_SDK_TOOLCHAIN),icx) +LD_FLAGS += -Wl,-lstdc++ +endif + AS_FLAGS := AR_FLAGS := rc diff --git a/wls_lib/wls_lib.c b/wls_lib/wls_lib.c deleted file mode 100644 index 83c82ff..0000000 --- a/wls_lib/wls_lib.c +++ /dev/null @@ -1,836 +0,0 @@ -/****************************************************************************** -* -* Copyright (c) 2019 Intel. -* -* Licensed under the Apache License, Version 2.0 (the "License"); -* you may not use this file except in compliance with the License. -* You may obtain a copy of the License at -* -* http://www.apache.org/licenses/LICENSE-2.0 -* -* Unless required by applicable law or agreed to in writing, software -* distributed under the License is distributed on an "AS IS" BASIS, -* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -* See the License for the specific language governing permissions and -* limitations under the License. -* -*******************************************************************************/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include "ttypes.h" -#include "wls_lib.h" -#include "wls.h" -#include "syslib.h" - -#define WLS_MAP_SHM 1 - -#define WLS_PHY_SHM_FILE_NAME "/tmp/phyappshm" - -#define HUGE_PAGE_FILE_NAME "/mnt/huge/page" - -#define DIV_ROUND_OFFSET(X,Y) ( X/Y + ((X%Y)?1:0) ) - -#define WLS_LIB_USER_SPACE_CTX_SIZE DMA_MAP_MAX_BLOCK_SIZE - -#define PLIB_ERR(x, args...) printf("wls_lib: "x, ## args); -#define PLIB_INFO(x, args...) printf("wls_lib: "x, ## args); - -#ifdef _DEBUG_ -#define PLIB_DEBUG(x, args...) printf("wls_lib debug: "x, ## args); -#else -#define PLIB_DEBUG(x, args...) do { } while(0) -#endif - -#ifdef __x86_64__ -#define WLS_LIB_MMAP mmap -#else -#define WLS_LIB_MMAP mmap64 -#endif - -extern int gethugepagesizes(long pagesizes[], int n_elem); -extern int hugetlbfs_unlinked_fd(void); - - -static pthread_mutex_t wls_put_lock; -static pthread_mutex_t wls_get_lock; - -static int wls_dev_fd = 0; -static wls_us_ctx_t* wls_us_ctx = NULL; - -static uint64_t wls_kernel_va_to_user_va(void *pWls_us, uint64_t ptr); - -int ipc_file = 0; - -static int wls_VirtToPhys(void* virtAddr, uint64_t* physAddr) -{ - int mapFd; - uint64_t page; - unsigned int pageSize; - unsigned long virtualPageNumber; - - mapFd = open ("/proc/self/pagemap" , O_RDONLY ); - if (mapFd < 0 ) - { - PLIB_ERR("Could't open pagemap file\n"); - return -1; - } - - /*get standard page size*/ - pageSize = getpagesize(); - - virtualPageNumber = (unsigned long) virtAddr / pageSize ; - - lseek(mapFd , virtualPageNumber * sizeof(uint64_t) , SEEK_SET ); - - if(read(mapFd ,&page , sizeof(uint64_t)) < 0 ) - { - close(mapFd); - PLIB_ERR("Could't read pagemap file\n"); - return -1; - } - - *physAddr = (( page & 0x007fffffffffffffULL ) * pageSize ); - - close(mapFd); - - return 0; -} - -static void wls_mutex_destroy(pthread_mutex_t* pMutex) -{ - pthread_mutex_destroy(pMutex); -} - -static void wls_mutex_init(pthread_mutex_t* pMutex) -{ - pthread_mutexattr_t prior; - pthread_mutexattr_init(&prior); - pthread_mutexattr_setprotocol(&prior, PTHREAD_PRIO_INHERIT); - pthread_mutex_init(pMutex, &prior); - pthread_mutexattr_destroy(&prior); -} - -static void wls_mutex_lock(pthread_mutex_t* pMutex) -{ - pthread_mutex_lock(pMutex); -} - -static void wls_mutex_unlock(pthread_mutex_t* pMutex) -{ - pthread_mutex_unlock(pMutex); -} - -static uint64_t wls_kernel_va_to_user_va(void *pWls_us, uint64_t ptr) -{ - unsigned long ret = 0; - wls_us_ctx_t* pUs = (wls_us_ctx_t*)pWls_us; - - uint64_t kva = (uint64_t) pUs->wls_us_kernel_va; - uint64_t uva = (uint64_t) pUs->wls_us_user_space_va; - - ret = (uva + (ptr - kva)); - - PLIB_DEBUG("kva %lx to uva %lx [offset %d]\n",kva, ret, (kva - ret)); - return ret; -} - -static uint64_t wls_kernel_va_to_user_va_dest(void *pWls_us, uint64_t ptr) -{ - unsigned long ret = 0; - wls_us_ctx_t* pUs = (wls_us_ctx_t*)pWls_us; - - uint64_t kva = (uint64_t) pUs->dst_kernel_va; - uint64_t uva = (uint64_t) pUs->dst_user_va; - - ret = (uva + (ptr - kva)); - - PLIB_DEBUG("kva %lx to uva %lx [offset %d]\n",kva, ret, (kva - ret)); - return ret; -} - - -void* WLS_Open(const char *ifacename, unsigned int mode, unsigned long long nWlsMemorySize) -{ - wls_us_ctx_t* pWls_us = NULL; - unsigned int ret = 0; - wls_open_req_t params; - int i, len; - char temp[WLS_DEV_SHM_NAME_LEN]; - -#ifdef __x86_64__ - params.ctx = 64L; -#else - params.ctx = 32L; -#endif - - params.ctx_pa = 0; - params.size = WLS_LIB_USER_SPACE_CTX_SIZE; - - if(sizeof(wls_us_ctx_t) >= 64*1024){ - PLIB_ERR("WLS_Open %ld \n", sizeof(wls_us_ctx_t)); - return NULL; - } - - if (!wls_us_ctx) { - PLIB_INFO("Open %s 0x%08lx\n", ifacename, WLS_IOC_OPEN); - - if ((wls_dev_fd = open(ifacename, O_RDWR | O_SYNC)) < 0){ - PLIB_ERR("Open filed [%d]\n", wls_dev_fd); - return NULL; - } - /* allocate block in shared space */ - if((ret = ioctl(wls_dev_fd, WLS_IOC_OPEN, ¶ms)) < 0) { - PLIB_ERR("Open filed [%d]\n", ret); - return NULL; - } - - PLIB_DEBUG("params: kernel va 0x%016llx pa 0x%016llx size %ld\n", - params.ctx, params.ctx_pa, params.size); - - if (params.ctx_pa) { - /* remap to user space the same block */ - pWls_us = (wls_us_ctx_t*) WLS_LIB_MMAP(NULL, - params.size, - PROT_READ|PROT_WRITE , - MAP_SHARED, - wls_dev_fd, - params.ctx_pa); - - if( pWls_us == MAP_FAILED ){ - PLIB_ERR("mmap has failed (%d:%s) 0x%016lx [size %d]\n", errno, strerror(errno),params.ctx_pa, params.size); - return NULL; - } - - PLIB_DEBUG("Local: pWls_us 0x%016p\n", pWls_us); - - PLIB_DEBUG("size wls_us_ctx_t %d\n", sizeof(wls_us_ctx_t)); - PLIB_DEBUG(" ul free : off 0x%016lx\n",((unsigned long) &pWls_us->ul_free_block_pq -(unsigned long)pWls_us)); - PLIB_DEBUG(" get_queue: off 0x%016lx\n",((unsigned long) &pWls_us->get_queue -(unsigned long)pWls_us)); - PLIB_DEBUG(" put_queue: off 0x%016lx\n",((unsigned long) &pWls_us->put_queue -(unsigned long)pWls_us)); - - //memset(pWls_us, 0, params.size); - - pWls_us->padding_wls_us_user_space_va = 0LL; - - pWls_us->wls_us_user_space_va = pWls_us; - - pWls_us->wls_us_kernel_va = (uint64_t) params.ctx; - pWls_us->wls_us_pa = (uint64_t) params.ctx_pa; - pWls_us->wls_us_ctx_size = params.size; - - PLIB_INFO("User Space Lib Context: us va 0x%016lx kernel va 0x%016lx pa 0x%016lx size %d \n", - (uintptr_t)pWls_us->wls_us_user_space_va, - pWls_us->wls_us_kernel_va, - pWls_us->wls_us_pa, - pWls_us->wls_us_ctx_size); - - wls_mutex_init(&wls_put_lock); - wls_mutex_init(&wls_get_lock); - - pWls_us->mode = mode; - PLIB_INFO("\nMode %d\n", pWls_us->mode); - - PLIB_INFO("\nWLS device %s [%d]\n", ifacename, (int)strlen(ifacename)); - strncpy(temp, ifacename, WLS_DEV_SHM_NAME_LEN - 1); - len = strlen(ifacename); - if (len < WLS_DEV_SHM_NAME_LEN - 1) - strncpy(pWls_us->wls_dev_name, temp, len); - else - strncpy(pWls_us->wls_dev_name, temp, WLS_DEV_SHM_NAME_LEN - 1); - for(i = 0; i < MIN(strlen(pWls_us->wls_dev_name),WLS_DEV_SHM_NAME_LEN); i++) - if(pWls_us->wls_dev_name[i] != '/') - pWls_us->wls_shm_name[i] = pWls_us->wls_dev_name[i]; - else - pWls_us->wls_shm_name[i] = '_'; - - wls_us_ctx = pWls_us; - } - else { - PLIB_ERR("Open filed: incorrect allocation \n"); - return NULL; - } - } - - return wls_us_ctx; -} - -int WLS_Ready(void* h) -{ - int ret = 0; - wls_event_req_t params; - - if (!wls_us_ctx || !wls_dev_fd){ - PLIB_ERR("Library was not opened\n"); - return -1; - } - - params.event_to_wls = WLS_EVENT_IA_READY; - params.event_param = 0; - - /* free block in shared space */ - if((ret = ioctl(wls_dev_fd, WLS_IOC_EVENT, ¶ms)) < 0) { - PLIB_ERR("Event filed [%d]\n", ret); - return ret; - } - - return 0; -} - -int WLS_Close(void* h) -{ - wls_us_ctx_t* pWls_us = (wls_us_ctx_t*)h; - wls_close_req_t params; - int ret = 0; - - if (!wls_us_ctx || !wls_dev_fd){ - PLIB_ERR("Library was not opened\n"); - return -1; - } - - if ((unsigned long)pWls_us != (unsigned long )wls_us_ctx){ - PLIB_ERR("Incorret handle %lx [expected %lx]\n", (unsigned long)pWls_us, (unsigned long )wls_us_ctx); - return -1; - } - - params.ctx = pWls_us->wls_us_kernel_va; - params.ctx_pa = pWls_us->wls_us_pa; - params.size = pWls_us->wls_us_ctx_size; - - /* free block in shared space */ - if((ret = ioctl(wls_dev_fd, WLS_IOC_CLOSE, ¶ms)) < 0) { - PLIB_ERR("Close filed [%d]\n", ret); - return 0; - } - - /* unmap to user space */ - munmap(pWls_us, pWls_us->wls_us_ctx_size); - - wls_mutex_destroy(&wls_put_lock); - wls_mutex_destroy(&wls_get_lock); - - close(wls_dev_fd); - - wls_us_ctx = NULL; - wls_dev_fd = 0; - - return 0; -} - - -void* WLS_Alloc(void* h, unsigned int size) -{ - wls_us_ctx_t* pWls_us = (wls_us_ctx_t* )h; - - long pageSize[1]; - long hugePageSize; - long nHugePage; - - hugepage_tabl_t* pHugePageTlb = &pWls_us->hugepageTbl[0]; - - void* pvirtAddr = NULL; - int count; - int fd; - - char shm_file_name[256]; - - fd = hugetlbfs_unlinked_fd(); - - if (fd < 0) - PLIB_ERR("Unable to open temp file in hugetlbfs (%s)", strerror(errno)); - - gethugepagesizes(pageSize,1); - hugePageSize = pageSize[0]; - - PLIB_INFO("hugePageSize on the system is %ld\n", hugePageSize); - - /* calculate total number of hugepages */ - nHugePage = DIV_ROUND_OFFSET(size, hugePageSize); - - if (nHugePage >= MAX_N_HUGE_PAGES){ - PLIB_INFO("not enough hugepages: need %ld system has %d\n", nHugePage, MAX_N_HUGE_PAGES); - return NULL; - } - - if(pHugePageTlb == NULL ) - { - PLIB_INFO("Table memory allocation failed\n"); - return NULL; - } - -#if WLS_MAP_SHM -{ - snprintf(shm_file_name, WLS_DEV_SHM_NAME_LEN, "%s_%s", WLS_PHY_SHM_FILE_NAME, pWls_us->wls_shm_name); - PLIB_INFO("shm open %s\n", shm_file_name); - ipc_file = open(shm_file_name, O_CREAT); // | O_EXCL maybe sometimes in future.. ;-) - if(ipc_file == -1){ - PLIB_ERR("open failed (%s)\n", strerror(errno) ); - return NULL; - } - - key_t key = ftok(shm_file_name, '4'); - int shm_handle = shmget(key, size, SHM_HUGETLB|SHM_R|SHM_W); - if(shm_handle == -1){ - PLIB_INFO("Create shared memory\n"); - shm_handle = shmget(key, size, SHM_HUGETLB | IPC_CREAT | SHM_R | SHM_W); - } - else - PLIB_INFO("Attach to shared memory\n"); - - if(shm_handle == -1){ - PLIB_ERR("shmget has failed (%s) [size %ld]\n", strerror(errno), nHugePage * hugePageSize); - return NULL; - } - - pvirtAddr = shmat(shm_handle, 0, /*SHM_RND*/0); -} -#else - /* Allocate required number of pages */ - pvirtAddr = mmap(0,(nHugePage * hugePageSize), (PROT_READ|PROT_WRITE), MAP_SHARED, fd,0); -#endif - if(pvirtAddr == MAP_FAILED ) - { - PLIB_ERR("mmap has failed (%s) [size %ld]\n", strerror(errno), nHugePage * hugePageSize); - return NULL; - } - - PLIB_INFO("pvirtAddr 0x%016lx\n", (unsigned long)pvirtAddr); - - for(count = 0 ; count < nHugePage ; count++ ) - { - /*Incremented virtual address to next hugepage to create table*/ - pHugePageTlb[count].pageVa = ((unsigned char*)pvirtAddr + \ - ( count * hugePageSize )); - /*Creating dummy page fault in process for each page - inorder to get pagemap*/ - *(unsigned char*)pHugePageTlb[count].pageVa = 1; - - if(wls_VirtToPhys((uint64_t*) pHugePageTlb[count].pageVa, - &pHugePageTlb[count].pagePa ) == -1) - { - munmap(pvirtAddr, (nHugePage * hugePageSize)); - PLIB_ERR("Virtual to physical conversion failed\n"); - return NULL; - } - - //PLIB_INFO("id %d va 0x%016p pa 0x%016llx [%ld]\n", count, (uintptr_t)pHugePageTlb[count].pageVa, (uint64_t) pHugePageTlb[count].pagePa, hugePageSize); - } - - PLIB_INFO("WLS_Alloc: 0x%016lx [%d]\n", (unsigned long)pvirtAddr, size); - - close(fd); - - pWls_us->HugePageSize = (uint32_t)hugePageSize; - pWls_us->alloc_buffer = pvirtAddr; - pWls_us->alloc_size = (uint32_t)(nHugePage * hugePageSize); - - if (pWls_us->mode == WLS_MASTER_CLIENT){ - wls_us_ctx_t* pWls_usRem = NULL; - PLIB_INFO("Connecting to remote peer ...\n"); - while (pWls_us->dst_pa == 0) // wait for slave - ; - - /* remap to user space the same block */ - pWls_usRem = (wls_us_ctx_t*) WLS_LIB_MMAP(NULL, - sizeof(wls_us_ctx_t), - PROT_READ|PROT_WRITE , - MAP_SHARED, - wls_dev_fd, - pWls_us->dst_pa); - - if( pWls_us == MAP_FAILED ){ - PLIB_ERR("mmap has failed (%d:%s) 0x%016lx \n", errno, strerror(errno),pWls_us->dst_pa); - return NULL; - } - - PLIB_INFO("Remote: pWls_us 0x%p\n", pWls_usRem); - - PLIB_INFO("size wls_us_ctx_t %ld\n", sizeof(wls_us_ctx_t)); - PLIB_INFO(" ul free : off 0x%016lx\n",((unsigned long) &pWls_usRem->ul_free_block_pq -(unsigned long)pWls_usRem)); - PLIB_INFO(" get_queue: off 0x%016lx\n",((unsigned long) &pWls_usRem->get_queue -(unsigned long)pWls_usRem)); - PLIB_INFO(" put_queue: off 0x%016lx\n",((unsigned long) &pWls_usRem->put_queue -(unsigned long)pWls_usRem)); - - pWls_us->dst_user_va = (uint64_t) pWls_usRem ; - } - - - return pvirtAddr; -} - -int WLS_Free(void* h, PVOID pMsg) -{ - wls_us_ctx_t* pWls_us = (wls_us_ctx_t* )h; - - if ((unsigned long)pMsg != (unsigned long)pWls_us->alloc_buffer) { - PLIB_ERR("incorrect pMsg %lx [expected %lx]\n", (unsigned long)pMsg ,(unsigned long)pWls_us->alloc_buffer); - return -1; - } - - if (pWls_us->mode == WLS_MASTER_CLIENT){ - if(pWls_us->dst_user_va){ - munmap((void*)pWls_us->dst_user_va, sizeof(wls_us_ctx_t)); - pWls_us->dst_user_va = 0; - } - } - - PLIB_DEBUG("WLS_Free 0x%016lx", (unsigned long)pMsg); -#if WLS_MAP_SHM - shmdt(pMsg); - close (ipc_file); -#else - munmap(pMsg, pWls_us->alloc_size); -#endif - - - - return 0; -} - -int WLS_Put(void* h, unsigned long long pMsg, unsigned int MsgSize, unsigned short MsgTypeID, unsigned short Flags) -{ - wls_us_ctx_t* pWls_us = (wls_us_ctx_t* )h; - int ret = 0; - - if ((unsigned long)h != (unsigned long)wls_us_ctx) { - PLIB_ERR("Incorrect user space context %lx [%lx]\n", (unsigned long)h, (unsigned long)wls_us_ctx); - return -1; - } - - if(!WLS_IS_ONE_HUGE_PAGE(pMsg, MsgSize, WLS_HUGE_DEF_PAGE_SIZE)) { - PLIB_ERR("WLS_Put input error: buffer is crossing 2MB page boundary 0x%016llx size %ld\n", pMsg, (unsigned long)MsgSize); - } - - wls_mutex_lock(&wls_put_lock); - - if ((WLS_FLAGS_MASK & Flags)){ // multi block transaction - if (Flags & WLS_TF_SYN){ - PLIB_DEBUG("WLS_SG_FIRST\n"); - if (WLS_MsgEnqueue(&pWls_us->put_queue, pMsg, MsgSize, MsgTypeID, Flags, wls_kernel_va_to_user_va, (void*)pWls_us)) - { - PLIB_DEBUG("WLS_Get %lx %d type %d\n",(U64) pMsg, MsgSize, MsgTypeID); - } - } else if ((Flags & WLS_TF_SCATTER_GATHER) && !(Flags & WLS_TF_SYN) && !(Flags & WLS_TF_FIN)){ - PLIB_DEBUG("WLS_SG_NEXT\n"); - if (WLS_MsgEnqueue(&pWls_us->put_queue, pMsg, MsgSize, MsgTypeID, Flags, wls_kernel_va_to_user_va, (void*)pWls_us)) - { - PLIB_DEBUG("WLS_Put %lx %d type %d\n",(U64) pMsg, MsgSize, MsgTypeID); - } - } else if (Flags & WLS_TF_FIN) { - wls_put_req_t params; - PLIB_DEBUG("WLS_SG_LAST\n"); - params.wls_us_kernel_va = pWls_us->wls_us_kernel_va; - if (WLS_MsgEnqueue(&pWls_us->put_queue, pMsg, MsgSize, MsgTypeID, Flags, wls_kernel_va_to_user_va, (void*)pWls_us)) - { - PLIB_DEBUG("WLS_Put %lx %d type %d\n",(U64) pMsg, MsgSize, MsgTypeID); - } - - PLIB_DEBUG("List: call WLS_IOC_PUT\n"); - if((ret = ioctl(wls_dev_fd, WLS_IOC_PUT, ¶ms)) < 0) { - PLIB_ERR("Put filed [%d]\n", ret); - wls_mutex_unlock(&wls_put_lock); - return -1; - } - } else - PLIB_ERR("unsaported flags %x\n", WLS_FLAGS_MASK & Flags); - } else { // one block transaction - wls_put_req_t params; - params.wls_us_kernel_va = pWls_us->wls_us_kernel_va; - if (WLS_MsgEnqueue(&pWls_us->put_queue, pMsg, MsgSize, MsgTypeID, Flags, wls_kernel_va_to_user_va, (void*)pWls_us)) - { - PLIB_DEBUG("WLS_Put %lx %d type %d\n",(U64) pMsg, MsgSize, MsgTypeID); - } - - PLIB_DEBUG("One block: call WLS_IOC_PUT\n"); - if((ret = ioctl(wls_dev_fd, WLS_IOC_PUT, ¶ms)) < 0) { - PLIB_ERR("Put filed [%d]\n", ret); - wls_mutex_unlock(&wls_put_lock); - return -1; - } - } - wls_mutex_unlock(&wls_put_lock); - - return 0; -} - -int WLS_Check(void* h) -{ - wls_us_ctx_t* pWls_us = (wls_us_ctx_t* )h; - - if ((unsigned long)h != (unsigned long)wls_us_ctx) { - PLIB_ERR("Incorrect user space context %lx [%lx]\n", (unsigned long)h, (unsigned long)wls_us_ctx); - return 0; - } - - PLIB_DEBUG("offset get_queue %lx\n",(U64)&pWls_us->get_queue - (U64)pWls_us); - - return WLS_GetNumItemsInTheQueue(&pWls_us->get_queue); -} - - -unsigned long long WLS_Get(void* h, unsigned int *MsgSize, unsigned short *MsgTypeID, unsigned short *Flags) -{ - wls_us_ctx_t* pWls_us = (wls_us_ctx_t* )h; - WLS_MSG_HANDLE hMsg; - uint64_t pMsg = NULL; - - if ((unsigned long)h != (unsigned long)wls_us_ctx) { - PLIB_ERR("Incorrect user space context %lx [%lx]\n", (unsigned long)h, (unsigned long)wls_us_ctx); - return 0; - } - - PLIB_DEBUG("offset get_queue %lx\n",(U64)&pWls_us->get_queue - (U64)pWls_us); - wls_mutex_lock(&wls_get_lock); - - if (WLS_MsgDequeue(&pWls_us->get_queue, &hMsg, wls_kernel_va_to_user_va, (void*)pWls_us)) - { - PLIB_DEBUG("WLS_Get %lx %d type %d\n",(U64) hMsg.pIaPaMsg, hMsg.MsgSize, hMsg.TypeID); - pMsg = hMsg.pIaPaMsg; - *MsgSize = hMsg.MsgSize; - *MsgTypeID = hMsg.TypeID; - *Flags = hMsg.flags; - } - - wls_mutex_unlock(&wls_get_lock); - - return pMsg; -} - -int WLS_WakeUp(void* h) -{ - int ret; - wls_us_ctx_t* pWls_us = (wls_us_ctx_t* )h; - wls_wake_up_req_t params; - - if (!wls_us_ctx || !wls_dev_fd){ - PLIB_ERR("Library was not opened\n"); - return -1; - } - - params.ctx = (uint64_t)pWls_us; - params.wls_us_kernel_va = (uint64_t)pWls_us->wls_us_kernel_va; - - PLIB_DEBUG("WLS_WakeUp\n"); - - if((ret = ioctl(wls_dev_fd, WLS_IOC_WAKE_UP, ¶ms)) < 0) { - PLIB_ERR("Wake Up filed [%d]\n", ret); - return ret; - } - - return 0; -} - -int WLS_Wait(void* h) -{ - int ret; - wls_us_ctx_t* pWls_us = (wls_us_ctx_t* )h; - wls_wait_req_t params; - - if (!wls_us_ctx || !wls_dev_fd){ - PLIB_ERR("Library was not opened\n"); - return -1; - } - - params.ctx = (uint64_t)pWls_us; - params.wls_us_kernel_va = (uint64_t)pWls_us->wls_us_kernel_va; - params.action = 0; - params.nMsg = 0; - - PLIB_DEBUG("WLS_Wait\n"); - - if((ret = ioctl(wls_dev_fd, WLS_IOC_WAIT, ¶ms)) < 0) { - PLIB_ERR("Wait filed [%d]\n", ret); - return ret; - } - - return params.nMsg; -} - -unsigned long long WLS_WGet(void* h, unsigned int *MsgSize, unsigned short *MsgTypeID, unsigned short *Flags) -{ - uint64_t pRxMsg = WLS_Get(h, MsgSize, MsgTypeID, Flags); - - if (pRxMsg) - return pRxMsg; - - WLS_Wait(h); - return WLS_Get(h, MsgSize, MsgTypeID, Flags); -} - -unsigned long long WLS_VA2PA(void* h, PVOID pMsg) -{ - uint64_t ret = 0; - wls_us_ctx_t* pWls_us = (wls_us_ctx_t* )h; - - unsigned long alloc_base; - hugepage_tabl_t* pHugePageTlb; - uint64_t hugePageBase; - uint64_t hugePageOffet; - unsigned int count = 0; - - uint64_t HugePageMask = ((unsigned long)pWls_us->HugePageSize - 1); - - if(pWls_us->alloc_buffer == NULL){ - PLIB_ERR("WLS_VA2PA: nothing was allocated [%ld]\n", ret); - return (uint64_t)ret; - } - - alloc_base = (unsigned long)pWls_us->alloc_buffer; - - pHugePageTlb = &pWls_us->hugepageTbl[0]; - - hugePageBase = (uint64_t)pMsg & ~HugePageMask; - hugePageOffet = (uint64_t)pMsg & HugePageMask; - - count = (hugePageBase - alloc_base) / pWls_us->HugePageSize; - - PLIB_DEBUG("WLS_VA2PA %lx base %llx off %llx count %d\n", (unsigned long)pMsg, - (uint64_t)hugePageBase, (uint64_t)hugePageOffet, count); - - ret = pHugePageTlb[count].pagePa + hugePageOffet; - - return (uint64_t) ret; -} - -void* WLS_PA2VA(void* h, unsigned long long pMsg) -{ - unsigned long ret = NULL; - wls_us_ctx_t* pWls_us = (wls_us_ctx_t* )h; - - hugepage_tabl_t* pHugePageTlb; - uint64_t hugePageBase; - uint64_t hugePageOffet; - unsigned int count; - int i; - uint64_t HugePageMask = ((uint64_t)pWls_us->HugePageSize - 1); - - if(pWls_us->alloc_buffer == NULL){ - PLIB_ERR("WLS_PA2VA: nothing was allocated [%ld]\n", ret); - return (void*)ret; - } - - pHugePageTlb = &pWls_us->hugepageTbl[0]; - - hugePageBase = (uint64_t)pMsg & ~HugePageMask; - hugePageOffet = (uint64_t)pMsg & HugePageMask; - - count = pWls_us->alloc_size / pWls_us->HugePageSize; - - PLIB_DEBUG("WLS_PA2VA %llx base %llx off %llx count %d\n", (uint64_t)pMsg, - (uint64_t)hugePageBase, (uint64_t)hugePageOffet, count); - - for (i = 0; i < count; i++) { - if (pHugePageTlb[i].pagePa == hugePageBase) - { - ret = (unsigned long)pHugePageTlb[i].pageVa; - ret += hugePageOffet; - return (void*)ret; - } - } - - return (void*) (ret); -} - -int WLS_EnqueueBlock(void* h, unsigned long long pMsg) -{ - int ret = 0; - wls_us_ctx_t* pWls_us = (wls_us_ctx_t* )h; - - if (!wls_us_ctx || !wls_dev_fd){ - PLIB_ERR("Library was not opened\n"); - return -1; - } - - if(pWls_us->mode == WLS_SLAVE_CLIENT){ - PLIB_ERR("Slave doesn't support memory allocation\n"); - return -1; - } - - if(pMsg == 0){ - PLIB_ERR("WLS_EnqueueBlock: Null\n"); - return -1; - } - - if(pWls_us->dst_kernel_va){ - if (pWls_us->dst_user_va) - { - wls_us_ctx_t* pDstWls_us = (wls_us_ctx_t* )pWls_us->dst_user_va; - ret = SFL_WlsEnqueue(&pDstWls_us->ul_free_block_pq, pMsg, wls_kernel_va_to_user_va_dest, pWls_us); - if(ret == 1){ - unsigned long* ptr = (unsigned long*)WLS_PA2VA(pWls_us, pMsg); - if(ptr){ - *ptr = 0xFFFFFFFFFFFFFFFF; - } - } - } - else - ret = -1; - } - else - ret = -1; - - PLIB_DEBUG("SFL_WlsEnqueue %d\n", ret); - return ret; -} - -unsigned long long WLS_DequeueBlock(void* h) -{ - unsigned long long retval = NULL; - wls_us_ctx_t* pWls_us = (wls_us_ctx_t* )h; - - if(pWls_us->mode == WLS_SLAVE_CLIENT){ - // local - retval = SFL_WlsDequeue(&pWls_us->ul_free_block_pq, wls_kernel_va_to_user_va, h ); - } else if(pWls_us->dst_kernel_va) { - // remote - if (pWls_us->dst_user_va) - { - wls_us_ctx_t* pDstWls_us = (wls_us_ctx_t* )pWls_us->dst_user_va; - retval = SFL_WlsDequeue(&pDstWls_us->ul_free_block_pq, wls_kernel_va_to_user_va_dest, pWls_us); - if(retval){ - unsigned long* ptr = (unsigned long*)WLS_PA2VA(pWls_us, retval); - if(ptr){ - if(*ptr != 0xFFFFFFFFFFFFFFFF){ - PLIB_ERR("WLS_EnqueueBlock: incorrect content pa: 0x%016lx: 0x%016lx\n", (unsigned long)retval, *ptr); - } - } - } - } - } - - return retval; -} - -int WLS_NumBlocks(void* h) -{ - wls_us_ctx_t* pWls_us = (wls_us_ctx_t* )h; - int n = 0; - - if(pWls_us->mode == WLS_SLAVE_CLIENT){ - // local - n = SFL_GetNumItemsInTheQueue(&pWls_us->ul_free_block_pq); - } else if(pWls_us->dst_kernel_va) { - // remote - if (pWls_us->dst_user_va) - { - wls_us_ctx_t* pDstWls_us = (wls_us_ctx_t* )pWls_us->dst_user_va; - n = SFL_GetNumItemsInTheQueue(&pDstWls_us->ul_free_block_pq); - } - } - - return n; -} - - diff --git a/wls_lib/wls_lib.h b/wls_lib/wls_lib.h index 7b781d1..254bb9a 100644 --- a/wls_lib/wls_lib.h +++ b/wls_lib/wls_lib.h @@ -39,7 +39,8 @@ extern "C" { /* definitions PUT/GET Flags */ #define WLS_TF_SCATTER_GATHER (1 << 15) -#define WLS_TF_URLLC (1 << 10) +#define WLS_TF_URLLC (1 << 11) +#define WLS_TF_LTE (1 << 10) #define WLS_TF_SYN (1 << 9) #define WLS_TF_FIN (1 << 8) #define WLS_FLAGS_MASK (0xFF00) diff --git a/wls_lib/wls_lib_dpdk.c b/wls_lib/wls_lib_dpdk.c index 5574801..fef8280 100644 --- a/wls_lib/wls_lib_dpdk.c +++ b/wls_lib/wls_lib_dpdk.c @@ -186,7 +186,9 @@ static int wls_initialize(const char *ifacename, uint64_t nWlsMemorySize) pthread_mutexattr_init(&attr); pthread_mutexattr_setpshared(&attr, PTHREAD_PROCESS_SHARED); - if (ret = pthread_mutex_init(&mng_ctx->mng_mutex, &attr)) { + ret = pthread_mutex_init(&mng_ctx->mng_mutex, &attr); + if (ret) + { pthread_mutexattr_destroy(&attr); PLIB_ERR("Failed to initialize mng_mutex %d\n", ret); return ret; @@ -469,7 +471,7 @@ void *WLS_Open(const char *ifacename, unsigned int mode, uint64_t *nWlsMacMemory { wls_us_ctx_t* pWls_us = NULL; wls_drv_ctx_t *pWlsDrvCtx; - int i, len; + char temp[WLS_DEV_SHM_NAME_LEN] = {0}; static const struct rte_memzone *mng_memzone; @@ -490,9 +492,9 @@ void *WLS_Open(const char *ifacename, unsigned int mode, uint64_t *nWlsMacMemory mng_memzone = (struct rte_memzone *)rte_memzone_lookup(temp); if (mng_memzone == NULL) { - PLIB_ERR("Cannot initialize wls shared memory: %s\n", temp); - return NULL; - } + PLIB_ERR("Cannot initialize wls shared memory: %s\n", temp); + return NULL; + } } else { @@ -546,7 +548,7 @@ void *WLS_Open_Dual(const char *ifacename, unsigned int mode, uint64_t *nWlsMacM wls_us_ctx_t* pWls_us = NULL; wls_us_ctx_t* pWls_us1 = NULL; wls_drv_ctx_t *pWlsDrvCtx; - int i, len; + char temp[WLS_DEV_SHM_NAME_LEN] = {0}; static const struct rte_memzone *mng_memzone; @@ -837,7 +839,6 @@ void* WLS_Alloc(void* h, uint64_t size) int WLS_Free(void* h, PVOID pMsg) { wls_us_ctx_t* pWls_us = (wls_us_ctx_t*) h; - wls_drv_ctx_t *pDrv_ctx; struct rte_memzone *mng_memzone; mng_memzone = (struct rte_memzone *)rte_memzone_lookup(pWls_us->wls_dev_name); @@ -846,7 +847,6 @@ int WLS_Free(void* h, PVOID pMsg) pWls_us->wls_dev_name, rte_strerror(rte_errno)); return -1; } - pDrv_ctx = mng_memzone->addr; if (pMsg != pWls_us->alloc_buffer) { PLIB_ERR("incorrect pMsg %p [expected %p]\n", pMsg, pWls_us->alloc_buffer); @@ -868,7 +868,7 @@ int WLS_Put(void *h, unsigned long long pMsg, unsigned int MsgSize, unsigned sho { wls_us_ctx_t* pWls_us = (wls_us_ctx_t*) h; int ret = 0; - unsigned short nFlags = Flags & (~WLS_TF_URLLC); + unsigned short nFlags = Flags & (~(WLS_TF_URLLC | WLS_TF_LTE)); if (wls_check_ctx(h)) return -1; -- 2.16.6

yvQoa<*$c*PZz&@r7KhF@zE&DNv*<$FNXC!o`b3$`3qFRD)Z!z?tTw>wqnts zf}_nq(b2x(tlK-?eUmyt6Ft@!_HzfF+0}^?Jf@tPuRdWaP)H9RDgsPoc*#58coew; zMMaJ_;MZyxo=SZE_Za7?-_Z|J*eZBB(;+6&nTG~-MxD4h=g&MQj$3>tV8$u4q->PP z9wU6Wy-`(4ZK^|ij5ZT6-x*9D|CO#?U2w?&t3>=ScPzu_v%HEJ!b>Ue)uhJ@4KWF0 zxlT~LkPb!uJSNe(fcnnRBR>OUoe~g@wArx!gRiqpL!y);_^xbJO_-mBlPb)Hs*2qS z5uH_6==v_=uQZ*eQ1B=XmR5Ao5_9AAw~;y}%98$8Tpb~Fo1Z@!ENA#YzB&2OhnD-0 zel+rxbwvSZa!Kyu)Ai(TtY;toMqHe2z(9g`y<-8_y!R&pZBdGbB}!QN(dK6Hx+{j( zYojvbMsiiURrr=KNVVekj3MxXv)J1z0l92HobprWua3ssFw`UwyBkjlI!GSMrW+*H zc&!tEth&pgxxemmUQgV0*LUe==PuE+{P8HzY68o9J)F#W^v&)o2X0h|v>FLd7*x~v znv!eGFw`g9igsqndyNFUfsxW$KCKetsy!n?{n!2C0d&XpB?<~EQj{ycr8h>dxT%!p ziA1zZ9@@IRET-+;(5on+59ru3Nby{Fnqq+=xFkoY|Nm!LNyV0=Xl5{LOjCW6iu61FIW4 zNzD(A!+Fu3vX0t6m3lHz~k-d&RVO?vWsx{KWh=M2k zn`JVf4AYma6?5R5(JsATacL~MHp@)+ni{t!( zef;|g#qnH~<^^gnpQ7acIkWK>7kBf@g_6fo3KFg5?_oGtWZl~?`%vf~6F@uXm;Db9 zfUBXmeOSO>@4Ym3Q(vMOScsn*RF=szh%S5hP0Kb8aL$GLHQHm9#nLkIcrk_Fne5n) zilx2i2k|XKy|5(>{0UUY3{Akiu5UtlVAp^=)z@EVS%FxP>$VMyS-zS=3PxEx6aT&A zR;LZBJLEb!9}kj>AqtmsrWct_CoPc#3a7N?IX~cTD7dc6709f(ZJ}&k#(!f3TYS&U z-8-A2PEK$O4~C{DK+YxgI{eOV;~6qB<*egzNPW*zBFj-zL+pUIJ+b=mR0-h0>jv3I z`JQ1_Wwxxxz~_`k^E9;?3DdbTL*J#lMwr(Lljl`V`^K7_&rIhpa6uPNf?y*EM_E3M zoR&kV;PHMcmR;2xJLR^jMYKWqs#n&qPA$LoS_rWYjCC8`5_41)$BT z*DTUKYClFcD0X(_qGQ+rSHqDfSr(RZH~tdxOD(kzLRD((Mnzj%4-w-3FgRPx0`a)! z5m{!JFy=f;HO+58f(+aKa59z#-_{+r6?IJX2E{ukhS_^lGYBYzDQ0SZ1EnOjd8=Cy)XL`K;{3GWJ@Fe`cvTtPIVwI8(#>JBQ9Uy3)^n19$7#Ok;a}D)dH~lnH z*Ga<~-(+wjLlF@)Yr~P9`22j%(!Ye`JcqKd_wQT) z*j$5Hb$GHOm;gu6en>lZz5~r_IJQsv3xx9pGlnH0%LhYPfCe%gQ=1T<-LXu_#p_Fh zWmNtlj{1*#3i*uw0CJBkgrt%!pXDIxYxjfxEyjtIb@e87WFb`IN@3$fB(=WUkL@BA z{kEwbu!W)p%H-4X^`1RVEh>+lLU{V+A2jx*g1I+d4e?Q~O5$xi(hmaxmy?CC-U9iZ+OJ;dflSOQfdc3;FNn?^s3&k=M1@2O{AlY1GsMO zG;GlpcP-q z!?|9O(uPzE2Iqy(D{sTs$Eqx|XfMW$#jv*Jv9%5gp@G7G-bDRoj2VaH@lw`>OX<^G zUqMn+3U@z?B}herjM5m=y`pEgK^uwF<{Q%J@x z;WLuR9-H`{^c!HYqb9!o{#*M`80#<6F_`m!2Q#ALo9+s6oGAx1k?x}boWlrijV}~0 zB77zc8zy;)!oIj3K@I;LsBgE^I#e)N@21>7Shh3`ekPw(>;N$NB#$XzRgkDduiF`r z#wi)`S64lYo7(eWu;Bv0S#B}tFG{iT zeuXgawt3aAq6#L{o~*|A!Q>mH1G7DBM?!Fjyhv#>s0pix{Xejh>?-qj*{2Xo8Zi~wfXmD+r{TunJl+1d3;osJfzCU^olP{r!g~*4xh0aL9HW9$9gB5tU=X#rV zH1);%)X}dRLw&cUeX26318Le>mk@T4Lu> zm)bnofWDQ&vp32b1{~Ftwm8dk)vzT5Pahwar}>p*N@3Dx;55CD3#M~1*ZkSX#xuaY z6O9||3IE~KF;)GC)s&V>$6tJqS(5W%r`^`VAYno0?OP}K16KDL(aFoJt~S1VX|6!`ooadMjxGc zMWyTQmg|z+6biYNExM7v9a{Tk4~u(%jucsz1d&(3gLoZUx32U6NgjGo^BsGpxEt|` zZX25L@&)m_0YcNfk^lV}3bfd+%X~~f5%Zli_@1h6On7w-y+k>`G4js*Z#9M7jccYg zv-0)4Q(OZmN5)RyqLyIGjVhD_@Qo*y!|);e^kKJA`2 zpR|8ublH?=fgiLyb?8^Qo8xeaT2Rv(HPhgX9Hk0C@P9fR4z5e2f>`>HvL?1-vaU<^@8$-R$*;S8%Rc*Iu_Nd%&O*hTk z$2+ceL59DLD?rcT9&8u662rT$hH6~LY z84u9@%oO2^b4cKJMi3O=5+|T)m6B=6#}6EP7Xm`Ic0@ZX0O~DAPZYV2MdjYAMnDPn z+m4x3=ov!6VP@!M0Nfr(g!e-R5~_*DBEf->$=d@-&eU#2?PydFHq2%yTqHy3kR#YE zN%dTvIDjzO{0$(EQa-AdXkWH&HULEa!#dQR{(n3Q4B> zUub5r#&^-MVwsZVieBqdxQDTT#^UFX{w(Vs>SM&_`EVuM(Ty}A zuBLl31zv86ig);O2VS3Q@&uW2${l9lac)w&<6OgD@6z}0P9S-pea7AfmW?DFOI{0+ zs&e#SRb)AVSsH@;U9e~a&BY#f8ClFHrgfV~e*NA&bU*s}rRpYMDgdMRMpE2)^W(w- zHpIw4|I3~6QtY`ZW!QS}8*dkt0wZ&HA;->I=6wFi(35><5PBN1o0#9Ibz8t`7Upoa z`ae;RzTf+wj=y-hO#aBz6=Pigm zd;9VsBN1fxrYnG)_EwBJ;xW~Gy+rCDW3>9GNS}Gu@$P33lgJ@OMrwY0YN@+X$~9%< zGuq(@K;{3*nlMFdq#;vhZ4oxxGGFO_4d4h{=0Zeg#@|mR;yOccwb~X+Tz~PKYC}aC z;Vh074%kUsStmB1RNAx_sp!_fJDfP(Q6SwJ?FGM4F8}7&4O^%6;d)M2F4lpgH zx6Q4W@7?Itv5x0TzlohkMxjzU?~QN}*vwlr%AMY=P77U(agT#XzVQ<>S#|tso(uc9 z!y*T@z|#BqKzfus<`JP7k#c>pCmUd@2v4#u8O=~?_33un0526yLc@#uF8L%@#oR~{ z<(r)Sz^Zq;AL@^Q{!!fZ*p)%t4Zp(1=147`$HqywY%FN@~dd8|7N>&|aB2SWItk%^(AdC?aYEfJF;p}DwbC9Wx7h2+z ztaHD-Xc+)>e3Y~vO#RQuxHqGFiB8kb3t6P6g}HLV+&0;eI{a5P+KgrrfA+pCbG)9h zi!H?5;5KMcD%jTCzpH3GK|3vJxMGYU)1q&d$BxApy zcg^^W{OU%1w#%+pKSTg67&c56OB+q;FxGC?<1SQX{We0ZCh8cym3{}_o(`@JMlB)htnvr1lPss!iN&I(QpH$jOzRi}ucuf=2URTjZkoQn&8x)`E z!fJ44+~~%_XT}kwPNZ2EuD4F>ib-9;DNy;qx3JPe=EJfQkx3Modv~fM8LH6DDnaY1 z?demG3KC2>F-6QNZNjuN+q*d+Fomb7Z~BUyGk0f6Xe`cl1WMu_2dE+o$WKmNP|DwE zjt?}d)>lG`r?pA)B_~F~Md^FzzAQVi!w)tOv{UB}RDu+7<_cXsfBkV)Lv5#4rKbbD zjJ{~@#&;DpsZQ5;c``{)uV(ATZMg%7pm~dxX$e#0IG>17J~wF7bVrV* zegfwune2r6m=pFZE;j8}*L#2YrXHp5ZOeZssBx`P&t~dAf~d`AT|vb5%0I z?su;ddt;0Zva!W&=We@K-sAj3*RfPS9X`jnWm48%`WoZj)2WW-26AQKB9vBrku_)@ z+%N+|K6k1zH{L+EVw3Ei_80r8{g2%Of-F+bW?Rd(~82@f0nSW9hy`E~jE3zpNb{zjk_08{;HfrOHk8BEu=>bYG92>LOkAVK(E)w#QY zQHZ0Woe>KskHmNbS5-N)XHTn?dRQchrg@nDVjgwcN*Xn2aQ{P|OA0BWv_0R=^kJ2eI})_ude{$&Ik1dk1nwD{W9>P+e>!~=1=#>mheWmqASfhgOt!QZd&6wWC4)V{& z`a13lwMiy@Bq{|4%RiPot35o0XU2nsa(#H~ye#wq-*&nUViZmfK9uBP0 zBv!5*R|GVWCM-44dbQs?{>Un}?mOo6MdWThK?0E2%pXUIyw^Qg`X}hH56!@aBk$OQ zx}yq*KB*?lq-a#W=>NM)F#%tA-~EI&tjkm|T%?^_twqakw$$slZ6eGbmZ@cCh?bxi z5q&NW{HY_nalGm;Rf7&0G3TSqkeQ~+uyx**(lNC*71~juRr22IPK=!uC5_^fPD27Q zJo2?f(c7XkEQVwCQ5xw8>){18B?V=G#=Hf>7+&59a?b6htC*Brbbs4nwdc*Zw zjI2nkC||r31%Qavjy5{h;>|gV5_LK&=m!bxndhK=jceRIqSX4Uyf>v({-lBxwbdhT zVtVMVvVV{ommP=XqayAH@cz8D*^{rpxY(4lL>dzN1JJBR3(eY&ji{MpZLhFL1`ICT zet)_Sc?%6(tQa=+%0$x{s{TJtJ%vY0V05V|QhN@}k zkxGb#ItfxQ`-AY_<)2B6nqP{h5$wJ>4j$)RaU&qDEUw@qupC%OX1dF&h>*u&rf4M4 z@P$I}ZiQmfgoejcTBxk2W~Fq#O;9wSlW#ki}!YF@?&yL#)(HGteVSqgX?s z0kKgU+$$L};AM^%pud_t2inAhu{0~^^zhYdYa}6xP2Pq=zBm89mSglc2GU3vKq@Cd;?p3+vI=KUYvE>-WJ>Cb|cS zsndD}^22*)_t998_epjs`Gqt2u1g&BQhHC9uiye$L0&gFk7ac)9PM;Abl=7s*AF9* zyQ%8DL47=E6Rmvs-&z1c*p-n6a}--r(cU0GV_FpKD+<9``#Y?tg|-fgoVF{$Op$iE z$|84Mn9gk}&k4&&&_ZqEDL^P+s#B3VGrh>E9> z6Yu79?^SKqf|OB5NgRb-z}1ts>CJb_`-53G(7@Ma)MVR}KV*JDL31s2*72m}cnYh` z$$EEM#DTh}$VYEmX7x%E{8uJ3TQFgbJ=i*z#G;)Ua6my$bA)o?3*Y+p(!X_en7rK^ zBjw;ZS<-3b>USJVnK+~jfr|A{zRR!{`P|xxOC0{)-15Y;-9EYLt{{ZR?P9cPZtH;} ze=g$XAzPh$1!|~~D^41K)g^hP|A&t4cT$wtI{$Tb@>-)H9Dc>m>V4QBFw0);MK8>d z(B$^-EkSh_y@d+o^hs`hMEhQ?AgCLz$C?&3G`ZlDU`#VEH7By&dP3SZ7y>0^azLNr z9`G?qC9$7Y&?XuW^C?B&U>5e%ew{SJ;hofrV}%I}SlG7vheBnCBx6IHIzsvF$Z@$^ zP#+DSZ-j8qGXEozaC1oJDHMd@19oY4Ih&*>_T4)7jD>dXqEzi2K|YZYrn63PmOEhL~o?k8${<;aJ>+CsT2Z5BX7GDnikzld0Sgb_t~OcRGkX8d`ocK6^wn*iKp0u1e82awI-02`dYQOy-}^_8u?zLn&V z)xd^23i-6hi7F@xHnW^Cy~I0S6osfydE~(nJ+yO?-h69I-F*@eUt9d3@sDaTB5s;C;LiH3j2`MCjzoPOiqB;6Xh=hbVt$1gu#>60&yFrBk_C0IDwx~^|+bY;FZ z79Rq=g^h-BSiOiQ6%SU|XR^(C>E8T_zkgT$qQ~EC#D$!Ga7*F1!TwGVm+OiBN;a#1 zFx|28%f%Nv4V>Zr>Yg8x$??ZpNE!XAiU-hj=eyLN6;yh7a&k*9eJZ{m3CLjA~~k_n65(QZ7)*n-!KBhZ*~ z11ihGIYON7$G>y7_lJ)<^_A{H0HW{{(so(|$qO8<)RJ)JOCEY1ko18rt!DIMfGb(y z0YgsWen<8G^hU)Or?4aNsEoW(*zm6k9;a+?2&wq5qyWPhM97L_r~3hkTXXhozv(0X z^2QgJwLOD`)o-g`lW2{7(=4Oe-8Vde{Ck>T63j2`1e$kPxXn0WZnvlXWROrP zeMdiM6kA-{*&-`7)~=msRHTCHYa~tNM|fJ?_0^f7GVg#Oggm5p@JaHNYh8=vF`)nE zwpq&^cAUK$OQwA+&q{qq@jYX^PjM_gVyIDQMw+7^36$7s?qYG;EAraQXrm?$4cPKW z_>XS8Il#Z%F(NU}O*hF8HQ7Yv`7?fYKnJD4-!-j2zA}ihrq)}|7l_i3!kR)6nf7lA zjr>Yf(Uo~Q_EM_ZJXb00+kxKkjU;Zfs$#w!CoIF`U{!xVy)@P!*qzVhxo;SG^A7^j z2&<>?2AN%2n4VH4z?XVnnk_>K{E@7{+pDz$;Eu^}%BPkSgQ4ym?2rF|IuSrkGlHpg z780sCG6y1Z@2?r`)lZ;yylel25|lvu<8DC;t!)v4x5|f%h&IX|wlITA!+ktq*TMh{ zpW2}KcXx=>5}-m@Fnel{)WYR`8UZM0O{8rg?f$*5bGN1|Cd~boJY9Gte#h%r?vXPT znkE&D1ai=-G?@!8O@%m-rmwW2ywU6^kpU+ofjBYcl8qZ_Ln6G!YaXr!a?VH^vJitt z&gY&s&bu?~1=njaC z2e}HWiZW#XzYs>S$xLLc#kvx3d&oS!F9t<-qP#OZJyy^y06j80mtS)#~Z|Hest zv0o5Ajn}f7)YpU9z0a!o*CzqN$WSE#R%uJO*5UIw@S&5FghC%Sjhh4ef~3HU5=x*D zeP;Etzc4s8^n>jYYd%y|kalzTA5bOS7O%c*1g)n4rF}Dgrs}|H@sITMr&VtQ!7Ve+ z!7RUD+vIqyFXU(#;w(r!frXh0-Az3z0~kmBWtU_5Jhm#+)fR6T#;Zfs?fiqJOY?~l zVPEUISTByJyNG9ex-ga3($yJz#uiWDcd)OatiRx8Qn@Jk=(v&R1>7r6MFiBB+=8F# zJT*G6pJh59YJo|JhxF+F>1Ts$_B5N11WInW?5W>;{WFn>b*D{3Is}T|lNRB)7=m%< zwVCvrfMy$l7$ak}A#pNqh~4T;<>xg!EqDNSbFd0d^Uj(Ww9kQR3f*fo@S-h|UydSS zx72(i&={F}(&b$$D9YVBEO?=LG52)5PpQtvujR^Y5C#cgp8&@B}J z`!G*NJ`e+pk16AOQLdqnp-tgd)E>Eg$iUJN#bnka7JFn!Xdv;6D-(m06mptC@gvw9 zU7Fd(l>`UnoTW8tTr^mW650~aY&bhkTNF{K6lK|D;X`u zyqueq)O8WDer9t#lMIr8kB-6(UJoF5FQ~}Uz03n5-L3k)k>_jrk`$z9pFzx5vymJ6 zTluq2-P4!0nLNxp6&z7~MJt-GV_8{IzKYgc^b&a3=bOZFx%`vANPbbKxtlegk8gS_ zj{NRMAu|Col_Rrv;y5iKNK2r|HOS?S_UE4McAQm1{Dfr)rx38w)qrypSz;NQ+j61i@(jWj{v$eZdcBst66g-R_>s9-SQOL468VP zF$hNHSWl#tzTZTsoj-Em?!296>B>^U@AZIWvdaZCO%Z@j8F2REp2>8_ap5GoYyQYo zp$Xk7J=X7x`xk7GAcs;xeBHxrCa9ncAqR!9)h`H|3$*3`^=wq~{=ya!<%+GLnVq!6 z3M;)!m)xh}RGSg6A7EnS5*6o5;l8k!0!@7<^3-_8>!J{$#2MLtuWEn>ko&=VJ7C)>=>5W{ zXAV@FhTiS_XJPM2b}NM}jHp5A(q!6uL=*^EAn7)}##WH|j*=(auFP8d*DgLg58F4# zvARkI>;yrBXx?w+sUVMg4f&jyBhOp#E{@;k=Mp#XA&}?1Qq z2e!!z<~S;xN9647w4d>-w{D@#-jUCMBRfN26fz{iPS@e0p~W^m4lh7b%E3_N*eKgl z6TkQ=O@S=7TOsGwVnzr%EnJt;_7@sVR$gv~P_FocD~W19^n;MisvjL~SX77hRZ!i* zB+Kh-k!eh@P-C_0ikWv!8f}aXlsHyH9-u9tkl`l>s!SaL>u;J#NP>``$EPlH=G#$0 zaE2oOxhR7QK>$AU-IC)tQ;O}-EocoXq*i+%Q+P;n=#ppO3?=8f`iVL@lA z!Iw^#{7i>ZOX!>BI=6om8JW9}DF|YsH|X$djFKL99dqN=fii<1km3GsTe_7b2M(=6H0|LxII0yb8ygF(jujV#+d-K0 z3X55~-F4hvPY(Q^IzKBB2VJEF`3{aGRt~PDJTC{W(%#s9K0u^ zj4t6^mN(dB#99UOK=Jfz4-Sh5`KPgdK*rtXqUg+n23jd`Cjd zs;!>5!x9h~yw=u>&(3%M0T$QJaaAQ2Ne7HNzEJu2*+&}5o_>{l_C9JKPLpJSKP=P_ z1-t;stC7&?7FrIIU?`8w^r5g(Pu&^5QjE2#$>u9Ijs0sv`6DkxmA=+90rnbVyDz9HTOZ9c*XMFE$7C$Oa}^zWOBy*Z0b>Q zxwk42;VZUYxOj^ZHe~vEAF`YYKg*-nHqvXERe>63C}^jg=t!hmRo1X*;jETd7#?DmQ5oT8GVMykev4 zd={^C6c&_CevGJlr$W?{vqJ%sRjqI-c?sKT2%`3xXw$~gy4MJ~$Ua^Vw!@fWi{EKB zvJKGw$gR}Qd;2`3I=j#HAMF)b9XcEZb>@j}s_clRFc0n)A91a7;^&-n{!(x2z>1Ov zeviQFLG6?YoqA2E%rg7^Xn0raJAqc_r)LJ8TD|#Yss35mg`p~imFSIX-TT8|hp{fq z!CKv-4d%4QDVhPUJsrOHJ~y{i9ol*_$6dgiV1L2l{U>1n9o`LhEwkI zn_{*2q$X0VqI14i2)h=B3LhxEe5{Qt_bQJ+WM52b1Y5FyiHBdkvGt?ZQSH8e%n zmD@)Y`CSFNCDKX4jvN6&Z;=c0mib#15AcecGG&WCtX~;`r}L4e?msj<+O&amf1(F5v+mwwm>g?s+x=ME zB?A{eZ6i$Zv}^Bdw5T>X2@&TUNeo2mPpv8Y#NES4+qz7%<7-qJfCpjF3x%@aIi|Gq6WE98 z2sWL$KX-JNqdl(y!fjso;l(pHejAAU=>^*}lO1Kk-s~m)ATtp!dZddue!;qm0U3WI zueU183Q?uNBKbEpILccTumBk!g-s6gQ!`=$4qaaZ2hXG@s)5F3VSpQ5Gsje8^X(Te zhXWNPxwsshr*Q^R!JNe+*BJnuGTQ)-I?vWO05JB->A&h~6)n99~f z0E|L%}{m<-BQqfJcEpNMI{335!UFJ%WJ9h8jiq zu*o;;*FJV#%MYMuxIg>7rkmh&I*j>;3IDcJXP-M-|4nlquy@p`=sFZ$r+K?n(R4ex z?aA`OH#C26=s!*WnvX|SK-HPtMb7|N0R%PF&q{NzVq?>Fi4!A~%HUgyH2oad-k&;I zEF3bYRFnh7Zg}7-N68LB91NJvaReYcbO@5r3lLeW6RM=wOeo{0hncXUYEL(kz^jL$ zb(dl%Xgp+Xq2BmOY~h}!IG8j`fEH#bPR7rSC#(9Ms)e2MWG+Z}W8G@@%&&NA*i)p& zL`^yg1yVR)5DXQ-V*i8s-0V1%st-VcU^cCcr;b06llhK6zQm~_&~D`F)I}uTC}wfo8Gnhb>Uh4H z<}{-J9=9ojVUp9cAL4EP_-WMT9tuS&+|fKyB*F1-q+=2pmmYv_&LYT_WU*t4r!nS$ zvrL`TnZt<$)HPU=jkU?6-d0DbN{&3R%g%h&uP>Ft_Hzrk&vc}fsw}y6!*Gp*9s!6> z))(72=*vcN)j778a5uV-vD}6&_%mqf6H6Ov?;Z}G^h2Tp(EcT9Y1)Z->d+`K7Z}E}>nIad+K5-_DT=AC=r`dJ1UZx3=DuTstbp z!hb!u9s2tP=;P)45vyRR)8p1h@jG~-Dv}zl6gUi;^8NT%oRoL#)SJy*e{00-rsKpD zU&F?OcG$@ki_X60rb5bEtq%9E*2dsb1(%2x7s?^puqi?m|n?*|9)n^9S!2w*-fKyFajyh2<#PZxiFgg9E~B%o|= zNDLWFxM-vue!zF=8bol{!?-pyy8XdR^#KC*0@*jTp;PE~JWoP-XtMmrAP!W4A30J? z%|KKUIC=WWuRMsffOlCh80|>=lQ*qzsjAxmCV2K6LCMnl$3m$zixxIQL4(4goP^h~ zM@e8V2`Z7P)9aI2jF`1St3clj1-SxDh-ARU%cbiH&Fa5d64y&d34d??0(|##HjzIF z05YKS(uN+>`uP%{s2HZ`*@>~u-g&byqXk8soeW))SqH~gjW!`AFdd)>n}U_~$r&>$B=;_*cYQ744P(hS$4T8t`W>uzDyx!1cqi~K_?3md z=r^b^tXFJ&ce)+P4AZ}N9}KJR&A=N_*)+|CtbDQHR}E*0jM4KuN=rXx3Gzj*teDGA z4TGo4s)JP61y=$7qxba<&KEZh*ir9n*4@Ra;c6>B+3U0j{h(X%#|Kx%47pA0V}O)V zwFYeHc#bN+KB@of>Zh{b;}=Ywp=5leEAD#xWO2en%fi^ZzNummY?$Wwmv7R=D+`}? z_!fC>70dp?$P0&0gDiy1$wJ~wb0>b`E=NRvM!|Xn+yD_*P$$oXDw=U7b>`8BSV7q8 zlfmTsE6mo-8$nx$+xQNb1-pDZ@s61#Qac6ytcyxHow zSkUH38ibqoGR@sRspQjyXW552sypV6h_O@@b&>NA_sz%`P60^eeoy9LuZ7!)tkB8u zjt~|v!V+U~su1MrX{Rj8`Rg@lMw#h#>Q?@vSBq|jtd^jrrAU!kl~QpQ!6o^c`&eL^|V8RS#SEXVTR?st~9uhNv#=J z9RB_TGin(4-B`I(U(q&+p(g@1LUkcYX5Ut`7RhL{i3JgsPji(n}{hmDG1vuKA4aG8(jT}CHN}_ zVX<4*pU9fwA{&#q>Nk7y&S}~a9=PBhJ<~m1?q>zg-J<=#*Z)aLt>{b9|n|o=&Pn^g7QU z8(oAMr2Qggzi+W{Uqr8+?3_t1aqQo4g7h*y0rv~mk)QMeK*|8U=%N)Mfh@VAjE8h{Wv@ui1FI5PYFK89gP}jR{^<+T{nz5} zV}T(Fs_2(@Jg_I;E%_^5j!}c|!WxcXoEJn|aCwH6ndHpTcR#X}V{|AE77ektR8S3K zgKf+Wbxzhe(3WoMOcz#Liw$y$h^+$?Ciu|E1ryPTN08nQ8<)W$4!k*UUXYtAM55hj z@g!czWbc09`ZjxgL5m_+{5Qm>?!q|_EZBDm_x3vwIwFt$SxeUy7(^QujJdwEAPXe# zX0Izdvse>a&6eqXH+?X6hlL5fv(sNr&nITt0;KnEI^ne+)$q3~^AbF3Epm=JeuJYgLQK(pBVSFPr@=1ZwIT2Ok@cP{UzN)L zNmcVr{l%YK=HZn_OqST~)!RR#6(n?UrEGUS31rINpUr8u!{&w?ca+jLEHt}>>Vr$n zj_@;dxf~h&M!%^V~AiJD6xf$trJqPFzEwy0(%j84PyQbE?HR z8YrNcUA4~R4ljz(b#zI;{!MScBS(n`fWmALF!A2|bfkPv-=nH%m9Wi`g}wwvsP_j5 z``d&c(2(W+z0LvUkY@*mNwc9RtEGJ5DYGFo!WSMp@O{u2nX04P@nu#^y1y7twlOXW z?}o){4ms}y+a`MIxt9Vk*C4=U#kCV&eTyD46@QFmzBi@loTqfaY|{Jjvs$Z;y3JMh zXU%oXm0{eNEIhtC|BI%-=eP;;#xQ`hRfJGW$Ba%vV^=9zND;x^AqL_PzLr{r*pa1Mzxzy&BEG@-Jyr61fyTF0NN$CnGoMdJ;cp-L6ujDFjm3w`8@<%d*Ym$-c*QZ$uj z`o9=^%cv^1sBM_;ZjkP7q#=`VL5Jh`Wj zPI*;1zJ%BFvq7F#axlW7>r|r(*f?U%2LT`|#T^q5fViG`EowLag}d;vY|$Rax_DEY zdWd)-eswjCo9%{U|0AgnA-A@iOdbE1wb7Ahm?i|w?-ZN8)*U<>m}Z2lNek-qttT!4 z`PT09PsY|W05%XfLuHu{-4OHa&zfV*KNIX3AI>;)Myow!ygD5wvC`Tm^k2B=%fBHv z`+;|7q_%SIQ-~g^<$#yd#Y6PFA;OZnst?LF5GRNeqVp*0(@^!!Yb8W{0)2dqJ#=y3 z5(L5c(~3HS23XL?G`(5x8VZ2%PZ>nF5yj?u-$UUbWI zEFKkEm}_&+g$DwsLOA;R@DEAM!edc-{N4v^dXX}sy?{ou5^SA z@bE@vSh132zjv5qIoUeLHVI*FnL{PSEx}`6prPI4o6C-_F=|0E?Y<}NIJw(W=M(Cv z!WnxwO*&~s`K8Lxf7~)ved`DZ^6BLCKW(3K{rP(eY>-@JNNInzK0z$FCiuZL+DmSO z_y2zDqDj=Ol8xx=G9P+x##eahMug-E%72i^L-*a@vec#qDVKD*pLho(f993Xc*2(# z#%27{hBIFiMED6H-}{pmyo^9#A6wXf!V78dB>aTRqswa%eYpLQwXeQB_O@bdkggD= zJe9+&cv|;r6ykSWxsm$VDUujKwL^}p;{{9S`qU>u`laEjU9Y={w3F}g`a((3CT=`B zM{VEs^m;O5cgOtxW;nTEYLMfJTxcT>gVCLftN8|g zMq{Aeu;-RkMyhGce{Vz)nncMY)sg(!vE^)kJ9|uOuy*U|6AMKRLMk3-v(rAb<=dbC z&A0;&s7@nw8gZ6L|T+YR3~F#ZDL0`*RA|BcU~;tYuS(R?7;Tx_wluw*EWjV_?2 zOZwFmexNUli(dC-P4Mxo3h zNQgylBoutRS9(L@V=f`Ix$eF`M;6UKBCkc@L7f2Kz;C=t(MlSmLKB)~Erw^%-)T?P z`zz{`BPLPVQayCDiA5u>XtO=cE1z`Dq3ld&a+*1ayq4#iJ(PZ3d=Gs+ED>AFqHAI( z{nCkV1FFFLylod+$&Re?6RvceyM~XQz~sC)wf(AL_LST*z*@^AUxyo#Y6?5zoBo07 z1gSoNs&<pm(?6++(n@bMAItmr2rDZqCnWW``|C?7NLS<;1K2D73-b1Y z&5yhwZG0kz6Q6>Z*&u{@;$W#zD7U4<4WWHJb!9UapLf;NKFAZ*B1(=YBQp6jk^*0Ad^H|iZIp=oBrT{3! zjXnrO98k-BI$JqdS-^CJ<6SM=z=1x};f94qfI|#ME=}V*cB)6vc`uCQd&RIDd4@JG z@q_qU_-6j-{T+WL)mQ1?5P4$pp5wZ%JRLss<8 z3#g8(_6c6TAtx62eLwZ99ZC?4{NxepA`VLSnkb%n0 zyE87G51hHABUvcKRmYg9mCI=dlwa`Mvg-egbfg|RYRr?PBki&GJqwAdeDK%93dz z(MHmSX@SAYK+#blP~)N*SmNSL*!agpD*2L31sncF)>nB7mC}$f2ifw=0v!8qI11uK zO~xpKyg1_GXZHC=I`SPS^71Kb13hpuIj=+Vb&R%mJ>bf(SWAar^(A$X=J=St<0x2{ z2VKH|ws-2h!MYjCG4nBSHa+k_xBwZNveN8289+Et4GQ=JBq(_r!5H~@FVlff_$e$nn`jgk z7IpUQSEdQDU=;0N=x3#Mm_kxNaA5N=9`4AV4jfi(_jrOCcWjdQ6w}w4$ehGwf zeu`zIpjP(L;;x8ec|ucl~c9Z?J6#`X_Z;is$VtODadDM~D<{A3( z@x1==gUBRrDgTcPGDi#6gXPupadM8ZxwKJF!v+A_cw=!oD+fGDV+5sjAf(`rW~ufC zl253K3NzN-%if`Y0$<-dfOm+JVnD?nKy;Pm=AfR1XO;Hco%ZOZ@iy&&Hp7}dvcb$w zBFYc>+Qx&wV-5*bpUIUqR%K&2ORkz!R%?u-c;4vl$>n{`mOpezEApIMH?DN_>}XmD zKJ=lh^S&Wz4dA?i*h@GOMr!G+0vgL_48U3w0y!o?_Nc9PDvGy!}90K7-MUZZQG=y$+yN zp{lD_dGjQ;&nf$;Jjyn^1R1`GIZ9U@|0*@KrwM9vl<%*8H0Sq$ECKGvDs zvofbtEIiImKXDoqM^fx?cT%@My^Vg(qdFX@l{W5m36lM@pMf4k+Ll>xrR;2XW8=cP zA>^Y?FBQk+K4u$*bn<&F9^XU%xT{(o+Iz>b`EPcccZxM?f9HjmV_{(TZw4wg>bR0yart){{d zRhfo^2XG0tPo3XubCD?vTYQ+ys<0LuMQc1I{pr+&aQ_-W=g!VsUnjrHB^T5Nh%{ct zl-a$RyaB4_pXS5xu;AuwBGP2cm)q)7+U2DOtQ<3eOqesdPpBvJr;b>kZ(Lra!6^}8 z5)vWdE|ERupD7SUy|+dfphIguAuNbx>6uu#A?5u!Ow!?S`mBXR%y9?vx%SQkOwPJ= zhjm5g@8M^ZUFtj}q^D7+$3f4S^27791%DOOm-`)K8jP-yyDS!5FbYJ9X3q{q#&YKI zMc~!U{~Wi8|DcUzy_#P4cot5*UjB+DBQ`!mG!l z=Pr>%y14?y<-%Hi>KAsDmvKIgcL%02?r{35HblUG?vO^7PdOPewucM$J}R(~Y6k_|%^M)TOP{%A>(&ubliixBp zf#^HE=sr;N{=exyLL^#5=#RApF}hPYb&SBdr@~?}8Tpm$wj8_b^a|%oL>9lFjjMh~ zH5LjtwA1H^^ku`bV%|8i%Y;HrkI|~wa(AL}a5~lKwKG0+6${Y3 zf}}4N<+X7x@CH?sPWi_Fd4r_C=p)Hux4G$V#P2`x{*b@Py_Y{gF^*~14`ZaM;hfe!*G(!VnBy+(}jEG(p_S%sN8#|3=^ z`dj~`dTSnu#;h8B)sMbJ<97)-sF1~Cr*g+D6xMg)Asfn3LrI}f87`X*=Z!Aj;!9RM z1~|2SFB^Na{wJ=6f7w8Dl{W)4U%3bcRcVTApLfRSe>7O)<9Jtl@{L{ZWaOXumFqVX4!fC_Ye9|-H z!C>_kI$Ycmc^c}W%r?Nl##ZlM08G0%_R%%LFC?q?V@{<~$y|Ezt8ts@uO2cV&%x5AVUJwiHT$yjM>qU)k$AvW{3av$=PJbh>ngku zAyyEfekjx|-9Zjlkpj#7m!AW8%jw(BWTQ6|mKqxQTLk;eWjzUBtc3N@Pr%}1W9FRP zcy8sAbv~_g7Cu-op8Nh>{eFu!D3v@$*jsz>n%znCm3kOb2H92DQqGZvx!(rsbThFMD7mxDz9&Zg zr5yNQ@#g{|cMV~Q*7-+LiWK+1)HX-@@vePAMy3m22_hgtOW2E*!Pn8>i)`MusSj-b za&yPEsz%>*>!Cmf+teX|GG-K4x&Y^AXP3hC!l}jst=2N$G_#CfyDJq^D?_HzrUFW5D@)4(d@M*fiCJ27= zL;!Of<86qc96YHV2;Ju1{VIIWGP_#ui8H)qoLeS+HApr#M$-8@ZNi}q7|krb`+KAa zT=F^Bzb6?P3~0tot9rYguY_$BGhc6*cin_qSoYc#1zeig^d}>xaRGJOv z@7$*NTlY26Udc4`UL0tJs-1$b+kNHRtH|c}=@G$Uo4++IoZ(Gj+y|uylxXB_1X`)K9=I2aLv6qG(nIiXL)od!W*|8^9SA|U zOkg$f3=zoH5wmpq-C&p-^`e8)Tzy~R#b1IDUkNMYcA_INwi*dq6#(nGD=b|C5j^ateRJXo=Cys@yiAQ`Oq*(VPI$`t>8rMa9kE-X!bmEUW-k#$)Z$e1r3^DfUF`wNW zvl8u+p6UNlXy$m(5i9Z1Z0$5lRo9S9irmrW(!OLRi}hUU0iO5AC@!=&3Xg=fr`xl&_HYxT2@2?F+hb`cyytA$K6REX8MkZhM zmoJG=-X7Vb1;(v}X7-8%Zk*Fpq-y)Em@xWu!XNP0Utc(IE>wSX|6T)UT?Vs2)b&x$ zv;rW%*{!P`V|K315`MMy7q9-k`1Cg=h-RkV8J!F`% zjZB!P&Una_gP8@j&s+nTb%2S_Ie_e`l6F^^=p}>uasl*jDSHlFOZ@|{+w#4TFR5leJtY?tc;{{Vf$s=Wo(Ihlduq|Kt?69Yvv}4* zWVelENqZ0ttD2@qzvfgQZeC_;#J-D_6b z$|EJSCGWS}(K9*^iRB2+F^8|b%u6v)*hD$CDwPxVt-si;#D=8+TaQqU`0Vj&`cBFZ z1pNu1J~5WX$3L_E*0awp(WLbn#kam9=Z(gp>SbNRcuh?2ehP(Fy#rwQarMmNYT&}A zn?!SgPOEhm`fa`!MpxAej(`$1Ag-`W;#~(UwzZMl?uif@ePJO%q(!s@At9mANDD5! z^vGfz! z9n))X2iP!mK3|Xn!v*niy1oDbV@dm(9{}dR80ZXC9KyIzsEh)|_rELYl`%CNB$F*o1@OE&5L>O9XN=9$tnZ=QK> z5iH?9=}Wk{#lNmye{VgJd&zV5brH$WT5a}@?vQ~fez@_Qr`sYEHRBi48v?YBnK)bI zaHPE)9qI1$?^#5t((f^dSp&j?qNr;ec=G?`QfVL0AV|$|=Uvp4-w)TN+KY2}HW_`Rcjlo+AeL%C~U|@Gx{*J%& z21bPtG3Lrm{nHq1ID3IcocZquI%&wReosf*{1|NScTti8fmbBAb~4-{rGllfwnu-v zsOBF?<-ITq9%p(Msq!hqti;)Y>FnB>M-Ca;yj(U4+|A*wY+OoZ`!31~=F!BLf_8oM zWk+WaG}nQFf%!Ior5xd5sZPFCL9m6%(n18%LO9Y14szuJMI8~D zJT(>+;e;UYP`5w{eT@{~^U?BfcZwiZPE4rJfNI~ijWQ9km@q2?Rd8||H7g~e^}DZE z|E8c*Za9Qd-0eBw!6spt%8ckMPk**0TQRl=|NI%R}eH#K! z7|{z}mYZOI$-tAK8A!^V)w4P7&=bu-L2W-wOtO1!=ol{iY?e$=<9BZB1Mg*8^$RJl zQtY~*R}wZ>8V=K0tUde_NH`Hp>I2HRZ11?WOx31u{rpB_hNS&0}ErA`gds83gsDStZ(5ge`Hw zul1)Hug@4i@%xmOK^6vCKP#Xb8w}e|?u$kxE zW?-bFGTtQ?ibGc@^9?3cmJFP`9G#nRQNyR`K`HVYO-h-rWsf7&-f} zFBu_bN4M8@U*%k+mNShoE=HpTM4itD!D%hiBnD2oG+lbS%a#<^GqRQ$r6WO(tD{bk zn2xq0?oij%OagzAt2-oNdsVMd`@U=5=->(Sk!MmdB^y;WV$g?`{_PnC6Z0AsqPp`t zEQh>L!O&UH7_UqU2UD4Of#*xTrxjW?fb+8Y;4I!vzd z=H^|q`*&&R>B&*ak%Q3>QOFgb!E_!dI6^XQrsh3sEXdiwh3U z&U<{5&-e0`qYHl+zsQSzy+^WA;yY(M55V{1&%5oq=2E3##);C@f|(uns$W4oN+XT= z|G5AV6x}2qax9gHdJ3rb9*~72(5-5;(;VkuFA*$bYkoNG`vjdtTQ;wJ*y}2)`b}^{ z83)=bSV5tYy3W*?Ji864+GfR$Z&R=<&w>Q^0?dRutzMQ*5FCM2nfA_PH0DUwk_8dn z2?F3h_*qo`d=7yos#L>o6$A-6^THMNlgd#u*xkjXN3|(nTPSJpZH-wVVca@a4yU8h z>rweU^AN`&@6~p?@)!k*|Fh{B}FTYdx%k|-P_(yvdluUZ>N%|D>I5^R{D?zFUxc!-6MO` zup^1;W|Gn=w0w=bcf)eD$pEvI^ks(OvbFuGH`9o`Xe;`&G~{r=gVlAVV4dS@6!l(e zo%Hla4H&|G)F$1toP<*Z9JyAACyh2w;K%K6aklYN_6Dd+(Nwk^RSvs9+CSs$zsprI zdd4x=U6~p?5*;d|x36WnVI$wO@Io7^mQHTv{H?1@GdM#N(@P=sJ-2}#K@s& zxLmAMB(~HZZ#^7;k~tL(1lfICQoxUtR|{QP>kL=s7Nuy(L*7S^c<9jD5$YSID>n9*SEa#vu~WfumZwjjsUV#g%QUBt$p9HY+*x*^Z>M zo8y#}`GHFv)0(-vU@`W~aTFU>1f?L?46Us>cC2(O$v`^Zcp%x`F^v8gL3ey}+LvkS z>%_MtcrdaA{J{hFJuSEJGZz9OF|0->+}qoMhDVLHGVwqAb&`*~mr$kwelFO2#+yDh<0Q#e;X-yc{dQ>c>;N`oWvF&_xXs zfByw`xdaB4bxCbQnH)<=i}tT`lbD`luz#IO!Bz(d1ksE3qk;`h8T~V_v*}o=a2Nz~ za$6J6?-XWzJb4Ba4c=Uz`rEZ0fN)YozvmpoVEOCYh+3VV5IHovGC}#^1v9pjnryPlE!k4$k*>Dy& zR@afDo(|R}76Av3x~Dd1x;NL>6|bF#_Y)5I!l({zd!a{)G(EaF5PðWh7NA~RdV zy{_}Ahnzk(J?|C*=h#-LhfojkYgOSBM$GN>SD7(!s&<66Z0w@B_VT8wX9-BsxR|jD z2CK-XZRWuceTX?(9}J^ z(%5;(AQQ`Nv3xS(cwmp^ZxvetbDjLC?FIMuzkc5GT-7h%o0BVw6Au=`A`A~@$bXIl zwpp0ug+S{zr^FfaU-U6jP+l7mY>85wrBVTWCk}lHB~*FQN3HscN5GJ^~g$FyI5sV@w#YFre?qquh>K@`L0<| zZPe|?uK!s?XQ*cZg3QkV*lQuGDhSSH)%SsiV(N-?`-Q2r5N1D*8I!U+;QeG%O=$%& zw|OOrfB{~CI!botcuU7KBuH6{h;05;hPvaQ#h@=WNO2Dr{lY0VaGVS3L6b6bquI97 z5CbFa#&~q2&tu3E10Jq6yoD>CS%yp7is8S|Ll*`#pp9?!XL3CXwn= zZABwi+RP9`&J(eO~%@AhN46r7=q_lYj~G?wyTVJo>%m1_Ga0Q&Qo0} z*8c=Zu0IjUu=ZB*mR=;u?O7`=*X0OWcgLUFlF^8fbbM;+c>f-yZ|qLg7J?6Z{$VqujC zxEx{aG;rkX>>JJ8vYz=vo-6|G``RF_=aX|+{A4}i0t9v09PayWbs;U4NST|@q%g#j zvREK-shdPe4p%$@-Ohk%Qq5GUWE<6P_8vNP)tB^YzbVpWpMOE8~)Vr@NTA zE@C;s_@&gr62FU{&$jJ)jWrc+;MY1j>aEm9oIUmcS;=?bVLj5go(Mqj-c4HjTfUXu zUoJ;tRnj6_ZWt9`e4UgWP1>~-W@s0}@_U6r5+$98I_Z7$=i#yAm?)u{s*mR>Pso-( z+E62-#Rhyew{bwDG>RK_+2noNcceSN4ATxZw)i0MuF^k!h_+pA3*klMA7{6^a6}*S z`j2#H&(Mh)$;|YXKQVI4qi@%oXALAs zgp<-Fo}L_?Y=4GmihJ?1%ZCrdd=b$M)A&Q3_r8P<$i2ce;qtzt=euRH{!1LRfLRC% zUW!!>-Mvi=dnM6;+%QBdBpHZV$#iOA&B`GwJ)QeZ8Mq}Y4SDA4JLZdW;PY@3CupTm zxMv&Bx|lTA4#sf+-TK3tpxYFL7i+2Z->vcj8|^gA10Fn?$H;4)XSKeTr#h8)nv%hV z9lUb7$c+erdKMiUgnTjd&+GlXAuL36ibtkv(A4qpje5VGx9RnI$|rr)(n8r0DMYsq zAF@1}Xn#i-IAc34iuHZ4BHk4PJQY1nQ&u5!K6M2%uRT+Vu9P&SoRI6!d$hvnvXUzZ z86rZ6Vsux`PhT*+K+#C66bpWA&R|_f09C~ejuk!?UzJ-g{j^x9?lV|r(Fm8`vd2EJ{Hx(~eAXlKH#C#%07RBdIFC3#{RiGxYQI=?* z6QlfsEl@s@K^n>ySN;${@cfyQ}P|(8ycnwV<$JcgfCS^XlC+G{=^d@ff*+(oIN0u7RgIfr4 z2nC3O>YdofZ#OWxF-?Q0qmQ-lhvZNM{$y%0?UzySS;r(| zfYB0`%q&3wC+2dI#?xfP6b?;A$RDd`Cs{aB8Y@@y*sOdJ$~1_ud~_2hk>S>qegh$$ z;>QQ!$^azndLMM`eHoH?5O`I~^ky}X7rQ6Fd1)wW>!famgqqtfZn4kOEULDL` zU@q(*lQFjspq}UI5lX@qz$N|!Na!RSo3;DZg2Dz{M*RpqR-`b6&bv_2i6OmovMN#!XzPn`Zqp?kF@j; zBWYtyh9yYJSvW(7-qtkJQfka;K~OlYvrPmDPKtJ6>oM>?E6XT4St9FYbq?J{SYKWc zn1dlQ@th{b>X4@W9d9|x)*BMNtPa?j-7mk0?K4MeSDHvPkh&w_4_!$zV6;1<=qeJa zqg_JF{{S93@yjluZAW4l7?&O8+C1u%a76GplTlgdnHwYQ)a4{iXkk;jd)2(E7ll{1 z3ufvJm(1QkVtdd^#JYZF?MOY4wC zFoniYvto2}38klM*kkF}S>!M)jWJ<0^NJMMAd0#KuBB9Qr!@McE_5=x%%9^OoOe-t zjXz%%;hH-8IE-4j6KTQ0r8LYmuDLI}+h)-M#5D)ndVq8m?8pAsS~q@#2XfTSAZh|3 zL_{zmTG=S0ac}`QYhNa~w0M{ACYL@Ek3FmNk9z5E)EyEaNCVE)_wbCZp}U zx>}gznZIxw{k~6ipam!3A$ZRM%uZ~c1SqQZ$!$oO2C!x?PfTnlsx?0xt(4jxN;Ys` zMP2dUU|}ZdC1#%qEX(>Q+?oJLF53$1O8ixlhmwIrUhyW~(hrU{y$l;XR}k+;WNsDSL zj#^Snnptp?vMSCn;!16)wgz1=`?8qDnh?QcwO)soGQiO85hz7B%Sb~eil^hEUm{W3 zNT_kL31Cc0<~sD~0H>9jxG-kL!p*OfCsfQ%Er(*QxD3!A#wbb24MH59kyE`XWw>)d z0dh!9s&fiXd?iGw12Wj!7cE!y=^o!hJ9W;-wI+gMTC@9a`wKOQB58xphP;C{wa}v% zm;H%xbYeEGa4w7du>Za_>>x27+mWzm4QPEDP&qBD9)n+1d>xJ_IsDVBf$EV0!MMLv)dc0S)u^}M$;B~@&0p_57cR7FX?~j&pX*V61*x&$nn0-7w8wg zJm0kQfy^~N|DkJBA)DNYzGZ}0VPq1eE2$* zTRAeeza+YZ(^mr!zujNdyjGe{} zkC>mJNbbJ{JX_3N$8c}V@~g$ri{DbaUG&Pot>15*}`|c?<;8K6Z z?^p#f2fr!@h1lJ#DKg!0cMtVcY^c3el-%+ER=R^Bx@>Ef_57hOuc<&atu=pWl_~P< zE+9-3zWh%(ELh(blIYoK;on+`jm~P3p7(^Cn!b`(s4Vnh0hRyn=fCkTRf_`)nt`+4 znACsE9AYm!{Quxpt26qD8t zk0Y%qUZ#sVL+niTV>F}#mN*kh{R9&ZV=@G6N+l}=Xh-oUg1e@07+Bz?AEkv#RRYmk zjl{UbNh{-sRbZ$!IR(gf?6nmjfiepnEg{TVh_gp!vHvLS5TLMNS$pgZe^U8Lw*`8< zN9YAe?*kP772e#0U0+CAJAqCxzfJ)E2}k318@?ICaF#!;f3cN-HqRQ|fU@GvVNA}t zp(jCAWJB6t?IySge7Gak+^*_to+#FF8(uTlw5+v2&e&+hIq)ZrpF(rZh)$^Z)etcb zj;96M04-LfaXDNc;AQOf^rP#wq#Prf(IAoU4YxqtH`j@&t1_B+*;r7bXK1b0rqRzBFo3J*rF; zqcBbi4~yjzh&NSQt8sIQL7X;Ome6C5yMcC!1&sDBuuWQqPqI4bu+qZf^ z`uK8wId#nw6eLvyCmq6^w=&i^`bT^6Y!gevB4rgZC#Wy^bC5JiirE(^V<~2}w{u@c z`KwDUE+*a2e?*sT&A&c>5|Y|B;9aNisJ=zP>{Olbb^~OKS-A{_qkEAp$d0i?T6#K+ zVHztM`Xbxta^n>B7uim=&(i_2Z7y8M!zUo=kmll6p1i~rvPO{S5y;aKj9wW{en%Z+ zA;C-$`EHp8P1+7q-u?dTR0I&<2 z4=|}@peWkZsc>S{#6m759K!g^-n=+-^%V4dJZBkeo3!(fS+smH?OW@oJ>C;b*3^lA zJrQe|9<33;Rl*ym?{Ck>2?fpu9I?oU{AejR;T6DEiMZ@go?3oSwyn%-bzFvQNj3OQ zkLm#IFB53w#{#GYtT-q-dIBB(s$<*M9rB-2&f_(0g$RMuSes7&2YU5Rnb~X^SnT<; zJs(AVCj>7o**_PO!pKrk;6P3kWa=KI?z_5A;5k=y){0`bz%{Byt@19#|t^0lH=uQF) zk^Suty|10BV}tK~cO!>_j;uJ>4Z1;IEp({tk)R%#Q~{1m_hIMOgm!A`hECygM-Jf+E- z_VDR&k=q1%-L>e%=TvQ$*-MKrP!Mmln;;wMM{T_^y%bxl>?PH1;{2Z1D+;b+?mSnG zq%nm1-nby8st%88pNvF}{MEO0tY(Uig=jJ5!0YB=V117aL_sQLn2wrK(#e>G_Gwoy zsZe0-A=&@B5OqyzWYCT1LWoA_F#P@|_OF*U{LkG>p-O%_pdO^G((j7{! z>g{KiLzLttElZ`YT2mThr_#SkjgI;^{C`6%&;;2YDZR-v!{fi)Sn51AI+G$$i*bJb zM$pRS#C-dVV|W!*tNQ8)Y%b42@WJC5Z( z?cdI;)UK8e{~6v_qsq~gHgWgWkDTPdQKs}Dg9rV@RqmkImFG2YD@0Hf2rqNvB=Bz09krE=RxiiRoU|FH4u z0oIPYL_WGXHEb@vILnLm_LM7M$z+X^%!SVyCEsoLdS3s^ZYG$(e=RVv?9H-=0&04_ z)=AxC!|_2`*s!J=hb=+;q5*r3ve0Kc-s!)$J?pN+w>&Tf8z=H`pV~-%+*VRo@G}7! z*yK)Ck!rv{5)V&;Ep)5+fvMidjq=(;anjmyk^)iUqM>&7<3Kr=W!G)xQuSSK8Qh>4 zKx%i)c;Fn1_l~2$Z?>;ASF!Hy?KACbsh9B+UHunOamvOVvCCTyr;Cp@uT6RvQ>yz#R(^A=C`Q3cut zfTBY?HijH*5y3t`OGFoeqR2lEA0UmBP8M%ZEqntAUsHe3B^s{n)%C1DiYh{WBs%Np zt6SYWiC(5#CuvsKdyFckHd>3s<99zj^+g88h&)!QjM&Yr1IV7Rhc`ey34Ef~*R)D_ zC+_Txr#g%-JM&J~tDG`fR>KiI$p$5uErCslT+Q zZPtzRTfczQ2{#>lc!Oiz{avK@;zdu-*M%~um8U=Zg3BS3A>hQjQR)qpHp{maXBLiY zND$j*VN+1VXzf@NK^DB}V4V}ban;Ih+4`S8GTA_p!j53-l~CPG!Hlc7PS7N56$|T= zf=Wn8HFIf=I!{iaD8)dp2vurvSCG$^vxZaQ%Ah876j`YTu#na=<*oT0DEK2>;RE15 zWj*A4;B{lZD;EfT=Wf?0WYz;7E24^^jVu6aD;J9K;)IEsba(k_f}>o(}St3 zH+v9WC&DXL_(Qs-1c?7rus0XQ-N#mkD!qvT8|COO2pVdsHvf(ldfOV2kWoelD&{US zMPb-^nRz~WR)8s}r48m@R8_)5evT|h6OWB*@z?NlAq_iJ8Hl8a1|3r5c@qKQw!gfF$*JLXNyLZqia z+`mRu*5~4buJ;@o>#4}qKfbEi;0&k{zw7@V`^t4Q<;~Wz$tx(_x(;Bt-lt@CJTkrl z{rs%r+r|HEQBN*dB~5=>*zY(6$(6CDj&4YFmSuMLI0I$U(lKeqGr^fkYt*AfETFzl z4;-ryAV4`6f&2~6b9z;?89p?KDsXYapzCI7u$GeO3q(IZ-y-M)6Oge6O(h*mJNgcf zGv4`-Ans`Q5v|ycr|5?U93pX@cAiWkZYJFsS8Z>e<16zp#%c9Aq*r^UuxbL^ zEI@=hzwkx0aXdrF@2nGF(xjiT6R2XRvidyI@VrJL&_*py zrQzQQAV3#UW=h=CG%@LwG3^<>rm@%-P~P>{#nJH{9mFhrAII@FZnes>vvs>3i5{ik zQxo73fHXZm2LOEPwU^f}4iRt|V3dEQ@IOlfMI2WdC?uvSR?Bsyk{7&t{9Qk)g)Zo7 zjr@ZDfZ-!6fGkj56ld1fB$^2uFsq#)=^SN!R_E}Z*?MDCkqjqS`J=({Ta zRJNhfyL$X69ao#m&Jhnl{J*`CfOBdX9twW|zBX$znq7hbt3Zwu23H0^zf!A>zZ)S^ zP6t_4xHCTNadDQYjTB1XV)!so{dah_P6ViMi%=&#=xA*O=J-B*m0~j|K9g9WwY!Y` zGPJym;$r~bk_cBm22bB$HCziBHLA}D+)i-M#kULllTB_@y6D8tmOH(w2>Qt%)k&dr z;a!Hat5i^f9I1ekhsSdCTHfD{;`7CAhy+5P6GZo`rn(e!jSFF(`lSfE7E9z1;unu& z%Mj)#iuxTFg8derk4jwH87{XIDwzbJ6i$#xqU;N%lpqzui^&8O(I!~1pNnr3FEq+Q z*-o!!sVzF8F`s*uSm9H;*7effQ-ugg3{8xTs3}dav8>omB$)&Sd|@g5K*WS;j))wf7VUaQ9K5^Xbe4h;btp^?-(~^-N6n%i&@5#jlVQH^*ZmKK(5@tCX`J|Gx?VE; zDz!MpqUMv&;-XgNM2f*LsvGzB9l|I)F#PN%{0L4Mw?b7yy5~kzlg394=;m);*>{M7 zj~9cHRwSHw!OJ+HsWlj~t&i-3aUuokIy1$?;NC2EqO^JD{+w*^z-?Weyl3856KFHNZB z>4bW}A`8$sYYG)42r8A69x)`6hi01=+nv_?=Lp>p+%U3SiNt>&cT0fT6Z(d~?{!(4 zHJ)oAJ-A>&6lfymb#Ny3E1{BDC%4o8P(k)DX>tL+lgPZyMCWWPcjTUahYxjJ3*Mld zG$c2ez4wSIlvz?+m{Xi!P+#<3bNK^p&=95|K0v~xx;l<6iI#L}Y~^~+ay;Ha2<^Tx zc;7oS+m10MO!4q7;`0{faDmGE2?PG8sjTp7vQu}fm87?w$HM{P91{yZ>M04FOYQkk zw2~e17?WbhO+mGql+`o-3WfGBUD(=JDP}=S2CUb{5LhPWg!^Noe7;1FJ3l{{#Vutf zRmY(*0DwrwUTqYCK?F~+X7g>E0Y%|uJ+{cq_PVJI;%X@|i@!ZrfsN#Uv9~>Nkk^S< z_4dR-e7|3ne!MnXN|gZdEMAikAwI_?RK99blV%t0T&iG7S=TEGry3CNJ-uY?DXC$L zD!MNel7|_%|NWLvUDm-(eB}+kSW0Y75$&PQcfDz!JbCTEN|3ME=kg)M?z<)q23p^f z1NHToWq(t=0*aexZz-2Iq^6tu5A~)pdVKuopfP7*gmP#{_PUStRCCTgM%UI_PY9#v4#u1Ure;s(oNN_mD>LZT z3y%~INGLDaK{^f&GM&&Ujdvpc&#JI!&IF$>dX&CcCL#~*(K?=^7yhZ^P*<1~-(zb4 z0)nw#+rPFr7(i&no{BeG^tZVOM91MezIfYKj2WSI=yd*{Grwu#w2VWOH^@_@|Ewf2 z_Sl-SUSL~naU=;fdby^%=ilBR=FH*q64p{Sy-56MTU%rjNp63IfoI+0w?U(hawPe* z0>Udt$*WaI@?RE^1Uj*Y0$(6J>c@lO+8v?I59A-5JRIL7Sc=4nsy<1wbm#J{Sj>9x zUG_$2pHy{9Oe0qfu2`<|AmrLV{JA8AJmh3~q+1tfrN7C%&-{+j-ORXAR!saejU;3! zlD@%AA#>ggka0*`XO>Qir+n#+cvs0-GR!{3K6f3vB!6}FiZKzR^`ko)pq=h0K;)s? zN$Xw`KXVNLj*POMYVe9#`E}k}6aH`{3x|_+=S3j%6v}kl(86{**_J1?ES%o z`v^YzN$M7_m2pe?KV6rgpcKSj;nJr$WjS%#Oxzav=#>Mw@iiWYC=pX=vU#jP8GnvVl4k%+lJRtN1a$5^s0PWp=%Pq$PCgm3-R z-d8tV%4dm>et)qay53YzN6Gz~6}RWa9`fTm=gV>2{@OjT%okxr&PmN>4Y_8cq45;* znI{#}guANvh*_8Uz)-*PK$`EykD*%)9bWYUZ7IjpP-yVconoW>p`^1r;+k@Sm;9pg zJ5T9&2hth5cSMJPhybsS#%Hb}Jy%Mn8Nrbx*`e??;qufv;`hvp3=E!5e%< zhkW(X&#fZC3*wz$*UN)>#`;MsC2y(8MQxvEdw>4&E&ipGCAl@(y1~Bl@%T0|zZ1H` zQZH!S`3oAQ(A9GW**aL^SyurDoGUYC9=9uEPqWHJ{~?lUTpo(l92z}(xa*OKXGrjb zSLlvS_3O1lM>6*~=rA?9;yIe~M`pBmc_bje{7bfYGm%JKF7VKpK{zW~U;GPqfQoa$ zA3y}RLi21Lr`g~eD>uELxW7{e%77e+a%F_?_gUt6*eT7}M;M~1G=;y0OP-3kMB}$> z;nw4Kyi=K?=;VGE6Dhle;-j?LF)xKMkH&bcju#YgEc2$*0@06<^LlJ)bTb)XzBkmt z3QS@DYpxxyBx*f#b1JoQEp^}Z5V}Cxi52`~JOvsJfTw*s7mmU;?v(t6-y2pp#AexD zcW`j*ycHqT+Hkih<|!qpM<6{Qv7wy0f%DdV=Cs|*8bNkm z4Fqh{>5mErE|UL|0t$`6wwJu0i5R>O|v=%nQB81=$A=M9ZL?U!vT zqN;=bF8VKxA_0pUFYvqV$8U}NiZhvR3~pXJaJfu%g9;$G1N7V1R!@x1-Un_?ni_d$ zVcz1~$ZMRr*bMWoyckaBZ3=MU+V;CBmh9);q<5^A6#QgO*q*JKAi0P4IZIr;mwC~- zSI=46%{)gekER{16VK7DN;URx)!QJ0a}%u{mu{EV>j8@|m;A2c0Sw+xd_OWOc%QI4 z;n0MGo&|*C(hRRNcqorVoa|?Qn{0pHL{rbcPJ|D3iU5Q=stYw<=5={8D-{+8PlM0096Bn2A+B*)V^0Z4CQ8ZL z2Z=L@({t-5W|F+}Mo`;+#Lxs2SJ6^rSPVY0ir%2$1@ouK(Sx5~Z@XqN$7d7kXt2h! zQ|9Z-d_WEPmj_YLWfR^8j9AAN*n z9lpg)Bv|)H7n){Loja><9BiA$@+G{)Ot)J2c4p5=frE@#9K^Mk$uQ9dr z*3$OeD_T}_JhM}=<3?q<2xB`^`c6aN=z}+)W=7BqubR~!?HENYPO22+#{~zMG<;;j ztYd`I-0dFqaZYy47qHzC-KOgXEe`ijwsf_@&iFll(cWvR4a9rmwqbS?OGvuytBI+a z_jrF?$6Il|Ty`~p#KEGv?p+X1^s7epG7H}5d1@ek*me|0JrR$1C*o;`y(Oo{wX*f@ zkK3q@)Ikt~j|67K%&LdT%I4Q2S3q1PFUkHb@^S26Xo4y znzu1upuN(k-9r;>&C3?yCl8r;bL^_ zwSaFehp5R<;}8 zdy=&4R_umlE8NsfJ&idGrJN0x2X!R|XBra2Wt{iD>?yB3?%)dPJt!?q$Aw@entQm4 zA8z&dc28?KTeT;KWCj7!E|8n-gxr~y`cz)fk z)`pd!)^^T=gtHJkKWH*yZ@RU$Zps3%Ml1{H?!s`4a^Ub&E#HI z#}4A_A-pCARglsB%P&z;&oE0Z*dPijGsE)tMXC96mnN33Y`SrzWk165{N+Etb|>)p z|LtIwL)$wDFPZ8e`3vnI!T$WH*F9rx%In?622-b}Y#KMLR z0>*Xj{N;bw!))rka2feC$1FE$lrOkgN2gM>9|kf~t2%iCpB@Z9by_f^F(E|qCk<>P zmM^abcfHxiqH1ulWEtc2#4TkEhQFv3CCHK0_3t`Jid=HBpYIJ>dm&|v%(A>j0vgYj z8|UztnVlpKde2aP1*mg}BsdI4M6IbDEaN9(LtIIqw#)Qxh>>SZy-S7nJ=*k^C%XCC zpY)qrmr189Zo!KbZ^_zLr|P@hd2gbe?~H@#^S?nd{QJudh&s{FWF=!ptXrP@?z?Ow zEstuNr>Tl4e#KXMUL<5K8DAG)MqP4@rXhCMjn26bXX{3gdFz0x7P5{~H_KL^)&(#> z)j_re|BZ~q%cG}d`{O2a*@yk_HbLIM@4KCPJwt4s-)_leB~d&QL$*woI&1ejaXSL@ zUWf_29~(nN>}emySh(~Sk=M}H+csZ1#tL@B*_iak*S!r3)P_&t?)PPb8hqJ5u?u}2 zKP)@z_Xlw8k<1GLKNVmxsNu~DyeSuOnhd52ELbJ=e(aTEMt}C9jFUEWE+9_G0a=Vb z>^I$Ue@My0o-$!4rk(J4T05H9eKNi5H{@NCPr^Jx{{6BNKuGrdbcoA?V~O(JW2-5a zU;GQp-&9O}=aQ(wFx(8QW+FYB4672=73dI}ZR5hYVkU>Yj-K%9I}`>g>4=k=j42p|fjpGyi%0< zX@pHM$3^I?XXERwDFY`!qMxS2pcEjR1G527kIznd$Arwsb~07Gi`Gs}GG?MdpBXX30L# z6}nJ{oL2)}f*g|gEqOyKdfaI~0_rg?#*AFCy;j~u7@2|%rvkRtq2ZY@G1XLb!ac zTpBXulWt*H`xoY6@i(8YbN-n^WVv~ouA>y%02sbP8>^zNSb*jc2A<{v0K+pvh_Bs; zg@X}ApglVTS)B6U)d3&N3MMISGyG-sNX^66R;aSM@IW_E+h;EHJ~uiEoKzv+_@jt=h6b#+Xr?}y!5*7BV+fHr zh?pDLPP_3e@U!r5msM}yce$tLd}?8am{e(y1?MkLGK_>>R9So#`JE|QR8)i7ZG=ZB z2Y8JXM+Tw0CTBbQvtAU;{TqC1G&7*LPA^q}vFV&!f`>(`xGdVRq z{^v>vI|JJhvx?v(uZWjIycp%5Fwh~|Cn0-*yoarc7dKn3Rlb!S0l19#Mj*Be3{mL{ z=JhuLSo-@{_oT#SSicIz<-q^MHQs-VYw^&^=oW*8*7e-9XR4R$zy`01yj_jM->R)? zH64${#U*1K5wfMXM#&;k=Bso#t~d_Q(282BjrU$rK`aes$sa@ zUg>srTnwK@ienal0mW_#Uq?rfU-6r1EEuK&9=#0{me5R&YE=X zKiUuBpQNUCNPewL_N1H`e2ddl`9Q`PhRKfN1*4qGK~2_Jk7QD*N9?tcRT!vqs5{mH z;>HLB?yNkX@I?C^XL$nitNHCkN}=52-_7jw{EJ<lcC80) zSo;#95b{ruU1ueRj!Br2{vpm$C|d2IQetYZyeY>9LM)L1<~U&W0(0b&J$h+xc~<;^ zMBH~;le8Owp2@@@bke_d6Ip%7;{Wp6@K-13&e?No>?OP~rhd%S@r%3O$;JF*20?Kpp~Dcg;kJoH@i4Mindg2$!zsAO6+*roEY#SJc{XQaiH6I_lkL4eJy*lz zdNpXbKgg4JH7?SBUse54l~tSau*+p_oCw_6`&n<@Vw8HV79YOj0qPRsX>rQySGQ|) zu-p+b@tCst3~*ct+y=dp!$2~9BT#63gS931`%MN&pGt_0#n3;XL6IDwh{0#@>e|3@ z8S9pD$MOalHLpdaH|@wL#y~ZjKDe8xVuKkHaTqrGRVJkf!C2I z;}K-`RSY00cdUNW>rx_a z|1S@w5fdF;cT4s)yLu%Q>wclpD6QSLOJiT`*?E}dx3Ip_uUm(rDj$KV{dJ(szd$x= zbfB6MZStpFAIEj}|6XnXes0X>5wd>@mCib)lIx20>M6F#rCA8ON}29oIe7MXHIh5P)l{W^ld59zGn2PXNG>JZemG){rNY?&J z`i-EC;bQ{q3N$e^A|9Hw-6TuN=1dwzC_C5p8!onX!^pRbyJt0 zv;D1!?bdBYw$S-)l7B`wa4?EHt_AEH8X$4$-DCL9(5Mz-Xz zpgmZt#RwCyOUu6`eTMu>=T`7&++y8`lF^Rh{upR}kHR1EJ_%?3>@5nkgk2(>AmPAJ zaH-OOpK_)nyv0axipd$hYM~27I-i_vzh`(g0@bkt%dRD^krQ)nrkWr!yIgGY2YiDZ z-dU7^!6_ZXjiJJg3)aT$9WA3rD(7ixb;%gj)?~QX5}qaG->4@CNCYJ)nQfiOCmCXb zOD|}JE@i2ge0+A$)>O96x5Q?2mfd_w^B|1GA`aQ3h#&6t%Vd8)5UbEyhj!pq3=q-E zaG5)39luZ}!b1ADrWvdCjbUvZBUpri(ulnF%%^yzoMAtP-w0R(siPN2m37KIS9_Pa z-Sm`LWH0I!n-U|In1YFKom9 zlKhCQ@Fo~ma6d#wMn0G72-B{WQ9PzgOOlX38s-xs@AZQq0*8~GTbm!2Le4iGf>+Siw6C{j4RnS4{pE6(FJ-!eO;eMg; z7&}-#XRJvHBu~3+kxYqqDK$PkPjZiqnVyRV#qv4i)4PD$5{_LCrcDhO6exRvC|I9H6`tq4vE? zGD$O}hMgdd5~1h@6U5CCxo+nLXePN;Xf_klhT>c4Sd9K3Edcjl17Veg@nz{%3?=}XMh`dtnATpg2$0{>!nUPz%7!5r6328D`pg=3 zMudbyt*gSNJ{MZ(J>vQrd0bwP$A9fP<}-k}ax(ATd6u+vT=O9rAzu$^orD$0zf5&y zXg_-wm+ki~27rY-1!wt$7uY6^uxV$mgIn#&7r!3%@vu2<<%T-*F)fdued|e`IMHnR z34NhHfyo|I!@5^X_%|CDASj2mADu&ioku19gMR-XFn)be6<~D$dN!(T$CkMf^~2F7 z==VL?j=hM}7e}QF)9fn(FO1Kxa4P>7>`#((J;H5rbwmiRnCCUml%<>{11a|hv5ieNg(C{gl zoq_SK$}^-54Ac08M8%D`8S>n>GT8$-j$){@LsOQY$^*_3Vt#OXVo^dV!->W7VU%%p zYV-6okA>mhII-#GHfI-rjBvlE!_di;yPBstC4yDv5%3kE;R?KxyU(@?gR9y71Ny>P zz9&g?HX8Of#c|5~+0Psv7-HheAt0}MLnqx!>(tgXDo;RN`SVM8e%1j73m=+}NhJWi zI1Xo(;; z^Nm@>e8ZpZp)Z!J&MAf=61QL`(9wEB7T*o9EY zY>q%mVHHtbQvBz$Sm_8`kw6}^KQsh-k2W8sR4ZlIeIVCW1FMrkKgK-^QHntpg%VoP z4!N)M?qWZn9mWh|C{jiH^xNg=k=XGQrtYaj7&E=y%2!J)OqtK3VPnL;#EvqbtNquT z{I4KYuqj`eUUCvTbeN$)=Qiw}*fe&EM;SINiB9cWT_N}ywUM8CwOE{B3S8`_o8A{w zqY**V_~Hi;p8utuIAw*+;>{L(WX6uc@u-!P%BFA|dbhM|NPPr@S4c=1n$Xn~k$-A* zLTA@v{3m0XNlIG_WXP?4E_`|%HLHiG8X5o%`HIr<$6LLt_Nb!!E*Lf)jyZ_wkHn}k zkFT$KISi+CdHF4?Iy4HkH2|#CQi8@dZjCUGOp5$m>FucjTUZNyzMem`itQTymE59T zsOg)-j;b)#;E0Y`ywQgo>>R*qmz>EzUO&wbgF2cDkj3GEHO<%;>o)R*rQj!lTqJHJ zUZ|c*G^^rUJn_*t!h_|I z**%RMFNKgALcWiHoAverGIxM`zBL1oSpcjd_bPx~?%#p4K(h}y8feL30Qoc1`x4q4 zaUlyKc}r`1)Mfyf6gF#qJ~I?-inaSyc!iyvOhNKT0Y-!ElA1q;^Zvj-Y$Eg{Jjpc6 zknEed9d;wR#}4+El^z7x(tVGz!fP05Xq1ZEvkZECSOlb{ADW*VT3ty^`eo8B0CVu3 zCqx3u4ME}i9+ERpYEZ;D)z8`htIod`m3+YW-u@hl#7^Q$$V&)) z(`JDE6V&=XV{l9E_k3u@q@~>qFHfuT%ZRKm(T$iD-3wA;Iik_p`T6?@hI1RU(D})B z@G$C?<7I*w+t`?86o=>Dj&Ex<-7RQNM>(?8?YmZLBRD8DcHc_qpezc2@w5NmFn$G7 z4C+Hu-+?ZX_(x{0{BkD%ZWWNml_hE$t8m#XX}f6$@VhwCu2Xqe5 zIp-|H##B#G^h*kXu5T0O)?629+CX>LC5QXZKzTL%1>>rw<|Y)!AcZ)BF^1gtc7w0b zI{_-jR*VWnEoMRaj&);+ga|q1+hidLuxJ(GsaEYQp$V{Y`ISjN9}3ktM`4y)Z}J*U zXw_+wp2<}=++d@&*4+NAcAG-9yVNr{Wp3CcMs?SJZ{1W`% z$QW_?6}Px)0YKEDj%tSg9?(Dk#)(NgG2iv`K7VE=IV$cG_k`?z^ELQ8lw|dB+9;c3 zpZ8{n{}%d(VV~Qr!v}cUnjcz{X@5_;COfEI+1;K3?$drpwufx{g^lOcP(*QLsc@7t z$^eRH;}`&fcm9i1dMe=Q?7db@phJGpHSOn~5v`6i%`^T&h^|j=g829rX`$2)A|}|! z{Pt6{>hk{Lpq5Exyj~)UCV|>jlp}y5JWFY7@kXYGr}b-T&! zZX|BV^o-Dkb2yqe-06|ETWXU%0HAn5vyLA98hY-IuQ2E1@X&vWstIyX&G5Fi?kv~e zqPI6YZn8zDm1=8>E<}a<-cPU<(T7eK=*G{yOMMeDBog(=WA?sy$a{7UHK$RJ#);RuuumbLRnK3|=Mj#rIN&z2>tiT;Xy{+v(YD@d3TJ(>iEL`GIK$;VY*K zfLv(QTko!2p_}X?2q-s&kN1aW_|KV?IQtVwkS`p>ne(3eq9Lx54nJ|c6X7Va9VU`% zxEz5#Ce?uU5Jlk2>+SyXZ?`+wXT=Nx87ut0jOodSR>aKwyNSa%hJRc)o%ESV-MaW= zZ=2Gb6XlIOLjJi93<25VYP68{{h8Sd>b?xiuSVomZvxoeJF>pRi7HK&QaCkKxx8P* zntb{|;z7`Dr3*ALOne(2%<}-JzZYz;-&b5X?5K4RL=21MlecBN8ZEY?GU&RFsnJp1b6n@MJ(m+_Mo;c~U9gM4#QE%H zspdjyou5gxuOFe{s;JSa$NFk!VE3iR?M6J>FTZl#XZHDZ(Wo||=hZmlj(v7wN*rs} zw~az7fGe0lpO*N?|0(~=7qZd-xx_u4J@8Mitoca2gZxQ0dfadHRG+r-QR~*z2j5{Y z*h-QKNVHbFcO_$7$ESK|G6n zFg^@n(6I&Zt_qf<<`)0xC7h)xfMl$bffYwh*cC8J^eYVlfqGUP6GROZXnaas3KN`b zgfnnHmg??jNG*uzW+{`2V@Y=f5^K0{0#i& zMlN3kR%5>^+Av900r4`YHVPa94bAh~s`OMr=e}CsFQ%nL<|8Zm8Jjzrr0PW!uHayF zw#4At7U)|{`xnwTIcFib@M2ANcb@%X!$LdGC-;ar1J!2E!aywh^9qoeLr?osa>sZF7a@cPXg z^@JxPK(qpHN9|c`a8z@QE;R1_w^24L_hRDc%TDaogS*9qds8s(um1h=VT*EtW<(TY zFov3H%HXk_*i16k0a~fgtMb%d7J>??#BX`!szqd*T2gqosivz<7-y$HQ@eb6FEu7j zO+$e<>5#!8es#w4+3r(S`8!9?(F#Sw?ZOu^n|kEd?W9fpbLGTM!|rnWwi#Bn_4A1; z@D5+V)v#W~#r&gy2Tbr`L~4)NY>77D!D=BA0GRH-i5qY%<6tyV@XSXa9}fO4%DuH* zmx>vQU*^tqevg!IC*5CEqYv-`$M7^%xu2F@MdRP}279kZJ+&WI3q8vuOmo9dHB~<% zC(keVPqP#U%@5KB>)7{>7L?psO+U^=;YwtbhE{@Mg8;I?jBP2e<*F(in6Smd=Nmmgp-}v&wmNJ2 zRA~7%+UlRjMZB_KzzL3$(iL>6)*t=Av~PPmuU0uvtQm0RSKc|PLKgk&dh`ZUku8;` z2|T#D0~+C8(mww$gHCQcFZ_QH94C%MugSrkSVk#m$XH@ix_-m8uW!^_THkw|lUhk! zA*XqVdF3(v4W3$S>^V2+geeOvM%?;qUG zoFtzthdF3;V(pcCptg~X$3q8CGrn`<#D3+)Nz4$pSNIiAUQJdM0ExG%`PJOy|L~sq z5Lbax2xijh7Z~>wv7`7&r2fq=!t>Gt8&xdRjGzVOswNC9d%1X@78rR;Q$ZtsnW-W7 zOSu%M$2<~B@O=N@hP{AJKiDfNyIlv1axE~YL}-q@So~@a`ehZURN})CtIDe?!WcS0 zaRje@rG5Me@6|Zpr9m!FF%+C+GW71_K2Q10mKx({fgv4fkeVqJ8f}q}yT#4w?eMNm zE=R)~MM*slBQnj@BX@!#4xRPmmYt?UKlB`SLCeDQLbvqk|D?1k|K`%cqF=bprLUX; zDY#YQY7VIMZi+B@L^?mJI9Eo<$`nxVNRZShh5jF52$DuaKtj0$KEaSd zI1jy1Fu6+){nXDch?#h|hd_4@S31vcge?EwjL7rti+883Y)y9isn|Ri-c@A*}5467|l(x1Nfw z!(;xQS!R!N=5K>$CTJ=@-`1?{@xNna&}5V$0dGa{+j&C;6?R{S-Z<*JjDKIqaQz)B zu+O87%gf_IjK|fmd3jMrK)kkKp#Bc32`SeqVf7HmFrJ8x5T?anEgQY93I!(ofU0*+ zF!B`z(kv21`fXYScU{wT{D%d8hpprr3hy_F-q?augD!WbfaEexu;zx?2pZg#kdJ&sIzW#VWiQQ z8xT)&vG*!m&VwydlQ?FV!jVqK>x1{h7GU*FVi>UL7O56xsTl+MI>5N!bee1^?fMP) zRQ}JHd!AWHfWCg=hAfGso}jPG3!ATaJ5r9l>C|yGau#hwDY|>?`Ka&k@O@?+Lf)T3 zC#tnTf#-XQ`fKNZ=0-e10z9jPkD1+JT{@Zst_0&cFL>oT_wSHDhJxY zUty8{0k=905aW@Uruq4*3d3#QU?c!EWQ~hjuCFUVL%N;~H)o6>>tczSuHH@?BeFY< z?c^G-$4IB~TzaJg{-_H^;o#Xl^}H6gH(7dN?}wvzjxq2;aw!i(I~@%nXOasfo<@@c zb5R3jqHsy-&-i#OT-82fT!^T37Y6OJ06`7+y`u;$IFO;}#3U8)oay9t05hQ(3Q5=Y zc5Bq^Kyk~{J0g#1*F#=bsFz6O^k5IRI)5NI-bu48;^V^BX9zf@A zf^D4!$c)tFZn8@LDWLw4qUOrQDHK!gNA%hC3fVbQrC05J9j*Rxd>}iHZfKnVNNnc) z@f$s2I^lBEt49@inU3ToLj0^iS3%7GxX3#AKsOiv1dU(i`F4)Un{XunY(3rudwnYJ zSi!(*{u-eb-Tr0l$e0SfRUIq2metgWEf8JRHMd|{$9Od^4c3o+5iWoKLdh*y1t;uB z7d`F?9m3z#j^El?WakZ`I1Y zwsWaBNXBa^B>-)P#x9pQ<$J3S-kw>uZE5Kgct;sEQBM@#qJ# z7y?KegQ)<)u)tRGcjTc2gJ0I_4RihFIYmK7V;zICS^2@({>gfVRm*L{8uY}F+spXld16xq`{4F;=Dh){T zsKPrtrw3+)CMB4C|CX({R<8%xF|0f%ehg9i)8|i1?vN9SQUIcKBg(Wi}}I z!CLg43f~&=!cTY)Jcgf7g}*pG!`FQMD~Xh6a=Ey%;t$Y|^{oDd&QNalx=22au>KYD zme-y*{4uNWeQF!5%Vm0)qTyLC6<+07;a(jQW=$iIGf;Y)^>4>E=JtNkvVB>y-9q}* z?whbfT=Tre(A3UcezW2Ok(%G&iFGU7C8Rs#Iy0ybrT{)H(Yqk8|7FbcevQKxi>FA>pO^cy=Cbw9MWDf+5PrqGi`3uPf~5}h7)4ia7lA|F&MplbVKUnk!0NF+5QwJ zdApz%eg+X)iCVW2wr+Sj4Nuz4NE++qA?FQ?UTvP%(ijo}0Pq} zj;FMhY_G?ZtZm;SZy%|L^{C2AKfhi6I$~p6^~J{O>^AJGj`LxJTSlwU*^xQTXs>sG zl~P08@*34JxLSl;8tPxKL&X}uR_rUon2Lfn2VfAzfm+b`ibc^RLMaa?MVt+#2JaR! zZuh!R?hVdylD9okEPFb;_>yM3$gijL<0@bqP7I)Xcc~Y!+#A+)x8TNeAXC$(eH4JvhI|LufcLfxtoEEcmKYH z%}V7LQKO=gexV#CJ5rh0-hS9`^L(X7!Y!&K6r=YV)x5NnB1q zmTM{?7Hh7qV|{SRqDLh9rQZj$CVCx;X#Vt@R_cWE=y2i#0OvB1YjlzW6Rj*L{e)$R zF>&hY@X@%Bn1Jft@=FL6#nkVIh?#jMjE1LAEM(7JcL;Z@t|vD?HwV$V6*tUi<{afu zgEiNx-ww|uY`2L2(7HL?lDBwJI#!Yh0uYG!g+gdD3A#K-$$piP?70 zXm`mFoO;TKZD>Bu(g_OTQ}d#Fa=5b!<6Um9MUdrOizI*E9OYdQ$wH^r(Fh%XA%toEg8w}IDTad`8}E&Nb7ZSnAMQt`DoUvSzt-bQ^4bHyseI@_YnGKXLToq|Gahs?qgq6weS}>2$oja_@2OHFlo=S`<{OL zZG&~+1FE2%H$2&aH-5|X1yNb1 z#hgUzSEk5@k&RU(A#V5&Uh~Gt)y2#qiq8fj)*TK>C?e*=9_w#4aXW~Q#;W=jDg26W zwH~?WilgY#-sOUZXbfIN+)bef2EW&D-X!<;2HkE4+% zvLLd`M&(9v-s&5%8XjSnsXZmQ96vT^skNBsUaKfrymqW#KX!qn=gkVQ3s4%QWdMTz zms!d}K6D)u<|wmWm`jnC9Tx^CWCzFzr8WxSpHMcL)>2)`vO;<1aY5j8M&`-K{`!Y% z6WZo^3u{S)YgPG1$-x7w6u*ur8@sd+p@#%`g5=hv6?l?JG(X4x~wC+;8Np{W~ zhZJGo?xUOGoU;rn)mAJsA8wqM%q_5%EA{$On2_?UR6f|Tf!X=oiYV!NG4(uCXHHz{ zZhH4}>>{zQe!CM*i94^l#w0QYn@~8YEQUiK+!&4bw@30tv%D{)<3~!?_W`Vkv3ufs zl+o^mHsVuAR}5W9t`~-KCd(Bcu%^IGp4#vNc;fiyi&S$A-1c9Dew5X)FU)8g75x-X z;m#qWr@;Ka$vPQ#Hs~j-wiy`g=OZ4dRMz+y5bE$ERCiv8*7FAcpzXp>gf!fTR&XwLw8c2@C!(NK@47_Ujxv9-3SH#R8+jMP+&wP z+TI`PqD;g1G%iE;l4_a_HE$d&URVyAus}{omkr(#!WDQ1UBy<(BXCxqj|P@d`Rb9b zqh?5{d_O(B1>=*>VM6rSFl@%xeAhdhf&E+0!cL4!rpvaw8{E~&D6Yp3@~#_ovqQ0I zL}hFtEgO*qx2|JRFeX_`6mS7{9%HNfE5p8&0&4*;x4~P)dIGf}01c&LYSIjNa3wWE zZYf}U#DPdz3LJRyhes=Tr?MN;aoH^!9`{wY0^0E~XkMWqMiJyFyg>P_~T_ehRINZ@7T`P@3>!dNcqaI zr$yBPq6wXQJtv-NtPcE6nbnKR%mz*{7LEdZFYpi`L?%Zhl-vc>{>Gg;hML@b7WG?Z z^Bjx)3nP~Xg^%mUp#=QG!EVR|HEv*3^}qYkhU@)=8K=)1lg8WOr`N_$-5UpqH(^Gg zFxugruiS|br&z#7?0k6{Z#u8`k{VTv2KyrTrzJk{4yxg;QC&^VOs@fZiyccbn^0wwc%{}zfZSteOoyHL{Nt%$(u}Y<5 zt**diA+r%r$l=l-Q~m<>$aZ}LuNU+Dy&GAx$pEfUbv+cpDs`lx0RF_}3DYyZb7N~; zS4;uVUz~n&eyS5Y2af%PAA$LkDahsvdpy z1ow*OG=Mn$2Is@iJl95I@AN2X_!fOQxZk2L_drck*PZNV@W%m6 z>Z?}nAgPZGLJq^BtEcl0ZYl@KtoK5^Z?$h+jX(@9h2&t#Du|_}#d}-{oy%SO$9gNC zT@hBajDyz8^Lnh6+rMF+feOo(o>p18irvuZLbo41MnDW*pdlD7nY5pL_3>{JLoDc1 z630`@fy4PjP3hqb*wp7?H;r*k!B~$v@3Gf=c>bb8mHSj=^I3{+h;3ta`lR>+ls-k0 zzzw;D;UW)n&h2bOaJ7dvqKORRx6w}ClaX+?g*zx_!CeU5uM;dMNiH^xR7C}}iQHEY zrqco|VO~@r5v2#1_{@@q(lHxYa7ao;(M=Cj2THtziS^JZxjiVkeg-3tg($--`1w`| zJD#T3J(NYxgB|y`I40WF_h*zfiRznCZdU43S(IyU-U=8S(ThdMFr55!Ys7C~;#JzH z2jP_T-WKiUs`!%LWUS~Q9@VBK+Gd zz!Yh$3Zkmm5nO*?4)H-Z(i8#%jW<@VVZ}dokk0PL-ssW+X`_ zM@vhHBA%Him+3s*g18O#xdYguDFXRz10t$Emy17Ed2b3Nt5Z;1Axk;8qZ2<}9p=!! zT+K}_bf5^BtaHIZMixUE*EF%*h1Pi8Q6siPdzB&)KcnXjc9Gai5LR1&xprrsG1V~b zSH9Y&eMpr9eRI8tyS5x^)BLDVQ`EWaL#@iJxSA*^NVces9VE=ll*n@>bk$K(^H;cn zHj_6Ge$3mGUO1&yoY3n6arLy(!QE)9)IR<4*n{iq5=7v$NlxdHL%PTzjRz5lALK(u zZWP^LOlr?u5&bNnwd2HRR;ksd|IUZz z)n!YlQy2exCIAZ-JDld+dr;Og|ISrWe;oH8%NbL^hri5XS2yLu^^&KAa!A$pdRLM9 z8QK$FeLKn*xh@_f{)U<}5g6>$2d{zBH%eYL5FW=(4{^Bb)L=diA720L8!GE!@W3JE zuuP9aoiuA7_O$W2{cMAN_4JWN`^=jhhtcR($_S&sO2^HWw$0)0O`C{!(U$YpylXhT z#M$#hcrS#y_VZ>pc=0ArTMvH(#&M3hth+uHexqVon(E8aAS()0UW&c!^@b`gEDDw7 zkyt)aw3tbZnzAUG#<&sE_=2VBnnSaZ}&`HDM`&OmHb~aDg?SsX6z3;GbGH@(J_aiRxMt z;D70H}idEbsQJIJW@`Bb;>K5(0z7$xh+ovZM0N&~3oax^~hFE;o z%7+V@1cQzTw_`*XMSf;@Go%o$+6uT{vS(b0vnJR-g(>x=(2Zm|Fal6PY>K1cdu|;G z(BacZ&|!;F>&6apF6eNTklOX$&#UQVVJx}125BBVo*j4t^o%Ou1UcWP5jT}x!{%mo z=8IVK=OVDkErw~Yzu;>1Bj;Y@2a9OGOC$6miStBn!3x>(f+kj<+uA#n!U*7qwPpWE z3A>aW#x`&ImqBQ$vf&Ju3&?IZ`mkob0AuMdxxB-Kl9=(u0#dn)mE8t0l_L4ez429nwv!A zcY8FvZo^#*@w_!YcEZ(N;dyls@g!m9mS_F0-C65L%_pjNpvFk67I1chIag5Y zb7)=AGnAeoOb5DC{!)y(orHM|1r(Slgn=Th;Gd#t&e5OFc_G;^q4)yQ&6nl6iI0|W z&4QTrEW$sCmevp3N$=A66wIsPn@w)x;eZ%s8QoRb#b%ymDJzm4i|@Z97-sjx+!dp1 z+G|y#Y{OD}KTRWATHq}(b#eC^H0%Cf`~ZawOr7^a#uUx3P@iIfmsY%SrD%#ZFK-Fc zHZN(BFAv=^j~7WyK%f!)TW=6}dyX!CN1+Zm*T=Y`$^8j-|HcratoMgZ3b`bHy*;a{ zmxXb7CMn^e(1*^c%Xh2zq0ik$k}F}?oj~UoW(Os&C0bDE zCdQxH;Qm0mnxzEawyqK~jY}Z|DZep@km)q$(7UnM;2z?X4F|i+AlP|3K{sA`;|QF2 z_aLpgM;M8Qau1#~MMlu!ggmgOQk=&n_fx8wn zrEO7_ahL_1OD^iM4nv+DF4`eh;Uj6sBPmc=;-vMLgTg6~Xk~L@DV3mMVRPl|NONl7 zyS_Dzqdas#DT4?9e~f))TvS`wue8$LDFVZgf^@f%Gjum1AuS-?9V#UagF|>U5JjeWV4^`51#%+pkm&E`{QEq2&DU`L#?My+uywSm!h& zgENY%(?3ZsmLa0#Mw4!NJZmF+(5hzNl%OqaElX<8zq4kv|Mm|BuXKEY0F5U4ypjCK z%^4?>%$R^N+WA57flG0~5L1zeOc$5Jlm#_DeF6b4y{K2^w$#s;w11WiOda|c1bDVg zUcLdYY*1Ty6*D`&@iByrbkBoY1kEy#xW`n=ku7&z_^GdftD01=j};_qxEWI_?O-X* zgbxy%-*HK&D!l{|k0&0*2pg5u2%n||m=FA+IF~{?8FBsTCD`$tNz_SmAn^^#g3wru zZ7P<80t;N2<^q9dyb}u*N^QimaQnxU)j2bAFZ*+H8gMM1j|jw?sK@4T7CykszrJ6I zus&K0JADSc2%(by2C-NYtUKypnd^-3q`N6!YY=7_@v=Y>PvfXl-sfl zKZaRr&fVo?erIW++lv{xciJgs74#8wV<~byEWY1->m5jB3D>hMQ}bEEB*s0FVT=pB zPPb77UcF^?a+*mKT| zN@Uy9K#&nKxa^m#4+X!n4fp7^RL%speD#>_f5OmV;HH9PXm|pgzI?`4dDKzBPnWmM zv0Tl_FzAhfTjxXnGi`O%$j`CAer$DO9Cdw=8Y$mh=vozAo?pajpExM{@rcSz?8F*` zsKs)aSQ(MPEfR`4dg0t?bscc~GVzxZB`6m$K+6V4h{!7{yX_knioJ)^>6XLwW7V{? z@874?uRrvDj|j!?>4|hzvuZ^Wg2}oLbj^uHccoUjE)~|DyJ~h3Fu5M`)3|UBeHY)@ z*yLlyz|(DO_5g5bQ&~@j!v#Nm-@Yz*xa*qx`mNHB>A+GvTsVA~P!CvdM1{+@IRK)# z%i}VjEi5g?UWPo?$!2qRNTK1b<+aWz@GVH0#|$MTKdM_To+9cEoX9AN-{7vKkFe8E zv>%;oGv5DG@>OBOD|yC8VPhpW?R@9zZ4F0Im&^YBGq$HUu1BR))xRjls8uqiS177FKq@wJmIKbirUrPq4 z0h(Tx0~f0m3VA?2PvleS1eY$;p@}y=@8zF_Cf^U|HgY1|OXwv|%kXL7K032?AWqX}+g zDqsu>uFV`;78V}n#cII~aF9NZ#tb#!tfJ`$`^?8`^`AJF)|Zhi4lts>dqkrp@c`ZU zFACijkpGmotgxdI3tO?Qf$1M%5YwqS+OR}3TY-k;T{5dCyOWv5;E}rI(bsV*>A=?y zjG?pnzXasXQQhG+2wt`Be1;j-pR*Pgqz?irsE%$wwk)5AzPzqT23_nLaD^@U-bPX9 zA0j(06h&4P{G>=da&aosd8QoWW2?DaqbN+e>y9C!SJM4Vq?AE!9CC}hk31ZqL%Jm& zr~mD>l{_Hvsw+SH9rd?LujL|1JGRlePHA^~LZEulkzx-u`jz)Y)(hNTXXX?$meWgo zM8nL13Cbie?9}ZUDtG%8jjvjsNZ{x5T#NzevFsks0-|Xx(X?dk8|DwU@5T7vGwN#^ zkvARr$XvPpY_?<-#1|Hf`!(D898F`@`<$eRF065lCi3Oh`3QehAuvu!@B$uuqfeNK z?cZI09|M({=kz%|TQjbTqwi;>1yg;mJ2V5>*gnQ%_5Tm?NJ2emPPB>7v%)T!BCas= z1=^SRl-Ig*geat$cgTWu&N<~(2F#O{K5(?6fe^EVhdDwjiBwJ&nsh(WVCA2A2^ISC zj<0)c*TrwZj=h{#lm_NYdl7DtN585|`pwQlJ&po0eI?fkhwLHB6>D2L#`Hb9sd`LB zO_pmu`oG6O)=g+VF0I6w!J)tdb7BCp8ljdXAIo2kn!be$tzA;StsaTCe2a3%p@@;Z z%tQZ^zeVUG+`6P4E6|^k_jFq8{WV@3Nz3bvwOGs3G<}f=AXJ)?n5wcF(w07(DvzdV zw!2z&kH&T6les8NX^CkYcyixBnE7kAV#wRQts789&rtmH=6MkGz1`(lXLJM2?zzx3 zs*Rb|^f+cGNz>|xHx%7bUAMO^c=cf3E#?)_T-DL%F#s27diDQRU{XX7SW|Vv8*1uc zT#|O!(_E!bh&aBf(z@lSxd}PVPQ@qW&+>Yd`*;fdbY4uWxB{rbI|aCEf6?8`3ssgp zvJxlTDb0NidDgjk3X>QpfUR|GR|ugoNGYz}qaaRS_cP%b{DoNy5sMP8AG zUpoC4xD`y0OCQN7vIi5RhZ^QGfZx&DFxvkq_Y9be( zY$vN|bPRr5suz{)qMXsEB=TU537dJVQ+_gSwnWDnue9;;Vm#?k?P4JBMR!0Z3q;=&wH6geMX(n6 zwV}V)s%%uh$1@Q$i_T<=TrpSw<8)D5Lz)hiYI$C@*?(2_3foYM9Gc{8#Xt^z%y$Rh zM~2wj<25YaVZzX#sqVS|0XaN8={bwTEw-91eNw?N0Nx_r-wwtGp2gf zE|yoZU}oh5)|e&j>#fKhPoO#>Tu}o)=;@w8#mh^JxhC=t7=FlS1??aReL@gO2Syk>T_y)f@Ecl+EK z(vEs}aI$q_ynrpFdCmTFQ+VQ}totyGiRj~=G>UXh;~CSOkF^RsY5am^04mwO`R%@B zgn1~0$Yp^yQJ%fY3Qtwd?94V3ej27Kc8NoHvbOQ3NQK)q(*gu{ZV_7@ABoK}C~7UA z+8t-C&9wIPhU28{W zGnMC=cWC1#j-j=&5^Z6vU{H;Mb$-%h%i;JslkX?w=k@u73jt_2atF1_a{$ZvYGtaD zK7k}wQriB^H(kNP92W`NjQ?B48~OgAo}Ir@OO&y!pxtrkr$&rCTUq&iIQ>XX0+qpj zN`R;GLAXti8?sbEUaKKVYO=@C%I##*%E88kj7bd9whW$#U;g=@VA8c)J`XG>ldmV> zzls_mt_%qizZD|Pv_Y{83Gj3vP}6GUzvXH`HxN`Krv740f~E13&$6%g)bc_TaE+CQ zbu0JJnkPnvOYO?B1m*Zq&>*)79N7k$b z6oi}yxONiD=Gvp^AX@Ox7!Y_?a-FBPw4f^&i}6DDT5p~M?E79t)W z_`5d+D-6<_s95yf>EddNnmqYd0zZl~TZKijVQ+Hv#;Rr~E7a0--mVTG`azlpbBICz zdQOaL7M!!L(R~JPKNXT)-l!qsKi_JAn3b}e!G>DYh_bp?Cn8ChTFPUQX^J+Vtd_V^F?b_Mp)cL8_%4K^LOOE@TnsXZmGnz;x`#tEGT@?RFAa9)xqlV zq-+v@fs+#eoFp}RWl&-s+R+5po z%Hh@+Y9kNKkL>yIy{V1DFPWl<^S*Do;-q>65 z1)VQ)f(1fxicz>gO8e$$B!_|>tQCl{+)C-{#L~SA2W;51km@?xZJ71-)t%Bqi{2UA4Y!Iemb>1mBdcv zC#JX=MAP@??EBgvXDa69ZVH`zSj9M#HTzlQic*Vv2N1`0Wd5@#Mja^B=rFlq<2W#q z&W#Q0wzxx)c@Kt6g^S0pf>ETsDQIymUOZ)>mG3hF`vN5ko`PQ_02smY57SB{VO+sr z+*6I^G?lS2%TTJJ^y9uQDGZfy)#mFV*|%>mf06N;$2E0FQg)dbuFgis`ZRq0)%Eat zW5op+j`DbvJcV_iv$k7KV#x}D8@$#%yWDNIe@}hX?YtvbX)34y0KBuIe%PcBAFft3 za0#P@VN^Dk?|KGgb=b;N^!pXLtebV74jB*x*!(f;s)~5{*$EP-TSYuH+9hg3B>h> z#91g>EUx1#S2T6T*C|f=oVD}-lkM@@s5H%^uxu@VvJq_+%QUo0G+Q=9@;&}Tg8TI> z)|BDFeoRa9Qs72RUA98)GoH_^UkhFt>740$ao-@^s@`!TIxvv(@N|x!lu+eZljiWWIRrl*VWfA0bym0lmdT8Z-PVfKD4rYE_P z!oe0H@JH>0Ih7jTcDG2Xv)Sp`c@Qx82V(b@`@#Xv^|LY@k^J#=MS|`~q5lV4WI%_Y z;Eq?&g9#;uDY~yMc&3_jo>cV`G3fmv+_ZmqB66IVE$7SBkd0X`I5=({CVw(wbUU#w zQEaFkJYD0KC5Zpw1>7@tl4g>KBV!S5cJsS*>3kIHHqwV~mdK+sm_fffP<=*3jyZ2i zU&@R5m%1r;ybPRKQgaehT7-mqKHS)d<(HOFxo;dJG6s9>arkHji$$DR;OVHmIE zFc7A+E{f^xFe9ok%#5&ddDM=q`(yOC;(nfOmw{TPjVL3>6$PW_LoiHQLYHz`wQ;AW z$EAaXtO|+C8GJA%vy9{eNIIE3WlqpU)cU_r^d4*V!aR801 z#0$8u82~YJ{{>u298phhw>36zS0q+o;_{ zIg+$%W{5Rs!a~tuNO>8Cx&k$Iti+x{{cbuDznipP+RJh*_Pm}0pyf#^nxmmOw^c=C zmfzubQRLD3cY_KH2`mZq#d95PWoKjlq&K)cKduBD*URKKsIkAko7i`lt+~VzfVCdg zQY9GLPVI#^=uI)tXSe&$zsmj6eVC{asgGX3 zw^oXtdCXG7CXfzrnu=rFl6Rk#S-^O8C38(lEWlwpXBjrolx$_ttEYw4(M3PI+;S!4 zNG8Gffnq`g$9bRnM6B%OCOTbI=2cSiMU+gBKEAD<$YTt#eX4+GLuYVQhpNH(toT&DXUAO5Cd{53*N%Hi)QIlLN&5>%GZpOdo*{d&GVg$+Ua&v zmH$IHe}&OM=V?T$ruDnf;&yzaN30E3tOOM89dMJc{|g8pXlZg@G`Lysp1Fu{c82CS zQ>$OQuh&$5q3`!I`Mq;^u!IX3LW~mP@gXbnn{OZ0n!7x1Z`wk_s=AMdz11zgi;OwL z{^H|gfOvWJLCW!BW9KNzep15wS4>Vu$)3CwpXhlT$?kUsAdc3akAbrjhEqx!rYEKo zNWy5Rp6fdCIsJ&7&81|as`!SzX5#=|tDfbq1Fyy=B05_lgmr3>8+~&LtTbUfc zq~Vx}#xT69iFXjDjac>aIdQO{1McP4k5Jjzo4xD2;rY;HQB5XCG7$)hBeSWy3)^B5 z>s;GLOC^^)SBOJ2C>AqwIJZsnp2}Qys5j1`5Q0UG;=EEKd-pLE&@~Ny{g)Dsj{*RE zI1i}<$Qza~y!e~PE#y2ut=l z%bZrM+t$ohw`e|BnTG9)Rqyes8(ph`qBMaZUFuv%R<=yH>Yv?DHY_)JdS%vi6y-}p zX3KhRS|u)L6c`A)@ZjM-c>BM1xc3+xl^j&9`Oz*#w;Pa2AKilgn&jDZBUEdax`e$i zcfU{V=0V5Df}1r@d)UsXOrLgL%u%L!PC=eyePh z1X5>&e;BXJU(O8x`RoNV>%A;=j#-)cW2j>GAdGgxr`hFdj~;gIV<8})FTC{TPA^9- zLupHh=e#1>GXW_ICF-Q(A^PQNZ_L}>XH%Q{-vcIQeQ0sd(*5%JKPdL>Bf>_rD=Blb zfhQ#|{5;e1Po7WV(KYMaV#?wE2B2QdXPE(==wb5yVffFPQOFZFFjNhET1yOcBfpIP z{+UyYX-;eIGO2 z6%mT-&(Mn0xA2Dflg(VrOPwK@0u5Saz7{e^2+wH$J{~b5bV1^>e@s?fT^0Snx7;uP z&W8RV3=s{zIB9u@v|3fJ$2AGw{?OoP4;nSYKez1^i$hS1Y9_i^K=e zn1+OQb#Sc^4!4=UCnD4b5xQ2Y({#u5Q~$0Z{*OX%J#!2m+aMo?Wwehf^T38nI6b%v zU!h(W0L|7fUZZCMOO^cE4x6hp%4++6i`6?^B$~NyIlu079RfLD`j^X@g!TJ=&)7; zXzpoN;c@7N-uF6YAPa({xh%$A2TSS4$@B2s1z}uoq(b^)K!{KZSLLp#gop0fiP+q0 z2tLOfltvvU6NmlhX)m{-;K2%B*@ zy`@{13OJxN`{n0y!C8qLt2YooDyTk;L%I~?G^bwODSR=ggvD^fkS%UB+q1c?>$iZ+ zSB#v+x)!2p9N(!(!c_09T1}$LPbd-Qmpw$#oj74j0ys`ilnupEuL(7*m;$q|A2fU0;f;t_^+i~Ev;^ybjq6NKYsL=mG{e`!^HL0Iv z?#PDREnc=7R@;=B7twB?z~THGUBUl)%HuNj>^-4Xbv)E5UpC6p%%yBn5qPqJ&J$+6 zFy?{#nD7bT?8_17ws^|d0WV6#Ic7;nzqFw+;k3z#tB+dC`{e?ZrjQxTP#f!)|HCB? zI`c?zC=3`1yC1oqwlP*GfN&xD�RKXdlJCkUq8jVc7=n9f&{vpN}tk2OBCV9c6ADibvNY&e9%rYj{Q9Gf({%-ITW@m)jFwX z(%$a1(Z6;u4})@O3yZDUe6%n5eX=VD5X=i`-t2$K68F79BOU3E%t4(80~w#Ich3N) z5N?q8U#P(eWeSfdyV9Pn5I&SezZPqJcdWY$9_l`wY1(vOsejY3d4>?mzaTC*se8I9 zX9q${Sj}mL5FOYJECH2^p?_x=6 z+KyAcA*VP^l6IAhb3VN=wZ8EcTh2##fB5~%8we$p$S1dq_3n)y3dA-T+sfVETp&5# zg%%xdtE2*VnWoQCsich%XtdI@s)rtI)FklR02;;pyy@w?ogXbsu3bjHGXX-P`UUY@ zsje5=l)u?XlG>^e|MC*JQ7CJ%`=-NgnTwIFoCjxG|LtI#CF??R6@gZB#kXa>`kU&E zSDDoO4`=X8b3hGPQ0O9H=i%RaE>x?9Ac5o$ibJVcQ1yCwgZ;DMj=u0Ym8v6Y_~+*+ zvVsr(%X=7{xfcg;IrWHF37lw}K>hGPd-KNtIMwo*%+yMNQ%#)(d^8FJ{;2LP?vwaO z_)ro@K&9NR4_3Xt5(pw(nA>;MlHOyLW2`R8-38KYP8mUK8w+JLr~rIlM5 zwksW>Mj$7d`MLQoZo&{xn}qQt_!ZljBsju_tC3-bRsIQr14UX!oO=OJ(rZhz|1Y zu6qCF_C@5;#P^l~=HnZ&1>O|mbJD|ht(^;SaIfESVvf+N3%IJ@T;a^naqMa>Y&VY+ zHues4+lN;GM(My`mC$PVwn`v&~zr@4_7Iab#PRk=RuuYIJ3MBb}qYHLDBuq%yyvd z=yp30y+QBGQJVE=3BpcE)Zk@fLh{7oGh?CkFi#nj?Qijs#EW@|W2jLsEm6wzl)dlY z=TIB&>aQ+9MuaCuh>El8pV?2GlgPyrKg*8=>?tWn2A8V8dBw40c3h%E&ykr*G#r%+ zv+G30Ph@urldNy~tJCp@sBF3#o!C2fzd4I?o8&(g&G2AJoQUfD(>~I8pLUTkf)R@! z7BPG^v^zLK`uimXwxHX*29@~3P2QdcJ9O`$i)J%4VV(b~;mXsSwH}}bf{&l zyoon|_vGLBA?I@P$FCJ{hYVLoFTP>-Y}`J}@zf8Zri!7JizmRAOZ3Y>Wyq4Degm*x zE0X`+D)`EX4k`sT%4P@T(+b$#?&E55xSEAFVGw(ij;+mbbS>;?ptXCj5;&i~krlCA2T8Cf~HQOt)yq9Hlx(tS;8wH;*eqc{hVR_T)Vl3rM?{% zNc+;Wnk{`;2`EMB9>FPW)y9hbrYzxKXqX?I7LyjKI{O5$Aa=$z+hjz%5n@oBYi9>LFU<> zhp2y%WgD0zl`II27MQHx#q0jZQ1?R6*b;-+G6hou8er#ueObnYmz_qIx%G9Okg#=Syqf%F@g`~(e9?T zs`v*TRUWGyYK_ZX1q}69EkqAUF!$1bH81{?iLQ!cPq2B4RB6Eqm7V^}T9NyMI39PO zmF`DVRY&6B!hQp}WUr$=^sVurGT-S^n6;&0P{*%_rDCW`=W>5w;Bgmizjei^X$5Mu zzFFpL>M+E<$1b&xSQjJ`;^X)6pC`Gqfs;ZppS?#>7dS=VD15DW0)TqP7D{(9KZ!Q=X@LiWbEf@V091zq z_Fj%fw=R!pAfAFfvzM<6t7{;{>H|mMEZt`c_$wnWQ$CYozkJ597foS^0CxkHAFCP} zdb`yiru{J+--!}4$ zX0k`AU)AsU*TK$q6hu!38T?$%+7it=T0-f>eMvCA+);TGKAO>Pn`}ShNs#}O&Y4xS zqK`iOyuk26vGcb_&zM=;R-mWyZUlv>zKn5S;F~&3G^9KU9OYOBV9a>g&>SjK`laDV zZBMV(YQhbO5$FSTGV9V{N zvWwSJ?KDAgsrR9J5xWAR4HzjU8SZW%Fz^&G&c?TY3-0W>3;C)3CmJDC^-Jt!cPnkY zM^*?YSR5DJZb4Yosa@4f+$3yJF3z0uTEbjG8v#R@pY?`}aLs)r*~7iUW>8USFrm^5 z8MDEcgl$GclM~2GX#c54MF*w{vrjjm{B^tfCds8`zMBMX5o2EAoln48a){e*`a`2N z`t8~8Fvg=SUlZ*g9tmLEg7S0+5?QrbUB4>r7Qf7@d@CfH>d5kM9xtlklLGdg3{JG% zq~`e)rQP*A9>Z(LxMO{`K@!iZ`;Kr9)*s*2;r-l#EnT@{G{NTrnuPN_L~!*{`<*el z?Dw@qoz$st{u1{dpvz}@XwqcRj3C}eO-@9JCJ)m(?uZ&{w%P3ct|^9edPfzUosN>q zfDZflw#qO6x_Q80`|&M!C{2VR!qgeo3~?U$f)ueiw&UZLvFmf;2FRJ6Djk8?lDA1-e)Y>P%CbsNbn)cNlFLAvz#lO}ElZ@Q&GE zBo~_(l>F!g_&5nSH_CvEX5e&q8k_1kDOVIf30Rai3x+YCzczz=ly_o+^=vplDxuhk z)pB#KhjBd*T6Nm*3fm`vS%%UBG4;FbUG>CR1KVbI#d~7aFCZ~hK$OpqS0Kj#ym`i8 z;eSngR{r#*wr;+P5!%{Qo2xsse{d)I_2w{d> zt)hfckJh`z>6kR(qEWNnZrVa>*Yg!e#6@FlyrZg--6Iv zd$X0;VmYHZ)z%R_JRwNdvbUI>ABt3JYyHA5?>Kx-(+tu}8<9 zr^NO*J636CP6iez82(sE7kWAAZ6=%NF#z;A%{8@Qv-53ghpH0|$wIDOWy)htrz(t{4!X0ml{CB{eB7F{-F}+_K#KqZ1#@ng2+*6~ zGKPauk7`d&6D7}^NBxJ{7&R0ltUv40X)_QkUV;L%!_mF({jjUyrmpeviQaFIiV6q1$_gZy|WWzZ7rHf3+M1j+QXZ(u^oqdFJ zw73a>`!7mF)qPIhlA|os*w26|6}0`@#6|9E`UML5-~i{3D~{^y3R z+|yt#(A7%XL|rJpoO+zP(x5VMWas2aTiriyV&53R@a>mTM1(GLCLEl7GIaX=$8bNm;fa6zHPBr6GqjV}|%Uacxq1P4*q|zuzKE(@MWZYV<{+UHIvbZr( zKdaFuaP-fYmXY-^L3H)wB{fI~gNxwXqFO+>lH&Mbu~u%k~H`d)Yc1 zrS|>Ooz|pTxZg=K4I)E$y4{ zJd~X)nIEFd$r<$>w2dYK92;=Lt6CE{nnn%p&!QHTjKVx} z`XO!`yXusxi)E}m%tM2VJKVx9uJ*zXPJGQO#yhHrdN+vBA8ni$t&XII@g-4%m|=yT zBh#^_#y2lXhtCxIHFznpNz$wIOz6;30a2*$f6~72R+o}n(#3^X15wv+x+cyLj-_kg zv5?oe><^69Hj~&Tx;3ya#M6u}e73HFM79w-Yy1WjAaz)X!q_6!Zr7r8RX7Vr+Ayv&tOomL6#5y&rg=u)__ct} zeN_)^vUkATn=IpDoVq4dF%BQ%fp;U5l0y?#ncIh@4VP;(*}+sOpPl6ZqWxcDl9vUE3lm z)rPI3eKfp01*9kPgnaz3Z)?bA9p;4w%x+?K6C=y)DPw5U7c=Dd3*dT1W(V+91P*2L zWe=1d%zBEF<3@;1tL--4deF3aa5AN>Y9a@f&bx-5M=@;wzr-+26m`q^?OWqsJXMo% z*8u2v+`AlK#Dpy&`jV5;n+`$Uw`P8;YHLK=kf}ZimVzf$adRrjS%B*79islU3!@m{ zQL2F4A!drG3!7?xqf5Y)cKt(WdG=H!x{=M#vX%__X8s8}r$upp%2nmYsYCpU2b^p* zx6m&%^ioo;r3LK}$Ksb^5!kl32d1yrWScc+X^cE(UWKvZs1-aaLxs#0DOGb$%O_5-oA=d5 zfHtapR&+1|D$7g~IJDaa5r!QtTyv^(jN-O%nK5t@e2WYVSo;L?IPfu|DzxhQQ#TXdxNPEKx0lrJkXkR;ozafP1utyHSxEY*@z$`fXzcvsu0DvsLZSe9Q9?rJ0R` z?p1NdXwKyAwg*7hTRxp&@Y%{xm*fRaz9Nl|k9j2XC;PeA(fLMli7Zhu2Kfjzor(;k zAT3OczKY!X>`laHO~2h6D!26s0Jh8d9tYS}O4b6ybbsRqOq}l@g*L!X(ak7}9t_0M z3Oy`iaB)u7|5WWiei_C!!bbYyA|;Pl6b!%I`YC1# z_eA7HjZxSUUN^3Gz!arSKY5D!L6}TLh!Q1~h2xK5+&$zN>rE)|9aO9RS1gYV>c`P6 zCs{4{MT-?b41EOrx{WWWoF*TBOs>a^TFx{~rXZ43H^t>38#Fw5|58wgL^YOxNj;-gIqAi5lY9SzWrsaDMN^V5NbGVkhv1(1cqZ+v$drZ%m0P%_ct!dUm(f_GI z^%A}}bP~%SI{+%bnE#|BW`?u2_~JW7xk>VdYJ8~YTic9eeuo%G5>$c3kb!12s>tHr z{+f327$){M%L*B~_-X175^!=!p4(>Yn5h=x)40IsEcLKb-m8MN70m!>jU5tkQ`xuM z(|7#ET_XGD$>H}g56_c~O-ww68h(=sLNlHU>*xc!>*nJghZf+LJ|qBl=J*V*hlS?; ztq^rUh0qAb?TEz{c<+VGAKx+DtbPW!9Cn6J0qn3qDP?;&2`CH^= z{lJxj>Xmd7OHx0t+`zG8Ym~md9xqh<(bKnLD*cZ>TCQC2&d38iFj5b01Qp+0Y}mXi z0(i2{EDnc9{lO>wK->0dnz-}(d!BKjuN$NNeJWeA8b~v4wIeh|XLjTP6uY_0T=v8P z5JvVR*-7&H7n$3|Z$5BMPzFB}4}M1Ilz6@`xbb*6NUDU7EzuAJEcld9FCq>|@* ztk1d1$Y*_pxiW#AdSP4N1BHtC_=ENH zvM|IOKn)#lRUetO0opt80w^TFLnP>UQLuX{9a+A!!|Y^Xf(7(>>~GHo=};32*bTNv6px*^m1dOR8MAT1)$-@btx z{>BHY-hu5WLJiqzX)H|!bCANS4s0JFs`KNZ} z^bzThx9kVM^M^iZo~SzgfD;PH?S{cvl>9wNiLjrnk5Af6YKrws&F7a*GLTsXl}uQQ zLFV*V&+}~tRfDn9`)U$9uOwf|#TSLNf1)Go{C_cSVj_JLx#I&r3vWEC@vEk% z@A#jJPZROQcPZ|FbehVi*Z_;~*EsOM#^%LwO(^;PLq-Lnv(5q`-!I!|yhve&gmzYC zNW=z6M(utSpwvuK{W7%gF!E72o%;)c{2U}DoWq|2ly&bWq_{5lKj)KGd8n|WI=}?O z!Az^wkJc`6p}gYYqqW=cBZUh1|Lv%}F&5Dh#$hvb*8g3ysOti*muec{TwEA6+SZ>k zER$Jcu>_I=wK?c+YeCL=+n`yIl-vMi0K{ml@HcKl7OVPBCOc#KZ1}tix>v+G@rsi@ z<36{!DK637>2`~z?ho2$fuP0;?g#{vPx?^kyQl6pfm4lrDkAj7>hec*AdHI%Yr)1a zJ@e$4)|j#-7qXGoup92L#>SUF8eq55_Gv6mr6V?&SOS?h0~(5E2vDnmG5`v`VM7!A z@%S?ykaMY|CxqT3BEt|R#LglL{U`K871|E71@nDduqVhynd$C7K=VPh@s`+HNF!DQ zJCM4ldMa(f%+5<7Aw`e`wf$5k^(U}T8b{!q_wE3>%2lv{U$=zSbKtT4 zQBUJ1sz$7KVJg{;sxR;M6m$&Gs2 ze>e@<1BSJ3+(&r`yE@f(ym5*`PYIl;O;@~z-}#{=XQ7p9%rX>bp{iMQB@ldEhQ&me zM>Ab0;Xhz-E(OYXU=0 zPlfM~;gW*0J|WOG#YP%&)E=k8Qwo9{qVdNwP%dZmyIZH^N3sE z7a~XF4CCl~)Dm+Zm;n=u!4obPk)|l~pJq()!G>D?bQi~h+5)X1nR0jgz~u+|5w)?v zk1Q&awio?NRoTa|VC0A~5I+wYyruFWn_=D}>^30ZF{t74oJmif=-md_l2P7lc@d-E zjNcms3S})`2@u8^`Ey(gu7j$d6jGg>fl}LB>v>!eqHa8Y%Di!kT-m=@r!+lFno<)~ zc}A>}mHOfNHGl5P6oMPAP|>GfRD0#K`SH&sKt$xn8Hlhoia6}Y&pog5Kh8v#Jm5?` zHeuJ0{S;UjLHqiNJc=qNpqG6@&&mZOyL}_#y^8&QzVwbhiTpbGI<YkOOu_$@f*q&2V7v_#RgwSoXj_hF;?gCYlIH{v`mj^#&87@|PsM!*}`(@Oca2nfa1LHM-6zytn`M0r2{k@>qo z^vgf~J6DN#kcT1n+EVIDjA^d~M4ov}PMH}cXgC;~<_tU|#c)%|@-$>z2f9MzZ_rVZ zA5lGYDhG);`I9P}TAU})8nUA_P5@F}OeeOPjfPI`TQ^QDkgzVAzfe9*8l za2*P@)Yg4g8pT9I_Y(8B(`ZvtnT8cFN1t9QqO8dQSJ`=+jMoUfmoW^qJOLr9^Ac3{ zyMEi|=@Qua%;ls=>H$MRx4-AKQ~YT+!kx?`1t<9}=js&LdV21%@);vlbt?*J00Unw zL4Mu`5YzJD($))q--iz%9X?0qf9@ig74Lo0(8sVR0kuPZ&?f)E)a3=E)dLgqSA;%u zi&_5Sg?x#*mc=)_)Z0&|6`%e~p*LNrB|FMxb}`p52s=37@Ou8RX@08S8E{5!NdEBv z>h7=-CJ7+M@jDEJ4S<-k!N|XTBdG(@;$;CgRMOHyQ<4^9=qEauxITLR1J+V7($irW zf-_NuQ5u03=Jdx!;2CG?*pIE>K3XSa^XvI<0EGqo27#L&&}dP+lB8^4eol^}_-tc& z`ny?`UU=-2a(1b>30oMUWU~IW8h1OV)JZ!<=*FkA|OL(bn6cI}W1rO6c=@JPxUB7(i zyMR4z32Kz{@Nu$p&#{4^e_GM!j9MA>O3R^5*jlZOKxbWZia^F4=%ec@=hU|BB!1xE zrPban7|>eTT$jtJK;A2^dMe3AySMYn$XHUs#u}tl9{%1YVm6!#vZlL=AAugEdMsP? znK>yw9~-O0|TeZ$KlX`DyKgU#I5-!j-`MQgze2WikO+eiBJj zHujn!0fG!bp&25T38LER1<&1Q zrJG@-%%p2MXkTlgJSx3<%(q|ul@Jc~kj9)8O&{5L)q-t3bu?5Jfj`m6>AbLL3#{D` z>n{AbI5TNY?1s$BsW+Vt;Y%n;7=Oqyvq|4^_AcRjoqioSVlEH7$i~0`yQ?0YePv~k z`__brDnNqnhln8MRCeUt`dJ}j;Fsf8YrlwudVDBU?qk8z55N|qYzhp-6W5d#%@}}$ z)FyUq8XG)Ka^y>ptj@}658L%(ck2|mBm%kzU@|?7Md3i^sR>m;!zq!JHOhPF4gI|` zPWW6{o%PMCf=X)CyHR{>Fl`}&xsIqA`0+zVC#s45{0z4%^K~#(|9tSktbG~2cp|zs z>vh^R7F5)FZW3!WJG79NWBK{!nkMhdO&@Oec|UHt+f@GKC#fwS^8&X?(uNnAPObG1 z&bq${>`fXsZjpCxJQ{2U4)0c&AS*k5T^Wmfmdsl!gKgIQ(2LD}`o zw1%|^z+2bcUX@|E`hk^@sNO3<4nzVAKhrXM{h#*UIx4Ea`xh6adthiJMuDMA8p)w^ z00Aih=@gJ|B!)&wr9qTN8lmPPm=Uq@puAN&x3lhn8hQ2Kt=uz40$kt{hzI~C)DCB94V3CDQctnN-R^+-;r zFsGU?jaIbqgtmmox}-w84M(?+D^th70Zl8*=oq~nR# zB*aTHHeQQ1GwBUvElJ$VyM_-#eDiL^Y8bS~LX$q)YJNb~4i(LQI+eAg?d0;+ZKA|C zi}KC8=s?p>+8%Ub_ zYBwb1*R+F{`-?ad^KIA_76(@Zs^Wbk)CT*E8c1UO^WO>b0s|on@DQBgD#k#T(`T1j zhy}EW@|$P`GjKXNrzRi9iG0(|#x(kF^}TI4O`-Xf5(@28;RX4IanL-20coR)ukkl) z>DY|GxPe59KkX4_bt}z;x6al{W7;*s49I{Cvk zDRLAU%pj&OHq0m;yV@jv#i*G=BRjtR!vf!vlt)L^$XyXsMJ5rhq^_c%H@uT?q3Gg; z7r8!af=+$E*^$j;M5Lro@g;ywHB#onu&Vn6@OCU!k*I46)~-zqjND-e)?m1Nw3qkO z$!(5{mGJzv>U})lB~say|5rS3S%6NBB^?T3+QI~^4yaN2$AZ-(7n}m}-4B$&w4&V+O5pRTAtSn4Bx&CEN2Xf(dBMY&Y~nWNho_;u?^h#^2g~>$H)JN# zX!;ML(Rk5yamWfs@4b{LeX{>+|LH?9mZ6kSsj4)b^hFWUeU2RW`hIzb^9Kdy%r(M& z6Raz#9e*k7CAP+PmW$}0YpE1Ms7G#gO4c&5yp|>;xqUhjJY*sM>!)zSbo=^w?m+}Y z;>F#pC^^02-et?3rMK}_eb0jOmxR6eH(1SGFW@_f@Kr3f)b?%*a~WcW==fk(G+j8l z;*P>|o#)`UxVmtx$MG`Hzt>}R@~j7^3Z=02ben7kAOlQr}s8DZ#~X7>O}eGvuz$Q4u;RS+WHG2e znR?MKR{h>}x?OIa8gS*B$veKA_?;#?QJtj^WqSR5GtNQ%&<7bdx!}MzR^EnhJE+5^ z=Zpg>5(>3RS{vK%H^EkbG4{NKunO1OHn^e^!!!8C?!f|-6iol70hbtV6g*}tqxk)0 zy@#m!JE_8;sB<+Ho@0#Qjv-eF&e#D(Sr(*BQmTt5#e;-GG_>n%1EnI(UVE>_4?wzdE+q6<6xuoqloQhXX4YZg&S-vdq4wmWz zRhW>?>y<;J1gkVD%4=eE$piYXA2i~_72I97H6?kBISuf)F%kJG@2;Oa&u*EPBzwLi zjMegkHN-Pr%0O7*O}4%vSPHOwiPX1b@TT5PCC1gypvYM7(k-Rd3d2Qnf$AtL)T^lu zx7oWU^Ix{Ds!nqmHCF+(CR{nLr6d;S3meB};4Bi221v^!_%P#1IHptV=5-WeBr=kS zEmFp^{5jcghaBIZEyp_>I|tX;y#p#VP z{>D$bYuc_X1hSI<-uKdt@(D^r!P*~XV4ZY0Jk%s1MXr|mkI~Vd-hTxjt7&vIC6={uKLYh+ea|_U{Pz3SweIlY> zY)v5v8B7lLUA9|`-G0FtHPrQf+ssRo*@-KIVr(3P8LxtPvhTaN)UyV?iagHn^q+ke z0t`AOgW)bw(Uj<9lNL;gDe5$J%I(O_apWtG@~cHt3s`BWj#KhG#1_7M4euqu*H5}t zsVFG%QSjSUZrDqBBD}XYXD4-d+=01&Y2m8$qu++)c9hg*1=5f3EJvbXv9ZBK{K9tx!Z44OaoNF3UEYP%}y6NJ@jr8-DqT;2-Ioy(? zD*LK9L>yEGsEk{vgDRUMtQ0$eY>Na~CGnsMOK)Xhh3dqvra!{8C2Z^rY@RITW1htv z7YVsA8Yg4R+GJGTcdj}C1{%nbYo z6Lk!UK|v;wS?^j0v}FtrB$8E1OPEt~x-U4e*SihFDjXxEC5&52jm6IFpX7Q=xjHx~ zz)E8hl8FKOPwoglNx|L`bGaWe5#J8~vL!v~dQnSt8I7||I!mOz6RhfGA(yc_xvAAskTs1aixNUfl>2!kuW#W^$w2ca8}8$Z;&Q?tiA zsk2b@J5tgEP>XM?waGP4awnt}2Tq~_VcM+3$9>kfQSXnulDqo z@pI___Ds)roqa^n)+IBHq+K2F|150}U@#}8!);U4EB?GLhl@LBB>!0wlX$|ydo2)V zx|5H4=GMS&&h1;9I1nO@r`HmP;;N_t)+5riqg)Z{ghY<{Y7k{6hgWbLdJj*T=D1&U z?w&k$%#476BhIYi5nF^-4i@KtKh2j2vjM>~!F-O=iT=27^%Ot3@pw0_QuZnHGFx(o z;n|t|(Y^-{7^xLuQrdK4FY4})iTx*D#;qsczKb8l9V3sh6ITt)vov}?vm_hps8$3L zJEf{Ys=AHREitH9w7&?I=w^tCiF+d&r6j#M$;bi7^LI+-lZV!w4IiCeebv1XgoJKU)HRIU?e+E!RW=472;xPl=$Y=;Dg<(#!okP1#0nr9uLUOU4w z`#!Bo{aJ-Gn80DFhaSX#KxB`9l2-Yd zvr^5Lo4OyHpcfy>50`L@r@6aDJPg ztS+w;Bijv*yxQyfMMa!zn4BPCoVDAzVFL~$hKp<7P%Fbu<7#T3&H)$sN!R)`5~`UO z;?gQnP+=hRS@l_oezRt+h*H~&JljTr4bL9L{MqiuXSb|-LX-*1Tf3B3>P~WZ>eFFt zJ-YaO%Iovc942M0#LawA`E11Nl$)ECT^&b9r8_z~ zLgZ_Y+gbPVPCK?1nd^bZrjJ(>{(V6>b8Bj7!8x(*2nh$sl<{$#*|C%Km+h6Xfh z_bwyOKwlQz=S4{>^%@qheo6%c^EyZ;ZWo7J;4+9RH854?;UKr9$NbNhKR)w&Q$y9a z8P|98tjXTB`?ft|Vd67L7WY zDj|1V_Kw?ZR0U>4fthoAUo;JGj!P=Jq{eAuQyMv3*;(2bnsW}#)23V1F6EOcvR#xo z_<~G$6*sed!0Pkace~d@-Y79(s*L^SgK92eLDr04vBSrixAhvtkZtUWekqD%Avq@S z)xi;Q&coUDpc!&!Md<8ldSIDnL|qhXSm)gsX$I&|fI)XhR0iq~!{! zgaNmSfc1Z2t@`KL{t+zF@A5TQkaAHWgBLkH3{^3CdF^iY<=xz z;$f6!nkED41=GToyVWeiYfW;cu-jt-vv1xqHz+G96Wu#xV7|L`H1T{N-0RrrTcv7?``2 z4uaDbvrcmCM1;McQF*g)WX&aWoC*v%!#Cd##A{}0$j}_{%(wwU2<8AK(HPXs2?G)t z{$LXW1~5ZOis;)MdPD(dn+-pR2n9sJ4V=8iyqCmaP1o`hAWOTg$A61B0?%GS%mUz` z$~@Mx5vWSl8@fuz+yYZR63W@yoCgi>DkQG`=aF~Zl_dO&O5Q!x%VrCef?r>@3OMCw zN3>)Yd4@O#sP7QsP-^TvWbM)Py&w*eOUEb8t~N+UWo7ikYrvgM4EN+#8#F7fUC}OP z|HfWRRB_o?(OP3gaPzWQPS~f+rK(xGweMrHvQwbWRF&#<%I?pfS$TMiW3?7rE{!ge zTvK5`2|6D#p3%ct@K|th8O7*xQ4ugpX?%#QL+Jb@J4i1H@NY$kZ^i(Bc5n1~PymC# zmVBPj2iUn%rn9C2@GY`rhV$Jk)dNowMuc`18zv4cg6?-H}kd3A<@M_UhyxK{eeEOLA=VbV=y%Xl?wk`vtJH@`js74s`0rB7p!F1z?TbrHzVnu5*zo(o9uU3+aF zT>(Bx<8EYz;Os=EN=2LUr6nv)&}3R!R=uV{Zt;A-ek?@~**-WWYt=-w$t)u;AR0f>w(U&yaP*l^~v zh1Z%}%Maf@GNv)~ttA`s_x3PxT1>0iuHCS&rI}&B4Eksg5@;4i;vQo$SGjYB{YojC zK91PQv)(^cBP@>byk6xaCRg56Ir*#KFmP2~Jg7^hkO)!{E8fC7E_`+PuCG#2rPHo0T4?{L>Md40yt=AFnY~zh;ty{-B0(}4idB{4#Uhp1W z_GCG9isz~j3nUxSTMw7!(NcPgg@+69w+3PSzcrs?1dwM^!gk^ij7wCfM1DjJk8wT- zfRx*Lv~Wgb61QcF-jTxh99>zy#w4Jpv77H~zEZuKP=5F9*4A7?WTBe7&Abo~X|k`< zjWkNF5qz0mvt5U&Q!2Q-W;PT%l-Efwuy^U6YZzS6n^R4Vt{pEgmooCzd8}e|sj`Ef zpMn`kspGU1Y_L#Bb6%F~7k@ItQXKDmGgUCd#(bM~bAG-m@Y1WRKV}!HwCgQOwO7>u z4Dr8v+y4Ung}TI7TpV?i>k{-2>AN$&F}u@8d;(p>zR(Y;*g)X{+8M)0;)>A9ypc2& z|H6`&E(RME!Yd*yZ|NArkPp7cS<}S-h8sL-*mIdTA&~(>b)%ykDCv~T+TD>2B{%yd zt*_d&AHDp@Cv?#^N27$c!Du@o@E($$C;*9rRQ-mvK4go=^RxjL=m3~m*^DEDmj+hbL>Drw_z8PJ9rxr&wj$nR*QZ`eO=%_9Dls1q~UAtHvrqkKQA zt|#IH+*b|Mg~y_+51NL%DM35gLsZOn>IVzAqy9hovpag2dfO$DQ)Mpax#B} z=A@#8>W(_;f}96<(_$z!qA9yOz~z}T&)>?Z1_ne8ipLy?7ya~Y#?J?WKChyh(|g(7 z2XXYMH(+>-?Sw$64@b!gr;snx$}zmd8*3>YgRys4@AnHfl^k#g?3cH-tS7)KTH-3#yo8RY7$#x$0oae~o-Sfq;|!#YN#BlHv1V5}J#!DU=-NiboX zUo=<`-#YBGY8$O8IRmkVzC#g_9=0Z;gMFBvkn8ELXN_skfT}^K7qeK(KxX@mcX!uP zr9E!{UB%o&Y~go-SA*h#MZGTi1))>^Xq#Y()by@NXae+oc20T;R{XOB*@kACOaI(o z(63-RzFd9A^YmX!B8KE0Ujav2b>4P<&d?6bzG$i+5~}!=I}&e8pEjfj!(mC>T|G;` z*kTZM*`gHn-4Ygk;ZJ!Cn*EI-O1T@7IJ3$7g*Apl$Hu1K|x6e%VK+V~L46Txm?-}4}gDRuHoe`%yv ze8)b41-O%8;GjZ} z7~U3J9_4-HQ8 zp5Y-wi0k9I(vg;{ zbwJw0oX3(*Bay}{(fJs)-%2^=$`#93z&HNocIgYmp>w07m_h^vvp_CBm=$#e;r9Bv)80KsK zp;X{g`@vHR)d)!-(qnB{L<5}qRMGk{pu%p$Dt4a&B_&{Bu6lm@9EjLfJzuHu^3&E- z)CVOv!w*-u&RLdt@EX6DZ+&3jN9%lKAU2(gVC`bOs1%~?KMG-MVR%hJAb$l#h0vqE zlD`k17*hT}fn*+2u9!2I=nUT{ND3u718EK&3$x%<3V01eT;aoq)yW{__X{T4dV>)Q z)n&1W8yXJ$YQY7&ZDC%d3sb&`&W zXMA2ZV%CgaJWg&HpoMR#y}VqX7r=}>OvGiPr}*;2Y6?T4z^0B+jNDz&npfQOX->)1 z21)K)o>kNzYyFSS{E!zgVM<9!Qi_gxJi5ue5Hn$Mdb)bFe6YxLB4MD!lnI=kwNz|6u~IOI+B-ohY>tYqM}A_FP_kxT1vKbl~=DbT%~=2%EqjA@|#} zZ-rY?wXPd#v)|l`Rn=DbTQH^GT%DCK?1burf`GIx(Vryjy<{savGGq>LI^^-Xt*)w zfWJB_);yfpMOt*X#r5%HoDJ!7g5kyn&pO)fZ#irXE4DiK36i(WcR!{Tv9A#$okaP8 z#*63iH7B$rx8{b9o(&txEw_Mi5cYTf4ymQ#Xx(HOfQG?1u*HTOKQH{vKnu~9!P^E#)R%CMlaj7tg- z7{4jkk~^f+vQ*ehf8WuE-^+{xJV~PMHsm@~rfeuGT6OTtRCcz@G+a$X${T3qxS;Wx zr(<;Y;j*}R29%_)eAa0c`aTudD7umF z)82~5J4TVm=!~F18}!djZSP20dzB1UkEfK0o*g*gG0tPf@7eT#_joe}xr0cTU4;>9 z-$vGnC_i5tbOqpD8j2^(*pAFGV~bOJj>(&h4_3o|+4i1zuK@V$rJw_uf(QMpFdGg+GOUasZzFvLorqA&M1#Tx)@fkS~MD1QV7K(4F; zq{ykDCWnD}GzsA{P3U%lVo+mSYL;{a>HaetPM&<2vFK;|$c3|T%Fp-5hU|&2csM(- zO^l7KR1ey42sMXgL>;;;x2>zCc)y)65de#;3y);HS#jekGehaBbPzj>=4z^4{4mT1 z3QU?DC%CljM$-QlXv(oIo0^NvtWd+_q6xLT9%837n~= z*ENY@n7D#5a@l7cC^+KdwaO?Iwv)N&2uj~FL6cD#m-N# zTMY0PMQAg!+RZvuE*3xhI48M>@HFmjg^PN!I-L(Wo(#vXZ*YnGD6^C6OA1nw^dpo| z>t_t_n;`tAKc#IRk8**!R)04HQ6JL;@+uLtV*FemIWK$W&k#o)AGk&Q>F*kjILYhD z{&V3erd--GBeS^Yf+t?;-BzwnSz@N-PiZT@Yz3HgDH`^2bgw6$PfwSRj4`CgS*9V`+W8WP zKk33_gU$LS^}0Gi)6>di0{ojnJ<S*SkBXzvH23uKRPvg*7&CYx_n=@$577Bg4lkQFDi}tD>_F=ieRym!zW?;6`H?; z$3(xlc8sxm^M~R-moEyi8j%Yi0FeR-V`T9Rr7-GzWC0d$BzbeY2yfmNDeez0`@9HE z8)#O3jxO5kwgn@sfgbYj@swS+PN~@K(FM+rJb$=d;Kw#iZH1A3O5CV^l0whn+Z`Pc z^Qwh2=!e>;VCc|VU?;T-x;`jFm={{EDlG3C@J^O5b(XyVUAUoT7&arQNJ}Q)_TVK6c zc+(t~%-^kh^XjB>ivex0F5TT|+8{?+Fc~D|wd6?; z?%s~x+7#`LnYi`bJ}&0vHAQQ7)GyfVcZRVujs!of zj&0O3)N*hN*wFjaB&IMQT{)Zx1_R-plGZ?Z3Q+s;#=z1Fz?$KLghc-l;*J0&A%yhE~}@R<0I9IQer;78OL=WJVZ!{LXpOpFBP{uEGN&4? zttwR~bA;Cu*nXsJ%twK>tZ)h!91iC=9{IX2+%7HpP6{}FsBRRm8~I#EHr)JrmW>$h z!2R?CG>A|37ookWGicV1ug-4j8~LuCo_5q5#q5`;%>(mew)bHfJt_+%dt`k9eYGj8 zb*R^UZ_Z}6)}bmQ0{eua>&UOy*l}L$XJfO5G9>U=@7lDdPA@VH3y&e_YOitR_IQ8J zscylibk`@%{1;J}MkD)Qp&oY#8Z=w4{8@0I%S%RsMJDyh*L3Y~m8LnZDxa#IkBCw* zWLJ9b^&7akJ2YF#yZyO9_xbZMPMET5umFEnCj|~PE;`D?bQnfCa|!6g?Z2pHNHcG^ zO>Q;>y!>gi&q{P!d0$PqKfdb`As9*e{i{^yXbmha?N_^F1cZe*Vc-o#SWH*B^dg}q zq-ejlrp=h7{_gf_x8=%zcEM}J&Ao$5N$&Jx`OJNb062oy(V!H19I@n{o7uzl--`{> zlUKL)yp*M#*M)Fxxu-RDMFZBlWPSdW$ve2LhRmOiiqFA1zA7R~g2;ebCU-(o&`bnC+nW zu{>o3)a4KfNEcF6y1Vn9-AteT3Xj`~8f4r;g=(c#F&mZ z@@;waj|F+{Yo)sY+MB*yzrC^^dzT^;5C1)k**9$s7KuO~V3n`Tz@8jlqd#N;8{cNA z6p+Eq!+Njeq_KM0n6pauw-iu7LJ1G5GS0I@a-&(3BLzb3p~=5ry%3Km;Pcviu@5-X z)7X4{D()b4-xU&MTI*>VlI`vmc+itBC(Xfv_3_{ObpOiz5iPdHT-%1%$wS=pt;51| z{X5g_~pL1ZR_=q;@vL*badBL zr~X?(fJ;d-qp3A%)?)5^f|*O>;l0rxUr5O*!rY{_2g<@9$R?zyvXAu0hp0fg3MR&C zC+-W!|56J0<0Y7OaU9fAa-AX1r6GMFam5bky6>WttgO!Ir5@Xiou#+;J7379N@Jul^Fa<8o*KZ~5 zC6#pWd%WqNKg1(N$-01n#yNAIlgnaMocz$(rCM~y)>T~y2!ouK8g|n0sR1+di;s;r>0Pd~1^~w?` zANrRS-OGEF=l~Ka+T`nPO&~2Qq7C@1Fjm8vX*DddlTjID8=?Q`0+L#HD$Q|rzOP9C zuUrB^(fh+B22JfzXtejp8!HaY+^gt88yBL|B_gHjrx>?%Z0iflJ2YxZ*KO6xwcu|jgY>||`&^a}m z{kuW@+MAz>2?+i6JnaAY)L+X+VFxVFt4FtoLg!q*%ed|vMjkU9boF!od$E(zJyP4y zzw!T`^6U{bve?PpGbbMk1BaPMSq(od&3o>@278Razr?vsoWj><9ril^?yT2HK(9%G^X*mkBoU<<=%3EBD%K{fdj z<5Ar|68U=-ssWwe)HSuo^1T>%Sv$Mv(>Q-UYH_H65v_m2<8%l*e4eMTJIH&16vHE`a~#_RuY zn*^*L)?eAfN+&7XfP`tJ*KF95uEi{6TO|F_uxWi$WV zc!0bo8Yo$rS&x7HZ%+TwIzU2y9npe7Y<3vi8f*MNr2U_g|LbRBpzohVq0j#})cgm( z|4l1B>Z+`sA|gnK(0i2{rPl;hK#HIuy-J7BdkaAjkluR< zy+edR0tCVr&biNd&h@;XzV9D!a$P%nXYW;J)>1gR-`rgu((Zcj4!Pt1=?#%@vomN1W=J#61>yb>S6}&%-_Rft= zdmC$fPD;k&;$(bkg$2g403}~Xm#mr2Nj{9kkcTVZy?a+X&}sGH3*pU1qMtMzgc4*w z(}*ndEg#W z+(uu?R#g?iiN7WVTp^$X5aX{1@P`b+{eNFSCwK%P`p11j03g&JaOLkZYWVZz=M(<8 ztn<$^(U%Ya3I5k@{NbHJ_^;Ae%`=Gpbxr7se+GD>Ew7}6KWkgL+Ss_by#l$L2ujuB zZ(Mu*!oUpxpm}(C5GZN=^$XwrguRZwyS}Q5gcZn{*TNcPX~XO7{Q9yTfRwic{?ggT z-Ga&6*~!IC!dsff3@?>#?8vr{$T?B+_IZ?^CZ@?AdR z6X50N`*+*;s#2GCB{b~4ZJZ3A**oLM4Bv;0h@gnnKg$0fPyVOJ|EQ_|KQ#qJgarSy z>VG`?-&KKbHm>p@XMCUTGXFDQe^>s`hksX;;=5%1KZfF;s04h&mSI z58vPRrG&k6e|Gb8l(M426>f7R%>4U&`@xi7+gs&Z1>vN_$uB;0!Z2!2=@7kXUb7Fq z;;#^OtU%6w?(X*X?@9XwStC*t{n>lvrEbar2(JA0t3s8DkwB%!VE85>DN`WeH(v{+ zH(P!^`Ex@CfdIDTC-yh~(AiCRt;AYp|0;{y)~hS9_mH_Zx;UY54$Pi(w=rOi+2MN%04!NX-RL zuV?4xZVi@O(TVKowKJ-ZwlJgui!{KiJ@I^5svL^HpMW4KPC3ei>uP6vM4?BM?5sdu z5#`V&s_G5756=++<(8RQf|Fk?|8M-?OF2np3#>mc2I4caQz_Za7VFn**USY0nRoxd=J2(fE!nL5CQks%+uynVM3FvzArP?=CR`7E z^!yK;yW=Nr^M$|O&6Z=|Uu1viS&)V)u&V_>8$?Wh+@YKL`kG*q}bPLQFhot&z|lNki;84GMlv>|4>h>1N7 z>$;0&cTh~ym%>kjH!(f#101fp{uh`Luw!n^&o#98hn;#QAiKjpDY&4X~g@A^$#OB|YdK=y`nHdKEnLLL{u~1M&UQYKxQu z5>nZ5q;w%vHZix-GUtsKMrXg3IAGck_6B+tEMww`VfQ9XxH41b^DH>^xx*@b4KHu=Ub0S~ZAqe{IVtMF8-@Hx+1Q4gJ-P6p}PyG^KYzD;!? zvr6W*S8*<~8EmT&4ausQ+0~EfRghP3_iclq->E0OwB{);M3V4Vr`^qojXokfc5xEZ z`isptIE(dcT!|kh?s8v7k1@f#4Z%8gc-3clB9_kGMVLDBP*%MsJe6c@WlBI)wHU*~W8T0HeeLz_fcD|JL*FlSYB;+_bM025f!XfruVvqu6(J6Wgp7x8i}h-ZIZ;A{WJ(^pqRPZeArTIRlEDxF8&~+K z!tci&gSVt-0ld&Vq(ifzew&{$q3K$H5nM{{mZ1B48hSBt>w5$$dneBqQ-3eRpQwX` z7+OaCEwkgKr@0mcN)Ud}f~{C|{*q_~rM}O$o;%s~ht0r)5eHwX*bmXA(8s@K3psDz z+pFy_OeJwgqpV_==s0={s7iErz;(%{=LaMKWz4-u&mdi}uZ1}916L^;IUo>VuXe*g zmyJyeKIitW`wrKF*T`|U4ot|cdQSo#caS>Uo45Cgk=F5NupI~Yj&<3x3G??V0mn9% zYN%q9FILIS|r#q&WjeDQW+&VKx&E~)!`)%3K_wn#0 zC!X8^Pf4h>9wP&h0<;1IgC@IM`Jb*?o=Ha~*IU{q{mOQ({$g7G5!AO2aTyBs=uQmm zfIN+PHIM8FP}G4vdxD^VnNl#oG)PPz2JW+1-1@D73L4>j-9dDBhRAkkfq?)qdU~Eq zqN20Fz`x(s)qunj`&J^w@v2lwb*vFyJQT}Qm~S4)z|ZAHuLX_w_iLGaY}rnQc04cjv7Z;$( zHynyuTGAqM52?@oiZY=-8MAT5`4E2@iHT_Wlx5D#nC)&wGWx9)}GT{qS40A81BEc(?5~Jzb`HgPvAt&H5HvPgXn! zkgL8fa%!>0LUHPn7?s^nbj|z>yrv)a+jitiXqf^9^6Cs#3fH7u%gJaS{fZ_`kPp29 z9g3i;Ue$Pu`pz8Kb%c;@dh&ZcaYlBjQPb5n>S=;K><})tD`ox-+ehk0=xGg;`J%$K zt?3t^EttWJJKbu?vrK9u^j7Fg$E~-hei7Eh)WH$6$e|JP8{#uJTdrhh{Z@ehf{c0a zIyFJ!gzBj090sglNH2eRSDLd_Py=4Bze&frS5YnW4=2N8L_EpK)R% zvDz1zVDF4{vW{ndg%n^67py`m7|_AmO89#@_j!3~poP=#7PLnnUe9j=BX3bhMQMCa zAccD@QN?%+c%hCwFKEC$+FEKGa|qqd?l>TjUvL(b8aqQ-xcbrx$il6(46-k602;&e zW@F*0Qre=?Mo`u++rSF{z3S$HZ?<*igcb#-nHN)AquDh={)vqpOF&2gs&RyxI?)V1 z9}sk@#dr^VqSTd#8imF;qQ-@(Z*M^qqc7_8Da|z07Z< zpYO$(38r7Ds12RYg}NKSzWCNa6sf*GJFSZS@+I@(cI{U1XKi7Jh>K31740;i(zXG`rgMmc-OF<_!0+rZ*nE)cJgNtJ@BD?6)I;tk(bbC_S*V zG0mBkSwKPHv&B3#AWqL2QCeJj{lK7;{P(N)rdR->om8NB0O%ps2)vI%9&Nn!hEqgu z0X1o>op);^WB&w)Yl%tC-=XBx*7)9b=^N zCy(u*5Z_6l5Zrl2q}TvvXeSCP+1PlMZYb%wGx(()B4!gzPP@!1~M}<`<$SD`2E5ABw)qkrkh$?T8}~VQe#C1 z+P4-LllU!~y5pm@V{%oir?1P`SoPSp(+El%AFPgi&QjFL^;ZBwbyZ{7RCQX*y*)NY zl^VT}<3U6uqxqVw!66|Bi%dJ@K%v8n4efAVL0Z=Y+@=xIL| zPOU85_C?|Ovqvm~vtNU^y#3$aj=Al@@(^ez?38cW9=?e|K)ga29mfh|Ye0ySWn0q9 ztuZK{KF!{b?~gke*Kz_r)VpX zV*rB*U3qWt$TTzCY0}cKO(j_ZxW86!P-)AlpAk4-Y?imw{_+toFE1se$b0(_{W%9o zF}D2Z>~!3nu9mRyZ5S;CzDyQz89i9-p^lO5IJ7KSye@0I{^1%qxtni2K6a5*V16Ku zf=!-SXnlzRj`fmge|t*o{CH-%p$0>aYFXI@anDQtPPfa=)8M_8Na^#Myq?pe?bN^= z{9viwtu+5mxI5FRhhK+eLT*iy^E@K{;+{JR+K8(n3VpwWn*kCR26E0PNwVhcI-^FL`v^ZkCznD9%4)V!%5mP&4mMLXvzzRYy0)5?Bv zOC3ZbxswnuY08hb@ax-|shzlHo|$E(Q{!Yn&Eo&Y>Gl%KF$5Tm| za{l$}o#NRlBSsZOmZ@;eo%@?x1XQ=bsJBPNYv|~F6;d$>>@)cITfzW@K9@n7pIzyV z=s?rEjZdP{MVZg36K5WhQY-vnj20f^)n4#t&(8q1V$#w-X)qx?zz-Tmf&a`1l%nlhPRqE#6Z47gf(+q2WJcpt7`=@gmPSQT>d zbo}@DF;FfIk4g7WNxAhQ8Us-V$m))ZB`O$ntElcRj@%&P4_M8|6pxzv6c=!d(8GzS z7MS@~9A8ErZ%Ldj*B<~Y9?7!fNmVlxdl@0ZFsz+5kz?S8_a)RRcVc~kd|?EZuqi(s-xE@ zcrsFK_opy4(*h43+!ilZpZ&x@>`%s7(}X{A(hO%wL%mHa@dVu?PZ4{=vaCG%Z!e`k zL$2BXq<>+4lKMYcSh2xp5dn6Plejit>mOaF{CtPS-?nlr2}f;(2}!-lCl_qyq5=%7 zWi{XP&kO!54b%eXxOx9ecAW6?$_itGhJj56d$MUJ3)#&|zWjdU4|tBsC0 zXI9?T4O3KQ^Z#^Ur`*GoR-pHMQ=b%Wr2Sxm2cuN?dA3l&$wZ4BO zB{h4^k`VOd8lm0u7Wx`)!{#TFQ3|PvsTKdu`7lutz9FX4$@3*v=Q~hwdP>a~ltB=A z&ir}}34Lt&-LzCyzxO3!KvKL8>J*qNNu(r(8cvk0#yDK`l@avrFL$N_*3RXx&v`j~ zaSHxhg7V}S&IT#AOgRiSH8s^pt=`=YVV0yHu1cgPzzhtcPok;sS91jo(N-)en*2S_ zVlcwh14iv#hd2ELeP}y7Y`o$cG2vDIJw`%1Uc=%=6xyy?!C{RvsAqsTbB&_Vr};an zh3nX6A6nGvVy>($`r%)HB{2W=+-PeXs|a9x{O`DVN@2?h^R|aY@Qd~Y0GpuT@JSE9 zbzWhY=hQ=Uka-1UcVOtHE@*u3{n^yma zeqbepz3P8x%EZ%jf3)7e?m$sda`B~(PPP!^b+}v_%cEqQh(HRn9ppS3IV_x9En2Qo zQ}vSdU+YcIlk_X8Y=%Q@w;1eaTknH#G@XE~tevTd31In#*$!n;SXfvR%)0nF4lIV^ z(Gt?TcIaX(r|JNF-TZyl${Ixx2UUAh(|nIG!D%&H;P0XTX^WRxr>i;jPPfXW&76)c z*ENl6Y$MPQJ8fS!KK{3dZyhRE{wbi)v_3MkPgO<4AD;ThUo*GFHNX5MP~p~BAk71M4_K=z8-Db+qOgv^M<7L>46D?TO#(VX_|V97 zh;yGSz^!#ws*Ba{%7H*`09tOC?6SCA$?Y-%m9g-g6hOy(2I#`|9e7Q>90BN%zFI69 zcw(_%-dp>k&-mdW44h3j{y{tF?BpJ+q+aUO2+9_(c%!+B|27A5XngL`I-0fEy0nFZ zgkQv4N!kUM#QZ~n6cs(7+^n%m9*yhl8~l3#*Q;je|HQ$G5+1Q%@;QC)23^af&x18? z6E4DpqHk-t(|Z6mhzeNf`aLV_^;|bUiFtB@-c5}h)qjmCFMdpSzGSEF+!2cfbfA63 zKPP3{BzrmZ;Xdt1rAW=_#%QtYd~>&7k23XbU73m|06n;j47Wt%^R0|uxr6`VubTwgrdRlV_IK>grKwu1=OTIjR&Wcw_-!dE;*RLAK0!rS`9=Jd$_Z4ID`=c% zp|Y6wHekEa>yHLGc@2OsV>R*!AMfDsRQMIg` zYNr%~J^|Q_#O<$N(y}1S@@Zf;xF0_yYLm84pH}7x$QI)_tUR$8gY$kG1F((t-m|Jz zQWY-=PQKxAGXD#5F1->$^vZx&DK@+_=^N0PRrY-XQwYi5^Nx>nT&&72HlDhl(uC*>*dSGxgRgmc4Wk8V#*SEJ4*A+h)8tjbi?Fn~3&m^Z70cX1&ppYl z9|pd`fR&Wgw1)S+d8WWBJ(yc9)}7+^nj%l$D3EcmuxME<-XbHDo>aIS&QGUWy5E{^2Ce~=C(xm6vXm$t$#@(|6^cq;i$H?(|%y*Ex2Rl4UnnT z(@%G)p?+#DzBLQKa)IFp7;xxe57gZFV}^&2cHPF2WcAt1L~5aQ^Z85SZlG%I)EWoE z0gamA+T3`OUJ)TwhIv^(v%_m6h%sh zn}Ou9?kgFVToXX2>X7h9HKpPm8aayPk9OkBcTu0c^Jq zhmuas`Rov}Gp0px>JY|XVjY;`-1FoKiB;#c`vtDWCNnv6Ov2)t2s54GYfr=V3bOjm z&Jt^stv`hv>!Hbe^>`m@enVc56^|o&iPM@qxdHAl2QkU57EgYc|jy4_|%G$h7 zzs-@UVG#=&e^Px)DMFxT1^3Vo3p83-n0{y|c4)hM;%Lxtb8tM2hdxh2PdbxxuG9qnSZ8e0u3K2#Z9-Du1ZCLEbRU?pJ<)utgl^+s?j zPWqd$f+Oc&QpP7wRY@;rps4C|8*#;hmW0L5+kF(OVb^joJtfcZ`dR|cqudE~|Mp5j zu`|Jx{|f)q4`m@zYeVz)FDFUo+gB8xDQpfyL3-BN7q=eOxEMkW;87DIs0R+uGxBwz z%@UXmb^RoJdrp>59(Yw%l`|)1a*{N(kIFTMZ-m5)F>rb7|JW{2fohd+UG_V8Lw-f_v zj=+m#=Ek&@Jt8t@&WMC9lU_kW@uw|dHEmS@Rg%B)s%H^iljl}y<*9`0QWq{=$KG=Y zA?V)w_H%wgR}ILzJ+*-&tiTN}%GI8tJA2(9X@kn=(r&RLkVe1P1=8hbod6 zadMVRZ;Ej!FClYivbK(LDDrhMVUkfkoE# zvCvQ8st-)br#z<%vCMSmAGa~*l#0DNiFGj(gtPZm(xskX_^p}JOKxE$2OZN@HIAln zpg?y}j}Rdqra&ks8|+hYhV{=BqaSDma|-L^_)4$x=|3{^{G5{FMA+f6=K0Ld^I4uM z3jUczRm`C1**zf@+l6n6F)?4NY}*-aOX{qF#XfN-vc+pc$} zlTgE|X-5i6gh%Ue36*PV-z2=Tt`ZL87Dxh9|jr*R8{GH6No&KSAjnJCitXt4_S< zyk^hc_tp!bU5TwO99rjH&qRIZadbD|)uJ~>g^Kjv-QHx5fqQe9{F>5Ipypj1xlIsB zNy3L)CR9Vx-fu}Dr(^Ewyi@D37acT!tg2FOR0MftLzhiIJNS-zI^J4u zavH44Nehttbwo&bw|2S!4>nSgjMApU0c-;)TTVV%2G`8vnz0#i{`+q$5g`*&xef0a z)V;3bLbkR9{Hw{nmZp`INDh|MI`ZP)XP|E(3~6>j40t$Pb$CC#h=$?46iRNe(pJ| z8C0vqLr<*CPDWV+_ZJu1A;vA&%zI62IM$xZy>M;f+`-RdiMC;$PKECCclzQRT|LfEt|fjBIZ6wGT~sVZ)A!xX^nu=JaQo@_#4nlHab@1I!J&N^@eZi@ zAu+~dp_mei35*ftnW3;%PtC|f!aJtW;rEf+h$mjePMz$5_QOvHnwKH@{xf)(E!Uw! zjknj~97tU}qHJ8p>CF4+5+=YP{o_BjjU*a5W-?-@o28}acp*DLwNTG`-i-$G^I;z~sU}3?#p*MMitbTRfhV%}kfWAwr_4@r{ldvNk$Zemm8;K~tNo5qPD%Kf zW5JSLYH~@l$*o6$Q!wuaG;eBw^h>)}%aL#TYijJ|f?P{nCTt8n-KNnq`3Cp61IuTM zPH-N5en)C{ZVu>H$jV9XZ!&azVPUwz?1Dx@L!UhKLskI%M#vl8dipJntI1(hJQVn@Ne+Q8xA?Y zzMCLz>ZjK`!aUN*GCDh?Q|C(*`)aZS#8)8QV{4C%6bR?Nm*)Tj4V4hbRJ-hi+RA*D z=hXie7d|R8b2zA<{p&1PrxFoBb}izCSBhtQVX4{hK9QeJ6V8Xz&qXg?Vk$u8sKk$L zglYo&;3tAF4t7yS13?#|3N4`}4o9ugxI&+C9`8koV!Gvq9v-11>H9d?r$j)9u5=Z+ zzQc4*gS~fs#Fz(|Cz_Z4EK8*3r_arnx`*EV6ohC*Fcse0*i7KunR`KrH~i%#fZWJy z=445Ljx$Ic-)Q}dXMh+y#)@IZ$C_L_?D4Dm-g;1$m^7i6>6C$^F0Th2r(O50j8YH=#nWEebI;cw&0bGzbl4>1 zNf1_8Rs=8F!+}^{y0cl5v>x*T-~)R5AjdB_zkr z-xX0><UpU#&fb zYyYfC)&x|}UAd{fw`&RIEUEW_m!|l`jdG&~TlGLfE;FeIRc4kwIvPEBiutdKb7d6Z zlrSZ(o!2^GHZAoTqRqg2S`HoW<~&|^+NO)_L~OLSk6Mk!1u{qbz07)RX2-jPrAn|1f`HE~|JZZsuIGA{~a zEHlQ}plm05R?z4}_1fk_z~kJ%z!Ewx#5}Fv=eKD1ke$5{7fV_2+{|q!(Ocz#hLPVy zsk?)x|G8bP(=_vjF4{P*2mWYGn;Hf>i5I)wiyC&@sJg)L!?Xf0w{m8*J zeLG&T@hzakV(}&KEhhXnDfTabwZo}l*M90_zN`EN1srR8GlMA+zGRBe0d8ckoDR}& z9Um6k9nRT-#5-p$8vI5F&Q!79F26jI_9M2h%6mUWJX8l2-(IZi3c~VYn}D)t~_vyX2m$^Ces$iF-P} zqKBwxv+Z44hA*jJT_NnH5Sgytwxx!WRTI7}8!v#BU;UYwU4;74awpYc%aL@S6yM8~ zBO*}1i+E!nXx$N7Y3)J)+T8sJI0?!NSIrbe7q&PQ% znYlnDe_q6HeO}|A%z#D{!ZS?oKw)Pv+ zHQ$Y`)ugJ_NxT}KhO@jGQz;EO>jyg~M{K^?Jr(Q0HCx|lDWX4*O2n?&+Kn{C&lQB! z!nf>gyH$Cr1G=2tL|-Q;Pe>XObBzmnS>(N%VAS?_J@Y)zw9D}0*kT)T+M=Nd?y-tc z+Ut)`{^810!$vt~Dy?&Cc+v{!OiFbtzcc!w7n@r^7|jAz%68q7ysQq#nb~XoWqP#H zbN0U9zaEZaYCnyMeChkEf(kov;2l>ur_-)7kiB9RS~b>dv&7)SRUC>D@3xbns=+8& zJKYizH;KHlJ6mX53tLI#YFB%P*a|M+yfM)j`txMKKkvYq_sv#HiIpqlIW5dHG!BB1 zwKK!LZFeU*#e{<-J2<=QtRJe}gBSpJ5f%OZ$~}m(Z73_Tyke>=|rf? zc)1c;6lx`Bk)t-xlym}!v$r;nZ%JlB9r7PT` zj$@kC&{6le^MHG}eMe<}ILLEv$}Fb`=pN;G%4b#OHQ^b{Z89&OW^4O1KjDn{+?iLh z;H2rEtm722^5cNW!zA*B;0PMMF~g&=0!4_zG()331DfSzMZnAvmblfF6zP^rHl!yOUijw7sVa(0IPM)W|s;gGs$F{g~ruE8ccezg%Om9S%CR!nvOxw&~%GXPX*dB%KGH!|s+%lnoLmnmEslQ_Q$4zC$mxk2M_= zP7kge*j^C_H-4JybZ`GinSi0*t&A>eIzCHX7e1q!K<@SpZ09q}n@pq;R_}LIVjPw> zN>i44M==v>Wq^)xj7+ZD9Cj;8(HO-%BS?4``U%Bwg?8$teuQ1xK3jy`+$DI*3eC7hz=a#o4@w;`otwR@simQ#VT0vTN!{&oY_>?1UTSPK3g@sRnDhVJ_1npi$FB#g(;$;{jt%HAXD9G zN1lylC60yC+i{ZHO+;B!(I&YbF>s)_3W3LkOX|SN23C*9y_MVRm52L`#K-2U!jb2@ zFI|Akjq|^zI?)EQS1ID1R<-S|HXGmdrN|9PVhg=aq;vBkpq()$pUr)-D)l+BR<{|n zU(7WdmTcT!O=*}Xh%~Wy7fGWIUO%*zXb5co`ZnTf?~YvrWp4+ z629#@sTU<=K1`jL-g}L7r`N^_#_oLUZagRB;T!eg`{*@Jg1rs*gFZ)dBX!D|fuWS^ zB+xw$Hxe&Tg<8INs7B6oT16yH#qE~KK?mtz72Ce1hI|Z0o(k zoZ4)i&VtCI(U9+gCT$l7;qQ#}Bt$drJn}hMU#|+q!y?`H6ZJ|hxOpq0IGCTOcpFW? z`G}T+&qulPH*=hGv$e&jI6e_K1<8k{UM{2cp{fN zy?8UX+Qy$gX%cU;WxPE;;J3Z5SI(bj&IQwM=VH@UX}zzInWy>vGVDvZee9Jp&&Jfy zaYX^gpk&+JoL0;!t{^&#%BC4e{wB^Q_X3-*Qyt=yZU*)45|mM>%#9rJlV==Co0AL} zZ#4VLsclLrgK2j9wE!+Msa6@7mDP}}&13Xos(F1Y;9&V_`XC$hXb!7{O&Rk*fDJZQQ_2l1reon28;>cHg*Qu_Y^DRoP{BA+iXp8 zZ9jYlR!7RWb8Jh#PRu1I2XbMfH+M@Rn(c+v!UHK7(KOh=y`ap2F|T~Ri~G`8ikjCW zHtUWfr^0HncJp*4A$|Six+Z9;S#a>SFL3`$&e7E5f?NHuBX<^H4Lg7sW(UbEJ2}A3 zNak?)dG`qKQYu6l;@@M$OXWKKbpn-sNp|s*4;6GRe=*2p+?rG75a!Tq=bRWOZqpS5 z4b%uV7%908`9~LeY}v7)aKraXHYczqUOS_kZlQE@`$^gpSWC!9mv^H(-=n3T^~m_^ zM9BI~`|QF#=DjtTDN0R{L+T0{50A?B>^hqFuIreLr(=%i`g0^T+!Hr^Z#@3(|IJ54>jP7oYYq zOcZRM+a`#h#O6A!F`vsop}L9Rj&@RHVjHhNcAHB%`!*Mc_1iHNQ;&vTHCW_2Pw z_XYxawvXXvIu%N5joW_r$KXp(QazU4aGr|>b_1*X@37RjZxuIdNBR0%-fHpwp#PH? z?_7LH;U`gXc|eGNErQnn-7lI7?n@!0?*WhPP$G2;94LT=dnYoTMrH26*rMHry2H+i zXovIJav5op9fjHQcSc;0#Y_iL@5q4~@gs$^Zzf4%*_GX+PPuL_uIEMTNPYbKCk17^ zqSu;^f2t;-W1zL&pWxCMLY?i7>Jogi4+ON;X9I#oK*sCWd2B=PqMAuB zrenM|*2@v%9*9%d3eH3Zs=ZJzNl%m2t!f}|NrmU`WFZBl*geFyVtc@0)_4Fe+0E#43-WNw3Wn`$w!|{Ec(%l!1?y3%li!MW+KBqj~wa_w`M#{L-+bmtIV447NR1_ zgDwGc$6~GBz}C0whok~Em)^uoTb_^JNWg^0#6dfG%C!M!WaL(Z!_eVr1pSP0 zmW58KiJ7Nqs=saBBkXIlvf4JqYA3&Mo2l9_8~c9EliOZwUAGc;TC$|(Fl?<%FB-=< zCD<}^?M^a0!Ee)_UN&g+9xXtqbVkv8t_i-OtR34v*mmDFQTIl#1VlY;ZS6%?bg3cP zX4|h|I7IVeU~*a5X{FOxM_Cp&Ebv+}yrn;TvzedJFG=t9hB)gcu^q#_bOl z*JU+&JWZtfs9L-qxsDPNs6h+t(LfPZodCEx5VQ=3~J<^TFGfcCPy&6CABs~-U>97>(S6@K;;?H6@h z4I9a0dzmBiL>-l^vgEU@;kuKD zLbJ&ij2hZ~{(m9NUZqkd2CQh~?Wcg-mXu}41FluCbeyhj^~bE4@nlm`U`lSGM}ski zi{C?&N|JHzaXv4zg`!f(s(GqMTV;QR7hq&_7on3GwEZ^7i^wmoe>D5PkvOzl*cmEP zs=j|`Aiy;cmvoqeI(>_=E6|^#=|9+%VH+T@eq%B5w(ImHDym=i4G*uzc09XvVelr# zBwMx8*n`g-Qsa}pE;h4!?p8w;nCtwP6r_m#X14=inSrIRpLW!5mO&k#KxQDLaSf95 zB<84U{dLGRab#5)x{@AHS1K-DR~@LqAnB>TFhfEDOoa{fnc} zyxhGVjhH(olDuP3mjATv%v+>- z&*7zG8!0gs#n`2a#*)Tcl8>i81{jJU^rv>`{Up9LI^rEa9v(mqwI_qyY zfEQ%uca20grssK59pqH0r#z?e(m_FfpSx4L<$lLygX{z zrs1II9lHhc5iBd@`_sMLKKMR|TK#Sq@W=IKbipRY$_va>=DQNpUy(vCab zEN_6ooNeL4X{_$@vZVWuB&69ylO9sAT1{-mC_bD=0@|^PDXdG3e<&1PR8<~;_ExRO ztkB=TS8bNHEjN%Nd@q&N%V-%p{(2ss%ASka;OT!LQnTK*k!F+1yye92v8V@~9rIv| z>Z+{d=JqC$&v6iavv%6myC!Qk@~lx8x2FShUy@O{!=3rgG2VVB*6w6ZO0XuM_a1zL zqemGJIF2GW)=t6I(sdHxs=*PNzg^N#^aLuV_X!^jYCN}>y>W%#Ucoz+_Da7yKnQbg zRONiaT@CX}xMy1ABC%8r2j{L*Aw=cB(z|uHvRI|8>((|w<&AVVF`#tKu{c;Se{*uR z)e&J{(X*TeiS;$gJGNk#D$4u(r4KL-A{YA+QHtRr%I*gt!d}#~cDH|*`Pr`jON&+XUK?xN=-PET1UUQo}^cpIrPU_Y7$9Jts4m)DAqM(-oM!(n`T zjYJgc-wclP2vmv^xkmR&9e5CkppF1c*gSaC!cGq#r5svVm-#jC+_H+4g^XM$T5S;c z)in`Ppw#1OYkAn7>(v_EFJdpx3!$*7Zib8OG!#`?4R|5cJZxks-%vw0c0sv0_dTqZ z^7#%s+$hBw8&N~wwkCI7?WV8~fF-&wr#+b7o7PGWh$BH@vBAKUR~g?+n%>cc zWIm6=D_cX$AZ#ac2YD}ix4ssxeV&`x7`5cmL*G(ohV^r?@GYA=|8a3AX3ZBL#*!_D zKcOOC@=Cxx&(wQ`MPG&BiYK=8?l?zTY{J>AHME#DTUU=+(^p?ySzBH&wmq9`+kRkL zHkG;IR84%X-ikL14~PY>803k9-`seZsi8@ouQ75jc^W%8%sb=b2!>%;gno=PS1HJp z!ieq~eezz(h->mF6{3xVdPP7RQuDG_M_6^LbhXoWYy0kI90<{KYGF2bh}e^PpRp= zwDz~`9BZ#BiSP+{5nRlHYX(b-Py6!Qo4i>3O)2Y+qgIw3rS0 zWpD?5>M!f_v;DP@9I=64c1AQ&BWD)Tg>pk$h5jy#ZYj)$LPu`x$?35(bE3vZG?7DV z2zIejXl;YeNw4u$1?XeV#L8)(X-~d?rZ4&kF(wmj*9(LZJ`w4-I=P3+v141Z7lS55 ze6Hhj!YkAs8`FB8f*4%tfYw=gRt4=e;;eg~l;h+1o)ru=%-Zid&A_dW@T<1HK*wmK zhw`Unq@Sn6uD!(P;PDwa`Sm5p30dsXJVt0vArD5PvK=*d*dm1VL9d%m!a=oHjTai& zG@&l?>^iUGiT%)fnk#9@ALzQxiGnmC>)5$*^xI7<-+? z&51*Y#m8ecZhYzUe0yk7e8N=`xq%PzxE(n+Y^{C2goCJ7KUQGrXGd#dj3?UXWXZ>N zqb9At@M>TGSS2W6orB?Y(m6@c;yvngH5#nrEL4;nkg{jx>gh^mhD(q&p+vYQR_3H4 z*7hfwdv&;?5yEmPyM|`F5U`YP^_H+_jZwM#w`+3Id5)}X5ax8bM_KrNWHObDdW$UW z!_^9an5e%Li||hMtvu#+hAVidT3S?m|EC&0M}oB4$%%D;J<|bae}Zrdq2t=Ta&_L# zb<#Ifw0Jb3$8kmh=rUp?j75}&P1NJsK%Q8QvASLl_K(`%{ZD)}tac5nf7Z|J9+*){ zeGhM(J(sHSO1ZH&n>jiBCM}}Bh8r*J7mowGXm4Mpac4t6FIK|bkR(C`jj0;*_ZW7T zl2ht64&sX~*;1p&a?P5@BRfsJVzMdBXFoE^R_WdE0A~xc&W}D3x=|c(hgZ*lmcnd1 zQhlpr9Xx;D`MCH5EnIxz9JzTjW~<0$e*s%)*;?8wBk0hE%?y}p_A2;>{{sfXT`s)5 z&-V-KX$YeZ-rw6kbMo+pl-Nr9hK;KW$etydjrxIWbx(S9T=gar#n=Y=E9&^sOJr$o z6Z=P9oKsZ+gES)QC%SOyt&x46~u3Jw^wgZGw}Zpw+2Rm-0} zYmYmuf3)3EgT(5D0uDsKer_~D+7aFbQN*FbTN1CE&!WB^SMHuodbi)*gkyILr(H7QqJ0#gx&9Wu z-;8snO_1)>GpGrFRS3$Ls-;RmJ|4DJMS8vBd>p(H^hC z{kvy%$UZ~0Wm7Z!{(FA?-fBWK$YFR03{!!^xd_X@H<`pL2cY($r%NV!>hA|SFG?)i zUrMf0B8C+qz3GeGjT4RXG?I_U%9LLE`^wHv!(rp42H!Rk&Q8HwNr54I^~yUV42?L$H?rTj-YRbbvll$WG zqwT=LLVO-`ucQQTP|{LuEWS(Lt#CVULQnlraSm7q(k7THy-aC9oHZE}Tai01Pg6IX zxL&{;XXXve&d>7lobmanP^SAbKEYHQ#Rj<0X8#L?fikb^ZPB5Z$cu&lkG;1Hi!$88 zMwt<$ML|LlLApDnRiwLPD5a#O8wLYJO1eS1LApbcF6m~FW+;gPW?-1}viJ9W=R4Oq zd!K#wuk*tna9!y2zO$b7thm>`);tgL+QnG~Yb~+Qa1>y)cm3BJbAgtwOCh5??XTk7 zyeC=Ic~chBF3S)g)s0_?9JnPyq|xQ8^QQ2V%-)oy7k84y_g;Ta)bS87o?DGJX`{Fr zKH}faUN(|;jIRj@)n_T5oXhZ^ujWbDC^R!+F=k!(2Fw6>9EU<9xDT>+u&mElVMDUE zGqWv1EoP+!B>pQWf&Z(AN_fAsQAB}1ZdbLfJkrLX#L0|XKU=Bd?Vw5T<(yyO121)^ z!{Z@NT)VD2#lkuAhJ|5`ZYs{9*>U_6>DnxS(=Pqu5vl(bmG3rG;txOD$VzqBR<=3F z;wK)_ZD}y+FlgM(Dz(Oe%RCgJUiJ$ngskC%0{>?v!c662}^4h*#nrs=^6iHm77rKd% z6q?_@6)yU{>R&jw-$|-4124&t`6ksw0F(STkX-En_|3`Un9&~uS;@i%vtzn|lKk0$ zMt4ERly~RJofByqFsqruo6c+64Lz&{VZU~R&#-D@yGGAk;;v^r8lN!K|qwoZK{ zgOc=dG5c0iNM+sa4iY~NYDyKYv=%Atn9m5B#L0NeNa{r+&pX{`Bt-h($EVT}96jv? z331XBbNZ5n{0Q+kKfc^ilJM0)_$}^CN;dnw7g#r}PMJ7L59TS+p_x&oIG}5OO?Kiu zLS7N%mVSFUNtX;JjPdlRJFJdhUwe3IZr`04p`CWwF$2$9p2=E+X%?3d>&&0N5e>A= zIx9=r!hU&%u4_axxUG!~qfagM6UqakQel6hT6{VHvkNpdNEyU-7!84-yxuNPHCeyA z2sORvTl{@UVALAQR6{Q3e^f6OxMo{eL8DaS7JaRDNG{$Xzg9Ckq3wLfYhcl=0zPlx z=ee&jw#szcebId|wUg=G)>=MYX_Eiv4;~8?AD`F*Zt3oV$-48Lf)ly}Ysw@e%FCGP z8G)R9*cmqON--xn1R6bQmkW$!c5PpQS*O#vy_{wJ?L=I&KZaiHhzX%T=bwl6X8fq0 zQYXsF%HrCM3^kG4`F2R;c~Ul23|hKJEfUY2Uk~?Iit|*qxqb3Qv}o1@(p1_!Zk#ss zLJE1=b`n?YN_lnz8N#O5@G3Svz09<{H2D>0oNlY7ZGiP=ZU6Qw`SQkUWd@ta>9aqW z4UjwPHe}-RBaumUx;a_*Sd|jkY~FPsGYghLDxdIKg3@ccYp!R}^8$P@?E1kPPb05)VvtLAY%LXKK%@qcG!t_&T~V zT4;C9K7Fm!ZD-%ky>J)zVat#C(V#QC(T_fdKpX2i8HTiM<#F{wzfO5wIw>S=z&JNO zl)-*)ByiCzJ-c%LWr`Yaf5~KX=tzK5Z42wtNpbCw#o@77ty}2?b^c&sN9o(T+dK1! z2718z+lK$i{#A&x?O(Bp>vOt)zGbo^z0@1;aF9ALh7h;G`{ufJuBY>xbUBpzEpj$0 z5>;hJGupUkL)>VFa8|;|wC?i>ZB-4{1;P~y%YnwY`}ZV{iO56hxAH-hmdsE?=`$HF zU$1W`=r16xx2s}A^j-Ge|eQ0|8 z)w44Fw-+nJc`NDiR_slsYZU}OyL85kF?PQU0Zt?OX_kOlY!-OX+1M4^6YyBCJ245n zHWjtnE!OB4-YhB7b!AL-Fe(0RLmiDe#!9FdoBTk{;*6boxvV;0|2j%c5|ull?1ZA8 zNy!dixbJjL8~u62d6Swm@10di>3CC8$=meZ7txMy4{#go7P169t~0WV-sFc!_3|Hf zEu;sDjC8D7ke4s^u`P7CgcY>=Ca^GOBBtvK3I|`vCTFg^y7$}q$JUFHbUr4#dL4kh zOeGABnYRm}O*==*lq?DS5C?59B)y751I<9C;QtZd2+neD5nbF|xmD^wCG+a=O9p*U+*%)dgR`F_k3d zSESlUJL}ApnU1%_gOuLkr%b_MD#%GgmfY?~d1Db>y;8%OT1<`lEr@XH;exUWtl^)1 zZs`-Y^S~;Hu}6|`Wt?qv8vt@^fNLKQ5wXl{bu+3rFj*<#EUBv&MZ+M+47Fa!d(&aC=)pt2dN<#aq$aF*1 zPhPTgA1Bx}S0wGpB7x6z6Q$ZY-wjX6g);wC(=xEHqMlgT?sX{EwS~iDTB$3Y-ug$g zLXkQ_aI5}JxwR7CTE(G>FhqP)ZTvte+{7{E)%1wpm9p;kFOjbL3B5l6#e6|A(;kh# zs%7>5YggLL_DXYpW~Pqkf|f^WG1|{<{9{JF0|qXe>K#Cse=T`XPIIRM)!o1z)KsFx z7d%)23z{MjkjMnS*Ts-KnyMYfgLg#;zA2#;Ww4q;$=FScql^|$+wrAN{9e}B>~>DjHvyv}nPSw|L^C;uS?5GTo7~B#FXgvv-Vm zhYdOh8pzSOTh8xi`RpkiE}S_oc>Jm7@I#GB`|TG9m^w9|5+VOAl?25te{EOnNJGg5 zAVL$xY$6v%kZAE;ZuhNSiDTHiqC1H zUE!nl77@#f<;%f3FKLs7KM#)_r&v8YWo;g_nFSdl@_R!w(^x6d$E=5YSs9^GUmzGQ zgs4gm<}6iv)mM1b%k)y*=Tcf1qc=l;d@L<#wEGr)xIQ?73LCm;wWDr<8N0?ka=9w5 zJF6`JuHLzAe+9n?umsMwUH-Fhef)ZU+S7GMBob5hiL6$kv31GaDFxq+@W5?1*E@mk)uap=t>*NRuNt8FeyGye4`wYiJ0Wd^e*A#P$i!6UUEC6 z?JtsUOTU_SjJ$(Q_vJbGIZgxz1dFMGOe?5|*1z9vJVzTQSn|pdB)DHZXzySZ@0lGh zLaf>;f&Bd%dA`2EhF#z8zc-YTuX<9FfD6eTYd7j>QnBV@JI+(;P4uZVEo-dR3Orj$ z8qe0vlyIG2d5Bi?-BuoR-TCM?p)WMKZ4eEmkk-FCp`LT@t#@6{#!If$j~^JC^1z7t ztfk82snApe{EQ@vG)w%&WQayn@*j<8Po0@rOii0Z^ydPvho+8~3M>1z-7xetDE$Do zB83cUM2}FY;>>e~R)JR(YJs}Ul0FHik37E+NeiL71}0r8E6uX&*{MtQCL%OSZ67N- z#;y``Y#>VS6jzOJo)lKZA2PQwhw1Y9hX1Tn-Wq(Of7Q~HWft}U|977LmY_3?;hwM* zgL#AjUeA|j@CWyXA+^VP9oywmnVJwLUCdWu-RWA}g^`7VQZE?j7>at(c&_J9={RG_UN?7UNeX-7U^VlJgR_^ zuxr29ajmBq5=4FV!zp?8sm8W*ah>b83u~s_3)lVlI)1Oxwk8?QzmN|mdY5V*=yC|6 z?kqML$(=0RM1jfDQE6t9j&-N!jcq7|iYHstD-J%iapLj^HJS=%3Jem0@zSJH9vgxK*j7bf`RD z`qeSAQ=&(mp8w%R0_W59KpsaMu*QM+!eVk9(NEoP@*T`miENKBXoGFy5t>#x=O-{msPgJVptv= zS@Jw^nX@>qo=;VhmNPraJJnb)+Uadrqx~{By2x!$8L-u+el^|frjB@p#Nq$*;e_nT zTx+XF!J`pF?nBzN!^|h>m2NqULmT9M~c;~lw^CR7_B))%sgT5 zGFgQg8Q=P&ZPj_S#k96iqFKF0!jtHKmD=jpKbHAvyp;D&^P12O|M4&Q()hBxP$AMT ze=Jl4&b3kBw?a0e3mI67^IU3fHIza+BH_+6{iq+#R=HxzEJwej$@YCu6YAfeeR;CA zc)&44YGLQM-1<7EH4y$QZ&CTwemT1a^({9^@Niz<=w>OrcviUgsme+FZdAU7q^2wIH*~M89QY zy0tSn{hFL-F=7BO*=TIC^p#&Zl+CEkV7c)CkL}HpnlBM`n(z!o2C9hbM~_dHE=)Dy z{6I>^$ZMOq?Nrzbet04N$i2DMs~6J`mv!6d4f0iYMCz^}OsHis z+9u8vspoYj2Dy%_jx2riR)np)yZha>iy6{89pl;OYU2SH_r~*Vl@0ZuYJZ-oR2j%p ze|(j|nIfr(+7GBTLM#~psiC%Z&*2)14~o;fz5Fv7dQE5KES~85=?Y5YmC%w|2b}nW)wNrF2jNxyijM9?kE1R_qjW6;KlNYGF z?15nfWK)HlQ}CFwax*7tqL+$CHkyW8mW$p;eHnCKZq9w_N?O<2c(@t9fjClUf`s0I z$%ovbWxD10kUc-2=@@a^&%Yms>0cBTXp=%Y+(!%WS?}@n^9l3RGnt=$&Yp;V%x2WO zK`9v5(RP}0ev;nUV_ZkR^3moIo0YWxj;8ai^EEQHIPN7sWf#quhK&V|QR&Pp0Xl>Y ze@re)09+t;ujL$%O5BvVLIhm!Jwf6ZG44HH)DK^ea4G4RL3n8fzcm&0*;Cb2Tp0Irwl_vM>rcTcI>B$EP@>%Sd8 zBw)udcm%xUW8s>tFS>=UN7NW3i6)jois7X{6Hq>m zOU_AU2BJB;`nBugY^F7fWU*ZFeZ|*YP0fqq0d(Km@VB#;xZu2S0)%QqdNut{9o!FT zt-I8*lz1UmFZEL_?w`N~*Xmq)g;Iz&qzXsF5%OTFah4=Fgxx&QPk~4D?c0`z2B)L* z%{i{NW3^Q}B{Q%}PQB9C50w#9Y_d$`)!vR_wYrY`ki4K>y}?*5gjcj4j%uspcZxDC z(NrP5fQG>Bd>&&XQ#LZ2@)%qgTl`vxS7H{?VcxZh)4HR8UchSvIWKiMhvgiKl*goD z8maXqD@~=`EiqnSVb^-+WW3ZhwaD3;1yv0$7{C0XU5ug+yVe-A#!-1u#+Y5$x?Okq zq`H@_!8e8=;WF1xEg|7!P3t-OOjIu<)4Q(KwO?wyM4M#pFeivve#CcQDg`mU#(#VY ziG%p>NJFfz&!4c(H6p_0_L~ps7)Dy&ZhN|FZu9fka5XKa7to&^s=dEXR-_bwtUCY>yL4!iN&K!+vp{A=PK{7 zD7OY5@e@k9yS$1Kt#7cfuiuV@@jH&=_KQoN6?Vi61O+)B2ds8m*9rX@?Kyx4^re4V z^2WIFJN(@Kxlp@B0`t*5X#Ndmq7g3W)`q!nPa1MJ9|X?n_D4+i)=Mptu$!N<)3$-T zPv7L^RY|37bTX)^2=4|pn3dGWDU~t)BKGk?DpH`J2oL)iZ!{Tr^XSs)3uUG^U5ZSH zLR*E@`DRqFnfBJ9P6ozyL7K~DfOC)aBifTzRIZ}KYnLJ|3^{#Prr&U-I(3%6b)70P zSXkeV+PYjEbWZwx`B(>%emH*I{^uw9I6BlB z!Ki8^Qzyc3Ci<+r4+TjjDxdE53y1P)7W)x_w7v9*t69JW&lB60Marcaiw+5rea+&7 z??SP#>9B(LRp^SKE>?tJe|o;K2t3!ft!&TFMB&*Jex1L`g?ey%Y!!Cmn4dl@7L%S3 zGjgYRUHBg)b0l@Y+ZGW*jN3??^Sr(8*=CVr7io08lKB*H#hj%m~F<|8*NR1WcR zDcWzq;*d*c%TA}9mu9*&-`L%o)+0F}0b3N)Z80?(!6kP4}R zqbkHJkr`*l%zB)*RyW>JP27u}uWo+6mdY+ZF3mGQvY_@&#{JUrU#6kgZ?ZKi+Od5mZehxvyd)*6Xj`#F?!EVF zZOCXj`yzjh&~%l3nWGM`k;1;ZPUDGjo^1G|tv|P&Kp{@Dpgq!lO0jmP9@K)7^Vvy} zZ*$(4zCLE$nQemD8I3`V(1?RwNs#L`<89wb9CP_@zc|aWved zOiz5zt@F1Xq_X??SGj)Qq&f?;Y~;b$%9@$vDp$C3W&GnduRlH8Fo#PPTs=Qcm_#Ld z_Yh9>1=n(C^+#=lsNF(YAlfVbeV~8NBcX#K%LO1m?p<_+_tUm>&6s+ZpnPmsrx498 znej{KQeS-=YR@%?clPzO62vQ8I$QJ*<=f-TD<_*Liid+WLFgJzwsam2eNN@GNoler z-?K!T+r%;2L0-CA-XiF1baIGV~wy5OQk#F8z9i6lINhe*FCJ0l) zzHnckenrBD;^hxexkH*9DOwoFXhd0d%PZNljeR; z%pW@J?0T%>CHuazxC=N22+#6CFdeujp9@O5fKTHycqt?$K@7OXPmzOCXDb~@|2^Iv zOVaA+@+WD6v19M&2TF)HT&MWZmT^W1*E3jqVr2J5wLDC(S~;46Kd9T7|MKqAo;nYrF;U!>=G82 zik3vurmAm!Tpm%DR)HAkjuyi7DS4BYFTPQxiOcVweXUp7 zm42gdyIh@M`^Ly&A_P(W=dwwOKE4n7y(@Mho_vRfbrM4`Ic-!NP3keyckX7>A5vGE zA8E8dt{O0F(x(39y4XV7Y{687PY=V%nS36(eQBFtU%Xc_0=BiA<;vj}Qd(D$*yS2N z)id;M5!D`f*#RHb98x3{Y9p|NNQX~tz4q-eo$^GEe>6q=aTq2vXJi(4sH$W=sC|Wg zc(^4|#gu8=TA{D#QdR3PHLd>{-pr-D&|0bO=2TH1v|BP#sOZ39GhqMuiMfgn{IN{u zWQOkhy)dZl7puy1RR(i-WYj-{>lazwA5F8cnctZ$E>F*`7aP>~k#eT_`jcSTj``WPB#fm5^@2^F-`Ln+!QGjS)L2&h@cU zk}%S>{~iQqXj!~AF?{NBvUj-BpCxXyJWl%Yf_li=JZgXGMP1~qkDYkcGEM40hBSnC>8M-{Z|*Wqk0D(C}2r+z+2h-dTFwR!9dFXMm$cbLrp9Wydf0VFQCz9=3^EG)6*`@T>eC;u0*EUAdGlN-Tje4>%kt$%cjqLY z^UPLl{>pOb&ew{gPt9_OUPY1swr;D0esW%4HIeqK4F4M7DlMTfK0K-;z1r<5o-#me z9m`EX><0(NLuTPMjt-Q! z9CfokeJX4fF^DwiBVDZUU%$`FY3CkJ?gf|ITNP+2W?0W#K-f!gv>?XPB zZYgkldx0?j&nH0kct)p&eV2Dkmkbm)GOgZOwrs%OfxMj2GHRFg1Wvs7+?!TuH)%F3 z296%2*OtRrbKW4?kF7n23uuM`4OC04oHEzdJ5WX3u5XBM}@~8bYI(X zAl#x_^F@ls)Kwl-vXuXLxabz}Fb&;Qjj{|GFXqC$suk5uAbQ!EspMT-`dl?DCZb*gmnLos{vdEfu5OL{V<_N61pIOV!os z1B|X|$7k9R=uY-XR1+lQNgS$iH}Y_!&CtG8gT8%2viAQr@FT=IoFgAj$P_PiXR5UxzPN z9>|(OFplcyqE@hjE*U}SP5wC@^wJt00j!U1)Qc8>Pp120GGY6eOh zR3W^-$vgA4Ar~; zmpIo&!Rs6TQBA3{EX{<~KHNw(Jwb2N=^Lxx=H@#Et)q$ zQ&ul88$WqlAyzaEND$+ty0yMl@ktJ`*89!MYgg8`k>ndp)fI0G;vJXixWvv9H{nSz zi<4%nY8RwG;{3O`W~_*vvq%iTHwTsDK5kse5z6d@a*Xg|Xq`-Tta=`6s4BU3kO~!9sVuPo#ZKr@72nTdpq}s=L11c%x6@ zDWi`i^`|*AS%!6CkGpzG5_key$%QyJ{n^890vT`hM8ugywbk~hjlG)!z_resx93VJQ?)JYo0Q%iK!IjWUG4kU67QxIg=4RBn-3_9 zD36tVw8OCq2D%}+sQuDW$=n4n9!UF^Nbv1vSRjUKTLiri=DQrbvU`w-li|0@`HeX@6#Uh=>3Uz?A zm_vM!R&a{Ds?GXZM`+`_kXpAr%feLwqXYQ=f5vcoylt*M1V&xKs@Pw`D}i(IC#8mC zc!O61*Lbe>*7}xQaZ3@Mxr1%NxqN5d$%+YZT5z)6Gw)qxIu($%p=S1VP>lh8@`jeq zC+HE5nev+261$~mAZ5SpycSxf{@GpLIw(C6U@e`o&(d*JY{$fqD+h5_OVuwB(Up%x z;q~f_g)VW7*+mUlFFF}DPjW!_-fV;Alwl-?$d3*NbuZ;IPQLk{_Bk`jqmd`M_OP=+ zg3VUMCx1j1uGI=iIxZu+{V6i8$^|Lmvs2!DLjzTigtz`p;(K^^8AbZ(W#@gKxSWsn2B0KDQ?XH`$OixRHPgJ^Wpr zR!TW>D0BUZ-9mZgUQmBWTw{GN#WTEQMkiB2Ixw+Gr^@w$tkwlmoPTwlI?wUYWMh~* zDzW0dT%W0p^eXy(D`qQeU;w9PePz(}OQH#iC5V5TE0u}N>9Tl6pD+ny>Q>~SX|^i1 zPQs%&p+^&khNHkBZGElN_dpb1p#Y)1W(nHBa_ACHo>JCcW=;=5Uap6&{!w=QfW$fIucKU*vfL`#V2pnPXMxw876&8NN8Da?3g5LJ(t1^3xuKV^Bb~MF{HczoG*aD^reWr0m9y72U6IJUZ~DN@ zRn1nvf?4`ka=GI_#+fB3s+%&szau7ln-=MJxR?d%B;K?o1aXtW)0iE;YZ)`+EuuB6~b&VEv-= zXLVW3(tR*9e=S1En901E9n?i(i2(P}-Nfa(yPp66n|@lY5(tkTw?D5MFX)W|E-E_j z`(?rNCGaw1PgB8P;UVH?!A61Gc)h950L(vVtrj1RaSe7~a`_%VkEg+SRt@4#sUNw+|}o`NXYvg{_P6|5q%g^TYE7%aubpIXI4f zqU8w(@A4v8VMR{e<4qofY#NZ+trCF`)FOIYc%{0$sP6zjhNb%89aJ&+`(P>n;)GJ} z7H0qk?kSw|=6R>(JF%G$SlAE2!HxLIbsq)R(U*Z-<>CmPE!Ha&sh~|eLtcdH++k~P zo(XKJHP)$;3ku8@{O+JTs1gefVKx6OQWlTjkj`oaPaEh8@+@B$vfp`?g2)2e?L8rw z)9CSf7_Xr?aGskl-0lG{9D8o#f@A!bYAgDsVcQ>S(e;5Ne&^LV{`2=i{lBt|SilMuB8d4bkjjVfA2D663-QXEHbD@`P=?ee2l+x8H8Z`{L34r}_s8fqt}H zGQB2odr96$za=}qY@D>mSLwIW4=vxV`29^-LIFUQNSZ(x*kR$?oWpQvSSFu7kn0{Y2RGs+E7hr= zv5=&*4R&O)U1oY@xi7vN&2zAw$?ZUCoMf2>H*DQlcL)-uBh#@9Z0jjOvd2fW{Di=X z&o7X#uV}`LVH$J4S0?g2qQ6&rekVd+j1lHpz)UPBeK3De`g(eOz2}+CgB@wy3~J4$ zzC@U+vTLVQmDWplAfK}22AycQA~GL;l}^4KO}JECYxPHt)j1cM2q1`o%KUcaKOCC` zK;lp9UUYuw8jHsPS>(LnRKx3)61`zhNwg^gmYTmAaEVu7av2hvkEO|X(+V>?%U@~jpchsJ?=%aezf?Dd= znaFH@v8nEB@=$0X=Ab1i7U+Y1zGglxX^OKNjzx|;7RK-&&yX-(>IVVYNA1J;KcEJ1 z=q_`*7*MYKelze6AhDk$0_CA%&WbDzfGpuyw&I@8J00X_jR^oV)WBY)H)mdS&nttp z|7!4*Up$pIl-Q5lugAFy?rC@=*b@)&C65>Fy5r@Ucmwo@jELDVi9^;4!2etFQwVzrDr+TWwAO!f-sbJ-?|`m4ST5sQD-7 z4q*Hq&{~=nI`eu42W}h?o**mO~6K>4G2jtdBJ%A zJmjQ91zMA%NyfRUj38hD3%uUE#-kEQ;?2QJ=4I`9iVJ4$>5g2Pz6;dG#9v53WLS@7 zZnSlA7f6!DtQ?6+Jah8EjRB%QvmW5Cvv~mF#nFwp$ zf4>mvCtpH3?1+2f-;>FnbvA06V@FVXm{Z)?nFCPHIfSKLGMEn;|M+B`54BBSP%xrc z_c`yd3hygeZ6-MCOz&eS;TjO_=QS% z$#0*gR$Jynk^Suf8=ct@lI2pJGt2o_-Q&F$H>>rijExJ;0F`ri_kkb6UUZ}LI+IG# zom~sOgcv{~Q8fqc!)dmo-|Q5etkGqzrt0_|l)RmCyT$oILYtD;n z0o&{bUn|TLle{XUa@WH_0jskgbsnp}%VRB{Mml_D!kQ0U4GZ#Y!!8kX$3k7w)@jxC#n1yhCxR_AZnQ*#L znUKx6s(;}jr|6$hN``nrMTy1$DjhbAy!p-`Dn=S^wUGM9bMYG6C>4=s}bJL2bG&eXiCtZ2OHlQ}%Fgg2r z*~RRgjm->N9jB8kf^ttXy-v*yYpQfAd|W?!Z4P=A?mh8oYC7%=YEL8#swM<8D@Ie! zsoW?S@n0#pjDoiq>r|8{D8M4ofxBEG1dXjybG2wG-6lC}Zw3 z5a_uR@6~QVpEYdCom47dJNs@Z`l;g_aEIfXUjBb8a-}MFypOWT0NkUy+J9;Dp~Mxo zimlJbs}uC0<;13|VSRyuFh$Z7l^J9uLI$_r$u42Y!g(a77*?U;IZH2e@4#vbA4#Dn+a}EejeG$cJeUlCMN*9QzS=px2PC?t z#nW^j9F^CL99i5N;2wW&m9<4Ve$VK~{H_`-wo_$cI(nZ4Z5I_bxtHj80-u_-o3(3_ zp0pZefNG5Jlk2&TH|FC!lj_oxHd0v%Kbaa&s5+{8b~nCS_Bcft`#loMD<-0zl}Qz` z=T=SIRCaQz5VXr9zfXcU34p=ke#W?a*ec9BZjM0a90B6+m@egixJ0?2tE^IN1s~br z{qH3*wy|jpR^$Uwc@nNuk1ZgRzm(7ruIK_)*Zjt^oW$wVx29{4#$FWEw(>iw&1-Ml z=Z{RdJ4)8SSW@1vQS4Yg^ACm2W!BbUjPR%$>^?zVN*@p12KecK}GS3joT$)K>=H=g_~$4g4o{9gvzd zajk(S#Iw#D^Gi%_k_LLWOcAVLW}?r0Bf-!x7Z-*`A#4?FjazvyJF%g?8aGwD6rd-m zw_xEX=3ua;x86U*68=|W(VPGHO11U~FPVx`62iI<~ zn3I8->7IqyFx`k{CG%ITzuNk1TYo+AZ-Dr}m6w0R>EGn@H&y>d5P$L3Uv&BxH2;%w z{hJg2=ET1_@xRZBJ)x_KT=Z!iZuxYDFCGdV?@+BVW2;1jQ-3diVonczNXG=O3QaN{EV6ett zJSc|K48pjvu|cn-upRVPIKKCs+ST&MJBbGiEjrB&MGmYD`%5+qR_U&;u6Z(P;GLzm zI6>!Wl~iFz_NJyLB{?At>Zz}RV7ONeUNXuh+zyx~V6R>W=!1u1H}r@!=s)3|HO)ZU z#>Sj!!sLpYnlbV5iAq*hA9aN3@J|rcu0BpZ6r#2YQG37mM2MCRzgUE`7`Vn;_KyxG zwYEyIv9f-#9wuOvmIg+XaL9+&@89E1$um2d$4gFC`EX)p`;F##f>T1_qSabjM|tlXHf zGJCP!D@)WaUwN%3G68B!ubSXJR%(_iXuDee`4x`Jdz9w4W<%@<@`^rj26KA(Asm3} zxed&Vk(vDdkGcy&*b!=Qbgq^nRoi}YA}^|`tV~5Qg^SpZuzHk|qMw1bA`TYi#PGg_ z{KI!~d)M`KK_vo8F4NkGv5wPvO9?s+YG4l>E&0jhJ1s-R^?_YkRloW4$p7fm+re^} zHLY+;F7s0}0)$^oh}(5A$W<+xAk@8IsV&L@677shKniFEBoM+DVP;0njHWec16FT~G;Dz5w!Qb? z^gWDlBGf7{E-Bt>t!H53^@dSkHhsYqLZ|#TF6oUE><-X) z?vGOfL!tfdIE_-+ba(ZEf7xaSrVFCDQkDS1)g@Q>Uzr&2?Y>vWbZKt>VqWEo$8i59 zcyeGh8q!7KvGBF0=yXs@2%)nnx_W|wx zi^eP!?PokH+NXlgJApYm3ux^3yI|(`f0_gVDeZ5h9Qco}Pzm0AFg~|VB9%LJH3kwT_ zNw{4%)=MSVlkYE&8F* z=_yMoCn;`frb&-hUMa4W4%Nf z{+CWH{GtvolMGGwkgh*3jrg*y#f7IYZX2-IaDZ#%24EHb$OT;uB4=J~~X|olv%gqm{FW{hCg{?+46*AV1?BijD!eHo@=jc1D&%un(z>F)VV7Rk|;6qu) z`QSHxgo%4muWiUM!q)Q^ERjyKR*InG6T+1foRv5}#^_dcy)Y%Wib)H^en zi)+z&3!ys*lu|A6TkXf3Ke8|or2{f+!)F<;m~1j#C4hJ}UDs?FE(tiXFd z-{)mp;r)!wiKo$N@T~v!T^tpP-!*ombiwJ&z~jc}TAfdO6Pa3)0J+6cA>bYwbf@0U zMm;OQW;N$$vd+i^_oRl?WCQPE)#}WHcCnIvqk9Ij05OF>zt3yLi^*BJ$wnM?72NZ0Pp##0Ez?O$yMll2Rw-r z&v_eA*gdJz8->~4D9q!p!u~4kuZ8_}$-gn|Z_xjnCI4p0zp&yj4*LsS|NnyY7tBBt z_m@6$4Ud{Hf3w#XcB-tU@Jjch!TALP(_)lfOiq417R$Nm% zrTc?EpBz{DPB=};jbRdy? zU!hfnBCO_nzu)K*+|*XyRR3?~Q3^qFNS|k!?FC_defv97=Lb?x&qmp(n`b?t~7!pB4RdC%U~vVR2kd{&Z(01ni6 zBo_n40i+{jH6+S`_S5_8sRDK91Rz!V|3TSX1=SfgYoft|LvV-S?m>cv;O_43!Gl`} zZowBG+#$HTySsZ>xI4^8{&VW=nVPD7_7%k)tkrLKKhoWYYi)1FgaB-2-sSa^>I)q- z7G9K3+d=CsKcwZ;!mP(qCbxZ(N-Mf-Q5n1E1ssv&GCm_jhyT6XzC85E#nZ#=YUN@) zL7RIt5_duT*79h&;=HNjwek04w|t3*=X^5riGYOv8cxR@T(h=_KELi|Pdj%~IyW$`bE;QhHU- zjx-LiI_)&$#ZlKm&JzvXE;%Lw87@-C;dTB9`$7!m%U7>G^NNqmsCSo1o(K`ZUrAU| zu^8UI>cuH_0p+&QdwqB4%ejSNKK5n6Zbe*ZA{Y@{Mq=@Z@e%*rJ%*1<&ka+c#@>j` zR@xIf>19JxhY50z-JB>H?$q1ym|0&;g!4zc$s{JBg-w5)on71^u8;4uB`$xNhIXuVJ#FdLP>$(Zdlti*v{xv9OnV%Jt9*)A&?+ygldiTdN1El3a&cFPM?2bEPT~rs;=Yx#U#KZR^#6%?}_Pt%T zk+pcUL1fhydfLtM!9|Pw zd+zg&01U*a-aMH7-)vek5XQy@z+;4q6ODPJus#B8MkOrg|0FHAf(Oi=dM|NrdenG< z12EERkY)~lxpiI-)$Ly#;?89&fqf|My!dG3#JJ4g6Dd zh-Y)`hNt*5y<{Yhk{-h8x~JMc9dMZKeQ#X>rF35KFFu;~=3DVOU&4Mk^K?Fxg>Z^u z_>7H!EB#Bhl%@}+U#=sp4Ay?%_;f49DXIt0sqdyiyBT^!zC!b-E=O6zb0yY7Lo;#v z%Tp1Er#QDC3G@dpeqa5h3r{?9)>fyfQp;pi`>spW=~~HBs-xxN<(t>tPEpm-B2o)O zwqz)|^4`<-sBObzk?P$I7NWyc40)wuqWmMXroi!$ai8&H4`pzkAKo5qPjXA>T~;VzXL(uy|;?xZ}S!%!2r20uQRzK3%*N4{S&!&LVnM0&L(>J+V9&n^ksu1`L|qR_ zTD4hQ$)BjbaW`Wu-+XS@YEty}X#3pr%(uI`rZ~#e=^FVI&P-jj~Sl1xeO-1$VyC|9_0t7bj`!gxW9V@W?)@(m&kXpDi2{WvcSmb zdv;Ku-|#FlUF`70(9C-oPzlhn%a7zV34vQK-F4jioON85oNdaidYCgbOvQ{}W*mvi zp(8wqye=Z}aMdt>J!^+4l6f|R#H;))k3%*}P+LM}n+aI-%=UL+TNnP6v=#U*>IJm> z>@u+Pj@{p2c!-U-Otmqu*F%?>WP)JCRVcP*2Wu+3&koqluiyy6aF92#kvxy4;$@j{ z6E}Vs?r#bAnv;R{#m&vByJAofK=Ctd(YbzuX?RZm$>ndwZW{4_l*{QM;;7kG;y+qO za~ODUuUA$cNIE;$63>L_V6cGSCwMJX)k9QMM|JGAUf+dFgqdj0=tJZr!aPpgX7sU= zsrcB>p2H`;CgydWc-fdndz+!hNK#96VB*|4%$v)}ARG(GVzZ1(Cc8=`*XwYSn2!*J zQ!QfbRgv(e*7@B}=Fp!nf%)$q8TT#Rr*);jrRAZsV67Q8DD(`&N{@Y+Fot8|7!ZNj zmRVQs;OcE3`z@ox@ioQIt(%4HQu^9zu4Z72q1S>uT;rNM|+cO_M+wFfi-{wpO}elL<369T9p@wj9B^**DmUs^8h$KiN-LW90b ztW*cXvJQ}(s~|HI_{_%%=E*ag6r?>{>#R@(K0fxR(Rh{|71{Rc>n;7hwQRi2pH?1< zl7Wt(bzw@p$>cOgdb!QJ)}VUqxYGE+(2E3`pI6=V^wkX8Hjn7)mrF;efNM;sY99rm z1#+A26$YGG7s3Gh=wjN~bUq#NrKx-2LlXN&YXh=_fA<_B0cwiQ7j@&_r#2TA}p_@VtDP-OhZehVXqH7kfHRtoCGp$lub7@mBUZn{Zql z@!jPyUNO8(Y#TYbkVuBPKF?tj#_meB^x#o z#5}K-${osV_rhN4PH(vGtiNV6qB}2zH(h9{fKboi6iyUO{jpPHX1MRO53lpRsuDH= z;j#MY{$heYb%NBiD2HY}nt(YifPF7wc3$`%cxK63-1sC+nh|kd%{%wcHP^6VA}F!7 zA!!Y4ItRW2X-2|e;;p|4Nc-=KS|*h0Epb}3DE{PP1AOINdPwb&5Q9#5c@&ScD8VFF z_&czEhJ2m%FG{5r(KF~^g4c`w4rOk+ANgGv_>%!hun(Raf1a~lNrr-u;amdIzCs74 zkHWdsbu!PdmE)34xhgKI|L)cQIoASNvk&78Qq5VgoAA_kb`hJzL+Qq_?ERT?yr5ys zuVK~u%g`HRK%@hdCt_r~F!6+XWa&+09{o^@XLHXTf8)n$_mONk(A^{)pW`y;HcM|` zF^1abw9|pEES4n8uimwecs`xX6|CJwg97v6Ogm|sJU}PcDo(28r(8h|NIv=*dUB(5Wns6HE!38F#4Z(9`h-}V+1v}pv~_F81XA--9fYqdIQEw{ z!)Ke5)JDhot%Z?^H|{`^@y^DxhlUyPL#ulCuYLH3Z2tV;k}qNg74@l&rEqBxeA|#?q04Gn6eu18u|B7z6``ydtgxQpan?~B(aj$Lxo7YD{_6Fm z*~suGDub~3sH2EgBH7Z%t-KtFGq+7d=#9($&cnmlVJ0*tt9P<1;ZJe;5PgDpZsDSr zJGVl_*=YBz6KL3y)9~`YKeWZto<(YWe2o(Qy~RD4x&9i&W}XR+V48C=SeB|V*@W1= zbeq-C`aY28n&#VDKz7|Tob#tH0%Yl6m#=F`+4SQ9Ag^VfJ;W@=PlTg^a-W(qAe==mx)oNWiB=FcIwXKY-m!)s(F60-hI2?fST3kbNzJ0((>t&o7!U zVq)ZqB4lW#Yc;8mRMNV#5OI`erHOBq@x6o}q?zBl?M2%ED=@Z11ocrlm#!n-gUO%B z>5xG1!FvM(YhaEHR6ez6)4=g0~`<3O9RD7}xjPBr<(=2IxN zr`Y|&!sbv!+H(d;?y!<(J$MsF;Hcr@@$L_6^slU zat2A*7Y3c+C|!BdmVNgarqiJgFQm?|_ngiU9~jQMNG?LXSli0H3ad)DaxPL3hpnkr zmS|shv={{Y%6%!aQXow)|ekLMJ>%HkB3JVHHuR zM<1K_Jdr#tgEmGIkLP{5MQnlMNz zA}Ja61?U+ZP`p=`AD+zx|6z{b!C-(oko+lFRQ^>&<^QuHrjdSd`I1QEW;!ZR<1E5r zy~4r((uz?mQGJnLxraP??y|(CPW9sPo~d^>7<{06K6a>$=#kM3(4N&+U4LI2YIQ0c z>K7=kVsMZT4!F3IMD*{>P8k_pBfom1F-g|+(;PU(=g<{@_ha_=YONUk)6rOAflHEMgmiF5BuDY)1`Ozny{JU%QHO=K%^DEb6 zCykb@RBD*FQFYG`_pYwn)Y0V~N1>*LX!q6f;P%ZQIV@RKA8rNP_2%ns^~n)-wEre_ zoBY!II;PD6;rhJZ47=O-_b#-qo;e-zk2;lemC5@+Ag!|pkQ7SuJ z{XE%MumhIM;`fY~r}_UbZGJf!qheTH`p9nLXH1=7;Q#bE6>#{cn(ET7Qn{mtHw_gQ z?XL~5-%S~6w)e2`#n;0xoAxAOLnd|7KHxl06grx?ch}ibkA%DWGernf?=^|Z*o5;N z>!8Z6S$mA!;bdEIv&hSX>J3Vb$s|+-XHc#^zq{37_s_OP6~V6c&5XWcA51C#HQUb6 zlIk<+-f{Zl(DRjn@iPiqG;k_U8J(Hn7NkS{_Od<4fjqN2I2H6BK!2`R7;jzy|FVA^ znG8@mO{7M6_+cVAaCpDc8Yn5`0vuU?o}!gz(I1&j-}7hwhJ651wQG-0r-sgbavA8$ zehJ{jRwW22U(_rxPi0v5`eLWVqivQ^h(|LBDK;viS(}66GHMvZ8VKU662Vw#sE5F! zB-P9=hEheg1@RklOI+)&6VZ_MX$wGRY>F0!%v^b*;wpDMU5|RZ?UZ?Y&vBJbL<{Qh5>(ig_RD92 zzs-|W2+}b^IK>Ynm}$=0SSMU_jklAdTioA>sSL!L&=NUZ)bl$8vlpBeQ4B)seFZlvnjmA| zn~jE)Bo?RT>cW-!u7pvw#{rvU50tq`t%&&{IpOA`^X-{S`qXzSzV@iN=5MbOubg3a z_1~)${LiZ-V~4cbXzb5g%PHi4`7r(X)Z2bRA-Tifn6Y{i!z|>^V9t13D`*{k;VuNp zL}5_xSHz$?Jlo&SkK4Y!hhmKP5OV>u)D|@-L5;BM^j$_T_|a6-{ZfIs)xnhX(}2=V zWYv%qm3SzFu|AWrB(K%d10fDwJhN3aBO<=^;(V|o^RV~rzJz*5>B=IoMyssh+~$zA z{beTo&>d*#uK-Afz|9n)6fnc}A^)g{I?3y zd4PE+D3Qf%5GkHlptUdaH3N-HuG})$^BVG4kZ#xU6ve-WAbHV2$$*Oo2X#Ivqj;Ay5Hmk3r`wtU4V2S?z z{N_R4^7+90xMc3-2 zK}>6#0gMlF73}alF`L;(+9>0oz_aaWIe7-5{1=wj8?dHFP*_S)EckAR*4X}>HGv;G zVukGGLjUqA@mD-uig$(pZ_RrxJcdq zPSvHHURas!1k{Oya4~XC z=qiGiNiIOSrs-qN0JtYWPLXYqx^nkG&La zIj=3liLW7JhISixR=~#o%$T1LKwjy<3pd`t4`s^?OE1KI5B@;Du*CZR-NZ zoI~_OoE4S+rs%i)6lE9RB&U|`w9C{Bke5uQQvJ>>Z3+j%x;v<)Hr)3&dwNOc0Qrhg zetRBxg0{7WaI(*+#+KRS(1yEiHkoAwZ&5!?=NP0W+Y`)k~t>hD5S1Tq!Y6>i;$`yL*Ei*l)#RjQKVBN zQ*F9QqygWG?cCaa2y|-uvGFq;$rwZ4I6h5VaMt_L2rW(NmV~hR9xY$$5jbT5?zi~%8hByx>v-oZU>2{_X1O^Z(6EOSvWS$?b!orD|er<)fa zNlc8>FKkb~Ym$8?vzz5HJ^3lV7JR=e9d&{1a9?1iJRq5k@!25ri{WzUNnAPZkK@M= z#p@AIeMB^c>tV6Qw;wD{^{hNUVu=NaT9kr96RRvOn2Dq3Vh1gl37K{2AHUw52hRD= z^tVtLP(uJp)V=81G3?U$-OzKW*-5c&Kd0u<%T;n8w>qE~l*r+iB~|&}JVWuU0v7-; zb}y+qQ6MhYNixE6`dp&%Zm?OTz$;k#Lwd(VPjw8I_uD-7D zFeF8S+nvvKjtakZYFACR@_;l278jLu?(3YyCHV=%_Val zx0_ZO2J;Z4PE`6-o9gJXyjw4n()20C)SYA*S}u9t0-e01zPm~^+9aU43MbE05sQkp zI$MCw0_NJ8KE?NyQH?@hB;Q_X+zrKJS48=0s`oh(5^+5#v{Zh=GXT;#cN+BO+R#t1?_al zv60>ogE@>O;!PlOz`x)wUGhc39z^M)mwG{)Jen=<*jp7rF{*jtT$+rsb7Xc;_^3ZO z>C^qQVe0p_G=eN9VjDF{yElr_za4eLy zLY*Wp7(Z%WJRFgXuz9V$n2Nu*po220N zm1XL1B_NK0b>u#Sd+%4yd*(!%U^8^7EkLn&4#Wx<}OFW3xIAxw(3~u9Z765 zODoI>mkF(Bt@)Xty2`eE#g)#GUfGNi{qV1Ay=ThF0Rg#Kn27$veznESYks^EE34BN z$m-+-$UcggHFBV7ko!-99s<5ivtprGYu|ge{3zO9YLO@vEizs^89{GEuRKaw2Xfwes$!DV@ zj@x0^PGP2oTKyZn0|_s6+K*S6SIk5#60Tgq4&@GtrkNWI1l;AAst(dGZ!wncya0zA zL&KVkx4KkG6uFshakLP)dR#I|;c2(zf_WFlO7#h``^UE84oPtK1cjUE$d0@Bch#8c z-9mp8`5L@l*fr6?mxRKF3qG&Sk@g64>fazPKPYAFoU9AnPl@B==Jt2Ld`Qfx2@-cv zAm!jd;_Hji;z>ZqcsRb$niwumX+U*)l~=0y9b>q2z5mD!X; zSDo#?J7{cw@M8$rxmlEVl;B6p%+!%l_ipYe`gdOUlf94quox=hR(>@VA)y24Cld3G zp^4=BBgA#z7l`Rpi75^k8T1HJ`xFKPe0+Sx_|tB9b~@8ODfTw<;V|763$}8Boc)KN zd*~)o~Jp08f}oq7NCzN;NJFX%XM% zMTn#T@bnu#oW-j4PVLKubUzTb5)pUdu%9AAATI-0)sb z$;@)u4xmZUWX{VmnUkJ6q)TUGm@d54bpRTEFEAVB2%mcN1B*7@zJr>Cf2<%I|#QkHsTd_OtqF5Zg#P2)O1ARVuD;W(M)sohm=YfVgzF z>bxS`R=6a_g{3D>F!`$VA@?d2OdGlk6E}+Ky|N-<8k7D{!XntS#u`;F_gV3_D69Ar zUs&?Gwh+U|wZkaqNlm9km7`3LsF4UwKl@GYFkGDL(ajZ1YG@g|jLe2d{za%JPbvvI z2xY=5y&*t)wxWG}Z9IZIvPRnOkG4C|RgJc$hcIR`ea$GnxzN=d(yPdIj2Tf1-&Y|? z^?hDJQ5jUaPbTb-wCP=Xfc#{d$QVcGNM);_R&jrbd^y!d0=PB`-(&{|LzODO(3<*< zHS_s_dXI=j=>B0g!}VXSDqsCG+M#73*oB}6Q8dX$4oBmjjiP$`<&wj^uWj#UNfQ)fuvsgPVn%BllrI(gOHlqPXDPOI{^Ub&Vg4bmqeo@Hzr{9lRBT$v2Fv&72XD1cP>XNOta_Qs&rF3PD#+Uoje(Fjoe(&)!6crxT z_#?#x-nTE)1oNbGE%3V-U*WKjfqDeyD9Z@fiXUkH?2^tMD>ur5Wy_75F8pJ6l23K_ z??uFKk%ln!U^@M^ajMURRuy z^wm4`HLVZpG22nCI-F#DAJjT8+0zLv=+h5v&8mD53s!0`63Fp$*t?emqEw>sb$Ae=E@Ic z3Q+xPQ9MW`T0ayCh{X+$=dRezSxvPSDT~eYek=`Pe4xcG6PzX)dj|EE8_a&~fQP6S z-|21N_G~U3&y;7ZIH`>Hrh~}g*$qvY1q+b?k&C#eN@3Ok+C1RXg2#2D_2ihl9u4N| zIvwuj68I#l7fc*Mcb${X?PoWDetT$o|3?Oe1Iot$*4L1SYxT?H zU}FH0r%KNVnmjBZ)S0fd9!bfi@M-Y6*I^)#!uDO4bF%zUzYyvP2%a!3>Fb zV+?VcNBt-Y1iQOQTgG1Ui1h5`PV;QTso<)$Ns2G`EK+a8--#Tm-K^#MNxgOcmZD}%_?_mv!;*F(;_XoYk ztgbdO8Q!XxSJ{k&-KkYEOC&GV)%{$I9!b;l9JhW4;W8(I;@Y>_=e6?P%c=oGgQS{U zS&z3GeXb>Ix>UX{V&ORO$~WD7Dqc@YFt_nkW<1p&64c(8sOnt{|8Ti+V`FcR;;b$X z-x2PLM2}!|d2usjy>Hd5r)D@z3|8>k;y)XHVF`YCj@5Cl8*etbS+PWB-W)L%6ml@W zJ3e|nvnkr)cH;pq%wl5=@L`b)n?8{B0;x<;WG6_n0#?WyhaP%W>4T@@&7&wGD zD7~ov+JTQ34d$dI5w!fo#QWW(9Y*Fqvs4oa`~6K|I5qWJ(iQ7_j@g@TcT`Zb{z~31 zA&gAZ_?B>Pj^AhKk4d7p*enO1m^C{JO}pHXBEB?1Ql)Dh0rxLwjPuV2x!&{enuc&$ zzSHnUlP>SAzvgzWh`BzD}$DHO2mo#jMuFek;~MRv;aXBjY2;bhY3hv>YEPC?6A>)-ubikp*ZG+?(BaX~b0c-2Jx zYku}~Lx*j-Y^!lahR6G2>h$nFLno8n4|ZcWnWKL-(qy57vi%hG_aX;yRW1ZN)VNEb zBcyI4!}AR~bJ1I<^eJ9Ur<88K!{cT$zso#Y#yTGAPVuh#l>B53U!vaZ09eR2kZ>;t zSti60K>p~2D^I}r2yoJB7~?F6t4L?u25$v>U(eR+3tc)M%fZUM0V2qG>C?;<;K8gV zmTqqa*XBoAta@6w9cy7G?qu0`z217VhJ{OGO;hyshLzKtsBX>T3!$6Ubcd)o1a%zv zDCc7oOSAjlT7K>L`w1-0r|X&=in~ow0NA3qCbt&BH z)0V2WrQS#4u2AXIpIk$t-w#dr&&~I|@$3>ArU-z zXnA;BH`MZV<8P>_2kqkvlaSe%A1h3R_|IYn+0CghNlKakk;oKu3I8*fFGv`kVgtK<)1Ho8Njm8cjRCPR<4EUE0+ z;vddd&%)&xrod?;t@L8fL0>aAU2!GdCaJ-a>QtQAac+~3I&3MT^)sPAi$b$^dYaJ+ zx#iYNlBbZPAN2A%an$*LD6c(1@UbBV1q=OdbB26zIjTRCJ9oG^RzJ)WUhR^)CI__G zR-yl`q-O!Aq5OQz;}}|>Io0M~NK$e*PW(RmsXOtdF9vLidf6uzH@L5(T6unwqj7gS<*5GC zTn=Sr=~1%1uTDfOy%>xV_Hdy;XPi3l(Ip<}TGW96xa`9MsNPETV6CASTL4zCCAntT z@>gsA0w|L<=#l?Su)_O(^i$`m-FRNLy?Y3Zb4d?gMr9KE-f+!*S`Q2O{fN1%9JAi% z0`}$~YgI~s1&={kK%sq1>wC^-0=`oQ9bXn2xowBd(_MKF58LYOg$bMM1mUQ2M4aizipSC(R z*zL6ul7=8A)-N5B%2X7%TNa)CKyJlXUXgb+E42wGFH7d!P#@k9KGk0>S@6-NE6NeL z=0q}}eRPJF@$rH4Y1e;s8s0zhfgt!og#d!+FrLej2gZIMy$k<+#OtVLh`^;T^v3Ij zMK$t^-EBCxLq*p64;P}3aMzsjtys#@V42ZRirKwzs)i3bt)!n~K?1^dHn~o>A?y?p zOy$iQsxsMx-e~Q04BA*$Vue4pu2b$uZt#yM8Gr2r;VN0y4E&X|NxP=Yaqxv*T85<2 zeNuM|r~3P8(I=o#05?tbk#NlCvKj9Cr<*n?y?*#3qSklOW6$`Ud-7ZYe^N7TbVNb` zhtwDV&Y~Elzcc@9DMl60St>1Xkw@(eHAnSL=cLPc-|S*cOS-eZW6A}7r3@xdYr+VNOvH; zr1NM46pe=$t-;iGkILt_5$Q)FX^6OI0f}!AfFK#U!W}&r+>k$C0imUCJTv2U{~-rS zqJn&rJ=UxVB#D%h^&Dg)lr0(_2FAt@Qk0Z3bHm1aH*blAV-#0T) zQ^M`^w4yOJ0=mo|4j2D>mU~rP=my_s`Bbndr%Xmk=He}ROP^3&gRF|?ychX(a4UE- zhNEaUh7mqT0F%MOgMdWOksd*-7+rQhl*6AXesmu1yJvcEN{+zNignD2uLtTAYYDRDldhbK-%1&gZ=_8 z+l>E@Tl>HPkYcwm4tM*GFDu<{aDPI=R#3le6|Y*H{+;pd5l_N0SnFZ) z_W4~&l-Y0zv+@`?&GJpeP-&3Qg&xQSN4F99zqXKop8<=I2)J<~-}s8>)eo2Sv%IIh zartxL1lpI3D(17wf@wu+5+o=>#CuIcSyM$4EHy9^N*{FsQ<;F)Oi~rZbLFm6UTCdc zQ|ROZvQ!NXb&O+6=17j_Nr=(dXYs{7X3v$p@cG1(S-$>@Nz4a6A?WY-lBS)IL1NBY z-tMzV9s+=vVkWt3(Y&81I5Bp9WYW1`yJh({kG{(J!u`qL^inVywqHL0M7_ZSpYsq8 zxi{gxkco-O@|@MjC!GG46FeqHA;plHipdGr0+2bP4V*4hPy9GT%5d@0el(Jsz_0yC z_893KMHjnPPh#NUb$o1Rak%#$P+s@q8Hv`d7W~nw%q;YYg;0-4@;gY7;HcdjutS3Y zbkq-+6hfy*Q5ib(`H?~V4$zz@Mg4e}eVa|FBQjE1??amGPh2y4?!t_qp@?nPrb8Oz z#5ejgd5As1%l4zX%v%|$*v8pCm-d4HKJge2Szsc*on!=Cp#ww_^pfLY8+hC9-^cas z%WnMF9h^rDuDq=X@^2#X{vVLDx+16Vj_q~(TKmLq`m&`C^?!ov;S+fBoOC^NzK5Ag4&oc0 zL&{$pRehEM=&>;V`8Pj}39WGWzf?S21}TQRH@u!6b;GDZDIInEO?w-~K+{6h@;5r- zut1S{Dv&V%>sr0eLsTj2wknB{QtgWkg1tPFMp6rD(GK8?ZqpA&Py+)Ulph?F6i zBQHuL7vlO=fJC%A2bYsBx4S86Gt3$-fs=_TRx~t`6y00`nUdcFkPd${8lE3btclEi z3T>oCf#a5R5f~|hVr%BPO$i8_{@Tq zI5HT=hlD;n8V#1*IyiN_3~9KMw-Kz5fZJSzzYF-M{=Z7vUj|7<)%>Zxw!AYe<+ay8 zis-~Ip;zrEpD1_M7Ct5x(@$|Tr3Tv%f>alIUi;G^vf(I)z2Q#zcp@i3|5ars7_a*@ zcqbO(psTodFfxLj*F$0u(})rzKs)Wgf`->}e`Y&wu(V)!*CYXQjG<5qemF~GFsM`G z*m}@!|3RYX4Jn4gECB~1;jcpHkhQHk*M`%+l}fqX--yMa+I(1V`@xCE%TcA1ynZ+- zown*ZZApVUStV~a;dR}{0x<+r z2DcMve=%^V_{%rK$8G}~ewy-`!|V1En70_;2o=@+GUP3*a5_~_;>36(*8+F;uyJ|6 zGA~hQG4OBX?oD3U1}4*b4onwccMD!MLJLO(K6`dT>$u(^VM2S3eNiOINbqX}m*R07 zsnEXMfT@m3zx9!{JM(}|u_Hf2<*VL=B(v73$j3YZ4sJ!pYTc7~O*Vj%&eO1ay*h^z zH);SEFmLTe6Gj47-Cp^ZbEdjuyB=ndrh#<>oy+hf`>oQ+hRqgD$+DfI^tXqeyVzbe z1AJ%szDH>Tq7d8Avz?5}tuaXI?TpgV-YDeJG++OG5%@iDD6@!q?GZjsKFK2-e7HxM z8uv{)J0Wn$T+Shs7Xhd~MxNLUmwMZ?eY;{UI;-!tR~Y2>!}KYh#K|UX>dyRoq4cgzfhQ;d+d}dzsMct4ea?Kc822cwqYh))ypRm zKVJ3mvUrZJt5myP#rb*U3%38&zEkfNWg8%?HrQD%UldSz1@^7HneYFLoa~V5r+5mr zyv%9reodmVS~*JeOJ^nwQXU>#)eHL`U-YOb}vylP>KYUr+v=ZP#p!ysHNtGOw##Iw^emh^kQOU(Q zyvDTaaqy>pPW?coU#_HQe>}YiMh1|Nv%LhV)Dkz8$&B+O={irE=6?Dq`bxiEkD(kT z{UMr-q@jh|QqSboL+@PIEJR~ z>rFxtL#-YPV@wG3GhlF-wsWpCRe@3hD%d8WJ+R{kN(@vBS)=l6UimP{bF%IHTST%R zO~6?GlftOd_s$xezArUH#z7$D`FRJlm;to*lT8MdQ1ow6mWNeaIQedpKPA7imwC*H zXJ@-1I-7#|m?W-3pF+e-q+Mvxa?CsaBBo0Q7fX{@#;jYE;4v#=BP*C52n#wFs2-1B zhIA;h`|i9pd86HlXGV9qug^i<(?zET+=srGViKmgUSuqs9Y+08*bxJk6*ufNFRtKF(U?4QPa zM%NAp2l}A^j6c7(oX%jW%}hV)Gh*x`a~W(kw+r>wCF#ll>C(EC8=U~h3vV;qLGyt3 z7R@mHLD~;8zkSDJ@6Aq}Q$dda;!d9B1)n`Md2^qF;LjfU8lESyENmh-)>5%=4GIMK zs81o{2rUsnr#?ocZI>HLUe6aW+#Zg2ZP)vG9xMG;?`5j|?t9}(&iYbX?<$X|*(YFXe&@juC2kmpd4Va;s35F|G&?10*x|}`|z(hbPz!phdYlYQv{XV&OVrfCA zAw>JM5_o|ir8TfoO(7Wqm!L-^*5L5%0WLvNlz@jKrgxyi3C~dM<;3Z;G9^Ck)@}(R z`zKn7AthU-%JZR}NlY?2je=R~)q7Pda{Ua3{YCnA%?L%KEwzX^5k!XN>><@)Z07SD z*YFIcpUXUx8bm?|2hpACe3LhM12d_wriEw>fi*T>6|eP;!X(AoZwPrJFze@acV z_-0$`Zgr_5RmOFhgc9K^uYg>YJ03>s6#TDOoC2=SdXZGtzhr7?U54;>Ao;7wFblva z510F`3pPCV;#Dz3R4x$x@D+3S5XgNl`o1Wch#yr`EiE>|n$40RUs2Nj~ z2|PqFGFAd+3@|cjJt)ap7wNF;vB`9OHc71H2=-7;zqir#K&kbv!n7rS5t zf0q24zBhru^)!xsv_$H5NC_Ans2S5 zjgX}@De%w?2(P|gb(AA*)t5a|b}bY46k6W*1*65F2Nkl&1jXVz6ilx6HKa=PxHKa$ zN~korQ%p&G$tHwXA@MRg7oWwxoM2aNnt7O`bE)T3v~&(h{0d&tV3L9TZZ5y`xsa5n z?=Gu&+IEuKF;S&GY|`Z#MQ$wf)3Rv2FfD#Ha+5bJEhQ@QBl!S<15X&v(-(oA!74>? zcg7RJU&EW#ySn4Mk>yv^?n6%08i~DA(T(Rtl5P?zA2i*UUsvg*h8~o7@zSgFfQk!e zjeslur%EB|pNb1>s@+kTj0xt~06>;o9=JY4h%;_ChSPsrT*v=n%V~!fe@!S^HtW3? z@2A(E zcbsVgN*$agoj73b2q<_W97fn5eitriO)@cinZa%_bx=7n4LG#NB0dKR{Hsoebuco( zzPkovsI`S#`cLB4s}QDewOy(E{j>>OzyBEcd%4dY-g!b(j$H6qIrQ+lX4{Nck%|E6 z&z2D{xHh~k^rp+qrzfI54HT(^P0aEuH2+QpcEpm(pdi)z+HDrnZ3SsAR zJcw#-AL2&*?mvr_wCZoQk-dDtf$!s|E&6qa=@`Qu-3&`hM{G7CqX;P$ct8@XF&yVc z#a<>UT@a3#B*KG5i&hNhU5HW51h1;^!GfAV?EpI1LY_!!Vm!xVk7ZF5=hK$TGUk}3 zR7`d-s?)EPtQS2|=Hgf@e|T2B>(>kWv8X>;ZE$p#pYE}(Ki5W*ssHk-pm^<5fqg#3 z1UbCtgO3`~j6%$T*moGW?{<4RR?dT>8s#CU*g+Vk^twg+zsYI9^f&&9}-8QOIKCtnEz;4dj z&?9ff6;TqIlRimfqbPutuTTKSi|~!{ivM1`vE!yayFrv&z#!j;^BNzQHM_MFX ztaYA*fIm0n#>sg%m__lE*1)+-{dvRBqmZP6OgmaJ@u@gJ;@ zCu!h*hnK^3HvI0)s1Fvj_@SOruatGzatZ!ezG?!$4_^Q?Ow<*y*^gX9vv3%&$u{H! zQ~^Vmolime>gQJ1{3m{_KeZif7EKFj+P;`|-d)MyQop}QU_s<4P0H(U3oy`r{*b?$ zk>9_=zY4~%6E*IwJd<2sJm00cT_MumdRxKa38(xYGKOEyvcSXIiQng`htunDixwnU zNpb8Y10n*ts>RI=of7Tb%EF5p`*X>`-2WW$OupOn(A6iGWt!s0JMvzHwn3QooEUYrrd zazkb7IAWcO>mv4Dfl$N)>UIy8JiPYL56djZ&#y(iTbm#Kad5n_UJDzbGk&MQkfWRZ zGVd&$hj{a+b^>!wlN!8U#KJnavrWAjw%q1vB!Tz$aPI@)0)O>C=3exF3$$=O zzh}>*gz(jaD~Ng`gUm`kdpy!FpK(JLWA%B40`A?OCfXVpyuzu-^I;wCuff^oEFAp`A0=YD=!rRHCb#o>?iOYoWAGy2v`c9eOR=CeUh>EuQ?vag~G^x zIV+x+F2EV0_t1DEGO^S=qB;~H*W9XWVs;gyPB@j&ym#y|n&K@;3CvWMo~Syhwu&ye zT|In?q)IwE-~T%4=1Z9pqn8vX4Z9sbDE3pOJ86U)=EyMJ8%LuuAb zfm2#FY*>hw_rC~x3$M7NZdtJL;O-XO=_WvM2oT&Y!D%44OMu2DK#(B8-7Uf0-2w!6 zcZbGZrt`hIv*ymbZ_Qu8;`BbXYgg6TKf}l#W;(UliI{x;6;6Yw*t`PH$kBB*X3>|1 z>U6E_wPBruE)QIgOX^xrkx>&>yQ4zuCsBSW@KQea`Q<@_{40wZiw~267RGMQV>&mO zLVT4PZfaF0x=sl@@0T6RDCP5G{0Xeo!a`$pXu)X7YYx6-e)D$@`tP1h*x8e97RdhD zEA@!xlAZf6ku)#y)Fypw+xwDtY8l z_S(_GU9%Xkgf(QFZ_7mua+9YGI0;%P5(Xs4JFpKHvg4M}{Gu;dEaPMS202gv9LKq2 zObg4WyjoVG3DnKO`knaqk(~UTskx%CUTg8Uk7{+l&FSGci+-JcInOQsiLFteY^+R?K$D&G)4Mj*@YtOiyc=o zJ;?G3Jp#`4!;a67f;EV@!sFV%t%;{gj!jz=()~5`oN{M65Le zLVn1_8?&ZtyUl)++8})7;G)^#f?EADsgMDrgqxbx;n>`9m|uQ!Ag#n;LW8*x+55L) zp7sOVS&INj_CPe1L6~WDai`8@KUQsV`j`W(8Kh;BCHoIc^``4Len3&{O#X80M_~(> z_o!~(Vf*`@`xEcW(hIrZhyq2L7#RZ!t7rr7LP6$yCV|?ogK=4^* z)`!oTD8H4P2{CujHxd}Or`PD@Ngf6Ebi@9&TiABo|7y3au+dPhiIxV&T3Wfc!cBN3&26DHX^LOs-Q4?*vaP$+?O zD?21|(_^y_%qGF;YK`krzJK#UkM_Dpp8B`Hyayc|jycmUqVVQDdhhRMwkvYk=)0X` zl4!UeGq}OW&`nMFLIz!i&7F$*$tU65?-ZI4*oK3Dv&@Dp25cusUusW8%%}K-25Dpj&^gKl8Wz^DwJszoD+QOX1Ns(DJ8ZJv2&t^3OZ;LT&S| z`6}Yb)G~sIKhS})XyeK7$2W80@GVhKIPX;+3E%^~^|n)jl*}eLVQQGE3T&y@e+-&` zoB)Qzt2c0bsMxPVk44zR!AD^AJ<~$#6DP{vM!Wv zh*k~KmuDEv841cnrM-`=0@4ZRkZb;IjNzJ+3m4cT-elW*R-7eWi}K@q6p=?Ca+*CJ zb{vaX>nZ#-BN(j~Go5#|&pBHvJsjy#nXs*@cFy`&^Fa*=EHu9!T;&X5$AjZmKpaU~ z>s85mLQ8b;<-jd}XUVA^Q(iHk)UWpzbJA|o36JrW=~Ra^@`;t-cQuc9g*diext0f_ z=KRpHF$^5Bq$be{^{fGE&^V61_-#BftQ~MBTSVdSGm}IaQNOa;{uPrLGrSmVphr0x z_ZbrbQ*_xefOSnCzeE%BZtY0j6XKoJtip1P9lqAQRDLdOzBdbTTrN+Qy=@)MZqzS( z70`7B;;}x+fMVy(vr^;fXQ1gssamo~4twlrWL`h`W7RQB;wCJsg0}WNEX2%mwe@7m zl&g(6M6Ui4vhwwAu3@xc#A?=kIWjg`tPbABeReb9_I6!1Rz&ReSWXZdwv|C}xYHFe zGQ}y-k4IGB8BY0ZOe(*P@;|HLggju6qTRMPx4^L1Ppjh3ln3!}&mx%7CQ>U~P2Z;o zZ+QyNv=ymeNblgK-nA^#ahtb2TPGdXDBthd3Hj?NwExImEPG}RO_`*_!6Y!*VQI)| z`@#xuoh40fZdUl2TLV)IMhtJRU@^4+5f=PnRM)nxZ3e3Cv>F?%tUJgHiabJ>)K(3H zXAQmT6_dL;U5Z&p5ot)IfO*Gu z1inL-%P4J$k^)-sdeDX{t=3qD z>oy%OXn4bG_QF-s;=v9*SQPHPq_mcK9_~xz9(E@+4^%{B4{t@ui9y5f+kQcvM!yB~ z+bb>D!u^Ggq*srwbK1P54(ldNM+w9|Uw_BrzbHRi-@?T5AR3pfjy59_Tnlg`H zKF6nWxxluhN!V$i{M(CG%>GwpdjE!mL%!#G&{ ziU>q*=Jt2!FUmMsn2Ej)jdB{dE|4S79LkL9nmCxtHwztTfA~bfTZM7S_(QfFk33%l zYF{$pC$_6Z6>um9v-GiVtEZ@viVg6o!zsf#EqX#|F4CyzKF0rb|^n!T;%@)d?VP= z{}?#>49w4Wzv{`+&FMg5sitj(YVovPn!yC#e3YbkO!++dy2+@HRtT}7!DIY)JX2K{{e>^fZuePV^%LI2IhkpgsZK^v zKVM3hF4Rb%opf^$zhKl1P*+4m_0yg~BC#daSbCVO{#Fhotwe{e-BH>%-R<$SX0|Kc z$fDkx#psjyz7C6ZqeEY)iN@X|j%28K>zH@8MosPMGjp5RCzws>;v8TMzkA;^F}>ClcD1@8rDRNPy&qD4y^fs|}f*JT#x(4dq zeTi;k-`8sgEEw(7UP5gZyuI|WoF+U&G@~ZD_s>-BSeST&Mk2(lo0Nk%qOKF{Bsr%s zPi073VVz>;mQ3}^yY=%mtL+jHnY+Jv_v-nlAQUTy@4(;#E&&_un{Z6F+<8JmsVfZ} zp&LV-0_I`@@ekp$z)7!)oH)bsBQD@;0lwCY2i`s5ldaVB(*Y_6{SPlc%2z3&sh9}_DR zNsMXzCCEzU%08gH>}SlolX?JetE*c5Yg;4v{qoC@8j~>yjfbYJ&#v>lnite#dXcMc-X;uT zLt|aBY;=BNQ$X}jh*C0m%p>PY@6MW5{?{9{N+=6D{(kmyp|TC!CrTGu4i*0v)kkFj z2_zg9K&QgA@Cm+iFp-rN1IeG|)gA{>`1IJ>fehby_Zv53=~$@ed%)6;zu6eJBh@`> z0`qG`FR^x+fXccUKk-`^s2Vi&#B{v?M|hl3C;*Ox$aC1M-92rAd#OuAI@^ZMK{h2a zP~*<@`m=VE1sn!JYL3A(Tb0`yo;Iq#tGz1+)saAWt66(b~C=Yq&&(z_1^YFx7(AdnsBSA1f(Ma81d{2K( z9!xZGC{L+NKP`CnLQFF#k)V|5^UQjmoSXWCXAW8ChPWmc5!?@44U&tvSl+hci zss8ea+A3luV%YLqq})+JLVZR&zZnoHJ60cOAy{ul|jlm$C@i zde;HeR$hom=D}3;yf;uvnfd9hK{TXud6|Zg{7=nJ+1hNLdODnG*6C>36CB1cN1V9f zdrGoTn*;qL^N~p8lOWUHAKHHF7$~6Y-ve7^UP6=5uj?Bs#Ce}~w6P*bx3!&KnO@h2 z%x56a9BxdRuTH$m7AfZ^mlCufwdY%}w& zGkVP5^EylkLKNlvDCEf{IKAue7^Hr~Pu^+*lF^T7;K17lOn^w?j4yhyy43qs3?hKl zVoLy~Y#0S-XAN5&6VX35{`+d(>s#L!K~JvQ(vRM}bXtu##g4~nZ`5H6lN>PZY6@b8 z9p}4;Sif)vI_yK_Rq=Sum#s>I%*rI#;~nR0rOn;Xz->WT!%u%)Hgx4t6zhshSn(+pnJ zlFr+uh4jqMxKbW87<}X;tqYb1?0%_7y7jxlF1OP|2VU6)$08clQ^*c{K@;n5m71r8 zi)|#~xWzMmoCnXKV7rO}k4c0WIW7lHcjzwk&u`zyM#&waD%{YnZLU-6qy$yi1lDrj z3-3jK>6sk~GV9Ga@vsElEKqk=j+v(+=wVslf*XF$nF=P_2}Nav8V30g=te?1z4?pT zQsFac6b#sNHBqhVlWr zCX{l4v44Kt*e(j-jsZm8cB2Kd`_W1hM~E94DbWmiZp3C9Vkc|p$eh2lX?VEI9>0bT z-EvZei`JUl!Xym~xsA-T3W`s}XwEa=PejwYDPov{BUL|HJdQ?@zuU{6JB;0^NM`0L zhIf;MZ{I%?z#=&m*GfhS$soYUM&jWA9x(k%i=v2=Bk!aQ4`MZC$3{)w5)RLRbZo|$ z2|T}N6QIy(WkurqME!YFt3tgX$Korm2?p~1H33${ONo3+d{Zxa@J6=0I9vh2YK;1r zcL%)8)FszT({HCe6!h^tGbId$3PP(`K%}2C(Sf$yksad4OzIYRgl68(>`W#2)OIci zr8C;`6A6MSbY%@y1`SS;Z)nNctj3z6eVQSf5cLh0sUM)H{PM7u7aRv?jrZ|S!NsU* zBbOiGa-zpzf_(-ZJkN`rIoLNgy-I3>wQ;ntq#EtqPLBuvNklkfc4ud2XGdW<%Jgq&~Nl(f7yJEv|$QsS1R^WMTK7T;sf;&rM}4k|2ME| z@C3e!%?dJqRvy>Pp-QhDeE0;7q|qV=(0J6waiCq+l; z6M+k#l62dU66m7d$q-QU#P&XcOcXmA*z8z3MVkOnq=pA6toC&OUBxkmuI(X##-8Sh zfpI8`5!1ux4-VLq7<-iQ@dBh-aY^XtIyWQpqK)AaF-`z(7iKq#m2Xwi!0z)>NsseA zA*+}uWL+Jh=hRU)$^dHRP!xzoDI$3HgPkIc3R)mI-%Bp&?wDpxvdK%|joe;Lfb_H7 z6AwHuz7(>CzmEc=>+_q}zS__sSh|6roK|}ciA`hF>1O5f4K|5@da$hvr$0>+57ni} z+E;?5YNm~Bh+Ng%5V+(t8%5Uh)Xyx~8xN^uSYX%Y8bDz_)GG`raiU9Xj-vl_O+&8C z@6ynTPaq0u-ylgWa;(0T{z->#o|BVm1^v zgdpsWLH3hF{oqGIwMO6hVwyi>8D5r?FO!G3xj{2@{;> zkm9d@meE53+y(AG^7|XFskD$P@%ep|m-&R;^pl@L8EM3cw{qiR;*8{H>w4sa(l;9P zqHbap9r(^~ML;C~*rGfD=)(1<9RncJwj{S(6_9)ZMZN(8g~3A|)cItvN@c-qv$@GI z2J}n8LSeqx`O{GW(iNiU`tCybw5S z+>p`F6C`Wiw!A-;G9LJ~5zV{SdB|f5p39l{F`;`;p&w4JxAp_kl!5BSW+=Sk{%h#< z^E|P7B;iu7+kgZ>k_wbobnfZrxJF<(<9UZb!iLGizQTq7<9CDfiTn>PuO1IY-3z4V zhJAxK;LL%C=izhpj_8SBZp5~NweUwb9MYv+u@{uCJ$F*n;I%&)z8t7f#>?tIqE_OH zMbz0!)?F@Pl}Q&rk-scRiVm-ARqLFuS3xIymsDsz%cn^EDbNu}8Hh;#4eA#+Xo?~} zOBY3qp3&d-;PD%;ZzU_#Gn81}-f%o#Qf1W2SUtyNkA#X-fw%|)BLU_(9z;>{RnS}j zXhZel>0LMiX!4e84FbR9!nE<>rDHGnv?&=*vAi!zXie`!&7MdxfkS8SUIh!Sq1=aW z8Ql9derg?_@P_2$^@EUO1az+V=UFSoiC=m-lIDWKUa+1U_IN&>3I_;O+zO6mo-iMH zPNKd5c4xwDs(jb1o}w>iE5(em#ug=V25qYW7(pLzeJ+5mWDHc$8Tc8N>4gA|rg#T- zYHa-#?PmR8Llgv19nXxT-say%!CmK<+vJ5M%J;D5x_o2?2R`OG=(kep`8nm#b6Wqc z32AkcSp!+LDX7&`OHgs?j^V;?VP7B0m~VE{KYhI>wVm39#^C_yIdnH0ngZ?Xoq5xe zq3N&^cY-VnM}-3G6+*=g_`_JVz5342m^)X!-x~;^LBjs#TRr*PQ0 z9jN`|l+6D-rxgEJqX@6C+T5y;cD270_l5_JF4GMfEK(;NrtI%@laFQ1%|}ZY6f z@nLv+bXj2_Kf347F`b9sgA0Fb0weEx+N08~Pb7NnCqQUw`A329||CYD-3(%Wg#-VSl-`gJTEDzmTox{JLXc8#;VN>Z{1(Em^ ziGnaa(3`|Wu^w*~o zJ_SA#^oPPfoUIUZ`x|3Et>u5!u6g{@>1b?qfaH<^gViO59D)o3Vo)0 z`XQ87Iv!hdb%TEzrr6Dqc0A>}cM(XFKfJX929uFr59@lryF=qCOXyUgmV($vrH>9^ zs~Gf&If%vwL|fSQhbcm#;tUY88%r&O9(y|ugK~+A2n5jAT3$yl2?u?`sR=&qk(ZY@ z0Q{8GC?5Y<=dkUa*U+5wcQFI6ao?_m+ zw|VP`M9|DAjV76ja6=tRHlwj~*#|@X7hfL;I_Z*uVN`q{=xckFbG# zqgzL#zis&4YgHQYQA4O;BNou>tIL4D+2y%xc+Lt z|19aSO9Z$O-~e_h#O3e*@!#(Me?0)t-|363#OklE;z`gfx;A}g_uGiEgy7&_Ry4zK zib8A*5?Mfq5|{ZB-gjf0n=l`hEsS%=nA?!Q#s&I7_V~nGc4T)9LAr*jad1bfd1{q7 zRl`8vQJ)KLjK%l3>{v};f&?bcD|WqtOl ziPlpjO~);vr7=gJ5j$h{q$kf7R2emcOkb_%-#;rgSze7BL4fgLykI>s1V~3K*#+;= z!?z0n=(X09Ohe-V$3HA#r;Pwh>Hn_t7<5>j|1F1ou;P*JW{=}TBdJ$2;U;)o7I{{0}AiEJxhTOM1RO)<=S6%MeWLh{G%!tN=`maMEUsR zXkw1i7ac^f3Cl=IVyn*lz2J`qj#A&36O-}p&wow!9)YF4ib4ECNO=VmAmU+XPXCf3 zr9S`s)y8*)JrE@Vz^<@dcRk%tfb=0B3WT#@Z>;a3w8Z%LZ4(j~c5*bzlT@6IN#$mz z?a2I{h)+X}w>e)!J9S%{*f$CVL0e_EPyo=>48)!@;3yZ=%lB*hPoSde&!pRpSf=#8SxWab4&{K=t>#>!p)s_<0D? zliR}Yc}I^FX!FLZCD~HYMdwvsOa$_R@gRwRl}6*jkj!4*`2(=WfI%%20||?#gFMuF zMLtu(df}NdPutizmZj5o;GF|6O510_gJ;_rE~d$g(U;Zc!Bq09T^OfO(fx<*^h@#p zk_C0C;GBQF7ZbiS-jDij4#tc9cynFSIwGeOGPXv@wkv$dw8;BBjo*;p6|vSp2|`)Z zqdjO)ZBWT6Ot*AwPxPMLs#l~!OG$>Z`_?jjI7civAaiFm;RHjGtr550C0|~@Za6LW z9gT<*QHi31IroIxwAe*IrZ(hX+^4uKN@X&sd@yPen~u-c8WO@CL=VAkpZdoK5YVK~ zmjm2Yp`C#-Y^T`ZD+7nnlC`5ssA0%5b!Kk+`RM-VUPhXOohCp)RcS+o7*L&cH7)m#FOCf*8q_O?Vy4HZ`?rkrxj`|Ko2sC9S`n~r1v2jnuWJ+k_){f&Q9%T!I{uZ^-h$aRZ$lLKe!C!0`M(5bd%t0l0LJatW9wN*lk0$AM(_$`lg3ysST5r^&N28X?juge)iYs)8we3?l zfdu8#2}a9{Q2vkPQ1E|{9RBz=M3@}$(GTHqVmko%Ffbv-y1V~rE&YP`zo z{oaXYhaWo`5uPHrUX$R`&DbNf%~8Q-k-b`WwlvCDJJ_Md2k+?|j`-kM!lmK|e1n@e zppKQdv#3T|mPoB-R6w#uzy>=c=QKl=Jn{m7(Z$UGm%Mk|7B<}zA!(l`<{#GP#p8PN zK)bhuvN2y%FRN3yWEAvrArvEY!!_?tkU{#ZWQF2fMI~h5C&FHer0Se)Kr8B4ce@$x zwAK;LMqkR=JcpwhMaVCCNis`Sn!PlX_4yVor)XbvyS(xzU82ct^DUMQFa?qk`7I>56?tEfFh`hwex%uo}@_$ zA0S<>-d)a42vbmcHac&724W5(fj1WxD8W)#$tF^)I{~urBrNd>!>K`-DW);@Dr{yP zJ6Zh~Pb(i*5t8Ok`b0jtW$K5j5Q&bVTWZ$vl4;q?8BWL*r%hs%g#9=hU5j2LmdXb2$Hp$Y_dS6y>ZL_s(bQnu-@m5K41O`8 z0q|Eu#@d0$;uA_icQ^P7;MI2&38>h7;Wo*o3D?R486|mNn~XLUX*6&2OG*wXd9Y^3dY%useQ)Y&XaC{2lM6KVh_QRW zb`OaB+V^q$RRFoLy(b&$%xCaQP~8Ffz5;B;*JZP2>KSpdz(vqxJ z{3&m%kyz>G(I*@}nQ}Om$C@QnREPR1ScosF}5&mjE z{3@rwNl^jnL_R-~xStN8f{X!x$WI=fgSZ^wc8LCAo1?f|5y|lIogWn!W6(I!0b7+6 zy+5a*-5V@qzP$P2A(r}dB~&2>j||xN*H6@KPLQ@EN3W$KX2onws}wI5Yz5ZHZ9*7D z&~dS(^3{KN-?8XpVEA#)lh2d{E|~%z#EW;d>DT7V3J-od(TF3*$tG2RfXz+1e_=-e zl4Bbpi)>~Y9mo>dPLEwo1$R>JO%1l4w<<$il{^Ex^LRr;S~GUwNkSQ@|MGQ2Z*Ltn z5#>Co#>`a)W~wZc4&1pUxRwWk1AjT&UC_Hte2niQsHr+WMJd55FsNxB5ECMe;);WZbwosxA0^sr4Dfq_QJ?Am(%WfU&vM5VK z1e94UOg<+r|8jxr(~Zu)gwP!?+AXoj!tEagPwgMta;w2}!ESQvQj12ovlyM0hr(z+ zlw^ZR2w-MTDL4$mD)3H!+s}nOMrB&IGQOdO6 z=CDrU2|sSI<(u<^?H&GXK}RRVI~wY3rv7zb?qO9?~i~v$}5?+8+4I2nQ*AL|#V#k*@-_7L#l)Id9M6xJvDC z0b9cLvh#&lj~fb!aQo#oRQXlKf#~ z%l)6@ren-NDlHS60J!9wIp6S9)N3y92fIO-HTQBt)%8^g+5`r;us;G;vtAKP-MGtb zy}6OyJYoTV=@pmG3}A5fCE9%=SK6XgU{9RluP}}$0&qPtD(tqW*a{m#Nqu5G|Hn^Z zFnt9BpHjV5!y#es7i!e|p+aAvX$J7XUa?yi2Ee2mLWZ z@;@y&`v1^^5xhJIsQzDm(+H|WNxhjYei74zV8q zU+ByL6dkinO%?337f#F2Cvt^a`_~g0L%bj3D@R4Z#>2p$pnNVUwDo+=3|=QcOKbXyu~a*R1#S}tNg$IIObXj*!BxSKti2&#CS=0e%ER*R{ zl()eEz1p;kc8ESK0SfRdY*oc3nJwOO{c*zdBH8fJ@IeM)4?0R77-Zo_1P3x8TmJqC z^dlwR)zGfBLE9;ITCe^^=|t~>Jw}W#=d{>=Et6g@7(ydd%;;!$6jsjv|GwMQh z)#joQbTM}->^tSVrXCgX6Y&4TFAsS(hhbW(BZc;G)(>rMj$P6b=WCtMD&j9t2O_;s zwG_-YfSy%__xktmolOqKhXIN>jzk=SVV?12uz&ZPjKlvylY;r2s4#4MemesjU*y8} z^)KP{sRBpPEN-Z_%bKxSzACA{``*3E!;gNRixVP15AL27MX1+llx;GYm%;jYCuhNd z9&tsrwMRfE`ytrKKjYXvYORhW@f?owUEI8CZ0=oX_&wcGKIKC{U3M9Sm%)Ya9{D^7 zj)ae4%I9J}$+Fo?cM$Uy1@vI=-ZQ;N_#%;cxq`EXA*<9j``yb{IJnsHt;-kpq3fTY zkH5N7dePlPxq}UON$>q43n|zP$4D=Ypj}T;#9|v>sqUH%Bapu_#MD`|4IzqdDd)Qa zBcSFD)rE<1OuraPr0J_5eaAI*dJ*>c$XL6pDPez?Py-SV0MF}I5Amn{n`DGN{Yw|I zF`H)!^WL?$fRUzd&G9k#PR;Qs{F(N*NQnMTZ|}R^obv$~UFk7j}2VH$z!V_ghs{Z9J5&;(J3Tq|#E9?M zoU+9H)#e<~HC|(3W1}*@eP+I#hO#dwI(6FJq>;aFXz7Fq3xTbgiluqJVkue=A&)Ub z0g*70z*XrjdAgNQ+aA-Le@+jF>ZhBKS2xO4#7lWJ9R=gRJSBg#^Gxf@&~t2N5yIz( zo^+;~&5CC8qXe?Ks0031NgriBq!Mp=ut|`?RH9r& zc5agjR^KDU{B!u^sfH9t(xoCE-zv z3oYqUqM`{#7aBOI)p#MnhXEqW$hVnz>Zs#VEc5^pXw!)PALk>r6wV8`SfZOqatFo2 zqeg*gmJ3BT(qPC6`;8#Iwf#476@YY6sP4(N2bL@8tcCK0|HSU8%;OGScJBM&X4nbz z@CIeu%<-*%iJNbc7N2XUcJ3hmIOc5=ZW!XKK*kl?-8SogIgeG$HWTbKK)bEvowCH` zV8$DO{cqSz!E5?l4b?fjXa}u`E`FvW&o^HW6d8V0dFPy&@9jr@wddy9;UdiG;K!zU ztm8^L1FgD*85xpcV=6myUoEoy-{p`2#h?QNIVEdYA*a|qDNf%QQ%XEY7O(cw9uMi< zO(pl{VvMaZC~%{wKTKN0ZehGHJe zE`6uri~O*4Xm_?8-GEe?*fIR&yX1AgCK*oUmgNJDJkgO4YH6Z2y0T}0Se#3>tZ@SK zK$vbxS6FE+?PHLSW0UZph*@w|kIFdxG&&1P)Y26=S~ppriM*xkzIK8bRom}LXfB?CFahFF1jIU z-36FAT>(1;>Ur-J-6OvhP7wO@Ce6iS;%rCxV8F~a|C?$Xk0vTIK(!hb338N#0i(M& zx&j7b;76=v)q)6lFF0^+wcf`9+ERZ22$x9P{2b=&fBK!`Ts|_;zdYV%ZuUM$f5gPK zN)&LpbZrDji&2Evn|KsZP*u(DSsH&ls4Lx6dmFx}Bq8mY)dH)^u!R&7R1$N-eaf z8xF=6abf%S8X66h?+iPB3cFXc5ZL$7HlaoE)PBPz2l^ouDJf+a`J(SOX-aTyj!XSJ zp^XFm|HfrBG+9LfpItv|`Us+ftv8!@S=6)|T-dh6mbRBo3GcaEWMH#xCKUmI(er^; zRp}0@d6Pi{*eXn3hYUZ^^v9$491BzxFKmlnxEX`KafpJph!G+w4;Fp_sag-sM3>GE zs2!v~`64$I;yMEr&of6G!?C;5cish$2S-&gOt0OF=q^Xfls{AVKM4>V-2w;BmP92Z zbTb@p2QpfbLhiU}7*V5F&IEO5PmhJBB#f#1fmA_#OXgbxOs{<@%Ud2+Pa^GGwp(qF zj5+H1UxlxvqW^O>7MBNyU1D0)sP38_dgKTk9COh=*6x{2G?kl`frTy1`|<~H zcBWsp(&e?|rGo{)CdiSrfGK2{I&;_UBPT^t;f2_LlqF3CN3tXUK)zy6yds0(PSwy1 zQ<~}s2DFC1UW;Z`!S6RI%mqs9e<~ScTH9Z|p_z{j8)WbIDkT%ZzQ(C%x%hv^2 z7sGOyKj3P>2;TS=I*3q+y@Rpr_aZP-c zVw%syRG(%uVx==jw*!3od=TA~{Y83oKPj~5-dJxj zMhicTPJa2wq=csTbtJ5|)n)Z}u&OvAOrt3NxcvVFaCS>IA@}AKg1(2xQOwIjoQ@`4 z^{%zQ$wNI8tj^fOlUU`>i_?D+^zpJA%*^}813(2+oOl+f0DM%f9z8}c)hl=s?u$85 zxC{$y6FgVj@2Q5!R)B@Etzhiw8m=9Qn9XamjdoV=xj~`+T=4|+*1)(#zes^2rYSdn zM`MaX*duHj>pwjOmCKX0pmab;@Q?@e#YmN|it{F8Ib^40H}G$1YyFHJzq2`THRVBZ z9xig__}c;=w&`P5BXMx5;h-5D37WzNBf#bBi}RJyv$a)zoFCRT{xHfGt?GuTkM;}1 zxc&+SWX##D*+{bc`^l$hFF~%2PPK`VDy(zZq+uL9( zZ+-#vJD%i?*EOZI$|Gx7&T2_1hk4zhUr-#3!iDwkHQVT`+LDgkh z%But0a7tsL=PFTq;DL-JthtmRf}iyQJH~QAH1Oc%e7h+rknjE(6VZ8=?l!IK$z?=I zrOWYe-W~!;hfCxfCgX=I4CnUtEMe^%*vzQ@hUf7nxK;Qd^k~GGVC0dEYfe-G0zRb& z?(@T|Fvao~8g-&dPC^1^kAym+Fid?;;d&%v5@K4I#_vtm`YQf|j;8+&9k&v~F@Hf9 z{YZ>B_@%jj-#cd5Vg?(7kxmcezm1lWPj2JLQxR|IGzZw=q_n~2V(GcbL{@;JRRUYf zB|Ts(r*Ro+N$eZ#kwfq2i_z%~|6p-kAOj5(V)(-Gb0;O|*J0=v?r)RObULvx5`cU6M6Y{e* zb5L2bDCDz7q&?GnO8qc1p_ko(h3HRTg=p4(Mm#gM$%z#pbO98PnlmPv{?vgc0QX@d zJ;_aO@Xmi1CJ&@$)pfj3+apuoecMd*YNN$yCZSJLcZ`={{kDYApKcl|Ifd6xJWE)FAKFv{RJSs(ul6;6QaRf zH8XgB>XfxtQRqwFEAl?GHMDGy0zw$<%JBkGPf?GM2vN$n(Byq*bcAMBpeySM;iL$C zuTIs5;_>{`Fa?1RlKZ8@XG+I`NGzF_xKo?RCp2&&>-^nT7KsdgfZ*H5JYPq%44AsI ziR_1D7iTZ(kFQFPRz~hVCN%!OBk}F14=fIZGtNG)j1BRqIJsb~zOI8&PWqVnfq$SQ z%oq4CZAAbZnUt%`5dF`wj;n|R4N#)im;97rw&>$2%Yx&FM-NwPoveX$t*QlbV$^TA zfWmEG;87k-K&{)%F^U#pZe}_DnPxtxgRKe)7ds1y=oBTk*7>#T0kUOrphN-juJ3GbvjMS=fQ5xvk z)4wJzV5)ppY0RMk+-X=%QLP=j_XCr$LO=y}tPetvarq!=vuFRU>A9 zW5O!ClmW@9L*3gz?u?6}R(JF<@wlg5`R2?y^w1qT9#{hBwA2&?yboKlA=hZ{q|^K7 zP&g!Q4ZbHSCz0K71xk)uxOX{u96?Ul?L##zx>K<#@;-c)0wiyK#Cw!_Qw>@{fQ{Ms z>i-oR4S8{!T+a^DcW|ea?ZJ*vfmuQS>Zj6ZN!!)dFbQwaDm%w-1b^2=`yaR)!iZb* z1D&ef6I>*n3pU!U=(k=nNm zp)s<*AS&6^b$x#^iXHeP-g*?{YNC+eq5ej}n0o)1kGU8E6#sn9iYA`OJRBhb z590hC4A6zk6n>#hJ;@}iY&WskCP457_iIS zd?JRd*d#uUxE_Hr5f~oZ(l&&B-VF8r0jub{l`VocBkb1w+lb7gwB3vd;Fw^LP<~7E1?Q|p!w34tahr7z35FcH#iE=Aekvr1t8Easw z>K7PrEkn(GVDCh#KM7wQov+ova~5p9f9F+WhI>T3h{?)2qJ?hd%%}629WM6|r#je=+t|VR3cK zwz#{yyEYcwCAdRycMI+WcXx*%f#6QC;10pv-CY7C5bh%T$iE- zBDrCn!Ae&H&G`?FHU{Z=e7#Avs?*bd`H9(bu_lFT{kA#)Azi-mK5XIhRSPSceSvP% z(*jhP3n_y(;a$28@8Zt)F-JM|DrP0r%MaltlsA7rFT> zU9nABW1l$(#mqq}4%!IY0M{~uVl7eyI<+VZ2Fwd(0VTb#h#zQ(*wbCy>N?9WD(Xo$ zV%8bhfG8@gumjr#bP!D!5(3gE;bIGh@2qBvaZF;Qj_$p|jUa~iOQt*=yr<;q z@`9eMaO$g4;zgOr>B+$4rJYlw>pajlWgs8jdFaz4yl%&)mbl4jruiezTs#Yq;oGJd zlRP{Me8#s<4MgL|enC~f`po7R2(VQ6f>}IO^FBIH5Uw>lm_vXdX?ODNXRrF6Js=@6 zSYal`kU|-JuA(o%$I{)?po}sUN(Tj}YG(VS6|AMtueOqxS&d&h%{@CWVU_7SHtm~V zXP0Y?lqb`to34?~ZrK;k45;)AhkvyX;VSbw2>iOgm;C9^VaD?PBg5pXVgFGM>Vg1l zWpz2I@ezx`yKa7}Qi%Hd5;P(*{e5oqC#AYg4SmFgoeQqMf~%=<;kuMah|-G2e%PjP za>INiYEh}CJY=D%&j5umFZ3^Fp#YOFPQl)nYWQ1+xs)L2UShVmf!GMq(B1@aY_cpg z>LyBE<|{lb@=g8-zthBY^sedZ68~qlMoD>jfyTSF&nmV&EpT&u@3QkC@gS(&;wL48 z?J*%ULqC!V_Sq1+?d7pMAbij?0QA(lOD#=<`78Yg>7tD#gDTcWK0!`zN=_^WtpVp_ z11c2>Uu0}T+&AimOO=0V25#i5n$kiJCLehd@(Dl;)TOb20h58eU|=_Vg2ncSfdo|% zE>eMEii4Fn!oX&GsrKN$BcosEI7Q9vMfJLuTc-dwl4Z`llz96liE|jzep)5*8ro3k z1#vZF;VbH-^4W2=$d<=>gCL;O=?7bInni{mhZ%_%Bj5G!lLpq?Ce@SO6N_(2AI5!s ze=b%Cfw@rmv2JACz@fgnDO3n~K4zh3v|i9Yx7{%s!qqR*2nYBLc{nO%v6B2j%!IbQ zntS+mr31PofZZ1y`L_3KzI=}e^e5~CR~Ni^wGSlXH~E33(90*%8+$qOF)jV~FYlnB z7X&`VgtAm*s-kA2R0d&{*v(zW8(FTvgNk+ezvgh|Aw!em_aPSA|s}i9mL!4%91Yaun4gU_k z>B2g=P?-^t)nE8vg;U)$pxu3O1N|BnEbry1o{U4(#V2KV^9dbNRVzom;oPr3d^^DhKu zi{Q|*310KS>SO+?;>MsXRZ-KwNT&#bah@CG>1V4y@bZLo}CYev~PgTKV3Gmwj9&ab@t|Tv}uFwnp!~pJ0#A8nj%Y~cL|0$ zw9r0M-)1EUvs=O7TluHm=cT=yapbfaYg^A}c@n4MHey{j(9EEWMo+wIDpwh*KX|{X z1K-{MSR%Yx@2^*ZrL0jXivuzjKt^yN!lwl^5j`q!qaa(XaWSwABLvBz>jubH&6dh1 zI;~f##ym(6jk4Xo7%LupKd1)RVsi7371!58xufNJ;f?1P6+j5rDi&3`CkSQ18a>Um zR@&(<(cP2e>S~VXIzF!@=)$G3DPnzrorh2x%(i%OPT|5def9i#6s^leBwtEqFar|N`7U~E&X~8)9u`o(^u^4@ z^ettRTbPE48v?Bn1%-4)g>Ny?^-fD046mIFH@phdvA>>+k3e55n!%|Fbdnaylj#Gc zv8(FDbVw%k!@K*#dt@(tRI3Ll_xzQJa`>{Zxl4H3(51D$uXaQuOGD??4m0UAef_GB z^+i^?75q6Qw9TZtvGcGvkE8UHv3PC*I;Z(ioFf3|qD1WGq1zUO1R;#!yXpuN3_jl= zB5UTYq%JnC@1=H@?Ai`+vNb3-g(MtAAR7lXSx5~tpN~4Zn+4+5d?)R z50&|?ph+y<|OS$)GS_$I_=?#Yr9Si7$ZE+*5A8|(ot1V z96e-=)aeg~TEiUN^Yh2~td%D>L$WRYDtZDYN5atJ$P@|DL?7hrOw zCRZmq^dXqx*<>6O8Rba86O_}}TxChJJOy3dv>w?;$;C)OvNM$}nF)t!m-hyRz8Wa7 zdUGDv2g#nFHm%UZ&h!d^`49TDfsZ|&99St0;o+po_w#SG6)W$Y7e=ANee0cOR?cU&3foM;_G5}hxbNaa$x7^vw8kQBZFtv<9x>2fxlLHClZ1nI3A3#7#uNf+yd|* zDA#3JqT8h~x2|{&D{J(PcI^LX_JIz5}R+z57gx)Lna7vTj2TmK@%OA3g0k zrnJ8iCszgmn|0S0mvZVg%){lySK)?Ll1Y<<4f}(I+Fn98ngKuo6+zkGGC(>u`adqv zHx0=Gej4cF+X{Na;vyp);FPJ+@x{r3g`w`O(jnpRW3XL%!bWvyL@1yrNmJ(P#MAnG z545*F1%2!z1t;9Nyn$7zP=)m6vz6%H#a&f&X@*2G7d&DiRQMb%7Ow)w*t9{%|B5&( z4gpGm3llKjX)rq)l4D!{;yq+Ne|Yi0|ap%1n`)#CRE1yLfQg;Nb1RlXQWdU*8a%~A(0Mp z^rGMLQh8j2eI-A4NoD~v`hR(IJ+y3`#ba8oVJrD~aD}Tp(;+kdt3~pe=lAtORdS+{ zbPs0N-Q783P3+G)$O2K98{Yx}pc{3Lz&>(hZ8@Mi`p+`GaA9n>w(15+qwXyZ7S_xM zCi9~1gLg_hR`QHTrY7{TNcXtGAnLty`fQ!Z3W=gOCs64JV4lH0nkND4!^bo9@y-L}g!Pcg_OqmXgMMg!ky;+e5=H zkrwqgQ%>xH>Afn%Z^6N2iyhD!E2EcuoEZPch>uj@NIu`3l*K#{y~g>fGM9{Ba58`H zs!U(~ZbK4Z^!^U9u-`DySDV|RPX*R+FeUKZ@@(&rowXJKHm)@a$$^Qf>4yh6CTA}_ z@VM$cEk=>S$5<DKIr^z+HL$E)kh ze^UDq^D89i%>Sa!K<47%yoJDH4&^Jcbo)h%QxMPvyv4@~m0$J%VYL3=$q`^NXW7&e zfQ2Lok>;&gI!GHhukr;)yb~}kBe@Xch=Vd5XE|7-qxEihb8+7zWRT)< zzJ!#=QQ_(MiH@wAwmw8hVfch4y$*C?SH7+(@~>%f=soea^tR%ARFT4)2doMFIgC7? z!sgNVf-R)rhl5}4N#Y&j#ZuR)_H~Xtuwkl3?+yvvDCz`#LJ3%JH3bz-$$zPhWq`l@ z9gh_)*e+STHV5+FVGEA2&qjyy$Ck8?;-R~IQ3Dpm@s(diHA3^4C%aLA4?9!Kfcq5k^3U=~Lq66qk+xW#_&vfi* zz5-^rykDm>HU+_zn(`|7euH%nyr^U?MCT>|{$0W(cuaCfN!ey4)FeTkb^y$3A+4{T zmlXin^0tnY?@HE?s_4_i5)w=K_N~=tZw)|Jnws~Ri;*kwt0lTIi`U-?MVF|ahbmtT+ZV>R zC6#~m(4CHc+RU+0_sID(XHBn|CAiubnb`KBzce~; zXgg+|sJn&!HFDj0mxO~M3yjV7Rtrcp2>->))#Gc%UNs$fn;~{JJCWsh4+hmlA{9%> z11PZh5Dd!~@jn;nQ81)3e1!$Z+uX$*(v3szHtrR?^yI4?FJ)2aM51nMd?u@g(R}BZ zb@M{q2Y8rb0neH$b;V?_E~bjk--CE{2V{}|D5jtTO41LELZFwd2O1N2*HS%9z%DOQ z2F6drxa9(fVgDmo&=1zDr(+mAMye*N6X8QG0WUGhUT&S}`WCd68sF_RIfFO6CFCP; z%QzfPSYh!&efTFFu?cfyzYk!j`@vpx{xp1cudT(i{cM>CEvYuo%ieeg^g5!VtUC-h zI;t~gdeEV0@LV6`$K}$jX#76tyKjT56)Jz>0Va~rOJJ6&d;ZPaSYmhrwjrN1m+Wv5 z-dl*rnF=)@PO>fzGLAGzeo^k*ZqEOJ3XLUjmK+=q4czwtUm+Y4_J>8+Itd<zuP7zz9Acyp=EWq_XL>LhhJ4S^_91)0ovx- z_SRy;_maNR9dX}R}Xs8_|W3I)S(Xmo`&6WCv*n0_c4gkh3E zhO%2dQtYD^i29Dc78asmF@?;BqU`+sHKEubmWhiLn6WZZgx7H?PGxykM#nB`FUZZ^ ziM)ybF;JHj75Y|ZW-6MeCmj*m@{4^fP=ME9dGvZaOVV0;zW?G81OR*18Q%Cv#F_B1 zRMZ#7NUvI7EAxezxF9@*&JY;m5I?qwqNNMiu%|xfxHogGgQte)z1~S3S>1%C!Q6_& zn^WIsC+A(;agIn?D!dP`A|u46LI!$Cr7|o}q^-`HRE@Fl-7mPT9Vm!kq~mIs3Vn%@8s z`wfBBQl`kU8kOrL_{X*2=Mp{t!3@ufm)@H$I%}G&q~5_uNjfxX0E{5YFn$TWkpY_j zY5D(8WI$j7#+}~k9T3&^7JNx2M%}%6&wMt-?WmbUeYw$<}=y6aDKXNq@BctU=?`IfSL#za)?ji1nT>;+Cbs)pHd7x(C2e*OPGT~%e1Gk z?P%Y<(jhZV-YuyWjZ>pE@A~cl za}WBKE#`@qRcwB=Mur8#@3jd(YW9SnW6~AMxDo1yXD7+e4w5i~b)d1`@W1k{I^mx6(e6IHNOd)}IZ`1qJ+z`~l6zVGr_ zlWodi+E;R_^qI>IDX#LEtw{1zIBr4{gp!=cpsM9%*?{myeh(P!ZLr#bgw>T0UVHRm zjL!}rIEVEk2XzNS+gH+Ey~2Ss=^%r#prC`5?}WqNxRV6k`z)!G*^F!BmH(vpq2_OX zS`_JS0xtt>v%L{u)X9I1Df>_ROK<|#15uD(k0~d07Qs@KuTnQmEY>w6NrH~O^}FSW zTer;@+zXmZ<&AVKDPX$w^+c%#QPj)vw9ALfJmJznt4hu_NIDR?cLpJp> zWk$K7K`W{|gy!1{g!GLvd~PA%xH1*6%XxRU#U!mU!OsLX?v)f`9}c{$WK}Hnz<<4~ z3MQ}^PU$1}cDnosXbX=0=RTU7peHUqiIxbP>2X)VyJp2HRTOke!QXXjtPH6urwZtW zw9u#AxTum+SK|(ctwt#avsPUnnJ^|L{NY-orm7Y)u$~vs;LR#3yl?N7yN<19kRLw5 z*L5+7`A8D?RRr9%&u>$q0t8%^xf+18;x{hy*R1d#<12|}aJ$`hK_wB^L=-rli%^bs zyYVU)kyJ7)UvdDb$9u}yiClOL-Ys}rnYNMY$Rr@E2lqR?Y*ShvuBH^vcRJ5al~*q- zqk$j4Cm=jTg^YgmtxuS@nB0EAQfK^?d=4}FZf2RFnt%XjX{X(oZ7BfIat+Q+9?!!~Fgx+_7zwK}3|86k;PsIAc zNvM0wa4PpodCi&@d8>Umx%ZPdTMld&87m$#^%ty2y698M()HL5Bp}yv2(Pv=q&t>W zlmV`Wy7_EGMw1l$Xi1JVfLMy_%6%JD0FLvW3lTNzRcvhCAM1mCT|Sm$MWfcz4ZZwr zBgLZ$)uWi-&@Wao<6T+GHXwkiC~WY)sd6$}`g(r@=!^COSlB*RT>@-Os)el&R{IE| zg@D2|S~6#^6L(|m`TN$#ED@z-2S7ibgt_(GVEr;q-Mgt|orHYK4I4_{pwh)lZ)iFe z<0ZXL>HMNE-IZHC4S#BT7p}IC%rz!9SVpg28+LOaLcnq%c0xW;)$;bMd7b|^s{Cj7 zOmqg(#EL9Gl%gnI05=ftw9eX*G(Siy2xOBh4d>#Z)J8np!XfT2ycWp}T9yhMqY++-O3am^eOY9NC$E+gPk=@;qkG~FUuoiyc14H z=imIG#d|UlDs`ST*1s&6`c;%V$*P6Z$XUZ>sT>*oj2B3gc&xiQO^F1K$=uL) z@}Z1H#P7b0b9@B-tl7`x9hYBK&&&h%gPhbZaB-r>#kcotc$9W8X4RC1?d#O->nwCs z9GmBvNd_g%ae11c^r*nZr{qN&$WoCyC1j8sffwd624s@F_L3vh{~{dR=I};Z(cfPj zb^+##z=b#oZ`T|XJdle^9Hic@qa48I3R*`kEy6+GI;DTc^Xi)7Fyax{u6t15@DK>m z6FR%IGZ^ZG{lWbS{>!R1xCY}U!==p=n!8PwTAmbUAnpmr&$a4#gv<1s^E3nxx3|}2 z{(pL1*oQo%XUs&y9?OVZC61bkzbu8HxdgPwjAU`p!tQB;S)Veo>VHh(o$yVHR>c?j zr(8;s%58GvQQD-LngX4>(ZPegMIIuMwO2ea+um?q&*hK%x#K zGTut10V^KA;Hnp=ZrwYNC^L!$at6oDGTNA*ENi>k;suuXcLF^fhI425pqONyrS|f^ zk9M8yGbN+>oP=-fe zx)sP7MYg4ER^to(4-Bn5Jw-pyvSj)(oh_XlpqjAr^_CPr3&22FaGGkAv3dTkn!2SX z5Q~?|rSK!wcjr&pTTjVy!t>#nn=!8I1OqsEE7)~^8Mfx%B=>Zbpu1M{HqiGbrD;l} zGndAS$F6l)m8nn3f%ar(71=z4?=Rf#O)&+8xPTKGa#CNF>WBScI+S$q+7b=L=F9N#Y3Nu z8k%&ACgOq_QnoYNe-3>+ZSpXOs9s=_cR@8=U%5>AxIT-)0v#G&B&4Pchk)}*UJ{a4 z;1KbLRxHh9Zwl~m&JWrDF6^q2fDLk69o3?T6j<^>uw50K=I?r#EzK5+XCNpe=JrM` z3rDYCBBzz`EE$Xn{$>Kck>ABNU6BIk=(rztV^Ca&31n=yPw7* z@|BQuMzgd=E)6|AC6!WBp&cn&UwI$}+bg&@6^nwR1b>H4o6?J5_g6>DgKu7{ZiBms z3NiwW@98Z;``eB_O4>bFffHWv?VWJVWSRqi8I)O%;NTB{=~eap}wnQQt=wFHMF*|V|47z*$t|f{rI)w?hD9tkE=&ap|;i(t1}99 z2e%hj^OG0yo*d*)l5dC(2-@2gXoF(pBf~zuN8Ka@G{y{J#g+Uct zPG1pW)!?Tj+?eF8%w&PNOzxQ6ymJPA)S`j7x>w6fg{{4|YWC~drVp2@6-{z!%ww8+ zezC+ua%UpaLHJ^tVvot^>0pq?nMN6z!W^IwWBf2?GgSD%1Sq(KP$OC=ob07*8n175 zV`)v7RU7R;%bz-ZHmk}V+$s#*KDc$23wu|ATil{KENdFTlVcDijOGk|k^JQ^iV4WJjF*5vPK zX`C?3o*9+u*(z(FYuS5Gn%Wx}FGrP=T#ell2>*>05fabLhKhA~g?#&7n6@CbhSN4w z!ch&k_XiR2V!K$+2@G9)oF55?x7!j z@r(U8*abscj~cJ<0s)fF*AeC9V|)}5iqucNbEagIp1a@GL$sNVl_6;GnspH%!Yn6#lT_0tO@`xgoBmEe7%K?lMG+XYzuBwp|wJ7Gvm_`>qqR-JF9fvfYn; zD)4yzJWpw=5G6bE{tlO)JR)pg{(Ba{)7lHADid=x$0Ryv)ARB3TI8bMml_V5uGfhQ z^Tp`WJ&sM^PNts=+20tz)uf7^_|9>xoW3((74Y`J$S%-=KAA-a>|<&%CYBMYlZ>J0sc)&C0St@^b+Nep`yg zY8rFFfy@XYBB&?1`U?a_rbutfBZJxgXk6b7W$8uAEy~6$AL%F`=e{>QzUeFqD@S*_$XWT;%;GD(DPnV9VHP90k~TDwONr?l6TN=o z#enF<(b47V2v|Gm&umfj{Gm<035pjvJK(K*BTCX#{9a)jV|77`0qv}Q@dCIjVYY5^ zouHdgRCz8AjWy?fZ{EBH3{Y%c8wTi)qdLSOsbc3B;CWEMT^1+Aofj#wA!rOUK7s2* z2RwDX-lP!m>$hG#v3~5pIvwiggwDL|g7FV>m9~b85w64$2Ts_4h?n)j)@Bx^@m5nf zCZ3|Nfc?Pp2J## z4Mhx>VRtuP_$N4SH*%&m63&~@d>m8$c2m_6Y{#Mrb!X~5WY+xz3n=c(mr%B+$Q?@O z`P)}IC#Jzwmi@VIcQ2#ab7#wIu@R4MAu@fj2raQ{w6zGz9cU%VumqN3$Ya_d`A)6d zKqw7}5_(bvYNITO3KRmzzpD_K78S6)%>Q1fh(05Z2^sbiA6Mj@rZg9!j~+?><2R!K zEHdV1cLQ3#CqhU2dH9)u5|U_2gsh2YN4!N0dE+*?(}*ee3n89xS2Mk#@Umg&+Rc&~ z(dFy4O6rGJ`N+M9`0-mQl)Q^jB5;0TKM->*!O?+Z zBK>Bf1{a5tN3eMA1Z7b~yK3U=;hKr`@3~+mMP8=PYdq zJrkP9s`o%m@SgJ=gK6gij&mhWMIK)OOA@0b0M>3HG;S+;%)wJ1FGXbM3fwI6 z4G+en1e!60WCs5#%^bU!a{oP!6+G`p5RA@ z@{@*!UXe$J%N;_3!Pg6IoIV{Q&lvjhMwB~X${5eYZF^I|l>SlWza2Y$N(d1}Xk~)S zpeW4Jw1^*x6E{o^+*M*?(3BHg_I$-z{(jHw{I!K(50SzU?FD1t-X}%{Bqx!^%tgcJ z?}7#(J6j8Yo&N~yTWFv*n3&7>^CScY@P^{6e705$kfq4X0`^4Wq&+(0EN%isU?P^} zUhX?8q`bUw($}n%u+CswNV%l53y~v#5T%K9W3s1=f|0SB1i$-TmzbFCCj^Nxgkn08 zD2BC`X{Sjy@r<_7D*PE)l;;!Fq9)?u2H%ZhYQ`RSD&v-OF!H{86U~v9HN7?FbmEu1 zN}(rpw}YI7?R}NA!KLbyR^oGra*Pt4 zJhfa9gXGhXRR9_fslP`Of{^Wo>XQ;BGm3z!K}7J}cM?pO3~?b)d=_YqNlWb~@p666 zhh~g}f^3vr*eSeNBojOxXt6qCpYScIm!%R27pmq;^9J{@o+MSJQY@BDF!x;HHzZM+lq$K zCKib2)v;XzhV&smotF4t+uI#PMDIsUncc`g1IXW!5^x=!{ISfP)+moZtO;UkX{D~t zQd7P>_gF4BNFF{zTLG(O^ki~;!f$AQc31bXstCSkD0Z;?&MA|RlZn#$2fQw8hHUp- zw3hAI?Io&LqT{SV_h1qzri9K64_cgphOq^*|KU$9R-C_hROw}4A3tm41WKeE1+}{8 zvABujdd#@47n4Br9U=6Z?t>xgwnh!?c2J|K-r|6S9GOXwZRpkrFW=zHQ;~jG`BCIAxMshPbL;o7{4m528a}7UcYMg> zKYYJ;JVESi=+t1=IuT7)>VXu3NJK?EJi;Q+0p9Kw5K~5D=!pWX*+7z9MK}gXF1l-? zlM_I(2F{kr94=`nBsZ4{38`K)C;No4QtJ5AHm#k{0`IQPM^Z{G^2An2!mmI>`|IE2 zoKD2_bVBM5b*H%`Yj_&Ix{_vlL>b{4FPuGikqWtia}vnL1Fk681PHe+xe z_Tnr=3ZRmy-y1vr3M^xeuUr#9`0cu-;+Ub|?|`$VDdvw}PXw*5vp`Gr3J`ms#y3oN zZ+fRk#rk0t<%dmKQBv)-8KIXi{g2srz1y4ve;ICiw<6v3b3tq4_Y9t?`&*<0SR<7n z;!DD3gnnMk@{6S;Ex(0mgc|aNR|3a&YM6+?W4W5Z`aorZ;CgXLBdNH_I56!~D>cqm z3?4xd{_c4X_2_#r4vzdwVNa z#;s&8K{@_A$DJcyi#f z7f??A;rOEq2`(a8>%+N^GgAXC-WHci^v3XKJEaaqRkhQYU7=oAQ)yFzz9vad0_baq zaG^r$biQ8$qDIwyPPqx;=TV-XB>`AH+Dk0yVpN#bL$}L0mB_g%xAB{dwkYeDZA}9| z?@prkLy?6UU_+V_$YqJk28~FopG@F5l34W+l}FN>YdsPa#ej#^5`SaeZ#YW3sX7)K z;1rf1&?7KTITGUoXmc0Ef?khA}qrEQ+yHB_;a1@e%@f>B<5A2amGTqG^|k0 zQ%oFvZ{SBtldYwPLWZa^KQa@Nl$l4xTJoY6?OrvTItl}6WHiWDbQ>ZHWjO@xkO)gB zjx2a%;c!~~XEbNzUG^K+!K&VuN5-I3dtZh zY`H)zOv!k+L}_Tnh!g8;Eu#jjY5j&21phz^W^RZRaFkK0JbnMqDDUY(Iq|x2sNY|oW z-taXjYiB!y@S9Z~{_J~fok~x+C!PNI^Qt=!YzC4Ok(XP(B%9NoZ1ur$zvBA6i!VFz zYJkfgKA{Xsv@!5qOye9-oM$9kS0I6#I@E3t52?i+*$v}zkjL{l5vE0*C#a&h)03x$ z%Fw?zfo|qdVUrh@GJ#RjnrRl%+98HsMkh%^4o$A-^AOWC3paDzgFepWp+IMX(N&^1 z?$@hV3iFvvR1-WLR(2Ip99$SSz)$)9oK`_4W`i6=Ck$Cda>D4 zRg>r^m_AZQQMlw(^}digq_IJz`bV(+QnYGR#;LEtkS+wx6>TX(GZuh-oP&D*Aj&$` z0Q)^!(}4Hdov+wSx{pjFGs@Yhss*x>=2YOH#;P#GQybZkHwvr(p`mm%TD2pPs_wM! zswCdJs-;>Qy^Kk^JA>NGk4N$2#kB$5p#R8hLf7oS&{s;jNkxGWwx}JeXYIyx>|_Z++zc!s zxOJe|LF+R2Ppo(x|K;RMjQ`8YN6|ql0_S6NQSOXL2qXIkC>rl3p!K%wkIoZFS8Pf$eoAxsV-^2XRLf>1Xm+0(!l^2pqQ0c(=Goxc8MYdx|*1xO$jZ>an*Ph8=0x} zFxhC(aaD`bVW%r73)&1xhG;H(6E>_Bt2PeFkje&6v=2*NUNRJ#JM{G1)e<)5iwLcd zx!AiMXzpd2^3b6cnFbYB_aC^s-Ii?(KW)WfJA(%<7nW;Q+-aO6k4LO1mqt6RO3Neg zFnNPlP4JN4HRcE2uzC#U#c(ZPuU78Nl}8P-bluh1|ZB-@Qf zd`pJ>?NRV>g#wrzA)`c2t!>~8U5yyb_2()(<%lE+GxYubmpRH5i^Vj0+uc<&mpho8 zMFPFC0MEc%A^9C>)Pn?IaSMAZX=e%(vEoA5PJeZ4@|IBa-RpvfWXW)k!4_^6YZDVE zabdC!558@bugw^>Tp=4`%x>CT! z(?oIK(`gZ#aU|aEGS&XY`e`S)NVa=CQqvC^Sl&T7V7c+;lYkr!M{MldI?rvac%B3j z(XF(hc_E#nxM4qHyk;Q@eGMLSu&I>F5~r3`k-!M9n$6}CAx4-|xwnUmNPrUs8%*+EpMd zswXGKPErH3;k;MAY5Y}C(-7Ig)nb+NPJeHTqE{u9IiH4q>|8F?Uxr_nF2Dp)|Toy|{H5#}+LMTsg0H+?Fnf_Luh z{o{+X$(AZF{w5PG;`*>aw5>?xZ7=NCmUpP6-Nq+uD-2Q0HT(K0NmAdLLg&*qbKU^@ z;C}$REG4|#BcGSq|Nb1ZVP`rwVpvJ9PS(IhML6f3mxAa!M%mjM;BxJE?r%%?H7x`K z)P$zfc|I69ISZRzJA^>C2w z=Ak0!0^-Vb#z{oadlC2yqouDJaCk2HA)6jjsvv}S@taRb@OYJ|eJ=tFmt%c(r11NR z7$?OsX$BG!%pakA# zxt-(bl0VaXrn&5m2MG8V%M_)UgnOP&)T;AAR@WpkCT&IyQdA4OZ%Y=_k4ReW?C!i6 z2rSmTI$ujT03ESUbpKPyC{`tbXg~+~<)S~0Fn$=bWzna0DmK{tA%YOyFZj))%lG0B zdTfC8ROx%*u!#V&_%=qfXHIUt z!DXc(K}x#XeN2}Y-rWU>{)7-?L0PWr9fy?zJe`U_k){`h-&BT7BfY~k;+5M6#Ayu~ z_|Air#s|I>I6uF{%5*1GT%TE-!LMq!Pg|s9JGAecaGQ*~I%Wlpf2t&Ss)mxMoSv)G zf&NQ-%QS&J2`4x9c?}O%s5#8jmsEf*iZN5*Mu(p~6meLaXuf0_Jva3#jC zk5%??iM*1KqpQguP-M$3b7OwyvnG#-W_GW{7A1n?k5YbTieNXu%!2)R)r|~a3o6o= zj$-43hsq?^M}t=Q9cnB$dgWcKZ#NG^`pw)4;qBaw|MT35aDg`zGBSK@u~GhXm!yHQ zi&;(AL8c5b2wCw~!?J-a2WawtF=TT4{Kx>OwT2`V--d#sJno~}5uDwnZy0E~zhO3b zE@G2OxQ$z^P3us+Pg}TuhmEr-7-X+6KKw$Dav|{gOs;*xKmYZ;Yr5MW z!UPOPD!+|o#^CW;Ns=ftOR07349w(PC>iut%_Tjfsp>4G*}5>M`O=gFvq=|@F$!>MyMO+J^c#Y>nVA76(;BB+-BYQH9Ti&^g2cB#ck?6Bjni<|{^aDsEK`(T}=^&EPNcAs-wwC;v!km7HoPWux zz(3an3_gQZ&{2KE@t(lzUXqdegm;KY zDqmoSyuVV7c*-IappTFZXf$(D^gX?>XYmKV{F1>>V*VbHqlLdt5gC_?!FnGIb(C&b zf_STYD3p7LaRFw%h0biT{WCD#^ds030qt8@vz5BmU7p)pYZlb67Z zlNof}tX_vR38Ny)Pwy2bv;Ec~bzS}2LWs_sG_F3M$Y3&)(Z{6<_V;JL{>FMO*o4zx z+ucbljo50vi4i@~{dn=Qu||wIar1FdnY_Gyw(tN?vX04olNSF{4pn;8z{HUpS6cj= zvHTSdME}NYnQq60Z=2qodR=~QUN^4IWd1k%wEIiL>a7!(6PF#k4BE?>$(zr%d*22m z_nTH1ho=kZy^fc(evnsh)@gn^NW0xj_7GxJ>TqoQfyhzb7=S%}gur^Q=i8NSowukY`ojF{0x z`4~jo7$j7%Tx4VpEB$-)AbZ(JrPQH)B=IG|55H>$PBb=sTVF;5TP#eiKtwuFnuxp%Vr<%(c9Iu>~_F;!+t_tCWjc(&)tQ#y zOBUGv#X{974~3)_Yb-p<_ZXc(!xAz~wJ2CNyq`RcMySux)8}7n=_TKJ$ z&biP1v;67DyWTnHm}87N*G>P%jksjf>B*Y;!JIAh4*4fezIOBnI9?hzjik|ZpnGsj6=)TNR(v>r3v{(jHNuUOmfJ2pwWdi z=uHUE*q@2jgu#OEhE9>U`KO)rN5$cxgucr|;RrpLam@WdWpSB_qV72hu{hi74UbHK zfHK^0u{iK&GoW+l$V52wdnRu~fq9Jw;lvwb9`J6?mmDz=Q@C}+>YahVS+Dri%I0hz zVxe`=$5($^BT*o)69IqYO}j*vJ828izKLkdf_pEw%X#QF?%Ad+3e%)9OiyBe1m?kg zI8kIqPR;=GV=}RuD=(Rofa^?v)%*yf+UHWqBf;g>zz~}TcG@VrVRW(0Ni{2`NcLH6 z1<#s$zXL9An(#(Wa`U_BGsy_v0#|ev0HZ$+<3~SsQ+1#+eRex}C7yz0Hen9-KXAf32;fyD5J5JGj$s&`w->82zI5rChlc^cyJ;=`T93kn zH29U&|K4H3o<5S4jPhgChSWkgg5~SzCHTvmX@!e1y-!P=CyU;uv$#3D;7ek~orWCr zw9$8Q?j)#&WYpqy@>9ZX@?AZezqaVw8Sg2je&L9A>V49}ogXpv&82KF{@IDbG!vD= ze09}>qo^gaGGt(37=VGs#D-;QoQGp5FutY0p6U_fz&x_6I^uKsLg*0dT;i`sb=fGu4c;%eqXB zn#qyAIY2n_NQ?`KMCZ*kB(e<2{K!1|&gA&O+Bk>*C|xK$7mK1bATUC>bO?dQ;sRkj zL_h7aa6BNWVtr53tYWWiKY~>EcU~>!DK_>|#ZW^7l6?`B5Kqhr%LcrVfqc#Jfg=A0 z`rJ1-86v2#G=Hij%U@Me4*F(&aR3%O|FojoGCKY<=NC5I!~t&$E@ET>FGbfV=G*1t z21(hF?9J<@liY@@B$+eU26g^#j+!7M>^K3}>waTWaP;%76OT+InV#pZp@1+(e(6G`A)tvAt6NgQ{P8yc>W^XBj=sV5p% zsKOH5LXN%OKnNoHl48Hid8be!>j5RVXgzu501nl0`3Tu%k+L|Te><7}A(UbK88%3GXdwS~cME z(kXcu+IH%FzTUIkydu)mi5L5f9rgJskl<{wJG`%X;W}zpEf`?g2jhFUS{YDi>LdE- zEbnSK;(ZRHo%pEa4hUE#V?GDR7&kxV!KA3S1ITZ}U-54|Qv7lOTONSxX5v|MyPE|a zLKLH%z4+()VOp9(nozb)B0YQ+^tU6|zTpuQYnm+&%PTa&C`Mij3Qk$6N{Z3154Kxv z;=T+NJP)cc=VQ&4+504A?E8|)L(4+`haXmbXI0WI#C2PN@v_OTXdjc+905W}H1A6G-=(IKXOJWvdH}y=LZJv+ znm{ivml1kFriO79M{rVZV(`mYJ0)2uNHMJ}StD zov$YFs*b&09{t8=2dxUX1tkLXK(ZDb>xdn8zjvwC6H05a>&8{; zyfAz|tUxC7o0C*V2f97x+ear|`f!q@&GCS*`nR#q4rLbeBU-ww{*K9NPW|7|(Kj)S z(v%_nO9$%zC~tsg@9lmrv~>GV?JKBv_8Cz`E~4;;jFPr{r5GnP#+z%?l7i7#sa)d`p6d>`Zk`sYHV~HG(s^~+A<%>UHsqF_z?l`VYmx0emGGtyiK_Kf>nX8d+R`Z{i0v13FtSY6)M1T|0SO4&<8o1jZZC%15@#e{H*99UL zM#!Rg9{n)J$%s|k&^qt5Q8Ukw#H7%|^j4MKr~L)R+4QFrfKj;+_>cbZTgZ$X!RiZ@ z7|Ej9K ztzt10?P$)uE4o;Qv*;s|*~u8YUXlUOXa4Pdda2% zz)dMFeBt~FR+(o!`BRH_ljAGu?keoD?+Q!`oIai>7jU;~g}ZBQDWBa2DP8z<0e!fS z$m`aYr0nd+ah3P@cC zmK@fx=ASMy?L}C-ym%e8pKf8?HtP<}Hwdb&V#A;BE6yhPlYI`L0upwQ!+M|Z?sYb~ za4R#+TP8#ml_Dnp$x@Ahe!OZvw$CAqIauYPaNDR?e6@>cXBNbHx@b&U?_zR$L$OWj zo+0l<=q60<%FpO83#vdJQ2z`0eQ~KyKECM{ikf{6k6Ls1Bd_>@>kLbeL^A|c5$XW&GYs`_2iEaIVfDV%^mgVW0j=jI*-i4X>@dLn}q>U16Tf3WrI3s z%n!qDzm1h_cI1$vV{oPhG)P93>STI}&CkigVH?h6HvrZu40Xp5??2Wm z#7w|nb?{U3Mo160we1o+n3`AK6&JZgR*!!9_l6V>?@CfTR2I3x$w{!&hk#EfCrs+P@4ZF*N6i{a5o-OWugP3^ z+~tU(mvhvdiy*Vicszl`3i7$6{Y?Ar5?s>k#RE}y$+|a)0!eQff%1v3NKpFv5B?BU z1TZj2o_5fWnyKo}c6f`{Zb!Xq@P9cZ!!|BJx(U-CBkJw74SwvOoYW?kg}t1CDss z*jNa=o_qdi+@EVx@b|S5tG{KCBZ$wV;wMkccqUn-HLzLgE_?4*WA-Y7^#qbKWOzxq zK8BVr?)!dkDN^UWy2twg<*1o0dkUcrX~b>vsx!3Rx-}Y3OP=(yvdE@cdI9y55+QmY3AmS*q zemSy9o%0@n`(Cpr9%evL<>I7;7{}LkoY4CdWCsBLh$ToE%a0J`E|AFl2yUYd1teD5 zl|6bRU6Ralc;;A@-1)-w=~gyXZNR*0h~oWLF^`WWWr^$u6;Ui%-nRGi!G0Z^N!zTL z27!Ru2dB@}v};(BEVkbq{0vL0=UhO)e}nRXtDDW-^DjO01?K;>|3s$e?xT{E0Nf}D z;Fo<6tt1B+r|4QIA2{34m{K~3|J#H8h7cP0w z0x^v?ySB0d?XS{#IyFr^s|q4aKd{eA&%di}8n#jGib$fHsMK&RzGa2GPMII8QiAMy zy8W=O1D9a(GvDwH!5@}BeN((8=A?zaiB)P~(c0*BL zuq!(?ii}uCH^uoQym~hUEQKGtQI&%Z172NmR8w(3%DW1|LtN6R8@XY!CT9^`id>U~sJ72)6_M*?6mc@H*bF+K)u`=esJtT2cZad~ zlT~W_jaolEMYB^MJR}b9xy37LE)cu$Bo);WbuyzWU_Ny z0G6%qq`&mbqf+T4uZ^E|*0vkc)3>V=RI9K0q)3uu<*g(?ARor_2}O1)r(13V{f4DX z0Tl=nzy@3hoWV1{@nNyKsb8axB_8nO4CA-Vk-%*3OpM#%?gz4Q*ZqPaAMoE086y%9 zb6v-a?AzlN?$K*?!k{o3deFnNCu89)lhVa+#u{Z9PNhcqnWSTC|7#(fhx10fui`kA>2iN;`{7;grnXmAL{M)&PI5x26DX#k*@FEP|C< z?ob%IJHc(;!7NZEMoD<55_tfpQAt5^YUDfSz;ysie`sW3gf!qOWFeMYaG-5WX+E6) zAxJiLs0ViHheToX+x@$TRKH(SIPF!c)Exj4Wbf7l3dvti^53)&hT>SfqfxyFv5^<& zc8Grc-+HM`L%*8EQDB?Ze{gBCIA{>OE6oQ9EkgtB{Ff zp2dPPPt0@onW|A|TAaL1*&!*ZF!o?twvGlkKl6WClK(5*;jq*6CaGVpXUpH$lmBq* z-qpP%WbvACV>LCV)gBEkkpAIK59fhxyM_CWKWm;{k=h|Q`Dw)}*V`|6_8%3BK}G(D{I4M`8x=}a zEX3SnylvBRyR3j>LYK;|Y5tP@nGPmop%KB64@ESj;7R8_2`;3z&F_Ikl1(u>cBP4R zA$f&UWUjviTmt(ONIU#4)Rpn_6POO zAbTlr*Go~J8Gn+s5DP&ev?fw=4s$_fUC*t)x2Qn!EE!a`Are#xH9;(y6StGbpjx|< z*&N{LnRCYZFf%FXyp)oFHNQ?(!NMHXJxA(AURGJ1nB4SQpUM7-lHeSF?EXoElJGv_ zq9jyeIccNKgf!cqsdZ|eqb8Zddgs+_7TQAR;7_FuHO5`CD$#wlBm9o#utubkBE>>fXMgesbJJ zdC)?21ytH~?d^gYPEx~XLcYg$y_iZB#N)0it6{m?bI+O@^Y+oghWl{@c~h>K=8U1h zy9(j^mpem|`hNv`m7YA!IjmyGqI>x~nWiers)cDeP|IYT;+C95O(dMKk?RTrO`(3o z=7LnUk*70QcQ-}r3t@V5eZDU0ZbM$QS|p#Hc`IhPtzS)l6P#g04ki$Lk|r*iyva*( z`0V>T;pm*zUU9SWii@PHm12pVc1%_&!P-6(q(F-C&{ey%*^&9-ulSLCN9 z6NkD!>1~eBTT>t3*6M@%MF3apx@X?Ty-on_GMlM(b(87lf03`Q}h=t16;}>Y$fgQ?`TX& zq5myo1_2o}toDF}>%$Y2i~Ef%b&Or>EBjBH4n3gEGVYvX6A5yLn6M84{=M7&n17F02wB>8Tx$~JdiY~1V(L5vxbae?>EuB>pV|JGaF@3!gjMDt z-Ok(JV7!t07EYew--|baA(`2~#+=5t%P0q2zLkL$n)gEQ0QUB^IFu8R)QA(fmHYn` zAnD1k(9+Cl(Y<*(XFDSTy=DRt~&x8uao8*t@GF0N@<65vc^0HO*j$QZpn3tZ(n_nP;GBFR5Ly8qJlX|^tfV_ zGeTuoF{zfFFEdnGy)o>ri0XBeTpoNTU)}hbXijaZmZj?w?+Va7{u${n^RXDR1cf4h z+H3!>?;!odx&%G7WkZ+AkbT|F!gJ$m`Jo8xB%aNU437)?5$db^TuB?!291z=DsrAa zT~+V8GTLicnmiKs#M8c6`sS#w>n|nl#d{SW8u&FI?G$Ig&B!4D1^c zTyC|1av(*awlf%q4X3cvRS%#@o<(t=OjHn@;_~}o(Da^X zZTkjU3g*1e2WFW1=vcy;>~HK4()*#q2z0GpsUlk*P1>Nu>s9_6Mt1!rp= zzOApUP=O>mLla-<9!wsECBcaS@6JuT)So@h*teeZBpQ};%>XIbn)Zu><^6P_Yc+X2 z1M`Q>F3C3NWvilJ=`ZR@%-@U_1UD9Nu5ha0m!|s-;2Zvzm$GPb=y)Sg%v0%%s+o4b z%CU`F2G>yZ8{>QgZ3KJgyv?#Xi^5wKu`jmkoN(a}CwI=;vRTa>>g*bdjn+xbF(ew! zE3S%EawCHs^vR}IrtJF!ksD!)KeGiWi7DfT%I>=)hKrYOu~rv|xZuS+w?Vruou=M6 zQ(CP?!Mi;<3|WGzqQ@@5!kf8;{L@j4NJ#ei9o{@kT(;9KCZL1j)@Uj#+yT@pnUegv zzFMWRQ2i6TA1VCbV50vYMFAyT9*tGAYBT5UDaI$5$f!wcero#;(Su3-?N#q zPP3T6ooLFhR$h>N%vmR_2vbBa9RMK}^3axE|Do$RFuZVTh1`HAB=7A@WB*UNCo3%?b8Y z)@xhK=+WU8IKT}W{crL6-*&Civd(^;_MiBYif`Rz5*(s;ytlTYvuL4&X)l7qof6qG z<>dY2_7$dGXhJgIbk3~S9%t=-HHF)OtcDjvU`3zI7TY77FHGosmK74g(M=_|^&6Nu z6~=6{V&zSDRS4F#$6OdU58nbmmECqZ$~;bNfy0o@rtyvX8}r+T&w)iAv9+H*OP__@ z4X8Lb;X<%taU&F{0RqU4+40m1ho(0}p9_sh5bQ1^!$*P)zAFsblzjtLN-;t@7a6gy z*4z&q^p-FC`%iW&UQQ*!mNXigqlQje{u)k z-?`)P+O_DPy8!+lSsHxx(BX+wdrt+-&1u)Ec7?2kJR}U7S*5Hk<&Cyl1@kge^WWGFl*_^}~qroW&JC>|tMkq^#BaqmMEy9n$PT6#oM~j@J&7 zMtuaa{xlN&8g z&WV~^I}pLkapB^k|L{X9K>j30H@-ohLFZDoaKD0D{tAKLE`L=UxWBAeESHlnT|Qvu z_y-gNNU8t1OT~Bqc_K$^VAmh(pbZ@qXO=*&%7fOFpmWwZ5mMjPt9-RAu&t@U?d-)X z)1Z;|>es_|Ip5+g6S$&pUQFw z5$j=|uO`jPrVT9%l2D0>K8b+9PkR=mnjBEy5L~TdifES^M!y_K&0G6_b)E464i+F! z{zKCLe;uo?xCzo@vh=|nQ8`jxH>s_#Jhmz5yTyuza>@cP%aP5|PvJhGO=ao zH&DO#jgP##lMkwo(J#O&P+w^~k`}qrm9Tog&E`HEOp!M@>jmV>bg#}NK8Z|zp*?1~ zZnNz@jIF8hYR&7jTO2MjgW=(zN?Xc#U?;oZxj0Vd9Ip%MZB0zpR3&bS3D;^2lGA9m% zzk$kpWrlhb;N#~~a^av`ok@;ZGJT5+u8}+9dxFzOoxOC0gjUg0ak*`oH!i(qFa69W zpSJ;tkU;Z+3W$yYI2j#ap5Vq;>fa#vrLRzT40@3_nEsMCUe|+{TRSguL)@<~$Ld+A z_iba(n<9HfRjFYe14+}$E)p8ilGkqS}<_F64M-b*-~!Bp5cA0Z}u%-a@9 z?>xp9T`EcRG2QsE=kmPOOukkxI6btpsNf?IOSY;6lFxhpjCR?B6K0FMJCH-z0D)b9eTYVT82fEdqFqe+g!`QL zZI!HJez?I;mTg5YJg2>?(Y{mg<>dObB~SRzRcTNm&djiKqW#+PLRE%ps!YxP!K$nt zVb!{;aJv|4>+i#DirT})Qi5NtxE4Ga`NJHBrZS(l(2MRm062im7;A<6=QR-c3bveZ z`ykXF3(l3T?_&8t$a+`qgj|rIZN-zPE;Q}Px-V61mFH~qMyJIH<>f$yDB7s(hZjeh z!+7DCQ&>etI9cWhOWPd2QyzSQ*2aIA$N#+~!dvk$5+f*y8Q&Zc#kb19NnD5&AaB-FDq%ejcFS*XOuQ(bjVP7lNO6l$KcSi{L9;7%pIY7F?ahf9owJq^EX`M0 zEBVeqS7fZToLq(}tt?o&tXQ&(uAQk|Q491^0MWMxAfqlK-Iw0{g+kI}e2Q@T5F59B zbre6mC_vhYro*U-`QnMHM12{m`KSKFG#_e+#jz3{{#cA5w?u7TMfo$=u~h5VFEkB# zkiT1w;+5n0b|^QY+tU#alI#43isthmB^d5$34??utAsP}gX3PC{#$D6E565uR$5u7 z`EKgA^qu$;hHRvF_}#rKb2;H!c_jyfA)wWT2kW5G5?CD`Ba8P`SsPhn_d#-OZ1DcB z=WAX-3l=B5@v~6f+Oqq$;B@U&`k+8=_P2tyTmWa;Vl2y0v5%Iu_ZjcyOxWTn=?4+N zBy|>l$1tYVlZX=x+xnELcS=8ezj94?MOyN`rm38C^R(!0YVWo~6F3G(HLN^#fgFml zJqlp7{5(>_f#Lw6`JW6_7Ny?6BXTjBe|Iz4HTWS}&wETzQ@d)-u{{0yEm{!yTexv) z$gW7^yk66?qy99>Y|dFh@z-*b5q_K5lg}DaU^UVp>M@7=*T@i)U;a0^J_DN&bKtTY zvGBaW6c=5QioPy>$~9yVxEVxHZvLJc>&i4!KvTWYY(J@+s}fWg-cNyL5m!7UD?yI- zLD@B%s=PSTmqhz^Ak+At7G_nT3v&@tI|BMaoS?WlW-qZk5}ezq@V=Jp8ge((N1wGO zr`>2%>ie?Vb*{aB$71+*#@mh2hNc+Y12U~)Bw7vdYBHw0+jQ5A!(Z4-EmIMVXOFnu zgz7`{806F!m-kllK2LQY#86cg6}#2W;Wez)n10WB#eq>c*1OwcKWJ)+A-zohIZAx_ z`xacUDCcRQ#8n3r3+VaYc=3B9THqWN6P`7Xy$_)?ryMf=@qvEm%FIz=8iFW);)TtV zWqhh0hP3vbRlQQ%>5>0z819797bPIge;Q~8CXk=X6nn2e{ek&*d2qnsDYasBczgP@ zesAnp>#M9R05_>2HL2azS+iYF4~G2uSy3G!)qgIO7Q5a3oRK9DpI^R@HorL*dmJt9 z9xF_$E-)Hw1fSoOuU7g;BE9+#LGR->r1hJz-QUu(vV9#Lenu=fbSzYD!RM8H8Fo)@^~3R2GZIRN<{?3jE^;iHTyX%PR|5 z5sa=M!G&CD!J%564WU`symIy1{v{JGDNql`kX;KCT5WB?MjsnbC(qx$eMqhDU`pw& z`Z_mNnM^-f>O0Gvzb*Kgdv5o}>AOeY_xj@Ao;u9=ALXJQcxi3f*e{e0G;U(3VTZL@B|r)6EyzsCh3LwC%>p%zX7A zJcskdNp`)$LEHymkjfWga#a)Z53J43BG+?1jvh{pqmuQ6G!Nu`hxk!b9^l6%T{`zZ zN2@~udLeV{yF+#sP}+jqS_XXpP-L2{R!ogVhQq&LNZZI@sQ;-hX8%`pk@q8ufF77o zhSzFf(GY6F7&S@Z=kL};EX&AveLExMQtRO+UOa1*hW$Cj<#Ff}6%|%&aOW?y@J{l? zgAQ5};8)qs1mu)F?v2rLc~V+T#E7=AA*{Q00h4-!zkNu|o1D(MaBi;(vYbRT>tG7e zy^=DTBvrUiL(iM)!jPWqVA!1RMW`2In_o}K`yg&{S9t0kF(0a*ic5R~9Nr>)B8CMk-1-(}B?tCpuj&&D1XYhf0B z(R3D!7Sx4l!DAqAO_B{Peq;RlwDAuQMJ3jsij*oP(vt86zLx2Ak7p$KI9=tB z3cl1Kk{y*hfa+^qvvB)E7F!nJ0kn~L%Z447P+Nq1ud#iAH+2I3wIlM(2GS2vyED^k z*}h~3nVw6n1SbLK?{d4MqzVyCs6uT_kJ#=> zvi*Ey4ZijN(n{wEi)Ag$nhYKuQkjY@25~gKV`#?HvE4{oY!GchTz7D&Dv# zvb792EOcyeBKAwCrvxD>ebXT$=bQEt{Z+uA6ZIZ@P8$w;nE34y z(8cL}bgYT{_>%1s%&1|pg_>6G7?WLfkNB=kqZqGsfJwMUaj=ICG8l5 zahtLj@Z%)ZJmq+o?SV7?{1ww+>QZ)c;|2Fb z`_izpQt}m`)Cy_~nsjyq*m->0tPt)K9f^WgU6VTQO3!)}$mT57wq*$nuu8CTTAY(vDL zl7yr2$bDchO^P?iNh5NT_cCkk ziDt-P`@^y7zjk00WaIbuTJa?GX>t{4j;X z#YEPC(7Hp7Om7P!C7c1k)vqK(=8*o>yRlA6y%Zs@uLkk%&o`e}ZodmMd4EBtFDAO- z+C6T1J#Fl~6N&tF!X=ag{Y`W_1b^gdAk1bex)*zeMmSzTizBTUW|dp4Xe%4aIEV;X zTiKu%*6U8&>8C1l{bN zJT9g@ePyF_5ood_%E?=|b3>>mCKIASevQa!h6tIfAk5jYP!o(9>?y+-i}1iT>tU$g zNR+ErIR1{g2aGleDx@?v16XYRSLIX?RC2a@ppICD`YR-RGfP&Jd$?}O0x+K;-HIXUW*?v$qApJUp8aT0`azG zv2$Y$xYUSL|Iug7VSH<(%HHt(?5^wiR3&qkfrb2gSL4k+08IhwDCdWlM^!FhfZLMg zy=u-hykWqZQP$}0JLegn4Abw^y}}V{qYn47FxDs1T9Ey2!xVOqpB|FJVNn~Oh!Gq6 zO?%uzWl1@|b!`3lcDxF!`9#lDLTqbp%GlFd4p2VvXsC7c#?@z^ z!!-oYa>u(JQvo}#iX@+d1J1!5V4ceC&ukCPe;D^#fhgG-NlRLwSmwFfzJa?ub9w_6 zR5iMG_svPt3;CB`L|+hf%eGdEJx8*qLX+1)IJuhSu+#g)ZG>+~wPq(!W0NjiV^!Ti zX8S&ShH2-OQR^;xwkvV_X93{!Marco%}dq;q>m>X#k>zMLjzeHbOef$Ep&|pDQ{ku zGWayIcR)RXBt?oz&bW7v2%?W-ZH2^7%)Bu7r@MHZOq?_M1gay?p$GW8*&9i$w@%0{ z$d-!2=gIhO^eD?%W$g1Sd^y;i8m$&8FO^@#W-skqscb-)EA%L=q-ha#9AsE#>lUZ# zSm2?wpqMoCrih8lcfqeM(tPCN$>6BU9~Ujhd@*HI)DU6LA?WNK zsN8gKm|@KRVSJNZ-M8YRgC->$()6to+>WZ{Tksv}{)(>OdAJ=kJ{@n?bf{>^)%(4g z6n?7$%>=ic`&ax{dETxYs%C}vPo(SPNSM#qHtGSG5CCsv*7&tGsKavLh*9h3_bE4vXrW>u_sNz< z#5MF{Xq+(Ill0TcPz@?Qfp!A4CYnF-7;>g>h4M{llpPjv+pQOCD(3aNMG6kk7! zf45QBTHwqr(j@8_FvU3O7#URRRF+QjHIz-89x}-10z2_r{ZLWG3f54mm^LmBl`@|6 zIP4~`y4$Op`o@fekxA4~_{gBx{g_?Y_!FU&>^lx+g{!juKy*>A6vS}$#J~q^#E@S| zS~hB__#!mhs(*gQ))eNCBAoGi#IjCF)h-UlO)D$>o=We-Gn@^5A_mE0%jFpHUrq|+ z5vXc1pG*YILp=eNb~IqmxybuZE*djHW!mD0X(pS^;|uT{{SsuN_1vY>Ouo3Nmi#{9 zw(xcPKHohDH}!DZQ%nO}ZN)6j{>?`{5eKk#H?Zvi`4_0NLvV$F2E$(9>Y;H6cgOIFA8G6L?oVeihI^s407IsUUl zJC;Rrbn`0FrlTrq^j~pV4820V6F1R+pU_a~VTPrLjkp5J2RdRh{Tm2FU_+mG>;A?J z_-teZ%h&eIvamBOb>7HuSu3)SMxT^=&vBz3*ekI2`u6EmAj+M3zU#~D{Ru1W%YJbo z(Ce{o5iE>WjKT^<%cO6wnw1i#6o4hhh&nGSRnE&^O67c+7n9cRTd5y_94=)Ilk*KQ z+yt&zg`!U{_-#{M9*C6&+{YVDZY8X~$0yK#k9NK_)Xsv_l^2@NN@_U5JE$L?VK&O3 zlKEPUyt)l;(0QxnD7gpoci9qpnHCRU>XR7X6eM$}6tfBPfwO3WwH3c|vaPeW$PVWt zA9G2stifhK!C)9)^;v1`x!AsY|AvihP$P%r^(K)ZO#%5>1PNqsyFoEC_%NupP@4Aw z0gaKLy0IYI*ec+0flH;Ubh{GY!gOf%zEGWbh&(gpkoIPxnZvc5xa{2XQ`B~&j-UcB z0o;7qMEU1OR+(e{gA!o#vplW?FcISGJ)y4&{|E9EcM|LE4CFKhe}{89=t%1a^y*g5 z+YeKugnKb~Fka{gb=Dsgm`F0|icA%pxE&F028jrp#R#$QEbz#HdRkxpoMU8s#x8!E z{0ag+?pB!T^>LwchRGjqzr4zS&ngb$)DRUHARAmj0dquPM` z?PKQqqg6oC`7~GE0%WF1Km8uVxwUeedE)zAX3rhMZp!KE6V6ZWezsn1!=@I4X8apW zDbJ!93L{hTn!J@&#mTk|39t=$7DA%EaUPGtC64<-9Ii+pyTCPE5N@KO72x*HR1l86 z!9FY*GDpR?nc0*4DlkFh-LIU-X5x9SMb3c0{MIXrx|!R3uQco-GO^BZ$!Ut`BI#6H z41o0NW_b^2&u~E$%Hf?a;&!L7+fgm1uXj3YbHGK`ZXVS}efKj)U(M%(+RL%H?_@TM zeNK|r({BSZTYQdeHpEB)%c~|?eL$A>2Z|p+e947+RH$NES`$NRp*-4o9@l?Lz4Ug6 zfbeB^XM3vw1!0wu{zB+8|J%6vuM!Fdc257hgw|Kex(k0^F>yawN)rrtG~3lgO-^TO zTqSIUpyIiY@wivHKIrN_o@4f*VCRf^XUFeqrD58O7G})5ZtT--&JfLR!Vfy71hb2% zWX;;}^JdbfbzW_wiWNstg*l{$m=!6GNV>W*gA?~xj`aNOl`Hmm^KvdHzv7!;H%Pwu;3P@M^=Ps*^bQjQKalY6;*@*qj(iP%xNufDi;FC zpqi!Z!DviHW*n2Q`Y)CXrU%?fHwD-Pe9vk-9Gs*YDMFklyA0)N+pol>joX;BBbTbe ziZ-9F#dV+&B`Vxqg#oQri7Rnd&5+X4iX8G(UeQY35#|6CR)z=6GyaOl%?l2D_acv( zg?PLmmw&7l`S-Dh{>QO9%03wIQ;{v#iQG;5k&nKGVF_|vGRz55E_+*;@#W{;V{+E+& z-8OVxR2!63s1&^J6g@55x{Rfs8qrikV=u>H*PD%CJA;EM7xJ0)$)CK2MNOqgJ{7WSta(~thU@Z$+(fqpuPjG!@`ZZ zr_fR@UD+@~q2!`@CY!KK79~5^wan3R2hGfC_w4uU?IOFin+zyS;&Q0Lcs9Tm19B)f zePAPN(yM$V9OplvGcZY}#pW>{pRles>#FZs?jfCFtEtDtivs@^EJ3$}1ld(WwmgFf zJutH&WVf6bPG8=|O@LZc_nea@0GPK7iHArPmNycARX6;Domc%IiUJC-VEx}kAr32u zT<^^AKEmfSYBzUm$fMd8P(aS(=r9RP22KmXBtDWyl4N) zhucPu=OSLu75>}k60g#=4ktws9yy96<0MF9Q@&0D68YJrITo&uCM~~R481Nqo{zY0 zEJbjK9!vPoG;aH#(xR6icjbCt?=zf}=U9vXZrCO(i7MLHrEI>R8kRQa{b2Wz|Fmd1 z+7y}o0d8zH14lylteK*06%&OCF8cGGg{-@2{l!y>%l;P1X%hi)Y#U zUb=*f*HE|XUbmNKk67!(X|%mJ62gp&c2vOk4=+Sg*##Nr{tsbq9Tnx*whhnFjmRk7 z5(6TGbW8WpAvv@lB`poo4I!&~Io<`k^oDCtr zvfa_Sw{V}C(RU^LAV548u88mV(|`#xMj82rhRrV^Kw8WC6rPqNX-yU2^PZ(v^qZd?SVfU_3d5 zCX&+}OVyCX0k7XB=(94)rfLoAqGGgS7!lOKdh*A@R&ckWJPY^pg2JViV1}qPxoaC& zUan55vDNB>QKbVx>GYLZM@p@$`(662Xr_eRGhY2|pH5_=pStn}ITe%+G!)IdvQFpy zQ>s$Kph+90>p?*z6*cdxYwVUn>BWn}`U*0HG#ZR((TR3&=ImAdpKz_m$eI0jhZ;I# z^$s$#_?uat<*)X3N5{V$h%gB{@b8=l^aP(kyk=~8r?$O5gOV1*c+U+$5so^2$tBWY zFl_OQ1|JwF`f_^cb%fTWtFVGy^}<19YI&}~fP!ZbLzhwxhE-Rf@`0Uvl;@avvQyZk z%YxE@v!JT9)%#6N3(nu-A4%cBwIA{A*+nHwYsb0_pWhdjjuH|9cUrAQTp%HSZ!>|q zGT@^nQV*Xr8=% zz5#br@OpJHf9vb!TE*pX_X@<0p0L%P@QxRPF=mOLp+r^oK6>MYJ8*Ys3!Rrsx5?J0 zPNlJoF+3EM@+OzqtW2w)wN{VH=XQsSjITYEJ2N9 zVR_FfoxQ!O>a-IoV-~1xDKpiD@9M>O^x7oKyN8Y*xEd-l-q1@Ra*<&@Wbc9!((2#z z-0(w&F3Y5oXb@lZz-$)?cHZoQydZE;fz==Js=k&g-JasrB&2?$xBtz4JL48Vh!~BL zXvsaUzWu95rYPec`YpkV!x9V6n3f1SsB%vBVyg2wC`P8*(>#s>gU?^n? zrM85Ja_3qDSJ(vG@-HZ|@ZZ1ScHC}w$@fiS~%|au9ujy`Say< zi4kpb)Y8oRQfHkR%W=(9`&ywXE->s&f%box)(j0j0c?M+?YAF@SPj#z{1b95v1E3c zmtXzTrEp|w6e$JsZ@*qSXp}@7VKeqAfxz-7i{|N|-adx#VHr_P6j+xu2+dxd(OA)G zZz?m3h)76oO7KvP->uMOYd2W0B*ot6q_Kc{@Z<48j&5dMoD_FNfr!_hk-JNqm($wE z7AXNL3a)E){ymPR?98QG+)>BZSG}@4Dp~~}ULc|HnQoeFuOl}r4mbOVEc{uokc;K= z1poSu?pya~gK*+BD#MXE{cZ*u0{ZT{sAxrXPmJSx`OA`L?Bq}YTJ)vF?DaOe_{56l_;WZm67Xc7fr-!PlW-PcZwmGc|jT-K(j(&d` z+&}4H)0YRVM+h{aX#NOqkKMGL)?C4vr9W)BDmc~t8PM^!&zNj0at)Z&1iw#+)JwlP} z&5Z^gy7-nU8?076>Fkk)B2t*J@2jUOpoq(|lJaU$($2TUlSvX(lvdu{HTz*zILKtu zr#D}BYa+5GyXJTOii=hhRUVQz)=$4&wj5R$`eFJ1Z}!3vO@*JU@$JB)^++^geB z5t+=thdf9o{~%ciks2IVXJ8PUw2W{Qp!)L7At4^!9-WG_+rEHJTDH+~Kp5C{Amx%EaaeWz%~5DHET3~}ehE-sCl-ZQ;=vvAG%exQb_Yf+Nu zcF%M?Yn#bAg&u0uJXDrN&W1Wk(DBKQ2f@f8 z(_r%5>sJ9BMXYsxce__6PXw9MO)1sDHh>R+Je)#7B)eRLYBK{6!@li_remJe- zMW%MBft=8Szi0nFeCAr1ha`LCe?k1`+2|HVJ)J28F_cS^Fae; zAXBCBHu;ngSLZFB;ng!w!4cJmK||Fio6>CglBJ8)`;?mUzIbGs6DqhBldhQ@x)PM+ovm7EgFe!U3ec|3grpFj>9Y=zVAtj zXMpK_oK$!V{~n&Z$+n}@uNJm~-If`79|?hl^CMihg&aJ--I#E76r4h8-LH3Rqxnkn z_tsaV%@$*sR1NV4dVeG^Ti1{IMzQ&Cx1uV!Ee-j-yYbzK=~gjZGet_z&p1c|t<1?_$z@`x7vu$tWjeJY=Yr{LDAu9@}{ zj?OuzT54&qYsXaVTAwpLfY~q-7OkuAeT}ciLG+#xOTcUS$OKOZJ?C9y0&#TRi3v=B(xlc zmPv6cG;PJ)xf-ckmC8a9A6{SnU@;0n#{5T%IR_JCi4PRB+t1S^kI&yeU*zELIMx->{DI6>Y-L`?$JG48KI;qDI=_Cu|i&165Xn z5#^p+V(uToIOVswgyjX>Yc6?}cMgvt;St#);8wxfWpMp|s3G$!#}k9XCv*rLP)FyA z&-+c{q~+}9lFAn;3b-g?|u zMTBRrVO>$>mDpHa$F0rlSR(bd66kc5brRTBcRrj$La;sqWNz3-O zq4>E=UW|73iPjQ+)%{L3fME_=(#4pOf|UG!jS}9A2`J8nzi3)hxN_TTS7qjdb95JP z@d|a)*Jg(H6!r}Tak>Xrc>Kl8kfm!o2r0Y%#6c_uv0D0$9=2~Wyg{}i81U<)mF>;( zkzYu#-^2s&_)D$B_&-*RHYSjfZ#x(k=L`@!R(14TXuEsORBn`qeMXo2@I>?(r}&4v z1a65G``e(dEsU@roL-?RxtX~#D8-+Z$Awx?@2;R*i^zzC zF>KbBY-{0P5=3ZTc!X(!y!Q<5TYI__hmkS_E{7{Vd56C2JWVH#?q~_& zyRc@r-@lX|J?Vh<5ZC{qTjQo^%s;p+7fshL{;Pp9F??`?D%=V?9}iZgDC znz?r;)#7X_&{qGuM-PPV_Rkr|1ac+6(V_GKDQt51^PDac3^-byqF7yb@&oy_t^UXC zExbe(x7`ousEC&=lv%%}wMLS9337@0-iX(xg9i|7&XhGT?K)~;%~uNgl6xAu0t&Oa zj7S9-2!^N>iA3*9QqmFFq|9N>kz)PIJY#W(Dlo5XJv`hD8fa@E7Y9zpe`&R?C%x2g ziL#ouRzSg4fBCHbLSAc>QcXm>;<5vjb;63c*Go#Gpblz>4}gtj zf&1*CV3^q>4fytZ02sM-NSL9*>d4JTq2v2*eg-y8gRx}$d-k;%CyCwngeur;u`hR$ z!U`ftnQ$kC$MEw%TKG)O4l35%-^`zHH+^Cod%`%6t;|t>@>)lJ#01+m7g$(Rm0b~8 z11F_8U3)MMaNlG*4gyK)hoj*p2Uvl-8bw83i~0zl36#h@m*bk0X#=^ zpK9y#%QY2D9K_jjdvuG8l;k&5+4u`N<)wRqoQcb6W#VeGzj*b+YdqppLkNyFI_Sgr zJ6({){)uw=P7M+gBJC>>OO_@Ix@FbMwk_lMg)Tsf5 z?P#PalhIwKx{^<`qkc4*r3UyA(3%Z!%^Ws9JyO3LX^PVD-QY`y$?chVU zT=ZI#n^LE`MrvO1YIGR<`t9)hv>T>zKG%`lPUMiMUPpLgMJ)wZevRLYczo+(7B6~$ zR0a??W{~4Xrbsx;^;U|VpxEHyNJ-N5q>Li>+g+gvJ|FKXo;Uh)R#$t;uB%PaFYe}K zo%Vfhl3da_gZGoJrQQEbv?P`fk`=7owWli0oBAB^*n)_IC~V%ULgx0Ev7+ZbBDsAx zVZ2MAMK~mLnoSBSZC@rLWwaeuTxg9LOjCyKY2$bCFes=o{K7NFzqgAasm|smX}#I% zpBe?U0$MRMa3s}N+&w`{J1o?8W{2(BZlCOCA~_!kNqsl9rK?oXMp-_aGRw}60tLs% zg6O4C-ihf?_((s!ZfIR?2nD#iQns}U@6)Atq6%At&UM{SaPMBIyNqzW-?1K4S@lI{ zBDPC_n11@y@?47$r1tdnuRKaE0HE;TsKY@WL!M}`vf{$+NN$Te13VN2-t?JF#8TH! z6W^!iG^cV!)@Q{PoZ8V%J_0s8-aHeLw}q6lW8M1-jw0S62{w8~XRO+{q}5Jkxl5TB z)ChFd{AMqqNSid7;9-8$wG@nGUvu8`uWGCIqy+qNt1_Zbr53&;ei9#?I>T#{gEm!I zn<5NAz9WKYh#C^EbZ@8e!IR0p&F$GuZ*?SCZS&3BJiIv>>3t`D8vz%sJl2NjeYamF z!gPp>=4*lI;$GK%!MM?xyvxZ?T*$;NK0)B2N3vXxcpdXUIH*khl_fAyTBpYVN+Oh= zrxD2vq+hQN0CFy&O;Td`el1yPvSIP0l`xF4#M%=e2F+}a@Oay z419h|5_YgEoiuP9|S^P+zv?HtbklvH@7Rp*# z$lzximt3k$C*%dL1D$$+OnQ;?o#^v5y`so;AT6DPjti1-Ay$93OW_iGGui3CTBz`( z00oUDWaAeQge^cNp)*w!R0VJ&F(Pffy*7`<)lT=&Vw2ijL(gA!Sly5dexVP@8kW>;nE$!DMfhK_uTo_&b@;fmUe;-rONd-g7cTIgW`(mU(OEf~il---|azE!~n^bp&JwFWshE zwJb%@sjHj^FV*1^^0+*)wQU?uWPTw@`fNFNM z|0?8;76IVLp^`eM)BD>mD2UG~&-JcJ_3v+@H6Y{4!;VXHQzItF2VXL3R_8KF-V1ll zjM+%O&}ejY5LJ56S4cPjJN-v?%3Oj9KP9I{9OdaBOC0nsfByl_(9I zf8}X`@#qU19fpX`Q=>fYe$ID3q8}y>4)0nPTtOtglwmcK(1R@Z;Fl!F?Hn5`-S9Gm z+23>eiZ{n}uoHZW>O)^`?LHKC#JqUttvBE<==1cI1g2q(<9qz7KYZ`Ey#x=|cCFkK zJcjKkbR(Fs#(QQC46wK(lr2C11|(SXSk&Z z+QXS!4X_eV*GZqNqVUOT*6NZ@y{Rg_XFxwaET}mCbN=DrD_iR6J1l9}d;zY$pH5cO zYxt053}R0uFYsNtC@$Tz-jUs8Ml}#u;o3Qmyf>sieg0e8(^}#wuDKrfH-JTvq}V#B zJF`3}Rc9=Wz9UYN--@5v$Ouc>x!%kHxfWO8Gvn>PQA_^owauSAb|Oi{1vmRYg5{{* z7WH-$(C>km6X#vS1+HLLM!<@4Z? zJA=_&)KFU0buO6eGXO#oLI010#Ll)9VhY0IgTM~l*O0=tj*E>h@j*P=LEBZo*oh7W1 ziE9?HyH$(>q(&@Hs7 z;fQ{9xRy#J_3r$u$g@0Vh2B{?O7!^-P6F6FoOo=AnM9?zO*Udewj ztC@T3yHb?CB>Z03M#z}d%QD&#N?=*Ql6i$k-8#1c4XRqq07u-*SheOw!e}%0K*SVK zy(Q~=)@t)9yzP_@p`P)(wo9H7al54wI8U?XV|}*^jd5}^Wc?v6`yb=Y6(LN*ZCrlub*pRQ-CDuz`MrDII|r>3B!Sb&Xx2@ng%+{zx*mk?@ckSWVW5BZ?ACdoZM-^qdfW8sh;k`MM9`6j^$ z6^U4Q>weFNodTG2aK6!H$rN9R?H{i>4W41#6@E+l-0?mEq#!tI%B?}bkKg2qEp)ZG zB!3-L&(3nlN4kA4*tw<%`HG3Cazba_Y4p=9jMU*0Z#q+s=4k63#XT4sO+e-3{>n8t zYlRnhW8`kxOXsvJpIEAvI%|j7igPAtLGeeVYN={?Y*lHgU`gn*Ns)Fb*j?!ZUpdXR zf(N&EVvmR_XaEsVT3G|U8}{%2%ez@XMko(>O?1Q?oamA^Rj>T8h-we-)wnp9muxse zf=ZRr#(!-#a`Qb;!;7dT#$q}#b|9`S`&?`y9_4A$qVRRESRYrO43 zRqT7;RhDSw<7s0oX0jTN-6kys z7%mS?%Gz+NK7y;p%&5P$A4F-zfwNiall{%P6f9uGY@E_qD#bakLkBY7Jm5qX&ppy? zQ?6TfX3+=v6PjOcdZdDqpt%;K?_J5ug=-6_*D#0;gjwdCZ8I?$)K0ui4uK7v_s zY33n2#Fi)n=$FGBP=J-Bfy#nYoF>U z-`9fY#_D!5Jz|~|6|Ln7WMB|d@cxUai89< zXmY5xh~kFkJEOEdYF}X?1eEVIa4l+4TX{DlJ!F2xXplgCKf zkO2P!Dr`yUx7@5zJNeatN0hWpQe@Rq#C=xfS%bucuMvoYpFP9d^Q25>Mk9?Wpp8Lb zP0L2_Tj(L$&d2H%z?m!xa8J#KzEH0AoDGH26_5CQu>s|pd{bnektO4Z9`i_#<{b@o zNdF;SG#FxJp0O*4XR^I3D45I=QXfmYBc|7GlA zLGm`)I^ib7KjklwfY4=;^ZE#7ih&e_bX&X+^a0*vZHNgP`{ez}z^0+|0iSm7_Gjh{ zDKzjGCdili{{~(LBaQp&&po9){8)1^XzF zw3|EX^qQ%_s?TOL`ghZ{-0v<@y>_s%Ufa#Gf+}^_zCzCT?66zc9r;GXKm{DfkDEpg zm3CQsTmm7}eD5G!sQ9S9m};DpuS7qiwyMkAFxN-?=bWBEp?U*KmdoFcG~3EiA_o3fuxE?pU4ua$Y^VT>?_KCK7NxK+p;TZMIOlyqaQVP zTT$fV#2xnm`?iVK;lpXb zFy!5hQzg_^w*|4$76$+Z7m%0W-KG6PgUvuj6U-NLiF7L{JvXm-SHl~8K1D5FepVD- zIZT}Zk6l}8mIz;nJ7 zP8bqccbGN*frF~PXmBaG$9IWvHy>FzIT~e*LE3fK`Q|NryK#7I--r(_z7tdH{w>qu zbA@z;7);F}oF*Uzsti`TnGhV{jv?%z`IF zF1D2t63wN;ODZm*RJ0@$_Sjd}Sw+etdZXIlKwD&8;_S(Et^*rZMtNil><+mcL zF}<`{+5m+$(J>Lf1BkBEE5ZRZ9Bp*HDJ(O+@&7?M@{@#g!W!B(HnUw@qh>OE6r#0No z9p~iE%h7i?G_;=5ja_Nl{7q`}R^=YGc#U@LEE_})^^;Kt4g4`Z{V{@s5Hv#DmIwq^ zs%F%7U8h$ER$xe{WvvX@ux*Sxir+0H8v1>9&6_f-RM!ZM$#rupoxM7m8%5 zjrWBt-3>DOSUrp!Ps+0*1g*^$=G`9xn+2 zOjHno5*Gcvv$=Fr|ISEOt&=rk6LGMZ73={>y5onIDYOFj8Dezi%pk&$A86=^KZuN} zm+`L!qDK$BGNlyO8^>|FpNG45i2QJQsu5J3thiCs!0{?p$X0ZRH%iZnR>Z+yYsYUs zpfJwgTHE~hF#-(p>Z28StM|7&X3qzXi0b9GDpUz`G zY{kWC)pS#jWOvt?>W?)#w}?7Ihw+_tOK6OxS|P+4;P!P@igB(3NEpvEXdEmDF;GOr zodtBK%sJcqI8f*SLz3T72FCEecx03Jinw^~>Rk@6hw}~GnDiYDBNrlV^3yQmLuBaV zYkDZI*l8C%1~H5+z)MdBEG>_4?dF{*PIK5fQ(QvREZ%6#U(j7*P;Phxk}ULeS=QQ2d-@Rju+9+Cbb^mdXU5KF?m-EZ+_RU zW;)s{g&XTu$-HVi6>8VYF5Y_|j&4|6Pd^upm{3<6{ip89l-owd=poEwUdIG2NBs|2)*4c5n9MYL9E% z`q--Do5lk-2^CIiqykaC6XYWL(WURv-S4eypYOyKj4o)mh*vnx{}vnGJ&$W(jA8f= z3(mpCLB#musKAgVStlw~9X5f7UE=+3esSZ`AzR0X`#Q=|!PO>j{B5DCxJi^4I~4Z% zMgMlPpfhb4ZT;>9#A-I^Ch0X%$PZjlZtGM+g*E>QHZ>A3t5b!G4Lv=pEwa>$P?nNP zcnQs-P5eg3^ldB?!n=0GCc2JNtJct6{35v~5n}ouI!{=9{WwHY6$zwO^D6CrzNM&r zzgDnYMAY!C`PIAG%p6}fm2!IjkT8(65dI^fegYUNGO=%EV>6n|HKEy2FTd*Gpsr-! z_bxkQ_!wu{F|SYrWDo>H7UkgaV3~5!0(@;~i|rrz@qukBpr*wX%Y>C{%CX*IKj9XJ zE1LWWH+<3WTutkxZb}q3aO0;U@+^h8iqMd6Wkp%^1+zpeb%n>bbkzgBSJ~~VVLZWo z6Q}jUY{z|PN?ceGBH&ngMrQk`5i}0PN#54-#cOGg0pO%2XX_30-K4&y^{_I0hyq{U z)q!x9Ci|LI6rnV_KYq0oq^x4Zp6vGy>7 z3Otw4!LVOrnnSZ-{+KNN7q5CcQ zgMN&fMl90CK}i8!8ILO3kZ##nA3XUHk2c{$StIGc_KD2R-86InevB1F2mPMqVb#Xg zGj+?)6_vn5Tv(Q9JqF!PmH3+OUDg^-HNxg6GZJdYahp`FWZlx(_2KqKpC8_{CH`RA zwn)g^IMEi3!WG-&3fWDx^f&89kmM__X*?IT;x*$ZiXvU-G$8ZulfUoXz_8o5beZG- z5<})3kceII9G*#{tu;Coq}HF@=eqJ!9d$)ciLw=RpBEh7u^Ep_rP0dpk%e|ad`XyY ziTm4K)|Qks(9yQnux9z)Io@;8I}f16=38T3KxMAEy+1fy+QcN(k#LK<8@3Y3ifD58 zmfrn%AidfDNP0_51ftQ8$&VB^U+Tx(yp~9I9Y*&BP6mniu)&dI_!2U^j}D=1h+g>- z{Y<%)f&k+7g-i~sG>(I^lFqT0yU+88*DUcSFr_F406$sajMqeF}iQ(b} zv{0CUfT6a`v5wuJzdLfKkoF2Zi@Zz^XV0Uq)E&?V6Tc#cQzfGL_EP&7f6U0e)Q_I< zv)W%+t-3JaWblCmKFX#P&vWN(2Tni(@&HHZX2o+roh8KlCv`TLzh*+*fLr|1nrA1J z8q0j-$@;FRq+}Zo4J?=6w!XdTx6~ey5G=Bt!w25RyVLw*#&4JaLZcDj+yg?x-((Kd zt4AhKSSUh0X2rUm%6%Ha`zsyBF5Tkvc`8JTN_M2!g4P&XzDzP#KDym~;SDre8BH_~ z(|`)>^iAz-{v~>{^7!@|eU2HV{q&>@Gk!Pga$!pK?HQrnyeIBC?G`rO?KDsE@?1R% z!avE4@KyOVt7Pk!=ac*}%W;3`dg9N1im7aWrSc#R$MeZEE5Q#ka~V0fm>T!=kT53Q znd;<*ro_^QY#{wws1yAYp_X#CPKE1J;Jd!hs~qLmRK8j`e&ing`W|<+hpPO^sX_+7 zE+^LD6-l7PIb#bZDw?73>9izDf`7qa4-w!4m3UsW!1p%LTx>PZFF=5OVYJl91)ltF=?h>ywSLv;NQlo?>fPM;c<)$~^w_Z&5_j@W`aGbuJKR?O zbcUm^aTlWUF~VYlmECrxG~|$5N~n;~o0ojq#6!K=J@Uwpn6ZM?dYskp@He+56X~qi zG_1%wiU$W0zEOTgVz!yTdXCCSSMsL44Ps3!+Dx6s=nM0fc=7dn$JYhKb;llRD~=?W zNB2X12kNw}eDx?LU?TGy2alzuGpq67tJYJb`f!TYbZ zsQrxv(=HSNSfO<)eql6(i7q_%qQXLhBGdCR;4*KSBGpX~1Ke(3dAd#};J5k5TE% z_S$9L)%9n6`)$>;%M>1zqBesF48^S1*&LxabkN6kuh`FvO734y8}H)`pQOQc&{SYE z&$>3#t6tnwTc2CumTWAtMusaCLYoO6EzEzmYLPGw(QZ$Q-s=npprrNMDNE{ovz0qq zOXdQnT{WCVfL%pCK@@GkO+SP4j;%CSGsOdsXGSGOG+^wU1@Kz+@&S8g2rI2B}QEOo^$(K4+lVlLNi z;#i}PSKRY$n=?Pgp(f@ *&6)&X_A=wl}V>Y3DDVq*d>~?&}9Y{$ESFD*AImL;87@?av!L85EQAedxUQgvL3g$S*&9WytvS#4~&2 z7Ap9Qe6`A?&CT(vx6BXr3*)oiFBDd72=ljiQBQ;>;4^_DbaKsX#XSnK*5%G+uhPlB zL8h-1u%ZS0kwQE%Tm2sYu$EDXbYi^UZNe8m9J94p1Pe=-j2=Lvip@(b+Ab{nQ|#uYCG5{PBAU#E86MH zT*GHaok9)j{huD(3+OQUr>HYkgKIo|fv`K4t)aApe$-c%+$fI<+x`Um@3v_DHC%D# zZ_gQ|^OcV)vb@BwUjj6traUOV^rkGpi+z^vPGj^~x6Ob(OftqDhd|zsnjzy|{p&_k z0#r2B)|*-l)fn8o(F74fP^DSq_rU*#=yI=W-amTX+QBDqsz z4>Pgu-#&aRJC?owQ#k&UJj-5hv?tm9w07SLmA5~-U^yZaR3G8H5aWVVgKd0f#n<}U z=XT4k1(b9bPjcrChILFS4=H>7wWvX6R0Qv*CjhiD`y|E8BD5ftne}uaY+PXRQ4X5> z2!vF=(!Y?-*qKw3>@g%zTm%w|Q<~I3nwq*`8?D*TH1+nm)au5(+X z=&rTi#Klkk*%E&8AFL$@1S_KP#|U$HZY>~q zh@6$}CTK3>K+4zD5c%ybW%hiDZt**H3}*#X21B3OLViv;Mr4phq6#&8Iugx*uf$Hw zE0hs7W(Q0Tnts!UyQ^^zV7vaq*b5M%mY{_+{mAWGGU5qRWi2?Wu}|J$HcdKLjuXDy zD*d9hww;$>sEYH^);Q@$+XzH7s({$|Bz%U|DU;`b{;Z0T4LUaV?ET4oJBVnSQ>syK-j9I@UjTV?5Gki z9aqO`753RD^d!1MjGrZ{;1R~yT)jKLQaV|kOV2ihG#Z`XJ0u*`iqO;t;V*m3pU5AW zq`TYA!t-PM3m}61`3+1BJBIPP9>8frXaShm0o!G+^&fK+upski*AT14*E54!NER|= z-8GIR&Gwn7ttT~Ujt4-jD9leQcK=&e(AB_d)uw|2W+mO07ndH7*(h<~EVP5mUhV#J)~dJsv+*zH zrPJ>%p)OJBLG}D=>Lt8zLZUWpp#XLdSV*sGocre^sp3%=lGcEYr6qp);|$t>ec~ zPGhzU#m6AnJ6{fo)@8rO$IAod2EYoLxh`CQ>{pRYu5$a=1#wwW5d#fo(#=8Ym3r7g zUeTDuqt@m0ajCvV$e5fK$x0%;N|~On3`y^5hHe4-{eg}!ryM3)LfFjV!Y4#5kegnj~y_=;mcM; zu}XExhednU`T2Zxv&zJN*>UethOAaE2G*~lO}&HHd9=s@D!b1|BcC_NVNq1D_&$YT zh+{QZ?LwwE-a^P7V~{NTctJSJ*o71(7pj={=I4f3V3^A%QcnRe?8B5oRFU`J2p{wb z4fY#mI%mNyB}4OsWQy=G_~}?FMJ)~e>qW90_1A1?60EUe?iP9E;smZQHt@QIrCV@# zPPOew;`ewX$w4|Pj8fVAnL+WD5YJ45-3yC@jiY9KR2Nxt$+q=<8C-I;5jGVxvz0G& z#j97}(|(t{10Kt30_dgxlmYK+w*L(77O^0qd*f|0AG!S;(-eAjwKE5eTHTKgx>A%b zuxhRXH%AB~{rP43sh+uqOZ*WycUhi&Pn&)v{IZP0y0Fcbq>oNtlCowj&L)qwCF+RG z5NOp$=uZX6I&azY|B8LNF9PKa+dXYHcZ1q@aT)4WrCW9^zCAu?PaKRhlpkGB_*L~i z-`nTjeU~Hc90?JWn?bHy_Sd$4F#~|1+?jGJ`>6sJ>H?QSd9QIg)rObm9MbYZkn{`*ECVug0m6YRoD2X}Ug<}@jI$3>J{oMni*61ssjbDeZrvz}tQ z-P{Fu{PRI{FBj&MVu;&E8dW0W8du}}Vl-A?d<0FTGbPQZ^`ze2{3O7q zRE>%E%%1Dx5EYyn3Hav#h-PQ|o+p(pn3&_q>uloAyxe8m7ZajaDGkuteXtcVNsfKG zB>SNje`ryn^{kQ~bWm3UEU3j0 zs7r9gbEs$jrT-i}ARGZ)E)X%Ui9k7Hj*(~LaP^a={-#YL`69349HTUo8k3Vrse(EBkkJ_iv9Ilq* zF*@D8$z<57O=02$7kMgLrONwbWQUm0p{jn|ySUM)>uKy~(Z9Q3 zP;ST(KxBkAYLJ(lriqUD=pLhS=s70C2Y!kvX5uQT*`6*zQ!tdP2rNf;vYsmlYh~?o z4`oJGQIEYqu}=;nDg8oW{<&m}2+e{9PO{m&cXc(@QB^3>dXhi%=M2-AB*WXm$@!sc zlFY>syY&lUrrK-EB<+q<1TTH^aBa|{(h^+Xy_Dz2p*@>_Gi(r^7Ulk&kU+9+`|~QK zEd^-P)PM&IPx-GbEeUqHlI9q5gc$cB&b)-D;5K)4Cn`tu_$*qN<%$u%WeB~3k#)GB zx`7}A+9b~opgG*|rW2C~XfLq?+Vye(ec}1TaOr=YwuzjbSwv}HHWG?PZxXZ$FQPq2 z@0T&WW2D_vlZ%kJ@SZjl;91;-JLve;$2b5-fI!ktSS6IK(U<+lQS~@b{sg`a*4}MC z;h+ChdxK~N6`&Z!h`m4ueUz@pYP!{zVAscH6h#|>F$t0u>0{;QJ7P5}J29g&WXiW~ z@gA+M=t?#sCatJ(+@7w^lz@kad?7%)k|E9ilq`Y1;bzCmECF$1G#Kels406J1F@c* zoztQysjSNRT{Dedj~9F`G|zeX6~C5*3W8P|^0u5lM>QH12F0{2>#HvMN@0$2cwqk` zxX1u?1T+d8>C$?WA9+W#y|&)}tKL&1-PPC>eRkG|cXXeN<|P!1tn<-rJ9kGCg^JuS z6f+I_cqbPbAjFWwS*KDw1DSKkUd;n)k8NWLoa#k|F1VzMR$%NAX|(*1&OcF zkqOiXlady~^5P1swRKA{jx56d=u6ko<#{=i2VdCZJL1Z*-<&i=ePh`bo{hZ|xNI~O zt@SFO;#l(pWiFEF^h=cb6DdVvx-e)VtuZ&KT~9G^A0O(MBAiVsFWXg{xi8U__#)lY zB)XvW!i1fJ3olg?j7@O(7>dL>pn2M6w3;7p(sYkX022cr!*hnlk|HOStgb5fPqlxQw|0=!88Wd{X(lC;CUs5SB?R z;*m)xR(|CUt`Tn>6!ZG9KIR}#eT!A+=WTpKR*Zwj|J~TT#o4DD6qv86G0mNI!(&bOXdki*M#SJNVWr|vuYZfeASXrVBH(&`E zQ8`c&FIk3k{bGI`1cOJv$O3feETp^AS~JZKn(?eXQFmc1-lx***preM#6zC?su5 z3@Pe`L=)$p)LmJ#|C`XSzH;nG?@HLqFWUnJ4ng}9IeSeSTGVJXG$k4Ma}m3jpw@Me zDHeHeyq;e@tQMiUX&jc#t?*1Gz1qmZ9qjBLLnMSe7s(%wWYU5$M-RZ+PgXd8Bt=A5a_u%Np%Tn!X|0^igIzV+sU@0pY9J{)&BkvrU2=%?!!V>WoEsgsk#z zf4ivTU#gP$lRa@(Jp}+Z0;v1nr!)SokgPyLXWLfj4=ci7$R44c8WHzYHAlTknv11wCZp~ue5J#c z7vH~$#XOJB*6=0?wYTON)rhBtqB-6GE?{0=`%r`( zvIU}nrV^j7^WSLT;y~8=1xpj-qhcX65|W=5_B>I3&2B^0y>$1*C>Dtw#)cT%qcO1t zE^oh^Z3=eVWtqe;NNfb--k8z^sFBH1q7f|fdQJgWl@yiau|sS2jl&SenE=||H_2x> zW&Pgk=0yG8djxHmRbIbk`kd_YLGq7)EBqoZ+Z)k*F=5X-z7N~ze$vONd)4{3b~gUc z>}JpAZh=Eh=WzL>S{!>o?~0#LbPDXIIY#{IL!=}0e)~2g&Qd%DO+=DFW91z2)pZ`p zjCYkj^!lhnRAhq*D?%8>s}q?_S}tocoGO;hThRJCc2jr4+Yi~0HO)4M6hrcmWyVAx z$l|6IFD9t!Nge0ZiC+h*a)ED8!TeP>Q_BiF#A&eI)_XddO0Vg>X(J>N$EwjZF2pS~ zLb@z*jfoeC)uh%1IePx~)Zj)5GLQl9FKvRfC!vVyX*fvXvf1N*Ht#or5ZaiiM#|&* zQ(SaF!NHMKTD3KqD#}aD4!J!KJALs{nSaxANSM%LL)s>f`miM2Y+sK@YvIIJE%rL4 z)I<*FuUHApL~zXcjwCnPDJEy0TU{gc3c){6Ze-~cn*6_nBypamO)YDPw9(9Qhxyd1ySoz1!MSbi^mJQU;=+2Ga4cfa>ml+ zzlreUcQq5ShOf3l{9o{k6T@vfouy#9kB7V{hHgA}1(~Y^qe7CZnNBG4m=Fro10(4B zJ9!qzeeW_AX{=~Dk)Wk`jQ1hPUn5B(lU9fkTS&_}s*x+AbKP*SaO4)9wDTqn%^}YM zcwm}CJuwKEyF=XFPm~myvnGF0@iL+CP>g0ukB2&ffPfIE?k(?z55H=J8EBxYDkvlo z`elKj=osmbKS`9eK$Oc$5xq!D_kgs|BewGM_T|qPouv%dz^}Sxb=hwM5pPz-b7(~W z1-&dlB-NzD2jw;sU0hetX;_l3@xdhv{!d?D9T(Ns{XGLxLw8ClQo_FC(^4ofvF zgSmQ~K++o}*EW&x8W}$8E~R&6%YJIU+NC5quOp!u(eOLUxT`XcvbBO5N?WYY*ZF1c zIDcy-6ks65lyGV+(V`mwO=j2>ln~CXQ{HR5$aH`tmSvBlRkXF`+KQPKq0_6lnV`XK z7=GaLa3)ghp!^wc@ZK7v?W#V*o(D*n{g1u!+pGZz_R|r}d%hd=oG(PL8)GL1PEoyJ zdzBu_@4oBRUQ@4#+A3SmOzeynZTno4Dd`-l-!KGiEV6S-FcTl=u;vJ`4 z*QmKh|EV}m?+(?ks7<{D8fiOfrD80KPlVQXR<`i?=IcmWbh8Vcu9U zh=#6!?)PZ-1CMsmo;$%LDH^1}i=cr_(0mayEM1W&8$}L6a4lb$fZ~sGMrb=5uF6zq zht)xmL!K8;l{Psb8vRSS5W-b4-z9r~B3vAas<)@&x3#)H5+01q#?`S&OiYJha;7tu zv6|^|aVy9wLz}|bc;45aPb}885PCUj+(%~d0PiuUN%9iZr9!kbuq$C>i?$-4W2!2Cd{&_X(p5A;$a{!xCxYRYNlGpfyI~Ndv8)&2C$wbvx)Y`et)e=|D z5RU$x&|HtY_6Vs_HgP=I?Bk8tjAwbE_KL2r$NR71!FC9D6!F*He6f2#$&k3gwsBfm z7SjUQoW_Obbs%98L`5-jI95`5komST3r>_&G3ViDH!`0tNK{u!syM~LsudoXAUYl| zJTE2@ruFbTaf$nTbSAPAZ`V>*QRCjE#hP0R}`= z5Vu%UNEhEfKeuT5peHU?J12})Ap4?`KmaZ#M2n`5bjYi&1yyKRIG4%Ib0ZxZ&7Fj7 z@Sr6+%-ITNV64GZ zJY1ji6KAKfa}$J)HDb{qB8MLH6mvkap*qH8`X)NTF0`HVU)@G@-qEv)&*I0+I95cm zapdJI&M{Qb%ZqczbF)_dpoTdPL8p6ch|+!Ihr$@+%i;8geaw+1R;?POeT~=oX*N`K z#0LYKjOg1Y<-T#8u&zUB8Vq|^(4y`EE^c(67im*eOZe-<2103~SPySrJ9n?kbf-zJ zgc`>#$1#05Pz%?g9OgD>CHm8yFDL10I0K>b9*81ORsDP5*9dknrvO zLVva;20w_`eZ$L%n{9v+$ht~`R*D)6i|rmGp>g{rGHDki_DhL@M| zUVBX?9#9r8FrVdMPsSZV#SVEDdi8>N6-7ZAFB;*A=gJ4fd$-xqSpqzb^c;1j_v%-CH?w z@5rpa<0n9fSH2N?0(n6Ue?Fi$d|$6(UC%NE4o1o6sg2)fIIx*bygkH@D6x{Cd(~*k z8>Q#_2gq)L4yqE8`cYx_{=>te2RGDQlpn1jhE%Pn>Qym~B5_=$=i@$I&%2T5D_0hS zn9sRUiR}W^pPh)rhszNzcLh8t0m_pNE-NX?M-+7M_dX7t+RFkD_L zvpt!}xu|JnJxLS^_b#MH^yxYToWV;)KBy%SVrI>fCiXQY>9tywmJ%vL2jLZuJT#U8 zA343Z6``#_&T0jMi?*u{oh4dI&5ANO7bW&7AA4-woPaEZJAq57bE$x&&{sR_m37fT zRoYtk3e{j>9#P`Zo|Q(I6$mYSM>o;`gOb6+7rrM~=|$Syf2;a`^gSu*dMff@gSv!^ z1dJx-$D#-p$va2#a~xU>mr&v5eVYX-fCW_>iX|=5%#}-nVrQ@!W)g%sTlwEvp-Hm2 z(Ji`CBm?-Qq($TI{Yml^*DO-%Vv18K?palIVu<-gW4`E>@_jGh0t5*xmpVjrjC!k* z=DbI~TCT&$<-by8xZvbA4sr?6Dx;SoDtxdkX$IGtUNI9&5S;h=Mlk3Yml_mJkEww~ zQ1soxbmv}vm3(uF4+mwiQLAZgAZrSZp8E(ZoSx?4Yv}t{XuQ791i4E^IVHxk;9}Mc zxJ3Op8XC!#PLtE?+xD3KwUhJ}j3(~`6==1#z!SA~g%1$fSyKd|M;Z|+)B>@gC05Ny zKF8ALiKcwS=3Q1e#&~)w$BCfN$Fql)W$OLZ71!yADhh=OkuhS788bZ16;K5D2tpq+9+=u{ZU18kaOfvvIv_TZhb(c_SIlwYm~mA>SU6JK{J)@ zAxz$iOa~`P&hq;Rui0W!NouGH-q05a^=Dh9&i!k7PED}%%XcbIe->SIVgFADGuc%a ze6-wf3s}gW9{(h7!;zw~9xUR+osY^J2i6MLDsrudy7-@+d?g`;X{76m^DShuGK}UA z7{_2ywqYnso}b0dV|#-G!7c}At1)7?ep0>;bF*{NiO6}(>HXf^{KXF7rNx?^lnlDa z_{kAkphjtA){ekYv^{1<#U6GKREK+ie_`m};5A#9?v=jH1r1ZQQREi~``HB7UiXM1 zh>LY-#^cYRw`#&XassGa9No~YQ>iH-=fPwhAW5g+dznNIn(P)nRQ>!j3WYl10#Lgp zHF(r2>#^OZ#tOar53kRQ=bh47EUSo=T`)~Vy|Cxp9>;}jf6toFyYDi8b}1O@TV&H7 z6G~%$jh{BkDh{UHKTA~Yfz9y4{mgK?SjUx`Ek`tzGpe=Tc7&FYvzQ~A{7DeKAm!)qK1~q9 zKb;YHfn=yzYK23IjK_sx+-i^7C%&1ctF8asgm4Og4#{jC2eO08mGS4Q<$*KeGdCb8 zbAVYo1vsWu?*T;DLSxuWKoP^&_nf}W0)DVW8_^9hx=^OGS&yV_zl(zHq@}2L8#uC) zRbyI#OiWRRj!pMX;W5jzo5K*_cVR%*;+2Z&0E~ix6HQ9ZK!_#^x{roIb3>_*=yGK- zj>5!^Oxrea2++KZU^{I(ROl-xqPd3|+gGoZ;PYXga-M7Kl(mZ+iBOyQG&ExvV=~{2_i3NbY7d#3OPs;0&oc zT6&5kGRc>twQy-=-^8heGtk8(! zh^Do%gi=A)6u&$A$Xkk5@vj{hMY&>n@hid+=hvX@HZ+L37YN^)99P?gu-eWB&<{rb z=(o}79v9EmxPhgeQHCDV^s1dg(!R&l&$i3%f_X7x+)8E0wB`SsA)IY)8x zy;=^sCK}HvT@Bui2@AMZFh1j-)C-~B*^H*P6+m6bq{YlyMlzZn9CVHui~FCrWp(3_ zfmb_j|93zL;9R3lB)VX-pDuV?EFwLU!hivcQ0jNMcv_%qJkZXuYAVa!((sTyopMn= zEck{dmY*Ys#^73K$}FO^oDd$^o5II3m9`qdYWJPvpz8pC7M``9$({HQdge6o zi!_z%Bq{Yv1Ul*Kes>6eM6F`bR4B6{T|;~)D#HXVsaXr!D+Qh=wtLZ&!czMlmevTd zJuyCBAv;v$Ad7~LE^26o;87fiz$%kvbe5D3H*@bjJ}a*K+OD2 z40+rvJLLykiYUUDr#+#4x6kiH@FLX@s0ZMx0R7Mc0^MB;fE{)G@AifMP~dxzMAlUs zFfNwu5Q?S6`H4{1lY;ycn*PILhA-^#%Tc12@z>7>aAe+AK4DV&29>sZ)g;h`Ydxzv zR#ig+D?;KU7$!X|y=P~dSG$<1B3mB{%=eO(?DRn+W%0Wa4hHX&2rn8AhiQEcZhyP9 zdPk%^<WsVb7^8{dn+w;I65 z(EIw!GQ#<-l&w%#-g|zmvr`oysk44nMkjxj*ZYmvdx;5b+`pRu8WSslSHVQeOQ&;Y zQ&OUPO_T2LR|O_}-B6#L>vR$iaB`99uR`MdYmwBtF})4yzN_+asO^{cw^mv6Xg_j| z_-@JOE#vc1J+FGY@krQh4CQ2kBW+{~gz))W0od_JF8h%Qfg^9#vuoCNyu^7RUqsT=P2)cGw*Z8N293GUajvNZ~Ssd z7E-KL>?uc+z}}8M&;j>joLNU=d#M=$Jl1sm(`s?_6JE{b0yI3DNjN82;NV%+jBH5c;RW$3^^+D`!s!#?r#N#K44to$k!&TT%DUmV+h|fs z@85f*mk)?Q9)I?~b9#(7uKJ1)*#YfNv($!7C`hmr!1h=5YPAK^Er6$8%`$&de0Bae zYR>`3R~33rq4~$0eP4ThPd1~HiIgQ^IKfJR3l&K7 za?MrHKJv;B{Xg5_%~1g>0qYS1_DazT+dTmwW>pv6(SQSd_d}1gf#4c9j{t{-ly@i1 zCMwWEaR4;v{+&c0(Qo8M$DK?kx=jc#ffIaL7c=L?Q9W}{yp;U3~vNldh#wcYqL3;?w?%CNes)R-k3!K=OpJZ%ALavMl=s{vq!5Sqkj zPUgp0iC-~dpKTM^i^^dq2Gx^dX5PI-7$HE}81HJjA2`hHSt}`WELoS*t*THZrYx(_ zq)$Mc^;`32ki3uyW~^*Hi_u|7S7d4HmZ2loWbKn?S3j%s9Q^rwYAmbKe9YQ8ErZ!U zP0dQXyBa&z`tqpG%Bv7u?fDmc7@;r1c->OGp8^6=-cVJL)kE@OyU0Sg zDg5n4q<#eHe%4?{?}?S^OXEvyt7`?ic#Qk%cSi^$ElbxQ^toPC@8YAW(aU4|Wd++E z$84L0zPXJ90m*o_eorVzjpp}-<@vTJ=-YAKo2uF7-xmIy&5eHr6j2Ny_8g}o*JgUC zK%CbcT}$KpZe6!i8Nx!+=_iL+j{1H8fXgjcJ>V838bcpgldMBpO(2lnnlAA03h=Yg zs9A?WqiasyzyEMO562AFqxhDm*A^dZ|t6 zVt>}hIp~*wOXIbCy0RwnHo1+18A5RNJhc8B(fp8*@47#rYWBczBPXv)B)(aup9zj;M50H@A6%>F0Em{|*4xug^q zA_>&wBm1at5<@Yyu}==VLa4CxXr6;=-P7WP`s6;Ndoj$gb?!-#V=06z1KAQg(XA5( zZr~&Wq$Gig)zZX3gCl^k9*g~wGMhNVdR&@rJf_MbzOQLKE6#`=EXG*7ALV$y(8BC+ z=U3HaIuzSpm$6L7H)g$%j!r|QaA2W5K-tj&ANiS(TZ;I9X#doYks_q0hALr}r;0j| zD`2h3oBCCPzeU({Z1CaQo!rk%puXc%7na7dr?H0?fW(blfyV8pDF1~g*ycd?%5?XT z^3gF9$Y`)sz+@+(4Qf=Tknm);Yf(r~_f@zw=Fd;BO zV{x&@SV|fqq;V^YCcbcF&Dn0}U0F_n?kJf6tRRlLo3;Kh8E>4l+H~Z2h$GDcw)O#SWdQx z`-r!S^=FMh8kBUJ?K^o_o5rMPrM)Lvk2}+0wBK?&AH#`G51q72R4?%fqtmkJiE=U% zRZ8qAb^psG6`G!`fbXkD_`>NAueK34AY4-(_ys`NO1Z9&F6hHKKuYrC$KLD_4hOsx z_lEpvPsolWEi!EPA?~t%9T*%GOz}6;R#icxOSWljfbo@~a90OoLoc2R)|7GPYNcfC zvTH^$#T-sqdOtA@I$7|6J;4{q|GEb!X}n3{+`lMW+Kdy3=V_2`{hb%+^_&5m!Al}s z-WCDVcrVgE35p!6C{$liktkny9-ON`j){qKC$iI0wxj3(${r}oQ?+6-ie)GP2`dj& zBKuAC8xVFP`*qmLoJP)s%J*EX_;E3x2Ai$xk5j&Pb$AL!uv%eR_KkBy$ipbX=v#tA z6Y}DJFx&v79^m9XUn~s}I+gs+9FOf|&Jou9&VrZLp%|76`!Q*qZ2JBo9T-p+g^uup z2hfE#Dx{^&_Mj40S*#uxJAI(=Sd~>`OBE1=UDJ6-5c+|Q9L>@0wZ1F>f6m)W#Ty<| zcKm1wy{7w<;R;}SKnI#wCP;Dtn^)}aX{65$r2wU3y1po%%v#2`Cufc)BGzT$8(#_g z&bm*NZD}Sb72VpI_lPI{U5u<&XD9`C^G}+YA%2!%pimd0G_(ISg@xc!s`>?`M3tjlpOJcD3X;lRtZ7T%e_Plq^gwp0ZS?sP zrGm9j#);rfuH&z^?Zf6wvX`}{=P1mNzKZaphP;=vEI;(LPGgcN!m7-(Z% z5o8S)t~>L*gI@TUG?%6{eG1p=_sA4(TQLUX_(@xI0PX@K77$=|U@`T%+K^5Yc&~bH zs1W}YQb6+?t{$lZPTP!nt|ua@K_>LF*>70DDI>j`y3G?yl4NymYzQ>SgyD_18qqQ7 z(a{Inkzdx9B!M8SC?CEIIxg#hgX2FrtoU>xsf(?qy4COWKIQX&`iyud^Og#F+-9x) z^r+S{ZqhOCRx{AfUu zl~w-idVc-t^c7TM3LaHmAql@{cEODb!E^k>QX(d78P0)VF<4uQ(I%TzM@#LW+Vhpj`m%^pf#|5z-Oe$?HaPEZu5#BuPWDAof_v zna81{V8?X|v>srZ1_M-mg4`i=5@T|Ct8pWq;$jy7iS1ukWGS0SffZSSr0faoaG~@m6SKdo zj9ODiZ(^WqN&j5IKS$AlxQC1LNm6Mmd>8cJu7gGq^UHg`B4MIQ6GYaE1?0mmvpGXQm!spIGgKC0z&&cR&Zd$~l> zDAkiK6MkxZO1vAN`*h<7I}B|7kt~7rRW{chx*IL~A2*bT8DWKYAp4@(EWAlYsV^vs zhf~vDm+FO^cP(jLGqT-PsQ+^D|LO!*@w#+ns;*sXlQl8=7xM^n}atORezW!6LRW?~3DbN`wz zl4FSl%kP3=AAzCEp)!uEbBfWoe}i3%dekv2pRwWL$7!6MSWp&tJ%!lW9I$N*P0+Cw z0o~>-B2KT*`4(#0zbwENw=F1^a1@Sg6B?HR@F@5x<&uX$(vz?0iWKp&tV7~S;;|jL z?|tUwJcE9z8?5k>0t!+GH{J}N>b!u|P$xav77H~4X?*|AJA57RVL=E|^tvWF%7}@o zuFBYKx4`Vm&G?x9QeeJ!|T7GX0Z|jkiU3%x81W$her4KcQ43=*JimIHBR5ul`til`Z4J&6zvCSB_e9VZ@F67q`hAL`a2r@$(>In zoQ#Cy^Dj+4re^HE(h@^)D#aL8jv<7dc_jXm`bsZg&GEO0(L3QBtzM02I|e;m>AOT{#%!G)*92)<0nAl(E1+@VGbj+O7la6ZOgU~ zI<)W&TuNOB1>eMKOT@%&T<$vKyh+`wEq(Cjhn`6V<+g<5$eB`XWSAiSJx5n(rxwJc z;4fgoDvTb7%2UoEfWg1a0H79;S60AlQ)D(o!X~A_EjKJ7gH12MM?^(`zRmdB#ulQlM?K}K~j!XuylF6K!I{C zP%I1IXmBW-uIGVkU~1AYmTI;5X-Xux#sYxvVDpEuzB!VQb4WU^c>^zrr5!6^F}SbZ zwP!ygxgU&=nFU|^@$|tSzp(+BVJH}h%raAuJqpdC?uc0Vpx}{l+gsg;eDkK8*8-QT z>sB?VbNhN;jvaUAD5{+M_AAdz*{tHXtuhLmIV%wgx47Vbn18(UFF4@hJA`P7SXy>% zCS{(AjfoL&e$DHiP4Y_2%+O{iEMC!hWfCj{;Hzf(Jc4$3{n<%!tT2iQy{vck2dZmp z#<)A@9W}g_4Z9-)u93)qz`&&t2HCl5Q5b(D(&h~7#_sN(xvNX}J|`0QSyRtI-*c1J zlQjCI5g zSUI0NAot(D4J7yLC;n8L10JnrYSD<+Eq>EeKJwyul|SN~!^+{-tMjd7H8pNMhfpd@ zCbyP51IjP<5}Gmdr)t$rejMSo5j)r88@f5dpSsuOiL1P*sz`gBUBi^owJTVfV-@Rz z*oYMDe9x)J6ra>Q|CYK(^jkP~cVQlVmoJmluNeZ#Gt-mzd<~ z6TXnt%=*p*A`FdFC-az)R5-UZVj2s@s#dFRFOTcH+0qx+YdSVBiL)Lw`kke!hY zy`~5_NuRx5>+Ra?F5Rq#@?hM zg*A#BAD`&WYzV1VQA!PH0~X};gQ%YLPq748LB}ftnsnzjVf_!$1Lh$p2j;%W>O3fH zZzY@-C3n&@a*XBtU_mflaEvbw$H-dS0!@sa6yrpaz8GyirUnh-E+*YP= zl}k5#mCb{rZ85#xC*gw)O`X}9>?i#oc;k-Qxt#*5 zI6 z1j>7Wc)OOige`wz`d#SGd{BjumxgviqEij!d{WL^u4Xjl5H0jcmY3;cRQWc#AG|dq zruTBRg~7E}0Pa+e^tc9fBT7s@x!Wv{e_JzJ*#3>*Cx!b(#jGY=Xcv!+blplUkIuY7 zInZiWhs29#1bOdr0|m#?EJSBTZLrtc#1u%iTGuQRb`A!StXQze(e# z2ZW!;O(sYGxNVSaEtjd_wej*y_IkR1myENoZPlB+uh!}N$)KP=;H9YRk~L}Z_}@OQ zitGdoDLDZSKEJtz0|f2trO+cRF%20fBHpW=jV3%0oy~j z6-2?hD~kX5Ex_2M8yd{jn09n_>vdVx~S;${F|FY-*x&a^td5%lc^K8rvO7=fS z+b01=BhFT_!2C_+ziE1}j0Dbg8=)!xYqTg}G{0emL%M%(_&>icNdb$zD?lB8?SG6W bsjw8xqWd7#+`{uC2>4M|)KaLIgNOb<{KL|& literal 0 HcmV?d00001 diff --git a/docs/images/Setup-for-xRAN-Testing-with-PHY-and-Configuration-C3-for.jpg b/docs/images/Setup-for-xRAN-Testing-with-PHY-and-Configuration-C3-for.jpg deleted file mode 100644 index a5d37b0d249d02ae8ae5e56baf91858166557378..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 349572 zcmeGEbzGF|+6D|Gf+!%}EueI#G$I00O2ZHW(%lUL3+Yn21q7sX=m8`~O1euJq-*Hr zz1h!Rdq3ZDt!K~v-hbXd7C%OA@44fO^E}SujOz-0r6ltZoeUib3F)Dn>~j?)By@Tt zB$WC4_kc4}>+|+VNSM|ZQc|zvq@-wGIog?8Seqar$%e*jqG_pi6J>xt#Ka6D-xR-}k0H|-=+Y?O$2N_SlQ)aWKt}N$^%vz_+<%Lw zp{vXLj@$jFv8nNn%_m(K4f`vn>y|Jq0~*+!cM*YtA30z@rDidaApQ)oL`V{9Yi#)h zvIOo}9StfZG#y2Rf}l`0Ci^@*YRYoCmv5xJNs;)N6IuH2Nx-N^dC)zkVq{=E9i>JP zSIrcth}#H zs-%UOB!6O*^na+-X1;n_>fBoPb>gmvEw_B<%?rjK1*cq*w1z6o9RwjI=+aDFI93u{ zw7rTEDpL{6c$LQYY;yNeq%Spa818p0w!QQ%=9DK($g1S%PJFl$Zi5>p$i?hkE|Em= zsTkWe3`!Y7y%L~D6r$Z7D1tndwAQA38W8i!WM|UJU-0Sc&I3smoU|<6a8-H_2WGF? zXEDU3gCL2mM=T0zC7r71KUUQCVcH)8>gY|<++Sk}a4V5wLnxl#<-dOilO~uBUjg~4 z#OS!*#KRUQv#&_RvXcBbNM`Y-_R<@z5hVKflDMaLY45~5EWw~kB7FC(;D$R_T|ZrN zyw!TKHB5JpV96T?b^nLkSt~O84>X+>v&IW!kN9C~O7sPe}VqKAkDxXWm z$L_j%B>cAP$bs%hgqMUks|b$g@ozd{W?N}>5^?(*w!mHA zhw+qC@ev<_V*|grikFVs5AIPIy&gTkIA=8OrzjNgGGCFo+1f1}2tFyGW~-2%e6+>t ziYy#W*|~vq*Xrv=g~nDAGWK>U!`()!LC{wTk@^^!Lu^0YcxCCwCZ%JgdZn51PN)H2 zP{RVD8T83d2u(0BNLWvuaX1ByGQ#oO`^WkpB6U{1I6FDw_x(W{uvY6k(tksVbdz^| zeNDIE9IJ>#vG*R@vY7fk>cKm(5Yj4{yQ9S?m0%Wjlv9pR50q0LaiS))Vy(dLHNB(0 zkNk-SuOomy=H8Q5W{gF#!~mu@_mVKeB$>3Z#@`*i;hDVW>fii>rr@qj+XMT1x+sZl zF80Jb8A^M2hwt37uqAQuo=L5RJTiK(MHdx9{`EO>%qw~_If>yIOnP!$I>)#7xT%?> zHE1_uOJoThkt`&XXjWrgm-+W`)}PJOWWK`uoZV3Hz%npOBAF2*^4Z5hxH-QNDcdvR zEcqeFYP`9?@oa{{@HLm}yFQ`EMo6mALoTO2Qez`)Rw8+5B_|U<21{E{`OD&aR=>3z zs2AVe>=Ijgo)*PpZ&nvbxA!(JSh>q=QGV~}l)Z^aJjkGvdP($D6FKsYf<65yp5Sj> zzgd4Jc*gZ9qCC(($(}6Zv(i^#+Smf+>c^h#RY@=U9w{-fKeDCYq2tG&35^bIrpN1! zS(e>r==@NZi>$(BL1}^gCDb`+RPH=0uhcYeC66dCq4bGHYQ9Du7_?nCO;}@Q>GPJY zl5Z-JLVo3Aer#fF?ML$N#Bb@#VqyH92}{ay*~_n1RC<{B;zr`U;%YZGHi$OFHsBky zM^86?Zd{BFd=Xc>ksbRa^lECIB0l+|XGM~m zc^YN>dS1D%#jcQJyzRN^)tb!B7-wteXD+8g7|!7Jv{4TQ=vsm^f4WSj@`94M;_m3< zjp+?XXD4TQmy-?f`tjQOn#bDbHN~-_LE*fKPtof$Yfgs;hl%Udqb;9qERwo8$2r@| zJKHVa>yaMMzp0aq@o&xQc$3-Y5~%zhv;9@OZad+7m-i=;_H<}D?m0{^QX`beU9cx8 zcLdS|n%a*v0fBy1v5WxB6M{B9By$%%BqK%1)7RAEFaBrUZpv*50uM zwggcPQ;nPwQ!RDST*VU*Pf5_YRmp%(OKnAsT#dH5s@cKpcx!?&=q<>`Yaq&$*j!+$ zba*F4bST3j)2e0Yy7KPEk98X70{gn<5FyW}VH5&FU}4-e@3ao3cqM`KFW*^LpRHQ1 z2D6{D53wKUZs_VqmXpPb8FhwK(LowK8&>LV-I|3}%-$}4^PnS_fjBtX!|K)R^qlhR zgX;%e%iR377uO!`O)fk1e%yIF?exhke3h8Pj^m4Fq-J7myxaSed%LL$dZrXk4-V3> z+ZZOzzyq%{qapebR0x{S&7sqA@6pWmiFe#KV_U&?4%G$d)ak1B+zo{jnHw35;*64l z=6ILoE;Xw5J$Rriim35am7|uIR#|{v;ODmBz=bNGDW0kRM_RJ(vU0MZ0wr_DwevwV zLn6Z|!!bkA#f-&~_Eft2xUX?pXl)%81Vxkx^BIPP9Zi?NFj}e^jh+|C3}FoouXPQr zt$iCRda)2*5rqpK?F`UT+A5s9Z~!}eghh4W!(dA+OPNn16p~`?`C~H#xg6Y<8gqZ- zn#j3*-2U*hn~f=j38qr0GN1oGw^U)9gvY3_kBfLDV)(hm(R%J-+#%(9v#}Jklyv6l zcPCwV9XZSfs!ZwU8!+@+(*x)eOQmHckvPe3vi+0k@MQAdlI3GlM{a?)$9t1aHBE_^ zG}o5CiLD0ZDtoNG;#MZ(2i7-R>Qj1OB@C0xK^;UT#LeGBzfGkbhzan!nc4d3Th2qg zYc3-$?^Q$zYI<9KSkL|Par$x82O~M?+l6kcCnvHwxx#Nltec7<62y?v+MexY@os9O zdjuK;zDXare-5f`e_8rcGD4BZmT_FnSiF|Fe(F4bm_WM1v+~_t@FSnoChJ>`mEwe{ zgeu~`oiuzgvkBdv+1dJ*ey8+W$9aPT)l~s@PHj%JHdy9Yze4tL#ss1T-L+c#16uD` z^Vc&*C!L!_er$`0x{NMtY%Etzztt{(9ia1Lzp3}L7#{|k==buoF|ZSJv{caAcb3La zvxIAi>GOH2Z(DY4d>Hd9Nv>P*PL`QksfnxEuc7=o^z&%5c%04P#G~2%>L~0-m=Ae` z0PFmoFP$GOUQsgDl0Vg&eeTjC+`PA>WD#V=V#C}E#;ql^^=c3`xtKCYYEj$foPON^ z>s5k(kJ5Y4sHEW$-=RL^|Q<6zUSeJU8np zhaNa8^ddDZ#WVGB{~SZ5vWRW+q~pnQ(#Hv<&P+>TN|*E5Q{fy(dv=?CI&hfTX@ z?=ku?T!@?5$HAUps_XuP+IAa#o0`NXjxmGd`q@db!mHExRu+cR_qw7^kxtu7M@gI8 z0w3&V8=mf%LfNiMR%;JzTOg|L`MW!5UcY%gKB?JB6y@}Nb=G*bdm+>$6eWu3F?r4i zADV+UK{+zNWq9xC?!_HfZzWGv6|UM2M7svL==pLTORvgz_d<4-#H(*6_j-25%KYwK zO-=LUy4<8bwtKj+bJ+_kOPH^lN88l@0?<{bdV4FqNLvqXtF9+ z=XCIO?A6!Q=UX1KIUc#{maNXZg@7^Gv zcE&WRfS5-C_an?iOU_hL5s4W%zK?`*hYSf7IJyIT#O{#)>-fbTMx?v{IFF2k6l{Tn z^3Q9OfWNmtF~H~cp8xrK_rrT6G~j=Dz{foc`S+{Q>9g+sevC2?e1{~dDkUce{8cq} zG%>MtGPiSXwV<8_PCT%e)pkNcB6@uLxg)1SzXv>j(n3wkSxZqt$k@(?-SDlQkqNuI z4d6QgKO*izz@d$avmuSUjkT?lkh>`DKdul0j&DzM(9-S}ny_G*WhsCN%u) zoa~&mV(2t9G$M{~O@&mRzxe0v!2d*P&7Ga?g*Z6e+}zmRc-ZY6%{aK8K7Go;$<4vd z%?4b-=Hy}PZ0OEr>qPfI5BdE$&rO_+9WCsgE$nP*Zl7ytWar{6N=tkDqJRDTPdiQA zE&lx`Tc>|^3+N!n?Kd1;?3^6`dNy#Y$n9C7R~GIj*4oc4Y=AKX-XX@t&C4(Hj~jmZ z>ff*YU$<)g`&Mqgr~f~<{;#k8c&oaTiKCRA4e(NDv42n4Ki~Vmzx?NoA{@7U|6gPA zKLh=bv%pA;p^I?*Yu3cjPd;Oe0~1MM@myIA_zQ^H?GLgY@DJnv`~{AY1)DGSTKSQX zB#`8uORBlw*_v}p(^pRy-`lP3%RPyChVB1b%sX=&R6@dzfPn1ctJP_}nNpS_mSZq; zHe|G>xDxV80vDI?InHZM&s=;wn%tQA8HMT51yN$tJ_XYc4Bhk|8D{f|6MM6cJN2tg zEoTP@LiyQj!e1rdA>BbnxsO95@t+SS(frZ^W1(=!o`>0GNIwE=@CRD7d+TiM@H{y?LLnvZ%w$G|%Bt(Je_Q zgom`;4VVP4RgE~i2lPZH+L&PoPN2^-37U$C9@ZGG7oEI>2)-^Z321gGp|xf^q3mpY zlo_JqTrPe)kNG=yc0e?6q`(UbM90bb{(XAaS8>;&5=QG2gO~_T(yKyXOg`(>Q+CZw zPm?M3vkgs75{NhMtV}|hxiUPyI&c|J#}#}j3<3N_N*&?H27}HG)Eym`yntKhefIBCK%3{j6K2GkHMx=v{O-+5?2(hDIXG?!kTf1j%M3voR?o{N+zTOcjr*^r$Q9YlPU7#CY{j!m4`SB;+C7+D=xQ7_GiBCVOkAN{J;+ zKUd?30p!q}_oFNR9aGvg6_9#neZQsh(|jisJdE7Y2m~buI6m z1;X7#zwPE6Dqe3^2%^34$0Np(WrZW>En)!o;wt(h*vQB1K;M^8721hqSp#WPkP#HP zm%4yfbYLXC=ZMj|C(VnBs9x0F>IE_9Lj#%$%rJ9w1oeW^0f1;cjyGfw2_sU1Ap%6j zdkGNl$NH_j-T)FYW-}o={vCi4$~V2UI7JRMdG%cNUxwxXK9C3n5Hi92&d8o-i5|6I z{bmMbTL0D}2J!k|V_SH<#gf>=$X9y)s8yM@PBGn(0VCy*|`Gm5N zu&|!G^(Zf6FJohhr-s%PZp)vzTt`Dl_>A2BMJ-++Z2XRuvfd(xvXzt!C82KjoE2Ye60xrZME}? zAv*WJNpz#&X_jhJyUm`wQd8I1!nL*ny=6f&_4C@(IDT1eax?Q$`LkQ)r9MC8tN7@3 zI(W-iU0ofX#`;{48`N*__NikOQvdm}PG$G!gJa{F9}3Y5efYSfocV%$$)EKA0T3q&#sBw!g;{T2%lCYcsKpZ1Tkm>f0?LR&k_P{q{R z&LrHs7#@%9MrLP;ipIyFNv{L58(P(|$g6g(%_oT-9?j&GHgJnMc1;Sxp7Lb-=?xSe z^YQU@PP=Tv#=WQ_gjY%}f5nuq7MlwTPk@<&j~Rm4x<+xw|U2J7gk=At=WZw{qmxuSc4B z`cuzgEck>~!u3e>VChf}W~570z_M)K2WHf-YY?;bw0H2{`#b`Si@_IrfF2EiYM6YlPR`(=nxa)XnR@BfrZZ2< z0JB7_=c4Hi&&;6AxkpSC;pM34bGdvBg}oQf{C2`DmRrgM*&knpRs=_fr=+APWh$`H ziSgRW&3ftxNynGER#SrT2yF(xxwn-!c3HGq25DD zq{33(+Nvl@io0>Q>B__5wBQjc8eWS}Z*da8;d7#UlpuQ=E|1HlQV;kpM=I4A>U)xr z$&>1?_4H&64QOqd9}Nb5Mm#$ug7{8T9t|M19ul?&O$8eUUmoh68(1;jQYTNIDTp3> zowxEKIe%A~ogaPacVsWCN_C8rpCnqUxWo$NcsJfV7**S!gv(YY0Scpec|8E{MH}x7 zdp}-KP=F&lOKiQ1_kZK|?=zMaeaoSk4%;y4^FE~s!`n-cC93xmz$t31+%>&ELfp&evr4xE_(r$1qwxc_V z6J6}X93g1C{DXuim%We~1N$-iH}LcMrWz)&on4rJ4IjL{wm-x;DrvC7#z`KmcXWj< zj+c48ZCv5$B%k}3yd-AwH8KOj6NCX+V0J;ENm{WbzV6qfZ4Ub#Tn^(F`OXnL_cC*7xz*vRz z+53W`(uf<8%|Z7erwme;nwnS*8QpqUsV11PUx-WO*wDGNfQIbW)CfL;_73MX7;s(1 zS@)}q?$bxDO;9i>kPuOOZGYi19WC(IO-Bx$LJzeQGIngb?4UD}&|CEHu$$*)q0+AA z*C?G%Lc_bcil}fnK2Qq1)?Rby9k<~!Yg;;PH92|i1Ul}vcIj}wPrrhBErXa)-9c`| z#gW}YR>Sn~;LW9zISlvnxL$;RT@_)WUX1eZ=;`T6O0Ze?p8aics4TCt7t<5cbX7rE z;dzx{Ua-)hO5@NS#^-Rhd&5!c(eyFNQ!>ykafF$vLI1@>o3 zkT9C&^q7tDg@5$(FvO(hXNAB=7CJ=b!Cm;N=mxkIy`w^UJ0!BYEr!OI3sM+Mpjy_5 zaitRLso9|R#|RSO`-e1ulA`8mA%_l)6G?3{!}Ri_q9&S_&*0lEr89Q^9bT(_(N=bu zlzyPuS!pR62L>DgL}^AA=vLcUrSWC^y3|41xFa$(U5}~VZM=7hCw3DhmJTvJp3S;1 zT%LB?M0bXjsO#~f;JG0?1pW?X|4Aeo2ycxKwb*fwEyM6gfA6j*t-hd#t^(jp1Fw+qb6 z?zaZda^>=LZ;Ii$i~8ch>cIQuOZ@EWOBkvI%30JyT-2NTH)CQ!~ zH)rYaPJxVuR3;Z+@7^sFhb3G(CqhF7#TcYf;H0ZYE9eP z`avm6l_2WKS`j}-Ov=GBr$DMwjWN6MR5P})3sa6={umPN7hJt}yEdPkgrgR18pBt5 zv?@ySg6EI7Ton^=y*r1-DokdM-HlXDh@7{?%(ZX{xtw3=H60Xx;qqL27jQRpLbRMQ zisUJ$QW9tO4>t{)X|mey+C*g;4r=_nTfG+hs1$zR=aYRWLrCHys|I0kLh_{>DqRXq zZ&{j(S3KJYid;F1{|9t>UseoyUm=jcy>e8GSOaSwB|rBIA`)3^3!6wn^4cyvr$p#k zK85OFekCfN@d3cU_s5~IqkL*&sS9EvGTn4kyc=#aIg!1!u${Z1%6>iyHpXu~pp)}D zl!~t>Edv`V-T7ByYZQk@M~P;p3$wWz3}QJ^@zAgeLWz|{Mea?g6H?$ct#;RFOO*3t zk#lhtqGJ--_B}aU>xp#eiKWB1R!UiwlAnOSrb9D>70qu~&ychBKg$oVidl`n@pQdl zYeCqaVIx1rmu<4z={fD-*bO7UhNX$7>=3#Qg!4p^H==>~Yga)025t)hb$f&ZjB6le zo2e#Iv5O+>-jxZlqCK|M3BHa2*9sG-3-r)L$m-$gQRYsVb`hDeq0cS~-ew`oEgXEW zHNM`QeF$HLPMCc9mY$!g!9*eI{KlIPlLCROgf(;-#4orpnx zkX`c-p6W%^(USI*udvb$9YoEwM9h;JLQEkn*7cCQ`~bzX&T02!5o|csY^t&zjk*@W z_(^#_@?&Dz%LD1vogoU2Mkm{}rzYNQ{vCM<2}!kx+~I+}dPJ9~x@ZzLs12FoIH*Kcq3biwL|5s-pg z%Qd{513Nik3p1E&rXkaD)ql)|iib_g&j~p=UhP~2!YY-m5=*sq$%G@7+bPPKy!@8v znDkGg4QBZ`uCGi+FtE7tEOsm+M}&EZi=*reZX}3gMOgIy8&?e=21rDzG!=dc*xu`} zwe9zAnuQ=22b(AIH1Ms}bUcCY-mImUEy2cy?cYIE81$}ZXiFauMUDnSz?^e;92z8 zrT`SY-9I!sN#QaU@30u&1=Y?MWl^E2`0|A*p;(uE_jI0ZXi%5XM%j%eMysII6+skP zo4KVm8wLQS8tIZw^FCa2?`1I{V8Tg?vb#JKfS+`NmO>TdU+d`++W9UnyLTSa8B6H7 zB$6I_pGAs)50fD(i6mqZSoZHwh8%{tw=pqDPgg#rd}tkyz$le%H<4lDCJ{&gxl2!v}-HC322oJ)+`m^ZCf~8#=?w#jLh)mKbk+;OFQkq z>RrN)F8;15>phdK3X5l;jzz_@YUs;a?Jb+zdnIzXoT3Hs_Q6~?z!yJVHG>WXM@APG z7G8b^gTY$$mM-3x`F@emiMJqO8577e*rWD)U2gN&O@iK|F$KlmmOnc(TJ}dj+AVOi zI4mmQWi!FXAXXC|s-1# zK=gp{W@89NwSh1qQ9nlcJvxqjYDHThkq6~WFrloib% zrR5X4G)tQ~OgUxT3|t{?1Zw zJjT);;2${0!TL-SDMF081Dba;f|PEx2SBo1tI zeXQ;maY0-f3f-_Wp3G`EZS7U=(|Ab{V?(Fc3a!lW^Vtm$bX@+CHIVWEEasStEC-(aHv!CAor_-A;g_?gpT zQGdeeOkmDq43az?J?T3|_gCgjSqQ-EMOW!z=Anx& z@o@NoQq&iyVwmrhCl+s>o5~yetGxH8*L<}dCE;Yo#;Q6u_7hN$G8tZ(XInRy>)|&b zKh~q*diA{zjVkJ?a%l)Tl@^{=?Zk5zMX-^f|G`T-xg93uBs3BXZw@y*i}1qgY$N~O zYCo%J%e3av6hil}A#L!MoAbiaAcXz5N={G%Cx)F3dUn;D}(hsQa0Fuo(+F z7Rg{s)(->pQJ9LM9+vH@y*4xgQFF2~dI030%YyHK{7RHObpwjs4| zcoC>aI=Yb?mW8l7DH+0vtO!IssK?B=qKS7jSJnI9pcTlThmd=>_j;uEt? z-KKpb;KtXuU}2x7!6fI?x-|pM$?>rZmmfk5hz5Bo@qy&l;)lEvAa1R*&z3jB3l`w- zR4%(vGeJP9}Xp5 zWq2;d2_EHsLGySnri>`8`bgg&}dRZ7&d8qwC(12 zNrmUp1__tZ^HCFI=Bp2w~|Jl3L9fV>0796m29!YMr#03S?$OP7DJZ7#6 z$&TLh5N@vtghN^=$ADBh7#w1?Hum@TYmb+6+qP_j%?ru~G$kmWTB<3C!#nCWONDc| zr?c}KgqSP&XTWyR+cV@jv=?OtEh&Jmk!$`P z>D1ALb7{O~p;rneu$`?maiUVA;InkbB;#E}>if>{JInn~6g_Jehzo}oXS1=f#cD8H zo12F~sr^I}*g!=2X^t;3$pkrx#OgVT`Z6zuAV3PrC@uhDhNkJskK3f%&<%Uw#Z)ZfXNk!_lsm|7W+Q)@l-A@~6cGxNSphLx37j^EAo z6#w@bkPJOu~!mid(lEM*2!+~X zId(E82!E#XX4o>!0%Mh~QXMDwA$h{hXNZa*m(4&L*gfN>1Aof(JK@mybV4v?^fwKS zG(iU=k%W?@I!2I7MPZ>3RyX9S&Geyn>RL6Q^M=*lkG8YjJG6VGh{`RaA<%4ECjDun zr#6{Q-e>!)yp!SvNA_>Q$V-LlMN6O1s3QtD3cZiMKETK7*A!Lw)G@}Q`N9d@>0|;9 zGjur?3BqToY6K*`$HB5J(4|G+S~^II&P@#QJJg4^pPwBE@W1om7y zwN71Wj~1lGmdsNpRYl^iA>}oHbzMUHh#M2(HXGfxnOSMt)nh1IdTQf+YK}pRuQsFo zv)t`?Y9D7MR=rAI?8i~xz;+pe@Fefg9S_OJp-a-?IiEf~0^81!scUmq@L}+4nEH2s z$5|ti`b#P+ncriQ;z1Qs;%@R{jL^l{K@Geco13sf)?D{*kAgb}KS>>ok!qIe#-ie* zb^i7Mf1lH6qZe`5a%BLlk?^Oxm);gc1iDqGid4)BAm03zYRjcrDD{8_&uju3LA1zz z!KJT`I+v(?+gG+!0hvxLsgevM-Z*q16TN7(dOB%CyxC*NcT5YB>1WW54r`q^i!H;qS|6RRww zr8+gt3n?Bd;5kQ~5>CDRSBoipML9K}`3kGb7t5`W+WqgMnHG^n_0)PO-RUGym<2HX zdIIwBaK+lB!#N{rbYhuF)o5$7qQd9mSSz(8p^hCxC=Wn8IG5vcfk;Qv!k##yQb_X( zC>b=mBa7A`r!&Wiiaz4nN6udyedq4Iu2VSdfW{D=yi~WId!;{>I8r;QoX;v1Y*|`Z z8r2gPwzkmX2N5zdCK9v$emyJ{S~4YUQPWv{zWAdp5LRG)u|l9bTWz6w9of~@b$J$o zOSex*stQ6w)H}kN#0Q2=bV%r(4G07}ut^;W3z@04>jl5sp_Y1&*?m)3wP%RVTB-yR zEHg-~wKAVfL&F{+>Sr2Enpc(qDoilR#Y9vl?cW|JYRGIQUVSb}9q9=H)!KH~no;pP zYhey#%oLs>5l!VIXnbD10BobQZXW@&!i+$fUgHxm0M0hux~X;pX&O%ziYW8gk^sEE zJlq`@iK&A*55Ej%Y7(>`%p!@qQrFN}nR%KIQE34h(7%J-cYO~!$hsv+Gjl$LxP%|S z09b?FDAo^PpxdjZozNfWAsM|T=gqfCmWd>b55^op4_TMpZlGG%M}G`P!`Cc zF5Qccy~Xwe9OH{dUql0&?^+>1l5r<|UedGn^XJE8U93u$TTPD#q>X#781h;klw8z)lN`Rh2*R&48b?E)2t zdmBbJ5aaaQO>_Dlx>?$28+|_b>-x4gyFi@l$v0uZm79ws6A#Z8Q^%VFMQwX<>lsML0bDk8PzVs3Y7)@fk-^e}>y$7rQ5nQ}tu4`KndoQN>>|mA@0nItXd>&dhNF!Ca!6nwmx{4d(%BpTi-o3L|L< zAG`ueMGotVoXO#W++6KO@A~X|QSLUa@RfyHmDcCMJfR;sycaRx>&ku&uyLo%i&@zs zJfhx5FT@Ani18kMhPPw zu8O=o)BJ%vng!95*{YE%qZTf&e0ZjFLt9pDhXMXL1xCs6YRouzx8?zySiO%7nZ3!px?2? zYD~S!5UDje$S}9~WvSen-fhJ3NMx<~0X@|r9?9>qsecxnIwKjDB1@z%~d zh+vBzzVhDxm>B_x?N5+d3!oy=wJlfM!u;K<=RZ08o&tH?oYGSE`Kui_x56L^BVhZj zKTf^>U7%XXU84Tv1_~%|O9jWTvC+7w)_I^#^xm}CC$m; zlCYa?(@}|CB%r26Fnu?MUC)Wer4RD#p>2U^Zl2yiy@HHRJr|`}n!}4U*J+E`XKohi zZKY6PdPr(#9pz^|H%s6fnk@~Ru=G-n#;r@DkbeQqUMy2QpjQiCx7g zg`CZ2Jyz4XOnTy?g2m6em4#4o2A-~_)$KHF3T5PfECWX0L$La4MR*<_bqbI6oApf& zrWpW4Ick%X$Fu_|cM$%wdax~VK%%b9yk2<%3kw*x#9sbel>RAPuX2%_ab>q`Ei+F$ z7?$J>&Q-1%OY{XThI4NVK-?7F8crZ5%^bjI*QKGwn5JSRkcxenIUqm7(=xYpekY2h ztciPm@4diQrS=4%XNK^NqOzUibb`3c%T@6O_*VUZk1d4x?L{QPJMWp9`ElR+-UWiD zrfu+y(Ddzo9>1=FjLQYkTP~qwRT6{#*c$fW7qFFBz+YpJNdkk!R+5ZezX~q?hHrGZ zHY8k9UTfT59pr>g<-3Ss@U50eX`tc#*>H39*xo_LNt0IPTRC0N_0K>ROQEx{IIw{J zfGs^5klJI=kSY!Q8(nlnJGQvU^>J;BOSK|{1t8O~>ZK*1B1On%N>^3&V_9X=^k=)z zZ28fGOCiovu%S5$PwUyAk`oe31Af;B?lAI&q*~8541Jt3pKYrHo0JjDXeN92F?CIs zjYl@CBCcDLml=SplKm>HA8w2P>OX9Iwjzf%9>e2)QGH-v5NBf9Ex8|}yB^AyKhVV2 z_+td$ev7F)p0(>@ z=C6Z5Ah7wCtC^Ng0SG)YYI6rU)WT|Yv=k_zgPf0*bwS0i;ZeuyZvjIP+r{@gMphAM z%yJ=3!QT)wG?N0W3VnUNSA`cst9zDsGT;$P28uKK3}w>cL@u++EcAKtcq5NuCfk;N z`(rm=eE_mdkF~)WXlyZ)Rgr(PG}lM@jWVzRT-RO_;<>Qvd(tR)GV3I4cy)c!5`7C1 z={ujpH_KYYu;**UWmy>6^%{8ZVUi5`vfTIp4N5MHoAl)gIvRGHjxP1@81P=z&43h%Fp))^FD(BeowKWoDM)VLI!5&`&wB&5)?)s@=40V`tUUr^%bfXQcsk z0W`?%&bR7)pa#N9Xuf_m!)qxS=!EYBdSGeXqhXD{IZ6xZE*UD1T-fUgU_B{yZtLYye)&sA_T_Ezh<9@wR)C7< zl?(p`8*cq5K)j|b zJI|5SrTt!x-8x%wxgw-ILXw$iI1IYV!UQ%T#*-CU3ZWCSacL628(QYkZ?%+SRcb-4 zpTF>LTA}X-)DaF}j@LrQETo}P#0_ZxM%;1urSAV9HBNZ!`fgHyQYdwb{%VgQ|Jxpa zk@-*x;@@SCIjxBHVTByml(`(b+;Xj&3H=#|IbX+4Ld}lUh0B%W-e#Rg6>7+#2A503 zFxAX+HK^{09KcU<38{jyC{xh5MqY+)LralE%`$ylXWe0u+lmJZxA5$+7)0zk>jf2_ z2Z|`CeYfPUrWfG9n0T5&VL$_#VOqS+_vwignJ|A*5s9q(D93Iz@L=&v!zKWAx0BXy zd0DjRu@=f_=9%Il6xX>EeiHPk7dI==PY9V_#7fy6s`1p;e`^a4{YTf={(`wbvVa^mz)22wkbunXgsR;it?eD;&urx_cS8jhyq%hsA9Jk#=Db-_+qIsb zIqzUM1GeFESnALMTWdp`t1Fjo`9ajC&jb2Aq~+!AkHY6K8P-7n;A}eEX%aUR$|^{H ztKN3Gc>Ve{Ze(O6u(oK_XVH)okQPpRC0_JbMvu`rDbY^|j*8n;6OHPF` zw5uncMfhmSHx?}E3z)M>->GdoJ5)T?RiLue8vxGy5jT|r`}N_^6}EE?N+%hLbqJ^ zxYX^uYm#L|D%GajDS)L>>lc0L>_z><|qZ2oVkTXH?Th%xcBrIM~T84pi6-U zf%=sG5=Lc?8^7*?mDPdDZ#Pd7OzrCq?eV^gh83Y*W!f1lLp25Kvu)f43&J9JXi-cNpW#st=aWqzWAK+;EoB0m-a1=oOz9n zjlltu%a(DFw(7iL))hhO05H7e6H6;A*kUksl-$QBKPPT$WLmCD?0kyo3KFSuw?FPe zE_S@f+L{cpZ!U%tAq1J1%M8L9dGCyL&MF#VfHik$0^G=`>J&pEm2dmEg4eyLy`B3`NF6Cs(EOTy%JzduY*yRFXO$_|Dvy%?uHbGa5*nWb; z-~o$yi_Xr&>mXu%5`&BB38Cq2n=2uqKUpJJJ^{$2m!f7G2Rc2GnO?-NyV3pl@t_(E z?gC1h_L1g*a!fkZYgf12cLwM3yIAD>)^7d6qGf<$0c3`kh)pLBje3Nr3-DZaNAnuP zf$BjSCnqO}rx7}ZtEdVRXN{ck%L7^e?oudFroC@hrd{>qMFa^hLx#JN`L-{rl^-Il|&lgG^(koEh~OhC6j8Do;W%A?5lU-sQ8Qhe094M*rLYc zAz&FMeb3vNUorDf&oJJW9domMxh-`Wb^g^C{nInAXm6R7O2M;WCSZAI9HPrRX$Dho z?a>!)6abBhBylkj-BZoy6~G<(!T@*J6qS$i7xVjzcK?G3#)SX_5=u}wXb4CI^JmIG zzv@>%?Jy6x&(4xa5`Zb`S13~d0=579K!O@r;lNsz4eS=DEvblTo%&;1pniuoh}k&_ zIW*{{1;Ps(`nkfnG(j{V=QFH%#2YY^B)A!{5J2kE4xc0 zEkQuwOIREdkmVf591y0LQXq?;8|oYrb*TT$?hfAYjNbq~Px923t*bz4`OiiX&e{d1 zg~mqfvlR*)q&t85%RrALnH@+egc6G7nl*`a{~gkQ{X6;K&V9V?nGg4^c~*=i5PRm6n;)(lu&;A`S~jL0AFuos*0h$u8xF) zL%@0l92rF^{DMI_BUd$FX{a-txO;9c9i50(_GfQmJ^;NcyYtOVe%F`#IQ{XR!6N!f zX~(<#It9}ikV{RfXAr-hr>zxc%H}t>!hMyS7eJMXJ%5{%r&U*dooVU z)jI|2RGUkh4P?X@Vd`HTu1f)}8yFPxI<_Vgu%(cekufvpQEQtgq89U(WsOr~xQ{o+ z8-w;2vc?$?h)v#y%8$M{^wZsvZ3=%15x~h*`qu2$?U`Eg>i!sD3yhBpYIXL8VWFX~ zyNDQHy_>GFVt8;pUS?1>>hwZWP0)2qD@Dkqa5y+909Xi?@RhGjzd6Nr0a8-!0EDM` zRMt%D0q-+jMbNCi7?QxM{h?6p%d?7#3g_)Kodaox^p((E1O5WMCTZ_rV`Cd}gr<4>_^hvw5ez8mXCRj#n+*v> z!)6AP;n9y5X+{GInst~e=#Whyrd?X+cOyo~tQPX&>!>SgFrb$geiW(9rjSC{Eh!`7wOy)U!+A)K>_1*i=TLn z^%S>Mm6)W_%a>vFMk3B@F$CWm0JcAxD~AsRG;0}YXe5%2f!RJB5WkWAxti&haSxkH z0jP-2_BdFZy1<7SAtaz>uKkja)^ZHb5&?44+zELy^ ztcR#)Dg7%9=6{A1@SObVeXHam)SHixH16U5%?_Ze{ z05~CxNJ9Aw`9VUVN6x#Cw>w)ewN5OU-SNs2k3NCX3;O#`>u94VyO_O3P9>ycs zpKW6pN2|k%6N=Z&G zzY)_r`^_*5IOp|wA)EsuD}Hr|@3K1&bUrIh?DWU~!`D~GRoN|V3(`oJbV#R2cWtCM zEr^tKNq2+PmQ+9*q*Fq=l@3w5L%O?5zQuFi6Yq0gzkfIU_P*DwnYpgHX4bkNCiA{Y z){QG=Z827UyXCyvM?t*OU`ddYvno!`*`VbXo(BRAPAsp660Xz)jHOJ@V-$zb!V)WX6G>`>Oyf9jR$DQt)k~-10!I;i8}3 zgJG`k(Mm5jNYJ_8laR3}RDR!F^0~A;ef(MmBl1f}tuF zuMLd#29f^E*X=HWl9qCSYrqmZ#_x7LwL*-xo01d9x(aaq!c*{crXapH**6-&$PR#GC5l_T!&r)(W)?8Rf+c z{h13Rz^Nm^K%i!Wy4A|vf!`Pa9k`>otQBhDdzq`o=YC+wbW>i+zkg3!3f1$OZ~2|> ze)}-1eDcrR0|C@w)N@ab3fFnEv$J6$B#uieJ!3_h*+D@FxzV;=_!2Z;5J2ZXn=zte zbVpN`jXLnJ>ovNX9>f&b?Et+;5sv|?(Zy>u8s@q`&lZ1w$Sc@xt$bpu<8|iL%#&lw z`KI~?RF6NUWm0NTengT5)thN=(H#yzsWoa)nw}*0livOb^-^Q~nZU+r^kj*-cwQV( zuMVVW=}7~TB?m|qj4s(S(Rl#i)uSmyEWkSCZ$UrX0vsilPvQdYw5(^QReU7f9UZb1 zXh0+>+w?kIl14*CRozlkQwzIuY;ata5Ak3np#71=CG#YtM88>(T*PyfR$>YC);9od zYT3kf_YsKQ96SU!u}0wH;jJjt#Yq_5Rrs92OZulNiD>$Kp*vwNd z$PE&%VvPN#aKOWRDjm}k*kaWA&XO@r(B&QTi;{vu<1$|%*BzBDZI$k}1}%M$V4&*= z<+ix(&z}HjVKV(;LzMYm0P-dE=Js|I&@_BP!soy&amBgYUi-~5tQR8*+A-P<&X!8C zxq%QpRcbF!6CoEV-tFU<9ttXO<8SdKb+jfkWDOih{D9mAaz0a_yvy})u0kO=N4>?o z@~2%%=e*Bfhj1pQmmGZhnd+}`=#}C2!|1amW&X7F*fIBEyE543>+4Hm=L=FuBrSIw zr(@3wIE}1oVv?gv=OMi_{+Se{;V3|iOGb&9)Pl5W3!oXkS4=(!-;m`Ayi7p9ERl8; z9Stq(;J`k208|;!bYVGA%xG?{M1VD({pzVHQeSBC*_<%&(=0;5Ab|h{&9XdtXJPb5MeuTADV^w<_Yct(!)O@D(b}=rI@d<66g@UrFxI}5pWufHd&{O zP5F3cRbAcGXJ^^bqFF#a1c{HBPzaMkSlbdLOhV9gmSuYK@DIuNUyNBWV5FK+xvz&Jq!*_zKmtohT)*Fc*h{uH$H>xiZt; zaZ;#7AfR$VJruwBxhto`snJoUwkh-D;_#U@i|{LYl%cGQpiaUhVAoAt z`;n#q7(nAJq_niu`S!}CFp?!UHntFqKYS=x-K2fS&dxrXDTQpbNa3Xbt|-I#tX(0A z$D4eeg8L=u8qk+GcV$F$LRvydx{zB`alG@*g+q~At~`qIB!7xCAc=&@$1zgFZWT>&Kyb5Cm{b__exT!_ zPQn;i+}xBy#w1fgaGzD?v#HFi(ES@$5!SFgx_Y)d zGh*O(OQ#9c1t~O!&$fIY{lH6bEJpH_IE>l=;K z*{7Z*h!m`uxfE25I@MOWn{BU?rrMW4oN}Kw1ng#l2kFeeFh|xQ8+E9}<`!TYRq*%`qGc^&!v(z3V2zUitJ|Ho} zqlN0LS@SHRb@Lz`ks423pVR#zA&W-=e!|(UV!j~R)kNDSWOU}x{rykw9VPP#1ap<& zoo_5}mr=`oJh!&C4rfSVwO+2JIA0vR_PjbNRNG%)mjTp_{%osT%LgXKSNS-)oy#fF zT)<&tb#PE+Yy5Kx?dWpMK-Vy+ur~p({WOxVtZ=q@wtC5|RjT-ArY0T|1IoI=T}ifA zHE{@jvj;cFKNTp*LLU*+c(}$1t@p);Yd`LpCkZEDq1Q6Uru7B0J;UkRRg4T2{S@R0 zY_IZ&`*(LL-b+c9y{e76hcoKoc!4j-ouIl^H#Gc|hk^Kq^c`TX{2;Ky+z;tR#n+gG z4nD!SJhaZ6k}pW~e-yUhu%AYXJ34-$MG^MF>KeIbkdCQcSYEHyl^rBMIJ8;lh?T|9?l}P z;O+rcTrm*0&@XS-K_x?2Q7dcA#LO&@cI&-AFVc%g)~<3L6kPmJPy}t2=5haRH#kY=znV@HHf9I%5%$B@9Hi|2?|=V`?`&fi z=r!_^i+XD(+4O&88wIE5b0ZX=!zr}fldoC?*Bs>^8bwMUTVh4teW#cvsm}r3#A}E0mxUQdr1RruKC=* zRJT>>;vH=$w7%3>n%9(G?gT7-1tCE6{nbtE-#SD)5Do@c-lR<>>INvZ)Ow zlys6Y7DVfaPyRcvKf`seaA71D^a#Fkvys)Lmj8~@1GD- z8ayGkh0gd}9qt19$nWti35Z;VD1Y8(|7=`PPN^yrUc>)g`&*~}8rb2{|2s28Q$Zqb zL%6%tE#C|scZw_PCIJyvd^Q(CrOKhB5hyMgK%cocTB1+TD@22iyU4_uhT-@}KmD}> z@XYy4=D``(-?_q>vN$2_5tKxeMd?#2!oE%!TMu(K~omO-Sqw$|`T>SiSgtX&j`Y&*w zG}PD2wLt`&xx5r0|7F8}M}xgS2pGZrDdY9Oo8}iIf-@qlsf?aSvcN7hL?hQoKxT^m z>@_@GEFz37FDaJwxrxLQxJuk|H{kkSC??TMO%Y#yW~-5JMQp^G724QHBMaFuTldv9 zJpcQb|EsU@6_~wa`M=u&U*}Ob@Mw?Hwc{q0!*E%o;w<)MY`)x@q2j)b>j?y13&`ev z(t^a>v9*d+ zTM+8e_rucD)8#kJ&SDrtZC!EkC+Yt`PL2t(hKv6vl>dGNH-rfA2wd27peL(iQ!X9Y z0YofR#V||2AuolUO`uouXA?5<^q_gX33>7E0XHVZLE7nMC z8~(Q#C+>=4p({!`#vUIE@6>2MftyH#AWnr2cHuj`@FT>(2OD-dDtr9i(lHxrYtL_p zC~(O)Vs=efYAL$a666{?t=-?HX+QcuMBx&NUzabw#dUW_HjJ}Eq#rha=A>H#3A&sH zSm`qgp89`>hcMo~QaDv^RxMem+<1kuaH9xiGAFFoj_JwjAf++kLVyW4sc3h$pn_*| zl*Pd*oq7u-Ap$HISt&7f%I>wz?tmv~#_V<&a{PUpv_l`D<5E8F8tQzdyxE^QMkQZ` z`Qke~{EK@y8&ff&`F9NcPt_b?4*9AfL6b6}8-{!BY9UV0->$yIC0J^sM;O>)(;40? zL3Q7+aHpL_11oy7N^6Mx_a9whg?kxOclz}Wvu0byTB|NWR!6D`d=~ZX+;_pvg?gDQm zK{L~r)qyBgr21Z1zs6Q@=OJ7^68q{;O}m9^ehJFL_pA<;P_t#5 z6wtt!f|6bP&;v*Erk|`Rpa5xQDQmOpLVWrpy> zswNF1=npQ+e?I@?p4gcqBRTEf6UZ|U+b9bjU`+R-$^W8ZCQvFa37VhSYR~-FunN(X zVM)snEbMYYI4=U)yqp~EG(`F;J9tp0o;Aa1{|!bBIpM6qLJxUAFjl~6GHP`hy?S~u z1wj6A>Zp4QDhd3QLBK+2k{$u(YA^c~=kGl9OTfMCpbz%Z#y^@#0`w-&=w(?|89A!0 z^=5+7GQ%seWuda4>=N#z0G{>3j5GchFcRAn{%cg708<_A^hD>l?IJA8f zIMyFIp3Cu&jBL)JezYZCCX4vWLf|x%fbRQ5-YI5d=|lfF*Rb8cZJ){WugPFd+x1tg zg<3O68Z9=mW(wJJUH3a;j12EYcE2N09;Ih>EFei8jv8|P{kcri?t@>StxDs;0O=!D zqw!v2Bv7UJi=g2y7xUy*0%&yo3LUhT&DA|Q4P2Fs*`VQuEh)33;HLeWtdRa+4l;;c zUIQY{ZsrsGsduR;1V%DkV*ujv>?aDL-~-_Jii_ZKbPo#jKiodEH+k5rua?zNbOSwAL50lx}+Me$h)x2>u8$ImE0NU zlUXIti;Kcu`=bj_)&7RnLicaN8nk{72r$v8+$MBSE-W9-VGud#Hz{2!>*sE}QEsMH z`eeV;C^doO>{6QiAe&$pGBQoxeR?*gmBf;Oe(F<7NYJ;gT;Jg}IeCGg)3{9=Jcl_k zF}KuEvZvl`|F$TXF-P0iC7wA$5)~$gPo5%PODUXLT-&x8K)jxr+_Plk3IORbA)V+# z3r=td!Ydn6q%~GxJg1L*FPzlwxz^^lnO`;3vQ^)t0_6T~#h8Z(tT?n^UYaVb<79O( zqb#I8G!LRnP4V|Z!41Y&MFHeTyVBbMY~M9?%Ik9}<}Xx-M4en&w2&Yw&W8*d|8_9{ zW`Ofgg7kN^wQzS$&4m2)`RxTGd}kbkei$^GmwVZAU~LV3A#t(P32qXZ!#Im2{oQCE z+w!tLp>5A1I54AiB37OV<3pp|1abIXUYZQM<<=tt_gk$7zEN(!S~JSeQ??BSs$AOn zhM#@ZpJ*^IacT4>D=yu)6ZWwc5rt z;y;;ik0tzXQT>x|zj!rr6>%yP%w8{Xq+lxexgdLa)(xe)d8r)22Q(->@8{bW%Ue|U z8#~z?%|XN1&LqGWbtj{{V#}`!f+!ix1sd2YU!7(9t}O2sa?{b%jojtk%DYiKXLR{! zR#LA#6_U zW60Zvx)A78#W_9bs=&iu}%9RFQhSXpH_;M2!z0{Q_?x_A`yVmC%? z($Bkl)pc&cw9nZ4>D?dzSi3{t?7e6J>kvu%XgmY{V4T6>iu`x>5rSf(8Pjw8f-yF9 z4P*>#I+CmiPwetke-RLN{c`fpyyO)#w^rYwNf;>rqAcbZN-B^8KSbo@o2Og4_koHt zfd!;^x1Py=H7@+svF(YBzSh&=JEDphb;!Kubl#c85M*fMG-&cQK!ekzZ52Z#`XTdX zD?a;yfgMKnkmQZ4PSB%|>L3|dd{_9{E4`T9Fogi_6Xe{guA`mm|3Q zZzkhb@$nK|umYzllzG*)VtQx>4$<#E)Qam<>@7WNDsYs2ZKW#$vE$#V7J?4e7N0X4 zm!t(y4NXIK-9-N}T2xPd-;IpI?Ej_|492yv9?$$|V3lLSQCEq>!!;x9@XzJ|wEvzX znIujvU-C#bYaSVeS>mfBJTHeVz9d9Imn$6CI?i0e2q4g3)=ZL!VQdR9;*UC94mxmw5Fd@yO3XmWy0F`hVCX#)Z2wx3DghER3FIvjwmk~G?OuI> zZlUlJW`Qm~c>-jeT_kVC1cjMw$)0N}C^VlX9s`p~`S5XA7&Iqbi=uJ_m-ZhpijIna zzHyE)#-v+9c%) z`_6OMIff%19)ZU>7-)>Kp|O=FG1&69O?ZA+g! z87#Uph2)8eyXl^mSTkbS5trE5f44KYXip~vpZ>#kc&M^gd-x>7pUFCrkklZ;kTCiW zP8YVPx3L!A6Ocz*W8CDhHjOz_YCncTJX#5)9$KD>gL=RNSn?&EAzvV*SKSD0>{rZy z%P(rq;`Ke*Wjcwa9m?J@HZ~I{_Cw?H3+frfK!}W>+0MU43%`Ctjo288NG~?fuk6Q5 zupLUg^t0MxWh=RG4x{}L+kM9-jO)uTjHmMiV@q4hU9BWDX=}E+QPQGLr?8){$^9o@ zX0ifdU-4)z8j%+2;*w7;dvVgvbbdW3Z$euRhDguT^AKD2`?h#bqe6isMVMa_L^Z?| zO`h_@5}3?qn=I#_cLA(%JCvA*0kRj;^N9jsC&S;(mTy`xlgYy?XW@42veIv}Ye4pT zfy_0ADZs26eP}j7GtM_*@44!Jq1R%+0(IbDQwfQ(;yAP)^F=CJ@JUlH^%m%VMA*7Q z4aE!4m9EyX5nzJr+HzsI<`QuQQi#&nPoQ&2Gei-cH%g^f##IhkJ-w;v8Q*(>IzAHoj8Rzne|AG-I8Y z7mC)6+Y;n1lD*p=gN(G8-n~q&^$yKrFAfIQp$qH)aC1`0ujTTL{+SC=`VXHDV`_T# zfF+2mg%chS&~Tk*e*;h2n=&%zg#cnsD)@+juX7s64TdkW>cpxGNFb|dmuhf+%4kQY zpDuFn8;EdZ_$WJve}_kJ4AzI9tT?2`j<}`o9xrD>$8I$0gIed6j?EE|e zKt>2~t}vsqnhU-cdADfFU6m`mH2pqg9lg0ag&hCImfp|TZfm9r0r9F%{R7Ij_s$lc zPU}n)R@}HdhQ&g`<1y^a5RqA3Mtxy+=t5Y|m{6PZ0FSnr4En>F_`D^WlDy)&N;W}J z*vFkZXsum%%)1wgqAh!)Ew(t!>OGpzvgEtNGEql-i+ekwnByjgAA-Fxl44vibq ztlYl*w%Bl&J{kw#G$Pj1T6KUzE_6FsAYy^=mog*!gbEc$T4fENS{(l}Q-m2sB8w6z z3jT};NO9E3bqD@^{p!h~kTmS)eGf>#YtKk!HFYwt9t}qjF{=W)P>-es;tl2VTjN|ceEJc9qEVI@ z?MwDzq=fv|i!=4(yMr%YQS+u44?ZLzOm^NhM3bs73U5+o&Fgu-`z>JK|4Xqs*xw;S z{_Eo>LEacLx5nkIwr{KT9}-3v$;5|Sb{0SJ6@@lN&yMM-+0|QDf_EWDA0^koihm3h z?dFA(@Vs?FOV=+QH7F;UW=(YT%Ja$?-OR&3PxX_Hz2i4mNlZ-p89m_@N8tKV!)A)E zeTm$S@3d&ePiDQ+G zd*=FgNr2nPxngFcr5k;PN%6Zsg>PTiMbT5 zu~9#U4p-|M%8AjJ*)e+8Rgjns`k+KI$z;SN$7$aSngN|Jn(XpgXHPF@suG5?--hY@ zj=a0X^2^a)WE&bqkjN^`A!`NR8RgeCnTc^v^pP;(=w%T~sAa#iH5CrH7c%oa8nEWo z^c{KTwG3Vce)w+6IPH!25KW6lmbmRcW>k+Mb zeK{zgcp7pT$)gX47yF@bH%vh#zKg9>Z1k>JBC8h;-lszBKLNfh+7h#cIU`U7pWK00~ zcstso?|{xzMWd+rAENY6|F7%&r#ZvYZ@F1oxnDDhxZ5;`X=qA@506d=T8{sclr;LV z61hLYCi5M))ihC7BaSIO!>n~q?@7tX#QxQs4EIvyLN24x)pVs=!e86?SdBGotz|~N zGA-lxtg_#YlcIWp*kH8p;{^lt?)7K(H%9N?af;y5Aizk1pn7263Zp4ge%>dGHGIpG zSmJvP>Gq-UM&pE)dI5H`30-w^T|cu?X33;szp((q?zfkpVa@Zsh21+3+ZtE!>Mcel zN>EDOjn}0M=DrApLn_%gZHbt~Me4U` z*iTace40IJe?WS#2S<{leE$#l*MsT zZx<3D->f5VwwYcZUgUF%BBOyTD4Z=^tq0_Ng2eZm(%j`n33My?tp~M2b8pK#hF=9W zW1Jj*^2`hvE%c;58p1<5ZzP|v_||t!g2cGN@Rd5)P013v$NXCN?lN@ad$7zEa?aRR zy1E(IXm5-H9Z|~L8?iTub~X8PD|7gVkUQibfo;}{4MP|`O2P&!9c9vK^t+iCb+q+; zOV)EmmzIk$Tgiv0u-+>BYfYVsZ6s-7Xfx?|Wt8e|O_VIS$akt^xNvHIge<&Iv486% zG*)L&is;0Ba+vF5awR<;FL0Jb`YT6L4RFzf+CZ~bIuJao-8833Gmrxz!o2wK4<$cr z#3FjB1&1wR(j@3Ep?eRPTVz`kBcO5dJ-74lGo>^hG%^zRcLyJ|YanoMM=BmWoSxx*;OC@=-t9w> zki$cSTlA~!ZN&Q6+PJqB?$Vp&)ms*F%6hF_Kotm-H8P5nc9~-J2$WV~lVP=Y5%RZb z3bw`!WZ?{tX#BoGp~~r9gP)>_)Eyn)>Beso1a>Im2q+-~6=AKQV#r($=+EYIl-9+l zpbEce-OD_&IyO9YR`b2fl{xuw-pwc|-^wRM$XQ+bD(JZzyOf7xe#_>z!1@C{!X;_i zTLdzt7z@RXE@}sJv>`2ZYFTv#>ySCkpW9)V^wns?O%j`n$=Sh=%Qi!27@2x6LLchA zPOWe)Y9$*GcVjAJ#)#$_L2v_p@KM9W(x; zz2*NJzA!Ucz{H7$j)4vc2L~~aDFHEhZ33O3LB(C)rzg_lqkbMlrFstc01MUtQ9*(` zzK2cG%94m4%8lp2-g-{3SAO>i9NG#s{!4p-RS(a6&BjLAqYm5C==IPbp zb-=5W&7+Ydw2aBeVt!a8LjrNk=w&btR69S1ikIhxd2X?oDw~Rd5K(qQJvQ%b!ZF4q z87EIXt+Z^-nRad$MibhntEk6Gld{X3 zoYFyXzwB4F+N&thisODNg#Xr3sH}dXML9AkfZSX6NS&+0VzIGyOXaiLW_0gENpBIG zdFpIqMN95bp`Yfx$IE4?N(J`mCqk2Ec1^P3e7c;S!Y6;_(Df%VgpTyVnkY0GA5y8n zIfsLo4e#h6MYmLD*;zSS;U|uDYr2w&jKQ`cp%5530xU^1Xb=wJ8QlX3qr9+^>DMn4 zsQTD!vsSt7o%p3iJI^&Il7J?5xx*VycJRNylettoae70<+lva&i z%^Zi_R^Ome6gKVv+Y_|uUvIVHV~KD&Cmh>YWj}Sv|IlamFdHX-KEe<==L z?7|)bW2(r04ZTFaq!5oU-xt>z#vPCpxHJhWWswD;T%AAQ=CjKo4H3}IXlhD*o)wM`vt+Uz2hoSqXb zSH1M?MM|H}nOQ#7kU>xa8@=S5s7JDR?LH)F)o4aTWeu&=ecp5IXk>!Jx_y~_%ImG! zttb76=}U%f4hja38{uA#T2eZ2gTXndnA$@*OIXSoD_$LaqOxPg-jLoAczPp8CW032 zv*xr(@-;esZsb)=f{adq_|WUwcU)D_Ap9S!Nls9KQMJ`8qZ6AQz*KDBLJTz3nfHwnf&q@9wUtV;y zu#RE7B{C1V9@gA0Q>wqtZzGFC2ai8ntCZusUaGe~-?;TCR=Rq_ zy(uF)e={mFt(#O`g-0lmj|%i)Iq_+)-5)li~R!SAsD`_~+T)E$Mwts7oo=m4T~; zDaw|;QBNC~5_O)uq^UE?T){l#S7$KJ(jr{qDbe?z*5Z)G=tE#${5rO592|4dx{bqa zJty5@e_7EWXO~WCt(T0Se-F>SpJqRxyqG%-_|^Qo)vL;VM$_}+YaRbkvQy!k!GQ$U zJ>}wsk%kmIJ{OL;X42dl9;vBOr@r2a2ZX1kKvOI*=-nXO8j9MSCr_wKUu(VtcpKOKh-3)Uu=wL}fN>Wv~J zHqV4LW9rmVa7BJmt6~|0Bc0+B1fW9*AXdY$bjd4%Ann*RZ1^?G`X{zUe4M1cxj`jw zKh5k!l(~!a_U=G3hL<|sj`&6k9!7BpjrmPtwID?vKXd5{H!nB zqj<^T!12aPN#%dn=jA-`6nmv7-R4p}W+Lun(i}?KS%v+3l599e?ke348VwdP^SOj~ zE-|3f1F=hKaD-%-ous0O*su<0-|+1UJN6nTsJ_)vA0eSeni<0o!ZgT9Qm82^j#y)x z1KJEkw43s7*4(-5c_dFIST0w9fV~^2!Y}MAc>YHx3a)%*1fx>bnrwTdtm`NF){LTD z5K1_wNU0%>@?C9T?WavZeg&+JboS-6@6$1Y>e*Jm8AFmWY7KVzi2wtNyx8?;L@H;v zOU)H}{Z?JPq^)mh(mSlT>I~VuJW5~dNm;u08~#X+e>Bw}8VmNI^Q} ze+e{#V+j_NM37E8G~}h<&Vu*KjQ%u|Te{n1VXnwz?+$h7<$hCp5s?R4+1#Vy^MxO- zM0!HDE2<6*bM~HYy_gC`N>FOXIf-WBthy+0u^s$g9z*`3K3RDU>6xs2)hJ~ zhD`gfaR(_Sa(_o8ERe4xb|dOWw}6ZLgnuMZ1swCXvB%VB!YN+eW&$vSFPb_&G%t>U&|a<=9!v#qlQE8k%#*F14iV!rvif3PW#* zR4r7T#SUo(9)(r(qpSgAQuBksIYFUukq9aApbD{cL*c z{9EmLS@?LWf`0#`i^c-lXsZNgZok0d>X-fe>$oo!5ryk<>Sb_WKJVb2&iuu#JXV-D z1+Ckqk4_!4U$X`Boc@c*jWb5K#&}3=(45UF{^$g0R$9t`Q zW-N}H9*N`}9W#D=4eV~c_NM!BcfQk-$8c%Vuu~bkYA!lWp@3awwNreq=HsQJ zl?$>l!-DOBGgQdz2r$o2pU@D#gL@c^n9J!URW59kKOIyZ=<|0e?gzJTU8r6!73!b2 z3g5=@W(+)zvQdnEP?REe`n=Y%o5u3abXgVqyRdxY?%w{oeE76BMIRV`X%z8%42CQI zIV6Z15Nv#{_Wsk!f^5CxMvg(yghRg{UN748mTCA3=Ux?KCtY; z0q|)E*SbyX z)9e^MBpO08Fa?nOJz`k1jGvvwmbn_1#1hvx+t_e0aunMQpG_7C%04h^bk;}-1WkqK zW7+bZYVDIfLUz9op`J&R2WbqBVql9rge{Njx|T3DxwL z;P|;*9}3!W2oxU1)poAI;*rnI2&zkbocYhl6j3YIJreoWa2Vi@#0|pFcChj#g-^x*h8HZk^jID08aHmrd`V$Pk(^SVL9`OlLOzCF% zu(y}>hO8BaiHM2b3F+19!Gq#DXCY@5UDgNN!+bMk!&w7bY`9xVeR|E5z*)CATca%t zJTOh@`+neU$jyja7Ntv0TdN;75R=BLo|J5c{dLBEk_+_DcP~#IN5K?EyP@P~xlVQDpnThO zxm6?Mysx@tPLWVmmaC>1CiqEI9g}MyLt%it+vy6SKU;aPJi_$(lQpFulc*jFi%X}^Y_n_p z4Y!xL=@DM~`btMz=bev(HhZ#9HN>9B+#SP8pIWwZJludhb6L`&0Q!wiyWoX#(X`JV zHQS_j@DDxjoTwkP)tv2o!C##WvzN9OPbyFpnqBk96;f?2=6Pgn(W6rsc$Vva?WKn| z@G`NtU94qBC!}X3ZbVSBmI!DeJ#=Qi=ni^Vsbk$F|Apuq9VwS*z$h^@fs#mmsyoJ@ z`NH)rvr6k#=Lrv!OJ0bP7E)r8N3Aj<$)HLr1{TfoM#`HBi`{fmd?M=xWC`{9VkMr_ z%S;Ncf0of(E0HK9{Kl~@#asYADbO=CKatKG{29z z){9ik={_vnYQtNEopi$(kMN8-J0+`nU{aFj*DR^YACGb{JDWNh3K#r>MU=8Ae@c(| zy`J8Gn;3&rtt~5@|TPvP*t%1JlmaYwA*Nh!2VYsoI7T(2!@@dux zCRW-tco_=gE_sKg*}n}fHENT>TCzNX;`j=(RWq+ErOCVFENERXMs;g2MzfrqMYWTdCV5ZO{SzAWKmLg-4anKi)BRR zAzMm*|Hk8!+e~!gn%idcN!DTMx|%Cmy)*SjX=e6`@+R#4!IUskASBQKUjqma;Lj93 zNoBt~Y1LQaCPj%3%ge+|PzywfzhPAa{c!H(0o&xIv!>v5b~cL_%ZP`k#xe*Op_tMto;W3i~$$3$KHyZ~{A0eQnH4!L&)G zB$lznR|rtWlTpy-zNGorgE^a}@V<7ZsJM>>vzj;EZ> z^c@x<5K-GD=)oq3R`!edqkgHJ?V$K|i_@s5Oh1>B-{2)%Nq)2ybVv}r_;H{o+&^EY zOz`fC$!V|kBrN2oP)?jctln7>QSUpd3fb2NSL!=b15Q7>6sj!RO;2%?y=%?rHkK)L z4)dt7{F4Ka(108ui2i<|Lw}X0QW{k`^rzBf5;Yl*m^{fCt1MrTTTk(8oMg@hM9hqv ziHk1$mGweypW0;-Hf;}mCMUD~h>yvG;~cE~ko=!w!zY~8h6DA_UXAq6M4lD!AV z{GPV6(8WzD5w5>368L3!A28()2U>Q4j*`lT0PDK^M1Y`p-vq0ZQ1@P_%yJU#eDxa} zr}Q!tWhV9Imij>GRqzV$^qad|_vD&w*u{KzY~GkcB*F(q+h0vYv5L~(YSQivcun=! zoO+GU@}n2Fjf_ z6=S|EH9pzJ`onrzE*(TQ3-K)y>rz;Xy+YnyL6I|VQg+jLlrweq?6_1IxdG!c8;pEa zaE`?*rimgQ((2ZiKNFXE(@Gw_QG=~Yq5x)5vfuLlN73g4k9c%7RBL=~>1%9Kyna^` z%eyOdtjMd9Wv{Pu;A=N9Emk(8%u+)!GU~7xzlTw%Fv6UCWlD;LerR-M*UYN3B64-@ zX?YcS=}4YdXRofF5R0gOjw%7{D{xu&eM<+M)-0Z?>#aX3Fe^74Zo>-7{WNF2&#dLo z(KV8pGkui&iFNa)ZOBM(L|Y$b3eKAaR~c?R_50Aq2-`Yrc5L+!JJYfWPs#F zn$8PFA~yPWjc)um1)@J)5z$uil#EH4j0KLr9gQqu)SL~NyH2xkq!UOi&HPNrmtZdQ zXJy=a>JY7(8JBW!Q@d#V+1~EvUFFGo>Gl^nGd(37-9rj=f|E=)!O(YH!=BGqI-jGT zrMOI{m_l^cD;_edmI-b~mkmh93F^qiHORQb4X_27JCa;q6JJ@MW7J!WgA&iQ#(v&g zzsjZQ3|g(#BJ?~II{VY6VAQrxV70^ApVQc@npMuY@#EM`?pTK&=nOh36MG`3sP;yW z)dm}$AwEpUT`i=L?i|^{NU)e=UydeMuY0w8c_`Va25w$__Qj)vW}$2UE<5hjbn>C) zeu#9hmM|p+D%L0K;JVYJu?R7nP110|`&})6b>Dd39a^md2S`X5FeS1aL@f~E)Ipgi zt3lfn*i1v0i&%2248;#`3dOH14I4*oE@{&_bs&6ZqR3k^1n%1J+ zVeS{=&hQ}`glAs-B{AJf6p|^n9Yb2k!*(Gi`|k|6e@c0DV8o z5*BitNxa2zzA|eF?X)$T`{p@r$`QFkedv#^2qg%VgVuLw;kUY>4ztiV5ywLigKMR$ z6AwGt7D@Jlf1(GN`NfOJiim!(=N#lB8tdPeNMCYdXE>v}oIhjWuJrKdHsFkZdi+tF zfm%tm7mlV2bq04zFZ(@c3ghrw{KpKY5cSjF@va*AMsktW=M*BjU@+`O(<3Vq4E&=D z5A}hgPFOQmSC^&T5$98golC!<>E`ZlopmzfVE2Q%DEAmdpX2#$CbF@d7OnMO3beAY z9db^nyPQUTR3yvLL3-qvrt>b8KQgsKlHbDc?w3G@;v5447_M5o$sRc(05iC$)z?F5S0CH-9o#5+qYSLWT()KW+qZ-=1OA_akxdrNcQ-ebJY4(E0h=3VcVqURKxYSoYP+h=Hyvmb zQculx;}&`|`}y{>WrGIaCu;0w*VRBX#`38POa z7>LJK$iB4unoE8*ZFER;(bb^;v%^IT5rDS;?(CriZ;hk0cKy305F*yPe z$LoE)xA>XA^6#XFTNF0=hBix6Xy)I37r2ab4Hp$%y4!W9{uB|eKyX8Vt^c^y@;&qS zxZRc0uKn}k(McCx(2HP6V zuk!BKjLq8`uHskPC?uF2rM!)%L0B66@rr?u!4GHp1@xLdWW?IQSSBh#Z|t5~Dk7|PpL4Gwa)NyBGb;~Mf--MFO=^?O zzTb6*8ZSdOOWiZ`9XM)T@BRE`eB#Vos@Ffrwp!*=5v__#c@u z7t0(JKpW9gwHu9WS{vVPA1kF)1oEsutHG?*WKT#SY<;0H^7*>tHYw!GN92w4Sa4t1 zeVCkW=nI$}8&L9$3;T`vTvR+$WXNe~NIMSjXfDvdJn62sZEWzCb@v3z6Ko z@k|*`KG@sx;Q#r0-Qe=(lm1}_yW3nvSKpejn9dlBB-gdpu;PTpcUK&wxg#MQp4iO4 zw2vssuW*R4{ves$*(IN+`9!?I>Tw75L2)hsKS<0$W8+`A!5HLH?NexsdYcIwdqjj* zv4|vM)XtIKuh1DxBn91nXWx;qXL55>S?7d(S)cz~toK$_h(gXQcpV~8D8*8Y2&)ck zw$L5Ws4ywH`0+~<2P#PO?DkF@lTX9|g%BOxfjS>G^vOm6Hnh(Yrahrmy_fUkz4L|D zRfD5g%Q(xfH029rA~SuQ^hYwN${|)*!3Nd+#U(syK_4;k_^1!e#}NYq$O1i2#~xp8 z_NbqZj>?9K%H+aC_aO{J2a$_vUIf%8sd4ls!cW>v{20&7ZGq6KYqaqnXNYR#3{4iy zM)T6o&b4Z|aJ+Gm&YCF%le;g z0$Te1A9r6B71z3S8^H%C8R3?6zwH?Y3qK%}7JmKcgaM2-dA$01&jC!EcBZU` zD1V^%3eZb}w*)D(63nNEJ>?Ut>zYZNlJK-2=eTp~3~!QyWk-et9a-%C;Oq-G@~r$+ zrdb@H4z%lSm>*?A9fe@ly$X@LUALuzWgSMNdv>kJgVC;XE(uvi2AB`-^}emtvRzon z%=C)@%J9ZHCu3I5%^S|gVEe(`0m>cJqeRXHP#ZdLX>KWpEYQ=&YL8u@9k}K`QE2K8 zhu9|#`M_O}-hzn^b3!UxqZEH|;1hZLEh@U%&B?iLj4%sVZnW{v<6_3{iI@(fUB;bD zED6%-1GlQ#P>zwawDO}VsRQ$=yj2p+dd}i zl&{Ex>%xwnVS8|Ff#hJj$aVy-Dq*uUDn_FF_LnNS1E%tK$_h^4*zL7_qkV=EhUBus zqU=Wc>v#AUN@`~h#%fuw=&(|rZoZb44R-G$eJ(Q+|1&=Ad5-*Bhd;9n#`h)_`OEJN zf>5s~WuG`D7nKiFs+Ni_Qc;b#B`6v6tHko%(K)~@K=&!Ir7#6aoxc?ga4OKCMf8zZ z1otD{qP8Dtp-Buf?viWzWo~<#w(2*T7UGg)Z6qoc9|aW(!qexIvFhDOwyQwv{|X`(e-f`3eD{5R1m?zV-UgIMK>d@BTB;&G^L#*QCaH5 zS&gOTFPFNLj_^M!=z+gyO&;{1Q_ZLH8ZJR9Ein5AW6#69;A;9SI5gs<%bWsU%Um}S zb7qPvIoYFrlAit=f{{b$NQD3cUSf0F&mSWMg7ZY}qwjyIcGeh{pt+4Ncf8EaOcP$^ zq;u`c7}Y*QpHGh!NOm`I?41|Zx?fY>-GwinMPX=G=%xK4o~07oV4M%8K#Yo4D1F<* zFh+x;%(Ft*m z3+wiM_vyrmbKV$teX(a1ydU}`woRYo*D=bnL*)}UB-qmQS#Pu(#q^k$Vc#u#&ks_-9y1TZ|Fv3vUok3l}`UNn% zZ4UG?vS+1I-2GtqU2>`Fdkl3Y>I0c0pz}-E$H0}+2fAMT zaB?>WhM9wnZXnx|*N8T`eHaT9U|C0rUqq?@(5xw%z#1;7&vKN@`W#9=#O@Ioeluw9 zU1tsB599^B2|OW^nZ)~w+|LC)aSUtXrUDYG$O5eE>A5Sr)Ihm!J4g7rD5v0v`}&n;W0bp5aISow zT)8a|Lz9IVf>Is2s(WeeD*T7od{U&fPssuPuwwF@_H#fu_ZM!Io3>O z)(jZA6V@nND#@EMGx6&{_xN>2TeAGaDc{J=3@A+A!7g5evgVZfBC8KNXGCqi^`=^{ z4JYO&sc{MzS!JkUkbaAcfk}W^x%R;_9@W1s_5S{IUH-M{VBG~h5%ndk?fnaJpv6L0 z996KLegE*)rT7vj-O4IT@}_2AE;MS_ap@F^R@3MxFJ3(^`>3jt0Eu_mHPBt%5L-1K^nuG7?HqB74a78H|PjXiV0re@H?1;w`F{d5B3qh_ed;cr$AD>vM zM53LQM=B@qt0vRIisLAMb^=+Gzu}-2!=rIOD2u+*dwy>dEuz#d76o!+GxI{`OKFOI zGSIG&vvO{bF#R2Ksl#+}NL=#K3%U?8JkFWjc4D2~H?6!$Fv2(l&`Y~_U&yETD+k`4 z?Y9d%MTTA=+TQ+S_0`Ski+c?5N6xY<^ZeZ9x+o+Bs(5F;EaKH>^>;U`PcWQz%wc;m zXPM=!V;w_)ws#&0OI3L)XTDc2O4vQ_gYVaJ-AC3OcGDyo zK|<=P=%d$6-p*8{_?fu)fmT}0iGw6^>Gsp5-8K^bxq{aFWup_k?Nrh+ZJqMUeT9(P z*^h2h2D*a_0%(2WSG5UCrs}{T)cD5?%ztRT@UO38KK>NM-y6x#w9d`6$I>xJI=DPJ ze!IQ1ZGVr>L~_0TbLhBn#CuPP*2Em_S3QrEHZtr%fIK8!*#dd$%IonmGoomT^V$w)ym>{Qo>hO#)@k{2jGQudq>Zncq$$_!SuPdHO2mL%ErkZ%@N6tgCOIwBJ zVSiqbOCAd=kd>*adXAy_GuP9Y9E{%rHF~9&peHQoMZX|K$QR>soldXnIp(8 zsK`zq&Pr>R>-F0zr4hKK$5YT8UoafAbUq;xQJg-m`|8}Hm!B(xXwgsXG2N)DJw7E0 zHsLDkk<|NR?ef}Uy9H*$<69lMzO8Y@o!#UL8pTtBo(qP3te+rNtEi#HjgAW8ItJJl z0fN#jd?6!wwfq||Nm!;YJA{ly5oY#lgkW)}r=A2N`J;^=^P!v*Gy;!ZAFCpiEw}e~ zHuFr*o0Ipbo16fk)Zp1Hw=USiE#WWAGjdp1W4^~>ux;ka)1f}iAi#X5JjU|qutF~V z#X0E=!g(w=9LLPZ(*RrXPnq<6trJPZK2cal>DyUK>?Dvd8brp=ZzkTf9mc7-sveLsFku!Ev8hkDz3C^{Mh@0O#QJaSZNoNRgr@1@|f7}*+Hag~N&B~u*e283f$?(B(K5oK{41<&x zf>0{XSLH{!qz=LtDi0=74Qd(-9&?FaazWT_>UbQMF?2L^bYM<47ht;`KL0(iYqW&Q zoIGpQ+>*9YtA@su&qW0fG61>izmf8UWqeKE3X#BfOCrb0h5VM2U8I4W)!fg9$Bhcu zOsLt)+aNle~jJ+RHDv_BU&(+yuvz92#hQ2P1jVCZx(i0pj&VTIQ^pSd(VOH^= z1|Ku!91L{SW0r3|E>S!3o}Wx~!_&1zN1-SdO`<^HY5byN9)-k;i zLXQy!UT62>w35Np2j}YoQV-~avcd6w^nR^FZ#iCBy;$p+Mz=ddz5G>wf1&l>=3HJs zp^nY_veiu|=ukJyu0R#B>qHtEoz=dI!p)t{(mf@g5RSag3%rZe`V5%&Hkf~&G6#iR z5U^y$I{bZn*ZX9jch2J!HNNTfgartcpHZ3VaX?Voj;FnE!9D_--E$~=VlK7B#&w2W|;6br0w8I?w6=bONI&ZE(`8(d7 z{_}S_)(BJ!*76$eyv=l2tdFEdG21ods~4=2qtA}t(%wbJTv8vr6s98pQ5*`=Fq8dkdO15HY=s(=e?ajrxv&%XQR88j2xQK zy!@MD$^sd(CJC9&<~^zPg2Wq9LPAWqb#rGe+n(cc-zD5l1Gd1k&M${K5o5wA-}}~o z63LUdiN4&ASEyfKTp&jKjX*0VXyyA?4=b=!J+W^ygQQq5QTz!@gT{rvfWQHkh#nL) zxFa6#4y4FzL&kcBdyN~!;4iXAj z+hAEGx7_Zaa$=~b6)XPTFg&eg3IVK7NC z7in?o68`EF`RV9gmd(v@{5{;hVSd`JvE+rNx%2(KhB?$xLbGtiF$Jmqej)NN&7k2< zIa@`Iv*pr!3=(c7419x(%q=1%HJtrP5UHuJ`=t8%8YX9^JgXvB#&L~y`~5QEq^Y{D z0U22>h~cA!vnpNf!^3e!!ud2+(X;{{e7(jucU}w~@KO8A z)1>5ukdTkafB5yxStl>6mMTXnN*sbEOD{%Z55vBAFQZV~<%1_a0FDvz_mBe{<*YEJ zmF_PY!0ssYqt=KzWmtNW>T^XWh1YFh*=wM{&AFnqlbIN6TCu>{X1QCQd@J!$Q$KDw zby5=wQxvC)lbLhF0k5+qQTP-1G?%lYH)SC#~b!dQE_$v2Y?@mA{8&^XXT9N;Ze#EG%^Mb#r2< z+ka5klhwa;-IwD&RF6v5xw0fAoWMAj)*IQXiL1D|PzrIgm|96+La#{xTw|od+g03( zx_s1A?NL_LSNXw;cLMKik|<7*PlLwtG&}M8#WC#Gncr;`fCmJTWNd;!8q|t9B$c0B zCR>X-aIqR@)+3A$gecT?EBKEsJ7SBjc(WZh)Sep`-?lZA+j!&6snt1{ZC@QIia#Mn zOjFbbJSzLGH;Y&n3ySNfd?Bihm`5bpp4v4WD(NZ9)|r5wH+L_8f6Wl6SLUF6vbvL7 zm~s4U&K{N`=Z{_C-(br4iTT;3nLCN5UD=8YBiyKY#%!B%A>}2V%e{t)$t1D?D{6<7 z9P4@BA;G>evZ^7d7a`~U<;!ps9C!EIV5{dXEXU39ojyzHR$$F1u_KY$4LtWBK3Ko9 zGMxy`NPIIYyO~HufQ@|E;ztY+c(PV(f$*DW;bKAxMSMaeQ{!Bn7q>!{@^F%Ss+X|se>*3C%LX~mV+QV%Pl`<|jpK&GWjrcRA1nz%( z3t7->^g$dD%SA#4mRiQ1^he08GpG7fYS?l4T1+L!Wb%%RN=B%)6jCgDWZ!S>#&B`9 zs65sr?c|}o9pa7DL4F86TOw`rs1HQr;Kz7Oe*Qr{2P^ME?F&}ngs0g?XF!vBnzz*& zRh1#UfMr_(c+X)tiUBPWIZooBd=y89KvDP9jis~kpN!y zfGN{{a*-cZRZ!yB&2ny2dr;`Wtng9+kL9!^_oRhMz>X+q6~vhuvLhKA3q&+(cR)F7tFAQql0w$xPVx+g7q!n+e%{HwjEkBWK$j_>EEt#Xxoyd8t$DG+J>=&-(4=`Md`dHI?U z4cD(Y@MNSORc?*5X_P*k+26YWjvfl^-KIF_D`d%TKk;cT8_8DjZ#zeQ@zuCmXcttg z*)L3CCFnZ#B+UCJvMAQeBvJa4VxwU}bRX<^oK)Llhvw6I9&e8s@#Xihe_7fmcVecT zGb3qNrU{ciPW|Ytm=CiZnzO^HcBhx)aY)V`^BouWrHt(IOzz-X_PfduAx2GEQ$vEd z!^WUaA6l2(t?EB`cKba5ayknZ-;6f5Zk{mPK7X;Jt&r1ti*x(cSeoJc+w_Hx--V!i z;mV)Z#<6FDC|%IHR!|E+$k3d^{>h0*%I&w2`#@SiN*xRh)>4~GEhKb zeB=rIaBhEhTfY{q3yM8E8S5luPKCp02V5V9r5Gs|96j*#ZJ`%1)4mI$ zh1Jn5I(iW4EIq-`7TynQeb~--$ zj?{3;C(VeAg*4JNzK;Ng!t1e9TD(?m1&+2`Y3X|4*ep{k(Pw;pc;jM6edXe#slgjq z=t-iO_9tf2VpkdBV%HMU^i_AtZnWza-XWvaSBn%~sNvM#kSy@G!m2OQYFlLIzrsPf zX-o2k6u*ZBb!~@`ZLrZERV8k?nm;-5*J+*GIf$`Pv^)I+jJ*V~)0e%BYln4JG=@M6 z^#_e12s|+$V<7tU3Ze(|$wLO}j!|Xd=;`~LVw`V}Vy2K}?}>o0w3^~_Z7I&LY&s6n zK74b%#tDF9^%W*~oF%~HA@T;W8;tlCQ_w-T`Ze{9~%UJ=bgri`+^c$7ttuG-}fBD#z z$e`fk^0b*Vl#gEe6y zc4Xd`gaDOy9{y4mcBD~6}MRI}n65^_i?;Vev+ zcshCBySuT5{ov<(p^7j($<(}`>scLptK~~oA%i~e4dZ(&>Gc9HQC+Tk=bm}H9`T7( zX6lq7cyQ+hs%E}pMxU+>{GjgcgDOe((K+%_=_BbFK5AvJAz~J6iS{$~^d7k1fSWIC zMZYptz}Omn=B07ed?OU_u$_zOnRlUwMH-wVGYS=Tsl)v=XG79% z{tT2*%Heri$31aw)5->YAveuty=G|bJTn&!>K|7To%AXux#h05?OqVyh%ucrit+rM+Nn6&3;tFG~ z@P!|7c;f6ISwk&1{Ts|ATehzwM%D*I$%zFj_ENzWKX$dQ=q~Sr1%z-;Mm~~|o_D@6 zqC{!FMG>yuE!45RX>1S|BH2Pml(RaN;KzYw^?uYqmek4FWT}%RsuwE6M-vw7GeARB z|0uyNOdsyndniwu6P;bFI!HR5&k5Py2Tux>D58rp%U=X)`gwxOA=tahxxA1Z#Jx?b z(?sBYc2|u5Il?$JL}>^yu=>`T4s}E@9a!c&KYiLh5vP#9(XOVMcRvEr4`(;@Vn%5P1D%tC!nH5{)! z&^g^8mBv0db=6K&LVHUwQW1XIpS|ta_cS&1^8dbzXZ}M0{GHLff?n4Apc|FJHz)ub z`b7fv6FuJo4mtW7*$KuUnKF!M^m__qOWMS1dyh?p+7gduq|f#fNiuuXhy z#lYff*-_tiU({(IA%J609cjbbAG6nOU7;FHWIF;4a6w9!M6c5hj^dJH z{f`(*D|X6i(n%pzms@6F5qfXs601|CS~1OrNPbLd#V~!9HnPdkqFXT`(kh%^0)n`mi4 z!sH@lrwosB#zn04*cDXB&)*GHJ_XCK1vc)t`!(gresAbg#ToaXDm4?(sdhbEGzWyc z^N_PsjmcAq#XuvsORi=*dp#}JC8dNC5jwKuANa?yzTG76&bsl~kpUt1bbaR3p6y@! zn2%3EhwHyKFZ!j(`NG2tzEpcyE|!Yf{pn~%i2m1B!92}At8c>A;m6^Z0?AtaO%AEp z#kF0R_xyxRtNMTt*6#-Q8Z<)JIbI0)4Rg{lk809Y^N<`dcVbwAM>vS^%*Bwm1v9RF z7m4Y@2(nUUG=YfMQFar!kV9eu6(>|BCF*TA>PNsSI8Li|hEZ~>APx$isyhfZrg^wE&-EQC|LL^( zw1%ZQi_cJV>K|VO@1QZ<)`RwImWxW8F`=0OypvDLa&5;EIQ%AjJQ%hHz43vluZua#O4e|V!L*3I9N4@>W!dvzUgA&H)W-m< z$&OoYs=Dq|i!f$jvK)p8;sYF1*t1(x!iUcWB2br~gmyPRyr$avO@&c;JSsDjcjtEr zXy(&;F!<1b$hi!+TD78-FAM27tO*|e!E>%dYEm~~9li#VGyxKszn%xF)lvecoM z>hO_88rq1OF4ytXUwnMfEev_);F@rYG)ZIKEPmugCKP_bMklQ{!SS;qFflN@W!oQs z40OCI^iuU_|2f;!I7Y;l%&%LaRy8vash2oxLPsc09IPsHSX}sosLWsXGun>`IYiJe$=I^DImueK!*u3T6-3h5)&DQsJR&-gb@l^gsq%v1|7G70o78 zNxL;oO>ra(MYD>{P>pHWDrpEHhIxmEtCFz_6AUMOQj;~S3rI-u0zR{)pJYvra zj3%c_9dM%=!IEU(^OsIg_?2l4e892`j$Nb4S`g{H$v~54MMp=cHruSPSH)xLCtJM6 zkT-A&3t{5lspLP@au*pu*9J9QZ>a)5wj)U~dIOyE4H-!GD%PJCdI~>16C^9 zGv!L!*G5LjS%Hppc@G;yWS=<;K=1n=y9C$eYbLuZ9gk}|g zaoOP{AD%6v{k7ki4XGNwERTfhJVpIYn&jf*93DxLa%D>dYRg-Q*!cdE_i*({gx8ZZ z3MTMjUZfCxLPXYCoNgL@ zn@UO^p-8|{j0koq%56wr5OH#K`i8o&SX%fCrvFO2gXSEuutsQ&bDi$JOB3DPx9pLP*$wLU zz&};LB`nqi6#H(l<6ZlYX4e*{_wf*~(BN!^n9T=a*er=N$2p4=YWE_Br>uOz#xBFGC+L#gKDVyUkJ}QNB`;W ze@8-zmo4X#{uRsv?Z5{488WS`an!H;nd4SEb#<>qVL%30I;%@qqpWalxc>9+)?H6@ zKTP3;b^ZFGYVR9aqRISf_+5xdwCNK}1?Y^!Pk`gOiUGW98AA z0an;&(hvLm^j|s9qI#B;qW00PHp8*yaAmIwvZ$UW-q*t+oVTBM>}9d~#)iIA^6ymE zG80foWcv}&GuFg3V@El4!q)g}DfN8mu;}a7qjadIkC@rb1zmUJdzmCQm^R68nxVVf zom^dc273FwLasO4u%u*$dK|D<8`iDrG6^UsXto8a((f#>`E|hD1OCh#UBkbht2H{k ztF|Lj4Y5f8(e8Ko1{3@z9w#F=u7#}J^2C|`=8JRl5mhWnI@y8iT>%X!zor6@G`!PK zM3ghAX3z7|WCBm%OOpX@hi=<86^YL0@s^eml(y#Frg;bI*Rrm^dL)n@yI3iu9-1y( zN>#HM^~CJXm)h&rbY01t)g1|FYP8sDl@e;?w+8Dz-900%>eiV!BV`50CVVMdxeF~H zWXx7JShu}=2xDT~Lj42uD?pUMUPDQs3Mba6S9NnIMJNg{_z`EZx-UPB`&ucOvlrM%KTySpHUhKM$b{yzby<_pe4f}s4p-*eY3Oq~&ov?l!3$y`= zYdF&JbPz36%$38S>(UbvI&MVIYnn>PWUSSaNa?^-Z4mBwQS0yoWIp>;EUljRVr0Y! zC-CrsOaiS%ObR#(8AfBz;Z%F6V;|+nCg6$P37~p@(4gr)m}-!NcDL!%GSA!5qLXp`gvmM*ZSi=QQAMex z!ueP#7euCH9h89bW+31zgU=Y()6!9ZWN$Ya+&sRdz|ew*?+3x2o3OP~R^{vJ*wfRu zgCWZ8KdR^Z_wDTv;LrVP;&Bzm?eLyl+G;6zbp8l8WG`@5gN5{6Guo7V_OrQo`z+Re zCbu0|c=dUY=iXQ_Sz2U*O{gC*4p8c~g9cz)BYde2zi898tUBwHX7tnF1C6gSKa4$D zsMXr^g(Kw<|7hpURRs5-!Hp-7KlRs}T#}{tWmw+)68)Ls0cxUTaroRgC>Igk0Ffz~ zT{(metx$fe6lY^;qigY_6=Qf`gSAQ5=ce|B^-_qQJPAGVxt7x^o{?yj|i-)FUmop%kLX5XA&Nb);6 zT6Ro11t0{zVF_3m$_+QpRzI6zxYm7^zdMUTMYR@qBk)jrH+V!XI*JV_f}?#EGGNxm zjWrNp&x-G?6uUl##L?uJN6G&6_d4y?e7{E_%pPp-2l+kq`&Z;KLHU1qy=jQduD>fm9nF8wFpV@7icE(5St)P77lYf=%J!G#Ja4>hmYd zdKPeS%HI`o6)Q2d%vY@_m-sUBjnF|s&QB|H5KgsNbG*OkQOX0SrW5&&HrM0D_wlB? zkvdE3gbKYxV0KR3=20eHs}&XIwQ3ILqDG*?+;KfN%rj$igFF+075zM}X#DEr-pN)C!V zKU;pQO->qria2Ti5!G7p9%rqsbTZToQ^)f-opJV#8$VR@wlfeG966qC?RiP6D#y`u z(}7aF@OyG05-;(s9c^^wsD-emGRu(_HF7<4bW^NgD{QN(N{1-Aa=z-XNZLS zDnfl~!*ftasOzP%=DxFzf}QxsS`Knt=IU%L9Pl3vC8N7rT~|aer#n!B5**{>Em{H( z>E@~-_CPrpE4z;;|C^J2l+y^K_`Ge(y*4Y3RBXY48~WHnW=bv8Adc%2UZK{;0`CCR?8cYW0Ze1{)pu1z znV0iNQY?#6wNwCUX{r##b2;reeXh=mEv3h(<%e9XjUVhsT(1Ba!s3)U>{uU7U4ER) zT}wRfL`tJuwbwB3jxc=LkJ&g{$rWZcpUSL$;TTrDAzGFE(`M*F6>`T3pp=*NlwQswjt2X%X|PT8{K`;1a@nF zE@-^Sb22!yFxQS@3WwV#*q^MQGM^ZHm49$_K=dJdT@zS_%_j-ts9xNs7J=6r1iQJ? zVm#h#A^s#R;S7DI<5hfONGXf>gYWR(%kTCaNau^uxp-sNJVn}! zruUNVZJ5;*>z(M))+d()UdGteC9)rBpWNx;q1WvYWcroGkY~vk@GS%u%W3E_kIg@D zpu%0ZY5V!L<*fJy+^ckcfx(D{$DWvh4rjSwMSHZNM?Jru)5=p=QG4HxU(o=C?f)q) z&OdEfpM+_j{DGS$Lnj@#Ug?UjHlBuHIU=A4@*Qx`5!HXg0#Wg;E`O#4k48Vl1z@e2 z1QH9mv;e--{k(*)h5K)_rTinY;13Nk!o!1p=){9VWn_V8Ak*Tzx%CF9hekWb(Vyig z6}370c9oXvm4D$PWHaE#!Kf7>jjBl}SDe4kT)E^1J)KGCf%>}7u|h%6%T>HK1ANeLK6 zTiKxZ+5u6)!Y$9I1zF@(C`oHBQm@7nXNXX2%G0bzM(WsNzC&{8Q04v}(k`HEB;2iW zfQ3zR2Z^gr8u?{)Cg(J0DlV_jzFBgALF+f?AY|C{E}AESG8Y{*8x3~V2d~m$w2FF0 zcf-XJLjW?Phh}*Hm;d;`!7cf~2~|fHH0$foNd;GDj|LQ{k9&57ABGrT8<8_!^B#`W z$Mtd>uRSAvJzv5yY9`fcka@EXEvl#6!r46qU!&DNKp2j5?)p~{R)GQT)~O(znMNK_ zae1sVR*>D9mF~lwP&aP@4|eJuMkB#h}dBqJ4Ewo zmj=B4Qz6G|V3bA59W#Lr67x)TEWw$Hgh>z$$*RQfkIC7z``aD_cd0Y9o2UtH(xcJ5 zKg&{@x=cC6PTkhda{B(XCF0=ck(QIi!fW8m4eUE(|L%|o8bf$NIFg+ z>Ha05|6k={K)iJOq|ya_&B}DNX<{picfD(wotw};iA{6s0}C8juqXcnu9cOxePb^u zBE!?H?uHRxrsgO3ZLELYV4i5?mks67u2Luj4t;>^aGQ~&EHPQ4N6Rcrro_(;hBB6>E3TDrVq>=xToD6?3o<6a;z?IBc|@4to61svcV zjjRj(YsJ7jgB#k-s2yLj&r$V+2}3?WgLmcL-qm$Pw{Pa;ZIdKx7<~N0&-@K}l&s&# zkcbtpG$@hN143(cjo1Gh;|3a$Y%3yNiT?%U!+=xygnF!tUu6Md`idN=0@w&k4c<5d zmnM%yW~mtWk^*Uu5z9jVeT^}QFH{_&kx_y#WZ=+G$wrYp3g9>8Ew|g+y#}tD{Yx+A zzre@}3~*DvL3F_}K>^lg#r*%oh#l^($oS60NHiILu1EC*tcG~%EfVX4gH zE>gR+c1*H}K?Po3b#1RD3z~>Y4b`x+XlQuNsvjTeF z0K~_R15uAXzcs!c&rEfDb7qYrqutLMhq+D4HG?3S)nrWIIC1Len;iV@M**qCf-N1c zI;Kk0zI4;mX zGcO;QoOEL z1nMuNhF1?lu>z9NPz zm=PUU){rXrfb*J^qH|Q*P3-5cGG*2*sprEsICt{&B^4s5{*7n0E~a*~!18c)BW^6FKn*|IKxS)t26v&%8GBDfVg;p{u~ zY<|5H*((xL7Faw{vg2iebx@6w$djbk*F8F73AU|U**x+x#xw-I*OKb*Y3sxTH`J$# zq9fI!!O)KPww<)a!v5~BVuoUoCT;&Pyoc>W%|o7%oxmH~-6*D$(a}UrEJd8D;Yfx{ zXeApNZ)~H_p9u+~|DSRwfiDmhISn3nB1q_-oE1fr`yKIX9+=Z>;iXXATAcV0Nha~y zZ``nEjs$|H&JKZP+bS~Y`tlUi@A%!dV9u_+;{9>Qn1Lbw)WFUdDLfuGbeC}L_St@$ zoNA5J(QdMJ9ziL$`-A*V&A6Xv5I0Q#t3H&@^M7+-kg9AfZksW% zz9b&j2`+i!7t4epDmDBk_|8{*`EL1D1D0w(;D9Ip!-~IfiBXRh^^*WuH~4^nA5OZd zv&TE72^*UgjNA_o<<~Z?X{)ke&5B#$m{Zu!fn>b#T@?2gr#^6`8;O?5Edv{nc$hyy zWBWIXr*Xv4hcY8(>z-3t7G0;`)W)eUlV;ht%Hzdn)E!;1MMB9=OSmyW{QyyUMbG!f5iHhh& zV6nH>{A3|Vw{TH6J~yzNIIC7^ixg+Yf}NM zcp5C3D}NZi{~`JL5XIJBA4qdX6e0guYK#oVy|_B|K^gqXN`dux!xN~VU(#UZqa6?# z{~03>te7)?5JIWMH^%_l8aYPfii~U_%4*oGW)6cx#krO4MG(ZsRz5FgWznH;{1W0XUh<04i#f_hkMkqV%^My8bt#u5@;W_mX%`;Uw`{&@+YRJ7@?RG9& z;jKR^_Qe1<60w(M!nEjJlu|9(QWL4xW;NyTGQjkwQCo`+{B8(jBK4Vo>v@psd38}p zJ@`mBc)CseIDGM5a6t^ualxtypx;Z@zIe`K9+pnMDz9|molf?4%| zy-p7vErO)W%#+J9)d-pu$fC<31r&VrFm?jmfLGdOx(v4~1vCk4Mv%X#^linn*I+=xgQDJB5GMYhMIJVvkE)O73)HuSMK|T=OR3V0+ zC0*8Ng#|abwvM_1Ye?1NQ;@93oU!~-z#BVYVSy#V)BU9F`UtQ$77E4WurOn1y!3Uu zw`-{VS?||b%DQBal) zK%2<_1*7lhD208U(434rwQXt(6dftr(HOAspm-fQGk`-4%PeI1>6<#9<(RcE?N>J`7 zt8wFJWDzPiZ3q2sWYc*y$5yDrbT%gKe{y;J7P*v(o93C?M(xwUC z3nYB-wo_fBdy(zDeBk?Dz2GJ%2F^ikIgBJTxcEs* zB1QG9-IGIK+#xV^6+)d{Wc2xUT_wn;jvGQyHv)D9GH=`uP1Eh0VAkc1X%|AxPknq9 z%U`On85pNm&?vw|`Oe3A%LqhuW4TW-S_JgJiP#s`^P=BbNpjp8D9>!Vfa^2eOZdQJ z&AIv;s}r-N$sWeaYI3fte`EGaAOMbv33FkdTsc5OTJfnIN$VS#@cw3V82N~@h7f7a zeG#ip`IN(xno55{(k3dutsJ7VQ}D?R3Zwhg=XTgV!;HaD1RyI2WjF!yqcp9?Z-@gD zAfq){@0u=Dm12^!#%sU|`(LV7u-=z&rG@IL((Vh*Yz9g{u-yOlJ*Uz*Bjju+lRZY) zhgqe)8{|p|lBS>&6m<-`Y7eH%z9ipVXr0N4(`M;AZ(jU_75Y7UN3;SlSEr*_s;+NK zp2Oc5yc`6MJTjpRF2H2G5B9|V0;Y?GFGXf9@3WPlc?X^mN++Aa<+v@QgktJ zHta3~G$WbM8!X%SNmK1KNCm=ix~K5*$L-;yBNNf4O0aE}uy5&7V35-4f~e9Sa*SXa z=4RdlO-QL%Genh^$Yj895)$U)cl!p}!agBC$UqFS+VpoXgfjMwk9zD|MhCw49TEy- zb|;5HSz=OEjW!n)ZC~?pmERruV95u7suUtxFx%fY?Ywp&%Z{vNihYV!6j7n4TC_@6 zParHM&n|+Xq`w$!t9Y+Y(yFT9J^a}gD}J4Jc_OA~Ez2G7@rmJ}FLAUlc1Ejhg#9>+ zf^hnEdarwvr(uPN?V#Ck;5^X&&HMW)f%~1WcbUzgsNE+{mtCsPuFpId)AK`jQg>zq z_$o-@m!$>=jKG|hTKQ%a(=f%~mXY9z@J5FIPg4{P{u|^C`E-a%n*x%Q_2r()v@e~( z)NW$MOttlxh2v^{XvwkR!g(Lcy`E?Wq^Uo2BFM5`3!fwJI<;T870kFzoz?l-KJeLk z;fSx&H>h5HsFw}A(+7PmelP#K{W~^*f(k`35jrqbMTC0@5f2=eLot&L(#os}$9+nj z!e1iDWk~UFY{8GG#~ie;@rnPk<)_V4f?EjTggt%vkSTa$w5<#@F^D}lZ^#9kSsPSG?V3IEJlLSJS1dt9~+je!)x>ogHBr?Qk#4hb& zdG?{zkE+a}MTaJSsf0w~;i1PG@5HQ$PM1&AB6-~<4^mK*EHQOn+f;e-i{~n?s*8&Z z&wG-gR-!a6X`!?NZ3YHPyTLbgCrFu;YJddQB>{LXB0>%Dn*Ty|Rez&8?>e+NdhHJE z_#h@HvnXFaIhZ+U){8D zA+r2+0wH4Rem9b(m^;@!l8<1FtMdG95o$zSDiTWA=P1fPx|}REP0q>Si_g!y6G2YtiAYLSODr=j2u?jRDya2mL#RVgM zmjt3;>4n_JXofTj3Taabl?Jk}=P1{sq<1GTurN)S_6}3*WM`9#`y%0XT`Su#VF7)x zXRYxcK}-}NLXDd0(e7$Qqvcpa;rJ5LpxYm~R|H!`6@GKm^8nnz#d6qq;EV(9>v-`C z!+Vqxy;AMsBC~z5i6UL@;;@_l!`NE})wM2L!wDgQ;O_2D2=2k%-4h4|ch}(VZj0b< zA-E;j!rk57T^HYE@3YT2_tsZ+->Ugz6~&LW=F?AikI|#Mf6#Ye8p!kuTiPQH8%T*! z1vWEEm#9x6lQ)TyjxHcJUOIX_^ogPs>s5OcHPyahDf3dhjkS>Bcp@_J_<+^CCn!+NT>C~BoT9JL*R$2daLAPyvIO3U&G`BRZ|&9+$F+}% zw{Nu*!VdQ>x7NnFFiX&7!*-)>KHMi-6Zz5T@Fg=oXZ29s|O40zpPD@qgC?J>PVHz~3;c{{~oU&fPjq?u2ka?nED z$Sg3Y`E>JJZvF(Gq8FtnoLw>^TlYcanSu;dv7!xBq}V?y145<$E)|Tgh%c6U_T%X(jDb0i$rI@{RxlT>sD{Dyz{ImI4Q)G>ipv}J4 z(c_E+Ioqhl)FptJK97vSmwe<_sTAij;d6iqpc0dRKIHM$3ZLoI(gQ;>@z#qy+>7SJ zP0CorrUa8bb#N<@L5HeiaUrV`K%q%I!u3Yp#(Ku313`KxP zV~nvC!hInKKUTe0k*H@c`n{p@@vN^B#2~Bh5A0QZN6W6(T{XR#>rEy4tk18nfy$ZM z;;R>SjF$|3v)k{yP~BGz;nWFR2$I2Om?8_k|mHB^rkibtjpp4!4J;Q-};jW#g5(p--W|U_;#*-wc6N9)R)n4n@fWt> zL2bM3+$yYgyr6_lx-J+lCp%qVbuU6Sd0K1aE4U?d8_GVowIAZn;Ljq%PVQH#996X8 zm0-N@<2~3|BVv#2v?3eZp2*_8K4RQh{imiT`-2bF)?R3RJ^RZk>7PK!k@)6`J&SvN zI@PeN020LzqT%k8d$>RAeD;dxF3COKHa>K9nH=x2miIC9(9CFjD8?mmSkeMewWT5+ z)Y^eHzX5Ur0B|(pRf$Pq@VdsbR;_eI6tzI33Uf@?dR(OWV)RYnMw@ zu+XUU%1 zEQY-lp9%Tbb1z0O763A}7*TR#`4rnSBvE7C^k%`xC?$x_HMFBg+(HnEEj>hoM~`=I09mEzcv?#<}u-_;H*B_CUHT{ty7Igei7-lYhv5c4^`RT0$5 zae>u40vcOeay8&1i075qAu#Zeo}Si1Rbw(B$%CiRReT2^lrt5a(tWP=J9?gy z*}*p?F8QG@bph?sm(x30=?X?GQb)`vY%r_B=|FPzQU^#PdkyF%$;rLW`fj(2B#@lN zAp#VDNP=bDGV4tp9?^uVFe8gtR+gIT zZ$mrS&*Ndz@n>i&YEDY=W9S(S2gfhZhCURD8P|+=)CgL(N8Gg4doim-tpoBm+t#j>x&1S>E8xsHfJ0`)}C$ zJK{S!Jlc~KP4z0r#J8f@fsMU?maD4{!Rf%$#>@*MD*`Aj%Y^ zr>+6I@8eabkc$sgox#DG{s>mqqmacbnD>&0t}B!&9fre4ga~IQEYrAJ0JG7)Wzg<4sy5Od2Pa=E3(y21#dGX6tVG5I4kxG;S7>D`KYU z)A13b2DZNC)_KC~31ocM+gI083BR_U^O{sVc}2q|ALsbXnB#L9I)#`(+)iRN?dA`L z43zFBAAFO0wA&}3ox@!kO}pPJ+yOx0cDr^4|9->Y-*bUJm6v3@UQ`PK+`l>^1ma== zAXhUrEv1h(0s^p%2NK0i-tFedSe2^0w}^Yo2vt#U?{y8$jm7J=fANcTtG6z8r)YpSm1)dS<>#Yy zUCSw3*Zkf<@t+Q%TS+ZyH@wNMZ4`CO;^ZJDUA99WwHnITFfFRjEN?t4f7suvGbLth z6bxz0s^Ir;lnHx=$!|Saz5WNOW`w<5fOJu}_44c2?-qgenwUY4;nIQpRX$SLBgj?q4i1918J`;xG1Z?~mFYZhGt;B^kOpIdg zsP~xG!NNQP3ogUZhLb4uNTwuF*m#R)A^0txmcTJta_=P3bAII;2lWP8U;vZ#i$=!} zIHmuRMoIak1H(RWJLtoS+B1f_I=sx9czmR8di&oBcj8jaE?A0H-7tl&;A6qQYUfLf zN|az_17qLcX3=2OcnFy`g{H^ZDs8lF9vp;;ZOStgdhCh$Gelw|-g8{`s6^%`2e9rD zJ^qG!IF9c>c-YXT+CG^Ai|HqqlLJ}V*c#7&8E*oTFA7|)E-=TYbzxd0%NbFXG_D)& znxHwv%z(N6U`xS*9y_N|!Jr{M$2YBwb#Q0^ta9=kL0>&SP-4h$Aln$6F6por)SJ{YOAd}64@T% z=0R%DO=lQLprj7abTM8C%M(6czgWZ85KILbH-B(fIJ*+1Dw_MCfg8q7MFGw{&GX(u z0Z$W0r8$jsZcMs^Bu1+4YE_XXct;EnBXs4|Y=ELD6@iHyDA7-1NS40Kaq%Vg#xP72 z8(>0>strwoxOj(MnLd1!VVBy{J0rz|{)QSWOxFgfW4eCt@H+jD2x3C!?;O|^+oSG1 zKD8rUwY*-qc#=_7Lce-?lpwoHGzecHRP@$HB0SuL@lg+gi(gm+YFL34V|}$I6FU5B z6|=!gS;swN@kvOpg~P=BNE!&bEKZg4P+gZIa%x;H zgBsF;Vo$7DuV;Ada``p+8gmOKOf1bgM0?k~cH-=Ah3TG@9MPvbTgPI&LE_Fu=BQMU zplFx1O*(flD~Vt2&3x`Qt;iHp9#(fuN)VzlCFuVdc^;eNadh^;L`*O zdYrqIxb8i!7vfCTn>$7wAttkF=w-CfH1xd*Nb(1ginlE9;jao_TF3=--BBJp_YfYd zRyOx3pixg^iYmp0iu%3IxKrwc+(Rs_9xGvjNc;qB!oD&-8s(aUTnqgveqac9KG0&+ zB<1Fg`zl3zi@q>YZQvC+qH3fMYg>tX*vP^=j?Nig2GXa6uK!iEgmAnxRn)a#cJIEB zN_r^vbJMWa7-GB0q*V2o`6LE&3L%F(m&oF&3=HxNj(OXwmdM| zUEN0x*JyLchP zsN>&W*$EOgQ=yve%`s}`L*2cXOb)d7#_OF!x_9>m^u~2`jalo$D45Dpr5ox57{!|JU#dL zY&Ut)KHxt1>Yk4t@{kN}AWo}MzpAsX;K2@9vyw=W!(XAqyC5iEv84A;e2((V%1q9JLA z@k#tj)PiSxfwv>dHs3hh>*WH@ubaN&K6Nm`3cD^2u@7@Rz%O8RI3II67gTQ!0XOh3 zsQtM_ja*eZ{h&4HdIzy^bz2rPj@@6xg$`Ys7d5=bnF!uPfYY0K%6IB5RCL>>&FJze zHQ0k2+ul$sJUh6DPdgHAuN&%M*;z{}A?+eYC!~6|Vx_p*aGC530M)8KiJE}-MEN*x z48G=-5;qMX2F6s|Je0WFN$Nr0Ng|J)q}8H-lWft%llmKsRA|v#UXY*#>67}>Q2*Px z{)T%^jYUBx7MMjW)wyppFAQ5wf1*DEKf)g0p&91BcK9o-Lym)brh7-{mi)IK8c*J~ za#25GsCp-1cpC_#;|}bHGEDaTdmlQlKno6^2x!Y(DD?=Xn*A3CmLP;7?B>1F5r`k; zI|#x3OARh<6CEBink#i#gn2w(mR`XCIDDi3r4hZKhyC*d1xp?6Iv{~4$9Cupqpq>) zE0g4;y(ET_;8+i_m!v6koNMU0@6@!ISGl?CdTm`C$@9ne&mdjnC*0W}#R$fX^O~y}1 zeY?3*!Hcbk^vMt6F(PKkV=I=6smR@x+`-JrKKcG^wK@C-$I8;iLg!6px*7|x&~x*5 z`=>n8u1Fa9Zo?!I{nZX*XnntOwo%=J>c>#EW0~ z*+Hc7-oGjLX-ItVyjI0`toU|6u9<-R^qH4QUpg_pC~B(Y{!1S`VWa^L8;kkiFZoGVnj`e2POskc2LlvBxP>V)m36>mf=$-L$2VJJ0w8VV}^rLN1pfs+PQ&#$_rXQ4MGC z;PAMsmZRPcq?jM{Gul%iYa5m>WrGuFS;~CVsrVulDf0rvJsj9f#!%NU3Tggdmi6Um z`$5d^DQzfAn8|P4HPl%3Mh3yp7&qb3y;{}kzBM_pV|Dw=9FWLlP^4&V_$dh*PXBO- z;cw!Rud5F}loPM8KgtqJEk+X{$N_-IQDW&;@ux-V83XpEXGosM7g;|k8aD-agNU$e z7H5H&7=OKLH`uGP0Pm@mh#Rl5&v4x2#N@$WJ>o}Afo&2IyMFAUkaeDs(I*IAHEce% z)4}+_Yx@v0og3#1puxaYKH%b?To$Ng(r7{HgN|?Smd=`}`zVAKIDIU;_m9AiH)9i3 zQjVA{50i>&6PJUQ{^&;EEB8FsZZ{qIAj1m1gLR%k`TLfX=$j{zZ*3x!rYe@)2#9^! z_0>#lOiXV~TsNbJORPtHE_vlM+AHYjhm=3UGakud-i{r$cz7bUVWccOpgjKLNYLX)PUi z0(C*nkFbpl((PSCVj=dy;_Ut`Ip6sGGs|69PY;4rxICxt7gFs71+XGt?nh6g2RG1`hV;2#?efEQ%H`6xfJcmU&AgcTmxlkSIkQ>}$VgrT!%v9khRd z`6c9pvYuN;Q0PY)Kp(SPdDmkDy{wAD>pTWeTQo`5bdPV!Om#Hz1i8|LInxiP#U6s& zmV;Y^Yuov}&)Rw#>W$c^sutuaS3?!9i~6PM$UCAX#O}$s8L>4g^YOc%+_zb=ANkvN zQ6O_}Q#qx}&RB%Szq|9%IyzcVQ4im)9jC@*M0P<>U}I@}ZT`eQwg`CO5%1F?XiM-L zBR>4F4G5k85#W6wU(NFq^?@sFS>?EbCpFP9>4lpq;C&96aAdt9SL*J7%o{PZ#)P^( zjMI45P8aR}{98^XD6(da<|(_9QfB>$`=YU@Lau7RX|}YD6J$mg=|V?|96!D9fzMAi zi)e83F;qdHB)cb+43?b%%RmvRjQ#&mP?d5IJo+i~p42GBDOH9iTiYOJc3nd`=&BK@vG%GbiY zwzy(phA;Hk*2#oISu=K*|GF$b>?6k1PakE{tCbEQ{rRrW#Q(N!R45?rkvJ+DzaTt& zQa1g;?A5-BY+ys%pE8}7ev|db<6_2C4YSemFZoq&o?A6Xug-<~mxn(N(yDx`0gMh4YpI4F2bTAg4*mKyq*ipEt9xi_u(qKO0uFc z)naG}NWL-MFWhnl&#CqR5i^qJHV*+Ppc~@OMFhie3aK_+{^pNf?>^!7CS(c4{eg{z zinbbvHMVwoVaHkF+=J{9E50tmjd-jJZ-p<~uNA@)fWs0Dk&znd$v?P^@e_@p-Q#wA zbM6cK#Bk^!#zP!$m@+ckxJtoKk6g%H>Z6oazt$q~Qndw#>Ll{{=D?!)`|+QRSS+bp zJFnl!RL*daWkTy+Q!#S3-Xv#s-IR{Z@g_`NccW5-36;jBZ;WFz5;AibD9b$9)x!KgO!g|%*@Lrf-E)aK`V%^PuK z*Cv@8lE#S?=Ihl}mI)Y-#zj;K)NMD>lQdHUYMh~x2l50_h&`I%0Jx%H{d9|sVbS(= zav$cn`Zzt?cTX}DH`bUQcBzIZ9x#02jj*a;XOqk`DWu*6#)Aw#q@t=wFqQ|4k zpd)N)dxa_Y03c)Xe}RlPj>s;rpRMitT1mAanSi30WA=Uu0xU4cwOFw20JGi2u0Y+M zHd0a?`pKTf{*K`_prhgfI^*~9Flz4&0!%=Xq}jZI&85>>AP@A1UY4_iH+zz_U9FmK zjMKwnyL%pK_c+IEYbG6Cw}+mVEz&ctR5Fm2675m|Wo|5K8$^u{7gi#YtOAq3fj@BqW8j&%X8GM%8Y+?NLsu{1Gm)u{vay( zo!MOdy?8W-(^!*`Q}`Dj{buA9#sxE_3I-ss#=Xl*#so~5ft(i=Yc~?Lb)PJ*%g=or zgg#RpM}TGw(^Zn)2F!{r9;)czKP#mS9{u6|;hj^7aZPzqghF2zbvqHwFG5b548Zrp zf9qnD4*mp`AD?*DI-74e)EQ5K(Qc>Pew_eS{P(1o2&oU0_fNkrJ}zrHik_eZ*3nmx zD9N7Q`^&MEIblxeUU2ID2DcMvB!lYz9P-1w z>))I#X5x#T2XkI^&)$z;_(#tCJX@Q_SmK>!nTL;;iU6jDJp!27Cu78K^Z~JS&lp26 z#1wACMy_WL=V*lRJiq`ERw%E2v+8oc0^{ED8?E7?R7LOzRs#`{!fy({UpoVZ5)VC9+`uIl8U@csU~n3T-2W^?s5V)N!kP#Y zYe2_1d|~27FECyar3z$sp1i=&(IDSODi|FT*i6F7@_vJhn>3S&XmPu_e!VxO$me15%e0lm zkPp@F(_Jl`5?7c*wux406zriY`0|J!e(6{{za0sN$yW1*dbLmQO>!lL6cYi1* zHO10X8=mK@n6pEu@tOT$Zp0*s@hH*4r7+PxKHE3($$u%OR=PF!829%&_;S7ObGVn&e6)ZboNEEDYg%yV z)Ol%hs84D)cScpNQ8?HyGT?_Lh3L~6*V~G;q{T!vVI(yw|4DwAV|n3AKkLTuZsQ%B z@D;322s46utRf2)3;MA&(>uEgJKqxz=#45$&{&dS6p^!j9{a`&Xcqu-Mhe@}R96A)3 z-k`}{3$NSPC@&B0_~1_wsUbXh^U|+vSVUL9;v8ia%UqJQ2=Ctb+j*b|9>?v74)ME`0of^-z?o*8k6Cd!=YcGiwVA2HUv!dV4GCWq-}c+S?!JK>YoYzCT0?0|7Arg)TrmFP29Gi?^GRuCaO?K0K!65?&a zF}yDjP>CIg%y$io9;!3&R}xiNZAcV9?W2o*Tz-6%xgsy?YhNPGD`^eaR6wziCH=bq z{R~5$mT>Jg$W((GR%9sSL$~UUXA3;_h-Mh%FWM5Hvj_>)CI^sl$qkXyxBQ`G8_M=5 zhdWWzwf=Sz>HV;0@uDr$(^NOlsovI!P!bZnG5r_+9z^=7kpxJ&y8=ZzRwbgO$oSjY z`^diLO)tB~HBYp7lb$l}QfIu~Ig+Y@&0Nfm!qzu8Lt|XN`^I3c=~h4w9YO5${-bQN z)ECgn1HHV3d4$D=#Bunz$jRRTk+G8}Jj#XbqTBz9LTN4k(vzH0Fz`|DYm5J69t&3*8h`v?m`na=CTIbSQm7hZltwp zHh3nNloh2Gg^&zVRsU$l*YdK+`xp4j^XMBZnli|vM0ouCXJxkGCIKRZ!MMOy5;a4O zpqlXNz&WccIDB#?5LoY%tse=i###(NW|6|=kepaD`hzz|w*a&a$OL>SS37WCM8y)9ZBv=)8TI_7cGN-hcZLsYd4 zp$Q>u)>l3JZYXq!sPqW~KFp6q5;KpyRq8}$VHtnXAuh8|_G6#?&jB=!6*rK~_9XWO zNEiF34MY%~GjhVGv{O%<8QF>yy0m2f7t~pDQIrCs{jG5k&+nn|I5aeBzELc%G_}#C z))5Q(n1qyaiwhG{CGVPVO99?Vy&wAvs2>}VCw30DobpGeN*^h0^H82j)DXbG<<;zD zz~)V+ZT83Gdf(12vC}g^TY@$>LJhav1qq(9=S33}lrGo(O(TfbK?^(@8YN^$qizw; zM$F#&o|;xFOgz8JLT-Y7eaaKRPF`OZA?6l8Vxz}PBfRN0A{;GlV}u($!QVLBpFHZH zo}Bq~7JmDB$s(+p#dWKhu(yBmSwx(WhN%b9Ce%V(Ln*zESf*R=q)hFgh2%Bb-_IyY z19V_lh^>!oJDt2&$ifaK$%3ePcU`UDnKaBnvg+_x?A1T*af&1q!Vk(dh9m;})`DrU$hKWgqidoc)Pv1WxN_t&}?Wh(7q83c3jHs0h@uvRC|h_ z21;|b@|JK@npr2lWYoMny69u^-=Plajo!&XbZO2M&awE4fu?uyh53C7=_k@L1j?v0 z6DSO{);q@r&VPMblGg^*qZ*<&9>St`6G;ZimVY=MrcKlN+Pn{{Uz@7WTsPC^25vK~ zL@|HEJaHMEfiFJyCe<(>*lq=%jTicurpp>cx82Y=nkh+eLRd*xhtSFNrLbHAMBP^K zJ?eW-@tbz*P6y(KQa*xjZ@duA)w{Y1t;ZvMyvDOM+b=>YhSbDN5FfWPQOV%bvv>~S zQTNV}QP0LQg-OQAnR10*HlrT3$6T~Qa zR7(;tzuAbG)H#H%q4lgy=@iE7PJuU6(j7D;6QJgULZ2MRQzMqIt9*;Lka}TYIJ(}n z9_$uedOLB)#Yr1^472gYlX=#2Z5mm5veLN&=C~5jiJ^G}4;Y4Mk-e~XMRWDsh z4D_s_;EXYLUDo~;3F%a%3S}cBQR}(K=u$s}BI`E%uzme0k5NL*aS&hn15bf& zv-TA1AZjfC)>FbqJBYXJ!^L-HCs)GR8Z7-rDPr>_8nkS!vC+c@wUf)S{DiiPc*NO8 zaH|ddoM6P$b9)rE@miCH3=>rG(~~Ck-}dDzllGgEhJvGcuc}tEM^I@0%8YonGrKU7aahSv!_kA^u7>N^F}n})Bm@@Y6Lw1sm~<0k z8oh~0^dQWnrLzRnaH(8(sZm{64SX+Xhi}eG3$LWI(v9Aq$MG0qzf{Jh=G`Py$X?6?BT^Ugq}34_Hu7N{5zAJjjepJPP85 zz5V1M>!RR7@1n1VJ#uODLw*2d#H&$~eOMTZ;?rNx=TEC>7-%pdlUU zaNfDw=kZfCp&LQ(@^~K;>ccNHE*=ep4j18^$GK3^V(Yq7Kj9pHR4>5qfnY2sR^J15 z2vXc2upt9{U%I@%2kAc^n&dVA>(pV5f~%<{7K0&h6Jc^6cud}tKi{2Rw4h9PAxp=$-aa<+#ey1M-K>nGmD(H0MSSsS#f94R-4_hn)PRh@>&|%WFWdz%t3A-(I||7!yuJ`0;~WuV2_Mjf&8-v*uT4 z6x!ScIH4-146CKgzB`;&2C0ldW7>L%DJjUVY#VoLb92#QHa(45fc*8o_aSiLdSCqV*j$dn&{0{y1(~sxt+p3+L zam%##sMahxExVHiPdl>o^NUl2$F4RD`2MYG{u5}XO+@&o0Brd9x9h9MFB&;IrAY>jX5z#KNFxVZ25ZXN?9{o}|J2}pEy$W}0;$X#u3pJs+>%oBwZL=Hp><^dy zF1#)#@M>9~aFD-WzX3em`GKI8lfMaU3Lgs@sG?z?sWO}MB0VTlS?Pck94pD;LFL{a>1B@2f^7N z7WCG}#}-RUj6K%_cC-|bmY=&t{<-fsgl~H4ZkB}4^q;eqJeJB#O`R9tyaA?j2{<`M zXE1vUJr4w--e+J|A?1f8J;>lUfph5wq|A!F%btwDm->msTH(!1%8R%^yz(G40YBc@7!f84F#T| zDn2bm35}}|6cPH5m|Yeg`Af8yoNtq)0r8)&<@-@#b*KIq^K}UngIQqyY`tdQHh+AA z$?f7ty7ksKOd^f}kQy}Fl0M16ZrV(p$v@#Y`uRGBdqJ(PC(V@RI!pVQAI^&Loy=lu z?9Wd}Z?nQEMcVFm5lxjUOWcXKgvGx-ZWdzBdhI5R=e6C3B7^7IDtv?A=|$0PSsBc$ zz3XM0SQ%lSThXGk@F1h;Z_E;Kp*L5LQcJ3C5nz}l03wHu z-_mS;iZO1xjt;Aibv=v%nUd$JS@rb|fje!UHl6V-8{Y+rGD@wq6~yc=?2HsLQvyF) z<~^H@3dL)eK+!w?R7CWLKMEnH(sQ0%Z#$QD3RU^tz1D`e8}e1ymlpLa86>2CUM=8O zE-gWE{&IMf$+H&z(oGZS2;_z~;UR7srexcFI_5XUhv0N_3THFD_gRQG<(5fuS3e$`B z6mM^2N84wH!h%e|eZO|wBbpGV0yoW6)sLlq*9#Zv)?Y<1P5l_t%rCcCkiOj{T1eg5 z$`Tn#hKQ>dFf!(ROsf1>P+q-&W)dQ`6K>a>jHc5@7(^$1eWI5UFv+G&8RR)J zyJ^TCQoj*^xNAaV7s2^re?x_xt+9Wnfv?^tP(nFS3H>` zi6knr_=!Uv(Hrcjh#w3@rCLzBRY=czmdjZlgP58arQWNFr?S!U&$IuoaoO|1E{%wn zMFLZ=Z_cTT1_l3cp3;;F+y4E^$2jEvekh~%)~U~=_IUVhps0&!;!!mQ+Q9YQ`Cdx^ z;NqFNVXfaB!-b;Ft!#K4q`o9yW}1JgzV@;CLXg+r;C7+S z_ve}7$K%X~W!tj39_JzY&*x88PMtQc-w>mS93J0RTgUW;VeGeg=J9J!g-s9j_A~xY ztgQUxo+d!I()8X76=$_Dil5qBY58ogn=G@+i%-lcLx8{xF zV=U??TX-0RvpWq5aKObqj;{J)pR_YD$aH$E57=2efbRZpJ6mZJ!1#DnRcH+4_|>AK zY7Fvjrv=sxb~J;;8ASCVf%o6xPE{o%qG10dXq*UtZ$EM=-6MNC*JD<2pi_uy+JVzu*3K#( zeJ|X(eZ?F7`Ec`&==nHFIEPd{%Q7!!Hy%73%w+ZAlhV0Pb|Su03$NciANUnakxx+? z|EjIXO(GFoVfB?Q2upu3cTt_no8-6UdBYi9;}zejKd543ZOdZZjq3T~LQqdZ3O3X} zi+*|E-&T&Ng`X_{(u%D1mlv+RlOEqvyYD=7tBJA#su6xPpK%+zJvfo zquj%OtV$oj+r1^%dY_Qk>i4l%RCbG#|6-A-7|fUL8a+i89SR9}Gb4(9%DU66 zf)`V_Kd6U&C+732Vd`97iw|`@%uJQ1xEX7@9!shL*lt-+fD*1WEtai6&P|Q&)?B_UE60ipQ2vjKD@^O4`QpZy z^%Y<8VkA^}8DYu8xoo)Q_R{=q>)-YC(d(^Q1jZk7LmV~QtKkaejd!=P)$Zha-D}yE z&I>{x|i$V5aHEclR?%Mu?Zt@4*rgrSV0`*n=bRxC8x>BAA@JmWG$vz-|(a%7w z;f2Nt9qL(y%Ei2^S=SWZ_+pD^%k7-*Ad%hP2wmlj>)vDc?!cF6F>NCyEu)N z>8nL}?P^~|Y@L9!JWn(Z1-I{ATF?3I!D>fi*;xr?B1)O+(>+wst!^&4-F+v#W$&xwI%Mv7hyfcDh@L z?_^~{zajCfLyeLCASn6;ozIEoOd#6UDC?4rt+W%EL>>pFZC$MmOUTdpC8o>s9u_zc z(L7#90Dk?Hne)p8(u@!4B-7@O2GYmO>ULMP{sC4Oqv5bz>8aeAl-bV=UI6QIys={4 zd5&1|tn?%ObIy37ikfVL3US)g1!eGQ_lbv7O=V-tyPl<-=w(0!gFn-DjSLsSrGaL= zwczEb^bQ=V3T90vU<%Fu3+WBd6>K*D&`n6{7DeR7PAE|$ANhhvrKpcHp z6KJT=-z%1d4RPiH5&o0COaQOp{_?E(;uP@h6aNo6gfWzmFQiD19f<`sI|OSl{ORe@ zmWLMc?3*%UrE&-T9vUuIgd%B6U#$x3&zSTboXyT%(8no9#m}$cHd`*s;Nz$o#q)8x z#Dhf&c%xtue@dnn@6AbK-GmFq`~6amLpjPafb&E3OHUAu2lj0apEu?`(QLTeD!$6; zC~vP%LNiv6@>u^Nd#76~%x10{Rh>61K%S#Q#G4o~5o%_A)amMSuMQXLPSmEG8?!r5 zIPwh`BL%p9M0Oih=+}T3kWTEV`qb+-PuA`>c5~$uld!9wrk6VJ5*oAdYdll-_0qvs zdu*!GqfI-F2SY`StJh7Mt5=ME2VZ=WzlFZumy{r_f(1Q#3NEYEMhJ9|T)mjrdR?86&`c~X;kn`-~REj>l_as z+fR&HuL6F9i5K*2N4;HXPjsbFFNuozz_!6UP0+c(>Ws-Upj-bJNtttuhqD`e)~S=N zP!raa-Kwt@mGE`L#tK+G>99E7hZT4}nku`<<(zLVK>zQH9tfQ8dHLr!;GWO?prL5m z?$k&7Ao5)}2UnV4W9a1$TVvk6YWRDl^t@kg8v#ySo@{DX4$h>xS-W zV(}4kMB5w;EG{jSq+BXDLbY%nAw2aUP5^rn;w6Lo%L`-EjUKkA@NepbpVjMVGPD}s z?oxjpAB^Bz;^!~^i zp1!lB_!lMoQ}nyAp%%{&{5=D3i8k{8&jjfu@&ZzVA2FId8O(vr06DRdV6GbRNiwFL zN90}I5NcfKTmr+_a1E@S@6~3Y&El~}H7s*fg(7Pi&(%&6ggUc14v1J=W?aRHaO+Jp!YR(d|NKcJm; z_>+R(0UIR42Kf>0wiJkCUCJV1#b{beUxRK_82S23ccuSe+kDOXD;CU#4= zE*3ple+l}kM7&gHM6(6vnUGc=PuZzjX4Ox4ozhlP;HQ{EpeQZ3*S)ESqZ!K1C-eH4 z_Y&cb%`nLMTp>N<3Kq1Y4J`F+LgjE@kQ`PFs)$u~2yIQ7t^Ik04ZFj#P3b`g0;CP> zRpE*>H?ibjt93*-+j7CRBAqrH1bp zplviD4`6jsF{D43Zx{IRgOun{MZzix^-VK>bJto+!s}AFz&eVvns4XlO#A|z4Y<|^x_XWI_jHs~H`^zj_M|vHS+Zd6$Wm%t z14d<3D&Upx9jD(q(a(HBw z<*W1|Wu@Z`|8g&_PL=(HnI8WClW$(;7rz4)jJ3~X9_xDIpb{Jg$NaYM9p+_jLnyr? z>DtTdh*}@4)oISSJ^$uf)K2+H*m;;c!^H@{Ul{`p6U~$IKU_Ota4VDm1@AJl4C$k# zm`Ar$P98&*(4AS7s;uQEr$^2jS$;>W@^}*Ej1-%rD+fB=5JzZe5x`Tem+}zbNVeg& zMum>NUo?yV*@L*WpX2lt)?}t!kq{InOI(66#{p?Z?8Q`$LWQAa==b8LpQ0CCZ9BL+ z^uF^Tt|OGR<;WkbRgq+HkZ|u4h$$4#@mz%yUQEAp{3Z&&H(%77(3~#1*;-@PnDh)$ z!%{+BmF4$XJgO;u>0@^Ls`!-G_*Kw&vQw1XzMRvf-ju7Cvz4kfFB zhgSK~eSN`7v;8O{9`%0v_=tX^Gn>OqXMz6i5R29sIove7dd=5Vml6sw@D;A9?X#V5 zT6*JVm9u+wMdbC=%@wAkY_GGX24u!(14d(ap0eEsnbN56v#ac(0i>u%jTGak`;Ma~ z+?|%%1Rxc}MEh#K5#}D!!Na_LFzR8=RH}>Jv@+tXb{}`wkwpT8I28 z8B;yv`GoI!PdvD_FNkBPeAk&Ns6!}lKcLBX=VA&<;H!`r&6h3gV zb8cJl;~#cE_9zNt_2R<-#|s)5Nd~-`z#-*pRv;Hh%ihd1q64atvFdB4nBShppJ(OF zW^G5$Sh0_ebIG6VbmA2+i_rXFNy+IbDQ^gpK)ru1ty1M#=`g-k*b~!|)D`1Kc(V&D zQg;xmbv~{Z;v^c5LMA=SxKhL0k-n0$PGn?Ck}72nX#B&F{$;(VdVrVox;Z?`%6KU( zQ9G4~)Z2C{mCfPWNUiABOS9d(6i1$-l>Vq$Ygf57nj)3Sx+XqFwCGyxA)0o~@G0Xd z5+_KgM{mEc3V{)+urx$PbGU#zosRHfq|GuS7a6S;!&D<+Kyix`OlidZX!!rJ_m)vr zuF)E(K?o|{NGw1)1nHLU?i7#~P`VN6k_G_*>F$!2E&=K8?(Vwpa&Px>pL@nR=l;HD z42O&Hxmd1mzB8Wr%=q-*OC;N~{7kE$V;ZT^rYLdRQ~x5>jnU}OfsBh#qFj%-KAm4G zOzXVn=aGmQ&;=3b5`#&yNuHxV7&G4VK{Jx!~M5aYoZsjk(lI+XEg zs-n3ew6Us!#XgJ~HC(zq4_%8s**K-ptmXCMTDtUFrGL^7C?RX-} zEb|!#=Z$5xPD&=`7bId6qWbp}nfYO{q?Y$uY7@yuY?P1TWVR*k^J^ZPsx%dxL^W-I zyw=^*M<@>OD#J4*S~K1`I(1o^r1xUtWqaw`-xY%43N2wpCHRAnf9LwjjWippSXG39BCoVt(@ZSHc=oM`Y|giiWvsg|4;2BU;yM`-Kcq`1!zm zm5HWQ{yJ>^bJpxqx3*-@F|e}BngH(^v4V7^@Q23a=QCa&3x2eHIPA1?B6v8UVEyb3 zu4C{bpdLM?5U%*bQ_nV4qG!lShUOb66qx(9oyvuLxUNF9W-2&m>v}Ke46hneH?L$3 z=Rwj(E09<=+#p;4Aw_GT6nbeq00~(IEowzKrB@%*N27_X?hc@Exx|g1cWchEj@P1g zK!y11uDzfa1>z3(O_8kjz~)rntII#a+5(sAz;g@lwMkX{qOs2r^5V`JBn|Zr0B7E$ z`Y}0?sHGL`D`?i+uRZqjQ2728i`ED>g6ZjmxaKq8&jGHK6mhsfMr7_zrIC73QhxYB zaB*f=;Z&L>rXA{OmXcFd{q~~>NslWNn{9MCZtGh&9&G>az|jR&(Sb3U>7_M*gz*Ue zMJIJ}wV%UB3Es8q;Y<=^yn;(Me4-xae;oXvrFS$J!ymauIBz04eZT5diV&^z@y|+E z6th4RABhWn2e{j5(;i2;FV)u4xR?hiNb=uGeR&`HOt+*QKWH_^B-Riz&&S5i4w|GS zWpytmSDuI&0&I}XK(W_v+Uge>>go%WH<@FTgeXctKioh6VL3@seHf)^9cO--;n!fS z^9Fw`6Wu@>GM$MOteVPvGj;pXz?<>Xeri%EvhHUcq1(WCGr7EE{BqlBN3Jo)*iG_S zaH7QhjOvHBo0v{KwFXkcY2vG?=1#v_pP%O~5j;rdwifc3s`mMYrn+TIWHroHBH+`Sztpz+HRcMm33BB}NP1JjtO*1pv^3uL5&j{Vz{pH-&9 z!-XhDlv69K$zD>%F{~ZLeQF*=y)Azl^Fg`0;I)(S*>v_w$>^ zwBx!X9MA_97gFH@XNQP|f_CC^;RPt}#6 zJ`3_c_^j44Y_uDp;YMs<+hU>nQc^wbelH0~sWDZ>wy6eb&ag~l3@;2Xc;8MXzpft5 z)X^zffx)ukHZyfN>1biA6aopJWNY)8`?UWP$jWCr4Wu$vLX?g4JdHuF9;HEak4bM^ z$SI|8d$sdhIrGl)AyX3S$^4Zo#^cS*7)!(e47BJo1YOBkesRQr?!J|~F&f02Tvyu{ z`aUR_n0Wr&sP**Xo!W;U6#Z{v0==`hJMeXH+NxG)RGtX#bnE#CJrb!Cd+93V?=K!O z;X63x;|NC;c6;n7Iy3lCXmgHKbja31B>DqC-*7e_H_fen$6W%?coHJK(wDdOB@-0N^T`#|#&R$|y*|*QigQ|Y zi}#B}I8^_VrKph9BxDYxB4)^B0u8$n!FF zF|^=bp{?zK6hz){c^Rc-Z!o%c(_$f-+mSxMUBY*0lZwpu;)x`nE-oaOoIXN4$fIK4 z(Sc6!q^Mll2nby7x3H|xvBe0?rO(7sGVq$?KuE~DOHZZfXSEhSi;JC}SYi3X$9wlk zE(dy)%~g>hP?=sbWR2#b`JdIatF?bY_mHi=s49!;{}lLAmEK-7;nB1T!*FTgwZYAV zR-^ML(ZsD;SnMI^*@=P>c}cIafAKQ&2>^>-u2$pou=og(Qo~tj zp!VyCZA0F?qJrx#-Fipju2njw=d<`IK#yeS0H}$8cbMy&i|r~4_UJd#BVRGm482=H zTF5c2IYkWXHz3HRG02iE)7P3+R+%%CB5>*dWGKr#EODaxLaev5B6!I9{3iKf7*$;K zBmbZ~obGkav{N zg`xKjQ_DsEp5P?K@9uv+_L(pn#q?_Ly4GX2#o-9qxsIH|8QW9UxAOb<(@~RdYvUdV ziur?nR_8JDYW&{@&I%5ren+Uzo)16`qNo3gCmV~Q;o*q7n|J{$6gDNc$>$GJP%a7g z(0pb`@{_BiCL#moD!GgpBTx~uju}G5!qL=Y7=$@jo#JhObVmvYM)l6=;2P(2D|J`( zOJfKuI)$#St|bbdAl^U!<`Nt)uQ#%xRaeUiyLL>UUJ4tkOGV}!{0aTor>F- z_7WLNrQ)Cm_VwmwGcBe>=6t?fqo$adkO`bp3^E*YQ5%SYtmM)-` zz9SHC4sNSt?iq8)3px#fJPWv;c*?uJPJ$GkF^X%IlJ4%{_h-@ z#-lg;F)F;UW1o43{k%tuKQx4PB0q5rEiW*HlPCU%3BdvrqMt98lmrAwjPDZAO;Pf< zkoykcgKc9!p9S9?#g-ZtLx~9v!Ru<(Trn!1#Ui2QRrc8_y_c4(;B(P&{QivzamfHC zd_tJ(7b*k}fxW=rm|3{nzel)xIfDf4tNeRWG3I!NDFvaZ=AyM7A&HtLc)Y&V@hWql z)*A|i{Q?xqXlvg-zVci8Ifgz5kN9=sLawSRF+g z9v<51Npu?V0T=p4?pZ$oDjCBMNYf-G4_;p~y`U?9yFJzbr!kuMdc$Mu>S<>; zBNkdkPMiY)8dYBGZX4!~d8#Ij`EvV)fWkBdnJ{9&2#OR$-mURqaS>RV%{LzON=Sk>6bk6h0h=}lC46cR6PKi+)i-20%h2K)PlK0y6>;)nNd z>DS=DIIPtok&qg`D<%>UGV6Ye8q!6H7`3GRmX4{yF#Gc!#co23{QPXaMUPtH$5zfJ zeIj*^HHf0BvjSkxGe!RMIoQ#_>+4tH^t3YxU#>Ql_2XGuZ`!S((hc(T9FE2?=g(Tv z!j2Z9`6Fl-Y#CzvNA)%)3%_4QdW-tW1BTV- ztA34dn;wo;p%A@+QSV5m98!tWdzY17ywRX0*-!_ivzP=A zBp%&s{0a37GkgYmx(9Y2`twU|6g(Kio{EoHu9_i}ynlI=C8=+J2-l?L|C_;}A~}MgkD%8+vhpi^VVK67-8?jt z`m^4;ctC~Lq6G`=Cv9^qIt4}ONp!u$-%#VP>?0Id^&FRtu`IADT-;jwg0OF|XTU=x zQLWgT?M4V7jBG{stfc1VotyNJXNSvpH84eZxow#+6>p~vzs0LV_elbH+=j?(VBa5NPTY|#nMlm`zJ(Kk;EGcjnQLEDc4a*^%Qo^}eg3lK;) zQ%SL!oRzw+p=;3-3=zK5)c->3wD|a@DlpqGrtu?tFid$);u>LB^C7wuVSi#dgkWw? z?!MllBy4G2IWOjvcUTdft}edcx7Sns&KAja4OXUTePnT0Xfy!jIp_Z;i$Vn!xt?Vm_7$&B)%5S7( z?fxu8jn&b+4?S?{4(f^6NCeXpV|<{&VCO1m4BPLXPis)i%+#(1NTo%N3qtni@4Z>Y zng^`c;yJ<%+j6}{|8%I$1B>|Rj)GWa(XjLCq_FTH+1qiy;V7*&^l`y|TEC$=b$jZ5 zuGz)C;J28N)W>j~$Gxcft#2S~IML9a?^jhOCpMn02XWsgUpk4Q$YV~$APe+9O4#0S z+kJ9ft(aV(XB%o_oBuizH8d0ZwWb2SK-=7VXO*XD$u4S!fltCM4|gvDkkIr(0zGl& zo@-!7%kREq%(@3Zh)Dc^IaMQ@Xj2Goy^>E$$X$XN^&&tZ6)8c`Md0>ETeTG-R z+pYhKQ&G^a9?h(fm^DW%X&2mgd2fa@V>_dS&SYN=3d#MO7b5K=1>zkfHR}`}qX)m17^l7D;922Ti8KJG!t~tQDoz<5SiwcLWsVej( zEXZro^;NZ%f3w`m);RUy(yZ%#hZ>ZM8gi7k5|2o>O;zKFqeAq{`48?k+xVq@3r=D zSj?7;Ynh7q9|e_q`&<}UH>!DKWu`@iz^0)dG8}gdH~Sa%~vPT!WdsvgEE)n<$X8 z`oQS^D<}C51>eUrWmO*5&;$B1oY(5J)O4SYw*E+ksF^c-bv$wKt248&)+wT z$x#>`+K19U0yq4W_XTQi0x>$Q`p;EO?Jp)XU%@`v)|q2k?Pu{TwvTnW%6*3IJ4>RW zAAP9jkAyrZ%q!OOqs2oMy~J|O6qRG(@|DNP;ez8l9F3oD%wCz0vJ&h1o-UH?%p}$V z#53j~xo|hlwbMo7lp?G_#oMHcozDdCY^6GAxrlz{h#%>e8c?sU+-j9q9UEMjIaSL=bfUI+ z%Q#{EWLDJMqnC+5$~gr32mk1JbQ%Nu3yP%?svURsFj}4>VGAri^$}S7;idk$feH*J zT|03qUvr00UOQ2z!S-YF$p*bton7uRUzE#v@w^PTX`k-Erm^Jwf}w|tgy~SitFtpk z#)}WMj`QoG|I4$T;{ad7Yd=p<2#PU}*-y1S@4JVE!`d7M%B&dhsg8QJvY{Dv^`cj! zJqc99Yx2D9#H_~X3qT&|jVW#}?~dd6B#-!`5Yo}LmWM(>tw53}s-Z&9R2n>H)7B&_ zr1=DGYZ*~QB$Rlqd(F1}d*Y3bgaH+qjzpGn<(UMe(7gqD((0t9@R6p_3`;4$bAX5k3FPorL#(ieT~a@5U4gBQXYu> z^3-^-gRWgZZ5I_a0S-&#?d1kPR>RzvPa-29_w8d%>|_J$QdpzrK}YY{3#xzhs?4&i z${!pR6`gZX{yj!_Zan@UV{`zzSyrcgb4(E1auwCnFvhh2gTF`2YtI1Xvb!~5Ik2uW zLA~2^*@@Z3Zr`ppeTLrHaK7P-C@dlpvxNhuCPb9RMgH*U{0|z0f!SImR^?>@5<3v- zO6;pQbkqzIrjQQT1P0Stec~F8WF+)y?8?!z&v!6f6a#p~B*dnJQ)kGxX6T=Q(q)mfX#~t`?`UAA>c;fFDD{b?+qr8X; zLlo24>l=9pdQRVLWcvDCH0i#venE{JM^fg6e+Xb0X<#KQVgM^v9m#!Js85X2+V~ME z@8qIfC5(sR^g#)tyUU;X_7gUr<{OSkHyunwLv0a+Bzxs&AFm7eBCT8do92*=Nonr5 zCsiKtZ?R9+a77+5I;*4gVc!N*_h~suiQ6(9QIl9Lwydc7@B;@QtPco zI~<8pdWcH5=P($Z?_^{u1-Bpp8SqD(`e*0}`os4spjgKRNA@S>z`zFdh!CPsfZ;!f ziRi&d06|WlbopPJX&3)ZV6{7kVB-2DgKCe@veq}D5 zPen2u(&V^jNty>MWW|vBA9XFvBB6e3h+%oK)V#!T{-)r)tuV(1d`WDWK)AthywVqJ z3#*_<0TQ^h3Ytb(fyAW+`fu-%pL|lTA<)4Nx^i1ybU#IhrZod&RAie@#Uc-qpy?<= z#bCmb%$yo?aAn|u@QhvKImcOf;t#g3!tA~*rI{A?tR9m3^zB8`f+{hypBaGIiue!O zJmDurzUu0w>lvS^P8!;_A_&~x87D7cqed}`6k(u+WEcO_aQrKGs`L6jpU3spu*EEf zVK38obunSW{M~Vsi>?6E5!o+RB!m%E0+zm9L}7ypWowY@y}Ejk45bEs{EyTIN~qog z1kxqFf6!^in43juid4y$?rMl zMfjtPYX|oF?`Vtzyn{vdo{K+}M|0E}QO=mbgI?G9h0IQguU2^NvoKz-31 zPT`QztmMc_Sr%&}x(EJBGse-y98V=6Tapi?YfS+DC#!=!><87SRmHd72-dIhx$t_HBi#rW!C->+&>0W2{=}ahqE_ai8mX1jqJr0Re_d z01oqyrUWI{c5mNH2>mp2b@PQJ$^b@x^};QtabZkSa6Asp>HHpi`q~%KOtBd)Vg)g5 zFjP#7#MAdrV+jyX3OyH9S#-1l6(ix2F6gk6c&85MTG=G#Q9-V98BlO50w`3oEYY=LGGLWtEyyx8o z>R4R5Ev-%?Jgz#2Q7pfs$qTp>3ony{x7Hyuelq$CuwlbeR{jqepb;MX2_3fmU)0E3 za?c1Tkx6E1T>vG#)Sfwik^IB>F@J?~JID9aWr!3AjEjA-!$7RL1U7v2=}FwRDY! zMgy|K98*jr)x^HGsk?O_p)|V&EQL2(DHs=ZY6h`tJ#WD*Y&^!lX!rkOD!|q6`-;Vu z!SGLaLcaa%P$PpiPsf?-gv;`#;w`Q`i)yEfZx02mxs(5 zo2TYks}%=>{&@te1U!k}#^kr;4e#`?Gi0w22;xVYY0gem6Ec1{UOiSE=49wb0x~mP zqh*MuNC|Vy`GRrgBn~E>9L0%r<0iR%TAA#=xZ?cLN8-7N23%Cs{AZm36I|>!8y+4m zoWX-)NajSI_bUYH4BWZH0&o*TNRej8nVvbYl?Mh%IIk4H@No60pnHB?V1pi(kQT~M zj2(merD2Q6?`yMIAVYy{TV)zY&7*)00Ln$T6<9S{GcE*0qT&bU$oY{_mxkK7%Rp*u z4tlZv`*y&6f(NIEUu$J=&ubg!zaNyfXJrX8Hqie}66p-nWp_CUUiu(7>wx?&lYn zAQ%(A^UKwRZ&f8MhYOcw)i_ntj24Ig>}z=JEyvD>%0YsbnoP96^*wMiB9vCP`Jn8= zOk1auGEnyiA{wgSb zQ#H&V04xb1q9kc;g*^n!298d}Q6*&HLo))^XbuBN=N>@-~$A~}4GQ}J5^set2`)?56F26Z|x zde&5E??iwEUNXI9_&qBn`iJ|O9|7{jBb1%eXmZRDjLPU&=3M?{C-|bKfJGwZnd{vk z*%z5oai7=`DMcPI(5h|=7xi~_yUicN;0fZoXA z6=VR(UmMW51Sl%v-yeb-;rY-`r2|Fnss!+CzqOuM@+;Z$D;LM-C94Fg6&(OTWJ^+H z80xL}3=P-RVxPJ&#otYLl$98G)XB$Aia_LrM&owey z!ch36&`o2#t_x6~*a*S20$3@SsbZ-KxmU3CaoFiMtTZoWnxjsoK%x&$qJ+1U{?T^% z@`92`3rST8`IVzyyz#`@biC3wZ#XH#2pXwSOVMR3$=4SZ<=dTn4utSSi0{! zY2MujmL`;D_R6tVvfT9Bss8*2tOcCW&iKlS2@*|j6ZT&-)y%A^IL~Ok+q+a-Ap)d? zlSPmrZrSOiPa^`}%+%6(@Jkb{3ufuUX^fMV2Dq?}`r@T}h-N$NSLRTD zfdUGw1VU`;pb*)L^XcyIYMLu(b?EduJ(ke#eN0DYIcxJo5Aw=HDKEnE%1Tz#8#Cc_ zYqC5#0t+oKDpcS^f)Uie+r!U=mX{}(OilL8ZM9VtSw($e(_E!s^hpF3_V)bHjTPQ8 zL11G-pNH@}j$>gGe$-H2Lcx0GA9eip8M`}{(*^9N83vj%M%_Q2cnQjqUY=gK3=JuY z9cK>B>-?Dq&~pMQS|S86UC#SI7Z;PMaQjTvFPCZQUM>ui%B;WO)TAOp6@`i(yVGUu zJj}#$l(s|qUcHS!ipDskoD$x6IkAHr!sK4f@-T;FF(q%2NDk>?yl;x?$ZI9!Gp|M? z0uBbynmL--)e>RAF;1rddN7!4G*qWVL8C#-LA*dJDSBnthg$Fzp*XT0&}%|gT&TN# zf2+D{|1H58hX;HN)8358+IdsAIjzjx$L+|SG(SDWm2j1`AdKuU?y;R&cwwF7 zrRtm@K0>ZA>|v+i73Fj%$Gr-D{`&OLV%%l9+*l7Z5 z^gNyOW>#_V<-u{QIwi`MB*M|rnw4OA*v&GUX&i^+N|4jI!*Q@B!BscS*_mj92nz}^ zOw*5Tt-7-rh5Q-!PWR7+v$cYP+?1zy)ZTm-;fu*M4)aI4s+;YUn0(=tOP7Rn17%=k zLAJd7SzPQhQc?#(o@j3`3N%KW1EXhriTP4?7njZZG>|xPodaXVgP#d}0)b!7kiI=p z)fvU`yibBDq1V;d+tHKU-&W{FK}WayC}2iotSlcFo4}|#_6_stR%5YtU4J08!Hwvz@Wf#B^ootk4*YUuv&4&HOW30DjPV z1DucK@x62{918F6S_{bJ>8nd$%tPfItl~I1Rnk?E&=m{>+Bx1B)iA1;MO^Q5fE-XB zvJytu;GG=qhBUG00UdqQM*la7^Bo*;|rxc%7i!0fApU}0}KU&68q+2#? zM9(+RM$X+PRJ0Qmz(5aW+QE&LiSBSAS{CivF^le_@VOuAK@%QZXN=pI^xtx1&9jca z*iCb-x_rSZ%?Rc_zxn23+hTNA{}fFBW|$ADET*Ma% zzGAWK1PfspSMxvwtp=5s0OQ?FFC)7=N@;ps8*g@Yr&BWs`>rjAjC}*6!gfl71+qf} zJEnrdTb-iZh3S3|^?>TTw^he+m}o05i){<4>Zu%N*lvICyQ=Kk2bvDS`mbh!fx;WV z8UNFD%|}8FcDcmm@F$RWFRfjV zw~2>yRCE%l6-oGrQw2C_toLM*b_=#*Q18KqCg}&%WN%UCd&9va92{6m3JGU;Y!Yn= z*|tbaj2up87!q*57iB=DVp1Ek%p@^vEQwqb6amvT+Zh5JS!pPb5~Hhxx_3Pg744_` zZ|40B)yhx#W`^4LxhUSwFqRidx;#$=Oh48I--6( zitz=q!qe9y{R2;ZD1t)oJc_+j8&C=e3I131*2*{wwv(i?B_o~vX5JbEe+6p|5UhQ$ z&>RBG>(Y3yXG%}9{Emf-PM_L_GMaB-x$?M#6iTarq0OESq4^$cOPes%s%@T6A+@0k z>s>;vB0ecO{wU+BogOQQLyRpq{J^kabJ0gnbu*Kj z`<6m-(lA3_MC4k_dLUgo#*OL0;_Z?#9aY|A#J)67$5mez8Vv5^{S4?E=5vap%xi2 zKm)JAO&T&#)t@Y@D*<&EXeP6nV!$B;3ANt;vp1{(3UC<`?MspXA~JXVU!dye5ah|B zQr$BCbfQ}|e}mnqgsbwBN4ni#$WUjjvi%R&OiSh>Rm7OlmJSae@6RXjX$(Fy-`fZX zJOAc?Z@fs+z%K5i&DsmYKF;gPw?UJcTICiB5BrfevLdHX33)=YW)m`=$m`zRbT3pP zoaNa$El8j#!Lg!P&w>4O3b`?348{e`Usk4UEhG#lw**n~adVYM#=!nNRMQNC3~7$n z%LP2|MhvA#N+|jQDT9}e<#BeZJDdC#(ZRYESoX-M%)V&sCX&)+o0dX;zs$>ZU-6u{ zZ&uS!f?Bf^wv`5{ullMK&$lZlantMnfKmKx+!5F$i%&A%pBDDGWM8?tlRBrZNp>B%^{7d zw#K`etRPxSt{Kp@XSR%-)PUi4xSY%{7pLW|2F$!LGsh9?Xjv*cB-+P z^|)7@^tH%|%^;GYqdq=CC5*=JTywKG;j=Z@mNhM{bLX<+ao6}J4~7hYx0nDs92+OMjZ;na{kI1}Pq#Z>TO{l@8eM z5jENZBuGopS0_0DeRarFlRCgR*)&s!!>{*|Lv&iJQqwLDKh=sH=;e) z+Rpnb??-Lb@{1P)9tS8eB`{wiX}=MmD&%2#k9A7GlV;hY4UrG@QFx&wA>oWA5}fGy zHk^E19bx~hB^?_+&(wQ`J&spH!fjIF8Dzj+mx*MVAT5hs2(K3 z780Kl^@7jYKFo6ZZ-%2{r>m)cKr}sTG-gd0aeYTdfuClH+W&YgQWq~D9Tz!K?0eeY z4<+AqogE;(4eHV~dr&o{A_HF>*?_PHsaMF^!a}|52BqEOD0Ye|Rm%%B(WP7I0)V)4 zv^Err20&p3Onem;P`_3Z)c1c7b73DCpq&enS=#x=&_;Wr|CyoTf4|%Wwqy7o*LZM# zr|yeK3c_U7GJ(j?wu?1Pk;8Dr!KqV$ttm@{)r19jN{X2Vv)u&eZ&&%uW+vK>S_*~6 zRP07}`BZmXvtFu#4P)}pASG@?@s20A=C)fQiFNnPebln(il*o0Akw9kcj)1PF1NYb zljKh}r{ElP$J8w(0j$<$kZ$4VSqmIpMNX>5J;_y->)7VAhm(~$S1zcnaolM#|5^B6 z+DG?YB}uFMAAHdLWavJ+tWUM<$e@0~!t+0^J~&76T7C5$L6aL3s6x!tG>K!sa`Qo&A7ylACKGvKN`$j;uNs z{V*%2yoZldyf&X+$?-k#nlBDVlWJCLb>ah;kKbx1pYjK$9&Ed}Fkui=G+ z_cM@^t|p*70~02oK+@NFuEX`KGl};=m>4XzBjI18dkSzVb8EB6pTg6HP7aLg;k;k5cV)~lA`^+ zK<;<0qf6U>Kl8RS%N))bFi{ zM9<~W4!`o$M5rCf~Fl-!}5ZM_M?L;^pC&sbck~9sH`^Y&VNrY1cWiYb~3Q0dfd?FWr zuxRY@x+iHV##t3&%UguXnGwu+-j>tZRUz&oEp*%i>V?^TvDi#>l~SP=naugh2zxwE zX_o8jvUlG{>qmJ^xImm(c~)WYMSH5B1&<9RR8ltv1@f^QK+iJeqc1!GeQ=F>bidvc znqsoU?!E$Y>O8yu2XMTHU;;wL@b~!)8eqWM1NZ+I(Lh3gusll{&0I$cQerwo?RZsk zzosK%;Ncz-+rt7pl_B9rw$I5}v(-`2lWWAQK2bzJK&?2;n;V-C#hkJo3Zfws@r7TS z8uM$O>&NPS2hj5in*;J5w{&L8l~)CM$u&rG0un3l34r5*eeJj)@6qtfbkqRqCkwU$2$sSWBJd5 zWRq)^2}l{*Wz|jMB|D5N_7B}Iqk2RAqb5aV$Tvr$q9ZWSGJXJ#6tPNoLdJoJDuefS zw}?IZbFMj?W=fbzjM4;=D0KLbG5P0XAf)4ug7a9kz}p{&0DAk6KmXoug998r0qCCQ z0OIU@zeu?U^D~=?kQssLU|-LKMM=<^8=JOA6uWX47>u3$4v7vkTYmJ6GZ52~0a&+vX+Fz%o8#f#P-c1pfG z41J!v_|u##$D$S~vGvY7-B@XxlnTn>F}SggnPdx2nLs4$!2)cH*o|^O;QR~B86-5s zw8&C<+J$@{z$@0+p z-(0?l6H%vQ(ZEz*kP{)UJIcrr>*LTNQwnuZLq|Jh>+Ly zh&Xd+6(RoXaKh-4L&CF=o0QJ-4rLmlB^!v~K>}VasnC@Fvyc}Kno$or#NJ%5^#fc;}qYoXn>JXlbuWa%gR0i z58m)p3L59|{uc$pUkqZogub*D_yRUh|3ZZmx2Pk|@&bz$u~px_*c=o)dVR zz|>@tN&~(PTPlgb@Wx9}nB7~mlG`$(Uq0$uvsF0_ux*u!zxEY@(?6H7az%E>zwLnxI^6<{!g z0}&DLNAQc0MtdL6(pQ&`CEeXMawSYm%~Vg+_D=ukGft+cdU&mdt+Pv{V zZ^$bwh!oXLjQDAk$nCge%9QVcyrraKHBCKNd-ps?{_NXLFz%q{ZsVr8X>H?q-xH@p zE28J+*qF;bLuam%-4cOlg_;yJN+<_RV7I~<6&1abZ1T0Qt#T1xr3deqdL{SEsYB zylHkw-#kI>I1(%*VmVZ689ejP^kk_;=v>05756*RKOLz0@wB{^00L&5#oUf zKNXniM<`;pX+lJNk5R;qZS2(W|9bZVYNv=}akUC-`>`ak{N7G+7wJm84U$!Zw9Tvn zvAn~i)ig@=MYBP~u5N>Unbe(YHLYfuI4lB9MtZhfjjCTw&nGxyfqlxLa>ljwTeRK)ue`{W_J9ZB$)1S)@R*EC!6_{DiCmO+)+=dsb;im!Y_v{RH zUnRRi_}mu@yv;Xc9+726BFx!62w2GD;If1V65ILE7exgNuD@9z`7O#1{A%EeZ^a?* zUIKsWOI%MOVVZE#l_Qc`XG?E$M;MoX6~rN7RmT zMZnX_GMYwr|7Z1cI8)KellQ9Ks7>q;>p_`mE47?tM>1Qf9+iWO7kst*GC zTw%}>-AshPhurfNVv{&NCE2w8U0S=!rXZNjO>!K+ereEzD1IifoTSawWl-goc0p&9bY$rv!87wBhiXHh z;UmXVHiGr(K;#c}f=JHvZ(nsKZ-yx5!i9UrvP`7wmW7Gs`yCgXmX;S4k;Fc0@l70F zV}1O33HKlX;cW^pBn)Tsu*|6l<`J3m^ImQ`aO-cy{q6rl7;;cyC|6IFssmv-|4+hL zEh5#a%~5D@J9}yIz=U_Trgv&3wKl2GMXt?VxAyL2%I;Yvt~5uUDHa*-X6W=! zGw!%e*$-!rkrhSU^{J5&^=T~P><-D|UDqHUCps;AJ7&xBVGbb5y0g3FOdqZD4fSP! zy|jqSV{Bg_ZndhdS1hcoT@1+{s(A`&?!;h(=B@Kp*l|IGDM}@y`i?ljz-z&%}Fsy!T3}7A|7eqlReZumouW-u+TME zTs{ZR&g0p_yT1V7BEL9tKVDj^^G6Y@mSkaz;pO;B|&_ z0RH}Op%XKMD}sufm6lP!_Y?p3hA8<}(6l7VffDrwZ<=m1z$3(x&|>U?JZt;5nhFU) zPoS{h)^X&csmlSE;jO_Uh`qDMYssT^#>3&ro6XHF#fI*08CM0Tr4jnLKWl@YtSdvF zZ{`Foo$lbIIDDK7H~yr2heKQi?doz>^f)DQ$JAyBc`0e zYU;|Q71T;&gIP8m3Kh2`L(=fDi8@bb2Gwfn6+6(tQyCK84{ZIc&}cODTbDD-B)WlV zFQh)t5lnE_rt^8YvsAUJbHkOnmD`dVof}iJ=}?e??AaRQ-8>{i%*b6~l(j?2Ph3K9 z5XT7(1rOjU{`UXC2=%au!*EXL?u}hhfDj=3--du+zcmZO!*M&uqcWh_0?}#)^S}YX zHF$HB0msOpD8c&ipXd_y6kM8+d(wsj^u9;x|33Qv1oD3x@~6q%bJ!pJy$j&~%;*37 z$zNFV|9=ja;zvPvcQ4vR!>jI^lh}_DNP3wj@AqKPG|5uE`ayWPtmCIe{wKcQyN?Wo zTOXc-TymFJAhY|G-l3QPyxGc%?rV4tz^`bKHe;yO1wv`8$N&B35)GY)ihfDd!idKTmRPaOO3;V-a@^qm<7 z?V%i542~-ZY)wUah1(#S7Ai%!{gq8YA?+Jsa7hKH<;5dUp*8BN=V9Z+atz8_F%s$4 zkx?hl$TGCA*kxB!D;kXa{4cHucD|^}QNp%mnC`vJ&to~lwqK|9$siay&6_Gw#xu)H zPfyKSXB=|FBVj3ZTXF4Tpp7|nCsmqDwbjGZk2^&XbwtPjb2;>tNIN+fQ(C@TzX>ia#vP2OB|Kv%l=|US1z?rl8 zg8*|rCqb3FHQXGHs|@B5wpNNx2D->TLHpQ+EFFf7nX9&tQwt zVf}F#`om)pYpCJM5LqG?HS))MPHgk9sWRGclDTe;5_7qYBWW+Tyh;}$t1=3$C9j>| z3p?OCZVL|@Cr2)h4HEqDShb&caYHa*5X!z~ba8z)7FQUzn_|!yzA7FRQc(OE^&?Fe2ziK64m>Sa&MJCE~&cGKxLK7ap3>JWDz33KdFQ{H5HF z8h~=okG;_3A`bgZC*J<*J3x1-50Rvk5CKGsO6dCQZO~u1rU&`w9_C^1OB(pEJ$xa@1!mNGgq3aiR-+wwU z8c5Qg@~67z&Nr{^MVt)Hev(!EnUcn=ltUrg&MPQes{wmYwoE3n;UtobuVx9xG*Bpg zuPLkRdm6pj3E^g?RgCN|7mX>>6|4)fJfHaciG;@3=sPD~!Y3nc6f=kVDoNi>li3nF zV9?5Py3}?c02uQO$D#igDv*{3(Ar~Fo=F=P7_=$HTp@`~|fKz0h>bkaA_$S@ zcBp&}JGOHLJu?YZTirfxu^ zJqNyLtE|VZbdE-aP>4ElT3@|jO$g7=A2)3@$esTWdv6(4b@#0eE25NyG}2Pi(j5}g zAl)DhQqs~QN(jh&^#=quQ>n2_(rPPF833K+tB+ZCS4y=naJe*3sphpr_q%`MJ?`Mwr zC7t=M8&A3IVr&|WL%Y4Onrw)d@S>&dvWr$6e-^lmD&yL6w(B}iNeC1k@X~INsaG;4 zP^4VXBPcZ))nP|DJ@b)(X>F*aR19A+1%W&A*grR|DAMi(I`$ z=e;s7Q?OgzS;3i@{571CLc_7C9#6s>JE5X(7J@{{DcZfKa;^LNwUT#_OQbCRjQ-;j zL6MchkaJURq8W#mAgiF^Ml=3P75u{&grxzGfB3_`n$M?&h>1!2Fci=U*CS81=s_b6 znwaCz--#xS3~ZW@Z{!h3=fhKLxK%zalh%aB=M84@*$=)Ptx>q^oF_yT59pqs+Zr!7 zC38d`3oJPjI1im9;k~k~c<+)aaM77Tcx`3*DDGmsqSUp|e`WFmVe%KWh6f3Yl@Bmo z3iK%1yp9>!)D8y>ltmk4>vkUoTItO#VBz=PvG6LmIFi#m&90NpM_YzocR?cECVfAA z?QhZ+xPS2NEh$aR+wAcl(=;|=y=AjpKY9ZpLi8Vrd0XoW&h~ILFPr;&&em*aCT98d%RAiCu)Bw4=VU2zSTX#nJk>~6$s-#NYu`Rv>0tEQxQRIbeV^Dc*P4FL>{EP z`IvK*$l$iqo&~x<_`F~Rkg{cQYY72ARkUP<|J!}<_)r4>m7+{*0JbX6G+WfWNgPTE zHHjd}^R5rvmOu<%@WM2DS4%F?#%cChlMRxv6WR4K4!JLs&?1Z#Ps2`&uzKm=AIfwa zU%SsrPcV;)XaAZRY7(NPpL3m@u56D+mud~OTd6MeY011kO)BuXP%tg%tZHPS(siR^ z*bahRDX2AF7?#71)klX>>)NNddM||OVtS(weCni5X3&E5ZM{5og@Z;g+hJ~-SX*1f)=ye(&g#2Ze%92`Rq zyI)O4G^?l{8WggOMpA4OZ_hV9GMjnYa3c6))+!|XY7P6arM<{~i`j^|S}51E)%)tH z{uOk7Z8OtW>Y;h1Df%%-#nFeBl_2u4ah(k4DgbY`cwhLCDE%^rw*E-2KL5t!hr*A- zhU0X7UQ;)CsqPz_1v0P*?aS&9w>HuP-#KRTNFm713nN;s2&XC30PU)(P z>Z{)QvIB4C4sf8|+%352T#=Ua*<{*DAN7Co>GhRSx_+EanMHKL*)J+hA;$BJ)}p#y z8YAZ5MrVz=i80}HsN2H9^RFhCs-ZhNvRmfe&AF_rF6s$oGt8dCwZYSTv#UR~L%#TJ z&~?%?MBVc`NI8Y7AP}xzDXa*%eYJS(F|^G3E6lc~&N>m6+~a;p?I3s@ksw2IBD32ZietS{k4bQMx#)upS@&EaEv`kzH8qOS#q>yNw<~x#7pWBM(IrW2(JnGw zSU1B8C+>lmZFc4ZhO{~IiHj9Bd?no~@<-VpHvuWlg~0mP1L`pR>WGqGWFTrE8jjjK z^ul90lof3u{|@lfXz)^PB)rBc5YLclYqEV`LiEV2THbZet5*}-_3p$7GkX(!tk=0y zaw#fz>m0eXf7Cf{C;5d&&h%Z|HDlpTJ(j#YTAho^QzvQiu<(zmD zUC%Jh;Q`8m_4)VLkapLPf!60*#hwabkFxb>2u&O44^yf&^&?FO%OJWJip*v_7fe&LLpQk+b6@3tnarQa7t;ULb-O# zUS~Uw(9fZ{+NRKs=?R-;+>G4G#}`zT=5^tMZ2zds2yuN9Y2&3RU3V;H{@Rjk(CtYo z8sCoVnJALcW@Mqh2VI%BLuQTO`Fr<_b`pO|sGYmPJjzLDExJC}49(2t`zYs4`p-}h zyH%vcdJrAP26X-jc$9?D)wOiqlSGfGVBQO79LdX2WXf4Xn>pBlzBHc6)FsCUb)3w_)zUtpm$sRUv7k__TaeO@vhjfg0^>U^aved`~&`4bpFK zB&!GC`Kf*J&_x~$=6dAF6hohFCo5+<5A&|GTcJ-JewyP!t6i8eTk3|S7hfbf4j(E_ zHZ+04>X;V@=qP?$YxHyk1XYgb;QG+@5ab^_KB= zWXdm4Vg{^Y&&k@vBiNM_LJ&J=*SoL%F+bWpXl4Zut72r97vhFWuAfb8#%C`;3Vj)a zgu;26V97i)i*-$3KBc*9$`N?mD$cj@l)PE|g~b$p*WXi_vkzA67JZ2Rby5E;%q?%e zI>U}JW}!&HWUI=hv1oEbW4b0A+i8vAc)wleO|j#g=yuJ7*@`W*@z}oa)I9?P!5pA9t5rs2C^k zX^CPetd%4yQMF2|4HP!a>FPE8BOyqFK_?59%u{BtHzpGkS=}^W@l(R-IL0z3S_T&khgWZdtP=N0aX7mpL7uaX=An;b*7Fp0F3_{u zH4QKQoZm6a4tXE?S@rlkS5YV9;T}F3~oy*ihBRaX76772&nR@wlHOe$hr@b3%_%Amh z`RYt5BlSVDbtmk(Gu525j@7O|Bv?=8Nn@|-JTGWEfBYDijNAD^B1z=hS2$$3z#?TS z?Lv-sFOW)!1~q~PsuXK8Rky_J)1uoPuk4E{*^_HuO7KU9(4qnjf~pmdE0#}7A_ING zK>{f1O{$djn*egoPL?_Reyz`c9G(`G{T3BEzTz5GN+yphiPD`#^Ix_-A2-(B>u7{L z6+*SDJcC?^^prhCyC878i9Badb@z%)54GaFb_rIH{F5Yhs1})EPM0etwnEh1*ZZ+N zDIOR3`w*dazMOj(%CLC~LkIR`&=xwzZF0hC@HQ z>t0L5LGxuY(rTs8Nxdo`@?3q2TFi8?n4KW0->NwoWZfv3!mJge#kYR9w3~G@7_8f*ODQhc=0;h=uno|zx2d}?^*K)$y^Zm{o!Zx7K>M3;FX`XpY zEV-4~r1m8aqWZdm0=C z4HnFO^RwW(#QnCL)-7+s(o1nq@US-?;m7ePt*^TQ6d$s9~`;LC{-Y@cJj} zO8wa|)~2O%2aS-R@&;X%G{g>}Yupw_>6IdA{@MzI7;dCkW=z4y@o=KizR}}2C`c9} zFWM%(JXEvtwsDP*6+wbmU5a#=4eA?&1_^Zbzlpi-q`5lhzRJvnzT(0=myj5?9K z!8xp_c(<=wU(*>QX3pli)qGXE2?mJ(F!g?Kq zShb(752`;P@l11k%&m5S5|n8_L8J-03Q{_2wHhuG4RY5#jB>MdNak@l{7L(^%5LY{ zc=jt-yumrKz28HDbvi)Kgr!_v>f~xRbtRrmp1fUm>6oB%9GA%BVu~@jzVx+9hBjKr zKu5l3`MI5eHY3x^J##IaEQI%jX_%z>tDrT(FW_$4U#TVpj z#)#5JQR9UQ?^33!QvnzafRME~`~Of9Et|=KDO^Ht>@8+pTHX7*Vv4WYbaq&s^$G0G zKPye=CRoLu*=n9%HVk10QVP@zU1@FXs|(RB-+RGD%DFxb8U<9!F?Cx!T`ZU;*CM0l zc??2tiJrPtjCol3HzV;EP3orabT5rIvdflch2+A|UqDZ#{1py`(;F-ck!kvr6y&FI z=EcBN-6BL8go12lGso{_0;DM*@v!JXohKQ6#At{oF*+hZ05Lpgl})%|g5tvN-m*LP zQUF9VsXD~$n5f^!Oz_9pPUsjFHtb#D0LU)EjsQraq zKdeBJ_#Yw^`-@A2r;WRuK=ikchuQj_{3rAInYn_Gjb%6_q)uj8ukzY6BtK5XdymOq z`!l#5>p?qyYQ)O=KP@yGt$|$8+)A-ky(KnH{?&1KRwp^_J znu<^-4P!*fqJhV9x>F1hZ0}C}%A{1x%=G!h*6W+WO4Cv|7fGOC&9g5uBMLrSJp1MZ z9z8DcE?lc@B;5MW1saKpVG45^4PG@KZr3%`Z?jXnxcB{5iGC*7#o#7qm@}3(I{Ujl z2IoYKx#b?`<@YRKMqtvCa=-9PI=BaYy=I`Mo;y?dJZr}36Vj_n?BL+J47BN;w3}LV z^>w(X@P@CrkAz-^9{FZ^h$+{YC8G81j-hze0HiB!pK!5?_}*{rjv*C>bNXMynaUwO^M{?9v?~78=iKL zU0SE1;=Cw$dtz~RP~k5&B1#SrdAjSUQyG(m!pu$@xsr8r%tw=Di*{tUpG6NTC#|&z z+vjDg?aF}K}UxMSf`t`-uMD(nLt9}CJK*X!KJIxCm{o-ds4X~&z$ zT~?Xxfk{AlxS6EC3HTePcDoz?Ay=jPmf(3OTn*mcFMn3Pjw);|LzECs6B86}DoH&+!b~^MnE85VsG%B_Qj5HWLT05qV4;h%5Ma}U)9MKdpLn@^lXC&H*a^QB z*QBF~6XQ_Rz6Og)3Sfl-#rYOZxT1WpJu8*a-aw` z@FnB>F5^r-VhD+;oa@)#(#dY($fVadA_N7-=0;3_Hm*@$UEc~Ckbpt4xVfd6e_>0q zlea|FM100b_q-pfA|IBC+OQQf>FBXlJzHAH`-GHXayrXSX~tt)U7}-65GOajr=oP; zUFNyPPUCB??KaVY0S&xxDBCP6-!{+u(@thbFQ@W3$-JgZmB*E~`>mz8%$jt}FqcO5 zJnzcQqjmLf;*FDbCCV|JRhh^%n37g(mVM}80jn}S5B`Ab=89lvgT&I-2Udg^>Kr&_ zOsvi8J(>og6|G9cVax*3Pn6UK)-IraCO(l5a5~24VVM~j8eLso8L6ql$S5dOLPB$w zNI~~5th~W4ZtLGuyJet$QGjm=()l&T4DpAJXTB{XN)-*rM47sz6!YHY=gZ%8+5f3D zWU1l&zz7?@^y#%4NWc(~FTbH`GVjQKdA>++JH_GQ}7=Jy`!Gi89` z#a&+emJf>E&TE4&X9F`G*$y zX!-*lla1c#Gctvj+OTMr>PgHHd1R(niV+|~U&IarP0@;@>jcqnIC=-J2t+`wA+mUO z@V!7@5Bxx}jG{)p*Osp{E7h(8fe49;^Mz<2U2KltW2@%Cw3kPN)ZW(yzQ~lHf_GzR zF3`G82D_Teu(4jK_=qJ*jTp3~r$0H&&ZyS-6cm(EULHk5>9-2`;lc;vt1jXj*>5-Z zImQNAF!|gk{zBUm($y2=mERoDouTlk7`e0jEm#E3*CusfcD9%z_3J%X8##5&VW)Hk zo;@WnWW!q7A_lBaWx3VE-)-KVyEh%6uJW=+yV`xs&5aG&J1pt%132iS@B>Hk$PAVF zqsEQl0>L@n($lwedjr?6<;d)s-@#3IOQvNzuxY9YBZxTRDq`^0O&6UZ!7tO$ouz4FbfNXoHuN!%;=AR-`(Y`!yeQ(byCgDSUO_)(WVx1D@OzLh0I=i{HhNQg&- zep*J2YFn0qZe`%ZbKOiCf2B?K^}6;|0od&jK8zh3b1cC-bWV{Upw{A2e#8-=b@GfP*T|BN-Zx`qM><0$5N#j zMeX{T$aSFCTak1~6Q+>2Ll6?>jzESO8iDEx^r*)SzF^K9)@6#ruVT>B+zbb$c`Q4k zAUUESKH`l?c|gBdal>f0#@!C%zu&l;r!I*QBa;&uivny8dVkPlNHp5F*V| z4L4Kr#J9^U!^YyUy#kg**A|Qk4Ndx8k9uB9BdvP^j?0u2-eO#vQMT|H<{!V0D42CN zc*j41@*=J65$IJ*7v-IPPm|b8*dlM4;QjEFPjqmQ?1@jy*yhSr5^(&cwyoQ7+#R1U zAcQL^v6GL3;R55uLI3BE-W!QITIHpc?#i0pn2as?5IsZR*=<)J5+}THMZw!KUl)C0 zqM4@ckM?*2oIh`L!vqeNoSX_5z#FAekQ`=y{}Hrml*>`ls#^Ev%~ALwpZw0Zr>bD! zs!zXI=Tt!?Ieo^wydw1#iH0QoXW&Lf-weu=!bvcIQ7f^-g7d*KFBVQmBkxmJ5J@B< zcv|+v7fU3-Sr(vw)c+R!7j6ota|C#ur=d}3c^70;Z8*RJ1<40DdaEFCRgHU@NR%Y( zS!G0QMfs3nHhtOe^`)Ay0dLZRXX#LD0RqL8!{^^EK~2yLVk7;X>fRNDta@I{@1>8k|tphV; zMb7j7e!Dwx^FUpXpR83?KCFg-S@2)a2zdd}Vwj*%Lq?l>{aerCU~y|A-xU@RyK?(gZuX!*VJxfBJW>rr}zz z_Ua$DtWt-)J+0ocU!c6YYs44xQ`WX2V!} z@~dRF$11?MCjr|<`uaFxvXC&N(JdcPzRdSq8HJMiv~)zRqet?E_=H@QG$se_f-O#x znJNe&l5?W+F$OfA-m8T~XVS0K;cxJ>Vv-xC;kIy`CYOe@F}_Ioy+@MemTwZJLB6KL zDf(l!iUIC644lua8n)2}n{f{$TB!AX?B4rc<@w)FNE3|U0wuO4MCIeB>vSQ_ONw{t z-^T6`(!ke)9KDvw>2Ui_r+Q%NyE02L_f7f2%;(gT*>m13VDhLmjGgV3GH1wm9d!cw zXj^)MPfuvk8nBUHmCBqyULhpz`vmbih0h`+Ke>kv%UZ(2X)iW&d$y}k)zzkO&1mB3 z-_c@u9d&$6%SB4{nPYV5daul+V_!XE+srnnI4>%6S5Pzl$)gJs2c4m>#YdB?Z!4}G zD2r2{rh#)1aQ?OmrC?p;Ev>vC@CnG+D11%amHi90;%?+R4sIAgysE3mdFy!Z-q8bl z6vc`R=8pP^)rH{5m+LQ9d%_o8!ep@|`RzRv&L#ytr_3Jp#4CMArp&ThdICoRaPbjh zyv1!bc@N|TEci|bKj^@Djlo6%VtJyRFN%T^P+}FkQ*Y}i z+wh7!wzSNgGcfBMz-mmWOle3nU6clVB4j%zB7_f>lxC6X%tYjAxUeB+Br|h4RanmT zSv`)(B|{Lo7#}uR--Gu5-^c@mHK_CWMQ(iCUxd>mpJS* z--AD z8y~urMUiKFD4csQ_nej@Qnt~0c!pV!u{;(j2oORlDa~DEnjr;jZdU@9FP3CaAZsbo zZ=`h>ev%TfxpE#nP7Z2d!>KU$dOc3U`xg`>`Az1$?#`ihOWg6X0+^tu^6BEON5g}( zWSH8$y1aly$!mE5Lke`_tL!?u=nDg*LD~%!^2MUJl3i|S(vu@!J}QeNBWHGhLz1#4 zow-uYoztUr_c-BFVsZ3Ps&o30FT4;?W*adZ8CsSVO>7y{6`Yc6*~b?;Ez_oZzWG*L z#;2t=&l)p#n)2-RZsyFnw4T@VOTBDg&`@QjW{3un%UK4W#}i{tR4R7Wo+vB4VJK%h zB*uC}D7h8gr1=7;5En+-qDw4Nj^_{ZxbLD0$V|$)Z&3fpb8mo`K2&c=at5^numJytqDH}FO<70L{5IT%=Fm9 zC%A49Y6<#67gl}r+23SY+dKG#_UY!UWHJlgHI{Wm0@!E1LgkXSf#N!woXJN`BtjkC zk^6JkzESA-#7!CKxcu(f1u4gBM_OKuZt;dRIPuf3`wo$jjkjF9R`Bf6;LCd3^$33hP~btG7fDev zIJHzccQ0^wS4jKy7(>jE-aX?X)P5dYYPo#y?F2jz1_#o{wt_~$_H}d&+XnBpAY=WP zW~LXKY0IDf{{3~Bm%o>&n*zTYGM{6F7L<3{RbiTJswvUze9OIGXmMW7^5IOXXrQQk zy-01ytp1qi0lMaKm4xhda%55H2oxQLyv5U0$2;bn@la^{0qs+!$gbs-?$uB| z%lCoA2oGZ#ib4b%SiOuS(E(#ozQ948CWW_3X*ks72$+i~HqPJn4^K>HNo}5~w_pFVtAK$2 zH}F{0|ItbHQVi0f_wlcfrJfUT79>oGunyHyrz=O=_1Sj#=fDdV%NV_uS4&r#yjfPk zDET>Hbw5{qgo5>H(5LW$^L(*<6~=#@^FS2cx`Sh~VSNIDslqo^f z{2w(7bU-ZQ(8D)Sz}A&`5=&a;#N0?KKca}&2FEefd9Pk4a(&f;c%FY@xE$_-;AA&E zZ^)`%UHV5t(pGm@?Mq=;qmOA)W7c+BgPFf3cdr^3rxa^H&1lyBqJa-it1j;asnsO?C$pwYdFYt z@s@j{%_(V-;={ULYnB8oQpIp3hAZePA=1<_Cbv@m&8TJx54U~FO`i9KACb5C;BMWoSqK&FMZ8;3KUf5x9`jQ!YSD~cAp@MJV0V*yfC z>5<|4d`HB2BHnn?u5)WxsDo>&cm^dbUolXba`!s=_L5RvDV?utd|y8DN(K!?MU83=P0u4?RP`0rqFa2(F4PqroDz6~@KSx3SY&&)* zvja2ln66efs^V&mdgTssK?{P#=q!B66_+XFMIo7$cLVA>oEu7CY zkSU8`OQ@PhJ)u336wn4x>udD(zWDHsQKcDLkPeVLo|!cvqB z!&8RvAMLtKtx2_6R_MdxfI`f3w%Gy4%WTG?b#Kc)Sy&)gnQXaz9W#&{=HGmxe>(M? ztQ&Yk*~6|kx3>BLjDo*)?po~z3gx&LI+*+Jx0l*<&Gk?}NbwLKqW_%af@keSD5-PY zw^(|)8ycTLJ$GIj<+vWrepzW!W-{g*6TkV7I*@qpTZUjR)42Ww|H4*6#>vv6l9Nm= zC?ee3v%?wAi(0hngA&fy$M=-R98zm++b1(w7qeI67c0TJ(L1Cw&IKd8<4iyfqWL1x zEr}qK^j~#G8WlcxXkSGdwZPvk%DeAH0J2rnJNa^Of(;zaZyg1kWq1G@;)ff&lhfV5 zavLr2pe9-|HM>3rh0x-aVGN8!a=OH{q~~;^YGn9MLXYw#2sm}1CjXWpccX@Kbu-wN z(g$-ULdof87rJrRr@bpzdKV-#6#ezI76mn-y7URF9_B>~_4@=k4~U{hXhuI;0kSHu zva`MF#n0e-A%Y4INFD4vY71pdJGS&C^vP$&gcpLZ>x7-bzeQ@rnK2%cW2Ua(;1wiC zumcZehl~bC2NGB6N27_`jX^ZNAzN`-?g?W1w7kRnc6I=?egA~^7O=0hO*S}cp(j%PWLs_WcHX!E#=!j^3XsS`}EAmvW~QGR694C!{L zk(K18>19njX0VS!Wc;s0O+sb7Da46+y8)OqnN_Zm6dgq?`vArv5RcPO3|{kQrUf@j zJPP?H+N;+qK-FsUv&SXF<^q?%eydN|xVFK69_SgKsqj>tNRqKsZFcY6CU=Z~Pb4dG zp97Fv!V3^`$@@}b_)>5_nWa1R;cfqeVFir(qbS8cAIR^5i9ZM%&V&?}{sLM{FeML3 z07F^=)}xI4i1RgwAjEo(;ivp%a+LFK%7{%g&>dpADsLzXMzPj2{fxvt8D_tst zalUp~suC{HEu=r?Jk9Ey;c;-(r3dZSOD5=46_xDVn6RO;(N~Y-?w}rJ%tFu&x^VbA zO>rjdM(i}09LOB{ z437bup;h{9sbZvdNxkISfwoXIbg%u5dvterdietf9v6M9k35QZEO@A-aG&8RQyEj; zc@a2q+y}+DJS*8qJ z74Sa;0zey6zAMsHS^XLYhGS1vp4TQ5_}|+$;vwG5h9CQP!j@5RAxyiWF+bAKTInZQ z!Op=Rt1eeH&NKGhAC7S2b;h@HodZX*f#clbSsOj7!l^E|htC*qW^Nk#G0*&m@p;!Y z^>u0Qi)TjYt5^{V?0<8fdSH<=K`!?hs-!f?XK>k)JkL)NhTm7aI#dKaK#5}l!Qb@zwq`|e3q%?~K|10rr@R@J{gUJ*4~rFRz7NlOQdN^`WR`8qC%S?X1^M6#o0}=lUq}M@g zVj|&Tbljk_Hsk4EY#>Ah=@Gkc4{iyk-t=0P_i7cgDZ|!=o6DUw!QhF$-4pSHDEKAr zjUJ}k;-mvqoQ_E1T%h&pRDUw49v5I@|U zI6w^Q`*QovL%=0~j7jD_useK61_%}@N*!S`Bk;Tgk#@fQ;2F;g$QW)9pWpFu26i1s zTN6x*5KdP>8J;wGBxzMhbV81S27YNihpkTR_bBV18%n6KXFyYVjRux*oQ89k3+w?n z&feY+zQS~f$Nq4_cQ-$4utRHR0Hyq8=EE_N-S08fKEV(H?@Z3XtNr5lJ4-SH7j8gh z{C5}{0q(G%4u5mkC-?^J%eJ8k-axyu_uq(q?+~Cy{=FsS!ciLR1*5EGj5t|Ih5fX@ zFgIAF-`Bn^%-?SKJrfu(=A|P=*xDr@@PYqz@c(u2|8?-+cOv|62LC4y{SPy^$CFp@ z<(VK6F{`B%GZ?~T`5?)ab;Wi2K9Y1S0=kdCQiXhuZ=iwKaZm6&ZICQ&GDYS>L6s~1 zTUE|y3o!!;?~BvZsN|XM4BILtg49NL^(bjbi1<*UQOVhkhSF22kFH88vBiytnTnsW za@D;z9#ahsJdNgXDs`1evT_n~#Qd+j093p=twTHF87oTdjiL)?RVWBK)ns%t23=wN zn*StQtsAHtfw9d3*3#F6{I^P8DMhM?OoN+K*o?np_{@1sw+)Q9Qv*8FP~QSQm3tjr z|M1?2ZZ6gCdevxFb=aB5$8)_>)k^Ea86Gpg#qIiV3V4iXVE4|%|0h>({ew~JZ?5I~ z?0{hk#MB??Ou&Ch3nX|oh~tBCbEL&!aDw#)RlVc8izO|+HCbg_vn7<3u*H?0FH15u z$`2iw{hC|ye1o(2rMH?43>RkhdBj$m26c2QqeL2(TNITAAm}J0D5tTu>1qiFJ75Vf zXZJ}b^Y+s-lO!NCj+jd;!&W;APcQNuanXm)=zpp`Dp9ZqiLuR#$PMD^_7CFhmPoM; zE7X1x=!r;6?e@m+T_o@rpvJTU%e2O)MMI*@5}wC|BLI)vgAu&bcvDyZ4{^s`cz$rf z${J6NEe*giQ$yu81^~ybw&@~%xHBaQtqEjvxSZOynBtN;KM@BS$&2aq1O$+YA zGU#&6uk3CT)MwuHsFcTLp2@=ubw%1v1a|ZV505|;|8MKt2~NO9%2mG?&H`(>(U{EL zfSJN41%H5?D zC1#QOIJ|ggLYs~kJI)=t8Epw+2-^@Rm4*%xU~1L~3#@;eh(w&}jezQ%nJg=@zT%=K z|Trv$CGmYla9zMfT{|!@Gc#44=DqgHV&w0A9Kn z`1FqOCX%Dp7R|s{uOc+dTS`j!`_0d0xe*L-;R2uMC_S(Q^wwQm-A9Nw2S_n+lNkT$ z`!lfDhBC$ECyR>{E3V(2Mq)sR(efK(>G)QzwDa&3xQcbjQTtn&Mdh+c>X>j&hDp#cKo){v)