From: Zhimin Date: Wed, 25 Mar 2020 18:52:42 +0000 (+0800) Subject: provide follow changes: X-Git-Tag: oran_release_bronze_v1.0~16 X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?p=o-du%2Fphy.git;a=commitdiff_plain;h=298022ce50fa8133cc880507170c4b7120d227b5 provide follow changes: 1) change the configure files 2) add dpdk patch to decrease latency of NIC transmission Additional Information available in the readme.txt file xran root refers to the o-du/phy/fhi_lib folder Change-Id: I12cf65e67056812cb00112bac9dbceae40d2e822 Signed-off-by: Zhimin --- diff --git a/fhi_lib/app/run_o_du.sh b/fhi_lib/app/run_o_du.sh index 4a1202e..cc10e03 100755 --- a/fhi_lib/app/run_o_du.sh +++ b/fhi_lib/app/run_o_du.sh @@ -23,7 +23,7 @@ echo 1 > /proc/sys/kernel/core_uses_pid #40G -./build/sample-app ./usecase/mu3_100mhz/config_file_o_du.dat 0000:18:02.0 0000:18:02.1 +./build/sample-app ./usecase/mu1_100mhz/config_file_o_du.dat 0000:18:02.0 0000:18:02.1 #25G diff --git a/fhi_lib/app/run_o_ru.sh b/fhi_lib/app/run_o_ru.sh index 02f3393..b4b0fe1 100755 --- a/fhi_lib/app/run_o_ru.sh +++ b/fhi_lib/app/run_o_ru.sh @@ -23,8 +23,8 @@ ulimit -c unlimited echo 1 > /proc/sys/kernel/core_uses_pid #40G -#./build/sample-app ./usecase/mu3_100mhz/config_file_o_du.dat 0000:d8:02.0 0000:d8:02.1 +./build/sample-app ./usecase/mu1_100mhz/config_file_o_ru.dat 0000:18:02.0 0000:18:02.1 #25G -./build/sample-app ./usecase/mu0_5mhz/config_file_o_ru.dat 0000:22:0a.0 0000:22:0a.1 +#./build/sample-app ./usecase/mu0_5mhz/config_file_o_ru.dat 0000:22:0a.0 0000:22:0a.1 #./build/sample-app ./usecase/mu1_100mhz/config_file_o_ru.dat 0000:18:0a.0 0000:18:0a.1 diff --git a/fhi_lib/app/usecase/mu1_100mhz/config_file_o_du.dat b/fhi_lib/app/usecase/mu1_100mhz/config_file_o_du.dat index 139b1cf..4e78c97 100644 --- a/fhi_lib/app/usecase/mu1_100mhz/config_file_o_du.dat +++ b/fhi_lib/app/usecase/mu1_100mhz/config_file_o_du.dat @@ -116,7 +116,7 @@ iqswap=0 #do swap of IQ before send buffer to eth nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order ##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStop=0 #stop app on 1pps boundary (gps_second % 30) debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode diff --git a/fhi_lib/app/usecase/mu1_100mhz/config_file_o_ru.dat b/fhi_lib/app/usecase/mu1_100mhz/config_file_o_ru.dat index c1610fc..9c9740b 100644 --- a/fhi_lib/app/usecase/mu1_100mhz/config_file_o_ru.dat +++ b/fhi_lib/app/usecase/mu1_100mhz/config_file_o_ru.dat @@ -133,11 +133,11 @@ iqswap=0 #do swap of IQ before send buffer to eth nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order ##Debug -debugStop=1 #stop app on 1pps boundary (gps_second % 30) +debugStop=0 #stop app on 1pps boundary (gps_second % 30) debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode -CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled +CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled ##O-RU Settings Tadv_cp_dl=25 # in us diff --git a/misc/xran-v20.20-dpdk18.08.patch b/misc/xran-v20.20-dpdk18.08.patch new file mode 100644 index 0000000..5b329b4 --- /dev/null +++ b/misc/xran-v20.20-dpdk18.08.patch @@ -0,0 +1,47 @@ +diff -Naur a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c +--- a/drivers/net/i40e/i40e_ethdev.c 2018-08-10 05:11:26.000000000 +0800 ++++ b/drivers/net/i40e/i40e_ethdev.c 2020-03-19 18:58:31.033622891 +0800 +@@ -2207,7 +2207,7 @@ + /* Map queues with MSIX interrupt */ + main_vsi->nb_used_qps = dev->data->nb_rx_queues - + pf->nb_cfg_vmdq_vsi * RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM; +- i40e_vsi_queues_bind_intr(main_vsi, I40E_ITR_INDEX_DEFAULT); ++ i40e_vsi_queues_bind_intr(main_vsi, I40E_ITR_INDEX_NONE); + i40e_vsi_enable_queues_intr(main_vsi); + + /* Map VMDQ VSI queues with MSIX interrupt */ +@@ -2217,6 +2217,10 @@ + I40E_ITR_INDEX_DEFAULT); + i40e_vsi_enable_queues_intr(pf->vmdq[i].vsi); + } ++ i40e_aq_debug_write_global_register(hw, ++ 0x0012A504, ++ 0, NULL); ++ + + /* enable FDIR MSIX interrupt */ + if (pf->fdir.fdir_vsi) { +diff -Naur a/drivers/net/i40e/i40e_ethdev_vf.c b/drivers/net/i40e/i40e_ethdev_vf.c +--- a/drivers/net/i40e/i40e_ethdev_vf.c 2018-08-10 05:11:26.000000000 +0800 ++++ b/drivers/net/i40e/i40e_ethdev_vf.c 2020-03-19 18:59:39.875620796 +0800 +@@ -640,7 +640,7 @@ + + map_info = (struct virtchnl_irq_map_info *)cmd_buffer; + map_info->num_vectors = 1; +- map_info->vecmap[0].rxitr_idx = I40E_ITR_INDEX_DEFAULT; ++ map_info->vecmap[0].rxitr_idx = I40E_ITR_INDEX_NONE; + map_info->vecmap[0].vsi_id = vf->vsi_res->vsi_id; + /* Alway use default dynamic MSIX interrupt */ + map_info->vecmap[0].vector_id = vector_id; +diff -Naur a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c +--- a/drivers/net/ixgbe/ixgbe_ethdev.c 2018-08-10 05:11:26.000000000 +0800 ++++ b/drivers/net/ixgbe/ixgbe_ethdev.c 2020-03-19 19:00:48.164618719 +0800 +@@ -3705,7 +3705,7 @@ + * except for 82598EB, which remains constant. + */ + if (dev_conf->txmode.mq_mode == ETH_MQ_TX_NONE && +- hw->mac.type != ixgbe_mac_82598EB) ++ hw->mac.type != ixgbe_mac_82598EB && hw->mac.type != ixgbe_mac_82599EB) + dev_info->max_tx_queues = IXGBE_NONE_MODE_TX_NB_QUEUES; + } + dev_info->min_rx_bufsize = 1024; /* cf BSIZEPACKET in SRRCTL register */