+++ /dev/null
-Copyright (c) 2019 Intel.
-
-Unless otherwise specified, all software contained herein is licensed
-under the Apache License, Version 2.0 (the "Software License");
-you may not use this software except in compliance with the Software
-License. You may obtain a copy of the Software License at
-
-http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the Software License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the Software License for the specific language governing permissions
-and limitations under the Software License.
-
-
-
-Unless otherwise specified, all documentation contained herein is licensed
-under the Creative Commons License, Attribution 4.0 Intl. (the
-"Documentation License"); you may not use this documentation except in
-compliance with the Documentation License. You may obtain a copy of the
-Documentation License at
-
-https://creativecommons.org/licenses/by/4.0/
-
-Unless required by applicable law or agreed to in writing, documentation
-distributed under the Documentation License is distributed on an "AS IS"
-BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
-implied. See the Documentation License for the specific language governing
-permissions and limitations under the Documentation License.
-
-#/******************************************************************************\r
-#*\r
-#* Copyright (c) 2019 Intel.\r
-#*\r
-#* Licensed under the Apache License, Version 2.0 (the "License");\r
-#* you may not use this file except in compliance with the License.\r
-#* You may obtain a copy of the License at\r
-#*\r
-#* http://www.apache.org/licenses/LICENSE-2.0\r
-#*\r
-#* Unless required by applicable law or agreed to in writing, software\r
-#* distributed under the License is distributed on an "AS IS" BASIS,\r
-#* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-#* See the License for the specific language governing permissions and\r
-#* limitations under the License.\r
-#*\r
-#*******************************************************************************/\r
-\r
-MYCUSTOMTAB=' '\r
-MYCUSTOMSPACE='============================================================================================'\r
-MYCUSTOMSPACE1='------------------------------------------------------------'\r
-\r
-##############################################################\r
-# Tools configuration\r
-##############################################################\r
-CC := icc\r
-CPP := icpc\r
-AS := as\r
-AR := ar\r
-LD := icc\r
-OBJDUMP := objdump\r
-\r
-ifeq ($(SHELL),cmd.exe)\r
-MD := mkdir.exe -p\r
-CP := cp.exe -f\r
-RM := rm.exe -rf\r
-else\r
-MD := mkdir -p\r
-CP := cp -f\r
-RM := rm -rf\r
-endif\r
-\r
-PROJECT_NAME := sample-app\r
-PROJECT_TYPE := elf\r
-PROJECT_DIR := $(XRAN_DIR)/app\r
-BUILDDIR := ./build\r
-PROJECT_BINARY := $(BUILDDIR)/$(PROJECT_NAME)\r
-\r
-ifeq ($(RTE_SDK),)\r
- $(error "Please define RTE_SDK environment variable")\r
-endif\r
-\r
-RTE_TARGET ?= x86_64-native-linuxapp-gcc\r
-RTE_INC := $(RTE_SDK)/$(RTE_TARGET)/include\r
-\r
-API_DIR := $(XRAN_DIR)/lib/api\r
-SRC_DIR := $(PROJECT_DIR)/src\r
-\r
-ifeq ($(MLOG),1)\r
-ifeq ($(MLOG_DIR),)\r
- MLOG_DIR=$(XRAN_DIR)/../mlog\r
-endif\r
-endif\r
-\r
-CC_SRC = $(SRC_DIR)/common.c \\r
- $(SRC_DIR)/sample-app.c \\r
- $(SRC_DIR)/config.c\r
-\r
-CC_FLAGS += -std=gnu11 -Wall -Wno-deprecated-declarations \\r
- -fdata-sections \\r
- -ffunction-sections \\r
- -g \\r
- -Wall \\r
- -Wimplicit-function-declaration \\r
- -g -O3 -wd1786\r
-\r
-CPP_FLAGS := -D__STDC_LIMIT_MACROS -D__STDC_CONSTANT_MACROS -D_GNU_SOURCE -D_REENTRANT -pipe -no-prec-div \\r
- -no-prec-div -fp-model fast=2\\r
- -no-prec-sqrt -falign-functions=16 -fast-transcendentals \\r
- -Werror -Wno-unused-variable -std=c++11 -mcmodel=large\r
-\r
-INC := -I$(API_DIR) -I$(RTE_INC)\r
-DEF :=\r
-\r
-ifeq ($(MLOG),1)\r
- INC += -I$(MLOG_DIR)/source\r
- DEF += -DMLOG_ENABLED\r
-else\r
- DEF += -UMLOG_ENABLED\r
-endif\r
-\r
-XRAN_LIB_DIR=$(XRAN_DIR)/lib/build\r
-LD_FLAGS += -L$(XRAN_LIB_DIR) -lxran\r
-\r
-RTE_LIBS = -L$(RTE_SDK)/$(RTE_TARGET)/lib -Wl,-lrte_flow_classify -Wl,--whole-archive -Wl,-lrte_pipeline -Wl,--no-whole-archive -Wl,--whole-archive -Wl,-lrte_table -Wl,--no-whole-archive -Wl,--whole-archive -Wl,-lrte_port -Wl,--no-whole-archive -Wl,-lrte_pdump -Wl,-lrte_distributor -Wl,-lrte_ip_frag -Wl,-lrte_meter -Wl,-lrte_lpm -Wl,--whole-archive -Wl,-lrte_acl -Wl,--no-whole-archive -Wl,-lrte_jobstats -Wl,-lrte_metrics -Wl,-lrte_bitratestats -Wl,-lrte_latencystats -Wl,-lrte_power -Wl,-lrte_efd -Wl,-lrte_bpf -Wl,--whole-archive -Wl,-lrte_cfgfile -Wl,-lrte_gro -Wl,-lrte_gso -Wl,-lrte_hash -Wl,-lrte_member -Wl,-lrte_vhost -Wl,-lrte_kvargs -Wl,-lrte_mbuf -Wl,-lrte_net -Wl,-lrte_ethdev -Wl,-lrte_bbdev -Wl,-lrte_cryptodev -Wl,-lrte_security -Wl,-lrte_compressdev -Wl,-lrte_eventdev -Wl,-lrte_rawdev -Wl,-lrte_timer -Wl,-lrte_mempool -Wl,-lrte_mempool_ring -Wl,-lrte_ring -Wl,-lrte_pci -Wl,-lrte_eal -Wl,-lrte_cmdline -Wl,-lrte_reorder -Wl,-lrte_sched -Wl,-lrte_kni -Wl,-lrte_common_octeontx -Wl,-lrte_bus_pci -Wl,-lrte_bus_vdev -Wl,-lrte_bus_dpaa -Wl,-lrte_bus_fslmc -Wl,-lrte_mempool_bucket -Wl,-lrte_mempool_stack -Wl,-lrte_mempool_dpaa -Wl,-lrte_mempool_dpaa2 -Wl,-lrte_pmd_af_packet -Wl,-lrte_pmd_ark -Wl,-lrte_pmd_avf -Wl,-lrte_pmd_avp -Wl,-lrte_pmd_axgbe -Wl,-lrte_pmd_bnxt -Wl,-lrte_pmd_bond -Wl,-lrte_pmd_cxgbe -Wl,-lrte_pmd_dpaa -Wl,-lrte_pmd_dpaa2 -Wl,-lrte_pmd_e1000 -Wl,-lrte_pmd_ena -Wl,-lrte_pmd_enic -Wl,-lrte_pmd_fm10k -Wl,-lrte_pmd_failsafe -Wl,-lrte_pmd_i40e -Wl,-lrte_pmd_ixgbe -Wl,-lrte_pmd_kni -Wl,-lrte_pmd_lio -Wl,-lrte_pmd_nfp -Wl,-lrte_pmd_null -Wl,-lrte_pmd_qede -Wl,-lrte_pmd_ring -Wl,-lrte_pmd_softnic -Wl,-lrte_pmd_tap -Wl,-lrte_pmd_thunderx_nicvf -Wl,-lrte_pmd_vdev_netvsc -Wl,-lrte_pmd_virtio -Wl,-lrte_pmd_vhost -Wl,-lrte_pmd_ifc -Wl,-lrte_pmd_vmxnet3_uio -Wl,-lrte_bus_vmbus -Wl,-lrte_pmd_netvsc -Wl,-lrte_pmd_bbdev_null -Wl,-lrte_pmd_null_crypto -Wl,-lrte_pmd_crypto_scheduler -Wl,-lrte_pmd_dpaa2_sec -Wl,-lrte_pmd_dpaa_sec -Wl,-lrte_pmd_virtio_crypto -Wl,-lrte_pmd_octeontx_zip -Wl,-lrte_pmd_qat -Wl,-lrte_pmd_skeleton_event -Wl,-lrte_pmd_sw_event -Wl,-lrte_pmd_octeontx_ssovf -Wl,-lrte_pmd_dpaa_event -Wl,-lrte_pmd_dpaa2_event -Wl,-lrte_mempool_octeontx -Wl,-lrte_pmd_octeontx -Wl,-lrte_pmd_opdl_event -Wl,-lrte_pmd_skeleton_rawdev -Wl,-lrte_pmd_dpaa2_cmdif -Wl,-lrte_pmd_dpaa2_qdma -Wl,-lrte_bus_ifpga -Wl,-lrte_pmd_ifpga_rawdev -Wl,--no-whole-archive -Wl,-lrt -Wl,-lm -Wl,-lnuma -Wl,-ldl -Wl,\r
-LD_FLAGS += $(RTE_LIBS)\r
-\r
-ifeq ($(MLOG),1)\r
- LD_FLAGS += -L$(MLOG_DIR)/bin -lmlog\r
-endif\r
-\r
-AS_FLAGS :=\r
-AR_FLAGS := rc\r
-\r
-PROJECT_OBJ_DIR := build/obj\r
-\r
-CC_OBJS := $(patsubst %.c,%.o,$(CC_SRC))\r
-CPP_OBJS := $(patsubst %.cpp,%.o,$(CPP_SRC))\r
-AS_OBJS := $(patsubst %.s,%.o,$(AS_SRC))\r
-OBJS := $(CC_OBJS) $(CPP_OBJS) $(AS_OBJS) $(LIBS)\r
-DIRLIST := $(addprefix $(PROJECT_OBJ_DIR)/,$(sort $(dir $(OBJS))))\r
-\r
-CC_OBJTARGETS := $(addprefix $(PROJECT_OBJ_DIR)/,$(CC_OBJS))\r
-CPP_OBJTARGETS := $(addprefix $(PROJECT_OBJ_DIR)/,$(CPP_OBJS))\r
-\r
-AS_OBJTARGETS := $(addprefix $(PROJECT_OBJ_DIR)/,$(AS_OBJS))\r
-\r
-CC_FLAGS_FULL := $(CC_FLAGS) $(INC) $(DEF)\r
-CPP_FLAGS_FULL := $(CPP_FLAGS) $(INC) $(DEF)\r
-\r
-AS_FLAGS := $(AS_FLAGS) $(INC)\r
-\r
-PROJECT_DEP_FILE := $(PROJECT_OBJ_DIR)/$(PROJECT_NAME).dep\r
-\r
-ifeq ($(wildcard $(PROJECT_DEP_FILE)),$(PROJECT_DEP_FILE))\r
-GENERATE_DEPS :=\r
-else\r
-\r
-CC_DEPS := $(addprefix __dep__,$(subst ../,__up__,$(CC_SRC)))\r
-CPP_DEPS := $(addprefix __dep__,$(subst ../,__up__,$(CPP_SRC)))\r
-GENERATE_DEPS := generate_deps\r
-endif\r
-\r
-all : welcome_line $(PROJECT_BINARY)\r
- @echo $(PROJECT_BINARY)\r
-\r
-.PHONY : clear_dep\r
-clear_dep:\r
- @$(RM) $(PROJECT_DEP_FILE)\r
- @echo [DEP] $(subst $(PROJECT_OBJ_DIR)/,,$(PROJECT_DEP_FILE))\r
-\r
-$(CC_DEPS) :\r
- @$(CC) -MM $(subst __up__,../,$(subst __dep__,,$@)) -MT $(PROJECT_OBJ_DIR)/$(patsubst %.c,%.o,$(subst __up__,../,$(subst __dep__,,$@))) $(CC_FLAGS_FULL) >> $(PROJECT_DEP_FILE)\r
-\r
-$(CPP_DEPS) :\r
- @$(CPP) -MM $(subst __up__,../,$(subst __dep__,,$@)) -MT $(PROJECT_OBJ_DIR)/$(patsubst %.cpp,%.o,$(subst __up__,../,$(subst __dep__,,$@))) $(CPP_FLAGS_FULL) >> $(PROJECT_DEP_FILE)\r
-\r
-.PHONY : generate_deps\r
-generate_deps : clear_dep $(CC_DEPS) $(CPP_DEPS)\r
-\r
-\r
-.PHONY : echo_start_build\r
-echo_start_build :\r
- @echo [BUILD] $(PROJECT_TYPE) : $(PROJECT_NAME)\r
-\r
-$(DIRLIST) :\r
- -@$(MD) $@\r
-\r
-$(CC_OBJTARGETS) :\r
- @echo [CC] $(subst $(PROJECT_OBJ_DIR)/,,$@)\r
- @$(CC) -c $(CC_FLAGS_FULL) -o"$@" $(patsubst %.o,%.c,$(subst $(PROJECT_OBJ_DIR)/,,$@))\r
-\r
-$(CPP_OBJTARGETS) :\r
- @echo [CPP] $(subst $(PROJECT_OBJ_DIR)/,,$@)\r
- @$(CPP) -c $(CPP_FLAGS_FULL) -o"$@" $(patsubst %.o,%.cpp,$(subst $(PROJECT_OBJ_DIR)/,,$@))\r
-\r
-$(AS_OBJTARGETS) :\r
- @echo [AS] $(subst $(PROJECT_OBJ_DIR)/,,$@)\r
- @$(AS) $(AS_FLAGS) -o"$@" $(patsubst %.o,%.s,$(subst $(PROJECT_OBJ_DIR)/,,$@))\r
-\r
-ifeq ($(wildcard $(PROJECT_DEP_FILE)),$(PROJECT_DEP_FILE))\r
-\r
-include $(PROJECT_DEP_FILE)\r
-\r
-endif\r
-\r
-.PHONY: clean xclean\r
-clean:\r
- @echo [CLEAN] : $(PROJECT_NAME)\r
- @$(RM) $(CC_OBJTARGETS) $(CPP_OBJTARGETS) $(AS_OBJTARGETS)\r
-\r
-xclean: clean\r
-ifneq ($(wildcard $(PROJECT_DIR)/$(PROJECT_MAKE)),)\r
- @echo [XCLEAN] : $(PROJECT_NAME)\r
- @$(RM) $(PROJECT_BINARY) $(PROJECT_BINARY_LIB) $(PROJECT_DEP_FILE)\r
-endif\r
-\r
-.PHONY : welcome_line\r
-welcome_line :\r
- @echo $(MYCUSTOMSPACE)\r
- @echo Building $(PROJECT_BINARY)\r
- @echo $(MYCUSTOMTAB)RTE_TARGET = $(RTE_TARGET)\r
- @echo $(MYCUSTOMSPACE)\r
-\r
-\r
-.PHONY : debug release\r
-\r
-debug : all\r
-release : all\r
-\r
-$(PROJECT_BINARY): $(DIRLIST) echo_start_build $(GENERATE_DEPS) $(PRE_BUILD) $(CC_OBJTARGETS) $(CPP_OBJTARGETS) $(AS_OBJTARGETS)\r
- @echo "[LD] $@ "\r
- @$(LD) -o $@ $(CC_OBJTARGETS) $(CPP_OBJTARGETS) $(AS_OBJTARGETS) $(LD_FLAGS) -Wl,-L $(BUILDDIR) -lrt -lpthread\r
-\r
-#@echo [APP] $@\r
-#@$(OBJDUMP) -d $(PROJECT_BINARY) > $(PROJECT_BINARY).asm\r
+#/******************************************************************************
+#*
+#* Copyright (c) 2019 Intel.
+#*
+#* Licensed under the Apache License, Version 2.0 (the "License");
+#* you may not use this file except in compliance with the License.
+#* You may obtain a copy of the License at
+#*
+#* http://www.apache.org/licenses/LICENSE-2.0
+#*
+#* Unless required by applicable law or agreed to in writing, software
+#* distributed under the License is distributed on an "AS IS" BASIS,
+#* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#* See the License for the specific language governing permissions and
+#* limitations under the License.
+#*
+#*******************************************************************************/
+
+MYCUSTOMTAB=' '
+MYCUSTOMSPACE='============================================================================================'
+MYCUSTOMSPACE1='------------------------------------------------------------'
+
+##############################################################
+# Tools configuration
+##############################################################
+CC := icc
+CPP := icpc
+AS := as
+AR := ar
+LD := icc
+OBJDUMP := objdump
+
+ifeq ($(SHELL),cmd.exe)
+MD := mkdir.exe -p
+CP := cp.exe -f
+RM := rm.exe -rf
+else
+MD := mkdir -p
+CP := cp -f
+RM := rm -rf
+endif
+
+PROJECT_NAME := sample-app
+PROJECT_TYPE := elf
+PROJECT_DIR := $(XRAN_DIR)/app
+BUILDDIR := ./build
+PROJECT_BINARY := $(BUILDDIR)/$(PROJECT_NAME)
+
+ifeq ($(RTE_SDK),)
+ $(error "Please define RTE_SDK environment variable")
+endif
+
+RTE_TARGET ?= x86_64-native-linuxapp-gcc
+RTE_INC := $(RTE_SDK)/$(RTE_TARGET)/include
+
+API_DIR := $(XRAN_DIR)/lib/api
+SRC_DIR := $(PROJECT_DIR)/src
+
+ifeq ($(MLOG),1)
+ifeq ($(MLOG_DIR),)
+ MLOG_DIR=$(XRAN_DIR)/../mlog
+endif
+endif
+
+CC_SRC = $(SRC_DIR)/common.c \
+ $(SRC_DIR)/sample-app.c \
+ $(SRC_DIR)/config.c
+
+CC_FLAGS += -std=gnu11 -Wall -Wno-deprecated-declarations \
+ -fdata-sections \
+ -ffunction-sections \
+ -g \
+ -Wall \
+ -Wimplicit-function-declaration \
+ -g -O3 -wd1786
+CC_FLAGS += -fstack-protector-strong -z,now, -z,relro -z noexecstack -Wformat -Wformat-security -Werror=format-security -fno-strict-overflow -fwrapv
+
+CPP_FLAGS := -D__STDC_LIMIT_MACROS -D__STDC_CONSTANT_MACROS -D_GNU_SOURCE -D_REENTRANT -pipe -no-prec-div \
+ -no-prec-div -fp-model fast=2\
+ -no-prec-sqrt -falign-functions=16 -fast-transcendentals \
+ -Werror -Wno-unused-variable -std=c++11 -mcmodel=large
+
+INC := -I$(API_DIR) -I$(RTE_INC)
+DEF :=
+
+ifeq ($(MLOG),1)
+ INC += -I$(MLOG_DIR)/source
+ DEF += -DMLOG_ENABLED
+else
+ DEF += -UMLOG_ENABLED
+endif
+
+XRAN_LIB_DIR=$(XRAN_DIR)/lib/build
+LD_FLAGS += -L$(XRAN_LIB_DIR) -lxran
+
+RTE_LIBS = -L$(RTE_SDK)/$(RTE_TARGET)/lib -Wl,-lrte_flow_classify -Wl,--whole-archive -Wl,-lrte_pipeline -Wl,--no-whole-archive -Wl,--whole-archive -Wl,-lrte_table -Wl,--no-whole-archive -Wl,--whole-archive -Wl,-lrte_port -Wl,--no-whole-archive -Wl,-lrte_pdump -Wl,-lrte_distributor -Wl,-lrte_ip_frag -Wl,-lrte_meter -Wl,-lrte_lpm -Wl,--whole-archive -Wl,-lrte_acl -Wl,--no-whole-archive -Wl,-lrte_jobstats -Wl,-lrte_metrics -Wl,-lrte_bitratestats -Wl,-lrte_latencystats -Wl,-lrte_power -Wl,-lrte_efd -Wl,-lrte_bpf -Wl,--whole-archive -Wl,-lrte_cfgfile -Wl,-lrte_gro -Wl,-lrte_gso -Wl,-lrte_hash -Wl,-lrte_member -Wl,-lrte_vhost -Wl,-lrte_kvargs -Wl,-lrte_mbuf -Wl,-lrte_net -Wl,-lrte_ethdev -Wl,-lrte_bbdev -Wl,-lrte_cryptodev -Wl,-lrte_security -Wl,-lrte_compressdev -Wl,-lrte_eventdev -Wl,-lrte_rawdev -Wl,-lrte_timer -Wl,-lrte_mempool -Wl,-lrte_mempool_ring -Wl,-lrte_ring -Wl,-lrte_pci -Wl,-lrte_eal -Wl,-lrte_cmdline -Wl,-lrte_reorder -Wl,-lrte_sched -Wl,-lrte_kni -Wl,-lrte_common_octeontx -Wl,-lrte_bus_pci -Wl,-lrte_bus_vdev -Wl,-lrte_bus_dpaa -Wl,-lrte_bus_fslmc -Wl,-lrte_mempool_bucket -Wl,-lrte_mempool_stack -Wl,-lrte_mempool_dpaa -Wl,-lrte_mempool_dpaa2 -Wl,-lrte_pmd_af_packet -Wl,-lrte_pmd_ark -Wl,-lrte_pmd_avf -Wl,-lrte_pmd_avp -Wl,-lrte_pmd_axgbe -Wl,-lrte_pmd_bnxt -Wl,-lrte_pmd_bond -Wl,-lrte_pmd_cxgbe -Wl,-lrte_pmd_dpaa -Wl,-lrte_pmd_dpaa2 -Wl,-lrte_pmd_e1000 -Wl,-lrte_pmd_ena -Wl,-lrte_pmd_enic -Wl,-lrte_pmd_fm10k -Wl,-lrte_pmd_failsafe -Wl,-lrte_pmd_i40e -Wl,-lrte_pmd_ixgbe -Wl,-lrte_pmd_kni -Wl,-lrte_pmd_lio -Wl,-lrte_pmd_nfp -Wl,-lrte_pmd_null -Wl,-lrte_pmd_qede -Wl,-lrte_pmd_ring -Wl,-lrte_pmd_softnic -Wl,-lrte_pmd_tap -Wl,-lrte_pmd_thunderx_nicvf -Wl,-lrte_pmd_vdev_netvsc -Wl,-lrte_pmd_virtio -Wl,-lrte_pmd_vhost -Wl,-lrte_pmd_ifc -Wl,-lrte_pmd_vmxnet3_uio -Wl,-lrte_bus_vmbus -Wl,-lrte_pmd_netvsc -Wl,-lrte_pmd_bbdev_null -Wl,-lrte_pmd_null_crypto -Wl,-lrte_pmd_crypto_scheduler -Wl,-lrte_pmd_dpaa2_sec -Wl,-lrte_pmd_dpaa_sec -Wl,-lrte_pmd_virtio_crypto -Wl,-lrte_pmd_octeontx_zip -Wl,-lrte_pmd_qat -Wl,-lrte_pmd_skeleton_event -Wl,-lrte_pmd_sw_event -Wl,-lrte_pmd_octeontx_ssovf -Wl,-lrte_pmd_dpaa_event -Wl,-lrte_pmd_dpaa2_event -Wl,-lrte_mempool_octeontx -Wl,-lrte_pmd_octeontx -Wl,-lrte_pmd_opdl_event -Wl,-lrte_pmd_skeleton_rawdev -Wl,-lrte_pmd_dpaa2_cmdif -Wl,-lrte_pmd_dpaa2_qdma -Wl,-lrte_bus_ifpga -Wl,-lrte_pmd_ifpga_rawdev -Wl,--no-whole-archive -Wl,-lrt -Wl,-lm -Wl,-lnuma -Wl,-ldl -Wl,
+LD_FLAGS += $(RTE_LIBS)
+
+ifeq ($(MLOG),1)
+ LD_FLAGS += -L$(MLOG_DIR)/bin -lmlog
+endif
+
+AS_FLAGS :=
+AR_FLAGS := rc
+
+PROJECT_OBJ_DIR := build/obj
+
+CC_OBJS := $(patsubst %.c,%.o,$(CC_SRC))
+CPP_OBJS := $(patsubst %.cpp,%.o,$(CPP_SRC))
+AS_OBJS := $(patsubst %.s,%.o,$(AS_SRC))
+OBJS := $(CC_OBJS) $(CPP_OBJS) $(AS_OBJS) $(LIBS)
+DIRLIST := $(addprefix $(PROJECT_OBJ_DIR)/,$(sort $(dir $(OBJS))))
+
+CC_OBJTARGETS := $(addprefix $(PROJECT_OBJ_DIR)/,$(CC_OBJS))
+CPP_OBJTARGETS := $(addprefix $(PROJECT_OBJ_DIR)/,$(CPP_OBJS))
+
+AS_OBJTARGETS := $(addprefix $(PROJECT_OBJ_DIR)/,$(AS_OBJS))
+
+CC_FLAGS_FULL := $(CC_FLAGS) $(INC) $(DEF)
+CPP_FLAGS_FULL := $(CPP_FLAGS) $(INC) $(DEF)
+
+AS_FLAGS := $(AS_FLAGS) $(INC)
+
+PROJECT_DEP_FILE := $(PROJECT_OBJ_DIR)/$(PROJECT_NAME).dep
+
+ifeq ($(wildcard $(PROJECT_DEP_FILE)),$(PROJECT_DEP_FILE))
+GENERATE_DEPS :=
+else
+
+CC_DEPS := $(addprefix __dep__,$(subst ../,__up__,$(CC_SRC)))
+CPP_DEPS := $(addprefix __dep__,$(subst ../,__up__,$(CPP_SRC)))
+GENERATE_DEPS := generate_deps
+endif
+
+all : welcome_line $(PROJECT_BINARY)
+ @echo $(PROJECT_BINARY)
+
+.PHONY : clear_dep
+clear_dep:
+ @$(RM) $(PROJECT_DEP_FILE)
+ @echo [DEP] $(subst $(PROJECT_OBJ_DIR)/,,$(PROJECT_DEP_FILE))
+
+$(CC_DEPS) :
+ @$(CC) -MM $(subst __up__,../,$(subst __dep__,,$@)) -MT $(PROJECT_OBJ_DIR)/$(patsubst %.c,%.o,$(subst __up__,../,$(subst __dep__,,$@))) $(CC_FLAGS_FULL) >> $(PROJECT_DEP_FILE)
+
+$(CPP_DEPS) :
+ @$(CPP) -MM $(subst __up__,../,$(subst __dep__,,$@)) -MT $(PROJECT_OBJ_DIR)/$(patsubst %.cpp,%.o,$(subst __up__,../,$(subst __dep__,,$@))) $(CPP_FLAGS_FULL) >> $(PROJECT_DEP_FILE)
+
+.PHONY : generate_deps
+generate_deps : clear_dep $(CC_DEPS) $(CPP_DEPS)
+
+
+.PHONY : echo_start_build
+echo_start_build :
+ @echo [BUILD] $(PROJECT_TYPE) : $(PROJECT_NAME)
+
+$(DIRLIST) :
+ -@$(MD) $@
+
+$(CC_OBJTARGETS) :
+ @echo [CC] $(subst $(PROJECT_OBJ_DIR)/,,$@)
+ @$(CC) -c $(CC_FLAGS_FULL) -o"$@" $(patsubst %.o,%.c,$(subst $(PROJECT_OBJ_DIR)/,,$@))
+
+$(CPP_OBJTARGETS) :
+ @echo [CPP] $(subst $(PROJECT_OBJ_DIR)/,,$@)
+ @$(CPP) -c $(CPP_FLAGS_FULL) -o"$@" $(patsubst %.o,%.cpp,$(subst $(PROJECT_OBJ_DIR)/,,$@))
+
+$(AS_OBJTARGETS) :
+ @echo [AS] $(subst $(PROJECT_OBJ_DIR)/,,$@)
+ @$(AS) $(AS_FLAGS) -o"$@" $(patsubst %.o,%.s,$(subst $(PROJECT_OBJ_DIR)/,,$@))
+
+ifeq ($(wildcard $(PROJECT_DEP_FILE)),$(PROJECT_DEP_FILE))
+
+include $(PROJECT_DEP_FILE)
+
+endif
+
+.PHONY: clean xclean
+clean:
+ @echo [CLEAN] : $(PROJECT_NAME)
+ @$(RM) $(CC_OBJTARGETS) $(CPP_OBJTARGETS) $(AS_OBJTARGETS)
+
+xclean: clean
+ifneq ($(wildcard $(PROJECT_DIR)/$(PROJECT_MAKE)),)
+ @echo [XCLEAN] : $(PROJECT_NAME)
+ @$(RM) $(PROJECT_BINARY) $(PROJECT_BINARY_LIB) $(PROJECT_DEP_FILE)
+endif
+
+.PHONY : welcome_line
+welcome_line :
+ @echo $(MYCUSTOMSPACE)
+ @echo Building $(PROJECT_BINARY)
+ @echo $(MYCUSTOMTAB)RTE_TARGET = $(RTE_TARGET)
+ @echo $(MYCUSTOMSPACE)
+
+
+.PHONY : debug release
+
+debug : all
+release : all
+
+$(PROJECT_BINARY): $(DIRLIST) echo_start_build $(GENERATE_DEPS) $(PRE_BUILD) $(CC_OBJTARGETS) $(CPP_OBJTARGETS) $(AS_OBJTARGETS)
+ @echo "[LD] $@ "
+ @$(LD) -o $@ $(CC_OBJTARGETS) $(CPP_OBJTARGETS) $(AS_OBJTARGETS) $(LD_FLAGS) -Wl,-L $(BUILDDIR) -lrt -lpthread
+
+#@echo [APP] $@
+#@$(OBJDUMP) -d $(PROJECT_BINARY) > $(PROJECT_BINARY).asm
-%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%\r
-%\r
-% <COPYRIGHT_TAG>\r
-%\r
-%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%\r
-\r
-%This script was tested with GNU Octave, version 3.8.2 or Matlab 9.2.0.538062 (R2017a) \r
-\r
-close all;\r
-clear all;\r
-\r
- % 5MHz 10MHz 15MHz 20 MHz 25 MHz 30 MHz 40 MHz 50MHz 60 MHz 70 MHz 80 MHz 90 MHz 100 MHz\r
-nNumRbsPerSymF1 = ...\r
-[\r
- % 5MHz 10MHz 15MHz 20 MHz 25 MHz 30 MHz 40 MHz 50MHz 60 MHz 70 MHz 80 MHz 90 MHz 100 MHz\r
- [25, 52, 79, 106, 133, 160, 216, 270, 0, 0, 0, 0, 0] % Numerology 0 (15KHz)\r
- [11, 24, 38, 51, 65, 78, 106, 133, 162, 0, 217, 245, 273] % Numerology 1 (30KHz)\r
- [0, 11, 18, 24, 31, 38, 51, 65, 79, 0, 107, 121, 135] % Numerology 2 (60KHz)\r
-];\r
-\r
-nNumRbsPerSymF2 = ...\r
-[\r
- % 50Mhz 100MHz 200MHz 400MHz\r
- [66, 132, 264, 0] % Numerology 2 (60KHz)\r
- [32, 66, 132, 264] % Numerology 3 (120KHz)\r
-];\r
-\r
-% total number of tests\r
-tests_total = 6\r
-sub6_all = ...\r
- [ \r
- true, true, true, true, false, true, \r
- ]\r
-\r
-mu_all = ...\r
- [\r
- 0, 0, 0, 1, 3, 1\r
- ]\r
-\r
-bw_all = ...\r
- [\r
- 5, 10, 20, 100, 100, 100\r
- ]\r
-\r
-ant_num_all = ...\r
- [\r
- 4, 4, 4, 4, 4, 8\r
- ]\r
-\r
-bfw_gen_all = ...\r
- [\r
- false, false, false, false, false, true\r
- ]\r
-\r
-trx_all = ...\r
- [ \r
- 32, 32, 32, 32, 32, 32\r
- ]\r
-path_to_usecase_all = ... \r
- [\r
- "./usecase/mu0_5mhz/"; \r
- "./usecase/mu0_10mhz/"; \r
- "./usecase/mu0_20mhz/"; \r
- "./usecase/mu1_100mhz/"; \r
- "./usecase/mu3_100mhz/"; \r
- "./usecase/cat_b/mu1_100mhz/";\r
- ]\r
-\r
-path_to_usecase_all = cellstr(path_to_usecase_all) \r
-\r
-nSlots_all = ...\r
- [\r
- 40,40,40,40,40,10 \r
- ]\r
-\r
-%select mu and bw to generate test files\r
-for test_num =(1:1:tests_total)\r
- test_num\r
- sub6=sub6_all(test_num) %false\r
- mu=mu_all(test_num) % 0,1, or 3\r
- bw=bw_all(test_num) %5,10,20,100 MHz\r
- ant_num = ant_num_all(test_num)\r
- bfw_gen=bfw_gen_all(test_num)\r
- trx = trx_all(test_num)\r
- size(path_to_usecase_all)\r
- path_to_usecase = path_to_usecase_all(test_num)\r
-\r
- nSlots=nSlots_all(test_num) % any 40 and 160\r
-\r
- if sub6\r
- disp('Sub6')\r
- if mu < 3\r
- nNumerology = mu+1;\r
- switch (bw)\r
- case {5}\r
- numRBs = nNumRbsPerSymF1(nNumerology,0+1);\r
- case {10}\r
- numRBs = nNumRbsPerSymF1(nNumerology,1+1);\r
- case {15}\r
- numRBs = nNumRbsPerSymF1(nNumerology,2+1);\r
- case {20}\r
- numRBs = nNumRbsPerSymF1(nNumerology,3+1);\r
- case {25}\r
- numRBs = nNumRbsPerSymF1(nNumerology,4+1);\r
- case {30}\r
- numRBs = nNumRbsPerSymF1(nNumerology,5+1);\r
- case {40}\r
- numRBs = nNumRbsPerSymF1(nNumerology,6+1);\r
- case {50}\r
- numRBs = nNumRbsPerSymF1(nNumerology,7+1);\r
- case {60}\r
- numRBs = nNumRbsPerSymF1(nNumerology,8+1);\r
- case {70}\r
- numRBs = nNumRbsPerSymF1(nNumerology,9+1);\r
- case {80}\r
- numRBs = nNumRbsPerSymF1(nNumerology,10+1);\r
- case {90}\r
- numRBs = nNumRbsPerSymF1(nNumerology,11+1);\r
- case {100}\r
- numRBs = nNumRbsPerSymF1(nNumerology,12+1);\r
- otherwise\r
- disp('Unknown BW && mu')\r
- end\r
- end\r
- else\r
- disp('mmWave')\r
- if (mu >=2) && (mu <= 3)\r
- nNumerology = mu;\r
- switch (bw)\r
- case {50}\r
- numRBs = nNumRbsPerSymF2(nNumerology-1,0+1);\r
- case {100}\r
- numRBs = nNumRbsPerSymF2(nNumerology-1,1+1);\r
- case {200}\r
- numRBs = nNumRbsPerSymF2(nNumerology-1,2+1);\r
- case {400}\r
- numRBs = nNumRbsPerSymF2(nNumerology-1,3+1);\r
- otherwise\r
- disp('Unknown BW && mu')\r
- end\r
- end\r
- end\r
-\r
- if numRBs ==0\r
- disp('Incorrect Numerology and BW combination.')\r
- return\r
- end\r
-\r
- bw\r
- numRBs\r
- nSlots\r
-\r
- %use file as input\r
- %ifft_in = load('ifft_in.txt')\r
-\r
- %gen IQs\r
- ifft_in = [[1:1:(numRBs*12)]', [1:1:(numRBs*12)]'];\r
-\r
- ant_c = ifft_in;\r
- for (i=1:1:nSlots*14-1)\r
- ifft_in_1 = ifft_in + i;\r
- ant_c = [ant_c; ifft_in_1];\r
- end\r
-\r
- %write files for IQ samples \r
- for ant = 1:1:ant_num\r
- antX=ant_c*(ant*10);\r
- antX_16=int16(antX.');\r
- file_name = strcat(path_to_usecase,"ant_", num2str(ant-1),".bin");\r
- disp(file_name)\r
- fileID = fopen(file_name,'w');\r
- fwrite(fileID, antX_16, 'int16');\r
- fclose(fileID); \r
- end\r
-\r
- if bfw_gen\r
- disp('Generate BF Weights per RB')\r
-\r
- %seed to make it repeatable \r
- rand('seed',47)\r
-\r
- %random channel matrix for single sym on syngle RB \r
- H = (rand(trx,ant_num) + 1j*rand(trx,ant_num));\r
-\r
- %calculate weights \r
- % W_dl = H^*(H^TH^*)^-1\r
- % W_ul = ((H^H*H)^-1)H^H\r
- % where H^* - conjugate \r
- % H^T - transpose\r
- % H^H - conjugate transpose \r
- W_dl = conj(H)*(transpose(H)*conj(H))^-1; %weights for DL\r
- W_ul = ((ctranspose(H)*H)^-1)*ctranspose(H); %weights for UL\r
-\r
- W_ul = W_ul.';\r
-\r
- for ant = 1:1:ant_num\r
- %DL \r
-\r
- bfw_per_sym = [];\r
- % adjust channel per each RB \r
- for iPrb = 1:1:numRBs\r
- bfw_per_sym = [ bfw_per_sym, [real((W_dl(:, ant).'))*iPrb; imag((W_dl(:, ant).'))*iPrb]];\r
- end\r
-\r
- bfw_all_slots = [];\r
- %reuse channel for all symbols \r
- for (slot_idx=1:1:nSlots*14)\r
- bfw_all_slots = [bfw_all_slots, bfw_per_sym];\r
- end\r
-\r
- bfw_all_slots_int = int16(bfw_all_slots./max(max(abs((bfw_all_slots.')))).*2^15);\r
-\r
- %write files for IQ samples \r
- antX_16=bfw_all_slots_int.';\r
- file_name = strcat(path_to_usecase,"dl_bfw_ue_", num2str(ant-1),".bin");\r
- disp(file_name)\r
- fileID = fopen(file_name,'w');\r
- fwrite(fileID,antX_16, 'int16');\r
- fclose(fileID); \r
-\r
- %UL \r
- bfw_per_sym = [];\r
- % adjust channel per each RB \r
- for iPrb = 1:1:numRBs\r
- bfw_per_sym = [ bfw_per_sym, [real((W_ul(:, ant).'))*iPrb; imag((W_ul(:, ant).'))*iPrb]];\r
- end\r
-\r
- bfw_all_slots = [];\r
- %reuse channel for all symbols \r
- for (slot_idx=1:1:nSlots*14)\r
- bfw_all_slots = [bfw_all_slots, bfw_per_sym];\r
- end\r
-\r
- bfw_all_slots_int = int16(bfw_all_slots./max(max(abs((bfw_all_slots.')))).*2^15);\r
-\r
- %write files for IQ samples \r
- antX_16=bfw_all_slots_int.';\r
- file_name = strcat(path_to_usecase,"ul_bfw_ue_", num2str(ant-1),".bin");\r
- disp(file_name)\r
- fileID = fopen(file_name,'w');\r
- fwrite(fileID,antX_16, 'int16');\r
- fclose(fileID); \r
- end \r
- end\r
-end\r
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+%
+% <COPYRIGHT_TAG>
+%
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+
+%This script was tested with GNU Octave, version 3.8.2 or Matlab 9.2.0.538062 (R2017a)
+
+close all;
+clear all;
+
+ % 5MHz 10MHz 15MHz 20 MHz 25 MHz 30 MHz 40 MHz 50MHz 60 MHz 70 MHz 80 MHz 90 MHz 100 MHz
+nNumRbsPerSymF1 = ...
+[
+ % 5MHz 10MHz 15MHz 20 MHz 25 MHz 30 MHz 40 MHz 50MHz 60 MHz 70 MHz 80 MHz 90 MHz 100 MHz
+ [25, 52, 79, 106, 133, 160, 216, 270, 0, 0, 0, 0, 0] % Numerology 0 (15KHz)
+ [11, 24, 38, 51, 65, 78, 106, 133, 162, 0, 217, 245, 273] % Numerology 1 (30KHz)
+ [0, 11, 18, 24, 31, 38, 51, 65, 79, 0, 107, 121, 135] % Numerology 2 (60KHz)
+];
+
+nNumRbsPerSymF2 = ...
+[
+ % 50Mhz 100MHz 200MHz 400MHz
+ [66, 132, 264, 0] % Numerology 2 (60KHz)
+ [32, 66, 132, 264] % Numerology 3 (120KHz)
+];
+
+% total number of tests
+tests_total = 6
+sub6_all = ...
+ [
+ true, true, true, true, false, true,
+ ]
+
+mu_all = ...
+ [
+ 0, 0, 0, 1, 3, 1
+ ]
+
+bw_all = ...
+ [
+ 5, 10, 20, 100, 100, 100
+ ]
+
+ant_num_all = ...
+ [
+ 4, 4, 4, 4, 4, 8
+ ]
+
+bfw_gen_all = ...
+ [
+ false, false, false, false, false, true
+ ]
+
+trx_all = ...
+ [
+ 32, 32, 32, 32, 32, 32
+ ]
+path_to_usecase_all = ...
+ [
+ "./usecase/mu0_5mhz/";
+ "./usecase/mu0_10mhz/";
+ "./usecase/mu0_20mhz/";
+ "./usecase/mu1_100mhz/";
+ "./usecase/mu3_100mhz/";
+ "./usecase/cat_b/mu1_100mhz/";
+ ]
+
+path_to_usecase_all = cellstr(path_to_usecase_all)
+
+nSlots_all = ...
+ [
+ 40,40,40,40,40,10
+ ]
+
+%select mu and bw to generate test files
+for test_num =(1:1:tests_total)
+ test_num
+ sub6=sub6_all(test_num) %false
+ mu=mu_all(test_num) % 0,1, or 3
+ bw=bw_all(test_num) %5,10,20,100 MHz
+ ant_num = ant_num_all(test_num)
+ bfw_gen=bfw_gen_all(test_num)
+ trx = trx_all(test_num)
+ size(path_to_usecase_all)
+ path_to_usecase = path_to_usecase_all(test_num)
+
+ nSlots=nSlots_all(test_num) % any 40 and 160
+
+ if sub6
+ disp('Sub6')
+ if mu < 3
+ nNumerology = mu+1;
+ switch (bw)
+ case {5}
+ numRBs = nNumRbsPerSymF1(nNumerology,0+1);
+ case {10}
+ numRBs = nNumRbsPerSymF1(nNumerology,1+1);
+ case {15}
+ numRBs = nNumRbsPerSymF1(nNumerology,2+1);
+ case {20}
+ numRBs = nNumRbsPerSymF1(nNumerology,3+1);
+ case {25}
+ numRBs = nNumRbsPerSymF1(nNumerology,4+1);
+ case {30}
+ numRBs = nNumRbsPerSymF1(nNumerology,5+1);
+ case {40}
+ numRBs = nNumRbsPerSymF1(nNumerology,6+1);
+ case {50}
+ numRBs = nNumRbsPerSymF1(nNumerology,7+1);
+ case {60}
+ numRBs = nNumRbsPerSymF1(nNumerology,8+1);
+ case {70}
+ numRBs = nNumRbsPerSymF1(nNumerology,9+1);
+ case {80}
+ numRBs = nNumRbsPerSymF1(nNumerology,10+1);
+ case {90}
+ numRBs = nNumRbsPerSymF1(nNumerology,11+1);
+ case {100}
+ numRBs = nNumRbsPerSymF1(nNumerology,12+1);
+ otherwise
+ disp('Unknown BW && mu')
+ end
+ end
+ else
+ disp('mmWave')
+ if (mu >=2) && (mu <= 3)
+ nNumerology = mu;
+ switch (bw)
+ case {50}
+ numRBs = nNumRbsPerSymF2(nNumerology-1,0+1);
+ case {100}
+ numRBs = nNumRbsPerSymF2(nNumerology-1,1+1);
+ case {200}
+ numRBs = nNumRbsPerSymF2(nNumerology-1,2+1);
+ case {400}
+ numRBs = nNumRbsPerSymF2(nNumerology-1,3+1);
+ otherwise
+ disp('Unknown BW && mu')
+ end
+ end
+ end
+
+ if numRBs ==0
+ disp('Incorrect Numerology and BW combination.')
+ return
+ end
+
+ bw
+ numRBs
+ nSlots
+
+ %use file as input
+ %ifft_in = load('ifft_in.txt')
+
+ %gen IQs
+ ifft_in = [[1:1:(numRBs*12)]', [1:1:(numRBs*12)]'];
+
+ ant_c = ifft_in;
+ for (i=1:1:nSlots*14-1)
+ ifft_in_1 = ifft_in + i;
+ ant_c = [ant_c; ifft_in_1];
+ end
+
+ %write files for IQ samples
+ for ant = 1:1:ant_num
+ antX=ant_c*(ant*10);
+ antX_16=int16(antX.');
+ file_name = strcat(path_to_usecase,"ant_", num2str(ant-1),".bin");
+ disp(file_name)
+ fileID = fopen(file_name,'w');
+ fwrite(fileID, antX_16, 'int16');
+ fclose(fileID);
+ end
+
+ if bfw_gen
+ disp('Generate BF Weights per RB')
+
+ %seed to make it repeatable
+ rand('seed',47)
+
+ %random channel matrix for single sym on syngle RB
+ H = (rand(trx,ant_num) + 1j*rand(trx,ant_num));
+
+ %calculate weights
+ % W_dl = H^*(H^TH^*)^-1
+ % W_ul = ((H^H*H)^-1)H^H
+ % where H^* - conjugate
+ % H^T - transpose
+ % H^H - conjugate transpose
+ W_dl = conj(H)*(transpose(H)*conj(H))^-1; %weights for DL
+ W_ul = ((ctranspose(H)*H)^-1)*ctranspose(H); %weights for UL
+
+ W_ul = W_ul.';
+
+ for ant = 1:1:ant_num
+ %DL
+
+ bfw_per_sym = [];
+ % adjust channel per each RB
+ for iPrb = 1:1:numRBs
+ bfw_per_sym = [ bfw_per_sym, [real((W_dl(:, ant).'))*iPrb; imag((W_dl(:, ant).'))*iPrb]];
+ end
+
+ bfw_all_slots = [];
+ %reuse channel for all symbols
+ for (slot_idx=1:1:nSlots*14)
+ bfw_all_slots = [bfw_all_slots, bfw_per_sym];
+ end
+
+ bfw_all_slots_int = int16(bfw_all_slots./max(max(abs((bfw_all_slots.')))).*2^15);
+
+ %write files for IQ samples
+ antX_16=bfw_all_slots_int.';
+ file_name = strcat(path_to_usecase,"dl_bfw_ue_", num2str(ant-1),".bin");
+ disp(file_name)
+ fileID = fopen(file_name,'w');
+ fwrite(fileID,antX_16, 'int16');
+ fclose(fileID);
+
+ %UL
+ bfw_per_sym = [];
+ % adjust channel per each RB
+ for iPrb = 1:1:numRBs
+ bfw_per_sym = [ bfw_per_sym, [real((W_ul(:, ant).'))*iPrb; imag((W_ul(:, ant).'))*iPrb]];
+ end
+
+ bfw_all_slots = [];
+ %reuse channel for all symbols
+ for (slot_idx=1:1:nSlots*14)
+ bfw_all_slots = [bfw_all_slots, bfw_per_sym];
+ end
+
+ bfw_all_slots_int = int16(bfw_all_slots./max(max(abs((bfw_all_slots.')))).*2^15);
+
+ %write files for IQ samples
+ antX_16=bfw_all_slots_int.';
+ file_name = strcat(path_to_usecase,"ul_bfw_ue_", num2str(ant-1),".bin");
+ disp(file_name)
+ fileID = fopen(file_name,'w');
+ fwrite(fileID,antX_16, 'int16');
+ fclose(fileID);
+ end
+ end
+end
-19,-1\r
-19,-1\r
-19,-1\r
-19,-1\r
-19,-1\r
-19,-1\r
-19,-1\r
-19,-1\r
-19,-1\r
-19,-1\r
-19,-1\r
-19,-1\r
-19,-1\r
-19,-1\r
-19,-1\r
-19,-1\r
-19,-1\r
-19,-1\r
-19,-1\r
-19,-1\r
-19,-1\r
-19,-1\r
-19,-1\r
-19,-1\r
-19,-1\r
-19,-1\r
-19,-1\r
-19,-1\r
-19,-1\r
-19,-1\r
-19,0\r
-19,-1\r
-19,-1\r
-19,0\r
-19,0\r
-19,0\r
-19,0\r
-19,0\r
-19,0\r
-19,0\r
-19,0\r
-19,0\r
-19,0\r
-19,0\r
-19,0\r
-19,0\r
-19,0\r
-19,0\r
-19,0\r
-19,0\r
-19,0\r
-19,0\r
-19,0\r
-19,0\r
-19,0\r
-19,0\r
-19,0\r
-19,0\r
-19,0\r
-19,0\r
-20,0\r
-20,0\r
-20,0\r
-20,0\r
-20,0\r
-20,0\r
-20,0\r
-20,0\r
-20,1\r
-20,1\r
-20,1\r
-20,1\r
-20,1\r
-20,1\r
-20,1\r
-20,1\r
-20,1\r
-20,1\r
-20,1\r
-20,1\r
-20,1\r
-20,1\r
-20,1\r
-20,1\r
-20,1\r
-20,1\r
-20,1\r
-20,1\r
-20,1\r
-20,1\r
-20,1\r
-20,1\r
-20,1\r
-20,1\r
-20,2\r
-20,1\r
-20,1\r
-20,1\r
-20,2\r
-20,2\r
-20,2\r
-20,2\r
-20,2\r
-20,2\r
-20,2\r
-20,2\r
-20,2\r
-20,2\r
-20,2\r
-20,2\r
-20,2\r
-20,2\r
-20,2\r
-20,2\r
-20,2\r
-21,2\r
-21,2\r
-21,2\r
-21,2\r
-21,2\r
-21,2\r
-21,2\r
-21,2\r
-21,2\r
-21,2\r
-21,2\r
-21,2\r
-21,2\r
-21,2\r
-21,3\r
-21,3\r
-21,3\r
-21,3\r
-21,3\r
-21,3\r
-21,3\r
-21,3\r
-21,3\r
-21,3\r
-21,3\r
-21,3\r
-21,3\r
-21,3\r
-21,3\r
-21,3\r
-21,3\r
-21,3\r
-21,3\r
-21,3\r
-21,3\r
-21,3\r
-21,3\r
-21,3\r
-21,3\r
-21,3\r
-21,4\r
-21,4\r
-22,4\r
-21,3\r
-21,3\r
-21,4\r
-21,4\r
-21,4\r
-21,4\r
-22,4\r
-22,4\r
-22,4\r
-22,4\r
-22,4\r
-22,4\r
-22,4\r
-22,4\r
-22,4\r
-22,4\r
-22,4\r
-22,4\r
-22,4\r
-22,4\r
-22,4\r
-22,4\r
-22,4\r
-22,4\r
-22,4\r
-22,5\r
-22,5\r
-22,5\r
-22,5\r
-22,5\r
-22,5\r
-22,5\r
-22,5\r
-22,5\r
-22,5\r
-22,5\r
-22,5\r
-22,5\r
-22,5\r
-22,5\r
-22,5\r
-22,5\r
-22,5\r
-22,5\r
-22,5\r
-22,5\r
-22,5\r
-22,5\r
-23,5\r
-23,6\r
-23,6\r
-23,6\r
-23,6\r
-23,6\r
-23,6\r
-23,6\r
-23,6\r
-23,6\r
-23,6\r
-23,6\r
-23,6\r
-23,6\r
-23,6\r
-23,6\r
-23,6\r
-23,6\r
-23,6\r
-23,6\r
-23,6\r
-23,6\r
-23,6\r
-23,6\r
-23,7\r
-23,7\r
-23,7\r
-23,7\r
-23,7\r
-23,7\r
-23,7\r
-23,7\r
-23,7\r
-23,7\r
-23,7\r
-23,7\r
-23,7\r
-23,7\r
-23,7\r
-23,7\r
-24,7\r
-24,7\r
-24,7\r
-24,7\r
-24,7\r
-24,8\r
-24,8\r
-24,8\r
-24,8\r
-24,8\r
-24,8\r
-24,8\r
-24,8\r
-24,8\r
-24,8\r
-24,8\r
-24,8\r
-24,8\r
-24,8\r
-24,8\r
-24,8\r
-24,8\r
-24,8\r
-24,8\r
-24,8\r
-24,9\r
-24,9\r
-24,9\r
-24,9\r
-24,9\r
-24,9\r
-24,9\r
-24,9\r
-25,9\r
-25,9\r
-25,9\r
-25,9\r
-25,9\r
-25,9\r
-25,9\r
-25,9\r
-25,9\r
-25,9\r
-25,10\r
-25,10\r
-25,10\r
-25,10\r
-25,10\r
-25,10\r
-25,10\r
-25,10\r
-25,10\r
-25,10\r
-25,10\r
-25,10\r
-25,10\r
-25,10\r
-25,10\r
-25,10\r
-25,10\r
-25,10\r
-25,11\r
-25,11\r
-26,11\r
-26,11\r
-26,11\r
-26,11\r
-26,11\r
-26,11\r
-26,11\r
-26,11\r
-26,11\r
-26,11\r
-26,11\r
-26,11\r
-26,11\r
-26,11\r
-26,12\r
-26,12\r
-26,12\r
-26,12\r
-26,12\r
-26,12\r
-26,12\r
-26,12\r
-26,12\r
-26,12\r
-26,12\r
-26,12\r
-26,12\r
-27,12\r
-27,12\r
-27,13\r
-27,13\r
-27,13\r
-27,13\r
-27,13\r
-27,13\r
-27,13\r
-27,13\r
-27,13\r
-27,13\r
-27,13\r
-27,13\r
-27,14\r
-27,14\r
-27,14\r
-27,14\r
-27,14\r
-27,14\r
-27,14\r
-27,14\r
-27,14\r
-27,14\r
-28,14\r
-28,14\r
-28,14\r
-28,14\r
-28,14\r
-28,15\r
-28,15\r
-28,15\r
-28,15\r
-28,15\r
-28,15\r
-28,15\r
-28,15\r
-28,15\r
-28,15\r
-28,15\r
-28,15\r
-28,15\r
-28,16\r
-28,16\r
-28,16\r
-28,16\r
-29,16\r
-29,16\r
-29,16\r
-29,16\r
-29,16\r
-29,16\r
-29,16\r
-29,16\r
-29,17\r
-29,17\r
-28,17\r
-29,17\r
-29,17\r
-29,17\r
-29,17\r
-29,17\r
-29,17\r
-29,17\r
-29,17\r
-29,18\r
-30,18\r
-30,18\r
-30,18\r
-30,18\r
-30,18\r
-30,18\r
-30,18\r
-30,18\r
-30,18\r
-30,18\r
-30,19\r
-30,18\r
-30,19\r
-30,19\r
-30,19\r
-30,19\r
-30,19\r
-31,19\r
-31,19\r
-31,20\r
-31,20\r
-31,20\r
-31,20\r
-31,20\r
-31,20\r
-31,20\r
-31,20\r
-31,20\r
-31,21\r
-31,21\r
-31,21\r
-31,21\r
-32,21\r
-31,21\r
-32,21\r
-32,21\r
-32,21\r
-32,22\r
-32,22\r
-32,22\r
-32,22\r
-32,22\r
-32,22\r
-32,22\r
-32,22\r
-32,23\r
-32,23\r
-32,23\r
-33,23\r
-33,23\r
-33,23\r
-33,23\r
-33,23\r
-33,24\r
-34,24\r
-33,24\r
-33,24\r
-33,24\r
-33,24\r
-33,24\r
-33,24\r
-34,25\r
-34,25\r
-34,25\r
-34,25\r
-34,25\r
-34,25\r
-34,25\r
-34,26\r
-34,26\r
-34,26\r
-34,26\r
-34,26\r
-35,26\r
-35,26\r
-35,26\r
-35,27\r
-35,27\r
-35,27\r
-35,27\r
-35,27\r
-35,28\r
-35,28\r
-35,28\r
-36,28\r
-36,28\r
-36,28\r
-36,29\r
-36,29\r
-36,29\r
-36,29\r
-36,29\r
-36,29\r
-36,30\r
-36,30\r
-37,30\r
-37,30\r
-37,30\r
-37,30\r
-37,31\r
-37,31\r
-37,31\r
-37,31\r
-37,31\r
-38,32\r
-38,32\r
-38,32\r
-38,32\r
-38,32\r
-38,33\r
-38,33\r
-38,33\r
-38,33\r
-39,33\r
-39,34\r
-39,34\r
-39,34\r
-39,34\r
-39,34\r
-39,35\r
-39,35\r
-40,35\r
-40,35\r
-40,35\r
-40,36\r
-40,36\r
-40,36\r
-40,36\r
-41,37\r
-41,37\r
-41,37\r
-41,37\r
-41,38\r
-41,38\r
-41,38\r
-41,38\r
-42,39\r
-42,39\r
-42,39\r
-42,40\r
-42,39\r
-42,40\r
-43,40\r
-43,40\r
-43,41\r
-43,41\r
-43,41\r
-43,42\r
-44,42\r
-44,42\r
-44,42\r
-44,43\r
-44,43\r
-44,43\r
-45,44\r
-45,44\r
-45,44\r
-45,45\r
-45,45\r
-45,45\r
-46,46\r
-46,46\r
-46,46\r
-46,47\r
-46,47\r
-47,47\r
-47,48\r
-47,48\r
-47,48\r
-47,49\r
-48,49\r
-48,49\r
-48,50\r
-48,50\r
-49,51\r
-49,51\r
-49,51\r
-49,52\r
-49,52\r
-50,53\r
-50,53\r
-50,53\r
-50,54\r
-51,54\r
-51,55\r
-51,55\r
-51,56\r
-52,56\r
-52,57\r
-52,57\r
-53,57\r
-53,58\r
-53,58\r
-53,59\r
-54,59\r
-54,60\r
-54,61\r
-55,61\r
-55,62\r
-56,63\r
-56,63\r
-56,64\r
-57,64\r
-57,65\r
-57,66\r
-58,66\r
-58,67\r
-58,67\r
-59,68\r
-59,69\r
-59,69\r
-60,70\r
-60,71\r
-61,71\r
-61,72\r
-61,73\r
-62,74\r
-62,74\r
-63,75\r
-63,76\r
-64,77\r
-64,77\r
-64,78\r
-65,79\r
-65,80\r
-66,81\r
-66,82\r
-67,82\r
-67,83\r
-68,84\r
-69,85\r
-69,86\r
-70,87\r
-70,88\r
-71,89\r
-71,90\r
-72,91\r
-73,92\r
-73,93\r
-74,95\r
-75,96\r
-75,97\r
-76,98\r
-77,99\r
-77,101\r
-78,102\r
-79,103\r
-80,105\r
-80,106\r
-81,107\r
-82,109\r
-83,110\r
-84,112\r
-85,113\r
-86,115\r
-87,117\r
-88,118\r
-89,120\r
-90,122\r
-91,124\r
-92,126\r
-93,128\r
-94,130\r
-95,132\r
-97,134\r
-98,136\r
-99,138\r
-100,140\r
-102,143\r
-103,145\r
-105,148\r
-106,151\r
-108,153\r
-110,156\r
-111,159\r
-113,162\r
-115,165\r
-117,169\r
-119,172\r
-121,176\r
-123,179\r
-125,183\r
-127,187\r
-130,191\r
-132,195\r
-135,200\r
-138,205\r
-140,210\r
-143,215\r
-146,220\r
-150,226\r
-153,232\r
-157,238\r
-161,245\r
-165,252\r
-169,259\r
-173,267\r
-178,275\r
-183,284\r
-189,293\r
-194,303\r
-201,314\r
-207,325\r
-214,337\r
-222,351\r
-230,365\r
-239,380\r
-248,397\r
-259,415\r
-271,435\r
-283,457\r
-297,481\r
-312,507\r
-330,537\r
-349,571\r
-371,608\r
-395,651\r
-424,701\r
-457,758\r
-496,826\r
-543,907\r
-600,1005\r
-670,1127\r
-759,1281\r
-877,1485\r
-1038,1765\r
-1275,2175\r
-1653,2829\r
-2355,4046\r
-4111,7086\r
-16399,28370\r
--8177,-14197\r
--3262,-5684\r
--2033,-3556\r
--1475,-2588\r
--1156,-2035\r
--949,-1678\r
--805,-1427\r
--698,-1242\r
--616,-1100\r
--550,-987\r
--497,-895\r
--454,-819\r
--417,-755\r
--385,-700\r
--358,-653\r
--334,-612\r
--313,-576\r
--295,-544\r
--278,-515\r
--263,-489\r
--250,-466\r
--238,-444\r
--226,-425\r
--216,-408\r
--207,-392\r
--198,-377\r
--190,-363\r
--183,-350\r
--176,-338\r
--169,-327\r
--163,-317\r
--158,-307\r
--153,-298\r
--148,-289\r
--143,-281\r
--138,-273\r
--134,-266\r
--130,-259\r
--127,-253\r
--123,-247\r
--120,-241\r
--116,-235\r
--113,-230\r
--110,-225\r
--108,-220\r
--105,-215\r
--102,-211\r
--100,-206\r
--98,-202\r
--95,-198\r
--93,-195\r
--91,-191\r
--89,-188\r
--87,-184\r
--85,-181\r
--83,-178\r
--82,-175\r
--80,-172\r
+19,-1
+19,-1
+19,-1
+19,-1
+19,-1
+19,-1
+19,-1
+19,-1
+19,-1
+19,-1
+19,-1
+19,-1
+19,-1
+19,-1
+19,-1
+19,-1
+19,-1
+19,-1
+19,-1
+19,-1
+19,-1
+19,-1
+19,-1
+19,-1
+19,-1
+19,-1
+19,-1
+19,-1
+19,-1
+19,-1
+19,0
+19,-1
+19,-1
+19,0
+19,0
+19,0
+19,0
+19,0
+19,0
+19,0
+19,0
+19,0
+19,0
+19,0
+19,0
+19,0
+19,0
+19,0
+19,0
+19,0
+19,0
+19,0
+19,0
+19,0
+19,0
+19,0
+19,0
+19,0
+19,0
+19,0
+20,0
+20,0
+20,0
+20,0
+20,0
+20,0
+20,0
+20,0
+20,1
+20,1
+20,1
+20,1
+20,1
+20,1
+20,1
+20,1
+20,1
+20,1
+20,1
+20,1
+20,1
+20,1
+20,1
+20,1
+20,1
+20,1
+20,1
+20,1
+20,1
+20,1
+20,1
+20,1
+20,1
+20,1
+20,2
+20,1
+20,1
+20,1
+20,2
+20,2
+20,2
+20,2
+20,2
+20,2
+20,2
+20,2
+20,2
+20,2
+20,2
+20,2
+20,2
+20,2
+20,2
+20,2
+20,2
+21,2
+21,2
+21,2
+21,2
+21,2
+21,2
+21,2
+21,2
+21,2
+21,2
+21,2
+21,2
+21,2
+21,2
+21,3
+21,3
+21,3
+21,3
+21,3
+21,3
+21,3
+21,3
+21,3
+21,3
+21,3
+21,3
+21,3
+21,3
+21,3
+21,3
+21,3
+21,3
+21,3
+21,3
+21,3
+21,3
+21,3
+21,3
+21,3
+21,3
+21,4
+21,4
+22,4
+21,3
+21,3
+21,4
+21,4
+21,4
+21,4
+22,4
+22,4
+22,4
+22,4
+22,4
+22,4
+22,4
+22,4
+22,4
+22,4
+22,4
+22,4
+22,4
+22,4
+22,4
+22,4
+22,4
+22,4
+22,4
+22,5
+22,5
+22,5
+22,5
+22,5
+22,5
+22,5
+22,5
+22,5
+22,5
+22,5
+22,5
+22,5
+22,5
+22,5
+22,5
+22,5
+22,5
+22,5
+22,5
+22,5
+22,5
+22,5
+23,5
+23,6
+23,6
+23,6
+23,6
+23,6
+23,6
+23,6
+23,6
+23,6
+23,6
+23,6
+23,6
+23,6
+23,6
+23,6
+23,6
+23,6
+23,6
+23,6
+23,6
+23,6
+23,6
+23,6
+23,7
+23,7
+23,7
+23,7
+23,7
+23,7
+23,7
+23,7
+23,7
+23,7
+23,7
+23,7
+23,7
+23,7
+23,7
+23,7
+24,7
+24,7
+24,7
+24,7
+24,7
+24,8
+24,8
+24,8
+24,8
+24,8
+24,8
+24,8
+24,8
+24,8
+24,8
+24,8
+24,8
+24,8
+24,8
+24,8
+24,8
+24,8
+24,8
+24,8
+24,8
+24,9
+24,9
+24,9
+24,9
+24,9
+24,9
+24,9
+24,9
+25,9
+25,9
+25,9
+25,9
+25,9
+25,9
+25,9
+25,9
+25,9
+25,9
+25,10
+25,10
+25,10
+25,10
+25,10
+25,10
+25,10
+25,10
+25,10
+25,10
+25,10
+25,10
+25,10
+25,10
+25,10
+25,10
+25,10
+25,10
+25,11
+25,11
+26,11
+26,11
+26,11
+26,11
+26,11
+26,11
+26,11
+26,11
+26,11
+26,11
+26,11
+26,11
+26,11
+26,11
+26,12
+26,12
+26,12
+26,12
+26,12
+26,12
+26,12
+26,12
+26,12
+26,12
+26,12
+26,12
+26,12
+27,12
+27,12
+27,13
+27,13
+27,13
+27,13
+27,13
+27,13
+27,13
+27,13
+27,13
+27,13
+27,13
+27,13
+27,14
+27,14
+27,14
+27,14
+27,14
+27,14
+27,14
+27,14
+27,14
+27,14
+28,14
+28,14
+28,14
+28,14
+28,14
+28,15
+28,15
+28,15
+28,15
+28,15
+28,15
+28,15
+28,15
+28,15
+28,15
+28,15
+28,15
+28,15
+28,16
+28,16
+28,16
+28,16
+29,16
+29,16
+29,16
+29,16
+29,16
+29,16
+29,16
+29,16
+29,17
+29,17
+28,17
+29,17
+29,17
+29,17
+29,17
+29,17
+29,17
+29,17
+29,17
+29,18
+30,18
+30,18
+30,18
+30,18
+30,18
+30,18
+30,18
+30,18
+30,18
+30,18
+30,19
+30,18
+30,19
+30,19
+30,19
+30,19
+30,19
+31,19
+31,19
+31,20
+31,20
+31,20
+31,20
+31,20
+31,20
+31,20
+31,20
+31,20
+31,21
+31,21
+31,21
+31,21
+32,21
+31,21
+32,21
+32,21
+32,21
+32,22
+32,22
+32,22
+32,22
+32,22
+32,22
+32,22
+32,22
+32,23
+32,23
+32,23
+33,23
+33,23
+33,23
+33,23
+33,23
+33,24
+34,24
+33,24
+33,24
+33,24
+33,24
+33,24
+33,24
+34,25
+34,25
+34,25
+34,25
+34,25
+34,25
+34,25
+34,26
+34,26
+34,26
+34,26
+34,26
+35,26
+35,26
+35,26
+35,27
+35,27
+35,27
+35,27
+35,27
+35,28
+35,28
+35,28
+36,28
+36,28
+36,28
+36,29
+36,29
+36,29
+36,29
+36,29
+36,29
+36,30
+36,30
+37,30
+37,30
+37,30
+37,30
+37,31
+37,31
+37,31
+37,31
+37,31
+38,32
+38,32
+38,32
+38,32
+38,32
+38,33
+38,33
+38,33
+38,33
+39,33
+39,34
+39,34
+39,34
+39,34
+39,34
+39,35
+39,35
+40,35
+40,35
+40,35
+40,36
+40,36
+40,36
+40,36
+41,37
+41,37
+41,37
+41,37
+41,38
+41,38
+41,38
+41,38
+42,39
+42,39
+42,39
+42,40
+42,39
+42,40
+43,40
+43,40
+43,41
+43,41
+43,41
+43,42
+44,42
+44,42
+44,42
+44,43
+44,43
+44,43
+45,44
+45,44
+45,44
+45,45
+45,45
+45,45
+46,46
+46,46
+46,46
+46,47
+46,47
+47,47
+47,48
+47,48
+47,48
+47,49
+48,49
+48,49
+48,50
+48,50
+49,51
+49,51
+49,51
+49,52
+49,52
+50,53
+50,53
+50,53
+50,54
+51,54
+51,55
+51,55
+51,56
+52,56
+52,57
+52,57
+53,57
+53,58
+53,58
+53,59
+54,59
+54,60
+54,61
+55,61
+55,62
+56,63
+56,63
+56,64
+57,64
+57,65
+57,66
+58,66
+58,67
+58,67
+59,68
+59,69
+59,69
+60,70
+60,71
+61,71
+61,72
+61,73
+62,74
+62,74
+63,75
+63,76
+64,77
+64,77
+64,78
+65,79
+65,80
+66,81
+66,82
+67,82
+67,83
+68,84
+69,85
+69,86
+70,87
+70,88
+71,89
+71,90
+72,91
+73,92
+73,93
+74,95
+75,96
+75,97
+76,98
+77,99
+77,101
+78,102
+79,103
+80,105
+80,106
+81,107
+82,109
+83,110
+84,112
+85,113
+86,115
+87,117
+88,118
+89,120
+90,122
+91,124
+92,126
+93,128
+94,130
+95,132
+97,134
+98,136
+99,138
+100,140
+102,143
+103,145
+105,148
+106,151
+108,153
+110,156
+111,159
+113,162
+115,165
+117,169
+119,172
+121,176
+123,179
+125,183
+127,187
+130,191
+132,195
+135,200
+138,205
+140,210
+143,215
+146,220
+150,226
+153,232
+157,238
+161,245
+165,252
+169,259
+173,267
+178,275
+183,284
+189,293
+194,303
+201,314
+207,325
+214,337
+222,351
+230,365
+239,380
+248,397
+259,415
+271,435
+283,457
+297,481
+312,507
+330,537
+349,571
+371,608
+395,651
+424,701
+457,758
+496,826
+543,907
+600,1005
+670,1127
+759,1281
+877,1485
+1038,1765
+1275,2175
+1653,2829
+2355,4046
+4111,7086
+16399,28370
+-8177,-14197
+-3262,-5684
+-2033,-3556
+-1475,-2588
+-1156,-2035
+-949,-1678
+-805,-1427
+-698,-1242
+-616,-1100
+-550,-987
+-497,-895
+-454,-819
+-417,-755
+-385,-700
+-358,-653
+-334,-612
+-313,-576
+-295,-544
+-278,-515
+-263,-489
+-250,-466
+-238,-444
+-226,-425
+-216,-408
+-207,-392
+-198,-377
+-190,-363
+-183,-350
+-176,-338
+-169,-327
+-163,-317
+-158,-307
+-153,-298
+-148,-289
+-143,-281
+-138,-273
+-134,-266
+-130,-259
+-127,-253
+-123,-247
+-120,-241
+-116,-235
+-113,-230
+-110,-225
+-108,-220
+-105,-215
+-102,-211
+-100,-206
+-98,-202
+-95,-198
+-93,-195
+-91,-191
+-89,-188
+-87,-184
+-85,-181
+-83,-178
+-82,-175
+-80,-172
-78,-169
\ No newline at end of file
-#! /bin/bash\r
-\r
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-ulimit -c unlimited\r
-echo 1 > /proc/sys/kernel/core_uses_pid\r
-\r
-\r
-#40G\r
-#./build/sample-app ./usecase/mu3_100mhz/config_file_o_du.dat 0000:d8:02.0 0000:d8:02.1\r
-\r
-#25G\r
-../build/sample-app ../usecase/mu0_20mhz/12/config_file_o_du_0.dat 0000:86:02.0 0000:86:02.1\r
-\r
-\r
+#! /bin/bash
+
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+ulimit -c unlimited
+echo 1 > /proc/sys/kernel/core_uses_pid
+
+
+#40G
+#./build/sample-app ./usecase/mu3_100mhz/config_file_o_du.dat 0000:d8:02.0 0000:d8:02.1
+
+#25G
+../build/sample-app ../usecase/mu0_20mhz/12/config_file_o_du_0.dat 0000:86:02.0 0000:86:02.1
+
+
-#! /bin/bash\r
-\r
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-ulimit -c unlimited\r
-echo 1 > /proc/sys/kernel/core_uses_pid\r
-\r
-\r
-#40G\r
-#./build/sample-app ./usecase/mu3_100mhz/config_file_o_du.dat 0000:d8:02.0 0000:d8:02.1\r
-\r
-#25G\r
-../build/sample-app ../usecase/mu0_20mhz/12/config_file_o_ru_0.dat 0000:af:0a.0 0000:af:0a.1\r
-\r
-\r
+#! /bin/bash
+
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+ulimit -c unlimited
+echo 1 > /proc/sys/kernel/core_uses_pid
+
+
+#40G
+#./build/sample-app ./usecase/mu3_100mhz/config_file_o_du.dat 0000:d8:02.0 0000:d8:02.1
+
+#25G
+../build/sample-app ../usecase/mu0_20mhz/12/config_file_o_ru_0.dat 0000:af:0a.0 0000:af:0a.1
+
+
-#! /bin/bash\r
-\r
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-ulimit -c unlimited\r
-echo 1 > /proc/sys/kernel/core_uses_pid\r
-\r
-\r
-#40G\r
-#./build/sample-app ./usecase/mu3_100mhz/config_file_o_du.dat 0000:d8:02.0 0000:d8:02.1\r
-\r
-#25G\r
-../build/sample-app ../usecase/mu0_20mhz/12/config_file_o_du_1.dat 0000:86:02.2 0000:86:02.3\r
-\r
+#! /bin/bash
+
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+ulimit -c unlimited
+echo 1 > /proc/sys/kernel/core_uses_pid
+
+
+#40G
+#./build/sample-app ./usecase/mu3_100mhz/config_file_o_du.dat 0000:d8:02.0 0000:d8:02.1
+
+#25G
+../build/sample-app ../usecase/mu0_20mhz/12/config_file_o_du_1.dat 0000:86:02.2 0000:86:02.3
+
-#! /bin/bash\r
-\r
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-ulimit -c unlimited\r
-echo 1 > /proc/sys/kernel/core_uses_pid\r
-\r
-\r
-#40G\r
-#./build/sample-app ./usecase/mu3_100mhz/config_file_o_du.dat 0000:d8:02.0 0000:d8:02.1\r
-\r
-#25G\r
-../build/sample-app ../usecase/mu0_20mhz/12/config_file_o_ru_1.dat 0000:af:0a.2 0000:af:0a.3\r
-\r
+#! /bin/bash
+
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+ulimit -c unlimited
+echo 1 > /proc/sys/kernel/core_uses_pid
+
+
+#40G
+#./build/sample-app ./usecase/mu3_100mhz/config_file_o_du.dat 0000:d8:02.0 0000:d8:02.1
+
+#25G
+../build/sample-app ../usecase/mu0_20mhz/12/config_file_o_ru_1.dat 0000:af:0a.2 0000:af:0a.3
+
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-#include <assert.h>\r
-#include <err.h>\r
-#include <arpa/inet.h>\r
-#include <sys/time.h>\r
-#include <time.h>\r
-\r
-#include "common.h"\r
-#include "xran_fh_o_du.h"\r
-#include "xran_pkt.h"\r
-#include "xran_pkt_up.h"\r
-#include "xran_cp_api.h"\r
-#include "xran_up_api.h"\r
-\r
-#include "xran_mlog_lnx.h"\r
-\r
-extern enum app_state state;\r
-\r
-int iq_playback_buffer_size_dl = IQ_PLAYBACK_BUFFER_BYTES;\r
-int iq_playback_buffer_size_ul = IQ_PLAYBACK_BUFFER_BYTES;\r
-\r
-int iq_bfw_buffer_size_dl = IQ_PLAYBACK_BUFFER_BYTES;\r
-int iq_bfw_buffer_size_ul = IQ_PLAYBACK_BUFFER_BYTES;\r
-\r
-int iq_srs_buffer_size_ul = IQ_PLAYBACK_BUFFER_BYTES;\r
-\r
-uint8_t numCCPorts = 1;\r
-/* Number of antennas supported by front-end */\r
-\r
-uint8_t num_eAxc = 4;\r
-/* Number of CPRI ports supported by front-end */\r
-\r
-int16_t *p_tx_play_buffer[MAX_ANT_CARRIER_SUPPORTED];\r
-int32_t tx_play_buffer_size[MAX_ANT_CARRIER_SUPPORTED];\r
-int32_t tx_play_buffer_position[MAX_ANT_CARRIER_SUPPORTED];\r
-\r
-int16_t *p_tx_prach_play_buffer[MAX_ANT_CARRIER_SUPPORTED];\r
-int32_t tx_prach_play_buffer_size[MAX_ANT_CARRIER_SUPPORTED];\r
-int32_t tx_prach_play_buffer_position[MAX_ANT_CARRIER_SUPPORTED];\r
-\r
-int16_t *p_tx_srs_play_buffer[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];\r
-int32_t tx_srs_play_buffer_size[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];\r
-int32_t tx_srs_play_buffer_position[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];\r
-\r
-int16_t *p_rx_log_buffer[MAX_ANT_CARRIER_SUPPORTED];\r
-int32_t rx_log_buffer_size[MAX_ANT_CARRIER_SUPPORTED];\r
-int32_t rx_log_buffer_position[MAX_ANT_CARRIER_SUPPORTED];\r
-\r
-int16_t *p_prach_log_buffer[MAX_ANT_CARRIER_SUPPORTED];\r
-int32_t prach_log_buffer_size[MAX_ANT_CARRIER_SUPPORTED];\r
-int32_t prach_log_buffer_position[MAX_ANT_CARRIER_SUPPORTED];\r
-\r
-int16_t *p_srs_log_buffer[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];\r
-int32_t srs_log_buffer_size[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];\r
-int32_t srs_log_buffer_position[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];\r
-\r
-int16_t *p_tx_buffer[MAX_ANT_CARRIER_SUPPORTED];\r
-int32_t tx_buffer_size[MAX_ANT_CARRIER_SUPPORTED];\r
-\r
-int16_t *p_rx_buffer[MAX_ANT_CARRIER_SUPPORTED];\r
-int32_t rx_buffer_size[MAX_ANT_CARRIER_SUPPORTED];\r
-\r
-/* beamforming weights for UL (O-DU) */\r
-int16_t *p_tx_dl_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];\r
-int32_t tx_dl_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];\r
-int32_t tx_dl_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];\r
-\r
-/* beamforming weights for UL (O-DU) */\r
-int16_t *p_tx_ul_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];\r
-int32_t tx_ul_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];\r
-int32_t tx_ul_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];\r
-\r
-/* beamforming weights for UL (O-RU) */\r
-int16_t *p_rx_dl_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];\r
-int32_t rx_dl_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];\r
-int32_t rx_dl_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];\r
-\r
-/* beamforming weights for UL (O-RU) */\r
-int16_t *p_rx_ul_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];\r
-int32_t rx_ul_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];\r
-int32_t rx_ul_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];\r
-\r
-// F1 Tables 38.101-1 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB\r
-uint16_t nNumRbsPerSymF1[3][13] =\r
-{\r
- // 5MHz 10MHz 15MHz 20 MHz 25 MHz 30 MHz 40 MHz 50MHz 60 MHz 70 MHz 80 MHz 90 MHz 100 MHz\r
- {25, 52, 79, 106, 133, 160, 216, 270, 0, 0, 0, 0, 0}, // Numerology 0 (15KHz)\r
- {11, 24, 38, 51, 65, 78, 106, 133, 162, 0, 217, 245, 273}, // Numerology 1 (30KHz)\r
- {0, 11, 18, 24, 31, 38, 51, 65, 79, 0, 107, 121, 135} // Numerology 2 (60KHz)\r
-};\r
-\r
-// F2 Tables 38.101-2 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB\r
-uint16_t nNumRbsPerSymF2[2][4] =\r
-{\r
- // 50Mhz 100MHz 200MHz 400MHz\r
- {66, 132, 264, 0}, // Numerology 2 (60KHz)\r
- {32, 66, 132, 264} // Numerology 3 (120KHz)\r
-};\r
-\r
-// 38.211 - Table 4.2.1\r
-uint16_t nSubCarrierSpacing[5] =\r
-{\r
- 15, // mu = 0\r
- 30, // mu = 1\r
- 60, // mu = 2\r
- 120, // mu = 3\r
- 240 // mu = 4\r
-};\r
-\r
-// TTI interval in us (slot duration)\r
-uint16_t nTtiInterval[4] =\r
-{\r
- 1000, // mu = 0\r
- 500, // mu = 1\r
- 250, // mu = 2\r
- 125, // mu = 3\r
-};\r
-\r
-\r
-// F1 Tables 38.101-1 Table F.5.3. Window length for normal CP\r
-uint16_t nCpSizeF1[3][13][2] =\r
-{\r
- // 5MHz 10MHz 15MHz 20 MHz 25 MHz 30 MHz 40 MHz 50MHz 60 MHz 70 MHz 80 MHz 90 MHz 100 MHz\r
- {{40, 36}, {80, 72}, {120, 108}, {160, 144}, {160, 144}, {240, 216}, {320, 288}, {320, 288}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}}, // Numerology 0 (15KHz)\r
- {{22, 18}, {44, 36}, {66, 54}, {88, 72}, {88, 72}, {132, 108}, {176, 144}, {176, 144}, {264, 216}, {264, 216}, {352, 288}, {352, 288}, {352, 288}}, // Numerology 1 (30KHz)\r
- { {0, 0}, {26, 18}, {39, 27}, {52, 36}, {52, 36}, {78, 54}, {104, 72}, {104, 72}, {156, 108}, {156, 108}, {208, 144}, {208, 144}, {208, 144}}, // Numerology 2 (60KHz)\r
-};\r
-\r
-// F2 Tables 38.101-2 Table F.5.3. Window length for normal CP\r
-int16_t nCpSizeF2[2][4][2] =\r
-{\r
- // 50Mhz 100MHz 200MHz 400MHz\r
- { {0, 0}, {104, 72}, {208, 144}, {416, 288}}, // Numerology 2 (60KHz)\r
- {{68, 36}, {136, 72}, {272, 144}, {544, 288}}, // Numerology 3 (120KHz)\r
-};\r
-\r
-uint32_t gMaxSlotNum;\r
-uint32_t gNumDLCtx;\r
-uint32_t gNumULCtx;\r
-uint32_t gDLResetAdvance;\r
-uint32_t gDLProcAdvance;\r
-uint32_t gULProcAdvance;\r
-\r
-static uint16_t g_NumSlotTDDLoop[XRAN_MAX_SECTOR_NR] = { XRAN_NUM_OF_SLOT_IN_TDD_LOOP };\r
-static uint16_t g_NumDLSymSp[XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SLOT_IN_TDD_LOOP] = {0};\r
-static uint16_t g_NumULSymSp[XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SLOT_IN_TDD_LOOP] = {0};\r
-static uint8_t g_SlotType[XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SLOT_IN_TDD_LOOP] = {{XRAN_SLOT_TYPE_INVALID}};\r
-float g_UlRate[XRAN_MAX_SECTOR_NR] = {0.0};\r
-float g_DlRate[XRAN_MAX_SECTOR_NR] = {0.0};\r
-\r
-uint32_t app_xran_get_tti_interval(uint8_t nMu)\r
-{\r
- if (nMu < 4)\r
- {\r
- return nTtiInterval[nMu];\r
- }\r
- else\r
- {\r
- printf("ERROR: %s Mu[%d] is not valid\n",__FUNCTION__, nMu);\r
- }\r
-\r
- return 0;\r
-}\r
-\r
-uint32_t app_xran_get_scs(uint8_t nMu)\r
-{\r
- if (nMu <= 3)\r
- {\r
- return nSubCarrierSpacing[nMu];\r
- }\r
- else\r
- {\r
- printf("ERROR: %s Mu[%d] is not valid\n",__FUNCTION__, nMu);\r
- }\r
-\r
- return 0;\r
-}\r
-\r
-\r
-\r
-\r
-//-------------------------------------------------------------------------------------------\r
-/** @ingroup group_nr5g_source_phy_common\r
- *\r
- * @param[in] nNumerology - Numerology determine sub carrier spacing, Value: 0->4 0: 15khz, 1: 30khz, 2: 60khz 3: 120khz, 4: 240khz\r
- * @param[in] nBandwidth - Carrier bandwidth for in MHz. Value: 5->400\r
- * @param[in] nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
- *\r
- * @return Number of RBs in cell\r
- *\r
- * @description\r
- * Returns number of RBs based on 38.101-1 and 38.101-2 for the cell\r
- *\r
-**/\r
-//-------------------------------------------------------------------------------------------\r
-uint16_t app_xran_get_num_rbs(uint32_t nNumerology, uint32_t nBandwidth, uint32_t nAbsFrePointA)\r
-{\r
- uint32_t error = 1;\r
- uint16_t numRBs = 0;\r
-\r
- if (nAbsFrePointA <= 6000000)\r
- {\r
- // F1 Tables 38.101-1 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB\r
- if (nNumerology < 3)\r
- {\r
- switch(nBandwidth)\r
- {\r
- case PHY_BW_5_0_MHZ:\r
- numRBs = nNumRbsPerSymF1[nNumerology][0];\r
- error = 0;\r
- break;\r
- case PHY_BW_10_0_MHZ:\r
- numRBs = nNumRbsPerSymF1[nNumerology][1];\r
- error = 0;\r
- break;\r
- case PHY_BW_15_0_MHZ:\r
- numRBs = nNumRbsPerSymF1[nNumerology][2];\r
- error = 0;\r
- break;\r
- case PHY_BW_20_0_MHZ:\r
- numRBs = nNumRbsPerSymF1[nNumerology][3];\r
- error = 0;\r
- break;\r
- case PHY_BW_25_0_MHZ:\r
- numRBs = nNumRbsPerSymF1[nNumerology][4];\r
- error = 0;\r
- break;\r
- case PHY_BW_30_0_MHZ:\r
- numRBs = nNumRbsPerSymF1[nNumerology][5];\r
- error = 0;\r
- break;\r
- case PHY_BW_40_0_MHZ:\r
- numRBs = nNumRbsPerSymF1[nNumerology][6];\r
- error = 0;\r
- break;\r
- case PHY_BW_50_0_MHZ:\r
- numRBs = nNumRbsPerSymF1[nNumerology][7];\r
- error = 0;\r
- break;\r
- case PHY_BW_60_0_MHZ:\r
- numRBs = nNumRbsPerSymF1[nNumerology][8];\r
- error = 0;\r
- break;\r
- case PHY_BW_70_0_MHZ:\r
- numRBs = nNumRbsPerSymF1[nNumerology][9];\r
- error = 0;\r
- break;\r
- case PHY_BW_80_0_MHZ:\r
- numRBs = nNumRbsPerSymF1[nNumerology][10];\r
- error = 0;\r
- break;\r
- case PHY_BW_90_0_MHZ:\r
- numRBs = nNumRbsPerSymF1[nNumerology][11];\r
- error = 0;\r
- break;\r
- case PHY_BW_100_0_MHZ:\r
- numRBs = nNumRbsPerSymF1[nNumerology][12];\r
- error = 0;\r
- break;\r
- default:\r
- error = 1;\r
- break;\r
- }\r
- }\r
- }\r
- else\r
- {\r
- if ((nNumerology >= 2) && (nNumerology <= 3))\r
- {\r
- // F2 Tables 38.101-2 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB\r
- switch(nBandwidth)\r
- {\r
- case PHY_BW_50_0_MHZ:\r
- numRBs = nNumRbsPerSymF2[nNumerology-2][0];\r
- error = 0;\r
- break;\r
- case PHY_BW_100_0_MHZ:\r
- numRBs = nNumRbsPerSymF2[nNumerology-2][1];\r
- error = 0;\r
- break;\r
- case PHY_BW_200_0_MHZ:\r
- numRBs = nNumRbsPerSymF2[nNumerology-2][2];\r
- error = 0;\r
- break;\r
- case PHY_BW_400_0_MHZ:\r
- numRBs = nNumRbsPerSymF2[nNumerology-2][3];\r
- error = 0;\r
- break;\r
- default:\r
- error = 1;\r
- break;\r
- }\r
- }\r
- }\r
-\r
-\r
- if (error)\r
- {\r
- printf("ERROR: %s: nNumerology[%d] nBandwidth[%d] nAbsFrePointA[%d]\n",__FUNCTION__, nNumerology, nBandwidth, nAbsFrePointA);\r
- }\r
- else\r
- {\r
- printf("%s: nNumerology[%d] nBandwidth[%d] nAbsFrePointA[%d] numRBs[%d]\n",__FUNCTION__, nNumerology, nBandwidth, nAbsFrePointA, numRBs);\r
- }\r
-\r
- return numRBs;\r
-}\r
-\r
-//-------------------------------------------------------------------------------------------\r
-/** @ingroup phy_cal_nrarfcn\r
- *\r
- * @param[in] center frequency\r
- *\r
- * @return NR-ARFCN\r
- *\r
- * @description\r
- * This calculates NR-ARFCN value according to center frequency\r
- *\r
-**/\r
-//-------------------------------------------------------------------------------------------\r
-uint32_t app_xran_cal_nrarfcn(uint32_t nCenterFreq)\r
-{\r
- uint32_t nDeltaFglobal,nFoffs,nNoffs;\r
- uint32_t nNRARFCN = 0;\r
-\r
- if(nCenterFreq > 0 && nCenterFreq < 3000*1000)\r
- {\r
- nDeltaFglobal = 5;\r
- nFoffs = 0;\r
- nNoffs = 0;\r
- }\r
- else if(nCenterFreq >= 3000*1000 && nCenterFreq < 24250*1000)\r
- {\r
- nDeltaFglobal = 15;\r
- nFoffs = 3000*1000;\r
- nNoffs = 600000;\r
- }\r
- else if(nCenterFreq >= 24250*1000 && nCenterFreq <= 100000*1000)\r
- {\r
- nDeltaFglobal = 60;\r
- nFoffs = 24250080;\r
- nNoffs = 2016667;\r
- }\r
- else\r
- {\r
- printf("@@@@ incorrect center frerquency %d\n",nCenterFreq);\r
- return (0);\r
- }\r
-\r
- nNRARFCN = ((nCenterFreq - nFoffs)/nDeltaFglobal) + nNoffs;\r
-\r
- printf("%s: nCenterFreq[%d] nDeltaFglobal[%d] nFoffs[%d] nNoffs[%d] nNRARFCN[%d]\n", __FUNCTION__, nCenterFreq, nDeltaFglobal, nFoffs, nNoffs, nNRARFCN);\r
- return (nNRARFCN);\r
-}\r
-\r
-int32_t app_xran_slot_limit(int32_t nSfIdx)\r
-{\r
- while (nSfIdx < 0) {\r
- nSfIdx += gMaxSlotNum;\r
- }\r
-\r
- while (nSfIdx >= gMaxSlotNum) {\r
- nSfIdx -= gMaxSlotNum;\r
- }\r
-\r
- return nSfIdx;\r
-}\r
-\r
-void app_xran_clear_slot_type(uint32_t nPhyInstanceId)\r
-{\r
- g_UlRate[nPhyInstanceId] = 0.0;\r
- g_DlRate[nPhyInstanceId] = 0.0;\r
- g_NumSlotTDDLoop[nPhyInstanceId] = 1;\r
-}\r
-\r
-int32_t app_xran_set_slot_type(uint32_t nPhyInstanceId, uint32_t nFrameDuplexType, uint32_t nTddPeriod, struct xran_slot_config *psSlotConfig)\r
-{\r
- uint32_t nSlotNum, nSymNum, nVal, i;\r
- uint32_t numDlSym, numUlSym, numGuardSym;\r
- uint32_t numDlSlots = 0, numUlSlots = 0, numSpDlSlots = 0, numSpUlSlots = 0, numSpSlots = 0;\r
- char sSlotPattern[XRAN_SLOT_TYPE_LAST][10] = {"IN\0", "DL\0", "UL\0", "SP\0", "FD\0"};\r
-\r
- // nPhyInstanceId Carrier ID\r
- // nFrameDuplexType 0 = FDD 1 = TDD\r
- // nTddPeriod Tdd Periodicity\r
- // psSlotConfig[80] Slot Config Structure for nTddPeriod Slots\r
-\r
- g_UlRate[nPhyInstanceId] = 0.0;\r
- g_DlRate[nPhyInstanceId] = 0.0;\r
- g_NumSlotTDDLoop[nPhyInstanceId] = nTddPeriod;\r
-\r
- for (i = 0; i < XRAN_NUM_OF_SLOT_IN_TDD_LOOP; i++)\r
- {\r
- g_SlotType[nPhyInstanceId][i] = XRAN_SLOT_TYPE_INVALID;\r
- g_NumDLSymSp[nPhyInstanceId][i] = 0;\r
- g_NumULSymSp[nPhyInstanceId][i] = 0;\r
- }\r
-\r
- if (nFrameDuplexType == XRAN_FDD)\r
- {\r
- for (i = 0; i < XRAN_NUM_OF_SLOT_IN_TDD_LOOP; i++)\r
- {\r
- g_SlotType[nPhyInstanceId][i] = XRAN_SLOT_TYPE_FDD;\r
- }\r
- g_NumSlotTDDLoop[nPhyInstanceId] = 1;\r
- g_DlRate[nPhyInstanceId] = 1.0;\r
- g_UlRate[nPhyInstanceId] = 1.0;\r
- }\r
- else\r
- {\r
- for (nSlotNum = 0; nSlotNum < nTddPeriod; nSlotNum++)\r
- {\r
- numDlSym = 0;\r
- numUlSym = 0;\r
- numGuardSym = 0;\r
- for (nSymNum = 0; nSymNum < XRAN_NUM_OF_SYMBOL_PER_SLOT; nSymNum++)\r
- {\r
- switch(psSlotConfig[nSlotNum].nSymbolType[nSymNum])\r
- {\r
- case XRAN_SYMBOL_TYPE_DL:\r
- numDlSym++;\r
- break;\r
- case XRAN_SYMBOL_TYPE_GUARD:\r
- numGuardSym++;\r
- break;\r
- default:\r
- numUlSym++;\r
- break;\r
- }\r
- }\r
-\r
- // printf("nSlotNum[%d] : numDlSym[%d] numGuardSym[%d] numUlSym[%d]\n", nSlotNum, numDlSym, numGuardSym, numUlSym);\r
-\r
- if ((numUlSym == 0) && (numGuardSym == 0))\r
- {\r
- g_SlotType[nPhyInstanceId][nSlotNum] = XRAN_SLOT_TYPE_DL;\r
- numDlSlots++;\r
- }\r
- else if ((numDlSym == 0) && (numGuardSym == 0))\r
- {\r
- g_SlotType[nPhyInstanceId][nSlotNum] = XRAN_SLOT_TYPE_UL;\r
- numUlSlots++;\r
- }\r
- else\r
- {\r
- g_SlotType[nPhyInstanceId][nSlotNum] = XRAN_SLOT_TYPE_SP;\r
- numSpSlots++;\r
-\r
- if (numDlSym)\r
- {\r
- numSpDlSlots++;\r
- g_NumDLSymSp[nPhyInstanceId][nSlotNum] = numDlSym;\r
- }\r
- if (numUlSym)\r
- {\r
- numSpUlSlots++;\r
- g_NumULSymSp[nPhyInstanceId][nSlotNum] = numUlSym;\r
- }\r
- }\r
-\r
- // printf(" numDlSlots[%d] numUlSlots[%d] numSpSlots[%d] numSpDlSlots[%d] numSpUlSlots[%d]\n", numDlSlots, numUlSlots, numSpSlots, numSpDlSlots, numSpUlSlots);\r
- }\r
-\r
- g_DlRate[nPhyInstanceId] = (float)(numDlSlots + numSpDlSlots) / (float)nTddPeriod;\r
- g_UlRate[nPhyInstanceId] = (float)(numUlSlots + numSpUlSlots) / (float)nTddPeriod;\r
- }\r
-\r
- printf("set_slot_type: nPhyInstanceId[%d] nFrameDuplexType[%d], nTddPeriod[%d]\n",\r
- nPhyInstanceId, nFrameDuplexType, nTddPeriod);\r
-\r
- printf("DLRate[%f] ULRate[%f]\n", g_DlRate[nPhyInstanceId], g_UlRate[nPhyInstanceId]);\r
-\r
- nVal = (g_NumSlotTDDLoop[nPhyInstanceId] < 10) ? g_NumSlotTDDLoop[nPhyInstanceId] : 10;\r
-\r
- printf("SlotPattern:\n");\r
- printf("Slot: ");\r
- for (nSlotNum = 0; nSlotNum < nVal; nSlotNum++)\r
- {\r
- printf("%d ", nSlotNum);\r
- }\r
- printf("\n");\r
-\r
- printf(" %3d ", 0);\r
- for (nSlotNum = 0, i = 0; nSlotNum < g_NumSlotTDDLoop[nPhyInstanceId]; nSlotNum++)\r
- {\r
- printf("%s ", sSlotPattern[g_SlotType[nPhyInstanceId][nSlotNum]]);\r
- i++;\r
- if ((i == 10) && ((nSlotNum+1) < g_NumSlotTDDLoop[nPhyInstanceId]))\r
- {\r
- printf("\n");\r
- printf(" %3d ", nSlotNum);\r
- i = 0;\r
- }\r
- }\r
- printf("\n\n");\r
-\r
- return 0;\r
-}\r
-\r
-int32_t app_xran_get_slot_type(int32_t nCellIdx, int32_t nSlotdx, int32_t nType)\r
-{\r
- int32_t nSfIdxMod, nSfType, ret = 0;\r
-\r
- nSfIdxMod = app_xran_slot_limit(nSlotdx) % ((g_NumSlotTDDLoop[nCellIdx] > 0) ? g_NumSlotTDDLoop[nCellIdx]: 1);\r
- nSfType = g_SlotType[nCellIdx][nSfIdxMod];\r
-\r
- if (nSfType == nType)\r
- {\r
- ret = 1;\r
- }\r
- else if (nSfType == XRAN_SLOT_TYPE_SP)\r
- {\r
- if ((nType == XRAN_SLOT_TYPE_DL) && g_NumDLSymSp[nCellIdx][nSfIdxMod])\r
- {\r
- ret = 1;\r
- }\r
-\r
- if ((nType == XRAN_SLOT_TYPE_UL) && g_NumULSymSp[nCellIdx][nSfIdxMod])\r
- {\r
- ret = 1;\r
- }\r
- }\r
- else if (nSfType == XRAN_SLOT_TYPE_FDD)\r
- {\r
- ret = 1;\r
- }\r
-\r
- return ret;\r
-}\r
-\r
-\r
-\r
-void sys_save_buf_to_file(char *filename, char *bufname, unsigned char *pBuffer, unsigned int size, unsigned int buffers_num)\r
-{\r
- if (size)\r
- {\r
- if (filename && bufname)\r
- {\r
- FILE *file;\r
- printf("Storing %s to file %s: ", bufname, filename);\r
- file = fopen(filename, "wb");\r
- if (file == NULL)\r
- {\r
- printf("can't open file %s!!!", filename);\r
- }\r
- else\r
- {\r
- uint32_t num;\r
- num = fwrite(pBuffer, buffers_num, size, file);\r
- fflush(file);\r
- fclose(file);\r
- printf("from addr (0x%lx) size (%d) bytes num (%d)", (uint64_t)pBuffer, size, num);\r
- }\r
- printf(" \n");\r
- }\r
- else\r
- {\r
- printf(" the file name, buffer name are not set!!!");\r
- }\r
- }\r
- else\r
- {\r
- printf(" the %s is free: size = %d bytes!!!", bufname, size);\r
- }\r
-}\r
-\r
-int sys_load_file_to_buff(char *filename, char *bufname, unsigned char *pBuffer, unsigned int size, unsigned int buffers_num)\r
-{\r
- unsigned int file_size = 0;\r
- int num= 0;\r
-\r
- if (size)\r
- {\r
- if (filename && bufname)\r
- {\r
- FILE *file;\r
- printf("Loading file %s to %s: ", filename, bufname);\r
- file = fopen(filename, "rb");\r
-\r
-\r
- if (file == NULL)\r
- {\r
- printf("can't open file %s!!!", filename);\r
- exit(-1);\r
- }\r
- else\r
- {\r
- fseek(file, 0, SEEK_END);\r
- file_size = ftell(file);\r
- fseek(file, 0, SEEK_SET);\r
-\r
- if ((file_size > size) || (file_size == 0))\r
- file_size = size;\r
-\r
- printf("Reading IQ samples from file: File Size: %d [Buffer Size: %d]\n", file_size, size);\r
-\r
- num = fread(pBuffer, buffers_num, size, file);\r
- fflush(file);\r
- fclose(file);\r
- printf("from addr (0x%lx) size (%d) bytes num (%d)", (uint64_t)pBuffer, file_size, num);\r
- }\r
- printf(" \n");\r
-\r
- }\r
- else\r
- {\r
- printf(" the file name, buffer name are not set!!!");\r
- }\r
- }\r
- else\r
- {\r
- printf(" the %s is free: size = %d bytes!!!", bufname, size);\r
- }\r
- return num;\r
-}\r
-\r
-\r
-void sys_save_buf_to_file_txt(char *filename, char *bufname, unsigned char *pBuffer, unsigned int size, unsigned int buffers_num)\r
-{\r
- unsigned int i;\r
- int ret = 0;\r
- if (pBuffer == NULL)\r
- return;\r
-\r
- if (size)\r
- {\r
- if (filename && bufname)\r
- {\r
- FILE *file;\r
- printf("Storing %s to file %s: ", bufname, filename);\r
- file = fopen(filename, "w");\r
- if (file == NULL)\r
- {\r
- printf("can't open file %s!!!", filename);\r
- exit(-1);\r
- }\r
- else\r
- {\r
- uint32_t num = 0;\r
-\r
- signed short *ptr = (signed short*)pBuffer;\r
- for (i = 0; i < (size/((unsigned int)sizeof(signed short) /** 2 * 2 * 2*/)); i = i + 2)\r
- {\r
-#ifndef CSCOPE_DEBUG\r
- ret = fprintf(file,"%d %d\n", ptr[i], ptr[i + 1]);\r
-#else\r
- ret = fprintf(file,"%d %d ", ptr[i], ptr[i + 1]);\r
- /* I data => Ramp data, from 1 to 792.\r
- Q data => Contains time information of the current symbol:\r
- Bits [15:14] = Antenna-ID\r
- Bits [13:12] = \9300\94\r
- Bits [11:8] = Subframe-ID\r
- Bits [7:4] = Slot-ID\r
- Bits [3:0] = Symbol-ID */\r
- fprintf(file, "0x%04x: ant %d Subframe-ID %d Slot-ID %d Symbol-ID %d\n",\r
- ptr[i + 1], (ptr[i + 1]>>14) & 0x3, (ptr[i + 1]>>8) & 0xF, (ptr[i + 1]>>4) & 0xF, (ptr[i + 1]>>0) & 0xF);\r
-#endif\r
- if (ret < 0)\r
- {\r
- printf("fprintf %d\n", ret);\r
- fclose(file);\r
- break;\r
- }\r
- num++;\r
- }\r
- fflush(file);\r
- fclose(file);\r
- printf("from addr (0x%lx) size (%d) IQ num (%d)", (uint64_t)pBuffer, size, num);\r
- }\r
- printf(" \n");\r
- }\r
- else\r
- {\r
- printf(" the file name, buffer name are not set!!!");\r
- }\r
- }\r
- else\r
- {\r
- printf(" the %s is free: size = %d bytes!!!", bufname, size);\r
- }\r
-}\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+#include <assert.h>
+#include <err.h>
+#include <arpa/inet.h>
+#include <sys/time.h>
+#include <time.h>
+
+#include "common.h"
+#include "xran_fh_o_du.h"
+#include "xran_pkt.h"
+#include "xran_pkt_up.h"
+#include "xran_cp_api.h"
+#include "xran_up_api.h"
+
+#include "xran_mlog_lnx.h"
+
+extern enum app_state state;
+
+int iq_playback_buffer_size_dl = IQ_PLAYBACK_BUFFER_BYTES;
+int iq_playback_buffer_size_ul = IQ_PLAYBACK_BUFFER_BYTES;
+
+int iq_bfw_buffer_size_dl = IQ_PLAYBACK_BUFFER_BYTES;
+int iq_bfw_buffer_size_ul = IQ_PLAYBACK_BUFFER_BYTES;
+
+int iq_srs_buffer_size_ul = IQ_PLAYBACK_BUFFER_BYTES;
+
+uint8_t numCCPorts = 1;
+/* Number of antennas supported by front-end */
+
+uint8_t num_eAxc = 4;
+/* Number of CPRI ports supported by front-end */
+
+int16_t *p_tx_play_buffer[MAX_ANT_CARRIER_SUPPORTED];
+int32_t tx_play_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
+int32_t tx_play_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
+
+int16_t *p_tx_prach_play_buffer[MAX_ANT_CARRIER_SUPPORTED];
+int32_t tx_prach_play_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
+int32_t tx_prach_play_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
+
+int16_t *p_tx_srs_play_buffer[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];
+int32_t tx_srs_play_buffer_size[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];
+int32_t tx_srs_play_buffer_position[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];
+
+int16_t *p_rx_log_buffer[MAX_ANT_CARRIER_SUPPORTED];
+int32_t rx_log_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
+int32_t rx_log_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
+
+int16_t *p_prach_log_buffer[MAX_ANT_CARRIER_SUPPORTED];
+int32_t prach_log_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
+int32_t prach_log_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
+
+int16_t *p_srs_log_buffer[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];
+int32_t srs_log_buffer_size[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];
+int32_t srs_log_buffer_position[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];
+
+int16_t *p_tx_buffer[MAX_ANT_CARRIER_SUPPORTED];
+int32_t tx_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
+
+int16_t *p_rx_buffer[MAX_ANT_CARRIER_SUPPORTED];
+int32_t rx_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
+
+/* beamforming weights for UL (O-DU) */
+int16_t *p_tx_dl_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];
+int32_t tx_dl_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
+int32_t tx_dl_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
+
+/* beamforming weights for UL (O-DU) */
+int16_t *p_tx_ul_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];
+int32_t tx_ul_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
+int32_t tx_ul_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
+
+/* beamforming weights for UL (O-RU) */
+int16_t *p_rx_dl_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];
+int32_t rx_dl_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
+int32_t rx_dl_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
+
+/* beamforming weights for UL (O-RU) */
+int16_t *p_rx_ul_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];
+int32_t rx_ul_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
+int32_t rx_ul_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
+
+// F1 Tables 38.101-1 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB
+uint16_t nNumRbsPerSymF1[3][13] =
+{
+ // 5MHz 10MHz 15MHz 20 MHz 25 MHz 30 MHz 40 MHz 50MHz 60 MHz 70 MHz 80 MHz 90 MHz 100 MHz
+ {25, 52, 79, 106, 133, 160, 216, 270, 0, 0, 0, 0, 0}, // Numerology 0 (15KHz)
+ {11, 24, 38, 51, 65, 78, 106, 133, 162, 0, 217, 245, 273}, // Numerology 1 (30KHz)
+ {0, 11, 18, 24, 31, 38, 51, 65, 79, 0, 107, 121, 135} // Numerology 2 (60KHz)
+};
+
+// F2 Tables 38.101-2 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB
+uint16_t nNumRbsPerSymF2[2][4] =
+{
+ // 50Mhz 100MHz 200MHz 400MHz
+ {66, 132, 264, 0}, // Numerology 2 (60KHz)
+ {32, 66, 132, 264} // Numerology 3 (120KHz)
+};
+
+// 38.211 - Table 4.2.1
+uint16_t nSubCarrierSpacing[5] =
+{
+ 15, // mu = 0
+ 30, // mu = 1
+ 60, // mu = 2
+ 120, // mu = 3
+ 240 // mu = 4
+};
+
+// TTI interval in us (slot duration)
+uint16_t nTtiInterval[4] =
+{
+ 1000, // mu = 0
+ 500, // mu = 1
+ 250, // mu = 2
+ 125, // mu = 3
+};
+
+
+// F1 Tables 38.101-1 Table F.5.3. Window length for normal CP
+uint16_t nCpSizeF1[3][13][2] =
+{
+ // 5MHz 10MHz 15MHz 20 MHz 25 MHz 30 MHz 40 MHz 50MHz 60 MHz 70 MHz 80 MHz 90 MHz 100 MHz
+ {{40, 36}, {80, 72}, {120, 108}, {160, 144}, {160, 144}, {240, 216}, {320, 288}, {320, 288}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}}, // Numerology 0 (15KHz)
+ {{22, 18}, {44, 36}, {66, 54}, {88, 72}, {88, 72}, {132, 108}, {176, 144}, {176, 144}, {264, 216}, {264, 216}, {352, 288}, {352, 288}, {352, 288}}, // Numerology 1 (30KHz)
+ { {0, 0}, {26, 18}, {39, 27}, {52, 36}, {52, 36}, {78, 54}, {104, 72}, {104, 72}, {156, 108}, {156, 108}, {208, 144}, {208, 144}, {208, 144}}, // Numerology 2 (60KHz)
+};
+
+// F2 Tables 38.101-2 Table F.5.3. Window length for normal CP
+int16_t nCpSizeF2[2][4][2] =
+{
+ // 50Mhz 100MHz 200MHz 400MHz
+ { {0, 0}, {104, 72}, {208, 144}, {416, 288}}, // Numerology 2 (60KHz)
+ {{68, 36}, {136, 72}, {272, 144}, {544, 288}}, // Numerology 3 (120KHz)
+};
+
+uint32_t gMaxSlotNum;
+uint32_t gNumDLCtx;
+uint32_t gNumULCtx;
+uint32_t gDLResetAdvance;
+uint32_t gDLProcAdvance;
+uint32_t gULProcAdvance;
+
+static uint16_t g_NumSlotTDDLoop[XRAN_MAX_SECTOR_NR] = { XRAN_NUM_OF_SLOT_IN_TDD_LOOP };
+static uint16_t g_NumDLSymSp[XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SLOT_IN_TDD_LOOP] = {0};
+static uint16_t g_NumULSymSp[XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SLOT_IN_TDD_LOOP] = {0};
+static uint8_t g_SlotType[XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SLOT_IN_TDD_LOOP] = {{XRAN_SLOT_TYPE_INVALID}};
+float g_UlRate[XRAN_MAX_SECTOR_NR] = {0.0};
+float g_DlRate[XRAN_MAX_SECTOR_NR] = {0.0};
+
+uint32_t app_xran_get_tti_interval(uint8_t nMu)
+{
+ if (nMu < 4)
+ {
+ return nTtiInterval[nMu];
+ }
+ else
+ {
+ printf("ERROR: %s Mu[%d] is not valid\n",__FUNCTION__, nMu);
+ }
+
+ return 0;
+}
+
+uint32_t app_xran_get_scs(uint8_t nMu)
+{
+ if (nMu <= 3)
+ {
+ return nSubCarrierSpacing[nMu];
+ }
+ else
+ {
+ printf("ERROR: %s Mu[%d] is not valid\n",__FUNCTION__, nMu);
+ }
+
+ return 0;
+}
+
+
+
+
+//-------------------------------------------------------------------------------------------
+/** @ingroup group_nr5g_source_phy_common
+ *
+ * @param[in] nNumerology - Numerology determine sub carrier spacing, Value: 0->4 0: 15khz, 1: 30khz, 2: 60khz 3: 120khz, 4: 240khz
+ * @param[in] nBandwidth - Carrier bandwidth for in MHz. Value: 5->400
+ * @param[in] nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+ *
+ * @return Number of RBs in cell
+ *
+ * @description
+ * Returns number of RBs based on 38.101-1 and 38.101-2 for the cell
+ *
+**/
+//-------------------------------------------------------------------------------------------
+uint16_t app_xran_get_num_rbs(uint32_t nNumerology, uint32_t nBandwidth, uint32_t nAbsFrePointA)
+{
+ uint32_t error = 1;
+ uint16_t numRBs = 0;
+
+ if (nAbsFrePointA <= 6000000)
+ {
+ // F1 Tables 38.101-1 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB
+ if (nNumerology < 3)
+ {
+ switch(nBandwidth)
+ {
+ case PHY_BW_5_0_MHZ:
+ numRBs = nNumRbsPerSymF1[nNumerology][0];
+ error = 0;
+ break;
+ case PHY_BW_10_0_MHZ:
+ numRBs = nNumRbsPerSymF1[nNumerology][1];
+ error = 0;
+ break;
+ case PHY_BW_15_0_MHZ:
+ numRBs = nNumRbsPerSymF1[nNumerology][2];
+ error = 0;
+ break;
+ case PHY_BW_20_0_MHZ:
+ numRBs = nNumRbsPerSymF1[nNumerology][3];
+ error = 0;
+ break;
+ case PHY_BW_25_0_MHZ:
+ numRBs = nNumRbsPerSymF1[nNumerology][4];
+ error = 0;
+ break;
+ case PHY_BW_30_0_MHZ:
+ numRBs = nNumRbsPerSymF1[nNumerology][5];
+ error = 0;
+ break;
+ case PHY_BW_40_0_MHZ:
+ numRBs = nNumRbsPerSymF1[nNumerology][6];
+ error = 0;
+ break;
+ case PHY_BW_50_0_MHZ:
+ numRBs = nNumRbsPerSymF1[nNumerology][7];
+ error = 0;
+ break;
+ case PHY_BW_60_0_MHZ:
+ numRBs = nNumRbsPerSymF1[nNumerology][8];
+ error = 0;
+ break;
+ case PHY_BW_70_0_MHZ:
+ numRBs = nNumRbsPerSymF1[nNumerology][9];
+ error = 0;
+ break;
+ case PHY_BW_80_0_MHZ:
+ numRBs = nNumRbsPerSymF1[nNumerology][10];
+ error = 0;
+ break;
+ case PHY_BW_90_0_MHZ:
+ numRBs = nNumRbsPerSymF1[nNumerology][11];
+ error = 0;
+ break;
+ case PHY_BW_100_0_MHZ:
+ numRBs = nNumRbsPerSymF1[nNumerology][12];
+ error = 0;
+ break;
+ default:
+ error = 1;
+ break;
+ }
+ }
+ }
+ else
+ {
+ if ((nNumerology >= 2) && (nNumerology <= 3))
+ {
+ // F2 Tables 38.101-2 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB
+ switch(nBandwidth)
+ {
+ case PHY_BW_50_0_MHZ:
+ numRBs = nNumRbsPerSymF2[nNumerology-2][0];
+ error = 0;
+ break;
+ case PHY_BW_100_0_MHZ:
+ numRBs = nNumRbsPerSymF2[nNumerology-2][1];
+ error = 0;
+ break;
+ case PHY_BW_200_0_MHZ:
+ numRBs = nNumRbsPerSymF2[nNumerology-2][2];
+ error = 0;
+ break;
+ case PHY_BW_400_0_MHZ:
+ numRBs = nNumRbsPerSymF2[nNumerology-2][3];
+ error = 0;
+ break;
+ default:
+ error = 1;
+ break;
+ }
+ }
+ }
+
+
+ if (error)
+ {
+ printf("ERROR: %s: nNumerology[%d] nBandwidth[%d] nAbsFrePointA[%d]\n",__FUNCTION__, nNumerology, nBandwidth, nAbsFrePointA);
+ }
+ else
+ {
+ printf("%s: nNumerology[%d] nBandwidth[%d] nAbsFrePointA[%d] numRBs[%d]\n",__FUNCTION__, nNumerology, nBandwidth, nAbsFrePointA, numRBs);
+ }
+
+ return numRBs;
+}
+
+//-------------------------------------------------------------------------------------------
+/** @ingroup phy_cal_nrarfcn
+ *
+ * @param[in] center frequency
+ *
+ * @return NR-ARFCN
+ *
+ * @description
+ * This calculates NR-ARFCN value according to center frequency
+ *
+**/
+//-------------------------------------------------------------------------------------------
+uint32_t app_xran_cal_nrarfcn(uint32_t nCenterFreq)
+{
+ uint32_t nDeltaFglobal,nFoffs,nNoffs;
+ uint32_t nNRARFCN = 0;
+
+ if(nCenterFreq > 0 && nCenterFreq < 3000*1000)
+ {
+ nDeltaFglobal = 5;
+ nFoffs = 0;
+ nNoffs = 0;
+ }
+ else if(nCenterFreq >= 3000*1000 && nCenterFreq < 24250*1000)
+ {
+ nDeltaFglobal = 15;
+ nFoffs = 3000*1000;
+ nNoffs = 600000;
+ }
+ else if(nCenterFreq >= 24250*1000 && nCenterFreq <= 100000*1000)
+ {
+ nDeltaFglobal = 60;
+ nFoffs = 24250080;
+ nNoffs = 2016667;
+ }
+ else
+ {
+ printf("@@@@ incorrect center frerquency %d\n",nCenterFreq);
+ return (0);
+ }
+
+ nNRARFCN = ((nCenterFreq - nFoffs)/nDeltaFglobal) + nNoffs;
+
+ printf("%s: nCenterFreq[%d] nDeltaFglobal[%d] nFoffs[%d] nNoffs[%d] nNRARFCN[%d]\n", __FUNCTION__, nCenterFreq, nDeltaFglobal, nFoffs, nNoffs, nNRARFCN);
+ return (nNRARFCN);
+}
+
+int32_t app_xran_slot_limit(int32_t nSfIdx)
+{
+ while (nSfIdx < 0) {
+ nSfIdx += gMaxSlotNum;
+ }
+
+ while (nSfIdx >= gMaxSlotNum) {
+ nSfIdx -= gMaxSlotNum;
+ }
+
+ return nSfIdx;
+}
+
+void app_xran_clear_slot_type(uint32_t nPhyInstanceId)
+{
+ g_UlRate[nPhyInstanceId] = 0.0;
+ g_DlRate[nPhyInstanceId] = 0.0;
+ g_NumSlotTDDLoop[nPhyInstanceId] = 1;
+}
+
+int32_t app_xran_set_slot_type(uint32_t nPhyInstanceId, uint32_t nFrameDuplexType, uint32_t nTddPeriod, struct xran_slot_config *psSlotConfig)
+{
+ uint32_t nSlotNum, nSymNum, nVal, i;
+ uint32_t numDlSym, numUlSym, numGuardSym;
+ uint32_t numDlSlots = 0, numUlSlots = 0, numSpDlSlots = 0, numSpUlSlots = 0, numSpSlots = 0;
+ char sSlotPattern[XRAN_SLOT_TYPE_LAST][10] = {"IN\0", "DL\0", "UL\0", "SP\0", "FD\0"};
+
+ // nPhyInstanceId Carrier ID
+ // nFrameDuplexType 0 = FDD 1 = TDD
+ // nTddPeriod Tdd Periodicity
+ // psSlotConfig[80] Slot Config Structure for nTddPeriod Slots
+
+ g_UlRate[nPhyInstanceId] = 0.0;
+ g_DlRate[nPhyInstanceId] = 0.0;
+ g_NumSlotTDDLoop[nPhyInstanceId] = nTddPeriod;
+
+ for (i = 0; i < XRAN_NUM_OF_SLOT_IN_TDD_LOOP; i++)
+ {
+ g_SlotType[nPhyInstanceId][i] = XRAN_SLOT_TYPE_INVALID;
+ g_NumDLSymSp[nPhyInstanceId][i] = 0;
+ g_NumULSymSp[nPhyInstanceId][i] = 0;
+ }
+
+ if (nFrameDuplexType == XRAN_FDD)
+ {
+ for (i = 0; i < XRAN_NUM_OF_SLOT_IN_TDD_LOOP; i++)
+ {
+ g_SlotType[nPhyInstanceId][i] = XRAN_SLOT_TYPE_FDD;
+ }
+ g_NumSlotTDDLoop[nPhyInstanceId] = 1;
+ g_DlRate[nPhyInstanceId] = 1.0;
+ g_UlRate[nPhyInstanceId] = 1.0;
+ }
+ else
+ {
+ for (nSlotNum = 0; nSlotNum < nTddPeriod; nSlotNum++)
+ {
+ numDlSym = 0;
+ numUlSym = 0;
+ numGuardSym = 0;
+ for (nSymNum = 0; nSymNum < XRAN_NUM_OF_SYMBOL_PER_SLOT; nSymNum++)
+ {
+ switch(psSlotConfig[nSlotNum].nSymbolType[nSymNum])
+ {
+ case XRAN_SYMBOL_TYPE_DL:
+ numDlSym++;
+ break;
+ case XRAN_SYMBOL_TYPE_GUARD:
+ numGuardSym++;
+ break;
+ default:
+ numUlSym++;
+ break;
+ }
+ }
+
+ // printf("nSlotNum[%d] : numDlSym[%d] numGuardSym[%d] numUlSym[%d]\n", nSlotNum, numDlSym, numGuardSym, numUlSym);
+
+ if ((numUlSym == 0) && (numGuardSym == 0))
+ {
+ g_SlotType[nPhyInstanceId][nSlotNum] = XRAN_SLOT_TYPE_DL;
+ numDlSlots++;
+ }
+ else if ((numDlSym == 0) && (numGuardSym == 0))
+ {
+ g_SlotType[nPhyInstanceId][nSlotNum] = XRAN_SLOT_TYPE_UL;
+ numUlSlots++;
+ }
+ else
+ {
+ g_SlotType[nPhyInstanceId][nSlotNum] = XRAN_SLOT_TYPE_SP;
+ numSpSlots++;
+
+ if (numDlSym)
+ {
+ numSpDlSlots++;
+ g_NumDLSymSp[nPhyInstanceId][nSlotNum] = numDlSym;
+ }
+ if (numUlSym)
+ {
+ numSpUlSlots++;
+ g_NumULSymSp[nPhyInstanceId][nSlotNum] = numUlSym;
+ }
+ }
+
+ // printf(" numDlSlots[%d] numUlSlots[%d] numSpSlots[%d] numSpDlSlots[%d] numSpUlSlots[%d]\n", numDlSlots, numUlSlots, numSpSlots, numSpDlSlots, numSpUlSlots);
+ }
+
+ g_DlRate[nPhyInstanceId] = (float)(numDlSlots + numSpDlSlots) / (float)nTddPeriod;
+ g_UlRate[nPhyInstanceId] = (float)(numUlSlots + numSpUlSlots) / (float)nTddPeriod;
+ }
+
+ printf("set_slot_type: nPhyInstanceId[%d] nFrameDuplexType[%d], nTddPeriod[%d]\n",
+ nPhyInstanceId, nFrameDuplexType, nTddPeriod);
+
+ printf("DLRate[%f] ULRate[%f]\n", g_DlRate[nPhyInstanceId], g_UlRate[nPhyInstanceId]);
+
+ nVal = (g_NumSlotTDDLoop[nPhyInstanceId] < 10) ? g_NumSlotTDDLoop[nPhyInstanceId] : 10;
+
+ printf("SlotPattern:\n");
+ printf("Slot: ");
+ for (nSlotNum = 0; nSlotNum < nVal; nSlotNum++)
+ {
+ printf("%d ", nSlotNum);
+ }
+ printf("\n");
+
+ printf(" %3d ", 0);
+ for (nSlotNum = 0, i = 0; nSlotNum < g_NumSlotTDDLoop[nPhyInstanceId]; nSlotNum++)
+ {
+ printf("%s ", sSlotPattern[g_SlotType[nPhyInstanceId][nSlotNum]]);
+ i++;
+ if ((i == 10) && ((nSlotNum+1) < g_NumSlotTDDLoop[nPhyInstanceId]))
+ {
+ printf("\n");
+ printf(" %3d ", nSlotNum);
+ i = 0;
+ }
+ }
+ printf("\n\n");
+
+ return 0;
+}
+
+int32_t app_xran_get_slot_type(int32_t nCellIdx, int32_t nSlotdx, int32_t nType)
+{
+ int32_t nSfIdxMod, nSfType, ret = 0;
+
+ nSfIdxMod = app_xran_slot_limit(nSlotdx) % ((g_NumSlotTDDLoop[nCellIdx] > 0) ? g_NumSlotTDDLoop[nCellIdx]: 1);
+ nSfType = g_SlotType[nCellIdx][nSfIdxMod];
+
+ if (nSfType == nType)
+ {
+ ret = 1;
+ }
+ else if (nSfType == XRAN_SLOT_TYPE_SP)
+ {
+ if ((nType == XRAN_SLOT_TYPE_DL) && g_NumDLSymSp[nCellIdx][nSfIdxMod])
+ {
+ ret = 1;
+ }
+
+ if ((nType == XRAN_SLOT_TYPE_UL) && g_NumULSymSp[nCellIdx][nSfIdxMod])
+ {
+ ret = 1;
+ }
+ }
+ else if (nSfType == XRAN_SLOT_TYPE_FDD)
+ {
+ ret = 1;
+ }
+
+ return ret;
+}
+
+
+
+void sys_save_buf_to_file(char *filename, char *bufname, unsigned char *pBuffer, unsigned int size, unsigned int buffers_num)
+{
+ if (size)
+ {
+ if (filename && bufname)
+ {
+ FILE *file;
+ printf("Storing %s to file %s: ", bufname, filename);
+ file = fopen(filename, "wb");
+ if (file == NULL)
+ {
+ printf("can't open file %s!!!", filename);
+ }
+ else
+ {
+ uint32_t num;
+ num = fwrite(pBuffer, buffers_num, size, file);
+ fflush(file);
+ fclose(file);
+ printf("from addr (0x%lx) size (%d) bytes num (%d)", (uint64_t)pBuffer, size, num);
+ }
+ printf(" \n");
+ }
+ else
+ {
+ printf(" the file name, buffer name are not set!!!");
+ }
+ }
+ else
+ {
+ printf(" the %s is free: size = %d bytes!!!", bufname, size);
+ }
+}
+
+int sys_load_file_to_buff(char *filename, char *bufname, unsigned char *pBuffer, unsigned int size, unsigned int buffers_num)
+{
+ unsigned int file_size = 0;
+ int num= 0;
+
+ if (size)
+ {
+ if (filename && bufname)
+ {
+ FILE *file;
+ printf("Loading file %s to %s: ", filename, bufname);
+ file = fopen(filename, "rb");
+
+
+ if (file == NULL)
+ {
+ printf("can't open file %s!!!", filename);
+ exit(-1);
+ }
+ else
+ {
+ fseek(file, 0, SEEK_END);
+ file_size = ftell(file);
+ fseek(file, 0, SEEK_SET);
+
+ if ((file_size > size) || (file_size == 0))
+ file_size = size;
+
+ printf("Reading IQ samples from file: File Size: %d [Buffer Size: %d]\n", file_size, size);
+
+ num = fread(pBuffer, buffers_num, size, file);
+ fflush(file);
+ fclose(file);
+ printf("from addr (0x%lx) size (%d) bytes num (%d)", (uint64_t)pBuffer, file_size, num);
+ }
+ printf(" \n");
+
+ }
+ else
+ {
+ printf(" the file name, buffer name are not set!!!");
+ }
+ }
+ else
+ {
+ printf(" the %s is free: size = %d bytes!!!", bufname, size);
+ }
+ return num;
+}
+
+
+void sys_save_buf_to_file_txt(char *filename, char *bufname, unsigned char *pBuffer, unsigned int size, unsigned int buffers_num)
+{
+ unsigned int i;
+ int ret = 0;
+ if (pBuffer == NULL)
+ return;
+
+ if (size)
+ {
+ if (filename && bufname)
+ {
+ FILE *file;
+ printf("Storing %s to file %s: ", bufname, filename);
+ file = fopen(filename, "w");
+ if (file == NULL)
+ {
+ printf("can't open file %s!!!", filename);
+ exit(-1);
+ }
+ else
+ {
+ uint32_t num = 0;
+
+ signed short *ptr = (signed short*)pBuffer;
+ for (i = 0; i < (size/((unsigned int)sizeof(signed short) /** 2 * 2 * 2*/)); i = i + 2)
+ {
+#ifndef CSCOPE_DEBUG
+ ret = fprintf(file,"%d %d\n", ptr[i], ptr[i + 1]);
+#else
+ ret = fprintf(file,"%d %d ", ptr[i], ptr[i + 1]);
+ /* I data => Ramp data, from 1 to 792.
+ Q data => Contains time information of the current symbol:
+ Bits [15:14] = Antenna-ID
+ Bits [13:12] = \9300\94
+ Bits [11:8] = Subframe-ID
+ Bits [7:4] = Slot-ID
+ Bits [3:0] = Symbol-ID */
+ fprintf(file, "0x%04x: ant %d Subframe-ID %d Slot-ID %d Symbol-ID %d\n",
+ ptr[i + 1], (ptr[i + 1]>>14) & 0x3, (ptr[i + 1]>>8) & 0xF, (ptr[i + 1]>>4) & 0xF, (ptr[i + 1]>>0) & 0xF);
+#endif
+ if (ret < 0)
+ {
+ printf("fprintf %d\n", ret);
+ fclose(file);
+ break;
+ }
+ num++;
+ }
+ fflush(file);
+ fclose(file);
+ printf("from addr (0x%lx) size (%d) IQ num (%d)", (uint64_t)pBuffer, size, num);
+ }
+ printf(" \n");
+ }
+ else
+ {
+ printf(" the file name, buffer name are not set!!!");
+ }
+ }
+ else
+ {
+ printf(" the %s is free: size = %d bytes!!!", bufname, size);
+ }
+}
+
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-#ifndef _XRAN_APP_COMMON_H_\r
-#define _XRAN_APP_COMMON_H_\r
-\r
-#include <stdio.h>\r
-#include <unistd.h>\r
-\r
-#include "xran_fh_o_du.h"\r
-#include "xran_pkt_up.h"\r
-\r
-#include <rte_common.h>\r
-#include <rte_mbuf.h>\r
-\r
-#define VERSIONX "#DIRTY#"\r
-\r
-#define APP_O_DU 0\r
-#define APP_O_RU 1\r
-\r
-enum app_state\r
-{\r
- APP_RUNNING,\r
- APP_STOPPED\r
-};\r
-\r
-enum nRChBwOptions\r
-{\r
- PHY_BW_5_0_MHZ = 5, PHY_BW_10_0_MHZ = 10, PHY_BW_15_0_MHZ = 15, PHY_BW_20_0_MHZ = 20, PHY_BW_25_0_MHZ = 25,\r
- PHY_BW_30_0_MHZ = 30, PHY_BW_40_0_MHZ = 40, PHY_BW_50_0_MHZ = 50, PHY_BW_60_0_MHZ = 60, PHY_BW_70_0_MHZ = 70,\r
- PHY_BW_80_0_MHZ = 80, PHY_BW_90_0_MHZ = 90, PHY_BW_100_0_MHZ = 100, PHY_BW_200_0_MHZ = 200, PHY_BW_400_0_MHZ = 400\r
-};\r
-\r
-#define N_SC_PER_PRB 12\r
-#define N_SYM_PER_SLOT 14\r
-#define MAX_ANT_CARRIER_SUPPORTED (XRAN_MAX_SECTOR_NR*XRAN_MAX_ANTENNA_NR)\r
-#define MAX_ANT_CARRIER_SUPPORTED_CAT_B (XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR)\r
-\r
-#define SUBFRAME_DURATION_US 1000\r
-//#define SLOTNUM_PER_SUBFRAME 8\r
-\r
-#define SUBFRAMES_PER_SYSTEMFRAME 10\r
-#define IQ_PLAYBACK_BUFFER_BYTES (XRAN_NUM_OF_SLOT_IN_TDD_LOOP*N_SYM_PER_SLOT*XRAN_MAX_PRBS*N_SC_PER_PRB*4L)\r
-/* PRACH data samples are 32 bits wide, 16bits for I and 16bits for Q. Each packet contains 839 samples for long sequence or 144*14 (max) for short sequence. The payload length is 3356 octets.*/\r
-#define PRACH_PLAYBACK_BUFFER_BYTES (144*14*4L)\r
-\r
-#ifdef _DEBUG\r
-#define iAssert(p) if(!(p)){fprintf(stderr,\\r
- "Assertion failed: %s, file %s, line %d, val %d\n",\\r
- #p, __FILE__, __LINE__, p);exit(-1);}\r
-#else /* _DEBUG */\r
-#define iAssert(p)\r
-#endif /* _DEBUG */\r
-\r
-extern int iq_playback_buffer_size_dl;\r
-extern int iq_playback_buffer_size_ul;\r
-\r
-extern int iq_bfw_buffer_size_dl;\r
-extern int iq_bfw_buffer_size_ul;\r
-\r
-extern int iq_srs_buffer_size_ul;\r
-\r
-extern uint8_t numCCPorts;\r
-/* Number of antennas supported by front-end */\r
-\r
-extern uint8_t num_eAxc;\r
-/* Number of antennas supported by front-end */\r
-extern int16_t *p_tx_play_buffer[MAX_ANT_CARRIER_SUPPORTED];\r
-extern int32_t tx_play_buffer_size[MAX_ANT_CARRIER_SUPPORTED];\r
-extern int32_t tx_play_buffer_position[MAX_ANT_CARRIER_SUPPORTED];\r
-\r
-extern int16_t *p_tx_prach_play_buffer[MAX_ANT_CARRIER_SUPPORTED];\r
-extern int32_t tx_prach_play_buffer_size[MAX_ANT_CARRIER_SUPPORTED];\r
-extern int32_t tx_prach_play_buffer_position[MAX_ANT_CARRIER_SUPPORTED];\r
-\r
-extern int16_t *p_tx_srs_play_buffer[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];\r
-extern int32_t tx_srs_play_buffer_size[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];\r
-extern int32_t tx_srs_play_buffer_position[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];\r
-\r
-/* Number of antennas supported by front-end */\r
-extern int16_t *p_rx_log_buffer[MAX_ANT_CARRIER_SUPPORTED];\r
-extern int32_t rx_log_buffer_size[MAX_ANT_CARRIER_SUPPORTED];\r
-extern int32_t rx_log_buffer_position[MAX_ANT_CARRIER_SUPPORTED];\r
-\r
-extern int16_t *p_prach_log_buffer[MAX_ANT_CARRIER_SUPPORTED];\r
-extern int32_t prach_log_buffer_size[MAX_ANT_CARRIER_SUPPORTED];\r
-extern int32_t prach_log_buffer_position[MAX_ANT_CARRIER_SUPPORTED];\r
-\r
-extern int16_t *p_srs_log_buffer[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];\r
-extern int32_t srs_log_buffer_size[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];\r
-extern int32_t srs_log_buffer_position[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];\r
-\r
-extern int16_t *p_tx_buffer[MAX_ANT_CARRIER_SUPPORTED];\r
-extern int32_t tx_buffer_size[MAX_ANT_CARRIER_SUPPORTED];\r
-\r
-extern int16_t *p_rx_buffer[MAX_ANT_CARRIER_SUPPORTED];\r
-extern int32_t rx_buffer_size[MAX_ANT_CARRIER_SUPPORTED];\r
-\r
-/* beamforming weights for UL (O-DU) */\r
-extern int16_t *p_tx_dl_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];\r
-extern int32_t tx_dl_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];\r
-extern int32_t tx_dl_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];\r
-\r
-/* beamforming weights for UL (O-DU) */\r
-extern int16_t *p_tx_ul_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];\r
-extern int32_t tx_ul_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];\r
-extern int32_t tx_ul_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];\r
-\r
-/* beamforming weights for UL (O-RU) */\r
-extern int16_t *p_rx_dl_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];\r
-extern int32_t rx_dl_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];\r
-extern int32_t rx_dl_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];\r
-\r
-/* beamforming weights for UL (O-RU) */\r
-extern int16_t *p_rx_ul_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];\r
-extern int32_t rx_ul_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];\r
-extern int32_t rx_ul_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];\r
-\r
-void sys_save_buf_to_file_txt(char *filename, char *bufname, unsigned char *pBuffer, unsigned int size, unsigned int buffers_num);\r
-void sys_save_buf_to_file(char *filename, char *bufname, unsigned char *pBuffer, unsigned int size, unsigned int buffers_num);\r
-int sys_load_file_to_buff(char *filename, char *bufname, unsigned char *pBuffer, unsigned int size, unsigned int buffers_num);\r
-uint32_t app_xran_get_scs(uint8_t nMu);\r
-uint16_t app_xran_get_num_rbs(uint32_t nNumerology, uint32_t nBandwidth, uint32_t nAbsFrePointA);\r
-uint32_t app_xran_cal_nrarfcn(uint32_t nCenterFreq);\r
-int32_t app_xran_set_slot_type(uint32_t nPhyInstanceId, uint32_t nFrameDuplexType,\r
- uint32_t nTddPeriod, struct xran_slot_config *psSlotConfig);\r
-uint32_t app_xran_get_tti_interval(uint8_t nMu);\r
-\r
-\r
-\r
-#endif /*_XRAN_APP_COMMON_H_*/\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+#ifndef _XRAN_APP_COMMON_H_
+#define _XRAN_APP_COMMON_H_
+
+#include <stdio.h>
+#include <unistd.h>
+
+#include "xran_fh_o_du.h"
+#include "xran_pkt_up.h"
+
+#include <rte_common.h>
+#include <rte_mbuf.h>
+
+#define VERSIONX "#DIRTY#"
+
+#define APP_O_DU 0
+#define APP_O_RU 1
+
+enum app_state
+{
+ APP_RUNNING,
+ APP_STOPPED
+};
+
+enum nRChBwOptions
+{
+ PHY_BW_5_0_MHZ = 5, PHY_BW_10_0_MHZ = 10, PHY_BW_15_0_MHZ = 15, PHY_BW_20_0_MHZ = 20, PHY_BW_25_0_MHZ = 25,
+ PHY_BW_30_0_MHZ = 30, PHY_BW_40_0_MHZ = 40, PHY_BW_50_0_MHZ = 50, PHY_BW_60_0_MHZ = 60, PHY_BW_70_0_MHZ = 70,
+ PHY_BW_80_0_MHZ = 80, PHY_BW_90_0_MHZ = 90, PHY_BW_100_0_MHZ = 100, PHY_BW_200_0_MHZ = 200, PHY_BW_400_0_MHZ = 400
+};
+
+#define N_SC_PER_PRB 12
+#define N_SYM_PER_SLOT 14
+#define MAX_ANT_CARRIER_SUPPORTED (XRAN_MAX_SECTOR_NR*XRAN_MAX_ANTENNA_NR)
+#define MAX_ANT_CARRIER_SUPPORTED_CAT_B (XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR)
+
+#define SUBFRAME_DURATION_US 1000
+//#define SLOTNUM_PER_SUBFRAME 8
+
+#define SUBFRAMES_PER_SYSTEMFRAME 10
+#define IQ_PLAYBACK_BUFFER_BYTES (XRAN_NUM_OF_SLOT_IN_TDD_LOOP*N_SYM_PER_SLOT*XRAN_MAX_PRBS*N_SC_PER_PRB*4L)
+/* PRACH data samples are 32 bits wide, 16bits for I and 16bits for Q. Each packet contains 839 samples for long sequence or 144*14 (max) for short sequence. The payload length is 3356 octets.*/
+#define PRACH_PLAYBACK_BUFFER_BYTES (144*14*4L)
+
+#ifdef _DEBUG
+#define iAssert(p) if(!(p)){fprintf(stderr,\
+ "Assertion failed: %s, file %s, line %d, val %d\n",\
+ #p, __FILE__, __LINE__, p);exit(-1);}
+#else /* _DEBUG */
+#define iAssert(p)
+#endif /* _DEBUG */
+
+extern int iq_playback_buffer_size_dl;
+extern int iq_playback_buffer_size_ul;
+
+extern int iq_bfw_buffer_size_dl;
+extern int iq_bfw_buffer_size_ul;
+
+extern int iq_srs_buffer_size_ul;
+
+extern uint8_t numCCPorts;
+/* Number of antennas supported by front-end */
+
+extern uint8_t num_eAxc;
+/* Number of antennas supported by front-end */
+extern int16_t *p_tx_play_buffer[MAX_ANT_CARRIER_SUPPORTED];
+extern int32_t tx_play_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
+extern int32_t tx_play_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
+
+extern int16_t *p_tx_prach_play_buffer[MAX_ANT_CARRIER_SUPPORTED];
+extern int32_t tx_prach_play_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
+extern int32_t tx_prach_play_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
+
+extern int16_t *p_tx_srs_play_buffer[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];
+extern int32_t tx_srs_play_buffer_size[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];
+extern int32_t tx_srs_play_buffer_position[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];
+
+/* Number of antennas supported by front-end */
+extern int16_t *p_rx_log_buffer[MAX_ANT_CARRIER_SUPPORTED];
+extern int32_t rx_log_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
+extern int32_t rx_log_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
+
+extern int16_t *p_prach_log_buffer[MAX_ANT_CARRIER_SUPPORTED];
+extern int32_t prach_log_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
+extern int32_t prach_log_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
+
+extern int16_t *p_srs_log_buffer[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];
+extern int32_t srs_log_buffer_size[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];
+extern int32_t srs_log_buffer_position[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];
+
+extern int16_t *p_tx_buffer[MAX_ANT_CARRIER_SUPPORTED];
+extern int32_t tx_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
+
+extern int16_t *p_rx_buffer[MAX_ANT_CARRIER_SUPPORTED];
+extern int32_t rx_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
+
+/* beamforming weights for UL (O-DU) */
+extern int16_t *p_tx_dl_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];
+extern int32_t tx_dl_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
+extern int32_t tx_dl_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
+
+/* beamforming weights for UL (O-DU) */
+extern int16_t *p_tx_ul_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];
+extern int32_t tx_ul_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
+extern int32_t tx_ul_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
+
+/* beamforming weights for UL (O-RU) */
+extern int16_t *p_rx_dl_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];
+extern int32_t rx_dl_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
+extern int32_t rx_dl_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
+
+/* beamforming weights for UL (O-RU) */
+extern int16_t *p_rx_ul_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];
+extern int32_t rx_ul_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
+extern int32_t rx_ul_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
+
+void sys_save_buf_to_file_txt(char *filename, char *bufname, unsigned char *pBuffer, unsigned int size, unsigned int buffers_num);
+void sys_save_buf_to_file(char *filename, char *bufname, unsigned char *pBuffer, unsigned int size, unsigned int buffers_num);
+int sys_load_file_to_buff(char *filename, char *bufname, unsigned char *pBuffer, unsigned int size, unsigned int buffers_num);
+uint32_t app_xran_get_scs(uint8_t nMu);
+uint16_t app_xran_get_num_rbs(uint32_t nNumerology, uint32_t nBandwidth, uint32_t nAbsFrePointA);
+uint32_t app_xran_cal_nrarfcn(uint32_t nCenterFreq);
+int32_t app_xran_set_slot_type(uint32_t nPhyInstanceId, uint32_t nFrameDuplexType,
+ uint32_t nTddPeriod, struct xran_slot_config *psSlotConfig);
+uint32_t app_xran_get_tti_interval(uint8_t nMu);
+
+
+
+#endif /*_XRAN_APP_COMMON_H_*/
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/**\r
- * @brief\r
- * @file\r
- * @ingroup\r
- * @author Intel Corporation\r
- **/\r
-\r
-#include "rte_common.h"\r
-#include "config.h"\r
-#include "common.h"\r
-#include "debug.h"\r
-\r
-#include <rte_ethdev.h>\r
-#include <inttypes.h>\r
-\r
-#define MAX_LINE_SIZE 512\r
-/* Configuration file maximum supported line length */\r
-\r
-#define KEY_APP_MODE "appMode"\r
-#define KEY_XRAN_MODE "xranMode"\r
-#define KEY_MU_NUMBER "mu"\r
-#define KEY_NDLABSFREPOINTA "nDLAbsFrePointA"\r
-#define KEY_NULABSFREPOINTA "nULAbsFrePointA"\r
-#define KEY_NDLBANDWIDTH "nDLBandwidth"\r
-#define KEY_NULBANDWIDTH "nULBandwidth"\r
-#define KEY_NDLFFTSIZE "nDLFftSize"\r
-#define KEY_NULFFTSIZE "nULFftSize"\r
-\r
-#define KEY_NFRAMEDUPLEXTYPE "nFrameDuplexType"\r
-#define KEY_NTDDPERIOD "nTddPeriod"\r
-\r
-#define KEY_SSLOTCONFIG "sSlotConfig"\r
-\r
-#define KEY_CC_PER_PORT_NUM "ccNum"\r
-#define KEY_ANT_NUM "antNum"\r
-#define KEY_UL_ANT_NUM "antNumUL"\r
-\r
-#define KEY_ANT_ELM_TRX_NUM "antElmTRx"\r
-\r
-#define KEY_MU_MIMO_UES_NUM "muMimoUEs"\r
-#define KEY_DLLAYERS_PER_UE "DlLayersPerUe"\r
-#define KEY_ULLAYERS_PER_UE "UlLayersPerUe"\r
-#define KEY_FILE_DLBFWUE "DlBfwUe"\r
-#define KEY_FILE_ULBFWUE "UlBfwUe"\r
-\r
-#define KEY_FILE_ULSRS "antSrsC"\r
-\r
-\r
-#define KEY_TTI_PERIOD "ttiPeriod"\r
-\r
-#define KEY_MTU_SIZE "MTUSize"\r
-#define KEY_IO_CORE "ioCore"\r
-#define KEY_SYSTEM_CORE "systemCore"\r
-#define KEY_PKT_PROC_CORE "pktProcCore"\r
-#define KEY_PKT_AUX_CORE "pktAuxCore"\r
-#define KEY_TIMING_CORE "timingCore"\r
-\r
-#define KEY_INSTANCE_ID "instanceId"\r
-\r
-#define KEY_LLS_CU_MAC "llsCUMac"\r
-#define KEY_RU_MAC "ruMac"\r
-\r
-#define KEY_FILE_NUMSLOTS "numSlots"\r
-#define KEY_FILE_AxC "antC"\r
-#define KEY_FILE_PRACH_AxC "antPrachC"\r
-\r
-#define KEY_PRACH_ENABLE "rachEanble"\r
-#define KEY_SRS_ENABLE "srsEanble"\r
-\r
-#define KEY_PRACH_CFGIDX "prachConfigIndex"\r
-#define KEY_SRS_SYM_IDX "srsSym"\r
-\r
-#define KEY_MAX_FRAME_ID "maxFrameId"\r
-\r
-\r
-#define KEY_IQ_SWAP "iqswap"\r
-#define KEY_HTONS_SWAP "nebyteorderswap"\r
-#define KEY_COMPRESSION "compression"\r
-\r
-#define KEY_BFW_NUM "totalBFWeights"\r
-\r
-#define KEY_TADV_CP_DL "Tadv_cp_dl"\r
-#define KEY_T2A_MIN_CP_DL "T2a_min_cp_dl"\r
-#define KEY_T2A_MAX_CP_DL "T2a_max_cp_dl"\r
-#define KEY_T2A_MIN_CP_UL "T2a_min_cp_ul"\r
-#define KEY_T2A_MAX_CP_UL "T2a_max_cp_ul"\r
-#define KEY_T2A_MIN_UP "T2a_min_up"\r
-#define KEY_T2A_MAX_UP "T2a_max_up"\r
-#define KEY_TA3_MIN "Ta3_min"\r
-#define KEY_TA3_MAX "Ta3_max"\r
-#define KEY_T1A_MIN_CP_DL "T1a_min_cp_dl"\r
-#define KEY_T1A_MAX_CP_DL "T1a_max_cp_dl"\r
-#define KEY_T1A_MIN_CP_UL "T1a_min_cp_ul"\r
-#define KEY_T1A_MAX_CP_UL "T1a_max_cp_ul"\r
-#define KEY_T1A_MIN_UP "T1a_min_up"\r
-#define KEY_T1A_MAX_UP "T1a_max_up"\r
-#define KEY_TA4_MIN "Ta4_min"\r
-#define KEY_TA4_MAX "Ta4_max"\r
-\r
-\r
-#define KEY_CP_ENABLE "CPenable"\r
-#define KEY_CP_VTAG "c_plane_vlan_tag"\r
-#define KEY_UP_VTAG "u_plane_vlan_tag"\r
-#define KEY_DEBUG_STOP "debugStop"\r
-#define KEY_DEBUG_STOP_CNT "debugStopCount"\r
-#define KEY_BBDEV_MODE "bbdevMode"\r
-#define KEY_DYNA_SEC_ENA "DynamicSectionEna"\r
-#define KEY_ALPHA "Gps_Alpha"\r
-#define KEY_BETA "Gps_Beta"\r
-\r
-#define KEY_NPRBELEM_DL "nPrbElemDl"\r
-#define KEY_PRBELEM_DL "PrbElemDl"\r
-\r
-#define KEY_NPRBELEM_UL "nPrbElemUl"\r
-#define KEY_PRBELEM_UL "PrbElemUl"\r
-\r
-/**\r
- * Set runtime configuration parameters to their defaults.\r
- *\r
- * @todo Initialize missing parameters.\r
- */\r
-static void init_config(RuntimeConfig* config)\r
-{\r
- memset(config , 0, sizeof(RuntimeConfig));\r
-}\r
-\r
-/** - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - **/\r
-\r
-static void trim(char* input)\r
-{\r
- uint32_t i;\r
- for (i = 0; i<strlen(input); i++)\r
- if (input[i] == ' ' || input[i] == '\n' || input[i] == '\t')\r
- input[i] = '\0';\r
-}\r
-\r
-static int fillConfigStruct(RuntimeConfig *config, const char *key, const char *value)\r
-{\r
- int32_t parse_res = 0;\r
-\r
- if (strcmp(key, KEY_APP_MODE) == 0){\r
- config->appMode = atoi(value);\r
- } else if (strcmp(key, KEY_XRAN_MODE) == 0) {\r
- config->xranCat = atoi(value);\r
- } else if (strcmp(key, KEY_CC_PER_PORT_NUM) == 0) {\r
- config->numCC= atoi(value);\r
- } else if (strcmp(key, KEY_MU_NUMBER) == 0) {\r
- config->mu_number= atoi(value);\r
- printf("mu_number: %d\n",config->mu_number);\r
- } else if (strcmp(key, KEY_NDLABSFREPOINTA) == 0) {\r
- config->nDLAbsFrePointA = atoi(value);\r
- printf("nDLAbsFrePointA: %d\n",config->nDLAbsFrePointA);\r
- } else if (strcmp(key, KEY_NULABSFREPOINTA) == 0) {\r
- config->nULAbsFrePointA = atoi(value);\r
- printf("nULAbsFrePointA: %d\n",config->nULAbsFrePointA);\r
- } else if (strcmp(key, KEY_NDLBANDWIDTH) == 0) {\r
- config->nDLBandwidth = atoi(value);\r
- printf("nDLBandwidth: %d\n",config->nDLBandwidth);\r
- } else if (strcmp(key, KEY_NULBANDWIDTH) == 0) {\r
- config->nULBandwidth = atoi(value);\r
- printf("nULBandwidth: %d\n",config->nULBandwidth);\r
- } else if (strcmp(key, KEY_NDLFFTSIZE) == 0) {\r
- config->nDLFftSize = atoi(value);\r
- printf("nDLFftSize: %d\n",config->nDLFftSize);\r
- } else if (strcmp(key, KEY_NULFFTSIZE) == 0) {\r
- config->nULFftSize = atoi(value);\r
- printf("nULFftSize: %d\n",config->nULFftSize);\r
- } else if (strcmp(key, KEY_NFRAMEDUPLEXTYPE) == 0) {\r
- config->nFrameDuplexType = atoi(value);\r
- printf("nFrameDuplexType: %d\n",config->nFrameDuplexType);\r
- } else if (strcmp(key, KEY_NTDDPERIOD) == 0) {\r
- config->nTddPeriod = atoi(value);\r
- printf("nTddPeriod: %d\n",config->nTddPeriod);\r
- if (config->nTddPeriod > XRAN_MAX_TDD_PERIODICITY)\r
- {\r
- printf("nTddPeriod is larger than max allowed, invalid!\n");\r
- config->nTddPeriod = XRAN_MAX_TDD_PERIODICITY;\r
- }\r
- } else if (strncmp(key, KEY_SSLOTCONFIG, strlen(KEY_SSLOTCONFIG)) == 0) {\r
- unsigned int slot_num = 0;\r
- int i = 0;\r
- sscanf(key,"sSlotConfig%u",&slot_num);\r
- if (slot_num >= config->nTddPeriod){\r
- printf("slot_num %d exceeds TddPeriod\n",slot_num);\r
- }\r
- else{\r
- sscanf(value, "%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x",\r
- (uint32_t*)&config->sSlotConfig[slot_num].nSymbolType[0],\r
- (uint32_t*)&config->sSlotConfig[slot_num].nSymbolType[1],\r
- (uint32_t*)&config->sSlotConfig[slot_num].nSymbolType[2],\r
- (uint32_t*)&config->sSlotConfig[slot_num].nSymbolType[3],\r
- (uint32_t*)&config->sSlotConfig[slot_num].nSymbolType[4],\r
- (uint32_t*)&config->sSlotConfig[slot_num].nSymbolType[5],\r
- (uint32_t*)&config->sSlotConfig[slot_num].nSymbolType[6],\r
- (uint32_t*)&config->sSlotConfig[slot_num].nSymbolType[7],\r
- (uint32_t*)&config->sSlotConfig[slot_num].nSymbolType[8],\r
- (uint32_t*)&config->sSlotConfig[slot_num].nSymbolType[9],\r
- (uint32_t*)&config->sSlotConfig[slot_num].nSymbolType[10],\r
- (uint32_t*)&config->sSlotConfig[slot_num].nSymbolType[11],\r
- (uint32_t*)&config->sSlotConfig[slot_num].nSymbolType[12],\r
- (uint32_t*)&config->sSlotConfig[slot_num].nSymbolType[13]);\r
- printf("sSlotConfig%d: ",slot_num);\r
- for (i = 0; i< 14; i++){\r
- printf("%d ",config->sSlotConfig[slot_num].nSymbolType[i]);\r
- }\r
- printf("\n");\r
- }\r
- } else if (strcmp(key, KEY_ANT_NUM) == 0) {\r
- config->numAxc = atoi(value);\r
- } else if (strcmp(key, KEY_UL_ANT_NUM) == 0) {\r
- config->numUlAxc = atoi(value);\r
- }else if (strcmp(key, KEY_ANT_ELM_TRX_NUM) == 0) {\r
- config->antElmTRx = atoi(value);\r
- printf("antElmTRx %d\n", config->antElmTRx);\r
- } else if (strcmp(key, KEY_MU_MIMO_UES_NUM) == 0) {\r
- config->muMimoUEs = atoi(value);\r
- } else if (strcmp(key, KEY_DLLAYERS_PER_UE) == 0) {\r
- config->DlLayersPerUe = atoi(value);\r
- } else if (strcmp(key, KEY_ULLAYERS_PER_UE) == 0) {\r
- config->UlLayersPerUe = atoi(value);\r
- } else if (strcmp(key, KEY_TTI_PERIOD) == 0) {\r
- config->ttiPeriod = atoi(value);\r
- } else if (strcmp(key, KEY_IQ_SWAP) == 0) {\r
- config->iqswap = atoi(value);\r
- } else if (strcmp(key, KEY_HTONS_SWAP) == 0) {\r
- config->nebyteorderswap = atoi(value);\r
- } else if (strcmp(key, KEY_COMPRESSION) == 0) {\r
- config->compression = atoi(value);\r
- } else if (strcmp(key, KEY_MTU_SIZE) == 0) {\r
- config->mtu = atoi(value);\r
- printf("mtu %d\n", config->mtu);\r
- } else if (strcmp(key, KEY_IO_CORE) == 0) {\r
- config->io_core = atoi(value);\r
- printf("io_core %d\n", config->io_core);\r
- } else if (strcmp(key, KEY_SYSTEM_CORE) == 0) {\r
- config->system_core = atoi(value);\r
- printf("system_core -c %" PRIx64 "\n", config->system_core);\r
- } else if (strcmp(key, KEY_PKT_PROC_CORE) == 0) {\r
- config->pkt_proc_core = atoi(value);\r
- printf("pkt_proc_core -c %" PRIx64 "\n", config->pkt_proc_core);\r
- } else if (strcmp(key, KEY_PKT_AUX_CORE) == 0) {\r
- config->pkt_aux_core = atoi(value);\r
- printf("pkt_aux_core -c %" PRIx64 "\n", config->pkt_aux_core);\r
- } else if (strcmp(key, KEY_TIMING_CORE) == 0) {\r
- config->timing_core = atoi(value);\r
- printf("timing_core -c %" PRIx64 "\n", config->timing_core);\r
- }else if (strcmp(key, KEY_INSTANCE_ID) == 0) {\r
- config->instance_id = atoi(value);\r
- printf("instance_id %d\n", config->instance_id);\r
- }else if (strcmp(key, KEY_LLS_CU_MAC) == 0) {\r
- sscanf(value, "%02x:%02x:%02x:%02x:%02x:%02x", (uint32_t*)&config->o_du_addr.addr_bytes[0],\r
- (uint32_t*)&config->o_du_addr.addr_bytes[1],\r
- (uint32_t*)&config->o_du_addr.addr_bytes[2],\r
- (uint32_t*)&config->o_du_addr.addr_bytes[3],\r
- (uint32_t*)&config->o_du_addr.addr_bytes[4],\r
- (uint32_t*)&config->o_du_addr.addr_bytes[5]);\r
-\r
- printf("lls-CU MAC address: %02X:%02X:%02X:%02X:%02X:%02X\n",\r
- config->o_du_addr.addr_bytes[0],\r
- config->o_du_addr.addr_bytes[1],\r
- config->o_du_addr.addr_bytes[2],\r
- config->o_du_addr.addr_bytes[3],\r
- config->o_du_addr.addr_bytes[4],\r
- config->o_du_addr.addr_bytes[5]);\r
-\r
- } else if (strcmp(key, KEY_RU_MAC) == 0) {\r
- sscanf(value, "%02x:%02x:%02x:%02x:%02x:%02x", (uint32_t*)&config->o_ru_addr.addr_bytes[0],\r
- (uint32_t*)&config->o_ru_addr.addr_bytes[1],\r
- (uint32_t*)&config->o_ru_addr.addr_bytes[2],\r
- (uint32_t*)&config->o_ru_addr.addr_bytes[3],\r
- (uint32_t*)&config->o_ru_addr.addr_bytes[4],\r
- (uint32_t*)&config->o_ru_addr.addr_bytes[5]);\r
-\r
- printf("RU MAC address: %02X:%02X:%02X:%02X:%02X:%02X\n",\r
- config->o_ru_addr.addr_bytes[0],\r
- config->o_ru_addr.addr_bytes[1],\r
- config->o_ru_addr.addr_bytes[2],\r
- config->o_ru_addr.addr_bytes[3],\r
- config->o_ru_addr.addr_bytes[4],\r
- config->o_ru_addr.addr_bytes[5]);\r
- } else if (strcmp(key, KEY_FILE_NUMSLOTS) == 0) {\r
- config->numSlots = atoi(value);\r
- printf("numSlots: %d\n",config->numSlots);\r
- }else if (strncmp(key, KEY_FILE_AxC, strlen(KEY_FILE_AxC)) == 0) {\r
- unsigned int ant_num = 0;\r
- sscanf(key,"antC%02u",&ant_num);\r
- if (ant_num >= MAX_ANT_CARRIER_SUPPORTED) {\r
- printf("antC%d exceeds max antenna supported\n",ant_num);\r
- } else {\r
- strncpy(&config->ant_file[ant_num][0], value, strlen(value));\r
- printf("antC%d: %s\n",ant_num, config->ant_file[ant_num]);\r
- }\r
- } else if (strncmp(key, KEY_FILE_DLBFWUE, strlen(KEY_FILE_DLBFWUE)) == 0) {\r
- unsigned int ue_num = 0;\r
- sscanf(key,"DlBfwUe%02u",&ue_num);\r
- if (ue_num >= MAX_ANT_CARRIER_SUPPORTED) {\r
- printf("DlBfwUe%d exceeds max streams supported\n",ue_num);\r
- } else {\r
- strncpy(&config->dl_bfw_file[ue_num][0], value, strlen(value));\r
- printf("DlBfwUe%d: %s\n",ue_num, config->dl_bfw_file[ue_num]);\r
- }\r
- }else if (strncmp(key, KEY_FILE_ULBFWUE, strlen(KEY_FILE_ULBFWUE)) == 0) {\r
- unsigned int ue_num = 0;\r
- sscanf(key,"UlBfwUe%02u",&ue_num);\r
- if (ue_num >= MAX_ANT_CARRIER_SUPPORTED) {\r
- printf("UlBfwUe%d exceeds max streams supported\n",ue_num);\r
- } else {\r
- strncpy(&config->ul_bfw_file[ue_num][0], value, strlen(value));\r
- printf("UlBfwUe%d: %s\n",ue_num, config->ul_bfw_file[ue_num]);\r
- }\r
- }else if (strncmp(key, KEY_FILE_ULSRS, strlen(KEY_FILE_ULSRS)) == 0) {\r
- unsigned int srs_ant = 0;\r
- sscanf(key,"antSrsC%02u",&srs_ant);\r
- if (srs_ant >= MAX_ANT_CARRIER_SUPPORTED_CAT_B) {\r
- printf("antSrsC%d exceeds max ant elemnets supported [%d]\n", srs_ant, MAX_ANT_CARRIER_SUPPORTED_CAT_B);\r
- } else {\r
- strncpy(&config->ul_srs_file[srs_ant][0], value, strlen(value));\r
- printf("antSrsC%d: %s\n",srs_ant, config->ul_srs_file[srs_ant]);\r
- }\r
- } else if (strcmp(key, KEY_PRACH_ENABLE) == 0) {\r
- config->enablePrach = atoi(value);\r
- printf("Prach enable: %d\n",config->enablePrach);\r
- }else if (strcmp(key, KEY_MAX_FRAME_ID) == 0) {\r
- config->maxFrameId = atoi(value);\r
- printf("maxFrameId: %d\n",config->maxFrameId);\r
- } else if (strcmp(key, KEY_SRS_ENABLE) == 0) {\r
- config->enableSrs = atoi(value);\r
- printf("Srs enable: %d\n",config->enablePrach);\r
- } else if (strcmp(key, KEY_PRACH_CFGIDX) == 0) {\r
- config->prachConfigIndex = atoi(value);\r
- printf("Prach config index: %d\n",config->prachConfigIndex);\r
- } else if (strcmp(key, KEY_SRS_SYM_IDX) == 0) {\r
- config->srsSymMask = atoi(value);\r
- printf("Srs symbol [0-13]: %d\n",config->srsSymMask);\r
- } else if (strncmp(key, KEY_FILE_PRACH_AxC, strlen(KEY_FILE_PRACH_AxC)) == 0) {\r
- unsigned int ant_num = 0;\r
- sscanf(key,"antPrachC%02u",&ant_num);\r
- if (ant_num >= MAX_ANT_CARRIER_SUPPORTED)\r
- {\r
- printf("antC%d exceeds max antenna supported\n",ant_num);\r
- }\r
- else{\r
- strncpy(&config->prach_file[ant_num][0], value, strlen(value));\r
- printf("antPrachC%d: %s\n",ant_num, config->prach_file[ant_num]);\r
- }\r
- } else if (strcmp(key, KEY_BFW_NUM) == 0) {\r
- config->totalBfWeights = atoi(value);\r
- printf("%s : %d\n",KEY_BFW_NUM, config->totalBfWeights);\r
- /* timing */\r
- } else if (strcmp(key, KEY_TADV_CP_DL ) == 0) {\r
- config->Tadv_cp_dl = atoi(value);\r
- printf("Tadv_cp_dl: %d\n",config->Tadv_cp_dl);\r
- } else if (strcmp(key, KEY_T2A_MIN_CP_DL ) == 0) {\r
- config->T2a_min_cp_dl = atoi(value);\r
- printf("T2a_min_cp_dl: %d\n",config->T2a_min_cp_dl);\r
- } else if (strcmp(key, KEY_T2A_MAX_CP_DL ) == 0) {\r
- config->T2a_max_cp_dl = atoi(value);\r
- printf("T2a_max_cp_dl: %d\n",config->T2a_max_cp_dl);\r
- } else if (strcmp(key, KEY_T2A_MIN_CP_UL ) == 0) {\r
- config->T2a_min_cp_ul = atoi(value);\r
- printf("T2a_min_cp_ul: %d\n",config->T2a_min_cp_ul);\r
- } else if (strcmp(key, KEY_T2A_MAX_CP_UL ) == 0) {\r
- config->T2a_max_cp_ul = atoi(value);\r
- printf("T2a_max_cp_ul: %d\n",config->T2a_max_cp_ul);\r
- } else if (strcmp(key, KEY_T2A_MIN_UP ) == 0) {\r
- config->T2a_min_up = atoi(value);\r
- printf("T2a_min_up: %d\n",config->T2a_min_up);\r
- } else if (strcmp(key, KEY_T2A_MAX_UP ) == 0) {\r
- config->T2a_max_up = atoi(value);\r
- printf("T2a_max_up: %d\n",config->T2a_max_up);\r
- } else if (strcmp(key, KEY_TA3_MIN ) == 0) {\r
- config->Ta3_min = atoi(value);\r
- printf("Ta3_min: %d\n",config->Ta3_min);\r
- } else if (strcmp(key, KEY_TA3_MAX ) == 0) {\r
- config->Ta3_max = atoi(value);\r
- printf("Ta3_max: %d\n",config->Ta3_max);\r
- } else if (strcmp(key, KEY_T1A_MIN_CP_DL ) == 0) {\r
- config->T1a_min_cp_dl = atoi(value);\r
- printf("T1a_min_cp_dl: %d\n",config->T1a_min_cp_dl);\r
- } else if (strcmp(key, KEY_T1A_MAX_CP_DL ) == 0) {\r
- config->T1a_max_cp_dl = atoi(value);\r
- printf("T1a_max_cp_dl: %d\n",config->T1a_max_cp_dl);\r
- } else if (strcmp(key, KEY_T1A_MIN_CP_UL ) == 0) {\r
- config->T1a_min_cp_ul = atoi(value);\r
- printf("T1a_min_cp_ul: %d\n",config->T1a_min_cp_ul);\r
- } else if (strcmp(key, KEY_T1A_MAX_CP_UL ) == 0) {\r
- config->T1a_max_cp_ul = atoi(value);\r
- printf("T1a_max_cp_ul: %d\n",config->T1a_max_cp_ul);\r
- } else if (strcmp(key, KEY_T1A_MIN_UP ) == 0) {\r
- config->T1a_min_up = atoi(value);\r
- printf("T1a_min_up: %d\n",config->T1a_min_up);\r
- } else if (strcmp(key, KEY_T1A_MAX_UP ) == 0) {\r
- config->T1a_max_up = atoi(value);\r
- printf("T1a_max_up: %d\n",config->T1a_max_up);\r
- } else if (strcmp(key, KEY_TA4_MIN ) == 0) {\r
- config->Ta4_min = atoi(value);\r
- printf("Ta4_min: %d\n",config->Ta4_min);\r
- } else if (strcmp(key, KEY_TA4_MAX ) == 0) {\r
- config->Ta4_max = atoi(value);\r
- printf("Ta4_max: %d\n",config->Ta4_max);\r
- /* end of timing */\r
- } else if (strcmp(key, KEY_CP_ENABLE ) == 0) {\r
- config->enableCP = atoi(value);\r
- printf("CPenable: %d\n",config->enableCP);\r
- } else if (strcmp(key, KEY_DEBUG_STOP ) == 0) {\r
- config->debugStop = atoi(value);\r
- printf("debugStop: %d\n",config->debugStop);\r
- } else if (strcmp(key, KEY_DEBUG_STOP_CNT) == 0) {\r
- config->debugStopCount = atoi(value);\r
- printf("debugStopCount: %d\n",config->debugStopCount);\r
- } else if (strcmp(key, KEY_BBDEV_MODE) == 0) {\r
- config->bbdevMode = atoi(value);\r
- printf("bbdevMode: %d\n",config->debugStopCount);\r
- } else if (strcmp(key, KEY_DYNA_SEC_ENA) == 0) {\r
- config->DynamicSectionEna = atoi(value);\r
- printf("DynamicSectionEna: %d\n",config->DynamicSectionEna);\r
- } else if (strcmp(key, KEY_ALPHA) == 0) {\r
- config->GPS_Alpha = atoi(value);\r
- printf("GPS_Alpha: %d\n",config->GPS_Alpha);\r
- } else if (strcmp(key, KEY_BETA) == 0) {\r
- config->GPS_Beta = atoi(value);\r
- printf("GPS_Beta: %d\n",config->GPS_Beta);\r
- } else if (strcmp(key, KEY_CP_VTAG ) == 0) {\r
- config->cp_vlan_tag = atoi(value);\r
- printf("cp_vlan_tag: %d\n",config->cp_vlan_tag);\r
- } else if (strcmp(key, KEY_UP_VTAG ) == 0) {\r
- config->up_vlan_tag = atoi(value);\r
- printf("up_vlan_tag: %d\n",config->up_vlan_tag);\r
- } else if (strcmp(key, KEY_NPRBELEM_UL ) == 0) {\r
- config->PrbMapUl.nPrbElm = atoi(value);\r
- if (config->PrbMapUl.nPrbElm > XRAN_MAX_PRBS)\r
- {\r
- printf("nTddPeriod is larger than max allowed, invalid!\n");\r
- config->PrbMapUl.nPrbElm = XRAN_MAX_PRBS;\r
- }\r
- printf("nPrbElemUl: %d\n",config->PrbMapUl.nPrbElm);\r
- } else if (strncmp(key, KEY_PRBELEM_UL, strlen(KEY_PRBELEM_UL)) == 0) {\r
- unsigned int section_idx = 0;\r
- sscanf(key,"PrbElemUl%u",§ion_idx);\r
- if (section_idx >= config->PrbMapUl.nPrbElm){\r
- printf("section_idx %d exceeds nPrbElem\n",section_idx);\r
- }\r
- else{\r
- struct xran_prb_elm *pPrbElem = &config->PrbMapUl.prbMap[section_idx];\r
- sscanf(value, "%hd,%hd,%hd,%hd,%hd,%hd,%hd,%hd,%hd",\r
- (int16_t*)&pPrbElem->nRBStart,\r
- (int16_t*)&pPrbElem->nRBSize,\r
- (int16_t*)&pPrbElem->nStartSymb,\r
- (int16_t*)&pPrbElem->numSymb,\r
- (int16_t*)&pPrbElem->nBeamIndex,\r
- (int16_t*)&pPrbElem->bf_weight_update,\r
- (int16_t*)&pPrbElem->compMethod,\r
- (int16_t*)&pPrbElem->iqWidth,\r
- (int16_t*)&pPrbElem->BeamFormingType);\r
- printf("nPrbElemUl%d: ",section_idx);\r
- printf("nRBStart %d,nRBSize %d,nStartSymb %d,numSymb %d,nBeamIndex %d, bf_weight_update %d compMethod %d, iqWidth %d BeamFormingType %d\n",\r
- pPrbElem->nRBStart,pPrbElem->nRBSize,pPrbElem->nStartSymb,pPrbElem->numSymb,pPrbElem->nBeamIndex, pPrbElem->bf_weight_update, pPrbElem->compMethod, pPrbElem->iqWidth, pPrbElem->BeamFormingType);\r
- }\r
- }else if (strcmp(key, KEY_NPRBELEM_DL ) == 0) {\r
- config->PrbMapDl.nPrbElm = atoi(value);\r
- if (config->PrbMapDl.nPrbElm > XRAN_MAX_PRBS)\r
- {\r
- printf("nTddPeriod is larger than max allowed, invalid!\n");\r
- config->PrbMapDl.nPrbElm = XRAN_MAX_PRBS;\r
- }\r
- printf("nPrbElemDl: %d\n",config->PrbMapDl.nPrbElm);\r
- } else if (strncmp(key, KEY_PRBELEM_DL, strlen(KEY_PRBELEM_DL)) == 0) {\r
- unsigned int section_idx = 0;\r
- sscanf(key,"PrbElemDl%u",§ion_idx);\r
- if (section_idx >= config->PrbMapDl.nPrbElm){\r
- printf("section_idx %d exceeds nPrbElem\n",section_idx);\r
- }\r
- else{\r
- struct xran_prb_elm *pPrbElem = &config->PrbMapDl.prbMap[section_idx];\r
- sscanf(value, "%hd,%hd,%hd,%hd,%hd,%hd,%hd,%hd,%hd",\r
- (int16_t*)&pPrbElem->nRBStart,\r
- (int16_t*)&pPrbElem->nRBSize,\r
- (int16_t*)&pPrbElem->nStartSymb,\r
- (int16_t*)&pPrbElem->numSymb,\r
- (int16_t*)&pPrbElem->nBeamIndex,\r
- (int16_t*)&pPrbElem->bf_weight_update,\r
- (int16_t*)&pPrbElem->compMethod,\r
- (int16_t*)&pPrbElem->iqWidth,\r
- (int16_t*)&pPrbElem->BeamFormingType);\r
- printf("nPrbElemDl%d: ",section_idx);\r
- printf("nRBStart %d,nRBSize %d,nStartSymb %d,numSymb %d,nBeamIndex %d, bf_weight_update %d compMethod %d, iqWidth %d BeamFormingType %d\n",\r
- pPrbElem->nRBStart,pPrbElem->nRBSize,pPrbElem->nStartSymb,pPrbElem->numSymb,pPrbElem->nBeamIndex, pPrbElem->bf_weight_update, pPrbElem->compMethod, pPrbElem->iqWidth, pPrbElem->BeamFormingType);\r
- }\r
- } else {\r
- printf("Unsupported configuration key [%s]\n", key);\r
- return -1;\r
- }\r
-\r
- return 0;\r
-}\r
-\r
-int parseConfigFile(char *filename, RuntimeConfig *config)\r
-{\r
- char inputLine[MAX_LINE_SIZE] = {0};\r
- int inputLen = 0;\r
- int i;\r
- int lineNum = 0;\r
- char key[MAX_LINE_SIZE] = {0};\r
- char value[MAX_LINE_SIZE] = {0};\r
- FILE *file = fopen(filename, "r");\r
-\r
- if (NULL == file) {\r
- log_err("Error while opening config file from: %s", filename);\r
- return -1;\r
- }\r
-\r
-// init_config(config);\r
-\r
- for (;;) {\r
- if (fgets(inputLine, MAX_LINE_SIZE, file) == NULL) {\r
- if (lineNum > 0) {\r
- printf("%d lines of config file has been read.\n", lineNum);\r
- break;\r
- } else {\r
- printf("Configuration file reading error has occurred.\n");\r
- fclose(file);\r
- return -1;\r
- }\r
- }\r
-\r
- if (inputLine[strlen(inputLine)-1] == '\n')\r
- inputLine[strlen(inputLine)-1] == '\0';\r
-\r
- lineNum++;\r
- inputLen = strlen(inputLine);\r
-\r
- for (i=0; i<inputLen; i++)\r
- if (inputLine[i] == '#') {\r
- inputLine[i] = '\0';\r
- inputLen = i + 1;\r
- break;\r
- }\r
-\r
- for (i=0; i<inputLen; i++)\r
- if (inputLine[i] == '=') {\r
- strncpy(key, inputLine, i);\r
- key[i] = '\0';\r
- trim(key);\r
- if ((i + 1 > inputLen - 1) || (i - 2 > inputLen)) {\r
- log_err("Parsing config file error at line %d", lineNum);\r
- fclose(file);\r
- return -1;\r
- }\r
- strncpy(value, &inputLine[i+1], (sizeof(value) - 1));\r
- value[inputLen-i-2] = '\0';\r
- trim(value);\r
-\r
- if (strlen(key) == 0 || strlen(value) == 0) {\r
- printf("Parsing config file error at line %d", lineNum);\r
- fclose(file);\r
- return -1;\r
- }\r
-\r
- if (fillConfigStruct(config, key, value) != 0) {\r
- fclose(file);\r
- return -1;\r
- }\r
-\r
- break;\r
- }\r
-\r
- memset(&inputLine[0], 0, sizeof(MAX_LINE_SIZE));\r
- memset(&key[0], 0, sizeof(MAX_LINE_SIZE));\r
- memset(&value[0], 0, sizeof(MAX_LINE_SIZE));\r
- }\r
- fclose(file);\r
-\r
- return 0;\r
-}\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief
+ * @file
+ * @ingroup
+ * @author Intel Corporation
+ **/
+
+#include "rte_common.h"
+#include "config.h"
+#include "common.h"
+#include "debug.h"
+
+#include <rte_ethdev.h>
+#include <inttypes.h>
+
+#define MAX_LINE_SIZE 512
+/* Configuration file maximum supported line length */
+
+#define KEY_APP_MODE "appMode"
+#define KEY_XRAN_MODE "xranMode"
+#define KEY_MU_NUMBER "mu"
+#define KEY_NDLABSFREPOINTA "nDLAbsFrePointA"
+#define KEY_NULABSFREPOINTA "nULAbsFrePointA"
+#define KEY_NDLBANDWIDTH "nDLBandwidth"
+#define KEY_NULBANDWIDTH "nULBandwidth"
+#define KEY_NDLFFTSIZE "nDLFftSize"
+#define KEY_NULFFTSIZE "nULFftSize"
+
+#define KEY_NFRAMEDUPLEXTYPE "nFrameDuplexType"
+#define KEY_NTDDPERIOD "nTddPeriod"
+
+#define KEY_SSLOTCONFIG "sSlotConfig"
+
+#define KEY_CC_PER_PORT_NUM "ccNum"
+#define KEY_ANT_NUM "antNum"
+#define KEY_UL_ANT_NUM "antNumUL"
+
+#define KEY_ANT_ELM_TRX_NUM "antElmTRx"
+
+#define KEY_MU_MIMO_UES_NUM "muMimoUEs"
+#define KEY_DLLAYERS_PER_UE "DlLayersPerUe"
+#define KEY_ULLAYERS_PER_UE "UlLayersPerUe"
+#define KEY_FILE_DLBFWUE "DlBfwUe"
+#define KEY_FILE_ULBFWUE "UlBfwUe"
+
+#define KEY_FILE_ULSRS "antSrsC"
+
+
+#define KEY_TTI_PERIOD "ttiPeriod"
+
+#define KEY_MTU_SIZE "MTUSize"
+#define KEY_IO_CORE "ioCore"
+#define KEY_SYSTEM_CORE "systemCore"
+#define KEY_PKT_PROC_CORE "pktProcCore"
+#define KEY_PKT_AUX_CORE "pktAuxCore"
+#define KEY_TIMING_CORE "timingCore"
+
+#define KEY_INSTANCE_ID "instanceId"
+
+#define KEY_LLS_CU_MAC "llsCUMac"
+#define KEY_RU_MAC "ruMac"
+
+#define KEY_FILE_NUMSLOTS "numSlots"
+#define KEY_FILE_AxC "antC"
+#define KEY_FILE_PRACH_AxC "antPrachC"
+
+#define KEY_PRACH_ENABLE "rachEanble"
+#define KEY_SRS_ENABLE "srsEanble"
+
+#define KEY_PRACH_CFGIDX "prachConfigIndex"
+#define KEY_SRS_SYM_IDX "srsSym"
+
+#define KEY_MAX_FRAME_ID "maxFrameId"
+
+
+#define KEY_IQ_SWAP "iqswap"
+#define KEY_HTONS_SWAP "nebyteorderswap"
+#define KEY_COMPRESSION "compression"
+
+#define KEY_BFW_NUM "totalBFWeights"
+
+#define KEY_TADV_CP_DL "Tadv_cp_dl"
+#define KEY_T2A_MIN_CP_DL "T2a_min_cp_dl"
+#define KEY_T2A_MAX_CP_DL "T2a_max_cp_dl"
+#define KEY_T2A_MIN_CP_UL "T2a_min_cp_ul"
+#define KEY_T2A_MAX_CP_UL "T2a_max_cp_ul"
+#define KEY_T2A_MIN_UP "T2a_min_up"
+#define KEY_T2A_MAX_UP "T2a_max_up"
+#define KEY_TA3_MIN "Ta3_min"
+#define KEY_TA3_MAX "Ta3_max"
+#define KEY_T1A_MIN_CP_DL "T1a_min_cp_dl"
+#define KEY_T1A_MAX_CP_DL "T1a_max_cp_dl"
+#define KEY_T1A_MIN_CP_UL "T1a_min_cp_ul"
+#define KEY_T1A_MAX_CP_UL "T1a_max_cp_ul"
+#define KEY_T1A_MIN_UP "T1a_min_up"
+#define KEY_T1A_MAX_UP "T1a_max_up"
+#define KEY_TA4_MIN "Ta4_min"
+#define KEY_TA4_MAX "Ta4_max"
+
+
+#define KEY_CP_ENABLE "CPenable"
+#define KEY_CP_VTAG "c_plane_vlan_tag"
+#define KEY_UP_VTAG "u_plane_vlan_tag"
+#define KEY_DEBUG_STOP "debugStop"
+#define KEY_DEBUG_STOP_CNT "debugStopCount"
+#define KEY_BBDEV_MODE "bbdevMode"
+#define KEY_DYNA_SEC_ENA "DynamicSectionEna"
+#define KEY_ALPHA "Gps_Alpha"
+#define KEY_BETA "Gps_Beta"
+
+#define KEY_NPRBELEM_DL "nPrbElemDl"
+#define KEY_PRBELEM_DL "PrbElemDl"
+
+#define KEY_NPRBELEM_UL "nPrbElemUl"
+#define KEY_PRBELEM_UL "PrbElemUl"
+
+/**
+ * Set runtime configuration parameters to their defaults.
+ *
+ * @todo Initialize missing parameters.
+ */
+static void init_config(RuntimeConfig* config)
+{
+ memset(config , 0, sizeof(RuntimeConfig));
+}
+
+/** - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - **/
+
+static void trim(char* input)
+{
+ uint32_t i;
+ for (i = 0; i<strlen(input); i++)
+ if (input[i] == ' ' || input[i] == '\n' || input[i] == '\t')
+ input[i] = '\0';
+}
+
+static int fillConfigStruct(RuntimeConfig *config, const char *key, const char *value)
+{
+ int32_t parse_res = 0;
+
+ if (strcmp(key, KEY_APP_MODE) == 0){
+ config->appMode = atoi(value);
+ } else if (strcmp(key, KEY_XRAN_MODE) == 0) {
+ config->xranCat = atoi(value);
+ } else if (strcmp(key, KEY_CC_PER_PORT_NUM) == 0) {
+ config->numCC= atoi(value);
+ } else if (strcmp(key, KEY_MU_NUMBER) == 0) {
+ config->mu_number= atoi(value);
+ printf("mu_number: %d\n",config->mu_number);
+ } else if (strcmp(key, KEY_NDLABSFREPOINTA) == 0) {
+ config->nDLAbsFrePointA = atoi(value);
+ printf("nDLAbsFrePointA: %d\n",config->nDLAbsFrePointA);
+ } else if (strcmp(key, KEY_NULABSFREPOINTA) == 0) {
+ config->nULAbsFrePointA = atoi(value);
+ printf("nULAbsFrePointA: %d\n",config->nULAbsFrePointA);
+ } else if (strcmp(key, KEY_NDLBANDWIDTH) == 0) {
+ config->nDLBandwidth = atoi(value);
+ printf("nDLBandwidth: %d\n",config->nDLBandwidth);
+ } else if (strcmp(key, KEY_NULBANDWIDTH) == 0) {
+ config->nULBandwidth = atoi(value);
+ printf("nULBandwidth: %d\n",config->nULBandwidth);
+ } else if (strcmp(key, KEY_NDLFFTSIZE) == 0) {
+ config->nDLFftSize = atoi(value);
+ printf("nDLFftSize: %d\n",config->nDLFftSize);
+ } else if (strcmp(key, KEY_NULFFTSIZE) == 0) {
+ config->nULFftSize = atoi(value);
+ printf("nULFftSize: %d\n",config->nULFftSize);
+ } else if (strcmp(key, KEY_NFRAMEDUPLEXTYPE) == 0) {
+ config->nFrameDuplexType = atoi(value);
+ printf("nFrameDuplexType: %d\n",config->nFrameDuplexType);
+ } else if (strcmp(key, KEY_NTDDPERIOD) == 0) {
+ config->nTddPeriod = atoi(value);
+ printf("nTddPeriod: %d\n",config->nTddPeriod);
+ if (config->nTddPeriod > XRAN_MAX_TDD_PERIODICITY)
+ {
+ printf("nTddPeriod is larger than max allowed, invalid!\n");
+ config->nTddPeriod = XRAN_MAX_TDD_PERIODICITY;
+ }
+ } else if (strncmp(key, KEY_SSLOTCONFIG, strlen(KEY_SSLOTCONFIG)) == 0) {
+ unsigned int slot_num = 0;
+ int i = 0;
+ sscanf(key,"sSlotConfig%u",&slot_num);
+ if (slot_num >= config->nTddPeriod){
+ printf("slot_num %d exceeds TddPeriod\n",slot_num);
+ }
+ else{
+ sscanf(value, "%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x",
+ (uint32_t*)&config->sSlotConfig[slot_num].nSymbolType[0],
+ (uint32_t*)&config->sSlotConfig[slot_num].nSymbolType[1],
+ (uint32_t*)&config->sSlotConfig[slot_num].nSymbolType[2],
+ (uint32_t*)&config->sSlotConfig[slot_num].nSymbolType[3],
+ (uint32_t*)&config->sSlotConfig[slot_num].nSymbolType[4],
+ (uint32_t*)&config->sSlotConfig[slot_num].nSymbolType[5],
+ (uint32_t*)&config->sSlotConfig[slot_num].nSymbolType[6],
+ (uint32_t*)&config->sSlotConfig[slot_num].nSymbolType[7],
+ (uint32_t*)&config->sSlotConfig[slot_num].nSymbolType[8],
+ (uint32_t*)&config->sSlotConfig[slot_num].nSymbolType[9],
+ (uint32_t*)&config->sSlotConfig[slot_num].nSymbolType[10],
+ (uint32_t*)&config->sSlotConfig[slot_num].nSymbolType[11],
+ (uint32_t*)&config->sSlotConfig[slot_num].nSymbolType[12],
+ (uint32_t*)&config->sSlotConfig[slot_num].nSymbolType[13]);
+ printf("sSlotConfig%d: ",slot_num);
+ for (i = 0; i< 14; i++){
+ printf("%d ",config->sSlotConfig[slot_num].nSymbolType[i]);
+ }
+ printf("\n");
+ }
+ } else if (strcmp(key, KEY_ANT_NUM) == 0) {
+ config->numAxc = atoi(value);
+ } else if (strcmp(key, KEY_UL_ANT_NUM) == 0) {
+ config->numUlAxc = atoi(value);
+ }else if (strcmp(key, KEY_ANT_ELM_TRX_NUM) == 0) {
+ config->antElmTRx = atoi(value);
+ printf("antElmTRx %d\n", config->antElmTRx);
+ } else if (strcmp(key, KEY_MU_MIMO_UES_NUM) == 0) {
+ config->muMimoUEs = atoi(value);
+ } else if (strcmp(key, KEY_DLLAYERS_PER_UE) == 0) {
+ config->DlLayersPerUe = atoi(value);
+ } else if (strcmp(key, KEY_ULLAYERS_PER_UE) == 0) {
+ config->UlLayersPerUe = atoi(value);
+ } else if (strcmp(key, KEY_TTI_PERIOD) == 0) {
+ config->ttiPeriod = atoi(value);
+ } else if (strcmp(key, KEY_IQ_SWAP) == 0) {
+ config->iqswap = atoi(value);
+ } else if (strcmp(key, KEY_HTONS_SWAP) == 0) {
+ config->nebyteorderswap = atoi(value);
+ } else if (strcmp(key, KEY_COMPRESSION) == 0) {
+ config->compression = atoi(value);
+ } else if (strcmp(key, KEY_MTU_SIZE) == 0) {
+ config->mtu = atoi(value);
+ printf("mtu %d\n", config->mtu);
+ } else if (strcmp(key, KEY_IO_CORE) == 0) {
+ config->io_core = atoi(value);
+ printf("io_core %d\n", config->io_core);
+ } else if (strcmp(key, KEY_SYSTEM_CORE) == 0) {
+ config->system_core = atoi(value);
+ printf("system_core -c %" PRIx64 "\n", config->system_core);
+ } else if (strcmp(key, KEY_PKT_PROC_CORE) == 0) {
+ config->pkt_proc_core = atoi(value);
+ printf("pkt_proc_core -c %" PRIx64 "\n", config->pkt_proc_core);
+ } else if (strcmp(key, KEY_PKT_AUX_CORE) == 0) {
+ config->pkt_aux_core = atoi(value);
+ printf("pkt_aux_core -c %" PRIx64 "\n", config->pkt_aux_core);
+ } else if (strcmp(key, KEY_TIMING_CORE) == 0) {
+ config->timing_core = atoi(value);
+ printf("timing_core -c %" PRIx64 "\n", config->timing_core);
+ }else if (strcmp(key, KEY_INSTANCE_ID) == 0) {
+ config->instance_id = atoi(value);
+ printf("instance_id %d\n", config->instance_id);
+ }else if (strcmp(key, KEY_LLS_CU_MAC) == 0) {
+ sscanf(value, "%02x:%02x:%02x:%02x:%02x:%02x", (uint32_t*)&config->o_du_addr.addr_bytes[0],
+ (uint32_t*)&config->o_du_addr.addr_bytes[1],
+ (uint32_t*)&config->o_du_addr.addr_bytes[2],
+ (uint32_t*)&config->o_du_addr.addr_bytes[3],
+ (uint32_t*)&config->o_du_addr.addr_bytes[4],
+ (uint32_t*)&config->o_du_addr.addr_bytes[5]);
+
+ printf("lls-CU MAC address: %02X:%02X:%02X:%02X:%02X:%02X\n",
+ config->o_du_addr.addr_bytes[0],
+ config->o_du_addr.addr_bytes[1],
+ config->o_du_addr.addr_bytes[2],
+ config->o_du_addr.addr_bytes[3],
+ config->o_du_addr.addr_bytes[4],
+ config->o_du_addr.addr_bytes[5]);
+
+ } else if (strcmp(key, KEY_RU_MAC) == 0) {
+ sscanf(value, "%02x:%02x:%02x:%02x:%02x:%02x", (uint32_t*)&config->o_ru_addr.addr_bytes[0],
+ (uint32_t*)&config->o_ru_addr.addr_bytes[1],
+ (uint32_t*)&config->o_ru_addr.addr_bytes[2],
+ (uint32_t*)&config->o_ru_addr.addr_bytes[3],
+ (uint32_t*)&config->o_ru_addr.addr_bytes[4],
+ (uint32_t*)&config->o_ru_addr.addr_bytes[5]);
+
+ printf("RU MAC address: %02X:%02X:%02X:%02X:%02X:%02X\n",
+ config->o_ru_addr.addr_bytes[0],
+ config->o_ru_addr.addr_bytes[1],
+ config->o_ru_addr.addr_bytes[2],
+ config->o_ru_addr.addr_bytes[3],
+ config->o_ru_addr.addr_bytes[4],
+ config->o_ru_addr.addr_bytes[5]);
+ } else if (strcmp(key, KEY_FILE_NUMSLOTS) == 0) {
+ config->numSlots = atoi(value);
+ printf("numSlots: %d\n",config->numSlots);
+ }else if (strncmp(key, KEY_FILE_AxC, strlen(KEY_FILE_AxC)) == 0) {
+ unsigned int ant_num = 0;
+ sscanf(key,"antC%02u",&ant_num);
+ if (ant_num >= MAX_ANT_CARRIER_SUPPORTED) {
+ printf("antC%d exceeds max antenna supported\n",ant_num);
+ } else {
+ strncpy(&config->ant_file[ant_num][0], value, strlen(value));
+ printf("antC%d: %s\n",ant_num, config->ant_file[ant_num]);
+ }
+ } else if (strncmp(key, KEY_FILE_DLBFWUE, strlen(KEY_FILE_DLBFWUE)) == 0) {
+ unsigned int ue_num = 0;
+ sscanf(key,"DlBfwUe%02u",&ue_num);
+ if (ue_num >= MAX_ANT_CARRIER_SUPPORTED) {
+ printf("DlBfwUe%d exceeds max streams supported\n",ue_num);
+ } else {
+ strncpy(&config->dl_bfw_file[ue_num][0], value, strlen(value));
+ printf("DlBfwUe%d: %s\n",ue_num, config->dl_bfw_file[ue_num]);
+ }
+ }else if (strncmp(key, KEY_FILE_ULBFWUE, strlen(KEY_FILE_ULBFWUE)) == 0) {
+ unsigned int ue_num = 0;
+ sscanf(key,"UlBfwUe%02u",&ue_num);
+ if (ue_num >= MAX_ANT_CARRIER_SUPPORTED) {
+ printf("UlBfwUe%d exceeds max streams supported\n",ue_num);
+ } else {
+ strncpy(&config->ul_bfw_file[ue_num][0], value, strlen(value));
+ printf("UlBfwUe%d: %s\n",ue_num, config->ul_bfw_file[ue_num]);
+ }
+ }else if (strncmp(key, KEY_FILE_ULSRS, strlen(KEY_FILE_ULSRS)) == 0) {
+ unsigned int srs_ant = 0;
+ sscanf(key,"antSrsC%02u",&srs_ant);
+ if (srs_ant >= MAX_ANT_CARRIER_SUPPORTED_CAT_B) {
+ printf("antSrsC%d exceeds max ant elemnets supported [%d]\n", srs_ant, MAX_ANT_CARRIER_SUPPORTED_CAT_B);
+ } else {
+ strncpy(&config->ul_srs_file[srs_ant][0], value, strlen(value));
+ printf("antSrsC%d: %s\n",srs_ant, config->ul_srs_file[srs_ant]);
+ }
+ } else if (strcmp(key, KEY_PRACH_ENABLE) == 0) {
+ config->enablePrach = atoi(value);
+ printf("Prach enable: %d\n",config->enablePrach);
+ }else if (strcmp(key, KEY_MAX_FRAME_ID) == 0) {
+ config->maxFrameId = atoi(value);
+ printf("maxFrameId: %d\n",config->maxFrameId);
+ } else if (strcmp(key, KEY_SRS_ENABLE) == 0) {
+ config->enableSrs = atoi(value);
+ printf("Srs enable: %d\n",config->enablePrach);
+ } else if (strcmp(key, KEY_PRACH_CFGIDX) == 0) {
+ config->prachConfigIndex = atoi(value);
+ printf("Prach config index: %d\n",config->prachConfigIndex);
+ } else if (strcmp(key, KEY_SRS_SYM_IDX) == 0) {
+ config->srsSymMask = atoi(value);
+ printf("Srs symbol [0-13]: %d\n",config->srsSymMask);
+ } else if (strncmp(key, KEY_FILE_PRACH_AxC, strlen(KEY_FILE_PRACH_AxC)) == 0) {
+ unsigned int ant_num = 0;
+ sscanf(key,"antPrachC%02u",&ant_num);
+ if (ant_num >= MAX_ANT_CARRIER_SUPPORTED)
+ {
+ printf("antC%d exceeds max antenna supported\n",ant_num);
+ }
+ else{
+ strncpy(&config->prach_file[ant_num][0], value, strlen(value));
+ printf("antPrachC%d: %s\n",ant_num, config->prach_file[ant_num]);
+ }
+ } else if (strcmp(key, KEY_BFW_NUM) == 0) {
+ config->totalBfWeights = atoi(value);
+ printf("%s : %d\n",KEY_BFW_NUM, config->totalBfWeights);
+ /* timing */
+ } else if (strcmp(key, KEY_TADV_CP_DL ) == 0) {
+ config->Tadv_cp_dl = atoi(value);
+ printf("Tadv_cp_dl: %d\n",config->Tadv_cp_dl);
+ } else if (strcmp(key, KEY_T2A_MIN_CP_DL ) == 0) {
+ config->T2a_min_cp_dl = atoi(value);
+ printf("T2a_min_cp_dl: %d\n",config->T2a_min_cp_dl);
+ } else if (strcmp(key, KEY_T2A_MAX_CP_DL ) == 0) {
+ config->T2a_max_cp_dl = atoi(value);
+ printf("T2a_max_cp_dl: %d\n",config->T2a_max_cp_dl);
+ } else if (strcmp(key, KEY_T2A_MIN_CP_UL ) == 0) {
+ config->T2a_min_cp_ul = atoi(value);
+ printf("T2a_min_cp_ul: %d\n",config->T2a_min_cp_ul);
+ } else if (strcmp(key, KEY_T2A_MAX_CP_UL ) == 0) {
+ config->T2a_max_cp_ul = atoi(value);
+ printf("T2a_max_cp_ul: %d\n",config->T2a_max_cp_ul);
+ } else if (strcmp(key, KEY_T2A_MIN_UP ) == 0) {
+ config->T2a_min_up = atoi(value);
+ printf("T2a_min_up: %d\n",config->T2a_min_up);
+ } else if (strcmp(key, KEY_T2A_MAX_UP ) == 0) {
+ config->T2a_max_up = atoi(value);
+ printf("T2a_max_up: %d\n",config->T2a_max_up);
+ } else if (strcmp(key, KEY_TA3_MIN ) == 0) {
+ config->Ta3_min = atoi(value);
+ printf("Ta3_min: %d\n",config->Ta3_min);
+ } else if (strcmp(key, KEY_TA3_MAX ) == 0) {
+ config->Ta3_max = atoi(value);
+ printf("Ta3_max: %d\n",config->Ta3_max);
+ } else if (strcmp(key, KEY_T1A_MIN_CP_DL ) == 0) {
+ config->T1a_min_cp_dl = atoi(value);
+ printf("T1a_min_cp_dl: %d\n",config->T1a_min_cp_dl);
+ } else if (strcmp(key, KEY_T1A_MAX_CP_DL ) == 0) {
+ config->T1a_max_cp_dl = atoi(value);
+ printf("T1a_max_cp_dl: %d\n",config->T1a_max_cp_dl);
+ } else if (strcmp(key, KEY_T1A_MIN_CP_UL ) == 0) {
+ config->T1a_min_cp_ul = atoi(value);
+ printf("T1a_min_cp_ul: %d\n",config->T1a_min_cp_ul);
+ } else if (strcmp(key, KEY_T1A_MAX_CP_UL ) == 0) {
+ config->T1a_max_cp_ul = atoi(value);
+ printf("T1a_max_cp_ul: %d\n",config->T1a_max_cp_ul);
+ } else if (strcmp(key, KEY_T1A_MIN_UP ) == 0) {
+ config->T1a_min_up = atoi(value);
+ printf("T1a_min_up: %d\n",config->T1a_min_up);
+ } else if (strcmp(key, KEY_T1A_MAX_UP ) == 0) {
+ config->T1a_max_up = atoi(value);
+ printf("T1a_max_up: %d\n",config->T1a_max_up);
+ } else if (strcmp(key, KEY_TA4_MIN ) == 0) {
+ config->Ta4_min = atoi(value);
+ printf("Ta4_min: %d\n",config->Ta4_min);
+ } else if (strcmp(key, KEY_TA4_MAX ) == 0) {
+ config->Ta4_max = atoi(value);
+ printf("Ta4_max: %d\n",config->Ta4_max);
+ /* end of timing */
+ } else if (strcmp(key, KEY_CP_ENABLE ) == 0) {
+ config->enableCP = atoi(value);
+ printf("CPenable: %d\n",config->enableCP);
+ } else if (strcmp(key, KEY_DEBUG_STOP ) == 0) {
+ config->debugStop = atoi(value);
+ printf("debugStop: %d\n",config->debugStop);
+ } else if (strcmp(key, KEY_DEBUG_STOP_CNT) == 0) {
+ config->debugStopCount = atoi(value);
+ printf("debugStopCount: %d\n",config->debugStopCount);
+ } else if (strcmp(key, KEY_BBDEV_MODE) == 0) {
+ config->bbdevMode = atoi(value);
+ printf("bbdevMode: %d\n",config->debugStopCount);
+ } else if (strcmp(key, KEY_DYNA_SEC_ENA) == 0) {
+ config->DynamicSectionEna = atoi(value);
+ printf("DynamicSectionEna: %d\n",config->DynamicSectionEna);
+ } else if (strcmp(key, KEY_ALPHA) == 0) {
+ config->GPS_Alpha = atoi(value);
+ printf("GPS_Alpha: %d\n",config->GPS_Alpha);
+ } else if (strcmp(key, KEY_BETA) == 0) {
+ config->GPS_Beta = atoi(value);
+ printf("GPS_Beta: %d\n",config->GPS_Beta);
+ } else if (strcmp(key, KEY_CP_VTAG ) == 0) {
+ config->cp_vlan_tag = atoi(value);
+ printf("cp_vlan_tag: %d\n",config->cp_vlan_tag);
+ } else if (strcmp(key, KEY_UP_VTAG ) == 0) {
+ config->up_vlan_tag = atoi(value);
+ printf("up_vlan_tag: %d\n",config->up_vlan_tag);
+ } else if (strcmp(key, KEY_NPRBELEM_UL ) == 0) {
+ config->PrbMapUl.nPrbElm = atoi(value);
+ if (config->PrbMapUl.nPrbElm > XRAN_MAX_PRBS)
+ {
+ printf("nTddPeriod is larger than max allowed, invalid!\n");
+ config->PrbMapUl.nPrbElm = XRAN_MAX_PRBS;
+ }
+ printf("nPrbElemUl: %d\n",config->PrbMapUl.nPrbElm);
+ } else if (strncmp(key, KEY_PRBELEM_UL, strlen(KEY_PRBELEM_UL)) == 0) {
+ unsigned int section_idx = 0;
+ sscanf(key,"PrbElemUl%u",§ion_idx);
+ if (section_idx >= config->PrbMapUl.nPrbElm){
+ printf("section_idx %d exceeds nPrbElem\n",section_idx);
+ }
+ else{
+ struct xran_prb_elm *pPrbElem = &config->PrbMapUl.prbMap[section_idx];
+ sscanf(value, "%hd,%hd,%hd,%hd,%hd,%hd,%hd,%hd,%hd",
+ (int16_t*)&pPrbElem->nRBStart,
+ (int16_t*)&pPrbElem->nRBSize,
+ (int16_t*)&pPrbElem->nStartSymb,
+ (int16_t*)&pPrbElem->numSymb,
+ (int16_t*)&pPrbElem->nBeamIndex,
+ (int16_t*)&pPrbElem->bf_weight_update,
+ (int16_t*)&pPrbElem->compMethod,
+ (int16_t*)&pPrbElem->iqWidth,
+ (int16_t*)&pPrbElem->BeamFormingType);
+ printf("nPrbElemUl%d: ",section_idx);
+ printf("nRBStart %d,nRBSize %d,nStartSymb %d,numSymb %d,nBeamIndex %d, bf_weight_update %d compMethod %d, iqWidth %d BeamFormingType %d\n",
+ pPrbElem->nRBStart,pPrbElem->nRBSize,pPrbElem->nStartSymb,pPrbElem->numSymb,pPrbElem->nBeamIndex, pPrbElem->bf_weight_update, pPrbElem->compMethod, pPrbElem->iqWidth, pPrbElem->BeamFormingType);
+ }
+ }else if (strcmp(key, KEY_NPRBELEM_DL ) == 0) {
+ config->PrbMapDl.nPrbElm = atoi(value);
+ if (config->PrbMapDl.nPrbElm > XRAN_MAX_PRBS)
+ {
+ printf("nTddPeriod is larger than max allowed, invalid!\n");
+ config->PrbMapDl.nPrbElm = XRAN_MAX_PRBS;
+ }
+ printf("nPrbElemDl: %d\n",config->PrbMapDl.nPrbElm);
+ } else if (strncmp(key, KEY_PRBELEM_DL, strlen(KEY_PRBELEM_DL)) == 0) {
+ unsigned int section_idx = 0;
+ sscanf(key,"PrbElemDl%u",§ion_idx);
+ if (section_idx >= config->PrbMapDl.nPrbElm){
+ printf("section_idx %d exceeds nPrbElem\n",section_idx);
+ }
+ else{
+ struct xran_prb_elm *pPrbElem = &config->PrbMapDl.prbMap[section_idx];
+ sscanf(value, "%hd,%hd,%hd,%hd,%hd,%hd,%hd,%hd,%hd",
+ (int16_t*)&pPrbElem->nRBStart,
+ (int16_t*)&pPrbElem->nRBSize,
+ (int16_t*)&pPrbElem->nStartSymb,
+ (int16_t*)&pPrbElem->numSymb,
+ (int16_t*)&pPrbElem->nBeamIndex,
+ (int16_t*)&pPrbElem->bf_weight_update,
+ (int16_t*)&pPrbElem->compMethod,
+ (int16_t*)&pPrbElem->iqWidth,
+ (int16_t*)&pPrbElem->BeamFormingType);
+ printf("nPrbElemDl%d: ",section_idx);
+ printf("nRBStart %d,nRBSize %d,nStartSymb %d,numSymb %d,nBeamIndex %d, bf_weight_update %d compMethod %d, iqWidth %d BeamFormingType %d\n",
+ pPrbElem->nRBStart,pPrbElem->nRBSize,pPrbElem->nStartSymb,pPrbElem->numSymb,pPrbElem->nBeamIndex, pPrbElem->bf_weight_update, pPrbElem->compMethod, pPrbElem->iqWidth, pPrbElem->BeamFormingType);
+ }
+ } else {
+ printf("Unsupported configuration key [%s]\n", key);
+ return -1;
+ }
+
+ return 0;
+}
+
+int parseConfigFile(char *filename, RuntimeConfig *config)
+{
+ char inputLine[MAX_LINE_SIZE] = {0};
+ int inputLen = 0;
+ int i;
+ int lineNum = 0;
+ char key[MAX_LINE_SIZE] = {0};
+ char value[MAX_LINE_SIZE] = {0};
+ FILE *file = fopen(filename, "r");
+
+ if (NULL == file) {
+ log_err("Error while opening config file from: %s", filename);
+ return -1;
+ }
+
+// init_config(config);
+
+ for (;;) {
+ if (fgets(inputLine, MAX_LINE_SIZE, file) == NULL) {
+ if (lineNum > 0) {
+ printf("%d lines of config file has been read.\n", lineNum);
+ break;
+ } else {
+ printf("Configuration file reading error has occurred.\n");
+ fclose(file);
+ return -1;
+ }
+ }
+
+ if (inputLine[strlen(inputLine)-1] == '\n')
+ inputLine[strlen(inputLine)-1] == '\0';
+
+ lineNum++;
+ inputLen = strlen(inputLine);
+
+ for (i=0; i<inputLen; i++)
+ if (inputLine[i] == '#') {
+ inputLine[i] = '\0';
+ inputLen = i + 1;
+ break;
+ }
+
+ for (i=0; i<inputLen; i++)
+ if (inputLine[i] == '=') {
+ strncpy(key, inputLine, i);
+ key[i] = '\0';
+ trim(key);
+ if ((i + 1 > inputLen - 1) || (i - 2 > inputLen)) {
+ log_err("Parsing config file error at line %d", lineNum);
+ fclose(file);
+ return -1;
+ }
+ strncpy(value, &inputLine[i+1], (sizeof(value) - 1));
+ value[inputLen-i-2] = '\0';
+ trim(value);
+
+ if (strlen(key) == 0 || strlen(value) == 0) {
+ printf("Parsing config file error at line %d", lineNum);
+ fclose(file);
+ return -1;
+ }
+
+ if (fillConfigStruct(config, key, value) != 0) {
+ fclose(file);
+ return -1;
+ }
+
+ break;
+ }
+
+ memset(&inputLine[0], 0, sizeof(MAX_LINE_SIZE));
+ memset(&key[0], 0, sizeof(MAX_LINE_SIZE));
+ memset(&value[0], 0, sizeof(MAX_LINE_SIZE));
+ }
+ fclose(file);
+
+ return 0;
+}
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/**\r
- * @brief\r
- * @file\r
- * @ingroup\r
- * @author Intel Corporation\r
- **/\r
-\r
-#ifndef _SAMPLEAPP__CONFIG_H_\r
-#define _SAMPLEAPP__CONFIG_H_\r
-\r
-#include <stdint.h>\r
-#include <rte_ether.h>\r
-#include "xran_fh_o_du.h"\r
-\r
-/** Run time configuration of application */\r
-typedef struct _RuntimeConfig\r
-{\r
- uint8_t appMode; /**< Application mode: lls-CU or RU */\r
- uint8_t xranCat; /**< xran mode: Categoty A | Category B */\r
- uint8_t numCC; /**< Number of CC per ports supported by RU */\r
- uint8_t numAxc; /**< Number of Antenna Carriers per CC */\r
- uint8_t numUlAxc; /**< Number of Antenna Carriers per CC for UL (Cat B) */\r
- uint32_t antElmTRx; /**< Number of antenna elements for TX and RX */\r
- uint32_t muMimoUEs; /**< Number of UEs (with 1 RX ant)/beams */\r
-\r
- uint32_t DlLayersPerUe; /**< Number of DL layer per UE */\r
- uint32_t UlLayersPerUe; /**< Number of UL layer per UE */\r
-\r
- uint32_t ttiPeriod; /**< TTI period */\r
- uint32_t testVect; /**< Test Signal to send */\r
- struct ether_addr o_du_addr; /**< lls-CU Ethernet Mac Address */\r
- struct ether_addr o_ru_addr; /**< RU Ethernet Mac Address */\r
- struct ether_addr tmp_addr; /**< Temp Ethernet Mac Address */\r
-\r
- uint32_t instance_id; /**< Instance ID of application */\r
- uint32_t io_core; /**< Core used for IO */\r
- uint64_t system_core; /* <system core ID> */\r
- uint64_t pkt_proc_core;\r
- uint64_t pkt_aux_core;\r
- uint64_t timing_core;\r
- \r
- uint32_t mtu; /**< maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single\r
- xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) */\r
- int numSlots; /**< number of slots in IQ vector */\r
- char ant_file[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANTENNA_NR][512]; /**< file to use for test vector */\r
- char prach_file[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANTENNA_NR][512]; /**< file to use for test vector */\r
-\r
- char dl_bfw_file [XRAN_MAX_SECTOR_NR*XRAN_MAX_ANTENNA_NR][512]; /**< file with beamforming weights for DL streams */\r
- char ul_bfw_file [XRAN_MAX_SECTOR_NR*XRAN_MAX_ANTENNA_NR][512]; /**< file with beamforming weights for UL streams */\r
-\r
- char ul_srs_file [XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR][512]; /**< file with SRS content for UL antenna elements */\r
-\r
- /* prach config */\r
- uint8_t enablePrach; /**< enable PRACH */\r
- uint8_t prachOffset; /**< Sets the PRACH position in frequency / subcarrier position, n_PRBoffset^RA and is expressed as a physical resource block number.\r
- Set by SIB2, prach-FreqOffset in E-UTRA. */\r
-\r
- uint8_t prachConfigIndex; /**< TS36.211 - Table 5.7.1-2 : PRACH Configuration Index */\r
- uint8_t iqswap; /**< do swap of IQ before send to ETH */\r
- uint8_t nebyteorderswap; /**< do swap of byte order from host byte order to network byte order. ETH */\r
- uint8_t compression; /**< enable use case with compression */\r
-\r
- uint16_t totalBfWeights; /**< The total number of beamforming weights on RU */\r
-\r
- uint8_t enableSrs; /**< enable SRS (valid for Cat B only) */\r
- uint16_t srsSymMask; /**< SRS symbol mask [014] within S/U slot [0-13] def is 13 */\r
-\r
- uint16_t maxFrameId; /**< max value of frame id */\r
-\r
- uint16_t Tadv_cp_dl;\r
- uint16_t T2a_min_cp_dl;\r
- uint16_t T2a_max_cp_dl;\r
- uint16_t T2a_min_cp_ul;\r
- uint16_t T2a_max_cp_ul;\r
- uint16_t T2a_min_up;\r
- uint16_t T2a_max_up;\r
- uint16_t Ta3_min;\r
- uint16_t Ta3_max;\r
- uint16_t T1a_min_cp_dl;\r
- uint16_t T1a_max_cp_dl;\r
- uint16_t T1a_min_cp_ul;\r
- uint16_t T1a_max_cp_ul;\r
- uint16_t T1a_min_up;\r
- uint16_t T1a_max_up;\r
- uint16_t Ta4_min;\r
- uint16_t Ta4_max;\r
-\r
- uint8_t enableCP; /**< enable C-plane */\r
- uint8_t cp_vlan_tag; /**< C-plane vlan tag */\r
- uint8_t up_vlan_tag; /**< U-plane vlan tag */\r
-\r
- int32_t debugStop;\r
- int32_t debugStopCount;\r
- int32_t bbdevMode;\r
- int32_t DynamicSectionEna;\r
- int32_t GPS_Alpha;\r
- int32_t GPS_Beta;\r
-\r
- uint8_t mu_number; /**< Mu numner as per 3GPP */\r
- uint32_t nDLAbsFrePointA; /**< Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 */\r
- uint32_t nULAbsFrePointA; /**< Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 */\r
- uint32_t nDLBandwidth; /**< Carrier bandwidth for in MHz. Value: 5->400 */\r
- uint32_t nULBandwidth; /**< Carrier bandwidth for in MHz. Value: 5->400 */\r
- uint32_t nDLFftSize; /**< DL FFT size */\r
- uint32_t nULFftSize; /**< UL FFT size */\r
-\r
-\r
- uint8_t nFrameDuplexType;\r
- uint8_t nTddPeriod;\r
- struct xran_slot_config sSlotConfig[XRAN_MAX_TDD_PERIODICITY];\r
- struct xran_prb_map PrbMapDl;\r
- struct xran_prb_map PrbMapUl;\r
-} RuntimeConfig;\r
-\r
-/**\r
- * Parse application configuration file.\r
- *\r
- * @param filename The name of the configuration file to be parsed.\r
- * @param config The configuration structure to be filled with parsed data. */\r
-int parseConfigFile(char *filename, RuntimeConfig *config);\r
-\r
-#endif /* _SAMPLEAPP__CONFIG_H_ */\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief
+ * @file
+ * @ingroup
+ * @author Intel Corporation
+ **/
+
+#ifndef _SAMPLEAPP__CONFIG_H_
+#define _SAMPLEAPP__CONFIG_H_
+
+#include <stdint.h>
+#include <rte_ether.h>
+#include "xran_fh_o_du.h"
+
+/** Run time configuration of application */
+typedef struct _RuntimeConfig
+{
+ uint8_t appMode; /**< Application mode: lls-CU or RU */
+ uint8_t xranCat; /**< xran mode: Categoty A | Category B */
+ uint8_t numCC; /**< Number of CC per ports supported by RU */
+ uint8_t numAxc; /**< Number of Antenna Carriers per CC */
+ uint8_t numUlAxc; /**< Number of Antenna Carriers per CC for UL (Cat B) */
+ uint32_t antElmTRx; /**< Number of antenna elements for TX and RX */
+ uint32_t muMimoUEs; /**< Number of UEs (with 1 RX ant)/beams */
+
+ uint32_t DlLayersPerUe; /**< Number of DL layer per UE */
+ uint32_t UlLayersPerUe; /**< Number of UL layer per UE */
+
+ uint32_t ttiPeriod; /**< TTI period */
+ uint32_t testVect; /**< Test Signal to send */
+ struct ether_addr o_du_addr; /**< lls-CU Ethernet Mac Address */
+ struct ether_addr o_ru_addr; /**< RU Ethernet Mac Address */
+ struct ether_addr tmp_addr; /**< Temp Ethernet Mac Address */
+
+ uint32_t instance_id; /**< Instance ID of application */
+ uint32_t io_core; /**< Core used for IO */
+ uint64_t system_core; /* <system core ID> */
+ uint64_t pkt_proc_core;
+ uint64_t pkt_aux_core;
+ uint64_t timing_core;
+
+ uint32_t mtu; /**< maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) */
+ int numSlots; /**< number of slots in IQ vector */
+ char ant_file[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANTENNA_NR][512]; /**< file to use for test vector */
+ char prach_file[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANTENNA_NR][512]; /**< file to use for test vector */
+
+ char dl_bfw_file [XRAN_MAX_SECTOR_NR*XRAN_MAX_ANTENNA_NR][512]; /**< file with beamforming weights for DL streams */
+ char ul_bfw_file [XRAN_MAX_SECTOR_NR*XRAN_MAX_ANTENNA_NR][512]; /**< file with beamforming weights for UL streams */
+
+ char ul_srs_file [XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR][512]; /**< file with SRS content for UL antenna elements */
+
+ /* prach config */
+ uint8_t enablePrach; /**< enable PRACH */
+ uint8_t prachOffset; /**< Sets the PRACH position in frequency / subcarrier position, n_PRBoffset^RA and is expressed as a physical resource block number.
+ Set by SIB2, prach-FreqOffset in E-UTRA. */
+
+ uint8_t prachConfigIndex; /**< TS36.211 - Table 5.7.1-2 : PRACH Configuration Index */
+ uint8_t iqswap; /**< do swap of IQ before send to ETH */
+ uint8_t nebyteorderswap; /**< do swap of byte order from host byte order to network byte order. ETH */
+ uint8_t compression; /**< enable use case with compression */
+
+ uint16_t totalBfWeights; /**< The total number of beamforming weights on RU */
+
+ uint8_t enableSrs; /**< enable SRS (valid for Cat B only) */
+ uint16_t srsSymMask; /**< SRS symbol mask [014] within S/U slot [0-13] def is 13 */
+
+ uint16_t maxFrameId; /**< max value of frame id */
+
+ uint16_t Tadv_cp_dl;
+ uint16_t T2a_min_cp_dl;
+ uint16_t T2a_max_cp_dl;
+ uint16_t T2a_min_cp_ul;
+ uint16_t T2a_max_cp_ul;
+ uint16_t T2a_min_up;
+ uint16_t T2a_max_up;
+ uint16_t Ta3_min;
+ uint16_t Ta3_max;
+ uint16_t T1a_min_cp_dl;
+ uint16_t T1a_max_cp_dl;
+ uint16_t T1a_min_cp_ul;
+ uint16_t T1a_max_cp_ul;
+ uint16_t T1a_min_up;
+ uint16_t T1a_max_up;
+ uint16_t Ta4_min;
+ uint16_t Ta4_max;
+
+ uint8_t enableCP; /**< enable C-plane */
+ uint8_t cp_vlan_tag; /**< C-plane vlan tag */
+ uint8_t up_vlan_tag; /**< U-plane vlan tag */
+
+ int32_t debugStop;
+ int32_t debugStopCount;
+ int32_t bbdevMode;
+ int32_t DynamicSectionEna;
+ int32_t GPS_Alpha;
+ int32_t GPS_Beta;
+
+ uint8_t mu_number; /**< Mu numner as per 3GPP */
+ uint32_t nDLAbsFrePointA; /**< Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 */
+ uint32_t nULAbsFrePointA; /**< Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 */
+ uint32_t nDLBandwidth; /**< Carrier bandwidth for in MHz. Value: 5->400 */
+ uint32_t nULBandwidth; /**< Carrier bandwidth for in MHz. Value: 5->400 */
+ uint32_t nDLFftSize; /**< DL FFT size */
+ uint32_t nULFftSize; /**< UL FFT size */
+
+
+ uint8_t nFrameDuplexType;
+ uint8_t nTddPeriod;
+ struct xran_slot_config sSlotConfig[XRAN_MAX_TDD_PERIODICITY];
+ struct xran_prb_map PrbMapDl;
+ struct xran_prb_map PrbMapUl;
+} RuntimeConfig;
+
+/**
+ * Parse application configuration file.
+ *
+ * @param filename The name of the configuration file to be parsed.
+ * @param config The configuration structure to be filled with parsed data. */
+int parseConfigFile(char *filename, RuntimeConfig *config);
+
+#endif /* _SAMPLEAPP__CONFIG_H_ */
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/**\r
- * @brief\r
- * @file\r
- * @ingroup\r
- * @author Intel Corporation\r
- **/\r
-\r
-#ifndef _SAMPLEAPP__DEBUG_H_\r
-#define _SAMPLEAPP__DEBUG_H_\r
-\r
-#include <stdio.h>\r
-\r
-#include "config.h"\r
-\r
-#define MAX_FILE_NAME_LEN (512)\r
-#define MAX_PATH_NAME_LEN (1024)\r
-\r
-#ifdef _DEBUG\r
- #define log_dbg(fmt, ...) \\r
- fprintf(stderr, \\r
- "DEBUG: %s(%d): " fmt "\n", \\r
- __FILE__, \\r
- __LINE__, ##__VA_ARGS__)\r
-#else\r
- #define log_dbg(fmt, ...)\r
-#endif\r
-\r
-#if defined(_DEBUG) || defined(_VERBOSE)\r
- #define log_wrn(fmt, ...) \\r
- fprintf( \\r
- stderr, \\r
- "WARNING: %s(%d): " fmt "\n", \\r
- __FILE__, \\r
- __LINE__, ##__VA_ARGS__)\r
-#else\r
- #define log_dbg(fmt, ...)\r
- #define log_wrn(fmt, ...)\r
-#endif\r
-\r
-\r
-#define log_err(fmt, ...) \\r
- fprintf(stderr, \\r
- "ERROR: %s(%d): " fmt "\n", \\r
- __FILE__, \\r
- __LINE__, ##__VA_ARGS__)\r
-\r
-\r
-inline void ShowData(void* ptr, unsigned int size)\r
-{\r
- uint8_t *d = (uint8_t *)ptr;\r
- unsigned int i;\r
-\r
- for(i = 0; i < size; i++)\r
- {\r
- if ( !(i & 0xf) )\r
- printf("\n");\r
- printf("%02x ", d[i]);\r
- }\r
- printf("\n");\r
-}\r
-\r
-\r
-#endif /* _SAMPLEAPP__DEBUG_H_ */\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief
+ * @file
+ * @ingroup
+ * @author Intel Corporation
+ **/
+
+#ifndef _SAMPLEAPP__DEBUG_H_
+#define _SAMPLEAPP__DEBUG_H_
+
+#include <stdio.h>
+
+#include "config.h"
+
+#define MAX_FILE_NAME_LEN (512)
+#define MAX_PATH_NAME_LEN (1024)
+
+#ifdef _DEBUG
+ #define log_dbg(fmt, ...) \
+ fprintf(stderr, \
+ "DEBUG: %s(%d): " fmt "\n", \
+ __FILE__, \
+ __LINE__, ##__VA_ARGS__)
+#else
+ #define log_dbg(fmt, ...)
+#endif
+
+#if defined(_DEBUG) || defined(_VERBOSE)
+ #define log_wrn(fmt, ...) \
+ fprintf( \
+ stderr, \
+ "WARNING: %s(%d): " fmt "\n", \
+ __FILE__, \
+ __LINE__, ##__VA_ARGS__)
+#else
+ #define log_dbg(fmt, ...)
+ #define log_wrn(fmt, ...)
+#endif
+
+
+#define log_err(fmt, ...) \
+ fprintf(stderr, \
+ "ERROR: %s(%d): " fmt "\n", \
+ __FILE__, \
+ __LINE__, ##__VA_ARGS__)
+
+
+inline void ShowData(void* ptr, unsigned int size)
+{
+ uint8_t *d = (uint8_t *)ptr;
+ unsigned int i;
+
+ for(i = 0; i < size; i++)
+ {
+ if ( !(i & 0xf) )
+ printf("\n");
+ printf("%02x ", d[i]);
+ }
+ printf("\n");
+}
+
+
+#endif /* _SAMPLEAPP__DEBUG_H_ */
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-#define _GNU_SOURCE\r
-#include <unistd.h>\r
-#include <sys/syscall.h>\r
-#include <sched.h>\r
-#include <assert.h>\r
-#include <err.h>\r
-#include <libgen.h>\r
-#include <sys/time.h>\r
-#include <time.h>\r
-#include <unistd.h>\r
-#include <stdio.h>\r
-#include <fcntl.h>\r
-#include <pthread.h>\r
-#include <sys/stat.h>\r
-#include <unistd.h>\r
-\r
-#include "common.h"\r
-#include "config.h"\r
-#include "xran_mlog_lnx.h"\r
-\r
-#include "xran_fh_o_du.h"\r
-#include "xran_compression.h"\r
-#include "xran_cp_api.h"\r
-#include "xran_sync_api.h"\r
-#include "xran_mlog_task_id.h"\r
-\r
-#define MAX_BBU_POOL_CORE_MASK (4)\r
-\r
-\r
-#define SW_FPGA_TOTAL_BUFFER_LEN 4*1024*1024*1024\r
-#define SW_FPGA_SEGMENT_BUFFER_LEN 1*1024*1024*1024\r
-#define SW_FPGA_FH_TOTAL_BUFFER_LEN 1*1024*1024*1024\r
-#define FPGA_TO_SW_PRACH_RX_BUFFER_LEN (8192)\r
-\r
-#define NSEC_PER_SEC 1000000000\r
-\r
-#define MAX_PKT_BURST (448+4) // 4x14x8\r
-#define N_MAX_BUFFER_SEGMENT MAX_PKT_BURST\r
-\r
-#define MAIN_PRIORITY 98\r
-#define NUM_OF_SUBFRAME_PER_FRAME (10)\r
-\r
-enum app_state state;\r
-\r
-uint64_t tick_per_usec;\r
-static volatile uint64_t timer_last_irq_tick = 0;\r
-static uint64_t tsc_resolution_hz = 0;\r
-\r
-RuntimeConfig startupConfiguration = {0};\r
-\r
-/* buffers size */\r
-uint32_t nFpgaToSW_FTH_RxBufferLen;\r
-uint32_t nFpgaToSW_PRACH_RxBufferLen;\r
-uint32_t nSW_ToFpga_FTH_TxBufferLen;\r
-\r
-static struct xran_fh_init xranInit;\r
-void * xranHandle = NULL;\r
-\r
-struct xran_fh_config xranConf;\r
-struct xran_fh_config *pXranConf = NULL;\r
-\r
-typedef struct\r
-{\r
- uint32_t phaseFlag :1;\r
- uint32_t NRARFCN :22;\r
- uint32_t SULFreShift :1;\r
- uint32_t SULFlag :1;\r
- uint32_t rsv :7;\r
-}FPGAPhaseCompCfg;\r
-\r
-typedef struct XranLibConfig\r
-{\r
- uint32_t nDriverCoreId;\r
- uint32_t nTimingAdvance;\r
- uint32_t nFhConfig;\r
- uint32_t nFhBufIntFlag;\r
- uint32_t nSectorNum;\r
- uint32_t nNrOfSlotInSf;\r
- uint32_t nNrofSfInFrame;\r
- void * pFthInstanceHandles;\r
-}XranLibConfigStruct;\r
-typedef enum {\r
- XRANFTHTX_OUT = 0,\r
- XRANFTHTX_PRB_MAP_OUT,\r
- XRANFTHTX_SEC_DESC_OUT,\r
- XRANFTHRX_IN,\r
- XRANFTHRX_PRB_MAP_IN,\r
- XRANFTHTX_SEC_DESC_IN,\r
- XRANFTHRACH_IN,\r
- XRANSRS_IN,\r
- MAX_SW_XRAN_INTERFACE_NUM\r
-}SWXRANInterfaceTypeEnum;\r
-\r
-/*\r
- * manage one cell's all Ethernet frames for one DL or UL LTE subframe\r
- */\r
-typedef struct {\r
- /* -1-this subframe is not used in current frame format\r
- 0-this subframe can be transmitted, i.e., data is ready\r
- 1-this subframe is waiting transmission, i.e., data is not ready\r
- 10 - DL transmission missing deadline. When FE needs this subframe data but bValid is still 1,\r
- set bValid to 10.\r
- */\r
- int32_t bValid ; // when UL rx, it is subframe index.\r
- int32_t nSegToBeGen;\r
- int32_t nSegGenerated; // how many date segment are generated by DL LTE processing or received from FE\r
- // -1 means that DL packet to be transmitted is not ready in BS\r
- int32_t nSegTransferred; // number of data segments has been transmitted or received\r
- struct rte_mbuf *pData[N_MAX_BUFFER_SEGMENT]; // point to DPDK allocated memory pool\r
- struct xran_buffer_list sBufferList;\r
-} BbuIoBufCtrlStruct;\r
-\r
-typedef struct {\r
- uint64_t nCoreMask;\r
- int16_t cpuSocketId;\r
- uint8_t nDriverCoreId;\r
- uint8_t nFHCoreId;\r
-\r
- struct rte_mempool *bbuio_buf_pool;\r
-\r
- /* io struct */\r
- BbuIoBufCtrlStruct sFrontHaulTxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
- BbuIoBufCtrlStruct sFrontHaulTxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
- BbuIoBufCtrlStruct sFrontHaulRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
- BbuIoBufCtrlStruct sFrontHaulRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
- BbuIoBufCtrlStruct sFHPrachRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
-\r
- /* Cat B */\r
- BbuIoBufCtrlStruct sFHSrsRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR];\r
-\r
- /* buffers lists */\r
- struct xran_flat_buffer sFrontHaulTxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];\r
- struct xran_flat_buffer sFrontHaulTxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
- struct xran_flat_buffer sFrontHaulRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];\r
- struct xran_flat_buffer sFrontHaulRxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
- struct xran_flat_buffer sFHPrachRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];\r
-\r
- /* Cat B SRS buffers */\r
- struct xran_flat_buffer sFHSrsRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT];\r
-\r
- void* nInstanceHandle[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR]; // instance per sector\r
- uint32_t nBufPoolIndex[XRAN_MAX_SECTOR_NR][MAX_SW_XRAN_INTERFACE_NUM]; // every api owns unique buffer pool\r
- uint16_t nInstanceNum;\r
-\r
- uint64_t nTscTiming[XRAN_N_FE_BUF_LEN]; // records the TSC when a timing packet is received.\r
-} BbuXranIoIfStruct;\r
-\r
-static BbuXranIoIfStruct gsXranIoIf;\r
-static XranLibConfigStruct *gpXranLibConfig = NULL;\r
-\r
-extern long rx_counter;\r
-extern long tx_counter;\r
-extern long tx_bytes_counter;\r
-extern long rx_bytes_counter;\r
-extern long tx_bytes_per_sec;\r
-extern long rx_bytes_per_sec;\r
-long old_rx_counter = 0;\r
-long old_tx_counter = 0;\r
-\r
-\r
-\r
-#define CPU_HZ tick_per_usec //us\r
-\r
-/* Application User space functions */\r
-void xran_fh_rx_callback(void *pCallbackTag, int32_t status);\r
-void xran_fh_rx_prach_callback(void *pCallbackTag, int32_t status);\r
-\r
-static BbuXranIoIfStruct *xran_get_ctx(void)\r
-{\r
- return &gsXranIoIf;\r
-}\r
-\r
-static void print_menu()\r
-{\r
- puts("+---------------------------------------+");\r
- puts("| Press 1 to start 5G NR XRAN traffic |");\r
- puts("| Press 2 reserved for future use |");\r
- puts("| Press 3 to quit |");\r
- puts("+---------------------------------------+");\r
-}\r
-\r
-static int32_t get_xran_sfidx(uint8_t nNrOfSlotInSf)\r
-{\r
- int32_t nSfIdx = -1;\r
- uint32_t nFrameIdx;\r
- uint32_t nSubframeIdx;\r
- uint32_t nSlotIdx;\r
- uint64_t nSecond;\r
-\r
- uint32_t nXranTime = xran_get_slot_idx(&nFrameIdx, &nSubframeIdx, &nSlotIdx, &nSecond);\r
- nSfIdx = nFrameIdx*NUM_OF_SUBFRAME_PER_FRAME*nNrOfSlotInSf\r
- + nSubframeIdx*nNrOfSlotInSf\r
- + nSlotIdx;\r
-#if 0\r
- printf("\nxranTime is %d, return is %d, radio frame is %d, subframe is %d slot is %d tsc is %llu us",\r
- nXranTime,\r
- nSfIdx,\r
- nFrameIdx,\r
- nSubframeIdx,\r
- nSlotIdx,\r
- __rdtsc()/CPU_HZ);\r
-#endif\r
-\r
- return nSfIdx;\r
-}\r
-\r
-void xran_fh_rx_callback(void *pCallbackTag, xran_status_t status)\r
-{\r
- uint64_t t1 = MLogTick();\r
- uint32_t mlogVar[10];\r
- uint32_t mlogVarCnt = 0;\r
- uint8_t Numerlogy = xranConf.frame_conf.nNumerology;\r
- uint8_t nNrOfSlotInSf = 1<<Numerlogy;\r
- int32_t sfIdx = get_xran_sfidx(nNrOfSlotInSf);\r
-\r
- mlogVar[mlogVarCnt++] = 0xCCCCCCCC;\r
- mlogVar[mlogVarCnt++] = status >> 16; /* tti */\r
- mlogVar[mlogVarCnt++] = status & 0xFF; /* sym */\r
- mlogVar[mlogVarCnt++] = (uint32_t)sfIdx;\r
- MLogAddVariables(mlogVarCnt, mlogVar, MLogTick());\r
- rte_pause();\r
-\r
- MLogTask(PID_GNB_SYM_CB, t1, MLogTick());\r
- return;\r
-}\r
-\r
-void xran_fh_rx_prach_callback(void *pCallbackTag, xran_status_t status)\r
-{\r
- uint64_t t1 = MLogTick();\r
- uint32_t mlogVar[10];\r
- uint32_t mlogVarCnt = 0;\r
-\r
- mlogVar[mlogVarCnt++] = 0xDDDDDDDD;\r
- mlogVar[mlogVarCnt++] = status >> 16; /* tti */\r
- mlogVar[mlogVarCnt++] = status & 0xFF; /* sym */\r
- MLogAddVariables(mlogVarCnt, mlogVar, MLogTick());\r
- rte_pause();\r
-\r
- MLogTask(PID_GNB_PRACH_CB, t1, MLogTick());\r
-}\r
-\r
-void xran_fh_rx_srs_callback(void *pCallbackTag, xran_status_t status)\r
-{\r
- uint64_t t1 = MLogTick();\r
- uint32_t mlogVar[10];\r
- uint32_t mlogVarCnt = 0;\r
-\r
- mlogVar[mlogVarCnt++] = 0xCCCCCCCC;\r
- mlogVar[mlogVarCnt++] = status >> 16; /* tti */\r
- mlogVar[mlogVarCnt++] = status & 0xFF; /* sym */\r
- MLogAddVariables(mlogVarCnt, mlogVar, MLogTick());\r
- rte_pause();\r
-\r
- MLogTask(PID_GNB_SRS_CB, t1, MLogTick());\r
-}\r
-\r
-\r
-//-------------------------------------------------------------------------------------------\r
-/** @ingroup group_nbiot_source_auxlib_timer\r
- *\r
- * @param void\r
- *\r
- * @return Ticks\r
- *\r
- * @description\r
- * This function reads the rtdsc clock and returns the current value in there.\r
- *\r
-**/\r
-//-------------------------------------------------------------------------------------------\r
-unsigned long timer_get_ticks(void)\r
-{\r
- unsigned long ret;\r
- union\r
- {\r
- unsigned long tsc_64;\r
- struct\r
- {\r
- uint32_t lo_32;\r
- uint32_t hi_32;\r
- };\r
- } tsc;\r
-\r
- __asm volatile("rdtsc" :\r
- "=a" (tsc.lo_32),\r
- "=d" (tsc.hi_32));\r
-\r
- ret = ((unsigned long)tsc.tsc_64);\r
- return ret;\r
-}\r
-\r
-//-------------------------------------------------------------------------------------------\r
-/** @ingroup group_lte_source_auxlib_timer\r
- *\r
- * @param void\r
- *\r
- * @return 0 if SUCCESS\r
- *\r
- * @description\r
- * This function gets the clock speed of the core and figures out number of ticks per usec.\r
- * It is used by l1app and testmac applications to initialize the mlog utility\r
- *\r
-**/\r
-//-------------------------------------------------------------------------------------------\r
-int timer_set_tsc_freq_from_clock(void)\r
-{\r
-#define NS_PER_SEC 1E9\r
- struct timespec sleeptime = {.tv_nsec = 5E8 }; /* 1/2 second */\r
- struct timespec t_start, t_end;\r
- uint64_t tsc_resolution_hz = 0;\r
-\r
- if (clock_gettime(CLOCK_MONOTONIC_RAW, &t_start) == 0)\r
- {\r
- unsigned long ns, end, start = timer_get_ticks();\r
- nanosleep(&sleeptime,NULL);\r
- clock_gettime(CLOCK_MONOTONIC_RAW, &t_end);\r
- end = timer_get_ticks();\r
- ns = ((t_end.tv_sec - t_start.tv_sec) * NS_PER_SEC);\r
- ns += (t_end.tv_nsec - t_start.tv_nsec);\r
-\r
- double secs = (double)ns/NS_PER_SEC;\r
- tsc_resolution_hz = (unsigned long)((end - start)/secs);\r
-\r
- tick_per_usec = (tsc_resolution_hz / 1000000);\r
- printf("System clock (rdtsc) resolution %lu [Hz]\n", tsc_resolution_hz);\r
- printf("Ticks per us %lu\n", tick_per_usec);\r
- return 0;\r
- }\r
-\r
- return -1;\r
-}\r
-\r
-int physide_dl_tti_call_back(void * param)\r
-{\r
- uint64_t t1 = MLogTick();\r
- rte_pause();\r
- MLogTask(PID_GNB_PROC_TIMING, t1, MLogTick());\r
- return 0;\r
-}\r
-\r
-int physide_ul_half_slot_call_back(void * param)\r
-{\r
- uint64_t t1 = MLogTick();\r
- rte_pause();\r
- MLogTask(PID_GNB_PROC_TIMING, t1, MLogTick());\r
- return 0;\r
-}\r
-\r
-int physide_ul_full_slot_call_back(void * param)\r
-{\r
- uint64_t t1 = MLogTick();\r
- rte_pause();\r
- MLogTask(PID_GNB_PROC_TIMING, t1, MLogTick());\r
- return 0;\r
-}\r
-\r
-int32_t init_xran(void)\r
-{\r
- BbuXranIoIfStruct *psBbuIo = xran_get_ctx();\r
- xran_status_t status;\r
- int32_t nSectorIndex[XRAN_MAX_SECTOR_NR];\r
- int32_t nSectorNum;\r
- int32_t i, j, k, z;\r
-\r
- void *ptr;\r
- void *mb;\r
- uint32_t *u32dptr;\r
- uint16_t *u16dptr;\r
- uint8_t *u8dptr;\r
-\r
- SWXRANInterfaceTypeEnum eInterfaceType;\r
-\r
- XranLibConfigStruct *ptrLibConfig;\r
-\r
- struct xran_buffer_list *pFthTxBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];\r
- struct xran_buffer_list *pFthTxPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];\r
- struct xran_buffer_list *pFthRxBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];\r
- struct xran_buffer_list *pFthRxPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];\r
- struct xran_buffer_list *pFthRxRachBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];\r
- struct xran_buffer_list *pFthRxSrsBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_N_FE_BUF_LEN];\r
-\r
- for (nSectorNum = 0; nSectorNum < XRAN_MAX_SECTOR_NR; nSectorNum++)\r
- {\r
- nSectorIndex[nSectorNum] = nSectorNum;\r
- }\r
-\r
- nSectorNum = numCCPorts;\r
- printf ("XRAN front haul xran_mm_init \n");\r
- status = xran_mm_init (xranHandle, (uint64_t) SW_FPGA_FH_TOTAL_BUFFER_LEN, SW_FPGA_SEGMENT_BUFFER_LEN);\r
- if (status != XRAN_STATUS_SUCCESS)\r
- {\r
- printf ("Failed at XRAN front haul xran_mm_init \n");\r
- exit(-1);\r
- }\r
-\r
- psBbuIo->nInstanceNum = numCCPorts;\r
-\r
- for (k = 0; k < XRAN_PORTS_NUM; k++) {\r
- status = xran_sector_get_instances (xranHandle, psBbuIo->nInstanceNum,&psBbuIo->nInstanceHandle[k][0]);\r
- if (status != XRAN_STATUS_SUCCESS)\r
- {\r
- printf ("get sector instance failed %d for XRAN nInstanceNum %d\n",k, psBbuIo->nInstanceNum);\r
- exit(-1);\r
- }\r
- for (i = 0; i < psBbuIo->nInstanceNum; i++){\r
- printf("%s [%d]: CC %d handle %p\n", __FUNCTION__, k, i, psBbuIo->nInstanceHandle[0][i]);\r
- }\r
- }\r
-\r
- printf("Sucess xran_mm_init \n");\r
- gpXranLibConfig = (XranLibConfigStruct*)malloc(sizeof(XranLibConfigStruct));\r
- ptrLibConfig = gpXranLibConfig;\r
- if (ptrLibConfig)\r
- {\r
- #if 0\r
- ptrLibConfig->nDriverCoreId = psBbuIo->nDriverCoreId;\r
- ptrLibConfig->pFecInstanceHandles = &(psBbuIo->nInstanceHandle[FPGA_FEC][0]);\r
- ptrLibConfig->pFthInstanceHandles = &(psBbuIo->nInstanceHandle[FPGA_FRONTHAUL][0]);\r
- ptrLibConfig->nTimingAdvance = psFPGAInitPara->nTimeAdvance;\r
- ptrLibConfig->nFhConfig = psFPGAInitPara->nEthPorts;\r
- ptrLibConfig->nFhBufIntFlag = 0; //need init fronthaul buffer, then set to 1.\r
- ptrLibConfig->nNrofSfInFrame = NUM_OF_SUBFRAME_PER_FRAME;\r
- ptrLibConfig->nNrOfSlotInSf = pConfigParams->nNumOfSlotPerSubframe;\r
- if (pConfigParams->nNumerology < 3)\r
- {\r
- ptrLibConfig->nSectorNum = psFPGAInitPara->nSecNum;\r
- }\r
- #endif\r
- }\r
- else\r
- {\r
- printf ("could not allocate ptrLibConfig in init_xran\n");\r
- exit(-1);\r
- }\r
-\r
- printf("nSectorNum %d\n", nSectorNum);\r
-\r
- /* Init Memory */\r
- for(i = 0; i<nSectorNum; i++)\r
- {\r
- eInterfaceType = XRANFTHTX_OUT;\r
- printf("nSectorIndex[%d] = %d\n",i, nSectorIndex[i]);\r
- status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],\r
- XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT, nSW_ToFpga_FTH_TxBufferLen);\r
- if(XRAN_STATUS_SUCCESS != status) {\r
- rte_panic("Failed at xran_bm_init , status %d\n", status);\r
- }\r
- for(j = 0; j < XRAN_N_FE_BUF_LEN; j++)\r
- {\r
- for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){\r
- psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].bValid = 0;\r
- psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;\r
- psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;\r
- psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;\r
- psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;\r
- psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFrontHaulTxBuffers[j][i][z][0];\r
-\r
- for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++)\r
- {\r
- psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = nSW_ToFpga_FTH_TxBufferLen; // 14 symbols 3200bytes/symbol\r
- psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;\r
- psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;\r
- status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i], psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);\r
- if(XRAN_STATUS_SUCCESS != status){\r
- rte_panic("Failed at xran_bm_allocate_buffer , status %d\n",status);\r
- }\r
- psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;\r
- psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *)mb;\r
-\r
- if(ptr){\r
- u32dptr = (uint32_t*)(ptr);\r
- uint8_t *ptr_temp = (uint8_t *)ptr;\r
- memset(u32dptr, 0x0, nSW_ToFpga_FTH_TxBufferLen);\r
- // ptr_temp[0] = j; // TTI\r
- // ptr_temp[1] = i; // Sec\r
- // ptr_temp[2] = z; // Ant\r
- // ptr_temp[3] = k; // sym\r
- }\r
- }\r
- }\r
- }\r
-\r
- /* C-plane DL */\r
- eInterfaceType = XRANFTHTX_SEC_DESC_OUT;\r
- status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],\r
- XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT*XRAN_MAX_SECTIONS_PER_SYM, sizeof(struct xran_section_desc));\r
- if(XRAN_STATUS_SUCCESS != status) {\r
- rte_panic("Failed at xran_bm_init , status %d\n", status);\r
- }\r
-\r
- eInterfaceType = XRANFTHTX_PRB_MAP_OUT;\r
- status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],\r
- XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT, sizeof(struct xran_prb_map));\r
- if(XRAN_STATUS_SUCCESS != status) {\r
- rte_panic("Failed at xran_bm_init , status %d\n", status);\r
- }\r
-\r
- for(j = 0; j < XRAN_N_FE_BUF_LEN; j++)\r
- {\r
- for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){\r
- psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].bValid = 0;\r
- psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegGenerated = -1;\r
- psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;\r
- psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred = 0;\r
- psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;\r
- psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFrontHaulTxPrbMapBuffers[j][i][z];\r
-\r
- {\r
- psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nElementLenInBytes = sizeof(struct xran_prb_map);\r
- psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nNumberOfElements = 1;\r
- psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nOffsetInBytes = 0;\r
- status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i], psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);\r
- if(XRAN_STATUS_SUCCESS != status) {\r
- rte_panic("Failed at xran_bm_allocate_buffer , status %d\n",status);\r
- }\r
- psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pData = (uint8_t *)ptr;\r
- psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pCtrl = (void *)mb;\r
-\r
- if(ptr){\r
- void *sd_ptr;\r
- void *sd_mb;\r
- int elm_id;\r
- struct xran_prb_map * p_rb_map = (struct xran_prb_map *)ptr;\r
- if (startupConfiguration.appMode == APP_O_DU)\r
- memcpy(ptr, &startupConfiguration.PrbMapDl, sizeof(struct xran_prb_map));\r
- else\r
- memcpy(ptr, &startupConfiguration.PrbMapUl, sizeof(struct xran_prb_map));\r
-\r
- for (elm_id = 0; elm_id < p_rb_map->nPrbElm; elm_id++){\r
- struct xran_prb_elm *pPrbElem = &p_rb_map->prbMap[elm_id];\r
- for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++){\r
- status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i], psBbuIo->nBufPoolIndex[nSectorIndex[i]][XRANFTHTX_SEC_DESC_OUT],&sd_ptr, &sd_mb);\r
- if(XRAN_STATUS_SUCCESS != status){\r
- rte_panic("SD Failed at xran_bm_allocate_buffer , status %d\n",status);\r
- }\r
- pPrbElem->p_sec_desc[k] = sd_ptr;\r
- }\r
- }\r
- }\r
- }\r
- }\r
- }\r
- }\r
-\r
- for(i = 0; i<nSectorNum; i++)\r
- {\r
- eInterfaceType = XRANFTHRX_IN;\r
- status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType], XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT, nSW_ToFpga_FTH_TxBufferLen);\r
- if(XRAN_STATUS_SUCCESS != status)\r
- {\r
- printf("Failed at xran_bm_init, status %d\n", status);\r
- iAssert(status == XRAN_STATUS_SUCCESS);\r
- }\r
-\r
- for(j = 0;j < XRAN_N_FE_BUF_LEN; j++)\r
- {\r
- for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){\r
- psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].bValid = 0;\r
- psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;\r
- psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;\r
- psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;\r
- psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;\r
- psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFrontHaulRxBuffers[j][i][z][0];\r
- for(k = 0; k< XRAN_NUM_OF_SYMBOL_PER_SLOT; k++)\r
- {\r
- psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = nFpgaToSW_FTH_RxBufferLen; // 1 symbols 3200bytes\r
- psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;\r
- psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;\r
- status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i],psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);\r
- if(XRAN_STATUS_SUCCESS != status) {\r
- rte_panic("Failed at xran_bm_allocate_buffer , status %d\n",status);\r
- }\r
- psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;\r
- psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *) mb;\r
- if(ptr){\r
- u32dptr = (uint32_t*)(ptr);\r
- uint8_t *ptr_temp = (uint8_t *)ptr;\r
- memset(u32dptr, 0x0, nFpgaToSW_FTH_RxBufferLen);\r
- // ptr_temp[0] = j; // TTI\r
- // ptr_temp[1] = i; // Sec\r
- // ptr_temp[2] = z; // Ant\r
- // ptr_temp[3] = k; // sym\r
- }\r
- }\r
- }\r
- }\r
-\r
- /* C-plane */\r
- eInterfaceType = XRANFTHTX_SEC_DESC_IN;\r
- status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],\r
- XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT*XRAN_MAX_SECTIONS_PER_SYM, sizeof(struct xran_section_desc));\r
- if(XRAN_STATUS_SUCCESS != status) {\r
- rte_panic("Failed at xran_bm_init , status %d\n", status);\r
- }\r
- eInterfaceType = XRANFTHRX_PRB_MAP_IN;\r
- status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],\r
- XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT, sizeof(struct xran_prb_map));\r
- if(XRAN_STATUS_SUCCESS != status) {\r
- rte_panic("Failed at xran_bm_init, status %d\n", status);\r
- }\r
-\r
- for(j = 0;j < XRAN_N_FE_BUF_LEN; j++) {\r
- for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){\r
- psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].bValid = 0;\r
- psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegGenerated = -1;\r
- psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;\r
- psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred = 0;\r
- psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;\r
- psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFrontHaulRxPrbMapBuffers[j][i][z];\r
- {\r
- psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nElementLenInBytes = sizeof(struct xran_prb_map);\r
- psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nNumberOfElements = 1;\r
- psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nOffsetInBytes = 0;\r
- status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i],psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);\r
- if(XRAN_STATUS_SUCCESS != status) {\r
- rte_panic("Failed at xran_bm_allocate_buffer , status %d\n",status);\r
- }\r
- psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pData = (uint8_t *)ptr;\r
- psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pCtrl = (void *)mb;\r
- if(ptr){\r
- void *sd_ptr;\r
- void *sd_mb;\r
- int elm_id;\r
- struct xran_prb_map * p_rb_map = (struct xran_prb_map *)ptr;\r
-\r
- if (startupConfiguration.appMode == APP_O_DU)\r
- memcpy(ptr, &startupConfiguration.PrbMapUl, sizeof(struct xran_prb_map));\r
- else\r
- memcpy(ptr, &startupConfiguration.PrbMapDl, sizeof(struct xran_prb_map));\r
-\r
- for (elm_id = 0; elm_id < p_rb_map->nPrbElm; elm_id++){\r
- struct xran_prb_elm *pPrbElem = &p_rb_map->prbMap[elm_id];\r
- for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++){\r
- status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i], psBbuIo->nBufPoolIndex[nSectorIndex[i]][XRANFTHTX_SEC_DESC_IN],&sd_ptr, &sd_mb);\r
- if(XRAN_STATUS_SUCCESS != status){\r
- rte_panic("SD Failed at xran_bm_allocate_buffer , status %d\n",status);\r
- }\r
- pPrbElem->p_sec_desc[k] = sd_ptr;\r
- }\r
- }\r
- }\r
- }\r
- }\r
- }\r
- }\r
-\r
-\r
- // add prach rx buffer\r
- for(i = 0; i<nSectorNum; i++)\r
- {\r
- eInterfaceType = XRANFTHRACH_IN;\r
- status = xran_bm_init(psBbuIo->nInstanceHandle[0][i],&psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT, FPGA_TO_SW_PRACH_RX_BUFFER_LEN);\r
- if(XRAN_STATUS_SUCCESS != status) {\r
- rte_panic("Failed at xran_bm_init, status %d\n", status);\r
- }\r
- for(j = 0;j < XRAN_N_FE_BUF_LEN; j++)\r
- {\r
- for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){\r
- psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].bValid = 0;\r
- psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;\r
- psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;\r
- psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;\r
- psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_MAX_ANTENNA_NR; // ant number.\r
- psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFHPrachRxBuffers[j][i][z][0];\r
- for(k = 0; k< XRAN_NUM_OF_SYMBOL_PER_SLOT; k++)\r
- {\r
- psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = FPGA_TO_SW_PRACH_RX_BUFFER_LEN;\r
- psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;\r
- psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;\r
- status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i],psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);\r
- if(XRAN_STATUS_SUCCESS != status) {\r
- rte_panic("Failed at xran_bm_allocate_buffer, status %d\n",status);\r
- }\r
- psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;\r
- psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *)mb;\r
- if(ptr){\r
- u32dptr = (uint32_t*)(ptr);\r
- memset(u32dptr, 0x0, FPGA_TO_SW_PRACH_RX_BUFFER_LEN);\r
- }\r
- }\r
- }\r
- }\r
- }\r
-\r
- /* add SRS rx buffer */\r
- for(i = 0; i<nSectorNum; i++)\r
- {\r
- eInterfaceType = XRANSRS_IN;\r
- status = xran_bm_init(psBbuIo->nInstanceHandle[0][i],&psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],\r
- XRAN_N_FE_BUF_LEN*XRAN_MAX_ANT_ARRAY_ELM_NR*XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT, nSW_ToFpga_FTH_TxBufferLen);\r
-\r
- if(XRAN_STATUS_SUCCESS != status) {\r
- rte_panic("Failed at xran_bm_init, status %d\n", status);\r
- }\r
- for(j = 0; j < XRAN_N_FE_BUF_LEN; j++)\r
- {\r
- for(z = 0; z < XRAN_MAX_ANT_ARRAY_ELM_NR; z++){\r
- psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].bValid = 0;\r
- psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;\r
- psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;\r
- psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;\r
- psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_MAX_ANT_ARRAY_ELM_NR; /* ant number */\r
- psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFHSrsRxBuffers[j][i][z][0];\r
- for(k = 0; k < XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT; k++)\r
- {\r
- psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = nSW_ToFpga_FTH_TxBufferLen;\r
- psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;\r
- psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;\r
- status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i],psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);\r
- if(XRAN_STATUS_SUCCESS != status) {\r
- rte_panic("Failed at xran_bm_allocate_buffer, status %d\n",status);\r
- }\r
- psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;\r
- psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *)mb;\r
- if(ptr){\r
- u32dptr = (uint32_t*)(ptr);\r
- memset(u32dptr, 0x0, nSW_ToFpga_FTH_TxBufferLen);\r
- }\r
- }\r
- }\r
- }\r
- }\r
-\r
-\r
- for(i=0; i<nSectorNum; i++)\r
- {\r
- for(j=0; j<XRAN_N_FE_BUF_LEN; j++)\r
- {\r
- for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){\r
- pFthTxBuffer[i][z][j] = &(psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList);\r
- pFthTxPrbMapBuffer[i][z][j] = &(psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList);\r
- pFthRxBuffer[i][z][j] = &(psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList);\r
- pFthRxPrbMapBuffer[i][z][j] = &(psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList);\r
- pFthRxRachBuffer[i][z][j] = &(psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList);\r
- }\r
-\r
- for(z = 0; z < XRAN_MAX_ANT_ARRAY_ELM_NR; z++){\r
- pFthRxSrsBuffer[i][z][j] = &(psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList);\r
- }\r
- }\r
- }\r
-\r
- if(NULL != psBbuIo->nInstanceHandle[0])\r
- {\r
- /* add pusch callback */\r
- for (i = 0; i<nSectorNum; i++)\r
- {\r
- xran_5g_fronthault_config (psBbuIo->nInstanceHandle[0][i],\r
- pFthTxBuffer[i],\r
- pFthTxPrbMapBuffer[i],\r
- pFthRxBuffer[i],\r
- pFthRxPrbMapBuffer[i],\r
- xran_fh_rx_callback, &pFthRxBuffer[i][0]);\r
- }\r
-\r
- /* add prach callback here */\r
- for (i = 0; i<nSectorNum; i++)\r
- {\r
- xran_5g_prach_req(psBbuIo->nInstanceHandle[0][i], pFthRxRachBuffer[i],\r
- xran_fh_rx_prach_callback,&pFthRxRachBuffer[i][0]);\r
- }\r
-\r
- /* add SRS callback here */\r
- for (i = 0; i<nSectorNum; i++) {\r
- xran_5g_srs_req(psBbuIo->nInstanceHandle[0][i], pFthRxSrsBuffer[i],\r
- xran_fh_rx_srs_callback,&pFthRxSrsBuffer[i][0]);\r
- }\r
-\r
- ptrLibConfig->nFhBufIntFlag = 1;\r
- }\r
-\r
- return status;\r
-}\r
-\r
-int init_xran_iq_content(void)\r
-{\r
- BbuXranIoIfStruct *psBbuIo = xran_get_ctx();\r
- xran_status_t status;\r
- int32_t nSectorIndex[XRAN_MAX_SECTOR_NR];\r
- int32_t nSectorNum;\r
- int32_t cc_id, ant_id, sym_id, tti;\r
- int32_t flowId;\r
-\r
- uint8_t frame_id = 0;\r
- uint8_t subframe_id = 0;\r
- uint8_t slot_id = 0;\r
- uint8_t sym = 0;\r
-\r
- void *ptr;\r
- uint32_t *u32dptr;\r
- uint16_t *u16dptr;\r
- uint8_t *u8dptr;\r
-\r
- char *pos = NULL;\r
- struct xran_prb_map *pRbMap = NULL;\r
-\r
- for (nSectorNum = 0; nSectorNum < XRAN_MAX_SECTOR_NR; nSectorNum++)\r
- {\r
- nSectorIndex[nSectorNum] = nSectorNum;\r
- }\r
- nSectorNum = numCCPorts;\r
- printf ("init_xran_iq_content\n");\r
-\r
- /* Init Memory */\r
- for(cc_id = 0; cc_id <nSectorNum; cc_id++)\r
- {\r
- for(tti = 0; tti < XRAN_N_FE_BUF_LEN; tti ++) {\r
- for(ant_id = 0; ant_id < XRAN_MAX_ANTENNA_NR; ant_id++){\r
- for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) {\r
-\r
- flowId = XRAN_MAX_ANTENNA_NR*cc_id + ant_id;\r
- if(p_tx_play_buffer[flowId]){\r
- /* c-plane DL */\r
- pRbMap = (struct xran_prb_map *) psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData;\r
- if(pRbMap){\r
- if (xranInit.DynamicSectionEna == 0){\r
- pRbMap->dir = XRAN_DIR_DL;\r
- pRbMap->xran_port = 0;\r
- pRbMap->band_id = 0;\r
- pRbMap->cc_id = cc_id;\r
- pRbMap->ru_port_id = ant_id;\r
- pRbMap->tti_id = tti;\r
- pRbMap->start_sym_id = 0;\r
- pRbMap->nPrbElm = 1;\r
- pRbMap->prbMap[0].nStartSymb = 0;\r
- pRbMap->prbMap[0].numSymb = 14;\r
- pRbMap->prbMap[0].nRBStart = 0;\r
- pRbMap->prbMap[0].nRBSize = pXranConf->nDLRBs;\r
- pRbMap->prbMap[0].nBeamIndex = 0;\r
- pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE;\r
- pRbMap->prbMap[0].iqWidth = 16;\r
- } else if(pXranConf->ru_conf.xranCat == XRAN_CATEGORY_B\r
- && startupConfiguration.appMode == APP_O_DU\r
- && sym_id == 0){ /* BF Ws are per slot */\r
- int idxElm = 0;\r
- char* dl_bfw_pos = ((char*)p_tx_dl_bfw_buffer[flowId]) + tx_dl_bfw_buffer_position[flowId];\r
- struct xran_prb_elm* p_pRbMapElm = NULL;\r
- for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++){\r
- p_pRbMapElm = &pRbMap->prbMap[idxElm];\r
- p_pRbMapElm->bf_weight.nAntElmTRx = pXranConf->nAntElmTRx;\r
- if(p_pRbMapElm->BeamFormingType == XRAN_BEAM_WEIGHT && p_pRbMapElm->bf_weight_update){\r
- int16_t ext_len = 9600;\r
- int16_t ext_sec_total = 0;\r
- int8_t * ext_buf =(int8_t*) xran_malloc(ext_len);\r
- int idRb = 0;\r
- int16_t *ptr = NULL;\r
- int i;\r
- if (ext_buf){\r
- ext_buf += (RTE_PKTMBUF_HEADROOM +\r
- sizeof (struct xran_ecpri_hdr) +\r
- sizeof(struct xran_cp_radioapp_section1));\r
-\r
- ext_len -= (RTE_PKTMBUF_HEADROOM +\r
- sizeof (struct xran_ecpri_hdr) +\r
- sizeof(struct xran_cp_radioapp_section1));\r
- ext_sec_total = xran_cp_populate_section_ext_1((int8_t *)ext_buf,\r
- ext_len,\r
- (int16_t *) (dl_bfw_pos + (p_pRbMapElm->nRBStart*pXranConf->nAntElmTRx)*4),\r
- p_pRbMapElm->nRBSize,\r
- pXranConf->nAntElmTRx,\r
- p_pRbMapElm->iqWidth, p_pRbMapElm->compMethod);\r
- if(ext_sec_total > 0){\r
- p_pRbMapElm->bf_weight.p_ext_section = ext_buf;\r
- p_pRbMapElm->bf_weight.ext_section_sz = ext_sec_total;\r
- }else {\r
- rte_panic("xran_cp_populate_section_ext_1 return error [%d]\n", ext_sec_total);\r
- }\r
- } else {\r
- rte_panic("xran_malloc return NULL\n");\r
- }\r
- }\r
- }\r
- }\r
- } else {\r
- printf("DL pRbMap ==NULL\n");\r
- exit(-1);\r
- }\r
-\r
- pos = ((char*)p_tx_play_buffer[flowId]) + tx_play_buffer_position[flowId];\r
- ptr = psBbuIo->sFrontHaulTxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;\r
-\r
- if(ptr && pos){\r
- int idxElm = 0;\r
- u8dptr = (uint8_t*)ptr;\r
- int16_t payload_len = 0;\r
-\r
- uint8_t *dst = (uint8_t *)u8dptr;\r
- uint8_t *src = (uint8_t *)pos;\r
- struct xran_prb_elm* p_prbMapElm = &pRbMap->prbMap[idxElm];\r
- dst = xran_add_hdr_offset(dst, p_prbMapElm->compMethod);\r
- for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++) {\r
- struct xran_section_desc *p_sec_desc = NULL;\r
- p_prbMapElm = &pRbMap->prbMap[idxElm];\r
- p_sec_desc = p_prbMapElm->p_sec_desc[sym_id];\r
-\r
- if(p_sec_desc == NULL){\r
- printf ("p_sec_desc == NULL\n");\r
- exit(-1);\r
- }\r
- src = (uint8_t *)(pos + p_prbMapElm->nRBStart*N_SC_PER_PRB*4L);\r
-\r
- if(p_prbMapElm->compMethod == XRAN_COMPMETHOD_NONE) {\r
- payload_len = p_prbMapElm->nRBSize*N_SC_PER_PRB*4L;\r
- rte_memcpy(dst, src, payload_len);\r
-\r
- } else if (p_prbMapElm->compMethod == XRAN_COMPMETHOD_BLKFLOAT) {\r
- struct xranlib_compress_request bfp_com_req;\r
- struct xranlib_compress_response bfp_com_rsp;\r
-\r
- memset(&bfp_com_req, 0, sizeof(struct xranlib_compress_request));\r
- memset(&bfp_com_rsp, 0, sizeof(struct xranlib_compress_response));\r
-\r
- bfp_com_req.data_in = (int16_t*)src;\r
- bfp_com_req.numRBs = p_prbMapElm->nRBSize;\r
- bfp_com_req.len = p_prbMapElm->nRBSize*N_SC_PER_PRB*4L;\r
- bfp_com_req.compMethod = p_prbMapElm->compMethod;\r
- bfp_com_req.iqWidth = p_prbMapElm->iqWidth;\r
-\r
- bfp_com_rsp.data_out = (int8_t*)dst;\r
- bfp_com_rsp.len = 0;\r
-\r
- if(xranlib_compress_avx512(&bfp_com_req, &bfp_com_rsp) < 0){\r
- printf ("compression failed [%d]\n",\r
- p_prbMapElm->compMethod);\r
- exit(-1);\r
- } else {\r
- payload_len = bfp_com_rsp.len;\r
- }\r
- }else {\r
- printf ("p_prbMapElm->compMethod == %d is not supported\n",\r
- p_prbMapElm->compMethod);\r
- exit(-1);\r
- }\r
-\r
- /* update RB map for given element */\r
- p_sec_desc->iq_buffer_offset = RTE_PTR_DIFF(dst, u8dptr);\r
- p_sec_desc->iq_buffer_len = payload_len;\r
-\r
- /* add headroom for ORAN headers between IQs for chunk of RBs*/\r
- dst += payload_len;\r
- dst = xran_add_hdr_offset(dst, p_prbMapElm->compMethod);\r
- }\r
- } else {\r
- exit(-1);\r
- printf("ptr ==NULL\n");\r
- }\r
-\r
-\r
- /* c-plane UL */\r
- pRbMap = (struct xran_prb_map *) psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData;\r
- if(pRbMap){\r
- if (xranInit.DynamicSectionEna == 0){\r
- pRbMap->dir = XRAN_DIR_UL;\r
- pRbMap->xran_port = 0;\r
- pRbMap->band_id = 0;\r
- pRbMap->cc_id = cc_id;\r
- pRbMap->ru_port_id = ant_id;\r
- pRbMap->tti_id = tti;\r
- pRbMap->start_sym_id = 0;\r
- pRbMap->nPrbElm = 1;\r
- pRbMap->prbMap[0].nRBStart = 0;\r
- pRbMap->prbMap[0].nRBSize = pXranConf->nULRBs;\r
- pRbMap->prbMap[0].nStartSymb = 0;\r
- pRbMap->prbMap[0].numSymb = 14;\r
- pRbMap->prbMap[0].p_sec_desc[sym_id]->iq_buffer_offset = 0;\r
- pRbMap->prbMap[0].p_sec_desc[sym_id]->iq_buffer_len = pXranConf->nULRBs *4L;\r
- pRbMap->prbMap[0].nBeamIndex = 0;\r
- pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE;\r
- } else if(pXranConf->ru_conf.xranCat == XRAN_CATEGORY_B\r
- && startupConfiguration.appMode == APP_O_DU\r
- && sym_id == 0){\r
- int idxElm = 0;\r
- char * ul_bfw_pos = ((char*)p_tx_ul_bfw_buffer[flowId]) + tx_ul_bfw_buffer_position[flowId];\r
- struct xran_prb_elm* p_pRbMapElm = NULL;\r
-\r
- for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++){\r
- p_pRbMapElm = &pRbMap->prbMap[idxElm];\r
- p_pRbMapElm->bf_weight.nAntElmTRx = pXranConf->nAntElmTRx;\r
- if(p_pRbMapElm->BeamFormingType == XRAN_BEAM_WEIGHT && p_pRbMapElm->bf_weight_update){\r
- int16_t ext_len = 9600;\r
- int16_t ext_sec_total = 0;\r
- int8_t * ext_buf =(int8_t*) xran_malloc(ext_len);\r
- int idRb = 0;\r
- int16_t *ptr = NULL;\r
- int i;\r
- if (ext_buf){\r
- ext_buf += (RTE_PKTMBUF_HEADROOM +\r
- sizeof (struct xran_ecpri_hdr) +\r
- sizeof(struct xran_cp_radioapp_section1));\r
-\r
- ext_len -= (RTE_PKTMBUF_HEADROOM +\r
- sizeof (struct xran_ecpri_hdr) +\r
- sizeof(struct xran_cp_radioapp_section1));\r
- ptr = (int16_t*)(ul_bfw_pos +(p_pRbMapElm->nRBStart*pXranConf->nAntElmTRx)*4);\r
- ext_sec_total = xran_cp_populate_section_ext_1((int8_t *)ext_buf,\r
- ext_len,\r
- (int16_t *) (ul_bfw_pos + (p_pRbMapElm->nRBStart*pXranConf->nAntElmTRx)*4),\r
- p_pRbMapElm->nRBSize,\r
- pXranConf->nAntElmTRx,\r
- p_pRbMapElm->iqWidth, p_pRbMapElm->compMethod);\r
- if(ext_sec_total > 0){\r
- p_pRbMapElm->bf_weight.p_ext_section = ext_buf;\r
- p_pRbMapElm->bf_weight.ext_section_sz = ext_sec_total;\r
- }else {\r
- rte_panic("xran_cp_populate_section_ext_1 return error [%d]\n", ext_sec_total);\r
- }\r
- } else {\r
- rte_panic("xran_malloc return NULL\n");\r
- }\r
- }\r
- }\r
- }\r
- } else {\r
- printf("DL pRbMap ==NULL\n");\r
- exit(-1);\r
- }\r
-\r
- tx_play_buffer_position[flowId] += pXranConf->nDLRBs*N_SC_PER_PRB*4;\r
-\r
- if(tx_play_buffer_position[flowId] >= tx_play_buffer_size[flowId])\r
- tx_play_buffer_position[flowId] = 0;\r
-\r
- if(pXranConf->ru_conf.xranCat == XRAN_CATEGORY_B\r
- && startupConfiguration.appMode == APP_O_DU\r
- && sym_id == 0) {\r
- tx_dl_bfw_buffer_position[flowId] += (pXranConf->nDLRBs*pXranConf->nAntElmTRx)*4;\r
- if(tx_dl_bfw_buffer_position[flowId] >= tx_dl_bfw_buffer_size[flowId])\r
- tx_dl_bfw_buffer_position[flowId] = 0;\r
-\r
- tx_ul_bfw_buffer_position[flowId] += (pXranConf->nULRBs*pXranConf->nAntElmTRx)*4;\r
- if(tx_ul_bfw_buffer_position[flowId] >= tx_ul_bfw_buffer_size[flowId])\r
- tx_ul_bfw_buffer_position[flowId] = 0;\r
- }\r
- } else {\r
- //printf("flowId %d\n", flowId);\r
- }\r
- }\r
- }\r
-\r
- /* prach TX for RU only */\r
- if(startupConfiguration.appMode == APP_O_RU && startupConfiguration.enablePrach){\r
- for(ant_id = 0; ant_id < XRAN_MAX_ANTENNA_NR; ant_id++){\r
- for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) {\r
- flowId = XRAN_MAX_ANTENNA_NR*cc_id + ant_id;\r
-\r
- if(p_tx_prach_play_buffer[flowId]){\r
- pos = ((char*)p_tx_prach_play_buffer[flowId]);\r
-\r
- ptr = psBbuIo->sFHPrachRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;\r
-\r
- if(ptr && pos){\r
- u32dptr = (uint32_t*)(ptr);\r
- /* duplicate full PRACH (repetition * occassions ) in every symbol */\r
- memset(u32dptr,0 , PRACH_PLAYBACK_BUFFER_BYTES);\r
- rte_memcpy(u32dptr, pos, RTE_MIN(PRACH_PLAYBACK_BUFFER_BYTES, tx_prach_play_buffer_size[flowId]));\r
- } else {\r
- exit(-1);\r
- printf("ptr ==NULL\n");\r
- }\r
- } else {\r
- //printf("flowId %d\n", flowId);\r
- }\r
- }\r
- }\r
- }\r
-\r
- /* SRS TX for RU only */\r
- if(startupConfiguration.appMode == APP_O_RU && startupConfiguration.enableSrs){\r
- for(ant_id = 0; ant_id < XRAN_MAX_ANT_ARRAY_ELM_NR; ant_id++){\r
- for(sym_id = 0; sym_id < XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT; sym_id++) {\r
- flowId = XRAN_MAX_ANT_ARRAY_ELM_NR*cc_id + ant_id;\r
-\r
- if(p_tx_srs_play_buffer[flowId]){\r
- pos = ((char*)p_tx_srs_play_buffer[flowId]) + tx_srs_play_buffer_position[flowId];\r
- ptr = psBbuIo->sFHSrsRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;\r
-\r
- if(startupConfiguration.srsSymMask & (1 << sym_id) ){\r
- if(ptr && pos){\r
- u32dptr = (uint32_t*)(ptr);\r
- memset(u32dptr,0 , pXranConf->nULRBs*N_SC_PER_PRB*4);\r
- rte_memcpy(u32dptr, pos, pXranConf->nULRBs*N_SC_PER_PRB*4);\r
- } else {\r
- exit(-1);\r
- printf("ptr ==NULL\n");\r
- }\r
- }\r
-\r
- tx_srs_play_buffer_position[flowId] += pXranConf->nULRBs*N_SC_PER_PRB*4;\r
-\r
- if(tx_srs_play_buffer_position[flowId] >= tx_srs_play_buffer_size[flowId])\r
- tx_srs_play_buffer_position[flowId] = 0;\r
- } else {\r
- //printf("flowId %d\n", flowId);\r
- }\r
- }\r
- }\r
- }\r
- }\r
- }\r
-\r
- return 0;\r
-}\r
-\r
-void stop_xran(void)\r
-{\r
- xran_status_t status = 0;\r
- SWXRANInterfaceTypeEnum eInterfaceType;\r
-\r
- free(gpXranLibConfig);\r
- gpXranLibConfig = NULL;\r
-\r
- status += xran_mm_destroy(xranHandle)*2;\r
-\r
- if(XRAN_STATUS_SUCCESS != status)\r
- {\r
- printf("Failed at xran_mm_destroy, status %d\n",status);\r
- iAssert(status == XRAN_STATUS_SUCCESS);\r
- }\r
-}\r
-\r
-int get_xran_iq_content(void)\r
-{\r
- BbuXranIoIfStruct *psBbuIo = xran_get_ctx();\r
- xran_status_t status;\r
- int32_t nSectorIndex[XRAN_MAX_SECTOR_NR];\r
- int32_t nSectorNum;\r
- int32_t cc_id, ant_id, sym_id, tti;\r
- int32_t flowId;\r
-\r
- uint8_t frame_id = 0;\r
- uint8_t subframe_id = 0;\r
- uint8_t slot_id = 0;\r
- uint8_t sym = 0;\r
-\r
- void *ptr;\r
- uint32_t *u32dptr;\r
- uint16_t *u16dptr;\r
- uint8_t *u8dptr;\r
-\r
- char *pos = NULL;\r
-\r
- for (nSectorNum = 0; nSectorNum < XRAN_MAX_SECTOR_NR; nSectorNum++)\r
- {\r
- nSectorIndex[nSectorNum] = nSectorNum;\r
- }\r
- nSectorNum = numCCPorts;\r
- printf ("get_xran_iq_content\n");\r
-\r
- /* Init Memory */\r
- for(cc_id = 0; cc_id <nSectorNum; cc_id++)\r
- {\r
- for(tti = 0; tti < XRAN_N_FE_BUF_LEN; tti++) {\r
- for(ant_id = 0; ant_id < XRAN_MAX_ANTENNA_NR; ant_id++){\r
- int32_t idxElm = 0;\r
- struct xran_prb_map *pRbMap = NULL;\r
- struct xran_prb_elm *pRbElm = NULL;\r
- struct xran_section_desc *p_sec_desc = NULL;\r
- pRbMap = (struct xran_prb_map *) psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData;\r
- if(pRbMap == NULL)\r
- exit(-1);\r
- flowId = XRAN_MAX_ANTENNA_NR * cc_id + ant_id;\r
- for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) {\r
- pRbElm = &pRbMap->prbMap[0];\r
- if(pRbMap->nPrbElm == 1){\r
- if(p_rx_log_buffer[flowId]) {\r
- pos = ((char*)p_rx_log_buffer[flowId]) + rx_log_buffer_position[flowId];\r
- ptr = psBbuIo->sFrontHaulRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;\r
- if(ptr){\r
- u32dptr = (uint32_t*)(ptr);\r
- char* my_ptr =(char *)ptr;\r
- rte_memcpy(pos + pRbElm->nRBStart*N_SC_PER_PRB*4L , u32dptr, pRbElm->nRBSize*N_SC_PER_PRB*4L);\r
- }else {\r
- printf("[%d][%d][%d][%d]ptr ==NULL\n",tti,cc_id,ant_id, sym_id);\r
- }\r
- }\r
- } else {\r
- for(idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++ ) {\r
- pRbElm = &pRbMap->prbMap[idxElm];\r
- p_sec_desc = pRbElm->p_sec_desc[sym_id];\r
- if(p_rx_log_buffer[flowId] && p_sec_desc){\r
- if(sym_id >= pRbElm->nStartSymb && sym_id < pRbElm->nStartSymb + pRbElm->numSymb){\r
- pos = ((char*)p_rx_log_buffer[flowId]) + rx_log_buffer_position[flowId];\r
- ptr = p_sec_desc->pData;\r
- if(ptr){\r
- int32_t payload_len = 0;\r
- u32dptr = (uint32_t*)(ptr);\r
- if (pRbElm->compMethod != XRAN_COMPMETHOD_NONE){\r
- struct xranlib_decompress_request bfp_decom_req;\r
- struct xranlib_decompress_response bfp_decom_rsp;\r
-\r
- memset(&bfp_decom_req, 0, sizeof(struct xranlib_decompress_request));\r
- memset(&bfp_decom_rsp, 0, sizeof(struct xranlib_decompress_response));\r
-\r
- bfp_decom_req.data_in = (int8_t *)u32dptr;\r
- bfp_decom_req.numRBs = pRbElm->nRBSize;\r
- bfp_decom_req.len = (3* pRbElm->iqWidth + 1)*pRbElm->nRBSize;\r
- bfp_decom_req.compMethod = pRbElm->compMethod;\r
- bfp_decom_req.iqWidth = pRbElm->iqWidth;\r
-\r
- bfp_decom_rsp.data_out = (int16_t *)(pos + pRbElm->nRBStart*N_SC_PER_PRB*4);\r
- bfp_decom_rsp.len = 0;\r
-\r
- if(xranlib_decompress_avx512(&bfp_decom_req, &bfp_decom_rsp) < 0){\r
- printf ("compression failed [%d]\n",\r
- pRbElm->compMethod);\r
- exit(-1);\r
- } else {\r
- payload_len = bfp_decom_rsp.len;\r
- }\r
- } else {\r
- rte_memcpy(pos + pRbElm->nRBStart*N_SC_PER_PRB*4 , u32dptr, pRbElm->nRBSize*N_SC_PER_PRB*4);\r
- }\r
- }\r
- }\r
- }\r
- }\r
- }\r
- rx_log_buffer_position[flowId] += pXranConf->nULRBs*N_SC_PER_PRB*4;\r
-\r
- if(rx_log_buffer_position[flowId] >= rx_log_buffer_size[flowId])\r
- rx_log_buffer_position[flowId] = 0;\r
- }\r
-\r
- /* prach RX for O-DU only */\r
- if(startupConfiguration.appMode == APP_O_DU) {\r
- flowId = XRAN_MAX_ANTENNA_NR * cc_id + ant_id;\r
- for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++){\r
- if(p_prach_log_buffer[flowId]){\r
- /* (0-79 slots) 10ms of IQs */\r
- pos = ((char*)p_prach_log_buffer[flowId]) + prach_log_buffer_position[flowId];\r
- ptr = psBbuIo->sFHPrachRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData; //8192 144\r
- if(ptr){\r
- u32dptr = (uint32_t*)(ptr);\r
- rte_memcpy(pos, u32dptr, PRACH_PLAYBACK_BUFFER_BYTES);\r
- }else\r
- printf("ptr ==NULL\n");\r
-\r
- prach_log_buffer_position[flowId] += PRACH_PLAYBACK_BUFFER_BYTES;\r
-\r
- if(prach_log_buffer_position[flowId] >= prach_log_buffer_size[flowId])\r
- prach_log_buffer_position[flowId] = 0;\r
- } else {\r
- //printf("flowId %d\n", flowId);\r
- }\r
- }\r
- }\r
- }\r
-\r
- /* SRS RX for O-DU only */\r
- if(startupConfiguration.appMode == APP_O_DU) {\r
- for(ant_id = 0; ant_id < XRAN_MAX_ANT_ARRAY_ELM_NR; ant_id++){\r
- flowId = XRAN_MAX_ANT_ARRAY_ELM_NR*cc_id + ant_id;\r
- for(sym_id = 0; sym_id < XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT; sym_id++){\r
- if(p_srs_log_buffer[flowId]){\r
- pos = ((char*)p_srs_log_buffer[flowId]) + srs_log_buffer_position[flowId];\r
- ptr = psBbuIo->sFHSrsRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;\r
- if(ptr){\r
- u32dptr = (uint32_t*)(ptr);\r
- rte_memcpy(pos, u32dptr, pXranConf->nULRBs*N_SC_PER_PRB*4);\r
- }else\r
- printf("ptr ==NULL\n");\r
-\r
- srs_log_buffer_position[flowId] += pXranConf->nULRBs*N_SC_PER_PRB*4;\r
-\r
- if(srs_log_buffer_position[flowId] >= srs_log_buffer_size[flowId])\r
- srs_log_buffer_position[flowId] = 0;\r
- } else {\r
- //printf("flowId %d\n", flowId);\r
- }\r
- }\r
- }\r
- }\r
- }\r
- }\r
-\r
- return 0;\r
-}\r
-\r
-void version_print(void)\r
-{\r
- char sysversion[100];\r
- char *compilation_date = __DATE__;\r
- char *compilation_time = __TIME__;\r
-\r
- uint32_t nLen;\r
- uint32_t i;\r
-\r
- snprintf(sysversion, 99, "Version: %s", VERSIONX);\r
- nLen = strlen(sysversion);\r
-\r
- printf("\n\n");\r
- printf("===========================================================================================================\n");\r
- printf("SAMPLE-APP VERSION\n");\r
- printf("===========================================================================================================\n");\r
-\r
- printf("%s\n", sysversion);\r
- printf("build-date: %s\n", compilation_date);\r
- printf("build-time: %s\n", compilation_time);\r
-}\r
-\r
-int main(int argc, char *argv[])\r
-{\r
- int i;\r
- int j, len;\r
- int lcore_id = 0;\r
- char filename[256];\r
- char prefix_name[256];\r
- uint32_t nCenterFreq;\r
- int32_t xret = 0;\r
- struct stat st = {0};\r
- uint32_t filenameLength = strlen(argv[1]);\r
- char *pCheckName1 = NULL, *pCheckName2 = NULL;\r
- enum xran_if_state xran_curr_if_state = XRAN_INIT;\r
-\r
- uint64_t nMask = (uint64_t)1;\r
- uint16_t nCoreUsage[4*64+1];\r
- uint16_t nCoreId[4*64];\r
- float nTotal = 0.0;\r
- uint64_t nTotalTime;\r
- uint64_t nUsedTime;\r
- uint32_t nCoreUsed;\r
- float nUsedPercent;\r
-\r
-\r
- if (argc == 3)\r
- errx(2, "Need two argument - the PCI address of the network port");\r
- if (filenameLength >= 256)\r
- {\r
- printf("Config file name input is too long, exiting!\n");\r
- exit(-1);\r
- }\r
-\r
- version_print();\r
-\r
- //add for Klocworks\r
- len = strlen(argv[1]) + 1;\r
- if (len > (sizeof(filename) - 10))\r
- len = (sizeof(filename) - 10);\r
- strncpy(filename, argv[1], (sizeof(filename) - 10));\r
- filename[len] = '\0';\r
-\r
- if (xran_is_synchronized() != 0)\r
- printf("Machine is not synchronized using PTP!\n");\r
- else\r
- printf("Machine is synchronized using PTP!\n");\r
-\r
- memset(&startupConfiguration, 0, sizeof(RuntimeConfig));\r
-\r
- if (parseConfigFile(filename, (RuntimeConfig*)&startupConfiguration) != 0) {\r
- printf("Configuration file error.\n");\r
- return -1;\r
- }\r
-\r
- if(startupConfiguration.ant_file[0] == NULL){\r
- printf("it looks like test vector for antennas were not provided\n");\r
- exit(-1);\r
- }\r
-\r
- if (startupConfiguration.numCC > XRAN_MAX_SECTOR_NR) {\r
- printf("Number of cells %d exceeds max number supported %d!\n", startupConfiguration.numCC, XRAN_MAX_SECTOR_NR);\r
- startupConfiguration.numCC = XRAN_MAX_SECTOR_NR;\r
-\r
- }\r
- if (startupConfiguration.antElmTRx > XRAN_MAX_ANT_ARRAY_ELM_NR) {\r
- printf("Number of Antenna elements %d exceeds max number supported %d!\n", startupConfiguration.antElmTRx, XRAN_MAX_ANT_ARRAY_ELM_NR);\r
- startupConfiguration.antElmTRx = XRAN_MAX_ANT_ARRAY_ELM_NR;\r
- }\r
-\r
- numCCPorts = startupConfiguration.numCC;\r
- num_eAxc = startupConfiguration.numAxc;\r
-\r
- printf("numCCPorts %d num_eAxc%d\n", numCCPorts, num_eAxc);\r
-\r
- if (startupConfiguration.mu_number <= 1){\r
- nFpgaToSW_FTH_RxBufferLen = 13168; /* 273*12*4 + 64*/\r
- nFpgaToSW_PRACH_RxBufferLen = 8192;\r
- nSW_ToFpga_FTH_TxBufferLen = 13168 + /* 273*12*4 + 64* + ETH AND ORAN HDRs */\r
- XRAN_MAX_SECTIONS_PER_SYM* (RTE_PKTMBUF_HEADROOM + sizeof(struct ether_hdr) +\r
- sizeof(struct xran_ecpri_hdr) +\r
- sizeof(struct radio_app_common_hdr) +\r
- sizeof(struct data_section_hdr));\r
- } else if (startupConfiguration.mu_number == 3){\r
- nFpgaToSW_FTH_RxBufferLen = 3328;\r
- nFpgaToSW_PRACH_RxBufferLen = 8192;\r
- nSW_ToFpga_FTH_TxBufferLen = 3328 +\r
- XRAN_MAX_SECTIONS_PER_SYM * (RTE_PKTMBUF_HEADROOM + sizeof(struct ether_hdr) +\r
- sizeof(struct xran_ecpri_hdr) +\r
- sizeof(struct radio_app_common_hdr) +\r
- sizeof(struct data_section_hdr));\r
- } else {\r
- printf("given numerology is not supported %d\n", startupConfiguration.mu_number);\r
- exit(-1);\r
- }\r
- printf("nSW_ToFpga_FTH_TxBufferLen %d\n", nSW_ToFpga_FTH_TxBufferLen);\r
-\r
- memset(&xranInit, 0, sizeof(struct xran_fh_init));\r
-\r
- if(startupConfiguration.appMode == APP_O_DU) {\r
- printf("set O-DU\n");\r
- xranInit.io_cfg.id = 0;/* O-DU */\r
- xranInit.io_cfg.core = startupConfiguration.io_core;\r
- xranInit.io_cfg.system_core = startupConfiguration.system_core;\r
- xranInit.io_cfg.pkt_proc_core = startupConfiguration.pkt_proc_core;\r
- xranInit.io_cfg.pkt_aux_core = startupConfiguration.pkt_aux_core; /* do not start*/\r
- xranInit.io_cfg.timing_core = startupConfiguration.timing_core;\r
- } else {\r
- printf("set O-RU\n");\r
- xranInit.io_cfg.id = 1; /* O-RU*/\r
- xranInit.io_cfg.core = startupConfiguration.io_core;\r
- xranInit.io_cfg.system_core = startupConfiguration.system_core;\r
- xranInit.io_cfg.pkt_proc_core = startupConfiguration.pkt_proc_core;\r
- xranInit.io_cfg.pkt_aux_core = startupConfiguration.pkt_aux_core; /* do not start*/\r
- xranInit.io_cfg.timing_core = startupConfiguration.timing_core;\r
- }\r
-\r
- cpu_set_t cpuset;\r
- pthread_t thread;\r
-\r
- thread = pthread_self();\r
- CPU_ZERO(&cpuset);\r
- CPU_SET(xranInit.io_cfg.system_core,&cpuset);\r
- pthread_setaffinity_np(thread, sizeof(cpu_set_t), &cpuset);\r
-/* if (s != 0)\r
- handle_error_en(s, "pthread_setaffinity_np");\r
-*/\r
-\r
- xranInit.io_cfg.bbdev_mode = XRAN_BBDEV_NOT_USED;\r
-\r
- if(startupConfiguration.xranCat == XRAN_CATEGORY_A){\r
- xranInit.eAxCId_conf.mask_cuPortId = 0xf000;\r
- xranInit.eAxCId_conf.mask_bandSectorId = 0x0f00;\r
- xranInit.eAxCId_conf.mask_ccId = 0x00f0;\r
- xranInit.eAxCId_conf.mask_ruPortId = 0x000f;\r
- xranInit.eAxCId_conf.bit_cuPortId = 12;\r
- xranInit.eAxCId_conf.bit_bandSectorId = 8;\r
- xranInit.eAxCId_conf.bit_ccId = 4;\r
- xranInit.eAxCId_conf.bit_ruPortId = 0;\r
- } else {\r
- xranInit.eAxCId_conf.mask_cuPortId = 0xf000;\r
- xranInit.eAxCId_conf.mask_bandSectorId = 0x0c00;\r
- xranInit.eAxCId_conf.mask_ccId = 0x0300;\r
- xranInit.eAxCId_conf.mask_ruPortId = 0x00ff; /* more than [0-127] eAxC */\r
- xranInit.eAxCId_conf.bit_cuPortId = 12;\r
- xranInit.eAxCId_conf.bit_bandSectorId = 10;\r
- xranInit.eAxCId_conf.bit_ccId = 8;\r
- xranInit.eAxCId_conf.bit_ruPortId = 0;\r
- }\r
-\r
- xranInit.io_cfg.dpdk_dev[XRAN_UP_VF] = argv[2];\r
- xranInit.io_cfg.dpdk_dev[XRAN_CP_VF] = argv[3];\r
- xranInit.mtu = startupConfiguration.mtu;\r
-\r
- xranInit.p_o_du_addr = (int8_t *)&startupConfiguration.o_du_addr;\r
- xranInit.p_o_ru_addr = (int8_t *)&startupConfiguration.o_ru_addr;\r
-\r
- snprintf(prefix_name, sizeof(prefix_name), "wls_%d",startupConfiguration.instance_id);\r
- xranInit.filePrefix = prefix_name;\r
-\r
- xranInit.totalBfWeights = startupConfiguration.totalBfWeights;\r
-\r
- xranInit.Tadv_cp_dl = startupConfiguration.Tadv_cp_dl;\r
- xranInit.T2a_min_cp_dl = startupConfiguration.T2a_min_cp_dl;\r
- xranInit.T2a_max_cp_dl = startupConfiguration.T2a_max_cp_dl;\r
- xranInit.T2a_min_cp_ul = startupConfiguration.T2a_min_cp_ul;\r
- xranInit.T2a_max_cp_ul = startupConfiguration.T2a_max_cp_ul;\r
- xranInit.T2a_min_up = startupConfiguration.T2a_min_up;\r
- xranInit.T2a_max_up = startupConfiguration.T2a_max_up;\r
- xranInit.Ta3_min = startupConfiguration.Ta3_min;\r
- xranInit.Ta3_max = startupConfiguration.Ta3_max;\r
- xranInit.T1a_min_cp_dl = startupConfiguration.T1a_min_cp_dl;\r
- xranInit.T1a_max_cp_dl = startupConfiguration.T1a_max_cp_dl;\r
- xranInit.T1a_min_cp_ul = startupConfiguration.T1a_min_cp_ul;\r
- xranInit.T1a_max_cp_ul = startupConfiguration.T1a_max_cp_ul;\r
- xranInit.T1a_min_up = startupConfiguration.T1a_min_up;\r
- xranInit.T1a_max_up = startupConfiguration.T1a_max_up;\r
- xranInit.Ta4_min = startupConfiguration.Ta4_min;\r
- xranInit.Ta4_max = startupConfiguration.Ta4_max;\r
-\r
- xranInit.enableCP = startupConfiguration.enableCP;\r
- xranInit.prachEnable = startupConfiguration.enablePrach;\r
- xranInit.srsEnable = startupConfiguration.enableSrs;\r
- xranInit.debugStop = startupConfiguration.debugStop;\r
- xranInit.debugStopCount = startupConfiguration.debugStopCount;\r
- xranInit.DynamicSectionEna = startupConfiguration.DynamicSectionEna;\r
- xranInit.io_cfg.bbdev_mode = XRAN_BBDEV_NOT_USED;\r
- xranInit.GPS_Alpha = startupConfiguration.GPS_Alpha;\r
- xranInit.GPS_Beta = startupConfiguration.GPS_Beta;\r
-\r
- xranInit.cp_vlan_tag = startupConfiguration.cp_vlan_tag;\r
- xranInit.up_vlan_tag = startupConfiguration.up_vlan_tag;\r
-\r
- printf("IQ files size is %d slots\n", startupConfiguration.numSlots);\r
-\r
- iq_playback_buffer_size_dl = (startupConfiguration.numSlots * N_SYM_PER_SLOT * N_SC_PER_PRB *\r
- app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nDLBandwidth, startupConfiguration.nDLAbsFrePointA)\r
- *4L);\r
-\r
- iq_playback_buffer_size_ul = (startupConfiguration.numSlots * N_SYM_PER_SLOT * N_SC_PER_PRB *\r
- app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nULBandwidth, startupConfiguration.nULAbsFrePointA)\r
- *4L);\r
-\r
-\r
- /* 10 * [14*32*273*2*2] = 4892160 bytes */\r
- iq_bfw_buffer_size_dl = (startupConfiguration.numSlots * N_SYM_PER_SLOT * startupConfiguration.antElmTRx *\r
- app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nDLBandwidth, startupConfiguration.nDLAbsFrePointA)\r
- *4L);\r
-\r
- /* 10 * [14*32*273*2*2] = 4892160 bytes */\r
- iq_bfw_buffer_size_ul = (startupConfiguration.numSlots * N_SYM_PER_SLOT *\r
- app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nULBandwidth, startupConfiguration.nULAbsFrePointA)\r
- *4L);\r
-\r
- /* 10 * [1*273*2*2] = 349440 bytes */\r
- iq_srs_buffer_size_ul = (startupConfiguration.numSlots * N_SYM_PER_SLOT * N_SC_PER_PRB *\r
- app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nULBandwidth, startupConfiguration.nULAbsFrePointA)\r
- *4L);\r
-\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
- p_tx_play_buffer[i] = (int16_t*)malloc(iq_playback_buffer_size_dl);\r
- tx_play_buffer_size[i] = (int32_t)iq_playback_buffer_size_dl;\r
-\r
- if (p_tx_play_buffer[i] == NULL)\r
- exit(-1);\r
-\r
- tx_play_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.ant_file[i],\r
- "DL IFFT IN IQ Samples in binary format",\r
- (uint8_t*) p_tx_play_buffer[i],\r
- tx_play_buffer_size[i],\r
- 1);\r
- tx_play_buffer_position[i] = 0;\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
-\r
- p_tx_dl_bfw_buffer[i] = (int16_t*)malloc(iq_bfw_buffer_size_dl);\r
- tx_dl_bfw_buffer_size[i] = (int32_t)iq_bfw_buffer_size_dl;\r
-\r
- if (p_tx_dl_bfw_buffer[i] == NULL)\r
- exit(-1);\r
-\r
- tx_dl_bfw_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.dl_bfw_file[i],\r
- "DL BF weights IQ Samples in binary format",\r
- (uint8_t*) p_tx_dl_bfw_buffer[i],\r
- tx_dl_bfw_buffer_size[i],\r
- 1);\r
- tx_dl_bfw_buffer_position[i] = 0;\r
- }\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){\r
-\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
- p_tx_ul_bfw_buffer[i] = (int16_t*)malloc(iq_bfw_buffer_size_ul);\r
- tx_ul_bfw_buffer_size[i] = (int32_t)iq_bfw_buffer_size_ul;\r
-\r
- if (p_tx_ul_bfw_buffer[i] == NULL)\r
- exit(-1);\r
-\r
- tx_ul_bfw_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.ul_bfw_file[i],\r
- "UL BF weights IQ Samples in binary format",\r
- (uint8_t*) p_tx_ul_bfw_buffer[i],\r
- tx_ul_bfw_buffer_size[i],\r
- 1);\r
- tx_ul_bfw_buffer_position[i] = 0;\r
- }\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enablePrach){\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
- p_tx_prach_play_buffer[i] = (int16_t*)malloc(PRACH_PLAYBACK_BUFFER_BYTES);\r
- tx_prach_play_buffer_size[i] = (int32_t)PRACH_PLAYBACK_BUFFER_BYTES;\r
-\r
- if (p_tx_prach_play_buffer[i] == NULL)\r
- exit(-1);\r
-\r
- memset(p_tx_prach_play_buffer[i], 0, PRACH_PLAYBACK_BUFFER_BYTES);\r
-\r
- tx_prach_play_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.prach_file[i],\r
- "PRACH IQ Samples in binary format",\r
- (uint8_t*) p_tx_prach_play_buffer[i],\r
- tx_prach_play_buffer_size[i],\r
- 1);\r
- tx_prach_play_buffer_position[i] = 0;\r
- }\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enableSrs){\r
- for(i = 0;\r
- i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);\r
- i++) {\r
-\r
- p_tx_srs_play_buffer[i] = (int16_t*)malloc(iq_srs_buffer_size_ul);\r
- tx_srs_play_buffer_size[i] = (int32_t)iq_srs_buffer_size_ul;\r
-\r
- if (p_tx_srs_play_buffer[i] == NULL)\r
- exit(-1);\r
-\r
- memset(p_tx_srs_play_buffer[i], 0, iq_srs_buffer_size_ul);\r
- tx_prach_play_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.ul_srs_file[i],\r
- "SRS IQ Samples in binary format",\r
- (uint8_t*) p_tx_srs_play_buffer[i],\r
- tx_srs_play_buffer_size[i],\r
- 1);\r
-\r
- tx_srs_play_buffer_position[i] = 0;\r
- }\r
- }\r
-\r
- /* log of ul */\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
-\r
- p_rx_log_buffer[i] = (int16_t*)malloc(iq_playback_buffer_size_ul);\r
- rx_log_buffer_size[i] = (int32_t)iq_playback_buffer_size_ul;\r
-\r
- if (p_rx_log_buffer[i] == NULL)\r
- exit(-1);\r
-\r
- rx_log_buffer_position[i] = 0;\r
-\r
- memset(p_rx_log_buffer[i], 0, rx_log_buffer_size[i]);\r
- }\r
-\r
- /* log of prach */\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
-\r
- p_prach_log_buffer[i] = (int16_t*)malloc(startupConfiguration.numSlots*XRAN_NUM_OF_SYMBOL_PER_SLOT*PRACH_PLAYBACK_BUFFER_BYTES);\r
- prach_log_buffer_size[i] = (int32_t)startupConfiguration.numSlots*XRAN_NUM_OF_SYMBOL_PER_SLOT*PRACH_PLAYBACK_BUFFER_BYTES;\r
-\r
- if (p_prach_log_buffer[i] == NULL)\r
- exit(-1);\r
-\r
- memset(p_prach_log_buffer[i], 0, prach_log_buffer_size[i]);\r
- prach_log_buffer_position[i] = 0;\r
- }\r
-\r
- /* log of SRS */\r
- if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.enableSrs){\r
- for(i = 0;\r
- i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);\r
- i++) {\r
-\r
- p_srs_log_buffer[i] = (int16_t*)malloc(iq_srs_buffer_size_ul);\r
- srs_log_buffer_size[i] = (int32_t)iq_srs_buffer_size_ul;\r
-\r
- if (p_srs_log_buffer[i] == NULL)\r
- exit(-1);\r
-\r
- memset(p_srs_log_buffer[i], 0, iq_srs_buffer_size_ul);\r
- srs_log_buffer_position[i] = 0;\r
- }\r
- }\r
-\r
- if (stat("./logs", &st) == -1) {\r
- mkdir("./logs", 0777);\r
- }\r
-\r
- for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
-\r
- snprintf(filename, sizeof(filename), "./logs/%s-play_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file_txt(filename,\r
- "DL IFFT IN IQ Samples in human readable format",\r
- (uint8_t*) p_tx_play_buffer[i],\r
- tx_play_buffer_size[i],\r
- 1);\r
-\r
- snprintf(filename, sizeof(filename),"./logs/%s-play_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file(filename,\r
- "DL IFFT IN IQ Samples in binary format",\r
- (uint8_t*) p_tx_play_buffer[i],\r
- tx_play_buffer_size[i]/sizeof(short),\r
- sizeof(short));\r
-\r
-\r
- if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){\r
- snprintf(filename, sizeof(filename),"./logs/%s-dl_bfw_ue%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file_txt(filename,\r
- "DL Beamformig weights IQ Samples in human readable format",\r
- (uint8_t*) p_tx_dl_bfw_buffer[i],\r
- tx_dl_bfw_buffer_size[i],\r
- 1);\r
-\r
- snprintf(filename, sizeof(filename),"./logs/%s-dl_bfw_ue%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file(filename,\r
- "DL Beamformig weightsIQ Samples in binary format",\r
- (uint8_t*) p_tx_dl_bfw_buffer[i],\r
- tx_dl_bfw_buffer_size[i]/sizeof(short),\r
- sizeof(short));\r
-\r
-\r
- snprintf(filename, sizeof(filename), "./logs/%s-ul_bfw_ue%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file_txt(filename,\r
- "UL Beamformig weights IQ Samples in human readable format",\r
- (uint8_t*) p_tx_ul_bfw_buffer[i],\r
- tx_ul_bfw_buffer_size[i],\r
- 1);\r
-\r
- snprintf(filename, sizeof(filename),"./logs/%s-ul_bfw_ue%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file(filename,\r
- "UL Beamformig weightsIQ Samples in binary format",\r
- (uint8_t*) p_tx_ul_bfw_buffer[i],\r
- tx_ul_bfw_buffer_size[i]/sizeof(short),\r
- sizeof(short));\r
-\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enablePrach){\r
- snprintf(filename, sizeof(filename), "./logs/%s-play_prach_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file_txt(filename,\r
- "PRACH IQ Samples in human readable format",\r
- (uint8_t*) p_tx_prach_play_buffer[i],\r
- tx_prach_play_buffer_size[i],\r
- 1);\r
-\r
- snprintf(filename, sizeof(filename), "./logs/%s-play_prach_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file(filename,\r
- "PRACH IQ Samples in binary format",\r
- (uint8_t*) p_tx_prach_play_buffer[i],\r
- tx_prach_play_buffer_size[i]/sizeof(short),\r
- sizeof(short));\r
- }\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enableSrs && startupConfiguration.xranCat == XRAN_CATEGORY_B){\r
- for(i = 0;\r
- i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);\r
- i++) {\r
-\r
-\r
- snprintf(filename, sizeof(filename), "./logs/%s-play_srs_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file_txt(filename,\r
- "SRS IQ Samples in human readable format",\r
- (uint8_t*) p_tx_srs_play_buffer[i],\r
- tx_srs_play_buffer_size[i],\r
- 1);\r
-\r
- snprintf(filename,sizeof(filename), "./logs/%s-play_srs_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file(filename,\r
- "SRS IQ Samples in binary format",\r
- (uint8_t*) p_tx_srs_play_buffer[i],\r
- tx_srs_play_buffer_size[i]/sizeof(short),\r
- sizeof(short));\r
- }\r
- }\r
-\r
- if (startupConfiguration.iqswap == 1){\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
- printf("TX: Swap I and Q to match RU format: [%d]\n",i);\r
- {\r
- /* swap I and Q */\r
- int32_t j;\r
- signed short *ptr = (signed short *) p_tx_play_buffer[i];\r
- signed short temp;\r
-\r
- for (j = 0; j < (int32_t)(tx_play_buffer_size[i]/sizeof(short)) ; j = j + 2){\r
- temp = ptr[j];\r
- ptr[j] = ptr[j + 1];\r
- ptr[j + 1] = temp;\r
- }\r
- }\r
- if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){\r
- printf("DL BFW: Swap I and Q to match RU format: [%d]\n",i);\r
- {\r
- /* swap I and Q */\r
- int32_t j;\r
- signed short *ptr = (signed short *) p_tx_dl_bfw_buffer[i];\r
- signed short temp;\r
-\r
- for (j = 0; j < (int32_t)(tx_dl_bfw_buffer_size[i]/sizeof(short)) ; j = j + 2){\r
- temp = ptr[j];\r
- ptr[j] = ptr[j + 1];\r
- ptr[j + 1] = temp;\r
- }\r
- }\r
- printf("UL BFW: Swap I and Q to match RU format: [%d]\n",i);\r
- {\r
- /* swap I and Q */\r
- int32_t j;\r
- signed short *ptr = (signed short *) p_tx_ul_bfw_buffer[i];\r
- signed short temp;\r
-\r
- for (j = 0; j < (int32_t)(tx_ul_bfw_buffer_size[i]/sizeof(short)) ; j = j + 2){\r
- temp = ptr[j];\r
- ptr[j] = ptr[j + 1];\r
- ptr[j + 1] = temp;\r
- }\r
- }\r
- }\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_RU){\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
- printf("PRACH: Swap I and Q to match RU format: [%d]\n",i);\r
- {\r
- /* swap I and Q */\r
- int32_t j;\r
- signed short *ptr = (signed short *) p_tx_prach_play_buffer[i];\r
- signed short temp;\r
-\r
- for (j = 0; j < (int32_t)(tx_prach_play_buffer_size[i]/sizeof(short)) ; j = j + 2){\r
- temp = ptr[j];\r
- ptr[j] = ptr[j + 1];\r
- ptr[j + 1] = temp;\r
- }\r
- }\r
- }\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_RU){\r
- for(i = 0;\r
- i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);\r
- i++) {\r
- printf("SRS: Swap I and Q to match RU format: [%d]\n",i);\r
- {\r
- /* swap I and Q */\r
- int32_t j;\r
- signed short *ptr = (signed short *) p_tx_srs_play_buffer[i];\r
- signed short temp;\r
-\r
- for (j = 0; j < (int32_t)(tx_srs_play_buffer_size[i]/sizeof(short)) ; j = j + 2){\r
- temp = ptr[j];\r
- ptr[j] = ptr[j + 1];\r
- ptr[j + 1] = temp;\r
- }\r
- }\r
- }\r
- }\r
- }\r
-\r
-#if 0\r
- for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
-\r
- sprintf(filename, "./logs/swap_IQ_play_ant%d.txt", i);\r
- sys_save_buf_to_file_txt(filename,\r
- "DL IFFT IN IQ Samples in human readable format",\r
- (uint8_t*) p_tx_play_buffer[i],\r
- tx_play_buffer_size[i],\r
- 1);\r
- }\r
-#endif\r
- if (startupConfiguration.nebyteorderswap == 1 && startupConfiguration.compression == 0){\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
- printf("TX: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);\r
- for (j = 0; j < tx_play_buffer_size[i]/sizeof(short); j++){\r
- p_tx_play_buffer[i][j] = rte_cpu_to_be_16(p_tx_play_buffer[i][j]);\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){\r
- printf("DL BFW: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);\r
- for (j = 0; j < tx_dl_bfw_buffer_size[i]/sizeof(short); j++){\r
- p_tx_dl_bfw_buffer[i][j] = rte_cpu_to_be_16(p_tx_dl_bfw_buffer[i][j]);\r
- }\r
- printf("UL BFW: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);\r
- for (j = 0; j < tx_ul_bfw_buffer_size[i]/sizeof(short); j++){\r
- p_tx_ul_bfw_buffer[i][j] = rte_cpu_to_be_16(p_tx_ul_bfw_buffer[i][j]);\r
- }\r
- }\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enablePrach){\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
- printf("PRACH: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);\r
- for (j = 0; j < tx_prach_play_buffer_size[i]/sizeof(short); j++){\r
- p_tx_prach_play_buffer[i][j] = rte_cpu_to_be_16(p_tx_prach_play_buffer[i][j]);\r
- }\r
- }\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enableSrs){\r
- for(i = 0;\r
- i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);\r
- i++) {\r
- printf("SRS: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);\r
- for (j = 0; j < tx_srs_play_buffer_size[i]/sizeof(short); j++){\r
- p_tx_srs_play_buffer[i][j] = rte_cpu_to_be_16(p_tx_srs_play_buffer[i][j]);\r
- }\r
- }\r
- }\r
-\r
- }\r
-\r
-#if 0\r
- for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
-\r
- sprintf(filename, "./logs/swap_be_play_ant%d.txt", i);\r
- sys_save_buf_to_file_txt(filename,\r
- "DL IFFT IN IQ Samples in human readable format",\r
- (uint8_t*) p_tx_play_buffer[i],\r
- tx_play_buffer_size[i],\r
- 1);\r
- }\r
-#endif\r
-\r
- memset(&xranConf, 0, sizeof(struct xran_fh_config));\r
- pXranConf = &xranConf;\r
-\r
- pXranConf->nDLRBs = app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nDLBandwidth, startupConfiguration.nDLAbsFrePointA);\r
- pXranConf->nULRBs = app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nULBandwidth, startupConfiguration.nULAbsFrePointA);\r
-\r
- if(startupConfiguration.DynamicSectionEna == 0){\r
- struct xran_prb_map* pRbMap;\r
-\r
- pRbMap = &startupConfiguration.PrbMapDl;\r
-\r
- pRbMap->dir = XRAN_DIR_DL;\r
- pRbMap->xran_port = 0;\r
- pRbMap->band_id = 0;\r
- pRbMap->cc_id = 0;\r
- pRbMap->ru_port_id = 0;\r
- pRbMap->tti_id = 0;\r
- pRbMap->start_sym_id = 0;\r
- pRbMap->nPrbElm = 1;\r
- pRbMap->prbMap[0].nStartSymb = 0;\r
- pRbMap->prbMap[0].numSymb = 14;\r
- pRbMap->prbMap[0].nRBStart = 0;\r
- pRbMap->prbMap[0].nRBSize = pXranConf->nDLRBs;\r
- pRbMap->prbMap[0].nBeamIndex = 0;\r
- pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE;\r
- pRbMap->prbMap[0].iqWidth = 16;\r
-\r
- pRbMap = &startupConfiguration.PrbMapUl;\r
- pRbMap->dir = XRAN_DIR_UL;\r
- pRbMap->xran_port = 0;\r
- pRbMap->band_id = 0;\r
- pRbMap->cc_id = 0;\r
- pRbMap->ru_port_id = 0;\r
- pRbMap->tti_id = 0;\r
- pRbMap->start_sym_id = 0;\r
- pRbMap->nPrbElm = 1;\r
- pRbMap->prbMap[0].nStartSymb = 0;\r
- pRbMap->prbMap[0].numSymb = 14;\r
- pRbMap->prbMap[0].nRBStart = 0;\r
- pRbMap->prbMap[0].nRBSize = pXranConf->nULRBs;\r
- pRbMap->prbMap[0].nBeamIndex = 0;\r
- pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE;\r
- pRbMap->prbMap[0].iqWidth = 16;\r
- }\r
-\r
- timer_set_tsc_freq_from_clock();\r
- xret = xran_init(argc, argv, &xranInit, argv[0], &xranHandle);\r
- if(xret != XRAN_STATUS_SUCCESS){\r
- printf("xran_init failed %d\n", xret);\r
- exit(-1);\r
- }\r
-\r
- if(xranHandle == NULL)\r
- exit(1);\r
-\r
-\r
- pXranConf->sector_id = 0;\r
- pXranConf->nCC = numCCPorts;\r
- pXranConf->neAxc = num_eAxc;\r
- pXranConf->neAxcUl = startupConfiguration.numUlAxc;\r
- pXranConf->nAntElmTRx = startupConfiguration.antElmTRx;\r
-\r
- pXranConf->frame_conf.nFrameDuplexType = startupConfiguration.nFrameDuplexType;\r
- pXranConf->frame_conf.nNumerology = startupConfiguration.mu_number;\r
- pXranConf->frame_conf.nTddPeriod = startupConfiguration.nTddPeriod;\r
-\r
- for (i = 0; i < startupConfiguration.nTddPeriod; i++){\r
- pXranConf->frame_conf.sSlotConfig[i] = startupConfiguration.sSlotConfig[i];\r
- }\r
-\r
- pXranConf->prach_conf.nPrachSubcSpacing = startupConfiguration.mu_number;\r
- pXranConf->prach_conf.nPrachFreqStart = 0;\r
- pXranConf->prach_conf.nPrachFilterIdx = XRAN_FILTERINDEX_PRACH_ABC;\r
- pXranConf->prach_conf.nPrachConfIdx = startupConfiguration.prachConfigIndex;\r
- pXranConf->prach_conf.nPrachFreqOffset = -792;\r
-\r
- pXranConf->srs_conf.symbMask = startupConfiguration.srsSymMask;\r
- pXranConf->srs_conf.eAxC_offset = 2 * startupConfiguration.numAxc; /* PUSCH, PRACH, SRS */\r
-\r
- pXranConf->ru_conf.xranCat = startupConfiguration.xranCat;\r
- pXranConf->ru_conf.iqWidth = startupConfiguration.PrbMapDl.prbMap[0].iqWidth;\r
-\r
- if (startupConfiguration.compression == 0)\r
- pXranConf->ru_conf.compMeth = XRAN_COMPMETHOD_NONE;\r
- else\r
- pXranConf->ru_conf.compMeth = XRAN_COMPMETHOD_BLKFLOAT;\r
-\r
- pXranConf->ru_conf.fftSize = 0;\r
- while (startupConfiguration.nULFftSize >>= 1)\r
- ++pXranConf->ru_conf.fftSize;\r
-\r
- pXranConf->ru_conf.byteOrder = (startupConfiguration.nebyteorderswap == 1) ? XRAN_NE_BE_BYTE_ORDER : XRAN_CPU_LE_BYTE_ORDER ;\r
- pXranConf->ru_conf.iqOrder = (startupConfiguration.iqswap == 1) ? XRAN_Q_I_ORDER : XRAN_I_Q_ORDER;\r
-\r
- printf("FFT Order %d\n", pXranConf->ru_conf.fftSize);\r
-\r
- nCenterFreq = startupConfiguration.nDLAbsFrePointA + (((pXranConf->nDLRBs * N_SC_PER_PRB) / 2) * app_xran_get_scs(startupConfiguration.mu_number));\r
- pXranConf->nDLCenterFreqARFCN = app_xran_cal_nrarfcn(nCenterFreq);\r
- printf("DL center freq %d DL NR-ARFCN %d\n", nCenterFreq, pXranConf->nDLCenterFreqARFCN);\r
-\r
- nCenterFreq = startupConfiguration.nULAbsFrePointA + (((pXranConf->nULRBs * N_SC_PER_PRB) / 2) * app_xran_get_scs(startupConfiguration.mu_number));\r
- pXranConf->nULCenterFreqARFCN = app_xran_cal_nrarfcn(nCenterFreq);\r
- printf("UL center freq %d UL NR-ARFCN %d\n", nCenterFreq, pXranConf->nULCenterFreqARFCN);\r
-\r
- pXranConf->bbdev_dec = NULL;\r
- pXranConf->bbdev_enc = NULL;\r
-\r
- pXranConf->log_level = 1;\r
-\r
- if(startupConfiguration.maxFrameId)\r
- pXranConf->ru_conf.xran_max_frame = startupConfiguration.maxFrameId;\r
-\r
- if(init_xran() != 0)\r
- exit(-1);\r
-\r
- xran_reg_physide_cb(xranHandle, physide_dl_tti_call_back, NULL, 10, XRAN_CB_TTI);\r
- xran_reg_physide_cb(xranHandle, physide_ul_half_slot_call_back, NULL, 10, XRAN_CB_HALF_SLOT_RX);\r
- xran_reg_physide_cb(xranHandle, physide_ul_full_slot_call_back, NULL, 10, XRAN_CB_FULL_SLOT_RX);\r
-\r
- init_xran_iq_content();\r
-\r
- xret = xran_open(xranHandle, pXranConf);\r
-\r
- if(xret != XRAN_STATUS_SUCCESS){\r
- printf("xran_open failed %d\n", xret);\r
- exit(-1);\r
- }\r
-\r
- snprintf(filename, sizeof(filename),"mlog-%s", startupConfiguration.appMode == 0 ? "o-du" : "o-ru");\r
-\r
- /* MLogOpen(0, 32, 0, 0xFFFFFFFF, filename);*/\r
-\r
- MLogOpen(256, 3, 20000, 0, filename);\r
- MLogSetMask(0);\r
-\r
- puts("----------------------------------------");\r
- printf("MLog Info: virt=0x%016lx size=%d\n", MLogGetFileLocation(), MLogGetFileSize());\r
- puts("----------------------------------------");\r
-\r
-\r
- uint64_t nActiveCoreMask[MAX_BBU_POOL_CORE_MASK] = {0};\r
- nActiveCoreMask[0] = 1 << xranInit.io_cfg.timing_core;\r
- uint32_t numCarriers = startupConfiguration.numCC;\r
-\r
- MLogAddTestCase(nActiveCoreMask, numCarriers);\r
-\r
- fcntl(0, F_SETFL, fcntl(0, F_GETFL) | O_NONBLOCK);\r
-\r
- state = APP_RUNNING;\r
- printf("Start XRAN traffic\n");\r
- xran_start(xranHandle);\r
- sleep(3);\r
- print_menu();\r
- for (;;) {\r
- struct xran_common_counters x_counters;\r
- char input[10];\r
- sleep(1);\r
- xran_curr_if_state = xran_get_if_state();\r
- if(xran_get_common_counters(xranHandle, &x_counters) == XRAN_STATUS_SUCCESS) {\r
-\r
- xran_get_time_stats(&nTotalTime, &nUsedTime, &nCoreUsed, 1);\r
- nUsedPercent = ((float)nUsedTime * 100.0) / (float)nTotalTime;\r
-\r
- printf("[%s][rx %ld pps %ld kbps %ld][tx %ld pps %ld kbps %ld] [on_time %ld early %ld late %ld corrupt %ld pkt_dupl %ld Total %ld] IO Util: %5.2f %%\n",\r
- ((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"),\r
- rx_counter,\r
- rx_counter-old_rx_counter,\r
- rx_bytes_per_sec*8/1000L,\r
- tx_counter,\r
- tx_counter-old_tx_counter,\r
- tx_bytes_per_sec*8/1000L,\r
- x_counters.Rx_on_time,\r
- x_counters.Rx_early,\r
- x_counters.Rx_late,\r
- x_counters.Rx_corrupt,\r
- x_counters.Rx_pkt_dupl,\r
- x_counters.Total_msgs_rcvd,\r
- nUsedPercent);\r
-\r
- if(rx_counter > old_rx_counter)\r
- old_rx_counter = rx_counter;\r
- if(tx_counter > old_tx_counter)\r
- old_tx_counter = tx_counter;\r
-\r
- if(rx_counter > 0 && tx_counter > 0)\r
- MLogSetMask(0xFFFFFFFF);\r
- } else {\r
- printf("error xran_get_common_counters\n");\r
- }\r
-\r
- if (xran_curr_if_state == XRAN_STOPPED){\r
- break;\r
- }\r
- if (NULL == fgets(input, 10, stdin)) {\r
- continue;\r
- }\r
-\r
- const int sel_opt = atoi(input);\r
- switch (sel_opt) {\r
- case 1:\r
- xran_start(xranHandle);\r
- printf("Start XRAN traffic\n");\r
- break;\r
- case 2:\r
- break;\r
- case 3:\r
- xran_stop(xranHandle);\r
- printf("Stop XRAN traffic\n");\r
- state = APP_STOPPED;\r
- break;\r
- default:\r
- puts("Wrong option passed!");\r
- break;\r
- }\r
- if (APP_STOPPED == state)\r
- break;\r
- }\r
-\r
- get_xran_iq_content();\r
-\r
- puts("Closing l1 app... Ending all threads...");\r
- xran_close(xranHandle);\r
- MLogPrint(NULL);\r
-\r
- stop_xran();\r
- puts("Dump IQs...");\r
-\r
- if (startupConfiguration.iqswap == 1){\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
- printf("RX: Swap I and Q to match CPU format: [%d]\n",i);\r
- {\r
- /* swap I and Q */\r
- int32_t j;\r
- signed short *ptr = (signed short *) p_rx_log_buffer[i];\r
- signed short temp;\r
-\r
- for (j = 0; j < (int32_t)(rx_log_buffer_size[i]/sizeof(short)) ; j = j + 2){\r
- temp = ptr[j];\r
- ptr[j] = ptr[j + 1];\r
- ptr[j + 1] = temp;\r
- }\r
- }\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.enableSrs){\r
- for(i = 0;\r
- i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);\r
- i++) {\r
- printf("SRS: Swap I and Q to match CPU format: [%d]\n",i);\r
- {\r
- /* swap I and Q */\r
- int32_t j;\r
- signed short *ptr = (signed short *) p_srs_log_buffer[i];\r
- signed short temp;\r
-\r
- for (j = 0; j < (int32_t)(srs_log_buffer_size[i]/sizeof(short)) ; j = j + 2){\r
- temp = ptr[j];\r
- ptr[j] = ptr[j + 1];\r
- ptr[j + 1] = temp;\r
- }\r
- }\r
- }\r
- }\r
- }\r
-\r
- if (startupConfiguration.nebyteorderswap == 1 && startupConfiguration.compression == 0) {\r
-\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
- printf("RX: Convert S16 I and S16 Q to cpu byte order from XRAN Ant: [%d]\n",i);\r
- for (j = 0; j < rx_log_buffer_size[i]/sizeof(short); j++){\r
- p_rx_log_buffer[i][j] = rte_be_to_cpu_16(p_rx_log_buffer[i][j]);\r
- }\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.enableSrs){\r
- for(i = 0;\r
- i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);\r
- i++) {\r
- printf("SRS: Convert S16 I and S16 Q to cpu byte order from XRAN Ant: [%d]\n",i);\r
- for (j = 0; j < srs_log_buffer_size[i]/sizeof(short); j++){\r
- p_srs_log_buffer[i][j] = rte_be_to_cpu_16(p_srs_log_buffer[i][j]);\r
- }\r
- }\r
- }\r
- }\r
-\r
- for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
-\r
- snprintf(filename, sizeof(filename), "./logs/%s-rx_log_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file_txt(filename,\r
- "UL FFT OUT IQ Samples in human readable format",\r
- (uint8_t*) p_rx_log_buffer[i],\r
- rx_log_buffer_size[i],\r
- 1);\r
-\r
- snprintf(filename, sizeof(filename), "./logs/%s-rx_log_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file(filename,\r
- "UL FFT OUT IQ Samples in binary format",\r
- (uint8_t*) p_rx_log_buffer[i],\r
- rx_log_buffer_size[i]/sizeof(short),\r
- sizeof(short));\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.enableSrs){\r
- for(i = 0;\r
- i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);\r
- i++) {\r
- snprintf(filename, sizeof(filename), "./logs/%s-srs_log_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file_txt(filename,\r
- "SRS UL FFT OUT IQ Samples in human readable format",\r
- (uint8_t*) p_srs_log_buffer[i],\r
- srs_log_buffer_size[i],\r
- 1);\r
-\r
- snprintf(filename, sizeof(filename), "./logs/%s-srs_log_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file(filename,\r
- "SRS UL FFT OUT IQ Samples in binary format",\r
- (uint8_t*) p_srs_log_buffer[i],\r
- srs_log_buffer_size[i]/sizeof(short),\r
- sizeof(short));\r
- }\r
- }\r
-\r
- if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.enablePrach){\r
- if (startupConfiguration.iqswap == 1){\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
- printf("PRACH: Swap I and Q to match CPU format: [%d]\n",i);\r
- {\r
- /* swap I and Q */\r
- int32_t j;\r
- signed short *ptr = (signed short *) p_prach_log_buffer[i];\r
- signed short temp;\r
-\r
- for (j = 0; j < (int32_t)(prach_log_buffer_size[i]/sizeof(short)) ; j = j + 2){\r
- temp = ptr[j];\r
- ptr[j] = ptr[j + 1];\r
- ptr[j + 1] = temp;\r
- }\r
- }\r
- }\r
- }\r
-\r
-\r
- if (startupConfiguration.nebyteorderswap == 1 && startupConfiguration.compression == 0){\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
- printf("PRACH: Convert S16 I and S16 Q to cpu byte order from XRAN Ant: [%d]\n",i);\r
- for (j = 0; j < prach_log_buffer_size[i]/sizeof(short); j++){\r
- p_prach_log_buffer[i][j] = rte_be_to_cpu_16(p_prach_log_buffer[i][j]);\r
- }\r
- }\r
- }\r
-\r
-\r
- for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
-\r
- snprintf(filename, sizeof(filename), "./logs/%s-prach_log_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file_txt(filename,\r
- "PRACH FFT OUT IQ Samples in human readable format",\r
- (uint8_t*) p_prach_log_buffer[i],\r
- prach_log_buffer_size[i],\r
- 1);\r
-\r
- snprintf(filename, sizeof(filename), "./logs/%s-prach_log_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
- sys_save_buf_to_file(filename,\r
- "PRACH FFT OUT IQ Samples in binary format",\r
- (uint8_t*) p_prach_log_buffer[i],\r
- prach_log_buffer_size[i]/sizeof(short),\r
- sizeof(short));\r
- }\r
- }\r
-\r
- return 0;\r
-}\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+#define _GNU_SOURCE
+#include <unistd.h>
+#include <sys/syscall.h>
+#include <sched.h>
+#include <assert.h>
+#include <err.h>
+#include <libgen.h>
+#include <sys/time.h>
+#include <time.h>
+#include <unistd.h>
+#include <stdio.h>
+#include <fcntl.h>
+#include <pthread.h>
+#include <sys/stat.h>
+#include <unistd.h>
+
+#include "common.h"
+#include "config.h"
+#include "xran_mlog_lnx.h"
+
+#include "xran_fh_o_du.h"
+#include "xran_compression.h"
+#include "xran_cp_api.h"
+#include "xran_sync_api.h"
+#include "xran_mlog_task_id.h"
+
+#define MAX_BBU_POOL_CORE_MASK (4)
+
+
+#define SW_FPGA_TOTAL_BUFFER_LEN 4*1024*1024*1024
+#define SW_FPGA_SEGMENT_BUFFER_LEN 1*1024*1024*1024
+#define SW_FPGA_FH_TOTAL_BUFFER_LEN 1*1024*1024*1024
+#define FPGA_TO_SW_PRACH_RX_BUFFER_LEN (8192)
+
+#define NSEC_PER_SEC 1000000000
+
+#define MAX_PKT_BURST (448+4) // 4x14x8
+#define N_MAX_BUFFER_SEGMENT MAX_PKT_BURST
+
+#define MAIN_PRIORITY 98
+#define NUM_OF_SUBFRAME_PER_FRAME (10)
+
+enum app_state state;
+
+uint64_t tick_per_usec;
+static volatile uint64_t timer_last_irq_tick = 0;
+static uint64_t tsc_resolution_hz = 0;
+
+RuntimeConfig startupConfiguration = {0};
+
+/* buffers size */
+uint32_t nFpgaToSW_FTH_RxBufferLen;
+uint32_t nFpgaToSW_PRACH_RxBufferLen;
+uint32_t nSW_ToFpga_FTH_TxBufferLen;
+
+static struct xran_fh_init xranInit;
+void * xranHandle = NULL;
+
+struct xran_fh_config xranConf;
+struct xran_fh_config *pXranConf = NULL;
+
+typedef struct
+{
+ uint32_t phaseFlag :1;
+ uint32_t NRARFCN :22;
+ uint32_t SULFreShift :1;
+ uint32_t SULFlag :1;
+ uint32_t rsv :7;
+}FPGAPhaseCompCfg;
+
+typedef struct XranLibConfig
+{
+ uint32_t nDriverCoreId;
+ uint32_t nTimingAdvance;
+ uint32_t nFhConfig;
+ uint32_t nFhBufIntFlag;
+ uint32_t nSectorNum;
+ uint32_t nNrOfSlotInSf;
+ uint32_t nNrofSfInFrame;
+ void * pFthInstanceHandles;
+}XranLibConfigStruct;
+typedef enum {
+ XRANFTHTX_OUT = 0,
+ XRANFTHTX_PRB_MAP_OUT,
+ XRANFTHTX_SEC_DESC_OUT,
+ XRANFTHRX_IN,
+ XRANFTHRX_PRB_MAP_IN,
+ XRANFTHTX_SEC_DESC_IN,
+ XRANFTHRACH_IN,
+ XRANSRS_IN,
+ MAX_SW_XRAN_INTERFACE_NUM
+}SWXRANInterfaceTypeEnum;
+
+/*
+ * manage one cell's all Ethernet frames for one DL or UL LTE subframe
+ */
+typedef struct {
+ /* -1-this subframe is not used in current frame format
+ 0-this subframe can be transmitted, i.e., data is ready
+ 1-this subframe is waiting transmission, i.e., data is not ready
+ 10 - DL transmission missing deadline. When FE needs this subframe data but bValid is still 1,
+ set bValid to 10.
+ */
+ int32_t bValid ; // when UL rx, it is subframe index.
+ int32_t nSegToBeGen;
+ int32_t nSegGenerated; // how many date segment are generated by DL LTE processing or received from FE
+ // -1 means that DL packet to be transmitted is not ready in BS
+ int32_t nSegTransferred; // number of data segments has been transmitted or received
+ struct rte_mbuf *pData[N_MAX_BUFFER_SEGMENT]; // point to DPDK allocated memory pool
+ struct xran_buffer_list sBufferList;
+} BbuIoBufCtrlStruct;
+
+typedef struct {
+ uint64_t nCoreMask;
+ int16_t cpuSocketId;
+ uint8_t nDriverCoreId;
+ uint8_t nFHCoreId;
+
+ struct rte_mempool *bbuio_buf_pool;
+
+ /* io struct */
+ BbuIoBufCtrlStruct sFrontHaulTxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
+ BbuIoBufCtrlStruct sFrontHaulTxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
+ BbuIoBufCtrlStruct sFrontHaulRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
+ BbuIoBufCtrlStruct sFrontHaulRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
+ BbuIoBufCtrlStruct sFHPrachRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
+
+ /* Cat B */
+ BbuIoBufCtrlStruct sFHSrsRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR];
+
+ /* buffers lists */
+ struct xran_flat_buffer sFrontHaulTxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
+ struct xran_flat_buffer sFrontHaulTxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
+ struct xran_flat_buffer sFrontHaulRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
+ struct xran_flat_buffer sFrontHaulRxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
+ struct xran_flat_buffer sFHPrachRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
+
+ /* Cat B SRS buffers */
+ struct xran_flat_buffer sFHSrsRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT];
+
+ void* nInstanceHandle[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR]; // instance per sector
+ uint32_t nBufPoolIndex[XRAN_MAX_SECTOR_NR][MAX_SW_XRAN_INTERFACE_NUM]; // every api owns unique buffer pool
+ uint16_t nInstanceNum;
+
+ uint64_t nTscTiming[XRAN_N_FE_BUF_LEN]; // records the TSC when a timing packet is received.
+} BbuXranIoIfStruct;
+
+static BbuXranIoIfStruct gsXranIoIf;
+static XranLibConfigStruct *gpXranLibConfig = NULL;
+
+extern long rx_counter;
+extern long tx_counter;
+extern long tx_bytes_counter;
+extern long rx_bytes_counter;
+extern long tx_bytes_per_sec;
+extern long rx_bytes_per_sec;
+long old_rx_counter = 0;
+long old_tx_counter = 0;
+
+
+
+#define CPU_HZ tick_per_usec //us
+
+/* Application User space functions */
+void xran_fh_rx_callback(void *pCallbackTag, int32_t status);
+void xran_fh_rx_prach_callback(void *pCallbackTag, int32_t status);
+
+static BbuXranIoIfStruct *xran_get_ctx(void)
+{
+ return &gsXranIoIf;
+}
+
+static void print_menu()
+{
+ puts("+---------------------------------------+");
+ puts("| Press 1 to start 5G NR XRAN traffic |");
+ puts("| Press 2 reserved for future use |");
+ puts("| Press 3 to quit |");
+ puts("+---------------------------------------+");
+}
+
+static int32_t get_xran_sfidx(uint8_t nNrOfSlotInSf)
+{
+ int32_t nSfIdx = -1;
+ uint32_t nFrameIdx;
+ uint32_t nSubframeIdx;
+ uint32_t nSlotIdx;
+ uint64_t nSecond;
+
+ uint32_t nXranTime = xran_get_slot_idx(&nFrameIdx, &nSubframeIdx, &nSlotIdx, &nSecond);
+ nSfIdx = nFrameIdx*NUM_OF_SUBFRAME_PER_FRAME*nNrOfSlotInSf
+ + nSubframeIdx*nNrOfSlotInSf
+ + nSlotIdx;
+#if 0
+ printf("\nxranTime is %d, return is %d, radio frame is %d, subframe is %d slot is %d tsc is %llu us",
+ nXranTime,
+ nSfIdx,
+ nFrameIdx,
+ nSubframeIdx,
+ nSlotIdx,
+ __rdtsc()/CPU_HZ);
+#endif
+
+ return nSfIdx;
+}
+
+void xran_fh_rx_callback(void *pCallbackTag, xran_status_t status)
+{
+ uint64_t t1 = MLogTick();
+ uint32_t mlogVar[10];
+ uint32_t mlogVarCnt = 0;
+ uint8_t Numerlogy = xranConf.frame_conf.nNumerology;
+ uint8_t nNrOfSlotInSf = 1<<Numerlogy;
+ int32_t sfIdx = get_xran_sfidx(nNrOfSlotInSf);
+
+ mlogVar[mlogVarCnt++] = 0xCCCCCCCC;
+ mlogVar[mlogVarCnt++] = status >> 16; /* tti */
+ mlogVar[mlogVarCnt++] = status & 0xFF; /* sym */
+ mlogVar[mlogVarCnt++] = (uint32_t)sfIdx;
+ MLogAddVariables(mlogVarCnt, mlogVar, MLogTick());
+ rte_pause();
+
+ MLogTask(PID_GNB_SYM_CB, t1, MLogTick());
+ return;
+}
+
+void xran_fh_rx_prach_callback(void *pCallbackTag, xran_status_t status)
+{
+ uint64_t t1 = MLogTick();
+ uint32_t mlogVar[10];
+ uint32_t mlogVarCnt = 0;
+
+ mlogVar[mlogVarCnt++] = 0xDDDDDDDD;
+ mlogVar[mlogVarCnt++] = status >> 16; /* tti */
+ mlogVar[mlogVarCnt++] = status & 0xFF; /* sym */
+ MLogAddVariables(mlogVarCnt, mlogVar, MLogTick());
+ rte_pause();
+
+ MLogTask(PID_GNB_PRACH_CB, t1, MLogTick());
+}
+
+void xran_fh_rx_srs_callback(void *pCallbackTag, xran_status_t status)
+{
+ uint64_t t1 = MLogTick();
+ uint32_t mlogVar[10];
+ uint32_t mlogVarCnt = 0;
+
+ mlogVar[mlogVarCnt++] = 0xCCCCCCCC;
+ mlogVar[mlogVarCnt++] = status >> 16; /* tti */
+ mlogVar[mlogVarCnt++] = status & 0xFF; /* sym */
+ MLogAddVariables(mlogVarCnt, mlogVar, MLogTick());
+ rte_pause();
+
+ MLogTask(PID_GNB_SRS_CB, t1, MLogTick());
+}
+
+
+//-------------------------------------------------------------------------------------------
+/** @ingroup group_nbiot_source_auxlib_timer
+ *
+ * @param void
+ *
+ * @return Ticks
+ *
+ * @description
+ * This function reads the rtdsc clock and returns the current value in there.
+ *
+**/
+//-------------------------------------------------------------------------------------------
+unsigned long timer_get_ticks(void)
+{
+ unsigned long ret;
+ union
+ {
+ unsigned long tsc_64;
+ struct
+ {
+ uint32_t lo_32;
+ uint32_t hi_32;
+ };
+ } tsc;
+
+ __asm volatile("rdtsc" :
+ "=a" (tsc.lo_32),
+ "=d" (tsc.hi_32));
+
+ ret = ((unsigned long)tsc.tsc_64);
+ return ret;
+}
+
+//-------------------------------------------------------------------------------------------
+/** @ingroup group_lte_source_auxlib_timer
+ *
+ * @param void
+ *
+ * @return 0 if SUCCESS
+ *
+ * @description
+ * This function gets the clock speed of the core and figures out number of ticks per usec.
+ * It is used by l1app and testmac applications to initialize the mlog utility
+ *
+**/
+//-------------------------------------------------------------------------------------------
+int timer_set_tsc_freq_from_clock(void)
+{
+#define NS_PER_SEC 1E9
+ struct timespec sleeptime = {.tv_nsec = 5E8 }; /* 1/2 second */
+ struct timespec t_start, t_end;
+ uint64_t tsc_resolution_hz = 0;
+
+ if (clock_gettime(CLOCK_MONOTONIC_RAW, &t_start) == 0)
+ {
+ unsigned long ns, end, start = timer_get_ticks();
+ nanosleep(&sleeptime,NULL);
+ clock_gettime(CLOCK_MONOTONIC_RAW, &t_end);
+ end = timer_get_ticks();
+ ns = ((t_end.tv_sec - t_start.tv_sec) * NS_PER_SEC);
+ ns += (t_end.tv_nsec - t_start.tv_nsec);
+
+ double secs = (double)ns/NS_PER_SEC;
+ tsc_resolution_hz = (unsigned long)((end - start)/secs);
+
+ tick_per_usec = (tsc_resolution_hz / 1000000);
+ printf("System clock (rdtsc) resolution %lu [Hz]\n", tsc_resolution_hz);
+ printf("Ticks per us %lu\n", tick_per_usec);
+ return 0;
+ }
+
+ return -1;
+}
+
+int physide_dl_tti_call_back(void * param)
+{
+ uint64_t t1 = MLogTick();
+ rte_pause();
+ MLogTask(PID_GNB_PROC_TIMING, t1, MLogTick());
+ return 0;
+}
+
+int physide_ul_half_slot_call_back(void * param)
+{
+ uint64_t t1 = MLogTick();
+ rte_pause();
+ MLogTask(PID_GNB_PROC_TIMING, t1, MLogTick());
+ return 0;
+}
+
+int physide_ul_full_slot_call_back(void * param)
+{
+ uint64_t t1 = MLogTick();
+ rte_pause();
+ MLogTask(PID_GNB_PROC_TIMING, t1, MLogTick());
+ return 0;
+}
+
+int32_t init_xran(void)
+{
+ BbuXranIoIfStruct *psBbuIo = xran_get_ctx();
+ xran_status_t status;
+ int32_t nSectorIndex[XRAN_MAX_SECTOR_NR];
+ int32_t nSectorNum;
+ int32_t i, j, k, z;
+
+ void *ptr;
+ void *mb;
+ uint32_t *u32dptr;
+ uint16_t *u16dptr;
+ uint8_t *u8dptr;
+
+ SWXRANInterfaceTypeEnum eInterfaceType;
+
+ XranLibConfigStruct *ptrLibConfig;
+
+ struct xran_buffer_list *pFthTxBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
+ struct xran_buffer_list *pFthTxPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
+ struct xran_buffer_list *pFthRxBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
+ struct xran_buffer_list *pFthRxPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
+ struct xran_buffer_list *pFthRxRachBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
+ struct xran_buffer_list *pFthRxSrsBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_N_FE_BUF_LEN];
+
+ for (nSectorNum = 0; nSectorNum < XRAN_MAX_SECTOR_NR; nSectorNum++)
+ {
+ nSectorIndex[nSectorNum] = nSectorNum;
+ }
+
+ nSectorNum = numCCPorts;
+ printf ("XRAN front haul xran_mm_init \n");
+ status = xran_mm_init (xranHandle, (uint64_t) SW_FPGA_FH_TOTAL_BUFFER_LEN, SW_FPGA_SEGMENT_BUFFER_LEN);
+ if (status != XRAN_STATUS_SUCCESS)
+ {
+ printf ("Failed at XRAN front haul xran_mm_init \n");
+ exit(-1);
+ }
+
+ psBbuIo->nInstanceNum = numCCPorts;
+
+ for (k = 0; k < XRAN_PORTS_NUM; k++) {
+ status = xran_sector_get_instances (xranHandle, psBbuIo->nInstanceNum,&psBbuIo->nInstanceHandle[k][0]);
+ if (status != XRAN_STATUS_SUCCESS)
+ {
+ printf ("get sector instance failed %d for XRAN nInstanceNum %d\n",k, psBbuIo->nInstanceNum);
+ exit(-1);
+ }
+ for (i = 0; i < psBbuIo->nInstanceNum; i++){
+ printf("%s [%d]: CC %d handle %p\n", __FUNCTION__, k, i, psBbuIo->nInstanceHandle[0][i]);
+ }
+ }
+
+ printf("Sucess xran_mm_init \n");
+ gpXranLibConfig = (XranLibConfigStruct*)malloc(sizeof(XranLibConfigStruct));
+ ptrLibConfig = gpXranLibConfig;
+ if (ptrLibConfig)
+ {
+ #if 0
+ ptrLibConfig->nDriverCoreId = psBbuIo->nDriverCoreId;
+ ptrLibConfig->pFecInstanceHandles = &(psBbuIo->nInstanceHandle[FPGA_FEC][0]);
+ ptrLibConfig->pFthInstanceHandles = &(psBbuIo->nInstanceHandle[FPGA_FRONTHAUL][0]);
+ ptrLibConfig->nTimingAdvance = psFPGAInitPara->nTimeAdvance;
+ ptrLibConfig->nFhConfig = psFPGAInitPara->nEthPorts;
+ ptrLibConfig->nFhBufIntFlag = 0; //need init fronthaul buffer, then set to 1.
+ ptrLibConfig->nNrofSfInFrame = NUM_OF_SUBFRAME_PER_FRAME;
+ ptrLibConfig->nNrOfSlotInSf = pConfigParams->nNumOfSlotPerSubframe;
+ if (pConfigParams->nNumerology < 3)
+ {
+ ptrLibConfig->nSectorNum = psFPGAInitPara->nSecNum;
+ }
+ #endif
+ }
+ else
+ {
+ printf ("could not allocate ptrLibConfig in init_xran\n");
+ exit(-1);
+ }
+
+ printf("nSectorNum %d\n", nSectorNum);
+
+ /* Init Memory */
+ for(i = 0; i<nSectorNum; i++)
+ {
+ eInterfaceType = XRANFTHTX_OUT;
+ printf("nSectorIndex[%d] = %d\n",i, nSectorIndex[i]);
+ status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],
+ XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT, nSW_ToFpga_FTH_TxBufferLen);
+ if(XRAN_STATUS_SUCCESS != status) {
+ rte_panic("Failed at xran_bm_init , status %d\n", status);
+ }
+ for(j = 0; j < XRAN_N_FE_BUF_LEN; j++)
+ {
+ for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){
+ psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].bValid = 0;
+ psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
+ psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
+ psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
+ psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;
+ psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFrontHaulTxBuffers[j][i][z][0];
+
+ for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++)
+ {
+ psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = nSW_ToFpga_FTH_TxBufferLen; // 14 symbols 3200bytes/symbol
+ psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;
+ psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;
+ status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i], psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);
+ if(XRAN_STATUS_SUCCESS != status){
+ rte_panic("Failed at xran_bm_allocate_buffer , status %d\n",status);
+ }
+ psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;
+ psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *)mb;
+
+ if(ptr){
+ u32dptr = (uint32_t*)(ptr);
+ uint8_t *ptr_temp = (uint8_t *)ptr;
+ memset(u32dptr, 0x0, nSW_ToFpga_FTH_TxBufferLen);
+ // ptr_temp[0] = j; // TTI
+ // ptr_temp[1] = i; // Sec
+ // ptr_temp[2] = z; // Ant
+ // ptr_temp[3] = k; // sym
+ }
+ }
+ }
+ }
+
+ /* C-plane DL */
+ eInterfaceType = XRANFTHTX_SEC_DESC_OUT;
+ status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],
+ XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT*XRAN_MAX_SECTIONS_PER_SYM, sizeof(struct xran_section_desc));
+ if(XRAN_STATUS_SUCCESS != status) {
+ rte_panic("Failed at xran_bm_init , status %d\n", status);
+ }
+
+ eInterfaceType = XRANFTHTX_PRB_MAP_OUT;
+ status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],
+ XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT, sizeof(struct xran_prb_map));
+ if(XRAN_STATUS_SUCCESS != status) {
+ rte_panic("Failed at xran_bm_init , status %d\n", status);
+ }
+
+ for(j = 0; j < XRAN_N_FE_BUF_LEN; j++)
+ {
+ for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){
+ psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].bValid = 0;
+ psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
+ psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
+ psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
+ psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;
+ psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFrontHaulTxPrbMapBuffers[j][i][z];
+
+ {
+ psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nElementLenInBytes = sizeof(struct xran_prb_map);
+ psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nNumberOfElements = 1;
+ psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nOffsetInBytes = 0;
+ status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i], psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);
+ if(XRAN_STATUS_SUCCESS != status) {
+ rte_panic("Failed at xran_bm_allocate_buffer , status %d\n",status);
+ }
+ psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pData = (uint8_t *)ptr;
+ psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pCtrl = (void *)mb;
+
+ if(ptr){
+ void *sd_ptr;
+ void *sd_mb;
+ int elm_id;
+ struct xran_prb_map * p_rb_map = (struct xran_prb_map *)ptr;
+ if (startupConfiguration.appMode == APP_O_DU)
+ memcpy(ptr, &startupConfiguration.PrbMapDl, sizeof(struct xran_prb_map));
+ else
+ memcpy(ptr, &startupConfiguration.PrbMapUl, sizeof(struct xran_prb_map));
+
+ for (elm_id = 0; elm_id < p_rb_map->nPrbElm; elm_id++){
+ struct xran_prb_elm *pPrbElem = &p_rb_map->prbMap[elm_id];
+ for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++){
+ status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i], psBbuIo->nBufPoolIndex[nSectorIndex[i]][XRANFTHTX_SEC_DESC_OUT],&sd_ptr, &sd_mb);
+ if(XRAN_STATUS_SUCCESS != status){
+ rte_panic("SD Failed at xran_bm_allocate_buffer , status %d\n",status);
+ }
+ pPrbElem->p_sec_desc[k] = sd_ptr;
+ }
+ }
+ }
+ }
+ }
+ }
+ }
+
+ for(i = 0; i<nSectorNum; i++)
+ {
+ eInterfaceType = XRANFTHRX_IN;
+ status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType], XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT, nSW_ToFpga_FTH_TxBufferLen);
+ if(XRAN_STATUS_SUCCESS != status)
+ {
+ printf("Failed at xran_bm_init, status %d\n", status);
+ iAssert(status == XRAN_STATUS_SUCCESS);
+ }
+
+ for(j = 0;j < XRAN_N_FE_BUF_LEN; j++)
+ {
+ for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){
+ psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].bValid = 0;
+ psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
+ psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
+ psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
+ psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;
+ psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFrontHaulRxBuffers[j][i][z][0];
+ for(k = 0; k< XRAN_NUM_OF_SYMBOL_PER_SLOT; k++)
+ {
+ psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = nFpgaToSW_FTH_RxBufferLen; // 1 symbols 3200bytes
+ psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;
+ psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;
+ status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i],psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);
+ if(XRAN_STATUS_SUCCESS != status) {
+ rte_panic("Failed at xran_bm_allocate_buffer , status %d\n",status);
+ }
+ psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;
+ psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *) mb;
+ if(ptr){
+ u32dptr = (uint32_t*)(ptr);
+ uint8_t *ptr_temp = (uint8_t *)ptr;
+ memset(u32dptr, 0x0, nFpgaToSW_FTH_RxBufferLen);
+ // ptr_temp[0] = j; // TTI
+ // ptr_temp[1] = i; // Sec
+ // ptr_temp[2] = z; // Ant
+ // ptr_temp[3] = k; // sym
+ }
+ }
+ }
+ }
+
+ /* C-plane */
+ eInterfaceType = XRANFTHTX_SEC_DESC_IN;
+ status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],
+ XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT*XRAN_MAX_SECTIONS_PER_SYM, sizeof(struct xran_section_desc));
+ if(XRAN_STATUS_SUCCESS != status) {
+ rte_panic("Failed at xran_bm_init , status %d\n", status);
+ }
+ eInterfaceType = XRANFTHRX_PRB_MAP_IN;
+ status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],
+ XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT, sizeof(struct xran_prb_map));
+ if(XRAN_STATUS_SUCCESS != status) {
+ rte_panic("Failed at xran_bm_init, status %d\n", status);
+ }
+
+ for(j = 0;j < XRAN_N_FE_BUF_LEN; j++) {
+ for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){
+ psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].bValid = 0;
+ psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
+ psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
+ psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
+ psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;
+ psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFrontHaulRxPrbMapBuffers[j][i][z];
+ {
+ psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nElementLenInBytes = sizeof(struct xran_prb_map);
+ psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nNumberOfElements = 1;
+ psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nOffsetInBytes = 0;
+ status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i],psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);
+ if(XRAN_STATUS_SUCCESS != status) {
+ rte_panic("Failed at xran_bm_allocate_buffer , status %d\n",status);
+ }
+ psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pData = (uint8_t *)ptr;
+ psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pCtrl = (void *)mb;
+ if(ptr){
+ void *sd_ptr;
+ void *sd_mb;
+ int elm_id;
+ struct xran_prb_map * p_rb_map = (struct xran_prb_map *)ptr;
+
+ if (startupConfiguration.appMode == APP_O_DU)
+ memcpy(ptr, &startupConfiguration.PrbMapUl, sizeof(struct xran_prb_map));
+ else
+ memcpy(ptr, &startupConfiguration.PrbMapDl, sizeof(struct xran_prb_map));
+
+ for (elm_id = 0; elm_id < p_rb_map->nPrbElm; elm_id++){
+ struct xran_prb_elm *pPrbElem = &p_rb_map->prbMap[elm_id];
+ for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++){
+ status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i], psBbuIo->nBufPoolIndex[nSectorIndex[i]][XRANFTHTX_SEC_DESC_IN],&sd_ptr, &sd_mb);
+ if(XRAN_STATUS_SUCCESS != status){
+ rte_panic("SD Failed at xran_bm_allocate_buffer , status %d\n",status);
+ }
+ pPrbElem->p_sec_desc[k] = sd_ptr;
+ }
+ }
+ }
+ }
+ }
+ }
+ }
+
+
+ // add prach rx buffer
+ for(i = 0; i<nSectorNum; i++)
+ {
+ eInterfaceType = XRANFTHRACH_IN;
+ status = xran_bm_init(psBbuIo->nInstanceHandle[0][i],&psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT, FPGA_TO_SW_PRACH_RX_BUFFER_LEN);
+ if(XRAN_STATUS_SUCCESS != status) {
+ rte_panic("Failed at xran_bm_init, status %d\n", status);
+ }
+ for(j = 0;j < XRAN_N_FE_BUF_LEN; j++)
+ {
+ for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){
+ psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].bValid = 0;
+ psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
+ psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
+ psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
+ psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_MAX_ANTENNA_NR; // ant number.
+ psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFHPrachRxBuffers[j][i][z][0];
+ for(k = 0; k< XRAN_NUM_OF_SYMBOL_PER_SLOT; k++)
+ {
+ psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = FPGA_TO_SW_PRACH_RX_BUFFER_LEN;
+ psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;
+ psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;
+ status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i],psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);
+ if(XRAN_STATUS_SUCCESS != status) {
+ rte_panic("Failed at xran_bm_allocate_buffer, status %d\n",status);
+ }
+ psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;
+ psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *)mb;
+ if(ptr){
+ u32dptr = (uint32_t*)(ptr);
+ memset(u32dptr, 0x0, FPGA_TO_SW_PRACH_RX_BUFFER_LEN);
+ }
+ }
+ }
+ }
+ }
+
+ /* add SRS rx buffer */
+ for(i = 0; i<nSectorNum; i++)
+ {
+ eInterfaceType = XRANSRS_IN;
+ status = xran_bm_init(psBbuIo->nInstanceHandle[0][i],&psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],
+ XRAN_N_FE_BUF_LEN*XRAN_MAX_ANT_ARRAY_ELM_NR*XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT, nSW_ToFpga_FTH_TxBufferLen);
+
+ if(XRAN_STATUS_SUCCESS != status) {
+ rte_panic("Failed at xran_bm_init, status %d\n", status);
+ }
+ for(j = 0; j < XRAN_N_FE_BUF_LEN; j++)
+ {
+ for(z = 0; z < XRAN_MAX_ANT_ARRAY_ELM_NR; z++){
+ psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].bValid = 0;
+ psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
+ psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
+ psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
+ psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_MAX_ANT_ARRAY_ELM_NR; /* ant number */
+ psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFHSrsRxBuffers[j][i][z][0];
+ for(k = 0; k < XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT; k++)
+ {
+ psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = nSW_ToFpga_FTH_TxBufferLen;
+ psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;
+ psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;
+ status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i],psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);
+ if(XRAN_STATUS_SUCCESS != status) {
+ rte_panic("Failed at xran_bm_allocate_buffer, status %d\n",status);
+ }
+ psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;
+ psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *)mb;
+ if(ptr){
+ u32dptr = (uint32_t*)(ptr);
+ memset(u32dptr, 0x0, nSW_ToFpga_FTH_TxBufferLen);
+ }
+ }
+ }
+ }
+ }
+
+
+ for(i=0; i<nSectorNum; i++)
+ {
+ for(j=0; j<XRAN_N_FE_BUF_LEN; j++)
+ {
+ for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){
+ pFthTxBuffer[i][z][j] = &(psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList);
+ pFthTxPrbMapBuffer[i][z][j] = &(psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList);
+ pFthRxBuffer[i][z][j] = &(psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList);
+ pFthRxPrbMapBuffer[i][z][j] = &(psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList);
+ pFthRxRachBuffer[i][z][j] = &(psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList);
+ }
+
+ for(z = 0; z < XRAN_MAX_ANT_ARRAY_ELM_NR; z++){
+ pFthRxSrsBuffer[i][z][j] = &(psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList);
+ }
+ }
+ }
+
+ if(NULL != psBbuIo->nInstanceHandle[0])
+ {
+ /* add pusch callback */
+ for (i = 0; i<nSectorNum; i++)
+ {
+ xran_5g_fronthault_config (psBbuIo->nInstanceHandle[0][i],
+ pFthTxBuffer[i],
+ pFthTxPrbMapBuffer[i],
+ pFthRxBuffer[i],
+ pFthRxPrbMapBuffer[i],
+ xran_fh_rx_callback, &pFthRxBuffer[i][0]);
+ }
+
+ /* add prach callback here */
+ for (i = 0; i<nSectorNum; i++)
+ {
+ xran_5g_prach_req(psBbuIo->nInstanceHandle[0][i], pFthRxRachBuffer[i],
+ xran_fh_rx_prach_callback,&pFthRxRachBuffer[i][0]);
+ }
+
+ /* add SRS callback here */
+ for (i = 0; i<nSectorNum; i++) {
+ xran_5g_srs_req(psBbuIo->nInstanceHandle[0][i], pFthRxSrsBuffer[i],
+ xran_fh_rx_srs_callback,&pFthRxSrsBuffer[i][0]);
+ }
+
+ ptrLibConfig->nFhBufIntFlag = 1;
+ }
+
+ return status;
+}
+
+int init_xran_iq_content(void)
+{
+ BbuXranIoIfStruct *psBbuIo = xran_get_ctx();
+ xran_status_t status;
+ int32_t nSectorIndex[XRAN_MAX_SECTOR_NR];
+ int32_t nSectorNum;
+ int32_t cc_id, ant_id, sym_id, tti;
+ int32_t flowId;
+
+ uint8_t frame_id = 0;
+ uint8_t subframe_id = 0;
+ uint8_t slot_id = 0;
+ uint8_t sym = 0;
+
+ void *ptr;
+ uint32_t *u32dptr;
+ uint16_t *u16dptr;
+ uint8_t *u8dptr;
+
+ char *pos = NULL;
+ struct xran_prb_map *pRbMap = NULL;
+
+ for (nSectorNum = 0; nSectorNum < XRAN_MAX_SECTOR_NR; nSectorNum++)
+ {
+ nSectorIndex[nSectorNum] = nSectorNum;
+ }
+ nSectorNum = numCCPorts;
+ printf ("init_xran_iq_content\n");
+
+ /* Init Memory */
+ for(cc_id = 0; cc_id <nSectorNum; cc_id++)
+ {
+ for(tti = 0; tti < XRAN_N_FE_BUF_LEN; tti ++) {
+ for(ant_id = 0; ant_id < XRAN_MAX_ANTENNA_NR; ant_id++){
+ for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) {
+
+ flowId = XRAN_MAX_ANTENNA_NR*cc_id + ant_id;
+ if(p_tx_play_buffer[flowId]){
+ /* c-plane DL */
+ pRbMap = (struct xran_prb_map *) psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData;
+ if(pRbMap){
+ if (xranInit.DynamicSectionEna == 0){
+ pRbMap->dir = XRAN_DIR_DL;
+ pRbMap->xran_port = 0;
+ pRbMap->band_id = 0;
+ pRbMap->cc_id = cc_id;
+ pRbMap->ru_port_id = ant_id;
+ pRbMap->tti_id = tti;
+ pRbMap->start_sym_id = 0;
+ pRbMap->nPrbElm = 1;
+ pRbMap->prbMap[0].nStartSymb = 0;
+ pRbMap->prbMap[0].numSymb = 14;
+ pRbMap->prbMap[0].nRBStart = 0;
+ pRbMap->prbMap[0].nRBSize = pXranConf->nDLRBs;
+ pRbMap->prbMap[0].nBeamIndex = 0;
+ pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE;
+ pRbMap->prbMap[0].iqWidth = 16;
+ } else if(pXranConf->ru_conf.xranCat == XRAN_CATEGORY_B
+ && startupConfiguration.appMode == APP_O_DU
+ && sym_id == 0){ /* BF Ws are per slot */
+ int idxElm = 0;
+ char* dl_bfw_pos = ((char*)p_tx_dl_bfw_buffer[flowId]) + tx_dl_bfw_buffer_position[flowId];
+ struct xran_prb_elm* p_pRbMapElm = NULL;
+ for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++){
+ p_pRbMapElm = &pRbMap->prbMap[idxElm];
+ p_pRbMapElm->bf_weight.nAntElmTRx = pXranConf->nAntElmTRx;
+ if(p_pRbMapElm->BeamFormingType == XRAN_BEAM_WEIGHT && p_pRbMapElm->bf_weight_update){
+ int16_t ext_len = 9600;
+ int16_t ext_sec_total = 0;
+ int8_t * ext_buf =(int8_t*) xran_malloc(ext_len);
+ int idRb = 0;
+ int16_t *ptr = NULL;
+ int i;
+ if (ext_buf){
+ ext_buf += (RTE_PKTMBUF_HEADROOM +
+ sizeof (struct xran_ecpri_hdr) +
+ sizeof(struct xran_cp_radioapp_section1));
+
+ ext_len -= (RTE_PKTMBUF_HEADROOM +
+ sizeof (struct xran_ecpri_hdr) +
+ sizeof(struct xran_cp_radioapp_section1));
+ ext_sec_total = xran_cp_populate_section_ext_1((int8_t *)ext_buf,
+ ext_len,
+ (int16_t *) (dl_bfw_pos + (p_pRbMapElm->nRBStart*pXranConf->nAntElmTRx)*4),
+ p_pRbMapElm->nRBSize,
+ pXranConf->nAntElmTRx,
+ p_pRbMapElm->iqWidth, p_pRbMapElm->compMethod);
+ if(ext_sec_total > 0){
+ p_pRbMapElm->bf_weight.p_ext_section = ext_buf;
+ p_pRbMapElm->bf_weight.ext_section_sz = ext_sec_total;
+ }else {
+ rte_panic("xran_cp_populate_section_ext_1 return error [%d]\n", ext_sec_total);
+ }
+ } else {
+ rte_panic("xran_malloc return NULL\n");
+ }
+ }
+ }
+ }
+ } else {
+ printf("DL pRbMap ==NULL\n");
+ exit(-1);
+ }
+
+ pos = ((char*)p_tx_play_buffer[flowId]) + tx_play_buffer_position[flowId];
+ ptr = psBbuIo->sFrontHaulTxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;
+
+ if(ptr && pos){
+ int idxElm = 0;
+ u8dptr = (uint8_t*)ptr;
+ int16_t payload_len = 0;
+
+ uint8_t *dst = (uint8_t *)u8dptr;
+ uint8_t *src = (uint8_t *)pos;
+ struct xran_prb_elm* p_prbMapElm = &pRbMap->prbMap[idxElm];
+ dst = xran_add_hdr_offset(dst, p_prbMapElm->compMethod);
+ for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++) {
+ struct xran_section_desc *p_sec_desc = NULL;
+ p_prbMapElm = &pRbMap->prbMap[idxElm];
+ p_sec_desc = p_prbMapElm->p_sec_desc[sym_id];
+
+ if(p_sec_desc == NULL){
+ printf ("p_sec_desc == NULL\n");
+ exit(-1);
+ }
+ src = (uint8_t *)(pos + p_prbMapElm->nRBStart*N_SC_PER_PRB*4L);
+
+ if(p_prbMapElm->compMethod == XRAN_COMPMETHOD_NONE) {
+ payload_len = p_prbMapElm->nRBSize*N_SC_PER_PRB*4L;
+ rte_memcpy(dst, src, payload_len);
+
+ } else if (p_prbMapElm->compMethod == XRAN_COMPMETHOD_BLKFLOAT) {
+ struct xranlib_compress_request bfp_com_req;
+ struct xranlib_compress_response bfp_com_rsp;
+
+ memset(&bfp_com_req, 0, sizeof(struct xranlib_compress_request));
+ memset(&bfp_com_rsp, 0, sizeof(struct xranlib_compress_response));
+
+ bfp_com_req.data_in = (int16_t*)src;
+ bfp_com_req.numRBs = p_prbMapElm->nRBSize;
+ bfp_com_req.len = p_prbMapElm->nRBSize*N_SC_PER_PRB*4L;
+ bfp_com_req.compMethod = p_prbMapElm->compMethod;
+ bfp_com_req.iqWidth = p_prbMapElm->iqWidth;
+
+ bfp_com_rsp.data_out = (int8_t*)dst;
+ bfp_com_rsp.len = 0;
+
+ if(xranlib_compress_avx512(&bfp_com_req, &bfp_com_rsp) < 0){
+ printf ("compression failed [%d]\n",
+ p_prbMapElm->compMethod);
+ exit(-1);
+ } else {
+ payload_len = bfp_com_rsp.len;
+ }
+ }else {
+ printf ("p_prbMapElm->compMethod == %d is not supported\n",
+ p_prbMapElm->compMethod);
+ exit(-1);
+ }
+
+ /* update RB map for given element */
+ p_sec_desc->iq_buffer_offset = RTE_PTR_DIFF(dst, u8dptr);
+ p_sec_desc->iq_buffer_len = payload_len;
+
+ /* add headroom for ORAN headers between IQs for chunk of RBs*/
+ dst += payload_len;
+ dst = xran_add_hdr_offset(dst, p_prbMapElm->compMethod);
+ }
+ } else {
+ exit(-1);
+ printf("ptr ==NULL\n");
+ }
+
+
+ /* c-plane UL */
+ pRbMap = (struct xran_prb_map *) psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData;
+ if(pRbMap){
+ if (xranInit.DynamicSectionEna == 0){
+ pRbMap->dir = XRAN_DIR_UL;
+ pRbMap->xran_port = 0;
+ pRbMap->band_id = 0;
+ pRbMap->cc_id = cc_id;
+ pRbMap->ru_port_id = ant_id;
+ pRbMap->tti_id = tti;
+ pRbMap->start_sym_id = 0;
+ pRbMap->nPrbElm = 1;
+ pRbMap->prbMap[0].nRBStart = 0;
+ pRbMap->prbMap[0].nRBSize = pXranConf->nULRBs;
+ pRbMap->prbMap[0].nStartSymb = 0;
+ pRbMap->prbMap[0].numSymb = 14;
+ pRbMap->prbMap[0].p_sec_desc[sym_id]->iq_buffer_offset = 0;
+ pRbMap->prbMap[0].p_sec_desc[sym_id]->iq_buffer_len = pXranConf->nULRBs *4L;
+ pRbMap->prbMap[0].nBeamIndex = 0;
+ pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE;
+ } else if(pXranConf->ru_conf.xranCat == XRAN_CATEGORY_B
+ && startupConfiguration.appMode == APP_O_DU
+ && sym_id == 0){
+ int idxElm = 0;
+ char * ul_bfw_pos = ((char*)p_tx_ul_bfw_buffer[flowId]) + tx_ul_bfw_buffer_position[flowId];
+ struct xran_prb_elm* p_pRbMapElm = NULL;
+
+ for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++){
+ p_pRbMapElm = &pRbMap->prbMap[idxElm];
+ p_pRbMapElm->bf_weight.nAntElmTRx = pXranConf->nAntElmTRx;
+ if(p_pRbMapElm->BeamFormingType == XRAN_BEAM_WEIGHT && p_pRbMapElm->bf_weight_update){
+ int16_t ext_len = 9600;
+ int16_t ext_sec_total = 0;
+ int8_t * ext_buf =(int8_t*) xran_malloc(ext_len);
+ int idRb = 0;
+ int16_t *ptr = NULL;
+ int i;
+ if (ext_buf){
+ ext_buf += (RTE_PKTMBUF_HEADROOM +
+ sizeof (struct xran_ecpri_hdr) +
+ sizeof(struct xran_cp_radioapp_section1));
+
+ ext_len -= (RTE_PKTMBUF_HEADROOM +
+ sizeof (struct xran_ecpri_hdr) +
+ sizeof(struct xran_cp_radioapp_section1));
+ ptr = (int16_t*)(ul_bfw_pos +(p_pRbMapElm->nRBStart*pXranConf->nAntElmTRx)*4);
+ ext_sec_total = xran_cp_populate_section_ext_1((int8_t *)ext_buf,
+ ext_len,
+ (int16_t *) (ul_bfw_pos + (p_pRbMapElm->nRBStart*pXranConf->nAntElmTRx)*4),
+ p_pRbMapElm->nRBSize,
+ pXranConf->nAntElmTRx,
+ p_pRbMapElm->iqWidth, p_pRbMapElm->compMethod);
+ if(ext_sec_total > 0){
+ p_pRbMapElm->bf_weight.p_ext_section = ext_buf;
+ p_pRbMapElm->bf_weight.ext_section_sz = ext_sec_total;
+ }else {
+ rte_panic("xran_cp_populate_section_ext_1 return error [%d]\n", ext_sec_total);
+ }
+ } else {
+ rte_panic("xran_malloc return NULL\n");
+ }
+ }
+ }
+ }
+ } else {
+ printf("DL pRbMap ==NULL\n");
+ exit(-1);
+ }
+
+ tx_play_buffer_position[flowId] += pXranConf->nDLRBs*N_SC_PER_PRB*4;
+
+ if(tx_play_buffer_position[flowId] >= tx_play_buffer_size[flowId])
+ tx_play_buffer_position[flowId] = 0;
+
+ if(pXranConf->ru_conf.xranCat == XRAN_CATEGORY_B
+ && startupConfiguration.appMode == APP_O_DU
+ && sym_id == 0) {
+ tx_dl_bfw_buffer_position[flowId] += (pXranConf->nDLRBs*pXranConf->nAntElmTRx)*4;
+ if(tx_dl_bfw_buffer_position[flowId] >= tx_dl_bfw_buffer_size[flowId])
+ tx_dl_bfw_buffer_position[flowId] = 0;
+
+ tx_ul_bfw_buffer_position[flowId] += (pXranConf->nULRBs*pXranConf->nAntElmTRx)*4;
+ if(tx_ul_bfw_buffer_position[flowId] >= tx_ul_bfw_buffer_size[flowId])
+ tx_ul_bfw_buffer_position[flowId] = 0;
+ }
+ } else {
+ //printf("flowId %d\n", flowId);
+ }
+ }
+ }
+
+ /* prach TX for RU only */
+ if(startupConfiguration.appMode == APP_O_RU && startupConfiguration.enablePrach){
+ for(ant_id = 0; ant_id < XRAN_MAX_ANTENNA_NR; ant_id++){
+ for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) {
+ flowId = XRAN_MAX_ANTENNA_NR*cc_id + ant_id;
+
+ if(p_tx_prach_play_buffer[flowId]){
+ pos = ((char*)p_tx_prach_play_buffer[flowId]);
+
+ ptr = psBbuIo->sFHPrachRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;
+
+ if(ptr && pos){
+ u32dptr = (uint32_t*)(ptr);
+ /* duplicate full PRACH (repetition * occassions ) in every symbol */
+ memset(u32dptr,0 , PRACH_PLAYBACK_BUFFER_BYTES);
+ rte_memcpy(u32dptr, pos, RTE_MIN(PRACH_PLAYBACK_BUFFER_BYTES, tx_prach_play_buffer_size[flowId]));
+ } else {
+ exit(-1);
+ printf("ptr ==NULL\n");
+ }
+ } else {
+ //printf("flowId %d\n", flowId);
+ }
+ }
+ }
+ }
+
+ /* SRS TX for RU only */
+ if(startupConfiguration.appMode == APP_O_RU && startupConfiguration.enableSrs){
+ for(ant_id = 0; ant_id < XRAN_MAX_ANT_ARRAY_ELM_NR; ant_id++){
+ for(sym_id = 0; sym_id < XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT; sym_id++) {
+ flowId = XRAN_MAX_ANT_ARRAY_ELM_NR*cc_id + ant_id;
+
+ if(p_tx_srs_play_buffer[flowId]){
+ pos = ((char*)p_tx_srs_play_buffer[flowId]) + tx_srs_play_buffer_position[flowId];
+ ptr = psBbuIo->sFHSrsRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;
+
+ if(startupConfiguration.srsSymMask & (1 << sym_id) ){
+ if(ptr && pos){
+ u32dptr = (uint32_t*)(ptr);
+ memset(u32dptr,0 , pXranConf->nULRBs*N_SC_PER_PRB*4);
+ rte_memcpy(u32dptr, pos, pXranConf->nULRBs*N_SC_PER_PRB*4);
+ } else {
+ exit(-1);
+ printf("ptr ==NULL\n");
+ }
+ }
+
+ tx_srs_play_buffer_position[flowId] += pXranConf->nULRBs*N_SC_PER_PRB*4;
+
+ if(tx_srs_play_buffer_position[flowId] >= tx_srs_play_buffer_size[flowId])
+ tx_srs_play_buffer_position[flowId] = 0;
+ } else {
+ //printf("flowId %d\n", flowId);
+ }
+ }
+ }
+ }
+ }
+ }
+
+ return 0;
+}
+
+void stop_xran(void)
+{
+ xran_status_t status = 0;
+ SWXRANInterfaceTypeEnum eInterfaceType;
+
+ free(gpXranLibConfig);
+ gpXranLibConfig = NULL;
+
+ status += xran_mm_destroy(xranHandle)*2;
+
+ if(XRAN_STATUS_SUCCESS != status)
+ {
+ printf("Failed at xran_mm_destroy, status %d\n",status);
+ iAssert(status == XRAN_STATUS_SUCCESS);
+ }
+}
+
+int get_xran_iq_content(void)
+{
+ BbuXranIoIfStruct *psBbuIo = xran_get_ctx();
+ xran_status_t status;
+ int32_t nSectorIndex[XRAN_MAX_SECTOR_NR];
+ int32_t nSectorNum;
+ int32_t cc_id, ant_id, sym_id, tti;
+ int32_t flowId;
+
+ uint8_t frame_id = 0;
+ uint8_t subframe_id = 0;
+ uint8_t slot_id = 0;
+ uint8_t sym = 0;
+
+ void *ptr;
+ uint32_t *u32dptr;
+ uint16_t *u16dptr;
+ uint8_t *u8dptr;
+
+ char *pos = NULL;
+
+ for (nSectorNum = 0; nSectorNum < XRAN_MAX_SECTOR_NR; nSectorNum++)
+ {
+ nSectorIndex[nSectorNum] = nSectorNum;
+ }
+ nSectorNum = numCCPorts;
+ printf ("get_xran_iq_content\n");
+
+ /* Init Memory */
+ for(cc_id = 0; cc_id <nSectorNum; cc_id++)
+ {
+ for(tti = 0; tti < XRAN_N_FE_BUF_LEN; tti++) {
+ for(ant_id = 0; ant_id < XRAN_MAX_ANTENNA_NR; ant_id++){
+ int32_t idxElm = 0;
+ struct xran_prb_map *pRbMap = NULL;
+ struct xran_prb_elm *pRbElm = NULL;
+ struct xran_section_desc *p_sec_desc = NULL;
+ pRbMap = (struct xran_prb_map *) psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData;
+ if(pRbMap == NULL)
+ exit(-1);
+ flowId = XRAN_MAX_ANTENNA_NR * cc_id + ant_id;
+ for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) {
+ pRbElm = &pRbMap->prbMap[0];
+ if(pRbMap->nPrbElm == 1){
+ if(p_rx_log_buffer[flowId]) {
+ pos = ((char*)p_rx_log_buffer[flowId]) + rx_log_buffer_position[flowId];
+ ptr = psBbuIo->sFrontHaulRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;
+ if(ptr){
+ u32dptr = (uint32_t*)(ptr);
+ char* my_ptr =(char *)ptr;
+ rte_memcpy(pos + pRbElm->nRBStart*N_SC_PER_PRB*4L , u32dptr, pRbElm->nRBSize*N_SC_PER_PRB*4L);
+ }else {
+ printf("[%d][%d][%d][%d]ptr ==NULL\n",tti,cc_id,ant_id, sym_id);
+ }
+ }
+ } else {
+ for(idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++ ) {
+ pRbElm = &pRbMap->prbMap[idxElm];
+ p_sec_desc = pRbElm->p_sec_desc[sym_id];
+ if(p_rx_log_buffer[flowId] && p_sec_desc){
+ if(sym_id >= pRbElm->nStartSymb && sym_id < pRbElm->nStartSymb + pRbElm->numSymb){
+ pos = ((char*)p_rx_log_buffer[flowId]) + rx_log_buffer_position[flowId];
+ ptr = p_sec_desc->pData;
+ if(ptr){
+ int32_t payload_len = 0;
+ u32dptr = (uint32_t*)(ptr);
+ if (pRbElm->compMethod != XRAN_COMPMETHOD_NONE){
+ struct xranlib_decompress_request bfp_decom_req;
+ struct xranlib_decompress_response bfp_decom_rsp;
+
+ memset(&bfp_decom_req, 0, sizeof(struct xranlib_decompress_request));
+ memset(&bfp_decom_rsp, 0, sizeof(struct xranlib_decompress_response));
+
+ bfp_decom_req.data_in = (int8_t *)u32dptr;
+ bfp_decom_req.numRBs = pRbElm->nRBSize;
+ bfp_decom_req.len = (3* pRbElm->iqWidth + 1)*pRbElm->nRBSize;
+ bfp_decom_req.compMethod = pRbElm->compMethod;
+ bfp_decom_req.iqWidth = pRbElm->iqWidth;
+
+ bfp_decom_rsp.data_out = (int16_t *)(pos + pRbElm->nRBStart*N_SC_PER_PRB*4);
+ bfp_decom_rsp.len = 0;
+
+ if(xranlib_decompress_avx512(&bfp_decom_req, &bfp_decom_rsp) < 0){
+ printf ("compression failed [%d]\n",
+ pRbElm->compMethod);
+ exit(-1);
+ } else {
+ payload_len = bfp_decom_rsp.len;
+ }
+ } else {
+ rte_memcpy(pos + pRbElm->nRBStart*N_SC_PER_PRB*4 , u32dptr, pRbElm->nRBSize*N_SC_PER_PRB*4);
+ }
+ }
+ }
+ }
+ }
+ }
+ rx_log_buffer_position[flowId] += pXranConf->nULRBs*N_SC_PER_PRB*4;
+
+ if(rx_log_buffer_position[flowId] >= rx_log_buffer_size[flowId])
+ rx_log_buffer_position[flowId] = 0;
+ }
+
+ /* prach RX for O-DU only */
+ if(startupConfiguration.appMode == APP_O_DU) {
+ flowId = XRAN_MAX_ANTENNA_NR * cc_id + ant_id;
+ for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++){
+ if(p_prach_log_buffer[flowId]){
+ /* (0-79 slots) 10ms of IQs */
+ pos = ((char*)p_prach_log_buffer[flowId]) + prach_log_buffer_position[flowId];
+ ptr = psBbuIo->sFHPrachRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData; //8192 144
+ if(ptr){
+ u32dptr = (uint32_t*)(ptr);
+ rte_memcpy(pos, u32dptr, PRACH_PLAYBACK_BUFFER_BYTES);
+ }else
+ printf("ptr ==NULL\n");
+
+ prach_log_buffer_position[flowId] += PRACH_PLAYBACK_BUFFER_BYTES;
+
+ if(prach_log_buffer_position[flowId] >= prach_log_buffer_size[flowId])
+ prach_log_buffer_position[flowId] = 0;
+ } else {
+ //printf("flowId %d\n", flowId);
+ }
+ }
+ }
+ }
+
+ /* SRS RX for O-DU only */
+ if(startupConfiguration.appMode == APP_O_DU) {
+ for(ant_id = 0; ant_id < XRAN_MAX_ANT_ARRAY_ELM_NR; ant_id++){
+ flowId = XRAN_MAX_ANT_ARRAY_ELM_NR*cc_id + ant_id;
+ for(sym_id = 0; sym_id < XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT; sym_id++){
+ if(p_srs_log_buffer[flowId]){
+ pos = ((char*)p_srs_log_buffer[flowId]) + srs_log_buffer_position[flowId];
+ ptr = psBbuIo->sFHSrsRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;
+ if(ptr){
+ u32dptr = (uint32_t*)(ptr);
+ rte_memcpy(pos, u32dptr, pXranConf->nULRBs*N_SC_PER_PRB*4);
+ }else
+ printf("ptr ==NULL\n");
+
+ srs_log_buffer_position[flowId] += pXranConf->nULRBs*N_SC_PER_PRB*4;
+
+ if(srs_log_buffer_position[flowId] >= srs_log_buffer_size[flowId])
+ srs_log_buffer_position[flowId] = 0;
+ } else {
+ //printf("flowId %d\n", flowId);
+ }
+ }
+ }
+ }
+ }
+ }
+
+ return 0;
+}
+
+void version_print(void)
+{
+ char sysversion[100];
+ char *compilation_date = __DATE__;
+ char *compilation_time = __TIME__;
+
+ uint32_t nLen;
+ uint32_t i;
+
+ snprintf(sysversion, 99, "Version: %s", VERSIONX);
+ nLen = strlen(sysversion);
+
+ printf("\n\n");
+ printf("===========================================================================================================\n");
+ printf("SAMPLE-APP VERSION\n");
+ printf("===========================================================================================================\n");
+
+ printf("%s\n", sysversion);
+ printf("build-date: %s\n", compilation_date);
+ printf("build-time: %s\n", compilation_time);
+}
+
+int main(int argc, char *argv[])
+{
+ int i;
+ int j, len;
+ int lcore_id = 0;
+ char filename[256];
+ char prefix_name[256];
+ uint32_t nCenterFreq;
+ int32_t xret = 0;
+ struct stat st = {0};
+ uint32_t filenameLength = strlen(argv[1]);
+ char *pCheckName1 = NULL, *pCheckName2 = NULL;
+ enum xran_if_state xran_curr_if_state = XRAN_INIT;
+
+ uint64_t nMask = (uint64_t)1;
+ uint16_t nCoreUsage[4*64+1];
+ uint16_t nCoreId[4*64];
+ float nTotal = 0.0;
+ uint64_t nTotalTime;
+ uint64_t nUsedTime;
+ uint32_t nCoreUsed;
+ float nUsedPercent;
+
+
+ if (argc == 3)
+ errx(2, "Need two argument - the PCI address of the network port");
+ if (filenameLength >= 256)
+ {
+ printf("Config file name input is too long, exiting!\n");
+ exit(-1);
+ }
+
+ version_print();
+
+ //add for Klocworks
+ len = strlen(argv[1]) + 1;
+ if (len > (sizeof(filename) - 10))
+ len = (sizeof(filename) - 10);
+ strncpy(filename, argv[1], (sizeof(filename) - 10));
+ filename[len] = '\0';
+
+ if (xran_is_synchronized() != 0)
+ printf("Machine is not synchronized using PTP!\n");
+ else
+ printf("Machine is synchronized using PTP!\n");
+
+ memset(&startupConfiguration, 0, sizeof(RuntimeConfig));
+
+ if (parseConfigFile(filename, (RuntimeConfig*)&startupConfiguration) != 0) {
+ printf("Configuration file error.\n");
+ return -1;
+ }
+
+ if(startupConfiguration.ant_file[0] == NULL){
+ printf("it looks like test vector for antennas were not provided\n");
+ exit(-1);
+ }
+
+ if (startupConfiguration.numCC > XRAN_MAX_SECTOR_NR) {
+ printf("Number of cells %d exceeds max number supported %d!\n", startupConfiguration.numCC, XRAN_MAX_SECTOR_NR);
+ startupConfiguration.numCC = XRAN_MAX_SECTOR_NR;
+
+ }
+ if (startupConfiguration.antElmTRx > XRAN_MAX_ANT_ARRAY_ELM_NR) {
+ printf("Number of Antenna elements %d exceeds max number supported %d!\n", startupConfiguration.antElmTRx, XRAN_MAX_ANT_ARRAY_ELM_NR);
+ startupConfiguration.antElmTRx = XRAN_MAX_ANT_ARRAY_ELM_NR;
+ }
+
+ numCCPorts = startupConfiguration.numCC;
+ num_eAxc = startupConfiguration.numAxc;
+
+ printf("numCCPorts %d num_eAxc%d\n", numCCPorts, num_eAxc);
+
+ if (startupConfiguration.mu_number <= 1){
+ nFpgaToSW_FTH_RxBufferLen = 13168; /* 273*12*4 + 64*/
+ nFpgaToSW_PRACH_RxBufferLen = 8192;
+ nSW_ToFpga_FTH_TxBufferLen = 13168 + /* 273*12*4 + 64* + ETH AND ORAN HDRs */
+ XRAN_MAX_SECTIONS_PER_SYM* (RTE_PKTMBUF_HEADROOM + sizeof(struct ether_hdr) +
+ sizeof(struct xran_ecpri_hdr) +
+ sizeof(struct radio_app_common_hdr) +
+ sizeof(struct data_section_hdr));
+ } else if (startupConfiguration.mu_number == 3){
+ nFpgaToSW_FTH_RxBufferLen = 3328;
+ nFpgaToSW_PRACH_RxBufferLen = 8192;
+ nSW_ToFpga_FTH_TxBufferLen = 3328 +
+ XRAN_MAX_SECTIONS_PER_SYM * (RTE_PKTMBUF_HEADROOM + sizeof(struct ether_hdr) +
+ sizeof(struct xran_ecpri_hdr) +
+ sizeof(struct radio_app_common_hdr) +
+ sizeof(struct data_section_hdr));
+ } else {
+ printf("given numerology is not supported %d\n", startupConfiguration.mu_number);
+ exit(-1);
+ }
+ printf("nSW_ToFpga_FTH_TxBufferLen %d\n", nSW_ToFpga_FTH_TxBufferLen);
+
+ memset(&xranInit, 0, sizeof(struct xran_fh_init));
+
+ if(startupConfiguration.appMode == APP_O_DU) {
+ printf("set O-DU\n");
+ xranInit.io_cfg.id = 0;/* O-DU */
+ xranInit.io_cfg.core = startupConfiguration.io_core;
+ xranInit.io_cfg.system_core = startupConfiguration.system_core;
+ xranInit.io_cfg.pkt_proc_core = startupConfiguration.pkt_proc_core;
+ xranInit.io_cfg.pkt_aux_core = startupConfiguration.pkt_aux_core; /* do not start*/
+ xranInit.io_cfg.timing_core = startupConfiguration.timing_core;
+ } else {
+ printf("set O-RU\n");
+ xranInit.io_cfg.id = 1; /* O-RU*/
+ xranInit.io_cfg.core = startupConfiguration.io_core;
+ xranInit.io_cfg.system_core = startupConfiguration.system_core;
+ xranInit.io_cfg.pkt_proc_core = startupConfiguration.pkt_proc_core;
+ xranInit.io_cfg.pkt_aux_core = startupConfiguration.pkt_aux_core; /* do not start*/
+ xranInit.io_cfg.timing_core = startupConfiguration.timing_core;
+ }
+
+ cpu_set_t cpuset;
+ pthread_t thread;
+
+ thread = pthread_self();
+ CPU_ZERO(&cpuset);
+ CPU_SET(xranInit.io_cfg.system_core,&cpuset);
+ pthread_setaffinity_np(thread, sizeof(cpu_set_t), &cpuset);
+/* if (s != 0)
+ handle_error_en(s, "pthread_setaffinity_np");
+*/
+
+ xranInit.io_cfg.bbdev_mode = XRAN_BBDEV_NOT_USED;
+
+ if(startupConfiguration.xranCat == XRAN_CATEGORY_A){
+ xranInit.eAxCId_conf.mask_cuPortId = 0xf000;
+ xranInit.eAxCId_conf.mask_bandSectorId = 0x0f00;
+ xranInit.eAxCId_conf.mask_ccId = 0x00f0;
+ xranInit.eAxCId_conf.mask_ruPortId = 0x000f;
+ xranInit.eAxCId_conf.bit_cuPortId = 12;
+ xranInit.eAxCId_conf.bit_bandSectorId = 8;
+ xranInit.eAxCId_conf.bit_ccId = 4;
+ xranInit.eAxCId_conf.bit_ruPortId = 0;
+ } else {
+ xranInit.eAxCId_conf.mask_cuPortId = 0xf000;
+ xranInit.eAxCId_conf.mask_bandSectorId = 0x0c00;
+ xranInit.eAxCId_conf.mask_ccId = 0x0300;
+ xranInit.eAxCId_conf.mask_ruPortId = 0x00ff; /* more than [0-127] eAxC */
+ xranInit.eAxCId_conf.bit_cuPortId = 12;
+ xranInit.eAxCId_conf.bit_bandSectorId = 10;
+ xranInit.eAxCId_conf.bit_ccId = 8;
+ xranInit.eAxCId_conf.bit_ruPortId = 0;
+ }
+
+ xranInit.io_cfg.dpdk_dev[XRAN_UP_VF] = argv[2];
+ xranInit.io_cfg.dpdk_dev[XRAN_CP_VF] = argv[3];
+ xranInit.mtu = startupConfiguration.mtu;
+
+ xranInit.p_o_du_addr = (int8_t *)&startupConfiguration.o_du_addr;
+ xranInit.p_o_ru_addr = (int8_t *)&startupConfiguration.o_ru_addr;
+
+ snprintf(prefix_name, sizeof(prefix_name), "wls_%d",startupConfiguration.instance_id);
+ xranInit.filePrefix = prefix_name;
+
+ xranInit.totalBfWeights = startupConfiguration.totalBfWeights;
+
+ xranInit.Tadv_cp_dl = startupConfiguration.Tadv_cp_dl;
+ xranInit.T2a_min_cp_dl = startupConfiguration.T2a_min_cp_dl;
+ xranInit.T2a_max_cp_dl = startupConfiguration.T2a_max_cp_dl;
+ xranInit.T2a_min_cp_ul = startupConfiguration.T2a_min_cp_ul;
+ xranInit.T2a_max_cp_ul = startupConfiguration.T2a_max_cp_ul;
+ xranInit.T2a_min_up = startupConfiguration.T2a_min_up;
+ xranInit.T2a_max_up = startupConfiguration.T2a_max_up;
+ xranInit.Ta3_min = startupConfiguration.Ta3_min;
+ xranInit.Ta3_max = startupConfiguration.Ta3_max;
+ xranInit.T1a_min_cp_dl = startupConfiguration.T1a_min_cp_dl;
+ xranInit.T1a_max_cp_dl = startupConfiguration.T1a_max_cp_dl;
+ xranInit.T1a_min_cp_ul = startupConfiguration.T1a_min_cp_ul;
+ xranInit.T1a_max_cp_ul = startupConfiguration.T1a_max_cp_ul;
+ xranInit.T1a_min_up = startupConfiguration.T1a_min_up;
+ xranInit.T1a_max_up = startupConfiguration.T1a_max_up;
+ xranInit.Ta4_min = startupConfiguration.Ta4_min;
+ xranInit.Ta4_max = startupConfiguration.Ta4_max;
+
+ xranInit.enableCP = startupConfiguration.enableCP;
+ xranInit.prachEnable = startupConfiguration.enablePrach;
+ xranInit.srsEnable = startupConfiguration.enableSrs;
+ xranInit.debugStop = startupConfiguration.debugStop;
+ xranInit.debugStopCount = startupConfiguration.debugStopCount;
+ xranInit.DynamicSectionEna = startupConfiguration.DynamicSectionEna;
+ xranInit.io_cfg.bbdev_mode = XRAN_BBDEV_NOT_USED;
+ xranInit.GPS_Alpha = startupConfiguration.GPS_Alpha;
+ xranInit.GPS_Beta = startupConfiguration.GPS_Beta;
+
+ xranInit.cp_vlan_tag = startupConfiguration.cp_vlan_tag;
+ xranInit.up_vlan_tag = startupConfiguration.up_vlan_tag;
+
+ printf("IQ files size is %d slots\n", startupConfiguration.numSlots);
+
+ iq_playback_buffer_size_dl = (startupConfiguration.numSlots * N_SYM_PER_SLOT * N_SC_PER_PRB *
+ app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nDLBandwidth, startupConfiguration.nDLAbsFrePointA)
+ *4L);
+
+ iq_playback_buffer_size_ul = (startupConfiguration.numSlots * N_SYM_PER_SLOT * N_SC_PER_PRB *
+ app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nULBandwidth, startupConfiguration.nULAbsFrePointA)
+ *4L);
+
+
+ /* 10 * [14*32*273*2*2] = 4892160 bytes */
+ iq_bfw_buffer_size_dl = (startupConfiguration.numSlots * N_SYM_PER_SLOT * startupConfiguration.antElmTRx *
+ app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nDLBandwidth, startupConfiguration.nDLAbsFrePointA)
+ *4L);
+
+ /* 10 * [14*32*273*2*2] = 4892160 bytes */
+ iq_bfw_buffer_size_ul = (startupConfiguration.numSlots * N_SYM_PER_SLOT *
+ app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nULBandwidth, startupConfiguration.nULAbsFrePointA)
+ *4L);
+
+ /* 10 * [1*273*2*2] = 349440 bytes */
+ iq_srs_buffer_size_ul = (startupConfiguration.numSlots * N_SYM_PER_SLOT * N_SC_PER_PRB *
+ app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nULBandwidth, startupConfiguration.nULAbsFrePointA)
+ *4L);
+
+ for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
+ p_tx_play_buffer[i] = (int16_t*)malloc(iq_playback_buffer_size_dl);
+ tx_play_buffer_size[i] = (int32_t)iq_playback_buffer_size_dl;
+
+ if (p_tx_play_buffer[i] == NULL)
+ exit(-1);
+
+ tx_play_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.ant_file[i],
+ "DL IFFT IN IQ Samples in binary format",
+ (uint8_t*) p_tx_play_buffer[i],
+ tx_play_buffer_size[i],
+ 1);
+ tx_play_buffer_position[i] = 0;
+ }
+
+ if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){
+ for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
+
+ p_tx_dl_bfw_buffer[i] = (int16_t*)malloc(iq_bfw_buffer_size_dl);
+ tx_dl_bfw_buffer_size[i] = (int32_t)iq_bfw_buffer_size_dl;
+
+ if (p_tx_dl_bfw_buffer[i] == NULL)
+ exit(-1);
+
+ tx_dl_bfw_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.dl_bfw_file[i],
+ "DL BF weights IQ Samples in binary format",
+ (uint8_t*) p_tx_dl_bfw_buffer[i],
+ tx_dl_bfw_buffer_size[i],
+ 1);
+ tx_dl_bfw_buffer_position[i] = 0;
+ }
+ }
+
+ if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){
+
+ for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
+ p_tx_ul_bfw_buffer[i] = (int16_t*)malloc(iq_bfw_buffer_size_ul);
+ tx_ul_bfw_buffer_size[i] = (int32_t)iq_bfw_buffer_size_ul;
+
+ if (p_tx_ul_bfw_buffer[i] == NULL)
+ exit(-1);
+
+ tx_ul_bfw_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.ul_bfw_file[i],
+ "UL BF weights IQ Samples in binary format",
+ (uint8_t*) p_tx_ul_bfw_buffer[i],
+ tx_ul_bfw_buffer_size[i],
+ 1);
+ tx_ul_bfw_buffer_position[i] = 0;
+ }
+ }
+
+ if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enablePrach){
+ for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
+ p_tx_prach_play_buffer[i] = (int16_t*)malloc(PRACH_PLAYBACK_BUFFER_BYTES);
+ tx_prach_play_buffer_size[i] = (int32_t)PRACH_PLAYBACK_BUFFER_BYTES;
+
+ if (p_tx_prach_play_buffer[i] == NULL)
+ exit(-1);
+
+ memset(p_tx_prach_play_buffer[i], 0, PRACH_PLAYBACK_BUFFER_BYTES);
+
+ tx_prach_play_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.prach_file[i],
+ "PRACH IQ Samples in binary format",
+ (uint8_t*) p_tx_prach_play_buffer[i],
+ tx_prach_play_buffer_size[i],
+ 1);
+ tx_prach_play_buffer_position[i] = 0;
+ }
+ }
+
+ if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enableSrs){
+ for(i = 0;
+ i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);
+ i++) {
+
+ p_tx_srs_play_buffer[i] = (int16_t*)malloc(iq_srs_buffer_size_ul);
+ tx_srs_play_buffer_size[i] = (int32_t)iq_srs_buffer_size_ul;
+
+ if (p_tx_srs_play_buffer[i] == NULL)
+ exit(-1);
+
+ memset(p_tx_srs_play_buffer[i], 0, iq_srs_buffer_size_ul);
+ tx_prach_play_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.ul_srs_file[i],
+ "SRS IQ Samples in binary format",
+ (uint8_t*) p_tx_srs_play_buffer[i],
+ tx_srs_play_buffer_size[i],
+ 1);
+
+ tx_srs_play_buffer_position[i] = 0;
+ }
+ }
+
+ /* log of ul */
+ for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
+
+ p_rx_log_buffer[i] = (int16_t*)malloc(iq_playback_buffer_size_ul);
+ rx_log_buffer_size[i] = (int32_t)iq_playback_buffer_size_ul;
+
+ if (p_rx_log_buffer[i] == NULL)
+ exit(-1);
+
+ rx_log_buffer_position[i] = 0;
+
+ memset(p_rx_log_buffer[i], 0, rx_log_buffer_size[i]);
+ }
+
+ /* log of prach */
+ for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
+
+ p_prach_log_buffer[i] = (int16_t*)malloc(startupConfiguration.numSlots*XRAN_NUM_OF_SYMBOL_PER_SLOT*PRACH_PLAYBACK_BUFFER_BYTES);
+ prach_log_buffer_size[i] = (int32_t)startupConfiguration.numSlots*XRAN_NUM_OF_SYMBOL_PER_SLOT*PRACH_PLAYBACK_BUFFER_BYTES;
+
+ if (p_prach_log_buffer[i] == NULL)
+ exit(-1);
+
+ memset(p_prach_log_buffer[i], 0, prach_log_buffer_size[i]);
+ prach_log_buffer_position[i] = 0;
+ }
+
+ /* log of SRS */
+ if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.enableSrs){
+ for(i = 0;
+ i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);
+ i++) {
+
+ p_srs_log_buffer[i] = (int16_t*)malloc(iq_srs_buffer_size_ul);
+ srs_log_buffer_size[i] = (int32_t)iq_srs_buffer_size_ul;
+
+ if (p_srs_log_buffer[i] == NULL)
+ exit(-1);
+
+ memset(p_srs_log_buffer[i], 0, iq_srs_buffer_size_ul);
+ srs_log_buffer_position[i] = 0;
+ }
+ }
+
+ if (stat("./logs", &st) == -1) {
+ mkdir("./logs", 0777);
+ }
+
+ for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
+
+ snprintf(filename, sizeof(filename), "./logs/%s-play_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
+ sys_save_buf_to_file_txt(filename,
+ "DL IFFT IN IQ Samples in human readable format",
+ (uint8_t*) p_tx_play_buffer[i],
+ tx_play_buffer_size[i],
+ 1);
+
+ snprintf(filename, sizeof(filename),"./logs/%s-play_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
+ sys_save_buf_to_file(filename,
+ "DL IFFT IN IQ Samples in binary format",
+ (uint8_t*) p_tx_play_buffer[i],
+ tx_play_buffer_size[i]/sizeof(short),
+ sizeof(short));
+
+
+ if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){
+ snprintf(filename, sizeof(filename),"./logs/%s-dl_bfw_ue%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
+ sys_save_buf_to_file_txt(filename,
+ "DL Beamformig weights IQ Samples in human readable format",
+ (uint8_t*) p_tx_dl_bfw_buffer[i],
+ tx_dl_bfw_buffer_size[i],
+ 1);
+
+ snprintf(filename, sizeof(filename),"./logs/%s-dl_bfw_ue%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
+ sys_save_buf_to_file(filename,
+ "DL Beamformig weightsIQ Samples in binary format",
+ (uint8_t*) p_tx_dl_bfw_buffer[i],
+ tx_dl_bfw_buffer_size[i]/sizeof(short),
+ sizeof(short));
+
+
+ snprintf(filename, sizeof(filename), "./logs/%s-ul_bfw_ue%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
+ sys_save_buf_to_file_txt(filename,
+ "UL Beamformig weights IQ Samples in human readable format",
+ (uint8_t*) p_tx_ul_bfw_buffer[i],
+ tx_ul_bfw_buffer_size[i],
+ 1);
+
+ snprintf(filename, sizeof(filename),"./logs/%s-ul_bfw_ue%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
+ sys_save_buf_to_file(filename,
+ "UL Beamformig weightsIQ Samples in binary format",
+ (uint8_t*) p_tx_ul_bfw_buffer[i],
+ tx_ul_bfw_buffer_size[i]/sizeof(short),
+ sizeof(short));
+
+ }
+
+ if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enablePrach){
+ snprintf(filename, sizeof(filename), "./logs/%s-play_prach_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
+ sys_save_buf_to_file_txt(filename,
+ "PRACH IQ Samples in human readable format",
+ (uint8_t*) p_tx_prach_play_buffer[i],
+ tx_prach_play_buffer_size[i],
+ 1);
+
+ snprintf(filename, sizeof(filename), "./logs/%s-play_prach_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
+ sys_save_buf_to_file(filename,
+ "PRACH IQ Samples in binary format",
+ (uint8_t*) p_tx_prach_play_buffer[i],
+ tx_prach_play_buffer_size[i]/sizeof(short),
+ sizeof(short));
+ }
+ }
+
+ if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enableSrs && startupConfiguration.xranCat == XRAN_CATEGORY_B){
+ for(i = 0;
+ i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);
+ i++) {
+
+
+ snprintf(filename, sizeof(filename), "./logs/%s-play_srs_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
+ sys_save_buf_to_file_txt(filename,
+ "SRS IQ Samples in human readable format",
+ (uint8_t*) p_tx_srs_play_buffer[i],
+ tx_srs_play_buffer_size[i],
+ 1);
+
+ snprintf(filename,sizeof(filename), "./logs/%s-play_srs_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
+ sys_save_buf_to_file(filename,
+ "SRS IQ Samples in binary format",
+ (uint8_t*) p_tx_srs_play_buffer[i],
+ tx_srs_play_buffer_size[i]/sizeof(short),
+ sizeof(short));
+ }
+ }
+
+ if (startupConfiguration.iqswap == 1){
+ for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
+ printf("TX: Swap I and Q to match RU format: [%d]\n",i);
+ {
+ /* swap I and Q */
+ int32_t j;
+ signed short *ptr = (signed short *) p_tx_play_buffer[i];
+ signed short temp;
+
+ for (j = 0; j < (int32_t)(tx_play_buffer_size[i]/sizeof(short)) ; j = j + 2){
+ temp = ptr[j];
+ ptr[j] = ptr[j + 1];
+ ptr[j + 1] = temp;
+ }
+ }
+ if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){
+ printf("DL BFW: Swap I and Q to match RU format: [%d]\n",i);
+ {
+ /* swap I and Q */
+ int32_t j;
+ signed short *ptr = (signed short *) p_tx_dl_bfw_buffer[i];
+ signed short temp;
+
+ for (j = 0; j < (int32_t)(tx_dl_bfw_buffer_size[i]/sizeof(short)) ; j = j + 2){
+ temp = ptr[j];
+ ptr[j] = ptr[j + 1];
+ ptr[j + 1] = temp;
+ }
+ }
+ printf("UL BFW: Swap I and Q to match RU format: [%d]\n",i);
+ {
+ /* swap I and Q */
+ int32_t j;
+ signed short *ptr = (signed short *) p_tx_ul_bfw_buffer[i];
+ signed short temp;
+
+ for (j = 0; j < (int32_t)(tx_ul_bfw_buffer_size[i]/sizeof(short)) ; j = j + 2){
+ temp = ptr[j];
+ ptr[j] = ptr[j + 1];
+ ptr[j + 1] = temp;
+ }
+ }
+ }
+ }
+
+ if (startupConfiguration.appMode == APP_O_RU){
+ for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
+ printf("PRACH: Swap I and Q to match RU format: [%d]\n",i);
+ {
+ /* swap I and Q */
+ int32_t j;
+ signed short *ptr = (signed short *) p_tx_prach_play_buffer[i];
+ signed short temp;
+
+ for (j = 0; j < (int32_t)(tx_prach_play_buffer_size[i]/sizeof(short)) ; j = j + 2){
+ temp = ptr[j];
+ ptr[j] = ptr[j + 1];
+ ptr[j + 1] = temp;
+ }
+ }
+ }
+ }
+
+ if (startupConfiguration.appMode == APP_O_RU){
+ for(i = 0;
+ i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);
+ i++) {
+ printf("SRS: Swap I and Q to match RU format: [%d]\n",i);
+ {
+ /* swap I and Q */
+ int32_t j;
+ signed short *ptr = (signed short *) p_tx_srs_play_buffer[i];
+ signed short temp;
+
+ for (j = 0; j < (int32_t)(tx_srs_play_buffer_size[i]/sizeof(short)) ; j = j + 2){
+ temp = ptr[j];
+ ptr[j] = ptr[j + 1];
+ ptr[j + 1] = temp;
+ }
+ }
+ }
+ }
+ }
+
+#if 0
+ for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
+
+ sprintf(filename, "./logs/swap_IQ_play_ant%d.txt", i);
+ sys_save_buf_to_file_txt(filename,
+ "DL IFFT IN IQ Samples in human readable format",
+ (uint8_t*) p_tx_play_buffer[i],
+ tx_play_buffer_size[i],
+ 1);
+ }
+#endif
+ if (startupConfiguration.nebyteorderswap == 1 && startupConfiguration.compression == 0){
+ for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
+ printf("TX: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);
+ for (j = 0; j < tx_play_buffer_size[i]/sizeof(short); j++){
+ p_tx_play_buffer[i][j] = rte_cpu_to_be_16(p_tx_play_buffer[i][j]);
+ }
+
+ if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){
+ printf("DL BFW: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);
+ for (j = 0; j < tx_dl_bfw_buffer_size[i]/sizeof(short); j++){
+ p_tx_dl_bfw_buffer[i][j] = rte_cpu_to_be_16(p_tx_dl_bfw_buffer[i][j]);
+ }
+ printf("UL BFW: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);
+ for (j = 0; j < tx_ul_bfw_buffer_size[i]/sizeof(short); j++){
+ p_tx_ul_bfw_buffer[i][j] = rte_cpu_to_be_16(p_tx_ul_bfw_buffer[i][j]);
+ }
+ }
+ }
+
+ if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enablePrach){
+ for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
+ printf("PRACH: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);
+ for (j = 0; j < tx_prach_play_buffer_size[i]/sizeof(short); j++){
+ p_tx_prach_play_buffer[i][j] = rte_cpu_to_be_16(p_tx_prach_play_buffer[i][j]);
+ }
+ }
+ }
+
+ if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enableSrs){
+ for(i = 0;
+ i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);
+ i++) {
+ printf("SRS: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);
+ for (j = 0; j < tx_srs_play_buffer_size[i]/sizeof(short); j++){
+ p_tx_srs_play_buffer[i][j] = rte_cpu_to_be_16(p_tx_srs_play_buffer[i][j]);
+ }
+ }
+ }
+
+ }
+
+#if 0
+ for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
+
+ sprintf(filename, "./logs/swap_be_play_ant%d.txt", i);
+ sys_save_buf_to_file_txt(filename,
+ "DL IFFT IN IQ Samples in human readable format",
+ (uint8_t*) p_tx_play_buffer[i],
+ tx_play_buffer_size[i],
+ 1);
+ }
+#endif
+
+ memset(&xranConf, 0, sizeof(struct xran_fh_config));
+ pXranConf = &xranConf;
+
+ pXranConf->nDLRBs = app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nDLBandwidth, startupConfiguration.nDLAbsFrePointA);
+ pXranConf->nULRBs = app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nULBandwidth, startupConfiguration.nULAbsFrePointA);
+
+ if(startupConfiguration.DynamicSectionEna == 0){
+ struct xran_prb_map* pRbMap;
+
+ pRbMap = &startupConfiguration.PrbMapDl;
+
+ pRbMap->dir = XRAN_DIR_DL;
+ pRbMap->xran_port = 0;
+ pRbMap->band_id = 0;
+ pRbMap->cc_id = 0;
+ pRbMap->ru_port_id = 0;
+ pRbMap->tti_id = 0;
+ pRbMap->start_sym_id = 0;
+ pRbMap->nPrbElm = 1;
+ pRbMap->prbMap[0].nStartSymb = 0;
+ pRbMap->prbMap[0].numSymb = 14;
+ pRbMap->prbMap[0].nRBStart = 0;
+ pRbMap->prbMap[0].nRBSize = pXranConf->nDLRBs;
+ pRbMap->prbMap[0].nBeamIndex = 0;
+ pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE;
+ pRbMap->prbMap[0].iqWidth = 16;
+
+ pRbMap = &startupConfiguration.PrbMapUl;
+ pRbMap->dir = XRAN_DIR_UL;
+ pRbMap->xran_port = 0;
+ pRbMap->band_id = 0;
+ pRbMap->cc_id = 0;
+ pRbMap->ru_port_id = 0;
+ pRbMap->tti_id = 0;
+ pRbMap->start_sym_id = 0;
+ pRbMap->nPrbElm = 1;
+ pRbMap->prbMap[0].nStartSymb = 0;
+ pRbMap->prbMap[0].numSymb = 14;
+ pRbMap->prbMap[0].nRBStart = 0;
+ pRbMap->prbMap[0].nRBSize = pXranConf->nULRBs;
+ pRbMap->prbMap[0].nBeamIndex = 0;
+ pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE;
+ pRbMap->prbMap[0].iqWidth = 16;
+ }
+
+ timer_set_tsc_freq_from_clock();
+ xret = xran_init(argc, argv, &xranInit, argv[0], &xranHandle);
+ if(xret != XRAN_STATUS_SUCCESS){
+ printf("xran_init failed %d\n", xret);
+ exit(-1);
+ }
+
+ if(xranHandle == NULL)
+ exit(1);
+
+
+ pXranConf->sector_id = 0;
+ pXranConf->nCC = numCCPorts;
+ pXranConf->neAxc = num_eAxc;
+ pXranConf->neAxcUl = startupConfiguration.numUlAxc;
+ pXranConf->nAntElmTRx = startupConfiguration.antElmTRx;
+
+ pXranConf->frame_conf.nFrameDuplexType = startupConfiguration.nFrameDuplexType;
+ pXranConf->frame_conf.nNumerology = startupConfiguration.mu_number;
+ pXranConf->frame_conf.nTddPeriod = startupConfiguration.nTddPeriod;
+
+ for (i = 0; i < startupConfiguration.nTddPeriod; i++){
+ pXranConf->frame_conf.sSlotConfig[i] = startupConfiguration.sSlotConfig[i];
+ }
+
+ pXranConf->prach_conf.nPrachSubcSpacing = startupConfiguration.mu_number;
+ pXranConf->prach_conf.nPrachFreqStart = 0;
+ pXranConf->prach_conf.nPrachFilterIdx = XRAN_FILTERINDEX_PRACH_ABC;
+ pXranConf->prach_conf.nPrachConfIdx = startupConfiguration.prachConfigIndex;
+ pXranConf->prach_conf.nPrachFreqOffset = -792;
+
+ pXranConf->srs_conf.symbMask = startupConfiguration.srsSymMask;
+ pXranConf->srs_conf.eAxC_offset = 2 * startupConfiguration.numAxc; /* PUSCH, PRACH, SRS */
+
+ pXranConf->ru_conf.xranCat = startupConfiguration.xranCat;
+ pXranConf->ru_conf.iqWidth = startupConfiguration.PrbMapDl.prbMap[0].iqWidth;
+
+ if (startupConfiguration.compression == 0)
+ pXranConf->ru_conf.compMeth = XRAN_COMPMETHOD_NONE;
+ else
+ pXranConf->ru_conf.compMeth = XRAN_COMPMETHOD_BLKFLOAT;
+
+ pXranConf->ru_conf.fftSize = 0;
+ while (startupConfiguration.nULFftSize >>= 1)
+ ++pXranConf->ru_conf.fftSize;
+
+ pXranConf->ru_conf.byteOrder = (startupConfiguration.nebyteorderswap == 1) ? XRAN_NE_BE_BYTE_ORDER : XRAN_CPU_LE_BYTE_ORDER ;
+ pXranConf->ru_conf.iqOrder = (startupConfiguration.iqswap == 1) ? XRAN_Q_I_ORDER : XRAN_I_Q_ORDER;
+
+ printf("FFT Order %d\n", pXranConf->ru_conf.fftSize);
+
+ nCenterFreq = startupConfiguration.nDLAbsFrePointA + (((pXranConf->nDLRBs * N_SC_PER_PRB) / 2) * app_xran_get_scs(startupConfiguration.mu_number));
+ pXranConf->nDLCenterFreqARFCN = app_xran_cal_nrarfcn(nCenterFreq);
+ printf("DL center freq %d DL NR-ARFCN %d\n", nCenterFreq, pXranConf->nDLCenterFreqARFCN);
+
+ nCenterFreq = startupConfiguration.nULAbsFrePointA + (((pXranConf->nULRBs * N_SC_PER_PRB) / 2) * app_xran_get_scs(startupConfiguration.mu_number));
+ pXranConf->nULCenterFreqARFCN = app_xran_cal_nrarfcn(nCenterFreq);
+ printf("UL center freq %d UL NR-ARFCN %d\n", nCenterFreq, pXranConf->nULCenterFreqARFCN);
+
+ pXranConf->bbdev_dec = NULL;
+ pXranConf->bbdev_enc = NULL;
+
+ pXranConf->log_level = 1;
+
+ if(startupConfiguration.maxFrameId)
+ pXranConf->ru_conf.xran_max_frame = startupConfiguration.maxFrameId;
+
+ if(init_xran() != 0)
+ exit(-1);
+
+ xran_reg_physide_cb(xranHandle, physide_dl_tti_call_back, NULL, 10, XRAN_CB_TTI);
+ xran_reg_physide_cb(xranHandle, physide_ul_half_slot_call_back, NULL, 10, XRAN_CB_HALF_SLOT_RX);
+ xran_reg_physide_cb(xranHandle, physide_ul_full_slot_call_back, NULL, 10, XRAN_CB_FULL_SLOT_RX);
+
+ init_xran_iq_content();
+
+ xret = xran_open(xranHandle, pXranConf);
+
+ if(xret != XRAN_STATUS_SUCCESS){
+ printf("xran_open failed %d\n", xret);
+ exit(-1);
+ }
+
+ snprintf(filename, sizeof(filename),"mlog-%s", startupConfiguration.appMode == 0 ? "o-du" : "o-ru");
+
+ /* MLogOpen(0, 32, 0, 0xFFFFFFFF, filename);*/
+
+ MLogOpen(256, 3, 20000, 0, filename);
+ MLogSetMask(0);
+
+ puts("----------------------------------------");
+ printf("MLog Info: virt=0x%016lx size=%d\n", MLogGetFileLocation(), MLogGetFileSize());
+ puts("----------------------------------------");
+
+
+ uint64_t nActiveCoreMask[MAX_BBU_POOL_CORE_MASK] = {0};
+ nActiveCoreMask[0] = 1 << xranInit.io_cfg.timing_core;
+ uint32_t numCarriers = startupConfiguration.numCC;
+
+ MLogAddTestCase(nActiveCoreMask, numCarriers);
+
+ fcntl(0, F_SETFL, fcntl(0, F_GETFL) | O_NONBLOCK);
+
+ state = APP_RUNNING;
+ printf("Start XRAN traffic\n");
+ xran_start(xranHandle);
+ sleep(3);
+ print_menu();
+ for (;;) {
+ struct xran_common_counters x_counters;
+ char input[10];
+ sleep(1);
+ xran_curr_if_state = xran_get_if_state();
+ if(xran_get_common_counters(xranHandle, &x_counters) == XRAN_STATUS_SUCCESS) {
+
+ xran_get_time_stats(&nTotalTime, &nUsedTime, &nCoreUsed, 1);
+ nUsedPercent = ((float)nUsedTime * 100.0) / (float)nTotalTime;
+
+ printf("[%s][rx %ld pps %ld kbps %ld][tx %ld pps %ld kbps %ld] [on_time %ld early %ld late %ld corrupt %ld pkt_dupl %ld Total %ld] IO Util: %5.2f %%\n",
+ ((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"),
+ rx_counter,
+ rx_counter-old_rx_counter,
+ rx_bytes_per_sec*8/1000L,
+ tx_counter,
+ tx_counter-old_tx_counter,
+ tx_bytes_per_sec*8/1000L,
+ x_counters.Rx_on_time,
+ x_counters.Rx_early,
+ x_counters.Rx_late,
+ x_counters.Rx_corrupt,
+ x_counters.Rx_pkt_dupl,
+ x_counters.Total_msgs_rcvd,
+ nUsedPercent);
+
+ if(rx_counter > old_rx_counter)
+ old_rx_counter = rx_counter;
+ if(tx_counter > old_tx_counter)
+ old_tx_counter = tx_counter;
+
+ if(rx_counter > 0 && tx_counter > 0)
+ MLogSetMask(0xFFFFFFFF);
+ } else {
+ printf("error xran_get_common_counters\n");
+ }
+
+ if (xran_curr_if_state == XRAN_STOPPED){
+ break;
+ }
+ if (NULL == fgets(input, 10, stdin)) {
+ continue;
+ }
+
+ const int sel_opt = atoi(input);
+ switch (sel_opt) {
+ case 1:
+ xran_start(xranHandle);
+ printf("Start XRAN traffic\n");
+ break;
+ case 2:
+ break;
+ case 3:
+ xran_stop(xranHandle);
+ printf("Stop XRAN traffic\n");
+ state = APP_STOPPED;
+ break;
+ default:
+ puts("Wrong option passed!");
+ break;
+ }
+ if (APP_STOPPED == state)
+ break;
+ }
+
+ get_xran_iq_content();
+
+ puts("Closing l1 app... Ending all threads...");
+ xran_close(xranHandle);
+ MLogPrint(NULL);
+
+ stop_xran();
+ puts("Dump IQs...");
+
+ if (startupConfiguration.iqswap == 1){
+ for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
+ printf("RX: Swap I and Q to match CPU format: [%d]\n",i);
+ {
+ /* swap I and Q */
+ int32_t j;
+ signed short *ptr = (signed short *) p_rx_log_buffer[i];
+ signed short temp;
+
+ for (j = 0; j < (int32_t)(rx_log_buffer_size[i]/sizeof(short)) ; j = j + 2){
+ temp = ptr[j];
+ ptr[j] = ptr[j + 1];
+ ptr[j + 1] = temp;
+ }
+ }
+ }
+
+ if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.enableSrs){
+ for(i = 0;
+ i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);
+ i++) {
+ printf("SRS: Swap I and Q to match CPU format: [%d]\n",i);
+ {
+ /* swap I and Q */
+ int32_t j;
+ signed short *ptr = (signed short *) p_srs_log_buffer[i];
+ signed short temp;
+
+ for (j = 0; j < (int32_t)(srs_log_buffer_size[i]/sizeof(short)) ; j = j + 2){
+ temp = ptr[j];
+ ptr[j] = ptr[j + 1];
+ ptr[j + 1] = temp;
+ }
+ }
+ }
+ }
+ }
+
+ if (startupConfiguration.nebyteorderswap == 1 && startupConfiguration.compression == 0) {
+
+ for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
+ printf("RX: Convert S16 I and S16 Q to cpu byte order from XRAN Ant: [%d]\n",i);
+ for (j = 0; j < rx_log_buffer_size[i]/sizeof(short); j++){
+ p_rx_log_buffer[i][j] = rte_be_to_cpu_16(p_rx_log_buffer[i][j]);
+ }
+ }
+
+ if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.enableSrs){
+ for(i = 0;
+ i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);
+ i++) {
+ printf("SRS: Convert S16 I and S16 Q to cpu byte order from XRAN Ant: [%d]\n",i);
+ for (j = 0; j < srs_log_buffer_size[i]/sizeof(short); j++){
+ p_srs_log_buffer[i][j] = rte_be_to_cpu_16(p_srs_log_buffer[i][j]);
+ }
+ }
+ }
+ }
+
+ for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
+
+ snprintf(filename, sizeof(filename), "./logs/%s-rx_log_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
+ sys_save_buf_to_file_txt(filename,
+ "UL FFT OUT IQ Samples in human readable format",
+ (uint8_t*) p_rx_log_buffer[i],
+ rx_log_buffer_size[i],
+ 1);
+
+ snprintf(filename, sizeof(filename), "./logs/%s-rx_log_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
+ sys_save_buf_to_file(filename,
+ "UL FFT OUT IQ Samples in binary format",
+ (uint8_t*) p_rx_log_buffer[i],
+ rx_log_buffer_size[i]/sizeof(short),
+ sizeof(short));
+ }
+
+ if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.enableSrs){
+ for(i = 0;
+ i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);
+ i++) {
+ snprintf(filename, sizeof(filename), "./logs/%s-srs_log_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
+ sys_save_buf_to_file_txt(filename,
+ "SRS UL FFT OUT IQ Samples in human readable format",
+ (uint8_t*) p_srs_log_buffer[i],
+ srs_log_buffer_size[i],
+ 1);
+
+ snprintf(filename, sizeof(filename), "./logs/%s-srs_log_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
+ sys_save_buf_to_file(filename,
+ "SRS UL FFT OUT IQ Samples in binary format",
+ (uint8_t*) p_srs_log_buffer[i],
+ srs_log_buffer_size[i]/sizeof(short),
+ sizeof(short));
+ }
+ }
+
+ if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.enablePrach){
+ if (startupConfiguration.iqswap == 1){
+ for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
+ printf("PRACH: Swap I and Q to match CPU format: [%d]\n",i);
+ {
+ /* swap I and Q */
+ int32_t j;
+ signed short *ptr = (signed short *) p_prach_log_buffer[i];
+ signed short temp;
+
+ for (j = 0; j < (int32_t)(prach_log_buffer_size[i]/sizeof(short)) ; j = j + 2){
+ temp = ptr[j];
+ ptr[j] = ptr[j + 1];
+ ptr[j + 1] = temp;
+ }
+ }
+ }
+ }
+
+
+ if (startupConfiguration.nebyteorderswap == 1 && startupConfiguration.compression == 0){
+ for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
+ printf("PRACH: Convert S16 I and S16 Q to cpu byte order from XRAN Ant: [%d]\n",i);
+ for (j = 0; j < prach_log_buffer_size[i]/sizeof(short); j++){
+ p_prach_log_buffer[i][j] = rte_be_to_cpu_16(p_prach_log_buffer[i][j]);
+ }
+ }
+ }
+
+
+ for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
+
+ snprintf(filename, sizeof(filename), "./logs/%s-prach_log_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
+ sys_save_buf_to_file_txt(filename,
+ "PRACH FFT OUT IQ Samples in human readable format",
+ (uint8_t*) p_prach_log_buffer[i],
+ prach_log_buffer_size[i],
+ 1);
+
+ snprintf(filename, sizeof(filename), "./logs/%s-prach_log_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
+ sys_save_buf_to_file(filename,
+ "PRACH FFT OUT IQ Samples in binary format",
+ (uint8_t*) p_prach_log_buffer[i],
+ prach_log_buffer_size[i]/sizeof(short),
+ sizeof(short));
+ }
+ }
+
+ return 0;
+}
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/**\r
- * @brief This file has the System Debug Trace Logger (Mlog) Task IDs used by PHY\r
- * @file mlog_task_id.h\r
- * @ingroup group_source_xran\r
- * @author Intel Corporation\r
- **/\r
-\r
-#ifndef _XRAN_TASK_ID_H_\r
-#define _XRAN_TASK_ID_H_\r
-\r
-#ifdef __cplusplus\r
-extern "C" {\r
-#endif\r
-\r
-#define RESOURCE_CORE_0 0\r
-#define RESOURCE_CORE_1 1\r
-#define RESOURCE_CORE_2 2\r
-#define RESOURCE_CORE_3 3\r
-#define RESOURCE_CORE_4 4\r
-#define RESOURCE_CORE_5 5\r
-#define RESOURCE_CORE_6 6\r
-#define RESOURCE_CORE_7 7\r
-#define RESOURCE_CORE_8 8\r
-#define RESOURCE_CORE_9 9\r
-#define RESOURCE_CORE_10 10\r
-#define RESOURCE_CORE_11 11\r
-#define RESOURCE_CORE_12 12\r
-#define RESOURCE_CORE_13 13\r
-#define RESOURCE_CORE_14 14\r
-#define RESOURCE_CORE_15 15\r
-#define RESOURCE_CORE_16 16\r
-\r
-#define RESOURCE_IA_CORE 100\r
-\r
-//--------------------------------------------------------------------\r
-// XRAN APP\r
-//--------------------------------------------------------------------\r
-\r
-#define PID_GNB_PROC_TIMING 70\r
-#define PID_GNB_PROC_TIMING_TIMEOUT 71\r
-#define PID_GNB_SYM_CB 72\r
-#define PID_GNB_PRACH_CB 73\r
-#define PID_GNB_SRS_CB 74\r
-\r
-\r
-#ifdef __cplusplus\r
-}\r
-#endif\r
-\r
-#endif /* _XRAN_TASK_ID_H_ */\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief This file has the System Debug Trace Logger (Mlog) Task IDs used by PHY
+ * @file mlog_task_id.h
+ * @ingroup group_source_xran
+ * @author Intel Corporation
+ **/
+
+#ifndef _XRAN_TASK_ID_H_
+#define _XRAN_TASK_ID_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define RESOURCE_CORE_0 0
+#define RESOURCE_CORE_1 1
+#define RESOURCE_CORE_2 2
+#define RESOURCE_CORE_3 3
+#define RESOURCE_CORE_4 4
+#define RESOURCE_CORE_5 5
+#define RESOURCE_CORE_6 6
+#define RESOURCE_CORE_7 7
+#define RESOURCE_CORE_8 8
+#define RESOURCE_CORE_9 9
+#define RESOURCE_CORE_10 10
+#define RESOURCE_CORE_11 11
+#define RESOURCE_CORE_12 12
+#define RESOURCE_CORE_13 13
+#define RESOURCE_CORE_14 14
+#define RESOURCE_CORE_15 15
+#define RESOURCE_CORE_16 16
+
+#define RESOURCE_IA_CORE 100
+
+//--------------------------------------------------------------------
+// XRAN APP
+//--------------------------------------------------------------------
+
+#define PID_GNB_PROC_TIMING 70
+#define PID_GNB_PROC_TIMING_TIMEOUT 71
+#define PID_GNB_SYM_CB 72
+#define PID_GNB_PRACH_CB 73
+#define PID_GNB_SRS_CB 74
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _XRAN_TASK_ID_H_ */
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=5
systemCore=5
pktProcCore=5
pktAuxCore=5
timingCore=6
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]\r
-DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]\r
-UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=8\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,36,0,14,1,1,1,9,1\r
-PrbElemDl1=36,36,0,14,2,1,1,9,1\r
-PrbElemDl2=72,36,0,14,3,1,1,9,1\r
-PrbElemDl3=108,36,0,14,4,1,1,9,1\r
-PrbElemDl4=144,36,0,14,5,1,1,9,1\r
-PrbElemDl5=180,36,0,14,6,1,1,9,1\r
-PrbElemDl6=216,36,0,14,7,1,1,9,1\r
-PrbElemDl7=252,21,0,14,8,1,1,9,1\r
-\r
-nPrbElemUl=8\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,36,0,14,1,1,1,9,1\r
-PrbElemUl1=36,36,0,14,2,1,1,9,1\r
-PrbElemUl2=72,36,0,14,3,1,1,9,1\r
-PrbElemUl3=108,36,0,14,4,1,1,9,1\r
-PrbElemUl4=144,36,0,14,5,1,1,9,1\r
-PrbElemUl5=180,36,0,14,6,1,1,9,1\r
-PrbElemUl6=216,36,0,14,7,1,1,9,1\r
-PrbElemUl7=252,21,0,14,8,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]
+DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]
+UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=8
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,36,0,14,1,1,1,9,1
+PrbElemDl1=36,36,0,14,2,1,1,9,1
+PrbElemDl2=72,36,0,14,3,1,1,9,1
+PrbElemDl3=108,36,0,14,4,1,1,9,1
+PrbElemDl4=144,36,0,14,5,1,1,9,1
+PrbElemDl5=180,36,0,14,6,1,1,9,1
+PrbElemDl6=216,36,0,14,7,1,1,9,1
+PrbElemDl7=252,21,0,14,8,1,1,9,1
+
+nPrbElemUl=8
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,36,0,14,1,1,1,9,1
+PrbElemUl1=36,36,0,14,2,1,1,9,1
+PrbElemUl2=72,36,0,14,3,1,1,9,1
+PrbElemUl3=108,36,0,14,4,1,1,9,1
+PrbElemUl4=144,36,0,14,5,1,1,9,1
+PrbElemUl5=180,36,0,14,6,1,1,9,1
+PrbElemUl6=216,36,0,14,7,1,1,9,1
+PrbElemUl7=252,21,0,14,8,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=10
systemCore=10
pktProcCore=10
pktAuxCore=10
timingCore=11
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=8\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,36,0,14,1,1,1,9,1\r
-PrbElemDl1=36,36,0,14,2,1,1,9,1\r
-PrbElemDl2=72,36,0,14,3,1,1,9,1\r
-PrbElemDl3=108,36,0,14,4,1,1,9,1\r
-PrbElemDl4=144,36,0,14,5,1,1,9,1\r
-PrbElemDl5=180,36,0,14,6,1,1,9,1\r
-PrbElemDl6=216,36,0,14,7,1,1,9,1\r
-PrbElemDl7=252,21,0,14,8,1,1,9,1\r
-\r
-nPrbElemUl=8\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,36,0,14,1,1,1,9,1\r
-PrbElemUl1=36,36,0,14,2,1,1,9,1\r
-PrbElemUl2=72,36,0,14,3,1,1,9,1\r
-PrbElemUl3=108,36,0,14,4,1,1,9,1\r
-PrbElemUl4=144,36,0,14,5,1,1,9,1\r
-PrbElemUl5=180,36,0,14,6,1,1,9,1\r
-PrbElemUl6=216,36,0,14,7,1,1,9,1\r
-PrbElemUl7=252,21,0,14,8,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=8
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,36,0,14,1,1,1,9,1
+PrbElemDl1=36,36,0,14,2,1,1,9,1
+PrbElemDl2=72,36,0,14,3,1,1,9,1
+PrbElemDl3=108,36,0,14,4,1,1,9,1
+PrbElemDl4=144,36,0,14,5,1,1,9,1
+PrbElemDl5=180,36,0,14,6,1,1,9,1
+PrbElemDl6=216,36,0,14,7,1,1,9,1
+PrbElemDl7=252,21,0,14,8,1,1,9,1
+
+nPrbElemUl=8
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,36,0,14,1,1,1,9,1
+PrbElemUl1=36,36,0,14,2,1,1,9,1
+PrbElemUl2=72,36,0,14,3,1,1,9,1
+PrbElemUl3=108,36,0,14,4,1,1,9,1
+PrbElemUl4=144,36,0,14,5,1,1,9,1
+PrbElemUl5=180,36,0,14,6,1,1,9,1
+PrbElemUl6=216,36,0,14,7,1,1,9,1
+PrbElemUl7=252,21,0,14,8,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD 1 8T8R 100 4 2 MAX MAX 33% 33% 4.25 1.725 0% DU\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD 1 8T8R 100 4 2 MAX MAX 33% 33% 4.25 1.725 0% DU
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=5
systemCore=5
pktProcCore=5
pktAuxCore=5
timingCore=6
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]\r
-DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]\r
-UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=1\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,90,0,14,1,1,1,9,1\r
-\r
-nPrbElemUl=1\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,90,0,14,1,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]
+DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]
+UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=1
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,90,0,14,1,1,1,9,1
+
+nPrbElemUl=1
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,90,0,14,1,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD 1 8T8R 100 4 2 MAX MAX 33% 33% 4.25 1.725 0% DU\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD 1 8T8R 100 4 2 MAX MAX 33% 33% 4.25 1.725 0% DU
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=10
systemCore=10
pktProcCore=10
pktAuxCore=10
timingCore=11
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-\r
-#DL PRB / % Used RBs UL PRB / % Used RBs\r
-#33% 90 33% 90\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=1\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,90,0,14,1,1,1,9,1\r
-\r
-nPrbElemUl=1\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,90,0,14,1,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin
+
+#DL PRB / % Used RBs UL PRB / % Used RBs
+#33% 90 33% 90
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=1
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,90,0,14,1,1,1,9,1
+
+nPrbElemUl=1
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,90,0,14,1,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD 1 8T8R 100 4 2 MAX 16QAM 0.5 33% 90 33% 90 4.25 1.15 0% DU\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD 1 8T8R 100 4 2 MAX 16QAM 0.5 33% 90 33% 90 4.25 1.15 0% DU
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=5
systemCore=5
pktProcCore=5
pktAuxCore=5
timingCore=6
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]\r
-DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]\r
-UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=1\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,90,0,14,1,1,1,9,1\r
-\r
-nPrbElemUl=1\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,90,0,14,1,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]
+DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]
+UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=1
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,90,0,14,1,1,1,9,1
+
+nPrbElemUl=1
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,90,0,14,1,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD 1 8T8R 100 4 2 MAX 16QAM 0.5 33% 90 33% 90 4.25 1.15 0% DU\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD 1 8T8R 100 4 2 MAX 16QAM 0.5 33% 90 33% 90 4.25 1.15 0% DU
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=10
systemCore=10
pktProcCore=10
pktAuxCore=10
timingCore=11
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=1\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,90,0,14,1,1,1,9,1\r
-\r
-nPrbElemUl=1\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,90,0,14,1,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=1
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,90,0,14,1,1,1,9,1
+
+nPrbElemUl=1
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,90,0,14,1,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD 1 8T8R 100 4 2 64QAM 0.5 16QAM 0.5 66% 180 33% 90 3.425 1.15 DU\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD 1 8T8R 100 4 2 64QAM 0.5 16QAM 0.5 66% 180 33% 90 3.425 1.15 DU
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=5
systemCore=5
pktProcCore=5
pktAuxCore=5
timingCore=6
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]\r
-DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]\r
-UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-#DL PRB / % Used RBs UL PRB / % Used RBs\r
-#66% 180 33% 90\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=2\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,90,0,14,0,1,1,9,1\r
-PrbElemDl1=90,90,0,14,1,1,1,9,1\r
-\r
-nPrbElemUl=1\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,90,0,14,0,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]
+DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]
+UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+#DL PRB / % Used RBs UL PRB / % Used RBs
+#66% 180 33% 90
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=2
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,90,0,14,0,1,1,9,1
+PrbElemDl1=90,90,0,14,1,1,1,9,1
+
+nPrbElemUl=1
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,90,0,14,0,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD 1 8T8R 100 4 2 64QAM 0.5 16QAM 0.5 66% 180 33% 90 3.425 1.15 DU\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD 1 8T8R 100 4 2 64QAM 0.5 16QAM 0.5 66% 180 33% 90 3.425 1.15 DU
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=10
systemCore=10
pktProcCore=10
pktAuxCore=10
timingCore=11
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-\r
-#DL PRB / % Used RBs UL PRB / % Used RBs\r
-#66% 180 33% 90\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=2\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,90,0,14,0,1,1,9,1\r
-PrbElemDl1=90,90,0,14,1,1,1,9,1\r
-\r
-nPrbElemUl=1\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,90,0,14,0,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin
+
+#DL PRB / % Used RBs UL PRB / % Used RBs
+#66% 180 33% 90
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=2
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,90,0,14,0,1,1,9,1
+PrbElemDl1=90,90,0,14,1,1,1,9,1
+
+nPrbElemUl=1
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,90,0,14,0,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD 1 64T64R 100 16 8 MAX MAX 33% 90 33% 90 17 6.9 0% DU\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD 1 64T64R 100 16 8 MAX MAX 33% 90 33% 90 17 6.9 0% DU
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=5
systemCore=5
pktProcCore=5
pktAuxCore=5
timingCore=6
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]\r
-DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]\r
-UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-#DL PRB / % Used RBs UL PRB / % Used RBs\r
-#33% 90 33% 90\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=3\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,30,0,14,0,1,1,9,1\r
-PrbElemDl1=30,30,0,14,1,1,1,9,1\r
-PrbElemDl2=60,30,0,14,2,1,1,9,1\r
-\r
-nPrbElemUl=3\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,30,0,14,0,1,1,9,1\r
-PrbElemUl1=30,30,0,14,1,1,1,9,1\r
-PrbElemUl2=60,30,0,14,2,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]
+DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]
+UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+#DL PRB / % Used RBs UL PRB / % Used RBs
+#33% 90 33% 90
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=3
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,30,0,14,0,1,1,9,1
+PrbElemDl1=30,30,0,14,1,1,1,9,1
+PrbElemDl2=60,30,0,14,2,1,1,9,1
+
+nPrbElemUl=3
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,30,0,14,0,1,1,9,1
+PrbElemUl1=30,30,0,14,1,1,1,9,1
+PrbElemUl2=60,30,0,14,2,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD 1 8T8R 100 4 2 64QAM 0.5 16QAM 0.5 66% 180 33% 90 3.425 1.15 DU\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD 1 8T8R 100 4 2 64QAM 0.5 16QAM 0.5 66% 180 33% 90 3.425 1.15 DU
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=10
systemCore=10
pktProcCore=10
pktAuxCore=10
timingCore=11
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-\r
-#DL PRB / % Used RBs UL PRB / % Used RBs\r
-#33% 90 33% 90\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=3\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,30,0,14,0,1,1,9,1\r
-PrbElemDl1=30,30,0,14,1,1,1,9,1\r
-PrbElemDl2=60,30,0,14,2,1,1,9,1\r
-\r
-nPrbElemUl=3\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,30,0,14,0,1,1,9,1\r
-PrbElemUl1=30,30,0,14,1,1,1,9,1\r
-PrbElemUl2=60,30,0,14,2,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin
+
+#DL PRB / % Used RBs UL PRB / % Used RBs
+#33% 90 33% 90
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=3
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,30,0,14,0,1,1,9,1
+PrbElemDl1=30,30,0,14,1,1,1,9,1
+PrbElemDl2=60,30,0,14,2,1,1,9,1
+
+nPrbElemUl=3
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,30,0,14,0,1,1,9,1
+PrbElemUl1=30,30,0,14,1,1,1,9,1
+PrbElemUl2=60,30,0,14,2,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD 1 64T64R 100 16 8 MAX 16QAM 0.5 33% 90 33% 90 17 4.6 DU\r
-\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD 1 64T64R 100 16 8 MAX 16QAM 0.5 33% 90 33% 90 17 4.6 DU
+
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=5
systemCore=5
pktProcCore=5
pktAuxCore=5
timingCore=6
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]\r
-DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]\r
-UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-#DL PRB / % Used RBs UL PRB / % Used RBs\r
-#33% 90 33% 90\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=3\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,30,0,14,0,1,1,9,1\r
-PrbElemDl1=30,30,0,14,1,1,1,9,1\r
-PrbElemDl2=60,30,0,14,2,1,1,9,1\r
-\r
-nPrbElemUl=3\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,30,0,14,0,1,1,9,1\r
-PrbElemUl1=30,30,0,14,1,1,1,9,1\r
-PrbElemUl2=60,30,0,14,2,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]
+DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]
+UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+#DL PRB / % Used RBs UL PRB / % Used RBs
+#33% 90 33% 90
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=3
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,30,0,14,0,1,1,9,1
+PrbElemDl1=30,30,0,14,1,1,1,9,1
+PrbElemDl2=60,30,0,14,2,1,1,9,1
+
+nPrbElemUl=3
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,30,0,14,0,1,1,9,1
+PrbElemUl1=30,30,0,14,1,1,1,9,1
+PrbElemUl2=60,30,0,14,2,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD 1 64T64R 100 16 8 MAX 16QAM 0.5 33% 90 33% 90 17 4.6 DU\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD 1 64T64R 100 16 8 MAX 16QAM 0.5 33% 90 33% 90 17 4.6 DU
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=10
systemCore=10
pktProcCore=10
pktAuxCore=10
timingCore=11
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-#DL PRB / % Used RBs UL PRB / % Used RBs\r
-#33% 90 33% 90\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=3\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,30,0,14,0,1,1,9,1\r
-PrbElemDl1=30,30,0,14,1,1,1,9,1\r
-PrbElemDl2=60,30,0,14,2,1,1,9,1\r
-\r
-nPrbElemUl=3\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,30,0,14,0,1,1,9,1\r
-PrbElemUl1=30,30,0,14,1,1,1,9,1\r
-PrbElemUl2=60,30,0,14,2,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin
+#DL PRB / % Used RBs UL PRB / % Used RBs
+#33% 90 33% 90
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=3
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,30,0,14,0,1,1,9,1
+PrbElemDl1=30,30,0,14,1,1,1,9,1
+PrbElemDl2=60,30,0,14,2,1,1,9,1
+
+nPrbElemUl=3
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,30,0,14,0,1,1,9,1
+PrbElemUl1=30,30,0,14,1,1,1,9,1
+PrbElemUl2=60,30,0,14,2,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD 1 64T64R 100 16 8 64QAM 0.5 16QAM 0.5 66% 180 33% 90 13.7 4.6 0%\r
-\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD 1 64T64R 100 16 8 64QAM 0.5 16QAM 0.5 66% 180 33% 90 13.7 4.6 0%
+
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=5
systemCore=5
pktProcCore=5
pktAuxCore=5
timingCore=6
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]\r
-DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]\r
-UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-#DL PRB / % Used RBs UL PRB / % Used RBs\r
-#66% 180 33% 90\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=6\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,30,0,14,0,1,1,9,1\r
-PrbElemDl1=30,30,0,14,1,1,1,9,1\r
-PrbElemDl2=60,30,0,14,2,1,1,9,1\r
-PrbElemDl3=90,30,0,14,3,1,1,9,1\r
-PrbElemDl4=120,30,0,14,4,1,1,9,1\r
-PrbElemDl5=150,30,0,14,5,1,1,9,1\r
-\r
-nPrbElemUl=3\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,30,0,14,0,1,1,9,1\r
-PrbElemDl1=30,30,0,14,1,1,1,9,1\r
-PrbElemDl2=60,30,0,14,2,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=0 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=64 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]
+DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]
+UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+#DL PRB / % Used RBs UL PRB / % Used RBs
+#66% 180 33% 90
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=6
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,30,0,14,0,1,1,9,1
+PrbElemDl1=30,30,0,14,1,1,1,9,1
+PrbElemDl2=60,30,0,14,2,1,1,9,1
+PrbElemDl3=90,30,0,14,3,1,1,9,1
+PrbElemDl4=120,30,0,14,4,1,1,9,1
+PrbElemDl5=150,30,0,14,5,1,1,9,1
+
+nPrbElemUl=3
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,30,0,14,0,1,1,9,1
+PrbElemDl1=30,30,0,14,1,1,1,9,1
+PrbElemDl2=60,30,0,14,2,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=0 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=64 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD 1 64T64R 100 16 8 64QAM 0.5 16QAM 0.5 66% 180 33% 90 13.7 4.6 0%\r
-\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD 1 64T64R 100 16 8 64QAM 0.5 16QAM 0.5 66% 180 33% 90 13.7 4.6 0%
+
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=10
systemCore=10
pktProcCore=10
pktAuxCore=10
timingCore=11
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-\r
-#DL PRB / % Used RBs UL PRB / % Used RBs\r
-#66% 180 33% 90\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=6\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,30,0,14,0,1,1,9,1\r
-PrbElemDl1=30,30,0,14,1,1,1,9,1\r
-PrbElemDl2=60,30,0,14,2,1,1,9,1\r
-PrbElemDl3=90,30,0,14,3,1,1,9,1\r
-PrbElemDl4=120,30,0,14,4,1,1,9,1\r
-PrbElemDl5=150,30,0,14,5,1,1,9,1\r
-\r
-nPrbElemUl=3\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,30,0,14,0,1,1,9,1\r
-PrbElemDl1=30,30,0,14,1,1,1,9,1\r
-PrbElemDl2=60,30,0,14,2,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=0 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=64 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin
+
+#DL PRB / % Used RBs UL PRB / % Used RBs
+#66% 180 33% 90
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=6
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,30,0,14,0,1,1,9,1
+PrbElemDl1=30,30,0,14,1,1,1,9,1
+PrbElemDl2=60,30,0,14,2,1,1,9,1
+PrbElemDl3=90,30,0,14,3,1,1,9,1
+PrbElemDl4=120,30,0,14,4,1,1,9,1
+PrbElemDl5=150,30,0,14,5,1,1,9,1
+
+nPrbElemUl=3
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,30,0,14,0,1,1,9,1
+PrbElemDl1=30,30,0,14,1,1,1,9,1
+PrbElemDl2=60,30,0,14,2,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=0 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=64 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD 1 64T64R 100 8 4 MAX MAX 33% 90 33% 90 8.5 3.45 0% DU\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD 1 64T64R 100 8 4 MAX MAX 33% 90 33% 90 8.5 3.45 0% DU
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=5
systemCore=5
pktProcCore=5
pktAuxCore=5
timingCore=6
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]\r
-DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]\r
-UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-#DL PRB / % Used RBs UL PRB / % Used RBs\r
-#33% 90 33% 90\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=3\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,30,0,14,0,1,1,9,1\r
-PrbElemDl1=30,30,0,14,1,1,1,9,1\r
-PrbElemDl2=60,30,0,14,2,1,1,9,1\r
-\r
-nPrbElemUl=3\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,30,0,14,0,1,1,9,1\r
-PrbElemUl1=30,30,0,14,1,1,1,9,1\r
-PrbElemUl2=60,30,0,14,2,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]
+DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]
+UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+#DL PRB / % Used RBs UL PRB / % Used RBs
+#33% 90 33% 90
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=3
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,30,0,14,0,1,1,9,1
+PrbElemDl1=30,30,0,14,1,1,1,9,1
+PrbElemDl2=60,30,0,14,2,1,1,9,1
+
+nPrbElemUl=3
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,30,0,14,0,1,1,9,1
+PrbElemUl1=30,30,0,14,1,1,1,9,1
+PrbElemUl2=60,30,0,14,2,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD 1 64T64R 100 8 4 MAX MAX 33% 90 33% 90 8.5 3.45 0% DU\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD 1 64T64R 100 8 4 MAX MAX 33% 90 33% 90 8.5 3.45 0% DU
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=10
systemCore=10
pktProcCore=10
pktAuxCore=10
timingCore=11
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-#DL PRB / % Used RBs UL PRB / % Used RBs\r
-#33% 90 33% 90\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=3\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,30,0,14,0,1,1,9,1\r
-PrbElemDl1=30,30,0,14,1,1,1,9,1\r
-PrbElemDl2=60,30,0,14,2,1,1,9,1\r
-\r
-nPrbElemUl=3\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,30,0,14,0,1,1,9,1\r
-PrbElemUl1=30,30,0,14,1,1,1,9,1\r
-PrbElemUl2=60,30,0,14,2,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin
+#DL PRB / % Used RBs UL PRB / % Used RBs
+#33% 90 33% 90
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=3
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,30,0,14,0,1,1,9,1
+PrbElemDl1=30,30,0,14,1,1,1,9,1
+PrbElemDl2=60,30,0,14,2,1,1,9,1
+
+nPrbElemUl=3
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,30,0,14,0,1,1,9,1
+PrbElemUl1=30,30,0,14,1,1,1,9,1
+PrbElemUl2=60,30,0,14,2,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD 1 64T64R 100 8 4 MAX 16QAM 0.5 33% 90 33% 90 8.5 2.3 DU\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD 1 64T64R 100 8 4 MAX 16QAM 0.5 33% 90 33% 90 8.5 2.3 DU
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=5
systemCore=5
pktProcCore=5
pktAuxCore=5
timingCore=6
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]\r
-DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]\r
-UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=3\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,30,0,14,0,1,1,9,1\r
-PrbElemDl1=30,30,0,14,1,1,1,9,1\r
-PrbElemDl2=60,30,0,14,2,1,1,9,1\r
-\r
-nPrbElemUl=3\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,30,0,14,0,1,1,9,1\r
-PrbElemUl1=30,30,0,14,1,1,1,9,1\r
-PrbElemUl2=60,30,0,14,2,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]
+DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]
+UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=3
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,30,0,14,0,1,1,9,1
+PrbElemDl1=30,30,0,14,1,1,1,9,1
+PrbElemDl2=60,30,0,14,2,1,1,9,1
+
+nPrbElemUl=3
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,30,0,14,0,1,1,9,1
+PrbElemUl1=30,30,0,14,1,1,1,9,1
+PrbElemUl2=60,30,0,14,2,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD 1 64T64R 100 8 4 MAX 16QAM 0.5 33% 90 33% 90 8.5 2.3 DU\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD 1 64T64R 100 8 4 MAX 16QAM 0.5 33% 90 33% 90 8.5 2.3 DU
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=10
systemCore=10
pktProcCore=10
pktAuxCore=10
timingCore=11
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-#DL PRB / % Used RBs UL PRB / % Used RBs\r
-#33% 90 33% 90\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=3\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,30,0,14,0,1,1,9,1\r
-PrbElemDl1=30,30,0,14,1,1,1,9,1\r
-PrbElemDl2=60,30,0,14,2,1,1,9,1\r
-\r
-nPrbElemUl=3\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,30,0,14,0,1,1,9,1\r
-PrbElemUl1=30,30,0,14,1,1,1,9,1\r
-PrbElemUl2=60,30,0,14,2,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin
+#DL PRB / % Used RBs UL PRB / % Used RBs
+#33% 90 33% 90
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=3
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,30,0,14,0,1,1,9,1
+PrbElemDl1=30,30,0,14,1,1,1,9,1
+PrbElemDl2=60,30,0,14,2,1,1,9,1
+
+nPrbElemUl=3
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,30,0,14,0,1,1,9,1
+PrbElemUl1=30,30,0,14,1,1,1,9,1
+PrbElemUl2=60,30,0,14,2,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD 1 64T64R 100 8 4 64QAM 0.5 16QAM 0.5 66% 180 33% 90 6.85 2.3 0% \r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD 1 64T64R 100 8 4 64QAM 0.5 16QAM 0.5 66% 180 33% 90 6.85 2.3 0%
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=5
systemCore=5
pktProcCore=5
pktAuxCore=5
timingCore=6
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]\r
-DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]\r
-UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=6\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,30,0,14,0,1,1,9,1\r
-PrbElemDl1=30,30,0,14,1,1,1,9,1\r
-PrbElemDl2=60,30,0,14,2,1,1,9,1\r
-PrbElemDl3=90,30,0,14,3,1,1,9,1\r
-PrbElemDl4=120,30,0,14,4,1,1,9,1\r
-PrbElemDl5=150,30,0,14,5,1,1,9,1\r
-\r
-nPrbElemUl=3\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,30,0,14,0,1,1,9,1\r
-PrbElemUl1=30,30,0,14,1,1,1,9,1\r
-PrbElemUl2=60,30,0,14,2,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]
+DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]
+UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=6
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,30,0,14,0,1,1,9,1
+PrbElemDl1=30,30,0,14,1,1,1,9,1
+PrbElemDl2=60,30,0,14,2,1,1,9,1
+PrbElemDl3=90,30,0,14,3,1,1,9,1
+PrbElemDl4=120,30,0,14,4,1,1,9,1
+PrbElemDl5=150,30,0,14,5,1,1,9,1
+
+nPrbElemUl=3
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,30,0,14,0,1,1,9,1
+PrbElemUl1=30,30,0,14,1,1,1,9,1
+PrbElemUl2=60,30,0,14,2,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD 1 64T64R 100 8 4 64QAM 0.5 16QAM 0.5 66% 180 33% 90 6.85 2.3 0% \r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD 1 64T64R 100 8 4 64QAM 0.5 16QAM 0.5 66% 180 33% 90 6.85 2.3 0%
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=10
systemCore=10
pktProcCore=10
pktAuxCore=10
timingCore=11
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=6\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,30,0,14,0,1,1,9,1\r
-PrbElemDl1=30,30,0,14,1,1,1,9,1\r
-PrbElemDl2=60,30,0,14,2,1,1,9,1\r
-PrbElemDl3=90,30,0,14,3,1,1,9,1\r
-PrbElemDl4=120,30,0,14,4,1,1,9,1\r
-PrbElemDl5=150,30,0,14,5,1,1,9,1\r
-\r
-nPrbElemUl=3\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,30,0,14,0,1,1,9,1\r
-PrbElemUl1=30,30,0,14,1,1,1,9,1\r
-PrbElemUl2=60,30,0,14,2,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=6
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,30,0,14,0,1,1,9,1
+PrbElemDl1=30,30,0,14,1,1,1,9,1
+PrbElemDl2=60,30,0,14,2,1,1,9,1
+PrbElemDl3=90,30,0,14,3,1,1,9,1
+PrbElemDl4=120,30,0,14,4,1,1,9,1
+PrbElemDl5=150,30,0,14,5,1,1,9,1
+
+nPrbElemUl=3
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,30,0,14,0,1,1,9,1
+PrbElemUl1=30,30,0,14,1,1,1,9,1
+PrbElemUl2=60,30,0,14,2,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD DDDSUUDDDD: S it's 6:4:4 1 8T8R 100 8 4 70.3% 192 2304 70.0% 191 2292 new added 70% with 8T8R\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD DDDSUUDDDD: S it's 6:4:4 1 8T8R 100 8 4 70.3% 192 2304 70.0% 191 2292 new added 70% with 8T8R
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=5
systemCore=5
pktProcCore=5
pktAuxCore=5
timingCore=6
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]\r
-DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]\r
-UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=4\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,48,0,14,1,1,1,9,1\r
-PrbElemDl1=48,48,0,14,2,1,1,9,1\r
-PrbElemDl2=96,48,0,14,3,1,1,9,1\r
-PrbElemDl3=144,48,0,14,4,1,1,9,1\r
-\r
-nPrbElemUl=4\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,48,0,14,1,1,1,9,1\r
-PrbElemUl1=48,48,0,14,2,1,1,9,1\r
-PrbElemUl2=96,48,0,14,3,1,1,9,1\r
-PrbElemUl3=144,48,0,14,4,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]
+DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]
+UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=4
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,48,0,14,1,1,1,9,1
+PrbElemDl1=48,48,0,14,2,1,1,9,1
+PrbElemDl2=96,48,0,14,3,1,1,9,1
+PrbElemDl3=144,48,0,14,4,1,1,9,1
+
+nPrbElemUl=4
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,48,0,14,1,1,1,9,1
+PrbElemUl1=48,48,0,14,2,1,1,9,1
+PrbElemUl2=96,48,0,14,3,1,1,9,1
+PrbElemUl3=144,48,0,14,4,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD DDDSUUDDDD: S it's 6:4:4 1 8T8R 100 8 4 70.3% 192 2304 70.0% 191 2292 new added 70% with 8T8R\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD DDDSUUDDDD: S it's 6:4:4 1 8T8R 100 8 4 70.3% 192 2304 70.0% 191 2292 new added 70% with 8T8R
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=10
systemCore=10
pktProcCore=10
pktAuxCore=10
timingCore=11
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=4\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,48,0,14,1,1,1,9,1\r
-PrbElemDl1=48,48,0,14,2,1,1,9,1\r
-PrbElemDl2=96,48,0,14,3,1,1,9,1\r
-PrbElemDl3=144,48,0,14,4,1,1,9,1\r
-\r
-nPrbElemUl=4\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,48,0,14,1,1,1,9,1\r
-PrbElemUl1=48,48,0,14,2,1,1,9,1\r
-PrbElemUl2=96,48,0,14,3,1,1,9,1\r
-PrbElemUl3=144,48,0,14,4,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin
+
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=4
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,48,0,14,1,1,1,9,1
+PrbElemDl1=48,48,0,14,2,1,1,9,1
+PrbElemDl2=96,48,0,14,3,1,1,9,1
+PrbElemDl3=144,48,0,14,4,1,1,9,1
+
+nPrbElemUl=4
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,48,0,14,1,1,1,9,1
+PrbElemUl1=48,48,0,14,2,1,1,9,1
+PrbElemUl2=96,48,0,14,3,1,1,9,1
+PrbElemUl3=144,48,0,14,4,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD DDDSUUDDDD: S it's 6:4:5 1 64T64R 100 16 8 100.0% 273 3276 100.0% 273 3276 1 peak\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD DDDSUUDDDD: S it's 6:4:5 1 64T64R 100 16 8 100.0% 273 3276 100.0% 273 3276 1 peak
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=5
systemCore=5
pktProcCore=5
pktAuxCore=5
timingCore=6
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]\r
-DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]\r
-UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=6\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,48,0,14,1,1,1,9,1\r
-PrbElemDl1=48,48,0,14,2,1,1,9,1\r
-PrbElemDl2=96,48,0,14,3,1,1,9,1\r
-PrbElemDl3=144,48,0,14,4,1,1,9,1\r
-PrbElemDl4=192,48,0,14,5,1,1,9,1\r
-PrbElemDl5=240,33,0,14,6,1,1,9,1\r
-\r
-nPrbElemUl=6\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,48,0,14,1,1,1,9,1\r
-PrbElemUl1=48,48,0,14,2,1,1,9,1\r
-PrbElemUl2=96,48,0,14,3,1,1,9,1\r
-PrbElemUl3=144,48,0,14,4,1,1,9,1\r
-PrbElemUl4=192,48,0,14,5,1,1,9,1\r
-PrbElemUl5=240,33,0,14,6,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]
+DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]
+UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=6
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,48,0,14,1,1,1,9,1
+PrbElemDl1=48,48,0,14,2,1,1,9,1
+PrbElemDl2=96,48,0,14,3,1,1,9,1
+PrbElemDl3=144,48,0,14,4,1,1,9,1
+PrbElemDl4=192,48,0,14,5,1,1,9,1
+PrbElemDl5=240,33,0,14,6,1,1,9,1
+
+nPrbElemUl=6
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,48,0,14,1,1,1,9,1
+PrbElemUl1=48,48,0,14,2,1,1,9,1
+PrbElemUl2=96,48,0,14,3,1,1,9,1
+PrbElemUl3=144,48,0,14,4,1,1,9,1
+PrbElemUl4=192,48,0,14,5,1,1,9,1
+PrbElemUl5=240,33,0,14,6,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD DDDSUUDDDD: S it's 6:4:5 1 64T64R 100 16 8 100.0% 273 3276 100.0% 273 3276 1 peak\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD DDDSUUDDDD: S it's 6:4:5 1 64T64R 100 16 8 100.0% 273 3276 100.0% 273 3276 1 peak
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=10
systemCore=10
pktProcCore=10
pktAuxCore=10
timingCore=11
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=6\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,48,0,14,1,1,1,9,1\r
-PrbElemDl1=48,48,0,14,2,1,1,9,1\r
-PrbElemDl2=96,48,0,14,3,1,1,9,1\r
-PrbElemDl3=144,48,0,14,4,1,1,9,1\r
-PrbElemDl4=192,48,0,14,5,1,1,9,1\r
-PrbElemDl5=240,33,0,14,6,1,1,9,1\r
-\r
-nPrbElemUl=6\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,48,0,14,1,1,1,9,1\r
-PrbElemUl1=48,48,0,14,2,1,1,9,1\r
-PrbElemUl2=96,48,0,14,3,1,1,9,1\r
-PrbElemUl3=144,48,0,14,4,1,1,9,1\r
-PrbElemUl4=192,48,0,14,5,1,1,9,1\r
-PrbElemUl5=240,33,0,14,6,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=6
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,48,0,14,1,1,1,9,1
+PrbElemDl1=48,48,0,14,2,1,1,9,1
+PrbElemDl2=96,48,0,14,3,1,1,9,1
+PrbElemDl3=144,48,0,14,4,1,1,9,1
+PrbElemDl4=192,48,0,14,5,1,1,9,1
+PrbElemDl5=240,33,0,14,6,1,1,9,1
+
+nPrbElemUl=6
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,48,0,14,1,1,1,9,1
+PrbElemUl1=48,48,0,14,2,1,1,9,1
+PrbElemUl2=96,48,0,14,3,1,1,9,1
+PrbElemUl3=144,48,0,14,4,1,1,9,1
+PrbElemUl4=192,48,0,14,5,1,1,9,1
+PrbElemUl5=240,33,0,14,6,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 16 4 70.3% 192 2304 35.0% 96 1152 35% center\r
-\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 16 4 70.3% 192 2304 35.0% 96 1152 35% center
+
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=5
systemCore=5
pktProcCore=5
pktAuxCore=5
timingCore=6
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]\r
-DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]\r
-UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=4\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,48,0,14,1,1,1,9,1\r
-PrbElemDl1=48,48,0,14,2,1,1,9,1\r
-PrbElemDl2=96,48,0,14,3,1,1,9,1\r
-PrbElemDl3=144,48,0,14,4,1,1,9,1\r
-\r
-nPrbElemUl=2\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,48,0,14,1,1,1,9,1\r
-PrbElemUl1=48,48,0,14,2,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]
+DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]
+UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=4
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,48,0,14,1,1,1,9,1
+PrbElemDl1=48,48,0,14,2,1,1,9,1
+PrbElemDl2=96,48,0,14,3,1,1,9,1
+PrbElemDl3=144,48,0,14,4,1,1,9,1
+
+nPrbElemUl=2
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,48,0,14,1,1,1,9,1
+PrbElemUl1=48,48,0,14,2,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 16 4 70.3% 192 2304 35.0% 96 1152 35% center\r
-\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 16 4 70.3% 192 2304 35.0% 96 1152 35% center
+
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=10
systemCore=10
pktProcCore=10
pktAuxCore=10
timingCore=11
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=4\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,48,0,14,1,1,1,9,1\r
-PrbElemDl1=48,48,0,14,2,1,1,9,1\r
-PrbElemDl2=96,48,0,14,3,1,1,9,1\r
-PrbElemDl3=144,48,0,14,4,1,1,9,1\r
-\r
-nPrbElemUl=2\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,48,0,14,1,1,1,9,1\r
-PrbElemUl1=48,48,0,14,2,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=4
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,48,0,14,1,1,1,9,1
+PrbElemDl1=48,48,0,14,2,1,1,9,1
+PrbElemDl2=96,48,0,14,3,1,1,9,1
+PrbElemDl3=144,48,0,14,4,1,1,9,1
+
+nPrbElemUl=2
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,48,0,14,1,1,1,9,1
+PrbElemUl1=48,48,0,14,2,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 16 4 70.3% 192 2304 35.0% 96 1152 45% mid\r
-\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 16 4 70.3% 192 2304 35.0% 96 1152 45% mid
+
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=5
systemCore=5
pktProcCore=5
pktAuxCore=5
timingCore=6
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]\r
-DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]\r
-UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=4\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,48,0,14,1,1,1,9,1\r
-PrbElemDl1=48,48,0,14,2,1,1,9,1\r
-PrbElemDl2=96,48,0,14,3,1,1,9,1\r
-PrbElemDl3=144,48,0,14,4,1,1,9,1\r
-\r
-nPrbElemUl=2\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,48,0,14,1,1,1,9,1\r
-PrbElemUl1=48,48,0,14,2,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]
+DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]
+UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=4
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,48,0,14,1,1,1,9,1
+PrbElemDl1=48,48,0,14,2,1,1,9,1
+PrbElemDl2=96,48,0,14,3,1,1,9,1
+PrbElemDl3=144,48,0,14,4,1,1,9,1
+
+nPrbElemUl=2
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,48,0,14,1,1,1,9,1
+PrbElemUl1=48,48,0,14,2,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 16 4 70.3% 192 2304 35.0% 96 1152 45% mid\r
-\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 16 4 70.3% 192 2304 35.0% 96 1152 45% mid
+
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=10
systemCore=10
pktProcCore=10
pktAuxCore=10
timingCore=11
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=4\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,48,0,14,1,1,1,9,1\r
-PrbElemDl1=48,48,0,14,2,1,1,9,1\r
-PrbElemDl2=96,48,0,14,3,1,1,9,1\r
-PrbElemDl3=144,48,0,14,4,1,1,9,1\r
-\r
-nPrbElemUl=2\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,48,0,14,1,1,1,9,1\r
-PrbElemUl1=48,48,0,14,2,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=4
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,48,0,14,1,1,1,9,1
+PrbElemDl1=48,48,0,14,2,1,1,9,1
+PrbElemDl2=96,48,0,14,3,1,1,9,1
+PrbElemDl3=144,48,0,14,4,1,1,9,1
+
+nPrbElemUl=2
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,48,0,14,1,1,1,9,1
+PrbElemUl1=48,48,0,14,2,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 4 1 70.3% 192 2304 35.0% 96 1152 20% edge\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=1 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 4 1 70.3% 192 2304 35.0% 96 1152 20% edge
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=1 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=5
systemCore=5
pktProcCore=5
pktAuxCore=5
timingCore=6
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]\r
-DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]\r
-UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-#DL PRB / % Used RBs UL PRB / % Used RBs\r
-#33% 90 33% 90\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=4\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,48,0,14,1,1,1,9,1\r
-PrbElemDl1=48,48,0,14,2,1,1,9,1\r
-PrbElemDl2=96,48,0,14,3,1,1,9,1\r
-PrbElemDl3=144,48,0,14,4,1,1,9,1\r
-\r
-nPrbElemUl=2\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,48,0,14,1,1,1,9,1\r
-PrbElemUl1=48,48,0,14,2,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]
+DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]
+UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+#DL PRB / % Used RBs UL PRB / % Used RBs
+#33% 90 33% 90
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=4
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,48,0,14,1,1,1,9,1
+PrbElemDl1=48,48,0,14,2,1,1,9,1
+PrbElemDl2=96,48,0,14,3,1,1,9,1
+PrbElemDl3=144,48,0,14,4,1,1,9,1
+
+nPrbElemUl=2
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,48,0,14,1,1,1,9,1
+PrbElemUl1=48,48,0,14,2,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 4 1 70.3% 192 2304 35.0% 96 1152 20% edge\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=1 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 4 1 70.3% 192 2304 35.0% 96 1152 20% edge
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=1 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=10
systemCore=10
pktProcCore=10
pktAuxCore=10
timingCore=11
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-\r
-#DL PRB / % Used RBs UL PRB / % Used RBs\r
-#33% 90 33% 90\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=4\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,48,0,14,1,1,1,9,1\r
-PrbElemDl1=48,48,0,14,2,1,1,9,1\r
-PrbElemDl2=96,48,0,14,3,1,1,9,1\r
-PrbElemDl3=144,48,0,14,4,1,1,9,1\r
-\r
-nPrbElemUl=2\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,48,0,14,1,1,1,9,1\r
-PrbElemUl1=48,48,0,14,2,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin
+
+#DL PRB / % Used RBs UL PRB / % Used RBs
+#33% 90 33% 90
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=4
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,48,0,14,1,1,1,9,1
+PrbElemDl1=48,48,0,14,2,1,1,9,1
+PrbElemDl2=96,48,0,14,3,1,1,9,1
+PrbElemDl3=144,48,0,14,4,1,1,9,1
+
+nPrbElemUl=2
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,48,0,14,1,1,1,9,1
+PrbElemUl1=48,48,0,14,2,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 8 4 70.3% 192 2304 70.0% 191 2292 70%\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 8 4 70.3% 192 2304 70.0% 191 2292 70%
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=5
systemCore=5
pktProcCore=5
pktAuxCore=5
timingCore=6
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]\r
-DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]\r
-UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-#DL PRB / % Used RBs UL PRB / % Used RBs\r
-#33% 90 33% 90\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=4\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,48,0,14,1,1,1,9,1\r
-PrbElemDl1=48,48,0,14,2,1,1,9,1\r
-PrbElemDl2=96,48,0,14,3,1,1,9,1\r
-PrbElemDl3=144,48,0,14,4,1,1,9,1\r
-\r
-nPrbElemUl=4\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,48,0,14,1,1,1,9,1\r
-PrbElemUl1=48,48,0,14,2,1,1,9,1\r
-PrbElemUl2=96,48,0,14,3,1,1,9,1\r
-PrbElemUl3=144,48,0,14,4,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]
+DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]
+UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+#DL PRB / % Used RBs UL PRB / % Used RBs
+#33% 90 33% 90
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=4
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,48,0,14,1,1,1,9,1
+PrbElemDl1=48,48,0,14,2,1,1,9,1
+PrbElemDl2=96,48,0,14,3,1,1,9,1
+PrbElemDl3=144,48,0,14,4,1,1,9,1
+
+nPrbElemUl=4
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,48,0,14,1,1,1,9,1
+PrbElemUl1=48,48,0,14,2,1,1,9,1
+PrbElemUl2=96,48,0,14,3,1,1,9,1
+PrbElemUl3=144,48,0,14,4,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 8 4 70.3% 192 2304 70.0% 191 2292 70%\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 8 4 70.3% 192 2304 70.0% 191 2292 70%
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=10
systemCore=10
pktProcCore=10
pktAuxCore=10
timingCore=11
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-\r
-#DL PRB / % Used RBs UL PRB / % Used RBs\r
-#33% 90 33% 90\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=4\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,48,0,14,1,1,1,9,1\r
-PrbElemDl1=48,48,0,14,2,1,1,9,1\r
-PrbElemDl2=96,48,0,14,3,1,1,9,1\r
-PrbElemDl3=144,48,0,14,4,1,1,9,1\r
-\r
-nPrbElemUl=4\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,48,0,14,1,1,1,9,1\r
-PrbElemUl1=48,48,0,14,2,1,1,9,1\r
-PrbElemUl2=96,48,0,14,3,1,1,9,1\r
-PrbElemUl3=144,48,0,14,4,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin
+
+#DL PRB / % Used RBs UL PRB / % Used RBs
+#33% 90 33% 90
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=4
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,48,0,14,1,1,1,9,1
+PrbElemDl1=48,48,0,14,2,1,1,9,1
+PrbElemDl2=96,48,0,14,3,1,1,9,1
+PrbElemDl3=144,48,0,14,4,1,1,9,1
+
+nPrbElemUl=4
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,48,0,14,1,1,1,9,1
+PrbElemUl1=48,48,0,14,2,1,1,9,1
+PrbElemUl2=96,48,0,14,3,1,1,9,1
+PrbElemUl3=144,48,0,14,4,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD DDDSUUDDDD: S it's 6:4:4 1 8T8R 100 8 4 70.3% 192 2304 70.0% 191 2292 new added 70% with 8T8R\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD DDDSUUDDDD: S it's 6:4:4 1 8T8R 100 8 4 70.3% 192 2304 70.0% 191 2292 new added 70% with 8T8R
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=5
systemCore=5
pktProcCore=5
pktAuxCore=5
timingCore=6
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]\r
-DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]\r
-UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=4\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,48,0,14,1,1,1,9,1\r
-PrbElemDl1=48,48,0,14,2,1,1,9,1\r
-PrbElemDl2=96,48,0,14,3,1,1,9,1\r
-PrbElemDl3=144,48,0,14,4,1,1,9,1\r
-\r
-nPrbElemUl=4\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,48,0,14,1,1,1,9,1\r
-PrbElemUl1=48,48,0,14,2,1,1,9,1\r
-PrbElemUl2=96,48,0,14,3,1,1,9,1\r
-PrbElemUl3=144,48,0,14,4,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]
+DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]
+UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=4
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,48,0,14,1,1,1,9,1
+PrbElemDl1=48,48,0,14,2,1,1,9,1
+PrbElemDl2=96,48,0,14,3,1,1,9,1
+PrbElemDl3=144,48,0,14,4,1,1,9,1
+
+nPrbElemUl=4
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,48,0,14,1,1,1,9,1
+PrbElemUl1=48,48,0,14,2,1,1,9,1
+PrbElemUl2=96,48,0,14,3,1,1,9,1
+PrbElemUl3=144,48,0,14,4,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD DDDSUUDDDD: S it's 6:4:4 1 8T8R 100 8 4 70.3% 192 2304 70.0% 191 2292 new added 70% with 8T8R\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD DDDSUUDDDD: S it's 6:4:4 1 8T8R 100 8 4 70.3% 192 2304 70.0% 191 2292 new added 70% with 8T8R
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=8 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=10
systemCore=10
pktProcCore=10
pktAuxCore=10
timingCore=11
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=4\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,48,0,14,1,1,1,9,1\r
-PrbElemDl1=48,48,0,14,2,1,1,9,1\r
-PrbElemDl2=96,48,0,14,3,1,1,9,1\r
-PrbElemDl3=144,48,0,14,4,1,1,9,1\r
-\r
-nPrbElemUl=4\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,48,0,14,1,1,1,9,1\r
-PrbElemUl1=48,48,0,14,2,1,1,9,1\r
-PrbElemUl2=96,48,0,14,3,1,1,9,1\r
-PrbElemUl3=144,48,0,14,4,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin
+
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=4
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,48,0,14,1,1,1,9,1
+PrbElemDl1=48,48,0,14,2,1,1,9,1
+PrbElemDl2=96,48,0,14,3,1,1,9,1
+PrbElemDl3=144,48,0,14,4,1,1,9,1
+
+nPrbElemUl=4
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,48,0,14,1,1,1,9,1
+PrbElemUl1=48,48,0,14,2,1,1,9,1
+PrbElemUl2=96,48,0,14,3,1,1,9,1
+PrbElemUl3=144,48,0,14,4,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD DDDSUUDDDD: S it's 6:4:5 1 64T64R 100 16 8 100.0% 273 3276 100.0% 273 3276 1 peak\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD DDDSUUDDDD: S it's 6:4:5 1 64T64R 100 16 8 100.0% 273 3276 100.0% 273 3276 1 peak
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=5
systemCore=5
pktProcCore=5
pktAuxCore=5
timingCore=6
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]\r
-DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]\r
-UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=6\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,48,0,14,1,1,1,9,1\r
-PrbElemDl1=48,48,0,14,2,1,1,9,1\r
-PrbElemDl2=96,48,0,14,3,1,1,9,1\r
-PrbElemDl3=144,48,0,14,4,1,1,9,1\r
-PrbElemDl4=192,48,0,14,5,1,1,9,1\r
-PrbElemDl5=240,33,0,14,6,1,1,9,1\r
-\r
-nPrbElemUl=6\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,48,0,14,1,1,1,9,1\r
-PrbElemUl1=48,48,0,14,2,1,1,9,1\r
-PrbElemUl2=96,48,0,14,3,1,1,9,1\r
-PrbElemUl3=144,48,0,14,4,1,1,9,1\r
-PrbElemUl4=192,48,0,14,5,1,1,9,1\r
-PrbElemUl5=240,33,0,14,6,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]
+DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]
+UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=6
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,48,0,14,1,1,1,9,1
+PrbElemDl1=48,48,0,14,2,1,1,9,1
+PrbElemDl2=96,48,0,14,3,1,1,9,1
+PrbElemDl3=144,48,0,14,4,1,1,9,1
+PrbElemDl4=192,48,0,14,5,1,1,9,1
+PrbElemDl5=240,33,0,14,6,1,1,9,1
+
+nPrbElemUl=6
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,48,0,14,1,1,1,9,1
+PrbElemUl1=48,48,0,14,2,1,1,9,1
+PrbElemUl2=96,48,0,14,3,1,1,9,1
+PrbElemUl3=144,48,0,14,4,1,1,9,1
+PrbElemUl4=192,48,0,14,5,1,1,9,1
+PrbElemUl5=240,33,0,14,6,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD DDDSUUDDDD: S it's 6:4:5 1 64T64R 100 16 8 100.0% 273 3276 100.0% 273 3276 1 peak\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD DDDSUUDDDD: S it's 6:4:5 1 64T64R 100 16 8 100.0% 273 3276 100.0% 273 3276 1 peak
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=16 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=10
systemCore=10
pktProcCore=10
pktAuxCore=10
timingCore=11
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=6\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,48,0,14,1,1,1,9,1\r
-PrbElemDl1=48,48,0,14,2,1,1,9,1\r
-PrbElemDl2=96,48,0,14,3,1,1,9,1\r
-PrbElemDl3=144,48,0,14,4,1,1,9,1\r
-PrbElemDl4=192,48,0,14,5,1,1,9,1\r
-PrbElemDl5=240,33,0,14,6,1,1,9,1\r
-\r
-nPrbElemUl=6\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,48,0,14,1,1,1,9,1\r
-PrbElemUl1=48,48,0,14,2,1,1,9,1\r
-PrbElemUl2=96,48,0,14,3,1,1,9,1\r
-PrbElemUl3=144,48,0,14,4,1,1,9,1\r
-PrbElemUl4=192,48,0,14,5,1,1,9,1\r
-PrbElemUl5=240,33,0,14,6,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=6
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,48,0,14,1,1,1,9,1
+PrbElemDl1=48,48,0,14,2,1,1,9,1
+PrbElemDl2=96,48,0,14,3,1,1,9,1
+PrbElemDl3=144,48,0,14,4,1,1,9,1
+PrbElemDl4=192,48,0,14,5,1,1,9,1
+PrbElemDl5=240,33,0,14,6,1,1,9,1
+
+nPrbElemUl=6
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,48,0,14,1,1,1,9,1
+PrbElemUl1=48,48,0,14,2,1,1,9,1
+PrbElemUl2=96,48,0,14,3,1,1,9,1
+PrbElemUl3=144,48,0,14,4,1,1,9,1
+PrbElemUl4=192,48,0,14,5,1,1,9,1
+PrbElemUl5=240,33,0,14,6,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 16 4 70.3% 192 2304 35.0% 96 1152 35% center\r
-\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 16 4 70.3% 192 2304 35.0% 96 1152 35% center
+
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=5
systemCore=5
pktProcCore=5
pktAuxCore=5
timingCore=6
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]\r
-DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]\r
-UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=4\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,48,0,14,1,1,1,9,1\r
-PrbElemDl1=48,48,0,14,2,1,1,9,1\r
-PrbElemDl2=96,48,0,14,3,1,1,9,1\r
-PrbElemDl3=144,48,0,14,4,1,1,9,1\r
-\r
-nPrbElemUl=2\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,48,0,14,1,1,1,9,1\r
-PrbElemUl1=48,48,0,14,2,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]
+DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]
+UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=4
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,48,0,14,1,1,1,9,1
+PrbElemDl1=48,48,0,14,2,1,1,9,1
+PrbElemDl2=96,48,0,14,3,1,1,9,1
+PrbElemDl3=144,48,0,14,4,1,1,9,1
+
+nPrbElemUl=2
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,48,0,14,1,1,1,9,1
+PrbElemUl1=48,48,0,14,2,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 16 4 70.3% 192 2304 35.0% 96 1152 35% center\r
-\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 16 4 70.3% 192 2304 35.0% 96 1152 35% center
+
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=10
systemCore=10
pktProcCore=10
pktAuxCore=10
timingCore=11
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=4\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,48,0,14,1,1,1,9,1\r
-PrbElemDl1=48,48,0,14,2,1,1,9,1\r
-PrbElemDl2=96,48,0,14,3,1,1,9,1\r
-PrbElemDl3=144,48,0,14,4,1,1,9,1\r
-\r
-nPrbElemUl=2\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,48,0,14,1,1,1,9,1\r
-PrbElemUl1=48,48,0,14,2,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=4
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,48,0,14,1,1,1,9,1
+PrbElemDl1=48,48,0,14,2,1,1,9,1
+PrbElemDl2=96,48,0,14,3,1,1,9,1
+PrbElemDl3=144,48,0,14,4,1,1,9,1
+
+nPrbElemUl=2
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,48,0,14,1,1,1,9,1
+PrbElemUl1=48,48,0,14,2,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 16 4 70.3% 192 2304 35.0% 96 1152 45% mid\r
-\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 16 4 70.3% 192 2304 35.0% 96 1152 45% mid
+
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=5
systemCore=5
pktProcCore=5
pktAuxCore=5
timingCore=6
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]\r
-DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]\r
-UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=4\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,48,0,14,1,1,1,9,1\r
-PrbElemDl1=48,48,0,14,2,1,1,9,1\r
-PrbElemDl2=96,48,0,14,3,1,1,9,1\r
-PrbElemDl3=144,48,0,14,4,1,1,9,1\r
-\r
-nPrbElemUl=2\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,48,0,14,1,1,1,9,1\r
-PrbElemUl1=48,48,0,14,2,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]
+DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]
+UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=4
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,48,0,14,1,1,1,9,1
+PrbElemDl1=48,48,0,14,2,1,1,9,1
+PrbElemDl2=96,48,0,14,3,1,1,9,1
+PrbElemDl3=144,48,0,14,4,1,1,9,1
+
+nPrbElemUl=2
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,48,0,14,1,1,1,9,1
+PrbElemUl1=48,48,0,14,2,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 16 4 70.3% 192 2304 35.0% 96 1152 45% mid\r
-\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 16 4 70.3% 192 2304 35.0% 96 1152 45% mid
+
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=16 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=10
systemCore=10
pktProcCore=10
pktAuxCore=10
timingCore=11
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=4\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,48,0,14,1,1,1,9,1\r
-PrbElemDl1=48,48,0,14,2,1,1,9,1\r
-PrbElemDl2=96,48,0,14,3,1,1,9,1\r
-PrbElemDl3=144,48,0,14,4,1,1,9,1\r
-\r
-nPrbElemUl=2\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,48,0,14,1,1,1,9,1\r
-PrbElemUl1=48,48,0,14,2,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=4
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,48,0,14,1,1,1,9,1
+PrbElemDl1=48,48,0,14,2,1,1,9,1
+PrbElemDl2=96,48,0,14,3,1,1,9,1
+PrbElemDl3=144,48,0,14,4,1,1,9,1
+
+nPrbElemUl=2
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,48,0,14,1,1,1,9,1
+PrbElemUl1=48,48,0,14,2,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 4 1 70.3% 192 2304 35.0% 96 1152 20% edge\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 4 1 70.3% 192 2304 35.0% 96 1152 20% edge
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=5
systemCore=5
pktProcCore=5
pktAuxCore=5
timingCore=6
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]\r
-DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]\r
-UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-#DL PRB / % Used RBs UL PRB / % Used RBs\r
-#33% 90 33% 90\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=4\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,48,0,14,1,1,1,9,1\r
-PrbElemDl1=48,48,0,14,2,1,1,9,1\r
-PrbElemDl2=96,48,0,14,3,1,1,9,1\r
-PrbElemDl3=144,48,0,14,4,1,1,9,1\r
-\r
-nPrbElemUl=2\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,48,0,14,1,1,1,9,1\r
-PrbElemUl1=48,48,0,14,2,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]
+DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]
+UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+#DL PRB / % Used RBs UL PRB / % Used RBs
+#33% 90 33% 90
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=4
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,48,0,14,1,1,1,9,1
+PrbElemDl1=48,48,0,14,2,1,1,9,1
+PrbElemDl2=96,48,0,14,3,1,1,9,1
+PrbElemDl3=144,48,0,14,4,1,1,9,1
+
+nPrbElemUl=2
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,48,0,14,1,1,1,9,1
+PrbElemUl1=48,48,0,14,2,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 4 1 70.3% 192 2304 35.0% 96 1152 20% edge\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 4 1 70.3% 192 2304 35.0% 96 1152 20% edge
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=2 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=10
systemCore=10
pktProcCore=10
pktAuxCore=10
timingCore=11
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-\r
-#DL PRB / % Used RBs UL PRB / % Used RBs\r
-#33% 90 33% 90\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=4\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,48,0,14,1,1,1,9,1\r
-PrbElemDl1=48,48,0,14,2,1,1,9,1\r
-PrbElemDl2=96,48,0,14,3,1,1,9,1\r
-PrbElemDl3=144,48,0,14,4,1,1,9,1\r
-\r
-nPrbElemUl=2\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,48,0,14,1,1,1,9,1\r
-PrbElemUl1=48,48,0,14,2,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin
+
+#DL PRB / % Used RBs UL PRB / % Used RBs
+#33% 90 33% 90
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=4
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,48,0,14,1,1,1,9,1
+PrbElemDl1=48,48,0,14,2,1,1,9,1
+PrbElemDl2=96,48,0,14,3,1,1,9,1
+PrbElemDl3=144,48,0,14,4,1,1,9,1
+
+nPrbElemUl=2
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,48,0,14,1,1,1,9,1
+PrbElemUl1=48,48,0,14,2,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 8 4 70.3% 192 2304 70.0% 191 2292 70%\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 8 4 70.3% 192 2304 70.0% 191 2292 70%
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=5
systemCore=5
pktProcCore=5
pktAuxCore=5
timingCore=6
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]\r
-DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]\r
-UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-#DL PRB / % Used RBs UL PRB / % Used RBs\r
-#33% 90 33% 90\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=4\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,48,0,14,1,1,1,9,1\r
-PrbElemDl1=48,48,0,14,2,1,1,9,1\r
-PrbElemDl2=96,48,0,14,3,1,1,9,1\r
-PrbElemDl3=144,48,0,14,4,1,1,9,1\r
-\r
-nPrbElemUl=4\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,48,0,14,1,1,1,9,1\r
-PrbElemUl1=48,48,0,14,2,1,1,9,1\r
-PrbElemUl2=96,48,0,14,3,1,1,9,1\r
-PrbElemUl3=144,48,0,14,4,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]
+DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe8=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe9=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe10=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe11=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe12=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe13=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe14=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe15=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]
+UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe8=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe9=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe10=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe11=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe12=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe13=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe14=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe15=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+#DL PRB / % Used RBs UL PRB / % Used RBs
+#33% 90 33% 90
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=4
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,48,0,14,1,1,1,9,1
+PrbElemDl1=48,48,0,14,2,1,1,9,1
+PrbElemDl2=96,48,0,14,3,1,1,9,1
+PrbElemDl3=144,48,0,14,4,1,1,9,1
+
+nPrbElemUl=4
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,48,0,14,1,1,1,9,1
+PrbElemUl1=48,48,0,14,2,1,1,9,1
+PrbElemUl2=96,48,0,14,3,1,1,9,1
+PrbElemUl3=144,48,0,14,4,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 8 4 70.3% 192 2304 70.0% 191 2292 70%\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+#TDD DDDSUUDDDD: S it's 6:4:4 1 64T64R 100 8 4 70.3% 192 2304 70.0% 191 2292 70%
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=8 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=64 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=10
systemCore=10
pktProcCore=10
pktAuxCore=10
timingCore=11
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-\r
-#DL PRB / % Used RBs UL PRB / % Used RBs\r
-#33% 90 33% 90\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=4\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,48,0,14,1,1,1,9,1\r
-PrbElemDl1=48,48,0,14,2,1,1,9,1\r
-PrbElemDl2=96,48,0,14,3,1,1,9,1\r
-PrbElemDl3=144,48,0,14,4,1,1,9,1\r
-\r
-nPrbElemUl=4\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,48,0,14,1,1,1,9,1\r
-PrbElemUl1=48,48,0,14,2,1,1,9,1\r
-PrbElemUl2=96,48,0,14,3,1,1,9,1\r
-PrbElemUl3=144,48,0,14,4,1,1,9,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=1 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC32=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC33=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC34=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC35=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC36=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC37=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC38=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC39=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC40=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC41=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC42=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC43=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC44=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC45=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC46=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC47=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC48=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC49=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC50=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC51=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC52=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC53=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC54=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC55=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC56=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC57=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC58=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC59=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC60=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC61=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC62=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC63=./usecase/cat_b/mu1_100mhz/ant_7.bin
+
+#DL PRB / % Used RBs UL PRB / % Used RBs
+#33% 90 33% 90
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=4
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,48,0,14,1,1,1,9,1
+PrbElemDl1=48,48,0,14,2,1,1,9,1
+PrbElemDl2=96,48,0,14,3,1,1,9,1
+PrbElemDl3=144,48,0,14,4,1,1,9,1
+
+nPrbElemUl=4
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,48,0,14,1,1,1,9,1
+PrbElemUl1=48,48,0,14,2,1,1,9,1
+PrbElemUl2=96,48,0,14,3,1,1,9,1
+PrbElemUl3=144,48,0,14,4,1,1,9,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=1 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=5
systemCore=5
pktProcCore=5
pktAuxCore=5
timingCore=6
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]\r
-DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]\r
-UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=8\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,36,0,14,1,1,0,16,1\r
-PrbElemDl1=36,36,0,14,2,1,0,16,1\r
-PrbElemDl2=72,36,0,14,3,1,0,16,1\r
-PrbElemDl3=108,36,0,14,4,1,0,16,1\r
-PrbElemDl4=144,36,0,14,5,1,0,16,1\r
-PrbElemDl5=180,36,0,14,6,1,0,16,1\r
-PrbElemDl6=216,36,0,14,7,1,0,16,1\r
-PrbElemDl7=252,21,0,14,8,1,0,16,1\r
-nPrbElemUl=8\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,36,0,14,1,1,0,16,1\r
-PrbElemUl1=36,36,0,14,2,1,0,16,1\r
-PrbElemUl2=72,36,0,14,3,1,0,16,1\r
-PrbElemUl3=108,36,0,14,4,1,0,16,1\r
-PrbElemUl4=144,36,0,14,5,1,0,16,1\r
-PrbElemUl5=180,36,0,14,6,1,0,16,1\r
-PrbElemUl6=216,36,0,14,7,1,0,16,1\r
-PrbElemUl7=252,21,0,14,8,1,0,16,1\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=0 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+#DL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of TX elements and K- number of UEs (the same as Layers)]
+DlBfwUe0=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe1=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe2=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe3=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe4=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe5=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe6=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+DlBfwUe7=./usecase/cat_b/mu1_100mhz/dl_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+#UL beamforming weights used based on channel to UE [e.g Wzf = H^H(H*H^H)-1 wher H is MxK matrix, M - number of RX elements and K- number of UEs (the same as Layers)]
+UlBfwUe0=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_0.bin #UE0 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe1=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_1.bin #UE1 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe2=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_2.bin #UE2 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe3=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_3.bin #UE3 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe4=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_4.bin #UE4 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe5=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_5.bin #UE5 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe6=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_6.bin #UE6 weights for TRX antennas [antElmTRx x numRBs x slot points]
+UlBfwUe7=./usecase/cat_b/mu1_100mhz/ul_bfw_ue_7.bin #UE7 weights for TRX antennas [antElmTRx x numRBs x slot points]
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=8
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,36,0,14,1,1,0,16,1
+PrbElemDl1=36,36,0,14,2,1,0,16,1
+PrbElemDl2=72,36,0,14,3,1,0,16,1
+PrbElemDl3=108,36,0,14,4,1,0,16,1
+PrbElemDl4=144,36,0,14,5,1,0,16,1
+PrbElemDl5=180,36,0,14,6,1,0,16,1
+PrbElemDl6=216,36,0,14,7,1,0,16,1
+PrbElemDl7=252,21,0,14,8,1,0,16,1
+nPrbElemUl=8
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,36,0,14,1,1,0,16,1
+PrbElemUl1=36,36,0,14,2,1,0,16,1
+PrbElemUl2=72,36,0,14,3,1,0,16,1
+PrbElemUl3=108,36,0,14,4,1,0,16,1
+PrbElemUl4=144,36,0,14,5,1,0,16,1
+PrbElemUl5=180,36,0,14,6,1,0,16,1
+PrbElemUl6=216,36,0,14,7,1,0,16,1
+PrbElemUl7=252,21,0,14,8,1,0,16,1
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=0 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # O-DU(0) | O-RU(1)\r
-xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B \r
-antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R\r
-\r
-#UEs\r
-muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources \r
-DlLayersPerUe=1 #number of RX anntennas on DL UE side\r
-UlLayersPerUe=1 #number of TX anntennas on UL UE side\r
-\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
+xranMode=1 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in O-RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=8 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+antNumUL=4 # Cat B: UL Number of Antennas per CC (default: 8) or number of UL Digital streams for Category B
+antElmTRx=32 #number of Antenna Elements for Cat B default 32T32R
+
+#UEs
+muMimoUEs=8 #number of UEs serviced by MU-MIMO system. Number of independent beams within the same Freq/Time resources
+DlLayersPerUe=1 #number of RX anntennas on DL UE side
+UlLayersPerUe=1 #number of TX anntennas on UL UE side
+
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=10
systemCore=10
pktProcCore=10
pktAuxCore=10
timingCore=11
-llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF\r
-ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app\r
-\r
-numSlots=10 #number of slots per IQ files\r
-antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0\r
-antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0\r
-antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0\r
-antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0\r
-antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1\r
-antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1\r
-antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1\r
-antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1\r
-antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2\r
-antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2\r
-antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2\r
-antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2\r
-antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3\r
-antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3\r
-antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3\r
-antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189\r
-\r
-srsEanble=1 # Enable (1)| disable (0) SRS \r
-srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)\r
-\r
-antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin \r
-antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin \r
-antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin \r
-antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin \r
-antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin \r
-antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin \r
-antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin \r
-antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin \r
-\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=8\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,36,0,14,1,1,0,16,1\r
-PrbElemDl1=36,36,0,14,2,1,0,16,1\r
-PrbElemDl2=72,36,0,14,3,1,0,16,1\r
-PrbElemDl3=108,36,0,14,4,1,0,16,1\r
-PrbElemDl4=144,36,0,14,5,1,0,16,1\r
-PrbElemDl5=180,36,0,14,6,1,0,16,1\r
-PrbElemDl6=216,36,0,14,7,1,0,16,1\r
-PrbElemDl7=252,21,0,14,8,1,0,16,1\r
-nPrbElemUl=8\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,36,0,14,1,1,0,16,1\r
-PrbElemUl1=36,36,0,14,2,1,0,16,1\r
-PrbElemUl2=72,36,0,14,3,1,0,16,1\r
-PrbElemUl3=108,36,0,14,4,1,0,16,1\r
-PrbElemUl4=144,36,0,14,5,1,0,16,1\r
-PrbElemUl5=180,36,0,14,6,1,0,16,1\r
-PrbElemUl6=216,36,0,14,7,1,0,16,1\r
-PrbElemUl7=252,21,0,14,8,1,0,16,1\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-compression=0 # (1) compression enabled (0) compression disabled\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of O-DU VF
+ruMac=00:11:22:33:44:55 # O-RU VF for O-RU app
+
+numSlots=10 #number of slots per IQ files
+antC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+antPrachC0=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC0
+antPrachC1=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC0
+antPrachC2=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC0
+antPrachC3=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC0
+antPrachC4=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC1
+antPrachC5=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC1
+antPrachC6=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC1
+antPrachC7=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC1
+antPrachC8=./usecase/cat_b/mu1_100mhz/ant_0.bin #CC2
+antPrachC9=./usecase/cat_b/mu1_100mhz/ant_1.bin #CC2
+antPrachC10=./usecase/cat_b/mu1_100mhz/ant_2.bin #CC2
+antPrachC11=./usecase/cat_b/mu1_100mhz/ant_3.bin #CC2
+antPrachC12=./usecase/cat_b/mu1_100mhz/ant_4.bin #CC3
+antPrachC13=./usecase/cat_b/mu1_100mhz/ant_5.bin #CC3
+antPrachC14=./usecase/cat_b/mu1_100mhz/ant_6.bin #CC3
+antPrachC15=./usecase/cat_b/mu1_100mhz/ant_7.bin #CC3
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189
+
+srsEanble=1 # Enable (1)| disable (0) SRS
+srsSym=8192 # (1<<13) symbol used for SRS (def: sym 13)
+
+antSrsC0=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC1=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC2=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC3=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC4=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC5=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC6=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC7=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC8=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC9=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC10=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC11=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC12=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC13=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC14=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC15=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC16=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC17=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC18=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC19=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC20=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC21=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC22=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC23=./usecase/cat_b/mu1_100mhz/ant_7.bin
+antSrsC24=./usecase/cat_b/mu1_100mhz/ant_0.bin
+antSrsC25=./usecase/cat_b/mu1_100mhz/ant_1.bin
+antSrsC26=./usecase/cat_b/mu1_100mhz/ant_2.bin
+antSrsC27=./usecase/cat_b/mu1_100mhz/ant_3.bin
+antSrsC28=./usecase/cat_b/mu1_100mhz/ant_4.bin
+antSrsC29=./usecase/cat_b/mu1_100mhz/ant_5.bin
+antSrsC30=./usecase/cat_b/mu1_100mhz/ant_6.bin
+antSrsC31=./usecase/cat_b/mu1_100mhz/ant_7.bin
+
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=8
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,36,0,14,1,1,0,16,1
+PrbElemDl1=36,36,0,14,2,1,0,16,1
+PrbElemDl2=72,36,0,14,3,1,0,16,1
+PrbElemDl3=108,36,0,14,4,1,0,16,1
+PrbElemDl4=144,36,0,14,5,1,0,16,1
+PrbElemDl5=180,36,0,14,6,1,0,16,1
+PrbElemDl6=216,36,0,14,7,1,0,16,1
+PrbElemDl7=252,21,0,14,8,1,0,16,1
+nPrbElemUl=8
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,36,0,14,1,1,0,16,1
+PrbElemUl1=36,36,0,14,2,1,0,16,1
+PrbElemUl2=72,36,0,14,3,1,0,16,1
+PrbElemUl3=108,36,0,14,4,1,0,16,1
+PrbElemUl4=144,36,0,14,5,1,0,16,1
+PrbElemUl5=180,36,0,14,6,1,0,16,1
+PrbElemUl6=216,36,0,14,7,1,0,16,1
+PrbElemUl7=252,21,0,14,8,1,0,16,1
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+compression=0 # (1) compression enabled (0) compression disabled
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-appMode=0 # lls-CU(0) | RU(1)\r
-xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)\r
-ccNum=12 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)\r
-antNum=4 # Number of Antennas per CC (default: 4)\r
-\r
-##Numerology\r
-mu=0 #15Khz Sub Carrier Spacing\r
-ttiPeriod=1000 # in us TTI period (15Khz default 1000us)\r
-nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=1024\r
-nULFftSize=1024\r
-\r
-nFrameDuplexType=0 # 0 - FDD 1 - TDD\r
-nTddPeriod=0 #TDD priod e.g. DDDS 4\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single\r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
-llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF\r
-ruMac=00:11:22:33:44:55 #RU VF for RU app\r
-#ruMac=3c:fd:fe:9e:93:68 #RU PF for tcpdump\r
-\r
-numSlots=40 #number of slots per IQ files\r
-\r
-antC0=./usecase/mu0_10mhz/12/ant_0.bin #CC0\r
-antC1=./usecase/mu0_10mhz/12/ant_1.bin #CC0\r
-antC2=./usecase/mu0_10mhz/12/ant_2.bin #CC0\r
-antC3=./usecase/mu0_10mhz/12/ant_3.bin #CC0\r
-antC4=./usecase/mu0_10mhz/12/ant_4.bin #CC1\r
-antC5=./usecase/mu0_10mhz/12/ant_5.bin #CC1\r
-antC6=./usecase/mu0_10mhz/12/ant_6.bin #CC1\r
-antC7=./usecase/mu0_10mhz/12/ant_7.bin #CC1\r
-antC8=./usecase/mu0_10mhz/12/ant_8.bin #CC2\r
-antC9=./usecase/mu0_10mhz/12/ant_9.bin #CC2\r
-antC10=./usecase/mu0_10mhz/12/ant_10.bin #CC2\r
-antC11=./usecase/mu0_10mhz/12/ant_11.bin #CC2\r
-antC12=./usecase/mu0_10mhz/12/ant_12.bin #CC3\r
-antC13=./usecase/mu0_10mhz/12/ant_13.bin #CC3\r
-antC14=./usecase/mu0_10mhz/12/ant_14.bin #CC3\r
-antC15=./usecase/mu0_10mhz/12/ant_15.bin #CC3\r
-antC16=./usecase/mu0_10mhz/12/ant_0.bin #CC4\r
-antC17=./usecase/mu0_10mhz/12/ant_1.bin #CC4\r
-antC18=./usecase/mu0_10mhz/12/ant_2.bin #CC4\r
-antC19=./usecase/mu0_10mhz/12/ant_3.bin #CC4\r
-antC20=./usecase/mu0_10mhz/12/ant_4.bin #CC5\r
-antC21=./usecase/mu0_10mhz/12/ant_5.bin #CC5\r
-antC22=./usecase/mu0_10mhz/12/ant_6.bin #CC5\r
-antC23=./usecase/mu0_10mhz/12/ant_7.bin #CC5\r
-antC24=./usecase/mu0_10mhz/12/ant_8.bin #CC6\r
-antC25=./usecase/mu0_10mhz/12/ant_9.bin #CC6\r
-antC26=./usecase/mu0_10mhz/12/ant_10.bin #CC6\r
-antC27=./usecase/mu0_10mhz/12/ant_11.bin #CC6\r
-antC28=./usecase/mu0_10mhz/12/ant_12.bin #CC7\r
-antC29=./usecase/mu0_10mhz/12/ant_13.bin #CC7\r
-antC30=./usecase/mu0_10mhz/12/ant_14.bin #CC7\r
-antC31=./usecase/mu0_10mhz/12/ant_15.bin #CC7\r
-antC32=./usecase/mu0_10mhz/12/ant_0.bin #CC8\r
-antC33=./usecase/mu0_10mhz/12/ant_1.bin #CC8\r
-antC34=./usecase/mu0_10mhz/12/ant_2.bin #CC8\r
-antC35=./usecase/mu0_10mhz/12/ant_3.bin #CC8\r
-antC36=./usecase/mu0_10mhz/12/ant_4.bin #CC9\r
-antC37=./usecase/mu0_10mhz/12/ant_5.bin #CC9\r
-antC38=./usecase/mu0_10mhz/12/ant_6.bin #CC9\r
-antC39=./usecase/mu0_10mhz/12/ant_7.bin #CC9\r
-antC40=./usecase/mu0_10mhz/12/ant_8.bin #CC10\r
-antC41=./usecase/mu0_10mhz/12/ant_9.bin #CC10\r
-antC42=./usecase/mu0_10mhz/12/ant_10.bin #CC10\r
-antC43=./usecase/mu0_10mhz/12/ant_11.bin #CC10\r
-antC44=./usecase/mu0_10mhz/12/ant_12.bin #CC11\r
-antC45=./usecase/mu0_10mhz/12/ant_13.bin #CC11\r
-antC46=./usecase/mu0_10mhz/12/ant_14.bin #CC11\r
-antC47=./usecase/mu0_10mhz/12/ant_15.bin #CC11\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-c_plane_vlan_tag=1 #VLAN Tag used for C-Plane\r
-u_plane_vlan_tag=2 #VLAN Tag used for U-Plane\r
-\r
-##RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 #in us TODO: update per RU implementation\r
- #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=400 #in us\r
-T2a_max_cp_dl=1120 #in us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=400 #in us\r
-T2a_max_cp_ul=1120 #in us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=200 # in us\r
-T2a_max_up=1120 # in us\r
-\r
-#Transmission Window\r
-Ta3_min=160 #in us\r
-Ta3_max=256 #in us\r
-\r
-###########################################################\r
-##lls-CU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=560\r
-T1a_max_cp_dl=800\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=480\r
-T1a_max_cp_ul=560\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=280\r
-T1a_max_up=400\r
-\r
-#Reception Window\r
-Ta4_min=0\r
-Ta4_max=360\r
-###########################################################\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+
+# This is simple configuration file. Use '#' sign for comments
+appMode=0 # lls-CU(0) | RU(1)
+xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)
+ccNum=12 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)
+antNum=4 # Number of Antennas per CC (default: 4)
+
+##Numerology
+mu=0 #15Khz Sub Carrier Spacing
+ttiPeriod=1000 # in us TTI period (15Khz default 1000us)
+nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=1024
+nULFftSize=1024
+
+nFrameDuplexType=0 # 0 - FDD 1 - TDD
+nTddPeriod=0 #TDD priod e.g. DDDS 4
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
+llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF
+ruMac=00:11:22:33:44:55 #RU VF for RU app
+#ruMac=3c:fd:fe:9e:93:68 #RU PF for tcpdump
+
+numSlots=40 #number of slots per IQ files
+
+antC0=./usecase/mu0_10mhz/12/ant_0.bin #CC0
+antC1=./usecase/mu0_10mhz/12/ant_1.bin #CC0
+antC2=./usecase/mu0_10mhz/12/ant_2.bin #CC0
+antC3=./usecase/mu0_10mhz/12/ant_3.bin #CC0
+antC4=./usecase/mu0_10mhz/12/ant_4.bin #CC1
+antC5=./usecase/mu0_10mhz/12/ant_5.bin #CC1
+antC6=./usecase/mu0_10mhz/12/ant_6.bin #CC1
+antC7=./usecase/mu0_10mhz/12/ant_7.bin #CC1
+antC8=./usecase/mu0_10mhz/12/ant_8.bin #CC2
+antC9=./usecase/mu0_10mhz/12/ant_9.bin #CC2
+antC10=./usecase/mu0_10mhz/12/ant_10.bin #CC2
+antC11=./usecase/mu0_10mhz/12/ant_11.bin #CC2
+antC12=./usecase/mu0_10mhz/12/ant_12.bin #CC3
+antC13=./usecase/mu0_10mhz/12/ant_13.bin #CC3
+antC14=./usecase/mu0_10mhz/12/ant_14.bin #CC3
+antC15=./usecase/mu0_10mhz/12/ant_15.bin #CC3
+antC16=./usecase/mu0_10mhz/12/ant_0.bin #CC4
+antC17=./usecase/mu0_10mhz/12/ant_1.bin #CC4
+antC18=./usecase/mu0_10mhz/12/ant_2.bin #CC4
+antC19=./usecase/mu0_10mhz/12/ant_3.bin #CC4
+antC20=./usecase/mu0_10mhz/12/ant_4.bin #CC5
+antC21=./usecase/mu0_10mhz/12/ant_5.bin #CC5
+antC22=./usecase/mu0_10mhz/12/ant_6.bin #CC5
+antC23=./usecase/mu0_10mhz/12/ant_7.bin #CC5
+antC24=./usecase/mu0_10mhz/12/ant_8.bin #CC6
+antC25=./usecase/mu0_10mhz/12/ant_9.bin #CC6
+antC26=./usecase/mu0_10mhz/12/ant_10.bin #CC6
+antC27=./usecase/mu0_10mhz/12/ant_11.bin #CC6
+antC28=./usecase/mu0_10mhz/12/ant_12.bin #CC7
+antC29=./usecase/mu0_10mhz/12/ant_13.bin #CC7
+antC30=./usecase/mu0_10mhz/12/ant_14.bin #CC7
+antC31=./usecase/mu0_10mhz/12/ant_15.bin #CC7
+antC32=./usecase/mu0_10mhz/12/ant_0.bin #CC8
+antC33=./usecase/mu0_10mhz/12/ant_1.bin #CC8
+antC34=./usecase/mu0_10mhz/12/ant_2.bin #CC8
+antC35=./usecase/mu0_10mhz/12/ant_3.bin #CC8
+antC36=./usecase/mu0_10mhz/12/ant_4.bin #CC9
+antC37=./usecase/mu0_10mhz/12/ant_5.bin #CC9
+antC38=./usecase/mu0_10mhz/12/ant_6.bin #CC9
+antC39=./usecase/mu0_10mhz/12/ant_7.bin #CC9
+antC40=./usecase/mu0_10mhz/12/ant_8.bin #CC10
+antC41=./usecase/mu0_10mhz/12/ant_9.bin #CC10
+antC42=./usecase/mu0_10mhz/12/ant_10.bin #CC10
+antC43=./usecase/mu0_10mhz/12/ant_11.bin #CC10
+antC44=./usecase/mu0_10mhz/12/ant_12.bin #CC11
+antC45=./usecase/mu0_10mhz/12/ant_13.bin #CC11
+antC46=./usecase/mu0_10mhz/12/ant_14.bin #CC11
+antC47=./usecase/mu0_10mhz/12/ant_15.bin #CC11
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+c_plane_vlan_tag=1 #VLAN Tag used for C-Plane
+u_plane_vlan_tag=2 #VLAN Tag used for U-Plane
+
+##RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 #in us TODO: update per RU implementation
+ #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+
+#Reception Window C-plane DL
+T2a_min_cp_dl=400 #in us
+T2a_max_cp_dl=1120 #in us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=400 #in us
+T2a_max_cp_ul=1120 #in us
+
+#Reception Window U-plane
+T2a_min_up=200 # in us
+T2a_max_up=1120 # in us
+
+#Transmission Window
+Ta3_min=160 #in us
+Ta3_max=256 #in us
+
+###########################################################
+##lls-CU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=560
+T1a_max_cp_dl=800
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=480
+T1a_max_cp_ul=560
+
+#U-plane
+##Transmission Window
+T1a_min_up=280
+T1a_max_up=400
+
+#Reception Window
+Ta4_min=0
+Ta4_max=360
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-appMode=1 # lls-CU(0) | RU(1)\r
-xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)\r
-ccNum=12 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)\r
-antNum=4 # Number of Antennas per CC (default: 4)\r
-\r
-##Numerology\r
-mu=0 #15Khz Sub Carrier Spacing\r
-ttiPeriod=1000 # in us TTI period (15Khz default 1000us)\r
-nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=1024\r
-nULFftSize=1024\r
-\r
-nFrameDuplexType=0 # 0 - FDD 1 - TDD\r
-nTddPeriod=0 #TDD priod e.g. DDDS 4\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single\r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
-llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF\r
-#llsCUMac=3c:fd:fe:a8:e0:70 #lls-CU PF for tcpdump\r
-ruMac=00:11:22:33:44:55 #RU VF for RU app\r
-\r
-numSlots=40 #number of slots per IQ files\r
-\r
-antC0=./usecase/mu0_10mhz/12/ant_0.bin #CC0\r
-antC1=./usecase/mu0_10mhz/12/ant_1.bin #CC0\r
-antC2=./usecase/mu0_10mhz/12/ant_2.bin #CC0\r
-antC3=./usecase/mu0_10mhz/12/ant_3.bin #CC0\r
-antC4=./usecase/mu0_10mhz/12/ant_4.bin #CC1\r
-antC5=./usecase/mu0_10mhz/12/ant_5.bin #CC1\r
-antC6=./usecase/mu0_10mhz/12/ant_6.bin #CC1\r
-antC7=./usecase/mu0_10mhz/12/ant_7.bin #CC1\r
-antC8=./usecase/mu0_10mhz/12/ant_8.bin #CC2\r
-antC9=./usecase/mu0_10mhz/12/ant_9.bin #CC2\r
-antC10=./usecase/mu0_10mhz/12/ant_10.bin #CC2\r
-antC11=./usecase/mu0_10mhz/12/ant_11.bin #CC2\r
-antC12=./usecase/mu0_10mhz/12/ant_12.bin #CC3\r
-antC13=./usecase/mu0_10mhz/12/ant_13.bin #CC3\r
-antC14=./usecase/mu0_10mhz/12/ant_14.bin #CC3\r
-antC15=./usecase/mu0_10mhz/12/ant_15.bin #CC3\r
-antC16=./usecase/mu0_10mhz/12/ant_0.bin #CC4\r
-antC17=./usecase/mu0_10mhz/12/ant_1.bin #CC4\r
-antC18=./usecase/mu0_10mhz/12/ant_2.bin #CC4\r
-antC19=./usecase/mu0_10mhz/12/ant_3.bin #CC4\r
-antC20=./usecase/mu0_10mhz/12/ant_4.bin #CC5\r
-antC21=./usecase/mu0_10mhz/12/ant_5.bin #CC5\r
-antC22=./usecase/mu0_10mhz/12/ant_6.bin #CC5\r
-antC23=./usecase/mu0_10mhz/12/ant_7.bin #CC5\r
-antC24=./usecase/mu0_10mhz/12/ant_8.bin #CC6\r
-antC25=./usecase/mu0_10mhz/12/ant_9.bin #CC6\r
-antC26=./usecase/mu0_10mhz/12/ant_10.bin #CC6\r
-antC27=./usecase/mu0_10mhz/12/ant_11.bin #CC6\r
-antC28=./usecase/mu0_10mhz/12/ant_12.bin #CC7\r
-antC29=./usecase/mu0_10mhz/12/ant_13.bin #CC7\r
-antC30=./usecase/mu0_10mhz/12/ant_14.bin #CC7\r
-antC31=./usecase/mu0_10mhz/12/ant_15.bin #CC7\r
-antC32=./usecase/mu0_10mhz/12/ant_0.bin #CC8\r
-antC33=./usecase/mu0_10mhz/12/ant_1.bin #CC8\r
-antC34=./usecase/mu0_10mhz/12/ant_2.bin #CC8\r
-antC35=./usecase/mu0_10mhz/12/ant_3.bin #CC8\r
-antC36=./usecase/mu0_10mhz/12/ant_4.bin #CC9\r
-antC37=./usecase/mu0_10mhz/12/ant_5.bin #CC9\r
-antC38=./usecase/mu0_10mhz/12/ant_6.bin #CC9\r
-antC39=./usecase/mu0_10mhz/12/ant_7.bin #CC9\r
-antC40=./usecase/mu0_10mhz/12/ant_8.bin #CC10\r
-antC41=./usecase/mu0_10mhz/12/ant_9.bin #CC10\r
-antC42=./usecase/mu0_10mhz/12/ant_10.bin #CC10\r
-antC43=./usecase/mu0_10mhz/12/ant_11.bin #CC10\r
-antC44=./usecase/mu0_10mhz/12/ant_12.bin #CC11\r
-antC45=./usecase/mu0_10mhz/12/ant_13.bin #CC11\r
-antC46=./usecase/mu0_10mhz/12/ant_14.bin #CC11\r
-antC47=./usecase/mu0_10mhz/12/ant_15.bin #CC11\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index\r
-\r
-antPrachC0=./usecase/mu0_10mhz/12/ant_0.bin\r
-antPrachC1=./usecase/mu0_10mhz/12/ant_1.bin\r
-antPrachC2=./usecase/mu0_10mhz/12/ant_2.bin\r
-antPrachC3=./usecase/mu0_10mhz/12/ant_3.bin\r
-antPrachC4=./usecase/mu0_10mhz/12/ant_4.bin\r
-antPrachC5=./usecase/mu0_10mhz/12/ant_5.bin\r
-antPrachC6=./usecase/mu0_10mhz/12/ant_6.bin\r
-antPrachC7=./usecase/mu0_10mhz/12/ant_7.bin\r
-antPrachC8=./usecase/mu0_10mhz/12/ant_8.bin\r
-antPrachC9=./usecase/mu0_10mhz/12/ant_9.bin\r
-antPrachC10=./usecase/mu0_10mhz/12/ant_10.bin\r
-antPrachC11=./usecase/mu0_10mhz/12/ant_11.bin\r
-antPrachC12=./usecase/mu0_10mhz/12/ant_12.bin\r
-antPrachC13=./usecase/mu0_10mhz/12/ant_13.bin\r
-antPrachC14=./usecase/mu0_10mhz/12/ant_14.bin\r
-antPrachC15=./usecase/mu0_10mhz/12/ant_15.bin\r
-antPrachC16=./usecase/mu0_10mhz/12/ant_0.bin\r
-antPrachC17=./usecase/mu0_10mhz/12/ant_1.bin\r
-antPrachC18=./usecase/mu0_10mhz/12/ant_2.bin\r
-antPrachC19=./usecase/mu0_10mhz/12/ant_3.bin\r
-antPrachC20=./usecase/mu0_10mhz/12/ant_4.bin\r
-antPrachC21=./usecase/mu0_10mhz/12/ant_5.bin\r
-antPrachC22=./usecase/mu0_10mhz/12/ant_6.bin\r
-antPrachC23=./usecase/mu0_10mhz/12/ant_7.bin\r
-antPrachC24=./usecase/mu0_10mhz/12/ant_8.bin\r
-antPrachC25=./usecase/mu0_10mhz/12/ant_9.bin\r
-antPrachC26=./usecase/mu0_10mhz/12/ant_10.bin\r
-antPrachC27=./usecase/mu0_10mhz/12/ant_11.bin\r
-antPrachC28=./usecase/mu0_10mhz/12/ant_12.bin\r
-antPrachC29=./usecase/mu0_10mhz/12/ant_13.bin\r
-antPrachC30=./usecase/mu0_10mhz/12/ant_14.bin\r
-antPrachC31=./usecase/mu0_10mhz/12/ant_15.bin\r
-antPrachC32=./usecase/mu0_10mhz/12/ant_0.bin\r
-antPrachC33=./usecase/mu0_10mhz/12/ant_1.bin\r
-antPrachC34=./usecase/mu0_10mhz/12/ant_2.bin\r
-antPrachC35=./usecase/mu0_10mhz/12/ant_3.bin\r
-antPrachC36=./usecase/mu0_10mhz/12/ant_4.bin\r
-antPrachC37=./usecase/mu0_10mhz/12/ant_5.bin\r
-antPrachC38=./usecase/mu0_10mhz/12/ant_6.bin\r
-antPrachC39=./usecase/mu0_10mhz/12/ant_7.bin\r
-antPrachC40=./usecase/mu0_10mhz/12/ant_8.bin\r
-antPrachC41=./usecase/mu0_10mhz/12/ant_9.bin\r
-antPrachC42=./usecase/mu0_10mhz/12/ant_10.bin\r
-antPrachC43=./usecase/mu0_10mhz/12/ant_11.bin\r
-antPrachC44=./usecase/mu0_10mhz/12/ant_12.bin\r
-antPrachC45=./usecase/mu0_10mhz/12/ant_13.bin\r
-antPrachC46=./usecase/mu0_10mhz/12/ant_14.bin\r
-antPrachC47=./usecase/mu0_10mhz/12/ant_15.bin\r
-\r
-\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-c_plane_vlan_tag=1 #VLAN Tag used for C-Plane\r
-u_plane_vlan_tag=2 #VLAN Tag used for U-Plane\r
-\r
-##RU Settings\r
-Tadv_cp_dl=25 #in us TODO: update per RU implementation\r
- #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=400 #in us\r
-T2a_max_cp_dl=1120 #in us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=400 #in us\r
-T2a_max_cp_ul=1120 #in us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=200 # in us\r
-T2a_max_up=1120 # in us\r
-\r
-#Transmission Window\r
-Ta3_min=160 #in us\r
-Ta3_max=256 #in us\r
-\r
-###########################################################\r
-##lls-CU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=560\r
-T1a_max_cp_dl=800\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=480\r
-T1a_max_cp_ul=560\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=280\r
-T1a_max_up=400\r
-\r
-#Reception Window\r
-Ta4_min=0\r
-Ta4_max=360\r
-###########################################################\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+
+# This is simple configuration file. Use '#' sign for comments
+appMode=1 # lls-CU(0) | RU(1)
+xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)
+ccNum=12 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)
+antNum=4 # Number of Antennas per CC (default: 4)
+
+##Numerology
+mu=0 #15Khz Sub Carrier Spacing
+ttiPeriod=1000 # in us TTI period (15Khz default 1000us)
+nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=1024
+nULFftSize=1024
+
+nFrameDuplexType=0 # 0 - FDD 1 - TDD
+nTddPeriod=0 #TDD priod e.g. DDDS 4
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
+llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF
+#llsCUMac=3c:fd:fe:a8:e0:70 #lls-CU PF for tcpdump
+ruMac=00:11:22:33:44:55 #RU VF for RU app
+
+numSlots=40 #number of slots per IQ files
+
+antC0=./usecase/mu0_10mhz/12/ant_0.bin #CC0
+antC1=./usecase/mu0_10mhz/12/ant_1.bin #CC0
+antC2=./usecase/mu0_10mhz/12/ant_2.bin #CC0
+antC3=./usecase/mu0_10mhz/12/ant_3.bin #CC0
+antC4=./usecase/mu0_10mhz/12/ant_4.bin #CC1
+antC5=./usecase/mu0_10mhz/12/ant_5.bin #CC1
+antC6=./usecase/mu0_10mhz/12/ant_6.bin #CC1
+antC7=./usecase/mu0_10mhz/12/ant_7.bin #CC1
+antC8=./usecase/mu0_10mhz/12/ant_8.bin #CC2
+antC9=./usecase/mu0_10mhz/12/ant_9.bin #CC2
+antC10=./usecase/mu0_10mhz/12/ant_10.bin #CC2
+antC11=./usecase/mu0_10mhz/12/ant_11.bin #CC2
+antC12=./usecase/mu0_10mhz/12/ant_12.bin #CC3
+antC13=./usecase/mu0_10mhz/12/ant_13.bin #CC3
+antC14=./usecase/mu0_10mhz/12/ant_14.bin #CC3
+antC15=./usecase/mu0_10mhz/12/ant_15.bin #CC3
+antC16=./usecase/mu0_10mhz/12/ant_0.bin #CC4
+antC17=./usecase/mu0_10mhz/12/ant_1.bin #CC4
+antC18=./usecase/mu0_10mhz/12/ant_2.bin #CC4
+antC19=./usecase/mu0_10mhz/12/ant_3.bin #CC4
+antC20=./usecase/mu0_10mhz/12/ant_4.bin #CC5
+antC21=./usecase/mu0_10mhz/12/ant_5.bin #CC5
+antC22=./usecase/mu0_10mhz/12/ant_6.bin #CC5
+antC23=./usecase/mu0_10mhz/12/ant_7.bin #CC5
+antC24=./usecase/mu0_10mhz/12/ant_8.bin #CC6
+antC25=./usecase/mu0_10mhz/12/ant_9.bin #CC6
+antC26=./usecase/mu0_10mhz/12/ant_10.bin #CC6
+antC27=./usecase/mu0_10mhz/12/ant_11.bin #CC6
+antC28=./usecase/mu0_10mhz/12/ant_12.bin #CC7
+antC29=./usecase/mu0_10mhz/12/ant_13.bin #CC7
+antC30=./usecase/mu0_10mhz/12/ant_14.bin #CC7
+antC31=./usecase/mu0_10mhz/12/ant_15.bin #CC7
+antC32=./usecase/mu0_10mhz/12/ant_0.bin #CC8
+antC33=./usecase/mu0_10mhz/12/ant_1.bin #CC8
+antC34=./usecase/mu0_10mhz/12/ant_2.bin #CC8
+antC35=./usecase/mu0_10mhz/12/ant_3.bin #CC8
+antC36=./usecase/mu0_10mhz/12/ant_4.bin #CC9
+antC37=./usecase/mu0_10mhz/12/ant_5.bin #CC9
+antC38=./usecase/mu0_10mhz/12/ant_6.bin #CC9
+antC39=./usecase/mu0_10mhz/12/ant_7.bin #CC9
+antC40=./usecase/mu0_10mhz/12/ant_8.bin #CC10
+antC41=./usecase/mu0_10mhz/12/ant_9.bin #CC10
+antC42=./usecase/mu0_10mhz/12/ant_10.bin #CC10
+antC43=./usecase/mu0_10mhz/12/ant_11.bin #CC10
+antC44=./usecase/mu0_10mhz/12/ant_12.bin #CC11
+antC45=./usecase/mu0_10mhz/12/ant_13.bin #CC11
+antC46=./usecase/mu0_10mhz/12/ant_14.bin #CC11
+antC47=./usecase/mu0_10mhz/12/ant_15.bin #CC11
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index
+
+antPrachC0=./usecase/mu0_10mhz/12/ant_0.bin
+antPrachC1=./usecase/mu0_10mhz/12/ant_1.bin
+antPrachC2=./usecase/mu0_10mhz/12/ant_2.bin
+antPrachC3=./usecase/mu0_10mhz/12/ant_3.bin
+antPrachC4=./usecase/mu0_10mhz/12/ant_4.bin
+antPrachC5=./usecase/mu0_10mhz/12/ant_5.bin
+antPrachC6=./usecase/mu0_10mhz/12/ant_6.bin
+antPrachC7=./usecase/mu0_10mhz/12/ant_7.bin
+antPrachC8=./usecase/mu0_10mhz/12/ant_8.bin
+antPrachC9=./usecase/mu0_10mhz/12/ant_9.bin
+antPrachC10=./usecase/mu0_10mhz/12/ant_10.bin
+antPrachC11=./usecase/mu0_10mhz/12/ant_11.bin
+antPrachC12=./usecase/mu0_10mhz/12/ant_12.bin
+antPrachC13=./usecase/mu0_10mhz/12/ant_13.bin
+antPrachC14=./usecase/mu0_10mhz/12/ant_14.bin
+antPrachC15=./usecase/mu0_10mhz/12/ant_15.bin
+antPrachC16=./usecase/mu0_10mhz/12/ant_0.bin
+antPrachC17=./usecase/mu0_10mhz/12/ant_1.bin
+antPrachC18=./usecase/mu0_10mhz/12/ant_2.bin
+antPrachC19=./usecase/mu0_10mhz/12/ant_3.bin
+antPrachC20=./usecase/mu0_10mhz/12/ant_4.bin
+antPrachC21=./usecase/mu0_10mhz/12/ant_5.bin
+antPrachC22=./usecase/mu0_10mhz/12/ant_6.bin
+antPrachC23=./usecase/mu0_10mhz/12/ant_7.bin
+antPrachC24=./usecase/mu0_10mhz/12/ant_8.bin
+antPrachC25=./usecase/mu0_10mhz/12/ant_9.bin
+antPrachC26=./usecase/mu0_10mhz/12/ant_10.bin
+antPrachC27=./usecase/mu0_10mhz/12/ant_11.bin
+antPrachC28=./usecase/mu0_10mhz/12/ant_12.bin
+antPrachC29=./usecase/mu0_10mhz/12/ant_13.bin
+antPrachC30=./usecase/mu0_10mhz/12/ant_14.bin
+antPrachC31=./usecase/mu0_10mhz/12/ant_15.bin
+antPrachC32=./usecase/mu0_10mhz/12/ant_0.bin
+antPrachC33=./usecase/mu0_10mhz/12/ant_1.bin
+antPrachC34=./usecase/mu0_10mhz/12/ant_2.bin
+antPrachC35=./usecase/mu0_10mhz/12/ant_3.bin
+antPrachC36=./usecase/mu0_10mhz/12/ant_4.bin
+antPrachC37=./usecase/mu0_10mhz/12/ant_5.bin
+antPrachC38=./usecase/mu0_10mhz/12/ant_6.bin
+antPrachC39=./usecase/mu0_10mhz/12/ant_7.bin
+antPrachC40=./usecase/mu0_10mhz/12/ant_8.bin
+antPrachC41=./usecase/mu0_10mhz/12/ant_9.bin
+antPrachC42=./usecase/mu0_10mhz/12/ant_10.bin
+antPrachC43=./usecase/mu0_10mhz/12/ant_11.bin
+antPrachC44=./usecase/mu0_10mhz/12/ant_12.bin
+antPrachC45=./usecase/mu0_10mhz/12/ant_13.bin
+antPrachC46=./usecase/mu0_10mhz/12/ant_14.bin
+antPrachC47=./usecase/mu0_10mhz/12/ant_15.bin
+
+
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+c_plane_vlan_tag=1 #VLAN Tag used for C-Plane
+u_plane_vlan_tag=2 #VLAN Tag used for U-Plane
+
+##RU Settings
+Tadv_cp_dl=25 #in us TODO: update per RU implementation
+ #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+
+#Reception Window C-plane DL
+T2a_min_cp_dl=400 #in us
+T2a_max_cp_dl=1120 #in us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=400 #in us
+T2a_max_cp_ul=1120 #in us
+
+#Reception Window U-plane
+T2a_min_up=200 # in us
+T2a_max_up=1120 # in us
+
+#Transmission Window
+Ta3_min=160 #in us
+Ta3_max=256 #in us
+
+###########################################################
+##lls-CU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=560
+T1a_max_cp_dl=800
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=480
+T1a_max_cp_ul=560
+
+#U-plane
+##Transmission Window
+T1a_min_up=280
+T1a_max_up=400
+
+#Reception Window
+Ta4_min=0
+Ta4_max=360
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # lls-CU(0) | RU(1)\r
-xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)\r
-antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-\r
-##Numerology\r
-mu=0 #15Khz Sub Carrier Spacing\r
-ttiPeriod=1000 # in us TTI period (15Khz default 1000us)\r
-nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=1024\r
-nULFftSize=1024\r
-\r
-nFrameDuplexType=0 # 0 - FDD 1 - TDD\r
-nTddPeriod=0 #TDD priod e.g. DDDS 4\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # lls-CU(0) | RU(1)
+xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)
+antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+
+##Numerology
+mu=0 #15Khz Sub Carrier Spacing
+ttiPeriod=1000 # in us TTI period (15Khz default 1000us)
+nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=1024
+nULFftSize=1024
+
+nFrameDuplexType=0 # 0 - FDD 1 - TDD
+nTddPeriod=0 #TDD priod e.g. DDDS 4
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=5
systemCore=5
pktProcCore=5
pktAuxCore=5
timingCore=6
-llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF\r
-ruMac=00:11:22:33:44:55 #RU VF for RU app\r
-\r
-numSlots=40 #number of slots per IQ files\r
-\r
-antC0=./usecase/mu0_10mhz/ant_0.bin #CC0 \r
-antC1=./usecase/mu0_10mhz/ant_1.bin #CC0 \r
-antC2=./usecase/mu0_10mhz/ant_2.bin #CC0 \r
-antC3=./usecase/mu0_10mhz/ant_3.bin #CC0 \r
-antC4=./usecase/mu0_10mhz/ant_4.bin #CC1 \r
-antC5=./usecase/mu0_10mhz/ant_5.bin #CC1 \r
-antC6=./usecase/mu0_10mhz/ant_6.bin #CC1 \r
-antC7=./usecase/mu0_10mhz/ant_7.bin #CC1 \r
-antC8=./usecase/mu0_10mhz/ant_8.bin #CC2 \r
-antC9=./usecase/mu0_10mhz/ant_9.bin #CC2 \r
-antC10=./usecase/mu0_10mhz/ant_10.bin #CC2 \r
-antC11=./usecase/mu0_10mhz/ant_11.bin #CC2 \r
-antC12=./usecase/mu0_10mhz/ant_12.bin #CC3 \r
-antC13=./usecase/mu0_10mhz/ant_13.bin #CC3 \r
-antC14=./usecase/mu0_10mhz/ant_14.bin #CC3 \r
-antC15=./usecase/mu0_10mhz/ant_15.bin #CC3 \r
-antC16=./usecase/mu0_10mhz/ant_0.bin #CC4 \r
-antC17=./usecase/mu0_10mhz/ant_1.bin #CC4 \r
-antC18=./usecase/mu0_10mhz/ant_2.bin #CC4 \r
-antC19=./usecase/mu0_10mhz/ant_3.bin #CC4 \r
-antC20=./usecase/mu0_10mhz/ant_4.bin #CC5 \r
-antC21=./usecase/mu0_10mhz/ant_5.bin #CC5 \r
-antC22=./usecase/mu0_10mhz/ant_6.bin #CC5 \r
-antC23=./usecase/mu0_10mhz/ant_7.bin #CC5 \r
-antC24=./usecase/mu0_10mhz/ant_8.bin #CC6 \r
-antC25=./usecase/mu0_10mhz/ant_9.bin #CC6 \r
-antC26=./usecase/mu0_10mhz/ant_10.bin #CC6 \r
-antC27=./usecase/mu0_10mhz/ant_11.bin #CC6 \r
-antC28=./usecase/mu0_10mhz/ant_12.bin #CC7 \r
-antC29=./usecase/mu0_10mhz/ant_13.bin #CC7 \r
-antC30=./usecase/mu0_10mhz/ant_14.bin #CC7 \r
-antC31=./usecase/mu0_10mhz/ant_15.bin #CC7 \r
-antC32=./usecase/mu0_10mhz/ant_0.bin #CC8 \r
-antC33=./usecase/mu0_10mhz/ant_1.bin #CC8 \r
-antC34=./usecase/mu0_10mhz/ant_2.bin #CC8 \r
-antC35=./usecase/mu0_10mhz/ant_3.bin #CC8 \r
-antC36=./usecase/mu0_10mhz/ant_4.bin #CC9 \r
-antC37=./usecase/mu0_10mhz/ant_5.bin #CC9 \r
-antC38=./usecase/mu0_10mhz/ant_6.bin #CC9 \r
-antC39=./usecase/mu0_10mhz/ant_7.bin #CC9 \r
-antC40=./usecase/mu0_10mhz/ant_8.bin #CC10 \r
-antC41=./usecase/mu0_10mhz/ant_9.bin #CC10 \r
-antC42=./usecase/mu0_10mhz/ant_10.bin #CC10 \r
-antC43=./usecase/mu0_10mhz/ant_11.bin #CC10 \r
-antC44=./usecase/mu0_10mhz/ant_12.bin #CC11 \r
-antC45=./usecase/mu0_10mhz/ant_13.bin #CC11 \r
-antC46=./usecase/mu0_10mhz/ant_14.bin #CC11 \r
-antC47=./usecase/mu0_10mhz/ant_15.bin #CC11 \r
-\r
-rachEanble=1 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-c_plane_vlan_tag=1 #VLAN Tag used for C-Plane\r
-u_plane_vlan_tag=2 #VLAN Tag used for U-Plane\r
-\r
-##RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 #in us TODO: update per RU implementation\r
- #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=400 #in us \r
-T2a_max_cp_dl=1120 #in us \r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=400 #in us \r
-T2a_max_cp_ul=1120 #in us \r
-\r
-#Reception Window U-plane\r
-T2a_min_up=200 # in us\r
-T2a_max_up=1120 # in us\r
-\r
-#Transmission Window\r
-Ta3_min=160 #in us\r
-Ta3_max=256 #in us\r
-\r
-###########################################################\r
-##lls-CU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=560\r
-T1a_max_cp_dl=800\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=480\r
-T1a_max_cp_ul=560\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=280\r
-T1a_max_up=400\r
-\r
-#Reception Window\r
-Ta4_min=0\r
-Ta4_max=360\r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF
+ruMac=00:11:22:33:44:55 #RU VF for RU app
+
+numSlots=40 #number of slots per IQ files
+
+antC0=./usecase/mu0_10mhz/ant_0.bin #CC0
+antC1=./usecase/mu0_10mhz/ant_1.bin #CC0
+antC2=./usecase/mu0_10mhz/ant_2.bin #CC0
+antC3=./usecase/mu0_10mhz/ant_3.bin #CC0
+antC4=./usecase/mu0_10mhz/ant_4.bin #CC1
+antC5=./usecase/mu0_10mhz/ant_5.bin #CC1
+antC6=./usecase/mu0_10mhz/ant_6.bin #CC1
+antC7=./usecase/mu0_10mhz/ant_7.bin #CC1
+antC8=./usecase/mu0_10mhz/ant_8.bin #CC2
+antC9=./usecase/mu0_10mhz/ant_9.bin #CC2
+antC10=./usecase/mu0_10mhz/ant_10.bin #CC2
+antC11=./usecase/mu0_10mhz/ant_11.bin #CC2
+antC12=./usecase/mu0_10mhz/ant_12.bin #CC3
+antC13=./usecase/mu0_10mhz/ant_13.bin #CC3
+antC14=./usecase/mu0_10mhz/ant_14.bin #CC3
+antC15=./usecase/mu0_10mhz/ant_15.bin #CC3
+antC16=./usecase/mu0_10mhz/ant_0.bin #CC4
+antC17=./usecase/mu0_10mhz/ant_1.bin #CC4
+antC18=./usecase/mu0_10mhz/ant_2.bin #CC4
+antC19=./usecase/mu0_10mhz/ant_3.bin #CC4
+antC20=./usecase/mu0_10mhz/ant_4.bin #CC5
+antC21=./usecase/mu0_10mhz/ant_5.bin #CC5
+antC22=./usecase/mu0_10mhz/ant_6.bin #CC5
+antC23=./usecase/mu0_10mhz/ant_7.bin #CC5
+antC24=./usecase/mu0_10mhz/ant_8.bin #CC6
+antC25=./usecase/mu0_10mhz/ant_9.bin #CC6
+antC26=./usecase/mu0_10mhz/ant_10.bin #CC6
+antC27=./usecase/mu0_10mhz/ant_11.bin #CC6
+antC28=./usecase/mu0_10mhz/ant_12.bin #CC7
+antC29=./usecase/mu0_10mhz/ant_13.bin #CC7
+antC30=./usecase/mu0_10mhz/ant_14.bin #CC7
+antC31=./usecase/mu0_10mhz/ant_15.bin #CC7
+antC32=./usecase/mu0_10mhz/ant_0.bin #CC8
+antC33=./usecase/mu0_10mhz/ant_1.bin #CC8
+antC34=./usecase/mu0_10mhz/ant_2.bin #CC8
+antC35=./usecase/mu0_10mhz/ant_3.bin #CC8
+antC36=./usecase/mu0_10mhz/ant_4.bin #CC9
+antC37=./usecase/mu0_10mhz/ant_5.bin #CC9
+antC38=./usecase/mu0_10mhz/ant_6.bin #CC9
+antC39=./usecase/mu0_10mhz/ant_7.bin #CC9
+antC40=./usecase/mu0_10mhz/ant_8.bin #CC10
+antC41=./usecase/mu0_10mhz/ant_9.bin #CC10
+antC42=./usecase/mu0_10mhz/ant_10.bin #CC10
+antC43=./usecase/mu0_10mhz/ant_11.bin #CC10
+antC44=./usecase/mu0_10mhz/ant_12.bin #CC11
+antC45=./usecase/mu0_10mhz/ant_13.bin #CC11
+antC46=./usecase/mu0_10mhz/ant_14.bin #CC11
+antC47=./usecase/mu0_10mhz/ant_15.bin #CC11
+
+rachEanble=1 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+c_plane_vlan_tag=1 #VLAN Tag used for C-Plane
+u_plane_vlan_tag=2 #VLAN Tag used for U-Plane
+
+##RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 #in us TODO: update per RU implementation
+ #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+
+#Reception Window C-plane DL
+T2a_min_cp_dl=400 #in us
+T2a_max_cp_dl=1120 #in us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=400 #in us
+T2a_max_cp_ul=1120 #in us
+
+#Reception Window U-plane
+T2a_min_up=200 # in us
+T2a_max_up=1120 # in us
+
+#Transmission Window
+Ta3_min=160 #in us
+Ta3_max=256 #in us
+
+###########################################################
+##lls-CU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=560
+T1a_max_cp_dl=800
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=480
+T1a_max_cp_ul=560
+
+#U-plane
+##Transmission Window
+T1a_min_up=280
+T1a_max_up=400
+
+#Reception Window
+Ta4_min=0
+Ta4_max=360
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # O-DU(0) | O-RU(1)\r
-xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)\r
-antNum=4 # Number of Antennas per CC (default: 4)\r
-\r
-##Numerology\r
-mu=0 #15Khz Sub Carrier Spacing\r
-ttiPeriod=1000 # in us TTI period (15Khz default 1000us)\r
-nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=1024\r
-nULFftSize=1024\r
-\r
-nFrameDuplexType=0 # 0 - FDD 1 - TDD\r
-nTddPeriod=0 #TDD priod e.g. DDDS 4\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
+xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)
+antNum=4 # Number of Antennas per CC (default: 4)
+
+##Numerology
+mu=0 #15Khz Sub Carrier Spacing
+ttiPeriod=1000 # in us TTI period (15Khz default 1000us)
+nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=10 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=1024
+nULFftSize=1024
+
+nFrameDuplexType=0 # 0 - FDD 1 - TDD
+nTddPeriod=0 #TDD priod e.g. DDDS 4
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=10
systemCore=10
pktProcCore=10
pktAuxCore=10
timingCore=11
-llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF\r
-ruMac=00:11:22:33:44:55 #RU VF for RU app\r
-\r
-numSlots=40 #number of slots per IQ files\r
-\r
-antC0=./usecase/mu0_10mhz/ant_0.bin #CC0 \r
-antC1=./usecase/mu0_10mhz/ant_1.bin #CC0 \r
-antC2=./usecase/mu0_10mhz/ant_2.bin #CC0 \r
-antC3=./usecase/mu0_10mhz/ant_3.bin #CC0 \r
-antC4=./usecase/mu0_10mhz/ant_4.bin #CC1 \r
-antC5=./usecase/mu0_10mhz/ant_5.bin #CC1 \r
-antC6=./usecase/mu0_10mhz/ant_6.bin #CC1 \r
-antC7=./usecase/mu0_10mhz/ant_7.bin #CC1 \r
-antC8=./usecase/mu0_10mhz/ant_8.bin #CC2 \r
-antC9=./usecase/mu0_10mhz/ant_9.bin #CC2 \r
-antC10=./usecase/mu0_10mhz/ant_10.bin #CC2 \r
-antC11=./usecase/mu0_10mhz/ant_11.bin #CC2 \r
-antC12=./usecase/mu0_10mhz/ant_12.bin #CC3 \r
-antC13=./usecase/mu0_10mhz/ant_13.bin #CC3 \r
-antC14=./usecase/mu0_10mhz/ant_14.bin #CC3 \r
-antC15=./usecase/mu0_10mhz/ant_15.bin #CC3 \r
-antC16=./usecase/mu0_10mhz/ant_0.bin #CC4 \r
-antC17=./usecase/mu0_10mhz/ant_1.bin #CC4 \r
-antC18=./usecase/mu0_10mhz/ant_2.bin #CC4 \r
-antC19=./usecase/mu0_10mhz/ant_3.bin #CC4 \r
-antC20=./usecase/mu0_10mhz/ant_4.bin #CC5 \r
-antC21=./usecase/mu0_10mhz/ant_5.bin #CC5 \r
-antC22=./usecase/mu0_10mhz/ant_6.bin #CC5 \r
-antC23=./usecase/mu0_10mhz/ant_7.bin #CC5 \r
-antC24=./usecase/mu0_10mhz/ant_8.bin #CC6 \r
-antC25=./usecase/mu0_10mhz/ant_9.bin #CC6 \r
-antC26=./usecase/mu0_10mhz/ant_10.bin #CC6 \r
-antC27=./usecase/mu0_10mhz/ant_11.bin #CC6 \r
-antC28=./usecase/mu0_10mhz/ant_12.bin #CC7 \r
-antC29=./usecase/mu0_10mhz/ant_13.bin #CC7 \r
-antC30=./usecase/mu0_10mhz/ant_14.bin #CC7 \r
-antC31=./usecase/mu0_10mhz/ant_15.bin #CC7 \r
-antC32=./usecase/mu0_10mhz/ant_0.bin #CC8 \r
-antC33=./usecase/mu0_10mhz/ant_1.bin #CC8 \r
-antC34=./usecase/mu0_10mhz/ant_2.bin #CC8 \r
-antC35=./usecase/mu0_10mhz/ant_3.bin #CC8 \r
-antC36=./usecase/mu0_10mhz/ant_4.bin #CC9 \r
-antC37=./usecase/mu0_10mhz/ant_5.bin #CC9 \r
-antC38=./usecase/mu0_10mhz/ant_6.bin #CC9 \r
-antC39=./usecase/mu0_10mhz/ant_7.bin #CC9 \r
-antC40=./usecase/mu0_10mhz/ant_8.bin #CC10 \r
-antC41=./usecase/mu0_10mhz/ant_9.bin #CC10 \r
-antC42=./usecase/mu0_10mhz/ant_10.bin #CC10 \r
-antC43=./usecase/mu0_10mhz/ant_11.bin #CC10 \r
-antC44=./usecase/mu0_10mhz/ant_12.bin #CC11 \r
-antC45=./usecase/mu0_10mhz/ant_13.bin #CC11 \r
-antC46=./usecase/mu0_10mhz/ant_14.bin #CC11 \r
-antC47=./usecase/mu0_10mhz/ant_15.bin #CC11 \r
-\r
-rachEanble=1 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index\r
-\r
-antPrachC0=./usecase/mu0_10mhz/ant_0.bin\r
-antPrachC1=./usecase/mu0_10mhz/ant_1.bin\r
-antPrachC2=./usecase/mu0_10mhz/ant_2.bin\r
-antPrachC3=./usecase/mu0_10mhz/ant_3.bin\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-c_plane_vlan_tag=1 #VLAN Tag used for C-Plane\r
-u_plane_vlan_tag=2 #VLAN Tag used for U-Plane\r
-\r
-##RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-Tadv_cp_dl=25 #in us TODO: update per RU implementation\r
- #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=400 #in us \r
-T2a_max_cp_dl=1120 #in us \r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=400 #in us \r
-T2a_max_cp_ul=1120 #in us \r
-\r
-#Reception Window U-plane\r
-T2a_min_up=200 # in us\r
-T2a_max_up=1120 # in us\r
-\r
-#Transmission Window\r
-Ta3_min=160 #in us\r
-Ta3_max=256 #in us\r
-\r
-###########################################################\r
-##lls-CU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=560\r
-T1a_max_cp_dl=800\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=480\r
-T1a_max_cp_ul=560\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=280\r
-T1a_max_up=400\r
-\r
-#Reception Window\r
-Ta4_min=0\r
-Ta4_max=360\r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF
+ruMac=00:11:22:33:44:55 #RU VF for RU app
+
+numSlots=40 #number of slots per IQ files
+
+antC0=./usecase/mu0_10mhz/ant_0.bin #CC0
+antC1=./usecase/mu0_10mhz/ant_1.bin #CC0
+antC2=./usecase/mu0_10mhz/ant_2.bin #CC0
+antC3=./usecase/mu0_10mhz/ant_3.bin #CC0
+antC4=./usecase/mu0_10mhz/ant_4.bin #CC1
+antC5=./usecase/mu0_10mhz/ant_5.bin #CC1
+antC6=./usecase/mu0_10mhz/ant_6.bin #CC1
+antC7=./usecase/mu0_10mhz/ant_7.bin #CC1
+antC8=./usecase/mu0_10mhz/ant_8.bin #CC2
+antC9=./usecase/mu0_10mhz/ant_9.bin #CC2
+antC10=./usecase/mu0_10mhz/ant_10.bin #CC2
+antC11=./usecase/mu0_10mhz/ant_11.bin #CC2
+antC12=./usecase/mu0_10mhz/ant_12.bin #CC3
+antC13=./usecase/mu0_10mhz/ant_13.bin #CC3
+antC14=./usecase/mu0_10mhz/ant_14.bin #CC3
+antC15=./usecase/mu0_10mhz/ant_15.bin #CC3
+antC16=./usecase/mu0_10mhz/ant_0.bin #CC4
+antC17=./usecase/mu0_10mhz/ant_1.bin #CC4
+antC18=./usecase/mu0_10mhz/ant_2.bin #CC4
+antC19=./usecase/mu0_10mhz/ant_3.bin #CC4
+antC20=./usecase/mu0_10mhz/ant_4.bin #CC5
+antC21=./usecase/mu0_10mhz/ant_5.bin #CC5
+antC22=./usecase/mu0_10mhz/ant_6.bin #CC5
+antC23=./usecase/mu0_10mhz/ant_7.bin #CC5
+antC24=./usecase/mu0_10mhz/ant_8.bin #CC6
+antC25=./usecase/mu0_10mhz/ant_9.bin #CC6
+antC26=./usecase/mu0_10mhz/ant_10.bin #CC6
+antC27=./usecase/mu0_10mhz/ant_11.bin #CC6
+antC28=./usecase/mu0_10mhz/ant_12.bin #CC7
+antC29=./usecase/mu0_10mhz/ant_13.bin #CC7
+antC30=./usecase/mu0_10mhz/ant_14.bin #CC7
+antC31=./usecase/mu0_10mhz/ant_15.bin #CC7
+antC32=./usecase/mu0_10mhz/ant_0.bin #CC8
+antC33=./usecase/mu0_10mhz/ant_1.bin #CC8
+antC34=./usecase/mu0_10mhz/ant_2.bin #CC8
+antC35=./usecase/mu0_10mhz/ant_3.bin #CC8
+antC36=./usecase/mu0_10mhz/ant_4.bin #CC9
+antC37=./usecase/mu0_10mhz/ant_5.bin #CC9
+antC38=./usecase/mu0_10mhz/ant_6.bin #CC9
+antC39=./usecase/mu0_10mhz/ant_7.bin #CC9
+antC40=./usecase/mu0_10mhz/ant_8.bin #CC10
+antC41=./usecase/mu0_10mhz/ant_9.bin #CC10
+antC42=./usecase/mu0_10mhz/ant_10.bin #CC10
+antC43=./usecase/mu0_10mhz/ant_11.bin #CC10
+antC44=./usecase/mu0_10mhz/ant_12.bin #CC11
+antC45=./usecase/mu0_10mhz/ant_13.bin #CC11
+antC46=./usecase/mu0_10mhz/ant_14.bin #CC11
+antC47=./usecase/mu0_10mhz/ant_15.bin #CC11
+
+rachEanble=1 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index
+
+antPrachC0=./usecase/mu0_10mhz/ant_0.bin
+antPrachC1=./usecase/mu0_10mhz/ant_1.bin
+antPrachC2=./usecase/mu0_10mhz/ant_2.bin
+antPrachC3=./usecase/mu0_10mhz/ant_3.bin
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+c_plane_vlan_tag=1 #VLAN Tag used for C-Plane
+u_plane_vlan_tag=2 #VLAN Tag used for U-Plane
+
+##RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+Tadv_cp_dl=25 #in us TODO: update per RU implementation
+ #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+
+#Reception Window C-plane DL
+T2a_min_cp_dl=400 #in us
+T2a_max_cp_dl=1120 #in us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=400 #in us
+T2a_max_cp_ul=1120 #in us
+
+#Reception Window U-plane
+T2a_min_up=200 # in us
+T2a_max_up=1120 # in us
+
+#Transmission Window
+Ta3_min=160 #in us
+Ta3_max=256 #in us
+
+###########################################################
+##lls-CU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=560
+T1a_max_cp_dl=800
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=480
+T1a_max_cp_ul=560
+
+#U-plane
+##Transmission Window
+T1a_min_up=280
+T1a_max_up=400
+
+#Reception Window
+Ta4_min=0
+Ta4_max=360
+###########################################################
+
-#######################################################################\r
-#\r
-# <COPYRIGHT_TAG>\r
-#\r
-#######################################################################\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-appMode=0 # lls-CU(0) | RU(1)\r
-xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)\r
-ccNum=6 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)\r
-antNum=4 # Number of Antennas per CC (default: 4)\r
-\r
-##Numerology\r
-mu=0 #15Khz Sub Carrier Spacing\r
-ttiPeriod=1000 # in us TTI period (15Khz default 1000us)\r
-nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=2048\r
-nULFftSize=2048\r
-\r
-nFrameDuplexType=0 # 0 - FDD 1 - TDD\r
-nTddPeriod=0 #TDD priod e.g. DDDS 4\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single\r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#######################################################################
+#
+# <COPYRIGHT_TAG>
+#
+#######################################################################
+
+# This is simple configuration file. Use '#' sign for comments
+appMode=0 # lls-CU(0) | RU(1)
+xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)
+ccNum=6 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)
+antNum=4 # Number of Antennas per CC (default: 4)
+
+##Numerology
+mu=0 #15Khz Sub Carrier Spacing
+ttiPeriod=1000 # in us TTI period (15Khz default 1000us)
+nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=2048
+nULFftSize=2048
+
+nFrameDuplexType=0 # 0 - FDD 1 - TDD
+nTddPeriod=0 #TDD priod e.g. DDDS 4
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=5
systemCore=5
pktProcCore=5
pktAuxCore=5
timingCore=6
-\r
-llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF\r
-ruMac=00:11:22:33:44:55 #RU VF for RU app\r
-#ruMac=3c:fd:fe:9e:93:68 #RU PF for tcpdump\r
-\r
-numSlots=20 #number of slots per IQ files\r
-#fd 10Mhz 2\r
-#antC0=./usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-#antC1=./usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-#antC2=./usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-#antC3=./usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC0=./usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC1=./usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC2=./usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC3=./usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC4=./usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC5=./usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC6=./usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC7=./usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC8=./usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC9=./usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC10=./usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC11=./usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC12=./usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC13=./usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC14=./usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC15=./usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC16=./usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC17=./usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC18=./usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC19=./usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC20=./usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC21=./usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC22=./usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC23=./usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC24=./usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC25=./usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC26=./usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC27=./usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC28=./usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC29=./usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC30=./usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC31=./usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC32=./usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC33=./usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC34=./usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC35=./usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC36=./usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC37=./usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC38=./usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC39=./usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC40=./usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC41=./usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC42=./usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC43=./usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC44=./usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC45=./usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC46=./usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC47=./usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-\r
-#antC0=./usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-#antC1=./usecase/mu0_20mhz/12/ant_1.bin #CC0\r
-#antC2=./usecase/mu0_20mhz/12/ant_2.bin #CC0\r
-#antC3=./usecase/mu0_20mhz/12/ant_3.bin #CC0\r
-\r
-#antC0=./usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-#antC1=./usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-#antC2=./usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-#antC3=./usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-\r
-#antC4=./usecase/mu0_20mhz/12/ant_4.bin #CC1\r
-#antC5=./usecase/mu0_20mhz/12/ant_5.bin #CC1\r
-#antC6=./usecase/mu0_20mhz/12/ant_6.bin #CC1\r
-#antC7=./usecase/mu0_20mhz/12/ant_7.bin #CC1\r
-#antC8=./usecase/mu0_20mhz/12/ant_8.bin #CC2\r
-#antC9=./usecase/mu0_20mhz/12/ant_9.bin #CC2\r
-#antC10=./usecase/mu0_20mhz/12/ant_10.bin #CC2\r
-#antC11=./usecase/mu0_20mhz/12/ant_11.bin #CC2\r
-#antC12=./usecase/mu0_20mhz/12/ant_12.bin #CC3\r
-#antC13=./usecase/mu0_20mhz/12/ant_13.bin #CC3\r
-#antC14=./usecase/mu0_20mhz/12/ant_14.bin #CC3\r
-#antC15=./usecase/mu0_20mhz/12/ant_15.bin #CC3\r
-#antC16=./usecase/mu0_20mhz/12/ant_0.bin #CC4\r
-#antC17=./usecase/mu0_20mhz/12/ant_1.bin #CC4\r
-#antC18=./usecase/mu0_20mhz/12/ant_2.bin #CC4\r
-#antC19=./usecase/mu0_20mhz/12/ant_3.bin #CC4\r
-#antC20=./usecase/mu0_20mhz/12/ant_4.bin #CC5\r
-#antC21=./usecase/mu0_20mhz/12/ant_5.bin #CC5\r
-#antC22=./usecase/mu0_20mhz/12/ant_6.bin #CC5\r
-#antC23=./usecase/mu0_20mhz/12/ant_7.bin #CC5\r
-#antC24=./usecase/mu0_20mhz/12/ant_8.bin #CC6\r
-#antC25=./usecase/mu0_20mhz/12/ant_9.bin #CC6\r
-#antC26=./usecase/mu0_20mhz/12/ant_10.bin #CC6\r
-#antC27=./usecase/mu0_20mhz/12/ant_11.bin #CC6\r
-#antC28=./usecase/mu0_20mhz/12/ant_12.bin #CC7\r
-#antC29=./usecase/mu0_20mhz/12/ant_13.bin #CC7\r
-#antC30=./usecase/mu0_20mhz/12/ant_14.bin #CC7\r
-#antC31=./usecase/mu0_20mhz/12/ant_15.bin #CC7\r
-#antC32=./usecase/mu0_20mhz/12/ant_0.bin #CC8\r
-#antC33=./usecase/mu0_20mhz/12/ant_1.bin #CC8\r
-#antC34=./usecase/mu0_20mhz/12/ant_2.bin #CC8\r
-#antC35=./usecase/mu0_20mhz/12/ant_3.bin #CC8\r
-#antC36=./usecase/mu0_20mhz/12/ant_4.bin #CC9\r
-#antC37=./usecase/mu0_20mhz/12/ant_5.bin #CC9\r
-#antC38=./usecase/mu0_20mhz/12/ant_6.bin #CC9\r
-#antC39=./usecase/mu0_20mhz/12/ant_7.bin #CC9\r
-#antC40=./usecase/mu0_20mhz/12/ant_8.bin #CC10\r
-#antC41=./usecase/mu0_20mhz/12/ant_9.bin #CC10\r
-#antC42=./usecase/mu0_20mhz/12/ant_10.bin #CC10\r
-#antC43=./usecase/mu0_20mhz/12/ant_11.bin #CC10\r
-#antC44=./usecase/mu0_20mhz/12/ant_12.bin #CC11\r
-#antC45=./usecase/mu0_20mhz/12/ant_13.bin #CC11\r
-#antC46=./usecase/mu0_20mhz/12/ant_14.bin #CC11\r
-#antC47=./usecase/mu0_20mhz/12/ant_15.bin #CC11\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-\r
-##Debug\r
-debugStop=0 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-c_plane_vlan_tag=1 #VLAN Tag used for C-Plane\r
-u_plane_vlan_tag=2 #VLAN Tag used for U-Plane\r
-\r
-##RU Settings\r
-Tadv_cp_dl=25 #in us TODO: update per RU implementation\r
- #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=400 #in us\r
-T2a_max_cp_dl=1120 #in us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=400 #in us\r
-T2a_max_cp_ul=1120 #in us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=200 # in us\r
-T2a_max_up=1120 # in us\r
-\r
-#Transmission Window\r
-Ta3_min=160 #in us\r
-Ta3_max=256 #in us\r
-\r
-###########################################################\r
-##lls-CU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=560\r
-T1a_max_cp_dl=800\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=480\r
-T1a_max_cp_ul=560\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=280\r
-T1a_max_up=400\r
-\r
-#Reception Window\r
-Ta4_min=0\r
-Ta4_max=360\r
-###########################################################\r
-\r
+
+llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF
+ruMac=00:11:22:33:44:55 #RU VF for RU app
+#ruMac=3c:fd:fe:9e:93:68 #RU PF for tcpdump
+
+numSlots=20 #number of slots per IQ files
+#fd 10Mhz 2
+#antC0=./usecase/mu0_20mhz/12/uliq0.bin #CC0
+#antC1=./usecase/mu0_20mhz/12/uliq1.bin #CC0
+#antC2=./usecase/mu0_20mhz/12/uliq2.bin #CC0
+#antC3=./usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC0=./usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC1=./usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC2=./usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC3=./usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC4=./usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC5=./usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC6=./usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC7=./usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC8=./usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC9=./usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC10=./usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC11=./usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC12=./usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC13=./usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC14=./usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC15=./usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC16=./usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC17=./usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC18=./usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC19=./usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC20=./usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC21=./usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC22=./usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC23=./usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC24=./usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC25=./usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC26=./usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC27=./usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC28=./usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC29=./usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC30=./usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC31=./usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC32=./usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC33=./usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC34=./usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC35=./usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC36=./usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC37=./usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC38=./usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC39=./usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC40=./usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC41=./usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC42=./usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC43=./usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC44=./usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC45=./usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC46=./usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC47=./usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+
+#antC0=./usecase/mu0_20mhz/12/ant_0.bin #CC0
+#antC1=./usecase/mu0_20mhz/12/ant_1.bin #CC0
+#antC2=./usecase/mu0_20mhz/12/ant_2.bin #CC0
+#antC3=./usecase/mu0_20mhz/12/ant_3.bin #CC0
+
+#antC0=./usecase/mu0_20mhz/12/ant_0.bin #CC0
+#antC1=./usecase/mu0_20mhz/12/ant_0.bin #CC0
+#antC2=./usecase/mu0_20mhz/12/ant_0.bin #CC0
+#antC3=./usecase/mu0_20mhz/12/ant_0.bin #CC0
+
+#antC4=./usecase/mu0_20mhz/12/ant_4.bin #CC1
+#antC5=./usecase/mu0_20mhz/12/ant_5.bin #CC1
+#antC6=./usecase/mu0_20mhz/12/ant_6.bin #CC1
+#antC7=./usecase/mu0_20mhz/12/ant_7.bin #CC1
+#antC8=./usecase/mu0_20mhz/12/ant_8.bin #CC2
+#antC9=./usecase/mu0_20mhz/12/ant_9.bin #CC2
+#antC10=./usecase/mu0_20mhz/12/ant_10.bin #CC2
+#antC11=./usecase/mu0_20mhz/12/ant_11.bin #CC2
+#antC12=./usecase/mu0_20mhz/12/ant_12.bin #CC3
+#antC13=./usecase/mu0_20mhz/12/ant_13.bin #CC3
+#antC14=./usecase/mu0_20mhz/12/ant_14.bin #CC3
+#antC15=./usecase/mu0_20mhz/12/ant_15.bin #CC3
+#antC16=./usecase/mu0_20mhz/12/ant_0.bin #CC4
+#antC17=./usecase/mu0_20mhz/12/ant_1.bin #CC4
+#antC18=./usecase/mu0_20mhz/12/ant_2.bin #CC4
+#antC19=./usecase/mu0_20mhz/12/ant_3.bin #CC4
+#antC20=./usecase/mu0_20mhz/12/ant_4.bin #CC5
+#antC21=./usecase/mu0_20mhz/12/ant_5.bin #CC5
+#antC22=./usecase/mu0_20mhz/12/ant_6.bin #CC5
+#antC23=./usecase/mu0_20mhz/12/ant_7.bin #CC5
+#antC24=./usecase/mu0_20mhz/12/ant_8.bin #CC6
+#antC25=./usecase/mu0_20mhz/12/ant_9.bin #CC6
+#antC26=./usecase/mu0_20mhz/12/ant_10.bin #CC6
+#antC27=./usecase/mu0_20mhz/12/ant_11.bin #CC6
+#antC28=./usecase/mu0_20mhz/12/ant_12.bin #CC7
+#antC29=./usecase/mu0_20mhz/12/ant_13.bin #CC7
+#antC30=./usecase/mu0_20mhz/12/ant_14.bin #CC7
+#antC31=./usecase/mu0_20mhz/12/ant_15.bin #CC7
+#antC32=./usecase/mu0_20mhz/12/ant_0.bin #CC8
+#antC33=./usecase/mu0_20mhz/12/ant_1.bin #CC8
+#antC34=./usecase/mu0_20mhz/12/ant_2.bin #CC8
+#antC35=./usecase/mu0_20mhz/12/ant_3.bin #CC8
+#antC36=./usecase/mu0_20mhz/12/ant_4.bin #CC9
+#antC37=./usecase/mu0_20mhz/12/ant_5.bin #CC9
+#antC38=./usecase/mu0_20mhz/12/ant_6.bin #CC9
+#antC39=./usecase/mu0_20mhz/12/ant_7.bin #CC9
+#antC40=./usecase/mu0_20mhz/12/ant_8.bin #CC10
+#antC41=./usecase/mu0_20mhz/12/ant_9.bin #CC10
+#antC42=./usecase/mu0_20mhz/12/ant_10.bin #CC10
+#antC43=./usecase/mu0_20mhz/12/ant_11.bin #CC10
+#antC44=./usecase/mu0_20mhz/12/ant_12.bin #CC11
+#antC45=./usecase/mu0_20mhz/12/ant_13.bin #CC11
+#antC46=./usecase/mu0_20mhz/12/ant_14.bin #CC11
+#antC47=./usecase/mu0_20mhz/12/ant_15.bin #CC11
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+
+##Debug
+debugStop=0 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+c_plane_vlan_tag=1 #VLAN Tag used for C-Plane
+u_plane_vlan_tag=2 #VLAN Tag used for U-Plane
+
+##RU Settings
+Tadv_cp_dl=25 #in us TODO: update per RU implementation
+ #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+
+#Reception Window C-plane DL
+T2a_min_cp_dl=400 #in us
+T2a_max_cp_dl=1120 #in us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=400 #in us
+T2a_max_cp_ul=1120 #in us
+
+#Reception Window U-plane
+T2a_min_up=200 # in us
+T2a_max_up=1120 # in us
+
+#Transmission Window
+Ta3_min=160 #in us
+Ta3_max=256 #in us
+
+###########################################################
+##lls-CU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=560
+T1a_max_cp_dl=800
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=480
+T1a_max_cp_ul=560
+
+#U-plane
+##Transmission Window
+T1a_min_up=280
+T1a_max_up=400
+
+#Reception Window
+Ta4_min=0
+Ta4_max=360
+###########################################################
+
-#######################################################################\r
-#\r
-# <COPYRIGHT_TAG>\r
-#\r
-#######################################################################\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # lls-CU(0) | RU(1)\r
-xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)\r
-ccNum=6 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)\r
-antNum=4 # Number of Antennas per CC (default: 4)\r
-\r
-##Numerology\r
-mu=0 #15Khz Sub Carrier Spacing\r
-ttiPeriod=1000 # in us TTI period (15Khz default 1000us)\r
-nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=2048\r
-nULFftSize=2048\r
-\r
-nFrameDuplexType=0 # 0 - FDD 1 - TDD\r
-nTddPeriod=0 #TDD priod e.g. DDDS 4\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single\r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
-ioCore=5\r
-\r
-llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF\r
-ruMac=00:11:22:33:44:55 #RU VF for RU app\r
-#ruMac=3c:fd:fe:9e:93:68 #RU PF for tcpdump\r
-\r
-numSlots=20 #number of slots per IQ files\r
-#fd 10Mhz 2\r
-#antC0=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-#antC1=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-#antC2=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-#antC3=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC0=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC1=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC2=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC3=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC4=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC5=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC6=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC7=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC8=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC9=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC10=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC11=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC12=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC13=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC14=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC15=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC16=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC17=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC18=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC19=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC20=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC21=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC22=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC23=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC24=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC25=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC26=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC27=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC28=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC29=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC30=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC31=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC32=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC33=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC34=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC35=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC36=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC37=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC38=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC39=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC40=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC41=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC42=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC43=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC44=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC45=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC46=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC47=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-\r
-#antC0=../usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-#antC1=../usecase/mu0_20mhz/12/ant_1.bin #CC0\r
-#antC2=../usecase/mu0_20mhz/12/ant_2.bin #CC0\r
-#antC3=../usecase/mu0_20mhz/12/ant_3.bin #CC0\r
-\r
-#antC0=../usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-#antC1=../usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-#antC2=../usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-#antC3=../usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-\r
-#antC4=../usecase/mu0_20mhz/12/ant_4.bin #CC1\r
-#antC5=../usecase/mu0_20mhz/12/ant_5.bin #CC1\r
-#antC6=../usecase/mu0_20mhz/12/ant_6.bin #CC1\r
-#antC7=../usecase/mu0_20mhz/12/ant_7.bin #CC1\r
-#antC8=../usecase/mu0_20mhz/12/ant_8.bin #CC2\r
-#antC9=../usecase/mu0_20mhz/12/ant_9.bin #CC2\r
-#antC10=../usecase/mu0_20mhz/12/ant_10.bin #CC2\r
-#antC11=../usecase/mu0_20mhz/12/ant_11.bin #CC2\r
-#antC12=../usecase/mu0_20mhz/12/ant_12.bin #CC3\r
-#antC13=../usecase/mu0_20mhz/12/ant_13.bin #CC3\r
-#antC14=../usecase/mu0_20mhz/12/ant_14.bin #CC3\r
-#antC15=../usecase/mu0_20mhz/12/ant_15.bin #CC3\r
-#antC16=../usecase/mu0_20mhz/12/ant_0.bin #CC4\r
-#antC17=../usecase/mu0_20mhz/12/ant_1.bin #CC4\r
-#antC18=../usecase/mu0_20mhz/12/ant_2.bin #CC4\r
-#antC19=../usecase/mu0_20mhz/12/ant_3.bin #CC4\r
-#antC20=../usecase/mu0_20mhz/12/ant_4.bin #CC5\r
-#antC21=../usecase/mu0_20mhz/12/ant_5.bin #CC5\r
-#antC22=../usecase/mu0_20mhz/12/ant_6.bin #CC5\r
-#antC23=../usecase/mu0_20mhz/12/ant_7.bin #CC5\r
-#antC24=../usecase/mu0_20mhz/12/ant_8.bin #CC6\r
-#antC25=../usecase/mu0_20mhz/12/ant_9.bin #CC6\r
-#antC26=../usecase/mu0_20mhz/12/ant_10.bin #CC6\r
-#antC27=../usecase/mu0_20mhz/12/ant_11.bin #CC6\r
-#antC28=../usecase/mu0_20mhz/12/ant_12.bin #CC7\r
-#antC29=../usecase/mu0_20mhz/12/ant_13.bin #CC7\r
-#antC30=../usecase/mu0_20mhz/12/ant_14.bin #CC7\r
-#antC31=../usecase/mu0_20mhz/12/ant_15.bin #CC7\r
-#antC32=../usecase/mu0_20mhz/12/ant_0.bin #CC8\r
-#antC33=../usecase/mu0_20mhz/12/ant_1.bin #CC8\r
-#antC34=../usecase/mu0_20mhz/12/ant_2.bin #CC8\r
-#antC35=../usecase/mu0_20mhz/12/ant_3.bin #CC8\r
-#antC36=../usecase/mu0_20mhz/12/ant_4.bin #CC9\r
-#antC37=../usecase/mu0_20mhz/12/ant_5.bin #CC9\r
-#antC38=../usecase/mu0_20mhz/12/ant_6.bin #CC9\r
-#antC39=../usecase/mu0_20mhz/12/ant_7.bin #CC9\r
-#antC40=../usecase/mu0_20mhz/12/ant_8.bin #CC10\r
-#antC41=../usecase/mu0_20mhz/12/ant_9.bin #CC10\r
-#antC42=../usecase/mu0_20mhz/12/ant_10.bin #CC10\r
-#antC43=../usecase/mu0_20mhz/12/ant_11.bin #CC10\r
-#antC44=../usecase/mu0_20mhz/12/ant_12.bin #CC11\r
-#antC45=../usecase/mu0_20mhz/12/ant_13.bin #CC11\r
-#antC46=../usecase/mu0_20mhz/12/ant_14.bin #CC11\r
-#antC47=../usecase/mu0_20mhz/12/ant_15.bin #CC11\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-\r
-##Debug\r
-debugStop=0 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-c_plane_vlan_tag=1 #VLAN Tag used for C-Plane\r
-u_plane_vlan_tag=2 #VLAN Tag used for U-Plane\r
-\r
-##RU Settings\r
-Tadv_cp_dl=25 #in us TODO: update per RU implementation\r
- #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=400 #in us\r
-T2a_max_cp_dl=1120 #in us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=400 #in us\r
-T2a_max_cp_ul=1120 #in us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=200 # in us\r
-T2a_max_up=1120 # in us\r
-\r
-#Transmission Window\r
-Ta3_min=160 #in us\r
-Ta3_max=256 #in us\r
-\r
-###########################################################\r
-##lls-CU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=560\r
-T1a_max_cp_dl=800\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=480\r
-T1a_max_cp_ul=560\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=280\r
-T1a_max_up=400\r
-\r
-#Reception Window\r
-Ta4_min=0\r
-Ta4_max=360\r
-###########################################################\r
-\r
+#######################################################################
+#
+# <COPYRIGHT_TAG>
+#
+#######################################################################
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # lls-CU(0) | RU(1)
+xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)
+ccNum=6 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)
+antNum=4 # Number of Antennas per CC (default: 4)
+
+##Numerology
+mu=0 #15Khz Sub Carrier Spacing
+ttiPeriod=1000 # in us TTI period (15Khz default 1000us)
+nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=2048
+nULFftSize=2048
+
+nFrameDuplexType=0 # 0 - FDD 1 - TDD
+nTddPeriod=0 #TDD priod e.g. DDDS 4
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
+ioCore=5
+
+llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF
+ruMac=00:11:22:33:44:55 #RU VF for RU app
+#ruMac=3c:fd:fe:9e:93:68 #RU PF for tcpdump
+
+numSlots=20 #number of slots per IQ files
+#fd 10Mhz 2
+#antC0=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+#antC1=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+#antC2=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+#antC3=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC0=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC1=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC2=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC3=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC4=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC5=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC6=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC7=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC8=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC9=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC10=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC11=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC12=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC13=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC14=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC15=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC16=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC17=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC18=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC19=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC20=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC21=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC22=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC23=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC24=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC25=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC26=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC27=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC28=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC29=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC30=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC31=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC32=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC33=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC34=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC35=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC36=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC37=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC38=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC39=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC40=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC41=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC42=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC43=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC44=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC45=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC46=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC47=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+
+#antC0=../usecase/mu0_20mhz/12/ant_0.bin #CC0
+#antC1=../usecase/mu0_20mhz/12/ant_1.bin #CC0
+#antC2=../usecase/mu0_20mhz/12/ant_2.bin #CC0
+#antC3=../usecase/mu0_20mhz/12/ant_3.bin #CC0
+
+#antC0=../usecase/mu0_20mhz/12/ant_0.bin #CC0
+#antC1=../usecase/mu0_20mhz/12/ant_0.bin #CC0
+#antC2=../usecase/mu0_20mhz/12/ant_0.bin #CC0
+#antC3=../usecase/mu0_20mhz/12/ant_0.bin #CC0
+
+#antC4=../usecase/mu0_20mhz/12/ant_4.bin #CC1
+#antC5=../usecase/mu0_20mhz/12/ant_5.bin #CC1
+#antC6=../usecase/mu0_20mhz/12/ant_6.bin #CC1
+#antC7=../usecase/mu0_20mhz/12/ant_7.bin #CC1
+#antC8=../usecase/mu0_20mhz/12/ant_8.bin #CC2
+#antC9=../usecase/mu0_20mhz/12/ant_9.bin #CC2
+#antC10=../usecase/mu0_20mhz/12/ant_10.bin #CC2
+#antC11=../usecase/mu0_20mhz/12/ant_11.bin #CC2
+#antC12=../usecase/mu0_20mhz/12/ant_12.bin #CC3
+#antC13=../usecase/mu0_20mhz/12/ant_13.bin #CC3
+#antC14=../usecase/mu0_20mhz/12/ant_14.bin #CC3
+#antC15=../usecase/mu0_20mhz/12/ant_15.bin #CC3
+#antC16=../usecase/mu0_20mhz/12/ant_0.bin #CC4
+#antC17=../usecase/mu0_20mhz/12/ant_1.bin #CC4
+#antC18=../usecase/mu0_20mhz/12/ant_2.bin #CC4
+#antC19=../usecase/mu0_20mhz/12/ant_3.bin #CC4
+#antC20=../usecase/mu0_20mhz/12/ant_4.bin #CC5
+#antC21=../usecase/mu0_20mhz/12/ant_5.bin #CC5
+#antC22=../usecase/mu0_20mhz/12/ant_6.bin #CC5
+#antC23=../usecase/mu0_20mhz/12/ant_7.bin #CC5
+#antC24=../usecase/mu0_20mhz/12/ant_8.bin #CC6
+#antC25=../usecase/mu0_20mhz/12/ant_9.bin #CC6
+#antC26=../usecase/mu0_20mhz/12/ant_10.bin #CC6
+#antC27=../usecase/mu0_20mhz/12/ant_11.bin #CC6
+#antC28=../usecase/mu0_20mhz/12/ant_12.bin #CC7
+#antC29=../usecase/mu0_20mhz/12/ant_13.bin #CC7
+#antC30=../usecase/mu0_20mhz/12/ant_14.bin #CC7
+#antC31=../usecase/mu0_20mhz/12/ant_15.bin #CC7
+#antC32=../usecase/mu0_20mhz/12/ant_0.bin #CC8
+#antC33=../usecase/mu0_20mhz/12/ant_1.bin #CC8
+#antC34=../usecase/mu0_20mhz/12/ant_2.bin #CC8
+#antC35=../usecase/mu0_20mhz/12/ant_3.bin #CC8
+#antC36=../usecase/mu0_20mhz/12/ant_4.bin #CC9
+#antC37=../usecase/mu0_20mhz/12/ant_5.bin #CC9
+#antC38=../usecase/mu0_20mhz/12/ant_6.bin #CC9
+#antC39=../usecase/mu0_20mhz/12/ant_7.bin #CC9
+#antC40=../usecase/mu0_20mhz/12/ant_8.bin #CC10
+#antC41=../usecase/mu0_20mhz/12/ant_9.bin #CC10
+#antC42=../usecase/mu0_20mhz/12/ant_10.bin #CC10
+#antC43=../usecase/mu0_20mhz/12/ant_11.bin #CC10
+#antC44=../usecase/mu0_20mhz/12/ant_12.bin #CC11
+#antC45=../usecase/mu0_20mhz/12/ant_13.bin #CC11
+#antC46=../usecase/mu0_20mhz/12/ant_14.bin #CC11
+#antC47=../usecase/mu0_20mhz/12/ant_15.bin #CC11
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+
+##Debug
+debugStop=0 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+c_plane_vlan_tag=1 #VLAN Tag used for C-Plane
+u_plane_vlan_tag=2 #VLAN Tag used for U-Plane
+
+##RU Settings
+Tadv_cp_dl=25 #in us TODO: update per RU implementation
+ #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+
+#Reception Window C-plane DL
+T2a_min_cp_dl=400 #in us
+T2a_max_cp_dl=1120 #in us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=400 #in us
+T2a_max_cp_ul=1120 #in us
+
+#Reception Window U-plane
+T2a_min_up=200 # in us
+T2a_max_up=1120 # in us
+
+#Transmission Window
+Ta3_min=160 #in us
+Ta3_max=256 #in us
+
+###########################################################
+##lls-CU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=560
+T1a_max_cp_dl=800
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=480
+T1a_max_cp_ul=560
+
+#U-plane
+##Transmission Window
+T1a_min_up=280
+T1a_max_up=400
+
+#Reception Window
+Ta4_min=0
+Ta4_max=360
+###########################################################
+
-#######################################################################\r
-#\r
-# <COPYRIGHT_TAG>\r
-#\r
-#######################################################################\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # lls-CU(0) | RU(1)\r
-xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)\r
-ccNum=6 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)\r
-antNum=4 # Number of Antennas per CC (default: 4)\r
-\r
-##Numerology\r
-mu=0 #15Khz Sub Carrier Spacing\r
-ttiPeriod=1000 # in us TTI period (15Khz default 1000us)\r
-nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=2048\r
-nULFftSize=2048\r
-\r
-nFrameDuplexType=0 # 0 - FDD 1 - TDD\r
-nTddPeriod=0 #TDD priod e.g. DDDS 4\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single\r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
-ioCore=45\r
-\r
-llsCUMac=00:11:22:33:44:77 # asigned MAC of lls-CU VF\r
-ruMac=00:11:22:33:44:44 #RU VF for RU app\r
-#ruMac=3c:fd:fe:9e:93:68 #RU PF for tcpdump\r
-\r
-numSlots=20 #number of slots per IQ files\r
-#fd 10Mhz 2\r
-#antC0=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-#antC1=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-#antC2=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-#antC3=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC0=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC1=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC2=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC3=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC4=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC5=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC6=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC7=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC8=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC9=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC10=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC11=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC12=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC13=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC14=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC15=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC16=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC17=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC18=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC19=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC20=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC21=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC22=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC23=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC24=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC25=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC26=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC27=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC28=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC29=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC30=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC31=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC32=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC33=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC34=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC35=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC36=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC37=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC38=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC39=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC40=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC41=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC42=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC43=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC44=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC45=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC46=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC47=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-\r
-#antC0=../usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-#antC1=../usecase/mu0_20mhz/12/ant_1.bin #CC0\r
-#antC2=../usecase/mu0_20mhz/12/ant_2.bin #CC0\r
-#antC3=../usecase/mu0_20mhz/12/ant_3.bin #CC0\r
-\r
-#antC0=../usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-#antC1=../usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-#antC2=../usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-#antC3=../usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-\r
-#antC4=../usecase/mu0_20mhz/12/ant_4.bin #CC1\r
-#antC5=../usecase/mu0_20mhz/12/ant_5.bin #CC1\r
-#antC6=../usecase/mu0_20mhz/12/ant_6.bin #CC1\r
-#antC7=../usecase/mu0_20mhz/12/ant_7.bin #CC1\r
-#antC8=../usecase/mu0_20mhz/12/ant_8.bin #CC2\r
-#antC9=../usecase/mu0_20mhz/12/ant_9.bin #CC2\r
-#antC10=../usecase/mu0_20mhz/12/ant_10.bin #CC2\r
-#antC11=../usecase/mu0_20mhz/12/ant_11.bin #CC2\r
-#antC12=../usecase/mu0_20mhz/12/ant_12.bin #CC3\r
-#antC13=../usecase/mu0_20mhz/12/ant_13.bin #CC3\r
-#antC14=../usecase/mu0_20mhz/12/ant_14.bin #CC3\r
-#antC15=../usecase/mu0_20mhz/12/ant_15.bin #CC3\r
-#antC16=../usecase/mu0_20mhz/12/ant_0.bin #CC4\r
-#antC17=../usecase/mu0_20mhz/12/ant_1.bin #CC4\r
-#antC18=../usecase/mu0_20mhz/12/ant_2.bin #CC4\r
-#antC19=../usecase/mu0_20mhz/12/ant_3.bin #CC4\r
-#antC20=../usecase/mu0_20mhz/12/ant_4.bin #CC5\r
-#antC21=../usecase/mu0_20mhz/12/ant_5.bin #CC5\r
-#antC22=../usecase/mu0_20mhz/12/ant_6.bin #CC5\r
-#antC23=../usecase/mu0_20mhz/12/ant_7.bin #CC5\r
-#antC24=../usecase/mu0_20mhz/12/ant_8.bin #CC6\r
-#antC25=../usecase/mu0_20mhz/12/ant_9.bin #CC6\r
-#antC26=../usecase/mu0_20mhz/12/ant_10.bin #CC6\r
-#antC27=../usecase/mu0_20mhz/12/ant_11.bin #CC6\r
-#antC28=../usecase/mu0_20mhz/12/ant_12.bin #CC7\r
-#antC29=../usecase/mu0_20mhz/12/ant_13.bin #CC7\r
-#antC30=../usecase/mu0_20mhz/12/ant_14.bin #CC7\r
-#antC31=../usecase/mu0_20mhz/12/ant_15.bin #CC7\r
-#antC32=../usecase/mu0_20mhz/12/ant_0.bin #CC8\r
-#antC33=../usecase/mu0_20mhz/12/ant_1.bin #CC8\r
-#antC34=../usecase/mu0_20mhz/12/ant_2.bin #CC8\r
-#antC35=../usecase/mu0_20mhz/12/ant_3.bin #CC8\r
-#antC36=../usecase/mu0_20mhz/12/ant_4.bin #CC9\r
-#antC37=../usecase/mu0_20mhz/12/ant_5.bin #CC9\r
-#antC38=../usecase/mu0_20mhz/12/ant_6.bin #CC9\r
-#antC39=../usecase/mu0_20mhz/12/ant_7.bin #CC9\r
-#antC40=../usecase/mu0_20mhz/12/ant_8.bin #CC10\r
-#antC41=../usecase/mu0_20mhz/12/ant_9.bin #CC10\r
-#antC42=../usecase/mu0_20mhz/12/ant_10.bin #CC10\r
-#antC43=../usecase/mu0_20mhz/12/ant_11.bin #CC10\r
-#antC44=../usecase/mu0_20mhz/12/ant_12.bin #CC11\r
-#antC45=../usecase/mu0_20mhz/12/ant_13.bin #CC11\r
-#antC46=../usecase/mu0_20mhz/12/ant_14.bin #CC11\r
-#antC47=../usecase/mu0_20mhz/12/ant_15.bin #CC11\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-\r
-##Debug\r
-debugStop=0 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-c_plane_vlan_tag=1 #VLAN Tag used for C-Plane\r
-u_plane_vlan_tag=2 #VLAN Tag used for U-Plane\r
-\r
-##RU Settings\r
-Tadv_cp_dl=25 #in us TODO: update per RU implementation\r
- #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=400 #in us\r
-T2a_max_cp_dl=1120 #in us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=400 #in us\r
-T2a_max_cp_ul=1120 #in us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=200 # in us\r
-T2a_max_up=1120 # in us\r
-\r
-#Transmission Window\r
-Ta3_min=160 #in us\r
-Ta3_max=256 #in us\r
-\r
-###########################################################\r
-##lls-CU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=560\r
-T1a_max_cp_dl=800\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=480\r
-T1a_max_cp_ul=560\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=280\r
-T1a_max_up=400\r
-\r
-#Reception Window\r
-Ta4_min=0\r
-Ta4_max=360\r
-###########################################################\r
-\r
+#######################################################################
+#
+# <COPYRIGHT_TAG>
+#
+#######################################################################
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # lls-CU(0) | RU(1)
+xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)
+ccNum=6 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)
+antNum=4 # Number of Antennas per CC (default: 4)
+
+##Numerology
+mu=0 #15Khz Sub Carrier Spacing
+ttiPeriod=1000 # in us TTI period (15Khz default 1000us)
+nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=2048
+nULFftSize=2048
+
+nFrameDuplexType=0 # 0 - FDD 1 - TDD
+nTddPeriod=0 #TDD priod e.g. DDDS 4
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
+ioCore=45
+
+llsCUMac=00:11:22:33:44:77 # asigned MAC of lls-CU VF
+ruMac=00:11:22:33:44:44 #RU VF for RU app
+#ruMac=3c:fd:fe:9e:93:68 #RU PF for tcpdump
+
+numSlots=20 #number of slots per IQ files
+#fd 10Mhz 2
+#antC0=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+#antC1=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+#antC2=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+#antC3=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC0=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC1=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC2=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC3=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC4=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC5=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC6=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC7=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC8=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC9=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC10=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC11=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC12=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC13=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC14=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC15=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC16=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC17=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC18=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC19=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC20=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC21=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC22=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC23=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC24=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC25=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC26=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC27=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC28=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC29=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC30=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC31=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC32=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC33=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC34=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC35=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC36=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC37=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC38=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC39=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC40=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC41=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC42=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC43=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC44=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC45=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC46=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC47=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+
+#antC0=../usecase/mu0_20mhz/12/ant_0.bin #CC0
+#antC1=../usecase/mu0_20mhz/12/ant_1.bin #CC0
+#antC2=../usecase/mu0_20mhz/12/ant_2.bin #CC0
+#antC3=../usecase/mu0_20mhz/12/ant_3.bin #CC0
+
+#antC0=../usecase/mu0_20mhz/12/ant_0.bin #CC0
+#antC1=../usecase/mu0_20mhz/12/ant_0.bin #CC0
+#antC2=../usecase/mu0_20mhz/12/ant_0.bin #CC0
+#antC3=../usecase/mu0_20mhz/12/ant_0.bin #CC0
+
+#antC4=../usecase/mu0_20mhz/12/ant_4.bin #CC1
+#antC5=../usecase/mu0_20mhz/12/ant_5.bin #CC1
+#antC6=../usecase/mu0_20mhz/12/ant_6.bin #CC1
+#antC7=../usecase/mu0_20mhz/12/ant_7.bin #CC1
+#antC8=../usecase/mu0_20mhz/12/ant_8.bin #CC2
+#antC9=../usecase/mu0_20mhz/12/ant_9.bin #CC2
+#antC10=../usecase/mu0_20mhz/12/ant_10.bin #CC2
+#antC11=../usecase/mu0_20mhz/12/ant_11.bin #CC2
+#antC12=../usecase/mu0_20mhz/12/ant_12.bin #CC3
+#antC13=../usecase/mu0_20mhz/12/ant_13.bin #CC3
+#antC14=../usecase/mu0_20mhz/12/ant_14.bin #CC3
+#antC15=../usecase/mu0_20mhz/12/ant_15.bin #CC3
+#antC16=../usecase/mu0_20mhz/12/ant_0.bin #CC4
+#antC17=../usecase/mu0_20mhz/12/ant_1.bin #CC4
+#antC18=../usecase/mu0_20mhz/12/ant_2.bin #CC4
+#antC19=../usecase/mu0_20mhz/12/ant_3.bin #CC4
+#antC20=../usecase/mu0_20mhz/12/ant_4.bin #CC5
+#antC21=../usecase/mu0_20mhz/12/ant_5.bin #CC5
+#antC22=../usecase/mu0_20mhz/12/ant_6.bin #CC5
+#antC23=../usecase/mu0_20mhz/12/ant_7.bin #CC5
+#antC24=../usecase/mu0_20mhz/12/ant_8.bin #CC6
+#antC25=../usecase/mu0_20mhz/12/ant_9.bin #CC6
+#antC26=../usecase/mu0_20mhz/12/ant_10.bin #CC6
+#antC27=../usecase/mu0_20mhz/12/ant_11.bin #CC6
+#antC28=../usecase/mu0_20mhz/12/ant_12.bin #CC7
+#antC29=../usecase/mu0_20mhz/12/ant_13.bin #CC7
+#antC30=../usecase/mu0_20mhz/12/ant_14.bin #CC7
+#antC31=../usecase/mu0_20mhz/12/ant_15.bin #CC7
+#antC32=../usecase/mu0_20mhz/12/ant_0.bin #CC8
+#antC33=../usecase/mu0_20mhz/12/ant_1.bin #CC8
+#antC34=../usecase/mu0_20mhz/12/ant_2.bin #CC8
+#antC35=../usecase/mu0_20mhz/12/ant_3.bin #CC8
+#antC36=../usecase/mu0_20mhz/12/ant_4.bin #CC9
+#antC37=../usecase/mu0_20mhz/12/ant_5.bin #CC9
+#antC38=../usecase/mu0_20mhz/12/ant_6.bin #CC9
+#antC39=../usecase/mu0_20mhz/12/ant_7.bin #CC9
+#antC40=../usecase/mu0_20mhz/12/ant_8.bin #CC10
+#antC41=../usecase/mu0_20mhz/12/ant_9.bin #CC10
+#antC42=../usecase/mu0_20mhz/12/ant_10.bin #CC10
+#antC43=../usecase/mu0_20mhz/12/ant_11.bin #CC10
+#antC44=../usecase/mu0_20mhz/12/ant_12.bin #CC11
+#antC45=../usecase/mu0_20mhz/12/ant_13.bin #CC11
+#antC46=../usecase/mu0_20mhz/12/ant_14.bin #CC11
+#antC47=../usecase/mu0_20mhz/12/ant_15.bin #CC11
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+
+##Debug
+debugStop=0 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+c_plane_vlan_tag=1 #VLAN Tag used for C-Plane
+u_plane_vlan_tag=2 #VLAN Tag used for U-Plane
+
+##RU Settings
+Tadv_cp_dl=25 #in us TODO: update per RU implementation
+ #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+
+#Reception Window C-plane DL
+T2a_min_cp_dl=400 #in us
+T2a_max_cp_dl=1120 #in us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=400 #in us
+T2a_max_cp_ul=1120 #in us
+
+#Reception Window U-plane
+T2a_min_up=200 # in us
+T2a_max_up=1120 # in us
+
+#Transmission Window
+Ta3_min=160 #in us
+Ta3_max=256 #in us
+
+###########################################################
+##lls-CU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=560
+T1a_max_cp_dl=800
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=480
+T1a_max_cp_ul=560
+
+#U-plane
+##Transmission Window
+T1a_min_up=280
+T1a_max_up=400
+
+#Reception Window
+Ta4_min=0
+Ta4_max=360
+###########################################################
+
-#######################################################################\r
-#\r
-# <COPYRIGHT_TAG>\r
-#\r
-#######################################################################\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-appMode=1 # lls-CU(0) | RU(1)\r
-xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)\r
-ccNum=6 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)\r
-antNum=4 # Number of Antennas per CC (default: 4)\r
-\r
-##Numerology\r
-mu=0 #15Khz Sub Carrier Spacing\r
-ttiPeriod=1000 # in us TTI period (15Khz default 1000us)\r
-nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=2048\r
-nULFftSize=2048\r
-\r
-nFrameDuplexType=0 # 0 - FDD 1 - TDD\r
-nTddPeriod=0 #TDD priod e.g. DDDS 4\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single\r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#######################################################################
+#
+# <COPYRIGHT_TAG>
+#
+#######################################################################
+
+# This is simple configuration file. Use '#' sign for comments
+appMode=1 # lls-CU(0) | RU(1)
+xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)
+ccNum=6 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)
+antNum=4 # Number of Antennas per CC (default: 4)
+
+##Numerology
+mu=0 #15Khz Sub Carrier Spacing
+ttiPeriod=1000 # in us TTI period (15Khz default 1000us)
+nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=2048
+nULFftSize=2048
+
+nFrameDuplexType=0 # 0 - FDD 1 - TDD
+nTddPeriod=0 #TDD priod e.g. DDDS 4
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=10
systemCore=10
pktProcCore=10
pktAuxCore=10
timingCore=11
-\r
-llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF\r
-#llsCUMac=3c:fd:fe:a8:e0:70 #lls-CU PF for tcpdump\r
-ruMac=00:11:22:33:44:55 #RU VF for RU app\r
-\r
-numSlots=20 #number of slots per IQ files\r
-#fd 10Mhz 2\r
-#antC0=./usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-#antC1=./usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-#antC2=./usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-#antC3=./usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC0=./usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC1=./usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC2=./usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC3=./usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC4=./usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC5=./usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC6=./usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC7=./usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC8=./usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC9=./usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC10=./usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC11=./usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC12=./usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC13=./usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC14=./usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC15=./usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC16=./usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC17=./usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC18=./usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC19=./usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC20=./usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC21=./usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC22=./usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC23=./usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC24=./usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC25=./usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC26=./usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC27=./usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC28=./usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC29=./usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC30=./usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC31=./usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC32=./usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC33=./usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC34=./usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC35=./usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC36=./usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC37=./usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC38=./usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC39=./usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC40=./usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC41=./usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC42=./usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC43=./usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC44=./usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC45=./usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC46=./usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC47=./usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-\r
-#antC0=./usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-#antC1=./usecase/mu0_20mhz/12/ant_1.bin #CC0\r
-#antC2=./usecase/mu0_20mhz/12/ant_2.bin #CC0\r
-#antC3=./usecase/mu0_20mhz/12/ant_3.bin #CC0\r
-\r
-#antC0=./usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-#antC1=./usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-#antC2=./usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-#antC3=./usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-\r
-#antC4=./usecase/mu0_20mhz/12/ant_4.bin #CC1\r
-#antC5=./usecase/mu0_20mhz/12/ant_5.bin #CC1\r
-#antC6=./usecase/mu0_20mhz/12/ant_6.bin #CC1\r
-#antC7=./usecase/mu0_20mhz/12/ant_7.bin #CC1\r
-#antC8=./usecase/mu0_20mhz/12/ant_8.bin #CC2\r
-#antC9=./usecase/mu0_20mhz/12/ant_9.bin #CC2\r
-#antC10=./usecase/mu0_20mhz/12/ant_10.bin #CC2\r
-#antC11=./usecase/mu0_20mhz/12/ant_11.bin #CC2\r
-#antC12=./usecase/mu0_20mhz/12/ant_12.bin #CC3\r
-#antC13=./usecase/mu0_20mhz/12/ant_13.bin #CC3\r
-#antC14=./usecase/mu0_20mhz/12/ant_14.bin #CC3\r
-#antC15=./usecase/mu0_20mhz/12/ant_15.bin #CC3\r
-#antC16=./usecase/mu0_20mhz/12/ant_0.bin #CC4\r
-#antC17=./usecase/mu0_20mhz/12/ant_1.bin #CC4\r
-#antC18=./usecase/mu0_20mhz/12/ant_2.bin #CC4\r
-#antC19=./usecase/mu0_20mhz/12/ant_3.bin #CC4\r
-#antC20=./usecase/mu0_20mhz/12/ant_4.bin #CC5\r
-#antC21=./usecase/mu0_20mhz/12/ant_5.bin #CC5\r
-#antC22=./usecase/mu0_20mhz/12/ant_6.bin #CC5\r
-#antC23=./usecase/mu0_20mhz/12/ant_7.bin #CC5\r
-#antC24=./usecase/mu0_20mhz/12/ant_8.bin #CC6\r
-#antC25=./usecase/mu0_20mhz/12/ant_9.bin #CC6\r
-#antC26=./usecase/mu0_20mhz/12/ant_10.bin #CC6\r
-#antC27=./usecase/mu0_20mhz/12/ant_11.bin #CC6\r
-#antC28=./usecase/mu0_20mhz/12/ant_12.bin #CC7\r
-#antC29=./usecase/mu0_20mhz/12/ant_13.bin #CC7\r
-#antC30=./usecase/mu0_20mhz/12/ant_14.bin #CC7\r
-#antC31=./usecase/mu0_20mhz/12/ant_15.bin #CC7\r
-#antC32=./usecase/mu0_20mhz/12/ant_0.bin #CC8\r
-#antC33=./usecase/mu0_20mhz/12/ant_1.bin #CC8\r
-#antC34=./usecase/mu0_20mhz/12/ant_2.bin #CC8\r
-#antC35=./usecase/mu0_20mhz/12/ant_3.bin #CC8\r
-#antC36=./usecase/mu0_20mhz/12/ant_4.bin #CC9\r
-#antC37=./usecase/mu0_20mhz/12/ant_5.bin #CC9\r
-#antC38=./usecase/mu0_20mhz/12/ant_6.bin #CC9\r
-#antC39=./usecase/mu0_20mhz/12/ant_7.bin #CC9\r
-#antC40=./usecase/mu0_20mhz/12/ant_8.bin #CC10\r
-#antC41=./usecase/mu0_20mhz/12/ant_9.bin #CC10\r
-#antC42=./usecase/mu0_20mhz/12/ant_10.bin #CC10\r
-#antC43=./usecase/mu0_20mhz/12/ant_11.bin #CC10\r
-#antC44=./usecase/mu0_20mhz/12/ant_12.bin #CC11\r
-#antC45=./usecase/mu0_20mhz/12/ant_13.bin #CC11\r
-#antC46=./usecase/mu0_20mhz/12/ant_14.bin #CC11\r
-#antC47=./usecase/mu0_20mhz/12/ant_15.bin #CC11\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index\r
-\r
-antPrachC0=./usecase/mu0_20mhz/12/ant_0.bin\r
-antPrachC1=./usecase/mu0_20mhz/12/ant_1.bin\r
-antPrachC2=./usecase/mu0_20mhz/12/ant_2.bin\r
-antPrachC3=./usecase/mu0_20mhz/12/ant_3.bin\r
-antPrachC4=./usecase/mu0_20mhz/12/ant_4.bin\r
-antPrachC5=./usecase/mu0_20mhz/12/ant_5.bin\r
-antPrachC6=./usecase/mu0_20mhz/12/ant_6.bin\r
-antPrachC7=./usecase/mu0_20mhz/12/ant_7.bin\r
-antPrachC8=./usecase/mu0_20mhz/12/ant_8.bin\r
-antPrachC9=./usecase/mu0_20mhz/12/ant_9.bin\r
-antPrachC10=./usecase/mu0_20mhz/12/ant_10.bin\r
-antPrachC11=./usecase/mu0_20mhz/12/ant_11.bin\r
-antPrachC12=./usecase/mu0_20mhz/12/ant_12.bin\r
-antPrachC13=./usecase/mu0_20mhz/12/ant_13.bin\r
-antPrachC14=./usecase/mu0_20mhz/12/ant_14.bin\r
-antPrachC15=./usecase/mu0_20mhz/12/ant_15.bin\r
-antPrachC16=./usecase/mu0_20mhz/12/ant_0.bin\r
-antPrachC17=./usecase/mu0_20mhz/12/ant_1.bin\r
-antPrachC18=./usecase/mu0_20mhz/12/ant_2.bin\r
-antPrachC19=./usecase/mu0_20mhz/12/ant_3.bin\r
-antPrachC20=./usecase/mu0_20mhz/12/ant_4.bin\r
-antPrachC21=./usecase/mu0_20mhz/12/ant_5.bin\r
-antPrachC22=./usecase/mu0_20mhz/12/ant_6.bin\r
-antPrachC23=./usecase/mu0_20mhz/12/ant_7.bin\r
-antPrachC24=./usecase/mu0_20mhz/12/ant_8.bin\r
-antPrachC25=./usecase/mu0_20mhz/12/ant_9.bin\r
-antPrachC26=./usecase/mu0_20mhz/12/ant_10.bin\r
-antPrachC27=./usecase/mu0_20mhz/12/ant_11.bin\r
-antPrachC28=./usecase/mu0_20mhz/12/ant_12.bin\r
-antPrachC29=./usecase/mu0_20mhz/12/ant_13.bin\r
-antPrachC30=./usecase/mu0_20mhz/12/ant_14.bin\r
-antPrachC31=./usecase/mu0_20mhz/12/ant_15.bin\r
-antPrachC32=./usecase/mu0_20mhz/12/ant_0.bin\r
-antPrachC33=./usecase/mu0_20mhz/12/ant_1.bin\r
-antPrachC34=./usecase/mu0_20mhz/12/ant_2.bin\r
-antPrachC35=./usecase/mu0_20mhz/12/ant_3.bin\r
-antPrachC36=./usecase/mu0_20mhz/12/ant_4.bin\r
-antPrachC37=./usecase/mu0_20mhz/12/ant_5.bin\r
-antPrachC38=./usecase/mu0_20mhz/12/ant_6.bin\r
-antPrachC39=./usecase/mu0_20mhz/12/ant_7.bin\r
-antPrachC40=./usecase/mu0_20mhz/12/ant_8.bin\r
-antPrachC41=./usecase/mu0_20mhz/12/ant_9.bin\r
-antPrachC42=./usecase/mu0_20mhz/12/ant_10.bin\r
-antPrachC43=./usecase/mu0_20mhz/12/ant_11.bin\r
-antPrachC44=./usecase/mu0_20mhz/12/ant_12.bin\r
-antPrachC45=./usecase/mu0_20mhz/12/ant_13.bin\r
-antPrachC46=./usecase/mu0_20mhz/12/ant_14.bin\r
-antPrachC47=./usecase/mu0_20mhz/12/ant_15.bin\r
-\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-\r
-##Debug\r
-debugStop=0 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-c_plane_vlan_tag=1 #VLAN Tag used for C-Plane\r
-u_plane_vlan_tag=2 #VLAN Tag used for U-Plane\r
-\r
-##RU Settings\r
-Tadv_cp_dl=25 #in us TODO: update per RU implementation\r
- #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=400 #in us\r
-T2a_max_cp_dl=1120 #in us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=400 #in us\r
-T2a_max_cp_ul=1120 #in us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=200 # in us\r
-T2a_max_up=1120 # in us\r
-\r
-#Transmission Window\r
-Ta3_min=160 #in us\r
-Ta3_max=256 #in us\r
-\r
-###########################################################\r
-##lls-CU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=560\r
-T1a_max_cp_dl=800\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=480\r
-T1a_max_cp_ul=560\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=280\r
-T1a_max_up=400\r
-\r
-#Reception Window\r
-Ta4_min=0\r
-Ta4_max=360\r
-###########################################################\r
-\r
+
+llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF
+#llsCUMac=3c:fd:fe:a8:e0:70 #lls-CU PF for tcpdump
+ruMac=00:11:22:33:44:55 #RU VF for RU app
+
+numSlots=20 #number of slots per IQ files
+#fd 10Mhz 2
+#antC0=./usecase/mu0_20mhz/12/uliq0.bin #CC0
+#antC1=./usecase/mu0_20mhz/12/uliq1.bin #CC0
+#antC2=./usecase/mu0_20mhz/12/uliq2.bin #CC0
+#antC3=./usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC0=./usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC1=./usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC2=./usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC3=./usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC4=./usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC5=./usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC6=./usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC7=./usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC8=./usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC9=./usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC10=./usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC11=./usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC12=./usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC13=./usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC14=./usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC15=./usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC16=./usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC17=./usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC18=./usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC19=./usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC20=./usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC21=./usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC22=./usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC23=./usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC24=./usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC25=./usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC26=./usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC27=./usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC28=./usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC29=./usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC30=./usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC31=./usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC32=./usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC33=./usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC34=./usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC35=./usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC36=./usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC37=./usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC38=./usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC39=./usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC40=./usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC41=./usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC42=./usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC43=./usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC44=./usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC45=./usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC46=./usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC47=./usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+
+#antC0=./usecase/mu0_20mhz/12/ant_0.bin #CC0
+#antC1=./usecase/mu0_20mhz/12/ant_1.bin #CC0
+#antC2=./usecase/mu0_20mhz/12/ant_2.bin #CC0
+#antC3=./usecase/mu0_20mhz/12/ant_3.bin #CC0
+
+#antC0=./usecase/mu0_20mhz/12/ant_0.bin #CC0
+#antC1=./usecase/mu0_20mhz/12/ant_0.bin #CC0
+#antC2=./usecase/mu0_20mhz/12/ant_0.bin #CC0
+#antC3=./usecase/mu0_20mhz/12/ant_0.bin #CC0
+
+#antC4=./usecase/mu0_20mhz/12/ant_4.bin #CC1
+#antC5=./usecase/mu0_20mhz/12/ant_5.bin #CC1
+#antC6=./usecase/mu0_20mhz/12/ant_6.bin #CC1
+#antC7=./usecase/mu0_20mhz/12/ant_7.bin #CC1
+#antC8=./usecase/mu0_20mhz/12/ant_8.bin #CC2
+#antC9=./usecase/mu0_20mhz/12/ant_9.bin #CC2
+#antC10=./usecase/mu0_20mhz/12/ant_10.bin #CC2
+#antC11=./usecase/mu0_20mhz/12/ant_11.bin #CC2
+#antC12=./usecase/mu0_20mhz/12/ant_12.bin #CC3
+#antC13=./usecase/mu0_20mhz/12/ant_13.bin #CC3
+#antC14=./usecase/mu0_20mhz/12/ant_14.bin #CC3
+#antC15=./usecase/mu0_20mhz/12/ant_15.bin #CC3
+#antC16=./usecase/mu0_20mhz/12/ant_0.bin #CC4
+#antC17=./usecase/mu0_20mhz/12/ant_1.bin #CC4
+#antC18=./usecase/mu0_20mhz/12/ant_2.bin #CC4
+#antC19=./usecase/mu0_20mhz/12/ant_3.bin #CC4
+#antC20=./usecase/mu0_20mhz/12/ant_4.bin #CC5
+#antC21=./usecase/mu0_20mhz/12/ant_5.bin #CC5
+#antC22=./usecase/mu0_20mhz/12/ant_6.bin #CC5
+#antC23=./usecase/mu0_20mhz/12/ant_7.bin #CC5
+#antC24=./usecase/mu0_20mhz/12/ant_8.bin #CC6
+#antC25=./usecase/mu0_20mhz/12/ant_9.bin #CC6
+#antC26=./usecase/mu0_20mhz/12/ant_10.bin #CC6
+#antC27=./usecase/mu0_20mhz/12/ant_11.bin #CC6
+#antC28=./usecase/mu0_20mhz/12/ant_12.bin #CC7
+#antC29=./usecase/mu0_20mhz/12/ant_13.bin #CC7
+#antC30=./usecase/mu0_20mhz/12/ant_14.bin #CC7
+#antC31=./usecase/mu0_20mhz/12/ant_15.bin #CC7
+#antC32=./usecase/mu0_20mhz/12/ant_0.bin #CC8
+#antC33=./usecase/mu0_20mhz/12/ant_1.bin #CC8
+#antC34=./usecase/mu0_20mhz/12/ant_2.bin #CC8
+#antC35=./usecase/mu0_20mhz/12/ant_3.bin #CC8
+#antC36=./usecase/mu0_20mhz/12/ant_4.bin #CC9
+#antC37=./usecase/mu0_20mhz/12/ant_5.bin #CC9
+#antC38=./usecase/mu0_20mhz/12/ant_6.bin #CC9
+#antC39=./usecase/mu0_20mhz/12/ant_7.bin #CC9
+#antC40=./usecase/mu0_20mhz/12/ant_8.bin #CC10
+#antC41=./usecase/mu0_20mhz/12/ant_9.bin #CC10
+#antC42=./usecase/mu0_20mhz/12/ant_10.bin #CC10
+#antC43=./usecase/mu0_20mhz/12/ant_11.bin #CC10
+#antC44=./usecase/mu0_20mhz/12/ant_12.bin #CC11
+#antC45=./usecase/mu0_20mhz/12/ant_13.bin #CC11
+#antC46=./usecase/mu0_20mhz/12/ant_14.bin #CC11
+#antC47=./usecase/mu0_20mhz/12/ant_15.bin #CC11
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index
+
+antPrachC0=./usecase/mu0_20mhz/12/ant_0.bin
+antPrachC1=./usecase/mu0_20mhz/12/ant_1.bin
+antPrachC2=./usecase/mu0_20mhz/12/ant_2.bin
+antPrachC3=./usecase/mu0_20mhz/12/ant_3.bin
+antPrachC4=./usecase/mu0_20mhz/12/ant_4.bin
+antPrachC5=./usecase/mu0_20mhz/12/ant_5.bin
+antPrachC6=./usecase/mu0_20mhz/12/ant_6.bin
+antPrachC7=./usecase/mu0_20mhz/12/ant_7.bin
+antPrachC8=./usecase/mu0_20mhz/12/ant_8.bin
+antPrachC9=./usecase/mu0_20mhz/12/ant_9.bin
+antPrachC10=./usecase/mu0_20mhz/12/ant_10.bin
+antPrachC11=./usecase/mu0_20mhz/12/ant_11.bin
+antPrachC12=./usecase/mu0_20mhz/12/ant_12.bin
+antPrachC13=./usecase/mu0_20mhz/12/ant_13.bin
+antPrachC14=./usecase/mu0_20mhz/12/ant_14.bin
+antPrachC15=./usecase/mu0_20mhz/12/ant_15.bin
+antPrachC16=./usecase/mu0_20mhz/12/ant_0.bin
+antPrachC17=./usecase/mu0_20mhz/12/ant_1.bin
+antPrachC18=./usecase/mu0_20mhz/12/ant_2.bin
+antPrachC19=./usecase/mu0_20mhz/12/ant_3.bin
+antPrachC20=./usecase/mu0_20mhz/12/ant_4.bin
+antPrachC21=./usecase/mu0_20mhz/12/ant_5.bin
+antPrachC22=./usecase/mu0_20mhz/12/ant_6.bin
+antPrachC23=./usecase/mu0_20mhz/12/ant_7.bin
+antPrachC24=./usecase/mu0_20mhz/12/ant_8.bin
+antPrachC25=./usecase/mu0_20mhz/12/ant_9.bin
+antPrachC26=./usecase/mu0_20mhz/12/ant_10.bin
+antPrachC27=./usecase/mu0_20mhz/12/ant_11.bin
+antPrachC28=./usecase/mu0_20mhz/12/ant_12.bin
+antPrachC29=./usecase/mu0_20mhz/12/ant_13.bin
+antPrachC30=./usecase/mu0_20mhz/12/ant_14.bin
+antPrachC31=./usecase/mu0_20mhz/12/ant_15.bin
+antPrachC32=./usecase/mu0_20mhz/12/ant_0.bin
+antPrachC33=./usecase/mu0_20mhz/12/ant_1.bin
+antPrachC34=./usecase/mu0_20mhz/12/ant_2.bin
+antPrachC35=./usecase/mu0_20mhz/12/ant_3.bin
+antPrachC36=./usecase/mu0_20mhz/12/ant_4.bin
+antPrachC37=./usecase/mu0_20mhz/12/ant_5.bin
+antPrachC38=./usecase/mu0_20mhz/12/ant_6.bin
+antPrachC39=./usecase/mu0_20mhz/12/ant_7.bin
+antPrachC40=./usecase/mu0_20mhz/12/ant_8.bin
+antPrachC41=./usecase/mu0_20mhz/12/ant_9.bin
+antPrachC42=./usecase/mu0_20mhz/12/ant_10.bin
+antPrachC43=./usecase/mu0_20mhz/12/ant_11.bin
+antPrachC44=./usecase/mu0_20mhz/12/ant_12.bin
+antPrachC45=./usecase/mu0_20mhz/12/ant_13.bin
+antPrachC46=./usecase/mu0_20mhz/12/ant_14.bin
+antPrachC47=./usecase/mu0_20mhz/12/ant_15.bin
+
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+
+##Debug
+debugStop=0 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+c_plane_vlan_tag=1 #VLAN Tag used for C-Plane
+u_plane_vlan_tag=2 #VLAN Tag used for U-Plane
+
+##RU Settings
+Tadv_cp_dl=25 #in us TODO: update per RU implementation
+ #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+
+#Reception Window C-plane DL
+T2a_min_cp_dl=400 #in us
+T2a_max_cp_dl=1120 #in us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=400 #in us
+T2a_max_cp_ul=1120 #in us
+
+#Reception Window U-plane
+T2a_min_up=200 # in us
+T2a_max_up=1120 # in us
+
+#Transmission Window
+Ta3_min=160 #in us
+Ta3_max=256 #in us
+
+###########################################################
+##lls-CU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=560
+T1a_max_cp_dl=800
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=480
+T1a_max_cp_ul=560
+
+#U-plane
+##Transmission Window
+T1a_min_up=280
+T1a_max_up=400
+
+#Reception Window
+Ta4_min=0
+Ta4_max=360
+###########################################################
+
-#######################################################################\r
-#\r
-# <COPYRIGHT_TAG>\r
-#\r
-#######################################################################\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # lls-CU(0) | RU(1)\r
-xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)\r
-ccNum=6 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)\r
-antNum=4 # Number of Antennas per CC (default: 4)\r
-\r
-##Numerology\r
-mu=0 #15Khz Sub Carrier Spacing\r
-ttiPeriod=1000 # in us TTI period (15Khz default 1000us)\r
-nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=2048\r
-nULFftSize=2048\r
-\r
-nFrameDuplexType=0 # 0 - FDD 1 - TDD\r
-nTddPeriod=0 #TDD priod e.g. DDDS 4\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single\r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
-ioCore=3\r
-\r
-llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF\r
-#llsCUMac=3c:fd:fe:a8:e0:70 #lls-CU PF for tcpdump\r
-ruMac=00:11:22:33:44:55 #RU VF for RU app\r
-\r
-numSlots=20 #number of slots per IQ files\r
-#fd 10Mhz 2\r
-#antC0=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-#antC1=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-#antC2=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-#antC3=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC0=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC1=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC2=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC3=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC4=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC5=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC6=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC7=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC8=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC9=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC10=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC11=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC12=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC13=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC14=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC15=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC16=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC17=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC18=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC19=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC20=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC21=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC22=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC23=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC24=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC25=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC26=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC27=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC28=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC29=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC30=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC31=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC32=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC33=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC34=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC35=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC36=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC37=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC38=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC39=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC40=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC41=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC42=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC43=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC44=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC45=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC46=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC47=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-\r
-#antC0=../usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-#antC1=../usecase/mu0_20mhz/12/ant_1.bin #CC0\r
-#antC2=../usecase/mu0_20mhz/12/ant_2.bin #CC0\r
-#antC3=../usecase/mu0_20mhz/12/ant_3.bin #CC0\r
-\r
-#antC0=../usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-#antC1=../usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-#antC2=../usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-#antC3=../usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-\r
-#antC4=../usecase/mu0_20mhz/12/ant_4.bin #CC1\r
-#antC5=../usecase/mu0_20mhz/12/ant_5.bin #CC1\r
-#antC6=../usecase/mu0_20mhz/12/ant_6.bin #CC1\r
-#antC7=../usecase/mu0_20mhz/12/ant_7.bin #CC1\r
-#antC8=../usecase/mu0_20mhz/12/ant_8.bin #CC2\r
-#antC9=../usecase/mu0_20mhz/12/ant_9.bin #CC2\r
-#antC10=../usecase/mu0_20mhz/12/ant_10.bin #CC2\r
-#antC11=../usecase/mu0_20mhz/12/ant_11.bin #CC2\r
-#antC12=../usecase/mu0_20mhz/12/ant_12.bin #CC3\r
-#antC13=../usecase/mu0_20mhz/12/ant_13.bin #CC3\r
-#antC14=../usecase/mu0_20mhz/12/ant_14.bin #CC3\r
-#antC15=../usecase/mu0_20mhz/12/ant_15.bin #CC3\r
-#antC16=../usecase/mu0_20mhz/12/ant_0.bin #CC4\r
-#antC17=../usecase/mu0_20mhz/12/ant_1.bin #CC4\r
-#antC18=../usecase/mu0_20mhz/12/ant_2.bin #CC4\r
-#antC19=../usecase/mu0_20mhz/12/ant_3.bin #CC4\r
-#antC20=../usecase/mu0_20mhz/12/ant_4.bin #CC5\r
-#antC21=../usecase/mu0_20mhz/12/ant_5.bin #CC5\r
-#antC22=../usecase/mu0_20mhz/12/ant_6.bin #CC5\r
-#antC23=../usecase/mu0_20mhz/12/ant_7.bin #CC5\r
-#antC24=../usecase/mu0_20mhz/12/ant_8.bin #CC6\r
-#antC25=../usecase/mu0_20mhz/12/ant_9.bin #CC6\r
-#antC26=../usecase/mu0_20mhz/12/ant_10.bin #CC6\r
-#antC27=../usecase/mu0_20mhz/12/ant_11.bin #CC6\r
-#antC28=../usecase/mu0_20mhz/12/ant_12.bin #CC7\r
-#antC29=../usecase/mu0_20mhz/12/ant_13.bin #CC7\r
-#antC30=../usecase/mu0_20mhz/12/ant_14.bin #CC7\r
-#antC31=../usecase/mu0_20mhz/12/ant_15.bin #CC7\r
-#antC32=../usecase/mu0_20mhz/12/ant_0.bin #CC8\r
-#antC33=../usecase/mu0_20mhz/12/ant_1.bin #CC8\r
-#antC34=../usecase/mu0_20mhz/12/ant_2.bin #CC8\r
-#antC35=../usecase/mu0_20mhz/12/ant_3.bin #CC8\r
-#antC36=../usecase/mu0_20mhz/12/ant_4.bin #CC9\r
-#antC37=../usecase/mu0_20mhz/12/ant_5.bin #CC9\r
-#antC38=../usecase/mu0_20mhz/12/ant_6.bin #CC9\r
-#antC39=../usecase/mu0_20mhz/12/ant_7.bin #CC9\r
-#antC40=../usecase/mu0_20mhz/12/ant_8.bin #CC10\r
-#antC41=../usecase/mu0_20mhz/12/ant_9.bin #CC10\r
-#antC42=../usecase/mu0_20mhz/12/ant_10.bin #CC10\r
-#antC43=../usecase/mu0_20mhz/12/ant_11.bin #CC10\r
-#antC44=../usecase/mu0_20mhz/12/ant_12.bin #CC11\r
-#antC45=../usecase/mu0_20mhz/12/ant_13.bin #CC11\r
-#antC46=../usecase/mu0_20mhz/12/ant_14.bin #CC11\r
-#antC47=../usecase/mu0_20mhz/12/ant_15.bin #CC11\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index\r
-\r
-antPrachC0=../usecase/mu0_20mhz/12/ant_0.bin\r
-antPrachC1=../usecase/mu0_20mhz/12/ant_1.bin\r
-antPrachC2=../usecase/mu0_20mhz/12/ant_2.bin\r
-antPrachC3=../usecase/mu0_20mhz/12/ant_3.bin\r
-antPrachC4=../usecase/mu0_20mhz/12/ant_4.bin\r
-antPrachC5=../usecase/mu0_20mhz/12/ant_5.bin\r
-antPrachC6=../usecase/mu0_20mhz/12/ant_6.bin\r
-antPrachC7=../usecase/mu0_20mhz/12/ant_7.bin\r
-antPrachC8=../usecase/mu0_20mhz/12/ant_8.bin\r
-antPrachC9=../usecase/mu0_20mhz/12/ant_9.bin\r
-antPrachC10=../usecase/mu0_20mhz/12/ant_10.bin\r
-antPrachC11=../usecase/mu0_20mhz/12/ant_11.bin\r
-antPrachC12=../usecase/mu0_20mhz/12/ant_12.bin\r
-antPrachC13=../usecase/mu0_20mhz/12/ant_13.bin\r
-antPrachC14=../usecase/mu0_20mhz/12/ant_14.bin\r
-antPrachC15=../usecase/mu0_20mhz/12/ant_15.bin\r
-antPrachC16=../usecase/mu0_20mhz/12/ant_0.bin\r
-antPrachC17=../usecase/mu0_20mhz/12/ant_1.bin\r
-antPrachC18=../usecase/mu0_20mhz/12/ant_2.bin\r
-antPrachC19=../usecase/mu0_20mhz/12/ant_3.bin\r
-antPrachC20=../usecase/mu0_20mhz/12/ant_4.bin\r
-antPrachC21=../usecase/mu0_20mhz/12/ant_5.bin\r
-antPrachC22=../usecase/mu0_20mhz/12/ant_6.bin\r
-antPrachC23=../usecase/mu0_20mhz/12/ant_7.bin\r
-antPrachC24=../usecase/mu0_20mhz/12/ant_8.bin\r
-antPrachC25=../usecase/mu0_20mhz/12/ant_9.bin\r
-antPrachC26=../usecase/mu0_20mhz/12/ant_10.bin\r
-antPrachC27=../usecase/mu0_20mhz/12/ant_11.bin\r
-antPrachC28=../usecase/mu0_20mhz/12/ant_12.bin\r
-antPrachC29=../usecase/mu0_20mhz/12/ant_13.bin\r
-antPrachC30=../usecase/mu0_20mhz/12/ant_14.bin\r
-antPrachC31=../usecase/mu0_20mhz/12/ant_15.bin\r
-antPrachC32=../usecase/mu0_20mhz/12/ant_0.bin\r
-antPrachC33=../usecase/mu0_20mhz/12/ant_1.bin\r
-antPrachC34=../usecase/mu0_20mhz/12/ant_2.bin\r
-antPrachC35=../usecase/mu0_20mhz/12/ant_3.bin\r
-antPrachC36=../usecase/mu0_20mhz/12/ant_4.bin\r
-antPrachC37=../usecase/mu0_20mhz/12/ant_5.bin\r
-antPrachC38=../usecase/mu0_20mhz/12/ant_6.bin\r
-antPrachC39=../usecase/mu0_20mhz/12/ant_7.bin\r
-antPrachC40=../usecase/mu0_20mhz/12/ant_8.bin\r
-antPrachC41=../usecase/mu0_20mhz/12/ant_9.bin\r
-antPrachC42=../usecase/mu0_20mhz/12/ant_10.bin\r
-antPrachC43=../usecase/mu0_20mhz/12/ant_11.bin\r
-antPrachC44=../usecase/mu0_20mhz/12/ant_12.bin\r
-antPrachC45=../usecase/mu0_20mhz/12/ant_13.bin\r
-antPrachC46=../usecase/mu0_20mhz/12/ant_14.bin\r
-antPrachC47=../usecase/mu0_20mhz/12/ant_15.bin\r
-\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-\r
-##Debug\r
-debugStop=0 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-c_plane_vlan_tag=1 #VLAN Tag used for C-Plane\r
-u_plane_vlan_tag=2 #VLAN Tag used for U-Plane\r
-\r
-##RU Settings\r
-Tadv_cp_dl=25 #in us TODO: update per RU implementation\r
- #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=400 #in us\r
-T2a_max_cp_dl=1120 #in us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=400 #in us\r
-T2a_max_cp_ul=1120 #in us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=200 # in us\r
-T2a_max_up=1120 # in us\r
-\r
-#Transmission Window\r
-Ta3_min=160 #in us\r
-Ta3_max=256 #in us\r
-\r
-###########################################################\r
-##lls-CU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=560\r
-T1a_max_cp_dl=800\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=480\r
-T1a_max_cp_ul=560\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=280\r
-T1a_max_up=400\r
-\r
-#Reception Window\r
-Ta4_min=0\r
-Ta4_max=360\r
-###########################################################\r
-\r
+#######################################################################
+#
+# <COPYRIGHT_TAG>
+#
+#######################################################################
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # lls-CU(0) | RU(1)
+xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)
+ccNum=6 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)
+antNum=4 # Number of Antennas per CC (default: 4)
+
+##Numerology
+mu=0 #15Khz Sub Carrier Spacing
+ttiPeriod=1000 # in us TTI period (15Khz default 1000us)
+nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=2048
+nULFftSize=2048
+
+nFrameDuplexType=0 # 0 - FDD 1 - TDD
+nTddPeriod=0 #TDD priod e.g. DDDS 4
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
+ioCore=3
+
+llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF
+#llsCUMac=3c:fd:fe:a8:e0:70 #lls-CU PF for tcpdump
+ruMac=00:11:22:33:44:55 #RU VF for RU app
+
+numSlots=20 #number of slots per IQ files
+#fd 10Mhz 2
+#antC0=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+#antC1=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+#antC2=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+#antC3=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC0=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC1=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC2=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC3=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC4=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC5=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC6=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC7=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC8=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC9=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC10=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC11=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC12=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC13=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC14=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC15=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC16=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC17=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC18=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC19=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC20=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC21=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC22=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC23=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC24=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC25=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC26=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC27=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC28=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC29=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC30=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC31=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC32=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC33=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC34=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC35=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC36=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC37=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC38=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC39=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC40=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC41=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC42=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC43=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC44=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC45=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC46=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC47=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+
+#antC0=../usecase/mu0_20mhz/12/ant_0.bin #CC0
+#antC1=../usecase/mu0_20mhz/12/ant_1.bin #CC0
+#antC2=../usecase/mu0_20mhz/12/ant_2.bin #CC0
+#antC3=../usecase/mu0_20mhz/12/ant_3.bin #CC0
+
+#antC0=../usecase/mu0_20mhz/12/ant_0.bin #CC0
+#antC1=../usecase/mu0_20mhz/12/ant_0.bin #CC0
+#antC2=../usecase/mu0_20mhz/12/ant_0.bin #CC0
+#antC3=../usecase/mu0_20mhz/12/ant_0.bin #CC0
+
+#antC4=../usecase/mu0_20mhz/12/ant_4.bin #CC1
+#antC5=../usecase/mu0_20mhz/12/ant_5.bin #CC1
+#antC6=../usecase/mu0_20mhz/12/ant_6.bin #CC1
+#antC7=../usecase/mu0_20mhz/12/ant_7.bin #CC1
+#antC8=../usecase/mu0_20mhz/12/ant_8.bin #CC2
+#antC9=../usecase/mu0_20mhz/12/ant_9.bin #CC2
+#antC10=../usecase/mu0_20mhz/12/ant_10.bin #CC2
+#antC11=../usecase/mu0_20mhz/12/ant_11.bin #CC2
+#antC12=../usecase/mu0_20mhz/12/ant_12.bin #CC3
+#antC13=../usecase/mu0_20mhz/12/ant_13.bin #CC3
+#antC14=../usecase/mu0_20mhz/12/ant_14.bin #CC3
+#antC15=../usecase/mu0_20mhz/12/ant_15.bin #CC3
+#antC16=../usecase/mu0_20mhz/12/ant_0.bin #CC4
+#antC17=../usecase/mu0_20mhz/12/ant_1.bin #CC4
+#antC18=../usecase/mu0_20mhz/12/ant_2.bin #CC4
+#antC19=../usecase/mu0_20mhz/12/ant_3.bin #CC4
+#antC20=../usecase/mu0_20mhz/12/ant_4.bin #CC5
+#antC21=../usecase/mu0_20mhz/12/ant_5.bin #CC5
+#antC22=../usecase/mu0_20mhz/12/ant_6.bin #CC5
+#antC23=../usecase/mu0_20mhz/12/ant_7.bin #CC5
+#antC24=../usecase/mu0_20mhz/12/ant_8.bin #CC6
+#antC25=../usecase/mu0_20mhz/12/ant_9.bin #CC6
+#antC26=../usecase/mu0_20mhz/12/ant_10.bin #CC6
+#antC27=../usecase/mu0_20mhz/12/ant_11.bin #CC6
+#antC28=../usecase/mu0_20mhz/12/ant_12.bin #CC7
+#antC29=../usecase/mu0_20mhz/12/ant_13.bin #CC7
+#antC30=../usecase/mu0_20mhz/12/ant_14.bin #CC7
+#antC31=../usecase/mu0_20mhz/12/ant_15.bin #CC7
+#antC32=../usecase/mu0_20mhz/12/ant_0.bin #CC8
+#antC33=../usecase/mu0_20mhz/12/ant_1.bin #CC8
+#antC34=../usecase/mu0_20mhz/12/ant_2.bin #CC8
+#antC35=../usecase/mu0_20mhz/12/ant_3.bin #CC8
+#antC36=../usecase/mu0_20mhz/12/ant_4.bin #CC9
+#antC37=../usecase/mu0_20mhz/12/ant_5.bin #CC9
+#antC38=../usecase/mu0_20mhz/12/ant_6.bin #CC9
+#antC39=../usecase/mu0_20mhz/12/ant_7.bin #CC9
+#antC40=../usecase/mu0_20mhz/12/ant_8.bin #CC10
+#antC41=../usecase/mu0_20mhz/12/ant_9.bin #CC10
+#antC42=../usecase/mu0_20mhz/12/ant_10.bin #CC10
+#antC43=../usecase/mu0_20mhz/12/ant_11.bin #CC10
+#antC44=../usecase/mu0_20mhz/12/ant_12.bin #CC11
+#antC45=../usecase/mu0_20mhz/12/ant_13.bin #CC11
+#antC46=../usecase/mu0_20mhz/12/ant_14.bin #CC11
+#antC47=../usecase/mu0_20mhz/12/ant_15.bin #CC11
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index
+
+antPrachC0=../usecase/mu0_20mhz/12/ant_0.bin
+antPrachC1=../usecase/mu0_20mhz/12/ant_1.bin
+antPrachC2=../usecase/mu0_20mhz/12/ant_2.bin
+antPrachC3=../usecase/mu0_20mhz/12/ant_3.bin
+antPrachC4=../usecase/mu0_20mhz/12/ant_4.bin
+antPrachC5=../usecase/mu0_20mhz/12/ant_5.bin
+antPrachC6=../usecase/mu0_20mhz/12/ant_6.bin
+antPrachC7=../usecase/mu0_20mhz/12/ant_7.bin
+antPrachC8=../usecase/mu0_20mhz/12/ant_8.bin
+antPrachC9=../usecase/mu0_20mhz/12/ant_9.bin
+antPrachC10=../usecase/mu0_20mhz/12/ant_10.bin
+antPrachC11=../usecase/mu0_20mhz/12/ant_11.bin
+antPrachC12=../usecase/mu0_20mhz/12/ant_12.bin
+antPrachC13=../usecase/mu0_20mhz/12/ant_13.bin
+antPrachC14=../usecase/mu0_20mhz/12/ant_14.bin
+antPrachC15=../usecase/mu0_20mhz/12/ant_15.bin
+antPrachC16=../usecase/mu0_20mhz/12/ant_0.bin
+antPrachC17=../usecase/mu0_20mhz/12/ant_1.bin
+antPrachC18=../usecase/mu0_20mhz/12/ant_2.bin
+antPrachC19=../usecase/mu0_20mhz/12/ant_3.bin
+antPrachC20=../usecase/mu0_20mhz/12/ant_4.bin
+antPrachC21=../usecase/mu0_20mhz/12/ant_5.bin
+antPrachC22=../usecase/mu0_20mhz/12/ant_6.bin
+antPrachC23=../usecase/mu0_20mhz/12/ant_7.bin
+antPrachC24=../usecase/mu0_20mhz/12/ant_8.bin
+antPrachC25=../usecase/mu0_20mhz/12/ant_9.bin
+antPrachC26=../usecase/mu0_20mhz/12/ant_10.bin
+antPrachC27=../usecase/mu0_20mhz/12/ant_11.bin
+antPrachC28=../usecase/mu0_20mhz/12/ant_12.bin
+antPrachC29=../usecase/mu0_20mhz/12/ant_13.bin
+antPrachC30=../usecase/mu0_20mhz/12/ant_14.bin
+antPrachC31=../usecase/mu0_20mhz/12/ant_15.bin
+antPrachC32=../usecase/mu0_20mhz/12/ant_0.bin
+antPrachC33=../usecase/mu0_20mhz/12/ant_1.bin
+antPrachC34=../usecase/mu0_20mhz/12/ant_2.bin
+antPrachC35=../usecase/mu0_20mhz/12/ant_3.bin
+antPrachC36=../usecase/mu0_20mhz/12/ant_4.bin
+antPrachC37=../usecase/mu0_20mhz/12/ant_5.bin
+antPrachC38=../usecase/mu0_20mhz/12/ant_6.bin
+antPrachC39=../usecase/mu0_20mhz/12/ant_7.bin
+antPrachC40=../usecase/mu0_20mhz/12/ant_8.bin
+antPrachC41=../usecase/mu0_20mhz/12/ant_9.bin
+antPrachC42=../usecase/mu0_20mhz/12/ant_10.bin
+antPrachC43=../usecase/mu0_20mhz/12/ant_11.bin
+antPrachC44=../usecase/mu0_20mhz/12/ant_12.bin
+antPrachC45=../usecase/mu0_20mhz/12/ant_13.bin
+antPrachC46=../usecase/mu0_20mhz/12/ant_14.bin
+antPrachC47=../usecase/mu0_20mhz/12/ant_15.bin
+
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+
+##Debug
+debugStop=0 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+c_plane_vlan_tag=1 #VLAN Tag used for C-Plane
+u_plane_vlan_tag=2 #VLAN Tag used for U-Plane
+
+##RU Settings
+Tadv_cp_dl=25 #in us TODO: update per RU implementation
+ #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+
+#Reception Window C-plane DL
+T2a_min_cp_dl=400 #in us
+T2a_max_cp_dl=1120 #in us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=400 #in us
+T2a_max_cp_ul=1120 #in us
+
+#Reception Window U-plane
+T2a_min_up=200 # in us
+T2a_max_up=1120 # in us
+
+#Transmission Window
+Ta3_min=160 #in us
+Ta3_max=256 #in us
+
+###########################################################
+##lls-CU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=560
+T1a_max_cp_dl=800
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=480
+T1a_max_cp_ul=560
+
+#U-plane
+##Transmission Window
+T1a_min_up=280
+T1a_max_up=400
+
+#Reception Window
+Ta4_min=0
+Ta4_max=360
+###########################################################
+
-#######################################################################\r
-#\r
-# <COPYRIGHT_TAG>\r
-#\r
-#######################################################################\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # lls-CU(0) | RU(1)\r
-xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)\r
-ccNum=6 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)\r
-antNum=4 # Number of Antennas per CC (default: 4)\r
-\r
-##Numerology\r
-mu=0 #15Khz Sub Carrier Spacing\r
-ttiPeriod=1000 # in us TTI period (15Khz default 1000us)\r
-nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=2048\r
-nULFftSize=2048\r
-\r
-nFrameDuplexType=0 # 0 - FDD 1 - TDD\r
-nTddPeriod=0 #TDD priod e.g. DDDS 4\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single\r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
-ioCore=10\r
-\r
-llsCUMac=00:11:22:33:44:77 # asigned MAC of lls-CU VF\r
-#llsCUMac=3c:fd:fe:a8:e0:70 #lls-CU PF for tcpdump\r
-ruMac=00:11:22:33:44:44 #RU VF for RU app\r
-\r
-numSlots=20 #number of slots per IQ files\r
-#fd 10Mhz 2\r
-#antC0=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-#antC1=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-#antC2=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-#antC3=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC0=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC1=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC2=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC3=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC4=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC5=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC6=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC7=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC8=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC9=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC10=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC11=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC12=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC13=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC14=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC15=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC16=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC17=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC18=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC19=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC20=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC21=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC22=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC23=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC24=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC25=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC26=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC27=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC28=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC29=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC30=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC31=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC32=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC33=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC34=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC35=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC36=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC37=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC38=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC39=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC40=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC41=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC42=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC43=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-antC44=../usecase/mu0_20mhz/12/uliq0.bin #CC0\r
-antC45=../usecase/mu0_20mhz/12/uliq1.bin #CC0\r
-antC46=../usecase/mu0_20mhz/12/uliq2.bin #CC0\r
-antC47=../usecase/mu0_20mhz/12/uliq3.bin #CC0\r
-\r
-\r
-#antC0=../usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-#antC1=../usecase/mu0_20mhz/12/ant_1.bin #CC0\r
-#antC2=../usecase/mu0_20mhz/12/ant_2.bin #CC0\r
-#antC3=../usecase/mu0_20mhz/12/ant_3.bin #CC0\r
-\r
-#antC0=../usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-#antC1=../usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-#antC2=../usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-#antC3=../usecase/mu0_20mhz/12/ant_0.bin #CC0\r
-\r
-#antC4=../usecase/mu0_20mhz/12/ant_4.bin #CC1\r
-#antC5=../usecase/mu0_20mhz/12/ant_5.bin #CC1\r
-#antC6=../usecase/mu0_20mhz/12/ant_6.bin #CC1\r
-#antC7=../usecase/mu0_20mhz/12/ant_7.bin #CC1\r
-#antC8=../usecase/mu0_20mhz/12/ant_8.bin #CC2\r
-#antC9=../usecase/mu0_20mhz/12/ant_9.bin #CC2\r
-#antC10=../usecase/mu0_20mhz/12/ant_10.bin #CC2\r
-#antC11=../usecase/mu0_20mhz/12/ant_11.bin #CC2\r
-#antC12=../usecase/mu0_20mhz/12/ant_12.bin #CC3\r
-#antC13=../usecase/mu0_20mhz/12/ant_13.bin #CC3\r
-#antC14=../usecase/mu0_20mhz/12/ant_14.bin #CC3\r
-#antC15=../usecase/mu0_20mhz/12/ant_15.bin #CC3\r
-#antC16=../usecase/mu0_20mhz/12/ant_0.bin #CC4\r
-#antC17=../usecase/mu0_20mhz/12/ant_1.bin #CC4\r
-#antC18=../usecase/mu0_20mhz/12/ant_2.bin #CC4\r
-#antC19=../usecase/mu0_20mhz/12/ant_3.bin #CC4\r
-#antC20=../usecase/mu0_20mhz/12/ant_4.bin #CC5\r
-#antC21=../usecase/mu0_20mhz/12/ant_5.bin #CC5\r
-#antC22=../usecase/mu0_20mhz/12/ant_6.bin #CC5\r
-#antC23=../usecase/mu0_20mhz/12/ant_7.bin #CC5\r
-#antC24=../usecase/mu0_20mhz/12/ant_8.bin #CC6\r
-#antC25=../usecase/mu0_20mhz/12/ant_9.bin #CC6\r
-#antC26=../usecase/mu0_20mhz/12/ant_10.bin #CC6\r
-#antC27=../usecase/mu0_20mhz/12/ant_11.bin #CC6\r
-#antC28=../usecase/mu0_20mhz/12/ant_12.bin #CC7\r
-#antC29=../usecase/mu0_20mhz/12/ant_13.bin #CC7\r
-#antC30=../usecase/mu0_20mhz/12/ant_14.bin #CC7\r
-#antC31=../usecase/mu0_20mhz/12/ant_15.bin #CC7\r
-#antC32=../usecase/mu0_20mhz/12/ant_0.bin #CC8\r
-#antC33=../usecase/mu0_20mhz/12/ant_1.bin #CC8\r
-#antC34=../usecase/mu0_20mhz/12/ant_2.bin #CC8\r
-#antC35=../usecase/mu0_20mhz/12/ant_3.bin #CC8\r
-#antC36=../usecase/mu0_20mhz/12/ant_4.bin #CC9\r
-#antC37=../usecase/mu0_20mhz/12/ant_5.bin #CC9\r
-#antC38=../usecase/mu0_20mhz/12/ant_6.bin #CC9\r
-#antC39=../usecase/mu0_20mhz/12/ant_7.bin #CC9\r
-#antC40=../usecase/mu0_20mhz/12/ant_8.bin #CC10\r
-#antC41=../usecase/mu0_20mhz/12/ant_9.bin #CC10\r
-#antC42=../usecase/mu0_20mhz/12/ant_10.bin #CC10\r
-#antC43=../usecase/mu0_20mhz/12/ant_11.bin #CC10\r
-#antC44=../usecase/mu0_20mhz/12/ant_12.bin #CC11\r
-#antC45=../usecase/mu0_20mhz/12/ant_13.bin #CC11\r
-#antC46=../usecase/mu0_20mhz/12/ant_14.bin #CC11\r
-#antC47=../usecase/mu0_20mhz/12/ant_15.bin #CC11\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index\r
-\r
-antPrachC0=../usecase/mu0_20mhz/12/ant_0.bin\r
-antPrachC1=../usecase/mu0_20mhz/12/ant_1.bin\r
-antPrachC2=../usecase/mu0_20mhz/12/ant_2.bin\r
-antPrachC3=../usecase/mu0_20mhz/12/ant_3.bin\r
-antPrachC4=../usecase/mu0_20mhz/12/ant_4.bin\r
-antPrachC5=../usecase/mu0_20mhz/12/ant_5.bin\r
-antPrachC6=../usecase/mu0_20mhz/12/ant_6.bin\r
-antPrachC7=../usecase/mu0_20mhz/12/ant_7.bin\r
-antPrachC8=../usecase/mu0_20mhz/12/ant_8.bin\r
-antPrachC9=../usecase/mu0_20mhz/12/ant_9.bin\r
-antPrachC10=../usecase/mu0_20mhz/12/ant_10.bin\r
-antPrachC11=../usecase/mu0_20mhz/12/ant_11.bin\r
-antPrachC12=../usecase/mu0_20mhz/12/ant_12.bin\r
-antPrachC13=../usecase/mu0_20mhz/12/ant_13.bin\r
-antPrachC14=../usecase/mu0_20mhz/12/ant_14.bin\r
-antPrachC15=../usecase/mu0_20mhz/12/ant_15.bin\r
-antPrachC16=../usecase/mu0_20mhz/12/ant_0.bin\r
-antPrachC17=../usecase/mu0_20mhz/12/ant_1.bin\r
-antPrachC18=../usecase/mu0_20mhz/12/ant_2.bin\r
-antPrachC19=../usecase/mu0_20mhz/12/ant_3.bin\r
-antPrachC20=../usecase/mu0_20mhz/12/ant_4.bin\r
-antPrachC21=../usecase/mu0_20mhz/12/ant_5.bin\r
-antPrachC22=../usecase/mu0_20mhz/12/ant_6.bin\r
-antPrachC23=../usecase/mu0_20mhz/12/ant_7.bin\r
-antPrachC24=../usecase/mu0_20mhz/12/ant_8.bin\r
-antPrachC25=../usecase/mu0_20mhz/12/ant_9.bin\r
-antPrachC26=../usecase/mu0_20mhz/12/ant_10.bin\r
-antPrachC27=../usecase/mu0_20mhz/12/ant_11.bin\r
-antPrachC28=../usecase/mu0_20mhz/12/ant_12.bin\r
-antPrachC29=../usecase/mu0_20mhz/12/ant_13.bin\r
-antPrachC30=../usecase/mu0_20mhz/12/ant_14.bin\r
-antPrachC31=../usecase/mu0_20mhz/12/ant_15.bin\r
-antPrachC32=../usecase/mu0_20mhz/12/ant_0.bin\r
-antPrachC33=../usecase/mu0_20mhz/12/ant_1.bin\r
-antPrachC34=../usecase/mu0_20mhz/12/ant_2.bin\r
-antPrachC35=../usecase/mu0_20mhz/12/ant_3.bin\r
-antPrachC36=../usecase/mu0_20mhz/12/ant_4.bin\r
-antPrachC37=../usecase/mu0_20mhz/12/ant_5.bin\r
-antPrachC38=../usecase/mu0_20mhz/12/ant_6.bin\r
-antPrachC39=../usecase/mu0_20mhz/12/ant_7.bin\r
-antPrachC40=../usecase/mu0_20mhz/12/ant_8.bin\r
-antPrachC41=../usecase/mu0_20mhz/12/ant_9.bin\r
-antPrachC42=../usecase/mu0_20mhz/12/ant_10.bin\r
-antPrachC43=../usecase/mu0_20mhz/12/ant_11.bin\r
-antPrachC44=../usecase/mu0_20mhz/12/ant_12.bin\r
-antPrachC45=../usecase/mu0_20mhz/12/ant_13.bin\r
-antPrachC46=../usecase/mu0_20mhz/12/ant_14.bin\r
-antPrachC47=../usecase/mu0_20mhz/12/ant_15.bin\r
-\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-\r
-##Debug\r
-debugStop=0 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-c_plane_vlan_tag=1 #VLAN Tag used for C-Plane\r
-u_plane_vlan_tag=2 #VLAN Tag used for U-Plane\r
-\r
-##RU Settings\r
-Tadv_cp_dl=25 #in us TODO: update per RU implementation\r
- #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=400 #in us\r
-T2a_max_cp_dl=1120 #in us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=400 #in us\r
-T2a_max_cp_ul=1120 #in us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=200 # in us\r
-T2a_max_up=1120 # in us\r
-\r
-#Transmission Window\r
-Ta3_min=160 #in us\r
-Ta3_max=256 #in us\r
-\r
-###########################################################\r
-##lls-CU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=560\r
-T1a_max_cp_dl=800\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=480\r
-T1a_max_cp_ul=560\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=280\r
-T1a_max_up=400\r
-\r
-#Reception Window\r
-Ta4_min=0\r
-Ta4_max=360\r
-###########################################################\r
-\r
+#######################################################################
+#
+# <COPYRIGHT_TAG>
+#
+#######################################################################
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # lls-CU(0) | RU(1)
+xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)
+ccNum=6 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)
+antNum=4 # Number of Antennas per CC (default: 4)
+
+##Numerology
+mu=0 #15Khz Sub Carrier Spacing
+ttiPeriod=1000 # in us TTI period (15Khz default 1000us)
+nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=2048
+nULFftSize=2048
+
+nFrameDuplexType=0 # 0 - FDD 1 - TDD
+nTddPeriod=0 #TDD priod e.g. DDDS 4
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
+ioCore=10
+
+llsCUMac=00:11:22:33:44:77 # asigned MAC of lls-CU VF
+#llsCUMac=3c:fd:fe:a8:e0:70 #lls-CU PF for tcpdump
+ruMac=00:11:22:33:44:44 #RU VF for RU app
+
+numSlots=20 #number of slots per IQ files
+#fd 10Mhz 2
+#antC0=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+#antC1=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+#antC2=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+#antC3=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC0=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC1=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC2=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC3=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC4=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC5=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC6=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC7=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC8=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC9=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC10=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC11=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC12=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC13=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC14=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC15=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC16=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC17=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC18=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC19=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC20=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC21=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC22=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC23=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC24=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC25=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC26=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC27=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC28=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC29=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC30=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC31=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC32=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC33=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC34=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC35=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC36=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC37=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC38=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC39=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC40=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC41=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC42=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC43=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+antC44=../usecase/mu0_20mhz/12/uliq0.bin #CC0
+antC45=../usecase/mu0_20mhz/12/uliq1.bin #CC0
+antC46=../usecase/mu0_20mhz/12/uliq2.bin #CC0
+antC47=../usecase/mu0_20mhz/12/uliq3.bin #CC0
+
+
+#antC0=../usecase/mu0_20mhz/12/ant_0.bin #CC0
+#antC1=../usecase/mu0_20mhz/12/ant_1.bin #CC0
+#antC2=../usecase/mu0_20mhz/12/ant_2.bin #CC0
+#antC3=../usecase/mu0_20mhz/12/ant_3.bin #CC0
+
+#antC0=../usecase/mu0_20mhz/12/ant_0.bin #CC0
+#antC1=../usecase/mu0_20mhz/12/ant_0.bin #CC0
+#antC2=../usecase/mu0_20mhz/12/ant_0.bin #CC0
+#antC3=../usecase/mu0_20mhz/12/ant_0.bin #CC0
+
+#antC4=../usecase/mu0_20mhz/12/ant_4.bin #CC1
+#antC5=../usecase/mu0_20mhz/12/ant_5.bin #CC1
+#antC6=../usecase/mu0_20mhz/12/ant_6.bin #CC1
+#antC7=../usecase/mu0_20mhz/12/ant_7.bin #CC1
+#antC8=../usecase/mu0_20mhz/12/ant_8.bin #CC2
+#antC9=../usecase/mu0_20mhz/12/ant_9.bin #CC2
+#antC10=../usecase/mu0_20mhz/12/ant_10.bin #CC2
+#antC11=../usecase/mu0_20mhz/12/ant_11.bin #CC2
+#antC12=../usecase/mu0_20mhz/12/ant_12.bin #CC3
+#antC13=../usecase/mu0_20mhz/12/ant_13.bin #CC3
+#antC14=../usecase/mu0_20mhz/12/ant_14.bin #CC3
+#antC15=../usecase/mu0_20mhz/12/ant_15.bin #CC3
+#antC16=../usecase/mu0_20mhz/12/ant_0.bin #CC4
+#antC17=../usecase/mu0_20mhz/12/ant_1.bin #CC4
+#antC18=../usecase/mu0_20mhz/12/ant_2.bin #CC4
+#antC19=../usecase/mu0_20mhz/12/ant_3.bin #CC4
+#antC20=../usecase/mu0_20mhz/12/ant_4.bin #CC5
+#antC21=../usecase/mu0_20mhz/12/ant_5.bin #CC5
+#antC22=../usecase/mu0_20mhz/12/ant_6.bin #CC5
+#antC23=../usecase/mu0_20mhz/12/ant_7.bin #CC5
+#antC24=../usecase/mu0_20mhz/12/ant_8.bin #CC6
+#antC25=../usecase/mu0_20mhz/12/ant_9.bin #CC6
+#antC26=../usecase/mu0_20mhz/12/ant_10.bin #CC6
+#antC27=../usecase/mu0_20mhz/12/ant_11.bin #CC6
+#antC28=../usecase/mu0_20mhz/12/ant_12.bin #CC7
+#antC29=../usecase/mu0_20mhz/12/ant_13.bin #CC7
+#antC30=../usecase/mu0_20mhz/12/ant_14.bin #CC7
+#antC31=../usecase/mu0_20mhz/12/ant_15.bin #CC7
+#antC32=../usecase/mu0_20mhz/12/ant_0.bin #CC8
+#antC33=../usecase/mu0_20mhz/12/ant_1.bin #CC8
+#antC34=../usecase/mu0_20mhz/12/ant_2.bin #CC8
+#antC35=../usecase/mu0_20mhz/12/ant_3.bin #CC8
+#antC36=../usecase/mu0_20mhz/12/ant_4.bin #CC9
+#antC37=../usecase/mu0_20mhz/12/ant_5.bin #CC9
+#antC38=../usecase/mu0_20mhz/12/ant_6.bin #CC9
+#antC39=../usecase/mu0_20mhz/12/ant_7.bin #CC9
+#antC40=../usecase/mu0_20mhz/12/ant_8.bin #CC10
+#antC41=../usecase/mu0_20mhz/12/ant_9.bin #CC10
+#antC42=../usecase/mu0_20mhz/12/ant_10.bin #CC10
+#antC43=../usecase/mu0_20mhz/12/ant_11.bin #CC10
+#antC44=../usecase/mu0_20mhz/12/ant_12.bin #CC11
+#antC45=../usecase/mu0_20mhz/12/ant_13.bin #CC11
+#antC46=../usecase/mu0_20mhz/12/ant_14.bin #CC11
+#antC47=../usecase/mu0_20mhz/12/ant_15.bin #CC11
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index
+
+antPrachC0=../usecase/mu0_20mhz/12/ant_0.bin
+antPrachC1=../usecase/mu0_20mhz/12/ant_1.bin
+antPrachC2=../usecase/mu0_20mhz/12/ant_2.bin
+antPrachC3=../usecase/mu0_20mhz/12/ant_3.bin
+antPrachC4=../usecase/mu0_20mhz/12/ant_4.bin
+antPrachC5=../usecase/mu0_20mhz/12/ant_5.bin
+antPrachC6=../usecase/mu0_20mhz/12/ant_6.bin
+antPrachC7=../usecase/mu0_20mhz/12/ant_7.bin
+antPrachC8=../usecase/mu0_20mhz/12/ant_8.bin
+antPrachC9=../usecase/mu0_20mhz/12/ant_9.bin
+antPrachC10=../usecase/mu0_20mhz/12/ant_10.bin
+antPrachC11=../usecase/mu0_20mhz/12/ant_11.bin
+antPrachC12=../usecase/mu0_20mhz/12/ant_12.bin
+antPrachC13=../usecase/mu0_20mhz/12/ant_13.bin
+antPrachC14=../usecase/mu0_20mhz/12/ant_14.bin
+antPrachC15=../usecase/mu0_20mhz/12/ant_15.bin
+antPrachC16=../usecase/mu0_20mhz/12/ant_0.bin
+antPrachC17=../usecase/mu0_20mhz/12/ant_1.bin
+antPrachC18=../usecase/mu0_20mhz/12/ant_2.bin
+antPrachC19=../usecase/mu0_20mhz/12/ant_3.bin
+antPrachC20=../usecase/mu0_20mhz/12/ant_4.bin
+antPrachC21=../usecase/mu0_20mhz/12/ant_5.bin
+antPrachC22=../usecase/mu0_20mhz/12/ant_6.bin
+antPrachC23=../usecase/mu0_20mhz/12/ant_7.bin
+antPrachC24=../usecase/mu0_20mhz/12/ant_8.bin
+antPrachC25=../usecase/mu0_20mhz/12/ant_9.bin
+antPrachC26=../usecase/mu0_20mhz/12/ant_10.bin
+antPrachC27=../usecase/mu0_20mhz/12/ant_11.bin
+antPrachC28=../usecase/mu0_20mhz/12/ant_12.bin
+antPrachC29=../usecase/mu0_20mhz/12/ant_13.bin
+antPrachC30=../usecase/mu0_20mhz/12/ant_14.bin
+antPrachC31=../usecase/mu0_20mhz/12/ant_15.bin
+antPrachC32=../usecase/mu0_20mhz/12/ant_0.bin
+antPrachC33=../usecase/mu0_20mhz/12/ant_1.bin
+antPrachC34=../usecase/mu0_20mhz/12/ant_2.bin
+antPrachC35=../usecase/mu0_20mhz/12/ant_3.bin
+antPrachC36=../usecase/mu0_20mhz/12/ant_4.bin
+antPrachC37=../usecase/mu0_20mhz/12/ant_5.bin
+antPrachC38=../usecase/mu0_20mhz/12/ant_6.bin
+antPrachC39=../usecase/mu0_20mhz/12/ant_7.bin
+antPrachC40=../usecase/mu0_20mhz/12/ant_8.bin
+antPrachC41=../usecase/mu0_20mhz/12/ant_9.bin
+antPrachC42=../usecase/mu0_20mhz/12/ant_10.bin
+antPrachC43=../usecase/mu0_20mhz/12/ant_11.bin
+antPrachC44=../usecase/mu0_20mhz/12/ant_12.bin
+antPrachC45=../usecase/mu0_20mhz/12/ant_13.bin
+antPrachC46=../usecase/mu0_20mhz/12/ant_14.bin
+antPrachC47=../usecase/mu0_20mhz/12/ant_15.bin
+
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+
+##Debug
+debugStop=0 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+c_plane_vlan_tag=1 #VLAN Tag used for C-Plane
+u_plane_vlan_tag=2 #VLAN Tag used for U-Plane
+
+##RU Settings
+Tadv_cp_dl=25 #in us TODO: update per RU implementation
+ #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+
+#Reception Window C-plane DL
+T2a_min_cp_dl=400 #in us
+T2a_max_cp_dl=1120 #in us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=400 #in us
+T2a_max_cp_ul=1120 #in us
+
+#Reception Window U-plane
+T2a_min_up=200 # in us
+T2a_max_up=1120 # in us
+
+#Transmission Window
+Ta3_min=160 #in us
+Ta3_max=256 #in us
+
+###########################################################
+##lls-CU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=560
+T1a_max_cp_dl=800
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=480
+T1a_max_cp_ul=560
+
+#U-plane
+##Transmission Window
+T1a_min_up=280
+T1a_max_up=400
+
+#Reception Window
+Ta4_min=0
+Ta4_max=360
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # lls-CU(0) | RU(1)\r
-xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)\r
-antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-\r
-##Numerology\r
-mu=0 #15Khz Sub Carrier Spacing\r
-ttiPeriod=1000 # in us TTI period (15Khz default 1000us)\r
-nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=2048\r
-nULFftSize=2048\r
-\r
-nFrameDuplexType=0 # 0 - FDD 1 - TDD\r
-nTddPeriod=0 #TDD priod e.g. DDDS 4\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # lls-CU(0) | RU(1)
+xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)
+antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+
+##Numerology
+mu=0 #15Khz Sub Carrier Spacing
+ttiPeriod=1000 # in us TTI period (15Khz default 1000us)
+nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=2048
+nULFftSize=2048
+
+nFrameDuplexType=0 # 0 - FDD 1 - TDD
+nTddPeriod=0 #TDD priod e.g. DDDS 4
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=5
systemCore=5
pktProcCore=5
pktAuxCore=5
timingCore=6
-llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF\r
-ruMac=00:11:22:33:44:55 #RU VF for RU app\r
-numSlots=40 #number of slots per IQ files\r
-antC0=./usecase/mu0_20mhz/ant_0.bin #CC0\r
-antC1=./usecase/mu0_20mhz/ant_1.bin #CC0\r
-antC2=./usecase/mu0_20mhz/ant_2.bin #CC0\r
-antC3=./usecase/mu0_20mhz/ant_3.bin #CC0\r
-antC4=./usecase/mu0_20mhz/ant_4.bin #CC1\r
-antC5=./usecase/mu0_20mhz/ant_5.bin #CC1\r
-antC6=./usecase/mu0_20mhz/ant_6.bin #CC1\r
-antC7=./usecase/mu0_20mhz/ant_7.bin #CC1\r
-antC8=./usecase/mu0_20mhz/ant_8.bin #CC2\r
-antC9=./usecase/mu0_20mhz/ant_9.bin #CC2\r
-antC10=./usecase/mu0_20mhz/ant_10.bin #CC2\r
-antC11=./usecase/mu0_20mhz/ant_11.bin #CC2\r
-antC12=./usecase/mu0_20mhz/ant_12.bin #CC3\r
-antC13=./usecase/mu0_20mhz/ant_13.bin #CC3\r
-antC14=./usecase/mu0_20mhz/ant_14.bin #CC3\r
-antC15=./usecase/mu0_20mhz/ant_15.bin #CC3\r
-\r
-## RACH TODO: update for PRACH\r
-rachEanble=1 # Enable (1)| disable (0) PRACH configuration\r
-#rachOffset=43 # RB offset for prach detection (see RIU spec)\r
-#rachCfgIdx=14 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index\r
-\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-c_plane_vlan_tag=1 #VLAN Tag used for C-Plane\r
-u_plane_vlan_tag=2 #VLAN Tag used for U-Plane\r
-\r
-##RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 #in us TODO: update per RU implementation\r
- #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=400 #in us \r
-T2a_max_cp_dl=1120 #in us \r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=400 #in us \r
-T2a_max_cp_ul=1120 #in us \r
-\r
-#Reception Window U-plane\r
-T2a_min_up=200 # in us\r
-T2a_max_up=1120 # in us\r
-\r
-#Transmission Window\r
-Ta3_min=160 #in us\r
-Ta3_max=256 #in us\r
-\r
-###########################################################\r
-##lls-CU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=560\r
-T1a_max_cp_dl=800\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=480\r
-T1a_max_cp_ul=560\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=280\r
-T1a_max_up=400\r
-\r
-#Reception Window\r
-Ta4_min=0\r
-Ta4_max=360\r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF
+ruMac=00:11:22:33:44:55 #RU VF for RU app
+numSlots=40 #number of slots per IQ files
+antC0=./usecase/mu0_20mhz/ant_0.bin #CC0
+antC1=./usecase/mu0_20mhz/ant_1.bin #CC0
+antC2=./usecase/mu0_20mhz/ant_2.bin #CC0
+antC3=./usecase/mu0_20mhz/ant_3.bin #CC0
+antC4=./usecase/mu0_20mhz/ant_4.bin #CC1
+antC5=./usecase/mu0_20mhz/ant_5.bin #CC1
+antC6=./usecase/mu0_20mhz/ant_6.bin #CC1
+antC7=./usecase/mu0_20mhz/ant_7.bin #CC1
+antC8=./usecase/mu0_20mhz/ant_8.bin #CC2
+antC9=./usecase/mu0_20mhz/ant_9.bin #CC2
+antC10=./usecase/mu0_20mhz/ant_10.bin #CC2
+antC11=./usecase/mu0_20mhz/ant_11.bin #CC2
+antC12=./usecase/mu0_20mhz/ant_12.bin #CC3
+antC13=./usecase/mu0_20mhz/ant_13.bin #CC3
+antC14=./usecase/mu0_20mhz/ant_14.bin #CC3
+antC15=./usecase/mu0_20mhz/ant_15.bin #CC3
+
+## RACH TODO: update for PRACH
+rachEanble=1 # Enable (1)| disable (0) PRACH configuration
+#rachOffset=43 # RB offset for prach detection (see RIU spec)
+#rachCfgIdx=14 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index
+
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+c_plane_vlan_tag=1 #VLAN Tag used for C-Plane
+u_plane_vlan_tag=2 #VLAN Tag used for U-Plane
+
+##RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 #in us TODO: update per RU implementation
+ #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+
+#Reception Window C-plane DL
+T2a_min_cp_dl=400 #in us
+T2a_max_cp_dl=1120 #in us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=400 #in us
+T2a_max_cp_ul=1120 #in us
+
+#Reception Window U-plane
+T2a_min_up=200 # in us
+T2a_max_up=1120 # in us
+
+#Transmission Window
+Ta3_min=160 #in us
+Ta3_max=256 #in us
+
+###########################################################
+##lls-CU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=560
+T1a_max_cp_dl=800
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=480
+T1a_max_cp_ul=560
+
+#U-plane
+##Transmission Window
+T1a_min_up=280
+T1a_max_up=400
+
+#Reception Window
+Ta4_min=0
+Ta4_max=360
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # O-DU(0) | O-RU(1)\r
-xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)\r
-antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-\r
-##Numerology\r
-mu=0 #15Khz Sub Carrier Spacing\r
-ttiPeriod=1000 # in us TTI period (15Khz default 1000us)\r
-nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=2048\r
-nULFftSize=2048\r
-\r
-nFrameDuplexType=0 # 0 - FDD 1 - TDD\r
-nTddPeriod=0 #TDD priod e.g. DDDS 4\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
+xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)
+antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+
+##Numerology
+mu=0 #15Khz Sub Carrier Spacing
+ttiPeriod=1000 # in us TTI period (15Khz default 1000us)
+nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=2048
+nULFftSize=2048
+
+nFrameDuplexType=0 # 0 - FDD 1 - TDD
+nTddPeriod=0 #TDD priod e.g. DDDS 4
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=10
systemCore=10
pktProcCore=10
pktAuxCore=10
timingCore=11
-llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF\r
-#llsCUMac=3c:fd:fe:a8:e0:70\r
-ruMac=00:11:22:33:44:55 #RU VF for RU app\r
-numSlots=40 #number of slots per IQ files\r
-antC0=./usecase/mu0_20mhz/ant_0.bin #CC0\r
-antC1=./usecase/mu0_20mhz/ant_1.bin #CC0\r
-antC2=./usecase/mu0_20mhz/ant_2.bin #CC0\r
-antC3=./usecase/mu0_20mhz/ant_3.bin #CC0\r
-antC4=./usecase/mu0_20mhz/ant_4.bin #CC1\r
-antC5=./usecase/mu0_20mhz/ant_5.bin #CC1\r
-antC6=./usecase/mu0_20mhz/ant_6.bin #CC1\r
-antC7=./usecase/mu0_20mhz/ant_7.bin #CC1\r
-antC8=./usecase/mu0_20mhz/ant_8.bin #CC2\r
-antC9=./usecase/mu0_20mhz/ant_9.bin #CC2\r
-antC10=./usecase/mu0_20mhz/ant_10.bin #CC2\r
-antC11=./usecase/mu0_20mhz/ant_11.bin #CC2\r
-antC12=./usecase/mu0_20mhz/ant_12.bin #CC3\r
-antC13=./usecase/mu0_20mhz/ant_13.bin #CC3\r
-antC14=./usecase/mu0_20mhz/ant_14.bin #CC3\r
-antC15=./usecase/mu0_20mhz/ant_15.bin #CC3\r
-\r
-## RACH TODO: update for PRACH\r
-rachEanble=1 # Enable (1)| disable (0) PRACH configuration\r
-#rachOffset=43 # RB offset for prach detection (see RIU spec)\r
-prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index\r
-\r
-antPrachC0=./usecase/mu0_20mhz/ant_0.bin\r
-antPrachC1=./usecase/mu0_20mhz/ant_1.bin\r
-antPrachC2=./usecase/mu0_20mhz/ant_2.bin\r
-antPrachC3=./usecase/mu0_20mhz/ant_3.bin\r
-\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-c_plane_vlan_tag=1 #VLAN Tag used for C-Plane\r
-u_plane_vlan_tag=2 #VLAN Tag used for U-Plane\r
-\r
-##RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 #in us TODO: update per RU implementation\r
- #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=400 #in us \r
-T2a_max_cp_dl=1120 #in us \r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=400 #in us \r
-T2a_max_cp_ul=1120 #in us \r
-\r
-#Reception Window U-plane\r
-T2a_min_up=200 # in us\r
-T2a_max_up=1120 # in us\r
-\r
-#Transmission Window\r
-Ta3_min=160 #in us\r
-Ta3_max=256 #in us\r
-\r
-###########################################################\r
-##lls-CU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=560\r
-T1a_max_cp_dl=800\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=480\r
-T1a_max_cp_ul=560\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=280\r
-T1a_max_up=400\r
-\r
-#Reception Window\r
-Ta4_min=0\r
-Ta4_max=360\r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF
+#llsCUMac=3c:fd:fe:a8:e0:70
+ruMac=00:11:22:33:44:55 #RU VF for RU app
+numSlots=40 #number of slots per IQ files
+antC0=./usecase/mu0_20mhz/ant_0.bin #CC0
+antC1=./usecase/mu0_20mhz/ant_1.bin #CC0
+antC2=./usecase/mu0_20mhz/ant_2.bin #CC0
+antC3=./usecase/mu0_20mhz/ant_3.bin #CC0
+antC4=./usecase/mu0_20mhz/ant_4.bin #CC1
+antC5=./usecase/mu0_20mhz/ant_5.bin #CC1
+antC6=./usecase/mu0_20mhz/ant_6.bin #CC1
+antC7=./usecase/mu0_20mhz/ant_7.bin #CC1
+antC8=./usecase/mu0_20mhz/ant_8.bin #CC2
+antC9=./usecase/mu0_20mhz/ant_9.bin #CC2
+antC10=./usecase/mu0_20mhz/ant_10.bin #CC2
+antC11=./usecase/mu0_20mhz/ant_11.bin #CC2
+antC12=./usecase/mu0_20mhz/ant_12.bin #CC3
+antC13=./usecase/mu0_20mhz/ant_13.bin #CC3
+antC14=./usecase/mu0_20mhz/ant_14.bin #CC3
+antC15=./usecase/mu0_20mhz/ant_15.bin #CC3
+
+## RACH TODO: update for PRACH
+rachEanble=1 # Enable (1)| disable (0) PRACH configuration
+#rachOffset=43 # RB offset for prach detection (see RIU spec)
+prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index
+
+antPrachC0=./usecase/mu0_20mhz/ant_0.bin
+antPrachC1=./usecase/mu0_20mhz/ant_1.bin
+antPrachC2=./usecase/mu0_20mhz/ant_2.bin
+antPrachC3=./usecase/mu0_20mhz/ant_3.bin
+
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+c_plane_vlan_tag=1 #VLAN Tag used for C-Plane
+u_plane_vlan_tag=2 #VLAN Tag used for U-Plane
+
+##RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 #in us TODO: update per RU implementation
+ #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+
+#Reception Window C-plane DL
+T2a_min_cp_dl=400 #in us
+T2a_max_cp_dl=1120 #in us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=400 #in us
+T2a_max_cp_ul=1120 #in us
+
+#Reception Window U-plane
+T2a_min_up=200 # in us
+T2a_max_up=1120 # in us
+
+#Transmission Window
+Ta3_min=160 #in us
+Ta3_max=256 #in us
+
+###########################################################
+##lls-CU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=560
+T1a_max_cp_dl=800
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=480
+T1a_max_cp_ul=560
+
+#U-plane
+##Transmission Window
+T1a_min_up=280
+T1a_max_up=400
+
+#Reception Window
+Ta4_min=0
+Ta4_max=360
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # lls-CU(0) | RU(1)\r
-xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)\r
-antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-\r
-##Numerology\r
-mu=0 #15Khz Sub Carrier Spacing\r
-ttiPeriod=1000 # in us TTI period (15Khz default 1000us)\r
-nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=5 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=5 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=512\r
-nULFftSize=512\r
-\r
-nFrameDuplexType=0 # 0 - FDD 1 - TDD\r
-nTddPeriod=0 #TDD priod e.g. DDDS 4\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # lls-CU(0) | RU(1)
+xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)
+antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+
+##Numerology
+mu=0 #15Khz Sub Carrier Spacing
+ttiPeriod=1000 # in us TTI period (15Khz default 1000us)
+nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=5 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=5 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=512
+nULFftSize=512
+
+nFrameDuplexType=0 # 0 - FDD 1 - TDD
+nTddPeriod=0 #TDD priod e.g. DDDS 4
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=5
systemCore=5
pktProcCore=5
pktAuxCore=5
timingCore=6
-llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF\r
-ruMac=00:11:22:33:44:55 #RU VF for RU app\r
-\r
-numSlots=40 #number of slots per IQ files\r
-\r
-antC0=./usecase/mu0_5mhz/ant_0.bin #CC0\r
-antC1=./usecase/mu0_5mhz/ant_1.bin #CC0\r
-antC2=./usecase/mu0_5mhz/ant_2.bin #CC0\r
-antC3=./usecase/mu0_5mhz/ant_3.bin #CC0\r
-antC4=./usecase/mu0_5mhz/ant_4.bin #CC1\r
-antC5=./usecase/mu0_5mhz/ant_5.bin #CC1\r
-antC6=./usecase/mu0_5mhz/ant_6.bin #CC1\r
-antC7=./usecase/mu0_5mhz/ant_7.bin #CC1\r
-antC8=./usecase/mu0_5mhz/ant_8.bin #CC2\r
-antC9=./usecase/mu0_5mhz/ant_9.bin #CC2\r
-antC10=./usecase/mu0_5mhz/ant_10.bin #CC2\r
-antC11=./usecase/mu0_5mhz/ant_11.bin #CC2\r
-antC12=./usecase/mu0_5mhz/ant_12.bin #CC3\r
-antC13=./usecase/mu0_5mhz/ant_13.bin #CC3\r
-antC14=./usecase/mu0_5mhz/ant_14.bin #CC3\r
-antC15=./usecase/mu0_5mhz/ant_15.bin #CC3\r
-\r
-## RACH TODO: update for PRACH\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-#rachOffset=43 # RB offset for prach detection (see RIU spec)\r
-#prachConfigIndex=1 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-c_plane_vlan_tag=1 #VLAN Tag used for C-Plane\r
-u_plane_vlan_tag=2 #VLAN Tag used for U-Plane\r
-\r
-##RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 #in us TODO: update per RU implementation\r
- #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=400 #in us \r
-T2a_max_cp_dl=1120 #in us \r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=400 #in us \r
-T2a_max_cp_ul=1120 #in us \r
-\r
-#Reception Window U-plane\r
-T2a_min_up=200 # in us\r
-T2a_max_up=1120 # in us\r
-\r
-#Transmission Window\r
-Ta3_min=160 #in us\r
-Ta3_max=256 #in us\r
-\r
-###########################################################\r
-##lls-CU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=560\r
-T1a_max_cp_dl=800\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=480\r
-T1a_max_cp_ul=560\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=280\r
-T1a_max_up=400\r
-\r
-#Reception Window\r
-Ta4_min=0\r
-Ta4_max=360\r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF
+ruMac=00:11:22:33:44:55 #RU VF for RU app
+
+numSlots=40 #number of slots per IQ files
+
+antC0=./usecase/mu0_5mhz/ant_0.bin #CC0
+antC1=./usecase/mu0_5mhz/ant_1.bin #CC0
+antC2=./usecase/mu0_5mhz/ant_2.bin #CC0
+antC3=./usecase/mu0_5mhz/ant_3.bin #CC0
+antC4=./usecase/mu0_5mhz/ant_4.bin #CC1
+antC5=./usecase/mu0_5mhz/ant_5.bin #CC1
+antC6=./usecase/mu0_5mhz/ant_6.bin #CC1
+antC7=./usecase/mu0_5mhz/ant_7.bin #CC1
+antC8=./usecase/mu0_5mhz/ant_8.bin #CC2
+antC9=./usecase/mu0_5mhz/ant_9.bin #CC2
+antC10=./usecase/mu0_5mhz/ant_10.bin #CC2
+antC11=./usecase/mu0_5mhz/ant_11.bin #CC2
+antC12=./usecase/mu0_5mhz/ant_12.bin #CC3
+antC13=./usecase/mu0_5mhz/ant_13.bin #CC3
+antC14=./usecase/mu0_5mhz/ant_14.bin #CC3
+antC15=./usecase/mu0_5mhz/ant_15.bin #CC3
+
+## RACH TODO: update for PRACH
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+#rachOffset=43 # RB offset for prach detection (see RIU spec)
+#prachConfigIndex=1 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+c_plane_vlan_tag=1 #VLAN Tag used for C-Plane
+u_plane_vlan_tag=2 #VLAN Tag used for U-Plane
+
+##RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 #in us TODO: update per RU implementation
+ #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+
+#Reception Window C-plane DL
+T2a_min_cp_dl=400 #in us
+T2a_max_cp_dl=1120 #in us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=400 #in us
+T2a_max_cp_ul=1120 #in us
+
+#Reception Window U-plane
+T2a_min_up=200 # in us
+T2a_max_up=1120 # in us
+
+#Transmission Window
+Ta3_min=160 #in us
+Ta3_max=256 #in us
+
+###########################################################
+##lls-CU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=560
+T1a_max_cp_dl=800
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=480
+T1a_max_cp_ul=560
+
+#U-plane
+##Transmission Window
+T1a_min_up=280
+T1a_max_up=400
+
+#Reception Window
+Ta4_min=0
+Ta4_max=360
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # O-DU(0) | O-RU(1)\r
-xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)\r
-antNum=4 # Number of Antennas per CC (default: 4)\r
-\r
-##Numerology\r
-mu=0 #15Khz Sub Carrier Spacing\r
-ttiPeriod=1000 # in us TTI period (15Khz default 1000us)\r
-nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=5 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=5 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=512\r
-nULFftSize=512\r
-\r
-nFrameDuplexType=0 # 0 - FDD 1 - TDD\r
-nTddPeriod=0 #TDD priod e.g. DDDS 4\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
+xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)
+antNum=4 # Number of Antennas per CC (default: 4)
+
+##Numerology
+mu=0 #15Khz Sub Carrier Spacing
+ttiPeriod=1000 # in us TTI period (15Khz default 1000us)
+nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=5 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=5 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=512
+nULFftSize=512
+
+nFrameDuplexType=0 # 0 - FDD 1 - TDD
+nTddPeriod=0 #TDD priod e.g. DDDS 4
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=10
systemCore=10
pktProcCore=10
pktAuxCore=10
timingCore=11
-llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF\r
-ruMac=00:11:22:33:44:55 #RU VF for RU app\r
-numSlots=40 #number of slots per IQ files\r
-antC0=./usecase/mu0_5mhz/ant_0.bin #CC0\r
-antC1=./usecase/mu0_5mhz/ant_1.bin #CC0\r
-antC2=./usecase/mu0_5mhz/ant_2.bin #CC0\r
-antC3=./usecase/mu0_5mhz/ant_3.bin #CC0\r
-antC4=./usecase/mu0_5mhz/ant_4.bin #CC1\r
-antC5=./usecase/mu0_5mhz/ant_5.bin #CC1\r
-antC6=./usecase/mu0_5mhz/ant_6.bin #CC1\r
-antC7=./usecase/mu0_5mhz/ant_7.bin #CC1\r
-antC8=./usecase/mu0_5mhz/ant_8.bin #CC2\r
-antC9=./usecase/mu0_5mhz/ant_9.bin #CC2\r
-antC10=./usecase/mu0_5mhz/ant_10.bin #CC2\r
-antC11=./usecase/mu0_5mhz/ant_11.bin #CC2\r
-antC12=./usecase/mu0_5mhz/ant_12.bin #CC3\r
-antC13=./usecase/mu0_5mhz/ant_13.bin #CC3\r
-antC14=./usecase/mu0_5mhz/ant_14.bin #CC3\r
-antC15=./usecase/mu0_5mhz/ant_15.bin #CC3\r
-\r
-## RACH TODO: update for PRACH\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-#rachOffset=43 # RB offset for prach detection (see RIU spec)\r
-#prachConfigIndex=1 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index\r
-antPrachC0=./usecase/mu0_10mhz/ant_0.bin\r
-antPrachC1=./usecase/mu0_10mhz/ant_1.bin\r
-antPrachC2=./usecase/mu0_10mhz/ant_2.bin\r
-antPrachC3=./usecase/mu0_10mhz/ant_3.bin\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-c_plane_vlan_tag=1 #VLAN Tag used for C-Plane\r
-u_plane_vlan_tag=2 #VLAN Tag used for U-Plane\r
-\r
-##RU Settings\r
-Tadv_cp_dl=25 #in us TODO: update per RU implementation\r
- #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=400 #in us \r
-T2a_max_cp_dl=1120 #in us \r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=400 #in us \r
-T2a_max_cp_ul=1120 #in us \r
-\r
-#Reception Window U-plane\r
-T2a_min_up=200 # in us\r
-T2a_max_up=1120 # in us\r
-\r
-#Transmission Window\r
-Ta3_min=160 #in us\r
-Ta3_max=256 #in us\r
-\r
-###########################################################\r
-##lls-CU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=560\r
-T1a_max_cp_dl=800\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=480\r
-T1a_max_cp_ul=560\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=280\r
-T1a_max_up=400\r
-\r
-#Reception Window\r
-Ta4_min=0\r
-Ta4_max=360\r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF
+ruMac=00:11:22:33:44:55 #RU VF for RU app
+numSlots=40 #number of slots per IQ files
+antC0=./usecase/mu0_5mhz/ant_0.bin #CC0
+antC1=./usecase/mu0_5mhz/ant_1.bin #CC0
+antC2=./usecase/mu0_5mhz/ant_2.bin #CC0
+antC3=./usecase/mu0_5mhz/ant_3.bin #CC0
+antC4=./usecase/mu0_5mhz/ant_4.bin #CC1
+antC5=./usecase/mu0_5mhz/ant_5.bin #CC1
+antC6=./usecase/mu0_5mhz/ant_6.bin #CC1
+antC7=./usecase/mu0_5mhz/ant_7.bin #CC1
+antC8=./usecase/mu0_5mhz/ant_8.bin #CC2
+antC9=./usecase/mu0_5mhz/ant_9.bin #CC2
+antC10=./usecase/mu0_5mhz/ant_10.bin #CC2
+antC11=./usecase/mu0_5mhz/ant_11.bin #CC2
+antC12=./usecase/mu0_5mhz/ant_12.bin #CC3
+antC13=./usecase/mu0_5mhz/ant_13.bin #CC3
+antC14=./usecase/mu0_5mhz/ant_14.bin #CC3
+antC15=./usecase/mu0_5mhz/ant_15.bin #CC3
+
+## RACH TODO: update for PRACH
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+#rachOffset=43 # RB offset for prach detection (see RIU spec)
+#prachConfigIndex=1 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index
+antPrachC0=./usecase/mu0_10mhz/ant_0.bin
+antPrachC1=./usecase/mu0_10mhz/ant_1.bin
+antPrachC2=./usecase/mu0_10mhz/ant_2.bin
+antPrachC3=./usecase/mu0_10mhz/ant_3.bin
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+c_plane_vlan_tag=1 #VLAN Tag used for C-Plane
+u_plane_vlan_tag=2 #VLAN Tag used for U-Plane
+
+##RU Settings
+Tadv_cp_dl=25 #in us TODO: update per RU implementation
+ #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+
+#Reception Window C-plane DL
+T2a_min_cp_dl=400 #in us
+T2a_max_cp_dl=1120 #in us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=400 #in us
+T2a_max_cp_ul=1120 #in us
+
+#Reception Window U-plane
+T2a_min_up=200 # in us
+T2a_max_up=1120 # in us
+
+#Transmission Window
+Ta3_min=160 #in us
+Ta3_max=256 #in us
+
+###########################################################
+##lls-CU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=560
+T1a_max_cp_dl=800
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=480
+T1a_max_cp_ul=560
+
+#U-plane
+##Transmission Window
+T1a_min_up=280
+T1a_max_up=400
+
+#Reception Window
+Ta4_min=0
+Ta4_max=360
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-appMode=0 # lls-CU(0) | RU(1)\r
-xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=4 # Number of Antennas per CC (default: 4)\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it\92s 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
-llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF\r
-ruMac=00:11:22:33:44:55 # RU VF for RU app\r
-#ruMac=3c:fd:fe:9e:93:68 #RU PF for tcpdump\r
-\r
-numSlots=40 #number of slots per IQ files\r
-antC0=./usecase/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/mu1_100mhz/ant_8.bin #CC2\r
-antC9=./usecase/mu1_100mhz/ant_9.bin #CC2\r
-antC10=./usecase/mu1_100mhz/ant_10.bin #CC2\r
-antC11=./usecase/mu1_100mhz/ant_11.bin #CC2\r
-antC12=./usecase/mu1_100mhz/ant_12.bin #CC3\r
-antC13=./usecase/mu1_100mhz/ant_13.bin #CC3\r
-antC14=./usecase/mu1_100mhz/ant_14.bin #CC3\r
-antC15=./usecase/mu1_100mhz/ant_15.bin #CC3\r
-\r
-rachEanble=1 # Enable (1)| disable (0) PRACH configuration\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-c_plane_vlan_tag=1 #VLAN Tag used for C-Plane\r
-u_plane_vlan_tag=2 #VLAN Tag used for U-Plane\r
-\r
-##RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##lls-CU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1\r
-nPrbElemDl=2\r
-PrbElemDl0=0,137,0,14,1,0,0\r
-PrbElemDl1=137,136,0,14,2,0,0\r
-\r
-nPrbElemUl=2\r
-PrbElemUl0=0,137,0,14,1,0,0\r
-PrbElemUl1=137,136,0,14,2,0,0\r
-###########################################################\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+
+# This is simple configuration file. Use '#' sign for comments
+appMode=0 # lls-CU(0) | RU(1)
+xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=4 # Number of Antennas per CC (default: 4)
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it\92s 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
+llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF
+ruMac=00:11:22:33:44:55 # RU VF for RU app
+#ruMac=3c:fd:fe:9e:93:68 #RU PF for tcpdump
+
+numSlots=40 #number of slots per IQ files
+antC0=./usecase/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/mu1_100mhz/ant_8.bin #CC2
+antC9=./usecase/mu1_100mhz/ant_9.bin #CC2
+antC10=./usecase/mu1_100mhz/ant_10.bin #CC2
+antC11=./usecase/mu1_100mhz/ant_11.bin #CC2
+antC12=./usecase/mu1_100mhz/ant_12.bin #CC3
+antC13=./usecase/mu1_100mhz/ant_13.bin #CC3
+antC14=./usecase/mu1_100mhz/ant_14.bin #CC3
+antC15=./usecase/mu1_100mhz/ant_15.bin #CC3
+
+rachEanble=1 # Enable (1)| disable (0) PRACH configuration
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+c_plane_vlan_tag=1 #VLAN Tag used for C-Plane
+u_plane_vlan_tag=2 #VLAN Tag used for U-Plane
+
+##RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##lls-CU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+##Section Settings
+DynamicSectionEna=1
+nPrbElemDl=2
+PrbElemDl0=0,137,0,14,1,0,0
+PrbElemDl1=137,136,0,14,2,0,0
+
+nPrbElemUl=2
+PrbElemUl0=0,137,0,14,1,0,0
+PrbElemUl1=137,136,0,14,2,0,0
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-appMode=1 # lls-CU(0) | RU(1)\r
-xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)\r
-antNum=4 # Number of Antennas per CC (default: 4)\r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=0 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it\92s 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
-llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF\r
-#llsCUMac=3c:fd:fe:a8:e0:70\r
-ruMac=00:11:22:33:44:55 # RU VF for RU app\r
-\r
-numSlots=40 #number of slots per IQ files\r
-antC0=./usecase/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/mu1_100mhz/ant_8.bin #CC2\r
-antC9=./usecase/mu1_100mhz/ant_9.bin #CC2\r
-antC10=./usecase/mu1_100mhz/ant_10.bin #CC2\r
-antC11=./usecase/mu1_100mhz/ant_11.bin #CC2\r
-antC12=./usecase/mu1_100mhz/ant_12.bin #CC3\r
-antC13=./usecase/mu1_100mhz/ant_13.bin #CC3\r
-antC14=./usecase/mu1_100mhz/ant_14.bin #CC3\r
-antC15=./usecase/mu1_100mhz/ant_15.bin #CC3\r
-\r
-antPrachC0=./usecase/mu1_100mhz/ant_0.bin #CC0\r
-antPrachC1=./usecase/mu1_100mhz/ant_1.bin #CC0\r
-antPrachC2=./usecase/mu1_100mhz/ant_2.bin #CC0\r
-antPrachC3=./usecase/mu1_100mhz/ant_3.bin #CC0\r
-antPrachC4=./usecase/mu1_100mhz/ant_4.bin #CC1\r
-antPrachC5=./usecase/mu1_100mhz/ant_5.bin #CC1\r
-antPrachC6=./usecase/mu1_100mhz/ant_6.bin #CC1\r
-antPrachC7=./usecase/mu1_100mhz/ant_7.bin #CC1\r
-antPrachC8=./usecase/mu1_100mhz/ant_8.bin #CC2\r
-antPrachC9=./usecase/mu1_100mhz/ant_9.bin #CC2\r
-antPrachC10=./usecase/mu1_100mhz/ant_10.bin #CC2\r
-antPrachC11=./usecase/mu1_100mhz/ant_11.bin #CC2\r
-antPrachC12=./usecase/mu1_100mhz/ant_12.bin #CC3\r
-antPrachC13=./usecase/mu1_100mhz/ant_13.bin #CC3\r
-antPrachC14=./usecase/mu1_100mhz/ant_14.bin #CC3\r
-antPrachC15=./usecase/mu1_100mhz/ant_15.bin #CC3\r
-\r
-rachEanble=0 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=1\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-c_plane_vlan_tag=1 #VLAN Tag used for C-Plane\r
-u_plane_vlan_tag=2 #VLAN Tag used for U-Plane\r
-\r
-##RU Settings\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us TODO: update\r
-Ta3_max=32 # in us TODO: update\r
-\r
-###########################################################\r
-##lls-CU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us TODO: update\r
-Ta4_max=75 # in us TODO: update\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1\r
-nPrbElemDl=2\r
-PrbElemDl0=0,137,0,14,1,0,0\r
-PrbElemDl1=137,136,0,14,2,0,0\r
-\r
-nPrbElemUl=2\r
-PrbElemUl0=0,137,0,14,1,0,0\r
-PrbElemUl1=137,136,0,14,2,0,0\r
-###########################################################\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+
+# This is simple configuration file. Use '#' sign for comments
+appMode=1 # lls-CU(0) | RU(1)
+xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 4)
+antNum=4 # Number of Antennas per CC (default: 4)
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=0 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it\92s 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
+llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF
+#llsCUMac=3c:fd:fe:a8:e0:70
+ruMac=00:11:22:33:44:55 # RU VF for RU app
+
+numSlots=40 #number of slots per IQ files
+antC0=./usecase/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/mu1_100mhz/ant_8.bin #CC2
+antC9=./usecase/mu1_100mhz/ant_9.bin #CC2
+antC10=./usecase/mu1_100mhz/ant_10.bin #CC2
+antC11=./usecase/mu1_100mhz/ant_11.bin #CC2
+antC12=./usecase/mu1_100mhz/ant_12.bin #CC3
+antC13=./usecase/mu1_100mhz/ant_13.bin #CC3
+antC14=./usecase/mu1_100mhz/ant_14.bin #CC3
+antC15=./usecase/mu1_100mhz/ant_15.bin #CC3
+
+antPrachC0=./usecase/mu1_100mhz/ant_0.bin #CC0
+antPrachC1=./usecase/mu1_100mhz/ant_1.bin #CC0
+antPrachC2=./usecase/mu1_100mhz/ant_2.bin #CC0
+antPrachC3=./usecase/mu1_100mhz/ant_3.bin #CC0
+antPrachC4=./usecase/mu1_100mhz/ant_4.bin #CC1
+antPrachC5=./usecase/mu1_100mhz/ant_5.bin #CC1
+antPrachC6=./usecase/mu1_100mhz/ant_6.bin #CC1
+antPrachC7=./usecase/mu1_100mhz/ant_7.bin #CC1
+antPrachC8=./usecase/mu1_100mhz/ant_8.bin #CC2
+antPrachC9=./usecase/mu1_100mhz/ant_9.bin #CC2
+antPrachC10=./usecase/mu1_100mhz/ant_10.bin #CC2
+antPrachC11=./usecase/mu1_100mhz/ant_11.bin #CC2
+antPrachC12=./usecase/mu1_100mhz/ant_12.bin #CC3
+antPrachC13=./usecase/mu1_100mhz/ant_13.bin #CC3
+antPrachC14=./usecase/mu1_100mhz/ant_14.bin #CC3
+antPrachC15=./usecase/mu1_100mhz/ant_15.bin #CC3
+
+rachEanble=0 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=1
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+c_plane_vlan_tag=1 #VLAN Tag used for C-Plane
+u_plane_vlan_tag=2 #VLAN Tag used for U-Plane
+
+##RU Settings
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us TODO: update
+Ta3_max=32 # in us TODO: update
+
+###########################################################
+##lls-CU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us TODO: update
+Ta4_max=75 # in us TODO: update
+###########################################################
+##Section Settings
+DynamicSectionEna=1
+nPrbElemDl=2
+PrbElemDl0=0,137,0,14,1,0,0
+PrbElemDl1=137,136,0,14,2,0,0
+
+nPrbElemUl=2
+PrbElemUl0=0,137,0,14,1,0,0
+PrbElemUl1=137,136,0,14,2,0,0
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # O-DU(0) | RU(1)\r
-xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)\r
-antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # O-DU(0) | RU(1)
+xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)
+antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=5
systemCore=5
pktProcCore=5
pktAuxCore=5
timingCore=6
-llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF\r
-ruMac=00:11:22:33:44:55 # RU VF for RU app\r
-#ruMac=3c:fd:fe:9e:93:68 #RU PF for tcpdump\r
-\r
-numSlots=40 #number of slots per IQ files\r
-antC0=./usecase/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/mu1_100mhz/ant_8.bin #CC2\r
-antC9=./usecase/mu1_100mhz/ant_9.bin #CC2\r
-antC10=./usecase/mu1_100mhz/ant_10.bin #CC2\r
-antC11=./usecase/mu1_100mhz/ant_11.bin #CC2\r
-antC12=./usecase/mu1_100mhz/ant_12.bin #CC3\r
-antC13=./usecase/mu1_100mhz/ant_13.bin #CC3\r
-antC14=./usecase/mu1_100mhz/ant_14.bin #CC3\r
-antC15=./usecase/mu1_100mhz/ant_15.bin #CC3\r
-\r
-rachEanble=1 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=8\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,36,0,14,1,1,0,16,1\r
-PrbElemDl1=36,36,0,14,2,1,0,16,1\r
-PrbElemDl2=72,36,0,14,3,1,0,16,1\r
-PrbElemDl3=108,36,0,14,4,1,0,16,1\r
-PrbElemDl4=144,36,0,14,5,1,0,16,1\r
-PrbElemDl5=180,36,0,14,6,1,0,16,1\r
-PrbElemDl6=216,36,0,14,7,1,0,16,1\r
-PrbElemDl7=252,21,0,14,8,1,0,16,1\r
-\r
-\r
-nPrbElemUl=8\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,36,0,14,1,1,0,16,1\r
-PrbElemUl1=36,36,0,14,2,1,0,16,1\r
-PrbElemUl2=72,36,0,14,3,1,0,16,1\r
-PrbElemUl3=108,36,0,14,4,1,0,16,1\r
-PrbElemUl4=144,36,0,14,5,1,0,16,1\r
-PrbElemUl5=180,36,0,14,6,1,0,16,1\r
-PrbElemUl6=216,36,0,14,7,1,0,16,1\r
-PrbElemUl7=252,21,0,14,8,1,0,16,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF
+ruMac=00:11:22:33:44:55 # RU VF for RU app
+#ruMac=3c:fd:fe:9e:93:68 #RU PF for tcpdump
+
+numSlots=40 #number of slots per IQ files
+antC0=./usecase/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/mu1_100mhz/ant_8.bin #CC2
+antC9=./usecase/mu1_100mhz/ant_9.bin #CC2
+antC10=./usecase/mu1_100mhz/ant_10.bin #CC2
+antC11=./usecase/mu1_100mhz/ant_11.bin #CC2
+antC12=./usecase/mu1_100mhz/ant_12.bin #CC3
+antC13=./usecase/mu1_100mhz/ant_13.bin #CC3
+antC14=./usecase/mu1_100mhz/ant_14.bin #CC3
+antC15=./usecase/mu1_100mhz/ant_15.bin #CC3
+
+rachEanble=1 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=8
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,36,0,14,1,1,0,16,1
+PrbElemDl1=36,36,0,14,2,1,0,16,1
+PrbElemDl2=72,36,0,14,3,1,0,16,1
+PrbElemDl3=108,36,0,14,4,1,0,16,1
+PrbElemDl4=144,36,0,14,5,1,0,16,1
+PrbElemDl5=180,36,0,14,6,1,0,16,1
+PrbElemDl6=216,36,0,14,7,1,0,16,1
+PrbElemDl7=252,21,0,14,8,1,0,16,1
+
+
+nPrbElemUl=8
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,36,0,14,1,1,0,16,1
+PrbElemUl1=36,36,0,14,2,1,0,16,1
+PrbElemUl2=72,36,0,14,3,1,0,16,1
+PrbElemUl3=108,36,0,14,4,1,0,16,1
+PrbElemUl4=144,36,0,14,5,1,0,16,1
+PrbElemUl5=180,36,0,14,6,1,0,16,1
+PrbElemUl6=216,36,0,14,7,1,0,16,1
+PrbElemUl7=252,21,0,14,8,1,0,16,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # O-DU(0) | O-RU(1)\r
-xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)\r
-antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-\r
-##Numerology\r
-mu=1 #30Khz Sub Carrier Spacing\r
-\r
-ttiPeriod=500 # in us TTI period (30Khz default 500us)\r
-\r
-nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=4096\r
-nULFftSize=4096\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
+xranMode=0 # Category A (0) (precoder in O-DU) | Category B (1) (precoder in RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)
+antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+
+##Numerology
+mu=1 #30Khz Sub Carrier Spacing
+
+ttiPeriod=500 # in us TTI period (30Khz default 500us)
+
+nDLAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=3568160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=4096
+nULFftSize=4096
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=10 #[0-9] DDDSUUDDDD, for S it's 6:4:4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,0,0,0,0,0,2,2,2,2,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig4=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=10
systemCore=10
pktProcCore=10
pktAuxCore=10
timingCore=11
-llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF\r
-#llsCUMac=3c:fd:fe:a8:e0:70\r
-ruMac=00:11:22:33:44:55 # RU VF for RU app\r
-\r
-numSlots=40 #number of slots per IQ files\r
-antC0=./usecase/mu1_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/mu1_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/mu1_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/mu1_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/mu1_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/mu1_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/mu1_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/mu1_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/mu1_100mhz/ant_8.bin #CC2\r
-antC9=./usecase/mu1_100mhz/ant_9.bin #CC2\r
-antC10=./usecase/mu1_100mhz/ant_10.bin #CC2\r
-antC11=./usecase/mu1_100mhz/ant_11.bin #CC2\r
-antC12=./usecase/mu1_100mhz/ant_12.bin #CC3\r
-antC13=./usecase/mu1_100mhz/ant_13.bin #CC3\r
-antC14=./usecase/mu1_100mhz/ant_14.bin #CC3\r
-antC15=./usecase/mu1_100mhz/ant_15.bin #CC3\r
-\r
-antPrachC0=./usecase/mu1_100mhz/ant_0.bin #CC0\r
-antPrachC1=./usecase/mu1_100mhz/ant_1.bin #CC0\r
-antPrachC2=./usecase/mu1_100mhz/ant_2.bin #CC0\r
-antPrachC3=./usecase/mu1_100mhz/ant_3.bin #CC0\r
-antPrachC4=./usecase/mu1_100mhz/ant_4.bin #CC1\r
-antPrachC5=./usecase/mu1_100mhz/ant_5.bin #CC1\r
-antPrachC6=./usecase/mu1_100mhz/ant_6.bin #CC1\r
-antPrachC7=./usecase/mu1_100mhz/ant_7.bin #CC1\r
-antPrachC8=./usecase/mu1_100mhz/ant_8.bin #CC2\r
-antPrachC9=./usecase/mu1_100mhz/ant_9.bin #CC2\r
-antPrachC10=./usecase/mu1_100mhz/ant_10.bin #CC2\r
-antPrachC11=./usecase/mu1_100mhz/ant_11.bin #CC2\r
-antPrachC12=./usecase/mu1_100mhz/ant_12.bin #CC3\r
-antPrachC13=./usecase/mu1_100mhz/ant_13.bin #CC3\r
-antPrachC14=./usecase/mu1_100mhz/ant_14.bin #CC3\r
-antPrachC15=./usecase/mu1_100mhz/ant_15.bin #CC3\r
-\r
-rachEanble=1 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index\r
-\r
-###########################################################\r
-##Section Settings\r
-DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used \r
-\r
-nPrbElemDl=8\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemDl0=0,36,0,14,1,1,0,16,1\r
-PrbElemDl1=36,36,0,14,2,1,0,16,1\r
-PrbElemDl2=72,36,0,14,3,1,0,16,1\r
-PrbElemDl3=108,36,0,14,4,1,0,16,1\r
-PrbElemDl4=144,36,0,14,5,1,0,16,1\r
-PrbElemDl5=180,36,0,14,6,1,0,16,1\r
-PrbElemDl6=216,36,0,14,7,1,0,16,1\r
-PrbElemDl7=252,21,0,14,8,1,0,16,1\r
-\r
-\r
-nPrbElemUl=8\r
-#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType\r
-# weight base beams \r
-PrbElemUl0=0,36,0,14,1,1,0,16,1\r
-PrbElemUl1=36,36,0,14,2,1,0,16,1\r
-PrbElemUl2=72,36,0,14,3,1,0,16,1\r
-PrbElemUl3=108,36,0,14,4,1,0,16,1\r
-PrbElemUl4=144,36,0,14,5,1,0,16,1\r
-PrbElemUl5=180,36,0,14,6,1,0,16,1\r
-PrbElemUl6=216,36,0,14,7,1,0,16,1\r
-PrbElemUl7=252,21,0,14,8,1,0,16,1\r
-\r
-###########################################################\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-\r
-##O-RU Settings\r
-Tadv_cp_dl=25 # in us\r
- # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=285 # 285.42us\r
-T2a_max_cp_dl=429 # 428.12us\r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=285 # 285.42us\r
-T2a_max_cp_ul=429 # 428.12us\r
-\r
-#Reception Window U-plane\r
-T2a_min_up=71 # 71.35in us\r
-T2a_max_up=428 # 428.12us\r
-\r
-#Transmission Window\r
-Ta3_min=20 # in us \r
-Ta3_max=32 # in us \r
-\r
-###########################################################\r
-##O-DU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=285\r
-T1a_max_cp_dl=429\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=285\r
-T1a_max_cp_ul=300\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=96 #71 + 25 us\r
-T1a_max_up=196 #71 + 25 us\r
-\r
-#Reception Window\r
-Ta4_min=0 # in us \r
-Ta4_max=75 # in us \r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF
+#llsCUMac=3c:fd:fe:a8:e0:70
+ruMac=00:11:22:33:44:55 # RU VF for RU app
+
+numSlots=40 #number of slots per IQ files
+antC0=./usecase/mu1_100mhz/ant_0.bin #CC0
+antC1=./usecase/mu1_100mhz/ant_1.bin #CC0
+antC2=./usecase/mu1_100mhz/ant_2.bin #CC0
+antC3=./usecase/mu1_100mhz/ant_3.bin #CC0
+antC4=./usecase/mu1_100mhz/ant_4.bin #CC1
+antC5=./usecase/mu1_100mhz/ant_5.bin #CC1
+antC6=./usecase/mu1_100mhz/ant_6.bin #CC1
+antC7=./usecase/mu1_100mhz/ant_7.bin #CC1
+antC8=./usecase/mu1_100mhz/ant_8.bin #CC2
+antC9=./usecase/mu1_100mhz/ant_9.bin #CC2
+antC10=./usecase/mu1_100mhz/ant_10.bin #CC2
+antC11=./usecase/mu1_100mhz/ant_11.bin #CC2
+antC12=./usecase/mu1_100mhz/ant_12.bin #CC3
+antC13=./usecase/mu1_100mhz/ant_13.bin #CC3
+antC14=./usecase/mu1_100mhz/ant_14.bin #CC3
+antC15=./usecase/mu1_100mhz/ant_15.bin #CC3
+
+antPrachC0=./usecase/mu1_100mhz/ant_0.bin #CC0
+antPrachC1=./usecase/mu1_100mhz/ant_1.bin #CC0
+antPrachC2=./usecase/mu1_100mhz/ant_2.bin #CC0
+antPrachC3=./usecase/mu1_100mhz/ant_3.bin #CC0
+antPrachC4=./usecase/mu1_100mhz/ant_4.bin #CC1
+antPrachC5=./usecase/mu1_100mhz/ant_5.bin #CC1
+antPrachC6=./usecase/mu1_100mhz/ant_6.bin #CC1
+antPrachC7=./usecase/mu1_100mhz/ant_7.bin #CC1
+antPrachC8=./usecase/mu1_100mhz/ant_8.bin #CC2
+antPrachC9=./usecase/mu1_100mhz/ant_9.bin #CC2
+antPrachC10=./usecase/mu1_100mhz/ant_10.bin #CC2
+antPrachC11=./usecase/mu1_100mhz/ant_11.bin #CC2
+antPrachC12=./usecase/mu1_100mhz/ant_12.bin #CC3
+antPrachC13=./usecase/mu1_100mhz/ant_13.bin #CC3
+antPrachC14=./usecase/mu1_100mhz/ant_14.bin #CC3
+antPrachC15=./usecase/mu1_100mhz/ant_15.bin #CC3
+
+rachEanble=1 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index
+
+###########################################################
+##Section Settings
+DynamicSectionEna=1 # 1 - enable dynamic section allocation 0 - static sections all RBs are used
+
+nPrbElemDl=8
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemDl0=0,36,0,14,1,1,0,16,1
+PrbElemDl1=36,36,0,14,2,1,0,16,1
+PrbElemDl2=72,36,0,14,3,1,0,16,1
+PrbElemDl3=108,36,0,14,4,1,0,16,1
+PrbElemDl4=144,36,0,14,5,1,0,16,1
+PrbElemDl5=180,36,0,14,6,1,0,16,1
+PrbElemDl6=216,36,0,14,7,1,0,16,1
+PrbElemDl7=252,21,0,14,8,1,0,16,1
+
+
+nPrbElemUl=8
+#nRBStart, nRBSize, nStartSymb, numSymb, nBeamIndex, bf_weight_update, compMethod, iqWidth, BeamFormingType
+# weight base beams
+PrbElemUl0=0,36,0,14,1,1,0,16,1
+PrbElemUl1=36,36,0,14,2,1,0,16,1
+PrbElemUl2=72,36,0,14,3,1,0,16,1
+PrbElemUl3=108,36,0,14,4,1,0,16,1
+PrbElemUl4=144,36,0,14,5,1,0,16,1
+PrbElemUl5=180,36,0,14,6,1,0,16,1
+PrbElemUl6=216,36,0,14,7,1,0,16,1
+PrbElemUl7=252,21,0,14,8,1,0,16,1
+
+###########################################################
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+
+##O-RU Settings
+Tadv_cp_dl=25 # in us
+ # C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+#Reception Window C-plane DL
+T2a_min_cp_dl=285 # 285.42us
+T2a_max_cp_dl=429 # 428.12us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=285 # 285.42us
+T2a_max_cp_ul=429 # 428.12us
+
+#Reception Window U-plane
+T2a_min_up=71 # 71.35in us
+T2a_max_up=428 # 428.12us
+
+#Transmission Window
+Ta3_min=20 # in us
+Ta3_max=32 # in us
+
+###########################################################
+##O-DU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=285
+T1a_max_cp_dl=429
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=285
+T1a_max_cp_ul=300
+
+#U-plane
+##Transmission Window
+T1a_min_up=96 #71 + 25 us
+T1a_max_up=196 #71 + 25 us
+
+#Reception Window
+Ta4_min=0 # in us
+Ta4_max=75 # in us
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=0 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=0 # lls-CU(0) | RU(1)\r
-xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)\r
-antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-\r
-##Numerology\r
-mu=3 #mmWave 120Khz Sub Carrier Spacing\r
-ttiPeriod=125 # in us TTI period (mmWave default 125us)\r
-nDLAbsFrePointA=27968160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=27968160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=1024\r
-nULFftSize=1024\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=4 #[0-5] TDD priod e.g. DDDS 4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,2,2,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-# not used\r
-#sSlotConfig4=0,2,2,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-#sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-#sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-#sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-#sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-#sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=0 # 0,1,2,... in case more than 1 application started on the same system
+appMode=0 # lls-CU(0) | RU(1)
+xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)
+antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+
+##Numerology
+mu=3 #mmWave 120Khz Sub Carrier Spacing
+ttiPeriod=125 # in us TTI period (mmWave default 125us)
+nDLAbsFrePointA=27968160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=27968160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=1024
+nULFftSize=1024
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=4 #[0-5] TDD priod e.g. DDDS 4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,2,2,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+# not used
+#sSlotConfig4=0,2,2,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+#sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+#sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+#sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+#sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+#sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=5
systemCore=5
pktProcCore=5
pktAuxCore=5
timingCore=6
-llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF\r
-ruMac=00:11:22:33:44:55 # RU VF for RU app\r
-#ruMac=3c:fd:fe:9e:93:68 #RU PF for tcpdump\r
-\r
-maxFrameId=99 # set for compatibility with O-RU\r
-\r
-numSlots=40 #number of slots per IQ files\r
-antC0=./usecase/mu3_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/mu3_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/mu3_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/mu3_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/mu3_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/mu3_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/mu3_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/mu3_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/mu3_100mhz/ant_8.bin #CC2\r
-antC9=./usecase/mu3_100mhz/ant_9.bin #CC2\r
-antC10=./usecase/mu3_100mhz/ant_10.bin #CC2\r
-antC11=./usecase/mu3_100mhz/ant_11.bin #CC2\r
-antC12=./usecase/mu3_100mhz/ant_12.bin #CC3\r
-antC13=./usecase/mu3_100mhz/ant_13.bin #CC3\r
-antC14=./usecase/mu3_100mhz/ant_14.bin #CC3\r
-antC15=./usecase/mu3_100mhz/ant_15.bin #CC3\r
-\r
-rachEanble=1 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=81\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-c_plane_vlan_tag=1 #VLAN Tag used for C-Plane\r
-u_plane_vlan_tag=2 #VLAN Tag used for U-Plane\r
-\r
-##RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 #in us TODO: update per RU implementation\r
- #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=50 #in us \r
-T2a_max_cp_dl=140 #in us \r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=50 #in us \r
-T2a_max_cp_ul=140 #in us \r
-\r
-#Reception Window U-plane\r
-T2a_min_up=25 #in us\r
-T2a_max_up=140 #in us\r
-\r
-#Transmission Window\r
-Ta3_min=20 #in us\r
-Ta3_max=32 #in us\r
-\r
-###########################################################\r
-##lls-CU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=70\r
-T1a_max_cp_dl=100\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=60\r
-T1a_max_cp_ul=70\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=35\r
-T1a_max_up=50\r
-\r
-#Reception Window\r
-Ta4_min=0\r
-Ta4_max=45\r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF
+ruMac=00:11:22:33:44:55 # RU VF for RU app
+#ruMac=3c:fd:fe:9e:93:68 #RU PF for tcpdump
+
+maxFrameId=99 # set for compatibility with O-RU
+
+numSlots=40 #number of slots per IQ files
+antC0=./usecase/mu3_100mhz/ant_0.bin #CC0
+antC1=./usecase/mu3_100mhz/ant_1.bin #CC0
+antC2=./usecase/mu3_100mhz/ant_2.bin #CC0
+antC3=./usecase/mu3_100mhz/ant_3.bin #CC0
+antC4=./usecase/mu3_100mhz/ant_4.bin #CC1
+antC5=./usecase/mu3_100mhz/ant_5.bin #CC1
+antC6=./usecase/mu3_100mhz/ant_6.bin #CC1
+antC7=./usecase/mu3_100mhz/ant_7.bin #CC1
+antC8=./usecase/mu3_100mhz/ant_8.bin #CC2
+antC9=./usecase/mu3_100mhz/ant_9.bin #CC2
+antC10=./usecase/mu3_100mhz/ant_10.bin #CC2
+antC11=./usecase/mu3_100mhz/ant_11.bin #CC2
+antC12=./usecase/mu3_100mhz/ant_12.bin #CC3
+antC13=./usecase/mu3_100mhz/ant_13.bin #CC3
+antC14=./usecase/mu3_100mhz/ant_14.bin #CC3
+antC15=./usecase/mu3_100mhz/ant_15.bin #CC3
+
+rachEanble=1 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=81
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=1 #(1) C-Plane is enabled| (0) C-Plane is disabled
+c_plane_vlan_tag=1 #VLAN Tag used for C-Plane
+u_plane_vlan_tag=2 #VLAN Tag used for U-Plane
+
+##RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 #in us TODO: update per RU implementation
+ #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+
+#Reception Window C-plane DL
+T2a_min_cp_dl=50 #in us
+T2a_max_cp_dl=140 #in us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=50 #in us
+T2a_max_cp_ul=140 #in us
+
+#Reception Window U-plane
+T2a_min_up=25 #in us
+T2a_max_up=140 #in us
+
+#Transmission Window
+Ta3_min=20 #in us
+Ta3_max=32 #in us
+
+###########################################################
+##lls-CU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=70
+T1a_max_cp_dl=100
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=60
+T1a_max_cp_ul=70
+
+#U-plane
+##Transmission Window
+T1a_min_up=35
+T1a_max_up=50
+
+#Reception Window
+Ta4_min=0
+Ta4_max=45
+###########################################################
+
-#******************************************************************************\r
-#\r
-# Copyright (c) 2019 Intel.\r
-#\r
-# Licensed under the Apache License, Version 2.0 (the "License");\r
-# you may not use this file except in compliance with the License.\r
-# You may obtain a copy of the License at\r
-#\r
-# http://www.apache.org/licenses/LICENSE-2.0\r
-#\r
-# Unless required by applicable law or agreed to in writing, software\r
-# distributed under the License is distributed on an "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-# See the License for the specific language governing permissions and\r
-# limitations under the License.\r
-#\r
-#******************************************************************************/\r
-\r
-\r
-# This is simple configuration file. Use '#' sign for comments\r
-instanceId=1 # 0,1,2,... in case more than 1 application started on the same system\r
-appMode=1 # O-DU(0) | O-RU(1)\r
-xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)\r
-ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)\r
-antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B \r
-\r
-##Numerology\r
-mu=3 #mmWave 120Khz Sub Carrier Spacing\r
-ttiPeriod=125 # in us TTI period (mmWave default 125us)\r
-nDLAbsFrePointA=27968160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nULAbsFrePointA=27968160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
-nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400\r
-nDLFftSize=1024\r
-nULFftSize=1024\r
-\r
-nFrameDuplexType=1 # 0 - FDD 1 - TDD\r
-nTddPeriod=4 #[0-5] TDD priod e.g. DDDS 4\r
-sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-sSlotConfig3=0,2,2,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
- #not used\r
-#sSlotConfig4=0,2,2,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-#sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD\r
-#sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-#sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-#sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-#sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD\r
-\r
-MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single \r
- #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)\r
-Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec\r
-Gps_Beta=0\r
-\r
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+
+# This is simple configuration file. Use '#' sign for comments
+instanceId=1 # 0,1,2,... in case more than 1 application started on the same system
+appMode=1 # O-DU(0) | O-RU(1)
+xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU)
+ccNum=1 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12)
+antNum=4 # Number of Antennas per CC (default: 4) or number of Digital streams for Category B
+
+##Numerology
+mu=3 #mmWave 120Khz Sub Carrier Spacing
+ttiPeriod=125 # in us TTI period (mmWave default 125us)
+nDLAbsFrePointA=27968160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nULAbsFrePointA=27968160 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+nDLBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nULBandwidth=100 #Carrier bandwidth for in MHz. Value: 5->400
+nDLFftSize=1024
+nULFftSize=1024
+
+nFrameDuplexType=1 # 0 - FDD 1 - TDD
+nTddPeriod=4 #[0-5] TDD priod e.g. DDDS 4
+sSlotConfig0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig1=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig2=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+sSlotConfig3=0,2,2,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+ #not used
+#sSlotConfig4=0,2,2,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+#sSlotConfig5=1,1,1,1,1,1,1,1,1,1,1,1,1,1 # (0) - DL (1) - UL (2) - GUARD
+#sSlotConfig6=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+#sSlotConfig7=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+#sSlotConfig8=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+#sSlotConfig9=0,0,0,0,0,0,0,0,0,0,0,0,0,0 # (0) - DL (1) - UL (2) - GUARD
+
+MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame)
+Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec
+Gps_Beta=0
+
ioCore=10
systemCore=10
pktProcCore=10
pktAuxCore=10
timingCore=11
-llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF\r
-#llsCUMac=3c:fd:fe:a8:e0:70\r
-ruMac=00:11:22:33:44:55 # RU VF for RU app\r
-\r
-maxFrameId=99 # set for compatibility with O-RU\r
-\r
-numSlots=40 #number of slots per IQ files\r
-antC0=./usecase/mu3_100mhz/ant_0.bin #CC0\r
-antC1=./usecase/mu3_100mhz/ant_1.bin #CC0\r
-antC2=./usecase/mu3_100mhz/ant_2.bin #CC0\r
-antC3=./usecase/mu3_100mhz/ant_3.bin #CC0\r
-antC4=./usecase/mu3_100mhz/ant_4.bin #CC1\r
-antC5=./usecase/mu3_100mhz/ant_5.bin #CC1\r
-antC6=./usecase/mu3_100mhz/ant_6.bin #CC1\r
-antC7=./usecase/mu3_100mhz/ant_7.bin #CC1\r
-antC8=./usecase/mu3_100mhz/ant_8.bin #CC2\r
-antC9=./usecase/mu3_100mhz/ant_9.bin #CC2\r
-antC10=./usecase/mu3_100mhz/ant_10.bin #CC2\r
-antC11=./usecase/mu3_100mhz/ant_11.bin #CC2\r
-antC12=./usecase/mu3_100mhz/ant_12.bin #CC3\r
-antC13=./usecase/mu3_100mhz/ant_13.bin #CC3\r
-antC14=./usecase/mu3_100mhz/ant_14.bin #CC3\r
-antC15=./usecase/mu3_100mhz/ant_15.bin #CC3\r
-\r
-antPrachC0=./usecase/mu3_100mhz/ant_0.bin #CC0\r
-antPrachC1=./usecase/mu3_100mhz/ant_1.bin #CC0\r
-antPrachC2=./usecase/mu3_100mhz/ant_2.bin #CC0\r
-antPrachC3=./usecase/mu3_100mhz/ant_3.bin #CC0\r
-antPrachC4=./usecase/mu3_100mhz/ant_4.bin #CC1\r
-antPrachC5=./usecase/mu3_100mhz/ant_5.bin #CC1\r
-antPrachC6=./usecase/mu3_100mhz/ant_6.bin #CC1\r
-antPrachC7=./usecase/mu3_100mhz/ant_7.bin #CC1\r
-antPrachC8=./usecase/mu3_100mhz/ant_8.bin #CC2\r
-antPrachC9=./usecase/mu3_100mhz/ant_9.bin #CC2\r
-antPrachC10=./usecase/mu3_100mhz/ant_10.bin #CC2\r
-antPrachC11=./usecase/mu3_100mhz/ant_11.bin #CC2\r
-antPrachC12=./usecase/mu3_100mhz/ant_12.bin #CC3\r
-antPrachC13=./usecase/mu3_100mhz/ant_13.bin #CC3\r
-antPrachC14=./usecase/mu3_100mhz/ant_14.bin #CC3\r
-antPrachC15=./usecase/mu3_100mhz/ant_15.bin #CC3\r
-\r
-rachEanble=1 # Enable (1)| disable (0) PRACH configuration\r
-prachConfigIndex=81\r
-\r
-## control of IQ byte order\r
-iqswap=0 #do swap of IQ before send buffer to eth\r
-nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order\r
-\r
-##Debug\r
-debugStop=1 #stop app on 1pps boundary (gps_second % 30)\r
-debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary\r
-bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode\r
-\r
-CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled\r
-c_plane_vlan_tag=1 #VLAN Tag used for C-Plane\r
-u_plane_vlan_tag=2 #VLAN Tag used for U-Plane\r
-\r
-##RU Settings\r
-totalBFWeights=32 # Total number of Beamforming Weights on RU\r
-\r
-Tadv_cp_dl=25 #in us TODO: update per RU implementation\r
- #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages\r
-\r
-#Reception Window C-plane DL\r
-T2a_min_cp_dl=50 #in us \r
-T2a_max_cp_dl=140 #in us \r
-\r
-#Reception Window C-plane UL\r
-T2a_min_cp_ul=50 #in us \r
-T2a_max_cp_ul=140 #in us \r
-\r
-#Reception Window U-plane\r
-T2a_min_up=25 #in us\r
-T2a_max_up=140 #in us\r
-\r
-#Transmission Window\r
-Ta3_min=20 #in us\r
-Ta3_max=32 #in us\r
-\r
-###########################################################\r
-##lls-CU Settings\r
-#C-plane\r
-#Transmission Window Fast C-plane DL\r
-T1a_min_cp_dl=70\r
-T1a_max_cp_dl=100\r
-\r
-##Transmission Window Fast C-plane UL\r
-T1a_min_cp_ul=60\r
-T1a_max_cp_ul=70\r
-\r
-#U-plane\r
-##Transmission Window\r
-T1a_min_up=35\r
-T1a_max_up=50\r
-\r
-#Reception Window\r
-Ta4_min=0\r
-Ta4_max=45\r
-###########################################################\r
-\r
+llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF
+#llsCUMac=3c:fd:fe:a8:e0:70
+ruMac=00:11:22:33:44:55 # RU VF for RU app
+
+maxFrameId=99 # set for compatibility with O-RU
+
+numSlots=40 #number of slots per IQ files
+antC0=./usecase/mu3_100mhz/ant_0.bin #CC0
+antC1=./usecase/mu3_100mhz/ant_1.bin #CC0
+antC2=./usecase/mu3_100mhz/ant_2.bin #CC0
+antC3=./usecase/mu3_100mhz/ant_3.bin #CC0
+antC4=./usecase/mu3_100mhz/ant_4.bin #CC1
+antC5=./usecase/mu3_100mhz/ant_5.bin #CC1
+antC6=./usecase/mu3_100mhz/ant_6.bin #CC1
+antC7=./usecase/mu3_100mhz/ant_7.bin #CC1
+antC8=./usecase/mu3_100mhz/ant_8.bin #CC2
+antC9=./usecase/mu3_100mhz/ant_9.bin #CC2
+antC10=./usecase/mu3_100mhz/ant_10.bin #CC2
+antC11=./usecase/mu3_100mhz/ant_11.bin #CC2
+antC12=./usecase/mu3_100mhz/ant_12.bin #CC3
+antC13=./usecase/mu3_100mhz/ant_13.bin #CC3
+antC14=./usecase/mu3_100mhz/ant_14.bin #CC3
+antC15=./usecase/mu3_100mhz/ant_15.bin #CC3
+
+antPrachC0=./usecase/mu3_100mhz/ant_0.bin #CC0
+antPrachC1=./usecase/mu3_100mhz/ant_1.bin #CC0
+antPrachC2=./usecase/mu3_100mhz/ant_2.bin #CC0
+antPrachC3=./usecase/mu3_100mhz/ant_3.bin #CC0
+antPrachC4=./usecase/mu3_100mhz/ant_4.bin #CC1
+antPrachC5=./usecase/mu3_100mhz/ant_5.bin #CC1
+antPrachC6=./usecase/mu3_100mhz/ant_6.bin #CC1
+antPrachC7=./usecase/mu3_100mhz/ant_7.bin #CC1
+antPrachC8=./usecase/mu3_100mhz/ant_8.bin #CC2
+antPrachC9=./usecase/mu3_100mhz/ant_9.bin #CC2
+antPrachC10=./usecase/mu3_100mhz/ant_10.bin #CC2
+antPrachC11=./usecase/mu3_100mhz/ant_11.bin #CC2
+antPrachC12=./usecase/mu3_100mhz/ant_12.bin #CC3
+antPrachC13=./usecase/mu3_100mhz/ant_13.bin #CC3
+antPrachC14=./usecase/mu3_100mhz/ant_14.bin #CC3
+antPrachC15=./usecase/mu3_100mhz/ant_15.bin #CC3
+
+rachEanble=1 # Enable (1)| disable (0) PRACH configuration
+prachConfigIndex=81
+
+## control of IQ byte order
+iqswap=0 #do swap of IQ before send buffer to eth
+nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order
+
+##Debug
+debugStop=1 #stop app on 1pps boundary (gps_second % 30)
+debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary
+bbdevMode=-1 #bbdev mode, -1 = not use bbdev, 0: use software mode, 1: use hardware mode
+
+CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled
+c_plane_vlan_tag=1 #VLAN Tag used for C-Plane
+u_plane_vlan_tag=2 #VLAN Tag used for U-Plane
+
+##RU Settings
+totalBFWeights=32 # Total number of Beamforming Weights on RU
+
+Tadv_cp_dl=25 #in us TODO: update per RU implementation
+ #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages
+
+#Reception Window C-plane DL
+T2a_min_cp_dl=50 #in us
+T2a_max_cp_dl=140 #in us
+
+#Reception Window C-plane UL
+T2a_min_cp_ul=50 #in us
+T2a_max_cp_ul=140 #in us
+
+#Reception Window U-plane
+T2a_min_up=25 #in us
+T2a_max_up=140 #in us
+
+#Transmission Window
+Ta3_min=20 #in us
+Ta3_max=32 #in us
+
+###########################################################
+##lls-CU Settings
+#C-plane
+#Transmission Window Fast C-plane DL
+T1a_min_cp_dl=70
+T1a_max_cp_dl=100
+
+##Transmission Window Fast C-plane UL
+T1a_min_cp_ul=60
+T1a_max_cp_ul=70
+
+#U-plane
+##Transmission Window
+T1a_min_up=35
+T1a_max_up=50
+
+#Reception Window
+Ta4_min=0
+Ta4_max=45
+###########################################################
+
#!/bin/bash
-#/******************************************************************************
-#*
-#* Copyright (c) 2019 Intel.
-#*
-#* Licensed under the Apache License, Version 2.0 (the "License");
-#* you may not use this file except in compliance with the License.
-#* You may obtain a copy of the License at
-#*
-#* http://www.apache.org/licenses/LICENSE-2.0
-#*
-#* Unless required by applicable law or agreed to in writing, software
-#* distributed under the License is distributed on an "AS IS" BASIS,
-#* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-#* See the License for the specific language governing permissions and
-#* limitations under the License.
-#*
-#*******************************************************************************/
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+set -e
+trap 'l_c=$current_command; current_command=$BASH_COMMAND' DEBUG
+trap 'echo "\"${l_c}\" command exited with code $?."' EXIT
XRAN_FH_LIB_DIR=$XRAN_DIR/lib
XRAN_FH_APP_DIR=$XRAN_DIR/app
-#/******************************************************************************\r
-#*\r
-#* Copyright (c) 2019 Intel.\r
-#*\r
-#* Licensed under the Apache License, Version 2.0 (the "License");\r
-#* you may not use this file except in compliance with the License.\r
-#* You may obtain a copy of the License at\r
-#*\r
-#* http://www.apache.org/licenses/LICENSE-2.0\r
-#*\r
-#* Unless required by applicable law or agreed to in writing, software\r
-#* distributed under the License is distributed on an "AS IS" BASIS,\r
-#* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-#* See the License for the specific language governing permissions and\r
-#* limitations under the License.\r
-#*\r
-#*******************************************************************************/\r
-\r
-MYCUSTOMTAB=' '\r
-MYCUSTOMSPACE='============================================================================================'\r
-MYCUSTOMSPACE1='------------------------------------------------------------'\r
-\r
-##############################################################\r
-# Tools configuration\r
-##############################################################\r
-CC := icc\r
-CPP := icpc\r
-AS := as\r
-AR := ar\r
-LD := icc\r
-OBJDUMP := objdump\r
-\r
-ifeq ($(SHELL),cmd.exe)\r
-MD := mkdir.exe -p\r
-CP := cp.exe -f\r
-RM := rm.exe -rf\r
-else\r
-MD := mkdir -p\r
-CP := cp -f\r
-RM := rm -rf\r
-endif\r
-\r
-PROJECT_NAME := libxran\r
-PROJECT_TYPE := lib\r
-PROJECT_DIR := $(XRAN_DIR)/lib\r
-BUILDDIR := ./build\r
-PROJECT_BINARY := $(BUILDDIR)/$(PROJECT_NAME).a\r
-\r
-ifeq ($(RTE_SDK),)\r
- $(error "Please define RTE_SDK environment variable")\r
-endif\r
-\r
-RTE_TARGET ?= x86_64-native-linuxapp-gcc\r
-RTE_INC := $(RTE_SDK)/$(RTE_TARGET)/include\r
-\r
-API_DIR := $(PROJECT_DIR)/api\r
-SRC_DIR := $(PROJECT_DIR)/src\r
-ETH_DIR := $(PROJECT_DIR)/ethernet\r
-\r
-ifeq ($(MLOG),1)\r
-ifeq ($(MLOG_DIR),)\r
- MLOG_DIR=$(XRAN_DIR)/../mlog\r
-endif\r
-endif\r
-\r
-CC_SRC = $(ETH_DIR)/ethdi.c \\r
- $(ETH_DIR)/ethernet.c \\r
- $(SRC_DIR)/xran_up_api.c \\r
- $(SRC_DIR)/xran_sync_api.c \\r
- $(SRC_DIR)/xran_timer.c \\r
- $(SRC_DIR)/xran_cp_api.c \\r
- $(SRC_DIR)/xran_transport.c \\r
- $(SRC_DIR)/xran_common.c \\r
- $(SRC_DIR)/xran_ul_tables.c \\r
- $(SRC_DIR)/xran_frame_struct.c \\r
- $(SRC_DIR)/xran_app_frag.c \\r
- $(SRC_DIR)/xran_main.c\r
-\r
-CPP_SRC = $(SRC_DIR)/xran_compression.cpp\r
-\r
-CC_FLAGS += -std=gnu11 -Wall -Wno-deprecated-declarations \\r
- -fdata-sections \\r
- -ffunction-sections \\r
- -g \\r
- -Wall \\r
- -Wimplicit-function-declaration \\r
- -g -O3 -wd1786\r
-\r
-CPP_FLAGS := -D__STDC_LIMIT_MACROS -D__STDC_CONSTANT_MACROS -D_GNU_SOURCE -D_REENTRANT -pipe -no-prec-div \\r
- -no-prec-div -fp-model fast=2\\r
- -no-prec-sqrt -falign-functions=16 -fast-transcendentals \\r
- -Werror -Wno-unused-variable -std=c++11 -mcmodel=large\r
-\r
-INC := -I$(API_DIR) -I$(ETH_DIR) -I$(SRC_DIR) -I$(RTE_INC)\r
-DEF :=\r
-ifeq ($(MLOG),1)\r
- INC += -I$(MLOG_DIR)/source\r
- DEF += -DMLOG_ENABLED\r
-else\r
- DEF += -UMLOG_ENABLED\r
-endif\r
-\r
-#DEF += -DFCN_ADAPT\r
-\r
-AS_FLAGS :=\r
-AR_FLAGS := rc\r
-\r
-PROJECT_OBJ_DIR := build/obj\r
-\r
-CC_OBJS := $(patsubst %.c,%.o,$(CC_SRC))\r
-CPP_OBJS := $(patsubst %.cpp,%.o,$(CPP_SRC))\r
-AS_OBJS := $(patsubst %.s,%.o,$(AS_SRC))\r
-OBJS := $(CC_OBJS) $(CPP_OBJS) $(AS_OBJS) $(LIBS)\r
-DIRLIST := $(addprefix $(PROJECT_OBJ_DIR)/,$(sort $(dir $(OBJS))))\r
-\r
-CC_OBJTARGETS := $(addprefix $(PROJECT_OBJ_DIR)/,$(CC_OBJS))\r
-CPP_OBJTARGETS := $(addprefix $(PROJECT_OBJ_DIR)/,$(CPP_OBJS))\r
-\r
-AS_OBJTARGETS := $(addprefix $(PROJECT_OBJ_DIR)/,$(AS_OBJS))\r
-CPP_COMP := -O3 -xcore-avx512 -restrict -g -fasm-blocks\r
-CC_FLAGS_FULL := $(CC_FLAGS) $(INC) $(DEF)\r
-CPP_FLAGS_FULL := $(CPP_FLAGS) $(CPP_COMP) $(INC) $(DEF)\r
-\r
-AS_FLAGS := $(AS_FLAGS) $(INC)\r
-\r
-PROJECT_DEP_FILE := $(PROJECT_OBJ_DIR)/$(PROJECT_NAME).dep\r
-\r
-ifeq ($(wildcard $(PROJECT_DEP_FILE)),$(PROJECT_DEP_FILE))\r
-GENERATE_DEPS :=\r
-else\r
-\r
-CC_DEPS := $(addprefix __dep__,$(subst ../,__up__,$(CC_SRC)))\r
-CPP_DEPS := $(addprefix __dep__,$(subst ../,__up__,$(CPP_SRC)))\r
-GENERATE_DEPS := generate_deps\r
-endif\r
-\r
-all : welcome_line $(PROJECT_BINARY)\r
- @echo $(PROJECT_BINARY)\r
-\r
-.PHONY : clear_dep\r
-clear_dep:\r
- @$(RM) $(PROJECT_DEP_FILE)\r
- @echo [DEP] $(subst $(PROJECT_OBJ_DIR)/,,$(PROJECT_DEP_FILE))\r
-\r
-$(CC_DEPS) :\r
- @$(CC) -MM $(subst __up__,../,$(subst __dep__,,$@)) -MT $(PROJECT_OBJ_DIR)/$(patsubst %.c,%.o,$(subst __up__,../,$(subst __dep__,,$@))) $(CC_FLAGS_FULL) >> $(PROJECT_DEP_FILE)\r
-\r
-$(CPP_DEPS) :\r
- @$(CPP) -MM $(subst __up__,../,$(subst __dep__,,$@)) -MT $(PROJECT_OBJ_DIR)/$(patsubst %.cpp,%.o,$(subst __up__,../,$(subst __dep__,,$@))) $(CPP_FLAGS_FULL) >> $(PROJECT_DEP_FILE)\r
-\r
-.PHONY : generate_deps\r
-generate_deps : clear_dep $(CC_DEPS) $(CPP_DEPS)\r
-\r
-\r
-.PHONY : echo_start_build\r
-echo_start_build :\r
- @echo [BUILD] $(PROJECT_TYPE) : $(PROJECT_NAME)\r
-\r
-$(DIRLIST) :\r
- -@$(MD) $@\r
-\r
-$(CC_OBJTARGETS) :\r
- @echo [CC] $(subst $(PROJECT_OBJ_DIR)/,,$@)\r
- @$(CC) -c $(CC_FLAGS_FULL) -o"$@" $(patsubst %.o,%.c,$(subst $(PROJECT_OBJ_DIR)/,,$@))\r
-\r
-$(CPP_OBJTARGETS) :\r
- @echo [CPP] $(subst $(PROJECT_OBJ_DIR)/,,$@)\r
- @$(CPP) -c $(CPP_FLAGS_FULL) -o"$@" $(patsubst %.o,%.cpp,$(subst $(PROJECT_OBJ_DIR)/,,$@))\r
-\r
-$(AS_OBJTARGETS) :\r
- @echo [AS] $(subst $(PROJECT_OBJ_DIR)/,,$@)\r
- @$(AS) $(AS_FLAGS) -o"$@" $(patsubst %.o,%.s,$(subst $(PROJECT_OBJ_DIR)/,,$@))\r
-\r
-ifeq ($(wildcard $(PROJECT_DEP_FILE)),$(PROJECT_DEP_FILE))\r
-\r
-include $(PROJECT_DEP_FILE)\r
-\r
-endif\r
-\r
-.PHONY: clean xclean\r
-clean:\r
- @echo [CLEAN] : $(PROJECT_NAME)\r
- @$(RM) $(CC_OBJTARGETS) $(CPP_OBJTARGETS) $(AS_OBJTARGETS)\r
-\r
-xclean: clean\r
-ifneq ($(wildcard $(PROJECT_DIR)/$(PROJECT_MAKE)),)\r
- @echo [XCLEAN] : $(PROJECT_NAME)\r
- @$(RM) $(PROJECT_BINARY) $(PROJECT_BINARY_LIB) $(PROJECT_DEP_FILE)\r
-endif\r
-\r
-.PHONY : welcome_line\r
-welcome_line :\r
- @echo $(MYCUSTOMSPACE)\r
- @echo Building $(PROJECT_BINARY)\r
- @echo $(MYCUSTOMTAB)RTE_TARGET = $(RTE_TARGET)\r
- @echo $(MYCUSTOMSPACE)\r
-\r
-\r
-.PHONY : debug release\r
-\r
-debug : all\r
-release : all\r
-\r
-$(PROJECT_BINARY) : $(DIRLIST) echo_start_build $(GENERATE_DEPS) $(PRE_BUILD) $(CC_OBJTARGETS) $(CPP_OBJTARGETS) $(AS_OBJTARGETS)\r
- @echo [AR] $(subst $(BUILDDIR)/,,$@)\r
- @$(AR) $(AR_FLAGS) $@ $(CC_OBJTARGETS) $(CPP_OBJTARGETS) $(AS_OBJTARGETS)\r
+#/******************************************************************************
+#*
+#* Copyright (c) 2019 Intel.
+#*
+#* Licensed under the Apache License, Version 2.0 (the "License");
+#* you may not use this file except in compliance with the License.
+#* You may obtain a copy of the License at
+#*
+#* http://www.apache.org/licenses/LICENSE-2.0
+#*
+#* Unless required by applicable law or agreed to in writing, software
+#* distributed under the License is distributed on an "AS IS" BASIS,
+#* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#* See the License for the specific language governing permissions and
+#* limitations under the License.
+#*
+#*******************************************************************************/
+
+MYCUSTOMTAB=' '
+MYCUSTOMSPACE='============================================================================================'
+MYCUSTOMSPACE1='------------------------------------------------------------'
+
+##############################################################
+# Tools configuration
+##############################################################
+CC := icc
+CPP := icpc
+AS := as
+AR := ar
+LD := icc
+OBJDUMP := objdump
+
+ifeq ($(SHELL),cmd.exe)
+MD := mkdir.exe -p
+CP := cp.exe -f
+RM := rm.exe -rf
+else
+MD := mkdir -p
+CP := cp -f
+RM := rm -rf
+endif
+
+PROJECT_NAME := libxran
+PROJECT_TYPE := lib
+PROJECT_DIR := $(XRAN_DIR)/lib
+BUILDDIR := ./build
+PROJECT_BINARY := $(BUILDDIR)/$(PROJECT_NAME).a
+
+ifeq ($(RTE_SDK),)
+ $(error "Please define RTE_SDK environment variable")
+endif
+
+RTE_TARGET ?= x86_64-native-linuxapp-gcc
+RTE_INC := $(RTE_SDK)/$(RTE_TARGET)/include
+
+API_DIR := $(PROJECT_DIR)/api
+SRC_DIR := $(PROJECT_DIR)/src
+ETH_DIR := $(PROJECT_DIR)/ethernet
+
+ifeq ($(MLOG),1)
+ifeq ($(MLOG_DIR),)
+ MLOG_DIR=$(XRAN_DIR)/../mlog
+endif
+endif
+
+CC_SRC = $(ETH_DIR)/ethdi.c \
+ $(ETH_DIR)/ethernet.c \
+ $(SRC_DIR)/xran_up_api.c \
+ $(SRC_DIR)/xran_sync_api.c \
+ $(SRC_DIR)/xran_timer.c \
+ $(SRC_DIR)/xran_cp_api.c \
+ $(SRC_DIR)/xran_transport.c \
+ $(SRC_DIR)/xran_common.c \
+ $(SRC_DIR)/xran_ul_tables.c \
+ $(SRC_DIR)/xran_frame_struct.c \
+ $(SRC_DIR)/xran_app_frag.c \
+ $(SRC_DIR)/xran_main.c
+
+CPP_SRC = $(SRC_DIR)/xran_compression.cpp
+
+CC_FLAGS += -std=gnu11 -Wall -Wno-deprecated-declarations \
+ -fdata-sections \
+ -ffunction-sections \
+ -g \
+ -Wall \
+ -Wimplicit-function-declaration \
+ -g -O3 -wd1786
+
+CC_FLAGS += -fstack-protector-strong -z,now, -z,relro \
+ -z noexecstack -Wformat -Wformat-security -Werror=format-security \
+ -fno-strict-overflow -fwrapv
+
+CPP_FLAGS := -D__STDC_LIMIT_MACROS -D__STDC_CONSTANT_MACROS -D_GNU_SOURCE -D_REENTRANT -pipe -no-prec-div \
+ -no-prec-div -fp-model fast=2\
+ -no-prec-sqrt -falign-functions=16 -fast-transcendentals \
+ -Werror -Wno-unused-variable -std=c++11 -mcmodel=large
+
+INC := -I$(API_DIR) -I$(ETH_DIR) -I$(SRC_DIR) -I$(RTE_INC)
+DEF :=
+ifeq ($(MLOG),1)
+ INC += -I$(MLOG_DIR)/source
+ DEF += -DMLOG_ENABLED
+else
+ DEF += -UMLOG_ENABLED
+endif
+
+#DEF += -DFCN_ADAPT
+
+AS_FLAGS :=
+AR_FLAGS := rc
+
+PROJECT_OBJ_DIR := build/obj
+
+CC_OBJS := $(patsubst %.c,%.o,$(CC_SRC))
+CPP_OBJS := $(patsubst %.cpp,%.o,$(CPP_SRC))
+AS_OBJS := $(patsubst %.s,%.o,$(AS_SRC))
+OBJS := $(CC_OBJS) $(CPP_OBJS) $(AS_OBJS) $(LIBS)
+DIRLIST := $(addprefix $(PROJECT_OBJ_DIR)/,$(sort $(dir $(OBJS))))
+
+CC_OBJTARGETS := $(addprefix $(PROJECT_OBJ_DIR)/,$(CC_OBJS))
+CPP_OBJTARGETS := $(addprefix $(PROJECT_OBJ_DIR)/,$(CPP_OBJS))
+
+AS_OBJTARGETS := $(addprefix $(PROJECT_OBJ_DIR)/,$(AS_OBJS))
+CPP_COMP := -O3 -xcore-avx512 -restrict -g -fasm-blocks
+CC_FLAGS_FULL := $(CC_FLAGS) $(INC) $(DEF)
+CPP_FLAGS_FULL := $(CPP_FLAGS) $(CPP_COMP) $(INC) $(DEF)
+
+AS_FLAGS := $(AS_FLAGS) $(INC)
+
+PROJECT_DEP_FILE := $(PROJECT_OBJ_DIR)/$(PROJECT_NAME).dep
+
+ifeq ($(wildcard $(PROJECT_DEP_FILE)),$(PROJECT_DEP_FILE))
+GENERATE_DEPS :=
+else
+
+CC_DEPS := $(addprefix __dep__,$(subst ../,__up__,$(CC_SRC)))
+CPP_DEPS := $(addprefix __dep__,$(subst ../,__up__,$(CPP_SRC)))
+GENERATE_DEPS := generate_deps
+endif
+
+all : welcome_line $(PROJECT_BINARY)
+ @echo $(PROJECT_BINARY)
+
+.PHONY : clear_dep
+clear_dep:
+ @$(RM) $(PROJECT_DEP_FILE)
+ @echo [DEP] $(subst $(PROJECT_OBJ_DIR)/,,$(PROJECT_DEP_FILE))
+
+$(CC_DEPS) :
+ @$(CC) -MM $(subst __up__,../,$(subst __dep__,,$@)) -MT $(PROJECT_OBJ_DIR)/$(patsubst %.c,%.o,$(subst __up__,../,$(subst __dep__,,$@))) $(CC_FLAGS_FULL) >> $(PROJECT_DEP_FILE)
+
+$(CPP_DEPS) :
+ @$(CPP) -MM $(subst __up__,../,$(subst __dep__,,$@)) -MT $(PROJECT_OBJ_DIR)/$(patsubst %.cpp,%.o,$(subst __up__,../,$(subst __dep__,,$@))) $(CPP_FLAGS_FULL) >> $(PROJECT_DEP_FILE)
+
+.PHONY : generate_deps
+generate_deps : clear_dep $(CC_DEPS) $(CPP_DEPS)
+
+
+.PHONY : echo_start_build
+echo_start_build :
+ @echo [BUILD] $(PROJECT_TYPE) : $(PROJECT_NAME)
+
+$(DIRLIST) :
+ -@$(MD) $@
+
+$(CC_OBJTARGETS) :
+ @echo [CC] $(subst $(PROJECT_OBJ_DIR)/,,$@)
+ @$(CC) -c $(CC_FLAGS_FULL) -o"$@" $(patsubst %.o,%.c,$(subst $(PROJECT_OBJ_DIR)/,,$@))
+
+$(CPP_OBJTARGETS) :
+ @echo [CPP] $(subst $(PROJECT_OBJ_DIR)/,,$@)
+ @$(CPP) -c $(CPP_FLAGS_FULL) -o"$@" $(patsubst %.o,%.cpp,$(subst $(PROJECT_OBJ_DIR)/,,$@))
+
+$(AS_OBJTARGETS) :
+ @echo [AS] $(subst $(PROJECT_OBJ_DIR)/,,$@)
+ @$(AS) $(AS_FLAGS) -o"$@" $(patsubst %.o,%.s,$(subst $(PROJECT_OBJ_DIR)/,,$@))
+
+ifeq ($(wildcard $(PROJECT_DEP_FILE)),$(PROJECT_DEP_FILE))
+
+include $(PROJECT_DEP_FILE)
+
+endif
+
+.PHONY: clean xclean
+clean:
+ @echo [CLEAN] : $(PROJECT_NAME)
+ @$(RM) $(CC_OBJTARGETS) $(CPP_OBJTARGETS) $(AS_OBJTARGETS)
+
+xclean: clean
+ifneq ($(wildcard $(PROJECT_DIR)/$(PROJECT_MAKE)),)
+ @echo [XCLEAN] : $(PROJECT_NAME)
+ @$(RM) $(PROJECT_BINARY) $(PROJECT_BINARY_LIB) $(PROJECT_DEP_FILE)
+endif
+
+.PHONY : welcome_line
+welcome_line :
+ @echo $(MYCUSTOMSPACE)
+ @echo Building $(PROJECT_BINARY)
+ @echo $(MYCUSTOMTAB)RTE_TARGET = $(RTE_TARGET)
+ @echo $(MYCUSTOMSPACE)
+
+
+.PHONY : debug release
+
+debug : all
+release : all
+
+$(PROJECT_BINARY) : $(DIRLIST) echo_start_build $(GENERATE_DEPS) $(PRE_BUILD) $(CC_OBJTARGETS) $(CPP_OBJTARGETS) $(AS_OBJTARGETS)
+ @echo [AR] $(subst $(BUILDDIR)/,,$@)
+ @$(AR) $(AR_FLAGS) $@ $(CC_OBJTARGETS) $(CPP_OBJTARGETS) $(AS_OBJTARGETS)
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/*!\r
- \file xran_compression.h\r
- \brief External API for compading with the use BFP algorithm.\r
-*/\r
-\r
-#ifndef _XRAN_COMPRESSION_H_\r
-#define _XRAN_COMPRESSION_H_\r
-\r
-#include <stdint.h>\r
-\r
-#ifdef __cplusplus\r
-extern "C" {\r
-#endif\r
-\r
-/*!\r
- \struct xranlib_compress_request\r
- \brief Request structure containing pointer to data and its length.\r
-*/\r
-struct xranlib_compress_request {\r
- int16_t *data_in; /*!< Pointer to data to compress. */\r
- int16_t numRBs; /*!< numRBs */\r
- int16_t compMethod; /*!< Compression method */\r
- int16_t iqWidth; /*!< Bit size */\r
- int32_t len; /*!< Length of input buffer in bytes */\r
-};\r
-\r
-/*!\r
- \struct xranlib_compress_response\r
- \brief Response structure containing pointer to data and its length.\r
-*/\r
-struct xranlib_compress_response {\r
- int8_t *data_out; /*!< Pointer to data after compression. */\r
-\r
- int32_t len; /*!< Length of output data. */\r
-};\r
-\r
-/*!\r
- \struct xranlib_decompress_request\r
- \brief Request structure containing pointer to data and its length.\r
-*/\r
-struct xranlib_decompress_request {\r
- int8_t *data_in; /*!< Pointer to data to decompress. */\r
- int16_t numRBs; /*!< numRBs */\r
- int16_t compMethod; /*!< Compression method */\r
- int16_t iqWidth; /*!< Bit size */\r
-\r
- int32_t len; /*!< Length of input data. */\r
-};\r
-\r
-/*!\r
- \struct xranlib_decompress_response\r
- \brief Response structure containing pointer to data and its length.\r
-*/\r
-struct xranlib_decompress_response {\r
- int16_t *data_out; /*!< Pointer to data after decompression. */\r
-\r
- int32_t len; /*!< Length of output data. */\r
-};\r
-\r
-/*!\r
- \brief Report the version number for the xranlib_companding library.\r
- \param [in] version Pointer to a char buffer where the version string should be copied.\r
- \param [in] buffer_size The length of the string buffer, must be at least\r
- xranlib_SDK_VERSION_STRING_MAX_LEN characters.\r
- \return 0 if the version string was populated, otherwise -1.\r
-*/\r
-int16_t\r
-xranlib_companding_version(char *version, int buffer_size);\r
-\r
-//! @{\r
-/*!\r
- \brief Compress functions - it converts a 16-bit linear PCM value to 8-bt A-law.\r
- \param [in] request Structure containing the input data and data length.\r
- \param [out] response Structure containing the output data and data length.\r
- \return 0 for success, -1 for error\r
-*/\r
-int\r
-xranlib_compress(const struct xranlib_compress_request *request,\r
- struct xranlib_compress_response *response);\r
-\r
-int xranlib_compress_sse(const struct xranlib_compress_request *request,\r
- struct xranlib_compress_response *response);\r
-int xranlib_compress_avx2(const struct xranlib_compress_request *request,\r
- struct xranlib_compress_response *response);\r
-int xranlib_compress_avx512(const struct xranlib_compress_request *request,\r
- struct xranlib_compress_response *response);\r
-int xranlib_compress_avx512_bfw(const struct xranlib_compress_request *request,\r
- struct xranlib_compress_response *response);\r
-//! @}\r
-\r
-//! @{\r
-/*!\r
- \brief Decompress function - it converts an A-law value to 16-bit linear PCM.\r
- \param [in] request Structure containing the input data and data length.\r
- \param [out] response Structure containing the output data and data length.\r
- \return 0 for success, -1 for error.\r
-**/\r
-int\r
-xranlib_decompress(const struct xranlib_decompress_request *request,\r
- struct xranlib_decompress_response *response);\r
-\r
-int xranlib_decompress_sse(const struct xranlib_decompress_request *request,\r
- struct xranlib_decompress_response *response);\r
-int xranlib_decompress_avx2(const struct xranlib_decompress_request *request,\r
- struct xranlib_decompress_response *response);\r
-int xranlib_decompress_avx512(const struct xranlib_decompress_request *request,\r
- struct xranlib_decompress_response *response);\r
-//! @}\r
-\r
-#ifdef __cplusplus\r
-}\r
-#endif\r
-\r
-#endif /* _XRAN_COMPRESSION_H_ */\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/*!
+ \file xran_compression.h
+ \brief External API for compading with the use BFP algorithm.
+*/
+
+#ifndef _XRAN_COMPRESSION_H_
+#define _XRAN_COMPRESSION_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*!
+ \struct xranlib_compress_request
+ \brief Request structure containing pointer to data and its length.
+*/
+struct xranlib_compress_request {
+ int16_t *data_in; /*!< Pointer to data to compress. */
+ int16_t numRBs; /*!< numRBs */
+ int16_t compMethod; /*!< Compression method */
+ int16_t iqWidth; /*!< Bit size */
+ int32_t len; /*!< Length of input buffer in bytes */
+};
+
+/*!
+ \struct xranlib_compress_response
+ \brief Response structure containing pointer to data and its length.
+*/
+struct xranlib_compress_response {
+ int8_t *data_out; /*!< Pointer to data after compression. */
+
+ int32_t len; /*!< Length of output data. */
+};
+
+/*!
+ \struct xranlib_decompress_request
+ \brief Request structure containing pointer to data and its length.
+*/
+struct xranlib_decompress_request {
+ int8_t *data_in; /*!< Pointer to data to decompress. */
+ int16_t numRBs; /*!< numRBs */
+ int16_t compMethod; /*!< Compression method */
+ int16_t iqWidth; /*!< Bit size */
+
+ int32_t len; /*!< Length of input data. */
+};
+
+/*!
+ \struct xranlib_decompress_response
+ \brief Response structure containing pointer to data and its length.
+*/
+struct xranlib_decompress_response {
+ int16_t *data_out; /*!< Pointer to data after decompression. */
+
+ int32_t len; /*!< Length of output data. */
+};
+
+/*!
+ \brief Report the version number for the xranlib_companding library.
+ \param [in] version Pointer to a char buffer where the version string should be copied.
+ \param [in] buffer_size The length of the string buffer, must be at least
+ xranlib_SDK_VERSION_STRING_MAX_LEN characters.
+ \return 0 if the version string was populated, otherwise -1.
+*/
+int16_t
+xranlib_companding_version(char *version, int buffer_size);
+
+//! @{
+/*!
+ \brief Compress functions - it converts a 16-bit linear PCM value to 8-bt A-law.
+ \param [in] request Structure containing the input data and data length.
+ \param [out] response Structure containing the output data and data length.
+ \return 0 for success, -1 for error
+*/
+int
+xranlib_compress(const struct xranlib_compress_request *request,
+ struct xranlib_compress_response *response);
+
+int xranlib_compress_sse(const struct xranlib_compress_request *request,
+ struct xranlib_compress_response *response);
+int xranlib_compress_avx2(const struct xranlib_compress_request *request,
+ struct xranlib_compress_response *response);
+int xranlib_compress_avx512(const struct xranlib_compress_request *request,
+ struct xranlib_compress_response *response);
+int xranlib_compress_avx512_bfw(const struct xranlib_compress_request *request,
+ struct xranlib_compress_response *response);
+//! @}
+
+//! @{
+/*!
+ \brief Decompress function - it converts an A-law value to 16-bit linear PCM.
+ \param [in] request Structure containing the input data and data length.
+ \param [out] response Structure containing the output data and data length.
+ \return 0 for success, -1 for error.
+**/
+int
+xranlib_decompress(const struct xranlib_decompress_request *request,
+ struct xranlib_decompress_response *response);
+
+int xranlib_decompress_sse(const struct xranlib_decompress_request *request,
+ struct xranlib_decompress_response *response);
+int xranlib_decompress_avx2(const struct xranlib_decompress_request *request,
+ struct xranlib_decompress_response *response);
+int xranlib_decompress_avx512(const struct xranlib_decompress_request *request,
+ struct xranlib_decompress_response *response);
+//! @}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _XRAN_COMPRESSION_H_ */
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-#pragma once\r
-#include <stdint.h>\r
-\r
-// This configuration file sets global constants and macros which are\r
-// of general use throughout the project.\r
-\r
-// All current IA processors of interest align their cache lines on\r
-// this boundary. If the cache alignment for future processors changes\r
-// then the most restrictive alignment should be set.\r
-constexpr unsigned k_cacheByteAlignment = 64;\r
-\r
-// Force the data to which this macro is applied to be aligned on a cache line.\r
-// For example:\r
-//\r
-// CACHE_ALIGNED float data[64];\r
-#define CACHE_ALIGNED alignas(k_cacheByteAlignment)\r
-\r
-// Hint to the compiler that the data to which this macro is applied\r
-// can be assumed to be aligned to a cache line. This allows the\r
-// compiler to generate improved code by using aligned reads and\r
-// writes.\r
-#define ASSUME_CACHE_ALIGNED(data) __assume_aligned(data, k_cacheByteAlignment);\r
-\r
-/// Intel compiler frequently complains about templates not being declared in an external\r
-/// header. Templates are used throughout this project's source files to define local type-specific\r
-/// versions of functions. Defining every one of these in a header is unnecessary, so the warnings\r
-/// about this are turned off globally.\r
-#pragma warning(disable:1418)\r
-#pragma warning(disable:1419)\r
-\r
-\r
-namespace BlockFloatCompander\r
-{\r
- /// Compute 32 RB at a time\r
- static constexpr int k_numBitsIQ = 16;\r
- static constexpr int k_numRB = 16;\r
- static constexpr int k_numRE = 12;\r
- static constexpr int k_numREReal = k_numRE * 2;\r
- static constexpr int k_numSampsExpanded = k_numRB * k_numREReal;\r
- static constexpr int k_numSampsCompressed = (k_numSampsExpanded * 2) + k_numRB;\r
-\r
- struct CompressedData\r
- {\r
- /// Compressed data\r
- CACHE_ALIGNED uint8_t dataCompressedDataOut[k_numSampsCompressed];\r
- CACHE_ALIGNED uint8_t *dataCompressed;\r
- /// Size of mantissa including sign bit\r
- int iqWidth;\r
- };\r
-\r
- struct ExpandedData\r
- {\r
- /// Expanded data or input data to compressor\r
- CACHE_ALIGNED int16_t dataExpandedIn[k_numSampsExpanded];\r
- CACHE_ALIGNED int16_t *dataExpanded;\r
-\r
- /// Size of mantissa including sign bit\r
- int iqWidth;\r
- };\r
-\r
- void BlockFloatCompress_Basic(const ExpandedData& dataIn, CompressedData* dataOut);\r
- void BlockFloatCompress_8b_AVX512(const ExpandedData& dataIn, CompressedData* dataOut);\r
- void BlockFloatCompress_9b_AVX512(const ExpandedData& dataIn, CompressedData* dataOut);\r
- void BlockFloatCompress_10b_AVX512(const ExpandedData& dataIn, CompressedData* dataOut);\r
- void BlockFloatCompress_12b_AVX512(const ExpandedData& dataIn, CompressedData* dataOut);\r
-\r
- void BlockFloatExpand_Basic(const CompressedData& dataIn, ExpandedData* dataOut);\r
- void BlockFloatExpand_8b_AVX512(const CompressedData& dataIn, ExpandedData* dataOut);\r
- void BlockFloatExpand_9b_AVX512(const CompressedData& dataIn, ExpandedData* dataOut);\r
- void BlockFloatExpand_10b_AVX512(const CompressedData& dataIn, ExpandedData* dataOut);\r
- void BlockFloatExpand_12b_AVX512(const CompressedData& dataIn, ExpandedData* dataOut);\r
-}\r
-\r
-namespace BlockFloatCompanderBFW\r
-{\r
- /// Compute 32 RB at a time\r
- static constexpr int k_numBitsIQ = 16;\r
- static constexpr int k_numRB = 1;\r
- static constexpr int k_numRE = 32;\r
- static constexpr int k_numREReal = k_numRE * 2;\r
- static constexpr int k_numSampsExpanded = k_numRB * k_numREReal;\r
- static constexpr int k_numSampsCompressed = (k_numSampsExpanded * 2) + k_numRB;\r
-\r
- struct CompressedData\r
- {\r
- /// Compressed data\r
- CACHE_ALIGNED uint8_t dataCompressedDataOut[k_numSampsCompressed];\r
- CACHE_ALIGNED uint8_t *dataCompressed;\r
- /// Size of mantissa including sign bit\r
- int iqWidth;\r
- };\r
-\r
- struct ExpandedData\r
- {\r
- /// Expanded data or input data to compressor\r
- CACHE_ALIGNED int16_t dataExpandedIn[k_numSampsExpanded];\r
- CACHE_ALIGNED int16_t *dataExpanded;\r
-\r
- /// Size of mantissa including sign bit\r
- int iqWidth;\r
- };\r
-\r
- void BlockFloatCompress_Basic(const ExpandedData& dataIn, CompressedData* dataOut);\r
-/* void BlockFloatCompress_8b_AVX512(const ExpandedData& dataIn, CompressedData* dataOut);\r
- void BlockFloatCompress_9b_AVX512(const ExpandedData& dataIn, CompressedData* dataOut);\r
- void BlockFloatCompress_10b_AVX512(const ExpandedData& dataIn, CompressedData* dataOut);\r
- void BlockFloatCompress_12b_AVX512(const ExpandedData& dataIn, CompressedData* dataOut); */\r
-\r
- void BlockFloatExpand_Basic(const CompressedData& dataIn, ExpandedData* dataOut);\r
-/* void BlockFloatExpand_8b_AVX512(const CompressedData& dataIn, ExpandedData* dataOut);\r
- void BlockFloatExpand_9b_AVX512(const CompressedData& dataIn, ExpandedData* dataOut);\r
- void BlockFloatExpand_10b_AVX512(const CompressedData& dataIn, ExpandedData* dataOut);\r
- void BlockFloatExpand_12b_AVX512(const CompressedData& dataIn, ExpandedData* dataOut);*/\r
-}\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+#pragma once
+#include <stdint.h>
+
+// This configuration file sets global constants and macros which are
+// of general use throughout the project.
+
+// All current IA processors of interest align their cache lines on
+// this boundary. If the cache alignment for future processors changes
+// then the most restrictive alignment should be set.
+constexpr unsigned k_cacheByteAlignment = 64;
+
+// Force the data to which this macro is applied to be aligned on a cache line.
+// For example:
+//
+// CACHE_ALIGNED float data[64];
+#define CACHE_ALIGNED alignas(k_cacheByteAlignment)
+
+// Hint to the compiler that the data to which this macro is applied
+// can be assumed to be aligned to a cache line. This allows the
+// compiler to generate improved code by using aligned reads and
+// writes.
+#define ASSUME_CACHE_ALIGNED(data) __assume_aligned(data, k_cacheByteAlignment);
+
+/// Intel compiler frequently complains about templates not being declared in an external
+/// header. Templates are used throughout this project's source files to define local type-specific
+/// versions of functions. Defining every one of these in a header is unnecessary, so the warnings
+/// about this are turned off globally.
+#pragma warning(disable:1418)
+#pragma warning(disable:1419)
+
+
+namespace BlockFloatCompander
+{
+ /// Compute 32 RB at a time
+ static constexpr int k_numBitsIQ = 16;
+ static constexpr int k_numRB = 16;
+ static constexpr int k_numRE = 12;
+ static constexpr int k_numREReal = k_numRE * 2;
+ static constexpr int k_numSampsExpanded = k_numRB * k_numREReal;
+ static constexpr int k_numSampsCompressed = (k_numSampsExpanded * 2) + k_numRB;
+
+ struct CompressedData
+ {
+ /// Compressed data
+ CACHE_ALIGNED uint8_t dataCompressedDataOut[k_numSampsCompressed];
+ CACHE_ALIGNED uint8_t *dataCompressed;
+ /// Size of mantissa including sign bit
+ int iqWidth;
+ };
+
+ struct ExpandedData
+ {
+ /// Expanded data or input data to compressor
+ CACHE_ALIGNED int16_t dataExpandedIn[k_numSampsExpanded];
+ CACHE_ALIGNED int16_t *dataExpanded;
+
+ /// Size of mantissa including sign bit
+ int iqWidth;
+ };
+
+ void BlockFloatCompress_Basic(const ExpandedData& dataIn, CompressedData* dataOut);
+ void BlockFloatCompress_8b_AVX512(const ExpandedData& dataIn, CompressedData* dataOut);
+ void BlockFloatCompress_9b_AVX512(const ExpandedData& dataIn, CompressedData* dataOut);
+ void BlockFloatCompress_10b_AVX512(const ExpandedData& dataIn, CompressedData* dataOut);
+ void BlockFloatCompress_12b_AVX512(const ExpandedData& dataIn, CompressedData* dataOut);
+
+ void BlockFloatExpand_Basic(const CompressedData& dataIn, ExpandedData* dataOut);
+ void BlockFloatExpand_8b_AVX512(const CompressedData& dataIn, ExpandedData* dataOut);
+ void BlockFloatExpand_9b_AVX512(const CompressedData& dataIn, ExpandedData* dataOut);
+ void BlockFloatExpand_10b_AVX512(const CompressedData& dataIn, ExpandedData* dataOut);
+ void BlockFloatExpand_12b_AVX512(const CompressedData& dataIn, ExpandedData* dataOut);
+}
+
+namespace BlockFloatCompanderBFW
+{
+ /// Compute 32 RB at a time
+ static constexpr int k_numBitsIQ = 16;
+ static constexpr int k_numRB = 1;
+ static constexpr int k_numRE = 32;
+ static constexpr int k_numREReal = k_numRE * 2;
+ static constexpr int k_numSampsExpanded = k_numRB * k_numREReal;
+ static constexpr int k_numSampsCompressed = (k_numSampsExpanded * 2) + k_numRB;
+
+ struct CompressedData
+ {
+ /// Compressed data
+ CACHE_ALIGNED uint8_t dataCompressedDataOut[k_numSampsCompressed];
+ CACHE_ALIGNED uint8_t *dataCompressed;
+ /// Size of mantissa including sign bit
+ int iqWidth;
+ };
+
+ struct ExpandedData
+ {
+ /// Expanded data or input data to compressor
+ CACHE_ALIGNED int16_t dataExpandedIn[k_numSampsExpanded];
+ CACHE_ALIGNED int16_t *dataExpanded;
+
+ /// Size of mantissa including sign bit
+ int iqWidth;
+ };
+
+ void BlockFloatCompress_Basic(const ExpandedData& dataIn, CompressedData* dataOut);
+/* void BlockFloatCompress_8b_AVX512(const ExpandedData& dataIn, CompressedData* dataOut);
+ void BlockFloatCompress_9b_AVX512(const ExpandedData& dataIn, CompressedData* dataOut);
+ void BlockFloatCompress_10b_AVX512(const ExpandedData& dataIn, CompressedData* dataOut);
+ void BlockFloatCompress_12b_AVX512(const ExpandedData& dataIn, CompressedData* dataOut); */
+
+ void BlockFloatExpand_Basic(const CompressedData& dataIn, ExpandedData* dataOut);
+/* void BlockFloatExpand_8b_AVX512(const CompressedData& dataIn, ExpandedData* dataOut);
+ void BlockFloatExpand_9b_AVX512(const CompressedData& dataIn, ExpandedData* dataOut);
+ void BlockFloatExpand_10b_AVX512(const CompressedData& dataIn, ExpandedData* dataOut);
+ void BlockFloatExpand_12b_AVX512(const CompressedData& dataIn, ExpandedData* dataOut);*/
+}
+
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/**\r
- * @brief This file provides the definitions for Control Plane Messages APIs.\r
- *\r
- * @file xran_cp_api.h\r
- * @ingroup group_lte_source_xran\r
- * @author Intel Corporation\r
- *\r
- **/\r
-\r
-#ifndef _XRAN_CP_API_H_\r
-#define _XRAN_CP_API_H_\r
-\r
-#ifdef __cplusplus\r
-extern "C" {\r
-#endif\r
-\r
-\r
-#include "xran_fh_o_du.h"\r
-#include "xran_pkt_cp.h"\r
-#include "xran_transport.h"\r
-\r
-#define XRAN_MAX_SECTIONDB_CTX 2\r
-\r
-#define XRAN_MAX_NUM_EXTENSIONS XRAN_MAX_PRBS /* Maximum number of extensions in a section [up to 1 ext section per RB]*/\r
-#define XRAN_MAX_NUM_UE 16 /* Maximum number of UEs/Lyaers */\r
-#define XRAN_MAX_NUM_ANT_BF 64 /* Maximum number of beamforming antenna,\r
- * could be defined as XRAN_MAX_ANTENNA_NR */\r
-/* Maximum total number of beamforming weights (5.4.7.1.2) */\r
-#define XRAN_MAX_BFW_N (XRAN_MAX_NUM_ANT_BF*XRAN_MAX_NUM_UE)\r
-#define XRAN_MAX_MODCOMP_ADDPARMS 6 /* max should be even number */\r
-\r
-#define XRAN_SECTIONEXT_ALIGN 4 /* alignment size in byte for section extension */\r
-\r
-\r
-/** Control Plane section types, defined in 5.4 Table 5.1 */\r
-enum xran_cp_sectiontype {\r
- XRAN_CP_SECTIONTYPE_0 = 0, /**< Unused RB or Symbols in DL or UL, not supported */\r
- XRAN_CP_SECTIONTYPE_1 = 1, /**< Most DL/UL Radio Channels */\r
- XRAN_CP_SECTIONTYPE_3 = 3, /**< PRACH and Mixed-numerology Channels */\r
- XRAN_CP_SECTIONTYPE_5 = 5, /**< UE scheduling information, not supported */\r
- XRAN_CP_SECTIONTYPE_6 = 6, /**< Channel Information, not supported */\r
- XRAN_CP_SECTIONTYPE_7 = 7, /**< LAA, not supported */\r
- XRAN_CP_SECTIONTYPE_MAX\r
- };\r
-\r
-/** Filter index, defined in 5.4.4.3 */\r
-enum xran_cp_filterindex {\r
- XRAN_FILTERINDEX_STANDARD = 0, /**< UL filter for standard channel */\r
- XRAN_FILTERINDEX_PRACH_012 = 1, /**< UL filter for PRACH preamble format 0, 1, 2 */\r
- XRAN_FILTERINDEX_PRACH_3 = 2, /**< UL filter for PRACH preamble format 3 */\r
- XRAN_FILTERINDEX_PRACH_ABC = 3, /**< UL filter for PRACH preamble format A1~3, B1~4, C0, C2 */\r
- XRAN_FILTERINDEX_NPRACH = 4, /**< UL filter for NPRACH */\r
- XRAN_FILTERINDEX_MAX\r
- };\r
-\r
-/** Maximum Slot Index, defined in 5.4.4.6 */\r
-#define XRAN_SLOTID_MAX 16\r
-\r
-/** FFT size in frame structure, defined in 5.4.4.13 Table 5.9 */\r
-enum xran_cp_fftsize {\r
- XRAN_FFTSIZE_128 = 7, /* 128 */\r
- XRAN_FFTSIZE_256 = 8, /* 256 */\r
- XRAN_FFTSIZE_512 = 9, /* 512 */\r
- XRAN_FFTSIZE_1024 = 10, /* 1024 */\r
- XRAN_FFTSIZE_2048 = 11, /* 2048 */\r
- XRAN_FFTSIZE_4096 = 12, /* 4096 */\r
- XRAN_FFTSIZE_1536 = 13, /* 1536 */\r
- XRAN_FFTSIZE_MAX\r
- };\r
-\r
-/** Sub-carrier spacing, defined in 5.4.4.13 Table 5.10 */\r
-enum xran_cp_subcarrierspacing { /*3GPP u, SCS, Nslot, Slot len */\r
- XRAN_SCS_15KHZ = 0, /* 0, 15kHz, 1, 1ms */\r
- XRAN_SCS_30KHZ = 1, /* 1, 30kHz, 2, 500us */\r
- XRAN_SCS_60KHZ = 2, /* 2, 60kHz, 4, 250us */\r
- XRAN_SCS_120KHZ = 3, /* 3, 120kHz, 8, 125us */\r
- XRAN_SCS_240KHZ = 4, /* 4, 240kHz, 16, 62.5us */\r
- XRAN_SCS_1P25KHZ = 12, /* NA, 1.25kHz, 1, 1ms */\r
- XRAN_SCS_3P75KHZ = 13, /* NA, 3.75kHz, 1, 1ms */\r
- XRAN_SCS_5KHZ = 14, /* NA, 5kHz, 1, 1ms */\r
- XRAN_SCS_7P5KHZ = 15, /* NA, 7.5kHz, 1, 1ms */\r
- XRAN_SCS_MAX\r
- };\r
-\r
-/** Resource block indicator, defined in 5.4.5.2 */\r
-enum xran_cp_rbindicator {\r
- XRAN_RBIND_EVERY = 0, /**< every RB used */\r
- XRAN_RBIND_EVERYOTHER = 1, /**< every other RB used */\r
- XRAN_RBIND_MAX\r
- };\r
-\r
-/** Symbol number increment command, defined in 5.4.5.3 */\r
-enum xran_cp_symbolnuminc {\r
- XRAN_SYMBOLNUMBER_NOTINC = 0, /**< do not increment the current symbol number */\r
- XRAN_SYMBOLNUMBER_INC = 1, /**< increment the current symbol number and use that */\r
- XRAN_SYMBOLNUMBER_INC_MAX\r
- };\r
-\r
-/** Macro to convert the number of PRBs as defined in 5.4.5.6 */\r
-#define XRAN_CONVERT_NUMPRBC(x) ((x) > 255 ? 0 : (x))\r
-\r
-#define XRAN_CONVERT_IQWIDTH(x) ((x) > 15 ? 0 : (x))\r
-\r
-/** Minimum number of symbols, defined in 5.4.5.7 */\r
-#define XRAN_SYMBOLNUMBER_MIN 1\r
-/** Maximum number of symbols, defined in 5.4.5.7 */\r
-#define XRAN_SYMBOLNUMBER_MAX 14\r
-\r
-/* LAA message type 5.4.5.14 Table 5.11, not supported */\r
-#define XRAN_LAAMSGTYPE_LBT_PDSCH_REQ 0\r
-#define XRAN_LAAMSGTYPE_LBT_DRS_REQ 1\r
-#define XRAN_LAAMSGTYPE_LBT_PDSCH_RSP 2\r
-#define XRAN_LAAMSGTYPE_LBT_DRS_RSP 3\r
-#define XRAN_LAAMSGTYPE_LBT_BUFFER_ERROR 4\r
-#define XRAN_LAAMSGTYPE_LBT_CWCONFIG_REQ 5\r
-#define XRAN_LAAMSGTYPE_LBT_CWCONFIG_RSP 6\r
-\r
-#define XRAN_LBTMODE_FULL 0\r
-#define XRAN_LBTMODE_PARTIAL25 1\r
-#define XRAN_LBTMODE_PARTIAL34 2\r
-#define XRAN_LBTMODE_FULLSTOP 3\r
-\r
-#define XRAN_EF_F_LAST 0\r
-#define XRAN_EF_F_ANOTHER_ONE 1\r
-\r
-\r
-\r
-/** Control Plane section extension commands, defined in 5.4.6 Table 5.13 */\r
-enum xran_cp_sectionextcmd {\r
- XRAN_CP_SECTIONEXTCMD_0 = 0, /**< Reserved, for future use */\r
- XRAN_CP_SECTIONEXTCMD_1 = 1, /**< Beamforming weights */\r
- XRAN_CP_SECTIONEXTCMD_2 = 2, /**< Beamforming attributes */\r
- XRAN_CP_SECTIONEXTCMD_3 = 3, /**< DL Precoding configuration parameters and indications, not supported */\r
- XRAN_CP_SECTIONEXTCMD_4 = 4, /**< Modulation compression parameter */\r
- XRAN_CP_SECTIONEXTCMD_5 = 5, /**< Modulation compression additional scaling parameters */\r
- XRAN_CP_SECTIONEXTCMD_MAX /* 6~127 reserved for future use */\r
- };\r
-\r
-/** Macro to convert bfwIqWidth defined in 5.4.7.1.1, Table 5-15 */\r
-#define XRAN_CONVERT_BFWIQWIDTH(x) ((x) > 15 ? 0 : (x))\r
-\r
-/** Beamforming Weights Compression Method 5.4.7.1.1, Table 5-16 */\r
-enum xran_cp_bfw_compression_method {\r
- XRAN_BFWCOMPMETHOD_NONE = 0, /**< Uncopressed I/Q value */\r
- XRAN_BFWCOMPMETHOD_BLKFLOAT = 1, /**< I/Q mantissa value */\r
- XRAN_BFWCOMPMETHOD_BLKSCALE = 2, /**< I/Q scaled value */\r
- XRAN_BFWCOMPMETHOD_ULAW = 3, /**< compressed I/Q value */\r
- XRAN_BFWCOMPMETHOD_BEAMSPACE = 4, /**< beamspace I/Q coefficient */\r
- XRAN_BFWCOMPMETHOD_MAX /* reserved for future methods */\r
- };\r
-\r
-/** Beamforming Attributes Bitwidth 5.4.7.2.1 */\r
-enum xran_cp_bfa_bitwidth {\r
- XRAN_BFABITWIDTH_NO = 0, /**< the filed is no applicable or the default value shall be used */\r
- XRAN_BFABITWIDTH_2BIT = 1, /**< the filed is 2-bit bitwidth */\r
- XRAN_BFABITWIDTH_3BIT = 2, /**< the filed is 3-bit bitwidth */\r
- XRAN_BFABITWIDTH_4BIT = 3, /**< the filed is 4-bit bitwidth */\r
- XRAN_BFABITWIDTH_5BIT = 4, /**< the filed is 5-bit bitwidth */\r
- XRAN_BFABITWIDTH_6BIT = 5, /**< the filed is 6-bit bitwidth */\r
- XRAN_BFABITWIDTH_7BIT = 6, /**< the filed is 7-bit bitwidth */\r
- XRAN_BFABITWIDTH_8BIT = 7, /**< the filed is 8-bit bitwidth */\r
- };\r
-\r
-/**\r
- * This structure contains the information to generate the section body of C-Plane message */\r
-struct xran_section_info {\r
- uint8_t type; /* type of this section */\r
- /* section type bit- */\r
- /* 0 1 3 5 6 7 length */\r
- uint8_t startSymId; /* X X X X X X 4bits */\r
- uint8_t numSymbol; /* X X X X 4bits */\r
- uint8_t symInc; /* X X X X X 1bit */\r
- uint16_t id; /* X X X X X 12bits */\r
- uint16_t reMask; /* X X X X 12bits */\r
- uint16_t startPrbc; /* X X X X X 10bits */\r
- uint16_t numPrbc; /* X X X X X 8bits */ /* will be converted to zero if >255 */\r
- uint8_t rb; /* X X X X X 1bit */\r
- uint8_t compMeth; /* X X X 4bits */\r
- uint8_t iqWidth; /* X X X 4bits */\r
- uint8_t ef; /* X X X X 1bit */\r
- int32_t freqOffset; /* X 24bits */\r
- uint16_t beamId; /* X X 15bits */\r
- uint16_t ueId; /* X X 15bits */\r
- uint16_t regFactor; /* X 16bits */\r
- uint16_t pad0;\r
- /** for U-plane */\r
- struct xran_section_desc sec_desc[XRAN_NUM_OF_SYMBOL_PER_SLOT];\r
-};\r
-\r
-\r
-struct xran_sectionext1_info {\r
- uint16_t rbNumber; /**< number RBs to ext1 chain */\r
- uint16_t bfwNumber; /**< number of bf weights in this section */\r
- uint8_t bfwiqWidth;\r
- uint8_t bfwCompMeth;\r
- int16_t *p_bfwIQ; /**< pointer to formed section extention */\r
- int16_t bfwIQ_sz; /**< size of buffer with section extention information */\r
- union {\r
- uint8_t exponent;\r
- uint8_t blockScaler;\r
- uint8_t compBitWidthShift;\r
- uint8_t activeBeamspaceCoeffMask[XRAN_MAX_BFW_N]; /* ceil(N/8)*8, should be multiple of 8 */\r
- } bfwCompParam;\r
- };\r
-\r
-struct xran_sectionext2_info {\r
- uint8_t bfAzPtWidth; /* beamforming zenith beamwidth parameter */\r
- uint8_t bfAzPt;\r
- uint8_t bfZePtWidth; /* beamforming azimuth beamwidth parameter */\r
- uint8_t bfZePt;\r
- uint8_t bfAz3ddWidth; /* beamforming zenith pointing parameter */\r
- uint8_t bfAz3dd;\r
- uint8_t bfZe3ddWidth; /* beamforming azimuth pointing parameter */\r
- uint8_t bfZe3dd;\r
-\r
- uint8_t bfAzSI;\r
- uint8_t bfZeSI;\r
- };\r
-\r
-struct xran_sectionext3_info { /* NOT SUPPORTED */\r
- uint8_t codebookIdx;\r
- uint8_t layerId;\r
- uint8_t numLayers;\r
- uint8_t txScheme;\r
- uint16_t crsReMask;\r
- uint8_t crsShift;\r
- uint8_t crsSymNum;\r
- uint16_t beamIdAP1;\r
- uint16_t beamIdAP2;\r
- uint16_t beamIdAP3;\r
- };\r
-\r
-struct xran_sectionext4_info {\r
- uint8_t csf;\r
- uint8_t pad0;\r
- uint16_t modCompScaler;\r
- };\r
-\r
-struct xran_sectionext5_info {\r
- uint8_t num_sets;\r
- struct {\r
- uint16_t csf;\r
- uint16_t mcScaleReMask;\r
- uint16_t mcScaleOffset;\r
- } mc[XRAN_MAX_MODCOMP_ADDPARMS];\r
- };\r
-\r
-struct xran_sectionext_info {\r
- uint16_t type;\r
- uint16_t len;\r
- void *data;\r
- };\r
-\r
-\r
-/**\r
- * This structure contains the information to generate the section header of C-Plane message */\r
-struct xran_cp_header_params {\r
- // common parameters\r
- uint8_t filterIdx;\r
- uint8_t frameId;\r
- uint8_t subframeId;\r
- uint8_t slotId;\r
- uint8_t startSymId;\r
- /* section type bit- */\r
- /* 0 1 3 5 6 7 length */\r
- uint8_t fftSize; /* X X 4bits */\r
- uint8_t scs; /* X X 4bits */\r
- uint8_t iqWidth; /* X X X 4bits */\r
- uint8_t compMeth; /* X X X 4bits */\r
- uint8_t numUEs; /* X 8bits */\r
- uint16_t timeOffset; /* X X 16bits */\r
- uint16_t cpLength; /* X X 16bits */\r
- };\r
-\r
-/**\r
- * This structure to hold the information to generate the sections of C-Plane message */\r
-struct xran_section_gen_info {\r
- struct xran_section_info info; /**< The information for section */\r
-\r
- uint32_t exDataSize; /**< The number of Extensions or type 6/7 data */\r
- /** the array to store section extension */\r
- struct {\r
- uint16_t type; /**< the type of section extension */\r
- uint16_t len; /**< length of extension data */\r
- void *data; /**< pointer to extension data */\r
- } exData[XRAN_MAX_NUM_EXTENSIONS];\r
- struct xran_sectionext1_info m_ext1[XRAN_MAX_NUM_EXTENSIONS];\r
- struct xran_sectionext2_info m_ext2[XRAN_MAX_NUM_EXTENSIONS];\r
- struct xran_sectionext3_info m_ext3[XRAN_MAX_NUM_EXTENSIONS];\r
- struct xran_sectionext4_info m_ext4[XRAN_MAX_NUM_EXTENSIONS];\r
- struct xran_sectionext5_info m_ext5[XRAN_MAX_NUM_EXTENSIONS];\r
-};\r
-\r
-\r
-/**\r
- * This structure to hold the information to generate a C-Plane message */\r
-struct xran_cp_gen_params {\r
- uint8_t dir; /**< UL or DL */\r
- uint8_t sectionType; /**< each section must have same type with this */\r
- uint16_t numSections; /**< the number of sections to generate */\r
-\r
- struct xran_cp_header_params hdr;\r
- /**< The information for C-Plane message header */\r
- struct xran_section_gen_info *sections;\r
- /**< Array of the section information */\r
- };\r
-\r
-/**\r
- * This structure to hold the information of RB allocation from PHY\r
- * to send data for allocated RBs only. */\r
-struct xran_cp_rbmap_list {\r
- uint16_t grp_id; /**< group id for this entry, reserved for future use */\r
-\r
- uint8_t sym_start; /**< Start symbol ID */\r
- uint8_t sym_num; /**< Number of symbols */\r
-\r
- uint16_t rb_start; /**< Start RB position */\r
- uint16_t rb_num; /**< Number of RBs */\r
-\r
- int16_t iq_buff_offset; /**< Offset within Sym for start of IQs */\r
- int16_t iq_buff_len; /**< length IQs */\r
-\r
- uint16_t beam_id; /**< Bean Index */\r
- uint8_t iqWidth; /**< I and Q width in bits */\r
- uint8_t comp_meth; /**< Compression method */\r
- uint8_t pad0;\r
- };\r
-\r
-\r
-uint16_t xran_get_cplength(int cpLength);\r
-int32_t xran_get_freqoffset(int freqOffset, int scs);\r
-\r
-int xran_prepare_ctrl_pkt(struct rte_mbuf *mbuf,\r
- struct xran_cp_gen_params *params,\r
- uint8_t CC_ID, uint8_t Ant_ID,\r
- uint8_t seq_id);\r
-\r
-int xran_parse_cp_pkt(struct rte_mbuf *mbuf,\r
- struct xran_cp_gen_params *result,\r
- struct xran_recv_packet_info *pkt_info);\r
-\r
-int xran_cp_init_sectiondb(void *pHandle);\r
-int xran_cp_free_sectiondb(void *pHandle);\r
-int xran_cp_add_section_info(void *pHandle,\r
- uint8_t dir, uint8_t cc_id, uint8_t ruport_id,\r
- uint8_t ctx_id, struct xran_section_info *info);\r
-int xran_cp_add_multisection_info(void *pHandle,\r
- uint8_t cc_id, uint8_t ruport_id, uint8_t ctx_id,\r
- struct xran_cp_gen_params *gen_info);\r
-struct xran_section_info *xran_cp_find_section_info(void *pHandle,\r
- uint8_t dir, uint8_t cc_id, uint8_t ruport_id,\r
- uint8_t ctx_id, uint16_t section_id);\r
-struct xran_section_info *xran_cp_iterate_section_info(void *pHandle,\r
- uint8_t dir, uint8_t cc_id, uint8_t ruport_id,\r
- uint8_t ctx_id, uint32_t *next);\r
-int xran_cp_getsize_section_info(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ruport_id, uint8_t ctx_id);\r
-int xran_cp_reset_section_info(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ruport_id, uint8_t ctx_id);\r
-int32_t xran_cp_populate_section_ext_1(int8_t *p_ext1_dst, /**< destination buffer */\r
- uint16_t ext1_dst_len, /**< dest buffer size */\r
- int16_t *p_bfw_iq_src, /**< source buffer of IQs */\r
- uint16_t rbNumber, /**< number RBs to ext1 chain */\r
- uint16_t bfwNumber, /**< number of bf weights in this set of sections */\r
- uint8_t bfwiqWidth, /**< bit size of IQs */\r
- uint8_t bfwCompMeth); /**< compression method */\r
-#ifdef __cplusplus\r
-}\r
-#endif\r
-\r
-#endif /* _XRAN_CP_API_H_ */\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief This file provides the definitions for Control Plane Messages APIs.
+ *
+ * @file xran_cp_api.h
+ * @ingroup group_lte_source_xran
+ * @author Intel Corporation
+ *
+ **/
+
+#ifndef _XRAN_CP_API_H_
+#define _XRAN_CP_API_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#include "xran_fh_o_du.h"
+#include "xran_pkt_cp.h"
+#include "xran_transport.h"
+
+#define XRAN_MAX_SECTIONDB_CTX 2
+
+#define XRAN_MAX_NUM_EXTENSIONS XRAN_MAX_PRBS /* Maximum number of extensions in a section [up to 1 ext section per RB]*/
+#define XRAN_MAX_NUM_UE 16 /* Maximum number of UEs/Lyaers */
+#define XRAN_MAX_NUM_ANT_BF 64 /* Maximum number of beamforming antenna,
+ * could be defined as XRAN_MAX_ANTENNA_NR */
+/* Maximum total number of beamforming weights (5.4.7.1.2) */
+#define XRAN_MAX_BFW_N (XRAN_MAX_NUM_ANT_BF*XRAN_MAX_NUM_UE)
+#define XRAN_MAX_MODCOMP_ADDPARMS 6 /* max should be even number */
+
+#define XRAN_SECTIONEXT_ALIGN 4 /* alignment size in byte for section extension */
+
+
+/** Control Plane section types, defined in 5.4 Table 5.1 */
+enum xran_cp_sectiontype {
+ XRAN_CP_SECTIONTYPE_0 = 0, /**< Unused RB or Symbols in DL or UL, not supported */
+ XRAN_CP_SECTIONTYPE_1 = 1, /**< Most DL/UL Radio Channels */
+ XRAN_CP_SECTIONTYPE_3 = 3, /**< PRACH and Mixed-numerology Channels */
+ XRAN_CP_SECTIONTYPE_5 = 5, /**< UE scheduling information, not supported */
+ XRAN_CP_SECTIONTYPE_6 = 6, /**< Channel Information, not supported */
+ XRAN_CP_SECTIONTYPE_7 = 7, /**< LAA, not supported */
+ XRAN_CP_SECTIONTYPE_MAX
+ };
+
+/** Filter index, defined in 5.4.4.3 */
+enum xran_cp_filterindex {
+ XRAN_FILTERINDEX_STANDARD = 0, /**< UL filter for standard channel */
+ XRAN_FILTERINDEX_PRACH_012 = 1, /**< UL filter for PRACH preamble format 0, 1, 2 */
+ XRAN_FILTERINDEX_PRACH_3 = 2, /**< UL filter for PRACH preamble format 3 */
+ XRAN_FILTERINDEX_PRACH_ABC = 3, /**< UL filter for PRACH preamble format A1~3, B1~4, C0, C2 */
+ XRAN_FILTERINDEX_NPRACH = 4, /**< UL filter for NPRACH */
+ XRAN_FILTERINDEX_MAX
+ };
+
+/** Maximum Slot Index, defined in 5.4.4.6 */
+#define XRAN_SLOTID_MAX 16
+
+/** FFT size in frame structure, defined in 5.4.4.13 Table 5.9 */
+enum xran_cp_fftsize {
+ XRAN_FFTSIZE_128 = 7, /* 128 */
+ XRAN_FFTSIZE_256 = 8, /* 256 */
+ XRAN_FFTSIZE_512 = 9, /* 512 */
+ XRAN_FFTSIZE_1024 = 10, /* 1024 */
+ XRAN_FFTSIZE_2048 = 11, /* 2048 */
+ XRAN_FFTSIZE_4096 = 12, /* 4096 */
+ XRAN_FFTSIZE_1536 = 13, /* 1536 */
+ XRAN_FFTSIZE_MAX
+ };
+
+/** Sub-carrier spacing, defined in 5.4.4.13 Table 5.10 */
+enum xran_cp_subcarrierspacing { /*3GPP u, SCS, Nslot, Slot len */
+ XRAN_SCS_15KHZ = 0, /* 0, 15kHz, 1, 1ms */
+ XRAN_SCS_30KHZ = 1, /* 1, 30kHz, 2, 500us */
+ XRAN_SCS_60KHZ = 2, /* 2, 60kHz, 4, 250us */
+ XRAN_SCS_120KHZ = 3, /* 3, 120kHz, 8, 125us */
+ XRAN_SCS_240KHZ = 4, /* 4, 240kHz, 16, 62.5us */
+ XRAN_SCS_1P25KHZ = 12, /* NA, 1.25kHz, 1, 1ms */
+ XRAN_SCS_3P75KHZ = 13, /* NA, 3.75kHz, 1, 1ms */
+ XRAN_SCS_5KHZ = 14, /* NA, 5kHz, 1, 1ms */
+ XRAN_SCS_7P5KHZ = 15, /* NA, 7.5kHz, 1, 1ms */
+ XRAN_SCS_MAX
+ };
+
+/** Resource block indicator, defined in 5.4.5.2 */
+enum xran_cp_rbindicator {
+ XRAN_RBIND_EVERY = 0, /**< every RB used */
+ XRAN_RBIND_EVERYOTHER = 1, /**< every other RB used */
+ XRAN_RBIND_MAX
+ };
+
+/** Symbol number increment command, defined in 5.4.5.3 */
+enum xran_cp_symbolnuminc {
+ XRAN_SYMBOLNUMBER_NOTINC = 0, /**< do not increment the current symbol number */
+ XRAN_SYMBOLNUMBER_INC = 1, /**< increment the current symbol number and use that */
+ XRAN_SYMBOLNUMBER_INC_MAX
+ };
+
+/** Macro to convert the number of PRBs as defined in 5.4.5.6 */
+#define XRAN_CONVERT_NUMPRBC(x) ((x) > 255 ? 0 : (x))
+
+#define XRAN_CONVERT_IQWIDTH(x) ((x) > 15 ? 0 : (x))
+
+/** Minimum number of symbols, defined in 5.4.5.7 */
+#define XRAN_SYMBOLNUMBER_MIN 1
+/** Maximum number of symbols, defined in 5.4.5.7 */
+#define XRAN_SYMBOLNUMBER_MAX 14
+
+/* LAA message type 5.4.5.14 Table 5.11, not supported */
+#define XRAN_LAAMSGTYPE_LBT_PDSCH_REQ 0
+#define XRAN_LAAMSGTYPE_LBT_DRS_REQ 1
+#define XRAN_LAAMSGTYPE_LBT_PDSCH_RSP 2
+#define XRAN_LAAMSGTYPE_LBT_DRS_RSP 3
+#define XRAN_LAAMSGTYPE_LBT_BUFFER_ERROR 4
+#define XRAN_LAAMSGTYPE_LBT_CWCONFIG_REQ 5
+#define XRAN_LAAMSGTYPE_LBT_CWCONFIG_RSP 6
+
+#define XRAN_LBTMODE_FULL 0
+#define XRAN_LBTMODE_PARTIAL25 1
+#define XRAN_LBTMODE_PARTIAL34 2
+#define XRAN_LBTMODE_FULLSTOP 3
+
+#define XRAN_EF_F_LAST 0
+#define XRAN_EF_F_ANOTHER_ONE 1
+
+
+
+/** Control Plane section extension commands, defined in 5.4.6 Table 5.13 */
+enum xran_cp_sectionextcmd {
+ XRAN_CP_SECTIONEXTCMD_0 = 0, /**< Reserved, for future use */
+ XRAN_CP_SECTIONEXTCMD_1 = 1, /**< Beamforming weights */
+ XRAN_CP_SECTIONEXTCMD_2 = 2, /**< Beamforming attributes */
+ XRAN_CP_SECTIONEXTCMD_3 = 3, /**< DL Precoding configuration parameters and indications, not supported */
+ XRAN_CP_SECTIONEXTCMD_4 = 4, /**< Modulation compression parameter */
+ XRAN_CP_SECTIONEXTCMD_5 = 5, /**< Modulation compression additional scaling parameters */
+ XRAN_CP_SECTIONEXTCMD_MAX /* 6~127 reserved for future use */
+ };
+
+/** Macro to convert bfwIqWidth defined in 5.4.7.1.1, Table 5-15 */
+#define XRAN_CONVERT_BFWIQWIDTH(x) ((x) > 15 ? 0 : (x))
+
+/** Beamforming Weights Compression Method 5.4.7.1.1, Table 5-16 */
+enum xran_cp_bfw_compression_method {
+ XRAN_BFWCOMPMETHOD_NONE = 0, /**< Uncopressed I/Q value */
+ XRAN_BFWCOMPMETHOD_BLKFLOAT = 1, /**< I/Q mantissa value */
+ XRAN_BFWCOMPMETHOD_BLKSCALE = 2, /**< I/Q scaled value */
+ XRAN_BFWCOMPMETHOD_ULAW = 3, /**< compressed I/Q value */
+ XRAN_BFWCOMPMETHOD_BEAMSPACE = 4, /**< beamspace I/Q coefficient */
+ XRAN_BFWCOMPMETHOD_MAX /* reserved for future methods */
+ };
+
+/** Beamforming Attributes Bitwidth 5.4.7.2.1 */
+enum xran_cp_bfa_bitwidth {
+ XRAN_BFABITWIDTH_NO = 0, /**< the filed is no applicable or the default value shall be used */
+ XRAN_BFABITWIDTH_2BIT = 1, /**< the filed is 2-bit bitwidth */
+ XRAN_BFABITWIDTH_3BIT = 2, /**< the filed is 3-bit bitwidth */
+ XRAN_BFABITWIDTH_4BIT = 3, /**< the filed is 4-bit bitwidth */
+ XRAN_BFABITWIDTH_5BIT = 4, /**< the filed is 5-bit bitwidth */
+ XRAN_BFABITWIDTH_6BIT = 5, /**< the filed is 6-bit bitwidth */
+ XRAN_BFABITWIDTH_7BIT = 6, /**< the filed is 7-bit bitwidth */
+ XRAN_BFABITWIDTH_8BIT = 7, /**< the filed is 8-bit bitwidth */
+ };
+
+/**
+ * This structure contains the information to generate the section body of C-Plane message */
+struct xran_section_info {
+ uint8_t type; /* type of this section */
+ /* section type bit- */
+ /* 0 1 3 5 6 7 length */
+ uint8_t startSymId; /* X X X X X X 4bits */
+ uint8_t numSymbol; /* X X X X 4bits */
+ uint8_t symInc; /* X X X X X 1bit */
+ uint16_t id; /* X X X X X 12bits */
+ uint16_t reMask; /* X X X X 12bits */
+ uint16_t startPrbc; /* X X X X X 10bits */
+ uint16_t numPrbc; /* X X X X X 8bits */ /* will be converted to zero if >255 */
+ uint8_t rb; /* X X X X X 1bit */
+ uint8_t compMeth; /* X X X 4bits */
+ uint8_t iqWidth; /* X X X 4bits */
+ uint8_t ef; /* X X X X 1bit */
+ int32_t freqOffset; /* X 24bits */
+ uint16_t beamId; /* X X 15bits */
+ uint16_t ueId; /* X X 15bits */
+ uint16_t regFactor; /* X 16bits */
+ uint16_t pad0;
+ /** for U-plane */
+ struct xran_section_desc sec_desc[XRAN_NUM_OF_SYMBOL_PER_SLOT];
+};
+
+
+struct xran_sectionext1_info {
+ uint16_t rbNumber; /**< number RBs to ext1 chain */
+ uint16_t bfwNumber; /**< number of bf weights in this section */
+ uint8_t bfwiqWidth;
+ uint8_t bfwCompMeth;
+ int16_t *p_bfwIQ; /**< pointer to formed section extention */
+ int16_t bfwIQ_sz; /**< size of buffer with section extention information */
+ union {
+ uint8_t exponent;
+ uint8_t blockScaler;
+ uint8_t compBitWidthShift;
+ uint8_t activeBeamspaceCoeffMask[XRAN_MAX_BFW_N]; /* ceil(N/8)*8, should be multiple of 8 */
+ } bfwCompParam;
+ };
+
+struct xran_sectionext2_info {
+ uint8_t bfAzPtWidth; /* beamforming zenith beamwidth parameter */
+ uint8_t bfAzPt;
+ uint8_t bfZePtWidth; /* beamforming azimuth beamwidth parameter */
+ uint8_t bfZePt;
+ uint8_t bfAz3ddWidth; /* beamforming zenith pointing parameter */
+ uint8_t bfAz3dd;
+ uint8_t bfZe3ddWidth; /* beamforming azimuth pointing parameter */
+ uint8_t bfZe3dd;
+
+ uint8_t bfAzSI;
+ uint8_t bfZeSI;
+ };
+
+struct xran_sectionext3_info { /* NOT SUPPORTED */
+ uint8_t codebookIdx;
+ uint8_t layerId;
+ uint8_t numLayers;
+ uint8_t txScheme;
+ uint16_t crsReMask;
+ uint8_t crsShift;
+ uint8_t crsSymNum;
+ uint16_t beamIdAP1;
+ uint16_t beamIdAP2;
+ uint16_t beamIdAP3;
+ };
+
+struct xran_sectionext4_info {
+ uint8_t csf;
+ uint8_t pad0;
+ uint16_t modCompScaler;
+ };
+
+struct xran_sectionext5_info {
+ uint8_t num_sets;
+ struct {
+ uint16_t csf;
+ uint16_t mcScaleReMask;
+ uint16_t mcScaleOffset;
+ } mc[XRAN_MAX_MODCOMP_ADDPARMS];
+ };
+
+struct xran_sectionext_info {
+ uint16_t type;
+ uint16_t len;
+ void *data;
+ };
+
+
+/**
+ * This structure contains the information to generate the section header of C-Plane message */
+struct xran_cp_header_params {
+ // common parameters
+ uint8_t filterIdx;
+ uint8_t frameId;
+ uint8_t subframeId;
+ uint8_t slotId;
+ uint8_t startSymId;
+ /* section type bit- */
+ /* 0 1 3 5 6 7 length */
+ uint8_t fftSize; /* X X 4bits */
+ uint8_t scs; /* X X 4bits */
+ uint8_t iqWidth; /* X X X 4bits */
+ uint8_t compMeth; /* X X X 4bits */
+ uint8_t numUEs; /* X 8bits */
+ uint16_t timeOffset; /* X X 16bits */
+ uint16_t cpLength; /* X X 16bits */
+ };
+
+/**
+ * This structure to hold the information to generate the sections of C-Plane message */
+struct xran_section_gen_info {
+ struct xran_section_info info; /**< The information for section */
+
+ uint32_t exDataSize; /**< The number of Extensions or type 6/7 data */
+ /** the array to store section extension */
+ struct {
+ uint16_t type; /**< the type of section extension */
+ uint16_t len; /**< length of extension data */
+ void *data; /**< pointer to extension data */
+ } exData[XRAN_MAX_NUM_EXTENSIONS];
+ struct xran_sectionext1_info m_ext1[XRAN_MAX_NUM_EXTENSIONS];
+ struct xran_sectionext2_info m_ext2[XRAN_MAX_NUM_EXTENSIONS];
+ struct xran_sectionext3_info m_ext3[XRAN_MAX_NUM_EXTENSIONS];
+ struct xran_sectionext4_info m_ext4[XRAN_MAX_NUM_EXTENSIONS];
+ struct xran_sectionext5_info m_ext5[XRAN_MAX_NUM_EXTENSIONS];
+};
+
+
+/**
+ * This structure to hold the information to generate a C-Plane message */
+struct xran_cp_gen_params {
+ uint8_t dir; /**< UL or DL */
+ uint8_t sectionType; /**< each section must have same type with this */
+ uint16_t numSections; /**< the number of sections to generate */
+
+ struct xran_cp_header_params hdr;
+ /**< The information for C-Plane message header */
+ struct xran_section_gen_info *sections;
+ /**< Array of the section information */
+ };
+
+/**
+ * This structure to hold the information of RB allocation from PHY
+ * to send data for allocated RBs only. */
+struct xran_cp_rbmap_list {
+ uint16_t grp_id; /**< group id for this entry, reserved for future use */
+
+ uint8_t sym_start; /**< Start symbol ID */
+ uint8_t sym_num; /**< Number of symbols */
+
+ uint16_t rb_start; /**< Start RB position */
+ uint16_t rb_num; /**< Number of RBs */
+
+ int16_t iq_buff_offset; /**< Offset within Sym for start of IQs */
+ int16_t iq_buff_len; /**< length IQs */
+
+ uint16_t beam_id; /**< Bean Index */
+ uint8_t iqWidth; /**< I and Q width in bits */
+ uint8_t comp_meth; /**< Compression method */
+ uint8_t pad0;
+ };
+
+
+uint16_t xran_get_cplength(int cpLength);
+int32_t xran_get_freqoffset(int freqOffset, int scs);
+
+int xran_prepare_ctrl_pkt(struct rte_mbuf *mbuf,
+ struct xran_cp_gen_params *params,
+ uint8_t CC_ID, uint8_t Ant_ID,
+ uint8_t seq_id);
+
+int xran_parse_cp_pkt(struct rte_mbuf *mbuf,
+ struct xran_cp_gen_params *result,
+ struct xran_recv_packet_info *pkt_info);
+
+int xran_cp_init_sectiondb(void *pHandle);
+int xran_cp_free_sectiondb(void *pHandle);
+int xran_cp_add_section_info(void *pHandle,
+ uint8_t dir, uint8_t cc_id, uint8_t ruport_id,
+ uint8_t ctx_id, struct xran_section_info *info);
+int xran_cp_add_multisection_info(void *pHandle,
+ uint8_t cc_id, uint8_t ruport_id, uint8_t ctx_id,
+ struct xran_cp_gen_params *gen_info);
+struct xran_section_info *xran_cp_find_section_info(void *pHandle,
+ uint8_t dir, uint8_t cc_id, uint8_t ruport_id,
+ uint8_t ctx_id, uint16_t section_id);
+struct xran_section_info *xran_cp_iterate_section_info(void *pHandle,
+ uint8_t dir, uint8_t cc_id, uint8_t ruport_id,
+ uint8_t ctx_id, uint32_t *next);
+int xran_cp_getsize_section_info(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ruport_id, uint8_t ctx_id);
+int xran_cp_reset_section_info(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ruport_id, uint8_t ctx_id);
+int32_t xran_cp_populate_section_ext_1(int8_t *p_ext1_dst, /**< destination buffer */
+ uint16_t ext1_dst_len, /**< dest buffer size */
+ int16_t *p_bfw_iq_src, /**< source buffer of IQs */
+ uint16_t rbNumber, /**< number RBs to ext1 chain */
+ uint16_t bfwNumber, /**< number of bf weights in this set of sections */
+ uint8_t bfwiqWidth, /**< bit size of IQs */
+ uint8_t bfwCompMeth); /**< compression method */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _XRAN_CP_API_H_ */
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/**\r
- * @brief This file provides public interface to xRAN Front Haul layer implementation as defined in the\r
- * ORAN-WG4.CUS.0-v01.00 spec. Implementation specific to\r
- * Lower Layer Split Central Unit (O-DU): a logical node that includes the eNB/gNB functions as\r
- * listed in section 2.1 split option 7-2x, excepting those functions allocated exclusively to the O-RU.\r
- * The O-DU controls the operation of O-RUs for 5G NR Radio Access technology\r
- *\r
- * @file xran_fh_o_du.h\r
- * @ingroup group_lte_source_xran\r
- * @author Intel Corporation\r
- *\r
- **/\r
-\r
-#ifndef _XRAN_FH_O_DU_H_\r
-#define _XRAN_FH_O_DU_H_\r
-\r
-#ifdef __cplusplus\r
-extern "C" {\r
-#endif\r
-\r
-#include <stdio.h>\r
-#include <stdlib.h>\r
-#include <string.h>\r
-#include <stdint.h>\r
-#include <inttypes.h>\r
-#include <sys/types.h>\r
-#include <sys/queue.h>\r
-#include <netinet/in.h>\r
-#include <setjmp.h>\r
-#include <stdarg.h>\r
-#include <ctype.h>\r
-#include <errno.h>\r
-#include <getopt.h>\r
-#include <unistd.h>\r
-\r
-#define XRAN_STATUS_SUCCESS (0)\r
-/**<\r
- * @ingroup xran\r
- * Success status value. */\r
-#define XRAN_STATUS_FAIL (-1)\r
-/**<\r
- * @ingroup xran\r
- * Fail status value. */\r
-\r
-#define XRAN_STATUS_RETRY (-2)\r
-/**<\r
- * @ingroup xran\r
- * Retry status value. */\r
-\r
-#define XRAN_STATUS_RESOURCE (-3)\r
-/**<\r
- * @ingroup xran\r
- * The resource that has been requested is unavailable. Refer\r
- * to relevant sections of the API for specifics on what the suggested\r
- * course of action is. */\r
-\r
-#define XRAN_STATUS_INVALID_PARAM (-4)\r
-/**<\r
- * @ingroup xran\r
- * Invalid parameter has been passed in. */\r
-#define XRAN_STATUS_FATAL (-5)\r
-/**<\r
- * @ingroup xran\r
- * A serious error has occurred. Recommended course of action\r
- * is to shutdown and restart the component. */\r
-\r
-#define XRAN_STATUS_UNSUPPORTED (-6)\r
-/**<\r
- * @ingroup xran\r
- * The function is not supported, at least not with the specific\r
- * parameters supplied. This may be because a particular\r
- * capability is not supported by the current implementation. */\r
-\r
-#define XRAN_STATUS_INVALID_PACKET (-7)\r
-/**<\r
- * @ingroup xran\r
- * Recevied packet does not have correct format. */\r
-\r
-/** Macro to calculate TTI number from symbol index used by timing thread */\r
-#define XranGetTtiNum(symIdx, numSymPerTti) (((uint32_t)symIdx / (uint32_t)numSymPerTti))\r
-/** Macro to calculate Symbol number for given slot from symbol index */\r
-#define XranGetSymNum(symIdx, numSymPerTti) (((uint32_t)symIdx % (uint32_t)numSymPerTti))\r
-/** Macro to calculate Frame number for given tti */\r
-#define XranGetFrameNum(tti,SFNatSecStart,numSubFramePerSystemFrame, numSlotPerSubFrame) ((((uint32_t)tti / ((uint32_t)numSubFramePerSystemFrame * (uint32_t)numSlotPerSubFrame)) + SFNatSecStart) & 0x3FF)\r
-/** Macro to calculate Subframe number for given tti */\r
-#define XranGetSubFrameNum(tti, numSlotPerSubFrame, numSubFramePerSystemFrame) (((uint32_t)tti/(uint32_t)numSlotPerSubFrame) % (uint32_t)numSubFramePerSystemFrame)\r
-/** Macro to calculate Slot number */\r
-#define XranGetSlotNum(tti, numSlotPerSfn) ((uint32_t)tti % ((uint32_t)numSlotPerSfn))\r
-\r
-#define XRAN_PORTS_NUM (1) /**< number of XRAN ports (aka O-RU devices) supported */\r
-#define XRAN_N_FE_BUF_LEN (40) /**< Number of TTIs (slots) */\r
-#define XRAN_MAX_SECTOR_NR (12) /**< Max sectors per XRAN port */\r
-#define XRAN_MAX_ANTENNA_NR (16) /**< Max number of extended Antenna-Carriers:\r
- a data flow for a single antenna (or spatial stream) for a single carrier in a single sector */\r
-\r
-/* see 10.2 Hierarchy of Radiation Structure in O-RU (assume TX and RX pannel are the same dimensions)*/\r
-#define XRAN_MAX_PANEL_NR (1) /**< Max number of Panels supported per O-RU */\r
-#define XRAN_MAX_TRX_ANTENNA_ARRAY (1) /**< Max number of TX and RX arrays per panel in O-RU */\r
-#define XRAN_MAX_ANT_ARRAY_ELM_NR (64) /**< Maximum number of Antenna Array Elemets in Antenna Array in the O-RU */\r
-\r
-\r
-\r
-#define XRAN_NUM_OF_SYMBOL_PER_SLOT (14) /**< Number of symbols per slot */\r
-#define XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT XRAN_NUM_OF_SYMBOL_PER_SLOT /**< Max Number of SRS symbols per slot */\r
-#define XRAN_MAX_TDD_PERIODICITY (80) /**< Max TDD pattern period */\r
-#define XRAN_MAX_CELLS_PER_PORT (XRAN_MAX_SECTOR_NR) /**< Max cells mapped to XRAN port */\r
-#define XRAN_COMPONENT_CARRIERS_MAX (XRAN_MAX_SECTOR_NR) /**< number of CCs */\r
-#define XRAN_NUM_OF_ANT_RADIO (XRAN_MAX_SECTOR_NR*XRAN_MAX_ANTENNA_NR) /**< Max Number of Antennas supported for all CC on single XRAN port */\r
-#define XRAN_MAX_PRBS (275) /**< Max of PRBs per CC per antanna for 5G NR */\r
-\r
-#define XRAN_MAX_SECTIONS_PER_SYM (16) /**< Max number of different sections in single symbol (section is equal to RB allocation for UE) */\r
-\r
-#define XRAN_MAX_PKT_BURST (448+4) /**< 4x14x8 symbols per ms */\r
-#define XRAN_N_MAX_BUFFER_SEGMENT XRAN_MAX_PKT_BURST /**< Max number of segments per ms */\r
-\r
-#define XRAN_STRICT_PARM_CHECK (1) /**< enable parameter check for C-plane */\r
-\r
-/* Slot type definition */\r
-#define XRAN_SLOT_TYPE_INVALID (0) /**< invalid slot type */\r
-#define XRAN_SLOT_TYPE_DL (1) /**< DL slot */\r
-#define XRAN_SLOT_TYPE_UL (2) /**< UL slot */\r
-#define XRAN_SLOT_TYPE_SP (3) /**< Special slot */\r
-#define XRAN_SLOT_TYPE_FDD (4) /**< FDD slot */\r
-#define XRAN_SLOT_TYPE_LAST (5) /**< MAX slot */\r
-\r
-/* symbol type definition */\r
-#define XRAN_SYMBOL_TYPE_DL (0) /**< DL symbol */\r
-#define XRAN_SYMBOL_TYPE_UL (1) /**< UL symbol */\r
-#define XRAN_SYMBOL_TYPE_GUARD (2) /**< GUARD symbol */\r
-#define XRAN_SYMBOL_TYPE_FDD (3) /**< FDD symbol */\r
-\r
-#define XRAN_NUM_OF_SLOT_IN_TDD_LOOP (80)/**< MAX number of slot for TDD repetition */\r
-\r
-//#define _XRAN_DEBUG /**< Enable debug log */\r
-//#define _XRAN_VERBOSE /**< Enable verbose log */\r
-\r
-#ifdef _XRAN_DEBUG\r
- #define xran_log_dbg(fmt, ...) \\r
- fprintf(stderr, \\r
- "DEBUG: %s(%d): " fmt "\n", \\r
- __FILE__, \\r
- __LINE__, ##__VA_ARGS__)\r
-#else\r
- #define xran_log_dbg(fmt, ...)\r
-#endif\r
-\r
-#if defined(_XRAN_DEBUG) || defined(_XRAN_VERBOSE)\r
- #define xran_log_wrn(fmt, ...) \\r
- fprintf( \\r
- stderr, \\r
- "WARNING: %s(%d): " fmt "\n", \\r
- __FILE__, \\r
- __LINE__, ##__VA_ARGS__)\r
-#else\r
- #define xran_log_dbg(fmt, ...)\r
- #define xran_log_wrn(fmt, ...)\r
-#endif\r
-\r
-#define xran_log_err(fmt, ...) \\r
- fprintf(stderr, \\r
- "ERROR: %s(%d): " fmt "\n", \\r
- __FILE__, \\r
- __LINE__, ##__VA_ARGS__)\r
-\r
-enum XranFrameDuplexType\r
-{\r
- XRAN_FDD = 0, XRAN_TDD\r
-};\r
-\r
-enum xran_if_state\r
-{\r
- XRAN_INIT = 0,\r
- XRAN_RUNNING,\r
- XRAN_STOPPED\r
-};\r
-\r
-/**\r
- ******************************************************************************\r
- * @ingroup xran\r
- *\r
- * @description\r
- * Compression Method 6.3.3.13, Table 6-43\r
- *****************************************************************************/\r
-enum xran_compression_method {\r
- XRAN_COMPMETHOD_NONE = 0,\r
- XRAN_COMPMETHOD_BLKFLOAT = 1,\r
- XRAN_COMPMETHOD_BLKSCALE = 2,\r
- XRAN_COMPMETHOD_ULAW = 3,\r
- XRAN_COMPMETHOD_MODULATION = 4,\r
- XRAN_COMPMETHOD_MAX\r
-};\r
-\r
-/**\r
- ******************************************************************************\r
- * @ingroup xran\r
- *\r
- * @description\r
- * Callback function type for symbol packet enum\r
- *****************************************************************************/\r
-enum callback_to_phy_id\r
-{\r
- XRAN_CB_TTI = 0, /**< callback on TTI boundary */\r
- XRAN_CB_HALF_SLOT_RX =1, /**< callback on half slot (sym 7) packet arrival*/\r
- XRAN_CB_FULL_SLOT_RX =2, /**< callback on full slot (sym 14) packet arrival */\r
- XRAN_CB_MAX /**< max number of callbacks */\r
-};\r
-\r
-/** Beamforming type, enumerated as "frequency", "time" or "hybrid"\r
- section 10.4.2 Weight-based dynamic beamforming */\r
-enum xran_weight_based_beamforming_type {\r
- XRAN_BF_T_FREQUENCY = 0,\r
- XRAN_BF_T_TIME = 1,\r
- XRAN_BF_T_HYBRID = 2,\r
- XRAN_BF_T_MAX\r
-};\r
-\r
-typedef int32_t xran_status_t; /**< Xran status return value */\r
-\r
-/** callback function type for Symbol packet */\r
-typedef void (*xran_callback_sym_fn)(void*);\r
-\r
-/** Callback function type for TTI event */\r
-typedef int (*xran_fh_tti_callback_fn)(void*);\r
-\r
-/** Callback function type packet arrival from transport layer (ETH or IP) */\r
-typedef void (*xran_transport_callback_fn)(void*, xran_status_t);\r
-\r
-/** Callback functions to poll BBdev encoder */\r
-typedef int16_t (*phy_encoder_poll_fn)(void);\r
-\r
-/** Callback functions to poll BBdev secoder */\r
-typedef int16_t (*phy_decoder_poll_fn)(void);\r
-\r
-/** XRAN port enum */\r
-enum xran_vf_ports\r
-{\r
- XRAN_UP_VF = 0, /**< port type for U-plane */\r
- XRAN_CP_VF, /**< port type for C-plane */\r
- XRAN_VF_MAX\r
-};\r
-\r
-/** XRAN category enum */\r
-enum xran_category\r
-{\r
- XRAN_CATEGORY_A = 0,\r
- XRAN_CATEGORY_B = 1,\r
- XRAN_CATEGORY_MAX\r
-};\r
-\r
-/** type of beamforming */\r
-enum xran_beamforming_type\r
-{\r
- XRAN_BEAM_ID_BASED = 0, /**< beam index based */\r
- XRAN_BEAM_WEIGHT, /**< beam forming weights */\r
- XRAN_BEAM_ATTRIBUTE, /**< beam index based */\r
-};\r
-\r
-/** state of bbdev with xran */\r
-enum xran_bbdev_init\r
-{\r
- XRAN_BBDEV_NOT_USED = -1, /**< BBDEV is disabled */\r
- XRAN_BBDEV_MODE_HW_OFF = 0, /**< BBDEV is enabled for SW sim mode */\r
- XRAN_BBDEV_MODE_HW_ON = 1, /**< BBDEV is enable for HW */\r
- XRAN_BBDEV_MODE_MAX\r
-};\r
-\r
-/** callback return information */\r
-struct xran_cb_tag {\r
- uint16_t cellId;\r
- uint32_t symbol;\r
- uint32_t slotiId;\r
-};\r
-\r
-/** DPDK IO configuration for XRAN layer */\r
-struct xran_io_cfg {\r
- uint8_t id; /**< should be (0) for O-DU or (1) O-RU (debug) */\r
- char *dpdk_dev[XRAN_VF_MAX]; /**< VFs devices */\r
- char *bbdev_dev[1]; /**< BBDev dev name */\r
- int32_t bbdev_mode; /**< DPDK for BBDev */\r
- int32_t core; /**< reservd */\r
- int32_t system_core; /**< reservd */\r
- int32_t pkt_proc_core; /**< reservd */\r
- int32_t pkt_aux_core; /**< reservd */\r
- int32_t timing_core; /**< core used by xRAN */\r
- int32_t port[XRAN_VF_MAX]; /**< VFs ports */\r
-};\r
-\r
-/** XRAN spec section 3.1.3.1.6 ecpriRtcid / ecpriPcid define */\r
-struct xran_eaxcid_config {\r
- uint16_t mask_cuPortId; /**< Mask CU PortId */\r
- uint16_t mask_bandSectorId; /**< Mask Band */\r
- uint16_t mask_ccId; /**< Mask CC */\r
- uint16_t mask_ruPortId; /**< Mask RU Port ID */\r
-\r
- uint8_t bit_cuPortId; /**< bandsectorId + ccId + ruportId */\r
- uint8_t bit_bandSectorId; /**< ccId + ruPortId */\r
- uint8_t bit_ccId; /**< ruportId */\r
- uint8_t bit_ruPortId; /**< 0 */\r
-};\r
-\r
-/**\r
-* XRAN Front haul interface initialization settings\r
-*/\r
-struct xran_fh_init {\r
- struct xran_io_cfg io_cfg;/**< DPDK IO for XRAN */\r
- struct xran_eaxcid_config eAxCId_conf; /**< config of ecpriRtcid/ecpriPcid */\r
-\r
- uint32_t dpdkBasebandFecMode; /**< DPDK Baseband FEC device mode (0-SW, 1-HW) */\r
- char *dpdkBasebandDevice; /**< DPDK Baseband device address */\r
- char *filePrefix; /**< DPDK prefix */\r
-\r
- uint32_t mtu; /**< maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single\r
- xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) */\r
- int8_t *p_o_du_addr; /**< O-DU Ethernet Mac Address */\r
- int8_t *p_o_ru_addr; /**< O-RU Ethernet Mac Address */\r
-\r
- uint16_t totalBfWeights;/**< The total number of beamforming weights on RU for extensions */\r
-\r
- uint16_t Tadv_cp_dl; /**< Table 2 7 : xRAN Delay Management Model Parameters */\r
- uint16_t T2a_min_cp_dl; /**< Table 2 7 : xRAN Delay Management Model Parameters */\r
- uint16_t T2a_max_cp_dl; /**< Table 2 7 : xRAN Delay Management Model Parameters */\r
- uint16_t T2a_min_cp_ul; /**< Table 2 7 : xRAN Delay Management Model Parameters */\r
- uint16_t T2a_max_cp_ul; /**< Table 2 7 : xRAN Delay Management Model Parameters */\r
- uint16_t T2a_min_up; /**< Table 2 7 : xRAN Delay Management Model Parameters */\r
- uint16_t T2a_max_up; /**< Table 2 7 : xRAN Delay Management Model Parameters */\r
- uint16_t Ta3_min; /**< Table 2 7 : xRAN Delay Management Model Parameters */\r
- uint16_t Ta3_max; /**< Table 2 7 : xRAN Delay Management Model Parameters */\r
- uint16_t T1a_min_cp_dl; /**< Table 2 7 : xRAN Delay Management Model Parameters */\r
- uint16_t T1a_max_cp_dl; /**< Table 2 7 : xRAN Delay Management Model Parameters */\r
- uint16_t T1a_min_cp_ul; /**< Table 2 7 : xRAN Delay Management Model Parameters */\r
- uint16_t T1a_max_cp_ul; /**< Table 2 7 : xRAN Delay Management Model Parameters */\r
- uint16_t T1a_min_up; /**< Table 2 7 : xRAN Delay Management Model Parameters */\r
- uint16_t T1a_max_up; /**< Table 2 7 : xRAN Delay Management Model Parameters */\r
- uint16_t Ta4_min; /**< Table 2 7 : xRAN Delay Management Model Parameters */\r
- uint16_t Ta4_max; /**< Table 2 7 : xRAN Delay Management Model Parameters */\r
-\r
- uint8_t enableCP; /**< enable C-plane */\r
- uint8_t prachEnable; /**< enable PRACH */\r
- uint8_t srsEnable; /**< enable SRS (Cat B specific) */\r
- uint8_t cp_vlan_tag; /**< C-plane vlan tag */\r
- uint8_t up_vlan_tag; /**< U-plane vlan tag */\r
- int32_t debugStop; /**< enable auto stop */\r
- int32_t debugStopCount; /**< enable auto stop after number of Tx packets */\r
- int32_t DynamicSectionEna; /**< enable dynamic C-Plane section allocation */\r
- int32_t GPS_Alpha; // refer to alpha as defined in section 9.7.2 of ORAN spec. this value should be alpha*(1/1.2288ns), range 0 - 1e7 (ns)\r
- int32_t GPS_Beta; //beta value as defined in section 9.7.2 of ORAN spec. range -32767 ~ +32767\r
-};\r
-\r
-/** Beamforming waights for single stream for each PRBs given number of Antenna elements */\r
-struct xran_cp_bf_weight{\r
- int16_t nAntElmTRx; /**< num TRX for this allocation */\r
- int8_t* p_ext_section; /**< pointer to form extType */\r
- int16_t ext_section_sz; /**< extType section size */\r
-};\r
-struct xran_cp_bf_attribute{\r
- int16_t weight[4];\r
-};\r
-struct xran_cp_bf_precoding{\r
- int16_t weight[4];\r
-};\r
-\r
-/** section descriptor for given number of PRBs used on U-plane packet creation */\r
-struct xran_section_desc {\r
- uint16_t section_id; /**< section id used for this element */\r
-\r
- int16_t iq_buffer_offset; /**< Offset in bytes for the content of IQs with in main symb buffer */\r
- int16_t iq_buffer_len; /**< Length in bytes for the content of IQs with in main symb buffer */\r
-\r
- uint8_t *pData; /**< optional pointer to data buffer */\r
- void *pCtrl; /**< optional poitner to mbuf */\r
-};\r
-\r
-/** PRB element structure */\r
-struct xran_prb_elm {\r
- int16_t nRBStart; /**< start RB of RB allocation */\r
- int16_t nRBSize; /**< number of RBs used */\r
- int16_t nStartSymb; /**< start symbol ID */\r
- int16_t numSymb; /**< number of symbols */\r
- int16_t nBeamIndex; /**< beam index for given PRB */\r
- int16_t bf_weight_update; /** need to update beam weights or not */\r
- int16_t compMethod; /**< compression index for given PRB */\r
- int16_t iqWidth; /**< compression bit width for given PRB */\r
- int16_t BeamFormingType; /**< index based, weights based or attribute based beam forming*/\r
-\r
- struct xran_section_desc * p_sec_desc[XRAN_NUM_OF_SYMBOL_PER_SLOT]; /**< section desctiptors to U-plane data given RBs */\r
- struct xran_cp_bf_weight bf_weight; /**< beam forming information relevant for given RBs */\r
-\r
- union {\r
- struct xran_cp_bf_attribute bf_attribute;\r
- struct xran_cp_bf_precoding bf_precoding;\r
- };\r
-};\r
-\r
-/** PRB map structure */\r
-struct xran_prb_map {\r
- uint8_t dir; /**< DL or UL direction */\r
- uint8_t xran_port; /**< xran id of given RU [0-(XRAN_PORTS_NUM-1)] */\r
- uint16_t band_id; /**< xran band id */\r
- uint16_t cc_id; /**< componnent carrier id [0 - (XRAN_MAX_SECTOR_NR-1)] */\r
- uint16_t ru_port_id; /**< RU device antenna port id [0 - (XRAN_MAX_ANTENNA_NR-1) */\r
- uint16_t tti_id; /**< xRAN slot id [0 - (max tti-1)] */\r
- uint8_t start_sym_id; /**< start symbol Id [0-13] */\r
- uint32_t nPrbElm; /**< total number of PRB elements for given map [0- (XRAN_MAX_PRBS-1)] */\r
- struct xran_prb_elm prbMap[XRAN_MAX_PRBS];\r
-\r
-\r
-};\r
-\r
-/* PRACH config required for XRAN based FH */\r
-struct xran_prach_config\r
-{\r
- /* PRACH config*/\r
- uint8_t nPrachConfIdx; /**< PRACH Configuration Index*/\r
- uint8_t nPrachSubcSpacing;\r
- /**< PRACH Sub-carrier spacing\r
- Value:0->1\r
- For below 6GHz the values indicate 15kHz or 30kHz\r
- For above 6GHz the values indicate 60kHz or 120kHz*/\r
- uint8_t nPrachZeroCorrConf; /**< PRACH zeroCorrelationZoneConfig */\r
- uint8_t nPrachRestrictSet; /**< PRACH restrictedSetConfig */\r
- uint16_t nPrachRootSeqIdx; /**< PRACH Root Sequence Index */\r
- uint16_t nPrachFreqStart; /**< PRACH prach-frequency-start */\r
- int32_t nPrachFreqOffset; /**< PRACH prach-frequency-offset */\r
- uint8_t nPrachFilterIdx; /**< PRACH Filter index */\r
-};\r
-\r
-/**< SRS configuration required for XRAN based FH */\r
-struct xran_srs_config {\r
- uint16_t symbMask; /**< symbols used for SRS with in U/S slot [bits 0-13] */\r
- uint8_t eAxC_offset; /**< starting value of eAxC for SRS packets */\r
-};\r
-\r
-/** XRAN slot configuration */\r
-struct xran_slot_config {\r
- uint8_t nSymbolType[XRAN_NUM_OF_SYMBOL_PER_SLOT]; /**< Defines the Symbol type for all 14 symbols in a slot. 0: DL, 1: UL, 2: Guard */\r
- uint8_t reserved[2];\r
-};\r
-\r
-/** XRAN front haul frame config */\r
-struct xran_frame_config {\r
- uint8_t nFrameDuplexType; /**< Frame Duplex type: 0 -> FDD, 1 -> TDD */\r
- uint8_t nNumerology; /**< Numerology, determine sub carrier spacing, Value: 0->4\r
- 0: 15khz, 1: 30khz, 2: 60khz\r
- 3: 120khz, 4: 240khz */\r
- uint8_t nTddPeriod; /**< TDD period */\r
- struct xran_slot_config sSlotConfig[XRAN_MAX_TDD_PERIODICITY];\r
- /**< TDD Slot configuration - If nFrameDuplexType = TDD(1), then this config defines the slot config type for each slot.*/\r
- /* The number of slots need to be equal to nTddPeriod */\r
-};\r
-\r
-/** XRAN-PHY interface byte order */\r
-enum xran_input_byte_order {\r
- XRAN_NE_BE_BYTE_ORDER = 0, /**< Network byte order (Big endian), xRAN lib doesn't do swap */\r
- XRAN_CPU_LE_BYTE_ORDER /**< CPU byte order (Little endian), xRAN lib does do swap */\r
-};\r
-\r
-/** XRAN-PHY interface I and Q order */\r
-enum xran_input_i_q_order {\r
- XRAN_I_Q_ORDER = 0, /**< I , Q */\r
- XRAN_Q_I_ORDER /**< Q , I */\r
-};\r
-\r
-/** XRAN front haul IQ compression settings */\r
-struct xran_ru_config {\r
- enum xran_category xranCat; /**< mode: Catergory A or Category B */\r
-\r
- uint8_t iqWidth; /**< IQ bit width */\r
- uint8_t compMeth; /**< Compression method */\r
- uint8_t fftSize; /**< FFT Size */\r
- enum xran_input_byte_order byteOrder; /**< Order of bytes in int16_t in buffer. Big or little endian */\r
- enum xran_input_i_q_order iqOrder; /**< order of IQs in the buffer */\r
- uint16_t xran_max_frame; /**< max frame number supported */\r
-};\r
-\r
-/**\r
- * @ingroup xran\r
- * XRAN front haul general configuration */\r
-struct xran_fh_config {\r
- uint32_t dpdk_port; /**< DPDK port number used for FH */\r
- uint32_t sector_id; /**< Band sector ID for FH */\r
- uint32_t nCC; /**< number of Component carriers supported on FH */\r
- uint32_t neAxc; /**< number of eAxc supported on one CC*/\r
- uint32_t neAxcUl; /**< number of eAxc supported on one CC for UL direction */\r
- uint32_t nAntElmTRx; /**< Number of antenna elements for TX and RX */\r
- uint16_t nDLFftSize; /**< DL FFT size */\r
- uint16_t nULFftSize; /**< UL FFT size */\r
- uint16_t nDLRBs; /**< DL PRB */\r
- uint16_t nULRBs; /**< UL PRB */\r
- uint32_t nDLAbsFrePointA; /**< Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 */\r
- uint32_t nULAbsFrePointA; /**< Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 */\r
- uint32_t nDLCenterFreqARFCN; /**< center frerquency for DL in MHz */\r
- uint32_t nULCenterFreqARFCN; /**< center frerquency for UL in MHz */\r
- xran_fh_tti_callback_fn ttiCb; /**< call back for TTI event */\r
- void *ttiCbParam; /**< parameters of call back function */\r
-\r
- struct xran_prach_config prach_conf; /**< PRACH specific configurations for FH */\r
- struct xran_srs_config srs_conf; /**< SRS specific configurations for FH */\r
- struct xran_frame_config frame_conf; /**< frame config */\r
- struct xran_ru_config ru_conf; /**< config of RU as per XRAN spec */\r
-\r
- phy_encoder_poll_fn bbdev_enc; /**< call back to poll BBDev encoder */\r
- phy_decoder_poll_fn bbdev_dec; /**< call back to poll BBDev decoder */\r
-\r
- uint32_t log_level; /**< configuration of log level */\r
-};\r
-\r
-/**\r
- * @ingroup xran\r
- * XRAN front haul statistic counters according to Table 7 1 : Common Counters for both DL and UL */\r
-struct xran_common_counters{\r
- uint64_t Rx_on_time; /**< Data was received on time (applies to user data reception window) */\r
- uint64_t Rx_early; /**< Data was received too early (applies to user data reception window) */\r
- uint64_t Rx_late; /**< Data was received too late (applies to user data reception window) */\r
- uint64_t Rx_corrupt; /**< Corrupt/Incorrect header packet */\r
- uint64_t Rx_pkt_dupl; /**< Duplicated packet */\r
- uint64_t Total_msgs_rcvd; /**< Total messages received (on all links) */\r
-};\r
-\r
-/**\r
- * @ingroup xran\r
- * CC instance handle pointer type */\r
-typedef void * xran_cc_handle_t;\r
-\r
-/**\r
- *****************************************************************************\r
- * @ingroup xran\r
- *\r
- * @description\r
- * A flat buffer structure. The data pointer, pData, is a virtual address.\r
- * The API requires the memory to by physically contiguous. Each flat\r
- * buffer segment may contain several equally sized elements.\r
- *\r
- *****************************************************************************/\r
-struct xran_flat_buffer\r
-{\r
- uint32_t nElementLenInBytes;\r
- /**< The Element length specified in bytes.\r
- * This parameter specifies the size of a single element in the buffer.\r
- * The total size of the buffer is described as\r
- * bufferSize = nElementLenInBytes * nNumberOfElements */\r
- uint32_t nNumberOfElements;\r
- /**< The number of elements in the physical contiguous memory segment */\r
- uint32_t nOffsetInBytes;\r
- /**< Offset in bytes to the start of the data in the physical contiguous\r
- * memory segment */\r
- uint32_t nIsPhyAddr;\r
- uint8_t *pData;\r
- /**< The data pointer is a virtual address, however the actual data pointed\r
- * to is required to be in contiguous physical memory unless the field\r
- requiresPhysicallyContiguousMemory in CpaInstanceInfo is false. */\r
- void *pCtrl;\r
- /**< pointer to control section coresponding to data buffer */\r
-};\r
-\r
-/**\r
- *****************************************************************************\r
- * @ingroup xran\r
- * Scatter/Gather buffer list containing an array of Simple buffers.\r
- *\r
- * @description\r
- * A Scatter/Gather buffer list structure. It is expected that this buffer\r
- * structure will be used where more than one flat buffer can be provided\r
- * on a particular API.\r
- *\r
- * IMPORTANT - The memory for the pPrivateMetaData member must be allocated\r
- * by the client as contiguous memory. When allocating memory for\r
- * pPrivateMetaData a call to cpaCyBufferListGetMetaSize MUST be made to\r
- * determine the size of the Meta Data Buffer. The returned size\r
- * (in bytes) may then be passed in a memory allocation routine to allocate\r
- * the pPrivateMetaData memory.\r
- *\r
- *****************************************************************************/\r
-struct xran_buffer_list\r
-{\r
- uint32_t nNumBuffers;\r
- /**< Number of pointers */\r
- struct xran_flat_buffer *pBuffers;\r
- /**< Pointer to an unbounded array containing the number of CpaFlatBuffers\r
- * defined by nNumBuffers */\r
- void *pUserData;\r
- /**< This is an opaque field that is not read or modified internally. */\r
- void *pPrivateMetaData;\r
- /**< Private Meta representation of this buffer List - the memory for this\r
- * buffer needs to be allocated by the client as contiguous data.\r
- * The amount of memory required is returned with a call to\r
- * cpaCyBufferListGetMetaSize. If cpaCyBufferListGetMetaSize returns a size\r
- * of zero no memory needs to be allocated, and this parameter can be NULL.\r
- */\r
-};\r
-\r
-/**\r
- * @ingroup xran\r
- * Initialize the XRAN Layer via DPDK.\r
- *\r
- * @param argc\r
- * A non-negative value. If it is greater than 0, the array members\r
- * for argv[0] through argv[argc] (non-inclusive) shall contain pointers\r
- * to strings.\r
- * @param argv\r
- * An array of strings. The contents of the array, as well as the strings\r
- * which are pointed to by the array, may be modified by this function.\r
- *\r
- * @return\r
- * 0 - on success\r
- * Error codes returned via rte_errno\r
- */\r
-int32_t xran_init(int argc, char *argv[], struct xran_fh_init *p_xran_fh_init, char *appName, void ** pHandle);\r
-\r
-/**\r
- * @ingroup xran\r
- *\r
- * Function returns handles for number of sectors supported by XRAN layer. Currently function\r
- * supports one handle XRAN layer where it supports only one CC\r
- *\r
- * @param pHandle\r
- * Pointer to XRAN layer handle\r
- * @param nNumInstances\r
- * total number of instances of CC\r
- * @param pSectorInstanceHandles\r
- * Pointer to xran_cc_handle_t where to store Handle pointer\r
- *\r
- * @return\r
- * 0 - on success\r
- */\r
-int32_t xran_sector_get_instances (void * pHandle, uint16_t nNumInstances,\r
- xran_cc_handle_t * pSectorInstanceHandles);\r
-\r
-/**\r
- * @ingroup xran\r
- *\r
- * Function initialize Memory Management subsystem (mm) in order to handle memory buffers between XRAN layer\r
- * and PHY.\r
- *\r
- * @param pHandle\r
- * Pointer to XRAN layer handle for given CC\r
- * @param nMemorySize\r
- * memory size of all segments\r
- * @param nMemorySegmentSize\r
- * size of memory per segment\r
- *\r
- * @return\r
- * 0 - on success\r
- */\r
-int32_t xran_mm_init (void * pHandle, uint64_t nMemorySize, uint32_t nMemorySegmentSize);\r
-\r
-/**\r
- * @ingroup xran\r
- *\r
- * Function allocates buffer memory (bm) used between XRAN layer and PHY. In general case it's DPDK mbuf.\r
- * it uses Memory Management system to get memory chunk and define memory pool on top of it.\r
- *\r
- * @param pHandle\r
- * Pointer to XRAN layer handle for given CC\r
- * @param nPoolIndex\r
- * pointer to buffer pool identification to be returned\r
- * @param nNumberOfBuffers\r
- * number of buffer to allocate in the pool\r
- * @param nBufferSize\r
- * buffer size to allocate\r
- *\r
- * @return\r
- * 0 - on success\r
- */\r
-int32_t xran_bm_init (void * pHandle, uint32_t * pPoolIndex, uint32_t nNumberOfBuffers, uint32_t nBufferSize);\r
-\r
-/**\r
- * @ingroup xran\r
- *\r
- * Function allocates buffer used between XRAN layer and PHY. In general case it's DPDK mbuf.\r
- *\r
- * @param pHandle\r
- * Pointer to XRAN layer handle for given CC\r
- * @param nPoolIndex\r
- * buffer pool identification\r
- * @param ppData\r
- * Pointer to pointer where to store address of new buffer\r
- * @param ppCtrl\r
- * Pointer to pointer where to store address of internal private control information\r
- *\r
- *\r
- * @return\r
- * 0 - on success\r
- */\r
-int32_t xran_bm_allocate_buffer(void * pHandle, uint32_t nPoolIndex, void **ppData, void **ppCtrl);\r
-\r
-/**\r
- * @ingroup xran\r
- *\r
- * Function frees buffer used between XRAN layer and PHY. In general case it's DPDK mbuf\r
- *\r
- * @param pHandle\r
- * Pointer to XRAN layer handle for given CC\r
- * @param pData\r
- * Pointer to buffer\r
- * @param pData\r
- * Pointer to internal private control information\r
- *\r
- * @return\r
- * 0 - on success\r
- */\r
-int32_t xran_bm_free_buffer(void * pHandle, void *pData, void *pCtrl);\r
-\r
-/**\r
- * @ingroup xran\r
- *\r
- * Function destroys Memory Management (MM) layer of XRAN library\r
- *\r
- * @param pHandle\r
- * Pointer to XRAN layer handle for given CC\r
- *\r
- * @return\r
- * 0 - on success\r
- */\r
-int32_t xran_mm_destroy (void * pHandle);\r
-\r
-/**\r
- * @ingroup xran\r
- *\r
- * Function configures TX(DL) and RX(UL) output buffers and callback (UL only) for XRAN layer with\r
- * given handle\r
- *\r
- * @param pHandle\r
- * Pointer to XRAN layer handle for given CC\r
- * @param pSrcBuffer\r
- * list of memory buffers to use to fetch IQs from PHY to XRAN layer (DL)\r
- * @param pSrcCpBuffer\r
- * list of memory buffers to use to configure C-plane (DL)\r
- * @param pDstBuffer\r
- * list of memory buffers to use to deliver IQs from XRAN layer to PHY (UL)\r
- * @param pDstCpBuffer\r
- * list of memory buffers to use to configure C-plane (UL)\r
- * @param xran_transport_callback_fn pCallback\r
- * Callback function to call with arrival of all packets for given CC for given symbol\r
- * @param pCallbackTag\r
- * Parameters of Callback function\r
- *\r
- * @return\r
- * 0 - on success\r
- * -1 - on error\r
- */\r
- int32_t xran_5g_fronthault_config (void * pHandle,\r
- struct xran_buffer_list *pSrcBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN],\r
- struct xran_buffer_list *pSrcCpBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN],\r
- struct xran_buffer_list *pDstBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN],\r
- struct xran_buffer_list *pDstCpBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN],\r
- xran_transport_callback_fn pCallback,\r
- void *pCallbackTag);\r
-\r
-/**\r
- * @ingroup xran\r
- *\r
- * Function configures PRACH output buffers and callback for XRAN layer with given handle\r
- *\r
- * @param pHandle\r
- * Pointer to XRAN layer handle for given CC\r
- * @param pDstBuffer\r
- * list of memory buffers to use to deliver PRACH IQs from xran layer to PHY\r
- * @param xran_transport_callback_fn pCallback\r
- * Callback function to call with arrival of PRACH packets for given CC\r
- * @param pCallbackTag\r
- * Parameters of Callback function\r
- *\r
- * @return\r
- * 0 - on success\r
- * -1 - on error\r
- */\r
-int32_t xran_5g_prach_req (void * pHandle,\r
- struct xran_buffer_list *pDstBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN],\r
- xran_transport_callback_fn pCallback,\r
- void *pCallbackTag);\r
-\r
-/**\r
- * @ingroup xran\r
- *\r
- * Function configures SRS output buffers and callback for XRAN layer with given handle\r
- *\r
- * @param pHandle\r
- * Pointer to XRAN layer handle for given CC\r
- * @param pDstBuffer\r
- * list of memory buffers to use to deliver SRS IQs from xran layer to PHY\r
- * @param xran_transport_callback_fn pCallback\r
- * Callback function to call with arrival of SRS packets for given CC\r
- * @param pCallbackTag\r
- * Parameters of Callback function\r
- *\r
- * @return\r
- * 0 - on success\r
- * -1 - on error\r
- */\r
-int32_t xran_5g_srs_req (void * pHandle,\r
- struct xran_buffer_list *pDstBuffer[XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_N_FE_BUF_LEN],\r
- xran_transport_callback_fn pCallback,\r
- void *pCallbackTag);\r
-\r
-\r
-/**\r
- * @ingroup xran\r
- *\r
- * Function returns XRAN core utilization stats\r
- *\r
- * @param total_time (out)\r
- * Pointer to variable to store Total time thread has been running\r
- * @param used_time (out)\r
- * Pointer to variable to store Total time essential tasks have been running on the thread\r
- * @param core_used (out)\r
- * Pointer to variable to store Core on which the XRAN thread is running\r
- * @param clear (in)\r
- * If set to 1, then internal variables total_time and used_time are cleared\r
- *\r
- * @return\r
- * 0 - on success\r
- */\r
-uint32_t xran_get_time_stats(uint64_t *total_time, uint64_t *used_time, uint32_t *core_used, uint32_t clear);\r
-\r
-/**\r
- * @ingroup xran\r
- *\r
- * Function opens XRAN layer with given handle\r
- *\r
- * @param pHandle\r
- * Pointer to XRAN layer handle for given CC\r
- * @param pointer to struct xran_fh_config pConf\r
- * Pointer to XRAN configuration structure with specific settings to use\r
- *\r
- * @return\r
- * 0 - on success\r
- */\r
-int32_t xran_open(void *pHandle, struct xran_fh_config* pConf);\r
-\r
-/**\r
- * @ingroup xran\r
- *\r
- * Function starts XRAN layer with given handle\r
- *\r
- * @param pHandle\r
- * Pointer to XRAN layer handle for given CC\r
- *\r
- * @return\r
- * 0 - on success\r
- */\r
-int32_t xran_start(void *pHandle);\r
-\r
-/**\r
- * @ingroup xran\r
- *\r
- * Function stops XRAN layer with given handle\r
- *\r
- * @param pHandle\r
- * Pointer to XRAN layer handle for given CC\r
- *\r
- * @return\r
- * 0 - on success\r
- */\r
-int32_t xran_stop(void *pHandle);\r
-\r
-/**\r
- * @ingroup xran\r
- *\r
- * Function closes XRAN layer with given handle\r
- *\r
- * @param pHandle\r
- * Pointer to XRAN layer handle for given CC\r
- *\r
- * @return\r
- * 0 - on success\r
- */\r
-int32_t xran_close(void *pHandle);\r
-\r
-/**\r
- * @ingroup xran\r
- *\r
- * Function registers callback to XRAN layer. Function support callbacks aligned on packet arrival.\r
- *\r
- * @param pHandle\r
- * Pointer to XRAN layer handle for given CC\r
- * @param symCb\r
- * pointer to callback function\r
- * @param symCb\r
- * pointer to Callback Function parameters\r
- * @param symb\r
- * symbol to be register for\r
- * @param ant\r
- * Antenna number to trigger callback for packet arrival\r
- *\r
- * @return\r
- * 0 - in case of success\r
- * -1 - in case of failure\r
- */\r
-int32_t xran_reg_sym_cb(void *pHandle, xran_callback_sym_fn symCb, void * symCbParam, uint8_t symb, uint8_t ant);\r
-\r
-/**\r
- * @ingroup xran\r
- *\r
- * Function registers callback to XRAN layer. Function support callbacks align to OTA time. TTI even, half of slot,\r
- * full slot with respect to PTP time.\r
- *\r
- * @param pHandle\r
- * Pointer to XRAN layer handle for given CC\r
- * @param Cb\r
- * pointer to callback function\r
- * @param cbParam\r
- * pointer to Callback Function parameters\r
- * @param skipTtiNum\r
- * number of calls to be skipped before first call\r
- * @param callback_to_phy_id\r
- * call back time identification (see enum callback_to_phy_id)\r
- *\r
- * @return\r
- * 0 - in case of success\r
- * -1 - in case of failure\r
- */\r
-int32_t xran_reg_physide_cb(void *pHandle, xran_fh_tti_callback_fn Cb, void *cbParam, int skipTtiNum, enum callback_to_phy_id);\r
-\r
-/**\r
- * @ingroup xran\r
- *\r
- * Function returns current TTI, Frame, Subframe, Slot Number as seen "Over air" base on PTP time\r
- *\r
- * @param nFrameIdx\r
- * Pointer to Frame number [0-99]\r
- *\r
- * @param nSubframeIdx\r
- * Pointer to Subframe number [0-10]\r
- *\r
- * @param nSlotIdx\r
- * Pointer to Slot number [0-7]\r
- *\r
- * @param nSecond\r
- * Pointer to current UTC second\r
- *\r
- * @return\r
- * current TTI number [0-7999]\r
- */\r
-int32_t xran_get_slot_idx (uint32_t *nFrameIdx, uint32_t *nSubframeIdx, uint32_t *nSlotIdx, uint64_t *nSecond);\r
-\r
-/**\r
- * @ingroup xran\r
- *\r
- * Function retrun XRAN layer common counters for given handle\r
- *\r
- * @param pHandle\r
- * Pointer to XRAN layer handle for given CC\r
- *\r
- * @param pStats\r
- * Pointer to pointer of common counter structure\r
- *\r
- * @return\r
- * 0 - on success\r
- */\r
-int32_t xran_get_common_counters(void *pXranLayerHandle, struct xran_common_counters *pStats);\r
-\r
-\r
-/**\r
- * @ingroup xran\r
- *\r
- * Function returns status of operation of FH layer\r
- *\r
- * @return\r
- * XRAN_INIT - init state\r
- * XRAN_RUNNING - running\r
- * XRAN_STOPPED - stopped\r
- */\r
-enum xran_if_state xran_get_if_state(void);\r
-\r
-\r
-/**\r
- * @ingroup xran\r
- *\r
- * Function allocates memory of given size from heap\r
- *\r
- * @param buf_len\r
- * buffer size\r
- *\r
- * @return\r
- * ptr - to memory buffer or NULL\r
- */\r
-void* xran_malloc(size_t buf_len);\r
-\r
-\r
-/**\r
- * @ingroup xran\r
- *\r
- * Function calculates offset for ptr according to ORAN headers requared\r
- *\r
- * @param dst\r
- * pointer to be addjusted\r
- * @compMethod\r
- * compression method according to enum xran_compression_method\r
- *\r
- * @return\r
- * ptr - pointer to payload given header requared\r
- */\r
-uint8_t* xran_add_hdr_offset(uint8_t *dst, int16_t compMethod);\r
-\r
-#ifdef __cplusplus\r
-}\r
-#endif\r
-\r
-#endif /* _XRAN_FH_O_DU_H_*/\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief This file provides public interface to xRAN Front Haul layer implementation as defined in the
+ * ORAN-WG4.CUS.0-v01.00 spec. Implementation specific to
+ * Lower Layer Split Central Unit (O-DU): a logical node that includes the eNB/gNB functions as
+ * listed in section 2.1 split option 7-2x, excepting those functions allocated exclusively to the O-RU.
+ * The O-DU controls the operation of O-RUs for 5G NR Radio Access technology
+ *
+ * @file xran_fh_o_du.h
+ * @ingroup group_lte_source_xran
+ * @author Intel Corporation
+ *
+ **/
+
+#ifndef _XRAN_FH_O_DU_H_
+#define _XRAN_FH_O_DU_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stdint.h>
+#include <inttypes.h>
+#include <sys/types.h>
+#include <sys/queue.h>
+#include <netinet/in.h>
+#include <setjmp.h>
+#include <stdarg.h>
+#include <ctype.h>
+#include <errno.h>
+#include <getopt.h>
+#include <unistd.h>
+
+#define XRAN_STATUS_SUCCESS (0)
+/**<
+ * @ingroup xran
+ * Success status value. */
+#define XRAN_STATUS_FAIL (-1)
+/**<
+ * @ingroup xran
+ * Fail status value. */
+
+#define XRAN_STATUS_RETRY (-2)
+/**<
+ * @ingroup xran
+ * Retry status value. */
+
+#define XRAN_STATUS_RESOURCE (-3)
+/**<
+ * @ingroup xran
+ * The resource that has been requested is unavailable. Refer
+ * to relevant sections of the API for specifics on what the suggested
+ * course of action is. */
+
+#define XRAN_STATUS_INVALID_PARAM (-4)
+/**<
+ * @ingroup xran
+ * Invalid parameter has been passed in. */
+#define XRAN_STATUS_FATAL (-5)
+/**<
+ * @ingroup xran
+ * A serious error has occurred. Recommended course of action
+ * is to shutdown and restart the component. */
+
+#define XRAN_STATUS_UNSUPPORTED (-6)
+/**<
+ * @ingroup xran
+ * The function is not supported, at least not with the specific
+ * parameters supplied. This may be because a particular
+ * capability is not supported by the current implementation. */
+
+#define XRAN_STATUS_INVALID_PACKET (-7)
+/**<
+ * @ingroup xran
+ * Recevied packet does not have correct format. */
+
+/** Macro to calculate TTI number from symbol index used by timing thread */
+#define XranGetTtiNum(symIdx, numSymPerTti) (((uint32_t)symIdx / (uint32_t)numSymPerTti))
+/** Macro to calculate Symbol number for given slot from symbol index */
+#define XranGetSymNum(symIdx, numSymPerTti) (((uint32_t)symIdx % (uint32_t)numSymPerTti))
+/** Macro to calculate Frame number for given tti */
+#define XranGetFrameNum(tti,SFNatSecStart,numSubFramePerSystemFrame, numSlotPerSubFrame) ((((uint32_t)tti / ((uint32_t)numSubFramePerSystemFrame * (uint32_t)numSlotPerSubFrame)) + SFNatSecStart) & 0x3FF)
+/** Macro to calculate Subframe number for given tti */
+#define XranGetSubFrameNum(tti, numSlotPerSubFrame, numSubFramePerSystemFrame) (((uint32_t)tti/(uint32_t)numSlotPerSubFrame) % (uint32_t)numSubFramePerSystemFrame)
+/** Macro to calculate Slot number */
+#define XranGetSlotNum(tti, numSlotPerSfn) ((uint32_t)tti % ((uint32_t)numSlotPerSfn))
+
+#define XRAN_PORTS_NUM (1) /**< number of XRAN ports (aka O-RU devices) supported */
+#define XRAN_N_FE_BUF_LEN (40) /**< Number of TTIs (slots) */
+#define XRAN_MAX_SECTOR_NR (12) /**< Max sectors per XRAN port */
+#define XRAN_MAX_ANTENNA_NR (16) /**< Max number of extended Antenna-Carriers:
+ a data flow for a single antenna (or spatial stream) for a single carrier in a single sector */
+
+/* see 10.2 Hierarchy of Radiation Structure in O-RU (assume TX and RX pannel are the same dimensions)*/
+#define XRAN_MAX_PANEL_NR (1) /**< Max number of Panels supported per O-RU */
+#define XRAN_MAX_TRX_ANTENNA_ARRAY (1) /**< Max number of TX and RX arrays per panel in O-RU */
+#define XRAN_MAX_ANT_ARRAY_ELM_NR (64) /**< Maximum number of Antenna Array Elemets in Antenna Array in the O-RU */
+
+
+
+#define XRAN_NUM_OF_SYMBOL_PER_SLOT (14) /**< Number of symbols per slot */
+#define XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT XRAN_NUM_OF_SYMBOL_PER_SLOT /**< Max Number of SRS symbols per slot */
+#define XRAN_MAX_TDD_PERIODICITY (80) /**< Max TDD pattern period */
+#define XRAN_MAX_CELLS_PER_PORT (XRAN_MAX_SECTOR_NR) /**< Max cells mapped to XRAN port */
+#define XRAN_COMPONENT_CARRIERS_MAX (XRAN_MAX_SECTOR_NR) /**< number of CCs */
+#define XRAN_NUM_OF_ANT_RADIO (XRAN_MAX_SECTOR_NR*XRAN_MAX_ANTENNA_NR) /**< Max Number of Antennas supported for all CC on single XRAN port */
+#define XRAN_MAX_PRBS (275) /**< Max of PRBs per CC per antanna for 5G NR */
+
+#define XRAN_MAX_SECTIONS_PER_SYM (16) /**< Max number of different sections in single symbol (section is equal to RB allocation for UE) */
+
+#define XRAN_MAX_PKT_BURST (448+4) /**< 4x14x8 symbols per ms */
+#define XRAN_N_MAX_BUFFER_SEGMENT XRAN_MAX_PKT_BURST /**< Max number of segments per ms */
+
+#define XRAN_STRICT_PARM_CHECK (1) /**< enable parameter check for C-plane */
+
+/* Slot type definition */
+#define XRAN_SLOT_TYPE_INVALID (0) /**< invalid slot type */
+#define XRAN_SLOT_TYPE_DL (1) /**< DL slot */
+#define XRAN_SLOT_TYPE_UL (2) /**< UL slot */
+#define XRAN_SLOT_TYPE_SP (3) /**< Special slot */
+#define XRAN_SLOT_TYPE_FDD (4) /**< FDD slot */
+#define XRAN_SLOT_TYPE_LAST (5) /**< MAX slot */
+
+/* symbol type definition */
+#define XRAN_SYMBOL_TYPE_DL (0) /**< DL symbol */
+#define XRAN_SYMBOL_TYPE_UL (1) /**< UL symbol */
+#define XRAN_SYMBOL_TYPE_GUARD (2) /**< GUARD symbol */
+#define XRAN_SYMBOL_TYPE_FDD (3) /**< FDD symbol */
+
+#define XRAN_NUM_OF_SLOT_IN_TDD_LOOP (80)/**< MAX number of slot for TDD repetition */
+
+//#define _XRAN_DEBUG /**< Enable debug log */
+//#define _XRAN_VERBOSE /**< Enable verbose log */
+
+#ifdef _XRAN_DEBUG
+ #define xran_log_dbg(fmt, ...) \
+ fprintf(stderr, \
+ "DEBUG: %s(%d): " fmt "\n", \
+ __FILE__, \
+ __LINE__, ##__VA_ARGS__)
+#else
+ #define xran_log_dbg(fmt, ...)
+#endif
+
+#if defined(_XRAN_DEBUG) || defined(_XRAN_VERBOSE)
+ #define xran_log_wrn(fmt, ...) \
+ fprintf( \
+ stderr, \
+ "WARNING: %s(%d): " fmt "\n", \
+ __FILE__, \
+ __LINE__, ##__VA_ARGS__)
+#else
+ #define xran_log_dbg(fmt, ...)
+ #define xran_log_wrn(fmt, ...)
+#endif
+
+#define xran_log_err(fmt, ...) \
+ fprintf(stderr, \
+ "ERROR: %s(%d): " fmt "\n", \
+ __FILE__, \
+ __LINE__, ##__VA_ARGS__)
+
+enum XranFrameDuplexType
+{
+ XRAN_FDD = 0, XRAN_TDD
+};
+
+enum xran_if_state
+{
+ XRAN_INIT = 0,
+ XRAN_RUNNING,
+ XRAN_STOPPED
+};
+
+/**
+ ******************************************************************************
+ * @ingroup xran
+ *
+ * @description
+ * Compression Method 6.3.3.13, Table 6-43
+ *****************************************************************************/
+enum xran_compression_method {
+ XRAN_COMPMETHOD_NONE = 0,
+ XRAN_COMPMETHOD_BLKFLOAT = 1,
+ XRAN_COMPMETHOD_BLKSCALE = 2,
+ XRAN_COMPMETHOD_ULAW = 3,
+ XRAN_COMPMETHOD_MODULATION = 4,
+ XRAN_COMPMETHOD_MAX
+};
+
+/**
+ ******************************************************************************
+ * @ingroup xran
+ *
+ * @description
+ * Callback function type for symbol packet enum
+ *****************************************************************************/
+enum callback_to_phy_id
+{
+ XRAN_CB_TTI = 0, /**< callback on TTI boundary */
+ XRAN_CB_HALF_SLOT_RX =1, /**< callback on half slot (sym 7) packet arrival*/
+ XRAN_CB_FULL_SLOT_RX =2, /**< callback on full slot (sym 14) packet arrival */
+ XRAN_CB_MAX /**< max number of callbacks */
+};
+
+/** Beamforming type, enumerated as "frequency", "time" or "hybrid"
+ section 10.4.2 Weight-based dynamic beamforming */
+enum xran_weight_based_beamforming_type {
+ XRAN_BF_T_FREQUENCY = 0,
+ XRAN_BF_T_TIME = 1,
+ XRAN_BF_T_HYBRID = 2,
+ XRAN_BF_T_MAX
+};
+
+typedef int32_t xran_status_t; /**< Xran status return value */
+
+/** callback function type for Symbol packet */
+typedef void (*xran_callback_sym_fn)(void*);
+
+/** Callback function type for TTI event */
+typedef int (*xran_fh_tti_callback_fn)(void*);
+
+/** Callback function type packet arrival from transport layer (ETH or IP) */
+typedef void (*xran_transport_callback_fn)(void*, xran_status_t);
+
+/** Callback functions to poll BBdev encoder */
+typedef int16_t (*phy_encoder_poll_fn)(void);
+
+/** Callback functions to poll BBdev secoder */
+typedef int16_t (*phy_decoder_poll_fn)(void);
+
+/** XRAN port enum */
+enum xran_vf_ports
+{
+ XRAN_UP_VF = 0, /**< port type for U-plane */
+ XRAN_CP_VF, /**< port type for C-plane */
+ XRAN_VF_MAX
+};
+
+/** XRAN category enum */
+enum xran_category
+{
+ XRAN_CATEGORY_A = 0,
+ XRAN_CATEGORY_B = 1,
+ XRAN_CATEGORY_MAX
+};
+
+/** type of beamforming */
+enum xran_beamforming_type
+{
+ XRAN_BEAM_ID_BASED = 0, /**< beam index based */
+ XRAN_BEAM_WEIGHT, /**< beam forming weights */
+ XRAN_BEAM_ATTRIBUTE, /**< beam index based */
+};
+
+/** state of bbdev with xran */
+enum xran_bbdev_init
+{
+ XRAN_BBDEV_NOT_USED = -1, /**< BBDEV is disabled */
+ XRAN_BBDEV_MODE_HW_OFF = 0, /**< BBDEV is enabled for SW sim mode */
+ XRAN_BBDEV_MODE_HW_ON = 1, /**< BBDEV is enable for HW */
+ XRAN_BBDEV_MODE_MAX
+};
+
+/** callback return information */
+struct xran_cb_tag {
+ uint16_t cellId;
+ uint32_t symbol;
+ uint32_t slotiId;
+};
+
+/** DPDK IO configuration for XRAN layer */
+struct xran_io_cfg {
+ uint8_t id; /**< should be (0) for O-DU or (1) O-RU (debug) */
+ char *dpdk_dev[XRAN_VF_MAX]; /**< VFs devices */
+ char *bbdev_dev[1]; /**< BBDev dev name */
+ int32_t bbdev_mode; /**< DPDK for BBDev */
+ int32_t core; /**< reservd */
+ int32_t system_core; /**< reservd */
+ int32_t pkt_proc_core; /**< reservd */
+ int32_t pkt_aux_core; /**< reservd */
+ int32_t timing_core; /**< core used by xRAN */
+ int32_t port[XRAN_VF_MAX]; /**< VFs ports */
+};
+
+/** XRAN spec section 3.1.3.1.6 ecpriRtcid / ecpriPcid define */
+struct xran_eaxcid_config {
+ uint16_t mask_cuPortId; /**< Mask CU PortId */
+ uint16_t mask_bandSectorId; /**< Mask Band */
+ uint16_t mask_ccId; /**< Mask CC */
+ uint16_t mask_ruPortId; /**< Mask RU Port ID */
+
+ uint8_t bit_cuPortId; /**< bandsectorId + ccId + ruportId */
+ uint8_t bit_bandSectorId; /**< ccId + ruPortId */
+ uint8_t bit_ccId; /**< ruportId */
+ uint8_t bit_ruPortId; /**< 0 */
+};
+
+/**
+* XRAN Front haul interface initialization settings
+*/
+struct xran_fh_init {
+ struct xran_io_cfg io_cfg;/**< DPDK IO for XRAN */
+ struct xran_eaxcid_config eAxCId_conf; /**< config of ecpriRtcid/ecpriPcid */
+
+ uint32_t dpdkBasebandFecMode; /**< DPDK Baseband FEC device mode (0-SW, 1-HW) */
+ char *dpdkBasebandDevice; /**< DPDK Baseband device address */
+ char *filePrefix; /**< DPDK prefix */
+
+ uint32_t mtu; /**< maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
+ xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) */
+ int8_t *p_o_du_addr; /**< O-DU Ethernet Mac Address */
+ int8_t *p_o_ru_addr; /**< O-RU Ethernet Mac Address */
+
+ uint16_t totalBfWeights;/**< The total number of beamforming weights on RU for extensions */
+
+ uint16_t Tadv_cp_dl; /**< Table 2 7 : xRAN Delay Management Model Parameters */
+ uint16_t T2a_min_cp_dl; /**< Table 2 7 : xRAN Delay Management Model Parameters */
+ uint16_t T2a_max_cp_dl; /**< Table 2 7 : xRAN Delay Management Model Parameters */
+ uint16_t T2a_min_cp_ul; /**< Table 2 7 : xRAN Delay Management Model Parameters */
+ uint16_t T2a_max_cp_ul; /**< Table 2 7 : xRAN Delay Management Model Parameters */
+ uint16_t T2a_min_up; /**< Table 2 7 : xRAN Delay Management Model Parameters */
+ uint16_t T2a_max_up; /**< Table 2 7 : xRAN Delay Management Model Parameters */
+ uint16_t Ta3_min; /**< Table 2 7 : xRAN Delay Management Model Parameters */
+ uint16_t Ta3_max; /**< Table 2 7 : xRAN Delay Management Model Parameters */
+ uint16_t T1a_min_cp_dl; /**< Table 2 7 : xRAN Delay Management Model Parameters */
+ uint16_t T1a_max_cp_dl; /**< Table 2 7 : xRAN Delay Management Model Parameters */
+ uint16_t T1a_min_cp_ul; /**< Table 2 7 : xRAN Delay Management Model Parameters */
+ uint16_t T1a_max_cp_ul; /**< Table 2 7 : xRAN Delay Management Model Parameters */
+ uint16_t T1a_min_up; /**< Table 2 7 : xRAN Delay Management Model Parameters */
+ uint16_t T1a_max_up; /**< Table 2 7 : xRAN Delay Management Model Parameters */
+ uint16_t Ta4_min; /**< Table 2 7 : xRAN Delay Management Model Parameters */
+ uint16_t Ta4_max; /**< Table 2 7 : xRAN Delay Management Model Parameters */
+
+ uint8_t enableCP; /**< enable C-plane */
+ uint8_t prachEnable; /**< enable PRACH */
+ uint8_t srsEnable; /**< enable SRS (Cat B specific) */
+ uint8_t cp_vlan_tag; /**< C-plane vlan tag */
+ uint8_t up_vlan_tag; /**< U-plane vlan tag */
+ int32_t debugStop; /**< enable auto stop */
+ int32_t debugStopCount; /**< enable auto stop after number of Tx packets */
+ int32_t DynamicSectionEna; /**< enable dynamic C-Plane section allocation */
+ int32_t GPS_Alpha; // refer to alpha as defined in section 9.7.2 of ORAN spec. this value should be alpha*(1/1.2288ns), range 0 - 1e7 (ns)
+ int32_t GPS_Beta; //beta value as defined in section 9.7.2 of ORAN spec. range -32767 ~ +32767
+};
+
+/** Beamforming waights for single stream for each PRBs given number of Antenna elements */
+struct xran_cp_bf_weight{
+ int16_t nAntElmTRx; /**< num TRX for this allocation */
+ int8_t* p_ext_section; /**< pointer to form extType */
+ int16_t ext_section_sz; /**< extType section size */
+};
+struct xran_cp_bf_attribute{
+ int16_t weight[4];
+};
+struct xran_cp_bf_precoding{
+ int16_t weight[4];
+};
+
+/** section descriptor for given number of PRBs used on U-plane packet creation */
+struct xran_section_desc {
+ uint16_t section_id; /**< section id used for this element */
+
+ int16_t iq_buffer_offset; /**< Offset in bytes for the content of IQs with in main symb buffer */
+ int16_t iq_buffer_len; /**< Length in bytes for the content of IQs with in main symb buffer */
+
+ uint8_t *pData; /**< optional pointer to data buffer */
+ void *pCtrl; /**< optional poitner to mbuf */
+};
+
+/** PRB element structure */
+struct xran_prb_elm {
+ int16_t nRBStart; /**< start RB of RB allocation */
+ int16_t nRBSize; /**< number of RBs used */
+ int16_t nStartSymb; /**< start symbol ID */
+ int16_t numSymb; /**< number of symbols */
+ int16_t nBeamIndex; /**< beam index for given PRB */
+ int16_t bf_weight_update; /** need to update beam weights or not */
+ int16_t compMethod; /**< compression index for given PRB */
+ int16_t iqWidth; /**< compression bit width for given PRB */
+ int16_t BeamFormingType; /**< index based, weights based or attribute based beam forming*/
+
+ struct xran_section_desc * p_sec_desc[XRAN_NUM_OF_SYMBOL_PER_SLOT]; /**< section desctiptors to U-plane data given RBs */
+ struct xran_cp_bf_weight bf_weight; /**< beam forming information relevant for given RBs */
+
+ union {
+ struct xran_cp_bf_attribute bf_attribute;
+ struct xran_cp_bf_precoding bf_precoding;
+ };
+};
+
+/** PRB map structure */
+struct xran_prb_map {
+ uint8_t dir; /**< DL or UL direction */
+ uint8_t xran_port; /**< xran id of given RU [0-(XRAN_PORTS_NUM-1)] */
+ uint16_t band_id; /**< xran band id */
+ uint16_t cc_id; /**< componnent carrier id [0 - (XRAN_MAX_SECTOR_NR-1)] */
+ uint16_t ru_port_id; /**< RU device antenna port id [0 - (XRAN_MAX_ANTENNA_NR-1) */
+ uint16_t tti_id; /**< xRAN slot id [0 - (max tti-1)] */
+ uint8_t start_sym_id; /**< start symbol Id [0-13] */
+ uint32_t nPrbElm; /**< total number of PRB elements for given map [0- (XRAN_MAX_PRBS-1)] */
+ struct xran_prb_elm prbMap[XRAN_MAX_PRBS];
+
+
+};
+
+/* PRACH config required for XRAN based FH */
+struct xran_prach_config
+{
+ /* PRACH config*/
+ uint8_t nPrachConfIdx; /**< PRACH Configuration Index*/
+ uint8_t nPrachSubcSpacing;
+ /**< PRACH Sub-carrier spacing
+ Value:0->1
+ For below 6GHz the values indicate 15kHz or 30kHz
+ For above 6GHz the values indicate 60kHz or 120kHz*/
+ uint8_t nPrachZeroCorrConf; /**< PRACH zeroCorrelationZoneConfig */
+ uint8_t nPrachRestrictSet; /**< PRACH restrictedSetConfig */
+ uint16_t nPrachRootSeqIdx; /**< PRACH Root Sequence Index */
+ uint16_t nPrachFreqStart; /**< PRACH prach-frequency-start */
+ int32_t nPrachFreqOffset; /**< PRACH prach-frequency-offset */
+ uint8_t nPrachFilterIdx; /**< PRACH Filter index */
+};
+
+/**< SRS configuration required for XRAN based FH */
+struct xran_srs_config {
+ uint16_t symbMask; /**< symbols used for SRS with in U/S slot [bits 0-13] */
+ uint8_t eAxC_offset; /**< starting value of eAxC for SRS packets */
+};
+
+/** XRAN slot configuration */
+struct xran_slot_config {
+ uint8_t nSymbolType[XRAN_NUM_OF_SYMBOL_PER_SLOT]; /**< Defines the Symbol type for all 14 symbols in a slot. 0: DL, 1: UL, 2: Guard */
+ uint8_t reserved[2];
+};
+
+/** XRAN front haul frame config */
+struct xran_frame_config {
+ uint8_t nFrameDuplexType; /**< Frame Duplex type: 0 -> FDD, 1 -> TDD */
+ uint8_t nNumerology; /**< Numerology, determine sub carrier spacing, Value: 0->4
+ 0: 15khz, 1: 30khz, 2: 60khz
+ 3: 120khz, 4: 240khz */
+ uint8_t nTddPeriod; /**< TDD period */
+ struct xran_slot_config sSlotConfig[XRAN_MAX_TDD_PERIODICITY];
+ /**< TDD Slot configuration - If nFrameDuplexType = TDD(1), then this config defines the slot config type for each slot.*/
+ /* The number of slots need to be equal to nTddPeriod */
+};
+
+/** XRAN-PHY interface byte order */
+enum xran_input_byte_order {
+ XRAN_NE_BE_BYTE_ORDER = 0, /**< Network byte order (Big endian), xRAN lib doesn't do swap */
+ XRAN_CPU_LE_BYTE_ORDER /**< CPU byte order (Little endian), xRAN lib does do swap */
+};
+
+/** XRAN-PHY interface I and Q order */
+enum xran_input_i_q_order {
+ XRAN_I_Q_ORDER = 0, /**< I , Q */
+ XRAN_Q_I_ORDER /**< Q , I */
+};
+
+/** XRAN front haul IQ compression settings */
+struct xran_ru_config {
+ enum xran_category xranCat; /**< mode: Catergory A or Category B */
+
+ uint8_t iqWidth; /**< IQ bit width */
+ uint8_t compMeth; /**< Compression method */
+ uint8_t fftSize; /**< FFT Size */
+ enum xran_input_byte_order byteOrder; /**< Order of bytes in int16_t in buffer. Big or little endian */
+ enum xran_input_i_q_order iqOrder; /**< order of IQs in the buffer */
+ uint16_t xran_max_frame; /**< max frame number supported */
+};
+
+/**
+ * @ingroup xran
+ * XRAN front haul general configuration */
+struct xran_fh_config {
+ uint32_t dpdk_port; /**< DPDK port number used for FH */
+ uint32_t sector_id; /**< Band sector ID for FH */
+ uint32_t nCC; /**< number of Component carriers supported on FH */
+ uint32_t neAxc; /**< number of eAxc supported on one CC*/
+ uint32_t neAxcUl; /**< number of eAxc supported on one CC for UL direction */
+ uint32_t nAntElmTRx; /**< Number of antenna elements for TX and RX */
+ uint16_t nDLFftSize; /**< DL FFT size */
+ uint16_t nULFftSize; /**< UL FFT size */
+ uint16_t nDLRBs; /**< DL PRB */
+ uint16_t nULRBs; /**< UL PRB */
+ uint32_t nDLAbsFrePointA; /**< Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 */
+ uint32_t nULAbsFrePointA; /**< Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 */
+ uint32_t nDLCenterFreqARFCN; /**< center frerquency for DL in MHz */
+ uint32_t nULCenterFreqARFCN; /**< center frerquency for UL in MHz */
+ xran_fh_tti_callback_fn ttiCb; /**< call back for TTI event */
+ void *ttiCbParam; /**< parameters of call back function */
+
+ struct xran_prach_config prach_conf; /**< PRACH specific configurations for FH */
+ struct xran_srs_config srs_conf; /**< SRS specific configurations for FH */
+ struct xran_frame_config frame_conf; /**< frame config */
+ struct xran_ru_config ru_conf; /**< config of RU as per XRAN spec */
+
+ phy_encoder_poll_fn bbdev_enc; /**< call back to poll BBDev encoder */
+ phy_decoder_poll_fn bbdev_dec; /**< call back to poll BBDev decoder */
+
+ uint32_t log_level; /**< configuration of log level */
+};
+
+/**
+ * @ingroup xran
+ * XRAN front haul statistic counters according to Table 7 1 : Common Counters for both DL and UL */
+struct xran_common_counters{
+ uint64_t Rx_on_time; /**< Data was received on time (applies to user data reception window) */
+ uint64_t Rx_early; /**< Data was received too early (applies to user data reception window) */
+ uint64_t Rx_late; /**< Data was received too late (applies to user data reception window) */
+ uint64_t Rx_corrupt; /**< Corrupt/Incorrect header packet */
+ uint64_t Rx_pkt_dupl; /**< Duplicated packet */
+ uint64_t Total_msgs_rcvd; /**< Total messages received (on all links) */
+};
+
+/**
+ * @ingroup xran
+ * CC instance handle pointer type */
+typedef void * xran_cc_handle_t;
+
+/**
+ *****************************************************************************
+ * @ingroup xran
+ *
+ * @description
+ * A flat buffer structure. The data pointer, pData, is a virtual address.
+ * The API requires the memory to by physically contiguous. Each flat
+ * buffer segment may contain several equally sized elements.
+ *
+ *****************************************************************************/
+struct xran_flat_buffer
+{
+ uint32_t nElementLenInBytes;
+ /**< The Element length specified in bytes.
+ * This parameter specifies the size of a single element in the buffer.
+ * The total size of the buffer is described as
+ * bufferSize = nElementLenInBytes * nNumberOfElements */
+ uint32_t nNumberOfElements;
+ /**< The number of elements in the physical contiguous memory segment */
+ uint32_t nOffsetInBytes;
+ /**< Offset in bytes to the start of the data in the physical contiguous
+ * memory segment */
+ uint32_t nIsPhyAddr;
+ uint8_t *pData;
+ /**< The data pointer is a virtual address, however the actual data pointed
+ * to is required to be in contiguous physical memory unless the field
+ requiresPhysicallyContiguousMemory in CpaInstanceInfo is false. */
+ void *pCtrl;
+ /**< pointer to control section coresponding to data buffer */
+};
+
+/**
+ *****************************************************************************
+ * @ingroup xran
+ * Scatter/Gather buffer list containing an array of Simple buffers.
+ *
+ * @description
+ * A Scatter/Gather buffer list structure. It is expected that this buffer
+ * structure will be used where more than one flat buffer can be provided
+ * on a particular API.
+ *
+ * IMPORTANT - The memory for the pPrivateMetaData member must be allocated
+ * by the client as contiguous memory. When allocating memory for
+ * pPrivateMetaData a call to cpaCyBufferListGetMetaSize MUST be made to
+ * determine the size of the Meta Data Buffer. The returned size
+ * (in bytes) may then be passed in a memory allocation routine to allocate
+ * the pPrivateMetaData memory.
+ *
+ *****************************************************************************/
+struct xran_buffer_list
+{
+ uint32_t nNumBuffers;
+ /**< Number of pointers */
+ struct xran_flat_buffer *pBuffers;
+ /**< Pointer to an unbounded array containing the number of CpaFlatBuffers
+ * defined by nNumBuffers */
+ void *pUserData;
+ /**< This is an opaque field that is not read or modified internally. */
+ void *pPrivateMetaData;
+ /**< Private Meta representation of this buffer List - the memory for this
+ * buffer needs to be allocated by the client as contiguous data.
+ * The amount of memory required is returned with a call to
+ * cpaCyBufferListGetMetaSize. If cpaCyBufferListGetMetaSize returns a size
+ * of zero no memory needs to be allocated, and this parameter can be NULL.
+ */
+};
+
+/**
+ * @ingroup xran
+ * Initialize the XRAN Layer via DPDK.
+ *
+ * @param argc
+ * A non-negative value. If it is greater than 0, the array members
+ * for argv[0] through argv[argc] (non-inclusive) shall contain pointers
+ * to strings.
+ * @param argv
+ * An array of strings. The contents of the array, as well as the strings
+ * which are pointed to by the array, may be modified by this function.
+ *
+ * @return
+ * 0 - on success
+ * Error codes returned via rte_errno
+ */
+int32_t xran_init(int argc, char *argv[], struct xran_fh_init *p_xran_fh_init, char *appName, void ** pHandle);
+
+/**
+ * @ingroup xran
+ *
+ * Function returns handles for number of sectors supported by XRAN layer. Currently function
+ * supports one handle XRAN layer where it supports only one CC
+ *
+ * @param pHandle
+ * Pointer to XRAN layer handle
+ * @param nNumInstances
+ * total number of instances of CC
+ * @param pSectorInstanceHandles
+ * Pointer to xran_cc_handle_t where to store Handle pointer
+ *
+ * @return
+ * 0 - on success
+ */
+int32_t xran_sector_get_instances (void * pHandle, uint16_t nNumInstances,
+ xran_cc_handle_t * pSectorInstanceHandles);
+
+/**
+ * @ingroup xran
+ *
+ * Function initialize Memory Management subsystem (mm) in order to handle memory buffers between XRAN layer
+ * and PHY.
+ *
+ * @param pHandle
+ * Pointer to XRAN layer handle for given CC
+ * @param nMemorySize
+ * memory size of all segments
+ * @param nMemorySegmentSize
+ * size of memory per segment
+ *
+ * @return
+ * 0 - on success
+ */
+int32_t xran_mm_init (void * pHandle, uint64_t nMemorySize, uint32_t nMemorySegmentSize);
+
+/**
+ * @ingroup xran
+ *
+ * Function allocates buffer memory (bm) used between XRAN layer and PHY. In general case it's DPDK mbuf.
+ * it uses Memory Management system to get memory chunk and define memory pool on top of it.
+ *
+ * @param pHandle
+ * Pointer to XRAN layer handle for given CC
+ * @param nPoolIndex
+ * pointer to buffer pool identification to be returned
+ * @param nNumberOfBuffers
+ * number of buffer to allocate in the pool
+ * @param nBufferSize
+ * buffer size to allocate
+ *
+ * @return
+ * 0 - on success
+ */
+int32_t xran_bm_init (void * pHandle, uint32_t * pPoolIndex, uint32_t nNumberOfBuffers, uint32_t nBufferSize);
+
+/**
+ * @ingroup xran
+ *
+ * Function allocates buffer used between XRAN layer and PHY. In general case it's DPDK mbuf.
+ *
+ * @param pHandle
+ * Pointer to XRAN layer handle for given CC
+ * @param nPoolIndex
+ * buffer pool identification
+ * @param ppData
+ * Pointer to pointer where to store address of new buffer
+ * @param ppCtrl
+ * Pointer to pointer where to store address of internal private control information
+ *
+ *
+ * @return
+ * 0 - on success
+ */
+int32_t xran_bm_allocate_buffer(void * pHandle, uint32_t nPoolIndex, void **ppData, void **ppCtrl);
+
+/**
+ * @ingroup xran
+ *
+ * Function frees buffer used between XRAN layer and PHY. In general case it's DPDK mbuf
+ *
+ * @param pHandle
+ * Pointer to XRAN layer handle for given CC
+ * @param pData
+ * Pointer to buffer
+ * @param pData
+ * Pointer to internal private control information
+ *
+ * @return
+ * 0 - on success
+ */
+int32_t xran_bm_free_buffer(void * pHandle, void *pData, void *pCtrl);
+
+/**
+ * @ingroup xran
+ *
+ * Function destroys Memory Management (MM) layer of XRAN library
+ *
+ * @param pHandle
+ * Pointer to XRAN layer handle for given CC
+ *
+ * @return
+ * 0 - on success
+ */
+int32_t xran_mm_destroy (void * pHandle);
+
+/**
+ * @ingroup xran
+ *
+ * Function configures TX(DL) and RX(UL) output buffers and callback (UL only) for XRAN layer with
+ * given handle
+ *
+ * @param pHandle
+ * Pointer to XRAN layer handle for given CC
+ * @param pSrcBuffer
+ * list of memory buffers to use to fetch IQs from PHY to XRAN layer (DL)
+ * @param pSrcCpBuffer
+ * list of memory buffers to use to configure C-plane (DL)
+ * @param pDstBuffer
+ * list of memory buffers to use to deliver IQs from XRAN layer to PHY (UL)
+ * @param pDstCpBuffer
+ * list of memory buffers to use to configure C-plane (UL)
+ * @param xran_transport_callback_fn pCallback
+ * Callback function to call with arrival of all packets for given CC for given symbol
+ * @param pCallbackTag
+ * Parameters of Callback function
+ *
+ * @return
+ * 0 - on success
+ * -1 - on error
+ */
+ int32_t xran_5g_fronthault_config (void * pHandle,
+ struct xran_buffer_list *pSrcBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN],
+ struct xran_buffer_list *pSrcCpBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN],
+ struct xran_buffer_list *pDstBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN],
+ struct xran_buffer_list *pDstCpBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN],
+ xran_transport_callback_fn pCallback,
+ void *pCallbackTag);
+
+/**
+ * @ingroup xran
+ *
+ * Function configures PRACH output buffers and callback for XRAN layer with given handle
+ *
+ * @param pHandle
+ * Pointer to XRAN layer handle for given CC
+ * @param pDstBuffer
+ * list of memory buffers to use to deliver PRACH IQs from xran layer to PHY
+ * @param xran_transport_callback_fn pCallback
+ * Callback function to call with arrival of PRACH packets for given CC
+ * @param pCallbackTag
+ * Parameters of Callback function
+ *
+ * @return
+ * 0 - on success
+ * -1 - on error
+ */
+int32_t xran_5g_prach_req (void * pHandle,
+ struct xran_buffer_list *pDstBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN],
+ xran_transport_callback_fn pCallback,
+ void *pCallbackTag);
+
+/**
+ * @ingroup xran
+ *
+ * Function configures SRS output buffers and callback for XRAN layer with given handle
+ *
+ * @param pHandle
+ * Pointer to XRAN layer handle for given CC
+ * @param pDstBuffer
+ * list of memory buffers to use to deliver SRS IQs from xran layer to PHY
+ * @param xran_transport_callback_fn pCallback
+ * Callback function to call with arrival of SRS packets for given CC
+ * @param pCallbackTag
+ * Parameters of Callback function
+ *
+ * @return
+ * 0 - on success
+ * -1 - on error
+ */
+int32_t xran_5g_srs_req (void * pHandle,
+ struct xran_buffer_list *pDstBuffer[XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_N_FE_BUF_LEN],
+ xran_transport_callback_fn pCallback,
+ void *pCallbackTag);
+
+
+/**
+ * @ingroup xran
+ *
+ * Function returns XRAN core utilization stats
+ *
+ * @param total_time (out)
+ * Pointer to variable to store Total time thread has been running
+ * @param used_time (out)
+ * Pointer to variable to store Total time essential tasks have been running on the thread
+ * @param core_used (out)
+ * Pointer to variable to store Core on which the XRAN thread is running
+ * @param clear (in)
+ * If set to 1, then internal variables total_time and used_time are cleared
+ *
+ * @return
+ * 0 - on success
+ */
+uint32_t xran_get_time_stats(uint64_t *total_time, uint64_t *used_time, uint32_t *core_used, uint32_t clear);
+
+/**
+ * @ingroup xran
+ *
+ * Function opens XRAN layer with given handle
+ *
+ * @param pHandle
+ * Pointer to XRAN layer handle for given CC
+ * @param pointer to struct xran_fh_config pConf
+ * Pointer to XRAN configuration structure with specific settings to use
+ *
+ * @return
+ * 0 - on success
+ */
+int32_t xran_open(void *pHandle, struct xran_fh_config* pConf);
+
+/**
+ * @ingroup xran
+ *
+ * Function starts XRAN layer with given handle
+ *
+ * @param pHandle
+ * Pointer to XRAN layer handle for given CC
+ *
+ * @return
+ * 0 - on success
+ */
+int32_t xran_start(void *pHandle);
+
+/**
+ * @ingroup xran
+ *
+ * Function stops XRAN layer with given handle
+ *
+ * @param pHandle
+ * Pointer to XRAN layer handle for given CC
+ *
+ * @return
+ * 0 - on success
+ */
+int32_t xran_stop(void *pHandle);
+
+/**
+ * @ingroup xran
+ *
+ * Function closes XRAN layer with given handle
+ *
+ * @param pHandle
+ * Pointer to XRAN layer handle for given CC
+ *
+ * @return
+ * 0 - on success
+ */
+int32_t xran_close(void *pHandle);
+
+/**
+ * @ingroup xran
+ *
+ * Function registers callback to XRAN layer. Function support callbacks aligned on packet arrival.
+ *
+ * @param pHandle
+ * Pointer to XRAN layer handle for given CC
+ * @param symCb
+ * pointer to callback function
+ * @param symCb
+ * pointer to Callback Function parameters
+ * @param symb
+ * symbol to be register for
+ * @param ant
+ * Antenna number to trigger callback for packet arrival
+ *
+ * @return
+ * 0 - in case of success
+ * -1 - in case of failure
+ */
+int32_t xran_reg_sym_cb(void *pHandle, xran_callback_sym_fn symCb, void * symCbParam, uint8_t symb, uint8_t ant);
+
+/**
+ * @ingroup xran
+ *
+ * Function registers callback to XRAN layer. Function support callbacks align to OTA time. TTI even, half of slot,
+ * full slot with respect to PTP time.
+ *
+ * @param pHandle
+ * Pointer to XRAN layer handle for given CC
+ * @param Cb
+ * pointer to callback function
+ * @param cbParam
+ * pointer to Callback Function parameters
+ * @param skipTtiNum
+ * number of calls to be skipped before first call
+ * @param callback_to_phy_id
+ * call back time identification (see enum callback_to_phy_id)
+ *
+ * @return
+ * 0 - in case of success
+ * -1 - in case of failure
+ */
+int32_t xran_reg_physide_cb(void *pHandle, xran_fh_tti_callback_fn Cb, void *cbParam, int skipTtiNum, enum callback_to_phy_id);
+
+/**
+ * @ingroup xran
+ *
+ * Function returns current TTI, Frame, Subframe, Slot Number as seen "Over air" base on PTP time
+ *
+ * @param nFrameIdx
+ * Pointer to Frame number [0-99]
+ *
+ * @param nSubframeIdx
+ * Pointer to Subframe number [0-10]
+ *
+ * @param nSlotIdx
+ * Pointer to Slot number [0-7]
+ *
+ * @param nSecond
+ * Pointer to current UTC second
+ *
+ * @return
+ * current TTI number [0-7999]
+ */
+int32_t xran_get_slot_idx (uint32_t *nFrameIdx, uint32_t *nSubframeIdx, uint32_t *nSlotIdx, uint64_t *nSecond);
+
+/**
+ * @ingroup xran
+ *
+ * Function retrun XRAN layer common counters for given handle
+ *
+ * @param pHandle
+ * Pointer to XRAN layer handle for given CC
+ *
+ * @param pStats
+ * Pointer to pointer of common counter structure
+ *
+ * @return
+ * 0 - on success
+ */
+int32_t xran_get_common_counters(void *pXranLayerHandle, struct xran_common_counters *pStats);
+
+
+/**
+ * @ingroup xran
+ *
+ * Function returns status of operation of FH layer
+ *
+ * @return
+ * XRAN_INIT - init state
+ * XRAN_RUNNING - running
+ * XRAN_STOPPED - stopped
+ */
+enum xran_if_state xran_get_if_state(void);
+
+
+/**
+ * @ingroup xran
+ *
+ * Function allocates memory of given size from heap
+ *
+ * @param buf_len
+ * buffer size
+ *
+ * @return
+ * ptr - to memory buffer or NULL
+ */
+void* xran_malloc(size_t buf_len);
+
+
+/**
+ * @ingroup xran
+ *
+ * Function calculates offset for ptr according to ORAN headers requared
+ *
+ * @param dst
+ * pointer to be addjusted
+ * @compMethod
+ * compression method according to enum xran_compression_method
+ *
+ * @return
+ * ptr - pointer to payload given header requared
+ */
+uint8_t* xran_add_hdr_offset(uint8_t *dst, int16_t compMethod);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _XRAN_FH_O_DU_H_*/
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-#ifndef _XRAN_MLOG_LNX_H_\r
-#define _XRAN_MLOG_LNX_H_\r
-\r
-#ifdef __cplusplus\r
-extern "C"\r
-{\r
-#endif\r
-\r
-#ifdef MLOG_ENABLED\r
-#include <mlog_lnx.h>\r
-#else\r
-\r
-/* stubs for MLOG functions */\r
-#define MLOG_FALSE ( 0 )\r
-\r
-#define MLogOpen(a, b, c, d, e) MLOG_FALSE\r
-#define MLogRestart(a) MLOG_FALSE\r
-#define MLogPrint(a) MLOG_FALSE\r
-#define MLogGetFileLocation() NULL\r
-#define MLogGetFileSize() 0\r
-#define MLogSetMask(a) MLOG_FALSE\r
-#define MLogGetMask()\r
-#define MLogRegisterTick()\r
-#define MLogTick() 0\r
-#define MLogIncrementCounter() 0\r
-#define MLogTask(w,x,y) 0\r
-#define MLogTaskCore(w,x,y,z) 0\r
-#define MLogMark(x,y)\r
-#define MLogDevInfo(x)\r
-#define MLogRegisterFrameSubframe(x,y)\r
-#define MLogAddVariables(x,y,z)\r
-#define MLogGetStats(a, b, c, d, e) MLOG_FALSE\r
-#define MLogGetAvgStats(a, b, c, d) MLOG_FALSE\r
-#define MLogAddTestCase(a, b) MLOG_FALSE\r
-#define MLogAddPowerStats(a, b, c, d, e) MLOG_FALSE\r
-\r
-#endif /* MLOG_ENABLED */\r
-\r
-#ifdef __cplusplus\r
-}\r
-#endif /* #ifdef __cplusplus */\r
-\r
-#endif /* #ifndef _XRAN_MLOG_LNX_H_ */\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+#ifndef _XRAN_MLOG_LNX_H_
+#define _XRAN_MLOG_LNX_H_
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#ifdef MLOG_ENABLED
+#include <mlog_lnx.h>
+#else
+
+/* stubs for MLOG functions */
+#define MLOG_FALSE ( 0 )
+
+#define MLogOpen(a, b, c, d, e) MLOG_FALSE
+#define MLogRestart(a) MLOG_FALSE
+#define MLogPrint(a) MLOG_FALSE
+#define MLogGetFileLocation() NULL
+#define MLogGetFileSize() 0
+#define MLogSetMask(a) MLOG_FALSE
+#define MLogGetMask()
+#define MLogRegisterTick()
+#define MLogTick() 0
+#define MLogIncrementCounter() 0
+#define MLogTask(w,x,y) 0
+#define MLogTaskCore(w,x,y,z) 0
+#define MLogMark(x,y)
+#define MLogDevInfo(x)
+#define MLogRegisterFrameSubframe(x,y)
+#define MLogAddVariables(x,y,z)
+#define MLogGetStats(a, b, c, d, e) MLOG_FALSE
+#define MLogGetAvgStats(a, b, c, d) MLOG_FALSE
+#define MLogAddTestCase(a, b) MLOG_FALSE
+#define MLogAddPowerStats(a, b, c, d, e) MLOG_FALSE
+
+#endif /* MLOG_ENABLED */
+
+#ifdef __cplusplus
+}
+#endif /* #ifdef __cplusplus */
+
+#endif /* #ifndef _XRAN_MLOG_LNX_H_ */
+
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/**\r
- * @brief Definitions and support functions to process XRAN packet\r
- * @file xran_pkt.h\r
- * @ingroup group_source_xran\r
- * @author Intel Corporation\r
- **/\r
-\r
-/* ORAN-WG4.CUS.0-v01.00 O-RAN Fronthaul Working Group\r
- Control, User and Synchronization Plane Specification\r
-*/\r
-\r
-/*\r
- * Layer common to data and control packets\r
- */\r
-\r
-#ifndef _XRAN_PKT_H_\r
-#define _XRAN_PKT_H_\r
-\r
-#ifdef __cplusplus\r
-extern "C" {\r
-#endif\r
-\r
-#include <rte_common.h>\r
-#include <rte_ether.h>\r
-#include <rte_byteorder.h>\r
-\r
-/**\r
- *****************************************************************************\r
- * @file xran_pkt.h\r
- *\r
- * @defgroup xran_common_pkt XRAN Packet definitions and functions\r
- * @ingroup xran\r
- *\r
- * @description\r
- * Definitions and support functions to process XRAN packet\r
- *****************************************************************************/\r
-\r
-#define ECPRI_MAX_PAYLOAD_SIZE 65535 /**< Max packet size taken in this implementation */\r
-\r
-/* XRAN spec: For this encapsulation, either the eCPRI Ethertype or the IEEE 1914.3 Ethertype shall be use */\r
-#define XRAN_ETHER_TYPE 0xAEFE /**< defined by eCPRI Specification V1.1 */\r
-\r
-#define XRAN_ECPRI_VER 0x0001 /**< eCPRI protocol revision 3.1.3.1.1 */\r
-#define XRAN_PAYLOAD_VER 0x0001 /**< Payload version 5.4.4.2 */\r
-\r
-#define VLAN_ID 0 /**< Default Tag protocol identifier (TPID)*/\r
-#define VLAN_PCP 7 /**< U-Plane and C-Plane only see Table 3 5 : Quality of service classes */\r
-\r
-/**\r
- ******************************************************************************\r
- * @ingroup xran_common_pkt\r
- *\r
- * @description\r
- * eCPRI message types\r
- * as per eCPRI spec 3.2.4. Message Types\r
- *****************************************************************************/\r
-enum ecpri_msg_type\r
-{\r
- ECPRI_IQ_DATA = 0x00, /**< U-plane: IQ data */\r
- ECPRI_BIT_SEQUENCE = 0x01, /* msg type is not supported */\r
- ECPRI_RT_CONTROL_DATA = 0x02, /**< C-plane: Control */\r
-\r
- /* Below msg types are not supported */\r
- ECPRI_GEN_DATA_TRANSFER = 0x03,\r
- ECPRI_REMOTE_MEM_ACCESS = 0x04,\r
- ECPRI_DELAY_MEASUREMENT = 0x05,\r
- ECPRI_REMOTE_RESET = 0x06,\r
- ECPRI_EVENT_INDICATION = 0x07,\r
- ECPRI_MSG_TYPE_MAX\r
-};\r
-\r
-/**\r
- ******************************************************************************\r
- * @ingroup xran_common_pkt\r
- *\r
- * @description\r
- * see 3.1.3.1.7 ecpriSeqid (message identifier)\r
- *****************************************************************************/\r
-struct ecpri_seq_id\r
-{\r
- uint8_t seq_id:8; /**< Sequence ID */\r
- uint8_t sub_seq_id:7; /**< Subsequence ID */\r
- uint8_t e_bit:1; /**< E bit */\r
-} __rte_packed;\r
-\r
-\r
-/**\r
- ******************************************************************************\r
- * @ingroup xran_common_pkt\r
- *\r
- * @description\r
- * Structure holds common eCPRI header as per\r
- * Table 3 1 : eCPRI Transport Header Field Definitions\r
- *****************************************************************************/\r
-struct xran_ecpri_cmn_hdr\r
-{\r
- uint8_t ecpri_concat:1; /**< 3.1.3.1.3 eCPRI concatenation indicator */\r
- uint8_t ecpri_resv:3; /**< 3.1.3.1.2 eCPRI reserved */\r
- uint8_t ecpri_ver:4; /**< 3.1.3.1.1 eCPRI protocol revision, defined in XRAN_ECPRI_VER */\r
- uint8_t ecpri_mesg_type; /**< 3.1.3.1.4 eCPRI message type, defined in ecpri_msg_type */\r
- uint16_t ecpri_payl_size; /**< 3.1.3.1.5 eCPRI payload size, without common header and any padding bytes */\r
-} __rte_packed;\r
-\r
-/**\r
- ******************************************************************************\r
- * @ingroup xran_common_pkt\r
- *\r
- * @description\r
- * Structure holds eCPRI transport header as per\r
- * Table 3 1 : eCPRI Transport Header Field Definitions\r
- *****************************************************************************/\r
-struct xran_ecpri_hdr\r
-{\r
- struct xran_ecpri_cmn_hdr cmnhdr;\r
- rte_be16_t ecpri_xtc_id; /**< 3.1.3.1.6 real time control data / IQ data transfer message series identifier */\r
- struct ecpri_seq_id ecpri_seq_id; /**< 3.1.3.1.7 message identifier */\r
-} __rte_packed;\r
-\r
-\r
-/**\r
- ******************************************************************************\r
- * @ingroup xran_common_pkt\r
- *\r
- * @description\r
- * Enum used to set xRAN packet data direction (gNB Tx/Rx 5.4.4.1)\r
- * uplink or downlink\r
- *****************************************************************************/\r
-enum xran_pkt_dir\r
-{\r
- XRAN_DIR_UL = 0, /**< UL direction */\r
- XRAN_DIR_DL = 1, /**< DL direction */\r
- XRAN_DIR_MAX\r
-};\r
-\r
-/**\r
- ******************************************************************************\r
- * @ingroup xran_common_pkt\r
- *\r
- * @description\r
- * Structure holds components of radio application header\r
- * 5.4.4 Coding of Information Elements - Application Layer, Common\r
- * for U-plane as per 6.3.2 DL/UL Data\r
- *****************************************************************************/\r
-struct radio_app_common_hdr\r
-{\r
- /* Octet 9 */\r
- uint8_t filter_id:4; /**< This parameter defines an index to the channel filter to be\r
- used between IQ data and air interface, both in DL and UL.\r
- For most physical channels filterIndex =0000b is used which\r
- indexes the standard channel filter, e.g. 100MHz channel filter\r
- for 100MHz nominal carrier bandwidth. (see 5.4.4.3 for more) */\r
- uint8_t payl_ver:3; /**< This parameter defines the payload protocol version valid\r
- for the following IEs in the application layer. In this version of\r
- the specification payloadVersion=001b shall be used. */\r
- uint8_t data_direction:1; /**< This parameter indicates the gNB data direction. */\r
-\r
- /* Octet 10 */\r
- uint8_t frame_id:8; /**< This parameter is a counter for 10 ms frames (wrapping period 2.56 seconds) */\r
-\r
- /* Octet 11 */\r
- /* Octet 12 */\r
- union {\r
- uint16_t value;\r
- struct {\r
- uint16_t symb_id:6; /**< This parameter identifies the first symbol number within slot,\r
- to which the information of this message is applies. */\r
- uint16_t slot_id:6; /**< This parameter is the slot number within a 1ms sub-frame. All slots in\r
- one sub-frame are counted by this parameter, slotId running from 0 to Nslot-1.\r
- In this version of the specification the maximum Nslot=16, All\r
- other values of the 6 bits are reserved for future use. */\r
- uint16_t subframe_id:4; /**< This parameter is a counter for 1 ms sub-frames within 10ms frame. */\r
- };\r
- }sf_slot_sym;\r
-\r
-} __rte_packed;\r
-\r
-/**\r
- ******************************************************************************\r
- * @ingroup xran_common_pkt\r
- *\r
- * @description\r
- * This parameter defines the compression method and IQ bit width for the\r
- * user data in the data section. This field is absent from U-Plane messages\r
- * when the static IQ format and compression method is configured via the M-Plane.\r
- * In this way a single compression method and IQ bit width is provided\r
- * (per UL and DL, per LTE and NR) without adding more overhead to U-Plane messages.\r
- *****************************************************************************/\r
-struct compression_hdr\r
-{\r
- uint8_t ud_iq_width:4; /**< Bit width of each I and each Q\r
- 16 for udIqWidth=0, otherwise equals udIqWidth e.g. udIqWidth = 0000b means I and Q are each 16 bits wide;\r
- e.g. udIQWidth = 0001b means I and Q are each 1 bit wide;\r
- e.g. udIqWidth = 1111b means I and Q are each 15 bits wide\r
- */\r
- uint8_t ud_comp_meth:4;\r
- /**< udCompMeth| compression method |udIqWidth meaning\r
- ---------------+-----------------------------+--------------------------------------------\r
- 0000b | no compression |bitwidth of each uncompressed I and Q value\r
- 0001b | block floating point |bitwidth of each I and Q mantissa value\r
- 0010b | block scaling |bitwidth of each I and Q scaled value\r
- 0011b | mu-law |bitwidth of each compressed I and Q value\r
- 0100b | modulation compression |bitwidth of each compressed I and Q value\r
- 0100b - 1111b | reserved for future methods |depends on the specific compression method\r
- */\r
-} __rte_packed;\r
-\r
-/**\r
- ******************************************************************************\r
- * @ingroup xran_common_pkt\r
- *\r
- * @description\r
- * Structure holds common xran packet header\r
- * 3.1.1 Ethernet Encapsulation\r
- *****************************************************************************/\r
-struct xran_pkt_comm_hdr\r
-{\r
- struct ether_hdr eth_hdr; /**< Ethernet Header */\r
- struct xran_ecpri_hdr ecpri_hdr; /**< eCPRI Transport Header */\r
-} __rte_packed;\r
-\r
-#ifdef __cplusplus\r
-}\r
-#endif\r
-\r
-#endif\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief Definitions and support functions to process XRAN packet
+ * @file xran_pkt.h
+ * @ingroup group_source_xran
+ * @author Intel Corporation
+ **/
+
+/* ORAN-WG4.CUS.0-v01.00 O-RAN Fronthaul Working Group
+ Control, User and Synchronization Plane Specification
+*/
+
+/*
+ * Layer common to data and control packets
+ */
+
+#ifndef _XRAN_PKT_H_
+#define _XRAN_PKT_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <rte_common.h>
+#include <rte_ether.h>
+#include <rte_byteorder.h>
+
+/**
+ *****************************************************************************
+ * @file xran_pkt.h
+ *
+ * @defgroup xran_common_pkt XRAN Packet definitions and functions
+ * @ingroup xran
+ *
+ * @description
+ * Definitions and support functions to process XRAN packet
+ *****************************************************************************/
+
+#define ECPRI_MAX_PAYLOAD_SIZE 65535 /**< Max packet size taken in this implementation */
+
+/* XRAN spec: For this encapsulation, either the eCPRI Ethertype or the IEEE 1914.3 Ethertype shall be use */
+#define XRAN_ETHER_TYPE 0xAEFE /**< defined by eCPRI Specification V1.1 */
+
+#define XRAN_ECPRI_VER 0x0001 /**< eCPRI protocol revision 3.1.3.1.1 */
+#define XRAN_PAYLOAD_VER 0x0001 /**< Payload version 5.4.4.2 */
+
+#define VLAN_ID 0 /**< Default Tag protocol identifier (TPID)*/
+#define VLAN_PCP 7 /**< U-Plane and C-Plane only see Table 3 5 : Quality of service classes */
+
+/**
+ ******************************************************************************
+ * @ingroup xran_common_pkt
+ *
+ * @description
+ * eCPRI message types
+ * as per eCPRI spec 3.2.4. Message Types
+ *****************************************************************************/
+enum ecpri_msg_type
+{
+ ECPRI_IQ_DATA = 0x00, /**< U-plane: IQ data */
+ ECPRI_BIT_SEQUENCE = 0x01, /* msg type is not supported */
+ ECPRI_RT_CONTROL_DATA = 0x02, /**< C-plane: Control */
+
+ /* Below msg types are not supported */
+ ECPRI_GEN_DATA_TRANSFER = 0x03,
+ ECPRI_REMOTE_MEM_ACCESS = 0x04,
+ ECPRI_DELAY_MEASUREMENT = 0x05,
+ ECPRI_REMOTE_RESET = 0x06,
+ ECPRI_EVENT_INDICATION = 0x07,
+ ECPRI_MSG_TYPE_MAX
+};
+
+/**
+ ******************************************************************************
+ * @ingroup xran_common_pkt
+ *
+ * @description
+ * see 3.1.3.1.7 ecpriSeqid (message identifier)
+ *****************************************************************************/
+struct ecpri_seq_id
+{
+ uint8_t seq_id:8; /**< Sequence ID */
+ uint8_t sub_seq_id:7; /**< Subsequence ID */
+ uint8_t e_bit:1; /**< E bit */
+} __rte_packed;
+
+
+/**
+ ******************************************************************************
+ * @ingroup xran_common_pkt
+ *
+ * @description
+ * Structure holds common eCPRI header as per
+ * Table 3 1 : eCPRI Transport Header Field Definitions
+ *****************************************************************************/
+struct xran_ecpri_cmn_hdr
+{
+ uint8_t ecpri_concat:1; /**< 3.1.3.1.3 eCPRI concatenation indicator */
+ uint8_t ecpri_resv:3; /**< 3.1.3.1.2 eCPRI reserved */
+ uint8_t ecpri_ver:4; /**< 3.1.3.1.1 eCPRI protocol revision, defined in XRAN_ECPRI_VER */
+ uint8_t ecpri_mesg_type; /**< 3.1.3.1.4 eCPRI message type, defined in ecpri_msg_type */
+ uint16_t ecpri_payl_size; /**< 3.1.3.1.5 eCPRI payload size, without common header and any padding bytes */
+} __rte_packed;
+
+/**
+ ******************************************************************************
+ * @ingroup xran_common_pkt
+ *
+ * @description
+ * Structure holds eCPRI transport header as per
+ * Table 3 1 : eCPRI Transport Header Field Definitions
+ *****************************************************************************/
+struct xran_ecpri_hdr
+{
+ struct xran_ecpri_cmn_hdr cmnhdr;
+ rte_be16_t ecpri_xtc_id; /**< 3.1.3.1.6 real time control data / IQ data transfer message series identifier */
+ struct ecpri_seq_id ecpri_seq_id; /**< 3.1.3.1.7 message identifier */
+} __rte_packed;
+
+
+/**
+ ******************************************************************************
+ * @ingroup xran_common_pkt
+ *
+ * @description
+ * Enum used to set xRAN packet data direction (gNB Tx/Rx 5.4.4.1)
+ * uplink or downlink
+ *****************************************************************************/
+enum xran_pkt_dir
+{
+ XRAN_DIR_UL = 0, /**< UL direction */
+ XRAN_DIR_DL = 1, /**< DL direction */
+ XRAN_DIR_MAX
+};
+
+/**
+ ******************************************************************************
+ * @ingroup xran_common_pkt
+ *
+ * @description
+ * Structure holds components of radio application header
+ * 5.4.4 Coding of Information Elements - Application Layer, Common
+ * for U-plane as per 6.3.2 DL/UL Data
+ *****************************************************************************/
+struct radio_app_common_hdr
+{
+ /* Octet 9 */
+ uint8_t filter_id:4; /**< This parameter defines an index to the channel filter to be
+ used between IQ data and air interface, both in DL and UL.
+ For most physical channels filterIndex =0000b is used which
+ indexes the standard channel filter, e.g. 100MHz channel filter
+ for 100MHz nominal carrier bandwidth. (see 5.4.4.3 for more) */
+ uint8_t payl_ver:3; /**< This parameter defines the payload protocol version valid
+ for the following IEs in the application layer. In this version of
+ the specification payloadVersion=001b shall be used. */
+ uint8_t data_direction:1; /**< This parameter indicates the gNB data direction. */
+
+ /* Octet 10 */
+ uint8_t frame_id:8; /**< This parameter is a counter for 10 ms frames (wrapping period 2.56 seconds) */
+
+ /* Octet 11 */
+ /* Octet 12 */
+ union {
+ uint16_t value;
+ struct {
+ uint16_t symb_id:6; /**< This parameter identifies the first symbol number within slot,
+ to which the information of this message is applies. */
+ uint16_t slot_id:6; /**< This parameter is the slot number within a 1ms sub-frame. All slots in
+ one sub-frame are counted by this parameter, slotId running from 0 to Nslot-1.
+ In this version of the specification the maximum Nslot=16, All
+ other values of the 6 bits are reserved for future use. */
+ uint16_t subframe_id:4; /**< This parameter is a counter for 1 ms sub-frames within 10ms frame. */
+ };
+ }sf_slot_sym;
+
+} __rte_packed;
+
+/**
+ ******************************************************************************
+ * @ingroup xran_common_pkt
+ *
+ * @description
+ * This parameter defines the compression method and IQ bit width for the
+ * user data in the data section. This field is absent from U-Plane messages
+ * when the static IQ format and compression method is configured via the M-Plane.
+ * In this way a single compression method and IQ bit width is provided
+ * (per UL and DL, per LTE and NR) without adding more overhead to U-Plane messages.
+ *****************************************************************************/
+struct compression_hdr
+{
+ uint8_t ud_iq_width:4; /**< Bit width of each I and each Q
+ 16 for udIqWidth=0, otherwise equals udIqWidth e.g. udIqWidth = 0000b means I and Q are each 16 bits wide;
+ e.g. udIQWidth = 0001b means I and Q are each 1 bit wide;
+ e.g. udIqWidth = 1111b means I and Q are each 15 bits wide
+ */
+ uint8_t ud_comp_meth:4;
+ /**< udCompMeth| compression method |udIqWidth meaning
+ ---------------+-----------------------------+--------------------------------------------
+ 0000b | no compression |bitwidth of each uncompressed I and Q value
+ 0001b | block floating point |bitwidth of each I and Q mantissa value
+ 0010b | block scaling |bitwidth of each I and Q scaled value
+ 0011b | mu-law |bitwidth of each compressed I and Q value
+ 0100b | modulation compression |bitwidth of each compressed I and Q value
+ 0100b - 1111b | reserved for future methods |depends on the specific compression method
+ */
+} __rte_packed;
+
+/**
+ ******************************************************************************
+ * @ingroup xran_common_pkt
+ *
+ * @description
+ * Structure holds common xran packet header
+ * 3.1.1 Ethernet Encapsulation
+ *****************************************************************************/
+struct xran_pkt_comm_hdr
+{
+ struct ether_hdr eth_hdr; /**< Ethernet Header */
+ struct xran_ecpri_hdr ecpri_hdr; /**< eCPRI Transport Header */
+} __rte_packed;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/**\r
- * @brief This file provides the definition of Control Plane Messages\r
- * for XRAN Front Haul layer as defined in XRAN-FH.CUS.0-v02.01.\r
- *\r
- * @file xran_pkt_cp.h\r
- * @ingroup group_lte_source_xran\r
- * @author Intel Corporation\r
- *\r
- **/\r
-\r
-#ifndef _XRAN_PKT_CP_H_\r
-#define _XRAN_PKT_CP_H_\r
-\r
-#ifdef __cplusplus\r
-extern "C" {\r
-#endif\r
-\r
-\r
-/**********************************************************************\r
- * Common structures for C/U-plane\r
- **********************************************************************/\r
-/**\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @description\r
- * user data compression header defined in 5.4.4.10 / 6.3.3.13\r
- */\r
-struct xran_radioapp_udComp_header {\r
- uint8_t udCompMeth:4; /**< Compression method, XRAN_COMPMETHOD_xxxx */\r
- uint8_t udIqWidth:4; /**< IQ bit width, 1 ~ 16 */\r
- } __attribute__((__packed__));\r
-\r
-\r
-/**********************************************************************\r
- * Definition of C-Plane Protocol 5.4\r
- **********************************************************************/\r
-/**\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @description\r
- * Common Radio Application Header for C-Plane\r
- */\r
-struct xran_cp_radioapp_common_header { /* 6bytes, first 4bytes need the conversion for byte order */\r
- uint32_t startSymbolId:6; /**< 5.4.4.7 start symbol identifier */\r
- uint32_t slotId:6; /**< 5.4.4.6 slot identifier */\r
- uint32_t subframeId:4; /**< 5.4.4.5 subframe identifier */\r
- uint32_t frameId:8; /**< 5.4.4.4 frame identifier */\r
- uint32_t filterIndex:4; /**< 5.4.4.3 filter index, XRAN_FILTERINDEX_xxxx */\r
- uint32_t payloadVer:3; /**< 5.4.4.2 payload version, should be 1 */\r
- uint32_t dataDirection:1; /**< 5.4.4.1 data direction (gNB Tx/Rx) */\r
- uint8_t numOfSections; /**< 5.4.4.8 number of sections */\r
- uint8_t sectionType; /**< 5.4.4.9 section type */\r
- } __attribute__((__packed__));\r
-\r
-/**\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @description\r
- * frame structure defined in 5.4.4.13\r
- */\r
-struct xran_cp_radioapp_frameStructure {\r
- uint8_t uScs:4; /**< sub-carrier spacing, XRAN_SCS_xxx */\r
- uint8_t fftSize:4; /**< FFT size, XRAN_FFTSIZE_xxx */\r
- } __attribute__((__packed__));\r
-\r
-/**\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @description\r
- * Section headers definition for C-Plane.\r
- * Section type 6 and 7 are not present since those have different fields.\r
- */\r
-struct xran_cp_radioapp_section_header { /* 8bytes, need the conversion for byte order */\r
- union {\r
- struct {\r
- uint32_t reserved:16;\r
- uint32_t numSymbol:4; /**< 5.4.5.7 number of symbols */\r
- uint32_t reMask:12; /**< 5.4.5.5 resource element mask */\r
- } s0;\r
- struct {\r
- uint32_t beamId:15; /**< 5.4.5.9 beam identifier */\r
- uint32_t ef:1; /**< 5.4.5.8 extension flag */\r
- uint32_t numSymbol:4; /**< 5.4.5.7 number of symbols */\r
- uint32_t reMask:12; /**< 5.4.5.5 resource element mask */\r
- } s1;\r
- struct {\r
- uint32_t beamId:15; /**< 5.4.5.9 beam identifier */\r
- uint32_t ef:1; /**< 5.4.5.8 extension flag */\r
- uint32_t numSymbol:4; /**< 5.4.5.7 number of symbols */\r
- uint32_t reMask:12; /**< 5.4.5.5 resource element mask */\r
- } s3;\r
- struct {\r
- uint32_t ueId:15; /**< 5.4.5.10 UE identifier */\r
- uint32_t ef:1; /**< 5.4.5.8 extension flag */\r
- uint32_t numSymbol:4; /**< 5.4.5.7 number of symbols */\r
- uint32_t reMask:12; /**< 5.4.5.5 resource element mask */\r
- } s5;\r
- } u;\r
-\r
- uint32_t numPrbc:8; /**< 5.4.5.6 number of contiguous PRBs per control section 0000 0000b = all PRBs */\r
- uint32_t startPrbc:10; /**< 5.4.5.4 starting PRB of control section */\r
- uint32_t symInc:1; /**< 5.4.5.3 symbol number increment command XRAN_SYMBOLNUMBER_xxxx */\r
- uint32_t rb:1; /**< 5.4.5.2 resource block indicator, XRAN_RBIND_xxx */\r
- uint32_t sectionId:12; /**< 5.4.5.1 section identifier */\r
- } __attribute__((__packed__));\r
-\r
-\r
-struct xran_cp_radioapp_section_ext_hdr {\r
- /* 12 bytes, need to convert byte order for two parts respectively\r
- * - 2 and 8 bytes, reserved1 would be OK if it is zero\r
- */\r
- uint16_t extLen:8; /**< 5.4.6.3 extension length, in 32bits words */\r
- uint16_t extType:7; /**< 5.4.6.1 extension type */\r
- uint16_t ef:1; /**< 5.4.6.2 extension flag */\r
- } __attribute__((__packed__));\r
-\r
-/**\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @description\r
- * Beamforming Weights Extension Type(ExtType 1) defined in 5.4.7.1\r
- * The structure is reordered for byte order conversion.\r
- */\r
-struct xran_cp_radioapp_section_ext1 {\r
- /* variable length, need to be careful to convert byte order\r
- * - does not need to convert first 3 bytes */\r
- uint8_t extType:7; /**< 5.4.6.1 extension type */\r
- uint8_t ef:1; /**< 5.4.6.2 extension flag */\r
- uint8_t extLen; /**< 5.4.6.3 extension length, in 32bits words */\r
- /* bfwCompHdr */\r
- uint8_t bfwCompMeth:4; /**< 5.4.7.1.1 Beamforming weight Compression method */\r
- uint8_t bfwIqWidth:4; /**< 5.4.7.1.1 Beamforming weight IQ bit width */\r
-\r
- /*\r
- *\r
- *\r
- * bfwCompParam\r
- * (bfwI, bfwQ)+\r
- * ......\r
- * zero padding for 4-byte alignment\r
- */\r
- } __attribute__((__packed__));\r
-\r
-/**\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @description\r
- * Beamforming Attributes Extension Type(ExtType 2) defined in 5.4.7.2\r
- * The structure is reordered for byte order conversion.\r
- */\r
-struct xran_cp_radioapp_section_ext2 {\r
- /* variable length, need to be careful to convert byte order\r
- * - first 4 bytes can be converted at once\r
- */\r
- uint32_t bfZe3ddWidth:3; /**< 5.4.7.2.1 beamforming zenith beamwidth parameter bitwidth, Table 5-21 */\r
- uint32_t bfAz3ddWidth:3; /**< 5.4.7.2.1 beamforming azimuth beamwidth parameter bitwidth, Table 5-20 */\r
- uint32_t bfaCompResv1:2;\r
- uint32_t bfZePtWidth:3; /**< 5.4.7.2.1 beamforming zenith pointing parameter bitwidth, Table 5-19 */\r
- uint32_t bfAzPtWidth:3; /**< 5.4.7.2.1 beamforming azimuth pointing parameter bitwidth, Table 5-18 */\r
- uint32_t bfaCompResv0:2;\r
- uint32_t extLen:8; /**< 5.4.6.3 extension length, in 32bits words */\r
- uint32_t extType:7; /**< 5.4.6.1 extension type */\r
- uint32_t ef:1; /**< 5.4.6.2 extension flag */\r
-\r
- /*\r
- * would be better to use bit manipulation directly to add these parameters\r
- *\r
- * bfAzPt: var by bfAzPtWidth\r
- * bfZePt: var by bfZePtWidth\r
- * bfAz3dd: var by bfAz3ddWidth\r
- * bfZe3dd: var by bfZe3ddWidth\r
- * bfAzSI:5 (including zero-padding for unused bits)\r
- * bfZeSI:3\r
- * padding for 4-byte alignment\r
- *\r
- */\r
- } __attribute__((__packed__));\r
-\r
-/**\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @description\r
- * DL Precoding Extension Type(ExtType 3) for first data layer.\r
- * Defined in 5.4.7.3 Table 5-22.\r
- * Only be used for LTE TM2-4 and not for other LTE TMs nor NR.\r
- * The structure is reordered for byte order conversion. Not supported.\r
- */\r
-struct xran_cp_radioapp_section_ext3_first {\r
- /* 16 bytes, need to convert byte order for two parts\r
- * - 8 / 8 bytes\r
- */\r
- uint32_t reserved1:8;\r
- uint32_t crsSymNum:4; /**< 5.4.7.3.6 CRS symbol number indication */\r
- uint32_t reserved0:3;\r
- uint32_t crsShift:1; /**< 5.4.7.3.7 CRS shift used for DL transmission */\r
- uint32_t crsReMask:12; /**< 5.4.7.3.5 CRS resource element mask */\r
- uint32_t txScheme:4; /**< 5.4.7.3.3 transmission scheme */\r
- uint32_t numLayers:4; /**< 5.4.7.3.4 number of layers used for DL transmission */\r
- uint32_t layerId:4; /**< 5.4.7.3.2 Layer ID for DL transmission */\r
- uint32_t codebookIndex:8; /**< 5.4.7.3.1 precoder codebook used for transmission */\r
- uint32_t extLen:8; /**< 5.4.6.3 extension length, in 32bits words */\r
- uint32_t extType:7; /**< 5.4.6.1 extension type */\r
- uint32_t ef:1; /**< 5.4.6.2 extension flag */\r
-\r
- uint16_t beamIdAP3; /**< 5.4.7.3.10 beam id to be used for antenna port 3 */\r
- uint16_t beamIdAP2; /**< 5.4.7.3.9 beam id to be used for antenna port 2 */\r
- uint16_t beamIdAP1; /**< 5.4.7.3.8 beam id to be used for antenna port 1 */\r
- uint16_t reserved2;\r
- } __attribute__((__packed__));\r
-\r
-/**\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @description\r
- * DL Precoding Extension Type(ExtType 3) for non-first data layer.\r
- * Defined in 5.4.7.3 Table 5-23.\r
- * Only be used for LTE TM2-4 and not for other LTE TMs nor NR.\r
- * The structure is reordered for byte order conversion. Not supported.\r
- */\r
-struct xran_cp_radioapp_section_ext3_non_first {\r
- /* 4 bytes, need to convert byte order at once */\r
- uint32_t numLayers:4; /**< 5.4.7.3.4 number of layers used for DL transmission */\r
- uint32_t layerId:4; /**< 5.4.7.3.2 Layer ID for DL transmission */\r
- uint32_t codebookIndex:8; /**< 5.4.7.3.1 precoder codebook used for transmission */\r
-\r
- uint32_t extLen:8; /**< 5.4.6.3 extension length, in 32bits words */\r
- uint32_t extType:7; /**< 5.4.6.1 extension type */\r
- uint32_t ef:1; /**< 5.4.6.2 extension flag */\r
- } __attribute__((__packed__));\r
-\r
-/**\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @description\r
- * Modulation Compression Parameter Extension Type(ExtType 4), 5.4.7.4\r
- * Only applies to section type 1 and 3.\r
- * The structure is reordered for byte order conversion.\r
- */\r
-struct xran_cp_radioapp_section_ext4 {\r
- /* 4 bytes, need to convert byte order at once */\r
- uint32_t modCompScaler:15; /**< 5.4.7.4.2 modulation compression scaler value */\r
- uint32_t csf:1; /**< 5.4.7.4.1 constellation shift flag */\r
-\r
- uint32_t extLen:8; /**< 5.4.6.3 extension length, in 32bits words */\r
- uint32_t extType:7; /**< 5.4.6.1 extension type */\r
- uint32_t ef:1; /**< 5.4.6.2 extension flag */\r
- } __attribute__((__packed__));\r
-\r
-#if 0\r
-/**\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @description\r
- * Modulation Compression Additional Parameter Extension Type(ExtType 5) for one scaler value.\r
- * Defined in 5.4.7.5 Table 5-26\r
- * Only applies to section type 1 3, and 5.\r
- * The structure is reordered for byte order conversion.\r
- */\r
-struct xran_cp_radioapp_section_ext5_1 {\r
- /* 8 bytes, need to convert byte order at once */\r
- uint32_t reserved:20;\r
- uint32_t mcScaleOffset:15; /**< 5.4.7.5.3 scaling value for modulation compression */\r
- uint32_t csf:1; /**< 5.4.7.5.2 constellation shift flag */\r
- uint32_t mcScaleReMask:12; /**< 5.4.7.5.1 modulation compression power scale RE mask */\r
-\r
- uint32_t extLen:8; /**< 5.4.6.3 extension length, in 32bits words */\r
- uint32_t extType:7; /**< 5.4.6.1 extension type */\r
- uint32_t ef:1; /**< 5.4.6.2 extension flag */\r
- } __attribute__((__packed__));\r
-\r
-/**\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @description\r
- * Modulation Compression Additional Parameter Extension Type(ExtType 5) for two scaler values.\r
- * Defined in 5.4.7.5 Table 5-27\r
- * Only applies to section type 1 3, and 5.\r
- * The structure is reordered for byte order conversion.\r
- */\r
-struct xran_cp_radioapp_section_ext5_2 {\r
- /* 12 bytes, need to convert byte order for two parts respectively\r
- * - 2 and 8 bytes, reserved1 would be OK if it is zero\r
- */\r
- uint16_t extLen:8; /**< 5.4.6.3 extension length, in 32bits words */\r
- uint16_t extType:7; /**< 5.4.6.1 extension type */\r
- uint16_t ef:1; /**< 5.4.6.2 extension flag */\r
-\r
- uint32_t reserved0:8;\r
- uint32_t mcScaleOffset2:15; /**< 5.4.7.5.3 scaling value for modulation compression */\r
- uint32_t csf2:1; /**< 5.4.7.5.2 constellation shift flag */\r
- uint32_t mcScaleReMask2:12; /**< 5.4.7.5.1 modulation compression power scale RE mask */\r
- uint32_t mcScaleOffset1:15; /**< 5.4.7.5.3 scaling value for modulation compression */\r
- uint32_t csf1:1; /**< 5.4.7.5.2 constellation shift flag */\r
- uint32_t mcScaleReMask1:12; /**< 5.4.7.5.1 modulation compression power scale RE mask */\r
-\r
- uint16_t reserved1;\r
- } __attribute__((__packed__));\r
-#endif\r
-\r
-struct xran_cp_radioapp_section_ext5 {\r
- uint32_t reserved0:8;\r
- uint32_t mcScaleOffset2:15; /**< 5.4.7.5.3 scaling value for modulation compression */\r
- uint32_t csf2:1; /**< 5.4.7.5.2 constellation shift flag */\r
- uint32_t mcScaleReMask2:12; /**< 5.4.7.5.1 modulation compression power scale RE mask */\r
- uint32_t mcScaleOffset1:15; /**< 5.4.7.5.3 scaling value for modulation compression */\r
- uint32_t csf1:1; /**< 5.4.7.5.2 constellation shift flag */\r
- uint32_t mcScaleReMask1:12; /**< 5.4.7.5.1 modulation compression power scale RE mask */\r
- } __attribute__((__packed__));\r
-\r
-/**********************************************************\r
- * Scheduling and Beam-forming Commands 5.4.2\r
- **********************************************************/\r
-/**\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @description\r
- * Section header definition for type 0\r
- */\r
-struct xran_cp_radioapp_section0_header { // 12bytes (6+2+1+2+1)\r
- struct xran_cp_radioapp_common_header cmnhdr;\r
- uint16_t timeOffset; /**< 5.4.4.12 time offset */\r
-\r
- struct xran_cp_radioapp_frameStructure frameStructure;\r
- uint16_t cpLength; /**< 5.4.4.14 cyclic prefix length */\r
- uint8_t reserved;\r
- } __attribute__((__packed__));\r
-\r
-/**\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @description\r
- * Section definition for type 0: Unused RB or Symbols in DL or UL (Table 5-2)\r
- * Not supported in this release\r
- */\r
-struct xran_cp_radioapp_section0 { // 8bytes (4+4)\r
- struct xran_cp_radioapp_section_header hdr;\r
- } __attribute__((__packed__));\r
-\r
-/**\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @description\r
- * Section header definition for type 1\r
- */\r
-struct xran_cp_radioapp_section1_header { // 8bytes (6+1+1)\r
- struct xran_cp_radioapp_common_header cmnhdr;\r
- struct xran_radioapp_udComp_header udComp;\r
- uint8_t reserved;\r
- } __attribute__((__packed__));\r
-\r
-/**\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @description\r
- * Section definition for type 1: Most DL/UL Radio Channels (Table 5-3)\r
- */\r
-struct xran_cp_radioapp_section1 { // 8bytes (4+4)\r
- struct xran_cp_radioapp_section_header hdr;\r
-\r
- // section extensions // 5.4.6 & 5.4.7\r
- // .........\r
- } __attribute__((__packed__));\r
-\r
-/**\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @description\r
- * Section header definition for type 3\r
- */\r
-struct xran_cp_radioapp_section3_header { // 12bytes (6+2+1+2+1)\r
- struct xran_cp_radioapp_common_header cmnhdr;\r
- uint16_t timeOffset; /**< 5.4.4.12 time offset */\r
-\r
- struct xran_cp_radioapp_frameStructure frameStructure;\r
- uint16_t cpLength; /**< 5.4.4.14 cyclic prefix length */\r
- struct xran_radioapp_udComp_header udComp;\r
- } __attribute__((__packed__));\r
-\r
-/**\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @description\r
- * Section definition for type 3: PRACH and Mixed-numerology Channels (Table 5-4)\r
- */\r
-struct xran_cp_radioapp_section3 { // 12bytes (4+4+4)\r
- struct xran_cp_radioapp_section_header hdr;\r
- uint32_t freqOffset:24; /**< 5.4.5.11 frequency offset */\r
- uint32_t reserved:8;\r
-\r
- // section extensions // 5.4.6 & 5.4.7\r
- // .........\r
- } __attribute__((__packed__));\r
-\r
-/**\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @description\r
- * Section header definition for type 5\r
- */\r
-struct xran_cp_radioapp_section5_header { // 8bytes (6+1+1)\r
- struct xran_cp_radioapp_common_header cmnhdr;\r
- struct xran_radioapp_udComp_header udComp;\r
- uint8_t reserved;\r
- } __attribute__((__packed__));\r
-\r
-/**\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @description\r
- * Section definition for type 5: UE scheduling information (Table 5-5)\r
- * Not supported in this release\r
- */\r
-struct xran_cp_radioapp_section5 {\r
- struct xran_cp_radioapp_section_header hdr;\r
-\r
- // section extensions // 5.4.6 & 5.4.7\r
- // .........\r
- } __attribute__((__packed__));\r
-\r
-/**\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @description\r
- * Section header definition for type 6\r
- */\r
-struct xran_cp_radioapp_section6_header { // 8bytes (6+1+1)\r
- struct xran_cp_radioapp_common_header cmnhdr;\r
- uint8_t numberOfUEs; /**< 5.4.4.11 number of UEs */\r
- uint8_t reserved;\r
- } __attribute__((__packed__));\r
-\r
-/**\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @description\r
- * Section definition for type 5: Channel Information (Table 5-6)\r
- * Not supported in this release\r
- */\r
-struct xran_cp_radioapp_section6 {\r
- uint32_t regularizationFactor:16;/**< 5.4.5.12 regularization Factor */\r
- uint32_t ueId:15; /**< 5.4.5.10 UE identifier */\r
- uint32_t ef:1; /**< 5.4.5.8 extension flag */\r
- uint8_t startPrbch:2; /**< 5.4.5.4 starting PRB of control section */\r
- uint8_t symInc:1; /**< 5.4.5.3 symbol number increment command XRAN_SYMBOLNUMBER_xxxx */\r
- uint8_t rb:1; /**< 5.4.5.2 resource block indicator, XRAN_RBIND_xxx */\r
- uint8_t reserved:4;\r
- uint8_t startPrbcl:8; /**< 5.4.5.4 starting PRB of control section */\r
- uint8_t numPrbc:8; /**< 5.4.5.6 number of contiguous PRBs per control section */\r
-\r
- // ciIQsamples start from here // 5.4.5.13 channel information I and Q values\r
- // .........\r
- //\r
- // section extensions // 5.4.6 & 5.4.7\r
- // .........\r
- } __attribute__((__packed__));\r
-\r
-/**\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @description\r
- * Section header definition for type 7: LAA\r
- * Not supported in this release\r
- */\r
-struct xran_cp_radioapp_section7_header {\r
- struct xran_cp_radioapp_common_header cmnhdr;\r
- uint16_t reserved;\r
- uint8_t laaMsgLen:4; /**< 5.4.5.15 LAA message length */\r
- uint8_t laaMsgType:4; /**< 5.4.5.14 LAA message type */\r
-\r
- // Payload start from here // 5.4.5.16 ~ 5.4.5.32\r
- } __attribute__((__packed__));\r
-\r
-#ifdef __cplusplus\r
-}\r
-#endif\r
-\r
-#endif /* _XRAN_PKT_CP_H_ */\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief This file provides the definition of Control Plane Messages
+ * for XRAN Front Haul layer as defined in XRAN-FH.CUS.0-v02.01.
+ *
+ * @file xran_pkt_cp.h
+ * @ingroup group_lte_source_xran
+ * @author Intel Corporation
+ *
+ **/
+
+#ifndef _XRAN_PKT_CP_H_
+#define _XRAN_PKT_CP_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/**********************************************************************
+ * Common structures for C/U-plane
+ **********************************************************************/
+/**
+ * @ingroup xran_cp_pkt
+ *
+ * @description
+ * user data compression header defined in 5.4.4.10 / 6.3.3.13
+ */
+struct xran_radioapp_udComp_header {
+ uint8_t udCompMeth:4; /**< Compression method, XRAN_COMPMETHOD_xxxx */
+ uint8_t udIqWidth:4; /**< IQ bit width, 1 ~ 16 */
+ } __attribute__((__packed__));
+
+
+/**********************************************************************
+ * Definition of C-Plane Protocol 5.4
+ **********************************************************************/
+/**
+ * @ingroup xran_cp_pkt
+ *
+ * @description
+ * Common Radio Application Header for C-Plane
+ */
+struct xran_cp_radioapp_common_header { /* 6bytes, first 4bytes need the conversion for byte order */
+ uint32_t startSymbolId:6; /**< 5.4.4.7 start symbol identifier */
+ uint32_t slotId:6; /**< 5.4.4.6 slot identifier */
+ uint32_t subframeId:4; /**< 5.4.4.5 subframe identifier */
+ uint32_t frameId:8; /**< 5.4.4.4 frame identifier */
+ uint32_t filterIndex:4; /**< 5.4.4.3 filter index, XRAN_FILTERINDEX_xxxx */
+ uint32_t payloadVer:3; /**< 5.4.4.2 payload version, should be 1 */
+ uint32_t dataDirection:1; /**< 5.4.4.1 data direction (gNB Tx/Rx) */
+ uint8_t numOfSections; /**< 5.4.4.8 number of sections */
+ uint8_t sectionType; /**< 5.4.4.9 section type */
+ } __attribute__((__packed__));
+
+/**
+ * @ingroup xran_cp_pkt
+ *
+ * @description
+ * frame structure defined in 5.4.4.13
+ */
+struct xran_cp_radioapp_frameStructure {
+ uint8_t uScs:4; /**< sub-carrier spacing, XRAN_SCS_xxx */
+ uint8_t fftSize:4; /**< FFT size, XRAN_FFTSIZE_xxx */
+ } __attribute__((__packed__));
+
+/**
+ * @ingroup xran_cp_pkt
+ *
+ * @description
+ * Section headers definition for C-Plane.
+ * Section type 6 and 7 are not present since those have different fields.
+ */
+struct xran_cp_radioapp_section_header { /* 8bytes, need the conversion for byte order */
+ union {
+ struct {
+ uint32_t reserved:16;
+ uint32_t numSymbol:4; /**< 5.4.5.7 number of symbols */
+ uint32_t reMask:12; /**< 5.4.5.5 resource element mask */
+ } s0;
+ struct {
+ uint32_t beamId:15; /**< 5.4.5.9 beam identifier */
+ uint32_t ef:1; /**< 5.4.5.8 extension flag */
+ uint32_t numSymbol:4; /**< 5.4.5.7 number of symbols */
+ uint32_t reMask:12; /**< 5.4.5.5 resource element mask */
+ } s1;
+ struct {
+ uint32_t beamId:15; /**< 5.4.5.9 beam identifier */
+ uint32_t ef:1; /**< 5.4.5.8 extension flag */
+ uint32_t numSymbol:4; /**< 5.4.5.7 number of symbols */
+ uint32_t reMask:12; /**< 5.4.5.5 resource element mask */
+ } s3;
+ struct {
+ uint32_t ueId:15; /**< 5.4.5.10 UE identifier */
+ uint32_t ef:1; /**< 5.4.5.8 extension flag */
+ uint32_t numSymbol:4; /**< 5.4.5.7 number of symbols */
+ uint32_t reMask:12; /**< 5.4.5.5 resource element mask */
+ } s5;
+ } u;
+
+ uint32_t numPrbc:8; /**< 5.4.5.6 number of contiguous PRBs per control section 0000 0000b = all PRBs */
+ uint32_t startPrbc:10; /**< 5.4.5.4 starting PRB of control section */
+ uint32_t symInc:1; /**< 5.4.5.3 symbol number increment command XRAN_SYMBOLNUMBER_xxxx */
+ uint32_t rb:1; /**< 5.4.5.2 resource block indicator, XRAN_RBIND_xxx */
+ uint32_t sectionId:12; /**< 5.4.5.1 section identifier */
+ } __attribute__((__packed__));
+
+
+struct xran_cp_radioapp_section_ext_hdr {
+ /* 12 bytes, need to convert byte order for two parts respectively
+ * - 2 and 8 bytes, reserved1 would be OK if it is zero
+ */
+ uint16_t extLen:8; /**< 5.4.6.3 extension length, in 32bits words */
+ uint16_t extType:7; /**< 5.4.6.1 extension type */
+ uint16_t ef:1; /**< 5.4.6.2 extension flag */
+ } __attribute__((__packed__));
+
+/**
+ * @ingroup xran_cp_pkt
+ *
+ * @description
+ * Beamforming Weights Extension Type(ExtType 1) defined in 5.4.7.1
+ * The structure is reordered for byte order conversion.
+ */
+struct xran_cp_radioapp_section_ext1 {
+ /* variable length, need to be careful to convert byte order
+ * - does not need to convert first 3 bytes */
+ uint8_t extType:7; /**< 5.4.6.1 extension type */
+ uint8_t ef:1; /**< 5.4.6.2 extension flag */
+ uint8_t extLen; /**< 5.4.6.3 extension length, in 32bits words */
+ /* bfwCompHdr */
+ uint8_t bfwCompMeth:4; /**< 5.4.7.1.1 Beamforming weight Compression method */
+ uint8_t bfwIqWidth:4; /**< 5.4.7.1.1 Beamforming weight IQ bit width */
+
+ /*
+ *
+ *
+ * bfwCompParam
+ * (bfwI, bfwQ)+
+ * ......
+ * zero padding for 4-byte alignment
+ */
+ } __attribute__((__packed__));
+
+/**
+ * @ingroup xran_cp_pkt
+ *
+ * @description
+ * Beamforming Attributes Extension Type(ExtType 2) defined in 5.4.7.2
+ * The structure is reordered for byte order conversion.
+ */
+struct xran_cp_radioapp_section_ext2 {
+ /* variable length, need to be careful to convert byte order
+ * - first 4 bytes can be converted at once
+ */
+ uint32_t bfZe3ddWidth:3; /**< 5.4.7.2.1 beamforming zenith beamwidth parameter bitwidth, Table 5-21 */
+ uint32_t bfAz3ddWidth:3; /**< 5.4.7.2.1 beamforming azimuth beamwidth parameter bitwidth, Table 5-20 */
+ uint32_t bfaCompResv1:2;
+ uint32_t bfZePtWidth:3; /**< 5.4.7.2.1 beamforming zenith pointing parameter bitwidth, Table 5-19 */
+ uint32_t bfAzPtWidth:3; /**< 5.4.7.2.1 beamforming azimuth pointing parameter bitwidth, Table 5-18 */
+ uint32_t bfaCompResv0:2;
+ uint32_t extLen:8; /**< 5.4.6.3 extension length, in 32bits words */
+ uint32_t extType:7; /**< 5.4.6.1 extension type */
+ uint32_t ef:1; /**< 5.4.6.2 extension flag */
+
+ /*
+ * would be better to use bit manipulation directly to add these parameters
+ *
+ * bfAzPt: var by bfAzPtWidth
+ * bfZePt: var by bfZePtWidth
+ * bfAz3dd: var by bfAz3ddWidth
+ * bfZe3dd: var by bfZe3ddWidth
+ * bfAzSI:5 (including zero-padding for unused bits)
+ * bfZeSI:3
+ * padding for 4-byte alignment
+ *
+ */
+ } __attribute__((__packed__));
+
+/**
+ * @ingroup xran_cp_pkt
+ *
+ * @description
+ * DL Precoding Extension Type(ExtType 3) for first data layer.
+ * Defined in 5.4.7.3 Table 5-22.
+ * Only be used for LTE TM2-4 and not for other LTE TMs nor NR.
+ * The structure is reordered for byte order conversion. Not supported.
+ */
+struct xran_cp_radioapp_section_ext3_first {
+ /* 16 bytes, need to convert byte order for two parts
+ * - 8 / 8 bytes
+ */
+ uint32_t reserved1:8;
+ uint32_t crsSymNum:4; /**< 5.4.7.3.6 CRS symbol number indication */
+ uint32_t reserved0:3;
+ uint32_t crsShift:1; /**< 5.4.7.3.7 CRS shift used for DL transmission */
+ uint32_t crsReMask:12; /**< 5.4.7.3.5 CRS resource element mask */
+ uint32_t txScheme:4; /**< 5.4.7.3.3 transmission scheme */
+ uint32_t numLayers:4; /**< 5.4.7.3.4 number of layers used for DL transmission */
+ uint32_t layerId:4; /**< 5.4.7.3.2 Layer ID for DL transmission */
+ uint32_t codebookIndex:8; /**< 5.4.7.3.1 precoder codebook used for transmission */
+ uint32_t extLen:8; /**< 5.4.6.3 extension length, in 32bits words */
+ uint32_t extType:7; /**< 5.4.6.1 extension type */
+ uint32_t ef:1; /**< 5.4.6.2 extension flag */
+
+ uint16_t beamIdAP3; /**< 5.4.7.3.10 beam id to be used for antenna port 3 */
+ uint16_t beamIdAP2; /**< 5.4.7.3.9 beam id to be used for antenna port 2 */
+ uint16_t beamIdAP1; /**< 5.4.7.3.8 beam id to be used for antenna port 1 */
+ uint16_t reserved2;
+ } __attribute__((__packed__));
+
+/**
+ * @ingroup xran_cp_pkt
+ *
+ * @description
+ * DL Precoding Extension Type(ExtType 3) for non-first data layer.
+ * Defined in 5.4.7.3 Table 5-23.
+ * Only be used for LTE TM2-4 and not for other LTE TMs nor NR.
+ * The structure is reordered for byte order conversion. Not supported.
+ */
+struct xran_cp_radioapp_section_ext3_non_first {
+ /* 4 bytes, need to convert byte order at once */
+ uint32_t numLayers:4; /**< 5.4.7.3.4 number of layers used for DL transmission */
+ uint32_t layerId:4; /**< 5.4.7.3.2 Layer ID for DL transmission */
+ uint32_t codebookIndex:8; /**< 5.4.7.3.1 precoder codebook used for transmission */
+
+ uint32_t extLen:8; /**< 5.4.6.3 extension length, in 32bits words */
+ uint32_t extType:7; /**< 5.4.6.1 extension type */
+ uint32_t ef:1; /**< 5.4.6.2 extension flag */
+ } __attribute__((__packed__));
+
+/**
+ * @ingroup xran_cp_pkt
+ *
+ * @description
+ * Modulation Compression Parameter Extension Type(ExtType 4), 5.4.7.4
+ * Only applies to section type 1 and 3.
+ * The structure is reordered for byte order conversion.
+ */
+struct xran_cp_radioapp_section_ext4 {
+ /* 4 bytes, need to convert byte order at once */
+ uint32_t modCompScaler:15; /**< 5.4.7.4.2 modulation compression scaler value */
+ uint32_t csf:1; /**< 5.4.7.4.1 constellation shift flag */
+
+ uint32_t extLen:8; /**< 5.4.6.3 extension length, in 32bits words */
+ uint32_t extType:7; /**< 5.4.6.1 extension type */
+ uint32_t ef:1; /**< 5.4.6.2 extension flag */
+ } __attribute__((__packed__));
+
+#if 0
+/**
+ * @ingroup xran_cp_pkt
+ *
+ * @description
+ * Modulation Compression Additional Parameter Extension Type(ExtType 5) for one scaler value.
+ * Defined in 5.4.7.5 Table 5-26
+ * Only applies to section type 1 3, and 5.
+ * The structure is reordered for byte order conversion.
+ */
+struct xran_cp_radioapp_section_ext5_1 {
+ /* 8 bytes, need to convert byte order at once */
+ uint32_t reserved:20;
+ uint32_t mcScaleOffset:15; /**< 5.4.7.5.3 scaling value for modulation compression */
+ uint32_t csf:1; /**< 5.4.7.5.2 constellation shift flag */
+ uint32_t mcScaleReMask:12; /**< 5.4.7.5.1 modulation compression power scale RE mask */
+
+ uint32_t extLen:8; /**< 5.4.6.3 extension length, in 32bits words */
+ uint32_t extType:7; /**< 5.4.6.1 extension type */
+ uint32_t ef:1; /**< 5.4.6.2 extension flag */
+ } __attribute__((__packed__));
+
+/**
+ * @ingroup xran_cp_pkt
+ *
+ * @description
+ * Modulation Compression Additional Parameter Extension Type(ExtType 5) for two scaler values.
+ * Defined in 5.4.7.5 Table 5-27
+ * Only applies to section type 1 3, and 5.
+ * The structure is reordered for byte order conversion.
+ */
+struct xran_cp_radioapp_section_ext5_2 {
+ /* 12 bytes, need to convert byte order for two parts respectively
+ * - 2 and 8 bytes, reserved1 would be OK if it is zero
+ */
+ uint16_t extLen:8; /**< 5.4.6.3 extension length, in 32bits words */
+ uint16_t extType:7; /**< 5.4.6.1 extension type */
+ uint16_t ef:1; /**< 5.4.6.2 extension flag */
+
+ uint32_t reserved0:8;
+ uint32_t mcScaleOffset2:15; /**< 5.4.7.5.3 scaling value for modulation compression */
+ uint32_t csf2:1; /**< 5.4.7.5.2 constellation shift flag */
+ uint32_t mcScaleReMask2:12; /**< 5.4.7.5.1 modulation compression power scale RE mask */
+ uint32_t mcScaleOffset1:15; /**< 5.4.7.5.3 scaling value for modulation compression */
+ uint32_t csf1:1; /**< 5.4.7.5.2 constellation shift flag */
+ uint32_t mcScaleReMask1:12; /**< 5.4.7.5.1 modulation compression power scale RE mask */
+
+ uint16_t reserved1;
+ } __attribute__((__packed__));
+#endif
+
+struct xran_cp_radioapp_section_ext5 {
+ uint32_t reserved0:8;
+ uint32_t mcScaleOffset2:15; /**< 5.4.7.5.3 scaling value for modulation compression */
+ uint32_t csf2:1; /**< 5.4.7.5.2 constellation shift flag */
+ uint32_t mcScaleReMask2:12; /**< 5.4.7.5.1 modulation compression power scale RE mask */
+ uint32_t mcScaleOffset1:15; /**< 5.4.7.5.3 scaling value for modulation compression */
+ uint32_t csf1:1; /**< 5.4.7.5.2 constellation shift flag */
+ uint32_t mcScaleReMask1:12; /**< 5.4.7.5.1 modulation compression power scale RE mask */
+ } __attribute__((__packed__));
+
+/**********************************************************
+ * Scheduling and Beam-forming Commands 5.4.2
+ **********************************************************/
+/**
+ * @ingroup xran_cp_pkt
+ *
+ * @description
+ * Section header definition for type 0
+ */
+struct xran_cp_radioapp_section0_header { // 12bytes (6+2+1+2+1)
+ struct xran_cp_radioapp_common_header cmnhdr;
+ uint16_t timeOffset; /**< 5.4.4.12 time offset */
+
+ struct xran_cp_radioapp_frameStructure frameStructure;
+ uint16_t cpLength; /**< 5.4.4.14 cyclic prefix length */
+ uint8_t reserved;
+ } __attribute__((__packed__));
+
+/**
+ * @ingroup xran_cp_pkt
+ *
+ * @description
+ * Section definition for type 0: Unused RB or Symbols in DL or UL (Table 5-2)
+ * Not supported in this release
+ */
+struct xran_cp_radioapp_section0 { // 8bytes (4+4)
+ struct xran_cp_radioapp_section_header hdr;
+ } __attribute__((__packed__));
+
+/**
+ * @ingroup xran_cp_pkt
+ *
+ * @description
+ * Section header definition for type 1
+ */
+struct xran_cp_radioapp_section1_header { // 8bytes (6+1+1)
+ struct xran_cp_radioapp_common_header cmnhdr;
+ struct xran_radioapp_udComp_header udComp;
+ uint8_t reserved;
+ } __attribute__((__packed__));
+
+/**
+ * @ingroup xran_cp_pkt
+ *
+ * @description
+ * Section definition for type 1: Most DL/UL Radio Channels (Table 5-3)
+ */
+struct xran_cp_radioapp_section1 { // 8bytes (4+4)
+ struct xran_cp_radioapp_section_header hdr;
+
+ // section extensions // 5.4.6 & 5.4.7
+ // .........
+ } __attribute__((__packed__));
+
+/**
+ * @ingroup xran_cp_pkt
+ *
+ * @description
+ * Section header definition for type 3
+ */
+struct xran_cp_radioapp_section3_header { // 12bytes (6+2+1+2+1)
+ struct xran_cp_radioapp_common_header cmnhdr;
+ uint16_t timeOffset; /**< 5.4.4.12 time offset */
+
+ struct xran_cp_radioapp_frameStructure frameStructure;
+ uint16_t cpLength; /**< 5.4.4.14 cyclic prefix length */
+ struct xran_radioapp_udComp_header udComp;
+ } __attribute__((__packed__));
+
+/**
+ * @ingroup xran_cp_pkt
+ *
+ * @description
+ * Section definition for type 3: PRACH and Mixed-numerology Channels (Table 5-4)
+ */
+struct xran_cp_radioapp_section3 { // 12bytes (4+4+4)
+ struct xran_cp_radioapp_section_header hdr;
+ uint32_t freqOffset:24; /**< 5.4.5.11 frequency offset */
+ uint32_t reserved:8;
+
+ // section extensions // 5.4.6 & 5.4.7
+ // .........
+ } __attribute__((__packed__));
+
+/**
+ * @ingroup xran_cp_pkt
+ *
+ * @description
+ * Section header definition for type 5
+ */
+struct xran_cp_radioapp_section5_header { // 8bytes (6+1+1)
+ struct xran_cp_radioapp_common_header cmnhdr;
+ struct xran_radioapp_udComp_header udComp;
+ uint8_t reserved;
+ } __attribute__((__packed__));
+
+/**
+ * @ingroup xran_cp_pkt
+ *
+ * @description
+ * Section definition for type 5: UE scheduling information (Table 5-5)
+ * Not supported in this release
+ */
+struct xran_cp_radioapp_section5 {
+ struct xran_cp_radioapp_section_header hdr;
+
+ // section extensions // 5.4.6 & 5.4.7
+ // .........
+ } __attribute__((__packed__));
+
+/**
+ * @ingroup xran_cp_pkt
+ *
+ * @description
+ * Section header definition for type 6
+ */
+struct xran_cp_radioapp_section6_header { // 8bytes (6+1+1)
+ struct xran_cp_radioapp_common_header cmnhdr;
+ uint8_t numberOfUEs; /**< 5.4.4.11 number of UEs */
+ uint8_t reserved;
+ } __attribute__((__packed__));
+
+/**
+ * @ingroup xran_cp_pkt
+ *
+ * @description
+ * Section definition for type 5: Channel Information (Table 5-6)
+ * Not supported in this release
+ */
+struct xran_cp_radioapp_section6 {
+ uint32_t regularizationFactor:16;/**< 5.4.5.12 regularization Factor */
+ uint32_t ueId:15; /**< 5.4.5.10 UE identifier */
+ uint32_t ef:1; /**< 5.4.5.8 extension flag */
+ uint8_t startPrbch:2; /**< 5.4.5.4 starting PRB of control section */
+ uint8_t symInc:1; /**< 5.4.5.3 symbol number increment command XRAN_SYMBOLNUMBER_xxxx */
+ uint8_t rb:1; /**< 5.4.5.2 resource block indicator, XRAN_RBIND_xxx */
+ uint8_t reserved:4;
+ uint8_t startPrbcl:8; /**< 5.4.5.4 starting PRB of control section */
+ uint8_t numPrbc:8; /**< 5.4.5.6 number of contiguous PRBs per control section */
+
+ // ciIQsamples start from here // 5.4.5.13 channel information I and Q values
+ // .........
+ //
+ // section extensions // 5.4.6 & 5.4.7
+ // .........
+ } __attribute__((__packed__));
+
+/**
+ * @ingroup xran_cp_pkt
+ *
+ * @description
+ * Section header definition for type 7: LAA
+ * Not supported in this release
+ */
+struct xran_cp_radioapp_section7_header {
+ struct xran_cp_radioapp_common_header cmnhdr;
+ uint16_t reserved;
+ uint8_t laaMsgLen:4; /**< 5.4.5.15 LAA message length */
+ uint8_t laaMsgType:4; /**< 5.4.5.14 LAA message type */
+
+ // Payload start from here // 5.4.5.16 ~ 5.4.5.32
+ } __attribute__((__packed__));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _XRAN_PKT_CP_H_ */
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/**\r
- * @brief Definitions and support functions to process XRAN packet\r
- * @file xran_pkt_up.h\r
- * @ingroup group_source_xran\r
- * @author Intel Corporation\r
- **/\r
-\r
-/**\r
- *****************************************************************************\r
- * @file xran_pkt_up.h\r
- *\r
- * @defgroup xran_up_pkt U-Plane XRAN Packet definitions and functions\r
- * @ingroup xran\r
- *\r
- * @description\r
- * Structures relevant to U-plane packets only (data now only)\r
- *****************************************************************************/\r
-#ifndef _XRAN_PKT_UP_H_\r
-#define _XRAN_PKT_UP_H_\r
-\r
-#ifdef __cplusplus\r
-extern "C" {\r
-#endif\r
-\r
-#include "xran_pkt.h"\r
-\r
-#define IQ_PAIR_NUM_IN_RB 12\r
-#define MAX_DATA_SECTIONS_NUM 273\r
-#define MAX_IQ_BIT_WIDTH 16\r
-\r
-/* currently library supports I and Q sizes of 8 and 16 bits each */\r
-#define IQ_BITS MAX_IQ_BIT_WIDTH\r
-\r
-/*\r
- * Structure holding data section header fields\r
- * It is repeated for every section ID in xRAN packet\r
- */\r
-\r
-/**\r
- ******************************************************************************\r
- * @ingroup xran_up_pkt\r
- *\r
- * @description\r
- * Structure holding data section header fields\r
- * It is repeated for every section ID in xRAN packet\r
- * 5.4.5 Coding of Information Elements - Application Layer, Sections\r
- * for U-plane as per 6.3.2 DL/UL Data\r
- *****************************************************************************/\r
-struct data_section_hdr {\r
- union {\r
- uint32_t all_bits;\r
- struct {\r
- uint32_t num_prbu:8; /**< 5.4.5.6 number of contiguous PRBs per control section */\r
- uint32_t start_prbu:10; /**< 5.4.5.4 starting PRB of control section */\r
- uint32_t sym_inc:1; /**< 5.4.5.3 symbol number increment command XRAN_SYMBOLNUMBER_xxxx */\r
- uint32_t rb:1; /**< 5.4.5.2 resource block indicator, XRAN_RBIND_xxx */\r
- uint32_t sect_id:12; /**< 5.4.5.1 section identifier */\r
- };\r
- }fields;\r
-} __rte_packed;\r
-\r
-\r
-/*\r
- ******************************************************************************\r
- * @ingroup xran_up_pkt\r
- *\r
- * @description\r
- * Structure holds compression header structure and field reserved for future use.\r
- * reserved goes always with udCompHdr in u-plane pkt\r
- * U-plane as per 6.3.2 DL/UL Data\r
- *****************************************************************************/\r
-struct data_section_compression_hdr\r
-{\r
- struct compression_hdr ud_comp_hdr;\r
- uint8_t rsrvd; /**< This parameter provides 1 byte for future definition,\r
- should be set to all zeros by the sender and ignored by the receiver.\r
- This field is only present when udCompHdr is present, and is absent when\r
- the static IQ format and compression method is configured via the M-Plane */\r
-\r
- /* TODO: support for Block Floating Point compression */\r
- /* udCompMeth 0000b = no compression absent*/\r
-};\r
-\r
-/*\r
- ******************************************************************************\r
- * @ingroup xran_up_pkt\r
- *\r
- * @description\r
- * Structure holds the compression parameters by the compression header.\r
- * may not be present by udCompMeth in 6.3.3.13\r
- *****************************************************************************/\r
-union compression_params {\r
- struct block_fl_point {\r
- uint8_t exponent:4;\r
- uint8_t reserved:4;\r
- } blockFlPoint;\r
- struct block_scaling {\r
- uint8_t sblockScaler;\r
- } blockScaling;\r
- struct u_law {\r
- uint8_t compShift:4;\r
- uint8_t compBitWidth:4;\r
- } uLaw;\r
-} __rte_packed;\r
-\r
-\r
-/*\r
- ******************************************************************************\r
- * @ingroup xran_up_pkt\r
- *\r
- * @description\r
- * Structure holds an IQ sample pair\r
- * U-plane as per 6.3.2 DL/UL Data\r
- * Each bit field size is defined with IQ_BITS macro\r
- * Currently supported I and Q sizes are 8 and 16 bits\r
- *****************************************************************************/\r
-struct rb_map\r
-{\r
- int16_t i_sample:IQ_BITS; /**< This parameter is the In-phase sample value */\r
- int16_t q_sample:IQ_BITS; /**< This parameter is the Quadrature sample value */\r
-} __rte_packed;\r
-\r
-/**\r
- ******************************************************************************\r
- * @ingroup xran_common_pkt\r
- *\r
- * @description\r
- * Structure holds complete xran u-plane packet header\r
- * 3.1.1 Ethernet Encapsulation\r
- *****************************************************************************/\r
-struct xran_up_pkt_hdr\r
-{\r
- struct xran_ecpri_hdr ecpri_hdr; /**< eCPRI Transport Header */\r
- struct radio_app_common_hdr app_hdr; /**< eCPRI Transport Header */\r
- struct data_section_hdr data_sec_hdr;\r
-} __rte_packed;\r
-\r
-\r
-/**\r
- ******************************************************************************\r
- * @ingroup xran_common_pkt\r
- *\r
- * @description\r
- * Structure holds complete ethernet and xran u-plane packet header\r
- * 3.1.1 Ethernet Encapsulation\r
- *****************************************************************************/\r
-struct eth_xran_up_pkt_hdr\r
-{\r
- struct ether_hdr eth_hdr;\r
- struct xran_up_pkt_hdr xran_hdr;\r
-}__rte_packed;\r
-\r
-#ifdef __cplusplus\r
-}\r
-#endif\r
-\r
-#endif\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief Definitions and support functions to process XRAN packet
+ * @file xran_pkt_up.h
+ * @ingroup group_source_xran
+ * @author Intel Corporation
+ **/
+
+/**
+ *****************************************************************************
+ * @file xran_pkt_up.h
+ *
+ * @defgroup xran_up_pkt U-Plane XRAN Packet definitions and functions
+ * @ingroup xran
+ *
+ * @description
+ * Structures relevant to U-plane packets only (data now only)
+ *****************************************************************************/
+#ifndef _XRAN_PKT_UP_H_
+#define _XRAN_PKT_UP_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "xran_pkt.h"
+
+#define IQ_PAIR_NUM_IN_RB 12
+#define MAX_DATA_SECTIONS_NUM 273
+#define MAX_IQ_BIT_WIDTH 16
+
+/* currently library supports I and Q sizes of 8 and 16 bits each */
+#define IQ_BITS MAX_IQ_BIT_WIDTH
+
+/*
+ * Structure holding data section header fields
+ * It is repeated for every section ID in xRAN packet
+ */
+
+/**
+ ******************************************************************************
+ * @ingroup xran_up_pkt
+ *
+ * @description
+ * Structure holding data section header fields
+ * It is repeated for every section ID in xRAN packet
+ * 5.4.5 Coding of Information Elements - Application Layer, Sections
+ * for U-plane as per 6.3.2 DL/UL Data
+ *****************************************************************************/
+struct data_section_hdr {
+ union {
+ uint32_t all_bits;
+ struct {
+ uint32_t num_prbu:8; /**< 5.4.5.6 number of contiguous PRBs per control section */
+ uint32_t start_prbu:10; /**< 5.4.5.4 starting PRB of control section */
+ uint32_t sym_inc:1; /**< 5.4.5.3 symbol number increment command XRAN_SYMBOLNUMBER_xxxx */
+ uint32_t rb:1; /**< 5.4.5.2 resource block indicator, XRAN_RBIND_xxx */
+ uint32_t sect_id:12; /**< 5.4.5.1 section identifier */
+ };
+ }fields;
+} __rte_packed;
+
+
+/*
+ ******************************************************************************
+ * @ingroup xran_up_pkt
+ *
+ * @description
+ * Structure holds compression header structure and field reserved for future use.
+ * reserved goes always with udCompHdr in u-plane pkt
+ * U-plane as per 6.3.2 DL/UL Data
+ *****************************************************************************/
+struct data_section_compression_hdr
+{
+ struct compression_hdr ud_comp_hdr;
+ uint8_t rsrvd; /**< This parameter provides 1 byte for future definition,
+ should be set to all zeros by the sender and ignored by the receiver.
+ This field is only present when udCompHdr is present, and is absent when
+ the static IQ format and compression method is configured via the M-Plane */
+
+ /* TODO: support for Block Floating Point compression */
+ /* udCompMeth 0000b = no compression absent*/
+};
+
+/*
+ ******************************************************************************
+ * @ingroup xran_up_pkt
+ *
+ * @description
+ * Structure holds the compression parameters by the compression header.
+ * may not be present by udCompMeth in 6.3.3.13
+ *****************************************************************************/
+union compression_params {
+ struct block_fl_point {
+ uint8_t exponent:4;
+ uint8_t reserved:4;
+ } blockFlPoint;
+ struct block_scaling {
+ uint8_t sblockScaler;
+ } blockScaling;
+ struct u_law {
+ uint8_t compShift:4;
+ uint8_t compBitWidth:4;
+ } uLaw;
+} __rte_packed;
+
+
+/*
+ ******************************************************************************
+ * @ingroup xran_up_pkt
+ *
+ * @description
+ * Structure holds an IQ sample pair
+ * U-plane as per 6.3.2 DL/UL Data
+ * Each bit field size is defined with IQ_BITS macro
+ * Currently supported I and Q sizes are 8 and 16 bits
+ *****************************************************************************/
+struct rb_map
+{
+ int16_t i_sample:IQ_BITS; /**< This parameter is the In-phase sample value */
+ int16_t q_sample:IQ_BITS; /**< This parameter is the Quadrature sample value */
+} __rte_packed;
+
+/**
+ ******************************************************************************
+ * @ingroup xran_common_pkt
+ *
+ * @description
+ * Structure holds complete xran u-plane packet header
+ * 3.1.1 Ethernet Encapsulation
+ *****************************************************************************/
+struct xran_up_pkt_hdr
+{
+ struct xran_ecpri_hdr ecpri_hdr; /**< eCPRI Transport Header */
+ struct radio_app_common_hdr app_hdr; /**< eCPRI Transport Header */
+ struct data_section_hdr data_sec_hdr;
+} __rte_packed;
+
+
+/**
+ ******************************************************************************
+ * @ingroup xran_common_pkt
+ *
+ * @description
+ * Structure holds complete ethernet and xran u-plane packet header
+ * 3.1.1 Ethernet Encapsulation
+ *****************************************************************************/
+struct eth_xran_up_pkt_hdr
+{
+ struct ether_hdr eth_hdr;
+ struct xran_up_pkt_hdr xran_hdr;
+}__rte_packed;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/**\r
- * @brief This file provides interface to synchronization related APIs (PTP/1588)\r
- * for XRAN.\r
- *\r
- * @file xran_sync_api.h\r
- * @ingroup group_lte_source_xran\r
- * @author Intel Corporation\r
- *\r
- **/\r
-\r
-#ifndef _XRAN_SYNC_API_H_\r
-#define _XRAN_SYNC_API_H_\r
-\r
-#ifdef __cplusplus\r
-extern "C" {\r
-#endif\r
-\r
-/**\r
- * @brief Function checks if machine is synchronized using PTP for Linux\r
- * software.\r
- *\r
- * @return int Returns 0 if synchronized, otherwise positive.\r
- */\r
-int xran_is_synchronized(void);\r
-\r
-#ifdef __cplusplus\r
-}\r
-#endif\r
-\r
-#endif /* _XRAN_SYNC_API_H_ */\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief This file provides interface to synchronization related APIs (PTP/1588)
+ * for XRAN.
+ *
+ * @file xran_sync_api.h
+ * @ingroup group_lte_source_xran
+ * @author Intel Corporation
+ *
+ **/
+
+#ifndef _XRAN_SYNC_API_H_
+#define _XRAN_SYNC_API_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Function checks if machine is synchronized using PTP for Linux
+ * software.
+ *
+ * @return int Returns 0 if synchronized, otherwise positive.
+ */
+int xran_is_synchronized(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _XRAN_SYNC_API_H_ */
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/**\r
- * @brief This file provides interface to Timing for XRAN.\r
- *\r
- * @file xran_timer.h\r
- * @ingroup group_lte_source_xran\r
- * @author Intel Corporation\r
- *\r
- **/\r
-\r
-#ifndef _XRAN_TIMER_H\r
-#define _XRAN_TIMER_H\r
-\r
-#ifdef __cplusplus\r
-extern "C" {\r
-#endif\r
-\r
-#include <time.h>\r
-#include <stdio.h>\r
-#include <stdlib.h>\r
-#include <stdint.h>\r
-\r
-#define MSEC_PER_SEC 1000L\r
-\r
-#define XranIncrementSymIdx(sym_idx, numSymPerMs) (((uint32_t)sym_idx >= (((uint32_t)numSymPerMs * MSEC_PER_SEC) - 1)) ? 0 : (uint32_t)sym_idx+1)\r
-#define XranDecrementSymIdx(sym_idx, numSymPerMs) (((uint32_t)sym_idx == 0) ? (((uint32_t)numSymPerMs * MSEC_PER_SEC)) - 1) : (uint32_t)sym_idx-1)\r
-\r
-uint64_t xran_tick(void);\r
-unsigned long get_ticks_diff(unsigned long curr_tick, unsigned long last_tick);\r
-long poll_next_tick(long interval_ns, unsigned long *used_tick);\r
-long sleep_next_tick(long interval);\r
-int timing_set_debug_stop(int value, int count);\r
-int timing_get_debug_stop(void);\r
-inline uint64_t timing_get_current_second(void);\r
-int timing_set_numerology(uint8_t value);\r
-\r
-#ifdef __cplusplus\r
-}\r
-#endif\r
-\r
-#endif\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief This file provides interface to Timing for XRAN.
+ *
+ * @file xran_timer.h
+ * @ingroup group_lte_source_xran
+ * @author Intel Corporation
+ *
+ **/
+
+#ifndef _XRAN_TIMER_H
+#define _XRAN_TIMER_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <time.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+
+#define MSEC_PER_SEC 1000L
+
+#define XranIncrementSymIdx(sym_idx, numSymPerMs) (((uint32_t)sym_idx >= (((uint32_t)numSymPerMs * MSEC_PER_SEC) - 1)) ? 0 : (uint32_t)sym_idx+1)
+#define XranDecrementSymIdx(sym_idx, numSymPerMs) (((uint32_t)sym_idx == 0) ? (((uint32_t)numSymPerMs * MSEC_PER_SEC)) - 1) : (uint32_t)sym_idx-1)
+
+uint64_t xran_tick(void);
+unsigned long get_ticks_diff(unsigned long curr_tick, unsigned long last_tick);
+long poll_next_tick(long interval_ns, unsigned long *used_tick);
+long sleep_next_tick(long interval);
+int timing_set_debug_stop(int value, int count);
+int timing_get_debug_stop(void);
+inline uint64_t timing_get_current_second(void);
+int timing_set_numerology(uint8_t value);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/**\r
- * @brief This file provides the definitions for Transport layer (eCPRI) API.\r
- *\r
- * @file xran_transport.h\r
- * @ingroup group_lte_source_xran\r
- * @author Intel Corporation\r
- *\r
- **/\r
-\r
-#ifndef _XRAN_TRANSPORT_H_\r
-#define _XRAN_TRANSPORT_H_\r
-\r
-#ifdef __cplusplus\r
-extern "C" {\r
-#endif\r
-\r
-#include <rte_common.h>\r
-#include <rte_mbuf.h>\r
-\r
-#include "xran_pkt.h"\r
-\r
-struct xran_eaxc_info {\r
- uint8_t cuPortId;\r
- uint8_t bandSectorId;\r
- uint8_t ccId;\r
- uint8_t ruPortId;\r
-};\r
-\r
-struct xran_recv_packet_info {\r
- int ecpri_version;\r
- enum ecpri_msg_type msg_type;\r
- int payload_len;\r
- struct xran_eaxc_info eaxc;\r
- int seq_id;\r
- int subseq_id;\r
- int ebit;\r
-};\r
-\r
-\r
-int xran_get_ecpri_hdr_size(void);\r
-void xran_update_ecpri_payload_size(struct rte_mbuf *mbuf, int size);\r
-\r
-uint16_t xran_compose_cid(uint8_t CU_Port_ID, uint8_t BandSector_ID, uint8_t CC_ID, uint8_t Ant_ID);\r
-void xran_decompose_cid(uint16_t cid, struct xran_eaxc_info *result);\r
-\r
-int xran_build_ecpri_hdr(struct rte_mbuf *mbuf,\r
- uint8_t CC_ID, uint8_t Ant_ID,\r
- uint8_t seq_id,\r
- struct xran_ecpri_hdr **ecpri_hdr);\r
-\r
-int xran_parse_ecpri_hdr(struct rte_mbuf *mbuf,\r
- struct xran_ecpri_hdr **ecpri_hdr,\r
- struct xran_recv_packet_info *pkt_info);\r
-\r
-#ifdef __cplusplus\r
-}\r
-#endif\r
-\r
-#endif\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief This file provides the definitions for Transport layer (eCPRI) API.
+ *
+ * @file xran_transport.h
+ * @ingroup group_lte_source_xran
+ * @author Intel Corporation
+ *
+ **/
+
+#ifndef _XRAN_TRANSPORT_H_
+#define _XRAN_TRANSPORT_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <rte_common.h>
+#include <rte_mbuf.h>
+
+#include "xran_pkt.h"
+
+struct xran_eaxc_info {
+ uint8_t cuPortId;
+ uint8_t bandSectorId;
+ uint8_t ccId;
+ uint8_t ruPortId;
+};
+
+struct xran_recv_packet_info {
+ int ecpri_version;
+ enum ecpri_msg_type msg_type;
+ int payload_len;
+ struct xran_eaxc_info eaxc;
+ int seq_id;
+ int subseq_id;
+ int ebit;
+};
+
+
+int xran_get_ecpri_hdr_size(void);
+void xran_update_ecpri_payload_size(struct rte_mbuf *mbuf, int size);
+
+uint16_t xran_compose_cid(uint8_t CU_Port_ID, uint8_t BandSector_ID, uint8_t CC_ID, uint8_t Ant_ID);
+void xran_decompose_cid(uint16_t cid, struct xran_eaxc_info *result);
+
+int xran_build_ecpri_hdr(struct rte_mbuf *mbuf,
+ uint8_t CC_ID, uint8_t Ant_ID,
+ uint8_t seq_id,
+ struct xran_ecpri_hdr **ecpri_hdr);
+
+int xran_parse_ecpri_hdr(struct rte_mbuf *mbuf,
+ struct xran_ecpri_hdr **ecpri_hdr,
+ struct xran_recv_packet_info *pkt_info);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/**\r
- * @brief This file provides the definitions for User Plane Messages APIs.\r
- *\r
- * @file xran_up_api.h\r
- * @ingroup group_lte_source_xran\r
- * @author Intel Corporation\r
- *\r
- **/\r
-\r
-#ifndef _XRAN_UP_API_H_\r
-#define _XRAN_UP_API_H_\r
-\r
-#ifdef __cplusplus\r
-extern "C" {\r
-#endif\r
-\r
-#include <rte_common.h>\r
-#include <rte_mbuf.h>\r
-\r
-#include "xran_pkt.h"\r
-#include "xran_pkt_up.h"\r
-\r
-/*\r
- * structure used for storing packet parameters needed for generating\r
- * a data packet\r
- */\r
-struct xran_up_pkt_gen_params\r
-{\r
- struct radio_app_common_hdr app_params;\r
- struct data_section_hdr sec_hdr;\r
- struct data_section_compression_hdr compr_hdr_param;\r
- union compression_params compr_param;\r
-};\r
-\r
-/*\r
- * structure used for storing packet parameters needed for generating\r
- * a data packet without compression\r
- * Next fields are omitted:\r
- * udCompHdr (not always present)\r
- * reserved (not always present)\r
- * udCompParam (not always present)\r
- */\r
-struct xran_up_pkt_gen_no_compression_params\r
-{\r
- struct radio_app_common_hdr app_params;\r
- struct data_section_hdr sec_hdr;\r
-};\r
-\r
-/**\r
- * @brief Function extracts IQ samples from received mbuf packet.\r
- *\r
- * @param mbuf Packet with received data.\r
- * @param iq_data_start Address of the first IQ sample in mbuf will be returned\r
- * here\r
- * @return int Bytes of IQ samples that have been extracted from mbuf.\r
- */\r
-int32_t xran_extract_iq_samples(struct rte_mbuf *mbuf,\r
- void **iq_data_start,\r
- uint8_t *CC_ID,\r
- uint8_t *Ant_ID,\r
- uint8_t *frame_id,\r
- uint8_t *subframe_id,\r
- uint8_t *slot_id,\r
- uint8_t *symb_id,\r
- struct ecpri_seq_id *seq_id,\r
- uint16_t *num_prbu,\r
- uint16_t *start_prbu,\r
- uint16_t *sym_inc,\r
- uint16_t *rb,\r
- uint16_t *sect_id,\r
- int8_t expect_comp,\r
- uint8_t *compMeth,\r
- uint8_t *iqWidth);\r
-\r
-int xran_prepare_iq_symbol_portion(\r
- struct rte_mbuf *mbuf,\r
- const void *iq_data_start,\r
- const enum xran_input_byte_order iq_buf_byte_order,\r
- const uint32_t iq_data_num_bytes,\r
- struct xran_up_pkt_gen_params *params,\r
- uint8_t CC_ID,\r
- uint8_t Ant_ID,\r
- uint8_t seq_id,\r
- uint32_t do_copy);\r
-\r
-#ifdef __cplusplus\r
-}\r
-#endif\r
-\r
-#endif /* _XRAN_UP_API_H_ */\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief This file provides the definitions for User Plane Messages APIs.
+ *
+ * @file xran_up_api.h
+ * @ingroup group_lte_source_xran
+ * @author Intel Corporation
+ *
+ **/
+
+#ifndef _XRAN_UP_API_H_
+#define _XRAN_UP_API_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <rte_common.h>
+#include <rte_mbuf.h>
+
+#include "xran_pkt.h"
+#include "xran_pkt_up.h"
+
+/*
+ * structure used for storing packet parameters needed for generating
+ * a data packet
+ */
+struct xran_up_pkt_gen_params
+{
+ struct radio_app_common_hdr app_params;
+ struct data_section_hdr sec_hdr;
+ struct data_section_compression_hdr compr_hdr_param;
+ union compression_params compr_param;
+};
+
+/*
+ * structure used for storing packet parameters needed for generating
+ * a data packet without compression
+ * Next fields are omitted:
+ * udCompHdr (not always present)
+ * reserved (not always present)
+ * udCompParam (not always present)
+ */
+struct xran_up_pkt_gen_no_compression_params
+{
+ struct radio_app_common_hdr app_params;
+ struct data_section_hdr sec_hdr;
+};
+
+/**
+ * @brief Function extracts IQ samples from received mbuf packet.
+ *
+ * @param mbuf Packet with received data.
+ * @param iq_data_start Address of the first IQ sample in mbuf will be returned
+ * here
+ * @return int Bytes of IQ samples that have been extracted from mbuf.
+ */
+int32_t xran_extract_iq_samples(struct rte_mbuf *mbuf,
+ void **iq_data_start,
+ uint8_t *CC_ID,
+ uint8_t *Ant_ID,
+ uint8_t *frame_id,
+ uint8_t *subframe_id,
+ uint8_t *slot_id,
+ uint8_t *symb_id,
+ struct ecpri_seq_id *seq_id,
+ uint16_t *num_prbu,
+ uint16_t *start_prbu,
+ uint16_t *sym_inc,
+ uint16_t *rb,
+ uint16_t *sect_id,
+ int8_t expect_comp,
+ uint8_t *compMeth,
+ uint8_t *iqWidth);
+
+int xran_prepare_iq_symbol_portion(
+ struct rte_mbuf *mbuf,
+ const void *iq_data_start,
+ const enum xran_input_byte_order iq_buf_byte_order,
+ const uint32_t iq_data_num_bytes,
+ struct xran_up_pkt_gen_params *params,
+ uint8_t CC_ID,
+ uint8_t Ant_ID,
+ uint8_t seq_id,
+ uint32_t do_copy);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _XRAN_UP_API_H_ */
+++ /dev/null
-#!/bin/bash
-#/******************************************************************************
-#*
-#* Copyright (c) 2019 Intel.
-#*
-#* Licensed under the Apache License, Version 2.0 (the "License");
-#* you may not use this file except in compliance with the License.
-#* You may obtain a copy of the License at
-#*
-#* http://www.apache.org/licenses/LICENSE-2.0
-#*
-#* Unless required by applicable law or agreed to in writing, software
-#* distributed under the License is distributed on an "AS IS" BASIS,
-#* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-#* See the License for the specific language governing permissions and
-#* limitations under the License.
-#*
-#*******************************************************************************/
-#
-# Please see example_odu_fhi_lib_build.txt to find how to set up the global variables used by this script
-# and the fhi_lib makefile
-
-XRAN_FH_LIB_DIR=$XRAN_DIR/lib
-XRAN_FH_APP_DIR=$XRAN_DIR/app
-XRAN_FH_TEST_DIR=$XRAN_DIR/test/test_xran
-LIBXRANSO=0
-MLOG=0
-COMMAND_LINE=
-
-echo Number of commandline arguments: $#
-while [[ $# -ne 0 ]]
-do
-key="$1"
-
-#echo Parsing: $key
-case $key in
- LIBXRANSO)
- LIBXRANSO=1
- ;;
- MLOG)
- MLOG=1
- ;;
- xclean)
- COMMAND_LINE+=$key
- COMMAND_LINE+=" "
- ;;
- *)
- echo $key is unknown command # unknown option
- ;;
-esac
-shift # past argument or value
-done
-
-if [ -z "$MLOG_DIR" ]
-then
- echo 'MLOG folder is not set. Disable MLOG (MLOG_DIR='$MLOG_DIR')'
- MLOG=0
-else
- echo 'MLOG folder is set. Enable MLOG (MLOG_DIR='$MLOG_DIR')'
- MLOG=1
-fi
-
-echo 'Building xRAN Library'
-echo "LIBXRANSO = ${LIBXRANSO}"
-echo "MLOG = ${MLOG}"
-
-cd $XRAN_FH_LIB_DIR
-make $COMMAND_LINE MLOG=${MLOG} LIBXRANSO=${LIBXRANSO} #DEBUG=1 VERBOSE=1
-
-#echo 'Building xRAN Test Application'
-#cd $XRAN_FH_APP_DIR
-#make $COMMAND_LINE MLOG=${MLOG} #DEBUG=1 VERBOSE=1
-
-#if [ -z ${GTEST_ROOT+x} ];
-#then
-# echo "GTEST_ROOT is not set. Unit tests are not compiled";
-#else
-# echo 'Building xRAN Test Application ('$GTEST_ROOT')'
-# cd $XRAN_FH_TEST_DIR
-# make clean;
-# make
-#fi
-
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/**\r
- * @brief This file has all definitions for the Ethernet Data Interface Layer\r
- * @file ethdi.c\r
- * @ingroup group_lte_source_auxlib\r
- * @author Intel Corporation\r
- **/\r
-\r
-#define _GNU_SOURCE\r
-#include <stdio.h>\r
-#include <string.h>\r
-#include <stdint.h>\r
-#include <errno.h>\r
-#include <sys/queue.h>\r
-#include <err.h>\r
-#include <assert.h>\r
-#include <linux/limits.h>\r
-#include <sys/types.h>\r
-#include <stdlib.h>\r
-#include <sys/time.h>\r
-#include <time.h>\r
-#include <unistd.h>\r
-\r
-#include <rte_config.h>\r
-#include <rte_common.h>\r
-#include <rte_log.h>\r
-#include <rte_memory.h>\r
-#include <rte_memcpy.h>\r
-#include <rte_memzone.h>\r
-#include <rte_eal.h>\r
-#include <rte_per_lcore.h>\r
-#include <rte_launch.h>\r
-#include <rte_atomic.h>\r
-#include <rte_cycles.h>\r
-#include <rte_prefetch.h>\r
-#include <rte_lcore.h>\r
-#include <rte_per_lcore.h>\r
-#include <rte_branch_prediction.h>\r
-#include <rte_interrupts.h>\r
-#include <rte_pci.h>\r
-#include <rte_debug.h>\r
-#include <rte_ethdev.h>\r
-#include <rte_ring.h>\r
-#include <rte_mbuf.h>\r
-#include <rte_timer.h>\r
-\r
-#include "ethernet.h"\r
-#include "ethdi.h"\r
-#include "xran_fh_o_du.h"\r
-#include "xran_mlog_lnx.h"\r
-#include "xran_printf.h"\r
-\r
-#include "../src/xran_lib_mlog_tasks_id.h"\r
-\r
-#define BURST_RX_IO_SIZE 48\r
-\r
-struct xran_ethdi_ctx g_ethdi_ctx = { 0 };\r
-enum xran_if_state xran_if_current_state = XRAN_STOPPED;\r
-\r
-struct rte_mbuf *xran_ethdi_mbuf_alloc(void)\r
-{\r
- return rte_pktmbuf_alloc(_eth_mbuf_pool);\r
-}\r
-\r
-int xran_ethdi_mbuf_send(struct rte_mbuf *mb, uint16_t ethertype)\r
-{\r
- struct xran_ethdi_ctx *ctx = xran_ethdi_get_ctx();\r
- int res = 0;\r
-\r
- mb->port = ctx->io_cfg.port[ETHDI_UP_VF];\r
- xran_add_eth_hdr_vlan(&ctx->entities[ID_RU], ethertype, mb, ctx->up_vtag);\r
-\r
- res = xran_enqueue_mbuf(mb, ctx->tx_ring[ETHDI_UP_VF]);\r
- return res;\r
-}\r
-\r
-int xran_ethdi_mbuf_send_cp(struct rte_mbuf *mb, uint16_t ethertype)\r
-{\r
- struct xran_ethdi_ctx *ctx = xran_ethdi_get_ctx();\r
- int res = 0;\r
-\r
- mb->port = ctx->io_cfg.port[ETHDI_CP_VF];\r
- xran_add_eth_hdr_vlan(&ctx->entities[ID_RU], ethertype, mb, ctx->cp_vtag);\r
-\r
- res = xran_enqueue_mbuf(mb, ctx->tx_ring[ETHDI_CP_VF]);\r
- return res;\r
-}\r
-#if 0\r
-void xran_ethdi_stop_tx()\r
-{\r
- struct xran_ethdi_ctx *const ctx = xran_ethdi_get_ctx();\r
- rte_timer_stop_sync(&ctx->timer_tx);\r
-}\r
-#endif\r
-\r
-struct {\r
- uint16_t ethertype;\r
- ethertype_handler fn;\r
-} xran_ethertype_handlers[] = {\r
- { ETHER_TYPE_ETHDI, NULL },\r
- { ETHER_TYPE_ECPRI, NULL },\r
- { ETHER_TYPE_START_TX, NULL }\r
-};\r
-\r
-\r
-\r
-int xran_register_ethertype_handler(uint16_t ethertype, ethertype_handler callback)\r
-{\r
- int i;\r
-\r
- for (i = 0; i < RTE_DIM(xran_ethertype_handlers); ++i)\r
- if (xran_ethertype_handlers[i].ethertype == ethertype) {\r
- xran_ethertype_handlers[i].fn = callback;\r
-\r
- return 1;\r
- }\r
-\r
- elog("support for ethertype %u not found", ethertype);\r
-\r
- return 0;\r
-}\r
-\r
-int xran_handle_ether(uint16_t ethertype, struct rte_mbuf *pkt, uint64_t rx_time)\r
-{\r
- int i;\r
-\r
- for (i = 0; i < RTE_DIM(xran_ethertype_handlers); ++i)\r
- if (xran_ethertype_handlers[i].ethertype == ethertype)\r
- if (xran_ethertype_handlers[i].fn)\r
- return xran_ethertype_handlers[i].fn(pkt, rx_time);\r
-\r
- wlog("Packet with unrecognized ethertype '%.4X' dropped", ethertype);\r
-\r
- return 0;\r
-};\r
-\r
-\r
-/* Process vlan tag. Cut the ethernet header. Call the etherype handlers. */\r
-int xran_ethdi_filter_packet(struct rte_mbuf *pkt, uint64_t rx_time)\r
-{\r
- struct xran_ethdi_ctx *ctx = xran_ethdi_get_ctx();\r
-\r
-#ifdef VLAN_SUPPORT\r
- if (rte_vlan_strip(pkt) == 0) {\r
- if (pkt->vlan_tci == ctx->cp_vtag) {\r
- dlog("VLAN tci matches %d", pkt->vlan_tci);\r
- } else {\r
- wlog("packet with wrong VLAN tag %d, dropping",\r
- pkt->vlan_tci);\r
- return 0;\r
- }\r
- } else\r
- dlog("Packet not vlan tagged");\r
-#endif\r
-\r
- const struct ether_hdr *eth_hdr = rte_pktmbuf_mtod(pkt, void *);\r
-\r
-#if defined(DPDKIO_DEBUG) && DPDKIO_DEBUG > 1\r
- nlog("*** processing RX'ed packet of size %d ***",\r
- rte_pktmbuf_data_len(pkt));\r
- /* TODO: just dump ethernet header in readable format? */\r
-#endif\r
-\r
-#if defined(DPDKIO_DEBUG) && DPDKIO_DEBUG > 1\r
- {\r
- char dst[ETHER_ADDR_FMT_SIZE] = "(empty)";\r
- char src[ETHER_ADDR_FMT_SIZE] = "(empty)";\r
-\r
- ether_format_addr(dst, sizeof(dst), ð_hdr->d_addr);\r
- ether_format_addr(src, sizeof(src), ð_hdr->s_addr);\r
- nlog("src: %s dst: %s ethertype: %.4X", dst, src,\r
- rte_be_to_cpu_16(eth_hdr->ether_type));\r
- }\r
-#endif\r
-\r
- /* Cut out the ethernet header. It's not needed anymore. */\r
- if (rte_pktmbuf_adj(pkt, sizeof(*eth_hdr)) == NULL) {\r
- wlog("Packet too short, dropping");\r
- return 0;\r
- }\r
-\r
-\r
- return xran_handle_ether(rte_be_to_cpu_16(eth_hdr->ether_type), pkt, rx_time);\r
-}\r
-\r
-#if 0\r
-//-------------------------------------------------------------------------------------------\r
-/** @ingroup xran\r
- *\r
- * @param[in] port - DPDK ETH port id\r
- *\r
- * @return void\r
- *\r
- * @description\r
- * Prints statistics of usage of DPDK port\r
- *\r
-**/\r
-//-------------------------------------------------------------------------------------------\r
-void xran_ethdi_ports_stats(void)\r
-{\r
- struct rte_eth_stats stats;\r
- struct xran_ethdi_ctx *ctx = xran_ethdi_get_ctx();\r
- int32_t i = 0;\r
-\r
- for(i = 0; i < ETHDI_VF_MAX; i++){\r
- /* Get stats (extended stats includes common stats) */\r
- rte_eth_stats_get(ctx->io_cfg.port[i], &stats);\r
- printf("DPDK stats:\n");\r
- printf("** Port %hhu **\n", ctx->io_cfg.port[i]);\r
- printf("ierrors:\t%lu\n", stats.ierrors);\r
- printf("oerrors:\t%lu\n", stats.oerrors);\r
- printf("ipackets:\t%lu\n", stats.ipackets);\r
- printf("opackets:\t%lu\n", stats.opackets);\r
- printf("imissed:\t%lu\n", stats.imissed);\r
- printf("rx_nombuf:\t%lu\n", stats.rx_nombuf);\r
- }\r
- return ;\r
-}\r
-#endif\r
-/* Check the link status of all ports in up to 9s, and print them finally */\r
-static void check_port_link_status(uint8_t portid)\r
-{\r
-#define CHECK_INTERVAL 100 /* 100ms */\r
-#define MAX_CHECK_TIME 90 /* 9s (90 * 100ms) in total */\r
- uint8_t count, all_ports_up, print_flag = 0;\r
- struct rte_eth_link link;\r
-\r
- printf("\nChecking link status");\r
- fflush(stdout);\r
- for (count = 0; count <= MAX_CHECK_TIME; count++) {\r
- all_ports_up = 1;\r
- memset(&link, 0, sizeof(link));\r
- rte_eth_link_get_nowait(portid, &link);\r
-\r
- /* print link status if flag set */\r
- if (print_flag == 1) {\r
- if (link.link_status)\r
- printf("Port %d Link Up - speed %u "\r
- "Mbps - %s\n", (uint8_t)portid,\r
- (unsigned)link.link_speed,\r
- (link.link_duplex == ETH_LINK_FULL_DUPLEX) ?\r
- ("full-duplex") : ("half-duplex\n"));\r
- else\r
- printf("Port %d Link Down\n",\r
- (uint8_t)portid);\r
- }\r
- /* clear all_ports_up flag if any link down */\r
- if (link.link_status == ETH_LINK_DOWN) {\r
- all_ports_up = 0;\r
- break;\r
- }\r
- /* after finally printing all link status, get out */\r
- if (print_flag == 1)\r
- break;\r
-\r
- if (all_ports_up == 0) {\r
- printf(".");\r
- fflush(stdout);\r
- rte_delay_ms(CHECK_INTERVAL);\r
- }\r
-\r
- /* set the print_flag if all ports up or timeout */\r
- if (all_ports_up == 1 || count == (MAX_CHECK_TIME - 1)) {\r
- print_flag = 1;\r
- printf(" ... done\n");\r
- }\r
- }\r
-}\r
-\r
-\r
-int xran_ethdi_init_dpdk_io(char *name, const struct xran_io_loop_cfg *io_cfg,\r
- int *lcore_id, struct ether_addr *p_lls_cu_addr, struct ether_addr *p_ru_addr,\r
- uint16_t cp_vlan, uint16_t up_vlan)\r
-{\r
- uint16_t port[2] = {0xffff, 0xffff};\r
- struct xran_ethdi_ctx *ctx = xran_ethdi_get_ctx();\r
- int i;\r
- char core_mask[64];\r
- long c_mask=0;\r
- char bbdev_wdev[32] = "";\r
- char bbdev_vdev[32] = "";\r
-\r
- char *argv[] = { name, /*"-c 0xFFFFF00000FFFFF"*/core_mask, "-n2", "--socket-mem=8192", "--proc-type=auto",\r
- "--file-prefix", name, "-w", "0000:00:00.0", bbdev_wdev, bbdev_vdev};\r
-\r
- if (io_cfg == NULL)\r
- return 0;\r
- if(io_cfg->bbdev_mode != XRAN_BBDEV_NOT_USED){\r
- printf("BBDEV_FEC_ACCL_NR5G\n");\r
- if (io_cfg->bbdev_mode == XRAN_BBDEV_MODE_HW_ON){\r
- // hw-accelerated bbdev\r
- printf("hw-accelerated bbdev %s\n", io_cfg->bbdev_dev[0]);\r
- snprintf(bbdev_wdev, sizeof(bbdev_wdev), "-w %s", io_cfg->bbdev_dev[0]);\r
- } else if (io_cfg->bbdev_mode == XRAN_BBDEV_MODE_HW_OFF){\r
- // hw-accelerated bbdev disable\r
- if(io_cfg->bbdev_dev[0]){\r
- printf("hw-accelerated bbdev disable %s\n", io_cfg->bbdev_dev[0]);\r
- snprintf(bbdev_wdev, sizeof(bbdev_wdev), "-b %s", io_cfg->bbdev_dev[0]);\r
- }\r
- snprintf(bbdev_wdev, sizeof(bbdev_wdev), "%s", "--vdev=baseband_turbo_sw");\r
- } else {\r
- rte_panic("Cannot init DPDK incorrect [bbdev_mode %d]\n", io_cfg->bbdev_mode);\r
- }\r
- }\r
-\r
- c_mask = (long)(1L << io_cfg->core) |\r
- (long)(1L << io_cfg->system_core) |\r
- (long)(1L << io_cfg->pkt_proc_core) |\r
- (long)(1L << io_cfg->pkt_aux_core) |\r
- (long)(1L << io_cfg->timing_core);\r
-\r
- printf("c_mask 0x%lx core %d system_core %d pkt_proc_core %d pkt_aux_core %d timing_core %d\n",\r
- c_mask, io_cfg->core, io_cfg->system_core, io_cfg->pkt_proc_core, io_cfg->pkt_aux_core, io_cfg->timing_core);\r
-\r
- snprintf(core_mask, sizeof(core_mask), "-c 0x%lx", c_mask);\r
-\r
- ctx->io_cfg = *io_cfg;\r
- ctx->ping_state = PING_IDLE;\r
- ctx->known_peers = 1;\r
- ctx->busy_poll_till = rte_rdtsc();\r
- ctx->cp_vtag = cp_vlan;\r
- ctx->up_vtag = up_vlan;\r
-\r
- for (i = 0; i <= ID_BROADCAST; i++) /* Initialize all as broadcast */\r
- memset(&ctx->entities[i], 0xFF, sizeof(ctx->entities[0]));\r
-\r
- printf("%s: Calling rte_eal_init:", __FUNCTION__);\r
- for (i = 0; i < RTE_DIM(argv); i++)\r
- {\r
- printf("%s ", argv[i]);\r
- }\r
- printf("\n");\r
-\r
-\r
- /* This will return on system_core, which is not necessarily the\r
- * one we're on right now. */\r
- if (rte_eal_init(RTE_DIM(argv), argv) < 0)\r
- rte_panic("Cannot init EAL: %s\n", rte_strerror(rte_errno));\r
-\r
- xran_init_mbuf_pool();\r
-\r
-#ifdef RTE_LIBRTE_PDUMP\r
- /* initialize packet capture framework */\r
- rte_pdump_init(NULL);\r
-#endif\r
-\r
- /* Timers. */\r
- rte_timer_subsystem_init();\r
- rte_timer_init(&ctx->timer_ping);\r
- rte_timer_init(&ctx->timer_sync);\r
- rte_timer_init(&ctx->timer_tx);\r
-\r
- *lcore_id = rte_get_next_lcore(rte_lcore_id(), 0, 0);\r
-\r
- PANIC_ON(*lcore_id == RTE_MAX_LCORE, "out of lcores for io_loop()");\r
-\r
- if (rte_eal_process_type() == RTE_PROC_PRIMARY) {\r
- for (i = 0; i < ETHDI_VF_MAX; i ++){\r
- if(io_cfg->dpdk_dev[i]){\r
- if (rte_eth_dev_attach(io_cfg->dpdk_dev[i], &port[i]) != 0 ||\r
- rte_eth_dev_count_avail() == 0)\r
- errx(1, "Network port doesn't exist.");\r
- xran_init_port(port[i], p_lls_cu_addr);\r
- } else {\r
- printf("no DPDK port provided\n");\r
- }\r
- if(i==0){\r
- ctx->tx_ring[i] = rte_ring_create("tx_ring_up", NUM_MBUFS,\r
- rte_lcore_to_socket_id(*lcore_id), RING_F_SC_DEQ);\r
- ctx->rx_ring[i] = rte_ring_create("rx_ring_up", NUM_MBUFS,\r
- rte_lcore_to_socket_id(*lcore_id), RING_F_SC_DEQ);\r
- ctx->pkt_dump_ring[i] = rte_ring_create("pkt_dump_ring_up", NUM_MBUFS,\r
- rte_lcore_to_socket_id(*lcore_id), RING_F_SC_DEQ);\r
- }else {\r
- ctx->tx_ring[i] = rte_ring_create("tx_ring_cp", NUM_MBUFS,\r
- rte_lcore_to_socket_id(*lcore_id), RING_F_SC_DEQ);\r
- ctx->rx_ring[i] = rte_ring_create("rx_ring_cp", NUM_MBUFS,\r
- rte_lcore_to_socket_id(*lcore_id), RING_F_SC_DEQ);\r
- ctx->pkt_dump_ring[i] = rte_ring_create("pkt_dump_ring_cp", NUM_MBUFS,\r
- rte_lcore_to_socket_id(*lcore_id), RING_F_SC_DEQ);\r
- }\r
- if(io_cfg->dpdk_dev[i])\r
- check_port_link_status(port[i]);\r
- }\r
- } else {\r
- rte_panic("ethdi_dpdk_io_loop() failed to start with RTE_PROC_SECONDARY\n");\r
- }\r
- PANIC_ON(ctx->tx_ring == NULL, "failed to allocate tx ring");\r
- PANIC_ON(ctx->rx_ring == NULL, "failed to allocate rx ring");\r
- PANIC_ON(ctx->pkt_dump_ring == NULL, "failed to allocate pkt dumping ring");\r
- for (i = 0; i < ETHDI_VF_MAX; i++){\r
- ctx->io_cfg.port[i] = port[i];\r
- print_dbg("port_id 0x%04x\n", ctx->io_cfg.port[i]);\r
- }\r
-\r
- if(io_cfg->dpdk_dev[ETHDI_UP_VF]){\r
- rte_eth_macaddr_get(port[ETHDI_UP_VF], &ctx->entities[io_cfg->id]);\r
- ether_addr_copy(p_ru_addr, &ctx->entities[ID_RU]);\r
- }\r
-\r
- return 1;\r
-}\r
-\r
-static inline uint16_t xran_tx_from_ring(int port, struct rte_ring *r)\r
-{\r
- struct rte_mbuf *mbufs[BURST_SIZE];\r
- uint16_t dequeued, sent = 0;\r
- uint32_t remaining;\r
- int i;\r
- long t1 = MLogTick();\r
-\r
- dequeued = rte_ring_dequeue_burst(r, (void **)mbufs, BURST_SIZE,\r
- &remaining);\r
- if (!dequeued)\r
- return 0; /* Nothing to send. */\r
-\r
- while (1) { /* When tx queue is full it is trying again till succeed */\r
- t1 = MLogTick();\r
- sent += rte_eth_tx_burst(port, 0, &mbufs[sent], dequeued - sent);\r
-\r
- MLogTask(PID_RADIO_ETH_TX_BURST, t1, MLogTick());\r
-\r
- if (sent == dequeued)\r
- return remaining;\r
- }\r
-}\r
-\r
-int32_t process_dpdk_io(void)\r
-{\r
- struct xran_ethdi_ctx *ctx = xran_ethdi_get_ctx();\r
- const struct xran_io_loop_cfg *const cfg = &(xran_ethdi_get_ctx()->io_cfg);\r
- const int port[ETHDI_VF_MAX] = {cfg->port[ETHDI_UP_VF], cfg->port[ETHDI_CP_VF]};\r
- int port_id = 0;\r
-\r
- for (port_id = 0; port_id < ETHDI_VF_MAX; port_id++){\r
- struct rte_mbuf *mbufs[BURST_RX_IO_SIZE];\r
- if(port[port_id] == 0xFF)\r
- return 0;\r
- /* RX */\r
- const uint16_t rxed = rte_eth_rx_burst(port[port_id], 0, mbufs, BURST_RX_IO_SIZE);\r
- if (rxed != 0){\r
- unsigned enq_n = 0;\r
- long t1 = MLogTick();\r
- enq_n = rte_ring_enqueue_burst(ctx->rx_ring[port_id], (void*)mbufs, rxed, NULL);\r
- if(rxed - enq_n)\r
- rte_panic("error enq\n");\r
- MLogTask(PID_RADIO_RX_VALIDATE, t1, MLogTick());\r
- }\r
-\r
- /* TX */\r
- const uint16_t sent = xran_tx_from_ring(port[port_id], ctx->tx_ring[port_id]);\r
-\r
- if (XRAN_STOPPED == xran_if_current_state)\r
- return -1;\r
- }\r
-\r
- if (XRAN_STOPPED == xran_if_current_state)\r
- return -1;\r
-\r
- return 0;\r
-}\r
-\r
-#if 0\r
-static inline void xran_process_rx_burst(struct rte_mbuf *mbufs[], uint16_t n_mbufs,\r
- uint64_t rx_time)\r
-{\r
- int i;\r
-\r
- if (!n_mbufs)\r
- return;\r
-\r
- for (i = 0; i < n_mbufs; ++i)\r
- {\r
- if (xran_ethdi_filter_packet(mbufs[i], rx_time) == MBUF_FREE)\r
- rte_pktmbuf_free(mbufs[i]);\r
- }\r
-\r
-#ifdef DPDKIO_LATENCY_DEBUG\r
- struct timeval tv_now, tv_diff;\r
-\r
- gettimeofday(&tv_now, NULL);\r
- if (n_mbufs > 1)\r
- nlog("Warning - received %d mbufs in a row", n_mbufs);\r
-\r
- timersub(&tv_now, &rx_time, &tv_diff);\r
- nlog("rx processing took %d usec", tv_diff.tv_usec);\r
-#endif\r
-}\r
-\r
-/*\r
- * This is the main DPDK-IO loop.\r
- * This will sleep if there's no packets incoming and there's\r
- * no work enqueued, sleep lenth is defined in IDLE_SLEEP_MICROSECS\r
- */\r
-int xran_ethdi_dpdk_io_loop(void *io_loop_cfg)\r
-{\r
- struct sched_param sched_param;\r
- int res = 0;\r
- struct xran_ethdi_ctx *ctx = xran_ethdi_get_ctx();\r
- const struct xran_io_loop_cfg *const cfg = &(xran_ethdi_get_ctx()->io_cfg);\r
- const int port[ETHDI_VF_MAX] = {cfg->port[ETHDI_UP_VF], cfg->port[ETHDI_CP_VF]};\r
-\r
- printf("%s [PORT: %d %d] [CPU %2d] [PID: %6d]\n", __FUNCTION__, port[ETHDI_UP_VF], port[ETHDI_CP_VF] , rte_lcore_id(), getpid());\r
-\r
- printf("%s [CPU %2d] [PID: %6d]\n", __FUNCTION__, rte_lcore_id(), getpid());\r
- sched_param.sched_priority = XRAN_THREAD_DEFAULT_PRIO;\r
- if ((res = pthread_setschedparam(pthread_self(), SCHED_FIFO, &sched_param))) {\r
- printf("priority is not changed: coreId = %d, result1 = %d\n",rte_lcore_id(), res);\r
- }\r
-\r
- for (;;){\r
- if(process_dpdk_io()!=0)\r
- break;\r
- }\r
-\r
- fflush(stderr);\r
- fflush(stdout);\r
- puts("IO loop finished");\r
-\r
- return 0;\r
-}\r
-#endif\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief This file has all definitions for the Ethernet Data Interface Layer
+ * @file ethdi.c
+ * @ingroup group_lte_source_auxlib
+ * @author Intel Corporation
+ **/
+
+#define _GNU_SOURCE
+#include <stdio.h>
+#include <string.h>
+#include <stdint.h>
+#include <errno.h>
+#include <sys/queue.h>
+#include <err.h>
+#include <assert.h>
+#include <linux/limits.h>
+#include <sys/types.h>
+#include <stdlib.h>
+#include <sys/time.h>
+#include <time.h>
+#include <unistd.h>
+
+#include <rte_config.h>
+#include <rte_common.h>
+#include <rte_log.h>
+#include <rte_memory.h>
+#include <rte_memcpy.h>
+#include <rte_memzone.h>
+#include <rte_eal.h>
+#include <rte_per_lcore.h>
+#include <rte_launch.h>
+#include <rte_atomic.h>
+#include <rte_cycles.h>
+#include <rte_prefetch.h>
+#include <rte_lcore.h>
+#include <rte_per_lcore.h>
+#include <rte_branch_prediction.h>
+#include <rte_interrupts.h>
+#include <rte_pci.h>
+#include <rte_debug.h>
+#include <rte_ethdev.h>
+#include <rte_ring.h>
+#include <rte_mbuf.h>
+#include <rte_timer.h>
+
+#include "ethernet.h"
+#include "ethdi.h"
+#include "xran_fh_o_du.h"
+#include "xran_mlog_lnx.h"
+#include "xran_printf.h"
+
+#include "../src/xran_lib_mlog_tasks_id.h"
+
+#define BURST_RX_IO_SIZE 48
+
+struct xran_ethdi_ctx g_ethdi_ctx = { 0 };
+enum xran_if_state xran_if_current_state = XRAN_STOPPED;
+
+struct rte_mbuf *xran_ethdi_mbuf_alloc(void)
+{
+ return rte_pktmbuf_alloc(_eth_mbuf_pool);
+}
+
+int xran_ethdi_mbuf_send(struct rte_mbuf *mb, uint16_t ethertype)
+{
+ struct xran_ethdi_ctx *ctx = xran_ethdi_get_ctx();
+ int res = 0;
+
+ mb->port = ctx->io_cfg.port[ETHDI_UP_VF];
+ xran_add_eth_hdr_vlan(&ctx->entities[ID_RU], ethertype, mb, ctx->up_vtag);
+
+ res = xran_enqueue_mbuf(mb, ctx->tx_ring[ETHDI_UP_VF]);
+ return res;
+}
+
+int xran_ethdi_mbuf_send_cp(struct rte_mbuf *mb, uint16_t ethertype)
+{
+ struct xran_ethdi_ctx *ctx = xran_ethdi_get_ctx();
+ int res = 0;
+
+ mb->port = ctx->io_cfg.port[ETHDI_CP_VF];
+ xran_add_eth_hdr_vlan(&ctx->entities[ID_RU], ethertype, mb, ctx->cp_vtag);
+
+ res = xran_enqueue_mbuf(mb, ctx->tx_ring[ETHDI_CP_VF]);
+ return res;
+}
+#if 0
+void xran_ethdi_stop_tx()
+{
+ struct xran_ethdi_ctx *const ctx = xran_ethdi_get_ctx();
+ rte_timer_stop_sync(&ctx->timer_tx);
+}
+#endif
+
+struct {
+ uint16_t ethertype;
+ ethertype_handler fn;
+} xran_ethertype_handlers[] = {
+ { ETHER_TYPE_ETHDI, NULL },
+ { ETHER_TYPE_ECPRI, NULL },
+ { ETHER_TYPE_START_TX, NULL }
+};
+
+
+
+int xran_register_ethertype_handler(uint16_t ethertype, ethertype_handler callback)
+{
+ int i;
+
+ for (i = 0; i < RTE_DIM(xran_ethertype_handlers); ++i)
+ if (xran_ethertype_handlers[i].ethertype == ethertype) {
+ xran_ethertype_handlers[i].fn = callback;
+
+ return 1;
+ }
+
+ elog("support for ethertype %u not found", ethertype);
+
+ return 0;
+}
+
+int xran_handle_ether(uint16_t ethertype, struct rte_mbuf *pkt, uint64_t rx_time)
+{
+ int i;
+
+ for (i = 0; i < RTE_DIM(xran_ethertype_handlers); ++i)
+ if (xran_ethertype_handlers[i].ethertype == ethertype)
+ if (xran_ethertype_handlers[i].fn)
+ return xran_ethertype_handlers[i].fn(pkt, rx_time);
+
+ wlog("Packet with unrecognized ethertype '%.4X' dropped", ethertype);
+
+ return 0;
+};
+
+
+/* Process vlan tag. Cut the ethernet header. Call the etherype handlers. */
+int xran_ethdi_filter_packet(struct rte_mbuf *pkt, uint64_t rx_time)
+{
+ struct xran_ethdi_ctx *ctx = xran_ethdi_get_ctx();
+
+#ifdef VLAN_SUPPORT
+ if (rte_vlan_strip(pkt) == 0) {
+ if (pkt->vlan_tci == ctx->cp_vtag) {
+ dlog("VLAN tci matches %d", pkt->vlan_tci);
+ } else {
+ wlog("packet with wrong VLAN tag %d, dropping",
+ pkt->vlan_tci);
+ return 0;
+ }
+ } else
+ dlog("Packet not vlan tagged");
+#endif
+
+ const struct ether_hdr *eth_hdr = rte_pktmbuf_mtod(pkt, void *);
+
+#if defined(DPDKIO_DEBUG) && DPDKIO_DEBUG > 1
+ nlog("*** processing RX'ed packet of size %d ***",
+ rte_pktmbuf_data_len(pkt));
+ /* TODO: just dump ethernet header in readable format? */
+#endif
+
+#if defined(DPDKIO_DEBUG) && DPDKIO_DEBUG > 1
+ {
+ char dst[ETHER_ADDR_FMT_SIZE] = "(empty)";
+ char src[ETHER_ADDR_FMT_SIZE] = "(empty)";
+
+ ether_format_addr(dst, sizeof(dst), ð_hdr->d_addr);
+ ether_format_addr(src, sizeof(src), ð_hdr->s_addr);
+ nlog("src: %s dst: %s ethertype: %.4X", dst, src,
+ rte_be_to_cpu_16(eth_hdr->ether_type));
+ }
+#endif
+
+ /* Cut out the ethernet header. It's not needed anymore. */
+ if (rte_pktmbuf_adj(pkt, sizeof(*eth_hdr)) == NULL) {
+ wlog("Packet too short, dropping");
+ return 0;
+ }
+
+
+ return xran_handle_ether(rte_be_to_cpu_16(eth_hdr->ether_type), pkt, rx_time);
+}
+
+#if 0
+//-------------------------------------------------------------------------------------------
+/** @ingroup xran
+ *
+ * @param[in] port - DPDK ETH port id
+ *
+ * @return void
+ *
+ * @description
+ * Prints statistics of usage of DPDK port
+ *
+**/
+//-------------------------------------------------------------------------------------------
+void xran_ethdi_ports_stats(void)
+{
+ struct rte_eth_stats stats;
+ struct xran_ethdi_ctx *ctx = xran_ethdi_get_ctx();
+ int32_t i = 0;
+
+ for(i = 0; i < ETHDI_VF_MAX; i++){
+ /* Get stats (extended stats includes common stats) */
+ rte_eth_stats_get(ctx->io_cfg.port[i], &stats);
+ printf("DPDK stats:\n");
+ printf("** Port %hhu **\n", ctx->io_cfg.port[i]);
+ printf("ierrors:\t%lu\n", stats.ierrors);
+ printf("oerrors:\t%lu\n", stats.oerrors);
+ printf("ipackets:\t%lu\n", stats.ipackets);
+ printf("opackets:\t%lu\n", stats.opackets);
+ printf("imissed:\t%lu\n", stats.imissed);
+ printf("rx_nombuf:\t%lu\n", stats.rx_nombuf);
+ }
+ return ;
+}
+#endif
+/* Check the link status of all ports in up to 9s, and print them finally */
+static void check_port_link_status(uint8_t portid)
+{
+#define CHECK_INTERVAL 100 /* 100ms */
+#define MAX_CHECK_TIME 90 /* 9s (90 * 100ms) in total */
+ uint8_t count, all_ports_up, print_flag = 0;
+ struct rte_eth_link link;
+
+ printf("\nChecking link status");
+ fflush(stdout);
+ for (count = 0; count <= MAX_CHECK_TIME; count++) {
+ all_ports_up = 1;
+ memset(&link, 0, sizeof(link));
+ rte_eth_link_get_nowait(portid, &link);
+
+ /* print link status if flag set */
+ if (print_flag == 1) {
+ if (link.link_status)
+ printf("Port %d Link Up - speed %u "
+ "Mbps - %s\n", (uint8_t)portid,
+ (unsigned)link.link_speed,
+ (link.link_duplex == ETH_LINK_FULL_DUPLEX) ?
+ ("full-duplex") : ("half-duplex\n"));
+ else
+ printf("Port %d Link Down\n",
+ (uint8_t)portid);
+ }
+ /* clear all_ports_up flag if any link down */
+ if (link.link_status == ETH_LINK_DOWN) {
+ all_ports_up = 0;
+ break;
+ }
+ /* after finally printing all link status, get out */
+ if (print_flag == 1)
+ break;
+
+ if (all_ports_up == 0) {
+ printf(".");
+ fflush(stdout);
+ rte_delay_ms(CHECK_INTERVAL);
+ }
+
+ /* set the print_flag if all ports up or timeout */
+ if (all_ports_up == 1 || count == (MAX_CHECK_TIME - 1)) {
+ print_flag = 1;
+ printf(" ... done\n");
+ }
+ }
+}
+
+
+int xran_ethdi_init_dpdk_io(char *name, const struct xran_io_loop_cfg *io_cfg,
+ int *lcore_id, struct ether_addr *p_lls_cu_addr, struct ether_addr *p_ru_addr,
+ uint16_t cp_vlan, uint16_t up_vlan)
+{
+ uint16_t port[2] = {0xffff, 0xffff};
+ struct xran_ethdi_ctx *ctx = xran_ethdi_get_ctx();
+ int i;
+ char core_mask[64];
+ long c_mask=0;
+ char bbdev_wdev[32] = "";
+ char bbdev_vdev[32] = "";
+
+ char *argv[] = { name, /*"-c 0xFFFFF00000FFFFF"*/core_mask, "-n2", "--socket-mem=8192", "--proc-type=auto",
+ "--file-prefix", name, "-w", "0000:00:00.0", bbdev_wdev, bbdev_vdev};
+
+ if (io_cfg == NULL)
+ return 0;
+ if(io_cfg->bbdev_mode != XRAN_BBDEV_NOT_USED){
+ printf("BBDEV_FEC_ACCL_NR5G\n");
+ if (io_cfg->bbdev_mode == XRAN_BBDEV_MODE_HW_ON){
+ // hw-accelerated bbdev
+ printf("hw-accelerated bbdev %s\n", io_cfg->bbdev_dev[0]);
+ snprintf(bbdev_wdev, sizeof(bbdev_wdev), "-w %s", io_cfg->bbdev_dev[0]);
+ } else if (io_cfg->bbdev_mode == XRAN_BBDEV_MODE_HW_OFF){
+ // hw-accelerated bbdev disable
+ if(io_cfg->bbdev_dev[0]){
+ printf("hw-accelerated bbdev disable %s\n", io_cfg->bbdev_dev[0]);
+ snprintf(bbdev_wdev, sizeof(bbdev_wdev), "-b %s", io_cfg->bbdev_dev[0]);
+ }
+ snprintf(bbdev_wdev, sizeof(bbdev_wdev), "%s", "--vdev=baseband_turbo_sw");
+ } else {
+ rte_panic("Cannot init DPDK incorrect [bbdev_mode %d]\n", io_cfg->bbdev_mode);
+ }
+ }
+
+ c_mask = (long)(1L << io_cfg->core) |
+ (long)(1L << io_cfg->system_core) |
+ (long)(1L << io_cfg->pkt_proc_core) |
+ (long)(1L << io_cfg->pkt_aux_core) |
+ (long)(1L << io_cfg->timing_core);
+
+ printf("c_mask 0x%lx core %d system_core %d pkt_proc_core %d pkt_aux_core %d timing_core %d\n",
+ c_mask, io_cfg->core, io_cfg->system_core, io_cfg->pkt_proc_core, io_cfg->pkt_aux_core, io_cfg->timing_core);
+
+ snprintf(core_mask, sizeof(core_mask), "-c 0x%lx", c_mask);
+
+ ctx->io_cfg = *io_cfg;
+ ctx->ping_state = PING_IDLE;
+ ctx->known_peers = 1;
+ ctx->busy_poll_till = rte_rdtsc();
+ ctx->cp_vtag = cp_vlan;
+ ctx->up_vtag = up_vlan;
+
+ for (i = 0; i <= ID_BROADCAST; i++) /* Initialize all as broadcast */
+ memset(&ctx->entities[i], 0xFF, sizeof(ctx->entities[0]));
+
+ printf("%s: Calling rte_eal_init:", __FUNCTION__);
+ for (i = 0; i < RTE_DIM(argv); i++)
+ {
+ printf("%s ", argv[i]);
+ }
+ printf("\n");
+
+
+ /* This will return on system_core, which is not necessarily the
+ * one we're on right now. */
+ if (rte_eal_init(RTE_DIM(argv), argv) < 0)
+ rte_panic("Cannot init EAL: %s\n", rte_strerror(rte_errno));
+
+ xran_init_mbuf_pool();
+
+#ifdef RTE_LIBRTE_PDUMP
+ /* initialize packet capture framework */
+ rte_pdump_init(NULL);
+#endif
+
+ /* Timers. */
+ rte_timer_subsystem_init();
+ rte_timer_init(&ctx->timer_ping);
+ rte_timer_init(&ctx->timer_sync);
+ rte_timer_init(&ctx->timer_tx);
+
+ *lcore_id = rte_get_next_lcore(rte_lcore_id(), 0, 0);
+
+ PANIC_ON(*lcore_id == RTE_MAX_LCORE, "out of lcores for io_loop()");
+
+ if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
+ for (i = 0; i < ETHDI_VF_MAX; i ++){
+ if(io_cfg->dpdk_dev[i]){
+ if (rte_eth_dev_attach(io_cfg->dpdk_dev[i], &port[i]) != 0 ||
+ rte_eth_dev_count_avail() == 0)
+ errx(1, "Network port doesn't exist.");
+ xran_init_port(port[i], p_lls_cu_addr);
+ } else {
+ printf("no DPDK port provided\n");
+ }
+ if(i==0){
+ ctx->tx_ring[i] = rte_ring_create("tx_ring_up", NUM_MBUFS,
+ rte_lcore_to_socket_id(*lcore_id), RING_F_SC_DEQ);
+ ctx->rx_ring[i] = rte_ring_create("rx_ring_up", NUM_MBUFS,
+ rte_lcore_to_socket_id(*lcore_id), RING_F_SC_DEQ);
+ ctx->pkt_dump_ring[i] = rte_ring_create("pkt_dump_ring_up", NUM_MBUFS,
+ rte_lcore_to_socket_id(*lcore_id), RING_F_SC_DEQ);
+ }else {
+ ctx->tx_ring[i] = rte_ring_create("tx_ring_cp", NUM_MBUFS,
+ rte_lcore_to_socket_id(*lcore_id), RING_F_SC_DEQ);
+ ctx->rx_ring[i] = rte_ring_create("rx_ring_cp", NUM_MBUFS,
+ rte_lcore_to_socket_id(*lcore_id), RING_F_SC_DEQ);
+ ctx->pkt_dump_ring[i] = rte_ring_create("pkt_dump_ring_cp", NUM_MBUFS,
+ rte_lcore_to_socket_id(*lcore_id), RING_F_SC_DEQ);
+ }
+ if(io_cfg->dpdk_dev[i])
+ check_port_link_status(port[i]);
+ }
+ } else {
+ rte_panic("ethdi_dpdk_io_loop() failed to start with RTE_PROC_SECONDARY\n");
+ }
+ PANIC_ON(ctx->tx_ring == NULL, "failed to allocate tx ring");
+ PANIC_ON(ctx->rx_ring == NULL, "failed to allocate rx ring");
+ PANIC_ON(ctx->pkt_dump_ring == NULL, "failed to allocate pkt dumping ring");
+ for (i = 0; i < ETHDI_VF_MAX; i++){
+ ctx->io_cfg.port[i] = port[i];
+ print_dbg("port_id 0x%04x\n", ctx->io_cfg.port[i]);
+ }
+
+ if(io_cfg->dpdk_dev[ETHDI_UP_VF]){
+ rte_eth_macaddr_get(port[ETHDI_UP_VF], &ctx->entities[io_cfg->id]);
+ ether_addr_copy(p_ru_addr, &ctx->entities[ID_RU]);
+ }
+
+ return 1;
+}
+
+static inline uint16_t xran_tx_from_ring(int port, struct rte_ring *r)
+{
+ struct rte_mbuf *mbufs[BURST_SIZE];
+ uint16_t dequeued, sent = 0;
+ uint32_t remaining;
+ int i;
+ long t1 = MLogTick();
+
+ dequeued = rte_ring_dequeue_burst(r, (void **)mbufs, BURST_SIZE,
+ &remaining);
+ if (!dequeued)
+ return 0; /* Nothing to send. */
+
+ while (1) { /* When tx queue is full it is trying again till succeed */
+ t1 = MLogTick();
+ sent += rte_eth_tx_burst(port, 0, &mbufs[sent], dequeued - sent);
+
+ MLogTask(PID_RADIO_ETH_TX_BURST, t1, MLogTick());
+
+ if (sent == dequeued)
+ return remaining;
+ }
+}
+
+int32_t process_dpdk_io(void)
+{
+ struct xran_ethdi_ctx *ctx = xran_ethdi_get_ctx();
+ const struct xran_io_loop_cfg *const cfg = &(xran_ethdi_get_ctx()->io_cfg);
+ const int port[ETHDI_VF_MAX] = {cfg->port[ETHDI_UP_VF], cfg->port[ETHDI_CP_VF]};
+ int port_id = 0;
+
+ for (port_id = 0; port_id < ETHDI_VF_MAX; port_id++){
+ struct rte_mbuf *mbufs[BURST_RX_IO_SIZE];
+ if(port[port_id] == 0xFF)
+ return 0;
+ /* RX */
+ const uint16_t rxed = rte_eth_rx_burst(port[port_id], 0, mbufs, BURST_RX_IO_SIZE);
+ if (rxed != 0){
+ unsigned enq_n = 0;
+ long t1 = MLogTick();
+ enq_n = rte_ring_enqueue_burst(ctx->rx_ring[port_id], (void*)mbufs, rxed, NULL);
+ if(rxed - enq_n)
+ rte_panic("error enq\n");
+ MLogTask(PID_RADIO_RX_VALIDATE, t1, MLogTick());
+ }
+
+ /* TX */
+ const uint16_t sent = xran_tx_from_ring(port[port_id], ctx->tx_ring[port_id]);
+
+ if (XRAN_STOPPED == xran_if_current_state)
+ return -1;
+ }
+
+ if (XRAN_STOPPED == xran_if_current_state)
+ return -1;
+
+ return 0;
+}
+
+#if 0
+static inline void xran_process_rx_burst(struct rte_mbuf *mbufs[], uint16_t n_mbufs,
+ uint64_t rx_time)
+{
+ int i;
+
+ if (!n_mbufs)
+ return;
+
+ for (i = 0; i < n_mbufs; ++i)
+ {
+ if (xran_ethdi_filter_packet(mbufs[i], rx_time) == MBUF_FREE)
+ rte_pktmbuf_free(mbufs[i]);
+ }
+
+#ifdef DPDKIO_LATENCY_DEBUG
+ struct timeval tv_now, tv_diff;
+
+ gettimeofday(&tv_now, NULL);
+ if (n_mbufs > 1)
+ nlog("Warning - received %d mbufs in a row", n_mbufs);
+
+ timersub(&tv_now, &rx_time, &tv_diff);
+ nlog("rx processing took %d usec", tv_diff.tv_usec);
+#endif
+}
+
+/*
+ * This is the main DPDK-IO loop.
+ * This will sleep if there's no packets incoming and there's
+ * no work enqueued, sleep lenth is defined in IDLE_SLEEP_MICROSECS
+ */
+int xran_ethdi_dpdk_io_loop(void *io_loop_cfg)
+{
+ struct sched_param sched_param;
+ int res = 0;
+ struct xran_ethdi_ctx *ctx = xran_ethdi_get_ctx();
+ const struct xran_io_loop_cfg *const cfg = &(xran_ethdi_get_ctx()->io_cfg);
+ const int port[ETHDI_VF_MAX] = {cfg->port[ETHDI_UP_VF], cfg->port[ETHDI_CP_VF]};
+
+ printf("%s [PORT: %d %d] [CPU %2d] [PID: %6d]\n", __FUNCTION__, port[ETHDI_UP_VF], port[ETHDI_CP_VF] , rte_lcore_id(), getpid());
+
+ printf("%s [CPU %2d] [PID: %6d]\n", __FUNCTION__, rte_lcore_id(), getpid());
+ sched_param.sched_priority = XRAN_THREAD_DEFAULT_PRIO;
+ if ((res = pthread_setschedparam(pthread_self(), SCHED_FIFO, &sched_param))) {
+ printf("priority is not changed: coreId = %d, result1 = %d\n",rte_lcore_id(), res);
+ }
+
+ for (;;){
+ if(process_dpdk_io()!=0)
+ break;
+ }
+
+ fflush(stderr);
+ fflush(stdout);
+ puts("IO loop finished");
+
+ return 0;
+}
+#endif
+
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/**\r
- * @brief This file has all definitions for the Ethernet Data Interface Layer\r
- * @file ethdi.h\r
- * @ingroup group_lte_source_auxlib\r
- * @author Intel Corporation\r
- **/\r
-\r
-\r
-#ifndef _ETHDI_H_\r
-#define _ETHDI_H_\r
-\r
-#ifdef __cplusplus\r
-extern "C" {\r
-#endif\r
-\r
-#include <rte_config.h>\r
-#include <rte_mbuf.h>\r
-#include <rte_timer.h>\r
-\r
-/* comment this to enable PDUMP\r
- * DPDK has to be compiled with\r
- * CONFIG_RTE_LIBRTE_PMD_PCAP=y\r
- * CONFIG_RTE_LIBRTE_PDUMP=y\r
- */\r
-#undef RTE_LIBRTE_PDUMP\r
-\r
-#ifdef RTE_LIBRTE_PDUMP\r
-#include <rte_pdump.h>\r
-#endif\r
-\r
-#include "ethernet.h"\r
-#include "xran_fh_o_du.h"\r
-\r
-#define XRAN_THREAD_DEFAULT_PRIO (98)\r
-\r
-/* How often to ping? */\r
-#define PING_INTERVAL 300 /* (us) */\r
-#define PING_BUSY_POLL 50 /* (us) how long to actively wait for response */\r
-\r
-/* If we're not receiving packets for more then this threshold... */\r
-//#define SLEEP_THRESHOLD (rte_get_tsc_hz() / 30) /* = 33.3(3)ms */\r
-/* we go to sleep for this long (usleep). Undef SLEEP_TRESHOLD to disable. */\r
-#define SLEEP_TIME 200 /* (us) */\r
-#define BCAST {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}\r
-\r
-#define TX_TIMER_INTERVAL ((rte_get_timer_hz() / 1000000000L)*interval_us*1000) /* nanosec */\r
-#define TX_RX_LOOP_TIME rte_get_timer_hz() / 1\r
-\r
-enum xran_ping_states\r
-{\r
- PING_IDLE,\r
- PING_NEEDED,\r
- AWAITING_PONG\r
-};\r
-\r
-enum xran_ethdi_vf_ports\r
-{\r
- ETHDI_UP_VF = 0,\r
- ETHDI_CP_VF,\r
- ETHDI_VF_MAX\r
-};\r
-\r
-struct xran_io_loop_cfg\r
-{\r
- uint8_t id;\r
- char *dpdk_dev[ETHDI_VF_MAX];\r
- char *bbdev_dev[1];\r
- int bbdev_mode;\r
- int core;\r
- int system_core; /* Needed as DPDK will change your starting core. */\r
- int pkt_proc_core; /* Needed for packet processing thread. */\r
- int pkt_aux_core; /* Needed for packet dumping for debug purposes. */\r
- int timing_core; /* Needed for getting precise time */\r
- int port[ETHDI_VF_MAX]; /* This is auto-detected, no need to set. */\r
-};\r
-\r
-/* CAUTION: Keep in sync with the string table below. */\r
-enum xran_entities_id\r
-{\r
- ID_LLS_CU,\r
- ID_RU,\r
- ID_BROADCAST,\r
- ID_MAX\r
-};\r
-\r
-static char *const entity_names[] = {\r
- "xRAN lls-CU sim app",\r
- "xRAN RU sim app",\r
-};\r
-\r
-typedef int (*PROCESS_CB)(void * arg);\r
-\r
-struct xran_ethdi_ctx\r
-{\r
- struct xran_io_loop_cfg io_cfg;\r
- struct ether_addr entities[ID_BROADCAST + 1];\r
- uint8_t ping_state;\r
- int ping_times;\r
- int known_peers;\r
-\r
- struct rte_ring *tx_ring[ETHDI_VF_MAX];\r
- struct rte_ring *rx_ring[ETHDI_VF_MAX];\r
- struct rte_ring *pkt_dump_ring[ETHDI_VF_MAX];\r
- struct rte_timer timer_autodetect;\r
- struct rte_timer timer_ping;\r
- struct rte_timer timer_sync;\r
- struct rte_timer timer_tx;\r
-\r
- uint64_t busy_poll_till;\r
-\r
- unsigned pkt_stats[PKT_LAST + 1];\r
-\r
- uint16_t cp_vtag;\r
- uint16_t up_vtag;\r
-};\r
-\r
-enum {\r
- MBUF_KEEP,\r
- MBUF_FREE\r
-};\r
-\r
-extern enum xran_if_state xran_if_current_state;\r
-extern uint8_t ping_dst_id;\r
-extern struct ether_addr entities_addrs[];\r
-\r
-static inline struct xran_ethdi_ctx *xran_ethdi_get_ctx(void)\r
-{\r
- extern struct xran_ethdi_ctx g_ethdi_ctx;\r
-\r
- return &g_ethdi_ctx;\r
-}\r
-typedef int (*xran_ethdi_handler)(struct rte_mbuf *, int sender, uint64_t rx_time);\r
-\r
-typedef int (*ethertype_handler)(struct rte_mbuf *, uint64_t rx_time);\r
-typedef int (*xran_ethdi_handler)(struct rte_mbuf *, int sender, uint64_t rx_time);\r
-typedef void (xran_ethdi_tx_callback)(struct rte_timer *tim, void *arg);\r
-\r
-\r
-int xran_register_ethertype_handler(uint16_t ethertype, ethertype_handler callback);\r
-\r
-\r
-int xran_ethdi_init_dpdk_io(char *name, const struct xran_io_loop_cfg *io_cfg,\r
- int *lcore_id, struct ether_addr *p_lls_cu_addr, struct ether_addr *p_ru_addr,\r
- uint16_t cp_vlan, uint16_t up_vlan);\r
-struct rte_mbuf *xran_ethdi_mbuf_alloc(void);\r
-int xran_ethdi_mbuf_send(struct rte_mbuf *mb, uint16_t ethertype);\r
-int xran_ethdi_mbuf_send_cp(struct rte_mbuf *mb, uint16_t ethertype);\r
-#if 0\r
-void xran_ethdi_stop_tx(void);\r
-void xran_ethdi_ports_stats(void);\r
-int xran_ethdi_dpdk_io_loop(void *);\r
-#endif\r
-int xran_ethdi_filter_packet(struct rte_mbuf *pkt, uint64_t rx_time);\r
-int32_t process_dpdk_io(void);\r
-\r
-\r
-#ifdef __cplusplus\r
-}\r
-#endif\r
-\r
-#endif /* #ifndef _ETHDI_H_ */\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief This file has all definitions for the Ethernet Data Interface Layer
+ * @file ethdi.h
+ * @ingroup group_lte_source_auxlib
+ * @author Intel Corporation
+ **/
+
+
+#ifndef _ETHDI_H_
+#define _ETHDI_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <rte_config.h>
+#include <rte_mbuf.h>
+#include <rte_timer.h>
+
+/* comment this to enable PDUMP
+ * DPDK has to be compiled with
+ * CONFIG_RTE_LIBRTE_PMD_PCAP=y
+ * CONFIG_RTE_LIBRTE_PDUMP=y
+ */
+#undef RTE_LIBRTE_PDUMP
+
+#ifdef RTE_LIBRTE_PDUMP
+#include <rte_pdump.h>
+#endif
+
+#include "ethernet.h"
+#include "xran_fh_o_du.h"
+
+#define XRAN_THREAD_DEFAULT_PRIO (98)
+
+/* How often to ping? */
+#define PING_INTERVAL 300 /* (us) */
+#define PING_BUSY_POLL 50 /* (us) how long to actively wait for response */
+
+/* If we're not receiving packets for more then this threshold... */
+//#define SLEEP_THRESHOLD (rte_get_tsc_hz() / 30) /* = 33.3(3)ms */
+/* we go to sleep for this long (usleep). Undef SLEEP_TRESHOLD to disable. */
+#define SLEEP_TIME 200 /* (us) */
+#define BCAST {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}
+
+#define TX_TIMER_INTERVAL ((rte_get_timer_hz() / 1000000000L)*interval_us*1000) /* nanosec */
+#define TX_RX_LOOP_TIME rte_get_timer_hz() / 1
+
+enum xran_ping_states
+{
+ PING_IDLE,
+ PING_NEEDED,
+ AWAITING_PONG
+};
+
+enum xran_ethdi_vf_ports
+{
+ ETHDI_UP_VF = 0,
+ ETHDI_CP_VF,
+ ETHDI_VF_MAX
+};
+
+struct xran_io_loop_cfg
+{
+ uint8_t id;
+ char *dpdk_dev[ETHDI_VF_MAX];
+ char *bbdev_dev[1];
+ int bbdev_mode;
+ int core;
+ int system_core; /* Needed as DPDK will change your starting core. */
+ int pkt_proc_core; /* Needed for packet processing thread. */
+ int pkt_aux_core; /* Needed for packet dumping for debug purposes. */
+ int timing_core; /* Needed for getting precise time */
+ int port[ETHDI_VF_MAX]; /* This is auto-detected, no need to set. */
+};
+
+/* CAUTION: Keep in sync with the string table below. */
+enum xran_entities_id
+{
+ ID_LLS_CU,
+ ID_RU,
+ ID_BROADCAST,
+ ID_MAX
+};
+
+static char *const entity_names[] = {
+ "xRAN lls-CU sim app",
+ "xRAN RU sim app",
+};
+
+typedef int (*PROCESS_CB)(void * arg);
+
+struct xran_ethdi_ctx
+{
+ struct xran_io_loop_cfg io_cfg;
+ struct ether_addr entities[ID_BROADCAST + 1];
+ uint8_t ping_state;
+ int ping_times;
+ int known_peers;
+
+ struct rte_ring *tx_ring[ETHDI_VF_MAX];
+ struct rte_ring *rx_ring[ETHDI_VF_MAX];
+ struct rte_ring *pkt_dump_ring[ETHDI_VF_MAX];
+ struct rte_timer timer_autodetect;
+ struct rte_timer timer_ping;
+ struct rte_timer timer_sync;
+ struct rte_timer timer_tx;
+
+ uint64_t busy_poll_till;
+
+ unsigned pkt_stats[PKT_LAST + 1];
+
+ uint16_t cp_vtag;
+ uint16_t up_vtag;
+};
+
+enum {
+ MBUF_KEEP,
+ MBUF_FREE
+};
+
+extern enum xran_if_state xran_if_current_state;
+extern uint8_t ping_dst_id;
+extern struct ether_addr entities_addrs[];
+
+static inline struct xran_ethdi_ctx *xran_ethdi_get_ctx(void)
+{
+ extern struct xran_ethdi_ctx g_ethdi_ctx;
+
+ return &g_ethdi_ctx;
+}
+typedef int (*xran_ethdi_handler)(struct rte_mbuf *, int sender, uint64_t rx_time);
+
+typedef int (*ethertype_handler)(struct rte_mbuf *, uint64_t rx_time);
+typedef int (*xran_ethdi_handler)(struct rte_mbuf *, int sender, uint64_t rx_time);
+typedef void (xran_ethdi_tx_callback)(struct rte_timer *tim, void *arg);
+
+
+int xran_register_ethertype_handler(uint16_t ethertype, ethertype_handler callback);
+
+
+int xran_ethdi_init_dpdk_io(char *name, const struct xran_io_loop_cfg *io_cfg,
+ int *lcore_id, struct ether_addr *p_lls_cu_addr, struct ether_addr *p_ru_addr,
+ uint16_t cp_vlan, uint16_t up_vlan);
+struct rte_mbuf *xran_ethdi_mbuf_alloc(void);
+int xran_ethdi_mbuf_send(struct rte_mbuf *mb, uint16_t ethertype);
+int xran_ethdi_mbuf_send_cp(struct rte_mbuf *mb, uint16_t ethertype);
+#if 0
+void xran_ethdi_stop_tx(void);
+void xran_ethdi_ports_stats(void);
+int xran_ethdi_dpdk_io_loop(void *);
+#endif
+int xran_ethdi_filter_packet(struct rte_mbuf *pkt, uint64_t rx_time);
+int32_t process_dpdk_io(void);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* #ifndef _ETHDI_H_ */
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/**\r
- * @brief This file has all definitions for the Ethernet Data Interface Layer\r
- * @file ethernet.c\r
- * @ingroup group_lte_source_auxlib\r
- * @author Intel Corporation\r
- **/\r
-\r
-\r
-#include <stdio.h>\r
-#include <string.h>\r
-#include <stdint.h>\r
-#include <unistd.h>\r
-#include <errno.h>\r
-#include <sys/queue.h>\r
-#include <err.h>\r
-#include <assert.h>\r
-\r
-#include <linux/limits.h>\r
-#include <sys/types.h>\r
-#include <stdlib.h>\r
-#include <math.h>\r
-\r
-#include <rte_config.h>\r
-#include <rte_common.h>\r
-#include <rte_log.h>\r
-#include <rte_memory.h>\r
-#include <rte_memcpy.h>\r
-#include <rte_memzone.h>\r
-#include <rte_eal.h>\r
-#include <rte_per_lcore.h>\r
-#include <rte_launch.h>\r
-#include <rte_atomic.h>\r
-#include <rte_cycles.h>\r
-#include <rte_prefetch.h>\r
-#include <rte_lcore.h>\r
-#include <rte_per_lcore.h>\r
-#include <rte_branch_prediction.h>\r
-#include <rte_interrupts.h>\r
-#include <rte_pci.h>\r
-#include <rte_debug.h>\r
-#include <rte_ether.h>\r
-#include <rte_ethdev.h>\r
-#include <rte_ring.h>\r
-#include <rte_mempool.h>\r
-#include <rte_mbuf.h>\r
-#include <rte_errno.h>\r
-\r
-#include "ethernet.h"\r
-#include "ethdi.h"\r
-\r
-/* Our mbuf pools. */\r
-struct rte_mempool *_eth_mbuf_pool = NULL;\r
-struct rte_mempool *_eth_mbuf_pool_inderect = NULL;\r
-struct rte_mempool *_eth_mbuf_pool_rx = NULL;\r
-struct rte_mempool *_eth_mbuf_pool_small = NULL;\r
-struct rte_mempool *_eth_mbuf_pool_big = NULL;\r
-\r
-struct rte_mempool *socket_direct_pool = NULL;\r
-struct rte_mempool *socket_indirect_pool = NULL;\r
-\r
-\r
-/*\r
- * Make sure the ring indexes are big enough to cover buf space x2\r
- * This ring-buffer maintains the property head - tail <= RINGSIZE.\r
- * head == tail: ring buffer empty\r
- * head - tail == RINGSIZE: ring buffer full\r
- */\r
-typedef uint16_t ring_idx;\r
-static struct {\r
- ring_idx head;\r
- ring_idx read_head;\r
- ring_idx tail;\r
- char buf[1024]; /* needs power of 2! */\r
-} io_ring = { {0}, 0, 0};\r
-\r
-#define RINGSIZE sizeof(io_ring.buf)\r
-#define RINGMASK (RINGSIZE - 1)\r
-\r
-int __xran_delayed_msg(const char *fmt, ...)\r
-{\r
-#if 0\r
- va_list ap;\r
- int msg_len;\r
- char localbuf[RINGSIZE];\r
- ring_idx old_head, new_head;\r
- ring_idx copy_len;\r
-\r
- /* first prep a copy of the message on the local stack */\r
- va_start(ap, fmt);\r
- msg_len = vsnprintf(localbuf, RINGSIZE, fmt, ap);\r
- va_end(ap);\r
-\r
- /* atomically reserve space in the ring */\r
- for (;;) {\r
- old_head = io_ring.head; /* snapshot head */\r
- /* free always within range of [0, RINGSIZE] - proof by induction */\r
- const ring_idx free = RINGSIZE - (old_head - io_ring.tail);\r
-\r
- copy_len = RTE_MIN(msg_len, free);\r
- if (copy_len <= 0)\r
- return 0; /* vsnprintf error or ringbuff full. Drop log. */\r
-\r
- new_head = old_head + copy_len;\r
- RTE_ASSERT((ring_idx)(new_head - io_ring.tail) <= RINGSIZE);\r
-\r
- if (likely(__atomic_compare_exchange_n(&io_ring.head, &old_head,\r
- new_head, 0, __ATOMIC_ACQUIRE, __ATOMIC_RELAXED)))\r
- break;\r
- }\r
-\r
- /* Now copy data in at ease. */\r
- const int copy_start = (old_head & RINGMASK);\r
- if (copy_start < (new_head & RINGMASK)) /* no wrap */\r
- memcpy(io_ring.buf + copy_start, localbuf, copy_len);\r
- else { /* wrap-around */\r
- const int chunk_len = RINGSIZE - copy_start;\r
-\r
- memcpy(io_ring.buf + copy_start, localbuf, chunk_len);\r
- memcpy(io_ring.buf, localbuf + chunk_len, copy_len - chunk_len);\r
- }\r
-\r
- /* wait for previous writes to complete before updating read_head. */\r
- while (io_ring.read_head != old_head)\r
- rte_pause();\r
- io_ring.read_head = new_head;\r
-\r
-\r
- return copy_len;\r
- #endif\r
- return 0;\r
-}\r
-\r
-/*\r
- * Display part of the message stored in the ring buffer.\r
- * Might require multiple calls to print the full message.\r
- * Will return 0 when nothing left to print.\r
- */\r
-#if 0\r
-int xran_show_delayed_message(void)\r
-{\r
- ring_idx tail = io_ring.tail;\r
- ring_idx wlen = io_ring.read_head - tail; /* always within [0, RINGSIZE] */\r
-\r
- if (wlen <= 0)\r
- return 0;\r
-\r
- tail &= RINGMASK; /* modulo the range down now that we have wlen */\r
-\r
- /* Make sure we're not going over buffer end. Next call will wrap. */\r
- if (tail + wlen > RINGSIZE)\r
- wlen = RINGSIZE - tail;\r
-\r
- RTE_ASSERT(tail + wlen <= RINGSIZE);\r
-\r
- /* We use write() here to avoid recaculating string length in fwrite(). */\r
- const ssize_t written = write(STDOUT_FILENO, io_ring.buf + tail, wlen);\r
- if (written <= 0)\r
- return 0; /* To avoid moving tail the wrong way on error. */\r
-\r
- /* Move tail up. Only we touch it. And we only print from one core. */\r
- io_ring.tail += written;\r
-\r
- return written; /* next invocation will print the rest if any */\r
-}\r
-#endif\r
-\r
-void xran_init_mbuf_pool(void)\r
-{\r
- /* Init the buffer pool */\r
- if (rte_eal_process_type() == RTE_PROC_PRIMARY) {\r
- _eth_mbuf_pool = rte_pktmbuf_pool_create("mempool", NUM_MBUFS,\r
- MBUF_CACHE, 0, MBUF_POOL_ELEMENT, rte_socket_id());\r
-#ifdef XRAN_ATTACH_MBUF\r
- _eth_mbuf_pool_inderect = rte_pktmbuf_pool_create("mempool_indirect", NUM_MBUFS,\r
- MBUF_CACHE, 0, MBUF_POOL_ELEMENT, rte_socket_id());*/\r
-#endif\r
- _eth_mbuf_pool_rx = rte_pktmbuf_pool_create("mempool_rx", NUM_MBUFS,\r
- MBUF_CACHE, 0, MBUF_POOL_ELEMENT, rte_socket_id());\r
- _eth_mbuf_pool_small = rte_pktmbuf_pool_create("mempool_small",\r
- NUM_MBUFS, MBUF_CACHE, 0, MBUF_POOL_ELM_SMALL, rte_socket_id());\r
- _eth_mbuf_pool_big = rte_pktmbuf_pool_create("mempool_big",\r
- NUM_MBUFS_BIG, 0, 0, MBUF_POOL_ELM_BIG, rte_socket_id());\r
- } else {\r
- _eth_mbuf_pool = rte_mempool_lookup("mempool");\r
- _eth_mbuf_pool_inderect = rte_mempool_lookup("mempool_indirect");\r
- _eth_mbuf_pool_rx = rte_mempool_lookup("mempool_rx");\r
- _eth_mbuf_pool_small = rte_mempool_lookup("mempool_small");\r
- _eth_mbuf_pool_big = rte_mempool_lookup("mempool_big");\r
- }\r
- if (_eth_mbuf_pool == NULL)\r
- rte_panic("Cannot create mbuf pool: %s\n", rte_strerror(rte_errno));\r
-#ifdef XRAN_ATTACH_MBUF\r
- if (_eth_mbuf_pool_inderect == NULL)\r
- rte_panic("Cannot create mbuf pool: %s\n", rte_strerror(rte_errno));\r
-#endif\r
- if (_eth_mbuf_pool_rx == NULL)\r
- rte_panic("Cannot create mbuf pool: %s\n", rte_strerror(rte_errno));\r
- if (_eth_mbuf_pool_small == NULL)\r
- rte_panic("Cannot create small mbuf pool: %s\n", rte_strerror(rte_errno));\r
- if (_eth_mbuf_pool_big == NULL)\r
- rte_panic("Cannot create big mbuf pool: %s\n", rte_strerror(rte_errno));\r
-\r
- if (socket_direct_pool == NULL)\r
- socket_direct_pool = _eth_mbuf_pool;\r
-\r
- if (socket_indirect_pool == NULL)\r
- socket_indirect_pool = _eth_mbuf_pool_inderect;\r
-}\r
-\r
-/* Init NIC port, then start the port */\r
-void xran_init_port(int p_id, struct ether_addr *p_lls_cu_addr)\r
-{\r
- static uint16_t nb_rxd = BURST_SIZE;\r
- static uint16_t nb_txd = BURST_SIZE;\r
- struct ether_addr addr;\r
- struct rte_eth_rxmode rxmode =\r
- { .split_hdr_size = 0,\r
- .max_rx_pkt_len = MAX_RX_LEN,\r
- .offloads=(DEV_RX_OFFLOAD_JUMBO_FRAME|DEV_RX_OFFLOAD_CRC_STRIP)\r
- };\r
- struct rte_eth_txmode txmode = {\r
- .mq_mode = ETH_MQ_TX_NONE\r
- };\r
- struct rte_eth_conf port_conf = {\r
- .rxmode = rxmode,\r
- .txmode = txmode\r
- };\r
- struct rte_eth_rxconf rxq_conf;\r
- struct rte_eth_txconf txq_conf;\r
-\r
- int ret;\r
- struct rte_eth_dev_info dev_info;\r
- const char *drv_name = "";\r
- int sock_id = rte_eth_dev_socket_id(p_id);\r
-\r
- rte_eth_dev_info_get(p_id, &dev_info);\r
- if (dev_info.driver_name)\r
- drv_name = dev_info.driver_name;\r
- printf("initializing port %d for TX, drv=%s\n", p_id, drv_name);\r
-\r
- rte_eth_macaddr_get(p_id, &addr);\r
-\r
- printf("Port %u MAC: %02"PRIx8" %02"PRIx8" %02"PRIx8\r
- " %02"PRIx8" %02"PRIx8" %02"PRIx8"\n",\r
- (unsigned)p_id,\r
- addr.addr_bytes[0], addr.addr_bytes[1], addr.addr_bytes[2],\r
- addr.addr_bytes[3], addr.addr_bytes[4], addr.addr_bytes[5]);\r
-\r
- /* Init port */\r
- ret = rte_eth_dev_configure(p_id, 1, 1, &port_conf);\r
- if (ret < 0)\r
- rte_panic("Cannot configure port %u (%d)\n", p_id, ret);\r
-\r
- ret = rte_eth_dev_adjust_nb_rx_tx_desc(p_id, &nb_rxd,&nb_txd);\r
-\r
- if (ret < 0) {\r
- printf("\n");\r
- rte_exit(EXIT_FAILURE, "Cannot adjust number of "\r
- "descriptors: err=%d, port=%d\n", ret, p_id);\r
- }\r
- printf("Port %u: nb_rxd %d nb_txd %d\n", p_id, nb_rxd, nb_txd);\r
-\r
- /* Init RX queues */\r
- rxq_conf = dev_info.default_rxconf;\r
- ret = rte_eth_rx_queue_setup(p_id, 0, nb_rxd,\r
- sock_id, &rxq_conf, _eth_mbuf_pool_rx);\r
- if (ret < 0)\r
- rte_panic("Cannot init RX for port %u (%d)\n",\r
- p_id, ret);\r
-\r
- /* Init TX queues */\r
- txq_conf = dev_info.default_txconf;\r
- ret = rte_eth_tx_queue_setup(p_id, 0, nb_txd, sock_id, &txq_conf);\r
- if (ret < 0)\r
- rte_panic("Cannot init TX for port %u (%d)\n",\r
- p_id, ret);\r
-\r
- /* Start port */\r
- ret = rte_eth_dev_start(p_id);\r
- if (ret < 0)\r
- rte_panic("Cannot start port %u (%d)\n", p_id, ret);\r
-\r
-// rte_eth_promiscuous_enable(p_id);\r
-}\r
-\r
-#if 0\r
-void xran_memdump(void *addr, int len)\r
-{\r
- int i;\r
- char tmp_buf[len * 2 + len / 16 + 1];\r
- char *p = tmp_buf;\r
-\r
- return;\r
-#if 0\r
- for (i = 0; i < len; ++i) {\r
- sprintf(p, "%.2X ", ((uint8_t *)addr)[i]);\r
- if (i % 16 == 15)\r
- *p++ = '\n';\r
- }\r
- *p = 0;\r
- nlog("%s", tmp_buf);\r
-#endif\r
-}\r
-\r
-/* Prepend ethernet header, possibly vlan tag. */\r
-void xran_add_eth_hdr(struct ether_addr *dst, uint16_t ethertype, struct rte_mbuf *mb)\r
-{\r
- /* add in the ethernet header */\r
- struct ether_hdr *const h = (void *)rte_pktmbuf_prepend(mb, sizeof(*h));\r
-\r
- PANIC_ON(h == NULL, "mbuf prepend of ether_hdr failed");\r
-\r
- /* Fill in the ethernet header. */\r
- rte_eth_macaddr_get(mb->port, &h->s_addr); /* set source addr */\r
- h->d_addr = *dst; /* set dst addr */\r
- h->ether_type = rte_cpu_to_be_16(ethertype); /* ethertype too */\r
-\r
-#if defined(DPDKIO_DEBUG) && DPDKIO_DEBUG > 1\r
- {\r
- char dst[ETHER_ADDR_FMT_SIZE] = "(empty)";\r
- char src[ETHER_ADDR_FMT_SIZE] = "(empty)";\r
-\r
- nlog("*** packet for TX below (len %d) ***", rte_pktmbuf_pkt_len(mb));\r
- ether_format_addr(src, sizeof(src), &h->s_addr);\r
- ether_format_addr(dst, sizeof(dst), &h->d_addr);\r
- nlog("src: %s dst: %s ethertype: %.4X", src, dst, ethertype);\r
- }\r
-#endif\r
-#ifdef VLAN_SUPPORT\r
- mb->vlan_tci = FLEXRAN_UP_VLAN_TAG;\r
- dlog("Inserting vlan tag of %d", FLEXRAN_UP_VLAN_TAG);\r
- rte_vlan_insert(&mb);\r
-#endif\r
-}\r
-\r
-int xran_send_mbuf(struct ether_addr *dst, struct rte_mbuf *mb)\r
-{\r
- xran_add_eth_hdr(dst, ETHER_TYPE_ETHDI, mb);\r
-\r
- if (rte_eth_tx_burst(mb->port, 0, &mb, 1) == 1)\r
- return 1;\r
-\r
- elog("packet sending failed on port %d", mb->port);\r
- rte_pktmbuf_free(mb);\r
-\r
- return 0; /* fail */\r
-}\r
-\r
-int xran_send_message_burst(int dst_id, int pkt_type, void *body, int len)\r
-{\r
- struct rte_mbuf *mbufs[BURST_SIZE];\r
- int i;\r
- uint8_t *src = body;\r
- const struct xran_ethdi_ctx *const ctx = xran_ethdi_get_ctx();\r
-\r
- /* We're limited by maximum mbuf size on the receive size.\r
- * We can change this but this would be a bigger rework. */\r
- RTE_ASSERT(len < MBUF_POOL_ELM_BIG);\r
-\r
- /* Allocate the required number of mbufs. */\r
- const uint8_t count = ceilf((float)len / MAX_DATA_SIZE);\r
- if (rte_pktmbuf_alloc_bulk(_eth_mbuf_pool, mbufs, count) != 0)\r
- rte_panic("Failed to allocate %d mbufs\n", count);\r
-\r
- nlog("burst transfer with data size %lu", MAX_DATA_SIZE);\r
- for (i = 0; len > 0; ++i) {\r
- char *p;\r
- struct burst_hdr *bhdr;\r
- struct ethdi_hdr *edi_hdr;\r
-\r
- /* Setup the ethdi_hdr. */\r
- edi_hdr = (void *)rte_pktmbuf_append(mbufs[i], sizeof(*edi_hdr));\r
- if (edi_hdr == NULL)\r
- rte_panic("append of ethdi_hdr failed\n");\r
- edi_hdr->pkt_type = PKT_BURST;\r
- /* edi_hdr->source_id setup in tx_from_ring */\r
- edi_hdr->dest_id = dst_id;\r
-\r
- /* Setup the burst header */\r
- bhdr = (void *)rte_pktmbuf_append(mbufs[i], sizeof(*bhdr));\r
- if (bhdr == NULL) /* append failed. */\r
- rte_panic("mbuf prepend of burst_hdr failed\n");\r
- bhdr->original_type = pkt_type;\r
- bhdr->pkt_idx = i; /* save the index of the burst chunk. */\r
- bhdr->total_pkts = count;\r
-\r
- /* now copy in the actual data */\r
- const int curr_data_len = RTE_MIN(len, MAX_TX_LEN -\r
- rte_pktmbuf_pkt_len(mbufs[i]) - sizeof(struct ether_hdr));\r
- p = (void *)rte_pktmbuf_append(mbufs[i], curr_data_len);\r
- if (p == NULL)\r
- rte_panic("mbuf append of %d data bytes failed\n", curr_data_len);\r
- /* This copy is unavoidable, as we're splitting one big buffer\r
- * into multiple mbufs. */\r
- rte_memcpy(p, src, curr_data_len);\r
-\r
- dlog("curr_data_len[%d] = %d", i, curr_data_len);\r
- dlog("packet %d size %d", i, rte_pktmbuf_pkt_len(mbufs[i]));\r
-\r
- /* Update our source data pointer and remaining length. */\r
- len -= curr_data_len;\r
- src += curr_data_len;\r
- }\r
-\r
- /* Now enqueue the full prepared burst. */\r
- i = rte_ring_enqueue_bulk(ctx->tx_ring[0], (void **)mbufs, count, NULL);\r
- PANIC_ON(i != count, "failed to enqueue all mbufs: %d/%d", i, count);\r
- dlog("%d packets enqueued on port %d.", count, ctx->io_cfg.port);\r
-\r
- return 1;\r
-}\r
-\r
-#endif\r
-\r
-/* Prepend ethernet header, possibly vlan tag. */\r
-void xran_add_eth_hdr_vlan(struct ether_addr *dst, uint16_t ethertype, struct rte_mbuf *mb, uint16_t vlan_tci)\r
-{\r
- /* add in the ethernet header */\r
- struct ether_hdr *h = (struct ether_hdr *)rte_pktmbuf_mtod(mb, struct ether_hdr*);\r
-\r
- PANIC_ON(h == NULL, "mbuf prepend of ether_hdr failed");\r
-\r
- /* Fill in the ethernet header. */\r
- rte_eth_macaddr_get(mb->port, &h->s_addr); /* set source addr */\r
- h->d_addr = *dst; /* set dst addr */\r
- h->ether_type = rte_cpu_to_be_16(ethertype); /* ethertype too */\r
-\r
-#if defined(DPDKIO_DEBUG) && DPDKIO_DEBUG > 1\r
- {\r
- char dst[ETHER_ADDR_FMT_SIZE] = "(empty)";\r
- char src[ETHER_ADDR_FMT_SIZE] = "(empty)";\r
-\r
- nlog("*** packet for TX below (len %d) ***", rte_pktmbuf_pkt_len(mb));\r
- ether_format_addr(src, sizeof(src), &h->s_addr);\r
- ether_format_addr(dst, sizeof(dst), &h->d_addr);\r
- nlog("src: %s dst: %s ethertype: %.4X", src, dst, ethertype);\r
- }\r
-#endif\r
-#ifdef VLAN_SUPPORT\r
- mb->vlan_tci = vlan_tci;\r
- dlog("Inserting vlan tag of %d", vlan_tci);\r
- rte_vlan_insert(&mb);\r
-#endif\r
-}\r
-\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief This file has all definitions for the Ethernet Data Interface Layer
+ * @file ethernet.c
+ * @ingroup group_lte_source_auxlib
+ * @author Intel Corporation
+ **/
+
+
+#include <stdio.h>
+#include <string.h>
+#include <stdint.h>
+#include <unistd.h>
+#include <errno.h>
+#include <sys/queue.h>
+#include <err.h>
+#include <assert.h>
+
+#include <linux/limits.h>
+#include <sys/types.h>
+#include <stdlib.h>
+#include <math.h>
+
+#include <rte_config.h>
+#include <rte_common.h>
+#include <rte_log.h>
+#include <rte_memory.h>
+#include <rte_memcpy.h>
+#include <rte_memzone.h>
+#include <rte_eal.h>
+#include <rte_per_lcore.h>
+#include <rte_launch.h>
+#include <rte_atomic.h>
+#include <rte_cycles.h>
+#include <rte_prefetch.h>
+#include <rte_lcore.h>
+#include <rte_per_lcore.h>
+#include <rte_branch_prediction.h>
+#include <rte_interrupts.h>
+#include <rte_pci.h>
+#include <rte_debug.h>
+#include <rte_ether.h>
+#include <rte_ethdev.h>
+#include <rte_ring.h>
+#include <rte_mempool.h>
+#include <rte_mbuf.h>
+#include <rte_errno.h>
+
+#include "ethernet.h"
+#include "ethdi.h"
+
+/* Our mbuf pools. */
+struct rte_mempool *_eth_mbuf_pool = NULL;
+struct rte_mempool *_eth_mbuf_pool_inderect = NULL;
+struct rte_mempool *_eth_mbuf_pool_rx = NULL;
+struct rte_mempool *_eth_mbuf_pool_small = NULL;
+struct rte_mempool *_eth_mbuf_pool_big = NULL;
+
+struct rte_mempool *socket_direct_pool = NULL;
+struct rte_mempool *socket_indirect_pool = NULL;
+
+
+/*
+ * Make sure the ring indexes are big enough to cover buf space x2
+ * This ring-buffer maintains the property head - tail <= RINGSIZE.
+ * head == tail: ring buffer empty
+ * head - tail == RINGSIZE: ring buffer full
+ */
+typedef uint16_t ring_idx;
+static struct {
+ ring_idx head;
+ ring_idx read_head;
+ ring_idx tail;
+ char buf[1024]; /* needs power of 2! */
+} io_ring = { {0}, 0, 0};
+
+#define RINGSIZE sizeof(io_ring.buf)
+#define RINGMASK (RINGSIZE - 1)
+
+int __xran_delayed_msg(const char *fmt, ...)
+{
+#if 0
+ va_list ap;
+ int msg_len;
+ char localbuf[RINGSIZE];
+ ring_idx old_head, new_head;
+ ring_idx copy_len;
+
+ /* first prep a copy of the message on the local stack */
+ va_start(ap, fmt);
+ msg_len = vsnprintf(localbuf, RINGSIZE, fmt, ap);
+ va_end(ap);
+
+ /* atomically reserve space in the ring */
+ for (;;) {
+ old_head = io_ring.head; /* snapshot head */
+ /* free always within range of [0, RINGSIZE] - proof by induction */
+ const ring_idx free = RINGSIZE - (old_head - io_ring.tail);
+
+ copy_len = RTE_MIN(msg_len, free);
+ if (copy_len <= 0)
+ return 0; /* vsnprintf error or ringbuff full. Drop log. */
+
+ new_head = old_head + copy_len;
+ RTE_ASSERT((ring_idx)(new_head - io_ring.tail) <= RINGSIZE);
+
+ if (likely(__atomic_compare_exchange_n(&io_ring.head, &old_head,
+ new_head, 0, __ATOMIC_ACQUIRE, __ATOMIC_RELAXED)))
+ break;
+ }
+
+ /* Now copy data in at ease. */
+ const int copy_start = (old_head & RINGMASK);
+ if (copy_start < (new_head & RINGMASK)) /* no wrap */
+ memcpy(io_ring.buf + copy_start, localbuf, copy_len);
+ else { /* wrap-around */
+ const int chunk_len = RINGSIZE - copy_start;
+
+ memcpy(io_ring.buf + copy_start, localbuf, chunk_len);
+ memcpy(io_ring.buf, localbuf + chunk_len, copy_len - chunk_len);
+ }
+
+ /* wait for previous writes to complete before updating read_head. */
+ while (io_ring.read_head != old_head)
+ rte_pause();
+ io_ring.read_head = new_head;
+
+
+ return copy_len;
+ #endif
+ return 0;
+}
+
+/*
+ * Display part of the message stored in the ring buffer.
+ * Might require multiple calls to print the full message.
+ * Will return 0 when nothing left to print.
+ */
+#if 0
+int xran_show_delayed_message(void)
+{
+ ring_idx tail = io_ring.tail;
+ ring_idx wlen = io_ring.read_head - tail; /* always within [0, RINGSIZE] */
+
+ if (wlen <= 0)
+ return 0;
+
+ tail &= RINGMASK; /* modulo the range down now that we have wlen */
+
+ /* Make sure we're not going over buffer end. Next call will wrap. */
+ if (tail + wlen > RINGSIZE)
+ wlen = RINGSIZE - tail;
+
+ RTE_ASSERT(tail + wlen <= RINGSIZE);
+
+ /* We use write() here to avoid recaculating string length in fwrite(). */
+ const ssize_t written = write(STDOUT_FILENO, io_ring.buf + tail, wlen);
+ if (written <= 0)
+ return 0; /* To avoid moving tail the wrong way on error. */
+
+ /* Move tail up. Only we touch it. And we only print from one core. */
+ io_ring.tail += written;
+
+ return written; /* next invocation will print the rest if any */
+}
+#endif
+
+void xran_init_mbuf_pool(void)
+{
+ /* Init the buffer pool */
+ if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
+ _eth_mbuf_pool = rte_pktmbuf_pool_create("mempool", NUM_MBUFS,
+ MBUF_CACHE, 0, MBUF_POOL_ELEMENT, rte_socket_id());
+#ifdef XRAN_ATTACH_MBUF
+ _eth_mbuf_pool_inderect = rte_pktmbuf_pool_create("mempool_indirect", NUM_MBUFS,
+ MBUF_CACHE, 0, MBUF_POOL_ELEMENT, rte_socket_id());*/
+#endif
+ _eth_mbuf_pool_rx = rte_pktmbuf_pool_create("mempool_rx", NUM_MBUFS,
+ MBUF_CACHE, 0, MBUF_POOL_ELEMENT, rte_socket_id());
+ _eth_mbuf_pool_small = rte_pktmbuf_pool_create("mempool_small",
+ NUM_MBUFS, MBUF_CACHE, 0, MBUF_POOL_ELM_SMALL, rte_socket_id());
+ _eth_mbuf_pool_big = rte_pktmbuf_pool_create("mempool_big",
+ NUM_MBUFS_BIG, 0, 0, MBUF_POOL_ELM_BIG, rte_socket_id());
+ } else {
+ _eth_mbuf_pool = rte_mempool_lookup("mempool");
+ _eth_mbuf_pool_inderect = rte_mempool_lookup("mempool_indirect");
+ _eth_mbuf_pool_rx = rte_mempool_lookup("mempool_rx");
+ _eth_mbuf_pool_small = rte_mempool_lookup("mempool_small");
+ _eth_mbuf_pool_big = rte_mempool_lookup("mempool_big");
+ }
+ if (_eth_mbuf_pool == NULL)
+ rte_panic("Cannot create mbuf pool: %s\n", rte_strerror(rte_errno));
+#ifdef XRAN_ATTACH_MBUF
+ if (_eth_mbuf_pool_inderect == NULL)
+ rte_panic("Cannot create mbuf pool: %s\n", rte_strerror(rte_errno));
+#endif
+ if (_eth_mbuf_pool_rx == NULL)
+ rte_panic("Cannot create mbuf pool: %s\n", rte_strerror(rte_errno));
+ if (_eth_mbuf_pool_small == NULL)
+ rte_panic("Cannot create small mbuf pool: %s\n", rte_strerror(rte_errno));
+ if (_eth_mbuf_pool_big == NULL)
+ rte_panic("Cannot create big mbuf pool: %s\n", rte_strerror(rte_errno));
+
+ if (socket_direct_pool == NULL)
+ socket_direct_pool = _eth_mbuf_pool;
+
+ if (socket_indirect_pool == NULL)
+ socket_indirect_pool = _eth_mbuf_pool_inderect;
+}
+
+/* Init NIC port, then start the port */
+void xran_init_port(int p_id, struct ether_addr *p_lls_cu_addr)
+{
+ static uint16_t nb_rxd = BURST_SIZE;
+ static uint16_t nb_txd = BURST_SIZE;
+ struct ether_addr addr;
+ struct rte_eth_rxmode rxmode =
+ { .split_hdr_size = 0,
+ .max_rx_pkt_len = MAX_RX_LEN,
+ .offloads=(DEV_RX_OFFLOAD_JUMBO_FRAME|DEV_RX_OFFLOAD_CRC_STRIP)
+ };
+ struct rte_eth_txmode txmode = {
+ .mq_mode = ETH_MQ_TX_NONE
+ };
+ struct rte_eth_conf port_conf = {
+ .rxmode = rxmode,
+ .txmode = txmode
+ };
+ struct rte_eth_rxconf rxq_conf;
+ struct rte_eth_txconf txq_conf;
+
+ int ret;
+ struct rte_eth_dev_info dev_info;
+ const char *drv_name = "";
+ int sock_id = rte_eth_dev_socket_id(p_id);
+
+ rte_eth_dev_info_get(p_id, &dev_info);
+ if (dev_info.driver_name)
+ drv_name = dev_info.driver_name;
+ printf("initializing port %d for TX, drv=%s\n", p_id, drv_name);
+
+ rte_eth_macaddr_get(p_id, &addr);
+
+ printf("Port %u MAC: %02"PRIx8" %02"PRIx8" %02"PRIx8
+ " %02"PRIx8" %02"PRIx8" %02"PRIx8"\n",
+ (unsigned)p_id,
+ addr.addr_bytes[0], addr.addr_bytes[1], addr.addr_bytes[2],
+ addr.addr_bytes[3], addr.addr_bytes[4], addr.addr_bytes[5]);
+
+ /* Init port */
+ ret = rte_eth_dev_configure(p_id, 1, 1, &port_conf);
+ if (ret < 0)
+ rte_panic("Cannot configure port %u (%d)\n", p_id, ret);
+
+ ret = rte_eth_dev_adjust_nb_rx_tx_desc(p_id, &nb_rxd,&nb_txd);
+
+ if (ret < 0) {
+ printf("\n");
+ rte_exit(EXIT_FAILURE, "Cannot adjust number of "
+ "descriptors: err=%d, port=%d\n", ret, p_id);
+ }
+ printf("Port %u: nb_rxd %d nb_txd %d\n", p_id, nb_rxd, nb_txd);
+
+ /* Init RX queues */
+ rxq_conf = dev_info.default_rxconf;
+ ret = rte_eth_rx_queue_setup(p_id, 0, nb_rxd,
+ sock_id, &rxq_conf, _eth_mbuf_pool_rx);
+ if (ret < 0)
+ rte_panic("Cannot init RX for port %u (%d)\n",
+ p_id, ret);
+
+ /* Init TX queues */
+ txq_conf = dev_info.default_txconf;
+ ret = rte_eth_tx_queue_setup(p_id, 0, nb_txd, sock_id, &txq_conf);
+ if (ret < 0)
+ rte_panic("Cannot init TX for port %u (%d)\n",
+ p_id, ret);
+
+ /* Start port */
+ ret = rte_eth_dev_start(p_id);
+ if (ret < 0)
+ rte_panic("Cannot start port %u (%d)\n", p_id, ret);
+
+// rte_eth_promiscuous_enable(p_id);
+}
+
+#if 0
+void xran_memdump(void *addr, int len)
+{
+ int i;
+ char tmp_buf[len * 2 + len / 16 + 1];
+ char *p = tmp_buf;
+
+ return;
+#if 0
+ for (i = 0; i < len; ++i) {
+ sprintf(p, "%.2X ", ((uint8_t *)addr)[i]);
+ if (i % 16 == 15)
+ *p++ = '\n';
+ }
+ *p = 0;
+ nlog("%s", tmp_buf);
+#endif
+}
+
+/* Prepend ethernet header, possibly vlan tag. */
+void xran_add_eth_hdr(struct ether_addr *dst, uint16_t ethertype, struct rte_mbuf *mb)
+{
+ /* add in the ethernet header */
+ struct ether_hdr *const h = (void *)rte_pktmbuf_prepend(mb, sizeof(*h));
+
+ PANIC_ON(h == NULL, "mbuf prepend of ether_hdr failed");
+
+ /* Fill in the ethernet header. */
+ rte_eth_macaddr_get(mb->port, &h->s_addr); /* set source addr */
+ h->d_addr = *dst; /* set dst addr */
+ h->ether_type = rte_cpu_to_be_16(ethertype); /* ethertype too */
+
+#if defined(DPDKIO_DEBUG) && DPDKIO_DEBUG > 1
+ {
+ char dst[ETHER_ADDR_FMT_SIZE] = "(empty)";
+ char src[ETHER_ADDR_FMT_SIZE] = "(empty)";
+
+ nlog("*** packet for TX below (len %d) ***", rte_pktmbuf_pkt_len(mb));
+ ether_format_addr(src, sizeof(src), &h->s_addr);
+ ether_format_addr(dst, sizeof(dst), &h->d_addr);
+ nlog("src: %s dst: %s ethertype: %.4X", src, dst, ethertype);
+ }
+#endif
+#ifdef VLAN_SUPPORT
+ mb->vlan_tci = FLEXRAN_UP_VLAN_TAG;
+ dlog("Inserting vlan tag of %d", FLEXRAN_UP_VLAN_TAG);
+ rte_vlan_insert(&mb);
+#endif
+}
+
+int xran_send_mbuf(struct ether_addr *dst, struct rte_mbuf *mb)
+{
+ xran_add_eth_hdr(dst, ETHER_TYPE_ETHDI, mb);
+
+ if (rte_eth_tx_burst(mb->port, 0, &mb, 1) == 1)
+ return 1;
+
+ elog("packet sending failed on port %d", mb->port);
+ rte_pktmbuf_free(mb);
+
+ return 0; /* fail */
+}
+
+int xran_send_message_burst(int dst_id, int pkt_type, void *body, int len)
+{
+ struct rte_mbuf *mbufs[BURST_SIZE];
+ int i;
+ uint8_t *src = body;
+ const struct xran_ethdi_ctx *const ctx = xran_ethdi_get_ctx();
+
+ /* We're limited by maximum mbuf size on the receive size.
+ * We can change this but this would be a bigger rework. */
+ RTE_ASSERT(len < MBUF_POOL_ELM_BIG);
+
+ /* Allocate the required number of mbufs. */
+ const uint8_t count = ceilf((float)len / MAX_DATA_SIZE);
+ if (rte_pktmbuf_alloc_bulk(_eth_mbuf_pool, mbufs, count) != 0)
+ rte_panic("Failed to allocate %d mbufs\n", count);
+
+ nlog("burst transfer with data size %lu", MAX_DATA_SIZE);
+ for (i = 0; len > 0; ++i) {
+ char *p;
+ struct burst_hdr *bhdr;
+ struct ethdi_hdr *edi_hdr;
+
+ /* Setup the ethdi_hdr. */
+ edi_hdr = (void *)rte_pktmbuf_append(mbufs[i], sizeof(*edi_hdr));
+ if (edi_hdr == NULL)
+ rte_panic("append of ethdi_hdr failed\n");
+ edi_hdr->pkt_type = PKT_BURST;
+ /* edi_hdr->source_id setup in tx_from_ring */
+ edi_hdr->dest_id = dst_id;
+
+ /* Setup the burst header */
+ bhdr = (void *)rte_pktmbuf_append(mbufs[i], sizeof(*bhdr));
+ if (bhdr == NULL) /* append failed. */
+ rte_panic("mbuf prepend of burst_hdr failed\n");
+ bhdr->original_type = pkt_type;
+ bhdr->pkt_idx = i; /* save the index of the burst chunk. */
+ bhdr->total_pkts = count;
+
+ /* now copy in the actual data */
+ const int curr_data_len = RTE_MIN(len, MAX_TX_LEN -
+ rte_pktmbuf_pkt_len(mbufs[i]) - sizeof(struct ether_hdr));
+ p = (void *)rte_pktmbuf_append(mbufs[i], curr_data_len);
+ if (p == NULL)
+ rte_panic("mbuf append of %d data bytes failed\n", curr_data_len);
+ /* This copy is unavoidable, as we're splitting one big buffer
+ * into multiple mbufs. */
+ rte_memcpy(p, src, curr_data_len);
+
+ dlog("curr_data_len[%d] = %d", i, curr_data_len);
+ dlog("packet %d size %d", i, rte_pktmbuf_pkt_len(mbufs[i]));
+
+ /* Update our source data pointer and remaining length. */
+ len -= curr_data_len;
+ src += curr_data_len;
+ }
+
+ /* Now enqueue the full prepared burst. */
+ i = rte_ring_enqueue_bulk(ctx->tx_ring[0], (void **)mbufs, count, NULL);
+ PANIC_ON(i != count, "failed to enqueue all mbufs: %d/%d", i, count);
+ dlog("%d packets enqueued on port %d.", count, ctx->io_cfg.port);
+
+ return 1;
+}
+
+#endif
+
+/* Prepend ethernet header, possibly vlan tag. */
+void xran_add_eth_hdr_vlan(struct ether_addr *dst, uint16_t ethertype, struct rte_mbuf *mb, uint16_t vlan_tci)
+{
+ /* add in the ethernet header */
+ struct ether_hdr *h = (struct ether_hdr *)rte_pktmbuf_mtod(mb, struct ether_hdr*);
+
+ PANIC_ON(h == NULL, "mbuf prepend of ether_hdr failed");
+
+ /* Fill in the ethernet header. */
+ rte_eth_macaddr_get(mb->port, &h->s_addr); /* set source addr */
+ h->d_addr = *dst; /* set dst addr */
+ h->ether_type = rte_cpu_to_be_16(ethertype); /* ethertype too */
+
+#if defined(DPDKIO_DEBUG) && DPDKIO_DEBUG > 1
+ {
+ char dst[ETHER_ADDR_FMT_SIZE] = "(empty)";
+ char src[ETHER_ADDR_FMT_SIZE] = "(empty)";
+
+ nlog("*** packet for TX below (len %d) ***", rte_pktmbuf_pkt_len(mb));
+ ether_format_addr(src, sizeof(src), &h->s_addr);
+ ether_format_addr(dst, sizeof(dst), &h->d_addr);
+ nlog("src: %s dst: %s ethertype: %.4X", src, dst, ethertype);
+ }
+#endif
+#ifdef VLAN_SUPPORT
+ mb->vlan_tci = vlan_tci;
+ dlog("Inserting vlan tag of %d", vlan_tci);
+ rte_vlan_insert(&mb);
+#endif
+}
+
+
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/**\r
- * @brief This file has all definitions for the Ethernet Data Interface Layer\r
- * @file ethernet.h\r
- * @ingroup group_lte_source_auxlib\r
- * @author Intel Corporation\r
- **/\r
-\r
-#ifndef AUXLIB_ETHERNET_H\r
-#define AUXLIB_ETHERNET_H\r
-\r
-#ifdef __cplusplus\r
-extern "C" {\r
-#endif\r
-\r
-#include <rte_config.h>\r
-#include <rte_ether.h>\r
-#include <rte_mbuf.h>\r
-\r
-#define BURST_SIZE 4096\r
-\r
-//#define VLAN_SUPPORT\r
-#define FLEXRAN_UP_VLAN_TAG 2\r
-#define ETHER_TYPE_ETHDI ETHER_TYPE_IPv4 /* hack needed for jumbo frames */\r
-#define ETHER_TYPE_ECPRI 0xAEFE\r
-#define ETHER_TYPE_SYNC 0xBEFE\r
-#define ETHER_TYPE_START_TX 0xCEFE\r
-\r
-#define NUM_MBUFS 65536\r
-#define MBUF_CACHE 256\r
-\r
-#define MBUF_POOL_ELM_SMALL 1500 /* regular ethernet MTU, most compatible */\r
-#define MBUF_POOL_ELEMENT MAX_RX_LEN\r
-\r
-#define MAX_RX_LEN 9600\r
-#define MAX_TX_LEN (MAX_RX_LEN - 14) /* headroom for rx driver */\r
-#define MAX_DATA_SIZE (MAX_TX_LEN - sizeof(struct ether_hdr) - \\r
- sizeof(struct ethdi_hdr) - sizeof(struct burst_hdr))\r
-\r
-/* Looks like mbuf size is limited to 16 bits - see the buf_len field. */\r
-#define MBUF_POOL_ELM_BIG USHRT_MAX\r
-#define NUM_MBUFS_BIG 64\r
-\r
-#define DEFAULT_DUMP_LENGTH 96\r
-\r
-extern struct rte_mempool *_eth_mbuf_pool;\r
-extern struct rte_mempool *_eth_mbuf_pool_small;\r
-extern struct rte_mempool *_eth_mbuf_pool_big;\r
-extern struct rte_mempool *socket_direct_pool;\r
-extern struct rte_mempool *socket_indirect_pool;\r
-\r
-/* Do NOT change the order of this enum and below\r
- * - need to be in sync with the table of handlers in testue.c */\r
-enum pkt_type\r
-{\r
- PKT_ZERO,\r
- PKT_EMPTY,\r
- PKT_DISCOVER_REQUEST,\r
- PKT_PING,\r
- PKT_PONG,\r
- PKT_DISCOVER_REPLY,\r
- PKT_LTE_DATA,\r
- PKT_LTE_CONTROL,\r
- PKT_BURST,\r
- PKT_DATATEST,\r
- PKT_ADD_ETHDEV,\r
- PKT_SYNC_START,\r
- PKT_LAST,\r
-};\r
-\r
-/* Do NOT change the order. */\r
-static char * const xran_pkt_descriptions[PKT_LAST + 1] = {\r
- "ZERO",\r
- "empty packet",\r
- "discovery request packet",\r
- "ping packet",\r
- "pong packet",\r
- "discovery reply packet",\r
- "LTE data packet",\r
- "LTE control packet",\r
- "BURST packet",\r
- "DATATEST packet",\r
- "Add ethernet port command packet",\r
- "SYNC-START packet",\r
- "LAST packet",\r
-};\r
-\r
-struct burst_hdr {\r
- int8_t pkt_idx;\r
- int8_t total_pkts;\r
- int8_t original_type;\r
- int8_t data[];\r
-};\r
-\r
-struct ethdi_hdr {\r
- uint8_t pkt_type;\r
- uint8_t source_id;\r
- uint8_t dest_id;\r
- int8_t data[]; /* original raw data starts here! */\r
-};\r
-\r
-\r
-void xran_init_mbuf_pool(void);\r
-\r
-void xran_init_port(int port, struct ether_addr *p_lls_cu_addr);\r
-\r
-void xran_add_eth_hdr_vlan(struct ether_addr *dst, uint16_t ethertype, struct rte_mbuf *mb, uint16_t vlan_tci);\r
-\r
-#if 0\r
-void xran_memdump(void *addr, int len);\r
-void xran_add_eth_hdr(struct ether_addr *dst, uint16_t ethertype, struct rte_mbuf *);\r
-int xran_send_mbuf(struct ether_addr *dst, struct rte_mbuf *mb);\r
-int xran_send_message_burst(int dst_id, int pkt_type, void *body, int len);\r
-int xran_show_delayed_message(void);\r
-#endif\r
-/*\r
- * Print a message after all critical processing done.\r
- * Mt-safe. 4 variants - normal, warning, error and debug log.\r
- */\r
-int __xran_delayed_msg(const char *fmt, ...);\r
-#define nlog(m, ...) __xran_delayed_msg("%s(): " m "\n", __FUNCTION__, ##__VA_ARGS__)\r
-#define delayed_message nlog /* this is the old alias for this function */\r
-#define wlog(m, ...) nlog("WARNING: " m, ##__VA_ARGS__)\r
-#define elog(m, ...) nlog("ERROR: " m, ##__VA_ARGS__)\r
-#ifdef DEBUG\r
-# define dlog(m, ...) nlog("DEBUG: " m, ##__VA_ARGS__)\r
-#else\r
-# define dlog(m, ...)\r
-#endif\r
-\r
-#define PANIC_ON(x, m, ...) do { if (unlikely(x)) \\r
- rte_panic("%s: " m "\n", #x, ##__VA_ARGS__); } while (0)\r
-\r
-/* Add mbuf to the TX ring. */\r
-static inline int xran_enqueue_mbuf(struct rte_mbuf *mb, struct rte_ring *r)\r
-{\r
- if (rte_ring_enqueue(r, mb) == 0) {\r
- return 1; /* success */\r
- }\r
-\r
- rte_pktmbuf_free(mb);\r
- wlog("failed to enqueue packet on port %d (ring full)", mb->port);\r
-\r
- return 0; /* fail */\r
-}\r
-\r
-#ifdef __cplusplus\r
-}\r
-#endif\r
-\r
-#endif /* AUXLIB_ETHERNET_H */\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief This file has all definitions for the Ethernet Data Interface Layer
+ * @file ethernet.h
+ * @ingroup group_lte_source_auxlib
+ * @author Intel Corporation
+ **/
+
+#ifndef AUXLIB_ETHERNET_H
+#define AUXLIB_ETHERNET_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <rte_config.h>
+#include <rte_ether.h>
+#include <rte_mbuf.h>
+
+#define BURST_SIZE 4096
+
+//#define VLAN_SUPPORT
+#define FLEXRAN_UP_VLAN_TAG 2
+#define ETHER_TYPE_ETHDI ETHER_TYPE_IPv4 /* hack needed for jumbo frames */
+#define ETHER_TYPE_ECPRI 0xAEFE
+#define ETHER_TYPE_SYNC 0xBEFE
+#define ETHER_TYPE_START_TX 0xCEFE
+
+#define NUM_MBUFS 65536
+#define MBUF_CACHE 256
+
+#define MBUF_POOL_ELM_SMALL 1500 /* regular ethernet MTU, most compatible */
+#define MBUF_POOL_ELEMENT MAX_RX_LEN
+
+#define MAX_RX_LEN 9600
+#define MAX_TX_LEN (MAX_RX_LEN - 14) /* headroom for rx driver */
+#define MAX_DATA_SIZE (MAX_TX_LEN - sizeof(struct ether_hdr) - \
+ sizeof(struct ethdi_hdr) - sizeof(struct burst_hdr))
+
+/* Looks like mbuf size is limited to 16 bits - see the buf_len field. */
+#define MBUF_POOL_ELM_BIG USHRT_MAX
+#define NUM_MBUFS_BIG 64
+
+#define DEFAULT_DUMP_LENGTH 96
+
+extern struct rte_mempool *_eth_mbuf_pool;
+extern struct rte_mempool *_eth_mbuf_pool_small;
+extern struct rte_mempool *_eth_mbuf_pool_big;
+extern struct rte_mempool *socket_direct_pool;
+extern struct rte_mempool *socket_indirect_pool;
+
+/* Do NOT change the order of this enum and below
+ * - need to be in sync with the table of handlers in testue.c */
+enum pkt_type
+{
+ PKT_ZERO,
+ PKT_EMPTY,
+ PKT_DISCOVER_REQUEST,
+ PKT_PING,
+ PKT_PONG,
+ PKT_DISCOVER_REPLY,
+ PKT_LTE_DATA,
+ PKT_LTE_CONTROL,
+ PKT_BURST,
+ PKT_DATATEST,
+ PKT_ADD_ETHDEV,
+ PKT_SYNC_START,
+ PKT_LAST,
+};
+
+/* Do NOT change the order. */
+static char * const xran_pkt_descriptions[PKT_LAST + 1] = {
+ "ZERO",
+ "empty packet",
+ "discovery request packet",
+ "ping packet",
+ "pong packet",
+ "discovery reply packet",
+ "LTE data packet",
+ "LTE control packet",
+ "BURST packet",
+ "DATATEST packet",
+ "Add ethernet port command packet",
+ "SYNC-START packet",
+ "LAST packet",
+};
+
+struct burst_hdr {
+ int8_t pkt_idx;
+ int8_t total_pkts;
+ int8_t original_type;
+ int8_t data[];
+};
+
+struct ethdi_hdr {
+ uint8_t pkt_type;
+ uint8_t source_id;
+ uint8_t dest_id;
+ int8_t data[]; /* original raw data starts here! */
+};
+
+
+void xran_init_mbuf_pool(void);
+
+void xran_init_port(int port, struct ether_addr *p_lls_cu_addr);
+
+void xran_add_eth_hdr_vlan(struct ether_addr *dst, uint16_t ethertype, struct rte_mbuf *mb, uint16_t vlan_tci);
+
+#if 0
+void xran_memdump(void *addr, int len);
+void xran_add_eth_hdr(struct ether_addr *dst, uint16_t ethertype, struct rte_mbuf *);
+int xran_send_mbuf(struct ether_addr *dst, struct rte_mbuf *mb);
+int xran_send_message_burst(int dst_id, int pkt_type, void *body, int len);
+int xran_show_delayed_message(void);
+#endif
+/*
+ * Print a message after all critical processing done.
+ * Mt-safe. 4 variants - normal, warning, error and debug log.
+ */
+int __xran_delayed_msg(const char *fmt, ...);
+#define nlog(m, ...) __xran_delayed_msg("%s(): " m "\n", __FUNCTION__, ##__VA_ARGS__)
+#define delayed_message nlog /* this is the old alias for this function */
+#define wlog(m, ...) nlog("WARNING: " m, ##__VA_ARGS__)
+#define elog(m, ...) nlog("ERROR: " m, ##__VA_ARGS__)
+#ifdef DEBUG
+# define dlog(m, ...) nlog("DEBUG: " m, ##__VA_ARGS__)
+#else
+# define dlog(m, ...)
+#endif
+
+#define PANIC_ON(x, m, ...) do { if (unlikely(x)) \
+ rte_panic("%s: " m "\n", #x, ##__VA_ARGS__); } while (0)
+
+/* Add mbuf to the TX ring. */
+static inline int xran_enqueue_mbuf(struct rte_mbuf *mb, struct rte_ring *r)
+{
+ if (rte_ring_enqueue(r, mb) == 0) {
+ return 1; /* success */
+ }
+
+ rte_pktmbuf_free(mb);
+ wlog("failed to enqueue packet on port %d (ring full)", mb->port);
+
+ return 0; /* fail */
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AUXLIB_ETHERNET_H */
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/**\r
- * @brief xRAN application frgamentation for U-plane packets\r
- *\r
- * @file xran_app_frag.c\r
- * @ingroup group_source_xran\r
- * @author Intel Corporation\r
- **/\r
-\r
-#include <stdio.h>\r
-#include <stddef.h>\r
-#include <errno.h>\r
-\r
-#include <rte_mbuf.h>\r
-#include <rte_memcpy.h>\r
-#include <rte_mempool.h>\r
-#include <rte_debug.h>\r
-\r
-#include "xran_app_frag.h"\r
-#include "xran_cp_api.h"\r
-#include "xran_pkt_up.h"\r
-#include "xran_printf.h"\r
-#include "xran_common.h"\r
-\r
-/* Fragment alignment */\r
-#define XRAN_PAYLOAD_RB_ALIGN (N_SC_PER_PRB*(IQ_BITS/8)*2) /**< at least 12*4=48 bytes per one RB */\r
-\r
-static inline void __fill_xranhdr_frag(struct xran_up_pkt_hdr *dst,\r
- const struct xran_up_pkt_hdr *src, uint16_t rblen_bytes,\r
- uint16_t rboff_bytes, struct xran_section_info *sectinfo, uint32_t mf, uint8_t *seqid)\r
-{\r
- struct data_section_hdr loc_data_sec_hdr;\r
- struct xran_ecpri_hdr loc_ecpri_hdr;\r
-\r
- rte_memcpy(dst, src, sizeof(*dst));\r
-\r
- dst->ecpri_hdr.ecpri_seq_id.seq_id = (*seqid)++;\r
-\r
- print_dbg("sec [%d %d] sec %d mf %d g_sec %d\n",sectinfo->startPrbc, sectinfo->numPrbc, dst->ecpri_hdr.ecpri_seq_id.seq_id, mf, *seqid);\r
-\r
- loc_data_sec_hdr.fields.all_bits = rte_be_to_cpu_32(dst->data_sec_hdr.fields.all_bits);\r
-\r
- /* update RBs */\r
- loc_data_sec_hdr.fields.start_prbu = sectinfo->startPrbc + rboff_bytes/(N_SC_PER_PRB*(IQ_BITS/8*2));\r
- loc_data_sec_hdr.fields.num_prbu = rblen_bytes/(N_SC_PER_PRB*(IQ_BITS/8*2));\r
-\r
- print_dbg("sec [%d %d] pkt [%d %d] rboff_bytes %d rblen_bytes %d\n",sectinfo->startPrbc, sectinfo->numPrbc, loc_data_sec_hdr.fields.start_prbu, loc_data_sec_hdr.fields.num_prbu,\r
- rboff_bytes, rblen_bytes);\r
-\r
- dst->data_sec_hdr.fields.all_bits = rte_cpu_to_be_32(loc_data_sec_hdr.fields.all_bits);\r
-\r
- /* update length */\r
- dst->ecpri_hdr.cmnhdr.ecpri_payl_size = rte_cpu_to_be_16(sizeof(struct radio_app_common_hdr) +\r
- sizeof(struct data_section_hdr) + rblen_bytes + xran_get_ecpri_hdr_size());\r
-}\r
-\r
-\r
-static inline void __free_fragments(struct rte_mbuf *mb[], uint32_t num)\r
-{\r
- uint32_t i;\r
- for (i = 0; i != num; i++)\r
- rte_pktmbuf_free(mb[i]);\r
-}\r
-\r
-/**\r
- * XRAN fragmentation.\r
- *\r
- * This function implements the application fragmentation of XRAN packets.\r
- *\r
- * @param pkt_in\r
- * The input packet.\r
- * @param pkts_out\r
- * Array storing the output fragments.\r
- * @param mtu_size\r
- * Size in bytes of the Maximum Transfer Unit (MTU) for the outgoing XRAN\r
- * datagrams. This value includes the size of the XRAN headers.\r
- * @param pool_direct\r
- * MBUF pool used for allocating direct buffers for the output fragments.\r
- * @param pool_indirect\r
- * MBUF pool used for allocating indirect buffers for the output fragments.\r
- * @return\r
- * Upon successful completion - number of output fragments placed\r
- * in the pkts_out array.\r
- * Otherwise - (-1) * <errno>.\r
- */\r
-int32_t\r
-xran_app_fragment_packet(struct rte_mbuf *pkt_in, /* eth hdr is prepended */\r
- struct rte_mbuf **pkts_out,\r
- uint16_t nb_pkts_out,\r
- uint16_t mtu_size,\r
- struct rte_mempool *pool_direct,\r
- struct rte_mempool *pool_indirect,\r
- struct xran_section_info *sectinfo,\r
- uint8_t *seqid)\r
-{\r
- struct rte_mbuf *in_seg = NULL;\r
- uint32_t out_pkt_pos = 0, in_seg_data_pos = 0;\r
- uint32_t more_in_segs;\r
- uint16_t fragment_offset, frag_size;\r
- uint16_t frag_bytes_remaining;\r
- struct eth_xran_up_pkt_hdr *in_hdr;\r
- struct xran_up_pkt_hdr *in_hdr_xran;\r
-\r
- /*\r
- * Ensure the XRAN payload length of all fragments is aligned to a\r
- * multiple of 48 bytes (1 RB with IQ of 16 bits each)\r
- */\r
- frag_size = ((mtu_size - sizeof(struct eth_xran_up_pkt_hdr) - RTE_PKTMBUF_HEADROOM)/XRAN_PAYLOAD_RB_ALIGN)*XRAN_PAYLOAD_RB_ALIGN;\r
-\r
-\r
- print_dbg("frag_size %d\n",frag_size);\r
-\r
- in_hdr = rte_pktmbuf_mtod(pkt_in, struct eth_xran_up_pkt_hdr *);\r
-\r
- in_hdr_xran = &in_hdr->xran_hdr;\r
-\r
- /* Check that pkts_out is big enough to hold all fragments */\r
- if (unlikely(frag_size * nb_pkts_out <\r
- (uint16_t)(pkt_in->pkt_len - sizeof (struct xran_up_pkt_hdr)))){\r
- print_err("-EINVAL\n");\r
- return -EINVAL;\r
- }\r
-\r
- in_seg = pkt_in;\r
- in_seg_data_pos = sizeof(struct eth_xran_up_pkt_hdr);\r
- out_pkt_pos = 0;\r
- fragment_offset = 0;\r
-\r
- more_in_segs = 1;\r
- while (likely(more_in_segs)) {\r
- struct rte_mbuf *out_pkt = NULL, *out_seg_prev = NULL;\r
- uint32_t more_out_segs;\r
- struct xran_up_pkt_hdr *out_hdr;\r
-\r
- /* Allocate direct buffer */\r
- out_pkt = rte_pktmbuf_alloc(pool_direct);\r
- if (unlikely(out_pkt == NULL)) {\r
- print_err("pool_direct -ENOMEM\n");\r
- __free_fragments(pkts_out, out_pkt_pos);\r
- return -ENOMEM;\r
- }\r
-\r
- print_dbg("[%d] out_pkt %p\n",more_in_segs, out_pkt);\r
-\r
- /* Reserve space for the XRAN header that will be built later */\r
- //out_pkt->data_len = sizeof(struct xran_up_pkt_hdr);\r
- //out_pkt->pkt_len = sizeof(struct xran_up_pkt_hdr);\r
- if(rte_pktmbuf_append(out_pkt, sizeof(struct xran_up_pkt_hdr)) ==NULL){\r
- rte_panic("sizeof(struct xran_up_pkt_hdr)");\r
- }\r
- frag_bytes_remaining = frag_size;\r
-\r
- out_seg_prev = out_pkt;\r
- more_out_segs = 1;\r
- while (likely(more_out_segs && more_in_segs)) {\r
- uint32_t len;\r
-#ifdef XRAN_ATTACH_MBUF\r
- struct rte_mbuf *out_seg = NULL;\r
-\r
- /* Allocate indirect buffer */\r
- print_dbg("Allocate indirect buffer \n");\r
- out_seg = rte_pktmbuf_alloc(pool_indirect);\r
- if (unlikely(out_seg == NULL)) {\r
- print_err("pool_indirect -ENOMEM\n");\r
- rte_pktmbuf_free(out_pkt);\r
- __free_fragments(pkts_out, out_pkt_pos);\r
- return -ENOMEM;\r
- }\r
-\r
- print_dbg("[%d %d] out_seg %p\n",more_out_segs, more_in_segs, out_seg);\r
- out_seg_prev->next = out_seg;\r
- out_seg_prev = out_seg;\r
-\r
- /* Prepare indirect buffer */\r
- rte_pktmbuf_attach(out_seg, in_seg);\r
-#endif\r
- len = frag_bytes_remaining;\r
- if (len > (in_seg->data_len - in_seg_data_pos)) {\r
- len = in_seg->data_len - in_seg_data_pos;\r
- }\r
-#ifdef XRAN_ATTACH_MBUF\r
- out_seg->data_off = in_seg->data_off + in_seg_data_pos;\r
- out_seg->data_len = (uint16_t)len;\r
- out_pkt->pkt_len = (uint16_t)(len +\r
- out_pkt->pkt_len);\r
- out_pkt->nb_segs += 1;\r
-#else\r
-{\r
- char* pChar = rte_pktmbuf_mtod(in_seg, char*);\r
- void *iq_src = (pChar + in_seg_data_pos);\r
- void *iq_dst = rte_pktmbuf_append(out_pkt, len);\r
-\r
- print_dbg("rte_pktmbuf_attach\n");\r
- if(iq_src && iq_dst)\r
- rte_memcpy(iq_dst, iq_src, len);\r
- else\r
- print_err("iq_src %p iq_dst %p\n len %d room %d\n", iq_src, iq_dst, len, rte_pktmbuf_tailroom(out_pkt));\r
-}\r
-#endif\r
- in_seg_data_pos += len;\r
- frag_bytes_remaining -= len;\r
-\r
- /* Current output packet (i.e. fragment) done ? */\r
- if (unlikely(frag_bytes_remaining == 0))\r
- more_out_segs = 0;\r
-\r
- /* Current input segment done ? */\r
- if (unlikely(in_seg_data_pos == in_seg->data_len)) {\r
- in_seg = in_seg->next;\r
- in_seg_data_pos = 0;\r
-\r
- if (unlikely(in_seg == NULL))\r
- more_in_segs = 0;\r
- }\r
- }\r
-\r
- /* Build the XRAN header */\r
- print_dbg("Build the XRAN header\n");\r
- out_hdr = rte_pktmbuf_mtod(out_pkt, struct xran_up_pkt_hdr *);\r
-\r
- __fill_xranhdr_frag(out_hdr, in_hdr_xran,\r
- (uint16_t)out_pkt->pkt_len - sizeof(struct xran_up_pkt_hdr),\r
- fragment_offset, sectinfo, more_in_segs, seqid);\r
-\r
- fragment_offset = (uint16_t)(fragment_offset +\r
- out_pkt->pkt_len - sizeof(struct xran_up_pkt_hdr));\r
-\r
- //out_pkt->l3_len = sizeof(struct xran_up_pkt_hdr);\r
-\r
- /* Write the fragment to the output list */\r
- pkts_out[out_pkt_pos] = out_pkt;\r
- print_dbg("out_pkt_pos %d data_len %d pkt_len %d\n", out_pkt_pos, out_pkt->data_len, out_pkt->pkt_len);\r
- out_pkt_pos ++;\r
- //rte_pktmbuf_dump(stdout, out_pkt, 96);\r
- }\r
-\r
- return out_pkt_pos;\r
-}\r
-\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief xRAN application frgamentation for U-plane packets
+ *
+ * @file xran_app_frag.c
+ * @ingroup group_source_xran
+ * @author Intel Corporation
+ **/
+
+#include <stdio.h>
+#include <stddef.h>
+#include <errno.h>
+
+#include <rte_mbuf.h>
+#include <rte_memcpy.h>
+#include <rte_mempool.h>
+#include <rte_debug.h>
+
+#include "xran_app_frag.h"
+#include "xran_cp_api.h"
+#include "xran_pkt_up.h"
+#include "xran_printf.h"
+#include "xran_common.h"
+
+/* Fragment alignment */
+#define XRAN_PAYLOAD_RB_ALIGN (N_SC_PER_PRB*(IQ_BITS/8)*2) /**< at least 12*4=48 bytes per one RB */
+
+static inline void __fill_xranhdr_frag(struct xran_up_pkt_hdr *dst,
+ const struct xran_up_pkt_hdr *src, uint16_t rblen_bytes,
+ uint16_t rboff_bytes, struct xran_section_info *sectinfo, uint32_t mf, uint8_t *seqid)
+{
+ struct data_section_hdr loc_data_sec_hdr;
+ struct xran_ecpri_hdr loc_ecpri_hdr;
+
+ rte_memcpy(dst, src, sizeof(*dst));
+
+ dst->ecpri_hdr.ecpri_seq_id.seq_id = (*seqid)++;
+
+ print_dbg("sec [%d %d] sec %d mf %d g_sec %d\n",sectinfo->startPrbc, sectinfo->numPrbc, dst->ecpri_hdr.ecpri_seq_id.seq_id, mf, *seqid);
+
+ loc_data_sec_hdr.fields.all_bits = rte_be_to_cpu_32(dst->data_sec_hdr.fields.all_bits);
+
+ /* update RBs */
+ loc_data_sec_hdr.fields.start_prbu = sectinfo->startPrbc + rboff_bytes/(N_SC_PER_PRB*(IQ_BITS/8*2));
+ loc_data_sec_hdr.fields.num_prbu = rblen_bytes/(N_SC_PER_PRB*(IQ_BITS/8*2));
+
+ print_dbg("sec [%d %d] pkt [%d %d] rboff_bytes %d rblen_bytes %d\n",sectinfo->startPrbc, sectinfo->numPrbc, loc_data_sec_hdr.fields.start_prbu, loc_data_sec_hdr.fields.num_prbu,
+ rboff_bytes, rblen_bytes);
+
+ dst->data_sec_hdr.fields.all_bits = rte_cpu_to_be_32(loc_data_sec_hdr.fields.all_bits);
+
+ /* update length */
+ dst->ecpri_hdr.cmnhdr.ecpri_payl_size = rte_cpu_to_be_16(sizeof(struct radio_app_common_hdr) +
+ sizeof(struct data_section_hdr) + rblen_bytes + xran_get_ecpri_hdr_size());
+}
+
+
+static inline void __free_fragments(struct rte_mbuf *mb[], uint32_t num)
+{
+ uint32_t i;
+ for (i = 0; i != num; i++)
+ rte_pktmbuf_free(mb[i]);
+}
+
+/**
+ * XRAN fragmentation.
+ *
+ * This function implements the application fragmentation of XRAN packets.
+ *
+ * @param pkt_in
+ * The input packet.
+ * @param pkts_out
+ * Array storing the output fragments.
+ * @param mtu_size
+ * Size in bytes of the Maximum Transfer Unit (MTU) for the outgoing XRAN
+ * datagrams. This value includes the size of the XRAN headers.
+ * @param pool_direct
+ * MBUF pool used for allocating direct buffers for the output fragments.
+ * @param pool_indirect
+ * MBUF pool used for allocating indirect buffers for the output fragments.
+ * @return
+ * Upon successful completion - number of output fragments placed
+ * in the pkts_out array.
+ * Otherwise - (-1) * <errno>.
+ */
+int32_t
+xran_app_fragment_packet(struct rte_mbuf *pkt_in, /* eth hdr is prepended */
+ struct rte_mbuf **pkts_out,
+ uint16_t nb_pkts_out,
+ uint16_t mtu_size,
+ struct rte_mempool *pool_direct,
+ struct rte_mempool *pool_indirect,
+ struct xran_section_info *sectinfo,
+ uint8_t *seqid)
+{
+ struct rte_mbuf *in_seg = NULL;
+ uint32_t out_pkt_pos = 0, in_seg_data_pos = 0;
+ uint32_t more_in_segs;
+ uint16_t fragment_offset, frag_size;
+ uint16_t frag_bytes_remaining;
+ struct eth_xran_up_pkt_hdr *in_hdr;
+ struct xran_up_pkt_hdr *in_hdr_xran;
+
+ /*
+ * Ensure the XRAN payload length of all fragments is aligned to a
+ * multiple of 48 bytes (1 RB with IQ of 16 bits each)
+ */
+ frag_size = ((mtu_size - sizeof(struct eth_xran_up_pkt_hdr) - RTE_PKTMBUF_HEADROOM)/XRAN_PAYLOAD_RB_ALIGN)*XRAN_PAYLOAD_RB_ALIGN;
+
+
+ print_dbg("frag_size %d\n",frag_size);
+
+ in_hdr = rte_pktmbuf_mtod(pkt_in, struct eth_xran_up_pkt_hdr *);
+
+ in_hdr_xran = &in_hdr->xran_hdr;
+
+ /* Check that pkts_out is big enough to hold all fragments */
+ if (unlikely(frag_size * nb_pkts_out <
+ (uint16_t)(pkt_in->pkt_len - sizeof (struct xran_up_pkt_hdr)))){
+ print_err("-EINVAL\n");
+ return -EINVAL;
+ }
+
+ in_seg = pkt_in;
+ in_seg_data_pos = sizeof(struct eth_xran_up_pkt_hdr);
+ out_pkt_pos = 0;
+ fragment_offset = 0;
+
+ more_in_segs = 1;
+ while (likely(more_in_segs)) {
+ struct rte_mbuf *out_pkt = NULL, *out_seg_prev = NULL;
+ uint32_t more_out_segs;
+ struct xran_up_pkt_hdr *out_hdr;
+
+ /* Allocate direct buffer */
+ out_pkt = rte_pktmbuf_alloc(pool_direct);
+ if (unlikely(out_pkt == NULL)) {
+ print_err("pool_direct -ENOMEM\n");
+ __free_fragments(pkts_out, out_pkt_pos);
+ return -ENOMEM;
+ }
+
+ print_dbg("[%d] out_pkt %p\n",more_in_segs, out_pkt);
+
+ /* Reserve space for the XRAN header that will be built later */
+ //out_pkt->data_len = sizeof(struct xran_up_pkt_hdr);
+ //out_pkt->pkt_len = sizeof(struct xran_up_pkt_hdr);
+ if(rte_pktmbuf_append(out_pkt, sizeof(struct xran_up_pkt_hdr)) ==NULL){
+ rte_panic("sizeof(struct xran_up_pkt_hdr)");
+ }
+ frag_bytes_remaining = frag_size;
+
+ out_seg_prev = out_pkt;
+ more_out_segs = 1;
+ while (likely(more_out_segs && more_in_segs)) {
+ uint32_t len;
+#ifdef XRAN_ATTACH_MBUF
+ struct rte_mbuf *out_seg = NULL;
+
+ /* Allocate indirect buffer */
+ print_dbg("Allocate indirect buffer \n");
+ out_seg = rte_pktmbuf_alloc(pool_indirect);
+ if (unlikely(out_seg == NULL)) {
+ print_err("pool_indirect -ENOMEM\n");
+ rte_pktmbuf_free(out_pkt);
+ __free_fragments(pkts_out, out_pkt_pos);
+ return -ENOMEM;
+ }
+
+ print_dbg("[%d %d] out_seg %p\n",more_out_segs, more_in_segs, out_seg);
+ out_seg_prev->next = out_seg;
+ out_seg_prev = out_seg;
+
+ /* Prepare indirect buffer */
+ rte_pktmbuf_attach(out_seg, in_seg);
+#endif
+ len = frag_bytes_remaining;
+ if (len > (in_seg->data_len - in_seg_data_pos)) {
+ len = in_seg->data_len - in_seg_data_pos;
+ }
+#ifdef XRAN_ATTACH_MBUF
+ out_seg->data_off = in_seg->data_off + in_seg_data_pos;
+ out_seg->data_len = (uint16_t)len;
+ out_pkt->pkt_len = (uint16_t)(len +
+ out_pkt->pkt_len);
+ out_pkt->nb_segs += 1;
+#else
+{
+ char* pChar = rte_pktmbuf_mtod(in_seg, char*);
+ void *iq_src = (pChar + in_seg_data_pos);
+ void *iq_dst = rte_pktmbuf_append(out_pkt, len);
+
+ print_dbg("rte_pktmbuf_attach\n");
+ if(iq_src && iq_dst)
+ rte_memcpy(iq_dst, iq_src, len);
+ else
+ print_err("iq_src %p iq_dst %p\n len %d room %d\n", iq_src, iq_dst, len, rte_pktmbuf_tailroom(out_pkt));
+}
+#endif
+ in_seg_data_pos += len;
+ frag_bytes_remaining -= len;
+
+ /* Current output packet (i.e. fragment) done ? */
+ if (unlikely(frag_bytes_remaining == 0))
+ more_out_segs = 0;
+
+ /* Current input segment done ? */
+ if (unlikely(in_seg_data_pos == in_seg->data_len)) {
+ in_seg = in_seg->next;
+ in_seg_data_pos = 0;
+
+ if (unlikely(in_seg == NULL))
+ more_in_segs = 0;
+ }
+ }
+
+ /* Build the XRAN header */
+ print_dbg("Build the XRAN header\n");
+ out_hdr = rte_pktmbuf_mtod(out_pkt, struct xran_up_pkt_hdr *);
+
+ __fill_xranhdr_frag(out_hdr, in_hdr_xran,
+ (uint16_t)out_pkt->pkt_len - sizeof(struct xran_up_pkt_hdr),
+ fragment_offset, sectinfo, more_in_segs, seqid);
+
+ fragment_offset = (uint16_t)(fragment_offset +
+ out_pkt->pkt_len - sizeof(struct xran_up_pkt_hdr));
+
+ //out_pkt->l3_len = sizeof(struct xran_up_pkt_hdr);
+
+ /* Write the fragment to the output list */
+ pkts_out[out_pkt_pos] = out_pkt;
+ print_dbg("out_pkt_pos %d data_len %d pkt_len %d\n", out_pkt_pos, out_pkt->data_len, out_pkt->pkt_len);
+ out_pkt_pos ++;
+ //rte_pktmbuf_dump(stdout, out_pkt, 96);
+ }
+
+ return out_pkt_pos;
+}
+
+
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-\r
-/**\r
- * @brief Header file for functions to perform application level fragmentation\r
- *\r
- * @file xran_app_frag.h\r
- * @ingroup group_source_xran\r
- * @author Intel Corporation\r
- **/\r
-\r
-#ifndef _XRAN_APP_FRAG_\r
-#define _XRAN_APP_FRAG_\r
-\r
-#ifdef __cplusplus\r
-extern "C" {\r
-#endif\r
-\r
-#include <stdint.h>\r
-#include <stdio.h>\r
-\r
-#include <rte_config.h>\r
-#include <rte_malloc.h>\r
-#include <rte_memory.h>\r
-#include <rte_mempool.h>\r
-#include <rte_byteorder.h>\r
-\r
-#include "xran_fh_o_du.h"\r
-#include "xran_cp_api.h"\r
-\r
-int32_t xran_app_fragment_packet(struct rte_mbuf *pkt_in, /* eth hdr is prepended */\r
- struct rte_mbuf **pkts_out,\r
- uint16_t nb_pkts_out,\r
- uint16_t mtu_size,\r
- struct rte_mempool *pool_direct,\r
- struct rte_mempool *pool_indirect,\r
- struct xran_section_info *sectinfo,\r
- uint8_t *seqid);\r
-\r
-#ifdef __cplusplus\r
-}\r
-#endif\r
-\r
-#endif /* _XRAN_APP_FRAG_ */\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+
+/**
+ * @brief Header file for functions to perform application level fragmentation
+ *
+ * @file xran_app_frag.h
+ * @ingroup group_source_xran
+ * @author Intel Corporation
+ **/
+
+#ifndef _XRAN_APP_FRAG_
+#define _XRAN_APP_FRAG_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stdio.h>
+
+#include <rte_config.h>
+#include <rte_malloc.h>
+#include <rte_memory.h>
+#include <rte_mempool.h>
+#include <rte_byteorder.h>
+
+#include "xran_fh_o_du.h"
+#include "xran_cp_api.h"
+
+int32_t xran_app_fragment_packet(struct rte_mbuf *pkt_in, /* eth hdr is prepended */
+ struct rte_mbuf **pkts_out,
+ uint16_t nb_pkts_out,
+ uint16_t mtu_size,
+ struct rte_mempool *pool_direct,
+ struct rte_mempool *pool_indirect,
+ struct xran_section_info *sectinfo,
+ uint8_t *seqid);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _XRAN_APP_FRAG_ */
+
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/**\r
- * @brief XRAN layer common functionality for both O-DU and O-RU as well as C-plane and\r
- * U-plane\r
- * @file xran_common.c\r
- * @ingroup group_source_xran\r
- * @author Intel Corporation\r
- **/\r
-\r
-#include <assert.h>\r
-#include <err.h>\r
-#include <arpa/inet.h>\r
-#include <sys/time.h>\r
-#include <time.h>\r
-\r
-#include "xran_common.h"\r
-#include "ethdi.h"\r
-#include "xran_pkt.h"\r
-#include "xran_pkt_up.h"\r
-#include "xran_up_api.h"\r
-#include "xran_lib_mlog_tasks_id.h"\r
-\r
-#include "../src/xran_printf.h"\r
-#include <rte_mbuf.h>\r
-#include "xran_mlog_lnx.h"\r
-\r
-#define MBUFS_CNT 16\r
-\r
-extern long interval_us;\r
-\r
-extern int xran_process_rx_sym(void *arg,\r
- struct rte_mbuf *mbuf,\r
- void *iq_data_start,\r
- uint16_t size,\r
- uint8_t CC_ID,\r
- uint8_t Ant_ID,\r
- uint8_t frame_id,\r
- uint8_t subframe_id,\r
- uint8_t slot_id,\r
- uint8_t symb_id,\r
- uint16_t num_prbu,\r
- uint16_t start_prbu,\r
- uint16_t sym_inc,\r
- uint16_t rb,\r
- uint16_t sect_id,\r
- uint32_t *mb_free);\r
-\r
-\r
-extern int xran_process_prach_sym(void *arg,\r
- struct rte_mbuf *mbuf,\r
- void *iq_data_start,\r
- uint16_t size,\r
- uint8_t CC_ID,\r
- uint8_t Ant_ID,\r
- uint8_t frame_id,\r
- uint8_t subframe_id,\r
- uint8_t slot_id,\r
- uint8_t symb_id,\r
- uint16_t num_prbu,\r
- uint16_t start_prbu,\r
- uint16_t sym_inc,\r
- uint16_t rb,\r
- uint16_t sect_id,\r
- uint32_t *mb_free);\r
-\r
-extern int32_t xran_process_srs_sym(void *arg,\r
- struct rte_mbuf *mbuf,\r
- void *iq_data_start,\r
- uint16_t size,\r
- uint8_t CC_ID,\r
- uint8_t Ant_ID,\r
- uint8_t frame_id,\r
- uint8_t subframe_id,\r
- uint8_t slot_id,\r
- uint8_t symb_id,\r
- uint16_t num_prbu,\r
- uint16_t start_prbu,\r
- uint16_t sym_inc,\r
- uint16_t rb,\r
- uint16_t sect_id,\r
- uint32_t *mb_free);\r
-\r
-extern int32_t xran_pkt_validate(void *arg,\r
- struct rte_mbuf *mbuf,\r
- void *iq_data_start,\r
- uint16_t size,\r
- uint8_t CC_ID,\r
- uint8_t Ant_ID,\r
- uint8_t frame_id,\r
- uint8_t subframe_id,\r
- uint8_t slot_id,\r
- uint8_t symb_id,\r
- struct ecpri_seq_id *seq_id,\r
- uint16_t num_prbu,\r
- uint16_t start_prbu,\r
- uint16_t sym_inc,\r
- uint16_t rb,\r
- uint16_t sect_id);\r
-\r
-long rx_counter = 0;\r
-long tx_counter = 0;\r
-long tx_bytes_counter = 0;\r
-long rx_bytes_counter = 0;\r
-long tx_bytes_per_sec = 0;\r
-long rx_bytes_per_sec = 0;\r
-\r
-\r
-struct cb_elem_entry *xran_create_cb(XranSymCallbackFn cb_fn, void *cb_data)\r
-{\r
- struct cb_elem_entry * cb_elm = (struct cb_elem_entry *)malloc(sizeof(struct cb_elem_entry));\r
- if(cb_elm){\r
- cb_elm->pSymCallback = cb_fn;\r
- cb_elm->pSymCallbackTag = cb_data;\r
- }\r
-\r
- return cb_elm;\r
-}\r
-\r
-int xran_destroy_cb(struct cb_elem_entry * cb_elm)\r
-{\r
- if(cb_elm)\r
- free(cb_elm);\r
- return 0;\r
-}\r
-\r
-int process_mbuf(struct rte_mbuf *pkt)\r
-{\r
- void *iq_samp_buf;\r
- struct ecpri_seq_id seq;\r
- static int symbol_total_bytes = 0;\r
- int num_bytes = 0;\r
- struct xran_device_ctx * p_x_ctx = xran_dev_get_ctx();\r
-\r
- uint8_t CC_ID = 0;\r
- uint8_t Ant_ID = 0;\r
- uint8_t frame_id = 0;\r
- uint8_t subframe_id = 0;\r
- uint8_t slot_id = 0;\r
- uint8_t symb_id = 0;\r
-\r
- uint16_t num_prbu;\r
- uint16_t start_prbu;\r
- uint16_t sym_inc;\r
- uint16_t rb;\r
- uint16_t sect_id;\r
-\r
- uint8_t compMeth = 0;\r
- uint8_t iqWidth = 0;\r
-\r
- void *pHandle = NULL;\r
- uint8_t num_eAxc = xran_get_num_eAxc(pHandle);\r
- int ret = MBUF_FREE;\r
- uint32_t mb_free = 0;\r
- int32_t valid_res = 0;\r
- int expect_comp = (p_x_ctx->fh_cfg.ru_conf.compMeth != XRAN_COMPMETHOD_NONE);\r
-\r
-\r
- if(p_x_ctx->xran2phy_mem_ready == 0)\r
- return MBUF_FREE;\r
-\r
- num_bytes = xran_extract_iq_samples(pkt,\r
- &iq_samp_buf,\r
- &CC_ID,\r
- &Ant_ID,\r
- &frame_id,\r
- &subframe_id,\r
- &slot_id,\r
- &symb_id,\r
- &seq,\r
- &num_prbu,\r
- &start_prbu,\r
- &sym_inc,\r
- &rb,\r
- §_id,\r
- expect_comp,\r
- &compMeth,\r
- &iqWidth);\r
- if (num_bytes <= 0){\r
- print_err("num_bytes is wrong [%d]\n", num_bytes);\r
- return MBUF_FREE;\r
- }\r
-\r
- valid_res = xran_pkt_validate(NULL,\r
- pkt,\r
- iq_samp_buf,\r
- num_bytes,\r
- CC_ID,\r
- Ant_ID,\r
- frame_id,\r
- subframe_id,\r
- slot_id,\r
- symb_id,\r
- &seq,\r
- num_prbu,\r
- start_prbu,\r
- sym_inc,\r
- rb,\r
- sect_id);\r
-\r
- if(valid_res != 0) {\r
- print_err("valid_res is wrong [%d] ant %u (%u : %u : %u : %u) seq %u num_bytes %d\n", valid_res, Ant_ID, frame_id, subframe_id, slot_id, symb_id, seq.seq_id, num_bytes);\r
- return MBUF_FREE;\r
- }\r
-\r
- if (Ant_ID >= p_x_ctx->srs_cfg.eAxC_offset && p_x_ctx->fh_init.srsEnable) {\r
- /* SRS packet has ruportid = 2*num_eAxc + ant_id */\r
- Ant_ID -= p_x_ctx->srs_cfg.eAxC_offset;\r
- symbol_total_bytes += num_bytes;\r
-\r
- if (seq.e_bit == 1) {\r
- print_dbg("Completed receiving symbol %d, size=%d bytes\n",\r
- symb_id, symbol_total_bytes);\r
-\r
- if (symbol_total_bytes) {\r
- int16_t res = xran_process_srs_sym(NULL,\r
- pkt,\r
- iq_samp_buf,\r
- num_bytes,\r
- CC_ID,\r
- Ant_ID,\r
- frame_id,\r
- subframe_id,\r
- slot_id,\r
- symb_id,\r
- num_prbu,\r
- start_prbu,\r
- sym_inc,\r
- rb,\r
- sect_id,\r
- &mb_free);\r
-\r
- if(res == symbol_total_bytes) {\r
- ret = mb_free;\r
- } else {\r
- print_err("res != symbol_total_bytes\n");\r
- }\r
- }\r
- symbol_total_bytes = 0;\r
- }\r
- else {\r
- print_dbg("Transport layer fragmentation (eCPRI) is not supported\n");\r
- }\r
-\r
- } else if (Ant_ID >= p_x_ctx->PrachCPConfig.eAxC_offset && p_x_ctx->fh_init.prachEnable) {\r
- /* PRACH packet has ruportid = num_eAxc + ant_id */\r
- Ant_ID -= p_x_ctx->PrachCPConfig.eAxC_offset;\r
- symbol_total_bytes += num_bytes;\r
- if (seq.e_bit == 1) {\r
- print_dbg("Completed receiving PRACH symbol %d, size=%d bytes\n",\r
- symb_id, num_bytes);\r
-\r
- if (symbol_total_bytes) {\r
- int16_t res = xran_process_prach_sym(NULL,\r
- pkt,\r
- iq_samp_buf,\r
- num_bytes,\r
- CC_ID,\r
- Ant_ID,\r
- frame_id,\r
- subframe_id,\r
- slot_id,\r
- symb_id,\r
- num_prbu,\r
- start_prbu,\r
- sym_inc,\r
- rb,\r
- sect_id,\r
- &mb_free);\r
- if(res == symbol_total_bytes) {\r
- ret = mb_free;\r
- } else {\r
- print_err("res != symbol_total_bytes\n");\r
- }\r
- }\r
- symbol_total_bytes = 0;\r
- } else {\r
- print_dbg("Transport layer fragmentation (eCPRI) is not supported\n");\r
- }\r
-\r
- } else { /* PUSCH */\r
- symbol_total_bytes += num_bytes;\r
-\r
- if (seq.e_bit == 1) {\r
- print_dbg("Completed receiving symbol %d, size=%d bytes\n",\r
- symb_id, symbol_total_bytes);\r
-\r
- if (symbol_total_bytes) {\r
- int res = xran_process_rx_sym(NULL,\r
- pkt,\r
- iq_samp_buf,\r
- symbol_total_bytes,\r
- CC_ID,\r
- Ant_ID,\r
- frame_id,\r
- subframe_id,\r
- slot_id,\r
- symb_id,\r
- num_prbu,\r
- start_prbu,\r
- sym_inc,\r
- rb,\r
- sect_id,\r
- &mb_free);\r
- if(res == symbol_total_bytes) {\r
- ret = mb_free;\r
- } else {\r
- print_err("res != symbol_total_bytes\n");\r
- }\r
- }\r
- symbol_total_bytes = 0;\r
- } else {\r
- print_dbg("Transport layer fragmentation (eCPRI) is not supported\n");\r
- }\r
- }\r
-\r
- return ret;\r
-}\r
-\r
-static int set_iq_bit_width(uint8_t iq_bit_width, struct data_section_compression_hdr *compr_hdr)\r
-{\r
- if (iq_bit_width == MAX_IQ_BIT_WIDTH)\r
- compr_hdr->ud_comp_hdr.ud_iq_width = (uint8_t) 0;\r
- else\r
- compr_hdr->ud_comp_hdr.ud_iq_width = iq_bit_width;\r
-\r
- return 0;\r
-\r
-}\r
-\r
-/* Send a single 5G symbol over multiple packets */\r
-int32_t prepare_symbol_ex(enum xran_pkt_dir direction,\r
- uint16_t section_id,\r
- struct rte_mbuf *mb,\r
- struct rb_map *data,\r
- uint8_t compMeth,\r
- uint8_t iqWidth,\r
- const enum xran_input_byte_order iq_buf_byte_order,\r
- uint8_t frame_id,\r
- uint8_t subframe_id,\r
- uint8_t slot_id,\r
- uint8_t symbol_no,\r
- int prb_start,\r
- int prb_num,\r
- uint8_t CC_ID,\r
- uint8_t RU_Port_ID,\r
- uint8_t seq_id,\r
- uint32_t do_copy)\r
-{\r
- int32_t n_bytes = ((prb_num == 0) ? MAX_N_FULLBAND_SC : prb_num) * N_SC_PER_PRB * sizeof(struct rb_map);\r
-\r
- n_bytes = ((iqWidth == 0) || (iqWidth == 16)) ? n_bytes : ((3 * iqWidth + 1 ) * prb_num);\r
-\r
- int32_t prep_bytes;\r
-\r
- int16_t nPktSize = sizeof(struct ether_hdr) + sizeof(struct xran_ecpri_hdr) +\r
- sizeof(struct radio_app_common_hdr)+ sizeof(struct data_section_hdr) + n_bytes;\r
- uint32_t off;\r
- struct xran_up_pkt_gen_params xp = { 0 };\r
-\r
- if(compMeth != XRAN_COMPMETHOD_NONE)\r
- nPktSize += sizeof(struct data_section_compression_hdr);\r
-\r
- n_bytes = RTE_MIN(n_bytes, XRAN_MAX_MBUF_LEN);\r
-\r
- /* radio app header */\r
- xp.app_params.data_direction = direction;\r
- xp.app_params.payl_ver = 1;\r
- xp.app_params.filter_id = 0;\r
- xp.app_params.frame_id = frame_id;\r
- xp.app_params.sf_slot_sym.subframe_id = subframe_id;\r
- xp.app_params.sf_slot_sym.slot_id = slot_id;\r
- xp.app_params.sf_slot_sym.symb_id = symbol_no;\r
-\r
- /* convert to network byte order */\r
- xp.app_params.sf_slot_sym.value = rte_cpu_to_be_16(xp.app_params.sf_slot_sym.value);\r
-\r
- xp.sec_hdr.fields.sect_id = section_id;\r
- xp.sec_hdr.fields.num_prbu = (uint8_t)prb_num;\r
- xp.sec_hdr.fields.start_prbu = (uint8_t)prb_start;\r
- xp.sec_hdr.fields.sym_inc = 0;\r
- xp.sec_hdr.fields.rb = 0;\r
-\r
- /* compression */\r
- xp.compr_hdr_param.ud_comp_hdr.ud_comp_meth = compMeth;\r
- xp.compr_hdr_param.ud_comp_hdr.ud_iq_width = iqWidth;\r
- xp.compr_hdr_param.rsrvd = 0;\r
-\r
- /* network byte order */\r
- xp.sec_hdr.fields.all_bits = rte_cpu_to_be_32(xp.sec_hdr.fields.all_bits);\r
-\r
- if (mb == NULL){\r
- MLogPrint(NULL);\r
- errx(1, "out of mbufs after %d packets", 1);\r
- }\r
-\r
- prep_bytes = xran_prepare_iq_symbol_portion(mb,\r
- data,\r
- iq_buf_byte_order,\r
- n_bytes,\r
- &xp,\r
- CC_ID,\r
- RU_Port_ID,\r
- seq_id,\r
- do_copy);\r
- if (prep_bytes <= 0)\r
- errx(1, "failed preparing symbol");\r
-\r
- rte_pktmbuf_pkt_len(mb) = nPktSize;\r
- rte_pktmbuf_data_len(mb) = nPktSize;\r
-\r
-#ifdef DEBUG\r
- printf("Symbol %2d prep_bytes (%d packets, %d bytes)\n", symbol_no, i, n_bytes);\r
-#endif\r
-\r
- return prep_bytes;\r
-}\r
-\r
-/* Send a single 5G symbol over multiple packets */\r
-int send_symbol_ex(enum xran_pkt_dir direction,\r
- uint16_t section_id,\r
- struct rte_mbuf *mb,\r
- struct rb_map *data,\r
- const enum xran_input_byte_order iq_buf_byte_order,\r
- uint8_t frame_id,\r
- uint8_t subframe_id,\r
- uint8_t slot_id,\r
- uint8_t symbol_no,\r
- int prb_start,\r
- int prb_num,\r
- uint8_t CC_ID,\r
- uint8_t RU_Port_ID,\r
- uint8_t seq_id)\r
-{\r
- uint32_t do_copy = 0;\r
- int32_t n_bytes = ((prb_num == 0) ? MAX_N_FULLBAND_SC : prb_num) * N_SC_PER_PRB * sizeof(struct rb_map);\r
- struct xran_device_ctx *p_x_ctx = xran_dev_get_ctx();\r
-\r
- if (mb == NULL){\r
- char * pChar = NULL;\r
- mb = xran_ethdi_mbuf_alloc(); /* will be freede by ETH */\r
- if(mb == NULL){\r
- MLogPrint(NULL);\r
- errx(1, "out of mbufs after %d packets", 1);\r
- }\r
- pChar = rte_pktmbuf_append(mb, sizeof(struct xran_ecpri_hdr)+ sizeof(struct radio_app_common_hdr)+ sizeof(struct data_section_hdr) + n_bytes);\r
- if(pChar == NULL){\r
- MLogPrint(NULL);\r
- errx(1, "incorrect mbuf size %d packets", 1);\r
- }\r
- pChar = rte_pktmbuf_prepend(mb, sizeof(struct ether_hdr));\r
- if(pChar == NULL){\r
- MLogPrint(NULL);\r
- errx(1, "incorrect mbuf size %d packets", 1);\r
- }\r
- do_copy = 1; /* new mbuf hence copy of IQs */\r
- }else {\r
- rte_pktmbuf_refcnt_update(mb, 1); /* make sure eth won't free our mbuf */\r
- }\r
-\r
- int32_t sent = prepare_symbol_ex(direction,\r
- section_id,\r
- mb,\r
- data,\r
- 0,\r
- 16,\r
- iq_buf_byte_order,\r
- frame_id,\r
- subframe_id,\r
- slot_id,\r
- symbol_no,\r
- prb_start,\r
- prb_num,\r
- CC_ID,\r
- RU_Port_ID,\r
- seq_id,\r
- do_copy);\r
-\r
- if(sent){\r
- tx_counter++;\r
- tx_bytes_counter += rte_pktmbuf_pkt_len(mb);\r
- p_x_ctx->send_upmbuf2ring(mb, ETHER_TYPE_ECPRI);\r
- } else {\r
-\r
- }\r
-\r
-#ifdef DEBUG\r
- printf("Symbol %2d sent (%d packets, %d bytes)\n", symbol_no, i, n_bytes);\r
-#endif\r
-\r
- return sent;\r
-}\r
-\r
-int send_cpmsg(void *pHandle, struct rte_mbuf *mbuf,struct xran_cp_gen_params *params,\r
- struct xran_section_gen_info *sect_geninfo, uint8_t cc_id, uint8_t ru_port_id, uint8_t seq_id)\r
-{\r
- int ret = 0, nsection, i;\r
- uint8_t frame_id = params->hdr.frameId;\r
- uint8_t subframe_id = params->hdr.subframeId;\r
- uint8_t slot_id = params->hdr.slotId;\r
- uint8_t dir = params->dir;\r
- struct xran_device_ctx *p_x_ctx = xran_dev_get_ctx();\r
-\r
- nsection = params->numSections;\r
-\r
- /* add in the ethernet header */\r
- struct ether_hdr *const h = (void *)rte_pktmbuf_prepend(mbuf, sizeof(*h));\r
- tx_counter++;\r
- tx_bytes_counter += rte_pktmbuf_pkt_len(mbuf);\r
- p_x_ctx->send_cpmbuf2ring(mbuf, ETHER_TYPE_ECPRI);\r
- for(i=0; i<nsection; i++)\r
- xran_cp_add_section_info(pHandle, dir, cc_id, ru_port_id,\r
- (slot_id + subframe_id*SLOTNUM_PER_SUBFRAME)%XRAN_MAX_SECTIONDB_CTX,\r
- §_geninfo[i].info);\r
-\r
- return (ret);\r
-}\r
-\r
-int generate_cpmsg_dlul(void *pHandle, struct xran_cp_gen_params *params, struct xran_section_gen_info *sect_geninfo, struct rte_mbuf *mbuf,\r
- enum xran_pkt_dir dir, uint8_t frame_id, uint8_t subframe_id, uint8_t slot_id,\r
- uint8_t startsym, uint8_t numsym, uint16_t prb_start, uint16_t prb_num,int16_t iq_buffer_offset, int16_t iq_buffer_len,\r
- uint16_t beam_id, uint8_t cc_id, uint8_t ru_port_id, uint8_t comp_method, uint8_t iqWidth, uint8_t seq_id, uint8_t symInc)\r
-{\r
- int ret = 0, nsection, i, loc_sym;\r
-\r
-\r
- params->dir = dir;\r
- params->sectionType = XRAN_CP_SECTIONTYPE_1; // Most DL/UL Radio Channels\r
- params->hdr.filterIdx = XRAN_FILTERINDEX_STANDARD;\r
- params->hdr.frameId = frame_id;\r
- params->hdr.subframeId = subframe_id;\r
- params->hdr.slotId = slot_id;\r
- params->hdr.startSymId = startsym; // start Symbol ID\r
- params->hdr.iqWidth = iqWidth;\r
- params->hdr.compMeth = comp_method;\r
-\r
- nsection = 0;\r
- sect_geninfo[nsection].info.type = params->sectionType; // for database\r
- sect_geninfo[nsection].info.startSymId = params->hdr.startSymId; // for database\r
- sect_geninfo[nsection].info.iqWidth = params->hdr.iqWidth; // for database\r
- sect_geninfo[nsection].info.compMeth = params->hdr.compMeth; // for database\r
- sect_geninfo[nsection].info.id = xran_alloc_sectionid(pHandle, dir, cc_id, ru_port_id, slot_id);\r
- sect_geninfo[nsection].info.rb = XRAN_RBIND_EVERY;\r
- sect_geninfo[nsection].info.symInc = symInc;\r
- sect_geninfo[nsection].info.startPrbc = prb_start;\r
- sect_geninfo[nsection].info.numPrbc = prb_num;\r
- sect_geninfo[nsection].info.numSymbol = numsym;\r
- sect_geninfo[nsection].info.reMask = 0xfff;\r
- sect_geninfo[nsection].info.beamId = beam_id;\r
-\r
- for (loc_sym = 0; loc_sym < XRAN_NUM_OF_SYMBOL_PER_SLOT; loc_sym++) {\r
- sect_geninfo[0].info.sec_desc[loc_sym].iq_buffer_offset = iq_buffer_offset;\r
- sect_geninfo[0].info.sec_desc[loc_sym].iq_buffer_len = iq_buffer_len;\r
- }\r
-\r
- sect_geninfo[nsection].info.ef = 0;\r
- sect_geninfo[nsection].exDataSize = 0;\r
-// sect_geninfo[nsection].exData = NULL;\r
- nsection++;\r
-\r
- params->numSections = nsection;\r
- params->sections = sect_geninfo;\r
-\r
- if(unlikely(mbuf == NULL)) {\r
- print_err("Alloc fail!\n");\r
- return (-1);\r
- }\r
-\r
- ret = xran_prepare_ctrl_pkt(mbuf, params, cc_id, ru_port_id, seq_id);\r
- if(ret < 0){\r
- print_err("Fail to build control plane packet - [%d:%d:%d] dir=%d\n",\r
- frame_id, subframe_id, slot_id, dir);\r
- rte_pktmbuf_free(mbuf);\r
- }\r
-\r
- return (ret);\r
-}\r
-\r
-int generate_cpmsg_prach(void *pHandle, struct xran_cp_gen_params *params, struct xran_section_gen_info *sect_geninfo, struct rte_mbuf *mbuf, struct xran_device_ctx *pxran_lib_ctx,\r
- uint8_t frame_id, uint8_t subframe_id, uint8_t slot_id,\r
- uint16_t beam_id, uint8_t cc_id, uint8_t prach_port_id, uint8_t seq_id)\r
-{\r
- int i, nsection, ret;\r
- struct xran_prach_cp_config *pPrachCPConfig = &(pxran_lib_ctx->PrachCPConfig);\r
- uint16_t timeOffset;\r
- uint16_t nNumerology = pxran_lib_ctx->fh_cfg.frame_conf.nNumerology;\r
-\r
- if(unlikely(mbuf == NULL)) {\r
- print_err("Alloc fail!\n");\r
- return (-1);\r
- }\r
-#if 0\r
- printf("%d:%d:%d:%d - filter=%d, startSym=%d[%d:%d], numSym=%d, occasions=%d, freqOff=%d\n",\r
- frame_id, subframe_id, slot_id, prach_port_id,\r
- pPrachCPConfig->filterIdx,\r
- pPrachCPConfig->startSymId,\r
- pPrachCPConfig->startPrbc,\r
- pPrachCPConfig->numPrbc,\r
- pPrachCPConfig->numSymbol,\r
- pPrachCPConfig->occassionsInPrachSlot,\r
- pPrachCPConfig->freqOffset);\r
-#endif\r
- timeOffset = pPrachCPConfig->timeOffset; //this is the CP value per 38.211 tab 6.3.3.1-1&2\r
- timeOffset = timeOffset >> nNumerology; //original number is Tc, convert to Ts based on mu\r
- if (pPrachCPConfig->startSymId > 0)\r
- {\r
- timeOffset += (pPrachCPConfig->startSymId * 2048) >> nNumerology;\r
- if ((slot_id == 0) || (slot_id == (SLOTNUM_PER_SUBFRAME >> 1)))\r
- timeOffset += 16;\r
- }\r
- params->dir = XRAN_DIR_UL;\r
- params->sectionType = XRAN_CP_SECTIONTYPE_3;\r
- params->hdr.filterIdx = pPrachCPConfig->filterIdx;\r
- params->hdr.frameId = frame_id;\r
- params->hdr.subframeId = subframe_id;\r
- params->hdr.slotId = slot_id;\r
- params->hdr.startSymId = pPrachCPConfig->startSymId;\r
- params->hdr.iqWidth = xran_get_conf_iqwidth(pHandle);\r
- params->hdr.compMeth = xran_get_conf_compmethod(pHandle);\r
- /* use timeOffset field for the CP length value for prach sequence */\r
- params->hdr.timeOffset = timeOffset;\r
- params->hdr.fftSize = xran_get_conf_fftsize(pHandle);\r
- params->hdr.scs = xran_get_conf_prach_scs(pHandle);\r
- params->hdr.cpLength = 0;\r
-\r
- nsection = 0;\r
- sect_geninfo[nsection].info.type = params->sectionType; // for database\r
- sect_geninfo[nsection].info.startSymId = params->hdr.startSymId; // for database\r
- sect_geninfo[nsection].info.iqWidth = params->hdr.iqWidth; // for database\r
- sect_geninfo[nsection].info.compMeth = params->hdr.compMeth; // for database\r
- sect_geninfo[nsection].info.id = xran_alloc_sectionid(pHandle, XRAN_DIR_UL, cc_id, prach_port_id, slot_id);\r
- sect_geninfo[nsection].info.rb = XRAN_RBIND_EVERY;\r
- sect_geninfo[nsection].info.symInc = XRAN_SYMBOLNUMBER_NOTINC;\r
- sect_geninfo[nsection].info.startPrbc = pPrachCPConfig->startPrbc;\r
- sect_geninfo[nsection].info.numPrbc = pPrachCPConfig->numPrbc,\r
- sect_geninfo[nsection].info.numSymbol = pPrachCPConfig->numSymbol*pPrachCPConfig->occassionsInPrachSlot;\r
- sect_geninfo[nsection].info.reMask = 0xfff;\r
- sect_geninfo[nsection].info.beamId = beam_id;\r
- sect_geninfo[nsection].info.freqOffset = pPrachCPConfig->freqOffset;\r
-\r
- pxran_lib_ctx->prach_last_symbol[cc_id] = sect_geninfo[nsection].info.startSymId + sect_geninfo[nsection].info.numSymbol - 1;\r
-\r
- sect_geninfo[nsection].info.ef = 0;\r
- sect_geninfo[nsection].exDataSize = 0;\r
-// sect_geninfo[nsection].exData = NULL;\r
- nsection++;\r
-\r
- params->numSections = nsection;\r
- params->sections = sect_geninfo;\r
-\r
- ret = xran_prepare_ctrl_pkt(mbuf, params, cc_id, prach_port_id, seq_id);\r
- if(ret < 0){\r
- print_err("Fail to build prach control packet - [%d:%d:%d]\n", frame_id, subframe_id, slot_id);\r
- rte_pktmbuf_free(mbuf);\r
- }\r
- return ret;\r
-}\r
-\r
-\r
-int process_ring(struct rte_ring *r)\r
-{\r
- assert(r);\r
-\r
- struct rte_mbuf *mbufs[MBUFS_CNT];\r
- int i;\r
- uint32_t remaining;\r
- uint64_t t1;\r
- const uint16_t dequeued = rte_ring_dequeue_burst(r, (void **)mbufs,\r
- RTE_DIM(mbufs), &remaining);\r
-\r
- if (!dequeued)\r
- return 0;\r
-\r
- t1 = MLogTick();\r
- for (i = 0; i < dequeued; ++i) {\r
- if (xran_ethdi_filter_packet(mbufs[i], 0) == MBUF_FREE)\r
- rte_pktmbuf_free(mbufs[i]);\r
- }\r
- MLogTask(PID_PROCESS_UP_PKT, t1, MLogTick());\r
-\r
- return remaining;\r
-}\r
-\r
-int32_t ring_processing_func(void)\r
-{\r
- struct xran_ethdi_ctx *const ctx = xran_ethdi_get_ctx();\r
- struct xran_device_ctx *const pxran_lib_ctx = xran_dev_get_ctx();\r
- int16_t retPoll = 0;\r
- uint64_t t1, t2;\r
-\r
- rte_timer_manage();\r
-\r
- /* UP first */\r
- if (process_ring(ctx->rx_ring[ETHDI_UP_VF]))\r
- return 0;\r
- /* CP next */\r
- if (process_ring(ctx->rx_ring[ETHDI_CP_VF]))\r
- return 0;\r
-\r
- if (pxran_lib_ctx->bbdev_dec) {\r
- t1 = MLogTick();\r
- retPoll = pxran_lib_ctx->bbdev_dec();\r
- if (retPoll != -1)\r
- {\r
- t2 = MLogTick();\r
- MLogTask(PID_XRAN_BBDEV_UL_POLL + retPoll, t1, t2);\r
- }\r
- }\r
-\r
- if (pxran_lib_ctx->bbdev_enc) {\r
- t1 = MLogTick();\r
- retPoll = pxran_lib_ctx->bbdev_enc();\r
- if (retPoll != -1)\r
- {\r
- t2 = MLogTick();\r
- MLogTask(PID_XRAN_BBDEV_DL_POLL + retPoll, t1, t2);\r
- }\r
- }\r
-\r
- if (XRAN_STOPPED == xran_if_current_state)\r
- return -1;\r
-\r
- return 0;\r
-}\r
-\r
-int ring_processing_thread(void *args)\r
-{\r
- struct sched_param sched_param;\r
- int res = 0;\r
-\r
- printf("%s [CPU %2d] [PID: %6d]\n", __FUNCTION__, rte_lcore_id(), getpid());\r
- sched_param.sched_priority = XRAN_THREAD_DEFAULT_PRIO;\r
- if ((res = pthread_setschedparam(pthread_self(), SCHED_FIFO, &sched_param))){\r
- printf("priority is not changed: coreId = %d, result1 = %d\n",rte_lcore_id(), res);\r
- }\r
-\r
- for (;;)\r
- if(ring_processing_func() != 0)\r
- break;\r
-\r
- puts("Pkt processing thread finished.");\r
- return 0;\r
-}\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief XRAN layer common functionality for both O-DU and O-RU as well as C-plane and
+ * U-plane
+ * @file xran_common.c
+ * @ingroup group_source_xran
+ * @author Intel Corporation
+ **/
+
+#include <assert.h>
+#include <err.h>
+#include <arpa/inet.h>
+#include <sys/time.h>
+#include <time.h>
+
+#include "xran_common.h"
+#include "ethdi.h"
+#include "xran_pkt.h"
+#include "xran_pkt_up.h"
+#include "xran_up_api.h"
+#include "xran_lib_mlog_tasks_id.h"
+
+#include "../src/xran_printf.h"
+#include <rte_mbuf.h>
+#include "xran_mlog_lnx.h"
+
+#define MBUFS_CNT 16
+
+extern long interval_us;
+
+extern int xran_process_rx_sym(void *arg,
+ struct rte_mbuf *mbuf,
+ void *iq_data_start,
+ uint16_t size,
+ uint8_t CC_ID,
+ uint8_t Ant_ID,
+ uint8_t frame_id,
+ uint8_t subframe_id,
+ uint8_t slot_id,
+ uint8_t symb_id,
+ uint16_t num_prbu,
+ uint16_t start_prbu,
+ uint16_t sym_inc,
+ uint16_t rb,
+ uint16_t sect_id,
+ uint32_t *mb_free);
+
+
+extern int xran_process_prach_sym(void *arg,
+ struct rte_mbuf *mbuf,
+ void *iq_data_start,
+ uint16_t size,
+ uint8_t CC_ID,
+ uint8_t Ant_ID,
+ uint8_t frame_id,
+ uint8_t subframe_id,
+ uint8_t slot_id,
+ uint8_t symb_id,
+ uint16_t num_prbu,
+ uint16_t start_prbu,
+ uint16_t sym_inc,
+ uint16_t rb,
+ uint16_t sect_id,
+ uint32_t *mb_free);
+
+extern int32_t xran_process_srs_sym(void *arg,
+ struct rte_mbuf *mbuf,
+ void *iq_data_start,
+ uint16_t size,
+ uint8_t CC_ID,
+ uint8_t Ant_ID,
+ uint8_t frame_id,
+ uint8_t subframe_id,
+ uint8_t slot_id,
+ uint8_t symb_id,
+ uint16_t num_prbu,
+ uint16_t start_prbu,
+ uint16_t sym_inc,
+ uint16_t rb,
+ uint16_t sect_id,
+ uint32_t *mb_free);
+
+extern int32_t xran_pkt_validate(void *arg,
+ struct rte_mbuf *mbuf,
+ void *iq_data_start,
+ uint16_t size,
+ uint8_t CC_ID,
+ uint8_t Ant_ID,
+ uint8_t frame_id,
+ uint8_t subframe_id,
+ uint8_t slot_id,
+ uint8_t symb_id,
+ struct ecpri_seq_id *seq_id,
+ uint16_t num_prbu,
+ uint16_t start_prbu,
+ uint16_t sym_inc,
+ uint16_t rb,
+ uint16_t sect_id);
+
+long rx_counter = 0;
+long tx_counter = 0;
+long tx_bytes_counter = 0;
+long rx_bytes_counter = 0;
+long tx_bytes_per_sec = 0;
+long rx_bytes_per_sec = 0;
+
+
+struct cb_elem_entry *xran_create_cb(XranSymCallbackFn cb_fn, void *cb_data)
+{
+ struct cb_elem_entry * cb_elm = (struct cb_elem_entry *)malloc(sizeof(struct cb_elem_entry));
+ if(cb_elm){
+ cb_elm->pSymCallback = cb_fn;
+ cb_elm->pSymCallbackTag = cb_data;
+ }
+
+ return cb_elm;
+}
+
+int xran_destroy_cb(struct cb_elem_entry * cb_elm)
+{
+ if(cb_elm)
+ free(cb_elm);
+ return 0;
+}
+
+int process_mbuf(struct rte_mbuf *pkt)
+{
+ void *iq_samp_buf;
+ struct ecpri_seq_id seq;
+ static int symbol_total_bytes = 0;
+ int num_bytes = 0;
+ struct xran_device_ctx * p_x_ctx = xran_dev_get_ctx();
+
+ uint8_t CC_ID = 0;
+ uint8_t Ant_ID = 0;
+ uint8_t frame_id = 0;
+ uint8_t subframe_id = 0;
+ uint8_t slot_id = 0;
+ uint8_t symb_id = 0;
+
+ uint16_t num_prbu;
+ uint16_t start_prbu;
+ uint16_t sym_inc;
+ uint16_t rb;
+ uint16_t sect_id;
+
+ uint8_t compMeth = 0;
+ uint8_t iqWidth = 0;
+
+ void *pHandle = NULL;
+ uint8_t num_eAxc = xran_get_num_eAxc(pHandle);
+ int ret = MBUF_FREE;
+ uint32_t mb_free = 0;
+ int32_t valid_res = 0;
+ int expect_comp = (p_x_ctx->fh_cfg.ru_conf.compMeth != XRAN_COMPMETHOD_NONE);
+
+
+ if(p_x_ctx->xran2phy_mem_ready == 0)
+ return MBUF_FREE;
+
+ num_bytes = xran_extract_iq_samples(pkt,
+ &iq_samp_buf,
+ &CC_ID,
+ &Ant_ID,
+ &frame_id,
+ &subframe_id,
+ &slot_id,
+ &symb_id,
+ &seq,
+ &num_prbu,
+ &start_prbu,
+ &sym_inc,
+ &rb,
+ §_id,
+ expect_comp,
+ &compMeth,
+ &iqWidth);
+ if (num_bytes <= 0){
+ print_err("num_bytes is wrong [%d]\n", num_bytes);
+ return MBUF_FREE;
+ }
+
+ valid_res = xran_pkt_validate(NULL,
+ pkt,
+ iq_samp_buf,
+ num_bytes,
+ CC_ID,
+ Ant_ID,
+ frame_id,
+ subframe_id,
+ slot_id,
+ symb_id,
+ &seq,
+ num_prbu,
+ start_prbu,
+ sym_inc,
+ rb,
+ sect_id);
+
+ if(valid_res != 0) {
+ print_err("valid_res is wrong [%d] ant %u (%u : %u : %u : %u) seq %u num_bytes %d\n", valid_res, Ant_ID, frame_id, subframe_id, slot_id, symb_id, seq.seq_id, num_bytes);
+ return MBUF_FREE;
+ }
+
+ if (Ant_ID >= p_x_ctx->srs_cfg.eAxC_offset && p_x_ctx->fh_init.srsEnable) {
+ /* SRS packet has ruportid = 2*num_eAxc + ant_id */
+ Ant_ID -= p_x_ctx->srs_cfg.eAxC_offset;
+ symbol_total_bytes += num_bytes;
+
+ if (seq.e_bit == 1) {
+ print_dbg("Completed receiving symbol %d, size=%d bytes\n",
+ symb_id, symbol_total_bytes);
+
+ if (symbol_total_bytes) {
+ int16_t res = xran_process_srs_sym(NULL,
+ pkt,
+ iq_samp_buf,
+ num_bytes,
+ CC_ID,
+ Ant_ID,
+ frame_id,
+ subframe_id,
+ slot_id,
+ symb_id,
+ num_prbu,
+ start_prbu,
+ sym_inc,
+ rb,
+ sect_id,
+ &mb_free);
+
+ if(res == symbol_total_bytes) {
+ ret = mb_free;
+ } else {
+ print_err("res != symbol_total_bytes\n");
+ }
+ }
+ symbol_total_bytes = 0;
+ }
+ else {
+ print_dbg("Transport layer fragmentation (eCPRI) is not supported\n");
+ }
+
+ } else if (Ant_ID >= p_x_ctx->PrachCPConfig.eAxC_offset && p_x_ctx->fh_init.prachEnable) {
+ /* PRACH packet has ruportid = num_eAxc + ant_id */
+ Ant_ID -= p_x_ctx->PrachCPConfig.eAxC_offset;
+ symbol_total_bytes += num_bytes;
+ if (seq.e_bit == 1) {
+ print_dbg("Completed receiving PRACH symbol %d, size=%d bytes\n",
+ symb_id, num_bytes);
+
+ if (symbol_total_bytes) {
+ int16_t res = xran_process_prach_sym(NULL,
+ pkt,
+ iq_samp_buf,
+ num_bytes,
+ CC_ID,
+ Ant_ID,
+ frame_id,
+ subframe_id,
+ slot_id,
+ symb_id,
+ num_prbu,
+ start_prbu,
+ sym_inc,
+ rb,
+ sect_id,
+ &mb_free);
+ if(res == symbol_total_bytes) {
+ ret = mb_free;
+ } else {
+ print_err("res != symbol_total_bytes\n");
+ }
+ }
+ symbol_total_bytes = 0;
+ } else {
+ print_dbg("Transport layer fragmentation (eCPRI) is not supported\n");
+ }
+
+ } else { /* PUSCH */
+ symbol_total_bytes += num_bytes;
+
+ if (seq.e_bit == 1) {
+ print_dbg("Completed receiving symbol %d, size=%d bytes\n",
+ symb_id, symbol_total_bytes);
+
+ if (symbol_total_bytes) {
+ int res = xran_process_rx_sym(NULL,
+ pkt,
+ iq_samp_buf,
+ symbol_total_bytes,
+ CC_ID,
+ Ant_ID,
+ frame_id,
+ subframe_id,
+ slot_id,
+ symb_id,
+ num_prbu,
+ start_prbu,
+ sym_inc,
+ rb,
+ sect_id,
+ &mb_free);
+ if(res == symbol_total_bytes) {
+ ret = mb_free;
+ } else {
+ print_err("res != symbol_total_bytes\n");
+ }
+ }
+ symbol_total_bytes = 0;
+ } else {
+ print_dbg("Transport layer fragmentation (eCPRI) is not supported\n");
+ }
+ }
+
+ return ret;
+}
+
+static int set_iq_bit_width(uint8_t iq_bit_width, struct data_section_compression_hdr *compr_hdr)
+{
+ if (iq_bit_width == MAX_IQ_BIT_WIDTH)
+ compr_hdr->ud_comp_hdr.ud_iq_width = (uint8_t) 0;
+ else
+ compr_hdr->ud_comp_hdr.ud_iq_width = iq_bit_width;
+
+ return 0;
+
+}
+
+/* Send a single 5G symbol over multiple packets */
+int32_t prepare_symbol_ex(enum xran_pkt_dir direction,
+ uint16_t section_id,
+ struct rte_mbuf *mb,
+ struct rb_map *data,
+ uint8_t compMeth,
+ uint8_t iqWidth,
+ const enum xran_input_byte_order iq_buf_byte_order,
+ uint8_t frame_id,
+ uint8_t subframe_id,
+ uint8_t slot_id,
+ uint8_t symbol_no,
+ int prb_start,
+ int prb_num,
+ uint8_t CC_ID,
+ uint8_t RU_Port_ID,
+ uint8_t seq_id,
+ uint32_t do_copy)
+{
+ int32_t n_bytes = ((prb_num == 0) ? MAX_N_FULLBAND_SC : prb_num) * N_SC_PER_PRB * sizeof(struct rb_map);
+
+ n_bytes = ((iqWidth == 0) || (iqWidth == 16)) ? n_bytes : ((3 * iqWidth + 1 ) * prb_num);
+
+ int32_t prep_bytes;
+
+ int16_t nPktSize = sizeof(struct ether_hdr) + sizeof(struct xran_ecpri_hdr) +
+ sizeof(struct radio_app_common_hdr)+ sizeof(struct data_section_hdr) + n_bytes;
+ uint32_t off;
+ struct xran_up_pkt_gen_params xp = { 0 };
+
+ if(compMeth != XRAN_COMPMETHOD_NONE)
+ nPktSize += sizeof(struct data_section_compression_hdr);
+
+ n_bytes = RTE_MIN(n_bytes, XRAN_MAX_MBUF_LEN);
+
+ /* radio app header */
+ xp.app_params.data_direction = direction;
+ xp.app_params.payl_ver = 1;
+ xp.app_params.filter_id = 0;
+ xp.app_params.frame_id = frame_id;
+ xp.app_params.sf_slot_sym.subframe_id = subframe_id;
+ xp.app_params.sf_slot_sym.slot_id = slot_id;
+ xp.app_params.sf_slot_sym.symb_id = symbol_no;
+
+ /* convert to network byte order */
+ xp.app_params.sf_slot_sym.value = rte_cpu_to_be_16(xp.app_params.sf_slot_sym.value);
+
+ xp.sec_hdr.fields.sect_id = section_id;
+ xp.sec_hdr.fields.num_prbu = (uint8_t)prb_num;
+ xp.sec_hdr.fields.start_prbu = (uint8_t)prb_start;
+ xp.sec_hdr.fields.sym_inc = 0;
+ xp.sec_hdr.fields.rb = 0;
+
+ /* compression */
+ xp.compr_hdr_param.ud_comp_hdr.ud_comp_meth = compMeth;
+ xp.compr_hdr_param.ud_comp_hdr.ud_iq_width = iqWidth;
+ xp.compr_hdr_param.rsrvd = 0;
+
+ /* network byte order */
+ xp.sec_hdr.fields.all_bits = rte_cpu_to_be_32(xp.sec_hdr.fields.all_bits);
+
+ if (mb == NULL){
+ MLogPrint(NULL);
+ errx(1, "out of mbufs after %d packets", 1);
+ }
+
+ prep_bytes = xran_prepare_iq_symbol_portion(mb,
+ data,
+ iq_buf_byte_order,
+ n_bytes,
+ &xp,
+ CC_ID,
+ RU_Port_ID,
+ seq_id,
+ do_copy);
+ if (prep_bytes <= 0)
+ errx(1, "failed preparing symbol");
+
+ rte_pktmbuf_pkt_len(mb) = nPktSize;
+ rte_pktmbuf_data_len(mb) = nPktSize;
+
+#ifdef DEBUG
+ printf("Symbol %2d prep_bytes (%d packets, %d bytes)\n", symbol_no, i, n_bytes);
+#endif
+
+ return prep_bytes;
+}
+
+/* Send a single 5G symbol over multiple packets */
+int send_symbol_ex(enum xran_pkt_dir direction,
+ uint16_t section_id,
+ struct rte_mbuf *mb,
+ struct rb_map *data,
+ const enum xran_input_byte_order iq_buf_byte_order,
+ uint8_t frame_id,
+ uint8_t subframe_id,
+ uint8_t slot_id,
+ uint8_t symbol_no,
+ int prb_start,
+ int prb_num,
+ uint8_t CC_ID,
+ uint8_t RU_Port_ID,
+ uint8_t seq_id)
+{
+ uint32_t do_copy = 0;
+ int32_t n_bytes = ((prb_num == 0) ? MAX_N_FULLBAND_SC : prb_num) * N_SC_PER_PRB * sizeof(struct rb_map);
+ struct xran_device_ctx *p_x_ctx = xran_dev_get_ctx();
+
+ if (mb == NULL){
+ char * pChar = NULL;
+ mb = xran_ethdi_mbuf_alloc(); /* will be freede by ETH */
+ if(mb == NULL){
+ MLogPrint(NULL);
+ errx(1, "out of mbufs after %d packets", 1);
+ }
+ pChar = rte_pktmbuf_append(mb, sizeof(struct xran_ecpri_hdr)+ sizeof(struct radio_app_common_hdr)+ sizeof(struct data_section_hdr) + n_bytes);
+ if(pChar == NULL){
+ MLogPrint(NULL);
+ errx(1, "incorrect mbuf size %d packets", 1);
+ }
+ pChar = rte_pktmbuf_prepend(mb, sizeof(struct ether_hdr));
+ if(pChar == NULL){
+ MLogPrint(NULL);
+ errx(1, "incorrect mbuf size %d packets", 1);
+ }
+ do_copy = 1; /* new mbuf hence copy of IQs */
+ }else {
+ rte_pktmbuf_refcnt_update(mb, 1); /* make sure eth won't free our mbuf */
+ }
+
+ int32_t sent = prepare_symbol_ex(direction,
+ section_id,
+ mb,
+ data,
+ 0,
+ 16,
+ iq_buf_byte_order,
+ frame_id,
+ subframe_id,
+ slot_id,
+ symbol_no,
+ prb_start,
+ prb_num,
+ CC_ID,
+ RU_Port_ID,
+ seq_id,
+ do_copy);
+
+ if(sent){
+ tx_counter++;
+ tx_bytes_counter += rte_pktmbuf_pkt_len(mb);
+ p_x_ctx->send_upmbuf2ring(mb, ETHER_TYPE_ECPRI);
+ } else {
+
+ }
+
+#ifdef DEBUG
+ printf("Symbol %2d sent (%d packets, %d bytes)\n", symbol_no, i, n_bytes);
+#endif
+
+ return sent;
+}
+
+int send_cpmsg(void *pHandle, struct rte_mbuf *mbuf,struct xran_cp_gen_params *params,
+ struct xran_section_gen_info *sect_geninfo, uint8_t cc_id, uint8_t ru_port_id, uint8_t seq_id)
+{
+ int ret = 0, nsection, i;
+ uint8_t frame_id = params->hdr.frameId;
+ uint8_t subframe_id = params->hdr.subframeId;
+ uint8_t slot_id = params->hdr.slotId;
+ uint8_t dir = params->dir;
+ struct xran_device_ctx *p_x_ctx = xran_dev_get_ctx();
+
+ nsection = params->numSections;
+
+ /* add in the ethernet header */
+ struct ether_hdr *const h = (void *)rte_pktmbuf_prepend(mbuf, sizeof(*h));
+ tx_counter++;
+ tx_bytes_counter += rte_pktmbuf_pkt_len(mbuf);
+ p_x_ctx->send_cpmbuf2ring(mbuf, ETHER_TYPE_ECPRI);
+ for(i=0; i<nsection; i++)
+ xran_cp_add_section_info(pHandle, dir, cc_id, ru_port_id,
+ (slot_id + subframe_id*SLOTNUM_PER_SUBFRAME)%XRAN_MAX_SECTIONDB_CTX,
+ §_geninfo[i].info);
+
+ return (ret);
+}
+
+int generate_cpmsg_dlul(void *pHandle, struct xran_cp_gen_params *params, struct xran_section_gen_info *sect_geninfo, struct rte_mbuf *mbuf,
+ enum xran_pkt_dir dir, uint8_t frame_id, uint8_t subframe_id, uint8_t slot_id,
+ uint8_t startsym, uint8_t numsym, uint16_t prb_start, uint16_t prb_num,int16_t iq_buffer_offset, int16_t iq_buffer_len,
+ uint16_t beam_id, uint8_t cc_id, uint8_t ru_port_id, uint8_t comp_method, uint8_t iqWidth, uint8_t seq_id, uint8_t symInc)
+{
+ int ret = 0, nsection, i, loc_sym;
+
+
+ params->dir = dir;
+ params->sectionType = XRAN_CP_SECTIONTYPE_1; // Most DL/UL Radio Channels
+ params->hdr.filterIdx = XRAN_FILTERINDEX_STANDARD;
+ params->hdr.frameId = frame_id;
+ params->hdr.subframeId = subframe_id;
+ params->hdr.slotId = slot_id;
+ params->hdr.startSymId = startsym; // start Symbol ID
+ params->hdr.iqWidth = iqWidth;
+ params->hdr.compMeth = comp_method;
+
+ nsection = 0;
+ sect_geninfo[nsection].info.type = params->sectionType; // for database
+ sect_geninfo[nsection].info.startSymId = params->hdr.startSymId; // for database
+ sect_geninfo[nsection].info.iqWidth = params->hdr.iqWidth; // for database
+ sect_geninfo[nsection].info.compMeth = params->hdr.compMeth; // for database
+ sect_geninfo[nsection].info.id = xran_alloc_sectionid(pHandle, dir, cc_id, ru_port_id, slot_id);
+ sect_geninfo[nsection].info.rb = XRAN_RBIND_EVERY;
+ sect_geninfo[nsection].info.symInc = symInc;
+ sect_geninfo[nsection].info.startPrbc = prb_start;
+ sect_geninfo[nsection].info.numPrbc = prb_num;
+ sect_geninfo[nsection].info.numSymbol = numsym;
+ sect_geninfo[nsection].info.reMask = 0xfff;
+ sect_geninfo[nsection].info.beamId = beam_id;
+
+ for (loc_sym = 0; loc_sym < XRAN_NUM_OF_SYMBOL_PER_SLOT; loc_sym++) {
+ sect_geninfo[0].info.sec_desc[loc_sym].iq_buffer_offset = iq_buffer_offset;
+ sect_geninfo[0].info.sec_desc[loc_sym].iq_buffer_len = iq_buffer_len;
+ }
+
+ sect_geninfo[nsection].info.ef = 0;
+ sect_geninfo[nsection].exDataSize = 0;
+// sect_geninfo[nsection].exData = NULL;
+ nsection++;
+
+ params->numSections = nsection;
+ params->sections = sect_geninfo;
+
+ if(unlikely(mbuf == NULL)) {
+ print_err("Alloc fail!\n");
+ return (-1);
+ }
+
+ ret = xran_prepare_ctrl_pkt(mbuf, params, cc_id, ru_port_id, seq_id);
+ if(ret < 0){
+ print_err("Fail to build control plane packet - [%d:%d:%d] dir=%d\n",
+ frame_id, subframe_id, slot_id, dir);
+ rte_pktmbuf_free(mbuf);
+ }
+
+ return (ret);
+}
+
+int generate_cpmsg_prach(void *pHandle, struct xran_cp_gen_params *params, struct xran_section_gen_info *sect_geninfo, struct rte_mbuf *mbuf, struct xran_device_ctx *pxran_lib_ctx,
+ uint8_t frame_id, uint8_t subframe_id, uint8_t slot_id,
+ uint16_t beam_id, uint8_t cc_id, uint8_t prach_port_id, uint8_t seq_id)
+{
+ int i, nsection, ret;
+ struct xran_prach_cp_config *pPrachCPConfig = &(pxran_lib_ctx->PrachCPConfig);
+ uint16_t timeOffset;
+ uint16_t nNumerology = pxran_lib_ctx->fh_cfg.frame_conf.nNumerology;
+
+ if(unlikely(mbuf == NULL)) {
+ print_err("Alloc fail!\n");
+ return (-1);
+ }
+#if 0
+ printf("%d:%d:%d:%d - filter=%d, startSym=%d[%d:%d], numSym=%d, occasions=%d, freqOff=%d\n",
+ frame_id, subframe_id, slot_id, prach_port_id,
+ pPrachCPConfig->filterIdx,
+ pPrachCPConfig->startSymId,
+ pPrachCPConfig->startPrbc,
+ pPrachCPConfig->numPrbc,
+ pPrachCPConfig->numSymbol,
+ pPrachCPConfig->occassionsInPrachSlot,
+ pPrachCPConfig->freqOffset);
+#endif
+ timeOffset = pPrachCPConfig->timeOffset; //this is the CP value per 38.211 tab 6.3.3.1-1&2
+ timeOffset = timeOffset >> nNumerology; //original number is Tc, convert to Ts based on mu
+ if (pPrachCPConfig->startSymId > 0)
+ {
+ timeOffset += (pPrachCPConfig->startSymId * 2048) >> nNumerology;
+ if ((slot_id == 0) || (slot_id == (SLOTNUM_PER_SUBFRAME >> 1)))
+ timeOffset += 16;
+ }
+ params->dir = XRAN_DIR_UL;
+ params->sectionType = XRAN_CP_SECTIONTYPE_3;
+ params->hdr.filterIdx = pPrachCPConfig->filterIdx;
+ params->hdr.frameId = frame_id;
+ params->hdr.subframeId = subframe_id;
+ params->hdr.slotId = slot_id;
+ params->hdr.startSymId = pPrachCPConfig->startSymId;
+ params->hdr.iqWidth = xran_get_conf_iqwidth(pHandle);
+ params->hdr.compMeth = xran_get_conf_compmethod(pHandle);
+ /* use timeOffset field for the CP length value for prach sequence */
+ params->hdr.timeOffset = timeOffset;
+ params->hdr.fftSize = xran_get_conf_fftsize(pHandle);
+ params->hdr.scs = xran_get_conf_prach_scs(pHandle);
+ params->hdr.cpLength = 0;
+
+ nsection = 0;
+ sect_geninfo[nsection].info.type = params->sectionType; // for database
+ sect_geninfo[nsection].info.startSymId = params->hdr.startSymId; // for database
+ sect_geninfo[nsection].info.iqWidth = params->hdr.iqWidth; // for database
+ sect_geninfo[nsection].info.compMeth = params->hdr.compMeth; // for database
+ sect_geninfo[nsection].info.id = xran_alloc_sectionid(pHandle, XRAN_DIR_UL, cc_id, prach_port_id, slot_id);
+ sect_geninfo[nsection].info.rb = XRAN_RBIND_EVERY;
+ sect_geninfo[nsection].info.symInc = XRAN_SYMBOLNUMBER_NOTINC;
+ sect_geninfo[nsection].info.startPrbc = pPrachCPConfig->startPrbc;
+ sect_geninfo[nsection].info.numPrbc = pPrachCPConfig->numPrbc,
+ sect_geninfo[nsection].info.numSymbol = pPrachCPConfig->numSymbol*pPrachCPConfig->occassionsInPrachSlot;
+ sect_geninfo[nsection].info.reMask = 0xfff;
+ sect_geninfo[nsection].info.beamId = beam_id;
+ sect_geninfo[nsection].info.freqOffset = pPrachCPConfig->freqOffset;
+
+ pxran_lib_ctx->prach_last_symbol[cc_id] = sect_geninfo[nsection].info.startSymId + sect_geninfo[nsection].info.numSymbol - 1;
+
+ sect_geninfo[nsection].info.ef = 0;
+ sect_geninfo[nsection].exDataSize = 0;
+// sect_geninfo[nsection].exData = NULL;
+ nsection++;
+
+ params->numSections = nsection;
+ params->sections = sect_geninfo;
+
+ ret = xran_prepare_ctrl_pkt(mbuf, params, cc_id, prach_port_id, seq_id);
+ if(ret < 0){
+ print_err("Fail to build prach control packet - [%d:%d:%d]\n", frame_id, subframe_id, slot_id);
+ rte_pktmbuf_free(mbuf);
+ }
+ return ret;
+}
+
+
+int process_ring(struct rte_ring *r)
+{
+ assert(r);
+
+ struct rte_mbuf *mbufs[MBUFS_CNT];
+ int i;
+ uint32_t remaining;
+ uint64_t t1;
+ const uint16_t dequeued = rte_ring_dequeue_burst(r, (void **)mbufs,
+ RTE_DIM(mbufs), &remaining);
+
+ if (!dequeued)
+ return 0;
+
+ t1 = MLogTick();
+ for (i = 0; i < dequeued; ++i) {
+ if (xran_ethdi_filter_packet(mbufs[i], 0) == MBUF_FREE)
+ rte_pktmbuf_free(mbufs[i]);
+ }
+ MLogTask(PID_PROCESS_UP_PKT, t1, MLogTick());
+
+ return remaining;
+}
+
+int32_t ring_processing_func(void)
+{
+ struct xran_ethdi_ctx *const ctx = xran_ethdi_get_ctx();
+ struct xran_device_ctx *const pxran_lib_ctx = xran_dev_get_ctx();
+ int16_t retPoll = 0;
+ uint64_t t1, t2;
+
+ rte_timer_manage();
+
+ /* UP first */
+ if (process_ring(ctx->rx_ring[ETHDI_UP_VF]))
+ return 0;
+ /* CP next */
+ if (process_ring(ctx->rx_ring[ETHDI_CP_VF]))
+ return 0;
+
+ if (pxran_lib_ctx->bbdev_dec) {
+ t1 = MLogTick();
+ retPoll = pxran_lib_ctx->bbdev_dec();
+ if (retPoll != -1)
+ {
+ t2 = MLogTick();
+ MLogTask(PID_XRAN_BBDEV_UL_POLL + retPoll, t1, t2);
+ }
+ }
+
+ if (pxran_lib_ctx->bbdev_enc) {
+ t1 = MLogTick();
+ retPoll = pxran_lib_ctx->bbdev_enc();
+ if (retPoll != -1)
+ {
+ t2 = MLogTick();
+ MLogTask(PID_XRAN_BBDEV_DL_POLL + retPoll, t1, t2);
+ }
+ }
+
+ if (XRAN_STOPPED == xran_if_current_state)
+ return -1;
+
+ return 0;
+}
+
+int ring_processing_thread(void *args)
+{
+ struct sched_param sched_param;
+ int res = 0;
+
+ printf("%s [CPU %2d] [PID: %6d]\n", __FUNCTION__, rte_lcore_id(), getpid());
+ sched_param.sched_priority = XRAN_THREAD_DEFAULT_PRIO;
+ if ((res = pthread_setschedparam(pthread_self(), SCHED_FIFO, &sched_param))){
+ printf("priority is not changed: coreId = %d, result1 = %d\n",rte_lcore_id(), res);
+ }
+
+ for (;;)
+ if(ring_processing_func() != 0)
+ break;
+
+ puts("Pkt processing thread finished.");
+ return 0;
+}
+
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/**\r
- * @brief XRAN layer common functionality for both lls-CU and RU as well as C-plane and\r
- * U-plane\r
- * @file xran_common.h\r
- * @ingroup group_source_xran\r
- * @author Intel Corporation\r
- **/\r
-\r
-#ifndef _XRAN_COMMON_H_\r
-#define _XRAN_COMMON_H_\r
-\r
-#ifdef __cplusplus\r
-extern "C" {\r
-#endif\r
-\r
-#include <stdio.h>\r
-#include <unistd.h>\r
-#include <sys/param.h>\r
-#include <sys/queue.h>\r
-\r
-#include <rte_common.h>\r
-#include <rte_mbuf.h>\r
-#include <rte_timer.h>\r
-\r
-#include "xran_fh_o_du.h"\r
-#include "xran_pkt_up.h"\r
-#include "xran_cp_api.h"\r
-\r
-#define O_DU 0\r
-#define O_RU 1\r
-\r
-#define N_SC_PER_PRB 12\r
-#define MAX_N_FULLBAND_SC 273\r
-#define N_SYM_PER_SLOT 14\r
-#define SUBFRAME_DURATION_US 1000\r
-#define SLOTNUM_PER_SUBFRAME (SUBFRAME_DURATION_US/interval_us)\r
-#define SUBFRAMES_PER_SYSTEMFRAME 10\r
-#define SLOTS_PER_SYSTEMFRAME (SLOTNUM_PER_SUBFRAME*SUBFRAMES_PER_SYSTEMFRAME)\r
-\r
-/* PRACH data samples are 32 bits wide, 16bits for I and 16bits for Q. Each packet contains 839 samples for long sequence or 144*14 (max) for short sequence. The payload length is 3356 octets.*/\r
-#define PRACH_PLAYBACK_BUFFER_BYTES (144*14*4L)\r
-\r
-#define PRACH_SRS_BUFFER_BYTES (144*14*4L)\r
-\r
-/**< this is the configuration of M-plane */\r
-#define XRAN_MAX_NUM_SECTIONS (N_SYM_PER_SLOT* (XRAN_MAX_ANTENNA_NR*2) + XRAN_MAX_ANT_ARRAY_ELM_NR)\r
-\r
-#define XRAN_MAX_MBUF_LEN 9600 /**< jumbo frame */\r
-#define NSEC_PER_SEC 1000000000L\r
-#define TIMER_RESOLUTION_CYCLES 1596*1 /* 1us */\r
-#define XRAN_RING_SIZE 512 /*4*14*8 pow of 2 */\r
-#define XRAN_NAME_MAX_LEN (64)\r
-#define XRAN_RING_NUM (3)\r
-\r
-#define XranDiffSymIdx(prevSymIdx, currSymIdx, numTotalSymIdx) ((prevSymIdx > currSymIdx) ? ((currSymIdx + numTotalSymIdx) - prevSymIdx) : (currSymIdx - prevSymIdx))\r
-\r
-#define XRAN_MLOG_VAR 0 /**< enable debug variables to mlog */\r
-\r
-/* PRACH configuration table defines */\r
-#define XRAN_PRACH_CANDIDATE_PREAMBLE (2)\r
-#define XRAN_PRACH_CANDIDATE_Y (2)\r
-#define XRAN_PRACH_CANDIDATE_SLOT (40)\r
-#define XRAN_PRACH_CONFIG_TABLE_SIZE (256)\r
-#define XRAN_PRACH_PREAMBLE_FORMAT_OF_ABC (9)\r
-typedef enum\r
-{\r
- FORMAT_0 = 0,\r
- FORMAT_1,\r
- FORMAT_2,\r
- FORMAT_3,\r
- FORMAT_A1,\r
- FORMAT_A2,\r
- FORMAT_A3,\r
- FORMAT_B1,\r
- FORMAT_B2,\r
- FORMAT_B3,\r
- FORMAT_B4,\r
- FORMAT_C0,\r
- FORMAT_C2,\r
- FORMAT_LAST\r
-}PreambleFormatEnum;\r
-\r
-/* add PRACH used config table, same structure as used in refPHY */\r
-typedef struct\r
-{\r
- uint8_t prachConfigIdx;\r
- uint8_t preambleFmrt[XRAN_PRACH_CANDIDATE_PREAMBLE];\r
- uint8_t x;\r
- uint8_t y[XRAN_PRACH_CANDIDATE_Y];\r
- uint8_t slotNr[XRAN_PRACH_CANDIDATE_SLOT];\r
- uint8_t slotNrNum;\r
- uint8_t startingSym;\r
- uint8_t nrofPrachInSlot;\r
- uint8_t occassionsInPrachSlot;\r
- uint8_t duration;\r
-} xRANPrachConfigTableStruct;\r
-\r
-typedef struct\r
-{\r
- uint8_t preambleFmrt;\r
- uint16_t lRALen;\r
- uint8_t fRA;\r
- uint32_t nu;\r
- uint16_t nRaCp;\r
-}xRANPrachPreambleLRAStruct;\r
-\r
-struct xran_prach_cp_config\r
-{\r
- uint8_t filterIdx;\r
- uint8_t startSymId;\r
- uint16_t startPrbc;\r
- uint8_t numPrbc;\r
- uint8_t numSymbol;\r
- uint16_t timeOffset;\r
- int32_t freqOffset;\r
- uint8_t nrofPrachInSlot;\r
- uint8_t occassionsInPrachSlot;\r
- uint8_t x;\r
- uint8_t y[XRAN_PRACH_CANDIDATE_Y];\r
- uint8_t isPRACHslot[XRAN_PRACH_CANDIDATE_SLOT];\r
- uint8_t eAxC_offset; /**< starting eAxC for PRACH stream */\r
-};\r
-\r
-#define XRAN_MAX_POOLS_PER_SECTOR_NR 8 /**< 2x(TX_OUT, RX_IN, PRACH_IN, SRS_IN) with C-plane */\r
-\r
-typedef struct sectorHandleInfo\r
-{\r
- /**< Structure that contains the information to describe the\r
- * instance i.e service type, virtual function, package Id etc..*/\r
- uint16_t nIndex;\r
- uint16_t nXranPort;\r
- /* Unique ID of an handle shared between phy layer and library */\r
- /**< number of antennas supported per link*/\r
- uint32_t nBufferPoolIndex;\r
- /**< Buffer poolIndex*/\r
- struct rte_mempool * p_bufferPool[XRAN_MAX_POOLS_PER_SECTOR_NR];\r
- uint32_t bufferPoolElmSz[XRAN_MAX_POOLS_PER_SECTOR_NR];\r
- uint32_t bufferPoolNumElm[XRAN_MAX_POOLS_PER_SECTOR_NR];\r
-\r
-}XranSectorHandleInfo, *PXranSectorHandleInfo;\r
-\r
-typedef void (*XranSymCallbackFn)(struct rte_timer *tim, void* arg);\r
-\r
-struct cb_elem_entry{\r
- XranSymCallbackFn pSymCallback;\r
- void *pSymCallbackTag;\r
- LIST_ENTRY(cb_elem_entry) pointers;\r
-};\r
-\r
-/* Callback function to send mbuf to the ring */\r
-typedef int (*xran_ethdi_mbuf_send_fn)(struct rte_mbuf *mb, uint16_t ethertype);\r
-\r
-/*\r
- * manage one cell's all Ethernet frames for one DL or UL LTE subframe\r
- */\r
-typedef struct {\r
- /* -1-this subframe is not used in current frame format\r
- 0-this subframe can be transmitted, i.e., data is ready\r
- 1-this subframe is waiting transmission, i.e., data is not ready\r
- 10 - DL transmission missing deadline. When FE needs this subframe data but bValid is still 1,\r
- set bValid to 10.\r
- */\r
- int32_t bValid ; // when UL rx, it is subframe index.\r
- int32_t nSegToBeGen;\r
- int32_t nSegGenerated; // how many date segment are generated by DL LTE processing or received from FE\r
- // -1 means that DL packet to be transmitted is not ready in BS\r
- int32_t nSegTransferred; // number of data segments has been transmitted or received\r
- struct rte_mbuf *pData[XRAN_N_MAX_BUFFER_SEGMENT]; // point to DPDK allocated memory pool\r
- struct xran_buffer_list sBufferList;\r
-} BbuIoBufCtrlStruct;\r
-\r
-\r
-#define XranIncrementJob(i) ((i >= (XRAN_SYM_JOB_SIZE-1)) ? 0 : (i+1))\r
-\r
-#define XRAN_MAX_PKT_BURST_PER_SYM 32\r
-#define XRAN_MAX_PACKET_FRAG 9\r
-\r
-#define MBUF_TABLE_SIZE (2 * MAX(XRAN_MAX_PKT_BURST_PER_SYM, XRAN_MAX_PACKET_FRAG))\r
-\r
-struct mbuf_table {\r
- uint16_t len;\r
- struct rte_mbuf *m_table[MBUF_TABLE_SIZE];\r
-};\r
-\r
-struct xran_device_ctx\r
-{\r
- uint8_t sector_id;\r
- uint8_t xran_port_id;\r
- struct xran_eaxcid_config eAxc_id_cfg;\r
- struct xran_fh_init fh_init;\r
- struct xran_fh_config fh_cfg;\r
- struct xran_prach_cp_config PrachCPConfig;\r
-\r
- uint32_t enablePrach;\r
- uint32_t enableCP;\r
-\r
- int32_t DynamicSectionEna;\r
- int64_t offset_sec;\r
- int64_t offset_nsec; //offset to GPS time calcuated based on alpha and beta\r
-\r
- uint32_t enableSrs;\r
- struct xran_srs_config srs_cfg; /** configuration of SRS */\r
-\r
- BbuIoBufCtrlStruct sFrontHaulTxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
- BbuIoBufCtrlStruct sFrontHaulTxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
- BbuIoBufCtrlStruct sFrontHaulRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
- BbuIoBufCtrlStruct sFrontHaulRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
- BbuIoBufCtrlStruct sFHPrachRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
- BbuIoBufCtrlStruct sFHSrsRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR];\r
-\r
- /* buffers lists */\r
- struct xran_flat_buffer sFrontHaulTxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];\r
- struct xran_flat_buffer sFrontHaulTxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];\r
- struct xran_flat_buffer sFrontHaulRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];\r
- struct xran_flat_buffer sFrontHaulRxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];\r
- struct xran_flat_buffer sFHPrachRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];\r
-\r
- struct xran_flat_buffer sFHSrsRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT];\r
-\r
- xran_transport_callback_fn pCallback[XRAN_MAX_SECTOR_NR];\r
- void *pCallbackTag[XRAN_MAX_SECTOR_NR];\r
-\r
- xran_transport_callback_fn pPrachCallback[XRAN_MAX_SECTOR_NR];\r
- void *pPrachCallbackTag[XRAN_MAX_SECTOR_NR];\r
-\r
- xran_transport_callback_fn pSrsCallback[XRAN_MAX_SECTOR_NR];\r
- void *pSrsCallbackTag[XRAN_MAX_SECTOR_NR];\r
-\r
- LIST_HEAD(sym_cb_elem_list, cb_elem_entry) sym_cb_list_head[XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];\r
-\r
- int32_t sym_up; /**< when we start sym 0 of up with respect to OTA time as measured in symbols */\r
- int32_t sym_up_ul;\r
-\r
- xran_fh_tti_callback_fn ttiCb[XRAN_CB_MAX];\r
- void *TtiCbParam[XRAN_CB_MAX];\r
- uint32_t SkipTti[XRAN_CB_MAX];\r
-\r
- int xran2phy_mem_ready;\r
-\r
- int rx_packet_symb_tracker[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];\r
- int rx_packet_prach_tracker[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];\r
- int rx_packet_callback_tracker[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR];\r
- int rx_packet_prach_callback_tracker[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR];\r
- int prach_start_symbol[XRAN_MAX_SECTOR_NR];\r
- int prach_last_symbol[XRAN_MAX_SECTOR_NR];\r
-\r
- int phy_tti_cb_done;\r
-\r
- struct rte_mempool *direct_pool;\r
- struct rte_mempool *indirect_pool;\r
- struct mbuf_table tx_mbufs[RTE_MAX_ETHPORTS];\r
-\r
- struct xran_common_counters fh_counters;\r
-\r
- phy_encoder_poll_fn bbdev_enc; /**< call back to poll BBDev encoder */\r
- phy_decoder_poll_fn bbdev_dec; /**< call back to poll BBDev decoder */\r
-\r
- xran_ethdi_mbuf_send_fn send_cpmbuf2ring; /**< callback to send mbufs of C-Plane packets to the ring */\r
- xran_ethdi_mbuf_send_fn send_upmbuf2ring; /**< callback to send mbufs of U-Plane packets to the ring */\r
-};\r
-\r
-extern long rx_counter;\r
-extern long tx_counter;\r
-extern long tx_bytes_counter;\r
-extern long rx_bytes_counter;\r
-extern long tx_bytes_per_sec;\r
-extern long rx_bytes_per_sec;\r
-\r
-\r
-extern const xRANPrachConfigTableStruct gxranPrachDataTable_sub6_fdd[XRAN_PRACH_CONFIG_TABLE_SIZE];\r
-extern const xRANPrachConfigTableStruct gxranPrachDataTable_sub6_tdd[XRAN_PRACH_CONFIG_TABLE_SIZE];\r
-extern const xRANPrachConfigTableStruct gxranPrachDataTable_mmw[XRAN_PRACH_CONFIG_TABLE_SIZE];\r
-extern const xRANPrachPreambleLRAStruct gxranPreambleforLRA[13];\r
-\r
-int process_mbuf(struct rte_mbuf *pkt);\r
-int process_ring(struct rte_ring *r);\r
-int ring_processing_thread(void *args);\r
-int packets_dump_thread(void *args);\r
-\r
-int send_symbol_ex(enum xran_pkt_dir direction,\r
- uint16_t section_id,\r
- struct rte_mbuf *mb,\r
- struct rb_map *data,\r
- const enum xran_input_byte_order iq_buf_byte_order,\r
- uint8_t frame_id,\r
- uint8_t subframe_id,\r
- uint8_t slot_id,\r
- uint8_t symbol_no,\r
- int prb_start,\r
- int prb_num,\r
- uint8_t CC_ID,\r
- uint8_t RU_Port_ID,\r
- uint8_t seq_id);\r
-\r
-int32_t prepare_symbol_ex(enum xran_pkt_dir direction,\r
- uint16_t section_id,\r
- struct rte_mbuf *mb,\r
- struct rb_map *data,\r
- uint8_t compMeth,\r
- uint8_t iqWidth,\r
- const enum xran_input_byte_order iq_buf_byte_order,\r
- uint8_t frame_id,\r
- uint8_t subframe_id,\r
- uint8_t slot_id,\r
- uint8_t symbol_no,\r
- int prb_start,\r
- int prb_num,\r
- uint8_t CC_ID,\r
- uint8_t RU_Port_ID,\r
- uint8_t seq_id,\r
- uint32_t do_copy);\r
-\r
-int send_cpmsg(void *pHandle, struct rte_mbuf *mbuf,struct xran_cp_gen_params *params,\r
- struct xran_section_gen_info *sect_geninfo, uint8_t cc_id, uint8_t ru_port_id, uint8_t seq_id);\r
-\r
-int32_t generate_cpmsg_dlul(void *pHandle, struct xran_cp_gen_params *params, struct xran_section_gen_info *sect_geninfo, struct rte_mbuf *mbuf,\r
- enum xran_pkt_dir dir, uint8_t frame_id, uint8_t subframe_id, uint8_t slot_id,\r
- uint8_t startsym, uint8_t numsym, uint16_t prb_start, uint16_t prb_num,int16_t iq_buffer_offset, int16_t iq_buffer_len,\r
- uint16_t beam_id, uint8_t cc_id, uint8_t ru_port_id, uint8_t comp_method, uint8_t iqWidth, uint8_t seq_id, uint8_t symInc);\r
-\r
-int generate_cpmsg_prach(void *pHandle, struct xran_cp_gen_params *params, struct xran_section_gen_info *sect_geninfo, struct rte_mbuf *mbuf, struct xran_device_ctx *pxran_lib_ctx,\r
- uint8_t frame_id, uint8_t subframe_id, uint8_t slot_id,\r
- uint16_t beam_id, uint8_t cc_id, uint8_t prach_port_id, uint8_t seq_id);\r
-\r
-struct xran_eaxcid_config *xran_get_conf_eAxC(void *pHandle);\r
-uint8_t xran_get_conf_prach_scs(void *pHandle);\r
-uint8_t xran_get_conf_fftsize(void *pHandle);\r
-uint8_t xran_get_conf_numerology(void *pHandle);\r
-uint8_t xran_get_conf_iqwidth(void *pHandle);\r
-uint8_t xran_get_conf_compmethod(void *pHandle);\r
-uint8_t xran_get_conf_num_bfweights(void *pHandle);\r
-\r
-uint8_t xran_get_num_cc(void *pHandle);\r
-uint8_t xran_get_num_eAxc(void *pHandle);\r
-uint8_t xran_get_num_eAxcUl(void *pHandle);\r
-uint8_t xran_get_num_ant_elm(void *pHandle);\r
-enum xran_category xran_get_ru_category(void *pHandle);\r
-\r
-struct xran_device_ctx *xran_dev_get_ctx(void);\r
-\r
-int xran_register_cb_mbuf2ring(xran_ethdi_mbuf_send_fn mbuf_send_cp, xran_ethdi_mbuf_send_fn mbuf_send_up);\r
-\r
-uint16_t xran_alloc_sectionid(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ant_id, uint8_t slot_id);\r
-uint8_t xran_get_seqid(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ant_id, uint8_t slot_id);\r
-int32_t ring_processing_func(void);\r
-int xran_init_prach(struct xran_fh_config* pConf, struct xran_device_ctx * p_xran_dev_ctx);\r
-void xran_updateSfnSecStart(void);\r
-\r
-struct cb_elem_entry *xran_create_cb(XranSymCallbackFn cb_fn, void *cb_data);\r
-int xran_destroy_cb(struct cb_elem_entry * cb_elm);\r
-\r
-#ifdef __cplusplus\r
-}\r
-#endif\r
-\r
-#endif\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief XRAN layer common functionality for both lls-CU and RU as well as C-plane and
+ * U-plane
+ * @file xran_common.h
+ * @ingroup group_source_xran
+ * @author Intel Corporation
+ **/
+
+#ifndef _XRAN_COMMON_H_
+#define _XRAN_COMMON_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdio.h>
+#include <unistd.h>
+#include <sys/param.h>
+#include <sys/queue.h>
+
+#include <rte_common.h>
+#include <rte_mbuf.h>
+#include <rte_timer.h>
+
+#include "xran_fh_o_du.h"
+#include "xran_pkt_up.h"
+#include "xran_cp_api.h"
+
+#define O_DU 0
+#define O_RU 1
+
+#define N_SC_PER_PRB 12
+#define MAX_N_FULLBAND_SC 273
+#define N_SYM_PER_SLOT 14
+#define SUBFRAME_DURATION_US 1000
+#define SLOTNUM_PER_SUBFRAME (SUBFRAME_DURATION_US/interval_us)
+#define SUBFRAMES_PER_SYSTEMFRAME 10
+#define SLOTS_PER_SYSTEMFRAME (SLOTNUM_PER_SUBFRAME*SUBFRAMES_PER_SYSTEMFRAME)
+
+/* PRACH data samples are 32 bits wide, 16bits for I and 16bits for Q. Each packet contains 839 samples for long sequence or 144*14 (max) for short sequence. The payload length is 3356 octets.*/
+#define PRACH_PLAYBACK_BUFFER_BYTES (144*14*4L)
+
+#define PRACH_SRS_BUFFER_BYTES (144*14*4L)
+
+/**< this is the configuration of M-plane */
+#define XRAN_MAX_NUM_SECTIONS (N_SYM_PER_SLOT* (XRAN_MAX_ANTENNA_NR*2) + XRAN_MAX_ANT_ARRAY_ELM_NR)
+
+#define XRAN_MAX_MBUF_LEN 9600 /**< jumbo frame */
+#define NSEC_PER_SEC 1000000000L
+#define TIMER_RESOLUTION_CYCLES 1596*1 /* 1us */
+#define XRAN_RING_SIZE 512 /*4*14*8 pow of 2 */
+#define XRAN_NAME_MAX_LEN (64)
+#define XRAN_RING_NUM (3)
+
+#define XranDiffSymIdx(prevSymIdx, currSymIdx, numTotalSymIdx) ((prevSymIdx > currSymIdx) ? ((currSymIdx + numTotalSymIdx) - prevSymIdx) : (currSymIdx - prevSymIdx))
+
+#define XRAN_MLOG_VAR 0 /**< enable debug variables to mlog */
+
+/* PRACH configuration table defines */
+#define XRAN_PRACH_CANDIDATE_PREAMBLE (2)
+#define XRAN_PRACH_CANDIDATE_Y (2)
+#define XRAN_PRACH_CANDIDATE_SLOT (40)
+#define XRAN_PRACH_CONFIG_TABLE_SIZE (256)
+#define XRAN_PRACH_PREAMBLE_FORMAT_OF_ABC (9)
+typedef enum
+{
+ FORMAT_0 = 0,
+ FORMAT_1,
+ FORMAT_2,
+ FORMAT_3,
+ FORMAT_A1,
+ FORMAT_A2,
+ FORMAT_A3,
+ FORMAT_B1,
+ FORMAT_B2,
+ FORMAT_B3,
+ FORMAT_B4,
+ FORMAT_C0,
+ FORMAT_C2,
+ FORMAT_LAST
+}PreambleFormatEnum;
+
+/* add PRACH used config table, same structure as used in refPHY */
+typedef struct
+{
+ uint8_t prachConfigIdx;
+ uint8_t preambleFmrt[XRAN_PRACH_CANDIDATE_PREAMBLE];
+ uint8_t x;
+ uint8_t y[XRAN_PRACH_CANDIDATE_Y];
+ uint8_t slotNr[XRAN_PRACH_CANDIDATE_SLOT];
+ uint8_t slotNrNum;
+ uint8_t startingSym;
+ uint8_t nrofPrachInSlot;
+ uint8_t occassionsInPrachSlot;
+ uint8_t duration;
+} xRANPrachConfigTableStruct;
+
+typedef struct
+{
+ uint8_t preambleFmrt;
+ uint16_t lRALen;
+ uint8_t fRA;
+ uint32_t nu;
+ uint16_t nRaCp;
+}xRANPrachPreambleLRAStruct;
+
+struct xran_prach_cp_config
+{
+ uint8_t filterIdx;
+ uint8_t startSymId;
+ uint16_t startPrbc;
+ uint8_t numPrbc;
+ uint8_t numSymbol;
+ uint16_t timeOffset;
+ int32_t freqOffset;
+ uint8_t nrofPrachInSlot;
+ uint8_t occassionsInPrachSlot;
+ uint8_t x;
+ uint8_t y[XRAN_PRACH_CANDIDATE_Y];
+ uint8_t isPRACHslot[XRAN_PRACH_CANDIDATE_SLOT];
+ uint8_t eAxC_offset; /**< starting eAxC for PRACH stream */
+};
+
+#define XRAN_MAX_POOLS_PER_SECTOR_NR 8 /**< 2x(TX_OUT, RX_IN, PRACH_IN, SRS_IN) with C-plane */
+
+typedef struct sectorHandleInfo
+{
+ /**< Structure that contains the information to describe the
+ * instance i.e service type, virtual function, package Id etc..*/
+ uint16_t nIndex;
+ uint16_t nXranPort;
+ /* Unique ID of an handle shared between phy layer and library */
+ /**< number of antennas supported per link*/
+ uint32_t nBufferPoolIndex;
+ /**< Buffer poolIndex*/
+ struct rte_mempool * p_bufferPool[XRAN_MAX_POOLS_PER_SECTOR_NR];
+ uint32_t bufferPoolElmSz[XRAN_MAX_POOLS_PER_SECTOR_NR];
+ uint32_t bufferPoolNumElm[XRAN_MAX_POOLS_PER_SECTOR_NR];
+
+}XranSectorHandleInfo, *PXranSectorHandleInfo;
+
+typedef void (*XranSymCallbackFn)(struct rte_timer *tim, void* arg);
+
+struct cb_elem_entry{
+ XranSymCallbackFn pSymCallback;
+ void *pSymCallbackTag;
+ LIST_ENTRY(cb_elem_entry) pointers;
+};
+
+/* Callback function to send mbuf to the ring */
+typedef int (*xran_ethdi_mbuf_send_fn)(struct rte_mbuf *mb, uint16_t ethertype);
+
+/*
+ * manage one cell's all Ethernet frames for one DL or UL LTE subframe
+ */
+typedef struct {
+ /* -1-this subframe is not used in current frame format
+ 0-this subframe can be transmitted, i.e., data is ready
+ 1-this subframe is waiting transmission, i.e., data is not ready
+ 10 - DL transmission missing deadline. When FE needs this subframe data but bValid is still 1,
+ set bValid to 10.
+ */
+ int32_t bValid ; // when UL rx, it is subframe index.
+ int32_t nSegToBeGen;
+ int32_t nSegGenerated; // how many date segment are generated by DL LTE processing or received from FE
+ // -1 means that DL packet to be transmitted is not ready in BS
+ int32_t nSegTransferred; // number of data segments has been transmitted or received
+ struct rte_mbuf *pData[XRAN_N_MAX_BUFFER_SEGMENT]; // point to DPDK allocated memory pool
+ struct xran_buffer_list sBufferList;
+} BbuIoBufCtrlStruct;
+
+
+#define XranIncrementJob(i) ((i >= (XRAN_SYM_JOB_SIZE-1)) ? 0 : (i+1))
+
+#define XRAN_MAX_PKT_BURST_PER_SYM 32
+#define XRAN_MAX_PACKET_FRAG 9
+
+#define MBUF_TABLE_SIZE (2 * MAX(XRAN_MAX_PKT_BURST_PER_SYM, XRAN_MAX_PACKET_FRAG))
+
+struct mbuf_table {
+ uint16_t len;
+ struct rte_mbuf *m_table[MBUF_TABLE_SIZE];
+};
+
+struct xran_device_ctx
+{
+ uint8_t sector_id;
+ uint8_t xran_port_id;
+ struct xran_eaxcid_config eAxc_id_cfg;
+ struct xran_fh_init fh_init;
+ struct xran_fh_config fh_cfg;
+ struct xran_prach_cp_config PrachCPConfig;
+
+ uint32_t enablePrach;
+ uint32_t enableCP;
+
+ int32_t DynamicSectionEna;
+ int64_t offset_sec;
+ int64_t offset_nsec; //offset to GPS time calcuated based on alpha and beta
+
+ uint32_t enableSrs;
+ struct xran_srs_config srs_cfg; /** configuration of SRS */
+
+ BbuIoBufCtrlStruct sFrontHaulTxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
+ BbuIoBufCtrlStruct sFrontHaulTxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
+ BbuIoBufCtrlStruct sFrontHaulRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
+ BbuIoBufCtrlStruct sFrontHaulRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
+ BbuIoBufCtrlStruct sFHPrachRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
+ BbuIoBufCtrlStruct sFHSrsRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR];
+
+ /* buffers lists */
+ struct xran_flat_buffer sFrontHaulTxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
+ struct xran_flat_buffer sFrontHaulTxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
+ struct xran_flat_buffer sFrontHaulRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
+ struct xran_flat_buffer sFrontHaulRxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
+ struct xran_flat_buffer sFHPrachRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
+
+ struct xran_flat_buffer sFHSrsRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT];
+
+ xran_transport_callback_fn pCallback[XRAN_MAX_SECTOR_NR];
+ void *pCallbackTag[XRAN_MAX_SECTOR_NR];
+
+ xran_transport_callback_fn pPrachCallback[XRAN_MAX_SECTOR_NR];
+ void *pPrachCallbackTag[XRAN_MAX_SECTOR_NR];
+
+ xran_transport_callback_fn pSrsCallback[XRAN_MAX_SECTOR_NR];
+ void *pSrsCallbackTag[XRAN_MAX_SECTOR_NR];
+
+ LIST_HEAD(sym_cb_elem_list, cb_elem_entry) sym_cb_list_head[XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
+
+ int32_t sym_up; /**< when we start sym 0 of up with respect to OTA time as measured in symbols */
+ int32_t sym_up_ul;
+
+ xran_fh_tti_callback_fn ttiCb[XRAN_CB_MAX];
+ void *TtiCbParam[XRAN_CB_MAX];
+ uint32_t SkipTti[XRAN_CB_MAX];
+
+ int xran2phy_mem_ready;
+
+ int rx_packet_symb_tracker[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
+ int rx_packet_prach_tracker[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
+ int rx_packet_callback_tracker[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR];
+ int rx_packet_prach_callback_tracker[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR];
+ int prach_start_symbol[XRAN_MAX_SECTOR_NR];
+ int prach_last_symbol[XRAN_MAX_SECTOR_NR];
+
+ int phy_tti_cb_done;
+
+ struct rte_mempool *direct_pool;
+ struct rte_mempool *indirect_pool;
+ struct mbuf_table tx_mbufs[RTE_MAX_ETHPORTS];
+
+ struct xran_common_counters fh_counters;
+
+ phy_encoder_poll_fn bbdev_enc; /**< call back to poll BBDev encoder */
+ phy_decoder_poll_fn bbdev_dec; /**< call back to poll BBDev decoder */
+
+ xran_ethdi_mbuf_send_fn send_cpmbuf2ring; /**< callback to send mbufs of C-Plane packets to the ring */
+ xran_ethdi_mbuf_send_fn send_upmbuf2ring; /**< callback to send mbufs of U-Plane packets to the ring */
+};
+
+extern long rx_counter;
+extern long tx_counter;
+extern long tx_bytes_counter;
+extern long rx_bytes_counter;
+extern long tx_bytes_per_sec;
+extern long rx_bytes_per_sec;
+
+
+extern const xRANPrachConfigTableStruct gxranPrachDataTable_sub6_fdd[XRAN_PRACH_CONFIG_TABLE_SIZE];
+extern const xRANPrachConfigTableStruct gxranPrachDataTable_sub6_tdd[XRAN_PRACH_CONFIG_TABLE_SIZE];
+extern const xRANPrachConfigTableStruct gxranPrachDataTable_mmw[XRAN_PRACH_CONFIG_TABLE_SIZE];
+extern const xRANPrachPreambleLRAStruct gxranPreambleforLRA[13];
+
+int process_mbuf(struct rte_mbuf *pkt);
+int process_ring(struct rte_ring *r);
+int ring_processing_thread(void *args);
+int packets_dump_thread(void *args);
+
+int send_symbol_ex(enum xran_pkt_dir direction,
+ uint16_t section_id,
+ struct rte_mbuf *mb,
+ struct rb_map *data,
+ const enum xran_input_byte_order iq_buf_byte_order,
+ uint8_t frame_id,
+ uint8_t subframe_id,
+ uint8_t slot_id,
+ uint8_t symbol_no,
+ int prb_start,
+ int prb_num,
+ uint8_t CC_ID,
+ uint8_t RU_Port_ID,
+ uint8_t seq_id);
+
+int32_t prepare_symbol_ex(enum xran_pkt_dir direction,
+ uint16_t section_id,
+ struct rte_mbuf *mb,
+ struct rb_map *data,
+ uint8_t compMeth,
+ uint8_t iqWidth,
+ const enum xran_input_byte_order iq_buf_byte_order,
+ uint8_t frame_id,
+ uint8_t subframe_id,
+ uint8_t slot_id,
+ uint8_t symbol_no,
+ int prb_start,
+ int prb_num,
+ uint8_t CC_ID,
+ uint8_t RU_Port_ID,
+ uint8_t seq_id,
+ uint32_t do_copy);
+
+int send_cpmsg(void *pHandle, struct rte_mbuf *mbuf,struct xran_cp_gen_params *params,
+ struct xran_section_gen_info *sect_geninfo, uint8_t cc_id, uint8_t ru_port_id, uint8_t seq_id);
+
+int32_t generate_cpmsg_dlul(void *pHandle, struct xran_cp_gen_params *params, struct xran_section_gen_info *sect_geninfo, struct rte_mbuf *mbuf,
+ enum xran_pkt_dir dir, uint8_t frame_id, uint8_t subframe_id, uint8_t slot_id,
+ uint8_t startsym, uint8_t numsym, uint16_t prb_start, uint16_t prb_num,int16_t iq_buffer_offset, int16_t iq_buffer_len,
+ uint16_t beam_id, uint8_t cc_id, uint8_t ru_port_id, uint8_t comp_method, uint8_t iqWidth, uint8_t seq_id, uint8_t symInc);
+
+int generate_cpmsg_prach(void *pHandle, struct xran_cp_gen_params *params, struct xran_section_gen_info *sect_geninfo, struct rte_mbuf *mbuf, struct xran_device_ctx *pxran_lib_ctx,
+ uint8_t frame_id, uint8_t subframe_id, uint8_t slot_id,
+ uint16_t beam_id, uint8_t cc_id, uint8_t prach_port_id, uint8_t seq_id);
+
+struct xran_eaxcid_config *xran_get_conf_eAxC(void *pHandle);
+uint8_t xran_get_conf_prach_scs(void *pHandle);
+uint8_t xran_get_conf_fftsize(void *pHandle);
+uint8_t xran_get_conf_numerology(void *pHandle);
+uint8_t xran_get_conf_iqwidth(void *pHandle);
+uint8_t xran_get_conf_compmethod(void *pHandle);
+uint8_t xran_get_conf_num_bfweights(void *pHandle);
+
+uint8_t xran_get_num_cc(void *pHandle);
+uint8_t xran_get_num_eAxc(void *pHandle);
+uint8_t xran_get_num_eAxcUl(void *pHandle);
+uint8_t xran_get_num_ant_elm(void *pHandle);
+enum xran_category xran_get_ru_category(void *pHandle);
+
+struct xran_device_ctx *xran_dev_get_ctx(void);
+
+int xran_register_cb_mbuf2ring(xran_ethdi_mbuf_send_fn mbuf_send_cp, xran_ethdi_mbuf_send_fn mbuf_send_up);
+
+uint16_t xran_alloc_sectionid(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ant_id, uint8_t slot_id);
+uint8_t xran_get_seqid(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ant_id, uint8_t slot_id);
+int32_t ring_processing_func(void);
+int xran_init_prach(struct xran_fh_config* pConf, struct xran_device_ctx * p_xran_dev_ctx);
+void xran_updateSfnSecStart(void);
+
+struct cb_elem_entry *xran_create_cb(XranSymCallbackFn cb_fn, void *cb_data);
+int xran_destroy_cb(struct cb_elem_entry * cb_elm);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-#include "xran_compression.hpp"\r
-#include "xran_compression.h"\r
-#include <complex>\r
-#include <algorithm>\r
-#include <immintrin.h>\r
-#include <limits.h>\r
-#include <cstring>\r
-\r
-static int16_t saturateAbs(int16_t inVal)\r
-{\r
- int16_t result;\r
- if (inVal == std::numeric_limits<short>::min())\r
- {\r
- result = std::numeric_limits<short>::max();\r
- }\r
- else\r
- {\r
- result = (int16_t)std::abs(inVal);\r
- }\r
- return result;\r
-}\r
-\r
-\r
-/// Compute exponent value for a set of RB from the maximum absolute value\r
-void\r
-computeExponent(const BlockFloatCompander::ExpandedData& dataIn, int8_t* expStore)\r
-{\r
- __m512i maxAbs = __m512i();\r
-\r
- /// Load data and find max(abs(RB))\r
- const __m512i* rawData = reinterpret_cast<const __m512i*>(dataIn.dataExpanded);\r
- constexpr int k_numRBPerLoop = 4;\r
- constexpr int k_numInputLoopIts = BlockFloatCompander::k_numRB / k_numRBPerLoop;\r
-\r
-#pragma unroll(k_numInputLoopIts)\r
- for (int n = 0; n < k_numInputLoopIts; ++n)\r
- {\r
- /// Re-order the next 4RB in input data into 3 registers\r
- /// Input SIMD vectors are:\r
- /// [A A A A A A A A A A A A B B B B]\r
- /// [B B B B B B B B C C C C C C C C]\r
- /// [C C C C D D D D D D D D D D D D]\r
- /// Re-ordered SIMD vectors are:\r
- /// [A A A A B B B B C C C C D D D D]\r
- /// [A A A A B B B B C C C C D D D D]\r
- /// [A A A A B B B B C C C C D D D D]\r
- constexpr uint8_t k_msk1 = 0b11111100; // Copy first lane of src\r
- constexpr int k_shuff1 = 0x41;\r
- const auto z_w1 = _mm512_mask_shuffle_i64x2(rawData[3 * n + 0], k_msk1, rawData[3 * n + 1], rawData[3 * n + 2], k_shuff1);\r
-\r
- constexpr uint8_t k_msk2 = 0b11000011; // Copy middle two lanes of src\r
- constexpr int k_shuff2 = 0xB1;\r
- const auto z_w2 = _mm512_mask_shuffle_i64x2(rawData[3 * n + 1], k_msk2, rawData[3 * n + 0], rawData[3 * n + 2], k_shuff2);\r
-\r
- constexpr uint8_t k_msk3 = 0b00111111; // Copy last lane of src\r
- constexpr int k_shuff3 = 0xBE;\r
- const auto z_w3 = _mm512_mask_shuffle_i64x2(rawData[3 * n + 2], k_msk3, rawData[3 * n + 0], rawData[3 * n + 1], k_shuff3);\r
-\r
- /// Perform max abs on these 3 registers\r
- const auto abs16_1 = _mm512_abs_epi16(z_w1);\r
- const auto abs16_2 = _mm512_abs_epi16(z_w2);\r
- const auto abs16_3 = _mm512_abs_epi16(z_w3);\r
- const auto maxAbs_12 = _mm512_max_epi16(abs16_1, abs16_2);\r
- const auto maxAbs_123 = _mm512_max_epi16(maxAbs_12, abs16_3);\r
-\r
- /// Perform horizontal max over each lane\r
- /// Swap 64b in each lane and compute max\r
- const auto k_perm64b = _mm512_set_epi64(6, 7, 4, 5, 2, 3, 0, 1);\r
- auto maxAbsPerm = _mm512_permutexvar_epi64(k_perm64b, maxAbs_123);\r
- auto maxAbsHorz = _mm512_max_epi16(maxAbs_123, maxAbsPerm);\r
-\r
- /// Swap each pair of 32b in each lane and compute max\r
- const auto k_perm32b = _mm512_set_epi32(14, 15, 12, 13, 10, 11, 8, 9, 6, 7, 4, 5, 2, 3, 0, 1);\r
- maxAbsPerm = _mm512_permutexvar_epi32(k_perm32b, maxAbsHorz);\r
- maxAbsHorz = _mm512_max_epi16(maxAbsHorz, maxAbsPerm);\r
-\r
- /// Swap each IQ pair in each lane (via 32b rotation) and compute max\r
- maxAbsPerm = _mm512_rol_epi32(maxAbsHorz, BlockFloatCompander::k_numBitsIQ);\r
- maxAbsHorz = _mm512_max_epi16(maxAbsHorz, maxAbsPerm);\r
-\r
- /// Insert values into maxAbs\r
- /// Use sliding mask to insert wanted values into maxAbs\r
- /// Pairs of values will be inserted and corrected outside of loop\r
- const auto k_select4RB = _mm512_set_epi32(28, 24, 20, 16, 28, 24, 20, 16,\r
- 28, 24, 20, 16, 28, 24, 20, 16);\r
- constexpr uint16_t k_expMsk[k_numInputLoopIts] = { 0x000F, 0x00F0, 0x0F00, 0xF000 };\r
- maxAbs = _mm512_mask_permutex2var_epi32(maxAbs, k_expMsk[n], k_select4RB, maxAbsHorz);\r
- }\r
-\r
- /// Convert to 32b by removing repeated values in maxAbs\r
- const auto k_upperWordMask = _mm512_set_epi64(0x0000FFFF0000FFFF, 0x0000FFFF0000FFFF,\r
- 0x0000FFFF0000FFFF, 0x0000FFFF0000FFFF,\r
- 0x0000FFFF0000FFFF, 0x0000FFFF0000FFFF,\r
- 0x0000FFFF0000FFFF, 0x0000FFFF0000FFFF);\r
- maxAbs = _mm512_and_epi64(maxAbs, k_upperWordMask);\r
-\r
- /// Compute and store exponent\r
- const auto totShiftBits = _mm512_set1_epi32(32 - dataIn.iqWidth + 1);\r
- const auto lzCount = _mm512_lzcnt_epi32(maxAbs);\r
- const auto exponent = _mm512_sub_epi32(totShiftBits, lzCount);\r
- constexpr uint16_t k_expWriteMask = 0xFFFF;\r
- _mm512_mask_cvtepi32_storeu_epi8(expStore, k_expWriteMask, exponent);\r
-}\r
-\r
-\r
-/// Pack compressed 9 bit data in network byte order\r
-/// See https://soco.intel.com/docs/DOC-2665619\r
-__m512i\r
-networkBytePack9b(const __m512i compData)\r
-{\r
- /// Logical shift left to align network order byte parts\r
- const __m512i k_shiftLeft = _mm512_set_epi64(0x0000000100020003, 0x0004000500060007,\r
- 0x0000000100020003, 0x0004000500060007,\r
- 0x0000000100020003, 0x0004000500060007,\r
- 0x0000000100020003, 0x0004000500060007);\r
- auto compDataPacked = _mm512_sllv_epi16(compData, k_shiftLeft);\r
-\r
- /// First epi8 shuffle of even indexed samples\r
- const __m512i k_byteShuffleMask1 = _mm512_set_epi64(0x0000000000000000, 0x0C0D080904050001,\r
- 0x0000000000000000, 0x0C0D080904050001,\r
- 0x0000000000000000, 0x0C0D080904050001,\r
- 0x0000000000000000, 0x0C0D080904050001);\r
- constexpr uint64_t k_byteMask1 = 0x000000FF00FF00FF;\r
- auto compDataShuff1 = _mm512_maskz_shuffle_epi8(k_byteMask1, compDataPacked, k_byteShuffleMask1);\r
-\r
- /// Second epi8 shuffle of odd indexed samples\r
- const __m512i k_byteShuffleMask2 = _mm512_set_epi64(0x000000000000000E, 0x0F0A0B0607020300,\r
- 0x000000000000000E, 0x0F0A0B0607020300,\r
- 0x000000000000000E, 0x0F0A0B0607020300,\r
- 0x000000000000000E, 0x0F0A0B0607020300);\r
- constexpr uint64_t k_byteMask2 = 0x000001FE01FE01FE;\r
- auto compDataShuff2 = _mm512_maskz_shuffle_epi8(k_byteMask2, compDataPacked, k_byteShuffleMask2);\r
-\r
- /// Ternary blend of the two shuffled results\r
- const __m512i k_ternLogSelect = _mm512_set_epi64(0x00000000000000FF, 0x01FC07F01FC07F00,\r
- 0x00000000000000FF, 0x01FC07F01FC07F00,\r
- 0x00000000000000FF, 0x01FC07F01FC07F00,\r
- 0x00000000000000FF, 0x01FC07F01FC07F00);\r
- return _mm512_ternarylogic_epi64(compDataShuff1, compDataShuff2, k_ternLogSelect, 0xd8);\r
-}\r
-\r
-\r
-/// Pack compressed 10 bit data in network byte order\r
-/// See https://soco.intel.com/docs/DOC-2665619\r
-__m512i\r
-networkBytePack10b(const __m512i compData)\r
-{\r
- /// Logical shift left to align network order byte parts\r
- const __m512i k_shiftLeft = _mm512_set_epi64(0x0000000200040006, 0x0000000200040006,\r
- 0x0000000200040006, 0x0000000200040006,\r
- 0x0000000200040006, 0x0000000200040006,\r
- 0x0000000200040006, 0x0000000200040006);\r
- auto compDataPacked = _mm512_sllv_epi16(compData, k_shiftLeft);\r
-\r
- /// First epi8 shuffle of even indexed samples\r
- const __m512i k_byteShuffleMask1 = _mm512_set_epi64(0x000000000000000C, 0x0D08090004050001,\r
- 0x000000000000000C, 0x0D08090004050001,\r
- 0x000000000000000C, 0x0D08090004050001,\r
- 0x000000000000000C, 0x0D08090004050001);\r
- constexpr uint64_t k_byteMask1 = 0x000001EF01EF01EF;\r
- auto compDataShuff1 = _mm512_maskz_shuffle_epi8(k_byteMask1, compDataPacked, k_byteShuffleMask1);\r
-\r
- /// Second epi8 shuffle of odd indexed samples\r
- const __m512i k_byteShuffleMask2 = _mm512_set_epi64(0x0000000000000E0F, 0x0A0B000607020300,\r
- 0x0000000000000E0F, 0x0A0B000607020300,\r
- 0x0000000000000E0F, 0x0A0B000607020300,\r
- 0x0000000000000E0F, 0x0A0B000607020300);\r
- constexpr uint64_t k_byteMask2 = 0x000003DE03DE03DE;\r
- auto compDataShuff2 = _mm512_maskz_shuffle_epi8(k_byteMask2, compDataPacked, k_byteShuffleMask2);\r
-\r
- /// Ternary blend of the two shuffled results\r
- const __m512i k_ternLogSelect = _mm512_set_epi64(0x000000000000FF03, 0xF03F00FF03F03F00,\r
- 0x000000000000FF03, 0xF03F00FF03F03F00,\r
- 0x000000000000FF03, 0xF03F00FF03F03F00,\r
- 0x000000000000FF03, 0xF03F00FF03F03F00);\r
- return _mm512_ternarylogic_epi64(compDataShuff1, compDataShuff2, k_ternLogSelect, 0xd8);\r
-}\r
-\r
-\r
-/// Pack compressed 12 bit data in network byte order\r
-/// See https://soco.intel.com/docs/DOC-2665619\r
-__m512i\r
-networkBytePack12b(const __m512i compData)\r
-{\r
- /// Logical shift left to align network order byte parts\r
- const __m512i k_shiftLeft = _mm512_set_epi64(0x0000000400000004, 0x0000000400000004,\r
- 0x0000000400000004, 0x0000000400000004,\r
- 0x0000000400000004, 0x0000000400000004,\r
- 0x0000000400000004, 0x0000000400000004);\r
- auto compDataPacked = _mm512_sllv_epi16(compData, k_shiftLeft);\r
-\r
- /// First epi8 shuffle of even indexed samples\r
- const __m512i k_byteShuffleMask1 = _mm512_set_epi64(0x00000000000C0D00, 0x0809000405000001,\r
- 0x00000000000C0D00, 0x0809000405000001,\r
- 0x00000000000C0D00, 0x0809000405000001,\r
- 0x00000000000C0D00, 0x0809000405000001);\r
- constexpr uint64_t k_byteMask1 = 0x000006DB06DB06DB;\r
- auto compDataShuff1 = _mm512_maskz_shuffle_epi8(k_byteMask1, compDataPacked, k_byteShuffleMask1);\r
-\r
- /// Second epi8 shuffle of odd indexed samples\r
- const __m512i k_byteShuffleMask2 = _mm512_set_epi64(0x000000000E0F000A, 0x0B00060700020300,\r
- 0x000000000E0F000A, 0x0B00060700020300,\r
- 0x000000000E0F000A, 0x0B00060700020300,\r
- 0x000000000E0F000A, 0x0B00060700020300);\r
- constexpr uint64_t k_byteMask2 = 0x00000DB60DB60DB6;\r
- auto compDataShuff2 = _mm512_maskz_shuffle_epi8(k_byteMask2, compDataPacked, k_byteShuffleMask2);\r
-\r
- /// Ternary blend of the two shuffled results\r
- const __m512i k_ternLogSelect = _mm512_set_epi64(0x00000000FF0F00FF, 0x0F00FF0F00FF0F00,\r
- 0x00000000FF0F00FF, 0x0F00FF0F00FF0F00,\r
- 0x00000000FF0F00FF, 0x0F00FF0F00FF0F00,\r
- 0x00000000FF0F00FF, 0x0F00FF0F00FF0F00);\r
- return _mm512_ternarylogic_epi64(compDataShuff1, compDataShuff2, k_ternLogSelect, 0xd8);\r
-}\r
-\r
-\r
-/// Unpack compressed 9 bit data in network byte order\r
-/// See https://soco.intel.com/docs/DOC-2665619\r
-__m512i\r
-networkByteUnpack9b(const uint8_t* inData)\r
-{\r
- /// Align chunks of compressed bytes into lanes to allow for expansion\r
- const __m512i* rawDataIn = reinterpret_cast<const __m512i*>(inData);\r
- const auto k_expPerm = _mm512_set_epi32(15, 14, 13, 12, 7, 6, 5, 4,\r
- 5, 4, 3, 2, 3, 2, 1, 0);\r
- auto expData = _mm512_permutexvar_epi32(k_expPerm, *rawDataIn);\r
-\r
- /// Byte shuffle to get all bits for each sample into 16b chunks\r
- /// Due to previous permute to get chunks of bytes into each lane, there is\r
- /// a different shuffle offset in each lane\r
- const __m512i k_byteShuffleMask = _mm512_set_epi64(0x0F0E0D0C0B0A0908, 0x0706050403020100,\r
- 0x090A080907080607, 0x0506040503040203,\r
- 0x0809070806070506, 0x0405030402030102,\r
- 0x0708060705060405, 0x0304020301020001);\r
- expData = _mm512_shuffle_epi8(expData, k_byteShuffleMask);\r
-\r
- /// Logical shift left to set sign bit\r
- const __m512i k_slBits = _mm512_set_epi64(0x0007000600050004, 0x0003000200010000,\r
- 0x0007000600050004, 0x0003000200010000,\r
- 0x0007000600050004, 0x0003000200010000,\r
- 0x0007000600050004, 0x0003000200010000);\r
- expData = _mm512_sllv_epi16(expData, k_slBits);\r
-\r
- /// Mask to zero unwanted bits\r
- const __m512i k_expMask = _mm512_set1_epi16(0xFF80);\r
- return _mm512_and_epi64(expData, k_expMask);\r
-}\r
-\r
-\r
-/// Unpack compressed 10 bit data in network byte order\r
-/// See https://soco.intel.com/docs/DOC-2665619\r
-__m512i\r
-networkByteUnpack10b(const uint8_t* inData)\r
-{\r
- /// Align chunks of compressed bytes into lanes to allow for expansion\r
- const __m512i* rawDataIn = reinterpret_cast<const __m512i*>(inData);\r
- const auto k_expPerm = _mm512_set_epi32(15, 14, 13, 12, 8, 7, 6, 5,\r
- 5, 4, 3, 2, 3, 2, 1, 0);\r
- auto expData = _mm512_permutexvar_epi32(k_expPerm, *rawDataIn);\r
-\r
- /// Byte shuffle to get all bits for each sample into 16b chunks\r
- /// Due to previous permute to get chunks of bytes into each lane, lanes\r
- /// 0 and 2 happen to be aligned, but lane 1 is offset by 2 bytes\r
- const __m512i k_byteShuffleMask = _mm512_set_epi64(0x0809070806070506, 0x0304020301020001,\r
- 0x0809070806070506, 0x0304020301020001,\r
- 0x0A0B090A08090708, 0x0506040503040203,\r
- 0x0809070806070506, 0x0304020301020001);\r
- expData = _mm512_shuffle_epi8(expData, k_byteShuffleMask);\r
-\r
- /// Logical shift left to set sign bit\r
- const __m512i k_slBits = _mm512_set_epi64(0x0006000400020000, 0x0006000400020000,\r
- 0x0006000400020000, 0x0006000400020000,\r
- 0x0006000400020000, 0x0006000400020000,\r
- 0x0006000400020000, 0x0006000400020000);\r
- expData = _mm512_sllv_epi16(expData, k_slBits);\r
-\r
- /// Mask to zero unwanted bits\r
- const __m512i k_expMask = _mm512_set1_epi16(0xFFC0);\r
- return _mm512_and_epi64(expData, k_expMask);\r
-}\r
-\r
-\r
-/// Unpack compressed 12 bit data in network byte order\r
-/// See https://soco.intel.com/docs/DOC-2665619\r
-__m512i\r
-networkByteUnpack12b(const uint8_t* inData)\r
-{\r
- /// Align chunks of compressed bytes into lanes to allow for expansion\r
- const __m512i* rawDataIn = reinterpret_cast<const __m512i*>(inData);\r
- const auto k_expPerm = _mm512_set_epi32(15, 14, 13, 12, 9, 8, 7, 6,\r
- 6, 5, 4, 3, 3, 2, 1, 0);\r
- auto expData = _mm512_permutexvar_epi32(k_expPerm, *rawDataIn);\r
-\r
- /// Byte shuffle to get all bits for each sample into 16b chunks\r
- /// For 12b mantissa all lanes post-permute are aligned and require same shuffle offset\r
- const __m512i k_byteShuffleMask = _mm512_set_epi64(0x0A0B090A07080607, 0x0405030401020001,\r
- 0x0A0B090A07080607, 0x0405030401020001,\r
- 0x0A0B090A07080607, 0x0405030401020001,\r
- 0x0A0B090A07080607, 0x0405030401020001);\r
- expData = _mm512_shuffle_epi8(expData, k_byteShuffleMask);\r
-\r
- /// Logical shift left to set sign bit\r
- const __m512i k_slBits = _mm512_set_epi64(0x0004000000040000, 0x0004000000040000,\r
- 0x0004000000040000, 0x0004000000040000,\r
- 0x0004000000040000, 0x0004000000040000,\r
- 0x0004000000040000, 0x0004000000040000);\r
- expData = _mm512_sllv_epi16(expData, k_slBits);\r
-\r
- /// Mask to zero unwanted bits\r
- const __m512i k_expMask = _mm512_set1_epi16(0xFFF0);\r
- return _mm512_and_epi64(expData, k_expMask);\r
-}\r
-\r
-\r
-/// 8 bit compression\r
-void\r
-BlockFloatCompander::BlockFloatCompress_8b_AVX512(const ExpandedData& dataIn, CompressedData* dataOut)\r
-{\r
- /// Compute exponent and store for later use\r
- int8_t storedExp[BlockFloatCompander::k_numRB] = {};\r
- computeExponent(dataIn, storedExp);\r
-\r
- /// Shift 1RB by corresponding exponent and write exponent and data to output\r
-#pragma unroll(BlockFloatCompander::k_numRB)\r
- for (int n = 0; n < BlockFloatCompander::k_numRB; ++n)\r
- {\r
- const __m512i* rawDataIn = reinterpret_cast<const __m512i*>(dataIn.dataExpanded + n * BlockFloatCompander::k_numREReal);\r
- auto compData = _mm512_srai_epi16(*rawDataIn, storedExp[n]);\r
- auto thisRBExpAddr = n * (BlockFloatCompander::k_numREReal + 1);\r
- /// Store exponent first\r
- dataOut->dataCompressed[thisRBExpAddr] = storedExp[n];\r
- /// Store compressed RB\r
- constexpr uint32_t k_rbMask = 0x00FFFFFF; // Write mask for 1RB (24 values)\r
- _mm256_mask_storeu_epi8(dataOut->dataCompressed + thisRBExpAddr + 1, k_rbMask, _mm512_cvtepi16_epi8(compData));\r
- }\r
-}\r
-\r
-\r
-/// 9 bit compression\r
-void\r
-BlockFloatCompander::BlockFloatCompress_9b_AVX512(const ExpandedData& dataIn, CompressedData* dataOut)\r
-{\r
- /// Compute exponent and store for later use\r
- int8_t storedExp[BlockFloatCompander::k_numRB] = {};\r
- computeExponent(dataIn, storedExp);\r
-\r
- /// Shift 1RB by corresponding exponent and write exponent and data to output\r
- /// Output data is packed exponent first followed by corresponding compressed RB\r
-#pragma unroll(BlockFloatCompander::k_numRB)\r
- for (int n = 0; n < BlockFloatCompander::k_numRB; ++n)\r
- {\r
- /// Apply exponent shift\r
- const __m512i* rawDataIn = reinterpret_cast<const __m512i*>(dataIn.dataExpanded + n * BlockFloatCompander::k_numREReal);\r
- auto compData = _mm512_srai_epi16(*rawDataIn, storedExp[n]);\r
-\r
- /// Pack compressed data network byte order\r
- auto compDataBytePacked = networkBytePack9b(compData);\r
-\r
- /// Store exponent first\r
- constexpr int k_totNumBytesPerRB = 28;\r
- auto thisRBExpAddr = n * k_totNumBytesPerRB;\r
- dataOut->dataCompressed[thisRBExpAddr] = storedExp[n];\r
-\r
- /// Now have 1 RB worth of bytes separated into 3 chunks (1 per lane)\r
- /// Use three offset stores to join\r
- constexpr uint16_t k_RbWriteMask = 0x01FF;\r
- constexpr int k_numDataBytesPerLane = 9;\r
- _mm_mask_storeu_epi8(dataOut->dataCompressed + thisRBExpAddr + 1, k_RbWriteMask, _mm512_extracti64x2_epi64(compDataBytePacked, 0));\r
- _mm_mask_storeu_epi8(dataOut->dataCompressed + thisRBExpAddr + 1 + k_numDataBytesPerLane, k_RbWriteMask, _mm512_extracti64x2_epi64(compDataBytePacked, 1));\r
- _mm_mask_storeu_epi8(dataOut->dataCompressed + thisRBExpAddr + 1 + (2 * k_numDataBytesPerLane), k_RbWriteMask, _mm512_extracti64x2_epi64(compDataBytePacked, 2));\r
- }\r
-}\r
-\r
-\r
-/// 10 bit compression\r
-void\r
-BlockFloatCompander::BlockFloatCompress_10b_AVX512(const ExpandedData& dataIn, CompressedData* dataOut)\r
-{\r
- /// Compute exponent and store for later use\r
- int8_t storedExp[BlockFloatCompander::k_numRB] = {};\r
- computeExponent(dataIn, storedExp);\r
-\r
- /// Shift 1RB by corresponding exponent and write exponent and data to output\r
- /// Output data is packed exponent first followed by corresponding compressed RB\r
-#pragma unroll(BlockFloatCompander::k_numRB)\r
- for (int n = 0; n < BlockFloatCompander::k_numRB; ++n)\r
- {\r
- /// Apply exponent shift\r
- const __m512i* rawDataIn = reinterpret_cast<const __m512i*>(dataIn.dataExpanded + n * BlockFloatCompander::k_numREReal);\r
- auto compData = _mm512_srai_epi16(*rawDataIn, storedExp[n]);\r
-\r
- /// Pack compressed data network byte order\r
- auto compDataBytePacked = networkBytePack10b(compData);\r
-\r
- /// Store exponent first\r
- constexpr int k_totNumBytesPerRB = 31;\r
- auto thisRBExpAddr = n * k_totNumBytesPerRB;\r
- dataOut->dataCompressed[thisRBExpAddr] = storedExp[n];\r
-\r
- /// Now have 1 RB worth of bytes separated into 3 chunks (1 per lane)\r
- /// Use three offset stores to join\r
- constexpr uint16_t k_RbWriteMask = 0x03FF;\r
- constexpr int k_numDataBytesPerLane = 10;\r
- _mm_mask_storeu_epi8(dataOut->dataCompressed + thisRBExpAddr + 1, k_RbWriteMask, _mm512_extracti64x2_epi64(compDataBytePacked, 0));\r
- _mm_mask_storeu_epi8(dataOut->dataCompressed + thisRBExpAddr + 1 + k_numDataBytesPerLane, k_RbWriteMask, _mm512_extracti64x2_epi64(compDataBytePacked, 1));\r
- _mm_mask_storeu_epi8(dataOut->dataCompressed + thisRBExpAddr + 1 + (2 * k_numDataBytesPerLane), k_RbWriteMask, _mm512_extracti64x2_epi64(compDataBytePacked, 2));\r
- }\r
-}\r
-\r
-\r
-/// 12 bit compression\r
-void\r
-BlockFloatCompander::BlockFloatCompress_12b_AVX512(const ExpandedData& dataIn, CompressedData* dataOut)\r
-{\r
- /// Compute exponent and store for later use\r
- int8_t storedExp[BlockFloatCompander::k_numRB] = {};\r
- computeExponent(dataIn, storedExp);\r
-\r
- /// Shift 1RB by corresponding exponent and write exponent and data to output\r
- /// Output data is packed exponent first followed by corresponding compressed RB\r
-#pragma unroll(BlockFloatCompander::k_numRB)\r
- for (int n = 0; n < BlockFloatCompander::k_numRB; ++n)\r
- {\r
- /// Apply exponent shift\r
- const __m512i* rawDataIn = reinterpret_cast<const __m512i*>(dataIn.dataExpanded + n * BlockFloatCompander::k_numREReal);\r
- auto compData = _mm512_srai_epi16(*rawDataIn, storedExp[n]);\r
-\r
- /// Pack compressed data network byte order\r
- auto compDataBytePacked = networkBytePack12b(compData);\r
-\r
- /// Store exponent first\r
- constexpr int k_totNumBytesPerRB = 37;\r
- auto thisRBExpAddr = n * k_totNumBytesPerRB;\r
- dataOut->dataCompressed[thisRBExpAddr] = storedExp[n];\r
-\r
- /// Now have 1 RB worth of bytes separated into 3 chunks (1 per lane)\r
- /// Use three offset stores to join\r
- constexpr uint16_t k_RbWriteMask = 0x0FFF;\r
- constexpr int k_numDataBytesPerLane = 12;\r
- _mm_mask_storeu_epi8(dataOut->dataCompressed + thisRBExpAddr + 1, k_RbWriteMask, _mm512_extracti64x2_epi64(compDataBytePacked, 0));\r
- _mm_mask_storeu_epi8(dataOut->dataCompressed + thisRBExpAddr + 1 + k_numDataBytesPerLane, k_RbWriteMask, _mm512_extracti64x2_epi64(compDataBytePacked, 1));\r
- _mm_mask_storeu_epi8(dataOut->dataCompressed + thisRBExpAddr + 1 + (2 * k_numDataBytesPerLane), k_RbWriteMask, _mm512_extracti64x2_epi64(compDataBytePacked, 2));\r
- }\r
-}\r
-\r
-\r
-/// 8 bit expansion\r
-void\r
-BlockFloatCompander::BlockFloatExpand_8b_AVX512(const CompressedData& dataIn, ExpandedData* dataOut)\r
-{\r
-#pragma unroll(BlockFloatCompander::k_numRB)\r
- for (int n = 0; n < BlockFloatCompander::k_numRB; ++n)\r
- {\r
- /// Expand 1RB of data\r
- auto expAddr = n * (BlockFloatCompander::k_numREReal + 1);\r
- const __m256i* rawDataIn = reinterpret_cast<const __m256i*>(dataIn.dataCompressed + expAddr + 1);\r
- const auto compData16 = _mm512_cvtepi8_epi16(*rawDataIn);\r
- const auto expData = _mm512_slli_epi16(compData16, *(dataIn.dataCompressed + expAddr));\r
- /// Write expanded data to output\r
- constexpr uint8_t k_rbMask64 = 0b00111111; // 64b write mask for 1RB (24 int16 values)\r
- _mm512_mask_storeu_epi64(dataOut->dataExpanded + n * BlockFloatCompander::k_numREReal, k_rbMask64, expData);\r
- }\r
-}\r
-\r
-\r
-/// 9 bit expansion\r
-void\r
-BlockFloatCompander::BlockFloatExpand_9b_AVX512(const CompressedData& dataIn, ExpandedData* dataOut)\r
-{\r
-#pragma unroll(BlockFloatCompander::k_numRB)\r
- for (int n = 0; n < BlockFloatCompander::k_numRB; ++n)\r
- {\r
- constexpr int k_totNumBytesPerRB = 28;\r
- auto expAddr = n * k_totNumBytesPerRB;\r
-\r
- /// Unpack network order packed data\r
- auto expData = networkByteUnpack9b(dataIn.dataCompressed + expAddr + 1);\r
-\r
- /// Apply exponent scaling (by appropriate arithmetic shift right)\r
- constexpr int k_maxExpShift = 7;\r
- expData = _mm512_srai_epi16(expData, k_maxExpShift - *(dataIn.dataCompressed + expAddr));\r
-\r
- /// Write expanded data to output\r
- static constexpr uint32_t k_WriteMask = 0x00FFFFFF;\r
- _mm512_mask_storeu_epi16(dataOut->dataExpanded + n * BlockFloatCompander::k_numREReal, k_WriteMask, expData);\r
- }\r
-}\r
-\r
-\r
-/// 10 bit expansion\r
-void\r
-BlockFloatCompander::BlockFloatExpand_10b_AVX512(const CompressedData& dataIn, ExpandedData* dataOut)\r
-{\r
-#pragma unroll(BlockFloatCompander::k_numRB)\r
- for (int n = 0; n < BlockFloatCompander::k_numRB; ++n)\r
- {\r
- constexpr int k_totNumBytesPerRB = 31;\r
- auto expAddr = n * k_totNumBytesPerRB;\r
-\r
- /// Unpack network order packed data\r
- auto expData = networkByteUnpack10b(dataIn.dataCompressed + expAddr + 1);\r
-\r
- /// Apply exponent scaling (by appropriate arithmetic shift right)\r
- constexpr int k_maxExpShift = 6;\r
- expData = _mm512_srai_epi16(expData, k_maxExpShift - *(dataIn.dataCompressed + expAddr));\r
-\r
- /// Write expanded data to output\r
- static constexpr uint32_t k_WriteMask = 0x00FFFFFF;\r
- _mm512_mask_storeu_epi16(dataOut->dataExpanded + n * BlockFloatCompander::k_numREReal, k_WriteMask, expData);\r
- }\r
-}\r
-\r
-\r
-/// 12 bit expansion\r
-void\r
-BlockFloatCompander::BlockFloatExpand_12b_AVX512(const CompressedData& dataIn, ExpandedData* dataOut)\r
-{\r
-#pragma unroll(BlockFloatCompander::k_numRB)\r
- for (int n = 0; n < BlockFloatCompander::k_numRB; ++n)\r
- {\r
- constexpr int k_totNumBytesPerRB = 37;\r
- auto expAddr = n * k_totNumBytesPerRB;\r
-\r
- /// Unpack network order packed data\r
- auto expData = networkByteUnpack12b(dataIn.dataCompressed + expAddr + 1);\r
-\r
- /// Apply exponent scaling (by appropriate arithmetic shift right)\r
- constexpr int k_maxExpShift = 4;\r
- expData = _mm512_srai_epi16(expData, k_maxExpShift - *(dataIn.dataCompressed + expAddr));\r
-\r
- /// Write expanded data to output\r
- static constexpr uint32_t k_WriteMask = 0x00FFFFFF;\r
- _mm512_mask_storeu_epi16(dataOut->dataExpanded + n * BlockFloatCompander::k_numREReal, k_WriteMask, expData);\r
- }\r
-}\r
-\r
-\r
-/// Reference compression\r
-void\r
-BlockFloatCompander::BlockFloatCompress_Basic(const ExpandedData& dataIn, CompressedData* dataOut)\r
-{\r
- int dataOutIdx = 0;\r
- int16_t iqMask = (int16_t)((1 << dataIn.iqWidth) - 1);\r
- int byteShiftUnits = dataIn.iqWidth - 8;\r
-\r
- for (int rb = 0; rb < BlockFloatCompander::k_numRB; ++rb)\r
- {\r
- /// Find max abs value for this RB\r
- int16_t maxAbs = 0;\r
- for (int re = 0; re < BlockFloatCompander::k_numREReal; ++re)\r
- {\r
- auto dataIdx = rb * BlockFloatCompander::k_numREReal + re;\r
- auto dataAbs = saturateAbs(dataIn.dataExpanded[dataIdx]);\r
- maxAbs = std::max(maxAbs, dataAbs);\r
- }\r
-\r
- // Find exponent and insert into byte stream\r
- auto thisExp = (uint8_t)(std::max(0,(16 - dataIn.iqWidth + 1 - __lzcnt16(maxAbs))));\r
- dataOut->dataCompressed[dataOutIdx++] = thisExp;\r
-\r
- /// ARS data by exponent and pack bytes in Network order\r
- /// This uses a sliding buffer where one or more bytes are\r
- /// extracted after the insertion of each compressed sample\r
- static constexpr int k_byteMask = 0xFF;\r
- int byteShiftVal = -8;\r
- int byteBuffer = { 0 };\r
- for (int re = 0; re < BlockFloatCompander::k_numREReal; ++re)\r
- {\r
- auto dataIdxIn = rb * BlockFloatCompander::k_numREReal + re;\r
- auto thisRE = dataIn.dataExpanded[dataIdxIn] >> thisExp;\r
- byteBuffer = (byteBuffer << dataIn.iqWidth) + (int)(thisRE & iqMask);\r
-\r
- byteShiftVal += (8 + byteShiftUnits);\r
- while (byteShiftVal >= 0)\r
- {\r
- auto thisByte = (uint8_t)((byteBuffer >> byteShiftVal) & k_byteMask);\r
- dataOut->dataCompressed[dataOutIdx++] = thisByte;\r
- byteShiftVal -= 8;\r
- }\r
- }\r
- }\r
- dataOut->iqWidth = dataIn.iqWidth;\r
-}\r
-\r
-/// Reference expansion\r
-void\r
-BlockFloatCompander::BlockFloatExpand_Basic(const CompressedData& dataIn, ExpandedData* dataOut)\r
-{\r
- uint32_t iqMask = (uint32_t)(UINT_MAX - ((1 << (32 - dataIn.iqWidth)) - 1));\r
- uint32_t byteBuffer = { 0 };\r
- int numBytesPerRB = (3 * dataIn.iqWidth) + 1;\r
- int bitPointer = 0;\r
- int dataIdxOut = 0;\r
-\r
- for (int rb = 0; rb < BlockFloatCompander::k_numRB; ++rb)\r
- {\r
- auto expIdx = rb * numBytesPerRB;\r
- auto signExtShift = 32 - dataIn.iqWidth - dataIn.dataCompressed[expIdx];\r
-\r
- for (int b = 0; b < numBytesPerRB - 1; ++b)\r
- {\r
- auto dataIdxIn = (expIdx + 1) + b;\r
- auto thisByte = (uint16_t)dataIn.dataCompressed[dataIdxIn];\r
- byteBuffer = (uint32_t)((byteBuffer << 8) + thisByte);\r
- bitPointer += 8;\r
- while (bitPointer >= dataIn.iqWidth)\r
- {\r
- /// byteBuffer currently has enough data in it to extract a sample\r
- /// Shift left first to set sign bit at MSB, then shift right to\r
- /// sign extend down to iqWidth. Finally recast to int16.\r
- int32_t thisSample32 = (int32_t)((byteBuffer << (32 - bitPointer)) & iqMask);\r
- int16_t thisSample = (int16_t)(thisSample32 >> signExtShift);\r
- bitPointer -= dataIn.iqWidth;\r
- dataOut->dataExpanded[dataIdxOut++] = thisSample;\r
- }\r
- }\r
- }\r
-}\r
-\r
-/// Reference compression\r
-void\r
-BlockFloatCompanderBFW::BlockFloatCompress_Basic(const BlockFloatCompanderBFW::ExpandedData& dataIn, BlockFloatCompanderBFW::CompressedData* dataOut)\r
-{\r
- int dataOutIdx = 0;\r
- int16_t iqMask = (int16_t)((1 << dataIn.iqWidth) - 1);\r
- int byteShiftUnits = dataIn.iqWidth - 8;\r
-\r
- for (int rb = 0; rb < BlockFloatCompanderBFW::k_numRB; ++rb)\r
- {\r
- /// Find max abs value for this RB\r
- int16_t maxAbs = 0;\r
- for (int re = 0; re < BlockFloatCompanderBFW::k_numREReal; ++re)\r
- {\r
- auto dataIdx = rb * BlockFloatCompanderBFW::k_numREReal + re;\r
- auto dataAbs = saturateAbs(dataIn.dataExpanded[dataIdx]);\r
- maxAbs = std::max(maxAbs, dataAbs);\r
- }\r
-\r
- // Find exponent and insert into byte stream\r
- auto thisExp = (uint8_t)(std::max(0,(16 - dataIn.iqWidth + 1 - __lzcnt16(maxAbs))));\r
- dataOut->dataCompressed[dataOutIdx++] = thisExp;\r
-\r
- /// ARS data by exponent and pack bytes in Network order\r
- /// This uses a sliding buffer where one or more bytes are\r
- /// extracted after the insertion of each compressed sample\r
- static constexpr int k_byteMask = 0xFF;\r
- int byteShiftVal = -8;\r
- int byteBuffer = { 0 };\r
- for (int re = 0; re < BlockFloatCompanderBFW::k_numREReal; ++re)\r
- {\r
- auto dataIdxIn = rb * BlockFloatCompanderBFW::k_numREReal + re;\r
- auto thisRE = dataIn.dataExpanded[dataIdxIn] >> thisExp;\r
- byteBuffer = (byteBuffer << dataIn.iqWidth) + (int)(thisRE & iqMask);\r
-\r
- byteShiftVal += (8 + byteShiftUnits);\r
- while (byteShiftVal >= 0)\r
- {\r
- auto thisByte = (uint8_t)((byteBuffer >> byteShiftVal) & k_byteMask);\r
- dataOut->dataCompressed[dataOutIdx++] = thisByte;\r
- byteShiftVal -= 8;\r
- }\r
- }\r
- }\r
- dataOut->iqWidth = dataIn.iqWidth;\r
-}\r
-\r
-/// Reference expansion\r
-void\r
-BlockFloatCompanderBFW::BlockFloatExpand_Basic(const BlockFloatCompanderBFW::CompressedData& dataIn, BlockFloatCompanderBFW::ExpandedData* dataOut)\r
-{\r
- uint32_t iqMask = (uint32_t)(UINT_MAX - ((1 << (32 - dataIn.iqWidth)) - 1));\r
- uint32_t byteBuffer = { 0 };\r
- int numBytesPerRB = (3 * dataIn.iqWidth) + 1;\r
- int bitPointer = 0;\r
- int dataIdxOut = 0;\r
-\r
- for (int rb = 0; rb < BlockFloatCompanderBFW::k_numRB; ++rb)\r
- {\r
- auto expIdx = rb * numBytesPerRB;\r
- auto signExtShift = 32 - dataIn.iqWidth - dataIn.dataCompressed[expIdx];\r
-\r
- for (int b = 0; b < numBytesPerRB - 1; ++b)\r
- {\r
- auto dataIdxIn = (expIdx + 1) + b;\r
- auto thisByte = (uint16_t)dataIn.dataCompressed[dataIdxIn];\r
- byteBuffer = (uint32_t)((byteBuffer << 8) + thisByte);\r
- bitPointer += 8;\r
- while (bitPointer >= dataIn.iqWidth)\r
- {\r
- /// byteBuffer currently has enough data in it to extract a sample\r
- /// Shift left first to set sign bit at MSB, then shift right to\r
- /// sign extend down to iqWidth. Finally recast to int16.\r
- int32_t thisSample32 = (int32_t)((byteBuffer << (32 - bitPointer)) & iqMask);\r
- int16_t thisSample = (int16_t)(thisSample32 >> signExtShift);\r
- bitPointer -= dataIn.iqWidth;\r
- dataOut->dataExpanded[dataIdxOut++] = thisSample;\r
- }\r
- }\r
- }\r
-}\r
-\r
-#define RB_NUM_ROUNDUP(rb) \\r
- (BlockFloatCompander::k_numRB * ((rb + BlockFloatCompander::k_numRB - 1) / BlockFloatCompander::k_numRB))\r
-\r
-\r
-/** callback function type for Symbol packet */\r
-typedef void (*xran_bfp_compress_fn)(const BlockFloatCompander::ExpandedData& dataIn,\r
- BlockFloatCompander::CompressedData* dataOut);\r
-\r
-int32_t\r
-xranlib_compress_avx512(const struct xranlib_compress_request *request,\r
- struct xranlib_compress_response *response)\r
-{\r
- BlockFloatCompander::ExpandedData expandedDataInput;\r
- BlockFloatCompander::CompressedData compressedDataOut;\r
- xran_bfp_compress_fn com_fn = NULL;\r
- int16_t numRBs = request->numRBs;\r
- int16_t len = 0;\r
-\r
- switch (request->iqWidth){\r
- case 8:\r
- expandedDataInput.iqWidth = 8;\r
- com_fn = BlockFloatCompander::BlockFloatCompress_8b_AVX512;\r
- break;\r
- case 9:\r
- expandedDataInput.iqWidth = 9;\r
- com_fn = BlockFloatCompander::BlockFloatCompress_9b_AVX512;\r
- break;\r
- case 10:\r
- expandedDataInput.iqWidth = 10;\r
- com_fn = BlockFloatCompander::BlockFloatCompress_10b_AVX512;\r
- break;\r
- case 12:\r
- expandedDataInput.iqWidth = 12;\r
- com_fn = BlockFloatCompander::BlockFloatCompress_12b_AVX512;\r
- break;\r
- default:\r
- expandedDataInput.iqWidth = request->iqWidth;\r
- com_fn = BlockFloatCompander::BlockFloatCompress_Basic;\r
- break;\r
- }\r
-\r
- for (int16_t block_idx = 0;\r
- block_idx < RB_NUM_ROUNDUP(numRBs)/BlockFloatCompander::k_numRB /*+ 1*/; /* 16 RBs at time */\r
- block_idx++) {\r
-\r
- expandedDataInput.dataExpanded =\r
- &request->data_in[block_idx*BlockFloatCompander::k_numSampsExpanded];\r
- compressedDataOut.dataCompressed =\r
- (uint8_t*)&response->data_out[len];\r
-\r
- com_fn(expandedDataInput, &compressedDataOut);\r
- len += ((3 * expandedDataInput.iqWidth) + 1) * std::min((int16_t)BlockFloatCompander::k_numRB,(int16_t)numRBs);\r
- }\r
-\r
- response->len = ((3 * expandedDataInput.iqWidth) + 1) * numRBs;\r
-\r
- return 0;\r
-}\r
-\r
-/** callback function type for Symbol packet */\r
-typedef void (*xran_bfp_compress_bfw_fn)(const BlockFloatCompanderBFW::ExpandedData& dataIn, BlockFloatCompanderBFW::CompressedData* dataOut);\r
-\r
-int32_t\r
-xranlib_compress_avx512_bfw(const struct xranlib_compress_request *request,\r
- struct xranlib_compress_response *response)\r
-{\r
- BlockFloatCompanderBFW::ExpandedData expandedDataInput;\r
- BlockFloatCompanderBFW::CompressedData compressedDataKern;\r
- xran_bfp_compress_bfw_fn com_fn = NULL;\r
-\r
-#if 0\r
- for (int m = 0; m < BlockFloatCompander::k_numRB; ++m){\r
- for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n){\r
- expandedDataInput.dataExpanded[m*BlockFloatCompander::k_numREReal+n] =\r
- request->data_in[m*BlockFloatCompander::k_numREReal+n];\r
- }\r
- }\r
-#endif\r
-\r
- expandedDataInput.dataExpanded = request->data_in;\r
- compressedDataKern.dataCompressed = (uint8_t*)response->data_out;\r
-\r
- com_fn = BlockFloatCompanderBFW::BlockFloatCompress_Basic;\r
- switch (request->iqWidth){\r
- case 8:\r
- expandedDataInput.iqWidth = 8;\r
- break;\r
- case 9:\r
- expandedDataInput.iqWidth = 9;\r
- //com_fn = BlockFloatCompanderBFW::BlockFloatExpand_9b_AVX512\r
- break;\r
- case 10:\r
- expandedDataInput.iqWidth = 10;\r
- break;\r
- case 12:\r
- expandedDataInput.iqWidth = 12;\r
- break;\r
- default:\r
- printf("bfwIqWidth is not supported %d\n", request->iqWidth);\r
- return -1;\r
- break;\r
- }\r
-\r
- com_fn(expandedDataInput, &compressedDataKern);\r
- response->len = ((BlockFloatCompanderBFW::k_numRE/16*4*expandedDataInput.iqWidth)+1)*BlockFloatCompanderBFW::k_numRB;\r
-\r
- return 0;\r
-}\r
-\r
-/** callback function type for Symbol packet */\r
-typedef void (*xran_bfp_decompress_fn)(const BlockFloatCompander::CompressedData& dataIn, BlockFloatCompander::ExpandedData* dataOut);\r
-\r
-\r
-int32_t\r
-xranlib_decompress_avx512(const struct xranlib_decompress_request *request,\r
- struct xranlib_decompress_response *response)\r
-{\r
-\r
- BlockFloatCompander::CompressedData compressedDataInput;\r
- BlockFloatCompander::ExpandedData expandedDataOut;\r
-\r
- xran_bfp_decompress_fn decom_fn = NULL;\r
- int16_t numRBs = request->numRBs;\r
- int16_t len = 0;\r
-\r
- switch (request->iqWidth){\r
- case 8:\r
- compressedDataInput.iqWidth = 8;\r
- decom_fn = BlockFloatCompander::BlockFloatExpand_8b_AVX512;\r
- break;\r
- case 9:\r
- compressedDataInput.iqWidth = 9;\r
- decom_fn = BlockFloatCompander::BlockFloatExpand_9b_AVX512;\r
- break;\r
- case 10:\r
- compressedDataInput.iqWidth = 10;\r
- decom_fn = BlockFloatCompander::BlockFloatExpand_10b_AVX512;\r
- break;\r
- case 12:\r
- compressedDataInput.iqWidth = 12;\r
- decom_fn = BlockFloatCompander::BlockFloatExpand_12b_AVX512;\r
- break;\r
- default:\r
- compressedDataInput.iqWidth = request->iqWidth;\r
- decom_fn = BlockFloatCompander::BlockFloatExpand_Basic;\r
- break;\r
- }\r
-\r
- for (int16_t block_idx = 0;\r
- block_idx < RB_NUM_ROUNDUP(numRBs)/BlockFloatCompander::k_numRB;\r
- block_idx++) {\r
-\r
- compressedDataInput.dataCompressed = (uint8_t*)&request->data_in[block_idx*(((3 * compressedDataInput.iqWidth ) + 1) * BlockFloatCompander::k_numRB)];\r
- expandedDataOut.dataExpanded = &response->data_out[len];\r
-\r
- decom_fn(compressedDataInput, &expandedDataOut);\r
- len += std::min((int16_t)BlockFloatCompander::k_numSampsExpanded, (int16_t)(numRBs*BlockFloatCompander::k_numREReal));\r
- }\r
-\r
- response->len = numRBs * BlockFloatCompander::k_numREReal* sizeof(int16_t);\r
-\r
- return 0;\r
-}\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+#include "xran_compression.hpp"
+#include "xran_compression.h"
+#include <complex>
+#include <algorithm>
+#include <immintrin.h>
+#include <limits.h>
+#include <cstring>
+
+static int16_t saturateAbs(int16_t inVal)
+{
+ int16_t result;
+ if (inVal == std::numeric_limits<short>::min())
+ {
+ result = std::numeric_limits<short>::max();
+ }
+ else
+ {
+ result = (int16_t)std::abs(inVal);
+ }
+ return result;
+}
+
+
+/// Compute exponent value for a set of RB from the maximum absolute value
+void
+computeExponent(const BlockFloatCompander::ExpandedData& dataIn, int8_t* expStore)
+{
+ __m512i maxAbs = __m512i();
+
+ /// Load data and find max(abs(RB))
+ const __m512i* rawData = reinterpret_cast<const __m512i*>(dataIn.dataExpanded);
+ constexpr int k_numRBPerLoop = 4;
+ constexpr int k_numInputLoopIts = BlockFloatCompander::k_numRB / k_numRBPerLoop;
+
+#pragma unroll(k_numInputLoopIts)
+ for (int n = 0; n < k_numInputLoopIts; ++n)
+ {
+ /// Re-order the next 4RB in input data into 3 registers
+ /// Input SIMD vectors are:
+ /// [A A A A A A A A A A A A B B B B]
+ /// [B B B B B B B B C C C C C C C C]
+ /// [C C C C D D D D D D D D D D D D]
+ /// Re-ordered SIMD vectors are:
+ /// [A A A A B B B B C C C C D D D D]
+ /// [A A A A B B B B C C C C D D D D]
+ /// [A A A A B B B B C C C C D D D D]
+ constexpr uint8_t k_msk1 = 0b11111100; // Copy first lane of src
+ constexpr int k_shuff1 = 0x41;
+ const auto z_w1 = _mm512_mask_shuffle_i64x2(rawData[3 * n + 0], k_msk1, rawData[3 * n + 1], rawData[3 * n + 2], k_shuff1);
+
+ constexpr uint8_t k_msk2 = 0b11000011; // Copy middle two lanes of src
+ constexpr int k_shuff2 = 0xB1;
+ const auto z_w2 = _mm512_mask_shuffle_i64x2(rawData[3 * n + 1], k_msk2, rawData[3 * n + 0], rawData[3 * n + 2], k_shuff2);
+
+ constexpr uint8_t k_msk3 = 0b00111111; // Copy last lane of src
+ constexpr int k_shuff3 = 0xBE;
+ const auto z_w3 = _mm512_mask_shuffle_i64x2(rawData[3 * n + 2], k_msk3, rawData[3 * n + 0], rawData[3 * n + 1], k_shuff3);
+
+ /// Perform max abs on these 3 registers
+ const auto abs16_1 = _mm512_abs_epi16(z_w1);
+ const auto abs16_2 = _mm512_abs_epi16(z_w2);
+ const auto abs16_3 = _mm512_abs_epi16(z_w3);
+ const auto maxAbs_12 = _mm512_max_epi16(abs16_1, abs16_2);
+ const auto maxAbs_123 = _mm512_max_epi16(maxAbs_12, abs16_3);
+
+ /// Perform horizontal max over each lane
+ /// Swap 64b in each lane and compute max
+ const auto k_perm64b = _mm512_set_epi64(6, 7, 4, 5, 2, 3, 0, 1);
+ auto maxAbsPerm = _mm512_permutexvar_epi64(k_perm64b, maxAbs_123);
+ auto maxAbsHorz = _mm512_max_epi16(maxAbs_123, maxAbsPerm);
+
+ /// Swap each pair of 32b in each lane and compute max
+ const auto k_perm32b = _mm512_set_epi32(14, 15, 12, 13, 10, 11, 8, 9, 6, 7, 4, 5, 2, 3, 0, 1);
+ maxAbsPerm = _mm512_permutexvar_epi32(k_perm32b, maxAbsHorz);
+ maxAbsHorz = _mm512_max_epi16(maxAbsHorz, maxAbsPerm);
+
+ /// Swap each IQ pair in each lane (via 32b rotation) and compute max
+ maxAbsPerm = _mm512_rol_epi32(maxAbsHorz, BlockFloatCompander::k_numBitsIQ);
+ maxAbsHorz = _mm512_max_epi16(maxAbsHorz, maxAbsPerm);
+
+ /// Insert values into maxAbs
+ /// Use sliding mask to insert wanted values into maxAbs
+ /// Pairs of values will be inserted and corrected outside of loop
+ const auto k_select4RB = _mm512_set_epi32(28, 24, 20, 16, 28, 24, 20, 16,
+ 28, 24, 20, 16, 28, 24, 20, 16);
+ constexpr uint16_t k_expMsk[k_numInputLoopIts] = { 0x000F, 0x00F0, 0x0F00, 0xF000 };
+ maxAbs = _mm512_mask_permutex2var_epi32(maxAbs, k_expMsk[n], k_select4RB, maxAbsHorz);
+ }
+
+ /// Convert to 32b by removing repeated values in maxAbs
+ const auto k_upperWordMask = _mm512_set_epi64(0x0000FFFF0000FFFF, 0x0000FFFF0000FFFF,
+ 0x0000FFFF0000FFFF, 0x0000FFFF0000FFFF,
+ 0x0000FFFF0000FFFF, 0x0000FFFF0000FFFF,
+ 0x0000FFFF0000FFFF, 0x0000FFFF0000FFFF);
+ maxAbs = _mm512_and_epi64(maxAbs, k_upperWordMask);
+
+ /// Compute and store exponent
+ const auto totShiftBits = _mm512_set1_epi32(32 - dataIn.iqWidth + 1);
+ const auto lzCount = _mm512_lzcnt_epi32(maxAbs);
+ const auto exponent = _mm512_sub_epi32(totShiftBits, lzCount);
+ constexpr uint16_t k_expWriteMask = 0xFFFF;
+ _mm512_mask_cvtepi32_storeu_epi8(expStore, k_expWriteMask, exponent);
+}
+
+
+/// Pack compressed 9 bit data in network byte order
+/// See https://soco.intel.com/docs/DOC-2665619
+__m512i
+networkBytePack9b(const __m512i compData)
+{
+ /// Logical shift left to align network order byte parts
+ const __m512i k_shiftLeft = _mm512_set_epi64(0x0000000100020003, 0x0004000500060007,
+ 0x0000000100020003, 0x0004000500060007,
+ 0x0000000100020003, 0x0004000500060007,
+ 0x0000000100020003, 0x0004000500060007);
+ auto compDataPacked = _mm512_sllv_epi16(compData, k_shiftLeft);
+
+ /// First epi8 shuffle of even indexed samples
+ const __m512i k_byteShuffleMask1 = _mm512_set_epi64(0x0000000000000000, 0x0C0D080904050001,
+ 0x0000000000000000, 0x0C0D080904050001,
+ 0x0000000000000000, 0x0C0D080904050001,
+ 0x0000000000000000, 0x0C0D080904050001);
+ constexpr uint64_t k_byteMask1 = 0x000000FF00FF00FF;
+ auto compDataShuff1 = _mm512_maskz_shuffle_epi8(k_byteMask1, compDataPacked, k_byteShuffleMask1);
+
+ /// Second epi8 shuffle of odd indexed samples
+ const __m512i k_byteShuffleMask2 = _mm512_set_epi64(0x000000000000000E, 0x0F0A0B0607020300,
+ 0x000000000000000E, 0x0F0A0B0607020300,
+ 0x000000000000000E, 0x0F0A0B0607020300,
+ 0x000000000000000E, 0x0F0A0B0607020300);
+ constexpr uint64_t k_byteMask2 = 0x000001FE01FE01FE;
+ auto compDataShuff2 = _mm512_maskz_shuffle_epi8(k_byteMask2, compDataPacked, k_byteShuffleMask2);
+
+ /// Ternary blend of the two shuffled results
+ const __m512i k_ternLogSelect = _mm512_set_epi64(0x00000000000000FF, 0x01FC07F01FC07F00,
+ 0x00000000000000FF, 0x01FC07F01FC07F00,
+ 0x00000000000000FF, 0x01FC07F01FC07F00,
+ 0x00000000000000FF, 0x01FC07F01FC07F00);
+ return _mm512_ternarylogic_epi64(compDataShuff1, compDataShuff2, k_ternLogSelect, 0xd8);
+}
+
+
+/// Pack compressed 10 bit data in network byte order
+/// See https://soco.intel.com/docs/DOC-2665619
+__m512i
+networkBytePack10b(const __m512i compData)
+{
+ /// Logical shift left to align network order byte parts
+ const __m512i k_shiftLeft = _mm512_set_epi64(0x0000000200040006, 0x0000000200040006,
+ 0x0000000200040006, 0x0000000200040006,
+ 0x0000000200040006, 0x0000000200040006,
+ 0x0000000200040006, 0x0000000200040006);
+ auto compDataPacked = _mm512_sllv_epi16(compData, k_shiftLeft);
+
+ /// First epi8 shuffle of even indexed samples
+ const __m512i k_byteShuffleMask1 = _mm512_set_epi64(0x000000000000000C, 0x0D08090004050001,
+ 0x000000000000000C, 0x0D08090004050001,
+ 0x000000000000000C, 0x0D08090004050001,
+ 0x000000000000000C, 0x0D08090004050001);
+ constexpr uint64_t k_byteMask1 = 0x000001EF01EF01EF;
+ auto compDataShuff1 = _mm512_maskz_shuffle_epi8(k_byteMask1, compDataPacked, k_byteShuffleMask1);
+
+ /// Second epi8 shuffle of odd indexed samples
+ const __m512i k_byteShuffleMask2 = _mm512_set_epi64(0x0000000000000E0F, 0x0A0B000607020300,
+ 0x0000000000000E0F, 0x0A0B000607020300,
+ 0x0000000000000E0F, 0x0A0B000607020300,
+ 0x0000000000000E0F, 0x0A0B000607020300);
+ constexpr uint64_t k_byteMask2 = 0x000003DE03DE03DE;
+ auto compDataShuff2 = _mm512_maskz_shuffle_epi8(k_byteMask2, compDataPacked, k_byteShuffleMask2);
+
+ /// Ternary blend of the two shuffled results
+ const __m512i k_ternLogSelect = _mm512_set_epi64(0x000000000000FF03, 0xF03F00FF03F03F00,
+ 0x000000000000FF03, 0xF03F00FF03F03F00,
+ 0x000000000000FF03, 0xF03F00FF03F03F00,
+ 0x000000000000FF03, 0xF03F00FF03F03F00);
+ return _mm512_ternarylogic_epi64(compDataShuff1, compDataShuff2, k_ternLogSelect, 0xd8);
+}
+
+
+/// Pack compressed 12 bit data in network byte order
+/// See https://soco.intel.com/docs/DOC-2665619
+__m512i
+networkBytePack12b(const __m512i compData)
+{
+ /// Logical shift left to align network order byte parts
+ const __m512i k_shiftLeft = _mm512_set_epi64(0x0000000400000004, 0x0000000400000004,
+ 0x0000000400000004, 0x0000000400000004,
+ 0x0000000400000004, 0x0000000400000004,
+ 0x0000000400000004, 0x0000000400000004);
+ auto compDataPacked = _mm512_sllv_epi16(compData, k_shiftLeft);
+
+ /// First epi8 shuffle of even indexed samples
+ const __m512i k_byteShuffleMask1 = _mm512_set_epi64(0x00000000000C0D00, 0x0809000405000001,
+ 0x00000000000C0D00, 0x0809000405000001,
+ 0x00000000000C0D00, 0x0809000405000001,
+ 0x00000000000C0D00, 0x0809000405000001);
+ constexpr uint64_t k_byteMask1 = 0x000006DB06DB06DB;
+ auto compDataShuff1 = _mm512_maskz_shuffle_epi8(k_byteMask1, compDataPacked, k_byteShuffleMask1);
+
+ /// Second epi8 shuffle of odd indexed samples
+ const __m512i k_byteShuffleMask2 = _mm512_set_epi64(0x000000000E0F000A, 0x0B00060700020300,
+ 0x000000000E0F000A, 0x0B00060700020300,
+ 0x000000000E0F000A, 0x0B00060700020300,
+ 0x000000000E0F000A, 0x0B00060700020300);
+ constexpr uint64_t k_byteMask2 = 0x00000DB60DB60DB6;
+ auto compDataShuff2 = _mm512_maskz_shuffle_epi8(k_byteMask2, compDataPacked, k_byteShuffleMask2);
+
+ /// Ternary blend of the two shuffled results
+ const __m512i k_ternLogSelect = _mm512_set_epi64(0x00000000FF0F00FF, 0x0F00FF0F00FF0F00,
+ 0x00000000FF0F00FF, 0x0F00FF0F00FF0F00,
+ 0x00000000FF0F00FF, 0x0F00FF0F00FF0F00,
+ 0x00000000FF0F00FF, 0x0F00FF0F00FF0F00);
+ return _mm512_ternarylogic_epi64(compDataShuff1, compDataShuff2, k_ternLogSelect, 0xd8);
+}
+
+
+/// Unpack compressed 9 bit data in network byte order
+/// See https://soco.intel.com/docs/DOC-2665619
+__m512i
+networkByteUnpack9b(const uint8_t* inData)
+{
+ /// Align chunks of compressed bytes into lanes to allow for expansion
+ const __m512i* rawDataIn = reinterpret_cast<const __m512i*>(inData);
+ const auto k_expPerm = _mm512_set_epi32(15, 14, 13, 12, 7, 6, 5, 4,
+ 5, 4, 3, 2, 3, 2, 1, 0);
+ auto expData = _mm512_permutexvar_epi32(k_expPerm, *rawDataIn);
+
+ /// Byte shuffle to get all bits for each sample into 16b chunks
+ /// Due to previous permute to get chunks of bytes into each lane, there is
+ /// a different shuffle offset in each lane
+ const __m512i k_byteShuffleMask = _mm512_set_epi64(0x0F0E0D0C0B0A0908, 0x0706050403020100,
+ 0x090A080907080607, 0x0506040503040203,
+ 0x0809070806070506, 0x0405030402030102,
+ 0x0708060705060405, 0x0304020301020001);
+ expData = _mm512_shuffle_epi8(expData, k_byteShuffleMask);
+
+ /// Logical shift left to set sign bit
+ const __m512i k_slBits = _mm512_set_epi64(0x0007000600050004, 0x0003000200010000,
+ 0x0007000600050004, 0x0003000200010000,
+ 0x0007000600050004, 0x0003000200010000,
+ 0x0007000600050004, 0x0003000200010000);
+ expData = _mm512_sllv_epi16(expData, k_slBits);
+
+ /// Mask to zero unwanted bits
+ const __m512i k_expMask = _mm512_set1_epi16(0xFF80);
+ return _mm512_and_epi64(expData, k_expMask);
+}
+
+
+/// Unpack compressed 10 bit data in network byte order
+/// See https://soco.intel.com/docs/DOC-2665619
+__m512i
+networkByteUnpack10b(const uint8_t* inData)
+{
+ /// Align chunks of compressed bytes into lanes to allow for expansion
+ const __m512i* rawDataIn = reinterpret_cast<const __m512i*>(inData);
+ const auto k_expPerm = _mm512_set_epi32(15, 14, 13, 12, 8, 7, 6, 5,
+ 5, 4, 3, 2, 3, 2, 1, 0);
+ auto expData = _mm512_permutexvar_epi32(k_expPerm, *rawDataIn);
+
+ /// Byte shuffle to get all bits for each sample into 16b chunks
+ /// Due to previous permute to get chunks of bytes into each lane, lanes
+ /// 0 and 2 happen to be aligned, but lane 1 is offset by 2 bytes
+ const __m512i k_byteShuffleMask = _mm512_set_epi64(0x0809070806070506, 0x0304020301020001,
+ 0x0809070806070506, 0x0304020301020001,
+ 0x0A0B090A08090708, 0x0506040503040203,
+ 0x0809070806070506, 0x0304020301020001);
+ expData = _mm512_shuffle_epi8(expData, k_byteShuffleMask);
+
+ /// Logical shift left to set sign bit
+ const __m512i k_slBits = _mm512_set_epi64(0x0006000400020000, 0x0006000400020000,
+ 0x0006000400020000, 0x0006000400020000,
+ 0x0006000400020000, 0x0006000400020000,
+ 0x0006000400020000, 0x0006000400020000);
+ expData = _mm512_sllv_epi16(expData, k_slBits);
+
+ /// Mask to zero unwanted bits
+ const __m512i k_expMask = _mm512_set1_epi16(0xFFC0);
+ return _mm512_and_epi64(expData, k_expMask);
+}
+
+
+/// Unpack compressed 12 bit data in network byte order
+/// See https://soco.intel.com/docs/DOC-2665619
+__m512i
+networkByteUnpack12b(const uint8_t* inData)
+{
+ /// Align chunks of compressed bytes into lanes to allow for expansion
+ const __m512i* rawDataIn = reinterpret_cast<const __m512i*>(inData);
+ const auto k_expPerm = _mm512_set_epi32(15, 14, 13, 12, 9, 8, 7, 6,
+ 6, 5, 4, 3, 3, 2, 1, 0);
+ auto expData = _mm512_permutexvar_epi32(k_expPerm, *rawDataIn);
+
+ /// Byte shuffle to get all bits for each sample into 16b chunks
+ /// For 12b mantissa all lanes post-permute are aligned and require same shuffle offset
+ const __m512i k_byteShuffleMask = _mm512_set_epi64(0x0A0B090A07080607, 0x0405030401020001,
+ 0x0A0B090A07080607, 0x0405030401020001,
+ 0x0A0B090A07080607, 0x0405030401020001,
+ 0x0A0B090A07080607, 0x0405030401020001);
+ expData = _mm512_shuffle_epi8(expData, k_byteShuffleMask);
+
+ /// Logical shift left to set sign bit
+ const __m512i k_slBits = _mm512_set_epi64(0x0004000000040000, 0x0004000000040000,
+ 0x0004000000040000, 0x0004000000040000,
+ 0x0004000000040000, 0x0004000000040000,
+ 0x0004000000040000, 0x0004000000040000);
+ expData = _mm512_sllv_epi16(expData, k_slBits);
+
+ /// Mask to zero unwanted bits
+ const __m512i k_expMask = _mm512_set1_epi16(0xFFF0);
+ return _mm512_and_epi64(expData, k_expMask);
+}
+
+
+/// 8 bit compression
+void
+BlockFloatCompander::BlockFloatCompress_8b_AVX512(const ExpandedData& dataIn, CompressedData* dataOut)
+{
+ /// Compute exponent and store for later use
+ int8_t storedExp[BlockFloatCompander::k_numRB] = {};
+ computeExponent(dataIn, storedExp);
+
+ /// Shift 1RB by corresponding exponent and write exponent and data to output
+#pragma unroll(BlockFloatCompander::k_numRB)
+ for (int n = 0; n < BlockFloatCompander::k_numRB; ++n)
+ {
+ const __m512i* rawDataIn = reinterpret_cast<const __m512i*>(dataIn.dataExpanded + n * BlockFloatCompander::k_numREReal);
+ auto compData = _mm512_srai_epi16(*rawDataIn, storedExp[n]);
+ auto thisRBExpAddr = n * (BlockFloatCompander::k_numREReal + 1);
+ /// Store exponent first
+ dataOut->dataCompressed[thisRBExpAddr] = storedExp[n];
+ /// Store compressed RB
+ constexpr uint32_t k_rbMask = 0x00FFFFFF; // Write mask for 1RB (24 values)
+ _mm256_mask_storeu_epi8(dataOut->dataCompressed + thisRBExpAddr + 1, k_rbMask, _mm512_cvtepi16_epi8(compData));
+ }
+}
+
+
+/// 9 bit compression
+void
+BlockFloatCompander::BlockFloatCompress_9b_AVX512(const ExpandedData& dataIn, CompressedData* dataOut)
+{
+ /// Compute exponent and store for later use
+ int8_t storedExp[BlockFloatCompander::k_numRB] = {};
+ computeExponent(dataIn, storedExp);
+
+ /// Shift 1RB by corresponding exponent and write exponent and data to output
+ /// Output data is packed exponent first followed by corresponding compressed RB
+#pragma unroll(BlockFloatCompander::k_numRB)
+ for (int n = 0; n < BlockFloatCompander::k_numRB; ++n)
+ {
+ /// Apply exponent shift
+ const __m512i* rawDataIn = reinterpret_cast<const __m512i*>(dataIn.dataExpanded + n * BlockFloatCompander::k_numREReal);
+ auto compData = _mm512_srai_epi16(*rawDataIn, storedExp[n]);
+
+ /// Pack compressed data network byte order
+ auto compDataBytePacked = networkBytePack9b(compData);
+
+ /// Store exponent first
+ constexpr int k_totNumBytesPerRB = 28;
+ auto thisRBExpAddr = n * k_totNumBytesPerRB;
+ dataOut->dataCompressed[thisRBExpAddr] = storedExp[n];
+
+ /// Now have 1 RB worth of bytes separated into 3 chunks (1 per lane)
+ /// Use three offset stores to join
+ constexpr uint16_t k_RbWriteMask = 0x01FF;
+ constexpr int k_numDataBytesPerLane = 9;
+ _mm_mask_storeu_epi8(dataOut->dataCompressed + thisRBExpAddr + 1, k_RbWriteMask, _mm512_extracti64x2_epi64(compDataBytePacked, 0));
+ _mm_mask_storeu_epi8(dataOut->dataCompressed + thisRBExpAddr + 1 + k_numDataBytesPerLane, k_RbWriteMask, _mm512_extracti64x2_epi64(compDataBytePacked, 1));
+ _mm_mask_storeu_epi8(dataOut->dataCompressed + thisRBExpAddr + 1 + (2 * k_numDataBytesPerLane), k_RbWriteMask, _mm512_extracti64x2_epi64(compDataBytePacked, 2));
+ }
+}
+
+
+/// 10 bit compression
+void
+BlockFloatCompander::BlockFloatCompress_10b_AVX512(const ExpandedData& dataIn, CompressedData* dataOut)
+{
+ /// Compute exponent and store for later use
+ int8_t storedExp[BlockFloatCompander::k_numRB] = {};
+ computeExponent(dataIn, storedExp);
+
+ /// Shift 1RB by corresponding exponent and write exponent and data to output
+ /// Output data is packed exponent first followed by corresponding compressed RB
+#pragma unroll(BlockFloatCompander::k_numRB)
+ for (int n = 0; n < BlockFloatCompander::k_numRB; ++n)
+ {
+ /// Apply exponent shift
+ const __m512i* rawDataIn = reinterpret_cast<const __m512i*>(dataIn.dataExpanded + n * BlockFloatCompander::k_numREReal);
+ auto compData = _mm512_srai_epi16(*rawDataIn, storedExp[n]);
+
+ /// Pack compressed data network byte order
+ auto compDataBytePacked = networkBytePack10b(compData);
+
+ /// Store exponent first
+ constexpr int k_totNumBytesPerRB = 31;
+ auto thisRBExpAddr = n * k_totNumBytesPerRB;
+ dataOut->dataCompressed[thisRBExpAddr] = storedExp[n];
+
+ /// Now have 1 RB worth of bytes separated into 3 chunks (1 per lane)
+ /// Use three offset stores to join
+ constexpr uint16_t k_RbWriteMask = 0x03FF;
+ constexpr int k_numDataBytesPerLane = 10;
+ _mm_mask_storeu_epi8(dataOut->dataCompressed + thisRBExpAddr + 1, k_RbWriteMask, _mm512_extracti64x2_epi64(compDataBytePacked, 0));
+ _mm_mask_storeu_epi8(dataOut->dataCompressed + thisRBExpAddr + 1 + k_numDataBytesPerLane, k_RbWriteMask, _mm512_extracti64x2_epi64(compDataBytePacked, 1));
+ _mm_mask_storeu_epi8(dataOut->dataCompressed + thisRBExpAddr + 1 + (2 * k_numDataBytesPerLane), k_RbWriteMask, _mm512_extracti64x2_epi64(compDataBytePacked, 2));
+ }
+}
+
+
+/// 12 bit compression
+void
+BlockFloatCompander::BlockFloatCompress_12b_AVX512(const ExpandedData& dataIn, CompressedData* dataOut)
+{
+ /// Compute exponent and store for later use
+ int8_t storedExp[BlockFloatCompander::k_numRB] = {};
+ computeExponent(dataIn, storedExp);
+
+ /// Shift 1RB by corresponding exponent and write exponent and data to output
+ /// Output data is packed exponent first followed by corresponding compressed RB
+#pragma unroll(BlockFloatCompander::k_numRB)
+ for (int n = 0; n < BlockFloatCompander::k_numRB; ++n)
+ {
+ /// Apply exponent shift
+ const __m512i* rawDataIn = reinterpret_cast<const __m512i*>(dataIn.dataExpanded + n * BlockFloatCompander::k_numREReal);
+ auto compData = _mm512_srai_epi16(*rawDataIn, storedExp[n]);
+
+ /// Pack compressed data network byte order
+ auto compDataBytePacked = networkBytePack12b(compData);
+
+ /// Store exponent first
+ constexpr int k_totNumBytesPerRB = 37;
+ auto thisRBExpAddr = n * k_totNumBytesPerRB;
+ dataOut->dataCompressed[thisRBExpAddr] = storedExp[n];
+
+ /// Now have 1 RB worth of bytes separated into 3 chunks (1 per lane)
+ /// Use three offset stores to join
+ constexpr uint16_t k_RbWriteMask = 0x0FFF;
+ constexpr int k_numDataBytesPerLane = 12;
+ _mm_mask_storeu_epi8(dataOut->dataCompressed + thisRBExpAddr + 1, k_RbWriteMask, _mm512_extracti64x2_epi64(compDataBytePacked, 0));
+ _mm_mask_storeu_epi8(dataOut->dataCompressed + thisRBExpAddr + 1 + k_numDataBytesPerLane, k_RbWriteMask, _mm512_extracti64x2_epi64(compDataBytePacked, 1));
+ _mm_mask_storeu_epi8(dataOut->dataCompressed + thisRBExpAddr + 1 + (2 * k_numDataBytesPerLane), k_RbWriteMask, _mm512_extracti64x2_epi64(compDataBytePacked, 2));
+ }
+}
+
+
+/// 8 bit expansion
+void
+BlockFloatCompander::BlockFloatExpand_8b_AVX512(const CompressedData& dataIn, ExpandedData* dataOut)
+{
+#pragma unroll(BlockFloatCompander::k_numRB)
+ for (int n = 0; n < BlockFloatCompander::k_numRB; ++n)
+ {
+ /// Expand 1RB of data
+ auto expAddr = n * (BlockFloatCompander::k_numREReal + 1);
+ const __m256i* rawDataIn = reinterpret_cast<const __m256i*>(dataIn.dataCompressed + expAddr + 1);
+ const auto compData16 = _mm512_cvtepi8_epi16(*rawDataIn);
+ const auto expData = _mm512_slli_epi16(compData16, *(dataIn.dataCompressed + expAddr));
+ /// Write expanded data to output
+ constexpr uint8_t k_rbMask64 = 0b00111111; // 64b write mask for 1RB (24 int16 values)
+ _mm512_mask_storeu_epi64(dataOut->dataExpanded + n * BlockFloatCompander::k_numREReal, k_rbMask64, expData);
+ }
+}
+
+
+/// 9 bit expansion
+void
+BlockFloatCompander::BlockFloatExpand_9b_AVX512(const CompressedData& dataIn, ExpandedData* dataOut)
+{
+#pragma unroll(BlockFloatCompander::k_numRB)
+ for (int n = 0; n < BlockFloatCompander::k_numRB; ++n)
+ {
+ constexpr int k_totNumBytesPerRB = 28;
+ auto expAddr = n * k_totNumBytesPerRB;
+
+ /// Unpack network order packed data
+ auto expData = networkByteUnpack9b(dataIn.dataCompressed + expAddr + 1);
+
+ /// Apply exponent scaling (by appropriate arithmetic shift right)
+ constexpr int k_maxExpShift = 7;
+ expData = _mm512_srai_epi16(expData, k_maxExpShift - *(dataIn.dataCompressed + expAddr));
+
+ /// Write expanded data to output
+ static constexpr uint32_t k_WriteMask = 0x00FFFFFF;
+ _mm512_mask_storeu_epi16(dataOut->dataExpanded + n * BlockFloatCompander::k_numREReal, k_WriteMask, expData);
+ }
+}
+
+
+/// 10 bit expansion
+void
+BlockFloatCompander::BlockFloatExpand_10b_AVX512(const CompressedData& dataIn, ExpandedData* dataOut)
+{
+#pragma unroll(BlockFloatCompander::k_numRB)
+ for (int n = 0; n < BlockFloatCompander::k_numRB; ++n)
+ {
+ constexpr int k_totNumBytesPerRB = 31;
+ auto expAddr = n * k_totNumBytesPerRB;
+
+ /// Unpack network order packed data
+ auto expData = networkByteUnpack10b(dataIn.dataCompressed + expAddr + 1);
+
+ /// Apply exponent scaling (by appropriate arithmetic shift right)
+ constexpr int k_maxExpShift = 6;
+ expData = _mm512_srai_epi16(expData, k_maxExpShift - *(dataIn.dataCompressed + expAddr));
+
+ /// Write expanded data to output
+ static constexpr uint32_t k_WriteMask = 0x00FFFFFF;
+ _mm512_mask_storeu_epi16(dataOut->dataExpanded + n * BlockFloatCompander::k_numREReal, k_WriteMask, expData);
+ }
+}
+
+
+/// 12 bit expansion
+void
+BlockFloatCompander::BlockFloatExpand_12b_AVX512(const CompressedData& dataIn, ExpandedData* dataOut)
+{
+#pragma unroll(BlockFloatCompander::k_numRB)
+ for (int n = 0; n < BlockFloatCompander::k_numRB; ++n)
+ {
+ constexpr int k_totNumBytesPerRB = 37;
+ auto expAddr = n * k_totNumBytesPerRB;
+
+ /// Unpack network order packed data
+ auto expData = networkByteUnpack12b(dataIn.dataCompressed + expAddr + 1);
+
+ /// Apply exponent scaling (by appropriate arithmetic shift right)
+ constexpr int k_maxExpShift = 4;
+ expData = _mm512_srai_epi16(expData, k_maxExpShift - *(dataIn.dataCompressed + expAddr));
+
+ /// Write expanded data to output
+ static constexpr uint32_t k_WriteMask = 0x00FFFFFF;
+ _mm512_mask_storeu_epi16(dataOut->dataExpanded + n * BlockFloatCompander::k_numREReal, k_WriteMask, expData);
+ }
+}
+
+
+/// Reference compression
+void
+BlockFloatCompander::BlockFloatCompress_Basic(const ExpandedData& dataIn, CompressedData* dataOut)
+{
+ int dataOutIdx = 0;
+ int16_t iqMask = (int16_t)((1 << dataIn.iqWidth) - 1);
+ int byteShiftUnits = dataIn.iqWidth - 8;
+
+ for (int rb = 0; rb < BlockFloatCompander::k_numRB; ++rb)
+ {
+ /// Find max abs value for this RB
+ int16_t maxAbs = 0;
+ for (int re = 0; re < BlockFloatCompander::k_numREReal; ++re)
+ {
+ auto dataIdx = rb * BlockFloatCompander::k_numREReal + re;
+ auto dataAbs = saturateAbs(dataIn.dataExpanded[dataIdx]);
+ maxAbs = std::max(maxAbs, dataAbs);
+ }
+
+ // Find exponent and insert into byte stream
+ auto thisExp = (uint8_t)(std::max(0,(16 - dataIn.iqWidth + 1 - __lzcnt16(maxAbs))));
+ dataOut->dataCompressed[dataOutIdx++] = thisExp;
+
+ /// ARS data by exponent and pack bytes in Network order
+ /// This uses a sliding buffer where one or more bytes are
+ /// extracted after the insertion of each compressed sample
+ static constexpr int k_byteMask = 0xFF;
+ int byteShiftVal = -8;
+ int byteBuffer = { 0 };
+ for (int re = 0; re < BlockFloatCompander::k_numREReal; ++re)
+ {
+ auto dataIdxIn = rb * BlockFloatCompander::k_numREReal + re;
+ auto thisRE = dataIn.dataExpanded[dataIdxIn] >> thisExp;
+ byteBuffer = (byteBuffer << dataIn.iqWidth) + (int)(thisRE & iqMask);
+
+ byteShiftVal += (8 + byteShiftUnits);
+ while (byteShiftVal >= 0)
+ {
+ auto thisByte = (uint8_t)((byteBuffer >> byteShiftVal) & k_byteMask);
+ dataOut->dataCompressed[dataOutIdx++] = thisByte;
+ byteShiftVal -= 8;
+ }
+ }
+ }
+ dataOut->iqWidth = dataIn.iqWidth;
+}
+
+/// Reference expansion
+void
+BlockFloatCompander::BlockFloatExpand_Basic(const CompressedData& dataIn, ExpandedData* dataOut)
+{
+ uint32_t iqMask = (uint32_t)(UINT_MAX - ((1 << (32 - dataIn.iqWidth)) - 1));
+ uint32_t byteBuffer = { 0 };
+ int numBytesPerRB = (3 * dataIn.iqWidth) + 1;
+ int bitPointer = 0;
+ int dataIdxOut = 0;
+
+ for (int rb = 0; rb < BlockFloatCompander::k_numRB; ++rb)
+ {
+ auto expIdx = rb * numBytesPerRB;
+ auto signExtShift = 32 - dataIn.iqWidth - dataIn.dataCompressed[expIdx];
+
+ for (int b = 0; b < numBytesPerRB - 1; ++b)
+ {
+ auto dataIdxIn = (expIdx + 1) + b;
+ auto thisByte = (uint16_t)dataIn.dataCompressed[dataIdxIn];
+ byteBuffer = (uint32_t)((byteBuffer << 8) + thisByte);
+ bitPointer += 8;
+ while (bitPointer >= dataIn.iqWidth)
+ {
+ /// byteBuffer currently has enough data in it to extract a sample
+ /// Shift left first to set sign bit at MSB, then shift right to
+ /// sign extend down to iqWidth. Finally recast to int16.
+ int32_t thisSample32 = (int32_t)((byteBuffer << (32 - bitPointer)) & iqMask);
+ int16_t thisSample = (int16_t)(thisSample32 >> signExtShift);
+ bitPointer -= dataIn.iqWidth;
+ dataOut->dataExpanded[dataIdxOut++] = thisSample;
+ }
+ }
+ }
+}
+
+/// Reference compression
+void
+BlockFloatCompanderBFW::BlockFloatCompress_Basic(const BlockFloatCompanderBFW::ExpandedData& dataIn, BlockFloatCompanderBFW::CompressedData* dataOut)
+{
+ int dataOutIdx = 0;
+ int16_t iqMask = (int16_t)((1 << dataIn.iqWidth) - 1);
+ int byteShiftUnits = dataIn.iqWidth - 8;
+
+ for (int rb = 0; rb < BlockFloatCompanderBFW::k_numRB; ++rb)
+ {
+ /// Find max abs value for this RB
+ int16_t maxAbs = 0;
+ for (int re = 0; re < BlockFloatCompanderBFW::k_numREReal; ++re)
+ {
+ auto dataIdx = rb * BlockFloatCompanderBFW::k_numREReal + re;
+ auto dataAbs = saturateAbs(dataIn.dataExpanded[dataIdx]);
+ maxAbs = std::max(maxAbs, dataAbs);
+ }
+
+ // Find exponent and insert into byte stream
+ auto thisExp = (uint8_t)(std::max(0,(16 - dataIn.iqWidth + 1 - __lzcnt16(maxAbs))));
+ dataOut->dataCompressed[dataOutIdx++] = thisExp;
+
+ /// ARS data by exponent and pack bytes in Network order
+ /// This uses a sliding buffer where one or more bytes are
+ /// extracted after the insertion of each compressed sample
+ static constexpr int k_byteMask = 0xFF;
+ int byteShiftVal = -8;
+ int byteBuffer = { 0 };
+ for (int re = 0; re < BlockFloatCompanderBFW::k_numREReal; ++re)
+ {
+ auto dataIdxIn = rb * BlockFloatCompanderBFW::k_numREReal + re;
+ auto thisRE = dataIn.dataExpanded[dataIdxIn] >> thisExp;
+ byteBuffer = (byteBuffer << dataIn.iqWidth) + (int)(thisRE & iqMask);
+
+ byteShiftVal += (8 + byteShiftUnits);
+ while (byteShiftVal >= 0)
+ {
+ auto thisByte = (uint8_t)((byteBuffer >> byteShiftVal) & k_byteMask);
+ dataOut->dataCompressed[dataOutIdx++] = thisByte;
+ byteShiftVal -= 8;
+ }
+ }
+ }
+ dataOut->iqWidth = dataIn.iqWidth;
+}
+
+/// Reference expansion
+void
+BlockFloatCompanderBFW::BlockFloatExpand_Basic(const BlockFloatCompanderBFW::CompressedData& dataIn, BlockFloatCompanderBFW::ExpandedData* dataOut)
+{
+ uint32_t iqMask = (uint32_t)(UINT_MAX - ((1 << (32 - dataIn.iqWidth)) - 1));
+ uint32_t byteBuffer = { 0 };
+ int numBytesPerRB = (3 * dataIn.iqWidth) + 1;
+ int bitPointer = 0;
+ int dataIdxOut = 0;
+
+ for (int rb = 0; rb < BlockFloatCompanderBFW::k_numRB; ++rb)
+ {
+ auto expIdx = rb * numBytesPerRB;
+ auto signExtShift = 32 - dataIn.iqWidth - dataIn.dataCompressed[expIdx];
+
+ for (int b = 0; b < numBytesPerRB - 1; ++b)
+ {
+ auto dataIdxIn = (expIdx + 1) + b;
+ auto thisByte = (uint16_t)dataIn.dataCompressed[dataIdxIn];
+ byteBuffer = (uint32_t)((byteBuffer << 8) + thisByte);
+ bitPointer += 8;
+ while (bitPointer >= dataIn.iqWidth)
+ {
+ /// byteBuffer currently has enough data in it to extract a sample
+ /// Shift left first to set sign bit at MSB, then shift right to
+ /// sign extend down to iqWidth. Finally recast to int16.
+ int32_t thisSample32 = (int32_t)((byteBuffer << (32 - bitPointer)) & iqMask);
+ int16_t thisSample = (int16_t)(thisSample32 >> signExtShift);
+ bitPointer -= dataIn.iqWidth;
+ dataOut->dataExpanded[dataIdxOut++] = thisSample;
+ }
+ }
+ }
+}
+
+#define RB_NUM_ROUNDUP(rb) \
+ (BlockFloatCompander::k_numRB * ((rb + BlockFloatCompander::k_numRB - 1) / BlockFloatCompander::k_numRB))
+
+
+/** callback function type for Symbol packet */
+typedef void (*xran_bfp_compress_fn)(const BlockFloatCompander::ExpandedData& dataIn,
+ BlockFloatCompander::CompressedData* dataOut);
+
+int32_t
+xranlib_compress_avx512(const struct xranlib_compress_request *request,
+ struct xranlib_compress_response *response)
+{
+ BlockFloatCompander::ExpandedData expandedDataInput;
+ BlockFloatCompander::CompressedData compressedDataOut;
+ xran_bfp_compress_fn com_fn = NULL;
+ int16_t numRBs = request->numRBs;
+ int16_t len = 0;
+
+ switch (request->iqWidth){
+ case 8:
+ expandedDataInput.iqWidth = 8;
+ com_fn = BlockFloatCompander::BlockFloatCompress_8b_AVX512;
+ break;
+ case 9:
+ expandedDataInput.iqWidth = 9;
+ com_fn = BlockFloatCompander::BlockFloatCompress_9b_AVX512;
+ break;
+ case 10:
+ expandedDataInput.iqWidth = 10;
+ com_fn = BlockFloatCompander::BlockFloatCompress_10b_AVX512;
+ break;
+ case 12:
+ expandedDataInput.iqWidth = 12;
+ com_fn = BlockFloatCompander::BlockFloatCompress_12b_AVX512;
+ break;
+ default:
+ expandedDataInput.iqWidth = request->iqWidth;
+ com_fn = BlockFloatCompander::BlockFloatCompress_Basic;
+ break;
+ }
+
+ for (int16_t block_idx = 0;
+ block_idx < RB_NUM_ROUNDUP(numRBs)/BlockFloatCompander::k_numRB /*+ 1*/; /* 16 RBs at time */
+ block_idx++) {
+
+ expandedDataInput.dataExpanded =
+ &request->data_in[block_idx*BlockFloatCompander::k_numSampsExpanded];
+ compressedDataOut.dataCompressed =
+ (uint8_t*)&response->data_out[len];
+
+ com_fn(expandedDataInput, &compressedDataOut);
+ len += ((3 * expandedDataInput.iqWidth) + 1) * std::min((int16_t)BlockFloatCompander::k_numRB,(int16_t)numRBs);
+ }
+
+ response->len = ((3 * expandedDataInput.iqWidth) + 1) * numRBs;
+
+ return 0;
+}
+
+/** callback function type for Symbol packet */
+typedef void (*xran_bfp_compress_bfw_fn)(const BlockFloatCompanderBFW::ExpandedData& dataIn, BlockFloatCompanderBFW::CompressedData* dataOut);
+
+int32_t
+xranlib_compress_avx512_bfw(const struct xranlib_compress_request *request,
+ struct xranlib_compress_response *response)
+{
+ BlockFloatCompanderBFW::ExpandedData expandedDataInput;
+ BlockFloatCompanderBFW::CompressedData compressedDataKern;
+ xran_bfp_compress_bfw_fn com_fn = NULL;
+
+#if 0
+ for (int m = 0; m < BlockFloatCompander::k_numRB; ++m){
+ for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n){
+ expandedDataInput.dataExpanded[m*BlockFloatCompander::k_numREReal+n] =
+ request->data_in[m*BlockFloatCompander::k_numREReal+n];
+ }
+ }
+#endif
+
+ expandedDataInput.dataExpanded = request->data_in;
+ compressedDataKern.dataCompressed = (uint8_t*)response->data_out;
+
+ com_fn = BlockFloatCompanderBFW::BlockFloatCompress_Basic;
+ switch (request->iqWidth){
+ case 8:
+ expandedDataInput.iqWidth = 8;
+ break;
+ case 9:
+ expandedDataInput.iqWidth = 9;
+ //com_fn = BlockFloatCompanderBFW::BlockFloatExpand_9b_AVX512
+ break;
+ case 10:
+ expandedDataInput.iqWidth = 10;
+ break;
+ case 12:
+ expandedDataInput.iqWidth = 12;
+ break;
+ default:
+ printf("bfwIqWidth is not supported %d\n", request->iqWidth);
+ return -1;
+ break;
+ }
+
+ com_fn(expandedDataInput, &compressedDataKern);
+ response->len = ((BlockFloatCompanderBFW::k_numRE/16*4*expandedDataInput.iqWidth)+1)*BlockFloatCompanderBFW::k_numRB;
+
+ return 0;
+}
+
+/** callback function type for Symbol packet */
+typedef void (*xran_bfp_decompress_fn)(const BlockFloatCompander::CompressedData& dataIn, BlockFloatCompander::ExpandedData* dataOut);
+
+
+int32_t
+xranlib_decompress_avx512(const struct xranlib_decompress_request *request,
+ struct xranlib_decompress_response *response)
+{
+
+ BlockFloatCompander::CompressedData compressedDataInput;
+ BlockFloatCompander::ExpandedData expandedDataOut;
+
+ xran_bfp_decompress_fn decom_fn = NULL;
+ int16_t numRBs = request->numRBs;
+ int16_t len = 0;
+
+ switch (request->iqWidth){
+ case 8:
+ compressedDataInput.iqWidth = 8;
+ decom_fn = BlockFloatCompander::BlockFloatExpand_8b_AVX512;
+ break;
+ case 9:
+ compressedDataInput.iqWidth = 9;
+ decom_fn = BlockFloatCompander::BlockFloatExpand_9b_AVX512;
+ break;
+ case 10:
+ compressedDataInput.iqWidth = 10;
+ decom_fn = BlockFloatCompander::BlockFloatExpand_10b_AVX512;
+ break;
+ case 12:
+ compressedDataInput.iqWidth = 12;
+ decom_fn = BlockFloatCompander::BlockFloatExpand_12b_AVX512;
+ break;
+ default:
+ compressedDataInput.iqWidth = request->iqWidth;
+ decom_fn = BlockFloatCompander::BlockFloatExpand_Basic;
+ break;
+ }
+
+ for (int16_t block_idx = 0;
+ block_idx < RB_NUM_ROUNDUP(numRBs)/BlockFloatCompander::k_numRB;
+ block_idx++) {
+
+ compressedDataInput.dataCompressed = (uint8_t*)&request->data_in[block_idx*(((3 * compressedDataInput.iqWidth ) + 1) * BlockFloatCompander::k_numRB)];
+ expandedDataOut.dataExpanded = &response->data_out[len];
+
+ decom_fn(compressedDataInput, &expandedDataOut);
+ len += std::min((int16_t)BlockFloatCompander::k_numSampsExpanded, (int16_t)(numRBs*BlockFloatCompander::k_numREReal));
+ }
+
+ response->len = numRBs * BlockFloatCompander::k_numREReal* sizeof(int16_t);
+
+ return 0;
+}
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/**\r
- * @brief This file provides the API functions to build Control Plane Messages\r
- * for XRAN Front Haul layer as defined in XRAN-FH.CUS.0-v02.01.\r
- *\r
- * @file xran_cp_api.c\r
- * @ingroup group_lte_source_xran\r
- * @author Intel Corporation\r
- *\r
- **/\r
-\r
-#include <rte_branch_prediction.h>\r
-\r
-#include "xran_common.h"\r
-#include "xran_transport.h"\r
-#include "xran_cp_api.h"\r
-#include "xran_printf.h"\r
-#include "xran_compression.h"\r
-\r
-\r
-/**\r
- * This structure to store the section information of C-Plane\r
- * in order to generate and parse corresponding U-Plane */\r
-struct xran_sectioninfo_db {\r
- uint32_t cur_index; /**< Current index to store for this eAXC */\r
- struct xran_section_info list[XRAN_MAX_NUM_SECTIONS]; /**< The array of section information */\r
- };\r
-\r
-static struct xran_sectioninfo_db sectiondb[XRAN_MAX_SECTIONDB_CTX][XRAN_DIR_MAX][XRAN_COMPONENT_CARRIERS_MAX][XRAN_MAX_ANTENNA_NR*2 + XRAN_MAX_ANT_ARRAY_ELM_NR];\r
-\r
-static const uint8_t zeropad[XRAN_SECTIONEXT_ALIGN] = { 0, 0, 0, 0 };\r
-static const uint8_t bitmask[] = { 0x00, 0x03, 0x07, 0x0f, 0x1f, 0x3f, 0x7f, 0xff };\r
-\r
-\r
-/**\r
- * @brief Initialize section database.\r
- * Allocate required memory space to store section information.\r
- * Each eAxC allocates dedicated storage and the entry size is the maximum number of sections.\r
- * Total entry size : number of CC * number of antenna * max number of sections * 2(direction)\r
- *\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @param pHandle\r
- * handle for xRAN interface, currently not being used\r
- * @return\r
- * XRAN_STATUS_SUCCESS on success\r
- * XRAN_STATUS_RESOURCE, if memory is not enough to allocate database area\r
- */\r
-int xran_cp_init_sectiondb(void *pHandle)\r
-{\r
- int ctx, dir, cc, ant;\r
-\r
- for(ctx=0; ctx < XRAN_MAX_SECTIONDB_CTX; ctx++)\r
- for(dir=0; dir < XRAN_DIR_MAX; dir++)\r
- for(cc=0; cc < XRAN_COMPONENT_CARRIERS_MAX; cc++)\r
- for(ant=0; ant < XRAN_MAX_ANTENNA_NR*2 + XRAN_MAX_ANT_ARRAY_ELM_NR; ant++)\r
- sectiondb[ctx][dir][cc][ant].cur_index = 0;\r
-\r
- return (XRAN_STATUS_SUCCESS);\r
-}\r
-\r
-/**\r
- * @brief Release and free section database\r
- *\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @param pHandle\r
- * handle for xRAN interface, currently not being used\r
- * @return\r
- * XRAN_STATUS_SUCCESS on success\r
- */\r
-int xran_cp_free_sectiondb(void *pHandle)\r
-{\r
- return (XRAN_STATUS_SUCCESS);\r
-}\r
-\r
-static inline struct xran_sectioninfo_db *xran_get_section_db(void *pHandle,\r
- uint8_t dir, uint8_t cc_id, uint8_t ruport_id, uint8_t ctx_id)\r
-{\r
- struct xran_sectioninfo_db *ptr;\r
-\r
-\r
- if(unlikely(ctx_id >= XRAN_MAX_SECTIONDB_CTX)) {\r
- print_err("Invalid Context id - %d", ctx_id);\r
- return (NULL);\r
- }\r
-\r
- if(unlikely(dir >= XRAN_DIR_MAX)) {\r
- print_err("Invalid direction - %d", dir);\r
- return (NULL);\r
- }\r
-\r
- if(unlikely(cc_id >= XRAN_COMPONENT_CARRIERS_MAX)) {\r
- print_err("Invalid CC id - %d", cc_id);\r
- return (NULL);\r
- }\r
-\r
- if(unlikely(ruport_id >= XRAN_MAX_ANTENNA_NR*2 + XRAN_MAX_ANT_ARRAY_ELM_NR)) {\r
- print_err("Invalid eAxC id - %d", ruport_id);\r
- return (NULL);\r
- }\r
-\r
- ptr = §iondb[ctx_id][dir][cc_id][ruport_id];\r
-\r
- return(ptr);\r
-}\r
-\r
-static inline struct xran_section_info *xran_get_section_info(struct xran_sectioninfo_db *ptr, uint16_t index)\r
-{\r
- if(unlikely(ptr == NULL))\r
- return (NULL);\r
-\r
- if(unlikely(index > XRAN_MAX_NUM_SECTIONS)) {\r
- print_err("Index is out of range - %d", index);\r
- return (NULL);\r
- }\r
-\r
- return(&(ptr->list[index]));\r
-}\r
-\r
-/**\r
- * @brief Add a section information of C-Plane to dabase.\r
- *\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @param pHandle\r
- * handle for xRAN interface, currently not being used\r
- * @param dir\r
- * Direction of C-Plane message for the section to store\r
- * @param cc_id\r
- * CC ID of C-Plane message for the section to store\r
- * @param ruport_id\r
- * RU port ID of C-Plane message for the section to store\r
- * @param ctx_id\r
- * Context index for the section database\r
- * @param info\r
- * The information of this section to store\r
- * @return\r
- * XRAN_STATUS_SUCCESS on success\r
- * XRAN_STATUS_INVALID_PARAM, if direction, CC ID or RU port ID is incorrect\r
- * XRAN_STATUS_RESOURCE, if no more space to add on database\r
- */\r
-int xran_cp_add_section_info(void *pHandle,\r
- uint8_t dir, uint8_t cc_id, uint8_t ruport_id, uint8_t ctx_id,\r
- struct xran_section_info *info)\r
-{\r
- struct xran_sectioninfo_db *ptr;\r
- struct xran_section_info *list;\r
-\r
-\r
- ptr = xran_get_section_db(pHandle, dir, cc_id, ruport_id, ctx_id);\r
- if(unlikely(ptr == NULL)) {\r
- return (XRAN_STATUS_INVALID_PARAM);\r
- }\r
-\r
- if(unlikely(ptr->cur_index >= XRAN_MAX_NUM_SECTIONS)) {\r
- print_err("No more space to add section information!");\r
- return (XRAN_STATUS_RESOURCE);\r
- }\r
-\r
- list = xran_get_section_info(ptr, ptr->cur_index);\r
-\r
- rte_memcpy(list, info, sizeof(struct xran_section_info));\r
-\r
- ptr->cur_index++;\r
-\r
- return (XRAN_STATUS_SUCCESS);\r
-}\r
-\r
-int xran_cp_add_multisection_info(void *pHandle,\r
- uint8_t cc_id, uint8_t ruport_id, uint8_t ctx_id,\r
- struct xran_cp_gen_params *gen_info)\r
-{\r
- int i;\r
- uint8_t dir, num_sections;\r
- struct xran_sectioninfo_db *ptr;\r
- struct xran_section_info *list;\r
-\r
-\r
- dir = gen_info->dir;\r
- num_sections = gen_info->numSections;\r
-\r
- ptr = xran_get_section_db(pHandle, dir, cc_id, ruport_id, ctx_id);\r
- if(unlikely(ptr == NULL)) {\r
- return (XRAN_STATUS_INVALID_PARAM);\r
- }\r
-\r
- if(unlikely(ptr->cur_index+num_sections >= XRAN_MAX_NUM_SECTIONS)) {\r
- print_err("No more space to add section information!");\r
- return (XRAN_STATUS_RESOURCE);\r
- }\r
-\r
- list = xran_get_section_info(ptr, ptr->cur_index);\r
-\r
- for(i=0; i<num_sections; i++) {\r
- rte_memcpy(&list[i], &gen_info->sections[i].info, sizeof(struct xran_section_info));\r
- ptr->cur_index++;\r
- }\r
-\r
- return (XRAN_STATUS_SUCCESS);\r
-}\r
-\r
-/**\r
- * @brief Find a section information of C-Plane from dabase\r
- * by given information\r
- *\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @param pHandle\r
- * handle for xRAN interface, currently not being used\r
- * @param dir\r
- * The direction of the section to find\r
- * @param cc_id\r
- * The CC ID of the section to find\r
- * @param ruport_id\r
- * RU port ID of the section to find\r
- * @param ctx_id\r
- * Context index for the section database\r
- * @param section_id\r
- * The ID of section to find\r
- * @return\r
- * The pointer of section information if matched section is found\r
- * NULL if failed to find matched section\r
- */\r
-struct xran_section_info *xran_cp_find_section_info(void *pHandle,\r
- uint8_t dir, uint8_t cc_id, uint8_t ruport_id,\r
- uint8_t ctx_id, uint16_t section_id)\r
-{\r
- int index, num_index;\r
- struct xran_sectioninfo_db *ptr;\r
-\r
-\r
- ptr = xran_get_section_db(pHandle, dir, cc_id, ruport_id, ctx_id);\r
- if(unlikely(ptr == NULL))\r
- return (NULL);\r
-\r
- if(ptr->cur_index > XRAN_MAX_NUM_SECTIONS)\r
- num_index = XRAN_MAX_NUM_SECTIONS;\r
- else\r
- num_index = ptr->cur_index;\r
-\r
- for(index=0; index < num_index; index++) {\r
- if(ptr->list[index].id == section_id) {\r
- return (xran_get_section_info(ptr, index));\r
- }\r
- }\r
-\r
- print_dbg("No section ID in the list - %d", section_id);\r
- return (NULL);\r
-}\r
-\r
-/**\r
- * @brief Iterate each section information of C-Plane\r
- * from the database of eAxC by given information\r
- *\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @param pHandle\r
- * handle for xRAN interface, currently not being used\r
- * @param dir\r
- * The direction of the section to find\r
- * @param cc_id\r
- * The CC ID of the section to find\r
- * @param ruport_id\r
- * RU port ID of the section to find\r
- * @param ctx_id\r
- * Context index for the section database\r
- * @param next\r
- * The pointer to store the position of next entry\r
- * @return\r
- * The pointer of section information in the list\r
- * NULL if reached at the end of the list\r
- */\r
-struct xran_section_info *xran_cp_iterate_section_info(void *pHandle,\r
- uint8_t dir, uint8_t cc_id, uint8_t ruport_id,\r
- uint8_t ctx_id, uint32_t *next)\r
-{\r
- int index;\r
- struct xran_sectioninfo_db *ptr;\r
-\r
-\r
- ptr = xran_get_section_db(pHandle, dir, cc_id, ruport_id, ctx_id);\r
- if(unlikely(ptr == NULL))\r
- return (NULL);\r
-\r
- index = *next;\r
- if(*next < ptr->cur_index) {\r
- (*next)++;\r
- return (xran_get_section_info(ptr, index));\r
- }\r
- else {\r
- print_dbg("No more sections in the list");\r
- return (NULL);\r
- }\r
-}\r
-\r
-/**\r
- * @brief Get the size of stored entries\r
- * for the database of eAxC by given information\r
- *\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @param pHandle\r
- * handle for xRAN interface, currently not being used\r
- * @param dir\r
- * The direction of the section to find\r
- * @param cc_id\r
- * The CC ID of the section to find\r
- * @param ruport_id\r
- * RU port ID of the section to find\r
- * @param ctx_id\r
- * Context index for the section database\r
- * @return\r
- * The size of stored entries\r
- * -1 if failed to find matched database\r
- */\r
-int32_t xran_cp_getsize_section_info(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ruport_id, uint8_t ctx_id)\r
-{\r
- int index;\r
- struct xran_sectioninfo_db *ptr;\r
-\r
-\r
- ptr = xran_get_section_db(pHandle, dir, cc_id, ruport_id, ctx_id);\r
- if(unlikely(ptr == NULL))\r
- return (-1);\r
-\r
- return (ptr->cur_index);\r
-}\r
-\r
-/**\r
- * @brief Reset a database of eAxC by given information\r
- *\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @param pHandle\r
- * handle for xRAN interface, currently not being used\r
- * @param dir\r
- * The direction of the section to find\r
- * @param cc_id\r
- * The CC ID of the section to find\r
- * @param ruport_id\r
- * RU port ID of the section to find\r
- * @param ctx_id\r
- * Context index for the section database\r
- * @return\r
- * XRAN_STATUS_SUCCESS on success\r
- * XRAN_STATUS_INVALID_PARM if failed to find matched database\r
- */\r
-int xran_cp_reset_section_info(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ruport_id, uint8_t ctx_id)\r
-{\r
- struct xran_sectioninfo_db *ptr;\r
-\r
- ptr = xran_get_section_db(pHandle, dir, cc_id, ruport_id, ctx_id);\r
- if(unlikely(ptr == NULL)) {\r
- return (XRAN_STATUS_INVALID_PARAM);\r
- }\r
-\r
- ptr->cur_index = 0;\r
-\r
- return (XRAN_STATUS_SUCCESS);\r
-}\r
-\r
-\r
-int xran_dump_sectiondb(void)\r
-{\r
- // TODO:\r
- return (0);\r
-}\r
-\r
-int32_t xran_cp_populate_section_ext_1(int8_t *p_ext1_dst, /**< destination buffer */\r
- uint16_t ext1_dst_len, /**< dest buffer size */\r
- int16_t *p_bfw_iq_src, /**< source buffer of IQs */\r
- uint16_t rbNum, /* number RBs to ext1 chain */\r
- uint16_t bfwNumPerRb, /* number of bf weights per RB (i.e. antenna elements) */\r
- uint8_t bfwiqWidth, /* bit size of IQs */\r
- uint8_t bfwCompMeth) /* compression method */\r
-{\r
- struct xran_cp_radioapp_section_ext1 *p_ext1;\r
-\r
- uint8_t *p_bfw_content = NULL;\r
- int32_t parm_size = 0;\r
- int32_t bfw_iq_bits = 0;\r
- int32_t total_len = 0;\r
- int32_t comp_len = 0;\r
- uint8_t ext_flag = XRAN_EF_F_ANOTHER_ONE;\r
- int16_t idxRb = 0;\r
- int16_t cur_ext_len = 0;\r
- int8_t *p_ext1_dst_cur = NULL;\r
-\r
- struct xranlib_compress_request bfp_com_req;\r
- struct xranlib_compress_response bfp_com_rsp;\r
-\r
- memset(&bfp_com_req, 0, sizeof(struct xranlib_compress_request));\r
- memset(&bfp_com_rsp, 0, sizeof(struct xranlib_compress_response));\r
-\r
- print_dbg("%s comp %d\n", __FUNCTION__, bfwCompMeth);\r
- print_dbg("bfwNumPerRb %d bfwiqWidth %d\n", bfwNumPerRb, bfwiqWidth);\r
-\r
- if(p_ext1_dst)\r
- p_ext1_dst_cur = p_ext1_dst;\r
- else\r
- return (XRAN_STATUS_INVALID_PARAM);\r
-\r
- /* create extType=1 section for each RB */\r
- for (idxRb = 0; idxRb < rbNum; idxRb++) {\r
- print_dbg("%s RB %d\n", __FUNCTION__, idxRb);\r
-\r
- if(total_len >= ext1_dst_len){\r
- print_err("p_ext1_dst overflow\n");\r
- return -1;\r
- }\r
-\r
- cur_ext_len = 0; /** populate one extType=1 section with BFW for 1 RB */\r
- parm_size = sizeof(struct xran_cp_radioapp_section_ext1);\r
- p_ext1 = (struct xran_cp_radioapp_section_ext1 *)p_ext1_dst_cur;\r
- if(p_ext1 == NULL) {\r
- print_err("p_ext1 is null!\n");\r
- return (XRAN_STATUS_INVALID_PARAM);\r
- }\r
-\r
- cur_ext_len += parm_size;\r
-\r
- if(idxRb+1 == rbNum)\r
- ext_flag = XRAN_EF_F_LAST;\r
-\r
- p_ext1->extType = XRAN_CP_SECTIONEXTCMD_1;\r
- p_ext1->ef = ext_flag;\r
- p_ext1->bfwCompMeth = bfwCompMeth;\r
- p_ext1->bfwIqWidth = XRAN_CONVERT_BFWIQWIDTH(bfwiqWidth);\r
-\r
- switch(bfwCompMeth) {\r
- case XRAN_BFWCOMPMETHOD_BLKFLOAT:\r
- p_bfw_content = (uint8_t *)(p_ext1+1);\r
- if(p_bfw_content == NULL) {\r
- print_err("Fail to allocate the space for section extension 1");\r
- return (XRAN_STATUS_RESOURCE);\r
- }\r
- bfp_com_req.data_in = (int16_t*)p_bfw_iq_src;\r
- bfp_com_req.len = bfwNumPerRb*4;\r
- bfp_com_req.compMethod = p_ext1->bfwCompMeth;\r
- bfp_com_req.iqWidth = p_ext1->bfwIqWidth;\r
-\r
- print_dbg("req 0x%08p iqWidth %d\n",bfp_com_req.data_in, bfp_com_req.iqWidth);\r
-\r
- parm_size = 1; /* exponent as part of bfwCompParam 1 octet */\r
- break;\r
- case XRAN_BFWCOMPMETHOD_BLKSCALE:\r
- rte_panic("XRAN_BFWCOMPMETHOD_BLKSCALE");\r
- break;\r
-\r
- case XRAN_BFWCOMPMETHOD_ULAW:\r
- rte_panic("XRAN_BFWCOMPMETHOD_BLKSCALE");\r
- break;\r
-\r
- case XRAN_BFWCOMPMETHOD_BEAMSPACE:\r
- rte_panic("XRAN_BFWCOMPMETHOD_BLKSCALE");\r
- break;\r
-\r
- case XRAN_BFWCOMPMETHOD_NONE:\r
- default:\r
- p_bfw_content = (uint8_t *)(p_ext1+1);\r
- /* bfwCompParam is absent for no compression case */\r
- parm_size = 0;\r
- }\r
-\r
- if(p_bfw_content == NULL) {\r
- print_err("Fail to allocate the space for section extension 1");\r
- return (XRAN_STATUS_RESOURCE);\r
- }\r
-\r
- bfw_iq_bits = bfwNumPerRb* bfwiqWidth * 2;\r
-\r
- parm_size += bfw_iq_bits>>3;\r
- if(bfw_iq_bits%8)\r
- parm_size++;\r
-\r
- print_dbg("copy BF W %p -> %p size %d \n", p_bfw_iq_src, p_bfw_content, parm_size);\r
- if (p_ext1->bfwIqWidth == 0 || p_ext1->bfwIqWidth == 16){\r
- rte_memcpy(p_bfw_content, p_bfw_iq_src, parm_size);\r
- } else {\r
- bfp_com_rsp.data_out = (int8_t*)p_bfw_content;\r
- if(xranlib_compress_avx512_bfw(&bfp_com_req, &bfp_com_rsp) == 0){\r
- comp_len = bfp_com_rsp.len;\r
- print_dbg("comp_len %d\n", comp_len);\r
- } else {\r
- print_err("compression failed\n");\r
- return (XRAN_STATUS_FAIL);\r
- }\r
- }\r
-\r
- p_bfw_content = (uint8_t *)(p_bfw_content + parm_size);\r
-\r
- cur_ext_len += parm_size;\r
- parm_size = cur_ext_len % XRAN_SECTIONEXT_ALIGN;\r
- if(parm_size) {\r
- parm_size = XRAN_SECTIONEXT_ALIGN - parm_size;\r
- p_bfw_content = (uint8_t *)(p_bfw_content + parm_size);\r
- rte_memcpy(p_bfw_content, zeropad, parm_size);\r
- cur_ext_len += parm_size;\r
- print_dbg("zeropad %d cur_ext_len %d\n", parm_size, cur_ext_len);\r
- }\r
-\r
- if(cur_ext_len % XRAN_SECTIONEXT_ALIGN)\r
- rte_panic("ext1 should be aligned on 4-bytes boundary");\r
-\r
- p_ext1->extLen = cur_ext_len / XRAN_SECTIONEXT_ALIGN;\r
- print_dbg("p_ext1->extLen %d\n", p_ext1->extLen);\r
-\r
- /* update for next RB */\r
- p_ext1_dst_cur += cur_ext_len;\r
- p_bfw_iq_src = p_bfw_iq_src + bfwNumPerRb*2;\r
-\r
- total_len += cur_ext_len;\r
- }\r
-\r
- print_dbg("total_len %d\n", total_len);\r
- return (total_len);\r
-}\r
-\r
-\r
-// Cyclic Prefix Length 5.4.4.14\r
-// CP_length = cpLength * Ts, Ts = 1/30.72MHz\r
-// i.e cpLength = CP_length / Ts ?\r
-#define CPLEN_TS (30720000)\r
-inline uint16_t xran_get_cplength(int CP_length)\r
-{\r
- return (CP_length);\r
-}\r
-\r
-// Frequency offset 5.4.5.11\r
-// frequency_offset = freqOffset * SCS * 0.5\r
-// i.e freqOffset = (frequency_offset *2 )/ SCS ?\r
-inline int32_t xran_get_freqoffset(int32_t freqOffset, int32_t scs)\r
-{\r
- return (freqOffset);\r
-}\r
-\r
-static int xran_copy_sectionext_1(struct rte_mbuf *mbuf,\r
- struct xran_sectionext1_info *params, int last_flag)\r
-{\r
- int32_t total_len;\r
- int8_t *p_dst = (int8_t *)rte_pktmbuf_append(mbuf, params->bfwIQ_sz);\r
- if(p_dst == NULL) {\r
- print_err("Fail to allocate the space for section extension 1 [%d]", params->bfwIQ_sz);\r
- return (XRAN_STATUS_RESOURCE);\r
- }\r
- if(params->p_bfwIQ){\r
- /* copy formated extType1 with all the headers */\r
- rte_memcpy(p_dst, params->p_bfwIQ, params->bfwIQ_sz);\r
- total_len = params->bfwIQ_sz;\r
- }\r
- else\r
- total_len = 0;\r
-\r
-\r
- return (total_len);\r
-}\r
-\r
-\r
-static int xran_prepare_sectionext_1(struct rte_mbuf *mbuf,\r
- struct xran_sectionext1_info *params, int last_flag)\r
-{\r
- struct xran_cp_radioapp_section_ext1 *ext1;\r
- uint8_t *data;\r
- int parm_size, iq_size;\r
- int total_len;\r
-\r
- total_len = 0;\r
-\r
- print_dbg("%s %d\n", __FUNCTION__, last_flag);\r
-\r
- parm_size = sizeof(struct xran_cp_radioapp_section_ext1);\r
- ext1 = (struct xran_cp_radioapp_section_ext1 *)rte_pktmbuf_append(mbuf, parm_size);\r
- if(ext1 == NULL) {\r
- print_err("Fail to allocate the space for section extension 1 [%d]", parm_size);\r
- return (XRAN_STATUS_RESOURCE);\r
- }\r
-\r
- total_len += parm_size;\r
-\r
- ext1->extType = XRAN_CP_SECTIONEXTCMD_1;\r
- ext1->ef = last_flag;\r
- ext1->bfwCompMeth = params->bfwCompMeth;\r
- ext1->bfwIqWidth = XRAN_CONVERT_BFWIQWIDTH(params->bfwiqWidth);\r
-\r
- switch(params->bfwCompMeth) {\r
- case XRAN_BFWCOMPMETHOD_BLKFLOAT:\r
- parm_size = 1;\r
- data = (uint8_t *)rte_pktmbuf_append(mbuf, parm_size);\r
- if(data == NULL) {\r
- print_err("Fail to allocate the space for section extension 1 [%d]", parm_size);\r
- return (XRAN_STATUS_RESOURCE);\r
- }\r
- total_len += parm_size;\r
- *data = (params->bfwCompParam.exponent & 0x0f);\r
- break;\r
-\r
- case XRAN_BFWCOMPMETHOD_BLKSCALE:\r
- parm_size = 1;\r
- data = (uint8_t *)rte_pktmbuf_append(mbuf, parm_size);\r
- if(data == NULL) {\r
- print_err("Fail to allocate the space for section extension 1 [%d]", parm_size);\r
- return (XRAN_STATUS_RESOURCE);\r
- }\r
- total_len += parm_size;\r
- *data = params->bfwCompParam.blockScaler;\r
- break;\r
-\r
- case XRAN_BFWCOMPMETHOD_ULAW:\r
- parm_size = 1;\r
- data = (uint8_t *)rte_pktmbuf_append(mbuf, parm_size);\r
- if(data == NULL) {\r
- print_err("Fail to allocate the space for section extension 1 [%d]", parm_size);\r
- return (XRAN_STATUS_RESOURCE);\r
- }\r
- total_len += parm_size;\r
- *data = params->bfwCompParam.compBitWidthShift;\r
- break;\r
-\r
- case XRAN_BFWCOMPMETHOD_BEAMSPACE:\r
- parm_size = params->bfwNumber>>3;\r
- if(params->bfwNumber%8) parm_size++;\r
- parm_size *= 8;\r
- data = (uint8_t *)rte_pktmbuf_append(mbuf, parm_size);\r
- if(data == NULL) {\r
- print_err("Fail to allocate the space for section extension 1 [%d]", parm_size);\r
- return (XRAN_STATUS_RESOURCE);\r
- }\r
- rte_memcpy(data, params->bfwCompParam.activeBeamspaceCoeffMask, parm_size);\r
- total_len += parm_size;\r
- break;\r
-\r
- case XRAN_BFWCOMPMETHOD_NONE:\r
- default:\r
- parm_size = 0;\r
- }\r
-\r
- print_dbg("params->bfwNumber %d params->bfwiqWidth %d\n", params->bfwNumber, params->bfwiqWidth);\r
-\r
- iq_size = params->bfwNumber * params->bfwiqWidth * 2;\r
-\r
- parm_size = iq_size>>3;\r
- if(iq_size%8)\r
- parm_size++;\r
-\r
- data = (uint8_t *)rte_pktmbuf_append(mbuf, parm_size);\r
- if(data == NULL) {\r
- print_err("Fail to allocate the space for section extension 1 BF W iq_size: [%d]", parm_size);\r
- return (XRAN_STATUS_RESOURCE);\r
- }\r
- rte_memcpy(data, params->p_bfwIQ, parm_size);\r
-\r
- total_len += parm_size;\r
- parm_size = total_len % XRAN_SECTIONEXT_ALIGN;\r
- if(parm_size) {\r
- parm_size = XRAN_SECTIONEXT_ALIGN - parm_size;\r
- data = (uint8_t *)rte_pktmbuf_append(mbuf, parm_size);\r
- if(data == NULL) {\r
- print_err("Fail to allocate the space for section extension 1 [%d]", parm_size);\r
- return (XRAN_STATUS_RESOURCE);\r
- }\r
- rte_memcpy(data, zeropad, parm_size);\r
- total_len += parm_size;\r
- }\r
-\r
- ext1->extLen = total_len / XRAN_SECTIONEXT_ALIGN;\r
-\r
- return (total_len);\r
-}\r
-\r
-static int xran_prepare_sectionext_2(struct rte_mbuf *mbuf,\r
- struct xran_sectionext2_info *params, int last_flag)\r
-{\r
- struct xran_cp_radioapp_section_ext2 *ext2;\r
- uint8_t *data;\r
- int total_len;\r
- int parm_size;\r
- uint32_t val, shift_val;\r
- int val_size, pad_size;\r
-\r
-\r
- total_len = 0;\r
-\r
- parm_size = sizeof(struct xran_cp_radioapp_section_ext2);\r
- ext2 = (struct xran_cp_radioapp_section_ext2 *)rte_pktmbuf_append(mbuf, parm_size);\r
- if(ext2 == NULL) {\r
- print_err("Fail to allocate the space for section extension 2");\r
- return (XRAN_STATUS_RESOURCE);\r
- }\r
- total_len += parm_size;\r
-\r
- ext2->extType = XRAN_CP_SECTIONEXTCMD_2;\r
- ext2->ef = last_flag;\r
- ext2->bfZe3ddWidth = params->bfZe3ddWidth;\r
- ext2->bfAz3ddWidth = params->bfAz3ddWidth;\r
- ext2->bfZePtWidth = params->bfZePtWidth;\r
- ext2->bfAzPtWidth = params->bfAzPtWidth;\r
- ext2->bfaCompResv0 = 0;\r
- ext2->bfaCompResv1 = 0;\r
-\r
- val = 0;\r
- shift_val = 0;\r
- if(params->bfAzPtWidth) {\r
- val += params->bfAzPt & bitmask[params->bfAzPtWidth];\r
- shift_val += 8 - (params->bfAzPtWidth+1);\r
- }\r
- else\r
- shift_val += 8;\r
-\r
- if(params->bfZePtWidth) {\r
- val = val << (params->bfZePtWidth+1);\r
- val += params->bfZePt & bitmask[params->bfZePtWidth];\r
- shift_val += 8 - (params->bfZePtWidth+1);\r
- }\r
- else\r
- shift_val += 8;\r
-\r
- if(params->bfAz3ddWidth) {\r
- val = val << (params->bfAz3ddWidth+1);\r
- val += params->bfAz3dd & bitmask[params->bfAz3ddWidth];\r
- shift_val += 8 - (params->bfAz3ddWidth+1);\r
- }\r
- else\r
- shift_val += 8;\r
-\r
- if(params->bfZe3ddWidth) {\r
- val = val << (params->bfZe3ddWidth+1);\r
- val += params->bfZe3dd & bitmask[params->bfZe3ddWidth];\r
- shift_val += 8 - (params->bfZe3ddWidth+1);\r
- }\r
- else\r
- shift_val += 8;\r
-\r
- if(val) {\r
- val = val << shift_val;\r
- val = rte_cpu_to_be_32(val);\r
- }\r
-\r
- val_size = 4 - (shift_val/8); /* ceil(total bit/8) */\r
- parm_size = val_size + 1; /* additional 1 byte for bfxxSI */\r
-\r
- // alignment\r
- total_len += parm_size;\r
- pad_size = total_len % XRAN_SECTIONEXT_ALIGN;\r
- if(pad_size) {\r
- pad_size = XRAN_SECTIONEXT_ALIGN - pad_size;\r
- parm_size += pad_size;\r
- total_len += pad_size;\r
- }\r
-\r
- data = (uint8_t *)rte_pktmbuf_append(mbuf, parm_size);\r
- if(data == NULL) {\r
- print_err("Fail to allocate the space for section extension 2");\r
- return (XRAN_STATUS_RESOURCE);\r
- }\r
-\r
- rte_memcpy(data, &val, val_size);\r
- data += val_size;\r
- *data = ((params->bfAzSI) << 3) + (params->bfZeSI);\r
- data++;\r
- rte_memcpy(data, zeropad, pad_size);\r
-\r
- ext2->extLen = total_len / XRAN_SECTIONEXT_ALIGN;\r
- *(uint32_t *)ext2 = rte_cpu_to_be_32(*(uint32_t *)ext2);\r
-\r
- return (total_len);\r
-}\r
-\r
-static int xran_prepare_sectionext_4(struct rte_mbuf *mbuf,\r
- struct xran_sectionext4_info *params, int last_flag)\r
-{\r
- struct xran_cp_radioapp_section_ext4 *ext4;\r
- int parm_size;\r
- int total_len;\r
- int ret;\r
-\r
-\r
- total_len = 0;\r
-\r
- parm_size = sizeof(struct xran_cp_radioapp_section_ext4);\r
- ext4 = (struct xran_cp_radioapp_section_ext4 *)rte_pktmbuf_append(mbuf, parm_size);\r
- if(ext4 == NULL) {\r
- print_err("Fail to allocate the space for section extension 4");\r
- return(XRAN_STATUS_RESOURCE);\r
- }\r
- else {\r
- total_len += parm_size;\r
-\r
- ext4->extType = XRAN_CP_SECTIONEXTCMD_4;\r
- ext4->ef = last_flag;\r
- ext4->modCompScaler = params->modCompScaler;\r
- ext4->csf = params->csf?1:0;\r
- ext4->extLen = total_len / XRAN_SECTIONEXT_ALIGN;\r
-\r
- *(uint32_t *)ext4 = rte_cpu_to_be_32(*(uint32_t*)ext4);\r
- }\r
-\r
- return (total_len);\r
-}\r
-\r
-static int xran_prepare_sectionext_5(struct rte_mbuf *mbuf,\r
- struct xran_sectionext5_info *params, int last_flag)\r
-{\r
- struct xran_cp_radioapp_section_ext_hdr *ext_hdr;\r
- struct xran_cp_radioapp_section_ext5 ext5;\r
- int padding;\r
- int total_len;\r
- uint8_t *data;\r
- int i;\r
-\r
-\r
- if(params->num_sets > XRAN_MAX_MODCOMP_ADDPARMS) {\r
- print_err("Exceeds maximum number of parameters(%d). Skipping.", params->num_sets);\r
- return (0);\r
- }\r
-\r
- total_len = sizeof(struct xran_cp_radioapp_section_ext_hdr)\r
- + (sizeof(struct xran_cp_radioapp_section_ext5)*params->num_sets)/2\r
- - (params->num_sets>>1); // 8bits are added by every two sets, so needs to adjust\r
-\r
- /* for alignment */\r
- padding = total_len % XRAN_SECTIONEXT_ALIGN;\r
- if(padding) {\r
- padding = XRAN_SECTIONEXT_ALIGN - padding;\r
- total_len += padding;\r
- }\r
-\r
- ext_hdr = (struct xran_cp_radioapp_section_ext_hdr *)rte_pktmbuf_append(mbuf, total_len);\r
- if(ext_hdr == NULL) {\r
- print_err("Fail to allocate the space for section extension 5");\r
- return (XRAN_STATUS_RESOURCE);\r
- }\r
-\r
- ext_hdr->extType = XRAN_CP_SECTIONEXTCMD_5;\r
- ext_hdr->ef = last_flag;\r
- ext_hdr->extLen = total_len / XRAN_SECTIONEXT_ALIGN;\r
-\r
- *(uint16_t *)ext_hdr = rte_cpu_to_be_16(*((uint16_t *)ext_hdr));\r
-\r
- data = (uint8_t *)(ext_hdr + 1);\r
- i = 0;\r
- while(i < params->num_sets) {\r
- if(i%2) { // odd index\r
- ext5.mcScaleOffset2 = params->mc[i].mcScaleOffset;\r
- ext5.csf2 = params->mc[i].csf;\r
- ext5.mcScaleReMask2 = params->mc[i].mcScaleReMask;\r
- ext5.reserved0 = 0;\r
- i++;\r
-\r
- // adding two sets at once (due to the definition of structure)\r
- *((uint64_t *)&ext5) = rte_cpu_to_be_64(*((uint64_t *)&ext5));\r
- rte_memcpy(data, &ext5, sizeof(struct xran_cp_radioapp_section_ext5));\r
- data += sizeof(struct xran_cp_radioapp_section_ext5);\r
- }\r
- else { // even index\r
- ext5.mcScaleOffset1 = params->mc[i].mcScaleOffset;\r
- ext5.csf1 = params->mc[i].csf;\r
- ext5.mcScaleReMask1 = params->mc[i].mcScaleReMask;\r
- ext5.mcScaleReMask2 = 0;\r
- i++;\r
-\r
- if(i == params->num_sets) { // adding last even index\r
- *((uint64_t *)&ext5) = rte_cpu_to_be_64(*((uint64_t *)&ext5));\r
- rte_memcpy(data, &ext5, sizeof(struct xran_cp_radioapp_section_ext5)/2);\r
- data += sizeof(struct xran_cp_radioapp_section_ext5)/2;\r
- break;\r
- }\r
- }\r
- }\r
-\r
- /* zero padding */\r
- if(padding)\r
- rte_memcpy(data, zeropad, padding);\r
-\r
- return (total_len);\r
-}\r
-\r
-/**\r
- * @brief add section extension to C-Plane packet\r
- *\r
- * @param mbuf\r
- * A pointer to the packet buffer\r
- * @param params\r
- * A porinter to the information to generate a C-Plane packet\r
- * @return\r
- * XRAN_STATUS_SUCCESS on success\r
- * XRAN_STATUS_INVALID_PARM\r
- * XRAN_STATUS_RESOURCE if failed to allocate the space to packet buffer\r
- */\r
-int xran_append_section_extensions(struct rte_mbuf *mbuf, struct xran_section_gen_info *params)\r
-{\r
- int i, ret;\r
- uint32_t totalen;\r
- int last_flag;\r
- int ext_size;\r
-\r
- if(unlikely(params->exDataSize > XRAN_MAX_NUM_EXTENSIONS)) {\r
- print_err("Invalid total number of extensions - %d", params->exDataSize);\r
- return (XRAN_STATUS_INVALID_PARAM);\r
- }\r
-\r
- totalen = 0;\r
-\r
- ret = XRAN_STATUS_SUCCESS;\r
-\r
- print_dbg("params->exDataSize %d\n", params->exDataSize);\r
- for(i=0; i < params->exDataSize; i++) {\r
- if(params->exData[i].data == NULL) {\r
- print_err("Invalid parameter - extension data %d is NULL", i);\r
- ret = XRAN_STATUS_INVALID_PARAM;\r
- continue;\r
- }\r
-\r
- last_flag = (params->exDataSize == (i+1))?0:1;\r
-\r
- switch(params->exData[i].type) {\r
- case XRAN_CP_SECTIONEXTCMD_1:\r
- ext_size = xran_copy_sectionext_1(mbuf, params->exData[i].data, last_flag);\r
- //xran_prepare_sectionext_1(mbuf, params->exData[i].data, last_flag);\r
- break;\r
- case XRAN_CP_SECTIONEXTCMD_2:\r
- ext_size = xran_prepare_sectionext_2(mbuf, params->exData[i].data, last_flag);\r
- break;\r
- case XRAN_CP_SECTIONEXTCMD_4:\r
- ext_size = xran_prepare_sectionext_4(mbuf, params->exData[i].data, last_flag);\r
- break;\r
- case XRAN_CP_SECTIONEXTCMD_5:\r
- ext_size = xran_prepare_sectionext_5(mbuf, params->exData[i].data, last_flag);\r
- break;\r
- case XRAN_CP_SECTIONEXTCMD_0:\r
- case XRAN_CP_SECTIONEXTCMD_3:\r
- default:\r
- print_err("Extension Type %d is not supported!", params->exData[i].type);\r
- ret = XRAN_STATUS_INVALID_PARAM;\r
- ext_size = 0;\r
- }\r
-\r
- if(ext_size == XRAN_STATUS_RESOURCE) {\r
- break;\r
- }\r
-\r
- totalen += ext_size;\r
- }\r
-\r
- return (totalen);\r
-}\r
-\r
-\r
-/**\r
- * @brief Fill the section body of type 0 in C-Plane packet\r
- *\r
- * @param section\r
- * A pointer to the section in the packet buffer\r
- * @param params\r
- * A porinter to the information to generate a C-Plane packet\r
- * @return\r
- * XRAN_STATUS_SUCCESS on success\r
- * XRAN_STATUS_INVALID_PARM if the number of symbol is invalid\r
- */\r
-static int xran_prepare_section0(\r
- struct xran_cp_radioapp_section0 *section,\r
- struct xran_section_gen_info *params)\r
-{\r
-#if (XRAN_STRICT_PARM_CHECK)\r
- if(unlikely(params->info.numSymbol > XRAN_SYMBOLNUMBER_MAX)) {\r
- print_err("Invalid number of Symbols - %d", params->info.numSymbol);\r
- return (XRAN_STATUS_INVALID_PARAM);\r
- }\r
-#endif\r
-\r
- section->hdr.sectionId = params->info.id;\r
- section->hdr.rb = params->info.rb;\r
- section->hdr.symInc = params->info.symInc;\r
- section->hdr.startPrbc = params->info.startPrbc;\r
- section->hdr.numPrbc = XRAN_CONVERT_NUMPRBC(params->info.numPrbc);\r
-\r
- section->hdr.u.s0.reMask = params->info.reMask;\r
- section->hdr.u.s0.numSymbol = params->info.numSymbol;\r
- section->hdr.u.s0.reserved = 0;\r
-\r
- // for network byte order\r
- *((uint64_t *)section) = rte_cpu_to_be_64(*((uint64_t *)section));\r
-\r
- return (XRAN_STATUS_SUCCESS);\r
-}\r
-/**\r
- * @brief Fill the section header of type 0 in C-Plane packet\r
- *\r
- * @param s0hdr\r
- * A pointer to the section header in the packet buffer\r
- * @param params\r
- * A porinter to the information to generate a C-Plane packet\r
- * @return\r
- * XRAN_STATUS_SUCCESS always\r
- */\r
-static int xran_prepare_section0_hdr(\r
- struct xran_cp_radioapp_section0_header *s0hdr,\r
- struct xran_cp_gen_params *params)\r
-\r
-{\r
- s0hdr->timeOffset = rte_cpu_to_be_16(params->hdr.timeOffset);\r
- s0hdr->frameStructure.fftSize = params->hdr.fftSize;\r
- s0hdr->frameStructure.uScs = params->hdr.scs;\r
- s0hdr->cpLength = rte_cpu_to_be_16(params->hdr.cpLength);\r
- s0hdr->reserved = 0;\r
-\r
- return (XRAN_STATUS_SUCCESS);\r
-}\r
-\r
-/**\r
- * @brief Fill the section body of type 1 in C-Plane packet\r
- * Extension is not supported.\r
- *\r
- * @param section\r
- * A pointer to the section header in the packet buffer\r
- * @param params\r
- * A porinter to the information to generate a C-Plane packet\r
- * @return\r
- * XRAN_STATUS_SUCCESS on success\r
- * XRAN_STATUS_INVALID_PARM if the number of symbol is invalid\r
- */\r
-static int xran_prepare_section1(\r
- struct xran_cp_radioapp_section1 *section,\r
- struct xran_section_gen_info *params)\r
-{\r
-#if (XRAN_STRICT_PARM_CHECK)\r
- if(unlikely(params->info.numSymbol > XRAN_SYMBOLNUMBER_MAX)) {\r
- print_err("Invalid number of Symbols - %d", params->info.numSymbol);\r
- return (XRAN_STATUS_INVALID_PARAM);\r
- }\r
-#endif\r
-\r
- section->hdr.sectionId = params->info.id;\r
- section->hdr.rb = params->info.rb;\r
- section->hdr.symInc = params->info.symInc;\r
- section->hdr.startPrbc = params->info.startPrbc;\r
- section->hdr.numPrbc = XRAN_CONVERT_NUMPRBC(params->info.numPrbc);\r
-\r
- section->hdr.u.s1.reMask = params->info.reMask;\r
- section->hdr.u.s1.numSymbol = params->info.numSymbol;\r
- section->hdr.u.s1.beamId = params->info.beamId;\r
-\r
- section->hdr.u.s1.ef = params->info.ef;\r
-\r
- // for network byte order\r
- *((uint64_t *)section) = rte_cpu_to_be_64(*((uint64_t *)section));\r
-\r
- return (XRAN_STATUS_SUCCESS);\r
-}\r
-/**\r
- * @brief Fill the section header of type 1 in C-Plane packet\r
- *\r
- * @param s1hdr\r
- * A pointer to the section header in the packet buffer\r
- * @param params\r
- * A porinter to the information to generate a C-Plane packet\r
- * @return\r
- * XRAN_STATUS_SUCCESS always\r
- */\r
-static int xran_prepare_section1_hdr(\r
- struct xran_cp_radioapp_section1_header *s1hdr,\r
- struct xran_cp_gen_params *params)\r
-{\r
- s1hdr->udComp.udIqWidth = params->hdr.iqWidth;\r
- s1hdr->udComp.udCompMeth = params->hdr.compMeth;\r
- s1hdr->reserved = 0;\r
-\r
- return (XRAN_STATUS_SUCCESS);\r
-}\r
-\r
-/**\r
- * @brief Fill the section body of type 3 in C-Plane packet\r
- * Extension is not supported.\r
- *\r
- * @param section\r
- * A pointer to the section header in the packet buffer\r
- * @param params\r
- * A porinter to the information to generate a C-Plane packet\r
- * @return\r
- * XRAN_STATUS_SUCCESS on success\r
- * XRAN_STATUS_INVALID_PARM if the number of symbol is invalid\r
- */\r
-static int xran_prepare_section3(\r
- struct xran_cp_radioapp_section3 *section,\r
- struct xran_section_gen_info *params)\r
-{\r
-#if (XRAN_STRICT_PARM_CHECK)\r
- if(unlikely(params->info.numSymbol > XRAN_SYMBOLNUMBER_MAX)) {\r
- print_err("Invalid number of Symbols - %d", params->info.numSymbol);\r
- return (XRAN_STATUS_INVALID_PARAM);\r
- }\r
-#endif\r
-\r
- section->hdr.sectionId = params->info.id;\r
- section->hdr.rb = params->info.rb;\r
- section->hdr.symInc = params->info.symInc;\r
- section->hdr.startPrbc = params->info.startPrbc;\r
- section->hdr.numPrbc = XRAN_CONVERT_NUMPRBC(params->info.numPrbc);\r
-\r
- section->hdr.u.s3.reMask = params->info.reMask;\r
- section->hdr.u.s3.numSymbol = params->info.numSymbol;\r
- section->hdr.u.s3.beamId = params->info.beamId;\r
-\r
- section->freqOffset = rte_cpu_to_be_32(params->info.freqOffset)>>8;\r
- section->reserved = 0;\r
-\r
- section->hdr.u.s3.ef = params->info.ef;\r
-\r
- // for network byte order (header, 8 bytes)\r
- *((uint64_t *)section) = rte_cpu_to_be_64(*((uint64_t *)section));\r
-\r
- return (XRAN_STATUS_SUCCESS);\r
-}\r
-/**\r
- * @brief Fill the section header of type 3 in C-Plane packet\r
- *\r
- * @param s3hdr\r
- * A pointer to the section header in the packet buffer\r
- * @param params\r
- * A porinter to the information to generate a C-Plane packet\r
- * @return\r
- * XRAN_STATUS_SUCCESS always\r
- */\r
-static int xran_prepare_section3_hdr(\r
- struct xran_cp_radioapp_section3_header *s3hdr,\r
- struct xran_cp_gen_params *params)\r
-\r
-{\r
- s3hdr->timeOffset = rte_cpu_to_be_16(params->hdr.timeOffset);\r
- s3hdr->frameStructure.fftSize = params->hdr.fftSize;\r
- s3hdr->frameStructure.uScs = params->hdr.scs;\r
- s3hdr->cpLength = rte_cpu_to_be_16(params->hdr.cpLength);\r
- s3hdr->udComp.udIqWidth = params->hdr.iqWidth;\r
- s3hdr->udComp.udCompMeth = params->hdr.compMeth;\r
-\r
- return (XRAN_STATUS_SUCCESS);\r
-}\r
-\r
-/**\r
- * @brief add sections to C-Plane packet\r
- * Section type 1 and 3 are supported.\r
- *\r
- * @param mbuf\r
- * A pointer to the packet buffer\r
- * @param params\r
- * A porinter to the information to generate a C-Plane packet\r
- * @return\r
- * XRAN_STATUS_SUCCESS on success\r
- * XRAN_STATUS_INVALID_PARM if section type is not 1 or 3, or handler is NULL\r
- * XRAN_STATUS_RESOURCE if failed to allocate the space to packet buffer\r
- */\r
-int xran_append_control_section(struct rte_mbuf *mbuf, struct xran_cp_gen_params *params)\r
-{\r
- int i, ret, ext_flag;\r
- uint32_t totalen;\r
- void *section;\r
- int section_size;\r
- int (*xran_prepare_section_func)(void *section, void *params);\r
-\r
-\r
- totalen = 0;\r
- switch(params->sectionType) {\r
- case XRAN_CP_SECTIONTYPE_0: /* Unused RB or Symbols in DL or UL, not supportted */\r
- section_size = sizeof(struct xran_cp_radioapp_section0);\r
- xran_prepare_section_func = (int (*)(void *, void *))xran_prepare_section0;\r
- break;\r
-\r
- case XRAN_CP_SECTIONTYPE_1: /* Most DL/UL Radio Channels */\r
- section_size = sizeof(struct xran_cp_radioapp_section1);\r
- xran_prepare_section_func = (int (*)(void *, void *))xran_prepare_section1;\r
- break;\r
-\r
- case XRAN_CP_SECTIONTYPE_3: /* PRACH and Mixed-numerology Channels */\r
- section_size = sizeof(struct xran_cp_radioapp_section3);\r
- xran_prepare_section_func = (int (*)(void *, void *))xran_prepare_section3;\r
- break;\r
-\r
- case XRAN_CP_SECTIONTYPE_5: /* UE scheduling information, not supported */\r
- case XRAN_CP_SECTIONTYPE_6: /* Channel Information, not supported */\r
- case XRAN_CP_SECTIONTYPE_7: /* LAA, not supported */\r
- default:\r
- section_size = 0;\r
- xran_prepare_section_func = NULL;\r
- print_err("Section Type %d is not supported!", params->sectionType);\r
- return (XRAN_STATUS_INVALID_PARAM);\r
- }\r
-\r
- if(unlikely(xran_prepare_section_func == NULL)) {\r
- print_err("Section Type %d is not supported!", params->sectionType);\r
- return (XRAN_STATUS_INVALID_PARAM);\r
- }\r
-\r
- for(i=0; i < params->numSections; i++) {\r
- section = rte_pktmbuf_append(mbuf, section_size);\r
- if(section == NULL) {\r
- print_err("Fail to allocate the space for section[%d]!", i);\r
- return (XRAN_STATUS_RESOURCE);\r
- }\r
- print_dbg("%s %d ef %d\n", __FUNCTION__, i, params->sections[i].info.ef);\r
- ret = xran_prepare_section_func((void *)section,\r
- (void *)¶ms->sections[i]);\r
- if(ret < 0){\r
- print_err("%s %d\n", __FUNCTION__, ret);\r
- return (ret);\r
- }\r
- totalen += section_size;\r
-\r
- if(params->sections[i].info.ef) {\r
- print_dbg("sections[%d].info.ef %d exDataSize %d type %d\n", i, params->sections[i].info.ef,\r
- params->sections[i].exDataSize, params->sections[i].exData[0].type);\r
- ret = xran_append_section_extensions(mbuf, ¶ms->sections[i]);\r
- if(ret < 0)\r
- return (ret);\r
- totalen += ret;\r
- }\r
- }\r
-\r
- return (totalen);\r
-}\r
-\r
-/**\r
- * @brief fill the information of a radio application header in a C-Plane packet\r
- *\r
- * @param apphdr\r
- * A pointer to the application header in the packet buffer\r
- * @param params\r
- * A porinter to the information to generate a C-Plane packet\r
- * @return\r
- * XRAN_STATUS_SUCCESS on success\r
- * XRAN_STATUS_INVALID_PARM if direction, slot index or symbold index is invalid\r
- */\r
-static inline int xran_prepare_radioapp_common_header(\r
- struct xran_cp_radioapp_common_header *apphdr,\r
- struct xran_cp_gen_params *params)\r
-{\r
-\r
-#if (XRAN_STRICT_PARM_CHECK)\r
- if(unlikely(params->dir != XRAN_DIR_DL && params->dir != XRAN_DIR_UL)) {\r
- print_err("Invalid direction!");\r
- return (XRAN_STATUS_INVALID_PARAM);\r
- }\r
- if(unlikely(params->hdr.slotId > XRAN_SLOTID_MAX)) {\r
- print_err("Invalid Slot ID!");\r
- return (XRAN_STATUS_INVALID_PARAM);\r
- }\r
- if(unlikely(params->hdr.startSymId > XRAN_SYMBOLNUMBER_MAX)) {\r
- print_err("Invalid Symbol ID!");\r
- return (XRAN_STATUS_INVALID_PARAM);\r
- }\r
-#endif\r
-\r
- apphdr->dataDirection = params->dir;\r
- apphdr->payloadVer = XRAN_PAYLOAD_VER;\r
- apphdr->filterIndex = params->hdr.filterIdx;\r
- apphdr->frameId = params->hdr.frameId;\r
- apphdr->subframeId = params->hdr.subframeId;\r
- apphdr->slotId = params->hdr.slotId;\r
- apphdr->startSymbolId = params->hdr.startSymId;\r
- apphdr->numOfSections = params->numSections;\r
- apphdr->sectionType = params->sectionType;\r
-\r
- /* radio app header has common parts of 4bytes for all section types */\r
- *((uint32_t *)apphdr) = rte_cpu_to_be_32(*((uint32_t *)apphdr));\r
-\r
- return (XRAN_STATUS_SUCCESS);\r
-}\r
-\r
-/**\r
- * @brief add a radio application header in a C-Plane packet\r
- *\r
- * @param mbuf\r
- * A pointer to the packet buffer\r
- * @param params\r
- * A porinter to the information to generate a C-Plane packet\r
- * @return\r
- * The length of added section (>0) on success\r
- * XRAN_STATUS_INVALID_PARM if section type is invalid, or handler is NULL\r
- * XRAN_STATUS_RESOURCE if failed to allocate the space to packet buffer\r
- */\r
-int xran_append_radioapp_header(struct rte_mbuf *mbuf, struct xran_cp_gen_params *params)\r
-{\r
- int ret;\r
- uint32_t totalen;\r
- struct xran_cp_radioapp_common_header *apphdr;\r
- int (*xran_prepare_radioapp_section_hdr_func)(void *hdr, void *params);\r
-\r
-\r
-#if (XRAN_STRICT_PARM_CHECK)\r
- if(unlikely(params->sectionType >= XRAN_CP_SECTIONTYPE_MAX)) {\r
- print_err("Invalid Section Type - %d", params->sectionType);\r
- return (XRAN_STATUS_INVALID_PARAM);\r
- }\r
-#endif\r
-\r
- switch(params->sectionType) {\r
- case XRAN_CP_SECTIONTYPE_0: /* Unused RB or Symbols in DL or UL, not supportted */\r
- xran_prepare_radioapp_section_hdr_func = (int (*)(void *, void*))xran_prepare_section0_hdr;\r
- totalen = sizeof(struct xran_cp_radioapp_section0_header);\r
- break;\r
-\r
- case XRAN_CP_SECTIONTYPE_1: /* Most DL/UL Radio Channels */\r
- xran_prepare_radioapp_section_hdr_func = (int (*)(void *, void*))xran_prepare_section1_hdr;\r
- totalen = sizeof(struct xran_cp_radioapp_section1_header);\r
- break;\r
-\r
- case XRAN_CP_SECTIONTYPE_3: /* PRACH and Mixed-numerology Channels */\r
- xran_prepare_radioapp_section_hdr_func = (int (*)(void *, void*))xran_prepare_section3_hdr;\r
- totalen = sizeof(struct xran_cp_radioapp_section3_header);\r
- break;\r
-\r
- case XRAN_CP_SECTIONTYPE_5: /* UE scheduling information, not supported */\r
- case XRAN_CP_SECTIONTYPE_6: /* Channel Information, not supported */\r
- case XRAN_CP_SECTIONTYPE_7: /* LAA, not supported */\r
- default:\r
- print_err("Section Type %d is not supported!", params->sectionType);\r
- xran_prepare_radioapp_section_hdr_func = NULL;\r
- totalen = 0;\r
- return (XRAN_STATUS_INVALID_PARAM);\r
- }\r
-\r
- apphdr = (struct xran_cp_radioapp_common_header *)rte_pktmbuf_append(mbuf, totalen);\r
- if(unlikely(apphdr == NULL)) {\r
- print_err("Fail to reserve the space for radio application header!");\r
- return (XRAN_STATUS_RESOURCE);\r
- }\r
-\r
- ret = xran_prepare_radioapp_common_header(apphdr, params);\r
- if(unlikely(ret < 0)) {\r
- return (ret);\r
- }\r
-\r
- if(likely(xran_prepare_radioapp_section_hdr_func)) {\r
- totalen += xran_prepare_radioapp_section_hdr_func(apphdr, params);\r
- }\r
- else {\r
- print_err("xran_prepare_radioapp_section_hdr_func is NULL!");\r
- return (XRAN_STATUS_INVALID_PARAM);\r
- }\r
-\r
- return (totalen);\r
-}\r
-\r
-/**\r
- * @brief Create a C-Plane packet\r
- * Transport layer fragmentation is not supported.\r
- *\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @param mbuf\r
- * A pointer to the packet buffer\r
- * @param params\r
- * A porinter to the information to generate a C-Plane packet\r
- * @param CC_ID\r
- * Component Carrier ID for this C-Plane message\r
- * @param Ant_ID\r
- * Antenna ID(RU Port ID) for this C-Plane message\r
- * @param seq_id\r
- * Sequence ID for this C-Plane message\r
- * @return\r
- * XRAN_STATUS_SUCCESS on success\r
- * XRAN_STATUS_RESOURCE if failed to allocate the space to packet buffer\r
- * XRAN_STATUS_INVALID_PARM if section type is invalid\r
- */\r
-int xran_prepare_ctrl_pkt(struct rte_mbuf *mbuf,\r
- struct xran_cp_gen_params *params,\r
- uint8_t CC_ID, uint8_t Ant_ID,\r
- uint8_t seq_id)\r
-{\r
- int ret;\r
- uint32_t payloadlen;\r
- struct xran_ecpri_hdr *ecpri_hdr;\r
-\r
-\r
- payloadlen = xran_build_ecpri_hdr(mbuf, CC_ID, Ant_ID, seq_id, &ecpri_hdr);\r
-\r
- ret = xran_append_radioapp_header(mbuf, params);\r
- if(ret < 0) {\r
- print_err("%s %d\n", __FUNCTION__, ret);\r
- return (ret);\r
- }\r
- payloadlen += ret;\r
-\r
- ret = xran_append_control_section(mbuf, params);\r
- if(ret < 0) {\r
- print_err("%s %d\n", __FUNCTION__, ret);\r
- return (ret);\r
- }\r
- payloadlen += ret;\r
-\r
- /* set payload length */\r
- ecpri_hdr->cmnhdr.ecpri_payl_size = rte_cpu_to_be_16(payloadlen);\r
-\r
- return (XRAN_STATUS_SUCCESS);\r
-}\r
-\r
-\r
-///////////////////////////////////////\r
-// for RU emulation\r
-int xran_parse_section_ext1(void *ext,\r
- struct xran_sectionext1_info *extinfo)\r
-{\r
- int len;\r
- int total_len;\r
- struct xran_cp_radioapp_section_ext1 *ext1;\r
- uint8_t *data;\r
- int parm_size, iq_size;\r
- int N;\r
- void *pHandle;\r
-\r
- pHandle = NULL;\r
- N = xran_get_conf_num_bfweights(pHandle);\r
- extinfo->bfwNumber = N;\r
-\r
- ext1 = (struct xran_cp_radioapp_section_ext1 *)ext;\r
- data = (uint8_t *)ext;\r
-\r
- len = 0;\r
- total_len = ext1->extLen * XRAN_SECTIONEXT_ALIGN; /* from word to byte */\r
-\r
- extinfo->bfwCompMeth = ext1->bfwCompMeth;\r
- extinfo->bfwiqWidth = (ext1->bfwIqWidth==0)?16:ext1->bfwIqWidth;\r
-\r
- len += sizeof(struct xran_cp_radioapp_section_ext1);\r
- data += sizeof(struct xran_cp_radioapp_section_ext1);\r
-\r
- switch(ext1->bfwCompMeth) {\r
- case XRAN_BFWCOMPMETHOD_NONE:\r
- parm_size = 0;\r
- break;\r
-\r
- case XRAN_BFWCOMPMETHOD_BLKFLOAT:\r
- parm_size = 1;\r
- extinfo->bfwCompParam.exponent = *data & 0x0f;\r
- break;\r
-\r
- case XRAN_BFWCOMPMETHOD_BLKSCALE:\r
- parm_size = 1;\r
- extinfo->bfwCompParam.blockScaler = *data;\r
- break;\r
-\r
- case XRAN_BFWCOMPMETHOD_ULAW:\r
- parm_size = 1;\r
- extinfo->bfwCompParam.compBitWidthShift = *data;\r
- break;\r
-\r
- case XRAN_BFWCOMPMETHOD_BEAMSPACE:\r
- parm_size = N>>3; if(N%8) parm_size++; parm_size *= 8;\r
- rte_memcpy(data, extinfo->bfwCompParam.activeBeamspaceCoeffMask, parm_size);\r
- break;\r
-\r
- default:\r
- print_err("Invalid BfComp method - %d", ext1->bfwCompMeth);\r
- parm_size = 0;\r
- }\r
-\r
- len += parm_size;\r
- data += parm_size;\r
-\r
- /* Get BF weights */\r
- iq_size = N * extinfo->bfwiqWidth * 2; // total in bits\r
- parm_size = iq_size>>3; // total in bytes (/8)\r
- if(iq_size%8) parm_size++; // round up\r
-\r
- //rte_memcpy(data, extinfo->p_bfwIQ, parm_size);\r
- extinfo->p_bfwIQ = (int16_t*)data;\r
-\r
- len += parm_size;\r
-\r
- parm_size = len % XRAN_SECTIONEXT_ALIGN;\r
- if(parm_size)\r
- len += (XRAN_SECTIONEXT_ALIGN - parm_size);\r
-\r
- if(len != total_len) {\r
- // TODO: fix this print_err("The size of extension 1 is not correct! [%d:%d]", len, total_len);\r
- }\r
-\r
- return (total_len);\r
-}\r
-\r
-int xran_parse_section_ext2(void *ext,\r
- struct xran_sectionext2_info *extinfo)\r
-{\r
- int len;\r
- int total_len;\r
- struct xran_cp_radioapp_section_ext2 *ext2;\r
- uint8_t *data;\r
- int parm_size;\r
- uint32_t val;\r
- int val_size;\r
-\r
-\r
- ext2 = (struct xran_cp_radioapp_section_ext2 *)ext;\r
- data = (uint8_t *)ext;\r
- *(uint32_t *)ext2 = rte_cpu_to_be_32(*(uint32_t *)ext2);\r
-\r
- len = 0;\r
- total_len = ext2->extLen * XRAN_SECTIONEXT_ALIGN; /* from word to byte */\r
-\r
- parm_size = sizeof(struct xran_cp_radioapp_section_ext2);\r
-\r
- extinfo->bfAzPtWidth = ext2->bfAzPtWidth;\r
- extinfo->bfZePtWidth = ext2->bfZePtWidth;\r
- extinfo->bfAz3ddWidth = ext2->bfAz3ddWidth;\r
- extinfo->bfZe3ddWidth = ext2->bfZe3ddWidth;\r
-\r
- if(ext2->bfaCompResv0 || ext2->bfaCompResv1)\r
- print_err("Incorrect reserved field - %d, %d", ext2->bfaCompResv0, ext2->bfaCompResv1);\r
-\r
- data += parm_size;\r
- len += parm_size;\r
-\r
- val_size = (extinfo->bfAzPtWidth ? extinfo->bfAzPtWidth+1 : 0)\r
- + (extinfo->bfZePtWidth ? extinfo->bfZePtWidth+1 : 0)\r
- + (extinfo->bfAz3ddWidth ? extinfo->bfAz3ddWidth+1 : 0)\r
- + (extinfo->bfZe3ddWidth ? extinfo->bfZe3ddWidth+ 1: 0);\r
- if(val_size) {\r
- val = rte_cpu_to_be_32(*(uint32_t *)data);\r
- val >>= (32 - val_size);\r
-\r
- if(extinfo->bfZe3ddWidth) {\r
- extinfo->bfZe3dd = val & bitmask[extinfo->bfZe3ddWidth];\r
- val >>= (extinfo->bfZe3ddWidth + 1);\r
- }\r
- if(extinfo->bfAz3ddWidth) {\r
- extinfo->bfAz3dd = val & bitmask[extinfo->bfAz3ddWidth];\r
- val >>= (extinfo->bfAz3ddWidth + 1);\r
- }\r
- if(extinfo->bfZePtWidth) {\r
- extinfo->bfZePt = val & bitmask[extinfo->bfZePtWidth];\r
- val >>= (extinfo->bfZePtWidth + 1);\r
- }\r
- if(extinfo->bfAzPtWidth) {\r
- extinfo->bfAzPt = val & bitmask[extinfo->bfAzPtWidth];\r
- val >>= (extinfo->bfAzPtWidth + 1);\r
- }\r
- }\r
-\r
- parm_size = val_size/8;\r
- if(val_size%8) parm_size += 1;\r
-\r
- data += parm_size;\r
- len += parm_size;\r
-\r
- extinfo->bfAzSI = (*data >> 3) & 0x07;\r
- extinfo->bfZeSI = *data & 0x07;\r
-\r
- data++;\r
- len++;\r
-\r
- parm_size = len % XRAN_SECTIONEXT_ALIGN;\r
- if(parm_size)\r
- len += (XRAN_SECTIONEXT_ALIGN - parm_size);\r
-\r
- if(len != total_len) {\r
- print_err("The size of extension 2 is not correct! [%d:%d]", len, total_len);\r
- }\r
-\r
- return (total_len);\r
-\r
-}\r
-\r
-int xran_parse_section_ext4(void *ext,\r
- struct xran_sectionext4_info *extinfo)\r
-{\r
- int len;\r
- struct xran_cp_radioapp_section_ext4 *ext4;\r
- int total_len;\r
-\r
-\r
- ext4 = (struct xran_cp_radioapp_section_ext4 *)ext;\r
-\r
- *(uint32_t *)ext4 = rte_cpu_to_be_32(*(uint32_t *)ext4);\r
-\r
- len = 0;\r
- total_len = ext4->extLen * XRAN_SECTIONEXT_ALIGN; /* from word to byte */\r
-\r
- extinfo->modCompScaler = ext4->modCompScaler;\r
- extinfo->csf = ext4->csf;\r
-// extinfo->pad0;\r
-\r
- len += sizeof(struct xran_cp_radioapp_section_ext4);\r
- if(len != total_len) {\r
- print_err("The size of extension 4 is not correct! [%d:%d]", len, total_len);\r
- }\r
-\r
- return (total_len);\r
-}\r
-\r
-int xran_parse_section_ext5(void *ext,\r
- struct xran_sectionext5_info *extinfo)\r
-{\r
- int len;\r
- struct xran_cp_radioapp_section_ext_hdr *ext_hdr;\r
- struct xran_cp_radioapp_section_ext5 ext5;\r
- int parm_size;\r
- int total_len;\r
- uint8_t *data;\r
- uint16_t i;\r
-\r
-\r
- ext_hdr = (struct xran_cp_radioapp_section_ext_hdr *)ext;\r
- *(uint16_t *)ext_hdr = rte_cpu_to_be_16(*(uint16_t *)ext_hdr);\r
-\r
- total_len = ext_hdr->extLen * XRAN_SECTIONEXT_ALIGN; /* from word to byte */\r
-\r
- // one set has 3.5 bytes, so enforcing double to do integer calculation\r
- parm_size = ((total_len-sizeof(struct xran_cp_radioapp_section_ext_hdr))*2) / 7;\r
-\r
- if(parm_size > XRAN_MAX_MODCOMP_ADDPARMS) {\r
- print_err("Exceeds maximum number of parameters - %d", parm_size);\r
- parm_size = XRAN_MAX_MODCOMP_ADDPARMS;\r
- }\r
-\r
- len = 0;\r
- data = (uint8_t *)(ext_hdr + 1);\r
-\r
- i = 0;\r
- while(i < parm_size) {\r
- // For odd number set, more data can be copied\r
- *((uint64_t *)&ext5) = rte_cpu_to_be_64(*((uint64_t *)data));\r
-\r
- extinfo->mc[i].mcScaleOffset = ext5.mcScaleOffset1;\r
- extinfo->mc[i].csf = ext5.csf1;\r
- extinfo->mc[i].mcScaleReMask = ext5.mcScaleReMask1;\r
- i++;\r
-\r
- extinfo->mc[i].mcScaleOffset = ext5.mcScaleOffset2;\r
- extinfo->mc[i].csf = ext5.csf2;\r
- extinfo->mc[i].mcScaleReMask = ext5.mcScaleReMask2;\r
- i++;\r
-\r
- data += sizeof(struct xran_cp_radioapp_section_ext5);\r
- }\r
-\r
- // check the values of last set\r
- // due to alignment, it cannot be identified by the length that 3 or 4, 11 or 12 and etc\r
- // don't check mcScaleOffset might not be zero (some part is out of zero-padding)\r
- i--;\r
- if(i < XRAN_MAX_MODCOMP_ADDPARMS) {\r
- if(extinfo->mc[i].csf == 0 && extinfo->mc[i].mcScaleReMask == 0)\r
- extinfo->num_sets = i;\r
- else\r
- extinfo->num_sets = i+1;\r
- }else {\r
- print_err("Maximum total number %d is not correct!", i);\r
- }\r
-\r
- return (total_len);\r
-}\r
-\r
-int xran_parse_section_extension(struct rte_mbuf *mbuf,\r
- void *ext,\r
- struct xran_section_gen_info *section)\r
-{\r
- int total_len, len, numext;\r
- uint8_t *ptr;\r
- int flag_last;\r
- int ext_type;\r
- int i;\r
-\r
- total_len = 0;\r
- ptr = (uint8_t *)ext;\r
-\r
- numext = 0;\r
-\r
- flag_last = 1;\r
- i = 0;\r
- while(flag_last) {\r
- /* check ef */\r
- flag_last = (*ptr & 0x80);\r
-\r
- ext_type = *ptr & 0x7f;\r
- section->exData[numext].type = ext_type;\r
- switch(ext_type) {\r
- case XRAN_CP_SECTIONEXTCMD_1:\r
- section->exData[numext].data = §ion->m_ext1[numext];\r
- len = xran_parse_section_ext1(ptr, section->exData[numext].data);\r
- section->exData[numext].len = len;\r
- break;\r
- case XRAN_CP_SECTIONEXTCMD_2:\r
- section->exData[numext].data = §ion->m_ext2[numext];\r
- len = xran_parse_section_ext2(ptr, section->exData[numext].data);\r
- break;\r
- case XRAN_CP_SECTIONEXTCMD_4:\r
- section->exData[numext].data = §ion->m_ext4[numext];\r
- len = xran_parse_section_ext4(ptr, section->exData[numext].data);\r
- break;\r
- case XRAN_CP_SECTIONEXTCMD_5:\r
- section->exData[numext].data = §ion->m_ext5[numext];\r
- len = xran_parse_section_ext5(ptr, section->exData[numext].data);\r
- break;\r
-\r
- case XRAN_CP_SECTIONEXTCMD_0:\r
- case XRAN_CP_SECTIONEXTCMD_3:\r
- default:\r
- print_err("Extension %d is not supported!", ext_type);\r
- len = 0;\r
- }\r
-\r
- section->exData[numext].len = len;\r
- ptr += len; total_len += len;\r
-\r
- i++;\r
- if(++numext < XRAN_MAX_NUM_EXTENSIONS) continue;\r
-\r
- /* exceeds maximum number of extensions */\r
- break;\r
- }\r
-\r
- section->exDataSize = numext;\r
-\r
- return (total_len);\r
-\r
-}\r
-\r
-/**\r
- * @brief Parse a C-Plane packet (for RU emulation)\r
- * Transport layer fragmentation is not supported.\r
- *\r
- * @ingroup xran_cp_pkt\r
- *\r
- * @param mbuf\r
- * The pointer of the packet buffer to be parsed\r
- * @param params\r
- * The pointer of structure to store the information of parsed packet\r
- * @param eaxc\r
- * The pointer of sturcture to store the decomposed information of ecpriRtcid/ecpriPcid\r
- * @return\r
- * XRAN_STATUS_SUCCESS on success\r
- * XRAN_STATUS_INVALID_PACKET if failed to parse the packet\r
- */\r
-int xran_parse_cp_pkt(struct rte_mbuf *mbuf,\r
- struct xran_cp_gen_params *result,\r
- struct xran_recv_packet_info *pkt_info)\r
-{\r
- struct xran_ecpri_hdr *ecpri_hdr;\r
- struct xran_cp_radioapp_common_header *apphdr;\r
- int i, ret;\r
- int extlen;\r
-\r
-\r
- ret = xran_parse_ecpri_hdr(mbuf, &ecpri_hdr, pkt_info);\r
- if(ret < 0 && ecpri_hdr == NULL)\r
- return (XRAN_STATUS_INVALID_PACKET);\r
-\r
- /* Process radio header. */\r
- apphdr = (void *)rte_pktmbuf_adj(mbuf, sizeof(struct xran_ecpri_hdr));\r
- if(apphdr == NULL) {\r
- print_err("Invalid packet - radio app hedaer!");\r
- return (XRAN_STATUS_INVALID_PACKET);\r
- }\r
-\r
- *((uint32_t *)apphdr) = rte_cpu_to_be_32(*((uint32_t *)apphdr));\r
-\r
- if(apphdr->payloadVer != XRAN_PAYLOAD_VER) {\r
- print_err("Invalid Payload version - %d", apphdr->payloadVer);\r
- ret = XRAN_STATUS_INVALID_PACKET;\r
- }\r
-\r
- result->dir = apphdr->dataDirection;\r
- result->hdr.filterIdx = apphdr->filterIndex;\r
- result->hdr.frameId = apphdr->frameId;\r
- result->hdr.subframeId = apphdr->subframeId;\r
- result->hdr.slotId = apphdr->slotId;\r
- result->hdr.startSymId = apphdr->startSymbolId;\r
- result->sectionType = apphdr->sectionType;\r
- result->numSections = apphdr->numOfSections;\r
-\r
-#if 0\r
- printf("[CP%5d] eAxC[%d:%d:%02d:%02d] %s seq[%03d-%03d-%d] sec[%d-%d] frame[%3d-%2d-%2d] sym%02d\n",\r
- pkt_info->payload_len,\r
- pkt_info->eaxc.cuPortId, pkt_info->eaxc.bandSectorId,\r
- pkt_info->eaxc.ccId, pkt_info->eaxc.ruPortId,\r
- result->dir?"DL":"UL",\r
- pkt_info->seq_id, pkt_info->subseq_id, pkt_info->ebit,\r
- result->sectionType, result->numSections,\r
- result->hdr.frameId, result->hdr.subframeId, result->hdr.slotId,\r
- result->hdr.startSymId\r
- );\r
-#endif\r
-\r
- switch(apphdr->sectionType) {\r
- case XRAN_CP_SECTIONTYPE_0: // Unused RB or Symbols in DL or UL, not supportted\r
- {\r
- struct xran_cp_radioapp_section0_header *hdr;\r
- struct xran_cp_radioapp_section0 *section;\r
-\r
- hdr = (struct xran_cp_radioapp_section0_header*)apphdr;\r
-\r
- result->hdr.fftSize = rte_be_to_cpu_16(hdr->timeOffset);\r
- result->hdr.scs = hdr->frameStructure.fftSize;\r
- result->hdr.timeOffset = hdr->frameStructure.uScs;\r
- result->hdr.cpLength = rte_be_to_cpu_16(hdr->cpLength);\r
- //hdr->reserved; /* should be zero */\r
-\r
- section = (void *)rte_pktmbuf_adj(mbuf, sizeof(struct xran_cp_radioapp_section0_header));\r
- if(section == NULL) {\r
- print_err("Invalid packet 0 - radio app hedaer!");\r
- return (XRAN_STATUS_INVALID_PACKET);\r
- }\r
- for(i=0; i<result->numSections; i++) {\r
- *((uint64_t *)section) = rte_be_to_cpu_64(*((uint64_t *)section));\r
-\r
- result->sections[i].info.type = apphdr->sectionType;\r
- result->sections[i].info.id = section->hdr.sectionId;\r
- result->sections[i].info.rb = section->hdr.rb;\r
- result->sections[i].info.symInc = section->hdr.symInc;\r
- result->sections[i].info.startPrbc = section->hdr.startPrbc;\r
- result->sections[i].info.numPrbc = section->hdr.numPrbc,\r
- result->sections[i].info.numSymbol = section->hdr.u.s0.numSymbol;\r
- result->sections[i].info.reMask = section->hdr.u.s0.reMask;\r
- //section->hdr.u.s0.reserved; /* should be zero */\r
-\r
- section = (void *)rte_pktmbuf_adj(mbuf, sizeof(struct xran_cp_radioapp_section0));\r
- if(section == NULL) {\r
- print_err("Invalid packet 0 - number of section [%d:%d]!",\r
- result->numSections, i);\r
- result->numSections = i;\r
- ret = XRAN_STATUS_INVALID_PACKET;\r
- break;\r
- }\r
- }\r
- }\r
- break;\r
-\r
- case XRAN_CP_SECTIONTYPE_1: // Most DL/UL Radio Channels\r
- {\r
- struct xran_cp_radioapp_section1_header *hdr;\r
- struct xran_cp_radioapp_section1 *section;\r
-\r
- hdr = (struct xran_cp_radioapp_section1_header*)apphdr;\r
-\r
- result->hdr.iqWidth = hdr->udComp.udIqWidth;\r
- result->hdr.compMeth = hdr->udComp.udCompMeth;\r
-\r
- section = (void *)rte_pktmbuf_adj(mbuf, sizeof(struct xran_cp_radioapp_section1_header));\r
- if(section == NULL) {\r
- print_err("Invalid packet 1 - radio app hedaer!");\r
- return (XRAN_STATUS_INVALID_PACKET);\r
- }\r
-\r
- for(i=0; i<result->numSections; i++) {\r
- *((uint64_t *)section) = rte_be_to_cpu_64(*((uint64_t *)section));\r
-\r
- result->sections[i].info.type = apphdr->sectionType;\r
- result->sections[i].info.id = section->hdr.sectionId;\r
- result->sections[i].info.rb = section->hdr.rb;\r
- result->sections[i].info.symInc = section->hdr.symInc;\r
- result->sections[i].info.startPrbc = section->hdr.startPrbc;\r
- result->sections[i].info.numPrbc = section->hdr.numPrbc,\r
- result->sections[i].info.numSymbol = section->hdr.u.s1.numSymbol;\r
- result->sections[i].info.reMask = section->hdr.u.s1.reMask;\r
- result->sections[i].info.beamId = section->hdr.u.s1.beamId;\r
- result->sections[i].info.ef = section->hdr.u.s1.ef;\r
-\r
- section = (void *)rte_pktmbuf_adj(mbuf,\r
- sizeof(struct xran_cp_radioapp_section1));\r
- if(section == NULL) {\r
- print_err("Invalid packet 1 - number of section [%d:%d]!",\r
- result->numSections, i);\r
- result->numSections = i;\r
- ret = XRAN_STATUS_INVALID_PACKET;\r
- break;\r
- }\r
-\r
- if(result->sections[i].info.ef) {\r
- // parse section extension\r
- extlen = xran_parse_section_extension(mbuf, (void *)section, &result->sections[i]);\r
- if(extlen > 0) {\r
- section = (void *)rte_pktmbuf_adj(mbuf, extlen);\r
- if(section == NULL) {\r
- print_err("Invalid packet 1 - section extension [%d]!", i);\r
- ret = XRAN_STATUS_INVALID_PACKET;\r
- break;\r
- }\r
- }\r
- }\r
- else extlen = 0;\r
- }\r
- }\r
- break;\r
-\r
- case XRAN_CP_SECTIONTYPE_3: // PRACH and Mixed-numerology Channels\r
- {\r
- struct xran_cp_radioapp_section3_header *hdr;\r
- struct xran_cp_radioapp_section3 *section;\r
-\r
- hdr = (struct xran_cp_radioapp_section3_header*)apphdr;\r
-\r
- result->hdr.timeOffset = rte_be_to_cpu_16(hdr->timeOffset);\r
- result->hdr.scs = hdr->frameStructure.uScs;\r
- result->hdr.fftSize = hdr->frameStructure.fftSize;\r
- result->hdr.cpLength = rte_be_to_cpu_16(hdr->cpLength);\r
- result->hdr.iqWidth = hdr->udComp.udIqWidth;\r
- result->hdr.compMeth = hdr->udComp.udCompMeth;\r
-\r
- section = (void *)rte_pktmbuf_adj(mbuf, sizeof(struct xran_cp_radioapp_section3_header));\r
- if(section == NULL) {\r
- print_err("Invalid packet 3 - radio app hedaer!");\r
- return (XRAN_STATUS_INVALID_PACKET);\r
- }\r
-\r
- for(i=0; i<result->numSections; i++) {\r
- *((uint64_t *)section) = rte_be_to_cpu_64(*((uint64_t *)section));\r
-\r
- result->sections[i].info.type = apphdr->sectionType;\r
- result->sections[i].info.id = section->hdr.sectionId;\r
- result->sections[i].info.rb = section->hdr.rb;\r
- result->sections[i].info.symInc = section->hdr.symInc;\r
- result->sections[i].info.startPrbc = section->hdr.startPrbc;\r
- result->sections[i].info.numPrbc = section->hdr.numPrbc,\r
- result->sections[i].info.numSymbol = section->hdr.u.s3.numSymbol;\r
- result->sections[i].info.reMask = section->hdr.u.s3.reMask;\r
- result->sections[i].info.beamId = section->hdr.u.s3.beamId;\r
- result->sections[i].info.ef = section->hdr.u.s3.ef;\r
- result->sections[i].info.freqOffset = ((int32_t)rte_be_to_cpu_32(section->freqOffset))>>8;\r
-\r
- if(section->reserved) {\r
- print_err("Invalid packet 3 - section[%d:%d]", i, section->reserved);\r
- ret = XRAN_STATUS_INVALID_PACKET;\r
- }\r
-\r
- section = (void *)rte_pktmbuf_adj(mbuf, sizeof(struct xran_cp_radioapp_section3));\r
- if(section == NULL) {\r
- print_err("Invalid packet 3 - number of section [%d:%d]!",\r
- result->numSections, i);\r
- result->numSections = i;\r
- ret = XRAN_STATUS_INVALID_PACKET;\r
- break;\r
- }\r
-\r
- if(result->sections[i].info.ef) {\r
- // parse section extension\r
- extlen = xran_parse_section_extension(mbuf, (void *)section, &result->sections[i]);\r
- if(extlen > 0) {\r
- section = (void *)rte_pktmbuf_adj(mbuf, extlen);\r
- if(section == NULL) {\r
- print_err("Invalid packet 3 - section extension [%d]!", i);\r
- ret = XRAN_STATUS_INVALID_PACKET;\r
- break;\r
- }\r
- }\r
- }\r
- else extlen = 0;\r
- }\r
- }\r
- break;\r
-\r
- case XRAN_CP_SECTIONTYPE_5: // UE scheduling information, not supported\r
- case XRAN_CP_SECTIONTYPE_6: // Channel Information, not supported\r
- case XRAN_CP_SECTIONTYPE_7: // LAA, not supported\r
- default:\r
- ret = XRAN_STATUS_INVALID_PARAM;\r
- print_err("Non-supported Section Type - %d", apphdr->sectionType);\r
- }\r
-\r
-#if 0\r
- printf("[CP-%s] [%3d:%2d:%2d] section%d[%d] startSym=%d filterIdx=%X IQwidth=%d CompMeth=%d\n",\r
- result->dir?"DL":"UL",\r
- result->hdr.frameId, result->hdr.subframeId, result->hdr.slotId,\r
- result->sectionType, result->numSections,\r
- result->hdr.startSymId,\r
- result->hdr.filterIdx,\r
- result->hdr.iqWidth, result->hdr.compMeth);\r
-\r
- for(i=0; i<result->numSections; i++) {\r
- printf(" || %3d:%04X| rb=%d symInc=%d numSym=%d startPrbc=%02d numPrbc=%d reMask=%03X beamId=%04X freqOffset=%d ef=%d\n",\r
- i, result->sections[i].info.id,\r
- result->sections[i].info.rb,\r
- result->sections[i].info.symInc, result->sections[i].info.numSymbol,\r
- result->sections[i].info.startPrbc, result->sections[i].info.numPrbc,\r
- result->sections[i].info.reMask,\r
- result->sections[i].info.beamId,\r
- result->sections[i].info.freqOffset,\r
- result->sections[i].info.ef);\r
-\r
- if(result->sections[i].info.ef) {\r
- for(int j=0; j<result->sections[i].exDataSize; j++) {\r
- printf(" || %2d : type=%d len=%d\n",\r
- j, result->sections[i].exData[j].type, result->sections[i].exData[j].len);\r
- switch(result->sections[i].exData[j].type) {\r
- case XRAN_CP_SECTIONEXTCMD_1:\r
- {\r
- struct xran_sectionext1_info *ext1;\r
- ext1 = result->sections[i].exData[j].data;\r
- printf(" || bfwNumber=%d bfwiqWidth=%d bfwCompMeth=%d\n",\r
- ext1->bfwNumber, ext1->bfwiqWidth, ext1->bfwCompMeth);\r
- }\r
- break;\r
- case XRAN_CP_SECTIONEXTCMD_2:\r
- {\r
- struct xran_sectionext2_info *ext2;\r
- ext2 = result->sections[i].exData[j].data;\r
- printf(" || AzPt=%02x(%d) ZePt=%02x(%d) Az3dd=%02x(%d) Ze3dd=%02x(%d) AzSI=%02x ZeSI=%02x\n",\r
- ext2->bfAzPt, ext2->bfAzPtWidth,\r
- ext2->bfZePt, ext2->bfZePtWidth,\r
- ext2->bfAz3dd, ext2->bfAz3ddWidth,\r
- ext2->bfZe3dd, ext2->bfZe3ddWidth,\r
- ext2->bfAzSI, ext2->bfZeSI);\r
- }\r
- break;\r
- case XRAN_CP_SECTIONEXTCMD_4:\r
- {\r
- struct xran_sectionext4_info *ext4;\r
- ext4 = result->sections[i].exData[j].data;\r
- printf(" || csf=%d modCompScaler=%d\n",\r
- ext4->csf, ext4->modCompScaler);\r
- }\r
- break;\r
- case XRAN_CP_SECTIONEXTCMD_5:\r
- {\r
- struct xran_sectionext5_info *ext5;\r
- ext5 = result->sections[i].exData[j].data;\r
- printf(" || num_sets=%d\n", ext5->num_sets);\r
- for(int k=0; k<ext5->num_sets; k++) {\r
- printf(" || %d - csf=%d mcScaleReMask=%04x mcScaleOffset=%04x\n",\r
- k, ext5->mc[k].csf,\r
- ext5->mc[k].mcScaleReMask, ext5->mc[k].mcScaleOffset);\r
- }\r
- }\r
- break;\r
-\r
- case XRAN_CP_SECTIONEXTCMD_0:\r
- case XRAN_CP_SECTIONEXTCMD_3:\r
- default:\r
- printf("Invalid section extension type!\n");\r
- }\r
- }\r
- }\r
- }\r
-#endif\r
-\r
- return(ret);\r
-}\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief This file provides the API functions to build Control Plane Messages
+ * for XRAN Front Haul layer as defined in XRAN-FH.CUS.0-v02.01.
+ *
+ * @file xran_cp_api.c
+ * @ingroup group_lte_source_xran
+ * @author Intel Corporation
+ *
+ **/
+
+#include <rte_branch_prediction.h>
+
+#include "xran_common.h"
+#include "xran_transport.h"
+#include "xran_cp_api.h"
+#include "xran_printf.h"
+#include "xran_compression.h"
+
+
+/**
+ * This structure to store the section information of C-Plane
+ * in order to generate and parse corresponding U-Plane */
+struct xran_sectioninfo_db {
+ uint32_t cur_index; /**< Current index to store for this eAXC */
+ struct xran_section_info list[XRAN_MAX_NUM_SECTIONS]; /**< The array of section information */
+ };
+
+static struct xran_sectioninfo_db sectiondb[XRAN_MAX_SECTIONDB_CTX][XRAN_DIR_MAX][XRAN_COMPONENT_CARRIERS_MAX][XRAN_MAX_ANTENNA_NR*2 + XRAN_MAX_ANT_ARRAY_ELM_NR];
+
+static const uint8_t zeropad[XRAN_SECTIONEXT_ALIGN] = { 0, 0, 0, 0 };
+static const uint8_t bitmask[] = { 0x00, 0x03, 0x07, 0x0f, 0x1f, 0x3f, 0x7f, 0xff };
+
+
+/**
+ * @brief Initialize section database.
+ * Allocate required memory space to store section information.
+ * Each eAxC allocates dedicated storage and the entry size is the maximum number of sections.
+ * Total entry size : number of CC * number of antenna * max number of sections * 2(direction)
+ *
+ * @ingroup xran_cp_pkt
+ *
+ * @param pHandle
+ * handle for xRAN interface, currently not being used
+ * @return
+ * XRAN_STATUS_SUCCESS on success
+ * XRAN_STATUS_RESOURCE, if memory is not enough to allocate database area
+ */
+int xran_cp_init_sectiondb(void *pHandle)
+{
+ int ctx, dir, cc, ant;
+
+ for(ctx=0; ctx < XRAN_MAX_SECTIONDB_CTX; ctx++)
+ for(dir=0; dir < XRAN_DIR_MAX; dir++)
+ for(cc=0; cc < XRAN_COMPONENT_CARRIERS_MAX; cc++)
+ for(ant=0; ant < XRAN_MAX_ANTENNA_NR*2 + XRAN_MAX_ANT_ARRAY_ELM_NR; ant++)
+ sectiondb[ctx][dir][cc][ant].cur_index = 0;
+
+ return (XRAN_STATUS_SUCCESS);
+}
+
+/**
+ * @brief Release and free section database
+ *
+ * @ingroup xran_cp_pkt
+ *
+ * @param pHandle
+ * handle for xRAN interface, currently not being used
+ * @return
+ * XRAN_STATUS_SUCCESS on success
+ */
+int xran_cp_free_sectiondb(void *pHandle)
+{
+ return (XRAN_STATUS_SUCCESS);
+}
+
+static inline struct xran_sectioninfo_db *xran_get_section_db(void *pHandle,
+ uint8_t dir, uint8_t cc_id, uint8_t ruport_id, uint8_t ctx_id)
+{
+ struct xran_sectioninfo_db *ptr;
+
+
+ if(unlikely(ctx_id >= XRAN_MAX_SECTIONDB_CTX)) {
+ print_err("Invalid Context id - %d", ctx_id);
+ return (NULL);
+ }
+
+ if(unlikely(dir >= XRAN_DIR_MAX)) {
+ print_err("Invalid direction - %d", dir);
+ return (NULL);
+ }
+
+ if(unlikely(cc_id >= XRAN_COMPONENT_CARRIERS_MAX)) {
+ print_err("Invalid CC id - %d", cc_id);
+ return (NULL);
+ }
+
+ if(unlikely(ruport_id >= XRAN_MAX_ANTENNA_NR*2 + XRAN_MAX_ANT_ARRAY_ELM_NR)) {
+ print_err("Invalid eAxC id - %d", ruport_id);
+ return (NULL);
+ }
+
+ ptr = §iondb[ctx_id][dir][cc_id][ruport_id];
+
+ return(ptr);
+}
+
+static inline struct xran_section_info *xran_get_section_info(struct xran_sectioninfo_db *ptr, uint16_t index)
+{
+ if(unlikely(ptr == NULL))
+ return (NULL);
+
+ if(unlikely(index > XRAN_MAX_NUM_SECTIONS)) {
+ print_err("Index is out of range - %d", index);
+ return (NULL);
+ }
+
+ return(&(ptr->list[index]));
+}
+
+/**
+ * @brief Add a section information of C-Plane to dabase.
+ *
+ * @ingroup xran_cp_pkt
+ *
+ * @param pHandle
+ * handle for xRAN interface, currently not being used
+ * @param dir
+ * Direction of C-Plane message for the section to store
+ * @param cc_id
+ * CC ID of C-Plane message for the section to store
+ * @param ruport_id
+ * RU port ID of C-Plane message for the section to store
+ * @param ctx_id
+ * Context index for the section database
+ * @param info
+ * The information of this section to store
+ * @return
+ * XRAN_STATUS_SUCCESS on success
+ * XRAN_STATUS_INVALID_PARAM, if direction, CC ID or RU port ID is incorrect
+ * XRAN_STATUS_RESOURCE, if no more space to add on database
+ */
+int xran_cp_add_section_info(void *pHandle,
+ uint8_t dir, uint8_t cc_id, uint8_t ruport_id, uint8_t ctx_id,
+ struct xran_section_info *info)
+{
+ struct xran_sectioninfo_db *ptr;
+ struct xran_section_info *list;
+
+
+ ptr = xran_get_section_db(pHandle, dir, cc_id, ruport_id, ctx_id);
+ if(unlikely(ptr == NULL)) {
+ return (XRAN_STATUS_INVALID_PARAM);
+ }
+
+ if(unlikely(ptr->cur_index >= XRAN_MAX_NUM_SECTIONS)) {
+ print_err("No more space to add section information!");
+ return (XRAN_STATUS_RESOURCE);
+ }
+
+ list = xran_get_section_info(ptr, ptr->cur_index);
+
+ rte_memcpy(list, info, sizeof(struct xran_section_info));
+
+ ptr->cur_index++;
+
+ return (XRAN_STATUS_SUCCESS);
+}
+
+int xran_cp_add_multisection_info(void *pHandle,
+ uint8_t cc_id, uint8_t ruport_id, uint8_t ctx_id,
+ struct xran_cp_gen_params *gen_info)
+{
+ int i;
+ uint8_t dir, num_sections;
+ struct xran_sectioninfo_db *ptr;
+ struct xran_section_info *list;
+
+
+ dir = gen_info->dir;
+ num_sections = gen_info->numSections;
+
+ ptr = xran_get_section_db(pHandle, dir, cc_id, ruport_id, ctx_id);
+ if(unlikely(ptr == NULL)) {
+ return (XRAN_STATUS_INVALID_PARAM);
+ }
+
+ if(unlikely(ptr->cur_index+num_sections >= XRAN_MAX_NUM_SECTIONS)) {
+ print_err("No more space to add section information!");
+ return (XRAN_STATUS_RESOURCE);
+ }
+
+ list = xran_get_section_info(ptr, ptr->cur_index);
+
+ for(i=0; i<num_sections; i++) {
+ rte_memcpy(&list[i], &gen_info->sections[i].info, sizeof(struct xran_section_info));
+ ptr->cur_index++;
+ }
+
+ return (XRAN_STATUS_SUCCESS);
+}
+
+/**
+ * @brief Find a section information of C-Plane from dabase
+ * by given information
+ *
+ * @ingroup xran_cp_pkt
+ *
+ * @param pHandle
+ * handle for xRAN interface, currently not being used
+ * @param dir
+ * The direction of the section to find
+ * @param cc_id
+ * The CC ID of the section to find
+ * @param ruport_id
+ * RU port ID of the section to find
+ * @param ctx_id
+ * Context index for the section database
+ * @param section_id
+ * The ID of section to find
+ * @return
+ * The pointer of section information if matched section is found
+ * NULL if failed to find matched section
+ */
+struct xran_section_info *xran_cp_find_section_info(void *pHandle,
+ uint8_t dir, uint8_t cc_id, uint8_t ruport_id,
+ uint8_t ctx_id, uint16_t section_id)
+{
+ int index, num_index;
+ struct xran_sectioninfo_db *ptr;
+
+
+ ptr = xran_get_section_db(pHandle, dir, cc_id, ruport_id, ctx_id);
+ if(unlikely(ptr == NULL))
+ return (NULL);
+
+ if(ptr->cur_index > XRAN_MAX_NUM_SECTIONS)
+ num_index = XRAN_MAX_NUM_SECTIONS;
+ else
+ num_index = ptr->cur_index;
+
+ for(index=0; index < num_index; index++) {
+ if(ptr->list[index].id == section_id) {
+ return (xran_get_section_info(ptr, index));
+ }
+ }
+
+ print_dbg("No section ID in the list - %d", section_id);
+ return (NULL);
+}
+
+/**
+ * @brief Iterate each section information of C-Plane
+ * from the database of eAxC by given information
+ *
+ * @ingroup xran_cp_pkt
+ *
+ * @param pHandle
+ * handle for xRAN interface, currently not being used
+ * @param dir
+ * The direction of the section to find
+ * @param cc_id
+ * The CC ID of the section to find
+ * @param ruport_id
+ * RU port ID of the section to find
+ * @param ctx_id
+ * Context index for the section database
+ * @param next
+ * The pointer to store the position of next entry
+ * @return
+ * The pointer of section information in the list
+ * NULL if reached at the end of the list
+ */
+struct xran_section_info *xran_cp_iterate_section_info(void *pHandle,
+ uint8_t dir, uint8_t cc_id, uint8_t ruport_id,
+ uint8_t ctx_id, uint32_t *next)
+{
+ int index;
+ struct xran_sectioninfo_db *ptr;
+
+
+ ptr = xran_get_section_db(pHandle, dir, cc_id, ruport_id, ctx_id);
+ if(unlikely(ptr == NULL))
+ return (NULL);
+
+ index = *next;
+ if(*next < ptr->cur_index) {
+ (*next)++;
+ return (xran_get_section_info(ptr, index));
+ }
+ else {
+ print_dbg("No more sections in the list");
+ return (NULL);
+ }
+}
+
+/**
+ * @brief Get the size of stored entries
+ * for the database of eAxC by given information
+ *
+ * @ingroup xran_cp_pkt
+ *
+ * @param pHandle
+ * handle for xRAN interface, currently not being used
+ * @param dir
+ * The direction of the section to find
+ * @param cc_id
+ * The CC ID of the section to find
+ * @param ruport_id
+ * RU port ID of the section to find
+ * @param ctx_id
+ * Context index for the section database
+ * @return
+ * The size of stored entries
+ * -1 if failed to find matched database
+ */
+int32_t xran_cp_getsize_section_info(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ruport_id, uint8_t ctx_id)
+{
+ int index;
+ struct xran_sectioninfo_db *ptr;
+
+
+ ptr = xran_get_section_db(pHandle, dir, cc_id, ruport_id, ctx_id);
+ if(unlikely(ptr == NULL))
+ return (-1);
+
+ return (ptr->cur_index);
+}
+
+/**
+ * @brief Reset a database of eAxC by given information
+ *
+ * @ingroup xran_cp_pkt
+ *
+ * @param pHandle
+ * handle for xRAN interface, currently not being used
+ * @param dir
+ * The direction of the section to find
+ * @param cc_id
+ * The CC ID of the section to find
+ * @param ruport_id
+ * RU port ID of the section to find
+ * @param ctx_id
+ * Context index for the section database
+ * @return
+ * XRAN_STATUS_SUCCESS on success
+ * XRAN_STATUS_INVALID_PARM if failed to find matched database
+ */
+int xran_cp_reset_section_info(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ruport_id, uint8_t ctx_id)
+{
+ struct xran_sectioninfo_db *ptr;
+
+ ptr = xran_get_section_db(pHandle, dir, cc_id, ruport_id, ctx_id);
+ if(unlikely(ptr == NULL)) {
+ return (XRAN_STATUS_INVALID_PARAM);
+ }
+
+ ptr->cur_index = 0;
+
+ return (XRAN_STATUS_SUCCESS);
+}
+
+
+int xran_dump_sectiondb(void)
+{
+ // TODO:
+ return (0);
+}
+
+int32_t xran_cp_populate_section_ext_1(int8_t *p_ext1_dst, /**< destination buffer */
+ uint16_t ext1_dst_len, /**< dest buffer size */
+ int16_t *p_bfw_iq_src, /**< source buffer of IQs */
+ uint16_t rbNum, /* number RBs to ext1 chain */
+ uint16_t bfwNumPerRb, /* number of bf weights per RB (i.e. antenna elements) */
+ uint8_t bfwiqWidth, /* bit size of IQs */
+ uint8_t bfwCompMeth) /* compression method */
+{
+ struct xran_cp_radioapp_section_ext1 *p_ext1;
+
+ uint8_t *p_bfw_content = NULL;
+ int32_t parm_size = 0;
+ int32_t bfw_iq_bits = 0;
+ int32_t total_len = 0;
+ int32_t comp_len = 0;
+ uint8_t ext_flag = XRAN_EF_F_ANOTHER_ONE;
+ int16_t idxRb = 0;
+ int16_t cur_ext_len = 0;
+ int8_t *p_ext1_dst_cur = NULL;
+
+ struct xranlib_compress_request bfp_com_req;
+ struct xranlib_compress_response bfp_com_rsp;
+
+ memset(&bfp_com_req, 0, sizeof(struct xranlib_compress_request));
+ memset(&bfp_com_rsp, 0, sizeof(struct xranlib_compress_response));
+
+ print_dbg("%s comp %d\n", __FUNCTION__, bfwCompMeth);
+ print_dbg("bfwNumPerRb %d bfwiqWidth %d\n", bfwNumPerRb, bfwiqWidth);
+
+ if(p_ext1_dst)
+ p_ext1_dst_cur = p_ext1_dst;
+ else
+ return (XRAN_STATUS_INVALID_PARAM);
+
+ /* create extType=1 section for each RB */
+ for (idxRb = 0; idxRb < rbNum; idxRb++) {
+ print_dbg("%s RB %d\n", __FUNCTION__, idxRb);
+
+ if(total_len >= ext1_dst_len){
+ print_err("p_ext1_dst overflow\n");
+ return -1;
+ }
+
+ cur_ext_len = 0; /** populate one extType=1 section with BFW for 1 RB */
+ parm_size = sizeof(struct xran_cp_radioapp_section_ext1);
+ p_ext1 = (struct xran_cp_radioapp_section_ext1 *)p_ext1_dst_cur;
+ if(p_ext1 == NULL) {
+ print_err("p_ext1 is null!\n");
+ return (XRAN_STATUS_INVALID_PARAM);
+ }
+
+ cur_ext_len += parm_size;
+
+ if(idxRb+1 == rbNum)
+ ext_flag = XRAN_EF_F_LAST;
+
+ p_ext1->extType = XRAN_CP_SECTIONEXTCMD_1;
+ p_ext1->ef = ext_flag;
+ p_ext1->bfwCompMeth = bfwCompMeth;
+ p_ext1->bfwIqWidth = XRAN_CONVERT_BFWIQWIDTH(bfwiqWidth);
+
+ switch(bfwCompMeth) {
+ case XRAN_BFWCOMPMETHOD_BLKFLOAT:
+ p_bfw_content = (uint8_t *)(p_ext1+1);
+ if(p_bfw_content == NULL) {
+ print_err("Fail to allocate the space for section extension 1");
+ return (XRAN_STATUS_RESOURCE);
+ }
+ bfp_com_req.data_in = (int16_t*)p_bfw_iq_src;
+ bfp_com_req.len = bfwNumPerRb*4;
+ bfp_com_req.compMethod = p_ext1->bfwCompMeth;
+ bfp_com_req.iqWidth = p_ext1->bfwIqWidth;
+
+ print_dbg("req 0x%08p iqWidth %d\n",bfp_com_req.data_in, bfp_com_req.iqWidth);
+
+ parm_size = 1; /* exponent as part of bfwCompParam 1 octet */
+ break;
+ case XRAN_BFWCOMPMETHOD_BLKSCALE:
+ rte_panic("XRAN_BFWCOMPMETHOD_BLKSCALE");
+ break;
+
+ case XRAN_BFWCOMPMETHOD_ULAW:
+ rte_panic("XRAN_BFWCOMPMETHOD_BLKSCALE");
+ break;
+
+ case XRAN_BFWCOMPMETHOD_BEAMSPACE:
+ rte_panic("XRAN_BFWCOMPMETHOD_BLKSCALE");
+ break;
+
+ case XRAN_BFWCOMPMETHOD_NONE:
+ default:
+ p_bfw_content = (uint8_t *)(p_ext1+1);
+ /* bfwCompParam is absent for no compression case */
+ parm_size = 0;
+ }
+
+ if(p_bfw_content == NULL) {
+ print_err("Fail to allocate the space for section extension 1");
+ return (XRAN_STATUS_RESOURCE);
+ }
+
+ bfw_iq_bits = bfwNumPerRb* bfwiqWidth * 2;
+
+ parm_size += bfw_iq_bits>>3;
+ if(bfw_iq_bits%8)
+ parm_size++;
+
+ print_dbg("copy BF W %p -> %p size %d \n", p_bfw_iq_src, p_bfw_content, parm_size);
+ if (p_ext1->bfwIqWidth == 0 || p_ext1->bfwIqWidth == 16){
+ rte_memcpy(p_bfw_content, p_bfw_iq_src, parm_size);
+ } else {
+ bfp_com_rsp.data_out = (int8_t*)p_bfw_content;
+ if(xranlib_compress_avx512_bfw(&bfp_com_req, &bfp_com_rsp) == 0){
+ comp_len = bfp_com_rsp.len;
+ print_dbg("comp_len %d\n", comp_len);
+ } else {
+ print_err("compression failed\n");
+ return (XRAN_STATUS_FAIL);
+ }
+ }
+
+ p_bfw_content = (uint8_t *)(p_bfw_content + parm_size);
+
+ cur_ext_len += parm_size;
+ parm_size = cur_ext_len % XRAN_SECTIONEXT_ALIGN;
+ if(parm_size) {
+ parm_size = XRAN_SECTIONEXT_ALIGN - parm_size;
+ p_bfw_content = (uint8_t *)(p_bfw_content + parm_size);
+ rte_memcpy(p_bfw_content, zeropad, parm_size);
+ cur_ext_len += parm_size;
+ print_dbg("zeropad %d cur_ext_len %d\n", parm_size, cur_ext_len);
+ }
+
+ if(cur_ext_len % XRAN_SECTIONEXT_ALIGN)
+ rte_panic("ext1 should be aligned on 4-bytes boundary");
+
+ p_ext1->extLen = cur_ext_len / XRAN_SECTIONEXT_ALIGN;
+ print_dbg("p_ext1->extLen %d\n", p_ext1->extLen);
+
+ /* update for next RB */
+ p_ext1_dst_cur += cur_ext_len;
+ p_bfw_iq_src = p_bfw_iq_src + bfwNumPerRb*2;
+
+ total_len += cur_ext_len;
+ }
+
+ print_dbg("total_len %d\n", total_len);
+ return (total_len);
+}
+
+
+// Cyclic Prefix Length 5.4.4.14
+// CP_length = cpLength * Ts, Ts = 1/30.72MHz
+// i.e cpLength = CP_length / Ts ?
+#define CPLEN_TS (30720000)
+inline uint16_t xran_get_cplength(int CP_length)
+{
+ return (CP_length);
+}
+
+// Frequency offset 5.4.5.11
+// frequency_offset = freqOffset * SCS * 0.5
+// i.e freqOffset = (frequency_offset *2 )/ SCS ?
+inline int32_t xran_get_freqoffset(int32_t freqOffset, int32_t scs)
+{
+ return (freqOffset);
+}
+
+static int xran_copy_sectionext_1(struct rte_mbuf *mbuf,
+ struct xran_sectionext1_info *params, int last_flag)
+{
+ int32_t total_len;
+ int8_t *p_dst = (int8_t *)rte_pktmbuf_append(mbuf, params->bfwIQ_sz);
+ if(p_dst == NULL) {
+ print_err("Fail to allocate the space for section extension 1 [%d]", params->bfwIQ_sz);
+ return (XRAN_STATUS_RESOURCE);
+ }
+ if(params->p_bfwIQ){
+ /* copy formated extType1 with all the headers */
+ rte_memcpy(p_dst, params->p_bfwIQ, params->bfwIQ_sz);
+ total_len = params->bfwIQ_sz;
+ }
+ else
+ total_len = 0;
+
+
+ return (total_len);
+}
+
+
+static int xran_prepare_sectionext_1(struct rte_mbuf *mbuf,
+ struct xran_sectionext1_info *params, int last_flag)
+{
+ struct xran_cp_radioapp_section_ext1 *ext1;
+ uint8_t *data;
+ int parm_size, iq_size;
+ int total_len;
+
+ total_len = 0;
+
+ print_dbg("%s %d\n", __FUNCTION__, last_flag);
+
+ parm_size = sizeof(struct xran_cp_radioapp_section_ext1);
+ ext1 = (struct xran_cp_radioapp_section_ext1 *)rte_pktmbuf_append(mbuf, parm_size);
+ if(ext1 == NULL) {
+ print_err("Fail to allocate the space for section extension 1 [%d]", parm_size);
+ return (XRAN_STATUS_RESOURCE);
+ }
+
+ total_len += parm_size;
+
+ ext1->extType = XRAN_CP_SECTIONEXTCMD_1;
+ ext1->ef = last_flag;
+ ext1->bfwCompMeth = params->bfwCompMeth;
+ ext1->bfwIqWidth = XRAN_CONVERT_BFWIQWIDTH(params->bfwiqWidth);
+
+ switch(params->bfwCompMeth) {
+ case XRAN_BFWCOMPMETHOD_BLKFLOAT:
+ parm_size = 1;
+ data = (uint8_t *)rte_pktmbuf_append(mbuf, parm_size);
+ if(data == NULL) {
+ print_err("Fail to allocate the space for section extension 1 [%d]", parm_size);
+ return (XRAN_STATUS_RESOURCE);
+ }
+ total_len += parm_size;
+ *data = (params->bfwCompParam.exponent & 0x0f);
+ break;
+
+ case XRAN_BFWCOMPMETHOD_BLKSCALE:
+ parm_size = 1;
+ data = (uint8_t *)rte_pktmbuf_append(mbuf, parm_size);
+ if(data == NULL) {
+ print_err("Fail to allocate the space for section extension 1 [%d]", parm_size);
+ return (XRAN_STATUS_RESOURCE);
+ }
+ total_len += parm_size;
+ *data = params->bfwCompParam.blockScaler;
+ break;
+
+ case XRAN_BFWCOMPMETHOD_ULAW:
+ parm_size = 1;
+ data = (uint8_t *)rte_pktmbuf_append(mbuf, parm_size);
+ if(data == NULL) {
+ print_err("Fail to allocate the space for section extension 1 [%d]", parm_size);
+ return (XRAN_STATUS_RESOURCE);
+ }
+ total_len += parm_size;
+ *data = params->bfwCompParam.compBitWidthShift;
+ break;
+
+ case XRAN_BFWCOMPMETHOD_BEAMSPACE:
+ parm_size = params->bfwNumber>>3;
+ if(params->bfwNumber%8) parm_size++;
+ parm_size *= 8;
+ data = (uint8_t *)rte_pktmbuf_append(mbuf, parm_size);
+ if(data == NULL) {
+ print_err("Fail to allocate the space for section extension 1 [%d]", parm_size);
+ return (XRAN_STATUS_RESOURCE);
+ }
+ rte_memcpy(data, params->bfwCompParam.activeBeamspaceCoeffMask, parm_size);
+ total_len += parm_size;
+ break;
+
+ case XRAN_BFWCOMPMETHOD_NONE:
+ default:
+ parm_size = 0;
+ }
+
+ print_dbg("params->bfwNumber %d params->bfwiqWidth %d\n", params->bfwNumber, params->bfwiqWidth);
+
+ iq_size = params->bfwNumber * params->bfwiqWidth * 2;
+
+ parm_size = iq_size>>3;
+ if(iq_size%8)
+ parm_size++;
+
+ data = (uint8_t *)rte_pktmbuf_append(mbuf, parm_size);
+ if(data == NULL) {
+ print_err("Fail to allocate the space for section extension 1 BF W iq_size: [%d]", parm_size);
+ return (XRAN_STATUS_RESOURCE);
+ }
+ rte_memcpy(data, params->p_bfwIQ, parm_size);
+
+ total_len += parm_size;
+ parm_size = total_len % XRAN_SECTIONEXT_ALIGN;
+ if(parm_size) {
+ parm_size = XRAN_SECTIONEXT_ALIGN - parm_size;
+ data = (uint8_t *)rte_pktmbuf_append(mbuf, parm_size);
+ if(data == NULL) {
+ print_err("Fail to allocate the space for section extension 1 [%d]", parm_size);
+ return (XRAN_STATUS_RESOURCE);
+ }
+ rte_memcpy(data, zeropad, parm_size);
+ total_len += parm_size;
+ }
+
+ ext1->extLen = total_len / XRAN_SECTIONEXT_ALIGN;
+
+ return (total_len);
+}
+
+static int xran_prepare_sectionext_2(struct rte_mbuf *mbuf,
+ struct xran_sectionext2_info *params, int last_flag)
+{
+ struct xran_cp_radioapp_section_ext2 *ext2;
+ uint8_t *data;
+ int total_len;
+ int parm_size;
+ uint32_t val, shift_val;
+ int val_size, pad_size;
+
+
+ total_len = 0;
+
+ parm_size = sizeof(struct xran_cp_radioapp_section_ext2);
+ ext2 = (struct xran_cp_radioapp_section_ext2 *)rte_pktmbuf_append(mbuf, parm_size);
+ if(ext2 == NULL) {
+ print_err("Fail to allocate the space for section extension 2");
+ return (XRAN_STATUS_RESOURCE);
+ }
+ total_len += parm_size;
+
+ ext2->extType = XRAN_CP_SECTIONEXTCMD_2;
+ ext2->ef = last_flag;
+ ext2->bfZe3ddWidth = params->bfZe3ddWidth;
+ ext2->bfAz3ddWidth = params->bfAz3ddWidth;
+ ext2->bfZePtWidth = params->bfZePtWidth;
+ ext2->bfAzPtWidth = params->bfAzPtWidth;
+ ext2->bfaCompResv0 = 0;
+ ext2->bfaCompResv1 = 0;
+
+ val = 0;
+ shift_val = 0;
+ if(params->bfAzPtWidth) {
+ val += params->bfAzPt & bitmask[params->bfAzPtWidth];
+ shift_val += 8 - (params->bfAzPtWidth+1);
+ }
+ else
+ shift_val += 8;
+
+ if(params->bfZePtWidth) {
+ val = val << (params->bfZePtWidth+1);
+ val += params->bfZePt & bitmask[params->bfZePtWidth];
+ shift_val += 8 - (params->bfZePtWidth+1);
+ }
+ else
+ shift_val += 8;
+
+ if(params->bfAz3ddWidth) {
+ val = val << (params->bfAz3ddWidth+1);
+ val += params->bfAz3dd & bitmask[params->bfAz3ddWidth];
+ shift_val += 8 - (params->bfAz3ddWidth+1);
+ }
+ else
+ shift_val += 8;
+
+ if(params->bfZe3ddWidth) {
+ val = val << (params->bfZe3ddWidth+1);
+ val += params->bfZe3dd & bitmask[params->bfZe3ddWidth];
+ shift_val += 8 - (params->bfZe3ddWidth+1);
+ }
+ else
+ shift_val += 8;
+
+ if(val) {
+ val = val << shift_val;
+ val = rte_cpu_to_be_32(val);
+ }
+
+ val_size = 4 - (shift_val/8); /* ceil(total bit/8) */
+ parm_size = val_size + 1; /* additional 1 byte for bfxxSI */
+
+ // alignment
+ total_len += parm_size;
+ pad_size = total_len % XRAN_SECTIONEXT_ALIGN;
+ if(pad_size) {
+ pad_size = XRAN_SECTIONEXT_ALIGN - pad_size;
+ parm_size += pad_size;
+ total_len += pad_size;
+ }
+
+ data = (uint8_t *)rte_pktmbuf_append(mbuf, parm_size);
+ if(data == NULL) {
+ print_err("Fail to allocate the space for section extension 2");
+ return (XRAN_STATUS_RESOURCE);
+ }
+
+ rte_memcpy(data, &val, val_size);
+ data += val_size;
+ *data = ((params->bfAzSI) << 3) + (params->bfZeSI);
+ data++;
+ rte_memcpy(data, zeropad, pad_size);
+
+ ext2->extLen = total_len / XRAN_SECTIONEXT_ALIGN;
+ *(uint32_t *)ext2 = rte_cpu_to_be_32(*(uint32_t *)ext2);
+
+ return (total_len);
+}
+
+static int xran_prepare_sectionext_4(struct rte_mbuf *mbuf,
+ struct xran_sectionext4_info *params, int last_flag)
+{
+ struct xran_cp_radioapp_section_ext4 *ext4;
+ int parm_size;
+ int total_len;
+ int ret;
+
+
+ total_len = 0;
+
+ parm_size = sizeof(struct xran_cp_radioapp_section_ext4);
+ ext4 = (struct xran_cp_radioapp_section_ext4 *)rte_pktmbuf_append(mbuf, parm_size);
+ if(ext4 == NULL) {
+ print_err("Fail to allocate the space for section extension 4");
+ return(XRAN_STATUS_RESOURCE);
+ }
+ else {
+ total_len += parm_size;
+
+ ext4->extType = XRAN_CP_SECTIONEXTCMD_4;
+ ext4->ef = last_flag;
+ ext4->modCompScaler = params->modCompScaler;
+ ext4->csf = params->csf?1:0;
+ ext4->extLen = total_len / XRAN_SECTIONEXT_ALIGN;
+
+ *(uint32_t *)ext4 = rte_cpu_to_be_32(*(uint32_t*)ext4);
+ }
+
+ return (total_len);
+}
+
+static int xran_prepare_sectionext_5(struct rte_mbuf *mbuf,
+ struct xran_sectionext5_info *params, int last_flag)
+{
+ struct xran_cp_radioapp_section_ext_hdr *ext_hdr;
+ struct xran_cp_radioapp_section_ext5 ext5;
+ int padding;
+ int total_len;
+ uint8_t *data;
+ int i;
+
+
+ if(params->num_sets > XRAN_MAX_MODCOMP_ADDPARMS) {
+ print_err("Exceeds maximum number of parameters(%d). Skipping.", params->num_sets);
+ return (0);
+ }
+
+ total_len = sizeof(struct xran_cp_radioapp_section_ext_hdr)
+ + (sizeof(struct xran_cp_radioapp_section_ext5)*params->num_sets)/2
+ - (params->num_sets>>1); // 8bits are added by every two sets, so needs to adjust
+
+ /* for alignment */
+ padding = total_len % XRAN_SECTIONEXT_ALIGN;
+ if(padding) {
+ padding = XRAN_SECTIONEXT_ALIGN - padding;
+ total_len += padding;
+ }
+
+ ext_hdr = (struct xran_cp_radioapp_section_ext_hdr *)rte_pktmbuf_append(mbuf, total_len);
+ if(ext_hdr == NULL) {
+ print_err("Fail to allocate the space for section extension 5");
+ return (XRAN_STATUS_RESOURCE);
+ }
+
+ ext_hdr->extType = XRAN_CP_SECTIONEXTCMD_5;
+ ext_hdr->ef = last_flag;
+ ext_hdr->extLen = total_len / XRAN_SECTIONEXT_ALIGN;
+
+ *(uint16_t *)ext_hdr = rte_cpu_to_be_16(*((uint16_t *)ext_hdr));
+
+ data = (uint8_t *)(ext_hdr + 1);
+ i = 0;
+ while(i < params->num_sets) {
+ if(i%2) { // odd index
+ ext5.mcScaleOffset2 = params->mc[i].mcScaleOffset;
+ ext5.csf2 = params->mc[i].csf;
+ ext5.mcScaleReMask2 = params->mc[i].mcScaleReMask;
+ ext5.reserved0 = 0;
+ i++;
+
+ // adding two sets at once (due to the definition of structure)
+ *((uint64_t *)&ext5) = rte_cpu_to_be_64(*((uint64_t *)&ext5));
+ rte_memcpy(data, &ext5, sizeof(struct xran_cp_radioapp_section_ext5));
+ data += sizeof(struct xran_cp_radioapp_section_ext5);
+ }
+ else { // even index
+ ext5.mcScaleOffset1 = params->mc[i].mcScaleOffset;
+ ext5.csf1 = params->mc[i].csf;
+ ext5.mcScaleReMask1 = params->mc[i].mcScaleReMask;
+ ext5.mcScaleReMask2 = 0;
+ i++;
+
+ if(i == params->num_sets) { // adding last even index
+ *((uint64_t *)&ext5) = rte_cpu_to_be_64(*((uint64_t *)&ext5));
+ rte_memcpy(data, &ext5, sizeof(struct xran_cp_radioapp_section_ext5)/2);
+ data += sizeof(struct xran_cp_radioapp_section_ext5)/2;
+ break;
+ }
+ }
+ }
+
+ /* zero padding */
+ if(padding)
+ rte_memcpy(data, zeropad, padding);
+
+ return (total_len);
+}
+
+/**
+ * @brief add section extension to C-Plane packet
+ *
+ * @param mbuf
+ * A pointer to the packet buffer
+ * @param params
+ * A porinter to the information to generate a C-Plane packet
+ * @return
+ * XRAN_STATUS_SUCCESS on success
+ * XRAN_STATUS_INVALID_PARM
+ * XRAN_STATUS_RESOURCE if failed to allocate the space to packet buffer
+ */
+int xran_append_section_extensions(struct rte_mbuf *mbuf, struct xran_section_gen_info *params)
+{
+ int i, ret;
+ uint32_t totalen;
+ int last_flag;
+ int ext_size;
+
+ if(unlikely(params->exDataSize > XRAN_MAX_NUM_EXTENSIONS)) {
+ print_err("Invalid total number of extensions - %d", params->exDataSize);
+ return (XRAN_STATUS_INVALID_PARAM);
+ }
+
+ totalen = 0;
+
+ ret = XRAN_STATUS_SUCCESS;
+
+ print_dbg("params->exDataSize %d\n", params->exDataSize);
+ for(i=0; i < params->exDataSize; i++) {
+ if(params->exData[i].data == NULL) {
+ print_err("Invalid parameter - extension data %d is NULL", i);
+ ret = XRAN_STATUS_INVALID_PARAM;
+ continue;
+ }
+
+ last_flag = (params->exDataSize == (i+1))?0:1;
+
+ switch(params->exData[i].type) {
+ case XRAN_CP_SECTIONEXTCMD_1:
+ ext_size = xran_copy_sectionext_1(mbuf, params->exData[i].data, last_flag);
+ //xran_prepare_sectionext_1(mbuf, params->exData[i].data, last_flag);
+ break;
+ case XRAN_CP_SECTIONEXTCMD_2:
+ ext_size = xran_prepare_sectionext_2(mbuf, params->exData[i].data, last_flag);
+ break;
+ case XRAN_CP_SECTIONEXTCMD_4:
+ ext_size = xran_prepare_sectionext_4(mbuf, params->exData[i].data, last_flag);
+ break;
+ case XRAN_CP_SECTIONEXTCMD_5:
+ ext_size = xran_prepare_sectionext_5(mbuf, params->exData[i].data, last_flag);
+ break;
+ case XRAN_CP_SECTIONEXTCMD_0:
+ case XRAN_CP_SECTIONEXTCMD_3:
+ default:
+ print_err("Extension Type %d is not supported!", params->exData[i].type);
+ ret = XRAN_STATUS_INVALID_PARAM;
+ ext_size = 0;
+ }
+
+ if(ext_size == XRAN_STATUS_RESOURCE) {
+ break;
+ }
+
+ totalen += ext_size;
+ }
+
+ return (totalen);
+}
+
+
+/**
+ * @brief Fill the section body of type 0 in C-Plane packet
+ *
+ * @param section
+ * A pointer to the section in the packet buffer
+ * @param params
+ * A porinter to the information to generate a C-Plane packet
+ * @return
+ * XRAN_STATUS_SUCCESS on success
+ * XRAN_STATUS_INVALID_PARM if the number of symbol is invalid
+ */
+static int xran_prepare_section0(
+ struct xran_cp_radioapp_section0 *section,
+ struct xran_section_gen_info *params)
+{
+#if (XRAN_STRICT_PARM_CHECK)
+ if(unlikely(params->info.numSymbol > XRAN_SYMBOLNUMBER_MAX)) {
+ print_err("Invalid number of Symbols - %d", params->info.numSymbol);
+ return (XRAN_STATUS_INVALID_PARAM);
+ }
+#endif
+
+ section->hdr.sectionId = params->info.id;
+ section->hdr.rb = params->info.rb;
+ section->hdr.symInc = params->info.symInc;
+ section->hdr.startPrbc = params->info.startPrbc;
+ section->hdr.numPrbc = XRAN_CONVERT_NUMPRBC(params->info.numPrbc);
+
+ section->hdr.u.s0.reMask = params->info.reMask;
+ section->hdr.u.s0.numSymbol = params->info.numSymbol;
+ section->hdr.u.s0.reserved = 0;
+
+ // for network byte order
+ *((uint64_t *)section) = rte_cpu_to_be_64(*((uint64_t *)section));
+
+ return (XRAN_STATUS_SUCCESS);
+}
+/**
+ * @brief Fill the section header of type 0 in C-Plane packet
+ *
+ * @param s0hdr
+ * A pointer to the section header in the packet buffer
+ * @param params
+ * A porinter to the information to generate a C-Plane packet
+ * @return
+ * XRAN_STATUS_SUCCESS always
+ */
+static int xran_prepare_section0_hdr(
+ struct xran_cp_radioapp_section0_header *s0hdr,
+ struct xran_cp_gen_params *params)
+
+{
+ s0hdr->timeOffset = rte_cpu_to_be_16(params->hdr.timeOffset);
+ s0hdr->frameStructure.fftSize = params->hdr.fftSize;
+ s0hdr->frameStructure.uScs = params->hdr.scs;
+ s0hdr->cpLength = rte_cpu_to_be_16(params->hdr.cpLength);
+ s0hdr->reserved = 0;
+
+ return (XRAN_STATUS_SUCCESS);
+}
+
+/**
+ * @brief Fill the section body of type 1 in C-Plane packet
+ * Extension is not supported.
+ *
+ * @param section
+ * A pointer to the section header in the packet buffer
+ * @param params
+ * A porinter to the information to generate a C-Plane packet
+ * @return
+ * XRAN_STATUS_SUCCESS on success
+ * XRAN_STATUS_INVALID_PARM if the number of symbol is invalid
+ */
+static int xran_prepare_section1(
+ struct xran_cp_radioapp_section1 *section,
+ struct xran_section_gen_info *params)
+{
+#if (XRAN_STRICT_PARM_CHECK)
+ if(unlikely(params->info.numSymbol > XRAN_SYMBOLNUMBER_MAX)) {
+ print_err("Invalid number of Symbols - %d", params->info.numSymbol);
+ return (XRAN_STATUS_INVALID_PARAM);
+ }
+#endif
+
+ section->hdr.sectionId = params->info.id;
+ section->hdr.rb = params->info.rb;
+ section->hdr.symInc = params->info.symInc;
+ section->hdr.startPrbc = params->info.startPrbc;
+ section->hdr.numPrbc = XRAN_CONVERT_NUMPRBC(params->info.numPrbc);
+
+ section->hdr.u.s1.reMask = params->info.reMask;
+ section->hdr.u.s1.numSymbol = params->info.numSymbol;
+ section->hdr.u.s1.beamId = params->info.beamId;
+
+ section->hdr.u.s1.ef = params->info.ef;
+
+ // for network byte order
+ *((uint64_t *)section) = rte_cpu_to_be_64(*((uint64_t *)section));
+
+ return (XRAN_STATUS_SUCCESS);
+}
+/**
+ * @brief Fill the section header of type 1 in C-Plane packet
+ *
+ * @param s1hdr
+ * A pointer to the section header in the packet buffer
+ * @param params
+ * A porinter to the information to generate a C-Plane packet
+ * @return
+ * XRAN_STATUS_SUCCESS always
+ */
+static int xran_prepare_section1_hdr(
+ struct xran_cp_radioapp_section1_header *s1hdr,
+ struct xran_cp_gen_params *params)
+{
+ s1hdr->udComp.udIqWidth = params->hdr.iqWidth;
+ s1hdr->udComp.udCompMeth = params->hdr.compMeth;
+ s1hdr->reserved = 0;
+
+ return (XRAN_STATUS_SUCCESS);
+}
+
+/**
+ * @brief Fill the section body of type 3 in C-Plane packet
+ * Extension is not supported.
+ *
+ * @param section
+ * A pointer to the section header in the packet buffer
+ * @param params
+ * A porinter to the information to generate a C-Plane packet
+ * @return
+ * XRAN_STATUS_SUCCESS on success
+ * XRAN_STATUS_INVALID_PARM if the number of symbol is invalid
+ */
+static int xran_prepare_section3(
+ struct xran_cp_radioapp_section3 *section,
+ struct xran_section_gen_info *params)
+{
+#if (XRAN_STRICT_PARM_CHECK)
+ if(unlikely(params->info.numSymbol > XRAN_SYMBOLNUMBER_MAX)) {
+ print_err("Invalid number of Symbols - %d", params->info.numSymbol);
+ return (XRAN_STATUS_INVALID_PARAM);
+ }
+#endif
+
+ section->hdr.sectionId = params->info.id;
+ section->hdr.rb = params->info.rb;
+ section->hdr.symInc = params->info.symInc;
+ section->hdr.startPrbc = params->info.startPrbc;
+ section->hdr.numPrbc = XRAN_CONVERT_NUMPRBC(params->info.numPrbc);
+
+ section->hdr.u.s3.reMask = params->info.reMask;
+ section->hdr.u.s3.numSymbol = params->info.numSymbol;
+ section->hdr.u.s3.beamId = params->info.beamId;
+
+ section->freqOffset = rte_cpu_to_be_32(params->info.freqOffset)>>8;
+ section->reserved = 0;
+
+ section->hdr.u.s3.ef = params->info.ef;
+
+ // for network byte order (header, 8 bytes)
+ *((uint64_t *)section) = rte_cpu_to_be_64(*((uint64_t *)section));
+
+ return (XRAN_STATUS_SUCCESS);
+}
+/**
+ * @brief Fill the section header of type 3 in C-Plane packet
+ *
+ * @param s3hdr
+ * A pointer to the section header in the packet buffer
+ * @param params
+ * A porinter to the information to generate a C-Plane packet
+ * @return
+ * XRAN_STATUS_SUCCESS always
+ */
+static int xran_prepare_section3_hdr(
+ struct xran_cp_radioapp_section3_header *s3hdr,
+ struct xran_cp_gen_params *params)
+
+{
+ s3hdr->timeOffset = rte_cpu_to_be_16(params->hdr.timeOffset);
+ s3hdr->frameStructure.fftSize = params->hdr.fftSize;
+ s3hdr->frameStructure.uScs = params->hdr.scs;
+ s3hdr->cpLength = rte_cpu_to_be_16(params->hdr.cpLength);
+ s3hdr->udComp.udIqWidth = params->hdr.iqWidth;
+ s3hdr->udComp.udCompMeth = params->hdr.compMeth;
+
+ return (XRAN_STATUS_SUCCESS);
+}
+
+/**
+ * @brief add sections to C-Plane packet
+ * Section type 1 and 3 are supported.
+ *
+ * @param mbuf
+ * A pointer to the packet buffer
+ * @param params
+ * A porinter to the information to generate a C-Plane packet
+ * @return
+ * XRAN_STATUS_SUCCESS on success
+ * XRAN_STATUS_INVALID_PARM if section type is not 1 or 3, or handler is NULL
+ * XRAN_STATUS_RESOURCE if failed to allocate the space to packet buffer
+ */
+int xran_append_control_section(struct rte_mbuf *mbuf, struct xran_cp_gen_params *params)
+{
+ int i, ret, ext_flag;
+ uint32_t totalen;
+ void *section;
+ int section_size;
+ int (*xran_prepare_section_func)(void *section, void *params);
+
+
+ totalen = 0;
+ switch(params->sectionType) {
+ case XRAN_CP_SECTIONTYPE_0: /* Unused RB or Symbols in DL or UL, not supportted */
+ section_size = sizeof(struct xran_cp_radioapp_section0);
+ xran_prepare_section_func = (int (*)(void *, void *))xran_prepare_section0;
+ break;
+
+ case XRAN_CP_SECTIONTYPE_1: /* Most DL/UL Radio Channels */
+ section_size = sizeof(struct xran_cp_radioapp_section1);
+ xran_prepare_section_func = (int (*)(void *, void *))xran_prepare_section1;
+ break;
+
+ case XRAN_CP_SECTIONTYPE_3: /* PRACH and Mixed-numerology Channels */
+ section_size = sizeof(struct xran_cp_radioapp_section3);
+ xran_prepare_section_func = (int (*)(void *, void *))xran_prepare_section3;
+ break;
+
+ case XRAN_CP_SECTIONTYPE_5: /* UE scheduling information, not supported */
+ case XRAN_CP_SECTIONTYPE_6: /* Channel Information, not supported */
+ case XRAN_CP_SECTIONTYPE_7: /* LAA, not supported */
+ default:
+ section_size = 0;
+ xran_prepare_section_func = NULL;
+ print_err("Section Type %d is not supported!", params->sectionType);
+ return (XRAN_STATUS_INVALID_PARAM);
+ }
+
+ if(unlikely(xran_prepare_section_func == NULL)) {
+ print_err("Section Type %d is not supported!", params->sectionType);
+ return (XRAN_STATUS_INVALID_PARAM);
+ }
+
+ for(i=0; i < params->numSections; i++) {
+ section = rte_pktmbuf_append(mbuf, section_size);
+ if(section == NULL) {
+ print_err("Fail to allocate the space for section[%d]!", i);
+ return (XRAN_STATUS_RESOURCE);
+ }
+ print_dbg("%s %d ef %d\n", __FUNCTION__, i, params->sections[i].info.ef);
+ ret = xran_prepare_section_func((void *)section,
+ (void *)¶ms->sections[i]);
+ if(ret < 0){
+ print_err("%s %d\n", __FUNCTION__, ret);
+ return (ret);
+ }
+ totalen += section_size;
+
+ if(params->sections[i].info.ef) {
+ print_dbg("sections[%d].info.ef %d exDataSize %d type %d\n", i, params->sections[i].info.ef,
+ params->sections[i].exDataSize, params->sections[i].exData[0].type);
+ ret = xran_append_section_extensions(mbuf, ¶ms->sections[i]);
+ if(ret < 0)
+ return (ret);
+ totalen += ret;
+ }
+ }
+
+ return (totalen);
+}
+
+/**
+ * @brief fill the information of a radio application header in a C-Plane packet
+ *
+ * @param apphdr
+ * A pointer to the application header in the packet buffer
+ * @param params
+ * A porinter to the information to generate a C-Plane packet
+ * @return
+ * XRAN_STATUS_SUCCESS on success
+ * XRAN_STATUS_INVALID_PARM if direction, slot index or symbold index is invalid
+ */
+static inline int xran_prepare_radioapp_common_header(
+ struct xran_cp_radioapp_common_header *apphdr,
+ struct xran_cp_gen_params *params)
+{
+
+#if (XRAN_STRICT_PARM_CHECK)
+ if(unlikely(params->dir != XRAN_DIR_DL && params->dir != XRAN_DIR_UL)) {
+ print_err("Invalid direction!");
+ return (XRAN_STATUS_INVALID_PARAM);
+ }
+ if(unlikely(params->hdr.slotId > XRAN_SLOTID_MAX)) {
+ print_err("Invalid Slot ID!");
+ return (XRAN_STATUS_INVALID_PARAM);
+ }
+ if(unlikely(params->hdr.startSymId > XRAN_SYMBOLNUMBER_MAX)) {
+ print_err("Invalid Symbol ID!");
+ return (XRAN_STATUS_INVALID_PARAM);
+ }
+#endif
+
+ apphdr->dataDirection = params->dir;
+ apphdr->payloadVer = XRAN_PAYLOAD_VER;
+ apphdr->filterIndex = params->hdr.filterIdx;
+ apphdr->frameId = params->hdr.frameId;
+ apphdr->subframeId = params->hdr.subframeId;
+ apphdr->slotId = params->hdr.slotId;
+ apphdr->startSymbolId = params->hdr.startSymId;
+ apphdr->numOfSections = params->numSections;
+ apphdr->sectionType = params->sectionType;
+
+ /* radio app header has common parts of 4bytes for all section types */
+ *((uint32_t *)apphdr) = rte_cpu_to_be_32(*((uint32_t *)apphdr));
+
+ return (XRAN_STATUS_SUCCESS);
+}
+
+/**
+ * @brief add a radio application header in a C-Plane packet
+ *
+ * @param mbuf
+ * A pointer to the packet buffer
+ * @param params
+ * A porinter to the information to generate a C-Plane packet
+ * @return
+ * The length of added section (>0) on success
+ * XRAN_STATUS_INVALID_PARM if section type is invalid, or handler is NULL
+ * XRAN_STATUS_RESOURCE if failed to allocate the space to packet buffer
+ */
+int xran_append_radioapp_header(struct rte_mbuf *mbuf, struct xran_cp_gen_params *params)
+{
+ int ret;
+ uint32_t totalen;
+ struct xran_cp_radioapp_common_header *apphdr;
+ int (*xran_prepare_radioapp_section_hdr_func)(void *hdr, void *params);
+
+
+#if (XRAN_STRICT_PARM_CHECK)
+ if(unlikely(params->sectionType >= XRAN_CP_SECTIONTYPE_MAX)) {
+ print_err("Invalid Section Type - %d", params->sectionType);
+ return (XRAN_STATUS_INVALID_PARAM);
+ }
+#endif
+
+ switch(params->sectionType) {
+ case XRAN_CP_SECTIONTYPE_0: /* Unused RB or Symbols in DL or UL, not supportted */
+ xran_prepare_radioapp_section_hdr_func = (int (*)(void *, void*))xran_prepare_section0_hdr;
+ totalen = sizeof(struct xran_cp_radioapp_section0_header);
+ break;
+
+ case XRAN_CP_SECTIONTYPE_1: /* Most DL/UL Radio Channels */
+ xran_prepare_radioapp_section_hdr_func = (int (*)(void *, void*))xran_prepare_section1_hdr;
+ totalen = sizeof(struct xran_cp_radioapp_section1_header);
+ break;
+
+ case XRAN_CP_SECTIONTYPE_3: /* PRACH and Mixed-numerology Channels */
+ xran_prepare_radioapp_section_hdr_func = (int (*)(void *, void*))xran_prepare_section3_hdr;
+ totalen = sizeof(struct xran_cp_radioapp_section3_header);
+ break;
+
+ case XRAN_CP_SECTIONTYPE_5: /* UE scheduling information, not supported */
+ case XRAN_CP_SECTIONTYPE_6: /* Channel Information, not supported */
+ case XRAN_CP_SECTIONTYPE_7: /* LAA, not supported */
+ default:
+ print_err("Section Type %d is not supported!", params->sectionType);
+ xran_prepare_radioapp_section_hdr_func = NULL;
+ totalen = 0;
+ return (XRAN_STATUS_INVALID_PARAM);
+ }
+
+ apphdr = (struct xran_cp_radioapp_common_header *)rte_pktmbuf_append(mbuf, totalen);
+ if(unlikely(apphdr == NULL)) {
+ print_err("Fail to reserve the space for radio application header!");
+ return (XRAN_STATUS_RESOURCE);
+ }
+
+ ret = xran_prepare_radioapp_common_header(apphdr, params);
+ if(unlikely(ret < 0)) {
+ return (ret);
+ }
+
+ if(likely(xran_prepare_radioapp_section_hdr_func)) {
+ totalen += xran_prepare_radioapp_section_hdr_func(apphdr, params);
+ }
+ else {
+ print_err("xran_prepare_radioapp_section_hdr_func is NULL!");
+ return (XRAN_STATUS_INVALID_PARAM);
+ }
+
+ return (totalen);
+}
+
+/**
+ * @brief Create a C-Plane packet
+ * Transport layer fragmentation is not supported.
+ *
+ * @ingroup xran_cp_pkt
+ *
+ * @param mbuf
+ * A pointer to the packet buffer
+ * @param params
+ * A porinter to the information to generate a C-Plane packet
+ * @param CC_ID
+ * Component Carrier ID for this C-Plane message
+ * @param Ant_ID
+ * Antenna ID(RU Port ID) for this C-Plane message
+ * @param seq_id
+ * Sequence ID for this C-Plane message
+ * @return
+ * XRAN_STATUS_SUCCESS on success
+ * XRAN_STATUS_RESOURCE if failed to allocate the space to packet buffer
+ * XRAN_STATUS_INVALID_PARM if section type is invalid
+ */
+int xran_prepare_ctrl_pkt(struct rte_mbuf *mbuf,
+ struct xran_cp_gen_params *params,
+ uint8_t CC_ID, uint8_t Ant_ID,
+ uint8_t seq_id)
+{
+ int ret;
+ uint32_t payloadlen;
+ struct xran_ecpri_hdr *ecpri_hdr;
+
+
+ payloadlen = xran_build_ecpri_hdr(mbuf, CC_ID, Ant_ID, seq_id, &ecpri_hdr);
+
+ ret = xran_append_radioapp_header(mbuf, params);
+ if(ret < 0) {
+ print_err("%s %d\n", __FUNCTION__, ret);
+ return (ret);
+ }
+ payloadlen += ret;
+
+ ret = xran_append_control_section(mbuf, params);
+ if(ret < 0) {
+ print_err("%s %d\n", __FUNCTION__, ret);
+ return (ret);
+ }
+ payloadlen += ret;
+
+ /* set payload length */
+ ecpri_hdr->cmnhdr.ecpri_payl_size = rte_cpu_to_be_16(payloadlen);
+
+ return (XRAN_STATUS_SUCCESS);
+}
+
+
+///////////////////////////////////////
+// for RU emulation
+int xran_parse_section_ext1(void *ext,
+ struct xran_sectionext1_info *extinfo)
+{
+ int len;
+ int total_len;
+ struct xran_cp_radioapp_section_ext1 *ext1;
+ uint8_t *data;
+ int parm_size, iq_size;
+ int N;
+ void *pHandle;
+
+ pHandle = NULL;
+ N = xran_get_conf_num_bfweights(pHandle);
+ extinfo->bfwNumber = N;
+
+ ext1 = (struct xran_cp_radioapp_section_ext1 *)ext;
+ data = (uint8_t *)ext;
+
+ len = 0;
+ total_len = ext1->extLen * XRAN_SECTIONEXT_ALIGN; /* from word to byte */
+
+ extinfo->bfwCompMeth = ext1->bfwCompMeth;
+ extinfo->bfwiqWidth = (ext1->bfwIqWidth==0)?16:ext1->bfwIqWidth;
+
+ len += sizeof(struct xran_cp_radioapp_section_ext1);
+ data += sizeof(struct xran_cp_radioapp_section_ext1);
+
+ switch(ext1->bfwCompMeth) {
+ case XRAN_BFWCOMPMETHOD_NONE:
+ parm_size = 0;
+ break;
+
+ case XRAN_BFWCOMPMETHOD_BLKFLOAT:
+ parm_size = 1;
+ extinfo->bfwCompParam.exponent = *data & 0x0f;
+ break;
+
+ case XRAN_BFWCOMPMETHOD_BLKSCALE:
+ parm_size = 1;
+ extinfo->bfwCompParam.blockScaler = *data;
+ break;
+
+ case XRAN_BFWCOMPMETHOD_ULAW:
+ parm_size = 1;
+ extinfo->bfwCompParam.compBitWidthShift = *data;
+ break;
+
+ case XRAN_BFWCOMPMETHOD_BEAMSPACE:
+ parm_size = N>>3; if(N%8) parm_size++; parm_size *= 8;
+ rte_memcpy(data, extinfo->bfwCompParam.activeBeamspaceCoeffMask, parm_size);
+ break;
+
+ default:
+ print_err("Invalid BfComp method - %d", ext1->bfwCompMeth);
+ parm_size = 0;
+ }
+
+ len += parm_size;
+ data += parm_size;
+
+ /* Get BF weights */
+ iq_size = N * extinfo->bfwiqWidth * 2; // total in bits
+ parm_size = iq_size>>3; // total in bytes (/8)
+ if(iq_size%8) parm_size++; // round up
+
+ //rte_memcpy(data, extinfo->p_bfwIQ, parm_size);
+ extinfo->p_bfwIQ = (int16_t*)data;
+
+ len += parm_size;
+
+ parm_size = len % XRAN_SECTIONEXT_ALIGN;
+ if(parm_size)
+ len += (XRAN_SECTIONEXT_ALIGN - parm_size);
+
+ if(len != total_len) {
+ // TODO: fix this print_err("The size of extension 1 is not correct! [%d:%d]", len, total_len);
+ }
+
+ return (total_len);
+}
+
+int xran_parse_section_ext2(void *ext,
+ struct xran_sectionext2_info *extinfo)
+{
+ int len;
+ int total_len;
+ struct xran_cp_radioapp_section_ext2 *ext2;
+ uint8_t *data;
+ int parm_size;
+ uint32_t val;
+ int val_size;
+
+
+ ext2 = (struct xran_cp_radioapp_section_ext2 *)ext;
+ data = (uint8_t *)ext;
+ *(uint32_t *)ext2 = rte_cpu_to_be_32(*(uint32_t *)ext2);
+
+ len = 0;
+ total_len = ext2->extLen * XRAN_SECTIONEXT_ALIGN; /* from word to byte */
+
+ parm_size = sizeof(struct xran_cp_radioapp_section_ext2);
+
+ extinfo->bfAzPtWidth = ext2->bfAzPtWidth;
+ extinfo->bfZePtWidth = ext2->bfZePtWidth;
+ extinfo->bfAz3ddWidth = ext2->bfAz3ddWidth;
+ extinfo->bfZe3ddWidth = ext2->bfZe3ddWidth;
+
+ if(ext2->bfaCompResv0 || ext2->bfaCompResv1)
+ print_err("Incorrect reserved field - %d, %d", ext2->bfaCompResv0, ext2->bfaCompResv1);
+
+ data += parm_size;
+ len += parm_size;
+
+ val_size = (extinfo->bfAzPtWidth ? extinfo->bfAzPtWidth+1 : 0)
+ + (extinfo->bfZePtWidth ? extinfo->bfZePtWidth+1 : 0)
+ + (extinfo->bfAz3ddWidth ? extinfo->bfAz3ddWidth+1 : 0)
+ + (extinfo->bfZe3ddWidth ? extinfo->bfZe3ddWidth+ 1: 0);
+ if(val_size) {
+ val = rte_cpu_to_be_32(*(uint32_t *)data);
+ val >>= (32 - val_size);
+
+ if(extinfo->bfZe3ddWidth) {
+ extinfo->bfZe3dd = val & bitmask[extinfo->bfZe3ddWidth];
+ val >>= (extinfo->bfZe3ddWidth + 1);
+ }
+ if(extinfo->bfAz3ddWidth) {
+ extinfo->bfAz3dd = val & bitmask[extinfo->bfAz3ddWidth];
+ val >>= (extinfo->bfAz3ddWidth + 1);
+ }
+ if(extinfo->bfZePtWidth) {
+ extinfo->bfZePt = val & bitmask[extinfo->bfZePtWidth];
+ val >>= (extinfo->bfZePtWidth + 1);
+ }
+ if(extinfo->bfAzPtWidth) {
+ extinfo->bfAzPt = val & bitmask[extinfo->bfAzPtWidth];
+ val >>= (extinfo->bfAzPtWidth + 1);
+ }
+ }
+
+ parm_size = val_size/8;
+ if(val_size%8) parm_size += 1;
+
+ data += parm_size;
+ len += parm_size;
+
+ extinfo->bfAzSI = (*data >> 3) & 0x07;
+ extinfo->bfZeSI = *data & 0x07;
+
+ data++;
+ len++;
+
+ parm_size = len % XRAN_SECTIONEXT_ALIGN;
+ if(parm_size)
+ len += (XRAN_SECTIONEXT_ALIGN - parm_size);
+
+ if(len != total_len) {
+ print_err("The size of extension 2 is not correct! [%d:%d]", len, total_len);
+ }
+
+ return (total_len);
+
+}
+
+int xran_parse_section_ext4(void *ext,
+ struct xran_sectionext4_info *extinfo)
+{
+ int len;
+ struct xran_cp_radioapp_section_ext4 *ext4;
+ int total_len;
+
+
+ ext4 = (struct xran_cp_radioapp_section_ext4 *)ext;
+
+ *(uint32_t *)ext4 = rte_cpu_to_be_32(*(uint32_t *)ext4);
+
+ len = 0;
+ total_len = ext4->extLen * XRAN_SECTIONEXT_ALIGN; /* from word to byte */
+
+ extinfo->modCompScaler = ext4->modCompScaler;
+ extinfo->csf = ext4->csf;
+// extinfo->pad0;
+
+ len += sizeof(struct xran_cp_radioapp_section_ext4);
+ if(len != total_len) {
+ print_err("The size of extension 4 is not correct! [%d:%d]", len, total_len);
+ }
+
+ return (total_len);
+}
+
+int xran_parse_section_ext5(void *ext,
+ struct xran_sectionext5_info *extinfo)
+{
+ int len;
+ struct xran_cp_radioapp_section_ext_hdr *ext_hdr;
+ struct xran_cp_radioapp_section_ext5 ext5;
+ int parm_size;
+ int total_len;
+ uint8_t *data;
+ uint16_t i;
+
+
+ ext_hdr = (struct xran_cp_radioapp_section_ext_hdr *)ext;
+ *(uint16_t *)ext_hdr = rte_cpu_to_be_16(*(uint16_t *)ext_hdr);
+
+ total_len = ext_hdr->extLen * XRAN_SECTIONEXT_ALIGN; /* from word to byte */
+
+ // one set has 3.5 bytes, so enforcing double to do integer calculation
+ parm_size = ((total_len-sizeof(struct xran_cp_radioapp_section_ext_hdr))*2) / 7;
+
+ if(parm_size > XRAN_MAX_MODCOMP_ADDPARMS) {
+ print_err("Exceeds maximum number of parameters - %d", parm_size);
+ parm_size = XRAN_MAX_MODCOMP_ADDPARMS;
+ }
+
+ len = 0;
+ data = (uint8_t *)(ext_hdr + 1);
+
+ i = 0;
+ while(i < parm_size) {
+ // For odd number set, more data can be copied
+ *((uint64_t *)&ext5) = rte_cpu_to_be_64(*((uint64_t *)data));
+
+ extinfo->mc[i].mcScaleOffset = ext5.mcScaleOffset1;
+ extinfo->mc[i].csf = ext5.csf1;
+ extinfo->mc[i].mcScaleReMask = ext5.mcScaleReMask1;
+ i++;
+
+ extinfo->mc[i].mcScaleOffset = ext5.mcScaleOffset2;
+ extinfo->mc[i].csf = ext5.csf2;
+ extinfo->mc[i].mcScaleReMask = ext5.mcScaleReMask2;
+ i++;
+
+ data += sizeof(struct xran_cp_radioapp_section_ext5);
+ }
+
+ // check the values of last set
+ // due to alignment, it cannot be identified by the length that 3 or 4, 11 or 12 and etc
+ // don't check mcScaleOffset might not be zero (some part is out of zero-padding)
+ i--;
+ if(i < XRAN_MAX_MODCOMP_ADDPARMS) {
+ if(extinfo->mc[i].csf == 0 && extinfo->mc[i].mcScaleReMask == 0)
+ extinfo->num_sets = i;
+ else
+ extinfo->num_sets = i+1;
+ }else {
+ print_err("Maximum total number %d is not correct!", i);
+ }
+
+ return (total_len);
+}
+
+int xran_parse_section_extension(struct rte_mbuf *mbuf,
+ void *ext,
+ struct xran_section_gen_info *section)
+{
+ int total_len, len, numext;
+ uint8_t *ptr;
+ int flag_last;
+ int ext_type;
+ int i;
+
+ total_len = 0;
+ ptr = (uint8_t *)ext;
+
+ numext = 0;
+
+ flag_last = 1;
+ i = 0;
+ while(flag_last) {
+ /* check ef */
+ flag_last = (*ptr & 0x80);
+
+ ext_type = *ptr & 0x7f;
+ section->exData[numext].type = ext_type;
+ switch(ext_type) {
+ case XRAN_CP_SECTIONEXTCMD_1:
+ section->exData[numext].data = §ion->m_ext1[numext];
+ len = xran_parse_section_ext1(ptr, section->exData[numext].data);
+ section->exData[numext].len = len;
+ break;
+ case XRAN_CP_SECTIONEXTCMD_2:
+ section->exData[numext].data = §ion->m_ext2[numext];
+ len = xran_parse_section_ext2(ptr, section->exData[numext].data);
+ break;
+ case XRAN_CP_SECTIONEXTCMD_4:
+ section->exData[numext].data = §ion->m_ext4[numext];
+ len = xran_parse_section_ext4(ptr, section->exData[numext].data);
+ break;
+ case XRAN_CP_SECTIONEXTCMD_5:
+ section->exData[numext].data = §ion->m_ext5[numext];
+ len = xran_parse_section_ext5(ptr, section->exData[numext].data);
+ break;
+
+ case XRAN_CP_SECTIONEXTCMD_0:
+ case XRAN_CP_SECTIONEXTCMD_3:
+ default:
+ print_err("Extension %d is not supported!", ext_type);
+ len = 0;
+ }
+
+ section->exData[numext].len = len;
+ ptr += len; total_len += len;
+
+ i++;
+ if(++numext < XRAN_MAX_NUM_EXTENSIONS) continue;
+
+ /* exceeds maximum number of extensions */
+ break;
+ }
+
+ section->exDataSize = numext;
+
+ return (total_len);
+
+}
+
+/**
+ * @brief Parse a C-Plane packet (for RU emulation)
+ * Transport layer fragmentation is not supported.
+ *
+ * @ingroup xran_cp_pkt
+ *
+ * @param mbuf
+ * The pointer of the packet buffer to be parsed
+ * @param params
+ * The pointer of structure to store the information of parsed packet
+ * @param eaxc
+ * The pointer of sturcture to store the decomposed information of ecpriRtcid/ecpriPcid
+ * @return
+ * XRAN_STATUS_SUCCESS on success
+ * XRAN_STATUS_INVALID_PACKET if failed to parse the packet
+ */
+int xran_parse_cp_pkt(struct rte_mbuf *mbuf,
+ struct xran_cp_gen_params *result,
+ struct xran_recv_packet_info *pkt_info)
+{
+ struct xran_ecpri_hdr *ecpri_hdr;
+ struct xran_cp_radioapp_common_header *apphdr;
+ int i, ret;
+ int extlen;
+
+
+ ret = xran_parse_ecpri_hdr(mbuf, &ecpri_hdr, pkt_info);
+ if(ret < 0 && ecpri_hdr == NULL)
+ return (XRAN_STATUS_INVALID_PACKET);
+
+ /* Process radio header. */
+ apphdr = (void *)rte_pktmbuf_adj(mbuf, sizeof(struct xran_ecpri_hdr));
+ if(apphdr == NULL) {
+ print_err("Invalid packet - radio app hedaer!");
+ return (XRAN_STATUS_INVALID_PACKET);
+ }
+
+ *((uint32_t *)apphdr) = rte_cpu_to_be_32(*((uint32_t *)apphdr));
+
+ if(apphdr->payloadVer != XRAN_PAYLOAD_VER) {
+ print_err("Invalid Payload version - %d", apphdr->payloadVer);
+ ret = XRAN_STATUS_INVALID_PACKET;
+ }
+
+ result->dir = apphdr->dataDirection;
+ result->hdr.filterIdx = apphdr->filterIndex;
+ result->hdr.frameId = apphdr->frameId;
+ result->hdr.subframeId = apphdr->subframeId;
+ result->hdr.slotId = apphdr->slotId;
+ result->hdr.startSymId = apphdr->startSymbolId;
+ result->sectionType = apphdr->sectionType;
+ result->numSections = apphdr->numOfSections;
+
+#if 0
+ printf("[CP%5d] eAxC[%d:%d:%02d:%02d] %s seq[%03d-%03d-%d] sec[%d-%d] frame[%3d-%2d-%2d] sym%02d\n",
+ pkt_info->payload_len,
+ pkt_info->eaxc.cuPortId, pkt_info->eaxc.bandSectorId,
+ pkt_info->eaxc.ccId, pkt_info->eaxc.ruPortId,
+ result->dir?"DL":"UL",
+ pkt_info->seq_id, pkt_info->subseq_id, pkt_info->ebit,
+ result->sectionType, result->numSections,
+ result->hdr.frameId, result->hdr.subframeId, result->hdr.slotId,
+ result->hdr.startSymId
+ );
+#endif
+
+ switch(apphdr->sectionType) {
+ case XRAN_CP_SECTIONTYPE_0: // Unused RB or Symbols in DL or UL, not supportted
+ {
+ struct xran_cp_radioapp_section0_header *hdr;
+ struct xran_cp_radioapp_section0 *section;
+
+ hdr = (struct xran_cp_radioapp_section0_header*)apphdr;
+
+ result->hdr.fftSize = rte_be_to_cpu_16(hdr->timeOffset);
+ result->hdr.scs = hdr->frameStructure.fftSize;
+ result->hdr.timeOffset = hdr->frameStructure.uScs;
+ result->hdr.cpLength = rte_be_to_cpu_16(hdr->cpLength);
+ //hdr->reserved; /* should be zero */
+
+ section = (void *)rte_pktmbuf_adj(mbuf, sizeof(struct xran_cp_radioapp_section0_header));
+ if(section == NULL) {
+ print_err("Invalid packet 0 - radio app hedaer!");
+ return (XRAN_STATUS_INVALID_PACKET);
+ }
+ for(i=0; i<result->numSections; i++) {
+ *((uint64_t *)section) = rte_be_to_cpu_64(*((uint64_t *)section));
+
+ result->sections[i].info.type = apphdr->sectionType;
+ result->sections[i].info.id = section->hdr.sectionId;
+ result->sections[i].info.rb = section->hdr.rb;
+ result->sections[i].info.symInc = section->hdr.symInc;
+ result->sections[i].info.startPrbc = section->hdr.startPrbc;
+ result->sections[i].info.numPrbc = section->hdr.numPrbc,
+ result->sections[i].info.numSymbol = section->hdr.u.s0.numSymbol;
+ result->sections[i].info.reMask = section->hdr.u.s0.reMask;
+ //section->hdr.u.s0.reserved; /* should be zero */
+
+ section = (void *)rte_pktmbuf_adj(mbuf, sizeof(struct xran_cp_radioapp_section0));
+ if(section == NULL) {
+ print_err("Invalid packet 0 - number of section [%d:%d]!",
+ result->numSections, i);
+ result->numSections = i;
+ ret = XRAN_STATUS_INVALID_PACKET;
+ break;
+ }
+ }
+ }
+ break;
+
+ case XRAN_CP_SECTIONTYPE_1: // Most DL/UL Radio Channels
+ {
+ struct xran_cp_radioapp_section1_header *hdr;
+ struct xran_cp_radioapp_section1 *section;
+
+ hdr = (struct xran_cp_radioapp_section1_header*)apphdr;
+
+ result->hdr.iqWidth = hdr->udComp.udIqWidth;
+ result->hdr.compMeth = hdr->udComp.udCompMeth;
+
+ section = (void *)rte_pktmbuf_adj(mbuf, sizeof(struct xran_cp_radioapp_section1_header));
+ if(section == NULL) {
+ print_err("Invalid packet 1 - radio app hedaer!");
+ return (XRAN_STATUS_INVALID_PACKET);
+ }
+
+ for(i=0; i<result->numSections; i++) {
+ *((uint64_t *)section) = rte_be_to_cpu_64(*((uint64_t *)section));
+
+ result->sections[i].info.type = apphdr->sectionType;
+ result->sections[i].info.id = section->hdr.sectionId;
+ result->sections[i].info.rb = section->hdr.rb;
+ result->sections[i].info.symInc = section->hdr.symInc;
+ result->sections[i].info.startPrbc = section->hdr.startPrbc;
+ result->sections[i].info.numPrbc = section->hdr.numPrbc,
+ result->sections[i].info.numSymbol = section->hdr.u.s1.numSymbol;
+ result->sections[i].info.reMask = section->hdr.u.s1.reMask;
+ result->sections[i].info.beamId = section->hdr.u.s1.beamId;
+ result->sections[i].info.ef = section->hdr.u.s1.ef;
+
+ section = (void *)rte_pktmbuf_adj(mbuf,
+ sizeof(struct xran_cp_radioapp_section1));
+ if(section == NULL) {
+ print_err("Invalid packet 1 - number of section [%d:%d]!",
+ result->numSections, i);
+ result->numSections = i;
+ ret = XRAN_STATUS_INVALID_PACKET;
+ break;
+ }
+
+ if(result->sections[i].info.ef) {
+ // parse section extension
+ extlen = xran_parse_section_extension(mbuf, (void *)section, &result->sections[i]);
+ if(extlen > 0) {
+ section = (void *)rte_pktmbuf_adj(mbuf, extlen);
+ if(section == NULL) {
+ print_err("Invalid packet 1 - section extension [%d]!", i);
+ ret = XRAN_STATUS_INVALID_PACKET;
+ break;
+ }
+ }
+ }
+ else extlen = 0;
+ }
+ }
+ break;
+
+ case XRAN_CP_SECTIONTYPE_3: // PRACH and Mixed-numerology Channels
+ {
+ struct xran_cp_radioapp_section3_header *hdr;
+ struct xran_cp_radioapp_section3 *section;
+
+ hdr = (struct xran_cp_radioapp_section3_header*)apphdr;
+
+ result->hdr.timeOffset = rte_be_to_cpu_16(hdr->timeOffset);
+ result->hdr.scs = hdr->frameStructure.uScs;
+ result->hdr.fftSize = hdr->frameStructure.fftSize;
+ result->hdr.cpLength = rte_be_to_cpu_16(hdr->cpLength);
+ result->hdr.iqWidth = hdr->udComp.udIqWidth;
+ result->hdr.compMeth = hdr->udComp.udCompMeth;
+
+ section = (void *)rte_pktmbuf_adj(mbuf, sizeof(struct xran_cp_radioapp_section3_header));
+ if(section == NULL) {
+ print_err("Invalid packet 3 - radio app hedaer!");
+ return (XRAN_STATUS_INVALID_PACKET);
+ }
+
+ for(i=0; i<result->numSections; i++) {
+ *((uint64_t *)section) = rte_be_to_cpu_64(*((uint64_t *)section));
+
+ result->sections[i].info.type = apphdr->sectionType;
+ result->sections[i].info.id = section->hdr.sectionId;
+ result->sections[i].info.rb = section->hdr.rb;
+ result->sections[i].info.symInc = section->hdr.symInc;
+ result->sections[i].info.startPrbc = section->hdr.startPrbc;
+ result->sections[i].info.numPrbc = section->hdr.numPrbc,
+ result->sections[i].info.numSymbol = section->hdr.u.s3.numSymbol;
+ result->sections[i].info.reMask = section->hdr.u.s3.reMask;
+ result->sections[i].info.beamId = section->hdr.u.s3.beamId;
+ result->sections[i].info.ef = section->hdr.u.s3.ef;
+ result->sections[i].info.freqOffset = ((int32_t)rte_be_to_cpu_32(section->freqOffset))>>8;
+
+ if(section->reserved) {
+ print_err("Invalid packet 3 - section[%d:%d]", i, section->reserved);
+ ret = XRAN_STATUS_INVALID_PACKET;
+ }
+
+ section = (void *)rte_pktmbuf_adj(mbuf, sizeof(struct xran_cp_radioapp_section3));
+ if(section == NULL) {
+ print_err("Invalid packet 3 - number of section [%d:%d]!",
+ result->numSections, i);
+ result->numSections = i;
+ ret = XRAN_STATUS_INVALID_PACKET;
+ break;
+ }
+
+ if(result->sections[i].info.ef) {
+ // parse section extension
+ extlen = xran_parse_section_extension(mbuf, (void *)section, &result->sections[i]);
+ if(extlen > 0) {
+ section = (void *)rte_pktmbuf_adj(mbuf, extlen);
+ if(section == NULL) {
+ print_err("Invalid packet 3 - section extension [%d]!", i);
+ ret = XRAN_STATUS_INVALID_PACKET;
+ break;
+ }
+ }
+ }
+ else extlen = 0;
+ }
+ }
+ break;
+
+ case XRAN_CP_SECTIONTYPE_5: // UE scheduling information, not supported
+ case XRAN_CP_SECTIONTYPE_6: // Channel Information, not supported
+ case XRAN_CP_SECTIONTYPE_7: // LAA, not supported
+ default:
+ ret = XRAN_STATUS_INVALID_PARAM;
+ print_err("Non-supported Section Type - %d", apphdr->sectionType);
+ }
+
+#if 0
+ printf("[CP-%s] [%3d:%2d:%2d] section%d[%d] startSym=%d filterIdx=%X IQwidth=%d CompMeth=%d\n",
+ result->dir?"DL":"UL",
+ result->hdr.frameId, result->hdr.subframeId, result->hdr.slotId,
+ result->sectionType, result->numSections,
+ result->hdr.startSymId,
+ result->hdr.filterIdx,
+ result->hdr.iqWidth, result->hdr.compMeth);
+
+ for(i=0; i<result->numSections; i++) {
+ printf(" || %3d:%04X| rb=%d symInc=%d numSym=%d startPrbc=%02d numPrbc=%d reMask=%03X beamId=%04X freqOffset=%d ef=%d\n",
+ i, result->sections[i].info.id,
+ result->sections[i].info.rb,
+ result->sections[i].info.symInc, result->sections[i].info.numSymbol,
+ result->sections[i].info.startPrbc, result->sections[i].info.numPrbc,
+ result->sections[i].info.reMask,
+ result->sections[i].info.beamId,
+ result->sections[i].info.freqOffset,
+ result->sections[i].info.ef);
+
+ if(result->sections[i].info.ef) {
+ for(int j=0; j<result->sections[i].exDataSize; j++) {
+ printf(" || %2d : type=%d len=%d\n",
+ j, result->sections[i].exData[j].type, result->sections[i].exData[j].len);
+ switch(result->sections[i].exData[j].type) {
+ case XRAN_CP_SECTIONEXTCMD_1:
+ {
+ struct xran_sectionext1_info *ext1;
+ ext1 = result->sections[i].exData[j].data;
+ printf(" || bfwNumber=%d bfwiqWidth=%d bfwCompMeth=%d\n",
+ ext1->bfwNumber, ext1->bfwiqWidth, ext1->bfwCompMeth);
+ }
+ break;
+ case XRAN_CP_SECTIONEXTCMD_2:
+ {
+ struct xran_sectionext2_info *ext2;
+ ext2 = result->sections[i].exData[j].data;
+ printf(" || AzPt=%02x(%d) ZePt=%02x(%d) Az3dd=%02x(%d) Ze3dd=%02x(%d) AzSI=%02x ZeSI=%02x\n",
+ ext2->bfAzPt, ext2->bfAzPtWidth,
+ ext2->bfZePt, ext2->bfZePtWidth,
+ ext2->bfAz3dd, ext2->bfAz3ddWidth,
+ ext2->bfZe3dd, ext2->bfZe3ddWidth,
+ ext2->bfAzSI, ext2->bfZeSI);
+ }
+ break;
+ case XRAN_CP_SECTIONEXTCMD_4:
+ {
+ struct xran_sectionext4_info *ext4;
+ ext4 = result->sections[i].exData[j].data;
+ printf(" || csf=%d modCompScaler=%d\n",
+ ext4->csf, ext4->modCompScaler);
+ }
+ break;
+ case XRAN_CP_SECTIONEXTCMD_5:
+ {
+ struct xran_sectionext5_info *ext5;
+ ext5 = result->sections[i].exData[j].data;
+ printf(" || num_sets=%d\n", ext5->num_sets);
+ for(int k=0; k<ext5->num_sets; k++) {
+ printf(" || %d - csf=%d mcScaleReMask=%04x mcScaleOffset=%04x\n",
+ k, ext5->mc[k].csf,
+ ext5->mc[k].mcScaleReMask, ext5->mc[k].mcScaleOffset);
+ }
+ }
+ break;
+
+ case XRAN_CP_SECTIONEXTCMD_0:
+ case XRAN_CP_SECTIONEXTCMD_3:
+ default:
+ printf("Invalid section extension type!\n");
+ }
+ }
+ }
+ }
+#endif
+
+ return(ret);
+}
+
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/**\r
- * @brief XRAN layer common functionality for both lls-CU and RU as well as C-plane and\r
- * U-plane\r
- * @file xran_common.c\r
- * @ingroup group_source_xran\r
- * @author Intel Corporation\r
- **/\r
-\r
-#include <assert.h>\r
-#include <err.h>\r
-#include <arpa/inet.h>\r
-#include <sys/time.h>\r
-#include <time.h>\r
-\r
-#include "xran_frame_struct.h"\r
-#include "xran_printf.h"\r
-\r
-enum nXranChBwOptions\r
-{\r
- XRAN_BW_5_0_MHZ = 5, XRAN_BW_10_0_MHZ = 10, XRAN_BW_15_0_MHZ = 15, XRAN_BW_20_0_MHZ = 20, XRAN_BW_25_0_MHZ = 25,\r
- XRAN_BW_30_0_MHZ = 30, XRAN_BW_40_0_MHZ = 40, XRAN_BW_50_0_MHZ = 50, XRAN_BW_60_0_MHZ = 60, XRAN_BW_70_0_MHZ = 70,\r
- XRAN_BW_80_0_MHZ = 80, XRAN_BW_90_0_MHZ = 90, XRAN_BW_100_0_MHZ = 100, XRAN_BW_200_0_MHZ = 200, XRAN_BW_400_0_MHZ = 400\r
-};\r
-\r
-// F1 Tables 38.101-1 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB\r
-static uint16_t nNumRbsPerSymF1[3][13] =\r
-{\r
- // 5MHz 10MHz 15MHz 20 MHz 25 MHz 30 MHz 40 MHz 50MHz 60 MHz 70 MHz 80 MHz 90 MHz 100 MHz\r
- {25, 52, 79, 106, 133, 160, 216, 270, 0, 0, 0, 0, 0}, // Numerology 0 (15KHz)\r
- {11, 24, 38, 51, 65, 78, 106, 133, 162, 0, 217, 245, 273}, // Numerology 1 (30KHz)\r
- {0, 11, 18, 24, 31, 38, 51, 65, 79, 0, 107, 121, 135} // Numerology 2 (60KHz)\r
-};\r
-\r
-// F2 Tables 38.101-2 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB\r
-static uint16_t nNumRbsPerSymF2[2][4] =\r
-{\r
- // 50Mhz 100MHz 200MHz 400MHz\r
- {66, 132, 264, 0}, // Numerology 2 (60KHz)\r
- {32, 66, 132, 264} // Numerology 3 (120KHz)\r
-};\r
-\r
-// 38.211 - Table 4.2.1\r
-static uint16_t nSubCarrierSpacing[5] =\r
-{\r
- 15, // mu = 0\r
- 30, // mu = 1\r
- 60, // mu = 2\r
- 120, // mu = 3\r
- 240 // mu = 4\r
-};\r
-\r
-// TTI interval in us (slot duration)\r
-static uint16_t nTtiInterval[4] =\r
-{\r
- 1000, // mu = 0\r
- 500, // mu = 1\r
- 250, // mu = 2\r
- 125, // mu = 3\r
-};\r
-\r
-// F1 Tables 38.101-1 Table F.5.3. Window length for normal CP\r
-static uint16_t nCpSizeF1[3][13][2] =\r
-{\r
- // 5MHz 10MHz 15MHz 20 MHz 25 MHz 30 MHz 40 MHz 50MHz 60 MHz 70 MHz 80 MHz 90 MHz 100 MHz\r
- {{40, 36}, {80, 72}, {120, 108}, {160, 144}, {160, 144}, {240, 216}, {320, 288}, {320, 288}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}}, // Numerology 0 (15KHz)\r
- {{22, 18}, {44, 36}, {66, 54}, {88, 72}, {88, 72}, {132, 108}, {176, 144}, {176, 144}, {264, 216}, {264, 216}, {352, 288}, {352, 288}, {352, 288}}, // Numerology 1 (30KHz)\r
- { {0, 0}, {26, 18}, {39, 27}, {52, 36}, {52, 36}, {78, 54}, {104, 72}, {104, 72}, {156, 108}, {156, 108}, {208, 144}, {208, 144}, {208, 144}}, // Numerology 2 (60KHz)\r
-};\r
-\r
-// F2 Tables 38.101-2 Table F.5.3. Window length for normal CP\r
-static int16_t nCpSizeF2[2][4][2] =\r
-{\r
- // 50Mhz 100MHz 200MHz 400MHz\r
- { {0, 0}, {104, 72}, {208, 144}, {416, 288}}, // Numerology 2 (60KHz)\r
- {{68, 36}, {136, 72}, {272, 144}, {544, 288}}, // Numerology 3 (120KHz)\r
-};\r
-\r
-static uint32_t xran_fs_max_slot_num = 8000;\r
-static uint32_t xran_fs_max_slot_num_SFN = 20480; /* max slot number counted as SFN is 0-1023 */\r
-static uint16_t xran_fs_num_slot_tdd_loop[XRAN_MAX_SECTOR_NR] = { XRAN_NUM_OF_SLOT_IN_TDD_LOOP };\r
-static uint16_t xran_fs_num_dl_sym_sp[XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SLOT_IN_TDD_LOOP] = {0};\r
-static uint16_t xran_fs_num_ul_sym_sp[XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SLOT_IN_TDD_LOOP] = {0};\r
-static uint8_t xran_fs_slot_type[XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SLOT_IN_TDD_LOOP] = {{XRAN_SLOT_TYPE_INVALID}};\r
-static uint8_t xran_fs_slot_symb_type[XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SLOT_IN_TDD_LOOP][XRAN_NUM_OF_SYMBOL_PER_SLOT] = {{{XRAN_SLOT_TYPE_INVALID}}};\r
-static float xran_fs_ul_rate[XRAN_MAX_SECTOR_NR] = {0.0};\r
-static float xran_fs_dl_rate[XRAN_MAX_SECTOR_NR] = {0.0};\r
-\r
-extern uint16_t xran_max_frame;\r
-\r
-uint32_t xran_fs_get_tti_interval(uint8_t nMu)\r
-{\r
- if (nMu < 4)\r
- {\r
- return nTtiInterval[nMu];\r
- }\r
- else\r
- {\r
- printf("ERROR: %s Mu[%d] is not valid, setting to 0\n",__FUNCTION__, nMu);\r
- return nTtiInterval[0];\r
- }\r
-}\r
-\r
-uint32_t xran_fs_get_scs(uint8_t nMu)\r
-{\r
- if (nMu <= 3)\r
- {\r
- return nSubCarrierSpacing[nMu];\r
- }\r
- else\r
- {\r
- printf("ERROR: %s Mu[%d] is not valid\n",__FUNCTION__, nMu);\r
- }\r
-\r
- return 0;\r
-}\r
-\r
-//-------------------------------------------------------------------------------------------\r
-/** @ingroup group_nr5g_source_phy_common\r
- *\r
- * @param[in] nNumerology - Numerology determine sub carrier spacing, Value: 0->4 0: 15khz, 1: 30khz, 2: 60khz 3: 120khz, 4: 240khz\r
- * @param[in] nBandwidth - Carrier bandwidth for in MHz. Value: 5->400\r
- * @param[in] nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
- *\r
- * @return Number of RBs in cell\r
- *\r
- * @description\r
- * Returns number of RBs based on 38.101-1 and 38.101-2 for the cell\r
- *\r
-**/\r
-//-------------------------------------------------------------------------------------------\r
-uint16_t xran_fs_get_num_rbs(uint32_t nNumerology, uint32_t nBandwidth, uint32_t nAbsFrePointA)\r
-{\r
- uint32_t error = 1;\r
- uint16_t numRBs = 0;\r
-\r
- if (nAbsFrePointA <= 6000000)\r
- {\r
- // F1 Tables 38.101-1 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB\r
- if (nNumerology < 3)\r
- {\r
- switch(nBandwidth)\r
- {\r
- case XRAN_BW_5_0_MHZ:\r
- numRBs = nNumRbsPerSymF1[nNumerology][0];\r
- error = 0;\r
- break;\r
- case XRAN_BW_10_0_MHZ:\r
- numRBs = nNumRbsPerSymF1[nNumerology][1];\r
- error = 0;\r
- break;\r
- case XRAN_BW_15_0_MHZ:\r
- numRBs = nNumRbsPerSymF1[nNumerology][2];\r
- error = 0;\r
- break;\r
- case XRAN_BW_20_0_MHZ:\r
- numRBs = nNumRbsPerSymF1[nNumerology][3];\r
- error = 0;\r
- break;\r
- case XRAN_BW_25_0_MHZ:\r
- numRBs = nNumRbsPerSymF1[nNumerology][4];\r
- error = 0;\r
- break;\r
- case XRAN_BW_30_0_MHZ:\r
- numRBs = nNumRbsPerSymF1[nNumerology][5];\r
- error = 0;\r
- break;\r
- case XRAN_BW_40_0_MHZ:\r
- numRBs = nNumRbsPerSymF1[nNumerology][6];\r
- error = 0;\r
- break;\r
- case XRAN_BW_50_0_MHZ:\r
- numRBs = nNumRbsPerSymF1[nNumerology][7];\r
- error = 0;\r
- break;\r
- case XRAN_BW_60_0_MHZ:\r
- numRBs = nNumRbsPerSymF1[nNumerology][8];\r
- error = 0;\r
- break;\r
- case XRAN_BW_70_0_MHZ:\r
- numRBs = nNumRbsPerSymF1[nNumerology][9];\r
- error = 0;\r
- break;\r
- case XRAN_BW_80_0_MHZ:\r
- numRBs = nNumRbsPerSymF1[nNumerology][10];\r
- error = 0;\r
- break;\r
- case XRAN_BW_90_0_MHZ:\r
- numRBs = nNumRbsPerSymF1[nNumerology][11];\r
- error = 0;\r
- break;\r
- case XRAN_BW_100_0_MHZ:\r
- numRBs = nNumRbsPerSymF1[nNumerology][12];\r
- error = 0;\r
- break;\r
- default:\r
- error = 1;\r
- break;\r
- }\r
- }\r
- }\r
- else\r
- {\r
- if ((nNumerology >= 2) && (nNumerology <= 3))\r
- {\r
- // F2 Tables 38.101-2 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB\r
- switch(nBandwidth)\r
- {\r
- case XRAN_BW_50_0_MHZ:\r
- numRBs = nNumRbsPerSymF2[nNumerology-2][0];\r
- error = 0;\r
- break;\r
- case XRAN_BW_100_0_MHZ:\r
- numRBs = nNumRbsPerSymF2[nNumerology-2][1];\r
- error = 0;\r
- break;\r
- case XRAN_BW_200_0_MHZ:\r
- numRBs = nNumRbsPerSymF2[nNumerology-2][2];\r
- error = 0;\r
- break;\r
- case XRAN_BW_400_0_MHZ:\r
- numRBs = nNumRbsPerSymF2[nNumerology-2][3];\r
- error = 0;\r
- break;\r
- default:\r
- error = 1;\r
- break;\r
- }\r
- }\r
- }\r
-\r
-\r
- if (error)\r
- {\r
- printf("ERROR: %s: nNumerology[%d] nBandwidth[%d] nAbsFrePointA[%d]\n",__FUNCTION__, nNumerology, nBandwidth, nAbsFrePointA);\r
- }\r
- else\r
- {\r
- printf("%s: nNumerology[%d] nBandwidth[%d] nAbsFrePointA[%d] numRBs[%d]\n",__FUNCTION__, nNumerology, nBandwidth, nAbsFrePointA, numRBs);\r
- }\r
-\r
- return numRBs;\r
-}\r
-\r
-//-------------------------------------------------------------------------------------------\r
-/** @ingroup phy_cal_nrarfcn\r
- *\r
- * @param[in] center frequency\r
- *\r
- * @return NR-ARFCN\r
- *\r
- * @description\r
- * This calculates NR-ARFCN value according to center frequency\r
- *\r
-**/\r
-//-------------------------------------------------------------------------------------------\r
-uint32_t xran_fs_cal_nrarfcn(uint32_t nCenterFreq)\r
-{\r
- uint32_t nDeltaFglobal,nFoffs,nNoffs;\r
- uint32_t nNRARFCN = 0;\r
-\r
- if(nCenterFreq > 0 && nCenterFreq < 3000*1000)\r
- {\r
- nDeltaFglobal = 5;\r
- nFoffs = 0;\r
- nNoffs = 0;\r
- }\r
- else if(nCenterFreq >= 3000*1000 && nCenterFreq < 24250*1000)\r
- {\r
- nDeltaFglobal = 15;\r
- nFoffs = 3000*1000;\r
- nNoffs = 600000;\r
- }\r
- else if(nCenterFreq >= 24250*1000 && nCenterFreq <= 100000*1000)\r
- {\r
- nDeltaFglobal = 60;\r
- nFoffs = 24250080;\r
- nNoffs = 2016667;\r
- }\r
- else\r
- {\r
- printf("@@@@ incorrect center frerquency %d\n",nCenterFreq);\r
- return (0);\r
- }\r
-\r
- nNRARFCN = ((nCenterFreq - nFoffs)/nDeltaFglobal) + nNoffs;\r
-\r
- printf("%s: nCenterFreq[%d] nDeltaFglobal[%d] nFoffs[%d] nNoffs[%d] nNRARFCN[%d]\n", __FUNCTION__, nCenterFreq, nDeltaFglobal, nFoffs, nNoffs, nNRARFCN);\r
- return (nNRARFCN);\r
-}\r
-\r
-uint32_t xran_fs_slot_limit_init(int32_t tti_interval_us)\r
-{\r
- xran_fs_max_slot_num = (1000/tti_interval_us)*1000;\r
- xran_fs_max_slot_num_SFN = (1000/tti_interval_us)*(xran_max_frame+1)*10;\r
- return xran_fs_max_slot_num;\r
-}\r
-\r
-uint32_t xran_fs_get_max_slot(void)\r
-{\r
- return xran_fs_max_slot_num;\r
-}\r
-\r
-uint32_t xran_fs_get_max_slot_SFN(void)\r
-{\r
- return xran_fs_max_slot_num_SFN;\r
-}\r
-\r
-int32_t xran_fs_slot_limit(int32_t nSfIdx)\r
-{\r
- while (nSfIdx < 0) {\r
- nSfIdx += xran_fs_max_slot_num;\r
- }\r
-\r
- while (nSfIdx >= xran_fs_max_slot_num) {\r
- nSfIdx -= xran_fs_max_slot_num;\r
- }\r
-\r
- return nSfIdx;\r
-}\r
-\r
-void xran_fs_clear_slot_type(uint32_t nPhyInstanceId)\r
-{\r
- xran_fs_ul_rate[nPhyInstanceId] = 0.0;\r
- xran_fs_dl_rate[nPhyInstanceId] = 0.0;\r
- xran_fs_num_slot_tdd_loop[nPhyInstanceId] = 1;\r
-}\r
-\r
-int32_t xran_fs_set_slot_type(uint32_t nPhyInstanceId, uint32_t nFrameDuplexType, uint32_t nTddPeriod, struct xran_slot_config* psSlotConfig)\r
-{\r
- uint32_t nSlotNum, nSymNum, nVal, i, j;\r
- uint32_t numDlSym, numUlSym, numGuardSym;\r
- uint32_t numDlSlots = 0, numUlSlots = 0, numSpDlSlots = 0, numSpUlSlots = 0, numSpSlots = 0;\r
- char sSlotPattern[XRAN_SLOT_TYPE_LAST][10] = {"IN\0", "DL\0", "UL\0", "SP\0", "FD\0"};\r
-\r
- // nPhyInstanceId Carrier ID\r
- // nFrameDuplexType 0 = FDD 1 = TDD\r
- // nTddPeriod Tdd Periodicity\r
- // psSlotConfig[80] Slot Config Structure for nTddPeriod Slots\r
-\r
- xran_fs_ul_rate[nPhyInstanceId] = 0.0;\r
- xran_fs_dl_rate[nPhyInstanceId] = 0.0;\r
- xran_fs_num_slot_tdd_loop[nPhyInstanceId] = nTddPeriod;\r
-\r
- for (i = 0; i < XRAN_NUM_OF_SLOT_IN_TDD_LOOP; i++)\r
- {\r
- xran_fs_slot_type[nPhyInstanceId][i] = XRAN_SLOT_TYPE_INVALID;\r
- xran_fs_num_dl_sym_sp[nPhyInstanceId][i] = 0;\r
- xran_fs_num_ul_sym_sp[nPhyInstanceId][i] = 0;\r
- }\r
-\r
- if (nFrameDuplexType == XRAN_FDD)\r
- {\r
- for (i = 0; i < XRAN_NUM_OF_SLOT_IN_TDD_LOOP; i++)\r
- {\r
- xran_fs_slot_type[nPhyInstanceId][i] = XRAN_SLOT_TYPE_FDD;\r
- for(j = 0; j < XRAN_NUM_OF_SYMBOL_PER_SLOT; j++)\r
- xran_fs_slot_symb_type[nPhyInstanceId][i][j] = XRAN_SYMBOL_TYPE_FDD;\r
- }\r
- xran_fs_num_slot_tdd_loop[nPhyInstanceId] = 1;\r
- xran_fs_dl_rate[nPhyInstanceId] = 1.0;\r
- xran_fs_ul_rate[nPhyInstanceId] = 1.0;\r
- }\r
- else\r
- {\r
- for (nSlotNum = 0; nSlotNum < nTddPeriod; nSlotNum++)\r
- {\r
- numDlSym = 0;\r
- numUlSym = 0;\r
- numGuardSym = 0;\r
- for (nSymNum = 0; nSymNum < XRAN_NUM_OF_SYMBOL_PER_SLOT; nSymNum++)\r
- {\r
- switch(psSlotConfig[nSlotNum].nSymbolType[nSymNum])\r
- {\r
- case XRAN_SYMBOL_TYPE_DL:\r
- numDlSym++;\r
- xran_fs_slot_symb_type[nPhyInstanceId][nSlotNum][nSymNum] = XRAN_SYMBOL_TYPE_DL;\r
- break;\r
- case XRAN_SYMBOL_TYPE_GUARD:\r
- xran_fs_slot_symb_type[nPhyInstanceId][nSlotNum][nSymNum] = XRAN_SYMBOL_TYPE_GUARD;\r
- numGuardSym++;\r
- break;\r
- default:\r
- xran_fs_slot_symb_type[nPhyInstanceId][nSlotNum][nSymNum] = XRAN_SYMBOL_TYPE_UL;\r
- numUlSym++;\r
- break;\r
- }\r
- }\r
-\r
- print_dbg("nSlotNum[%d] : numDlSym[%d] numGuardSym[%d] numUlSym[%d] ", nSlotNum, numDlSym, numGuardSym, numUlSym);\r
-\r
- if ((numUlSym == 0) && (numGuardSym == 0))\r
- {\r
- xran_fs_slot_type[nPhyInstanceId][nSlotNum] = XRAN_SLOT_TYPE_DL;\r
- numDlSlots++;\r
- print_dbg("XRAN_SLOT_TYPE_DL\n");\r
- }\r
- else if ((numDlSym == 0) && (numGuardSym == 0))\r
- {\r
- xran_fs_slot_type[nPhyInstanceId][nSlotNum] = XRAN_SLOT_TYPE_UL;\r
- numUlSlots++;\r
- print_dbg("XRAN_SLOT_TYPE_UL\n");\r
- }\r
- else\r
- {\r
- xran_fs_slot_type[nPhyInstanceId][nSlotNum] = XRAN_SLOT_TYPE_SP;\r
- numSpSlots++;\r
- print_dbg("XRAN_SLOT_TYPE_SP\n");\r
-\r
- if (numDlSym)\r
- {\r
- numSpDlSlots++;\r
- xran_fs_num_dl_sym_sp[nPhyInstanceId][nSlotNum] = numDlSym;\r
- }\r
- if (numUlSym)\r
- {\r
- numSpUlSlots++;\r
- xran_fs_num_ul_sym_sp[nPhyInstanceId][nSlotNum] = numUlSym;\r
- }\r
- }\r
- print_dbg(" numDlSlots[%d] numUlSlots[%d] numSpSlots[%d] numSpDlSlots[%d] numSpUlSlots[%d]\n", numDlSlots, numUlSlots, numSpSlots, numSpDlSlots, numSpUlSlots);\r
- }\r
-\r
- xran_fs_dl_rate[nPhyInstanceId] = (float)(numDlSlots + numSpDlSlots) / (float)nTddPeriod;\r
- xran_fs_ul_rate[nPhyInstanceId] = (float)(numUlSlots + numSpUlSlots) / (float)nTddPeriod;\r
- }\r
-\r
- print_dbg("%s: nPhyInstanceId[%d] nFrameDuplexType[%d], nTddPeriod[%d]\n",\r
- __FUNCTION__, nPhyInstanceId, nFrameDuplexType, nTddPeriod);\r
-\r
- print_dbg("DLRate[%f] ULRate[%f]\n", xran_fs_dl_rate[nPhyInstanceId], xran_fs_ul_rate[nPhyInstanceId]);\r
-\r
- nVal = (xran_fs_num_slot_tdd_loop[nPhyInstanceId] < 10) ? xran_fs_num_slot_tdd_loop[nPhyInstanceId] : 10;\r
-\r
- print_dbg("SlotPattern:\n");\r
- print_dbg("Slot: ");\r
- for (nSlotNum = 0; nSlotNum < nVal; nSlotNum++)\r
- {\r
- print_dbg("%d ", nSlotNum);\r
- }\r
- print_dbg("\n");\r
-\r
- print_dbg(" %3d ", 0);\r
- for (nSlotNum = 0, i = 0; nSlotNum < xran_fs_num_slot_tdd_loop[nPhyInstanceId]; nSlotNum++)\r
- {\r
- print_dbg("%s ", sSlotPattern[xran_fs_slot_type[nPhyInstanceId][nSlotNum]]);\r
- i++;\r
- if ((i == 10) && ((nSlotNum+1) < xran_fs_num_slot_tdd_loop[nPhyInstanceId]))\r
- {\r
- print_dbg("\n");\r
- print_dbg(" %3d ", nSlotNum);\r
- i = 0;\r
- }\r
- }\r
- print_dbg("\n\n");\r
-\r
- return 0;\r
-}\r
-\r
-int32_t xran_fs_get_slot_type(int32_t nCellIdx, int32_t nSlotdx, int32_t nType)\r
-{\r
- int32_t nSfIdxMod, nSfType, ret = 0;\r
-\r
- nSfIdxMod = xran_fs_slot_limit(nSlotdx) % ((xran_fs_num_slot_tdd_loop[nCellIdx] > 0) ? xran_fs_num_slot_tdd_loop[nCellIdx]: 1);\r
- nSfType = xran_fs_slot_type[nCellIdx][nSfIdxMod];\r
-\r
- if (nSfType == nType)\r
- {\r
- ret = 1;\r
- }\r
- else if (nSfType == XRAN_SLOT_TYPE_SP)\r
- {\r
- if ((nType == XRAN_SLOT_TYPE_DL) && xran_fs_num_dl_sym_sp[nCellIdx][nSfIdxMod])\r
- {\r
- ret = 1;\r
- }\r
-\r
- if ((nType == XRAN_SLOT_TYPE_UL) && xran_fs_num_ul_sym_sp[nCellIdx][nSfIdxMod])\r
- {\r
- ret = 1;\r
- }\r
- }\r
- else if (nSfType == XRAN_SLOT_TYPE_FDD)\r
- {\r
- ret = 1;\r
- }\r
-\r
- return ret;\r
-}\r
-\r
-int32_t xran_fs_get_symbol_type(int32_t nCellIdx, int32_t nSlotdx, int32_t nSymbIdx)\r
-{\r
- int32_t nSfIdxMod, nSfType, ret = 0;\r
-\r
- nSfIdxMod = xran_fs_slot_limit(nSlotdx) % ((xran_fs_num_slot_tdd_loop[nCellIdx] > 0) ? xran_fs_num_slot_tdd_loop[nCellIdx]: 1);\r
-\r
- return xran_fs_slot_symb_type[nCellIdx][nSfIdxMod][nSymbIdx];\r
-}\r
-\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief XRAN layer common functionality for both lls-CU and RU as well as C-plane and
+ * U-plane
+ * @file xran_common.c
+ * @ingroup group_source_xran
+ * @author Intel Corporation
+ **/
+
+#include <assert.h>
+#include <err.h>
+#include <arpa/inet.h>
+#include <sys/time.h>
+#include <time.h>
+
+#include "xran_frame_struct.h"
+#include "xran_printf.h"
+
+enum nXranChBwOptions
+{
+ XRAN_BW_5_0_MHZ = 5, XRAN_BW_10_0_MHZ = 10, XRAN_BW_15_0_MHZ = 15, XRAN_BW_20_0_MHZ = 20, XRAN_BW_25_0_MHZ = 25,
+ XRAN_BW_30_0_MHZ = 30, XRAN_BW_40_0_MHZ = 40, XRAN_BW_50_0_MHZ = 50, XRAN_BW_60_0_MHZ = 60, XRAN_BW_70_0_MHZ = 70,
+ XRAN_BW_80_0_MHZ = 80, XRAN_BW_90_0_MHZ = 90, XRAN_BW_100_0_MHZ = 100, XRAN_BW_200_0_MHZ = 200, XRAN_BW_400_0_MHZ = 400
+};
+
+// F1 Tables 38.101-1 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB
+static uint16_t nNumRbsPerSymF1[3][13] =
+{
+ // 5MHz 10MHz 15MHz 20 MHz 25 MHz 30 MHz 40 MHz 50MHz 60 MHz 70 MHz 80 MHz 90 MHz 100 MHz
+ {25, 52, 79, 106, 133, 160, 216, 270, 0, 0, 0, 0, 0}, // Numerology 0 (15KHz)
+ {11, 24, 38, 51, 65, 78, 106, 133, 162, 0, 217, 245, 273}, // Numerology 1 (30KHz)
+ {0, 11, 18, 24, 31, 38, 51, 65, 79, 0, 107, 121, 135} // Numerology 2 (60KHz)
+};
+
+// F2 Tables 38.101-2 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB
+static uint16_t nNumRbsPerSymF2[2][4] =
+{
+ // 50Mhz 100MHz 200MHz 400MHz
+ {66, 132, 264, 0}, // Numerology 2 (60KHz)
+ {32, 66, 132, 264} // Numerology 3 (120KHz)
+};
+
+// 38.211 - Table 4.2.1
+static uint16_t nSubCarrierSpacing[5] =
+{
+ 15, // mu = 0
+ 30, // mu = 1
+ 60, // mu = 2
+ 120, // mu = 3
+ 240 // mu = 4
+};
+
+// TTI interval in us (slot duration)
+static uint16_t nTtiInterval[4] =
+{
+ 1000, // mu = 0
+ 500, // mu = 1
+ 250, // mu = 2
+ 125, // mu = 3
+};
+
+// F1 Tables 38.101-1 Table F.5.3. Window length for normal CP
+static uint16_t nCpSizeF1[3][13][2] =
+{
+ // 5MHz 10MHz 15MHz 20 MHz 25 MHz 30 MHz 40 MHz 50MHz 60 MHz 70 MHz 80 MHz 90 MHz 100 MHz
+ {{40, 36}, {80, 72}, {120, 108}, {160, 144}, {160, 144}, {240, 216}, {320, 288}, {320, 288}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}}, // Numerology 0 (15KHz)
+ {{22, 18}, {44, 36}, {66, 54}, {88, 72}, {88, 72}, {132, 108}, {176, 144}, {176, 144}, {264, 216}, {264, 216}, {352, 288}, {352, 288}, {352, 288}}, // Numerology 1 (30KHz)
+ { {0, 0}, {26, 18}, {39, 27}, {52, 36}, {52, 36}, {78, 54}, {104, 72}, {104, 72}, {156, 108}, {156, 108}, {208, 144}, {208, 144}, {208, 144}}, // Numerology 2 (60KHz)
+};
+
+// F2 Tables 38.101-2 Table F.5.3. Window length for normal CP
+static int16_t nCpSizeF2[2][4][2] =
+{
+ // 50Mhz 100MHz 200MHz 400MHz
+ { {0, 0}, {104, 72}, {208, 144}, {416, 288}}, // Numerology 2 (60KHz)
+ {{68, 36}, {136, 72}, {272, 144}, {544, 288}}, // Numerology 3 (120KHz)
+};
+
+static uint32_t xran_fs_max_slot_num = 8000;
+static uint32_t xran_fs_max_slot_num_SFN = 20480; /* max slot number counted as SFN is 0-1023 */
+static uint16_t xran_fs_num_slot_tdd_loop[XRAN_MAX_SECTOR_NR] = { XRAN_NUM_OF_SLOT_IN_TDD_LOOP };
+static uint16_t xran_fs_num_dl_sym_sp[XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SLOT_IN_TDD_LOOP] = {0};
+static uint16_t xran_fs_num_ul_sym_sp[XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SLOT_IN_TDD_LOOP] = {0};
+static uint8_t xran_fs_slot_type[XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SLOT_IN_TDD_LOOP] = {{XRAN_SLOT_TYPE_INVALID}};
+static uint8_t xran_fs_slot_symb_type[XRAN_MAX_SECTOR_NR][XRAN_NUM_OF_SLOT_IN_TDD_LOOP][XRAN_NUM_OF_SYMBOL_PER_SLOT] = {{{XRAN_SLOT_TYPE_INVALID}}};
+static float xran_fs_ul_rate[XRAN_MAX_SECTOR_NR] = {0.0};
+static float xran_fs_dl_rate[XRAN_MAX_SECTOR_NR] = {0.0};
+
+extern uint16_t xran_max_frame;
+
+uint32_t xran_fs_get_tti_interval(uint8_t nMu)
+{
+ if (nMu < 4)
+ {
+ return nTtiInterval[nMu];
+ }
+ else
+ {
+ printf("ERROR: %s Mu[%d] is not valid, setting to 0\n",__FUNCTION__, nMu);
+ return nTtiInterval[0];
+ }
+}
+
+uint32_t xran_fs_get_scs(uint8_t nMu)
+{
+ if (nMu <= 3)
+ {
+ return nSubCarrierSpacing[nMu];
+ }
+ else
+ {
+ printf("ERROR: %s Mu[%d] is not valid\n",__FUNCTION__, nMu);
+ }
+
+ return 0;
+}
+
+//-------------------------------------------------------------------------------------------
+/** @ingroup group_nr5g_source_phy_common
+ *
+ * @param[in] nNumerology - Numerology determine sub carrier spacing, Value: 0->4 0: 15khz, 1: 30khz, 2: 60khz 3: 120khz, 4: 240khz
+ * @param[in] nBandwidth - Carrier bandwidth for in MHz. Value: 5->400
+ * @param[in] nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+ *
+ * @return Number of RBs in cell
+ *
+ * @description
+ * Returns number of RBs based on 38.101-1 and 38.101-2 for the cell
+ *
+**/
+//-------------------------------------------------------------------------------------------
+uint16_t xran_fs_get_num_rbs(uint32_t nNumerology, uint32_t nBandwidth, uint32_t nAbsFrePointA)
+{
+ uint32_t error = 1;
+ uint16_t numRBs = 0;
+
+ if (nAbsFrePointA <= 6000000)
+ {
+ // F1 Tables 38.101-1 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB
+ if (nNumerology < 3)
+ {
+ switch(nBandwidth)
+ {
+ case XRAN_BW_5_0_MHZ:
+ numRBs = nNumRbsPerSymF1[nNumerology][0];
+ error = 0;
+ break;
+ case XRAN_BW_10_0_MHZ:
+ numRBs = nNumRbsPerSymF1[nNumerology][1];
+ error = 0;
+ break;
+ case XRAN_BW_15_0_MHZ:
+ numRBs = nNumRbsPerSymF1[nNumerology][2];
+ error = 0;
+ break;
+ case XRAN_BW_20_0_MHZ:
+ numRBs = nNumRbsPerSymF1[nNumerology][3];
+ error = 0;
+ break;
+ case XRAN_BW_25_0_MHZ:
+ numRBs = nNumRbsPerSymF1[nNumerology][4];
+ error = 0;
+ break;
+ case XRAN_BW_30_0_MHZ:
+ numRBs = nNumRbsPerSymF1[nNumerology][5];
+ error = 0;
+ break;
+ case XRAN_BW_40_0_MHZ:
+ numRBs = nNumRbsPerSymF1[nNumerology][6];
+ error = 0;
+ break;
+ case XRAN_BW_50_0_MHZ:
+ numRBs = nNumRbsPerSymF1[nNumerology][7];
+ error = 0;
+ break;
+ case XRAN_BW_60_0_MHZ:
+ numRBs = nNumRbsPerSymF1[nNumerology][8];
+ error = 0;
+ break;
+ case XRAN_BW_70_0_MHZ:
+ numRBs = nNumRbsPerSymF1[nNumerology][9];
+ error = 0;
+ break;
+ case XRAN_BW_80_0_MHZ:
+ numRBs = nNumRbsPerSymF1[nNumerology][10];
+ error = 0;
+ break;
+ case XRAN_BW_90_0_MHZ:
+ numRBs = nNumRbsPerSymF1[nNumerology][11];
+ error = 0;
+ break;
+ case XRAN_BW_100_0_MHZ:
+ numRBs = nNumRbsPerSymF1[nNumerology][12];
+ error = 0;
+ break;
+ default:
+ error = 1;
+ break;
+ }
+ }
+ }
+ else
+ {
+ if ((nNumerology >= 2) && (nNumerology <= 3))
+ {
+ // F2 Tables 38.101-2 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB
+ switch(nBandwidth)
+ {
+ case XRAN_BW_50_0_MHZ:
+ numRBs = nNumRbsPerSymF2[nNumerology-2][0];
+ error = 0;
+ break;
+ case XRAN_BW_100_0_MHZ:
+ numRBs = nNumRbsPerSymF2[nNumerology-2][1];
+ error = 0;
+ break;
+ case XRAN_BW_200_0_MHZ:
+ numRBs = nNumRbsPerSymF2[nNumerology-2][2];
+ error = 0;
+ break;
+ case XRAN_BW_400_0_MHZ:
+ numRBs = nNumRbsPerSymF2[nNumerology-2][3];
+ error = 0;
+ break;
+ default:
+ error = 1;
+ break;
+ }
+ }
+ }
+
+
+ if (error)
+ {
+ printf("ERROR: %s: nNumerology[%d] nBandwidth[%d] nAbsFrePointA[%d]\n",__FUNCTION__, nNumerology, nBandwidth, nAbsFrePointA);
+ }
+ else
+ {
+ printf("%s: nNumerology[%d] nBandwidth[%d] nAbsFrePointA[%d] numRBs[%d]\n",__FUNCTION__, nNumerology, nBandwidth, nAbsFrePointA, numRBs);
+ }
+
+ return numRBs;
+}
+
+//-------------------------------------------------------------------------------------------
+/** @ingroup phy_cal_nrarfcn
+ *
+ * @param[in] center frequency
+ *
+ * @return NR-ARFCN
+ *
+ * @description
+ * This calculates NR-ARFCN value according to center frequency
+ *
+**/
+//-------------------------------------------------------------------------------------------
+uint32_t xran_fs_cal_nrarfcn(uint32_t nCenterFreq)
+{
+ uint32_t nDeltaFglobal,nFoffs,nNoffs;
+ uint32_t nNRARFCN = 0;
+
+ if(nCenterFreq > 0 && nCenterFreq < 3000*1000)
+ {
+ nDeltaFglobal = 5;
+ nFoffs = 0;
+ nNoffs = 0;
+ }
+ else if(nCenterFreq >= 3000*1000 && nCenterFreq < 24250*1000)
+ {
+ nDeltaFglobal = 15;
+ nFoffs = 3000*1000;
+ nNoffs = 600000;
+ }
+ else if(nCenterFreq >= 24250*1000 && nCenterFreq <= 100000*1000)
+ {
+ nDeltaFglobal = 60;
+ nFoffs = 24250080;
+ nNoffs = 2016667;
+ }
+ else
+ {
+ printf("@@@@ incorrect center frerquency %d\n",nCenterFreq);
+ return (0);
+ }
+
+ nNRARFCN = ((nCenterFreq - nFoffs)/nDeltaFglobal) + nNoffs;
+
+ printf("%s: nCenterFreq[%d] nDeltaFglobal[%d] nFoffs[%d] nNoffs[%d] nNRARFCN[%d]\n", __FUNCTION__, nCenterFreq, nDeltaFglobal, nFoffs, nNoffs, nNRARFCN);
+ return (nNRARFCN);
+}
+
+uint32_t xran_fs_slot_limit_init(int32_t tti_interval_us)
+{
+ xran_fs_max_slot_num = (1000/tti_interval_us)*1000;
+ xran_fs_max_slot_num_SFN = (1000/tti_interval_us)*(xran_max_frame+1)*10;
+ return xran_fs_max_slot_num;
+}
+
+uint32_t xran_fs_get_max_slot(void)
+{
+ return xran_fs_max_slot_num;
+}
+
+uint32_t xran_fs_get_max_slot_SFN(void)
+{
+ return xran_fs_max_slot_num_SFN;
+}
+
+int32_t xran_fs_slot_limit(int32_t nSfIdx)
+{
+ while (nSfIdx < 0) {
+ nSfIdx += xran_fs_max_slot_num;
+ }
+
+ while (nSfIdx >= xran_fs_max_slot_num) {
+ nSfIdx -= xran_fs_max_slot_num;
+ }
+
+ return nSfIdx;
+}
+
+void xran_fs_clear_slot_type(uint32_t nPhyInstanceId)
+{
+ xran_fs_ul_rate[nPhyInstanceId] = 0.0;
+ xran_fs_dl_rate[nPhyInstanceId] = 0.0;
+ xran_fs_num_slot_tdd_loop[nPhyInstanceId] = 1;
+}
+
+int32_t xran_fs_set_slot_type(uint32_t nPhyInstanceId, uint32_t nFrameDuplexType, uint32_t nTddPeriod, struct xran_slot_config* psSlotConfig)
+{
+ uint32_t nSlotNum, nSymNum, nVal, i, j;
+ uint32_t numDlSym, numUlSym, numGuardSym;
+ uint32_t numDlSlots = 0, numUlSlots = 0, numSpDlSlots = 0, numSpUlSlots = 0, numSpSlots = 0;
+ char sSlotPattern[XRAN_SLOT_TYPE_LAST][10] = {"IN\0", "DL\0", "UL\0", "SP\0", "FD\0"};
+
+ // nPhyInstanceId Carrier ID
+ // nFrameDuplexType 0 = FDD 1 = TDD
+ // nTddPeriod Tdd Periodicity
+ // psSlotConfig[80] Slot Config Structure for nTddPeriod Slots
+
+ xran_fs_ul_rate[nPhyInstanceId] = 0.0;
+ xran_fs_dl_rate[nPhyInstanceId] = 0.0;
+ xran_fs_num_slot_tdd_loop[nPhyInstanceId] = nTddPeriod;
+
+ for (i = 0; i < XRAN_NUM_OF_SLOT_IN_TDD_LOOP; i++)
+ {
+ xran_fs_slot_type[nPhyInstanceId][i] = XRAN_SLOT_TYPE_INVALID;
+ xran_fs_num_dl_sym_sp[nPhyInstanceId][i] = 0;
+ xran_fs_num_ul_sym_sp[nPhyInstanceId][i] = 0;
+ }
+
+ if (nFrameDuplexType == XRAN_FDD)
+ {
+ for (i = 0; i < XRAN_NUM_OF_SLOT_IN_TDD_LOOP; i++)
+ {
+ xran_fs_slot_type[nPhyInstanceId][i] = XRAN_SLOT_TYPE_FDD;
+ for(j = 0; j < XRAN_NUM_OF_SYMBOL_PER_SLOT; j++)
+ xran_fs_slot_symb_type[nPhyInstanceId][i][j] = XRAN_SYMBOL_TYPE_FDD;
+ }
+ xran_fs_num_slot_tdd_loop[nPhyInstanceId] = 1;
+ xran_fs_dl_rate[nPhyInstanceId] = 1.0;
+ xran_fs_ul_rate[nPhyInstanceId] = 1.0;
+ }
+ else
+ {
+ for (nSlotNum = 0; nSlotNum < nTddPeriod; nSlotNum++)
+ {
+ numDlSym = 0;
+ numUlSym = 0;
+ numGuardSym = 0;
+ for (nSymNum = 0; nSymNum < XRAN_NUM_OF_SYMBOL_PER_SLOT; nSymNum++)
+ {
+ switch(psSlotConfig[nSlotNum].nSymbolType[nSymNum])
+ {
+ case XRAN_SYMBOL_TYPE_DL:
+ numDlSym++;
+ xran_fs_slot_symb_type[nPhyInstanceId][nSlotNum][nSymNum] = XRAN_SYMBOL_TYPE_DL;
+ break;
+ case XRAN_SYMBOL_TYPE_GUARD:
+ xran_fs_slot_symb_type[nPhyInstanceId][nSlotNum][nSymNum] = XRAN_SYMBOL_TYPE_GUARD;
+ numGuardSym++;
+ break;
+ default:
+ xran_fs_slot_symb_type[nPhyInstanceId][nSlotNum][nSymNum] = XRAN_SYMBOL_TYPE_UL;
+ numUlSym++;
+ break;
+ }
+ }
+
+ print_dbg("nSlotNum[%d] : numDlSym[%d] numGuardSym[%d] numUlSym[%d] ", nSlotNum, numDlSym, numGuardSym, numUlSym);
+
+ if ((numUlSym == 0) && (numGuardSym == 0))
+ {
+ xran_fs_slot_type[nPhyInstanceId][nSlotNum] = XRAN_SLOT_TYPE_DL;
+ numDlSlots++;
+ print_dbg("XRAN_SLOT_TYPE_DL\n");
+ }
+ else if ((numDlSym == 0) && (numGuardSym == 0))
+ {
+ xran_fs_slot_type[nPhyInstanceId][nSlotNum] = XRAN_SLOT_TYPE_UL;
+ numUlSlots++;
+ print_dbg("XRAN_SLOT_TYPE_UL\n");
+ }
+ else
+ {
+ xran_fs_slot_type[nPhyInstanceId][nSlotNum] = XRAN_SLOT_TYPE_SP;
+ numSpSlots++;
+ print_dbg("XRAN_SLOT_TYPE_SP\n");
+
+ if (numDlSym)
+ {
+ numSpDlSlots++;
+ xran_fs_num_dl_sym_sp[nPhyInstanceId][nSlotNum] = numDlSym;
+ }
+ if (numUlSym)
+ {
+ numSpUlSlots++;
+ xran_fs_num_ul_sym_sp[nPhyInstanceId][nSlotNum] = numUlSym;
+ }
+ }
+ print_dbg(" numDlSlots[%d] numUlSlots[%d] numSpSlots[%d] numSpDlSlots[%d] numSpUlSlots[%d]\n", numDlSlots, numUlSlots, numSpSlots, numSpDlSlots, numSpUlSlots);
+ }
+
+ xran_fs_dl_rate[nPhyInstanceId] = (float)(numDlSlots + numSpDlSlots) / (float)nTddPeriod;
+ xran_fs_ul_rate[nPhyInstanceId] = (float)(numUlSlots + numSpUlSlots) / (float)nTddPeriod;
+ }
+
+ print_dbg("%s: nPhyInstanceId[%d] nFrameDuplexType[%d], nTddPeriod[%d]\n",
+ __FUNCTION__, nPhyInstanceId, nFrameDuplexType, nTddPeriod);
+
+ print_dbg("DLRate[%f] ULRate[%f]\n", xran_fs_dl_rate[nPhyInstanceId], xran_fs_ul_rate[nPhyInstanceId]);
+
+ nVal = (xran_fs_num_slot_tdd_loop[nPhyInstanceId] < 10) ? xran_fs_num_slot_tdd_loop[nPhyInstanceId] : 10;
+
+ print_dbg("SlotPattern:\n");
+ print_dbg("Slot: ");
+ for (nSlotNum = 0; nSlotNum < nVal; nSlotNum++)
+ {
+ print_dbg("%d ", nSlotNum);
+ }
+ print_dbg("\n");
+
+ print_dbg(" %3d ", 0);
+ for (nSlotNum = 0, i = 0; nSlotNum < xran_fs_num_slot_tdd_loop[nPhyInstanceId]; nSlotNum++)
+ {
+ print_dbg("%s ", sSlotPattern[xran_fs_slot_type[nPhyInstanceId][nSlotNum]]);
+ i++;
+ if ((i == 10) && ((nSlotNum+1) < xran_fs_num_slot_tdd_loop[nPhyInstanceId]))
+ {
+ print_dbg("\n");
+ print_dbg(" %3d ", nSlotNum);
+ i = 0;
+ }
+ }
+ print_dbg("\n\n");
+
+ return 0;
+}
+
+int32_t xran_fs_get_slot_type(int32_t nCellIdx, int32_t nSlotdx, int32_t nType)
+{
+ int32_t nSfIdxMod, nSfType, ret = 0;
+
+ nSfIdxMod = xran_fs_slot_limit(nSlotdx) % ((xran_fs_num_slot_tdd_loop[nCellIdx] > 0) ? xran_fs_num_slot_tdd_loop[nCellIdx]: 1);
+ nSfType = xran_fs_slot_type[nCellIdx][nSfIdxMod];
+
+ if (nSfType == nType)
+ {
+ ret = 1;
+ }
+ else if (nSfType == XRAN_SLOT_TYPE_SP)
+ {
+ if ((nType == XRAN_SLOT_TYPE_DL) && xran_fs_num_dl_sym_sp[nCellIdx][nSfIdxMod])
+ {
+ ret = 1;
+ }
+
+ if ((nType == XRAN_SLOT_TYPE_UL) && xran_fs_num_ul_sym_sp[nCellIdx][nSfIdxMod])
+ {
+ ret = 1;
+ }
+ }
+ else if (nSfType == XRAN_SLOT_TYPE_FDD)
+ {
+ ret = 1;
+ }
+
+ return ret;
+}
+
+int32_t xran_fs_get_symbol_type(int32_t nCellIdx, int32_t nSlotdx, int32_t nSymbIdx)
+{
+ int32_t nSfIdxMod, nSfType, ret = 0;
+
+ nSfIdxMod = xran_fs_slot_limit(nSlotdx) % ((xran_fs_num_slot_tdd_loop[nCellIdx] > 0) ? xran_fs_num_slot_tdd_loop[nCellIdx]: 1);
+
+ return xran_fs_slot_symb_type[nCellIdx][nSfIdxMod][nSymbIdx];
+}
+
+
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-\r
-/**\r
- * @brief Header file for function to work with 5G NR frame structure and related\r
- * routines\r
- * @file xran_frame_struct.h\r
- * @ingroup group_source_xran\r
- * @author Intel Corporation\r
- **/\r
-\r
-#ifndef _XRAN_FRAME_STRUCT_\r
-#define _XRAN_FRAME_STRUCT_\r
-\r
-#ifdef __cplusplus\r
-extern "C" {\r
-#endif\r
-\r
-\r
-#include "xran_fh_o_du.h"\r
-\r
-uint32_t xran_fs_get_tti_interval(uint8_t nMu);\r
-uint32_t xran_fs_get_scs(uint8_t nMu);\r
-\r
-//-------------------------------------------------------------------------------------------\r
-/** @ingroup group_nr5g_source_phy_common\r
- *\r
- * @param[in] nNumerology - Numerology determine sub carrier spacing, Value: 0->4 0: 15khz, 1: 30khz, 2: 60khz 3: 120khz, 4: 240khz\r
- * @param[in] nBandwidth - Carrier bandwidth for in MHz. Value: 5->400\r
- * @param[in] nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000\r
- *\r
- * @return Number of RBs in cell\r
- *\r
- * @description\r
- * Returns number of RBs based on 38.101-1 and 38.101-2 for the cell\r
- *\r
-**/\r
-//-------------------------------------------------------------------------------------------\r
-uint16_t xran_fs_get_num_rbs(uint32_t nNumerology, uint32_t nBandwidth, uint32_t nAbsFrePointA);\r
-\r
-//-------------------------------------------------------------------------------------------\r
-/** @ingroup phy_cal_nrarfcn\r
- *\r
- * @param[in] center frequency\r
- *\r
- * @return NR-ARFCN\r
- *\r
- * @description\r
- * This calculates NR-ARFCN value according to center frequency\r
- *\r
-**/\r
-//-------------------------------------------------------------------------------------------\r
-uint32_t xran_fs_cal_nrarfcn(uint32_t nCenterFreq);\r
-int32_t xran_fs_slot_limit(int32_t nSlotIdx);\r
-void xran_fs_clear_slot_type(uint32_t nCcId);\r
-int32_t xran_fs_set_slot_type(uint32_t nCcId, uint32_t nFrameDuplexType, uint32_t nTddPeriod, struct xran_slot_config* psSlotConfig);\r
-int32_t xran_fs_get_slot_type(int32_t nCcId, int32_t nSlotIdx, int32_t nType);\r
-uint32_t xran_fs_slot_limit_init(int32_t tti_interval_us);\r
-uint32_t xran_fs_get_max_slot(void);\r
-uint32_t xran_fs_get_max_slot_SFN(void);\r
-int32_t xran_fs_get_symbol_type(int32_t nCellIdx, int32_t nSlotdx, int32_t nSymbIdx);\r
-\r
-#ifdef __cplusplus\r
-}\r
-#endif\r
-\r
-#endif /* _XRAN_FRAME_STRUCT_ */\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+
+/**
+ * @brief Header file for function to work with 5G NR frame structure and related
+ * routines
+ * @file xran_frame_struct.h
+ * @ingroup group_source_xran
+ * @author Intel Corporation
+ **/
+
+#ifndef _XRAN_FRAME_STRUCT_
+#define _XRAN_FRAME_STRUCT_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#include "xran_fh_o_du.h"
+
+uint32_t xran_fs_get_tti_interval(uint8_t nMu);
+uint32_t xran_fs_get_scs(uint8_t nMu);
+
+//-------------------------------------------------------------------------------------------
+/** @ingroup group_nr5g_source_phy_common
+ *
+ * @param[in] nNumerology - Numerology determine sub carrier spacing, Value: 0->4 0: 15khz, 1: 30khz, 2: 60khz 3: 120khz, 4: 240khz
+ * @param[in] nBandwidth - Carrier bandwidth for in MHz. Value: 5->400
+ * @param[in] nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000
+ *
+ * @return Number of RBs in cell
+ *
+ * @description
+ * Returns number of RBs based on 38.101-1 and 38.101-2 for the cell
+ *
+**/
+//-------------------------------------------------------------------------------------------
+uint16_t xran_fs_get_num_rbs(uint32_t nNumerology, uint32_t nBandwidth, uint32_t nAbsFrePointA);
+
+//-------------------------------------------------------------------------------------------
+/** @ingroup phy_cal_nrarfcn
+ *
+ * @param[in] center frequency
+ *
+ * @return NR-ARFCN
+ *
+ * @description
+ * This calculates NR-ARFCN value according to center frequency
+ *
+**/
+//-------------------------------------------------------------------------------------------
+uint32_t xran_fs_cal_nrarfcn(uint32_t nCenterFreq);
+int32_t xran_fs_slot_limit(int32_t nSlotIdx);
+void xran_fs_clear_slot_type(uint32_t nCcId);
+int32_t xran_fs_set_slot_type(uint32_t nCcId, uint32_t nFrameDuplexType, uint32_t nTddPeriod, struct xran_slot_config* psSlotConfig);
+int32_t xran_fs_get_slot_type(int32_t nCcId, int32_t nSlotIdx, int32_t nType);
+uint32_t xran_fs_slot_limit_init(int32_t tti_interval_us);
+uint32_t xran_fs_get_max_slot(void);
+uint32_t xran_fs_get_max_slot_SFN(void);
+int32_t xran_fs_get_symbol_type(int32_t nCellIdx, int32_t nSlotdx, int32_t nSymbIdx);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _XRAN_FRAME_STRUCT_ */
+
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/**\r
- * @brief This file has the System Debug Trace Logger (Mlog) Task IDs used by XRAN library\r
- * @file mlog_task_id.h\r
- * @ingroup group_lte_source_common\r
- * @author Intel Corporation\r
- **/\r
-\r
-#ifndef _XRAN_TASK_ID_H_\r
-#define _XRAN_TASK_ID_H_\r
-\r
-#ifdef __cplusplus\r
-extern "C" {\r
-#endif\r
-\r
-#define RESOURCE_CORE_0 0\r
-#define RESOURCE_CORE_1 1\r
-#define RESOURCE_CORE_2 2\r
-#define RESOURCE_CORE_3 3\r
-#define RESOURCE_CORE_4 4\r
-#define RESOURCE_CORE_5 5\r
-#define RESOURCE_CORE_6 6\r
-#define RESOURCE_CORE_7 7\r
-#define RESOURCE_CORE_8 8\r
-#define RESOURCE_CORE_9 9\r
-#define RESOURCE_CORE_10 10\r
-#define RESOURCE_CORE_11 11\r
-#define RESOURCE_CORE_12 12\r
-#define RESOURCE_CORE_13 13\r
-#define RESOURCE_CORE_14 14\r
-#define RESOURCE_CORE_15 15\r
-#define RESOURCE_CORE_16 16\r
-\r
-#define RESOURCE_IA_CORE 100\r
-\r
-//--------------------------------------------------------------------\r
-// XRAN\r
-//--------------------------------------------------------------------\r
-\r
-//--------------------------------------------------------------------\r
-// POLLING\r
-//--------------------------------------------------------------------\r
-#define PID_XRAN_BBDEV_DL_POLL 51\r
-#define PID_XRAN_BBDEV_DL_POLL_DISPATCH 52\r
-#define PID_XRAN_BBDEV_UL_POLL 53\r
-#define PID_XRAN_BBDEV_UL_POLL_DISPATCH 54\r
-\r
-#define PID_TTI_TIMER 2100\r
-#define PID_TTI_CB 2101\r
-\r
-#define PID_SYM_TIMER 2102\r
-#define PID_GNB_PROC_TIMING_TIMEOUT 2103\r
-\r
-#define PID_TIME_SYSTIME_POLL 2104\r
-#define PID_TIME_SYSTIME_STOP 2105\r
-#define PID_TIME_ARM_TIMER 2106\r
-\r
-\r
-#define PID_RADIO_FREQ_RX_PKT 2400\r
-#define PID_RADIO_RX_STOP 2401\r
-#define PID_RADIO_RX_UL_IQ 2402\r
-#define PID_RADIO_PRACH_PKT 2403\r
-#define PID_RADIO_FE_COMPRESS 2404\r
-#define PID_RADIO_FE_DECOMPRESS 2405\r
-#define PID_RADIO_TX_BYPASS_PROC 2406\r
-#define PID_RADIO_ETH_TX_BURST 2407\r
-#define PID_RADIO_TX_DL_IQ 2408\r
-#define PID_RADIO_RX_VALIDATE 2409\r
-\r
-#define PID_RADIO_RX_IRQ_ON 2410\r
-#define PID_RADIO_RX_IRQ_OFF 2411\r
-#define PID_RADIO_RX_EPOLL_WAIT 2412\r
-\r
-#define PID_RADIO_TX_LTEMODE_PROC 2413\r
-#define PID_RADIO_RX_LTEMODE_PROC 2414\r
-\r
-#define PID_RADIO_TX_PLAY_BACK_IQ 2415\r
-\r
-#define PID_PROCESS_TX_SYM 2416\r
-\r
-#define PID_CP_DL_CB 2500\r
-#define PID_CP_UL_CB 2501\r
-#define PID_UP_DL_CB 2502\r
-#define PID_SYM_OTA_CB 2503\r
-#define PID_TTI_CB_TO_PHY 2504\r
-#define PID_HALF_SLOT_CB_TO_PHY 2505\r
-#define PID_FULL_SLOT_CB_TO_PHY 2506\r
-#define PID_UP_UL_HALF_DEAD_LINE_CB 2507\r
-#define PID_UP_UL_FULL_DEAD_LINE_CB 2508\r
-\r
-#define PID_PROCESS_UP_PKT 2600\r
-#define PID_PROCESS_CP_PKT 2700\r
-\r
-\r
-#ifdef __cplusplus\r
-}\r
-#endif\r
-\r
-#endif /* _XRAN_TASK_ID_H_ */\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief This file has the System Debug Trace Logger (Mlog) Task IDs used by XRAN library
+ * @file mlog_task_id.h
+ * @ingroup group_lte_source_common
+ * @author Intel Corporation
+ **/
+
+#ifndef _XRAN_TASK_ID_H_
+#define _XRAN_TASK_ID_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define RESOURCE_CORE_0 0
+#define RESOURCE_CORE_1 1
+#define RESOURCE_CORE_2 2
+#define RESOURCE_CORE_3 3
+#define RESOURCE_CORE_4 4
+#define RESOURCE_CORE_5 5
+#define RESOURCE_CORE_6 6
+#define RESOURCE_CORE_7 7
+#define RESOURCE_CORE_8 8
+#define RESOURCE_CORE_9 9
+#define RESOURCE_CORE_10 10
+#define RESOURCE_CORE_11 11
+#define RESOURCE_CORE_12 12
+#define RESOURCE_CORE_13 13
+#define RESOURCE_CORE_14 14
+#define RESOURCE_CORE_15 15
+#define RESOURCE_CORE_16 16
+
+#define RESOURCE_IA_CORE 100
+
+//--------------------------------------------------------------------
+// XRAN
+//--------------------------------------------------------------------
+
+//--------------------------------------------------------------------
+// POLLING
+//--------------------------------------------------------------------
+#define PID_XRAN_BBDEV_DL_POLL 51
+#define PID_XRAN_BBDEV_DL_POLL_DISPATCH 52
+#define PID_XRAN_BBDEV_UL_POLL 53
+#define PID_XRAN_BBDEV_UL_POLL_DISPATCH 54
+
+#define PID_TTI_TIMER 2100
+#define PID_TTI_CB 2101
+
+#define PID_SYM_TIMER 2102
+#define PID_GNB_PROC_TIMING_TIMEOUT 2103
+
+#define PID_TIME_SYSTIME_POLL 2104
+#define PID_TIME_SYSTIME_STOP 2105
+#define PID_TIME_ARM_TIMER 2106
+
+
+#define PID_RADIO_FREQ_RX_PKT 2400
+#define PID_RADIO_RX_STOP 2401
+#define PID_RADIO_RX_UL_IQ 2402
+#define PID_RADIO_PRACH_PKT 2403
+#define PID_RADIO_FE_COMPRESS 2404
+#define PID_RADIO_FE_DECOMPRESS 2405
+#define PID_RADIO_TX_BYPASS_PROC 2406
+#define PID_RADIO_ETH_TX_BURST 2407
+#define PID_RADIO_TX_DL_IQ 2408
+#define PID_RADIO_RX_VALIDATE 2409
+
+#define PID_RADIO_RX_IRQ_ON 2410
+#define PID_RADIO_RX_IRQ_OFF 2411
+#define PID_RADIO_RX_EPOLL_WAIT 2412
+
+#define PID_RADIO_TX_LTEMODE_PROC 2413
+#define PID_RADIO_RX_LTEMODE_PROC 2414
+
+#define PID_RADIO_TX_PLAY_BACK_IQ 2415
+
+#define PID_PROCESS_TX_SYM 2416
+
+#define PID_CP_DL_CB 2500
+#define PID_CP_UL_CB 2501
+#define PID_UP_DL_CB 2502
+#define PID_SYM_OTA_CB 2503
+#define PID_TTI_CB_TO_PHY 2504
+#define PID_HALF_SLOT_CB_TO_PHY 2505
+#define PID_FULL_SLOT_CB_TO_PHY 2506
+#define PID_UP_UL_HALF_DEAD_LINE_CB 2507
+#define PID_UP_UL_FULL_DEAD_LINE_CB 2508
+
+#define PID_PROCESS_UP_PKT 2600
+#define PID_PROCESS_CP_PKT 2700
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _XRAN_TASK_ID_H_ */
+
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/**\r
- * @brief XRAN main functionality module\r
- * @file xran_main.c\r
- * @ingroup group_source_xran\r
- * @author Intel Corporation\r
- **/\r
-\r
-#define _GNU_SOURCE\r
-#include <sched.h>\r
-#include <assert.h>\r
-#include <err.h>\r
-#include <libgen.h>\r
-#include <sys/time.h>\r
-#include <sys/queue.h>\r
-#include <time.h>\r
-#include <unistd.h>\r
-#include <stdio.h>\r
-#include <pthread.h>\r
-#include <malloc.h>\r
-\r
-#include <rte_common.h>\r
-#include <rte_eal.h>\r
-#include <rte_errno.h>\r
-#include <rte_lcore.h>\r
-#include <rte_cycles.h>\r
-#include <rte_memory.h>\r
-#include <rte_memzone.h>\r
-#include <rte_mbuf.h>\r
-#include <rte_ring.h>\r
-\r
-#include "xran_fh_o_du.h"\r
-\r
-#include "ethdi.h"\r
-#include "xran_pkt.h"\r
-#include "xran_up_api.h"\r
-#include "xran_cp_api.h"\r
-#include "xran_sync_api.h"\r
-#include "xran_lib_mlog_tasks_id.h"\r
-#include "xran_timer.h"\r
-#include "xran_common.h"\r
-#include "xran_frame_struct.h"\r
-#include "xran_printf.h"\r
-#include "xran_app_frag.h"\r
-\r
-#include "xran_mlog_lnx.h"\r
-\r
-#define DIV_ROUND_OFFSET(X,Y) ( X/Y + ((X%Y)?1:0) )\r
-\r
-#define XranOffsetSym(offSym, otaSym, numSymTotal) (((int32_t)offSym > (int32_t)otaSym) ? \\r
- ((int32_t)otaSym + ((int32_t)numSymTotal) - (uint32_t)offSym) : \\r
- (((int32_t)otaSym - (int32_t)offSym) >= numSymTotal) ? \\r
- (((int32_t)otaSym - (int32_t)offSym) - numSymTotal) : \\r
- ((int32_t)otaSym - (int32_t)offSym))\r
-\r
-#define MAX_NUM_OF_XRAN_CTX (2)\r
-#define XranIncrementCtx(ctx) ((ctx >= (MAX_NUM_OF_XRAN_CTX-1)) ? 0 : (ctx+1))\r
-#define XranDecrementCtx(ctx) ((ctx == 0) ? (MAX_NUM_OF_XRAN_CTX-1) : (ctx-1))\r
-\r
-#define MAX_NUM_OF_DPDK_TIMERS (10)\r
-#define DpdkTimerIncrementCtx(ctx) ((ctx >= (MAX_NUM_OF_DPDK_TIMERS-1)) ? 0 : (ctx+1))\r
-#define DpdkTimerDecrementCtx(ctx) ((ctx == 0) ? (MAX_NUM_OF_DPDK_TIMERS-1) : (ctx-1))\r
-\r
-/* Difference between Unix seconds to GPS seconds\r
- GPS epoch: 1980.1.6 00:00:00 (UTC); Unix time epoch: 1970:1.1 00:00:00 UTC\r
- Value is calculated on Sep.6 2019. Need to be change if International\r
- Earth Rotation and Reference Systems Service (IERS) adds more leap seconds\r
- 1970:1.1 - 1980.1.6: 3657 days\r
- 3657*24*3600=315 964 800 seconds (unix seconds value at 1980.1.6 00:00:00 (UTC))\r
- There are 18 leap seconds inserted after 1980.1.6 00:00:00 (UTC), which means\r
- GPS is 18 larger. 315 964 800 - 18 = 315 964 782\r
-*/\r
-#define UNIX_TO_GPS_SECONDS_OFFSET 315964782UL\r
-#define NUM_OF_FRAMES_PER_SECOND 100\r
-\r
-//#define XRAN_CREATE_RBMAP /**< generate slot map base on symbols */\r
-\r
-\r
-struct xran_timer_ctx {\r
- uint32_t tti_to_process;\r
-};\r
-\r
-static xran_cc_handle_t pLibInstanceHandles[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR] = {NULL};\r
-static struct xran_device_ctx g_xran_dev_ctx[XRAN_PORTS_NUM] = { 0 };\r
-\r
-struct xran_timer_ctx timer_ctx[MAX_NUM_OF_XRAN_CTX];\r
-\r
-static struct rte_timer tti_to_phy_timer[10];\r
-static struct rte_timer sym_timer;\r
-static struct rte_timer dpdk_timer[MAX_NUM_OF_DPDK_TIMERS];\r
-\r
-uint64_t interval_us = 1000;\r
-\r
-uint32_t xran_lib_ota_tti = 0; /**< Slot index in a second [0:(1000000/TTI-1)] */\r
-uint32_t xran_lib_ota_sym = 0; /**< Symbol index in a slot [0:13] */\r
-uint32_t xran_lib_ota_sym_idx = 0; /**< Symbol index in a second [0 : 14*(1000000/TTI)-1]\r
- where TTI is TTI interval in microseconds */\r
-uint16_t xran_SFN_at_Sec_Start = 0; /**< SFN at current second start */\r
-uint16_t xran_max_frame = 1023; /**< value of max frame used. expected to be 99 (old compatibility mode) and 1023 as per section 9.7.2 System Frame Number Calculation */\r
-\r
-static uint8_t xran_cp_seq_id_num[XRAN_MAX_CELLS_PER_PORT][XRAN_DIR_MAX][XRAN_MAX_ANTENNA_NR * 2 + XRAN_MAX_ANT_ARRAY_ELM_NR]; /* XRAN_MAX_ANTENNA_NR * 2 for PUSCH and PRACH */\r
-static uint8_t xran_updl_seq_id_num[XRAN_MAX_CELLS_PER_PORT][XRAN_MAX_ANTENNA_NR];\r
-static uint8_t xran_upul_seq_id_num[XRAN_MAX_CELLS_PER_PORT][XRAN_MAX_ANTENNA_NR * 2 + XRAN_MAX_ANT_ARRAY_ELM_NR]; /**< PUSCH, PRACH, SRS for Cat B */\r
-\r
-static uint8_t xran_section_id_curslot[XRAN_DIR_MAX][XRAN_MAX_CELLS_PER_PORT][XRAN_MAX_ANTENNA_NR * 2+ XRAN_MAX_ANT_ARRAY_ELM_NR];\r
-static uint16_t xran_section_id[XRAN_DIR_MAX][XRAN_MAX_CELLS_PER_PORT][XRAN_MAX_ANTENNA_NR * 2+ XRAN_MAX_ANT_ARRAY_ELM_NR];\r
-static uint64_t xran_total_tick = 0, xran_used_tick = 0;\r
-static uint32_t xran_core_used = 0;\r
-static int32_t first_call = 0;\r
-\r
-\r
-static void\r
-extbuf_free_callback(void *addr __rte_unused, void *opaque __rte_unused)\r
-{\r
-}\r
-\r
-static struct rte_mbuf_ext_shared_info share_data[XRAN_N_FE_BUF_LEN];\r
-\r
-void xran_timer_arm(struct rte_timer *tim, void* arg);\r
-\r
-int32_t xran_process_tx_sym(void *arg);\r
-\r
-int32_t xran_process_rx_sym(void *arg,\r
- struct rte_mbuf *mbuf,\r
- void *iq_data_start,\r
- uint16_t size,\r
- uint8_t CC_ID,\r
- uint8_t Ant_ID,\r
- uint8_t frame_id,\r
- uint8_t subframe_id,\r
- uint8_t slot_id,\r
- uint8_t symb_id,\r
- uint16_t num_prbu,\r
- uint16_t start_prbu,\r
- uint16_t sym_inc,\r
- uint16_t rb,\r
- uint16_t sect_id,\r
- uint32_t *mb_free);\r
-\r
-int32_t xran_process_prach_sym(void *arg,\r
- struct rte_mbuf *mbuf,\r
- void *iq_data_start,\r
- uint16_t size,\r
- uint8_t CC_ID,\r
- uint8_t Ant_ID,\r
- uint8_t frame_id,\r
- uint8_t subframe_id,\r
- uint8_t slot_id,\r
- uint8_t symb_id,\r
- uint16_t num_prbu,\r
- uint16_t start_prbu,\r
- uint16_t sym_inc,\r
- uint16_t rb,\r
- uint16_t sect_id,\r
- uint32_t *mb_free);\r
-\r
-int32_t xran_process_srs_sym(void *arg,\r
- struct rte_mbuf *mbuf,\r
- void *iq_data_start,\r
- uint16_t size,\r
- uint8_t CC_ID,\r
- uint8_t Ant_ID,\r
- uint8_t frame_id,\r
- uint8_t subframe_id,\r
- uint8_t slot_id,\r
- uint8_t symb_id,\r
- uint16_t num_prbu,\r
- uint16_t start_prbu,\r
- uint16_t sym_inc,\r
- uint16_t rb,\r
- uint16_t sect_id,\r
- uint32_t *mb_free);\r
-\r
-\r
-void tti_ota_cb(struct rte_timer *tim, void *arg);\r
-void tti_to_phy_cb(struct rte_timer *tim, void *arg);\r
-void xran_timer_arm_ex(struct rte_timer *tim, void* CbFct, void *CbArg, unsigned tim_lcore);\r
-\r
-// Return SFN at current second start, 10 bits, [0, 1023]\r
-static inline uint16_t xran_getSfnSecStart(void)\r
-{\r
- return xran_SFN_at_Sec_Start;\r
-}\r
-void xran_updateSfnSecStart(void)\r
-{\r
- uint64_t currentSecond = timing_get_current_second();\r
- // Assume always positive\r
- uint64_t gpsSecond = currentSecond - UNIX_TO_GPS_SECONDS_OFFSET;\r
- uint64_t nFrames = gpsSecond * NUM_OF_FRAMES_PER_SECOND;\r
- uint16_t sfn = (uint16_t)(nFrames % (xran_max_frame + 1));\r
- xran_SFN_at_Sec_Start = sfn;\r
-\r
- tx_bytes_per_sec = tx_bytes_counter;\r
- rx_bytes_per_sec = rx_bytes_counter;\r
- tx_bytes_counter = 0;\r
- rx_bytes_counter = 0;\r
-}\r
-\r
-static inline int32_t xran_getSlotIdxSecond(void)\r
-{\r
- int32_t frameIdxSecond = xran_getSfnSecStart();\r
- int32_t slotIndxSecond = frameIdxSecond * SLOTS_PER_SYSTEMFRAME;\r
- return slotIndxSecond;\r
-}\r
-\r
-struct xran_device_ctx *xran_dev_get_ctx(void)\r
-{\r
- return &g_xran_dev_ctx[0];\r
-}\r
-\r
-static inline struct xran_fh_config *xran_lib_get_ctx_fhcfg(void)\r
-{\r
- return (&(xran_dev_get_ctx()->fh_cfg));\r
-}\r
-\r
-uint16_t xran_get_beamid(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ant_id, uint8_t slot_id)\r
-{\r
- return (0); // NO BEAMFORMING\r
-}\r
-\r
-enum xran_if_state xran_get_if_state(void)\r
-{\r
- return xran_if_current_state;\r
-}\r
-\r
-int xran_is_prach_slot(uint32_t subframe_id, uint32_t slot_id)\r
-{\r
- struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();\r
- struct xran_prach_cp_config *pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfig);\r
- int32_t is_prach_slot = 0;\r
-\r
- if (p_xran_dev_ctx->fh_cfg.frame_conf.nNumerology < 2){\r
- //for FR1, in 38.211 tab 6.3.3.2-2&3 it is subframe index\r
- if (pPrachCPConfig->isPRACHslot[subframe_id] == 1){\r
- if (pPrachCPConfig->nrofPrachInSlot != 1)\r
- is_prach_slot = 1;\r
- else{\r
- if (p_xran_dev_ctx->fh_cfg.frame_conf.nNumerology == 0)\r
- is_prach_slot = 1;\r
- else if (slot_id == 1)\r
- is_prach_slot = 1;\r
- }\r
- }\r
- } else if (p_xran_dev_ctx->fh_cfg.frame_conf.nNumerology == 3){\r
- //for FR2, 38.211 tab 6.3.3.4 it is slot index of 60kHz slot\r
- uint32_t slotidx;\r
- slotidx = subframe_id * SLOTNUM_PER_SUBFRAME + slot_id;\r
- if (pPrachCPConfig->nrofPrachInSlot == 2){\r
- if (pPrachCPConfig->isPRACHslot[slotidx>>1] == 1)\r
- is_prach_slot = 1;\r
- } else {\r
- if ((pPrachCPConfig->isPRACHslot[slotidx>>1] == 1) && ((slotidx % 2) == 1)){\r
- is_prach_slot = 1;\r
- }\r
- }\r
- } else\r
- print_err("Numerology %d not supported", p_xran_dev_ctx->fh_cfg.frame_conf.nNumerology);\r
- return is_prach_slot;\r
-}\r
-\r
-int xran_init_sectionid(void *pHandle)\r
-{\r
- int cell, ant, dir;\r
-\r
- for (dir = 0; dir < XRAN_DIR_MAX; dir++){\r
- for(cell=0; cell < XRAN_MAX_CELLS_PER_PORT; cell++) {\r
- for(ant=0; ant < XRAN_MAX_ANTENNA_NR; ant++) {\r
- xran_section_id[dir][cell][ant] = 0;\r
- xran_section_id_curslot[dir][cell][ant] = 255;\r
- }\r
- }\r
- }\r
-\r
- return (0);\r
-}\r
-\r
-int xran_init_srs(struct xran_fh_config* pConf, struct xran_device_ctx * p_xran_dev_ctx)\r
-{\r
- struct xran_srs_config *p_srs = &(p_xran_dev_ctx->srs_cfg);\r
-\r
- if(p_srs){\r
- p_srs->symbMask = pConf->srs_conf.symbMask;\r
- p_srs->eAxC_offset = pConf->srs_conf.eAxC_offset;\r
- print_dbg("SRS sym %d\n", p_srs->symbMask );\r
- print_dbg("SRS eAxC_offset %d\n", p_srs->eAxC_offset);\r
- }\r
- return (XRAN_STATUS_SUCCESS);\r
-}\r
-\r
-\r
-int xran_init_prach(struct xran_fh_config* pConf, struct xran_device_ctx * p_xran_dev_ctx)\r
-{\r
- int32_t i;\r
- uint8_t slotNr;\r
- struct xran_prach_config* pPRACHConfig = &(pConf->prach_conf);\r
- const xRANPrachConfigTableStruct *pxRANPrachConfigTable;\r
- uint8_t nNumerology = pConf->frame_conf.nNumerology;\r
- uint8_t nPrachConfIdx = pPRACHConfig->nPrachConfIdx;\r
- struct xran_prach_cp_config *pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfig);\r
-\r
- if (nNumerology > 2)\r
- pxRANPrachConfigTable = &gxranPrachDataTable_mmw[nPrachConfIdx];\r
- else if (pConf->frame_conf.nFrameDuplexType == 1)\r
- pxRANPrachConfigTable = &gxranPrachDataTable_sub6_tdd[nPrachConfIdx];\r
- else\r
- pxRANPrachConfigTable = &gxranPrachDataTable_sub6_fdd[nPrachConfIdx];\r
-\r
- uint8_t preambleFmrt = pxRANPrachConfigTable->preambleFmrt[0];\r
- const xRANPrachPreambleLRAStruct *pxranPreambleforLRA = &gxranPreambleforLRA[preambleFmrt];\r
- memset(pPrachCPConfig, 0, sizeof(struct xran_prach_cp_config));\r
- if(pConf->log_level)\r
- printf("xRAN open PRACH config: Numerology %u ConfIdx %u, preambleFmrt %u startsymb %u, numSymbol %u, occassionsInPrachSlot %u\n", nNumerology, nPrachConfIdx, preambleFmrt, pxRANPrachConfigTable->startingSym, pxRANPrachConfigTable->duration, pxRANPrachConfigTable->occassionsInPrachSlot);\r
-\r
- pPrachCPConfig->filterIdx = XRAN_FILTERINDEX_PRACH_ABC; // 3, PRACH preamble format A1~3, B1~4, C0, C2\r
- pPrachCPConfig->startSymId = pxRANPrachConfigTable->startingSym;\r
- pPrachCPConfig->startPrbc = pPRACHConfig->nPrachFreqStart;\r
- pPrachCPConfig->numPrbc = (preambleFmrt >= FORMAT_A1)? 12 : 70;\r
- pPrachCPConfig->timeOffset = pxranPreambleforLRA->nRaCp;\r
- pPrachCPConfig->freqOffset = xran_get_freqoffset(pPRACHConfig->nPrachFreqOffset, pPRACHConfig->nPrachSubcSpacing);\r
- pPrachCPConfig->x = pxRANPrachConfigTable->x;\r
- pPrachCPConfig->nrofPrachInSlot = pxRANPrachConfigTable->nrofPrachInSlot;\r
- pPrachCPConfig->y[0] = pxRANPrachConfigTable->y[0];\r
- pPrachCPConfig->y[1] = pxRANPrachConfigTable->y[1];\r
- if (preambleFmrt >= FORMAT_A1)\r
- {\r
- pPrachCPConfig->numSymbol = pxRANPrachConfigTable->duration;\r
- pPrachCPConfig->occassionsInPrachSlot = pxRANPrachConfigTable->occassionsInPrachSlot;\r
- }\r
- else\r
- {\r
- pPrachCPConfig->numSymbol = 1;\r
- pPrachCPConfig->occassionsInPrachSlot = 1;\r
- }\r
-\r
- if(pConf->log_level)\r
- printf("PRACH: x %u y[0] %u, y[1] %u prach slot: %u ..", pPrachCPConfig->x, pPrachCPConfig->y[0], pPrachCPConfig->y[1], pxRANPrachConfigTable->slotNr[0]);\r
- pPrachCPConfig->isPRACHslot[pxRANPrachConfigTable->slotNr[0]] = 1;\r
- for (i=1; i < XRAN_PRACH_CANDIDATE_SLOT; i++)\r
- {\r
- slotNr = pxRANPrachConfigTable->slotNr[i];\r
- if (slotNr > 0){\r
- pPrachCPConfig->isPRACHslot[slotNr] = 1;\r
- if(pConf->log_level)\r
- printf(" %u ..", slotNr);\r
- }\r
- }\r
- printf("\n");\r
- for (i = 0; i < XRAN_MAX_SECTOR_NR; i++){\r
- p_xran_dev_ctx->prach_start_symbol[i] = pPrachCPConfig->startSymId;\r
- p_xran_dev_ctx->prach_last_symbol[i] = pPrachCPConfig->startSymId + pPrachCPConfig->numSymbol * pPrachCPConfig->occassionsInPrachSlot - 1;\r
- }\r
- if(pConf->log_level){\r
- printf("PRACH start symbol %u lastsymbol %u\n", p_xran_dev_ctx->prach_start_symbol[0], p_xran_dev_ctx->prach_last_symbol[0]);\r
- }\r
-\r
- pPrachCPConfig->eAxC_offset = xran_get_num_eAxc(NULL);\r
- print_dbg("PRACH eAxC_offset %d\n", pPrachCPConfig->eAxC_offset);\r
-\r
- return (XRAN_STATUS_SUCCESS);\r
-}\r
-\r
-inline uint16_t xran_alloc_sectionid(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ant_id, uint8_t slot_id)\r
-{\r
- if(cc_id >= XRAN_MAX_CELLS_PER_PORT) {\r
- print_err("Invalid CC ID - %d", cc_id);\r
- return (0);\r
- }\r
- if(ant_id >= XRAN_MAX_ANTENNA_NR * 2 + XRAN_MAX_ANT_ARRAY_ELM_NR) { //for PRACH, ant_id starts from num_ant\r
- print_err("Invalid antenna ID - %d", ant_id);\r
- return (0);\r
- }\r
-\r
- /* if new slot has been started,\r
- * then initializes section id again for new start */\r
- if(xran_section_id_curslot[dir][cc_id][ant_id] != slot_id) {\r
- xran_section_id[dir][cc_id][ant_id] = 0;\r
- xran_section_id_curslot[dir][cc_id][ant_id] = slot_id;\r
- }\r
-\r
- return(xran_section_id[dir][cc_id][ant_id]++);\r
-}\r
-\r
-int xran_init_seqid(void *pHandle)\r
-{\r
- int cell, dir, ant;\r
-\r
- for(cell=0; cell < XRAN_MAX_CELLS_PER_PORT; cell++) {\r
- for(dir=0; dir < XRAN_DIR_MAX; dir++) {\r
- for(ant=0; ant < XRAN_MAX_ANTENNA_NR * 2; ant++)\r
- xran_cp_seq_id_num[cell][dir][ant] = 0;\r
- }\r
- for(ant=0; ant < XRAN_MAX_ANTENNA_NR; ant++)\r
- xran_updl_seq_id_num[cell][ant] = 0;\r
- for(ant=0; ant < XRAN_MAX_ANTENNA_NR * 2 + XRAN_MAX_ANT_ARRAY_ELM_NR; ant++)\r
- xran_upul_seq_id_num[cell][ant] = 0;\r
- }\r
-\r
- return (0);\r
-}\r
-\r
-static inline uint8_t xran_get_cp_seqid(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ant_id)\r
-{\r
- if(dir >= XRAN_DIR_MAX) {\r
- print_err("Invalid direction - %d", dir);\r
- return (0);\r
- }\r
- if(cc_id >= XRAN_MAX_CELLS_PER_PORT) {\r
- print_err("Invalid CC ID - %d", cc_id);\r
- return (0);\r
- }\r
- if(ant_id >= XRAN_MAX_ANTENNA_NR * 2 + XRAN_MAX_ANT_ARRAY_ELM_NR) {\r
- print_err("Invalid antenna ID - %d", ant_id);\r
- return (0);\r
- }\r
-\r
- return(xran_cp_seq_id_num[cc_id][dir][ant_id]++);\r
-}\r
-static inline uint8_t xran_get_updl_seqid(void *pHandle, uint8_t cc_id, uint8_t ant_id)\r
-{\r
- if(cc_id >= XRAN_MAX_CELLS_PER_PORT) {\r
- print_err("Invalid CC ID - %d", cc_id);\r
- return (0);\r
- }\r
- if(ant_id >= XRAN_MAX_ANTENNA_NR) {\r
- print_err("Invalid antenna ID - %d", ant_id);\r
- return (0);\r
- }\r
-\r
- /* Only U-Plane DL needs to get sequence ID in O-DU */\r
- return(xran_updl_seq_id_num[cc_id][ant_id]++);\r
-}\r
-static inline uint8_t *xran_get_updl_seqid_addr(void *pHandle, uint8_t cc_id, uint8_t ant_id)\r
-{\r
- if(cc_id >= XRAN_MAX_CELLS_PER_PORT) {\r
- print_err("Invalid CC ID - %d", cc_id);\r
- return (NULL);\r
- }\r
- if(ant_id >= XRAN_MAX_ANTENNA_NR) {\r
- print_err("Invalid antenna ID - %d", ant_id);\r
- return (NULL);\r
- }\r
-\r
- /* Only U-Plane DL needs to get sequence ID in O-DU */\r
- return(&xran_updl_seq_id_num[cc_id][ant_id]);\r
-}\r
-static inline int8_t xran_check_upul_seqid(void *pHandle, uint8_t cc_id, uint8_t ant_id, uint8_t slot_id, uint8_t seq_id)\r
-{\r
-\r
- if(cc_id >= XRAN_MAX_CELLS_PER_PORT) {\r
- print_err("Invalid CC ID - %d", cc_id);\r
- return (-1);\r
- }\r
-\r
- if(ant_id >= XRAN_MAX_ANTENNA_NR * 2 + XRAN_MAX_ANT_ARRAY_ELM_NR) {\r
- print_err("Invalid antenna ID - %d", ant_id);\r
- return (-1);\r
- }\r
-\r
- /* O-DU needs to check the sequence ID of U-Plane UL from O-RU */\r
- xran_upul_seq_id_num[cc_id][ant_id]++;\r
- if(xran_upul_seq_id_num[cc_id][ant_id] == seq_id) { /* expected sequence */\r
- return (XRAN_STATUS_SUCCESS);\r
- } else {\r
- print_err("expected seqid %u received %u, slot %u, ant %u cc %u", xran_upul_seq_id_num[cc_id][ant_id], seq_id, slot_id, ant_id, cc_id);\r
- xran_upul_seq_id_num[cc_id][ant_id] = seq_id; // for next\r
- return (-1);\r
- }\r
-}\r
-\r
-//////////////////////////////////////////\r
-// For RU emulation\r
-static inline uint8_t xran_get_upul_seqid(void *pHandle, uint8_t cc_id, uint8_t ant_id)\r
-{\r
- if(cc_id >= XRAN_MAX_CELLS_PER_PORT) {\r
- print_err("Invalid CC ID - %d", cc_id);\r
- return (0);\r
- }\r
- if(ant_id >= XRAN_MAX_ANTENNA_NR * 2 + XRAN_MAX_ANT_ARRAY_ELM_NR) {\r
- print_err("Invalid antenna ID - %d", ant_id);\r
- return (0);\r
- }\r
-\r
- return(xran_upul_seq_id_num[cc_id][ant_id]++);\r
-}\r
-static inline uint8_t *xran_get_upul_seqid_addr(void *pHandle, uint8_t cc_id, uint8_t ant_id)\r
-{\r
- if(cc_id >= XRAN_MAX_CELLS_PER_PORT) {\r
- print_err("Invalid CC ID - %d", cc_id);\r
- return (0);\r
- }\r
- if(ant_id >= XRAN_MAX_ANTENNA_NR * 2) {\r
- print_err("Invalid antenna ID - %d", ant_id);\r
- return (0);\r
- }\r
-\r
- return(&xran_upul_seq_id_num[cc_id][ant_id]);\r
-}\r
-static inline int8_t xran_check_cp_seqid(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ant_id, uint8_t seq_id)\r
-{\r
- if(dir >= XRAN_DIR_MAX) {\r
- print_err("Invalid direction - %d", dir);\r
- return (-1);\r
- }\r
- if(cc_id >= XRAN_MAX_CELLS_PER_PORT) {\r
- print_err("Invalid CC ID - %d", cc_id);\r
- return (-1);\r
- }\r
- if(ant_id >= XRAN_MAX_ANTENNA_NR * 2) {\r
- print_err("Invalid antenna ID - %d", ant_id);\r
- return (-1);\r
- }\r
-\r
- xran_cp_seq_id_num[cc_id][dir][ant_id]++;\r
- if(xran_cp_seq_id_num[cc_id][dir][ant_id] == seq_id) { /* expected sequence */\r
- return (0);\r
- }\r
- else {\r
- xran_cp_seq_id_num[cc_id][dir][ant_id] = seq_id;\r
- return (-1);\r
- }\r
-}\r
-static inline int8_t xran_check_updl_seqid(void *pHandle, uint8_t cc_id, uint8_t ant_id, uint8_t slot_id, uint8_t seq_id)\r
-{\r
- if(cc_id >= XRAN_MAX_CELLS_PER_PORT) {\r
- print_err("Invalid CC ID - %d", cc_id);\r
- return (-1);\r
- }\r
-\r
- if(ant_id >= XRAN_MAX_ANTENNA_NR) {\r
- print_err("Invalid antenna ID - %d", ant_id);\r
- return (-1);\r
- }\r
-\r
- /* O-RU needs to check the sequence ID of U-Plane DL from O-DU */\r
- xran_updl_seq_id_num[cc_id][ant_id]++;\r
- if(xran_updl_seq_id_num[cc_id][ant_id] == seq_id) {\r
- /* expected sequence */\r
- /*print_dbg("ant %u cc_id %u : slot_id %u : seq_id %u : expected seq_id %u\n",\r
- ant_id, cc_id, slot_id, seq_id, xran_updl_seq_id_num[cc_id][ant_id]);*/\r
- return (0);\r
- } else {\r
- /* print_err("ant %u cc_id %u : slot_id %u : seq_id %u : expected seq_id %u\n",\r
- ant_id, cc_id, slot_id, seq_id, xran_updl_seq_id_num[cc_id][ant_id]);*/\r
-\r
- xran_updl_seq_id_num[cc_id][ant_id] = seq_id;\r
-\r
- return (-1);\r
- }\r
-}\r
-\r
-\r
-static struct xran_section_gen_info cpSections[XRAN_MAX_NUM_SECTIONS];\r
-static struct xran_cp_gen_params cpInfo;\r
-int process_cplane(struct rte_mbuf *pkt)\r
-{\r
- struct xran_recv_packet_info recv;\r
-\r
- cpInfo.sections = cpSections;\r
- xran_parse_cp_pkt(pkt, &cpInfo, &recv);\r
-\r
- return (MBUF_FREE);\r
-}\r
-//////////////////////////////////////////\r
-\r
-void sym_ota_cb(struct rte_timer *tim, void *arg, unsigned long *used_tick)\r
-{\r
- struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();\r
- struct xran_timer_ctx *pTCtx = (struct xran_timer_ctx *)arg;\r
- long t1 = MLogTick(), t2;\r
- long t3;\r
- static int32_t ctx = 0;\r
-\r
- if(XranGetSymNum(xran_lib_ota_sym_idx, XRAN_NUM_OF_SYMBOL_PER_SLOT) == 0){\r
- t3 = xran_tick();\r
- tti_ota_cb(NULL, arg);\r
- *used_tick += get_ticks_diff(xran_tick(), t3);\r
- }\r
-\r
- if(XranGetSymNum(xran_lib_ota_sym_idx, XRAN_NUM_OF_SYMBOL_PER_SLOT) == 3){\r
- if(p_xran_dev_ctx->phy_tti_cb_done == 0){\r
- /* rearm timer to deliver TTI event to PHY */\r
- t3 = xran_tick();\r
- p_xran_dev_ctx->phy_tti_cb_done = 0;\r
- xran_timer_arm_ex(&tti_to_phy_timer[xran_lib_ota_tti % 10], tti_to_phy_cb, (void*)pTCtx, p_xran_dev_ctx->fh_init.io_cfg.timing_core);\r
- *used_tick += get_ticks_diff(xran_tick(), t3);\r
- }\r
- }\r
-\r
- t3 = xran_tick();\r
- if (xran_process_tx_sym(timer_ctx))\r
- {\r
- *used_tick += get_ticks_diff(xran_tick(), t3);\r
- }\r
-\r
- /* check if there is call back to do something else on this symbol */\r
-\r
- struct cb_elem_entry *cb_elm;\r
- LIST_FOREACH(cb_elm, &p_xran_dev_ctx->sym_cb_list_head[0][xran_lib_ota_sym], pointers){\r
- if(cb_elm){\r
- cb_elm->pSymCallback(&dpdk_timer[ctx], cb_elm->pSymCallbackTag);\r
- ctx = DpdkTimerIncrementCtx(ctx);\r
- }\r
- }\r
-\r
- // This counter is incremented in advance before it is the time for the next symbol\r
- xran_lib_ota_sym++;\r
- if(xran_lib_ota_sym >= N_SYM_PER_SLOT){\r
- xran_lib_ota_sym=0;\r
- }\r
-\r
- t2 = MLogTick();\r
- MLogTask(PID_SYM_OTA_CB, t1, t2);\r
-}\r
-\r
-void tti_ota_cb(struct rte_timer *tim, void *arg)\r
-{\r
- uint32_t frame_id = 0;\r
- uint32_t subframe_id = 0;\r
- uint32_t slot_id = 0;\r
- uint32_t next_tti = 0;\r
-\r
- uint32_t mlogVar[10];\r
- uint32_t mlogVarCnt = 0;\r
- uint64_t t1 = MLogTick();\r
- uint64_t t3 = 0;\r
- uint32_t reg_tti = 0;\r
- uint32_t reg_sfn = 0;\r
- struct xran_timer_ctx *pTCtx = (struct xran_timer_ctx *)arg;\r
- struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();\r
-\r
- MLogTask(PID_TTI_TIMER, t1, MLogTick());\r
-\r
- /* To match TTbox */\r
- if(xran_lib_ota_tti == 0)\r
- reg_tti = xran_fs_get_max_slot() - 1;\r
- else\r
- reg_tti = xran_lib_ota_tti -1;\r
- MLogIncrementCounter();\r
- reg_sfn = XranGetFrameNum(reg_tti,xran_getSfnSecStart(),SUBFRAMES_PER_SYSTEMFRAME, SLOTNUM_PER_SUBFRAME)*10 + XranGetSubFrameNum(reg_tti,SLOTNUM_PER_SUBFRAME, SUBFRAMES_PER_SYSTEMFRAME);;\r
- /* subframe and slot */\r
- MLogRegisterFrameSubframe(reg_sfn, reg_tti % (SLOTNUM_PER_SUBFRAME));\r
- MLogMark(1, t1);\r
-\r
- slot_id = XranGetSlotNum(xran_lib_ota_tti, SLOTNUM_PER_SUBFRAME);\r
- subframe_id = XranGetSubFrameNum(xran_lib_ota_tti,SLOTNUM_PER_SUBFRAME, SUBFRAMES_PER_SYSTEMFRAME);\r
- frame_id = XranGetFrameNum(xran_lib_ota_tti,xran_getSfnSecStart(),SUBFRAMES_PER_SYSTEMFRAME, SLOTNUM_PER_SUBFRAME);\r
-\r
- pTCtx[(xran_lib_ota_tti & 1) ^ 1].tti_to_process = xran_lib_ota_tti;\r
-\r
- mlogVar[mlogVarCnt++] = 0x11111111;\r
- mlogVar[mlogVarCnt++] = xran_lib_ota_tti;\r
- mlogVar[mlogVarCnt++] = xran_lib_ota_sym_idx;\r
- mlogVar[mlogVarCnt++] = xran_lib_ota_sym_idx / 14;\r
- mlogVar[mlogVarCnt++] = frame_id;\r
- mlogVar[mlogVarCnt++] = subframe_id;\r
- mlogVar[mlogVarCnt++] = slot_id;\r
- mlogVar[mlogVarCnt++] = 0;\r
- MLogAddVariables(mlogVarCnt, mlogVar, MLogTick());\r
-\r
- if(p_xran_dev_ctx->fh_init.io_cfg.id == ID_LLS_CU)\r
- next_tti = xran_lib_ota_tti + 1;\r
- else\r
- next_tti = xran_lib_ota_tti;\r
-\r
- if(next_tti>= xran_fs_get_max_slot()){\r
- print_dbg("[%d]SFN %d sf %d slot %d\n",next_tti, frame_id, subframe_id, slot_id);\r
- next_tti=0;\r
- }\r
-\r
- slot_id = XranGetSlotNum(next_tti, SLOTNUM_PER_SUBFRAME);\r
- subframe_id = XranGetSubFrameNum(next_tti,SLOTNUM_PER_SUBFRAME, SUBFRAMES_PER_SYSTEMFRAME);\r
- frame_id = XranGetFrameNum(next_tti,xran_getSfnSecStart(),SUBFRAMES_PER_SYSTEMFRAME, SLOTNUM_PER_SUBFRAME);\r
-\r
- print_dbg("[%d]SFN %d sf %d slot %d\n",next_tti, frame_id, subframe_id, slot_id);\r
-\r
- if(p_xran_dev_ctx->fh_init.io_cfg.id == ID_LLS_CU){\r
- pTCtx[(xran_lib_ota_tti & 1)].tti_to_process = next_tti;\r
- } else {\r
- pTCtx[(xran_lib_ota_tti & 1)].tti_to_process = pTCtx[(xran_lib_ota_tti & 1)^1].tti_to_process;\r
- }\r
-\r
- p_xran_dev_ctx->phy_tti_cb_done = 0;\r
- xran_timer_arm_ex(&tti_to_phy_timer[xran_lib_ota_tti % 10], tti_to_phy_cb, (void*)pTCtx, p_xran_dev_ctx->fh_init.io_cfg.timing_core);\r
-\r
- //slot index is increased to next slot at the beginning of current OTA slot\r
- xran_lib_ota_tti++;\r
- if(xran_lib_ota_tti >= xran_fs_get_max_slot()){\r
- print_dbg("[%d]SFN %d sf %d slot %d\n",xran_lib_ota_tti, frame_id, subframe_id, slot_id);\r
- xran_lib_ota_tti=0;\r
- }\r
- MLogTask(PID_TTI_CB, t1, MLogTick());\r
-}\r
-\r
-void xran_timer_arm(struct rte_timer *tim, void* arg)\r
-{\r
- struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();\r
- uint64_t t3 = MLogTick();\r
-\r
- if (xran_if_current_state == XRAN_RUNNING){\r
- rte_timer_cb_t fct = (rte_timer_cb_t)arg;\r
- rte_timer_init(tim);\r
- rte_timer_reset_sync(tim, 0, SINGLE, p_xran_dev_ctx->fh_init.io_cfg.timing_core, fct, &timer_ctx[0]);\r
- }\r
- MLogTask(PID_TIME_ARM_TIMER, t3, MLogTick());\r
-}\r
-\r
-void xran_timer_arm_ex(struct rte_timer *tim, void* CbFct, void *CbArg, unsigned tim_lcore)\r
-{\r
- struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();\r
- uint64_t t3 = MLogTick();\r
-\r
- if (xran_if_current_state == XRAN_RUNNING){\r
- rte_timer_cb_t fct = (rte_timer_cb_t)CbFct;\r
- rte_timer_init(tim);\r
- rte_timer_reset_sync(tim, 0, SINGLE, tim_lcore, fct, CbArg);\r
- }\r
- MLogTask(PID_TIME_ARM_TIMER, t3, MLogTick());\r
-}\r
-\r
-int xran_cp_create_and_send_section(void *pHandle, uint8_t ru_port_id, int dir, int tti, int cc_id,\r
- struct xran_prb_map *prbMap, enum xran_category category, uint8_t ctx_id)\r
-{\r
- struct xran_device_ctx *p_x_ctx = xran_dev_get_ctx();\r
- struct xran_cp_gen_params params;\r
- struct xran_section_gen_info sect_geninfo[1];\r
- struct rte_mbuf *mbuf;\r
- int ret = 0;\r
- uint32_t i, j, loc_sym;\r
- uint32_t nsection = 0;\r
- struct xran_prb_elm *pPrbMapElem = NULL;\r
- struct xran_prb_elm *pPrbMapElemPrev = NULL;\r
- uint32_t slot_id = XranGetSlotNum(tti, SLOTNUM_PER_SUBFRAME);\r
- uint32_t subframe_id = XranGetSubFrameNum(tti,SLOTNUM_PER_SUBFRAME, SUBFRAMES_PER_SYSTEMFRAME);\r
- uint32_t frame_id = XranGetFrameNum(tti,xran_getSfnSecStart(),SUBFRAMES_PER_SYSTEMFRAME, SLOTNUM_PER_SUBFRAME);\r
-\r
- frame_id = (frame_id & 0xff); /* ORAN frameId, 8 bits, [0, 255] */\r
- uint8_t seq_id = 0;\r
-\r
- struct xran_sectionext1_info m_ext1;\r
-\r
- if(prbMap) {\r
- nsection = prbMap->nPrbElm;\r
- pPrbMapElem = &prbMap->prbMap[0];\r
- if (nsection < 1){\r
- print_dbg("cp[%d:%d:%d] ru_port_id %d dir=%d nsection %d\n",\r
- frame_id, subframe_id, slot_id, ru_port_id, dir, nsection);\r
- }\r
- } else {\r
- print_err("prbMap is NULL\n");\r
- return (-1);\r
- }\r
- for (i=0; i<nsection; i++)\r
- {\r
- pPrbMapElem = &prbMap->prbMap[i];\r
- params.dir = dir;\r
- params.sectionType = XRAN_CP_SECTIONTYPE_1; /* Most DL/UL Radio Channels */\r
- params.hdr.filterIdx = XRAN_FILTERINDEX_STANDARD;\r
- params.hdr.frameId = frame_id;\r
- params.hdr.subframeId = subframe_id;\r
- params.hdr.slotId = slot_id;\r
- params.hdr.startSymId = pPrbMapElem->nStartSymb;\r
- params.hdr.iqWidth = pPrbMapElem->iqWidth; /*xran_get_conf_iqwidth(pHandle);*/\r
- params.hdr.compMeth = pPrbMapElem->compMethod;\r
-\r
- print_dbg("cp[%d:%d:%d] ru_port_id %d dir=%d\n",\r
- frame_id, subframe_id, slot_id, ru_port_id, dir);\r
-\r
- seq_id = xran_get_cp_seqid(pHandle, XRAN_DIR_DL, cc_id, ru_port_id);\r
-\r
- sect_geninfo[0].info.type = params.sectionType; // for database\r
- sect_geninfo[0].info.startSymId = params.hdr.startSymId; // for database\r
- sect_geninfo[0].info.iqWidth = params.hdr.iqWidth; // for database\r
- sect_geninfo[0].info.compMeth = params.hdr.compMeth; // for database\r
- sect_geninfo[0].info.id = i; /*xran_alloc_sectionid(pHandle, dir, cc_id, ru_port_id, slot_id);*/\r
-\r
- if(sect_geninfo[0].info.id > 7)\r
- print_err("sectinfo->id %d\n", sect_geninfo[0].info.id);\r
-\r
- if (dir == XRAN_DIR_UL) {\r
- for (loc_sym = 0; loc_sym < XRAN_NUM_OF_SYMBOL_PER_SLOT; loc_sym++){\r
- struct xran_section_desc *p_sec_desc = pPrbMapElem->p_sec_desc[loc_sym];\r
- if(p_sec_desc) {\r
- p_sec_desc->section_id = sect_geninfo[0].info.id;\r
- if(p_sec_desc->pCtrl) {\r
- rte_pktmbuf_free(p_sec_desc->pCtrl);\r
- p_sec_desc->pCtrl = NULL;\r
- p_sec_desc->pData = NULL;\r
- }\r
- } else {\r
- print_err("section desc is NULL\n");\r
- }\r
- }\r
- }\r
-\r
- sect_geninfo[0].info.rb = XRAN_RBIND_EVERY;\r
- sect_geninfo[0].info.startPrbc = pPrbMapElem->nRBStart;\r
- sect_geninfo[0].info.numPrbc = pPrbMapElem->nRBSize;\r
- sect_geninfo[0].info.numSymbol = pPrbMapElem->numSymb;\r
- sect_geninfo[0].info.reMask = 0xfff;\r
- sect_geninfo[0].info.beamId = pPrbMapElem->nBeamIndex;\r
-\r
- for (loc_sym = 0; loc_sym < XRAN_NUM_OF_SYMBOL_PER_SLOT; loc_sym++){\r
- struct xran_section_desc *p_sec_desc = pPrbMapElem->p_sec_desc[loc_sym];\r
- if(p_sec_desc) {\r
- p_sec_desc->section_id = sect_geninfo[0].info.id;\r
-\r
- sect_geninfo[0].info.sec_desc[loc_sym].iq_buffer_offset = p_sec_desc->iq_buffer_offset;\r
- sect_geninfo[0].info.sec_desc[loc_sym].iq_buffer_len = p_sec_desc->iq_buffer_len;\r
- } else {\r
- print_err("section desc is NULL\n");\r
- }\r
- }\r
-\r
- if (i==0)\r
- sect_geninfo[0].info.symInc = XRAN_SYMBOLNUMBER_NOTINC;\r
- else\r
- {\r
- pPrbMapElemPrev = &prbMap->prbMap[i-1];\r
- if (pPrbMapElemPrev->nStartSymb == pPrbMapElem->nStartSymb)\r
- {\r
- sect_geninfo[0].info.symInc = XRAN_SYMBOLNUMBER_NOTINC;\r
- if (pPrbMapElemPrev->numSymb != pPrbMapElem->numSymb)\r
- print_err("section info error: previous numSymb %d not equal to current numSymb %d\n", pPrbMapElemPrev->numSymb, pPrbMapElem->numSymb);\r
- }\r
- else\r
- {\r
- sect_geninfo[0].info.symInc = XRAN_SYMBOLNUMBER_INC;\r
- if (pPrbMapElem->nStartSymb != (pPrbMapElemPrev->nStartSymb + pPrbMapElemPrev->numSymb))\r
- print_err("section info error: current startSym %d not equal to previous endSymb %d\n", pPrbMapElem->nStartSymb, pPrbMapElemPrev->nStartSymb + pPrbMapElemPrev->numSymb);\r
- }\r
- }\r
-\r
- if(category == XRAN_CATEGORY_A){\r
- /* no extention sections for category */\r
- sect_geninfo[0].info.ef = 0;\r
- sect_geninfo[0].exDataSize = 0;\r
- } else if (category == XRAN_CATEGORY_B) {\r
- /*add extantion section for BF Weights if update is needed */\r
- if(pPrbMapElem->bf_weight_update){\r
- memset(&m_ext1, 0, sizeof (struct xran_sectionext1_info));\r
- m_ext1.bfwNumber = pPrbMapElem->bf_weight.nAntElmTRx;\r
- m_ext1.bfwiqWidth = pPrbMapElem->iqWidth;\r
- m_ext1.bfwCompMeth = pPrbMapElem->compMethod;\r
- m_ext1.p_bfwIQ = (int16_t*)pPrbMapElem->bf_weight.p_ext_section;\r
- m_ext1.bfwIQ_sz = pPrbMapElem->bf_weight.ext_section_sz;\r
-\r
- sect_geninfo[0].exData[0].type = XRAN_CP_SECTIONEXTCMD_1;\r
- sect_geninfo[0].exData[0].len = sizeof(m_ext1);\r
- sect_geninfo[0].exData[0].data = &m_ext1;\r
-\r
- sect_geninfo[0].info.ef = 1;\r
- sect_geninfo[0].exDataSize = 1;\r
- } else {\r
- sect_geninfo[0].info.ef = 0;\r
- sect_geninfo[0].exDataSize = 0;\r
- }\r
- } else {\r
- print_err("Unsupported Category %d\n", category);\r
- return (-1);\r
- }\r
-\r
- params.numSections = 1;//nsection;\r
- params.sections = sect_geninfo;\r
-\r
- mbuf = xran_ethdi_mbuf_alloc();\r
- if(unlikely(mbuf == NULL)) {\r
- print_err("Alloc fail!\n");\r
- return (-1);\r
- }\r
-\r
- ret = xran_prepare_ctrl_pkt(mbuf, ¶ms, cc_id, ru_port_id, seq_id);\r
- if(ret < 0) {\r
- print_err("Fail to build control plane packet - [%d:%d:%d] dir=%d\n",\r
- frame_id, subframe_id, slot_id, dir);\r
- } else {\r
- /* add in the ethernet header */\r
- struct ether_hdr *const h = (void *)rte_pktmbuf_prepend(mbuf, sizeof(*h));\r
- tx_counter++;\r
- tx_bytes_counter += rte_pktmbuf_pkt_len(mbuf);\r
- p_x_ctx->send_cpmbuf2ring(mbuf, ETHER_TYPE_ECPRI);\r
-\r
- /*for(i=0; i<nsection; i++)*/\r
- xran_cp_add_section_info(pHandle,\r
- dir, cc_id, ru_port_id,\r
- ctx_id,\r
- §_geninfo[0].info);\r
- }\r
- }\r
-\r
- return ret;\r
-}\r
-\r
-void tx_cp_dl_cb(struct rte_timer *tim, void *arg)\r
-{\r
- long t1 = MLogTick();\r
- int tti, buf_id;\r
- int i, ret;\r
- uint32_t slot_id, subframe_id, frame_id;\r
- int cc_id;\r
- uint8_t ctx_id;\r
- uint8_t ant_id, num_eAxc, num_CCPorts;\r
- void *pHandle;\r
- int num_list;\r
- struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();\r
- struct xran_timer_ctx *pTCtx = (struct xran_timer_ctx *)arg;\r
-\r
- pHandle = NULL; // TODO: temp implemantation\r
- num_eAxc = xran_get_num_eAxc(pHandle);\r
- num_CCPorts = xran_get_num_cc(pHandle);\r
-\r
- if(first_call && p_xran_dev_ctx->enableCP) {\r
-\r
- tti = pTCtx[(xran_lib_ota_tti & 1) ^ 1].tti_to_process;\r
- buf_id = tti % XRAN_N_FE_BUF_LEN;\r
-\r
- slot_id = XranGetSlotNum(tti, SLOTNUM_PER_SUBFRAME);\r
- subframe_id = XranGetSubFrameNum(tti,SLOTNUM_PER_SUBFRAME, SUBFRAMES_PER_SYSTEMFRAME);\r
- frame_id = XranGetFrameNum(tti,xran_getSfnSecStart(),SUBFRAMES_PER_SYSTEMFRAME, SLOTNUM_PER_SUBFRAME);\r
- if (tti == 0){\r
- /* Wrap around to next second */\r
- frame_id = (frame_id + NUM_OF_FRAMES_PER_SECOND) & 0x3ff;\r
- }\r
-\r
- ctx_id = XranGetSlotNum(tti, SLOTS_PER_SYSTEMFRAME) % XRAN_MAX_SECTIONDB_CTX;\r
-\r
- print_dbg("[%d]SFN %d sf %d slot %d\n", tti, frame_id, subframe_id, slot_id);\r
- for(ant_id = 0; ant_id < num_eAxc; ++ant_id) {\r
- for(cc_id = 0; cc_id < num_CCPorts; cc_id++ ) {\r
- /* start new section information list */\r
- xran_cp_reset_section_info(pHandle, XRAN_DIR_DL, cc_id, ant_id, ctx_id);\r
- if(xran_fs_get_slot_type(cc_id, tti, XRAN_SLOT_TYPE_DL) == 1) {\r
- if(p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[buf_id][cc_id][ant_id].sBufferList.pBuffers->pData){\r
- num_list = xran_cp_create_and_send_section(pHandle, ant_id, XRAN_DIR_DL, tti, cc_id,\r
- (struct xran_prb_map *)p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[buf_id][cc_id][ant_id].sBufferList.pBuffers->pData,\r
- p_xran_dev_ctx->fh_cfg.ru_conf.xranCat, ctx_id);\r
- } else {\r
- print_err("[%d]SFN %d sf %d slot %d: ant_id %d cc_id %d \n", tti, frame_id, subframe_id, slot_id, ant_id, cc_id);\r
- }\r
- } /* if(xran_fs_get_slot_type(cc_id, tti, XRAN_SLOT_TYPE_DL) == 1) */\r
- } /* for(cc_id = 0; cc_id < num_CCPorts; cc_id++) */\r
- } /* for(ant_id = 0; ant_id < num_eAxc; ++ant_id) */\r
- MLogTask(PID_CP_DL_CB, t1, MLogTick());\r
- }\r
-}\r
-\r
-void rx_ul_deadline_half_cb(struct rte_timer *tim, void *arg)\r
-{\r
- long t1 = MLogTick();\r
- struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();\r
- xran_status_t status;\r
- /* half of RX for current TTI as measured against current OTA time */\r
- int32_t rx_tti = (int32_t)XranGetTtiNum(xran_lib_ota_sym_idx, XRAN_NUM_OF_SYMBOL_PER_SLOT);\r
- int32_t cc_id;\r
- uint32_t nFrameIdx;\r
- uint32_t nSubframeIdx;\r
- uint32_t nSlotIdx;\r
- uint64_t nSecond;\r
-\r
- uint32_t nXranTime = xran_get_slot_idx(&nFrameIdx, &nSubframeIdx, &nSlotIdx, &nSecond);\r
- rx_tti = nFrameIdx*SUBFRAMES_PER_SYSTEMFRAME*SLOTNUM_PER_SUBFRAME\r
- + nSubframeIdx*SLOTNUM_PER_SUBFRAME\r
- + nSlotIdx;\r
-\r
- if(p_xran_dev_ctx->xran2phy_mem_ready == 0)\r
- return;\r
-\r
- for(cc_id = 0; cc_id < xran_get_num_cc(p_xran_dev_ctx); cc_id++) {\r
- if(p_xran_dev_ctx->rx_packet_callback_tracker[rx_tti % XRAN_N_FE_BUF_LEN][cc_id] == 0){\r
- struct xran_cb_tag *pTag = p_xran_dev_ctx->pCallbackTag[cc_id];\r
- pTag->slotiId = rx_tti;\r
- pTag->symbol = 0; /* last 7 sym means full slot of Symb */\r
- status = XRAN_STATUS_SUCCESS;\r
- if(p_xran_dev_ctx->pCallback[cc_id])\r
- p_xran_dev_ctx->pCallback[cc_id](p_xran_dev_ctx->pCallbackTag[cc_id], status);\r
- } else {\r
- p_xran_dev_ctx->rx_packet_callback_tracker[rx_tti % XRAN_N_FE_BUF_LEN][cc_id] = 0;\r
- }\r
- }\r
- MLogTask(PID_UP_UL_HALF_DEAD_LINE_CB, t1, MLogTick());\r
-}\r
-\r
-void rx_ul_deadline_full_cb(struct rte_timer *tim, void *arg)\r
-{\r
- long t1 = MLogTick();\r
- struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();\r
- xran_status_t status = 0;\r
- int32_t rx_tti = (int32_t)XranGetTtiNum(xran_lib_ota_sym_idx, XRAN_NUM_OF_SYMBOL_PER_SLOT);\r
- int32_t cc_id = 0;\r
- uint32_t nFrameIdx;\r
- uint32_t nSubframeIdx;\r
- uint32_t nSlotIdx;\r
- uint64_t nSecond;\r
-\r
- uint32_t nXranTime = xran_get_slot_idx(&nFrameIdx, &nSubframeIdx, &nSlotIdx, &nSecond);\r
- rx_tti = nFrameIdx*SUBFRAMES_PER_SYSTEMFRAME*SLOTNUM_PER_SUBFRAME\r
- + nSubframeIdx*SLOTNUM_PER_SUBFRAME\r
- + nSlotIdx;\r
-\r
- if(rx_tti == 0)\r
- rx_tti = (xran_fs_get_max_slot_SFN()-1);\r
- else\r
- rx_tti -= 1; /* end of RX for prev TTI as measured against current OTA time */\r
-\r
- if(p_xran_dev_ctx->xran2phy_mem_ready == 0)\r
- return;\r
-\r
- /* U-Plane */\r
- for(cc_id = 0; cc_id < xran_get_num_cc(p_xran_dev_ctx); cc_id++) {\r
- struct xran_cb_tag *pTag = p_xran_dev_ctx->pCallbackTag[cc_id];\r
- pTag->slotiId = rx_tti;\r
- pTag->symbol = 7; /* last 7 sym means full slot of Symb */\r
- status = XRAN_STATUS_SUCCESS;\r
- if(p_xran_dev_ctx->pCallback[cc_id])\r
- p_xran_dev_ctx->pCallback[cc_id](p_xran_dev_ctx->pCallbackTag[cc_id], status);\r
-\r
- if(p_xran_dev_ctx->pPrachCallback[cc_id]){\r
- struct xran_cb_tag *pTag = p_xran_dev_ctx->pPrachCallbackTag[cc_id];\r
- pTag->slotiId = rx_tti;\r
- pTag->symbol = 7; /* last 7 sym means full slot of Symb */\r
- p_xran_dev_ctx->pPrachCallback[cc_id](p_xran_dev_ctx->pPrachCallbackTag[cc_id], status);\r
- }\r
- }\r
-\r
- MLogTask(PID_UP_UL_FULL_DEAD_LINE_CB, t1, MLogTick());\r
-}\r
-\r
-\r
-void tx_cp_ul_cb(struct rte_timer *tim, void *arg)\r
-{\r
- long t1 = MLogTick();\r
- int tti, buf_id;\r
- int i, ret;\r
- uint32_t slot_id, subframe_id, frame_id;\r
- int32_t cc_id;\r
- int ant_id, prach_port_id;\r
- uint16_t beam_id;\r
- uint8_t num_eAxc, num_CCPorts;\r
- uint8_t ctx_id;\r
-\r
- void *pHandle;\r
- int num_list;\r
-\r
- struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();\r
- struct xran_prach_cp_config *pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfig);\r
- struct xran_timer_ctx *pTCtx = (struct xran_timer_ctx *)arg;\r
-\r
- pHandle = NULL; // TODO: temp implemantation\r
-\r
- if(xran_get_ru_category(pHandle) == XRAN_CATEGORY_A)\r
- num_eAxc = xran_get_num_eAxc(pHandle);\r
- else\r
- num_eAxc = xran_get_num_eAxcUl(pHandle);\r
-\r
- num_CCPorts = xran_get_num_cc(pHandle);\r
- tti = pTCtx[(xran_lib_ota_tti & 1) ^ 1].tti_to_process;\r
- buf_id = tti % XRAN_N_FE_BUF_LEN;\r
- slot_id = XranGetSlotNum(tti, SLOTNUM_PER_SUBFRAME);\r
- subframe_id = XranGetSubFrameNum(tti,SLOTNUM_PER_SUBFRAME, SUBFRAMES_PER_SYSTEMFRAME);\r
- frame_id = XranGetFrameNum(tti,xran_getSfnSecStart(),SUBFRAMES_PER_SYSTEMFRAME, SLOTNUM_PER_SUBFRAME);\r
- if (tti == 0) {\r
- //Wrap around to next second\r
- frame_id = (frame_id + NUM_OF_FRAMES_PER_SECOND) & 0x3ff;\r
- }\r
- ctx_id = XranGetSlotNum(tti, SLOTS_PER_SYSTEMFRAME) % XRAN_MAX_SECTIONDB_CTX;\r
-\r
- if(first_call && p_xran_dev_ctx->enableCP) {\r
-\r
- print_dbg("[%d]SFN %d sf %d slot %d\n", tti, frame_id, subframe_id, slot_id);\r
-\r
- for(ant_id = 0; ant_id < num_eAxc; ++ant_id) {\r
- for(cc_id = 0; cc_id < num_CCPorts; cc_id++) {\r
- if(xran_fs_get_slot_type(cc_id, tti, XRAN_SLOT_TYPE_UL) == 1 ||\r
- xran_fs_get_slot_type(cc_id, tti, XRAN_SLOT_TYPE_SP) == 1 ){\r
- /* start new section information list */\r
- xran_cp_reset_section_info(pHandle, XRAN_DIR_UL, cc_id, ant_id, ctx_id);\r
- num_list = xran_cp_create_and_send_section(pHandle, ant_id, XRAN_DIR_UL, tti, cc_id,\r
- (struct xran_prb_map *)p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[buf_id][cc_id][ant_id].sBufferList.pBuffers->pData,\r
- p_xran_dev_ctx->fh_cfg.ru_conf.xranCat, ctx_id);\r
- } /* if(xran_fs_get_slot_type(cc_id, tti, XRAN_SLOT_TYPE_UL) == 1 */\r
- } /* for(cc_id = 0; cc_id < num_CCPorts; cc_id++) */\r
- } /* for(ant_id = 0; ant_id < num_eAxc; ++ant_id) */\r
-\r
- if(p_xran_dev_ctx->enablePrach) {\r
- uint32_t is_prach_slot = xran_is_prach_slot(subframe_id, slot_id);\r
- if(((frame_id % pPrachCPConfig->x) == pPrachCPConfig->y[0]) && (is_prach_slot==1)) { //is prach slot\r
- for(ant_id = 0; ant_id < num_eAxc; ++ant_id) {\r
- for(cc_id = 0; cc_id < num_CCPorts; cc_id++) {\r
- struct xran_cp_gen_params params;\r
- struct xran_section_gen_info sect_geninfo[8];\r
- struct rte_mbuf *mbuf = xran_ethdi_mbuf_alloc();\r
- prach_port_id = ant_id + num_eAxc;\r
- /* start new section information list */\r
- xran_cp_reset_section_info(pHandle, XRAN_DIR_UL, cc_id, prach_port_id, ctx_id);\r
-\r
- beam_id = xran_get_beamid(pHandle, XRAN_DIR_UL, cc_id, prach_port_id, slot_id);\r
- ret = generate_cpmsg_prach(pHandle, ¶ms, sect_geninfo, mbuf, p_xran_dev_ctx,\r
- frame_id, subframe_id, slot_id,\r
- beam_id, cc_id, prach_port_id,\r
- xran_get_cp_seqid(pHandle, XRAN_DIR_UL, cc_id, prach_port_id));\r
- if (ret == XRAN_STATUS_SUCCESS)\r
- send_cpmsg(pHandle, mbuf, ¶ms, sect_geninfo,\r
- cc_id, prach_port_id, xran_get_cp_seqid(pHandle, XRAN_DIR_UL, cc_id, prach_port_id));\r
- }\r
- }\r
- }\r
- }\r
- } /* if(p_xran_dev_ctx->enableCP) */\r
-\r
- MLogTask(PID_CP_UL_CB, t1, MLogTick());\r
-}\r
-\r
-void ul_up_full_slot_cb(struct rte_timer *tim, void *arg)\r
-{\r
- long t1 = MLogTick();\r
- rte_pause();\r
- MLogTask(PID_TTI_CB_TO_PHY, t1, MLogTick());\r
-}\r
-\r
-void tti_to_phy_cb(struct rte_timer *tim, void *arg)\r
-{\r
- long t1 = MLogTick();\r
- struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();\r
-\r
- p_xran_dev_ctx->phy_tti_cb_done = 1; /* DPDK called CB */\r
- if (first_call){\r
- if(p_xran_dev_ctx->ttiCb[XRAN_CB_TTI]){\r
- if(p_xran_dev_ctx->SkipTti[XRAN_CB_TTI] <= 0){\r
- p_xran_dev_ctx->ttiCb[XRAN_CB_TTI](p_xran_dev_ctx->TtiCbParam[XRAN_CB_TTI]);\r
- }else{\r
- p_xran_dev_ctx->SkipTti[XRAN_CB_TTI]--;\r
- }\r
- }\r
- } else {\r
- if(p_xran_dev_ctx->ttiCb[XRAN_CB_TTI]){\r
- int32_t tti = (int32_t)XranGetTtiNum(xran_lib_ota_sym_idx, XRAN_NUM_OF_SYMBOL_PER_SLOT);\r
- uint32_t slot_id = XranGetSlotNum(tti, SLOTNUM_PER_SUBFRAME);\r
- uint32_t subframe_id = XranGetSubFrameNum(tti,SLOTNUM_PER_SUBFRAME, SUBFRAMES_PER_SYSTEMFRAME);\r
- uint32_t frame_id = XranGetFrameNum(tti,xran_getSfnSecStart(),SUBFRAMES_PER_SYSTEMFRAME, SLOTNUM_PER_SUBFRAME);\r
- if((frame_id == xran_max_frame)&&(subframe_id==9)&&(slot_id == SLOTNUM_PER_SUBFRAME-1)) { //(tti == xran_fs_get_max_slot()-1)\r
- first_call = 1;\r
- }\r
- }\r
- }\r
-\r
- MLogTask(PID_TTI_CB_TO_PHY, t1, MLogTick());\r
-}\r
-\r
-int xran_timing_source_thread(void *args)\r
-{\r
- int res = 0;\r
- cpu_set_t cpuset;\r
- int32_t do_reset = 0;\r
- uint64_t t1 = 0;\r
- uint64_t delta;\r
- int32_t result1,i,j;\r
- uint32_t delay_cp_dl;\r
- uint32_t delay_cp_ul;\r
- uint32_t delay_up;\r
- uint32_t delay_up_ul;\r
- uint32_t delay_cp2up;\r
- uint32_t sym_cp_dl;\r
- uint32_t sym_cp_ul;\r
- uint32_t sym_up_ul;\r
- int32_t sym_up;\r
- struct sched_param sched_param;\r
- struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();\r
- uint64_t tWake = 0, tWakePrev = 0, tUsed = 0;\r
- struct cb_elem_entry * cb_elm = NULL;\r
-\r
- /* ToS = Top of Second start +- 1.5us */\r
- struct timespec ts;\r
-\r
- char buff[100];\r
-\r
- xran_core_used = rte_lcore_id();\r
- printf("%s [CPU %2d] [PID: %6d]\n", __FUNCTION__, rte_lcore_id(), getpid());\r
-\r
- /* set main thread affinity mask to CPU2 */\r
- sched_param.sched_priority = 98;\r
-\r
- CPU_ZERO(&cpuset);\r
- CPU_SET(p_xran_dev_ctx->fh_init.io_cfg.timing_core, &cpuset);\r
- if (result1 = pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpuset))\r
- {\r
- printf("pthread_setaffinity_np failed: coreId = 2, result1 = %d\n",result1);\r
- }\r
- if ((result1 = pthread_setschedparam(pthread_self(), 1, &sched_param)))\r
- {\r
- printf("priority is not changed: coreId = 2, result1 = %d\n",result1);\r
- }\r
-\r
- if (p_xran_dev_ctx->fh_init.io_cfg.id == O_DU) {\r
- do {\r
- timespec_get(&ts, TIME_UTC);\r
- }while (ts.tv_nsec >1500);\r
- struct tm * ptm = gmtime(&ts.tv_sec);\r
- if(ptm){\r
- strftime(buff, sizeof buff, "%D %T", ptm);\r
- printf("O-DU: thread_run start time: %s.%09ld UTC [%ld]\n", buff, ts.tv_nsec, interval_us);\r
- }\r
-\r
- delay_cp_dl = interval_us - p_xran_dev_ctx->fh_init.T1a_max_cp_dl;\r
- delay_cp_ul = interval_us - p_xran_dev_ctx->fh_init.T1a_max_cp_ul;\r
- delay_up = p_xran_dev_ctx->fh_init.T1a_max_up;\r
- delay_up_ul = p_xran_dev_ctx->fh_init.Ta4_max;\r
-\r
- delay_cp2up = delay_up-delay_cp_dl;\r
-\r
- sym_cp_dl = delay_cp_dl*1000/(interval_us*1000/N_SYM_PER_SLOT)+1;\r
- sym_cp_ul = delay_cp_ul*1000/(interval_us*1000/N_SYM_PER_SLOT)+1;\r
- sym_up_ul = delay_up_ul*1000/(interval_us*1000/N_SYM_PER_SLOT);\r
- p_xran_dev_ctx->sym_up = sym_up = -(delay_up*1000/(interval_us*1000/N_SYM_PER_SLOT));\r
- p_xran_dev_ctx->sym_up_ul = sym_up_ul = (delay_up_ul*1000/(interval_us*1000/N_SYM_PER_SLOT)+1);\r
-\r
- printf("Start C-plane DL %d us after TTI [trigger on sym %d]\n", delay_cp_dl, sym_cp_dl);\r
- printf("Start C-plane UL %d us after TTI [trigger on sym %d]\n", delay_cp_ul, sym_cp_ul);\r
- printf("Start U-plane DL %d us before OTA [offset in sym %d]\n", delay_up, sym_up);\r
- printf("Start U-plane UL %d us OTA [offset in sym %d]\n", delay_up_ul, sym_up_ul);\r
-\r
- printf("C-plane to U-plane delay %d us after TTI\n", delay_cp2up);\r
- printf("Start Sym timer %ld ns\n", TX_TIMER_INTERVAL/N_SYM_PER_SLOT);\r
-\r
- cb_elm = xran_create_cb(xran_timer_arm, tx_cp_dl_cb);\r
- if(cb_elm){\r
- LIST_INSERT_HEAD(&p_xran_dev_ctx->sym_cb_list_head[0][sym_cp_dl],\r
- cb_elm,\r
- pointers);\r
- } else {\r
- print_err("cb_elm is NULL\n");\r
- res = -1;\r
- goto err0;\r
- }\r
-\r
- cb_elm = xran_create_cb(xran_timer_arm, tx_cp_ul_cb);\r
- if(cb_elm){\r
- LIST_INSERT_HEAD(&p_xran_dev_ctx->sym_cb_list_head[0][sym_cp_ul],\r
- cb_elm,\r
- pointers);\r
- } else {\r
- print_err("cb_elm is NULL\n");\r
- res = -1;\r
- goto err0;\r
- }\r
-\r
- /* Full slot UL OTA + delay_up_ul */\r
- cb_elm = xran_create_cb(xran_timer_arm, rx_ul_deadline_full_cb);\r
- if(cb_elm){\r
- LIST_INSERT_HEAD(&p_xran_dev_ctx->sym_cb_list_head[0][sym_up_ul],\r
- cb_elm,\r
- pointers);\r
- } else {\r
- print_err("cb_elm is NULL\n");\r
- res = -1;\r
- goto err0;\r
- }\r
-\r
- /* Half slot UL OTA + delay_up_ul*/\r
- cb_elm = xran_create_cb(xran_timer_arm, rx_ul_deadline_half_cb);\r
- if(cb_elm){\r
- LIST_INSERT_HEAD(&p_xran_dev_ctx->sym_cb_list_head[0][sym_up_ul + N_SYM_PER_SLOT/2],\r
- cb_elm,\r
- pointers);\r
- } else {\r
- print_err("cb_elm is NULL\n");\r
- res = -1;\r
- goto err0;\r
- }\r
- } else { // APP_O_RU\r
- /* calcualte when to send UL U-plane */\r
- delay_up = p_xran_dev_ctx->fh_init.Ta3_min;\r
- p_xran_dev_ctx->sym_up = sym_up = delay_up*1000/(interval_us*1000/N_SYM_PER_SLOT)+1;\r
- printf("Start UL U-plane %d us after OTA [offset in sym %d]\n", delay_up, sym_up);\r
- do {\r
- timespec_get(&ts, TIME_UTC);\r
- }while (ts.tv_nsec >1500);\r
- struct tm * ptm = gmtime(&ts.tv_sec);\r
- if(ptm){\r
- strftime(buff, sizeof buff, "%D %T", ptm);\r
- printf("RU: thread_run start time: %s.%09ld UTC [%ld]\n", buff, ts.tv_nsec, interval_us);\r
- }\r
- }\r
-\r
- printf("interval_us %ld\n", interval_us);\r
- do {\r
- timespec_get(&ts, TIME_UTC);\r
- }while (ts.tv_nsec == 0);\r
-\r
- while(1) {\r
- /* Update Usage Stats */\r
- tWake = xran_tick();\r
- xran_used_tick += tUsed;\r
- if (tWakePrev)\r
- {\r
- xran_total_tick += get_ticks_diff(tWake, tWakePrev);\r
- }\r
- tWakePrev = tWake;\r
- tUsed = 0;\r
-\r
- delta = poll_next_tick(interval_us*1000L/N_SYM_PER_SLOT, &tUsed);\r
- if (XRAN_STOPPED == xran_if_current_state)\r
- break;\r
-\r
- if (likely(XRAN_RUNNING == xran_if_current_state))\r
- sym_ota_cb(&sym_timer, timer_ctx, &tUsed);\r
- }\r
-\r
- err0:\r
- for (i = 0; i< XRAN_MAX_SECTOR_NR; i++){\r
- for (j = 0; j< XRAN_NUM_OF_SYMBOL_PER_SLOT; j++){\r
- struct cb_elem_entry *cb_elm;\r
- LIST_FOREACH(cb_elm, &p_xran_dev_ctx->sym_cb_list_head[i][j], pointers){\r
- if(cb_elm){\r
- LIST_REMOVE(cb_elm, pointers);\r
- xran_destroy_cb(cb_elm);\r
- }\r
- }\r
- }\r
- }\r
-\r
- printf("Closing timing source thread...tx counter %lu, rx counter %lu\n", tx_counter, rx_counter);\r
- return res;\r
-}\r
-\r
-/* Handle ecpri format. */\r
-int handle_ecpri_ethertype(struct rte_mbuf *pkt, uint64_t rx_time)\r
-{\r
- const struct xran_ecpri_hdr *ecpri_hdr;\r
- unsigned long t1;\r
- int32_t ret = MBUF_FREE;\r
-\r
- if (rte_pktmbuf_data_len(pkt) < sizeof(struct xran_ecpri_hdr)) {\r
- print_err("Packet too short - %d bytes", rte_pktmbuf_data_len(pkt));\r
- return 0;\r
- }\r
-\r
- /* check eCPRI header. */\r
- ecpri_hdr = rte_pktmbuf_mtod(pkt, struct xran_ecpri_hdr *);\r
- if(ecpri_hdr == NULL){\r
- print_err("ecpri_hdr error\n");\r
- return MBUF_FREE;\r
- }\r
-\r
- rx_bytes_counter += rte_pktmbuf_pkt_len(pkt);\r
- switch(ecpri_hdr->cmnhdr.ecpri_mesg_type) {\r
- case ECPRI_IQ_DATA:\r
- // t1 = MLogTick();\r
- ret = process_mbuf(pkt);\r
- // MLogTask(PID_PROCESS_UP_PKT, t1, MLogTick());\r
- break;\r
- // For RU emulation\r
- case ECPRI_RT_CONTROL_DATA:\r
- t1 = MLogTick();\r
- if(xran_dev_get_ctx()->fh_init.io_cfg.id == O_RU) {\r
- ret = process_cplane(pkt);\r
- } else {\r
- print_err("O-DU recevied C-Plane message!");\r
- }\r
- MLogTask(PID_PROCESS_CP_PKT, t1, MLogTick());\r
- break;\r
- default:\r
- print_err("Invalid eCPRI message type - %d", ecpri_hdr->cmnhdr.ecpri_mesg_type);\r
- }\r
-\r
- return ret;\r
-}\r
-\r
-int xran_process_prach_sym(void *arg,\r
- struct rte_mbuf *mbuf,\r
- void *iq_data_start,\r
- uint16_t size,\r
- uint8_t CC_ID,\r
- uint8_t Ant_ID,\r
- uint8_t frame_id,\r
- uint8_t subframe_id,\r
- uint8_t slot_id,\r
- uint8_t symb_id,\r
- uint16_t num_prbu,\r
- uint16_t start_prbu,\r
- uint16_t sym_inc,\r
- uint16_t rb,\r
- uint16_t sect_id,\r
- uint32_t *mb_free)\r
-{\r
- char *pos = NULL;\r
- struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();\r
- uint8_t symb_id_offset;\r
- uint32_t tti = 0;\r
- xran_status_t status;\r
- void *pHandle = NULL;\r
- struct rte_mbuf *mb;\r
-\r
- uint16_t iq_sample_size_bits = 16;\r
-\r
- if(p_xran_dev_ctx->xran2phy_mem_ready == 0)\r
- return 0;\r
-\r
- tti = frame_id * SLOTS_PER_SYSTEMFRAME + subframe_id * SLOTNUM_PER_SUBFRAME + slot_id;\r
-\r
- status = tti << 16 | symb_id;\r
-\r
- if(CC_ID < XRAN_MAX_SECTOR_NR && Ant_ID < XRAN_MAX_ANTENNA_NR && symb_id < XRAN_NUM_OF_SYMBOL_PER_SLOT){\r
- symb_id_offset = symb_id - p_xran_dev_ctx->prach_start_symbol[CC_ID]; //make the storing of prach packets to start from 0 for easy of processing within PHY\r
- pos = (char*) p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id_offset].pData;\r
- if(pos && iq_data_start && size){\r
- if (p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder == XRAN_CPU_LE_BYTE_ORDER) {\r
- int idx = 0;\r
- uint16_t *psrc = (uint16_t *)iq_data_start;\r
- uint16_t *pdst = (uint16_t *)pos;\r
- /* network byte (be) order of IQ to CPU byte order (le) */\r
- for (idx = 0; idx < size/sizeof(int16_t); idx++){\r
- pdst[idx] = (psrc[idx]>>8) | (psrc[idx]<<8); //rte_be_to_cpu_16(psrc[idx]);\r
- }\r
- *mb_free = MBUF_FREE;\r
- }else {\r
- mb = p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id_offset].pCtrl;\r
- if(mb){\r
- rte_pktmbuf_free(mb);\r
- }else{\r
- print_err("mb==NULL\n");\r
- }\r
- p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id_offset].pData = iq_data_start;\r
- p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id_offset].pCtrl = mbuf;\r
- *mb_free = MBUF_KEEP;\r
- }\r
- } else {\r
- print_err("pos %p iq_data_start %p size %d\n",pos, iq_data_start, size);\r
- }\r
- } else {\r
- print_err("TTI %d(f_%d sf_%d slot_%d) CC %d Ant_ID %d symb_id %d\n",tti, frame_id, subframe_id, slot_id, CC_ID, Ant_ID, symb_id);\r
- }\r
-\r
-/* if (symb_id == p_xran_dev_ctx->prach_last_symbol[CC_ID] ){\r
- p_xran_dev_ctx->rx_packet_prach_tracker[tti % XRAN_N_FE_BUF_LEN][CC_ID][symb_id]++;\r
- if(p_xran_dev_ctx->rx_packet_prach_tracker[tti % XRAN_N_FE_BUF_LEN][CC_ID][symb_id] >= xran_get_num_eAxc(pHandle)){\r
- if(p_xran_dev_ctx->pPrachCallback[0])\r
- p_xran_dev_ctx->pPrachCallback[0](p_xran_dev_ctx->pPrachCallbackTag[0], status);\r
- p_xran_dev_ctx->rx_packet_prach_tracker[tti % XRAN_N_FE_BUF_LEN][CC_ID][symb_id] = 0;\r
- }\r
- }\r
-*/\r
- return size;\r
-}\r
-\r
-int32_t xran_process_srs_sym(void *arg,\r
- struct rte_mbuf *mbuf,\r
- void *iq_data_start,\r
- uint16_t size,\r
- uint8_t CC_ID,\r
- uint8_t Ant_ID,\r
- uint8_t frame_id,\r
- uint8_t subframe_id,\r
- uint8_t slot_id,\r
- uint8_t symb_id,\r
- uint16_t num_prbu,\r
- uint16_t start_prbu,\r
- uint16_t sym_inc,\r
- uint16_t rb,\r
- uint16_t sect_id,\r
- uint32_t *mb_free)\r
-{\r
- char *pos = NULL;\r
- struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();\r
- uint32_t tti = 0;\r
- xran_status_t status;\r
- void *pHandle = NULL;\r
- struct rte_mbuf *mb = NULL;\r
-\r
- uint16_t iq_sample_size_bits = 16;\r
-\r
- if(p_xran_dev_ctx->xran2phy_mem_ready == 0)\r
- return 0;\r
-\r
- tti = frame_id * SLOTS_PER_SYSTEMFRAME + subframe_id * SLOTNUM_PER_SUBFRAME + slot_id;\r
-\r
- status = tti << 16 | symb_id;\r
-\r
- if(CC_ID < XRAN_MAX_SECTOR_NR && Ant_ID < p_xran_dev_ctx->fh_cfg.nAntElmTRx && symb_id < XRAN_NUM_OF_SYMBOL_PER_SLOT) {\r
- pos = (char*) p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id].pData;\r
- pos += start_prbu * N_SC_PER_PRB*(iq_sample_size_bits/8)*2;\r
- if(pos && iq_data_start && size){\r
- if (p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder == XRAN_CPU_LE_BYTE_ORDER) {\r
- int idx = 0;\r
- uint16_t *psrc = (uint16_t *)iq_data_start;\r
- uint16_t *pdst = (uint16_t *)pos;\r
- rte_panic("XRAN_CPU_LE_BYTE_ORDER is not supported 0x16%lx\n", (long)mb);\r
- /* network byte (be) order of IQ to CPU byte order (le) */\r
- for (idx = 0; idx < size/sizeof(int16_t); idx++){\r
- pdst[idx] = (psrc[idx]>>8) | (psrc[idx]<<8); //rte_be_to_cpu_16(psrc[idx]);\r
- }\r
- } else if (likely(p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder == XRAN_NE_BE_BYTE_ORDER)){\r
- if (likely (p_xran_dev_ctx->fh_init.mtu >=\r
- p_xran_dev_ctx->fh_cfg.nULRBs * N_SC_PER_PRB*(iq_sample_size_bits/8)*2)) {\r
- /* no fragmentation */\r
- mb = p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id].pCtrl;\r
- if(mb){\r
- rte_pktmbuf_free(mb);\r
- }else{\r
- print_err("mb==NULL\n");\r
- }\r
- p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id].pData = iq_data_start;\r
- p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id].pCtrl = mbuf;\r
- *mb_free = MBUF_KEEP;\r
- } else {\r
- /* packet can be fragmented copy RBs */\r
- rte_memcpy(pos, iq_data_start, size);\r
- *mb_free = MBUF_FREE;\r
- }\r
- }\r
- } else {\r
- print_err("pos %p iq_data_start %p size %d\n",pos, iq_data_start, size);\r
- }\r
- } else {\r
- print_err("TTI %d(f_%d sf_%d slot_%d) CC %d Ant_ID %d symb_id %d\n",tti, frame_id, subframe_id, slot_id, CC_ID, Ant_ID, symb_id);\r
- }\r
-\r
- return size;\r
-}\r
-\r
-int32_t xran_pkt_validate(void *arg,\r
- struct rte_mbuf *mbuf,\r
- void *iq_data_start,\r
- uint16_t size,\r
- uint8_t CC_ID,\r
- uint8_t Ant_ID,\r
- uint8_t frame_id,\r
- uint8_t subframe_id,\r
- uint8_t slot_id,\r
- uint8_t symb_id,\r
- struct ecpri_seq_id *seq_id,\r
- uint16_t num_prbu,\r
- uint16_t start_prbu,\r
- uint16_t sym_inc,\r
- uint16_t rb,\r
- uint16_t sect_id)\r
-{\r
- struct xran_device_ctx * pctx = xran_dev_get_ctx();\r
- struct xran_common_counters *pCnt = &pctx->fh_counters;\r
-\r
- if(pctx->fh_init.io_cfg.id == O_DU) {\r
- if(xran_check_upul_seqid(NULL, CC_ID, Ant_ID, slot_id, seq_id->seq_id) != XRAN_STATUS_SUCCESS) {\r
- pCnt->Rx_pkt_dupl++;\r
- return (XRAN_STATUS_FAIL);\r
- }\r
- }else if(pctx->fh_init.io_cfg.id == O_RU) {\r
- if(xran_check_updl_seqid(NULL, CC_ID, Ant_ID, slot_id, seq_id->seq_id) != XRAN_STATUS_SUCCESS) {\r
- pCnt->Rx_pkt_dupl++;\r
- return (XRAN_STATUS_FAIL);\r
- }\r
- }else {\r
- print_err("incorrect dev type %d\n", pctx->fh_init.io_cfg.id);\r
- }\r
-\r
- rx_counter++;\r
-\r
- pCnt->Rx_on_time++;\r
- pCnt->Total_msgs_rcvd++;\r
-\r
- return XRAN_STATUS_SUCCESS;\r
-}\r
-\r
-int32_t xran_process_rx_sym(void *arg,\r
- struct rte_mbuf *mbuf,\r
- void *iq_data_start,\r
- uint16_t size,\r
- uint8_t CC_ID,\r
- uint8_t Ant_ID,\r
- uint8_t frame_id,\r
- uint8_t subframe_id,\r
- uint8_t slot_id,\r
- uint8_t symb_id,\r
- uint16_t num_prbu,\r
- uint16_t start_prbu,\r
- uint16_t sym_inc,\r
- uint16_t rb,\r
- uint16_t sect_id,\r
- uint32_t *mb_free)\r
-{\r
- char *pos = NULL;\r
- struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();\r
- uint32_t tti = 0;\r
- xran_status_t status;\r
- void *pHandle = NULL;\r
- struct rte_mbuf *mb = NULL;\r
- struct xran_prb_map * pRbMap = NULL;\r
- struct xran_prb_elm * prbMapElm = NULL;\r
-\r
- uint16_t iq_sample_size_bits = 16;\r
-\r
- tti = frame_id * SLOTS_PER_SYSTEMFRAME + subframe_id * SLOTNUM_PER_SUBFRAME + slot_id;\r
-\r
- status = tti << 16 | symb_id;\r
-\r
- if(CC_ID < XRAN_MAX_SECTOR_NR && Ant_ID < XRAN_MAX_ANTENNA_NR && symb_id < XRAN_NUM_OF_SYMBOL_PER_SLOT){\r
- pos = (char*) p_xran_dev_ctx->sFrontHaulRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id].pData;\r
- pRbMap = (struct xran_prb_map *) p_xran_dev_ctx->sFrontHaulRxPrbMapBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers->pData;\r
- if(pRbMap){\r
- prbMapElm = &pRbMap->prbMap[sect_id];\r
- if(sect_id >= pRbMap->nPrbElm) {\r
- print_err("sect_id %d !=pRbMap->nPrbElm %d\n", sect_id,pRbMap->nPrbElm);\r
- *mb_free = MBUF_FREE;\r
- return size;\r
- }\r
- } else {\r
- print_err("pRbMap==NULL\n");\r
- *mb_free = MBUF_FREE;\r
- return size;\r
- }\r
-\r
- pos += start_prbu * N_SC_PER_PRB*(iq_sample_size_bits/8)*2;\r
- if(pos && iq_data_start && size){\r
- if (p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder == XRAN_CPU_LE_BYTE_ORDER) {\r
- int idx = 0;\r
- uint16_t *psrc = (uint16_t *)iq_data_start;\r
- uint16_t *pdst = (uint16_t *)pos;\r
- rte_panic("XRAN_CPU_LE_BYTE_ORDER is not supported 0x16%lx\n", (long)mb);\r
- /* network byte (be) order of IQ to CPU byte order (le) */\r
- for (idx = 0; idx < size/sizeof(int16_t); idx++){\r
- pdst[idx] = (psrc[idx]>>8) | (psrc[idx]<<8); //rte_be_to_cpu_16(psrc[idx]);\r
- }\r
- } else if (likely(p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder == XRAN_NE_BE_BYTE_ORDER)){\r
- if (/*likely (p_xran_dev_ctx->fh_init.mtu >=\r
- p_xran_dev_ctx->fh_cfg.nULRBs * N_SC_PER_PRB*(iq_sample_size_bits/8)*2)\r
- && p_xran_dev_ctx->fh_init.io_cfg.id == O_DU*/ 1) {\r
- if (pRbMap->nPrbElm == 1){\r
- /* no fragmentation */\r
- mb = p_xran_dev_ctx->sFrontHaulRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id].pCtrl;\r
- if(mb){\r
- rte_pktmbuf_free(mb);\r
- }else{\r
- print_err("mb==NULL\n");\r
- }\r
- p_xran_dev_ctx->sFrontHaulRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id].pData = iq_data_start;\r
- p_xran_dev_ctx->sFrontHaulRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id].pCtrl = mbuf;\r
- *mb_free = MBUF_KEEP;\r
- } else {\r
- prbMapElm = &pRbMap->prbMap[sect_id];\r
- struct xran_section_desc *p_sec_desc = prbMapElm->p_sec_desc[symb_id];\r
- if(p_sec_desc){\r
- mb = p_sec_desc->pCtrl;\r
- if(mb){\r
- rte_pktmbuf_free(mb);\r
- }\r
- p_sec_desc->pData = iq_data_start;\r
- p_sec_desc->pCtrl = mbuf;\r
- p_sec_desc->iq_buffer_len = size;\r
- p_sec_desc->iq_buffer_offset = RTE_PTR_DIFF(iq_data_start, mbuf);\r
- } else {\r
- print_err("p_sec_desc==NULL\n");\r
- *mb_free = MBUF_FREE;\r
- return size;\r
- }\r
- *mb_free = MBUF_KEEP;\r
- }\r
- } else {\r
- /* packet can be fragmented copy RBs */\r
- rte_memcpy(pos, iq_data_start, size);\r
- *mb_free = MBUF_FREE;\r
- }\r
- }\r
- } else {\r
- print_err("pos %p iq_data_start %p size %d\n",pos, iq_data_start, size);\r
- }\r
- } else {\r
- print_err("TTI %d(f_%d sf_%d slot_%d) CC %d Ant_ID %d symb_id %d\n",tti, frame_id, subframe_id, slot_id, CC_ID, Ant_ID, symb_id);\r
- }\r
-\r
- return size;\r
-}\r
-\r
-/* Send burst of packets on an output interface */\r
-static inline int\r
-xran_send_burst(struct xran_device_ctx *dev, uint16_t n, uint16_t port)\r
-{\r
- struct rte_mbuf **m_table;\r
- struct rte_mbuf *m;\r
- int32_t i = 0;\r
- int j;\r
- int32_t ret = 0;\r
-\r
- m_table = (struct rte_mbuf **)dev->tx_mbufs[port].m_table;\r
-\r
- for(i = 0; i < n; i++){\r
- rte_mbuf_sanity_check(m_table[i], 0);\r
- /*rte_pktmbuf_dump(stdout, m_table[i], 256);*/\r
- tx_counter++;\r
- tx_bytes_counter += rte_pktmbuf_pkt_len(m_table[i]);\r
- ret += dev->send_upmbuf2ring(m_table[i], ETHER_TYPE_ECPRI);\r
- }\r
-\r
-\r
- if (unlikely(ret < n)) {\r
- print_err("ret < n\n");\r
- }\r
-\r
- return 0;\r
-}\r
-\r
-int32_t xran_process_tx_sym_cp_off(uint8_t ctx_id, uint32_t tti, int32_t cc_id, int32_t ant_id, uint32_t frame_id, uint32_t subframe_id, uint32_t slot_id, uint32_t sym_id,\r
- int32_t do_srs)\r
-{\r
- int32_t retval = 0;\r
- uint64_t t1 = MLogTick();\r
-\r
- void *pHandle = NULL;\r
- char *pos = NULL;\r
- char *p_sec_iq = NULL;\r
- char *p_sect_iq = NULL;\r
- void *mb = NULL;\r
- int prb_num = 0;\r
- uint16_t iq_sample_size_bits = 16; // TODO: make dynamic per\r
-\r
- struct xran_prb_map *prb_map = NULL;\r
- uint8_t num_ant_elm = 0;\r
-\r
- struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();\r
- struct xran_prach_cp_config *pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfig);\r
- struct xran_srs_config *p_srs_cfg = &(p_xran_dev_ctx->srs_cfg);\r
- num_ant_elm = xran_get_num_ant_elm(pHandle);\r
- enum xran_pkt_dir direction;\r
-\r
- struct rte_mbuf *eth_oran_hdr = NULL;\r
- char *ext_buff = NULL;\r
- uint16_t ext_buff_len = 0;\r
- struct rte_mbuf *tmp = NULL;\r
- rte_iova_t ext_buff_iova = 0;\r
-\r
- struct rte_mbuf_ext_shared_info * p_share_data = &share_data[tti % XRAN_N_FE_BUF_LEN];\r
-\r
- if(p_xran_dev_ctx->fh_init.io_cfg.id == O_DU) {\r
- direction = XRAN_DIR_DL; /* O-DU */\r
- prb_num = p_xran_dev_ctx->fh_cfg.nDLRBs;\r
- } else {\r
- direction = XRAN_DIR_UL; /* RU */\r
- prb_num = p_xran_dev_ctx->fh_cfg.nULRBs;\r
- }\r
-\r
- if(xran_fs_get_slot_type(cc_id, tti, ((p_xran_dev_ctx->fh_init.io_cfg.id == O_DU)? XRAN_SLOT_TYPE_DL : XRAN_SLOT_TYPE_UL)) == 1\r
- || xran_fs_get_slot_type(cc_id, tti, XRAN_SLOT_TYPE_SP) == 1\r
- || xran_fs_get_slot_type(cc_id, tti, XRAN_SLOT_TYPE_FDD) == 1){\r
-\r
- if(xran_fs_get_symbol_type(cc_id, tti, sym_id) == ((p_xran_dev_ctx->fh_init.io_cfg.id == O_DU)? XRAN_SYMBOL_TYPE_DL : XRAN_SYMBOL_TYPE_UL)\r
- || xran_fs_get_symbol_type(cc_id, tti, sym_id) == XRAN_SYMBOL_TYPE_FDD){\r
-\r
- if(iq_sample_size_bits != 16)\r
- print_err("Incorrect iqWidth %d\n", iq_sample_size_bits );\r
-\r
- pos = (char*) p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;\r
- mb = (void*) p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[sym_id].pCtrl;\r
- prb_map = (struct xran_prb_map *) p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers->pData;\r
-\r
-\r
- if(prb_map){\r
- int32_t elmIdx = 0;\r
- for (elmIdx = 0; elmIdx < prb_map->nPrbElm; elmIdx++){\r
- uint16_t sec_id = elmIdx;\r
- struct xran_prb_elm * prb_map_elm = &prb_map->prbMap[elmIdx];\r
- struct xran_section_desc * p_sec_desc = NULL;\r
-\r
- if(prb_map_elm == NULL){\r
- rte_panic("p_sec_desc == NULL\n");\r
- }\r
-\r
- p_sec_desc = prb_map_elm->p_sec_desc[sym_id];\r
-\r
- if(p_sec_desc == NULL){\r
- rte_panic("p_sec_desc == NULL\n");\r
- }\r
-\r
-#if 1\r
- p_sec_iq = ((char*)pos + p_sec_desc->iq_buffer_offset);\r
-\r
- /* calculete offset for external buffer */\r
- ext_buff_len = p_sec_desc->iq_buffer_len;\r
- ext_buff = p_sec_iq - (RTE_PKTMBUF_HEADROOM +\r
- sizeof (struct xran_ecpri_hdr) +\r
- sizeof (struct radio_app_common_hdr) +\r
- sizeof(struct data_section_hdr));\r
-\r
- ext_buff_len += RTE_PKTMBUF_HEADROOM +\r
- sizeof (struct xran_ecpri_hdr) +\r
- sizeof (struct radio_app_common_hdr) +\r
- sizeof(struct data_section_hdr) + 18;\r
-\r
- if(prb_map_elm->compMethod != XRAN_COMPMETHOD_NONE){\r
- ext_buff -= sizeof (struct data_section_compression_hdr);\r
- ext_buff_len += sizeof (struct data_section_compression_hdr);\r
- }\r
-\r
- eth_oran_hdr = rte_pktmbuf_alloc(_eth_mbuf_pool_small);\r
-\r
- if (unlikely (( eth_oran_hdr) == NULL)) {\r
- rte_panic("Failed rte_pktmbuf_alloc\n");\r
- }\r
-\r
- p_share_data->free_cb = extbuf_free_callback;\r
- p_share_data->fcb_opaque = NULL;\r
- rte_mbuf_ext_refcnt_set(p_share_data, 1);\r
-\r
- ext_buff_iova = rte_mempool_virt2iova(mb);\r
- if (unlikely (( ext_buff_iova) == 0)) {\r
- rte_panic("Failed rte_mem_virt2iova \n");\r
- }\r
-\r
- if (unlikely (( (rte_iova_t)ext_buff_iova) == RTE_BAD_IOVA)) {\r
- rte_panic("Failed rte_mem_virt2iova RTE_BAD_IOVA \n");\r
- }\r
-\r
- rte_pktmbuf_attach_extbuf(eth_oran_hdr,\r
- ext_buff,\r
- ext_buff_iova + RTE_PTR_DIFF(ext_buff , mb),\r
- ext_buff_len,\r
- p_share_data);\r
-\r
- rte_pktmbuf_reset_headroom(eth_oran_hdr);\r
-\r
- tmp = (struct rte_mbuf *)rte_pktmbuf_prepend(eth_oran_hdr, sizeof(struct ether_hdr));\r
- if (unlikely (( tmp) == NULL)) {\r
- rte_panic("Failed rte_pktmbuf_prepend \n");\r
- }\r
- mb = eth_oran_hdr;\r
-\r
- /* first all PRBs */\r
- prepare_symbol_ex(direction, sec_id,\r
- mb,\r
- (struct rb_map *)p_sec_iq,\r
- prb_map_elm->compMethod,\r
- prb_map_elm->iqWidth,\r
- p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder,\r
- frame_id, subframe_id, slot_id, sym_id,\r
- prb_map_elm->nRBStart, prb_map_elm->nRBSize,\r
- cc_id, ant_id,\r
- (p_xran_dev_ctx->fh_init.io_cfg.id == O_DU) ?\r
- xran_get_updl_seqid(pHandle, cc_id, ant_id) :\r
- xran_get_upul_seqid(pHandle, cc_id, ant_id),\r
- 0);\r
-\r
- rte_mbuf_sanity_check((struct rte_mbuf *)mb, 0);\r
- tx_counter++;\r
- tx_bytes_counter += rte_pktmbuf_pkt_len((struct rte_mbuf *)mb);\r
- p_xran_dev_ctx->send_upmbuf2ring((struct rte_mbuf *)mb, ETHER_TYPE_ECPRI);\r
-#else\r
- p_sect_iq = pos + p_sec_desc->iq_buffer_offset;\r
- prb_num = prb_map_elm->nRBSize;\r
-\r
- if( prb_num > 136 || prb_num == 0) {\r
- /* first 136 PRBs */\r
- rte_panic("first 136 PRBs\n");\r
- send_symbol_ex(direction,\r
- sec_id,\r
- NULL,\r
- (struct rb_map *)p_sect_iq,\r
- p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder,\r
- frame_id, subframe_id, slot_id, sym_id,\r
- 0, 136,\r
- cc_id, ant_id,\r
- (p_xran_dev_ctx->fh_init.io_cfg.id == O_DU) ?\r
- xran_get_updl_seqid(pHandle, cc_id, ant_id) :\r
- xran_get_upul_seqid(pHandle, cc_id, ant_id));\r
-\r
- pos += 136 * N_SC_PER_PRB * (iq_sample_size_bits/8)*2;\r
- /* last 137 PRBs */\r
- send_symbol_ex(direction, sec_id,\r
- NULL,\r
- (struct rb_map *)p_sect_iq,\r
- p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder,\r
- frame_id, subframe_id, slot_id, sym_id,\r
- 136, 137,\r
- cc_id, ant_id,\r
- (p_xran_dev_ctx->fh_init.io_cfg.id == O_DU) ?\r
- xran_get_updl_seqid(pHandle, cc_id, ant_id) :\r
- xran_get_upul_seqid(pHandle, cc_id, ant_id));\r
- retval = 1;\r
- } else {\r
- send_symbol_ex(direction,\r
- sec_id, /* xran_alloc_sectionid(pHandle, direction, cc_id, ant_id, slot_id)*/\r
- /*(struct rte_mbuf *)mb*/ NULL,\r
- (struct rb_map *)p_sect_iq,\r
- p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder,\r
- frame_id, subframe_id, slot_id, sym_id,\r
- prb_map_elm->nRBStart, prb_map_elm->nRBSize,\r
- cc_id, ant_id,\r
- (p_xran_dev_ctx->fh_init.io_cfg.id == O_DU) ?\r
- xran_get_updl_seqid(pHandle, cc_id, ant_id) :\r
- xran_get_upul_seqid(pHandle, cc_id, ant_id));\r
- retval = 1;\r
- }\r
-\r
-#endif\r
-\r
- }\r
- } else {\r
- printf("(%d %d %d %d) prb_map == NULL\n", tti % XRAN_N_FE_BUF_LEN, cc_id, ant_id, sym_id);\r
- }\r
-\r
- if(p_xran_dev_ctx->enablePrach\r
- && (p_xran_dev_ctx->fh_init.io_cfg.id == O_RU)) { /* Only RU needs to send PRACH I/Q */\r
- uint32_t is_prach_slot = xran_is_prach_slot(subframe_id, slot_id);\r
- if(((frame_id % pPrachCPConfig->x) == pPrachCPConfig->y[0])\r
- && (is_prach_slot == 1)\r
- && (sym_id >= p_xran_dev_ctx->prach_start_symbol[cc_id])\r
- && (sym_id <= p_xran_dev_ctx->prach_last_symbol[cc_id])) { //is prach slot\r
- int prach_port_id = ant_id + pPrachCPConfig->eAxC_offset;\r
- pos = (char*) p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[0].pData;\r
- pos += (sym_id - p_xran_dev_ctx->prach_start_symbol[cc_id]) * pPrachCPConfig->numPrbc * N_SC_PER_PRB * 4;\r
- mb = NULL;//(void*) p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[0].pCtrl;\r
-\r
- send_symbol_ex(direction,\r
- xran_alloc_sectionid(pHandle, direction, cc_id, prach_port_id, slot_id),\r
- (struct rte_mbuf *)mb,\r
- (struct rb_map *)pos,\r
- p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder,\r
- frame_id, subframe_id, slot_id, sym_id,\r
- pPrachCPConfig->startPrbc, pPrachCPConfig->numPrbc,\r
- cc_id, prach_port_id,\r
- xran_get_upul_seqid(pHandle, cc_id, prach_port_id));\r
- retval = 1;\r
- } /* if((frame_id % pPrachCPConfig->x == pPrachCPConfig->y[0]) .... */\r
- } /* if(p_xran_dev_ctx->enablePrach ..... */\r
-\r
-\r
- if(p_xran_dev_ctx->enableSrs && (p_xran_dev_ctx->fh_init.io_cfg.id == O_RU)){\r
- if( p_srs_cfg->symbMask & (1 << sym_id) /* is SRS symbol */\r
- && do_srs) {\r
- int32_t ant_elm_id = 0;\r
-\r
- for (ant_elm_id = 0; ant_elm_id < num_ant_elm; ant_elm_id++){\r
- int32_t ant_elm_eAxC_id = ant_elm_id + p_srs_cfg->eAxC_offset;\r
-\r
- pos = (char*) p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_elm_id].sBufferList.pBuffers[sym_id].pData;\r
- mb = (void*) p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_elm_id].sBufferList.pBuffers[sym_id].pCtrl;\r
-\r
- if( prb_num > 136 || prb_num == 0) {\r
- uint16_t sec_id = xran_alloc_sectionid(pHandle, direction, cc_id, ant_id, slot_id);\r
- /* first 136 PRBs */\r
- send_symbol_ex(direction,\r
- sec_id,\r
- NULL,\r
- (struct rb_map *)pos,\r
- p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder,\r
- frame_id, subframe_id, slot_id, sym_id,\r
- 0, 136,\r
- cc_id, ant_elm_eAxC_id,\r
- (p_xran_dev_ctx->fh_init.io_cfg.id == O_DU) ?\r
- xran_get_updl_seqid(pHandle, cc_id, ant_elm_eAxC_id) :\r
- xran_get_upul_seqid(pHandle, cc_id, ant_elm_eAxC_id));\r
-\r
- pos += 136 * N_SC_PER_PRB * (iq_sample_size_bits/8)*2;\r
- /* last 137 PRBs */\r
- send_symbol_ex(direction, sec_id,\r
- NULL,\r
- (struct rb_map *)pos,\r
- p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder,\r
- frame_id, subframe_id, slot_id, sym_id,\r
- 136, 137,\r
- cc_id, ant_elm_eAxC_id,\r
- (p_xran_dev_ctx->fh_init.io_cfg.id == O_DU) ?\r
- xran_get_updl_seqid(pHandle, cc_id, ant_elm_eAxC_id) :\r
- xran_get_upul_seqid(pHandle, cc_id, ant_elm_eAxC_id));\r
- } else {\r
- send_symbol_ex(direction,\r
- xran_alloc_sectionid(pHandle, direction, cc_id, ant_elm_eAxC_id, slot_id),\r
- (struct rte_mbuf *)mb,\r
- (struct rb_map *)pos,\r
- p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder,\r
- frame_id, subframe_id, slot_id, sym_id,\r
- 0, prb_num,\r
- cc_id, ant_elm_eAxC_id,\r
- (p_xran_dev_ctx->fh_init.io_cfg.id == O_DU) ?\r
- xran_get_updl_seqid(pHandle, cc_id, ant_elm_eAxC_id) :\r
- xran_get_upul_seqid(pHandle, cc_id, ant_elm_eAxC_id));\r
- retval = 1;\r
- }\r
- } /* for ant elem */\r
- } /* SRS symbol */\r
- } /* SRS enabled */\r
- } /* RU mode or C-Plane is not used */\r
- }\r
-\r
- return retval;\r
-}\r
-\r
-\r
-int32_t xran_process_tx_sym_cp_on(uint8_t ctx_id, uint32_t tti, int32_t cc_id, int32_t ant_id, uint32_t frame_id, uint32_t subframe_id,\r
- uint32_t slot_id, uint32_t sym_id)\r
-{\r
- int32_t retval = 0;\r
- uint64_t t1 = MLogTick();\r
-\r
- struct rte_mbuf *eth_oran_hdr = NULL;\r
- char *ext_buff = NULL;\r
- uint16_t ext_buff_len = 0;\r
- struct rte_mbuf *tmp = NULL;\r
- rte_iova_t ext_buff_iova = 0;\r
- void *pHandle = NULL;\r
- char *pos = NULL;\r
- char *p_sec_iq = NULL;\r
- void *mb = NULL;\r
- int prb_num = 0;\r
- uint16_t iq_sample_size_bits = 16; // TODO: make dynamic per\r
- uint32_t next = 0;\r
- int32_t num_sections = 0;\r
-\r
- struct xran_section_info *sectinfo = NULL;\r
- struct xran_device_ctx *p_xran_dev_ctx = xran_dev_get_ctx();\r
-\r
- struct xran_prach_cp_config *pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfig);\r
- struct xran_srs_config *p_srs_cfg = &(p_xran_dev_ctx->srs_cfg);\r
- enum xran_pkt_dir direction;\r
-\r
- struct rte_mbuf_ext_shared_info * p_share_data = &share_data[tti % XRAN_N_FE_BUF_LEN];\r
-\r
- if(p_xran_dev_ctx->fh_init.io_cfg.id == O_DU) {\r
- direction = XRAN_DIR_DL; /* O-DU */\r
- prb_num = p_xran_dev_ctx->fh_cfg.nDLRBs;\r
- } else {\r
- direction = XRAN_DIR_UL; /* RU */\r
- prb_num = p_xran_dev_ctx->fh_cfg.nULRBs;\r
- }\r
-\r
- next = 0;\r
- num_sections = xran_cp_getsize_section_info(pHandle, direction, cc_id, ant_id, ctx_id);\r
- /* iterate C-Plane configuration to generate corresponding U-Plane */\r
- while(next < num_sections) {\r
- sectinfo = xran_cp_iterate_section_info(pHandle, direction, cc_id, ant_id, ctx_id, &next);\r
-\r
- if(sectinfo == NULL)\r
- break;\r
-\r
- if(sectinfo->type != XRAN_CP_SECTIONTYPE_1) { /* only supports type 1 */\r
- print_err("Invalid section type in section DB - %d", sectinfo->type);\r
- continue;\r
- }\r
-\r
- /* skip, if not scheduled */\r
- if(sym_id < sectinfo->startSymId || sym_id >= sectinfo->startSymId + sectinfo->numSymbol)\r
- continue;\r
-\r
- if(sectinfo->compMeth)\r
- iq_sample_size_bits = sectinfo->iqWidth;\r
-\r
- print_dbg(">>> sym %2d [%d] type%d, id %d, startPrbc=%d, numPrbc=%d, numSymbol=%d\n", sym_id, next,\r
- sectinfo->type, sectinfo->id, sectinfo->startPrbc,\r
- sectinfo->numPrbc, sectinfo->numSymbol);\r
-\r
- p_xran_dev_ctx->tx_mbufs[0].len = 0;\r
- uint16_t len = p_xran_dev_ctx->tx_mbufs[0].len;\r
- int16_t len2 = 0;\r
- uint16_t i = 0;\r
-\r
- //Added for Klocworks\r
- if (len >= MBUF_TABLE_SIZE)\r
- len = MBUF_TABLE_SIZE - 1;\r
-\r
- pos = (char*) p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;\r
- mb = p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[sym_id].pCtrl;\r
-\r
-#if 1\r
- p_sec_iq = ((char*)pos + sectinfo->sec_desc[sym_id].iq_buffer_offset);\r
-\r
- /* calculete offset for external buffer */\r
- ext_buff_len = sectinfo->sec_desc[sym_id].iq_buffer_len;\r
- ext_buff = p_sec_iq - (RTE_PKTMBUF_HEADROOM +\r
- sizeof (struct xran_ecpri_hdr) +\r
- sizeof (struct radio_app_common_hdr) +\r
- sizeof(struct data_section_hdr));\r
-\r
- ext_buff_len += RTE_PKTMBUF_HEADROOM +\r
- sizeof (struct xran_ecpri_hdr) +\r
- sizeof (struct radio_app_common_hdr) +\r
- sizeof(struct data_section_hdr) + 18;\r
-\r
- if(sectinfo->compMeth != XRAN_COMPMETHOD_NONE){\r
- ext_buff -= sizeof (struct data_section_compression_hdr);\r
- ext_buff_len += sizeof (struct data_section_compression_hdr);\r
- }\r
-\r
- eth_oran_hdr = rte_pktmbuf_alloc(_eth_mbuf_pool_small);\r
-\r
- if (unlikely (( eth_oran_hdr) == NULL)) {\r
- rte_panic("Failed rte_pktmbuf_alloc\n");\r
- }\r
-\r
- p_share_data->free_cb = extbuf_free_callback;\r
- p_share_data->fcb_opaque = NULL;\r
- rte_mbuf_ext_refcnt_set(p_share_data, 1);\r
-\r
- ext_buff_iova = rte_mempool_virt2iova(mb);\r
- if (unlikely (( ext_buff_iova) == 0)) {\r
- rte_panic("Failed rte_mem_virt2iova \n");\r
- }\r
-\r
- if (unlikely (( (rte_iova_t)ext_buff_iova) == RTE_BAD_IOVA)) {\r
- rte_panic("Failed rte_mem_virt2iova RTE_BAD_IOVA \n");\r
- }\r
-\r
- rte_pktmbuf_attach_extbuf(eth_oran_hdr,\r
- ext_buff,\r
- ext_buff_iova + RTE_PTR_DIFF(ext_buff , mb),\r
- ext_buff_len,\r
- p_share_data);\r
-\r
- rte_pktmbuf_reset_headroom(eth_oran_hdr);\r
-\r
- tmp = (struct rte_mbuf *)rte_pktmbuf_prepend(eth_oran_hdr, sizeof(struct ether_hdr));\r
- if (unlikely (( tmp) == NULL)) {\r
- rte_panic("Failed rte_pktmbuf_prepend \n");\r
- }\r
- mb = eth_oran_hdr;\r
-#else\r
- rte_pktmbuf_refcnt_update(mb, 1); /* make sure eth won't free our mbuf */\r
-#endif\r
- /* first all PRBs */\r
- prepare_symbol_ex(direction, sectinfo->id,\r
- mb,\r
- (struct rb_map *)p_sec_iq,\r
- sectinfo->compMeth,\r
- sectinfo->iqWidth,\r
- p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder,\r
- frame_id, subframe_id, slot_id, sym_id,\r
- sectinfo->startPrbc, sectinfo->numPrbc,\r
- cc_id, ant_id,\r
- xran_get_updl_seqid(pHandle, cc_id, ant_id),\r
- 0);\r
-\r
- /* if we don't need to do any fragmentation */\r
- if (likely (p_xran_dev_ctx->fh_init.mtu >=\r
- sectinfo->numPrbc * (3*iq_sample_size_bits + 1))) {\r
- /* no fragmentation */\r
- p_xran_dev_ctx->tx_mbufs[0].m_table[len] = mb;\r
- len2 = 1;\r
- } else {\r
- /* fragmentation */\r
- uint8_t * seq_num = xran_get_updl_seqid_addr(pHandle, cc_id, ant_id);\r
- if(seq_num)\r
- (*seq_num)--;\r
- else\r
- rte_panic("pointer to seq number is NULL [CC %d Ant %d]\n", cc_id, ant_id);\r
-\r
- len2 = xran_app_fragment_packet(mb,\r
- &p_xran_dev_ctx->tx_mbufs[0].m_table[len],\r
- (uint16_t)(MBUF_TABLE_SIZE - len),\r
- p_xran_dev_ctx->fh_init.mtu,\r
- p_xran_dev_ctx->direct_pool,\r
- p_xran_dev_ctx->indirect_pool,\r
- sectinfo,\r
- seq_num);\r
-\r
- /* Free input packet */\r
- rte_pktmbuf_free(mb);\r
-\r
- /* If we fail to fragment the packet */\r
- if (unlikely (len2 < 0)){\r
- print_err("len2= %d\n", len2);\r
- return 0;\r
- }\r
- }\r
-\r
- if(len2 > 1){\r
- for (i = len; i < len + len2; i ++) {\r
- struct rte_mbuf *m;\r
- m = p_xran_dev_ctx->tx_mbufs[0].m_table[i];\r
- struct ether_hdr *eth_hdr = (struct ether_hdr *)\r
- rte_pktmbuf_prepend(m, (uint16_t)sizeof(struct ether_hdr));\r
- if (eth_hdr == NULL) {\r
- rte_panic("No headroom in mbuf.\n");\r
- }\r
- }\r
- }\r
-\r
- len += len2;\r
-\r
- if (unlikely(len > XRAN_MAX_PKT_BURST_PER_SYM)) {\r
- rte_panic("XRAN_MAX_PKT_BURST_PER_SYM\n");\r
- }\r
-\r
- /* Transmit packets */\r
- xran_send_burst(p_xran_dev_ctx, (uint16_t)len, 0);\r
- p_xran_dev_ctx->tx_mbufs[0].len = 0;\r
- retval = 1;\r
- } /* while(section) */\r
-\r
- return retval;\r
-}\r
-\r
-int32_t xran_process_tx_sym(void *arg)\r
-{\r
- int32_t retval = 0;\r
- uint32_t tti=0;\r
-#if XRAN_MLOG_VAR\r
- uint32_t mlogVar[10];\r
- uint32_t mlogVarCnt = 0;\r
-#endif\r
- unsigned long t1 = MLogTick();\r
-\r
- void *pHandle = NULL;\r
- int32_t ant_id = 0;\r
- int32_t cc_id = 0;\r
- uint8_t num_eAxc = 0;\r
- uint8_t num_CCPorts = 0;\r
- uint8_t num_ant_elm = 0;\r
- uint32_t frame_id = 0;\r
- uint32_t subframe_id = 0;\r
- uint32_t slot_id = 0;\r
- uint32_t sym_id = 0;\r
- uint32_t sym_idx = 0;\r
-\r
- uint8_t ctx_id;\r
- enum xran_pkt_dir direction;\r
- struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();\r
-\r
- if(p_xran_dev_ctx->xran2phy_mem_ready == 0)\r
- return 0;\r
-\r
- /* O-RU: send symb after OTA time with delay (UL) */\r
- /* O-DU: send symb in advance of OTA time (DL) */\r
- sym_idx = XranOffsetSym(p_xran_dev_ctx->sym_up, xran_lib_ota_sym_idx, XRAN_NUM_OF_SYMBOL_PER_SLOT*SLOTNUM_PER_SUBFRAME*1000);\r
-\r
- tti = XranGetTtiNum(sym_idx, XRAN_NUM_OF_SYMBOL_PER_SLOT);\r
- slot_id = XranGetSlotNum(tti, SLOTNUM_PER_SUBFRAME);\r
- subframe_id = XranGetSubFrameNum(tti,SLOTNUM_PER_SUBFRAME, SUBFRAMES_PER_SYSTEMFRAME);\r
- frame_id = XranGetFrameNum(tti,xran_getSfnSecStart(),SUBFRAMES_PER_SYSTEMFRAME, SLOTNUM_PER_SUBFRAME);\r
- // ORAN frameId, 8 bits, [0, 255]\r
- frame_id = (frame_id & 0xff);\r
-\r
- sym_id = XranGetSymNum(sym_idx, XRAN_NUM_OF_SYMBOL_PER_SLOT);\r
- ctx_id = XranGetSlotNum(tti, SLOTS_PER_SYSTEMFRAME) % XRAN_MAX_SECTIONDB_CTX;\r
-\r
- print_dbg("[%d]SFN %d sf %d slot %d\n", tti, frame_id, subframe_id, slot_id);\r
-\r
-#if XRAN_MLOG_VAR\r
- mlogVar[mlogVarCnt++] = 0xAAAAAAAA;\r
- mlogVar[mlogVarCnt++] = xran_lib_ota_sym_idx;\r
- mlogVar[mlogVarCnt++] = sym_idx;\r
- mlogVar[mlogVarCnt++] = abs(p_xran_dev_ctx->sym_up);\r
- mlogVar[mlogVarCnt++] = tti;\r
- mlogVar[mlogVarCnt++] = frame_id;\r
- mlogVar[mlogVarCnt++] = subframe_id;\r
- mlogVar[mlogVarCnt++] = slot_id;\r
- mlogVar[mlogVarCnt++] = sym_id;\r
- MLogAddVariables(mlogVarCnt, mlogVar, MLogTick());\r
-#endif\r
-\r
- if(p_xran_dev_ctx->fh_init.io_cfg.id == O_RU && xran_get_ru_category(pHandle) == XRAN_CATEGORY_B) {\r
- num_eAxc = xran_get_num_eAxcUl(pHandle);\r
- } else {\r
- num_eAxc = xran_get_num_eAxc(pHandle);\r
- }\r
-\r
- num_CCPorts = xran_get_num_cc(pHandle);\r
- /* U-Plane */\r
- for(ant_id = 0; ant_id < num_eAxc; ant_id++) {\r
- for(cc_id = 0; cc_id < num_CCPorts; cc_id++) {\r
- if(p_xran_dev_ctx->fh_init.io_cfg.id == O_DU && p_xran_dev_ctx->enableCP){\r
- retval = xran_process_tx_sym_cp_on(ctx_id, tti, cc_id, ant_id, frame_id, subframe_id, slot_id, sym_id);\r
- } else {\r
- retval = xran_process_tx_sym_cp_off(ctx_id, tti, cc_id, ant_id, frame_id, subframe_id, slot_id, sym_id, (ant_id == (num_eAxc - 1)));\r
- }\r
- } /* for(cc_id = 0; cc_id < num_CCPorts; cc_id++) */\r
- } /* for(ant_id = 0; ant_id < num_eAxc; ant_id++) */\r
-\r
- MLogTask(PID_PROCESS_TX_SYM, t1, MLogTick());\r
- return retval;\r
-}\r
-\r
-int xran_packet_and_dpdk_timer_thread(void *args)\r
-{\r
- struct xran_ethdi_ctx *const ctx = xran_ethdi_get_ctx();\r
-\r
- uint64_t prev_tsc = 0;\r
- uint64_t cur_tsc = rte_rdtsc();\r
- uint64_t diff_tsc = cur_tsc - prev_tsc;\r
- cpu_set_t cpuset;\r
- struct sched_param sched_param;\r
- int res = 0;\r
- printf("%s [CPU %2d] [PID: %6d]\n", __FUNCTION__, rte_lcore_id(), getpid());\r
-\r
- sched_param.sched_priority = XRAN_THREAD_DEFAULT_PRIO;\r
-\r
- if ((res = pthread_setschedparam(pthread_self(), 1, &sched_param)))\r
- {\r
- printf("priority is not changed: coreId = %d, result1 = %d\n",rte_lcore_id(), res);\r
- }\r
-\r
- while(1){\r
-\r
- cur_tsc = rte_rdtsc();\r
- diff_tsc = cur_tsc - prev_tsc;\r
- if (diff_tsc > TIMER_RESOLUTION_CYCLES) {\r
- rte_timer_manage();\r
- prev_tsc = cur_tsc;\r
- }\r
-\r
- if (XRAN_STOPPED == xran_if_current_state)\r
- break;\r
- }\r
-\r
- printf("Closing pkts timer thread...\n");\r
- return 0;\r
-}\r
-\r
-\r
-int32_t xran_init(int argc, char *argv[],\r
- struct xran_fh_init *p_xran_fh_init, char *appName, void ** pXranLayerHandle)\r
-{\r
- int32_t i;\r
- int32_t j;\r
-\r
- struct xran_io_loop_cfg *p_io_cfg = (struct xran_io_loop_cfg *)&p_xran_fh_init->io_cfg;\r
- struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();\r
-\r
- cpu_set_t system_cpuset;\r
- pthread_getaffinity_np(pthread_self(), sizeof(cpu_set_t), &system_cpuset);\r
- for (j = 0; j < CPU_SETSIZE; j++)\r
- if (CPU_ISSET(j, &system_cpuset))\r
- break;\r
-\r
- int32_t lcore_id = j;\r
-\r
- char filename[64];\r
- int64_t offset_sec, offset_nsec;\r
-\r
- memset(p_xran_dev_ctx, 0, sizeof(struct xran_device_ctx));\r
-\r
- /* copy init */\r
- p_xran_dev_ctx->fh_init = *p_xran_fh_init;\r
-\r
- printf(" %s: MTU %d\n", __FUNCTION__, p_xran_dev_ctx->fh_init.mtu);\r
-\r
- xran_if_current_state = XRAN_INIT;\r
-\r
- memcpy(&(p_xran_dev_ctx->eAxc_id_cfg), &(p_xran_fh_init->eAxCId_conf), sizeof(struct xran_eaxcid_config));\r
-\r
- p_xran_dev_ctx->enableCP = p_xran_fh_init->enableCP;\r
- p_xran_dev_ctx->enablePrach = p_xran_fh_init->prachEnable;\r
- p_xran_dev_ctx->enableSrs = p_xran_fh_init->srsEnable;\r
- p_xran_dev_ctx->DynamicSectionEna = p_xran_fh_init->DynamicSectionEna;\r
-\r
- /* To make sure to set default functions */\r
- p_xran_dev_ctx->send_upmbuf2ring = NULL;\r
- p_xran_dev_ctx->send_cpmbuf2ring = NULL;\r
-\r
- xran_register_ethertype_handler(ETHER_TYPE_ECPRI, handle_ecpri_ethertype);\r
- if (p_io_cfg->id == 0)\r
- xran_ethdi_init_dpdk_io(p_xran_fh_init->filePrefix,\r
- p_io_cfg,\r
- &lcore_id,\r
- (struct ether_addr *)p_xran_fh_init->p_o_du_addr,\r
- (struct ether_addr *)p_xran_fh_init->p_o_ru_addr,\r
- p_xran_fh_init->cp_vlan_tag,\r
- p_xran_fh_init->up_vlan_tag);\r
- else\r
- xran_ethdi_init_dpdk_io(p_xran_fh_init->filePrefix,\r
- p_io_cfg,\r
- &lcore_id,\r
- (struct ether_addr *)p_xran_fh_init->p_o_ru_addr,\r
- (struct ether_addr *)p_xran_fh_init->p_o_du_addr,\r
- p_xran_fh_init->cp_vlan_tag,\r
- p_xran_fh_init->up_vlan_tag);\r
-\r
- for(i = 0; i < 10; i++ )\r
- rte_timer_init(&tti_to_phy_timer[i]);\r
-\r
- rte_timer_init(&sym_timer);\r
- for (i = 0; i< MAX_NUM_OF_DPDK_TIMERS; i++)\r
- rte_timer_init(&dpdk_timer[i]);\r
-\r
- p_xran_dev_ctx->direct_pool = socket_direct_pool;\r
- p_xran_dev_ctx->indirect_pool = socket_indirect_pool;\r
-\r
- for (i = 0; i< XRAN_MAX_SECTOR_NR; i++){\r
- for (j = 0; j< XRAN_NUM_OF_SYMBOL_PER_SLOT; j++){\r
- LIST_INIT (&p_xran_dev_ctx->sym_cb_list_head[i][j]);\r
- }\r
- }\r
-\r
- printf("Set debug stop %d, debug stop count %d\n", p_xran_fh_init->debugStop, p_xran_fh_init->debugStopCount);\r
- timing_set_debug_stop(p_xran_fh_init->debugStop, p_xran_fh_init->debugStopCount);\r
-\r
- for (uint32_t nCellIdx = 0; nCellIdx < XRAN_MAX_SECTOR_NR; nCellIdx++){\r
- xran_fs_clear_slot_type(nCellIdx);\r
- }\r
-\r
- *pXranLayerHandle = p_xran_dev_ctx;\r
-\r
- if(p_xran_fh_init->GPS_Alpha || p_xran_fh_init->GPS_Beta ){\r
- offset_sec = p_xran_fh_init->GPS_Beta / 100; //resolution of beta is 10ms\r
- offset_nsec = (p_xran_fh_init->GPS_Beta - offset_sec * 100) * 1e7 + p_xran_fh_init->GPS_Alpha;\r
- p_xran_dev_ctx->offset_sec = offset_sec;\r
- p_xran_dev_ctx->offset_nsec = offset_nsec;\r
- }else {\r
- p_xran_dev_ctx->offset_sec = 0;\r
- p_xran_dev_ctx->offset_nsec = 0;\r
- }\r
-\r
- return 0;\r
-}\r
-\r
-int32_t xran_sector_get_instances (void * pDevHandle, uint16_t nNumInstances,\r
- xran_cc_handle_t * pSectorInstanceHandles)\r
-{\r
- xran_status_t nStatus = XRAN_STATUS_FAIL;\r
- struct xran_device_ctx *pDev = (struct xran_device_ctx *)pDevHandle;\r
- XranSectorHandleInfo *pCcHandle = NULL;\r
- int32_t i = 0;\r
-\r
- /* Check for the Valid Parameters */\r
- CHECK_NOT_NULL (pSectorInstanceHandles, XRAN_STATUS_INVALID_PARAM);\r
-\r
- if (!nNumInstances) {\r
- print_dbg("Instance is not assigned for this function !!! \n");\r
- return XRAN_STATUS_INVALID_PARAM;\r
- }\r
-\r
- for (i = 0; i < nNumInstances; i++) {\r
-\r
- /* Allocate Memory for CC handles */\r
- pCcHandle = (XranSectorHandleInfo *) _mm_malloc( /*"xran_cc_handles",*/ sizeof (XranSectorHandleInfo), 64);\r
-\r
- if(pCcHandle == NULL)\r
- return XRAN_STATUS_RESOURCE;\r
-\r
- memset (pCcHandle, 0, (sizeof (XranSectorHandleInfo)));\r
-\r
- pCcHandle->nIndex = i;\r
- pCcHandle->nXranPort = pDev->xran_port_id;\r
-\r
- printf("%s [%d]: CC %d handle %p\n", __FUNCTION__, pDev->xran_port_id, i, pCcHandle);\r
- pLibInstanceHandles[pDev->xran_port_id][i] = pSectorInstanceHandles[i] = pCcHandle;\r
-\r
- printf("Handle: %p Instance: %p\n",\r
- &pSectorInstanceHandles[i], pSectorInstanceHandles[i]);\r
- }\r
-\r
- return XRAN_STATUS_SUCCESS;\r
-}\r
-\r
-int32_t xran_mm_init (void * pHandle, uint64_t nMemorySize,\r
- uint32_t nMemorySegmentSize)\r
-{\r
- /* we use mbuf from dpdk memory */\r
- return 0;\r
-}\r
-\r
-int32_t xran_bm_init (void * pHandle, uint32_t * pPoolIndex, uint32_t nNumberOfBuffers, uint32_t nBufferSize)\r
-{\r
- XranSectorHandleInfo* pXranCc = (XranSectorHandleInfo*) pHandle;\r
- uint32_t nAllocBufferSize;\r
-\r
- char pool_name[RTE_MEMPOOL_NAMESIZE];\r
-\r
- snprintf(pool_name, RTE_MEMPOOL_NAMESIZE, "ru_%d_cc_%d_idx_%d",\r
- pXranCc->nXranPort, pXranCc->nIndex, pXranCc->nBufferPoolIndex);\r
-\r
- nAllocBufferSize = nBufferSize + sizeof(struct ether_hdr) +\r
- sizeof (struct xran_ecpri_hdr) +\r
- sizeof (struct radio_app_common_hdr) +\r
- sizeof(struct data_section_hdr) + 256;\r
-\r
- if(nAllocBufferSize >= UINT16_MAX) {\r
- rte_panic("nAllocBufferSize is failed [ handle %p %d %d ] [nPoolIndex %d] nNumberOfBuffers %d nBufferSize %d nAllocBufferSize %d\n",\r
- pXranCc, pXranCc->nXranPort, pXranCc->nIndex, pXranCc->nBufferPoolIndex, nNumberOfBuffers, nBufferSize, nAllocBufferSize);\r
- return -1;\r
- }\r
-\r
- printf("%s: [ handle %p %d %d ] [nPoolIndex %d] nNumberOfBuffers %d nBufferSize %d\n", pool_name,\r
- pXranCc, pXranCc->nXranPort, pXranCc->nIndex, pXranCc->nBufferPoolIndex, nNumberOfBuffers, nBufferSize);\r
-\r
- pXranCc->p_bufferPool[pXranCc->nBufferPoolIndex] = rte_pktmbuf_pool_create(pool_name, nNumberOfBuffers,\r
- MBUF_CACHE, 0, nAllocBufferSize, rte_socket_id());\r
-\r
- if(pXranCc->p_bufferPool[pXranCc->nBufferPoolIndex] == NULL){\r
- rte_panic("rte_pktmbuf_pool_create failed [ handle %p %d %d ] [nPoolIndex %d] nNumberOfBuffers %d nBufferSize %d errno %s\n",\r
- pXranCc, pXranCc->nXranPort, pXranCc->nIndex, pXranCc->nBufferPoolIndex, nNumberOfBuffers, nBufferSize, rte_strerror(rte_errno));\r
- return -1;\r
- }\r
-\r
- pXranCc->bufferPoolElmSz[pXranCc->nBufferPoolIndex] = nBufferSize;\r
- pXranCc->bufferPoolNumElm[pXranCc->nBufferPoolIndex] = nNumberOfBuffers;\r
-\r
- printf("CC:[ handle %p ru %d cc_idx %d ] [nPoolIndex %d] mb pool %p \n",\r
- pXranCc, pXranCc->nXranPort, pXranCc->nIndex,\r
- pXranCc->nBufferPoolIndex, pXranCc->p_bufferPool[pXranCc->nBufferPoolIndex]);\r
-\r
- *pPoolIndex = pXranCc->nBufferPoolIndex++;\r
-\r
- return 0;\r
-}\r
-\r
-int32_t xran_bm_allocate_buffer(void * pHandle, uint32_t nPoolIndex, void **ppData, void **ppCtrl)\r
-{\r
- XranSectorHandleInfo* pXranCc = (XranSectorHandleInfo*) pHandle;\r
- *ppData = NULL;\r
- *ppCtrl = NULL;\r
-\r
- struct rte_mbuf * mb = rte_pktmbuf_alloc(pXranCc->p_bufferPool[nPoolIndex]);\r
-\r
- if(mb){\r
- char * start = rte_pktmbuf_append(mb, pXranCc->bufferPoolElmSz[nPoolIndex]);\r
- char * ethhdr = rte_pktmbuf_prepend(mb, sizeof(struct ether_hdr));\r
-\r
- if(start && ethhdr){\r
- char * iq_offset = rte_pktmbuf_mtod(mb, char * );\r
- /* skip headers */\r
- iq_offset = iq_offset + sizeof(struct ether_hdr) +\r
- sizeof (struct xran_ecpri_hdr) +\r
- sizeof (struct radio_app_common_hdr) +\r
- sizeof(struct data_section_hdr);\r
-\r
- if (0) /* if compression */\r
- iq_offset += sizeof (struct data_section_compression_hdr);\r
-\r
- *ppData = (void *)iq_offset;\r
- *ppCtrl = (void *)mb;\r
- } else {\r
- print_err("[nPoolIndex %d] start ethhdr failed \n", nPoolIndex );\r
- return -1;\r
- }\r
- } else {\r
- print_err("[nPoolIndex %d] mb alloc failed \n", nPoolIndex );\r
- return -1;\r
- }\r
-\r
- if (*ppData == NULL){\r
- print_err("[nPoolIndex %d] rte_pktmbuf_append for %d failed \n", nPoolIndex, pXranCc->bufferPoolElmSz[nPoolIndex]);\r
- return -1;\r
- }\r
-\r
- return 0;\r
-}\r
-\r
-int32_t xran_bm_free_buffer(void * pHandle, void *pData, void *pCtrl)\r
-{\r
- XranSectorHandleInfo* pXranCc = (XranSectorHandleInfo*) pHandle;\r
-\r
- if(pCtrl)\r
- rte_pktmbuf_free(pCtrl);\r
-\r
- return 0;\r
-}\r
-\r
-int32_t xran_5g_fronthault_config (void * pHandle,\r
- struct xran_buffer_list *pSrcBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN],\r
- struct xran_buffer_list *pSrcCpBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN],\r
- struct xran_buffer_list *pDstBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN],\r
- struct xran_buffer_list *pDstCpBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN],\r
- xran_transport_callback_fn pCallback,\r
- void *pCallbackTag)\r
-{\r
- XranSectorHandleInfo* pXranCc = (XranSectorHandleInfo*) pHandle;\r
- xran_status_t nStatus = XRAN_STATUS_SUCCESS;\r
- int j, i = 0, z, k;\r
- struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();\r
-\r
- print_dbg("%s\n", __FUNCTION__);\r
-\r
- if(NULL == pHandle)\r
- {\r
- printf("Handle is NULL!\n");\r
- return XRAN_STATUS_FAIL;\r
- }\r
-\r
- if (pCallback == NULL)\r
- {\r
- printf ("no callback\n");\r
- return XRAN_STATUS_FAIL;\r
- }\r
-\r
- i = pXranCc->nIndex;\r
-\r
- for(j=0; j<XRAN_N_FE_BUF_LEN; j++)\r
- {\r
- for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){\r
- /* U-plane TX */\r
-\r
- p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[j][i][z].bValid = 0;\r
- p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;\r
- p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;\r
- p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;\r
- p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;\r
- p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &p_xran_dev_ctx->sFrontHaulTxBuffers[j][i][z][0];\r
-\r
- p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList = *pSrcBuffer[z][j];\r
-\r
- /* C-plane TX */\r
- p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].bValid = 0;\r
- p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegGenerated = -1;\r
- p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;\r
- p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred = 0;\r
- p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;\r
- p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &p_xran_dev_ctx->sFrontHaulTxPrbMapBuffers[j][i][z][0];\r
-\r
- p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList = *pSrcCpBuffer[z][j];\r
-\r
- /* U-plane RX */\r
-\r
- p_xran_dev_ctx->sFrontHaulRxBbuIoBufCtrl[j][i][z].bValid = 0;\r
- p_xran_dev_ctx->sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;\r
- p_xran_dev_ctx->sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;\r
- p_xran_dev_ctx->sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;\r
- p_xran_dev_ctx->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;\r
- p_xran_dev_ctx->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &p_xran_dev_ctx->sFrontHaulRxBuffers[j][i][z][0];\r
-\r
- p_xran_dev_ctx->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList = *pDstBuffer[z][j];\r
-\r
- /* C-plane RX */\r
- p_xran_dev_ctx->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].bValid = 0;\r
- p_xran_dev_ctx->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegGenerated = -1;\r
- p_xran_dev_ctx->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;\r
- p_xran_dev_ctx->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred = 0;\r
- p_xran_dev_ctx->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;\r
- p_xran_dev_ctx->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &p_xran_dev_ctx->sFrontHaulRxPrbMapBuffers[j][i][z][0];\r
-\r
- p_xran_dev_ctx->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList = *pDstCpBuffer[z][j];\r
- }\r
- }\r
-\r
-\r
- p_xran_dev_ctx->pCallback[i] = pCallback;\r
- p_xran_dev_ctx->pCallbackTag[i] = pCallbackTag;\r
-\r
- p_xran_dev_ctx->xran2phy_mem_ready = 1;\r
-\r
- return nStatus;\r
-}\r
-\r
-int32_t xran_5g_prach_req (void * pHandle,\r
- struct xran_buffer_list *pDstBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN],\r
- xran_transport_callback_fn pCallback,\r
- void *pCallbackTag)\r
-{\r
- XranSectorHandleInfo* pXranCc = (XranSectorHandleInfo*) pHandle;\r
- xran_status_t nStatus = XRAN_STATUS_SUCCESS;\r
- int j, i = 0, z;\r
- struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();\r
-\r
- if(NULL == pHandle)\r
- {\r
- printf("Handle is NULL!\n");\r
- return XRAN_STATUS_FAIL;\r
- }\r
- if (pCallback == NULL)\r
- {\r
- printf ("no callback\n");\r
- return XRAN_STATUS_FAIL;\r
- }\r
-\r
- i = pXranCc->nIndex;\r
-\r
- for(j=0; j<XRAN_N_FE_BUF_LEN; j++)\r
- {\r
- for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){\r
- p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[j][i][z].bValid = 0;\r
- p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;\r
- p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;\r
- p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;\r
- p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_MAX_ANTENNA_NR; // ant number.\r
- p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &p_xran_dev_ctx->sFHPrachRxBuffers[j][i][z][0];\r
- p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList = *pDstBuffer[z][j];\r
- }\r
- }\r
-\r
- p_xran_dev_ctx->pPrachCallback[i] = pCallback;\r
- p_xran_dev_ctx->pPrachCallbackTag[i] = pCallbackTag;\r
-\r
- return 0;\r
-}\r
-\r
-\r
-int32_t xran_5g_srs_req (void * pHandle,\r
- struct xran_buffer_list *pDstBuffer[XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_N_FE_BUF_LEN],\r
- xran_transport_callback_fn pCallback,\r
- void *pCallbackTag)\r
-{\r
- XranSectorHandleInfo* pXranCc = (XranSectorHandleInfo*) pHandle;\r
- xran_status_t nStatus = XRAN_STATUS_SUCCESS;\r
- int j, i = 0, z;\r
- struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();\r
-\r
- if(NULL == pHandle)\r
- {\r
- printf("Handle is NULL!\n");\r
- return XRAN_STATUS_FAIL;\r
- }\r
- if (pCallback == NULL)\r
- {\r
- printf ("no callback\n");\r
- return XRAN_STATUS_FAIL;\r
- }\r
-\r
- i = pXranCc->nIndex;\r
-\r
- for(j=0; j<XRAN_N_FE_BUF_LEN; j++)\r
- {\r
- for(z = 0; z < XRAN_MAX_ANT_ARRAY_ELM_NR; z++){\r
- p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[j][i][z].bValid = 0;\r
- p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;\r
- p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;\r
- p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;\r
- p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_MAX_ANT_ARRAY_ELM_NR; // ant number.\r
- p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &p_xran_dev_ctx->sFHSrsRxBuffers[j][i][z][0];\r
- p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList = *pDstBuffer[z][j];\r
- }\r
- }\r
-\r
- p_xran_dev_ctx->pSrsCallback[i] = pCallback;\r
- p_xran_dev_ctx->pSrsCallbackTag[i] = pCallbackTag;\r
-\r
- return 0;\r
-}\r
-\r
-uint32_t xran_get_time_stats(uint64_t *total_time, uint64_t *used_time, uint32_t *core_used, uint32_t clear)\r
-{\r
- *total_time = xran_total_tick;\r
- *used_time = xran_used_tick;\r
- *core_used = xran_core_used;\r
-\r
- if (clear)\r
- {\r
- xran_total_tick = 0;\r
- xran_used_tick = 0;\r
- }\r
-\r
- return 0;\r
-}\r
-\r
-void * xran_malloc(size_t buf_len)\r
-{\r
- return rte_malloc("External buffer", buf_len, RTE_CACHE_LINE_SIZE);\r
-}\r
-\r
-uint8_t *xran_add_hdr_offset(uint8_t *dst, int16_t compMethod)\r
-{\r
- dst+= (RTE_PKTMBUF_HEADROOM +\r
- sizeof (struct xran_ecpri_hdr) +\r
- sizeof (struct radio_app_common_hdr) +\r
- sizeof(struct data_section_hdr));\r
-\r
- if(compMethod != XRAN_COMPMETHOD_NONE)\r
- dst += sizeof (struct data_section_compression_hdr);\r
-\r
- dst = RTE_PTR_ALIGN_CEIL(dst, 64);\r
-\r
- return dst;\r
-}\r
-\r
-int32_t xran_open(void *pHandle, struct xran_fh_config* pConf)\r
-{\r
- int32_t i;\r
- uint8_t nNumerology = 0;\r
- int32_t lcore_id = 0;\r
- struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();\r
- struct xran_fh_config *pFhCfg;\r
- pFhCfg = &(p_xran_dev_ctx->fh_cfg);\r
-\r
- memcpy(pFhCfg, pConf, sizeof(struct xran_fh_config));\r
-\r
- if(pConf->log_level)\r
- printf(" %s: O-RU Category %s\n", __FUNCTION__, (pFhCfg->ru_conf.xranCat == XRAN_CATEGORY_A) ? "A" : "B");\r
-\r
- nNumerology = xran_get_conf_numerology(pHandle);\r
-\r
- if (pConf->nCC > XRAN_MAX_SECTOR_NR)\r
- {\r
- if(pConf->log_level)\r
- printf("Number of cells %d exceeds max number supported %d!\n", pConf->nCC, XRAN_MAX_SECTOR_NR);\r
- pConf->nCC = XRAN_MAX_SECTOR_NR;\r
-\r
- }\r
- if(pConf->ru_conf.iqOrder != XRAN_I_Q_ORDER\r
- || pConf->ru_conf.byteOrder != XRAN_NE_BE_BYTE_ORDER ){\r
-\r
- print_err("Byte order and/or IQ order is not supported [IQ %d byte %d]\n", pConf->ru_conf.iqOrder, pConf->ru_conf.byteOrder);\r
- return XRAN_STATUS_FAIL;\r
- }\r
-\r
- /* setup PRACH configuration for C-Plane */\r
- xran_init_prach(pConf, p_xran_dev_ctx);\r
- xran_init_srs(pConf, p_xran_dev_ctx);\r
-\r
- xran_cp_init_sectiondb(pHandle);\r
- xran_init_sectionid(pHandle);\r
- xran_init_seqid(pHandle);\r
-\r
- if(pConf->ru_conf.xran_max_frame) {\r
- xran_max_frame = pConf->ru_conf.xran_max_frame;\r
- printf("xran_max_frame %d\n", xran_max_frame);\r
- }\r
-\r
- interval_us = xran_fs_get_tti_interval(nNumerology);\r
-\r
- if(pConf->log_level){\r
- printf("%s: interval_us=%ld\n", __FUNCTION__, interval_us);\r
- }\r
- timing_set_numerology(nNumerology);\r
-\r
- for(i = 0 ; i <pConf->nCC; i++){\r
- xran_fs_set_slot_type(i, pConf->frame_conf.nFrameDuplexType, pConf->frame_conf.nTddPeriod,\r
- pConf->frame_conf.sSlotConfig);\r
- }\r
-\r
- xran_fs_slot_limit_init(xran_fs_get_tti_interval(nNumerology));\r
-\r
- if(xran_ethdi_get_ctx()->io_cfg.bbdev_mode != XRAN_BBDEV_NOT_USED){\r
- p_xran_dev_ctx->bbdev_dec = pConf->bbdev_dec;\r
- p_xran_dev_ctx->bbdev_enc = pConf->bbdev_enc;\r
- }\r
-\r
- /* if send_xpmbuf2ring needs to be changed from default functions,\r
- * then those should be set between xran_init and xran_open */\r
- if(p_xran_dev_ctx->send_cpmbuf2ring == NULL)\r
- p_xran_dev_ctx->send_cpmbuf2ring = xran_ethdi_mbuf_send_cp;\r
- if(p_xran_dev_ctx->send_upmbuf2ring == NULL)\r
- p_xran_dev_ctx->send_upmbuf2ring = xran_ethdi_mbuf_send;\r
-\r
- /* Start packet processing thread */\r
- if((uint16_t)xran_ethdi_get_ctx()->io_cfg.port[XRAN_UP_VF] != 0xFFFF &&\r
- (uint16_t)xran_ethdi_get_ctx()->io_cfg.port[XRAN_CP_VF] != 0xFFFF ){\r
- if(pConf->log_level){\r
- print_dbg("XRAN_UP_VF: 0x%04x\n", xran_ethdi_get_ctx()->io_cfg.port[XRAN_UP_VF]);\r
- print_dbg("XRAN_CP_VF: 0x%04x\n", xran_ethdi_get_ctx()->io_cfg.port[XRAN_CP_VF]);\r
- }\r
- if (rte_eal_remote_launch(xran_timing_source_thread, xran_dev_get_ctx(), xran_ethdi_get_ctx()->io_cfg.timing_core))\r
- rte_panic("thread_run() failed to start\n");\r
- } else if(pConf->log_level){\r
- printf("Eth port was not open. Processing thread was not started\n");\r
- }\r
-\r
- return 0;\r
-}\r
-\r
-int32_t xran_start(void *pHandle)\r
-{\r
- if(xran_get_if_state() == XRAN_RUNNING) {\r
- print_err("Already STARTED!!");\r
- return (-1);\r
- }\r
-\r
- xran_if_current_state = XRAN_RUNNING;\r
- return 0;\r
-}\r
-\r
-int32_t xran_stop(void *pHandle)\r
-{\r
- if(xran_get_if_state() == XRAN_STOPPED) {\r
- print_err("Already STOPPED!!");\r
- return (-1);\r
- }\r
-\r
- xran_if_current_state = XRAN_STOPPED;\r
- return 0;\r
-}\r
-\r
-int32_t xran_close(void *pHandle)\r
-{\r
- xran_if_current_state = XRAN_STOPPED;\r
- //TODO: fix memory leak xran_cp_free_sectiondb(pHandle);\r
- //rte_eal_mp_wait_lcore();\r
- //xran_ethdi_ports_stats();\r
-\r
-#ifdef RTE_LIBRTE_PDUMP\r
- /* uninitialize packet capture framework */\r
- rte_pdump_uninit();\r
-#endif\r
- return 0;\r
-}\r
-\r
-int32_t xran_mm_destroy (void * pHandle)\r
-{\r
- if(xran_get_if_state() == XRAN_RUNNING) {\r
- print_err("Please STOP first !!");\r
- return (-1);\r
- }\r
-\r
- /* functionality is not yet implemented */\r
- return -1;\r
-}\r
-\r
-int32_t xran_reg_sym_cb(void *pHandle, xran_callback_sym_fn symCb, void * symCbParam, uint8_t symb, uint8_t ant)\r
-{\r
- if(xran_get_if_state() == XRAN_RUNNING) {\r
- print_err("Cannot register callback while running!!\n");\r
- return (-1);\r
- }\r
-\r
- /* functionality is not yet implemented */\r
- print_err("Functionality is not yet implemented !");\r
- return -1;\r
-}\r
-\r
-int32_t xran_reg_physide_cb(void *pHandle, xran_fh_tti_callback_fn Cb, void *cbParam, int skipTtiNum, enum callback_to_phy_id id)\r
-{\r
- struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();\r
-\r
- if(xran_get_if_state() == XRAN_RUNNING) {\r
- print_err("Cannot register callback while running!!\n");\r
- return (-1);\r
- }\r
-\r
- p_xran_dev_ctx->ttiCb[id] = Cb;\r
- p_xran_dev_ctx->TtiCbParam[id] = cbParam;\r
- p_xran_dev_ctx->SkipTti[id] = skipTtiNum;\r
-\r
- return 0;\r
-}\r
-\r
-/* send_cpmbuf2ring and send_upmbuf2ring should be set between xran_init and xran_open\r
- * each cb will be set by default duing open if it is set by NULL */\r
-int xran_register_cb_mbuf2ring(xran_ethdi_mbuf_send_fn mbuf_send_cp, xran_ethdi_mbuf_send_fn mbuf_send_up)\r
-{\r
- struct xran_device_ctx *p_xran_dev_ctx;\r
-\r
- if(xran_get_if_state() == XRAN_RUNNING) {\r
- print_err("Cannot register callback while running!!\n");\r
- return (-1);\r
- }\r
-\r
- p_xran_dev_ctx = xran_dev_get_ctx();\r
-\r
- p_xran_dev_ctx->send_cpmbuf2ring = mbuf_send_cp;\r
- p_xran_dev_ctx->send_upmbuf2ring = mbuf_send_up;\r
-\r
- return (0);\r
-}\r
-\r
-\r
-int32_t xran_get_slot_idx (uint32_t *nFrameIdx, uint32_t *nSubframeIdx, uint32_t *nSlotIdx, uint64_t *nSecond)\r
-{\r
- int32_t tti = 0;\r
-\r
- tti = (int32_t)XranGetTtiNum(xran_lib_ota_sym_idx, XRAN_NUM_OF_SYMBOL_PER_SLOT);\r
- *nSlotIdx = (uint32_t)XranGetSlotNum(tti, SLOTNUM_PER_SUBFRAME);\r
- *nSubframeIdx = (uint32_t)XranGetSubFrameNum(tti,SLOTNUM_PER_SUBFRAME, SUBFRAMES_PER_SYSTEMFRAME);\r
- *nFrameIdx = (uint32_t)XranGetFrameNum(tti,xran_getSfnSecStart(),SUBFRAMES_PER_SYSTEMFRAME, SLOTNUM_PER_SUBFRAME);\r
- *nSecond = timing_get_current_second();\r
-\r
- return tti;\r
-}\r
-\r
-\r
-/**\r
- * @brief Get the configuration of eAxC ID\r
- *\r
- * @return the pointer of configuration\r
- */\r
-inline struct xran_eaxcid_config *xran_get_conf_eAxC(void *pHandle)\r
-{\r
- return (&(xran_dev_get_ctx()->eAxc_id_cfg));\r
-}\r
-\r
-/**\r
- * @brief Get the configuration of the total number of beamforming weights on RU\r
- *\r
- * @return Configured the number of beamforming weights\r
- */\r
-inline uint8_t xran_get_conf_num_bfweights(void *pHandle)\r
-{\r
- return (xran_dev_get_ctx()->fh_init.totalBfWeights);\r
-}\r
-\r
-/**\r
- * @brief Get the configuration of subcarrier spacing for PRACH\r
- *\r
- * @return subcarrier spacing value for PRACH\r
- */\r
-inline uint8_t xran_get_conf_prach_scs(void *pHandle)\r
-{\r
- return (xran_lib_get_ctx_fhcfg()->prach_conf.nPrachSubcSpacing);\r
-}\r
-\r
-/**\r
- * @brief Get the configuration of FFT size for RU\r
- *\r
- * @return FFT size value for RU\r
- */\r
-inline uint8_t xran_get_conf_fftsize(void *pHandle)\r
-{\r
- return (xran_lib_get_ctx_fhcfg()->ru_conf.fftSize);\r
-}\r
-\r
-/**\r
- * @brief Get the configuration of nummerology\r
- *\r
- * @return Configured numerology\r
- */\r
-inline uint8_t xran_get_conf_numerology(void *pHandle)\r
-{\r
- return (xran_lib_get_ctx_fhcfg()->frame_conf.nNumerology);\r
-}\r
-\r
-/**\r
- * @brief Get the configuration of IQ bit width for RU\r
- *\r
- * @return IQ bit width for RU\r
- */\r
-inline uint8_t xran_get_conf_iqwidth(void *pHandle)\r
-{\r
- struct xran_fh_config *pFhCfg;\r
-\r
- pFhCfg = xran_lib_get_ctx_fhcfg();\r
- return ((pFhCfg->ru_conf.iqWidth==16)?0:pFhCfg->ru_conf.iqWidth);\r
-}\r
-\r
-/**\r
- * @brief Get the configuration of compression method for RU\r
- *\r
- * @return Compression method for RU\r
- */\r
-inline uint8_t xran_get_conf_compmethod(void *pHandle)\r
-{\r
- return (xran_lib_get_ctx_fhcfg()->ru_conf.compMeth);\r
-}\r
-\r
-\r
-/**\r
- * @brief Get the configuration of the number of component carriers\r
- *\r
- * @return Configured the number of component carriers\r
- */\r
-inline uint8_t xran_get_num_cc(void *pHandle)\r
-{\r
- return (xran_lib_get_ctx_fhcfg()->nCC);\r
-}\r
-\r
-/**\r
- * @brief Get the configuration of the number of antenna for UL\r
- *\r
- * @return Configured the number of antenna\r
- */\r
-inline uint8_t xran_get_num_eAxc(void *pHandle)\r
-{\r
- return (xran_lib_get_ctx_fhcfg()->neAxc);\r
-}\r
-\r
-/**\r
- * @brief Get configuration of O-RU (Cat A or Cat B)\r
- *\r
- * @return Configured the number of antenna\r
- */\r
-inline enum xran_category xran_get_ru_category(void *pHandle)\r
-{\r
- return (xran_lib_get_ctx_fhcfg()->ru_conf.xranCat);\r
-}\r
-\r
-/**\r
- * @brief Get the configuration of the number of antenna\r
- *\r
- * @return Configured the number of antenna\r
- */\r
-inline uint8_t xran_get_num_eAxcUl(void *pHandle)\r
-{\r
- return (xran_lib_get_ctx_fhcfg()->neAxcUl);\r
-}\r
-\r
-/**\r
- * @brief Get the configuration of the number of antenna elements\r
- *\r
- * @return Configured the number of antenna\r
- */\r
-inline uint8_t xran_get_num_ant_elm(void *pHandle)\r
-{\r
- return (xran_lib_get_ctx_fhcfg()->nAntElmTRx);\r
-}\r
-\r
-int32_t xran_get_common_counters(void *pXranLayerHandle, struct xran_common_counters *pStats)\r
-{\r
- struct xran_device_ctx* pDev = (struct xran_device_ctx*)pXranLayerHandle;\r
-\r
- if(pStats && pDev) {\r
- *pStats = pDev->fh_counters;\r
- return XRAN_STATUS_SUCCESS;\r
- } else {\r
- return XRAN_STATUS_INVALID_PARAM;\r
- }\r
-}\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief XRAN main functionality module
+ * @file xran_main.c
+ * @ingroup group_source_xran
+ * @author Intel Corporation
+ **/
+
+#define _GNU_SOURCE
+#include <sched.h>
+#include <assert.h>
+#include <err.h>
+#include <libgen.h>
+#include <sys/time.h>
+#include <sys/queue.h>
+#include <time.h>
+#include <unistd.h>
+#include <stdio.h>
+#include <pthread.h>
+#include <malloc.h>
+
+#include <rte_common.h>
+#include <rte_eal.h>
+#include <rte_errno.h>
+#include <rte_lcore.h>
+#include <rte_cycles.h>
+#include <rte_memory.h>
+#include <rte_memzone.h>
+#include <rte_mbuf.h>
+#include <rte_ring.h>
+
+#include "xran_fh_o_du.h"
+
+#include "ethdi.h"
+#include "xran_pkt.h"
+#include "xran_up_api.h"
+#include "xran_cp_api.h"
+#include "xran_sync_api.h"
+#include "xran_lib_mlog_tasks_id.h"
+#include "xran_timer.h"
+#include "xran_common.h"
+#include "xran_frame_struct.h"
+#include "xran_printf.h"
+#include "xran_app_frag.h"
+
+#include "xran_mlog_lnx.h"
+
+#define DIV_ROUND_OFFSET(X,Y) ( X/Y + ((X%Y)?1:0) )
+
+#define XranOffsetSym(offSym, otaSym, numSymTotal) (((int32_t)offSym > (int32_t)otaSym) ? \
+ ((int32_t)otaSym + ((int32_t)numSymTotal) - (uint32_t)offSym) : \
+ (((int32_t)otaSym - (int32_t)offSym) >= numSymTotal) ? \
+ (((int32_t)otaSym - (int32_t)offSym) - numSymTotal) : \
+ ((int32_t)otaSym - (int32_t)offSym))
+
+#define MAX_NUM_OF_XRAN_CTX (2)
+#define XranIncrementCtx(ctx) ((ctx >= (MAX_NUM_OF_XRAN_CTX-1)) ? 0 : (ctx+1))
+#define XranDecrementCtx(ctx) ((ctx == 0) ? (MAX_NUM_OF_XRAN_CTX-1) : (ctx-1))
+
+#define MAX_NUM_OF_DPDK_TIMERS (10)
+#define DpdkTimerIncrementCtx(ctx) ((ctx >= (MAX_NUM_OF_DPDK_TIMERS-1)) ? 0 : (ctx+1))
+#define DpdkTimerDecrementCtx(ctx) ((ctx == 0) ? (MAX_NUM_OF_DPDK_TIMERS-1) : (ctx-1))
+
+/* Difference between Unix seconds to GPS seconds
+ GPS epoch: 1980.1.6 00:00:00 (UTC); Unix time epoch: 1970:1.1 00:00:00 UTC
+ Value is calculated on Sep.6 2019. Need to be change if International
+ Earth Rotation and Reference Systems Service (IERS) adds more leap seconds
+ 1970:1.1 - 1980.1.6: 3657 days
+ 3657*24*3600=315 964 800 seconds (unix seconds value at 1980.1.6 00:00:00 (UTC))
+ There are 18 leap seconds inserted after 1980.1.6 00:00:00 (UTC), which means
+ GPS is 18 larger. 315 964 800 - 18 = 315 964 782
+*/
+#define UNIX_TO_GPS_SECONDS_OFFSET 315964782UL
+#define NUM_OF_FRAMES_PER_SECOND 100
+
+//#define XRAN_CREATE_RBMAP /**< generate slot map base on symbols */
+
+
+struct xran_timer_ctx {
+ uint32_t tti_to_process;
+};
+
+static xran_cc_handle_t pLibInstanceHandles[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR] = {NULL};
+static struct xran_device_ctx g_xran_dev_ctx[XRAN_PORTS_NUM] = { 0 };
+
+struct xran_timer_ctx timer_ctx[MAX_NUM_OF_XRAN_CTX];
+
+static struct rte_timer tti_to_phy_timer[10];
+static struct rte_timer sym_timer;
+static struct rte_timer dpdk_timer[MAX_NUM_OF_DPDK_TIMERS];
+
+uint64_t interval_us = 1000;
+
+uint32_t xran_lib_ota_tti = 0; /**< Slot index in a second [0:(1000000/TTI-1)] */
+uint32_t xran_lib_ota_sym = 0; /**< Symbol index in a slot [0:13] */
+uint32_t xran_lib_ota_sym_idx = 0; /**< Symbol index in a second [0 : 14*(1000000/TTI)-1]
+ where TTI is TTI interval in microseconds */
+uint16_t xran_SFN_at_Sec_Start = 0; /**< SFN at current second start */
+uint16_t xran_max_frame = 1023; /**< value of max frame used. expected to be 99 (old compatibility mode) and 1023 as per section 9.7.2 System Frame Number Calculation */
+
+static uint8_t xran_cp_seq_id_num[XRAN_MAX_CELLS_PER_PORT][XRAN_DIR_MAX][XRAN_MAX_ANTENNA_NR * 2 + XRAN_MAX_ANT_ARRAY_ELM_NR]; /* XRAN_MAX_ANTENNA_NR * 2 for PUSCH and PRACH */
+static uint8_t xran_updl_seq_id_num[XRAN_MAX_CELLS_PER_PORT][XRAN_MAX_ANTENNA_NR];
+static uint8_t xran_upul_seq_id_num[XRAN_MAX_CELLS_PER_PORT][XRAN_MAX_ANTENNA_NR * 2 + XRAN_MAX_ANT_ARRAY_ELM_NR]; /**< PUSCH, PRACH, SRS for Cat B */
+
+static uint8_t xran_section_id_curslot[XRAN_DIR_MAX][XRAN_MAX_CELLS_PER_PORT][XRAN_MAX_ANTENNA_NR * 2+ XRAN_MAX_ANT_ARRAY_ELM_NR];
+static uint16_t xran_section_id[XRAN_DIR_MAX][XRAN_MAX_CELLS_PER_PORT][XRAN_MAX_ANTENNA_NR * 2+ XRAN_MAX_ANT_ARRAY_ELM_NR];
+static uint64_t xran_total_tick = 0, xran_used_tick = 0;
+static uint32_t xran_core_used = 0;
+static int32_t first_call = 0;
+
+
+static void
+extbuf_free_callback(void *addr __rte_unused, void *opaque __rte_unused)
+{
+}
+
+static struct rte_mbuf_ext_shared_info share_data[XRAN_N_FE_BUF_LEN];
+
+void xran_timer_arm(struct rte_timer *tim, void* arg);
+
+int32_t xran_process_tx_sym(void *arg);
+
+int32_t xran_process_rx_sym(void *arg,
+ struct rte_mbuf *mbuf,
+ void *iq_data_start,
+ uint16_t size,
+ uint8_t CC_ID,
+ uint8_t Ant_ID,
+ uint8_t frame_id,
+ uint8_t subframe_id,
+ uint8_t slot_id,
+ uint8_t symb_id,
+ uint16_t num_prbu,
+ uint16_t start_prbu,
+ uint16_t sym_inc,
+ uint16_t rb,
+ uint16_t sect_id,
+ uint32_t *mb_free);
+
+int32_t xran_process_prach_sym(void *arg,
+ struct rte_mbuf *mbuf,
+ void *iq_data_start,
+ uint16_t size,
+ uint8_t CC_ID,
+ uint8_t Ant_ID,
+ uint8_t frame_id,
+ uint8_t subframe_id,
+ uint8_t slot_id,
+ uint8_t symb_id,
+ uint16_t num_prbu,
+ uint16_t start_prbu,
+ uint16_t sym_inc,
+ uint16_t rb,
+ uint16_t sect_id,
+ uint32_t *mb_free);
+
+int32_t xran_process_srs_sym(void *arg,
+ struct rte_mbuf *mbuf,
+ void *iq_data_start,
+ uint16_t size,
+ uint8_t CC_ID,
+ uint8_t Ant_ID,
+ uint8_t frame_id,
+ uint8_t subframe_id,
+ uint8_t slot_id,
+ uint8_t symb_id,
+ uint16_t num_prbu,
+ uint16_t start_prbu,
+ uint16_t sym_inc,
+ uint16_t rb,
+ uint16_t sect_id,
+ uint32_t *mb_free);
+
+
+void tti_ota_cb(struct rte_timer *tim, void *arg);
+void tti_to_phy_cb(struct rte_timer *tim, void *arg);
+void xran_timer_arm_ex(struct rte_timer *tim, void* CbFct, void *CbArg, unsigned tim_lcore);
+
+// Return SFN at current second start, 10 bits, [0, 1023]
+static inline uint16_t xran_getSfnSecStart(void)
+{
+ return xran_SFN_at_Sec_Start;
+}
+void xran_updateSfnSecStart(void)
+{
+ uint64_t currentSecond = timing_get_current_second();
+ // Assume always positive
+ uint64_t gpsSecond = currentSecond - UNIX_TO_GPS_SECONDS_OFFSET;
+ uint64_t nFrames = gpsSecond * NUM_OF_FRAMES_PER_SECOND;
+ uint16_t sfn = (uint16_t)(nFrames % (xran_max_frame + 1));
+ xran_SFN_at_Sec_Start = sfn;
+
+ tx_bytes_per_sec = tx_bytes_counter;
+ rx_bytes_per_sec = rx_bytes_counter;
+ tx_bytes_counter = 0;
+ rx_bytes_counter = 0;
+}
+
+static inline int32_t xran_getSlotIdxSecond(void)
+{
+ int32_t frameIdxSecond = xran_getSfnSecStart();
+ int32_t slotIndxSecond = frameIdxSecond * SLOTS_PER_SYSTEMFRAME;
+ return slotIndxSecond;
+}
+
+struct xran_device_ctx *xran_dev_get_ctx(void)
+{
+ return &g_xran_dev_ctx[0];
+}
+
+static inline struct xran_fh_config *xran_lib_get_ctx_fhcfg(void)
+{
+ return (&(xran_dev_get_ctx()->fh_cfg));
+}
+
+uint16_t xran_get_beamid(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ant_id, uint8_t slot_id)
+{
+ return (0); // NO BEAMFORMING
+}
+
+enum xran_if_state xran_get_if_state(void)
+{
+ return xran_if_current_state;
+}
+
+int xran_is_prach_slot(uint32_t subframe_id, uint32_t slot_id)
+{
+ struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
+ struct xran_prach_cp_config *pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfig);
+ int32_t is_prach_slot = 0;
+
+ if (p_xran_dev_ctx->fh_cfg.frame_conf.nNumerology < 2){
+ //for FR1, in 38.211 tab 6.3.3.2-2&3 it is subframe index
+ if (pPrachCPConfig->isPRACHslot[subframe_id] == 1){
+ if (pPrachCPConfig->nrofPrachInSlot != 1)
+ is_prach_slot = 1;
+ else{
+ if (p_xran_dev_ctx->fh_cfg.frame_conf.nNumerology == 0)
+ is_prach_slot = 1;
+ else if (slot_id == 1)
+ is_prach_slot = 1;
+ }
+ }
+ } else if (p_xran_dev_ctx->fh_cfg.frame_conf.nNumerology == 3){
+ //for FR2, 38.211 tab 6.3.3.4 it is slot index of 60kHz slot
+ uint32_t slotidx;
+ slotidx = subframe_id * SLOTNUM_PER_SUBFRAME + slot_id;
+ if (pPrachCPConfig->nrofPrachInSlot == 2){
+ if (pPrachCPConfig->isPRACHslot[slotidx>>1] == 1)
+ is_prach_slot = 1;
+ } else {
+ if ((pPrachCPConfig->isPRACHslot[slotidx>>1] == 1) && ((slotidx % 2) == 1)){
+ is_prach_slot = 1;
+ }
+ }
+ } else
+ print_err("Numerology %d not supported", p_xran_dev_ctx->fh_cfg.frame_conf.nNumerology);
+ return is_prach_slot;
+}
+
+int xran_init_sectionid(void *pHandle)
+{
+ int cell, ant, dir;
+
+ for (dir = 0; dir < XRAN_DIR_MAX; dir++){
+ for(cell=0; cell < XRAN_MAX_CELLS_PER_PORT; cell++) {
+ for(ant=0; ant < XRAN_MAX_ANTENNA_NR; ant++) {
+ xran_section_id[dir][cell][ant] = 0;
+ xran_section_id_curslot[dir][cell][ant] = 255;
+ }
+ }
+ }
+
+ return (0);
+}
+
+int xran_init_srs(struct xran_fh_config* pConf, struct xran_device_ctx * p_xran_dev_ctx)
+{
+ struct xran_srs_config *p_srs = &(p_xran_dev_ctx->srs_cfg);
+
+ if(p_srs){
+ p_srs->symbMask = pConf->srs_conf.symbMask;
+ p_srs->eAxC_offset = pConf->srs_conf.eAxC_offset;
+ print_dbg("SRS sym %d\n", p_srs->symbMask );
+ print_dbg("SRS eAxC_offset %d\n", p_srs->eAxC_offset);
+ }
+ return (XRAN_STATUS_SUCCESS);
+}
+
+
+int xran_init_prach(struct xran_fh_config* pConf, struct xran_device_ctx * p_xran_dev_ctx)
+{
+ int32_t i;
+ uint8_t slotNr;
+ struct xran_prach_config* pPRACHConfig = &(pConf->prach_conf);
+ const xRANPrachConfigTableStruct *pxRANPrachConfigTable;
+ uint8_t nNumerology = pConf->frame_conf.nNumerology;
+ uint8_t nPrachConfIdx = pPRACHConfig->nPrachConfIdx;
+ struct xran_prach_cp_config *pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfig);
+
+ if (nNumerology > 2)
+ pxRANPrachConfigTable = &gxranPrachDataTable_mmw[nPrachConfIdx];
+ else if (pConf->frame_conf.nFrameDuplexType == 1)
+ pxRANPrachConfigTable = &gxranPrachDataTable_sub6_tdd[nPrachConfIdx];
+ else
+ pxRANPrachConfigTable = &gxranPrachDataTable_sub6_fdd[nPrachConfIdx];
+
+ uint8_t preambleFmrt = pxRANPrachConfigTable->preambleFmrt[0];
+ const xRANPrachPreambleLRAStruct *pxranPreambleforLRA = &gxranPreambleforLRA[preambleFmrt];
+ memset(pPrachCPConfig, 0, sizeof(struct xran_prach_cp_config));
+ if(pConf->log_level)
+ printf("xRAN open PRACH config: Numerology %u ConfIdx %u, preambleFmrt %u startsymb %u, numSymbol %u, occassionsInPrachSlot %u\n", nNumerology, nPrachConfIdx, preambleFmrt, pxRANPrachConfigTable->startingSym, pxRANPrachConfigTable->duration, pxRANPrachConfigTable->occassionsInPrachSlot);
+
+ pPrachCPConfig->filterIdx = XRAN_FILTERINDEX_PRACH_ABC; // 3, PRACH preamble format A1~3, B1~4, C0, C2
+ pPrachCPConfig->startSymId = pxRANPrachConfigTable->startingSym;
+ pPrachCPConfig->startPrbc = pPRACHConfig->nPrachFreqStart;
+ pPrachCPConfig->numPrbc = (preambleFmrt >= FORMAT_A1)? 12 : 70;
+ pPrachCPConfig->timeOffset = pxranPreambleforLRA->nRaCp;
+ pPrachCPConfig->freqOffset = xran_get_freqoffset(pPRACHConfig->nPrachFreqOffset, pPRACHConfig->nPrachSubcSpacing);
+ pPrachCPConfig->x = pxRANPrachConfigTable->x;
+ pPrachCPConfig->nrofPrachInSlot = pxRANPrachConfigTable->nrofPrachInSlot;
+ pPrachCPConfig->y[0] = pxRANPrachConfigTable->y[0];
+ pPrachCPConfig->y[1] = pxRANPrachConfigTable->y[1];
+ if (preambleFmrt >= FORMAT_A1)
+ {
+ pPrachCPConfig->numSymbol = pxRANPrachConfigTable->duration;
+ pPrachCPConfig->occassionsInPrachSlot = pxRANPrachConfigTable->occassionsInPrachSlot;
+ }
+ else
+ {
+ pPrachCPConfig->numSymbol = 1;
+ pPrachCPConfig->occassionsInPrachSlot = 1;
+ }
+
+ if(pConf->log_level)
+ printf("PRACH: x %u y[0] %u, y[1] %u prach slot: %u ..", pPrachCPConfig->x, pPrachCPConfig->y[0], pPrachCPConfig->y[1], pxRANPrachConfigTable->slotNr[0]);
+ pPrachCPConfig->isPRACHslot[pxRANPrachConfigTable->slotNr[0]] = 1;
+ for (i=1; i < XRAN_PRACH_CANDIDATE_SLOT; i++)
+ {
+ slotNr = pxRANPrachConfigTable->slotNr[i];
+ if (slotNr > 0){
+ pPrachCPConfig->isPRACHslot[slotNr] = 1;
+ if(pConf->log_level)
+ printf(" %u ..", slotNr);
+ }
+ }
+ printf("\n");
+ for (i = 0; i < XRAN_MAX_SECTOR_NR; i++){
+ p_xran_dev_ctx->prach_start_symbol[i] = pPrachCPConfig->startSymId;
+ p_xran_dev_ctx->prach_last_symbol[i] = pPrachCPConfig->startSymId + pPrachCPConfig->numSymbol * pPrachCPConfig->occassionsInPrachSlot - 1;
+ }
+ if(pConf->log_level){
+ printf("PRACH start symbol %u lastsymbol %u\n", p_xran_dev_ctx->prach_start_symbol[0], p_xran_dev_ctx->prach_last_symbol[0]);
+ }
+
+ pPrachCPConfig->eAxC_offset = xran_get_num_eAxc(NULL);
+ print_dbg("PRACH eAxC_offset %d\n", pPrachCPConfig->eAxC_offset);
+
+ return (XRAN_STATUS_SUCCESS);
+}
+
+inline uint16_t xran_alloc_sectionid(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ant_id, uint8_t slot_id)
+{
+ if(cc_id >= XRAN_MAX_CELLS_PER_PORT) {
+ print_err("Invalid CC ID - %d", cc_id);
+ return (0);
+ }
+ if(ant_id >= XRAN_MAX_ANTENNA_NR * 2 + XRAN_MAX_ANT_ARRAY_ELM_NR) { //for PRACH, ant_id starts from num_ant
+ print_err("Invalid antenna ID - %d", ant_id);
+ return (0);
+ }
+
+ /* if new slot has been started,
+ * then initializes section id again for new start */
+ if(xran_section_id_curslot[dir][cc_id][ant_id] != slot_id) {
+ xran_section_id[dir][cc_id][ant_id] = 0;
+ xran_section_id_curslot[dir][cc_id][ant_id] = slot_id;
+ }
+
+ return(xran_section_id[dir][cc_id][ant_id]++);
+}
+
+int xran_init_seqid(void *pHandle)
+{
+ int cell, dir, ant;
+
+ for(cell=0; cell < XRAN_MAX_CELLS_PER_PORT; cell++) {
+ for(dir=0; dir < XRAN_DIR_MAX; dir++) {
+ for(ant=0; ant < XRAN_MAX_ANTENNA_NR * 2; ant++)
+ xran_cp_seq_id_num[cell][dir][ant] = 0;
+ }
+ for(ant=0; ant < XRAN_MAX_ANTENNA_NR; ant++)
+ xran_updl_seq_id_num[cell][ant] = 0;
+ for(ant=0; ant < XRAN_MAX_ANTENNA_NR * 2 + XRAN_MAX_ANT_ARRAY_ELM_NR; ant++)
+ xran_upul_seq_id_num[cell][ant] = 0;
+ }
+
+ return (0);
+}
+
+static inline uint8_t xran_get_cp_seqid(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ant_id)
+{
+ if(dir >= XRAN_DIR_MAX) {
+ print_err("Invalid direction - %d", dir);
+ return (0);
+ }
+ if(cc_id >= XRAN_MAX_CELLS_PER_PORT) {
+ print_err("Invalid CC ID - %d", cc_id);
+ return (0);
+ }
+ if(ant_id >= XRAN_MAX_ANTENNA_NR * 2 + XRAN_MAX_ANT_ARRAY_ELM_NR) {
+ print_err("Invalid antenna ID - %d", ant_id);
+ return (0);
+ }
+
+ return(xran_cp_seq_id_num[cc_id][dir][ant_id]++);
+}
+static inline uint8_t xran_get_updl_seqid(void *pHandle, uint8_t cc_id, uint8_t ant_id)
+{
+ if(cc_id >= XRAN_MAX_CELLS_PER_PORT) {
+ print_err("Invalid CC ID - %d", cc_id);
+ return (0);
+ }
+ if(ant_id >= XRAN_MAX_ANTENNA_NR) {
+ print_err("Invalid antenna ID - %d", ant_id);
+ return (0);
+ }
+
+ /* Only U-Plane DL needs to get sequence ID in O-DU */
+ return(xran_updl_seq_id_num[cc_id][ant_id]++);
+}
+static inline uint8_t *xran_get_updl_seqid_addr(void *pHandle, uint8_t cc_id, uint8_t ant_id)
+{
+ if(cc_id >= XRAN_MAX_CELLS_PER_PORT) {
+ print_err("Invalid CC ID - %d", cc_id);
+ return (NULL);
+ }
+ if(ant_id >= XRAN_MAX_ANTENNA_NR) {
+ print_err("Invalid antenna ID - %d", ant_id);
+ return (NULL);
+ }
+
+ /* Only U-Plane DL needs to get sequence ID in O-DU */
+ return(&xran_updl_seq_id_num[cc_id][ant_id]);
+}
+static inline int8_t xran_check_upul_seqid(void *pHandle, uint8_t cc_id, uint8_t ant_id, uint8_t slot_id, uint8_t seq_id)
+{
+
+ if(cc_id >= XRAN_MAX_CELLS_PER_PORT) {
+ print_err("Invalid CC ID - %d", cc_id);
+ return (-1);
+ }
+
+ if(ant_id >= XRAN_MAX_ANTENNA_NR * 2 + XRAN_MAX_ANT_ARRAY_ELM_NR) {
+ print_err("Invalid antenna ID - %d", ant_id);
+ return (-1);
+ }
+
+ /* O-DU needs to check the sequence ID of U-Plane UL from O-RU */
+ xran_upul_seq_id_num[cc_id][ant_id]++;
+ if(xran_upul_seq_id_num[cc_id][ant_id] == seq_id) { /* expected sequence */
+ return (XRAN_STATUS_SUCCESS);
+ } else {
+ print_err("expected seqid %u received %u, slot %u, ant %u cc %u", xran_upul_seq_id_num[cc_id][ant_id], seq_id, slot_id, ant_id, cc_id);
+ xran_upul_seq_id_num[cc_id][ant_id] = seq_id; // for next
+ return (-1);
+ }
+}
+
+//////////////////////////////////////////
+// For RU emulation
+static inline uint8_t xran_get_upul_seqid(void *pHandle, uint8_t cc_id, uint8_t ant_id)
+{
+ if(cc_id >= XRAN_MAX_CELLS_PER_PORT) {
+ print_err("Invalid CC ID - %d", cc_id);
+ return (0);
+ }
+ if(ant_id >= XRAN_MAX_ANTENNA_NR * 2 + XRAN_MAX_ANT_ARRAY_ELM_NR) {
+ print_err("Invalid antenna ID - %d", ant_id);
+ return (0);
+ }
+
+ return(xran_upul_seq_id_num[cc_id][ant_id]++);
+}
+static inline uint8_t *xran_get_upul_seqid_addr(void *pHandle, uint8_t cc_id, uint8_t ant_id)
+{
+ if(cc_id >= XRAN_MAX_CELLS_PER_PORT) {
+ print_err("Invalid CC ID - %d", cc_id);
+ return (0);
+ }
+ if(ant_id >= XRAN_MAX_ANTENNA_NR * 2) {
+ print_err("Invalid antenna ID - %d", ant_id);
+ return (0);
+ }
+
+ return(&xran_upul_seq_id_num[cc_id][ant_id]);
+}
+static inline int8_t xran_check_cp_seqid(void *pHandle, uint8_t dir, uint8_t cc_id, uint8_t ant_id, uint8_t seq_id)
+{
+ if(dir >= XRAN_DIR_MAX) {
+ print_err("Invalid direction - %d", dir);
+ return (-1);
+ }
+ if(cc_id >= XRAN_MAX_CELLS_PER_PORT) {
+ print_err("Invalid CC ID - %d", cc_id);
+ return (-1);
+ }
+ if(ant_id >= XRAN_MAX_ANTENNA_NR * 2) {
+ print_err("Invalid antenna ID - %d", ant_id);
+ return (-1);
+ }
+
+ xran_cp_seq_id_num[cc_id][dir][ant_id]++;
+ if(xran_cp_seq_id_num[cc_id][dir][ant_id] == seq_id) { /* expected sequence */
+ return (0);
+ }
+ else {
+ xran_cp_seq_id_num[cc_id][dir][ant_id] = seq_id;
+ return (-1);
+ }
+}
+static inline int8_t xran_check_updl_seqid(void *pHandle, uint8_t cc_id, uint8_t ant_id, uint8_t slot_id, uint8_t seq_id)
+{
+ if(cc_id >= XRAN_MAX_CELLS_PER_PORT) {
+ print_err("Invalid CC ID - %d", cc_id);
+ return (-1);
+ }
+
+ if(ant_id >= XRAN_MAX_ANTENNA_NR) {
+ print_err("Invalid antenna ID - %d", ant_id);
+ return (-1);
+ }
+
+ /* O-RU needs to check the sequence ID of U-Plane DL from O-DU */
+ xran_updl_seq_id_num[cc_id][ant_id]++;
+ if(xran_updl_seq_id_num[cc_id][ant_id] == seq_id) {
+ /* expected sequence */
+ /*print_dbg("ant %u cc_id %u : slot_id %u : seq_id %u : expected seq_id %u\n",
+ ant_id, cc_id, slot_id, seq_id, xran_updl_seq_id_num[cc_id][ant_id]);*/
+ return (0);
+ } else {
+ /* print_err("ant %u cc_id %u : slot_id %u : seq_id %u : expected seq_id %u\n",
+ ant_id, cc_id, slot_id, seq_id, xran_updl_seq_id_num[cc_id][ant_id]);*/
+
+ xran_updl_seq_id_num[cc_id][ant_id] = seq_id;
+
+ return (-1);
+ }
+}
+
+
+static struct xran_section_gen_info cpSections[XRAN_MAX_NUM_SECTIONS];
+static struct xran_cp_gen_params cpInfo;
+int process_cplane(struct rte_mbuf *pkt)
+{
+ struct xran_recv_packet_info recv;
+
+ cpInfo.sections = cpSections;
+ xran_parse_cp_pkt(pkt, &cpInfo, &recv);
+
+ return (MBUF_FREE);
+}
+//////////////////////////////////////////
+
+void sym_ota_cb(struct rte_timer *tim, void *arg, unsigned long *used_tick)
+{
+ struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
+ struct xran_timer_ctx *pTCtx = (struct xran_timer_ctx *)arg;
+ long t1 = MLogTick(), t2;
+ long t3;
+ static int32_t ctx = 0;
+
+ if(XranGetSymNum(xran_lib_ota_sym_idx, XRAN_NUM_OF_SYMBOL_PER_SLOT) == 0){
+ t3 = xran_tick();
+ tti_ota_cb(NULL, arg);
+ *used_tick += get_ticks_diff(xran_tick(), t3);
+ }
+
+ if(XranGetSymNum(xran_lib_ota_sym_idx, XRAN_NUM_OF_SYMBOL_PER_SLOT) == 3){
+ if(p_xran_dev_ctx->phy_tti_cb_done == 0){
+ /* rearm timer to deliver TTI event to PHY */
+ t3 = xran_tick();
+ p_xran_dev_ctx->phy_tti_cb_done = 0;
+ xran_timer_arm_ex(&tti_to_phy_timer[xran_lib_ota_tti % 10], tti_to_phy_cb, (void*)pTCtx, p_xran_dev_ctx->fh_init.io_cfg.timing_core);
+ *used_tick += get_ticks_diff(xran_tick(), t3);
+ }
+ }
+
+ t3 = xran_tick();
+ if (xran_process_tx_sym(timer_ctx))
+ {
+ *used_tick += get_ticks_diff(xran_tick(), t3);
+ }
+
+ /* check if there is call back to do something else on this symbol */
+
+ struct cb_elem_entry *cb_elm;
+ LIST_FOREACH(cb_elm, &p_xran_dev_ctx->sym_cb_list_head[0][xran_lib_ota_sym], pointers){
+ if(cb_elm){
+ cb_elm->pSymCallback(&dpdk_timer[ctx], cb_elm->pSymCallbackTag);
+ ctx = DpdkTimerIncrementCtx(ctx);
+ }
+ }
+
+ // This counter is incremented in advance before it is the time for the next symbol
+ xran_lib_ota_sym++;
+ if(xran_lib_ota_sym >= N_SYM_PER_SLOT){
+ xran_lib_ota_sym=0;
+ }
+
+ t2 = MLogTick();
+ MLogTask(PID_SYM_OTA_CB, t1, t2);
+}
+
+void tti_ota_cb(struct rte_timer *tim, void *arg)
+{
+ uint32_t frame_id = 0;
+ uint32_t subframe_id = 0;
+ uint32_t slot_id = 0;
+ uint32_t next_tti = 0;
+
+ uint32_t mlogVar[10];
+ uint32_t mlogVarCnt = 0;
+ uint64_t t1 = MLogTick();
+ uint64_t t3 = 0;
+ uint32_t reg_tti = 0;
+ uint32_t reg_sfn = 0;
+ struct xran_timer_ctx *pTCtx = (struct xran_timer_ctx *)arg;
+ struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
+
+ MLogTask(PID_TTI_TIMER, t1, MLogTick());
+
+ /* To match TTbox */
+ if(xran_lib_ota_tti == 0)
+ reg_tti = xran_fs_get_max_slot() - 1;
+ else
+ reg_tti = xran_lib_ota_tti -1;
+ MLogIncrementCounter();
+ reg_sfn = XranGetFrameNum(reg_tti,xran_getSfnSecStart(),SUBFRAMES_PER_SYSTEMFRAME, SLOTNUM_PER_SUBFRAME)*10 + XranGetSubFrameNum(reg_tti,SLOTNUM_PER_SUBFRAME, SUBFRAMES_PER_SYSTEMFRAME);;
+ /* subframe and slot */
+ MLogRegisterFrameSubframe(reg_sfn, reg_tti % (SLOTNUM_PER_SUBFRAME));
+ MLogMark(1, t1);
+
+ slot_id = XranGetSlotNum(xran_lib_ota_tti, SLOTNUM_PER_SUBFRAME);
+ subframe_id = XranGetSubFrameNum(xran_lib_ota_tti,SLOTNUM_PER_SUBFRAME, SUBFRAMES_PER_SYSTEMFRAME);
+ frame_id = XranGetFrameNum(xran_lib_ota_tti,xran_getSfnSecStart(),SUBFRAMES_PER_SYSTEMFRAME, SLOTNUM_PER_SUBFRAME);
+
+ pTCtx[(xran_lib_ota_tti & 1) ^ 1].tti_to_process = xran_lib_ota_tti;
+
+ mlogVar[mlogVarCnt++] = 0x11111111;
+ mlogVar[mlogVarCnt++] = xran_lib_ota_tti;
+ mlogVar[mlogVarCnt++] = xran_lib_ota_sym_idx;
+ mlogVar[mlogVarCnt++] = xran_lib_ota_sym_idx / 14;
+ mlogVar[mlogVarCnt++] = frame_id;
+ mlogVar[mlogVarCnt++] = subframe_id;
+ mlogVar[mlogVarCnt++] = slot_id;
+ mlogVar[mlogVarCnt++] = 0;
+ MLogAddVariables(mlogVarCnt, mlogVar, MLogTick());
+
+ if(p_xran_dev_ctx->fh_init.io_cfg.id == ID_LLS_CU)
+ next_tti = xran_lib_ota_tti + 1;
+ else
+ next_tti = xran_lib_ota_tti;
+
+ if(next_tti>= xran_fs_get_max_slot()){
+ print_dbg("[%d]SFN %d sf %d slot %d\n",next_tti, frame_id, subframe_id, slot_id);
+ next_tti=0;
+ }
+
+ slot_id = XranGetSlotNum(next_tti, SLOTNUM_PER_SUBFRAME);
+ subframe_id = XranGetSubFrameNum(next_tti,SLOTNUM_PER_SUBFRAME, SUBFRAMES_PER_SYSTEMFRAME);
+ frame_id = XranGetFrameNum(next_tti,xran_getSfnSecStart(),SUBFRAMES_PER_SYSTEMFRAME, SLOTNUM_PER_SUBFRAME);
+
+ print_dbg("[%d]SFN %d sf %d slot %d\n",next_tti, frame_id, subframe_id, slot_id);
+
+ if(p_xran_dev_ctx->fh_init.io_cfg.id == ID_LLS_CU){
+ pTCtx[(xran_lib_ota_tti & 1)].tti_to_process = next_tti;
+ } else {
+ pTCtx[(xran_lib_ota_tti & 1)].tti_to_process = pTCtx[(xran_lib_ota_tti & 1)^1].tti_to_process;
+ }
+
+ p_xran_dev_ctx->phy_tti_cb_done = 0;
+ xran_timer_arm_ex(&tti_to_phy_timer[xran_lib_ota_tti % 10], tti_to_phy_cb, (void*)pTCtx, p_xran_dev_ctx->fh_init.io_cfg.timing_core);
+
+ //slot index is increased to next slot at the beginning of current OTA slot
+ xran_lib_ota_tti++;
+ if(xran_lib_ota_tti >= xran_fs_get_max_slot()){
+ print_dbg("[%d]SFN %d sf %d slot %d\n",xran_lib_ota_tti, frame_id, subframe_id, slot_id);
+ xran_lib_ota_tti=0;
+ }
+ MLogTask(PID_TTI_CB, t1, MLogTick());
+}
+
+void xran_timer_arm(struct rte_timer *tim, void* arg)
+{
+ struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
+ uint64_t t3 = MLogTick();
+
+ if (xran_if_current_state == XRAN_RUNNING){
+ rte_timer_cb_t fct = (rte_timer_cb_t)arg;
+ rte_timer_init(tim);
+ rte_timer_reset_sync(tim, 0, SINGLE, p_xran_dev_ctx->fh_init.io_cfg.timing_core, fct, &timer_ctx[0]);
+ }
+ MLogTask(PID_TIME_ARM_TIMER, t3, MLogTick());
+}
+
+void xran_timer_arm_ex(struct rte_timer *tim, void* CbFct, void *CbArg, unsigned tim_lcore)
+{
+ struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
+ uint64_t t3 = MLogTick();
+
+ if (xran_if_current_state == XRAN_RUNNING){
+ rte_timer_cb_t fct = (rte_timer_cb_t)CbFct;
+ rte_timer_init(tim);
+ rte_timer_reset_sync(tim, 0, SINGLE, tim_lcore, fct, CbArg);
+ }
+ MLogTask(PID_TIME_ARM_TIMER, t3, MLogTick());
+}
+
+int xran_cp_create_and_send_section(void *pHandle, uint8_t ru_port_id, int dir, int tti, int cc_id,
+ struct xran_prb_map *prbMap, enum xran_category category, uint8_t ctx_id)
+{
+ struct xran_device_ctx *p_x_ctx = xran_dev_get_ctx();
+ struct xran_cp_gen_params params;
+ struct xran_section_gen_info sect_geninfo[1];
+ struct rte_mbuf *mbuf;
+ int ret = 0;
+ uint32_t i, j, loc_sym;
+ uint32_t nsection = 0;
+ struct xran_prb_elm *pPrbMapElem = NULL;
+ struct xran_prb_elm *pPrbMapElemPrev = NULL;
+ uint32_t slot_id = XranGetSlotNum(tti, SLOTNUM_PER_SUBFRAME);
+ uint32_t subframe_id = XranGetSubFrameNum(tti,SLOTNUM_PER_SUBFRAME, SUBFRAMES_PER_SYSTEMFRAME);
+ uint32_t frame_id = XranGetFrameNum(tti,xran_getSfnSecStart(),SUBFRAMES_PER_SYSTEMFRAME, SLOTNUM_PER_SUBFRAME);
+
+ frame_id = (frame_id & 0xff); /* ORAN frameId, 8 bits, [0, 255] */
+ uint8_t seq_id = 0;
+
+ struct xran_sectionext1_info m_ext1;
+
+ if(prbMap) {
+ nsection = prbMap->nPrbElm;
+ pPrbMapElem = &prbMap->prbMap[0];
+ if (nsection < 1){
+ print_dbg("cp[%d:%d:%d] ru_port_id %d dir=%d nsection %d\n",
+ frame_id, subframe_id, slot_id, ru_port_id, dir, nsection);
+ }
+ } else {
+ print_err("prbMap is NULL\n");
+ return (-1);
+ }
+ for (i=0; i<nsection; i++)
+ {
+ pPrbMapElem = &prbMap->prbMap[i];
+ params.dir = dir;
+ params.sectionType = XRAN_CP_SECTIONTYPE_1; /* Most DL/UL Radio Channels */
+ params.hdr.filterIdx = XRAN_FILTERINDEX_STANDARD;
+ params.hdr.frameId = frame_id;
+ params.hdr.subframeId = subframe_id;
+ params.hdr.slotId = slot_id;
+ params.hdr.startSymId = pPrbMapElem->nStartSymb;
+ params.hdr.iqWidth = pPrbMapElem->iqWidth; /*xran_get_conf_iqwidth(pHandle);*/
+ params.hdr.compMeth = pPrbMapElem->compMethod;
+
+ print_dbg("cp[%d:%d:%d] ru_port_id %d dir=%d\n",
+ frame_id, subframe_id, slot_id, ru_port_id, dir);
+
+ seq_id = xran_get_cp_seqid(pHandle, XRAN_DIR_DL, cc_id, ru_port_id);
+
+ sect_geninfo[0].info.type = params.sectionType; // for database
+ sect_geninfo[0].info.startSymId = params.hdr.startSymId; // for database
+ sect_geninfo[0].info.iqWidth = params.hdr.iqWidth; // for database
+ sect_geninfo[0].info.compMeth = params.hdr.compMeth; // for database
+ sect_geninfo[0].info.id = i; /*xran_alloc_sectionid(pHandle, dir, cc_id, ru_port_id, slot_id);*/
+
+ if(sect_geninfo[0].info.id > 7)
+ print_err("sectinfo->id %d\n", sect_geninfo[0].info.id);
+
+ if (dir == XRAN_DIR_UL) {
+ for (loc_sym = 0; loc_sym < XRAN_NUM_OF_SYMBOL_PER_SLOT; loc_sym++){
+ struct xran_section_desc *p_sec_desc = pPrbMapElem->p_sec_desc[loc_sym];
+ if(p_sec_desc) {
+ p_sec_desc->section_id = sect_geninfo[0].info.id;
+ if(p_sec_desc->pCtrl) {
+ rte_pktmbuf_free(p_sec_desc->pCtrl);
+ p_sec_desc->pCtrl = NULL;
+ p_sec_desc->pData = NULL;
+ }
+ } else {
+ print_err("section desc is NULL\n");
+ }
+ }
+ }
+
+ sect_geninfo[0].info.rb = XRAN_RBIND_EVERY;
+ sect_geninfo[0].info.startPrbc = pPrbMapElem->nRBStart;
+ sect_geninfo[0].info.numPrbc = pPrbMapElem->nRBSize;
+ sect_geninfo[0].info.numSymbol = pPrbMapElem->numSymb;
+ sect_geninfo[0].info.reMask = 0xfff;
+ sect_geninfo[0].info.beamId = pPrbMapElem->nBeamIndex;
+
+ for (loc_sym = 0; loc_sym < XRAN_NUM_OF_SYMBOL_PER_SLOT; loc_sym++){
+ struct xran_section_desc *p_sec_desc = pPrbMapElem->p_sec_desc[loc_sym];
+ if(p_sec_desc) {
+ p_sec_desc->section_id = sect_geninfo[0].info.id;
+
+ sect_geninfo[0].info.sec_desc[loc_sym].iq_buffer_offset = p_sec_desc->iq_buffer_offset;
+ sect_geninfo[0].info.sec_desc[loc_sym].iq_buffer_len = p_sec_desc->iq_buffer_len;
+ } else {
+ print_err("section desc is NULL\n");
+ }
+ }
+
+ if (i==0)
+ sect_geninfo[0].info.symInc = XRAN_SYMBOLNUMBER_NOTINC;
+ else
+ {
+ pPrbMapElemPrev = &prbMap->prbMap[i-1];
+ if (pPrbMapElemPrev->nStartSymb == pPrbMapElem->nStartSymb)
+ {
+ sect_geninfo[0].info.symInc = XRAN_SYMBOLNUMBER_NOTINC;
+ if (pPrbMapElemPrev->numSymb != pPrbMapElem->numSymb)
+ print_err("section info error: previous numSymb %d not equal to current numSymb %d\n", pPrbMapElemPrev->numSymb, pPrbMapElem->numSymb);
+ }
+ else
+ {
+ sect_geninfo[0].info.symInc = XRAN_SYMBOLNUMBER_INC;
+ if (pPrbMapElem->nStartSymb != (pPrbMapElemPrev->nStartSymb + pPrbMapElemPrev->numSymb))
+ print_err("section info error: current startSym %d not equal to previous endSymb %d\n", pPrbMapElem->nStartSymb, pPrbMapElemPrev->nStartSymb + pPrbMapElemPrev->numSymb);
+ }
+ }
+
+ if(category == XRAN_CATEGORY_A){
+ /* no extention sections for category */
+ sect_geninfo[0].info.ef = 0;
+ sect_geninfo[0].exDataSize = 0;
+ } else if (category == XRAN_CATEGORY_B) {
+ /*add extantion section for BF Weights if update is needed */
+ if(pPrbMapElem->bf_weight_update){
+ memset(&m_ext1, 0, sizeof (struct xran_sectionext1_info));
+ m_ext1.bfwNumber = pPrbMapElem->bf_weight.nAntElmTRx;
+ m_ext1.bfwiqWidth = pPrbMapElem->iqWidth;
+ m_ext1.bfwCompMeth = pPrbMapElem->compMethod;
+ m_ext1.p_bfwIQ = (int16_t*)pPrbMapElem->bf_weight.p_ext_section;
+ m_ext1.bfwIQ_sz = pPrbMapElem->bf_weight.ext_section_sz;
+
+ sect_geninfo[0].exData[0].type = XRAN_CP_SECTIONEXTCMD_1;
+ sect_geninfo[0].exData[0].len = sizeof(m_ext1);
+ sect_geninfo[0].exData[0].data = &m_ext1;
+
+ sect_geninfo[0].info.ef = 1;
+ sect_geninfo[0].exDataSize = 1;
+ } else {
+ sect_geninfo[0].info.ef = 0;
+ sect_geninfo[0].exDataSize = 0;
+ }
+ } else {
+ print_err("Unsupported Category %d\n", category);
+ return (-1);
+ }
+
+ params.numSections = 1;//nsection;
+ params.sections = sect_geninfo;
+
+ mbuf = xran_ethdi_mbuf_alloc();
+ if(unlikely(mbuf == NULL)) {
+ print_err("Alloc fail!\n");
+ return (-1);
+ }
+
+ ret = xran_prepare_ctrl_pkt(mbuf, ¶ms, cc_id, ru_port_id, seq_id);
+ if(ret < 0) {
+ print_err("Fail to build control plane packet - [%d:%d:%d] dir=%d\n",
+ frame_id, subframe_id, slot_id, dir);
+ } else {
+ /* add in the ethernet header */
+ struct ether_hdr *const h = (void *)rte_pktmbuf_prepend(mbuf, sizeof(*h));
+ tx_counter++;
+ tx_bytes_counter += rte_pktmbuf_pkt_len(mbuf);
+ p_x_ctx->send_cpmbuf2ring(mbuf, ETHER_TYPE_ECPRI);
+
+ /*for(i=0; i<nsection; i++)*/
+ xran_cp_add_section_info(pHandle,
+ dir, cc_id, ru_port_id,
+ ctx_id,
+ §_geninfo[0].info);
+ }
+ }
+
+ return ret;
+}
+
+void tx_cp_dl_cb(struct rte_timer *tim, void *arg)
+{
+ long t1 = MLogTick();
+ int tti, buf_id;
+ int i, ret;
+ uint32_t slot_id, subframe_id, frame_id;
+ int cc_id;
+ uint8_t ctx_id;
+ uint8_t ant_id, num_eAxc, num_CCPorts;
+ void *pHandle;
+ int num_list;
+ struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
+ struct xran_timer_ctx *pTCtx = (struct xran_timer_ctx *)arg;
+
+ pHandle = NULL; // TODO: temp implemantation
+ num_eAxc = xran_get_num_eAxc(pHandle);
+ num_CCPorts = xran_get_num_cc(pHandle);
+
+ if(first_call && p_xran_dev_ctx->enableCP) {
+
+ tti = pTCtx[(xran_lib_ota_tti & 1) ^ 1].tti_to_process;
+ buf_id = tti % XRAN_N_FE_BUF_LEN;
+
+ slot_id = XranGetSlotNum(tti, SLOTNUM_PER_SUBFRAME);
+ subframe_id = XranGetSubFrameNum(tti,SLOTNUM_PER_SUBFRAME, SUBFRAMES_PER_SYSTEMFRAME);
+ frame_id = XranGetFrameNum(tti,xran_getSfnSecStart(),SUBFRAMES_PER_SYSTEMFRAME, SLOTNUM_PER_SUBFRAME);
+ if (tti == 0){
+ /* Wrap around to next second */
+ frame_id = (frame_id + NUM_OF_FRAMES_PER_SECOND) & 0x3ff;
+ }
+
+ ctx_id = XranGetSlotNum(tti, SLOTS_PER_SYSTEMFRAME) % XRAN_MAX_SECTIONDB_CTX;
+
+ print_dbg("[%d]SFN %d sf %d slot %d\n", tti, frame_id, subframe_id, slot_id);
+ for(ant_id = 0; ant_id < num_eAxc; ++ant_id) {
+ for(cc_id = 0; cc_id < num_CCPorts; cc_id++ ) {
+ /* start new section information list */
+ xran_cp_reset_section_info(pHandle, XRAN_DIR_DL, cc_id, ant_id, ctx_id);
+ if(xran_fs_get_slot_type(cc_id, tti, XRAN_SLOT_TYPE_DL) == 1) {
+ if(p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[buf_id][cc_id][ant_id].sBufferList.pBuffers->pData){
+ num_list = xran_cp_create_and_send_section(pHandle, ant_id, XRAN_DIR_DL, tti, cc_id,
+ (struct xran_prb_map *)p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[buf_id][cc_id][ant_id].sBufferList.pBuffers->pData,
+ p_xran_dev_ctx->fh_cfg.ru_conf.xranCat, ctx_id);
+ } else {
+ print_err("[%d]SFN %d sf %d slot %d: ant_id %d cc_id %d \n", tti, frame_id, subframe_id, slot_id, ant_id, cc_id);
+ }
+ } /* if(xran_fs_get_slot_type(cc_id, tti, XRAN_SLOT_TYPE_DL) == 1) */
+ } /* for(cc_id = 0; cc_id < num_CCPorts; cc_id++) */
+ } /* for(ant_id = 0; ant_id < num_eAxc; ++ant_id) */
+ MLogTask(PID_CP_DL_CB, t1, MLogTick());
+ }
+}
+
+void rx_ul_deadline_half_cb(struct rte_timer *tim, void *arg)
+{
+ long t1 = MLogTick();
+ struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
+ xran_status_t status;
+ /* half of RX for current TTI as measured against current OTA time */
+ int32_t rx_tti = (int32_t)XranGetTtiNum(xran_lib_ota_sym_idx, XRAN_NUM_OF_SYMBOL_PER_SLOT);
+ int32_t cc_id;
+ uint32_t nFrameIdx;
+ uint32_t nSubframeIdx;
+ uint32_t nSlotIdx;
+ uint64_t nSecond;
+
+ uint32_t nXranTime = xran_get_slot_idx(&nFrameIdx, &nSubframeIdx, &nSlotIdx, &nSecond);
+ rx_tti = nFrameIdx*SUBFRAMES_PER_SYSTEMFRAME*SLOTNUM_PER_SUBFRAME
+ + nSubframeIdx*SLOTNUM_PER_SUBFRAME
+ + nSlotIdx;
+
+ if(p_xran_dev_ctx->xran2phy_mem_ready == 0)
+ return;
+
+ for(cc_id = 0; cc_id < xran_get_num_cc(p_xran_dev_ctx); cc_id++) {
+ if(p_xran_dev_ctx->rx_packet_callback_tracker[rx_tti % XRAN_N_FE_BUF_LEN][cc_id] == 0){
+ struct xran_cb_tag *pTag = p_xran_dev_ctx->pCallbackTag[cc_id];
+ pTag->slotiId = rx_tti;
+ pTag->symbol = 0; /* last 7 sym means full slot of Symb */
+ status = XRAN_STATUS_SUCCESS;
+ if(p_xran_dev_ctx->pCallback[cc_id])
+ p_xran_dev_ctx->pCallback[cc_id](p_xran_dev_ctx->pCallbackTag[cc_id], status);
+ } else {
+ p_xran_dev_ctx->rx_packet_callback_tracker[rx_tti % XRAN_N_FE_BUF_LEN][cc_id] = 0;
+ }
+ }
+ MLogTask(PID_UP_UL_HALF_DEAD_LINE_CB, t1, MLogTick());
+}
+
+void rx_ul_deadline_full_cb(struct rte_timer *tim, void *arg)
+{
+ long t1 = MLogTick();
+ struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
+ xran_status_t status = 0;
+ int32_t rx_tti = (int32_t)XranGetTtiNum(xran_lib_ota_sym_idx, XRAN_NUM_OF_SYMBOL_PER_SLOT);
+ int32_t cc_id = 0;
+ uint32_t nFrameIdx;
+ uint32_t nSubframeIdx;
+ uint32_t nSlotIdx;
+ uint64_t nSecond;
+
+ uint32_t nXranTime = xran_get_slot_idx(&nFrameIdx, &nSubframeIdx, &nSlotIdx, &nSecond);
+ rx_tti = nFrameIdx*SUBFRAMES_PER_SYSTEMFRAME*SLOTNUM_PER_SUBFRAME
+ + nSubframeIdx*SLOTNUM_PER_SUBFRAME
+ + nSlotIdx;
+
+ if(rx_tti == 0)
+ rx_tti = (xran_fs_get_max_slot_SFN()-1);
+ else
+ rx_tti -= 1; /* end of RX for prev TTI as measured against current OTA time */
+
+ if(p_xran_dev_ctx->xran2phy_mem_ready == 0)
+ return;
+
+ /* U-Plane */
+ for(cc_id = 0; cc_id < xran_get_num_cc(p_xran_dev_ctx); cc_id++) {
+ struct xran_cb_tag *pTag = p_xran_dev_ctx->pCallbackTag[cc_id];
+ pTag->slotiId = rx_tti;
+ pTag->symbol = 7; /* last 7 sym means full slot of Symb */
+ status = XRAN_STATUS_SUCCESS;
+ if(p_xran_dev_ctx->pCallback[cc_id])
+ p_xran_dev_ctx->pCallback[cc_id](p_xran_dev_ctx->pCallbackTag[cc_id], status);
+
+ if(p_xran_dev_ctx->pPrachCallback[cc_id]){
+ struct xran_cb_tag *pTag = p_xran_dev_ctx->pPrachCallbackTag[cc_id];
+ pTag->slotiId = rx_tti;
+ pTag->symbol = 7; /* last 7 sym means full slot of Symb */
+ p_xran_dev_ctx->pPrachCallback[cc_id](p_xran_dev_ctx->pPrachCallbackTag[cc_id], status);
+ }
+ }
+
+ MLogTask(PID_UP_UL_FULL_DEAD_LINE_CB, t1, MLogTick());
+}
+
+
+void tx_cp_ul_cb(struct rte_timer *tim, void *arg)
+{
+ long t1 = MLogTick();
+ int tti, buf_id;
+ int i, ret;
+ uint32_t slot_id, subframe_id, frame_id;
+ int32_t cc_id;
+ int ant_id, prach_port_id;
+ uint16_t beam_id;
+ uint8_t num_eAxc, num_CCPorts;
+ uint8_t ctx_id;
+
+ void *pHandle;
+ int num_list;
+
+ struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
+ struct xran_prach_cp_config *pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfig);
+ struct xran_timer_ctx *pTCtx = (struct xran_timer_ctx *)arg;
+
+ pHandle = NULL; // TODO: temp implemantation
+
+ if(xran_get_ru_category(pHandle) == XRAN_CATEGORY_A)
+ num_eAxc = xran_get_num_eAxc(pHandle);
+ else
+ num_eAxc = xran_get_num_eAxcUl(pHandle);
+
+ num_CCPorts = xran_get_num_cc(pHandle);
+ tti = pTCtx[(xran_lib_ota_tti & 1) ^ 1].tti_to_process;
+ buf_id = tti % XRAN_N_FE_BUF_LEN;
+ slot_id = XranGetSlotNum(tti, SLOTNUM_PER_SUBFRAME);
+ subframe_id = XranGetSubFrameNum(tti,SLOTNUM_PER_SUBFRAME, SUBFRAMES_PER_SYSTEMFRAME);
+ frame_id = XranGetFrameNum(tti,xran_getSfnSecStart(),SUBFRAMES_PER_SYSTEMFRAME, SLOTNUM_PER_SUBFRAME);
+ if (tti == 0) {
+ //Wrap around to next second
+ frame_id = (frame_id + NUM_OF_FRAMES_PER_SECOND) & 0x3ff;
+ }
+ ctx_id = XranGetSlotNum(tti, SLOTS_PER_SYSTEMFRAME) % XRAN_MAX_SECTIONDB_CTX;
+
+ if(first_call && p_xran_dev_ctx->enableCP) {
+
+ print_dbg("[%d]SFN %d sf %d slot %d\n", tti, frame_id, subframe_id, slot_id);
+
+ for(ant_id = 0; ant_id < num_eAxc; ++ant_id) {
+ for(cc_id = 0; cc_id < num_CCPorts; cc_id++) {
+ if(xran_fs_get_slot_type(cc_id, tti, XRAN_SLOT_TYPE_UL) == 1 ||
+ xran_fs_get_slot_type(cc_id, tti, XRAN_SLOT_TYPE_SP) == 1 ){
+ /* start new section information list */
+ xran_cp_reset_section_info(pHandle, XRAN_DIR_UL, cc_id, ant_id, ctx_id);
+ num_list = xran_cp_create_and_send_section(pHandle, ant_id, XRAN_DIR_UL, tti, cc_id,
+ (struct xran_prb_map *)p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[buf_id][cc_id][ant_id].sBufferList.pBuffers->pData,
+ p_xran_dev_ctx->fh_cfg.ru_conf.xranCat, ctx_id);
+ } /* if(xran_fs_get_slot_type(cc_id, tti, XRAN_SLOT_TYPE_UL) == 1 */
+ } /* for(cc_id = 0; cc_id < num_CCPorts; cc_id++) */
+ } /* for(ant_id = 0; ant_id < num_eAxc; ++ant_id) */
+
+ if(p_xran_dev_ctx->enablePrach) {
+ uint32_t is_prach_slot = xran_is_prach_slot(subframe_id, slot_id);
+ if(((frame_id % pPrachCPConfig->x) == pPrachCPConfig->y[0]) && (is_prach_slot==1)) { //is prach slot
+ for(ant_id = 0; ant_id < num_eAxc; ++ant_id) {
+ for(cc_id = 0; cc_id < num_CCPorts; cc_id++) {
+ struct xran_cp_gen_params params;
+ struct xran_section_gen_info sect_geninfo[8];
+ struct rte_mbuf *mbuf = xran_ethdi_mbuf_alloc();
+ prach_port_id = ant_id + num_eAxc;
+ /* start new section information list */
+ xran_cp_reset_section_info(pHandle, XRAN_DIR_UL, cc_id, prach_port_id, ctx_id);
+
+ beam_id = xran_get_beamid(pHandle, XRAN_DIR_UL, cc_id, prach_port_id, slot_id);
+ ret = generate_cpmsg_prach(pHandle, ¶ms, sect_geninfo, mbuf, p_xran_dev_ctx,
+ frame_id, subframe_id, slot_id,
+ beam_id, cc_id, prach_port_id,
+ xran_get_cp_seqid(pHandle, XRAN_DIR_UL, cc_id, prach_port_id));
+ if (ret == XRAN_STATUS_SUCCESS)
+ send_cpmsg(pHandle, mbuf, ¶ms, sect_geninfo,
+ cc_id, prach_port_id, xran_get_cp_seqid(pHandle, XRAN_DIR_UL, cc_id, prach_port_id));
+ }
+ }
+ }
+ }
+ } /* if(p_xran_dev_ctx->enableCP) */
+
+ MLogTask(PID_CP_UL_CB, t1, MLogTick());
+}
+
+void ul_up_full_slot_cb(struct rte_timer *tim, void *arg)
+{
+ long t1 = MLogTick();
+ rte_pause();
+ MLogTask(PID_TTI_CB_TO_PHY, t1, MLogTick());
+}
+
+void tti_to_phy_cb(struct rte_timer *tim, void *arg)
+{
+ long t1 = MLogTick();
+ struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
+
+ p_xran_dev_ctx->phy_tti_cb_done = 1; /* DPDK called CB */
+ if (first_call){
+ if(p_xran_dev_ctx->ttiCb[XRAN_CB_TTI]){
+ if(p_xran_dev_ctx->SkipTti[XRAN_CB_TTI] <= 0){
+ p_xran_dev_ctx->ttiCb[XRAN_CB_TTI](p_xran_dev_ctx->TtiCbParam[XRAN_CB_TTI]);
+ }else{
+ p_xran_dev_ctx->SkipTti[XRAN_CB_TTI]--;
+ }
+ }
+ } else {
+ if(p_xran_dev_ctx->ttiCb[XRAN_CB_TTI]){
+ int32_t tti = (int32_t)XranGetTtiNum(xran_lib_ota_sym_idx, XRAN_NUM_OF_SYMBOL_PER_SLOT);
+ uint32_t slot_id = XranGetSlotNum(tti, SLOTNUM_PER_SUBFRAME);
+ uint32_t subframe_id = XranGetSubFrameNum(tti,SLOTNUM_PER_SUBFRAME, SUBFRAMES_PER_SYSTEMFRAME);
+ uint32_t frame_id = XranGetFrameNum(tti,xran_getSfnSecStart(),SUBFRAMES_PER_SYSTEMFRAME, SLOTNUM_PER_SUBFRAME);
+ if((frame_id == xran_max_frame)&&(subframe_id==9)&&(slot_id == SLOTNUM_PER_SUBFRAME-1)) { //(tti == xran_fs_get_max_slot()-1)
+ first_call = 1;
+ }
+ }
+ }
+
+ MLogTask(PID_TTI_CB_TO_PHY, t1, MLogTick());
+}
+
+int xran_timing_source_thread(void *args)
+{
+ int res = 0;
+ cpu_set_t cpuset;
+ int32_t do_reset = 0;
+ uint64_t t1 = 0;
+ uint64_t delta;
+ int32_t result1,i,j;
+ uint32_t delay_cp_dl;
+ uint32_t delay_cp_ul;
+ uint32_t delay_up;
+ uint32_t delay_up_ul;
+ uint32_t delay_cp2up;
+ uint32_t sym_cp_dl;
+ uint32_t sym_cp_ul;
+ uint32_t sym_up_ul;
+ int32_t sym_up;
+ struct sched_param sched_param;
+ struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
+ uint64_t tWake = 0, tWakePrev = 0, tUsed = 0;
+ struct cb_elem_entry * cb_elm = NULL;
+
+ /* ToS = Top of Second start +- 1.5us */
+ struct timespec ts;
+
+ char buff[100];
+
+ xran_core_used = rte_lcore_id();
+ printf("%s [CPU %2d] [PID: %6d]\n", __FUNCTION__, rte_lcore_id(), getpid());
+
+ /* set main thread affinity mask to CPU2 */
+ sched_param.sched_priority = 98;
+
+ CPU_ZERO(&cpuset);
+ CPU_SET(p_xran_dev_ctx->fh_init.io_cfg.timing_core, &cpuset);
+ if (result1 = pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpuset))
+ {
+ printf("pthread_setaffinity_np failed: coreId = 2, result1 = %d\n",result1);
+ }
+ if ((result1 = pthread_setschedparam(pthread_self(), 1, &sched_param)))
+ {
+ printf("priority is not changed: coreId = 2, result1 = %d\n",result1);
+ }
+
+ if (p_xran_dev_ctx->fh_init.io_cfg.id == O_DU) {
+ do {
+ timespec_get(&ts, TIME_UTC);
+ }while (ts.tv_nsec >1500);
+ struct tm * ptm = gmtime(&ts.tv_sec);
+ if(ptm){
+ strftime(buff, sizeof buff, "%D %T", ptm);
+ printf("O-DU: thread_run start time: %s.%09ld UTC [%ld]\n", buff, ts.tv_nsec, interval_us);
+ }
+
+ delay_cp_dl = interval_us - p_xran_dev_ctx->fh_init.T1a_max_cp_dl;
+ delay_cp_ul = interval_us - p_xran_dev_ctx->fh_init.T1a_max_cp_ul;
+ delay_up = p_xran_dev_ctx->fh_init.T1a_max_up;
+ delay_up_ul = p_xran_dev_ctx->fh_init.Ta4_max;
+
+ delay_cp2up = delay_up-delay_cp_dl;
+
+ sym_cp_dl = delay_cp_dl*1000/(interval_us*1000/N_SYM_PER_SLOT)+1;
+ sym_cp_ul = delay_cp_ul*1000/(interval_us*1000/N_SYM_PER_SLOT)+1;
+ sym_up_ul = delay_up_ul*1000/(interval_us*1000/N_SYM_PER_SLOT);
+ p_xran_dev_ctx->sym_up = sym_up = -(delay_up*1000/(interval_us*1000/N_SYM_PER_SLOT));
+ p_xran_dev_ctx->sym_up_ul = sym_up_ul = (delay_up_ul*1000/(interval_us*1000/N_SYM_PER_SLOT)+1);
+
+ printf("Start C-plane DL %d us after TTI [trigger on sym %d]\n", delay_cp_dl, sym_cp_dl);
+ printf("Start C-plane UL %d us after TTI [trigger on sym %d]\n", delay_cp_ul, sym_cp_ul);
+ printf("Start U-plane DL %d us before OTA [offset in sym %d]\n", delay_up, sym_up);
+ printf("Start U-plane UL %d us OTA [offset in sym %d]\n", delay_up_ul, sym_up_ul);
+
+ printf("C-plane to U-plane delay %d us after TTI\n", delay_cp2up);
+ printf("Start Sym timer %ld ns\n", TX_TIMER_INTERVAL/N_SYM_PER_SLOT);
+
+ cb_elm = xran_create_cb(xran_timer_arm, tx_cp_dl_cb);
+ if(cb_elm){
+ LIST_INSERT_HEAD(&p_xran_dev_ctx->sym_cb_list_head[0][sym_cp_dl],
+ cb_elm,
+ pointers);
+ } else {
+ print_err("cb_elm is NULL\n");
+ res = -1;
+ goto err0;
+ }
+
+ cb_elm = xran_create_cb(xran_timer_arm, tx_cp_ul_cb);
+ if(cb_elm){
+ LIST_INSERT_HEAD(&p_xran_dev_ctx->sym_cb_list_head[0][sym_cp_ul],
+ cb_elm,
+ pointers);
+ } else {
+ print_err("cb_elm is NULL\n");
+ res = -1;
+ goto err0;
+ }
+
+ /* Full slot UL OTA + delay_up_ul */
+ cb_elm = xran_create_cb(xran_timer_arm, rx_ul_deadline_full_cb);
+ if(cb_elm){
+ LIST_INSERT_HEAD(&p_xran_dev_ctx->sym_cb_list_head[0][sym_up_ul],
+ cb_elm,
+ pointers);
+ } else {
+ print_err("cb_elm is NULL\n");
+ res = -1;
+ goto err0;
+ }
+
+ /* Half slot UL OTA + delay_up_ul*/
+ cb_elm = xran_create_cb(xran_timer_arm, rx_ul_deadline_half_cb);
+ if(cb_elm){
+ LIST_INSERT_HEAD(&p_xran_dev_ctx->sym_cb_list_head[0][sym_up_ul + N_SYM_PER_SLOT/2],
+ cb_elm,
+ pointers);
+ } else {
+ print_err("cb_elm is NULL\n");
+ res = -1;
+ goto err0;
+ }
+ } else { // APP_O_RU
+ /* calcualte when to send UL U-plane */
+ delay_up = p_xran_dev_ctx->fh_init.Ta3_min;
+ p_xran_dev_ctx->sym_up = sym_up = delay_up*1000/(interval_us*1000/N_SYM_PER_SLOT)+1;
+ printf("Start UL U-plane %d us after OTA [offset in sym %d]\n", delay_up, sym_up);
+ do {
+ timespec_get(&ts, TIME_UTC);
+ }while (ts.tv_nsec >1500);
+ struct tm * ptm = gmtime(&ts.tv_sec);
+ if(ptm){
+ strftime(buff, sizeof buff, "%D %T", ptm);
+ printf("RU: thread_run start time: %s.%09ld UTC [%ld]\n", buff, ts.tv_nsec, interval_us);
+ }
+ }
+
+ printf("interval_us %ld\n", interval_us);
+ do {
+ timespec_get(&ts, TIME_UTC);
+ }while (ts.tv_nsec == 0);
+
+ while(1) {
+ /* Update Usage Stats */
+ tWake = xran_tick();
+ xran_used_tick += tUsed;
+ if (tWakePrev)
+ {
+ xran_total_tick += get_ticks_diff(tWake, tWakePrev);
+ }
+ tWakePrev = tWake;
+ tUsed = 0;
+
+ delta = poll_next_tick(interval_us*1000L/N_SYM_PER_SLOT, &tUsed);
+ if (XRAN_STOPPED == xran_if_current_state)
+ break;
+
+ if (likely(XRAN_RUNNING == xran_if_current_state))
+ sym_ota_cb(&sym_timer, timer_ctx, &tUsed);
+ }
+
+ err0:
+ for (i = 0; i< XRAN_MAX_SECTOR_NR; i++){
+ for (j = 0; j< XRAN_NUM_OF_SYMBOL_PER_SLOT; j++){
+ struct cb_elem_entry *cb_elm;
+ LIST_FOREACH(cb_elm, &p_xran_dev_ctx->sym_cb_list_head[i][j], pointers){
+ if(cb_elm){
+ LIST_REMOVE(cb_elm, pointers);
+ xran_destroy_cb(cb_elm);
+ }
+ }
+ }
+ }
+
+ printf("Closing timing source thread...tx counter %lu, rx counter %lu\n", tx_counter, rx_counter);
+ return res;
+}
+
+/* Handle ecpri format. */
+int handle_ecpri_ethertype(struct rte_mbuf *pkt, uint64_t rx_time)
+{
+ const struct xran_ecpri_hdr *ecpri_hdr;
+ unsigned long t1;
+ int32_t ret = MBUF_FREE;
+
+ if (rte_pktmbuf_data_len(pkt) < sizeof(struct xran_ecpri_hdr)) {
+ print_err("Packet too short - %d bytes", rte_pktmbuf_data_len(pkt));
+ return 0;
+ }
+
+ /* check eCPRI header. */
+ ecpri_hdr = rte_pktmbuf_mtod(pkt, struct xran_ecpri_hdr *);
+ if(ecpri_hdr == NULL){
+ print_err("ecpri_hdr error\n");
+ return MBUF_FREE;
+ }
+
+ rx_bytes_counter += rte_pktmbuf_pkt_len(pkt);
+ switch(ecpri_hdr->cmnhdr.ecpri_mesg_type) {
+ case ECPRI_IQ_DATA:
+ // t1 = MLogTick();
+ ret = process_mbuf(pkt);
+ // MLogTask(PID_PROCESS_UP_PKT, t1, MLogTick());
+ break;
+ // For RU emulation
+ case ECPRI_RT_CONTROL_DATA:
+ t1 = MLogTick();
+ if(xran_dev_get_ctx()->fh_init.io_cfg.id == O_RU) {
+ ret = process_cplane(pkt);
+ } else {
+ print_err("O-DU recevied C-Plane message!");
+ }
+ MLogTask(PID_PROCESS_CP_PKT, t1, MLogTick());
+ break;
+ default:
+ print_err("Invalid eCPRI message type - %d", ecpri_hdr->cmnhdr.ecpri_mesg_type);
+ }
+
+ return ret;
+}
+
+int xran_process_prach_sym(void *arg,
+ struct rte_mbuf *mbuf,
+ void *iq_data_start,
+ uint16_t size,
+ uint8_t CC_ID,
+ uint8_t Ant_ID,
+ uint8_t frame_id,
+ uint8_t subframe_id,
+ uint8_t slot_id,
+ uint8_t symb_id,
+ uint16_t num_prbu,
+ uint16_t start_prbu,
+ uint16_t sym_inc,
+ uint16_t rb,
+ uint16_t sect_id,
+ uint32_t *mb_free)
+{
+ char *pos = NULL;
+ struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
+ uint8_t symb_id_offset;
+ uint32_t tti = 0;
+ xran_status_t status;
+ void *pHandle = NULL;
+ struct rte_mbuf *mb;
+
+ uint16_t iq_sample_size_bits = 16;
+
+ if(p_xran_dev_ctx->xran2phy_mem_ready == 0)
+ return 0;
+
+ tti = frame_id * SLOTS_PER_SYSTEMFRAME + subframe_id * SLOTNUM_PER_SUBFRAME + slot_id;
+
+ status = tti << 16 | symb_id;
+
+ if(CC_ID < XRAN_MAX_SECTOR_NR && Ant_ID < XRAN_MAX_ANTENNA_NR && symb_id < XRAN_NUM_OF_SYMBOL_PER_SLOT){
+ symb_id_offset = symb_id - p_xran_dev_ctx->prach_start_symbol[CC_ID]; //make the storing of prach packets to start from 0 for easy of processing within PHY
+ pos = (char*) p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id_offset].pData;
+ if(pos && iq_data_start && size){
+ if (p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder == XRAN_CPU_LE_BYTE_ORDER) {
+ int idx = 0;
+ uint16_t *psrc = (uint16_t *)iq_data_start;
+ uint16_t *pdst = (uint16_t *)pos;
+ /* network byte (be) order of IQ to CPU byte order (le) */
+ for (idx = 0; idx < size/sizeof(int16_t); idx++){
+ pdst[idx] = (psrc[idx]>>8) | (psrc[idx]<<8); //rte_be_to_cpu_16(psrc[idx]);
+ }
+ *mb_free = MBUF_FREE;
+ }else {
+ mb = p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id_offset].pCtrl;
+ if(mb){
+ rte_pktmbuf_free(mb);
+ }else{
+ print_err("mb==NULL\n");
+ }
+ p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id_offset].pData = iq_data_start;
+ p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id_offset].pCtrl = mbuf;
+ *mb_free = MBUF_KEEP;
+ }
+ } else {
+ print_err("pos %p iq_data_start %p size %d\n",pos, iq_data_start, size);
+ }
+ } else {
+ print_err("TTI %d(f_%d sf_%d slot_%d) CC %d Ant_ID %d symb_id %d\n",tti, frame_id, subframe_id, slot_id, CC_ID, Ant_ID, symb_id);
+ }
+
+/* if (symb_id == p_xran_dev_ctx->prach_last_symbol[CC_ID] ){
+ p_xran_dev_ctx->rx_packet_prach_tracker[tti % XRAN_N_FE_BUF_LEN][CC_ID][symb_id]++;
+ if(p_xran_dev_ctx->rx_packet_prach_tracker[tti % XRAN_N_FE_BUF_LEN][CC_ID][symb_id] >= xran_get_num_eAxc(pHandle)){
+ if(p_xran_dev_ctx->pPrachCallback[0])
+ p_xran_dev_ctx->pPrachCallback[0](p_xran_dev_ctx->pPrachCallbackTag[0], status);
+ p_xran_dev_ctx->rx_packet_prach_tracker[tti % XRAN_N_FE_BUF_LEN][CC_ID][symb_id] = 0;
+ }
+ }
+*/
+ return size;
+}
+
+int32_t xran_process_srs_sym(void *arg,
+ struct rte_mbuf *mbuf,
+ void *iq_data_start,
+ uint16_t size,
+ uint8_t CC_ID,
+ uint8_t Ant_ID,
+ uint8_t frame_id,
+ uint8_t subframe_id,
+ uint8_t slot_id,
+ uint8_t symb_id,
+ uint16_t num_prbu,
+ uint16_t start_prbu,
+ uint16_t sym_inc,
+ uint16_t rb,
+ uint16_t sect_id,
+ uint32_t *mb_free)
+{
+ char *pos = NULL;
+ struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
+ uint32_t tti = 0;
+ xran_status_t status;
+ void *pHandle = NULL;
+ struct rte_mbuf *mb = NULL;
+
+ uint16_t iq_sample_size_bits = 16;
+
+ if(p_xran_dev_ctx->xran2phy_mem_ready == 0)
+ return 0;
+
+ tti = frame_id * SLOTS_PER_SYSTEMFRAME + subframe_id * SLOTNUM_PER_SUBFRAME + slot_id;
+
+ status = tti << 16 | symb_id;
+
+ if(CC_ID < XRAN_MAX_SECTOR_NR && Ant_ID < p_xran_dev_ctx->fh_cfg.nAntElmTRx && symb_id < XRAN_NUM_OF_SYMBOL_PER_SLOT) {
+ pos = (char*) p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id].pData;
+ pos += start_prbu * N_SC_PER_PRB*(iq_sample_size_bits/8)*2;
+ if(pos && iq_data_start && size){
+ if (p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder == XRAN_CPU_LE_BYTE_ORDER) {
+ int idx = 0;
+ uint16_t *psrc = (uint16_t *)iq_data_start;
+ uint16_t *pdst = (uint16_t *)pos;
+ rte_panic("XRAN_CPU_LE_BYTE_ORDER is not supported 0x16%lx\n", (long)mb);
+ /* network byte (be) order of IQ to CPU byte order (le) */
+ for (idx = 0; idx < size/sizeof(int16_t); idx++){
+ pdst[idx] = (psrc[idx]>>8) | (psrc[idx]<<8); //rte_be_to_cpu_16(psrc[idx]);
+ }
+ } else if (likely(p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder == XRAN_NE_BE_BYTE_ORDER)){
+ if (likely (p_xran_dev_ctx->fh_init.mtu >=
+ p_xran_dev_ctx->fh_cfg.nULRBs * N_SC_PER_PRB*(iq_sample_size_bits/8)*2)) {
+ /* no fragmentation */
+ mb = p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id].pCtrl;
+ if(mb){
+ rte_pktmbuf_free(mb);
+ }else{
+ print_err("mb==NULL\n");
+ }
+ p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id].pData = iq_data_start;
+ p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id].pCtrl = mbuf;
+ *mb_free = MBUF_KEEP;
+ } else {
+ /* packet can be fragmented copy RBs */
+ rte_memcpy(pos, iq_data_start, size);
+ *mb_free = MBUF_FREE;
+ }
+ }
+ } else {
+ print_err("pos %p iq_data_start %p size %d\n",pos, iq_data_start, size);
+ }
+ } else {
+ print_err("TTI %d(f_%d sf_%d slot_%d) CC %d Ant_ID %d symb_id %d\n",tti, frame_id, subframe_id, slot_id, CC_ID, Ant_ID, symb_id);
+ }
+
+ return size;
+}
+
+int32_t xran_pkt_validate(void *arg,
+ struct rte_mbuf *mbuf,
+ void *iq_data_start,
+ uint16_t size,
+ uint8_t CC_ID,
+ uint8_t Ant_ID,
+ uint8_t frame_id,
+ uint8_t subframe_id,
+ uint8_t slot_id,
+ uint8_t symb_id,
+ struct ecpri_seq_id *seq_id,
+ uint16_t num_prbu,
+ uint16_t start_prbu,
+ uint16_t sym_inc,
+ uint16_t rb,
+ uint16_t sect_id)
+{
+ struct xran_device_ctx * pctx = xran_dev_get_ctx();
+ struct xran_common_counters *pCnt = &pctx->fh_counters;
+
+ if(pctx->fh_init.io_cfg.id == O_DU) {
+ if(xran_check_upul_seqid(NULL, CC_ID, Ant_ID, slot_id, seq_id->seq_id) != XRAN_STATUS_SUCCESS) {
+ pCnt->Rx_pkt_dupl++;
+ return (XRAN_STATUS_FAIL);
+ }
+ }else if(pctx->fh_init.io_cfg.id == O_RU) {
+ if(xran_check_updl_seqid(NULL, CC_ID, Ant_ID, slot_id, seq_id->seq_id) != XRAN_STATUS_SUCCESS) {
+ pCnt->Rx_pkt_dupl++;
+ return (XRAN_STATUS_FAIL);
+ }
+ }else {
+ print_err("incorrect dev type %d\n", pctx->fh_init.io_cfg.id);
+ }
+
+ rx_counter++;
+
+ pCnt->Rx_on_time++;
+ pCnt->Total_msgs_rcvd++;
+
+ return XRAN_STATUS_SUCCESS;
+}
+
+int32_t xran_process_rx_sym(void *arg,
+ struct rte_mbuf *mbuf,
+ void *iq_data_start,
+ uint16_t size,
+ uint8_t CC_ID,
+ uint8_t Ant_ID,
+ uint8_t frame_id,
+ uint8_t subframe_id,
+ uint8_t slot_id,
+ uint8_t symb_id,
+ uint16_t num_prbu,
+ uint16_t start_prbu,
+ uint16_t sym_inc,
+ uint16_t rb,
+ uint16_t sect_id,
+ uint32_t *mb_free)
+{
+ char *pos = NULL;
+ struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
+ uint32_t tti = 0;
+ xran_status_t status;
+ void *pHandle = NULL;
+ struct rte_mbuf *mb = NULL;
+ struct xran_prb_map * pRbMap = NULL;
+ struct xran_prb_elm * prbMapElm = NULL;
+
+ uint16_t iq_sample_size_bits = 16;
+
+ tti = frame_id * SLOTS_PER_SYSTEMFRAME + subframe_id * SLOTNUM_PER_SUBFRAME + slot_id;
+
+ status = tti << 16 | symb_id;
+
+ if(CC_ID < XRAN_MAX_SECTOR_NR && Ant_ID < XRAN_MAX_ANTENNA_NR && symb_id < XRAN_NUM_OF_SYMBOL_PER_SLOT){
+ pos = (char*) p_xran_dev_ctx->sFrontHaulRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id].pData;
+ pRbMap = (struct xran_prb_map *) p_xran_dev_ctx->sFrontHaulRxPrbMapBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers->pData;
+ if(pRbMap){
+ prbMapElm = &pRbMap->prbMap[sect_id];
+ if(sect_id >= pRbMap->nPrbElm) {
+ print_err("sect_id %d !=pRbMap->nPrbElm %d\n", sect_id,pRbMap->nPrbElm);
+ *mb_free = MBUF_FREE;
+ return size;
+ }
+ } else {
+ print_err("pRbMap==NULL\n");
+ *mb_free = MBUF_FREE;
+ return size;
+ }
+
+ pos += start_prbu * N_SC_PER_PRB*(iq_sample_size_bits/8)*2;
+ if(pos && iq_data_start && size){
+ if (p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder == XRAN_CPU_LE_BYTE_ORDER) {
+ int idx = 0;
+ uint16_t *psrc = (uint16_t *)iq_data_start;
+ uint16_t *pdst = (uint16_t *)pos;
+ rte_panic("XRAN_CPU_LE_BYTE_ORDER is not supported 0x16%lx\n", (long)mb);
+ /* network byte (be) order of IQ to CPU byte order (le) */
+ for (idx = 0; idx < size/sizeof(int16_t); idx++){
+ pdst[idx] = (psrc[idx]>>8) | (psrc[idx]<<8); //rte_be_to_cpu_16(psrc[idx]);
+ }
+ } else if (likely(p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder == XRAN_NE_BE_BYTE_ORDER)){
+ if (/*likely (p_xran_dev_ctx->fh_init.mtu >=
+ p_xran_dev_ctx->fh_cfg.nULRBs * N_SC_PER_PRB*(iq_sample_size_bits/8)*2)
+ && p_xran_dev_ctx->fh_init.io_cfg.id == O_DU*/ 1) {
+ if (pRbMap->nPrbElm == 1){
+ /* no fragmentation */
+ mb = p_xran_dev_ctx->sFrontHaulRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id].pCtrl;
+ if(mb){
+ rte_pktmbuf_free(mb);
+ }else{
+ print_err("mb==NULL\n");
+ }
+ p_xran_dev_ctx->sFrontHaulRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id].pData = iq_data_start;
+ p_xran_dev_ctx->sFrontHaulRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][CC_ID][Ant_ID].sBufferList.pBuffers[symb_id].pCtrl = mbuf;
+ *mb_free = MBUF_KEEP;
+ } else {
+ prbMapElm = &pRbMap->prbMap[sect_id];
+ struct xran_section_desc *p_sec_desc = prbMapElm->p_sec_desc[symb_id];
+ if(p_sec_desc){
+ mb = p_sec_desc->pCtrl;
+ if(mb){
+ rte_pktmbuf_free(mb);
+ }
+ p_sec_desc->pData = iq_data_start;
+ p_sec_desc->pCtrl = mbuf;
+ p_sec_desc->iq_buffer_len = size;
+ p_sec_desc->iq_buffer_offset = RTE_PTR_DIFF(iq_data_start, mbuf);
+ } else {
+ print_err("p_sec_desc==NULL\n");
+ *mb_free = MBUF_FREE;
+ return size;
+ }
+ *mb_free = MBUF_KEEP;
+ }
+ } else {
+ /* packet can be fragmented copy RBs */
+ rte_memcpy(pos, iq_data_start, size);
+ *mb_free = MBUF_FREE;
+ }
+ }
+ } else {
+ print_err("pos %p iq_data_start %p size %d\n",pos, iq_data_start, size);
+ }
+ } else {
+ print_err("TTI %d(f_%d sf_%d slot_%d) CC %d Ant_ID %d symb_id %d\n",tti, frame_id, subframe_id, slot_id, CC_ID, Ant_ID, symb_id);
+ }
+
+ return size;
+}
+
+/* Send burst of packets on an output interface */
+static inline int
+xran_send_burst(struct xran_device_ctx *dev, uint16_t n, uint16_t port)
+{
+ struct rte_mbuf **m_table;
+ struct rte_mbuf *m;
+ int32_t i = 0;
+ int j;
+ int32_t ret = 0;
+
+ m_table = (struct rte_mbuf **)dev->tx_mbufs[port].m_table;
+
+ for(i = 0; i < n; i++){
+ rte_mbuf_sanity_check(m_table[i], 0);
+ /*rte_pktmbuf_dump(stdout, m_table[i], 256);*/
+ tx_counter++;
+ tx_bytes_counter += rte_pktmbuf_pkt_len(m_table[i]);
+ ret += dev->send_upmbuf2ring(m_table[i], ETHER_TYPE_ECPRI);
+ }
+
+
+ if (unlikely(ret < n)) {
+ print_err("ret < n\n");
+ }
+
+ return 0;
+}
+
+int32_t xran_process_tx_sym_cp_off(uint8_t ctx_id, uint32_t tti, int32_t cc_id, int32_t ant_id, uint32_t frame_id, uint32_t subframe_id, uint32_t slot_id, uint32_t sym_id,
+ int32_t do_srs)
+{
+ int32_t retval = 0;
+ uint64_t t1 = MLogTick();
+
+ void *pHandle = NULL;
+ char *pos = NULL;
+ char *p_sec_iq = NULL;
+ char *p_sect_iq = NULL;
+ void *mb = NULL;
+ int prb_num = 0;
+ uint16_t iq_sample_size_bits = 16; // TODO: make dynamic per
+
+ struct xran_prb_map *prb_map = NULL;
+ uint8_t num_ant_elm = 0;
+
+ struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
+ struct xran_prach_cp_config *pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfig);
+ struct xran_srs_config *p_srs_cfg = &(p_xran_dev_ctx->srs_cfg);
+ num_ant_elm = xran_get_num_ant_elm(pHandle);
+ enum xran_pkt_dir direction;
+
+ struct rte_mbuf *eth_oran_hdr = NULL;
+ char *ext_buff = NULL;
+ uint16_t ext_buff_len = 0;
+ struct rte_mbuf *tmp = NULL;
+ rte_iova_t ext_buff_iova = 0;
+
+ struct rte_mbuf_ext_shared_info * p_share_data = &share_data[tti % XRAN_N_FE_BUF_LEN];
+
+ if(p_xran_dev_ctx->fh_init.io_cfg.id == O_DU) {
+ direction = XRAN_DIR_DL; /* O-DU */
+ prb_num = p_xran_dev_ctx->fh_cfg.nDLRBs;
+ } else {
+ direction = XRAN_DIR_UL; /* RU */
+ prb_num = p_xran_dev_ctx->fh_cfg.nULRBs;
+ }
+
+ if(xran_fs_get_slot_type(cc_id, tti, ((p_xran_dev_ctx->fh_init.io_cfg.id == O_DU)? XRAN_SLOT_TYPE_DL : XRAN_SLOT_TYPE_UL)) == 1
+ || xran_fs_get_slot_type(cc_id, tti, XRAN_SLOT_TYPE_SP) == 1
+ || xran_fs_get_slot_type(cc_id, tti, XRAN_SLOT_TYPE_FDD) == 1){
+
+ if(xran_fs_get_symbol_type(cc_id, tti, sym_id) == ((p_xran_dev_ctx->fh_init.io_cfg.id == O_DU)? XRAN_SYMBOL_TYPE_DL : XRAN_SYMBOL_TYPE_UL)
+ || xran_fs_get_symbol_type(cc_id, tti, sym_id) == XRAN_SYMBOL_TYPE_FDD){
+
+ if(iq_sample_size_bits != 16)
+ print_err("Incorrect iqWidth %d\n", iq_sample_size_bits );
+
+ pos = (char*) p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;
+ mb = (void*) p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[sym_id].pCtrl;
+ prb_map = (struct xran_prb_map *) p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers->pData;
+
+
+ if(prb_map){
+ int32_t elmIdx = 0;
+ for (elmIdx = 0; elmIdx < prb_map->nPrbElm; elmIdx++){
+ uint16_t sec_id = elmIdx;
+ struct xran_prb_elm * prb_map_elm = &prb_map->prbMap[elmIdx];
+ struct xran_section_desc * p_sec_desc = NULL;
+
+ if(prb_map_elm == NULL){
+ rte_panic("p_sec_desc == NULL\n");
+ }
+
+ p_sec_desc = prb_map_elm->p_sec_desc[sym_id];
+
+ if(p_sec_desc == NULL){
+ rte_panic("p_sec_desc == NULL\n");
+ }
+
+#if 1
+ p_sec_iq = ((char*)pos + p_sec_desc->iq_buffer_offset);
+
+ /* calculete offset for external buffer */
+ ext_buff_len = p_sec_desc->iq_buffer_len;
+ ext_buff = p_sec_iq - (RTE_PKTMBUF_HEADROOM +
+ sizeof (struct xran_ecpri_hdr) +
+ sizeof (struct radio_app_common_hdr) +
+ sizeof(struct data_section_hdr));
+
+ ext_buff_len += RTE_PKTMBUF_HEADROOM +
+ sizeof (struct xran_ecpri_hdr) +
+ sizeof (struct radio_app_common_hdr) +
+ sizeof(struct data_section_hdr) + 18;
+
+ if(prb_map_elm->compMethod != XRAN_COMPMETHOD_NONE){
+ ext_buff -= sizeof (struct data_section_compression_hdr);
+ ext_buff_len += sizeof (struct data_section_compression_hdr);
+ }
+
+ eth_oran_hdr = rte_pktmbuf_alloc(_eth_mbuf_pool_small);
+
+ if (unlikely (( eth_oran_hdr) == NULL)) {
+ rte_panic("Failed rte_pktmbuf_alloc\n");
+ }
+
+ p_share_data->free_cb = extbuf_free_callback;
+ p_share_data->fcb_opaque = NULL;
+ rte_mbuf_ext_refcnt_set(p_share_data, 1);
+
+ ext_buff_iova = rte_mempool_virt2iova(mb);
+ if (unlikely (( ext_buff_iova) == 0)) {
+ rte_panic("Failed rte_mem_virt2iova \n");
+ }
+
+ if (unlikely (( (rte_iova_t)ext_buff_iova) == RTE_BAD_IOVA)) {
+ rte_panic("Failed rte_mem_virt2iova RTE_BAD_IOVA \n");
+ }
+
+ rte_pktmbuf_attach_extbuf(eth_oran_hdr,
+ ext_buff,
+ ext_buff_iova + RTE_PTR_DIFF(ext_buff , mb),
+ ext_buff_len,
+ p_share_data);
+
+ rte_pktmbuf_reset_headroom(eth_oran_hdr);
+
+ tmp = (struct rte_mbuf *)rte_pktmbuf_prepend(eth_oran_hdr, sizeof(struct ether_hdr));
+ if (unlikely (( tmp) == NULL)) {
+ rte_panic("Failed rte_pktmbuf_prepend \n");
+ }
+ mb = eth_oran_hdr;
+
+ /* first all PRBs */
+ prepare_symbol_ex(direction, sec_id,
+ mb,
+ (struct rb_map *)p_sec_iq,
+ prb_map_elm->compMethod,
+ prb_map_elm->iqWidth,
+ p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder,
+ frame_id, subframe_id, slot_id, sym_id,
+ prb_map_elm->nRBStart, prb_map_elm->nRBSize,
+ cc_id, ant_id,
+ (p_xran_dev_ctx->fh_init.io_cfg.id == O_DU) ?
+ xran_get_updl_seqid(pHandle, cc_id, ant_id) :
+ xran_get_upul_seqid(pHandle, cc_id, ant_id),
+ 0);
+
+ rte_mbuf_sanity_check((struct rte_mbuf *)mb, 0);
+ tx_counter++;
+ tx_bytes_counter += rte_pktmbuf_pkt_len((struct rte_mbuf *)mb);
+ p_xran_dev_ctx->send_upmbuf2ring((struct rte_mbuf *)mb, ETHER_TYPE_ECPRI);
+#else
+ p_sect_iq = pos + p_sec_desc->iq_buffer_offset;
+ prb_num = prb_map_elm->nRBSize;
+
+ if( prb_num > 136 || prb_num == 0) {
+ /* first 136 PRBs */
+ rte_panic("first 136 PRBs\n");
+ send_symbol_ex(direction,
+ sec_id,
+ NULL,
+ (struct rb_map *)p_sect_iq,
+ p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder,
+ frame_id, subframe_id, slot_id, sym_id,
+ 0, 136,
+ cc_id, ant_id,
+ (p_xran_dev_ctx->fh_init.io_cfg.id == O_DU) ?
+ xran_get_updl_seqid(pHandle, cc_id, ant_id) :
+ xran_get_upul_seqid(pHandle, cc_id, ant_id));
+
+ pos += 136 * N_SC_PER_PRB * (iq_sample_size_bits/8)*2;
+ /* last 137 PRBs */
+ send_symbol_ex(direction, sec_id,
+ NULL,
+ (struct rb_map *)p_sect_iq,
+ p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder,
+ frame_id, subframe_id, slot_id, sym_id,
+ 136, 137,
+ cc_id, ant_id,
+ (p_xran_dev_ctx->fh_init.io_cfg.id == O_DU) ?
+ xran_get_updl_seqid(pHandle, cc_id, ant_id) :
+ xran_get_upul_seqid(pHandle, cc_id, ant_id));
+ retval = 1;
+ } else {
+ send_symbol_ex(direction,
+ sec_id, /* xran_alloc_sectionid(pHandle, direction, cc_id, ant_id, slot_id)*/
+ /*(struct rte_mbuf *)mb*/ NULL,
+ (struct rb_map *)p_sect_iq,
+ p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder,
+ frame_id, subframe_id, slot_id, sym_id,
+ prb_map_elm->nRBStart, prb_map_elm->nRBSize,
+ cc_id, ant_id,
+ (p_xran_dev_ctx->fh_init.io_cfg.id == O_DU) ?
+ xran_get_updl_seqid(pHandle, cc_id, ant_id) :
+ xran_get_upul_seqid(pHandle, cc_id, ant_id));
+ retval = 1;
+ }
+
+#endif
+
+ }
+ } else {
+ printf("(%d %d %d %d) prb_map == NULL\n", tti % XRAN_N_FE_BUF_LEN, cc_id, ant_id, sym_id);
+ }
+
+ if(p_xran_dev_ctx->enablePrach
+ && (p_xran_dev_ctx->fh_init.io_cfg.id == O_RU)) { /* Only RU needs to send PRACH I/Q */
+ uint32_t is_prach_slot = xran_is_prach_slot(subframe_id, slot_id);
+ if(((frame_id % pPrachCPConfig->x) == pPrachCPConfig->y[0])
+ && (is_prach_slot == 1)
+ && (sym_id >= p_xran_dev_ctx->prach_start_symbol[cc_id])
+ && (sym_id <= p_xran_dev_ctx->prach_last_symbol[cc_id])) { //is prach slot
+ int prach_port_id = ant_id + pPrachCPConfig->eAxC_offset;
+ pos = (char*) p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[0].pData;
+ pos += (sym_id - p_xran_dev_ctx->prach_start_symbol[cc_id]) * pPrachCPConfig->numPrbc * N_SC_PER_PRB * 4;
+ mb = NULL;//(void*) p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[0].pCtrl;
+
+ send_symbol_ex(direction,
+ xran_alloc_sectionid(pHandle, direction, cc_id, prach_port_id, slot_id),
+ (struct rte_mbuf *)mb,
+ (struct rb_map *)pos,
+ p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder,
+ frame_id, subframe_id, slot_id, sym_id,
+ pPrachCPConfig->startPrbc, pPrachCPConfig->numPrbc,
+ cc_id, prach_port_id,
+ xran_get_upul_seqid(pHandle, cc_id, prach_port_id));
+ retval = 1;
+ } /* if((frame_id % pPrachCPConfig->x == pPrachCPConfig->y[0]) .... */
+ } /* if(p_xran_dev_ctx->enablePrach ..... */
+
+
+ if(p_xran_dev_ctx->enableSrs && (p_xran_dev_ctx->fh_init.io_cfg.id == O_RU)){
+ if( p_srs_cfg->symbMask & (1 << sym_id) /* is SRS symbol */
+ && do_srs) {
+ int32_t ant_elm_id = 0;
+
+ for (ant_elm_id = 0; ant_elm_id < num_ant_elm; ant_elm_id++){
+ int32_t ant_elm_eAxC_id = ant_elm_id + p_srs_cfg->eAxC_offset;
+
+ pos = (char*) p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_elm_id].sBufferList.pBuffers[sym_id].pData;
+ mb = (void*) p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_elm_id].sBufferList.pBuffers[sym_id].pCtrl;
+
+ if( prb_num > 136 || prb_num == 0) {
+ uint16_t sec_id = xran_alloc_sectionid(pHandle, direction, cc_id, ant_id, slot_id);
+ /* first 136 PRBs */
+ send_symbol_ex(direction,
+ sec_id,
+ NULL,
+ (struct rb_map *)pos,
+ p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder,
+ frame_id, subframe_id, slot_id, sym_id,
+ 0, 136,
+ cc_id, ant_elm_eAxC_id,
+ (p_xran_dev_ctx->fh_init.io_cfg.id == O_DU) ?
+ xran_get_updl_seqid(pHandle, cc_id, ant_elm_eAxC_id) :
+ xran_get_upul_seqid(pHandle, cc_id, ant_elm_eAxC_id));
+
+ pos += 136 * N_SC_PER_PRB * (iq_sample_size_bits/8)*2;
+ /* last 137 PRBs */
+ send_symbol_ex(direction, sec_id,
+ NULL,
+ (struct rb_map *)pos,
+ p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder,
+ frame_id, subframe_id, slot_id, sym_id,
+ 136, 137,
+ cc_id, ant_elm_eAxC_id,
+ (p_xran_dev_ctx->fh_init.io_cfg.id == O_DU) ?
+ xran_get_updl_seqid(pHandle, cc_id, ant_elm_eAxC_id) :
+ xran_get_upul_seqid(pHandle, cc_id, ant_elm_eAxC_id));
+ } else {
+ send_symbol_ex(direction,
+ xran_alloc_sectionid(pHandle, direction, cc_id, ant_elm_eAxC_id, slot_id),
+ (struct rte_mbuf *)mb,
+ (struct rb_map *)pos,
+ p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder,
+ frame_id, subframe_id, slot_id, sym_id,
+ 0, prb_num,
+ cc_id, ant_elm_eAxC_id,
+ (p_xran_dev_ctx->fh_init.io_cfg.id == O_DU) ?
+ xran_get_updl_seqid(pHandle, cc_id, ant_elm_eAxC_id) :
+ xran_get_upul_seqid(pHandle, cc_id, ant_elm_eAxC_id));
+ retval = 1;
+ }
+ } /* for ant elem */
+ } /* SRS symbol */
+ } /* SRS enabled */
+ } /* RU mode or C-Plane is not used */
+ }
+
+ return retval;
+}
+
+
+int32_t xran_process_tx_sym_cp_on(uint8_t ctx_id, uint32_t tti, int32_t cc_id, int32_t ant_id, uint32_t frame_id, uint32_t subframe_id,
+ uint32_t slot_id, uint32_t sym_id)
+{
+ int32_t retval = 0;
+ uint64_t t1 = MLogTick();
+
+ struct rte_mbuf *eth_oran_hdr = NULL;
+ char *ext_buff = NULL;
+ uint16_t ext_buff_len = 0;
+ struct rte_mbuf *tmp = NULL;
+ rte_iova_t ext_buff_iova = 0;
+ void *pHandle = NULL;
+ char *pos = NULL;
+ char *p_sec_iq = NULL;
+ void *mb = NULL;
+ int prb_num = 0;
+ uint16_t iq_sample_size_bits = 16; // TODO: make dynamic per
+ uint32_t next = 0;
+ int32_t num_sections = 0;
+
+ struct xran_section_info *sectinfo = NULL;
+ struct xran_device_ctx *p_xran_dev_ctx = xran_dev_get_ctx();
+
+ struct xran_prach_cp_config *pPrachCPConfig = &(p_xran_dev_ctx->PrachCPConfig);
+ struct xran_srs_config *p_srs_cfg = &(p_xran_dev_ctx->srs_cfg);
+ enum xran_pkt_dir direction;
+
+ struct rte_mbuf_ext_shared_info * p_share_data = &share_data[tti % XRAN_N_FE_BUF_LEN];
+
+ if(p_xran_dev_ctx->fh_init.io_cfg.id == O_DU) {
+ direction = XRAN_DIR_DL; /* O-DU */
+ prb_num = p_xran_dev_ctx->fh_cfg.nDLRBs;
+ } else {
+ direction = XRAN_DIR_UL; /* RU */
+ prb_num = p_xran_dev_ctx->fh_cfg.nULRBs;
+ }
+
+ next = 0;
+ num_sections = xran_cp_getsize_section_info(pHandle, direction, cc_id, ant_id, ctx_id);
+ /* iterate C-Plane configuration to generate corresponding U-Plane */
+ while(next < num_sections) {
+ sectinfo = xran_cp_iterate_section_info(pHandle, direction, cc_id, ant_id, ctx_id, &next);
+
+ if(sectinfo == NULL)
+ break;
+
+ if(sectinfo->type != XRAN_CP_SECTIONTYPE_1) { /* only supports type 1 */
+ print_err("Invalid section type in section DB - %d", sectinfo->type);
+ continue;
+ }
+
+ /* skip, if not scheduled */
+ if(sym_id < sectinfo->startSymId || sym_id >= sectinfo->startSymId + sectinfo->numSymbol)
+ continue;
+
+ if(sectinfo->compMeth)
+ iq_sample_size_bits = sectinfo->iqWidth;
+
+ print_dbg(">>> sym %2d [%d] type%d, id %d, startPrbc=%d, numPrbc=%d, numSymbol=%d\n", sym_id, next,
+ sectinfo->type, sectinfo->id, sectinfo->startPrbc,
+ sectinfo->numPrbc, sectinfo->numSymbol);
+
+ p_xran_dev_ctx->tx_mbufs[0].len = 0;
+ uint16_t len = p_xran_dev_ctx->tx_mbufs[0].len;
+ int16_t len2 = 0;
+ uint16_t i = 0;
+
+ //Added for Klocworks
+ if (len >= MBUF_TABLE_SIZE)
+ len = MBUF_TABLE_SIZE - 1;
+
+ pos = (char*) p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;
+ mb = p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[sym_id].pCtrl;
+
+#if 1
+ p_sec_iq = ((char*)pos + sectinfo->sec_desc[sym_id].iq_buffer_offset);
+
+ /* calculete offset for external buffer */
+ ext_buff_len = sectinfo->sec_desc[sym_id].iq_buffer_len;
+ ext_buff = p_sec_iq - (RTE_PKTMBUF_HEADROOM +
+ sizeof (struct xran_ecpri_hdr) +
+ sizeof (struct radio_app_common_hdr) +
+ sizeof(struct data_section_hdr));
+
+ ext_buff_len += RTE_PKTMBUF_HEADROOM +
+ sizeof (struct xran_ecpri_hdr) +
+ sizeof (struct radio_app_common_hdr) +
+ sizeof(struct data_section_hdr) + 18;
+
+ if(sectinfo->compMeth != XRAN_COMPMETHOD_NONE){
+ ext_buff -= sizeof (struct data_section_compression_hdr);
+ ext_buff_len += sizeof (struct data_section_compression_hdr);
+ }
+
+ eth_oran_hdr = rte_pktmbuf_alloc(_eth_mbuf_pool_small);
+
+ if (unlikely (( eth_oran_hdr) == NULL)) {
+ rte_panic("Failed rte_pktmbuf_alloc\n");
+ }
+
+ p_share_data->free_cb = extbuf_free_callback;
+ p_share_data->fcb_opaque = NULL;
+ rte_mbuf_ext_refcnt_set(p_share_data, 1);
+
+ ext_buff_iova = rte_mempool_virt2iova(mb);
+ if (unlikely (( ext_buff_iova) == 0)) {
+ rte_panic("Failed rte_mem_virt2iova \n");
+ }
+
+ if (unlikely (( (rte_iova_t)ext_buff_iova) == RTE_BAD_IOVA)) {
+ rte_panic("Failed rte_mem_virt2iova RTE_BAD_IOVA \n");
+ }
+
+ rte_pktmbuf_attach_extbuf(eth_oran_hdr,
+ ext_buff,
+ ext_buff_iova + RTE_PTR_DIFF(ext_buff , mb),
+ ext_buff_len,
+ p_share_data);
+
+ rte_pktmbuf_reset_headroom(eth_oran_hdr);
+
+ tmp = (struct rte_mbuf *)rte_pktmbuf_prepend(eth_oran_hdr, sizeof(struct ether_hdr));
+ if (unlikely (( tmp) == NULL)) {
+ rte_panic("Failed rte_pktmbuf_prepend \n");
+ }
+ mb = eth_oran_hdr;
+#else
+ rte_pktmbuf_refcnt_update(mb, 1); /* make sure eth won't free our mbuf */
+#endif
+ /* first all PRBs */
+ prepare_symbol_ex(direction, sectinfo->id,
+ mb,
+ (struct rb_map *)p_sec_iq,
+ sectinfo->compMeth,
+ sectinfo->iqWidth,
+ p_xran_dev_ctx->fh_cfg.ru_conf.byteOrder,
+ frame_id, subframe_id, slot_id, sym_id,
+ sectinfo->startPrbc, sectinfo->numPrbc,
+ cc_id, ant_id,
+ xran_get_updl_seqid(pHandle, cc_id, ant_id),
+ 0);
+
+ /* if we don't need to do any fragmentation */
+ if (likely (p_xran_dev_ctx->fh_init.mtu >=
+ sectinfo->numPrbc * (3*iq_sample_size_bits + 1))) {
+ /* no fragmentation */
+ p_xran_dev_ctx->tx_mbufs[0].m_table[len] = mb;
+ len2 = 1;
+ } else {
+ /* fragmentation */
+ uint8_t * seq_num = xran_get_updl_seqid_addr(pHandle, cc_id, ant_id);
+ if(seq_num)
+ (*seq_num)--;
+ else
+ rte_panic("pointer to seq number is NULL [CC %d Ant %d]\n", cc_id, ant_id);
+
+ len2 = xran_app_fragment_packet(mb,
+ &p_xran_dev_ctx->tx_mbufs[0].m_table[len],
+ (uint16_t)(MBUF_TABLE_SIZE - len),
+ p_xran_dev_ctx->fh_init.mtu,
+ p_xran_dev_ctx->direct_pool,
+ p_xran_dev_ctx->indirect_pool,
+ sectinfo,
+ seq_num);
+
+ /* Free input packet */
+ rte_pktmbuf_free(mb);
+
+ /* If we fail to fragment the packet */
+ if (unlikely (len2 < 0)){
+ print_err("len2= %d\n", len2);
+ return 0;
+ }
+ }
+
+ if(len2 > 1){
+ for (i = len; i < len + len2; i ++) {
+ struct rte_mbuf *m;
+ m = p_xran_dev_ctx->tx_mbufs[0].m_table[i];
+ struct ether_hdr *eth_hdr = (struct ether_hdr *)
+ rte_pktmbuf_prepend(m, (uint16_t)sizeof(struct ether_hdr));
+ if (eth_hdr == NULL) {
+ rte_panic("No headroom in mbuf.\n");
+ }
+ }
+ }
+
+ len += len2;
+
+ if (unlikely(len > XRAN_MAX_PKT_BURST_PER_SYM)) {
+ rte_panic("XRAN_MAX_PKT_BURST_PER_SYM\n");
+ }
+
+ /* Transmit packets */
+ xran_send_burst(p_xran_dev_ctx, (uint16_t)len, 0);
+ p_xran_dev_ctx->tx_mbufs[0].len = 0;
+ retval = 1;
+ } /* while(section) */
+
+ return retval;
+}
+
+int32_t xran_process_tx_sym(void *arg)
+{
+ int32_t retval = 0;
+ uint32_t tti=0;
+#if XRAN_MLOG_VAR
+ uint32_t mlogVar[10];
+ uint32_t mlogVarCnt = 0;
+#endif
+ unsigned long t1 = MLogTick();
+
+ void *pHandle = NULL;
+ int32_t ant_id = 0;
+ int32_t cc_id = 0;
+ uint8_t num_eAxc = 0;
+ uint8_t num_CCPorts = 0;
+ uint8_t num_ant_elm = 0;
+ uint32_t frame_id = 0;
+ uint32_t subframe_id = 0;
+ uint32_t slot_id = 0;
+ uint32_t sym_id = 0;
+ uint32_t sym_idx = 0;
+
+ uint8_t ctx_id;
+ enum xran_pkt_dir direction;
+ struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
+
+ if(p_xran_dev_ctx->xran2phy_mem_ready == 0)
+ return 0;
+
+ /* O-RU: send symb after OTA time with delay (UL) */
+ /* O-DU: send symb in advance of OTA time (DL) */
+ sym_idx = XranOffsetSym(p_xran_dev_ctx->sym_up, xran_lib_ota_sym_idx, XRAN_NUM_OF_SYMBOL_PER_SLOT*SLOTNUM_PER_SUBFRAME*1000);
+
+ tti = XranGetTtiNum(sym_idx, XRAN_NUM_OF_SYMBOL_PER_SLOT);
+ slot_id = XranGetSlotNum(tti, SLOTNUM_PER_SUBFRAME);
+ subframe_id = XranGetSubFrameNum(tti,SLOTNUM_PER_SUBFRAME, SUBFRAMES_PER_SYSTEMFRAME);
+ frame_id = XranGetFrameNum(tti,xran_getSfnSecStart(),SUBFRAMES_PER_SYSTEMFRAME, SLOTNUM_PER_SUBFRAME);
+ // ORAN frameId, 8 bits, [0, 255]
+ frame_id = (frame_id & 0xff);
+
+ sym_id = XranGetSymNum(sym_idx, XRAN_NUM_OF_SYMBOL_PER_SLOT);
+ ctx_id = XranGetSlotNum(tti, SLOTS_PER_SYSTEMFRAME) % XRAN_MAX_SECTIONDB_CTX;
+
+ print_dbg("[%d]SFN %d sf %d slot %d\n", tti, frame_id, subframe_id, slot_id);
+
+#if XRAN_MLOG_VAR
+ mlogVar[mlogVarCnt++] = 0xAAAAAAAA;
+ mlogVar[mlogVarCnt++] = xran_lib_ota_sym_idx;
+ mlogVar[mlogVarCnt++] = sym_idx;
+ mlogVar[mlogVarCnt++] = abs(p_xran_dev_ctx->sym_up);
+ mlogVar[mlogVarCnt++] = tti;
+ mlogVar[mlogVarCnt++] = frame_id;
+ mlogVar[mlogVarCnt++] = subframe_id;
+ mlogVar[mlogVarCnt++] = slot_id;
+ mlogVar[mlogVarCnt++] = sym_id;
+ MLogAddVariables(mlogVarCnt, mlogVar, MLogTick());
+#endif
+
+ if(p_xran_dev_ctx->fh_init.io_cfg.id == O_RU && xran_get_ru_category(pHandle) == XRAN_CATEGORY_B) {
+ num_eAxc = xran_get_num_eAxcUl(pHandle);
+ } else {
+ num_eAxc = xran_get_num_eAxc(pHandle);
+ }
+
+ num_CCPorts = xran_get_num_cc(pHandle);
+ /* U-Plane */
+ for(ant_id = 0; ant_id < num_eAxc; ant_id++) {
+ for(cc_id = 0; cc_id < num_CCPorts; cc_id++) {
+ if(p_xran_dev_ctx->fh_init.io_cfg.id == O_DU && p_xran_dev_ctx->enableCP){
+ retval = xran_process_tx_sym_cp_on(ctx_id, tti, cc_id, ant_id, frame_id, subframe_id, slot_id, sym_id);
+ } else {
+ retval = xran_process_tx_sym_cp_off(ctx_id, tti, cc_id, ant_id, frame_id, subframe_id, slot_id, sym_id, (ant_id == (num_eAxc - 1)));
+ }
+ } /* for(cc_id = 0; cc_id < num_CCPorts; cc_id++) */
+ } /* for(ant_id = 0; ant_id < num_eAxc; ant_id++) */
+
+ MLogTask(PID_PROCESS_TX_SYM, t1, MLogTick());
+ return retval;
+}
+
+int xran_packet_and_dpdk_timer_thread(void *args)
+{
+ struct xran_ethdi_ctx *const ctx = xran_ethdi_get_ctx();
+
+ uint64_t prev_tsc = 0;
+ uint64_t cur_tsc = rte_rdtsc();
+ uint64_t diff_tsc = cur_tsc - prev_tsc;
+ cpu_set_t cpuset;
+ struct sched_param sched_param;
+ int res = 0;
+ printf("%s [CPU %2d] [PID: %6d]\n", __FUNCTION__, rte_lcore_id(), getpid());
+
+ sched_param.sched_priority = XRAN_THREAD_DEFAULT_PRIO;
+
+ if ((res = pthread_setschedparam(pthread_self(), 1, &sched_param)))
+ {
+ printf("priority is not changed: coreId = %d, result1 = %d\n",rte_lcore_id(), res);
+ }
+
+ while(1){
+
+ cur_tsc = rte_rdtsc();
+ diff_tsc = cur_tsc - prev_tsc;
+ if (diff_tsc > TIMER_RESOLUTION_CYCLES) {
+ rte_timer_manage();
+ prev_tsc = cur_tsc;
+ }
+
+ if (XRAN_STOPPED == xran_if_current_state)
+ break;
+ }
+
+ printf("Closing pkts timer thread...\n");
+ return 0;
+}
+
+
+int32_t xran_init(int argc, char *argv[],
+ struct xran_fh_init *p_xran_fh_init, char *appName, void ** pXranLayerHandle)
+{
+ int32_t i;
+ int32_t j;
+
+ struct xran_io_loop_cfg *p_io_cfg = (struct xran_io_loop_cfg *)&p_xran_fh_init->io_cfg;
+ struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
+
+ cpu_set_t system_cpuset;
+ pthread_getaffinity_np(pthread_self(), sizeof(cpu_set_t), &system_cpuset);
+ for (j = 0; j < CPU_SETSIZE; j++)
+ if (CPU_ISSET(j, &system_cpuset))
+ break;
+
+ int32_t lcore_id = j;
+
+ char filename[64];
+ int64_t offset_sec, offset_nsec;
+
+ memset(p_xran_dev_ctx, 0, sizeof(struct xran_device_ctx));
+
+ /* copy init */
+ p_xran_dev_ctx->fh_init = *p_xran_fh_init;
+
+ printf(" %s: MTU %d\n", __FUNCTION__, p_xran_dev_ctx->fh_init.mtu);
+
+ xran_if_current_state = XRAN_INIT;
+
+ memcpy(&(p_xran_dev_ctx->eAxc_id_cfg), &(p_xran_fh_init->eAxCId_conf), sizeof(struct xran_eaxcid_config));
+
+ p_xran_dev_ctx->enableCP = p_xran_fh_init->enableCP;
+ p_xran_dev_ctx->enablePrach = p_xran_fh_init->prachEnable;
+ p_xran_dev_ctx->enableSrs = p_xran_fh_init->srsEnable;
+ p_xran_dev_ctx->DynamicSectionEna = p_xran_fh_init->DynamicSectionEna;
+
+ /* To make sure to set default functions */
+ p_xran_dev_ctx->send_upmbuf2ring = NULL;
+ p_xran_dev_ctx->send_cpmbuf2ring = NULL;
+
+ xran_register_ethertype_handler(ETHER_TYPE_ECPRI, handle_ecpri_ethertype);
+ if (p_io_cfg->id == 0)
+ xran_ethdi_init_dpdk_io(p_xran_fh_init->filePrefix,
+ p_io_cfg,
+ &lcore_id,
+ (struct ether_addr *)p_xran_fh_init->p_o_du_addr,
+ (struct ether_addr *)p_xran_fh_init->p_o_ru_addr,
+ p_xran_fh_init->cp_vlan_tag,
+ p_xran_fh_init->up_vlan_tag);
+ else
+ xran_ethdi_init_dpdk_io(p_xran_fh_init->filePrefix,
+ p_io_cfg,
+ &lcore_id,
+ (struct ether_addr *)p_xran_fh_init->p_o_ru_addr,
+ (struct ether_addr *)p_xran_fh_init->p_o_du_addr,
+ p_xran_fh_init->cp_vlan_tag,
+ p_xran_fh_init->up_vlan_tag);
+
+ for(i = 0; i < 10; i++ )
+ rte_timer_init(&tti_to_phy_timer[i]);
+
+ rte_timer_init(&sym_timer);
+ for (i = 0; i< MAX_NUM_OF_DPDK_TIMERS; i++)
+ rte_timer_init(&dpdk_timer[i]);
+
+ p_xran_dev_ctx->direct_pool = socket_direct_pool;
+ p_xran_dev_ctx->indirect_pool = socket_indirect_pool;
+
+ for (i = 0; i< XRAN_MAX_SECTOR_NR; i++){
+ for (j = 0; j< XRAN_NUM_OF_SYMBOL_PER_SLOT; j++){
+ LIST_INIT (&p_xran_dev_ctx->sym_cb_list_head[i][j]);
+ }
+ }
+
+ printf("Set debug stop %d, debug stop count %d\n", p_xran_fh_init->debugStop, p_xran_fh_init->debugStopCount);
+ timing_set_debug_stop(p_xran_fh_init->debugStop, p_xran_fh_init->debugStopCount);
+
+ for (uint32_t nCellIdx = 0; nCellIdx < XRAN_MAX_SECTOR_NR; nCellIdx++){
+ xran_fs_clear_slot_type(nCellIdx);
+ }
+
+ *pXranLayerHandle = p_xran_dev_ctx;
+
+ if(p_xran_fh_init->GPS_Alpha || p_xran_fh_init->GPS_Beta ){
+ offset_sec = p_xran_fh_init->GPS_Beta / 100; //resolution of beta is 10ms
+ offset_nsec = (p_xran_fh_init->GPS_Beta - offset_sec * 100) * 1e7 + p_xran_fh_init->GPS_Alpha;
+ p_xran_dev_ctx->offset_sec = offset_sec;
+ p_xran_dev_ctx->offset_nsec = offset_nsec;
+ }else {
+ p_xran_dev_ctx->offset_sec = 0;
+ p_xran_dev_ctx->offset_nsec = 0;
+ }
+
+ return 0;
+}
+
+int32_t xran_sector_get_instances (void * pDevHandle, uint16_t nNumInstances,
+ xran_cc_handle_t * pSectorInstanceHandles)
+{
+ xran_status_t nStatus = XRAN_STATUS_FAIL;
+ struct xran_device_ctx *pDev = (struct xran_device_ctx *)pDevHandle;
+ XranSectorHandleInfo *pCcHandle = NULL;
+ int32_t i = 0;
+
+ /* Check for the Valid Parameters */
+ CHECK_NOT_NULL (pSectorInstanceHandles, XRAN_STATUS_INVALID_PARAM);
+
+ if (!nNumInstances) {
+ print_dbg("Instance is not assigned for this function !!! \n");
+ return XRAN_STATUS_INVALID_PARAM;
+ }
+
+ for (i = 0; i < nNumInstances; i++) {
+
+ /* Allocate Memory for CC handles */
+ pCcHandle = (XranSectorHandleInfo *) _mm_malloc( /*"xran_cc_handles",*/ sizeof (XranSectorHandleInfo), 64);
+
+ if(pCcHandle == NULL)
+ return XRAN_STATUS_RESOURCE;
+
+ memset (pCcHandle, 0, (sizeof (XranSectorHandleInfo)));
+
+ pCcHandle->nIndex = i;
+ pCcHandle->nXranPort = pDev->xran_port_id;
+
+ printf("%s [%d]: CC %d handle %p\n", __FUNCTION__, pDev->xran_port_id, i, pCcHandle);
+ pLibInstanceHandles[pDev->xran_port_id][i] = pSectorInstanceHandles[i] = pCcHandle;
+
+ printf("Handle: %p Instance: %p\n",
+ &pSectorInstanceHandles[i], pSectorInstanceHandles[i]);
+ }
+
+ return XRAN_STATUS_SUCCESS;
+}
+
+int32_t xran_mm_init (void * pHandle, uint64_t nMemorySize,
+ uint32_t nMemorySegmentSize)
+{
+ /* we use mbuf from dpdk memory */
+ return 0;
+}
+
+int32_t xran_bm_init (void * pHandle, uint32_t * pPoolIndex, uint32_t nNumberOfBuffers, uint32_t nBufferSize)
+{
+ XranSectorHandleInfo* pXranCc = (XranSectorHandleInfo*) pHandle;
+ uint32_t nAllocBufferSize;
+
+ char pool_name[RTE_MEMPOOL_NAMESIZE];
+
+ snprintf(pool_name, RTE_MEMPOOL_NAMESIZE, "ru_%d_cc_%d_idx_%d",
+ pXranCc->nXranPort, pXranCc->nIndex, pXranCc->nBufferPoolIndex);
+
+ nAllocBufferSize = nBufferSize + sizeof(struct ether_hdr) +
+ sizeof (struct xran_ecpri_hdr) +
+ sizeof (struct radio_app_common_hdr) +
+ sizeof(struct data_section_hdr) + 256;
+
+ if(nAllocBufferSize >= UINT16_MAX) {
+ rte_panic("nAllocBufferSize is failed [ handle %p %d %d ] [nPoolIndex %d] nNumberOfBuffers %d nBufferSize %d nAllocBufferSize %d\n",
+ pXranCc, pXranCc->nXranPort, pXranCc->nIndex, pXranCc->nBufferPoolIndex, nNumberOfBuffers, nBufferSize, nAllocBufferSize);
+ return -1;
+ }
+
+ printf("%s: [ handle %p %d %d ] [nPoolIndex %d] nNumberOfBuffers %d nBufferSize %d\n", pool_name,
+ pXranCc, pXranCc->nXranPort, pXranCc->nIndex, pXranCc->nBufferPoolIndex, nNumberOfBuffers, nBufferSize);
+
+ pXranCc->p_bufferPool[pXranCc->nBufferPoolIndex] = rte_pktmbuf_pool_create(pool_name, nNumberOfBuffers,
+ MBUF_CACHE, 0, nAllocBufferSize, rte_socket_id());
+
+ if(pXranCc->p_bufferPool[pXranCc->nBufferPoolIndex] == NULL){
+ rte_panic("rte_pktmbuf_pool_create failed [ handle %p %d %d ] [nPoolIndex %d] nNumberOfBuffers %d nBufferSize %d errno %s\n",
+ pXranCc, pXranCc->nXranPort, pXranCc->nIndex, pXranCc->nBufferPoolIndex, nNumberOfBuffers, nBufferSize, rte_strerror(rte_errno));
+ return -1;
+ }
+
+ pXranCc->bufferPoolElmSz[pXranCc->nBufferPoolIndex] = nBufferSize;
+ pXranCc->bufferPoolNumElm[pXranCc->nBufferPoolIndex] = nNumberOfBuffers;
+
+ printf("CC:[ handle %p ru %d cc_idx %d ] [nPoolIndex %d] mb pool %p \n",
+ pXranCc, pXranCc->nXranPort, pXranCc->nIndex,
+ pXranCc->nBufferPoolIndex, pXranCc->p_bufferPool[pXranCc->nBufferPoolIndex]);
+
+ *pPoolIndex = pXranCc->nBufferPoolIndex++;
+
+ return 0;
+}
+
+int32_t xran_bm_allocate_buffer(void * pHandle, uint32_t nPoolIndex, void **ppData, void **ppCtrl)
+{
+ XranSectorHandleInfo* pXranCc = (XranSectorHandleInfo*) pHandle;
+ *ppData = NULL;
+ *ppCtrl = NULL;
+
+ struct rte_mbuf * mb = rte_pktmbuf_alloc(pXranCc->p_bufferPool[nPoolIndex]);
+
+ if(mb){
+ char * start = rte_pktmbuf_append(mb, pXranCc->bufferPoolElmSz[nPoolIndex]);
+ char * ethhdr = rte_pktmbuf_prepend(mb, sizeof(struct ether_hdr));
+
+ if(start && ethhdr){
+ char * iq_offset = rte_pktmbuf_mtod(mb, char * );
+ /* skip headers */
+ iq_offset = iq_offset + sizeof(struct ether_hdr) +
+ sizeof (struct xran_ecpri_hdr) +
+ sizeof (struct radio_app_common_hdr) +
+ sizeof(struct data_section_hdr);
+
+ if (0) /* if compression */
+ iq_offset += sizeof (struct data_section_compression_hdr);
+
+ *ppData = (void *)iq_offset;
+ *ppCtrl = (void *)mb;
+ } else {
+ print_err("[nPoolIndex %d] start ethhdr failed \n", nPoolIndex );
+ return -1;
+ }
+ } else {
+ print_err("[nPoolIndex %d] mb alloc failed \n", nPoolIndex );
+ return -1;
+ }
+
+ if (*ppData == NULL){
+ print_err("[nPoolIndex %d] rte_pktmbuf_append for %d failed \n", nPoolIndex, pXranCc->bufferPoolElmSz[nPoolIndex]);
+ return -1;
+ }
+
+ return 0;
+}
+
+int32_t xran_bm_free_buffer(void * pHandle, void *pData, void *pCtrl)
+{
+ XranSectorHandleInfo* pXranCc = (XranSectorHandleInfo*) pHandle;
+
+ if(pCtrl)
+ rte_pktmbuf_free(pCtrl);
+
+ return 0;
+}
+
+int32_t xran_5g_fronthault_config (void * pHandle,
+ struct xran_buffer_list *pSrcBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN],
+ struct xran_buffer_list *pSrcCpBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN],
+ struct xran_buffer_list *pDstBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN],
+ struct xran_buffer_list *pDstCpBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN],
+ xran_transport_callback_fn pCallback,
+ void *pCallbackTag)
+{
+ XranSectorHandleInfo* pXranCc = (XranSectorHandleInfo*) pHandle;
+ xran_status_t nStatus = XRAN_STATUS_SUCCESS;
+ int j, i = 0, z, k;
+ struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
+
+ print_dbg("%s\n", __FUNCTION__);
+
+ if(NULL == pHandle)
+ {
+ printf("Handle is NULL!\n");
+ return XRAN_STATUS_FAIL;
+ }
+
+ if (pCallback == NULL)
+ {
+ printf ("no callback\n");
+ return XRAN_STATUS_FAIL;
+ }
+
+ i = pXranCc->nIndex;
+
+ for(j=0; j<XRAN_N_FE_BUF_LEN; j++)
+ {
+ for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){
+ /* U-plane TX */
+
+ p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[j][i][z].bValid = 0;
+ p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
+ p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
+ p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
+ p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;
+ p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &p_xran_dev_ctx->sFrontHaulTxBuffers[j][i][z][0];
+
+ p_xran_dev_ctx->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList = *pSrcBuffer[z][j];
+
+ /* C-plane TX */
+ p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].bValid = 0;
+ p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
+ p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
+ p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
+ p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;
+ p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &p_xran_dev_ctx->sFrontHaulTxPrbMapBuffers[j][i][z][0];
+
+ p_xran_dev_ctx->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList = *pSrcCpBuffer[z][j];
+
+ /* U-plane RX */
+
+ p_xran_dev_ctx->sFrontHaulRxBbuIoBufCtrl[j][i][z].bValid = 0;
+ p_xran_dev_ctx->sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
+ p_xran_dev_ctx->sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
+ p_xran_dev_ctx->sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
+ p_xran_dev_ctx->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;
+ p_xran_dev_ctx->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &p_xran_dev_ctx->sFrontHaulRxBuffers[j][i][z][0];
+
+ p_xran_dev_ctx->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList = *pDstBuffer[z][j];
+
+ /* C-plane RX */
+ p_xran_dev_ctx->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].bValid = 0;
+ p_xran_dev_ctx->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
+ p_xran_dev_ctx->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
+ p_xran_dev_ctx->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
+ p_xran_dev_ctx->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;
+ p_xran_dev_ctx->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &p_xran_dev_ctx->sFrontHaulRxPrbMapBuffers[j][i][z][0];
+
+ p_xran_dev_ctx->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList = *pDstCpBuffer[z][j];
+ }
+ }
+
+
+ p_xran_dev_ctx->pCallback[i] = pCallback;
+ p_xran_dev_ctx->pCallbackTag[i] = pCallbackTag;
+
+ p_xran_dev_ctx->xran2phy_mem_ready = 1;
+
+ return nStatus;
+}
+
+int32_t xran_5g_prach_req (void * pHandle,
+ struct xran_buffer_list *pDstBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN],
+ xran_transport_callback_fn pCallback,
+ void *pCallbackTag)
+{
+ XranSectorHandleInfo* pXranCc = (XranSectorHandleInfo*) pHandle;
+ xran_status_t nStatus = XRAN_STATUS_SUCCESS;
+ int j, i = 0, z;
+ struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
+
+ if(NULL == pHandle)
+ {
+ printf("Handle is NULL!\n");
+ return XRAN_STATUS_FAIL;
+ }
+ if (pCallback == NULL)
+ {
+ printf ("no callback\n");
+ return XRAN_STATUS_FAIL;
+ }
+
+ i = pXranCc->nIndex;
+
+ for(j=0; j<XRAN_N_FE_BUF_LEN; j++)
+ {
+ for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){
+ p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[j][i][z].bValid = 0;
+ p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
+ p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
+ p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
+ p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_MAX_ANTENNA_NR; // ant number.
+ p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &p_xran_dev_ctx->sFHPrachRxBuffers[j][i][z][0];
+ p_xran_dev_ctx->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList = *pDstBuffer[z][j];
+ }
+ }
+
+ p_xran_dev_ctx->pPrachCallback[i] = pCallback;
+ p_xran_dev_ctx->pPrachCallbackTag[i] = pCallbackTag;
+
+ return 0;
+}
+
+
+int32_t xran_5g_srs_req (void * pHandle,
+ struct xran_buffer_list *pDstBuffer[XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_N_FE_BUF_LEN],
+ xran_transport_callback_fn pCallback,
+ void *pCallbackTag)
+{
+ XranSectorHandleInfo* pXranCc = (XranSectorHandleInfo*) pHandle;
+ xran_status_t nStatus = XRAN_STATUS_SUCCESS;
+ int j, i = 0, z;
+ struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
+
+ if(NULL == pHandle)
+ {
+ printf("Handle is NULL!\n");
+ return XRAN_STATUS_FAIL;
+ }
+ if (pCallback == NULL)
+ {
+ printf ("no callback\n");
+ return XRAN_STATUS_FAIL;
+ }
+
+ i = pXranCc->nIndex;
+
+ for(j=0; j<XRAN_N_FE_BUF_LEN; j++)
+ {
+ for(z = 0; z < XRAN_MAX_ANT_ARRAY_ELM_NR; z++){
+ p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[j][i][z].bValid = 0;
+ p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
+ p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
+ p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
+ p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_MAX_ANT_ARRAY_ELM_NR; // ant number.
+ p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &p_xran_dev_ctx->sFHSrsRxBuffers[j][i][z][0];
+ p_xran_dev_ctx->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList = *pDstBuffer[z][j];
+ }
+ }
+
+ p_xran_dev_ctx->pSrsCallback[i] = pCallback;
+ p_xran_dev_ctx->pSrsCallbackTag[i] = pCallbackTag;
+
+ return 0;
+}
+
+uint32_t xran_get_time_stats(uint64_t *total_time, uint64_t *used_time, uint32_t *core_used, uint32_t clear)
+{
+ *total_time = xran_total_tick;
+ *used_time = xran_used_tick;
+ *core_used = xran_core_used;
+
+ if (clear)
+ {
+ xran_total_tick = 0;
+ xran_used_tick = 0;
+ }
+
+ return 0;
+}
+
+void * xran_malloc(size_t buf_len)
+{
+ return rte_malloc("External buffer", buf_len, RTE_CACHE_LINE_SIZE);
+}
+
+uint8_t *xran_add_hdr_offset(uint8_t *dst, int16_t compMethod)
+{
+ dst+= (RTE_PKTMBUF_HEADROOM +
+ sizeof (struct xran_ecpri_hdr) +
+ sizeof (struct radio_app_common_hdr) +
+ sizeof(struct data_section_hdr));
+
+ if(compMethod != XRAN_COMPMETHOD_NONE)
+ dst += sizeof (struct data_section_compression_hdr);
+
+ dst = RTE_PTR_ALIGN_CEIL(dst, 64);
+
+ return dst;
+}
+
+int32_t xran_open(void *pHandle, struct xran_fh_config* pConf)
+{
+ int32_t i;
+ uint8_t nNumerology = 0;
+ int32_t lcore_id = 0;
+ struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
+ struct xran_fh_config *pFhCfg;
+ pFhCfg = &(p_xran_dev_ctx->fh_cfg);
+
+ memcpy(pFhCfg, pConf, sizeof(struct xran_fh_config));
+
+ if(pConf->log_level)
+ printf(" %s: O-RU Category %s\n", __FUNCTION__, (pFhCfg->ru_conf.xranCat == XRAN_CATEGORY_A) ? "A" : "B");
+
+ nNumerology = xran_get_conf_numerology(pHandle);
+
+ if (pConf->nCC > XRAN_MAX_SECTOR_NR)
+ {
+ if(pConf->log_level)
+ printf("Number of cells %d exceeds max number supported %d!\n", pConf->nCC, XRAN_MAX_SECTOR_NR);
+ pConf->nCC = XRAN_MAX_SECTOR_NR;
+
+ }
+ if(pConf->ru_conf.iqOrder != XRAN_I_Q_ORDER
+ || pConf->ru_conf.byteOrder != XRAN_NE_BE_BYTE_ORDER ){
+
+ print_err("Byte order and/or IQ order is not supported [IQ %d byte %d]\n", pConf->ru_conf.iqOrder, pConf->ru_conf.byteOrder);
+ return XRAN_STATUS_FAIL;
+ }
+
+ /* setup PRACH configuration for C-Plane */
+ xran_init_prach(pConf, p_xran_dev_ctx);
+ xran_init_srs(pConf, p_xran_dev_ctx);
+
+ xran_cp_init_sectiondb(pHandle);
+ xran_init_sectionid(pHandle);
+ xran_init_seqid(pHandle);
+
+ if(pConf->ru_conf.xran_max_frame) {
+ xran_max_frame = pConf->ru_conf.xran_max_frame;
+ printf("xran_max_frame %d\n", xran_max_frame);
+ }
+
+ interval_us = xran_fs_get_tti_interval(nNumerology);
+
+ if(pConf->log_level){
+ printf("%s: interval_us=%ld\n", __FUNCTION__, interval_us);
+ }
+ timing_set_numerology(nNumerology);
+
+ for(i = 0 ; i <pConf->nCC; i++){
+ xran_fs_set_slot_type(i, pConf->frame_conf.nFrameDuplexType, pConf->frame_conf.nTddPeriod,
+ pConf->frame_conf.sSlotConfig);
+ }
+
+ xran_fs_slot_limit_init(xran_fs_get_tti_interval(nNumerology));
+
+ if(xran_ethdi_get_ctx()->io_cfg.bbdev_mode != XRAN_BBDEV_NOT_USED){
+ p_xran_dev_ctx->bbdev_dec = pConf->bbdev_dec;
+ p_xran_dev_ctx->bbdev_enc = pConf->bbdev_enc;
+ }
+
+ /* if send_xpmbuf2ring needs to be changed from default functions,
+ * then those should be set between xran_init and xran_open */
+ if(p_xran_dev_ctx->send_cpmbuf2ring == NULL)
+ p_xran_dev_ctx->send_cpmbuf2ring = xran_ethdi_mbuf_send_cp;
+ if(p_xran_dev_ctx->send_upmbuf2ring == NULL)
+ p_xran_dev_ctx->send_upmbuf2ring = xran_ethdi_mbuf_send;
+
+ /* Start packet processing thread */
+ if((uint16_t)xran_ethdi_get_ctx()->io_cfg.port[XRAN_UP_VF] != 0xFFFF &&
+ (uint16_t)xran_ethdi_get_ctx()->io_cfg.port[XRAN_CP_VF] != 0xFFFF ){
+ if(pConf->log_level){
+ print_dbg("XRAN_UP_VF: 0x%04x\n", xran_ethdi_get_ctx()->io_cfg.port[XRAN_UP_VF]);
+ print_dbg("XRAN_CP_VF: 0x%04x\n", xran_ethdi_get_ctx()->io_cfg.port[XRAN_CP_VF]);
+ }
+ if (rte_eal_remote_launch(xran_timing_source_thread, xran_dev_get_ctx(), xran_ethdi_get_ctx()->io_cfg.timing_core))
+ rte_panic("thread_run() failed to start\n");
+ } else if(pConf->log_level){
+ printf("Eth port was not open. Processing thread was not started\n");
+ }
+
+ return 0;
+}
+
+int32_t xran_start(void *pHandle)
+{
+ if(xran_get_if_state() == XRAN_RUNNING) {
+ print_err("Already STARTED!!");
+ return (-1);
+ }
+
+ xran_if_current_state = XRAN_RUNNING;
+ return 0;
+}
+
+int32_t xran_stop(void *pHandle)
+{
+ if(xran_get_if_state() == XRAN_STOPPED) {
+ print_err("Already STOPPED!!");
+ return (-1);
+ }
+
+ xran_if_current_state = XRAN_STOPPED;
+ return 0;
+}
+
+int32_t xran_close(void *pHandle)
+{
+ xran_if_current_state = XRAN_STOPPED;
+ //TODO: fix memory leak xran_cp_free_sectiondb(pHandle);
+ //rte_eal_mp_wait_lcore();
+ //xran_ethdi_ports_stats();
+
+#ifdef RTE_LIBRTE_PDUMP
+ /* uninitialize packet capture framework */
+ rte_pdump_uninit();
+#endif
+ return 0;
+}
+
+int32_t xran_mm_destroy (void * pHandle)
+{
+ if(xran_get_if_state() == XRAN_RUNNING) {
+ print_err("Please STOP first !!");
+ return (-1);
+ }
+
+ /* functionality is not yet implemented */
+ return -1;
+}
+
+int32_t xran_reg_sym_cb(void *pHandle, xran_callback_sym_fn symCb, void * symCbParam, uint8_t symb, uint8_t ant)
+{
+ if(xran_get_if_state() == XRAN_RUNNING) {
+ print_err("Cannot register callback while running!!\n");
+ return (-1);
+ }
+
+ /* functionality is not yet implemented */
+ print_err("Functionality is not yet implemented !");
+ return -1;
+}
+
+int32_t xran_reg_physide_cb(void *pHandle, xran_fh_tti_callback_fn Cb, void *cbParam, int skipTtiNum, enum callback_to_phy_id id)
+{
+ struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
+
+ if(xran_get_if_state() == XRAN_RUNNING) {
+ print_err("Cannot register callback while running!!\n");
+ return (-1);
+ }
+
+ p_xran_dev_ctx->ttiCb[id] = Cb;
+ p_xran_dev_ctx->TtiCbParam[id] = cbParam;
+ p_xran_dev_ctx->SkipTti[id] = skipTtiNum;
+
+ return 0;
+}
+
+/* send_cpmbuf2ring and send_upmbuf2ring should be set between xran_init and xran_open
+ * each cb will be set by default duing open if it is set by NULL */
+int xran_register_cb_mbuf2ring(xran_ethdi_mbuf_send_fn mbuf_send_cp, xran_ethdi_mbuf_send_fn mbuf_send_up)
+{
+ struct xran_device_ctx *p_xran_dev_ctx;
+
+ if(xran_get_if_state() == XRAN_RUNNING) {
+ print_err("Cannot register callback while running!!\n");
+ return (-1);
+ }
+
+ p_xran_dev_ctx = xran_dev_get_ctx();
+
+ p_xran_dev_ctx->send_cpmbuf2ring = mbuf_send_cp;
+ p_xran_dev_ctx->send_upmbuf2ring = mbuf_send_up;
+
+ return (0);
+}
+
+
+int32_t xran_get_slot_idx (uint32_t *nFrameIdx, uint32_t *nSubframeIdx, uint32_t *nSlotIdx, uint64_t *nSecond)
+{
+ int32_t tti = 0;
+
+ tti = (int32_t)XranGetTtiNum(xran_lib_ota_sym_idx, XRAN_NUM_OF_SYMBOL_PER_SLOT);
+ *nSlotIdx = (uint32_t)XranGetSlotNum(tti, SLOTNUM_PER_SUBFRAME);
+ *nSubframeIdx = (uint32_t)XranGetSubFrameNum(tti,SLOTNUM_PER_SUBFRAME, SUBFRAMES_PER_SYSTEMFRAME);
+ *nFrameIdx = (uint32_t)XranGetFrameNum(tti,xran_getSfnSecStart(),SUBFRAMES_PER_SYSTEMFRAME, SLOTNUM_PER_SUBFRAME);
+ *nSecond = timing_get_current_second();
+
+ return tti;
+}
+
+
+/**
+ * @brief Get the configuration of eAxC ID
+ *
+ * @return the pointer of configuration
+ */
+inline struct xran_eaxcid_config *xran_get_conf_eAxC(void *pHandle)
+{
+ return (&(xran_dev_get_ctx()->eAxc_id_cfg));
+}
+
+/**
+ * @brief Get the configuration of the total number of beamforming weights on RU
+ *
+ * @return Configured the number of beamforming weights
+ */
+inline uint8_t xran_get_conf_num_bfweights(void *pHandle)
+{
+ return (xran_dev_get_ctx()->fh_init.totalBfWeights);
+}
+
+/**
+ * @brief Get the configuration of subcarrier spacing for PRACH
+ *
+ * @return subcarrier spacing value for PRACH
+ */
+inline uint8_t xran_get_conf_prach_scs(void *pHandle)
+{
+ return (xran_lib_get_ctx_fhcfg()->prach_conf.nPrachSubcSpacing);
+}
+
+/**
+ * @brief Get the configuration of FFT size for RU
+ *
+ * @return FFT size value for RU
+ */
+inline uint8_t xran_get_conf_fftsize(void *pHandle)
+{
+ return (xran_lib_get_ctx_fhcfg()->ru_conf.fftSize);
+}
+
+/**
+ * @brief Get the configuration of nummerology
+ *
+ * @return Configured numerology
+ */
+inline uint8_t xran_get_conf_numerology(void *pHandle)
+{
+ return (xran_lib_get_ctx_fhcfg()->frame_conf.nNumerology);
+}
+
+/**
+ * @brief Get the configuration of IQ bit width for RU
+ *
+ * @return IQ bit width for RU
+ */
+inline uint8_t xran_get_conf_iqwidth(void *pHandle)
+{
+ struct xran_fh_config *pFhCfg;
+
+ pFhCfg = xran_lib_get_ctx_fhcfg();
+ return ((pFhCfg->ru_conf.iqWidth==16)?0:pFhCfg->ru_conf.iqWidth);
+}
+
+/**
+ * @brief Get the configuration of compression method for RU
+ *
+ * @return Compression method for RU
+ */
+inline uint8_t xran_get_conf_compmethod(void *pHandle)
+{
+ return (xran_lib_get_ctx_fhcfg()->ru_conf.compMeth);
+}
+
+
+/**
+ * @brief Get the configuration of the number of component carriers
+ *
+ * @return Configured the number of component carriers
+ */
+inline uint8_t xran_get_num_cc(void *pHandle)
+{
+ return (xran_lib_get_ctx_fhcfg()->nCC);
+}
+
+/**
+ * @brief Get the configuration of the number of antenna for UL
+ *
+ * @return Configured the number of antenna
+ */
+inline uint8_t xran_get_num_eAxc(void *pHandle)
+{
+ return (xran_lib_get_ctx_fhcfg()->neAxc);
+}
+
+/**
+ * @brief Get configuration of O-RU (Cat A or Cat B)
+ *
+ * @return Configured the number of antenna
+ */
+inline enum xran_category xran_get_ru_category(void *pHandle)
+{
+ return (xran_lib_get_ctx_fhcfg()->ru_conf.xranCat);
+}
+
+/**
+ * @brief Get the configuration of the number of antenna
+ *
+ * @return Configured the number of antenna
+ */
+inline uint8_t xran_get_num_eAxcUl(void *pHandle)
+{
+ return (xran_lib_get_ctx_fhcfg()->neAxcUl);
+}
+
+/**
+ * @brief Get the configuration of the number of antenna elements
+ *
+ * @return Configured the number of antenna
+ */
+inline uint8_t xran_get_num_ant_elm(void *pHandle)
+{
+ return (xran_lib_get_ctx_fhcfg()->nAntElmTRx);
+}
+
+int32_t xran_get_common_counters(void *pXranLayerHandle, struct xran_common_counters *pStats)
+{
+ struct xran_device_ctx* pDev = (struct xran_device_ctx*)pXranLayerHandle;
+
+ if(pStats && pDev) {
+ *pStats = pDev->fh_counters;
+ return XRAN_STATUS_SUCCESS;
+ } else {
+ return XRAN_STATUS_INVALID_PARAM;
+ }
+}
+
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/**\r
- * @brief Modules provide debug prints and utility functions\r
- * @file xran_printf.h\r
- * @ingroup group_source_xran\r
- * @author Intel Corporation\r
- **/\r
-\r
-#ifndef XRAN_PRINTF_H\r
-#define XRAN_PRINTF_H\r
-\r
-#ifdef __cplusplus\r
-extern "C" {\r
-#endif\r
-#include <stdio.h>\r
-#include <stdlib.h>\r
-\r
-#define PRINTF_LOG_OK\r
-#define PRINTF_INF_OK\r
-#define PRINTF_ERR_OK\r
-//#define PRINTF_DBG_OK\r
-\r
-#ifndef WIN32\r
-#ifdef PRINTF_LOG_OK\r
-#define print_log(fmt, args...) printf("%s:" fmt "\n", __FUNCTION__, ## args)\r
-#else /* PRINTF_LOG_OK */\r
-#define print_log(fmt, args...)\r
-#endif /* PRINTF_LOG_OK */\r
-#else\r
-#define print_log(fmt, ...) printf("%s:" fmt "\n", __FUNCTION__, __VA_ARGS__)\r
-#endif\r
-\r
-#ifndef WIN32\r
-#ifdef PRINTF_DBG_OK\r
-#define print_dbg(fmt, args...) printf("%s:[dbg] " fmt "\n", __FUNCTION__, ## args)\r
-#else /* PRINTF_LOG_OK */\r
-#define print_dbg(fmt, args...)\r
-#endif /* PRINTF_LOG_OK */\r
-#else\r
-#define print_dbg(fmt, ...) printf("%s:[dbg] " fmt "\n", __FUNCTION__, __VA_ARGS__)\r
-#endif\r
-\r
-#ifndef WIN32\r
-#ifdef PRINTF_ERR_OK\r
-#define print_err(fmt, args...) printf("%s:[err] " fmt "\n", __FUNCTION__, ## args)\r
-#else /* PRINTF_LOG_OK */\r
-#define print_err(fmt, args...)\r
-#endif /* PRINTF_LOG_OK */\r
-#else\r
-#define print_err(fmt, ...) printf("%s:[err] " fmt "\n", __FUNCTION__, __VA_ARGS__)\r
-#endif\r
-\r
-#ifndef WIN32\r
-#ifdef PRINTF_INF_OK\r
-#define print_inf printf\r
-#else /* PRINTF_LOG_OK */\r
-#define print_inf\r
-#endif /* PRINTF_LOG_OK */\r
-#else\r
-#define print_inf printf\r
-#endif\r
-\r
-#ifdef __cplusplus\r
-}\r
-#endif\r
-\r
-#ifndef _IASSERT_\r
-#define _IASSERT_\r
-\r
-#ifdef _DEBUG\r
-#define iAssert(p) if(!(p)){fprintf(stderr,\\r
- "Assertion failed: %s, file %s, line %d, val %d\n",\\r
- #p, __FILE__, __LINE__, p);exit(-1);}\r
-#else /* _DEBUG */\r
-#define iAssert(p)\r
-#endif /* _DEBUG */\r
-\r
-#ifndef PHY_APP\r
-#ifndef _assert\r
-#define _assert(x)\r
-#endif\r
-#endif\r
-\r
-#endif /* _IASSERT_*/\r
-\r
-#ifdef CHECK_PARAMS\r
-#define CHECK_NOT_NULL(param, returnValue) \\r
-if (param == NULL) \\r
-{ \\r
- print_err("%s is NULL!\n", #param); \\r
- return returnValue; \\r
-}\r
-#else\r
-#define CHECK_NOT_NULL(param, returnValue)\r
-#endif\r
-\r
-#ifdef __cplusplus\r
-}\r
-#endif\r
-\r
-#endif // PHY_PRINTF_H\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief Modules provide debug prints and utility functions
+ * @file xran_printf.h
+ * @ingroup group_source_xran
+ * @author Intel Corporation
+ **/
+
+#ifndef XRAN_PRINTF_H
+#define XRAN_PRINTF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+#include <stdio.h>
+#include <stdlib.h>
+
+#define PRINTF_LOG_OK
+#define PRINTF_INF_OK
+#define PRINTF_ERR_OK
+//#define PRINTF_DBG_OK
+
+#ifndef WIN32
+#ifdef PRINTF_LOG_OK
+#define print_log(fmt, args...) printf("%s:" fmt "\n", __FUNCTION__, ## args)
+#else /* PRINTF_LOG_OK */
+#define print_log(fmt, args...)
+#endif /* PRINTF_LOG_OK */
+#else
+#define print_log(fmt, ...) printf("%s:" fmt "\n", __FUNCTION__, __VA_ARGS__)
+#endif
+
+#ifndef WIN32
+#ifdef PRINTF_DBG_OK
+#define print_dbg(fmt, args...) printf("%s:[dbg] " fmt "\n", __FUNCTION__, ## args)
+#else /* PRINTF_LOG_OK */
+#define print_dbg(fmt, args...)
+#endif /* PRINTF_LOG_OK */
+#else
+#define print_dbg(fmt, ...) printf("%s:[dbg] " fmt "\n", __FUNCTION__, __VA_ARGS__)
+#endif
+
+#ifndef WIN32
+#ifdef PRINTF_ERR_OK
+#define print_err(fmt, args...) printf("%s:[err] " fmt "\n", __FUNCTION__, ## args)
+#else /* PRINTF_LOG_OK */
+#define print_err(fmt, args...)
+#endif /* PRINTF_LOG_OK */
+#else
+#define print_err(fmt, ...) printf("%s:[err] " fmt "\n", __FUNCTION__, __VA_ARGS__)
+#endif
+
+#ifndef WIN32
+#ifdef PRINTF_INF_OK
+#define print_inf printf
+#else /* PRINTF_LOG_OK */
+#define print_inf
+#endif /* PRINTF_LOG_OK */
+#else
+#define print_inf printf
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#ifndef _IASSERT_
+#define _IASSERT_
+
+#ifdef _DEBUG
+#define iAssert(p) if(!(p)){fprintf(stderr,\
+ "Assertion failed: %s, file %s, line %d, val %d\n",\
+ #p, __FILE__, __LINE__, p);exit(-1);}
+#else /* _DEBUG */
+#define iAssert(p)
+#endif /* _DEBUG */
+
+#ifndef PHY_APP
+#ifndef _assert
+#define _assert(x)
+#endif
+#endif
+
+#endif /* _IASSERT_*/
+
+#ifdef CHECK_PARAMS
+#define CHECK_NOT_NULL(param, returnValue) \
+if (param == NULL) \
+{ \
+ print_err("%s is NULL!\n", #param); \
+ return returnValue; \
+}
+#else
+#define CHECK_NOT_NULL(param, returnValue)
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // PHY_PRINTF_H
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-/**\r
- * @brief This file provides implementation of synchronization related APIs (PTP/1588)\r
- * for XRAN.\r
- *\r
- * @file xran_sync_api.c\r
- * @ingroup group_lte_source_xran\r
- * @author Intel Corporation\r
- *\r
- **/\r
-\r
-#include <assert.h>\r
-#include <dirent.h>\r
-#include <stdio.h>\r
-#include <stdlib.h>\r
-#include <string.h>\r
-\r
-#include "xran_sync_api.h"\r
-#include "xran_printf.h"\r
-\r
-#define BUF_LEN 256\r
-#define PROC_DIR "/proc"\r
-#define COMM_FILE "comm"\r
-#define PMC_CMD "pmc -u -b 0 'GET PORT_DATA_SET'"\r
-#define PTP4L_PROC_NAME "ptp4l"\r
-#define PHC2SYS_PROC_NAME "phc2sys"\r
-\r
-static int find_substr(const char *str, const unsigned int str_len,\r
- const char *substr, const unsigned int substr_len)\r
-{\r
- assert(str);\r
- assert(substr);\r
- unsigned int ind = 0;\r
-\r
- while (ind + substr_len <= str_len) {\r
- if (0 == strncmp(&str[ind], substr, substr_len))\r
- return 0;\r
- ++ind;\r
- }\r
- return 1;\r
-}\r
-\r
-static int is_process_running(char *pname)\r
-{\r
- char full_path[BUF_LEN] = {0};\r
- char read_proc_name[BUF_LEN] = {0};\r
- int res = 1;\r
- DIR *dir = opendir(PROC_DIR);\r
- if (NULL == dir) {\r
- return 1;\r
- }\r
-\r
- struct dirent *entry = NULL;\r
- while (entry = readdir(dir)) {\r
- long pid = atol(entry->d_name);\r
- if (0 == pid)\r
- continue;\r
- snprintf(full_path, sizeof(full_path), "%s/%ld/%s", PROC_DIR, pid, COMM_FILE);\r
- FILE *proc_name_file = fopen(full_path, "r");\r
- if (NULL == proc_name_file)\r
- continue;\r
- fgets( read_proc_name, BUF_LEN, proc_name_file);\r
- if (0 == strncmp(read_proc_name, pname, strlen(pname))) {\r
- res = 0;\r
- fclose(proc_name_file);\r
- break;\r
- }\r
- fclose(proc_name_file);\r
- }\r
- closedir(dir);\r
- return res;\r
-}\r
-\r
-static int check_ptp_status()\r
-{\r
- char pmc_out_line[BUF_LEN];\r
- const char *keywords[2] = {"portState", "SLAVE"};\r
- int res = 1;\r
- FILE *pmc_pipe = popen(PMC_CMD, "r");\r
- if (NULL == pmc_pipe)\r
- return 1;\r
-\r
- while(fgets(pmc_out_line, BUF_LEN, pmc_pipe)) {\r
- if (0 == find_substr(pmc_out_line, strlen(pmc_out_line), keywords[0],\r
- strlen(keywords[0]))) {\r
- if (0 == find_substr(pmc_out_line, strlen(pmc_out_line),\r
- keywords[1], strlen(keywords[1]))) {\r
- res = 0;\r
- break;\r
- }\r
- }\r
- }\r
- fclose(pmc_pipe);\r
- return res;\r
-}\r
-\r
-int xran_is_synchronized()\r
-{\r
- int res = 0;\r
- res |= is_process_running(PTP4L_PROC_NAME);\r
- print_dbg("PTP4L_PROC_NAME %d\n", res);\r
- res |= is_process_running(PHC2SYS_PROC_NAME);\r
- print_dbg("PHC2SYS_PROC_NAME %d\n", res);\r
- res |= check_ptp_status();\r
- print_dbg("check_ptp_status %d\n", res);\r
- return res;\r
-}\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+/**
+ * @brief This file provides implementation of synchronization related APIs (PTP/1588)
+ * for XRAN.
+ *
+ * @file xran_sync_api.c
+ * @ingroup group_lte_source_xran
+ * @author Intel Corporation
+ *
+ **/
+
+#include <assert.h>
+#include <dirent.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include "xran_sync_api.h"
+#include "xran_printf.h"
+
+#define BUF_LEN 256
+#define PROC_DIR "/proc"
+#define COMM_FILE "comm"
+#define PMC_CMD "pmc -u -b 0 'GET PORT_DATA_SET'"
+#define PTP4L_PROC_NAME "ptp4l"
+#define PHC2SYS_PROC_NAME "phc2sys"
+
+static int find_substr(const char *str, const unsigned int str_len,
+ const char *substr, const unsigned int substr_len)
+{
+ assert(str);
+ assert(substr);
+ unsigned int ind = 0;
+
+ while (ind + substr_len <= str_len) {
+ if (0 == strncmp(&str[ind], substr, substr_len))
+ return 0;
+ ++ind;
+ }
+ return 1;
+}
+
+static int is_process_running(char *pname)
+{
+ char full_path[BUF_LEN] = {0};
+ char read_proc_name[BUF_LEN] = {0};
+ int res = 1;
+ DIR *dir = opendir(PROC_DIR);
+ if (NULL == dir) {
+ return 1;
+ }
+
+ struct dirent *entry = NULL;
+ while (entry = readdir(dir)) {
+ long pid = atol(entry->d_name);
+ if (0 == pid)
+ continue;
+ snprintf(full_path, sizeof(full_path), "%s/%ld/%s", PROC_DIR, pid, COMM_FILE);
+ FILE *proc_name_file = fopen(full_path, "r");
+ if (NULL == proc_name_file)
+ continue;
+ fgets( read_proc_name, BUF_LEN, proc_name_file);
+ if (0 == strncmp(read_proc_name, pname, strlen(pname))) {
+ res = 0;
+ fclose(proc_name_file);
+ break;
+ }
+ fclose(proc_name_file);
+ }
+ closedir(dir);
+ return res;
+}
+
+static int check_ptp_status()
+{
+ char pmc_out_line[BUF_LEN];
+ const char *keywords[2] = {"portState", "SLAVE"};
+ int res = 1;
+ FILE *pmc_pipe = popen(PMC_CMD, "r");
+ if (NULL == pmc_pipe)
+ return 1;
+
+ while(fgets(pmc_out_line, BUF_LEN, pmc_pipe)) {
+ if (0 == find_substr(pmc_out_line, strlen(pmc_out_line), keywords[0],
+ strlen(keywords[0]))) {
+ if (0 == find_substr(pmc_out_line, strlen(pmc_out_line),
+ keywords[1], strlen(keywords[1]))) {
+ res = 0;
+ break;
+ }
+ }
+ }
+ fclose(pmc_pipe);
+ return res;
+}
+
+int xran_is_synchronized()
+{
+ int res = 0;
+ res |= is_process_running(PTP4L_PROC_NAME);
+ print_dbg("PTP4L_PROC_NAME %d\n", res);
+ res |= is_process_running(PHC2SYS_PROC_NAME);
+ print_dbg("PHC2SYS_PROC_NAME %d\n", res);
+ res |= check_ptp_status();
+ print_dbg("check_ptp_status %d\n", res);
+ return res;
+}
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/**\r
- * @brief This file provides implementation to Timing for XRAN.\r
- *\r
- * @file xran_timer.c\r
- * @ingroup group_lte_source_xran\r
- * @author Intel Corporation\r
- *\r
- **/\r
-\r
-#include <time.h>\r
-#include <stdio.h>\r
-#include <stdlib.h>\r
-#include <stdint.h>\r
-\r
-#include "xran_timer.h"\r
-#include "xran_printf.h"\r
-#include "xran_mlog_lnx.h"\r
-#include "xran_lib_mlog_tasks_id.h"\r
-#include "ethdi.h"\r
-#include "xran_fh_o_du.h"\r
-#include "xran_common.h"\r
-\r
-#define NSEC_PER_SEC 1000000000L\r
-#define NSEC_PER_USEC 1000L\r
-#define THRESHOLD 35 /**< the avg cost of clock_gettime() in ns */\r
-#define TIMECOMPENSATION 2 /**< time compensation in us, avg latency of clock_nanosleep */\r
-\r
-#define SEC_MOD_STOP (60)\r
-\r
-static struct timespec started_time;\r
-static struct timespec last_time;\r
-static struct timespec cur_time;\r
-\r
-static uint64_t curr_tick;\r
-static uint64_t last_tick;\r
-\r
-static struct timespec* p_cur_time = &cur_time;\r
-static struct timespec* p_last_time = &last_time;\r
-\r
-\r
-static struct timespec* p_temp_time;\r
-\r
-static unsigned long current_second = 0;\r
-static unsigned long started_second = 0;\r
-static uint8_t numerlogy = 0;\r
-extern uint32_t xran_lib_ota_sym;\r
-extern uint32_t xran_lib_ota_tti;\r
-extern uint32_t xran_lib_ota_sym_idx;\r
-\r
-static int debugStop = 0;\r
-static int debugStopCount = 0;\r
-\r
-static long fine_tuning[5][2] =\r
-{\r
- {71428L, 71429L}, /* mu = 0 */\r
- {35714L, 35715L}, /* mu = 1 */\r
- {0, 0}, /* mu = 2 not supported */\r
- {8928L, 8929L}, /* mu = 3 */\r
- {0,0 } /* mu = 4 not supported */\r
-};\r
-\r
-static uint8_t slots_per_subframe[4] =\r
-{\r
- 1, /* mu = 0 */\r
- 2, /* mu = 1 */\r
- 4, /* mu = 2 */\r
- 8, /* mu = 3 */\r
-};\r
-\r
-uint64_t timing_get_current_second(void)\r
-{\r
- return current_second;\r
-}\r
-\r
-int timing_set_numerology(uint8_t value)\r
-{\r
- numerlogy = value;\r
- return numerlogy;\r
-}\r
-\r
-int timing_set_debug_stop(int value, int count)\r
-{\r
- debugStop = value;\r
- debugStopCount = count;\r
-\r
- if(debugStop){\r
- clock_gettime(CLOCK_REALTIME, &started_time);\r
- started_second =started_time.tv_sec;\r
- }\r
- return debugStop;\r
-}\r
-\r
-int timing_get_debug_stop(void)\r
-{\r
- return debugStop;\r
-}\r
-\r
-void timing_adjust_gps_second(struct timespec* p_time)\r
-{\r
- struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();\r
-\r
- long nsec = p_time->tv_nsec + p_xran_dev_ctx->offset_nsec;\r
- p_time->tv_sec += p_xran_dev_ctx->offset_sec;\r
- if (nsec >= 1e9)\r
- {\r
- nsec -=1e9;\r
- p_time->tv_sec += 1;\r
- }\r
- p_time->tv_nsec = nsec;\r
-\r
- return;\r
-}\r
-uint64_t xran_tick(void)\r
-{\r
- uint32_t hi, lo;\r
- __asm volatile ("rdtsc" : "=a"(lo), "=d"(hi));\r
- return ( (uint64_t)lo)|( ((uint64_t)hi)<<32 );\r
-}\r
-\r
-unsigned long get_ticks_diff(unsigned long curr_tick, unsigned long last_tick)\r
-{\r
- if (curr_tick >= last_tick)\r
- return (unsigned long)(curr_tick - last_tick);\r
- else\r
- return (unsigned long)(0xFFFFFFFFFFFFFFFF - last_tick + curr_tick);\r
-}\r
-\r
-long poll_next_tick(long interval_ns, unsigned long *used_tick)\r
-{\r
- struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();\r
- long target_time;\r
- long delta;\r
- static int counter = 0;\r
- static long sym_acc = 0;\r
- static long sym_cnt = 0;\r
-\r
- if(counter == 0) {\r
- clock_gettime(CLOCK_REALTIME, p_last_time);\r
- last_tick = MLogTick();\r
- if(unlikely(p_xran_dev_ctx->offset_sec || p_xran_dev_ctx->offset_nsec))\r
- timing_adjust_gps_second(p_last_time);\r
- current_second = p_last_time->tv_sec;\r
- counter = 1;\r
- }\r
-\r
- target_time = (p_last_time->tv_sec * NSEC_PER_SEC + p_last_time->tv_nsec + interval_ns);\r
-\r
- while(1) {\r
- clock_gettime(CLOCK_REALTIME, p_cur_time);\r
- curr_tick = MLogTick();\r
- if(unlikely(p_xran_dev_ctx->offset_sec || p_xran_dev_ctx->offset_nsec))\r
- timing_adjust_gps_second(p_cur_time);\r
- delta = (p_cur_time->tv_sec * NSEC_PER_SEC + p_cur_time->tv_nsec) - target_time;\r
- if(delta > 0 || (delta < 0 && abs(delta) < THRESHOLD)) {\r
- if (debugStop &&(debugStopCount > 0) && (tx_counter >= debugStopCount)){\r
- uint64_t t1;\r
- printf("STOP:[%ld.%09ld], debugStopCount %d, tx_counter %ld\n", p_cur_time->tv_sec, p_cur_time->tv_nsec, debugStopCount, tx_counter);\r
- t1 = MLogTick();\r
- rte_pause();\r
- MLogTask(PID_TIME_SYSTIME_STOP, t1, MLogTick());\r
- xran_if_current_state = XRAN_STOPPED;\r
- }\r
- if(current_second != p_cur_time->tv_sec){\r
- current_second = p_cur_time->tv_sec;\r
- xran_updateSfnSecStart();\r
- xran_lib_ota_sym_idx = 0;\r
- xran_lib_ota_tti = 0;\r
- xran_lib_ota_sym = 0;\r
- sym_cnt = 0;\r
- sym_acc = 0;\r
- print_dbg("ToS:C Sync timestamp: [%ld.%09ld]\n", p_cur_time->tv_sec, p_cur_time->tv_nsec);\r
- if(debugStop){\r
- if(p_cur_time->tv_sec > started_second && ((p_cur_time->tv_sec % SEC_MOD_STOP) == 0)){\r
- uint64_t t1;\r
- printf("STOP:[%ld.%09ld]\n", p_cur_time->tv_sec, p_cur_time->tv_nsec);\r
- t1 = MLogTick();\r
- rte_pause();\r
- MLogTask(PID_TIME_SYSTIME_STOP, t1, MLogTick());\r
- xran_if_current_state = XRAN_STOPPED;\r
- }\r
- }\r
- p_cur_time->tv_nsec = 0; // adjust to 1pps\r
- } else {\r
- xran_lib_ota_sym_idx = XranIncrementSymIdx(xran_lib_ota_sym_idx, XRAN_NUM_OF_SYMBOL_PER_SLOT*slots_per_subframe[numerlogy]);\r
- /* adjust to sym boundary */\r
- if(sym_cnt & 1)\r
- sym_acc += fine_tuning[numerlogy][0];\r
- else\r
- sym_acc += fine_tuning[numerlogy][1];\r
- /* fine tune to second boundary */\r
- if(sym_cnt % 13 == 0)\r
- sym_acc += 1;\r
-\r
- p_cur_time->tv_nsec = sym_acc;\r
- sym_cnt++;\r
- }\r
-\r
-#ifdef USE_PTP_TIME\r
- if(debugStop && delta < interval_ns*10)\r
- MLogTask(PID_TIME_SYSTIME_POLL, (p_last_time->tv_sec * NSEC_PER_SEC + p_last_time->tv_nsec), (p_cur_time->tv_sec * NSEC_PER_SEC + p_cur_time->tv_nsec));\r
-#else\r
- MLogTask(PID_TIME_SYSTIME_POLL, last_tick, curr_tick);\r
- last_tick = curr_tick;\r
-#endif\r
-\r
-\r
- p_temp_time = p_last_time;\r
- p_last_time = p_cur_time;\r
- p_cur_time = p_temp_time;\r
- break;\r
- } else {\r
- if( likely(xran_if_current_state == XRAN_RUNNING)){\r
- uint64_t t1, t2;\r
- t1 = xran_tick();\r
-\r
- ring_processing_func();\r
- process_dpdk_io();\r
-\r
- t2 = xran_tick();\r
- *used_tick += get_ticks_diff(t2, t1);\r
- }\r
- }\r
- }\r
-\r
- return delta;\r
-}\r
-\r
-long sleep_next_tick(long interval)\r
-{\r
- struct timespec start_time;\r
- struct timespec cur_time;\r
- //struct timespec target_time_convert;\r
- struct timespec sleep_target_time_convert;\r
- long target_time;\r
- long sleep_target_time;\r
- long delta;\r
-\r
- clock_gettime(CLOCK_REALTIME, &start_time);\r
- target_time = (start_time.tv_sec * NSEC_PER_SEC + start_time.tv_nsec + interval * NSEC_PER_USEC) / (interval * NSEC_PER_USEC) * interval;\r
- //printf("target: %ld, current: %ld, %ld\n", target_time, start_time.tv_sec, start_time.tv_nsec);\r
- sleep_target_time = target_time - TIMECOMPENSATION;\r
- sleep_target_time_convert.tv_sec = sleep_target_time * NSEC_PER_USEC / NSEC_PER_SEC;\r
- sleep_target_time_convert.tv_nsec = (sleep_target_time * NSEC_PER_USEC) % NSEC_PER_SEC;\r
-\r
- //target_time_convert.tv_sec = target_time * NSEC_PER_USEC / NSEC_PER_SEC;\r
- //target_time_convert.tv_nsec = (target_time * NSEC_PER_USEC) % NSEC_PER_SEC;\r
-\r
- clock_nanosleep(CLOCK_REALTIME, TIMER_ABSTIME, &sleep_target_time_convert, NULL);\r
-\r
- clock_gettime(CLOCK_REALTIME, &cur_time);\r
-\r
- delta = (cur_time.tv_sec * NSEC_PER_SEC + cur_time.tv_nsec) - target_time * NSEC_PER_USEC;\r
-\r
- return delta;\r
-}\r
-\r
-\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief This file provides implementation to Timing for XRAN.
+ *
+ * @file xran_timer.c
+ * @ingroup group_lte_source_xran
+ * @author Intel Corporation
+ *
+ **/
+
+#include <time.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+
+#include "xran_timer.h"
+#include "xran_printf.h"
+#include "xran_mlog_lnx.h"
+#include "xran_lib_mlog_tasks_id.h"
+#include "ethdi.h"
+#include "xran_fh_o_du.h"
+#include "xran_common.h"
+
+#define NSEC_PER_SEC 1000000000L
+#define NSEC_PER_USEC 1000L
+#define THRESHOLD 35 /**< the avg cost of clock_gettime() in ns */
+#define TIMECOMPENSATION 2 /**< time compensation in us, avg latency of clock_nanosleep */
+
+#define SEC_MOD_STOP (60)
+
+static struct timespec started_time;
+static struct timespec last_time;
+static struct timespec cur_time;
+
+static uint64_t curr_tick;
+static uint64_t last_tick;
+
+static struct timespec* p_cur_time = &cur_time;
+static struct timespec* p_last_time = &last_time;
+
+
+static struct timespec* p_temp_time;
+
+static unsigned long current_second = 0;
+static unsigned long started_second = 0;
+static uint8_t numerlogy = 0;
+extern uint32_t xran_lib_ota_sym;
+extern uint32_t xran_lib_ota_tti;
+extern uint32_t xran_lib_ota_sym_idx;
+
+static int debugStop = 0;
+static int debugStopCount = 0;
+
+static long fine_tuning[5][2] =
+{
+ {71428L, 71429L}, /* mu = 0 */
+ {35714L, 35715L}, /* mu = 1 */
+ {0, 0}, /* mu = 2 not supported */
+ {8928L, 8929L}, /* mu = 3 */
+ {0,0 } /* mu = 4 not supported */
+};
+
+static uint8_t slots_per_subframe[4] =
+{
+ 1, /* mu = 0 */
+ 2, /* mu = 1 */
+ 4, /* mu = 2 */
+ 8, /* mu = 3 */
+};
+
+uint64_t timing_get_current_second(void)
+{
+ return current_second;
+}
+
+int timing_set_numerology(uint8_t value)
+{
+ numerlogy = value;
+ return numerlogy;
+}
+
+int timing_set_debug_stop(int value, int count)
+{
+ debugStop = value;
+ debugStopCount = count;
+
+ if(debugStop){
+ clock_gettime(CLOCK_REALTIME, &started_time);
+ started_second =started_time.tv_sec;
+ }
+ return debugStop;
+}
+
+int timing_get_debug_stop(void)
+{
+ return debugStop;
+}
+
+void timing_adjust_gps_second(struct timespec* p_time)
+{
+ struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
+
+ long nsec = p_time->tv_nsec + p_xran_dev_ctx->offset_nsec;
+ p_time->tv_sec += p_xran_dev_ctx->offset_sec;
+ if (nsec >= 1e9)
+ {
+ nsec -=1e9;
+ p_time->tv_sec += 1;
+ }
+ p_time->tv_nsec = nsec;
+
+ return;
+}
+uint64_t xran_tick(void)
+{
+ uint32_t hi, lo;
+ __asm volatile ("rdtsc" : "=a"(lo), "=d"(hi));
+ return ( (uint64_t)lo)|( ((uint64_t)hi)<<32 );
+}
+
+unsigned long get_ticks_diff(unsigned long curr_tick, unsigned long last_tick)
+{
+ if (curr_tick >= last_tick)
+ return (unsigned long)(curr_tick - last_tick);
+ else
+ return (unsigned long)(0xFFFFFFFFFFFFFFFF - last_tick + curr_tick);
+}
+
+long poll_next_tick(long interval_ns, unsigned long *used_tick)
+{
+ struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
+ long target_time;
+ long delta;
+ static int counter = 0;
+ static long sym_acc = 0;
+ static long sym_cnt = 0;
+
+ if(counter == 0) {
+ clock_gettime(CLOCK_REALTIME, p_last_time);
+ last_tick = MLogTick();
+ if(unlikely(p_xran_dev_ctx->offset_sec || p_xran_dev_ctx->offset_nsec))
+ timing_adjust_gps_second(p_last_time);
+ current_second = p_last_time->tv_sec;
+ counter = 1;
+ }
+
+ target_time = (p_last_time->tv_sec * NSEC_PER_SEC + p_last_time->tv_nsec + interval_ns);
+
+ while(1) {
+ clock_gettime(CLOCK_REALTIME, p_cur_time);
+ curr_tick = MLogTick();
+ if(unlikely(p_xran_dev_ctx->offset_sec || p_xran_dev_ctx->offset_nsec))
+ timing_adjust_gps_second(p_cur_time);
+ delta = (p_cur_time->tv_sec * NSEC_PER_SEC + p_cur_time->tv_nsec) - target_time;
+ if(delta > 0 || (delta < 0 && abs(delta) < THRESHOLD)) {
+ if (debugStop &&(debugStopCount > 0) && (tx_counter >= debugStopCount)){
+ uint64_t t1;
+ printf("STOP:[%ld.%09ld], debugStopCount %d, tx_counter %ld\n", p_cur_time->tv_sec, p_cur_time->tv_nsec, debugStopCount, tx_counter);
+ t1 = MLogTick();
+ rte_pause();
+ MLogTask(PID_TIME_SYSTIME_STOP, t1, MLogTick());
+ xran_if_current_state = XRAN_STOPPED;
+ }
+ if(current_second != p_cur_time->tv_sec){
+ current_second = p_cur_time->tv_sec;
+ xran_updateSfnSecStart();
+ xran_lib_ota_sym_idx = 0;
+ xran_lib_ota_tti = 0;
+ xran_lib_ota_sym = 0;
+ sym_cnt = 0;
+ sym_acc = 0;
+ print_dbg("ToS:C Sync timestamp: [%ld.%09ld]\n", p_cur_time->tv_sec, p_cur_time->tv_nsec);
+ if(debugStop){
+ if(p_cur_time->tv_sec > started_second && ((p_cur_time->tv_sec % SEC_MOD_STOP) == 0)){
+ uint64_t t1;
+ printf("STOP:[%ld.%09ld]\n", p_cur_time->tv_sec, p_cur_time->tv_nsec);
+ t1 = MLogTick();
+ rte_pause();
+ MLogTask(PID_TIME_SYSTIME_STOP, t1, MLogTick());
+ xran_if_current_state = XRAN_STOPPED;
+ }
+ }
+ p_cur_time->tv_nsec = 0; // adjust to 1pps
+ } else {
+ xran_lib_ota_sym_idx = XranIncrementSymIdx(xran_lib_ota_sym_idx, XRAN_NUM_OF_SYMBOL_PER_SLOT*slots_per_subframe[numerlogy]);
+ /* adjust to sym boundary */
+ if(sym_cnt & 1)
+ sym_acc += fine_tuning[numerlogy][0];
+ else
+ sym_acc += fine_tuning[numerlogy][1];
+ /* fine tune to second boundary */
+ if(sym_cnt % 13 == 0)
+ sym_acc += 1;
+
+ p_cur_time->tv_nsec = sym_acc;
+ sym_cnt++;
+ }
+
+#ifdef USE_PTP_TIME
+ if(debugStop && delta < interval_ns*10)
+ MLogTask(PID_TIME_SYSTIME_POLL, (p_last_time->tv_sec * NSEC_PER_SEC + p_last_time->tv_nsec), (p_cur_time->tv_sec * NSEC_PER_SEC + p_cur_time->tv_nsec));
+#else
+ MLogTask(PID_TIME_SYSTIME_POLL, last_tick, curr_tick);
+ last_tick = curr_tick;
+#endif
+
+
+ p_temp_time = p_last_time;
+ p_last_time = p_cur_time;
+ p_cur_time = p_temp_time;
+ break;
+ } else {
+ if( likely(xran_if_current_state == XRAN_RUNNING)){
+ uint64_t t1, t2;
+ t1 = xran_tick();
+
+ ring_processing_func();
+ process_dpdk_io();
+
+ t2 = xran_tick();
+ *used_tick += get_ticks_diff(t2, t1);
+ }
+ }
+ }
+
+ return delta;
+}
+
+long sleep_next_tick(long interval)
+{
+ struct timespec start_time;
+ struct timespec cur_time;
+ //struct timespec target_time_convert;
+ struct timespec sleep_target_time_convert;
+ long target_time;
+ long sleep_target_time;
+ long delta;
+
+ clock_gettime(CLOCK_REALTIME, &start_time);
+ target_time = (start_time.tv_sec * NSEC_PER_SEC + start_time.tv_nsec + interval * NSEC_PER_USEC) / (interval * NSEC_PER_USEC) * interval;
+ //printf("target: %ld, current: %ld, %ld\n", target_time, start_time.tv_sec, start_time.tv_nsec);
+ sleep_target_time = target_time - TIMECOMPENSATION;
+ sleep_target_time_convert.tv_sec = sleep_target_time * NSEC_PER_USEC / NSEC_PER_SEC;
+ sleep_target_time_convert.tv_nsec = (sleep_target_time * NSEC_PER_USEC) % NSEC_PER_SEC;
+
+ //target_time_convert.tv_sec = target_time * NSEC_PER_USEC / NSEC_PER_SEC;
+ //target_time_convert.tv_nsec = (target_time * NSEC_PER_USEC) % NSEC_PER_SEC;
+
+ clock_nanosleep(CLOCK_REALTIME, TIMER_ABSTIME, &sleep_target_time_convert, NULL);
+
+ clock_gettime(CLOCK_REALTIME, &cur_time);
+
+ delta = (cur_time.tv_sec * NSEC_PER_SEC + cur_time.tv_nsec) - target_time * NSEC_PER_USEC;
+
+ return delta;
+}
+
+
+
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/**\r
- * @brief This file provides the implementation for Transport lyaer (eCPRI) API.\r
- *\r
- * @file xran_transport.c\r
- * @ingroup group_lte_source_xran\r
- * @author Intel Corporation\r
- *\r
- **/\r
-\r
-#include <stdint.h>\r
-#include <endian.h>\r
-#include <rte_common.h>\r
-#include <rte_config.h>\r
-\r
-#include "xran_fh_o_du.h"\r
-#include "xran_common.h"\r
-#include "xran_transport.h"\r
-#include "xran_pkt_cp.h"\r
-#include "xran_cp_api.h"\r
-#include "xran_up_api.h"\r
-#include "xran_printf.h"\r
-\r
-\r
-/**\r
- * @brief return eCPRI header size without eCPRI common header\r
- *\r
- * @ingroup xran\r
- *\r
- * @return the size of eCPRI header without common header\r
- */\r
-int xran_get_ecpri_hdr_size(void)\r
-{\r
- return(sizeof(struct xran_ecpri_hdr) - sizeof(struct xran_ecpri_cmn_hdr));\r
-}\r
-\r
-/**\r
- * @brief Compose ecpriRtcid/ecpriPcid\r
- *\r
- * @ingroup xran\r
- *\r
- * @param CU_Port_ID CU Port ID\r
- * @param BanbSector_ID Band Sector ID\r
- * @param CC_ID Component Carrier ID\r
- * @param Ant_ID RU Port ID (antenna ID)\r
- * @return uint16_t composed ecpriRtcid/ecpriPcid (network byte order)\r
- */\r
-uint16_t xran_compose_cid(uint8_t CU_Port_ID, uint8_t BandSector_ID, uint8_t CC_ID, uint8_t Ant_ID)\r
-{\r
- uint16_t cid;\r
- struct xran_eaxcid_config *conf;\r
-\r
- conf = xran_get_conf_eAxC(NULL);\r
-\r
- cid = ((CU_Port_ID << conf->bit_cuPortId) & conf->mask_cuPortId)\r
- | ((BandSector_ID << conf->bit_bandSectorId) & conf->mask_bandSectorId)\r
- | ((CC_ID << conf->bit_ccId) & conf->mask_ccId)\r
- | ((Ant_ID << conf->bit_ruPortId) & conf->mask_ruPortId);\r
-\r
- return (rte_cpu_to_be_16(cid));\r
-}\r
-\r
-/**\r
- * @brief Decompose ecpriRtcid/ecpriPcid\r
- *\r
- * @ingroup xran\r
- *\r
- * @param cid composed ecpriRtcid/ecpriPcid (network byte order)\r
- * @param result the pointer of the structure to store decomposed values\r
- * @return none\r
- */\r
-void xran_decompose_cid(uint16_t cid, struct xran_eaxc_info *result)\r
-{\r
- struct xran_eaxcid_config *conf;\r
-\r
- conf = xran_get_conf_eAxC(NULL);\r
- cid = rte_be_to_cpu_16(cid);\r
-\r
- result->cuPortId = (cid&conf->mask_cuPortId) >> conf->bit_cuPortId;\r
- result->bandSectorId = (cid&conf->mask_bandSectorId) >> conf->bit_bandSectorId;\r
- result->ccId = (cid&conf->mask_ccId) >> conf->bit_ccId;\r
- result->ruPortId = (cid&conf->mask_ruPortId) >> conf->bit_ruPortId;\r
-\r
- return;\r
-}\r
-\r
-/**\r
- * @brief modify the payload size of eCPRI header in xRAN packet\r
- *\r
- * @ingroup xran\r
- *\r
- * @param mbuf Initialized rte_mbuf packet which has eCPRI header already\r
- * @param size payload size to be updated\r
- * @return none\r
- */\r
-inline void xran_update_ecpri_payload_size(struct rte_mbuf *mbuf, int size)\r
-{\r
- struct xran_ecpri_hdr *ecpri_hdr;\r
-\r
- ecpri_hdr = rte_pktmbuf_mtod(mbuf, struct xran_ecpri_hdr *);\r
-\r
- ecpri_hdr->cmnhdr.ecpri_payl_size = rte_cpu_to_be_16(size);\r
-}\r
-\r
-\r
-/**\r
- * @brief Build ECPRI header and returns added length\r
- *\r
- * @ingroup xran\r
- *\r
- * @param mbuf\r
- * The pointer of the packet buffer to be parsed\r
- * @param CC_ID\r
- * Component Carrier ID for this C-Plane message\r
- * @param Ant_ID\r
- * Antenna ID(RU Port ID) for this C-Plane message\r
- * @param seq_id\r
- * Sequence ID for this C-Plane message\r
- * @param ecpri_hdr\r
- * The pointer to ECPRI header\r
- * @return\r
- * added payload size on success\r
- * XRAN_STATUS_RESOURCE if failed to allocate the space to packet buffer\r
- */\r
-int xran_build_ecpri_hdr(struct rte_mbuf *mbuf,\r
- uint8_t CC_ID, uint8_t Ant_ID,\r
- uint8_t seq_id,\r
- struct xran_ecpri_hdr **ecpri_hdr)\r
-{\r
- uint32_t payloadlen;\r
- struct xran_ecpri_hdr *tmp;\r
-\r
-\r
- tmp = (struct xran_ecpri_hdr *)rte_pktmbuf_append(mbuf, sizeof(struct xran_ecpri_hdr));\r
- if(unlikely(tmp == NULL)) {\r
- print_err("Fail to allocate the space for eCPRI hedaer!");\r
- return (XRAN_STATUS_RESOURCE);\r
- }\r
-\r
- /* Fill common header */\r
- tmp->cmnhdr.ecpri_ver = XRAN_ECPRI_VER;\r
- tmp->cmnhdr.ecpri_resv = 0; // should be zero\r
- tmp->cmnhdr.ecpri_concat = 0;\r
- tmp->cmnhdr.ecpri_mesg_type = ECPRI_RT_CONTROL_DATA;\r
- tmp->ecpri_xtc_id = xran_compose_cid(0, 0, CC_ID, Ant_ID);\r
-\r
- /* TODO: Transport layer fragmentation is not supported */\r
- tmp->ecpri_seq_id.seq_id = seq_id;\r
- tmp->ecpri_seq_id.sub_seq_id = 0;\r
- tmp->ecpri_seq_id.e_bit = 1;\r
-\r
- /* Starts with eCPRI header size */\r
- payloadlen = xran_get_ecpri_hdr_size();\r
-\r
- *ecpri_hdr = tmp;\r
-\r
- return (payloadlen);\r
-}\r
-\r
-/**\r
- * @brief Parse ECPRI header\r
- *\r
- * @ingroup xran\r
- *\r
- * @param mbuf\r
- * The pointer of the packet buffer to be parsed\r
- * @param ecpri_hdr\r
- * The pointer to ECPRI header\r
- * @param pkt_info\r
- * The pointer of sturcture to store the information from header\r
- * @return\r
- * XRAN_STATUS_SUCCESS on success\r
- * XRAN_STATUS_INVALID_PACKET if failed to parse the packet\r
- */\r
-int xran_parse_ecpri_hdr(struct rte_mbuf *mbuf,\r
- struct xran_ecpri_hdr **ecpri_hdr,\r
- struct xran_recv_packet_info *pkt_info)\r
-{\r
- int ret;\r
-\r
-\r
- *ecpri_hdr = rte_pktmbuf_mtod(mbuf, void *);\r
- if(*ecpri_hdr == NULL) {\r
- print_err("Invalid packet - eCPRI hedaer!");\r
- return (XRAN_STATUS_INVALID_PACKET);\r
- }\r
-\r
- /* Process eCPRI header */\r
- ret = XRAN_STATUS_SUCCESS;\r
- if((*ecpri_hdr)->cmnhdr.ecpri_ver != XRAN_ECPRI_VER) {\r
- print_err("Invalid eCPRI version - %d", (*ecpri_hdr)->cmnhdr.ecpri_ver);\r
- ret = XRAN_STATUS_INVALID_PACKET;\r
- }\r
- if((*ecpri_hdr)->cmnhdr.ecpri_resv != 0) {\r
- print_err("Invalid reserved field - %d", (*ecpri_hdr)->cmnhdr.ecpri_resv);\r
- ret = XRAN_STATUS_INVALID_PACKET;\r
- }\r
-\r
- if(pkt_info != NULL) {\r
- /* store the information from header */\r
- pkt_info->ecpri_version = (*ecpri_hdr)->cmnhdr.ecpri_ver;\r
- pkt_info->msg_type = (enum ecpri_msg_type)(*ecpri_hdr)->cmnhdr.ecpri_mesg_type;\r
- pkt_info->payload_len = rte_be_to_cpu_16((*ecpri_hdr)->cmnhdr.ecpri_payl_size);\r
-\r
- pkt_info->seq_id = (*ecpri_hdr)->ecpri_seq_id.seq_id;\r
- pkt_info->subseq_id = (*ecpri_hdr)->ecpri_seq_id.sub_seq_id;\r
- pkt_info->ebit = (*ecpri_hdr)->ecpri_seq_id.e_bit;\r
- xran_decompose_cid((*ecpri_hdr)->ecpri_xtc_id, &(pkt_info->eaxc));\r
- }\r
-\r
- return (ret);\r
-}\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief This file provides the implementation for Transport lyaer (eCPRI) API.
+ *
+ * @file xran_transport.c
+ * @ingroup group_lte_source_xran
+ * @author Intel Corporation
+ *
+ **/
+
+#include <stdint.h>
+#include <endian.h>
+#include <rte_common.h>
+#include <rte_config.h>
+
+#include "xran_fh_o_du.h"
+#include "xran_common.h"
+#include "xran_transport.h"
+#include "xran_pkt_cp.h"
+#include "xran_cp_api.h"
+#include "xran_up_api.h"
+#include "xran_printf.h"
+
+
+/**
+ * @brief return eCPRI header size without eCPRI common header
+ *
+ * @ingroup xran
+ *
+ * @return the size of eCPRI header without common header
+ */
+int xran_get_ecpri_hdr_size(void)
+{
+ return(sizeof(struct xran_ecpri_hdr) - sizeof(struct xran_ecpri_cmn_hdr));
+}
+
+/**
+ * @brief Compose ecpriRtcid/ecpriPcid
+ *
+ * @ingroup xran
+ *
+ * @param CU_Port_ID CU Port ID
+ * @param BanbSector_ID Band Sector ID
+ * @param CC_ID Component Carrier ID
+ * @param Ant_ID RU Port ID (antenna ID)
+ * @return uint16_t composed ecpriRtcid/ecpriPcid (network byte order)
+ */
+uint16_t xran_compose_cid(uint8_t CU_Port_ID, uint8_t BandSector_ID, uint8_t CC_ID, uint8_t Ant_ID)
+{
+ uint16_t cid;
+ struct xran_eaxcid_config *conf;
+
+ conf = xran_get_conf_eAxC(NULL);
+
+ cid = ((CU_Port_ID << conf->bit_cuPortId) & conf->mask_cuPortId)
+ | ((BandSector_ID << conf->bit_bandSectorId) & conf->mask_bandSectorId)
+ | ((CC_ID << conf->bit_ccId) & conf->mask_ccId)
+ | ((Ant_ID << conf->bit_ruPortId) & conf->mask_ruPortId);
+
+ return (rte_cpu_to_be_16(cid));
+}
+
+/**
+ * @brief Decompose ecpriRtcid/ecpriPcid
+ *
+ * @ingroup xran
+ *
+ * @param cid composed ecpriRtcid/ecpriPcid (network byte order)
+ * @param result the pointer of the structure to store decomposed values
+ * @return none
+ */
+void xran_decompose_cid(uint16_t cid, struct xran_eaxc_info *result)
+{
+ struct xran_eaxcid_config *conf;
+
+ conf = xran_get_conf_eAxC(NULL);
+ cid = rte_be_to_cpu_16(cid);
+
+ result->cuPortId = (cid&conf->mask_cuPortId) >> conf->bit_cuPortId;
+ result->bandSectorId = (cid&conf->mask_bandSectorId) >> conf->bit_bandSectorId;
+ result->ccId = (cid&conf->mask_ccId) >> conf->bit_ccId;
+ result->ruPortId = (cid&conf->mask_ruPortId) >> conf->bit_ruPortId;
+
+ return;
+}
+
+/**
+ * @brief modify the payload size of eCPRI header in xRAN packet
+ *
+ * @ingroup xran
+ *
+ * @param mbuf Initialized rte_mbuf packet which has eCPRI header already
+ * @param size payload size to be updated
+ * @return none
+ */
+inline void xran_update_ecpri_payload_size(struct rte_mbuf *mbuf, int size)
+{
+ struct xran_ecpri_hdr *ecpri_hdr;
+
+ ecpri_hdr = rte_pktmbuf_mtod(mbuf, struct xran_ecpri_hdr *);
+
+ ecpri_hdr->cmnhdr.ecpri_payl_size = rte_cpu_to_be_16(size);
+}
+
+
+/**
+ * @brief Build ECPRI header and returns added length
+ *
+ * @ingroup xran
+ *
+ * @param mbuf
+ * The pointer of the packet buffer to be parsed
+ * @param CC_ID
+ * Component Carrier ID for this C-Plane message
+ * @param Ant_ID
+ * Antenna ID(RU Port ID) for this C-Plane message
+ * @param seq_id
+ * Sequence ID for this C-Plane message
+ * @param ecpri_hdr
+ * The pointer to ECPRI header
+ * @return
+ * added payload size on success
+ * XRAN_STATUS_RESOURCE if failed to allocate the space to packet buffer
+ */
+int xran_build_ecpri_hdr(struct rte_mbuf *mbuf,
+ uint8_t CC_ID, uint8_t Ant_ID,
+ uint8_t seq_id,
+ struct xran_ecpri_hdr **ecpri_hdr)
+{
+ uint32_t payloadlen;
+ struct xran_ecpri_hdr *tmp;
+
+
+ tmp = (struct xran_ecpri_hdr *)rte_pktmbuf_append(mbuf, sizeof(struct xran_ecpri_hdr));
+ if(unlikely(tmp == NULL)) {
+ print_err("Fail to allocate the space for eCPRI hedaer!");
+ return (XRAN_STATUS_RESOURCE);
+ }
+
+ /* Fill common header */
+ tmp->cmnhdr.ecpri_ver = XRAN_ECPRI_VER;
+ tmp->cmnhdr.ecpri_resv = 0; // should be zero
+ tmp->cmnhdr.ecpri_concat = 0;
+ tmp->cmnhdr.ecpri_mesg_type = ECPRI_RT_CONTROL_DATA;
+ tmp->ecpri_xtc_id = xran_compose_cid(0, 0, CC_ID, Ant_ID);
+
+ /* TODO: Transport layer fragmentation is not supported */
+ tmp->ecpri_seq_id.seq_id = seq_id;
+ tmp->ecpri_seq_id.sub_seq_id = 0;
+ tmp->ecpri_seq_id.e_bit = 1;
+
+ /* Starts with eCPRI header size */
+ payloadlen = xran_get_ecpri_hdr_size();
+
+ *ecpri_hdr = tmp;
+
+ return (payloadlen);
+}
+
+/**
+ * @brief Parse ECPRI header
+ *
+ * @ingroup xran
+ *
+ * @param mbuf
+ * The pointer of the packet buffer to be parsed
+ * @param ecpri_hdr
+ * The pointer to ECPRI header
+ * @param pkt_info
+ * The pointer of sturcture to store the information from header
+ * @return
+ * XRAN_STATUS_SUCCESS on success
+ * XRAN_STATUS_INVALID_PACKET if failed to parse the packet
+ */
+int xran_parse_ecpri_hdr(struct rte_mbuf *mbuf,
+ struct xran_ecpri_hdr **ecpri_hdr,
+ struct xran_recv_packet_info *pkt_info)
+{
+ int ret;
+
+
+ *ecpri_hdr = rte_pktmbuf_mtod(mbuf, void *);
+ if(*ecpri_hdr == NULL) {
+ print_err("Invalid packet - eCPRI hedaer!");
+ return (XRAN_STATUS_INVALID_PACKET);
+ }
+
+ /* Process eCPRI header */
+ ret = XRAN_STATUS_SUCCESS;
+ if((*ecpri_hdr)->cmnhdr.ecpri_ver != XRAN_ECPRI_VER) {
+ print_err("Invalid eCPRI version - %d", (*ecpri_hdr)->cmnhdr.ecpri_ver);
+ ret = XRAN_STATUS_INVALID_PACKET;
+ }
+ if((*ecpri_hdr)->cmnhdr.ecpri_resv != 0) {
+ print_err("Invalid reserved field - %d", (*ecpri_hdr)->cmnhdr.ecpri_resv);
+ ret = XRAN_STATUS_INVALID_PACKET;
+ }
+
+ if(pkt_info != NULL) {
+ /* store the information from header */
+ pkt_info->ecpri_version = (*ecpri_hdr)->cmnhdr.ecpri_ver;
+ pkt_info->msg_type = (enum ecpri_msg_type)(*ecpri_hdr)->cmnhdr.ecpri_mesg_type;
+ pkt_info->payload_len = rte_be_to_cpu_16((*ecpri_hdr)->cmnhdr.ecpri_payl_size);
+
+ pkt_info->seq_id = (*ecpri_hdr)->ecpri_seq_id.seq_id;
+ pkt_info->subseq_id = (*ecpri_hdr)->ecpri_seq_id.sub_seq_id;
+ pkt_info->ebit = (*ecpri_hdr)->ecpri_seq_id.e_bit;
+ xran_decompose_cid((*ecpri_hdr)->ecpri_xtc_id, &(pkt_info->eaxc));
+ }
+
+ return (ret);
+}
+
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/**\r
- * @brief This file defines those table used in 5G NR spec.\r
- * @file xran_ul_tables.c\r
- * @author Intel Corporation\r
- **/\r
-\r
-#include <stdio.h>\r
-#include <stdlib.h>\r
-#include <string.h>\r
-\r
-#include "xran_common.h"\r
-\r
-/* 3GPP 38.211-f20 Table - 6.3.3.2-2 */\r
-const xRANPrachConfigTableStruct gxranPrachDataTable_sub6_fdd[XRAN_PRACH_CONFIG_TABLE_SIZE] =\r
-{\r
- { 0, { 0 }, 16, { 1 }, { 1 }, 1, 0, 0, 0, 0 },\r
- { 1, { 0 }, 16, { 1 }, { 4 }, 1, 0, 0, 0, 0 },\r
- { 2, { 0 }, 16, { 1 }, { 7 }, 1, 0, 0, 0, 0 },\r
- { 3, { 0 }, 16, { 1 }, { 9 }, 1, 0, 0, 0, 0 },\r
- { 4, { 0 }, 8, { 1 }, { 1 }, 1, 0, 0, 0, 0 },\r
- { 5, { 0 }, 8, { 1 }, { 4 }, 1, 0, 0, 0, 0 },\r
- { 6, { 0 }, 8, { 1 }, { 7 }, 1, 0, 0, 0, 0 },\r
- { 7, { 0 }, 8, { 1 }, { 9 }, 1, 0, 0, 0, 0 },\r
- { 8, { 0 }, 4, { 1 }, { 1 }, 1, 0, 0, 0, 0 },\r
- { 9, { 0 }, 4, { 1 }, { 4 }, 1, 0, 0, 0, 0 },\r
- { 10, { 0 }, 4, { 1 }, { 7 }, 1, 0, 0, 0, 0 },\r
- { 11, { 0 }, 4, { 1 }, { 9 }, 1, 0, 0, 0, 0 },\r
- { 12, { 0 }, 2, { 1 }, { 1 }, 1, 0, 0, 0, 0 },\r
- { 13, { 0 }, 2, { 1 }, { 4 }, 1, 0, 0, 0, 0 },\r
- { 14, { 0 }, 2, { 1 }, { 7 }, 1, 0, 0, 0, 0 },\r
- { 15, { 0 }, 2, { 1 }, { 9 }, 1, 0, 0, 0, 0 },\r
- { 16, { 0 }, 1, { 0 }, { 1 }, 1, 0, 0, 0, 0 },\r
- { 17, { 0 }, 1, { 0 }, { 4 }, 1, 0, 0, 0, 0 },\r
- { 18, { 0 }, 1, { 0 }, { 7 }, 1, 0, 0, 0, 0 },\r
- { 19, { 0 }, 1, { 0 }, { 1, 6 }, 2, 0, 0, 0, 0 },\r
- { 20, { 0 }, 1, { 0 }, { 2, 7 }, 2, 0, 0, 0, 0 },\r
- { 21, { 0 }, 1, { 0 }, { 3, 8 }, 2, 0, 0, 0, 0 },\r
- { 22, { 0 }, 1, { 0 }, { 1, 4, 7 }, 3, 0, 0, 0, 0 },\r
- { 23, { 0 }, 1, { 0 }, { 2, 5, 8 }, 3, 0, 0, 0, 0 },\r
- { 24, { 0 }, 1, { 0 }, { 3, 6, 9 }, 3, 0, 0, 0, 0 },\r
- { 25, { 0 }, 1, { 0 }, { 0, 2, 4, 6, 8 }, 5, 0, 0, 0, 0 },\r
- { 26, { 0 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 0, 0, 0 },\r
- { 27, { 0 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 0, 0, 0, 0 },\r
- { 28, { 1 }, 16, { 1 }, { 1 }, 1, 0, 0, 0, 0 },\r
- { 29, { 1 }, 16, { 1 }, { 4 }, 1, 0, 0, 0, 0 },\r
- { 30, { 1 }, 16, { 1 }, { 7 }, 1, 0, 0, 0, 0 },\r
- { 31, { 1 }, 16, { 1 }, { 9 }, 1, 0, 0, 0, 0 },\r
- { 32, { 1 }, 8, { 1 }, { 1 }, 1, 0, 0, 0, 0 },\r
- { 33, { 1 }, 8, { 1 }, { 4 }, 1, 0, 0, 0, 0 },\r
- { 34, { 1 }, 8, { 1 }, { 7 }, 1, 0, 0, 0, 0 },\r
- { 35, { 1 }, 8, { 1 }, { 9 }, 1, 0, 0, 0, 0 },\r
- { 36, { 1 }, 4, { 1 }, { 1 }, 1, 0, 0, 0, 0 },\r
- { 37, { 1 }, 4, { 1 }, { 4 }, 1, 0, 0, 0, 0 },\r
- { 38, { 1 }, 4, { 1 }, { 7 }, 1, 0, 0, 0, 0 },\r
- { 39, { 1 }, 4, { 1 }, { 9 }, 1, 0, 0, 0, 0 },\r
- { 40, { 1 }, 2, { 1 }, { 1 }, 1, 0, 0, 0, 0 },\r
- { 41, { 1 }, 2, { 1 }, { 4 }, 1, 0, 0, 0, 0 },\r
- { 42, { 1 }, 2, { 1 }, { 7 }, 1, 0, 0, 0, 0 },\r
- { 43, { 1 }, 2, { 1 }, { 9 }, 1, 0, 0, 0, 0 },\r
- { 44, { 1 }, 1, { 0 }, { 1 }, 1, 0, 0, 0, 0 },\r
- { 45, { 1 }, 1, { 0 }, { 4 }, 1, 0, 0, 0, 0 },\r
- { 46, { 1 }, 1, { 0 }, { 9 }, 1, 0, 0, 0, 0 },\r
- { 47, { 1 }, 1, { 0 }, { 1, 6 }, 2, 0, 0, 0, 0 },\r
- { 48, { 1 }, 1, { 0 }, { 2, 7 }, 2, 0, 0, 0, 0 },\r
- { 49, { 1 }, 1, { 0 }, { 3, 8 }, 2, 0, 0, 0, 0 },\r
- { 50, { 1 }, 1, { 0 }, { 1, 4, 7 }, 3, 0, 0, 0, 0 },\r
- { 51, { 1 }, 1, { 0 }, { 2, 5, 8 }, 3, 0, 0, 0, 0 },\r
- { 52, { 1 }, 1, { 0 }, { 3, 6, 9 }, 3, 0, 0, 0, 0 },\r
- { 53, { 2 }, 16, { 1 }, { 1 }, 1, 0, 0, 0, 0 },\r
- { 54, { 2 }, 8, { 1 }, { 1 }, 1, 0, 0, 0, 0 },\r
- { 55, { 2 }, 4, { 0 }, { 1 }, 1, 0, 0, 0, 0 },\r
- { 56, { 2 }, 2, { 0 }, { 1 }, 1, 0, 0, 0, 0 },\r
- { 57, { 2 }, 2, { 0 }, { 5 }, 1, 0, 0, 0, 0 },\r
- { 58, { 2 }, 1, { 0 }, { 1 }, 1, 0, 0, 0, 0 },\r
- { 59, { 2 }, 1, { 0 }, { 5 }, 1, 0, 0, 0, 0 },\r
- { 60, { 3 }, 16, { 1 }, { 1 }, 1, 0, 0, 0, 0 },\r
- { 61, { 3 }, 16, { 1 }, { 4 }, 1, 0, 0, 0, 0 },\r
- { 62, { 3 }, 16, { 1 }, { 7 }, 1, 0, 0, 0, 0 },\r
- { 63, { 3 }, 16, { 1 }, { 9 }, 1, 0, 0, 0, 0 },\r
- { 64, { 3 }, 8, { 1 }, { 1 }, 1, 0, 0, 0, 0 },\r
- { 65, { 3 }, 8, { 1 }, { 4 }, 1, 0, 0, 0, 0 },\r
- { 66, { 3 }, 8, { 1 }, { 7 }, 1, 0, 0, 0, 0 },\r
- { 67, { 3 }, 8, { 1 }, { 1 }, 1, 0, 0, 0, 0 },\r
- { 68, { 3 }, 4, { 1 }, { 4 }, 1, 0, 0, 0, 0 },\r
- { 69, { 3 }, 4, { 1 }, { 7 }, 1, 0, 0, 0, 0 },\r
- { 70, { 3 }, 4, { 1 }, { 9 }, 1, 0, 0, 0, 0 },\r
- { 71, { 3 }, 4, { 1 }, { 1 }, 1, 0, 0, 0, 0 },\r
- { 72, { 3 }, 2, { 1 }, { 4 }, 1, 0, 0, 0, 0 },\r
- { 73, { 3 }, 2, { 1 }, { 7 }, 1, 0, 0, 0, 0 },\r
- { 74, { 3 }, 2, { 1 }, { 9 }, 1, 0, 0, 0, 0 },\r
- { 75, { 3 }, 2, { 0 }, { 1 }, 1, 0, 0, 0, 0 },\r
- { 76, { 3 }, 1, { 0 }, { 4 }, 1, 0, 0, 0, 0 },\r
- { 77, { 3 }, 1, { 0 }, { 7 }, 1, 0, 0, 0, 0 },\r
- { 78, { 3 }, 1, { 0 }, { 1, 6 }, 2, 0, 0, 0, 0 },\r
- { 79, { 3 }, 1, { 0 }, { 2, 7 }, 2, 0, 0, 0, 0 },\r
- { 80, { 3 }, 1, { 0 }, { 3, 8 }, 2, 0, 0, 0, 0 },\r
- { 81, { 3 }, 1, { 0 }, { 1, 4, 7 }, 3, 0, 0, 0, 0 },\r
- { 82, { 3 }, 1, { 0 }, { 2, 5, 8 }, 3, 0, 0, 0, 0 },\r
- { 83, { 3 }, 1, { 0 }, { 3, 6, 9 }, 3, 0, 0, 0, 0 },\r
- { 84, { 3 }, 1, { 0 }, { 0, 2, 4, 6, 8 }, 5, 0, 0, 0, 0 },\r
- { 85, { 3 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 0, 0, 0 },\r
- { 86, { 3 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 0, 0, 0, 0 },\r
- { 87, { FORMAT_A1 }, 16, { 0 }, { 4, 9 }, 2, 0, 1, 6, 2 },\r
- { 88, { FORMAT_A1 }, 16, { 1 }, { 4 }, 1, 0, 2, 6, 2 },\r
- { 89, { FORMAT_A1 }, 8, { 0 }, { 4, 9 }, 2, 0, 1, 6, 2 },\r
- { 90, { FORMAT_A1 }, 8, { 1 }, { 4 }, 1, 0, 2, 6, 2 },\r
- { 91, { FORMAT_A1 }, 4, { 0 }, { 4, 9 }, 2, 0, 1, 6, 2 },\r
- { 92, { FORMAT_A1 }, 4, { 1 }, { 4, 9 }, 2, 0, 1, 6, 2 },\r
- { 93, { FORMAT_A1 }, 4, { 0 }, { 4 }, 1, 0, 2, 6, 2 },\r
- { 94, { FORMAT_A1 }, 2, { 0 }, { 4, 9 }, 2, 0, 1, 6, 2 },\r
- { 95, { FORMAT_A1 }, 2, { 0 }, { 1 }, 1, 0, 2, 6, 2 },\r
- { 96, { FORMAT_A1 }, 2, { 0 }, { 4 }, 1, 0, 2, 6, 2 },\r
- { 97, { FORMAT_A1 }, 2, { 0 }, { 7 }, 1, 0, 2, 6, 2 },\r
- { 98, { FORMAT_A1 }, 1, { 0 }, { 4 }, 1, 0, 1, 6, 2 },\r
- { 99, { FORMAT_A1 }, 1, { 0 }, { 1, 6 }, 2, 0, 1, 6, 2 },\r
- { 100, { FORMAT_A1 }, 1, { 0 }, { 4, 9 }, 2, 0, 1, 6, 2 },\r
- { 101, { FORMAT_A1 }, 1, { 0 }, { 1 }, 1, 0, 2, 6, 2 },\r
- { 102, { FORMAT_A1 }, 1, { 0 }, { 7 }, 1, 0, 2, 6, 2 },\r
- { 103, { FORMAT_A1 }, 1, { 0 }, { 2, 7 }, 2, 0, 2, 6, 2 },\r
- { 104, { FORMAT_A1 }, 1, { 0 }, { 1, 4, 7 }, 3, 0, 2, 6, 2 },\r
- { 105, { FORMAT_A1 }, 1, { 0 }, { 0, 2, 4, 6, 8 }, 5, 0, 2, 6, 2 },\r
- { 106, { FORMAT_A1 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 0, 2, 6, 2 },\r
- { 107, { FORMAT_A1 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 2, 6, 2 },\r
- { 108, { FORMAT_A1, FORMAT_B1 }, 2, { 0 }, { 4, 9 }, 2, 0, 1, 7, 2 },\r
- { 109, { FORMAT_A1, FORMAT_B1 }, 2, { 0 }, { 4 }, 1, 0, 2, 7, 2 },\r
- { 110, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 4 }, 1, 0, 1, 7, 2 },\r
- { 111, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 1, 6 }, 2, 0, 1, 7, 2 },\r
- { 112, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 4, 9 }, 2, 0, 1, 7, 2 },\r
- { 113, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 1 }, 1, 0, 2, 7, 2 },\r
- { 114, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 7 }, 1, 0, 2, 7, 2 },\r
- { 115, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 1, 4, 7 }, 3, 0, 2, 7, 2 },\r
- { 116, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 0, 2, 4, 6, 8 }, 5, 0, 2, 7, 2 },\r
- { 117, { FORMAT_A2 }, 16, { 1 }, { 2, 6, 9 }, 3, 0, 1, 3, 4 },\r
- { 118, { FORMAT_A2 }, 16, { 1 }, { 4 }, 1, 0, 2, 3, 4 },\r
- { 119, { FORMAT_A2 }, 8, { 1 }, { 2, 6, 9 }, 3, 0, 1, 3, 4 },\r
- { 120, { FORMAT_A2 }, 8, { 1 }, { 4 }, 1, 0, 2, 3, 4 },\r
- { 121, { FORMAT_A2 }, 4, { 0 }, { 2, 6, 9 }, 3, 0, 1, 3, 4 },\r
- { 122, { FORMAT_A2 }, 4, { 0 }, { 4 }, 1, 0, 2, 3, 4 },\r
- { 123, { FORMAT_A2 }, 2, { 1 }, { 2, 6, 9 }, 3, 0, 1, 3, 4 },\r
- { 124, { FORMAT_A2 }, 2, { 0 }, { 1 }, 1, 0, 2, 3, 4 },\r
- { 125, { FORMAT_A2 }, 2, { 0 }, { 4 }, 1, 0, 2, 3, 4 },\r
- { 126, { FORMAT_A2 }, 2, { 0 }, { 7 }, 1, 0, 2, 3, 4 },\r
- { 127, { FORMAT_A2 }, 1, { 0 }, { 4 }, 1, 0, 1, 3, 4 },\r
- { 128, { FORMAT_A2 }, 1, { 0 }, { 1, 6 }, 2, 0, 1, 3, 4 },\r
- { 129, { FORMAT_A2 }, 1, { 0 }, { 4, 9 }, 2, 0, 1, 3, 4 },\r
- { 130, { FORMAT_A2 }, 1, { 0 }, { 1 }, 1, 0, 2, 3, 4 },\r
- { 131, { FORMAT_A2 }, 1, { 0 }, { 7 }, 1, 0, 2, 3, 4 },\r
- { 132, { FORMAT_A2 }, 1, { 0 }, { 2, 7 }, 2, 0, 2, 3, 4 },\r
- { 133, { FORMAT_A2 }, 1, { 0 }, { 1, 4, 7 }, 3, 0, 2, 3, 4 },\r
- { 134, { FORMAT_A2 }, 1, { 0 }, { 0, 2, 4, 6, 8 }, 5, 0, 2, 3, 4 },\r
- { 135, { FORMAT_A2 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 0, 2, 3, 4 },\r
- { 136, { FORMAT_A2 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 2, 3, 4 },\r
- { 137, { FORMAT_A2, FORMAT_B2 }, 2, { 1 }, { 2, 6, 9 }, 3, 0, 1, 3, 4 },\r
- { 138, { FORMAT_A2, FORMAT_B2 }, 2, { 0 }, { 4 }, 1, 0, 2, 3, 4 },\r
- { 139, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 4 }, 1, 0, 1, 3, 4 },\r
- { 140, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 1, 6 }, 2, 0, 1, 3, 4 },\r
- { 141, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 4, 9 }, 2, 0, 1, 3, 4 },\r
- { 142, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 1 }, 1, 0, 2, 3, 4 },\r
- { 143, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 7 }, 1, 0, 2, 3, 4 },\r
- { 144, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 1, 4, 7 }, 3, 0, 2, 3, 4 },\r
- { 145, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 0, 2, 4, 6, 8 }, 5, 0, 2, 3, 4 },\r
- { 146, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 0, 2, 3, 4 },\r
- { 147, { FORMAT_A3 }, 16, { 1 }, { 4, 9 }, 2, 0, 1, 2, 6 },\r
- { 148, { FORMAT_A3 }, 16, { 1 }, { 4 }, 1, 0, 2, 2, 6 },\r
- { 149, { FORMAT_A3 }, 8, { 1 }, { 4, 9 }, 2, 0, 1, 2, 6 },\r
- { 150, { FORMAT_A3 }, 8, { 1 }, { 4 }, 1, 0, 2, 2, 6 },\r
- { 151, { FORMAT_A3 }, 4, { 0 }, { 4, 9 }, 2, 0, 1, 2, 6 },\r
- { 152, { FORMAT_A3 }, 4, { 0 }, { 4 }, 1, 0, 2, 2, 6 },\r
- { 153, { FORMAT_A3 }, 2, { 1 }, { 2, 6, 9 }, 3, 0, 2, 2, 6 },\r
- { 154, { FORMAT_A3 }, 2, { 0 }, { 1 }, 1, 0, 2, 2, 6 },\r
- { 155, { FORMAT_A3 }, 2, { 0 }, { 4 }, 1, 0, 2, 2, 6 },\r
- { 156, { FORMAT_A3 }, 2, { 0 }, { 7 }, 1, 0, 2, 2, 6 },\r
- { 157, { FORMAT_A3 }, 1, { 0 }, { 4 }, 1, 0, 1, 2, 6 },\r
- { 158, { FORMAT_A3 }, 1, { 0 }, { 1, 6 }, 2, 0, 1, 2, 6 },\r
- { 159, { FORMAT_A3 }, 1, { 0 }, { 4, 9 }, 2, 0, 1, 2, 6 },\r
- { 160, { FORMAT_A3 }, 1, { 0 }, { 1 }, 1, 0, 2, 2, 6 },\r
- { 161, { FORMAT_A3 }, 1, { 0 }, { 7 }, 1, 0, 2, 2, 6 },\r
- { 162, { FORMAT_A3 }, 1, { 0 }, { 2, 7 }, 2, 0, 2, 2, 6 },\r
- { 163, { FORMAT_A3 }, 1, { 0 }, { 1, 4, 7 }, 3, 0, 2, 2, 6 },\r
- { 164, { FORMAT_A3 }, 1, { 0 }, { 0, 2, 4, 6, 8 }, 5, 0, 2, 2, 6 },\r
- { 165, { FORMAT_A3 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 0, 2, 2, 6 },\r
- { 166, { FORMAT_A3 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 2, 2, 6 },\r
- { 167, { FORMAT_A3, FORMAT_B3 }, 2, { 1 }, { 2, 6, 9 }, 3, 0, 2, 2, 6 },\r
- { 168, { FORMAT_A3, FORMAT_B3 }, 2, { 0 }, { 4 }, 1, 0, 2, 2, 6 },\r
- { 169, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 4 }, 1, 0, 2, 2, 6 },\r
- { 170, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 1, 6 }, 2, 0, 1, 2, 6 },\r
- { 171, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 4, 9 }, 2, 0, 1, 2, 6 },\r
- { 172, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 1 }, 1, 0, 1, 2, 6 },\r
- { 173, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 7 }, 1, 0, 2, 2, 6 },\r
- { 174, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 1, 4, 7 }, 3, 0, 2, 2, 6 },\r
- { 175, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 0, 2, 4, 6, 8 }, 5, 0, 2, 2, 6 },\r
- { 176, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 0, 2, 2, 6 },\r
- { 177, { FORMAT_B1 }, 16, { 0 }, { 4, 9 }, 2, 0, 1, 7, 2 },\r
- { 178, { FORMAT_B1 }, 16, { 1 }, { 4 }, 1, 0, 2, 7, 2 },\r
- { 179, { FORMAT_B1 }, 8, { 0 }, { 4, 9 }, 2, 0, 1, 7, 2 },\r
- { 180, { FORMAT_B1 }, 8, { 1 }, { 4 }, 1, 0, 2, 7, 2 },\r
- { 181, { FORMAT_B1 }, 4, { 0 }, { 4, 9 }, 2, 0, 1, 7, 2 },\r
- { 182, { FORMAT_B1 }, 4, { 1 }, { 4, 9 }, 2, 0, 1, 7, 2 },\r
- { 183, { FORMAT_B1 }, 4, { 0 }, { 4 }, 1, 0, 2, 7, 2 },\r
- { 184, { FORMAT_B1 }, 2, { 0 }, { 4, 9 }, 2, 0, 1, 7, 2 },\r
- { 185, { FORMAT_B1 }, 2, { 0 }, { 1 }, 1, 0, 2, 7, 2 },\r
- { 186, { FORMAT_B1 }, 2, { 0 }, { 4 }, 1, 0, 2, 7, 2 },\r
- { 187, { FORMAT_B1 }, 2, { 0 }, { 7 }, 1, 0, 2, 7, 2 },\r
- { 188, { FORMAT_B1 }, 1, { 0 }, { 4 }, 1, 0, 1, 7, 2 },\r
- { 189, { FORMAT_B1 }, 1, { 0 }, { 1, 6 }, 2, 0, 1, 7, 2 },\r
- { 190, { FORMAT_B1 }, 1, { 0 }, { 4, 9 }, 2, 0, 1, 7, 2 },\r
- { 191, { FORMAT_B1 }, 1, { 0 }, { 1 }, 1, 0, 2, 7, 2 },\r
- { 192, { FORMAT_B1 }, 1, { 0 }, { 7 }, 1, 0, 2, 7, 2 },\r
- { 193, { FORMAT_B1 }, 1, { 0 }, { 2, 7 }, 2, 0, 2, 7, 2 },\r
- { 194, { FORMAT_B1 }, 1, { 0 }, { 1, 4, 7 }, 3, 0, 2, 7, 2 },\r
- { 195, { FORMAT_B1 }, 1, { 0 }, { 0, 2, 4, 6, 8 }, 5, 0, 2, 7, 2 },\r
- { 196, { FORMAT_B1 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 0, 2, 7, 2 },\r
- { 197, { FORMAT_B1 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 2, 7, 12 },\r
- { 198, { FORMAT_B4 }, 16, { 0 }, { 4, 9 }, 2, 0, 2, 1, 12 },\r
- { 199, { FORMAT_B4 }, 16, { 1 }, { 4 }, 1, 0, 2, 1, 12 },\r
- { 200, { FORMAT_B4 }, 8, { 0 }, { 4, 9 }, 2, 0, 2, 1, 12 },\r
- { 201, { FORMAT_B4 }, 8, { 1 }, { 4 }, 1, 0, 2, 1, 12 },\r
- { 202, { FORMAT_B4 }, 4, { 0 }, { 4, 9 }, 2, 0, 2, 1, 12 },\r
- { 203, { FORMAT_B4 }, 4, { 0 }, { 4 }, 1, 0, 2, 1, 12 },\r
- { 204, { FORMAT_B4 }, 4, { 1 }, { 4, 9 }, 2, 0, 2, 1, 12 },\r
- { 205, { FORMAT_B4 }, 2, { 0 }, { 4, 9 }, 2, 0, 2, 1, 12 },\r
- { 206, { FORMAT_B4 }, 2, { 0 }, { 1 }, 1, 0, 2, 1, 12 },\r
- { 207, { FORMAT_B4 }, 2, { 0 }, { 4 }, 1, 0, 2, 1, 12 },\r
- { 208, { FORMAT_B4 }, 2, { 0 }, { 7 }, 1, 0, 2, 1, 12 },\r
- { 209, { FORMAT_B4 }, 1, { 0 }, { 1 }, 1, 0, 2, 1, 12 },\r
- { 210, { FORMAT_B4 }, 1, { 0 }, { 4 }, 1, 0, 2, 1, 12 },\r
- { 211, { FORMAT_B4 }, 1, { 0 }, { 7 }, 1, 0, 2, 1, 12 },\r
- { 212, { FORMAT_B4 }, 1, { 0 }, { 1, 6 }, 2, 0, 2, 1, 12 },\r
- { 213, { FORMAT_B4 }, 1, { 0 }, { 2, 7 }, 2, 0, 2, 1, 12 },\r
- { 214, { FORMAT_B4 }, 1, { 0 }, { 4, 9 }, 2, 0, 2, 1, 12 },\r
- { 215, { FORMAT_B4 }, 1, { 0 }, { 1, 4, 7 }, 3, 0, 2, 1, 12 },\r
- { 216, { FORMAT_B4 }, 1, { 0 }, { 0, 2, 4, 6, 8 }, 5, 0, 2, 1, 12 },\r
- { 217, { FORMAT_B4 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 0, 2, 1, 12 },\r
- { 218, { FORMAT_B4 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 2, 1, 12 },\r
- { 219, { FORMAT_C0 }, 8, { 1 }, { 4 }, 1, 0, 2, 7, 2 },\r
- { 220, { FORMAT_C0 }, 4, { 1 }, { 4, 9 }, 2, 0, 1, 7, 2 },\r
- { 221, { FORMAT_C0 }, 4, { 0 }, { 4 }, 1, 0, 2, 7, 2 },\r
- { 222, { FORMAT_C0 }, 2, { 0 }, { 4, 9 }, 2, 0, 1, 7, 2 },\r
- { 223, { FORMAT_C0 }, 2, { 0 }, { 1 }, 1, 0, 2, 7, 2 },\r
- { 224, { FORMAT_C0 }, 2, { 0 }, { 4 }, 1, 0, 2, 7, 2 },\r
- { 225, { FORMAT_C0 }, 2, { 0 }, { 7 }, 1, 0, 2, 7, 2 },\r
- { 226, { FORMAT_C0 }, 1, { 0 }, { 4 }, 1, 0, 1, 7, 2 },\r
- { 227, { FORMAT_C0 }, 1, { 0 }, { 1, 6 }, 2, 0, 1, 7, 2 },\r
- { 228, { FORMAT_C0 }, 1, { 0 }, { 4, 9 }, 2, 0, 1, 7, 2 },\r
- { 229, { FORMAT_C0 }, 1, { 0 }, { 1 }, 1, 0, 2, 7, 2 },\r
- { 230, { FORMAT_C0 }, 1, { 0 }, { 7 }, 1, 0, 2, 7, 2 },\r
- { 231, { FORMAT_C0 }, 1, { 0 }, { 2, 7 }, 2, 0, 2, 7, 2 },\r
- { 232, { FORMAT_C0 }, 1, { 0 }, { 1, 4, 7 }, 3, 0, 2, 7, 2 },\r
- { 233, { FORMAT_C0 }, 1, { 0 }, { 0, 2, 4, 6, 8 }, 5, 0, 2, 7, 2 },\r
- { 234, { FORMAT_C0 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 0, 2, 7, 2 },\r
- { 235, { FORMAT_C0 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 2, 7, 2 },\r
- { 236, { FORMAT_C2 }, 16, { 1 }, { 4, 9 }, 2, 0, 1, 2, 6 },\r
- { 237, { FORMAT_C2 }, 16, { 1 }, { 4 }, 1, 0, 2, 2, 6 },\r
- { 238, { FORMAT_C2 }, 8, { 1 }, { 4, 9 }, 2, 0, 1, 2, 6 },\r
- { 239, { FORMAT_C2 }, 8, { 1 }, { 4 }, 1, 0, 2, 2, 6 },\r
- { 240, { FORMAT_C2 }, 4, { 0 }, { 4, 9 }, 2, 0, 1, 2, 6 },\r
- { 241, { FORMAT_C2 }, 4, { 0 }, { 4 }, 1, 0, 2, 2, 6 },\r
- { 242, { FORMAT_C2 }, 2, { 1 }, { 2, 6, 9 }, 3, 0, 2, 2, 6 },\r
- { 243, { FORMAT_C2 }, 2, { 0 }, { 1 }, 1, 0, 2, 2, 6 },\r
- { 244, { FORMAT_C2 }, 2, { 0 }, { 4 }, 1, 0, 2, 2, 6 },\r
- { 245, { FORMAT_C2 }, 2, { 0 }, { 7 }, 1, 0, 2, 2, 6 },\r
- { 246, { FORMAT_C2 }, 1, { 0 }, { 4 }, 1, 0, 1, 2, 6 },\r
- { 247, { FORMAT_C2 }, 1, { 0 }, { 1, 6 }, 2, 0, 1, 2, 6 },\r
- { 248, { FORMAT_C2 }, 1, { 0 }, { 4, 9 }, 2, 0, 1, 2, 6 },\r
- { 249, { FORMAT_C2 }, 1, { 0 }, { 1 }, 1, 0, 2, 2, 6 },\r
- { 250, { FORMAT_C2 }, 1, { 0 }, { 7 }, 1, 0, 2, 2, 6 },\r
- { 251, { FORMAT_C2 }, 1, { 0 }, { 2, 7 }, 2, 0, 2, 2, 6 },\r
- { 252, { FORMAT_C2 }, 1, { 0 }, { 1, 4, 7 }, 3, 0, 2, 2, 6 },\r
- { 253, { FORMAT_C2 }, 1, { 0 }, { 0, 2, 4, 6, 8 }, 5, 0, 2, 2, 6 },\r
- { 254, { FORMAT_C2 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 0, 2, 2, 6 },\r
- { 255, { FORMAT_C2 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 2, 2, 6 },\r
-};\r
-/* 3GPP 38.211-f20 Table - 6.3.3.2-3 */\r
-const xRANPrachConfigTableStruct gxranPrachDataTable_sub6_tdd[XRAN_PRACH_CONFIG_TABLE_SIZE] =\r
-{\r
- { 0, { 0 }, 16, { 1 }, { 9 }, 1, 0, 0, 0, 0 },\r
- { 1, { 0 }, 8, { 1 }, { 9 }, 1, 0, 0, 0, 0 },\r
- { 2, { 0 }, 4, { 1 }, { 9 }, 1, 0, 0, 0, 0 },\r
- { 3, { 0 }, 2, { 0 }, { 9 }, 1, 0, 0, 0, 0 },\r
- { 4, { 0 }, 2, { 1 }, { 9 }, 1, 0, 0, 0, 0 },\r
- { 5, { 0 }, 2, { 0 }, { 4 }, 1, 0, 0, 0, 0 },\r
- { 6, { 0 }, 2, { 1 }, { 4 }, 1, 0, 0, 0, 0 },\r
- { 7, { 0 }, 1, { 0 }, { 9 }, 1, 0, 0, 0, 0 },\r
- { 8, { 0 }, 1, { 0 }, { 8 }, 1, 0, 0, 0, 0 },\r
- { 9, { 0 }, 1, { 0 }, { 7 }, 1, 0, 0, 0, 0 },\r
- { 10, { 0 }, 1, { 0 }, { 6 }, 1, 0, 0, 0, 0 },\r
- { 11, { 0 }, 1, { 0 }, { 5 }, 1, 0, 0, 0, 0 },\r
- { 12, { 0 }, 1, { 0 }, { 4 }, 1, 0, 0, 0, 0 },\r
- { 13, { 0 }, 1, { 0 }, { 3 }, 1, 0, 0, 0, 0 },\r
- { 14, { 0 }, 1, { 0 }, { 2 }, 1, 0, 0, 0, 0 },\r
- { 15, { 0 }, 1, { 0 }, { 1, 6 }, 2, 0, 0, 0, 0 },\r
- { 16, { 0 }, 1, { 0 }, { 1, 6 }, 2, 7, 0, 0, 0 },\r
- { 17, { 0 }, 1, { 0 }, { 4, 9 }, 2, 0, 0, 0, 0 },\r
- { 18, { 0 }, 1, { 0 }, { 3, 8 }, 2, 0, 0, 0, 0 },\r
- { 19, { 0 }, 1, { 0 }, { 2, 7 }, 2, 0, 0, 0, 0 },\r
- { 20, { 0 }, 1, { 0 }, { 8, 9 }, 2, 0, 0, 0, 0 },\r
- { 21, { 0 }, 1, { 0 }, { 4, 8, 9 }, 3, 0, 0, 0, 0 },\r
- { 22, { 0 }, 1, { 0 }, { 3, 4, 9 }, 3, 0, 0, 0, 0 },\r
- { 23, { 0 }, 1, { 0 }, { 7, 8, 9 }, 3, 0, 0, 0, 0 },\r
- { 24, { 0 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 0, 0, 0, 0 },\r
- { 25, { 0 }, 1, { 0 }, { 6, 7, 8, 9 }, 4, 0, 0, 0, 0 },\r
- { 26, { 0 }, 1, { 0 }, { 1, 4, 6, 9 }, 4, 0, 0, 0, 0 },\r
- { 27, { 0 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 0, 0, 0 },\r
- { 28, { 1 }, 16, { 1 }, { 7 }, 1, 0, 0, 0, 0 },\r
- { 29, { 1 }, 8, { 1 }, { 7 }, 1, 0, 0, 0, 0 },\r
- { 30, { 1 }, 4, { 1 }, { 7 }, 1, 0, 0, 0, 0 },\r
- { 31, { 1 }, 2, { 0 }, { 7 }, 1, 0, 0, 0, 0 },\r
- { 32, { 1 }, 2, { 1 }, { 7 }, 1, 0, 0, 0, 0 },\r
- { 33, { 1 }, 1, { 0 }, { 7 }, 1, 0, 0, 0, 0 },\r
- { 34, { 2 }, 16, { 1 }, { 6 }, 1, 0, 0, 0, 0 },\r
- { 35, { 2 }, 8, { 1 }, { 6 }, 1, 0, 0, 0, 0 },\r
- { 36, { 2 }, 4, { 1 }, { 6 }, 1, 0, 0, 0, 0 },\r
- { 37, { 2 }, 2, { 0 }, { 6 }, 1, 7, 0, 0, 0 },\r
- { 38, { 2 }, 2, { 1 }, { 6 }, 1, 7, 0, 0, 0 },\r
- { 39, { 2 }, 1, { 0 }, { 6 }, 1, 7, 0, 0, 0 },\r
- { 40, { 3 }, 16, { 1 }, { 9 }, 1, 0, 0, 0, 0 },\r
- { 41, { 3 }, 8, { 1 }, { 9 }, 1, 0, 0, 0, 0 },\r
- { 42, { 3 }, 4, { 1 }, { 9 }, 1, 0, 0, 0, 0 },\r
- { 43, { 3 }, 2, { 0 }, { 9 }, 1, 0, 0, 0, 0 },\r
- { 44, { 3 }, 2, { 1 }, { 9 }, 1, 0, 0, 0, 0 },\r
- { 45, { 3 }, 2, { 0 }, { 4 }, 1, 0, 0, 0, 0 },\r
- { 46, { 3 }, 2, { 1 }, { 4 }, 1, 0, 0, 0, 0 },\r
- { 47, { 3 }, 1, { 0 }, { 9 }, 1, 0, 0, 0, 0 },\r
- { 48, { 3 }, 1, { 0 }, { 8 }, 1, 0, 0, 0, 0 },\r
- { 49, { 3 }, 1, { 0 }, { 7 }, 1, 0, 0, 0, 0 },\r
- { 50, { 3 }, 1, { 0 }, { 6 }, 1, 0, 0, 0, 0 },\r
- { 51, { 3 }, 1, { 0 }, { 5 }, 1, 0, 0, 0, 0 },\r
- { 52, { 3 }, 1, { 0 }, { 4 }, 1, 0, 0, 0, 0 },\r
- { 53, { 3 }, 1, { 0 }, { 3 }, 1, 0, 0, 0, 0 },\r
- { 54, { 3 }, 1, { 0 }, { 2 }, 1, 0, 0, 0, 0 },\r
- { 55, { 3 }, 1, { 0 }, { 1, 6 }, 2, 0, 0, 0, 0 },\r
- { 56, { 3 }, 1, { 0 }, { 1, 6 }, 2, 7, 0, 0, 0 },\r
- { 57, { 3 }, 1, { 0 }, { 4, 9 }, 2, 0, 0, 0, 0 },\r
- { 58, { 3 }, 1, { 0 }, { 3, 8 }, 2, 0, 0, 0, 0 },\r
- { 59, { 3 }, 1, { 0 }, { 2, 7 }, 2, 0, 0, 0, 0 },\r
- { 60, { 3 }, 1, { 0 }, { 8, 9 }, 2, 0, 0, 0, 0 },\r
- { 61, { 3 }, 1, { 0 }, { 4, 8, 9 }, 3, 0, 0, 0, 0 },\r
- { 62, { 3 }, 1, { 0 }, { 3, 4, 9 }, 3, 0, 0, 0, 0 },\r
- { 63, { 3 }, 1, { 0 }, { 7, 8, 9 }, 3, 0, 0, 0, 0 },\r
- { 64, { 3 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 0, 0, 0, 0 },\r
- { 65, { 3 }, 1, { 0 }, { 1, 4, 6, 9 }, 4, 0, 0, 0, 0 },\r
- { 66, { 3 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 0, 0, 0 },\r
- { 67, { FORMAT_A1 }, 18, { 1 }, { 9 }, 1, 0, 2, 6, 2 },\r
- { 68, { FORMAT_A1 }, 8, { 1 }, { 9 }, 1, 0, 2, 6, 2 },\r
- { 69, { FORMAT_A1 }, 4, { 1 }, { 9 }, 1, 0, 1, 6, 2 },\r
- { 70, { FORMAT_A1 }, 2, { 1 }, { 9 }, 1, 0, 1, 6, 2 },\r
- { 71, { FORMAT_A1 }, 2, { 1 }, { 4, 9 }, 2, 7, 1, 3, 2 },\r
- { 72, { FORMAT_A1 }, 2, { 1 }, { 7, 9 }, 2, 7, 1, 3, 2 },\r
- { 73, { FORMAT_A1 }, 2, { 1 }, { 7, 9 }, 2, 0, 1, 6, 2 },\r
- { 74, { FORMAT_A1 }, 2, { 1 }, { 8, 9 }, 2, 0, 2, 6, 2 },\r
- { 75, { FORMAT_A1 }, 2, { 1 }, { 4, 9 }, 2, 0, 2, 6, 2 },\r
- { 76, { FORMAT_A1 }, 2, { 1 }, { 2, 3, 4, 7, 8, 9 }, 6, 0, 1, 6, 2 },\r
- { 77, { FORMAT_A1 }, 1, { 0 }, { 9 }, 1, 0, 2, 6, 2 },\r
- { 78, { FORMAT_A1 }, 1, { 0 }, { 9 }, 1, 7, 1, 3, 2 },\r
- { 79, { FORMAT_A1 }, 1, { 0 }, { 9 }, 1, 0, 1, 6, 2 },\r
- { 80, { FORMAT_A1 }, 1, { 0 }, { 8, 9 }, 2, 0, 2, 6, 2 },\r
- { 81, { FORMAT_A1 }, 1, { 0 }, { 4, 9 }, 2, 0, 1, 6, 2 },\r
- { 82, { FORMAT_A1 }, 1, { 0 }, { 7, 9 }, 2, 7, 1, 3, 2 },\r
- { 83, { FORMAT_A1 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 0, 1, 6, 2 },\r
- { 84, { FORMAT_A1 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 0, 2, 6, 2 },\r
- { 85, { FORMAT_A1 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 1, 6, 2 },\r
- { 86, { FORMAT_A1 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 0, 1, 3, 2 },\r
- { 87, { FORMAT_A2 }, 16, { 1 }, { 9 }, 1, 0, 2, 3, 4 },\r
- { 88, { FORMAT_A2 }, 8, { 1 }, { 9 }, 1, 0, 2, 3, 4 },\r
- { 89, { FORMAT_A2 }, 4, { 1 }, { 9 }, 1, 0, 1, 3, 4 },\r
- { 90, { FORMAT_A2 }, 2, { 1 }, { 7, 9 }, 2, 0, 1, 3, 4 },\r
- { 91, { FORMAT_A2 }, 2, { 1 }, { 8, 9 }, 2, 0, 2, 3, 4 },\r
- { 92, { FORMAT_A2 }, 2, { 1 }, { 7, 9 }, 2, 9, 1, 1, 4 },\r
- { 93, { FORMAT_A2 }, 2, { 1 }, { 4, 9 }, 2, 9, 1, 1, 4 },\r
- { 94, { FORMAT_A2 }, 2, { 1 }, { 4, 9 }, 2, 0, 2, 3, 4 },\r
- { 95, { FORMAT_A2 }, 16, { 1 }, { 2, 3, 4, 7, 8, 9 }, 6, 0, 1, 3, 4 },\r
- { 96, { FORMAT_A2 }, 1, { 0 }, { 2 }, 1, 0, 1, 3, 4 },\r
- { 97, { FORMAT_A2 }, 1, { 0 }, { 9 }, 1, 0, 1, 3, 4 },\r
- { 98, { FORMAT_A2 }, 2, { 1 }, { 9 }, 1, 0, 1, 3, 4 },\r
- { 99, { FORMAT_A2 }, 1, { 0 }, { 9 }, 1, 0, 2, 3, 4 },\r
- { 100, { FORMAT_A2 }, 1, { 0 }, { 9 }, 1, 9, 1, 1, 4 },\r
- { 101, { FORMAT_A2 }, 1, { 0 }, { 9 }, 1, 0, 1, 3, 4 },\r
- { 102, { FORMAT_A2 }, 1, { 0 }, { 2, 7 }, 2, 0, 1, 3, 4 },\r
- { 103, { FORMAT_A2 }, 1, { 0 }, { 8, 9 }, 2, 0, 2, 3, 4 },\r
- { 104, { FORMAT_A2 }, 1, { 0 }, { 4, 9 }, 2, 0, 1, 3, 4 },\r
- { 105, { FORMAT_A2 }, 1, { 0 }, { 7, 9 }, 2, 9, 1, 1, 4 },\r
- { 106, { FORMAT_A2 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 0, 1, 3, 4 },\r
- { 107, { FORMAT_A2 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 0, 2, 3, 4 },\r
- { 108, { FORMAT_A2 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 1, 3, 4 },\r
- { 109, { FORMAT_A2 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 9, 1, 1, 4 },\r
- { 110, { FORMAT_A3 }, 16, { 1 }, { 9 }, 1, 0, 2, 2, 6 },\r
- { 111, { FORMAT_A3 }, 8, { 1 }, { 9 }, 1, 0, 2, 2, 6 },\r
- { 112, { FORMAT_A3 }, 4, { 1 }, { 9 }, 1, 0, 1, 2, 6 },\r
- { 113, { FORMAT_A3 }, 2, { 1 }, { 4, 9 }, 2, 7, 1, 1, 6 },\r
- { 114, { FORMAT_A3 }, 2, { 1 }, { 7, 9 }, 2, 7, 1, 1, 6 },\r
- { 115, { FORMAT_A3 }, 2, { 1 }, { 7, 9 }, 2, 0, 1, 2, 6 },\r
- { 116, { FORMAT_A3 }, 2, { 1 }, { 4, 9 }, 2, 0, 2, 2, 6 },\r
- { 117, { FORMAT_A3 }, 2, { 1 }, { 8, 9 }, 2, 0, 2, 2, 6 },\r
- { 118, { FORMAT_A3 }, 2, { 1 }, { 2, 3, 4, 7, 8, 9 }, 6, 0, 1, 2, 6 },\r
- { 119, { FORMAT_A3 }, 1, { 0 }, { 2 }, 1, 0, 1, 2, 6 },\r
- { 120, { FORMAT_A3 }, 1, { 0 }, { 7 }, 1, 0, 1, 2, 6 },\r
- { 121, { FORMAT_A3 }, 2, { 1 }, { 9 }, 1, 0, 1, 2, 6 },\r
- { 122, { FORMAT_A3 }, 1, { 0 }, { 9 }, 1, 0, 2, 2, 6 },\r
- { 123, { FORMAT_A3 }, 1, { 0 }, { 9 }, 1, 7, 1, 1, 6 },\r
- { 124, { FORMAT_A3 }, 1, { 0 }, { 9 }, 1, 0, 1, 2, 6 },\r
- { 125, { FORMAT_A3 }, 1, { 0 }, { 2, 7 }, 2, 0, 1, 2, 6 },\r
- { 126, { FORMAT_A3 }, 1, { 0 }, { 8, 9 }, 2, 0, 2, 2, 6 },\r
- { 127, { FORMAT_A3 }, 1, { 0 }, { 4, 9 }, 2, 0, 1, 2, 6 },\r
- { 128, { FORMAT_A3 }, 1, { 0 }, { 7, 9 }, 2, 7, 1, 1, 6 },\r
- { 129, { FORMAT_A3 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 0, 1, 2, 6 },\r
- { 130, { FORMAT_A3 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 0, 2, 2, 6 },\r
- { 131, { FORMAT_A3 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 1, 2, 6 },\r
- { 132, { FORMAT_A3 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 7, 1, 1, 6 },\r
- { 133, { FORMAT_B1 }, 4, { 1 }, { 9 }, 1, 2, 1, 6, 2 },\r
- { 134, { FORMAT_B1 }, 2, { 1 }, { 9 }, 1, 2, 1, 6, 2 },\r
- { 135, { FORMAT_B1 }, 2, { 1 }, { 7, 9 }, 2, 2, 1, 6, 2 },\r
- { 136, { FORMAT_B1 }, 2, { 1 }, { 4, 9 }, 2, 8, 1, 3, 2 },\r
- { 137, { FORMAT_B1 }, 2, { 1 }, { 4, 9 }, 2, 2, 2, 6, 2 },\r
- { 138, { FORMAT_B1 }, 1, { 0 }, { 9 }, 1, 2, 2, 6, 2 },\r
- { 139, { FORMAT_B1 }, 1, { 0 }, { 9 }, 1, 8, 1, 3, 2 },\r
- { 140, { FORMAT_B1 }, 1, { 0 }, { 9 }, 1, 2, 1, 6, 2 },\r
- { 141, { FORMAT_B1 }, 1, { 0 }, { 8, 9 }, 2, 2, 2, 6, 2 },\r
- { 142, { FORMAT_B1 }, 1, { 0 }, { 4, 9 }, 2, 2, 1, 6, 2 },\r
- { 143, { FORMAT_B1 }, 1, { 0 }, { 7, 9 }, 2, 8, 1, 3, 2 },\r
- { 144, { FORMAT_B1 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 2, 1, 6, 2 },\r
- { 145, { FORMAT_B4 }, 16, { 1 }, { 9 }, 1, 0, 2, 1, 12 },\r
- { 146, { FORMAT_B4 }, 8, { 1 }, { 9 }, 1, 0, 2, 1, 12 },\r
- { 147, { FORMAT_B4 }, 4, { 1 }, { 9 }, 1, 2, 1, 1, 12 },\r
- { 148, { FORMAT_B4 }, 2, { 1 }, { 9 }, 1, 0, 1, 1, 12 },\r
- { 149, { FORMAT_B4 }, 2, { 1 }, { 9 }, 1, 2, 1, 1, 12 },\r
- { 150, { FORMAT_B4 }, 2, { 1 }, { 7, 9 }, 2, 2, 1, 1, 12 },\r
- { 151, { FORMAT_B4 }, 2, { 1 }, { 4, 9 }, 2, 2, 1, 1, 12 },\r
- { 152, { FORMAT_B4 }, 2, { 1 }, { 4, 9 }, 2, 0, 2, 1, 12 },\r
- { 153, { FORMAT_B4 }, 2, { 1 }, { 8, 9 }, 2, 0, 2, 1, 12 },\r
- { 154, { FORMAT_B4 }, 2, { 1 }, { 2, 3, 4, 7, 8, 9 }, 6, 0, 1, 1, 12 },\r
- { 155, { FORMAT_B4 }, 1, { 0 }, { 1 }, 1, 0, 1, 1, 12 },\r
- { 156, { FORMAT_B4 }, 1, { 0 }, { 2 }, 1, 0, 1, 1, 12 },\r
- { 157, { FORMAT_B4 }, 1, { 0 }, { 4 }, 1, 0, 1, 1, 12 },\r
- { 158, { FORMAT_B4 }, 1, { 0 }, { 7 }, 1, 0, 1, 1, 12 },\r
- { 159, { FORMAT_B4 }, 1, { 0 }, { 9 }, 1, 0, 1, 1, 12 },\r
- { 160, { FORMAT_B4 }, 1, { 0 }, { 9 }, 1, 2, 1, 1, 12 },\r
- { 161, { FORMAT_B4 }, 1, { 0 }, { 9 }, 1, 0, 2, 1, 12 },\r
- { 162, { FORMAT_B4 }, 1, { 0 }, { 4, 9 }, 2, 2, 1, 1, 12 },\r
- { 163, { FORMAT_B4 }, 1, { 0 }, { 7, 9 }, 2, 2, 1, 1, 12 },\r
- { 164, { FORMAT_B4 }, 1, { 0 }, { 8, 9 }, 2, 0, 2, 1, 12 },\r
- { 165, { FORMAT_B4 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 2, 1, 1, 12 },\r
- { 166, { FORMAT_B4 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 2, 1, 1, 12 },\r
- { 167, { FORMAT_B4 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 0, 2, 1, 12 },\r
- { 168, { FORMAT_B4 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 2, 1, 1, 12 },\r
- { 169, { FORMAT_C0 }, 16, { 1 }, { 9 }, 1, 2, 2, 6, 2 },\r
- { 170, { FORMAT_C0 }, 8, { 1 }, { 9 }, 1, 2, 2, 6, 2 },\r
- { 171, { FORMAT_C0 }, 4, { 1 }, { 9 }, 1, 2, 1, 6, 2 },\r
- { 172, { FORMAT_C0 }, 2, { 1 }, { 9 }, 1, 2, 1, 6, 2 },\r
- { 173, { FORMAT_C0 }, 2, { 1 }, { 8, 9 }, 2, 2, 2, 6, 2 },\r
- { 174, { FORMAT_C0 }, 2, { 1 }, { 7, 9 }, 2, 2, 1, 6, 2 },\r
- { 175, { FORMAT_C0 }, 2, { 1 }, { 7, 9 }, 2, 8, 1, 3, 2 },\r
- { 176, { FORMAT_C0 }, 2, { 1 }, { 4, 9 }, 2, 8, 1, 3, 2 },\r
- { 177, { FORMAT_C0 }, 2, { 1 }, { 4, 9 }, 2, 2, 2, 6, 2 },\r
- { 178, { FORMAT_C0 }, 2, { 1 }, { 2, 3, 4, 7, 8, 9 }, 6, 2, 1, 6, 2 },\r
- { 179, { FORMAT_C0 }, 1, { 0 }, { 9 }, 1, 2, 2, 6, 2 },\r
- { 180, { FORMAT_C0 }, 1, { 0 }, { 9 }, 1, 8, 1, 3, 2 },\r
- { 181, { FORMAT_C0 }, 1, { 0 }, { 9 }, 1, 2, 1, 6, 2 },\r
- { 182, { FORMAT_C0 }, 1, { 0 }, { 8, 9 }, 2, 2, 2, 6, 2 },\r
- { 183, { FORMAT_C0 }, 1, { 0 }, { 4, 9 }, 2, 2, 1, 6, 2 },\r
- { 184, { FORMAT_C0 }, 1, { 0 }, { 7, 9 }, 2, 8, 1, 3, 2 },\r
- { 185, { FORMAT_C0 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 2, 1, 6, 2 },\r
- { 186, { FORMAT_C0 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 2, 2, 6, 2 },\r
- { 187, { FORMAT_C0 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 2, 1, 6, 2 },\r
- { 188, { FORMAT_C0 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 8, 1, 3, 2 },\r
- { 189, { FORMAT_C2 }, 16, { 1 }, { 9 }, 1, 2, 2, 2, 6 },\r
- { 190, { FORMAT_C2 }, 8, { 1 }, { 9 }, 1, 2, 2, 2, 6 },\r
- { 191, { FORMAT_C2 }, 4, { 1 }, { 9 }, 1, 2, 1, 2, 6 },\r
- { 192, { FORMAT_C2 }, 2, { 1 }, { 9 }, 1, 2, 1, 2, 6 },\r
- { 193, { FORMAT_C2 }, 2, { 1 }, { 8, 9 }, 2, 2, 2, 2, 6 },\r
- { 194, { FORMAT_C2 }, 2, { 1 }, { 7, 9 }, 2, 2, 1, 2, 6 },\r
- { 195, { FORMAT_C2 }, 2, { 1 }, { 7, 9 }, 2, 8, 1, 1, 6 },\r
- { 196, { FORMAT_C2 }, 2, { 1 }, { 4, 9 }, 2, 8, 1, 1, 6 },\r
- { 197, { FORMAT_C2 }, 2, { 1 }, { 4, 9 }, 2, 2, 2, 2, 6 },\r
- { 198, { FORMAT_C2 }, 2, { 1 }, { 2, 3, 4, 7, 8, 9 }, 6, 2, 1, 2, 6 },\r
- { 199, { FORMAT_C2 }, 8, { 1 }, { 9 }, 1, 8, 2, 1, 6 },\r
- { 200, { FORMAT_C2 }, 4, { 1 }, { 9 }, 1, 8, 1, 1, 6 },\r
- { 201, { FORMAT_C2 }, 1, { 0 }, { 9 }, 1, 2, 2, 2, 6 },\r
- { 202, { FORMAT_C2 }, 1, { 0 }, { 9 }, 1, 8, 1, 1, 6 },\r
- { 203, { FORMAT_C2 }, 1, { 0 }, { 9 }, 1, 2, 1, 2, 6 },\r
- { 204, { FORMAT_C2 }, 1, { 0 }, { 8, 9 }, 2, 2, 2, 2, 6 },\r
- { 205, { FORMAT_C2 }, 1, { 0 }, { 4, 9 }, 2, 2, 1, 2, 6 },\r
- { 206, { FORMAT_C2 }, 1, { 0 }, { 7, 9 }, 2, 8, 1, 1, 6 },\r
- { 207, { FORMAT_C2 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 2, 1, 2, 6 },\r
- { 208, { FORMAT_C2 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 2, 2, 2, 6 },\r
- { 209, { FORMAT_C2 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 2, 1, 2, 6 },\r
- { 210, { FORMAT_C2 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 8, 1, 1, 6 },\r
- { 211, { FORMAT_A1, FORMAT_B1 }, 2, { 1 }, { 9 }, 1, 2, 1, 6, 2 },\r
- { 212, { FORMAT_A1, FORMAT_B1 }, 2, { 1 }, { 4, 9 }, 2, 8, 1, 3, 2 },\r
- { 213, { FORMAT_A1, FORMAT_B1 }, 2, { 1 }, { 7, 9 }, 2, 8, 1, 3, 2 },\r
- { 214, { FORMAT_A1, FORMAT_B1 }, 2, { 1 }, { 7, 9 }, 2, 2, 1, 6, 2 },\r
- { 215, { FORMAT_A1, FORMAT_B1 }, 2, { 1 }, { 4, 9 }, 2, 2, 2, 6, 2 },\r
- { 216, { FORMAT_A1, FORMAT_B1 }, 2, { 1 }, { 8, 9 }, 2, 2, 2, 6, 2 },\r
- { 217, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 9 }, 1, 2, 2, 6, 2 },\r
- { 218, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 9 }, 1, 8, 1, 3, 2 },\r
- { 219, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 9 }, 1, 2, 1, 6, 2 },\r
- { 220, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 8, 9 }, 2, 2, 2, 6, 2 },\r
- { 221, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 4, 9 }, 2, 2, 1, 6, 2 },\r
- { 222, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 7, 9 }, 2, 8, 1, 3, 2 },\r
- { 223, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 2, 2, 6, 2 },\r
- { 224, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 2, 1, 6, 2 },\r
- { 225, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 8, 1, 3, 2 },\r
- { 226, { FORMAT_A2, FORMAT_B2 }, 2, { 1 }, { 9 }, 1, 0, 1, 3, 4 },\r
- { 227, { FORMAT_A2, FORMAT_B2 }, 2, { 1 }, { 4, 9 }, 2, 6, 1, 2, 4 },\r
- { 228, { FORMAT_A2, FORMAT_B2 }, 2, { 1 }, { 7, 9 }, 2, 6, 1, 2, 4 },\r
- { 229, { FORMAT_A2, FORMAT_B2 }, 2, { 1 }, { 4, 9 }, 2, 0, 2, 3, 4 },\r
- { 230, { FORMAT_A2, FORMAT_B2 }, 2, { 1 }, { 8, 9 }, 2, 0, 2, 3, 4 },\r
- { 231, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 9 }, 1, 0, 2, 3, 4 },\r
- { 232, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 9 }, 1, 6, 1, 2, 4 },\r
- { 233, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 9 }, 1, 0, 1, 3, 4 },\r
- { 234, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 8, 9 }, 2, 0, 2, 3, 4 },\r
- { 235, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 4, 9 }, 2, 0, 1, 3, 4 },\r
- { 236, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 7, 9 }, 2, 6, 1, 2, 4 },\r
- { 237, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 0, 1, 3, 4 },\r
- { 238, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 0, 2, 3, 4 },\r
- { 239, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 1, 3, 4 },\r
- { 240, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 6, 1, 2, 4 },\r
- { 241, { FORMAT_A3, FORMAT_B3 }, 2, { 1 }, { 9 }, 1, 0, 1, 2, 6 },\r
- { 242, { FORMAT_A3, FORMAT_B3 }, 2, { 1 }, { 4, 9 }, 2, 2, 1, 2, 6 },\r
- { 243, { FORMAT_A3, FORMAT_B3 }, 2, { 1 }, { 7, 9 }, 2, 0, 1, 2, 6 },\r
- { 244, { FORMAT_A3, FORMAT_B3 }, 2, { 1 }, { 7, 9 }, 2, 2, 1, 2, 6 },\r
- { 245, { FORMAT_A3, FORMAT_B3 }, 2, { 1 }, { 4, 9 }, 2, 0, 2, 2, 6 },\r
- { 246, { FORMAT_A3, FORMAT_B3 }, 2, { 1 }, { 8, 9 }, 2, 0, 2, 2, 6 },\r
- { 247, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 9 }, 1, 0, 2, 2, 6 },\r
- { 248, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 9 }, 1, 2, 1, 2, 6 },\r
- { 249, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 9 }, 1, 0, 1, 2, 6 },\r
- { 250, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 8, 9 }, 2, 0, 2, 2, 6 },\r
- { 251, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 4, 9 }, 2, 0, 1, 2, 6 },\r
- { 252, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 7, 9 }, 2, 2, 1, 2, 6 },\r
- { 253, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 3, 4, 8, 9 }, 3, 0, 2, 2, 6 },\r
- { 254, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 1, 2, 6 },\r
- { 255, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 2, 1, 2, 6 },\r
-};\r
-\r
-/* 3GPP 38.211-f20 Table - 6.3.3.2-4 */\r
-const xRANPrachConfigTableStruct gxranPrachDataTable_mmw[XRAN_PRACH_CONFIG_TABLE_SIZE] =\r
-{\r
- { 0, { FORMAT_A1 }, 16, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 6, 2 },\r
- { 1, { FORMAT_A1 }, 16, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 6, 2 },\r
- { 2, { FORMAT_A1 }, 8, { 1, 2 }, { 9, 19, 29, 39 }, 4, 0, 2, 6, 2 },\r
- { 3, { FORMAT_A1 }, 8, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 6, 2 },\r
- { 4, { FORMAT_A1 }, 8, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 6, 2 },\r
- { 5, { FORMAT_A1 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 6, 2 },\r
- { 6, { FORMAT_A1 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 6, 2 },\r
- { 7, { FORMAT_A1 }, 4, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 6, 2 },\r
- { 8, { FORMAT_A1 }, 2, { 1 }, { 7, 15, 23, 31, 39 }, 5, 0, 2, 6, 2 },\r
- { 9, { FORMAT_A1 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 6, 2 },\r
- { 10, { FORMAT_A1 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 6, 2 },\r
- { 11, { FORMAT_A1 }, 2, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 6, 2 },\r
- { 12, { FORMAT_A1 }, 1, { 0 }, { 19, 39 }, 2, 7, 1, 3, 2 },\r
- { 13, { FORMAT_A1 }, 1, { 0 }, { 3, 5, 7 }, 2, 0, 1, 6, 2 },\r
- { 14, { FORMAT_A1 }, 1, { 0 }, { 24, 29, 34, 39 }, 4, 7, 1, 3, 2 },\r
- { 15, { FORMAT_A1 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 7, 2, 3, 2 },\r
- { 16, { FORMAT_A1 }, 1, { 0 }, { 17, 19, 37, 39 }, 4, 0, 1, 6, 2 },\r
- { 17, { FORMAT_A1 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 0, 2, 6, 2 },\r
- { 18, { FORMAT_A1 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 6, 2 },\r
- { 19, { FORMAT_A1 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 7, 1, 3, 2 },\r
- { 20, { FORMAT_A1 }, 1, { 0 }, { 3, 5, 7, 9, 11, 13 }, 6, 7, 1, 3, 2 },\r
- { 21, { FORMAT_A1 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 7, 1, 3, 2 },\r
- { 22, { FORMAT_A1 }, 1, { 0 }, { 7, 15, 23, 31, 39 }, 5, 0, 1, 6, 2 },\r
- { 23, { FORMAT_A1 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 0, 1, 6, 2 },\r
- { 24, { FORMAT_A1 }, 1, { 0 }, { 13, 14, 15, 29, 30, 31, 37, 38, 39 }, 10, 7, 2, 3, 2 },\r
- { 25, { FORMAT_A1 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 7, 1, 3, 2 },\r
- { 26, { FORMAT_A1 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 6, 2 },\r
- { 27, { FORMAT_A1 }, 1, { 0 }, { 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21,\r
- 23, 25, 27, 29, 31, 33, 35, 37, 39 }, 15, 0, 1, 6, 2 },\r
- { 28, { FORMAT_A1 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,\r
- 14, 15, 16, 17, 18, 19, 20, 21, 22, 23,\r
- 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,\r
- 34, 35, 36, 37, 38, 39 }, 40, 7, 1, 3, 2 },\r
- { 29, { FORMAT_A2 }, 16, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 3, 4 },\r
- { 30, { FORMAT_A2 }, 16, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 3, 4 },\r
- { 31, { FORMAT_A2 }, 8, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 10, 0, 2, 3, 4 },\r
- { 32, { FORMAT_A2 }, 8, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 3, 4 },\r
- { 33, { FORMAT_A2 }, 8, { 1, 2 }, { 9, 19, 29, 39 }, 4, 0, 2, 3, 4 },\r
- { 34, { FORMAT_A2 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 3, 4 },\r
- { 35, { FORMAT_A2 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 3, 4 },\r
- { 36, { FORMAT_A2 }, 4, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 3, 4 },\r
- { 37, { FORMAT_A2 }, 2, { 1 }, { 7, 15, 23, 31, 39 }, 5, 0, 2, 3, 4 },\r
- { 38, { FORMAT_A2 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 3, 4 },\r
- { 39, { FORMAT_A2 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 3, 4 },\r
- { 40, { FORMAT_A2 }, 2, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 3, 4 },\r
- { 41, { FORMAT_A2 }, 1, { 0 }, { 19, 39 }, 2, 5, 1, 2, 4 },\r
- { 42, { FORMAT_A2 }, 1, { 0 }, { 3, 5, 7 }, 3, 0, 1, 3, 4 },\r
- { 43, { FORMAT_A2 }, 1, { 0 }, { 24, 29, 34, 39 }, 4, 5, 1, 2, 4 },\r
- { 44, { FORMAT_A2 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 5, 2, 2, 4 },\r
- { 45, { FORMAT_A2 }, 1, { 0 }, { 17, 19, 37, 39 }, 4, 0, 1, 3, 4 },\r
- { 46, { FORMAT_A2 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 0, 2, 3, 4 },\r
- { 47, { FORMAT_A2 }, 1, { 0 }, { 7, 15, 23, 31, 39 }, 5, 0, 1, 3, 4 },\r
- { 48, { FORMAT_A2 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 5, 1, 2, 4 },\r
- { 49, { FORMAT_A2 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 0, 1, 3, 4 },\r
- { 50, { FORMAT_A2 }, 1, { 0 }, { 3, 5, 7, 9, 11, 13 }, 6, 5, 1, 2, 4 },\r
- { 51, { FORMAT_A2 }, 1, { 0 }, { 3, 5, 7, 9, 11, 13 }, 6, 0, 1, 3, 4 },\r
- { 52, { FORMAT_A2 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 5, 1, 2, 4 },\r
- { 53, { FORMAT_A2 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 3, 4 },\r
- { 54, { FORMAT_A2 }, 1, { 0 }, { 13, 14, 15, 29, 30, 31, 37, 38, 39 }, 10, 5, 2, 2, 4 },\r
- { 55, { FORMAT_A2 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 5, 1, 2, 4 },\r
- { 56, { FORMAT_A2 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 3, 4 },\r
- { 57, { FORMAT_A2 }, 1, { 0 }, { 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21,\r
- 23, 25, 27, 29, 31, 33, 35, 37, 39 }, 15, 0, 1, 3, 4 },\r
- { 58, { FORMAT_A2 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,\r
- 14, 15, 16, 17, 18, 19, 20, 21, 22, 23,\r
- 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,\r
- 34, 35, 36, 37, 38, 39 }, 40, 5, 1, 2, 4 },\r
- { 59, { FORMAT_A3 }, 16, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 2, 6 },\r
- { 60, { FORMAT_A3 }, 16, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 2, 6 },\r
- { 61, { FORMAT_A3 }, 8, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 2, 6 },\r
- { 62, { FORMAT_A3 }, 8, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 2, 6 },\r
- { 63, { FORMAT_A3 }, 8, { 1, 2 }, { 9, 19, 29, 39 }, 4, 0, 2, 2, 6 },\r
- { 64, { FORMAT_A3 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 2, 6 },\r
- { 65, { FORMAT_A3 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 2, 6 },\r
- { 66, { FORMAT_A3 }, 4, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 2, 6 },\r
- { 67, { FORMAT_A3 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 2, 6 },\r
- { 68, { FORMAT_A3 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 2, 6 },\r
- { 69, { FORMAT_A3 }, 2, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 2, 6 },\r
- { 70, { FORMAT_A3 }, 1, { 0 }, { 19, 39 }, 2, 7, 1, 1, 6 },\r
- { 71, { FORMAT_A3 }, 1, { 0 }, { 3, 5, 7 }, 3, 0, 1, 2, 6 },\r
- { 72, { FORMAT_A3 }, 1, { 0 }, { 9, 11, 13 }, 3, 2, 1, 2, 6 },\r
- { 73, { FORMAT_A3 }, 1, { 0 }, { 24, 29, 34, 39 }, 4, 7, 1, 1, 6 },\r
- { 74, { FORMAT_A3 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 7, 2, 1, 6 },\r
- { 75, { FORMAT_A3 }, 1, { 0 }, { 17, 19, 37, 39 }, 4, 0, 1, 2, 6 },\r
- { 76, { FORMAT_A3 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 0, 2, 2, 6 },\r
- { 77, { FORMAT_A3 }, 1, { 0 }, { 7, 15, 23, 31, 39 }, 5, 0, 1, 2, 6 },\r
- { 78, { FORMAT_A3 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 7, 1, 1, 6 },\r
- { 79, { FORMAT_A3 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 0, 1, 2, 6 },\r
- { 80, { FORMAT_A3 }, 1, { 0 }, { 3, 5, 7, 9, 11, 13 }, 6, 0, 1, 2, 6 },\r
- { 81, { FORMAT_A3 }, 1, { 0 }, { 3, 5, 7, 9, 11, 13 }, 6, 7, 1, 1, 6 },\r
- { 82, { FORMAT_A3 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 2, 6 },\r
- { 83, { FORMAT_A3 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 7, 1, 1, 6 },\r
- { 84, { FORMAT_A3 }, 1, { 0 }, { 13, 14, 15, 29, 30, 31, 37, 38, 39 }, 10, 7, 2, 1, 6 },\r
- { 85, { FORMAT_A3 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 7, 1, 1, 6 },\r
- { 86, { FORMAT_A3 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 2, 6 },\r
- { 87, { FORMAT_A3 }, 1, { 0 }, { 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21,\r
- 23, 25, 27, 29, 31, 33, 35, 37, 39 }, 15, 0, 1, 2, 6 },\r
- { 88, { FORMAT_A3 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,\r
- 14, 15, 16, 17, 18, 19, 20, 21, 22, 23,\r
- 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,\r
- 34, 35, 36, 37, 38, 39 }, 40, 7, 1, 1, 6 },\r
- { 89, { FORMAT_B1 }, 16, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 2, 6, 2 },\r
- { 90, { FORMAT_B1 }, 8, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 2, 6, 2 },\r
- { 91, { FORMAT_B1 }, 8, { 1, 2 }, { 9, 19, 29, 39 }, 4, 2, 2, 6, 2 },\r
- { 92, { FORMAT_B1 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 2, 6, 2 },\r
- { 93, { FORMAT_B1 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 2, 6, 2 },\r
- { 94, { FORMAT_B1 }, 2, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 1, 6, 2 },\r
- { 95, { FORMAT_B1 }, 1, { 0 }, { 19, 39 }, 2, 8, 1, 3, 2 },\r
- { 96, { FORMAT_B1 }, 1, { 0 }, { 3, 5, 7 }, 3, 2, 1, 6, 2 },\r
- { 97, { FORMAT_B1 }, 1, { 0 }, { 24, 29, 34, 39 }, 4, 8, 1, 3, 2 },\r
- { 98, { FORMAT_B1 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 8, 2, 3, 2 },\r
- { 99, { FORMAT_B1 }, 1, { 0 }, { 17, 19, 37, 39 }, 4, 2, 1, 6, 2 },\r
- { 100, { FORMAT_B1 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 2, 2, 6, 2 },\r
- { 101, { FORMAT_B1 }, 1, { 0 }, { 7, 15, 23, 31, 39 }, 5, 2, 1, 6, 2 },\r
- { 102, { FORMAT_B1 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 8, 1, 3, 2 },\r
- { 103, { FORMAT_B1 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 2, 1, 6, 2 },\r
- { 104, { FORMAT_B1 }, 1, { 0 }, { 3, 5, 7, 9, 11, 13 }, 6, 8, 1, 3, 2 },\r
- { 105, { FORMAT_B1 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 8, 1, 3, 2 },\r
- { 106, { FORMAT_B1 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 6, 2 },\r
- { 107, { FORMAT_B1 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 8, 1, 3, 2 },\r
- { 108, { FORMAT_B1 }, 1, { 0 }, { 13, 14, 15, 29, 30, 31, 37, 38, 39 }, 10, 8, 2, 3, 2 },\r
- { 109, { FORMAT_B1 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 1, 6, 2 },\r
- { 110, { FORMAT_B1 }, 1, { 0 }, { 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21,\r
- 23, 25, 27, 29, 31, 33, 35, 37, 39 }, 15, 2, 1, 6, 2 },\r
- { 111, { FORMAT_B1 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,\r
- 14, 15, 16, 17, 18, 19, 20, 21, 22, 23,\r
- 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,\r
- 34, 35, 36, 37, 38, 39 }, 40, 8, 1, 3, 2 },\r
- { 112, { FORMAT_B4 }, 16, { 1, 2 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 1, 12 },\r
- { 113, { FORMAT_B4 }, 16, { 1, 2 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 1, 12 },\r
- { 114, { FORMAT_B4 }, 8, { 1, 2 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 1, 12 },\r
- { 115, { FORMAT_B4 }, 8, { 1, 2 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 1, 12 },\r
- { 116, { FORMAT_B4 }, 8, { 1, 2 }, { 9, 19, 29, 39 }, 4, 0, 2, 1, 12 },\r
- { 117, { FORMAT_B4 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 1, 12 },\r
- { 118, { FORMAT_B4 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 1, 12 },\r
- { 119, { FORMAT_B4 }, 4, { 1, 2 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 1, 12 },\r
- { 120, { FORMAT_B4 }, 2, { 1 }, { 7, 15, 23, 31, 39 }, 5, 2, 2, 1, 12 },\r
- { 121, { FORMAT_B4 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 1, 12 },\r
- { 122, { FORMAT_B4 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 1, 12 },\r
- { 123, { FORMAT_B4 }, 2, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 1, 12 },\r
- { 124, { FORMAT_B4 }, 1, { 0 }, { 19, 39 }, 2, 2, 2, 1, 12 },\r
- { 125, { FORMAT_B4 }, 1, { 0 }, { 17, 19, 37, 39 }, 4, 0, 1, 1, 12 },\r
- { 126, { FORMAT_B4 }, 1, { 0 }, { 24, 29, 34, 39 }, 4, 2, 1, 1, 12 },\r
- { 127, { FORMAT_B4 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 2, 2, 1, 12 },\r
- { 128, { FORMAT_B4 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 0, 2, 1, 12 },\r
- { 129, { FORMAT_B4 }, 1, { 0 }, { 7, 15, 23, 31, 39 }, 5, 0, 1, 1, 12 },\r
- { 130, { FORMAT_B4 }, 1, { 0 }, { 7, 15, 23, 31, 39 }, 5, 0, 2, 1, 12 },\r
- { 131, { FORMAT_B4 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 0, 1, 1, 12 },\r
- { 132, { FORMAT_B4 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 2, 2, 1, 12 },\r
- { 133, { FORMAT_B4 }, 1, { 0 }, { 9, 11, 13, 15, 17, 19 }, 6, 0, 1, 1, 12 },\r
- { 134, { FORMAT_B4 }, 1, { 0 }, { 3, 5, 7, 9, 11, 13 }, 6, 2, 1, 1, 12 },\r
- { 135, { FORMAT_B4 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 1, 12 },\r
- { 136, { FORMAT_B4 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 2, 1, 12 },\r
- { 137, { FORMAT_B4 }, 1, { 0 }, { 13, 14, 15, 29, 30, 31, 37, 38, 39 }, 10, 2, 2, 1, 12 },\r
- { 138, { FORMAT_B4 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 1, 12 },\r
- { 139, { FORMAT_B4 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 1, 1, 12 },\r
- { 140, { FORMAT_B4 }, 1, { 0 }, { 3, 5, 7, 9, 11, 13, 15, 17, 19, 21,\r
- 23, 25 }, 12, 2, 1, 1, 12 },\r
- { 141, { FORMAT_B4 }, 1, { 0 }, { 3, 5, 7, 9, 11, 13, 15, 17, 19, 21,\r
- 23, 25 }, 12, 0, 2, 1, 12 },\r
- { 142, { FORMAT_B4 }, 1, { 0 }, { 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21,\r
- 23, 25, 27, 29, 31, 33, 35, 37, 39 }, 15, 0, 1, 1, 12 },\r
- { 143, { FORMAT_B4 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,\r
- 14, 15, 16, 17, 18, 19, 20, 21, 22, 23,\r
- 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,\r
- 34, 35, 36, 37, 38, 39 }, 40, 2, 1, 1, 12 },\r
- { 144, { FORMAT_C0 }, 16, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 7, 2 },\r
- { 145, { FORMAT_C0 }, 16, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 7, 2 },\r
- { 146, { FORMAT_C0 }, 8, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 7, 2 },\r
- { 147, { FORMAT_C0 }, 8, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 7, 2 },\r
- { 148, { FORMAT_C0 }, 8, { 1, 2 }, { 9, 19, 29, 39 }, 4, 0, 2, 7, 2 },\r
- { 149, { FORMAT_C0 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 7, 2 },\r
- { 150, { FORMAT_C0 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 7, 2 },\r
- { 151, { FORMAT_C0 }, 4, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 7, 2 },\r
- { 152, { FORMAT_C0 }, 2, { 1 }, { 7, 15, 23, 31, 39 }, 5, 0, 2, 7, 2 },\r
- { 153, { FORMAT_C0 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 7, 2 },\r
- { 154, { FORMAT_C0 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 7, 2 },\r
- { 155, { FORMAT_C0 }, 2, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 7, 2 },\r
- { 156, { FORMAT_C0 }, 1, { 0 }, { 19, 39 }, 2, 8, 1, 3, 2 },\r
- { 157, { FORMAT_C0 }, 1, { 0 }, { 3, 5, 7 }, 3, 0, 1, 7, 2 },\r
- { 158, { FORMAT_C0 }, 1, { 0 }, { 24, 29, 34, 39 }, 4, 8, 1, 3, 2 },\r
- { 159, { FORMAT_C0 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 8, 2, 3, 2 },\r
- { 160, { FORMAT_C0 }, 1, { 0 }, { 17, 19, 37, 39 }, 4, 0, 1, 7, 2 },\r
- { 161, { FORMAT_C0 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 0, 2, 7, 2 },\r
- { 162, { FORMAT_C0 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 8, 1, 3, 2 },\r
- { 163, { FORMAT_C0 }, 1, { 0 }, { 7, 15, 23, 31, 39 }, 5, 0, 1, 7, 2 },\r
- { 164, { FORMAT_C0 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 0, 1, 7, 2 },\r
- { 165, { FORMAT_C0 }, 1, { 0 }, { 3, 5, 7, 9, 11, 13 }, 6, 8, 1, 3, 2 },\r
- { 166, { FORMAT_C0 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 8, 1, 3, 2 },\r
- { 167, { FORMAT_C0 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 7, 2 },\r
- { 168, { FORMAT_C0 }, 1, { 0 }, { 13, 14, 15, 29, 30, 31, 37, 38, 39 }, 10, 8, 2, 3, 2 },\r
- { 169, { FORMAT_C0 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 8, 1, 3, 2 },\r
- { 170, { FORMAT_C0 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 7, 2 },\r
- { 171, { FORMAT_C0 }, 1, { 0 }, { 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21,\r
- 23, 25, 27, 29, 31, 33, 35, 37, 39 }, 15, 0, 1, 7, 2 },\r
- { 172, { FORMAT_C0 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,\r
- 14, 15, 16, 17, 18, 19, 20, 21, 22, 23,\r
- 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,\r
- 34, 35, 36, 37, 38, 39 }, 40, 8, 1, 3, 2 },\r
- { 173, { FORMAT_C2 }, 16, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 2, 6 },\r
- { 174, { FORMAT_C2 }, 16, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 2, 6 },\r
- { 175, { FORMAT_C2 }, 8, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 2, 6 },\r
- { 176, { FORMAT_C2 }, 8, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 2, 6 },\r
- { 177, { FORMAT_C2 }, 8, { 1, 2 }, { 9, 19, 29, 39 }, 4, 0, 2, 2, 6 },\r
- { 178, { FORMAT_C2 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 2, 6 },\r
- { 179, { FORMAT_C2 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 2, 6 },\r
- { 180, { FORMAT_C2 }, 4, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 2, 6 },\r
- { 181, { FORMAT_C2 }, 2, { 1 }, { 7, 15, 23, 31, 39 }, 5, 2, 2, 2, 6 },\r
- { 182, { FORMAT_C2 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 2, 6 },\r
- { 183, { FORMAT_C2 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 2, 6 },\r
- { 184, { FORMAT_C2 }, 2, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 2, 6 },\r
- { 185, { FORMAT_C2 }, 1, { 0 }, { 19, 39 }, 2, 2, 1, 2, 6 },\r
- { 186, { FORMAT_C2 }, 1, { 0 }, { 3, 5, 7 }, 3, 0, 1, 2, 6 },\r
- { 187, { FORMAT_C2 }, 1, { 0 }, { 24, 29, 34, 39 }, 4, 7, 1, 1, 6 },\r
- { 188, { FORMAT_C2 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 7, 2, 1, 6 },\r
- { 189, { FORMAT_C2 }, 1, { 0 }, { 17, 19, 37, 39 }, 4, 0, 1, 2, 6 },\r
- { 190, { FORMAT_C2 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 2, 2, 2, 6 },\r
- { 191, { FORMAT_C2 }, 1, { 0 }, { 7, 15, 23, 31, 39 }, 5, 2, 1, 2, 6 },\r
- { 192, { FORMAT_C2 }, 1, { 0 }, { 3, 5, 7, 9, 11, 13 }, 6, 7, 1, 1, 6 },\r
- { 193, { FORMAT_C2 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 7, 2, 1, 6 },\r
- { 194, { FORMAT_C2 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 0, 1, 2, 6 },\r
- { 195, { FORMAT_C2 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 7, 2, 1, 6 },\r
- { 196, { FORMAT_C2 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 2, 6 },\r
- { 197, { FORMAT_C2 }, 1, { 0 }, { 13, 14, 15, 29, 30, 31, 37, 38, 39 }, 10, 7, 2, 1, 6 },\r
- { 198, { FORMAT_C2 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 7, 1, 1, 6 },\r
- { 199, { FORMAT_C2 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 2, 6 },\r
- { 200, { FORMAT_C2 }, 1, { 0 }, { 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21,\r
- 23, 25, 27, 29, 31, 33, 35, 37, 39 }, 15, 0, 1, 2, 6 },\r
- { 201, { FORMAT_C2 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,\r
- 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32,\r
- 33, 34, 35, 36, 37, 38, 39 }, 40, 7, 1, 1, 6 },\r
- { 202, { FORMAT_A1, FORMAT_B1 }, 16, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 6, 2 },\r
- { 203, { FORMAT_A1, FORMAT_B1 }, 16, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 1, 6, 2 },\r
- { 204, { FORMAT_A1, FORMAT_B1 }, 8, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 6, 2 },\r
- { 205, { FORMAT_A1, FORMAT_B1 }, 8, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 1, 6, 2 },\r
- { 206, { FORMAT_A1, FORMAT_B1 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 6, 2 },\r
- { 207, { FORMAT_A1, FORMAT_B1 }, 4, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 1, 6, 2 },\r
- { 208, { FORMAT_A1, FORMAT_B1 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 6, 2 },\r
- { 209, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 19, 39 }, 2, 8, 1, 3, 2 },\r
- { 210, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 8, 1, 3, 2 },\r
- { 211, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 17, 19, 37, 39 }, 4, 2, 1, 6, 2 },\r
- { 212, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 2, 2, 6, 2 },\r
- { 213, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 8, 1, 3, 2 },\r
- { 214, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 7, 15, 23, 31, 39 }, 5, 2, 1, 6, 2 },\r
- { 215, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 2, 1, 6, 2 },\r
- { 216, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 8, 1, 3, 2 },\r
- { 217, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 6, 2 },\r
- { 218, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 1, 6, 2 },\r
- { 219, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21,\r
- 23, 25, 27, 29, 31, 33, 35, 37, 39 }, 15, 2, 1, 6, 2 },\r
- { 220, { FORMAT_A2, FORMAT_B2 }, 16, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 3, 4 },\r
- { 221, { FORMAT_A2, FORMAT_B2 }, 16, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 1, 3, 4 },\r
- { 222, { FORMAT_A2, FORMAT_B2 }, 8, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 3, 4 },\r
- { 223, { FORMAT_A2, FORMAT_B2 }, 8, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 1, 3, 4 },\r
- { 224, { FORMAT_A2, FORMAT_B2 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 3, 4 },\r
- { 225, { FORMAT_A2, FORMAT_B2 }, 4, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 1, 3, 4 },\r
- { 226, { FORMAT_A2, FORMAT_B2 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 3, 4 },\r
- { 227, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 19, 39 }, 2, 6, 1, 2, 4 },\r
- { 228, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 6, 1, 2, 4 },\r
- { 229, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 17, 19, 37, 39 }, 4, 2, 1, 3, 4 },\r
- { 230, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 2, 2, 3, 4 },\r
- { 231, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 6, 1, 2, 4 },\r
- { 232, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 7, 15, 23, 31, 39 }, 5, 2, 1, 3, 4 },\r
- { 233, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 2, 1, 3, 4 },\r
- { 234, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 6, 1, 2, 4 },\r
- { 235, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 3, 4 },\r
- { 236, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 1, 3, 4 },\r
- { 237, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21,\r
- 23, 25, 27, 29, 31, 33, 35, 37, 39 }, 15, 2, 1, 3, 4 },\r
- { 238, { FORMAT_A3, FORMAT_B3 }, 16, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 2, 6 },\r
- { 239, { FORMAT_A3, FORMAT_B3 }, 16, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 1, 2, 6 },\r
- { 240, { FORMAT_A3, FORMAT_B3 }, 8, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 2, 6 },\r
- { 241, { FORMAT_A3, FORMAT_B3 }, 8, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 1, 2, 6 },\r
- { 242, { FORMAT_A3, FORMAT_B3 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 2, 6 },\r
- { 243, { FORMAT_A3, FORMAT_B3 }, 4, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 1, 2, 6 },\r
- { 244, { FORMAT_A3, FORMAT_B3 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 2, 6 },\r
- { 245, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 19, 39 }, 2, 2, 1, 2, 6 },\r
- { 246, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 2, 1, 2, 6 },\r
- { 247, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 17, 19, 37, 39 }, 4, 2, 1, 2, 6 },\r
- { 248, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 2, 2, 2, 6 },\r
- { 249, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 2, 1, 2, 6 },\r
- { 250, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 2, 1, 2, 6 },\r
- { 251, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 2, 2, 6 },\r
- { 252, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 2, 6 },\r
- { 253, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 2, 2, 6 },\r
- { 254, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21,\r
- 23, 25, 27, 29, 31, 33, 35, 37, 39 }, 15, 2, 1, 2, 6 },\r
- { 255, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 7, 15, 23, 31, 39 }, 5, 2, 1, 2, 6 },\r
-};\r
-\r
-const xRANPrachPreambleLRAStruct gxranPreambleforLRA[13] =\r
-{\r
- {FORMAT_0, 839, 125, 1 , 3168 },\r
- {FORMAT_1, 839, 125, 2 ,21024 },\r
- {FORMAT_2, 839, 125, 4 , 4688 },\r
- {FORMAT_3, 839, 5, 1 , 3168 },\r
- {FORMAT_A1, 139, 15, 2 , 288 },\r
- {FORMAT_A2, 139, 15, 4 , 576 },\r
- {FORMAT_A3, 139, 15, 6 , 864 },\r
- {FORMAT_B1, 139, 15, 2 , 216 },\r
- {FORMAT_B2, 139, 15, 4 , 360 },\r
- {FORMAT_B3, 139, 15, 6 , 504 },\r
- {FORMAT_B4, 139, 15, 12, 936 },\r
- {FORMAT_C0, 139, 15, 1 , 1240},\r
- {FORMAT_C2, 139, 15, 4 , 2048}\r
-};\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief This file defines those table used in 5G NR spec.
+ * @file xran_ul_tables.c
+ * @author Intel Corporation
+ **/
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include "xran_common.h"
+
+/* 3GPP 38.211-f20 Table - 6.3.3.2-2 */
+const xRANPrachConfigTableStruct gxranPrachDataTable_sub6_fdd[XRAN_PRACH_CONFIG_TABLE_SIZE] =
+{
+ { 0, { 0 }, 16, { 1 }, { 1 }, 1, 0, 0, 0, 0 },
+ { 1, { 0 }, 16, { 1 }, { 4 }, 1, 0, 0, 0, 0 },
+ { 2, { 0 }, 16, { 1 }, { 7 }, 1, 0, 0, 0, 0 },
+ { 3, { 0 }, 16, { 1 }, { 9 }, 1, 0, 0, 0, 0 },
+ { 4, { 0 }, 8, { 1 }, { 1 }, 1, 0, 0, 0, 0 },
+ { 5, { 0 }, 8, { 1 }, { 4 }, 1, 0, 0, 0, 0 },
+ { 6, { 0 }, 8, { 1 }, { 7 }, 1, 0, 0, 0, 0 },
+ { 7, { 0 }, 8, { 1 }, { 9 }, 1, 0, 0, 0, 0 },
+ { 8, { 0 }, 4, { 1 }, { 1 }, 1, 0, 0, 0, 0 },
+ { 9, { 0 }, 4, { 1 }, { 4 }, 1, 0, 0, 0, 0 },
+ { 10, { 0 }, 4, { 1 }, { 7 }, 1, 0, 0, 0, 0 },
+ { 11, { 0 }, 4, { 1 }, { 9 }, 1, 0, 0, 0, 0 },
+ { 12, { 0 }, 2, { 1 }, { 1 }, 1, 0, 0, 0, 0 },
+ { 13, { 0 }, 2, { 1 }, { 4 }, 1, 0, 0, 0, 0 },
+ { 14, { 0 }, 2, { 1 }, { 7 }, 1, 0, 0, 0, 0 },
+ { 15, { 0 }, 2, { 1 }, { 9 }, 1, 0, 0, 0, 0 },
+ { 16, { 0 }, 1, { 0 }, { 1 }, 1, 0, 0, 0, 0 },
+ { 17, { 0 }, 1, { 0 }, { 4 }, 1, 0, 0, 0, 0 },
+ { 18, { 0 }, 1, { 0 }, { 7 }, 1, 0, 0, 0, 0 },
+ { 19, { 0 }, 1, { 0 }, { 1, 6 }, 2, 0, 0, 0, 0 },
+ { 20, { 0 }, 1, { 0 }, { 2, 7 }, 2, 0, 0, 0, 0 },
+ { 21, { 0 }, 1, { 0 }, { 3, 8 }, 2, 0, 0, 0, 0 },
+ { 22, { 0 }, 1, { 0 }, { 1, 4, 7 }, 3, 0, 0, 0, 0 },
+ { 23, { 0 }, 1, { 0 }, { 2, 5, 8 }, 3, 0, 0, 0, 0 },
+ { 24, { 0 }, 1, { 0 }, { 3, 6, 9 }, 3, 0, 0, 0, 0 },
+ { 25, { 0 }, 1, { 0 }, { 0, 2, 4, 6, 8 }, 5, 0, 0, 0, 0 },
+ { 26, { 0 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 0, 0, 0 },
+ { 27, { 0 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 0, 0, 0, 0 },
+ { 28, { 1 }, 16, { 1 }, { 1 }, 1, 0, 0, 0, 0 },
+ { 29, { 1 }, 16, { 1 }, { 4 }, 1, 0, 0, 0, 0 },
+ { 30, { 1 }, 16, { 1 }, { 7 }, 1, 0, 0, 0, 0 },
+ { 31, { 1 }, 16, { 1 }, { 9 }, 1, 0, 0, 0, 0 },
+ { 32, { 1 }, 8, { 1 }, { 1 }, 1, 0, 0, 0, 0 },
+ { 33, { 1 }, 8, { 1 }, { 4 }, 1, 0, 0, 0, 0 },
+ { 34, { 1 }, 8, { 1 }, { 7 }, 1, 0, 0, 0, 0 },
+ { 35, { 1 }, 8, { 1 }, { 9 }, 1, 0, 0, 0, 0 },
+ { 36, { 1 }, 4, { 1 }, { 1 }, 1, 0, 0, 0, 0 },
+ { 37, { 1 }, 4, { 1 }, { 4 }, 1, 0, 0, 0, 0 },
+ { 38, { 1 }, 4, { 1 }, { 7 }, 1, 0, 0, 0, 0 },
+ { 39, { 1 }, 4, { 1 }, { 9 }, 1, 0, 0, 0, 0 },
+ { 40, { 1 }, 2, { 1 }, { 1 }, 1, 0, 0, 0, 0 },
+ { 41, { 1 }, 2, { 1 }, { 4 }, 1, 0, 0, 0, 0 },
+ { 42, { 1 }, 2, { 1 }, { 7 }, 1, 0, 0, 0, 0 },
+ { 43, { 1 }, 2, { 1 }, { 9 }, 1, 0, 0, 0, 0 },
+ { 44, { 1 }, 1, { 0 }, { 1 }, 1, 0, 0, 0, 0 },
+ { 45, { 1 }, 1, { 0 }, { 4 }, 1, 0, 0, 0, 0 },
+ { 46, { 1 }, 1, { 0 }, { 9 }, 1, 0, 0, 0, 0 },
+ { 47, { 1 }, 1, { 0 }, { 1, 6 }, 2, 0, 0, 0, 0 },
+ { 48, { 1 }, 1, { 0 }, { 2, 7 }, 2, 0, 0, 0, 0 },
+ { 49, { 1 }, 1, { 0 }, { 3, 8 }, 2, 0, 0, 0, 0 },
+ { 50, { 1 }, 1, { 0 }, { 1, 4, 7 }, 3, 0, 0, 0, 0 },
+ { 51, { 1 }, 1, { 0 }, { 2, 5, 8 }, 3, 0, 0, 0, 0 },
+ { 52, { 1 }, 1, { 0 }, { 3, 6, 9 }, 3, 0, 0, 0, 0 },
+ { 53, { 2 }, 16, { 1 }, { 1 }, 1, 0, 0, 0, 0 },
+ { 54, { 2 }, 8, { 1 }, { 1 }, 1, 0, 0, 0, 0 },
+ { 55, { 2 }, 4, { 0 }, { 1 }, 1, 0, 0, 0, 0 },
+ { 56, { 2 }, 2, { 0 }, { 1 }, 1, 0, 0, 0, 0 },
+ { 57, { 2 }, 2, { 0 }, { 5 }, 1, 0, 0, 0, 0 },
+ { 58, { 2 }, 1, { 0 }, { 1 }, 1, 0, 0, 0, 0 },
+ { 59, { 2 }, 1, { 0 }, { 5 }, 1, 0, 0, 0, 0 },
+ { 60, { 3 }, 16, { 1 }, { 1 }, 1, 0, 0, 0, 0 },
+ { 61, { 3 }, 16, { 1 }, { 4 }, 1, 0, 0, 0, 0 },
+ { 62, { 3 }, 16, { 1 }, { 7 }, 1, 0, 0, 0, 0 },
+ { 63, { 3 }, 16, { 1 }, { 9 }, 1, 0, 0, 0, 0 },
+ { 64, { 3 }, 8, { 1 }, { 1 }, 1, 0, 0, 0, 0 },
+ { 65, { 3 }, 8, { 1 }, { 4 }, 1, 0, 0, 0, 0 },
+ { 66, { 3 }, 8, { 1 }, { 7 }, 1, 0, 0, 0, 0 },
+ { 67, { 3 }, 8, { 1 }, { 1 }, 1, 0, 0, 0, 0 },
+ { 68, { 3 }, 4, { 1 }, { 4 }, 1, 0, 0, 0, 0 },
+ { 69, { 3 }, 4, { 1 }, { 7 }, 1, 0, 0, 0, 0 },
+ { 70, { 3 }, 4, { 1 }, { 9 }, 1, 0, 0, 0, 0 },
+ { 71, { 3 }, 4, { 1 }, { 1 }, 1, 0, 0, 0, 0 },
+ { 72, { 3 }, 2, { 1 }, { 4 }, 1, 0, 0, 0, 0 },
+ { 73, { 3 }, 2, { 1 }, { 7 }, 1, 0, 0, 0, 0 },
+ { 74, { 3 }, 2, { 1 }, { 9 }, 1, 0, 0, 0, 0 },
+ { 75, { 3 }, 2, { 0 }, { 1 }, 1, 0, 0, 0, 0 },
+ { 76, { 3 }, 1, { 0 }, { 4 }, 1, 0, 0, 0, 0 },
+ { 77, { 3 }, 1, { 0 }, { 7 }, 1, 0, 0, 0, 0 },
+ { 78, { 3 }, 1, { 0 }, { 1, 6 }, 2, 0, 0, 0, 0 },
+ { 79, { 3 }, 1, { 0 }, { 2, 7 }, 2, 0, 0, 0, 0 },
+ { 80, { 3 }, 1, { 0 }, { 3, 8 }, 2, 0, 0, 0, 0 },
+ { 81, { 3 }, 1, { 0 }, { 1, 4, 7 }, 3, 0, 0, 0, 0 },
+ { 82, { 3 }, 1, { 0 }, { 2, 5, 8 }, 3, 0, 0, 0, 0 },
+ { 83, { 3 }, 1, { 0 }, { 3, 6, 9 }, 3, 0, 0, 0, 0 },
+ { 84, { 3 }, 1, { 0 }, { 0, 2, 4, 6, 8 }, 5, 0, 0, 0, 0 },
+ { 85, { 3 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 0, 0, 0 },
+ { 86, { 3 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 0, 0, 0, 0 },
+ { 87, { FORMAT_A1 }, 16, { 0 }, { 4, 9 }, 2, 0, 1, 6, 2 },
+ { 88, { FORMAT_A1 }, 16, { 1 }, { 4 }, 1, 0, 2, 6, 2 },
+ { 89, { FORMAT_A1 }, 8, { 0 }, { 4, 9 }, 2, 0, 1, 6, 2 },
+ { 90, { FORMAT_A1 }, 8, { 1 }, { 4 }, 1, 0, 2, 6, 2 },
+ { 91, { FORMAT_A1 }, 4, { 0 }, { 4, 9 }, 2, 0, 1, 6, 2 },
+ { 92, { FORMAT_A1 }, 4, { 1 }, { 4, 9 }, 2, 0, 1, 6, 2 },
+ { 93, { FORMAT_A1 }, 4, { 0 }, { 4 }, 1, 0, 2, 6, 2 },
+ { 94, { FORMAT_A1 }, 2, { 0 }, { 4, 9 }, 2, 0, 1, 6, 2 },
+ { 95, { FORMAT_A1 }, 2, { 0 }, { 1 }, 1, 0, 2, 6, 2 },
+ { 96, { FORMAT_A1 }, 2, { 0 }, { 4 }, 1, 0, 2, 6, 2 },
+ { 97, { FORMAT_A1 }, 2, { 0 }, { 7 }, 1, 0, 2, 6, 2 },
+ { 98, { FORMAT_A1 }, 1, { 0 }, { 4 }, 1, 0, 1, 6, 2 },
+ { 99, { FORMAT_A1 }, 1, { 0 }, { 1, 6 }, 2, 0, 1, 6, 2 },
+ { 100, { FORMAT_A1 }, 1, { 0 }, { 4, 9 }, 2, 0, 1, 6, 2 },
+ { 101, { FORMAT_A1 }, 1, { 0 }, { 1 }, 1, 0, 2, 6, 2 },
+ { 102, { FORMAT_A1 }, 1, { 0 }, { 7 }, 1, 0, 2, 6, 2 },
+ { 103, { FORMAT_A1 }, 1, { 0 }, { 2, 7 }, 2, 0, 2, 6, 2 },
+ { 104, { FORMAT_A1 }, 1, { 0 }, { 1, 4, 7 }, 3, 0, 2, 6, 2 },
+ { 105, { FORMAT_A1 }, 1, { 0 }, { 0, 2, 4, 6, 8 }, 5, 0, 2, 6, 2 },
+ { 106, { FORMAT_A1 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 0, 2, 6, 2 },
+ { 107, { FORMAT_A1 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 2, 6, 2 },
+ { 108, { FORMAT_A1, FORMAT_B1 }, 2, { 0 }, { 4, 9 }, 2, 0, 1, 7, 2 },
+ { 109, { FORMAT_A1, FORMAT_B1 }, 2, { 0 }, { 4 }, 1, 0, 2, 7, 2 },
+ { 110, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 4 }, 1, 0, 1, 7, 2 },
+ { 111, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 1, 6 }, 2, 0, 1, 7, 2 },
+ { 112, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 4, 9 }, 2, 0, 1, 7, 2 },
+ { 113, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 1 }, 1, 0, 2, 7, 2 },
+ { 114, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 7 }, 1, 0, 2, 7, 2 },
+ { 115, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 1, 4, 7 }, 3, 0, 2, 7, 2 },
+ { 116, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 0, 2, 4, 6, 8 }, 5, 0, 2, 7, 2 },
+ { 117, { FORMAT_A2 }, 16, { 1 }, { 2, 6, 9 }, 3, 0, 1, 3, 4 },
+ { 118, { FORMAT_A2 }, 16, { 1 }, { 4 }, 1, 0, 2, 3, 4 },
+ { 119, { FORMAT_A2 }, 8, { 1 }, { 2, 6, 9 }, 3, 0, 1, 3, 4 },
+ { 120, { FORMAT_A2 }, 8, { 1 }, { 4 }, 1, 0, 2, 3, 4 },
+ { 121, { FORMAT_A2 }, 4, { 0 }, { 2, 6, 9 }, 3, 0, 1, 3, 4 },
+ { 122, { FORMAT_A2 }, 4, { 0 }, { 4 }, 1, 0, 2, 3, 4 },
+ { 123, { FORMAT_A2 }, 2, { 1 }, { 2, 6, 9 }, 3, 0, 1, 3, 4 },
+ { 124, { FORMAT_A2 }, 2, { 0 }, { 1 }, 1, 0, 2, 3, 4 },
+ { 125, { FORMAT_A2 }, 2, { 0 }, { 4 }, 1, 0, 2, 3, 4 },
+ { 126, { FORMAT_A2 }, 2, { 0 }, { 7 }, 1, 0, 2, 3, 4 },
+ { 127, { FORMAT_A2 }, 1, { 0 }, { 4 }, 1, 0, 1, 3, 4 },
+ { 128, { FORMAT_A2 }, 1, { 0 }, { 1, 6 }, 2, 0, 1, 3, 4 },
+ { 129, { FORMAT_A2 }, 1, { 0 }, { 4, 9 }, 2, 0, 1, 3, 4 },
+ { 130, { FORMAT_A2 }, 1, { 0 }, { 1 }, 1, 0, 2, 3, 4 },
+ { 131, { FORMAT_A2 }, 1, { 0 }, { 7 }, 1, 0, 2, 3, 4 },
+ { 132, { FORMAT_A2 }, 1, { 0 }, { 2, 7 }, 2, 0, 2, 3, 4 },
+ { 133, { FORMAT_A2 }, 1, { 0 }, { 1, 4, 7 }, 3, 0, 2, 3, 4 },
+ { 134, { FORMAT_A2 }, 1, { 0 }, { 0, 2, 4, 6, 8 }, 5, 0, 2, 3, 4 },
+ { 135, { FORMAT_A2 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 0, 2, 3, 4 },
+ { 136, { FORMAT_A2 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 2, 3, 4 },
+ { 137, { FORMAT_A2, FORMAT_B2 }, 2, { 1 }, { 2, 6, 9 }, 3, 0, 1, 3, 4 },
+ { 138, { FORMAT_A2, FORMAT_B2 }, 2, { 0 }, { 4 }, 1, 0, 2, 3, 4 },
+ { 139, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 4 }, 1, 0, 1, 3, 4 },
+ { 140, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 1, 6 }, 2, 0, 1, 3, 4 },
+ { 141, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 4, 9 }, 2, 0, 1, 3, 4 },
+ { 142, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 1 }, 1, 0, 2, 3, 4 },
+ { 143, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 7 }, 1, 0, 2, 3, 4 },
+ { 144, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 1, 4, 7 }, 3, 0, 2, 3, 4 },
+ { 145, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 0, 2, 4, 6, 8 }, 5, 0, 2, 3, 4 },
+ { 146, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 0, 2, 3, 4 },
+ { 147, { FORMAT_A3 }, 16, { 1 }, { 4, 9 }, 2, 0, 1, 2, 6 },
+ { 148, { FORMAT_A3 }, 16, { 1 }, { 4 }, 1, 0, 2, 2, 6 },
+ { 149, { FORMAT_A3 }, 8, { 1 }, { 4, 9 }, 2, 0, 1, 2, 6 },
+ { 150, { FORMAT_A3 }, 8, { 1 }, { 4 }, 1, 0, 2, 2, 6 },
+ { 151, { FORMAT_A3 }, 4, { 0 }, { 4, 9 }, 2, 0, 1, 2, 6 },
+ { 152, { FORMAT_A3 }, 4, { 0 }, { 4 }, 1, 0, 2, 2, 6 },
+ { 153, { FORMAT_A3 }, 2, { 1 }, { 2, 6, 9 }, 3, 0, 2, 2, 6 },
+ { 154, { FORMAT_A3 }, 2, { 0 }, { 1 }, 1, 0, 2, 2, 6 },
+ { 155, { FORMAT_A3 }, 2, { 0 }, { 4 }, 1, 0, 2, 2, 6 },
+ { 156, { FORMAT_A3 }, 2, { 0 }, { 7 }, 1, 0, 2, 2, 6 },
+ { 157, { FORMAT_A3 }, 1, { 0 }, { 4 }, 1, 0, 1, 2, 6 },
+ { 158, { FORMAT_A3 }, 1, { 0 }, { 1, 6 }, 2, 0, 1, 2, 6 },
+ { 159, { FORMAT_A3 }, 1, { 0 }, { 4, 9 }, 2, 0, 1, 2, 6 },
+ { 160, { FORMAT_A3 }, 1, { 0 }, { 1 }, 1, 0, 2, 2, 6 },
+ { 161, { FORMAT_A3 }, 1, { 0 }, { 7 }, 1, 0, 2, 2, 6 },
+ { 162, { FORMAT_A3 }, 1, { 0 }, { 2, 7 }, 2, 0, 2, 2, 6 },
+ { 163, { FORMAT_A3 }, 1, { 0 }, { 1, 4, 7 }, 3, 0, 2, 2, 6 },
+ { 164, { FORMAT_A3 }, 1, { 0 }, { 0, 2, 4, 6, 8 }, 5, 0, 2, 2, 6 },
+ { 165, { FORMAT_A3 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 0, 2, 2, 6 },
+ { 166, { FORMAT_A3 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 2, 2, 6 },
+ { 167, { FORMAT_A3, FORMAT_B3 }, 2, { 1 }, { 2, 6, 9 }, 3, 0, 2, 2, 6 },
+ { 168, { FORMAT_A3, FORMAT_B3 }, 2, { 0 }, { 4 }, 1, 0, 2, 2, 6 },
+ { 169, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 4 }, 1, 0, 2, 2, 6 },
+ { 170, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 1, 6 }, 2, 0, 1, 2, 6 },
+ { 171, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 4, 9 }, 2, 0, 1, 2, 6 },
+ { 172, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 1 }, 1, 0, 1, 2, 6 },
+ { 173, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 7 }, 1, 0, 2, 2, 6 },
+ { 174, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 1, 4, 7 }, 3, 0, 2, 2, 6 },
+ { 175, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 0, 2, 4, 6, 8 }, 5, 0, 2, 2, 6 },
+ { 176, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 0, 2, 2, 6 },
+ { 177, { FORMAT_B1 }, 16, { 0 }, { 4, 9 }, 2, 0, 1, 7, 2 },
+ { 178, { FORMAT_B1 }, 16, { 1 }, { 4 }, 1, 0, 2, 7, 2 },
+ { 179, { FORMAT_B1 }, 8, { 0 }, { 4, 9 }, 2, 0, 1, 7, 2 },
+ { 180, { FORMAT_B1 }, 8, { 1 }, { 4 }, 1, 0, 2, 7, 2 },
+ { 181, { FORMAT_B1 }, 4, { 0 }, { 4, 9 }, 2, 0, 1, 7, 2 },
+ { 182, { FORMAT_B1 }, 4, { 1 }, { 4, 9 }, 2, 0, 1, 7, 2 },
+ { 183, { FORMAT_B1 }, 4, { 0 }, { 4 }, 1, 0, 2, 7, 2 },
+ { 184, { FORMAT_B1 }, 2, { 0 }, { 4, 9 }, 2, 0, 1, 7, 2 },
+ { 185, { FORMAT_B1 }, 2, { 0 }, { 1 }, 1, 0, 2, 7, 2 },
+ { 186, { FORMAT_B1 }, 2, { 0 }, { 4 }, 1, 0, 2, 7, 2 },
+ { 187, { FORMAT_B1 }, 2, { 0 }, { 7 }, 1, 0, 2, 7, 2 },
+ { 188, { FORMAT_B1 }, 1, { 0 }, { 4 }, 1, 0, 1, 7, 2 },
+ { 189, { FORMAT_B1 }, 1, { 0 }, { 1, 6 }, 2, 0, 1, 7, 2 },
+ { 190, { FORMAT_B1 }, 1, { 0 }, { 4, 9 }, 2, 0, 1, 7, 2 },
+ { 191, { FORMAT_B1 }, 1, { 0 }, { 1 }, 1, 0, 2, 7, 2 },
+ { 192, { FORMAT_B1 }, 1, { 0 }, { 7 }, 1, 0, 2, 7, 2 },
+ { 193, { FORMAT_B1 }, 1, { 0 }, { 2, 7 }, 2, 0, 2, 7, 2 },
+ { 194, { FORMAT_B1 }, 1, { 0 }, { 1, 4, 7 }, 3, 0, 2, 7, 2 },
+ { 195, { FORMAT_B1 }, 1, { 0 }, { 0, 2, 4, 6, 8 }, 5, 0, 2, 7, 2 },
+ { 196, { FORMAT_B1 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 0, 2, 7, 2 },
+ { 197, { FORMAT_B1 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 2, 7, 12 },
+ { 198, { FORMAT_B4 }, 16, { 0 }, { 4, 9 }, 2, 0, 2, 1, 12 },
+ { 199, { FORMAT_B4 }, 16, { 1 }, { 4 }, 1, 0, 2, 1, 12 },
+ { 200, { FORMAT_B4 }, 8, { 0 }, { 4, 9 }, 2, 0, 2, 1, 12 },
+ { 201, { FORMAT_B4 }, 8, { 1 }, { 4 }, 1, 0, 2, 1, 12 },
+ { 202, { FORMAT_B4 }, 4, { 0 }, { 4, 9 }, 2, 0, 2, 1, 12 },
+ { 203, { FORMAT_B4 }, 4, { 0 }, { 4 }, 1, 0, 2, 1, 12 },
+ { 204, { FORMAT_B4 }, 4, { 1 }, { 4, 9 }, 2, 0, 2, 1, 12 },
+ { 205, { FORMAT_B4 }, 2, { 0 }, { 4, 9 }, 2, 0, 2, 1, 12 },
+ { 206, { FORMAT_B4 }, 2, { 0 }, { 1 }, 1, 0, 2, 1, 12 },
+ { 207, { FORMAT_B4 }, 2, { 0 }, { 4 }, 1, 0, 2, 1, 12 },
+ { 208, { FORMAT_B4 }, 2, { 0 }, { 7 }, 1, 0, 2, 1, 12 },
+ { 209, { FORMAT_B4 }, 1, { 0 }, { 1 }, 1, 0, 2, 1, 12 },
+ { 210, { FORMAT_B4 }, 1, { 0 }, { 4 }, 1, 0, 2, 1, 12 },
+ { 211, { FORMAT_B4 }, 1, { 0 }, { 7 }, 1, 0, 2, 1, 12 },
+ { 212, { FORMAT_B4 }, 1, { 0 }, { 1, 6 }, 2, 0, 2, 1, 12 },
+ { 213, { FORMAT_B4 }, 1, { 0 }, { 2, 7 }, 2, 0, 2, 1, 12 },
+ { 214, { FORMAT_B4 }, 1, { 0 }, { 4, 9 }, 2, 0, 2, 1, 12 },
+ { 215, { FORMAT_B4 }, 1, { 0 }, { 1, 4, 7 }, 3, 0, 2, 1, 12 },
+ { 216, { FORMAT_B4 }, 1, { 0 }, { 0, 2, 4, 6, 8 }, 5, 0, 2, 1, 12 },
+ { 217, { FORMAT_B4 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 0, 2, 1, 12 },
+ { 218, { FORMAT_B4 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 2, 1, 12 },
+ { 219, { FORMAT_C0 }, 8, { 1 }, { 4 }, 1, 0, 2, 7, 2 },
+ { 220, { FORMAT_C0 }, 4, { 1 }, { 4, 9 }, 2, 0, 1, 7, 2 },
+ { 221, { FORMAT_C0 }, 4, { 0 }, { 4 }, 1, 0, 2, 7, 2 },
+ { 222, { FORMAT_C0 }, 2, { 0 }, { 4, 9 }, 2, 0, 1, 7, 2 },
+ { 223, { FORMAT_C0 }, 2, { 0 }, { 1 }, 1, 0, 2, 7, 2 },
+ { 224, { FORMAT_C0 }, 2, { 0 }, { 4 }, 1, 0, 2, 7, 2 },
+ { 225, { FORMAT_C0 }, 2, { 0 }, { 7 }, 1, 0, 2, 7, 2 },
+ { 226, { FORMAT_C0 }, 1, { 0 }, { 4 }, 1, 0, 1, 7, 2 },
+ { 227, { FORMAT_C0 }, 1, { 0 }, { 1, 6 }, 2, 0, 1, 7, 2 },
+ { 228, { FORMAT_C0 }, 1, { 0 }, { 4, 9 }, 2, 0, 1, 7, 2 },
+ { 229, { FORMAT_C0 }, 1, { 0 }, { 1 }, 1, 0, 2, 7, 2 },
+ { 230, { FORMAT_C0 }, 1, { 0 }, { 7 }, 1, 0, 2, 7, 2 },
+ { 231, { FORMAT_C0 }, 1, { 0 }, { 2, 7 }, 2, 0, 2, 7, 2 },
+ { 232, { FORMAT_C0 }, 1, { 0 }, { 1, 4, 7 }, 3, 0, 2, 7, 2 },
+ { 233, { FORMAT_C0 }, 1, { 0 }, { 0, 2, 4, 6, 8 }, 5, 0, 2, 7, 2 },
+ { 234, { FORMAT_C0 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 0, 2, 7, 2 },
+ { 235, { FORMAT_C0 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 2, 7, 2 },
+ { 236, { FORMAT_C2 }, 16, { 1 }, { 4, 9 }, 2, 0, 1, 2, 6 },
+ { 237, { FORMAT_C2 }, 16, { 1 }, { 4 }, 1, 0, 2, 2, 6 },
+ { 238, { FORMAT_C2 }, 8, { 1 }, { 4, 9 }, 2, 0, 1, 2, 6 },
+ { 239, { FORMAT_C2 }, 8, { 1 }, { 4 }, 1, 0, 2, 2, 6 },
+ { 240, { FORMAT_C2 }, 4, { 0 }, { 4, 9 }, 2, 0, 1, 2, 6 },
+ { 241, { FORMAT_C2 }, 4, { 0 }, { 4 }, 1, 0, 2, 2, 6 },
+ { 242, { FORMAT_C2 }, 2, { 1 }, { 2, 6, 9 }, 3, 0, 2, 2, 6 },
+ { 243, { FORMAT_C2 }, 2, { 0 }, { 1 }, 1, 0, 2, 2, 6 },
+ { 244, { FORMAT_C2 }, 2, { 0 }, { 4 }, 1, 0, 2, 2, 6 },
+ { 245, { FORMAT_C2 }, 2, { 0 }, { 7 }, 1, 0, 2, 2, 6 },
+ { 246, { FORMAT_C2 }, 1, { 0 }, { 4 }, 1, 0, 1, 2, 6 },
+ { 247, { FORMAT_C2 }, 1, { 0 }, { 1, 6 }, 2, 0, 1, 2, 6 },
+ { 248, { FORMAT_C2 }, 1, { 0 }, { 4, 9 }, 2, 0, 1, 2, 6 },
+ { 249, { FORMAT_C2 }, 1, { 0 }, { 1 }, 1, 0, 2, 2, 6 },
+ { 250, { FORMAT_C2 }, 1, { 0 }, { 7 }, 1, 0, 2, 2, 6 },
+ { 251, { FORMAT_C2 }, 1, { 0 }, { 2, 7 }, 2, 0, 2, 2, 6 },
+ { 252, { FORMAT_C2 }, 1, { 0 }, { 1, 4, 7 }, 3, 0, 2, 2, 6 },
+ { 253, { FORMAT_C2 }, 1, { 0 }, { 0, 2, 4, 6, 8 }, 5, 0, 2, 2, 6 },
+ { 254, { FORMAT_C2 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 0, 2, 2, 6 },
+ { 255, { FORMAT_C2 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 2, 2, 6 },
+};
+/* 3GPP 38.211-f20 Table - 6.3.3.2-3 */
+const xRANPrachConfigTableStruct gxranPrachDataTable_sub6_tdd[XRAN_PRACH_CONFIG_TABLE_SIZE] =
+{
+ { 0, { 0 }, 16, { 1 }, { 9 }, 1, 0, 0, 0, 0 },
+ { 1, { 0 }, 8, { 1 }, { 9 }, 1, 0, 0, 0, 0 },
+ { 2, { 0 }, 4, { 1 }, { 9 }, 1, 0, 0, 0, 0 },
+ { 3, { 0 }, 2, { 0 }, { 9 }, 1, 0, 0, 0, 0 },
+ { 4, { 0 }, 2, { 1 }, { 9 }, 1, 0, 0, 0, 0 },
+ { 5, { 0 }, 2, { 0 }, { 4 }, 1, 0, 0, 0, 0 },
+ { 6, { 0 }, 2, { 1 }, { 4 }, 1, 0, 0, 0, 0 },
+ { 7, { 0 }, 1, { 0 }, { 9 }, 1, 0, 0, 0, 0 },
+ { 8, { 0 }, 1, { 0 }, { 8 }, 1, 0, 0, 0, 0 },
+ { 9, { 0 }, 1, { 0 }, { 7 }, 1, 0, 0, 0, 0 },
+ { 10, { 0 }, 1, { 0 }, { 6 }, 1, 0, 0, 0, 0 },
+ { 11, { 0 }, 1, { 0 }, { 5 }, 1, 0, 0, 0, 0 },
+ { 12, { 0 }, 1, { 0 }, { 4 }, 1, 0, 0, 0, 0 },
+ { 13, { 0 }, 1, { 0 }, { 3 }, 1, 0, 0, 0, 0 },
+ { 14, { 0 }, 1, { 0 }, { 2 }, 1, 0, 0, 0, 0 },
+ { 15, { 0 }, 1, { 0 }, { 1, 6 }, 2, 0, 0, 0, 0 },
+ { 16, { 0 }, 1, { 0 }, { 1, 6 }, 2, 7, 0, 0, 0 },
+ { 17, { 0 }, 1, { 0 }, { 4, 9 }, 2, 0, 0, 0, 0 },
+ { 18, { 0 }, 1, { 0 }, { 3, 8 }, 2, 0, 0, 0, 0 },
+ { 19, { 0 }, 1, { 0 }, { 2, 7 }, 2, 0, 0, 0, 0 },
+ { 20, { 0 }, 1, { 0 }, { 8, 9 }, 2, 0, 0, 0, 0 },
+ { 21, { 0 }, 1, { 0 }, { 4, 8, 9 }, 3, 0, 0, 0, 0 },
+ { 22, { 0 }, 1, { 0 }, { 3, 4, 9 }, 3, 0, 0, 0, 0 },
+ { 23, { 0 }, 1, { 0 }, { 7, 8, 9 }, 3, 0, 0, 0, 0 },
+ { 24, { 0 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 0, 0, 0, 0 },
+ { 25, { 0 }, 1, { 0 }, { 6, 7, 8, 9 }, 4, 0, 0, 0, 0 },
+ { 26, { 0 }, 1, { 0 }, { 1, 4, 6, 9 }, 4, 0, 0, 0, 0 },
+ { 27, { 0 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 0, 0, 0 },
+ { 28, { 1 }, 16, { 1 }, { 7 }, 1, 0, 0, 0, 0 },
+ { 29, { 1 }, 8, { 1 }, { 7 }, 1, 0, 0, 0, 0 },
+ { 30, { 1 }, 4, { 1 }, { 7 }, 1, 0, 0, 0, 0 },
+ { 31, { 1 }, 2, { 0 }, { 7 }, 1, 0, 0, 0, 0 },
+ { 32, { 1 }, 2, { 1 }, { 7 }, 1, 0, 0, 0, 0 },
+ { 33, { 1 }, 1, { 0 }, { 7 }, 1, 0, 0, 0, 0 },
+ { 34, { 2 }, 16, { 1 }, { 6 }, 1, 0, 0, 0, 0 },
+ { 35, { 2 }, 8, { 1 }, { 6 }, 1, 0, 0, 0, 0 },
+ { 36, { 2 }, 4, { 1 }, { 6 }, 1, 0, 0, 0, 0 },
+ { 37, { 2 }, 2, { 0 }, { 6 }, 1, 7, 0, 0, 0 },
+ { 38, { 2 }, 2, { 1 }, { 6 }, 1, 7, 0, 0, 0 },
+ { 39, { 2 }, 1, { 0 }, { 6 }, 1, 7, 0, 0, 0 },
+ { 40, { 3 }, 16, { 1 }, { 9 }, 1, 0, 0, 0, 0 },
+ { 41, { 3 }, 8, { 1 }, { 9 }, 1, 0, 0, 0, 0 },
+ { 42, { 3 }, 4, { 1 }, { 9 }, 1, 0, 0, 0, 0 },
+ { 43, { 3 }, 2, { 0 }, { 9 }, 1, 0, 0, 0, 0 },
+ { 44, { 3 }, 2, { 1 }, { 9 }, 1, 0, 0, 0, 0 },
+ { 45, { 3 }, 2, { 0 }, { 4 }, 1, 0, 0, 0, 0 },
+ { 46, { 3 }, 2, { 1 }, { 4 }, 1, 0, 0, 0, 0 },
+ { 47, { 3 }, 1, { 0 }, { 9 }, 1, 0, 0, 0, 0 },
+ { 48, { 3 }, 1, { 0 }, { 8 }, 1, 0, 0, 0, 0 },
+ { 49, { 3 }, 1, { 0 }, { 7 }, 1, 0, 0, 0, 0 },
+ { 50, { 3 }, 1, { 0 }, { 6 }, 1, 0, 0, 0, 0 },
+ { 51, { 3 }, 1, { 0 }, { 5 }, 1, 0, 0, 0, 0 },
+ { 52, { 3 }, 1, { 0 }, { 4 }, 1, 0, 0, 0, 0 },
+ { 53, { 3 }, 1, { 0 }, { 3 }, 1, 0, 0, 0, 0 },
+ { 54, { 3 }, 1, { 0 }, { 2 }, 1, 0, 0, 0, 0 },
+ { 55, { 3 }, 1, { 0 }, { 1, 6 }, 2, 0, 0, 0, 0 },
+ { 56, { 3 }, 1, { 0 }, { 1, 6 }, 2, 7, 0, 0, 0 },
+ { 57, { 3 }, 1, { 0 }, { 4, 9 }, 2, 0, 0, 0, 0 },
+ { 58, { 3 }, 1, { 0 }, { 3, 8 }, 2, 0, 0, 0, 0 },
+ { 59, { 3 }, 1, { 0 }, { 2, 7 }, 2, 0, 0, 0, 0 },
+ { 60, { 3 }, 1, { 0 }, { 8, 9 }, 2, 0, 0, 0, 0 },
+ { 61, { 3 }, 1, { 0 }, { 4, 8, 9 }, 3, 0, 0, 0, 0 },
+ { 62, { 3 }, 1, { 0 }, { 3, 4, 9 }, 3, 0, 0, 0, 0 },
+ { 63, { 3 }, 1, { 0 }, { 7, 8, 9 }, 3, 0, 0, 0, 0 },
+ { 64, { 3 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 0, 0, 0, 0 },
+ { 65, { 3 }, 1, { 0 }, { 1, 4, 6, 9 }, 4, 0, 0, 0, 0 },
+ { 66, { 3 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 0, 0, 0 },
+ { 67, { FORMAT_A1 }, 18, { 1 }, { 9 }, 1, 0, 2, 6, 2 },
+ { 68, { FORMAT_A1 }, 8, { 1 }, { 9 }, 1, 0, 2, 6, 2 },
+ { 69, { FORMAT_A1 }, 4, { 1 }, { 9 }, 1, 0, 1, 6, 2 },
+ { 70, { FORMAT_A1 }, 2, { 1 }, { 9 }, 1, 0, 1, 6, 2 },
+ { 71, { FORMAT_A1 }, 2, { 1 }, { 4, 9 }, 2, 7, 1, 3, 2 },
+ { 72, { FORMAT_A1 }, 2, { 1 }, { 7, 9 }, 2, 7, 1, 3, 2 },
+ { 73, { FORMAT_A1 }, 2, { 1 }, { 7, 9 }, 2, 0, 1, 6, 2 },
+ { 74, { FORMAT_A1 }, 2, { 1 }, { 8, 9 }, 2, 0, 2, 6, 2 },
+ { 75, { FORMAT_A1 }, 2, { 1 }, { 4, 9 }, 2, 0, 2, 6, 2 },
+ { 76, { FORMAT_A1 }, 2, { 1 }, { 2, 3, 4, 7, 8, 9 }, 6, 0, 1, 6, 2 },
+ { 77, { FORMAT_A1 }, 1, { 0 }, { 9 }, 1, 0, 2, 6, 2 },
+ { 78, { FORMAT_A1 }, 1, { 0 }, { 9 }, 1, 7, 1, 3, 2 },
+ { 79, { FORMAT_A1 }, 1, { 0 }, { 9 }, 1, 0, 1, 6, 2 },
+ { 80, { FORMAT_A1 }, 1, { 0 }, { 8, 9 }, 2, 0, 2, 6, 2 },
+ { 81, { FORMAT_A1 }, 1, { 0 }, { 4, 9 }, 2, 0, 1, 6, 2 },
+ { 82, { FORMAT_A1 }, 1, { 0 }, { 7, 9 }, 2, 7, 1, 3, 2 },
+ { 83, { FORMAT_A1 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 0, 1, 6, 2 },
+ { 84, { FORMAT_A1 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 0, 2, 6, 2 },
+ { 85, { FORMAT_A1 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 1, 6, 2 },
+ { 86, { FORMAT_A1 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 0, 1, 3, 2 },
+ { 87, { FORMAT_A2 }, 16, { 1 }, { 9 }, 1, 0, 2, 3, 4 },
+ { 88, { FORMAT_A2 }, 8, { 1 }, { 9 }, 1, 0, 2, 3, 4 },
+ { 89, { FORMAT_A2 }, 4, { 1 }, { 9 }, 1, 0, 1, 3, 4 },
+ { 90, { FORMAT_A2 }, 2, { 1 }, { 7, 9 }, 2, 0, 1, 3, 4 },
+ { 91, { FORMAT_A2 }, 2, { 1 }, { 8, 9 }, 2, 0, 2, 3, 4 },
+ { 92, { FORMAT_A2 }, 2, { 1 }, { 7, 9 }, 2, 9, 1, 1, 4 },
+ { 93, { FORMAT_A2 }, 2, { 1 }, { 4, 9 }, 2, 9, 1, 1, 4 },
+ { 94, { FORMAT_A2 }, 2, { 1 }, { 4, 9 }, 2, 0, 2, 3, 4 },
+ { 95, { FORMAT_A2 }, 16, { 1 }, { 2, 3, 4, 7, 8, 9 }, 6, 0, 1, 3, 4 },
+ { 96, { FORMAT_A2 }, 1, { 0 }, { 2 }, 1, 0, 1, 3, 4 },
+ { 97, { FORMAT_A2 }, 1, { 0 }, { 9 }, 1, 0, 1, 3, 4 },
+ { 98, { FORMAT_A2 }, 2, { 1 }, { 9 }, 1, 0, 1, 3, 4 },
+ { 99, { FORMAT_A2 }, 1, { 0 }, { 9 }, 1, 0, 2, 3, 4 },
+ { 100, { FORMAT_A2 }, 1, { 0 }, { 9 }, 1, 9, 1, 1, 4 },
+ { 101, { FORMAT_A2 }, 1, { 0 }, { 9 }, 1, 0, 1, 3, 4 },
+ { 102, { FORMAT_A2 }, 1, { 0 }, { 2, 7 }, 2, 0, 1, 3, 4 },
+ { 103, { FORMAT_A2 }, 1, { 0 }, { 8, 9 }, 2, 0, 2, 3, 4 },
+ { 104, { FORMAT_A2 }, 1, { 0 }, { 4, 9 }, 2, 0, 1, 3, 4 },
+ { 105, { FORMAT_A2 }, 1, { 0 }, { 7, 9 }, 2, 9, 1, 1, 4 },
+ { 106, { FORMAT_A2 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 0, 1, 3, 4 },
+ { 107, { FORMAT_A2 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 0, 2, 3, 4 },
+ { 108, { FORMAT_A2 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 1, 3, 4 },
+ { 109, { FORMAT_A2 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 9, 1, 1, 4 },
+ { 110, { FORMAT_A3 }, 16, { 1 }, { 9 }, 1, 0, 2, 2, 6 },
+ { 111, { FORMAT_A3 }, 8, { 1 }, { 9 }, 1, 0, 2, 2, 6 },
+ { 112, { FORMAT_A3 }, 4, { 1 }, { 9 }, 1, 0, 1, 2, 6 },
+ { 113, { FORMAT_A3 }, 2, { 1 }, { 4, 9 }, 2, 7, 1, 1, 6 },
+ { 114, { FORMAT_A3 }, 2, { 1 }, { 7, 9 }, 2, 7, 1, 1, 6 },
+ { 115, { FORMAT_A3 }, 2, { 1 }, { 7, 9 }, 2, 0, 1, 2, 6 },
+ { 116, { FORMAT_A3 }, 2, { 1 }, { 4, 9 }, 2, 0, 2, 2, 6 },
+ { 117, { FORMAT_A3 }, 2, { 1 }, { 8, 9 }, 2, 0, 2, 2, 6 },
+ { 118, { FORMAT_A3 }, 2, { 1 }, { 2, 3, 4, 7, 8, 9 }, 6, 0, 1, 2, 6 },
+ { 119, { FORMAT_A3 }, 1, { 0 }, { 2 }, 1, 0, 1, 2, 6 },
+ { 120, { FORMAT_A3 }, 1, { 0 }, { 7 }, 1, 0, 1, 2, 6 },
+ { 121, { FORMAT_A3 }, 2, { 1 }, { 9 }, 1, 0, 1, 2, 6 },
+ { 122, { FORMAT_A3 }, 1, { 0 }, { 9 }, 1, 0, 2, 2, 6 },
+ { 123, { FORMAT_A3 }, 1, { 0 }, { 9 }, 1, 7, 1, 1, 6 },
+ { 124, { FORMAT_A3 }, 1, { 0 }, { 9 }, 1, 0, 1, 2, 6 },
+ { 125, { FORMAT_A3 }, 1, { 0 }, { 2, 7 }, 2, 0, 1, 2, 6 },
+ { 126, { FORMAT_A3 }, 1, { 0 }, { 8, 9 }, 2, 0, 2, 2, 6 },
+ { 127, { FORMAT_A3 }, 1, { 0 }, { 4, 9 }, 2, 0, 1, 2, 6 },
+ { 128, { FORMAT_A3 }, 1, { 0 }, { 7, 9 }, 2, 7, 1, 1, 6 },
+ { 129, { FORMAT_A3 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 0, 1, 2, 6 },
+ { 130, { FORMAT_A3 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 0, 2, 2, 6 },
+ { 131, { FORMAT_A3 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 1, 2, 6 },
+ { 132, { FORMAT_A3 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 7, 1, 1, 6 },
+ { 133, { FORMAT_B1 }, 4, { 1 }, { 9 }, 1, 2, 1, 6, 2 },
+ { 134, { FORMAT_B1 }, 2, { 1 }, { 9 }, 1, 2, 1, 6, 2 },
+ { 135, { FORMAT_B1 }, 2, { 1 }, { 7, 9 }, 2, 2, 1, 6, 2 },
+ { 136, { FORMAT_B1 }, 2, { 1 }, { 4, 9 }, 2, 8, 1, 3, 2 },
+ { 137, { FORMAT_B1 }, 2, { 1 }, { 4, 9 }, 2, 2, 2, 6, 2 },
+ { 138, { FORMAT_B1 }, 1, { 0 }, { 9 }, 1, 2, 2, 6, 2 },
+ { 139, { FORMAT_B1 }, 1, { 0 }, { 9 }, 1, 8, 1, 3, 2 },
+ { 140, { FORMAT_B1 }, 1, { 0 }, { 9 }, 1, 2, 1, 6, 2 },
+ { 141, { FORMAT_B1 }, 1, { 0 }, { 8, 9 }, 2, 2, 2, 6, 2 },
+ { 142, { FORMAT_B1 }, 1, { 0 }, { 4, 9 }, 2, 2, 1, 6, 2 },
+ { 143, { FORMAT_B1 }, 1, { 0 }, { 7, 9 }, 2, 8, 1, 3, 2 },
+ { 144, { FORMAT_B1 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 2, 1, 6, 2 },
+ { 145, { FORMAT_B4 }, 16, { 1 }, { 9 }, 1, 0, 2, 1, 12 },
+ { 146, { FORMAT_B4 }, 8, { 1 }, { 9 }, 1, 0, 2, 1, 12 },
+ { 147, { FORMAT_B4 }, 4, { 1 }, { 9 }, 1, 2, 1, 1, 12 },
+ { 148, { FORMAT_B4 }, 2, { 1 }, { 9 }, 1, 0, 1, 1, 12 },
+ { 149, { FORMAT_B4 }, 2, { 1 }, { 9 }, 1, 2, 1, 1, 12 },
+ { 150, { FORMAT_B4 }, 2, { 1 }, { 7, 9 }, 2, 2, 1, 1, 12 },
+ { 151, { FORMAT_B4 }, 2, { 1 }, { 4, 9 }, 2, 2, 1, 1, 12 },
+ { 152, { FORMAT_B4 }, 2, { 1 }, { 4, 9 }, 2, 0, 2, 1, 12 },
+ { 153, { FORMAT_B4 }, 2, { 1 }, { 8, 9 }, 2, 0, 2, 1, 12 },
+ { 154, { FORMAT_B4 }, 2, { 1 }, { 2, 3, 4, 7, 8, 9 }, 6, 0, 1, 1, 12 },
+ { 155, { FORMAT_B4 }, 1, { 0 }, { 1 }, 1, 0, 1, 1, 12 },
+ { 156, { FORMAT_B4 }, 1, { 0 }, { 2 }, 1, 0, 1, 1, 12 },
+ { 157, { FORMAT_B4 }, 1, { 0 }, { 4 }, 1, 0, 1, 1, 12 },
+ { 158, { FORMAT_B4 }, 1, { 0 }, { 7 }, 1, 0, 1, 1, 12 },
+ { 159, { FORMAT_B4 }, 1, { 0 }, { 9 }, 1, 0, 1, 1, 12 },
+ { 160, { FORMAT_B4 }, 1, { 0 }, { 9 }, 1, 2, 1, 1, 12 },
+ { 161, { FORMAT_B4 }, 1, { 0 }, { 9 }, 1, 0, 2, 1, 12 },
+ { 162, { FORMAT_B4 }, 1, { 0 }, { 4, 9 }, 2, 2, 1, 1, 12 },
+ { 163, { FORMAT_B4 }, 1, { 0 }, { 7, 9 }, 2, 2, 1, 1, 12 },
+ { 164, { FORMAT_B4 }, 1, { 0 }, { 8, 9 }, 2, 0, 2, 1, 12 },
+ { 165, { FORMAT_B4 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 2, 1, 1, 12 },
+ { 166, { FORMAT_B4 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 2, 1, 1, 12 },
+ { 167, { FORMAT_B4 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 0, 2, 1, 12 },
+ { 168, { FORMAT_B4 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 2, 1, 1, 12 },
+ { 169, { FORMAT_C0 }, 16, { 1 }, { 9 }, 1, 2, 2, 6, 2 },
+ { 170, { FORMAT_C0 }, 8, { 1 }, { 9 }, 1, 2, 2, 6, 2 },
+ { 171, { FORMAT_C0 }, 4, { 1 }, { 9 }, 1, 2, 1, 6, 2 },
+ { 172, { FORMAT_C0 }, 2, { 1 }, { 9 }, 1, 2, 1, 6, 2 },
+ { 173, { FORMAT_C0 }, 2, { 1 }, { 8, 9 }, 2, 2, 2, 6, 2 },
+ { 174, { FORMAT_C0 }, 2, { 1 }, { 7, 9 }, 2, 2, 1, 6, 2 },
+ { 175, { FORMAT_C0 }, 2, { 1 }, { 7, 9 }, 2, 8, 1, 3, 2 },
+ { 176, { FORMAT_C0 }, 2, { 1 }, { 4, 9 }, 2, 8, 1, 3, 2 },
+ { 177, { FORMAT_C0 }, 2, { 1 }, { 4, 9 }, 2, 2, 2, 6, 2 },
+ { 178, { FORMAT_C0 }, 2, { 1 }, { 2, 3, 4, 7, 8, 9 }, 6, 2, 1, 6, 2 },
+ { 179, { FORMAT_C0 }, 1, { 0 }, { 9 }, 1, 2, 2, 6, 2 },
+ { 180, { FORMAT_C0 }, 1, { 0 }, { 9 }, 1, 8, 1, 3, 2 },
+ { 181, { FORMAT_C0 }, 1, { 0 }, { 9 }, 1, 2, 1, 6, 2 },
+ { 182, { FORMAT_C0 }, 1, { 0 }, { 8, 9 }, 2, 2, 2, 6, 2 },
+ { 183, { FORMAT_C0 }, 1, { 0 }, { 4, 9 }, 2, 2, 1, 6, 2 },
+ { 184, { FORMAT_C0 }, 1, { 0 }, { 7, 9 }, 2, 8, 1, 3, 2 },
+ { 185, { FORMAT_C0 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 2, 1, 6, 2 },
+ { 186, { FORMAT_C0 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 2, 2, 6, 2 },
+ { 187, { FORMAT_C0 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 2, 1, 6, 2 },
+ { 188, { FORMAT_C0 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 8, 1, 3, 2 },
+ { 189, { FORMAT_C2 }, 16, { 1 }, { 9 }, 1, 2, 2, 2, 6 },
+ { 190, { FORMAT_C2 }, 8, { 1 }, { 9 }, 1, 2, 2, 2, 6 },
+ { 191, { FORMAT_C2 }, 4, { 1 }, { 9 }, 1, 2, 1, 2, 6 },
+ { 192, { FORMAT_C2 }, 2, { 1 }, { 9 }, 1, 2, 1, 2, 6 },
+ { 193, { FORMAT_C2 }, 2, { 1 }, { 8, 9 }, 2, 2, 2, 2, 6 },
+ { 194, { FORMAT_C2 }, 2, { 1 }, { 7, 9 }, 2, 2, 1, 2, 6 },
+ { 195, { FORMAT_C2 }, 2, { 1 }, { 7, 9 }, 2, 8, 1, 1, 6 },
+ { 196, { FORMAT_C2 }, 2, { 1 }, { 4, 9 }, 2, 8, 1, 1, 6 },
+ { 197, { FORMAT_C2 }, 2, { 1 }, { 4, 9 }, 2, 2, 2, 2, 6 },
+ { 198, { FORMAT_C2 }, 2, { 1 }, { 2, 3, 4, 7, 8, 9 }, 6, 2, 1, 2, 6 },
+ { 199, { FORMAT_C2 }, 8, { 1 }, { 9 }, 1, 8, 2, 1, 6 },
+ { 200, { FORMAT_C2 }, 4, { 1 }, { 9 }, 1, 8, 1, 1, 6 },
+ { 201, { FORMAT_C2 }, 1, { 0 }, { 9 }, 1, 2, 2, 2, 6 },
+ { 202, { FORMAT_C2 }, 1, { 0 }, { 9 }, 1, 8, 1, 1, 6 },
+ { 203, { FORMAT_C2 }, 1, { 0 }, { 9 }, 1, 2, 1, 2, 6 },
+ { 204, { FORMAT_C2 }, 1, { 0 }, { 8, 9 }, 2, 2, 2, 2, 6 },
+ { 205, { FORMAT_C2 }, 1, { 0 }, { 4, 9 }, 2, 2, 1, 2, 6 },
+ { 206, { FORMAT_C2 }, 1, { 0 }, { 7, 9 }, 2, 8, 1, 1, 6 },
+ { 207, { FORMAT_C2 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 2, 1, 2, 6 },
+ { 208, { FORMAT_C2 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 2, 2, 2, 6 },
+ { 209, { FORMAT_C2 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 2, 1, 2, 6 },
+ { 210, { FORMAT_C2 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 8, 1, 1, 6 },
+ { 211, { FORMAT_A1, FORMAT_B1 }, 2, { 1 }, { 9 }, 1, 2, 1, 6, 2 },
+ { 212, { FORMAT_A1, FORMAT_B1 }, 2, { 1 }, { 4, 9 }, 2, 8, 1, 3, 2 },
+ { 213, { FORMAT_A1, FORMAT_B1 }, 2, { 1 }, { 7, 9 }, 2, 8, 1, 3, 2 },
+ { 214, { FORMAT_A1, FORMAT_B1 }, 2, { 1 }, { 7, 9 }, 2, 2, 1, 6, 2 },
+ { 215, { FORMAT_A1, FORMAT_B1 }, 2, { 1 }, { 4, 9 }, 2, 2, 2, 6, 2 },
+ { 216, { FORMAT_A1, FORMAT_B1 }, 2, { 1 }, { 8, 9 }, 2, 2, 2, 6, 2 },
+ { 217, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 9 }, 1, 2, 2, 6, 2 },
+ { 218, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 9 }, 1, 8, 1, 3, 2 },
+ { 219, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 9 }, 1, 2, 1, 6, 2 },
+ { 220, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 8, 9 }, 2, 2, 2, 6, 2 },
+ { 221, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 4, 9 }, 2, 2, 1, 6, 2 },
+ { 222, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 7, 9 }, 2, 8, 1, 3, 2 },
+ { 223, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 2, 2, 6, 2 },
+ { 224, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 2, 1, 6, 2 },
+ { 225, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 8, 1, 3, 2 },
+ { 226, { FORMAT_A2, FORMAT_B2 }, 2, { 1 }, { 9 }, 1, 0, 1, 3, 4 },
+ { 227, { FORMAT_A2, FORMAT_B2 }, 2, { 1 }, { 4, 9 }, 2, 6, 1, 2, 4 },
+ { 228, { FORMAT_A2, FORMAT_B2 }, 2, { 1 }, { 7, 9 }, 2, 6, 1, 2, 4 },
+ { 229, { FORMAT_A2, FORMAT_B2 }, 2, { 1 }, { 4, 9 }, 2, 0, 2, 3, 4 },
+ { 230, { FORMAT_A2, FORMAT_B2 }, 2, { 1 }, { 8, 9 }, 2, 0, 2, 3, 4 },
+ { 231, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 9 }, 1, 0, 2, 3, 4 },
+ { 232, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 9 }, 1, 6, 1, 2, 4 },
+ { 233, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 9 }, 1, 0, 1, 3, 4 },
+ { 234, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 8, 9 }, 2, 0, 2, 3, 4 },
+ { 235, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 4, 9 }, 2, 0, 1, 3, 4 },
+ { 236, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 7, 9 }, 2, 6, 1, 2, 4 },
+ { 237, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 0, 1, 3, 4 },
+ { 238, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 3, 4, 8, 9 }, 4, 0, 2, 3, 4 },
+ { 239, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 1, 3, 4 },
+ { 240, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 6, 1, 2, 4 },
+ { 241, { FORMAT_A3, FORMAT_B3 }, 2, { 1 }, { 9 }, 1, 0, 1, 2, 6 },
+ { 242, { FORMAT_A3, FORMAT_B3 }, 2, { 1 }, { 4, 9 }, 2, 2, 1, 2, 6 },
+ { 243, { FORMAT_A3, FORMAT_B3 }, 2, { 1 }, { 7, 9 }, 2, 0, 1, 2, 6 },
+ { 244, { FORMAT_A3, FORMAT_B3 }, 2, { 1 }, { 7, 9 }, 2, 2, 1, 2, 6 },
+ { 245, { FORMAT_A3, FORMAT_B3 }, 2, { 1 }, { 4, 9 }, 2, 0, 2, 2, 6 },
+ { 246, { FORMAT_A3, FORMAT_B3 }, 2, { 1 }, { 8, 9 }, 2, 0, 2, 2, 6 },
+ { 247, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 9 }, 1, 0, 2, 2, 6 },
+ { 248, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 9 }, 1, 2, 1, 2, 6 },
+ { 249, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 9 }, 1, 0, 1, 2, 6 },
+ { 250, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 8, 9 }, 2, 0, 2, 2, 6 },
+ { 251, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 4, 9 }, 2, 0, 1, 2, 6 },
+ { 252, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 7, 9 }, 2, 2, 1, 2, 6 },
+ { 253, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 3, 4, 8, 9 }, 3, 0, 2, 2, 6 },
+ { 254, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 1, 3, 5, 7, 9 }, 5, 0, 1, 2, 6 },
+ { 255, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }, 10, 2, 1, 2, 6 },
+};
+
+/* 3GPP 38.211-f20 Table - 6.3.3.2-4 */
+const xRANPrachConfigTableStruct gxranPrachDataTable_mmw[XRAN_PRACH_CONFIG_TABLE_SIZE] =
+{
+ { 0, { FORMAT_A1 }, 16, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 6, 2 },
+ { 1, { FORMAT_A1 }, 16, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 6, 2 },
+ { 2, { FORMAT_A1 }, 8, { 1, 2 }, { 9, 19, 29, 39 }, 4, 0, 2, 6, 2 },
+ { 3, { FORMAT_A1 }, 8, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 6, 2 },
+ { 4, { FORMAT_A1 }, 8, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 6, 2 },
+ { 5, { FORMAT_A1 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 6, 2 },
+ { 6, { FORMAT_A1 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 6, 2 },
+ { 7, { FORMAT_A1 }, 4, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 6, 2 },
+ { 8, { FORMAT_A1 }, 2, { 1 }, { 7, 15, 23, 31, 39 }, 5, 0, 2, 6, 2 },
+ { 9, { FORMAT_A1 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 6, 2 },
+ { 10, { FORMAT_A1 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 6, 2 },
+ { 11, { FORMAT_A1 }, 2, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 6, 2 },
+ { 12, { FORMAT_A1 }, 1, { 0 }, { 19, 39 }, 2, 7, 1, 3, 2 },
+ { 13, { FORMAT_A1 }, 1, { 0 }, { 3, 5, 7 }, 2, 0, 1, 6, 2 },
+ { 14, { FORMAT_A1 }, 1, { 0 }, { 24, 29, 34, 39 }, 4, 7, 1, 3, 2 },
+ { 15, { FORMAT_A1 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 7, 2, 3, 2 },
+ { 16, { FORMAT_A1 }, 1, { 0 }, { 17, 19, 37, 39 }, 4, 0, 1, 6, 2 },
+ { 17, { FORMAT_A1 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 0, 2, 6, 2 },
+ { 18, { FORMAT_A1 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 6, 2 },
+ { 19, { FORMAT_A1 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 7, 1, 3, 2 },
+ { 20, { FORMAT_A1 }, 1, { 0 }, { 3, 5, 7, 9, 11, 13 }, 6, 7, 1, 3, 2 },
+ { 21, { FORMAT_A1 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 7, 1, 3, 2 },
+ { 22, { FORMAT_A1 }, 1, { 0 }, { 7, 15, 23, 31, 39 }, 5, 0, 1, 6, 2 },
+ { 23, { FORMAT_A1 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 0, 1, 6, 2 },
+ { 24, { FORMAT_A1 }, 1, { 0 }, { 13, 14, 15, 29, 30, 31, 37, 38, 39 }, 10, 7, 2, 3, 2 },
+ { 25, { FORMAT_A1 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 7, 1, 3, 2 },
+ { 26, { FORMAT_A1 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 6, 2 },
+ { 27, { FORMAT_A1 }, 1, { 0 }, { 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21,
+ 23, 25, 27, 29, 31, 33, 35, 37, 39 }, 15, 0, 1, 6, 2 },
+ { 28, { FORMAT_A1 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
+ 14, 15, 16, 17, 18, 19, 20, 21, 22, 23,
+ 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
+ 34, 35, 36, 37, 38, 39 }, 40, 7, 1, 3, 2 },
+ { 29, { FORMAT_A2 }, 16, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 3, 4 },
+ { 30, { FORMAT_A2 }, 16, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 3, 4 },
+ { 31, { FORMAT_A2 }, 8, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 10, 0, 2, 3, 4 },
+ { 32, { FORMAT_A2 }, 8, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 3, 4 },
+ { 33, { FORMAT_A2 }, 8, { 1, 2 }, { 9, 19, 29, 39 }, 4, 0, 2, 3, 4 },
+ { 34, { FORMAT_A2 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 3, 4 },
+ { 35, { FORMAT_A2 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 3, 4 },
+ { 36, { FORMAT_A2 }, 4, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 3, 4 },
+ { 37, { FORMAT_A2 }, 2, { 1 }, { 7, 15, 23, 31, 39 }, 5, 0, 2, 3, 4 },
+ { 38, { FORMAT_A2 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 3, 4 },
+ { 39, { FORMAT_A2 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 3, 4 },
+ { 40, { FORMAT_A2 }, 2, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 3, 4 },
+ { 41, { FORMAT_A2 }, 1, { 0 }, { 19, 39 }, 2, 5, 1, 2, 4 },
+ { 42, { FORMAT_A2 }, 1, { 0 }, { 3, 5, 7 }, 3, 0, 1, 3, 4 },
+ { 43, { FORMAT_A2 }, 1, { 0 }, { 24, 29, 34, 39 }, 4, 5, 1, 2, 4 },
+ { 44, { FORMAT_A2 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 5, 2, 2, 4 },
+ { 45, { FORMAT_A2 }, 1, { 0 }, { 17, 19, 37, 39 }, 4, 0, 1, 3, 4 },
+ { 46, { FORMAT_A2 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 0, 2, 3, 4 },
+ { 47, { FORMAT_A2 }, 1, { 0 }, { 7, 15, 23, 31, 39 }, 5, 0, 1, 3, 4 },
+ { 48, { FORMAT_A2 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 5, 1, 2, 4 },
+ { 49, { FORMAT_A2 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 0, 1, 3, 4 },
+ { 50, { FORMAT_A2 }, 1, { 0 }, { 3, 5, 7, 9, 11, 13 }, 6, 5, 1, 2, 4 },
+ { 51, { FORMAT_A2 }, 1, { 0 }, { 3, 5, 7, 9, 11, 13 }, 6, 0, 1, 3, 4 },
+ { 52, { FORMAT_A2 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 5, 1, 2, 4 },
+ { 53, { FORMAT_A2 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 3, 4 },
+ { 54, { FORMAT_A2 }, 1, { 0 }, { 13, 14, 15, 29, 30, 31, 37, 38, 39 }, 10, 5, 2, 2, 4 },
+ { 55, { FORMAT_A2 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 5, 1, 2, 4 },
+ { 56, { FORMAT_A2 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 3, 4 },
+ { 57, { FORMAT_A2 }, 1, { 0 }, { 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21,
+ 23, 25, 27, 29, 31, 33, 35, 37, 39 }, 15, 0, 1, 3, 4 },
+ { 58, { FORMAT_A2 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
+ 14, 15, 16, 17, 18, 19, 20, 21, 22, 23,
+ 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
+ 34, 35, 36, 37, 38, 39 }, 40, 5, 1, 2, 4 },
+ { 59, { FORMAT_A3 }, 16, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 2, 6 },
+ { 60, { FORMAT_A3 }, 16, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 2, 6 },
+ { 61, { FORMAT_A3 }, 8, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 2, 6 },
+ { 62, { FORMAT_A3 }, 8, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 2, 6 },
+ { 63, { FORMAT_A3 }, 8, { 1, 2 }, { 9, 19, 29, 39 }, 4, 0, 2, 2, 6 },
+ { 64, { FORMAT_A3 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 2, 6 },
+ { 65, { FORMAT_A3 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 2, 6 },
+ { 66, { FORMAT_A3 }, 4, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 2, 6 },
+ { 67, { FORMAT_A3 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 2, 6 },
+ { 68, { FORMAT_A3 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 2, 6 },
+ { 69, { FORMAT_A3 }, 2, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 2, 6 },
+ { 70, { FORMAT_A3 }, 1, { 0 }, { 19, 39 }, 2, 7, 1, 1, 6 },
+ { 71, { FORMAT_A3 }, 1, { 0 }, { 3, 5, 7 }, 3, 0, 1, 2, 6 },
+ { 72, { FORMAT_A3 }, 1, { 0 }, { 9, 11, 13 }, 3, 2, 1, 2, 6 },
+ { 73, { FORMAT_A3 }, 1, { 0 }, { 24, 29, 34, 39 }, 4, 7, 1, 1, 6 },
+ { 74, { FORMAT_A3 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 7, 2, 1, 6 },
+ { 75, { FORMAT_A3 }, 1, { 0 }, { 17, 19, 37, 39 }, 4, 0, 1, 2, 6 },
+ { 76, { FORMAT_A3 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 0, 2, 2, 6 },
+ { 77, { FORMAT_A3 }, 1, { 0 }, { 7, 15, 23, 31, 39 }, 5, 0, 1, 2, 6 },
+ { 78, { FORMAT_A3 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 7, 1, 1, 6 },
+ { 79, { FORMAT_A3 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 0, 1, 2, 6 },
+ { 80, { FORMAT_A3 }, 1, { 0 }, { 3, 5, 7, 9, 11, 13 }, 6, 0, 1, 2, 6 },
+ { 81, { FORMAT_A3 }, 1, { 0 }, { 3, 5, 7, 9, 11, 13 }, 6, 7, 1, 1, 6 },
+ { 82, { FORMAT_A3 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 2, 6 },
+ { 83, { FORMAT_A3 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 7, 1, 1, 6 },
+ { 84, { FORMAT_A3 }, 1, { 0 }, { 13, 14, 15, 29, 30, 31, 37, 38, 39 }, 10, 7, 2, 1, 6 },
+ { 85, { FORMAT_A3 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 7, 1, 1, 6 },
+ { 86, { FORMAT_A3 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 2, 6 },
+ { 87, { FORMAT_A3 }, 1, { 0 }, { 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21,
+ 23, 25, 27, 29, 31, 33, 35, 37, 39 }, 15, 0, 1, 2, 6 },
+ { 88, { FORMAT_A3 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
+ 14, 15, 16, 17, 18, 19, 20, 21, 22, 23,
+ 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
+ 34, 35, 36, 37, 38, 39 }, 40, 7, 1, 1, 6 },
+ { 89, { FORMAT_B1 }, 16, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 2, 6, 2 },
+ { 90, { FORMAT_B1 }, 8, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 2, 6, 2 },
+ { 91, { FORMAT_B1 }, 8, { 1, 2 }, { 9, 19, 29, 39 }, 4, 2, 2, 6, 2 },
+ { 92, { FORMAT_B1 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 2, 6, 2 },
+ { 93, { FORMAT_B1 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 2, 6, 2 },
+ { 94, { FORMAT_B1 }, 2, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 1, 6, 2 },
+ { 95, { FORMAT_B1 }, 1, { 0 }, { 19, 39 }, 2, 8, 1, 3, 2 },
+ { 96, { FORMAT_B1 }, 1, { 0 }, { 3, 5, 7 }, 3, 2, 1, 6, 2 },
+ { 97, { FORMAT_B1 }, 1, { 0 }, { 24, 29, 34, 39 }, 4, 8, 1, 3, 2 },
+ { 98, { FORMAT_B1 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 8, 2, 3, 2 },
+ { 99, { FORMAT_B1 }, 1, { 0 }, { 17, 19, 37, 39 }, 4, 2, 1, 6, 2 },
+ { 100, { FORMAT_B1 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 2, 2, 6, 2 },
+ { 101, { FORMAT_B1 }, 1, { 0 }, { 7, 15, 23, 31, 39 }, 5, 2, 1, 6, 2 },
+ { 102, { FORMAT_B1 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 8, 1, 3, 2 },
+ { 103, { FORMAT_B1 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 2, 1, 6, 2 },
+ { 104, { FORMAT_B1 }, 1, { 0 }, { 3, 5, 7, 9, 11, 13 }, 6, 8, 1, 3, 2 },
+ { 105, { FORMAT_B1 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 8, 1, 3, 2 },
+ { 106, { FORMAT_B1 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 6, 2 },
+ { 107, { FORMAT_B1 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 8, 1, 3, 2 },
+ { 108, { FORMAT_B1 }, 1, { 0 }, { 13, 14, 15, 29, 30, 31, 37, 38, 39 }, 10, 8, 2, 3, 2 },
+ { 109, { FORMAT_B1 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 1, 6, 2 },
+ { 110, { FORMAT_B1 }, 1, { 0 }, { 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21,
+ 23, 25, 27, 29, 31, 33, 35, 37, 39 }, 15, 2, 1, 6, 2 },
+ { 111, { FORMAT_B1 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
+ 14, 15, 16, 17, 18, 19, 20, 21, 22, 23,
+ 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
+ 34, 35, 36, 37, 38, 39 }, 40, 8, 1, 3, 2 },
+ { 112, { FORMAT_B4 }, 16, { 1, 2 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 1, 12 },
+ { 113, { FORMAT_B4 }, 16, { 1, 2 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 1, 12 },
+ { 114, { FORMAT_B4 }, 8, { 1, 2 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 1, 12 },
+ { 115, { FORMAT_B4 }, 8, { 1, 2 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 1, 12 },
+ { 116, { FORMAT_B4 }, 8, { 1, 2 }, { 9, 19, 29, 39 }, 4, 0, 2, 1, 12 },
+ { 117, { FORMAT_B4 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 1, 12 },
+ { 118, { FORMAT_B4 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 1, 12 },
+ { 119, { FORMAT_B4 }, 4, { 1, 2 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 1, 12 },
+ { 120, { FORMAT_B4 }, 2, { 1 }, { 7, 15, 23, 31, 39 }, 5, 2, 2, 1, 12 },
+ { 121, { FORMAT_B4 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 1, 12 },
+ { 122, { FORMAT_B4 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 1, 12 },
+ { 123, { FORMAT_B4 }, 2, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 1, 12 },
+ { 124, { FORMAT_B4 }, 1, { 0 }, { 19, 39 }, 2, 2, 2, 1, 12 },
+ { 125, { FORMAT_B4 }, 1, { 0 }, { 17, 19, 37, 39 }, 4, 0, 1, 1, 12 },
+ { 126, { FORMAT_B4 }, 1, { 0 }, { 24, 29, 34, 39 }, 4, 2, 1, 1, 12 },
+ { 127, { FORMAT_B4 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 2, 2, 1, 12 },
+ { 128, { FORMAT_B4 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 0, 2, 1, 12 },
+ { 129, { FORMAT_B4 }, 1, { 0 }, { 7, 15, 23, 31, 39 }, 5, 0, 1, 1, 12 },
+ { 130, { FORMAT_B4 }, 1, { 0 }, { 7, 15, 23, 31, 39 }, 5, 0, 2, 1, 12 },
+ { 131, { FORMAT_B4 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 0, 1, 1, 12 },
+ { 132, { FORMAT_B4 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 2, 2, 1, 12 },
+ { 133, { FORMAT_B4 }, 1, { 0 }, { 9, 11, 13, 15, 17, 19 }, 6, 0, 1, 1, 12 },
+ { 134, { FORMAT_B4 }, 1, { 0 }, { 3, 5, 7, 9, 11, 13 }, 6, 2, 1, 1, 12 },
+ { 135, { FORMAT_B4 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 1, 12 },
+ { 136, { FORMAT_B4 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 2, 1, 12 },
+ { 137, { FORMAT_B4 }, 1, { 0 }, { 13, 14, 15, 29, 30, 31, 37, 38, 39 }, 10, 2, 2, 1, 12 },
+ { 138, { FORMAT_B4 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 1, 12 },
+ { 139, { FORMAT_B4 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 1, 1, 12 },
+ { 140, { FORMAT_B4 }, 1, { 0 }, { 3, 5, 7, 9, 11, 13, 15, 17, 19, 21,
+ 23, 25 }, 12, 2, 1, 1, 12 },
+ { 141, { FORMAT_B4 }, 1, { 0 }, { 3, 5, 7, 9, 11, 13, 15, 17, 19, 21,
+ 23, 25 }, 12, 0, 2, 1, 12 },
+ { 142, { FORMAT_B4 }, 1, { 0 }, { 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21,
+ 23, 25, 27, 29, 31, 33, 35, 37, 39 }, 15, 0, 1, 1, 12 },
+ { 143, { FORMAT_B4 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
+ 14, 15, 16, 17, 18, 19, 20, 21, 22, 23,
+ 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
+ 34, 35, 36, 37, 38, 39 }, 40, 2, 1, 1, 12 },
+ { 144, { FORMAT_C0 }, 16, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 7, 2 },
+ { 145, { FORMAT_C0 }, 16, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 7, 2 },
+ { 146, { FORMAT_C0 }, 8, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 7, 2 },
+ { 147, { FORMAT_C0 }, 8, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 7, 2 },
+ { 148, { FORMAT_C0 }, 8, { 1, 2 }, { 9, 19, 29, 39 }, 4, 0, 2, 7, 2 },
+ { 149, { FORMAT_C0 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 7, 2 },
+ { 150, { FORMAT_C0 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 7, 2 },
+ { 151, { FORMAT_C0 }, 4, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 7, 2 },
+ { 152, { FORMAT_C0 }, 2, { 1 }, { 7, 15, 23, 31, 39 }, 5, 0, 2, 7, 2 },
+ { 153, { FORMAT_C0 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 7, 2 },
+ { 154, { FORMAT_C0 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 7, 2 },
+ { 155, { FORMAT_C0 }, 2, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 7, 2 },
+ { 156, { FORMAT_C0 }, 1, { 0 }, { 19, 39 }, 2, 8, 1, 3, 2 },
+ { 157, { FORMAT_C0 }, 1, { 0 }, { 3, 5, 7 }, 3, 0, 1, 7, 2 },
+ { 158, { FORMAT_C0 }, 1, { 0 }, { 24, 29, 34, 39 }, 4, 8, 1, 3, 2 },
+ { 159, { FORMAT_C0 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 8, 2, 3, 2 },
+ { 160, { FORMAT_C0 }, 1, { 0 }, { 17, 19, 37, 39 }, 4, 0, 1, 7, 2 },
+ { 161, { FORMAT_C0 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 0, 2, 7, 2 },
+ { 162, { FORMAT_C0 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 8, 1, 3, 2 },
+ { 163, { FORMAT_C0 }, 1, { 0 }, { 7, 15, 23, 31, 39 }, 5, 0, 1, 7, 2 },
+ { 164, { FORMAT_C0 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 0, 1, 7, 2 },
+ { 165, { FORMAT_C0 }, 1, { 0 }, { 3, 5, 7, 9, 11, 13 }, 6, 8, 1, 3, 2 },
+ { 166, { FORMAT_C0 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 8, 1, 3, 2 },
+ { 167, { FORMAT_C0 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 7, 2 },
+ { 168, { FORMAT_C0 }, 1, { 0 }, { 13, 14, 15, 29, 30, 31, 37, 38, 39 }, 10, 8, 2, 3, 2 },
+ { 169, { FORMAT_C0 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 8, 1, 3, 2 },
+ { 170, { FORMAT_C0 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 7, 2 },
+ { 171, { FORMAT_C0 }, 1, { 0 }, { 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21,
+ 23, 25, 27, 29, 31, 33, 35, 37, 39 }, 15, 0, 1, 7, 2 },
+ { 172, { FORMAT_C0 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
+ 14, 15, 16, 17, 18, 19, 20, 21, 22, 23,
+ 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
+ 34, 35, 36, 37, 38, 39 }, 40, 8, 1, 3, 2 },
+ { 173, { FORMAT_C2 }, 16, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 2, 6 },
+ { 174, { FORMAT_C2 }, 16, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 2, 6 },
+ { 175, { FORMAT_C2 }, 8, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 2, 6 },
+ { 176, { FORMAT_C2 }, 8, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 2, 6 },
+ { 177, { FORMAT_C2 }, 8, { 1, 2 }, { 9, 19, 29, 39 }, 4, 0, 2, 2, 6 },
+ { 178, { FORMAT_C2 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 2, 6 },
+ { 179, { FORMAT_C2 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 2, 6 },
+ { 180, { FORMAT_C2 }, 4, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 2, 6 },
+ { 181, { FORMAT_C2 }, 2, { 1 }, { 7, 15, 23, 31, 39 }, 5, 2, 2, 2, 6 },
+ { 182, { FORMAT_C2 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 1, 2, 6 },
+ { 183, { FORMAT_C2 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 0, 2, 2, 6 },
+ { 184, { FORMAT_C2 }, 2, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 2, 6 },
+ { 185, { FORMAT_C2 }, 1, { 0 }, { 19, 39 }, 2, 2, 1, 2, 6 },
+ { 186, { FORMAT_C2 }, 1, { 0 }, { 3, 5, 7 }, 3, 0, 1, 2, 6 },
+ { 187, { FORMAT_C2 }, 1, { 0 }, { 24, 29, 34, 39 }, 4, 7, 1, 1, 6 },
+ { 188, { FORMAT_C2 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 7, 2, 1, 6 },
+ { 189, { FORMAT_C2 }, 1, { 0 }, { 17, 19, 37, 39 }, 4, 0, 1, 2, 6 },
+ { 190, { FORMAT_C2 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 2, 2, 2, 6 },
+ { 191, { FORMAT_C2 }, 1, { 0 }, { 7, 15, 23, 31, 39 }, 5, 2, 1, 2, 6 },
+ { 192, { FORMAT_C2 }, 1, { 0 }, { 3, 5, 7, 9, 11, 13 }, 6, 7, 1, 1, 6 },
+ { 193, { FORMAT_C2 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 7, 2, 1, 6 },
+ { 194, { FORMAT_C2 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 0, 1, 2, 6 },
+ { 195, { FORMAT_C2 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 7, 2, 1, 6 },
+ { 196, { FORMAT_C2 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 2, 6 },
+ { 197, { FORMAT_C2 }, 1, { 0 }, { 13, 14, 15, 29, 30, 31, 37, 38, 39 }, 10, 7, 2, 1, 6 },
+ { 198, { FORMAT_C2 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 7, 1, 1, 6 },
+ { 199, { FORMAT_C2 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 0, 1, 2, 6 },
+ { 200, { FORMAT_C2 }, 1, { 0 }, { 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21,
+ 23, 25, 27, 29, 31, 33, 35, 37, 39 }, 15, 0, 1, 2, 6 },
+ { 201, { FORMAT_C2 }, 1, { 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,
+ 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32,
+ 33, 34, 35, 36, 37, 38, 39 }, 40, 7, 1, 1, 6 },
+ { 202, { FORMAT_A1, FORMAT_B1 }, 16, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 6, 2 },
+ { 203, { FORMAT_A1, FORMAT_B1 }, 16, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 1, 6, 2 },
+ { 204, { FORMAT_A1, FORMAT_B1 }, 8, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 6, 2 },
+ { 205, { FORMAT_A1, FORMAT_B1 }, 8, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 1, 6, 2 },
+ { 206, { FORMAT_A1, FORMAT_B1 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 6, 2 },
+ { 207, { FORMAT_A1, FORMAT_B1 }, 4, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 1, 6, 2 },
+ { 208, { FORMAT_A1, FORMAT_B1 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 6, 2 },
+ { 209, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 19, 39 }, 2, 8, 1, 3, 2 },
+ { 210, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 8, 1, 3, 2 },
+ { 211, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 17, 19, 37, 39 }, 4, 2, 1, 6, 2 },
+ { 212, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 2, 2, 6, 2 },
+ { 213, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 8, 1, 3, 2 },
+ { 214, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 7, 15, 23, 31, 39 }, 5, 2, 1, 6, 2 },
+ { 215, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 2, 1, 6, 2 },
+ { 216, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 8, 1, 3, 2 },
+ { 217, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 6, 2 },
+ { 218, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 1, 6, 2 },
+ { 219, { FORMAT_A1, FORMAT_B1 }, 1, { 0 }, { 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21,
+ 23, 25, 27, 29, 31, 33, 35, 37, 39 }, 15, 2, 1, 6, 2 },
+ { 220, { FORMAT_A2, FORMAT_B2 }, 16, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 3, 4 },
+ { 221, { FORMAT_A2, FORMAT_B2 }, 16, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 1, 3, 4 },
+ { 222, { FORMAT_A2, FORMAT_B2 }, 8, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 3, 4 },
+ { 223, { FORMAT_A2, FORMAT_B2 }, 8, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 1, 3, 4 },
+ { 224, { FORMAT_A2, FORMAT_B2 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 3, 4 },
+ { 225, { FORMAT_A2, FORMAT_B2 }, 4, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 1, 3, 4 },
+ { 226, { FORMAT_A2, FORMAT_B2 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 3, 4 },
+ { 227, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 19, 39 }, 2, 6, 1, 2, 4 },
+ { 228, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 6, 1, 2, 4 },
+ { 229, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 17, 19, 37, 39 }, 4, 2, 1, 3, 4 },
+ { 230, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 2, 2, 3, 4 },
+ { 231, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 6, 1, 2, 4 },
+ { 232, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 7, 15, 23, 31, 39 }, 5, 2, 1, 3, 4 },
+ { 233, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 2, 1, 3, 4 },
+ { 234, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 6, 1, 2, 4 },
+ { 235, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 3, 4 },
+ { 236, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 1, 3, 4 },
+ { 237, { FORMAT_A2, FORMAT_B2 }, 1, { 0 }, { 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21,
+ 23, 25, 27, 29, 31, 33, 35, 37, 39 }, 15, 2, 1, 3, 4 },
+ { 238, { FORMAT_A3, FORMAT_B3 }, 16, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 2, 6 },
+ { 239, { FORMAT_A3, FORMAT_B3 }, 16, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 1, 2, 6 },
+ { 240, { FORMAT_A3, FORMAT_B3 }, 8, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 2, 6 },
+ { 241, { FORMAT_A3, FORMAT_B3 }, 8, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 1, 2, 6 },
+ { 242, { FORMAT_A3, FORMAT_B3 }, 4, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 2, 6 },
+ { 243, { FORMAT_A3, FORMAT_B3 }, 4, { 1 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 1, 2, 6 },
+ { 244, { FORMAT_A3, FORMAT_B3 }, 2, { 1 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 2, 6 },
+ { 245, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 19, 39 }, 2, 2, 1, 2, 6 },
+ { 246, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 2, 1, 2, 6 },
+ { 247, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 17, 19, 37, 39 }, 4, 2, 1, 2, 6 },
+ { 248, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 9, 19, 29, 39 }, 4, 2, 2, 2, 6 },
+ { 249, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 2, 1, 2, 6 },
+ { 250, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 23, 27, 31, 35, 39 }, 5, 2, 1, 2, 6 },
+ { 251, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 2, 2, 6 },
+ { 252, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 4, 9, 14, 19, 24, 29, 34, 39 }, 8, 2, 1, 2, 6 },
+ { 253, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 3, 7, 11, 15, 19, 23, 27, 31, 35, 39 }, 10, 2, 2, 2, 6 },
+ { 254, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21,
+ 23, 25, 27, 29, 31, 33, 35, 37, 39 }, 15, 2, 1, 2, 6 },
+ { 255, { FORMAT_A3, FORMAT_B3 }, 1, { 0 }, { 7, 15, 23, 31, 39 }, 5, 2, 1, 2, 6 },
+};
+
+const xRANPrachPreambleLRAStruct gxranPreambleforLRA[13] =
+{
+ {FORMAT_0, 839, 125, 1 , 3168 },
+ {FORMAT_1, 839, 125, 2 ,21024 },
+ {FORMAT_2, 839, 125, 4 , 4688 },
+ {FORMAT_3, 839, 5, 1 , 3168 },
+ {FORMAT_A1, 139, 15, 2 , 288 },
+ {FORMAT_A2, 139, 15, 4 , 576 },
+ {FORMAT_A3, 139, 15, 6 , 864 },
+ {FORMAT_B1, 139, 15, 2 , 216 },
+ {FORMAT_B2, 139, 15, 4 , 360 },
+ {FORMAT_B3, 139, 15, 6 , 504 },
+ {FORMAT_B4, 139, 15, 12, 936 },
+ {FORMAT_C0, 139, 15, 1 , 1240},
+ {FORMAT_C2, 139, 15, 4 , 2048}
+};
+
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/**\r
- * @brief This file provides the implementation of User Plane Messages APIs.\r
- *\r
- * @file xran_up_api.c\r
- * @ingroup group_lte_source_xran\r
- * @author Intel Corporation\r
- *\r
- **/\r
-#include <inttypes.h>\r
-\r
-#include <rte_memcpy.h>\r
-#include <rte_mbuf.h>\r
-\r
-#include "xran_fh_o_du.h"\r
-#include "xran_transport.h"\r
-#include "xran_up_api.h"\r
-#include "xran_printf.h"\r
-#include "xran_mlog_lnx.h"\r
-\r
-extern uint32_t xran_lib_ota_tti;\r
-\r
-/**\r
- * @brief Builds eCPRI header in xRAN packet\r
- *\r
- * @param mbuf Initialized rte_mbuf packet\r
- * @param iq_data_num_bytes Number of bytes in IQ data buffer\r
- * @param iq_data_offset Number of elements already sent\r
- * @return int int 0 on success, non zero on failure\r
- */\r
-static int build_ecpri_hdr(struct rte_mbuf *mbuf,\r
- const uint32_t iq_data_num_bytes,\r
- const uint32_t iq_data_offset,\r
- uint8_t alignment)\r
-{\r
- struct xran_ecpri_hdr *ecpri_hdr = (struct xran_ecpri_hdr *)\r
- rte_pktmbuf_append(mbuf, sizeof(struct xran_ecpri_hdr));\r
-\r
- uint16_t iq_samples_bytes_in_mbuf = rte_pktmbuf_tailroom(mbuf) -\r
- sizeof(struct radio_app_common_hdr) - sizeof(struct data_section_hdr);\r
-\r
- iq_samples_bytes_in_mbuf -= (iq_samples_bytes_in_mbuf % alignment);\r
-\r
- if (NULL == ecpri_hdr)\r
- return 1;\r
-\r
- ecpri_hdr->cmnhdr.ecpri_ver = XRAN_ECPRI_VER;\r
- ecpri_hdr->cmnhdr.ecpri_resv = 0;\r
- ecpri_hdr->cmnhdr.ecpri_concat = 0;\r
- ecpri_hdr->cmnhdr.ecpri_mesg_type = ECPRI_IQ_DATA;\r
-\r
- if (iq_data_offset + iq_samples_bytes_in_mbuf > iq_data_num_bytes) {\r
- ecpri_hdr->cmnhdr.ecpri_payl_size =\r
- rte_cpu_to_be_16(sizeof(struct radio_app_common_hdr) +\r
- sizeof(struct data_section_hdr) +\r
- (iq_data_num_bytes - iq_data_offset) +\r
- xran_get_ecpri_hdr_size());\r
- ecpri_hdr->ecpri_seq_id.e_bit = 1; /* last segment */\r
- } else {\r
- ecpri_hdr->cmnhdr.ecpri_payl_size =\r
- rte_cpu_to_be_16(sizeof(struct radio_app_common_hdr) +\r
- sizeof(struct data_section_hdr) +\r
- iq_samples_bytes_in_mbuf +\r
- xran_get_ecpri_hdr_size());\r
- ecpri_hdr->ecpri_seq_id.e_bit = 0;\r
- }\r
-\r
-// ecpri_hdr->ecpri_xtc_id = 0; /* currently not used */\r
- ecpri_hdr->ecpri_seq_id.seq_id = 0;\r
- ecpri_hdr->ecpri_seq_id.sub_seq_id = iq_data_offset /\r
- iq_samples_bytes_in_mbuf;\r
-\r
- return 0;\r
-}\r
-\r
-/**\r
- * @brief Builds eCPRI header in xRAN packet\r
- *\r
- * @param mbuf Initialized rte_mbuf packet\r
- * @param ecpri_mesg_type eCPRI message type\r
- * @param payl_size the size in bytes of the payload part of eCPRI message\r
- * @param CC_ID Component Carrier ID for ecpriRtcid/ecpriPcid\r
- * @param Ant_ID Antenna ID for ecpriRtcid/ecpriPcid\r
- * @param seq_id Message identifier for eCPRI message\r
- * @param comp_meth Compression method\r
- * @return int int 0 on success, non zero on failure\r
- */\r
-static int xran_build_ecpri_hdr_ex(struct rte_mbuf *mbuf,\r
- uint8_t ecpri_mesg_type,\r
- int payl_size,\r
- uint8_t CC_ID,\r
- uint8_t Ant_ID,\r
- uint8_t seq_id,\r
- uint8_t comp_meth)\r
-{\r
- char *pChar = rte_pktmbuf_mtod(mbuf, char*);\r
- struct xran_ecpri_hdr *ecpri_hdr = (struct xran_ecpri_hdr *)(pChar + sizeof(struct ether_hdr));\r
- uint16_t ecpri_payl_size = payl_size\r
- + sizeof(struct data_section_hdr)\r
- + sizeof(struct radio_app_common_hdr)\r
- + xran_get_ecpri_hdr_size();\r
-\r
- if (comp_meth != XRAN_COMPMETHOD_NONE)\r
- ecpri_payl_size += sizeof(struct data_section_compression_hdr);\r
-\r
- if (NULL == ecpri_hdr)\r
- return 1;\r
-\r
- ecpri_hdr->cmnhdr.ecpri_ver = XRAN_ECPRI_VER;\r
- ecpri_hdr->cmnhdr.ecpri_resv = 0; // should be zero\r
- ecpri_hdr->cmnhdr.ecpri_concat = 0;\r
- ecpri_hdr->cmnhdr.ecpri_mesg_type = ecpri_mesg_type;\r
- ecpri_hdr->cmnhdr.ecpri_payl_size = rte_cpu_to_be_16(ecpri_payl_size);\r
-\r
- /* one to one lls-CU to RU only and band sector is the same */\r
- ecpri_hdr->ecpri_xtc_id = xran_compose_cid(0, 0, CC_ID, Ant_ID);\r
-\r
- ecpri_hdr->ecpri_seq_id.seq_id = seq_id;\r
-\r
- /* no transport layer fragmentation supported */\r
- ecpri_hdr->ecpri_seq_id.sub_seq_id = 0;\r
- ecpri_hdr->ecpri_seq_id.e_bit = 1;\r
-\r
- return 0;\r
-}\r
-\r
-\r
-/**\r
- * @brief Builds application layer of xRAN packet\r
- *\r
- * @param mbuf Initialized rte_mbuf packet\r
- * @param app_hdr_input Radio App common header structure to be set in mbuf\r
- * packet.\r
- * @return int 0 on success, non zero on failure\r
- */\r
-static int build_application_layer(\r
- struct rte_mbuf *mbuf,\r
- const struct radio_app_common_hdr *app_hdr_input)\r
-{\r
- char *pChar = rte_pktmbuf_mtod(mbuf, char*);\r
- struct radio_app_common_hdr *app_hdr = (struct radio_app_common_hdr *)(pChar + sizeof(struct ether_hdr)\r
- + sizeof (struct xran_ecpri_hdr));\r
-\r
- if (NULL == app_hdr)\r
- return 1;\r
-\r
- rte_memcpy(app_hdr, app_hdr_input, sizeof(struct radio_app_common_hdr));\r
-\r
- return 0;\r
-}\r
-\r
-/**\r
- * @brief Builds section header in xRAN packet\r
- *\r
- * @param mbuf Initialized rte_mbuf packet\r
- * @param sec_hdr Section header structure to be set in mbuf packet\r
- * @return int 0 on success, non zero on failure\r
- */\r
-static int build_section_hdr(\r
- struct rte_mbuf *mbuf,\r
- const struct data_section_hdr *sec_hdr)\r
-{\r
- char *pChar = rte_pktmbuf_mtod(mbuf, char*);\r
- struct data_section_hdr *section_hdr = (struct data_section_hdr *)\r
- (pChar + sizeof(struct ether_hdr) + sizeof (struct xran_ecpri_hdr) + sizeof(struct radio_app_common_hdr));\r
-\r
- if (NULL == section_hdr)\r
- return 1;\r
-\r
- rte_memcpy(section_hdr, sec_hdr, sizeof(struct data_section_hdr));\r
-\r
- return 0;\r
-}\r
-/**\r
- * @brief Function for appending IQ samples data to the mbuf.\r
- *\r
- * @param mbuf Initialized rte_mbuf packet.\r
- * @param iq_data_start Address of the first element in IQ data array.\r
- * @param iq_data_num_bytes Size of the IQ data array.\r
- * @param iq_data_offset IQ data btyes already sent.\r
- * @return uint16_t Bytes that have been appended to the packet.\r
- */\r
-static uint16_t append_iq_samples_ex(\r
- struct rte_mbuf *mbuf,\r
- const void *iq_data_start,\r
- const uint32_t iq_data_num_bytes,\r
- enum xran_input_byte_order iq_buf_byte_order,\r
- uint32_t do_copy)\r
-{\r
- char *pChar = rte_pktmbuf_mtod(mbuf, char*);\r
- void *iq_sam_buf = (pChar + sizeof(struct ether_hdr) + sizeof (struct xran_ecpri_hdr)\r
- + sizeof(struct radio_app_common_hdr)\r
- + sizeof(struct data_section_hdr));\r
-\r
- if (iq_sam_buf == NULL){\r
- print_err("iq_sam_buf == NULL\n");\r
- return 0;\r
- }\r
- if(iq_buf_byte_order == XRAN_CPU_LE_BYTE_ORDER){\r
- int idx = 0;\r
- uint16_t *psrc = (uint16_t *)iq_data_start;\r
- uint16_t *pdst = (uint16_t *)iq_sam_buf;\r
- /* CPU byte order (le) of IQ to network byte order (be) */\r
- for (idx = 0; idx < iq_data_num_bytes/sizeof(int16_t); idx++){\r
- pdst[idx] = (psrc[idx]>>8) | (psrc[idx]<<8); //rte_cpu_to_be_16(psrc[idx]);\r
- }\r
- }\r
-\r
-#if 0\r
- /* do not expect to do copy anymore */\r
- else if(iq_buf_byte_order == XRAN_NE_BE_BYTE_ORDER){\r
- if(do_copy) {\r
- rte_memcpy(iq_sam_buf, (uint8_t *)iq_data_start, iq_data_num_bytes);\r
- }\r
- }\r
-#endif\r
-\r
- return iq_data_num_bytes;\r
-}\r
-\r
-/**\r
- * @brief Function for appending IQ samples data to the mbuf.\r
- *\r
- * @param mbuf Initialized rte_mbuf packet.\r
- * @param iq_data_start Address of the first element in IQ data array.\r
- * @param iq_data_num_bytes Size of the IQ data array.\r
- * @param iq_data_offset IQ data btyes already sent.\r
- * @return uint16_t Bytes that have been appended to the packet.\r
- */\r
-static uint16_t append_iq_samples(\r
- struct rte_mbuf *mbuf,\r
- const void *iq_data_start,\r
- const uint32_t iq_data_num_bytes,\r
- const uint32_t iq_data_offset,\r
- const uint8_t alignment)\r
-{\r
- uint16_t iq_bytes_to_send = 0;\r
- uint16_t free_space_in_pkt = rte_pktmbuf_tailroom(mbuf);\r
-\r
- if (free_space_in_pkt > iq_data_num_bytes - iq_data_offset)\r
- iq_bytes_to_send = iq_data_num_bytes - iq_data_offset;\r
- else\r
- iq_bytes_to_send = free_space_in_pkt;\r
-\r
- /* don't cut off an iq in half */\r
- iq_bytes_to_send -= iq_bytes_to_send % alignment;\r
-\r
- void *iq_sam_buf = (void *)rte_pktmbuf_append(mbuf, iq_bytes_to_send);\r
-\r
- rte_memcpy(iq_sam_buf, (uint8_t *)iq_data_start + iq_data_offset,\r
- iq_bytes_to_send);\r
-\r
- return iq_bytes_to_send;\r
-}\r
-\r
-/**\r
- * @brief Builds compression header in xRAN packet\r
- *\r
- * @param mbuf Initialized rte_mbuf packet\r
- * @param compression_hdr Section compression header structure\r
- * to be set in mbuf packet\r
- * @return int 0 on success, non zero on failure\r
- */\r
-static int build_compression_hdr(\r
- struct rte_mbuf *mbuf,\r
- const struct data_section_compression_hdr *compr_hdr)\r
-{\r
- char *pChar = rte_pktmbuf_mtod(mbuf, char*);\r
- struct data_section_compression_hdr *compression_hdr = (struct data_section_compression_hdr *)\r
- (pChar + sizeof(struct ether_hdr) + sizeof (struct xran_ecpri_hdr) + sizeof(struct radio_app_common_hdr)\r
- + sizeof(struct data_section_hdr));\r
-\r
- if (NULL == compression_hdr)\r
- return 1;\r
-\r
- rte_memcpy(compression_hdr, compr_hdr, sizeof(*compression_hdr));\r
-\r
- return 0;\r
-}\r
-\r
-/**\r
- * @brief Appends compression parameter in xRAN packet\r
- *\r
- * @param mbuf Initialized rte_mbuf packet\r
- * @param ud_comp_paramr Compression param to be set in mbuf packet\r
- * @return int 0 on success, non zero on failure\r
- */\r
-static int append_comp_param(struct rte_mbuf *mbuf, union compression_params *ud_comp_param)\r
-{\r
- union compression_params *compr_param =\r
- (union compression_params *)rte_pktmbuf_append(mbuf, sizeof(union compression_params));\r
-\r
- if (NULL == compr_param)\r
- return 1;\r
-\r
- rte_memcpy(compr_param, ud_comp_param, sizeof(union compression_params));\r
-\r
- return 0;\r
-}\r
-\r
-/**\r
- * @brief Function for extracting all IQ samples from xRAN packet\r
- * holding a single data section\r
- * @param iq_data_start Address of the first element in IQ data array.\r
- * @param symb_id Symbol ID to be extracted from ecpri header\r
- * @param seq_id Sequence ID to be extracted from radio header\r
- * @return int Size of remaining mbuf filled with IQ samples\r
- zero on failure\r
- */\r
-int32_t xran_extract_iq_samples(struct rte_mbuf *mbuf,\r
- void **iq_data_start,\r
- uint8_t *CC_ID,\r
- uint8_t *Ant_ID,\r
- uint8_t *frame_id,\r
- uint8_t *subframe_id,\r
- uint8_t *slot_id,\r
- uint8_t *symb_id,\r
- struct ecpri_seq_id *seq_id,\r
- uint16_t *num_prbu,\r
- uint16_t *start_prbu,\r
- uint16_t *sym_inc,\r
- uint16_t *rb,\r
- uint16_t *sect_id,\r
- int8_t expect_comp,\r
- uint8_t *compMeth,\r
- uint8_t *iqWidth)\r
-{\r
-#if XRAN_MLOG_VAR\r
- uint32_t mlogVar[10];\r
- uint32_t mlogVarCnt = 0;\r
-#endif\r
- struct xran_eaxc_info result;\r
-\r
- if (NULL == mbuf)\r
- return 0;\r
- if (NULL == iq_data_start)\r
- return 0;\r
-\r
- /* Process eCPRI header. */\r
- const struct xran_ecpri_hdr *ecpri_hdr = rte_pktmbuf_mtod(mbuf, void *);\r
- if (ecpri_hdr == NULL)\r
- return 0;\r
-\r
- if (seq_id)\r
- *seq_id = ecpri_hdr->ecpri_seq_id;\r
-\r
- xran_decompose_cid((uint16_t)ecpri_hdr->ecpri_xtc_id, &result);\r
-\r
- *CC_ID = result.ccId;\r
- *Ant_ID = result.ruPortId;\r
-\r
- /* Process radio header. */\r
- struct radio_app_common_hdr *radio_hdr =\r
- (void *)rte_pktmbuf_adj(mbuf, sizeof(*ecpri_hdr));\r
- if (radio_hdr == NULL)\r
- return 0; /* packet too short */\r
-\r
- radio_hdr->sf_slot_sym.value = rte_be_to_cpu_16(radio_hdr->sf_slot_sym.value);\r
-\r
- if (frame_id)\r
- *frame_id = radio_hdr->frame_id;\r
-\r
- if (subframe_id)\r
- *subframe_id = radio_hdr->sf_slot_sym.subframe_id;\r
-\r
- if (slot_id)\r
- *slot_id = radio_hdr->sf_slot_sym.slot_id;\r
-\r
- if (symb_id)\r
- *symb_id = radio_hdr->sf_slot_sym.symb_id;\r
-\r
- /* Process data section hdr */\r
- struct data_section_hdr *data_hdr =\r
- (void *)rte_pktmbuf_adj(mbuf, sizeof(*radio_hdr));\r
- if (data_hdr == NULL)\r
- return 0; /* packet too short */\r
-\r
- /* cpu byte order */\r
- data_hdr->fields.all_bits = rte_be_to_cpu_32(data_hdr->fields.all_bits);\r
-\r
- *num_prbu = data_hdr->fields.num_prbu;\r
- *start_prbu = data_hdr->fields.start_prbu;\r
- *sym_inc = data_hdr->fields.sym_inc;\r
- *rb = data_hdr->fields.rb;\r
- *sect_id = data_hdr->fields.sect_id;\r
-\r
- if(expect_comp) {\r
- const struct data_section_compression_hdr *data_compr_hdr =\r
- (void *) rte_pktmbuf_adj(mbuf, sizeof(*data_hdr));\r
-\r
- if (data_compr_hdr == NULL)\r
- return 0;\r
-\r
- *compMeth = data_compr_hdr->ud_comp_hdr.ud_comp_meth;\r
- *iqWidth = data_compr_hdr->ud_comp_hdr.ud_iq_width;\r
-\r
- const uint8_t *compr_param =\r
- (void *)rte_pktmbuf_adj(mbuf, sizeof(*data_compr_hdr));\r
-\r
- *iq_data_start = (void *)compr_param; /*rte_pktmbuf_adj(mbuf, sizeof(*compr_param))*/;\r
- } else {\r
- *iq_data_start = rte_pktmbuf_adj(mbuf, sizeof(*data_hdr));\r
- }\r
-\r
- if (*iq_data_start == NULL)\r
- return 0;\r
-\r
-#if XRAN_MLOG_VAR\r
- mlogVar[mlogVarCnt++] = 0xBBBBBBBB;\r
- mlogVar[mlogVarCnt++] = xran_lib_ota_tti;\r
- mlogVar[mlogVarCnt++] = radio_hdr->frame_id;\r
- mlogVar[mlogVarCnt++] = radio_hdr->sf_slot_sym.subframe_id;\r
- mlogVar[mlogVarCnt++] = radio_hdr->sf_slot_sym.slot_id;\r
- mlogVar[mlogVarCnt++] = radio_hdr->sf_slot_sym.symb_id;\r
- mlogVar[mlogVarCnt++] = data_hdr->fields.sect_id;\r
- mlogVar[mlogVarCnt++] = data_hdr->fields.start_prbu;\r
- mlogVar[mlogVarCnt++] = data_hdr->fields.num_prbu;\r
- mlogVar[mlogVarCnt++] = rte_pktmbuf_pkt_len(mbuf);\r
- MLogAddVariables(mlogVarCnt, mlogVar, MLogTick());\r
-#endif\r
-\r
- return rte_pktmbuf_pkt_len(mbuf);\r
-}\r
-\r
-/**\r
- * @brief Function for starting preparion of IQ samples portions\r
- * to be sent in xRAN packet\r
- *\r
- * @param mbuf Initialized rte_mbuf packet.\r
- * @param iq_data_start Address of the first element in IQ data array.\r
- * @param iq_data_num_bytes Size of the IQ data array.\r
- * @param iq_data_offset IQ data bytes already sent.\r
- * @param alignment Size of IQ data alignment.\r
- * @param pkt_gen_params Struct with parameters used for building packet\r
- * @return int Number of bytes that have been appended\r
- to the packet within all appended sections.\r
- */\r
-int32_t xran_prepare_iq_symbol_portion(\r
- struct rte_mbuf *mbuf,\r
- const void *iq_data_start,\r
- const enum xran_input_byte_order iq_buf_byte_order,\r
- const uint32_t iq_data_num_bytes,\r
- struct xran_up_pkt_gen_params *params,\r
- uint8_t CC_ID,\r
- uint8_t Ant_ID,\r
- uint8_t seq_id,\r
- uint32_t do_copy)\r
-{\r
- if(xran_build_ecpri_hdr_ex(mbuf,\r
- ECPRI_IQ_DATA,\r
- iq_data_num_bytes,\r
- CC_ID,\r
- Ant_ID,\r
- seq_id,\r
- params->compr_hdr_param.ud_comp_hdr.ud_comp_meth)){\r
- print_err("xran_build_ecpri_hdr_ex return 0\n");\r
- return 0;\r
- }\r
-\r
- if (build_application_layer(mbuf, &(params->app_params)) != 0){\r
- print_err("build_application_layer return != 0\n");\r
- return 0;\r
- }\r
-\r
- if (build_section_hdr(mbuf, &(params->sec_hdr)) != 0){\r
- print_err("build_section_hdr return != 0\n");\r
- return 0;\r
- }\r
-\r
-\r
- if(params->compr_hdr_param.ud_comp_hdr.ud_comp_meth != XRAN_COMPMETHOD_NONE) {\r
- if (build_compression_hdr(mbuf, &(params->compr_hdr_param)) !=0)\r
- return 0;\r
-\r
- /* payload expected to start with udCompParam */\r
-\r
- /*if(append_comp_param(mbuf, &(params->compr_param)) !=0)\r
- return 0;*/\r
- }\r
-\r
-\r
- return append_iq_samples_ex(mbuf, iq_data_start, iq_data_num_bytes, iq_buf_byte_order, do_copy);\r
-}\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/**
+ * @brief This file provides the implementation of User Plane Messages APIs.
+ *
+ * @file xran_up_api.c
+ * @ingroup group_lte_source_xran
+ * @author Intel Corporation
+ *
+ **/
+#include <inttypes.h>
+
+#include <rte_memcpy.h>
+#include <rte_mbuf.h>
+
+#include "xran_fh_o_du.h"
+#include "xran_transport.h"
+#include "xran_up_api.h"
+#include "xran_printf.h"
+#include "xran_mlog_lnx.h"
+
+extern uint32_t xran_lib_ota_tti;
+
+/**
+ * @brief Builds eCPRI header in xRAN packet
+ *
+ * @param mbuf Initialized rte_mbuf packet
+ * @param iq_data_num_bytes Number of bytes in IQ data buffer
+ * @param iq_data_offset Number of elements already sent
+ * @return int int 0 on success, non zero on failure
+ */
+static int build_ecpri_hdr(struct rte_mbuf *mbuf,
+ const uint32_t iq_data_num_bytes,
+ const uint32_t iq_data_offset,
+ uint8_t alignment)
+{
+ struct xran_ecpri_hdr *ecpri_hdr = (struct xran_ecpri_hdr *)
+ rte_pktmbuf_append(mbuf, sizeof(struct xran_ecpri_hdr));
+
+ uint16_t iq_samples_bytes_in_mbuf = rte_pktmbuf_tailroom(mbuf) -
+ sizeof(struct radio_app_common_hdr) - sizeof(struct data_section_hdr);
+
+ iq_samples_bytes_in_mbuf -= (iq_samples_bytes_in_mbuf % alignment);
+
+ if (NULL == ecpri_hdr)
+ return 1;
+
+ ecpri_hdr->cmnhdr.ecpri_ver = XRAN_ECPRI_VER;
+ ecpri_hdr->cmnhdr.ecpri_resv = 0;
+ ecpri_hdr->cmnhdr.ecpri_concat = 0;
+ ecpri_hdr->cmnhdr.ecpri_mesg_type = ECPRI_IQ_DATA;
+
+ if (iq_data_offset + iq_samples_bytes_in_mbuf > iq_data_num_bytes) {
+ ecpri_hdr->cmnhdr.ecpri_payl_size =
+ rte_cpu_to_be_16(sizeof(struct radio_app_common_hdr) +
+ sizeof(struct data_section_hdr) +
+ (iq_data_num_bytes - iq_data_offset) +
+ xran_get_ecpri_hdr_size());
+ ecpri_hdr->ecpri_seq_id.e_bit = 1; /* last segment */
+ } else {
+ ecpri_hdr->cmnhdr.ecpri_payl_size =
+ rte_cpu_to_be_16(sizeof(struct radio_app_common_hdr) +
+ sizeof(struct data_section_hdr) +
+ iq_samples_bytes_in_mbuf +
+ xran_get_ecpri_hdr_size());
+ ecpri_hdr->ecpri_seq_id.e_bit = 0;
+ }
+
+// ecpri_hdr->ecpri_xtc_id = 0; /* currently not used */
+ ecpri_hdr->ecpri_seq_id.seq_id = 0;
+ ecpri_hdr->ecpri_seq_id.sub_seq_id = iq_data_offset /
+ iq_samples_bytes_in_mbuf;
+
+ return 0;
+}
+
+/**
+ * @brief Builds eCPRI header in xRAN packet
+ *
+ * @param mbuf Initialized rte_mbuf packet
+ * @param ecpri_mesg_type eCPRI message type
+ * @param payl_size the size in bytes of the payload part of eCPRI message
+ * @param CC_ID Component Carrier ID for ecpriRtcid/ecpriPcid
+ * @param Ant_ID Antenna ID for ecpriRtcid/ecpriPcid
+ * @param seq_id Message identifier for eCPRI message
+ * @param comp_meth Compression method
+ * @return int int 0 on success, non zero on failure
+ */
+static int xran_build_ecpri_hdr_ex(struct rte_mbuf *mbuf,
+ uint8_t ecpri_mesg_type,
+ int payl_size,
+ uint8_t CC_ID,
+ uint8_t Ant_ID,
+ uint8_t seq_id,
+ uint8_t comp_meth)
+{
+ char *pChar = rte_pktmbuf_mtod(mbuf, char*);
+ struct xran_ecpri_hdr *ecpri_hdr = (struct xran_ecpri_hdr *)(pChar + sizeof(struct ether_hdr));
+ uint16_t ecpri_payl_size = payl_size
+ + sizeof(struct data_section_hdr)
+ + sizeof(struct radio_app_common_hdr)
+ + xran_get_ecpri_hdr_size();
+
+ if (comp_meth != XRAN_COMPMETHOD_NONE)
+ ecpri_payl_size += sizeof(struct data_section_compression_hdr);
+
+ if (NULL == ecpri_hdr)
+ return 1;
+
+ ecpri_hdr->cmnhdr.ecpri_ver = XRAN_ECPRI_VER;
+ ecpri_hdr->cmnhdr.ecpri_resv = 0; // should be zero
+ ecpri_hdr->cmnhdr.ecpri_concat = 0;
+ ecpri_hdr->cmnhdr.ecpri_mesg_type = ecpri_mesg_type;
+ ecpri_hdr->cmnhdr.ecpri_payl_size = rte_cpu_to_be_16(ecpri_payl_size);
+
+ /* one to one lls-CU to RU only and band sector is the same */
+ ecpri_hdr->ecpri_xtc_id = xran_compose_cid(0, 0, CC_ID, Ant_ID);
+
+ ecpri_hdr->ecpri_seq_id.seq_id = seq_id;
+
+ /* no transport layer fragmentation supported */
+ ecpri_hdr->ecpri_seq_id.sub_seq_id = 0;
+ ecpri_hdr->ecpri_seq_id.e_bit = 1;
+
+ return 0;
+}
+
+
+/**
+ * @brief Builds application layer of xRAN packet
+ *
+ * @param mbuf Initialized rte_mbuf packet
+ * @param app_hdr_input Radio App common header structure to be set in mbuf
+ * packet.
+ * @return int 0 on success, non zero on failure
+ */
+static int build_application_layer(
+ struct rte_mbuf *mbuf,
+ const struct radio_app_common_hdr *app_hdr_input)
+{
+ char *pChar = rte_pktmbuf_mtod(mbuf, char*);
+ struct radio_app_common_hdr *app_hdr = (struct radio_app_common_hdr *)(pChar + sizeof(struct ether_hdr)
+ + sizeof (struct xran_ecpri_hdr));
+
+ if (NULL == app_hdr)
+ return 1;
+
+ rte_memcpy(app_hdr, app_hdr_input, sizeof(struct radio_app_common_hdr));
+
+ return 0;
+}
+
+/**
+ * @brief Builds section header in xRAN packet
+ *
+ * @param mbuf Initialized rte_mbuf packet
+ * @param sec_hdr Section header structure to be set in mbuf packet
+ * @return int 0 on success, non zero on failure
+ */
+static int build_section_hdr(
+ struct rte_mbuf *mbuf,
+ const struct data_section_hdr *sec_hdr)
+{
+ char *pChar = rte_pktmbuf_mtod(mbuf, char*);
+ struct data_section_hdr *section_hdr = (struct data_section_hdr *)
+ (pChar + sizeof(struct ether_hdr) + sizeof (struct xran_ecpri_hdr) + sizeof(struct radio_app_common_hdr));
+
+ if (NULL == section_hdr)
+ return 1;
+
+ rte_memcpy(section_hdr, sec_hdr, sizeof(struct data_section_hdr));
+
+ return 0;
+}
+/**
+ * @brief Function for appending IQ samples data to the mbuf.
+ *
+ * @param mbuf Initialized rte_mbuf packet.
+ * @param iq_data_start Address of the first element in IQ data array.
+ * @param iq_data_num_bytes Size of the IQ data array.
+ * @param iq_data_offset IQ data btyes already sent.
+ * @return uint16_t Bytes that have been appended to the packet.
+ */
+static uint16_t append_iq_samples_ex(
+ struct rte_mbuf *mbuf,
+ const void *iq_data_start,
+ const uint32_t iq_data_num_bytes,
+ enum xran_input_byte_order iq_buf_byte_order,
+ uint32_t do_copy)
+{
+ char *pChar = rte_pktmbuf_mtod(mbuf, char*);
+ void *iq_sam_buf = (pChar + sizeof(struct ether_hdr) + sizeof (struct xran_ecpri_hdr)
+ + sizeof(struct radio_app_common_hdr)
+ + sizeof(struct data_section_hdr));
+
+ if (iq_sam_buf == NULL){
+ print_err("iq_sam_buf == NULL\n");
+ return 0;
+ }
+ if(iq_buf_byte_order == XRAN_CPU_LE_BYTE_ORDER){
+ int idx = 0;
+ uint16_t *psrc = (uint16_t *)iq_data_start;
+ uint16_t *pdst = (uint16_t *)iq_sam_buf;
+ /* CPU byte order (le) of IQ to network byte order (be) */
+ for (idx = 0; idx < iq_data_num_bytes/sizeof(int16_t); idx++){
+ pdst[idx] = (psrc[idx]>>8) | (psrc[idx]<<8); //rte_cpu_to_be_16(psrc[idx]);
+ }
+ }
+
+#if 0
+ /* do not expect to do copy anymore */
+ else if(iq_buf_byte_order == XRAN_NE_BE_BYTE_ORDER){
+ if(do_copy) {
+ rte_memcpy(iq_sam_buf, (uint8_t *)iq_data_start, iq_data_num_bytes);
+ }
+ }
+#endif
+
+ return iq_data_num_bytes;
+}
+
+/**
+ * @brief Function for appending IQ samples data to the mbuf.
+ *
+ * @param mbuf Initialized rte_mbuf packet.
+ * @param iq_data_start Address of the first element in IQ data array.
+ * @param iq_data_num_bytes Size of the IQ data array.
+ * @param iq_data_offset IQ data btyes already sent.
+ * @return uint16_t Bytes that have been appended to the packet.
+ */
+static uint16_t append_iq_samples(
+ struct rte_mbuf *mbuf,
+ const void *iq_data_start,
+ const uint32_t iq_data_num_bytes,
+ const uint32_t iq_data_offset,
+ const uint8_t alignment)
+{
+ uint16_t iq_bytes_to_send = 0;
+ uint16_t free_space_in_pkt = rte_pktmbuf_tailroom(mbuf);
+
+ if (free_space_in_pkt > iq_data_num_bytes - iq_data_offset)
+ iq_bytes_to_send = iq_data_num_bytes - iq_data_offset;
+ else
+ iq_bytes_to_send = free_space_in_pkt;
+
+ /* don't cut off an iq in half */
+ iq_bytes_to_send -= iq_bytes_to_send % alignment;
+
+ void *iq_sam_buf = (void *)rte_pktmbuf_append(mbuf, iq_bytes_to_send);
+
+ rte_memcpy(iq_sam_buf, (uint8_t *)iq_data_start + iq_data_offset,
+ iq_bytes_to_send);
+
+ return iq_bytes_to_send;
+}
+
+/**
+ * @brief Builds compression header in xRAN packet
+ *
+ * @param mbuf Initialized rte_mbuf packet
+ * @param compression_hdr Section compression header structure
+ * to be set in mbuf packet
+ * @return int 0 on success, non zero on failure
+ */
+static int build_compression_hdr(
+ struct rte_mbuf *mbuf,
+ const struct data_section_compression_hdr *compr_hdr)
+{
+ char *pChar = rte_pktmbuf_mtod(mbuf, char*);
+ struct data_section_compression_hdr *compression_hdr = (struct data_section_compression_hdr *)
+ (pChar + sizeof(struct ether_hdr) + sizeof (struct xran_ecpri_hdr) + sizeof(struct radio_app_common_hdr)
+ + sizeof(struct data_section_hdr));
+
+ if (NULL == compression_hdr)
+ return 1;
+
+ rte_memcpy(compression_hdr, compr_hdr, sizeof(*compression_hdr));
+
+ return 0;
+}
+
+/**
+ * @brief Appends compression parameter in xRAN packet
+ *
+ * @param mbuf Initialized rte_mbuf packet
+ * @param ud_comp_paramr Compression param to be set in mbuf packet
+ * @return int 0 on success, non zero on failure
+ */
+static int append_comp_param(struct rte_mbuf *mbuf, union compression_params *ud_comp_param)
+{
+ union compression_params *compr_param =
+ (union compression_params *)rte_pktmbuf_append(mbuf, sizeof(union compression_params));
+
+ if (NULL == compr_param)
+ return 1;
+
+ rte_memcpy(compr_param, ud_comp_param, sizeof(union compression_params));
+
+ return 0;
+}
+
+/**
+ * @brief Function for extracting all IQ samples from xRAN packet
+ * holding a single data section
+ * @param iq_data_start Address of the first element in IQ data array.
+ * @param symb_id Symbol ID to be extracted from ecpri header
+ * @param seq_id Sequence ID to be extracted from radio header
+ * @return int Size of remaining mbuf filled with IQ samples
+ zero on failure
+ */
+int32_t xran_extract_iq_samples(struct rte_mbuf *mbuf,
+ void **iq_data_start,
+ uint8_t *CC_ID,
+ uint8_t *Ant_ID,
+ uint8_t *frame_id,
+ uint8_t *subframe_id,
+ uint8_t *slot_id,
+ uint8_t *symb_id,
+ struct ecpri_seq_id *seq_id,
+ uint16_t *num_prbu,
+ uint16_t *start_prbu,
+ uint16_t *sym_inc,
+ uint16_t *rb,
+ uint16_t *sect_id,
+ int8_t expect_comp,
+ uint8_t *compMeth,
+ uint8_t *iqWidth)
+{
+#if XRAN_MLOG_VAR
+ uint32_t mlogVar[10];
+ uint32_t mlogVarCnt = 0;
+#endif
+ struct xran_eaxc_info result;
+
+ if (NULL == mbuf)
+ return 0;
+ if (NULL == iq_data_start)
+ return 0;
+
+ /* Process eCPRI header. */
+ const struct xran_ecpri_hdr *ecpri_hdr = rte_pktmbuf_mtod(mbuf, void *);
+ if (ecpri_hdr == NULL)
+ return 0;
+
+ if (seq_id)
+ *seq_id = ecpri_hdr->ecpri_seq_id;
+
+ xran_decompose_cid((uint16_t)ecpri_hdr->ecpri_xtc_id, &result);
+
+ *CC_ID = result.ccId;
+ *Ant_ID = result.ruPortId;
+
+ /* Process radio header. */
+ struct radio_app_common_hdr *radio_hdr =
+ (void *)rte_pktmbuf_adj(mbuf, sizeof(*ecpri_hdr));
+ if (radio_hdr == NULL)
+ return 0; /* packet too short */
+
+ radio_hdr->sf_slot_sym.value = rte_be_to_cpu_16(radio_hdr->sf_slot_sym.value);
+
+ if (frame_id)
+ *frame_id = radio_hdr->frame_id;
+
+ if (subframe_id)
+ *subframe_id = radio_hdr->sf_slot_sym.subframe_id;
+
+ if (slot_id)
+ *slot_id = radio_hdr->sf_slot_sym.slot_id;
+
+ if (symb_id)
+ *symb_id = radio_hdr->sf_slot_sym.symb_id;
+
+ /* Process data section hdr */
+ struct data_section_hdr *data_hdr =
+ (void *)rte_pktmbuf_adj(mbuf, sizeof(*radio_hdr));
+ if (data_hdr == NULL)
+ return 0; /* packet too short */
+
+ /* cpu byte order */
+ data_hdr->fields.all_bits = rte_be_to_cpu_32(data_hdr->fields.all_bits);
+
+ *num_prbu = data_hdr->fields.num_prbu;
+ *start_prbu = data_hdr->fields.start_prbu;
+ *sym_inc = data_hdr->fields.sym_inc;
+ *rb = data_hdr->fields.rb;
+ *sect_id = data_hdr->fields.sect_id;
+
+ if(expect_comp) {
+ const struct data_section_compression_hdr *data_compr_hdr =
+ (void *) rte_pktmbuf_adj(mbuf, sizeof(*data_hdr));
+
+ if (data_compr_hdr == NULL)
+ return 0;
+
+ *compMeth = data_compr_hdr->ud_comp_hdr.ud_comp_meth;
+ *iqWidth = data_compr_hdr->ud_comp_hdr.ud_iq_width;
+
+ const uint8_t *compr_param =
+ (void *)rte_pktmbuf_adj(mbuf, sizeof(*data_compr_hdr));
+
+ *iq_data_start = (void *)compr_param; /*rte_pktmbuf_adj(mbuf, sizeof(*compr_param))*/;
+ } else {
+ *iq_data_start = rte_pktmbuf_adj(mbuf, sizeof(*data_hdr));
+ }
+
+ if (*iq_data_start == NULL)
+ return 0;
+
+#if XRAN_MLOG_VAR
+ mlogVar[mlogVarCnt++] = 0xBBBBBBBB;
+ mlogVar[mlogVarCnt++] = xran_lib_ota_tti;
+ mlogVar[mlogVarCnt++] = radio_hdr->frame_id;
+ mlogVar[mlogVarCnt++] = radio_hdr->sf_slot_sym.subframe_id;
+ mlogVar[mlogVarCnt++] = radio_hdr->sf_slot_sym.slot_id;
+ mlogVar[mlogVarCnt++] = radio_hdr->sf_slot_sym.symb_id;
+ mlogVar[mlogVarCnt++] = data_hdr->fields.sect_id;
+ mlogVar[mlogVarCnt++] = data_hdr->fields.start_prbu;
+ mlogVar[mlogVarCnt++] = data_hdr->fields.num_prbu;
+ mlogVar[mlogVarCnt++] = rte_pktmbuf_pkt_len(mbuf);
+ MLogAddVariables(mlogVarCnt, mlogVar, MLogTick());
+#endif
+
+ return rte_pktmbuf_pkt_len(mbuf);
+}
+
+/**
+ * @brief Function for starting preparion of IQ samples portions
+ * to be sent in xRAN packet
+ *
+ * @param mbuf Initialized rte_mbuf packet.
+ * @param iq_data_start Address of the first element in IQ data array.
+ * @param iq_data_num_bytes Size of the IQ data array.
+ * @param iq_data_offset IQ data bytes already sent.
+ * @param alignment Size of IQ data alignment.
+ * @param pkt_gen_params Struct with parameters used for building packet
+ * @return int Number of bytes that have been appended
+ to the packet within all appended sections.
+ */
+int32_t xran_prepare_iq_symbol_portion(
+ struct rte_mbuf *mbuf,
+ const void *iq_data_start,
+ const enum xran_input_byte_order iq_buf_byte_order,
+ const uint32_t iq_data_num_bytes,
+ struct xran_up_pkt_gen_params *params,
+ uint8_t CC_ID,
+ uint8_t Ant_ID,
+ uint8_t seq_id,
+ uint32_t do_copy)
+{
+ if(xran_build_ecpri_hdr_ex(mbuf,
+ ECPRI_IQ_DATA,
+ iq_data_num_bytes,
+ CC_ID,
+ Ant_ID,
+ seq_id,
+ params->compr_hdr_param.ud_comp_hdr.ud_comp_meth)){
+ print_err("xran_build_ecpri_hdr_ex return 0\n");
+ return 0;
+ }
+
+ if (build_application_layer(mbuf, &(params->app_params)) != 0){
+ print_err("build_application_layer return != 0\n");
+ return 0;
+ }
+
+ if (build_section_hdr(mbuf, &(params->sec_hdr)) != 0){
+ print_err("build_section_hdr return != 0\n");
+ return 0;
+ }
+
+
+ if(params->compr_hdr_param.ud_comp_hdr.ud_comp_meth != XRAN_COMPMETHOD_NONE) {
+ if (build_compression_hdr(mbuf, &(params->compr_hdr_param)) !=0)
+ return 0;
+
+ /* payload expected to start with udCompParam */
+
+ /*if(append_comp_param(mbuf, &(params->compr_param)) !=0)
+ return 0;*/
+ }
+
+
+ return append_iq_samples_ex(mbuf, iq_data_start, iq_data_num_bytes, iq_buf_byte_order, do_copy);
+}
+
+++ /dev/null
-#/******************************************************************************
-#*
-#* Copyright (c) 2019 Intel.
-#*
-#* Licensed under the Apache License, Version 2.0 (the "License");
-#* you may not use this file except in compliance with the License.
-#* You may obtain a copy of the License at
-#*
-#* http://www.apache.org/licenses/LICENSE-2.0
-#*
-#* Unless required by applicable law or agreed to in writing, software
-#* distributed under the License is distributed on an "AS IS" BASIS,
-#* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-#* See the License for the specific language governing permissions and
-#* limitations under the License.
-#*
-#*******************************************************************************/
-1. Introduction
-xRAN Lib performs communication between the low-layer split central unit (lls-CU) and RU, it is highly-optimized software implementation based on Intel Architecture to provide the standard interface implementation based on O-RAN front haul interface specification.
-
-2. Supported features
-Please refer to the Document ORAN Front Haul Interface Library based on Intel's xRAN Front Haul SW Architecture Specifications Section 4.2 Supported Feature Set, both GCC/ICC compiler are supported for this version.
-
-3. Fixed Issues
-It's first version of seed code for feature development, future fixed issues will be tracked here.
-
-4. Known Issues
-From current unit testing coverage, no issues have been found yet.
-
-5. Prerequisites for install
-
-5.1. Prerequisites
-
-5.1.0 System configuration
-
-VFIO requires:
-linux:
- IOMMU=ON
-BIOS:
- Intel(R) Virtualization Technology Enabled
- Intel(R) VT for Directed I/O - Enabled
- ACS Control - Enabled
- Coherency Support - Disabled
-5.1.1 Compiler
-
-icc -v
-icc version 19.0.3.206 (gcc version 4.8.5 compatibility)
-
-Link to ICC (community free version):
-https://software.intel.com/en-us/system-studio/choose-download#technical
-
-5.1.2 DPDK 18.08
-
-5.1.3 Compile DPDK with
-[root@5gnr-sc12-xran dpdk]# ./usertools/dpdk-setup.sh // Where the root@5gnr-sc12-xran dpdk corresponds to the location in the server for the dpdk installation folder
-
-select [16] x86_64-native-linuxapp-icc
-select [19] Insert VFIO module
-exit [35] Exit Script
-
-5.1.4 Find PCIe device of Fortville port
-
-lspci |grep Eth
-19:00.0 Ethernet controller: Intel Corporation 82599ES 10-Gigabit SFI/SFP+ Network Connection (rev 01)
-19:00.1 Ethernet controller: Intel Corporation 82599ES 10-Gigabit SFI/SFP+ Network Connection (rev 01)
-41:00.0 Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GBASE-T (rev 04)
-41:00.1 Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GBASE-T (rev 04)
-d8:00.0 << Ethernet controller: Intel Corporation Ethernet Controller XL710 for 40GbE QSFP+ (rev 02) <<<< this one
-d8:00.1 Ethernet controller: Intel Corporation Ethernet Controller XL710 for 40GbE QSFP+ (rev 02)
-
-5.1.5 Corresponding Eth device via
-
-ifconfig -a
-
-find port Eth with correct PCIe Bus address as per list above
-
-ethtool -i enp218s0f0
-driver: i40e
-version: 2.4.10 << driver
-firmware-version: 6.80 0x80003cfd 1.2007.0
-expansion-rom-version:
-bus-info: 0000:da:00.0 << this one
-supports-statistics: yes
-supports-test: yes
-supports-eeprom-access: yes
-supports-register-dump: yes
-supports-priv-flags: yes
-
-5.1.6 install correct 2.4.10 i40e version if different (https://downloadcenter.intel.com/download/28306/Intel-Network-Adapter-Driver-for-PCIe-40-Gigabit-Ethernet-Network-Connections-Under-Linux-)
-
-make sure firmare version is at least this version or higher
-
-firmware-version: 6.01
-
-5.1.7 make sure that linux boot arguments are correct
-
-cat /proc/cmdline
-BOOT_IMAGE=/vmlinuz-3.10.0-rt56 root=/dev/mapper/centos-root ro crashkernel=auto rd.lvm.lv=centos/root rd.lvm.lv=centos/swap intel_iommu=on iommu=pt usbcore.autosuspend=-1 selinux=0 enforcing=0 nmi_watchdog=0 softlockup_panic=0 audit=0 intel_pstate=disable cgroup_disable=memory mce=off idle=poll hugepagesz=1G hugepages=20 hugepagesz=2M hugepages=0 default_hugepagesz=1G isolcpus=1-39 rcu_nocbs=1-39 kthread_cpus=0 irqaffinity=0 nohz_full=1-39
-1.10 enable SRIOV VF port for XRAN
-
-echo 2 > /sys/class/net/enp216s0f0/device/sriov_numvfs
-
-see https://doc.dpdk.org/guides/nics/intel_vf.html
-
-5.1.8 Check Virtual Function was created
-
-lspci |grep Eth
-19:00.0 Ethernet controller: Intel Corporation 82599ES 10-Gigabit SFI/SFP+ Network Connection (rev 01)
-19:00.1 Ethernet controller: Intel Corporation 82599ES 10-Gigabit SFI/SFP+ Network Connection (rev 01)
-41:00.0 Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GBASE-T (rev 04)
-41:00.1 Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GBASE-T (rev 04)
-d8:00.0 Ethernet controller: Intel Corporation Ethernet Controller XL710 for 40GbE QSFP+ (rev 02)
-d8:00.1 Ethernet controller: Intel Corporation Ethernet Controller XL710 for 40GbE QSFP+ (rev 02)
-d8:02.0 Ethernet controller: Intel Corporation XL710/X710 Virtual Function (rev 02) <<<< this is XRAN port (u-plane)
-d8:02.1 Ethernet controller: Intel Corporation XL710/X710 Virtual Function (rev 02) <<<< this is XRAN port (c-plane)
-
-5.1.9 Configure VFs
-- set mac to 00:11:22:33:44:66
-- set Vlan tag to 2 (U-plane) for VF0
-- set Vlan tag to 1 (C-plane) for VF1
-
-[root@5gnr-sc12-xran app]# ip link set enp216s0f0 vf 0 mac 00:11:22:33:44:66 vlan 2
-[root@5gnr-sc12-xran app]# ip link set enp216s0f0 vf 1 mac 00:11:22:33:44:66 vlan 1
-[root@5gnr-sc12-xran app]# ip link show
-1: lo: <LOOPBACK,UP,LOWER_UP> mtu 65536 qdisc noqueue state UNKNOWN mode DEFAULT qlen 1
- link/loopback 00:00:00:00:00:00 brd 00:00:00:00:00:00
-2: enp65s0f0: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc mq state UP mode DEFAULT qlen 1000
- link/ether a4:bf:01:3e:6b:79 brd ff:ff:ff:ff:ff:ff
-3: eno2: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc mq state UP mode DEFAULT qlen 1000
- link/ether a4:bf:01:3e:6b:7a brd ff:ff:ff:ff:ff:ff
-4: enp25s0f0: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc mq state UP mode DEFAULT qlen 1000
- link/ether 90:e2:ba:d3:b2:ec brd ff:ff:ff:ff:ff:ff
-5: enp129s0f0: <NO-CARRIER,BROADCAST,MULTICAST,UP> mtu 1500 qdisc mq state DOWN mode DEFAULT qlen 1000
- link/ether 3c:fd:fe:a8:e0:70 brd ff:ff:ff:ff:ff:ff
-6: enp129s0f1: <NO-CARRIER,BROADCAST,MULTICAST,UP> mtu 1500 qdisc mq state DOWN mode DEFAULT qlen 1000
- link/ether 3c:fd:fe:a8:e0:71 brd ff:ff:ff:ff:ff:ff
-7: enp216s0f0: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc mq state UP mode DEFAULT qlen 1000
- link/ether 3c:fd:fe:9e:93:68 brd ff:ff:ff:ff:ff:ff
- vf 0 MAC 00:11:22:33:44:66, vlan 2, spoof checking on, link-state auto, trust off
- vf 1 MAC 00:11:22:33:44:66, vlan 1, spoof checking on, link-state auto, trust off
-8: enp25s0f1: <NO-CARRIER,BROADCAST,MULTICAST,UP> mtu 1500 qdisc mq state DOWN mode DEFAULT qlen 1000
- link/ether 90:e2:ba:d3:b2:ed brd ff:ff:ff:ff:ff:ff
-9: enp216s0f1: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc mq state UP mode DEFAULT qlen 1000
- link/ether 3c:fd:fe:9e:93:69 brd ff:ff:ff:ff:ff:ff
-12: enp216s2: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc mq state UP mode DEFAULT qlen 1000
- link/ether 96:fa:4d:04:4d:87 brd ff:ff:ff:ff:ff:ff
-13: enp216s2f1: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc mq state UP mode DEFAULT qlen 1000
- link/ether a6:67:49:bb:bd:5e brd ff:ff:ff:ff:ff:ff
-
-6. Install
-
-6.1.1 start matlab and run gen_test.m with correct Numerology, Bandwidth and number of slots
-copy ant_*.bin to /xran/app/usecase/mu{X}_{Y}MHz
- where X is numerology: 0,1,3
- Y is 5,10,20,100 MHz bandwidth
-
-6.1.2 compile xran sample application (Please make sure that the export match your install directories for SDK, ORAN_FH_lib (i.e. XRAN_DIR), google test
-export RTE_SDK=/opt/dpdk-18.08
-export RTE_TARGET=x86_64-native-linuxapp-icc
-export XRAN_DIR= /home/npg_wireless-flexran_xran/
-export export GTEST_ROOT=/opt/gtest/gtest-1.7.0
-
- ./build.sh
-Number of commandline arguments: 0
-Building xRAN Library
-LIBXRANSO=0
- CC ../lib/ethernet/ethdi.o
- CC ../lib/ethernet/ethernet.o
- CC ../lib/src/xran_up_api.o
- CC ../lib/src/xran_sync_api.o
- CC ../lib/src/xran_timer.o
- CC ../lib/src/xran_cp_api.o
- CC ../lib/src/xran_transport.o
- CC ../lib/src/xran_common.o
- CC ../lib/src/xran_ul_tables.o
- CC ../lib/src/xran_frame_struct.o
- CC ../lib/src/xran_compression.o
- CC ../lib/src/xran_app_frag.o
- CC ../lib/src/xran_main.o
- AR libxran.a
- INSTALL-LIB libxran.a
-Building xRAN Test Application
- CC ../app/src/common.o
- CC ../app/src/sample-app.o
-remark #11074: Inlining inhibited by limit max-size
-remark #11076: To get full report use -qopt-report=4 -qopt-report-phase ipo
- CC ../app/src/config.o
- LD sample-app
- INSTALL-APP sample-app
- INSTALL-MAP sample-app.map
-
-
-6.1.3 update Eth port used for XRAN
-
-
-cat ./run_o_du.sh
-#! /bin/bash
-
-ulimit -c unlimited
-echo 1 > /proc/sys/kernel/core_uses_pid
-
-grep Huge /proc/meminfo
-huge_folder="/mnt/huge_bbu"
-[ -d "$huge_folder" ] || mkdir -p $huge_folder
-if ! mount | grep $huge_folder; then
- mount none $huge_folder -t hugetlbfs -o rw,mode=0777
-fi
-
-#40G
-./build/sample-app ./usecase/mu3_100mhz/config_file_o_du.dat 0000:da:02.0 0000:da:02.1
- ^^^^^ ports have to match VF function from step 1.11 (0000:da:02.0 - U-plane 0000:da:02.1 C-plane)
-
-umount $huge_folder
-rmdir $huge_folder
-
-
-cat ./dpdk.sh
-...
-$RTE_SDK/usertools/dpdk-devbind.py --status
-if [ ${VM_DETECT} == 'HOST' ]; then
- #HOST
-
- $RTE_SDK/usertools/dpdk-devbind.py --bind=vfio-pci 0000:da:02.0 <<< port has to match VF function from step 1.11
- $RTE_SDK/usertools/dpdk-devbind.py --bind=vfio-pci 0000:da:02.1 <<< port has to match VF function from step 1.11
-
- 1.
-Run
-
-6.2.1 Run dpdk.sh to assign port to PMD
-
-[root@5gnr-sc12-xran app]# ./dpdk.sh
-
-Network devices using DPDK-compatible driver
-============================================
-0000:da:02.0 'XL710/X710 Virtual Function 154c' drv=vfio-pci unused=i40evf,igb_uio
-0000:da:02.1 'XL710/X710 Virtual Function 154c' drv=vfio-pci unused=i40evf,igb_uio
-
-
-6.2.2 Run XRAN sample app
-setup RU mac address in config_file_o_du.dat for corespondig usecase
-
-e.g.
-./build/sample-app ./usecase/mu3_100mhz/config_file_o_du.dat 0000:da:02.0 0000:da:02.1
-
-ruMac=00:11:22:33:44:55 #RU VF for RU
-
-execute O-DU sample app
-
-[root@sc12-xran-ru-1 app]# ./run_o_du.sh
-HugePages_Total: 20
-HugePages_Free: 11
-HugePages_Rsvd: 0
-HugePages_Surp: 0
-Hugepagesize: 1048576 kB
-Machine is synchronized using PTP!
-mu_number: 3
-nDLAbsFrePointA: 27968160
-nULAbsFrePointA: 27968160
-nDLBandwidth: 100
-nULBandwidth: 100
-nULFftSize: 1024
-nULFftSize: 1024
-nFrameDuplexType: 1
-nTddPeriod: 4
-sSlotConfig0: 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-sSlotConfig1: 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-sSlotConfig2: 0 0 0 0 0 0 0 0 0 0 0 0 0 0
-sSlotConfig3: 0 2 2 1 1 1 1 1 1 1 1 1 1 1
-mtu 9600
-lls-CU MAC address: 00:11:22:33:44:66
-RU MAC address: 00:11:22:33:44:55
-numSlots: 40
-antC0: ./usecase/mu3_100mhz/ant_0.bin
-antC1: ./usecase/mu3_100mhz/ant_1.bin
-antC2: ./usecase/mu3_100mhz/ant_2.bin
-antC3: ./usecase/mu3_100mhz/ant_3.bin
-antC4: ./usecase/mu3_100mhz/ant_4.bin
-antC5: ./usecase/mu3_100mhz/ant_5.bin
-antC6: ./usecase/mu3_100mhz/ant_6.bin
-antC7: ./usecase/mu3_100mhz/ant_7.bin
-antC8: ./usecase/mu3_100mhz/ant_8.bin
-antC9: ./usecase/mu3_100mhz/ant_9.bin
-antC10: ./usecase/mu3_100mhz/ant_10.bin
-antC11: ./usecase/mu3_100mhz/ant_11.bin
-antC12: ./usecase/mu3_100mhz/ant_12.bin
-antC13: ./usecase/mu3_100mhz/ant_13.bin
-antC14: ./usecase/mu3_100mhz/ant_14.bin
-antC15: ./usecase/mu3_100mhz/ant_15.bin
-Prach enable: 0
-Prach config index: 81
-debugStop: 1
-CPenable: 1
-cp_vlan_tag: 1
-up_vlan_tag: 2
-Tadv_cp_dl: 25
-T2a_min_cp_dl: 50
-T2a_max_cp_dl: 140
-T2a_min_cp_ul: 50
-T2a_max_cp_ul: 140
-T2a_min_up: 25
-T2a_max_up: 140
-Ta3_min: 20
-Ta3_max: 32
-T1a_min_cp_dl: 70
-T1a_max_cp_dl: 100
-T1a_min_cp_ul: 60
-T1a_max_cp_ul: 70
-T1a_min_up: 35
-T1a_max_up: 50
-Ta4_min: 0
-Ta4_max: 45
-115 lines of config file has been read.
-numCCPorts 1 num_eAxc4
-set O-DU
-IQ files size is 40 slots
-app_xran_get_num_rbs: nNumerology[3] nBandwidth[100] nAbsFrePointA[27968160] numRBs[66]
-app_xran_get_num_rbs: nNumerology[3] nBandwidth[100] nAbsFrePointA[27968160] numRBs[66]
-Loading file ./usecase/mu3_100mhz/ant_0.bin to DL IFFT IN IQ Samples in binary format: Reading IQ samples from file: File Size: 1774080 [Buffer Size: 1774080]
-from addr (0x7f62ad088010) size (1774080) bytes num (1774080)
-Loading file ./usecase/mu3_100mhz/ant_1.bin to DL IFFT IN IQ Samples in binary format: Reading IQ samples from file: File Size: 1774080 [Buffer Size: 1774080]
-from addr (0x7f62aced6010) size (1774080) bytes num (1774080)
-Loading file ./usecase/mu3_100mhz/ant_2.bin to DL IFFT IN IQ Samples in binary format: Reading IQ samples from file: File Size: 1774080 [Buffer Size: 1774080]
-from addr (0x7f62acd24010) size (1774080) bytes num (1774080)
-Loading file ./usecase/mu3_100mhz/ant_3.bin to DL IFFT IN IQ Samples in binary format: Reading IQ samples from file: File Size: 1774080 [Buffer Size: 1774080]
-from addr (0x7f62acb72010) size (1774080) bytes num (1774080)
-Storing DL IFFT IN IQ Samples in human readable format to file ./logs/o-du-play_ant0.txt: from addr (0x7f62ad088010) size (1774080) IQ num (443520)
-Storing DL IFFT IN IQ Samples in binary format to file ./logs/o-du-play_ant0.bin: from addr (0x7f62ad088010) size (887040) bytes num (887040)
-Storing DL IFFT IN IQ Samples in human readable format to file ./logs/o-du-play_ant1.txt: from addr (0x7f62aced6010) size (1774080) IQ num (443520)
-Storing DL IFFT IN IQ Samples in binary format to file ./logs/o-du-play_ant1.bin: from addr (0x7f62aced6010) size (887040) bytes num (887040)
-Storing DL IFFT IN IQ Samples in human readable format to file ./logs/o-du-play_ant2.txt: from addr (0x7f62acd24010) size (1774080) IQ num (443520)
-Storing DL IFFT IN IQ Samples in binary format to file ./logs/o-du-play_ant2.bin: from addr (0x7f62acd24010) size (887040) bytes num (887040)
-Storing DL IFFT IN IQ Samples in human readable format to file ./logs/o-du-play_ant3.txt: from addr (0x7f62acb72010) size (1774080) IQ num (443520)
-Storing DL IFFT IN IQ Samples in binary format to file ./logs/o-du-play_ant3.bin: from addr (0x7f62acb72010) size (887040) bytes num (887040)
-TX: Convert S16 I and S16 Q to network byte order for XRAN Ant: [0]
-TX: Convert S16 I and S16 Q to network byte order for XRAN Ant: [1]
-TX: Convert S16 I and S16 Q to network byte order for XRAN Ant: [2]
-TX: Convert S16 I and S16 Q to network byte order for XRAN Ant: [3]
-System clock (rdtsc) resolution 1596250371 [Hz]
-Ticks per us 1596
- xran_init: MTU 9600
-xran_ethdi_init_dpdk_io: Calling rte_eal_init:wls -c ffffffff -m5120 --proc-type=auto --file-prefix wls -w 0000:00:00.0
-EAL: Detected 40 lcore(s)
-EAL: Detected 2 NUMA nodes
-EAL: Auto-detected process type: PRIMARY
-EAL: Multi-process socket /var/run/dpdk/wls/mp_socket
-EAL: No free hugepages reported in hugepages-2048kB
-EAL: Probing VFIO support...
-EAL: VFIO support initialized
-EAL: PCI device 0000:da:02.0 on NUMA socket 1
-EAL: probe driver: 8086:154c net_i40e_vf
-EAL: using IOMMU type 1 (Type 1)
-initializing port 0 for TX, drv=net_i40e_vf
-Port 0 MAC: 00 11 22 33 44 66
-
-Checking link status ... done
-Port 0 Link Up - speed 40000 Mbps - full-duplex
-EAL: PCI device 0000:da:02.1 on NUMA socket 1
-EAL: probe driver: 8086:154c net_i40e_vf
-initializing port 1 for TX, drv=net_i40e_vf
-Port 1 MAC: 00 11 22 33 44 66
-
-Checking link status ... done
-Port 1 Link Up - speed 40000 Mbps - full-duplex
-Set debug stop 1
-FFT Order 10
-app_xran_get_num_rbs: nNumerology[3] nBandwidth[100] nAbsFrePointA[27968160] numRBs[66]
-app_xran_get_num_rbs: nNumerology[3] nBandwidth[100] nAbsFrePointA[27968160] numRBs[66]
-app_xran_cal_nrarfcn: nCenterFreq[28015680] nDeltaFglobal[60] nFoffs[24250080] nNoffs[2016667] nNRARFCN[2079427]
-DL center freq 28015680 DL NR-ARFCN 2079427
-app_xran_cal_nrarfcn: nCenterFreq[28015680] nDeltaFglobal[60] nFoffs[24250080] nNoffs[2016667] nNRARFCN[2079427]
-UL center freq 28015680 UL NR-ARFCN 2079427
-XRAN front haul xran_mm_init
-xran_sector_get_instances [0]: CC 0 handle 0xd013380
-Handle: 0x5a07cb8 Instance: 0xd013380
-init_xran [0]: CC 0 handle 0xd013380
-Sucess xran_mm_init
-nSectorNum 1
-nSectorIndex[0] = 0
-[ handle 0xd013380 0 0 ] [nPoolIndex 0] nNumberOfBuffers 4480 nBufferSize 3328
-CC:[ handle 0xd013380 ru 0 cc_idx 0 ] [nPoolIndex 0] mb pool 0x24a7ad440
-nSectorIndex[0] = 0
-[ handle 0xd013380 0 0 ] [nPoolIndex 1] nNumberOfBuffers 4480 nBufferSize 2216
-CC:[ handle 0xd013380 ru 0 cc_idx 0 ] [nPoolIndex 1] mb pool 0x24956d100
-[ handle 0xd013380 0 0 ] [nPoolIndex 2] nNumberOfBuffers 4480 nBufferSize 3328
-CC:[ handle 0xd013380 ru 0 cc_idx 0 ] [nPoolIndex 2] mb pool 0x248818dc0
-[ handle 0xd013380 0 0 ] [nPoolIndex 3] nNumberOfBuffers 4480 nBufferSize 2216
-CC:[ handle 0xd013380 ru 0 cc_idx 0 ] [nPoolIndex 3] mb pool 0x2475d8a80
-[ handle 0xd013380 0 0 ] [nPoolIndex 4] nNumberOfBuffers 4480 nBufferSize 8192
-CC:[ handle 0xd013380 ru 0 cc_idx 0 ] [nPoolIndex 4] mb pool 0x246884740
-@@@ NB cell 0 DL NR-ARFCN 0,DL phase comp flag 0 UL NR-ARFCN 0,UL phase comp flag 0
-init_xran_iq_content
-xRAN open PRACH config: Numerology 3 ConfIdx 81, preambleFmrt 6 startsymb 7, numSymbol 6, occassionsInPrachSlot 1
-PRACH: x 1 y[0] 0, y[1] 0 prach slot: 3.. 5 .... 7 .... 9 .... 11 .... 13 ..
-
-PRACH start symbol 7 lastsymbol 12
-xran_cp_init_sectiondb:Allocation Size for Section DB : 128 (1x8x16)
-xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
-xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
-xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
-xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
-xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
-xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
-xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
-xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
-xran_cp_init_sectiondb:Allocation Size for Section DB : 128 (1x8x16)
-xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
-xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
-xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
-xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
-xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
-xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
-xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
-xran_cp_init_sectiondb:Allocation Size for list : 1848 (28x66)
-xran_open: interval_us=125
-nSlotNum[0] : numDlSym[14] numGuardSym[0] numUlSym[0] XRAN_SLOT_TYPE_DL
- numDlSlots[1] numUlSlots[0] numSpSlots[0] numSpDlSlots[0] numSpUlSlots[0]
-nSlotNum[1] : numDlSym[14] numGuardSym[0] numUlSym[0] XRAN_SLOT_TYPE_DL
- numDlSlots[2] numUlSlots[0] numSpSlots[0] numSpDlSlots[0] numSpUlSlots[0]
-nSlotNum[2] : numDlSym[14] numGuardSym[0] numUlSym[0] XRAN_SLOT_TYPE_DL
- numDlSlots[3] numUlSlots[0] numSpSlots[0] numSpDlSlots[0] numSpUlSlots[0]
-nSlotNum[3] : numDlSym[1] numGuardSym[2] numUlSym[11] XRAN_SLOT_TYPE_SP
- numDlSlots[3] numUlSlots[0] numSpSlots[1] numSpDlSlots[1] numSpUlSlots[1]
-xran_fs_set_slot_type: nPhyInstanceId[0] nFrameDuplexType[1], nTddPeriod[4]
-DLRate[1.000000] ULRate[0.250000]
-SlotPattern:
-Slot: 0 1 2 3
- 0 DL DL DL SP
-
-xran_timing_source_thread [CPU 7] [PID: 292331]
-MLogOpen: filename(mlog-o-du.bin) mlogSubframes (0), mlogCores(32), mlogSize(0) mlog_mask (-1)
- mlogSubframes (256), mlogCores(32), mlogSize(7168)
- localMLogTimerInit
-lls-CU: thread_run start time: 06/10/19 21:09:37.000000028 UTC [125]
-Start C-plane DL 25 us after TTI [trigger on sym 3]
-Start C-plane UL 55 us after TTI [trigger on sym 7]
-Start U-plane DL 50 us before OTA [offset in sym -6]
-Start U-plane UL 45 us OTA [offset in sym 6]
-C-plane to U-plane delay 25 us after TTI
-Start Sym timer 8928 ns
-interval_us 125
- System clock (CLOCK_REALTIME) resolution 1000037471 [Hz]
- Ticks per us 1000
- MLog Storage: 0x7f6298487100 -> 0x7f629bc88d20 [ 58727456 bytes ]
- localMLogFreqReg: 1000. Storing: 1000
- Mlog Open successful
-
-----------------------------------------
-MLog Info: virt=0x00007f6298487100 size=58727456
-----------------------------------------
-Start XRAN traffic
-+---------------------------------------+
-| Press 1 to start 5G NR XRAN traffic |
-| Press 2 reserved for future use |
-| Press 3 to quit |
-+---------------------------------------+
-rx_counter 0 tx_counter 1376072
-rx_counter 0 tx_counter 1720112
-rx_counter 0 tx_counter 2064161
-rx_counter 0 tx_counter 2408212
-rx_counter 0 tx_counter 2752232
-
-type 3 to stop
-3
-rx_counter 0 tx_counter 3096264
-Stop XRAN traffic
-get_xran_iq_content
-Closing timing source thread...
-Closing l1 app... Ending all threads...
-MLogPrint: ext_filename((null).bin)
- Opening MLog File: mlog-o-du-c0.bin
- MLog file mlog-o-du-c0.bin closed
- Mlog Print successful
-
-Failed at xran_mm_destroy, status -2
-Dump IQs...
-RX: Convert S16 I and S16 Q to cpu byte order from XRAN Ant: [0]
-RX: Convert S16 I and S16 Q to cpu byte order from XRAN Ant: [1]
-RX: Convert S16 I and S16 Q to cpu byte order from XRAN Ant: [2]
-RX: Convert S16 I and S16 Q to cpu byte order from XRAN Ant: [3]
-Storing UL FFT OUT IQ Samples in human readable format to file ./logs/o-du-rx_log_ant0.txt: from addr (0x7f62ac9c0010) size (1774080) IQ num (443520)
-Storing UL FFT OUT IQ Samples in binary format to file ./logs/o-du-rx_log_ant0.bin: from addr (0x7f62ac9c0010) size (887040) bytes num (887040)
-Storing UL FFT OUT IQ Samples in human readable format to file ./logs/o-du-rx_log_ant1.txt: from addr (0x7f62ac80e010) size (1774080) IQ num (443520)
-Storing UL FFT OUT IQ Samples in binary format to file ./logs/o-du-rx_log_ant1.bin: from addr (0x7f62ac80e010) size (887040) bytes num (887040)
-Storing UL FFT OUT IQ Samples in human readable format to file ./logs/o-du-rx_log_ant2.txt: from addr (0x7f62ac65c010) size (1774080) IQ num (443520)
-Storing UL FFT OUT IQ Samples in binary format to file ./logs/o-du-rx_log_ant2.bin: from addr (0x7f62ac65c010) size (887040) bytes num (887040)
-Storing UL FFT OUT IQ Samples in human readable format to file ./logs/o-du-rx_log_ant3.txt: from addr (0x7f62ac4aa010) size (1774080) IQ num (443520)
-Storing UL FFT OUT IQ Samples in binary format to file ./logs/o-du-rx_log_ant3.bin: from addr (0x7f62ac4aa010) size (887040) bytes num (887040)
-Copyright 2018 JSON for Modern C++\r
-\r
-Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:\r
-\r
-The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.\r
-\r
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
+Copyright 2018 JSON for Modern C++
+
+Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-\r
-#include <cmath>\r
-#include <fstream>\r
-#include <numeric>\r
-\r
-#ifndef _WIN64\r
-#include <unistd.h>\r
-#include <sys/syscall.h>\r
-#else\r
-#include <Windows.h>\r
-#endif\r
-\r
-#include "common.hpp"\r
-\r
-#ifndef CPU_ID\r
-#define CPU_ID 4\r
-#endif\r
-\r
-/* Required to avoid linker errors */\r
-json KernelTests::conf;\r
-std::string KernelTests::test_type;\r
-unsigned long KernelTests::tsc;\r
-\r
-\r
-long BenchmarkParameters::repetition = 40;\r
-long BenchmarkParameters::loop = 30;\r
-unsigned BenchmarkParameters::cpu_id = CPU_ID;\r
-\r
-int bind_to_cpu(const unsigned cpu)\r
-{\r
-#ifndef _WIN64\r
- const auto pid = syscall(SYS_gettid);\r
- cpu_set_t mask {};\r
- CPU_ZERO(&mask);\r
- CPU_SET(cpu, &mask);\r
- return sched_setaffinity(__pid_t(pid), sizeof(mask), &mask);\r
-#else\r
- return -1;\r
-#endif\r
-}\r
-\r
-std::pair<double, double> calculate_statistics(const std::vector<long> values)\r
-{\r
- const auto sum = std::accumulate(values.begin(), values.end(), 0L);\r
-\r
- const auto number_of_iterations = BenchmarkParameters::repetition *\r
- BenchmarkParameters::loop;\r
-\r
- const auto mean = sum / (double) number_of_iterations;\r
-\r
- auto stddev_accumulator = 0.0;\r
- for (auto v : values)\r
- stddev_accumulator = pow((v / BenchmarkParameters::loop) - mean, 2);\r
-\r
- const auto stddev = sqrt(stddev_accumulator / BenchmarkParameters::repetition);\r
-\r
- return {mean, stddev};\r
-}\r
-\r
-std::vector<unsigned> get_sequence(const unsigned number)\r
-{\r
- std::vector<unsigned> sequence(number);\r
- std::iota(sequence.begin(), sequence.end(), 0);\r
-\r
- return sequence;\r
-}\r
-\r
-char* read_data_to_aligned_array(const std::string &filename)\r
-{\r
- std::ifstream input_stream(filename, std::ios::binary);\r
-\r
- std::vector<char> buffer((std::istreambuf_iterator<char>(input_stream)),\r
- std::istreambuf_iterator<char>());\r
-\r
- if(buffer.size() == 0)\r
- throw reading_input_file_exception();\r
-\r
- auto aligned_buffer = aligned_malloc<char>((int) buffer.size(), 64);\r
-\r
- if(aligned_buffer == nullptr)\r
- throw std::runtime_error("Failed to allocate memory for the test vector!");\r
-\r
- std::copy(buffer.begin(), buffer.end(), aligned_buffer);\r
-\r
- return aligned_buffer;\r
-}\r
-\r
-json read_json_from_file(const std::string &filename)\r
-{\r
- json result;\r
-\r
- std::ifstream json_stream(filename);\r
- if(!json_stream.is_open())\r
- throw missing_config_file_exception();\r
-\r
- json_stream >> result;\r
-\r
- return result;\r
-}\r
-\r
-unsigned long tsc_recovery()\r
-{\r
-#ifndef _WIN64\r
- constexpr auto ns_per_sec = 1E9;\r
-\r
- struct timespec sleeptime = {.tv_nsec = __syscall_slong_t(5E8) };\r
-\r
- struct timespec t_start, t_end;\r
-\r
- if (clock_gettime(CLOCK_MONOTONIC_RAW, &t_start) == 0)\r
- {\r
- unsigned long start = tsc_tick();\r
-\r
- nanosleep(&sleeptime,NULL);\r
- clock_gettime(CLOCK_MONOTONIC_RAW, &t_end);\r
-\r
- unsigned long end = tsc_tick();\r
-\r
- unsigned long ns = (unsigned long)((t_end.tv_sec - t_start.tv_sec) * ns_per_sec + t_end.tv_nsec - t_start.tv_nsec);\r
-\r
- double secs = (double) ns / ns_per_sec;\r
-\r
- unsigned long resolution_timer = (unsigned long)((end - start)/secs);\r
- unsigned long tick_per_usec = (resolution_timer / 1000000);\r
-\r
- std::cout << "[----------] System clock (rdtsc) resolution " << resolution_timer << " [Hz]" << std::endl;\r
- std::cout << "[----------] Ticks per us " << tick_per_usec << std::endl;\r
-\r
- return tick_per_usec;\r
- }\r
-#else\r
-\r
- LARGE_INTEGER tick_per_sec;\r
- QueryPerformanceFrequency(&tick_per_sec);\r
-\r
- std::cout << "[----------] System clock (rdtsc) resolution unknown" << std::endl;\r
- std::cout << "[----------] Ticks per us " << (tick_per_sec.QuadPart / 1000000) << std::endl;\r
- return (unsigned long) tick_per_sec.QuadPart;\r
-\r
-#endif\r
- return 0;\r
-}\r
-\r
-unsigned long tsc_tick()\r
-{\r
-#ifndef _WIN64\r
- unsigned long hi, lo;\r
-\r
- __asm volatile ("rdtsc" : "=a"(lo), "=d"(hi));\r
-\r
- return lo | (hi << 32);\r
-#else\r
- return 0;\r
-#endif\r
-}\r
-\r
-void KernelTests::print_and_store_results(const std::string &isa, const std::string ¶meters,\r
- const std::string &module_name, const std::string &test_name,\r
- const std::string &unit, const int para_factor,\r
- const double mean, const double stddev)\r
-{\r
- std::cout << "[----------] " << "Mean" << " = " << std::fixed << mean << " us" << std::endl;\r
- std::cout << "[----------] " << "Stddev" << " = " << stddev << " us" << std::endl;\r
-\r
-#ifndef _WIN64\r
- /* Two properties below should uniquely identify a test case */\r
- RecordProperty("kernelname", module_name);\r
- RecordProperty("parameters", parameters);\r
-\r
- RecordProperty("isa", isa);\r
- RecordProperty("unit", unit);\r
- RecordProperty("parallelization_factor", para_factor);\r
-\r
- RecordProperty("mean", std::to_string(mean));\r
- RecordProperty("stddev", std::to_string(stddev));\r
-#endif\r
-}\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+
+#include <cmath>
+#include <fstream>
+#include <numeric>
+
+#ifndef _WIN64
+#include <unistd.h>
+#include <sys/syscall.h>
+#else
+#include <Windows.h>
+#endif
+
+#include "common.hpp"
+
+#ifndef CPU_ID
+#define CPU_ID 4
+#endif
+
+/* Required to avoid linker errors */
+json KernelTests::conf;
+std::string KernelTests::test_type;
+unsigned long KernelTests::tsc;
+
+
+long BenchmarkParameters::repetition = 40;
+long BenchmarkParameters::loop = 30;
+unsigned BenchmarkParameters::cpu_id = CPU_ID;
+
+int bind_to_cpu(const unsigned cpu)
+{
+#ifndef _WIN64
+ const auto pid = syscall(SYS_gettid);
+ cpu_set_t mask {};
+ CPU_ZERO(&mask);
+ CPU_SET(cpu, &mask);
+ return sched_setaffinity(__pid_t(pid), sizeof(mask), &mask);
+#else
+ return -1;
+#endif
+}
+
+std::pair<double, double> calculate_statistics(const std::vector<long> values)
+{
+ const auto sum = std::accumulate(values.begin(), values.end(), 0L);
+
+ const auto number_of_iterations = BenchmarkParameters::repetition *
+ BenchmarkParameters::loop;
+
+ const auto mean = sum / (double) number_of_iterations;
+
+ auto stddev_accumulator = 0.0;
+ for (auto v : values)
+ stddev_accumulator = pow((v / BenchmarkParameters::loop) - mean, 2);
+
+ const auto stddev = sqrt(stddev_accumulator / BenchmarkParameters::repetition);
+
+ return {mean, stddev};
+}
+
+std::vector<unsigned> get_sequence(const unsigned number)
+{
+ std::vector<unsigned> sequence(number);
+ std::iota(sequence.begin(), sequence.end(), 0);
+
+ return sequence;
+}
+
+char* read_data_to_aligned_array(const std::string &filename)
+{
+ std::ifstream input_stream(filename, std::ios::binary);
+
+ std::vector<char> buffer((std::istreambuf_iterator<char>(input_stream)),
+ std::istreambuf_iterator<char>());
+
+ if(buffer.size() == 0)
+ throw reading_input_file_exception();
+
+ auto aligned_buffer = aligned_malloc<char>((int) buffer.size(), 64);
+
+ if(aligned_buffer == nullptr)
+ throw std::runtime_error("Failed to allocate memory for the test vector!");
+
+ std::copy(buffer.begin(), buffer.end(), aligned_buffer);
+
+ return aligned_buffer;
+}
+
+json read_json_from_file(const std::string &filename)
+{
+ json result;
+
+ std::ifstream json_stream(filename);
+ if(!json_stream.is_open())
+ throw missing_config_file_exception();
+
+ json_stream >> result;
+
+ return result;
+}
+
+unsigned long tsc_recovery()
+{
+#ifndef _WIN64
+ constexpr auto ns_per_sec = 1E9;
+
+ struct timespec sleeptime = {.tv_nsec = __syscall_slong_t(5E8) };
+
+ struct timespec t_start, t_end;
+
+ if (clock_gettime(CLOCK_MONOTONIC_RAW, &t_start) == 0)
+ {
+ unsigned long start = tsc_tick();
+
+ nanosleep(&sleeptime,NULL);
+ clock_gettime(CLOCK_MONOTONIC_RAW, &t_end);
+
+ unsigned long end = tsc_tick();
+
+ unsigned long ns = (unsigned long)((t_end.tv_sec - t_start.tv_sec) * ns_per_sec + t_end.tv_nsec - t_start.tv_nsec);
+
+ double secs = (double) ns / ns_per_sec;
+
+ unsigned long resolution_timer = (unsigned long)((end - start)/secs);
+ unsigned long tick_per_usec = (resolution_timer / 1000000);
+
+ std::cout << "[----------] System clock (rdtsc) resolution " << resolution_timer << " [Hz]" << std::endl;
+ std::cout << "[----------] Ticks per us " << tick_per_usec << std::endl;
+
+ return tick_per_usec;
+ }
+#else
+
+ LARGE_INTEGER tick_per_sec;
+ QueryPerformanceFrequency(&tick_per_sec);
+
+ std::cout << "[----------] System clock (rdtsc) resolution unknown" << std::endl;
+ std::cout << "[----------] Ticks per us " << (tick_per_sec.QuadPart / 1000000) << std::endl;
+ return (unsigned long) tick_per_sec.QuadPart;
+
+#endif
+ return 0;
+}
+
+unsigned long tsc_tick()
+{
+#ifndef _WIN64
+ unsigned long hi, lo;
+
+ __asm volatile ("rdtsc" : "=a"(lo), "=d"(hi));
+
+ return lo | (hi << 32);
+#else
+ return 0;
+#endif
+}
+
+void KernelTests::print_and_store_results(const std::string &isa, const std::string ¶meters,
+ const std::string &module_name, const std::string &test_name,
+ const std::string &unit, const int para_factor,
+ const double mean, const double stddev)
+{
+ std::cout << "[----------] " << "Mean" << " = " << std::fixed << mean << " us" << std::endl;
+ std::cout << "[----------] " << "Stddev" << " = " << stddev << " us" << std::endl;
+
+#ifndef _WIN64
+ /* Two properties below should uniquely identify a test case */
+ RecordProperty("kernelname", module_name);
+ RecordProperty("parameters", parameters);
+
+ RecordProperty("isa", isa);
+ RecordProperty("unit", unit);
+ RecordProperty("parallelization_factor", para_factor);
+
+ RecordProperty("mean", std::to_string(mean));
+ RecordProperty("stddev", std::to_string(stddev));
+#endif
+}
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-\r
-/* This is the new utility file for all tests, all new common functionality has to go here.\r
- When contributing to the common.hpp please focus on readability and maintainability rather than\r
- execution time. */\r
-#ifndef XRANLIB_COMMON_HPP\r
-#define XRANLIB_COMMON_HPP\r
-\r
-/* Disable warnings generated by JSON parser */\r
-#pragma warning(disable : 191)\r
-#pragma warning(disable : 186)\r
-#pragma warning(disable : 192)\r
-\r
-#include <exception>\r
-#include <random>\r
-#include <string>\r
-#include <utility>\r
-#include <vector>\r
-\r
-#include <immintrin.h>\r
-#include <malloc.h>\r
-\r
-#define _BBLIB_DPDK_\r
-\r
-#ifdef _BBLIB_DPDK_\r
-#include <rte_config.h>\r
-#include <rte_malloc.h>\r
-#endif\r
-\r
-#include "gtest/gtest.h"\r
-\r
-#include "common_typedef_xran.h"\r
-\r
-#include "json.hpp"\r
-\r
-using json = nlohmann::json;\r
-\r
-#define ASSERT_ARRAY_NEAR(reference, actual, size, precision) \\r
- assert_array_near(reference, actual, size, precision)\r
-\r
-#define ASSERT_ARRAY_EQ(reference, actual, size) \\r
- assert_array_eq(reference, actual, size)\r
-\r
-#define ASSERT_AVG_GREATER_COMPLEX(reference, actual, size, precision) \\r
- assert_avg_greater_complex(reference, actual, size, precision)\r
-\r
-struct BenchmarkParameters\r
-{\r
- static long repetition;\r
- static long loop;\r
- static unsigned cpu_id;\r
-};\r
-\r
-struct missing_config_file_exception : public std::exception\r
-{\r
- const char * what () const throw () override {\r
- return "JSON file cannot be opened!";\r
- }\r
-};\r
-\r
-struct reading_input_file_exception : public std::exception\r
-{\r
- const char * what () const throw () override {\r
- return "Input file cannot be read!";\r
- }\r
-};\r
-\r
-/*!\r
- \brief Attach current process to the selected core.\r
- \param [in] cpu Core number.\r
- \return 0 on success, -1 otherwise.\r
-*/\r
-int bind_to_cpu(const unsigned cpu);\r
-\r
-/*!\r
- \brief Calculate the mean and variance from the result of the run_benchmark.\r
- \param [in] values Vector with result values.\r
- \return std::pair where the first element is mean and the second one is standard deviation.\r
- \note It's not a general mean/stddev function it only works properly when feed with data from\r
- the benchmark function.\r
-*/\r
-std::pair<double, double> calculate_statistics(const std::vector<long> values);\r
-\r
-/*!\r
- \brief For a given number return sequence of number from 0 to number - 1.\r
- \param [in] number Positive integer value.\r
- \return Vector with the sorted integer numbers between 0 and number - 1.\r
-*/\r
-std::vector<unsigned> get_sequence(const unsigned number);\r
-\r
-/*!\r
- \brief Read JSON from the given file.\r
- \param [in] filename name of the .json file.\r
- \return JSON object with data.\r
- \throws missing_config_file_exception when file cannot be opened.\r
-*/\r
-json read_json_from_file(const std::string &filename);\r
-\r
-/*!\r
- \brief Read binary data from the file.\r
- \param [in] filename name of the binary file.\r
- \return Pointer to the allocated memory with data from the file.\r
- \throws std::runtime_error when memory cannot be allocated.\r
-*/\r
-char* read_data_to_aligned_array(const std::string &filename);\r
-\r
-/*!\r
- \brief Measure the TSC on the machine\r
- \return Number of ticks per us\r
-*/\r
-unsigned long tsc_recovery();\r
-\r
-/*!\r
- \brief Return the current value of the TSC\r
- \return Current TSC value\r
-*/\r
-unsigned long tsc_tick();\r
-\r
-/*!\r
- \class KernelTests\r
-\r
- Each test class has to inherit from KernelTests class as it provides GTest support and does a lot\r
- of setup (including JSON) an provides useful methods to operate on loaded JSON file.\r
- Unfortunately GTest is limited in the way that all TEST_P within the class are called for all\r
- cases/parameters, but we usually want two different data sets for functional and performance\r
- tests (or maybe other types of tests). Because of that to use different data sets we need to\r
- create separate classes, hence performance and functional test are in separate classes. it adds\r
- an extra overhead, but adds much more flexibility. init_test(...) is used to select data set from\r
- the JSON file.\r
-\r
- Important note on the JSON file structure. Top JSON object can have as many section (JSON\r
- objects) as needed, but each have to have a distinct name that is used by init_test. Then\r
- each section must contain an array of objects (test cases) where each object has a name,\r
- parameters and references. Everything inside parameters and references can be completely custom\r
- as it's loaded by get_input/reference_parameter function. JSON values can be either literal\r
- values, e.g. 1, 0.001, 5e-05, etc. or filename. Depends on the get type test framework can either\r
- read the value or load data from the file - and it happens automatically (*pff* MAGIC!).\r
-*/\r
-class KernelTests : public testing::TestWithParam<unsigned>\r
-{\r
-public:\r
- static json conf;\r
- static std::string test_type;\r
-\r
- static void SetUpTestCase()\r
- {\r
- test_type = "None";\r
-\r
- try\r
- {\r
- conf = read_json_from_file("conf.json");\r
- }\r
- catch(missing_config_file_exception &e)\r
- {\r
- std::cout << "[----------] SetUpTestCase failed: " << e.what() << std::endl;\r
- exit(-1);\r
- }\r
-\r
- tsc = tsc_recovery();\r
-\r
- if(!tsc)\r
- {\r
- std::cout << "[----------] SetUpTestCase failed: TSC recovery failed" << std::endl;\r
- exit(-1);\r
- }\r
- }\r
-\r
- static void TearDownTestCase()\r
- {\r
- /* Free resources - nothing to free at the moment */\r
- }\r
-\r
- static unsigned get_number_of_cases(const std::string &type)\r
- {\r
- try\r
- {\r
- json json_data = read_json_from_file("conf.json");\r
-\r
- return json_data[type].size();\r
- }\r
- catch(missing_config_file_exception &e)\r
- {\r
- std::cout << "[----------] get_number_of_cases failed: " << e.what() << std::endl;\r
-\r
- exit(-1);\r
- }\r
- catch(std::domain_error &e)\r
- {\r
- std::cout << "[----------] get_number_of_cases failed: " << e.what() << std::endl;\r
- std::cout << "[----------] Use a default value: 0" << std::endl;\r
-\r
- return 0;\r
- }\r
- }\r
-\r
-protected:\r
- double division_factor = 1.0;\r
- std::string result_units = "None";\r
- int parallelization_factor = 1;\r
-\r
- /*!\r
- \brief Set division factor\r
- \param [in] factor Division factor that divides mean and standard deviation.\r
- */\r
- void set_division_factor(const double factor)\r
- {\r
- division_factor = factor;\r
- }\r
-\r
- /*!\r
- \brief Set reults units\r
- \param [in] units Units that are displayed in the report.\r
- */\r
- void set_results_units(const std::string &units)\r
- {\r
- result_units = units;\r
- }\r
-\r
- /*!\r
- \brief Set size of processed data\r
- \param [in] size Size of processed data used to calculate module throughput.\r
- */\r
- void set_parallelization_factor(const int factor)\r
- {\r
- parallelization_factor = factor;\r
- }\r
-\r
- /*!\r
- \brief Run performance test case for a given function.\r
- \param [in] isa Used Instruction Set.\r
- \param [in] module_name name of the tested kernel.\r
- \param [in] function function to be tested.\r
- \param [in] args function's arguments.\r
- */\r
- template <typename F, typename ... Args>\r
- void performance(const std::string &isa, const std::string &module_name, F function,\r
- Args ... args) {\r
- ASSERT_EQ(0, bind_to_cpu(BenchmarkParameters::cpu_id)) << "Failed to bind to cpu!";\r
-\r
- const auto result = run_benchmark(function, args ...);\r
- const auto scaled_mean = result.first / division_factor / tsc;\r
- const auto scaled_stddev = result.second / division_factor / tsc;\r
-\r
- print_and_store_results(isa, get_case_name(), module_name, get_case_name(), result_units,\r
- parallelization_factor, scaled_mean, scaled_stddev);\r
- }\r
-\r
- /*!\r
- \brief Print unique test description to the results xml file\r
- \param [in] isa Used Instruction Set.\r
- \param [in] module_name name of the tested kernel.\r
- \param [in] function function to be tested.\r
- */\r
- void print_test_description(const std::string &isa, const std::string &module_name) {\r
- print_and_store_results(isa, get_case_name(), module_name, get_case_name(), result_units,\r
- parallelization_factor, 0, 0);\r
- }\r
-\r
- //! @{\r
- /*!\r
- \brief Load selected data from a JSON object.\r
- get_input_parameter loads data from parameters section of the test case in JSON file and\r
- get_reference_parameter does the same thing for references section.\r
-\r
- Get parameter function uses template type to figure out how to load parameters. If type\r
- is NOT a pointer it'll load value directly from the JSON. Otherwise path to the test\r
- vector is expected and function will allocate memory, load data from the binary file to\r
- this memory location and return pointer to it. For example in here we request to load\r
- pointer to float so llrs filed is expected to be\r
- a path to the binary file.\r
- */\r
- template <typename T>\r
- T get_input_parameter(const std::string ¶meter_name)\r
- {\r
- try\r
- {\r
- return get_parameter<T>("parameters", parameter_name);\r
- }\r
- catch (std::domain_error &e)\r
- {\r
- std::cout << "[----------] get_input_parameter (" << parameter_name\r
- << ") failed: " << e.what()\r
- << ". Did you mispell the parameter name?" << std::endl;\r
- throw;\r
- }\r
- catch(reading_input_file_exception &e)\r
- {\r
- std::cout << "[----------] get_input_parameter (" << parameter_name\r
- << ") failed: " << e.what() << std::endl;\r
- throw;\r
- }\r
- }\r
-\r
- template <typename T>\r
- T get_reference_parameter(const std::string ¶meter_name)\r
- {\r
- try\r
- {\r
- return get_parameter<T>("references", parameter_name);\r
- }\r
- catch (std::domain_error &e)\r
- {\r
- std::cout << "[----------] get_reference_parameter (" << parameter_name\r
- << ") failed: " << e.what()\r
- << ". Did you mispell the parameter name?" << std::endl;\r
- throw;\r
- }\r
- catch(reading_input_file_exception &e)\r
- {\r
- std::cout << "[----------] get_reference_parameter (" << parameter_name\r
- << ") failed: " << e.what() << std::endl;\r
- throw;\r
- }\r
- }\r
- //! @}\r
-\r
- /*!\r
- \brief Get name of the test case from JSON file.\r
- \return Test'ss case name or a default name if name field is missing.\r
- */\r
- const std::string get_case_name()\r
- {\r
- try\r
- {\r
- return conf[test_type][GetParam()]["name"];\r
- }\r
- catch (std::domain_error &e)\r
- {\r
- std::cout << "[----------] get_case_name failed: " << e.what()\r
- << ". Did you specify a test name in JSON?" << std::endl;\r
- std::cout << "[----------] Using a default name instead" << std::endl;\r
-\r
- return "Default test name";\r
- }\r
- }\r
-\r
- /*!\r
- \brief Defines section in the conf.json that is used to load parameters from.\r
- \param [in] type Name of the section in the JSON file.\r
- */\r
- void init_test(const std::string &type)\r
- {\r
- test_type = type;\r
- const std::string name = get_case_name();\r
- std::cout << "[----------] Test case: " << name << std::endl;\r
- }\r
-\r
-private:\r
- static unsigned long tsc;\r
-\r
- template<typename T>\r
- struct data_reader {\r
- static T read_parameter(const int index, const std::string &type,\r
- const std::string ¶meter_name)\r
- {\r
- return conf[test_type][index][type][parameter_name];\r
- }\r
- };\r
-\r
- template<typename T>\r
- struct data_reader<std::vector<T>> {\r
- static std::vector<T> read_parameter(const int index, const std::string &type,\r
- const std::string ¶meter_name)\r
- {\r
- auto array_size = conf[test_type][index][type][parameter_name].size();\r
-\r
- std::vector<T> result(array_size);\r
-\r
- for(unsigned number = 0; number < array_size; number++)\r
- result.at(number) = conf[test_type][index][type][parameter_name][number];\r
-\r
- return result;\r
- }\r
- };\r
-\r
- template<typename T>\r
- struct data_reader<T*> {\r
- static T* read_parameter(const int index, const std::string &type,\r
- const std::string ¶meter_name)\r
- {\r
- return (T*) read_data_to_aligned_array(conf[test_type][index][type][parameter_name]);\r
- }\r
- };\r
-\r
- template <typename T>\r
- T get_parameter(const std::string &type, const std::string ¶meter_name)\r
- {\r
- return data_reader<T>::read_parameter(GetParam(), type, parameter_name);\r
- }\r
-\r
- void print_and_store_results(const std::string &isa,\r
- const std::string ¶meters,\r
- const std::string &module_name,\r
- const std::string &test_name,\r
- const std::string &unit,\r
- const int para_factor,\r
- const double mean,\r
- const double stddev);\r
-};\r
-\r
-/*!\r
- \brief Run the given function and return the mean run time and stddev.\r
- \param [in] function Function to benchmark.\r
- \param [in] args Function's arguments.\r
- \return std::pair where the first element is mean and the second one is standard deviation.\r
-*/\r
-template <typename F, typename ... Args>\r
-std::pair<double, double> run_benchmark(F function, Args ... args)\r
-{\r
- std::vector<long> results((unsigned long) BenchmarkParameters::repetition);\r
-\r
- for(unsigned int outer_loop = 0; outer_loop < BenchmarkParameters::repetition; outer_loop++) {\r
- const auto start_time = __rdtsc();\r
- for (unsigned int inner_loop = 0; inner_loop < BenchmarkParameters::loop; inner_loop++) {\r
- function(args ...);\r
- }\r
- const auto end_time = __rdtsc();\r
- results.push_back(end_time - start_time);\r
- }\r
-\r
- return calculate_statistics(results);\r
-};\r
-\r
-/*!\r
- \brief Assert elements of two arrays. It calls ASSERT_EQ for each element of the array.\r
- \param [in] reference Array with reference values.\r
- \param [in] actual Array with the actual output.\r
- \param [in] size Size of the array.\r
-*/\r
-template <typename T>\r
-void assert_array_eq(const T* reference, const T* actual, const int size)\r
-{\r
- for(int index = 0; index < size ; index++)\r
- {\r
- ASSERT_EQ(reference[index], actual[index])\r
- <<"The wrong number is index: "<< index;\r
- }\r
-}\r
-\r
-/*!\r
- \brief Assert elements of two arrays. It calls ASSERT_NEAR for each element of the array.\r
- \param [in] reference Array with reference values.\r
- \param [in] actual Array with the actual output.\r
- \param [in] size Size of the array.\r
- \param [in] precision Precision fo the comparision used by ASSERT_NEAR.\r
-*/\r
-template <typename T>\r
-void assert_array_near(const T* reference, const T* actual, const int size, const double precision)\r
-{\r
- for(int index = 0; index < size ; index++)\r
- {\r
- ASSERT_NEAR(reference[index], actual[index], precision)\r
- <<"The wrong number is index: "<< index;\r
- }\r
-}\r
-\r
-template <>\r
-void assert_array_near<complex_float>(const complex_float* reference, const complex_float* actual, const int size, const double precision)\r
-{\r
- for(int index = 0; index < size ; index++)\r
- {\r
- ASSERT_NEAR(reference[index].re, actual[index].re, precision)\r
- <<"The wrong number is RE, index: "<< index;\r
- ASSERT_NEAR(reference[index].im, actual[index].im, precision)\r
- <<"The wrong number is IM, index: "<< index;\r
- }\r
-}\r
-\r
-/*!\r
- \brief Assert average diff of two arrays. It calls ASSERT_GT to check the average.\r
- \param [in] reference Array with reference values, interleaved IQ inputs.\r
- \param [in] actual Array with the actual output, interleaved IQ inputs.\r
- \param [in] size Size of the array, based on complex inputs.\r
- \param [in] precision Precision for the comparison used by ASSERT_GT.\r
-*/\r
-template<typename T>\r
-void assert_avg_greater_complex(const T* reference, const T* actual, const int size, const double precision)\r
-{\r
- float mseDB, MSE;\r
- double avgMSEDB = 0.0;\r
- for (int index = 0; index < size; index++) {\r
- T refReal = reference[2*index];\r
- T refImag = reference[(2*index)+1];\r
- T resReal = actual[2*index];\r
- T resImag = actual[(2*index)+1];\r
-\r
- T errReal = resReal - refReal;\r
- T errIm = resImag - refImag;\r
-\r
- /* For some unit tests, e.g. PUCCH deomdulation, the expected output is 0. To avoid a\r
- divide by zero error, check the reference results to determine if the expected result\r
- is 0 and, if so, add a 1 to the division. */\r
- if (refReal == 0 && refImag == 0)\r
- MSE = (float)(errReal*errReal + errIm*errIm)/(float)(refReal*refReal + refImag*refImag + 1);\r
- else\r
- MSE = (float)(errReal*errReal + errIm*errIm)/(float)(refReal*refReal + refImag*refImag);\r
-\r
- if(MSE == 0)\r
- mseDB = (float)(-100.0);\r
- else\r
- mseDB = (float)(10.0) * (float)log10(MSE);\r
-\r
- avgMSEDB += (double)mseDB;\r
- }\r
-\r
- avgMSEDB /= size;\r
-\r
- ASSERT_GT(precision, avgMSEDB);\r
-}\r
-\r
-/*!\r
- \brief Allocates memory of the given size.\r
-\r
- aligned_malloc is wrapper to functions that allocate memory:\r
- 'rte_malloc' from DPDK if hugepages are defined, 'memalign' otherwise.\r
- Size is defined as a number of variables of given type e.g. floats, rather than bytes.\r
- It hides sizeof(T) multiplication and cast hence makes things cleaner.\r
-\r
- \param [in] size Size of the memory to allocate.\r
- \param [in] alignment Bytes alignment of the allocated memory. If 0, the return is a pointer\r
- that is suitably aligned for any kind of variable (in the same manner as malloc()).\r
- Otherwise, the return is a pointer that is a multiple of align. In this case,\r
- it must be a power of two. (Minimum alignment is the cacheline size, i.e. 64-bytes)\r
- \return Pointer to the allocated memory.\r
-*/\r
-template <typename T>\r
-T* aligned_malloc(const int size, const unsigned alignment)\r
-{\r
-#ifdef _BBLIB_DPDK_\r
- return (T*) rte_malloc(NULL, sizeof(T) * size, alignment);\r
-#else\r
-#ifndef _WIN64\r
- return (T*) memalign(alignment, sizeof(T) * size);\r
-#else\r
- return (T*)_aligned_malloc(sizeof(T)*size, alignment);\r
-#endif\r
-#endif\r
-}\r
-\r
-/*!\r
- \brief Frees memory pointed by the given pointer.\r
-\r
- aligned_free is a wrapper for functions that free memory allocated by\r
- aligned_malloc: 'rte_free' from DPDK if hugepages are defined and 'free' otherwise.\r
-\r
- \param [in] ptr Pointer to the allocated memory.\r
-*/\r
-template <typename T>\r
-void aligned_free(T* ptr)\r
-{\r
-#ifdef _BBLIB_DPDK_\r
- rte_free((void*)ptr);\r
-#else\r
-\r
-#ifndef _WIN64\r
- free((void*)ptr);\r
-#else\r
- _aligned_free((void *)ptr);\r
-#endif\r
-#endif\r
-}\r
-\r
-/*!\r
- \brief generate random numbers.\r
-\r
- It allocates memory and populate it with random numbers using C++11 default engine and\r
- uniform real / int distribution (where lo_range <= x <up_range). Don't forget to free\r
- allocated memory!\r
-\r
- \param [in] size Size of the memory to be filled with random data.\r
- \param [in] alignment Bytes alignment of the memory.\r
- \param [in] distribution Distribuiton for random generator.\r
- \return Pointer to the allocated memory with random data.\r
-*/\r
-template <typename T, typename U>\r
-T* generate_random_numbers(const long size, const unsigned alignment, U& distribution)\r
-{\r
- auto array = (T*) aligned_malloc<char>(size * sizeof(T), alignment);\r
-\r
- std::random_device random_device;\r
- std::default_random_engine generator(random_device());\r
-\r
- for(long i = 0; i < size; i++)\r
- array[i] = (T)distribution(generator);\r
-\r
- return array;\r
-}\r
-\r
-/*!\r
- \brief generate random data.\r
-\r
- It allocates memory and populate it with random data using C++11 default engine and\r
- uniform integer distribution (bytes not floats are uniformly distributed). Don't forget\r
- to free allocated memory!\r
-\r
- \param [in] size Size of the memory to be filled with random data.\r
- \param [in] alignment Bytes alignment of the memory.\r
- \return Pointer to the allocated memory with random data.\r
-*/\r
-template <typename T>\r
-T* generate_random_data(const long size, const unsigned alignment)\r
-{\r
- std::uniform_int_distribution<> random(0, 255);\r
-\r
- return (T*)generate_random_numbers<char, std::uniform_int_distribution<>>(size * sizeof(T), alignment, random);\r
-}\r
-\r
-/*!\r
- \brief generate integer random numbers.\r
-\r
- It allocates memory and populate it with random numbers using C++11 default engine and\r
- uniform integer distribution (where lo_range <= x < up_range). Don't forget\r
- to free allocated memory! The result type generated by the generator should be one of\r
- int types.\r
-\r
- \param [in] size Size of the memory to be filled with random data.\r
- \param [in] alignment Bytes alignment of the memory.\r
- \param [in] lo_range Lower bound of range of values returned by random generator.\r
- \param [in] up_range Upper bound of range of values returned by random generator.\r
- \return Pointer to the allocated memory with random data.\r
-*/\r
-template <typename T>\r
-T* generate_random_int_numbers(const long size, const unsigned alignment, const T lo_range,\r
- const T up_range)\r
-{\r
- std::uniform_int_distribution<T> random(lo_range, up_range);\r
-\r
- return generate_random_numbers<T, std::uniform_int_distribution<T>>(size, alignment, random);\r
-}\r
-\r
-/*!\r
- \brief generate real random numbers.\r
-\r
- It allocates memory and populate it with random numbers using C++11 default engine and\r
- uniform real distribution (where lo_range <= x <up_range). Don't forget to free\r
- allocated memory! The result type generated by the generator should be one of\r
- real types: float, double or long double.\r
-\r
- \param [in] size Size of the memory to be filled with random data.\r
- \param [in] alignment Bytes alignment of the memory.\r
- \param [in] lo_range Lower bound of range of values returned by random generator.\r
- \param [in] up_range Upper bound of range of values returned by random generator.\r
- \return Pointer to the allocated memory with random data.\r
-*/\r
-template <typename T>\r
-T* generate_random_real_numbers(const long size, const unsigned alignment, const T lo_range,\r
- const T up_range)\r
-{\r
- std::uniform_real_distribution<T> distribution(lo_range, up_range);\r
-\r
- return generate_random_numbers<T, std::uniform_real_distribution<T>>(size, alignment, distribution);\r
-}\r
-\r
-#endif //XRANLIB_COMMON_HPP\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+
+/* This is the new utility file for all tests, all new common functionality has to go here.
+ When contributing to the common.hpp please focus on readability and maintainability rather than
+ execution time. */
+#ifndef XRANLIB_COMMON_HPP
+#define XRANLIB_COMMON_HPP
+
+/* Disable warnings generated by JSON parser */
+#pragma warning(disable : 191)
+#pragma warning(disable : 186)
+#pragma warning(disable : 192)
+
+#include <exception>
+#include <random>
+#include <string>
+#include <utility>
+#include <vector>
+
+#include <immintrin.h>
+#include <malloc.h>
+
+#define _BBLIB_DPDK_
+
+#ifdef _BBLIB_DPDK_
+#include <rte_config.h>
+#include <rte_malloc.h>
+#endif
+
+#include "gtest/gtest.h"
+
+#include "common_typedef_xran.h"
+
+#include "json.hpp"
+
+using json = nlohmann::json;
+
+#define ASSERT_ARRAY_NEAR(reference, actual, size, precision) \
+ assert_array_near(reference, actual, size, precision)
+
+#define ASSERT_ARRAY_EQ(reference, actual, size) \
+ assert_array_eq(reference, actual, size)
+
+#define ASSERT_AVG_GREATER_COMPLEX(reference, actual, size, precision) \
+ assert_avg_greater_complex(reference, actual, size, precision)
+
+struct BenchmarkParameters
+{
+ static long repetition;
+ static long loop;
+ static unsigned cpu_id;
+};
+
+struct missing_config_file_exception : public std::exception
+{
+ const char * what () const throw () override {
+ return "JSON file cannot be opened!";
+ }
+};
+
+struct reading_input_file_exception : public std::exception
+{
+ const char * what () const throw () override {
+ return "Input file cannot be read!";
+ }
+};
+
+/*!
+ \brief Attach current process to the selected core.
+ \param [in] cpu Core number.
+ \return 0 on success, -1 otherwise.
+*/
+int bind_to_cpu(const unsigned cpu);
+
+/*!
+ \brief Calculate the mean and variance from the result of the run_benchmark.
+ \param [in] values Vector with result values.
+ \return std::pair where the first element is mean and the second one is standard deviation.
+ \note It's not a general mean/stddev function it only works properly when feed with data from
+ the benchmark function.
+*/
+std::pair<double, double> calculate_statistics(const std::vector<long> values);
+
+/*!
+ \brief For a given number return sequence of number from 0 to number - 1.
+ \param [in] number Positive integer value.
+ \return Vector with the sorted integer numbers between 0 and number - 1.
+*/
+std::vector<unsigned> get_sequence(const unsigned number);
+
+/*!
+ \brief Read JSON from the given file.
+ \param [in] filename name of the .json file.
+ \return JSON object with data.
+ \throws missing_config_file_exception when file cannot be opened.
+*/
+json read_json_from_file(const std::string &filename);
+
+/*!
+ \brief Read binary data from the file.
+ \param [in] filename name of the binary file.
+ \return Pointer to the allocated memory with data from the file.
+ \throws std::runtime_error when memory cannot be allocated.
+*/
+char* read_data_to_aligned_array(const std::string &filename);
+
+/*!
+ \brief Measure the TSC on the machine
+ \return Number of ticks per us
+*/
+unsigned long tsc_recovery();
+
+/*!
+ \brief Return the current value of the TSC
+ \return Current TSC value
+*/
+unsigned long tsc_tick();
+
+/*!
+ \class KernelTests
+
+ Each test class has to inherit from KernelTests class as it provides GTest support and does a lot
+ of setup (including JSON) an provides useful methods to operate on loaded JSON file.
+ Unfortunately GTest is limited in the way that all TEST_P within the class are called for all
+ cases/parameters, but we usually want two different data sets for functional and performance
+ tests (or maybe other types of tests). Because of that to use different data sets we need to
+ create separate classes, hence performance and functional test are in separate classes. it adds
+ an extra overhead, but adds much more flexibility. init_test(...) is used to select data set from
+ the JSON file.
+
+ Important note on the JSON file structure. Top JSON object can have as many section (JSON
+ objects) as needed, but each have to have a distinct name that is used by init_test. Then
+ each section must contain an array of objects (test cases) where each object has a name,
+ parameters and references. Everything inside parameters and references can be completely custom
+ as it's loaded by get_input/reference_parameter function. JSON values can be either literal
+ values, e.g. 1, 0.001, 5e-05, etc. or filename. Depends on the get type test framework can either
+ read the value or load data from the file - and it happens automatically (*pff* MAGIC!).
+*/
+class KernelTests : public testing::TestWithParam<unsigned>
+{
+public:
+ static json conf;
+ static std::string test_type;
+
+ static void SetUpTestCase()
+ {
+ test_type = "None";
+
+ try
+ {
+ conf = read_json_from_file("conf.json");
+ }
+ catch(missing_config_file_exception &e)
+ {
+ std::cout << "[----------] SetUpTestCase failed: " << e.what() << std::endl;
+ exit(-1);
+ }
+
+ tsc = tsc_recovery();
+
+ if(!tsc)
+ {
+ std::cout << "[----------] SetUpTestCase failed: TSC recovery failed" << std::endl;
+ exit(-1);
+ }
+ }
+
+ static void TearDownTestCase()
+ {
+ /* Free resources - nothing to free at the moment */
+ }
+
+ static unsigned get_number_of_cases(const std::string &type)
+ {
+ try
+ {
+ json json_data = read_json_from_file("conf.json");
+
+ return json_data[type].size();
+ }
+ catch(missing_config_file_exception &e)
+ {
+ std::cout << "[----------] get_number_of_cases failed: " << e.what() << std::endl;
+
+ exit(-1);
+ }
+ catch(std::domain_error &e)
+ {
+ std::cout << "[----------] get_number_of_cases failed: " << e.what() << std::endl;
+ std::cout << "[----------] Use a default value: 0" << std::endl;
+
+ return 0;
+ }
+ }
+
+protected:
+ double division_factor = 1.0;
+ std::string result_units = "None";
+ int parallelization_factor = 1;
+
+ /*!
+ \brief Set division factor
+ \param [in] factor Division factor that divides mean and standard deviation.
+ */
+ void set_division_factor(const double factor)
+ {
+ division_factor = factor;
+ }
+
+ /*!
+ \brief Set reults units
+ \param [in] units Units that are displayed in the report.
+ */
+ void set_results_units(const std::string &units)
+ {
+ result_units = units;
+ }
+
+ /*!
+ \brief Set size of processed data
+ \param [in] size Size of processed data used to calculate module throughput.
+ */
+ void set_parallelization_factor(const int factor)
+ {
+ parallelization_factor = factor;
+ }
+
+ /*!
+ \brief Run performance test case for a given function.
+ \param [in] isa Used Instruction Set.
+ \param [in] module_name name of the tested kernel.
+ \param [in] function function to be tested.
+ \param [in] args function's arguments.
+ */
+ template <typename F, typename ... Args>
+ void performance(const std::string &isa, const std::string &module_name, F function,
+ Args ... args) {
+ ASSERT_EQ(0, bind_to_cpu(BenchmarkParameters::cpu_id)) << "Failed to bind to cpu!";
+
+ const auto result = run_benchmark(function, args ...);
+ const auto scaled_mean = result.first / division_factor / tsc;
+ const auto scaled_stddev = result.second / division_factor / tsc;
+
+ print_and_store_results(isa, get_case_name(), module_name, get_case_name(), result_units,
+ parallelization_factor, scaled_mean, scaled_stddev);
+ }
+
+ /*!
+ \brief Print unique test description to the results xml file
+ \param [in] isa Used Instruction Set.
+ \param [in] module_name name of the tested kernel.
+ \param [in] function function to be tested.
+ */
+ void print_test_description(const std::string &isa, const std::string &module_name) {
+ print_and_store_results(isa, get_case_name(), module_name, get_case_name(), result_units,
+ parallelization_factor, 0, 0);
+ }
+
+ //! @{
+ /*!
+ \brief Load selected data from a JSON object.
+ get_input_parameter loads data from parameters section of the test case in JSON file and
+ get_reference_parameter does the same thing for references section.
+
+ Get parameter function uses template type to figure out how to load parameters. If type
+ is NOT a pointer it'll load value directly from the JSON. Otherwise path to the test
+ vector is expected and function will allocate memory, load data from the binary file to
+ this memory location and return pointer to it. For example in here we request to load
+ pointer to float so llrs filed is expected to be
+ a path to the binary file.
+ */
+ template <typename T>
+ T get_input_parameter(const std::string ¶meter_name)
+ {
+ try
+ {
+ return get_parameter<T>("parameters", parameter_name);
+ }
+ catch (std::domain_error &e)
+ {
+ std::cout << "[----------] get_input_parameter (" << parameter_name
+ << ") failed: " << e.what()
+ << ". Did you mispell the parameter name?" << std::endl;
+ throw;
+ }
+ catch(reading_input_file_exception &e)
+ {
+ std::cout << "[----------] get_input_parameter (" << parameter_name
+ << ") failed: " << e.what() << std::endl;
+ throw;
+ }
+ }
+
+ template <typename T>
+ T get_reference_parameter(const std::string ¶meter_name)
+ {
+ try
+ {
+ return get_parameter<T>("references", parameter_name);
+ }
+ catch (std::domain_error &e)
+ {
+ std::cout << "[----------] get_reference_parameter (" << parameter_name
+ << ") failed: " << e.what()
+ << ". Did you mispell the parameter name?" << std::endl;
+ throw;
+ }
+ catch(reading_input_file_exception &e)
+ {
+ std::cout << "[----------] get_reference_parameter (" << parameter_name
+ << ") failed: " << e.what() << std::endl;
+ throw;
+ }
+ }
+ //! @}
+
+ /*!
+ \brief Get name of the test case from JSON file.
+ \return Test'ss case name or a default name if name field is missing.
+ */
+ const std::string get_case_name()
+ {
+ try
+ {
+ return conf[test_type][GetParam()]["name"];
+ }
+ catch (std::domain_error &e)
+ {
+ std::cout << "[----------] get_case_name failed: " << e.what()
+ << ". Did you specify a test name in JSON?" << std::endl;
+ std::cout << "[----------] Using a default name instead" << std::endl;
+
+ return "Default test name";
+ }
+ }
+
+ /*!
+ \brief Defines section in the conf.json that is used to load parameters from.
+ \param [in] type Name of the section in the JSON file.
+ */
+ void init_test(const std::string &type)
+ {
+ test_type = type;
+ const std::string name = get_case_name();
+ std::cout << "[----------] Test case: " << name << std::endl;
+ }
+
+private:
+ static unsigned long tsc;
+
+ template<typename T>
+ struct data_reader {
+ static T read_parameter(const int index, const std::string &type,
+ const std::string ¶meter_name)
+ {
+ return conf[test_type][index][type][parameter_name];
+ }
+ };
+
+ template<typename T>
+ struct data_reader<std::vector<T>> {
+ static std::vector<T> read_parameter(const int index, const std::string &type,
+ const std::string ¶meter_name)
+ {
+ auto array_size = conf[test_type][index][type][parameter_name].size();
+
+ std::vector<T> result(array_size);
+
+ for(unsigned number = 0; number < array_size; number++)
+ result.at(number) = conf[test_type][index][type][parameter_name][number];
+
+ return result;
+ }
+ };
+
+ template<typename T>
+ struct data_reader<T*> {
+ static T* read_parameter(const int index, const std::string &type,
+ const std::string ¶meter_name)
+ {
+ return (T*) read_data_to_aligned_array(conf[test_type][index][type][parameter_name]);
+ }
+ };
+
+ template <typename T>
+ T get_parameter(const std::string &type, const std::string ¶meter_name)
+ {
+ return data_reader<T>::read_parameter(GetParam(), type, parameter_name);
+ }
+
+ void print_and_store_results(const std::string &isa,
+ const std::string ¶meters,
+ const std::string &module_name,
+ const std::string &test_name,
+ const std::string &unit,
+ const int para_factor,
+ const double mean,
+ const double stddev);
+};
+
+/*!
+ \brief Run the given function and return the mean run time and stddev.
+ \param [in] function Function to benchmark.
+ \param [in] args Function's arguments.
+ \return std::pair where the first element is mean and the second one is standard deviation.
+*/
+template <typename F, typename ... Args>
+std::pair<double, double> run_benchmark(F function, Args ... args)
+{
+ std::vector<long> results((unsigned long) BenchmarkParameters::repetition);
+
+ for(unsigned int outer_loop = 0; outer_loop < BenchmarkParameters::repetition; outer_loop++) {
+ const auto start_time = __rdtsc();
+ for (unsigned int inner_loop = 0; inner_loop < BenchmarkParameters::loop; inner_loop++) {
+ function(args ...);
+ }
+ const auto end_time = __rdtsc();
+ results.push_back(end_time - start_time);
+ }
+
+ return calculate_statistics(results);
+};
+
+/*!
+ \brief Assert elements of two arrays. It calls ASSERT_EQ for each element of the array.
+ \param [in] reference Array with reference values.
+ \param [in] actual Array with the actual output.
+ \param [in] size Size of the array.
+*/
+template <typename T>
+void assert_array_eq(const T* reference, const T* actual, const int size)
+{
+ for(int index = 0; index < size ; index++)
+ {
+ ASSERT_EQ(reference[index], actual[index])
+ <<"The wrong number is index: "<< index;
+ }
+}
+
+/*!
+ \brief Assert elements of two arrays. It calls ASSERT_NEAR for each element of the array.
+ \param [in] reference Array with reference values.
+ \param [in] actual Array with the actual output.
+ \param [in] size Size of the array.
+ \param [in] precision Precision fo the comparision used by ASSERT_NEAR.
+*/
+template <typename T>
+void assert_array_near(const T* reference, const T* actual, const int size, const double precision)
+{
+ for(int index = 0; index < size ; index++)
+ {
+ ASSERT_NEAR(reference[index], actual[index], precision)
+ <<"The wrong number is index: "<< index;
+ }
+}
+
+template <>
+void assert_array_near<complex_float>(const complex_float* reference, const complex_float* actual, const int size, const double precision)
+{
+ for(int index = 0; index < size ; index++)
+ {
+ ASSERT_NEAR(reference[index].re, actual[index].re, precision)
+ <<"The wrong number is RE, index: "<< index;
+ ASSERT_NEAR(reference[index].im, actual[index].im, precision)
+ <<"The wrong number is IM, index: "<< index;
+ }
+}
+
+/*!
+ \brief Assert average diff of two arrays. It calls ASSERT_GT to check the average.
+ \param [in] reference Array with reference values, interleaved IQ inputs.
+ \param [in] actual Array with the actual output, interleaved IQ inputs.
+ \param [in] size Size of the array, based on complex inputs.
+ \param [in] precision Precision for the comparison used by ASSERT_GT.
+*/
+template<typename T>
+void assert_avg_greater_complex(const T* reference, const T* actual, const int size, const double precision)
+{
+ float mseDB, MSE;
+ double avgMSEDB = 0.0;
+ for (int index = 0; index < size; index++) {
+ T refReal = reference[2*index];
+ T refImag = reference[(2*index)+1];
+ T resReal = actual[2*index];
+ T resImag = actual[(2*index)+1];
+
+ T errReal = resReal - refReal;
+ T errIm = resImag - refImag;
+
+ /* For some unit tests, e.g. PUCCH deomdulation, the expected output is 0. To avoid a
+ divide by zero error, check the reference results to determine if the expected result
+ is 0 and, if so, add a 1 to the division. */
+ if (refReal == 0 && refImag == 0)
+ MSE = (float)(errReal*errReal + errIm*errIm)/(float)(refReal*refReal + refImag*refImag + 1);
+ else
+ MSE = (float)(errReal*errReal + errIm*errIm)/(float)(refReal*refReal + refImag*refImag);
+
+ if(MSE == 0)
+ mseDB = (float)(-100.0);
+ else
+ mseDB = (float)(10.0) * (float)log10(MSE);
+
+ avgMSEDB += (double)mseDB;
+ }
+
+ avgMSEDB /= size;
+
+ ASSERT_GT(precision, avgMSEDB);
+}
+
+/*!
+ \brief Allocates memory of the given size.
+
+ aligned_malloc is wrapper to functions that allocate memory:
+ 'rte_malloc' from DPDK if hugepages are defined, 'memalign' otherwise.
+ Size is defined as a number of variables of given type e.g. floats, rather than bytes.
+ It hides sizeof(T) multiplication and cast hence makes things cleaner.
+
+ \param [in] size Size of the memory to allocate.
+ \param [in] alignment Bytes alignment of the allocated memory. If 0, the return is a pointer
+ that is suitably aligned for any kind of variable (in the same manner as malloc()).
+ Otherwise, the return is a pointer that is a multiple of align. In this case,
+ it must be a power of two. (Minimum alignment is the cacheline size, i.e. 64-bytes)
+ \return Pointer to the allocated memory.
+*/
+template <typename T>
+T* aligned_malloc(const int size, const unsigned alignment)
+{
+#ifdef _BBLIB_DPDK_
+ return (T*) rte_malloc(NULL, sizeof(T) * size, alignment);
+#else
+#ifndef _WIN64
+ return (T*) memalign(alignment, sizeof(T) * size);
+#else
+ return (T*)_aligned_malloc(sizeof(T)*size, alignment);
+#endif
+#endif
+}
+
+/*!
+ \brief Frees memory pointed by the given pointer.
+
+ aligned_free is a wrapper for functions that free memory allocated by
+ aligned_malloc: 'rte_free' from DPDK if hugepages are defined and 'free' otherwise.
+
+ \param [in] ptr Pointer to the allocated memory.
+*/
+template <typename T>
+void aligned_free(T* ptr)
+{
+#ifdef _BBLIB_DPDK_
+ rte_free((void*)ptr);
+#else
+
+#ifndef _WIN64
+ free((void*)ptr);
+#else
+ _aligned_free((void *)ptr);
+#endif
+#endif
+}
+
+/*!
+ \brief generate random numbers.
+
+ It allocates memory and populate it with random numbers using C++11 default engine and
+ uniform real / int distribution (where lo_range <= x <up_range). Don't forget to free
+ allocated memory!
+
+ \param [in] size Size of the memory to be filled with random data.
+ \param [in] alignment Bytes alignment of the memory.
+ \param [in] distribution Distribuiton for random generator.
+ \return Pointer to the allocated memory with random data.
+*/
+template <typename T, typename U>
+T* generate_random_numbers(const long size, const unsigned alignment, U& distribution)
+{
+ auto array = (T*) aligned_malloc<char>(size * sizeof(T), alignment);
+
+ std::random_device random_device;
+ std::default_random_engine generator(random_device());
+
+ for(long i = 0; i < size; i++)
+ array[i] = (T)distribution(generator);
+
+ return array;
+}
+
+/*!
+ \brief generate random data.
+
+ It allocates memory and populate it with random data using C++11 default engine and
+ uniform integer distribution (bytes not floats are uniformly distributed). Don't forget
+ to free allocated memory!
+
+ \param [in] size Size of the memory to be filled with random data.
+ \param [in] alignment Bytes alignment of the memory.
+ \return Pointer to the allocated memory with random data.
+*/
+template <typename T>
+T* generate_random_data(const long size, const unsigned alignment)
+{
+ std::uniform_int_distribution<> random(0, 255);
+
+ return (T*)generate_random_numbers<char, std::uniform_int_distribution<>>(size * sizeof(T), alignment, random);
+}
+
+/*!
+ \brief generate integer random numbers.
+
+ It allocates memory and populate it with random numbers using C++11 default engine and
+ uniform integer distribution (where lo_range <= x < up_range). Don't forget
+ to free allocated memory! The result type generated by the generator should be one of
+ int types.
+
+ \param [in] size Size of the memory to be filled with random data.
+ \param [in] alignment Bytes alignment of the memory.
+ \param [in] lo_range Lower bound of range of values returned by random generator.
+ \param [in] up_range Upper bound of range of values returned by random generator.
+ \return Pointer to the allocated memory with random data.
+*/
+template <typename T>
+T* generate_random_int_numbers(const long size, const unsigned alignment, const T lo_range,
+ const T up_range)
+{
+ std::uniform_int_distribution<T> random(lo_range, up_range);
+
+ return generate_random_numbers<T, std::uniform_int_distribution<T>>(size, alignment, random);
+}
+
+/*!
+ \brief generate real random numbers.
+
+ It allocates memory and populate it with random numbers using C++11 default engine and
+ uniform real distribution (where lo_range <= x <up_range). Don't forget to free
+ allocated memory! The result type generated by the generator should be one of
+ real types: float, double or long double.
+
+ \param [in] size Size of the memory to be filled with random data.
+ \param [in] alignment Bytes alignment of the memory.
+ \param [in] lo_range Lower bound of range of values returned by random generator.
+ \param [in] up_range Upper bound of range of values returned by random generator.
+ \return Pointer to the allocated memory with random data.
+*/
+template <typename T>
+T* generate_random_real_numbers(const long size, const unsigned alignment, const T lo_range,
+ const T up_range)
+{
+ std::uniform_real_distribution<T> distribution(lo_range, up_range);
+
+ return generate_random_numbers<T, std::uniform_real_distribution<T>>(size, alignment, distribution);
+}
+
+#endif //XRANLIB_COMMON_HPP
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-/*! \file common_typedef_xran.h\r
- \brief This header file defines those data type both used by eNB and UE.\r
-*/\r
-\r
-#ifndef _COMMON_TYPEDEF_XRAN_H_\r
-#define _COMMON_TYPEDEF_XRAN_H_\r
-\r
-#include <stdint.h>\r
-\r
-#include <stdio.h>\r
-#include <stdbool.h>\r
-\r
-/*!\r
- \struct COMPLEX32\r
- \brief Defines 64-bit complex structure; both real part and image part have 32 bit width.\r
-*/\r
-typedef struct {\r
- float re; /*!< 32-bit real part */\r
- float im; /*!< 32-bit image part */\r
-} COMPLEX32;\r
-\r
-//! @{\r
-/*!\r
- \struct complex_int16_t\r
- \brief Defines 32-bit complex structure; both real part and image part have 16 bit width.\r
- \brief Same defines as COMPLEX16\r
-*/\r
-typedef struct {\r
- int16_t re; /*!< 16-bit real part */\r
- int16_t im; /*!< 16-bit image part */\r
-}complex_int16_t,COMPLEX16;\r
-//! @}\r
-\r
-/*!\r
- \struct complex_int32_t\r
- \brief Defines 64-bit complex structure; both real part and image part have 32 bit width.\r
-*/\r
-typedef struct {\r
- int32_t re; /*!< 32-bit real part */\r
- int32_t im; /*!< 32-bit image part */\r
-}complex_int32_t;\r
-\r
-/*!\r
- \struct complex_float\r
- \brief Defines 64-bit complex structure; both real part and image part have 32 bit width.\r
-*/\r
-typedef struct {\r
- float re; /*!< 32-bit real part */\r
- float im; /*!< 32-bit image part */\r
-}complex_float;\r
-\r
-/*!\r
- \struct complex_double\r
- \brief Defines 128-bit complex structure; both real part and image part have 64 bit width.\r
-*/\r
-typedef struct {\r
- double re; /*!< 64-bit real part */\r
- double im; /*!< 64-bit image part */\r
-}complex_double;\r
-\r
-/*!\r
- \typedef half\r
- \brief half is a 16-bit IEEE floating-point standard number format.\r
- \note In future this will be known as `short float' or `__fp16'.\r
- \note Older compilers must provide proxy support for it as a plain 16-bit integer\r
-*/\r
-typedef int16_t half;\r
-\r
-/*!\r
- \struct complex_half\r
- \brief Defines 32-bit complex structure; both real part and image part have 16 bit width.\r
-*/\r
-typedef struct {\r
- half re; /*!< 16-bit real part */\r
- half im; /*!< 16-bit image part */\r
-}complex_half;\r
-\r
-/*!\r
- \enum instruction_cpu_support\r
- \brief Define instruction the CPU can support.\r
-*/\r
-typedef enum{\r
- CPU_GENERIC, /*!< C */\r
- SSE4_2, /*!< SSE4_2 */\r
- AVX, /*!< AVX */\r
- AVX2, /*!< AVX2 */\r
- AVX_512, /*!< AVX512 */\r
-}instruction_cpu_support;\r
-\r
-/*!\r
- \enum bblib_modulation_order\r
- \brief Common enums for modulation order.\r
-*/\r
-enum bblib_modulation_order {\r
- BBLIB_BPSK = 1, /*!< BPSK */\r
- BBLIB_QPSK = 2, /*!< QPSK */\r
- BBLIB_PAM4 = 3, /*!< PAM4 */\r
- BBLIB_QAM16 = 4, /*!< QAM16 */\r
- BBLIB_PAM8 = 5, /*!< PAM8 */\r
- BBLIB_QAM64 = 6, /*!< QAM64 */\r
- BBLIB_PAM16 = 7, /*!< PAM16 */\r
- BBLIB_QAM256 = 8 /*!< QAM256 */\r
-};\r
-\r
-\r
-#ifdef _WIN64\r
-#define __align(x) __declspec(align(x))\r
-#else\r
-#define __align(x) __attribute__((aligned(x)))\r
-#define _aligned_malloc(x,y) memalign(y,x)\r
-#endif\r
-\r
-/* Test time and loops for unit test */\r
-#define TIME 40\r
-#define LOOP 30\r
-\r
-#endif /* #ifndef _COMMON_TYPEDEF_H_ */\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+/*! \file common_typedef_xran.h
+ \brief This header file defines those data type both used by eNB and UE.
+*/
+
+#ifndef _COMMON_TYPEDEF_XRAN_H_
+#define _COMMON_TYPEDEF_XRAN_H_
+
+#include <stdint.h>
+
+#include <stdio.h>
+#include <stdbool.h>
+
+/*!
+ \struct COMPLEX32
+ \brief Defines 64-bit complex structure; both real part and image part have 32 bit width.
+*/
+typedef struct {
+ float re; /*!< 32-bit real part */
+ float im; /*!< 32-bit image part */
+} COMPLEX32;
+
+//! @{
+/*!
+ \struct complex_int16_t
+ \brief Defines 32-bit complex structure; both real part and image part have 16 bit width.
+ \brief Same defines as COMPLEX16
+*/
+typedef struct {
+ int16_t re; /*!< 16-bit real part */
+ int16_t im; /*!< 16-bit image part */
+}complex_int16_t,COMPLEX16;
+//! @}
+
+/*!
+ \struct complex_int32_t
+ \brief Defines 64-bit complex structure; both real part and image part have 32 bit width.
+*/
+typedef struct {
+ int32_t re; /*!< 32-bit real part */
+ int32_t im; /*!< 32-bit image part */
+}complex_int32_t;
+
+/*!
+ \struct complex_float
+ \brief Defines 64-bit complex structure; both real part and image part have 32 bit width.
+*/
+typedef struct {
+ float re; /*!< 32-bit real part */
+ float im; /*!< 32-bit image part */
+}complex_float;
+
+/*!
+ \struct complex_double
+ \brief Defines 128-bit complex structure; both real part and image part have 64 bit width.
+*/
+typedef struct {
+ double re; /*!< 64-bit real part */
+ double im; /*!< 64-bit image part */
+}complex_double;
+
+/*!
+ \typedef half
+ \brief half is a 16-bit IEEE floating-point standard number format.
+ \note In future this will be known as `short float' or `__fp16'.
+ \note Older compilers must provide proxy support for it as a plain 16-bit integer
+*/
+typedef int16_t half;
+
+/*!
+ \struct complex_half
+ \brief Defines 32-bit complex structure; both real part and image part have 16 bit width.
+*/
+typedef struct {
+ half re; /*!< 16-bit real part */
+ half im; /*!< 16-bit image part */
+}complex_half;
+
+/*!
+ \enum instruction_cpu_support
+ \brief Define instruction the CPU can support.
+*/
+typedef enum{
+ CPU_GENERIC, /*!< C */
+ SSE4_2, /*!< SSE4_2 */
+ AVX, /*!< AVX */
+ AVX2, /*!< AVX2 */
+ AVX_512, /*!< AVX512 */
+}instruction_cpu_support;
+
+/*!
+ \enum bblib_modulation_order
+ \brief Common enums for modulation order.
+*/
+enum bblib_modulation_order {
+ BBLIB_BPSK = 1, /*!< BPSK */
+ BBLIB_QPSK = 2, /*!< QPSK */
+ BBLIB_PAM4 = 3, /*!< PAM4 */
+ BBLIB_QAM16 = 4, /*!< QAM16 */
+ BBLIB_PAM8 = 5, /*!< PAM8 */
+ BBLIB_QAM64 = 6, /*!< QAM64 */
+ BBLIB_PAM16 = 7, /*!< PAM16 */
+ BBLIB_QAM256 = 8 /*!< QAM256 */
+};
+
+
+#ifdef _WIN64
+#define __align(x) __declspec(align(x))
+#else
+#define __align(x) __attribute__((aligned(x)))
+#define _aligned_malloc(x,y) memalign(y,x)
+#endif
+
+/* Test time and loops for unit test */
+#define TIME 40
+#define LOOP 30
+
+#endif /* #ifndef _COMMON_TYPEDEF_H_ */
+
-/*\r
- __ _____ _____ _____\r
- __| | __| | | | JSON for Modern C++\r
-| | |__ | | | | | | version 2.1.1\r
-|_____|_____|_____|_|___| https://github.com/nlohmann/json\r
-\r
-Licensed under the MIT License <http://opensource.org/licenses/MIT>.\r
-Copyright (c) 2013-2017 Niels Lohmann <http://nlohmann.me>.\r
-\r
-Permission is hereby granted, free of charge, to any person obtaining a copy\r
-of this software and associated documentation files (the "Software"), to deal\r
-in the Software without restriction, including without limitation the rights\r
-to use, copy, modify, merge, publish, distribute, sublicense, and/or sell\r
-copies of the Software, and to permit persons to whom the Software is\r
-furnished to do so, subject to the following conditions:\r
-\r
-The above copyright notice and this permission notice shall be included in all\r
-copies or substantial portions of the Software.\r
-\r
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,\r
-FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE\r
-AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER\r
-LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,\r
-OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE\r
-SOFTWARE.\r
-*/\r
-\r
-#ifndef NLOHMANN_JSON_HPP\r
-#define NLOHMANN_JSON_HPP\r
-\r
-#include <algorithm> // all_of, copy, fill, find, for_each, none_of, remove, reverse, transform\r
-#include <array> // array\r
-#include <cassert> // assert\r
-#include <cctype> // isdigit\r
-#include <ciso646> // and, not, or\r
-#include <cmath> // isfinite, labs, ldexp, signbit\r
-#include <cstddef> // nullptr_t, ptrdiff_t, size_t\r
-#include <cstdint> // int64_t, uint64_t\r
-#include <cstdlib> // abort, strtod, strtof, strtold, strtoul, strtoll, strtoull\r
-#include <cstring> // strlen\r
-#include <forward_list> // forward_list\r
-#include <functional> // function, hash, less\r
-#include <initializer_list> // initializer_list\r
-#include <iomanip> // setw\r
-#include <iostream> // istream, ostream\r
-#include <iterator> // advance, begin, back_inserter, bidirectional_iterator_tag, distance, end, inserter, iterator, iterator_traits, next, random_access_iterator_tag, reverse_iterator\r
-#include <limits> // numeric_limits\r
-#include <locale> // locale\r
-#include <map> // map\r
-#include <memory> // addressof, allocator, allocator_traits, unique_ptr\r
-#include <numeric> // accumulate\r
-#include <sstream> // stringstream\r
-#include <stdexcept> // domain_error, invalid_argument, out_of_range\r
-#include <string> // getline, stoi, string, to_string\r
-#include <type_traits> // add_pointer, conditional, decay, enable_if, false_type, integral_constant, is_arithmetic, is_base_of, is_const, is_constructible, is_convertible, is_default_constructible, is_enum, is_floating_point, is_integral, is_nothrow_move_assignable, is_nothrow_move_constructible, is_pointer, is_reference, is_same, is_scalar, is_signed, remove_const, remove_cv, remove_pointer, remove_reference, true_type, underlying_type\r
-#include <utility> // declval, forward, make_pair, move, pair, swap\r
-#include <vector> // vector\r
-\r
-// allow for portable deprecation warnings\r
-#if defined(__clang__) || defined(__GNUC__) || defined(__GNUG__)\r
- #define JSON_DEPRECATED __attribute__((deprecated))\r
-#elif defined(_MSC_VER)\r
- #define JSON_DEPRECATED __declspec(deprecated)\r
-#else\r
- #define JSON_DEPRECATED\r
-#endif\r
-\r
-// allow to disable exceptions\r
-#if not defined(JSON_NOEXCEPTION) || defined(__EXCEPTIONS)\r
- #define JSON_THROW(exception) throw exception\r
- #define JSON_TRY try\r
- #define JSON_CATCH(exception) catch(exception)\r
-#else\r
- #define JSON_THROW(exception) std::abort()\r
- #define JSON_TRY if(true)\r
- #define JSON_CATCH(exception) if(false)\r
-#endif\r
-\r
-/*!\r
-@brief namespace for Niels Lohmann\r
-@see https://github.com/nlohmann\r
-@since version 1.0.0\r
-*/\r
-namespace nlohmann\r
-{\r
-\r
-/*!\r
-@brief unnamed namespace with internal helper functions\r
-\r
-This namespace collects some functions that could not be defined inside the\r
-@ref basic_json class.\r
-\r
-@since version 2.1.0\r
-*/\r
-namespace detail\r
-{\r
-///////////////////////////\r
-// JSON type enumeration //\r
-///////////////////////////\r
-\r
-/*!\r
-@brief the JSON type enumeration\r
-\r
-This enumeration collects the different JSON types. It is internally used to\r
-distinguish the stored values, and the functions @ref basic_json::is_null(),\r
-@ref basic_json::is_object(), @ref basic_json::is_array(),\r
-@ref basic_json::is_string(), @ref basic_json::is_boolean(),\r
-@ref basic_json::is_number() (with @ref basic_json::is_number_integer(),\r
-@ref basic_json::is_number_unsigned(), and @ref basic_json::is_number_float()),\r
-@ref basic_json::is_discarded(), @ref basic_json::is_primitive(), and\r
-@ref basic_json::is_structured() rely on it.\r
-\r
-@note There are three enumeration entries (number_integer, number_unsigned, and\r
-number_float), because the library distinguishes these three types for numbers:\r
-@ref basic_json::number_unsigned_t is used for unsigned integers,\r
-@ref basic_json::number_integer_t is used for signed integers, and\r
-@ref basic_json::number_float_t is used for floating-point numbers or to\r
-approximate integers which do not fit in the limits of their respective type.\r
-\r
-@sa @ref basic_json::basic_json(const value_t value_type) -- create a JSON\r
-value with the default value for a given type\r
-\r
-@since version 1.0.0\r
-*/\r
-enum class value_t : uint8_t\r
-{\r
- null, ///< null value\r
- object, ///< object (unordered set of name/value pairs)\r
- array, ///< array (ordered collection of values)\r
- string, ///< string value\r
- boolean, ///< boolean value\r
- number_integer, ///< number value (signed integer)\r
- number_unsigned, ///< number value (unsigned integer)\r
- number_float, ///< number value (floating-point)\r
- discarded ///< discarded by the the parser callback function\r
-};\r
-\r
-/*!\r
-@brief comparison operator for JSON types\r
-\r
-Returns an ordering that is similar to Python:\r
-- order: null < boolean < number < object < array < string\r
-- furthermore, each type is not smaller than itself\r
-\r
-@since version 1.0.0\r
-*/\r
-inline bool operator<(const value_t lhs, const value_t rhs) noexcept\r
-{\r
- static constexpr std::array<uint8_t, 8> order = {{\r
- 0, // null\r
- 3, // object\r
- 4, // array\r
- 5, // string\r
- 1, // boolean\r
- 2, // integer\r
- 2, // unsigned\r
- 2, // float\r
- }\r
- };\r
-\r
- // discarded values are not comparable\r
- if (lhs == value_t::discarded or rhs == value_t::discarded)\r
- {\r
- return false;\r
- }\r
-\r
- return order[static_cast<std::size_t>(lhs)] <\r
- order[static_cast<std::size_t>(rhs)];\r
-}\r
-\r
-\r
-/////////////\r
-// helpers //\r
-/////////////\r
-\r
-// alias templates to reduce boilerplate\r
-template<bool B, typename T = void>\r
-using enable_if_t = typename std::enable_if<B, T>::type;\r
-\r
-template<typename T>\r
-using uncvref_t = typename std::remove_cv<typename std::remove_reference<T>::type>::type;\r
-\r
-// taken from http://stackoverflow.com/a/26936864/266378\r
-template<typename T>\r
-using is_unscoped_enum =\r
- std::integral_constant<bool, std::is_convertible<T, int>::value and\r
- std::is_enum<T>::value>;\r
-\r
-/*\r
-Implementation of two C++17 constructs: conjunction, negation. This is needed\r
-to avoid evaluating all the traits in a condition\r
-\r
-For example: not std::is_same<void, T>::value and has_value_type<T>::value\r
-will not compile when T = void (on MSVC at least). Whereas\r
-conjunction<negation<std::is_same<void, T>>, has_value_type<T>>::value will\r
-stop evaluating if negation<...>::value == false\r
-\r
-Please note that those constructs must be used with caution, since symbols can\r
-become very long quickly (which can slow down compilation and cause MSVC\r
-internal compiler errors). Only use it when you have to (see example ahead).\r
-*/\r
-template<class...> struct conjunction : std::true_type {};\r
-template<class B1> struct conjunction<B1> : B1 {};\r
-template<class B1, class... Bn>\r
-struct conjunction<B1, Bn...> : std::conditional<bool(B1::value), conjunction<Bn...>, B1>::type {};\r
-\r
-template<class B> struct negation : std::integral_constant < bool, !B::value > {};\r
-\r
-// dispatch utility (taken from ranges-v3)\r
-template<unsigned N> struct priority_tag : priority_tag < N - 1 > {};\r
-template<> struct priority_tag<0> {};\r
-\r
-\r
-//////////////////\r
-// constructors //\r
-//////////////////\r
-\r
-template<value_t> struct external_constructor;\r
-\r
-template<>\r
-struct external_constructor<value_t::boolean>\r
-{\r
- template<typename BasicJsonType>\r
- static void construct(BasicJsonType& j, typename BasicJsonType::boolean_t b) noexcept\r
- {\r
- j.m_type = value_t::boolean;\r
- j.m_value = b;\r
- j.assert_invariant();\r
- }\r
-};\r
-\r
-template<>\r
-struct external_constructor<value_t::string>\r
-{\r
- template<typename BasicJsonType>\r
- static void construct(BasicJsonType& j, const typename BasicJsonType::string_t& s)\r
- {\r
- j.m_type = value_t::string;\r
- j.m_value = s;\r
- j.assert_invariant();\r
- }\r
-};\r
-\r
-template<>\r
-struct external_constructor<value_t::number_float>\r
-{\r
- template<typename BasicJsonType>\r
- static void construct(BasicJsonType& j, typename BasicJsonType::number_float_t val) noexcept\r
- {\r
- // replace infinity and NAN by null\r
- if (not std::isfinite(val))\r
- {\r
- j = BasicJsonType{};\r
- }\r
- else\r
- {\r
- j.m_type = value_t::number_float;\r
- j.m_value = val;\r
- }\r
- j.assert_invariant();\r
- }\r
-};\r
-\r
-template<>\r
-struct external_constructor<value_t::number_unsigned>\r
-{\r
- template<typename BasicJsonType>\r
- static void construct(BasicJsonType& j, typename BasicJsonType::number_unsigned_t val) noexcept\r
- {\r
- j.m_type = value_t::number_unsigned;\r
- j.m_value = val;\r
- j.assert_invariant();\r
- }\r
-};\r
-\r
-template<>\r
-struct external_constructor<value_t::number_integer>\r
-{\r
- template<typename BasicJsonType>\r
- static void construct(BasicJsonType& j, typename BasicJsonType::number_integer_t val) noexcept\r
- {\r
- j.m_type = value_t::number_integer;\r
- j.m_value = val;\r
- j.assert_invariant();\r
- }\r
-};\r
-\r
-template<>\r
-struct external_constructor<value_t::array>\r
-{\r
- template<typename BasicJsonType>\r
- static void construct(BasicJsonType& j, const typename BasicJsonType::array_t& arr)\r
- {\r
- j.m_type = value_t::array;\r
- j.m_value = arr;\r
- j.assert_invariant();\r
- }\r
-\r
- template<typename BasicJsonType, typename CompatibleArrayType,\r
- enable_if_t<not std::is_same<CompatibleArrayType,\r
- typename BasicJsonType::array_t>::value,\r
- int> = 0>\r
- static void construct(BasicJsonType& j, const CompatibleArrayType& arr)\r
- {\r
- using std::begin;\r
- using std::end;\r
- j.m_type = value_t::array;\r
- j.m_value.array = j.template create<typename BasicJsonType::array_t>(begin(arr), end(arr));\r
- j.assert_invariant();\r
- }\r
-};\r
-\r
-template<>\r
-struct external_constructor<value_t::object>\r
-{\r
- template<typename BasicJsonType>\r
- static void construct(BasicJsonType& j, const typename BasicJsonType::object_t& obj)\r
- {\r
- j.m_type = value_t::object;\r
- j.m_value = obj;\r
- j.assert_invariant();\r
- }\r
-\r
- template<typename BasicJsonType, typename CompatibleObjectType,\r
- enable_if_t<not std::is_same<CompatibleObjectType,\r
- typename BasicJsonType::object_t>::value,\r
- int> = 0>\r
- static void construct(BasicJsonType& j, const CompatibleObjectType& obj)\r
- {\r
- using std::begin;\r
- using std::end;\r
-\r
- j.m_type = value_t::object;\r
- j.m_value.object = j.template create<typename BasicJsonType::object_t>(begin(obj), end(obj));\r
- j.assert_invariant();\r
- }\r
-};\r
-\r
-\r
-////////////////////////\r
-// has_/is_ functions //\r
-////////////////////////\r
-\r
-/*!\r
-@brief Helper to determine whether there's a key_type for T.\r
-\r
-This helper is used to tell associative containers apart from other containers\r
-such as sequence containers. For instance, `std::map` passes the test as it\r
-contains a `mapped_type`, whereas `std::vector` fails the test.\r
-\r
-@sa http://stackoverflow.com/a/7728728/266378\r
-@since version 1.0.0, overworked in version 2.0.6\r
-*/\r
-#define NLOHMANN_JSON_HAS_HELPER(type) \\r
- template<typename T> struct has_##type { \\r
- private: \\r
- template<typename U, typename = typename U::type> \\r
- static int detect(U &&); \\r
- static void detect(...); \\r
- public: \\r
- static constexpr bool value = \\r
- std::is_integral<decltype(detect(std::declval<T>()))>::value; \\r
- }\r
-\r
-NLOHMANN_JSON_HAS_HELPER(mapped_type);\r
-NLOHMANN_JSON_HAS_HELPER(key_type);\r
-NLOHMANN_JSON_HAS_HELPER(value_type);\r
-NLOHMANN_JSON_HAS_HELPER(iterator);\r
-\r
-#undef NLOHMANN_JSON_HAS_HELPER\r
-\r
-\r
-template<bool B, class RealType, class CompatibleObjectType>\r
-struct is_compatible_object_type_impl : std::false_type {};\r
-\r
-template<class RealType, class CompatibleObjectType>\r
-struct is_compatible_object_type_impl<true, RealType, CompatibleObjectType>\r
-{\r
- static constexpr auto value =\r
- std::is_constructible<typename RealType::key_type,\r
- typename CompatibleObjectType::key_type>::value and\r
- std::is_constructible<typename RealType::mapped_type,\r
- typename CompatibleObjectType::mapped_type>::value;\r
-};\r
-\r
-template<class BasicJsonType, class CompatibleObjectType>\r
-struct is_compatible_object_type\r
-{\r
- static auto constexpr value = is_compatible_object_type_impl <\r
- conjunction<negation<std::is_same<void, CompatibleObjectType>>,\r
- has_mapped_type<CompatibleObjectType>,\r
- has_key_type<CompatibleObjectType>>::value,\r
- typename BasicJsonType::object_t, CompatibleObjectType >::value;\r
-};\r
-\r
-template<typename BasicJsonType, typename T>\r
-struct is_basic_json_nested_type\r
-{\r
- static auto constexpr value = std::is_same<T, typename BasicJsonType::iterator>::value or\r
- std::is_same<T, typename BasicJsonType::const_iterator>::value or\r
- std::is_same<T, typename BasicJsonType::reverse_iterator>::value or\r
- std::is_same<T, typename BasicJsonType::const_reverse_iterator>::value or\r
- std::is_same<T, typename BasicJsonType::json_pointer>::value;\r
-};\r
-\r
-template<class BasicJsonType, class CompatibleArrayType>\r
-struct is_compatible_array_type\r
-{\r
- static auto constexpr value =\r
- conjunction<negation<std::is_same<void, CompatibleArrayType>>,\r
- negation<is_compatible_object_type<\r
- BasicJsonType, CompatibleArrayType>>,\r
- negation<std::is_constructible<typename BasicJsonType::string_t,\r
- CompatibleArrayType>>,\r
- negation<is_basic_json_nested_type<BasicJsonType, CompatibleArrayType>>,\r
- has_value_type<CompatibleArrayType>,\r
- has_iterator<CompatibleArrayType>>::value;\r
-};\r
-\r
-template<bool, typename, typename>\r
-struct is_compatible_integer_type_impl : std::false_type {};\r
-\r
-template<typename RealIntegerType, typename CompatibleNumberIntegerType>\r
-struct is_compatible_integer_type_impl<true, RealIntegerType, CompatibleNumberIntegerType>\r
-{\r
- // is there an assert somewhere on overflows?\r
- using RealLimits = std::numeric_limits<RealIntegerType>;\r
- using CompatibleLimits = std::numeric_limits<CompatibleNumberIntegerType>;\r
-\r
- static constexpr auto value =\r
- std::is_constructible<RealIntegerType,\r
- CompatibleNumberIntegerType>::value and\r
- CompatibleLimits::is_integer and\r
- RealLimits::is_signed == CompatibleLimits::is_signed;\r
-};\r
-\r
-template<typename RealIntegerType, typename CompatibleNumberIntegerType>\r
-struct is_compatible_integer_type\r
-{\r
- static constexpr auto value =\r
- is_compatible_integer_type_impl <\r
- std::is_integral<CompatibleNumberIntegerType>::value and\r
- not std::is_same<bool, CompatibleNumberIntegerType>::value,\r
- RealIntegerType, CompatibleNumberIntegerType > ::value;\r
-};\r
-\r
-\r
-// trait checking if JSONSerializer<T>::from_json(json const&, udt&) exists\r
-template<typename BasicJsonType, typename T>\r
-struct has_from_json\r
-{\r
- private:\r
- // also check the return type of from_json\r
- template<typename U, typename = enable_if_t<std::is_same<void, decltype(uncvref_t<U>::from_json(\r
- std::declval<BasicJsonType>(), std::declval<T&>()))>::value>>\r
- static int detect(U&&);\r
- static void detect(...);\r
-\r
- public:\r
- static constexpr bool value = std::is_integral<decltype(\r
- detect(std::declval<typename BasicJsonType::template json_serializer<T, void > >()))>::value;\r
-};\r
-\r
-// This trait checks if JSONSerializer<T>::from_json(json const&) exists\r
-// this overload is used for non-default-constructible user-defined-types\r
-template<typename BasicJsonType, typename T>\r
-struct has_non_default_from_json\r
-{\r
- private:\r
- template <\r
- typename U,\r
- typename = enable_if_t<std::is_same<\r
- T, decltype(uncvref_t<U>::from_json(std::declval<BasicJsonType>()))>::value >>\r
- static int detect(U&&);\r
- static void detect(...);\r
-\r
- public:\r
- static constexpr bool value = std::is_integral<decltype(detect(\r
- std::declval<typename BasicJsonType::template json_serializer<T, void> >()))>::value;\r
-};\r
-\r
-// This trait checks if BasicJsonType::json_serializer<T>::to_json exists\r
-template<typename BasicJsonType, typename T>\r
-struct has_to_json\r
-{\r
- private:\r
- template<typename U, typename = decltype(uncvref_t<U>::to_json(\r
- std::declval<BasicJsonType&>(), std::declval<T>()))>\r
- static int detect(U&&);\r
- static void detect(...);\r
-\r
- public:\r
- static constexpr bool value = std::is_integral<decltype(detect(\r
- std::declval<typename BasicJsonType::template json_serializer<T, void> >()))>::value;\r
-};\r
-\r
-\r
-/////////////\r
-// to_json //\r
-/////////////\r
-\r
-template<typename BasicJsonType, typename T, enable_if_t<\r
- std::is_same<T, typename BasicJsonType::boolean_t>::value, int> = 0>\r
-void to_json(BasicJsonType& j, T b) noexcept\r
-{\r
- external_constructor<value_t::boolean>::construct(j, b);\r
-}\r
-\r
-template<typename BasicJsonType, typename CompatibleString,\r
- enable_if_t<std::is_constructible<typename BasicJsonType::string_t,\r
- CompatibleString>::value, int> = 0>\r
-void to_json(BasicJsonType& j, const CompatibleString& s)\r
-{\r
- external_constructor<value_t::string>::construct(j, s);\r
-}\r
-\r
-template<typename BasicJsonType, typename FloatType,\r
- enable_if_t<std::is_floating_point<FloatType>::value, int> = 0>\r
-void to_json(BasicJsonType& j, FloatType val) noexcept\r
-{\r
- external_constructor<value_t::number_float>::construct(j, static_cast<typename BasicJsonType::number_float_t>(val));\r
-}\r
-\r
-template <\r
- typename BasicJsonType, typename CompatibleNumberUnsignedType,\r
- enable_if_t<is_compatible_integer_type<typename BasicJsonType::number_unsigned_t,\r
- CompatibleNumberUnsignedType>::value, int> = 0 >\r
-void to_json(BasicJsonType& j, CompatibleNumberUnsignedType val) noexcept\r
-{\r
- external_constructor<value_t::number_unsigned>::construct(j, static_cast<typename BasicJsonType::number_unsigned_t>(val));\r
-}\r
-\r
-template <\r
- typename BasicJsonType, typename CompatibleNumberIntegerType,\r
- enable_if_t<is_compatible_integer_type<typename BasicJsonType::number_integer_t,\r
- CompatibleNumberIntegerType>::value, int> = 0 >\r
-void to_json(BasicJsonType& j, CompatibleNumberIntegerType val) noexcept\r
-{\r
- external_constructor<value_t::number_integer>::construct(j, static_cast<typename BasicJsonType::number_integer_t>(val));\r
-}\r
-\r
-template<typename BasicJsonType, typename UnscopedEnumType,\r
- enable_if_t<is_unscoped_enum<UnscopedEnumType>::value, int> = 0>\r
-void to_json(BasicJsonType& j, UnscopedEnumType e) noexcept\r
-{\r
- external_constructor<value_t::number_integer>::construct(j, e);\r
-}\r
-\r
-template <\r
- typename BasicJsonType, typename CompatibleArrayType,\r
- enable_if_t <\r
- is_compatible_array_type<BasicJsonType, CompatibleArrayType>::value or\r
- std::is_same<typename BasicJsonType::array_t, CompatibleArrayType>::value,\r
- int > = 0 >\r
-void to_json(BasicJsonType& j, const CompatibleArrayType& arr)\r
-{\r
- external_constructor<value_t::array>::construct(j, arr);\r
-}\r
-\r
-template <\r
- typename BasicJsonType, typename CompatibleObjectType,\r
- enable_if_t<is_compatible_object_type<BasicJsonType, CompatibleObjectType>::value,\r
- int> = 0 >\r
-void to_json(BasicJsonType& j, const CompatibleObjectType& arr)\r
-{\r
- external_constructor<value_t::object>::construct(j, arr);\r
-}\r
-\r
-\r
-///////////////\r
-// from_json //\r
-///////////////\r
-\r
-// overloads for basic_json template parameters\r
-template<typename BasicJsonType, typename ArithmeticType,\r
- enable_if_t<std::is_arithmetic<ArithmeticType>::value and\r
- not std::is_same<ArithmeticType,\r
- typename BasicJsonType::boolean_t>::value,\r
- int> = 0>\r
-void get_arithmetic_value(const BasicJsonType& j, ArithmeticType& val)\r
-{\r
- switch (static_cast<value_t>(j))\r
- {\r
- case value_t::number_unsigned:\r
- {\r
- val = static_cast<ArithmeticType>(\r
- *j.template get_ptr<const typename BasicJsonType::number_unsigned_t*>());\r
- break;\r
- }\r
- case value_t::number_integer:\r
- {\r
- val = static_cast<ArithmeticType>(\r
- *j.template get_ptr<const typename BasicJsonType::number_integer_t*>());\r
- break;\r
- }\r
- case value_t::number_float:\r
- {\r
- val = static_cast<ArithmeticType>(\r
- *j.template get_ptr<const typename BasicJsonType::number_float_t*>());\r
- break;\r
- }\r
- default:\r
- {\r
- JSON_THROW(\r
- std::domain_error("type must be number, but is " + j.type_name()));\r
- }\r
- }\r
-}\r
-\r
-template<typename BasicJsonType>\r
-void from_json(const BasicJsonType& j, typename BasicJsonType::boolean_t& b)\r
-{\r
- if (not j.is_boolean())\r
- {\r
- JSON_THROW(std::domain_error("type must be boolean, but is " + j.type_name()));\r
- }\r
- b = *j.template get_ptr<const typename BasicJsonType::boolean_t*>();\r
-}\r
-\r
-template<typename BasicJsonType>\r
-void from_json(const BasicJsonType& j, typename BasicJsonType::string_t& s)\r
-{\r
- if (not j.is_string())\r
- {\r
- JSON_THROW(std::domain_error("type must be string, but is " + j.type_name()));\r
- }\r
- s = *j.template get_ptr<const typename BasicJsonType::string_t*>();\r
-}\r
-\r
-template<typename BasicJsonType>\r
-void from_json(const BasicJsonType& j, typename BasicJsonType::number_float_t& val)\r
-{\r
- get_arithmetic_value(j, val);\r
-}\r
-\r
-template<typename BasicJsonType>\r
-void from_json(const BasicJsonType& j, typename BasicJsonType::number_unsigned_t& val)\r
-{\r
- get_arithmetic_value(j, val);\r
-}\r
-\r
-template<typename BasicJsonType>\r
-void from_json(const BasicJsonType& j, typename BasicJsonType::number_integer_t& val)\r
-{\r
- get_arithmetic_value(j, val);\r
-}\r
-\r
-template<typename BasicJsonType, typename UnscopedEnumType,\r
- enable_if_t<is_unscoped_enum<UnscopedEnumType>::value, int> = 0>\r
-void from_json(const BasicJsonType& j, UnscopedEnumType& e)\r
-{\r
- typename std::underlying_type<UnscopedEnumType>::type val;\r
- get_arithmetic_value(j, val);\r
- e = static_cast<UnscopedEnumType>(val);\r
-}\r
-\r
-template<typename BasicJsonType>\r
-void from_json(const BasicJsonType& j, typename BasicJsonType::array_t& arr)\r
-{\r
- if (not j.is_array())\r
- {\r
- JSON_THROW(std::domain_error("type must be array, but is " + j.type_name()));\r
- }\r
- arr = *j.template get_ptr<const typename BasicJsonType::array_t*>();\r
-}\r
-\r
-// forward_list doesn't have an insert method\r
-template<typename BasicJsonType, typename T, typename Allocator>\r
-void from_json(const BasicJsonType& j, std::forward_list<T, Allocator>& l)\r
-{\r
- // do not perform the check when user wants to retrieve jsons\r
- // (except when it's null.. ?)\r
- if (j.is_null())\r
- {\r
- JSON_THROW(std::domain_error("type must be array, but is " + j.type_name()));\r
- }\r
- if (not std::is_same<T, BasicJsonType>::value)\r
- {\r
- if (not j.is_array())\r
- {\r
- JSON_THROW(std::domain_error("type must be array, but is " + j.type_name()));\r
- }\r
- }\r
- for (auto it = j.rbegin(), end = j.rend(); it != end; ++it)\r
- {\r
- l.push_front(it->template get<T>());\r
- }\r
-}\r
-\r
-template<typename BasicJsonType, typename CompatibleArrayType>\r
-void from_json_array_impl(const BasicJsonType& j, CompatibleArrayType& arr, priority_tag<0>)\r
-{\r
- using std::begin;\r
- using std::end;\r
-\r
- std::transform(j.begin(), j.end(),\r
- std::inserter(arr, end(arr)), [](const BasicJsonType & i)\r
- {\r
- // get<BasicJsonType>() returns *this, this won't call a from_json\r
- // method when value_type is BasicJsonType\r
- return i.template get<typename CompatibleArrayType::value_type>();\r
- });\r
-}\r
-\r
-template<typename BasicJsonType, typename CompatibleArrayType>\r
-auto from_json_array_impl(const BasicJsonType& j, CompatibleArrayType& arr, priority_tag<1>)\r
--> decltype(\r
- arr.reserve(std::declval<typename CompatibleArrayType::size_type>()),\r
- void())\r
-{\r
- using std::begin;\r
- using std::end;\r
-\r
- arr.reserve(j.size());\r
- std::transform(\r
- j.begin(), j.end(), std::inserter(arr, end(arr)), [](const BasicJsonType & i)\r
- {\r
- // get<BasicJsonType>() returns *this, this won't call a from_json\r
- // method when value_type is BasicJsonType\r
- return i.template get<typename CompatibleArrayType::value_type>();\r
- });\r
-}\r
-\r
-template<typename BasicJsonType, typename CompatibleArrayType,\r
- enable_if_t<is_compatible_array_type<BasicJsonType, CompatibleArrayType>::value and\r
- not std::is_same<typename BasicJsonType::array_t, CompatibleArrayType>::value, int> = 0>\r
-void from_json(const BasicJsonType& j, CompatibleArrayType& arr)\r
-{\r
- if (j.is_null())\r
- {\r
- JSON_THROW(std::domain_error("type must be array, but is " + j.type_name()));\r
- }\r
-\r
- // when T == BasicJsonType, do not check if value_t is correct\r
- if (not std::is_same<typename CompatibleArrayType::value_type, BasicJsonType>::value)\r
- {\r
- if (not j.is_array())\r
- {\r
- JSON_THROW(std::domain_error("type must be array, but is " + j.type_name()));\r
- }\r
- }\r
- from_json_array_impl(j, arr, priority_tag<1> {});\r
-}\r
-\r
-template<typename BasicJsonType, typename CompatibleObjectType,\r
- enable_if_t<is_compatible_object_type<BasicJsonType, CompatibleObjectType>::value, int> = 0>\r
-void from_json(const BasicJsonType& j, CompatibleObjectType& obj)\r
-{\r
- if (not j.is_object())\r
- {\r
- JSON_THROW(std::domain_error("type must be object, but is " + j.type_name()));\r
- }\r
-\r
- auto inner_object = j.template get_ptr<const typename BasicJsonType::object_t*>();\r
- using std::begin;\r
- using std::end;\r
- // we could avoid the assignment, but this might require a for loop, which\r
- // might be less efficient than the container constructor for some\r
- // containers (would it?)\r
- obj = CompatibleObjectType(begin(*inner_object), end(*inner_object));\r
-}\r
-\r
-// overload for arithmetic types, not chosen for basic_json template arguments\r
-// (BooleanType, etc..); note: Is it really necessary to provide explicit\r
-// overloads for boolean_t etc. in case of a custom BooleanType which is not\r
-// an arithmetic type?\r
-template<typename BasicJsonType, typename ArithmeticType,\r
- enable_if_t <\r
- std::is_arithmetic<ArithmeticType>::value and\r
- not std::is_same<ArithmeticType, typename BasicJsonType::number_unsigned_t>::value and\r
- not std::is_same<ArithmeticType, typename BasicJsonType::number_integer_t>::value and\r
- not std::is_same<ArithmeticType, typename BasicJsonType::number_float_t>::value and\r
- not std::is_same<ArithmeticType, typename BasicJsonType::boolean_t>::value,\r
- int> = 0>\r
-void from_json(const BasicJsonType& j, ArithmeticType& val)\r
-{\r
- switch (static_cast<value_t>(j))\r
- {\r
- case value_t::number_unsigned:\r
- {\r
- val = static_cast<ArithmeticType>(*j.template get_ptr<const typename BasicJsonType::number_unsigned_t*>());\r
- break;\r
- }\r
- case value_t::number_integer:\r
- {\r
- val = static_cast<ArithmeticType>(*j.template get_ptr<const typename BasicJsonType::number_integer_t*>());\r
- break;\r
- }\r
- case value_t::number_float:\r
- {\r
- val = static_cast<ArithmeticType>(*j.template get_ptr<const typename BasicJsonType::number_float_t*>());\r
- break;\r
- }\r
- case value_t::boolean:\r
- {\r
- val = static_cast<ArithmeticType>(*j.template get_ptr<const typename BasicJsonType::boolean_t*>());\r
- break;\r
- }\r
- default:\r
- {\r
- JSON_THROW(std::domain_error("type must be number, but is " + j.type_name()));\r
- }\r
- }\r
-}\r
-\r
-struct to_json_fn\r
-{\r
- private:\r
- template<typename BasicJsonType, typename T>\r
- auto call(BasicJsonType& j, T&& val, priority_tag<1>) const noexcept(noexcept(to_json(j, std::forward<T>(val))))\r
- -> decltype(to_json(j, std::forward<T>(val)), void())\r
- {\r
- return to_json(j, std::forward<T>(val));\r
- }\r
-\r
- template<typename BasicJsonType, typename T>\r
- void call(BasicJsonType&, T&&, priority_tag<0>) const noexcept\r
- {\r
- static_assert(sizeof(BasicJsonType) == 0,\r
- "could not find to_json() method in T's namespace");\r
- }\r
-\r
- public:\r
- template<typename BasicJsonType, typename T>\r
- void operator()(BasicJsonType& j, T&& val) const\r
- noexcept(noexcept(std::declval<to_json_fn>().call(j, std::forward<T>(val), priority_tag<1> {})))\r
- {\r
- return call(j, std::forward<T>(val), priority_tag<1> {});\r
- }\r
-};\r
-\r
-struct from_json_fn\r
-{\r
- private:\r
- template<typename BasicJsonType, typename T>\r
- auto call(const BasicJsonType& j, T& val, priority_tag<1>) const\r
- noexcept(noexcept(from_json(j, val)))\r
- -> decltype(from_json(j, val), void())\r
- {\r
- return from_json(j, val);\r
- }\r
-\r
- template<typename BasicJsonType, typename T>\r
- void call(const BasicJsonType&, T&, priority_tag<0>) const noexcept\r
- {\r
- static_assert(sizeof(BasicJsonType) == 0,\r
- "could not find from_json() method in T's namespace");\r
- }\r
-\r
- public:\r
- template<typename BasicJsonType, typename T>\r
- void operator()(const BasicJsonType& j, T& val) const\r
- noexcept(noexcept(std::declval<from_json_fn>().call(j, val, priority_tag<1> {})))\r
- {\r
- return call(j, val, priority_tag<1> {});\r
- }\r
-};\r
-\r
-// taken from ranges-v3\r
-template<typename T>\r
-struct static_const\r
-{\r
- static constexpr T value{};\r
-};\r
-\r
-template<typename T>\r
-constexpr T static_const<T>::value;\r
-} // namespace detail\r
-\r
-\r
-/// namespace to hold default `to_json` / `from_json` functions\r
-namespace\r
-{\r
-constexpr const auto& to_json = detail::static_const<detail::to_json_fn>::value;\r
-constexpr const auto& from_json = detail::static_const<detail::from_json_fn>::value;\r
-}\r
-\r
-\r
-/*!\r
-@brief default JSONSerializer template argument\r
-\r
-This serializer ignores the template arguments and uses ADL\r
-([argument-dependent lookup](http://en.cppreference.com/w/cpp/language/adl))\r
-for serialization.\r
-*/\r
-template<typename = void, typename = void>\r
-struct adl_serializer\r
-{\r
- /*!\r
- @brief convert a JSON value to any value type\r
-\r
- This function is usually called by the `get()` function of the\r
- @ref basic_json class (either explicit or via conversion operators).\r
-\r
- @param[in] j JSON value to read from\r
- @param[in,out] val value to write to\r
- */\r
- template<typename BasicJsonType, typename ValueType>\r
- static void from_json(BasicJsonType&& j, ValueType& val) noexcept(\r
- noexcept(::nlohmann::from_json(std::forward<BasicJsonType>(j), val)))\r
- {\r
- ::nlohmann::from_json(std::forward<BasicJsonType>(j), val);\r
- }\r
-\r
- /*!\r
- @brief convert any value type to a JSON value\r
-\r
- This function is usually called by the constructors of the @ref basic_json\r
- class.\r
-\r
- @param[in,out] j JSON value to write to\r
- @param[in] val value to read from\r
- */\r
- template<typename BasicJsonType, typename ValueType>\r
- static void to_json(BasicJsonType& j, ValueType&& val) noexcept(\r
- noexcept(::nlohmann::to_json(j, std::forward<ValueType>(val))))\r
- {\r
- ::nlohmann::to_json(j, std::forward<ValueType>(val));\r
- }\r
-};\r
-\r
-\r
-/*!\r
-@brief a class to store JSON values\r
-\r
-@tparam ObjectType type for JSON objects (`std::map` by default; will be used\r
-in @ref object_t)\r
-@tparam ArrayType type for JSON arrays (`std::vector` by default; will be used\r
-in @ref array_t)\r
-@tparam StringType type for JSON strings and object keys (`std::string` by\r
-default; will be used in @ref string_t)\r
-@tparam BooleanType type for JSON booleans (`bool` by default; will be used\r
-in @ref boolean_t)\r
-@tparam NumberIntegerType type for JSON integer numbers (`int64_t` by\r
-default; will be used in @ref number_integer_t)\r
-@tparam NumberUnsignedType type for JSON unsigned integer numbers (@c\r
-`uint64_t` by default; will be used in @ref number_unsigned_t)\r
-@tparam NumberFloatType type for JSON floating-point numbers (`double` by\r
-default; will be used in @ref number_float_t)\r
-@tparam AllocatorType type of the allocator to use (`std::allocator` by\r
-default)\r
-@tparam JSONSerializer the serializer to resolve internal calls to `to_json()`\r
-and `from_json()` (@ref adl_serializer by default)\r
-\r
-@requirement The class satisfies the following concept requirements:\r
-- Basic\r
- - [DefaultConstructible](http://en.cppreference.com/w/cpp/concept/DefaultConstructible):\r
- JSON values can be default constructed. The result will be a JSON null\r
- value.\r
- - [MoveConstructible](http://en.cppreference.com/w/cpp/concept/MoveConstructible):\r
- A JSON value can be constructed from an rvalue argument.\r
- - [CopyConstructible](http://en.cppreference.com/w/cpp/concept/CopyConstructible):\r
- A JSON value can be copy-constructed from an lvalue expression.\r
- - [MoveAssignable](http://en.cppreference.com/w/cpp/concept/MoveAssignable):\r
- A JSON value van be assigned from an rvalue argument.\r
- - [CopyAssignable](http://en.cppreference.com/w/cpp/concept/CopyAssignable):\r
- A JSON value can be copy-assigned from an lvalue expression.\r
- - [Destructible](http://en.cppreference.com/w/cpp/concept/Destructible):\r
- JSON values can be destructed.\r
-- Layout\r
- - [StandardLayoutType](http://en.cppreference.com/w/cpp/concept/StandardLayoutType):\r
- JSON values have\r
- [standard layout](http://en.cppreference.com/w/cpp/language/data_members#Standard_layout):\r
- All non-static data members are private and standard layout types, the\r
- class has no virtual functions or (virtual) base classes.\r
-- Library-wide\r
- - [EqualityComparable](http://en.cppreference.com/w/cpp/concept/EqualityComparable):\r
- JSON values can be compared with `==`, see @ref\r
- operator==(const_reference,const_reference).\r
- - [LessThanComparable](http://en.cppreference.com/w/cpp/concept/LessThanComparable):\r
- JSON values can be compared with `<`, see @ref\r
- operator<(const_reference,const_reference).\r
- - [Swappable](http://en.cppreference.com/w/cpp/concept/Swappable):\r
- Any JSON lvalue or rvalue of can be swapped with any lvalue or rvalue of\r
- other compatible types, using unqualified function call @ref swap().\r
- - [NullablePointer](http://en.cppreference.com/w/cpp/concept/NullablePointer):\r
- JSON values can be compared against `std::nullptr_t` objects which are used\r
- to model the `null` value.\r
-- Container\r
- - [Container](http://en.cppreference.com/w/cpp/concept/Container):\r
- JSON values can be used like STL containers and provide iterator access.\r
- - [ReversibleContainer](http://en.cppreference.com/w/cpp/concept/ReversibleContainer);\r
- JSON values can be used like STL containers and provide reverse iterator\r
- access.\r
-\r
-@invariant The member variables @a m_value and @a m_type have the following\r
-relationship:\r
-- If `m_type == value_t::object`, then `m_value.object != nullptr`.\r
-- If `m_type == value_t::array`, then `m_value.array != nullptr`.\r
-- If `m_type == value_t::string`, then `m_value.string != nullptr`.\r
-The invariants are checked by member function assert_invariant().\r
-\r
-@internal\r
-@note ObjectType trick from http://stackoverflow.com/a/9860911\r
-@endinternal\r
-\r
-@see [RFC 7159: The JavaScript Object Notation (JSON) Data Interchange\r
-Format](http://rfc7159.net/rfc7159)\r
-\r
-@since version 1.0.0\r
-\r
-@nosubgrouping\r
-*/\r
-template <\r
- template<typename U, typename V, typename... Args> class ObjectType = std::map,\r
- template<typename U, typename... Args> class ArrayType = std::vector,\r
- class StringType = std::string,\r
- class BooleanType = bool,\r
- class NumberIntegerType = std::int64_t,\r
- class NumberUnsignedType = std::uint64_t,\r
- class NumberFloatType = double,\r
- template<typename U> class AllocatorType = std::allocator,\r
- template<typename T, typename SFINAE = void> class JSONSerializer = adl_serializer\r
- >\r
-class basic_json\r
-{\r
- private:\r
- template<detail::value_t> friend struct detail::external_constructor;\r
- /// workaround type for MSVC\r
- using basic_json_t = basic_json<ObjectType, ArrayType, StringType,\r
- BooleanType, NumberIntegerType, NumberUnsignedType, NumberFloatType,\r
- AllocatorType, JSONSerializer>;\r
-\r
- public:\r
- using value_t = detail::value_t;\r
- // forward declarations\r
- template<typename U> class iter_impl;\r
- template<typename Base> class json_reverse_iterator;\r
- class json_pointer;\r
- template<typename T, typename SFINAE>\r
- using json_serializer = JSONSerializer<T, SFINAE>;\r
-\r
- /////////////////////\r
- // container types //\r
- /////////////////////\r
-\r
- /// @name container types\r
- /// The canonic container types to use @ref basic_json like any other STL\r
- /// container.\r
- /// @{\r
-\r
- /// the type of elements in a basic_json container\r
- using value_type = basic_json;\r
-\r
- /// the type of an element reference\r
- using reference = value_type&;\r
- /// the type of an element const reference\r
- using const_reference = const value_type&;\r
-\r
- /// a type to represent differences between iterators\r
- using difference_type = std::ptrdiff_t;\r
- /// a type to represent container sizes\r
- using size_type = std::size_t;\r
-\r
- /// the allocator type\r
- using allocator_type = AllocatorType<basic_json>;\r
-\r
- /// the type of an element pointer\r
- using pointer = typename std::allocator_traits<allocator_type>::pointer;\r
- /// the type of an element const pointer\r
- using const_pointer = typename std::allocator_traits<allocator_type>::const_pointer;\r
-\r
- /// an iterator for a basic_json container\r
- using iterator = iter_impl<basic_json>;\r
- /// a const iterator for a basic_json container\r
- using const_iterator = iter_impl<const basic_json>;\r
- /// a reverse iterator for a basic_json container\r
- using reverse_iterator = json_reverse_iterator<typename basic_json::iterator>;\r
- /// a const reverse iterator for a basic_json container\r
- using const_reverse_iterator = json_reverse_iterator<typename basic_json::const_iterator>;\r
-\r
- /// @}\r
-\r
-\r
- /*!\r
- @brief returns the allocator associated with the container\r
- */\r
- static allocator_type get_allocator()\r
- {\r
- return allocator_type();\r
- }\r
-\r
- /*!\r
- @brief returns version information on the library\r
-\r
- This function returns a JSON object with information about the library,\r
- including the version number and information on the platform and compiler.\r
-\r
- @return JSON object holding version information\r
- key | description\r
- ----------- | ---------------\r
- `compiler` | Information on the used compiler. It is an object with the following keys: `c++` (the used C++ standard), `family` (the compiler family; possible values are `clang`, `icc`, `gcc`, `ilecpp`, `msvc`, `pgcpp`, `sunpro`, and `unknown`), and `version` (the compiler version).\r
- `copyright` | The copyright line for the library as string.\r
- `name` | The name of the library as string.\r
- `platform` | The used platform as string. Possible values are `win32`, `linux`, `apple`, `unix`, and `unknown`.\r
- `url` | The URL of the project as string.\r
- `version` | The version of the library. It is an object with the following keys: `major`, `minor`, and `patch` as defined by [Semantic Versioning](http://semver.org), and `string` (the version string).\r
-\r
- @liveexample{The following code shows an example output of the `meta()`\r
- function.,meta}\r
-\r
- @complexity Constant.\r
-\r
- @since 2.1.0\r
- */\r
- static basic_json meta()\r
- {\r
- basic_json result;\r
-\r
- result["copyright"] = "(C) 2013-2017 Niels Lohmann";\r
- result["name"] = "JSON for Modern C++";\r
- result["url"] = "https://github.com/nlohmann/json";\r
- result["version"] =\r
- {\r
- {"string", "2.1.1"},\r
- {"major", 2},\r
- {"minor", 1},\r
- {"patch", 1}\r
- };\r
-\r
-#ifdef _WIN32\r
- result["platform"] = "win32";\r
-#elif defined __linux__\r
- result["platform"] = "linux";\r
-#elif defined __APPLE__\r
- result["platform"] = "apple";\r
-#elif defined __unix__\r
- result["platform"] = "unix";\r
-#else\r
- result["platform"] = "unknown";\r
-#endif\r
-\r
-#if defined(__clang__)\r
- result["compiler"] = {{"family", "clang"}, {"version", __clang_version__}};\r
-#elif defined(__ICC) || defined(__INTEL_COMPILER)\r
- result["compiler"] = {{"family", "icc"}, {"version", __INTEL_COMPILER}};\r
-#elif defined(__GNUC__) || defined(__GNUG__)\r
- result["compiler"] = {{"family", "gcc"}, {"version", std::to_string(__GNUC__) + "." + std::to_string(__GNUC_MINOR__) + "." + std::to_string(__GNUC_PATCHLEVEL__)}};\r
-#elif defined(__HP_cc) || defined(__HP_aCC)\r
- result["compiler"] = "hp"\r
-#elif defined(__IBMCPP__)\r
- result["compiler"] = {{"family", "ilecpp"}, {"version", __IBMCPP__}};\r
-#elif defined(_MSC_VER)\r
- result["compiler"] = {{"family", "msvc"}, {"version", _MSC_VER}};\r
-#elif defined(__PGI)\r
- result["compiler"] = {{"family", "pgcpp"}, {"version", __PGI}};\r
-#elif defined(__SUNPRO_CC)\r
- result["compiler"] = {{"family", "sunpro"}, {"version", __SUNPRO_CC}};\r
-#else\r
- result["compiler"] = {{"family", "unknown"}, {"version", "unknown"}};\r
-#endif\r
-\r
-#ifdef __cplusplus\r
- result["compiler"]["c++"] = std::to_string(__cplusplus);\r
-#else\r
- result["compiler"]["c++"] = "unknown";\r
-#endif\r
- return result;\r
- }\r
-\r
-\r
- ///////////////////////////\r
- // JSON value data types //\r
- ///////////////////////////\r
-\r
- /// @name JSON value data types\r
- /// The data types to store a JSON value. These types are derived from\r
- /// the template arguments passed to class @ref basic_json.\r
- /// @{\r
-\r
- /*!\r
- @brief a type for an object\r
-\r
- [RFC 7159](http://rfc7159.net/rfc7159) describes JSON objects as follows:\r
- > An object is an unordered collection of zero or more name/value pairs,\r
- > where a name is a string and a value is a string, number, boolean, null,\r
- > object, or array.\r
-\r
- To store objects in C++, a type is defined by the template parameters\r
- described below.\r
-\r
- @tparam ObjectType the container to store objects (e.g., `std::map` or\r
- `std::unordered_map`)\r
- @tparam StringType the type of the keys or names (e.g., `std::string`).\r
- The comparison function `std::less<StringType>` is used to order elements\r
- inside the container.\r
- @tparam AllocatorType the allocator to use for objects (e.g.,\r
- `std::allocator`)\r
-\r
- #### Default type\r
-\r
- With the default values for @a ObjectType (`std::map`), @a StringType\r
- (`std::string`), and @a AllocatorType (`std::allocator`), the default\r
- value for @a object_t is:\r
-\r
- @code {.cpp}\r
- std::map<\r
- std::string, // key_type\r
- basic_json, // value_type\r
- std::less<std::string>, // key_compare\r
- std::allocator<std::pair<const std::string, basic_json>> // allocator_type\r
- >\r
- @endcode\r
-\r
- #### Behavior\r
-\r
- The choice of @a object_t influences the behavior of the JSON class. With\r
- the default type, objects have the following behavior:\r
-\r
- - When all names are unique, objects will be interoperable in the sense\r
- that all software implementations receiving that object will agree on\r
- the name-value mappings.\r
- - When the names within an object are not unique, later stored name/value\r
- pairs overwrite previously stored name/value pairs, leaving the used\r
- names unique. For instance, `{"key": 1}` and `{"key": 2, "key": 1}` will\r
- be treated as equal and both stored as `{"key": 1}`.\r
- - Internally, name/value pairs are stored in lexicographical order of the\r
- names. Objects will also be serialized (see @ref dump) in this order.\r
- For instance, `{"b": 1, "a": 2}` and `{"a": 2, "b": 1}` will be stored\r
- and serialized as `{"a": 2, "b": 1}`.\r
- - When comparing objects, the order of the name/value pairs is irrelevant.\r
- This makes objects interoperable in the sense that they will not be\r
- affected by these differences. For instance, `{"b": 1, "a": 2}` and\r
- `{"a": 2, "b": 1}` will be treated as equal.\r
-\r
- #### Limits\r
-\r
- [RFC 7159](http://rfc7159.net/rfc7159) specifies:\r
- > An implementation may set limits on the maximum depth of nesting.\r
-\r
- In this class, the object's limit of nesting is not constraint explicitly.\r
- However, a maximum depth of nesting may be introduced by the compiler or\r
- runtime environment. A theoretical limit can be queried by calling the\r
- @ref max_size function of a JSON object.\r
-\r
- #### Storage\r
-\r
- Objects are stored as pointers in a @ref basic_json type. That is, for any\r
- access to object values, a pointer of type `object_t*` must be\r
- dereferenced.\r
-\r
- @sa @ref array_t -- type for an array value\r
-\r
- @since version 1.0.0\r
-\r
- @note The order name/value pairs are added to the object is *not*\r
- preserved by the library. Therefore, iterating an object may return\r
- name/value pairs in a different order than they were originally stored. In\r
- fact, keys will be traversed in alphabetical order as `std::map` with\r
- `std::less` is used by default. Please note this behavior conforms to [RFC\r
- 7159](http://rfc7159.net/rfc7159), because any order implements the\r
- specified "unordered" nature of JSON objects.\r
- */\r
- using object_t = ObjectType<StringType,\r
- basic_json,\r
- std::less<StringType>,\r
- AllocatorType<std::pair<const StringType,\r
- basic_json>>>;\r
-\r
- /*!\r
- @brief a type for an array\r
-\r
- [RFC 7159](http://rfc7159.net/rfc7159) describes JSON arrays as follows:\r
- > An array is an ordered sequence of zero or more values.\r
-\r
- To store objects in C++, a type is defined by the template parameters\r
- explained below.\r
-\r
- @tparam ArrayType container type to store arrays (e.g., `std::vector` or\r
- `std::list`)\r
- @tparam AllocatorType allocator to use for arrays (e.g., `std::allocator`)\r
-\r
- #### Default type\r
-\r
- With the default values for @a ArrayType (`std::vector`) and @a\r
- AllocatorType (`std::allocator`), the default value for @a array_t is:\r
-\r
- @code {.cpp}\r
- std::vector<\r
- basic_json, // value_type\r
- std::allocator<basic_json> // allocator_type\r
- >\r
- @endcode\r
-\r
- #### Limits\r
-\r
- [RFC 7159](http://rfc7159.net/rfc7159) specifies:\r
- > An implementation may set limits on the maximum depth of nesting.\r
-\r
- In this class, the array's limit of nesting is not constraint explicitly.\r
- However, a maximum depth of nesting may be introduced by the compiler or\r
- runtime environment. A theoretical limit can be queried by calling the\r
- @ref max_size function of a JSON array.\r
-\r
- #### Storage\r
-\r
- Arrays are stored as pointers in a @ref basic_json type. That is, for any\r
- access to array values, a pointer of type `array_t*` must be dereferenced.\r
-\r
- @sa @ref object_t -- type for an object value\r
-\r
- @since version 1.0.0\r
- */\r
- using array_t = ArrayType<basic_json, AllocatorType<basic_json>>;\r
-\r
- /*!\r
- @brief a type for a string\r
-\r
- [RFC 7159](http://rfc7159.net/rfc7159) describes JSON strings as follows:\r
- > A string is a sequence of zero or more Unicode characters.\r
-\r
- To store objects in C++, a type is defined by the template parameter\r
- described below. Unicode values are split by the JSON class into\r
- byte-sized characters during deserialization.\r
-\r
- @tparam StringType the container to store strings (e.g., `std::string`).\r
- Note this container is used for keys/names in objects, see @ref object_t.\r
-\r
- #### Default type\r
-\r
- With the default values for @a StringType (`std::string`), the default\r
- value for @a string_t is:\r
-\r
- @code {.cpp}\r
- std::string\r
- @endcode\r
-\r
- #### Encoding\r
-\r
- Strings are stored in UTF-8 encoding. Therefore, functions like\r
- `std::string::size()` or `std::string::length()` return the number of\r
- bytes in the string rather than the number of characters or glyphs.\r
-\r
- #### String comparison\r
-\r
- [RFC 7159](http://rfc7159.net/rfc7159) states:\r
- > Software implementations are typically required to test names of object\r
- > members for equality. Implementations that transform the textual\r
- > representation into sequences of Unicode code units and then perform the\r
- > comparison numerically, code unit by code unit, are interoperable in the\r
- > sense that implementations will agree in all cases on equality or\r
- > inequality of two strings. For example, implementations that compare\r
- > strings with escaped characters unconverted may incorrectly find that\r
- > `"a\\b"` and `"a\u005Cb"` are not equal.\r
-\r
- This implementation is interoperable as it does compare strings code unit\r
- by code unit.\r
-\r
- #### Storage\r
-\r
- String values are stored as pointers in a @ref basic_json type. That is,\r
- for any access to string values, a pointer of type `string_t*` must be\r
- dereferenced.\r
-\r
- @since version 1.0.0\r
- */\r
- using string_t = StringType;\r
-\r
- /*!\r
- @brief a type for a boolean\r
-\r
- [RFC 7159](http://rfc7159.net/rfc7159) implicitly describes a boolean as a\r
- type which differentiates the two literals `true` and `false`.\r
-\r
- To store objects in C++, a type is defined by the template parameter @a\r
- BooleanType which chooses the type to use.\r
-\r
- #### Default type\r
-\r
- With the default values for @a BooleanType (`bool`), the default value for\r
- @a boolean_t is:\r
-\r
- @code {.cpp}\r
- bool\r
- @endcode\r
-\r
- #### Storage\r
-\r
- Boolean values are stored directly inside a @ref basic_json type.\r
-\r
- @since version 1.0.0\r
- */\r
- using boolean_t = BooleanType;\r
-\r
- /*!\r
- @brief a type for a number (integer)\r
-\r
- [RFC 7159](http://rfc7159.net/rfc7159) describes numbers as follows:\r
- > The representation of numbers is similar to that used in most\r
- > programming languages. A number is represented in base 10 using decimal\r
- > digits. It contains an integer component that may be prefixed with an\r
- > optional minus sign, which may be followed by a fraction part and/or an\r
- > exponent part. Leading zeros are not allowed. (...) Numeric values that\r
- > cannot be represented in the grammar below (such as Infinity and NaN)\r
- > are not permitted.\r
-\r
- This description includes both integer and floating-point numbers.\r
- However, C++ allows more precise storage if it is known whether the number\r
- is a signed integer, an unsigned integer or a floating-point number.\r
- Therefore, three different types, @ref number_integer_t, @ref\r
- number_unsigned_t and @ref number_float_t are used.\r
-\r
- To store integer numbers in C++, a type is defined by the template\r
- parameter @a NumberIntegerType which chooses the type to use.\r
-\r
- #### Default type\r
-\r
- With the default values for @a NumberIntegerType (`int64_t`), the default\r
- value for @a number_integer_t is:\r
-\r
- @code {.cpp}\r
- int64_t\r
- @endcode\r
-\r
- #### Default behavior\r
-\r
- - The restrictions about leading zeros is not enforced in C++. Instead,\r
- leading zeros in integer literals lead to an interpretation as octal\r
- number. Internally, the value will be stored as decimal number. For\r
- instance, the C++ integer literal `010` will be serialized to `8`.\r
- During deserialization, leading zeros yield an error.\r
- - Not-a-number (NaN) values will be serialized to `null`.\r
-\r
- #### Limits\r
-\r
- [RFC 7159](http://rfc7159.net/rfc7159) specifies:\r
- > An implementation may set limits on the range and precision of numbers.\r
-\r
- When the default type is used, the maximal integer number that can be\r
- stored is `9223372036854775807` (INT64_MAX) and the minimal integer number\r
- that can be stored is `-9223372036854775808` (INT64_MIN). Integer numbers\r
- that are out of range will yield over/underflow when used in a\r
- constructor. During deserialization, too large or small integer numbers\r
- will be automatically be stored as @ref number_unsigned_t or @ref\r
- number_float_t.\r
-\r
- [RFC 7159](http://rfc7159.net/rfc7159) further states:\r
- > Note that when such software is used, numbers that are integers and are\r
- > in the range \f$[-2^{53}+1, 2^{53}-1]\f$ are interoperable in the sense\r
- > that implementations will agree exactly on their numeric values.\r
-\r
- As this range is a subrange of the exactly supported range [INT64_MIN,\r
- INT64_MAX], this class's integer type is interoperable.\r
-\r
- #### Storage\r
-\r
- Integer number values are stored directly inside a @ref basic_json type.\r
-\r
- @sa @ref number_float_t -- type for number values (floating-point)\r
-\r
- @sa @ref number_unsigned_t -- type for number values (unsigned integer)\r
-\r
- @since version 1.0.0\r
- */\r
- using number_integer_t = NumberIntegerType;\r
-\r
- /*!\r
- @brief a type for a number (unsigned)\r
-\r
- [RFC 7159](http://rfc7159.net/rfc7159) describes numbers as follows:\r
- > The representation of numbers is similar to that used in most\r
- > programming languages. A number is represented in base 10 using decimal\r
- > digits. It contains an integer component that may be prefixed with an\r
- > optional minus sign, which may be followed by a fraction part and/or an\r
- > exponent part. Leading zeros are not allowed. (...) Numeric values that\r
- > cannot be represented in the grammar below (such as Infinity and NaN)\r
- > are not permitted.\r
-\r
- This description includes both integer and floating-point numbers.\r
- However, C++ allows more precise storage if it is known whether the number\r
- is a signed integer, an unsigned integer or a floating-point number.\r
- Therefore, three different types, @ref number_integer_t, @ref\r
- number_unsigned_t and @ref number_float_t are used.\r
-\r
- To store unsigned integer numbers in C++, a type is defined by the\r
- template parameter @a NumberUnsignedType which chooses the type to use.\r
-\r
- #### Default type\r
-\r
- With the default values for @a NumberUnsignedType (`uint64_t`), the\r
- default value for @a number_unsigned_t is:\r
-\r
- @code {.cpp}\r
- uint64_t\r
- @endcode\r
-\r
- #### Default behavior\r
-\r
- - The restrictions about leading zeros is not enforced in C++. Instead,\r
- leading zeros in integer literals lead to an interpretation as octal\r
- number. Internally, the value will be stored as decimal number. For\r
- instance, the C++ integer literal `010` will be serialized to `8`.\r
- During deserialization, leading zeros yield an error.\r
- - Not-a-number (NaN) values will be serialized to `null`.\r
-\r
- #### Limits\r
-\r
- [RFC 7159](http://rfc7159.net/rfc7159) specifies:\r
- > An implementation may set limits on the range and precision of numbers.\r
-\r
- When the default type is used, the maximal integer number that can be\r
- stored is `18446744073709551615` (UINT64_MAX) and the minimal integer\r
- number that can be stored is `0`. Integer numbers that are out of range\r
- will yield over/underflow when used in a constructor. During\r
- deserialization, too large or small integer numbers will be automatically\r
- be stored as @ref number_integer_t or @ref number_float_t.\r
-\r
- [RFC 7159](http://rfc7159.net/rfc7159) further states:\r
- > Note that when such software is used, numbers that are integers and are\r
- > in the range \f$[-2^{53}+1, 2^{53}-1]\f$ are interoperable in the sense\r
- > that implementations will agree exactly on their numeric values.\r
-\r
- As this range is a subrange (when considered in conjunction with the\r
- number_integer_t type) of the exactly supported range [0, UINT64_MAX],\r
- this class's integer type is interoperable.\r
-\r
- #### Storage\r
-\r
- Integer number values are stored directly inside a @ref basic_json type.\r
-\r
- @sa @ref number_float_t -- type for number values (floating-point)\r
- @sa @ref number_integer_t -- type for number values (integer)\r
-\r
- @since version 2.0.0\r
- */\r
- using number_unsigned_t = NumberUnsignedType;\r
-\r
- /*!\r
- @brief a type for a number (floating-point)\r
-\r
- [RFC 7159](http://rfc7159.net/rfc7159) describes numbers as follows:\r
- > The representation of numbers is similar to that used in most\r
- > programming languages. A number is represented in base 10 using decimal\r
- > digits. It contains an integer component that may be prefixed with an\r
- > optional minus sign, which may be followed by a fraction part and/or an\r
- > exponent part. Leading zeros are not allowed. (...) Numeric values that\r
- > cannot be represented in the grammar below (such as Infinity and NaN)\r
- > are not permitted.\r
-\r
- This description includes both integer and floating-point numbers.\r
- However, C++ allows more precise storage if it is known whether the number\r
- is a signed integer, an unsigned integer or a floating-point number.\r
- Therefore, three different types, @ref number_integer_t, @ref\r
- number_unsigned_t and @ref number_float_t are used.\r
-\r
- To store floating-point numbers in C++, a type is defined by the template\r
- parameter @a NumberFloatType which chooses the type to use.\r
-\r
- #### Default type\r
-\r
- With the default values for @a NumberFloatType (`double`), the default\r
- value for @a number_float_t is:\r
-\r
- @code {.cpp}\r
- double\r
- @endcode\r
-\r
- #### Default behavior\r
-\r
- - The restrictions about leading zeros is not enforced in C++. Instead,\r
- leading zeros in floating-point literals will be ignored. Internally,\r
- the value will be stored as decimal number. For instance, the C++\r
- floating-point literal `01.2` will be serialized to `1.2`. During\r
- deserialization, leading zeros yield an error.\r
- - Not-a-number (NaN) values will be serialized to `null`.\r
-\r
- #### Limits\r
-\r
- [RFC 7159](http://rfc7159.net/rfc7159) states:\r
- > This specification allows implementations to set limits on the range and\r
- > precision of numbers accepted. Since software that implements IEEE\r
- > 754-2008 binary64 (double precision) numbers is generally available and\r
- > widely used, good interoperability can be achieved by implementations\r
- > that expect no more precision or range than these provide, in the sense\r
- > that implementations will approximate JSON numbers within the expected\r
- > precision.\r
-\r
- This implementation does exactly follow this approach, as it uses double\r
- precision floating-point numbers. Note values smaller than\r
- `-1.79769313486232e+308` and values greater than `1.79769313486232e+308`\r
- will be stored as NaN internally and be serialized to `null`.\r
-\r
- #### Storage\r
-\r
- Floating-point number values are stored directly inside a @ref basic_json\r
- type.\r
-\r
- @sa @ref number_integer_t -- type for number values (integer)\r
-\r
- @sa @ref number_unsigned_t -- type for number values (unsigned integer)\r
-\r
- @since version 1.0.0\r
- */\r
- using number_float_t = NumberFloatType;\r
-\r
- /// @}\r
-\r
- private:\r
-\r
- /// helper for exception-safe object creation\r
- template<typename T, typename... Args>\r
- static T* create(Args&& ... args)\r
- {\r
- AllocatorType<T> alloc;\r
- auto deleter = [&](T * object)\r
- {\r
- alloc.deallocate(object, 1);\r
- };\r
- std::unique_ptr<T, decltype(deleter)> object(alloc.allocate(1), deleter);\r
- alloc.construct(object.get(), std::forward<Args>(args)...);\r
- assert(object != nullptr);\r
- return object.release();\r
- }\r
-\r
- ////////////////////////\r
- // JSON value storage //\r
- ////////////////////////\r
-\r
- /*!\r
- @brief a JSON value\r
-\r
- The actual storage for a JSON value of the @ref basic_json class. This\r
- union combines the different storage types for the JSON value types\r
- defined in @ref value_t.\r
-\r
- JSON type | value_t type | used type\r
- --------- | --------------- | ------------------------\r
- object | object | pointer to @ref object_t\r
- array | array | pointer to @ref array_t\r
- string | string | pointer to @ref string_t\r
- boolean | boolean | @ref boolean_t\r
- number | number_integer | @ref number_integer_t\r
- number | number_unsigned | @ref number_unsigned_t\r
- number | number_float | @ref number_float_t\r
- null | null | *no value is stored*\r
-\r
- @note Variable-length types (objects, arrays, and strings) are stored as\r
- pointers. The size of the union should not exceed 64 bits if the default\r
- value types are used.\r
-\r
- @since version 1.0.0\r
- */\r
- union json_value\r
- {\r
- /// object (stored with pointer to save storage)\r
- object_t* object;\r
- /// array (stored with pointer to save storage)\r
- array_t* array;\r
- /// string (stored with pointer to save storage)\r
- string_t* string;\r
- /// boolean\r
- boolean_t boolean;\r
- /// number (integer)\r
- number_integer_t number_integer;\r
- /// number (unsigned integer)\r
- number_unsigned_t number_unsigned;\r
- /// number (floating-point)\r
- number_float_t number_float;\r
-\r
- /// default constructor (for null values)\r
- json_value() = default;\r
- /// constructor for booleans\r
- json_value(boolean_t v) noexcept : boolean(v) {}\r
- /// constructor for numbers (integer)\r
- json_value(number_integer_t v) noexcept : number_integer(v) {}\r
- /// constructor for numbers (unsigned)\r
- json_value(number_unsigned_t v) noexcept : number_unsigned(v) {}\r
- /// constructor for numbers (floating-point)\r
- json_value(number_float_t v) noexcept : number_float(v) {}\r
- /// constructor for empty values of a given type\r
- json_value(value_t t)\r
- {\r
- switch (t)\r
- {\r
- case value_t::object:\r
- {\r
- object = create<object_t>();\r
- break;\r
- }\r
-\r
- case value_t::array:\r
- {\r
- array = create<array_t>();\r
- break;\r
- }\r
-\r
- case value_t::string:\r
- {\r
- string = create<string_t>("");\r
- break;\r
- }\r
-\r
- case value_t::boolean:\r
- {\r
- boolean = boolean_t(false);\r
- break;\r
- }\r
-\r
- case value_t::number_integer:\r
- {\r
- number_integer = number_integer_t(0);\r
- break;\r
- }\r
-\r
- case value_t::number_unsigned:\r
- {\r
- number_unsigned = number_unsigned_t(0);\r
- break;\r
- }\r
-\r
- case value_t::number_float:\r
- {\r
- number_float = number_float_t(0.0);\r
- break;\r
- }\r
-\r
- case value_t::null:\r
- {\r
- break;\r
- }\r
-\r
- default:\r
- {\r
- if (t == value_t::null)\r
- {\r
- JSON_THROW(std::domain_error("961c151d2e87f2686a955a9be24d316f1362bf21 2.1.1")); // LCOV_EXCL_LINE\r
- }\r
- break;\r
- }\r
- }\r
- }\r
-\r
- /// constructor for strings\r
- json_value(const string_t& value)\r
- {\r
- string = create<string_t>(value);\r
- }\r
-\r
- /// constructor for objects\r
- json_value(const object_t& value)\r
- {\r
- object = create<object_t>(value);\r
- }\r
-\r
- /// constructor for arrays\r
- json_value(const array_t& value)\r
- {\r
- array = create<array_t>(value);\r
- }\r
- };\r
-\r
- /*!\r
- @brief checks the class invariants\r
-\r
- This function asserts the class invariants. It needs to be called at the\r
- end of every constructor to make sure that created objects respect the\r
- invariant. Furthermore, it has to be called each time the type of a JSON\r
- value is changed, because the invariant expresses a relationship between\r
- @a m_type and @a m_value.\r
- */\r
- void assert_invariant() const\r
- {\r
- assert(m_type != value_t::object or m_value.object != nullptr);\r
- assert(m_type != value_t::array or m_value.array != nullptr);\r
- assert(m_type != value_t::string or m_value.string != nullptr);\r
- }\r
-\r
- public:\r
- //////////////////////////\r
- // JSON parser callback //\r
- //////////////////////////\r
-\r
- /*!\r
- @brief JSON callback events\r
-\r
- This enumeration lists the parser events that can trigger calling a\r
- callback function of type @ref parser_callback_t during parsing.\r
-\r
- @image html callback_events.png "Example when certain parse events are triggered"\r
-\r
- @since version 1.0.0\r
- */\r
- enum class parse_event_t : uint8_t\r
- {\r
- /// the parser read `{` and started to process a JSON object\r
- object_start,\r
- /// the parser read `}` and finished processing a JSON object\r
- object_end,\r
- /// the parser read `[` and started to process a JSON array\r
- array_start,\r
- /// the parser read `]` and finished processing a JSON array\r
- array_end,\r
- /// the parser read a key of a value in an object\r
- key,\r
- /// the parser finished reading a JSON value\r
- value\r
- };\r
-\r
- /*!\r
- @brief per-element parser callback type\r
-\r
- With a parser callback function, the result of parsing a JSON text can be\r
- influenced. When passed to @ref parse(std::istream&, const\r
- parser_callback_t) or @ref parse(const CharT, const parser_callback_t),\r
- it is called on certain events (passed as @ref parse_event_t via parameter\r
- @a event) with a set recursion depth @a depth and context JSON value\r
- @a parsed. The return value of the callback function is a boolean\r
- indicating whether the element that emitted the callback shall be kept or\r
- not.\r
-\r
- We distinguish six scenarios (determined by the event type) in which the\r
- callback function can be called. The following table describes the values\r
- of the parameters @a depth, @a event, and @a parsed.\r
-\r
- parameter @a event | description | parameter @a depth | parameter @a parsed\r
- ------------------ | ----------- | ------------------ | -------------------\r
- parse_event_t::object_start | the parser read `{` and started to process a JSON object | depth of the parent of the JSON object | a JSON value with type discarded\r
- parse_event_t::key | the parser read a key of a value in an object | depth of the currently parsed JSON object | a JSON string containing the key\r
- parse_event_t::object_end | the parser read `}` and finished processing a JSON object | depth of the parent of the JSON object | the parsed JSON object\r
- parse_event_t::array_start | the parser read `[` and started to process a JSON array | depth of the parent of the JSON array | a JSON value with type discarded\r
- parse_event_t::array_end | the parser read `]` and finished processing a JSON array | depth of the parent of the JSON array | the parsed JSON array\r
- parse_event_t::value | the parser finished reading a JSON value | depth of the value | the parsed JSON value\r
-\r
- @image html callback_events.png "Example when certain parse events are triggered"\r
-\r
- Discarding a value (i.e., returning `false`) has different effects\r
- depending on the context in which function was called:\r
-\r
- - Discarded values in structured types are skipped. That is, the parser\r
- will behave as if the discarded value was never read.\r
- - In case a value outside a structured type is skipped, it is replaced\r
- with `null`. This case happens if the top-level element is skipped.\r
-\r
- @param[in] depth the depth of the recursion during parsing\r
-\r
- @param[in] event an event of type parse_event_t indicating the context in\r
- the callback function has been called\r
-\r
- @param[in,out] parsed the current intermediate parse result; note that\r
- writing to this value has no effect for parse_event_t::key events\r
-\r
- @return Whether the JSON value which called the function during parsing\r
- should be kept (`true`) or not (`false`). In the latter case, it is either\r
- skipped completely or replaced by an empty discarded object.\r
-\r
- @sa @ref parse(std::istream&, parser_callback_t) or\r
- @ref parse(const CharT, const parser_callback_t) for examples\r
-\r
- @since version 1.0.0\r
- */\r
- using parser_callback_t = std::function<bool(int depth,\r
- parse_event_t event,\r
- basic_json& parsed)>;\r
-\r
-\r
- //////////////////\r
- // constructors //\r
- //////////////////\r
-\r
- /// @name constructors and destructors\r
- /// Constructors of class @ref basic_json, copy/move constructor, copy\r
- /// assignment, static functions creating objects, and the destructor.\r
- /// @{\r
-\r
- /*!\r
- @brief create an empty value with a given type\r
-\r
- Create an empty JSON value with a given type. The value will be default\r
- initialized with an empty value which depends on the type:\r
-\r
- Value type | initial value\r
- ----------- | -------------\r
- null | `null`\r
- boolean | `false`\r
- string | `""`\r
- number | `0`\r
- object | `{}`\r
- array | `[]`\r
-\r
- @param[in] value_type the type of the value to create\r
-\r
- @complexity Constant.\r
-\r
- @throw std::bad_alloc if allocation for object, array, or string value\r
- fails\r
-\r
- @liveexample{The following code shows the constructor for different @ref\r
- value_t values,basic_json__value_t}\r
-\r
- @since version 1.0.0\r
- */\r
- basic_json(const value_t value_type)\r
- : m_type(value_type), m_value(value_type)\r
- {\r
- assert_invariant();\r
- }\r
-\r
- /*!\r
- @brief create a null object\r
-\r
- Create a `null` JSON value. It either takes a null pointer as parameter\r
- (explicitly creating `null`) or no parameter (implicitly creating `null`).\r
- The passed null pointer itself is not read -- it is only used to choose\r
- the right constructor.\r
-\r
- @complexity Constant.\r
-\r
- @exceptionsafety No-throw guarantee: this constructor never throws\r
- exceptions.\r
-\r
- @liveexample{The following code shows the constructor with and without a\r
- null pointer parameter.,basic_json__nullptr_t}\r
-\r
- @since version 1.0.0\r
- */\r
- basic_json(std::nullptr_t = nullptr) noexcept\r
- : basic_json(value_t::null)\r
- {\r
- assert_invariant();\r
- }\r
-\r
- /*!\r
- @brief create a JSON value\r
-\r
- This is a "catch all" constructor for all compatible JSON types; that is,\r
- types for which a `to_json()` method exsits. The constructor forwards the\r
- parameter @a val to that method (to `json_serializer<U>::to_json` method\r
- with `U = uncvref_t<CompatibleType>`, to be exact).\r
-\r
- Template type @a CompatibleType includes, but is not limited to, the\r
- following types:\r
- - **arrays**: @ref array_t and all kinds of compatible containers such as\r
- `std::vector`, `std::deque`, `std::list`, `std::forward_list`,\r
- `std::array`, `std::set`, `std::unordered_set`, `std::multiset`, and\r
- `unordered_multiset` with a `value_type` from which a @ref basic_json\r
- value can be constructed.\r
- - **objects**: @ref object_t and all kinds of compatible associative\r
- containers such as `std::map`, `std::unordered_map`, `std::multimap`,\r
- and `std::unordered_multimap` with a `key_type` compatible to\r
- @ref string_t and a `value_type` from which a @ref basic_json value can\r
- be constructed.\r
- - **strings**: @ref string_t, string literals, and all compatible string\r
- containers can be used.\r
- - **numbers**: @ref number_integer_t, @ref number_unsigned_t,\r
- @ref number_float_t, and all convertible number types such as `int`,\r
- `size_t`, `int64_t`, `float` or `double` can be used.\r
- - **boolean**: @ref boolean_t / `bool` can be used.\r
-\r
- See the examples below.\r
-\r
- @tparam CompatibleType a type such that:\r
- - @a CompatibleType is not derived from `std::istream`,\r
- - @a CompatibleType is not @ref basic_json (to avoid hijacking copy/move\r
- constructors),\r
- - @a CompatibleType is not a @ref basic_json nested type (e.g.,\r
- @ref json_pointer, @ref iterator, etc ...)\r
- - @ref @ref json_serializer<U> has a\r
- `to_json(basic_json_t&, CompatibleType&&)` method\r
-\r
- @tparam U = `uncvref_t<CompatibleType>`\r
-\r
- @param[in] val the value to be forwarded\r
-\r
- @complexity Usually linear in the size of the passed @a val, also\r
- depending on the implementation of the called `to_json()`\r
- method.\r
-\r
- @throw what `json_serializer<U>::to_json()` throws\r
-\r
- @liveexample{The following code shows the constructor with several\r
- compatible types.,basic_json__CompatibleType}\r
-\r
- @since version 2.1.0\r
- */\r
- template<typename CompatibleType, typename U = detail::uncvref_t<CompatibleType>,\r
- detail::enable_if_t<not std::is_base_of<std::istream, U>::value and\r
- not std::is_same<U, basic_json_t>::value and\r
- not detail::is_basic_json_nested_type<\r
- basic_json_t, U>::value and\r
- detail::has_to_json<basic_json, U>::value,\r
- int> = 0>\r
- basic_json(CompatibleType && val) noexcept(noexcept(JSONSerializer<U>::to_json(\r
- std::declval<basic_json_t&>(), std::forward<CompatibleType>(val))))\r
- {\r
- JSONSerializer<U>::to_json(*this, std::forward<CompatibleType>(val));\r
- assert_invariant();\r
- }\r
-\r
- /*!\r
- @brief create a container (array or object) from an initializer list\r
-\r
- Creates a JSON value of type array or object from the passed initializer\r
- list @a init. In case @a type_deduction is `true` (default), the type of\r
- the JSON value to be created is deducted from the initializer list @a init\r
- according to the following rules:\r
-\r
- 1. If the list is empty, an empty JSON object value `{}` is created.\r
- 2. If the list consists of pairs whose first element is a string, a JSON\r
- object value is created where the first elements of the pairs are\r
- treated as keys and the second elements are as values.\r
- 3. In all other cases, an array is created.\r
-\r
- The rules aim to create the best fit between a C++ initializer list and\r
- JSON values. The rationale is as follows:\r
-\r
- 1. The empty initializer list is written as `{}` which is exactly an empty\r
- JSON object.\r
- 2. C++ has now way of describing mapped types other than to list a list of\r
- pairs. As JSON requires that keys must be of type string, rule 2 is the\r
- weakest constraint one can pose on initializer lists to interpret them\r
- as an object.\r
- 3. In all other cases, the initializer list could not be interpreted as\r
- JSON object type, so interpreting it as JSON array type is safe.\r
-\r
- With the rules described above, the following JSON values cannot be\r
- expressed by an initializer list:\r
-\r
- - the empty array (`[]`): use @ref array(std::initializer_list<basic_json>)\r
- with an empty initializer list in this case\r
- - arrays whose elements satisfy rule 2: use @ref\r
- array(std::initializer_list<basic_json>) with the same initializer list\r
- in this case\r
-\r
- @note When used without parentheses around an empty initializer list, @ref\r
- basic_json() is called instead of this function, yielding the JSON null\r
- value.\r
-\r
- @param[in] init initializer list with JSON values\r
-\r
- @param[in] type_deduction internal parameter; when set to `true`, the type\r
- of the JSON value is deducted from the initializer list @a init; when set\r
- to `false`, the type provided via @a manual_type is forced. This mode is\r
- used by the functions @ref array(std::initializer_list<basic_json>) and\r
- @ref object(std::initializer_list<basic_json>).\r
-\r
- @param[in] manual_type internal parameter; when @a type_deduction is set\r
- to `false`, the created JSON value will use the provided type (only @ref\r
- value_t::array and @ref value_t::object are valid); when @a type_deduction\r
- is set to `true`, this parameter has no effect\r
-\r
- @throw std::domain_error if @a type_deduction is `false`, @a manual_type\r
- is `value_t::object`, but @a init contains an element which is not a pair\r
- whose first element is a string; example: `"cannot create object from\r
- initializer list"`\r
-\r
- @complexity Linear in the size of the initializer list @a init.\r
-\r
- @liveexample{The example below shows how JSON values are created from\r
- initializer lists.,basic_json__list_init_t}\r
-\r
- @sa @ref array(std::initializer_list<basic_json>) -- create a JSON array\r
- value from an initializer list\r
- @sa @ref object(std::initializer_list<basic_json>) -- create a JSON object\r
- value from an initializer list\r
-\r
- @since version 1.0.0\r
- */\r
- basic_json(std::initializer_list<basic_json> init,\r
- bool type_deduction = true,\r
- value_t manual_type = value_t::array)\r
- {\r
- // check if each element is an array with two elements whose first\r
- // element is a string\r
- bool is_an_object = std::all_of(init.begin(), init.end(),\r
- [](const basic_json & element)\r
- {\r
- return element.is_array() and element.size() == 2 and element[0].is_string();\r
- });\r
-\r
- // adjust type if type deduction is not wanted\r
- if (not type_deduction)\r
- {\r
- // if array is wanted, do not create an object though possible\r
- if (manual_type == value_t::array)\r
- {\r
- is_an_object = false;\r
- }\r
-\r
- // if object is wanted but impossible, throw an exception\r
- if (manual_type == value_t::object and not is_an_object)\r
- {\r
- JSON_THROW(std::domain_error("cannot create object from initializer list"));\r
- }\r
- }\r
-\r
- if (is_an_object)\r
- {\r
- // the initializer list is a list of pairs -> create object\r
- m_type = value_t::object;\r
- m_value = value_t::object;\r
-\r
- std::for_each(init.begin(), init.end(), [this](const basic_json & element)\r
- {\r
- m_value.object->emplace(*(element[0].m_value.string), element[1]);\r
- });\r
- }\r
- else\r
- {\r
- // the initializer list describes an array -> create array\r
- m_type = value_t::array;\r
- m_value.array = create<array_t>(init);\r
- }\r
-\r
- assert_invariant();\r
- }\r
-\r
- /*!\r
- @brief explicitly create an array from an initializer list\r
-\r
- Creates a JSON array value from a given initializer list. That is, given a\r
- list of values `a, b, c`, creates the JSON value `[a, b, c]`. If the\r
- initializer list is empty, the empty array `[]` is created.\r
-\r
- @note This function is only needed to express two edge cases that cannot\r
- be realized with the initializer list constructor (@ref\r
- basic_json(std::initializer_list<basic_json>, bool, value_t)). These cases\r
- are:\r
- 1. creating an array whose elements are all pairs whose first element is a\r
- string -- in this case, the initializer list constructor would create an\r
- object, taking the first elements as keys\r
- 2. creating an empty array -- passing the empty initializer list to the\r
- initializer list constructor yields an empty object\r
-\r
- @param[in] init initializer list with JSON values to create an array from\r
- (optional)\r
-\r
- @return JSON array value\r
-\r
- @complexity Linear in the size of @a init.\r
-\r
- @liveexample{The following code shows an example for the `array`\r
- function.,array}\r
-\r
- @sa @ref basic_json(std::initializer_list<basic_json>, bool, value_t) --\r
- create a JSON value from an initializer list\r
- @sa @ref object(std::initializer_list<basic_json>) -- create a JSON object\r
- value from an initializer list\r
-\r
- @since version 1.0.0\r
- */\r
- static basic_json array(std::initializer_list<basic_json> init =\r
- std::initializer_list<basic_json>())\r
- {\r
- return basic_json(init, false, value_t::array);\r
- }\r
-\r
- /*!\r
- @brief explicitly create an object from an initializer list\r
-\r
- Creates a JSON object value from a given initializer list. The initializer\r
- lists elements must be pairs, and their first elements must be strings. If\r
- the initializer list is empty, the empty object `{}` is created.\r
-\r
- @note This function is only added for symmetry reasons. In contrast to the\r
- related function @ref array(std::initializer_list<basic_json>), there are\r
- no cases which can only be expressed by this function. That is, any\r
- initializer list @a init can also be passed to the initializer list\r
- constructor @ref basic_json(std::initializer_list<basic_json>, bool,\r
- value_t).\r
-\r
- @param[in] init initializer list to create an object from (optional)\r
-\r
- @return JSON object value\r
-\r
- @throw std::domain_error if @a init is not a pair whose first elements are\r
- strings; thrown by\r
- @ref basic_json(std::initializer_list<basic_json>, bool, value_t)\r
-\r
- @complexity Linear in the size of @a init.\r
-\r
- @liveexample{The following code shows an example for the `object`\r
- function.,object}\r
-\r
- @sa @ref basic_json(std::initializer_list<basic_json>, bool, value_t) --\r
- create a JSON value from an initializer list\r
- @sa @ref array(std::initializer_list<basic_json>) -- create a JSON array\r
- value from an initializer list\r
-\r
- @since version 1.0.0\r
- */\r
- static basic_json object(std::initializer_list<basic_json> init =\r
- std::initializer_list<basic_json>())\r
- {\r
- return basic_json(init, false, value_t::object);\r
- }\r
-\r
- /*!\r
- @brief construct an array with count copies of given value\r
-\r
- Constructs a JSON array value by creating @a cnt copies of a passed value.\r
- In case @a cnt is `0`, an empty array is created. As postcondition,\r
- `std::distance(begin(),end()) == cnt` holds.\r
-\r
- @param[in] cnt the number of JSON copies of @a val to create\r
- @param[in] val the JSON value to copy\r
-\r
- @complexity Linear in @a cnt.\r
-\r
- @liveexample{The following code shows examples for the @ref\r
- basic_json(size_type\, const basic_json&)\r
- constructor.,basic_json__size_type_basic_json}\r
-\r
- @since version 1.0.0\r
- */\r
- basic_json(size_type cnt, const basic_json& val)\r
- : m_type(value_t::array)\r
- {\r
- m_value.array = create<array_t>(cnt, val);\r
- assert_invariant();\r
- }\r
-\r
- /*!\r
- @brief construct a JSON container given an iterator range\r
-\r
- Constructs the JSON value with the contents of the range `[first, last)`.\r
- The semantics depends on the different types a JSON value can have:\r
- - In case of primitive types (number, boolean, or string), @a first must\r
- be `begin()` and @a last must be `end()`. In this case, the value is\r
- copied. Otherwise, std::out_of_range is thrown.\r
- - In case of structured types (array, object), the constructor behaves as\r
- similar versions for `std::vector`.\r
- - In case of a null type, std::domain_error is thrown.\r
-\r
- @tparam InputIT an input iterator type (@ref iterator or @ref\r
- const_iterator)\r
-\r
- @param[in] first begin of the range to copy from (included)\r
- @param[in] last end of the range to copy from (excluded)\r
-\r
- @pre Iterators @a first and @a last must be initialized. **This\r
- precondition is enforced with an assertion.**\r
-\r
- @throw std::domain_error if iterators are not compatible; that is, do not\r
- belong to the same JSON value; example: `"iterators are not compatible"`\r
- @throw std::out_of_range if iterators are for a primitive type (number,\r
- boolean, or string) where an out of range error can be detected easily;\r
- example: `"iterators out of range"`\r
- @throw std::bad_alloc if allocation for object, array, or string fails\r
- @throw std::domain_error if called with a null value; example: `"cannot\r
- use construct with iterators from null"`\r
-\r
- @complexity Linear in distance between @a first and @a last.\r
-\r
- @liveexample{The example below shows several ways to create JSON values by\r
- specifying a subrange with iterators.,basic_json__InputIt_InputIt}\r
-\r
- @since version 1.0.0\r
- */\r
- template<class InputIT, typename std::enable_if<\r
- std::is_same<InputIT, typename basic_json_t::iterator>::value or\r
- std::is_same<InputIT, typename basic_json_t::const_iterator>::value, int>::type = 0>\r
- basic_json(InputIT first, InputIT last)\r
- {\r
- assert(first.m_object != nullptr);\r
- assert(last.m_object != nullptr);\r
-\r
- // make sure iterator fits the current value\r
- if (first.m_object != last.m_object)\r
- {\r
- JSON_THROW(std::domain_error("iterators are not compatible"));\r
- }\r
-\r
- // copy type from first iterator\r
- m_type = first.m_object->m_type;\r
-\r
- // check if iterator range is complete for primitive values\r
- switch (m_type)\r
- {\r
- case value_t::boolean:\r
- case value_t::number_float:\r
- case value_t::number_integer:\r
- case value_t::number_unsigned:\r
- case value_t::string:\r
- {\r
- if (not first.m_it.primitive_iterator.is_begin() or not last.m_it.primitive_iterator.is_end())\r
- {\r
- JSON_THROW(std::out_of_range("iterators out of range"));\r
- }\r
- break;\r
- }\r
-\r
- default:\r
- {\r
- break;\r
- }\r
- }\r
-\r
- switch (m_type)\r
- {\r
- case value_t::number_integer:\r
- {\r
- m_value.number_integer = first.m_object->m_value.number_integer;\r
- break;\r
- }\r
-\r
- case value_t::number_unsigned:\r
- {\r
- m_value.number_unsigned = first.m_object->m_value.number_unsigned;\r
- break;\r
- }\r
-\r
- case value_t::number_float:\r
- {\r
- m_value.number_float = first.m_object->m_value.number_float;\r
- break;\r
- }\r
-\r
- case value_t::boolean:\r
- {\r
- m_value.boolean = first.m_object->m_value.boolean;\r
- break;\r
- }\r
-\r
- case value_t::string:\r
- {\r
- m_value = *first.m_object->m_value.string;\r
- break;\r
- }\r
-\r
- case value_t::object:\r
- {\r
- m_value.object = create<object_t>(first.m_it.object_iterator,\r
- last.m_it.object_iterator);\r
- break;\r
- }\r
-\r
- case value_t::array:\r
- {\r
- m_value.array = create<array_t>(first.m_it.array_iterator,\r
- last.m_it.array_iterator);\r
- break;\r
- }\r
-\r
- default:\r
- {\r
- JSON_THROW(std::domain_error("cannot use construct with iterators from " + first.m_object->type_name()));\r
- }\r
- }\r
-\r
- assert_invariant();\r
- }\r
-\r
- /*!\r
- @brief construct a JSON value given an input stream\r
-\r
- @param[in,out] i stream to read a serialized JSON value from\r
- @param[in] cb a parser callback function of type @ref parser_callback_t\r
- which is used to control the deserialization by filtering unwanted values\r
- (optional)\r
-\r
- @complexity Linear in the length of the input. The parser is a predictive\r
- LL(1) parser. The complexity can be higher if the parser callback function\r
- @a cb has a super-linear complexity.\r
-\r
- @note A UTF-8 byte order mark is silently ignored.\r
-\r
- @deprecated This constructor is deprecated and will be removed in version\r
- 3.0.0 to unify the interface of the library. Deserialization will be\r
- done by stream operators or by calling one of the `parse` functions,\r
- e.g. @ref parse(std::istream&, const parser_callback_t). That is, calls\r
- like `json j(i);` for an input stream @a i need to be replaced by\r
- `json j = json::parse(i);`. See the example below.\r
-\r
- @liveexample{The example below demonstrates constructing a JSON value from\r
- a `std::stringstream` with and without callback\r
- function.,basic_json__istream}\r
-\r
- @since version 2.0.0, deprecated in version 2.0.3, to be removed in\r
- version 3.0.0\r
- */\r
- JSON_DEPRECATED\r
- explicit basic_json(std::istream& i, const parser_callback_t cb = nullptr)\r
- {\r
- *this = parser(i, cb).parse();\r
- assert_invariant();\r
- }\r
-\r
- ///////////////////////////////////////\r
- // other constructors and destructor //\r
- ///////////////////////////////////////\r
-\r
- /*!\r
- @brief copy constructor\r
-\r
- Creates a copy of a given JSON value.\r
-\r
- @param[in] other the JSON value to copy\r
-\r
- @complexity Linear in the size of @a other.\r
-\r
- @requirement This function helps `basic_json` satisfying the\r
- [Container](http://en.cppreference.com/w/cpp/concept/Container)\r
- requirements:\r
- - The complexity is linear.\r
- - As postcondition, it holds: `other == basic_json(other)`.\r
-\r
- @throw std::bad_alloc if allocation for object, array, or string fails.\r
-\r
- @liveexample{The following code shows an example for the copy\r
- constructor.,basic_json__basic_json}\r
-\r
- @since version 1.0.0\r
- */\r
- basic_json(const basic_json& other)\r
- : m_type(other.m_type)\r
- {\r
- // check of passed value is valid\r
- other.assert_invariant();\r
-\r
- switch (m_type)\r
- {\r
- case value_t::object:\r
- {\r
- m_value = *other.m_value.object;\r
- break;\r
- }\r
-\r
- case value_t::array:\r
- {\r
- m_value = *other.m_value.array;\r
- break;\r
- }\r
-\r
- case value_t::string:\r
- {\r
- m_value = *other.m_value.string;\r
- break;\r
- }\r
-\r
- case value_t::boolean:\r
- {\r
- m_value = other.m_value.boolean;\r
- break;\r
- }\r
-\r
- case value_t::number_integer:\r
- {\r
- m_value = other.m_value.number_integer;\r
- break;\r
- }\r
-\r
- case value_t::number_unsigned:\r
- {\r
- m_value = other.m_value.number_unsigned;\r
- break;\r
- }\r
-\r
- case value_t::number_float:\r
- {\r
- m_value = other.m_value.number_float;\r
- break;\r
- }\r
-\r
- default:\r
- {\r
- break;\r
- }\r
- }\r
-\r
- assert_invariant();\r
- }\r
-\r
- /*!\r
- @brief move constructor\r
-\r
- Move constructor. Constructs a JSON value with the contents of the given\r
- value @a other using move semantics. It "steals" the resources from @a\r
- other and leaves it as JSON null value.\r
-\r
- @param[in,out] other value to move to this object\r
-\r
- @post @a other is a JSON null value\r
-\r
- @complexity Constant.\r
-\r
- @liveexample{The code below shows the move constructor explicitly called\r
- via std::move.,basic_json__moveconstructor}\r
-\r
- @since version 1.0.0\r
- */\r
- basic_json(basic_json&& other) noexcept\r
- : m_type(std::move(other.m_type)),\r
- m_value(std::move(other.m_value))\r
- {\r
- // check that passed value is valid\r
- other.assert_invariant();\r
-\r
- // invalidate payload\r
- other.m_type = value_t::null;\r
- other.m_value = {};\r
-\r
- assert_invariant();\r
- }\r
-\r
- /*!\r
- @brief copy assignment\r
-\r
- Copy assignment operator. Copies a JSON value via the "copy and swap"\r
- strategy: It is expressed in terms of the copy constructor, destructor,\r
- and the swap() member function.\r
-\r
- @param[in] other value to copy from\r
-\r
- @complexity Linear.\r
-\r
- @requirement This function helps `basic_json` satisfying the\r
- [Container](http://en.cppreference.com/w/cpp/concept/Container)\r
- requirements:\r
- - The complexity is linear.\r
-\r
- @liveexample{The code below shows and example for the copy assignment. It\r
- creates a copy of value `a` which is then swapped with `b`. Finally\, the\r
- copy of `a` (which is the null value after the swap) is\r
- destroyed.,basic_json__copyassignment}\r
-\r
- @since version 1.0.0\r
- */\r
- reference& operator=(basic_json other) noexcept (\r
- std::is_nothrow_move_constructible<value_t>::value and\r
- std::is_nothrow_move_assignable<value_t>::value and\r
- std::is_nothrow_move_constructible<json_value>::value and\r
- std::is_nothrow_move_assignable<json_value>::value\r
- )\r
- {\r
- // check that passed value is valid\r
- other.assert_invariant();\r
-\r
- using std::swap;\r
- swap(m_type, other.m_type);\r
- swap(m_value, other.m_value);\r
-\r
- assert_invariant();\r
- return *this;\r
- }\r
-\r
- /*!\r
- @brief destructor\r
-\r
- Destroys the JSON value and frees all allocated memory.\r
-\r
- @complexity Linear.\r
-\r
- @requirement This function helps `basic_json` satisfying the\r
- [Container](http://en.cppreference.com/w/cpp/concept/Container)\r
- requirements:\r
- - The complexity is linear.\r
- - All stored elements are destroyed and all memory is freed.\r
-\r
- @since version 1.0.0\r
- */\r
- ~basic_json()\r
- {\r
- assert_invariant();\r
-\r
- switch (m_type)\r
- {\r
- case value_t::object:\r
- {\r
- AllocatorType<object_t> alloc;\r
- alloc.destroy(m_value.object);\r
- alloc.deallocate(m_value.object, 1);\r
- break;\r
- }\r
-\r
- case value_t::array:\r
- {\r
- AllocatorType<array_t> alloc;\r
- alloc.destroy(m_value.array);\r
- alloc.deallocate(m_value.array, 1);\r
- break;\r
- }\r
-\r
- case value_t::string:\r
- {\r
- AllocatorType<string_t> alloc;\r
- alloc.destroy(m_value.string);\r
- alloc.deallocate(m_value.string, 1);\r
- break;\r
- }\r
-\r
- default:\r
- {\r
- // all other types need no specific destructor\r
- break;\r
- }\r
- }\r
- }\r
-\r
- /// @}\r
-\r
- public:\r
- ///////////////////////\r
- // object inspection //\r
- ///////////////////////\r
-\r
- /// @name object inspection\r
- /// Functions to inspect the type of a JSON value.\r
- /// @{\r
-\r
- /*!\r
- @brief serialization\r
-\r
- Serialization function for JSON values. The function tries to mimic\r
- Python's `json.dumps()` function, and currently supports its @a indent\r
- parameter.\r
-\r
- @param[in] indent If indent is nonnegative, then array elements and object\r
- members will be pretty-printed with that indent level. An indent level of\r
- `0` will only insert newlines. `-1` (the default) selects the most compact\r
- representation.\r
-\r
- @return string containing the serialization of the JSON value\r
-\r
- @complexity Linear.\r
-\r
- @liveexample{The following example shows the effect of different @a indent\r
- parameters to the result of the serialization.,dump}\r
-\r
- @see https://docs.python.org/2/library/json.html#json.dump\r
-\r
- @since version 1.0.0\r
- */\r
- string_t dump(const int indent = -1) const\r
- {\r
- std::stringstream ss;\r
-\r
- if (indent >= 0)\r
- {\r
- dump(ss, true, static_cast<unsigned int>(indent));\r
- }\r
- else\r
- {\r
- dump(ss, false, 0);\r
- }\r
-\r
- return ss.str();\r
- }\r
-\r
- /*!\r
- @brief return the type of the JSON value (explicit)\r
-\r
- Return the type of the JSON value as a value from the @ref value_t\r
- enumeration.\r
-\r
- @return the type of the JSON value\r
-\r
- @complexity Constant.\r
-\r
- @exceptionsafety No-throw guarantee: this member function never throws\r
- exceptions.\r
-\r
- @liveexample{The following code exemplifies `type()` for all JSON\r
- types.,type}\r
-\r
- @since version 1.0.0\r
- */\r
- constexpr value_t type() const noexcept\r
- {\r
- return m_type;\r
- }\r
-\r
- /*!\r
- @brief return whether type is primitive\r
-\r
- This function returns true iff the JSON type is primitive (string, number,\r
- boolean, or null).\r
-\r
- @return `true` if type is primitive (string, number, boolean, or null),\r
- `false` otherwise.\r
-\r
- @complexity Constant.\r
-\r
- @exceptionsafety No-throw guarantee: this member function never throws\r
- exceptions.\r
-\r
- @liveexample{The following code exemplifies `is_primitive()` for all JSON\r
- types.,is_primitive}\r
-\r
- @sa @ref is_structured() -- returns whether JSON value is structured\r
- @sa @ref is_null() -- returns whether JSON value is `null`\r
- @sa @ref is_string() -- returns whether JSON value is a string\r
- @sa @ref is_boolean() -- returns whether JSON value is a boolean\r
- @sa @ref is_number() -- returns whether JSON value is a number\r
-\r
- @since version 1.0.0\r
- */\r
- constexpr bool is_primitive() const noexcept\r
- {\r
- return is_null() or is_string() or is_boolean() or is_number();\r
- }\r
-\r
- /*!\r
- @brief return whether type is structured\r
-\r
- This function returns true iff the JSON type is structured (array or\r
- object).\r
-\r
- @return `true` if type is structured (array or object), `false` otherwise.\r
-\r
- @complexity Constant.\r
-\r
- @exceptionsafety No-throw guarantee: this member function never throws\r
- exceptions.\r
-\r
- @liveexample{The following code exemplifies `is_structured()` for all JSON\r
- types.,is_structured}\r
-\r
- @sa @ref is_primitive() -- returns whether value is primitive\r
- @sa @ref is_array() -- returns whether value is an array\r
- @sa @ref is_object() -- returns whether value is an object\r
-\r
- @since version 1.0.0\r
- */\r
- constexpr bool is_structured() const noexcept\r
- {\r
- return is_array() or is_object();\r
- }\r
-\r
- /*!\r
- @brief return whether value is null\r
-\r
- This function returns true iff the JSON value is null.\r
-\r
- @return `true` if type is null, `false` otherwise.\r
-\r
- @complexity Constant.\r
-\r
- @exceptionsafety No-throw guarantee: this member function never throws\r
- exceptions.\r
-\r
- @liveexample{The following code exemplifies `is_null()` for all JSON\r
- types.,is_null}\r
-\r
- @since version 1.0.0\r
- */\r
- constexpr bool is_null() const noexcept\r
- {\r
- return m_type == value_t::null;\r
- }\r
-\r
- /*!\r
- @brief return whether value is a boolean\r
-\r
- This function returns true iff the JSON value is a boolean.\r
-\r
- @return `true` if type is boolean, `false` otherwise.\r
-\r
- @complexity Constant.\r
-\r
- @exceptionsafety No-throw guarantee: this member function never throws\r
- exceptions.\r
-\r
- @liveexample{The following code exemplifies `is_boolean()` for all JSON\r
- types.,is_boolean}\r
-\r
- @since version 1.0.0\r
- */\r
- constexpr bool is_boolean() const noexcept\r
- {\r
- return m_type == value_t::boolean;\r
- }\r
-\r
- /*!\r
- @brief return whether value is a number\r
-\r
- This function returns true iff the JSON value is a number. This includes\r
- both integer and floating-point values.\r
-\r
- @return `true` if type is number (regardless whether integer, unsigned\r
- integer or floating-type), `false` otherwise.\r
-\r
- @complexity Constant.\r
-\r
- @exceptionsafety No-throw guarantee: this member function never throws\r
- exceptions.\r
-\r
- @liveexample{The following code exemplifies `is_number()` for all JSON\r
- types.,is_number}\r
-\r
- @sa @ref is_number_integer() -- check if value is an integer or unsigned\r
- integer number\r
- @sa @ref is_number_unsigned() -- check if value is an unsigned integer\r
- number\r
- @sa @ref is_number_float() -- check if value is a floating-point number\r
-\r
- @since version 1.0.0\r
- */\r
- constexpr bool is_number() const noexcept\r
- {\r
- return is_number_integer() or is_number_float();\r
- }\r
-\r
- /*!\r
- @brief return whether value is an integer number\r
-\r
- This function returns true iff the JSON value is an integer or unsigned\r
- integer number. This excludes floating-point values.\r
-\r
- @return `true` if type is an integer or unsigned integer number, `false`\r
- otherwise.\r
-\r
- @complexity Constant.\r
-\r
- @exceptionsafety No-throw guarantee: this member function never throws\r
- exceptions.\r
-\r
- @liveexample{The following code exemplifies `is_number_integer()` for all\r
- JSON types.,is_number_integer}\r
-\r
- @sa @ref is_number() -- check if value is a number\r
- @sa @ref is_number_unsigned() -- check if value is an unsigned integer\r
- number\r
- @sa @ref is_number_float() -- check if value is a floating-point number\r
-\r
- @since version 1.0.0\r
- */\r
- constexpr bool is_number_integer() const noexcept\r
- {\r
- return m_type == value_t::number_integer or m_type == value_t::number_unsigned;\r
- }\r
-\r
- /*!\r
- @brief return whether value is an unsigned integer number\r
-\r
- This function returns true iff the JSON value is an unsigned integer\r
- number. This excludes floating-point and (signed) integer values.\r
-\r
- @return `true` if type is an unsigned integer number, `false` otherwise.\r
-\r
- @complexity Constant.\r
-\r
- @exceptionsafety No-throw guarantee: this member function never throws\r
- exceptions.\r
-\r
- @liveexample{The following code exemplifies `is_number_unsigned()` for all\r
- JSON types.,is_number_unsigned}\r
-\r
- @sa @ref is_number() -- check if value is a number\r
- @sa @ref is_number_integer() -- check if value is an integer or unsigned\r
- integer number\r
- @sa @ref is_number_float() -- check if value is a floating-point number\r
-\r
- @since version 2.0.0\r
- */\r
- constexpr bool is_number_unsigned() const noexcept\r
- {\r
- return m_type == value_t::number_unsigned;\r
- }\r
-\r
- /*!\r
- @brief return whether value is a floating-point number\r
-\r
- This function returns true iff the JSON value is a floating-point number.\r
- This excludes integer and unsigned integer values.\r
-\r
- @return `true` if type is a floating-point number, `false` otherwise.\r
-\r
- @complexity Constant.\r
-\r
- @exceptionsafety No-throw guarantee: this member function never throws\r
- exceptions.\r
-\r
- @liveexample{The following code exemplifies `is_number_float()` for all\r
- JSON types.,is_number_float}\r
-\r
- @sa @ref is_number() -- check if value is number\r
- @sa @ref is_number_integer() -- check if value is an integer number\r
- @sa @ref is_number_unsigned() -- check if value is an unsigned integer\r
- number\r
-\r
- @since version 1.0.0\r
- */\r
- constexpr bool is_number_float() const noexcept\r
- {\r
- return m_type == value_t::number_float;\r
- }\r
-\r
- /*!\r
- @brief return whether value is an object\r
-\r
- This function returns true iff the JSON value is an object.\r
-\r
- @return `true` if type is object, `false` otherwise.\r
-\r
- @complexity Constant.\r
-\r
- @exceptionsafety No-throw guarantee: this member function never throws\r
- exceptions.\r
-\r
- @liveexample{The following code exemplifies `is_object()` for all JSON\r
- types.,is_object}\r
-\r
- @since version 1.0.0\r
- */\r
- constexpr bool is_object() const noexcept\r
- {\r
- return m_type == value_t::object;\r
- }\r
-\r
- /*!\r
- @brief return whether value is an array\r
-\r
- This function returns true iff the JSON value is an array.\r
-\r
- @return `true` if type is array, `false` otherwise.\r
-\r
- @complexity Constant.\r
-\r
- @exceptionsafety No-throw guarantee: this member function never throws\r
- exceptions.\r
-\r
- @liveexample{The following code exemplifies `is_array()` for all JSON\r
- types.,is_array}\r
-\r
- @since version 1.0.0\r
- */\r
- constexpr bool is_array() const noexcept\r
- {\r
- return m_type == value_t::array;\r
- }\r
-\r
- /*!\r
- @brief return whether value is a string\r
-\r
- This function returns true iff the JSON value is a string.\r
-\r
- @return `true` if type is string, `false` otherwise.\r
-\r
- @complexity Constant.\r
-\r
- @exceptionsafety No-throw guarantee: this member function never throws\r
- exceptions.\r
-\r
- @liveexample{The following code exemplifies `is_string()` for all JSON\r
- types.,is_string}\r
-\r
- @since version 1.0.0\r
- */\r
- constexpr bool is_string() const noexcept\r
- {\r
- return m_type == value_t::string;\r
- }\r
-\r
- /*!\r
- @brief return whether value is discarded\r
-\r
- This function returns true iff the JSON value was discarded during parsing\r
- with a callback function (see @ref parser_callback_t).\r
-\r
- @note This function will always be `false` for JSON values after parsing.\r
- That is, discarded values can only occur during parsing, but will be\r
- removed when inside a structured value or replaced by null in other cases.\r
-\r
- @return `true` if type is discarded, `false` otherwise.\r
-\r
- @complexity Constant.\r
-\r
- @exceptionsafety No-throw guarantee: this member function never throws\r
- exceptions.\r
-\r
- @liveexample{The following code exemplifies `is_discarded()` for all JSON\r
- types.,is_discarded}\r
-\r
- @since version 1.0.0\r
- */\r
- constexpr bool is_discarded() const noexcept\r
- {\r
- return m_type == value_t::discarded;\r
- }\r
-\r
- /*!\r
- @brief return the type of the JSON value (implicit)\r
-\r
- Implicitly return the type of the JSON value as a value from the @ref\r
- value_t enumeration.\r
-\r
- @return the type of the JSON value\r
-\r
- @complexity Constant.\r
-\r
- @exceptionsafety No-throw guarantee: this member function never throws\r
- exceptions.\r
-\r
- @liveexample{The following code exemplifies the @ref value_t operator for\r
- all JSON types.,operator__value_t}\r
-\r
- @since version 1.0.0\r
- */\r
- constexpr operator value_t() const noexcept\r
- {\r
- return m_type;\r
- }\r
-\r
- /// @}\r
-\r
- private:\r
- //////////////////\r
- // value access //\r
- //////////////////\r
-\r
- /// get a boolean (explicit)\r
- boolean_t get_impl(boolean_t* /*unused*/) const\r
- {\r
- if (is_boolean())\r
- {\r
- return m_value.boolean;\r
- }\r
-\r
- JSON_THROW(std::domain_error("type must be boolean, but is " + type_name()));\r
- }\r
-\r
- /// get a pointer to the value (object)\r
- object_t* get_impl_ptr(object_t* /*unused*/) noexcept\r
- {\r
- return is_object() ? m_value.object : nullptr;\r
- }\r
-\r
- /// get a pointer to the value (object)\r
- constexpr const object_t* get_impl_ptr(const object_t* /*unused*/) const noexcept\r
- {\r
- return is_object() ? m_value.object : nullptr;\r
- }\r
-\r
- /// get a pointer to the value (array)\r
- array_t* get_impl_ptr(array_t* /*unused*/) noexcept\r
- {\r
- return is_array() ? m_value.array : nullptr;\r
- }\r
-\r
- /// get a pointer to the value (array)\r
- constexpr const array_t* get_impl_ptr(const array_t* /*unused*/) const noexcept\r
- {\r
- return is_array() ? m_value.array : nullptr;\r
- }\r
-\r
- /// get a pointer to the value (string)\r
- string_t* get_impl_ptr(string_t* /*unused*/) noexcept\r
- {\r
- return is_string() ? m_value.string : nullptr;\r
- }\r
-\r
- /// get a pointer to the value (string)\r
- constexpr const string_t* get_impl_ptr(const string_t* /*unused*/) const noexcept\r
- {\r
- return is_string() ? m_value.string : nullptr;\r
- }\r
-\r
- /// get a pointer to the value (boolean)\r
- boolean_t* get_impl_ptr(boolean_t* /*unused*/) noexcept\r
- {\r
- return is_boolean() ? &m_value.boolean : nullptr;\r
- }\r
-\r
- /// get a pointer to the value (boolean)\r
- constexpr const boolean_t* get_impl_ptr(const boolean_t* /*unused*/) const noexcept\r
- {\r
- return is_boolean() ? &m_value.boolean : nullptr;\r
- }\r
-\r
- /// get a pointer to the value (integer number)\r
- number_integer_t* get_impl_ptr(number_integer_t* /*unused*/) noexcept\r
- {\r
- return is_number_integer() ? &m_value.number_integer : nullptr;\r
- }\r
-\r
- /// get a pointer to the value (integer number)\r
- constexpr const number_integer_t* get_impl_ptr(const number_integer_t* /*unused*/) const noexcept\r
- {\r
- return is_number_integer() ? &m_value.number_integer : nullptr;\r
- }\r
-\r
- /// get a pointer to the value (unsigned number)\r
- number_unsigned_t* get_impl_ptr(number_unsigned_t* /*unused*/) noexcept\r
- {\r
- return is_number_unsigned() ? &m_value.number_unsigned : nullptr;\r
- }\r
-\r
- /// get a pointer to the value (unsigned number)\r
- constexpr const number_unsigned_t* get_impl_ptr(const number_unsigned_t* /*unused*/) const noexcept\r
- {\r
- return is_number_unsigned() ? &m_value.number_unsigned : nullptr;\r
- }\r
-\r
- /// get a pointer to the value (floating-point number)\r
- number_float_t* get_impl_ptr(number_float_t* /*unused*/) noexcept\r
- {\r
- return is_number_float() ? &m_value.number_float : nullptr;\r
- }\r
-\r
- /// get a pointer to the value (floating-point number)\r
- constexpr const number_float_t* get_impl_ptr(const number_float_t* /*unused*/) const noexcept\r
- {\r
- return is_number_float() ? &m_value.number_float : nullptr;\r
- }\r
-\r
- /*!\r
- @brief helper function to implement get_ref()\r
-\r
- This funcion helps to implement get_ref() without code duplication for\r
- const and non-const overloads\r
-\r
- @tparam ThisType will be deduced as `basic_json` or `const basic_json`\r
-\r
- @throw std::domain_error if ReferenceType does not match underlying value\r
- type of the current JSON\r
- */\r
- template<typename ReferenceType, typename ThisType>\r
- static ReferenceType get_ref_impl(ThisType& obj)\r
- {\r
- // helper type\r
- using PointerType = typename std::add_pointer<ReferenceType>::type;\r
-\r
- // delegate the call to get_ptr<>()\r
- auto ptr = obj.template get_ptr<PointerType>();\r
-\r
- if (ptr != nullptr)\r
- {\r
- return *ptr;\r
- }\r
-\r
- JSON_THROW(std::domain_error("incompatible ReferenceType for get_ref, actual type is " +\r
- obj.type_name()));\r
- }\r
-\r
- public:\r
- /// @name value access\r
- /// Direct access to the stored value of a JSON value.\r
- /// @{\r
-\r
- /*!\r
- @brief get special-case overload\r
-\r
- This overloads avoids a lot of template boilerplate, it can be seen as the\r
- identity method\r
-\r
- @tparam BasicJsonType == @ref basic_json\r
-\r
- @return a copy of *this\r
-\r
- @complexity Constant.\r
-\r
- @since version 2.1.0\r
- */\r
- template <\r
- typename BasicJsonType,\r
- detail::enable_if_t<std::is_same<typename std::remove_const<BasicJsonType>::type,\r
- basic_json_t>::value,\r
- int> = 0 >\r
- basic_json get() const\r
- {\r
- return *this;\r
- }\r
-\r
- /*!\r
- @brief get a value (explicit)\r
-\r
- Explicit type conversion between the JSON value and a compatible value\r
- which is [CopyConstructible](http://en.cppreference.com/w/cpp/concept/CopyConstructible)\r
- and [DefaultConstructible](http://en.cppreference.com/w/cpp/concept/DefaultConstructible).\r
- The value is converted by calling the @ref json_serializer<ValueType>\r
- `from_json()` method.\r
-\r
- The function is equivalent to executing\r
- @code {.cpp}\r
- ValueType ret;\r
- JSONSerializer<ValueType>::from_json(*this, ret);\r
- return ret;\r
- @endcode\r
-\r
- This overloads is chosen if:\r
- - @a ValueType is not @ref basic_json,\r
- - @ref json_serializer<ValueType> has a `from_json()` method of the form\r
- `void from_json(const @ref basic_json&, ValueType&)`, and\r
- - @ref json_serializer<ValueType> does not have a `from_json()` method of\r
- the form `ValueType from_json(const @ref basic_json&)`\r
-\r
- @tparam ValueTypeCV the provided value type\r
- @tparam ValueType the returned value type\r
-\r
- @return copy of the JSON value, converted to @a ValueType\r
-\r
- @throw what @ref json_serializer<ValueType> `from_json()` method throws\r
-\r
- @liveexample{The example below shows several conversions from JSON values\r
- to other types. There a few things to note: (1) Floating-point numbers can\r
- be converted to integers\, (2) A JSON array can be converted to a standard\r
- `std::vector<short>`\, (3) A JSON object can be converted to C++\r
- associative containers such as `std::unordered_map<std::string\,\r
- json>`.,get__ValueType_const}\r
-\r
- @since version 2.1.0\r
- */\r
- template <\r
- typename ValueTypeCV,\r
- typename ValueType = detail::uncvref_t<ValueTypeCV>,\r
- detail::enable_if_t <\r
- not std::is_same<basic_json_t, ValueType>::value and\r
- detail::has_from_json<basic_json_t, ValueType>::value and\r
- not detail::has_non_default_from_json<basic_json_t, ValueType>::value,\r
- int > = 0 >\r
- ValueType get() const noexcept(noexcept(\r
- JSONSerializer<ValueType>::from_json(std::declval<const basic_json_t&>(), std::declval<ValueType&>())))\r
- {\r
- // we cannot static_assert on ValueTypeCV being non-const, because\r
- // there is support for get<const basic_json_t>(), which is why we\r
- // still need the uncvref\r
- static_assert(not std::is_reference<ValueTypeCV>::value,\r
- "get() cannot be used with reference types, you might want to use get_ref()");\r
- static_assert(std::is_default_constructible<ValueType>::value,\r
- "types must be DefaultConstructible when used with get()");\r
-\r
- ValueType ret;\r
- JSONSerializer<ValueType>::from_json(*this, ret);\r
- return ret;\r
- }\r
-\r
- /*!\r
- @brief get a value (explicit); special case\r
-\r
- Explicit type conversion between the JSON value and a compatible value\r
- which is **not** [CopyConstructible](http://en.cppreference.com/w/cpp/concept/CopyConstructible)\r
- and **not** [DefaultConstructible](http://en.cppreference.com/w/cpp/concept/DefaultConstructible).\r
- The value is converted by calling the @ref json_serializer<ValueType>\r
- `from_json()` method.\r
-\r
- The function is equivalent to executing\r
- @code {.cpp}\r
- return JSONSerializer<ValueTypeCV>::from_json(*this);\r
- @endcode\r
-\r
- This overloads is chosen if:\r
- - @a ValueType is not @ref basic_json and\r
- - @ref json_serializer<ValueType> has a `from_json()` method of the form\r
- `ValueType from_json(const @ref basic_json&)`\r
-\r
- @note If @ref json_serializer<ValueType> has both overloads of\r
- `from_json()`, this one is chosen.\r
-\r
- @tparam ValueTypeCV the provided value type\r
- @tparam ValueType the returned value type\r
-\r
- @return copy of the JSON value, converted to @a ValueType\r
-\r
- @throw what @ref json_serializer<ValueType> `from_json()` method throws\r
-\r
- @since version 2.1.0\r
- */\r
- template <\r
- typename ValueTypeCV,\r
- typename ValueType = detail::uncvref_t<ValueTypeCV>,\r
- detail::enable_if_t<not std::is_same<basic_json_t, ValueType>::value and\r
- detail::has_non_default_from_json<basic_json_t,\r
- ValueType>::value, int> = 0 >\r
- ValueType get() const noexcept(noexcept(\r
- JSONSerializer<ValueTypeCV>::from_json(std::declval<const basic_json_t&>())))\r
- {\r
- static_assert(not std::is_reference<ValueTypeCV>::value,\r
- "get() cannot be used with reference types, you might want to use get_ref()");\r
- return JSONSerializer<ValueTypeCV>::from_json(*this);\r
- }\r
-\r
- /*!\r
- @brief get a pointer value (explicit)\r
-\r
- Explicit pointer access to the internally stored JSON value. No copies are\r
- made.\r
-\r
- @warning The pointer becomes invalid if the underlying JSON object\r
- changes.\r
-\r
- @tparam PointerType pointer type; must be a pointer to @ref array_t, @ref\r
- object_t, @ref string_t, @ref boolean_t, @ref number_integer_t,\r
- @ref number_unsigned_t, or @ref number_float_t.\r
-\r
- @return pointer to the internally stored JSON value if the requested\r
- pointer type @a PointerType fits to the JSON value; `nullptr` otherwise\r
-\r
- @complexity Constant.\r
-\r
- @liveexample{The example below shows how pointers to internal values of a\r
- JSON value can be requested. Note that no type conversions are made and a\r
- `nullptr` is returned if the value and the requested pointer type does not\r
- match.,get__PointerType}\r
-\r
- @sa @ref get_ptr() for explicit pointer-member access\r
-\r
- @since version 1.0.0\r
- */\r
- template<typename PointerType, typename std::enable_if<\r
- std::is_pointer<PointerType>::value, int>::type = 0>\r
- PointerType get() noexcept\r
- {\r
- // delegate the call to get_ptr\r
- return get_ptr<PointerType>();\r
- }\r
-\r
- /*!\r
- @brief get a pointer value (explicit)\r
- @copydoc get()\r
- */\r
- template<typename PointerType, typename std::enable_if<\r
- std::is_pointer<PointerType>::value, int>::type = 0>\r
- constexpr const PointerType get() const noexcept\r
- {\r
- // delegate the call to get_ptr\r
- return get_ptr<PointerType>();\r
- }\r
-\r
- /*!\r
- @brief get a pointer value (implicit)\r
-\r
- Implicit pointer access to the internally stored JSON value. No copies are\r
- made.\r
-\r
- @warning Writing data to the pointee of the result yields an undefined\r
- state.\r
-\r
- @tparam PointerType pointer type; must be a pointer to @ref array_t, @ref\r
- object_t, @ref string_t, @ref boolean_t, @ref number_integer_t,\r
- @ref number_unsigned_t, or @ref number_float_t. Enforced by a static\r
- assertion.\r
-\r
- @return pointer to the internally stored JSON value if the requested\r
- pointer type @a PointerType fits to the JSON value; `nullptr` otherwise\r
-\r
- @complexity Constant.\r
-\r
- @liveexample{The example below shows how pointers to internal values of a\r
- JSON value can be requested. Note that no type conversions are made and a\r
- `nullptr` is returned if the value and the requested pointer type does not\r
- match.,get_ptr}\r
-\r
- @since version 1.0.0\r
- */\r
- template<typename PointerType, typename std::enable_if<\r
- std::is_pointer<PointerType>::value, int>::type = 0>\r
- PointerType get_ptr() noexcept\r
- {\r
- // get the type of the PointerType (remove pointer and const)\r
- using pointee_t = typename std::remove_const<typename\r
- std::remove_pointer<typename\r
- std::remove_const<PointerType>::type>::type>::type;\r
- // make sure the type matches the allowed types\r
- static_assert(\r
- std::is_same<object_t, pointee_t>::value\r
- or std::is_same<array_t, pointee_t>::value\r
- or std::is_same<string_t, pointee_t>::value\r
- or std::is_same<boolean_t, pointee_t>::value\r
- or std::is_same<number_integer_t, pointee_t>::value\r
- or std::is_same<number_unsigned_t, pointee_t>::value\r
- or std::is_same<number_float_t, pointee_t>::value\r
- , "incompatible pointer type");\r
-\r
- // delegate the call to get_impl_ptr<>()\r
- return get_impl_ptr(static_cast<PointerType>(nullptr));\r
- }\r
-\r
- /*!\r
- @brief get a pointer value (implicit)\r
- @copydoc get_ptr()\r
- */\r
- template<typename PointerType, typename std::enable_if<\r
- std::is_pointer<PointerType>::value and\r
- std::is_const<typename std::remove_pointer<PointerType>::type>::value, int>::type = 0>\r
- constexpr const PointerType get_ptr() const noexcept\r
- {\r
- // get the type of the PointerType (remove pointer and const)\r
- using pointee_t = typename std::remove_const<typename\r
- std::remove_pointer<typename\r
- std::remove_const<PointerType>::type>::type>::type;\r
- // make sure the type matches the allowed types\r
- static_assert(\r
- std::is_same<object_t, pointee_t>::value\r
- or std::is_same<array_t, pointee_t>::value\r
- or std::is_same<string_t, pointee_t>::value\r
- or std::is_same<boolean_t, pointee_t>::value\r
- or std::is_same<number_integer_t, pointee_t>::value\r
- or std::is_same<number_unsigned_t, pointee_t>::value\r
- or std::is_same<number_float_t, pointee_t>::value\r
- , "incompatible pointer type");\r
-\r
- // delegate the call to get_impl_ptr<>() const\r
- return get_impl_ptr(static_cast<const PointerType>(nullptr));\r
- }\r
-\r
- /*!\r
- @brief get a reference value (implicit)\r
-\r
- Implicit reference access to the internally stored JSON value. No copies\r
- are made.\r
-\r
- @warning Writing data to the referee of the result yields an undefined\r
- state.\r
-\r
- @tparam ReferenceType reference type; must be a reference to @ref array_t,\r
- @ref object_t, @ref string_t, @ref boolean_t, @ref number_integer_t, or\r
- @ref number_float_t. Enforced by static assertion.\r
-\r
- @return reference to the internally stored JSON value if the requested\r
- reference type @a ReferenceType fits to the JSON value; throws\r
- std::domain_error otherwise\r
-\r
- @throw std::domain_error in case passed type @a ReferenceType is\r
- incompatible with the stored JSON value\r
-\r
- @complexity Constant.\r
-\r
- @liveexample{The example shows several calls to `get_ref()`.,get_ref}\r
-\r
- @since version 1.1.0\r
- */\r
- template<typename ReferenceType, typename std::enable_if<\r
- std::is_reference<ReferenceType>::value, int>::type = 0>\r
- ReferenceType get_ref()\r
- {\r
- // delegate call to get_ref_impl\r
- return get_ref_impl<ReferenceType>(*this);\r
- }\r
-\r
- /*!\r
- @brief get a reference value (implicit)\r
- @copydoc get_ref()\r
- */\r
- template<typename ReferenceType, typename std::enable_if<\r
- std::is_reference<ReferenceType>::value and\r
- std::is_const<typename std::remove_reference<ReferenceType>::type>::value, int>::type = 0>\r
- ReferenceType get_ref() const\r
- {\r
- // delegate call to get_ref_impl\r
- return get_ref_impl<ReferenceType>(*this);\r
- }\r
-\r
- /*!\r
- @brief get a value (implicit)\r
-\r
- Implicit type conversion between the JSON value and a compatible value.\r
- The call is realized by calling @ref get() const.\r
-\r
- @tparam ValueType non-pointer type compatible to the JSON value, for\r
- instance `int` for JSON integer numbers, `bool` for JSON booleans, or\r
- `std::vector` types for JSON arrays. The character type of @ref string_t\r
- as well as an initializer list of this type is excluded to avoid\r
- ambiguities as these types implicitly convert to `std::string`.\r
-\r
- @return copy of the JSON value, converted to type @a ValueType\r
-\r
- @throw std::domain_error in case passed type @a ValueType is incompatible\r
- to JSON, thrown by @ref get() const\r
-\r
- @complexity Linear in the size of the JSON value.\r
-\r
- @liveexample{The example below shows several conversions from JSON values\r
- to other types. There a few things to note: (1) Floating-point numbers can\r
- be converted to integers\, (2) A JSON array can be converted to a standard\r
- `std::vector<short>`\, (3) A JSON object can be converted to C++\r
- associative containers such as `std::unordered_map<std::string\,\r
- json>`.,operator__ValueType}\r
-\r
- @since version 1.0.0\r
- */\r
- template < typename ValueType, typename std::enable_if <\r
- not std::is_pointer<ValueType>::value and\r
- not std::is_same<ValueType, typename string_t::value_type>::value\r
-#ifndef _MSC_VER // fix for issue #167 operator<< ambiguity under VS2015\r
- and not std::is_same<ValueType, std::initializer_list<typename string_t::value_type>>::value\r
-#endif\r
- , int >::type = 0 >\r
- operator ValueType() const\r
- {\r
- // delegate the call to get<>() const\r
- return get<ValueType>();\r
- }\r
-\r
- /// @}\r
-\r
-\r
- ////////////////////\r
- // element access //\r
- ////////////////////\r
-\r
- /// @name element access\r
- /// Access to the JSON value.\r
- /// @{\r
-\r
- /*!\r
- @brief access specified array element with bounds checking\r
-\r
- Returns a reference to the element at specified location @a idx, with\r
- bounds checking.\r
-\r
- @param[in] idx index of the element to access\r
-\r
- @return reference to the element at index @a idx\r
-\r
- @throw std::domain_error if the JSON value is not an array; example:\r
- `"cannot use at() with string"`\r
- @throw std::out_of_range if the index @a idx is out of range of the array;\r
- that is, `idx >= size()`; example: `"array index 7 is out of range"`\r
-\r
- @complexity Constant.\r
-\r
- @liveexample{The example below shows how array elements can be read and\r
- written using `at()`.,at__size_type}\r
-\r
- @since version 1.0.0\r
- */\r
- reference at(size_type idx)\r
- {\r
- // at only works for arrays\r
- if (is_array())\r
- {\r
- JSON_TRY\r
- {\r
- return m_value.array->at(idx);\r
- }\r
- JSON_CATCH (std::out_of_range&)\r
- {\r
- // create better exception explanation\r
- JSON_THROW(std::out_of_range("array index " + std::to_string(idx) + " is out of range"));\r
- }\r
- }\r
- else\r
- {\r
- JSON_THROW(std::domain_error("cannot use at() with " + type_name()));\r
- }\r
- }\r
-\r
- /*!\r
- @brief access specified array element with bounds checking\r
-\r
- Returns a const reference to the element at specified location @a idx,\r
- with bounds checking.\r
-\r
- @param[in] idx index of the element to access\r
-\r
- @return const reference to the element at index @a idx\r
-\r
- @throw std::domain_error if the JSON value is not an array; example:\r
- `"cannot use at() with string"`\r
- @throw std::out_of_range if the index @a idx is out of range of the array;\r
- that is, `idx >= size()`; example: `"array index 7 is out of range"`\r
-\r
- @complexity Constant.\r
-\r
- @liveexample{The example below shows how array elements can be read using\r
- `at()`.,at__size_type_const}\r
-\r
- @since version 1.0.0\r
- */\r
- const_reference at(size_type idx) const\r
- {\r
- // at only works for arrays\r
- if (is_array())\r
- {\r
- JSON_TRY\r
- {\r
- return m_value.array->at(idx);\r
- }\r
- JSON_CATCH (std::out_of_range&)\r
- {\r
- // create better exception explanation\r
- JSON_THROW(std::out_of_range("array index " + std::to_string(idx) + " is out of range"));\r
- }\r
- }\r
- else\r
- {\r
- JSON_THROW(std::domain_error("cannot use at() with " + type_name()));\r
- }\r
- }\r
-\r
- /*!\r
- @brief access specified object element with bounds checking\r
-\r
- Returns a reference to the element at with specified key @a key, with\r
- bounds checking.\r
-\r
- @param[in] key key of the element to access\r
-\r
- @return reference to the element at key @a key\r
-\r
- @throw std::domain_error if the JSON value is not an object; example:\r
- `"cannot use at() with boolean"`\r
- @throw std::out_of_range if the key @a key is is not stored in the object;\r
- that is, `find(key) == end()`; example: `"key "the fast" not found"`\r
-\r
- @complexity Logarithmic in the size of the container.\r
-\r
- @liveexample{The example below shows how object elements can be read and\r
- written using `at()`.,at__object_t_key_type}\r
-\r
- @sa @ref operator[](const typename object_t::key_type&) for unchecked\r
- access by reference\r
- @sa @ref value() for access by value with a default value\r
-\r
- @since version 1.0.0\r
- */\r
- reference at(const typename object_t::key_type& key)\r
- {\r
- // at only works for objects\r
- if (is_object())\r
- {\r
- JSON_TRY\r
- {\r
- return m_value.object->at(key);\r
- }\r
- JSON_CATCH (std::out_of_range&)\r
- {\r
- // create better exception explanation\r
- JSON_THROW(std::out_of_range("key '" + key + "' not found"));\r
- }\r
- }\r
- else\r
- {\r
- JSON_THROW(std::domain_error("cannot use at() with " + type_name()));\r
- }\r
- }\r
-\r
- /*!\r
- @brief access specified object element with bounds checking\r
-\r
- Returns a const reference to the element at with specified key @a key,\r
- with bounds checking.\r
-\r
- @param[in] key key of the element to access\r
-\r
- @return const reference to the element at key @a key\r
-\r
- @throw std::domain_error if the JSON value is not an object; example:\r
- `"cannot use at() with boolean"`\r
- @throw std::out_of_range if the key @a key is is not stored in the object;\r
- that is, `find(key) == end()`; example: `"key "the fast" not found"`\r
-\r
- @complexity Logarithmic in the size of the container.\r
-\r
- @liveexample{The example below shows how object elements can be read using\r
- `at()`.,at__object_t_key_type_const}\r
-\r
- @sa @ref operator[](const typename object_t::key_type&) for unchecked\r
- access by reference\r
- @sa @ref value() for access by value with a default value\r
-\r
- @since version 1.0.0\r
- */\r
- const_reference at(const typename object_t::key_type& key) const\r
- {\r
- // at only works for objects\r
- if (is_object())\r
- {\r
- JSON_TRY\r
- {\r
- return m_value.object->at(key);\r
- }\r
- JSON_CATCH (std::out_of_range&)\r
- {\r
- // create better exception explanation\r
- JSON_THROW(std::out_of_range("key '" + key + "' not found"));\r
- }\r
- }\r
- else\r
- {\r
- JSON_THROW(std::domain_error("cannot use at() with " + type_name()));\r
- }\r
- }\r
-\r
- /*!\r
- @brief access specified array element\r
-\r
- Returns a reference to the element at specified location @a idx.\r
-\r
- @note If @a idx is beyond the range of the array (i.e., `idx >= size()`),\r
- then the array is silently filled up with `null` values to make `idx` a\r
- valid reference to the last stored element.\r
-\r
- @param[in] idx index of the element to access\r
-\r
- @return reference to the element at index @a idx\r
-\r
- @throw std::domain_error if JSON is not an array or null; example:\r
- `"cannot use operator[] with string"`\r
-\r
- @complexity Constant if @a idx is in the range of the array. Otherwise\r
- linear in `idx - size()`.\r
-\r
- @liveexample{The example below shows how array elements can be read and\r
- written using `[]` operator. Note the addition of `null`\r
- values.,operatorarray__size_type}\r
-\r
- @since version 1.0.0\r
- */\r
- reference operator[](size_type idx)\r
- {\r
- // implicitly convert null value to an empty array\r
- if (is_null())\r
- {\r
- m_type = value_t::array;\r
- m_value.array = create<array_t>();\r
- assert_invariant();\r
- }\r
-\r
- // operator[] only works for arrays\r
- if (is_array())\r
- {\r
- // fill up array with null values if given idx is outside range\r
- if (idx >= m_value.array->size())\r
- {\r
- m_value.array->insert(m_value.array->end(),\r
- idx - m_value.array->size() + 1,\r
- basic_json());\r
- }\r
-\r
- return m_value.array->operator[](idx);\r
- }\r
-\r
- JSON_THROW(std::domain_error("cannot use operator[] with " + type_name()));\r
- }\r
-\r
- /*!\r
- @brief access specified array element\r
-\r
- Returns a const reference to the element at specified location @a idx.\r
-\r
- @param[in] idx index of the element to access\r
-\r
- @return const reference to the element at index @a idx\r
-\r
- @throw std::domain_error if JSON is not an array; example: `"cannot use\r
- operator[] with null"`\r
-\r
- @complexity Constant.\r
-\r
- @liveexample{The example below shows how array elements can be read using\r
- the `[]` operator.,operatorarray__size_type_const}\r
-\r
- @since version 1.0.0\r
- */\r
- const_reference operator[](size_type idx) const\r
- {\r
- // const operator[] only works for arrays\r
- if (is_array())\r
- {\r
- return m_value.array->operator[](idx);\r
- }\r
-\r
- JSON_THROW(std::domain_error("cannot use operator[] with " + type_name()));\r
- }\r
-\r
- /*!\r
- @brief access specified object element\r
-\r
- Returns a reference to the element at with specified key @a key.\r
-\r
- @note If @a key is not found in the object, then it is silently added to\r
- the object and filled with a `null` value to make `key` a valid reference.\r
- In case the value was `null` before, it is converted to an object.\r
-\r
- @param[in] key key of the element to access\r
-\r
- @return reference to the element at key @a key\r
-\r
- @throw std::domain_error if JSON is not an object or null; example:\r
- `"cannot use operator[] with string"`\r
-\r
- @complexity Logarithmic in the size of the container.\r
-\r
- @liveexample{The example below shows how object elements can be read and\r
- written using the `[]` operator.,operatorarray__key_type}\r
-\r
- @sa @ref at(const typename object_t::key_type&) for access by reference\r
- with range checking\r
- @sa @ref value() for access by value with a default value\r
-\r
- @since version 1.0.0\r
- */\r
- reference operator[](const typename object_t::key_type& key)\r
- {\r
- // implicitly convert null value to an empty object\r
- if (is_null())\r
- {\r
- m_type = value_t::object;\r
- m_value.object = create<object_t>();\r
- assert_invariant();\r
- }\r
-\r
- // operator[] only works for objects\r
- if (is_object())\r
- {\r
- return m_value.object->operator[](key);\r
- }\r
-\r
- JSON_THROW(std::domain_error("cannot use operator[] with " + type_name()));\r
- }\r
-\r
- /*!\r
- @brief read-only access specified object element\r
-\r
- Returns a const reference to the element at with specified key @a key. No\r
- bounds checking is performed.\r
-\r
- @warning If the element with key @a key does not exist, the behavior is\r
- undefined.\r
-\r
- @param[in] key key of the element to access\r
-\r
- @return const reference to the element at key @a key\r
-\r
- @pre The element with key @a key must exist. **This precondition is\r
- enforced with an assertion.**\r
-\r
- @throw std::domain_error if JSON is not an object; example: `"cannot use\r
- operator[] with null"`\r
-\r
- @complexity Logarithmic in the size of the container.\r
-\r
- @liveexample{The example below shows how object elements can be read using\r
- the `[]` operator.,operatorarray__key_type_const}\r
-\r
- @sa @ref at(const typename object_t::key_type&) for access by reference\r
- with range checking\r
- @sa @ref value() for access by value with a default value\r
-\r
- @since version 1.0.0\r
- */\r
- const_reference operator[](const typename object_t::key_type& key) const\r
- {\r
- // const operator[] only works for objects\r
- if (is_object())\r
- {\r
- assert(m_value.object->find(key) != m_value.object->end());\r
- return m_value.object->find(key)->second;\r
- }\r
-\r
- JSON_THROW(std::domain_error("cannot use operator[] with " + type_name()));\r
- }\r
-\r
- /*!\r
- @brief access specified object element\r
-\r
- Returns a reference to the element at with specified key @a key.\r
-\r
- @note If @a key is not found in the object, then it is silently added to\r
- the object and filled with a `null` value to make `key` a valid reference.\r
- In case the value was `null` before, it is converted to an object.\r
-\r
- @param[in] key key of the element to access\r
-\r
- @return reference to the element at key @a key\r
-\r
- @throw std::domain_error if JSON is not an object or null; example:\r
- `"cannot use operator[] with string"`\r
-\r
- @complexity Logarithmic in the size of the container.\r
-\r
- @liveexample{The example below shows how object elements can be read and\r
- written using the `[]` operator.,operatorarray__key_type}\r
-\r
- @sa @ref at(const typename object_t::key_type&) for access by reference\r
- with range checking\r
- @sa @ref value() for access by value with a default value\r
-\r
- @since version 1.0.0\r
- */\r
- template<typename T, std::size_t n>\r
- reference operator[](T * (&key)[n])\r
- {\r
- return operator[](static_cast<const T>(key));\r
- }\r
-\r
- /*!\r
- @brief read-only access specified object element\r
-\r
- Returns a const reference to the element at with specified key @a key. No\r
- bounds checking is performed.\r
-\r
- @warning If the element with key @a key does not exist, the behavior is\r
- undefined.\r
-\r
- @note This function is required for compatibility reasons with Clang.\r
-\r
- @param[in] key key of the element to access\r
-\r
- @return const reference to the element at key @a key\r
-\r
- @throw std::domain_error if JSON is not an object; example: `"cannot use\r
- operator[] with null"`\r
-\r
- @complexity Logarithmic in the size of the container.\r
-\r
- @liveexample{The example below shows how object elements can be read using\r
- the `[]` operator.,operatorarray__key_type_const}\r
-\r
- @sa @ref at(const typename object_t::key_type&) for access by reference\r
- with range checking\r
- @sa @ref value() for access by value with a default value\r
-\r
- @since version 1.0.0\r
- */\r
- template<typename T, std::size_t n>\r
- const_reference operator[](T * (&key)[n]) const\r
- {\r
- return operator[](static_cast<const T>(key));\r
- }\r
-\r
- /*!\r
- @brief access specified object element\r
-\r
- Returns a reference to the element at with specified key @a key.\r
-\r
- @note If @a key is not found in the object, then it is silently added to\r
- the object and filled with a `null` value to make `key` a valid reference.\r
- In case the value was `null` before, it is converted to an object.\r
-\r
- @param[in] key key of the element to access\r
-\r
- @return reference to the element at key @a key\r
-\r
- @throw std::domain_error if JSON is not an object or null; example:\r
- `"cannot use operator[] with string"`\r
-\r
- @complexity Logarithmic in the size of the container.\r
-\r
- @liveexample{The example below shows how object elements can be read and\r
- written using the `[]` operator.,operatorarray__key_type}\r
-\r
- @sa @ref at(const typename object_t::key_type&) for access by reference\r
- with range checking\r
- @sa @ref value() for access by value with a default value\r
-\r
- @since version 1.1.0\r
- */\r
- template<typename T>\r
- reference operator[](T* key)\r
- {\r
- // implicitly convert null to object\r
- if (is_null())\r
- {\r
- m_type = value_t::object;\r
- m_value = value_t::object;\r
- assert_invariant();\r
- }\r
-\r
- // at only works for objects\r
- if (is_object())\r
- {\r
- return m_value.object->operator[](key);\r
- }\r
-\r
- JSON_THROW(std::domain_error("cannot use operator[] with " + type_name()));\r
- }\r
-\r
- /*!\r
- @brief read-only access specified object element\r
-\r
- Returns a const reference to the element at with specified key @a key. No\r
- bounds checking is performed.\r
-\r
- @warning If the element with key @a key does not exist, the behavior is\r
- undefined.\r
-\r
- @param[in] key key of the element to access\r
-\r
- @return const reference to the element at key @a key\r
-\r
- @pre The element with key @a key must exist. **This precondition is\r
- enforced with an assertion.**\r
-\r
- @throw std::domain_error if JSON is not an object; example: `"cannot use\r
- operator[] with null"`\r
-\r
- @complexity Logarithmic in the size of the container.\r
-\r
- @liveexample{The example below shows how object elements can be read using\r
- the `[]` operator.,operatorarray__key_type_const}\r
-\r
- @sa @ref at(const typename object_t::key_type&) for access by reference\r
- with range checking\r
- @sa @ref value() for access by value with a default value\r
-\r
- @since version 1.1.0\r
- */\r
- template<typename T>\r
- const_reference operator[](T* key) const\r
- {\r
- // at only works for objects\r
- if (is_object())\r
- {\r
- assert(m_value.object->find(key) != m_value.object->end());\r
- return m_value.object->find(key)->second;\r
- }\r
-\r
- JSON_THROW(std::domain_error("cannot use operator[] with " + type_name()));\r
- }\r
-\r
- /*!\r
- @brief access specified object element with default value\r
-\r
- Returns either a copy of an object's element at the specified key @a key\r
- or a given default value if no element with key @a key exists.\r
-\r
- The function is basically equivalent to executing\r
- @code {.cpp}\r
- try {\r
- return at(key);\r
- } catch(std::out_of_range) {\r
- return default_value;\r
- }\r
- @endcode\r
-\r
- @note Unlike @ref at(const typename object_t::key_type&), this function\r
- does not throw if the given key @a key was not found.\r
-\r
- @note Unlike @ref operator[](const typename object_t::key_type& key), this\r
- function does not implicitly add an element to the position defined by @a\r
- key. This function is furthermore also applicable to const objects.\r
-\r
- @param[in] key key of the element to access\r
- @param[in] default_value the value to return if @a key is not found\r
-\r
- @tparam ValueType type compatible to JSON values, for instance `int` for\r
- JSON integer numbers, `bool` for JSON booleans, or `std::vector` types for\r
- JSON arrays. Note the type of the expected value at @a key and the default\r
- value @a default_value must be compatible.\r
-\r
- @return copy of the element at key @a key or @a default_value if @a key\r
- is not found\r
-\r
- @throw std::domain_error if JSON is not an object; example: `"cannot use\r
- value() with null"`\r
-\r
- @complexity Logarithmic in the size of the container.\r
-\r
- @liveexample{The example below shows how object elements can be queried\r
- with a default value.,basic_json__value}\r
-\r
- @sa @ref at(const typename object_t::key_type&) for access by reference\r
- with range checking\r
- @sa @ref operator[](const typename object_t::key_type&) for unchecked\r
- access by reference\r
-\r
- @since version 1.0.0\r
- */\r
- template<class ValueType, typename std::enable_if<\r
- std::is_convertible<basic_json_t, ValueType>::value, int>::type = 0>\r
- ValueType value(const typename object_t::key_type& key, ValueType default_value) const\r
- {\r
- // at only works for objects\r
- if (is_object())\r
- {\r
- // if key is found, return value and given default value otherwise\r
- const auto it = find(key);\r
- if (it != end())\r
- {\r
- return *it;\r
- }\r
-\r
- return default_value;\r
- }\r
- else\r
- {\r
- JSON_THROW(std::domain_error("cannot use value() with " + type_name()));\r
- }\r
- }\r
-\r
- /*!\r
- @brief overload for a default value of type const char*\r
- @copydoc basic_json::value(const typename object_t::key_type&, ValueType) const\r
- */\r
- string_t value(const typename object_t::key_type& key, const char* default_value) const\r
- {\r
- return value(key, string_t(default_value));\r
- }\r
-\r
- /*!\r
- @brief access specified object element via JSON Pointer with default value\r
-\r
- Returns either a copy of an object's element at the specified key @a key\r
- or a given default value if no element with key @a key exists.\r
-\r
- The function is basically equivalent to executing\r
- @code {.cpp}\r
- try {\r
- return at(ptr);\r
- } catch(std::out_of_range) {\r
- return default_value;\r
- }\r
- @endcode\r
-\r
- @note Unlike @ref at(const json_pointer&), this function does not throw\r
- if the given key @a key was not found.\r
-\r
- @param[in] ptr a JSON pointer to the element to access\r
- @param[in] default_value the value to return if @a ptr found no value\r
-\r
- @tparam ValueType type compatible to JSON values, for instance `int` for\r
- JSON integer numbers, `bool` for JSON booleans, or `std::vector` types for\r
- JSON arrays. Note the type of the expected value at @a key and the default\r
- value @a default_value must be compatible.\r
-\r
- @return copy of the element at key @a key or @a default_value if @a key\r
- is not found\r
-\r
- @throw std::domain_error if JSON is not an object; example: `"cannot use\r
- value() with null"`\r
-\r
- @complexity Logarithmic in the size of the container.\r
-\r
- @liveexample{The example below shows how object elements can be queried\r
- with a default value.,basic_json__value_ptr}\r
-\r
- @sa @ref operator[](const json_pointer&) for unchecked access by reference\r
-\r
- @since version 2.0.2\r
- */\r
- template<class ValueType, typename std::enable_if<\r
- std::is_convertible<basic_json_t, ValueType>::value, int>::type = 0>\r
- ValueType value(const json_pointer& ptr, ValueType default_value) const\r
- {\r
- // at only works for objects\r
- if (is_object())\r
- {\r
- // if pointer resolves a value, return it or use default value\r
- JSON_TRY\r
- {\r
- return ptr.get_checked(this);\r
- }\r
- JSON_CATCH (std::out_of_range&)\r
- {\r
- return default_value;\r
- }\r
- }\r
-\r
- JSON_THROW(std::domain_error("cannot use value() with " + type_name()));\r
- }\r
-\r
- /*!\r
- @brief overload for a default value of type const char*\r
- @copydoc basic_json::value(const json_pointer&, ValueType) const\r
- */\r
- string_t value(const json_pointer& ptr, const char* default_value) const\r
- {\r
- return value(ptr, string_t(default_value));\r
- }\r
-\r
- /*!\r
- @brief access the first element\r
-\r
- Returns a reference to the first element in the container. For a JSON\r
- container `c`, the expression `c.front()` is equivalent to `*c.begin()`.\r
-\r
- @return In case of a structured type (array or object), a reference to the\r
- first element is returned. In case of number, string, or boolean values, a\r
- reference to the value is returned.\r
-\r
- @complexity Constant.\r
-\r
- @pre The JSON value must not be `null` (would throw `std::out_of_range`)\r
- or an empty array or object (undefined behavior, **guarded by\r
- assertions**).\r
- @post The JSON value remains unchanged.\r
-\r
- @throw std::out_of_range when called on `null` value\r
-\r
- @liveexample{The following code shows an example for `front()`.,front}\r
-\r
- @sa @ref back() -- access the last element\r
-\r
- @since version 1.0.0\r
- */\r
- reference front()\r
- {\r
- return *begin();\r
- }\r
-\r
- /*!\r
- @copydoc basic_json::front()\r
- */\r
- const_reference front() const\r
- {\r
- return *cbegin();\r
- }\r
-\r
- /*!\r
- @brief access the last element\r
-\r
- Returns a reference to the last element in the container. For a JSON\r
- container `c`, the expression `c.back()` is equivalent to\r
- @code {.cpp}\r
- auto tmp = c.end();\r
- --tmp;\r
- return *tmp;\r
- @endcode\r
-\r
- @return In case of a structured type (array or object), a reference to the\r
- last element is returned. In case of number, string, or boolean values, a\r
- reference to the value is returned.\r
-\r
- @complexity Constant.\r
-\r
- @pre The JSON value must not be `null` (would throw `std::out_of_range`)\r
- or an empty array or object (undefined behavior, **guarded by\r
- assertions**).\r
- @post The JSON value remains unchanged.\r
-\r
- @throw std::out_of_range when called on `null` value.\r
-\r
- @liveexample{The following code shows an example for `back()`.,back}\r
-\r
- @sa @ref front() -- access the first element\r
-\r
- @since version 1.0.0\r
- */\r
- reference back()\r
- {\r
- auto tmp = end();\r
- --tmp;\r
- return *tmp;\r
- }\r
-\r
- /*!\r
- @copydoc basic_json::back()\r
- */\r
- const_reference back() const\r
- {\r
- auto tmp = cend();\r
- --tmp;\r
- return *tmp;\r
- }\r
-\r
- /*!\r
- @brief remove element given an iterator\r
-\r
- Removes the element specified by iterator @a pos. The iterator @a pos must\r
- be valid and dereferenceable. Thus the `end()` iterator (which is valid,\r
- but is not dereferenceable) cannot be used as a value for @a pos.\r
-\r
- If called on a primitive type other than `null`, the resulting JSON value\r
- will be `null`.\r
-\r
- @param[in] pos iterator to the element to remove\r
- @return Iterator following the last removed element. If the iterator @a\r
- pos refers to the last element, the `end()` iterator is returned.\r
-\r
- @tparam IteratorType an @ref iterator or @ref const_iterator\r
-\r
- @post Invalidates iterators and references at or after the point of the\r
- erase, including the `end()` iterator.\r
-\r
- @throw std::domain_error if called on a `null` value; example: `"cannot\r
- use erase() with null"`\r
- @throw std::domain_error if called on an iterator which does not belong to\r
- the current JSON value; example: `"iterator does not fit current value"`\r
- @throw std::out_of_range if called on a primitive type with invalid\r
- iterator (i.e., any iterator which is not `begin()`); example: `"iterator\r
- out of range"`\r
-\r
- @complexity The complexity depends on the type:\r
- - objects: amortized constant\r
- - arrays: linear in distance between @a pos and the end of the container\r
- - strings: linear in the length of the string\r
- - other types: constant\r
-\r
- @liveexample{The example shows the result of `erase()` for different JSON\r
- types.,erase__IteratorType}\r
-\r
- @sa @ref erase(IteratorType, IteratorType) -- removes the elements in\r
- the given range\r
- @sa @ref erase(const typename object_t::key_type&) -- removes the element\r
- from an object at the given key\r
- @sa @ref erase(const size_type) -- removes the element from an array at\r
- the given index\r
-\r
- @since version 1.0.0\r
- */\r
- template<class IteratorType, typename std::enable_if<\r
- std::is_same<IteratorType, typename basic_json_t::iterator>::value or\r
- std::is_same<IteratorType, typename basic_json_t::const_iterator>::value, int>::type\r
- = 0>\r
- IteratorType erase(IteratorType pos)\r
- {\r
- // make sure iterator fits the current value\r
- if (this != pos.m_object)\r
- {\r
- JSON_THROW(std::domain_error("iterator does not fit current value"));\r
- }\r
-\r
- IteratorType result = end();\r
-\r
- switch (m_type)\r
- {\r
- case value_t::boolean:\r
- case value_t::number_float:\r
- case value_t::number_integer:\r
- case value_t::number_unsigned:\r
- case value_t::string:\r
- {\r
- if (not pos.m_it.primitive_iterator.is_begin())\r
- {\r
- JSON_THROW(std::out_of_range("iterator out of range"));\r
- }\r
-\r
- if (is_string())\r
- {\r
- AllocatorType<string_t> alloc;\r
- alloc.destroy(m_value.string);\r
- alloc.deallocate(m_value.string, 1);\r
- m_value.string = nullptr;\r
- }\r
-\r
- m_type = value_t::null;\r
- assert_invariant();\r
- break;\r
- }\r
-\r
- case value_t::object:\r
- {\r
- result.m_it.object_iterator = m_value.object->erase(pos.m_it.object_iterator);\r
- break;\r
- }\r
-\r
- case value_t::array:\r
- {\r
- result.m_it.array_iterator = m_value.array->erase(pos.m_it.array_iterator);\r
- break;\r
- }\r
-\r
- default:\r
- {\r
- JSON_THROW(std::domain_error("cannot use erase() with " + type_name()));\r
- }\r
- }\r
-\r
- return result;\r
- }\r
-\r
- /*!\r
- @brief remove elements given an iterator range\r
-\r
- Removes the element specified by the range `[first; last)`. The iterator\r
- @a first does not need to be dereferenceable if `first == last`: erasing\r
- an empty range is a no-op.\r
-\r
- If called on a primitive type other than `null`, the resulting JSON value\r
- will be `null`.\r
-\r
- @param[in] first iterator to the beginning of the range to remove\r
- @param[in] last iterator past the end of the range to remove\r
- @return Iterator following the last removed element. If the iterator @a\r
- second refers to the last element, the `end()` iterator is returned.\r
-\r
- @tparam IteratorType an @ref iterator or @ref const_iterator\r
-\r
- @post Invalidates iterators and references at or after the point of the\r
- erase, including the `end()` iterator.\r
-\r
- @throw std::domain_error if called on a `null` value; example: `"cannot\r
- use erase() with null"`\r
- @throw std::domain_error if called on iterators which does not belong to\r
- the current JSON value; example: `"iterators do not fit current value"`\r
- @throw std::out_of_range if called on a primitive type with invalid\r
- iterators (i.e., if `first != begin()` and `last != end()`); example:\r
- `"iterators out of range"`\r
-\r
- @complexity The complexity depends on the type:\r
- - objects: `log(size()) + std::distance(first, last)`\r
- - arrays: linear in the distance between @a first and @a last, plus linear\r
- in the distance between @a last and end of the container\r
- - strings: linear in the length of the string\r
- - other types: constant\r
-\r
- @liveexample{The example shows the result of `erase()` for different JSON\r
- types.,erase__IteratorType_IteratorType}\r
-\r
- @sa @ref erase(IteratorType) -- removes the element at a given position\r
- @sa @ref erase(const typename object_t::key_type&) -- removes the element\r
- from an object at the given key\r
- @sa @ref erase(const size_type) -- removes the element from an array at\r
- the given index\r
-\r
- @since version 1.0.0\r
- */\r
- template<class IteratorType, typename std::enable_if<\r
- std::is_same<IteratorType, typename basic_json_t::iterator>::value or\r
- std::is_same<IteratorType, typename basic_json_t::const_iterator>::value, int>::type\r
- = 0>\r
- IteratorType erase(IteratorType first, IteratorType last)\r
- {\r
- // make sure iterator fits the current value\r
- if (this != first.m_object or this != last.m_object)\r
- {\r
- JSON_THROW(std::domain_error("iterators do not fit current value"));\r
- }\r
-\r
- IteratorType result = end();\r
-\r
- switch (m_type)\r
- {\r
- case value_t::boolean:\r
- case value_t::number_float:\r
- case value_t::number_integer:\r
- case value_t::number_unsigned:\r
- case value_t::string:\r
- {\r
- if (not first.m_it.primitive_iterator.is_begin() or not last.m_it.primitive_iterator.is_end())\r
- {\r
- JSON_THROW(std::out_of_range("iterators out of range"));\r
- }\r
-\r
- if (is_string())\r
- {\r
- AllocatorType<string_t> alloc;\r
- alloc.destroy(m_value.string);\r
- alloc.deallocate(m_value.string, 1);\r
- m_value.string = nullptr;\r
- }\r
-\r
- m_type = value_t::null;\r
- assert_invariant();\r
- break;\r
- }\r
-\r
- case value_t::object:\r
- {\r
- result.m_it.object_iterator = m_value.object->erase(first.m_it.object_iterator,\r
- last.m_it.object_iterator);\r
- break;\r
- }\r
-\r
- case value_t::array:\r
- {\r
- result.m_it.array_iterator = m_value.array->erase(first.m_it.array_iterator,\r
- last.m_it.array_iterator);\r
- break;\r
- }\r
-\r
- default:\r
- {\r
- JSON_THROW(std::domain_error("cannot use erase() with " + type_name()));\r
- }\r
- }\r
-\r
- return result;\r
- }\r
-\r
- /*!\r
- @brief remove element from a JSON object given a key\r
-\r
- Removes elements from a JSON object with the key value @a key.\r
-\r
- @param[in] key value of the elements to remove\r
-\r
- @return Number of elements removed. If @a ObjectType is the default\r
- `std::map` type, the return value will always be `0` (@a key was not\r
- found) or `1` (@a key was found).\r
-\r
- @post References and iterators to the erased elements are invalidated.\r
- Other references and iterators are not affected.\r
-\r
- @throw std::domain_error when called on a type other than JSON object;\r
- example: `"cannot use erase() with null"`\r
-\r
- @complexity `log(size()) + count(key)`\r
-\r
- @liveexample{The example shows the effect of `erase()`.,erase__key_type}\r
-\r
- @sa @ref erase(IteratorType) -- removes the element at a given position\r
- @sa @ref erase(IteratorType, IteratorType) -- removes the elements in\r
- the given range\r
- @sa @ref erase(const size_type) -- removes the element from an array at\r
- the given index\r
-\r
- @since version 1.0.0\r
- */\r
- size_type erase(const typename object_t::key_type& key)\r
- {\r
- // this erase only works for objects\r
- if (is_object())\r
- {\r
- return m_value.object->erase(key);\r
- }\r
-\r
- JSON_THROW(std::domain_error("cannot use erase() with " + type_name()));\r
- }\r
-\r
- /*!\r
- @brief remove element from a JSON array given an index\r
-\r
- Removes element from a JSON array at the index @a idx.\r
-\r
- @param[in] idx index of the element to remove\r
-\r
- @throw std::domain_error when called on a type other than JSON array;\r
- example: `"cannot use erase() with null"`\r
- @throw std::out_of_range when `idx >= size()`; example: `"array index 17\r
- is out of range"`\r
-\r
- @complexity Linear in distance between @a idx and the end of the container.\r
-\r
- @liveexample{The example shows the effect of `erase()`.,erase__size_type}\r
-\r
- @sa @ref erase(IteratorType) -- removes the element at a given position\r
- @sa @ref erase(IteratorType, IteratorType) -- removes the elements in\r
- the given range\r
- @sa @ref erase(const typename object_t::key_type&) -- removes the element\r
- from an object at the given key\r
-\r
- @since version 1.0.0\r
- */\r
- void erase(const size_type idx)\r
- {\r
- // this erase only works for arrays\r
- if (is_array())\r
- {\r
- if (idx >= size())\r
- {\r
- JSON_THROW(std::out_of_range("array index " + std::to_string(idx) + " is out of range"));\r
- }\r
-\r
- m_value.array->erase(m_value.array->begin() + static_cast<difference_type>(idx));\r
- }\r
- else\r
- {\r
- JSON_THROW(std::domain_error("cannot use erase() with " + type_name()));\r
- }\r
- }\r
-\r
- /// @}\r
-\r
-\r
- ////////////\r
- // lookup //\r
- ////////////\r
-\r
- /// @name lookup\r
- /// @{\r
-\r
- /*!\r
- @brief find an element in a JSON object\r
-\r
- Finds an element in a JSON object with key equivalent to @a key. If the\r
- element is not found or the JSON value is not an object, end() is\r
- returned.\r
-\r
- @note This method always returns @ref end() when executed on a JSON type\r
- that is not an object.\r
-\r
- @param[in] key key value of the element to search for\r
-\r
- @return Iterator to an element with key equivalent to @a key. If no such\r
- element is found or the JSON value is not an object, past-the-end (see\r
- @ref end()) iterator is returned.\r
-\r
- @complexity Logarithmic in the size of the JSON object.\r
-\r
- @liveexample{The example shows how `find()` is used.,find__key_type}\r
-\r
- @since version 1.0.0\r
- */\r
- iterator find(typename object_t::key_type key)\r
- {\r
- auto result = end();\r
-\r
- if (is_object())\r
- {\r
- result.m_it.object_iterator = m_value.object->find(key);\r
- }\r
-\r
- return result;\r
- }\r
-\r
- /*!\r
- @brief find an element in a JSON object\r
- @copydoc find(typename object_t::key_type)\r
- */\r
- const_iterator find(typename object_t::key_type key) const\r
- {\r
- auto result = cend();\r
-\r
- if (is_object())\r
- {\r
- result.m_it.object_iterator = m_value.object->find(key);\r
- }\r
-\r
- return result;\r
- }\r
-\r
- /*!\r
- @brief returns the number of occurrences of a key in a JSON object\r
-\r
- Returns the number of elements with key @a key. If ObjectType is the\r
- default `std::map` type, the return value will always be `0` (@a key was\r
- not found) or `1` (@a key was found).\r
-\r
- @note This method always returns `0` when executed on a JSON type that is\r
- not an object.\r
-\r
- @param[in] key key value of the element to count\r
-\r
- @return Number of elements with key @a key. If the JSON value is not an\r
- object, the return value will be `0`.\r
-\r
- @complexity Logarithmic in the size of the JSON object.\r
-\r
- @liveexample{The example shows how `count()` is used.,count}\r
-\r
- @since version 1.0.0\r
- */\r
- size_type count(typename object_t::key_type key) const\r
- {\r
- // return 0 for all nonobject types\r
- return is_object() ? m_value.object->count(key) : 0;\r
- }\r
-\r
- /// @}\r
-\r
-\r
- ///////////////\r
- // iterators //\r
- ///////////////\r
-\r
- /// @name iterators\r
- /// @{\r
-\r
- /*!\r
- @brief returns an iterator to the first element\r
-\r
- Returns an iterator to the first element.\r
-\r
- @image html range-begin-end.svg "Illustration from cppreference.com"\r
-\r
- @return iterator to the first element\r
-\r
- @complexity Constant.\r
-\r
- @requirement This function helps `basic_json` satisfying the\r
- [Container](http://en.cppreference.com/w/cpp/concept/Container)\r
- requirements:\r
- - The complexity is constant.\r
-\r
- @liveexample{The following code shows an example for `begin()`.,begin}\r
-\r
- @sa @ref cbegin() -- returns a const iterator to the beginning\r
- @sa @ref end() -- returns an iterator to the end\r
- @sa @ref cend() -- returns a const iterator to the end\r
-\r
- @since version 1.0.0\r
- */\r
- iterator begin() noexcept\r
- {\r
- iterator result(this);\r
- result.set_begin();\r
- return result;\r
- }\r
-\r
- /*!\r
- @copydoc basic_json::cbegin()\r
- */\r
- const_iterator begin() const noexcept\r
- {\r
- return cbegin();\r
- }\r
-\r
- /*!\r
- @brief returns a const iterator to the first element\r
-\r
- Returns a const iterator to the first element.\r
-\r
- @image html range-begin-end.svg "Illustration from cppreference.com"\r
-\r
- @return const iterator to the first element\r
-\r
- @complexity Constant.\r
-\r
- @requirement This function helps `basic_json` satisfying the\r
- [Container](http://en.cppreference.com/w/cpp/concept/Container)\r
- requirements:\r
- - The complexity is constant.\r
- - Has the semantics of `const_cast<const basic_json&>(*this).begin()`.\r
-\r
- @liveexample{The following code shows an example for `cbegin()`.,cbegin}\r
-\r
- @sa @ref begin() -- returns an iterator to the beginning\r
- @sa @ref end() -- returns an iterator to the end\r
- @sa @ref cend() -- returns a const iterator to the end\r
-\r
- @since version 1.0.0\r
- */\r
- const_iterator cbegin() const noexcept\r
- {\r
- const_iterator result(this);\r
- result.set_begin();\r
- return result;\r
- }\r
-\r
- /*!\r
- @brief returns an iterator to one past the last element\r
-\r
- Returns an iterator to one past the last element.\r
-\r
- @image html range-begin-end.svg "Illustration from cppreference.com"\r
-\r
- @return iterator one past the last element\r
-\r
- @complexity Constant.\r
-\r
- @requirement This function helps `basic_json` satisfying the\r
- [Container](http://en.cppreference.com/w/cpp/concept/Container)\r
- requirements:\r
- - The complexity is constant.\r
-\r
- @liveexample{The following code shows an example for `end()`.,end}\r
-\r
- @sa @ref cend() -- returns a const iterator to the end\r
- @sa @ref begin() -- returns an iterator to the beginning\r
- @sa @ref cbegin() -- returns a const iterator to the beginning\r
-\r
- @since version 1.0.0\r
- */\r
- iterator end() noexcept\r
- {\r
- iterator result(this);\r
- result.set_end();\r
- return result;\r
- }\r
-\r
- /*!\r
- @copydoc basic_json::cend()\r
- */\r
- const_iterator end() const noexcept\r
- {\r
- return cend();\r
- }\r
-\r
- /*!\r
- @brief returns a const iterator to one past the last element\r
-\r
- Returns a const iterator to one past the last element.\r
-\r
- @image html range-begin-end.svg "Illustration from cppreference.com"\r
-\r
- @return const iterator one past the last element\r
-\r
- @complexity Constant.\r
-\r
- @requirement This function helps `basic_json` satisfying the\r
- [Container](http://en.cppreference.com/w/cpp/concept/Container)\r
- requirements:\r
- - The complexity is constant.\r
- - Has the semantics of `const_cast<const basic_json&>(*this).end()`.\r
-\r
- @liveexample{The following code shows an example for `cend()`.,cend}\r
-\r
- @sa @ref end() -- returns an iterator to the end\r
- @sa @ref begin() -- returns an iterator to the beginning\r
- @sa @ref cbegin() -- returns a const iterator to the beginning\r
-\r
- @since version 1.0.0\r
- */\r
- const_iterator cend() const noexcept\r
- {\r
- const_iterator result(this);\r
- result.set_end();\r
- return result;\r
- }\r
-\r
- /*!\r
- @brief returns an iterator to the reverse-beginning\r
-\r
- Returns an iterator to the reverse-beginning; that is, the last element.\r
-\r
- @image html range-rbegin-rend.svg "Illustration from cppreference.com"\r
-\r
- @complexity Constant.\r
-\r
- @requirement This function helps `basic_json` satisfying the\r
- [ReversibleContainer](http://en.cppreference.com/w/cpp/concept/ReversibleContainer)\r
- requirements:\r
- - The complexity is constant.\r
- - Has the semantics of `reverse_iterator(end())`.\r
-\r
- @liveexample{The following code shows an example for `rbegin()`.,rbegin}\r
-\r
- @sa @ref crbegin() -- returns a const reverse iterator to the beginning\r
- @sa @ref rend() -- returns a reverse iterator to the end\r
- @sa @ref crend() -- returns a const reverse iterator to the end\r
-\r
- @since version 1.0.0\r
- */\r
- reverse_iterator rbegin() noexcept\r
- {\r
- return reverse_iterator(end());\r
- }\r
-\r
- /*!\r
- @copydoc basic_json::crbegin()\r
- */\r
- const_reverse_iterator rbegin() const noexcept\r
- {\r
- return crbegin();\r
- }\r
-\r
- /*!\r
- @brief returns an iterator to the reverse-end\r
-\r
- Returns an iterator to the reverse-end; that is, one before the first\r
- element.\r
-\r
- @image html range-rbegin-rend.svg "Illustration from cppreference.com"\r
-\r
- @complexity Constant.\r
-\r
- @requirement This function helps `basic_json` satisfying the\r
- [ReversibleContainer](http://en.cppreference.com/w/cpp/concept/ReversibleContainer)\r
- requirements:\r
- - The complexity is constant.\r
- - Has the semantics of `reverse_iterator(begin())`.\r
-\r
- @liveexample{The following code shows an example for `rend()`.,rend}\r
-\r
- @sa @ref crend() -- returns a const reverse iterator to the end\r
- @sa @ref rbegin() -- returns a reverse iterator to the beginning\r
- @sa @ref crbegin() -- returns a const reverse iterator to the beginning\r
-\r
- @since version 1.0.0\r
- */\r
- reverse_iterator rend() noexcept\r
- {\r
- return reverse_iterator(begin());\r
- }\r
-\r
- /*!\r
- @copydoc basic_json::crend()\r
- */\r
- const_reverse_iterator rend() const noexcept\r
- {\r
- return crend();\r
- }\r
-\r
- /*!\r
- @brief returns a const reverse iterator to the last element\r
-\r
- Returns a const iterator to the reverse-beginning; that is, the last\r
- element.\r
-\r
- @image html range-rbegin-rend.svg "Illustration from cppreference.com"\r
-\r
- @complexity Constant.\r
-\r
- @requirement This function helps `basic_json` satisfying the\r
- [ReversibleContainer](http://en.cppreference.com/w/cpp/concept/ReversibleContainer)\r
- requirements:\r
- - The complexity is constant.\r
- - Has the semantics of `const_cast<const basic_json&>(*this).rbegin()`.\r
-\r
- @liveexample{The following code shows an example for `crbegin()`.,crbegin}\r
-\r
- @sa @ref rbegin() -- returns a reverse iterator to the beginning\r
- @sa @ref rend() -- returns a reverse iterator to the end\r
- @sa @ref crend() -- returns a const reverse iterator to the end\r
-\r
- @since version 1.0.0\r
- */\r
- const_reverse_iterator crbegin() const noexcept\r
- {\r
- return const_reverse_iterator(cend());\r
- }\r
-\r
- /*!\r
- @brief returns a const reverse iterator to one before the first\r
-\r
- Returns a const reverse iterator to the reverse-end; that is, one before\r
- the first element.\r
-\r
- @image html range-rbegin-rend.svg "Illustration from cppreference.com"\r
-\r
- @complexity Constant.\r
-\r
- @requirement This function helps `basic_json` satisfying the\r
- [ReversibleContainer](http://en.cppreference.com/w/cpp/concept/ReversibleContainer)\r
- requirements:\r
- - The complexity is constant.\r
- - Has the semantics of `const_cast<const basic_json&>(*this).rend()`.\r
-\r
- @liveexample{The following code shows an example for `crend()`.,crend}\r
-\r
- @sa @ref rend() -- returns a reverse iterator to the end\r
- @sa @ref rbegin() -- returns a reverse iterator to the beginning\r
- @sa @ref crbegin() -- returns a const reverse iterator to the beginning\r
-\r
- @since version 1.0.0\r
- */\r
- const_reverse_iterator crend() const noexcept\r
- {\r
- return const_reverse_iterator(cbegin());\r
- }\r
-\r
- private:\r
- // forward declaration\r
- template<typename IteratorType> class iteration_proxy;\r
-\r
- public:\r
- /*!\r
- @brief wrapper to access iterator member functions in range-based for\r
-\r
- This function allows to access @ref iterator::key() and @ref\r
- iterator::value() during range-based for loops. In these loops, a\r
- reference to the JSON values is returned, so there is no access to the\r
- underlying iterator.\r
-\r
- @note The name of this function is not yet final and may change in the\r
- future.\r
- */\r
- static iteration_proxy<iterator> iterator_wrapper(reference cont)\r
- {\r
- return iteration_proxy<iterator>(cont);\r
- }\r
-\r
- /*!\r
- @copydoc iterator_wrapper(reference)\r
- */\r
- static iteration_proxy<const_iterator> iterator_wrapper(const_reference cont)\r
- {\r
- return iteration_proxy<const_iterator>(cont);\r
- }\r
-\r
- /// @}\r
-\r
-\r
- //////////////\r
- // capacity //\r
- //////////////\r
-\r
- /// @name capacity\r
- /// @{\r
-\r
- /*!\r
- @brief checks whether the container is empty\r
-\r
- Checks if a JSON value has no elements.\r
-\r
- @return The return value depends on the different types and is\r
- defined as follows:\r
- Value type | return value\r
- ----------- | -------------\r
- null | `true`\r
- boolean | `false`\r
- string | `false`\r
- number | `false`\r
- object | result of function `object_t::empty()`\r
- array | result of function `array_t::empty()`\r
-\r
- @note This function does not return whether a string stored as JSON value\r
- is empty - it returns whether the JSON container itself is empty which is\r
- false in the case of a string.\r
-\r
- @complexity Constant, as long as @ref array_t and @ref object_t satisfy\r
- the Container concept; that is, their `empty()` functions have constant\r
- complexity.\r
-\r
- @requirement This function helps `basic_json` satisfying the\r
- [Container](http://en.cppreference.com/w/cpp/concept/Container)\r
- requirements:\r
- - The complexity is constant.\r
- - Has the semantics of `begin() == end()`.\r
-\r
- @liveexample{The following code uses `empty()` to check if a JSON\r
- object contains any elements.,empty}\r
-\r
- @sa @ref size() -- returns the number of elements\r
-\r
- @since version 1.0.0\r
- */\r
- bool empty() const noexcept\r
- {\r
- switch (m_type)\r
- {\r
- case value_t::null:\r
- {\r
- // null values are empty\r
- return true;\r
- }\r
-\r
- case value_t::array:\r
- {\r
- // delegate call to array_t::empty()\r
- return m_value.array->empty();\r
- }\r
-\r
- case value_t::object:\r
- {\r
- // delegate call to object_t::empty()\r
- return m_value.object->empty();\r
- }\r
-\r
- default:\r
- {\r
- // all other types are nonempty\r
- return false;\r
- }\r
- }\r
- }\r
-\r
- /*!\r
- @brief returns the number of elements\r
-\r
- Returns the number of elements in a JSON value.\r
-\r
- @return The return value depends on the different types and is\r
- defined as follows:\r
- Value type | return value\r
- ----------- | -------------\r
- null | `0`\r
- boolean | `1`\r
- string | `1`\r
- number | `1`\r
- object | result of function object_t::size()\r
- array | result of function array_t::size()\r
-\r
- @note This function does not return the length of a string stored as JSON\r
- value - it returns the number of elements in the JSON value which is 1 in\r
- the case of a string.\r
-\r
- @complexity Constant, as long as @ref array_t and @ref object_t satisfy\r
- the Container concept; that is, their size() functions have constant\r
- complexity.\r
-\r
- @requirement This function helps `basic_json` satisfying the\r
- [Container](http://en.cppreference.com/w/cpp/concept/Container)\r
- requirements:\r
- - The complexity is constant.\r
- - Has the semantics of `std::distance(begin(), end())`.\r
-\r
- @liveexample{The following code calls `size()` on the different value\r
- types.,size}\r
-\r
- @sa @ref empty() -- checks whether the container is empty\r
- @sa @ref max_size() -- returns the maximal number of elements\r
-\r
- @since version 1.0.0\r
- */\r
- size_type size() const noexcept\r
- {\r
- switch (m_type)\r
- {\r
- case value_t::null:\r
- {\r
- // null values are empty\r
- return 0;\r
- }\r
-\r
- case value_t::array:\r
- {\r
- // delegate call to array_t::size()\r
- return m_value.array->size();\r
- }\r
-\r
- case value_t::object:\r
- {\r
- // delegate call to object_t::size()\r
- return m_value.object->size();\r
- }\r
-\r
- default:\r
- {\r
- // all other types have size 1\r
- return 1;\r
- }\r
- }\r
- }\r
-\r
- /*!\r
- @brief returns the maximum possible number of elements\r
-\r
- Returns the maximum number of elements a JSON value is able to hold due to\r
- system or library implementation limitations, i.e. `std::distance(begin(),\r
- end())` for the JSON value.\r
-\r
- @return The return value depends on the different types and is\r
- defined as follows:\r
- Value type | return value\r
- ----------- | -------------\r
- null | `0` (same as `size()`)\r
- boolean | `1` (same as `size()`)\r
- string | `1` (same as `size()`)\r
- number | `1` (same as `size()`)\r
- object | result of function `object_t::max_size()`\r
- array | result of function `array_t::max_size()`\r
-\r
- @complexity Constant, as long as @ref array_t and @ref object_t satisfy\r
- the Container concept; that is, their `max_size()` functions have constant\r
- complexity.\r
-\r
- @requirement This function helps `basic_json` satisfying the\r
- [Container](http://en.cppreference.com/w/cpp/concept/Container)\r
- requirements:\r
- - The complexity is constant.\r
- - Has the semantics of returning `b.size()` where `b` is the largest\r
- possible JSON value.\r
-\r
- @liveexample{The following code calls `max_size()` on the different value\r
- types. Note the output is implementation specific.,max_size}\r
-\r
- @sa @ref size() -- returns the number of elements\r
-\r
- @since version 1.0.0\r
- */\r
- size_type max_size() const noexcept\r
- {\r
- switch (m_type)\r
- {\r
- case value_t::array:\r
- {\r
- // delegate call to array_t::max_size()\r
- return m_value.array->max_size();\r
- }\r
-\r
- case value_t::object:\r
- {\r
- // delegate call to object_t::max_size()\r
- return m_value.object->max_size();\r
- }\r
-\r
- default:\r
- {\r
- // all other types have max_size() == size()\r
- return size();\r
- }\r
- }\r
- }\r
-\r
- /// @}\r
-\r
-\r
- ///////////////\r
- // modifiers //\r
- ///////////////\r
-\r
- /// @name modifiers\r
- /// @{\r
-\r
- /*!\r
- @brief clears the contents\r
-\r
- Clears the content of a JSON value and resets it to the default value as\r
- if @ref basic_json(value_t) would have been called:\r
-\r
- Value type | initial value\r
- ----------- | -------------\r
- null | `null`\r
- boolean | `false`\r
- string | `""`\r
- number | `0`\r
- object | `{}`\r
- array | `[]`\r
-\r
- @complexity Linear in the size of the JSON value.\r
-\r
- @liveexample{The example below shows the effect of `clear()` to different\r
- JSON types.,clear}\r
-\r
- @since version 1.0.0\r
- */\r
- void clear() noexcept\r
- {\r
- switch (m_type)\r
- {\r
- case value_t::number_integer:\r
- {\r
- m_value.number_integer = 0;\r
- break;\r
- }\r
-\r
- case value_t::number_unsigned:\r
- {\r
- m_value.number_unsigned = 0;\r
- break;\r
- }\r
-\r
- case value_t::number_float:\r
- {\r
- m_value.number_float = 0.0;\r
- break;\r
- }\r
-\r
- case value_t::boolean:\r
- {\r
- m_value.boolean = false;\r
- break;\r
- }\r
-\r
- case value_t::string:\r
- {\r
- m_value.string->clear();\r
- break;\r
- }\r
-\r
- case value_t::array:\r
- {\r
- m_value.array->clear();\r
- break;\r
- }\r
-\r
- case value_t::object:\r
- {\r
- m_value.object->clear();\r
- break;\r
- }\r
-\r
- default:\r
- {\r
- break;\r
- }\r
- }\r
- }\r
-\r
- /*!\r
- @brief add an object to an array\r
-\r
- Appends the given element @a val to the end of the JSON value. If the\r
- function is called on a JSON null value, an empty array is created before\r
- appending @a val.\r
-\r
- @param[in] val the value to add to the JSON array\r
-\r
- @throw std::domain_error when called on a type other than JSON array or\r
- null; example: `"cannot use push_back() with number"`\r
-\r
- @complexity Amortized constant.\r
-\r
- @liveexample{The example shows how `push_back()` and `+=` can be used to\r
- add elements to a JSON array. Note how the `null` value was silently\r
- converted to a JSON array.,push_back}\r
-\r
- @since version 1.0.0\r
- */\r
- void push_back(basic_json&& val)\r
- {\r
- // push_back only works for null objects or arrays\r
- if (not(is_null() or is_array()))\r
- {\r
- JSON_THROW(std::domain_error("cannot use push_back() with " + type_name()));\r
- }\r
-\r
- // transform null object into an array\r
- if (is_null())\r
- {\r
- m_type = value_t::array;\r
- m_value = value_t::array;\r
- assert_invariant();\r
- }\r
-\r
- // add element to array (move semantics)\r
- m_value.array->push_back(std::move(val));\r
- // invalidate object\r
- val.m_type = value_t::null;\r
- }\r
-\r
- /*!\r
- @brief add an object to an array\r
- @copydoc push_back(basic_json&&)\r
- */\r
- reference operator+=(basic_json&& val)\r
- {\r
- push_back(std::move(val));\r
- return *this;\r
- }\r
-\r
- /*!\r
- @brief add an object to an array\r
- @copydoc push_back(basic_json&&)\r
- */\r
- void push_back(const basic_json& val)\r
- {\r
- // push_back only works for null objects or arrays\r
- if (not(is_null() or is_array()))\r
- {\r
- JSON_THROW(std::domain_error("cannot use push_back() with " + type_name()));\r
- }\r
-\r
- // transform null object into an array\r
- if (is_null())\r
- {\r
- m_type = value_t::array;\r
- m_value = value_t::array;\r
- assert_invariant();\r
- }\r
-\r
- // add element to array\r
- m_value.array->push_back(val);\r
- }\r
-\r
- /*!\r
- @brief add an object to an array\r
- @copydoc push_back(basic_json&&)\r
- */\r
- reference operator+=(const basic_json& val)\r
- {\r
- push_back(val);\r
- return *this;\r
- }\r
-\r
- /*!\r
- @brief add an object to an object\r
-\r
- Inserts the given element @a val to the JSON object. If the function is\r
- called on a JSON null value, an empty object is created before inserting\r
- @a val.\r
-\r
- @param[in] val the value to add to the JSON object\r
-\r
- @throw std::domain_error when called on a type other than JSON object or\r
- null; example: `"cannot use push_back() with number"`\r
-\r
- @complexity Logarithmic in the size of the container, O(log(`size()`)).\r
-\r
- @liveexample{The example shows how `push_back()` and `+=` can be used to\r
- add elements to a JSON object. Note how the `null` value was silently\r
- converted to a JSON object.,push_back__object_t__value}\r
-\r
- @since version 1.0.0\r
- */\r
- void push_back(const typename object_t::value_type& val)\r
- {\r
- // push_back only works for null objects or objects\r
- if (not(is_null() or is_object()))\r
- {\r
- JSON_THROW(std::domain_error("cannot use push_back() with " + type_name()));\r
- }\r
-\r
- // transform null object into an object\r
- if (is_null())\r
- {\r
- m_type = value_t::object;\r
- m_value = value_t::object;\r
- assert_invariant();\r
- }\r
-\r
- // add element to array\r
- m_value.object->insert(val);\r
- }\r
-\r
- /*!\r
- @brief add an object to an object\r
- @copydoc push_back(const typename object_t::value_type&)\r
- */\r
- reference operator+=(const typename object_t::value_type& val)\r
- {\r
- push_back(val);\r
- return *this;\r
- }\r
-\r
- /*!\r
- @brief add an object to an object\r
-\r
- This function allows to use `push_back` with an initializer list. In case\r
-\r
- 1. the current value is an object,\r
- 2. the initializer list @a init contains only two elements, and\r
- 3. the first element of @a init is a string,\r
-\r
- @a init is converted into an object element and added using\r
- @ref push_back(const typename object_t::value_type&). Otherwise, @a init\r
- is converted to a JSON value and added using @ref push_back(basic_json&&).\r
-\r
- @param init an initializer list\r
-\r
- @complexity Linear in the size of the initializer list @a init.\r
-\r
- @note This function is required to resolve an ambiguous overload error,\r
- because pairs like `{"key", "value"}` can be both interpreted as\r
- `object_t::value_type` or `std::initializer_list<basic_json>`, see\r
- https://github.com/nlohmann/json/issues/235 for more information.\r
-\r
- @liveexample{The example shows how initializer lists are treated as\r
- objects when possible.,push_back__initializer_list}\r
- */\r
- void push_back(std::initializer_list<basic_json> init)\r
- {\r
- if (is_object() and init.size() == 2 and init.begin()->is_string())\r
- {\r
- const string_t key = *init.begin();\r
- push_back(typename object_t::value_type(key, *(init.begin() + 1)));\r
- }\r
- else\r
- {\r
- push_back(basic_json(init));\r
- }\r
- }\r
-\r
- /*!\r
- @brief add an object to an object\r
- @copydoc push_back(std::initializer_list<basic_json>)\r
- */\r
- reference operator+=(std::initializer_list<basic_json> init)\r
- {\r
- push_back(init);\r
- return *this;\r
- }\r
-\r
- /*!\r
- @brief add an object to an array\r
-\r
- Creates a JSON value from the passed parameters @a args to the end of the\r
- JSON value. If the function is called on a JSON null value, an empty array\r
- is created before appending the value created from @a args.\r
-\r
- @param[in] args arguments to forward to a constructor of @ref basic_json\r
- @tparam Args compatible types to create a @ref basic_json object\r
-\r
- @throw std::domain_error when called on a type other than JSON array or\r
- null; example: `"cannot use emplace_back() with number"`\r
-\r
- @complexity Amortized constant.\r
-\r
- @liveexample{The example shows how `push_back()` can be used to add\r
- elements to a JSON array. Note how the `null` value was silently converted\r
- to a JSON array.,emplace_back}\r
-\r
- @since version 2.0.8\r
- */\r
- template<class... Args>\r
- void emplace_back(Args&& ... args)\r
- {\r
- // emplace_back only works for null objects or arrays\r
- if (not(is_null() or is_array()))\r
- {\r
- JSON_THROW(std::domain_error("cannot use emplace_back() with " + type_name()));\r
- }\r
-\r
- // transform null object into an array\r
- if (is_null())\r
- {\r
- m_type = value_t::array;\r
- m_value = value_t::array;\r
- assert_invariant();\r
- }\r
-\r
- // add element to array (perfect forwarding)\r
- m_value.array->emplace_back(std::forward<Args>(args)...);\r
- }\r
-\r
- /*!\r
- @brief add an object to an object if key does not exist\r
-\r
- Inserts a new element into a JSON object constructed in-place with the\r
- given @a args if there is no element with the key in the container. If the\r
- function is called on a JSON null value, an empty object is created before\r
- appending the value created from @a args.\r
-\r
- @param[in] args arguments to forward to a constructor of @ref basic_json\r
- @tparam Args compatible types to create a @ref basic_json object\r
-\r
- @return a pair consisting of an iterator to the inserted element, or the\r
- already-existing element if no insertion happened, and a bool\r
- denoting whether the insertion took place.\r
-\r
- @throw std::domain_error when called on a type other than JSON object or\r
- null; example: `"cannot use emplace() with number"`\r
-\r
- @complexity Logarithmic in the size of the container, O(log(`size()`)).\r
-\r
- @liveexample{The example shows how `emplace()` can be used to add elements\r
- to a JSON object. Note how the `null` value was silently converted to a\r
- JSON object. Further note how no value is added if there was already one\r
- value stored with the same key.,emplace}\r
-\r
- @since version 2.0.8\r
- */\r
- template<class... Args>\r
- std::pair<iterator, bool> emplace(Args&& ... args)\r
- {\r
- // emplace only works for null objects or arrays\r
- if (not(is_null() or is_object()))\r
- {\r
- JSON_THROW(std::domain_error("cannot use emplace() with " + type_name()));\r
- }\r
-\r
- // transform null object into an object\r
- if (is_null())\r
- {\r
- m_type = value_t::object;\r
- m_value = value_t::object;\r
- assert_invariant();\r
- }\r
-\r
- // add element to array (perfect forwarding)\r
- auto res = m_value.object->emplace(std::forward<Args>(args)...);\r
- // create result iterator and set iterator to the result of emplace\r
- auto it = begin();\r
- it.m_it.object_iterator = res.first;\r
-\r
- // return pair of iterator and boolean\r
- return {it, res.second};\r
- }\r
-\r
- /*!\r
- @brief inserts element\r
-\r
- Inserts element @a val before iterator @a pos.\r
-\r
- @param[in] pos iterator before which the content will be inserted; may be\r
- the end() iterator\r
- @param[in] val element to insert\r
- @return iterator pointing to the inserted @a val.\r
-\r
- @throw std::domain_error if called on JSON values other than arrays;\r
- example: `"cannot use insert() with string"`\r
- @throw std::domain_error if @a pos is not an iterator of *this; example:\r
- `"iterator does not fit current value"`\r
-\r
- @complexity Constant plus linear in the distance between @a pos and end of\r
- the container.\r
-\r
- @liveexample{The example shows how `insert()` is used.,insert}\r
-\r
- @since version 1.0.0\r
- */\r
- iterator insert(const_iterator pos, const basic_json& val)\r
- {\r
- // insert only works for arrays\r
- if (is_array())\r
- {\r
- // check if iterator pos fits to this JSON value\r
- if (pos.m_object != this)\r
- {\r
- JSON_THROW(std::domain_error("iterator does not fit current value"));\r
- }\r
-\r
- // insert to array and return iterator\r
- iterator result(this);\r
- result.m_it.array_iterator = m_value.array->insert(pos.m_it.array_iterator, val);\r
- return result;\r
- }\r
-\r
- JSON_THROW(std::domain_error("cannot use insert() with " + type_name()));\r
- }\r
-\r
- /*!\r
- @brief inserts element\r
- @copydoc insert(const_iterator, const basic_json&)\r
- */\r
- iterator insert(const_iterator pos, basic_json&& val)\r
- {\r
- return insert(pos, val);\r
- }\r
-\r
- /*!\r
- @brief inserts elements\r
-\r
- Inserts @a cnt copies of @a val before iterator @a pos.\r
-\r
- @param[in] pos iterator before which the content will be inserted; may be\r
- the end() iterator\r
- @param[in] cnt number of copies of @a val to insert\r
- @param[in] val element to insert\r
- @return iterator pointing to the first element inserted, or @a pos if\r
- `cnt==0`\r
-\r
- @throw std::domain_error if called on JSON values other than arrays;\r
- example: `"cannot use insert() with string"`\r
- @throw std::domain_error if @a pos is not an iterator of *this; example:\r
- `"iterator does not fit current value"`\r
-\r
- @complexity Linear in @a cnt plus linear in the distance between @a pos\r
- and end of the container.\r
-\r
- @liveexample{The example shows how `insert()` is used.,insert__count}\r
-\r
- @since version 1.0.0\r
- */\r
- iterator insert(const_iterator pos, size_type cnt, const basic_json& val)\r
- {\r
- // insert only works for arrays\r
- if (is_array())\r
- {\r
- // check if iterator pos fits to this JSON value\r
- if (pos.m_object != this)\r
- {\r
- JSON_THROW(std::domain_error("iterator does not fit current value"));\r
- }\r
-\r
- // insert to array and return iterator\r
- iterator result(this);\r
- result.m_it.array_iterator = m_value.array->insert(pos.m_it.array_iterator, cnt, val);\r
- return result;\r
- }\r
-\r
- JSON_THROW(std::domain_error("cannot use insert() with " + type_name()));\r
- }\r
-\r
- /*!\r
- @brief inserts elements\r
-\r
- Inserts elements from range `[first, last)` before iterator @a pos.\r
-\r
- @param[in] pos iterator before which the content will be inserted; may be\r
- the end() iterator\r
- @param[in] first begin of the range of elements to insert\r
- @param[in] last end of the range of elements to insert\r
-\r
- @throw std::domain_error if called on JSON values other than arrays;\r
- example: `"cannot use insert() with string"`\r
- @throw std::domain_error if @a pos is not an iterator of *this; example:\r
- `"iterator does not fit current value"`\r
- @throw std::domain_error if @a first and @a last do not belong to the same\r
- JSON value; example: `"iterators do not fit"`\r
- @throw std::domain_error if @a first or @a last are iterators into\r
- container for which insert is called; example: `"passed iterators may not\r
- belong to container"`\r
-\r
- @return iterator pointing to the first element inserted, or @a pos if\r
- `first==last`\r
-\r
- @complexity Linear in `std::distance(first, last)` plus linear in the\r
- distance between @a pos and end of the container.\r
-\r
- @liveexample{The example shows how `insert()` is used.,insert__range}\r
-\r
- @since version 1.0.0\r
- */\r
- iterator insert(const_iterator pos, const_iterator first, const_iterator last)\r
- {\r
- // insert only works for arrays\r
- if (not is_array())\r
- {\r
- JSON_THROW(std::domain_error("cannot use insert() with " + type_name()));\r
- }\r
-\r
- // check if iterator pos fits to this JSON value\r
- if (pos.m_object != this)\r
- {\r
- JSON_THROW(std::domain_error("iterator does not fit current value"));\r
- }\r
-\r
- // check if range iterators belong to the same JSON object\r
- if (first.m_object != last.m_object)\r
- {\r
- JSON_THROW(std::domain_error("iterators do not fit"));\r
- }\r
-\r
- if (first.m_object == this or last.m_object == this)\r
- {\r
- JSON_THROW(std::domain_error("passed iterators may not belong to container"));\r
- }\r
-\r
- // insert to array and return iterator\r
- iterator result(this);\r
- result.m_it.array_iterator = m_value.array->insert(\r
- pos.m_it.array_iterator,\r
- first.m_it.array_iterator,\r
- last.m_it.array_iterator);\r
- return result;\r
- }\r
-\r
- /*!\r
- @brief inserts elements\r
-\r
- Inserts elements from initializer list @a ilist before iterator @a pos.\r
-\r
- @param[in] pos iterator before which the content will be inserted; may be\r
- the end() iterator\r
- @param[in] ilist initializer list to insert the values from\r
-\r
- @throw std::domain_error if called on JSON values other than arrays;\r
- example: `"cannot use insert() with string"`\r
- @throw std::domain_error if @a pos is not an iterator of *this; example:\r
- `"iterator does not fit current value"`\r
-\r
- @return iterator pointing to the first element inserted, or @a pos if\r
- `ilist` is empty\r
-\r
- @complexity Linear in `ilist.size()` plus linear in the distance between\r
- @a pos and end of the container.\r
-\r
- @liveexample{The example shows how `insert()` is used.,insert__ilist}\r
-\r
- @since version 1.0.0\r
- */\r
- iterator insert(const_iterator pos, std::initializer_list<basic_json> ilist)\r
- {\r
- // insert only works for arrays\r
- if (not is_array())\r
- {\r
- JSON_THROW(std::domain_error("cannot use insert() with " + type_name()));\r
- }\r
-\r
- // check if iterator pos fits to this JSON value\r
- if (pos.m_object != this)\r
- {\r
- JSON_THROW(std::domain_error("iterator does not fit current value"));\r
- }\r
-\r
- // insert to array and return iterator\r
- iterator result(this);\r
- result.m_it.array_iterator = m_value.array->insert(pos.m_it.array_iterator, ilist);\r
- return result;\r
- }\r
-\r
- /*!\r
- @brief exchanges the values\r
-\r
- Exchanges the contents of the JSON value with those of @a other. Does not\r
- invoke any move, copy, or swap operations on individual elements. All\r
- iterators and references remain valid. The past-the-end iterator is\r
- invalidated.\r
-\r
- @param[in,out] other JSON value to exchange the contents with\r
-\r
- @complexity Constant.\r
-\r
- @liveexample{The example below shows how JSON values can be swapped with\r
- `swap()`.,swap__reference}\r
-\r
- @since version 1.0.0\r
- */\r
- void swap(reference other) noexcept (\r
- std::is_nothrow_move_constructible<value_t>::value and\r
- std::is_nothrow_move_assignable<value_t>::value and\r
- std::is_nothrow_move_constructible<json_value>::value and\r
- std::is_nothrow_move_assignable<json_value>::value\r
- )\r
- {\r
- std::swap(m_type, other.m_type);\r
- std::swap(m_value, other.m_value);\r
- assert_invariant();\r
- }\r
-\r
- /*!\r
- @brief exchanges the values\r
-\r
- Exchanges the contents of a JSON array with those of @a other. Does not\r
- invoke any move, copy, or swap operations on individual elements. All\r
- iterators and references remain valid. The past-the-end iterator is\r
- invalidated.\r
-\r
- @param[in,out] other array to exchange the contents with\r
-\r
- @throw std::domain_error when JSON value is not an array; example:\r
- `"cannot use swap() with string"`\r
-\r
- @complexity Constant.\r
-\r
- @liveexample{The example below shows how arrays can be swapped with\r
- `swap()`.,swap__array_t}\r
-\r
- @since version 1.0.0\r
- */\r
- void swap(array_t& other)\r
- {\r
- // swap only works for arrays\r
- if (is_array())\r
- {\r
- std::swap(*(m_value.array), other);\r
- }\r
- else\r
- {\r
- JSON_THROW(std::domain_error("cannot use swap() with " + type_name()));\r
- }\r
- }\r
-\r
- /*!\r
- @brief exchanges the values\r
-\r
- Exchanges the contents of a JSON object with those of @a other. Does not\r
- invoke any move, copy, or swap operations on individual elements. All\r
- iterators and references remain valid. The past-the-end iterator is\r
- invalidated.\r
-\r
- @param[in,out] other object to exchange the contents with\r
-\r
- @throw std::domain_error when JSON value is not an object; example:\r
- `"cannot use swap() with string"`\r
-\r
- @complexity Constant.\r
-\r
- @liveexample{The example below shows how objects can be swapped with\r
- `swap()`.,swap__object_t}\r
-\r
- @since version 1.0.0\r
- */\r
- void swap(object_t& other)\r
- {\r
- // swap only works for objects\r
- if (is_object())\r
- {\r
- std::swap(*(m_value.object), other);\r
- }\r
- else\r
- {\r
- JSON_THROW(std::domain_error("cannot use swap() with " + type_name()));\r
- }\r
- }\r
-\r
- /*!\r
- @brief exchanges the values\r
-\r
- Exchanges the contents of a JSON string with those of @a other. Does not\r
- invoke any move, copy, or swap operations on individual elements. All\r
- iterators and references remain valid. The past-the-end iterator is\r
- invalidated.\r
-\r
- @param[in,out] other string to exchange the contents with\r
-\r
- @throw std::domain_error when JSON value is not a string; example: `"cannot\r
- use swap() with boolean"`\r
-\r
- @complexity Constant.\r
-\r
- @liveexample{The example below shows how strings can be swapped with\r
- `swap()`.,swap__string_t}\r
-\r
- @since version 1.0.0\r
- */\r
- void swap(string_t& other)\r
- {\r
- // swap only works for strings\r
- if (is_string())\r
- {\r
- std::swap(*(m_value.string), other);\r
- }\r
- else\r
- {\r
- JSON_THROW(std::domain_error("cannot use swap() with " + type_name()));\r
- }\r
- }\r
-\r
- /// @}\r
-\r
- public:\r
- //////////////////////////////////////////\r
- // lexicographical comparison operators //\r
- //////////////////////////////////////////\r
-\r
- /// @name lexicographical comparison operators\r
- /// @{\r
-\r
- /*!\r
- @brief comparison: equal\r
-\r
- Compares two JSON values for equality according to the following rules:\r
- - Two JSON values are equal if (1) they are from the same type and (2)\r
- their stored values are the same.\r
- - Integer and floating-point numbers are automatically converted before\r
- comparison. Floating-point numbers are compared indirectly: two\r
- floating-point numbers `f1` and `f2` are considered equal if neither\r
- `f1 > f2` nor `f2 > f1` holds.\r
- - Two JSON null values are equal.\r
-\r
- @param[in] lhs first JSON value to consider\r
- @param[in] rhs second JSON value to consider\r
- @return whether the values @a lhs and @a rhs are equal\r
-\r
- @complexity Linear.\r
-\r
- @liveexample{The example demonstrates comparing several JSON\r
- types.,operator__equal}\r
-\r
- @since version 1.0.0\r
- */\r
- friend bool operator==(const_reference lhs, const_reference rhs) noexcept\r
- {\r
- const auto lhs_type = lhs.type();\r
- const auto rhs_type = rhs.type();\r
-\r
- if (lhs_type == rhs_type)\r
- {\r
- switch (lhs_type)\r
- {\r
- case value_t::array:\r
- {\r
- return *lhs.m_value.array == *rhs.m_value.array;\r
- }\r
- case value_t::object:\r
- {\r
- return *lhs.m_value.object == *rhs.m_value.object;\r
- }\r
- case value_t::null:\r
- {\r
- return true;\r
- }\r
- case value_t::string:\r
- {\r
- return *lhs.m_value.string == *rhs.m_value.string;\r
- }\r
- case value_t::boolean:\r
- {\r
- return lhs.m_value.boolean == rhs.m_value.boolean;\r
- }\r
- case value_t::number_integer:\r
- {\r
- return lhs.m_value.number_integer == rhs.m_value.number_integer;\r
- }\r
- case value_t::number_unsigned:\r
- {\r
- return lhs.m_value.number_unsigned == rhs.m_value.number_unsigned;\r
- }\r
- case value_t::number_float:\r
- {\r
- return lhs.m_value.number_float == rhs.m_value.number_float;\r
- }\r
- default:\r
- {\r
- return false;\r
- }\r
- }\r
- }\r
- else if (lhs_type == value_t::number_integer and rhs_type == value_t::number_float)\r
- {\r
- return static_cast<number_float_t>(lhs.m_value.number_integer) == rhs.m_value.number_float;\r
- }\r
- else if (lhs_type == value_t::number_float and rhs_type == value_t::number_integer)\r
- {\r
- return lhs.m_value.number_float == static_cast<number_float_t>(rhs.m_value.number_integer);\r
- }\r
- else if (lhs_type == value_t::number_unsigned and rhs_type == value_t::number_float)\r
- {\r
- return static_cast<number_float_t>(lhs.m_value.number_unsigned) == rhs.m_value.number_float;\r
- }\r
- else if (lhs_type == value_t::number_float and rhs_type == value_t::number_unsigned)\r
- {\r
- return lhs.m_value.number_float == static_cast<number_float_t>(rhs.m_value.number_unsigned);\r
- }\r
- else if (lhs_type == value_t::number_unsigned and rhs_type == value_t::number_integer)\r
- {\r
- return static_cast<number_integer_t>(lhs.m_value.number_unsigned) == rhs.m_value.number_integer;\r
- }\r
- else if (lhs_type == value_t::number_integer and rhs_type == value_t::number_unsigned)\r
- {\r
- return lhs.m_value.number_integer == static_cast<number_integer_t>(rhs.m_value.number_unsigned);\r
- }\r
-\r
- return false;\r
- }\r
-\r
- /*!\r
- @brief comparison: equal\r
- @copydoc operator==(const_reference, const_reference)\r
- */\r
- template<typename ScalarType, typename std::enable_if<\r
- std::is_scalar<ScalarType>::value, int>::type = 0>\r
- friend bool operator==(const_reference lhs, const ScalarType rhs) noexcept\r
- {\r
- return (lhs == basic_json(rhs));\r
- }\r
-\r
- /*!\r
- @brief comparison: equal\r
- @copydoc operator==(const_reference, const_reference)\r
- */\r
- template<typename ScalarType, typename std::enable_if<\r
- std::is_scalar<ScalarType>::value, int>::type = 0>\r
- friend bool operator==(const ScalarType lhs, const_reference rhs) noexcept\r
- {\r
- return (basic_json(lhs) == rhs);\r
- }\r
-\r
- /*!\r
- @brief comparison: not equal\r
-\r
- Compares two JSON values for inequality by calculating `not (lhs == rhs)`.\r
-\r
- @param[in] lhs first JSON value to consider\r
- @param[in] rhs second JSON value to consider\r
- @return whether the values @a lhs and @a rhs are not equal\r
-\r
- @complexity Linear.\r
-\r
- @liveexample{The example demonstrates comparing several JSON\r
- types.,operator__notequal}\r
-\r
- @since version 1.0.0\r
- */\r
- friend bool operator!=(const_reference lhs, const_reference rhs) noexcept\r
- {\r
- return not (lhs == rhs);\r
- }\r
-\r
- /*!\r
- @brief comparison: not equal\r
- @copydoc operator!=(const_reference, const_reference)\r
- */\r
- template<typename ScalarType, typename std::enable_if<\r
- std::is_scalar<ScalarType>::value, int>::type = 0>\r
- friend bool operator!=(const_reference lhs, const ScalarType rhs) noexcept\r
- {\r
- return (lhs != basic_json(rhs));\r
- }\r
-\r
- /*!\r
- @brief comparison: not equal\r
- @copydoc operator!=(const_reference, const_reference)\r
- */\r
- template<typename ScalarType, typename std::enable_if<\r
- std::is_scalar<ScalarType>::value, int>::type = 0>\r
- friend bool operator!=(const ScalarType lhs, const_reference rhs) noexcept\r
- {\r
- return (basic_json(lhs) != rhs);\r
- }\r
-\r
- /*!\r
- @brief comparison: less than\r
-\r
- Compares whether one JSON value @a lhs is less than another JSON value @a\r
- rhs according to the following rules:\r
- - If @a lhs and @a rhs have the same type, the values are compared using\r
- the default `<` operator.\r
- - Integer and floating-point numbers are automatically converted before\r
- comparison\r
- - In case @a lhs and @a rhs have different types, the values are ignored\r
- and the order of the types is considered, see\r
- @ref operator<(const value_t, const value_t).\r
-\r
- @param[in] lhs first JSON value to consider\r
- @param[in] rhs second JSON value to consider\r
- @return whether @a lhs is less than @a rhs\r
-\r
- @complexity Linear.\r
-\r
- @liveexample{The example demonstrates comparing several JSON\r
- types.,operator__less}\r
-\r
- @since version 1.0.0\r
- */\r
- friend bool operator<(const_reference lhs, const_reference rhs) noexcept\r
- {\r
- const auto lhs_type = lhs.type();\r
- const auto rhs_type = rhs.type();\r
-\r
- if (lhs_type == rhs_type)\r
- {\r
- switch (lhs_type)\r
- {\r
- case value_t::array:\r
- {\r
- return *lhs.m_value.array < *rhs.m_value.array;\r
- }\r
- case value_t::object:\r
- {\r
- return *lhs.m_value.object < *rhs.m_value.object;\r
- }\r
- case value_t::null:\r
- {\r
- return false;\r
- }\r
- case value_t::string:\r
- {\r
- return *lhs.m_value.string < *rhs.m_value.string;\r
- }\r
- case value_t::boolean:\r
- {\r
- return lhs.m_value.boolean < rhs.m_value.boolean;\r
- }\r
- case value_t::number_integer:\r
- {\r
- return lhs.m_value.number_integer < rhs.m_value.number_integer;\r
- }\r
- case value_t::number_unsigned:\r
- {\r
- return lhs.m_value.number_unsigned < rhs.m_value.number_unsigned;\r
- }\r
- case value_t::number_float:\r
- {\r
- return lhs.m_value.number_float < rhs.m_value.number_float;\r
- }\r
- default:\r
- {\r
- return false;\r
- }\r
- }\r
- }\r
- else if (lhs_type == value_t::number_integer and rhs_type == value_t::number_float)\r
- {\r
- return static_cast<number_float_t>(lhs.m_value.number_integer) < rhs.m_value.number_float;\r
- }\r
- else if (lhs_type == value_t::number_float and rhs_type == value_t::number_integer)\r
- {\r
- return lhs.m_value.number_float < static_cast<number_float_t>(rhs.m_value.number_integer);\r
- }\r
- else if (lhs_type == value_t::number_unsigned and rhs_type == value_t::number_float)\r
- {\r
- return static_cast<number_float_t>(lhs.m_value.number_unsigned) < rhs.m_value.number_float;\r
- }\r
- else if (lhs_type == value_t::number_float and rhs_type == value_t::number_unsigned)\r
- {\r
- return lhs.m_value.number_float < static_cast<number_float_t>(rhs.m_value.number_unsigned);\r
- }\r
- else if (lhs_type == value_t::number_integer and rhs_type == value_t::number_unsigned)\r
- {\r
- return lhs.m_value.number_integer < static_cast<number_integer_t>(rhs.m_value.number_unsigned);\r
- }\r
- else if (lhs_type == value_t::number_unsigned and rhs_type == value_t::number_integer)\r
- {\r
- return static_cast<number_integer_t>(lhs.m_value.number_unsigned) < rhs.m_value.number_integer;\r
- }\r
-\r
- // We only reach this line if we cannot compare values. In that case,\r
- // we compare types. Note we have to call the operator explicitly,\r
- // because MSVC has problems otherwise.\r
- return operator<(lhs_type, rhs_type);\r
- }\r
-\r
- /*!\r
- @brief comparison: less than or equal\r
-\r
- Compares whether one JSON value @a lhs is less than or equal to another\r
- JSON value by calculating `not (rhs < lhs)`.\r
-\r
- @param[in] lhs first JSON value to consider\r
- @param[in] rhs second JSON value to consider\r
- @return whether @a lhs is less than or equal to @a rhs\r
-\r
- @complexity Linear.\r
-\r
- @liveexample{The example demonstrates comparing several JSON\r
- types.,operator__greater}\r
-\r
- @since version 1.0.0\r
- */\r
- friend bool operator<=(const_reference lhs, const_reference rhs) noexcept\r
- {\r
- return not (rhs < lhs);\r
- }\r
-\r
- /*!\r
- @brief comparison: greater than\r
-\r
- Compares whether one JSON value @a lhs is greater than another\r
- JSON value by calculating `not (lhs <= rhs)`.\r
-\r
- @param[in] lhs first JSON value to consider\r
- @param[in] rhs second JSON value to consider\r
- @return whether @a lhs is greater than to @a rhs\r
-\r
- @complexity Linear.\r
-\r
- @liveexample{The example demonstrates comparing several JSON\r
- types.,operator__lessequal}\r
-\r
- @since version 1.0.0\r
- */\r
- friend bool operator>(const_reference lhs, const_reference rhs) noexcept\r
- {\r
- return not (lhs <= rhs);\r
- }\r
-\r
- /*!\r
- @brief comparison: greater than or equal\r
-\r
- Compares whether one JSON value @a lhs is greater than or equal to another\r
- JSON value by calculating `not (lhs < rhs)`.\r
-\r
- @param[in] lhs first JSON value to consider\r
- @param[in] rhs second JSON value to consider\r
- @return whether @a lhs is greater than or equal to @a rhs\r
-\r
- @complexity Linear.\r
-\r
- @liveexample{The example demonstrates comparing several JSON\r
- types.,operator__greaterequal}\r
-\r
- @since version 1.0.0\r
- */\r
- friend bool operator>=(const_reference lhs, const_reference rhs) noexcept\r
- {\r
- return not (lhs < rhs);\r
- }\r
-\r
- /// @}\r
-\r
-\r
- ///////////////////\r
- // serialization //\r
- ///////////////////\r
-\r
- /// @name serialization\r
- /// @{\r
-\r
- /*!\r
- @brief serialize to stream\r
-\r
- Serialize the given JSON value @a j to the output stream @a o. The JSON\r
- value will be serialized using the @ref dump member function. The\r
- indentation of the output can be controlled with the member variable\r
- `width` of the output stream @a o. For instance, using the manipulator\r
- `std::setw(4)` on @a o sets the indentation level to `4` and the\r
- serialization result is the same as calling `dump(4)`.\r
-\r
- @param[in,out] o stream to serialize to\r
- @param[in] j JSON value to serialize\r
-\r
- @return the stream @a o\r
-\r
- @complexity Linear.\r
-\r
- @liveexample{The example below shows the serialization with different\r
- parameters to `width` to adjust the indentation level.,operator_serialize}\r
-\r
- @since version 1.0.0\r
- */\r
- friend std::ostream& operator<<(std::ostream& o, const basic_json& j)\r
- {\r
- // read width member and use it as indentation parameter if nonzero\r
- const bool pretty_print = (o.width() > 0);\r
- const auto indentation = (pretty_print ? o.width() : 0);\r
-\r
- // reset width to 0 for subsequent calls to this stream\r
- o.width(0);\r
-\r
- // do the actual serialization\r
- j.dump(o, pretty_print, static_cast<unsigned int>(indentation));\r
-\r
- return o;\r
- }\r
-\r
- /*!\r
- @brief serialize to stream\r
- @copydoc operator<<(std::ostream&, const basic_json&)\r
- */\r
- friend std::ostream& operator>>(const basic_json& j, std::ostream& o)\r
- {\r
- return o << j;\r
- }\r
-\r
- /// @}\r
-\r
-\r
- /////////////////////\r
- // deserialization //\r
- /////////////////////\r
-\r
- /// @name deserialization\r
- /// @{\r
-\r
- /*!\r
- @brief deserialize from an array\r
-\r
- This function reads from an array of 1-byte values.\r
-\r
- @pre Each element of the container has a size of 1 byte. Violating this\r
- precondition yields undefined behavior. **This precondition is enforced\r
- with a static assertion.**\r
-\r
- @param[in] array array to read from\r
- @param[in] cb a parser callback function of type @ref parser_callback_t\r
- which is used to control the deserialization by filtering unwanted values\r
- (optional)\r
-\r
- @return result of the deserialization\r
-\r
- @complexity Linear in the length of the input. The parser is a predictive\r
- LL(1) parser. The complexity can be higher if the parser callback function\r
- @a cb has a super-linear complexity.\r
-\r
- @note A UTF-8 byte order mark is silently ignored.\r
-\r
- @liveexample{The example below demonstrates the `parse()` function reading\r
- from an array.,parse__array__parser_callback_t}\r
-\r
- @since version 2.0.3\r
- */\r
- template<class T, std::size_t N>\r
- static basic_json parse(T (&array)[N],\r
- const parser_callback_t cb = nullptr)\r
- {\r
- // delegate the call to the iterator-range parse overload\r
- return parse(std::begin(array), std::end(array), cb);\r
- }\r
-\r
- /*!\r
- @brief deserialize from string literal\r
-\r
- @tparam CharT character/literal type with size of 1 byte\r
- @param[in] s string literal to read a serialized JSON value from\r
- @param[in] cb a parser callback function of type @ref parser_callback_t\r
- which is used to control the deserialization by filtering unwanted values\r
- (optional)\r
-\r
- @return result of the deserialization\r
-\r
- @complexity Linear in the length of the input. The parser is a predictive\r
- LL(1) parser. The complexity can be higher if the parser callback function\r
- @a cb has a super-linear complexity.\r
-\r
- @note A UTF-8 byte order mark is silently ignored.\r
- @note String containers like `std::string` or @ref string_t can be parsed\r
- with @ref parse(const ContiguousContainer&, const parser_callback_t)\r
-\r
- @liveexample{The example below demonstrates the `parse()` function with\r
- and without callback function.,parse__string__parser_callback_t}\r
-\r
- @sa @ref parse(std::istream&, const parser_callback_t) for a version that\r
- reads from an input stream\r
-\r
- @since version 1.0.0 (originally for @ref string_t)\r
- */\r
- template<typename CharT, typename std::enable_if<\r
- std::is_pointer<CharT>::value and\r
- std::is_integral<typename std::remove_pointer<CharT>::type>::value and\r
- sizeof(typename std::remove_pointer<CharT>::type) == 1, int>::type = 0>\r
- static basic_json parse(const CharT s,\r
- const parser_callback_t cb = nullptr)\r
- {\r
- return parser(reinterpret_cast<const char*>(s), cb).parse();\r
- }\r
-\r
- /*!\r
- @brief deserialize from stream\r
-\r
- @param[in,out] i stream to read a serialized JSON value from\r
- @param[in] cb a parser callback function of type @ref parser_callback_t\r
- which is used to control the deserialization by filtering unwanted values\r
- (optional)\r
-\r
- @return result of the deserialization\r
-\r
- @complexity Linear in the length of the input. The parser is a predictive\r
- LL(1) parser. The complexity can be higher if the parser callback function\r
- @a cb has a super-linear complexity.\r
-\r
- @note A UTF-8 byte order mark is silently ignored.\r
-\r
- @liveexample{The example below demonstrates the `parse()` function with\r
- and without callback function.,parse__istream__parser_callback_t}\r
-\r
- @sa @ref parse(const CharT, const parser_callback_t) for a version\r
- that reads from a string\r
-\r
- @since version 1.0.0\r
- */\r
- static basic_json parse(std::istream& i,\r
- const parser_callback_t cb = nullptr)\r
- {\r
- return parser(i, cb).parse();\r
- }\r
-\r
- /*!\r
- @copydoc parse(std::istream&, const parser_callback_t)\r
- */\r
- static basic_json parse(std::istream&& i,\r
- const parser_callback_t cb = nullptr)\r
- {\r
- return parser(i, cb).parse();\r
- }\r
-\r
- /*!\r
- @brief deserialize from an iterator range with contiguous storage\r
-\r
- This function reads from an iterator range of a container with contiguous\r
- storage of 1-byte values. Compatible container types include\r
- `std::vector`, `std::string`, `std::array`, `std::valarray`, and\r
- `std::initializer_list`. Furthermore, C-style arrays can be used with\r
- `std::begin()`/`std::end()`. User-defined containers can be used as long\r
- as they implement random-access iterators and a contiguous storage.\r
-\r
- @pre The iterator range is contiguous. Violating this precondition yields\r
- undefined behavior. **This precondition is enforced with an assertion.**\r
- @pre Each element in the range has a size of 1 byte. Violating this\r
- precondition yields undefined behavior. **This precondition is enforced\r
- with a static assertion.**\r
-\r
- @warning There is no way to enforce all preconditions at compile-time. If\r
- the function is called with noncompliant iterators and with\r
- assertions switched off, the behavior is undefined and will most\r
- likely yield segmentation violation.\r
-\r
- @tparam IteratorType iterator of container with contiguous storage\r
- @param[in] first begin of the range to parse (included)\r
- @param[in] last end of the range to parse (excluded)\r
- @param[in] cb a parser callback function of type @ref parser_callback_t\r
- which is used to control the deserialization by filtering unwanted values\r
- (optional)\r
-\r
- @return result of the deserialization\r
-\r
- @complexity Linear in the length of the input. The parser is a predictive\r
- LL(1) parser. The complexity can be higher if the parser callback function\r
- @a cb has a super-linear complexity.\r
-\r
- @note A UTF-8 byte order mark is silently ignored.\r
-\r
- @liveexample{The example below demonstrates the `parse()` function reading\r
- from an iterator range.,parse__iteratortype__parser_callback_t}\r
-\r
- @since version 2.0.3\r
- */\r
- template<class IteratorType, typename std::enable_if<\r
- std::is_base_of<\r
- std::random_access_iterator_tag,\r
- typename std::iterator_traits<IteratorType>::iterator_category>::value, int>::type = 0>\r
- static basic_json parse(IteratorType first, IteratorType last,\r
- const parser_callback_t cb = nullptr)\r
- {\r
- // assertion to check that the iterator range is indeed contiguous,\r
- // see http://stackoverflow.com/a/35008842/266378 for more discussion\r
- assert(std::accumulate(first, last, std::pair<bool, int>(true, 0),\r
- [&first](std::pair<bool, int> res, decltype(*first) val)\r
- {\r
- res.first &= (val == *(std::next(std::addressof(*first), res.second++)));\r
- return res;\r
- }).first);\r
-\r
- // assertion to check that each element is 1 byte long\r
- static_assert(sizeof(typename std::iterator_traits<IteratorType>::value_type) == 1,\r
- "each element in the iterator range must have the size of 1 byte");\r
-\r
- // if iterator range is empty, create a parser with an empty string\r
- // to generate "unexpected EOF" error message\r
- if (std::distance(first, last) <= 0)\r
- {\r
- return parser("").parse();\r
- }\r
-\r
- return parser(first, last, cb).parse();\r
- }\r
-\r
- /*!\r
- @brief deserialize from a container with contiguous storage\r
-\r
- This function reads from a container with contiguous storage of 1-byte\r
- values. Compatible container types include `std::vector`, `std::string`,\r
- `std::array`, and `std::initializer_list`. User-defined containers can be\r
- used as long as they implement random-access iterators and a contiguous\r
- storage.\r
-\r
- @pre The container storage is contiguous. Violating this precondition\r
- yields undefined behavior. **This precondition is enforced with an\r
- assertion.**\r
- @pre Each element of the container has a size of 1 byte. Violating this\r
- precondition yields undefined behavior. **This precondition is enforced\r
- with a static assertion.**\r
-\r
- @warning There is no way to enforce all preconditions at compile-time. If\r
- the function is called with a noncompliant container and with\r
- assertions switched off, the behavior is undefined and will most\r
- likely yield segmentation violation.\r
-\r
- @tparam ContiguousContainer container type with contiguous storage\r
- @param[in] c container to read from\r
- @param[in] cb a parser callback function of type @ref parser_callback_t\r
- which is used to control the deserialization by filtering unwanted values\r
- (optional)\r
-\r
- @return result of the deserialization\r
-\r
- @complexity Linear in the length of the input. The parser is a predictive\r
- LL(1) parser. The complexity can be higher if the parser callback function\r
- @a cb has a super-linear complexity.\r
-\r
- @note A UTF-8 byte order mark is silently ignored.\r
-\r
- @liveexample{The example below demonstrates the `parse()` function reading\r
- from a contiguous container.,parse__contiguouscontainer__parser_callback_t}\r
-\r
- @since version 2.0.3\r
- */\r
- template<class ContiguousContainer, typename std::enable_if<\r
- not std::is_pointer<ContiguousContainer>::value and\r
- std::is_base_of<\r
- std::random_access_iterator_tag,\r
- typename std::iterator_traits<decltype(std::begin(std::declval<ContiguousContainer const>()))>::iterator_category>::value\r
- , int>::type = 0>\r
- static basic_json parse(const ContiguousContainer& c,\r
- const parser_callback_t cb = nullptr)\r
- {\r
- // delegate the call to the iterator-range parse overload\r
- return parse(std::begin(c), std::end(c), cb);\r
- }\r
-\r
- /*!\r
- @brief deserialize from stream\r
-\r
- Deserializes an input stream to a JSON value.\r
-\r
- @param[in,out] i input stream to read a serialized JSON value from\r
- @param[in,out] j JSON value to write the deserialized input to\r
-\r
- @throw std::invalid_argument in case of parse errors\r
-\r
- @complexity Linear in the length of the input. The parser is a predictive\r
- LL(1) parser.\r
-\r
- @note A UTF-8 byte order mark is silently ignored.\r
-\r
- @liveexample{The example below shows how a JSON value is constructed by\r
- reading a serialization from a stream.,operator_deserialize}\r
-\r
- @sa parse(std::istream&, const parser_callback_t) for a variant with a\r
- parser callback function to filter values while parsing\r
-\r
- @since version 1.0.0\r
- */\r
- friend std::istream& operator<<(basic_json& j, std::istream& i)\r
- {\r
- j = parser(i).parse();\r
- return i;\r
- }\r
-\r
- /*!\r
- @brief deserialize from stream\r
- @copydoc operator<<(basic_json&, std::istream&)\r
- */\r
- friend std::istream& operator>>(std::istream& i, basic_json& j)\r
- {\r
- j = parser(i).parse();\r
- return i;\r
- }\r
-\r
- /// @}\r
-\r
- //////////////////////////////////////////\r
- // binary serialization/deserialization //\r
- //////////////////////////////////////////\r
-\r
- /// @name binary serialization/deserialization support\r
- /// @{\r
-\r
- private:\r
- /*!\r
- @note Some code in the switch cases has been copied, because otherwise\r
- copilers would complain about implicit fallthrough and there is no\r
- portable attribute to mute such warnings.\r
- */\r
- template<typename T>\r
- static void add_to_vector(std::vector<uint8_t>& vec, size_t bytes, const T number)\r
- {\r
- assert(bytes == 1 or bytes == 2 or bytes == 4 or bytes == 8);\r
-\r
- switch (bytes)\r
- {\r
- case 8:\r
- {\r
- vec.push_back(static_cast<uint8_t>((static_cast<uint64_t>(number) >> 070) & 0xff));\r
- vec.push_back(static_cast<uint8_t>((static_cast<uint64_t>(number) >> 060) & 0xff));\r
- vec.push_back(static_cast<uint8_t>((static_cast<uint64_t>(number) >> 050) & 0xff));\r
- vec.push_back(static_cast<uint8_t>((static_cast<uint64_t>(number) >> 040) & 0xff));\r
- vec.push_back(static_cast<uint8_t>((number >> 030) & 0xff));\r
- vec.push_back(static_cast<uint8_t>((number >> 020) & 0xff));\r
- vec.push_back(static_cast<uint8_t>((number >> 010) & 0xff));\r
- vec.push_back(static_cast<uint8_t>(number & 0xff));\r
- break;\r
- }\r
-\r
- case 4:\r
- {\r
- vec.push_back(static_cast<uint8_t>((number >> 030) & 0xff));\r
- vec.push_back(static_cast<uint8_t>((number >> 020) & 0xff));\r
- vec.push_back(static_cast<uint8_t>((number >> 010) & 0xff));\r
- vec.push_back(static_cast<uint8_t>(number & 0xff));\r
- break;\r
- }\r
-\r
- case 2:\r
- {\r
- vec.push_back(static_cast<uint8_t>((number >> 010) & 0xff));\r
- vec.push_back(static_cast<uint8_t>(number & 0xff));\r
- break;\r
- }\r
-\r
- case 1:\r
- {\r
- vec.push_back(static_cast<uint8_t>(number & 0xff));\r
- break;\r
- }\r
- }\r
- }\r
-\r
- /*!\r
- @brief take sufficient bytes from a vector to fill an integer variable\r
-\r
- In the context of binary serialization formats, we need to read several\r
- bytes from a byte vector and combine them to multi-byte integral data\r
- types.\r
-\r
- @param[in] vec byte vector to read from\r
- @param[in] current_index the position in the vector after which to read\r
-\r
- @return the next sizeof(T) bytes from @a vec, in reverse order as T\r
-\r
- @tparam T the integral return type\r
-\r
- @throw std::out_of_range if there are less than sizeof(T)+1 bytes in the\r
- vector @a vec to read\r
-\r
- In the for loop, the bytes from the vector are copied in reverse order into\r
- the return value. In the figures below, let sizeof(T)=4 and `i` be the loop\r
- variable.\r
-\r
- Precondition:\r
-\r
- vec: | | | a | b | c | d | T: | | | | |\r
- ^ ^ ^ ^\r
- current_index i ptr sizeof(T)\r
-\r
- Postcondition:\r
-\r
- vec: | | | a | b | c | d | T: | d | c | b | a |\r
- ^ ^ ^\r
- | i ptr\r
- current_index\r
-\r
- @sa Code adapted from <http://stackoverflow.com/a/41031865/266378>.\r
- */\r
- template<typename T>\r
- static T get_from_vector(const std::vector<uint8_t>& vec, const size_t current_index)\r
- {\r
- if (current_index + sizeof(T) + 1 > vec.size())\r
- {\r
- JSON_THROW(std::out_of_range("cannot read " + std::to_string(sizeof(T)) + " bytes from vector"));\r
- }\r
-\r
- T result;\r
- auto* ptr = reinterpret_cast<uint8_t*>(&result);\r
- for (size_t i = 0; i < sizeof(T); ++i)\r
- {\r
- *ptr++ = vec[current_index + sizeof(T) - i];\r
- }\r
- return result;\r
- }\r
-\r
- /*!\r
- @brief create a MessagePack serialization of a given JSON value\r
-\r
- This is a straightforward implementation of the MessagePack specification.\r
-\r
- @param[in] j JSON value to serialize\r
- @param[in,out] v byte vector to write the serialization to\r
-\r
- @sa https://github.com/msgpack/msgpack/blob/master/spec.md\r
- */\r
- static void to_msgpack_internal(const basic_json& j, std::vector<uint8_t>& v)\r
- {\r
- switch (j.type())\r
- {\r
- case value_t::null:\r
- {\r
- // nil\r
- v.push_back(0xc0);\r
- break;\r
- }\r
-\r
- case value_t::boolean:\r
- {\r
- // true and false\r
- v.push_back(j.m_value.boolean ? 0xc3 : 0xc2);\r
- break;\r
- }\r
-\r
- case value_t::number_integer:\r
- {\r
- if (j.m_value.number_integer >= 0)\r
- {\r
- // MessagePack does not differentiate between positive\r
- // signed integers and unsigned integers. Therefore, we\r
- // used the code from the value_t::number_unsigned case\r
- // here.\r
- if (j.m_value.number_unsigned < 128)\r
- {\r
- // positive fixnum\r
- add_to_vector(v, 1, j.m_value.number_unsigned);\r
- }\r
- else if (j.m_value.number_unsigned <= std::numeric_limits<uint8_t>::max())\r
- {\r
- // uint 8\r
- v.push_back(0xcc);\r
- add_to_vector(v, 1, j.m_value.number_unsigned);\r
- }\r
- else if (j.m_value.number_unsigned <= std::numeric_limits<uint16_t>::max())\r
- {\r
- // uint 16\r
- v.push_back(0xcd);\r
- add_to_vector(v, 2, j.m_value.number_unsigned);\r
- }\r
- else if (j.m_value.number_unsigned <= std::numeric_limits<uint32_t>::max())\r
- {\r
- // uint 32\r
- v.push_back(0xce);\r
- add_to_vector(v, 4, j.m_value.number_unsigned);\r
- }\r
- else if (j.m_value.number_unsigned <= std::numeric_limits<uint64_t>::max())\r
- {\r
- // uint 64\r
- v.push_back(0xcf);\r
- add_to_vector(v, 8, j.m_value.number_unsigned);\r
- }\r
- }\r
- else\r
- {\r
- if (j.m_value.number_integer >= -32)\r
- {\r
- // negative fixnum\r
- add_to_vector(v, 1, j.m_value.number_integer);\r
- }\r
- else if (j.m_value.number_integer >= std::numeric_limits<int8_t>::min() and j.m_value.number_integer <= std::numeric_limits<int8_t>::max())\r
- {\r
- // int 8\r
- v.push_back(0xd0);\r
- add_to_vector(v, 1, j.m_value.number_integer);\r
- }\r
- else if (j.m_value.number_integer >= std::numeric_limits<int16_t>::min() and j.m_value.number_integer <= std::numeric_limits<int16_t>::max())\r
- {\r
- // int 16\r
- v.push_back(0xd1);\r
- add_to_vector(v, 2, j.m_value.number_integer);\r
- }\r
- else if (j.m_value.number_integer >= std::numeric_limits<int32_t>::min() and j.m_value.number_integer <= std::numeric_limits<int32_t>::max())\r
- {\r
- // int 32\r
- v.push_back(0xd2);\r
- add_to_vector(v, 4, j.m_value.number_integer);\r
- }\r
- else if (j.m_value.number_integer >= std::numeric_limits<int64_t>::min() and j.m_value.number_integer <= std::numeric_limits<int64_t>::max())\r
- {\r
- // int 64\r
- v.push_back(0xd3);\r
- add_to_vector(v, 8, j.m_value.number_integer);\r
- }\r
- }\r
- break;\r
- }\r
-\r
- case value_t::number_unsigned:\r
- {\r
- if (j.m_value.number_unsigned < 128)\r
- {\r
- // positive fixnum\r
- add_to_vector(v, 1, j.m_value.number_unsigned);\r
- }\r
- else if (j.m_value.number_unsigned <= std::numeric_limits<uint8_t>::max())\r
- {\r
- // uint 8\r
- v.push_back(0xcc);\r
- add_to_vector(v, 1, j.m_value.number_unsigned);\r
- }\r
- else if (j.m_value.number_unsigned <= std::numeric_limits<uint16_t>::max())\r
- {\r
- // uint 16\r
- v.push_back(0xcd);\r
- add_to_vector(v, 2, j.m_value.number_unsigned);\r
- }\r
- else if (j.m_value.number_unsigned <= std::numeric_limits<uint32_t>::max())\r
- {\r
- // uint 32\r
- v.push_back(0xce);\r
- add_to_vector(v, 4, j.m_value.number_unsigned);\r
- }\r
- else if (j.m_value.number_unsigned <= std::numeric_limits<uint64_t>::max())\r
- {\r
- // uint 64\r
- v.push_back(0xcf);\r
- add_to_vector(v, 8, j.m_value.number_unsigned);\r
- }\r
- break;\r
- }\r
-\r
- case value_t::number_float:\r
- {\r
- // float 64\r
- v.push_back(0xcb);\r
- const auto* helper = reinterpret_cast<const uint8_t*>(&(j.m_value.number_float));\r
- for (size_t i = 0; i < 8; ++i)\r
- {\r
- v.push_back(helper[7 - i]);\r
- }\r
- break;\r
- }\r
-\r
- case value_t::string:\r
- {\r
- const auto N = j.m_value.string->size();\r
- if (N <= 31)\r
- {\r
- // fixstr\r
- v.push_back(static_cast<uint8_t>(0xa0 | N));\r
- }\r
- else if (N <= 255)\r
- {\r
- // str 8\r
- v.push_back(0xd9);\r
- add_to_vector(v, 1, N);\r
- }\r
- else if (N <= 65535)\r
- {\r
- // str 16\r
- v.push_back(0xda);\r
- add_to_vector(v, 2, N);\r
- }\r
- else if (N <= 4294967295)\r
- {\r
- // str 32\r
- v.push_back(0xdb);\r
- add_to_vector(v, 4, N);\r
- }\r
-\r
- // append string\r
- std::copy(j.m_value.string->begin(), j.m_value.string->end(),\r
- std::back_inserter(v));\r
- break;\r
- }\r
-\r
- case value_t::array:\r
- {\r
- const auto N = j.m_value.array->size();\r
- if (N <= 15)\r
- {\r
- // fixarray\r
- v.push_back(static_cast<uint8_t>(0x90 | N));\r
- }\r
- else if (N <= 0xffff)\r
- {\r
- // array 16\r
- v.push_back(0xdc);\r
- add_to_vector(v, 2, N);\r
- }\r
- else if (N <= 0xffffffff)\r
- {\r
- // array 32\r
- v.push_back(0xdd);\r
- add_to_vector(v, 4, N);\r
- }\r
-\r
- // append each element\r
- for (const auto& el : *j.m_value.array)\r
- {\r
- to_msgpack_internal(el, v);\r
- }\r
- break;\r
- }\r
-\r
- case value_t::object:\r
- {\r
- const auto N = j.m_value.object->size();\r
- if (N <= 15)\r
- {\r
- // fixmap\r
- v.push_back(static_cast<uint8_t>(0x80 | (N & 0xf)));\r
- }\r
- else if (N <= 65535)\r
- {\r
- // map 16\r
- v.push_back(0xde);\r
- add_to_vector(v, 2, N);\r
- }\r
- else if (N <= 4294967295)\r
- {\r
- // map 32\r
- v.push_back(0xdf);\r
- add_to_vector(v, 4, N);\r
- }\r
-\r
- // append each element\r
- for (const auto& el : *j.m_value.object)\r
- {\r
- to_msgpack_internal(el.first, v);\r
- to_msgpack_internal(el.second, v);\r
- }\r
- break;\r
- }\r
-\r
- default:\r
- {\r
- break;\r
- }\r
- }\r
- }\r
-\r
- /*!\r
- @brief create a CBOR serialization of a given JSON value\r
-\r
- This is a straightforward implementation of the CBOR specification.\r
-\r
- @param[in] j JSON value to serialize\r
- @param[in,out] v byte vector to write the serialization to\r
-\r
- @sa https://tools.ietf.org/html/rfc7049\r
- */\r
- static void to_cbor_internal(const basic_json& j, std::vector<uint8_t>& v)\r
- {\r
- switch (j.type())\r
- {\r
- case value_t::null:\r
- {\r
- v.push_back(0xf6);\r
- break;\r
- }\r
-\r
- case value_t::boolean:\r
- {\r
- v.push_back(j.m_value.boolean ? 0xf5 : 0xf4);\r
- break;\r
- }\r
-\r
- case value_t::number_integer:\r
- {\r
- if (j.m_value.number_integer >= 0)\r
- {\r
- // CBOR does not differentiate between positive signed\r
- // integers and unsigned integers. Therefore, we used the\r
- // code from the value_t::number_unsigned case here.\r
- if (j.m_value.number_integer <= 0x17)\r
- {\r
- add_to_vector(v, 1, j.m_value.number_integer);\r
- }\r
- else if (j.m_value.number_integer <= std::numeric_limits<uint8_t>::max())\r
- {\r
- v.push_back(0x18);\r
- // one-byte uint8_t\r
- add_to_vector(v, 1, j.m_value.number_integer);\r
- }\r
- else if (j.m_value.number_integer <= std::numeric_limits<uint16_t>::max())\r
- {\r
- v.push_back(0x19);\r
- // two-byte uint16_t\r
- add_to_vector(v, 2, j.m_value.number_integer);\r
- }\r
- else if (j.m_value.number_integer <= std::numeric_limits<uint32_t>::max())\r
- {\r
- v.push_back(0x1a);\r
- // four-byte uint32_t\r
- add_to_vector(v, 4, j.m_value.number_integer);\r
- }\r
- else\r
- {\r
- v.push_back(0x1b);\r
- // eight-byte uint64_t\r
- add_to_vector(v, 8, j.m_value.number_integer);\r
- }\r
- }\r
- else\r
- {\r
- // The conversions below encode the sign in the first\r
- // byte, and the value is converted to a positive number.\r
- const auto positive_number = -1 - j.m_value.number_integer;\r
- if (j.m_value.number_integer >= -24)\r
- {\r
- v.push_back(static_cast<uint8_t>(0x20 + positive_number));\r
- }\r
- else if (positive_number <= std::numeric_limits<uint8_t>::max())\r
- {\r
- // int 8\r
- v.push_back(0x38);\r
- add_to_vector(v, 1, positive_number);\r
- }\r
- else if (positive_number <= std::numeric_limits<uint16_t>::max())\r
- {\r
- // int 16\r
- v.push_back(0x39);\r
- add_to_vector(v, 2, positive_number);\r
- }\r
- else if (positive_number <= std::numeric_limits<uint32_t>::max())\r
- {\r
- // int 32\r
- v.push_back(0x3a);\r
- add_to_vector(v, 4, positive_number);\r
- }\r
- else\r
- {\r
- // int 64\r
- v.push_back(0x3b);\r
- add_to_vector(v, 8, positive_number);\r
- }\r
- }\r
- break;\r
- }\r
-\r
- case value_t::number_unsigned:\r
- {\r
- if (j.m_value.number_unsigned <= 0x17)\r
- {\r
- v.push_back(static_cast<uint8_t>(j.m_value.number_unsigned));\r
- }\r
- else if (j.m_value.number_unsigned <= 0xff)\r
- {\r
- v.push_back(0x18);\r
- // one-byte uint8_t\r
- add_to_vector(v, 1, j.m_value.number_unsigned);\r
- }\r
- else if (j.m_value.number_unsigned <= 0xffff)\r
- {\r
- v.push_back(0x19);\r
- // two-byte uint16_t\r
- add_to_vector(v, 2, j.m_value.number_unsigned);\r
- }\r
- else if (j.m_value.number_unsigned <= 0xffffffff)\r
- {\r
- v.push_back(0x1a);\r
- // four-byte uint32_t\r
- add_to_vector(v, 4, j.m_value.number_unsigned);\r
- }\r
- else if (j.m_value.number_unsigned <= 0xffffffffffffffff)\r
- {\r
- v.push_back(0x1b);\r
- // eight-byte uint64_t\r
- add_to_vector(v, 8, j.m_value.number_unsigned);\r
- }\r
- break;\r
- }\r
-\r
- case value_t::number_float:\r
- {\r
- // Double-Precision Float\r
- v.push_back(0xfb);\r
- const auto* helper = reinterpret_cast<const uint8_t*>(&(j.m_value.number_float));\r
- for (size_t i = 0; i < 8; ++i)\r
- {\r
- v.push_back(helper[7 - i]);\r
- }\r
- break;\r
- }\r
-\r
- case value_t::string:\r
- {\r
- const auto N = j.m_value.string->size();\r
- if (N <= 0x17)\r
- {\r
- v.push_back(0x60 + static_cast<uint8_t>(N)); // 1 byte for string + size\r
- }\r
- else if (N <= 0xff)\r
- {\r
- v.push_back(0x78); // one-byte uint8_t for N\r
- add_to_vector(v, 1, N);\r
- }\r
- else if (N <= 0xffff)\r
- {\r
- v.push_back(0x79); // two-byte uint16_t for N\r
- add_to_vector(v, 2, N);\r
- }\r
- else if (N <= 0xffffffff)\r
- {\r
- v.push_back(0x7a); // four-byte uint32_t for N\r
- add_to_vector(v, 4, N);\r
- }\r
- // LCOV_EXCL_START\r
- else if (N <= 0xffffffffffffffff)\r
- {\r
- v.push_back(0x7b); // eight-byte uint64_t for N\r
- add_to_vector(v, 8, N);\r
- }\r
- // LCOV_EXCL_STOP\r
-\r
- // append string\r
- std::copy(j.m_value.string->begin(), j.m_value.string->end(),\r
- std::back_inserter(v));\r
- break;\r
- }\r
-\r
- case value_t::array:\r
- {\r
- const auto N = j.m_value.array->size();\r
- if (N <= 0x17)\r
- {\r
- v.push_back(0x80 + static_cast<uint8_t>(N)); // 1 byte for array + size\r
- }\r
- else if (N <= 0xff)\r
- {\r
- v.push_back(0x98); // one-byte uint8_t for N\r
- add_to_vector(v, 1, N);\r
- }\r
- else if (N <= 0xffff)\r
- {\r
- v.push_back(0x99); // two-byte uint16_t for N\r
- add_to_vector(v, 2, N);\r
- }\r
- else if (N <= 0xffffffff)\r
- {\r
- v.push_back(0x9a); // four-byte uint32_t for N\r
- add_to_vector(v, 4, N);\r
- }\r
- // LCOV_EXCL_START\r
- else if (N <= 0xffffffffffffffff)\r
- {\r
- v.push_back(0x9b); // eight-byte uint64_t for N\r
- add_to_vector(v, 8, N);\r
- }\r
- // LCOV_EXCL_STOP\r
-\r
- // append each element\r
- for (const auto& el : *j.m_value.array)\r
- {\r
- to_cbor_internal(el, v);\r
- }\r
- break;\r
- }\r
-\r
- case value_t::object:\r
- {\r
- const auto N = j.m_value.object->size();\r
- if (N <= 0x17)\r
- {\r
- v.push_back(0xa0 + static_cast<uint8_t>(N)); // 1 byte for object + size\r
- }\r
- else if (N <= 0xff)\r
- {\r
- v.push_back(0xb8);\r
- add_to_vector(v, 1, N); // one-byte uint8_t for N\r
- }\r
- else if (N <= 0xffff)\r
- {\r
- v.push_back(0xb9);\r
- add_to_vector(v, 2, N); // two-byte uint16_t for N\r
- }\r
- else if (N <= 0xffffffff)\r
- {\r
- v.push_back(0xba);\r
- add_to_vector(v, 4, N); // four-byte uint32_t for N\r
- }\r
- // LCOV_EXCL_START\r
- else if (N <= 0xffffffffffffffff)\r
- {\r
- v.push_back(0xbb);\r
- add_to_vector(v, 8, N); // eight-byte uint64_t for N\r
- }\r
- // LCOV_EXCL_STOP\r
-\r
- // append each element\r
- for (const auto& el : *j.m_value.object)\r
- {\r
- to_cbor_internal(el.first, v);\r
- to_cbor_internal(el.second, v);\r
- }\r
- break;\r
- }\r
-\r
- default:\r
- {\r
- break;\r
- }\r
- }\r
- }\r
-\r
-\r
- /*\r
- @brief checks if given lengths do not exceed the size of a given vector\r
-\r
- To secure the access to the byte vector during CBOR/MessagePack\r
- deserialization, bytes are copied from the vector into buffers. This\r
- function checks if the number of bytes to copy (@a len) does not exceed\r
- the size @s size of the vector. Additionally, an @a offset is given from\r
- where to start reading the bytes.\r
-\r
- This function checks whether reading the bytes is safe; that is, offset is\r
- a valid index in the vector, offset+len\r
-\r
- @param[in] size size of the byte vector\r
- @param[in] len number of bytes to read\r
- @param[in] offset offset where to start reading\r
-\r
- vec: x x x x x X X X X X\r
- ^ ^ ^\r
- 0 offset len\r
-\r
- @throws out_of_range if `len > v.size()`\r
- */\r
- static void check_length(const size_t size, const size_t len, const size_t offset)\r
- {\r
- // simple case: requested length is greater than the vector's length\r
- if (len > size or offset > size)\r
- {\r
- JSON_THROW(std::out_of_range("len out of range"));\r
- }\r
-\r
- // second case: adding offset would result in overflow\r
- if ((size > (std::numeric_limits<size_t>::max() - offset)))\r
- {\r
- JSON_THROW(std::out_of_range("len+offset out of range"));\r
- }\r
-\r
- // last case: reading past the end of the vector\r
- if (len + offset > size)\r
- {\r
- JSON_THROW(std::out_of_range("len+offset out of range"));\r
- }\r
- }\r
-\r
- /*!\r
- @brief create a JSON value from a given MessagePack vector\r
-\r
- @param[in] v MessagePack serialization\r
- @param[in] idx byte index to start reading from @a v\r
-\r
- @return deserialized JSON value\r
-\r
- @throw std::invalid_argument if unsupported features from MessagePack were\r
- used in the given vector @a v or if the input is not valid MessagePack\r
- @throw std::out_of_range if the given vector ends prematurely\r
-\r
- @sa https://github.com/msgpack/msgpack/blob/master/spec.md\r
- */\r
- static basic_json from_msgpack_internal(const std::vector<uint8_t>& v, size_t& idx)\r
- {\r
- // make sure reading 1 byte is safe\r
- check_length(v.size(), 1, idx);\r
-\r
- // store and increment index\r
- const size_t current_idx = idx++;\r
-\r
- if (v[current_idx] <= 0xbf)\r
- {\r
- if (v[current_idx] <= 0x7f) // positive fixint\r
- {\r
- return v[current_idx];\r
- }\r
- if (v[current_idx] <= 0x8f) // fixmap\r
- {\r
- basic_json result = value_t::object;\r
- const size_t len = v[current_idx] & 0x0f;\r
- for (size_t i = 0; i < len; ++i)\r
- {\r
- std::string key = from_msgpack_internal(v, idx);\r
- result[key] = from_msgpack_internal(v, idx);\r
- }\r
- return result;\r
- }\r
- else if (v[current_idx] <= 0x9f) // fixarray\r
- {\r
- basic_json result = value_t::array;\r
- const size_t len = v[current_idx] & 0x0f;\r
- for (size_t i = 0; i < len; ++i)\r
- {\r
- result.push_back(from_msgpack_internal(v, idx));\r
- }\r
- return result;\r
- }\r
- else // fixstr\r
- {\r
- const size_t len = v[current_idx] & 0x1f;\r
- const size_t offset = current_idx + 1;\r
- idx += len; // skip content bytes\r
- check_length(v.size(), len, offset);\r
- return std::string(reinterpret_cast<const char*>(v.data()) + offset, len);\r
- }\r
- }\r
- else if (v[current_idx] >= 0xe0) // negative fixint\r
- {\r
- return static_cast<int8_t>(v[current_idx]);\r
- }\r
- else\r
- {\r
- switch (v[current_idx])\r
- {\r
- case 0xc0: // nil\r
- {\r
- return value_t::null;\r
- }\r
-\r
- case 0xc2: // false\r
- {\r
- return false;\r
- }\r
-\r
- case 0xc3: // true\r
- {\r
- return true;\r
- }\r
-\r
- case 0xca: // float 32\r
- {\r
- // copy bytes in reverse order into the double variable\r
- float res;\r
- for (size_t byte = 0; byte < sizeof(float); ++byte)\r
- {\r
- reinterpret_cast<uint8_t*>(&res)[sizeof(float) - byte - 1] = v.at(current_idx + 1 + byte);\r
- }\r
- idx += sizeof(float); // skip content bytes\r
- return res;\r
- }\r
-\r
- case 0xcb: // float 64\r
- {\r
- // copy bytes in reverse order into the double variable\r
- double res;\r
- for (size_t byte = 0; byte < sizeof(double); ++byte)\r
- {\r
- reinterpret_cast<uint8_t*>(&res)[sizeof(double) - byte - 1] = v.at(current_idx + 1 + byte);\r
- }\r
- idx += sizeof(double); // skip content bytes\r
- return res;\r
- }\r
-\r
- case 0xcc: // uint 8\r
- {\r
- idx += 1; // skip content byte\r
- return get_from_vector<uint8_t>(v, current_idx);\r
- }\r
-\r
- case 0xcd: // uint 16\r
- {\r
- idx += 2; // skip 2 content bytes\r
- return get_from_vector<uint16_t>(v, current_idx);\r
- }\r
-\r
- case 0xce: // uint 32\r
- {\r
- idx += 4; // skip 4 content bytes\r
- return get_from_vector<uint32_t>(v, current_idx);\r
- }\r
-\r
- case 0xcf: // uint 64\r
- {\r
- idx += 8; // skip 8 content bytes\r
- return get_from_vector<uint64_t>(v, current_idx);\r
- }\r
-\r
- case 0xd0: // int 8\r
- {\r
- idx += 1; // skip content byte\r
- return get_from_vector<int8_t>(v, current_idx);\r
- }\r
-\r
- case 0xd1: // int 16\r
- {\r
- idx += 2; // skip 2 content bytes\r
- return get_from_vector<int16_t>(v, current_idx);\r
- }\r
-\r
- case 0xd2: // int 32\r
- {\r
- idx += 4; // skip 4 content bytes\r
- return get_from_vector<int32_t>(v, current_idx);\r
- }\r
-\r
- case 0xd3: // int 64\r
- {\r
- idx += 8; // skip 8 content bytes\r
- return get_from_vector<int64_t>(v, current_idx);\r
- }\r
-\r
- case 0xd9: // str 8\r
- {\r
- const auto len = static_cast<size_t>(get_from_vector<uint8_t>(v, current_idx));\r
- const size_t offset = current_idx + 2;\r
- idx += len + 1; // skip size byte + content bytes\r
- check_length(v.size(), len, offset);\r
- return std::string(reinterpret_cast<const char*>(v.data()) + offset, len);\r
- }\r
-\r
- case 0xda: // str 16\r
- {\r
- const auto len = static_cast<size_t>(get_from_vector<uint16_t>(v, current_idx));\r
- const size_t offset = current_idx + 3;\r
- idx += len + 2; // skip 2 size bytes + content bytes\r
- check_length(v.size(), len, offset);\r
- return std::string(reinterpret_cast<const char*>(v.data()) + offset, len);\r
- }\r
-\r
- case 0xdb: // str 32\r
- {\r
- const auto len = static_cast<size_t>(get_from_vector<uint32_t>(v, current_idx));\r
- const size_t offset = current_idx + 5;\r
- idx += len + 4; // skip 4 size bytes + content bytes\r
- check_length(v.size(), len, offset);\r
- return std::string(reinterpret_cast<const char*>(v.data()) + offset, len);\r
- }\r
-\r
- case 0xdc: // array 16\r
- {\r
- basic_json result = value_t::array;\r
- const auto len = static_cast<size_t>(get_from_vector<uint16_t>(v, current_idx));\r
- idx += 2; // skip 2 size bytes\r
- for (size_t i = 0; i < len; ++i)\r
- {\r
- result.push_back(from_msgpack_internal(v, idx));\r
- }\r
- return result;\r
- }\r
-\r
- case 0xdd: // array 32\r
- {\r
- basic_json result = value_t::array;\r
- const auto len = static_cast<size_t>(get_from_vector<uint32_t>(v, current_idx));\r
- idx += 4; // skip 4 size bytes\r
- for (size_t i = 0; i < len; ++i)\r
- {\r
- result.push_back(from_msgpack_internal(v, idx));\r
- }\r
- return result;\r
- }\r
-\r
- case 0xde: // map 16\r
- {\r
- basic_json result = value_t::object;\r
- const auto len = static_cast<size_t>(get_from_vector<uint16_t>(v, current_idx));\r
- idx += 2; // skip 2 size bytes\r
- for (size_t i = 0; i < len; ++i)\r
- {\r
- std::string key = from_msgpack_internal(v, idx);\r
- result[key] = from_msgpack_internal(v, idx);\r
- }\r
- return result;\r
- }\r
-\r
- case 0xdf: // map 32\r
- {\r
- basic_json result = value_t::object;\r
- const auto len = static_cast<size_t>(get_from_vector<uint32_t>(v, current_idx));\r
- idx += 4; // skip 4 size bytes\r
- for (size_t i = 0; i < len; ++i)\r
- {\r
- std::string key = from_msgpack_internal(v, idx);\r
- result[key] = from_msgpack_internal(v, idx);\r
- }\r
- return result;\r
- }\r
-\r
- default:\r
- {\r
- JSON_THROW(std::invalid_argument("error parsing a msgpack @ " + std::to_string(current_idx) + ": " + std::to_string(static_cast<int>(v[current_idx]))));\r
- }\r
- }\r
- }\r
- }\r
-\r
- /*!\r
- @brief create a JSON value from a given CBOR vector\r
-\r
- @param[in] v CBOR serialization\r
- @param[in] idx byte index to start reading from @a v\r
-\r
- @return deserialized JSON value\r
-\r
- @throw std::invalid_argument if unsupported features from CBOR were used in\r
- the given vector @a v or if the input is not valid CBOR\r
- @throw std::out_of_range if the given vector ends prematurely\r
-\r
- @sa https://tools.ietf.org/html/rfc7049\r
- */\r
- static basic_json from_cbor_internal(const std::vector<uint8_t>& v, size_t& idx)\r
- {\r
- // store and increment index\r
- const size_t current_idx = idx++;\r
-\r
- switch (v.at(current_idx))\r
- {\r
- // Integer 0x00..0x17 (0..23)\r
- case 0x00:\r
- case 0x01:\r
- case 0x02:\r
- case 0x03:\r
- case 0x04:\r
- case 0x05:\r
- case 0x06:\r
- case 0x07:\r
- case 0x08:\r
- case 0x09:\r
- case 0x0a:\r
- case 0x0b:\r
- case 0x0c:\r
- case 0x0d:\r
- case 0x0e:\r
- case 0x0f:\r
- case 0x10:\r
- case 0x11:\r
- case 0x12:\r
- case 0x13:\r
- case 0x14:\r
- case 0x15:\r
- case 0x16:\r
- case 0x17:\r
- {\r
- return v[current_idx];\r
- }\r
-\r
- case 0x18: // Unsigned integer (one-byte uint8_t follows)\r
- {\r
- idx += 1; // skip content byte\r
- return get_from_vector<uint8_t>(v, current_idx);\r
- }\r
-\r
- case 0x19: // Unsigned integer (two-byte uint16_t follows)\r
- {\r
- idx += 2; // skip 2 content bytes\r
- return get_from_vector<uint16_t>(v, current_idx);\r
- }\r
-\r
- case 0x1a: // Unsigned integer (four-byte uint32_t follows)\r
- {\r
- idx += 4; // skip 4 content bytes\r
- return get_from_vector<uint32_t>(v, current_idx);\r
- }\r
-\r
- case 0x1b: // Unsigned integer (eight-byte uint64_t follows)\r
- {\r
- idx += 8; // skip 8 content bytes\r
- return get_from_vector<uint64_t>(v, current_idx);\r
- }\r
-\r
- // Negative integer -1-0x00..-1-0x17 (-1..-24)\r
- case 0x20:\r
- case 0x21:\r
- case 0x22:\r
- case 0x23:\r
- case 0x24:\r
- case 0x25:\r
- case 0x26:\r
- case 0x27:\r
- case 0x28:\r
- case 0x29:\r
- case 0x2a:\r
- case 0x2b:\r
- case 0x2c:\r
- case 0x2d:\r
- case 0x2e:\r
- case 0x2f:\r
- case 0x30:\r
- case 0x31:\r
- case 0x32:\r
- case 0x33:\r
- case 0x34:\r
- case 0x35:\r
- case 0x36:\r
- case 0x37:\r
- {\r
- return static_cast<int8_t>(0x20 - 1 - v[current_idx]);\r
- }\r
-\r
- case 0x38: // Negative integer (one-byte uint8_t follows)\r
- {\r
- idx += 1; // skip content byte\r
- // must be uint8_t !\r
- return static_cast<number_integer_t>(-1) - get_from_vector<uint8_t>(v, current_idx);\r
- }\r
-\r
- case 0x39: // Negative integer -1-n (two-byte uint16_t follows)\r
- {\r
- idx += 2; // skip 2 content bytes\r
- return static_cast<number_integer_t>(-1) - get_from_vector<uint16_t>(v, current_idx);\r
- }\r
-\r
- case 0x3a: // Negative integer -1-n (four-byte uint32_t follows)\r
- {\r
- idx += 4; // skip 4 content bytes\r
- return static_cast<number_integer_t>(-1) - get_from_vector<uint32_t>(v, current_idx);\r
- }\r
-\r
- case 0x3b: // Negative integer -1-n (eight-byte uint64_t follows)\r
- {\r
- idx += 8; // skip 8 content bytes\r
- return static_cast<number_integer_t>(-1) - static_cast<number_integer_t>(get_from_vector<uint64_t>(v, current_idx));\r
- }\r
-\r
- // UTF-8 string (0x00..0x17 bytes follow)\r
- case 0x60:\r
- case 0x61:\r
- case 0x62:\r
- case 0x63:\r
- case 0x64:\r
- case 0x65:\r
- case 0x66:\r
- case 0x67:\r
- case 0x68:\r
- case 0x69:\r
- case 0x6a:\r
- case 0x6b:\r
- case 0x6c:\r
- case 0x6d:\r
- case 0x6e:\r
- case 0x6f:\r
- case 0x70:\r
- case 0x71:\r
- case 0x72:\r
- case 0x73:\r
- case 0x74:\r
- case 0x75:\r
- case 0x76:\r
- case 0x77:\r
- {\r
- const auto len = static_cast<size_t>(v[current_idx] - 0x60);\r
- const size_t offset = current_idx + 1;\r
- idx += len; // skip content bytes\r
- check_length(v.size(), len, offset);\r
- return std::string(reinterpret_cast<const char*>(v.data()) + offset, len);\r
- }\r
-\r
- case 0x78: // UTF-8 string (one-byte uint8_t for n follows)\r
- {\r
- const auto len = static_cast<size_t>(get_from_vector<uint8_t>(v, current_idx));\r
- const size_t offset = current_idx + 2;\r
- idx += len + 1; // skip size byte + content bytes\r
- check_length(v.size(), len, offset);\r
- return std::string(reinterpret_cast<const char*>(v.data()) + offset, len);\r
- }\r
-\r
- case 0x79: // UTF-8 string (two-byte uint16_t for n follow)\r
- {\r
- const auto len = static_cast<size_t>(get_from_vector<uint16_t>(v, current_idx));\r
- const size_t offset = current_idx + 3;\r
- idx += len + 2; // skip 2 size bytes + content bytes\r
- check_length(v.size(), len, offset);\r
- return std::string(reinterpret_cast<const char*>(v.data()) + offset, len);\r
- }\r
-\r
- case 0x7a: // UTF-8 string (four-byte uint32_t for n follow)\r
- {\r
- const auto len = static_cast<size_t>(get_from_vector<uint32_t>(v, current_idx));\r
- const size_t offset = current_idx + 5;\r
- idx += len + 4; // skip 4 size bytes + content bytes\r
- check_length(v.size(), len, offset);\r
- return std::string(reinterpret_cast<const char*>(v.data()) + offset, len);\r
- }\r
-\r
- case 0x7b: // UTF-8 string (eight-byte uint64_t for n follow)\r
- {\r
- const auto len = static_cast<size_t>(get_from_vector<uint64_t>(v, current_idx));\r
- const size_t offset = current_idx + 9;\r
- idx += len + 8; // skip 8 size bytes + content bytes\r
- check_length(v.size(), len, offset);\r
- return std::string(reinterpret_cast<const char*>(v.data()) + offset, len);\r
- }\r
-\r
- case 0x7f: // UTF-8 string (indefinite length)\r
- {\r
- std::string result;\r
- while (v.at(idx) != 0xff)\r
- {\r
- string_t s = from_cbor_internal(v, idx);\r
- result += s;\r
- }\r
- // skip break byte (0xFF)\r
- idx += 1;\r
- return result;\r
- }\r
-\r
- // array (0x00..0x17 data items follow)\r
- case 0x80:\r
- case 0x81:\r
- case 0x82:\r
- case 0x83:\r
- case 0x84:\r
- case 0x85:\r
- case 0x86:\r
- case 0x87:\r
- case 0x88:\r
- case 0x89:\r
- case 0x8a:\r
- case 0x8b:\r
- case 0x8c:\r
- case 0x8d:\r
- case 0x8e:\r
- case 0x8f:\r
- case 0x90:\r
- case 0x91:\r
- case 0x92:\r
- case 0x93:\r
- case 0x94:\r
- case 0x95:\r
- case 0x96:\r
- case 0x97:\r
- {\r
- basic_json result = value_t::array;\r
- const auto len = static_cast<size_t>(v[current_idx] - 0x80);\r
- for (size_t i = 0; i < len; ++i)\r
- {\r
- result.push_back(from_cbor_internal(v, idx));\r
- }\r
- return result;\r
- }\r
-\r
- case 0x98: // array (one-byte uint8_t for n follows)\r
- {\r
- basic_json result = value_t::array;\r
- const auto len = static_cast<size_t>(get_from_vector<uint8_t>(v, current_idx));\r
- idx += 1; // skip 1 size byte\r
- for (size_t i = 0; i < len; ++i)\r
- {\r
- result.push_back(from_cbor_internal(v, idx));\r
- }\r
- return result;\r
- }\r
-\r
- case 0x99: // array (two-byte uint16_t for n follow)\r
- {\r
- basic_json result = value_t::array;\r
- const auto len = static_cast<size_t>(get_from_vector<uint16_t>(v, current_idx));\r
- idx += 2; // skip 4 size bytes\r
- for (size_t i = 0; i < len; ++i)\r
- {\r
- result.push_back(from_cbor_internal(v, idx));\r
- }\r
- return result;\r
- }\r
-\r
- case 0x9a: // array (four-byte uint32_t for n follow)\r
- {\r
- basic_json result = value_t::array;\r
- const auto len = static_cast<size_t>(get_from_vector<uint32_t>(v, current_idx));\r
- idx += 4; // skip 4 size bytes\r
- for (size_t i = 0; i < len; ++i)\r
- {\r
- result.push_back(from_cbor_internal(v, idx));\r
- }\r
- return result;\r
- }\r
-\r
- case 0x9b: // array (eight-byte uint64_t for n follow)\r
- {\r
- basic_json result = value_t::array;\r
- const auto len = static_cast<size_t>(get_from_vector<uint64_t>(v, current_idx));\r
- idx += 8; // skip 8 size bytes\r
- for (size_t i = 0; i < len; ++i)\r
- {\r
- result.push_back(from_cbor_internal(v, idx));\r
- }\r
- return result;\r
- }\r
-\r
- case 0x9f: // array (indefinite length)\r
- {\r
- basic_json result = value_t::array;\r
- while (v.at(idx) != 0xff)\r
- {\r
- result.push_back(from_cbor_internal(v, idx));\r
- }\r
- // skip break byte (0xFF)\r
- idx += 1;\r
- return result;\r
- }\r
-\r
- // map (0x00..0x17 pairs of data items follow)\r
- case 0xa0:\r
- case 0xa1:\r
- case 0xa2:\r
- case 0xa3:\r
- case 0xa4:\r
- case 0xa5:\r
- case 0xa6:\r
- case 0xa7:\r
- case 0xa8:\r
- case 0xa9:\r
- case 0xaa:\r
- case 0xab:\r
- case 0xac:\r
- case 0xad:\r
- case 0xae:\r
- case 0xaf:\r
- case 0xb0:\r
- case 0xb1:\r
- case 0xb2:\r
- case 0xb3:\r
- case 0xb4:\r
- case 0xb5:\r
- case 0xb6:\r
- case 0xb7:\r
- {\r
- basic_json result = value_t::object;\r
- const auto len = static_cast<size_t>(v[current_idx] - 0xa0);\r
- for (size_t i = 0; i < len; ++i)\r
- {\r
- std::string key = from_cbor_internal(v, idx);\r
- result[key] = from_cbor_internal(v, idx);\r
- }\r
- return result;\r
- }\r
-\r
- case 0xb8: // map (one-byte uint8_t for n follows)\r
- {\r
- basic_json result = value_t::object;\r
- const auto len = static_cast<size_t>(get_from_vector<uint8_t>(v, current_idx));\r
- idx += 1; // skip 1 size byte\r
- for (size_t i = 0; i < len; ++i)\r
- {\r
- std::string key = from_cbor_internal(v, idx);\r
- result[key] = from_cbor_internal(v, idx);\r
- }\r
- return result;\r
- }\r
-\r
- case 0xb9: // map (two-byte uint16_t for n follow)\r
- {\r
- basic_json result = value_t::object;\r
- const auto len = static_cast<size_t>(get_from_vector<uint16_t>(v, current_idx));\r
- idx += 2; // skip 2 size bytes\r
- for (size_t i = 0; i < len; ++i)\r
- {\r
- std::string key = from_cbor_internal(v, idx);\r
- result[key] = from_cbor_internal(v, idx);\r
- }\r
- return result;\r
- }\r
-\r
- case 0xba: // map (four-byte uint32_t for n follow)\r
- {\r
- basic_json result = value_t::object;\r
- const auto len = static_cast<size_t>(get_from_vector<uint32_t>(v, current_idx));\r
- idx += 4; // skip 4 size bytes\r
- for (size_t i = 0; i < len; ++i)\r
- {\r
- std::string key = from_cbor_internal(v, idx);\r
- result[key] = from_cbor_internal(v, idx);\r
- }\r
- return result;\r
- }\r
-\r
- case 0xbb: // map (eight-byte uint64_t for n follow)\r
- {\r
- basic_json result = value_t::object;\r
- const auto len = static_cast<size_t>(get_from_vector<uint64_t>(v, current_idx));\r
- idx += 8; // skip 8 size bytes\r
- for (size_t i = 0; i < len; ++i)\r
- {\r
- std::string key = from_cbor_internal(v, idx);\r
- result[key] = from_cbor_internal(v, idx);\r
- }\r
- return result;\r
- }\r
-\r
- case 0xbf: // map (indefinite length)\r
- {\r
- basic_json result = value_t::object;\r
- while (v.at(idx) != 0xff)\r
- {\r
- std::string key = from_cbor_internal(v, idx);\r
- result[key] = from_cbor_internal(v, idx);\r
- }\r
- // skip break byte (0xFF)\r
- idx += 1;\r
- return result;\r
- }\r
-\r
- case 0xf4: // false\r
- {\r
- return false;\r
- }\r
-\r
- case 0xf5: // true\r
- {\r
- return true;\r
- }\r
-\r
- case 0xf6: // null\r
- {\r
- return value_t::null;\r
- }\r
-\r
- case 0xf9: // Half-Precision Float (two-byte IEEE 754)\r
- {\r
- idx += 2; // skip two content bytes\r
-\r
- // code from RFC 7049, Appendix D, Figure 3:\r
- // As half-precision floating-point numbers were only added to\r
- // IEEE 754 in 2008, today's programming platforms often still\r
- // only have limited support for them. It is very easy to\r
- // include at least decoding support for them even without such\r
- // support. An example of a small decoder for half-precision\r
- // floating-point numbers in the C language is shown in Fig. 3.\r
- const int half = (v.at(current_idx + 1) << 8) + v.at(current_idx + 2);\r
- const int exp = (half >> 10) & 0x1f;\r
- const int mant = half & 0x3ff;\r
- double val;\r
- if (exp == 0)\r
- {\r
- val = std::ldexp(mant, -24);\r
- }\r
- else if (exp != 31)\r
- {\r
- val = std::ldexp(mant + 1024, exp - 25);\r
- }\r
- else\r
- {\r
- val = mant == 0\r
- ? std::numeric_limits<double>::infinity()\r
- : std::numeric_limits<double>::quiet_NaN();\r
- }\r
- return (half & 0x8000) != 0 ? -val : val;\r
- }\r
-\r
- case 0xfa: // Single-Precision Float (four-byte IEEE 754)\r
- {\r
- // copy bytes in reverse order into the float variable\r
- float res;\r
- for (size_t byte = 0; byte < sizeof(float); ++byte)\r
- {\r
- reinterpret_cast<uint8_t*>(&res)[sizeof(float) - byte - 1] = v.at(current_idx + 1 + byte);\r
- }\r
- idx += sizeof(float); // skip content bytes\r
- return res;\r
- }\r
-\r
- case 0xfb: // Double-Precision Float (eight-byte IEEE 754)\r
- {\r
- // copy bytes in reverse order into the double variable\r
- double res;\r
- for (size_t byte = 0; byte < sizeof(double); ++byte)\r
- {\r
- reinterpret_cast<uint8_t*>(&res)[sizeof(double) - byte - 1] = v.at(current_idx + 1 + byte);\r
- }\r
- idx += sizeof(double); // skip content bytes\r
- return res;\r
- }\r
-\r
- default: // anything else (0xFF is handled inside the other types)\r
- {\r
- JSON_THROW(std::invalid_argument("error parsing a CBOR @ " + std::to_string(current_idx) + ": " + std::to_string(static_cast<int>(v[current_idx]))));\r
- }\r
- }\r
- }\r
-\r
- public:\r
- /*!\r
- @brief create a MessagePack serialization of a given JSON value\r
-\r
- Serializes a given JSON value @a j to a byte vector using the MessagePack\r
- serialization format. MessagePack is a binary serialization format which\r
- aims to be more compact than JSON itself, yet more efficient to parse.\r
-\r
- @param[in] j JSON value to serialize\r
- @return MessagePack serialization as byte vector\r
-\r
- @complexity Linear in the size of the JSON value @a j.\r
-\r
- @liveexample{The example shows the serialization of a JSON value to a byte\r
- vector in MessagePack format.,to_msgpack}\r
-\r
- @sa http://msgpack.org\r
- @sa @ref from_msgpack(const std::vector<uint8_t>&, const size_t) for the\r
- analogous deserialization\r
- @sa @ref to_cbor(const basic_json& for the related CBOR format\r
-\r
- @since version 2.0.9\r
- */\r
- static std::vector<uint8_t> to_msgpack(const basic_json& j)\r
- {\r
- std::vector<uint8_t> result;\r
- to_msgpack_internal(j, result);\r
- return result;\r
- }\r
-\r
- /*!\r
- @brief create a JSON value from a byte vector in MessagePack format\r
-\r
- Deserializes a given byte vector @a v to a JSON value using the MessagePack\r
- serialization format.\r
-\r
- @param[in] v a byte vector in MessagePack format\r
- @param[in] start_index the index to start reading from @a v (0 by default)\r
- @return deserialized JSON value\r
-\r
- @throw std::invalid_argument if unsupported features from MessagePack were\r
- used in the given vector @a v or if the input is not valid MessagePack\r
- @throw std::out_of_range if the given vector ends prematurely\r
-\r
- @complexity Linear in the size of the byte vector @a v.\r
-\r
- @liveexample{The example shows the deserialization of a byte vector in\r
- MessagePack format to a JSON value.,from_msgpack}\r
-\r
- @sa http://msgpack.org\r
- @sa @ref to_msgpack(const basic_json&) for the analogous serialization\r
- @sa @ref from_cbor(const std::vector<uint8_t>&, const size_t) for the\r
- related CBOR format\r
-\r
- @since version 2.0.9, parameter @a start_index since 2.1.1\r
- */\r
- static basic_json from_msgpack(const std::vector<uint8_t>& v,\r
- const size_t start_index = 0)\r
- {\r
- size_t i = start_index;\r
- return from_msgpack_internal(v, i);\r
- }\r
-\r
- /*!\r
- @brief create a MessagePack serialization of a given JSON value\r
-\r
- Serializes a given JSON value @a j to a byte vector using the CBOR (Concise\r
- Binary Object Representation) serialization format. CBOR is a binary\r
- serialization format which aims to be more compact than JSON itself, yet\r
- more efficient to parse.\r
-\r
- @param[in] j JSON value to serialize\r
- @return MessagePack serialization as byte vector\r
-\r
- @complexity Linear in the size of the JSON value @a j.\r
-\r
- @liveexample{The example shows the serialization of a JSON value to a byte\r
- vector in CBOR format.,to_cbor}\r
-\r
- @sa http://cbor.io\r
- @sa @ref from_cbor(const std::vector<uint8_t>&, const size_t) for the\r
- analogous deserialization\r
- @sa @ref to_msgpack(const basic_json& for the related MessagePack format\r
-\r
- @since version 2.0.9\r
- */\r
- static std::vector<uint8_t> to_cbor(const basic_json& j)\r
- {\r
- std::vector<uint8_t> result;\r
- to_cbor_internal(j, result);\r
- return result;\r
- }\r
-\r
- /*!\r
- @brief create a JSON value from a byte vector in CBOR format\r
-\r
- Deserializes a given byte vector @a v to a JSON value using the CBOR\r
- (Concise Binary Object Representation) serialization format.\r
-\r
- @param[in] v a byte vector in CBOR format\r
- @param[in] start_index the index to start reading from @a v (0 by default)\r
- @return deserialized JSON value\r
-\r
- @throw std::invalid_argument if unsupported features from CBOR were used in\r
- the given vector @a v or if the input is not valid MessagePack\r
- @throw std::out_of_range if the given vector ends prematurely\r
-\r
- @complexity Linear in the size of the byte vector @a v.\r
-\r
- @liveexample{The example shows the deserialization of a byte vector in CBOR\r
- format to a JSON value.,from_cbor}\r
-\r
- @sa http://cbor.io\r
- @sa @ref to_cbor(const basic_json&) for the analogous serialization\r
- @sa @ref from_msgpack(const std::vector<uint8_t>&, const size_t) for the\r
- related MessagePack format\r
-\r
- @since version 2.0.9, parameter @a start_index since 2.1.1\r
- */\r
- static basic_json from_cbor(const std::vector<uint8_t>& v,\r
- const size_t start_index = 0)\r
- {\r
- size_t i = start_index;\r
- return from_cbor_internal(v, i);\r
- }\r
-\r
- /// @}\r
-\r
- ///////////////////////////\r
- // convenience functions //\r
- ///////////////////////////\r
-\r
- /*!\r
- @brief return the type as string\r
-\r
- Returns the type name as string to be used in error messages - usually to\r
- indicate that a function was called on a wrong JSON type.\r
-\r
- @return basically a string representation of a the @a m_type member\r
-\r
- @complexity Constant.\r
-\r
- @liveexample{The following code exemplifies `type_name()` for all JSON\r
- types.,type_name}\r
-\r
- @since version 1.0.0, public since 2.1.0\r
- */\r
- std::string type_name() const\r
- {\r
- {\r
- switch (m_type)\r
- {\r
- case value_t::null:\r
- return "null";\r
- case value_t::object:\r
- return "object";\r
- case value_t::array:\r
- return "array";\r
- case value_t::string:\r
- return "string";\r
- case value_t::boolean:\r
- return "boolean";\r
- case value_t::discarded:\r
- return "discarded";\r
- default:\r
- return "number";\r
- }\r
- }\r
- }\r
-\r
- private:\r
- /*!\r
- @brief calculates the extra space to escape a JSON string\r
-\r
- @param[in] s the string to escape\r
- @return the number of characters required to escape string @a s\r
-\r
- @complexity Linear in the length of string @a s.\r
- */\r
- static std::size_t extra_space(const string_t& s) noexcept\r
- {\r
- return std::accumulate(s.begin(), s.end(), size_t{},\r
- [](size_t res, typename string_t::value_type c)\r
- {\r
- switch (c)\r
- {\r
- case '"':\r
- case '\\':\r
- case '\b':\r
- case '\f':\r
- case '\n':\r
- case '\r':\r
- case '\t':\r
- {\r
- // from c (1 byte) to \x (2 bytes)\r
- return res + 1;\r
- }\r
-\r
- default:\r
- {\r
- if (c >= 0x00 and c <= 0x1f)\r
- {\r
- // from c (1 byte) to \uxxxx (6 bytes)\r
- return res + 5;\r
- }\r
-\r
- return res;\r
- }\r
- }\r
- });\r
- }\r
-\r
- /*!\r
- @brief escape a string\r
-\r
- Escape a string by replacing certain special characters by a sequence of\r
- an escape character (backslash) and another character and other control\r
- characters by a sequence of "\u" followed by a four-digit hex\r
- representation.\r
-\r
- @param[in] s the string to escape\r
- @return the escaped string\r
-\r
- @complexity Linear in the length of string @a s.\r
- */\r
- static string_t escape_string(const string_t& s)\r
- {\r
- const auto space = extra_space(s);\r
- if (space == 0)\r
- {\r
- return s;\r
- }\r
-\r
- // create a result string of necessary size\r
- string_t result(s.size() + space, '\\');\r
- std::size_t pos = 0;\r
-\r
- for (const auto& c : s)\r
- {\r
- switch (c)\r
- {\r
- // quotation mark (0x22)\r
- case '"':\r
- {\r
- result[pos + 1] = '"';\r
- pos += 2;\r
- break;\r
- }\r
-\r
- // reverse solidus (0x5c)\r
- case '\\':\r
- {\r
- // nothing to change\r
- pos += 2;\r
- break;\r
- }\r
-\r
- // backspace (0x08)\r
- case '\b':\r
- {\r
- result[pos + 1] = 'b';\r
- pos += 2;\r
- break;\r
- }\r
-\r
- // formfeed (0x0c)\r
- case '\f':\r
- {\r
- result[pos + 1] = 'f';\r
- pos += 2;\r
- break;\r
- }\r
-\r
- // newline (0x0a)\r
- case '\n':\r
- {\r
- result[pos + 1] = 'n';\r
- pos += 2;\r
- break;\r
- }\r
-\r
- // carriage return (0x0d)\r
- case '\r':\r
- {\r
- result[pos + 1] = 'r';\r
- pos += 2;\r
- break;\r
- }\r
-\r
- // horizontal tab (0x09)\r
- case '\t':\r
- {\r
- result[pos + 1] = 't';\r
- pos += 2;\r
- break;\r
- }\r
-\r
- default:\r
- {\r
- if (c >= 0x00 and c <= 0x1f)\r
- {\r
- // convert a number 0..15 to its hex representation\r
- // (0..f)\r
- static const char hexify[16] =\r
- {\r
- '0', '1', '2', '3', '4', '5', '6', '7',\r
- '8', '9', 'a', 'b', 'c', 'd', 'e', 'f'\r
- };\r
-\r
- // print character c as \uxxxx\r
- for (const char m :\r
- { 'u', '0', '0', hexify[c >> 4], hexify[c & 0x0f]\r
- })\r
- {\r
- result[++pos] = m;\r
- }\r
-\r
- ++pos;\r
- }\r
- else\r
- {\r
- // all other characters are added as-is\r
- result[pos++] = c;\r
- }\r
- break;\r
- }\r
- }\r
- }\r
-\r
- return result;\r
- }\r
-\r
-\r
- /*!\r
- @brief locale-independent serialization for built-in arithmetic types\r
- */\r
- struct numtostr\r
- {\r
- public:\r
- template<typename NumberType>\r
- numtostr(NumberType value)\r
- {\r
- x_write(value, std::is_integral<NumberType>());\r
- }\r
-\r
- const char* c_str() const\r
- {\r
- return m_buf.data();\r
- }\r
-\r
- private:\r
- /// a (hopefully) large enough character buffer\r
- std::array < char, 64 > m_buf{{}};\r
-\r
- template<typename NumberType>\r
- void x_write(NumberType x, /*is_integral=*/std::true_type)\r
- {\r
- // special case for "0"\r
- if (x == 0)\r
- {\r
- m_buf[0] = '0';\r
- return;\r
- }\r
-\r
- const bool is_negative = x < 0;\r
- size_t i = 0;\r
-\r
- // spare 1 byte for '\0'\r
- while (x != 0 and i < m_buf.size() - 1)\r
- {\r
- const auto digit = std::labs(static_cast<long>(x % 10));\r
- m_buf[i++] = static_cast<char>('0' + digit);\r
- x /= 10;\r
- }\r
-\r
- // make sure the number has been processed completely\r
- assert(x == 0);\r
-\r
- if (is_negative)\r
- {\r
- // make sure there is capacity for the '-'\r
- assert(i < m_buf.size() - 2);\r
- m_buf[i++] = '-';\r
- }\r
-\r
- std::reverse(m_buf.begin(), m_buf.begin() + i);\r
- }\r
-\r
- template<typename NumberType>\r
- void x_write(NumberType x, /*is_integral=*/std::false_type)\r
- {\r
- // special case for 0.0 and -0.0\r
- if (x == 0)\r
- {\r
- size_t i = 0;\r
- if (std::signbit(x))\r
- {\r
- m_buf[i++] = '-';\r
- }\r
- m_buf[i++] = '0';\r
- m_buf[i++] = '.';\r
- m_buf[i] = '0';\r
- return;\r
- }\r
-\r
- // get number of digits for a text -> float -> text round-trip\r
- static constexpr auto d = std::numeric_limits<NumberType>::digits10;\r
-\r
- // the actual conversion\r
- const auto written_bytes = snprintf(m_buf.data(), m_buf.size(), "%.*g", d, (double)x);\r
-\r
- // negative value indicates an error\r
- assert(written_bytes > 0);\r
- // check if buffer was large enough\r
- assert(static_cast<size_t>(written_bytes) < m_buf.size());\r
-\r
- // read information from locale\r
- const auto loc = localeconv();\r
- assert(loc != nullptr);\r
- const char thousands_sep = !loc->thousands_sep ? '\0'\r
- : loc->thousands_sep[0];\r
-\r
- const char decimal_point = !loc->decimal_point ? '\0'\r
- : loc->decimal_point[0];\r
-\r
- // erase thousands separator\r
- if (thousands_sep != '\0')\r
- {\r
- const auto end = std::remove(m_buf.begin(), m_buf.begin() + written_bytes, thousands_sep);\r
- std::fill(end, m_buf.end(), '\0');\r
- }\r
-\r
- // convert decimal point to '.'\r
- if (decimal_point != '\0' and decimal_point != '.')\r
- {\r
- for (auto& c : m_buf)\r
- {\r
- if (c == decimal_point)\r
- {\r
- c = '.';\r
- break;\r
- }\r
- }\r
- }\r
-\r
- // determine if need to append ".0"\r
- size_t i = 0;\r
- bool value_is_int_like = true;\r
- for (i = 0; i < m_buf.size(); ++i)\r
- {\r
- // break when end of number is reached\r
- if (m_buf[i] == '\0')\r
- {\r
- break;\r
- }\r
-\r
- // check if we find non-int character\r
- value_is_int_like = value_is_int_like and m_buf[i] != '.' and\r
- m_buf[i] != 'e' and m_buf[i] != 'E';\r
- }\r
-\r
- if (value_is_int_like)\r
- {\r
- // there must be 2 bytes left for ".0"\r
- assert((i + 2) < m_buf.size());\r
- // we write to the end of the number\r
- assert(m_buf[i] == '\0');\r
- assert(m_buf[i - 1] != '\0');\r
-\r
- // add ".0"\r
- m_buf[i] = '.';\r
- m_buf[i + 1] = '0';\r
-\r
- // the resulting string is properly terminated\r
- assert(m_buf[i + 2] == '\0');\r
- }\r
- }\r
- };\r
-\r
-\r
- /*!\r
- @brief internal implementation of the serialization function\r
-\r
- This function is called by the public member function dump and organizes\r
- the serialization internally. The indentation level is propagated as\r
- additional parameter. In case of arrays and objects, the function is\r
- called recursively. Note that\r
-\r
- - strings and object keys are escaped using `escape_string()`\r
- - integer numbers are converted implicitly via `operator<<`\r
- - floating-point numbers are converted to a string using `"%g"` format\r
-\r
- @param[out] o stream to write to\r
- @param[in] pretty_print whether the output shall be pretty-printed\r
- @param[in] indent_step the indent level\r
- @param[in] current_indent the current indent level (only used internally)\r
- */\r
- void dump(std::ostream& o,\r
- const bool pretty_print,\r
- const unsigned int indent_step,\r
- const unsigned int current_indent = 0) const\r
- {\r
- // variable to hold indentation for recursive calls\r
- unsigned int new_indent = current_indent;\r
-\r
- switch (m_type)\r
- {\r
- case value_t::object:\r
- {\r
- if (m_value.object->empty())\r
- {\r
- o << "{}";\r
- return;\r
- }\r
-\r
- o << "{";\r
-\r
- // increase indentation\r
- if (pretty_print)\r
- {\r
- new_indent += indent_step;\r
- o << "\n";\r
- }\r
-\r
- for (auto i = m_value.object->cbegin(); i != m_value.object->cend(); ++i)\r
- {\r
- if (i != m_value.object->cbegin())\r
- {\r
- o << (pretty_print ? ",\n" : ",");\r
- }\r
- o << string_t(new_indent, ' ') << "\""\r
- << escape_string(i->first) << "\":"\r
- << (pretty_print ? " " : "");\r
- i->second.dump(o, pretty_print, indent_step, new_indent);\r
- }\r
-\r
- // decrease indentation\r
- if (pretty_print)\r
- {\r
- new_indent -= indent_step;\r
- o << "\n";\r
- }\r
-\r
- o << string_t(new_indent, ' ') + "}";\r
- return;\r
- }\r
-\r
- case value_t::array:\r
- {\r
- if (m_value.array->empty())\r
- {\r
- o << "[]";\r
- return;\r
- }\r
-\r
- o << "[";\r
-\r
- // increase indentation\r
- if (pretty_print)\r
- {\r
- new_indent += indent_step;\r
- o << "\n";\r
- }\r
-\r
- for (auto i = m_value.array->cbegin(); i != m_value.array->cend(); ++i)\r
- {\r
- if (i != m_value.array->cbegin())\r
- {\r
- o << (pretty_print ? ",\n" : ",");\r
- }\r
- o << string_t(new_indent, ' ');\r
- i->dump(o, pretty_print, indent_step, new_indent);\r
- }\r
-\r
- // decrease indentation\r
- if (pretty_print)\r
- {\r
- new_indent -= indent_step;\r
- o << "\n";\r
- }\r
-\r
- o << string_t(new_indent, ' ') << "]";\r
- return;\r
- }\r
-\r
- case value_t::string:\r
- {\r
- o << string_t("\"") << escape_string(*m_value.string) << "\"";\r
- return;\r
- }\r
-\r
- case value_t::boolean:\r
- {\r
- o << (m_value.boolean ? "true" : "false");\r
- return;\r
- }\r
-\r
- case value_t::number_integer:\r
- {\r
- o << numtostr(m_value.number_integer).c_str();\r
- return;\r
- }\r
-\r
- case value_t::number_unsigned:\r
- {\r
- o << numtostr(m_value.number_unsigned).c_str();\r
- return;\r
- }\r
-\r
- case value_t::number_float:\r
- {\r
- o << numtostr(m_value.number_float).c_str();\r
- return;\r
- }\r
-\r
- case value_t::discarded:\r
- {\r
- o << "<discarded>";\r
- return;\r
- }\r
-\r
- case value_t::null:\r
- {\r
- o << "null";\r
- return;\r
- }\r
- }\r
- }\r
-\r
- private:\r
- //////////////////////\r
- // member variables //\r
- //////////////////////\r
-\r
- /// the type of the current element\r
- value_t m_type = value_t::null;\r
-\r
- /// the value of the current element\r
- json_value m_value = {};\r
-\r
-\r
- private:\r
- ///////////////\r
- // iterators //\r
- ///////////////\r
-\r
- /*!\r
- @brief an iterator for primitive JSON types\r
-\r
- This class models an iterator for primitive JSON types (boolean, number,\r
- string). It's only purpose is to allow the iterator/const_iterator classes\r
- to "iterate" over primitive values. Internally, the iterator is modeled by\r
- a `difference_type` variable. Value begin_value (`0`) models the begin,\r
- end_value (`1`) models past the end.\r
- */\r
- class primitive_iterator_t\r
- {\r
- public:\r
-\r
- difference_type get_value() const noexcept\r
- {\r
- return m_it;\r
- }\r
- /// set iterator to a defined beginning\r
- void set_begin() noexcept\r
- {\r
- m_it = begin_value;\r
- }\r
-\r
- /// set iterator to a defined past the end\r
- void set_end() noexcept\r
- {\r
- m_it = end_value;\r
- }\r
-\r
- /// return whether the iterator can be dereferenced\r
- constexpr bool is_begin() const noexcept\r
- {\r
- return (m_it == begin_value);\r
- }\r
-\r
- /// return whether the iterator is at end\r
- constexpr bool is_end() const noexcept\r
- {\r
- return (m_it == end_value);\r
- }\r
-\r
- friend constexpr bool operator==(primitive_iterator_t lhs, primitive_iterator_t rhs) noexcept\r
- {\r
- return lhs.m_it == rhs.m_it;\r
- }\r
-\r
- friend constexpr bool operator!=(primitive_iterator_t lhs, primitive_iterator_t rhs) noexcept\r
- {\r
- return !(lhs == rhs);\r
- }\r
-\r
- friend constexpr bool operator<(primitive_iterator_t lhs, primitive_iterator_t rhs) noexcept\r
- {\r
- return lhs.m_it < rhs.m_it;\r
- }\r
-\r
- friend constexpr bool operator<=(primitive_iterator_t lhs, primitive_iterator_t rhs) noexcept\r
- {\r
- return lhs.m_it <= rhs.m_it;\r
- }\r
-\r
- friend constexpr bool operator>(primitive_iterator_t lhs, primitive_iterator_t rhs) noexcept\r
- {\r
- return lhs.m_it > rhs.m_it;\r
- }\r
-\r
- friend constexpr bool operator>=(primitive_iterator_t lhs, primitive_iterator_t rhs) noexcept\r
- {\r
- return lhs.m_it >= rhs.m_it;\r
- }\r
-\r
- primitive_iterator_t operator+(difference_type i)\r
- {\r
- auto result = *this;\r
- result += i;\r
- return result;\r
- }\r
-\r
- friend constexpr difference_type operator-(primitive_iterator_t lhs, primitive_iterator_t rhs) noexcept\r
- {\r
- return lhs.m_it - rhs.m_it;\r
- }\r
-\r
- friend std::ostream& operator<<(std::ostream& os, primitive_iterator_t it)\r
- {\r
- return os << it.m_it;\r
- }\r
-\r
- primitive_iterator_t& operator++()\r
- {\r
- ++m_it;\r
- return *this;\r
- }\r
-\r
- primitive_iterator_t operator++(int)\r
- {\r
- auto result = *this;\r
- m_it++;\r
- return result;\r
- }\r
-\r
- primitive_iterator_t& operator--()\r
- {\r
- --m_it;\r
- return *this;\r
- }\r
-\r
- primitive_iterator_t operator--(int)\r
- {\r
- auto result = *this;\r
- m_it--;\r
- return result;\r
- }\r
-\r
- primitive_iterator_t& operator+=(difference_type n)\r
- {\r
- m_it += n;\r
- return *this;\r
- }\r
-\r
- primitive_iterator_t& operator-=(difference_type n)\r
- {\r
- m_it -= n;\r
- return *this;\r
- }\r
-\r
- private:\r
- static constexpr difference_type begin_value = 0;\r
- static constexpr difference_type end_value = begin_value + 1;\r
-\r
- /// iterator as signed integer type\r
- difference_type m_it = std::numeric_limits<std::ptrdiff_t>::denorm_min();\r
- };\r
-\r
- /*!\r
- @brief an iterator value\r
-\r
- @note This structure could easily be a union, but MSVC currently does not\r
- allow unions members with complex constructors, see\r
- https://github.com/nlohmann/json/pull/105.\r
- */\r
- struct internal_iterator\r
- {\r
- /// iterator for JSON objects\r
- typename object_t::iterator object_iterator;\r
- /// iterator for JSON arrays\r
- typename array_t::iterator array_iterator;\r
- /// generic iterator for all other types\r
- primitive_iterator_t primitive_iterator;\r
-\r
- /// create an uninitialized internal_iterator\r
- internal_iterator() noexcept\r
- : object_iterator(), array_iterator(), primitive_iterator()\r
- {}\r
- };\r
-\r
- /// proxy class for the iterator_wrapper functions\r
- template<typename IteratorType>\r
- class iteration_proxy\r
- {\r
- private:\r
- /// helper class for iteration\r
- class iteration_proxy_internal\r
- {\r
- private:\r
- /// the iterator\r
- IteratorType anchor;\r
- /// an index for arrays (used to create key names)\r
- size_t array_index = 0;\r
-\r
- public:\r
- explicit iteration_proxy_internal(IteratorType it) noexcept\r
- : anchor(it)\r
- {}\r
-\r
- /// dereference operator (needed for range-based for)\r
- iteration_proxy_internal& operator*()\r
- {\r
- return *this;\r
- }\r
-\r
- /// increment operator (needed for range-based for)\r
- iteration_proxy_internal& operator++()\r
- {\r
- ++anchor;\r
- ++array_index;\r
-\r
- return *this;\r
- }\r
-\r
- /// inequality operator (needed for range-based for)\r
- bool operator!= (const iteration_proxy_internal& o) const\r
- {\r
- return anchor != o.anchor;\r
- }\r
-\r
- /// return key of the iterator\r
- typename basic_json::string_t key() const\r
- {\r
- assert(anchor.m_object != nullptr);\r
-\r
- switch (anchor.m_object->type())\r
- {\r
- // use integer array index as key\r
- case value_t::array:\r
- {\r
- return std::to_string(array_index);\r
- }\r
-\r
- // use key from the object\r
- case value_t::object:\r
- {\r
- return anchor.key();\r
- }\r
-\r
- // use an empty key for all primitive types\r
- default:\r
- {\r
- return "";\r
- }\r
- }\r
- }\r
-\r
- /// return value of the iterator\r
- typename IteratorType::reference value() const\r
- {\r
- return anchor.value();\r
- }\r
- };\r
-\r
- /// the container to iterate\r
- typename IteratorType::reference container;\r
-\r
- public:\r
- /// construct iteration proxy from a container\r
- explicit iteration_proxy(typename IteratorType::reference cont)\r
- : container(cont)\r
- {}\r
-\r
- /// return iterator begin (needed for range-based for)\r
- iteration_proxy_internal begin() noexcept\r
- {\r
- return iteration_proxy_internal(container.begin());\r
- }\r
-\r
- /// return iterator end (needed for range-based for)\r
- iteration_proxy_internal end() noexcept\r
- {\r
- return iteration_proxy_internal(container.end());\r
- }\r
- };\r
-\r
- public:\r
- /*!\r
- @brief a template for a random access iterator for the @ref basic_json class\r
-\r
- This class implements a both iterators (iterator and const_iterator) for the\r
- @ref basic_json class.\r
-\r
- @note An iterator is called *initialized* when a pointer to a JSON value\r
- has been set (e.g., by a constructor or a copy assignment). If the\r
- iterator is default-constructed, it is *uninitialized* and most\r
- methods are undefined. **The library uses assertions to detect calls\r
- on uninitialized iterators.**\r
-\r
- @requirement The class satisfies the following concept requirements:\r
- - [RandomAccessIterator](http://en.cppreference.com/w/cpp/concept/RandomAccessIterator):\r
- The iterator that can be moved to point (forward and backward) to any\r
- element in constant time.\r
-\r
- @since version 1.0.0, simplified in version 2.0.9\r
- */\r
- template<typename U>\r
- class iter_impl : public std::iterator<std::random_access_iterator_tag, U>\r
- {\r
- /// allow basic_json to access private members\r
- friend class basic_json;\r
-\r
- // make sure U is basic_json or const basic_json\r
- static_assert(std::is_same<U, basic_json>::value\r
- or std::is_same<U, const basic_json>::value,\r
- "iter_impl only accepts (const) basic_json");\r
-\r
- public:\r
- /// the type of the values when the iterator is dereferenced\r
- using value_type = typename basic_json::value_type;\r
- /// a type to represent differences between iterators\r
- using difference_type = typename basic_json::difference_type;\r
- /// defines a pointer to the type iterated over (value_type)\r
- using pointer = typename std::conditional<std::is_const<U>::value,\r
- typename basic_json::const_pointer,\r
- typename basic_json::pointer>::type;\r
- /// defines a reference to the type iterated over (value_type)\r
- using reference = typename std::conditional<std::is_const<U>::value,\r
- typename basic_json::const_reference,\r
- typename basic_json::reference>::type;\r
- /// the category of the iterator\r
- using iterator_category = std::bidirectional_iterator_tag;\r
-\r
- /// default constructor\r
- iter_impl() = default;\r
-\r
- /*!\r
- @brief constructor for a given JSON instance\r
- @param[in] object pointer to a JSON object for this iterator\r
- @pre object != nullptr\r
- @post The iterator is initialized; i.e. `m_object != nullptr`.\r
- */\r
- explicit iter_impl(pointer object) noexcept\r
- : m_object(object)\r
- {\r
- assert(m_object != nullptr);\r
-\r
- switch (m_object->m_type)\r
- {\r
- case basic_json::value_t::object:\r
- {\r
- m_it.object_iterator = typename object_t::iterator();\r
- break;\r
- }\r
-\r
- case basic_json::value_t::array:\r
- {\r
- m_it.array_iterator = typename array_t::iterator();\r
- break;\r
- }\r
-\r
- default:\r
- {\r
- m_it.primitive_iterator = primitive_iterator_t();\r
- break;\r
- }\r
- }\r
- }\r
-\r
- /*\r
- Use operator `const_iterator` instead of `const_iterator(const iterator&\r
- other) noexcept` to avoid two class definitions for @ref iterator and\r
- @ref const_iterator.\r
-\r
- This function is only called if this class is an @ref iterator. If this\r
- class is a @ref const_iterator this function is not called.\r
- */\r
- operator const_iterator() const\r
- {\r
- const_iterator ret;\r
-\r
- if (m_object)\r
- {\r
- ret.m_object = m_object;\r
- ret.m_it = m_it;\r
- }\r
-\r
- return ret;\r
- }\r
-\r
- /*!\r
- @brief copy constructor\r
- @param[in] other iterator to copy from\r
- @note It is not checked whether @a other is initialized.\r
- */\r
- iter_impl(const iter_impl& other) noexcept\r
- : m_object(other.m_object), m_it(other.m_it)\r
- {}\r
-\r
- /*!\r
- @brief copy assignment\r
- @param[in,out] other iterator to copy from\r
- @note It is not checked whether @a other is initialized.\r
- */\r
- iter_impl& operator=(iter_impl other) noexcept(\r
- std::is_nothrow_move_constructible<pointer>::value and\r
- std::is_nothrow_move_assignable<pointer>::value and\r
- std::is_nothrow_move_constructible<internal_iterator>::value and\r
- std::is_nothrow_move_assignable<internal_iterator>::value\r
- )\r
- {\r
- std::swap(m_object, other.m_object);\r
- std::swap(m_it, other.m_it);\r
- return *this;\r
- }\r
-\r
- private:\r
- /*!\r
- @brief set the iterator to the first value\r
- @pre The iterator is initialized; i.e. `m_object != nullptr`.\r
- */\r
- void set_begin() noexcept\r
- {\r
- assert(m_object != nullptr);\r
-\r
- switch (m_object->m_type)\r
- {\r
- case basic_json::value_t::object:\r
- {\r
- m_it.object_iterator = m_object->m_value.object->begin();\r
- break;\r
- }\r
-\r
- case basic_json::value_t::array:\r
- {\r
- m_it.array_iterator = m_object->m_value.array->begin();\r
- break;\r
- }\r
-\r
- case basic_json::value_t::null:\r
- {\r
- // set to end so begin()==end() is true: null is empty\r
- m_it.primitive_iterator.set_end();\r
- break;\r
- }\r
-\r
- default:\r
- {\r
- m_it.primitive_iterator.set_begin();\r
- break;\r
- }\r
- }\r
- }\r
-\r
- /*!\r
- @brief set the iterator past the last value\r
- @pre The iterator is initialized; i.e. `m_object != nullptr`.\r
- */\r
- void set_end() noexcept\r
- {\r
- assert(m_object != nullptr);\r
-\r
- switch (m_object->m_type)\r
- {\r
- case basic_json::value_t::object:\r
- {\r
- m_it.object_iterator = m_object->m_value.object->end();\r
- break;\r
- }\r
-\r
- case basic_json::value_t::array:\r
- {\r
- m_it.array_iterator = m_object->m_value.array->end();\r
- break;\r
- }\r
-\r
- default:\r
- {\r
- m_it.primitive_iterator.set_end();\r
- break;\r
- }\r
- }\r
- }\r
-\r
- public:\r
- /*!\r
- @brief return a reference to the value pointed to by the iterator\r
- @pre The iterator is initialized; i.e. `m_object != nullptr`.\r
- */\r
- reference operator*() const\r
- {\r
- assert(m_object != nullptr);\r
-\r
- switch (m_object->m_type)\r
- {\r
- case basic_json::value_t::object:\r
- {\r
- assert(m_it.object_iterator != m_object->m_value.object->end());\r
- return m_it.object_iterator->second;\r
- }\r
-\r
- case basic_json::value_t::array:\r
- {\r
- assert(m_it.array_iterator != m_object->m_value.array->end());\r
- return *m_it.array_iterator;\r
- }\r
-\r
- case basic_json::value_t::null:\r
- {\r
- JSON_THROW(std::out_of_range("cannot get value"));\r
- }\r
-\r
- default:\r
- {\r
- if (m_it.primitive_iterator.is_begin())\r
- {\r
- return *m_object;\r
- }\r
-\r
- JSON_THROW(std::out_of_range("cannot get value"));\r
- }\r
- }\r
- }\r
-\r
- /*!\r
- @brief dereference the iterator\r
- @pre The iterator is initialized; i.e. `m_object != nullptr`.\r
- */\r
- pointer operator->() const\r
- {\r
- assert(m_object != nullptr);\r
-\r
- switch (m_object->m_type)\r
- {\r
- case basic_json::value_t::object:\r
- {\r
- assert(m_it.object_iterator != m_object->m_value.object->end());\r
- return &(m_it.object_iterator->second);\r
- }\r
-\r
- case basic_json::value_t::array:\r
- {\r
- assert(m_it.array_iterator != m_object->m_value.array->end());\r
- return &*m_it.array_iterator;\r
- }\r
-\r
- default:\r
- {\r
- if (m_it.primitive_iterator.is_begin())\r
- {\r
- return m_object;\r
- }\r
-\r
- JSON_THROW(std::out_of_range("cannot get value"));\r
- }\r
- }\r
- }\r
-\r
- /*!\r
- @brief post-increment (it++)\r
- @pre The iterator is initialized; i.e. `m_object != nullptr`.\r
- */\r
- iter_impl operator++(int)\r
- {\r
- auto result = *this;\r
- ++(*this);\r
- return result;\r
- }\r
-\r
- /*!\r
- @brief pre-increment (++it)\r
- @pre The iterator is initialized; i.e. `m_object != nullptr`.\r
- */\r
- iter_impl& operator++()\r
- {\r
- assert(m_object != nullptr);\r
-\r
- switch (m_object->m_type)\r
- {\r
- case basic_json::value_t::object:\r
- {\r
- std::advance(m_it.object_iterator, 1);\r
- break;\r
- }\r
-\r
- case basic_json::value_t::array:\r
- {\r
- std::advance(m_it.array_iterator, 1);\r
- break;\r
- }\r
-\r
- default:\r
- {\r
- ++m_it.primitive_iterator;\r
- break;\r
- }\r
- }\r
-\r
- return *this;\r
- }\r
-\r
- /*!\r
- @brief post-decrement (it--)\r
- @pre The iterator is initialized; i.e. `m_object != nullptr`.\r
- */\r
- iter_impl operator--(int)\r
- {\r
- auto result = *this;\r
- --(*this);\r
- return result;\r
- }\r
-\r
- /*!\r
- @brief pre-decrement (--it)\r
- @pre The iterator is initialized; i.e. `m_object != nullptr`.\r
- */\r
- iter_impl& operator--()\r
- {\r
- assert(m_object != nullptr);\r
-\r
- switch (m_object->m_type)\r
- {\r
- case basic_json::value_t::object:\r
- {\r
- std::advance(m_it.object_iterator, -1);\r
- break;\r
- }\r
-\r
- case basic_json::value_t::array:\r
- {\r
- std::advance(m_it.array_iterator, -1);\r
- break;\r
- }\r
-\r
- default:\r
- {\r
- --m_it.primitive_iterator;\r
- break;\r
- }\r
- }\r
-\r
- return *this;\r
- }\r
-\r
- /*!\r
- @brief comparison: equal\r
- @pre The iterator is initialized; i.e. `m_object != nullptr`.\r
- */\r
- bool operator==(const iter_impl& other) const\r
- {\r
- // if objects are not the same, the comparison is undefined\r
- if (m_object != other.m_object)\r
- {\r
- JSON_THROW(std::domain_error("cannot compare iterators of different containers"));\r
- }\r
-\r
- assert(m_object != nullptr);\r
-\r
- switch (m_object->m_type)\r
- {\r
- case basic_json::value_t::object:\r
- {\r
- return (m_it.object_iterator == other.m_it.object_iterator);\r
- }\r
-\r
- case basic_json::value_t::array:\r
- {\r
- return (m_it.array_iterator == other.m_it.array_iterator);\r
- }\r
-\r
- default:\r
- {\r
- return (m_it.primitive_iterator == other.m_it.primitive_iterator);\r
- }\r
- }\r
- }\r
-\r
- /*!\r
- @brief comparison: not equal\r
- @pre The iterator is initialized; i.e. `m_object != nullptr`.\r
- */\r
- bool operator!=(const iter_impl& other) const\r
- {\r
- return not operator==(other);\r
- }\r
-\r
- /*!\r
- @brief comparison: smaller\r
- @pre The iterator is initialized; i.e. `m_object != nullptr`.\r
- */\r
- bool operator<(const iter_impl& other) const\r
- {\r
- // if objects are not the same, the comparison is undefined\r
- if (m_object != other.m_object)\r
- {\r
- JSON_THROW(std::domain_error("cannot compare iterators of different containers"));\r
- }\r
-\r
- assert(m_object != nullptr);\r
-\r
- switch (m_object->m_type)\r
- {\r
- case basic_json::value_t::object:\r
- {\r
- JSON_THROW(std::domain_error("cannot compare order of object iterators"));\r
- }\r
-\r
- case basic_json::value_t::array:\r
- {\r
- return (m_it.array_iterator < other.m_it.array_iterator);\r
- }\r
-\r
- default:\r
- {\r
- return (m_it.primitive_iterator < other.m_it.primitive_iterator);\r
- }\r
- }\r
- }\r
-\r
- /*!\r
- @brief comparison: less than or equal\r
- @pre The iterator is initialized; i.e. `m_object != nullptr`.\r
- */\r
- bool operator<=(const iter_impl& other) const\r
- {\r
- return not other.operator < (*this);\r
- }\r
-\r
- /*!\r
- @brief comparison: greater than\r
- @pre The iterator is initialized; i.e. `m_object != nullptr`.\r
- */\r
- bool operator>(const iter_impl& other) const\r
- {\r
- return not operator<=(other);\r
- }\r
-\r
- /*!\r
- @brief comparison: greater than or equal\r
- @pre The iterator is initialized; i.e. `m_object != nullptr`.\r
- */\r
- bool operator>=(const iter_impl& other) const\r
- {\r
- return not operator<(other);\r
- }\r
-\r
- /*!\r
- @brief add to iterator\r
- @pre The iterator is initialized; i.e. `m_object != nullptr`.\r
- */\r
- iter_impl& operator+=(difference_type i)\r
- {\r
- assert(m_object != nullptr);\r
-\r
- switch (m_object->m_type)\r
- {\r
- case basic_json::value_t::object:\r
- {\r
- JSON_THROW(std::domain_error("cannot use offsets with object iterators"));\r
- }\r
-\r
- case basic_json::value_t::array:\r
- {\r
- std::advance(m_it.array_iterator, i);\r
- break;\r
- }\r
-\r
- default:\r
- {\r
- m_it.primitive_iterator += i;\r
- break;\r
- }\r
- }\r
-\r
- return *this;\r
- }\r
-\r
- /*!\r
- @brief subtract from iterator\r
- @pre The iterator is initialized; i.e. `m_object != nullptr`.\r
- */\r
- iter_impl& operator-=(difference_type i)\r
- {\r
- return operator+=(-i);\r
- }\r
-\r
- /*!\r
- @brief add to iterator\r
- @pre The iterator is initialized; i.e. `m_object != nullptr`.\r
- */\r
- iter_impl operator+(difference_type i)\r
- {\r
- auto result = *this;\r
- result += i;\r
- return result;\r
- }\r
-\r
- /*!\r
- @brief subtract from iterator\r
- @pre The iterator is initialized; i.e. `m_object != nullptr`.\r
- */\r
- iter_impl operator-(difference_type i)\r
- {\r
- auto result = *this;\r
- result -= i;\r
- return result;\r
- }\r
-\r
- /*!\r
- @brief return difference\r
- @pre The iterator is initialized; i.e. `m_object != nullptr`.\r
- */\r
- difference_type operator-(const iter_impl& other) const\r
- {\r
- assert(m_object != nullptr);\r
-\r
- switch (m_object->m_type)\r
- {\r
- case basic_json::value_t::object:\r
- {\r
- JSON_THROW(std::domain_error("cannot use offsets with object iterators"));\r
- }\r
-\r
- case basic_json::value_t::array:\r
- {\r
- return m_it.array_iterator - other.m_it.array_iterator;\r
- }\r
-\r
- default:\r
- {\r
- return m_it.primitive_iterator - other.m_it.primitive_iterator;\r
- }\r
- }\r
- }\r
-\r
- /*!\r
- @brief access to successor\r
- @pre The iterator is initialized; i.e. `m_object != nullptr`.\r
- */\r
- reference operator[](difference_type n) const\r
- {\r
- assert(m_object != nullptr);\r
-\r
- switch (m_object->m_type)\r
- {\r
- case basic_json::value_t::object:\r
- {\r
- JSON_THROW(std::domain_error("cannot use operator[] for object iterators"));\r
- }\r
-\r
- case basic_json::value_t::array:\r
- {\r
- return *std::next(m_it.array_iterator, n);\r
- }\r
-\r
- case basic_json::value_t::null:\r
- {\r
- JSON_THROW(std::out_of_range("cannot get value"));\r
- }\r
-\r
- default:\r
- {\r
- if (m_it.primitive_iterator.get_value() == -n)\r
- {\r
- return *m_object;\r
- }\r
-\r
- JSON_THROW(std::out_of_range("cannot get value"));\r
- }\r
- }\r
- }\r
-\r
- /*!\r
- @brief return the key of an object iterator\r
- @pre The iterator is initialized; i.e. `m_object != nullptr`.\r
- */\r
- typename object_t::key_type key() const\r
- {\r
- assert(m_object != nullptr);\r
-\r
- if (m_object->is_object())\r
- {\r
- return m_it.object_iterator->first;\r
- }\r
-\r
- JSON_THROW(std::domain_error("cannot use key() for non-object iterators"));\r
- }\r
-\r
- /*!\r
- @brief return the value of an iterator\r
- @pre The iterator is initialized; i.e. `m_object != nullptr`.\r
- */\r
- reference value() const\r
- {\r
- return operator*();\r
- }\r
-\r
- private:\r
- /// associated JSON instance\r
- pointer m_object = nullptr;\r
- /// the actual iterator of the associated instance\r
- internal_iterator m_it = internal_iterator();\r
- };\r
-\r
- /*!\r
- @brief a template for a reverse iterator class\r
-\r
- @tparam Base the base iterator type to reverse. Valid types are @ref\r
- iterator (to create @ref reverse_iterator) and @ref const_iterator (to\r
- create @ref const_reverse_iterator).\r
-\r
- @requirement The class satisfies the following concept requirements:\r
- - [RandomAccessIterator](http://en.cppreference.com/w/cpp/concept/RandomAccessIterator):\r
- The iterator that can be moved to point (forward and backward) to any\r
- element in constant time.\r
- - [OutputIterator](http://en.cppreference.com/w/cpp/concept/OutputIterator):\r
- It is possible to write to the pointed-to element (only if @a Base is\r
- @ref iterator).\r
-\r
- @since version 1.0.0\r
- */\r
- template<typename Base>\r
- class json_reverse_iterator : public std::reverse_iterator<Base>\r
- {\r
- public:\r
- /// shortcut to the reverse iterator adaptor\r
- using base_iterator = std::reverse_iterator<Base>;\r
- /// the reference type for the pointed-to element\r
- using reference = typename Base::reference;\r
-\r
- /// create reverse iterator from iterator\r
- json_reverse_iterator(const typename base_iterator::iterator_type& it) noexcept\r
- : base_iterator(it)\r
- {}\r
-\r
- /// create reverse iterator from base class\r
- json_reverse_iterator(const base_iterator& it) noexcept\r
- : base_iterator(it)\r
- {}\r
-\r
- /// post-increment (it++)\r
- json_reverse_iterator operator++(int)\r
- {\r
- return base_iterator::operator++(1);\r
- }\r
-\r
- /// pre-increment (++it)\r
- json_reverse_iterator& operator++()\r
- {\r
- base_iterator::operator++();\r
- return *this;\r
- }\r
-\r
- /// post-decrement (it--)\r
- json_reverse_iterator operator--(int)\r
- {\r
- return base_iterator::operator--(1);\r
- }\r
-\r
- /// pre-decrement (--it)\r
- json_reverse_iterator& operator--()\r
- {\r
- base_iterator::operator--();\r
- return *this;\r
- }\r
-\r
- /// add to iterator\r
- json_reverse_iterator& operator+=(difference_type i)\r
- {\r
- base_iterator::operator+=(i);\r
- return *this;\r
- }\r
-\r
- /// add to iterator\r
- json_reverse_iterator operator+(difference_type i) const\r
- {\r
- auto result = *this;\r
- result += i;\r
- return result;\r
- }\r
-\r
- /// subtract from iterator\r
- json_reverse_iterator operator-(difference_type i) const\r
- {\r
- auto result = *this;\r
- result -= i;\r
- return result;\r
- }\r
-\r
- /// return difference\r
- difference_type operator-(const json_reverse_iterator& other) const\r
- {\r
- return this->base() - other.base();\r
- }\r
-\r
- /// access to successor\r
- reference operator[](difference_type n) const\r
- {\r
- return *(this->operator+(n));\r
- }\r
-\r
- /// return the key of an object iterator\r
- typename object_t::key_type key() const\r
- {\r
- auto it = --this->base();\r
- return it.key();\r
- }\r
-\r
- /// return the value of an iterator\r
- reference value() const\r
- {\r
- auto it = --this->base();\r
- return it.operator * ();\r
- }\r
- };\r
-\r
-\r
- private:\r
- //////////////////////\r
- // lexer and parser //\r
- //////////////////////\r
-\r
- /*!\r
- @brief lexical analysis\r
-\r
- This class organizes the lexical analysis during JSON deserialization. The\r
- core of it is a scanner generated by [re2c](http://re2c.org) that\r
- processes a buffer and recognizes tokens according to RFC 7159.\r
- */\r
- class lexer\r
- {\r
- public:\r
- /// token types for the parser\r
- enum class token_type\r
- {\r
- uninitialized, ///< indicating the scanner is uninitialized\r
- literal_true, ///< the `true` literal\r
- literal_false, ///< the `false` literal\r
- literal_null, ///< the `null` literal\r
- value_string, ///< a string -- use get_string() for actual value\r
- value_unsigned, ///< an unsigned integer -- use get_number() for actual value\r
- value_integer, ///< a signed integer -- use get_number() for actual value\r
- value_float, ///< an floating point number -- use get_number() for actual value\r
- begin_array, ///< the character for array begin `[`\r
- begin_object, ///< the character for object begin `{`\r
- end_array, ///< the character for array end `]`\r
- end_object, ///< the character for object end `}`\r
- name_separator, ///< the name separator `:`\r
- value_separator, ///< the value separator `,`\r
- parse_error, ///< indicating a parse error\r
- end_of_input ///< indicating the end of the input buffer\r
- };\r
-\r
- /// the char type to use in the lexer\r
- using lexer_char_t = unsigned char;\r
-\r
- /// a lexer from a buffer with given length\r
- lexer(const lexer_char_t* buff, const size_t len) noexcept\r
- : m_content(buff)\r
- {\r
- assert(m_content != nullptr);\r
- m_start = m_cursor = m_content;\r
- m_limit = m_content + len;\r
- }\r
-\r
- /// a lexer from an input stream\r
- explicit lexer(std::istream& s)\r
- : m_stream(&s), m_line_buffer()\r
- {\r
- // immediately abort if stream is erroneous\r
- if (s.fail())\r
- {\r
- JSON_THROW(std::invalid_argument("stream error"));\r
- }\r
-\r
- // fill buffer\r
- fill_line_buffer();\r
-\r
- // skip UTF-8 byte-order mark\r
- if (m_line_buffer.size() >= 3 and m_line_buffer.substr(0, 3) == "\xEF\xBB\xBF")\r
- {\r
- m_line_buffer[0] = ' ';\r
- m_line_buffer[1] = ' ';\r
- m_line_buffer[2] = ' ';\r
- }\r
- }\r
-\r
- // switch off unwanted functions (due to pointer members)\r
- lexer() = delete;\r
- lexer(const lexer&) = delete;\r
- lexer operator=(const lexer&) = delete;\r
-\r
- /*!\r
- @brief create a string from one or two Unicode code points\r
-\r
- There are two cases: (1) @a codepoint1 is in the Basic Multilingual\r
- Plane (U+0000 through U+FFFF) and @a codepoint2 is 0, or (2)\r
- @a codepoint1 and @a codepoint2 are a UTF-16 surrogate pair to\r
- represent a code point above U+FFFF.\r
-\r
- @param[in] codepoint1 the code point (can be high surrogate)\r
- @param[in] codepoint2 the code point (can be low surrogate or 0)\r
-\r
- @return string representation of the code point; the length of the\r
- result string is between 1 and 4 characters.\r
-\r
- @throw std::out_of_range if code point is > 0x10ffff; example: `"code\r
- points above 0x10FFFF are invalid"`\r
- @throw std::invalid_argument if the low surrogate is invalid; example:\r
- `""missing or wrong low surrogate""`\r
-\r
- @complexity Constant.\r
-\r
- @see <http://en.wikipedia.org/wiki/UTF-8#Sample_code>\r
- */\r
- static string_t to_unicode(const std::size_t codepoint1,\r
- const std::size_t codepoint2 = 0)\r
- {\r
- // calculate the code point from the given code points\r
- std::size_t codepoint = codepoint1;\r
-\r
- // check if codepoint1 is a high surrogate\r
- if (codepoint1 >= 0xD800 and codepoint1 <= 0xDBFF)\r
- {\r
- // check if codepoint2 is a low surrogate\r
- if (codepoint2 >= 0xDC00 and codepoint2 <= 0xDFFF)\r
- {\r
- codepoint =\r
- // high surrogate occupies the most significant 22 bits\r
- (codepoint1 << 10)\r
- // low surrogate occupies the least significant 15 bits\r
- + codepoint2\r
- // there is still the 0xD800, 0xDC00 and 0x10000 noise\r
- // in the result so we have to subtract with:\r
- // (0xD800 << 10) + DC00 - 0x10000 = 0x35FDC00\r
- - 0x35FDC00;\r
- }\r
- else\r
- {\r
- JSON_THROW(std::invalid_argument("missing or wrong low surrogate"));\r
- }\r
- }\r
-\r
- string_t result;\r
-\r
- if (codepoint < 0x80)\r
- {\r
- // 1-byte characters: 0xxxxxxx (ASCII)\r
- result.append(1, static_cast<typename string_t::value_type>(codepoint));\r
- }\r
- else if (codepoint <= 0x7ff)\r
- {\r
- // 2-byte characters: 110xxxxx 10xxxxxx\r
- result.append(1, static_cast<typename string_t::value_type>(0xC0 | ((codepoint >> 6) & 0x1F)));\r
- result.append(1, static_cast<typename string_t::value_type>(0x80 | (codepoint & 0x3F)));\r
- }\r
- else if (codepoint <= 0xffff)\r
- {\r
- // 3-byte characters: 1110xxxx 10xxxxxx 10xxxxxx\r
- result.append(1, static_cast<typename string_t::value_type>(0xE0 | ((codepoint >> 12) & 0x0F)));\r
- result.append(1, static_cast<typename string_t::value_type>(0x80 | ((codepoint >> 6) & 0x3F)));\r
- result.append(1, static_cast<typename string_t::value_type>(0x80 | (codepoint & 0x3F)));\r
- }\r
- else if (codepoint <= 0x10ffff)\r
- {\r
- // 4-byte characters: 11110xxx 10xxxxxx 10xxxxxx 10xxxxxx\r
- result.append(1, static_cast<typename string_t::value_type>(0xF0 | ((codepoint >> 18) & 0x07)));\r
- result.append(1, static_cast<typename string_t::value_type>(0x80 | ((codepoint >> 12) & 0x3F)));\r
- result.append(1, static_cast<typename string_t::value_type>(0x80 | ((codepoint >> 6) & 0x3F)));\r
- result.append(1, static_cast<typename string_t::value_type>(0x80 | (codepoint & 0x3F)));\r
- }\r
- else\r
- {\r
- JSON_THROW(std::out_of_range("code points above 0x10FFFF are invalid"));\r
- }\r
-\r
- return result;\r
- }\r
-\r
- /// return name of values of type token_type (only used for errors)\r
- static std::string token_type_name(const token_type t)\r
- {\r
- switch (t)\r
- {\r
- case token_type::uninitialized:\r
- return "<uninitialized>";\r
- case token_type::literal_true:\r
- return "true literal";\r
- case token_type::literal_false:\r
- return "false literal";\r
- case token_type::literal_null:\r
- return "null literal";\r
- case token_type::value_string:\r
- return "string literal";\r
- case lexer::token_type::value_unsigned:\r
- case lexer::token_type::value_integer:\r
- case lexer::token_type::value_float:\r
- return "number literal";\r
- case token_type::begin_array:\r
- return "'['";\r
- case token_type::begin_object:\r
- return "'{'";\r
- case token_type::end_array:\r
- return "']'";\r
- case token_type::end_object:\r
- return "'}'";\r
- case token_type::name_separator:\r
- return "':'";\r
- case token_type::value_separator:\r
- return "','";\r
- case token_type::parse_error:\r
- return "<parse error>";\r
- case token_type::end_of_input:\r
- return "end of input";\r
- default:\r
- {\r
- // catch non-enum values\r
- return "unknown token"; // LCOV_EXCL_LINE\r
- }\r
- }\r
- }\r
-\r
- /*!\r
- This function implements a scanner for JSON. It is specified using\r
- regular expressions that try to follow RFC 7159 as close as possible.\r
- These regular expressions are then translated into a minimized\r
- deterministic finite automaton (DFA) by the tool\r
- [re2c](http://re2c.org). As a result, the translated code for this\r
- function consists of a large block of code with `goto` jumps.\r
-\r
- @return the class of the next token read from the buffer\r
-\r
- @complexity Linear in the length of the input.\n\r
-\r
- Proposition: The loop below will always terminate for finite input.\n\r
-\r
- Proof (by contradiction): Assume a finite input. To loop forever, the\r
- loop must never hit code with a `break` statement. The only code\r
- snippets without a `break` statement are the continue statements for\r
- whitespace and byte-order-marks. To loop forever, the input must be an\r
- infinite sequence of whitespace or byte-order-marks. This contradicts\r
- the assumption of finite input, q.e.d.\r
- */\r
- token_type scan()\r
- {\r
- while (true)\r
- {\r
- // pointer for backtracking information\r
- m_marker = nullptr;\r
-\r
- // remember the begin of the token\r
- m_start = m_cursor;\r
- assert(m_start != nullptr);\r
-\r
-\r
- {\r
- lexer_char_t yych;\r
- unsigned int yyaccept = 0;\r
- static const unsigned char yybm[] =\r
- {\r
- 0, 0, 0, 0, 0, 0, 0, 0,\r
- 0, 32, 32, 0, 0, 32, 0, 0,\r
- 0, 0, 0, 0, 0, 0, 0, 0,\r
- 0, 0, 0, 0, 0, 0, 0, 0,\r
- 160, 128, 0, 128, 128, 128, 128, 128,\r
- 128, 128, 128, 128, 128, 128, 128, 128,\r
- 192, 192, 192, 192, 192, 192, 192, 192,\r
- 192, 192, 128, 128, 128, 128, 128, 128,\r
- 128, 128, 128, 128, 128, 128, 128, 128,\r
- 128, 128, 128, 128, 128, 128, 128, 128,\r
- 128, 128, 128, 128, 128, 128, 128, 128,\r
- 128, 128, 128, 128, 0, 128, 128, 128,\r
- 128, 128, 128, 128, 128, 128, 128, 128,\r
- 128, 128, 128, 128, 128, 128, 128, 128,\r
- 128, 128, 128, 128, 128, 128, 128, 128,\r
- 128, 128, 128, 128, 128, 128, 128, 128,\r
- 0, 0, 0, 0, 0, 0, 0, 0,\r
- 0, 0, 0, 0, 0, 0, 0, 0,\r
- 0, 0, 0, 0, 0, 0, 0, 0,\r
- 0, 0, 0, 0, 0, 0, 0, 0,\r
- 0, 0, 0, 0, 0, 0, 0, 0,\r
- 0, 0, 0, 0, 0, 0, 0, 0,\r
- 0, 0, 0, 0, 0, 0, 0, 0,\r
- 0, 0, 0, 0, 0, 0, 0, 0,\r
- 0, 0, 0, 0, 0, 0, 0, 0,\r
- 0, 0, 0, 0, 0, 0, 0, 0,\r
- 0, 0, 0, 0, 0, 0, 0, 0,\r
- 0, 0, 0, 0, 0, 0, 0, 0,\r
- 0, 0, 0, 0, 0, 0, 0, 0,\r
- 0, 0, 0, 0, 0, 0, 0, 0,\r
- 0, 0, 0, 0, 0, 0, 0, 0,\r
- 0, 0, 0, 0, 0, 0, 0, 0,\r
- };\r
- if ((m_limit - m_cursor) < 5)\r
- {\r
- fill_line_buffer(5); // LCOV_EXCL_LINE\r
- }\r
- yych = *m_cursor;\r
- if (yybm[0 + yych] & 32)\r
- {\r
- goto basic_json_parser_6;\r
- }\r
- if (yych <= '[')\r
- {\r
- if (yych <= '-')\r
- {\r
- if (yych <= '"')\r
- {\r
- if (yych <= 0x00)\r
- {\r
- goto basic_json_parser_2;\r
- }\r
- if (yych <= '!')\r
- {\r
- goto basic_json_parser_4;\r
- }\r
- goto basic_json_parser_9;\r
- }\r
- else\r
- {\r
- if (yych <= '+')\r
- {\r
- goto basic_json_parser_4;\r
- }\r
- if (yych <= ',')\r
- {\r
- goto basic_json_parser_10;\r
- }\r
- goto basic_json_parser_12;\r
- }\r
- }\r
- else\r
- {\r
- if (yych <= '9')\r
- {\r
- if (yych <= '/')\r
- {\r
- goto basic_json_parser_4;\r
- }\r
- if (yych <= '0')\r
- {\r
- goto basic_json_parser_13;\r
- }\r
- goto basic_json_parser_15;\r
- }\r
- else\r
- {\r
- if (yych <= ':')\r
- {\r
- goto basic_json_parser_17;\r
- }\r
- if (yych <= 'Z')\r
- {\r
- goto basic_json_parser_4;\r
- }\r
- goto basic_json_parser_19;\r
- }\r
- }\r
- }\r
- else\r
- {\r
- if (yych <= 'n')\r
- {\r
- if (yych <= 'e')\r
- {\r
- if (yych == ']')\r
- {\r
- goto basic_json_parser_21;\r
- }\r
- goto basic_json_parser_4;\r
- }\r
- else\r
- {\r
- if (yych <= 'f')\r
- {\r
- goto basic_json_parser_23;\r
- }\r
- if (yych <= 'm')\r
- {\r
- goto basic_json_parser_4;\r
- }\r
- goto basic_json_parser_24;\r
- }\r
- }\r
- else\r
- {\r
- if (yych <= 'z')\r
- {\r
- if (yych == 't')\r
- {\r
- goto basic_json_parser_25;\r
- }\r
- goto basic_json_parser_4;\r
- }\r
- else\r
- {\r
- if (yych <= '{')\r
- {\r
- goto basic_json_parser_26;\r
- }\r
- if (yych == '}')\r
- {\r
- goto basic_json_parser_28;\r
- }\r
- goto basic_json_parser_4;\r
- }\r
- }\r
- }\r
-basic_json_parser_2:\r
- ++m_cursor;\r
- {\r
- last_token_type = token_type::end_of_input;\r
- break;\r
- }\r
-basic_json_parser_4:\r
- ++m_cursor;\r
-basic_json_parser_5:\r
- {\r
- last_token_type = token_type::parse_error;\r
- break;\r
- }\r
-basic_json_parser_6:\r
- ++m_cursor;\r
- if (m_limit <= m_cursor)\r
- {\r
- fill_line_buffer(1); // LCOV_EXCL_LINE\r
- }\r
- yych = *m_cursor;\r
- if (yybm[0 + yych] & 32)\r
- {\r
- goto basic_json_parser_6;\r
- }\r
- {\r
- continue;\r
- }\r
-basic_json_parser_9:\r
- yyaccept = 0;\r
- yych = *(m_marker = ++m_cursor);\r
- if (yych <= 0x1F)\r
- {\r
- goto basic_json_parser_5;\r
- }\r
- if (yych <= 0x7F)\r
- {\r
- goto basic_json_parser_31;\r
- }\r
- if (yych <= 0xC1)\r
- {\r
- goto basic_json_parser_5;\r
- }\r
- if (yych <= 0xF4)\r
- {\r
- goto basic_json_parser_31;\r
- }\r
- goto basic_json_parser_5;\r
-basic_json_parser_10:\r
- ++m_cursor;\r
- {\r
- last_token_type = token_type::value_separator;\r
- break;\r
- }\r
-basic_json_parser_12:\r
- yych = *++m_cursor;\r
- if (yych <= '/')\r
- {\r
- goto basic_json_parser_5;\r
- }\r
- if (yych <= '0')\r
- {\r
- goto basic_json_parser_43;\r
- }\r
- if (yych <= '9')\r
- {\r
- goto basic_json_parser_45;\r
- }\r
- goto basic_json_parser_5;\r
-basic_json_parser_13:\r
- yyaccept = 1;\r
- yych = *(m_marker = ++m_cursor);\r
- if (yych <= '9')\r
- {\r
- if (yych == '.')\r
- {\r
- goto basic_json_parser_47;\r
- }\r
- if (yych >= '0')\r
- {\r
- goto basic_json_parser_48;\r
- }\r
- }\r
- else\r
- {\r
- if (yych <= 'E')\r
- {\r
- if (yych >= 'E')\r
- {\r
- goto basic_json_parser_51;\r
- }\r
- }\r
- else\r
- {\r
- if (yych == 'e')\r
- {\r
- goto basic_json_parser_51;\r
- }\r
- }\r
- }\r
-basic_json_parser_14:\r
- {\r
- last_token_type = token_type::value_unsigned;\r
- break;\r
- }\r
-basic_json_parser_15:\r
- yyaccept = 1;\r
- m_marker = ++m_cursor;\r
- if ((m_limit - m_cursor) < 3)\r
- {\r
- fill_line_buffer(3); // LCOV_EXCL_LINE\r
- }\r
- yych = *m_cursor;\r
- if (yybm[0 + yych] & 64)\r
- {\r
- goto basic_json_parser_15;\r
- }\r
- if (yych <= 'D')\r
- {\r
- if (yych == '.')\r
- {\r
- goto basic_json_parser_47;\r
- }\r
- goto basic_json_parser_14;\r
- }\r
- else\r
- {\r
- if (yych <= 'E')\r
- {\r
- goto basic_json_parser_51;\r
- }\r
- if (yych == 'e')\r
- {\r
- goto basic_json_parser_51;\r
- }\r
- goto basic_json_parser_14;\r
- }\r
-basic_json_parser_17:\r
- ++m_cursor;\r
- {\r
- last_token_type = token_type::name_separator;\r
- break;\r
- }\r
-basic_json_parser_19:\r
- ++m_cursor;\r
- {\r
- last_token_type = token_type::begin_array;\r
- break;\r
- }\r
-basic_json_parser_21:\r
- ++m_cursor;\r
- {\r
- last_token_type = token_type::end_array;\r
- break;\r
- }\r
-basic_json_parser_23:\r
- yyaccept = 0;\r
- yych = *(m_marker = ++m_cursor);\r
- if (yych == 'a')\r
- {\r
- goto basic_json_parser_52;\r
- }\r
- goto basic_json_parser_5;\r
-basic_json_parser_24:\r
- yyaccept = 0;\r
- yych = *(m_marker = ++m_cursor);\r
- if (yych == 'u')\r
- {\r
- goto basic_json_parser_53;\r
- }\r
- goto basic_json_parser_5;\r
-basic_json_parser_25:\r
- yyaccept = 0;\r
- yych = *(m_marker = ++m_cursor);\r
- if (yych == 'r')\r
- {\r
- goto basic_json_parser_54;\r
- }\r
- goto basic_json_parser_5;\r
-basic_json_parser_26:\r
- ++m_cursor;\r
- {\r
- last_token_type = token_type::begin_object;\r
- break;\r
- }\r
-basic_json_parser_28:\r
- ++m_cursor;\r
- {\r
- last_token_type = token_type::end_object;\r
- break;\r
- }\r
-basic_json_parser_30:\r
- ++m_cursor;\r
- if (m_limit <= m_cursor)\r
- {\r
- fill_line_buffer(1); // LCOV_EXCL_LINE\r
- }\r
- yych = *m_cursor;\r
-basic_json_parser_31:\r
- if (yybm[0 + yych] & 128)\r
- {\r
- goto basic_json_parser_30;\r
- }\r
- if (yych <= 0xE0)\r
- {\r
- if (yych <= '\\')\r
- {\r
- if (yych <= 0x1F)\r
- {\r
- goto basic_json_parser_32;\r
- }\r
- if (yych <= '"')\r
- {\r
- goto basic_json_parser_33;\r
- }\r
- goto basic_json_parser_35;\r
- }\r
- else\r
- {\r
- if (yych <= 0xC1)\r
- {\r
- goto basic_json_parser_32;\r
- }\r
- if (yych <= 0xDF)\r
- {\r
- goto basic_json_parser_36;\r
- }\r
- goto basic_json_parser_37;\r
- }\r
- }\r
- else\r
- {\r
- if (yych <= 0xEF)\r
- {\r
- if (yych == 0xED)\r
- {\r
- goto basic_json_parser_39;\r
- }\r
- goto basic_json_parser_38;\r
- }\r
- else\r
- {\r
- if (yych <= 0xF0)\r
- {\r
- goto basic_json_parser_40;\r
- }\r
- if (yych <= 0xF3)\r
- {\r
- goto basic_json_parser_41;\r
- }\r
- if (yych <= 0xF4)\r
- {\r
- goto basic_json_parser_42;\r
- }\r
- }\r
- }\r
-basic_json_parser_32:\r
- m_cursor = m_marker;\r
- if (yyaccept <= 1)\r
- {\r
- if (yyaccept == 0)\r
- {\r
- goto basic_json_parser_5;\r
- }\r
- else\r
- {\r
- goto basic_json_parser_14;\r
- }\r
- }\r
- else\r
- {\r
- if (yyaccept == 2)\r
- {\r
- goto basic_json_parser_44;\r
- }\r
- else\r
- {\r
- goto basic_json_parser_58;\r
- }\r
- }\r
-basic_json_parser_33:\r
- ++m_cursor;\r
- {\r
- last_token_type = token_type::value_string;\r
- break;\r
- }\r
-basic_json_parser_35:\r
- ++m_cursor;\r
- if (m_limit <= m_cursor)\r
- {\r
- fill_line_buffer(1); // LCOV_EXCL_LINE\r
- }\r
- yych = *m_cursor;\r
- if (yych <= 'e')\r
- {\r
- if (yych <= '/')\r
- {\r
- if (yych == '"')\r
- {\r
- goto basic_json_parser_30;\r
- }\r
- if (yych <= '.')\r
- {\r
- goto basic_json_parser_32;\r
- }\r
- goto basic_json_parser_30;\r
- }\r
- else\r
- {\r
- if (yych <= '\\')\r
- {\r
- if (yych <= '[')\r
- {\r
- goto basic_json_parser_32;\r
- }\r
- goto basic_json_parser_30;\r
- }\r
- else\r
- {\r
- if (yych == 'b')\r
- {\r
- goto basic_json_parser_30;\r
- }\r
- goto basic_json_parser_32;\r
- }\r
- }\r
- }\r
- else\r
- {\r
- if (yych <= 'q')\r
- {\r
- if (yych <= 'f')\r
- {\r
- goto basic_json_parser_30;\r
- }\r
- if (yych == 'n')\r
- {\r
- goto basic_json_parser_30;\r
- }\r
- goto basic_json_parser_32;\r
- }\r
- else\r
- {\r
- if (yych <= 's')\r
- {\r
- if (yych <= 'r')\r
- {\r
- goto basic_json_parser_30;\r
- }\r
- goto basic_json_parser_32;\r
- }\r
- else\r
- {\r
- if (yych <= 't')\r
- {\r
- goto basic_json_parser_30;\r
- }\r
- if (yych <= 'u')\r
- {\r
- goto basic_json_parser_55;\r
- }\r
- goto basic_json_parser_32;\r
- }\r
- }\r
- }\r
-basic_json_parser_36:\r
- ++m_cursor;\r
- if (m_limit <= m_cursor)\r
- {\r
- fill_line_buffer(1); // LCOV_EXCL_LINE\r
- }\r
- yych = *m_cursor;\r
- if (yych <= 0x7F)\r
- {\r
- goto basic_json_parser_32;\r
- }\r
- if (yych <= 0xBF)\r
- {\r
- goto basic_json_parser_30;\r
- }\r
- goto basic_json_parser_32;\r
-basic_json_parser_37:\r
- ++m_cursor;\r
- if (m_limit <= m_cursor)\r
- {\r
- fill_line_buffer(1); // LCOV_EXCL_LINE\r
- }\r
- yych = *m_cursor;\r
- if (yych <= 0x9F)\r
- {\r
- goto basic_json_parser_32;\r
- }\r
- if (yych <= 0xBF)\r
- {\r
- goto basic_json_parser_36;\r
- }\r
- goto basic_json_parser_32;\r
-basic_json_parser_38:\r
- ++m_cursor;\r
- if (m_limit <= m_cursor)\r
- {\r
- fill_line_buffer(1); // LCOV_EXCL_LINE\r
- }\r
- yych = *m_cursor;\r
- if (yych <= 0x7F)\r
- {\r
- goto basic_json_parser_32;\r
- }\r
- if (yych <= 0xBF)\r
- {\r
- goto basic_json_parser_36;\r
- }\r
- goto basic_json_parser_32;\r
-basic_json_parser_39:\r
- ++m_cursor;\r
- if (m_limit <= m_cursor)\r
- {\r
- fill_line_buffer(1); // LCOV_EXCL_LINE\r
- }\r
- yych = *m_cursor;\r
- if (yych <= 0x7F)\r
- {\r
- goto basic_json_parser_32;\r
- }\r
- if (yych <= 0x9F)\r
- {\r
- goto basic_json_parser_36;\r
- }\r
- goto basic_json_parser_32;\r
-basic_json_parser_40:\r
- ++m_cursor;\r
- if (m_limit <= m_cursor)\r
- {\r
- fill_line_buffer(1); // LCOV_EXCL_LINE\r
- }\r
- yych = *m_cursor;\r
- if (yych <= 0x8F)\r
- {\r
- goto basic_json_parser_32;\r
- }\r
- if (yych <= 0xBF)\r
- {\r
- goto basic_json_parser_38;\r
- }\r
- goto basic_json_parser_32;\r
-basic_json_parser_41:\r
- ++m_cursor;\r
- if (m_limit <= m_cursor)\r
- {\r
- fill_line_buffer(1); // LCOV_EXCL_LINE\r
- }\r
- yych = *m_cursor;\r
- if (yych <= 0x7F)\r
- {\r
- goto basic_json_parser_32;\r
- }\r
- if (yych <= 0xBF)\r
- {\r
- goto basic_json_parser_38;\r
- }\r
- goto basic_json_parser_32;\r
-basic_json_parser_42:\r
- ++m_cursor;\r
- if (m_limit <= m_cursor)\r
- {\r
- fill_line_buffer(1); // LCOV_EXCL_LINE\r
- }\r
- yych = *m_cursor;\r
- if (yych <= 0x7F)\r
- {\r
- goto basic_json_parser_32;\r
- }\r
- if (yych <= 0x8F)\r
- {\r
- goto basic_json_parser_38;\r
- }\r
- goto basic_json_parser_32;\r
-basic_json_parser_43:\r
- yyaccept = 2;\r
- yych = *(m_marker = ++m_cursor);\r
- if (yych <= '9')\r
- {\r
- if (yych == '.')\r
- {\r
- goto basic_json_parser_47;\r
- }\r
- if (yych >= '0')\r
- {\r
- goto basic_json_parser_48;\r
- }\r
- }\r
- else\r
- {\r
- if (yych <= 'E')\r
- {\r
- if (yych >= 'E')\r
- {\r
- goto basic_json_parser_51;\r
- }\r
- }\r
- else\r
- {\r
- if (yych == 'e')\r
- {\r
- goto basic_json_parser_51;\r
- }\r
- }\r
- }\r
-basic_json_parser_44:\r
- {\r
- last_token_type = token_type::value_integer;\r
- break;\r
- }\r
-basic_json_parser_45:\r
- yyaccept = 2;\r
- m_marker = ++m_cursor;\r
- if ((m_limit - m_cursor) < 3)\r
- {\r
- fill_line_buffer(3); // LCOV_EXCL_LINE\r
- }\r
- yych = *m_cursor;\r
- if (yych <= '9')\r
- {\r
- if (yych == '.')\r
- {\r
- goto basic_json_parser_47;\r
- }\r
- if (yych <= '/')\r
- {\r
- goto basic_json_parser_44;\r
- }\r
- goto basic_json_parser_45;\r
- }\r
- else\r
- {\r
- if (yych <= 'E')\r
- {\r
- if (yych <= 'D')\r
- {\r
- goto basic_json_parser_44;\r
- }\r
- goto basic_json_parser_51;\r
- }\r
- else\r
- {\r
- if (yych == 'e')\r
- {\r
- goto basic_json_parser_51;\r
- }\r
- goto basic_json_parser_44;\r
- }\r
- }\r
-basic_json_parser_47:\r
- yych = *++m_cursor;\r
- if (yych <= '/')\r
- {\r
- goto basic_json_parser_32;\r
- }\r
- if (yych <= '9')\r
- {\r
- goto basic_json_parser_56;\r
- }\r
- goto basic_json_parser_32;\r
-basic_json_parser_48:\r
- ++m_cursor;\r
- if (m_limit <= m_cursor)\r
- {\r
- fill_line_buffer(1); // LCOV_EXCL_LINE\r
- }\r
- yych = *m_cursor;\r
- if (yych <= '/')\r
- {\r
- goto basic_json_parser_50;\r
- }\r
- if (yych <= '9')\r
- {\r
- goto basic_json_parser_48;\r
- }\r
-basic_json_parser_50:\r
- {\r
- last_token_type = token_type::parse_error;\r
- break;\r
- }\r
-basic_json_parser_51:\r
- yych = *++m_cursor;\r
- if (yych <= ',')\r
- {\r
- if (yych == '+')\r
- {\r
- goto basic_json_parser_59;\r
- }\r
- goto basic_json_parser_32;\r
- }\r
- else\r
- {\r
- if (yych <= '-')\r
- {\r
- goto basic_json_parser_59;\r
- }\r
- if (yych <= '/')\r
- {\r
- goto basic_json_parser_32;\r
- }\r
- if (yych <= '9')\r
- {\r
- goto basic_json_parser_60;\r
- }\r
- goto basic_json_parser_32;\r
- }\r
-basic_json_parser_52:\r
- yych = *++m_cursor;\r
- if (yych == 'l')\r
- {\r
- goto basic_json_parser_62;\r
- }\r
- goto basic_json_parser_32;\r
-basic_json_parser_53:\r
- yych = *++m_cursor;\r
- if (yych == 'l')\r
- {\r
- goto basic_json_parser_63;\r
- }\r
- goto basic_json_parser_32;\r
-basic_json_parser_54:\r
- yych = *++m_cursor;\r
- if (yych == 'u')\r
- {\r
- goto basic_json_parser_64;\r
- }\r
- goto basic_json_parser_32;\r
-basic_json_parser_55:\r
- ++m_cursor;\r
- if (m_limit <= m_cursor)\r
- {\r
- fill_line_buffer(1); // LCOV_EXCL_LINE\r
- }\r
- yych = *m_cursor;\r
- if (yych <= '@')\r
- {\r
- if (yych <= '/')\r
- {\r
- goto basic_json_parser_32;\r
- }\r
- if (yych <= '9')\r
- {\r
- goto basic_json_parser_65;\r
- }\r
- goto basic_json_parser_32;\r
- }\r
- else\r
- {\r
- if (yych <= 'F')\r
- {\r
- goto basic_json_parser_65;\r
- }\r
- if (yych <= '`')\r
- {\r
- goto basic_json_parser_32;\r
- }\r
- if (yych <= 'f')\r
- {\r
- goto basic_json_parser_65;\r
- }\r
- goto basic_json_parser_32;\r
- }\r
-basic_json_parser_56:\r
- yyaccept = 3;\r
- m_marker = ++m_cursor;\r
- if ((m_limit - m_cursor) < 3)\r
- {\r
- fill_line_buffer(3); // LCOV_EXCL_LINE\r
- }\r
- yych = *m_cursor;\r
- if (yych <= 'D')\r
- {\r
- if (yych <= '/')\r
- {\r
- goto basic_json_parser_58;\r
- }\r
- if (yych <= '9')\r
- {\r
- goto basic_json_parser_56;\r
- }\r
- }\r
- else\r
- {\r
- if (yych <= 'E')\r
- {\r
- goto basic_json_parser_51;\r
- }\r
- if (yych == 'e')\r
- {\r
- goto basic_json_parser_51;\r
- }\r
- }\r
-basic_json_parser_58:\r
- {\r
- last_token_type = token_type::value_float;\r
- break;\r
- }\r
-basic_json_parser_59:\r
- yych = *++m_cursor;\r
- if (yych <= '/')\r
- {\r
- goto basic_json_parser_32;\r
- }\r
- if (yych >= ':')\r
- {\r
- goto basic_json_parser_32;\r
- }\r
-basic_json_parser_60:\r
- ++m_cursor;\r
- if (m_limit <= m_cursor)\r
- {\r
- fill_line_buffer(1); // LCOV_EXCL_LINE\r
- }\r
- yych = *m_cursor;\r
- if (yych <= '/')\r
- {\r
- goto basic_json_parser_58;\r
- }\r
- if (yych <= '9')\r
- {\r
- goto basic_json_parser_60;\r
- }\r
- goto basic_json_parser_58;\r
-basic_json_parser_62:\r
- yych = *++m_cursor;\r
- if (yych == 's')\r
- {\r
- goto basic_json_parser_66;\r
- }\r
- goto basic_json_parser_32;\r
-basic_json_parser_63:\r
- yych = *++m_cursor;\r
- if (yych == 'l')\r
- {\r
- goto basic_json_parser_67;\r
- }\r
- goto basic_json_parser_32;\r
-basic_json_parser_64:\r
- yych = *++m_cursor;\r
- if (yych == 'e')\r
- {\r
- goto basic_json_parser_69;\r
- }\r
- goto basic_json_parser_32;\r
-basic_json_parser_65:\r
- ++m_cursor;\r
- if (m_limit <= m_cursor)\r
- {\r
- fill_line_buffer(1); // LCOV_EXCL_LINE\r
- }\r
- yych = *m_cursor;\r
- if (yych <= '@')\r
- {\r
- if (yych <= '/')\r
- {\r
- goto basic_json_parser_32;\r
- }\r
- if (yych <= '9')\r
- {\r
- goto basic_json_parser_71;\r
- }\r
- goto basic_json_parser_32;\r
- }\r
- else\r
- {\r
- if (yych <= 'F')\r
- {\r
- goto basic_json_parser_71;\r
- }\r
- if (yych <= '`')\r
- {\r
- goto basic_json_parser_32;\r
- }\r
- if (yych <= 'f')\r
- {\r
- goto basic_json_parser_71;\r
- }\r
- goto basic_json_parser_32;\r
- }\r
-basic_json_parser_66:\r
- yych = *++m_cursor;\r
- if (yych == 'e')\r
- {\r
- goto basic_json_parser_72;\r
- }\r
- goto basic_json_parser_32;\r
-basic_json_parser_67:\r
- ++m_cursor;\r
- {\r
- last_token_type = token_type::literal_null;\r
- break;\r
- }\r
-basic_json_parser_69:\r
- ++m_cursor;\r
- {\r
- last_token_type = token_type::literal_true;\r
- break;\r
- }\r
-basic_json_parser_71:\r
- ++m_cursor;\r
- if (m_limit <= m_cursor)\r
- {\r
- fill_line_buffer(1); // LCOV_EXCL_LINE\r
- }\r
- yych = *m_cursor;\r
- if (yych <= '@')\r
- {\r
- if (yych <= '/')\r
- {\r
- goto basic_json_parser_32;\r
- }\r
- if (yych <= '9')\r
- {\r
- goto basic_json_parser_74;\r
- }\r
- goto basic_json_parser_32;\r
- }\r
- else\r
- {\r
- if (yych <= 'F')\r
- {\r
- goto basic_json_parser_74;\r
- }\r
- if (yych <= '`')\r
- {\r
- goto basic_json_parser_32;\r
- }\r
- if (yych <= 'f')\r
- {\r
- goto basic_json_parser_74;\r
- }\r
- goto basic_json_parser_32;\r
- }\r
-basic_json_parser_72:\r
- ++m_cursor;\r
- {\r
- last_token_type = token_type::literal_false;\r
- break;\r
- }\r
-basic_json_parser_74:\r
- ++m_cursor;\r
- if (m_limit <= m_cursor)\r
- {\r
- fill_line_buffer(1); // LCOV_EXCL_LINE\r
- }\r
- yych = *m_cursor;\r
- if (yych <= '@')\r
- {\r
- if (yych <= '/')\r
- {\r
- goto basic_json_parser_32;\r
- }\r
- if (yych <= '9')\r
- {\r
- goto basic_json_parser_30;\r
- }\r
- goto basic_json_parser_32;\r
- }\r
- else\r
- {\r
- if (yych <= 'F')\r
- {\r
- goto basic_json_parser_30;\r
- }\r
- if (yych <= '`')\r
- {\r
- goto basic_json_parser_32;\r
- }\r
- if (yych <= 'f')\r
- {\r
- goto basic_json_parser_30;\r
- }\r
- goto basic_json_parser_32;\r
- }\r
- }\r
-\r
- }\r
-\r
- return last_token_type;\r
- }\r
-\r
- /*!\r
- @brief append data from the stream to the line buffer\r
-\r
- This function is called by the scan() function when the end of the\r
- buffer (`m_limit`) is reached and the `m_cursor` pointer cannot be\r
- incremented without leaving the limits of the line buffer. Note re2c\r
- decides when to call this function.\r
-\r
- If the lexer reads from contiguous storage, there is no trailing null\r
- byte. Therefore, this function must make sure to add these padding\r
- null bytes.\r
-\r
- If the lexer reads from an input stream, this function reads the next\r
- line of the input.\r
-\r
- @pre\r
- p p p p p p u u u u u x . . . . . .\r
- ^ ^ ^ ^\r
- m_content m_start | m_limit\r
- m_cursor\r
-\r
- @post\r
- u u u u u x x x x x x x . . . . . .\r
- ^ ^ ^\r
- | m_cursor m_limit\r
- m_start\r
- m_content\r
- */\r
- void fill_line_buffer(size_t n = 0)\r
- {\r
- // if line buffer is used, m_content points to its data\r
- assert(m_line_buffer.empty()\r
- or m_content == reinterpret_cast<const lexer_char_t*>(m_line_buffer.data()));\r
-\r
- // if line buffer is used, m_limit is set past the end of its data\r
- assert(m_line_buffer.empty()\r
- or m_limit == m_content + m_line_buffer.size());\r
-\r
- // pointer relationships\r
- assert(m_content <= m_start);\r
- assert(m_start <= m_cursor);\r
- assert(m_cursor <= m_limit);\r
- assert(m_marker == nullptr or m_marker <= m_limit);\r
-\r
- // number of processed characters (p)\r
- const auto num_processed_chars = static_cast<size_t>(m_start - m_content);\r
- // offset for m_marker wrt. to m_start\r
- const auto offset_marker = (m_marker == nullptr) ? 0 : m_marker - m_start;\r
- // number of unprocessed characters (u)\r
- const auto offset_cursor = m_cursor - m_start;\r
-\r
- // no stream is used or end of file is reached\r
- if (m_stream == nullptr or m_stream->eof())\r
- {\r
- // m_start may or may not be pointing into m_line_buffer at\r
- // this point. We trust the standard library to do the right\r
- // thing. See http://stackoverflow.com/q/28142011/266378\r
- m_line_buffer.assign(m_start, m_limit);\r
-\r
- // append n characters to make sure that there is sufficient\r
- // space between m_cursor and m_limit\r
- m_line_buffer.append(1, '\x00');\r
- if (n > 0)\r
- {\r
- m_line_buffer.append(n - 1, '\x01');\r
- }\r
- }\r
- else\r
- {\r
- // delete processed characters from line buffer\r
- m_line_buffer.erase(0, num_processed_chars);\r
- // read next line from input stream\r
- m_line_buffer_tmp.clear();\r
- std::getline(*m_stream, m_line_buffer_tmp, '\n');\r
-\r
- // add line with newline symbol to the line buffer\r
- m_line_buffer += m_line_buffer_tmp;\r
- m_line_buffer.push_back('\n');\r
- }\r
-\r
- // set pointers\r
- m_content = reinterpret_cast<const lexer_char_t*>(m_line_buffer.data());\r
- assert(m_content != nullptr);\r
- m_start = m_content;\r
- m_marker = m_start + offset_marker;\r
- m_cursor = m_start + offset_cursor;\r
- m_limit = m_start + m_line_buffer.size();\r
- }\r
-\r
- /// return string representation of last read token\r
- string_t get_token_string() const\r
- {\r
- assert(m_start != nullptr);\r
- return string_t(reinterpret_cast<typename string_t::const_pointer>(m_start),\r
- static_cast<size_t>(m_cursor - m_start));\r
- }\r
-\r
- /*!\r
- @brief return string value for string tokens\r
-\r
- The function iterates the characters between the opening and closing\r
- quotes of the string value. The complete string is the range\r
- [m_start,m_cursor). Consequently, we iterate from m_start+1 to\r
- m_cursor-1.\r
-\r
- We differentiate two cases:\r
-\r
- 1. Escaped characters. In this case, a new character is constructed\r
- according to the nature of the escape. Some escapes create new\r
- characters (e.g., `"\\n"` is replaced by `"\n"`), some are copied\r
- as is (e.g., `"\\\\"`). Furthermore, Unicode escapes of the shape\r
- `"\\uxxxx"` need special care. In this case, to_unicode takes care\r
- of the construction of the values.\r
- 2. Unescaped characters are copied as is.\r
-\r
- @pre `m_cursor - m_start >= 2`, meaning the length of the last token\r
- is at least 2 bytes which is trivially true for any string (which\r
- consists of at least two quotes).\r
-\r
- " c1 c2 c3 ... "\r
- ^ ^\r
- m_start m_cursor\r
-\r
- @complexity Linear in the length of the string.\n\r
-\r
- Lemma: The loop body will always terminate.\n\r
-\r
- Proof (by contradiction): Assume the loop body does not terminate. As\r
- the loop body does not contain another loop, one of the called\r
- functions must never return. The called functions are `std::strtoul`\r
- and to_unicode. Neither function can loop forever, so the loop body\r
- will never loop forever which contradicts the assumption that the loop\r
- body does not terminate, q.e.d.\n\r
-\r
- Lemma: The loop condition for the for loop is eventually false.\n\r
-\r
- Proof (by contradiction): Assume the loop does not terminate. Due to\r
- the above lemma, this can only be due to a tautological loop\r
- condition; that is, the loop condition i < m_cursor - 1 must always be\r
- true. Let x be the change of i for any loop iteration. Then\r
- m_start + 1 + x < m_cursor - 1 must hold to loop indefinitely. This\r
- can be rephrased to m_cursor - m_start - 2 > x. With the\r
- precondition, we x <= 0, meaning that the loop condition holds\r
- indefinitely if i is always decreased. However, observe that the value\r
- of i is strictly increasing with each iteration, as it is incremented\r
- by 1 in the iteration expression and never decremented inside the loop\r
- body. Hence, the loop condition will eventually be false which\r
- contradicts the assumption that the loop condition is a tautology,\r
- q.e.d.\r
-\r
- @return string value of current token without opening and closing\r
- quotes\r
- @throw std::out_of_range if to_unicode fails\r
- */\r
- string_t get_string() const\r
- {\r
- assert(m_cursor - m_start >= 2);\r
-\r
- string_t result;\r
- result.reserve(static_cast<size_t>(m_cursor - m_start - 2));\r
-\r
- // iterate the result between the quotes\r
- for (const lexer_char_t* i = m_start + 1; i < m_cursor - 1; ++i)\r
- {\r
- // find next escape character\r
- auto e = std::find(i, m_cursor - 1, '\\');\r
- if (e != i)\r
- {\r
- // see https://github.com/nlohmann/json/issues/365#issuecomment-262874705\r
- for (auto k = i; k < e; k++)\r
- {\r
- result.push_back(static_cast<typename string_t::value_type>(*k));\r
- }\r
- i = e - 1; // -1 because of ++i\r
- }\r
- else\r
- {\r
- // processing escaped character\r
- // read next character\r
- ++i;\r
-\r
- switch (*i)\r
- {\r
- // the default escapes\r
- case 't':\r
- {\r
- result += "\t";\r
- break;\r
- }\r
- case 'b':\r
- {\r
- result += "\b";\r
- break;\r
- }\r
- case 'f':\r
- {\r
- result += "\f";\r
- break;\r
- }\r
- case 'n':\r
- {\r
- result += "\n";\r
- break;\r
- }\r
- case 'r':\r
- {\r
- result += "\r";\r
- break;\r
- }\r
- case '\\':\r
- {\r
- result += "\\";\r
- break;\r
- }\r
- case '/':\r
- {\r
- result += "/";\r
- break;\r
- }\r
- case '"':\r
- {\r
- result += "\"";\r
- break;\r
- }\r
-\r
- // unicode\r
- case 'u':\r
- {\r
- // get code xxxx from uxxxx\r
- auto codepoint = std::strtoul(std::string(reinterpret_cast<typename string_t::const_pointer>(i + 1),\r
- 4).c_str(), nullptr, 16);\r
-\r
- // check if codepoint is a high surrogate\r
- if (codepoint >= 0xD800 and codepoint <= 0xDBFF)\r
- {\r
- // make sure there is a subsequent unicode\r
- if ((i + 6 >= m_limit) or * (i + 5) != '\\' or * (i + 6) != 'u')\r
- {\r
- JSON_THROW(std::invalid_argument("missing low surrogate"));\r
- }\r
-\r
- // get code yyyy from uxxxx\uyyyy\r
- auto codepoint2 = std::strtoul(std::string(reinterpret_cast<typename string_t::const_pointer>\r
- (i + 7), 4).c_str(), nullptr, 16);\r
- result += to_unicode(codepoint, codepoint2);\r
- // skip the next 10 characters (xxxx\uyyyy)\r
- i += 10;\r
- }\r
- else if (codepoint >= 0xDC00 and codepoint <= 0xDFFF)\r
- {\r
- // we found a lone low surrogate\r
- JSON_THROW(std::invalid_argument("missing high surrogate"));\r
- }\r
- else\r
- {\r
- // add unicode character(s)\r
- result += to_unicode(codepoint);\r
- // skip the next four characters (xxxx)\r
- i += 4;\r
- }\r
- break;\r
- }\r
- }\r
- }\r
- }\r
-\r
- return result;\r
- }\r
-\r
-\r
- /*!\r
- @brief parse string into a built-in arithmetic type as if the current\r
- locale is POSIX.\r
-\r
- @note in floating-point case strtod may parse past the token's end -\r
- this is not an error\r
-\r
- @note any leading blanks are not handled\r
- */\r
- struct strtonum\r
- {\r
- public:\r
- strtonum(const char* start, const char* end)\r
- : m_start(start), m_end(end)\r
- {}\r
-\r
- /*!\r
- @return true iff parsed successfully as number of type T\r
-\r
- @param[in,out] val shall contain parsed value, or undefined value\r
- if could not parse\r
- */\r
- template<typename T, typename = typename std::enable_if<std::is_arithmetic<T>::value>::type>\r
- bool to(T& val) const\r
- {\r
- return parse(val, std::is_integral<T>());\r
- }\r
-\r
- private:\r
- const char* const m_start = nullptr;\r
- const char* const m_end = nullptr;\r
-\r
- // floating-point conversion\r
-\r
- // overloaded wrappers for strtod/strtof/strtold\r
- // that will be called from parse<floating_point_t>\r
- static void strtof(float& f, const char* str, char** endptr)\r
- {\r
- f = std::strtof(str, endptr);\r
- }\r
-\r
- static void strtof(double& f, const char* str, char** endptr)\r
- {\r
- f = std::strtod(str, endptr);\r
- }\r
-\r
- static void strtof(long double& f, const char* str, char** endptr)\r
- {\r
- f = std::strtold(str, endptr);\r
- }\r
-\r
- template<typename T>\r
- bool parse(T& value, /*is_integral=*/std::false_type) const\r
- {\r
- // replace decimal separator with locale-specific version,\r
- // when necessary; data will point to either the original\r
- // string, or buf, or tempstr containing the fixed string.\r
- std::string tempstr;\r
- std::array<char, 64> buf;\r
- const size_t len = static_cast<size_t>(m_end - m_start);\r
-\r
- // lexer will reject empty numbers\r
- assert(len > 0);\r
-\r
- // since dealing with strtod family of functions, we're\r
- // getting the decimal point char from the C locale facilities\r
- // instead of C++'s numpunct facet of the current std::locale\r
- const auto loc = localeconv();\r
- assert(loc != nullptr);\r
- const char decimal_point_char = (loc->decimal_point == nullptr) ? '.' : loc->decimal_point[0];\r
-\r
- const char* data = m_start;\r
-\r
- if (decimal_point_char != '.')\r
- {\r
- const size_t ds_pos = static_cast<size_t>(std::find(m_start, m_end, '.') - m_start);\r
-\r
- if (ds_pos != len)\r
- {\r
- // copy the data into the local buffer or tempstr, if\r
- // buffer is too small; replace decimal separator, and\r
- // update data to point to the modified bytes\r
- if ((len + 1) < buf.size())\r
- {\r
- std::copy(m_start, m_end, buf.begin());\r
- buf[len] = 0;\r
- buf[ds_pos] = decimal_point_char;\r
- data = buf.data();\r
- }\r
- else\r
- {\r
- tempstr.assign(m_start, m_end);\r
- tempstr[ds_pos] = decimal_point_char;\r
- data = tempstr.c_str();\r
- }\r
- }\r
- }\r
-\r
- char* endptr = nullptr;\r
- value = 0;\r
- // this calls appropriate overload depending on T\r
- strtof(value, data, &endptr);\r
-\r
- // parsing was successful iff strtof parsed exactly the number\r
- // of characters determined by the lexer (len)\r
- const bool ok = (endptr == (data + len));\r
-\r
- if (ok and (value == static_cast<T>(0.0)) and (*data == '-'))\r
- {\r
- // some implementations forget to negate the zero\r
- value = -0.0;\r
- }\r
-\r
- return ok;\r
- }\r
-\r
- // integral conversion\r
-\r
- signed long long parse_integral(char** endptr, /*is_signed*/std::true_type) const\r
- {\r
- return std::strtoll(m_start, endptr, 10);\r
- }\r
-\r
- unsigned long long parse_integral(char** endptr, /*is_signed*/std::false_type) const\r
- {\r
- return std::strtoull(m_start, endptr, 10);\r
- }\r
-\r
- template<typename T>\r
- bool parse(T& value, /*is_integral=*/std::true_type) const\r
- {\r
- char* endptr = nullptr;\r
- errno = 0; // these are thread-local\r
- const auto x = parse_integral(&endptr, std::is_signed<T>());\r
-\r
- // called right overload?\r
- static_assert(std::is_signed<T>() == std::is_signed<decltype(x)>(), "");\r
-\r
- value = static_cast<T>(x);\r
-\r
- return (x == static_cast<decltype(x)>(value)) // x fits into destination T\r
- and (x < 0) == (value < 0) // preserved sign\r
- //and ((x != 0) or is_integral()) // strto[u]ll did nto fail\r
- and (errno == 0) // strto[u]ll did not overflow\r
- and (m_start < m_end) // token was not empty\r
- and (endptr == m_end); // parsed entire token exactly\r
- }\r
- };\r
-\r
- /*!\r
- @brief return number value for number tokens\r
-\r
- This function translates the last token into the most appropriate\r
- number type (either integer, unsigned integer or floating point),\r
- which is passed back to the caller via the result parameter.\r
-\r
- integral numbers that don't fit into the the range of the respective\r
- type are parsed as number_float_t\r
-\r
- floating-point values do not satisfy std::isfinite predicate\r
- are converted to value_t::null\r
-\r
- throws if the entire string [m_start .. m_cursor) cannot be\r
- interpreted as a number\r
-\r
- @param[out] result @ref basic_json object to receive the number.\r
- @param[in] token the type of the number token\r
- */\r
- bool get_number(basic_json& result, const token_type token) const\r
- {\r
- assert(m_start != nullptr);\r
- assert(m_start < m_cursor);\r
- assert((token == token_type::value_unsigned) or\r
- (token == token_type::value_integer) or\r
- (token == token_type::value_float));\r
-\r
- strtonum num_converter(reinterpret_cast<const char*>(m_start),\r
- reinterpret_cast<const char*>(m_cursor));\r
-\r
- switch (token)\r
- {\r
- case lexer::token_type::value_unsigned:\r
- {\r
- number_unsigned_t val;\r
- if (num_converter.to(val))\r
- {\r
- // parsing successful\r
- result.m_type = value_t::number_unsigned;\r
- result.m_value = val;\r
- return true;\r
- }\r
- break;\r
- }\r
-\r
- case lexer::token_type::value_integer:\r
- {\r
- number_integer_t val;\r
- if (num_converter.to(val))\r
- {\r
- // parsing successful\r
- result.m_type = value_t::number_integer;\r
- result.m_value = val;\r
- return true;\r
- }\r
- break;\r
- }\r
-\r
- default:\r
- {\r
- break;\r
- }\r
- }\r
-\r
- // parse float (either explicitly or because a previous conversion\r
- // failed)\r
- number_float_t val;\r
- if (num_converter.to(val))\r
- {\r
- // parsing successful\r
- result.m_type = value_t::number_float;\r
- result.m_value = val;\r
-\r
- // replace infinity and NAN by null\r
- if (not std::isfinite(result.m_value.number_float))\r
- {\r
- result.m_type = value_t::null;\r
- result.m_value = basic_json::json_value();\r
- }\r
-\r
- return true;\r
- }\r
-\r
- // couldn't parse number in any format\r
- return false;\r
- }\r
-\r
- private:\r
- /// optional input stream\r
- std::istream* m_stream = nullptr;\r
- /// line buffer buffer for m_stream\r
- string_t m_line_buffer {};\r
- /// used for filling m_line_buffer\r
- string_t m_line_buffer_tmp {};\r
- /// the buffer pointer\r
- const lexer_char_t* m_content = nullptr;\r
- /// pointer to the beginning of the current symbol\r
- const lexer_char_t* m_start = nullptr;\r
- /// pointer for backtracking information\r
- const lexer_char_t* m_marker = nullptr;\r
- /// pointer to the current symbol\r
- const lexer_char_t* m_cursor = nullptr;\r
- /// pointer to the end of the buffer\r
- const lexer_char_t* m_limit = nullptr;\r
- /// the last token type\r
- token_type last_token_type = token_type::end_of_input;\r
- };\r
-\r
- /*!\r
- @brief syntax analysis\r
-\r
- This class implements a recursive decent parser.\r
- */\r
- class parser\r
- {\r
- public:\r
- /// a parser reading from a string literal\r
- parser(const char* buff, const parser_callback_t cb = nullptr)\r
- : callback(cb),\r
- m_lexer(reinterpret_cast<const typename lexer::lexer_char_t*>(buff), std::strlen(buff))\r
- {}\r
-\r
- /// a parser reading from an input stream\r
- parser(std::istream& is, const parser_callback_t cb = nullptr)\r
- : callback(cb), m_lexer(is)\r
- {}\r
-\r
- /// a parser reading from an iterator range with contiguous storage\r
- template<class IteratorType, typename std::enable_if<\r
- std::is_same<typename std::iterator_traits<IteratorType>::iterator_category, std::random_access_iterator_tag>::value\r
- , int>::type\r
- = 0>\r
- parser(IteratorType first, IteratorType last, const parser_callback_t cb = nullptr)\r
- : callback(cb),\r
- m_lexer(reinterpret_cast<const typename lexer::lexer_char_t*>(&(*first)),\r
- static_cast<size_t>(std::distance(first, last)))\r
- {}\r
-\r
- /// public parser interface\r
- basic_json parse()\r
- {\r
- // read first token\r
- get_token();\r
-\r
- basic_json result = parse_internal(true);\r
- result.assert_invariant();\r
-\r
- expect(lexer::token_type::end_of_input);\r
-\r
- // return parser result and replace it with null in case the\r
- // top-level value was discarded by the callback function\r
- return result.is_discarded() ? basic_json() : std::move(result);\r
- }\r
-\r
- private:\r
- /// the actual parser\r
- basic_json parse_internal(bool keep)\r
- {\r
- auto result = basic_json(value_t::discarded);\r
-\r
- switch (last_token)\r
- {\r
- case lexer::token_type::begin_object:\r
- {\r
- if (keep and (not callback\r
- or ((keep = callback(depth++, parse_event_t::object_start, result)) != 0)))\r
- {\r
- // explicitly set result to object to cope with {}\r
- result.m_type = value_t::object;\r
- result.m_value = value_t::object;\r
- }\r
-\r
- // read next token\r
- get_token();\r
-\r
- // closing } -> we are done\r
- if (last_token == lexer::token_type::end_object)\r
- {\r
- get_token();\r
- if (keep and callback and not callback(--depth, parse_event_t::object_end, result))\r
- {\r
- result = basic_json(value_t::discarded);\r
- }\r
- return result;\r
- }\r
-\r
- // no comma is expected here\r
- unexpect(lexer::token_type::value_separator);\r
-\r
- // otherwise: parse key-value pairs\r
- do\r
- {\r
- // ugly, but could be fixed with loop reorganization\r
- if (last_token == lexer::token_type::value_separator)\r
- {\r
- get_token();\r
- }\r
-\r
- // store key\r
- expect(lexer::token_type::value_string);\r
- const auto key = m_lexer.get_string();\r
-\r
- bool keep_tag = false;\r
- if (keep)\r
- {\r
- if (callback)\r
- {\r
- basic_json k(key);\r
- keep_tag = callback(depth, parse_event_t::key, k);\r
- }\r
- else\r
- {\r
- keep_tag = true;\r
- }\r
- }\r
-\r
- // parse separator (:)\r
- get_token();\r
- expect(lexer::token_type::name_separator);\r
-\r
- // parse and add value\r
- get_token();\r
- auto value = parse_internal(keep);\r
- if (keep and keep_tag and not value.is_discarded())\r
- {\r
- result[key] = std::move(value);\r
- }\r
- }\r
- while (last_token == lexer::token_type::value_separator);\r
-\r
- // closing }\r
- expect(lexer::token_type::end_object);\r
- get_token();\r
- if (keep and callback and not callback(--depth, parse_event_t::object_end, result))\r
- {\r
- result = basic_json(value_t::discarded);\r
- }\r
-\r
- return result;\r
- }\r
-\r
- case lexer::token_type::begin_array:\r
- {\r
- if (keep and (not callback\r
- or ((keep = callback(depth++, parse_event_t::array_start, result)) != 0)))\r
- {\r
- // explicitly set result to object to cope with []\r
- result.m_type = value_t::array;\r
- result.m_value = value_t::array;\r
- }\r
-\r
- // read next token\r
- get_token();\r
-\r
- // closing ] -> we are done\r
- if (last_token == lexer::token_type::end_array)\r
- {\r
- get_token();\r
- if (callback and not callback(--depth, parse_event_t::array_end, result))\r
- {\r
- result = basic_json(value_t::discarded);\r
- }\r
- return result;\r
- }\r
-\r
- // no comma is expected here\r
- unexpect(lexer::token_type::value_separator);\r
-\r
- // otherwise: parse values\r
- do\r
- {\r
- // ugly, but could be fixed with loop reorganization\r
- if (last_token == lexer::token_type::value_separator)\r
- {\r
- get_token();\r
- }\r
-\r
- // parse value\r
- auto value = parse_internal(keep);\r
- if (keep and not value.is_discarded())\r
- {\r
- result.push_back(std::move(value));\r
- }\r
- }\r
- while (last_token == lexer::token_type::value_separator);\r
-\r
- // closing ]\r
- expect(lexer::token_type::end_array);\r
- get_token();\r
- if (keep and callback and not callback(--depth, parse_event_t::array_end, result))\r
- {\r
- result = basic_json(value_t::discarded);\r
- }\r
-\r
- return result;\r
- }\r
-\r
- case lexer::token_type::literal_null:\r
- {\r
- get_token();\r
- result.m_type = value_t::null;\r
- break;\r
- }\r
-\r
- case lexer::token_type::value_string:\r
- {\r
- const auto s = m_lexer.get_string();\r
- get_token();\r
- result = basic_json(s);\r
- break;\r
- }\r
-\r
- case lexer::token_type::literal_true:\r
- {\r
- get_token();\r
- result.m_type = value_t::boolean;\r
- result.m_value = true;\r
- break;\r
- }\r
-\r
- case lexer::token_type::literal_false:\r
- {\r
- get_token();\r
- result.m_type = value_t::boolean;\r
- result.m_value = false;\r
- break;\r
- }\r
-\r
- case lexer::token_type::value_unsigned:\r
- case lexer::token_type::value_integer:\r
- case lexer::token_type::value_float:\r
- {\r
- m_lexer.get_number(result, last_token);\r
- get_token();\r
- break;\r
- }\r
-\r
- default:\r
- {\r
- // the last token was unexpected\r
- unexpect(last_token);\r
- }\r
- }\r
-\r
- if (keep and callback and not callback(depth, parse_event_t::value, result))\r
- {\r
- result = basic_json(value_t::discarded);\r
- }\r
- return result;\r
- }\r
-\r
- /// get next token from lexer\r
- typename lexer::token_type get_token()\r
- {\r
- last_token = m_lexer.scan();\r
- return last_token;\r
- }\r
-\r
- void expect(typename lexer::token_type t) const\r
- {\r
- if (t != last_token)\r
- {\r
- std::string error_msg = "parse error - unexpected ";\r
- error_msg += (last_token == lexer::token_type::parse_error ? ("'" + m_lexer.get_token_string() +\r
- "'") :\r
- lexer::token_type_name(last_token));\r
- error_msg += "; expected " + lexer::token_type_name(t);\r
- JSON_THROW(std::invalid_argument(error_msg));\r
- }\r
- }\r
-\r
- void unexpect(typename lexer::token_type t) const\r
- {\r
- if (t == last_token)\r
- {\r
- std::string error_msg = "parse error - unexpected ";\r
- error_msg += (last_token == lexer::token_type::parse_error ? ("'" + m_lexer.get_token_string() +\r
- "'") :\r
- lexer::token_type_name(last_token));\r
- JSON_THROW(std::invalid_argument(error_msg));\r
- }\r
- }\r
-\r
- private:\r
- /// current level of recursion\r
- int depth = 0;\r
- /// callback function\r
- const parser_callback_t callback = nullptr;\r
- /// the type of the last read token\r
- typename lexer::token_type last_token = lexer::token_type::uninitialized;\r
- /// the lexer\r
- lexer m_lexer;\r
- };\r
-\r
- public:\r
- /*!\r
- @brief JSON Pointer\r
-\r
- A JSON pointer defines a string syntax for identifying a specific value\r
- within a JSON document. It can be used with functions `at` and\r
- `operator[]`. Furthermore, JSON pointers are the base for JSON patches.\r
-\r
- @sa [RFC 6901](https://tools.ietf.org/html/rfc6901)\r
-\r
- @since version 2.0.0\r
- */\r
- class json_pointer\r
- {\r
- /// allow basic_json to access private members\r
- friend class basic_json;\r
-\r
- public:\r
- /*!\r
- @brief create JSON pointer\r
-\r
- Create a JSON pointer according to the syntax described in\r
- [Section 3 of RFC6901](https://tools.ietf.org/html/rfc6901#section-3).\r
-\r
- @param[in] s string representing the JSON pointer; if omitted, the\r
- empty string is assumed which references the whole JSON\r
- value\r
-\r
- @throw std::domain_error if reference token is nonempty and does not\r
- begin with a slash (`/`); example: `"JSON pointer must be empty or\r
- begin with /"`\r
- @throw std::domain_error if a tilde (`~`) is not followed by `0`\r
- (representing `~`) or `1` (representing `/`); example: `"escape error:\r
- ~ must be followed with 0 or 1"`\r
-\r
- @liveexample{The example shows the construction several valid JSON\r
- pointers as well as the exceptional behavior.,json_pointer}\r
-\r
- @since version 2.0.0\r
- */\r
- explicit json_pointer(const std::string& s = "")\r
- : reference_tokens(split(s))\r
- {}\r
-\r
- /*!\r
- @brief return a string representation of the JSON pointer\r
-\r
- @invariant For each JSON pointer `ptr`, it holds:\r
- @code {.cpp}\r
- ptr == json_pointer(ptr.to_string());\r
- @endcode\r
-\r
- @return a string representation of the JSON pointer\r
-\r
- @liveexample{The example shows the result of `to_string`.,\r
- json_pointer__to_string}\r
-\r
- @since version 2.0.0\r
- */\r
- std::string to_string() const noexcept\r
- {\r
- return std::accumulate(reference_tokens.begin(),\r
- reference_tokens.end(), std::string{},\r
- [](const std::string & a, const std::string & b)\r
- {\r
- return a + "/" + escape(b);\r
- });\r
- }\r
-\r
- /// @copydoc to_string()\r
- operator std::string() const\r
- {\r
- return to_string();\r
- }\r
-\r
- private:\r
- /// remove and return last reference pointer\r
- std::string pop_back()\r
- {\r
- if (is_root())\r
- {\r
- JSON_THROW(std::domain_error("JSON pointer has no parent"));\r
- }\r
-\r
- auto last = reference_tokens.back();\r
- reference_tokens.pop_back();\r
- return last;\r
- }\r
-\r
- /// return whether pointer points to the root document\r
- bool is_root() const\r
- {\r
- return reference_tokens.empty();\r
- }\r
-\r
- json_pointer top() const\r
- {\r
- if (is_root())\r
- {\r
- JSON_THROW(std::domain_error("JSON pointer has no parent"));\r
- }\r
-\r
- json_pointer result = *this;\r
- result.reference_tokens = {reference_tokens[0]};\r
- return result;\r
- }\r
-\r
- /*!\r
- @brief create and return a reference to the pointed to value\r
-\r
- @complexity Linear in the number of reference tokens.\r
- */\r
- reference get_and_create(reference j) const\r
- {\r
- pointer result = &j;\r
-\r
- // in case no reference tokens exist, return a reference to the\r
- // JSON value j which will be overwritten by a primitive value\r
- for (const auto& reference_token : reference_tokens)\r
- {\r
- switch (result->m_type)\r
- {\r
- case value_t::null:\r
- {\r
- if (reference_token == "0")\r
- {\r
- // start a new array if reference token is 0\r
- result = &result->operator[](0);\r
- }\r
- else\r
- {\r
- // start a new object otherwise\r
- result = &result->operator[](reference_token);\r
- }\r
- break;\r
- }\r
-\r
- case value_t::object:\r
- {\r
- // create an entry in the object\r
- result = &result->operator[](reference_token);\r
- break;\r
- }\r
-\r
- case value_t::array:\r
- {\r
- // create an entry in the array\r
- result = &result->operator[](static_cast<size_type>(std::stoi(reference_token)));\r
- break;\r
- }\r
-\r
- /*\r
- The following code is only reached if there exists a\r
- reference token _and_ the current value is primitive. In\r
- this case, we have an error situation, because primitive\r
- values may only occur as single value; that is, with an\r
- empty list of reference tokens.\r
- */\r
- default:\r
- {\r
- JSON_THROW(std::domain_error("invalid value to unflatten"));\r
- }\r
- }\r
- }\r
-\r
- return *result;\r
- }\r
-\r
- /*!\r
- @brief return a reference to the pointed to value\r
-\r
- @note This version does not throw if a value is not present, but tries\r
- to create nested values instead. For instance, calling this function\r
- with pointer `"/this/that"` on a null value is equivalent to calling\r
- `operator[]("this").operator[]("that")` on that value, effectively\r
- changing the null value to an object.\r
-\r
- @param[in] ptr a JSON value\r
-\r
- @return reference to the JSON value pointed to by the JSON pointer\r
-\r
- @complexity Linear in the length of the JSON pointer.\r
-\r
- @throw std::out_of_range if the JSON pointer can not be resolved\r
- @throw std::domain_error if an array index begins with '0'\r
- @throw std::invalid_argument if an array index was not a number\r
- */\r
- reference get_unchecked(pointer ptr) const\r
- {\r
- for (const auto& reference_token : reference_tokens)\r
- {\r
- // convert null values to arrays or objects before continuing\r
- if (ptr->m_type == value_t::null)\r
- {\r
- // check if reference token is a number\r
- const bool nums = std::all_of(reference_token.begin(),\r
- reference_token.end(),\r
- [](const char x)\r
- {\r
- return std::isdigit(x);\r
- });\r
-\r
- // change value to array for numbers or "-" or to object\r
- // otherwise\r
- if (nums or reference_token == "-")\r
- {\r
- *ptr = value_t::array;\r
- }\r
- else\r
- {\r
- *ptr = value_t::object;\r
- }\r
- }\r
-\r
- switch (ptr->m_type)\r
- {\r
- case value_t::object:\r
- {\r
- // use unchecked object access\r
- ptr = &ptr->operator[](reference_token);\r
- break;\r
- }\r
-\r
- case value_t::array:\r
- {\r
- // error condition (cf. RFC 6901, Sect. 4)\r
- if (reference_token.size() > 1 and reference_token[0] == '0')\r
- {\r
- JSON_THROW(std::domain_error("array index must not begin with '0'"));\r
- }\r
-\r
- if (reference_token == "-")\r
- {\r
- // explicitly treat "-" as index beyond the end\r
- ptr = &ptr->operator[](ptr->m_value.array->size());\r
- }\r
- else\r
- {\r
- // convert array index to number; unchecked access\r
- ptr = &ptr->operator[](static_cast<size_type>(std::stoi(reference_token)));\r
- }\r
- break;\r
- }\r
-\r
- default:\r
- {\r
- JSON_THROW(std::out_of_range("unresolved reference token '" + reference_token + "'"));\r
- }\r
- }\r
- }\r
-\r
- return *ptr;\r
- }\r
-\r
- reference get_checked(pointer ptr) const\r
- {\r
- for (const auto& reference_token : reference_tokens)\r
- {\r
- switch (ptr->m_type)\r
- {\r
- case value_t::object:\r
- {\r
- // note: at performs range check\r
- ptr = &ptr->at(reference_token);\r
- break;\r
- }\r
-\r
- case value_t::array:\r
- {\r
- if (reference_token == "-")\r
- {\r
- // "-" always fails the range check\r
- JSON_THROW(std::out_of_range("array index '-' (" +\r
- std::to_string(ptr->m_value.array->size()) +\r
- ") is out of range"));\r
- }\r
-\r
- // error condition (cf. RFC 6901, Sect. 4)\r
- if (reference_token.size() > 1 and reference_token[0] == '0')\r
- {\r
- JSON_THROW(std::domain_error("array index must not begin with '0'"));\r
- }\r
-\r
- // note: at performs range check\r
- ptr = &ptr->at(static_cast<size_type>(std::stoi(reference_token)));\r
- break;\r
- }\r
-\r
- default:\r
- {\r
- JSON_THROW(std::out_of_range("unresolved reference token '" + reference_token + "'"));\r
- }\r
- }\r
- }\r
-\r
- return *ptr;\r
- }\r
-\r
- /*!\r
- @brief return a const reference to the pointed to value\r
-\r
- @param[in] ptr a JSON value\r
-\r
- @return const reference to the JSON value pointed to by the JSON\r
- pointer\r
- */\r
- const_reference get_unchecked(const_pointer ptr) const\r
- {\r
- for (const auto& reference_token : reference_tokens)\r
- {\r
- switch (ptr->m_type)\r
- {\r
- case value_t::object:\r
- {\r
- // use unchecked object access\r
- ptr = &ptr->operator[](reference_token);\r
- break;\r
- }\r
-\r
- case value_t::array:\r
- {\r
- if (reference_token == "-")\r
- {\r
- // "-" cannot be used for const access\r
- JSON_THROW(std::out_of_range("array index '-' (" +\r
- std::to_string(ptr->m_value.array->size()) +\r
- ") is out of range"));\r
- }\r
-\r
- // error condition (cf. RFC 6901, Sect. 4)\r
- if (reference_token.size() > 1 and reference_token[0] == '0')\r
- {\r
- JSON_THROW(std::domain_error("array index must not begin with '0'"));\r
- }\r
-\r
- // use unchecked array access\r
- ptr = &ptr->operator[](static_cast<size_type>(std::stoi(reference_token)));\r
- break;\r
- }\r
-\r
- default:\r
- {\r
- JSON_THROW(std::out_of_range("unresolved reference token '" + reference_token + "'"));\r
- }\r
- }\r
- }\r
-\r
- return *ptr;\r
- }\r
-\r
- const_reference get_checked(const_pointer ptr) const\r
- {\r
- for (const auto& reference_token : reference_tokens)\r
- {\r
- switch (ptr->m_type)\r
- {\r
- case value_t::object:\r
- {\r
- // note: at performs range check\r
- ptr = &ptr->at(reference_token);\r
- break;\r
- }\r
-\r
- case value_t::array:\r
- {\r
- if (reference_token == "-")\r
- {\r
- // "-" always fails the range check\r
- JSON_THROW(std::out_of_range("array index '-' (" +\r
- std::to_string(ptr->m_value.array->size()) +\r
- ") is out of range"));\r
- }\r
-\r
- // error condition (cf. RFC 6901, Sect. 4)\r
- if (reference_token.size() > 1 and reference_token[0] == '0')\r
- {\r
- JSON_THROW(std::domain_error("array index must not begin with '0'"));\r
- }\r
-\r
- // note: at performs range check\r
- ptr = &ptr->at(static_cast<size_type>(std::stoi(reference_token)));\r
- break;\r
- }\r
-\r
- default:\r
- {\r
- JSON_THROW(std::out_of_range("unresolved reference token '" + reference_token + "'"));\r
- }\r
- }\r
- }\r
-\r
- return *ptr;\r
- }\r
-\r
- /// split the string input to reference tokens\r
- static std::vector<std::string> split(const std::string& reference_string)\r
- {\r
- std::vector<std::string> result;\r
-\r
- // special case: empty reference string -> no reference tokens\r
- if (reference_string.empty())\r
- {\r
- return result;\r
- }\r
-\r
- // check if nonempty reference string begins with slash\r
- if (reference_string[0] != '/')\r
- {\r
- JSON_THROW(std::domain_error("JSON pointer must be empty or begin with '/'"));\r
- }\r
-\r
- // extract the reference tokens:\r
- // - slash: position of the last read slash (or end of string)\r
- // - start: position after the previous slash\r
- for (\r
- // search for the first slash after the first character\r
- size_t slash = reference_string.find_first_of('/', 1),\r
- // set the beginning of the first reference token\r
- start = 1;\r
- // we can stop if start == string::npos+1 = 0\r
- start != 0;\r
- // set the beginning of the next reference token\r
- // (will eventually be 0 if slash == std::string::npos)\r
- start = slash + 1,\r
- // find next slash\r
- slash = reference_string.find_first_of('/', start))\r
- {\r
- // use the text between the beginning of the reference token\r
- // (start) and the last slash (slash).\r
- auto reference_token = reference_string.substr(start, slash - start);\r
-\r
- // check reference tokens are properly escaped\r
- for (size_t pos = reference_token.find_first_of('~');\r
- pos != std::string::npos;\r
- pos = reference_token.find_first_of('~', pos + 1))\r
- {\r
- assert(reference_token[pos] == '~');\r
-\r
- // ~ must be followed by 0 or 1\r
- if (pos == reference_token.size() - 1 or\r
- (reference_token[pos + 1] != '0' and\r
- reference_token[pos + 1] != '1'))\r
- {\r
- JSON_THROW(std::domain_error("escape error: '~' must be followed with '0' or '1'"));\r
- }\r
- }\r
-\r
- // finally, store the reference token\r
- unescape(reference_token);\r
- result.push_back(reference_token);\r
- }\r
-\r
- return result;\r
- }\r
-\r
- private:\r
- /*!\r
- @brief replace all occurrences of a substring by another string\r
-\r
- @param[in,out] s the string to manipulate; changed so that all\r
- occurrences of @a f are replaced with @a t\r
- @param[in] f the substring to replace with @a t\r
- @param[in] t the string to replace @a f\r
-\r
- @pre The search string @a f must not be empty.\r
-\r
- @since version 2.0.0\r
- */\r
- static void replace_substring(std::string& s,\r
- const std::string& f,\r
- const std::string& t)\r
- {\r
- assert(not f.empty());\r
-\r
- for (\r
- size_t pos = s.find(f); // find first occurrence of f\r
- pos != std::string::npos; // make sure f was found\r
- s.replace(pos, f.size(), t), // replace with t\r
- pos = s.find(f, pos + t.size()) // find next occurrence of f\r
- );\r
- }\r
-\r
- /// escape tilde and slash\r
- static std::string escape(std::string s)\r
- {\r
- // escape "~"" to "~0" and "/" to "~1"\r
- replace_substring(s, "~", "~0");\r
- replace_substring(s, "/", "~1");\r
- return s;\r
- }\r
-\r
- /// unescape tilde and slash\r
- static void unescape(std::string& s)\r
- {\r
- // first transform any occurrence of the sequence '~1' to '/'\r
- replace_substring(s, "~1", "/");\r
- // then transform any occurrence of the sequence '~0' to '~'\r
- replace_substring(s, "~0", "~");\r
- }\r
-\r
- /*!\r
- @param[in] reference_string the reference string to the current value\r
- @param[in] value the value to consider\r
- @param[in,out] result the result object to insert values to\r
-\r
- @note Empty objects or arrays are flattened to `null`.\r
- */\r
- static void flatten(const std::string& reference_string,\r
- const basic_json& value,\r
- basic_json& result)\r
- {\r
- switch (value.m_type)\r
- {\r
- case value_t::array:\r
- {\r
- if (value.m_value.array->empty())\r
- {\r
- // flatten empty array as null\r
- result[reference_string] = nullptr;\r
- }\r
- else\r
- {\r
- // iterate array and use index as reference string\r
- for (size_t i = 0; i < value.m_value.array->size(); ++i)\r
- {\r
- flatten(reference_string + "/" + std::to_string(i),\r
- value.m_value.array->operator[](i), result);\r
- }\r
- }\r
- break;\r
- }\r
-\r
- case value_t::object:\r
- {\r
- if (value.m_value.object->empty())\r
- {\r
- // flatten empty object as null\r
- result[reference_string] = nullptr;\r
- }\r
- else\r
- {\r
- // iterate object and use keys as reference string\r
- for (const auto& element : *value.m_value.object)\r
- {\r
- flatten(reference_string + "/" + escape(element.first),\r
- element.second, result);\r
- }\r
- }\r
- break;\r
- }\r
-\r
- default:\r
- {\r
- // add primitive value with its reference string\r
- result[reference_string] = value;\r
- break;\r
- }\r
- }\r
- }\r
-\r
- /*!\r
- @param[in] value flattened JSON\r
-\r
- @return unflattened JSON\r
- */\r
- static basic_json unflatten(const basic_json& value)\r
- {\r
- if (not value.is_object())\r
- {\r
- JSON_THROW(std::domain_error("only objects can be unflattened"));\r
- }\r
-\r
- basic_json result;\r
-\r
- // iterate the JSON object values\r
- for (const auto& element : *value.m_value.object)\r
- {\r
- if (not element.second.is_primitive())\r
- {\r
- JSON_THROW(std::domain_error("values in object must be primitive"));\r
- }\r
-\r
- // assign value to reference pointed to by JSON pointer; Note\r
- // that if the JSON pointer is "" (i.e., points to the whole\r
- // value), function get_and_create returns a reference to\r
- // result itself. An assignment will then create a primitive\r
- // value.\r
- json_pointer(element.first).get_and_create(result) = element.second;\r
- }\r
-\r
- return result;\r
- }\r
-\r
- private:\r
- friend bool operator==(json_pointer const& lhs,\r
- json_pointer const& rhs) noexcept\r
- {\r
- return lhs.reference_tokens == rhs.reference_tokens;\r
- }\r
-\r
- friend bool operator!=(json_pointer const& lhs,\r
- json_pointer const& rhs) noexcept\r
- {\r
- return !(lhs == rhs);\r
- }\r
-\r
- /// the reference tokens\r
- std::vector<std::string> reference_tokens {};\r
- };\r
-\r
- //////////////////////////\r
- // JSON Pointer support //\r
- //////////////////////////\r
-\r
- /// @name JSON Pointer functions\r
- /// @{\r
-\r
- /*!\r
- @brief access specified element via JSON Pointer\r
-\r
- Uses a JSON pointer to retrieve a reference to the respective JSON value.\r
- No bound checking is performed. Similar to @ref operator[](const typename\r
- object_t::key_type&), `null` values are created in arrays and objects if\r
- necessary.\r
-\r
- In particular:\r
- - If the JSON pointer points to an object key that does not exist, it\r
- is created an filled with a `null` value before a reference to it\r
- is returned.\r
- - If the JSON pointer points to an array index that does not exist, it\r
- is created an filled with a `null` value before a reference to it\r
- is returned. All indices between the current maximum and the given\r
- index are also filled with `null`.\r
- - The special value `-` is treated as a synonym for the index past the\r
- end.\r
-\r
- @param[in] ptr a JSON pointer\r
-\r
- @return reference to the element pointed to by @a ptr\r
-\r
- @complexity Constant.\r
-\r
- @throw std::out_of_range if the JSON pointer can not be resolved\r
- @throw std::domain_error if an array index begins with '0'\r
- @throw std::invalid_argument if an array index was not a number\r
-\r
- @liveexample{The behavior is shown in the example.,operatorjson_pointer}\r
-\r
- @since version 2.0.0\r
- */\r
- reference operator[](const json_pointer& ptr)\r
- {\r
- return ptr.get_unchecked(this);\r
- }\r
-\r
- /*!\r
- @brief access specified element via JSON Pointer\r
-\r
- Uses a JSON pointer to retrieve a reference to the respective JSON value.\r
- No bound checking is performed. The function does not change the JSON\r
- value; no `null` values are created. In particular, the the special value\r
- `-` yields an exception.\r
-\r
- @param[in] ptr JSON pointer to the desired element\r
-\r
- @return const reference to the element pointed to by @a ptr\r
-\r
- @complexity Constant.\r
-\r
- @throw std::out_of_range if the JSON pointer can not be resolved\r
- @throw std::domain_error if an array index begins with '0'\r
- @throw std::invalid_argument if an array index was not a number\r
-\r
- @liveexample{The behavior is shown in the example.,operatorjson_pointer_const}\r
-\r
- @since version 2.0.0\r
- */\r
- const_reference operator[](const json_pointer& ptr) const\r
- {\r
- return ptr.get_unchecked(this);\r
- }\r
-\r
- /*!\r
- @brief access specified element via JSON Pointer\r
-\r
- Returns a reference to the element at with specified JSON pointer @a ptr,\r
- with bounds checking.\r
-\r
- @param[in] ptr JSON pointer to the desired element\r
-\r
- @return reference to the element pointed to by @a ptr\r
-\r
- @complexity Constant.\r
-\r
- @throw std::out_of_range if the JSON pointer can not be resolved\r
- @throw std::domain_error if an array index begins with '0'\r
- @throw std::invalid_argument if an array index was not a number\r
-\r
- @liveexample{The behavior is shown in the example.,at_json_pointer}\r
-\r
- @since version 2.0.0\r
- */\r
- reference at(const json_pointer& ptr)\r
- {\r
- return ptr.get_checked(this);\r
- }\r
-\r
- /*!\r
- @brief access specified element via JSON Pointer\r
-\r
- Returns a const reference to the element at with specified JSON pointer @a\r
- ptr, with bounds checking.\r
-\r
- @param[in] ptr JSON pointer to the desired element\r
-\r
- @return reference to the element pointed to by @a ptr\r
-\r
- @complexity Constant.\r
-\r
- @throw std::out_of_range if the JSON pointer can not be resolved\r
- @throw std::domain_error if an array index begins with '0'\r
- @throw std::invalid_argument if an array index was not a number\r
-\r
- @liveexample{The behavior is shown in the example.,at_json_pointer_const}\r
-\r
- @since version 2.0.0\r
- */\r
- const_reference at(const json_pointer& ptr) const\r
- {\r
- return ptr.get_checked(this);\r
- }\r
-\r
- /*!\r
- @brief return flattened JSON value\r
-\r
- The function creates a JSON object whose keys are JSON pointers (see [RFC\r
- 6901](https://tools.ietf.org/html/rfc6901)) and whose values are all\r
- primitive. The original JSON value can be restored using the @ref\r
- unflatten() function.\r
-\r
- @return an object that maps JSON pointers to primitive values\r
-\r
- @note Empty objects and arrays are flattened to `null` and will not be\r
- reconstructed correctly by the @ref unflatten() function.\r
-\r
- @complexity Linear in the size the JSON value.\r
-\r
- @liveexample{The following code shows how a JSON object is flattened to an\r
- object whose keys consist of JSON pointers.,flatten}\r
-\r
- @sa @ref unflatten() for the reverse function\r
-\r
- @since version 2.0.0\r
- */\r
- basic_json flatten() const\r
- {\r
- basic_json result(value_t::object);\r
- json_pointer::flatten("", *this, result);\r
- return result;\r
- }\r
-\r
- /*!\r
- @brief unflatten a previously flattened JSON value\r
-\r
- The function restores the arbitrary nesting of a JSON value that has been\r
- flattened before using the @ref flatten() function. The JSON value must\r
- meet certain constraints:\r
- 1. The value must be an object.\r
- 2. The keys must be JSON pointers (see\r
- [RFC 6901](https://tools.ietf.org/html/rfc6901))\r
- 3. The mapped values must be primitive JSON types.\r
-\r
- @return the original JSON from a flattened version\r
-\r
- @note Empty objects and arrays are flattened by @ref flatten() to `null`\r
- values and can not unflattened to their original type. Apart from\r
- this example, for a JSON value `j`, the following is always true:\r
- `j == j.flatten().unflatten()`.\r
-\r
- @complexity Linear in the size the JSON value.\r
-\r
- @liveexample{The following code shows how a flattened JSON object is\r
- unflattened into the original nested JSON object.,unflatten}\r
-\r
- @sa @ref flatten() for the reverse function\r
-\r
- @since version 2.0.0\r
- */\r
- basic_json unflatten() const\r
- {\r
- return json_pointer::unflatten(*this);\r
- }\r
-\r
- /// @}\r
-\r
- //////////////////////////\r
- // JSON Patch functions //\r
- //////////////////////////\r
-\r
- /// @name JSON Patch functions\r
- /// @{\r
-\r
- /*!\r
- @brief applies a JSON patch\r
-\r
- [JSON Patch](http://jsonpatch.com) defines a JSON document structure for\r
- expressing a sequence of operations to apply to a JSON) document. With\r
- this function, a JSON Patch is applied to the current JSON value by\r
- executing all operations from the patch.\r
-\r
- @param[in] json_patch JSON patch document\r
- @return patched document\r
-\r
- @note The application of a patch is atomic: Either all operations succeed\r
- and the patched document is returned or an exception is thrown. In\r
- any case, the original value is not changed: the patch is applied\r
- to a copy of the value.\r
-\r
- @throw std::out_of_range if a JSON pointer inside the patch could not\r
- be resolved successfully in the current JSON value; example: `"key baz\r
- not found"`\r
- @throw invalid_argument if the JSON patch is malformed (e.g., mandatory\r
- attributes are missing); example: `"operation add must have member path"`\r
-\r
- @complexity Linear in the size of the JSON value and the length of the\r
- JSON patch. As usually only a fraction of the JSON value is affected by\r
- the patch, the complexity can usually be neglected.\r
-\r
- @liveexample{The following code shows how a JSON patch is applied to a\r
- value.,patch}\r
-\r
- @sa @ref diff -- create a JSON patch by comparing two JSON values\r
-\r
- @sa [RFC 6902 (JSON Patch)](https://tools.ietf.org/html/rfc6902)\r
- @sa [RFC 6901 (JSON Pointer)](https://tools.ietf.org/html/rfc6901)\r
-\r
- @since version 2.0.0\r
- */\r
- basic_json patch(const basic_json& json_patch) const\r
- {\r
- // make a working copy to apply the patch to\r
- basic_json result = *this;\r
-\r
- // the valid JSON Patch operations\r
- enum class patch_operations {add, remove, replace, move, copy, test, invalid};\r
-\r
- const auto get_op = [](const std::string op)\r
- {\r
- if (op == "add")\r
- {\r
- return patch_operations::add;\r
- }\r
- if (op == "remove")\r
- {\r
- return patch_operations::remove;\r
- }\r
- if (op == "replace")\r
- {\r
- return patch_operations::replace;\r
- }\r
- if (op == "move")\r
- {\r
- return patch_operations::move;\r
- }\r
- if (op == "copy")\r
- {\r
- return patch_operations::copy;\r
- }\r
- if (op == "test")\r
- {\r
- return patch_operations::test;\r
- }\r
-\r
- return patch_operations::invalid;\r
- };\r
-\r
- // wrapper for "add" operation; add value at ptr\r
- const auto operation_add = [&result](json_pointer & ptr, basic_json val)\r
- {\r
- // adding to the root of the target document means replacing it\r
- if (ptr.is_root())\r
- {\r
- result = val;\r
- }\r
- else\r
- {\r
- // make sure the top element of the pointer exists\r
- json_pointer top_pointer = ptr.top();\r
- if (top_pointer != ptr)\r
- {\r
- result.at(top_pointer);\r
- }\r
-\r
- // get reference to parent of JSON pointer ptr\r
- const auto last_path = ptr.pop_back();\r
- basic_json& parent = result[ptr];\r
-\r
- switch (parent.m_type)\r
- {\r
- case value_t::null:\r
- case value_t::object:\r
- {\r
- // use operator[] to add value\r
- parent[last_path] = val;\r
- break;\r
- }\r
-\r
- case value_t::array:\r
- {\r
- if (last_path == "-")\r
- {\r
- // special case: append to back\r
- parent.push_back(val);\r
- }\r
- else\r
- {\r
- const auto idx = std::stoi(last_path);\r
- if (static_cast<size_type>(idx) > parent.size())\r
- {\r
- // avoid undefined behavior\r
- JSON_THROW(std::out_of_range("array index " + std::to_string(idx) + " is out of range"));\r
- }\r
- else\r
- {\r
- // default case: insert add offset\r
- parent.insert(parent.begin() + static_cast<difference_type>(idx), val);\r
- }\r
- }\r
- break;\r
- }\r
-\r
- default:\r
- {\r
- // if there exists a parent it cannot be primitive\r
- assert(false); // LCOV_EXCL_LINE\r
- }\r
- }\r
- }\r
- };\r
-\r
- // wrapper for "remove" operation; remove value at ptr\r
- const auto operation_remove = [&result](json_pointer & ptr)\r
- {\r
- // get reference to parent of JSON pointer ptr\r
- const auto last_path = ptr.pop_back();\r
- basic_json& parent = result.at(ptr);\r
-\r
- // remove child\r
- if (parent.is_object())\r
- {\r
- // perform range check\r
- auto it = parent.find(last_path);\r
- if (it != parent.end())\r
- {\r
- parent.erase(it);\r
- }\r
- else\r
- {\r
- JSON_THROW(std::out_of_range("key '" + last_path + "' not found"));\r
- }\r
- }\r
- else if (parent.is_array())\r
- {\r
- // note erase performs range check\r
- parent.erase(static_cast<size_type>(std::stoi(last_path)));\r
- }\r
- };\r
-\r
- // type check\r
- if (not json_patch.is_array())\r
- {\r
- // a JSON patch must be an array of objects\r
- JSON_THROW(std::invalid_argument("JSON patch must be an array of objects"));\r
- }\r
-\r
- // iterate and apply the operations\r
- for (const auto& val : json_patch)\r
- {\r
- // wrapper to get a value for an operation\r
- const auto get_value = [&val](const std::string & op,\r
- const std::string & member,\r
- bool string_type) -> basic_json&\r
- {\r
- // find value\r
- auto it = val.m_value.object->find(member);\r
-\r
- // context-sensitive error message\r
- const auto error_msg = (op == "op") ? "operation" : "operation '" + op + "'";\r
-\r
- // check if desired value is present\r
- if (it == val.m_value.object->end())\r
- {\r
- JSON_THROW(std::invalid_argument(error_msg + " must have member '" + member + "'"));\r
- }\r
-\r
- // check if result is of type string\r
- if (string_type and not it->second.is_string())\r
- {\r
- JSON_THROW(std::invalid_argument(error_msg + " must have string member '" + member + "'"));\r
- }\r
-\r
- // no error: return value\r
- return it->second;\r
- };\r
-\r
- // type check\r
- if (not val.is_object())\r
- {\r
- JSON_THROW(std::invalid_argument("JSON patch must be an array of objects"));\r
- }\r
-\r
- // collect mandatory members\r
- const std::string op = get_value("op", "op", true);\r
- const std::string path = get_value(op, "path", true);\r
- json_pointer ptr(path);\r
-\r
- switch (get_op(op))\r
- {\r
- case patch_operations::add:\r
- {\r
- operation_add(ptr, get_value("add", "value", false));\r
- break;\r
- }\r
-\r
- case patch_operations::remove:\r
- {\r
- operation_remove(ptr);\r
- break;\r
- }\r
-\r
- case patch_operations::replace:\r
- {\r
- // the "path" location must exist - use at()\r
- result.at(ptr) = get_value("replace", "value", false);\r
- break;\r
- }\r
-\r
- case patch_operations::move:\r
- {\r
- const std::string from_path = get_value("move", "from", true);\r
- json_pointer from_ptr(from_path);\r
-\r
- // the "from" location must exist - use at()\r
- basic_json v = result.at(from_ptr);\r
-\r
- // The move operation is functionally identical to a\r
- // "remove" operation on the "from" location, followed\r
- // immediately by an "add" operation at the target\r
- // location with the value that was just removed.\r
- operation_remove(from_ptr);\r
- operation_add(ptr, v);\r
- break;\r
- }\r
-\r
- case patch_operations::copy:\r
- {\r
- const std::string from_path = get_value("copy", "from", true);;\r
- const json_pointer from_ptr(from_path);\r
-\r
- // the "from" location must exist - use at()\r
- result[ptr] = result.at(from_ptr);\r
- break;\r
- }\r
-\r
- case patch_operations::test:\r
- {\r
- bool success = false;\r
- JSON_TRY\r
- {\r
- // check if "value" matches the one at "path"\r
- // the "path" location must exist - use at()\r
- success = (result.at(ptr) == get_value("test", "value", false));\r
- }\r
- JSON_CATCH (std::out_of_range&)\r
- {\r
- // ignore out of range errors: success remains false\r
- }\r
-\r
- // throw an exception if test fails\r
- if (not success)\r
- {\r
- JSON_THROW(std::domain_error("unsuccessful: " + val.dump()));\r
- }\r
-\r
- break;\r
- }\r
-\r
- case patch_operations::invalid:\r
- {\r
- // op must be "add", "remove", "replace", "move", "copy", or\r
- // "test"\r
- JSON_THROW(std::invalid_argument("operation value '" + op + "' is invalid"));\r
- }\r
- }\r
- }\r
-\r
- return result;\r
- }\r
-\r
- /*!\r
- @brief creates a diff as a JSON patch\r
-\r
- Creates a [JSON Patch](http://jsonpatch.com) so that value @a source can\r
- be changed into the value @a target by calling @ref patch function.\r
-\r
- @invariant For two JSON values @a source and @a target, the following code\r
- yields always `true`:\r
- @code {.cpp}\r
- source.patch(diff(source, target)) == target;\r
- @endcode\r
-\r
- @note Currently, only `remove`, `add`, and `replace` operations are\r
- generated.\r
-\r
- @param[in] source JSON value to compare from\r
- @param[in] target JSON value to compare against\r
- @param[in] path helper value to create JSON pointers\r
-\r
- @return a JSON patch to convert the @a source to @a target\r
-\r
- @complexity Linear in the lengths of @a source and @a target.\r
-\r
- @liveexample{The following code shows how a JSON patch is created as a\r
- diff for two JSON values.,diff}\r
-\r
- @sa @ref patch -- apply a JSON patch\r
-\r
- @sa [RFC 6902 (JSON Patch)](https://tools.ietf.org/html/rfc6902)\r
-\r
- @since version 2.0.0\r
- */\r
- static basic_json diff(const basic_json& source,\r
- const basic_json& target,\r
- const std::string& path = "")\r
- {\r
- // the patch\r
- basic_json result(value_t::array);\r
-\r
- // if the values are the same, return empty patch\r
- if (source == target)\r
- {\r
- return result;\r
- }\r
-\r
- if (source.type() != target.type())\r
- {\r
- // different types: replace value\r
- result.push_back(\r
- {\r
- {"op", "replace"},\r
- {"path", path},\r
- {"value", target}\r
- });\r
- }\r
- else\r
- {\r
- switch (source.type())\r
- {\r
- case value_t::array:\r
- {\r
- // first pass: traverse common elements\r
- size_t i = 0;\r
- while (i < source.size() and i < target.size())\r
- {\r
- // recursive call to compare array values at index i\r
- auto temp_diff = diff(source[i], target[i], path + "/" + std::to_string(i));\r
- result.insert(result.end(), temp_diff.begin(), temp_diff.end());\r
- ++i;\r
- }\r
-\r
- // i now reached the end of at least one array\r
- // in a second pass, traverse the remaining elements\r
-\r
- // remove my remaining elements\r
- const auto end_index = static_cast<difference_type>(result.size());\r
- while (i < source.size())\r
- {\r
- // add operations in reverse order to avoid invalid\r
- // indices\r
- result.insert(result.begin() + end_index, object(\r
- {\r
- {"op", "remove"},\r
- {"path", path + "/" + std::to_string(i)}\r
- }));\r
- ++i;\r
- }\r
-\r
- // add other remaining elements\r
- while (i < target.size())\r
- {\r
- result.push_back(\r
- {\r
- {"op", "add"},\r
- {"path", path + "/" + std::to_string(i)},\r
- {"value", target[i]}\r
- });\r
- ++i;\r
- }\r
-\r
- break;\r
- }\r
-\r
- case value_t::object:\r
- {\r
- // first pass: traverse this object's elements\r
- for (auto it = source.begin(); it != source.end(); ++it)\r
- {\r
- // escape the key name to be used in a JSON patch\r
- const auto key = json_pointer::escape(it.key());\r
-\r
- if (target.find(it.key()) != target.end())\r
- {\r
- // recursive call to compare object values at key it\r
- auto temp_diff = diff(it.value(), target[it.key()], path + "/" + key);\r
- result.insert(result.end(), temp_diff.begin(), temp_diff.end());\r
- }\r
- else\r
- {\r
- // found a key that is not in o -> remove it\r
- result.push_back(object(\r
- {\r
- {"op", "remove"},\r
- {"path", path + "/" + key}\r
- }));\r
- }\r
- }\r
-\r
- // second pass: traverse other object's elements\r
- for (auto it = target.begin(); it != target.end(); ++it)\r
- {\r
- if (source.find(it.key()) == source.end())\r
- {\r
- // found a key that is not in this -> add it\r
- const auto key = json_pointer::escape(it.key());\r
- result.push_back(\r
- {\r
- {"op", "add"},\r
- {"path", path + "/" + key},\r
- {"value", it.value()}\r
- });\r
- }\r
- }\r
-\r
- break;\r
- }\r
-\r
- default:\r
- {\r
- // both primitive type: replace value\r
- result.push_back(\r
- {\r
- {"op", "replace"},\r
- {"path", path},\r
- {"value", target}\r
- });\r
- break;\r
- }\r
- }\r
- }\r
-\r
- return result;\r
- }\r
-\r
- /// @}\r
-};\r
-\r
-/////////////\r
-// presets //\r
-/////////////\r
-\r
-/*!\r
-@brief default JSON class\r
-\r
-This type is the default specialization of the @ref basic_json class which\r
-uses the standard template types.\r
-\r
-@since version 1.0.0\r
-*/\r
-using json = basic_json<>;\r
-} // namespace nlohmann\r
-\r
-\r
-///////////////////////\r
-// nonmember support //\r
-///////////////////////\r
-\r
-// specialization of std::swap, and std::hash\r
-namespace std\r
-{\r
-/*!\r
-@brief exchanges the values of two JSON objects\r
-\r
-@since version 1.0.0\r
-*/\r
-template<>\r
-inline void swap(nlohmann::json& j1,\r
- nlohmann::json& j2) noexcept(\r
- is_nothrow_move_constructible<nlohmann::json>::value and\r
- is_nothrow_move_assignable<nlohmann::json>::value\r
- )\r
-{\r
- j1.swap(j2);\r
-}\r
-\r
-/// hash value for JSON objects\r
-template<>\r
-struct hash<nlohmann::json>\r
-{\r
- /*!\r
- @brief return a hash value for a JSON object\r
-\r
- @since version 1.0.0\r
- */\r
- std::size_t operator()(const nlohmann::json& j) const\r
- {\r
- // a naive hashing via the string representation\r
- const auto& h = hash<nlohmann::json::string_t>();\r
- return h(j.dump());\r
- }\r
-};\r
-} // namespace std\r
-\r
-/*!\r
-@brief user-defined string literal for JSON values\r
-\r
-This operator implements a user-defined string literal for JSON objects. It\r
-can be used by adding `"_json"` to a string literal and returns a JSON object\r
-if no parse error occurred.\r
-\r
-@param[in] s a string representation of a JSON object\r
-@param[in] n the length of string @a s\r
-@return a JSON object\r
-\r
-@since version 1.0.0\r
-*/\r
-inline nlohmann::json operator "" _json(const char* s, std::size_t n)\r
-{\r
- return nlohmann::json::parse(s, s + n);\r
-}\r
-\r
-/*!\r
-@brief user-defined string literal for JSON pointer\r
-\r
-This operator implements a user-defined string literal for JSON Pointers. It\r
-can be used by adding `"_json_pointer"` to a string literal and returns a JSON pointer\r
-object if no parse error occurred.\r
-\r
-@param[in] s a string representation of a JSON Pointer\r
-@param[in] n the length of string @a s\r
-@return a JSON pointer object\r
-\r
-@since version 2.0.0\r
-*/\r
-inline nlohmann::json::json_pointer operator "" _json_pointer(const char* s, std::size_t n)\r
-{\r
- return nlohmann::json::json_pointer(std::string(s, n));\r
-}\r
-\r
-// clean up\r
-#undef JSON_CATCH\r
-#undef JSON_DEPRECATED\r
-#undef JSON_THROW\r
-#undef JSON_TRY\r
-\r
-#endif\r
+/*
+ __ _____ _____ _____
+ __| | __| | | | JSON for Modern C++
+| | |__ | | | | | | version 2.1.1
+|_____|_____|_____|_|___| https://github.com/nlohmann/json
+
+Licensed under the MIT License <http://opensource.org/licenses/MIT>.
+Copyright (c) 2013-2017 Niels Lohmann <http://nlohmann.me>.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all
+copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+SOFTWARE.
+*/
+
+#ifndef NLOHMANN_JSON_HPP
+#define NLOHMANN_JSON_HPP
+
+#include <algorithm> // all_of, copy, fill, find, for_each, none_of, remove, reverse, transform
+#include <array> // array
+#include <cassert> // assert
+#include <cctype> // isdigit
+#include <ciso646> // and, not, or
+#include <cmath> // isfinite, labs, ldexp, signbit
+#include <cstddef> // nullptr_t, ptrdiff_t, size_t
+#include <cstdint> // int64_t, uint64_t
+#include <cstdlib> // abort, strtod, strtof, strtold, strtoul, strtoll, strtoull
+#include <cstring> // strlen
+#include <forward_list> // forward_list
+#include <functional> // function, hash, less
+#include <initializer_list> // initializer_list
+#include <iomanip> // setw
+#include <iostream> // istream, ostream
+#include <iterator> // advance, begin, back_inserter, bidirectional_iterator_tag, distance, end, inserter, iterator, iterator_traits, next, random_access_iterator_tag, reverse_iterator
+#include <limits> // numeric_limits
+#include <locale> // locale
+#include <map> // map
+#include <memory> // addressof, allocator, allocator_traits, unique_ptr
+#include <numeric> // accumulate
+#include <sstream> // stringstream
+#include <stdexcept> // domain_error, invalid_argument, out_of_range
+#include <string> // getline, stoi, string, to_string
+#include <type_traits> // add_pointer, conditional, decay, enable_if, false_type, integral_constant, is_arithmetic, is_base_of, is_const, is_constructible, is_convertible, is_default_constructible, is_enum, is_floating_point, is_integral, is_nothrow_move_assignable, is_nothrow_move_constructible, is_pointer, is_reference, is_same, is_scalar, is_signed, remove_const, remove_cv, remove_pointer, remove_reference, true_type, underlying_type
+#include <utility> // declval, forward, make_pair, move, pair, swap
+#include <vector> // vector
+
+// allow for portable deprecation warnings
+#if defined(__clang__) || defined(__GNUC__) || defined(__GNUG__)
+ #define JSON_DEPRECATED __attribute__((deprecated))
+#elif defined(_MSC_VER)
+ #define JSON_DEPRECATED __declspec(deprecated)
+#else
+ #define JSON_DEPRECATED
+#endif
+
+// allow to disable exceptions
+#if not defined(JSON_NOEXCEPTION) || defined(__EXCEPTIONS)
+ #define JSON_THROW(exception) throw exception
+ #define JSON_TRY try
+ #define JSON_CATCH(exception) catch(exception)
+#else
+ #define JSON_THROW(exception) std::abort()
+ #define JSON_TRY if(true)
+ #define JSON_CATCH(exception) if(false)
+#endif
+
+/*!
+@brief namespace for Niels Lohmann
+@see https://github.com/nlohmann
+@since version 1.0.0
+*/
+namespace nlohmann
+{
+
+/*!
+@brief unnamed namespace with internal helper functions
+
+This namespace collects some functions that could not be defined inside the
+@ref basic_json class.
+
+@since version 2.1.0
+*/
+namespace detail
+{
+///////////////////////////
+// JSON type enumeration //
+///////////////////////////
+
+/*!
+@brief the JSON type enumeration
+
+This enumeration collects the different JSON types. It is internally used to
+distinguish the stored values, and the functions @ref basic_json::is_null(),
+@ref basic_json::is_object(), @ref basic_json::is_array(),
+@ref basic_json::is_string(), @ref basic_json::is_boolean(),
+@ref basic_json::is_number() (with @ref basic_json::is_number_integer(),
+@ref basic_json::is_number_unsigned(), and @ref basic_json::is_number_float()),
+@ref basic_json::is_discarded(), @ref basic_json::is_primitive(), and
+@ref basic_json::is_structured() rely on it.
+
+@note There are three enumeration entries (number_integer, number_unsigned, and
+number_float), because the library distinguishes these three types for numbers:
+@ref basic_json::number_unsigned_t is used for unsigned integers,
+@ref basic_json::number_integer_t is used for signed integers, and
+@ref basic_json::number_float_t is used for floating-point numbers or to
+approximate integers which do not fit in the limits of their respective type.
+
+@sa @ref basic_json::basic_json(const value_t value_type) -- create a JSON
+value with the default value for a given type
+
+@since version 1.0.0
+*/
+enum class value_t : uint8_t
+{
+ null, ///< null value
+ object, ///< object (unordered set of name/value pairs)
+ array, ///< array (ordered collection of values)
+ string, ///< string value
+ boolean, ///< boolean value
+ number_integer, ///< number value (signed integer)
+ number_unsigned, ///< number value (unsigned integer)
+ number_float, ///< number value (floating-point)
+ discarded ///< discarded by the the parser callback function
+};
+
+/*!
+@brief comparison operator for JSON types
+
+Returns an ordering that is similar to Python:
+- order: null < boolean < number < object < array < string
+- furthermore, each type is not smaller than itself
+
+@since version 1.0.0
+*/
+inline bool operator<(const value_t lhs, const value_t rhs) noexcept
+{
+ static constexpr std::array<uint8_t, 8> order = {{
+ 0, // null
+ 3, // object
+ 4, // array
+ 5, // string
+ 1, // boolean
+ 2, // integer
+ 2, // unsigned
+ 2, // float
+ }
+ };
+
+ // discarded values are not comparable
+ if (lhs == value_t::discarded or rhs == value_t::discarded)
+ {
+ return false;
+ }
+
+ return order[static_cast<std::size_t>(lhs)] <
+ order[static_cast<std::size_t>(rhs)];
+}
+
+
+/////////////
+// helpers //
+/////////////
+
+// alias templates to reduce boilerplate
+template<bool B, typename T = void>
+using enable_if_t = typename std::enable_if<B, T>::type;
+
+template<typename T>
+using uncvref_t = typename std::remove_cv<typename std::remove_reference<T>::type>::type;
+
+// taken from http://stackoverflow.com/a/26936864/266378
+template<typename T>
+using is_unscoped_enum =
+ std::integral_constant<bool, std::is_convertible<T, int>::value and
+ std::is_enum<T>::value>;
+
+/*
+Implementation of two C++17 constructs: conjunction, negation. This is needed
+to avoid evaluating all the traits in a condition
+
+For example: not std::is_same<void, T>::value and has_value_type<T>::value
+will not compile when T = void (on MSVC at least). Whereas
+conjunction<negation<std::is_same<void, T>>, has_value_type<T>>::value will
+stop evaluating if negation<...>::value == false
+
+Please note that those constructs must be used with caution, since symbols can
+become very long quickly (which can slow down compilation and cause MSVC
+internal compiler errors). Only use it when you have to (see example ahead).
+*/
+template<class...> struct conjunction : std::true_type {};
+template<class B1> struct conjunction<B1> : B1 {};
+template<class B1, class... Bn>
+struct conjunction<B1, Bn...> : std::conditional<bool(B1::value), conjunction<Bn...>, B1>::type {};
+
+template<class B> struct negation : std::integral_constant < bool, !B::value > {};
+
+// dispatch utility (taken from ranges-v3)
+template<unsigned N> struct priority_tag : priority_tag < N - 1 > {};
+template<> struct priority_tag<0> {};
+
+
+//////////////////
+// constructors //
+//////////////////
+
+template<value_t> struct external_constructor;
+
+template<>
+struct external_constructor<value_t::boolean>
+{
+ template<typename BasicJsonType>
+ static void construct(BasicJsonType& j, typename BasicJsonType::boolean_t b) noexcept
+ {
+ j.m_type = value_t::boolean;
+ j.m_value = b;
+ j.assert_invariant();
+ }
+};
+
+template<>
+struct external_constructor<value_t::string>
+{
+ template<typename BasicJsonType>
+ static void construct(BasicJsonType& j, const typename BasicJsonType::string_t& s)
+ {
+ j.m_type = value_t::string;
+ j.m_value = s;
+ j.assert_invariant();
+ }
+};
+
+template<>
+struct external_constructor<value_t::number_float>
+{
+ template<typename BasicJsonType>
+ static void construct(BasicJsonType& j, typename BasicJsonType::number_float_t val) noexcept
+ {
+ // replace infinity and NAN by null
+ if (not std::isfinite(val))
+ {
+ j = BasicJsonType{};
+ }
+ else
+ {
+ j.m_type = value_t::number_float;
+ j.m_value = val;
+ }
+ j.assert_invariant();
+ }
+};
+
+template<>
+struct external_constructor<value_t::number_unsigned>
+{
+ template<typename BasicJsonType>
+ static void construct(BasicJsonType& j, typename BasicJsonType::number_unsigned_t val) noexcept
+ {
+ j.m_type = value_t::number_unsigned;
+ j.m_value = val;
+ j.assert_invariant();
+ }
+};
+
+template<>
+struct external_constructor<value_t::number_integer>
+{
+ template<typename BasicJsonType>
+ static void construct(BasicJsonType& j, typename BasicJsonType::number_integer_t val) noexcept
+ {
+ j.m_type = value_t::number_integer;
+ j.m_value = val;
+ j.assert_invariant();
+ }
+};
+
+template<>
+struct external_constructor<value_t::array>
+{
+ template<typename BasicJsonType>
+ static void construct(BasicJsonType& j, const typename BasicJsonType::array_t& arr)
+ {
+ j.m_type = value_t::array;
+ j.m_value = arr;
+ j.assert_invariant();
+ }
+
+ template<typename BasicJsonType, typename CompatibleArrayType,
+ enable_if_t<not std::is_same<CompatibleArrayType,
+ typename BasicJsonType::array_t>::value,
+ int> = 0>
+ static void construct(BasicJsonType& j, const CompatibleArrayType& arr)
+ {
+ using std::begin;
+ using std::end;
+ j.m_type = value_t::array;
+ j.m_value.array = j.template create<typename BasicJsonType::array_t>(begin(arr), end(arr));
+ j.assert_invariant();
+ }
+};
+
+template<>
+struct external_constructor<value_t::object>
+{
+ template<typename BasicJsonType>
+ static void construct(BasicJsonType& j, const typename BasicJsonType::object_t& obj)
+ {
+ j.m_type = value_t::object;
+ j.m_value = obj;
+ j.assert_invariant();
+ }
+
+ template<typename BasicJsonType, typename CompatibleObjectType,
+ enable_if_t<not std::is_same<CompatibleObjectType,
+ typename BasicJsonType::object_t>::value,
+ int> = 0>
+ static void construct(BasicJsonType& j, const CompatibleObjectType& obj)
+ {
+ using std::begin;
+ using std::end;
+
+ j.m_type = value_t::object;
+ j.m_value.object = j.template create<typename BasicJsonType::object_t>(begin(obj), end(obj));
+ j.assert_invariant();
+ }
+};
+
+
+////////////////////////
+// has_/is_ functions //
+////////////////////////
+
+/*!
+@brief Helper to determine whether there's a key_type for T.
+
+This helper is used to tell associative containers apart from other containers
+such as sequence containers. For instance, `std::map` passes the test as it
+contains a `mapped_type`, whereas `std::vector` fails the test.
+
+@sa http://stackoverflow.com/a/7728728/266378
+@since version 1.0.0, overworked in version 2.0.6
+*/
+#define NLOHMANN_JSON_HAS_HELPER(type) \
+ template<typename T> struct has_##type { \
+ private: \
+ template<typename U, typename = typename U::type> \
+ static int detect(U &&); \
+ static void detect(...); \
+ public: \
+ static constexpr bool value = \
+ std::is_integral<decltype(detect(std::declval<T>()))>::value; \
+ }
+
+NLOHMANN_JSON_HAS_HELPER(mapped_type);
+NLOHMANN_JSON_HAS_HELPER(key_type);
+NLOHMANN_JSON_HAS_HELPER(value_type);
+NLOHMANN_JSON_HAS_HELPER(iterator);
+
+#undef NLOHMANN_JSON_HAS_HELPER
+
+
+template<bool B, class RealType, class CompatibleObjectType>
+struct is_compatible_object_type_impl : std::false_type {};
+
+template<class RealType, class CompatibleObjectType>
+struct is_compatible_object_type_impl<true, RealType, CompatibleObjectType>
+{
+ static constexpr auto value =
+ std::is_constructible<typename RealType::key_type,
+ typename CompatibleObjectType::key_type>::value and
+ std::is_constructible<typename RealType::mapped_type,
+ typename CompatibleObjectType::mapped_type>::value;
+};
+
+template<class BasicJsonType, class CompatibleObjectType>
+struct is_compatible_object_type
+{
+ static auto constexpr value = is_compatible_object_type_impl <
+ conjunction<negation<std::is_same<void, CompatibleObjectType>>,
+ has_mapped_type<CompatibleObjectType>,
+ has_key_type<CompatibleObjectType>>::value,
+ typename BasicJsonType::object_t, CompatibleObjectType >::value;
+};
+
+template<typename BasicJsonType, typename T>
+struct is_basic_json_nested_type
+{
+ static auto constexpr value = std::is_same<T, typename BasicJsonType::iterator>::value or
+ std::is_same<T, typename BasicJsonType::const_iterator>::value or
+ std::is_same<T, typename BasicJsonType::reverse_iterator>::value or
+ std::is_same<T, typename BasicJsonType::const_reverse_iterator>::value or
+ std::is_same<T, typename BasicJsonType::json_pointer>::value;
+};
+
+template<class BasicJsonType, class CompatibleArrayType>
+struct is_compatible_array_type
+{
+ static auto constexpr value =
+ conjunction<negation<std::is_same<void, CompatibleArrayType>>,
+ negation<is_compatible_object_type<
+ BasicJsonType, CompatibleArrayType>>,
+ negation<std::is_constructible<typename BasicJsonType::string_t,
+ CompatibleArrayType>>,
+ negation<is_basic_json_nested_type<BasicJsonType, CompatibleArrayType>>,
+ has_value_type<CompatibleArrayType>,
+ has_iterator<CompatibleArrayType>>::value;
+};
+
+template<bool, typename, typename>
+struct is_compatible_integer_type_impl : std::false_type {};
+
+template<typename RealIntegerType, typename CompatibleNumberIntegerType>
+struct is_compatible_integer_type_impl<true, RealIntegerType, CompatibleNumberIntegerType>
+{
+ // is there an assert somewhere on overflows?
+ using RealLimits = std::numeric_limits<RealIntegerType>;
+ using CompatibleLimits = std::numeric_limits<CompatibleNumberIntegerType>;
+
+ static constexpr auto value =
+ std::is_constructible<RealIntegerType,
+ CompatibleNumberIntegerType>::value and
+ CompatibleLimits::is_integer and
+ RealLimits::is_signed == CompatibleLimits::is_signed;
+};
+
+template<typename RealIntegerType, typename CompatibleNumberIntegerType>
+struct is_compatible_integer_type
+{
+ static constexpr auto value =
+ is_compatible_integer_type_impl <
+ std::is_integral<CompatibleNumberIntegerType>::value and
+ not std::is_same<bool, CompatibleNumberIntegerType>::value,
+ RealIntegerType, CompatibleNumberIntegerType > ::value;
+};
+
+
+// trait checking if JSONSerializer<T>::from_json(json const&, udt&) exists
+template<typename BasicJsonType, typename T>
+struct has_from_json
+{
+ private:
+ // also check the return type of from_json
+ template<typename U, typename = enable_if_t<std::is_same<void, decltype(uncvref_t<U>::from_json(
+ std::declval<BasicJsonType>(), std::declval<T&>()))>::value>>
+ static int detect(U&&);
+ static void detect(...);
+
+ public:
+ static constexpr bool value = std::is_integral<decltype(
+ detect(std::declval<typename BasicJsonType::template json_serializer<T, void > >()))>::value;
+};
+
+// This trait checks if JSONSerializer<T>::from_json(json const&) exists
+// this overload is used for non-default-constructible user-defined-types
+template<typename BasicJsonType, typename T>
+struct has_non_default_from_json
+{
+ private:
+ template <
+ typename U,
+ typename = enable_if_t<std::is_same<
+ T, decltype(uncvref_t<U>::from_json(std::declval<BasicJsonType>()))>::value >>
+ static int detect(U&&);
+ static void detect(...);
+
+ public:
+ static constexpr bool value = std::is_integral<decltype(detect(
+ std::declval<typename BasicJsonType::template json_serializer<T, void> >()))>::value;
+};
+
+// This trait checks if BasicJsonType::json_serializer<T>::to_json exists
+template<typename BasicJsonType, typename T>
+struct has_to_json
+{
+ private:
+ template<typename U, typename = decltype(uncvref_t<U>::to_json(
+ std::declval<BasicJsonType&>(), std::declval<T>()))>
+ static int detect(U&&);
+ static void detect(...);
+
+ public:
+ static constexpr bool value = std::is_integral<decltype(detect(
+ std::declval<typename BasicJsonType::template json_serializer<T, void> >()))>::value;
+};
+
+
+/////////////
+// to_json //
+/////////////
+
+template<typename BasicJsonType, typename T, enable_if_t<
+ std::is_same<T, typename BasicJsonType::boolean_t>::value, int> = 0>
+void to_json(BasicJsonType& j, T b) noexcept
+{
+ external_constructor<value_t::boolean>::construct(j, b);
+}
+
+template<typename BasicJsonType, typename CompatibleString,
+ enable_if_t<std::is_constructible<typename BasicJsonType::string_t,
+ CompatibleString>::value, int> = 0>
+void to_json(BasicJsonType& j, const CompatibleString& s)
+{
+ external_constructor<value_t::string>::construct(j, s);
+}
+
+template<typename BasicJsonType, typename FloatType,
+ enable_if_t<std::is_floating_point<FloatType>::value, int> = 0>
+void to_json(BasicJsonType& j, FloatType val) noexcept
+{
+ external_constructor<value_t::number_float>::construct(j, static_cast<typename BasicJsonType::number_float_t>(val));
+}
+
+template <
+ typename BasicJsonType, typename CompatibleNumberUnsignedType,
+ enable_if_t<is_compatible_integer_type<typename BasicJsonType::number_unsigned_t,
+ CompatibleNumberUnsignedType>::value, int> = 0 >
+void to_json(BasicJsonType& j, CompatibleNumberUnsignedType val) noexcept
+{
+ external_constructor<value_t::number_unsigned>::construct(j, static_cast<typename BasicJsonType::number_unsigned_t>(val));
+}
+
+template <
+ typename BasicJsonType, typename CompatibleNumberIntegerType,
+ enable_if_t<is_compatible_integer_type<typename BasicJsonType::number_integer_t,
+ CompatibleNumberIntegerType>::value, int> = 0 >
+void to_json(BasicJsonType& j, CompatibleNumberIntegerType val) noexcept
+{
+ external_constructor<value_t::number_integer>::construct(j, static_cast<typename BasicJsonType::number_integer_t>(val));
+}
+
+template<typename BasicJsonType, typename UnscopedEnumType,
+ enable_if_t<is_unscoped_enum<UnscopedEnumType>::value, int> = 0>
+void to_json(BasicJsonType& j, UnscopedEnumType e) noexcept
+{
+ external_constructor<value_t::number_integer>::construct(j, e);
+}
+
+template <
+ typename BasicJsonType, typename CompatibleArrayType,
+ enable_if_t <
+ is_compatible_array_type<BasicJsonType, CompatibleArrayType>::value or
+ std::is_same<typename BasicJsonType::array_t, CompatibleArrayType>::value,
+ int > = 0 >
+void to_json(BasicJsonType& j, const CompatibleArrayType& arr)
+{
+ external_constructor<value_t::array>::construct(j, arr);
+}
+
+template <
+ typename BasicJsonType, typename CompatibleObjectType,
+ enable_if_t<is_compatible_object_type<BasicJsonType, CompatibleObjectType>::value,
+ int> = 0 >
+void to_json(BasicJsonType& j, const CompatibleObjectType& arr)
+{
+ external_constructor<value_t::object>::construct(j, arr);
+}
+
+
+///////////////
+// from_json //
+///////////////
+
+// overloads for basic_json template parameters
+template<typename BasicJsonType, typename ArithmeticType,
+ enable_if_t<std::is_arithmetic<ArithmeticType>::value and
+ not std::is_same<ArithmeticType,
+ typename BasicJsonType::boolean_t>::value,
+ int> = 0>
+void get_arithmetic_value(const BasicJsonType& j, ArithmeticType& val)
+{
+ switch (static_cast<value_t>(j))
+ {
+ case value_t::number_unsigned:
+ {
+ val = static_cast<ArithmeticType>(
+ *j.template get_ptr<const typename BasicJsonType::number_unsigned_t*>());
+ break;
+ }
+ case value_t::number_integer:
+ {
+ val = static_cast<ArithmeticType>(
+ *j.template get_ptr<const typename BasicJsonType::number_integer_t*>());
+ break;
+ }
+ case value_t::number_float:
+ {
+ val = static_cast<ArithmeticType>(
+ *j.template get_ptr<const typename BasicJsonType::number_float_t*>());
+ break;
+ }
+ default:
+ {
+ JSON_THROW(
+ std::domain_error("type must be number, but is " + j.type_name()));
+ }
+ }
+}
+
+template<typename BasicJsonType>
+void from_json(const BasicJsonType& j, typename BasicJsonType::boolean_t& b)
+{
+ if (not j.is_boolean())
+ {
+ JSON_THROW(std::domain_error("type must be boolean, but is " + j.type_name()));
+ }
+ b = *j.template get_ptr<const typename BasicJsonType::boolean_t*>();
+}
+
+template<typename BasicJsonType>
+void from_json(const BasicJsonType& j, typename BasicJsonType::string_t& s)
+{
+ if (not j.is_string())
+ {
+ JSON_THROW(std::domain_error("type must be string, but is " + j.type_name()));
+ }
+ s = *j.template get_ptr<const typename BasicJsonType::string_t*>();
+}
+
+template<typename BasicJsonType>
+void from_json(const BasicJsonType& j, typename BasicJsonType::number_float_t& val)
+{
+ get_arithmetic_value(j, val);
+}
+
+template<typename BasicJsonType>
+void from_json(const BasicJsonType& j, typename BasicJsonType::number_unsigned_t& val)
+{
+ get_arithmetic_value(j, val);
+}
+
+template<typename BasicJsonType>
+void from_json(const BasicJsonType& j, typename BasicJsonType::number_integer_t& val)
+{
+ get_arithmetic_value(j, val);
+}
+
+template<typename BasicJsonType, typename UnscopedEnumType,
+ enable_if_t<is_unscoped_enum<UnscopedEnumType>::value, int> = 0>
+void from_json(const BasicJsonType& j, UnscopedEnumType& e)
+{
+ typename std::underlying_type<UnscopedEnumType>::type val;
+ get_arithmetic_value(j, val);
+ e = static_cast<UnscopedEnumType>(val);
+}
+
+template<typename BasicJsonType>
+void from_json(const BasicJsonType& j, typename BasicJsonType::array_t& arr)
+{
+ if (not j.is_array())
+ {
+ JSON_THROW(std::domain_error("type must be array, but is " + j.type_name()));
+ }
+ arr = *j.template get_ptr<const typename BasicJsonType::array_t*>();
+}
+
+// forward_list doesn't have an insert method
+template<typename BasicJsonType, typename T, typename Allocator>
+void from_json(const BasicJsonType& j, std::forward_list<T, Allocator>& l)
+{
+ // do not perform the check when user wants to retrieve jsons
+ // (except when it's null.. ?)
+ if (j.is_null())
+ {
+ JSON_THROW(std::domain_error("type must be array, but is " + j.type_name()));
+ }
+ if (not std::is_same<T, BasicJsonType>::value)
+ {
+ if (not j.is_array())
+ {
+ JSON_THROW(std::domain_error("type must be array, but is " + j.type_name()));
+ }
+ }
+ for (auto it = j.rbegin(), end = j.rend(); it != end; ++it)
+ {
+ l.push_front(it->template get<T>());
+ }
+}
+
+template<typename BasicJsonType, typename CompatibleArrayType>
+void from_json_array_impl(const BasicJsonType& j, CompatibleArrayType& arr, priority_tag<0>)
+{
+ using std::begin;
+ using std::end;
+
+ std::transform(j.begin(), j.end(),
+ std::inserter(arr, end(arr)), [](const BasicJsonType & i)
+ {
+ // get<BasicJsonType>() returns *this, this won't call a from_json
+ // method when value_type is BasicJsonType
+ return i.template get<typename CompatibleArrayType::value_type>();
+ });
+}
+
+template<typename BasicJsonType, typename CompatibleArrayType>
+auto from_json_array_impl(const BasicJsonType& j, CompatibleArrayType& arr, priority_tag<1>)
+-> decltype(
+ arr.reserve(std::declval<typename CompatibleArrayType::size_type>()),
+ void())
+{
+ using std::begin;
+ using std::end;
+
+ arr.reserve(j.size());
+ std::transform(
+ j.begin(), j.end(), std::inserter(arr, end(arr)), [](const BasicJsonType & i)
+ {
+ // get<BasicJsonType>() returns *this, this won't call a from_json
+ // method when value_type is BasicJsonType
+ return i.template get<typename CompatibleArrayType::value_type>();
+ });
+}
+
+template<typename BasicJsonType, typename CompatibleArrayType,
+ enable_if_t<is_compatible_array_type<BasicJsonType, CompatibleArrayType>::value and
+ not std::is_same<typename BasicJsonType::array_t, CompatibleArrayType>::value, int> = 0>
+void from_json(const BasicJsonType& j, CompatibleArrayType& arr)
+{
+ if (j.is_null())
+ {
+ JSON_THROW(std::domain_error("type must be array, but is " + j.type_name()));
+ }
+
+ // when T == BasicJsonType, do not check if value_t is correct
+ if (not std::is_same<typename CompatibleArrayType::value_type, BasicJsonType>::value)
+ {
+ if (not j.is_array())
+ {
+ JSON_THROW(std::domain_error("type must be array, but is " + j.type_name()));
+ }
+ }
+ from_json_array_impl(j, arr, priority_tag<1> {});
+}
+
+template<typename BasicJsonType, typename CompatibleObjectType,
+ enable_if_t<is_compatible_object_type<BasicJsonType, CompatibleObjectType>::value, int> = 0>
+void from_json(const BasicJsonType& j, CompatibleObjectType& obj)
+{
+ if (not j.is_object())
+ {
+ JSON_THROW(std::domain_error("type must be object, but is " + j.type_name()));
+ }
+
+ auto inner_object = j.template get_ptr<const typename BasicJsonType::object_t*>();
+ using std::begin;
+ using std::end;
+ // we could avoid the assignment, but this might require a for loop, which
+ // might be less efficient than the container constructor for some
+ // containers (would it?)
+ obj = CompatibleObjectType(begin(*inner_object), end(*inner_object));
+}
+
+// overload for arithmetic types, not chosen for basic_json template arguments
+// (BooleanType, etc..); note: Is it really necessary to provide explicit
+// overloads for boolean_t etc. in case of a custom BooleanType which is not
+// an arithmetic type?
+template<typename BasicJsonType, typename ArithmeticType,
+ enable_if_t <
+ std::is_arithmetic<ArithmeticType>::value and
+ not std::is_same<ArithmeticType, typename BasicJsonType::number_unsigned_t>::value and
+ not std::is_same<ArithmeticType, typename BasicJsonType::number_integer_t>::value and
+ not std::is_same<ArithmeticType, typename BasicJsonType::number_float_t>::value and
+ not std::is_same<ArithmeticType, typename BasicJsonType::boolean_t>::value,
+ int> = 0>
+void from_json(const BasicJsonType& j, ArithmeticType& val)
+{
+ switch (static_cast<value_t>(j))
+ {
+ case value_t::number_unsigned:
+ {
+ val = static_cast<ArithmeticType>(*j.template get_ptr<const typename BasicJsonType::number_unsigned_t*>());
+ break;
+ }
+ case value_t::number_integer:
+ {
+ val = static_cast<ArithmeticType>(*j.template get_ptr<const typename BasicJsonType::number_integer_t*>());
+ break;
+ }
+ case value_t::number_float:
+ {
+ val = static_cast<ArithmeticType>(*j.template get_ptr<const typename BasicJsonType::number_float_t*>());
+ break;
+ }
+ case value_t::boolean:
+ {
+ val = static_cast<ArithmeticType>(*j.template get_ptr<const typename BasicJsonType::boolean_t*>());
+ break;
+ }
+ default:
+ {
+ JSON_THROW(std::domain_error("type must be number, but is " + j.type_name()));
+ }
+ }
+}
+
+struct to_json_fn
+{
+ private:
+ template<typename BasicJsonType, typename T>
+ auto call(BasicJsonType& j, T&& val, priority_tag<1>) const noexcept(noexcept(to_json(j, std::forward<T>(val))))
+ -> decltype(to_json(j, std::forward<T>(val)), void())
+ {
+ return to_json(j, std::forward<T>(val));
+ }
+
+ template<typename BasicJsonType, typename T>
+ void call(BasicJsonType&, T&&, priority_tag<0>) const noexcept
+ {
+ static_assert(sizeof(BasicJsonType) == 0,
+ "could not find to_json() method in T's namespace");
+ }
+
+ public:
+ template<typename BasicJsonType, typename T>
+ void operator()(BasicJsonType& j, T&& val) const
+ noexcept(noexcept(std::declval<to_json_fn>().call(j, std::forward<T>(val), priority_tag<1> {})))
+ {
+ return call(j, std::forward<T>(val), priority_tag<1> {});
+ }
+};
+
+struct from_json_fn
+{
+ private:
+ template<typename BasicJsonType, typename T>
+ auto call(const BasicJsonType& j, T& val, priority_tag<1>) const
+ noexcept(noexcept(from_json(j, val)))
+ -> decltype(from_json(j, val), void())
+ {
+ return from_json(j, val);
+ }
+
+ template<typename BasicJsonType, typename T>
+ void call(const BasicJsonType&, T&, priority_tag<0>) const noexcept
+ {
+ static_assert(sizeof(BasicJsonType) == 0,
+ "could not find from_json() method in T's namespace");
+ }
+
+ public:
+ template<typename BasicJsonType, typename T>
+ void operator()(const BasicJsonType& j, T& val) const
+ noexcept(noexcept(std::declval<from_json_fn>().call(j, val, priority_tag<1> {})))
+ {
+ return call(j, val, priority_tag<1> {});
+ }
+};
+
+// taken from ranges-v3
+template<typename T>
+struct static_const
+{
+ static constexpr T value{};
+};
+
+template<typename T>
+constexpr T static_const<T>::value;
+} // namespace detail
+
+
+/// namespace to hold default `to_json` / `from_json` functions
+namespace
+{
+constexpr const auto& to_json = detail::static_const<detail::to_json_fn>::value;
+constexpr const auto& from_json = detail::static_const<detail::from_json_fn>::value;
+}
+
+
+/*!
+@brief default JSONSerializer template argument
+
+This serializer ignores the template arguments and uses ADL
+([argument-dependent lookup](http://en.cppreference.com/w/cpp/language/adl))
+for serialization.
+*/
+template<typename = void, typename = void>
+struct adl_serializer
+{
+ /*!
+ @brief convert a JSON value to any value type
+
+ This function is usually called by the `get()` function of the
+ @ref basic_json class (either explicit or via conversion operators).
+
+ @param[in] j JSON value to read from
+ @param[in,out] val value to write to
+ */
+ template<typename BasicJsonType, typename ValueType>
+ static void from_json(BasicJsonType&& j, ValueType& val) noexcept(
+ noexcept(::nlohmann::from_json(std::forward<BasicJsonType>(j), val)))
+ {
+ ::nlohmann::from_json(std::forward<BasicJsonType>(j), val);
+ }
+
+ /*!
+ @brief convert any value type to a JSON value
+
+ This function is usually called by the constructors of the @ref basic_json
+ class.
+
+ @param[in,out] j JSON value to write to
+ @param[in] val value to read from
+ */
+ template<typename BasicJsonType, typename ValueType>
+ static void to_json(BasicJsonType& j, ValueType&& val) noexcept(
+ noexcept(::nlohmann::to_json(j, std::forward<ValueType>(val))))
+ {
+ ::nlohmann::to_json(j, std::forward<ValueType>(val));
+ }
+};
+
+
+/*!
+@brief a class to store JSON values
+
+@tparam ObjectType type for JSON objects (`std::map` by default; will be used
+in @ref object_t)
+@tparam ArrayType type for JSON arrays (`std::vector` by default; will be used
+in @ref array_t)
+@tparam StringType type for JSON strings and object keys (`std::string` by
+default; will be used in @ref string_t)
+@tparam BooleanType type for JSON booleans (`bool` by default; will be used
+in @ref boolean_t)
+@tparam NumberIntegerType type for JSON integer numbers (`int64_t` by
+default; will be used in @ref number_integer_t)
+@tparam NumberUnsignedType type for JSON unsigned integer numbers (@c
+`uint64_t` by default; will be used in @ref number_unsigned_t)
+@tparam NumberFloatType type for JSON floating-point numbers (`double` by
+default; will be used in @ref number_float_t)
+@tparam AllocatorType type of the allocator to use (`std::allocator` by
+default)
+@tparam JSONSerializer the serializer to resolve internal calls to `to_json()`
+and `from_json()` (@ref adl_serializer by default)
+
+@requirement The class satisfies the following concept requirements:
+- Basic
+ - [DefaultConstructible](http://en.cppreference.com/w/cpp/concept/DefaultConstructible):
+ JSON values can be default constructed. The result will be a JSON null
+ value.
+ - [MoveConstructible](http://en.cppreference.com/w/cpp/concept/MoveConstructible):
+ A JSON value can be constructed from an rvalue argument.
+ - [CopyConstructible](http://en.cppreference.com/w/cpp/concept/CopyConstructible):
+ A JSON value can be copy-constructed from an lvalue expression.
+ - [MoveAssignable](http://en.cppreference.com/w/cpp/concept/MoveAssignable):
+ A JSON value van be assigned from an rvalue argument.
+ - [CopyAssignable](http://en.cppreference.com/w/cpp/concept/CopyAssignable):
+ A JSON value can be copy-assigned from an lvalue expression.
+ - [Destructible](http://en.cppreference.com/w/cpp/concept/Destructible):
+ JSON values can be destructed.
+- Layout
+ - [StandardLayoutType](http://en.cppreference.com/w/cpp/concept/StandardLayoutType):
+ JSON values have
+ [standard layout](http://en.cppreference.com/w/cpp/language/data_members#Standard_layout):
+ All non-static data members are private and standard layout types, the
+ class has no virtual functions or (virtual) base classes.
+- Library-wide
+ - [EqualityComparable](http://en.cppreference.com/w/cpp/concept/EqualityComparable):
+ JSON values can be compared with `==`, see @ref
+ operator==(const_reference,const_reference).
+ - [LessThanComparable](http://en.cppreference.com/w/cpp/concept/LessThanComparable):
+ JSON values can be compared with `<`, see @ref
+ operator<(const_reference,const_reference).
+ - [Swappable](http://en.cppreference.com/w/cpp/concept/Swappable):
+ Any JSON lvalue or rvalue of can be swapped with any lvalue or rvalue of
+ other compatible types, using unqualified function call @ref swap().
+ - [NullablePointer](http://en.cppreference.com/w/cpp/concept/NullablePointer):
+ JSON values can be compared against `std::nullptr_t` objects which are used
+ to model the `null` value.
+- Container
+ - [Container](http://en.cppreference.com/w/cpp/concept/Container):
+ JSON values can be used like STL containers and provide iterator access.
+ - [ReversibleContainer](http://en.cppreference.com/w/cpp/concept/ReversibleContainer);
+ JSON values can be used like STL containers and provide reverse iterator
+ access.
+
+@invariant The member variables @a m_value and @a m_type have the following
+relationship:
+- If `m_type == value_t::object`, then `m_value.object != nullptr`.
+- If `m_type == value_t::array`, then `m_value.array != nullptr`.
+- If `m_type == value_t::string`, then `m_value.string != nullptr`.
+The invariants are checked by member function assert_invariant().
+
+@internal
+@note ObjectType trick from http://stackoverflow.com/a/9860911
+@endinternal
+
+@see [RFC 7159: The JavaScript Object Notation (JSON) Data Interchange
+Format](http://rfc7159.net/rfc7159)
+
+@since version 1.0.0
+
+@nosubgrouping
+*/
+template <
+ template<typename U, typename V, typename... Args> class ObjectType = std::map,
+ template<typename U, typename... Args> class ArrayType = std::vector,
+ class StringType = std::string,
+ class BooleanType = bool,
+ class NumberIntegerType = std::int64_t,
+ class NumberUnsignedType = std::uint64_t,
+ class NumberFloatType = double,
+ template<typename U> class AllocatorType = std::allocator,
+ template<typename T, typename SFINAE = void> class JSONSerializer = adl_serializer
+ >
+class basic_json
+{
+ private:
+ template<detail::value_t> friend struct detail::external_constructor;
+ /// workaround type for MSVC
+ using basic_json_t = basic_json<ObjectType, ArrayType, StringType,
+ BooleanType, NumberIntegerType, NumberUnsignedType, NumberFloatType,
+ AllocatorType, JSONSerializer>;
+
+ public:
+ using value_t = detail::value_t;
+ // forward declarations
+ template<typename U> class iter_impl;
+ template<typename Base> class json_reverse_iterator;
+ class json_pointer;
+ template<typename T, typename SFINAE>
+ using json_serializer = JSONSerializer<T, SFINAE>;
+
+ /////////////////////
+ // container types //
+ /////////////////////
+
+ /// @name container types
+ /// The canonic container types to use @ref basic_json like any other STL
+ /// container.
+ /// @{
+
+ /// the type of elements in a basic_json container
+ using value_type = basic_json;
+
+ /// the type of an element reference
+ using reference = value_type&;
+ /// the type of an element const reference
+ using const_reference = const value_type&;
+
+ /// a type to represent differences between iterators
+ using difference_type = std::ptrdiff_t;
+ /// a type to represent container sizes
+ using size_type = std::size_t;
+
+ /// the allocator type
+ using allocator_type = AllocatorType<basic_json>;
+
+ /// the type of an element pointer
+ using pointer = typename std::allocator_traits<allocator_type>::pointer;
+ /// the type of an element const pointer
+ using const_pointer = typename std::allocator_traits<allocator_type>::const_pointer;
+
+ /// an iterator for a basic_json container
+ using iterator = iter_impl<basic_json>;
+ /// a const iterator for a basic_json container
+ using const_iterator = iter_impl<const basic_json>;
+ /// a reverse iterator for a basic_json container
+ using reverse_iterator = json_reverse_iterator<typename basic_json::iterator>;
+ /// a const reverse iterator for a basic_json container
+ using const_reverse_iterator = json_reverse_iterator<typename basic_json::const_iterator>;
+
+ /// @}
+
+
+ /*!
+ @brief returns the allocator associated with the container
+ */
+ static allocator_type get_allocator()
+ {
+ return allocator_type();
+ }
+
+ /*!
+ @brief returns version information on the library
+
+ This function returns a JSON object with information about the library,
+ including the version number and information on the platform and compiler.
+
+ @return JSON object holding version information
+ key | description
+ ----------- | ---------------
+ `compiler` | Information on the used compiler. It is an object with the following keys: `c++` (the used C++ standard), `family` (the compiler family; possible values are `clang`, `icc`, `gcc`, `ilecpp`, `msvc`, `pgcpp`, `sunpro`, and `unknown`), and `version` (the compiler version).
+ `copyright` | The copyright line for the library as string.
+ `name` | The name of the library as string.
+ `platform` | The used platform as string. Possible values are `win32`, `linux`, `apple`, `unix`, and `unknown`.
+ `url` | The URL of the project as string.
+ `version` | The version of the library. It is an object with the following keys: `major`, `minor`, and `patch` as defined by [Semantic Versioning](http://semver.org), and `string` (the version string).
+
+ @liveexample{The following code shows an example output of the `meta()`
+ function.,meta}
+
+ @complexity Constant.
+
+ @since 2.1.0
+ */
+ static basic_json meta()
+ {
+ basic_json result;
+
+ result["copyright"] = "(C) 2013-2017 Niels Lohmann";
+ result["name"] = "JSON for Modern C++";
+ result["url"] = "https://github.com/nlohmann/json";
+ result["version"] =
+ {
+ {"string", "2.1.1"},
+ {"major", 2},
+ {"minor", 1},
+ {"patch", 1}
+ };
+
+#ifdef _WIN32
+ result["platform"] = "win32";
+#elif defined __linux__
+ result["platform"] = "linux";
+#elif defined __APPLE__
+ result["platform"] = "apple";
+#elif defined __unix__
+ result["platform"] = "unix";
+#else
+ result["platform"] = "unknown";
+#endif
+
+#if defined(__clang__)
+ result["compiler"] = {{"family", "clang"}, {"version", __clang_version__}};
+#elif defined(__ICC) || defined(__INTEL_COMPILER)
+ result["compiler"] = {{"family", "icc"}, {"version", __INTEL_COMPILER}};
+#elif defined(__GNUC__) || defined(__GNUG__)
+ result["compiler"] = {{"family", "gcc"}, {"version", std::to_string(__GNUC__) + "." + std::to_string(__GNUC_MINOR__) + "." + std::to_string(__GNUC_PATCHLEVEL__)}};
+#elif defined(__HP_cc) || defined(__HP_aCC)
+ result["compiler"] = "hp"
+#elif defined(__IBMCPP__)
+ result["compiler"] = {{"family", "ilecpp"}, {"version", __IBMCPP__}};
+#elif defined(_MSC_VER)
+ result["compiler"] = {{"family", "msvc"}, {"version", _MSC_VER}};
+#elif defined(__PGI)
+ result["compiler"] = {{"family", "pgcpp"}, {"version", __PGI}};
+#elif defined(__SUNPRO_CC)
+ result["compiler"] = {{"family", "sunpro"}, {"version", __SUNPRO_CC}};
+#else
+ result["compiler"] = {{"family", "unknown"}, {"version", "unknown"}};
+#endif
+
+#ifdef __cplusplus
+ result["compiler"]["c++"] = std::to_string(__cplusplus);
+#else
+ result["compiler"]["c++"] = "unknown";
+#endif
+ return result;
+ }
+
+
+ ///////////////////////////
+ // JSON value data types //
+ ///////////////////////////
+
+ /// @name JSON value data types
+ /// The data types to store a JSON value. These types are derived from
+ /// the template arguments passed to class @ref basic_json.
+ /// @{
+
+ /*!
+ @brief a type for an object
+
+ [RFC 7159](http://rfc7159.net/rfc7159) describes JSON objects as follows:
+ > An object is an unordered collection of zero or more name/value pairs,
+ > where a name is a string and a value is a string, number, boolean, null,
+ > object, or array.
+
+ To store objects in C++, a type is defined by the template parameters
+ described below.
+
+ @tparam ObjectType the container to store objects (e.g., `std::map` or
+ `std::unordered_map`)
+ @tparam StringType the type of the keys or names (e.g., `std::string`).
+ The comparison function `std::less<StringType>` is used to order elements
+ inside the container.
+ @tparam AllocatorType the allocator to use for objects (e.g.,
+ `std::allocator`)
+
+ #### Default type
+
+ With the default values for @a ObjectType (`std::map`), @a StringType
+ (`std::string`), and @a AllocatorType (`std::allocator`), the default
+ value for @a object_t is:
+
+ @code {.cpp}
+ std::map<
+ std::string, // key_type
+ basic_json, // value_type
+ std::less<std::string>, // key_compare
+ std::allocator<std::pair<const std::string, basic_json>> // allocator_type
+ >
+ @endcode
+
+ #### Behavior
+
+ The choice of @a object_t influences the behavior of the JSON class. With
+ the default type, objects have the following behavior:
+
+ - When all names are unique, objects will be interoperable in the sense
+ that all software implementations receiving that object will agree on
+ the name-value mappings.
+ - When the names within an object are not unique, later stored name/value
+ pairs overwrite previously stored name/value pairs, leaving the used
+ names unique. For instance, `{"key": 1}` and `{"key": 2, "key": 1}` will
+ be treated as equal and both stored as `{"key": 1}`.
+ - Internally, name/value pairs are stored in lexicographical order of the
+ names. Objects will also be serialized (see @ref dump) in this order.
+ For instance, `{"b": 1, "a": 2}` and `{"a": 2, "b": 1}` will be stored
+ and serialized as `{"a": 2, "b": 1}`.
+ - When comparing objects, the order of the name/value pairs is irrelevant.
+ This makes objects interoperable in the sense that they will not be
+ affected by these differences. For instance, `{"b": 1, "a": 2}` and
+ `{"a": 2, "b": 1}` will be treated as equal.
+
+ #### Limits
+
+ [RFC 7159](http://rfc7159.net/rfc7159) specifies:
+ > An implementation may set limits on the maximum depth of nesting.
+
+ In this class, the object's limit of nesting is not constraint explicitly.
+ However, a maximum depth of nesting may be introduced by the compiler or
+ runtime environment. A theoretical limit can be queried by calling the
+ @ref max_size function of a JSON object.
+
+ #### Storage
+
+ Objects are stored as pointers in a @ref basic_json type. That is, for any
+ access to object values, a pointer of type `object_t*` must be
+ dereferenced.
+
+ @sa @ref array_t -- type for an array value
+
+ @since version 1.0.0
+
+ @note The order name/value pairs are added to the object is *not*
+ preserved by the library. Therefore, iterating an object may return
+ name/value pairs in a different order than they were originally stored. In
+ fact, keys will be traversed in alphabetical order as `std::map` with
+ `std::less` is used by default. Please note this behavior conforms to [RFC
+ 7159](http://rfc7159.net/rfc7159), because any order implements the
+ specified "unordered" nature of JSON objects.
+ */
+ using object_t = ObjectType<StringType,
+ basic_json,
+ std::less<StringType>,
+ AllocatorType<std::pair<const StringType,
+ basic_json>>>;
+
+ /*!
+ @brief a type for an array
+
+ [RFC 7159](http://rfc7159.net/rfc7159) describes JSON arrays as follows:
+ > An array is an ordered sequence of zero or more values.
+
+ To store objects in C++, a type is defined by the template parameters
+ explained below.
+
+ @tparam ArrayType container type to store arrays (e.g., `std::vector` or
+ `std::list`)
+ @tparam AllocatorType allocator to use for arrays (e.g., `std::allocator`)
+
+ #### Default type
+
+ With the default values for @a ArrayType (`std::vector`) and @a
+ AllocatorType (`std::allocator`), the default value for @a array_t is:
+
+ @code {.cpp}
+ std::vector<
+ basic_json, // value_type
+ std::allocator<basic_json> // allocator_type
+ >
+ @endcode
+
+ #### Limits
+
+ [RFC 7159](http://rfc7159.net/rfc7159) specifies:
+ > An implementation may set limits on the maximum depth of nesting.
+
+ In this class, the array's limit of nesting is not constraint explicitly.
+ However, a maximum depth of nesting may be introduced by the compiler or
+ runtime environment. A theoretical limit can be queried by calling the
+ @ref max_size function of a JSON array.
+
+ #### Storage
+
+ Arrays are stored as pointers in a @ref basic_json type. That is, for any
+ access to array values, a pointer of type `array_t*` must be dereferenced.
+
+ @sa @ref object_t -- type for an object value
+
+ @since version 1.0.0
+ */
+ using array_t = ArrayType<basic_json, AllocatorType<basic_json>>;
+
+ /*!
+ @brief a type for a string
+
+ [RFC 7159](http://rfc7159.net/rfc7159) describes JSON strings as follows:
+ > A string is a sequence of zero or more Unicode characters.
+
+ To store objects in C++, a type is defined by the template parameter
+ described below. Unicode values are split by the JSON class into
+ byte-sized characters during deserialization.
+
+ @tparam StringType the container to store strings (e.g., `std::string`).
+ Note this container is used for keys/names in objects, see @ref object_t.
+
+ #### Default type
+
+ With the default values for @a StringType (`std::string`), the default
+ value for @a string_t is:
+
+ @code {.cpp}
+ std::string
+ @endcode
+
+ #### Encoding
+
+ Strings are stored in UTF-8 encoding. Therefore, functions like
+ `std::string::size()` or `std::string::length()` return the number of
+ bytes in the string rather than the number of characters or glyphs.
+
+ #### String comparison
+
+ [RFC 7159](http://rfc7159.net/rfc7159) states:
+ > Software implementations are typically required to test names of object
+ > members for equality. Implementations that transform the textual
+ > representation into sequences of Unicode code units and then perform the
+ > comparison numerically, code unit by code unit, are interoperable in the
+ > sense that implementations will agree in all cases on equality or
+ > inequality of two strings. For example, implementations that compare
+ > strings with escaped characters unconverted may incorrectly find that
+ > `"a\\b"` and `"a\u005Cb"` are not equal.
+
+ This implementation is interoperable as it does compare strings code unit
+ by code unit.
+
+ #### Storage
+
+ String values are stored as pointers in a @ref basic_json type. That is,
+ for any access to string values, a pointer of type `string_t*` must be
+ dereferenced.
+
+ @since version 1.0.0
+ */
+ using string_t = StringType;
+
+ /*!
+ @brief a type for a boolean
+
+ [RFC 7159](http://rfc7159.net/rfc7159) implicitly describes a boolean as a
+ type which differentiates the two literals `true` and `false`.
+
+ To store objects in C++, a type is defined by the template parameter @a
+ BooleanType which chooses the type to use.
+
+ #### Default type
+
+ With the default values for @a BooleanType (`bool`), the default value for
+ @a boolean_t is:
+
+ @code {.cpp}
+ bool
+ @endcode
+
+ #### Storage
+
+ Boolean values are stored directly inside a @ref basic_json type.
+
+ @since version 1.0.0
+ */
+ using boolean_t = BooleanType;
+
+ /*!
+ @brief a type for a number (integer)
+
+ [RFC 7159](http://rfc7159.net/rfc7159) describes numbers as follows:
+ > The representation of numbers is similar to that used in most
+ > programming languages. A number is represented in base 10 using decimal
+ > digits. It contains an integer component that may be prefixed with an
+ > optional minus sign, which may be followed by a fraction part and/or an
+ > exponent part. Leading zeros are not allowed. (...) Numeric values that
+ > cannot be represented in the grammar below (such as Infinity and NaN)
+ > are not permitted.
+
+ This description includes both integer and floating-point numbers.
+ However, C++ allows more precise storage if it is known whether the number
+ is a signed integer, an unsigned integer or a floating-point number.
+ Therefore, three different types, @ref number_integer_t, @ref
+ number_unsigned_t and @ref number_float_t are used.
+
+ To store integer numbers in C++, a type is defined by the template
+ parameter @a NumberIntegerType which chooses the type to use.
+
+ #### Default type
+
+ With the default values for @a NumberIntegerType (`int64_t`), the default
+ value for @a number_integer_t is:
+
+ @code {.cpp}
+ int64_t
+ @endcode
+
+ #### Default behavior
+
+ - The restrictions about leading zeros is not enforced in C++. Instead,
+ leading zeros in integer literals lead to an interpretation as octal
+ number. Internally, the value will be stored as decimal number. For
+ instance, the C++ integer literal `010` will be serialized to `8`.
+ During deserialization, leading zeros yield an error.
+ - Not-a-number (NaN) values will be serialized to `null`.
+
+ #### Limits
+
+ [RFC 7159](http://rfc7159.net/rfc7159) specifies:
+ > An implementation may set limits on the range and precision of numbers.
+
+ When the default type is used, the maximal integer number that can be
+ stored is `9223372036854775807` (INT64_MAX) and the minimal integer number
+ that can be stored is `-9223372036854775808` (INT64_MIN). Integer numbers
+ that are out of range will yield over/underflow when used in a
+ constructor. During deserialization, too large or small integer numbers
+ will be automatically be stored as @ref number_unsigned_t or @ref
+ number_float_t.
+
+ [RFC 7159](http://rfc7159.net/rfc7159) further states:
+ > Note that when such software is used, numbers that are integers and are
+ > in the range \f$[-2^{53}+1, 2^{53}-1]\f$ are interoperable in the sense
+ > that implementations will agree exactly on their numeric values.
+
+ As this range is a subrange of the exactly supported range [INT64_MIN,
+ INT64_MAX], this class's integer type is interoperable.
+
+ #### Storage
+
+ Integer number values are stored directly inside a @ref basic_json type.
+
+ @sa @ref number_float_t -- type for number values (floating-point)
+
+ @sa @ref number_unsigned_t -- type for number values (unsigned integer)
+
+ @since version 1.0.0
+ */
+ using number_integer_t = NumberIntegerType;
+
+ /*!
+ @brief a type for a number (unsigned)
+
+ [RFC 7159](http://rfc7159.net/rfc7159) describes numbers as follows:
+ > The representation of numbers is similar to that used in most
+ > programming languages. A number is represented in base 10 using decimal
+ > digits. It contains an integer component that may be prefixed with an
+ > optional minus sign, which may be followed by a fraction part and/or an
+ > exponent part. Leading zeros are not allowed. (...) Numeric values that
+ > cannot be represented in the grammar below (such as Infinity and NaN)
+ > are not permitted.
+
+ This description includes both integer and floating-point numbers.
+ However, C++ allows more precise storage if it is known whether the number
+ is a signed integer, an unsigned integer or a floating-point number.
+ Therefore, three different types, @ref number_integer_t, @ref
+ number_unsigned_t and @ref number_float_t are used.
+
+ To store unsigned integer numbers in C++, a type is defined by the
+ template parameter @a NumberUnsignedType which chooses the type to use.
+
+ #### Default type
+
+ With the default values for @a NumberUnsignedType (`uint64_t`), the
+ default value for @a number_unsigned_t is:
+
+ @code {.cpp}
+ uint64_t
+ @endcode
+
+ #### Default behavior
+
+ - The restrictions about leading zeros is not enforced in C++. Instead,
+ leading zeros in integer literals lead to an interpretation as octal
+ number. Internally, the value will be stored as decimal number. For
+ instance, the C++ integer literal `010` will be serialized to `8`.
+ During deserialization, leading zeros yield an error.
+ - Not-a-number (NaN) values will be serialized to `null`.
+
+ #### Limits
+
+ [RFC 7159](http://rfc7159.net/rfc7159) specifies:
+ > An implementation may set limits on the range and precision of numbers.
+
+ When the default type is used, the maximal integer number that can be
+ stored is `18446744073709551615` (UINT64_MAX) and the minimal integer
+ number that can be stored is `0`. Integer numbers that are out of range
+ will yield over/underflow when used in a constructor. During
+ deserialization, too large or small integer numbers will be automatically
+ be stored as @ref number_integer_t or @ref number_float_t.
+
+ [RFC 7159](http://rfc7159.net/rfc7159) further states:
+ > Note that when such software is used, numbers that are integers and are
+ > in the range \f$[-2^{53}+1, 2^{53}-1]\f$ are interoperable in the sense
+ > that implementations will agree exactly on their numeric values.
+
+ As this range is a subrange (when considered in conjunction with the
+ number_integer_t type) of the exactly supported range [0, UINT64_MAX],
+ this class's integer type is interoperable.
+
+ #### Storage
+
+ Integer number values are stored directly inside a @ref basic_json type.
+
+ @sa @ref number_float_t -- type for number values (floating-point)
+ @sa @ref number_integer_t -- type for number values (integer)
+
+ @since version 2.0.0
+ */
+ using number_unsigned_t = NumberUnsignedType;
+
+ /*!
+ @brief a type for a number (floating-point)
+
+ [RFC 7159](http://rfc7159.net/rfc7159) describes numbers as follows:
+ > The representation of numbers is similar to that used in most
+ > programming languages. A number is represented in base 10 using decimal
+ > digits. It contains an integer component that may be prefixed with an
+ > optional minus sign, which may be followed by a fraction part and/or an
+ > exponent part. Leading zeros are not allowed. (...) Numeric values that
+ > cannot be represented in the grammar below (such as Infinity and NaN)
+ > are not permitted.
+
+ This description includes both integer and floating-point numbers.
+ However, C++ allows more precise storage if it is known whether the number
+ is a signed integer, an unsigned integer or a floating-point number.
+ Therefore, three different types, @ref number_integer_t, @ref
+ number_unsigned_t and @ref number_float_t are used.
+
+ To store floating-point numbers in C++, a type is defined by the template
+ parameter @a NumberFloatType which chooses the type to use.
+
+ #### Default type
+
+ With the default values for @a NumberFloatType (`double`), the default
+ value for @a number_float_t is:
+
+ @code {.cpp}
+ double
+ @endcode
+
+ #### Default behavior
+
+ - The restrictions about leading zeros is not enforced in C++. Instead,
+ leading zeros in floating-point literals will be ignored. Internally,
+ the value will be stored as decimal number. For instance, the C++
+ floating-point literal `01.2` will be serialized to `1.2`. During
+ deserialization, leading zeros yield an error.
+ - Not-a-number (NaN) values will be serialized to `null`.
+
+ #### Limits
+
+ [RFC 7159](http://rfc7159.net/rfc7159) states:
+ > This specification allows implementations to set limits on the range and
+ > precision of numbers accepted. Since software that implements IEEE
+ > 754-2008 binary64 (double precision) numbers is generally available and
+ > widely used, good interoperability can be achieved by implementations
+ > that expect no more precision or range than these provide, in the sense
+ > that implementations will approximate JSON numbers within the expected
+ > precision.
+
+ This implementation does exactly follow this approach, as it uses double
+ precision floating-point numbers. Note values smaller than
+ `-1.79769313486232e+308` and values greater than `1.79769313486232e+308`
+ will be stored as NaN internally and be serialized to `null`.
+
+ #### Storage
+
+ Floating-point number values are stored directly inside a @ref basic_json
+ type.
+
+ @sa @ref number_integer_t -- type for number values (integer)
+
+ @sa @ref number_unsigned_t -- type for number values (unsigned integer)
+
+ @since version 1.0.0
+ */
+ using number_float_t = NumberFloatType;
+
+ /// @}
+
+ private:
+
+ /// helper for exception-safe object creation
+ template<typename T, typename... Args>
+ static T* create(Args&& ... args)
+ {
+ AllocatorType<T> alloc;
+ auto deleter = [&](T * object)
+ {
+ alloc.deallocate(object, 1);
+ };
+ std::unique_ptr<T, decltype(deleter)> object(alloc.allocate(1), deleter);
+ alloc.construct(object.get(), std::forward<Args>(args)...);
+ assert(object != nullptr);
+ return object.release();
+ }
+
+ ////////////////////////
+ // JSON value storage //
+ ////////////////////////
+
+ /*!
+ @brief a JSON value
+
+ The actual storage for a JSON value of the @ref basic_json class. This
+ union combines the different storage types for the JSON value types
+ defined in @ref value_t.
+
+ JSON type | value_t type | used type
+ --------- | --------------- | ------------------------
+ object | object | pointer to @ref object_t
+ array | array | pointer to @ref array_t
+ string | string | pointer to @ref string_t
+ boolean | boolean | @ref boolean_t
+ number | number_integer | @ref number_integer_t
+ number | number_unsigned | @ref number_unsigned_t
+ number | number_float | @ref number_float_t
+ null | null | *no value is stored*
+
+ @note Variable-length types (objects, arrays, and strings) are stored as
+ pointers. The size of the union should not exceed 64 bits if the default
+ value types are used.
+
+ @since version 1.0.0
+ */
+ union json_value
+ {
+ /// object (stored with pointer to save storage)
+ object_t* object;
+ /// array (stored with pointer to save storage)
+ array_t* array;
+ /// string (stored with pointer to save storage)
+ string_t* string;
+ /// boolean
+ boolean_t boolean;
+ /// number (integer)
+ number_integer_t number_integer;
+ /// number (unsigned integer)
+ number_unsigned_t number_unsigned;
+ /// number (floating-point)
+ number_float_t number_float;
+
+ /// default constructor (for null values)
+ json_value() = default;
+ /// constructor for booleans
+ json_value(boolean_t v) noexcept : boolean(v) {}
+ /// constructor for numbers (integer)
+ json_value(number_integer_t v) noexcept : number_integer(v) {}
+ /// constructor for numbers (unsigned)
+ json_value(number_unsigned_t v) noexcept : number_unsigned(v) {}
+ /// constructor for numbers (floating-point)
+ json_value(number_float_t v) noexcept : number_float(v) {}
+ /// constructor for empty values of a given type
+ json_value(value_t t)
+ {
+ switch (t)
+ {
+ case value_t::object:
+ {
+ object = create<object_t>();
+ break;
+ }
+
+ case value_t::array:
+ {
+ array = create<array_t>();
+ break;
+ }
+
+ case value_t::string:
+ {
+ string = create<string_t>("");
+ break;
+ }
+
+ case value_t::boolean:
+ {
+ boolean = boolean_t(false);
+ break;
+ }
+
+ case value_t::number_integer:
+ {
+ number_integer = number_integer_t(0);
+ break;
+ }
+
+ case value_t::number_unsigned:
+ {
+ number_unsigned = number_unsigned_t(0);
+ break;
+ }
+
+ case value_t::number_float:
+ {
+ number_float = number_float_t(0.0);
+ break;
+ }
+
+ case value_t::null:
+ {
+ break;
+ }
+
+ default:
+ {
+ if (t == value_t::null)
+ {
+ JSON_THROW(std::domain_error("961c151d2e87f2686a955a9be24d316f1362bf21 2.1.1")); // LCOV_EXCL_LINE
+ }
+ break;
+ }
+ }
+ }
+
+ /// constructor for strings
+ json_value(const string_t& value)
+ {
+ string = create<string_t>(value);
+ }
+
+ /// constructor for objects
+ json_value(const object_t& value)
+ {
+ object = create<object_t>(value);
+ }
+
+ /// constructor for arrays
+ json_value(const array_t& value)
+ {
+ array = create<array_t>(value);
+ }
+ };
+
+ /*!
+ @brief checks the class invariants
+
+ This function asserts the class invariants. It needs to be called at the
+ end of every constructor to make sure that created objects respect the
+ invariant. Furthermore, it has to be called each time the type of a JSON
+ value is changed, because the invariant expresses a relationship between
+ @a m_type and @a m_value.
+ */
+ void assert_invariant() const
+ {
+ assert(m_type != value_t::object or m_value.object != nullptr);
+ assert(m_type != value_t::array or m_value.array != nullptr);
+ assert(m_type != value_t::string or m_value.string != nullptr);
+ }
+
+ public:
+ //////////////////////////
+ // JSON parser callback //
+ //////////////////////////
+
+ /*!
+ @brief JSON callback events
+
+ This enumeration lists the parser events that can trigger calling a
+ callback function of type @ref parser_callback_t during parsing.
+
+ @image html callback_events.png "Example when certain parse events are triggered"
+
+ @since version 1.0.0
+ */
+ enum class parse_event_t : uint8_t
+ {
+ /// the parser read `{` and started to process a JSON object
+ object_start,
+ /// the parser read `}` and finished processing a JSON object
+ object_end,
+ /// the parser read `[` and started to process a JSON array
+ array_start,
+ /// the parser read `]` and finished processing a JSON array
+ array_end,
+ /// the parser read a key of a value in an object
+ key,
+ /// the parser finished reading a JSON value
+ value
+ };
+
+ /*!
+ @brief per-element parser callback type
+
+ With a parser callback function, the result of parsing a JSON text can be
+ influenced. When passed to @ref parse(std::istream&, const
+ parser_callback_t) or @ref parse(const CharT, const parser_callback_t),
+ it is called on certain events (passed as @ref parse_event_t via parameter
+ @a event) with a set recursion depth @a depth and context JSON value
+ @a parsed. The return value of the callback function is a boolean
+ indicating whether the element that emitted the callback shall be kept or
+ not.
+
+ We distinguish six scenarios (determined by the event type) in which the
+ callback function can be called. The following table describes the values
+ of the parameters @a depth, @a event, and @a parsed.
+
+ parameter @a event | description | parameter @a depth | parameter @a parsed
+ ------------------ | ----------- | ------------------ | -------------------
+ parse_event_t::object_start | the parser read `{` and started to process a JSON object | depth of the parent of the JSON object | a JSON value with type discarded
+ parse_event_t::key | the parser read a key of a value in an object | depth of the currently parsed JSON object | a JSON string containing the key
+ parse_event_t::object_end | the parser read `}` and finished processing a JSON object | depth of the parent of the JSON object | the parsed JSON object
+ parse_event_t::array_start | the parser read `[` and started to process a JSON array | depth of the parent of the JSON array | a JSON value with type discarded
+ parse_event_t::array_end | the parser read `]` and finished processing a JSON array | depth of the parent of the JSON array | the parsed JSON array
+ parse_event_t::value | the parser finished reading a JSON value | depth of the value | the parsed JSON value
+
+ @image html callback_events.png "Example when certain parse events are triggered"
+
+ Discarding a value (i.e., returning `false`) has different effects
+ depending on the context in which function was called:
+
+ - Discarded values in structured types are skipped. That is, the parser
+ will behave as if the discarded value was never read.
+ - In case a value outside a structured type is skipped, it is replaced
+ with `null`. This case happens if the top-level element is skipped.
+
+ @param[in] depth the depth of the recursion during parsing
+
+ @param[in] event an event of type parse_event_t indicating the context in
+ the callback function has been called
+
+ @param[in,out] parsed the current intermediate parse result; note that
+ writing to this value has no effect for parse_event_t::key events
+
+ @return Whether the JSON value which called the function during parsing
+ should be kept (`true`) or not (`false`). In the latter case, it is either
+ skipped completely or replaced by an empty discarded object.
+
+ @sa @ref parse(std::istream&, parser_callback_t) or
+ @ref parse(const CharT, const parser_callback_t) for examples
+
+ @since version 1.0.0
+ */
+ using parser_callback_t = std::function<bool(int depth,
+ parse_event_t event,
+ basic_json& parsed)>;
+
+
+ //////////////////
+ // constructors //
+ //////////////////
+
+ /// @name constructors and destructors
+ /// Constructors of class @ref basic_json, copy/move constructor, copy
+ /// assignment, static functions creating objects, and the destructor.
+ /// @{
+
+ /*!
+ @brief create an empty value with a given type
+
+ Create an empty JSON value with a given type. The value will be default
+ initialized with an empty value which depends on the type:
+
+ Value type | initial value
+ ----------- | -------------
+ null | `null`
+ boolean | `false`
+ string | `""`
+ number | `0`
+ object | `{}`
+ array | `[]`
+
+ @param[in] value_type the type of the value to create
+
+ @complexity Constant.
+
+ @throw std::bad_alloc if allocation for object, array, or string value
+ fails
+
+ @liveexample{The following code shows the constructor for different @ref
+ value_t values,basic_json__value_t}
+
+ @since version 1.0.0
+ */
+ basic_json(const value_t value_type)
+ : m_type(value_type), m_value(value_type)
+ {
+ assert_invariant();
+ }
+
+ /*!
+ @brief create a null object
+
+ Create a `null` JSON value. It either takes a null pointer as parameter
+ (explicitly creating `null`) or no parameter (implicitly creating `null`).
+ The passed null pointer itself is not read -- it is only used to choose
+ the right constructor.
+
+ @complexity Constant.
+
+ @exceptionsafety No-throw guarantee: this constructor never throws
+ exceptions.
+
+ @liveexample{The following code shows the constructor with and without a
+ null pointer parameter.,basic_json__nullptr_t}
+
+ @since version 1.0.0
+ */
+ basic_json(std::nullptr_t = nullptr) noexcept
+ : basic_json(value_t::null)
+ {
+ assert_invariant();
+ }
+
+ /*!
+ @brief create a JSON value
+
+ This is a "catch all" constructor for all compatible JSON types; that is,
+ types for which a `to_json()` method exsits. The constructor forwards the
+ parameter @a val to that method (to `json_serializer<U>::to_json` method
+ with `U = uncvref_t<CompatibleType>`, to be exact).
+
+ Template type @a CompatibleType includes, but is not limited to, the
+ following types:
+ - **arrays**: @ref array_t and all kinds of compatible containers such as
+ `std::vector`, `std::deque`, `std::list`, `std::forward_list`,
+ `std::array`, `std::set`, `std::unordered_set`, `std::multiset`, and
+ `unordered_multiset` with a `value_type` from which a @ref basic_json
+ value can be constructed.
+ - **objects**: @ref object_t and all kinds of compatible associative
+ containers such as `std::map`, `std::unordered_map`, `std::multimap`,
+ and `std::unordered_multimap` with a `key_type` compatible to
+ @ref string_t and a `value_type` from which a @ref basic_json value can
+ be constructed.
+ - **strings**: @ref string_t, string literals, and all compatible string
+ containers can be used.
+ - **numbers**: @ref number_integer_t, @ref number_unsigned_t,
+ @ref number_float_t, and all convertible number types such as `int`,
+ `size_t`, `int64_t`, `float` or `double` can be used.
+ - **boolean**: @ref boolean_t / `bool` can be used.
+
+ See the examples below.
+
+ @tparam CompatibleType a type such that:
+ - @a CompatibleType is not derived from `std::istream`,
+ - @a CompatibleType is not @ref basic_json (to avoid hijacking copy/move
+ constructors),
+ - @a CompatibleType is not a @ref basic_json nested type (e.g.,
+ @ref json_pointer, @ref iterator, etc ...)
+ - @ref @ref json_serializer<U> has a
+ `to_json(basic_json_t&, CompatibleType&&)` method
+
+ @tparam U = `uncvref_t<CompatibleType>`
+
+ @param[in] val the value to be forwarded
+
+ @complexity Usually linear in the size of the passed @a val, also
+ depending on the implementation of the called `to_json()`
+ method.
+
+ @throw what `json_serializer<U>::to_json()` throws
+
+ @liveexample{The following code shows the constructor with several
+ compatible types.,basic_json__CompatibleType}
+
+ @since version 2.1.0
+ */
+ template<typename CompatibleType, typename U = detail::uncvref_t<CompatibleType>,
+ detail::enable_if_t<not std::is_base_of<std::istream, U>::value and
+ not std::is_same<U, basic_json_t>::value and
+ not detail::is_basic_json_nested_type<
+ basic_json_t, U>::value and
+ detail::has_to_json<basic_json, U>::value,
+ int> = 0>
+ basic_json(CompatibleType && val) noexcept(noexcept(JSONSerializer<U>::to_json(
+ std::declval<basic_json_t&>(), std::forward<CompatibleType>(val))))
+ {
+ JSONSerializer<U>::to_json(*this, std::forward<CompatibleType>(val));
+ assert_invariant();
+ }
+
+ /*!
+ @brief create a container (array or object) from an initializer list
+
+ Creates a JSON value of type array or object from the passed initializer
+ list @a init. In case @a type_deduction is `true` (default), the type of
+ the JSON value to be created is deducted from the initializer list @a init
+ according to the following rules:
+
+ 1. If the list is empty, an empty JSON object value `{}` is created.
+ 2. If the list consists of pairs whose first element is a string, a JSON
+ object value is created where the first elements of the pairs are
+ treated as keys and the second elements are as values.
+ 3. In all other cases, an array is created.
+
+ The rules aim to create the best fit between a C++ initializer list and
+ JSON values. The rationale is as follows:
+
+ 1. The empty initializer list is written as `{}` which is exactly an empty
+ JSON object.
+ 2. C++ has now way of describing mapped types other than to list a list of
+ pairs. As JSON requires that keys must be of type string, rule 2 is the
+ weakest constraint one can pose on initializer lists to interpret them
+ as an object.
+ 3. In all other cases, the initializer list could not be interpreted as
+ JSON object type, so interpreting it as JSON array type is safe.
+
+ With the rules described above, the following JSON values cannot be
+ expressed by an initializer list:
+
+ - the empty array (`[]`): use @ref array(std::initializer_list<basic_json>)
+ with an empty initializer list in this case
+ - arrays whose elements satisfy rule 2: use @ref
+ array(std::initializer_list<basic_json>) with the same initializer list
+ in this case
+
+ @note When used without parentheses around an empty initializer list, @ref
+ basic_json() is called instead of this function, yielding the JSON null
+ value.
+
+ @param[in] init initializer list with JSON values
+
+ @param[in] type_deduction internal parameter; when set to `true`, the type
+ of the JSON value is deducted from the initializer list @a init; when set
+ to `false`, the type provided via @a manual_type is forced. This mode is
+ used by the functions @ref array(std::initializer_list<basic_json>) and
+ @ref object(std::initializer_list<basic_json>).
+
+ @param[in] manual_type internal parameter; when @a type_deduction is set
+ to `false`, the created JSON value will use the provided type (only @ref
+ value_t::array and @ref value_t::object are valid); when @a type_deduction
+ is set to `true`, this parameter has no effect
+
+ @throw std::domain_error if @a type_deduction is `false`, @a manual_type
+ is `value_t::object`, but @a init contains an element which is not a pair
+ whose first element is a string; example: `"cannot create object from
+ initializer list"`
+
+ @complexity Linear in the size of the initializer list @a init.
+
+ @liveexample{The example below shows how JSON values are created from
+ initializer lists.,basic_json__list_init_t}
+
+ @sa @ref array(std::initializer_list<basic_json>) -- create a JSON array
+ value from an initializer list
+ @sa @ref object(std::initializer_list<basic_json>) -- create a JSON object
+ value from an initializer list
+
+ @since version 1.0.0
+ */
+ basic_json(std::initializer_list<basic_json> init,
+ bool type_deduction = true,
+ value_t manual_type = value_t::array)
+ {
+ // check if each element is an array with two elements whose first
+ // element is a string
+ bool is_an_object = std::all_of(init.begin(), init.end(),
+ [](const basic_json & element)
+ {
+ return element.is_array() and element.size() == 2 and element[0].is_string();
+ });
+
+ // adjust type if type deduction is not wanted
+ if (not type_deduction)
+ {
+ // if array is wanted, do not create an object though possible
+ if (manual_type == value_t::array)
+ {
+ is_an_object = false;
+ }
+
+ // if object is wanted but impossible, throw an exception
+ if (manual_type == value_t::object and not is_an_object)
+ {
+ JSON_THROW(std::domain_error("cannot create object from initializer list"));
+ }
+ }
+
+ if (is_an_object)
+ {
+ // the initializer list is a list of pairs -> create object
+ m_type = value_t::object;
+ m_value = value_t::object;
+
+ std::for_each(init.begin(), init.end(), [this](const basic_json & element)
+ {
+ m_value.object->emplace(*(element[0].m_value.string), element[1]);
+ });
+ }
+ else
+ {
+ // the initializer list describes an array -> create array
+ m_type = value_t::array;
+ m_value.array = create<array_t>(init);
+ }
+
+ assert_invariant();
+ }
+
+ /*!
+ @brief explicitly create an array from an initializer list
+
+ Creates a JSON array value from a given initializer list. That is, given a
+ list of values `a, b, c`, creates the JSON value `[a, b, c]`. If the
+ initializer list is empty, the empty array `[]` is created.
+
+ @note This function is only needed to express two edge cases that cannot
+ be realized with the initializer list constructor (@ref
+ basic_json(std::initializer_list<basic_json>, bool, value_t)). These cases
+ are:
+ 1. creating an array whose elements are all pairs whose first element is a
+ string -- in this case, the initializer list constructor would create an
+ object, taking the first elements as keys
+ 2. creating an empty array -- passing the empty initializer list to the
+ initializer list constructor yields an empty object
+
+ @param[in] init initializer list with JSON values to create an array from
+ (optional)
+
+ @return JSON array value
+
+ @complexity Linear in the size of @a init.
+
+ @liveexample{The following code shows an example for the `array`
+ function.,array}
+
+ @sa @ref basic_json(std::initializer_list<basic_json>, bool, value_t) --
+ create a JSON value from an initializer list
+ @sa @ref object(std::initializer_list<basic_json>) -- create a JSON object
+ value from an initializer list
+
+ @since version 1.0.0
+ */
+ static basic_json array(std::initializer_list<basic_json> init =
+ std::initializer_list<basic_json>())
+ {
+ return basic_json(init, false, value_t::array);
+ }
+
+ /*!
+ @brief explicitly create an object from an initializer list
+
+ Creates a JSON object value from a given initializer list. The initializer
+ lists elements must be pairs, and their first elements must be strings. If
+ the initializer list is empty, the empty object `{}` is created.
+
+ @note This function is only added for symmetry reasons. In contrast to the
+ related function @ref array(std::initializer_list<basic_json>), there are
+ no cases which can only be expressed by this function. That is, any
+ initializer list @a init can also be passed to the initializer list
+ constructor @ref basic_json(std::initializer_list<basic_json>, bool,
+ value_t).
+
+ @param[in] init initializer list to create an object from (optional)
+
+ @return JSON object value
+
+ @throw std::domain_error if @a init is not a pair whose first elements are
+ strings; thrown by
+ @ref basic_json(std::initializer_list<basic_json>, bool, value_t)
+
+ @complexity Linear in the size of @a init.
+
+ @liveexample{The following code shows an example for the `object`
+ function.,object}
+
+ @sa @ref basic_json(std::initializer_list<basic_json>, bool, value_t) --
+ create a JSON value from an initializer list
+ @sa @ref array(std::initializer_list<basic_json>) -- create a JSON array
+ value from an initializer list
+
+ @since version 1.0.0
+ */
+ static basic_json object(std::initializer_list<basic_json> init =
+ std::initializer_list<basic_json>())
+ {
+ return basic_json(init, false, value_t::object);
+ }
+
+ /*!
+ @brief construct an array with count copies of given value
+
+ Constructs a JSON array value by creating @a cnt copies of a passed value.
+ In case @a cnt is `0`, an empty array is created. As postcondition,
+ `std::distance(begin(),end()) == cnt` holds.
+
+ @param[in] cnt the number of JSON copies of @a val to create
+ @param[in] val the JSON value to copy
+
+ @complexity Linear in @a cnt.
+
+ @liveexample{The following code shows examples for the @ref
+ basic_json(size_type\, const basic_json&)
+ constructor.,basic_json__size_type_basic_json}
+
+ @since version 1.0.0
+ */
+ basic_json(size_type cnt, const basic_json& val)
+ : m_type(value_t::array)
+ {
+ m_value.array = create<array_t>(cnt, val);
+ assert_invariant();
+ }
+
+ /*!
+ @brief construct a JSON container given an iterator range
+
+ Constructs the JSON value with the contents of the range `[first, last)`.
+ The semantics depends on the different types a JSON value can have:
+ - In case of primitive types (number, boolean, or string), @a first must
+ be `begin()` and @a last must be `end()`. In this case, the value is
+ copied. Otherwise, std::out_of_range is thrown.
+ - In case of structured types (array, object), the constructor behaves as
+ similar versions for `std::vector`.
+ - In case of a null type, std::domain_error is thrown.
+
+ @tparam InputIT an input iterator type (@ref iterator or @ref
+ const_iterator)
+
+ @param[in] first begin of the range to copy from (included)
+ @param[in] last end of the range to copy from (excluded)
+
+ @pre Iterators @a first and @a last must be initialized. **This
+ precondition is enforced with an assertion.**
+
+ @throw std::domain_error if iterators are not compatible; that is, do not
+ belong to the same JSON value; example: `"iterators are not compatible"`
+ @throw std::out_of_range if iterators are for a primitive type (number,
+ boolean, or string) where an out of range error can be detected easily;
+ example: `"iterators out of range"`
+ @throw std::bad_alloc if allocation for object, array, or string fails
+ @throw std::domain_error if called with a null value; example: `"cannot
+ use construct with iterators from null"`
+
+ @complexity Linear in distance between @a first and @a last.
+
+ @liveexample{The example below shows several ways to create JSON values by
+ specifying a subrange with iterators.,basic_json__InputIt_InputIt}
+
+ @since version 1.0.0
+ */
+ template<class InputIT, typename std::enable_if<
+ std::is_same<InputIT, typename basic_json_t::iterator>::value or
+ std::is_same<InputIT, typename basic_json_t::const_iterator>::value, int>::type = 0>
+ basic_json(InputIT first, InputIT last)
+ {
+ assert(first.m_object != nullptr);
+ assert(last.m_object != nullptr);
+
+ // make sure iterator fits the current value
+ if (first.m_object != last.m_object)
+ {
+ JSON_THROW(std::domain_error("iterators are not compatible"));
+ }
+
+ // copy type from first iterator
+ m_type = first.m_object->m_type;
+
+ // check if iterator range is complete for primitive values
+ switch (m_type)
+ {
+ case value_t::boolean:
+ case value_t::number_float:
+ case value_t::number_integer:
+ case value_t::number_unsigned:
+ case value_t::string:
+ {
+ if (not first.m_it.primitive_iterator.is_begin() or not last.m_it.primitive_iterator.is_end())
+ {
+ JSON_THROW(std::out_of_range("iterators out of range"));
+ }
+ break;
+ }
+
+ default:
+ {
+ break;
+ }
+ }
+
+ switch (m_type)
+ {
+ case value_t::number_integer:
+ {
+ m_value.number_integer = first.m_object->m_value.number_integer;
+ break;
+ }
+
+ case value_t::number_unsigned:
+ {
+ m_value.number_unsigned = first.m_object->m_value.number_unsigned;
+ break;
+ }
+
+ case value_t::number_float:
+ {
+ m_value.number_float = first.m_object->m_value.number_float;
+ break;
+ }
+
+ case value_t::boolean:
+ {
+ m_value.boolean = first.m_object->m_value.boolean;
+ break;
+ }
+
+ case value_t::string:
+ {
+ m_value = *first.m_object->m_value.string;
+ break;
+ }
+
+ case value_t::object:
+ {
+ m_value.object = create<object_t>(first.m_it.object_iterator,
+ last.m_it.object_iterator);
+ break;
+ }
+
+ case value_t::array:
+ {
+ m_value.array = create<array_t>(first.m_it.array_iterator,
+ last.m_it.array_iterator);
+ break;
+ }
+
+ default:
+ {
+ JSON_THROW(std::domain_error("cannot use construct with iterators from " + first.m_object->type_name()));
+ }
+ }
+
+ assert_invariant();
+ }
+
+ /*!
+ @brief construct a JSON value given an input stream
+
+ @param[in,out] i stream to read a serialized JSON value from
+ @param[in] cb a parser callback function of type @ref parser_callback_t
+ which is used to control the deserialization by filtering unwanted values
+ (optional)
+
+ @complexity Linear in the length of the input. The parser is a predictive
+ LL(1) parser. The complexity can be higher if the parser callback function
+ @a cb has a super-linear complexity.
+
+ @note A UTF-8 byte order mark is silently ignored.
+
+ @deprecated This constructor is deprecated and will be removed in version
+ 3.0.0 to unify the interface of the library. Deserialization will be
+ done by stream operators or by calling one of the `parse` functions,
+ e.g. @ref parse(std::istream&, const parser_callback_t). That is, calls
+ like `json j(i);` for an input stream @a i need to be replaced by
+ `json j = json::parse(i);`. See the example below.
+
+ @liveexample{The example below demonstrates constructing a JSON value from
+ a `std::stringstream` with and without callback
+ function.,basic_json__istream}
+
+ @since version 2.0.0, deprecated in version 2.0.3, to be removed in
+ version 3.0.0
+ */
+ JSON_DEPRECATED
+ explicit basic_json(std::istream& i, const parser_callback_t cb = nullptr)
+ {
+ *this = parser(i, cb).parse();
+ assert_invariant();
+ }
+
+ ///////////////////////////////////////
+ // other constructors and destructor //
+ ///////////////////////////////////////
+
+ /*!
+ @brief copy constructor
+
+ Creates a copy of a given JSON value.
+
+ @param[in] other the JSON value to copy
+
+ @complexity Linear in the size of @a other.
+
+ @requirement This function helps `basic_json` satisfying the
+ [Container](http://en.cppreference.com/w/cpp/concept/Container)
+ requirements:
+ - The complexity is linear.
+ - As postcondition, it holds: `other == basic_json(other)`.
+
+ @throw std::bad_alloc if allocation for object, array, or string fails.
+
+ @liveexample{The following code shows an example for the copy
+ constructor.,basic_json__basic_json}
+
+ @since version 1.0.0
+ */
+ basic_json(const basic_json& other)
+ : m_type(other.m_type)
+ {
+ // check of passed value is valid
+ other.assert_invariant();
+
+ switch (m_type)
+ {
+ case value_t::object:
+ {
+ m_value = *other.m_value.object;
+ break;
+ }
+
+ case value_t::array:
+ {
+ m_value = *other.m_value.array;
+ break;
+ }
+
+ case value_t::string:
+ {
+ m_value = *other.m_value.string;
+ break;
+ }
+
+ case value_t::boolean:
+ {
+ m_value = other.m_value.boolean;
+ break;
+ }
+
+ case value_t::number_integer:
+ {
+ m_value = other.m_value.number_integer;
+ break;
+ }
+
+ case value_t::number_unsigned:
+ {
+ m_value = other.m_value.number_unsigned;
+ break;
+ }
+
+ case value_t::number_float:
+ {
+ m_value = other.m_value.number_float;
+ break;
+ }
+
+ default:
+ {
+ break;
+ }
+ }
+
+ assert_invariant();
+ }
+
+ /*!
+ @brief move constructor
+
+ Move constructor. Constructs a JSON value with the contents of the given
+ value @a other using move semantics. It "steals" the resources from @a
+ other and leaves it as JSON null value.
+
+ @param[in,out] other value to move to this object
+
+ @post @a other is a JSON null value
+
+ @complexity Constant.
+
+ @liveexample{The code below shows the move constructor explicitly called
+ via std::move.,basic_json__moveconstructor}
+
+ @since version 1.0.0
+ */
+ basic_json(basic_json&& other) noexcept
+ : m_type(std::move(other.m_type)),
+ m_value(std::move(other.m_value))
+ {
+ // check that passed value is valid
+ other.assert_invariant();
+
+ // invalidate payload
+ other.m_type = value_t::null;
+ other.m_value = {};
+
+ assert_invariant();
+ }
+
+ /*!
+ @brief copy assignment
+
+ Copy assignment operator. Copies a JSON value via the "copy and swap"
+ strategy: It is expressed in terms of the copy constructor, destructor,
+ and the swap() member function.
+
+ @param[in] other value to copy from
+
+ @complexity Linear.
+
+ @requirement This function helps `basic_json` satisfying the
+ [Container](http://en.cppreference.com/w/cpp/concept/Container)
+ requirements:
+ - The complexity is linear.
+
+ @liveexample{The code below shows and example for the copy assignment. It
+ creates a copy of value `a` which is then swapped with `b`. Finally\, the
+ copy of `a` (which is the null value after the swap) is
+ destroyed.,basic_json__copyassignment}
+
+ @since version 1.0.0
+ */
+ reference& operator=(basic_json other) noexcept (
+ std::is_nothrow_move_constructible<value_t>::value and
+ std::is_nothrow_move_assignable<value_t>::value and
+ std::is_nothrow_move_constructible<json_value>::value and
+ std::is_nothrow_move_assignable<json_value>::value
+ )
+ {
+ // check that passed value is valid
+ other.assert_invariant();
+
+ using std::swap;
+ swap(m_type, other.m_type);
+ swap(m_value, other.m_value);
+
+ assert_invariant();
+ return *this;
+ }
+
+ /*!
+ @brief destructor
+
+ Destroys the JSON value and frees all allocated memory.
+
+ @complexity Linear.
+
+ @requirement This function helps `basic_json` satisfying the
+ [Container](http://en.cppreference.com/w/cpp/concept/Container)
+ requirements:
+ - The complexity is linear.
+ - All stored elements are destroyed and all memory is freed.
+
+ @since version 1.0.0
+ */
+ ~basic_json()
+ {
+ assert_invariant();
+
+ switch (m_type)
+ {
+ case value_t::object:
+ {
+ AllocatorType<object_t> alloc;
+ alloc.destroy(m_value.object);
+ alloc.deallocate(m_value.object, 1);
+ break;
+ }
+
+ case value_t::array:
+ {
+ AllocatorType<array_t> alloc;
+ alloc.destroy(m_value.array);
+ alloc.deallocate(m_value.array, 1);
+ break;
+ }
+
+ case value_t::string:
+ {
+ AllocatorType<string_t> alloc;
+ alloc.destroy(m_value.string);
+ alloc.deallocate(m_value.string, 1);
+ break;
+ }
+
+ default:
+ {
+ // all other types need no specific destructor
+ break;
+ }
+ }
+ }
+
+ /// @}
+
+ public:
+ ///////////////////////
+ // object inspection //
+ ///////////////////////
+
+ /// @name object inspection
+ /// Functions to inspect the type of a JSON value.
+ /// @{
+
+ /*!
+ @brief serialization
+
+ Serialization function for JSON values. The function tries to mimic
+ Python's `json.dumps()` function, and currently supports its @a indent
+ parameter.
+
+ @param[in] indent If indent is nonnegative, then array elements and object
+ members will be pretty-printed with that indent level. An indent level of
+ `0` will only insert newlines. `-1` (the default) selects the most compact
+ representation.
+
+ @return string containing the serialization of the JSON value
+
+ @complexity Linear.
+
+ @liveexample{The following example shows the effect of different @a indent
+ parameters to the result of the serialization.,dump}
+
+ @see https://docs.python.org/2/library/json.html#json.dump
+
+ @since version 1.0.0
+ */
+ string_t dump(const int indent = -1) const
+ {
+ std::stringstream ss;
+
+ if (indent >= 0)
+ {
+ dump(ss, true, static_cast<unsigned int>(indent));
+ }
+ else
+ {
+ dump(ss, false, 0);
+ }
+
+ return ss.str();
+ }
+
+ /*!
+ @brief return the type of the JSON value (explicit)
+
+ Return the type of the JSON value as a value from the @ref value_t
+ enumeration.
+
+ @return the type of the JSON value
+
+ @complexity Constant.
+
+ @exceptionsafety No-throw guarantee: this member function never throws
+ exceptions.
+
+ @liveexample{The following code exemplifies `type()` for all JSON
+ types.,type}
+
+ @since version 1.0.0
+ */
+ constexpr value_t type() const noexcept
+ {
+ return m_type;
+ }
+
+ /*!
+ @brief return whether type is primitive
+
+ This function returns true iff the JSON type is primitive (string, number,
+ boolean, or null).
+
+ @return `true` if type is primitive (string, number, boolean, or null),
+ `false` otherwise.
+
+ @complexity Constant.
+
+ @exceptionsafety No-throw guarantee: this member function never throws
+ exceptions.
+
+ @liveexample{The following code exemplifies `is_primitive()` for all JSON
+ types.,is_primitive}
+
+ @sa @ref is_structured() -- returns whether JSON value is structured
+ @sa @ref is_null() -- returns whether JSON value is `null`
+ @sa @ref is_string() -- returns whether JSON value is a string
+ @sa @ref is_boolean() -- returns whether JSON value is a boolean
+ @sa @ref is_number() -- returns whether JSON value is a number
+
+ @since version 1.0.0
+ */
+ constexpr bool is_primitive() const noexcept
+ {
+ return is_null() or is_string() or is_boolean() or is_number();
+ }
+
+ /*!
+ @brief return whether type is structured
+
+ This function returns true iff the JSON type is structured (array or
+ object).
+
+ @return `true` if type is structured (array or object), `false` otherwise.
+
+ @complexity Constant.
+
+ @exceptionsafety No-throw guarantee: this member function never throws
+ exceptions.
+
+ @liveexample{The following code exemplifies `is_structured()` for all JSON
+ types.,is_structured}
+
+ @sa @ref is_primitive() -- returns whether value is primitive
+ @sa @ref is_array() -- returns whether value is an array
+ @sa @ref is_object() -- returns whether value is an object
+
+ @since version 1.0.0
+ */
+ constexpr bool is_structured() const noexcept
+ {
+ return is_array() or is_object();
+ }
+
+ /*!
+ @brief return whether value is null
+
+ This function returns true iff the JSON value is null.
+
+ @return `true` if type is null, `false` otherwise.
+
+ @complexity Constant.
+
+ @exceptionsafety No-throw guarantee: this member function never throws
+ exceptions.
+
+ @liveexample{The following code exemplifies `is_null()` for all JSON
+ types.,is_null}
+
+ @since version 1.0.0
+ */
+ constexpr bool is_null() const noexcept
+ {
+ return m_type == value_t::null;
+ }
+
+ /*!
+ @brief return whether value is a boolean
+
+ This function returns true iff the JSON value is a boolean.
+
+ @return `true` if type is boolean, `false` otherwise.
+
+ @complexity Constant.
+
+ @exceptionsafety No-throw guarantee: this member function never throws
+ exceptions.
+
+ @liveexample{The following code exemplifies `is_boolean()` for all JSON
+ types.,is_boolean}
+
+ @since version 1.0.0
+ */
+ constexpr bool is_boolean() const noexcept
+ {
+ return m_type == value_t::boolean;
+ }
+
+ /*!
+ @brief return whether value is a number
+
+ This function returns true iff the JSON value is a number. This includes
+ both integer and floating-point values.
+
+ @return `true` if type is number (regardless whether integer, unsigned
+ integer or floating-type), `false` otherwise.
+
+ @complexity Constant.
+
+ @exceptionsafety No-throw guarantee: this member function never throws
+ exceptions.
+
+ @liveexample{The following code exemplifies `is_number()` for all JSON
+ types.,is_number}
+
+ @sa @ref is_number_integer() -- check if value is an integer or unsigned
+ integer number
+ @sa @ref is_number_unsigned() -- check if value is an unsigned integer
+ number
+ @sa @ref is_number_float() -- check if value is a floating-point number
+
+ @since version 1.0.0
+ */
+ constexpr bool is_number() const noexcept
+ {
+ return is_number_integer() or is_number_float();
+ }
+
+ /*!
+ @brief return whether value is an integer number
+
+ This function returns true iff the JSON value is an integer or unsigned
+ integer number. This excludes floating-point values.
+
+ @return `true` if type is an integer or unsigned integer number, `false`
+ otherwise.
+
+ @complexity Constant.
+
+ @exceptionsafety No-throw guarantee: this member function never throws
+ exceptions.
+
+ @liveexample{The following code exemplifies `is_number_integer()` for all
+ JSON types.,is_number_integer}
+
+ @sa @ref is_number() -- check if value is a number
+ @sa @ref is_number_unsigned() -- check if value is an unsigned integer
+ number
+ @sa @ref is_number_float() -- check if value is a floating-point number
+
+ @since version 1.0.0
+ */
+ constexpr bool is_number_integer() const noexcept
+ {
+ return m_type == value_t::number_integer or m_type == value_t::number_unsigned;
+ }
+
+ /*!
+ @brief return whether value is an unsigned integer number
+
+ This function returns true iff the JSON value is an unsigned integer
+ number. This excludes floating-point and (signed) integer values.
+
+ @return `true` if type is an unsigned integer number, `false` otherwise.
+
+ @complexity Constant.
+
+ @exceptionsafety No-throw guarantee: this member function never throws
+ exceptions.
+
+ @liveexample{The following code exemplifies `is_number_unsigned()` for all
+ JSON types.,is_number_unsigned}
+
+ @sa @ref is_number() -- check if value is a number
+ @sa @ref is_number_integer() -- check if value is an integer or unsigned
+ integer number
+ @sa @ref is_number_float() -- check if value is a floating-point number
+
+ @since version 2.0.0
+ */
+ constexpr bool is_number_unsigned() const noexcept
+ {
+ return m_type == value_t::number_unsigned;
+ }
+
+ /*!
+ @brief return whether value is a floating-point number
+
+ This function returns true iff the JSON value is a floating-point number.
+ This excludes integer and unsigned integer values.
+
+ @return `true` if type is a floating-point number, `false` otherwise.
+
+ @complexity Constant.
+
+ @exceptionsafety No-throw guarantee: this member function never throws
+ exceptions.
+
+ @liveexample{The following code exemplifies `is_number_float()` for all
+ JSON types.,is_number_float}
+
+ @sa @ref is_number() -- check if value is number
+ @sa @ref is_number_integer() -- check if value is an integer number
+ @sa @ref is_number_unsigned() -- check if value is an unsigned integer
+ number
+
+ @since version 1.0.0
+ */
+ constexpr bool is_number_float() const noexcept
+ {
+ return m_type == value_t::number_float;
+ }
+
+ /*!
+ @brief return whether value is an object
+
+ This function returns true iff the JSON value is an object.
+
+ @return `true` if type is object, `false` otherwise.
+
+ @complexity Constant.
+
+ @exceptionsafety No-throw guarantee: this member function never throws
+ exceptions.
+
+ @liveexample{The following code exemplifies `is_object()` for all JSON
+ types.,is_object}
+
+ @since version 1.0.0
+ */
+ constexpr bool is_object() const noexcept
+ {
+ return m_type == value_t::object;
+ }
+
+ /*!
+ @brief return whether value is an array
+
+ This function returns true iff the JSON value is an array.
+
+ @return `true` if type is array, `false` otherwise.
+
+ @complexity Constant.
+
+ @exceptionsafety No-throw guarantee: this member function never throws
+ exceptions.
+
+ @liveexample{The following code exemplifies `is_array()` for all JSON
+ types.,is_array}
+
+ @since version 1.0.0
+ */
+ constexpr bool is_array() const noexcept
+ {
+ return m_type == value_t::array;
+ }
+
+ /*!
+ @brief return whether value is a string
+
+ This function returns true iff the JSON value is a string.
+
+ @return `true` if type is string, `false` otherwise.
+
+ @complexity Constant.
+
+ @exceptionsafety No-throw guarantee: this member function never throws
+ exceptions.
+
+ @liveexample{The following code exemplifies `is_string()` for all JSON
+ types.,is_string}
+
+ @since version 1.0.0
+ */
+ constexpr bool is_string() const noexcept
+ {
+ return m_type == value_t::string;
+ }
+
+ /*!
+ @brief return whether value is discarded
+
+ This function returns true iff the JSON value was discarded during parsing
+ with a callback function (see @ref parser_callback_t).
+
+ @note This function will always be `false` for JSON values after parsing.
+ That is, discarded values can only occur during parsing, but will be
+ removed when inside a structured value or replaced by null in other cases.
+
+ @return `true` if type is discarded, `false` otherwise.
+
+ @complexity Constant.
+
+ @exceptionsafety No-throw guarantee: this member function never throws
+ exceptions.
+
+ @liveexample{The following code exemplifies `is_discarded()` for all JSON
+ types.,is_discarded}
+
+ @since version 1.0.0
+ */
+ constexpr bool is_discarded() const noexcept
+ {
+ return m_type == value_t::discarded;
+ }
+
+ /*!
+ @brief return the type of the JSON value (implicit)
+
+ Implicitly return the type of the JSON value as a value from the @ref
+ value_t enumeration.
+
+ @return the type of the JSON value
+
+ @complexity Constant.
+
+ @exceptionsafety No-throw guarantee: this member function never throws
+ exceptions.
+
+ @liveexample{The following code exemplifies the @ref value_t operator for
+ all JSON types.,operator__value_t}
+
+ @since version 1.0.0
+ */
+ constexpr operator value_t() const noexcept
+ {
+ return m_type;
+ }
+
+ /// @}
+
+ private:
+ //////////////////
+ // value access //
+ //////////////////
+
+ /// get a boolean (explicit)
+ boolean_t get_impl(boolean_t* /*unused*/) const
+ {
+ if (is_boolean())
+ {
+ return m_value.boolean;
+ }
+
+ JSON_THROW(std::domain_error("type must be boolean, but is " + type_name()));
+ }
+
+ /// get a pointer to the value (object)
+ object_t* get_impl_ptr(object_t* /*unused*/) noexcept
+ {
+ return is_object() ? m_value.object : nullptr;
+ }
+
+ /// get a pointer to the value (object)
+ constexpr const object_t* get_impl_ptr(const object_t* /*unused*/) const noexcept
+ {
+ return is_object() ? m_value.object : nullptr;
+ }
+
+ /// get a pointer to the value (array)
+ array_t* get_impl_ptr(array_t* /*unused*/) noexcept
+ {
+ return is_array() ? m_value.array : nullptr;
+ }
+
+ /// get a pointer to the value (array)
+ constexpr const array_t* get_impl_ptr(const array_t* /*unused*/) const noexcept
+ {
+ return is_array() ? m_value.array : nullptr;
+ }
+
+ /// get a pointer to the value (string)
+ string_t* get_impl_ptr(string_t* /*unused*/) noexcept
+ {
+ return is_string() ? m_value.string : nullptr;
+ }
+
+ /// get a pointer to the value (string)
+ constexpr const string_t* get_impl_ptr(const string_t* /*unused*/) const noexcept
+ {
+ return is_string() ? m_value.string : nullptr;
+ }
+
+ /// get a pointer to the value (boolean)
+ boolean_t* get_impl_ptr(boolean_t* /*unused*/) noexcept
+ {
+ return is_boolean() ? &m_value.boolean : nullptr;
+ }
+
+ /// get a pointer to the value (boolean)
+ constexpr const boolean_t* get_impl_ptr(const boolean_t* /*unused*/) const noexcept
+ {
+ return is_boolean() ? &m_value.boolean : nullptr;
+ }
+
+ /// get a pointer to the value (integer number)
+ number_integer_t* get_impl_ptr(number_integer_t* /*unused*/) noexcept
+ {
+ return is_number_integer() ? &m_value.number_integer : nullptr;
+ }
+
+ /// get a pointer to the value (integer number)
+ constexpr const number_integer_t* get_impl_ptr(const number_integer_t* /*unused*/) const noexcept
+ {
+ return is_number_integer() ? &m_value.number_integer : nullptr;
+ }
+
+ /// get a pointer to the value (unsigned number)
+ number_unsigned_t* get_impl_ptr(number_unsigned_t* /*unused*/) noexcept
+ {
+ return is_number_unsigned() ? &m_value.number_unsigned : nullptr;
+ }
+
+ /// get a pointer to the value (unsigned number)
+ constexpr const number_unsigned_t* get_impl_ptr(const number_unsigned_t* /*unused*/) const noexcept
+ {
+ return is_number_unsigned() ? &m_value.number_unsigned : nullptr;
+ }
+
+ /// get a pointer to the value (floating-point number)
+ number_float_t* get_impl_ptr(number_float_t* /*unused*/) noexcept
+ {
+ return is_number_float() ? &m_value.number_float : nullptr;
+ }
+
+ /// get a pointer to the value (floating-point number)
+ constexpr const number_float_t* get_impl_ptr(const number_float_t* /*unused*/) const noexcept
+ {
+ return is_number_float() ? &m_value.number_float : nullptr;
+ }
+
+ /*!
+ @brief helper function to implement get_ref()
+
+ This funcion helps to implement get_ref() without code duplication for
+ const and non-const overloads
+
+ @tparam ThisType will be deduced as `basic_json` or `const basic_json`
+
+ @throw std::domain_error if ReferenceType does not match underlying value
+ type of the current JSON
+ */
+ template<typename ReferenceType, typename ThisType>
+ static ReferenceType get_ref_impl(ThisType& obj)
+ {
+ // helper type
+ using PointerType = typename std::add_pointer<ReferenceType>::type;
+
+ // delegate the call to get_ptr<>()
+ auto ptr = obj.template get_ptr<PointerType>();
+
+ if (ptr != nullptr)
+ {
+ return *ptr;
+ }
+
+ JSON_THROW(std::domain_error("incompatible ReferenceType for get_ref, actual type is " +
+ obj.type_name()));
+ }
+
+ public:
+ /// @name value access
+ /// Direct access to the stored value of a JSON value.
+ /// @{
+
+ /*!
+ @brief get special-case overload
+
+ This overloads avoids a lot of template boilerplate, it can be seen as the
+ identity method
+
+ @tparam BasicJsonType == @ref basic_json
+
+ @return a copy of *this
+
+ @complexity Constant.
+
+ @since version 2.1.0
+ */
+ template <
+ typename BasicJsonType,
+ detail::enable_if_t<std::is_same<typename std::remove_const<BasicJsonType>::type,
+ basic_json_t>::value,
+ int> = 0 >
+ basic_json get() const
+ {
+ return *this;
+ }
+
+ /*!
+ @brief get a value (explicit)
+
+ Explicit type conversion between the JSON value and a compatible value
+ which is [CopyConstructible](http://en.cppreference.com/w/cpp/concept/CopyConstructible)
+ and [DefaultConstructible](http://en.cppreference.com/w/cpp/concept/DefaultConstructible).
+ The value is converted by calling the @ref json_serializer<ValueType>
+ `from_json()` method.
+
+ The function is equivalent to executing
+ @code {.cpp}
+ ValueType ret;
+ JSONSerializer<ValueType>::from_json(*this, ret);
+ return ret;
+ @endcode
+
+ This overloads is chosen if:
+ - @a ValueType is not @ref basic_json,
+ - @ref json_serializer<ValueType> has a `from_json()` method of the form
+ `void from_json(const @ref basic_json&, ValueType&)`, and
+ - @ref json_serializer<ValueType> does not have a `from_json()` method of
+ the form `ValueType from_json(const @ref basic_json&)`
+
+ @tparam ValueTypeCV the provided value type
+ @tparam ValueType the returned value type
+
+ @return copy of the JSON value, converted to @a ValueType
+
+ @throw what @ref json_serializer<ValueType> `from_json()` method throws
+
+ @liveexample{The example below shows several conversions from JSON values
+ to other types. There a few things to note: (1) Floating-point numbers can
+ be converted to integers\, (2) A JSON array can be converted to a standard
+ `std::vector<short>`\, (3) A JSON object can be converted to C++
+ associative containers such as `std::unordered_map<std::string\,
+ json>`.,get__ValueType_const}
+
+ @since version 2.1.0
+ */
+ template <
+ typename ValueTypeCV,
+ typename ValueType = detail::uncvref_t<ValueTypeCV>,
+ detail::enable_if_t <
+ not std::is_same<basic_json_t, ValueType>::value and
+ detail::has_from_json<basic_json_t, ValueType>::value and
+ not detail::has_non_default_from_json<basic_json_t, ValueType>::value,
+ int > = 0 >
+ ValueType get() const noexcept(noexcept(
+ JSONSerializer<ValueType>::from_json(std::declval<const basic_json_t&>(), std::declval<ValueType&>())))
+ {
+ // we cannot static_assert on ValueTypeCV being non-const, because
+ // there is support for get<const basic_json_t>(), which is why we
+ // still need the uncvref
+ static_assert(not std::is_reference<ValueTypeCV>::value,
+ "get() cannot be used with reference types, you might want to use get_ref()");
+ static_assert(std::is_default_constructible<ValueType>::value,
+ "types must be DefaultConstructible when used with get()");
+
+ ValueType ret;
+ JSONSerializer<ValueType>::from_json(*this, ret);
+ return ret;
+ }
+
+ /*!
+ @brief get a value (explicit); special case
+
+ Explicit type conversion between the JSON value and a compatible value
+ which is **not** [CopyConstructible](http://en.cppreference.com/w/cpp/concept/CopyConstructible)
+ and **not** [DefaultConstructible](http://en.cppreference.com/w/cpp/concept/DefaultConstructible).
+ The value is converted by calling the @ref json_serializer<ValueType>
+ `from_json()` method.
+
+ The function is equivalent to executing
+ @code {.cpp}
+ return JSONSerializer<ValueTypeCV>::from_json(*this);
+ @endcode
+
+ This overloads is chosen if:
+ - @a ValueType is not @ref basic_json and
+ - @ref json_serializer<ValueType> has a `from_json()` method of the form
+ `ValueType from_json(const @ref basic_json&)`
+
+ @note If @ref json_serializer<ValueType> has both overloads of
+ `from_json()`, this one is chosen.
+
+ @tparam ValueTypeCV the provided value type
+ @tparam ValueType the returned value type
+
+ @return copy of the JSON value, converted to @a ValueType
+
+ @throw what @ref json_serializer<ValueType> `from_json()` method throws
+
+ @since version 2.1.0
+ */
+ template <
+ typename ValueTypeCV,
+ typename ValueType = detail::uncvref_t<ValueTypeCV>,
+ detail::enable_if_t<not std::is_same<basic_json_t, ValueType>::value and
+ detail::has_non_default_from_json<basic_json_t,
+ ValueType>::value, int> = 0 >
+ ValueType get() const noexcept(noexcept(
+ JSONSerializer<ValueTypeCV>::from_json(std::declval<const basic_json_t&>())))
+ {
+ static_assert(not std::is_reference<ValueTypeCV>::value,
+ "get() cannot be used with reference types, you might want to use get_ref()");
+ return JSONSerializer<ValueTypeCV>::from_json(*this);
+ }
+
+ /*!
+ @brief get a pointer value (explicit)
+
+ Explicit pointer access to the internally stored JSON value. No copies are
+ made.
+
+ @warning The pointer becomes invalid if the underlying JSON object
+ changes.
+
+ @tparam PointerType pointer type; must be a pointer to @ref array_t, @ref
+ object_t, @ref string_t, @ref boolean_t, @ref number_integer_t,
+ @ref number_unsigned_t, or @ref number_float_t.
+
+ @return pointer to the internally stored JSON value if the requested
+ pointer type @a PointerType fits to the JSON value; `nullptr` otherwise
+
+ @complexity Constant.
+
+ @liveexample{The example below shows how pointers to internal values of a
+ JSON value can be requested. Note that no type conversions are made and a
+ `nullptr` is returned if the value and the requested pointer type does not
+ match.,get__PointerType}
+
+ @sa @ref get_ptr() for explicit pointer-member access
+
+ @since version 1.0.0
+ */
+ template<typename PointerType, typename std::enable_if<
+ std::is_pointer<PointerType>::value, int>::type = 0>
+ PointerType get() noexcept
+ {
+ // delegate the call to get_ptr
+ return get_ptr<PointerType>();
+ }
+
+ /*!
+ @brief get a pointer value (explicit)
+ @copydoc get()
+ */
+ template<typename PointerType, typename std::enable_if<
+ std::is_pointer<PointerType>::value, int>::type = 0>
+ constexpr const PointerType get() const noexcept
+ {
+ // delegate the call to get_ptr
+ return get_ptr<PointerType>();
+ }
+
+ /*!
+ @brief get a pointer value (implicit)
+
+ Implicit pointer access to the internally stored JSON value. No copies are
+ made.
+
+ @warning Writing data to the pointee of the result yields an undefined
+ state.
+
+ @tparam PointerType pointer type; must be a pointer to @ref array_t, @ref
+ object_t, @ref string_t, @ref boolean_t, @ref number_integer_t,
+ @ref number_unsigned_t, or @ref number_float_t. Enforced by a static
+ assertion.
+
+ @return pointer to the internally stored JSON value if the requested
+ pointer type @a PointerType fits to the JSON value; `nullptr` otherwise
+
+ @complexity Constant.
+
+ @liveexample{The example below shows how pointers to internal values of a
+ JSON value can be requested. Note that no type conversions are made and a
+ `nullptr` is returned if the value and the requested pointer type does not
+ match.,get_ptr}
+
+ @since version 1.0.0
+ */
+ template<typename PointerType, typename std::enable_if<
+ std::is_pointer<PointerType>::value, int>::type = 0>
+ PointerType get_ptr() noexcept
+ {
+ // get the type of the PointerType (remove pointer and const)
+ using pointee_t = typename std::remove_const<typename
+ std::remove_pointer<typename
+ std::remove_const<PointerType>::type>::type>::type;
+ // make sure the type matches the allowed types
+ static_assert(
+ std::is_same<object_t, pointee_t>::value
+ or std::is_same<array_t, pointee_t>::value
+ or std::is_same<string_t, pointee_t>::value
+ or std::is_same<boolean_t, pointee_t>::value
+ or std::is_same<number_integer_t, pointee_t>::value
+ or std::is_same<number_unsigned_t, pointee_t>::value
+ or std::is_same<number_float_t, pointee_t>::value
+ , "incompatible pointer type");
+
+ // delegate the call to get_impl_ptr<>()
+ return get_impl_ptr(static_cast<PointerType>(nullptr));
+ }
+
+ /*!
+ @brief get a pointer value (implicit)
+ @copydoc get_ptr()
+ */
+ template<typename PointerType, typename std::enable_if<
+ std::is_pointer<PointerType>::value and
+ std::is_const<typename std::remove_pointer<PointerType>::type>::value, int>::type = 0>
+ constexpr const PointerType get_ptr() const noexcept
+ {
+ // get the type of the PointerType (remove pointer and const)
+ using pointee_t = typename std::remove_const<typename
+ std::remove_pointer<typename
+ std::remove_const<PointerType>::type>::type>::type;
+ // make sure the type matches the allowed types
+ static_assert(
+ std::is_same<object_t, pointee_t>::value
+ or std::is_same<array_t, pointee_t>::value
+ or std::is_same<string_t, pointee_t>::value
+ or std::is_same<boolean_t, pointee_t>::value
+ or std::is_same<number_integer_t, pointee_t>::value
+ or std::is_same<number_unsigned_t, pointee_t>::value
+ or std::is_same<number_float_t, pointee_t>::value
+ , "incompatible pointer type");
+
+ // delegate the call to get_impl_ptr<>() const
+ return get_impl_ptr(static_cast<const PointerType>(nullptr));
+ }
+
+ /*!
+ @brief get a reference value (implicit)
+
+ Implicit reference access to the internally stored JSON value. No copies
+ are made.
+
+ @warning Writing data to the referee of the result yields an undefined
+ state.
+
+ @tparam ReferenceType reference type; must be a reference to @ref array_t,
+ @ref object_t, @ref string_t, @ref boolean_t, @ref number_integer_t, or
+ @ref number_float_t. Enforced by static assertion.
+
+ @return reference to the internally stored JSON value if the requested
+ reference type @a ReferenceType fits to the JSON value; throws
+ std::domain_error otherwise
+
+ @throw std::domain_error in case passed type @a ReferenceType is
+ incompatible with the stored JSON value
+
+ @complexity Constant.
+
+ @liveexample{The example shows several calls to `get_ref()`.,get_ref}
+
+ @since version 1.1.0
+ */
+ template<typename ReferenceType, typename std::enable_if<
+ std::is_reference<ReferenceType>::value, int>::type = 0>
+ ReferenceType get_ref()
+ {
+ // delegate call to get_ref_impl
+ return get_ref_impl<ReferenceType>(*this);
+ }
+
+ /*!
+ @brief get a reference value (implicit)
+ @copydoc get_ref()
+ */
+ template<typename ReferenceType, typename std::enable_if<
+ std::is_reference<ReferenceType>::value and
+ std::is_const<typename std::remove_reference<ReferenceType>::type>::value, int>::type = 0>
+ ReferenceType get_ref() const
+ {
+ // delegate call to get_ref_impl
+ return get_ref_impl<ReferenceType>(*this);
+ }
+
+ /*!
+ @brief get a value (implicit)
+
+ Implicit type conversion between the JSON value and a compatible value.
+ The call is realized by calling @ref get() const.
+
+ @tparam ValueType non-pointer type compatible to the JSON value, for
+ instance `int` for JSON integer numbers, `bool` for JSON booleans, or
+ `std::vector` types for JSON arrays. The character type of @ref string_t
+ as well as an initializer list of this type is excluded to avoid
+ ambiguities as these types implicitly convert to `std::string`.
+
+ @return copy of the JSON value, converted to type @a ValueType
+
+ @throw std::domain_error in case passed type @a ValueType is incompatible
+ to JSON, thrown by @ref get() const
+
+ @complexity Linear in the size of the JSON value.
+
+ @liveexample{The example below shows several conversions from JSON values
+ to other types. There a few things to note: (1) Floating-point numbers can
+ be converted to integers\, (2) A JSON array can be converted to a standard
+ `std::vector<short>`\, (3) A JSON object can be converted to C++
+ associative containers such as `std::unordered_map<std::string\,
+ json>`.,operator__ValueType}
+
+ @since version 1.0.0
+ */
+ template < typename ValueType, typename std::enable_if <
+ not std::is_pointer<ValueType>::value and
+ not std::is_same<ValueType, typename string_t::value_type>::value
+#ifndef _MSC_VER // fix for issue #167 operator<< ambiguity under VS2015
+ and not std::is_same<ValueType, std::initializer_list<typename string_t::value_type>>::value
+#endif
+ , int >::type = 0 >
+ operator ValueType() const
+ {
+ // delegate the call to get<>() const
+ return get<ValueType>();
+ }
+
+ /// @}
+
+
+ ////////////////////
+ // element access //
+ ////////////////////
+
+ /// @name element access
+ /// Access to the JSON value.
+ /// @{
+
+ /*!
+ @brief access specified array element with bounds checking
+
+ Returns a reference to the element at specified location @a idx, with
+ bounds checking.
+
+ @param[in] idx index of the element to access
+
+ @return reference to the element at index @a idx
+
+ @throw std::domain_error if the JSON value is not an array; example:
+ `"cannot use at() with string"`
+ @throw std::out_of_range if the index @a idx is out of range of the array;
+ that is, `idx >= size()`; example: `"array index 7 is out of range"`
+
+ @complexity Constant.
+
+ @liveexample{The example below shows how array elements can be read and
+ written using `at()`.,at__size_type}
+
+ @since version 1.0.0
+ */
+ reference at(size_type idx)
+ {
+ // at only works for arrays
+ if (is_array())
+ {
+ JSON_TRY
+ {
+ return m_value.array->at(idx);
+ }
+ JSON_CATCH (std::out_of_range&)
+ {
+ // create better exception explanation
+ JSON_THROW(std::out_of_range("array index " + std::to_string(idx) + " is out of range"));
+ }
+ }
+ else
+ {
+ JSON_THROW(std::domain_error("cannot use at() with " + type_name()));
+ }
+ }
+
+ /*!
+ @brief access specified array element with bounds checking
+
+ Returns a const reference to the element at specified location @a idx,
+ with bounds checking.
+
+ @param[in] idx index of the element to access
+
+ @return const reference to the element at index @a idx
+
+ @throw std::domain_error if the JSON value is not an array; example:
+ `"cannot use at() with string"`
+ @throw std::out_of_range if the index @a idx is out of range of the array;
+ that is, `idx >= size()`; example: `"array index 7 is out of range"`
+
+ @complexity Constant.
+
+ @liveexample{The example below shows how array elements can be read using
+ `at()`.,at__size_type_const}
+
+ @since version 1.0.0
+ */
+ const_reference at(size_type idx) const
+ {
+ // at only works for arrays
+ if (is_array())
+ {
+ JSON_TRY
+ {
+ return m_value.array->at(idx);
+ }
+ JSON_CATCH (std::out_of_range&)
+ {
+ // create better exception explanation
+ JSON_THROW(std::out_of_range("array index " + std::to_string(idx) + " is out of range"));
+ }
+ }
+ else
+ {
+ JSON_THROW(std::domain_error("cannot use at() with " + type_name()));
+ }
+ }
+
+ /*!
+ @brief access specified object element with bounds checking
+
+ Returns a reference to the element at with specified key @a key, with
+ bounds checking.
+
+ @param[in] key key of the element to access
+
+ @return reference to the element at key @a key
+
+ @throw std::domain_error if the JSON value is not an object; example:
+ `"cannot use at() with boolean"`
+ @throw std::out_of_range if the key @a key is is not stored in the object;
+ that is, `find(key) == end()`; example: `"key "the fast" not found"`
+
+ @complexity Logarithmic in the size of the container.
+
+ @liveexample{The example below shows how object elements can be read and
+ written using `at()`.,at__object_t_key_type}
+
+ @sa @ref operator[](const typename object_t::key_type&) for unchecked
+ access by reference
+ @sa @ref value() for access by value with a default value
+
+ @since version 1.0.0
+ */
+ reference at(const typename object_t::key_type& key)
+ {
+ // at only works for objects
+ if (is_object())
+ {
+ JSON_TRY
+ {
+ return m_value.object->at(key);
+ }
+ JSON_CATCH (std::out_of_range&)
+ {
+ // create better exception explanation
+ JSON_THROW(std::out_of_range("key '" + key + "' not found"));
+ }
+ }
+ else
+ {
+ JSON_THROW(std::domain_error("cannot use at() with " + type_name()));
+ }
+ }
+
+ /*!
+ @brief access specified object element with bounds checking
+
+ Returns a const reference to the element at with specified key @a key,
+ with bounds checking.
+
+ @param[in] key key of the element to access
+
+ @return const reference to the element at key @a key
+
+ @throw std::domain_error if the JSON value is not an object; example:
+ `"cannot use at() with boolean"`
+ @throw std::out_of_range if the key @a key is is not stored in the object;
+ that is, `find(key) == end()`; example: `"key "the fast" not found"`
+
+ @complexity Logarithmic in the size of the container.
+
+ @liveexample{The example below shows how object elements can be read using
+ `at()`.,at__object_t_key_type_const}
+
+ @sa @ref operator[](const typename object_t::key_type&) for unchecked
+ access by reference
+ @sa @ref value() for access by value with a default value
+
+ @since version 1.0.0
+ */
+ const_reference at(const typename object_t::key_type& key) const
+ {
+ // at only works for objects
+ if (is_object())
+ {
+ JSON_TRY
+ {
+ return m_value.object->at(key);
+ }
+ JSON_CATCH (std::out_of_range&)
+ {
+ // create better exception explanation
+ JSON_THROW(std::out_of_range("key '" + key + "' not found"));
+ }
+ }
+ else
+ {
+ JSON_THROW(std::domain_error("cannot use at() with " + type_name()));
+ }
+ }
+
+ /*!
+ @brief access specified array element
+
+ Returns a reference to the element at specified location @a idx.
+
+ @note If @a idx is beyond the range of the array (i.e., `idx >= size()`),
+ then the array is silently filled up with `null` values to make `idx` a
+ valid reference to the last stored element.
+
+ @param[in] idx index of the element to access
+
+ @return reference to the element at index @a idx
+
+ @throw std::domain_error if JSON is not an array or null; example:
+ `"cannot use operator[] with string"`
+
+ @complexity Constant if @a idx is in the range of the array. Otherwise
+ linear in `idx - size()`.
+
+ @liveexample{The example below shows how array elements can be read and
+ written using `[]` operator. Note the addition of `null`
+ values.,operatorarray__size_type}
+
+ @since version 1.0.0
+ */
+ reference operator[](size_type idx)
+ {
+ // implicitly convert null value to an empty array
+ if (is_null())
+ {
+ m_type = value_t::array;
+ m_value.array = create<array_t>();
+ assert_invariant();
+ }
+
+ // operator[] only works for arrays
+ if (is_array())
+ {
+ // fill up array with null values if given idx is outside range
+ if (idx >= m_value.array->size())
+ {
+ m_value.array->insert(m_value.array->end(),
+ idx - m_value.array->size() + 1,
+ basic_json());
+ }
+
+ return m_value.array->operator[](idx);
+ }
+
+ JSON_THROW(std::domain_error("cannot use operator[] with " + type_name()));
+ }
+
+ /*!
+ @brief access specified array element
+
+ Returns a const reference to the element at specified location @a idx.
+
+ @param[in] idx index of the element to access
+
+ @return const reference to the element at index @a idx
+
+ @throw std::domain_error if JSON is not an array; example: `"cannot use
+ operator[] with null"`
+
+ @complexity Constant.
+
+ @liveexample{The example below shows how array elements can be read using
+ the `[]` operator.,operatorarray__size_type_const}
+
+ @since version 1.0.0
+ */
+ const_reference operator[](size_type idx) const
+ {
+ // const operator[] only works for arrays
+ if (is_array())
+ {
+ return m_value.array->operator[](idx);
+ }
+
+ JSON_THROW(std::domain_error("cannot use operator[] with " + type_name()));
+ }
+
+ /*!
+ @brief access specified object element
+
+ Returns a reference to the element at with specified key @a key.
+
+ @note If @a key is not found in the object, then it is silently added to
+ the object and filled with a `null` value to make `key` a valid reference.
+ In case the value was `null` before, it is converted to an object.
+
+ @param[in] key key of the element to access
+
+ @return reference to the element at key @a key
+
+ @throw std::domain_error if JSON is not an object or null; example:
+ `"cannot use operator[] with string"`
+
+ @complexity Logarithmic in the size of the container.
+
+ @liveexample{The example below shows how object elements can be read and
+ written using the `[]` operator.,operatorarray__key_type}
+
+ @sa @ref at(const typename object_t::key_type&) for access by reference
+ with range checking
+ @sa @ref value() for access by value with a default value
+
+ @since version 1.0.0
+ */
+ reference operator[](const typename object_t::key_type& key)
+ {
+ // implicitly convert null value to an empty object
+ if (is_null())
+ {
+ m_type = value_t::object;
+ m_value.object = create<object_t>();
+ assert_invariant();
+ }
+
+ // operator[] only works for objects
+ if (is_object())
+ {
+ return m_value.object->operator[](key);
+ }
+
+ JSON_THROW(std::domain_error("cannot use operator[] with " + type_name()));
+ }
+
+ /*!
+ @brief read-only access specified object element
+
+ Returns a const reference to the element at with specified key @a key. No
+ bounds checking is performed.
+
+ @warning If the element with key @a key does not exist, the behavior is
+ undefined.
+
+ @param[in] key key of the element to access
+
+ @return const reference to the element at key @a key
+
+ @pre The element with key @a key must exist. **This precondition is
+ enforced with an assertion.**
+
+ @throw std::domain_error if JSON is not an object; example: `"cannot use
+ operator[] with null"`
+
+ @complexity Logarithmic in the size of the container.
+
+ @liveexample{The example below shows how object elements can be read using
+ the `[]` operator.,operatorarray__key_type_const}
+
+ @sa @ref at(const typename object_t::key_type&) for access by reference
+ with range checking
+ @sa @ref value() for access by value with a default value
+
+ @since version 1.0.0
+ */
+ const_reference operator[](const typename object_t::key_type& key) const
+ {
+ // const operator[] only works for objects
+ if (is_object())
+ {
+ assert(m_value.object->find(key) != m_value.object->end());
+ return m_value.object->find(key)->second;
+ }
+
+ JSON_THROW(std::domain_error("cannot use operator[] with " + type_name()));
+ }
+
+ /*!
+ @brief access specified object element
+
+ Returns a reference to the element at with specified key @a key.
+
+ @note If @a key is not found in the object, then it is silently added to
+ the object and filled with a `null` value to make `key` a valid reference.
+ In case the value was `null` before, it is converted to an object.
+
+ @param[in] key key of the element to access
+
+ @return reference to the element at key @a key
+
+ @throw std::domain_error if JSON is not an object or null; example:
+ `"cannot use operator[] with string"`
+
+ @complexity Logarithmic in the size of the container.
+
+ @liveexample{The example below shows how object elements can be read and
+ written using the `[]` operator.,operatorarray__key_type}
+
+ @sa @ref at(const typename object_t::key_type&) for access by reference
+ with range checking
+ @sa @ref value() for access by value with a default value
+
+ @since version 1.0.0
+ */
+ template<typename T, std::size_t n>
+ reference operator[](T * (&key)[n])
+ {
+ return operator[](static_cast<const T>(key));
+ }
+
+ /*!
+ @brief read-only access specified object element
+
+ Returns a const reference to the element at with specified key @a key. No
+ bounds checking is performed.
+
+ @warning If the element with key @a key does not exist, the behavior is
+ undefined.
+
+ @note This function is required for compatibility reasons with Clang.
+
+ @param[in] key key of the element to access
+
+ @return const reference to the element at key @a key
+
+ @throw std::domain_error if JSON is not an object; example: `"cannot use
+ operator[] with null"`
+
+ @complexity Logarithmic in the size of the container.
+
+ @liveexample{The example below shows how object elements can be read using
+ the `[]` operator.,operatorarray__key_type_const}
+
+ @sa @ref at(const typename object_t::key_type&) for access by reference
+ with range checking
+ @sa @ref value() for access by value with a default value
+
+ @since version 1.0.0
+ */
+ template<typename T, std::size_t n>
+ const_reference operator[](T * (&key)[n]) const
+ {
+ return operator[](static_cast<const T>(key));
+ }
+
+ /*!
+ @brief access specified object element
+
+ Returns a reference to the element at with specified key @a key.
+
+ @note If @a key is not found in the object, then it is silently added to
+ the object and filled with a `null` value to make `key` a valid reference.
+ In case the value was `null` before, it is converted to an object.
+
+ @param[in] key key of the element to access
+
+ @return reference to the element at key @a key
+
+ @throw std::domain_error if JSON is not an object or null; example:
+ `"cannot use operator[] with string"`
+
+ @complexity Logarithmic in the size of the container.
+
+ @liveexample{The example below shows how object elements can be read and
+ written using the `[]` operator.,operatorarray__key_type}
+
+ @sa @ref at(const typename object_t::key_type&) for access by reference
+ with range checking
+ @sa @ref value() for access by value with a default value
+
+ @since version 1.1.0
+ */
+ template<typename T>
+ reference operator[](T* key)
+ {
+ // implicitly convert null to object
+ if (is_null())
+ {
+ m_type = value_t::object;
+ m_value = value_t::object;
+ assert_invariant();
+ }
+
+ // at only works for objects
+ if (is_object())
+ {
+ return m_value.object->operator[](key);
+ }
+
+ JSON_THROW(std::domain_error("cannot use operator[] with " + type_name()));
+ }
+
+ /*!
+ @brief read-only access specified object element
+
+ Returns a const reference to the element at with specified key @a key. No
+ bounds checking is performed.
+
+ @warning If the element with key @a key does not exist, the behavior is
+ undefined.
+
+ @param[in] key key of the element to access
+
+ @return const reference to the element at key @a key
+
+ @pre The element with key @a key must exist. **This precondition is
+ enforced with an assertion.**
+
+ @throw std::domain_error if JSON is not an object; example: `"cannot use
+ operator[] with null"`
+
+ @complexity Logarithmic in the size of the container.
+
+ @liveexample{The example below shows how object elements can be read using
+ the `[]` operator.,operatorarray__key_type_const}
+
+ @sa @ref at(const typename object_t::key_type&) for access by reference
+ with range checking
+ @sa @ref value() for access by value with a default value
+
+ @since version 1.1.0
+ */
+ template<typename T>
+ const_reference operator[](T* key) const
+ {
+ // at only works for objects
+ if (is_object())
+ {
+ assert(m_value.object->find(key) != m_value.object->end());
+ return m_value.object->find(key)->second;
+ }
+
+ JSON_THROW(std::domain_error("cannot use operator[] with " + type_name()));
+ }
+
+ /*!
+ @brief access specified object element with default value
+
+ Returns either a copy of an object's element at the specified key @a key
+ or a given default value if no element with key @a key exists.
+
+ The function is basically equivalent to executing
+ @code {.cpp}
+ try {
+ return at(key);
+ } catch(std::out_of_range) {
+ return default_value;
+ }
+ @endcode
+
+ @note Unlike @ref at(const typename object_t::key_type&), this function
+ does not throw if the given key @a key was not found.
+
+ @note Unlike @ref operator[](const typename object_t::key_type& key), this
+ function does not implicitly add an element to the position defined by @a
+ key. This function is furthermore also applicable to const objects.
+
+ @param[in] key key of the element to access
+ @param[in] default_value the value to return if @a key is not found
+
+ @tparam ValueType type compatible to JSON values, for instance `int` for
+ JSON integer numbers, `bool` for JSON booleans, or `std::vector` types for
+ JSON arrays. Note the type of the expected value at @a key and the default
+ value @a default_value must be compatible.
+
+ @return copy of the element at key @a key or @a default_value if @a key
+ is not found
+
+ @throw std::domain_error if JSON is not an object; example: `"cannot use
+ value() with null"`
+
+ @complexity Logarithmic in the size of the container.
+
+ @liveexample{The example below shows how object elements can be queried
+ with a default value.,basic_json__value}
+
+ @sa @ref at(const typename object_t::key_type&) for access by reference
+ with range checking
+ @sa @ref operator[](const typename object_t::key_type&) for unchecked
+ access by reference
+
+ @since version 1.0.0
+ */
+ template<class ValueType, typename std::enable_if<
+ std::is_convertible<basic_json_t, ValueType>::value, int>::type = 0>
+ ValueType value(const typename object_t::key_type& key, ValueType default_value) const
+ {
+ // at only works for objects
+ if (is_object())
+ {
+ // if key is found, return value and given default value otherwise
+ const auto it = find(key);
+ if (it != end())
+ {
+ return *it;
+ }
+
+ return default_value;
+ }
+ else
+ {
+ JSON_THROW(std::domain_error("cannot use value() with " + type_name()));
+ }
+ }
+
+ /*!
+ @brief overload for a default value of type const char*
+ @copydoc basic_json::value(const typename object_t::key_type&, ValueType) const
+ */
+ string_t value(const typename object_t::key_type& key, const char* default_value) const
+ {
+ return value(key, string_t(default_value));
+ }
+
+ /*!
+ @brief access specified object element via JSON Pointer with default value
+
+ Returns either a copy of an object's element at the specified key @a key
+ or a given default value if no element with key @a key exists.
+
+ The function is basically equivalent to executing
+ @code {.cpp}
+ try {
+ return at(ptr);
+ } catch(std::out_of_range) {
+ return default_value;
+ }
+ @endcode
+
+ @note Unlike @ref at(const json_pointer&), this function does not throw
+ if the given key @a key was not found.
+
+ @param[in] ptr a JSON pointer to the element to access
+ @param[in] default_value the value to return if @a ptr found no value
+
+ @tparam ValueType type compatible to JSON values, for instance `int` for
+ JSON integer numbers, `bool` for JSON booleans, or `std::vector` types for
+ JSON arrays. Note the type of the expected value at @a key and the default
+ value @a default_value must be compatible.
+
+ @return copy of the element at key @a key or @a default_value if @a key
+ is not found
+
+ @throw std::domain_error if JSON is not an object; example: `"cannot use
+ value() with null"`
+
+ @complexity Logarithmic in the size of the container.
+
+ @liveexample{The example below shows how object elements can be queried
+ with a default value.,basic_json__value_ptr}
+
+ @sa @ref operator[](const json_pointer&) for unchecked access by reference
+
+ @since version 2.0.2
+ */
+ template<class ValueType, typename std::enable_if<
+ std::is_convertible<basic_json_t, ValueType>::value, int>::type = 0>
+ ValueType value(const json_pointer& ptr, ValueType default_value) const
+ {
+ // at only works for objects
+ if (is_object())
+ {
+ // if pointer resolves a value, return it or use default value
+ JSON_TRY
+ {
+ return ptr.get_checked(this);
+ }
+ JSON_CATCH (std::out_of_range&)
+ {
+ return default_value;
+ }
+ }
+
+ JSON_THROW(std::domain_error("cannot use value() with " + type_name()));
+ }
+
+ /*!
+ @brief overload for a default value of type const char*
+ @copydoc basic_json::value(const json_pointer&, ValueType) const
+ */
+ string_t value(const json_pointer& ptr, const char* default_value) const
+ {
+ return value(ptr, string_t(default_value));
+ }
+
+ /*!
+ @brief access the first element
+
+ Returns a reference to the first element in the container. For a JSON
+ container `c`, the expression `c.front()` is equivalent to `*c.begin()`.
+
+ @return In case of a structured type (array or object), a reference to the
+ first element is returned. In case of number, string, or boolean values, a
+ reference to the value is returned.
+
+ @complexity Constant.
+
+ @pre The JSON value must not be `null` (would throw `std::out_of_range`)
+ or an empty array or object (undefined behavior, **guarded by
+ assertions**).
+ @post The JSON value remains unchanged.
+
+ @throw std::out_of_range when called on `null` value
+
+ @liveexample{The following code shows an example for `front()`.,front}
+
+ @sa @ref back() -- access the last element
+
+ @since version 1.0.0
+ */
+ reference front()
+ {
+ return *begin();
+ }
+
+ /*!
+ @copydoc basic_json::front()
+ */
+ const_reference front() const
+ {
+ return *cbegin();
+ }
+
+ /*!
+ @brief access the last element
+
+ Returns a reference to the last element in the container. For a JSON
+ container `c`, the expression `c.back()` is equivalent to
+ @code {.cpp}
+ auto tmp = c.end();
+ --tmp;
+ return *tmp;
+ @endcode
+
+ @return In case of a structured type (array or object), a reference to the
+ last element is returned. In case of number, string, or boolean values, a
+ reference to the value is returned.
+
+ @complexity Constant.
+
+ @pre The JSON value must not be `null` (would throw `std::out_of_range`)
+ or an empty array or object (undefined behavior, **guarded by
+ assertions**).
+ @post The JSON value remains unchanged.
+
+ @throw std::out_of_range when called on `null` value.
+
+ @liveexample{The following code shows an example for `back()`.,back}
+
+ @sa @ref front() -- access the first element
+
+ @since version 1.0.0
+ */
+ reference back()
+ {
+ auto tmp = end();
+ --tmp;
+ return *tmp;
+ }
+
+ /*!
+ @copydoc basic_json::back()
+ */
+ const_reference back() const
+ {
+ auto tmp = cend();
+ --tmp;
+ return *tmp;
+ }
+
+ /*!
+ @brief remove element given an iterator
+
+ Removes the element specified by iterator @a pos. The iterator @a pos must
+ be valid and dereferenceable. Thus the `end()` iterator (which is valid,
+ but is not dereferenceable) cannot be used as a value for @a pos.
+
+ If called on a primitive type other than `null`, the resulting JSON value
+ will be `null`.
+
+ @param[in] pos iterator to the element to remove
+ @return Iterator following the last removed element. If the iterator @a
+ pos refers to the last element, the `end()` iterator is returned.
+
+ @tparam IteratorType an @ref iterator or @ref const_iterator
+
+ @post Invalidates iterators and references at or after the point of the
+ erase, including the `end()` iterator.
+
+ @throw std::domain_error if called on a `null` value; example: `"cannot
+ use erase() with null"`
+ @throw std::domain_error if called on an iterator which does not belong to
+ the current JSON value; example: `"iterator does not fit current value"`
+ @throw std::out_of_range if called on a primitive type with invalid
+ iterator (i.e., any iterator which is not `begin()`); example: `"iterator
+ out of range"`
+
+ @complexity The complexity depends on the type:
+ - objects: amortized constant
+ - arrays: linear in distance between @a pos and the end of the container
+ - strings: linear in the length of the string
+ - other types: constant
+
+ @liveexample{The example shows the result of `erase()` for different JSON
+ types.,erase__IteratorType}
+
+ @sa @ref erase(IteratorType, IteratorType) -- removes the elements in
+ the given range
+ @sa @ref erase(const typename object_t::key_type&) -- removes the element
+ from an object at the given key
+ @sa @ref erase(const size_type) -- removes the element from an array at
+ the given index
+
+ @since version 1.0.0
+ */
+ template<class IteratorType, typename std::enable_if<
+ std::is_same<IteratorType, typename basic_json_t::iterator>::value or
+ std::is_same<IteratorType, typename basic_json_t::const_iterator>::value, int>::type
+ = 0>
+ IteratorType erase(IteratorType pos)
+ {
+ // make sure iterator fits the current value
+ if (this != pos.m_object)
+ {
+ JSON_THROW(std::domain_error("iterator does not fit current value"));
+ }
+
+ IteratorType result = end();
+
+ switch (m_type)
+ {
+ case value_t::boolean:
+ case value_t::number_float:
+ case value_t::number_integer:
+ case value_t::number_unsigned:
+ case value_t::string:
+ {
+ if (not pos.m_it.primitive_iterator.is_begin())
+ {
+ JSON_THROW(std::out_of_range("iterator out of range"));
+ }
+
+ if (is_string())
+ {
+ AllocatorType<string_t> alloc;
+ alloc.destroy(m_value.string);
+ alloc.deallocate(m_value.string, 1);
+ m_value.string = nullptr;
+ }
+
+ m_type = value_t::null;
+ assert_invariant();
+ break;
+ }
+
+ case value_t::object:
+ {
+ result.m_it.object_iterator = m_value.object->erase(pos.m_it.object_iterator);
+ break;
+ }
+
+ case value_t::array:
+ {
+ result.m_it.array_iterator = m_value.array->erase(pos.m_it.array_iterator);
+ break;
+ }
+
+ default:
+ {
+ JSON_THROW(std::domain_error("cannot use erase() with " + type_name()));
+ }
+ }
+
+ return result;
+ }
+
+ /*!
+ @brief remove elements given an iterator range
+
+ Removes the element specified by the range `[first; last)`. The iterator
+ @a first does not need to be dereferenceable if `first == last`: erasing
+ an empty range is a no-op.
+
+ If called on a primitive type other than `null`, the resulting JSON value
+ will be `null`.
+
+ @param[in] first iterator to the beginning of the range to remove
+ @param[in] last iterator past the end of the range to remove
+ @return Iterator following the last removed element. If the iterator @a
+ second refers to the last element, the `end()` iterator is returned.
+
+ @tparam IteratorType an @ref iterator or @ref const_iterator
+
+ @post Invalidates iterators and references at or after the point of the
+ erase, including the `end()` iterator.
+
+ @throw std::domain_error if called on a `null` value; example: `"cannot
+ use erase() with null"`
+ @throw std::domain_error if called on iterators which does not belong to
+ the current JSON value; example: `"iterators do not fit current value"`
+ @throw std::out_of_range if called on a primitive type with invalid
+ iterators (i.e., if `first != begin()` and `last != end()`); example:
+ `"iterators out of range"`
+
+ @complexity The complexity depends on the type:
+ - objects: `log(size()) + std::distance(first, last)`
+ - arrays: linear in the distance between @a first and @a last, plus linear
+ in the distance between @a last and end of the container
+ - strings: linear in the length of the string
+ - other types: constant
+
+ @liveexample{The example shows the result of `erase()` for different JSON
+ types.,erase__IteratorType_IteratorType}
+
+ @sa @ref erase(IteratorType) -- removes the element at a given position
+ @sa @ref erase(const typename object_t::key_type&) -- removes the element
+ from an object at the given key
+ @sa @ref erase(const size_type) -- removes the element from an array at
+ the given index
+
+ @since version 1.0.0
+ */
+ template<class IteratorType, typename std::enable_if<
+ std::is_same<IteratorType, typename basic_json_t::iterator>::value or
+ std::is_same<IteratorType, typename basic_json_t::const_iterator>::value, int>::type
+ = 0>
+ IteratorType erase(IteratorType first, IteratorType last)
+ {
+ // make sure iterator fits the current value
+ if (this != first.m_object or this != last.m_object)
+ {
+ JSON_THROW(std::domain_error("iterators do not fit current value"));
+ }
+
+ IteratorType result = end();
+
+ switch (m_type)
+ {
+ case value_t::boolean:
+ case value_t::number_float:
+ case value_t::number_integer:
+ case value_t::number_unsigned:
+ case value_t::string:
+ {
+ if (not first.m_it.primitive_iterator.is_begin() or not last.m_it.primitive_iterator.is_end())
+ {
+ JSON_THROW(std::out_of_range("iterators out of range"));
+ }
+
+ if (is_string())
+ {
+ AllocatorType<string_t> alloc;
+ alloc.destroy(m_value.string);
+ alloc.deallocate(m_value.string, 1);
+ m_value.string = nullptr;
+ }
+
+ m_type = value_t::null;
+ assert_invariant();
+ break;
+ }
+
+ case value_t::object:
+ {
+ result.m_it.object_iterator = m_value.object->erase(first.m_it.object_iterator,
+ last.m_it.object_iterator);
+ break;
+ }
+
+ case value_t::array:
+ {
+ result.m_it.array_iterator = m_value.array->erase(first.m_it.array_iterator,
+ last.m_it.array_iterator);
+ break;
+ }
+
+ default:
+ {
+ JSON_THROW(std::domain_error("cannot use erase() with " + type_name()));
+ }
+ }
+
+ return result;
+ }
+
+ /*!
+ @brief remove element from a JSON object given a key
+
+ Removes elements from a JSON object with the key value @a key.
+
+ @param[in] key value of the elements to remove
+
+ @return Number of elements removed. If @a ObjectType is the default
+ `std::map` type, the return value will always be `0` (@a key was not
+ found) or `1` (@a key was found).
+
+ @post References and iterators to the erased elements are invalidated.
+ Other references and iterators are not affected.
+
+ @throw std::domain_error when called on a type other than JSON object;
+ example: `"cannot use erase() with null"`
+
+ @complexity `log(size()) + count(key)`
+
+ @liveexample{The example shows the effect of `erase()`.,erase__key_type}
+
+ @sa @ref erase(IteratorType) -- removes the element at a given position
+ @sa @ref erase(IteratorType, IteratorType) -- removes the elements in
+ the given range
+ @sa @ref erase(const size_type) -- removes the element from an array at
+ the given index
+
+ @since version 1.0.0
+ */
+ size_type erase(const typename object_t::key_type& key)
+ {
+ // this erase only works for objects
+ if (is_object())
+ {
+ return m_value.object->erase(key);
+ }
+
+ JSON_THROW(std::domain_error("cannot use erase() with " + type_name()));
+ }
+
+ /*!
+ @brief remove element from a JSON array given an index
+
+ Removes element from a JSON array at the index @a idx.
+
+ @param[in] idx index of the element to remove
+
+ @throw std::domain_error when called on a type other than JSON array;
+ example: `"cannot use erase() with null"`
+ @throw std::out_of_range when `idx >= size()`; example: `"array index 17
+ is out of range"`
+
+ @complexity Linear in distance between @a idx and the end of the container.
+
+ @liveexample{The example shows the effect of `erase()`.,erase__size_type}
+
+ @sa @ref erase(IteratorType) -- removes the element at a given position
+ @sa @ref erase(IteratorType, IteratorType) -- removes the elements in
+ the given range
+ @sa @ref erase(const typename object_t::key_type&) -- removes the element
+ from an object at the given key
+
+ @since version 1.0.0
+ */
+ void erase(const size_type idx)
+ {
+ // this erase only works for arrays
+ if (is_array())
+ {
+ if (idx >= size())
+ {
+ JSON_THROW(std::out_of_range("array index " + std::to_string(idx) + " is out of range"));
+ }
+
+ m_value.array->erase(m_value.array->begin() + static_cast<difference_type>(idx));
+ }
+ else
+ {
+ JSON_THROW(std::domain_error("cannot use erase() with " + type_name()));
+ }
+ }
+
+ /// @}
+
+
+ ////////////
+ // lookup //
+ ////////////
+
+ /// @name lookup
+ /// @{
+
+ /*!
+ @brief find an element in a JSON object
+
+ Finds an element in a JSON object with key equivalent to @a key. If the
+ element is not found or the JSON value is not an object, end() is
+ returned.
+
+ @note This method always returns @ref end() when executed on a JSON type
+ that is not an object.
+
+ @param[in] key key value of the element to search for
+
+ @return Iterator to an element with key equivalent to @a key. If no such
+ element is found or the JSON value is not an object, past-the-end (see
+ @ref end()) iterator is returned.
+
+ @complexity Logarithmic in the size of the JSON object.
+
+ @liveexample{The example shows how `find()` is used.,find__key_type}
+
+ @since version 1.0.0
+ */
+ iterator find(typename object_t::key_type key)
+ {
+ auto result = end();
+
+ if (is_object())
+ {
+ result.m_it.object_iterator = m_value.object->find(key);
+ }
+
+ return result;
+ }
+
+ /*!
+ @brief find an element in a JSON object
+ @copydoc find(typename object_t::key_type)
+ */
+ const_iterator find(typename object_t::key_type key) const
+ {
+ auto result = cend();
+
+ if (is_object())
+ {
+ result.m_it.object_iterator = m_value.object->find(key);
+ }
+
+ return result;
+ }
+
+ /*!
+ @brief returns the number of occurrences of a key in a JSON object
+
+ Returns the number of elements with key @a key. If ObjectType is the
+ default `std::map` type, the return value will always be `0` (@a key was
+ not found) or `1` (@a key was found).
+
+ @note This method always returns `0` when executed on a JSON type that is
+ not an object.
+
+ @param[in] key key value of the element to count
+
+ @return Number of elements with key @a key. If the JSON value is not an
+ object, the return value will be `0`.
+
+ @complexity Logarithmic in the size of the JSON object.
+
+ @liveexample{The example shows how `count()` is used.,count}
+
+ @since version 1.0.0
+ */
+ size_type count(typename object_t::key_type key) const
+ {
+ // return 0 for all nonobject types
+ return is_object() ? m_value.object->count(key) : 0;
+ }
+
+ /// @}
+
+
+ ///////////////
+ // iterators //
+ ///////////////
+
+ /// @name iterators
+ /// @{
+
+ /*!
+ @brief returns an iterator to the first element
+
+ Returns an iterator to the first element.
+
+ @image html range-begin-end.svg "Illustration from cppreference.com"
+
+ @return iterator to the first element
+
+ @complexity Constant.
+
+ @requirement This function helps `basic_json` satisfying the
+ [Container](http://en.cppreference.com/w/cpp/concept/Container)
+ requirements:
+ - The complexity is constant.
+
+ @liveexample{The following code shows an example for `begin()`.,begin}
+
+ @sa @ref cbegin() -- returns a const iterator to the beginning
+ @sa @ref end() -- returns an iterator to the end
+ @sa @ref cend() -- returns a const iterator to the end
+
+ @since version 1.0.0
+ */
+ iterator begin() noexcept
+ {
+ iterator result(this);
+ result.set_begin();
+ return result;
+ }
+
+ /*!
+ @copydoc basic_json::cbegin()
+ */
+ const_iterator begin() const noexcept
+ {
+ return cbegin();
+ }
+
+ /*!
+ @brief returns a const iterator to the first element
+
+ Returns a const iterator to the first element.
+
+ @image html range-begin-end.svg "Illustration from cppreference.com"
+
+ @return const iterator to the first element
+
+ @complexity Constant.
+
+ @requirement This function helps `basic_json` satisfying the
+ [Container](http://en.cppreference.com/w/cpp/concept/Container)
+ requirements:
+ - The complexity is constant.
+ - Has the semantics of `const_cast<const basic_json&>(*this).begin()`.
+
+ @liveexample{The following code shows an example for `cbegin()`.,cbegin}
+
+ @sa @ref begin() -- returns an iterator to the beginning
+ @sa @ref end() -- returns an iterator to the end
+ @sa @ref cend() -- returns a const iterator to the end
+
+ @since version 1.0.0
+ */
+ const_iterator cbegin() const noexcept
+ {
+ const_iterator result(this);
+ result.set_begin();
+ return result;
+ }
+
+ /*!
+ @brief returns an iterator to one past the last element
+
+ Returns an iterator to one past the last element.
+
+ @image html range-begin-end.svg "Illustration from cppreference.com"
+
+ @return iterator one past the last element
+
+ @complexity Constant.
+
+ @requirement This function helps `basic_json` satisfying the
+ [Container](http://en.cppreference.com/w/cpp/concept/Container)
+ requirements:
+ - The complexity is constant.
+
+ @liveexample{The following code shows an example for `end()`.,end}
+
+ @sa @ref cend() -- returns a const iterator to the end
+ @sa @ref begin() -- returns an iterator to the beginning
+ @sa @ref cbegin() -- returns a const iterator to the beginning
+
+ @since version 1.0.0
+ */
+ iterator end() noexcept
+ {
+ iterator result(this);
+ result.set_end();
+ return result;
+ }
+
+ /*!
+ @copydoc basic_json::cend()
+ */
+ const_iterator end() const noexcept
+ {
+ return cend();
+ }
+
+ /*!
+ @brief returns a const iterator to one past the last element
+
+ Returns a const iterator to one past the last element.
+
+ @image html range-begin-end.svg "Illustration from cppreference.com"
+
+ @return const iterator one past the last element
+
+ @complexity Constant.
+
+ @requirement This function helps `basic_json` satisfying the
+ [Container](http://en.cppreference.com/w/cpp/concept/Container)
+ requirements:
+ - The complexity is constant.
+ - Has the semantics of `const_cast<const basic_json&>(*this).end()`.
+
+ @liveexample{The following code shows an example for `cend()`.,cend}
+
+ @sa @ref end() -- returns an iterator to the end
+ @sa @ref begin() -- returns an iterator to the beginning
+ @sa @ref cbegin() -- returns a const iterator to the beginning
+
+ @since version 1.0.0
+ */
+ const_iterator cend() const noexcept
+ {
+ const_iterator result(this);
+ result.set_end();
+ return result;
+ }
+
+ /*!
+ @brief returns an iterator to the reverse-beginning
+
+ Returns an iterator to the reverse-beginning; that is, the last element.
+
+ @image html range-rbegin-rend.svg "Illustration from cppreference.com"
+
+ @complexity Constant.
+
+ @requirement This function helps `basic_json` satisfying the
+ [ReversibleContainer](http://en.cppreference.com/w/cpp/concept/ReversibleContainer)
+ requirements:
+ - The complexity is constant.
+ - Has the semantics of `reverse_iterator(end())`.
+
+ @liveexample{The following code shows an example for `rbegin()`.,rbegin}
+
+ @sa @ref crbegin() -- returns a const reverse iterator to the beginning
+ @sa @ref rend() -- returns a reverse iterator to the end
+ @sa @ref crend() -- returns a const reverse iterator to the end
+
+ @since version 1.0.0
+ */
+ reverse_iterator rbegin() noexcept
+ {
+ return reverse_iterator(end());
+ }
+
+ /*!
+ @copydoc basic_json::crbegin()
+ */
+ const_reverse_iterator rbegin() const noexcept
+ {
+ return crbegin();
+ }
+
+ /*!
+ @brief returns an iterator to the reverse-end
+
+ Returns an iterator to the reverse-end; that is, one before the first
+ element.
+
+ @image html range-rbegin-rend.svg "Illustration from cppreference.com"
+
+ @complexity Constant.
+
+ @requirement This function helps `basic_json` satisfying the
+ [ReversibleContainer](http://en.cppreference.com/w/cpp/concept/ReversibleContainer)
+ requirements:
+ - The complexity is constant.
+ - Has the semantics of `reverse_iterator(begin())`.
+
+ @liveexample{The following code shows an example for `rend()`.,rend}
+
+ @sa @ref crend() -- returns a const reverse iterator to the end
+ @sa @ref rbegin() -- returns a reverse iterator to the beginning
+ @sa @ref crbegin() -- returns a const reverse iterator to the beginning
+
+ @since version 1.0.0
+ */
+ reverse_iterator rend() noexcept
+ {
+ return reverse_iterator(begin());
+ }
+
+ /*!
+ @copydoc basic_json::crend()
+ */
+ const_reverse_iterator rend() const noexcept
+ {
+ return crend();
+ }
+
+ /*!
+ @brief returns a const reverse iterator to the last element
+
+ Returns a const iterator to the reverse-beginning; that is, the last
+ element.
+
+ @image html range-rbegin-rend.svg "Illustration from cppreference.com"
+
+ @complexity Constant.
+
+ @requirement This function helps `basic_json` satisfying the
+ [ReversibleContainer](http://en.cppreference.com/w/cpp/concept/ReversibleContainer)
+ requirements:
+ - The complexity is constant.
+ - Has the semantics of `const_cast<const basic_json&>(*this).rbegin()`.
+
+ @liveexample{The following code shows an example for `crbegin()`.,crbegin}
+
+ @sa @ref rbegin() -- returns a reverse iterator to the beginning
+ @sa @ref rend() -- returns a reverse iterator to the end
+ @sa @ref crend() -- returns a const reverse iterator to the end
+
+ @since version 1.0.0
+ */
+ const_reverse_iterator crbegin() const noexcept
+ {
+ return const_reverse_iterator(cend());
+ }
+
+ /*!
+ @brief returns a const reverse iterator to one before the first
+
+ Returns a const reverse iterator to the reverse-end; that is, one before
+ the first element.
+
+ @image html range-rbegin-rend.svg "Illustration from cppreference.com"
+
+ @complexity Constant.
+
+ @requirement This function helps `basic_json` satisfying the
+ [ReversibleContainer](http://en.cppreference.com/w/cpp/concept/ReversibleContainer)
+ requirements:
+ - The complexity is constant.
+ - Has the semantics of `const_cast<const basic_json&>(*this).rend()`.
+
+ @liveexample{The following code shows an example for `crend()`.,crend}
+
+ @sa @ref rend() -- returns a reverse iterator to the end
+ @sa @ref rbegin() -- returns a reverse iterator to the beginning
+ @sa @ref crbegin() -- returns a const reverse iterator to the beginning
+
+ @since version 1.0.0
+ */
+ const_reverse_iterator crend() const noexcept
+ {
+ return const_reverse_iterator(cbegin());
+ }
+
+ private:
+ // forward declaration
+ template<typename IteratorType> class iteration_proxy;
+
+ public:
+ /*!
+ @brief wrapper to access iterator member functions in range-based for
+
+ This function allows to access @ref iterator::key() and @ref
+ iterator::value() during range-based for loops. In these loops, a
+ reference to the JSON values is returned, so there is no access to the
+ underlying iterator.
+
+ @note The name of this function is not yet final and may change in the
+ future.
+ */
+ static iteration_proxy<iterator> iterator_wrapper(reference cont)
+ {
+ return iteration_proxy<iterator>(cont);
+ }
+
+ /*!
+ @copydoc iterator_wrapper(reference)
+ */
+ static iteration_proxy<const_iterator> iterator_wrapper(const_reference cont)
+ {
+ return iteration_proxy<const_iterator>(cont);
+ }
+
+ /// @}
+
+
+ //////////////
+ // capacity //
+ //////////////
+
+ /// @name capacity
+ /// @{
+
+ /*!
+ @brief checks whether the container is empty
+
+ Checks if a JSON value has no elements.
+
+ @return The return value depends on the different types and is
+ defined as follows:
+ Value type | return value
+ ----------- | -------------
+ null | `true`
+ boolean | `false`
+ string | `false`
+ number | `false`
+ object | result of function `object_t::empty()`
+ array | result of function `array_t::empty()`
+
+ @note This function does not return whether a string stored as JSON value
+ is empty - it returns whether the JSON container itself is empty which is
+ false in the case of a string.
+
+ @complexity Constant, as long as @ref array_t and @ref object_t satisfy
+ the Container concept; that is, their `empty()` functions have constant
+ complexity.
+
+ @requirement This function helps `basic_json` satisfying the
+ [Container](http://en.cppreference.com/w/cpp/concept/Container)
+ requirements:
+ - The complexity is constant.
+ - Has the semantics of `begin() == end()`.
+
+ @liveexample{The following code uses `empty()` to check if a JSON
+ object contains any elements.,empty}
+
+ @sa @ref size() -- returns the number of elements
+
+ @since version 1.0.0
+ */
+ bool empty() const noexcept
+ {
+ switch (m_type)
+ {
+ case value_t::null:
+ {
+ // null values are empty
+ return true;
+ }
+
+ case value_t::array:
+ {
+ // delegate call to array_t::empty()
+ return m_value.array->empty();
+ }
+
+ case value_t::object:
+ {
+ // delegate call to object_t::empty()
+ return m_value.object->empty();
+ }
+
+ default:
+ {
+ // all other types are nonempty
+ return false;
+ }
+ }
+ }
+
+ /*!
+ @brief returns the number of elements
+
+ Returns the number of elements in a JSON value.
+
+ @return The return value depends on the different types and is
+ defined as follows:
+ Value type | return value
+ ----------- | -------------
+ null | `0`
+ boolean | `1`
+ string | `1`
+ number | `1`
+ object | result of function object_t::size()
+ array | result of function array_t::size()
+
+ @note This function does not return the length of a string stored as JSON
+ value - it returns the number of elements in the JSON value which is 1 in
+ the case of a string.
+
+ @complexity Constant, as long as @ref array_t and @ref object_t satisfy
+ the Container concept; that is, their size() functions have constant
+ complexity.
+
+ @requirement This function helps `basic_json` satisfying the
+ [Container](http://en.cppreference.com/w/cpp/concept/Container)
+ requirements:
+ - The complexity is constant.
+ - Has the semantics of `std::distance(begin(), end())`.
+
+ @liveexample{The following code calls `size()` on the different value
+ types.,size}
+
+ @sa @ref empty() -- checks whether the container is empty
+ @sa @ref max_size() -- returns the maximal number of elements
+
+ @since version 1.0.0
+ */
+ size_type size() const noexcept
+ {
+ switch (m_type)
+ {
+ case value_t::null:
+ {
+ // null values are empty
+ return 0;
+ }
+
+ case value_t::array:
+ {
+ // delegate call to array_t::size()
+ return m_value.array->size();
+ }
+
+ case value_t::object:
+ {
+ // delegate call to object_t::size()
+ return m_value.object->size();
+ }
+
+ default:
+ {
+ // all other types have size 1
+ return 1;
+ }
+ }
+ }
+
+ /*!
+ @brief returns the maximum possible number of elements
+
+ Returns the maximum number of elements a JSON value is able to hold due to
+ system or library implementation limitations, i.e. `std::distance(begin(),
+ end())` for the JSON value.
+
+ @return The return value depends on the different types and is
+ defined as follows:
+ Value type | return value
+ ----------- | -------------
+ null | `0` (same as `size()`)
+ boolean | `1` (same as `size()`)
+ string | `1` (same as `size()`)
+ number | `1` (same as `size()`)
+ object | result of function `object_t::max_size()`
+ array | result of function `array_t::max_size()`
+
+ @complexity Constant, as long as @ref array_t and @ref object_t satisfy
+ the Container concept; that is, their `max_size()` functions have constant
+ complexity.
+
+ @requirement This function helps `basic_json` satisfying the
+ [Container](http://en.cppreference.com/w/cpp/concept/Container)
+ requirements:
+ - The complexity is constant.
+ - Has the semantics of returning `b.size()` where `b` is the largest
+ possible JSON value.
+
+ @liveexample{The following code calls `max_size()` on the different value
+ types. Note the output is implementation specific.,max_size}
+
+ @sa @ref size() -- returns the number of elements
+
+ @since version 1.0.0
+ */
+ size_type max_size() const noexcept
+ {
+ switch (m_type)
+ {
+ case value_t::array:
+ {
+ // delegate call to array_t::max_size()
+ return m_value.array->max_size();
+ }
+
+ case value_t::object:
+ {
+ // delegate call to object_t::max_size()
+ return m_value.object->max_size();
+ }
+
+ default:
+ {
+ // all other types have max_size() == size()
+ return size();
+ }
+ }
+ }
+
+ /// @}
+
+
+ ///////////////
+ // modifiers //
+ ///////////////
+
+ /// @name modifiers
+ /// @{
+
+ /*!
+ @brief clears the contents
+
+ Clears the content of a JSON value and resets it to the default value as
+ if @ref basic_json(value_t) would have been called:
+
+ Value type | initial value
+ ----------- | -------------
+ null | `null`
+ boolean | `false`
+ string | `""`
+ number | `0`
+ object | `{}`
+ array | `[]`
+
+ @complexity Linear in the size of the JSON value.
+
+ @liveexample{The example below shows the effect of `clear()` to different
+ JSON types.,clear}
+
+ @since version 1.0.0
+ */
+ void clear() noexcept
+ {
+ switch (m_type)
+ {
+ case value_t::number_integer:
+ {
+ m_value.number_integer = 0;
+ break;
+ }
+
+ case value_t::number_unsigned:
+ {
+ m_value.number_unsigned = 0;
+ break;
+ }
+
+ case value_t::number_float:
+ {
+ m_value.number_float = 0.0;
+ break;
+ }
+
+ case value_t::boolean:
+ {
+ m_value.boolean = false;
+ break;
+ }
+
+ case value_t::string:
+ {
+ m_value.string->clear();
+ break;
+ }
+
+ case value_t::array:
+ {
+ m_value.array->clear();
+ break;
+ }
+
+ case value_t::object:
+ {
+ m_value.object->clear();
+ break;
+ }
+
+ default:
+ {
+ break;
+ }
+ }
+ }
+
+ /*!
+ @brief add an object to an array
+
+ Appends the given element @a val to the end of the JSON value. If the
+ function is called on a JSON null value, an empty array is created before
+ appending @a val.
+
+ @param[in] val the value to add to the JSON array
+
+ @throw std::domain_error when called on a type other than JSON array or
+ null; example: `"cannot use push_back() with number"`
+
+ @complexity Amortized constant.
+
+ @liveexample{The example shows how `push_back()` and `+=` can be used to
+ add elements to a JSON array. Note how the `null` value was silently
+ converted to a JSON array.,push_back}
+
+ @since version 1.0.0
+ */
+ void push_back(basic_json&& val)
+ {
+ // push_back only works for null objects or arrays
+ if (not(is_null() or is_array()))
+ {
+ JSON_THROW(std::domain_error("cannot use push_back() with " + type_name()));
+ }
+
+ // transform null object into an array
+ if (is_null())
+ {
+ m_type = value_t::array;
+ m_value = value_t::array;
+ assert_invariant();
+ }
+
+ // add element to array (move semantics)
+ m_value.array->push_back(std::move(val));
+ // invalidate object
+ val.m_type = value_t::null;
+ }
+
+ /*!
+ @brief add an object to an array
+ @copydoc push_back(basic_json&&)
+ */
+ reference operator+=(basic_json&& val)
+ {
+ push_back(std::move(val));
+ return *this;
+ }
+
+ /*!
+ @brief add an object to an array
+ @copydoc push_back(basic_json&&)
+ */
+ void push_back(const basic_json& val)
+ {
+ // push_back only works for null objects or arrays
+ if (not(is_null() or is_array()))
+ {
+ JSON_THROW(std::domain_error("cannot use push_back() with " + type_name()));
+ }
+
+ // transform null object into an array
+ if (is_null())
+ {
+ m_type = value_t::array;
+ m_value = value_t::array;
+ assert_invariant();
+ }
+
+ // add element to array
+ m_value.array->push_back(val);
+ }
+
+ /*!
+ @brief add an object to an array
+ @copydoc push_back(basic_json&&)
+ */
+ reference operator+=(const basic_json& val)
+ {
+ push_back(val);
+ return *this;
+ }
+
+ /*!
+ @brief add an object to an object
+
+ Inserts the given element @a val to the JSON object. If the function is
+ called on a JSON null value, an empty object is created before inserting
+ @a val.
+
+ @param[in] val the value to add to the JSON object
+
+ @throw std::domain_error when called on a type other than JSON object or
+ null; example: `"cannot use push_back() with number"`
+
+ @complexity Logarithmic in the size of the container, O(log(`size()`)).
+
+ @liveexample{The example shows how `push_back()` and `+=` can be used to
+ add elements to a JSON object. Note how the `null` value was silently
+ converted to a JSON object.,push_back__object_t__value}
+
+ @since version 1.0.0
+ */
+ void push_back(const typename object_t::value_type& val)
+ {
+ // push_back only works for null objects or objects
+ if (not(is_null() or is_object()))
+ {
+ JSON_THROW(std::domain_error("cannot use push_back() with " + type_name()));
+ }
+
+ // transform null object into an object
+ if (is_null())
+ {
+ m_type = value_t::object;
+ m_value = value_t::object;
+ assert_invariant();
+ }
+
+ // add element to array
+ m_value.object->insert(val);
+ }
+
+ /*!
+ @brief add an object to an object
+ @copydoc push_back(const typename object_t::value_type&)
+ */
+ reference operator+=(const typename object_t::value_type& val)
+ {
+ push_back(val);
+ return *this;
+ }
+
+ /*!
+ @brief add an object to an object
+
+ This function allows to use `push_back` with an initializer list. In case
+
+ 1. the current value is an object,
+ 2. the initializer list @a init contains only two elements, and
+ 3. the first element of @a init is a string,
+
+ @a init is converted into an object element and added using
+ @ref push_back(const typename object_t::value_type&). Otherwise, @a init
+ is converted to a JSON value and added using @ref push_back(basic_json&&).
+
+ @param init an initializer list
+
+ @complexity Linear in the size of the initializer list @a init.
+
+ @note This function is required to resolve an ambiguous overload error,
+ because pairs like `{"key", "value"}` can be both interpreted as
+ `object_t::value_type` or `std::initializer_list<basic_json>`, see
+ https://github.com/nlohmann/json/issues/235 for more information.
+
+ @liveexample{The example shows how initializer lists are treated as
+ objects when possible.,push_back__initializer_list}
+ */
+ void push_back(std::initializer_list<basic_json> init)
+ {
+ if (is_object() and init.size() == 2 and init.begin()->is_string())
+ {
+ const string_t key = *init.begin();
+ push_back(typename object_t::value_type(key, *(init.begin() + 1)));
+ }
+ else
+ {
+ push_back(basic_json(init));
+ }
+ }
+
+ /*!
+ @brief add an object to an object
+ @copydoc push_back(std::initializer_list<basic_json>)
+ */
+ reference operator+=(std::initializer_list<basic_json> init)
+ {
+ push_back(init);
+ return *this;
+ }
+
+ /*!
+ @brief add an object to an array
+
+ Creates a JSON value from the passed parameters @a args to the end of the
+ JSON value. If the function is called on a JSON null value, an empty array
+ is created before appending the value created from @a args.
+
+ @param[in] args arguments to forward to a constructor of @ref basic_json
+ @tparam Args compatible types to create a @ref basic_json object
+
+ @throw std::domain_error when called on a type other than JSON array or
+ null; example: `"cannot use emplace_back() with number"`
+
+ @complexity Amortized constant.
+
+ @liveexample{The example shows how `push_back()` can be used to add
+ elements to a JSON array. Note how the `null` value was silently converted
+ to a JSON array.,emplace_back}
+
+ @since version 2.0.8
+ */
+ template<class... Args>
+ void emplace_back(Args&& ... args)
+ {
+ // emplace_back only works for null objects or arrays
+ if (not(is_null() or is_array()))
+ {
+ JSON_THROW(std::domain_error("cannot use emplace_back() with " + type_name()));
+ }
+
+ // transform null object into an array
+ if (is_null())
+ {
+ m_type = value_t::array;
+ m_value = value_t::array;
+ assert_invariant();
+ }
+
+ // add element to array (perfect forwarding)
+ m_value.array->emplace_back(std::forward<Args>(args)...);
+ }
+
+ /*!
+ @brief add an object to an object if key does not exist
+
+ Inserts a new element into a JSON object constructed in-place with the
+ given @a args if there is no element with the key in the container. If the
+ function is called on a JSON null value, an empty object is created before
+ appending the value created from @a args.
+
+ @param[in] args arguments to forward to a constructor of @ref basic_json
+ @tparam Args compatible types to create a @ref basic_json object
+
+ @return a pair consisting of an iterator to the inserted element, or the
+ already-existing element if no insertion happened, and a bool
+ denoting whether the insertion took place.
+
+ @throw std::domain_error when called on a type other than JSON object or
+ null; example: `"cannot use emplace() with number"`
+
+ @complexity Logarithmic in the size of the container, O(log(`size()`)).
+
+ @liveexample{The example shows how `emplace()` can be used to add elements
+ to a JSON object. Note how the `null` value was silently converted to a
+ JSON object. Further note how no value is added if there was already one
+ value stored with the same key.,emplace}
+
+ @since version 2.0.8
+ */
+ template<class... Args>
+ std::pair<iterator, bool> emplace(Args&& ... args)
+ {
+ // emplace only works for null objects or arrays
+ if (not(is_null() or is_object()))
+ {
+ JSON_THROW(std::domain_error("cannot use emplace() with " + type_name()));
+ }
+
+ // transform null object into an object
+ if (is_null())
+ {
+ m_type = value_t::object;
+ m_value = value_t::object;
+ assert_invariant();
+ }
+
+ // add element to array (perfect forwarding)
+ auto res = m_value.object->emplace(std::forward<Args>(args)...);
+ // create result iterator and set iterator to the result of emplace
+ auto it = begin();
+ it.m_it.object_iterator = res.first;
+
+ // return pair of iterator and boolean
+ return {it, res.second};
+ }
+
+ /*!
+ @brief inserts element
+
+ Inserts element @a val before iterator @a pos.
+
+ @param[in] pos iterator before which the content will be inserted; may be
+ the end() iterator
+ @param[in] val element to insert
+ @return iterator pointing to the inserted @a val.
+
+ @throw std::domain_error if called on JSON values other than arrays;
+ example: `"cannot use insert() with string"`
+ @throw std::domain_error if @a pos is not an iterator of *this; example:
+ `"iterator does not fit current value"`
+
+ @complexity Constant plus linear in the distance between @a pos and end of
+ the container.
+
+ @liveexample{The example shows how `insert()` is used.,insert}
+
+ @since version 1.0.0
+ */
+ iterator insert(const_iterator pos, const basic_json& val)
+ {
+ // insert only works for arrays
+ if (is_array())
+ {
+ // check if iterator pos fits to this JSON value
+ if (pos.m_object != this)
+ {
+ JSON_THROW(std::domain_error("iterator does not fit current value"));
+ }
+
+ // insert to array and return iterator
+ iterator result(this);
+ result.m_it.array_iterator = m_value.array->insert(pos.m_it.array_iterator, val);
+ return result;
+ }
+
+ JSON_THROW(std::domain_error("cannot use insert() with " + type_name()));
+ }
+
+ /*!
+ @brief inserts element
+ @copydoc insert(const_iterator, const basic_json&)
+ */
+ iterator insert(const_iterator pos, basic_json&& val)
+ {
+ return insert(pos, val);
+ }
+
+ /*!
+ @brief inserts elements
+
+ Inserts @a cnt copies of @a val before iterator @a pos.
+
+ @param[in] pos iterator before which the content will be inserted; may be
+ the end() iterator
+ @param[in] cnt number of copies of @a val to insert
+ @param[in] val element to insert
+ @return iterator pointing to the first element inserted, or @a pos if
+ `cnt==0`
+
+ @throw std::domain_error if called on JSON values other than arrays;
+ example: `"cannot use insert() with string"`
+ @throw std::domain_error if @a pos is not an iterator of *this; example:
+ `"iterator does not fit current value"`
+
+ @complexity Linear in @a cnt plus linear in the distance between @a pos
+ and end of the container.
+
+ @liveexample{The example shows how `insert()` is used.,insert__count}
+
+ @since version 1.0.0
+ */
+ iterator insert(const_iterator pos, size_type cnt, const basic_json& val)
+ {
+ // insert only works for arrays
+ if (is_array())
+ {
+ // check if iterator pos fits to this JSON value
+ if (pos.m_object != this)
+ {
+ JSON_THROW(std::domain_error("iterator does not fit current value"));
+ }
+
+ // insert to array and return iterator
+ iterator result(this);
+ result.m_it.array_iterator = m_value.array->insert(pos.m_it.array_iterator, cnt, val);
+ return result;
+ }
+
+ JSON_THROW(std::domain_error("cannot use insert() with " + type_name()));
+ }
+
+ /*!
+ @brief inserts elements
+
+ Inserts elements from range `[first, last)` before iterator @a pos.
+
+ @param[in] pos iterator before which the content will be inserted; may be
+ the end() iterator
+ @param[in] first begin of the range of elements to insert
+ @param[in] last end of the range of elements to insert
+
+ @throw std::domain_error if called on JSON values other than arrays;
+ example: `"cannot use insert() with string"`
+ @throw std::domain_error if @a pos is not an iterator of *this; example:
+ `"iterator does not fit current value"`
+ @throw std::domain_error if @a first and @a last do not belong to the same
+ JSON value; example: `"iterators do not fit"`
+ @throw std::domain_error if @a first or @a last are iterators into
+ container for which insert is called; example: `"passed iterators may not
+ belong to container"`
+
+ @return iterator pointing to the first element inserted, or @a pos if
+ `first==last`
+
+ @complexity Linear in `std::distance(first, last)` plus linear in the
+ distance between @a pos and end of the container.
+
+ @liveexample{The example shows how `insert()` is used.,insert__range}
+
+ @since version 1.0.0
+ */
+ iterator insert(const_iterator pos, const_iterator first, const_iterator last)
+ {
+ // insert only works for arrays
+ if (not is_array())
+ {
+ JSON_THROW(std::domain_error("cannot use insert() with " + type_name()));
+ }
+
+ // check if iterator pos fits to this JSON value
+ if (pos.m_object != this)
+ {
+ JSON_THROW(std::domain_error("iterator does not fit current value"));
+ }
+
+ // check if range iterators belong to the same JSON object
+ if (first.m_object != last.m_object)
+ {
+ JSON_THROW(std::domain_error("iterators do not fit"));
+ }
+
+ if (first.m_object == this or last.m_object == this)
+ {
+ JSON_THROW(std::domain_error("passed iterators may not belong to container"));
+ }
+
+ // insert to array and return iterator
+ iterator result(this);
+ result.m_it.array_iterator = m_value.array->insert(
+ pos.m_it.array_iterator,
+ first.m_it.array_iterator,
+ last.m_it.array_iterator);
+ return result;
+ }
+
+ /*!
+ @brief inserts elements
+
+ Inserts elements from initializer list @a ilist before iterator @a pos.
+
+ @param[in] pos iterator before which the content will be inserted; may be
+ the end() iterator
+ @param[in] ilist initializer list to insert the values from
+
+ @throw std::domain_error if called on JSON values other than arrays;
+ example: `"cannot use insert() with string"`
+ @throw std::domain_error if @a pos is not an iterator of *this; example:
+ `"iterator does not fit current value"`
+
+ @return iterator pointing to the first element inserted, or @a pos if
+ `ilist` is empty
+
+ @complexity Linear in `ilist.size()` plus linear in the distance between
+ @a pos and end of the container.
+
+ @liveexample{The example shows how `insert()` is used.,insert__ilist}
+
+ @since version 1.0.0
+ */
+ iterator insert(const_iterator pos, std::initializer_list<basic_json> ilist)
+ {
+ // insert only works for arrays
+ if (not is_array())
+ {
+ JSON_THROW(std::domain_error("cannot use insert() with " + type_name()));
+ }
+
+ // check if iterator pos fits to this JSON value
+ if (pos.m_object != this)
+ {
+ JSON_THROW(std::domain_error("iterator does not fit current value"));
+ }
+
+ // insert to array and return iterator
+ iterator result(this);
+ result.m_it.array_iterator = m_value.array->insert(pos.m_it.array_iterator, ilist);
+ return result;
+ }
+
+ /*!
+ @brief exchanges the values
+
+ Exchanges the contents of the JSON value with those of @a other. Does not
+ invoke any move, copy, or swap operations on individual elements. All
+ iterators and references remain valid. The past-the-end iterator is
+ invalidated.
+
+ @param[in,out] other JSON value to exchange the contents with
+
+ @complexity Constant.
+
+ @liveexample{The example below shows how JSON values can be swapped with
+ `swap()`.,swap__reference}
+
+ @since version 1.0.0
+ */
+ void swap(reference other) noexcept (
+ std::is_nothrow_move_constructible<value_t>::value and
+ std::is_nothrow_move_assignable<value_t>::value and
+ std::is_nothrow_move_constructible<json_value>::value and
+ std::is_nothrow_move_assignable<json_value>::value
+ )
+ {
+ std::swap(m_type, other.m_type);
+ std::swap(m_value, other.m_value);
+ assert_invariant();
+ }
+
+ /*!
+ @brief exchanges the values
+
+ Exchanges the contents of a JSON array with those of @a other. Does not
+ invoke any move, copy, or swap operations on individual elements. All
+ iterators and references remain valid. The past-the-end iterator is
+ invalidated.
+
+ @param[in,out] other array to exchange the contents with
+
+ @throw std::domain_error when JSON value is not an array; example:
+ `"cannot use swap() with string"`
+
+ @complexity Constant.
+
+ @liveexample{The example below shows how arrays can be swapped with
+ `swap()`.,swap__array_t}
+
+ @since version 1.0.0
+ */
+ void swap(array_t& other)
+ {
+ // swap only works for arrays
+ if (is_array())
+ {
+ std::swap(*(m_value.array), other);
+ }
+ else
+ {
+ JSON_THROW(std::domain_error("cannot use swap() with " + type_name()));
+ }
+ }
+
+ /*!
+ @brief exchanges the values
+
+ Exchanges the contents of a JSON object with those of @a other. Does not
+ invoke any move, copy, or swap operations on individual elements. All
+ iterators and references remain valid. The past-the-end iterator is
+ invalidated.
+
+ @param[in,out] other object to exchange the contents with
+
+ @throw std::domain_error when JSON value is not an object; example:
+ `"cannot use swap() with string"`
+
+ @complexity Constant.
+
+ @liveexample{The example below shows how objects can be swapped with
+ `swap()`.,swap__object_t}
+
+ @since version 1.0.0
+ */
+ void swap(object_t& other)
+ {
+ // swap only works for objects
+ if (is_object())
+ {
+ std::swap(*(m_value.object), other);
+ }
+ else
+ {
+ JSON_THROW(std::domain_error("cannot use swap() with " + type_name()));
+ }
+ }
+
+ /*!
+ @brief exchanges the values
+
+ Exchanges the contents of a JSON string with those of @a other. Does not
+ invoke any move, copy, or swap operations on individual elements. All
+ iterators and references remain valid. The past-the-end iterator is
+ invalidated.
+
+ @param[in,out] other string to exchange the contents with
+
+ @throw std::domain_error when JSON value is not a string; example: `"cannot
+ use swap() with boolean"`
+
+ @complexity Constant.
+
+ @liveexample{The example below shows how strings can be swapped with
+ `swap()`.,swap__string_t}
+
+ @since version 1.0.0
+ */
+ void swap(string_t& other)
+ {
+ // swap only works for strings
+ if (is_string())
+ {
+ std::swap(*(m_value.string), other);
+ }
+ else
+ {
+ JSON_THROW(std::domain_error("cannot use swap() with " + type_name()));
+ }
+ }
+
+ /// @}
+
+ public:
+ //////////////////////////////////////////
+ // lexicographical comparison operators //
+ //////////////////////////////////////////
+
+ /// @name lexicographical comparison operators
+ /// @{
+
+ /*!
+ @brief comparison: equal
+
+ Compares two JSON values for equality according to the following rules:
+ - Two JSON values are equal if (1) they are from the same type and (2)
+ their stored values are the same.
+ - Integer and floating-point numbers are automatically converted before
+ comparison. Floating-point numbers are compared indirectly: two
+ floating-point numbers `f1` and `f2` are considered equal if neither
+ `f1 > f2` nor `f2 > f1` holds.
+ - Two JSON null values are equal.
+
+ @param[in] lhs first JSON value to consider
+ @param[in] rhs second JSON value to consider
+ @return whether the values @a lhs and @a rhs are equal
+
+ @complexity Linear.
+
+ @liveexample{The example demonstrates comparing several JSON
+ types.,operator__equal}
+
+ @since version 1.0.0
+ */
+ friend bool operator==(const_reference lhs, const_reference rhs) noexcept
+ {
+ const auto lhs_type = lhs.type();
+ const auto rhs_type = rhs.type();
+
+ if (lhs_type == rhs_type)
+ {
+ switch (lhs_type)
+ {
+ case value_t::array:
+ {
+ return *lhs.m_value.array == *rhs.m_value.array;
+ }
+ case value_t::object:
+ {
+ return *lhs.m_value.object == *rhs.m_value.object;
+ }
+ case value_t::null:
+ {
+ return true;
+ }
+ case value_t::string:
+ {
+ return *lhs.m_value.string == *rhs.m_value.string;
+ }
+ case value_t::boolean:
+ {
+ return lhs.m_value.boolean == rhs.m_value.boolean;
+ }
+ case value_t::number_integer:
+ {
+ return lhs.m_value.number_integer == rhs.m_value.number_integer;
+ }
+ case value_t::number_unsigned:
+ {
+ return lhs.m_value.number_unsigned == rhs.m_value.number_unsigned;
+ }
+ case value_t::number_float:
+ {
+ return lhs.m_value.number_float == rhs.m_value.number_float;
+ }
+ default:
+ {
+ return false;
+ }
+ }
+ }
+ else if (lhs_type == value_t::number_integer and rhs_type == value_t::number_float)
+ {
+ return static_cast<number_float_t>(lhs.m_value.number_integer) == rhs.m_value.number_float;
+ }
+ else if (lhs_type == value_t::number_float and rhs_type == value_t::number_integer)
+ {
+ return lhs.m_value.number_float == static_cast<number_float_t>(rhs.m_value.number_integer);
+ }
+ else if (lhs_type == value_t::number_unsigned and rhs_type == value_t::number_float)
+ {
+ return static_cast<number_float_t>(lhs.m_value.number_unsigned) == rhs.m_value.number_float;
+ }
+ else if (lhs_type == value_t::number_float and rhs_type == value_t::number_unsigned)
+ {
+ return lhs.m_value.number_float == static_cast<number_float_t>(rhs.m_value.number_unsigned);
+ }
+ else if (lhs_type == value_t::number_unsigned and rhs_type == value_t::number_integer)
+ {
+ return static_cast<number_integer_t>(lhs.m_value.number_unsigned) == rhs.m_value.number_integer;
+ }
+ else if (lhs_type == value_t::number_integer and rhs_type == value_t::number_unsigned)
+ {
+ return lhs.m_value.number_integer == static_cast<number_integer_t>(rhs.m_value.number_unsigned);
+ }
+
+ return false;
+ }
+
+ /*!
+ @brief comparison: equal
+ @copydoc operator==(const_reference, const_reference)
+ */
+ template<typename ScalarType, typename std::enable_if<
+ std::is_scalar<ScalarType>::value, int>::type = 0>
+ friend bool operator==(const_reference lhs, const ScalarType rhs) noexcept
+ {
+ return (lhs == basic_json(rhs));
+ }
+
+ /*!
+ @brief comparison: equal
+ @copydoc operator==(const_reference, const_reference)
+ */
+ template<typename ScalarType, typename std::enable_if<
+ std::is_scalar<ScalarType>::value, int>::type = 0>
+ friend bool operator==(const ScalarType lhs, const_reference rhs) noexcept
+ {
+ return (basic_json(lhs) == rhs);
+ }
+
+ /*!
+ @brief comparison: not equal
+
+ Compares two JSON values for inequality by calculating `not (lhs == rhs)`.
+
+ @param[in] lhs first JSON value to consider
+ @param[in] rhs second JSON value to consider
+ @return whether the values @a lhs and @a rhs are not equal
+
+ @complexity Linear.
+
+ @liveexample{The example demonstrates comparing several JSON
+ types.,operator__notequal}
+
+ @since version 1.0.0
+ */
+ friend bool operator!=(const_reference lhs, const_reference rhs) noexcept
+ {
+ return not (lhs == rhs);
+ }
+
+ /*!
+ @brief comparison: not equal
+ @copydoc operator!=(const_reference, const_reference)
+ */
+ template<typename ScalarType, typename std::enable_if<
+ std::is_scalar<ScalarType>::value, int>::type = 0>
+ friend bool operator!=(const_reference lhs, const ScalarType rhs) noexcept
+ {
+ return (lhs != basic_json(rhs));
+ }
+
+ /*!
+ @brief comparison: not equal
+ @copydoc operator!=(const_reference, const_reference)
+ */
+ template<typename ScalarType, typename std::enable_if<
+ std::is_scalar<ScalarType>::value, int>::type = 0>
+ friend bool operator!=(const ScalarType lhs, const_reference rhs) noexcept
+ {
+ return (basic_json(lhs) != rhs);
+ }
+
+ /*!
+ @brief comparison: less than
+
+ Compares whether one JSON value @a lhs is less than another JSON value @a
+ rhs according to the following rules:
+ - If @a lhs and @a rhs have the same type, the values are compared using
+ the default `<` operator.
+ - Integer and floating-point numbers are automatically converted before
+ comparison
+ - In case @a lhs and @a rhs have different types, the values are ignored
+ and the order of the types is considered, see
+ @ref operator<(const value_t, const value_t).
+
+ @param[in] lhs first JSON value to consider
+ @param[in] rhs second JSON value to consider
+ @return whether @a lhs is less than @a rhs
+
+ @complexity Linear.
+
+ @liveexample{The example demonstrates comparing several JSON
+ types.,operator__less}
+
+ @since version 1.0.0
+ */
+ friend bool operator<(const_reference lhs, const_reference rhs) noexcept
+ {
+ const auto lhs_type = lhs.type();
+ const auto rhs_type = rhs.type();
+
+ if (lhs_type == rhs_type)
+ {
+ switch (lhs_type)
+ {
+ case value_t::array:
+ {
+ return *lhs.m_value.array < *rhs.m_value.array;
+ }
+ case value_t::object:
+ {
+ return *lhs.m_value.object < *rhs.m_value.object;
+ }
+ case value_t::null:
+ {
+ return false;
+ }
+ case value_t::string:
+ {
+ return *lhs.m_value.string < *rhs.m_value.string;
+ }
+ case value_t::boolean:
+ {
+ return lhs.m_value.boolean < rhs.m_value.boolean;
+ }
+ case value_t::number_integer:
+ {
+ return lhs.m_value.number_integer < rhs.m_value.number_integer;
+ }
+ case value_t::number_unsigned:
+ {
+ return lhs.m_value.number_unsigned < rhs.m_value.number_unsigned;
+ }
+ case value_t::number_float:
+ {
+ return lhs.m_value.number_float < rhs.m_value.number_float;
+ }
+ default:
+ {
+ return false;
+ }
+ }
+ }
+ else if (lhs_type == value_t::number_integer and rhs_type == value_t::number_float)
+ {
+ return static_cast<number_float_t>(lhs.m_value.number_integer) < rhs.m_value.number_float;
+ }
+ else if (lhs_type == value_t::number_float and rhs_type == value_t::number_integer)
+ {
+ return lhs.m_value.number_float < static_cast<number_float_t>(rhs.m_value.number_integer);
+ }
+ else if (lhs_type == value_t::number_unsigned and rhs_type == value_t::number_float)
+ {
+ return static_cast<number_float_t>(lhs.m_value.number_unsigned) < rhs.m_value.number_float;
+ }
+ else if (lhs_type == value_t::number_float and rhs_type == value_t::number_unsigned)
+ {
+ return lhs.m_value.number_float < static_cast<number_float_t>(rhs.m_value.number_unsigned);
+ }
+ else if (lhs_type == value_t::number_integer and rhs_type == value_t::number_unsigned)
+ {
+ return lhs.m_value.number_integer < static_cast<number_integer_t>(rhs.m_value.number_unsigned);
+ }
+ else if (lhs_type == value_t::number_unsigned and rhs_type == value_t::number_integer)
+ {
+ return static_cast<number_integer_t>(lhs.m_value.number_unsigned) < rhs.m_value.number_integer;
+ }
+
+ // We only reach this line if we cannot compare values. In that case,
+ // we compare types. Note we have to call the operator explicitly,
+ // because MSVC has problems otherwise.
+ return operator<(lhs_type, rhs_type);
+ }
+
+ /*!
+ @brief comparison: less than or equal
+
+ Compares whether one JSON value @a lhs is less than or equal to another
+ JSON value by calculating `not (rhs < lhs)`.
+
+ @param[in] lhs first JSON value to consider
+ @param[in] rhs second JSON value to consider
+ @return whether @a lhs is less than or equal to @a rhs
+
+ @complexity Linear.
+
+ @liveexample{The example demonstrates comparing several JSON
+ types.,operator__greater}
+
+ @since version 1.0.0
+ */
+ friend bool operator<=(const_reference lhs, const_reference rhs) noexcept
+ {
+ return not (rhs < lhs);
+ }
+
+ /*!
+ @brief comparison: greater than
+
+ Compares whether one JSON value @a lhs is greater than another
+ JSON value by calculating `not (lhs <= rhs)`.
+
+ @param[in] lhs first JSON value to consider
+ @param[in] rhs second JSON value to consider
+ @return whether @a lhs is greater than to @a rhs
+
+ @complexity Linear.
+
+ @liveexample{The example demonstrates comparing several JSON
+ types.,operator__lessequal}
+
+ @since version 1.0.0
+ */
+ friend bool operator>(const_reference lhs, const_reference rhs) noexcept
+ {
+ return not (lhs <= rhs);
+ }
+
+ /*!
+ @brief comparison: greater than or equal
+
+ Compares whether one JSON value @a lhs is greater than or equal to another
+ JSON value by calculating `not (lhs < rhs)`.
+
+ @param[in] lhs first JSON value to consider
+ @param[in] rhs second JSON value to consider
+ @return whether @a lhs is greater than or equal to @a rhs
+
+ @complexity Linear.
+
+ @liveexample{The example demonstrates comparing several JSON
+ types.,operator__greaterequal}
+
+ @since version 1.0.0
+ */
+ friend bool operator>=(const_reference lhs, const_reference rhs) noexcept
+ {
+ return not (lhs < rhs);
+ }
+
+ /// @}
+
+
+ ///////////////////
+ // serialization //
+ ///////////////////
+
+ /// @name serialization
+ /// @{
+
+ /*!
+ @brief serialize to stream
+
+ Serialize the given JSON value @a j to the output stream @a o. The JSON
+ value will be serialized using the @ref dump member function. The
+ indentation of the output can be controlled with the member variable
+ `width` of the output stream @a o. For instance, using the manipulator
+ `std::setw(4)` on @a o sets the indentation level to `4` and the
+ serialization result is the same as calling `dump(4)`.
+
+ @param[in,out] o stream to serialize to
+ @param[in] j JSON value to serialize
+
+ @return the stream @a o
+
+ @complexity Linear.
+
+ @liveexample{The example below shows the serialization with different
+ parameters to `width` to adjust the indentation level.,operator_serialize}
+
+ @since version 1.0.0
+ */
+ friend std::ostream& operator<<(std::ostream& o, const basic_json& j)
+ {
+ // read width member and use it as indentation parameter if nonzero
+ const bool pretty_print = (o.width() > 0);
+ const auto indentation = (pretty_print ? o.width() : 0);
+
+ // reset width to 0 for subsequent calls to this stream
+ o.width(0);
+
+ // do the actual serialization
+ j.dump(o, pretty_print, static_cast<unsigned int>(indentation));
+
+ return o;
+ }
+
+ /*!
+ @brief serialize to stream
+ @copydoc operator<<(std::ostream&, const basic_json&)
+ */
+ friend std::ostream& operator>>(const basic_json& j, std::ostream& o)
+ {
+ return o << j;
+ }
+
+ /// @}
+
+
+ /////////////////////
+ // deserialization //
+ /////////////////////
+
+ /// @name deserialization
+ /// @{
+
+ /*!
+ @brief deserialize from an array
+
+ This function reads from an array of 1-byte values.
+
+ @pre Each element of the container has a size of 1 byte. Violating this
+ precondition yields undefined behavior. **This precondition is enforced
+ with a static assertion.**
+
+ @param[in] array array to read from
+ @param[in] cb a parser callback function of type @ref parser_callback_t
+ which is used to control the deserialization by filtering unwanted values
+ (optional)
+
+ @return result of the deserialization
+
+ @complexity Linear in the length of the input. The parser is a predictive
+ LL(1) parser. The complexity can be higher if the parser callback function
+ @a cb has a super-linear complexity.
+
+ @note A UTF-8 byte order mark is silently ignored.
+
+ @liveexample{The example below demonstrates the `parse()` function reading
+ from an array.,parse__array__parser_callback_t}
+
+ @since version 2.0.3
+ */
+ template<class T, std::size_t N>
+ static basic_json parse(T (&array)[N],
+ const parser_callback_t cb = nullptr)
+ {
+ // delegate the call to the iterator-range parse overload
+ return parse(std::begin(array), std::end(array), cb);
+ }
+
+ /*!
+ @brief deserialize from string literal
+
+ @tparam CharT character/literal type with size of 1 byte
+ @param[in] s string literal to read a serialized JSON value from
+ @param[in] cb a parser callback function of type @ref parser_callback_t
+ which is used to control the deserialization by filtering unwanted values
+ (optional)
+
+ @return result of the deserialization
+
+ @complexity Linear in the length of the input. The parser is a predictive
+ LL(1) parser. The complexity can be higher if the parser callback function
+ @a cb has a super-linear complexity.
+
+ @note A UTF-8 byte order mark is silently ignored.
+ @note String containers like `std::string` or @ref string_t can be parsed
+ with @ref parse(const ContiguousContainer&, const parser_callback_t)
+
+ @liveexample{The example below demonstrates the `parse()` function with
+ and without callback function.,parse__string__parser_callback_t}
+
+ @sa @ref parse(std::istream&, const parser_callback_t) for a version that
+ reads from an input stream
+
+ @since version 1.0.0 (originally for @ref string_t)
+ */
+ template<typename CharT, typename std::enable_if<
+ std::is_pointer<CharT>::value and
+ std::is_integral<typename std::remove_pointer<CharT>::type>::value and
+ sizeof(typename std::remove_pointer<CharT>::type) == 1, int>::type = 0>
+ static basic_json parse(const CharT s,
+ const parser_callback_t cb = nullptr)
+ {
+ return parser(reinterpret_cast<const char*>(s), cb).parse();
+ }
+
+ /*!
+ @brief deserialize from stream
+
+ @param[in,out] i stream to read a serialized JSON value from
+ @param[in] cb a parser callback function of type @ref parser_callback_t
+ which is used to control the deserialization by filtering unwanted values
+ (optional)
+
+ @return result of the deserialization
+
+ @complexity Linear in the length of the input. The parser is a predictive
+ LL(1) parser. The complexity can be higher if the parser callback function
+ @a cb has a super-linear complexity.
+
+ @note A UTF-8 byte order mark is silently ignored.
+
+ @liveexample{The example below demonstrates the `parse()` function with
+ and without callback function.,parse__istream__parser_callback_t}
+
+ @sa @ref parse(const CharT, const parser_callback_t) for a version
+ that reads from a string
+
+ @since version 1.0.0
+ */
+ static basic_json parse(std::istream& i,
+ const parser_callback_t cb = nullptr)
+ {
+ return parser(i, cb).parse();
+ }
+
+ /*!
+ @copydoc parse(std::istream&, const parser_callback_t)
+ */
+ static basic_json parse(std::istream&& i,
+ const parser_callback_t cb = nullptr)
+ {
+ return parser(i, cb).parse();
+ }
+
+ /*!
+ @brief deserialize from an iterator range with contiguous storage
+
+ This function reads from an iterator range of a container with contiguous
+ storage of 1-byte values. Compatible container types include
+ `std::vector`, `std::string`, `std::array`, `std::valarray`, and
+ `std::initializer_list`. Furthermore, C-style arrays can be used with
+ `std::begin()`/`std::end()`. User-defined containers can be used as long
+ as they implement random-access iterators and a contiguous storage.
+
+ @pre The iterator range is contiguous. Violating this precondition yields
+ undefined behavior. **This precondition is enforced with an assertion.**
+ @pre Each element in the range has a size of 1 byte. Violating this
+ precondition yields undefined behavior. **This precondition is enforced
+ with a static assertion.**
+
+ @warning There is no way to enforce all preconditions at compile-time. If
+ the function is called with noncompliant iterators and with
+ assertions switched off, the behavior is undefined and will most
+ likely yield segmentation violation.
+
+ @tparam IteratorType iterator of container with contiguous storage
+ @param[in] first begin of the range to parse (included)
+ @param[in] last end of the range to parse (excluded)
+ @param[in] cb a parser callback function of type @ref parser_callback_t
+ which is used to control the deserialization by filtering unwanted values
+ (optional)
+
+ @return result of the deserialization
+
+ @complexity Linear in the length of the input. The parser is a predictive
+ LL(1) parser. The complexity can be higher if the parser callback function
+ @a cb has a super-linear complexity.
+
+ @note A UTF-8 byte order mark is silently ignored.
+
+ @liveexample{The example below demonstrates the `parse()` function reading
+ from an iterator range.,parse__iteratortype__parser_callback_t}
+
+ @since version 2.0.3
+ */
+ template<class IteratorType, typename std::enable_if<
+ std::is_base_of<
+ std::random_access_iterator_tag,
+ typename std::iterator_traits<IteratorType>::iterator_category>::value, int>::type = 0>
+ static basic_json parse(IteratorType first, IteratorType last,
+ const parser_callback_t cb = nullptr)
+ {
+ // assertion to check that the iterator range is indeed contiguous,
+ // see http://stackoverflow.com/a/35008842/266378 for more discussion
+ assert(std::accumulate(first, last, std::pair<bool, int>(true, 0),
+ [&first](std::pair<bool, int> res, decltype(*first) val)
+ {
+ res.first &= (val == *(std::next(std::addressof(*first), res.second++)));
+ return res;
+ }).first);
+
+ // assertion to check that each element is 1 byte long
+ static_assert(sizeof(typename std::iterator_traits<IteratorType>::value_type) == 1,
+ "each element in the iterator range must have the size of 1 byte");
+
+ // if iterator range is empty, create a parser with an empty string
+ // to generate "unexpected EOF" error message
+ if (std::distance(first, last) <= 0)
+ {
+ return parser("").parse();
+ }
+
+ return parser(first, last, cb).parse();
+ }
+
+ /*!
+ @brief deserialize from a container with contiguous storage
+
+ This function reads from a container with contiguous storage of 1-byte
+ values. Compatible container types include `std::vector`, `std::string`,
+ `std::array`, and `std::initializer_list`. User-defined containers can be
+ used as long as they implement random-access iterators and a contiguous
+ storage.
+
+ @pre The container storage is contiguous. Violating this precondition
+ yields undefined behavior. **This precondition is enforced with an
+ assertion.**
+ @pre Each element of the container has a size of 1 byte. Violating this
+ precondition yields undefined behavior. **This precondition is enforced
+ with a static assertion.**
+
+ @warning There is no way to enforce all preconditions at compile-time. If
+ the function is called with a noncompliant container and with
+ assertions switched off, the behavior is undefined and will most
+ likely yield segmentation violation.
+
+ @tparam ContiguousContainer container type with contiguous storage
+ @param[in] c container to read from
+ @param[in] cb a parser callback function of type @ref parser_callback_t
+ which is used to control the deserialization by filtering unwanted values
+ (optional)
+
+ @return result of the deserialization
+
+ @complexity Linear in the length of the input. The parser is a predictive
+ LL(1) parser. The complexity can be higher if the parser callback function
+ @a cb has a super-linear complexity.
+
+ @note A UTF-8 byte order mark is silently ignored.
+
+ @liveexample{The example below demonstrates the `parse()` function reading
+ from a contiguous container.,parse__contiguouscontainer__parser_callback_t}
+
+ @since version 2.0.3
+ */
+ template<class ContiguousContainer, typename std::enable_if<
+ not std::is_pointer<ContiguousContainer>::value and
+ std::is_base_of<
+ std::random_access_iterator_tag,
+ typename std::iterator_traits<decltype(std::begin(std::declval<ContiguousContainer const>()))>::iterator_category>::value
+ , int>::type = 0>
+ static basic_json parse(const ContiguousContainer& c,
+ const parser_callback_t cb = nullptr)
+ {
+ // delegate the call to the iterator-range parse overload
+ return parse(std::begin(c), std::end(c), cb);
+ }
+
+ /*!
+ @brief deserialize from stream
+
+ Deserializes an input stream to a JSON value.
+
+ @param[in,out] i input stream to read a serialized JSON value from
+ @param[in,out] j JSON value to write the deserialized input to
+
+ @throw std::invalid_argument in case of parse errors
+
+ @complexity Linear in the length of the input. The parser is a predictive
+ LL(1) parser.
+
+ @note A UTF-8 byte order mark is silently ignored.
+
+ @liveexample{The example below shows how a JSON value is constructed by
+ reading a serialization from a stream.,operator_deserialize}
+
+ @sa parse(std::istream&, const parser_callback_t) for a variant with a
+ parser callback function to filter values while parsing
+
+ @since version 1.0.0
+ */
+ friend std::istream& operator<<(basic_json& j, std::istream& i)
+ {
+ j = parser(i).parse();
+ return i;
+ }
+
+ /*!
+ @brief deserialize from stream
+ @copydoc operator<<(basic_json&, std::istream&)
+ */
+ friend std::istream& operator>>(std::istream& i, basic_json& j)
+ {
+ j = parser(i).parse();
+ return i;
+ }
+
+ /// @}
+
+ //////////////////////////////////////////
+ // binary serialization/deserialization //
+ //////////////////////////////////////////
+
+ /// @name binary serialization/deserialization support
+ /// @{
+
+ private:
+ /*!
+ @note Some code in the switch cases has been copied, because otherwise
+ copilers would complain about implicit fallthrough and there is no
+ portable attribute to mute such warnings.
+ */
+ template<typename T>
+ static void add_to_vector(std::vector<uint8_t>& vec, size_t bytes, const T number)
+ {
+ assert(bytes == 1 or bytes == 2 or bytes == 4 or bytes == 8);
+
+ switch (bytes)
+ {
+ case 8:
+ {
+ vec.push_back(static_cast<uint8_t>((static_cast<uint64_t>(number) >> 070) & 0xff));
+ vec.push_back(static_cast<uint8_t>((static_cast<uint64_t>(number) >> 060) & 0xff));
+ vec.push_back(static_cast<uint8_t>((static_cast<uint64_t>(number) >> 050) & 0xff));
+ vec.push_back(static_cast<uint8_t>((static_cast<uint64_t>(number) >> 040) & 0xff));
+ vec.push_back(static_cast<uint8_t>((number >> 030) & 0xff));
+ vec.push_back(static_cast<uint8_t>((number >> 020) & 0xff));
+ vec.push_back(static_cast<uint8_t>((number >> 010) & 0xff));
+ vec.push_back(static_cast<uint8_t>(number & 0xff));
+ break;
+ }
+
+ case 4:
+ {
+ vec.push_back(static_cast<uint8_t>((number >> 030) & 0xff));
+ vec.push_back(static_cast<uint8_t>((number >> 020) & 0xff));
+ vec.push_back(static_cast<uint8_t>((number >> 010) & 0xff));
+ vec.push_back(static_cast<uint8_t>(number & 0xff));
+ break;
+ }
+
+ case 2:
+ {
+ vec.push_back(static_cast<uint8_t>((number >> 010) & 0xff));
+ vec.push_back(static_cast<uint8_t>(number & 0xff));
+ break;
+ }
+
+ case 1:
+ {
+ vec.push_back(static_cast<uint8_t>(number & 0xff));
+ break;
+ }
+ }
+ }
+
+ /*!
+ @brief take sufficient bytes from a vector to fill an integer variable
+
+ In the context of binary serialization formats, we need to read several
+ bytes from a byte vector and combine them to multi-byte integral data
+ types.
+
+ @param[in] vec byte vector to read from
+ @param[in] current_index the position in the vector after which to read
+
+ @return the next sizeof(T) bytes from @a vec, in reverse order as T
+
+ @tparam T the integral return type
+
+ @throw std::out_of_range if there are less than sizeof(T)+1 bytes in the
+ vector @a vec to read
+
+ In the for loop, the bytes from the vector are copied in reverse order into
+ the return value. In the figures below, let sizeof(T)=4 and `i` be the loop
+ variable.
+
+ Precondition:
+
+ vec: | | | a | b | c | d | T: | | | | |
+ ^ ^ ^ ^
+ current_index i ptr sizeof(T)
+
+ Postcondition:
+
+ vec: | | | a | b | c | d | T: | d | c | b | a |
+ ^ ^ ^
+ | i ptr
+ current_index
+
+ @sa Code adapted from <http://stackoverflow.com/a/41031865/266378>.
+ */
+ template<typename T>
+ static T get_from_vector(const std::vector<uint8_t>& vec, const size_t current_index)
+ {
+ if (current_index + sizeof(T) + 1 > vec.size())
+ {
+ JSON_THROW(std::out_of_range("cannot read " + std::to_string(sizeof(T)) + " bytes from vector"));
+ }
+
+ T result;
+ auto* ptr = reinterpret_cast<uint8_t*>(&result);
+ for (size_t i = 0; i < sizeof(T); ++i)
+ {
+ *ptr++ = vec[current_index + sizeof(T) - i];
+ }
+ return result;
+ }
+
+ /*!
+ @brief create a MessagePack serialization of a given JSON value
+
+ This is a straightforward implementation of the MessagePack specification.
+
+ @param[in] j JSON value to serialize
+ @param[in,out] v byte vector to write the serialization to
+
+ @sa https://github.com/msgpack/msgpack/blob/master/spec.md
+ */
+ static void to_msgpack_internal(const basic_json& j, std::vector<uint8_t>& v)
+ {
+ switch (j.type())
+ {
+ case value_t::null:
+ {
+ // nil
+ v.push_back(0xc0);
+ break;
+ }
+
+ case value_t::boolean:
+ {
+ // true and false
+ v.push_back(j.m_value.boolean ? 0xc3 : 0xc2);
+ break;
+ }
+
+ case value_t::number_integer:
+ {
+ if (j.m_value.number_integer >= 0)
+ {
+ // MessagePack does not differentiate between positive
+ // signed integers and unsigned integers. Therefore, we
+ // used the code from the value_t::number_unsigned case
+ // here.
+ if (j.m_value.number_unsigned < 128)
+ {
+ // positive fixnum
+ add_to_vector(v, 1, j.m_value.number_unsigned);
+ }
+ else if (j.m_value.number_unsigned <= std::numeric_limits<uint8_t>::max())
+ {
+ // uint 8
+ v.push_back(0xcc);
+ add_to_vector(v, 1, j.m_value.number_unsigned);
+ }
+ else if (j.m_value.number_unsigned <= std::numeric_limits<uint16_t>::max())
+ {
+ // uint 16
+ v.push_back(0xcd);
+ add_to_vector(v, 2, j.m_value.number_unsigned);
+ }
+ else if (j.m_value.number_unsigned <= std::numeric_limits<uint32_t>::max())
+ {
+ // uint 32
+ v.push_back(0xce);
+ add_to_vector(v, 4, j.m_value.number_unsigned);
+ }
+ else if (j.m_value.number_unsigned <= std::numeric_limits<uint64_t>::max())
+ {
+ // uint 64
+ v.push_back(0xcf);
+ add_to_vector(v, 8, j.m_value.number_unsigned);
+ }
+ }
+ else
+ {
+ if (j.m_value.number_integer >= -32)
+ {
+ // negative fixnum
+ add_to_vector(v, 1, j.m_value.number_integer);
+ }
+ else if (j.m_value.number_integer >= std::numeric_limits<int8_t>::min() and j.m_value.number_integer <= std::numeric_limits<int8_t>::max())
+ {
+ // int 8
+ v.push_back(0xd0);
+ add_to_vector(v, 1, j.m_value.number_integer);
+ }
+ else if (j.m_value.number_integer >= std::numeric_limits<int16_t>::min() and j.m_value.number_integer <= std::numeric_limits<int16_t>::max())
+ {
+ // int 16
+ v.push_back(0xd1);
+ add_to_vector(v, 2, j.m_value.number_integer);
+ }
+ else if (j.m_value.number_integer >= std::numeric_limits<int32_t>::min() and j.m_value.number_integer <= std::numeric_limits<int32_t>::max())
+ {
+ // int 32
+ v.push_back(0xd2);
+ add_to_vector(v, 4, j.m_value.number_integer);
+ }
+ else if (j.m_value.number_integer >= std::numeric_limits<int64_t>::min() and j.m_value.number_integer <= std::numeric_limits<int64_t>::max())
+ {
+ // int 64
+ v.push_back(0xd3);
+ add_to_vector(v, 8, j.m_value.number_integer);
+ }
+ }
+ break;
+ }
+
+ case value_t::number_unsigned:
+ {
+ if (j.m_value.number_unsigned < 128)
+ {
+ // positive fixnum
+ add_to_vector(v, 1, j.m_value.number_unsigned);
+ }
+ else if (j.m_value.number_unsigned <= std::numeric_limits<uint8_t>::max())
+ {
+ // uint 8
+ v.push_back(0xcc);
+ add_to_vector(v, 1, j.m_value.number_unsigned);
+ }
+ else if (j.m_value.number_unsigned <= std::numeric_limits<uint16_t>::max())
+ {
+ // uint 16
+ v.push_back(0xcd);
+ add_to_vector(v, 2, j.m_value.number_unsigned);
+ }
+ else if (j.m_value.number_unsigned <= std::numeric_limits<uint32_t>::max())
+ {
+ // uint 32
+ v.push_back(0xce);
+ add_to_vector(v, 4, j.m_value.number_unsigned);
+ }
+ else if (j.m_value.number_unsigned <= std::numeric_limits<uint64_t>::max())
+ {
+ // uint 64
+ v.push_back(0xcf);
+ add_to_vector(v, 8, j.m_value.number_unsigned);
+ }
+ break;
+ }
+
+ case value_t::number_float:
+ {
+ // float 64
+ v.push_back(0xcb);
+ const auto* helper = reinterpret_cast<const uint8_t*>(&(j.m_value.number_float));
+ for (size_t i = 0; i < 8; ++i)
+ {
+ v.push_back(helper[7 - i]);
+ }
+ break;
+ }
+
+ case value_t::string:
+ {
+ const auto N = j.m_value.string->size();
+ if (N <= 31)
+ {
+ // fixstr
+ v.push_back(static_cast<uint8_t>(0xa0 | N));
+ }
+ else if (N <= 255)
+ {
+ // str 8
+ v.push_back(0xd9);
+ add_to_vector(v, 1, N);
+ }
+ else if (N <= 65535)
+ {
+ // str 16
+ v.push_back(0xda);
+ add_to_vector(v, 2, N);
+ }
+ else if (N <= 4294967295)
+ {
+ // str 32
+ v.push_back(0xdb);
+ add_to_vector(v, 4, N);
+ }
+
+ // append string
+ std::copy(j.m_value.string->begin(), j.m_value.string->end(),
+ std::back_inserter(v));
+ break;
+ }
+
+ case value_t::array:
+ {
+ const auto N = j.m_value.array->size();
+ if (N <= 15)
+ {
+ // fixarray
+ v.push_back(static_cast<uint8_t>(0x90 | N));
+ }
+ else if (N <= 0xffff)
+ {
+ // array 16
+ v.push_back(0xdc);
+ add_to_vector(v, 2, N);
+ }
+ else if (N <= 0xffffffff)
+ {
+ // array 32
+ v.push_back(0xdd);
+ add_to_vector(v, 4, N);
+ }
+
+ // append each element
+ for (const auto& el : *j.m_value.array)
+ {
+ to_msgpack_internal(el, v);
+ }
+ break;
+ }
+
+ case value_t::object:
+ {
+ const auto N = j.m_value.object->size();
+ if (N <= 15)
+ {
+ // fixmap
+ v.push_back(static_cast<uint8_t>(0x80 | (N & 0xf)));
+ }
+ else if (N <= 65535)
+ {
+ // map 16
+ v.push_back(0xde);
+ add_to_vector(v, 2, N);
+ }
+ else if (N <= 4294967295)
+ {
+ // map 32
+ v.push_back(0xdf);
+ add_to_vector(v, 4, N);
+ }
+
+ // append each element
+ for (const auto& el : *j.m_value.object)
+ {
+ to_msgpack_internal(el.first, v);
+ to_msgpack_internal(el.second, v);
+ }
+ break;
+ }
+
+ default:
+ {
+ break;
+ }
+ }
+ }
+
+ /*!
+ @brief create a CBOR serialization of a given JSON value
+
+ This is a straightforward implementation of the CBOR specification.
+
+ @param[in] j JSON value to serialize
+ @param[in,out] v byte vector to write the serialization to
+
+ @sa https://tools.ietf.org/html/rfc7049
+ */
+ static void to_cbor_internal(const basic_json& j, std::vector<uint8_t>& v)
+ {
+ switch (j.type())
+ {
+ case value_t::null:
+ {
+ v.push_back(0xf6);
+ break;
+ }
+
+ case value_t::boolean:
+ {
+ v.push_back(j.m_value.boolean ? 0xf5 : 0xf4);
+ break;
+ }
+
+ case value_t::number_integer:
+ {
+ if (j.m_value.number_integer >= 0)
+ {
+ // CBOR does not differentiate between positive signed
+ // integers and unsigned integers. Therefore, we used the
+ // code from the value_t::number_unsigned case here.
+ if (j.m_value.number_integer <= 0x17)
+ {
+ add_to_vector(v, 1, j.m_value.number_integer);
+ }
+ else if (j.m_value.number_integer <= std::numeric_limits<uint8_t>::max())
+ {
+ v.push_back(0x18);
+ // one-byte uint8_t
+ add_to_vector(v, 1, j.m_value.number_integer);
+ }
+ else if (j.m_value.number_integer <= std::numeric_limits<uint16_t>::max())
+ {
+ v.push_back(0x19);
+ // two-byte uint16_t
+ add_to_vector(v, 2, j.m_value.number_integer);
+ }
+ else if (j.m_value.number_integer <= std::numeric_limits<uint32_t>::max())
+ {
+ v.push_back(0x1a);
+ // four-byte uint32_t
+ add_to_vector(v, 4, j.m_value.number_integer);
+ }
+ else
+ {
+ v.push_back(0x1b);
+ // eight-byte uint64_t
+ add_to_vector(v, 8, j.m_value.number_integer);
+ }
+ }
+ else
+ {
+ // The conversions below encode the sign in the first
+ // byte, and the value is converted to a positive number.
+ const auto positive_number = -1 - j.m_value.number_integer;
+ if (j.m_value.number_integer >= -24)
+ {
+ v.push_back(static_cast<uint8_t>(0x20 + positive_number));
+ }
+ else if (positive_number <= std::numeric_limits<uint8_t>::max())
+ {
+ // int 8
+ v.push_back(0x38);
+ add_to_vector(v, 1, positive_number);
+ }
+ else if (positive_number <= std::numeric_limits<uint16_t>::max())
+ {
+ // int 16
+ v.push_back(0x39);
+ add_to_vector(v, 2, positive_number);
+ }
+ else if (positive_number <= std::numeric_limits<uint32_t>::max())
+ {
+ // int 32
+ v.push_back(0x3a);
+ add_to_vector(v, 4, positive_number);
+ }
+ else
+ {
+ // int 64
+ v.push_back(0x3b);
+ add_to_vector(v, 8, positive_number);
+ }
+ }
+ break;
+ }
+
+ case value_t::number_unsigned:
+ {
+ if (j.m_value.number_unsigned <= 0x17)
+ {
+ v.push_back(static_cast<uint8_t>(j.m_value.number_unsigned));
+ }
+ else if (j.m_value.number_unsigned <= 0xff)
+ {
+ v.push_back(0x18);
+ // one-byte uint8_t
+ add_to_vector(v, 1, j.m_value.number_unsigned);
+ }
+ else if (j.m_value.number_unsigned <= 0xffff)
+ {
+ v.push_back(0x19);
+ // two-byte uint16_t
+ add_to_vector(v, 2, j.m_value.number_unsigned);
+ }
+ else if (j.m_value.number_unsigned <= 0xffffffff)
+ {
+ v.push_back(0x1a);
+ // four-byte uint32_t
+ add_to_vector(v, 4, j.m_value.number_unsigned);
+ }
+ else if (j.m_value.number_unsigned <= 0xffffffffffffffff)
+ {
+ v.push_back(0x1b);
+ // eight-byte uint64_t
+ add_to_vector(v, 8, j.m_value.number_unsigned);
+ }
+ break;
+ }
+
+ case value_t::number_float:
+ {
+ // Double-Precision Float
+ v.push_back(0xfb);
+ const auto* helper = reinterpret_cast<const uint8_t*>(&(j.m_value.number_float));
+ for (size_t i = 0; i < 8; ++i)
+ {
+ v.push_back(helper[7 - i]);
+ }
+ break;
+ }
+
+ case value_t::string:
+ {
+ const auto N = j.m_value.string->size();
+ if (N <= 0x17)
+ {
+ v.push_back(0x60 + static_cast<uint8_t>(N)); // 1 byte for string + size
+ }
+ else if (N <= 0xff)
+ {
+ v.push_back(0x78); // one-byte uint8_t for N
+ add_to_vector(v, 1, N);
+ }
+ else if (N <= 0xffff)
+ {
+ v.push_back(0x79); // two-byte uint16_t for N
+ add_to_vector(v, 2, N);
+ }
+ else if (N <= 0xffffffff)
+ {
+ v.push_back(0x7a); // four-byte uint32_t for N
+ add_to_vector(v, 4, N);
+ }
+ // LCOV_EXCL_START
+ else if (N <= 0xffffffffffffffff)
+ {
+ v.push_back(0x7b); // eight-byte uint64_t for N
+ add_to_vector(v, 8, N);
+ }
+ // LCOV_EXCL_STOP
+
+ // append string
+ std::copy(j.m_value.string->begin(), j.m_value.string->end(),
+ std::back_inserter(v));
+ break;
+ }
+
+ case value_t::array:
+ {
+ const auto N = j.m_value.array->size();
+ if (N <= 0x17)
+ {
+ v.push_back(0x80 + static_cast<uint8_t>(N)); // 1 byte for array + size
+ }
+ else if (N <= 0xff)
+ {
+ v.push_back(0x98); // one-byte uint8_t for N
+ add_to_vector(v, 1, N);
+ }
+ else if (N <= 0xffff)
+ {
+ v.push_back(0x99); // two-byte uint16_t for N
+ add_to_vector(v, 2, N);
+ }
+ else if (N <= 0xffffffff)
+ {
+ v.push_back(0x9a); // four-byte uint32_t for N
+ add_to_vector(v, 4, N);
+ }
+ // LCOV_EXCL_START
+ else if (N <= 0xffffffffffffffff)
+ {
+ v.push_back(0x9b); // eight-byte uint64_t for N
+ add_to_vector(v, 8, N);
+ }
+ // LCOV_EXCL_STOP
+
+ // append each element
+ for (const auto& el : *j.m_value.array)
+ {
+ to_cbor_internal(el, v);
+ }
+ break;
+ }
+
+ case value_t::object:
+ {
+ const auto N = j.m_value.object->size();
+ if (N <= 0x17)
+ {
+ v.push_back(0xa0 + static_cast<uint8_t>(N)); // 1 byte for object + size
+ }
+ else if (N <= 0xff)
+ {
+ v.push_back(0xb8);
+ add_to_vector(v, 1, N); // one-byte uint8_t for N
+ }
+ else if (N <= 0xffff)
+ {
+ v.push_back(0xb9);
+ add_to_vector(v, 2, N); // two-byte uint16_t for N
+ }
+ else if (N <= 0xffffffff)
+ {
+ v.push_back(0xba);
+ add_to_vector(v, 4, N); // four-byte uint32_t for N
+ }
+ // LCOV_EXCL_START
+ else if (N <= 0xffffffffffffffff)
+ {
+ v.push_back(0xbb);
+ add_to_vector(v, 8, N); // eight-byte uint64_t for N
+ }
+ // LCOV_EXCL_STOP
+
+ // append each element
+ for (const auto& el : *j.m_value.object)
+ {
+ to_cbor_internal(el.first, v);
+ to_cbor_internal(el.second, v);
+ }
+ break;
+ }
+
+ default:
+ {
+ break;
+ }
+ }
+ }
+
+
+ /*
+ @brief checks if given lengths do not exceed the size of a given vector
+
+ To secure the access to the byte vector during CBOR/MessagePack
+ deserialization, bytes are copied from the vector into buffers. This
+ function checks if the number of bytes to copy (@a len) does not exceed
+ the size @s size of the vector. Additionally, an @a offset is given from
+ where to start reading the bytes.
+
+ This function checks whether reading the bytes is safe; that is, offset is
+ a valid index in the vector, offset+len
+
+ @param[in] size size of the byte vector
+ @param[in] len number of bytes to read
+ @param[in] offset offset where to start reading
+
+ vec: x x x x x X X X X X
+ ^ ^ ^
+ 0 offset len
+
+ @throws out_of_range if `len > v.size()`
+ */
+ static void check_length(const size_t size, const size_t len, const size_t offset)
+ {
+ // simple case: requested length is greater than the vector's length
+ if (len > size or offset > size)
+ {
+ JSON_THROW(std::out_of_range("len out of range"));
+ }
+
+ // second case: adding offset would result in overflow
+ if ((size > (std::numeric_limits<size_t>::max() - offset)))
+ {
+ JSON_THROW(std::out_of_range("len+offset out of range"));
+ }
+
+ // last case: reading past the end of the vector
+ if (len + offset > size)
+ {
+ JSON_THROW(std::out_of_range("len+offset out of range"));
+ }
+ }
+
+ /*!
+ @brief create a JSON value from a given MessagePack vector
+
+ @param[in] v MessagePack serialization
+ @param[in] idx byte index to start reading from @a v
+
+ @return deserialized JSON value
+
+ @throw std::invalid_argument if unsupported features from MessagePack were
+ used in the given vector @a v or if the input is not valid MessagePack
+ @throw std::out_of_range if the given vector ends prematurely
+
+ @sa https://github.com/msgpack/msgpack/blob/master/spec.md
+ */
+ static basic_json from_msgpack_internal(const std::vector<uint8_t>& v, size_t& idx)
+ {
+ // make sure reading 1 byte is safe
+ check_length(v.size(), 1, idx);
+
+ // store and increment index
+ const size_t current_idx = idx++;
+
+ if (v[current_idx] <= 0xbf)
+ {
+ if (v[current_idx] <= 0x7f) // positive fixint
+ {
+ return v[current_idx];
+ }
+ if (v[current_idx] <= 0x8f) // fixmap
+ {
+ basic_json result = value_t::object;
+ const size_t len = v[current_idx] & 0x0f;
+ for (size_t i = 0; i < len; ++i)
+ {
+ std::string key = from_msgpack_internal(v, idx);
+ result[key] = from_msgpack_internal(v, idx);
+ }
+ return result;
+ }
+ else if (v[current_idx] <= 0x9f) // fixarray
+ {
+ basic_json result = value_t::array;
+ const size_t len = v[current_idx] & 0x0f;
+ for (size_t i = 0; i < len; ++i)
+ {
+ result.push_back(from_msgpack_internal(v, idx));
+ }
+ return result;
+ }
+ else // fixstr
+ {
+ const size_t len = v[current_idx] & 0x1f;
+ const size_t offset = current_idx + 1;
+ idx += len; // skip content bytes
+ check_length(v.size(), len, offset);
+ return std::string(reinterpret_cast<const char*>(v.data()) + offset, len);
+ }
+ }
+ else if (v[current_idx] >= 0xe0) // negative fixint
+ {
+ return static_cast<int8_t>(v[current_idx]);
+ }
+ else
+ {
+ switch (v[current_idx])
+ {
+ case 0xc0: // nil
+ {
+ return value_t::null;
+ }
+
+ case 0xc2: // false
+ {
+ return false;
+ }
+
+ case 0xc3: // true
+ {
+ return true;
+ }
+
+ case 0xca: // float 32
+ {
+ // copy bytes in reverse order into the double variable
+ float res;
+ for (size_t byte = 0; byte < sizeof(float); ++byte)
+ {
+ reinterpret_cast<uint8_t*>(&res)[sizeof(float) - byte - 1] = v.at(current_idx + 1 + byte);
+ }
+ idx += sizeof(float); // skip content bytes
+ return res;
+ }
+
+ case 0xcb: // float 64
+ {
+ // copy bytes in reverse order into the double variable
+ double res;
+ for (size_t byte = 0; byte < sizeof(double); ++byte)
+ {
+ reinterpret_cast<uint8_t*>(&res)[sizeof(double) - byte - 1] = v.at(current_idx + 1 + byte);
+ }
+ idx += sizeof(double); // skip content bytes
+ return res;
+ }
+
+ case 0xcc: // uint 8
+ {
+ idx += 1; // skip content byte
+ return get_from_vector<uint8_t>(v, current_idx);
+ }
+
+ case 0xcd: // uint 16
+ {
+ idx += 2; // skip 2 content bytes
+ return get_from_vector<uint16_t>(v, current_idx);
+ }
+
+ case 0xce: // uint 32
+ {
+ idx += 4; // skip 4 content bytes
+ return get_from_vector<uint32_t>(v, current_idx);
+ }
+
+ case 0xcf: // uint 64
+ {
+ idx += 8; // skip 8 content bytes
+ return get_from_vector<uint64_t>(v, current_idx);
+ }
+
+ case 0xd0: // int 8
+ {
+ idx += 1; // skip content byte
+ return get_from_vector<int8_t>(v, current_idx);
+ }
+
+ case 0xd1: // int 16
+ {
+ idx += 2; // skip 2 content bytes
+ return get_from_vector<int16_t>(v, current_idx);
+ }
+
+ case 0xd2: // int 32
+ {
+ idx += 4; // skip 4 content bytes
+ return get_from_vector<int32_t>(v, current_idx);
+ }
+
+ case 0xd3: // int 64
+ {
+ idx += 8; // skip 8 content bytes
+ return get_from_vector<int64_t>(v, current_idx);
+ }
+
+ case 0xd9: // str 8
+ {
+ const auto len = static_cast<size_t>(get_from_vector<uint8_t>(v, current_idx));
+ const size_t offset = current_idx + 2;
+ idx += len + 1; // skip size byte + content bytes
+ check_length(v.size(), len, offset);
+ return std::string(reinterpret_cast<const char*>(v.data()) + offset, len);
+ }
+
+ case 0xda: // str 16
+ {
+ const auto len = static_cast<size_t>(get_from_vector<uint16_t>(v, current_idx));
+ const size_t offset = current_idx + 3;
+ idx += len + 2; // skip 2 size bytes + content bytes
+ check_length(v.size(), len, offset);
+ return std::string(reinterpret_cast<const char*>(v.data()) + offset, len);
+ }
+
+ case 0xdb: // str 32
+ {
+ const auto len = static_cast<size_t>(get_from_vector<uint32_t>(v, current_idx));
+ const size_t offset = current_idx + 5;
+ idx += len + 4; // skip 4 size bytes + content bytes
+ check_length(v.size(), len, offset);
+ return std::string(reinterpret_cast<const char*>(v.data()) + offset, len);
+ }
+
+ case 0xdc: // array 16
+ {
+ basic_json result = value_t::array;
+ const auto len = static_cast<size_t>(get_from_vector<uint16_t>(v, current_idx));
+ idx += 2; // skip 2 size bytes
+ for (size_t i = 0; i < len; ++i)
+ {
+ result.push_back(from_msgpack_internal(v, idx));
+ }
+ return result;
+ }
+
+ case 0xdd: // array 32
+ {
+ basic_json result = value_t::array;
+ const auto len = static_cast<size_t>(get_from_vector<uint32_t>(v, current_idx));
+ idx += 4; // skip 4 size bytes
+ for (size_t i = 0; i < len; ++i)
+ {
+ result.push_back(from_msgpack_internal(v, idx));
+ }
+ return result;
+ }
+
+ case 0xde: // map 16
+ {
+ basic_json result = value_t::object;
+ const auto len = static_cast<size_t>(get_from_vector<uint16_t>(v, current_idx));
+ idx += 2; // skip 2 size bytes
+ for (size_t i = 0; i < len; ++i)
+ {
+ std::string key = from_msgpack_internal(v, idx);
+ result[key] = from_msgpack_internal(v, idx);
+ }
+ return result;
+ }
+
+ case 0xdf: // map 32
+ {
+ basic_json result = value_t::object;
+ const auto len = static_cast<size_t>(get_from_vector<uint32_t>(v, current_idx));
+ idx += 4; // skip 4 size bytes
+ for (size_t i = 0; i < len; ++i)
+ {
+ std::string key = from_msgpack_internal(v, idx);
+ result[key] = from_msgpack_internal(v, idx);
+ }
+ return result;
+ }
+
+ default:
+ {
+ JSON_THROW(std::invalid_argument("error parsing a msgpack @ " + std::to_string(current_idx) + ": " + std::to_string(static_cast<int>(v[current_idx]))));
+ }
+ }
+ }
+ }
+
+ /*!
+ @brief create a JSON value from a given CBOR vector
+
+ @param[in] v CBOR serialization
+ @param[in] idx byte index to start reading from @a v
+
+ @return deserialized JSON value
+
+ @throw std::invalid_argument if unsupported features from CBOR were used in
+ the given vector @a v or if the input is not valid CBOR
+ @throw std::out_of_range if the given vector ends prematurely
+
+ @sa https://tools.ietf.org/html/rfc7049
+ */
+ static basic_json from_cbor_internal(const std::vector<uint8_t>& v, size_t& idx)
+ {
+ // store and increment index
+ const size_t current_idx = idx++;
+
+ switch (v.at(current_idx))
+ {
+ // Integer 0x00..0x17 (0..23)
+ case 0x00:
+ case 0x01:
+ case 0x02:
+ case 0x03:
+ case 0x04:
+ case 0x05:
+ case 0x06:
+ case 0x07:
+ case 0x08:
+ case 0x09:
+ case 0x0a:
+ case 0x0b:
+ case 0x0c:
+ case 0x0d:
+ case 0x0e:
+ case 0x0f:
+ case 0x10:
+ case 0x11:
+ case 0x12:
+ case 0x13:
+ case 0x14:
+ case 0x15:
+ case 0x16:
+ case 0x17:
+ {
+ return v[current_idx];
+ }
+
+ case 0x18: // Unsigned integer (one-byte uint8_t follows)
+ {
+ idx += 1; // skip content byte
+ return get_from_vector<uint8_t>(v, current_idx);
+ }
+
+ case 0x19: // Unsigned integer (two-byte uint16_t follows)
+ {
+ idx += 2; // skip 2 content bytes
+ return get_from_vector<uint16_t>(v, current_idx);
+ }
+
+ case 0x1a: // Unsigned integer (four-byte uint32_t follows)
+ {
+ idx += 4; // skip 4 content bytes
+ return get_from_vector<uint32_t>(v, current_idx);
+ }
+
+ case 0x1b: // Unsigned integer (eight-byte uint64_t follows)
+ {
+ idx += 8; // skip 8 content bytes
+ return get_from_vector<uint64_t>(v, current_idx);
+ }
+
+ // Negative integer -1-0x00..-1-0x17 (-1..-24)
+ case 0x20:
+ case 0x21:
+ case 0x22:
+ case 0x23:
+ case 0x24:
+ case 0x25:
+ case 0x26:
+ case 0x27:
+ case 0x28:
+ case 0x29:
+ case 0x2a:
+ case 0x2b:
+ case 0x2c:
+ case 0x2d:
+ case 0x2e:
+ case 0x2f:
+ case 0x30:
+ case 0x31:
+ case 0x32:
+ case 0x33:
+ case 0x34:
+ case 0x35:
+ case 0x36:
+ case 0x37:
+ {
+ return static_cast<int8_t>(0x20 - 1 - v[current_idx]);
+ }
+
+ case 0x38: // Negative integer (one-byte uint8_t follows)
+ {
+ idx += 1; // skip content byte
+ // must be uint8_t !
+ return static_cast<number_integer_t>(-1) - get_from_vector<uint8_t>(v, current_idx);
+ }
+
+ case 0x39: // Negative integer -1-n (two-byte uint16_t follows)
+ {
+ idx += 2; // skip 2 content bytes
+ return static_cast<number_integer_t>(-1) - get_from_vector<uint16_t>(v, current_idx);
+ }
+
+ case 0x3a: // Negative integer -1-n (four-byte uint32_t follows)
+ {
+ idx += 4; // skip 4 content bytes
+ return static_cast<number_integer_t>(-1) - get_from_vector<uint32_t>(v, current_idx);
+ }
+
+ case 0x3b: // Negative integer -1-n (eight-byte uint64_t follows)
+ {
+ idx += 8; // skip 8 content bytes
+ return static_cast<number_integer_t>(-1) - static_cast<number_integer_t>(get_from_vector<uint64_t>(v, current_idx));
+ }
+
+ // UTF-8 string (0x00..0x17 bytes follow)
+ case 0x60:
+ case 0x61:
+ case 0x62:
+ case 0x63:
+ case 0x64:
+ case 0x65:
+ case 0x66:
+ case 0x67:
+ case 0x68:
+ case 0x69:
+ case 0x6a:
+ case 0x6b:
+ case 0x6c:
+ case 0x6d:
+ case 0x6e:
+ case 0x6f:
+ case 0x70:
+ case 0x71:
+ case 0x72:
+ case 0x73:
+ case 0x74:
+ case 0x75:
+ case 0x76:
+ case 0x77:
+ {
+ const auto len = static_cast<size_t>(v[current_idx] - 0x60);
+ const size_t offset = current_idx + 1;
+ idx += len; // skip content bytes
+ check_length(v.size(), len, offset);
+ return std::string(reinterpret_cast<const char*>(v.data()) + offset, len);
+ }
+
+ case 0x78: // UTF-8 string (one-byte uint8_t for n follows)
+ {
+ const auto len = static_cast<size_t>(get_from_vector<uint8_t>(v, current_idx));
+ const size_t offset = current_idx + 2;
+ idx += len + 1; // skip size byte + content bytes
+ check_length(v.size(), len, offset);
+ return std::string(reinterpret_cast<const char*>(v.data()) + offset, len);
+ }
+
+ case 0x79: // UTF-8 string (two-byte uint16_t for n follow)
+ {
+ const auto len = static_cast<size_t>(get_from_vector<uint16_t>(v, current_idx));
+ const size_t offset = current_idx + 3;
+ idx += len + 2; // skip 2 size bytes + content bytes
+ check_length(v.size(), len, offset);
+ return std::string(reinterpret_cast<const char*>(v.data()) + offset, len);
+ }
+
+ case 0x7a: // UTF-8 string (four-byte uint32_t for n follow)
+ {
+ const auto len = static_cast<size_t>(get_from_vector<uint32_t>(v, current_idx));
+ const size_t offset = current_idx + 5;
+ idx += len + 4; // skip 4 size bytes + content bytes
+ check_length(v.size(), len, offset);
+ return std::string(reinterpret_cast<const char*>(v.data()) + offset, len);
+ }
+
+ case 0x7b: // UTF-8 string (eight-byte uint64_t for n follow)
+ {
+ const auto len = static_cast<size_t>(get_from_vector<uint64_t>(v, current_idx));
+ const size_t offset = current_idx + 9;
+ idx += len + 8; // skip 8 size bytes + content bytes
+ check_length(v.size(), len, offset);
+ return std::string(reinterpret_cast<const char*>(v.data()) + offset, len);
+ }
+
+ case 0x7f: // UTF-8 string (indefinite length)
+ {
+ std::string result;
+ while (v.at(idx) != 0xff)
+ {
+ string_t s = from_cbor_internal(v, idx);
+ result += s;
+ }
+ // skip break byte (0xFF)
+ idx += 1;
+ return result;
+ }
+
+ // array (0x00..0x17 data items follow)
+ case 0x80:
+ case 0x81:
+ case 0x82:
+ case 0x83:
+ case 0x84:
+ case 0x85:
+ case 0x86:
+ case 0x87:
+ case 0x88:
+ case 0x89:
+ case 0x8a:
+ case 0x8b:
+ case 0x8c:
+ case 0x8d:
+ case 0x8e:
+ case 0x8f:
+ case 0x90:
+ case 0x91:
+ case 0x92:
+ case 0x93:
+ case 0x94:
+ case 0x95:
+ case 0x96:
+ case 0x97:
+ {
+ basic_json result = value_t::array;
+ const auto len = static_cast<size_t>(v[current_idx] - 0x80);
+ for (size_t i = 0; i < len; ++i)
+ {
+ result.push_back(from_cbor_internal(v, idx));
+ }
+ return result;
+ }
+
+ case 0x98: // array (one-byte uint8_t for n follows)
+ {
+ basic_json result = value_t::array;
+ const auto len = static_cast<size_t>(get_from_vector<uint8_t>(v, current_idx));
+ idx += 1; // skip 1 size byte
+ for (size_t i = 0; i < len; ++i)
+ {
+ result.push_back(from_cbor_internal(v, idx));
+ }
+ return result;
+ }
+
+ case 0x99: // array (two-byte uint16_t for n follow)
+ {
+ basic_json result = value_t::array;
+ const auto len = static_cast<size_t>(get_from_vector<uint16_t>(v, current_idx));
+ idx += 2; // skip 4 size bytes
+ for (size_t i = 0; i < len; ++i)
+ {
+ result.push_back(from_cbor_internal(v, idx));
+ }
+ return result;
+ }
+
+ case 0x9a: // array (four-byte uint32_t for n follow)
+ {
+ basic_json result = value_t::array;
+ const auto len = static_cast<size_t>(get_from_vector<uint32_t>(v, current_idx));
+ idx += 4; // skip 4 size bytes
+ for (size_t i = 0; i < len; ++i)
+ {
+ result.push_back(from_cbor_internal(v, idx));
+ }
+ return result;
+ }
+
+ case 0x9b: // array (eight-byte uint64_t for n follow)
+ {
+ basic_json result = value_t::array;
+ const auto len = static_cast<size_t>(get_from_vector<uint64_t>(v, current_idx));
+ idx += 8; // skip 8 size bytes
+ for (size_t i = 0; i < len; ++i)
+ {
+ result.push_back(from_cbor_internal(v, idx));
+ }
+ return result;
+ }
+
+ case 0x9f: // array (indefinite length)
+ {
+ basic_json result = value_t::array;
+ while (v.at(idx) != 0xff)
+ {
+ result.push_back(from_cbor_internal(v, idx));
+ }
+ // skip break byte (0xFF)
+ idx += 1;
+ return result;
+ }
+
+ // map (0x00..0x17 pairs of data items follow)
+ case 0xa0:
+ case 0xa1:
+ case 0xa2:
+ case 0xa3:
+ case 0xa4:
+ case 0xa5:
+ case 0xa6:
+ case 0xa7:
+ case 0xa8:
+ case 0xa9:
+ case 0xaa:
+ case 0xab:
+ case 0xac:
+ case 0xad:
+ case 0xae:
+ case 0xaf:
+ case 0xb0:
+ case 0xb1:
+ case 0xb2:
+ case 0xb3:
+ case 0xb4:
+ case 0xb5:
+ case 0xb6:
+ case 0xb7:
+ {
+ basic_json result = value_t::object;
+ const auto len = static_cast<size_t>(v[current_idx] - 0xa0);
+ for (size_t i = 0; i < len; ++i)
+ {
+ std::string key = from_cbor_internal(v, idx);
+ result[key] = from_cbor_internal(v, idx);
+ }
+ return result;
+ }
+
+ case 0xb8: // map (one-byte uint8_t for n follows)
+ {
+ basic_json result = value_t::object;
+ const auto len = static_cast<size_t>(get_from_vector<uint8_t>(v, current_idx));
+ idx += 1; // skip 1 size byte
+ for (size_t i = 0; i < len; ++i)
+ {
+ std::string key = from_cbor_internal(v, idx);
+ result[key] = from_cbor_internal(v, idx);
+ }
+ return result;
+ }
+
+ case 0xb9: // map (two-byte uint16_t for n follow)
+ {
+ basic_json result = value_t::object;
+ const auto len = static_cast<size_t>(get_from_vector<uint16_t>(v, current_idx));
+ idx += 2; // skip 2 size bytes
+ for (size_t i = 0; i < len; ++i)
+ {
+ std::string key = from_cbor_internal(v, idx);
+ result[key] = from_cbor_internal(v, idx);
+ }
+ return result;
+ }
+
+ case 0xba: // map (four-byte uint32_t for n follow)
+ {
+ basic_json result = value_t::object;
+ const auto len = static_cast<size_t>(get_from_vector<uint32_t>(v, current_idx));
+ idx += 4; // skip 4 size bytes
+ for (size_t i = 0; i < len; ++i)
+ {
+ std::string key = from_cbor_internal(v, idx);
+ result[key] = from_cbor_internal(v, idx);
+ }
+ return result;
+ }
+
+ case 0xbb: // map (eight-byte uint64_t for n follow)
+ {
+ basic_json result = value_t::object;
+ const auto len = static_cast<size_t>(get_from_vector<uint64_t>(v, current_idx));
+ idx += 8; // skip 8 size bytes
+ for (size_t i = 0; i < len; ++i)
+ {
+ std::string key = from_cbor_internal(v, idx);
+ result[key] = from_cbor_internal(v, idx);
+ }
+ return result;
+ }
+
+ case 0xbf: // map (indefinite length)
+ {
+ basic_json result = value_t::object;
+ while (v.at(idx) != 0xff)
+ {
+ std::string key = from_cbor_internal(v, idx);
+ result[key] = from_cbor_internal(v, idx);
+ }
+ // skip break byte (0xFF)
+ idx += 1;
+ return result;
+ }
+
+ case 0xf4: // false
+ {
+ return false;
+ }
+
+ case 0xf5: // true
+ {
+ return true;
+ }
+
+ case 0xf6: // null
+ {
+ return value_t::null;
+ }
+
+ case 0xf9: // Half-Precision Float (two-byte IEEE 754)
+ {
+ idx += 2; // skip two content bytes
+
+ // code from RFC 7049, Appendix D, Figure 3:
+ // As half-precision floating-point numbers were only added to
+ // IEEE 754 in 2008, today's programming platforms often still
+ // only have limited support for them. It is very easy to
+ // include at least decoding support for them even without such
+ // support. An example of a small decoder for half-precision
+ // floating-point numbers in the C language is shown in Fig. 3.
+ const int half = (v.at(current_idx + 1) << 8) + v.at(current_idx + 2);
+ const int exp = (half >> 10) & 0x1f;
+ const int mant = half & 0x3ff;
+ double val;
+ if (exp == 0)
+ {
+ val = std::ldexp(mant, -24);
+ }
+ else if (exp != 31)
+ {
+ val = std::ldexp(mant + 1024, exp - 25);
+ }
+ else
+ {
+ val = mant == 0
+ ? std::numeric_limits<double>::infinity()
+ : std::numeric_limits<double>::quiet_NaN();
+ }
+ return (half & 0x8000) != 0 ? -val : val;
+ }
+
+ case 0xfa: // Single-Precision Float (four-byte IEEE 754)
+ {
+ // copy bytes in reverse order into the float variable
+ float res;
+ for (size_t byte = 0; byte < sizeof(float); ++byte)
+ {
+ reinterpret_cast<uint8_t*>(&res)[sizeof(float) - byte - 1] = v.at(current_idx + 1 + byte);
+ }
+ idx += sizeof(float); // skip content bytes
+ return res;
+ }
+
+ case 0xfb: // Double-Precision Float (eight-byte IEEE 754)
+ {
+ // copy bytes in reverse order into the double variable
+ double res;
+ for (size_t byte = 0; byte < sizeof(double); ++byte)
+ {
+ reinterpret_cast<uint8_t*>(&res)[sizeof(double) - byte - 1] = v.at(current_idx + 1 + byte);
+ }
+ idx += sizeof(double); // skip content bytes
+ return res;
+ }
+
+ default: // anything else (0xFF is handled inside the other types)
+ {
+ JSON_THROW(std::invalid_argument("error parsing a CBOR @ " + std::to_string(current_idx) + ": " + std::to_string(static_cast<int>(v[current_idx]))));
+ }
+ }
+ }
+
+ public:
+ /*!
+ @brief create a MessagePack serialization of a given JSON value
+
+ Serializes a given JSON value @a j to a byte vector using the MessagePack
+ serialization format. MessagePack is a binary serialization format which
+ aims to be more compact than JSON itself, yet more efficient to parse.
+
+ @param[in] j JSON value to serialize
+ @return MessagePack serialization as byte vector
+
+ @complexity Linear in the size of the JSON value @a j.
+
+ @liveexample{The example shows the serialization of a JSON value to a byte
+ vector in MessagePack format.,to_msgpack}
+
+ @sa http://msgpack.org
+ @sa @ref from_msgpack(const std::vector<uint8_t>&, const size_t) for the
+ analogous deserialization
+ @sa @ref to_cbor(const basic_json& for the related CBOR format
+
+ @since version 2.0.9
+ */
+ static std::vector<uint8_t> to_msgpack(const basic_json& j)
+ {
+ std::vector<uint8_t> result;
+ to_msgpack_internal(j, result);
+ return result;
+ }
+
+ /*!
+ @brief create a JSON value from a byte vector in MessagePack format
+
+ Deserializes a given byte vector @a v to a JSON value using the MessagePack
+ serialization format.
+
+ @param[in] v a byte vector in MessagePack format
+ @param[in] start_index the index to start reading from @a v (0 by default)
+ @return deserialized JSON value
+
+ @throw std::invalid_argument if unsupported features from MessagePack were
+ used in the given vector @a v or if the input is not valid MessagePack
+ @throw std::out_of_range if the given vector ends prematurely
+
+ @complexity Linear in the size of the byte vector @a v.
+
+ @liveexample{The example shows the deserialization of a byte vector in
+ MessagePack format to a JSON value.,from_msgpack}
+
+ @sa http://msgpack.org
+ @sa @ref to_msgpack(const basic_json&) for the analogous serialization
+ @sa @ref from_cbor(const std::vector<uint8_t>&, const size_t) for the
+ related CBOR format
+
+ @since version 2.0.9, parameter @a start_index since 2.1.1
+ */
+ static basic_json from_msgpack(const std::vector<uint8_t>& v,
+ const size_t start_index = 0)
+ {
+ size_t i = start_index;
+ return from_msgpack_internal(v, i);
+ }
+
+ /*!
+ @brief create a MessagePack serialization of a given JSON value
+
+ Serializes a given JSON value @a j to a byte vector using the CBOR (Concise
+ Binary Object Representation) serialization format. CBOR is a binary
+ serialization format which aims to be more compact than JSON itself, yet
+ more efficient to parse.
+
+ @param[in] j JSON value to serialize
+ @return MessagePack serialization as byte vector
+
+ @complexity Linear in the size of the JSON value @a j.
+
+ @liveexample{The example shows the serialization of a JSON value to a byte
+ vector in CBOR format.,to_cbor}
+
+ @sa http://cbor.io
+ @sa @ref from_cbor(const std::vector<uint8_t>&, const size_t) for the
+ analogous deserialization
+ @sa @ref to_msgpack(const basic_json& for the related MessagePack format
+
+ @since version 2.0.9
+ */
+ static std::vector<uint8_t> to_cbor(const basic_json& j)
+ {
+ std::vector<uint8_t> result;
+ to_cbor_internal(j, result);
+ return result;
+ }
+
+ /*!
+ @brief create a JSON value from a byte vector in CBOR format
+
+ Deserializes a given byte vector @a v to a JSON value using the CBOR
+ (Concise Binary Object Representation) serialization format.
+
+ @param[in] v a byte vector in CBOR format
+ @param[in] start_index the index to start reading from @a v (0 by default)
+ @return deserialized JSON value
+
+ @throw std::invalid_argument if unsupported features from CBOR were used in
+ the given vector @a v or if the input is not valid MessagePack
+ @throw std::out_of_range if the given vector ends prematurely
+
+ @complexity Linear in the size of the byte vector @a v.
+
+ @liveexample{The example shows the deserialization of a byte vector in CBOR
+ format to a JSON value.,from_cbor}
+
+ @sa http://cbor.io
+ @sa @ref to_cbor(const basic_json&) for the analogous serialization
+ @sa @ref from_msgpack(const std::vector<uint8_t>&, const size_t) for the
+ related MessagePack format
+
+ @since version 2.0.9, parameter @a start_index since 2.1.1
+ */
+ static basic_json from_cbor(const std::vector<uint8_t>& v,
+ const size_t start_index = 0)
+ {
+ size_t i = start_index;
+ return from_cbor_internal(v, i);
+ }
+
+ /// @}
+
+ ///////////////////////////
+ // convenience functions //
+ ///////////////////////////
+
+ /*!
+ @brief return the type as string
+
+ Returns the type name as string to be used in error messages - usually to
+ indicate that a function was called on a wrong JSON type.
+
+ @return basically a string representation of a the @a m_type member
+
+ @complexity Constant.
+
+ @liveexample{The following code exemplifies `type_name()` for all JSON
+ types.,type_name}
+
+ @since version 1.0.0, public since 2.1.0
+ */
+ std::string type_name() const
+ {
+ {
+ switch (m_type)
+ {
+ case value_t::null:
+ return "null";
+ case value_t::object:
+ return "object";
+ case value_t::array:
+ return "array";
+ case value_t::string:
+ return "string";
+ case value_t::boolean:
+ return "boolean";
+ case value_t::discarded:
+ return "discarded";
+ default:
+ return "number";
+ }
+ }
+ }
+
+ private:
+ /*!
+ @brief calculates the extra space to escape a JSON string
+
+ @param[in] s the string to escape
+ @return the number of characters required to escape string @a s
+
+ @complexity Linear in the length of string @a s.
+ */
+ static std::size_t extra_space(const string_t& s) noexcept
+ {
+ return std::accumulate(s.begin(), s.end(), size_t{},
+ [](size_t res, typename string_t::value_type c)
+ {
+ switch (c)
+ {
+ case '"':
+ case '\\':
+ case '\b':
+ case '\f':
+ case '\n':
+ case '\r':
+ case '\t':
+ {
+ // from c (1 byte) to \x (2 bytes)
+ return res + 1;
+ }
+
+ default:
+ {
+ if (c >= 0x00 and c <= 0x1f)
+ {
+ // from c (1 byte) to \uxxxx (6 bytes)
+ return res + 5;
+ }
+
+ return res;
+ }
+ }
+ });
+ }
+
+ /*!
+ @brief escape a string
+
+ Escape a string by replacing certain special characters by a sequence of
+ an escape character (backslash) and another character and other control
+ characters by a sequence of "\u" followed by a four-digit hex
+ representation.
+
+ @param[in] s the string to escape
+ @return the escaped string
+
+ @complexity Linear in the length of string @a s.
+ */
+ static string_t escape_string(const string_t& s)
+ {
+ const auto space = extra_space(s);
+ if (space == 0)
+ {
+ return s;
+ }
+
+ // create a result string of necessary size
+ string_t result(s.size() + space, '\\');
+ std::size_t pos = 0;
+
+ for (const auto& c : s)
+ {
+ switch (c)
+ {
+ // quotation mark (0x22)
+ case '"':
+ {
+ result[pos + 1] = '"';
+ pos += 2;
+ break;
+ }
+
+ // reverse solidus (0x5c)
+ case '\\':
+ {
+ // nothing to change
+ pos += 2;
+ break;
+ }
+
+ // backspace (0x08)
+ case '\b':
+ {
+ result[pos + 1] = 'b';
+ pos += 2;
+ break;
+ }
+
+ // formfeed (0x0c)
+ case '\f':
+ {
+ result[pos + 1] = 'f';
+ pos += 2;
+ break;
+ }
+
+ // newline (0x0a)
+ case '\n':
+ {
+ result[pos + 1] = 'n';
+ pos += 2;
+ break;
+ }
+
+ // carriage return (0x0d)
+ case '\r':
+ {
+ result[pos + 1] = 'r';
+ pos += 2;
+ break;
+ }
+
+ // horizontal tab (0x09)
+ case '\t':
+ {
+ result[pos + 1] = 't';
+ pos += 2;
+ break;
+ }
+
+ default:
+ {
+ if (c >= 0x00 and c <= 0x1f)
+ {
+ // convert a number 0..15 to its hex representation
+ // (0..f)
+ static const char hexify[16] =
+ {
+ '0', '1', '2', '3', '4', '5', '6', '7',
+ '8', '9', 'a', 'b', 'c', 'd', 'e', 'f'
+ };
+
+ // print character c as \uxxxx
+ for (const char m :
+ { 'u', '0', '0', hexify[c >> 4], hexify[c & 0x0f]
+ })
+ {
+ result[++pos] = m;
+ }
+
+ ++pos;
+ }
+ else
+ {
+ // all other characters are added as-is
+ result[pos++] = c;
+ }
+ break;
+ }
+ }
+ }
+
+ return result;
+ }
+
+
+ /*!
+ @brief locale-independent serialization for built-in arithmetic types
+ */
+ struct numtostr
+ {
+ public:
+ template<typename NumberType>
+ numtostr(NumberType value)
+ {
+ x_write(value, std::is_integral<NumberType>());
+ }
+
+ const char* c_str() const
+ {
+ return m_buf.data();
+ }
+
+ private:
+ /// a (hopefully) large enough character buffer
+ std::array < char, 64 > m_buf{{}};
+
+ template<typename NumberType>
+ void x_write(NumberType x, /*is_integral=*/std::true_type)
+ {
+ // special case for "0"
+ if (x == 0)
+ {
+ m_buf[0] = '0';
+ return;
+ }
+
+ const bool is_negative = x < 0;
+ size_t i = 0;
+
+ // spare 1 byte for '\0'
+ while (x != 0 and i < m_buf.size() - 1)
+ {
+ const auto digit = std::labs(static_cast<long>(x % 10));
+ m_buf[i++] = static_cast<char>('0' + digit);
+ x /= 10;
+ }
+
+ // make sure the number has been processed completely
+ assert(x == 0);
+
+ if (is_negative)
+ {
+ // make sure there is capacity for the '-'
+ assert(i < m_buf.size() - 2);
+ m_buf[i++] = '-';
+ }
+
+ std::reverse(m_buf.begin(), m_buf.begin() + i);
+ }
+
+ template<typename NumberType>
+ void x_write(NumberType x, /*is_integral=*/std::false_type)
+ {
+ // special case for 0.0 and -0.0
+ if (x == 0)
+ {
+ size_t i = 0;
+ if (std::signbit(x))
+ {
+ m_buf[i++] = '-';
+ }
+ m_buf[i++] = '0';
+ m_buf[i++] = '.';
+ m_buf[i] = '0';
+ return;
+ }
+
+ // get number of digits for a text -> float -> text round-trip
+ static constexpr auto d = std::numeric_limits<NumberType>::digits10;
+
+ // the actual conversion
+ const auto written_bytes = snprintf(m_buf.data(), m_buf.size(), "%.*g", d, (double)x);
+
+ // negative value indicates an error
+ assert(written_bytes > 0);
+ // check if buffer was large enough
+ assert(static_cast<size_t>(written_bytes) < m_buf.size());
+
+ // read information from locale
+ const auto loc = localeconv();
+ assert(loc != nullptr);
+ const char thousands_sep = !loc->thousands_sep ? '\0'
+ : loc->thousands_sep[0];
+
+ const char decimal_point = !loc->decimal_point ? '\0'
+ : loc->decimal_point[0];
+
+ // erase thousands separator
+ if (thousands_sep != '\0')
+ {
+ const auto end = std::remove(m_buf.begin(), m_buf.begin() + written_bytes, thousands_sep);
+ std::fill(end, m_buf.end(), '\0');
+ }
+
+ // convert decimal point to '.'
+ if (decimal_point != '\0' and decimal_point != '.')
+ {
+ for (auto& c : m_buf)
+ {
+ if (c == decimal_point)
+ {
+ c = '.';
+ break;
+ }
+ }
+ }
+
+ // determine if need to append ".0"
+ size_t i = 0;
+ bool value_is_int_like = true;
+ for (i = 0; i < m_buf.size(); ++i)
+ {
+ // break when end of number is reached
+ if (m_buf[i] == '\0')
+ {
+ break;
+ }
+
+ // check if we find non-int character
+ value_is_int_like = value_is_int_like and m_buf[i] != '.' and
+ m_buf[i] != 'e' and m_buf[i] != 'E';
+ }
+
+ if (value_is_int_like)
+ {
+ // there must be 2 bytes left for ".0"
+ assert((i + 2) < m_buf.size());
+ // we write to the end of the number
+ assert(m_buf[i] == '\0');
+ assert(m_buf[i - 1] != '\0');
+
+ // add ".0"
+ m_buf[i] = '.';
+ m_buf[i + 1] = '0';
+
+ // the resulting string is properly terminated
+ assert(m_buf[i + 2] == '\0');
+ }
+ }
+ };
+
+
+ /*!
+ @brief internal implementation of the serialization function
+
+ This function is called by the public member function dump and organizes
+ the serialization internally. The indentation level is propagated as
+ additional parameter. In case of arrays and objects, the function is
+ called recursively. Note that
+
+ - strings and object keys are escaped using `escape_string()`
+ - integer numbers are converted implicitly via `operator<<`
+ - floating-point numbers are converted to a string using `"%g"` format
+
+ @param[out] o stream to write to
+ @param[in] pretty_print whether the output shall be pretty-printed
+ @param[in] indent_step the indent level
+ @param[in] current_indent the current indent level (only used internally)
+ */
+ void dump(std::ostream& o,
+ const bool pretty_print,
+ const unsigned int indent_step,
+ const unsigned int current_indent = 0) const
+ {
+ // variable to hold indentation for recursive calls
+ unsigned int new_indent = current_indent;
+
+ switch (m_type)
+ {
+ case value_t::object:
+ {
+ if (m_value.object->empty())
+ {
+ o << "{}";
+ return;
+ }
+
+ o << "{";
+
+ // increase indentation
+ if (pretty_print)
+ {
+ new_indent += indent_step;
+ o << "\n";
+ }
+
+ for (auto i = m_value.object->cbegin(); i != m_value.object->cend(); ++i)
+ {
+ if (i != m_value.object->cbegin())
+ {
+ o << (pretty_print ? ",\n" : ",");
+ }
+ o << string_t(new_indent, ' ') << "\""
+ << escape_string(i->first) << "\":"
+ << (pretty_print ? " " : "");
+ i->second.dump(o, pretty_print, indent_step, new_indent);
+ }
+
+ // decrease indentation
+ if (pretty_print)
+ {
+ new_indent -= indent_step;
+ o << "\n";
+ }
+
+ o << string_t(new_indent, ' ') + "}";
+ return;
+ }
+
+ case value_t::array:
+ {
+ if (m_value.array->empty())
+ {
+ o << "[]";
+ return;
+ }
+
+ o << "[";
+
+ // increase indentation
+ if (pretty_print)
+ {
+ new_indent += indent_step;
+ o << "\n";
+ }
+
+ for (auto i = m_value.array->cbegin(); i != m_value.array->cend(); ++i)
+ {
+ if (i != m_value.array->cbegin())
+ {
+ o << (pretty_print ? ",\n" : ",");
+ }
+ o << string_t(new_indent, ' ');
+ i->dump(o, pretty_print, indent_step, new_indent);
+ }
+
+ // decrease indentation
+ if (pretty_print)
+ {
+ new_indent -= indent_step;
+ o << "\n";
+ }
+
+ o << string_t(new_indent, ' ') << "]";
+ return;
+ }
+
+ case value_t::string:
+ {
+ o << string_t("\"") << escape_string(*m_value.string) << "\"";
+ return;
+ }
+
+ case value_t::boolean:
+ {
+ o << (m_value.boolean ? "true" : "false");
+ return;
+ }
+
+ case value_t::number_integer:
+ {
+ o << numtostr(m_value.number_integer).c_str();
+ return;
+ }
+
+ case value_t::number_unsigned:
+ {
+ o << numtostr(m_value.number_unsigned).c_str();
+ return;
+ }
+
+ case value_t::number_float:
+ {
+ o << numtostr(m_value.number_float).c_str();
+ return;
+ }
+
+ case value_t::discarded:
+ {
+ o << "<discarded>";
+ return;
+ }
+
+ case value_t::null:
+ {
+ o << "null";
+ return;
+ }
+ }
+ }
+
+ private:
+ //////////////////////
+ // member variables //
+ //////////////////////
+
+ /// the type of the current element
+ value_t m_type = value_t::null;
+
+ /// the value of the current element
+ json_value m_value = {};
+
+
+ private:
+ ///////////////
+ // iterators //
+ ///////////////
+
+ /*!
+ @brief an iterator for primitive JSON types
+
+ This class models an iterator for primitive JSON types (boolean, number,
+ string). It's only purpose is to allow the iterator/const_iterator classes
+ to "iterate" over primitive values. Internally, the iterator is modeled by
+ a `difference_type` variable. Value begin_value (`0`) models the begin,
+ end_value (`1`) models past the end.
+ */
+ class primitive_iterator_t
+ {
+ public:
+
+ difference_type get_value() const noexcept
+ {
+ return m_it;
+ }
+ /// set iterator to a defined beginning
+ void set_begin() noexcept
+ {
+ m_it = begin_value;
+ }
+
+ /// set iterator to a defined past the end
+ void set_end() noexcept
+ {
+ m_it = end_value;
+ }
+
+ /// return whether the iterator can be dereferenced
+ constexpr bool is_begin() const noexcept
+ {
+ return (m_it == begin_value);
+ }
+
+ /// return whether the iterator is at end
+ constexpr bool is_end() const noexcept
+ {
+ return (m_it == end_value);
+ }
+
+ friend constexpr bool operator==(primitive_iterator_t lhs, primitive_iterator_t rhs) noexcept
+ {
+ return lhs.m_it == rhs.m_it;
+ }
+
+ friend constexpr bool operator!=(primitive_iterator_t lhs, primitive_iterator_t rhs) noexcept
+ {
+ return !(lhs == rhs);
+ }
+
+ friend constexpr bool operator<(primitive_iterator_t lhs, primitive_iterator_t rhs) noexcept
+ {
+ return lhs.m_it < rhs.m_it;
+ }
+
+ friend constexpr bool operator<=(primitive_iterator_t lhs, primitive_iterator_t rhs) noexcept
+ {
+ return lhs.m_it <= rhs.m_it;
+ }
+
+ friend constexpr bool operator>(primitive_iterator_t lhs, primitive_iterator_t rhs) noexcept
+ {
+ return lhs.m_it > rhs.m_it;
+ }
+
+ friend constexpr bool operator>=(primitive_iterator_t lhs, primitive_iterator_t rhs) noexcept
+ {
+ return lhs.m_it >= rhs.m_it;
+ }
+
+ primitive_iterator_t operator+(difference_type i)
+ {
+ auto result = *this;
+ result += i;
+ return result;
+ }
+
+ friend constexpr difference_type operator-(primitive_iterator_t lhs, primitive_iterator_t rhs) noexcept
+ {
+ return lhs.m_it - rhs.m_it;
+ }
+
+ friend std::ostream& operator<<(std::ostream& os, primitive_iterator_t it)
+ {
+ return os << it.m_it;
+ }
+
+ primitive_iterator_t& operator++()
+ {
+ ++m_it;
+ return *this;
+ }
+
+ primitive_iterator_t operator++(int)
+ {
+ auto result = *this;
+ m_it++;
+ return result;
+ }
+
+ primitive_iterator_t& operator--()
+ {
+ --m_it;
+ return *this;
+ }
+
+ primitive_iterator_t operator--(int)
+ {
+ auto result = *this;
+ m_it--;
+ return result;
+ }
+
+ primitive_iterator_t& operator+=(difference_type n)
+ {
+ m_it += n;
+ return *this;
+ }
+
+ primitive_iterator_t& operator-=(difference_type n)
+ {
+ m_it -= n;
+ return *this;
+ }
+
+ private:
+ static constexpr difference_type begin_value = 0;
+ static constexpr difference_type end_value = begin_value + 1;
+
+ /// iterator as signed integer type
+ difference_type m_it = std::numeric_limits<std::ptrdiff_t>::denorm_min();
+ };
+
+ /*!
+ @brief an iterator value
+
+ @note This structure could easily be a union, but MSVC currently does not
+ allow unions members with complex constructors, see
+ https://github.com/nlohmann/json/pull/105.
+ */
+ struct internal_iterator
+ {
+ /// iterator for JSON objects
+ typename object_t::iterator object_iterator;
+ /// iterator for JSON arrays
+ typename array_t::iterator array_iterator;
+ /// generic iterator for all other types
+ primitive_iterator_t primitive_iterator;
+
+ /// create an uninitialized internal_iterator
+ internal_iterator() noexcept
+ : object_iterator(), array_iterator(), primitive_iterator()
+ {}
+ };
+
+ /// proxy class for the iterator_wrapper functions
+ template<typename IteratorType>
+ class iteration_proxy
+ {
+ private:
+ /// helper class for iteration
+ class iteration_proxy_internal
+ {
+ private:
+ /// the iterator
+ IteratorType anchor;
+ /// an index for arrays (used to create key names)
+ size_t array_index = 0;
+
+ public:
+ explicit iteration_proxy_internal(IteratorType it) noexcept
+ : anchor(it)
+ {}
+
+ /// dereference operator (needed for range-based for)
+ iteration_proxy_internal& operator*()
+ {
+ return *this;
+ }
+
+ /// increment operator (needed for range-based for)
+ iteration_proxy_internal& operator++()
+ {
+ ++anchor;
+ ++array_index;
+
+ return *this;
+ }
+
+ /// inequality operator (needed for range-based for)
+ bool operator!= (const iteration_proxy_internal& o) const
+ {
+ return anchor != o.anchor;
+ }
+
+ /// return key of the iterator
+ typename basic_json::string_t key() const
+ {
+ assert(anchor.m_object != nullptr);
+
+ switch (anchor.m_object->type())
+ {
+ // use integer array index as key
+ case value_t::array:
+ {
+ return std::to_string(array_index);
+ }
+
+ // use key from the object
+ case value_t::object:
+ {
+ return anchor.key();
+ }
+
+ // use an empty key for all primitive types
+ default:
+ {
+ return "";
+ }
+ }
+ }
+
+ /// return value of the iterator
+ typename IteratorType::reference value() const
+ {
+ return anchor.value();
+ }
+ };
+
+ /// the container to iterate
+ typename IteratorType::reference container;
+
+ public:
+ /// construct iteration proxy from a container
+ explicit iteration_proxy(typename IteratorType::reference cont)
+ : container(cont)
+ {}
+
+ /// return iterator begin (needed for range-based for)
+ iteration_proxy_internal begin() noexcept
+ {
+ return iteration_proxy_internal(container.begin());
+ }
+
+ /// return iterator end (needed for range-based for)
+ iteration_proxy_internal end() noexcept
+ {
+ return iteration_proxy_internal(container.end());
+ }
+ };
+
+ public:
+ /*!
+ @brief a template for a random access iterator for the @ref basic_json class
+
+ This class implements a both iterators (iterator and const_iterator) for the
+ @ref basic_json class.
+
+ @note An iterator is called *initialized* when a pointer to a JSON value
+ has been set (e.g., by a constructor or a copy assignment). If the
+ iterator is default-constructed, it is *uninitialized* and most
+ methods are undefined. **The library uses assertions to detect calls
+ on uninitialized iterators.**
+
+ @requirement The class satisfies the following concept requirements:
+ - [RandomAccessIterator](http://en.cppreference.com/w/cpp/concept/RandomAccessIterator):
+ The iterator that can be moved to point (forward and backward) to any
+ element in constant time.
+
+ @since version 1.0.0, simplified in version 2.0.9
+ */
+ template<typename U>
+ class iter_impl : public std::iterator<std::random_access_iterator_tag, U>
+ {
+ /// allow basic_json to access private members
+ friend class basic_json;
+
+ // make sure U is basic_json or const basic_json
+ static_assert(std::is_same<U, basic_json>::value
+ or std::is_same<U, const basic_json>::value,
+ "iter_impl only accepts (const) basic_json");
+
+ public:
+ /// the type of the values when the iterator is dereferenced
+ using value_type = typename basic_json::value_type;
+ /// a type to represent differences between iterators
+ using difference_type = typename basic_json::difference_type;
+ /// defines a pointer to the type iterated over (value_type)
+ using pointer = typename std::conditional<std::is_const<U>::value,
+ typename basic_json::const_pointer,
+ typename basic_json::pointer>::type;
+ /// defines a reference to the type iterated over (value_type)
+ using reference = typename std::conditional<std::is_const<U>::value,
+ typename basic_json::const_reference,
+ typename basic_json::reference>::type;
+ /// the category of the iterator
+ using iterator_category = std::bidirectional_iterator_tag;
+
+ /// default constructor
+ iter_impl() = default;
+
+ /*!
+ @brief constructor for a given JSON instance
+ @param[in] object pointer to a JSON object for this iterator
+ @pre object != nullptr
+ @post The iterator is initialized; i.e. `m_object != nullptr`.
+ */
+ explicit iter_impl(pointer object) noexcept
+ : m_object(object)
+ {
+ assert(m_object != nullptr);
+
+ switch (m_object->m_type)
+ {
+ case basic_json::value_t::object:
+ {
+ m_it.object_iterator = typename object_t::iterator();
+ break;
+ }
+
+ case basic_json::value_t::array:
+ {
+ m_it.array_iterator = typename array_t::iterator();
+ break;
+ }
+
+ default:
+ {
+ m_it.primitive_iterator = primitive_iterator_t();
+ break;
+ }
+ }
+ }
+
+ /*
+ Use operator `const_iterator` instead of `const_iterator(const iterator&
+ other) noexcept` to avoid two class definitions for @ref iterator and
+ @ref const_iterator.
+
+ This function is only called if this class is an @ref iterator. If this
+ class is a @ref const_iterator this function is not called.
+ */
+ operator const_iterator() const
+ {
+ const_iterator ret;
+
+ if (m_object)
+ {
+ ret.m_object = m_object;
+ ret.m_it = m_it;
+ }
+
+ return ret;
+ }
+
+ /*!
+ @brief copy constructor
+ @param[in] other iterator to copy from
+ @note It is not checked whether @a other is initialized.
+ */
+ iter_impl(const iter_impl& other) noexcept
+ : m_object(other.m_object), m_it(other.m_it)
+ {}
+
+ /*!
+ @brief copy assignment
+ @param[in,out] other iterator to copy from
+ @note It is not checked whether @a other is initialized.
+ */
+ iter_impl& operator=(iter_impl other) noexcept(
+ std::is_nothrow_move_constructible<pointer>::value and
+ std::is_nothrow_move_assignable<pointer>::value and
+ std::is_nothrow_move_constructible<internal_iterator>::value and
+ std::is_nothrow_move_assignable<internal_iterator>::value
+ )
+ {
+ std::swap(m_object, other.m_object);
+ std::swap(m_it, other.m_it);
+ return *this;
+ }
+
+ private:
+ /*!
+ @brief set the iterator to the first value
+ @pre The iterator is initialized; i.e. `m_object != nullptr`.
+ */
+ void set_begin() noexcept
+ {
+ assert(m_object != nullptr);
+
+ switch (m_object->m_type)
+ {
+ case basic_json::value_t::object:
+ {
+ m_it.object_iterator = m_object->m_value.object->begin();
+ break;
+ }
+
+ case basic_json::value_t::array:
+ {
+ m_it.array_iterator = m_object->m_value.array->begin();
+ break;
+ }
+
+ case basic_json::value_t::null:
+ {
+ // set to end so begin()==end() is true: null is empty
+ m_it.primitive_iterator.set_end();
+ break;
+ }
+
+ default:
+ {
+ m_it.primitive_iterator.set_begin();
+ break;
+ }
+ }
+ }
+
+ /*!
+ @brief set the iterator past the last value
+ @pre The iterator is initialized; i.e. `m_object != nullptr`.
+ */
+ void set_end() noexcept
+ {
+ assert(m_object != nullptr);
+
+ switch (m_object->m_type)
+ {
+ case basic_json::value_t::object:
+ {
+ m_it.object_iterator = m_object->m_value.object->end();
+ break;
+ }
+
+ case basic_json::value_t::array:
+ {
+ m_it.array_iterator = m_object->m_value.array->end();
+ break;
+ }
+
+ default:
+ {
+ m_it.primitive_iterator.set_end();
+ break;
+ }
+ }
+ }
+
+ public:
+ /*!
+ @brief return a reference to the value pointed to by the iterator
+ @pre The iterator is initialized; i.e. `m_object != nullptr`.
+ */
+ reference operator*() const
+ {
+ assert(m_object != nullptr);
+
+ switch (m_object->m_type)
+ {
+ case basic_json::value_t::object:
+ {
+ assert(m_it.object_iterator != m_object->m_value.object->end());
+ return m_it.object_iterator->second;
+ }
+
+ case basic_json::value_t::array:
+ {
+ assert(m_it.array_iterator != m_object->m_value.array->end());
+ return *m_it.array_iterator;
+ }
+
+ case basic_json::value_t::null:
+ {
+ JSON_THROW(std::out_of_range("cannot get value"));
+ }
+
+ default:
+ {
+ if (m_it.primitive_iterator.is_begin())
+ {
+ return *m_object;
+ }
+
+ JSON_THROW(std::out_of_range("cannot get value"));
+ }
+ }
+ }
+
+ /*!
+ @brief dereference the iterator
+ @pre The iterator is initialized; i.e. `m_object != nullptr`.
+ */
+ pointer operator->() const
+ {
+ assert(m_object != nullptr);
+
+ switch (m_object->m_type)
+ {
+ case basic_json::value_t::object:
+ {
+ assert(m_it.object_iterator != m_object->m_value.object->end());
+ return &(m_it.object_iterator->second);
+ }
+
+ case basic_json::value_t::array:
+ {
+ assert(m_it.array_iterator != m_object->m_value.array->end());
+ return &*m_it.array_iterator;
+ }
+
+ default:
+ {
+ if (m_it.primitive_iterator.is_begin())
+ {
+ return m_object;
+ }
+
+ JSON_THROW(std::out_of_range("cannot get value"));
+ }
+ }
+ }
+
+ /*!
+ @brief post-increment (it++)
+ @pre The iterator is initialized; i.e. `m_object != nullptr`.
+ */
+ iter_impl operator++(int)
+ {
+ auto result = *this;
+ ++(*this);
+ return result;
+ }
+
+ /*!
+ @brief pre-increment (++it)
+ @pre The iterator is initialized; i.e. `m_object != nullptr`.
+ */
+ iter_impl& operator++()
+ {
+ assert(m_object != nullptr);
+
+ switch (m_object->m_type)
+ {
+ case basic_json::value_t::object:
+ {
+ std::advance(m_it.object_iterator, 1);
+ break;
+ }
+
+ case basic_json::value_t::array:
+ {
+ std::advance(m_it.array_iterator, 1);
+ break;
+ }
+
+ default:
+ {
+ ++m_it.primitive_iterator;
+ break;
+ }
+ }
+
+ return *this;
+ }
+
+ /*!
+ @brief post-decrement (it--)
+ @pre The iterator is initialized; i.e. `m_object != nullptr`.
+ */
+ iter_impl operator--(int)
+ {
+ auto result = *this;
+ --(*this);
+ return result;
+ }
+
+ /*!
+ @brief pre-decrement (--it)
+ @pre The iterator is initialized; i.e. `m_object != nullptr`.
+ */
+ iter_impl& operator--()
+ {
+ assert(m_object != nullptr);
+
+ switch (m_object->m_type)
+ {
+ case basic_json::value_t::object:
+ {
+ std::advance(m_it.object_iterator, -1);
+ break;
+ }
+
+ case basic_json::value_t::array:
+ {
+ std::advance(m_it.array_iterator, -1);
+ break;
+ }
+
+ default:
+ {
+ --m_it.primitive_iterator;
+ break;
+ }
+ }
+
+ return *this;
+ }
+
+ /*!
+ @brief comparison: equal
+ @pre The iterator is initialized; i.e. `m_object != nullptr`.
+ */
+ bool operator==(const iter_impl& other) const
+ {
+ // if objects are not the same, the comparison is undefined
+ if (m_object != other.m_object)
+ {
+ JSON_THROW(std::domain_error("cannot compare iterators of different containers"));
+ }
+
+ assert(m_object != nullptr);
+
+ switch (m_object->m_type)
+ {
+ case basic_json::value_t::object:
+ {
+ return (m_it.object_iterator == other.m_it.object_iterator);
+ }
+
+ case basic_json::value_t::array:
+ {
+ return (m_it.array_iterator == other.m_it.array_iterator);
+ }
+
+ default:
+ {
+ return (m_it.primitive_iterator == other.m_it.primitive_iterator);
+ }
+ }
+ }
+
+ /*!
+ @brief comparison: not equal
+ @pre The iterator is initialized; i.e. `m_object != nullptr`.
+ */
+ bool operator!=(const iter_impl& other) const
+ {
+ return not operator==(other);
+ }
+
+ /*!
+ @brief comparison: smaller
+ @pre The iterator is initialized; i.e. `m_object != nullptr`.
+ */
+ bool operator<(const iter_impl& other) const
+ {
+ // if objects are not the same, the comparison is undefined
+ if (m_object != other.m_object)
+ {
+ JSON_THROW(std::domain_error("cannot compare iterators of different containers"));
+ }
+
+ assert(m_object != nullptr);
+
+ switch (m_object->m_type)
+ {
+ case basic_json::value_t::object:
+ {
+ JSON_THROW(std::domain_error("cannot compare order of object iterators"));
+ }
+
+ case basic_json::value_t::array:
+ {
+ return (m_it.array_iterator < other.m_it.array_iterator);
+ }
+
+ default:
+ {
+ return (m_it.primitive_iterator < other.m_it.primitive_iterator);
+ }
+ }
+ }
+
+ /*!
+ @brief comparison: less than or equal
+ @pre The iterator is initialized; i.e. `m_object != nullptr`.
+ */
+ bool operator<=(const iter_impl& other) const
+ {
+ return not other.operator < (*this);
+ }
+
+ /*!
+ @brief comparison: greater than
+ @pre The iterator is initialized; i.e. `m_object != nullptr`.
+ */
+ bool operator>(const iter_impl& other) const
+ {
+ return not operator<=(other);
+ }
+
+ /*!
+ @brief comparison: greater than or equal
+ @pre The iterator is initialized; i.e. `m_object != nullptr`.
+ */
+ bool operator>=(const iter_impl& other) const
+ {
+ return not operator<(other);
+ }
+
+ /*!
+ @brief add to iterator
+ @pre The iterator is initialized; i.e. `m_object != nullptr`.
+ */
+ iter_impl& operator+=(difference_type i)
+ {
+ assert(m_object != nullptr);
+
+ switch (m_object->m_type)
+ {
+ case basic_json::value_t::object:
+ {
+ JSON_THROW(std::domain_error("cannot use offsets with object iterators"));
+ }
+
+ case basic_json::value_t::array:
+ {
+ std::advance(m_it.array_iterator, i);
+ break;
+ }
+
+ default:
+ {
+ m_it.primitive_iterator += i;
+ break;
+ }
+ }
+
+ return *this;
+ }
+
+ /*!
+ @brief subtract from iterator
+ @pre The iterator is initialized; i.e. `m_object != nullptr`.
+ */
+ iter_impl& operator-=(difference_type i)
+ {
+ return operator+=(-i);
+ }
+
+ /*!
+ @brief add to iterator
+ @pre The iterator is initialized; i.e. `m_object != nullptr`.
+ */
+ iter_impl operator+(difference_type i)
+ {
+ auto result = *this;
+ result += i;
+ return result;
+ }
+
+ /*!
+ @brief subtract from iterator
+ @pre The iterator is initialized; i.e. `m_object != nullptr`.
+ */
+ iter_impl operator-(difference_type i)
+ {
+ auto result = *this;
+ result -= i;
+ return result;
+ }
+
+ /*!
+ @brief return difference
+ @pre The iterator is initialized; i.e. `m_object != nullptr`.
+ */
+ difference_type operator-(const iter_impl& other) const
+ {
+ assert(m_object != nullptr);
+
+ switch (m_object->m_type)
+ {
+ case basic_json::value_t::object:
+ {
+ JSON_THROW(std::domain_error("cannot use offsets with object iterators"));
+ }
+
+ case basic_json::value_t::array:
+ {
+ return m_it.array_iterator - other.m_it.array_iterator;
+ }
+
+ default:
+ {
+ return m_it.primitive_iterator - other.m_it.primitive_iterator;
+ }
+ }
+ }
+
+ /*!
+ @brief access to successor
+ @pre The iterator is initialized; i.e. `m_object != nullptr`.
+ */
+ reference operator[](difference_type n) const
+ {
+ assert(m_object != nullptr);
+
+ switch (m_object->m_type)
+ {
+ case basic_json::value_t::object:
+ {
+ JSON_THROW(std::domain_error("cannot use operator[] for object iterators"));
+ }
+
+ case basic_json::value_t::array:
+ {
+ return *std::next(m_it.array_iterator, n);
+ }
+
+ case basic_json::value_t::null:
+ {
+ JSON_THROW(std::out_of_range("cannot get value"));
+ }
+
+ default:
+ {
+ if (m_it.primitive_iterator.get_value() == -n)
+ {
+ return *m_object;
+ }
+
+ JSON_THROW(std::out_of_range("cannot get value"));
+ }
+ }
+ }
+
+ /*!
+ @brief return the key of an object iterator
+ @pre The iterator is initialized; i.e. `m_object != nullptr`.
+ */
+ typename object_t::key_type key() const
+ {
+ assert(m_object != nullptr);
+
+ if (m_object->is_object())
+ {
+ return m_it.object_iterator->first;
+ }
+
+ JSON_THROW(std::domain_error("cannot use key() for non-object iterators"));
+ }
+
+ /*!
+ @brief return the value of an iterator
+ @pre The iterator is initialized; i.e. `m_object != nullptr`.
+ */
+ reference value() const
+ {
+ return operator*();
+ }
+
+ private:
+ /// associated JSON instance
+ pointer m_object = nullptr;
+ /// the actual iterator of the associated instance
+ internal_iterator m_it = internal_iterator();
+ };
+
+ /*!
+ @brief a template for a reverse iterator class
+
+ @tparam Base the base iterator type to reverse. Valid types are @ref
+ iterator (to create @ref reverse_iterator) and @ref const_iterator (to
+ create @ref const_reverse_iterator).
+
+ @requirement The class satisfies the following concept requirements:
+ - [RandomAccessIterator](http://en.cppreference.com/w/cpp/concept/RandomAccessIterator):
+ The iterator that can be moved to point (forward and backward) to any
+ element in constant time.
+ - [OutputIterator](http://en.cppreference.com/w/cpp/concept/OutputIterator):
+ It is possible to write to the pointed-to element (only if @a Base is
+ @ref iterator).
+
+ @since version 1.0.0
+ */
+ template<typename Base>
+ class json_reverse_iterator : public std::reverse_iterator<Base>
+ {
+ public:
+ /// shortcut to the reverse iterator adaptor
+ using base_iterator = std::reverse_iterator<Base>;
+ /// the reference type for the pointed-to element
+ using reference = typename Base::reference;
+
+ /// create reverse iterator from iterator
+ json_reverse_iterator(const typename base_iterator::iterator_type& it) noexcept
+ : base_iterator(it)
+ {}
+
+ /// create reverse iterator from base class
+ json_reverse_iterator(const base_iterator& it) noexcept
+ : base_iterator(it)
+ {}
+
+ /// post-increment (it++)
+ json_reverse_iterator operator++(int)
+ {
+ return base_iterator::operator++(1);
+ }
+
+ /// pre-increment (++it)
+ json_reverse_iterator& operator++()
+ {
+ base_iterator::operator++();
+ return *this;
+ }
+
+ /// post-decrement (it--)
+ json_reverse_iterator operator--(int)
+ {
+ return base_iterator::operator--(1);
+ }
+
+ /// pre-decrement (--it)
+ json_reverse_iterator& operator--()
+ {
+ base_iterator::operator--();
+ return *this;
+ }
+
+ /// add to iterator
+ json_reverse_iterator& operator+=(difference_type i)
+ {
+ base_iterator::operator+=(i);
+ return *this;
+ }
+
+ /// add to iterator
+ json_reverse_iterator operator+(difference_type i) const
+ {
+ auto result = *this;
+ result += i;
+ return result;
+ }
+
+ /// subtract from iterator
+ json_reverse_iterator operator-(difference_type i) const
+ {
+ auto result = *this;
+ result -= i;
+ return result;
+ }
+
+ /// return difference
+ difference_type operator-(const json_reverse_iterator& other) const
+ {
+ return this->base() - other.base();
+ }
+
+ /// access to successor
+ reference operator[](difference_type n) const
+ {
+ return *(this->operator+(n));
+ }
+
+ /// return the key of an object iterator
+ typename object_t::key_type key() const
+ {
+ auto it = --this->base();
+ return it.key();
+ }
+
+ /// return the value of an iterator
+ reference value() const
+ {
+ auto it = --this->base();
+ return it.operator * ();
+ }
+ };
+
+
+ private:
+ //////////////////////
+ // lexer and parser //
+ //////////////////////
+
+ /*!
+ @brief lexical analysis
+
+ This class organizes the lexical analysis during JSON deserialization. The
+ core of it is a scanner generated by [re2c](http://re2c.org) that
+ processes a buffer and recognizes tokens according to RFC 7159.
+ */
+ class lexer
+ {
+ public:
+ /// token types for the parser
+ enum class token_type
+ {
+ uninitialized, ///< indicating the scanner is uninitialized
+ literal_true, ///< the `true` literal
+ literal_false, ///< the `false` literal
+ literal_null, ///< the `null` literal
+ value_string, ///< a string -- use get_string() for actual value
+ value_unsigned, ///< an unsigned integer -- use get_number() for actual value
+ value_integer, ///< a signed integer -- use get_number() for actual value
+ value_float, ///< an floating point number -- use get_number() for actual value
+ begin_array, ///< the character for array begin `[`
+ begin_object, ///< the character for object begin `{`
+ end_array, ///< the character for array end `]`
+ end_object, ///< the character for object end `}`
+ name_separator, ///< the name separator `:`
+ value_separator, ///< the value separator `,`
+ parse_error, ///< indicating a parse error
+ end_of_input ///< indicating the end of the input buffer
+ };
+
+ /// the char type to use in the lexer
+ using lexer_char_t = unsigned char;
+
+ /// a lexer from a buffer with given length
+ lexer(const lexer_char_t* buff, const size_t len) noexcept
+ : m_content(buff)
+ {
+ assert(m_content != nullptr);
+ m_start = m_cursor = m_content;
+ m_limit = m_content + len;
+ }
+
+ /// a lexer from an input stream
+ explicit lexer(std::istream& s)
+ : m_stream(&s), m_line_buffer()
+ {
+ // immediately abort if stream is erroneous
+ if (s.fail())
+ {
+ JSON_THROW(std::invalid_argument("stream error"));
+ }
+
+ // fill buffer
+ fill_line_buffer();
+
+ // skip UTF-8 byte-order mark
+ if (m_line_buffer.size() >= 3 and m_line_buffer.substr(0, 3) == "\xEF\xBB\xBF")
+ {
+ m_line_buffer[0] = ' ';
+ m_line_buffer[1] = ' ';
+ m_line_buffer[2] = ' ';
+ }
+ }
+
+ // switch off unwanted functions (due to pointer members)
+ lexer() = delete;
+ lexer(const lexer&) = delete;
+ lexer operator=(const lexer&) = delete;
+
+ /*!
+ @brief create a string from one or two Unicode code points
+
+ There are two cases: (1) @a codepoint1 is in the Basic Multilingual
+ Plane (U+0000 through U+FFFF) and @a codepoint2 is 0, or (2)
+ @a codepoint1 and @a codepoint2 are a UTF-16 surrogate pair to
+ represent a code point above U+FFFF.
+
+ @param[in] codepoint1 the code point (can be high surrogate)
+ @param[in] codepoint2 the code point (can be low surrogate or 0)
+
+ @return string representation of the code point; the length of the
+ result string is between 1 and 4 characters.
+
+ @throw std::out_of_range if code point is > 0x10ffff; example: `"code
+ points above 0x10FFFF are invalid"`
+ @throw std::invalid_argument if the low surrogate is invalid; example:
+ `""missing or wrong low surrogate""`
+
+ @complexity Constant.
+
+ @see <http://en.wikipedia.org/wiki/UTF-8#Sample_code>
+ */
+ static string_t to_unicode(const std::size_t codepoint1,
+ const std::size_t codepoint2 = 0)
+ {
+ // calculate the code point from the given code points
+ std::size_t codepoint = codepoint1;
+
+ // check if codepoint1 is a high surrogate
+ if (codepoint1 >= 0xD800 and codepoint1 <= 0xDBFF)
+ {
+ // check if codepoint2 is a low surrogate
+ if (codepoint2 >= 0xDC00 and codepoint2 <= 0xDFFF)
+ {
+ codepoint =
+ // high surrogate occupies the most significant 22 bits
+ (codepoint1 << 10)
+ // low surrogate occupies the least significant 15 bits
+ + codepoint2
+ // there is still the 0xD800, 0xDC00 and 0x10000 noise
+ // in the result so we have to subtract with:
+ // (0xD800 << 10) + DC00 - 0x10000 = 0x35FDC00
+ - 0x35FDC00;
+ }
+ else
+ {
+ JSON_THROW(std::invalid_argument("missing or wrong low surrogate"));
+ }
+ }
+
+ string_t result;
+
+ if (codepoint < 0x80)
+ {
+ // 1-byte characters: 0xxxxxxx (ASCII)
+ result.append(1, static_cast<typename string_t::value_type>(codepoint));
+ }
+ else if (codepoint <= 0x7ff)
+ {
+ // 2-byte characters: 110xxxxx 10xxxxxx
+ result.append(1, static_cast<typename string_t::value_type>(0xC0 | ((codepoint >> 6) & 0x1F)));
+ result.append(1, static_cast<typename string_t::value_type>(0x80 | (codepoint & 0x3F)));
+ }
+ else if (codepoint <= 0xffff)
+ {
+ // 3-byte characters: 1110xxxx 10xxxxxx 10xxxxxx
+ result.append(1, static_cast<typename string_t::value_type>(0xE0 | ((codepoint >> 12) & 0x0F)));
+ result.append(1, static_cast<typename string_t::value_type>(0x80 | ((codepoint >> 6) & 0x3F)));
+ result.append(1, static_cast<typename string_t::value_type>(0x80 | (codepoint & 0x3F)));
+ }
+ else if (codepoint <= 0x10ffff)
+ {
+ // 4-byte characters: 11110xxx 10xxxxxx 10xxxxxx 10xxxxxx
+ result.append(1, static_cast<typename string_t::value_type>(0xF0 | ((codepoint >> 18) & 0x07)));
+ result.append(1, static_cast<typename string_t::value_type>(0x80 | ((codepoint >> 12) & 0x3F)));
+ result.append(1, static_cast<typename string_t::value_type>(0x80 | ((codepoint >> 6) & 0x3F)));
+ result.append(1, static_cast<typename string_t::value_type>(0x80 | (codepoint & 0x3F)));
+ }
+ else
+ {
+ JSON_THROW(std::out_of_range("code points above 0x10FFFF are invalid"));
+ }
+
+ return result;
+ }
+
+ /// return name of values of type token_type (only used for errors)
+ static std::string token_type_name(const token_type t)
+ {
+ switch (t)
+ {
+ case token_type::uninitialized:
+ return "<uninitialized>";
+ case token_type::literal_true:
+ return "true literal";
+ case token_type::literal_false:
+ return "false literal";
+ case token_type::literal_null:
+ return "null literal";
+ case token_type::value_string:
+ return "string literal";
+ case lexer::token_type::value_unsigned:
+ case lexer::token_type::value_integer:
+ case lexer::token_type::value_float:
+ return "number literal";
+ case token_type::begin_array:
+ return "'['";
+ case token_type::begin_object:
+ return "'{'";
+ case token_type::end_array:
+ return "']'";
+ case token_type::end_object:
+ return "'}'";
+ case token_type::name_separator:
+ return "':'";
+ case token_type::value_separator:
+ return "','";
+ case token_type::parse_error:
+ return "<parse error>";
+ case token_type::end_of_input:
+ return "end of input";
+ default:
+ {
+ // catch non-enum values
+ return "unknown token"; // LCOV_EXCL_LINE
+ }
+ }
+ }
+
+ /*!
+ This function implements a scanner for JSON. It is specified using
+ regular expressions that try to follow RFC 7159 as close as possible.
+ These regular expressions are then translated into a minimized
+ deterministic finite automaton (DFA) by the tool
+ [re2c](http://re2c.org). As a result, the translated code for this
+ function consists of a large block of code with `goto` jumps.
+
+ @return the class of the next token read from the buffer
+
+ @complexity Linear in the length of the input.\n
+
+ Proposition: The loop below will always terminate for finite input.\n
+
+ Proof (by contradiction): Assume a finite input. To loop forever, the
+ loop must never hit code with a `break` statement. The only code
+ snippets without a `break` statement are the continue statements for
+ whitespace and byte-order-marks. To loop forever, the input must be an
+ infinite sequence of whitespace or byte-order-marks. This contradicts
+ the assumption of finite input, q.e.d.
+ */
+ token_type scan()
+ {
+ while (true)
+ {
+ // pointer for backtracking information
+ m_marker = nullptr;
+
+ // remember the begin of the token
+ m_start = m_cursor;
+ assert(m_start != nullptr);
+
+
+ {
+ lexer_char_t yych;
+ unsigned int yyaccept = 0;
+ static const unsigned char yybm[] =
+ {
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 32, 32, 0, 0, 32, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 160, 128, 0, 128, 128, 128, 128, 128,
+ 128, 128, 128, 128, 128, 128, 128, 128,
+ 192, 192, 192, 192, 192, 192, 192, 192,
+ 192, 192, 128, 128, 128, 128, 128, 128,
+ 128, 128, 128, 128, 128, 128, 128, 128,
+ 128, 128, 128, 128, 128, 128, 128, 128,
+ 128, 128, 128, 128, 128, 128, 128, 128,
+ 128, 128, 128, 128, 0, 128, 128, 128,
+ 128, 128, 128, 128, 128, 128, 128, 128,
+ 128, 128, 128, 128, 128, 128, 128, 128,
+ 128, 128, 128, 128, 128, 128, 128, 128,
+ 128, 128, 128, 128, 128, 128, 128, 128,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ };
+ if ((m_limit - m_cursor) < 5)
+ {
+ fill_line_buffer(5); // LCOV_EXCL_LINE
+ }
+ yych = *m_cursor;
+ if (yybm[0 + yych] & 32)
+ {
+ goto basic_json_parser_6;
+ }
+ if (yych <= '[')
+ {
+ if (yych <= '-')
+ {
+ if (yych <= '"')
+ {
+ if (yych <= 0x00)
+ {
+ goto basic_json_parser_2;
+ }
+ if (yych <= '!')
+ {
+ goto basic_json_parser_4;
+ }
+ goto basic_json_parser_9;
+ }
+ else
+ {
+ if (yych <= '+')
+ {
+ goto basic_json_parser_4;
+ }
+ if (yych <= ',')
+ {
+ goto basic_json_parser_10;
+ }
+ goto basic_json_parser_12;
+ }
+ }
+ else
+ {
+ if (yych <= '9')
+ {
+ if (yych <= '/')
+ {
+ goto basic_json_parser_4;
+ }
+ if (yych <= '0')
+ {
+ goto basic_json_parser_13;
+ }
+ goto basic_json_parser_15;
+ }
+ else
+ {
+ if (yych <= ':')
+ {
+ goto basic_json_parser_17;
+ }
+ if (yych <= 'Z')
+ {
+ goto basic_json_parser_4;
+ }
+ goto basic_json_parser_19;
+ }
+ }
+ }
+ else
+ {
+ if (yych <= 'n')
+ {
+ if (yych <= 'e')
+ {
+ if (yych == ']')
+ {
+ goto basic_json_parser_21;
+ }
+ goto basic_json_parser_4;
+ }
+ else
+ {
+ if (yych <= 'f')
+ {
+ goto basic_json_parser_23;
+ }
+ if (yych <= 'm')
+ {
+ goto basic_json_parser_4;
+ }
+ goto basic_json_parser_24;
+ }
+ }
+ else
+ {
+ if (yych <= 'z')
+ {
+ if (yych == 't')
+ {
+ goto basic_json_parser_25;
+ }
+ goto basic_json_parser_4;
+ }
+ else
+ {
+ if (yych <= '{')
+ {
+ goto basic_json_parser_26;
+ }
+ if (yych == '}')
+ {
+ goto basic_json_parser_28;
+ }
+ goto basic_json_parser_4;
+ }
+ }
+ }
+basic_json_parser_2:
+ ++m_cursor;
+ {
+ last_token_type = token_type::end_of_input;
+ break;
+ }
+basic_json_parser_4:
+ ++m_cursor;
+basic_json_parser_5:
+ {
+ last_token_type = token_type::parse_error;
+ break;
+ }
+basic_json_parser_6:
+ ++m_cursor;
+ if (m_limit <= m_cursor)
+ {
+ fill_line_buffer(1); // LCOV_EXCL_LINE
+ }
+ yych = *m_cursor;
+ if (yybm[0 + yych] & 32)
+ {
+ goto basic_json_parser_6;
+ }
+ {
+ continue;
+ }
+basic_json_parser_9:
+ yyaccept = 0;
+ yych = *(m_marker = ++m_cursor);
+ if (yych <= 0x1F)
+ {
+ goto basic_json_parser_5;
+ }
+ if (yych <= 0x7F)
+ {
+ goto basic_json_parser_31;
+ }
+ if (yych <= 0xC1)
+ {
+ goto basic_json_parser_5;
+ }
+ if (yych <= 0xF4)
+ {
+ goto basic_json_parser_31;
+ }
+ goto basic_json_parser_5;
+basic_json_parser_10:
+ ++m_cursor;
+ {
+ last_token_type = token_type::value_separator;
+ break;
+ }
+basic_json_parser_12:
+ yych = *++m_cursor;
+ if (yych <= '/')
+ {
+ goto basic_json_parser_5;
+ }
+ if (yych <= '0')
+ {
+ goto basic_json_parser_43;
+ }
+ if (yych <= '9')
+ {
+ goto basic_json_parser_45;
+ }
+ goto basic_json_parser_5;
+basic_json_parser_13:
+ yyaccept = 1;
+ yych = *(m_marker = ++m_cursor);
+ if (yych <= '9')
+ {
+ if (yych == '.')
+ {
+ goto basic_json_parser_47;
+ }
+ if (yych >= '0')
+ {
+ goto basic_json_parser_48;
+ }
+ }
+ else
+ {
+ if (yych <= 'E')
+ {
+ if (yych >= 'E')
+ {
+ goto basic_json_parser_51;
+ }
+ }
+ else
+ {
+ if (yych == 'e')
+ {
+ goto basic_json_parser_51;
+ }
+ }
+ }
+basic_json_parser_14:
+ {
+ last_token_type = token_type::value_unsigned;
+ break;
+ }
+basic_json_parser_15:
+ yyaccept = 1;
+ m_marker = ++m_cursor;
+ if ((m_limit - m_cursor) < 3)
+ {
+ fill_line_buffer(3); // LCOV_EXCL_LINE
+ }
+ yych = *m_cursor;
+ if (yybm[0 + yych] & 64)
+ {
+ goto basic_json_parser_15;
+ }
+ if (yych <= 'D')
+ {
+ if (yych == '.')
+ {
+ goto basic_json_parser_47;
+ }
+ goto basic_json_parser_14;
+ }
+ else
+ {
+ if (yych <= 'E')
+ {
+ goto basic_json_parser_51;
+ }
+ if (yych == 'e')
+ {
+ goto basic_json_parser_51;
+ }
+ goto basic_json_parser_14;
+ }
+basic_json_parser_17:
+ ++m_cursor;
+ {
+ last_token_type = token_type::name_separator;
+ break;
+ }
+basic_json_parser_19:
+ ++m_cursor;
+ {
+ last_token_type = token_type::begin_array;
+ break;
+ }
+basic_json_parser_21:
+ ++m_cursor;
+ {
+ last_token_type = token_type::end_array;
+ break;
+ }
+basic_json_parser_23:
+ yyaccept = 0;
+ yych = *(m_marker = ++m_cursor);
+ if (yych == 'a')
+ {
+ goto basic_json_parser_52;
+ }
+ goto basic_json_parser_5;
+basic_json_parser_24:
+ yyaccept = 0;
+ yych = *(m_marker = ++m_cursor);
+ if (yych == 'u')
+ {
+ goto basic_json_parser_53;
+ }
+ goto basic_json_parser_5;
+basic_json_parser_25:
+ yyaccept = 0;
+ yych = *(m_marker = ++m_cursor);
+ if (yych == 'r')
+ {
+ goto basic_json_parser_54;
+ }
+ goto basic_json_parser_5;
+basic_json_parser_26:
+ ++m_cursor;
+ {
+ last_token_type = token_type::begin_object;
+ break;
+ }
+basic_json_parser_28:
+ ++m_cursor;
+ {
+ last_token_type = token_type::end_object;
+ break;
+ }
+basic_json_parser_30:
+ ++m_cursor;
+ if (m_limit <= m_cursor)
+ {
+ fill_line_buffer(1); // LCOV_EXCL_LINE
+ }
+ yych = *m_cursor;
+basic_json_parser_31:
+ if (yybm[0 + yych] & 128)
+ {
+ goto basic_json_parser_30;
+ }
+ if (yych <= 0xE0)
+ {
+ if (yych <= '\\')
+ {
+ if (yych <= 0x1F)
+ {
+ goto basic_json_parser_32;
+ }
+ if (yych <= '"')
+ {
+ goto basic_json_parser_33;
+ }
+ goto basic_json_parser_35;
+ }
+ else
+ {
+ if (yych <= 0xC1)
+ {
+ goto basic_json_parser_32;
+ }
+ if (yych <= 0xDF)
+ {
+ goto basic_json_parser_36;
+ }
+ goto basic_json_parser_37;
+ }
+ }
+ else
+ {
+ if (yych <= 0xEF)
+ {
+ if (yych == 0xED)
+ {
+ goto basic_json_parser_39;
+ }
+ goto basic_json_parser_38;
+ }
+ else
+ {
+ if (yych <= 0xF0)
+ {
+ goto basic_json_parser_40;
+ }
+ if (yych <= 0xF3)
+ {
+ goto basic_json_parser_41;
+ }
+ if (yych <= 0xF4)
+ {
+ goto basic_json_parser_42;
+ }
+ }
+ }
+basic_json_parser_32:
+ m_cursor = m_marker;
+ if (yyaccept <= 1)
+ {
+ if (yyaccept == 0)
+ {
+ goto basic_json_parser_5;
+ }
+ else
+ {
+ goto basic_json_parser_14;
+ }
+ }
+ else
+ {
+ if (yyaccept == 2)
+ {
+ goto basic_json_parser_44;
+ }
+ else
+ {
+ goto basic_json_parser_58;
+ }
+ }
+basic_json_parser_33:
+ ++m_cursor;
+ {
+ last_token_type = token_type::value_string;
+ break;
+ }
+basic_json_parser_35:
+ ++m_cursor;
+ if (m_limit <= m_cursor)
+ {
+ fill_line_buffer(1); // LCOV_EXCL_LINE
+ }
+ yych = *m_cursor;
+ if (yych <= 'e')
+ {
+ if (yych <= '/')
+ {
+ if (yych == '"')
+ {
+ goto basic_json_parser_30;
+ }
+ if (yych <= '.')
+ {
+ goto basic_json_parser_32;
+ }
+ goto basic_json_parser_30;
+ }
+ else
+ {
+ if (yych <= '\\')
+ {
+ if (yych <= '[')
+ {
+ goto basic_json_parser_32;
+ }
+ goto basic_json_parser_30;
+ }
+ else
+ {
+ if (yych == 'b')
+ {
+ goto basic_json_parser_30;
+ }
+ goto basic_json_parser_32;
+ }
+ }
+ }
+ else
+ {
+ if (yych <= 'q')
+ {
+ if (yych <= 'f')
+ {
+ goto basic_json_parser_30;
+ }
+ if (yych == 'n')
+ {
+ goto basic_json_parser_30;
+ }
+ goto basic_json_parser_32;
+ }
+ else
+ {
+ if (yych <= 's')
+ {
+ if (yych <= 'r')
+ {
+ goto basic_json_parser_30;
+ }
+ goto basic_json_parser_32;
+ }
+ else
+ {
+ if (yych <= 't')
+ {
+ goto basic_json_parser_30;
+ }
+ if (yych <= 'u')
+ {
+ goto basic_json_parser_55;
+ }
+ goto basic_json_parser_32;
+ }
+ }
+ }
+basic_json_parser_36:
+ ++m_cursor;
+ if (m_limit <= m_cursor)
+ {
+ fill_line_buffer(1); // LCOV_EXCL_LINE
+ }
+ yych = *m_cursor;
+ if (yych <= 0x7F)
+ {
+ goto basic_json_parser_32;
+ }
+ if (yych <= 0xBF)
+ {
+ goto basic_json_parser_30;
+ }
+ goto basic_json_parser_32;
+basic_json_parser_37:
+ ++m_cursor;
+ if (m_limit <= m_cursor)
+ {
+ fill_line_buffer(1); // LCOV_EXCL_LINE
+ }
+ yych = *m_cursor;
+ if (yych <= 0x9F)
+ {
+ goto basic_json_parser_32;
+ }
+ if (yych <= 0xBF)
+ {
+ goto basic_json_parser_36;
+ }
+ goto basic_json_parser_32;
+basic_json_parser_38:
+ ++m_cursor;
+ if (m_limit <= m_cursor)
+ {
+ fill_line_buffer(1); // LCOV_EXCL_LINE
+ }
+ yych = *m_cursor;
+ if (yych <= 0x7F)
+ {
+ goto basic_json_parser_32;
+ }
+ if (yych <= 0xBF)
+ {
+ goto basic_json_parser_36;
+ }
+ goto basic_json_parser_32;
+basic_json_parser_39:
+ ++m_cursor;
+ if (m_limit <= m_cursor)
+ {
+ fill_line_buffer(1); // LCOV_EXCL_LINE
+ }
+ yych = *m_cursor;
+ if (yych <= 0x7F)
+ {
+ goto basic_json_parser_32;
+ }
+ if (yych <= 0x9F)
+ {
+ goto basic_json_parser_36;
+ }
+ goto basic_json_parser_32;
+basic_json_parser_40:
+ ++m_cursor;
+ if (m_limit <= m_cursor)
+ {
+ fill_line_buffer(1); // LCOV_EXCL_LINE
+ }
+ yych = *m_cursor;
+ if (yych <= 0x8F)
+ {
+ goto basic_json_parser_32;
+ }
+ if (yych <= 0xBF)
+ {
+ goto basic_json_parser_38;
+ }
+ goto basic_json_parser_32;
+basic_json_parser_41:
+ ++m_cursor;
+ if (m_limit <= m_cursor)
+ {
+ fill_line_buffer(1); // LCOV_EXCL_LINE
+ }
+ yych = *m_cursor;
+ if (yych <= 0x7F)
+ {
+ goto basic_json_parser_32;
+ }
+ if (yych <= 0xBF)
+ {
+ goto basic_json_parser_38;
+ }
+ goto basic_json_parser_32;
+basic_json_parser_42:
+ ++m_cursor;
+ if (m_limit <= m_cursor)
+ {
+ fill_line_buffer(1); // LCOV_EXCL_LINE
+ }
+ yych = *m_cursor;
+ if (yych <= 0x7F)
+ {
+ goto basic_json_parser_32;
+ }
+ if (yych <= 0x8F)
+ {
+ goto basic_json_parser_38;
+ }
+ goto basic_json_parser_32;
+basic_json_parser_43:
+ yyaccept = 2;
+ yych = *(m_marker = ++m_cursor);
+ if (yych <= '9')
+ {
+ if (yych == '.')
+ {
+ goto basic_json_parser_47;
+ }
+ if (yych >= '0')
+ {
+ goto basic_json_parser_48;
+ }
+ }
+ else
+ {
+ if (yych <= 'E')
+ {
+ if (yych >= 'E')
+ {
+ goto basic_json_parser_51;
+ }
+ }
+ else
+ {
+ if (yych == 'e')
+ {
+ goto basic_json_parser_51;
+ }
+ }
+ }
+basic_json_parser_44:
+ {
+ last_token_type = token_type::value_integer;
+ break;
+ }
+basic_json_parser_45:
+ yyaccept = 2;
+ m_marker = ++m_cursor;
+ if ((m_limit - m_cursor) < 3)
+ {
+ fill_line_buffer(3); // LCOV_EXCL_LINE
+ }
+ yych = *m_cursor;
+ if (yych <= '9')
+ {
+ if (yych == '.')
+ {
+ goto basic_json_parser_47;
+ }
+ if (yych <= '/')
+ {
+ goto basic_json_parser_44;
+ }
+ goto basic_json_parser_45;
+ }
+ else
+ {
+ if (yych <= 'E')
+ {
+ if (yych <= 'D')
+ {
+ goto basic_json_parser_44;
+ }
+ goto basic_json_parser_51;
+ }
+ else
+ {
+ if (yych == 'e')
+ {
+ goto basic_json_parser_51;
+ }
+ goto basic_json_parser_44;
+ }
+ }
+basic_json_parser_47:
+ yych = *++m_cursor;
+ if (yych <= '/')
+ {
+ goto basic_json_parser_32;
+ }
+ if (yych <= '9')
+ {
+ goto basic_json_parser_56;
+ }
+ goto basic_json_parser_32;
+basic_json_parser_48:
+ ++m_cursor;
+ if (m_limit <= m_cursor)
+ {
+ fill_line_buffer(1); // LCOV_EXCL_LINE
+ }
+ yych = *m_cursor;
+ if (yych <= '/')
+ {
+ goto basic_json_parser_50;
+ }
+ if (yych <= '9')
+ {
+ goto basic_json_parser_48;
+ }
+basic_json_parser_50:
+ {
+ last_token_type = token_type::parse_error;
+ break;
+ }
+basic_json_parser_51:
+ yych = *++m_cursor;
+ if (yych <= ',')
+ {
+ if (yych == '+')
+ {
+ goto basic_json_parser_59;
+ }
+ goto basic_json_parser_32;
+ }
+ else
+ {
+ if (yych <= '-')
+ {
+ goto basic_json_parser_59;
+ }
+ if (yych <= '/')
+ {
+ goto basic_json_parser_32;
+ }
+ if (yych <= '9')
+ {
+ goto basic_json_parser_60;
+ }
+ goto basic_json_parser_32;
+ }
+basic_json_parser_52:
+ yych = *++m_cursor;
+ if (yych == 'l')
+ {
+ goto basic_json_parser_62;
+ }
+ goto basic_json_parser_32;
+basic_json_parser_53:
+ yych = *++m_cursor;
+ if (yych == 'l')
+ {
+ goto basic_json_parser_63;
+ }
+ goto basic_json_parser_32;
+basic_json_parser_54:
+ yych = *++m_cursor;
+ if (yych == 'u')
+ {
+ goto basic_json_parser_64;
+ }
+ goto basic_json_parser_32;
+basic_json_parser_55:
+ ++m_cursor;
+ if (m_limit <= m_cursor)
+ {
+ fill_line_buffer(1); // LCOV_EXCL_LINE
+ }
+ yych = *m_cursor;
+ if (yych <= '@')
+ {
+ if (yych <= '/')
+ {
+ goto basic_json_parser_32;
+ }
+ if (yych <= '9')
+ {
+ goto basic_json_parser_65;
+ }
+ goto basic_json_parser_32;
+ }
+ else
+ {
+ if (yych <= 'F')
+ {
+ goto basic_json_parser_65;
+ }
+ if (yych <= '`')
+ {
+ goto basic_json_parser_32;
+ }
+ if (yych <= 'f')
+ {
+ goto basic_json_parser_65;
+ }
+ goto basic_json_parser_32;
+ }
+basic_json_parser_56:
+ yyaccept = 3;
+ m_marker = ++m_cursor;
+ if ((m_limit - m_cursor) < 3)
+ {
+ fill_line_buffer(3); // LCOV_EXCL_LINE
+ }
+ yych = *m_cursor;
+ if (yych <= 'D')
+ {
+ if (yych <= '/')
+ {
+ goto basic_json_parser_58;
+ }
+ if (yych <= '9')
+ {
+ goto basic_json_parser_56;
+ }
+ }
+ else
+ {
+ if (yych <= 'E')
+ {
+ goto basic_json_parser_51;
+ }
+ if (yych == 'e')
+ {
+ goto basic_json_parser_51;
+ }
+ }
+basic_json_parser_58:
+ {
+ last_token_type = token_type::value_float;
+ break;
+ }
+basic_json_parser_59:
+ yych = *++m_cursor;
+ if (yych <= '/')
+ {
+ goto basic_json_parser_32;
+ }
+ if (yych >= ':')
+ {
+ goto basic_json_parser_32;
+ }
+basic_json_parser_60:
+ ++m_cursor;
+ if (m_limit <= m_cursor)
+ {
+ fill_line_buffer(1); // LCOV_EXCL_LINE
+ }
+ yych = *m_cursor;
+ if (yych <= '/')
+ {
+ goto basic_json_parser_58;
+ }
+ if (yych <= '9')
+ {
+ goto basic_json_parser_60;
+ }
+ goto basic_json_parser_58;
+basic_json_parser_62:
+ yych = *++m_cursor;
+ if (yych == 's')
+ {
+ goto basic_json_parser_66;
+ }
+ goto basic_json_parser_32;
+basic_json_parser_63:
+ yych = *++m_cursor;
+ if (yych == 'l')
+ {
+ goto basic_json_parser_67;
+ }
+ goto basic_json_parser_32;
+basic_json_parser_64:
+ yych = *++m_cursor;
+ if (yych == 'e')
+ {
+ goto basic_json_parser_69;
+ }
+ goto basic_json_parser_32;
+basic_json_parser_65:
+ ++m_cursor;
+ if (m_limit <= m_cursor)
+ {
+ fill_line_buffer(1); // LCOV_EXCL_LINE
+ }
+ yych = *m_cursor;
+ if (yych <= '@')
+ {
+ if (yych <= '/')
+ {
+ goto basic_json_parser_32;
+ }
+ if (yych <= '9')
+ {
+ goto basic_json_parser_71;
+ }
+ goto basic_json_parser_32;
+ }
+ else
+ {
+ if (yych <= 'F')
+ {
+ goto basic_json_parser_71;
+ }
+ if (yych <= '`')
+ {
+ goto basic_json_parser_32;
+ }
+ if (yych <= 'f')
+ {
+ goto basic_json_parser_71;
+ }
+ goto basic_json_parser_32;
+ }
+basic_json_parser_66:
+ yych = *++m_cursor;
+ if (yych == 'e')
+ {
+ goto basic_json_parser_72;
+ }
+ goto basic_json_parser_32;
+basic_json_parser_67:
+ ++m_cursor;
+ {
+ last_token_type = token_type::literal_null;
+ break;
+ }
+basic_json_parser_69:
+ ++m_cursor;
+ {
+ last_token_type = token_type::literal_true;
+ break;
+ }
+basic_json_parser_71:
+ ++m_cursor;
+ if (m_limit <= m_cursor)
+ {
+ fill_line_buffer(1); // LCOV_EXCL_LINE
+ }
+ yych = *m_cursor;
+ if (yych <= '@')
+ {
+ if (yych <= '/')
+ {
+ goto basic_json_parser_32;
+ }
+ if (yych <= '9')
+ {
+ goto basic_json_parser_74;
+ }
+ goto basic_json_parser_32;
+ }
+ else
+ {
+ if (yych <= 'F')
+ {
+ goto basic_json_parser_74;
+ }
+ if (yych <= '`')
+ {
+ goto basic_json_parser_32;
+ }
+ if (yych <= 'f')
+ {
+ goto basic_json_parser_74;
+ }
+ goto basic_json_parser_32;
+ }
+basic_json_parser_72:
+ ++m_cursor;
+ {
+ last_token_type = token_type::literal_false;
+ break;
+ }
+basic_json_parser_74:
+ ++m_cursor;
+ if (m_limit <= m_cursor)
+ {
+ fill_line_buffer(1); // LCOV_EXCL_LINE
+ }
+ yych = *m_cursor;
+ if (yych <= '@')
+ {
+ if (yych <= '/')
+ {
+ goto basic_json_parser_32;
+ }
+ if (yych <= '9')
+ {
+ goto basic_json_parser_30;
+ }
+ goto basic_json_parser_32;
+ }
+ else
+ {
+ if (yych <= 'F')
+ {
+ goto basic_json_parser_30;
+ }
+ if (yych <= '`')
+ {
+ goto basic_json_parser_32;
+ }
+ if (yych <= 'f')
+ {
+ goto basic_json_parser_30;
+ }
+ goto basic_json_parser_32;
+ }
+ }
+
+ }
+
+ return last_token_type;
+ }
+
+ /*!
+ @brief append data from the stream to the line buffer
+
+ This function is called by the scan() function when the end of the
+ buffer (`m_limit`) is reached and the `m_cursor` pointer cannot be
+ incremented without leaving the limits of the line buffer. Note re2c
+ decides when to call this function.
+
+ If the lexer reads from contiguous storage, there is no trailing null
+ byte. Therefore, this function must make sure to add these padding
+ null bytes.
+
+ If the lexer reads from an input stream, this function reads the next
+ line of the input.
+
+ @pre
+ p p p p p p u u u u u x . . . . . .
+ ^ ^ ^ ^
+ m_content m_start | m_limit
+ m_cursor
+
+ @post
+ u u u u u x x x x x x x . . . . . .
+ ^ ^ ^
+ | m_cursor m_limit
+ m_start
+ m_content
+ */
+ void fill_line_buffer(size_t n = 0)
+ {
+ // if line buffer is used, m_content points to its data
+ assert(m_line_buffer.empty()
+ or m_content == reinterpret_cast<const lexer_char_t*>(m_line_buffer.data()));
+
+ // if line buffer is used, m_limit is set past the end of its data
+ assert(m_line_buffer.empty()
+ or m_limit == m_content + m_line_buffer.size());
+
+ // pointer relationships
+ assert(m_content <= m_start);
+ assert(m_start <= m_cursor);
+ assert(m_cursor <= m_limit);
+ assert(m_marker == nullptr or m_marker <= m_limit);
+
+ // number of processed characters (p)
+ const auto num_processed_chars = static_cast<size_t>(m_start - m_content);
+ // offset for m_marker wrt. to m_start
+ const auto offset_marker = (m_marker == nullptr) ? 0 : m_marker - m_start;
+ // number of unprocessed characters (u)
+ const auto offset_cursor = m_cursor - m_start;
+
+ // no stream is used or end of file is reached
+ if (m_stream == nullptr or m_stream->eof())
+ {
+ // m_start may or may not be pointing into m_line_buffer at
+ // this point. We trust the standard library to do the right
+ // thing. See http://stackoverflow.com/q/28142011/266378
+ m_line_buffer.assign(m_start, m_limit);
+
+ // append n characters to make sure that there is sufficient
+ // space between m_cursor and m_limit
+ m_line_buffer.append(1, '\x00');
+ if (n > 0)
+ {
+ m_line_buffer.append(n - 1, '\x01');
+ }
+ }
+ else
+ {
+ // delete processed characters from line buffer
+ m_line_buffer.erase(0, num_processed_chars);
+ // read next line from input stream
+ m_line_buffer_tmp.clear();
+ std::getline(*m_stream, m_line_buffer_tmp, '\n');
+
+ // add line with newline symbol to the line buffer
+ m_line_buffer += m_line_buffer_tmp;
+ m_line_buffer.push_back('\n');
+ }
+
+ // set pointers
+ m_content = reinterpret_cast<const lexer_char_t*>(m_line_buffer.data());
+ assert(m_content != nullptr);
+ m_start = m_content;
+ m_marker = m_start + offset_marker;
+ m_cursor = m_start + offset_cursor;
+ m_limit = m_start + m_line_buffer.size();
+ }
+
+ /// return string representation of last read token
+ string_t get_token_string() const
+ {
+ assert(m_start != nullptr);
+ return string_t(reinterpret_cast<typename string_t::const_pointer>(m_start),
+ static_cast<size_t>(m_cursor - m_start));
+ }
+
+ /*!
+ @brief return string value for string tokens
+
+ The function iterates the characters between the opening and closing
+ quotes of the string value. The complete string is the range
+ [m_start,m_cursor). Consequently, we iterate from m_start+1 to
+ m_cursor-1.
+
+ We differentiate two cases:
+
+ 1. Escaped characters. In this case, a new character is constructed
+ according to the nature of the escape. Some escapes create new
+ characters (e.g., `"\\n"` is replaced by `"\n"`), some are copied
+ as is (e.g., `"\\\\"`). Furthermore, Unicode escapes of the shape
+ `"\\uxxxx"` need special care. In this case, to_unicode takes care
+ of the construction of the values.
+ 2. Unescaped characters are copied as is.
+
+ @pre `m_cursor - m_start >= 2`, meaning the length of the last token
+ is at least 2 bytes which is trivially true for any string (which
+ consists of at least two quotes).
+
+ " c1 c2 c3 ... "
+ ^ ^
+ m_start m_cursor
+
+ @complexity Linear in the length of the string.\n
+
+ Lemma: The loop body will always terminate.\n
+
+ Proof (by contradiction): Assume the loop body does not terminate. As
+ the loop body does not contain another loop, one of the called
+ functions must never return. The called functions are `std::strtoul`
+ and to_unicode. Neither function can loop forever, so the loop body
+ will never loop forever which contradicts the assumption that the loop
+ body does not terminate, q.e.d.\n
+
+ Lemma: The loop condition for the for loop is eventually false.\n
+
+ Proof (by contradiction): Assume the loop does not terminate. Due to
+ the above lemma, this can only be due to a tautological loop
+ condition; that is, the loop condition i < m_cursor - 1 must always be
+ true. Let x be the change of i for any loop iteration. Then
+ m_start + 1 + x < m_cursor - 1 must hold to loop indefinitely. This
+ can be rephrased to m_cursor - m_start - 2 > x. With the
+ precondition, we x <= 0, meaning that the loop condition holds
+ indefinitely if i is always decreased. However, observe that the value
+ of i is strictly increasing with each iteration, as it is incremented
+ by 1 in the iteration expression and never decremented inside the loop
+ body. Hence, the loop condition will eventually be false which
+ contradicts the assumption that the loop condition is a tautology,
+ q.e.d.
+
+ @return string value of current token without opening and closing
+ quotes
+ @throw std::out_of_range if to_unicode fails
+ */
+ string_t get_string() const
+ {
+ assert(m_cursor - m_start >= 2);
+
+ string_t result;
+ result.reserve(static_cast<size_t>(m_cursor - m_start - 2));
+
+ // iterate the result between the quotes
+ for (const lexer_char_t* i = m_start + 1; i < m_cursor - 1; ++i)
+ {
+ // find next escape character
+ auto e = std::find(i, m_cursor - 1, '\\');
+ if (e != i)
+ {
+ // see https://github.com/nlohmann/json/issues/365#issuecomment-262874705
+ for (auto k = i; k < e; k++)
+ {
+ result.push_back(static_cast<typename string_t::value_type>(*k));
+ }
+ i = e - 1; // -1 because of ++i
+ }
+ else
+ {
+ // processing escaped character
+ // read next character
+ ++i;
+
+ switch (*i)
+ {
+ // the default escapes
+ case 't':
+ {
+ result += "\t";
+ break;
+ }
+ case 'b':
+ {
+ result += "\b";
+ break;
+ }
+ case 'f':
+ {
+ result += "\f";
+ break;
+ }
+ case 'n':
+ {
+ result += "\n";
+ break;
+ }
+ case 'r':
+ {
+ result += "\r";
+ break;
+ }
+ case '\\':
+ {
+ result += "\\";
+ break;
+ }
+ case '/':
+ {
+ result += "/";
+ break;
+ }
+ case '"':
+ {
+ result += "\"";
+ break;
+ }
+
+ // unicode
+ case 'u':
+ {
+ // get code xxxx from uxxxx
+ auto codepoint = std::strtoul(std::string(reinterpret_cast<typename string_t::const_pointer>(i + 1),
+ 4).c_str(), nullptr, 16);
+
+ // check if codepoint is a high surrogate
+ if (codepoint >= 0xD800 and codepoint <= 0xDBFF)
+ {
+ // make sure there is a subsequent unicode
+ if ((i + 6 >= m_limit) or * (i + 5) != '\\' or * (i + 6) != 'u')
+ {
+ JSON_THROW(std::invalid_argument("missing low surrogate"));
+ }
+
+ // get code yyyy from uxxxx\uyyyy
+ auto codepoint2 = std::strtoul(std::string(reinterpret_cast<typename string_t::const_pointer>
+ (i + 7), 4).c_str(), nullptr, 16);
+ result += to_unicode(codepoint, codepoint2);
+ // skip the next 10 characters (xxxx\uyyyy)
+ i += 10;
+ }
+ else if (codepoint >= 0xDC00 and codepoint <= 0xDFFF)
+ {
+ // we found a lone low surrogate
+ JSON_THROW(std::invalid_argument("missing high surrogate"));
+ }
+ else
+ {
+ // add unicode character(s)
+ result += to_unicode(codepoint);
+ // skip the next four characters (xxxx)
+ i += 4;
+ }
+ break;
+ }
+ }
+ }
+ }
+
+ return result;
+ }
+
+
+ /*!
+ @brief parse string into a built-in arithmetic type as if the current
+ locale is POSIX.
+
+ @note in floating-point case strtod may parse past the token's end -
+ this is not an error
+
+ @note any leading blanks are not handled
+ */
+ struct strtonum
+ {
+ public:
+ strtonum(const char* start, const char* end)
+ : m_start(start), m_end(end)
+ {}
+
+ /*!
+ @return true iff parsed successfully as number of type T
+
+ @param[in,out] val shall contain parsed value, or undefined value
+ if could not parse
+ */
+ template<typename T, typename = typename std::enable_if<std::is_arithmetic<T>::value>::type>
+ bool to(T& val) const
+ {
+ return parse(val, std::is_integral<T>());
+ }
+
+ private:
+ const char* const m_start = nullptr;
+ const char* const m_end = nullptr;
+
+ // floating-point conversion
+
+ // overloaded wrappers for strtod/strtof/strtold
+ // that will be called from parse<floating_point_t>
+ static void strtof(float& f, const char* str, char** endptr)
+ {
+ f = std::strtof(str, endptr);
+ }
+
+ static void strtof(double& f, const char* str, char** endptr)
+ {
+ f = std::strtod(str, endptr);
+ }
+
+ static void strtof(long double& f, const char* str, char** endptr)
+ {
+ f = std::strtold(str, endptr);
+ }
+
+ template<typename T>
+ bool parse(T& value, /*is_integral=*/std::false_type) const
+ {
+ // replace decimal separator with locale-specific version,
+ // when necessary; data will point to either the original
+ // string, or buf, or tempstr containing the fixed string.
+ std::string tempstr;
+ std::array<char, 64> buf;
+ const size_t len = static_cast<size_t>(m_end - m_start);
+
+ // lexer will reject empty numbers
+ assert(len > 0);
+
+ // since dealing with strtod family of functions, we're
+ // getting the decimal point char from the C locale facilities
+ // instead of C++'s numpunct facet of the current std::locale
+ const auto loc = localeconv();
+ assert(loc != nullptr);
+ const char decimal_point_char = (loc->decimal_point == nullptr) ? '.' : loc->decimal_point[0];
+
+ const char* data = m_start;
+
+ if (decimal_point_char != '.')
+ {
+ const size_t ds_pos = static_cast<size_t>(std::find(m_start, m_end, '.') - m_start);
+
+ if (ds_pos != len)
+ {
+ // copy the data into the local buffer or tempstr, if
+ // buffer is too small; replace decimal separator, and
+ // update data to point to the modified bytes
+ if ((len + 1) < buf.size())
+ {
+ std::copy(m_start, m_end, buf.begin());
+ buf[len] = 0;
+ buf[ds_pos] = decimal_point_char;
+ data = buf.data();
+ }
+ else
+ {
+ tempstr.assign(m_start, m_end);
+ tempstr[ds_pos] = decimal_point_char;
+ data = tempstr.c_str();
+ }
+ }
+ }
+
+ char* endptr = nullptr;
+ value = 0;
+ // this calls appropriate overload depending on T
+ strtof(value, data, &endptr);
+
+ // parsing was successful iff strtof parsed exactly the number
+ // of characters determined by the lexer (len)
+ const bool ok = (endptr == (data + len));
+
+ if (ok and (value == static_cast<T>(0.0)) and (*data == '-'))
+ {
+ // some implementations forget to negate the zero
+ value = -0.0;
+ }
+
+ return ok;
+ }
+
+ // integral conversion
+
+ signed long long parse_integral(char** endptr, /*is_signed*/std::true_type) const
+ {
+ return std::strtoll(m_start, endptr, 10);
+ }
+
+ unsigned long long parse_integral(char** endptr, /*is_signed*/std::false_type) const
+ {
+ return std::strtoull(m_start, endptr, 10);
+ }
+
+ template<typename T>
+ bool parse(T& value, /*is_integral=*/std::true_type) const
+ {
+ char* endptr = nullptr;
+ errno = 0; // these are thread-local
+ const auto x = parse_integral(&endptr, std::is_signed<T>());
+
+ // called right overload?
+ static_assert(std::is_signed<T>() == std::is_signed<decltype(x)>(), "");
+
+ value = static_cast<T>(x);
+
+ return (x == static_cast<decltype(x)>(value)) // x fits into destination T
+ and (x < 0) == (value < 0) // preserved sign
+ //and ((x != 0) or is_integral()) // strto[u]ll did nto fail
+ and (errno == 0) // strto[u]ll did not overflow
+ and (m_start < m_end) // token was not empty
+ and (endptr == m_end); // parsed entire token exactly
+ }
+ };
+
+ /*!
+ @brief return number value for number tokens
+
+ This function translates the last token into the most appropriate
+ number type (either integer, unsigned integer or floating point),
+ which is passed back to the caller via the result parameter.
+
+ integral numbers that don't fit into the the range of the respective
+ type are parsed as number_float_t
+
+ floating-point values do not satisfy std::isfinite predicate
+ are converted to value_t::null
+
+ throws if the entire string [m_start .. m_cursor) cannot be
+ interpreted as a number
+
+ @param[out] result @ref basic_json object to receive the number.
+ @param[in] token the type of the number token
+ */
+ bool get_number(basic_json& result, const token_type token) const
+ {
+ assert(m_start != nullptr);
+ assert(m_start < m_cursor);
+ assert((token == token_type::value_unsigned) or
+ (token == token_type::value_integer) or
+ (token == token_type::value_float));
+
+ strtonum num_converter(reinterpret_cast<const char*>(m_start),
+ reinterpret_cast<const char*>(m_cursor));
+
+ switch (token)
+ {
+ case lexer::token_type::value_unsigned:
+ {
+ number_unsigned_t val;
+ if (num_converter.to(val))
+ {
+ // parsing successful
+ result.m_type = value_t::number_unsigned;
+ result.m_value = val;
+ return true;
+ }
+ break;
+ }
+
+ case lexer::token_type::value_integer:
+ {
+ number_integer_t val;
+ if (num_converter.to(val))
+ {
+ // parsing successful
+ result.m_type = value_t::number_integer;
+ result.m_value = val;
+ return true;
+ }
+ break;
+ }
+
+ default:
+ {
+ break;
+ }
+ }
+
+ // parse float (either explicitly or because a previous conversion
+ // failed)
+ number_float_t val;
+ if (num_converter.to(val))
+ {
+ // parsing successful
+ result.m_type = value_t::number_float;
+ result.m_value = val;
+
+ // replace infinity and NAN by null
+ if (not std::isfinite(result.m_value.number_float))
+ {
+ result.m_type = value_t::null;
+ result.m_value = basic_json::json_value();
+ }
+
+ return true;
+ }
+
+ // couldn't parse number in any format
+ return false;
+ }
+
+ private:
+ /// optional input stream
+ std::istream* m_stream = nullptr;
+ /// line buffer buffer for m_stream
+ string_t m_line_buffer {};
+ /// used for filling m_line_buffer
+ string_t m_line_buffer_tmp {};
+ /// the buffer pointer
+ const lexer_char_t* m_content = nullptr;
+ /// pointer to the beginning of the current symbol
+ const lexer_char_t* m_start = nullptr;
+ /// pointer for backtracking information
+ const lexer_char_t* m_marker = nullptr;
+ /// pointer to the current symbol
+ const lexer_char_t* m_cursor = nullptr;
+ /// pointer to the end of the buffer
+ const lexer_char_t* m_limit = nullptr;
+ /// the last token type
+ token_type last_token_type = token_type::end_of_input;
+ };
+
+ /*!
+ @brief syntax analysis
+
+ This class implements a recursive decent parser.
+ */
+ class parser
+ {
+ public:
+ /// a parser reading from a string literal
+ parser(const char* buff, const parser_callback_t cb = nullptr)
+ : callback(cb),
+ m_lexer(reinterpret_cast<const typename lexer::lexer_char_t*>(buff), std::strlen(buff))
+ {}
+
+ /// a parser reading from an input stream
+ parser(std::istream& is, const parser_callback_t cb = nullptr)
+ : callback(cb), m_lexer(is)
+ {}
+
+ /// a parser reading from an iterator range with contiguous storage
+ template<class IteratorType, typename std::enable_if<
+ std::is_same<typename std::iterator_traits<IteratorType>::iterator_category, std::random_access_iterator_tag>::value
+ , int>::type
+ = 0>
+ parser(IteratorType first, IteratorType last, const parser_callback_t cb = nullptr)
+ : callback(cb),
+ m_lexer(reinterpret_cast<const typename lexer::lexer_char_t*>(&(*first)),
+ static_cast<size_t>(std::distance(first, last)))
+ {}
+
+ /// public parser interface
+ basic_json parse()
+ {
+ // read first token
+ get_token();
+
+ basic_json result = parse_internal(true);
+ result.assert_invariant();
+
+ expect(lexer::token_type::end_of_input);
+
+ // return parser result and replace it with null in case the
+ // top-level value was discarded by the callback function
+ return result.is_discarded() ? basic_json() : std::move(result);
+ }
+
+ private:
+ /// the actual parser
+ basic_json parse_internal(bool keep)
+ {
+ auto result = basic_json(value_t::discarded);
+
+ switch (last_token)
+ {
+ case lexer::token_type::begin_object:
+ {
+ if (keep and (not callback
+ or ((keep = callback(depth++, parse_event_t::object_start, result)) != 0)))
+ {
+ // explicitly set result to object to cope with {}
+ result.m_type = value_t::object;
+ result.m_value = value_t::object;
+ }
+
+ // read next token
+ get_token();
+
+ // closing } -> we are done
+ if (last_token == lexer::token_type::end_object)
+ {
+ get_token();
+ if (keep and callback and not callback(--depth, parse_event_t::object_end, result))
+ {
+ result = basic_json(value_t::discarded);
+ }
+ return result;
+ }
+
+ // no comma is expected here
+ unexpect(lexer::token_type::value_separator);
+
+ // otherwise: parse key-value pairs
+ do
+ {
+ // ugly, but could be fixed with loop reorganization
+ if (last_token == lexer::token_type::value_separator)
+ {
+ get_token();
+ }
+
+ // store key
+ expect(lexer::token_type::value_string);
+ const auto key = m_lexer.get_string();
+
+ bool keep_tag = false;
+ if (keep)
+ {
+ if (callback)
+ {
+ basic_json k(key);
+ keep_tag = callback(depth, parse_event_t::key, k);
+ }
+ else
+ {
+ keep_tag = true;
+ }
+ }
+
+ // parse separator (:)
+ get_token();
+ expect(lexer::token_type::name_separator);
+
+ // parse and add value
+ get_token();
+ auto value = parse_internal(keep);
+ if (keep and keep_tag and not value.is_discarded())
+ {
+ result[key] = std::move(value);
+ }
+ }
+ while (last_token == lexer::token_type::value_separator);
+
+ // closing }
+ expect(lexer::token_type::end_object);
+ get_token();
+ if (keep and callback and not callback(--depth, parse_event_t::object_end, result))
+ {
+ result = basic_json(value_t::discarded);
+ }
+
+ return result;
+ }
+
+ case lexer::token_type::begin_array:
+ {
+ if (keep and (not callback
+ or ((keep = callback(depth++, parse_event_t::array_start, result)) != 0)))
+ {
+ // explicitly set result to object to cope with []
+ result.m_type = value_t::array;
+ result.m_value = value_t::array;
+ }
+
+ // read next token
+ get_token();
+
+ // closing ] -> we are done
+ if (last_token == lexer::token_type::end_array)
+ {
+ get_token();
+ if (callback and not callback(--depth, parse_event_t::array_end, result))
+ {
+ result = basic_json(value_t::discarded);
+ }
+ return result;
+ }
+
+ // no comma is expected here
+ unexpect(lexer::token_type::value_separator);
+
+ // otherwise: parse values
+ do
+ {
+ // ugly, but could be fixed with loop reorganization
+ if (last_token == lexer::token_type::value_separator)
+ {
+ get_token();
+ }
+
+ // parse value
+ auto value = parse_internal(keep);
+ if (keep and not value.is_discarded())
+ {
+ result.push_back(std::move(value));
+ }
+ }
+ while (last_token == lexer::token_type::value_separator);
+
+ // closing ]
+ expect(lexer::token_type::end_array);
+ get_token();
+ if (keep and callback and not callback(--depth, parse_event_t::array_end, result))
+ {
+ result = basic_json(value_t::discarded);
+ }
+
+ return result;
+ }
+
+ case lexer::token_type::literal_null:
+ {
+ get_token();
+ result.m_type = value_t::null;
+ break;
+ }
+
+ case lexer::token_type::value_string:
+ {
+ const auto s = m_lexer.get_string();
+ get_token();
+ result = basic_json(s);
+ break;
+ }
+
+ case lexer::token_type::literal_true:
+ {
+ get_token();
+ result.m_type = value_t::boolean;
+ result.m_value = true;
+ break;
+ }
+
+ case lexer::token_type::literal_false:
+ {
+ get_token();
+ result.m_type = value_t::boolean;
+ result.m_value = false;
+ break;
+ }
+
+ case lexer::token_type::value_unsigned:
+ case lexer::token_type::value_integer:
+ case lexer::token_type::value_float:
+ {
+ m_lexer.get_number(result, last_token);
+ get_token();
+ break;
+ }
+
+ default:
+ {
+ // the last token was unexpected
+ unexpect(last_token);
+ }
+ }
+
+ if (keep and callback and not callback(depth, parse_event_t::value, result))
+ {
+ result = basic_json(value_t::discarded);
+ }
+ return result;
+ }
+
+ /// get next token from lexer
+ typename lexer::token_type get_token()
+ {
+ last_token = m_lexer.scan();
+ return last_token;
+ }
+
+ void expect(typename lexer::token_type t) const
+ {
+ if (t != last_token)
+ {
+ std::string error_msg = "parse error - unexpected ";
+ error_msg += (last_token == lexer::token_type::parse_error ? ("'" + m_lexer.get_token_string() +
+ "'") :
+ lexer::token_type_name(last_token));
+ error_msg += "; expected " + lexer::token_type_name(t);
+ JSON_THROW(std::invalid_argument(error_msg));
+ }
+ }
+
+ void unexpect(typename lexer::token_type t) const
+ {
+ if (t == last_token)
+ {
+ std::string error_msg = "parse error - unexpected ";
+ error_msg += (last_token == lexer::token_type::parse_error ? ("'" + m_lexer.get_token_string() +
+ "'") :
+ lexer::token_type_name(last_token));
+ JSON_THROW(std::invalid_argument(error_msg));
+ }
+ }
+
+ private:
+ /// current level of recursion
+ int depth = 0;
+ /// callback function
+ const parser_callback_t callback = nullptr;
+ /// the type of the last read token
+ typename lexer::token_type last_token = lexer::token_type::uninitialized;
+ /// the lexer
+ lexer m_lexer;
+ };
+
+ public:
+ /*!
+ @brief JSON Pointer
+
+ A JSON pointer defines a string syntax for identifying a specific value
+ within a JSON document. It can be used with functions `at` and
+ `operator[]`. Furthermore, JSON pointers are the base for JSON patches.
+
+ @sa [RFC 6901](https://tools.ietf.org/html/rfc6901)
+
+ @since version 2.0.0
+ */
+ class json_pointer
+ {
+ /// allow basic_json to access private members
+ friend class basic_json;
+
+ public:
+ /*!
+ @brief create JSON pointer
+
+ Create a JSON pointer according to the syntax described in
+ [Section 3 of RFC6901](https://tools.ietf.org/html/rfc6901#section-3).
+
+ @param[in] s string representing the JSON pointer; if omitted, the
+ empty string is assumed which references the whole JSON
+ value
+
+ @throw std::domain_error if reference token is nonempty and does not
+ begin with a slash (`/`); example: `"JSON pointer must be empty or
+ begin with /"`
+ @throw std::domain_error if a tilde (`~`) is not followed by `0`
+ (representing `~`) or `1` (representing `/`); example: `"escape error:
+ ~ must be followed with 0 or 1"`
+
+ @liveexample{The example shows the construction several valid JSON
+ pointers as well as the exceptional behavior.,json_pointer}
+
+ @since version 2.0.0
+ */
+ explicit json_pointer(const std::string& s = "")
+ : reference_tokens(split(s))
+ {}
+
+ /*!
+ @brief return a string representation of the JSON pointer
+
+ @invariant For each JSON pointer `ptr`, it holds:
+ @code {.cpp}
+ ptr == json_pointer(ptr.to_string());
+ @endcode
+
+ @return a string representation of the JSON pointer
+
+ @liveexample{The example shows the result of `to_string`.,
+ json_pointer__to_string}
+
+ @since version 2.0.0
+ */
+ std::string to_string() const noexcept
+ {
+ return std::accumulate(reference_tokens.begin(),
+ reference_tokens.end(), std::string{},
+ [](const std::string & a, const std::string & b)
+ {
+ return a + "/" + escape(b);
+ });
+ }
+
+ /// @copydoc to_string()
+ operator std::string() const
+ {
+ return to_string();
+ }
+
+ private:
+ /// remove and return last reference pointer
+ std::string pop_back()
+ {
+ if (is_root())
+ {
+ JSON_THROW(std::domain_error("JSON pointer has no parent"));
+ }
+
+ auto last = reference_tokens.back();
+ reference_tokens.pop_back();
+ return last;
+ }
+
+ /// return whether pointer points to the root document
+ bool is_root() const
+ {
+ return reference_tokens.empty();
+ }
+
+ json_pointer top() const
+ {
+ if (is_root())
+ {
+ JSON_THROW(std::domain_error("JSON pointer has no parent"));
+ }
+
+ json_pointer result = *this;
+ result.reference_tokens = {reference_tokens[0]};
+ return result;
+ }
+
+ /*!
+ @brief create and return a reference to the pointed to value
+
+ @complexity Linear in the number of reference tokens.
+ */
+ reference get_and_create(reference j) const
+ {
+ pointer result = &j;
+
+ // in case no reference tokens exist, return a reference to the
+ // JSON value j which will be overwritten by a primitive value
+ for (const auto& reference_token : reference_tokens)
+ {
+ switch (result->m_type)
+ {
+ case value_t::null:
+ {
+ if (reference_token == "0")
+ {
+ // start a new array if reference token is 0
+ result = &result->operator[](0);
+ }
+ else
+ {
+ // start a new object otherwise
+ result = &result->operator[](reference_token);
+ }
+ break;
+ }
+
+ case value_t::object:
+ {
+ // create an entry in the object
+ result = &result->operator[](reference_token);
+ break;
+ }
+
+ case value_t::array:
+ {
+ // create an entry in the array
+ result = &result->operator[](static_cast<size_type>(std::stoi(reference_token)));
+ break;
+ }
+
+ /*
+ The following code is only reached if there exists a
+ reference token _and_ the current value is primitive. In
+ this case, we have an error situation, because primitive
+ values may only occur as single value; that is, with an
+ empty list of reference tokens.
+ */
+ default:
+ {
+ JSON_THROW(std::domain_error("invalid value to unflatten"));
+ }
+ }
+ }
+
+ return *result;
+ }
+
+ /*!
+ @brief return a reference to the pointed to value
+
+ @note This version does not throw if a value is not present, but tries
+ to create nested values instead. For instance, calling this function
+ with pointer `"/this/that"` on a null value is equivalent to calling
+ `operator[]("this").operator[]("that")` on that value, effectively
+ changing the null value to an object.
+
+ @param[in] ptr a JSON value
+
+ @return reference to the JSON value pointed to by the JSON pointer
+
+ @complexity Linear in the length of the JSON pointer.
+
+ @throw std::out_of_range if the JSON pointer can not be resolved
+ @throw std::domain_error if an array index begins with '0'
+ @throw std::invalid_argument if an array index was not a number
+ */
+ reference get_unchecked(pointer ptr) const
+ {
+ for (const auto& reference_token : reference_tokens)
+ {
+ // convert null values to arrays or objects before continuing
+ if (ptr->m_type == value_t::null)
+ {
+ // check if reference token is a number
+ const bool nums = std::all_of(reference_token.begin(),
+ reference_token.end(),
+ [](const char x)
+ {
+ return std::isdigit(x);
+ });
+
+ // change value to array for numbers or "-" or to object
+ // otherwise
+ if (nums or reference_token == "-")
+ {
+ *ptr = value_t::array;
+ }
+ else
+ {
+ *ptr = value_t::object;
+ }
+ }
+
+ switch (ptr->m_type)
+ {
+ case value_t::object:
+ {
+ // use unchecked object access
+ ptr = &ptr->operator[](reference_token);
+ break;
+ }
+
+ case value_t::array:
+ {
+ // error condition (cf. RFC 6901, Sect. 4)
+ if (reference_token.size() > 1 and reference_token[0] == '0')
+ {
+ JSON_THROW(std::domain_error("array index must not begin with '0'"));
+ }
+
+ if (reference_token == "-")
+ {
+ // explicitly treat "-" as index beyond the end
+ ptr = &ptr->operator[](ptr->m_value.array->size());
+ }
+ else
+ {
+ // convert array index to number; unchecked access
+ ptr = &ptr->operator[](static_cast<size_type>(std::stoi(reference_token)));
+ }
+ break;
+ }
+
+ default:
+ {
+ JSON_THROW(std::out_of_range("unresolved reference token '" + reference_token + "'"));
+ }
+ }
+ }
+
+ return *ptr;
+ }
+
+ reference get_checked(pointer ptr) const
+ {
+ for (const auto& reference_token : reference_tokens)
+ {
+ switch (ptr->m_type)
+ {
+ case value_t::object:
+ {
+ // note: at performs range check
+ ptr = &ptr->at(reference_token);
+ break;
+ }
+
+ case value_t::array:
+ {
+ if (reference_token == "-")
+ {
+ // "-" always fails the range check
+ JSON_THROW(std::out_of_range("array index '-' (" +
+ std::to_string(ptr->m_value.array->size()) +
+ ") is out of range"));
+ }
+
+ // error condition (cf. RFC 6901, Sect. 4)
+ if (reference_token.size() > 1 and reference_token[0] == '0')
+ {
+ JSON_THROW(std::domain_error("array index must not begin with '0'"));
+ }
+
+ // note: at performs range check
+ ptr = &ptr->at(static_cast<size_type>(std::stoi(reference_token)));
+ break;
+ }
+
+ default:
+ {
+ JSON_THROW(std::out_of_range("unresolved reference token '" + reference_token + "'"));
+ }
+ }
+ }
+
+ return *ptr;
+ }
+
+ /*!
+ @brief return a const reference to the pointed to value
+
+ @param[in] ptr a JSON value
+
+ @return const reference to the JSON value pointed to by the JSON
+ pointer
+ */
+ const_reference get_unchecked(const_pointer ptr) const
+ {
+ for (const auto& reference_token : reference_tokens)
+ {
+ switch (ptr->m_type)
+ {
+ case value_t::object:
+ {
+ // use unchecked object access
+ ptr = &ptr->operator[](reference_token);
+ break;
+ }
+
+ case value_t::array:
+ {
+ if (reference_token == "-")
+ {
+ // "-" cannot be used for const access
+ JSON_THROW(std::out_of_range("array index '-' (" +
+ std::to_string(ptr->m_value.array->size()) +
+ ") is out of range"));
+ }
+
+ // error condition (cf. RFC 6901, Sect. 4)
+ if (reference_token.size() > 1 and reference_token[0] == '0')
+ {
+ JSON_THROW(std::domain_error("array index must not begin with '0'"));
+ }
+
+ // use unchecked array access
+ ptr = &ptr->operator[](static_cast<size_type>(std::stoi(reference_token)));
+ break;
+ }
+
+ default:
+ {
+ JSON_THROW(std::out_of_range("unresolved reference token '" + reference_token + "'"));
+ }
+ }
+ }
+
+ return *ptr;
+ }
+
+ const_reference get_checked(const_pointer ptr) const
+ {
+ for (const auto& reference_token : reference_tokens)
+ {
+ switch (ptr->m_type)
+ {
+ case value_t::object:
+ {
+ // note: at performs range check
+ ptr = &ptr->at(reference_token);
+ break;
+ }
+
+ case value_t::array:
+ {
+ if (reference_token == "-")
+ {
+ // "-" always fails the range check
+ JSON_THROW(std::out_of_range("array index '-' (" +
+ std::to_string(ptr->m_value.array->size()) +
+ ") is out of range"));
+ }
+
+ // error condition (cf. RFC 6901, Sect. 4)
+ if (reference_token.size() > 1 and reference_token[0] == '0')
+ {
+ JSON_THROW(std::domain_error("array index must not begin with '0'"));
+ }
+
+ // note: at performs range check
+ ptr = &ptr->at(static_cast<size_type>(std::stoi(reference_token)));
+ break;
+ }
+
+ default:
+ {
+ JSON_THROW(std::out_of_range("unresolved reference token '" + reference_token + "'"));
+ }
+ }
+ }
+
+ return *ptr;
+ }
+
+ /// split the string input to reference tokens
+ static std::vector<std::string> split(const std::string& reference_string)
+ {
+ std::vector<std::string> result;
+
+ // special case: empty reference string -> no reference tokens
+ if (reference_string.empty())
+ {
+ return result;
+ }
+
+ // check if nonempty reference string begins with slash
+ if (reference_string[0] != '/')
+ {
+ JSON_THROW(std::domain_error("JSON pointer must be empty or begin with '/'"));
+ }
+
+ // extract the reference tokens:
+ // - slash: position of the last read slash (or end of string)
+ // - start: position after the previous slash
+ for (
+ // search for the first slash after the first character
+ size_t slash = reference_string.find_first_of('/', 1),
+ // set the beginning of the first reference token
+ start = 1;
+ // we can stop if start == string::npos+1 = 0
+ start != 0;
+ // set the beginning of the next reference token
+ // (will eventually be 0 if slash == std::string::npos)
+ start = slash + 1,
+ // find next slash
+ slash = reference_string.find_first_of('/', start))
+ {
+ // use the text between the beginning of the reference token
+ // (start) and the last slash (slash).
+ auto reference_token = reference_string.substr(start, slash - start);
+
+ // check reference tokens are properly escaped
+ for (size_t pos = reference_token.find_first_of('~');
+ pos != std::string::npos;
+ pos = reference_token.find_first_of('~', pos + 1))
+ {
+ assert(reference_token[pos] == '~');
+
+ // ~ must be followed by 0 or 1
+ if (pos == reference_token.size() - 1 or
+ (reference_token[pos + 1] != '0' and
+ reference_token[pos + 1] != '1'))
+ {
+ JSON_THROW(std::domain_error("escape error: '~' must be followed with '0' or '1'"));
+ }
+ }
+
+ // finally, store the reference token
+ unescape(reference_token);
+ result.push_back(reference_token);
+ }
+
+ return result;
+ }
+
+ private:
+ /*!
+ @brief replace all occurrences of a substring by another string
+
+ @param[in,out] s the string to manipulate; changed so that all
+ occurrences of @a f are replaced with @a t
+ @param[in] f the substring to replace with @a t
+ @param[in] t the string to replace @a f
+
+ @pre The search string @a f must not be empty.
+
+ @since version 2.0.0
+ */
+ static void replace_substring(std::string& s,
+ const std::string& f,
+ const std::string& t)
+ {
+ assert(not f.empty());
+
+ for (
+ size_t pos = s.find(f); // find first occurrence of f
+ pos != std::string::npos; // make sure f was found
+ s.replace(pos, f.size(), t), // replace with t
+ pos = s.find(f, pos + t.size()) // find next occurrence of f
+ );
+ }
+
+ /// escape tilde and slash
+ static std::string escape(std::string s)
+ {
+ // escape "~"" to "~0" and "/" to "~1"
+ replace_substring(s, "~", "~0");
+ replace_substring(s, "/", "~1");
+ return s;
+ }
+
+ /// unescape tilde and slash
+ static void unescape(std::string& s)
+ {
+ // first transform any occurrence of the sequence '~1' to '/'
+ replace_substring(s, "~1", "/");
+ // then transform any occurrence of the sequence '~0' to '~'
+ replace_substring(s, "~0", "~");
+ }
+
+ /*!
+ @param[in] reference_string the reference string to the current value
+ @param[in] value the value to consider
+ @param[in,out] result the result object to insert values to
+
+ @note Empty objects or arrays are flattened to `null`.
+ */
+ static void flatten(const std::string& reference_string,
+ const basic_json& value,
+ basic_json& result)
+ {
+ switch (value.m_type)
+ {
+ case value_t::array:
+ {
+ if (value.m_value.array->empty())
+ {
+ // flatten empty array as null
+ result[reference_string] = nullptr;
+ }
+ else
+ {
+ // iterate array and use index as reference string
+ for (size_t i = 0; i < value.m_value.array->size(); ++i)
+ {
+ flatten(reference_string + "/" + std::to_string(i),
+ value.m_value.array->operator[](i), result);
+ }
+ }
+ break;
+ }
+
+ case value_t::object:
+ {
+ if (value.m_value.object->empty())
+ {
+ // flatten empty object as null
+ result[reference_string] = nullptr;
+ }
+ else
+ {
+ // iterate object and use keys as reference string
+ for (const auto& element : *value.m_value.object)
+ {
+ flatten(reference_string + "/" + escape(element.first),
+ element.second, result);
+ }
+ }
+ break;
+ }
+
+ default:
+ {
+ // add primitive value with its reference string
+ result[reference_string] = value;
+ break;
+ }
+ }
+ }
+
+ /*!
+ @param[in] value flattened JSON
+
+ @return unflattened JSON
+ */
+ static basic_json unflatten(const basic_json& value)
+ {
+ if (not value.is_object())
+ {
+ JSON_THROW(std::domain_error("only objects can be unflattened"));
+ }
+
+ basic_json result;
+
+ // iterate the JSON object values
+ for (const auto& element : *value.m_value.object)
+ {
+ if (not element.second.is_primitive())
+ {
+ JSON_THROW(std::domain_error("values in object must be primitive"));
+ }
+
+ // assign value to reference pointed to by JSON pointer; Note
+ // that if the JSON pointer is "" (i.e., points to the whole
+ // value), function get_and_create returns a reference to
+ // result itself. An assignment will then create a primitive
+ // value.
+ json_pointer(element.first).get_and_create(result) = element.second;
+ }
+
+ return result;
+ }
+
+ private:
+ friend bool operator==(json_pointer const& lhs,
+ json_pointer const& rhs) noexcept
+ {
+ return lhs.reference_tokens == rhs.reference_tokens;
+ }
+
+ friend bool operator!=(json_pointer const& lhs,
+ json_pointer const& rhs) noexcept
+ {
+ return !(lhs == rhs);
+ }
+
+ /// the reference tokens
+ std::vector<std::string> reference_tokens {};
+ };
+
+ //////////////////////////
+ // JSON Pointer support //
+ //////////////////////////
+
+ /// @name JSON Pointer functions
+ /// @{
+
+ /*!
+ @brief access specified element via JSON Pointer
+
+ Uses a JSON pointer to retrieve a reference to the respective JSON value.
+ No bound checking is performed. Similar to @ref operator[](const typename
+ object_t::key_type&), `null` values are created in arrays and objects if
+ necessary.
+
+ In particular:
+ - If the JSON pointer points to an object key that does not exist, it
+ is created an filled with a `null` value before a reference to it
+ is returned.
+ - If the JSON pointer points to an array index that does not exist, it
+ is created an filled with a `null` value before a reference to it
+ is returned. All indices between the current maximum and the given
+ index are also filled with `null`.
+ - The special value `-` is treated as a synonym for the index past the
+ end.
+
+ @param[in] ptr a JSON pointer
+
+ @return reference to the element pointed to by @a ptr
+
+ @complexity Constant.
+
+ @throw std::out_of_range if the JSON pointer can not be resolved
+ @throw std::domain_error if an array index begins with '0'
+ @throw std::invalid_argument if an array index was not a number
+
+ @liveexample{The behavior is shown in the example.,operatorjson_pointer}
+
+ @since version 2.0.0
+ */
+ reference operator[](const json_pointer& ptr)
+ {
+ return ptr.get_unchecked(this);
+ }
+
+ /*!
+ @brief access specified element via JSON Pointer
+
+ Uses a JSON pointer to retrieve a reference to the respective JSON value.
+ No bound checking is performed. The function does not change the JSON
+ value; no `null` values are created. In particular, the the special value
+ `-` yields an exception.
+
+ @param[in] ptr JSON pointer to the desired element
+
+ @return const reference to the element pointed to by @a ptr
+
+ @complexity Constant.
+
+ @throw std::out_of_range if the JSON pointer can not be resolved
+ @throw std::domain_error if an array index begins with '0'
+ @throw std::invalid_argument if an array index was not a number
+
+ @liveexample{The behavior is shown in the example.,operatorjson_pointer_const}
+
+ @since version 2.0.0
+ */
+ const_reference operator[](const json_pointer& ptr) const
+ {
+ return ptr.get_unchecked(this);
+ }
+
+ /*!
+ @brief access specified element via JSON Pointer
+
+ Returns a reference to the element at with specified JSON pointer @a ptr,
+ with bounds checking.
+
+ @param[in] ptr JSON pointer to the desired element
+
+ @return reference to the element pointed to by @a ptr
+
+ @complexity Constant.
+
+ @throw std::out_of_range if the JSON pointer can not be resolved
+ @throw std::domain_error if an array index begins with '0'
+ @throw std::invalid_argument if an array index was not a number
+
+ @liveexample{The behavior is shown in the example.,at_json_pointer}
+
+ @since version 2.0.0
+ */
+ reference at(const json_pointer& ptr)
+ {
+ return ptr.get_checked(this);
+ }
+
+ /*!
+ @brief access specified element via JSON Pointer
+
+ Returns a const reference to the element at with specified JSON pointer @a
+ ptr, with bounds checking.
+
+ @param[in] ptr JSON pointer to the desired element
+
+ @return reference to the element pointed to by @a ptr
+
+ @complexity Constant.
+
+ @throw std::out_of_range if the JSON pointer can not be resolved
+ @throw std::domain_error if an array index begins with '0'
+ @throw std::invalid_argument if an array index was not a number
+
+ @liveexample{The behavior is shown in the example.,at_json_pointer_const}
+
+ @since version 2.0.0
+ */
+ const_reference at(const json_pointer& ptr) const
+ {
+ return ptr.get_checked(this);
+ }
+
+ /*!
+ @brief return flattened JSON value
+
+ The function creates a JSON object whose keys are JSON pointers (see [RFC
+ 6901](https://tools.ietf.org/html/rfc6901)) and whose values are all
+ primitive. The original JSON value can be restored using the @ref
+ unflatten() function.
+
+ @return an object that maps JSON pointers to primitive values
+
+ @note Empty objects and arrays are flattened to `null` and will not be
+ reconstructed correctly by the @ref unflatten() function.
+
+ @complexity Linear in the size the JSON value.
+
+ @liveexample{The following code shows how a JSON object is flattened to an
+ object whose keys consist of JSON pointers.,flatten}
+
+ @sa @ref unflatten() for the reverse function
+
+ @since version 2.0.0
+ */
+ basic_json flatten() const
+ {
+ basic_json result(value_t::object);
+ json_pointer::flatten("", *this, result);
+ return result;
+ }
+
+ /*!
+ @brief unflatten a previously flattened JSON value
+
+ The function restores the arbitrary nesting of a JSON value that has been
+ flattened before using the @ref flatten() function. The JSON value must
+ meet certain constraints:
+ 1. The value must be an object.
+ 2. The keys must be JSON pointers (see
+ [RFC 6901](https://tools.ietf.org/html/rfc6901))
+ 3. The mapped values must be primitive JSON types.
+
+ @return the original JSON from a flattened version
+
+ @note Empty objects and arrays are flattened by @ref flatten() to `null`
+ values and can not unflattened to their original type. Apart from
+ this example, for a JSON value `j`, the following is always true:
+ `j == j.flatten().unflatten()`.
+
+ @complexity Linear in the size the JSON value.
+
+ @liveexample{The following code shows how a flattened JSON object is
+ unflattened into the original nested JSON object.,unflatten}
+
+ @sa @ref flatten() for the reverse function
+
+ @since version 2.0.0
+ */
+ basic_json unflatten() const
+ {
+ return json_pointer::unflatten(*this);
+ }
+
+ /// @}
+
+ //////////////////////////
+ // JSON Patch functions //
+ //////////////////////////
+
+ /// @name JSON Patch functions
+ /// @{
+
+ /*!
+ @brief applies a JSON patch
+
+ [JSON Patch](http://jsonpatch.com) defines a JSON document structure for
+ expressing a sequence of operations to apply to a JSON) document. With
+ this function, a JSON Patch is applied to the current JSON value by
+ executing all operations from the patch.
+
+ @param[in] json_patch JSON patch document
+ @return patched document
+
+ @note The application of a patch is atomic: Either all operations succeed
+ and the patched document is returned or an exception is thrown. In
+ any case, the original value is not changed: the patch is applied
+ to a copy of the value.
+
+ @throw std::out_of_range if a JSON pointer inside the patch could not
+ be resolved successfully in the current JSON value; example: `"key baz
+ not found"`
+ @throw invalid_argument if the JSON patch is malformed (e.g., mandatory
+ attributes are missing); example: `"operation add must have member path"`
+
+ @complexity Linear in the size of the JSON value and the length of the
+ JSON patch. As usually only a fraction of the JSON value is affected by
+ the patch, the complexity can usually be neglected.
+
+ @liveexample{The following code shows how a JSON patch is applied to a
+ value.,patch}
+
+ @sa @ref diff -- create a JSON patch by comparing two JSON values
+
+ @sa [RFC 6902 (JSON Patch)](https://tools.ietf.org/html/rfc6902)
+ @sa [RFC 6901 (JSON Pointer)](https://tools.ietf.org/html/rfc6901)
+
+ @since version 2.0.0
+ */
+ basic_json patch(const basic_json& json_patch) const
+ {
+ // make a working copy to apply the patch to
+ basic_json result = *this;
+
+ // the valid JSON Patch operations
+ enum class patch_operations {add, remove, replace, move, copy, test, invalid};
+
+ const auto get_op = [](const std::string op)
+ {
+ if (op == "add")
+ {
+ return patch_operations::add;
+ }
+ if (op == "remove")
+ {
+ return patch_operations::remove;
+ }
+ if (op == "replace")
+ {
+ return patch_operations::replace;
+ }
+ if (op == "move")
+ {
+ return patch_operations::move;
+ }
+ if (op == "copy")
+ {
+ return patch_operations::copy;
+ }
+ if (op == "test")
+ {
+ return patch_operations::test;
+ }
+
+ return patch_operations::invalid;
+ };
+
+ // wrapper for "add" operation; add value at ptr
+ const auto operation_add = [&result](json_pointer & ptr, basic_json val)
+ {
+ // adding to the root of the target document means replacing it
+ if (ptr.is_root())
+ {
+ result = val;
+ }
+ else
+ {
+ // make sure the top element of the pointer exists
+ json_pointer top_pointer = ptr.top();
+ if (top_pointer != ptr)
+ {
+ result.at(top_pointer);
+ }
+
+ // get reference to parent of JSON pointer ptr
+ const auto last_path = ptr.pop_back();
+ basic_json& parent = result[ptr];
+
+ switch (parent.m_type)
+ {
+ case value_t::null:
+ case value_t::object:
+ {
+ // use operator[] to add value
+ parent[last_path] = val;
+ break;
+ }
+
+ case value_t::array:
+ {
+ if (last_path == "-")
+ {
+ // special case: append to back
+ parent.push_back(val);
+ }
+ else
+ {
+ const auto idx = std::stoi(last_path);
+ if (static_cast<size_type>(idx) > parent.size())
+ {
+ // avoid undefined behavior
+ JSON_THROW(std::out_of_range("array index " + std::to_string(idx) + " is out of range"));
+ }
+ else
+ {
+ // default case: insert add offset
+ parent.insert(parent.begin() + static_cast<difference_type>(idx), val);
+ }
+ }
+ break;
+ }
+
+ default:
+ {
+ // if there exists a parent it cannot be primitive
+ assert(false); // LCOV_EXCL_LINE
+ }
+ }
+ }
+ };
+
+ // wrapper for "remove" operation; remove value at ptr
+ const auto operation_remove = [&result](json_pointer & ptr)
+ {
+ // get reference to parent of JSON pointer ptr
+ const auto last_path = ptr.pop_back();
+ basic_json& parent = result.at(ptr);
+
+ // remove child
+ if (parent.is_object())
+ {
+ // perform range check
+ auto it = parent.find(last_path);
+ if (it != parent.end())
+ {
+ parent.erase(it);
+ }
+ else
+ {
+ JSON_THROW(std::out_of_range("key '" + last_path + "' not found"));
+ }
+ }
+ else if (parent.is_array())
+ {
+ // note erase performs range check
+ parent.erase(static_cast<size_type>(std::stoi(last_path)));
+ }
+ };
+
+ // type check
+ if (not json_patch.is_array())
+ {
+ // a JSON patch must be an array of objects
+ JSON_THROW(std::invalid_argument("JSON patch must be an array of objects"));
+ }
+
+ // iterate and apply the operations
+ for (const auto& val : json_patch)
+ {
+ // wrapper to get a value for an operation
+ const auto get_value = [&val](const std::string & op,
+ const std::string & member,
+ bool string_type) -> basic_json&
+ {
+ // find value
+ auto it = val.m_value.object->find(member);
+
+ // context-sensitive error message
+ const auto error_msg = (op == "op") ? "operation" : "operation '" + op + "'";
+
+ // check if desired value is present
+ if (it == val.m_value.object->end())
+ {
+ JSON_THROW(std::invalid_argument(error_msg + " must have member '" + member + "'"));
+ }
+
+ // check if result is of type string
+ if (string_type and not it->second.is_string())
+ {
+ JSON_THROW(std::invalid_argument(error_msg + " must have string member '" + member + "'"));
+ }
+
+ // no error: return value
+ return it->second;
+ };
+
+ // type check
+ if (not val.is_object())
+ {
+ JSON_THROW(std::invalid_argument("JSON patch must be an array of objects"));
+ }
+
+ // collect mandatory members
+ const std::string op = get_value("op", "op", true);
+ const std::string path = get_value(op, "path", true);
+ json_pointer ptr(path);
+
+ switch (get_op(op))
+ {
+ case patch_operations::add:
+ {
+ operation_add(ptr, get_value("add", "value", false));
+ break;
+ }
+
+ case patch_operations::remove:
+ {
+ operation_remove(ptr);
+ break;
+ }
+
+ case patch_operations::replace:
+ {
+ // the "path" location must exist - use at()
+ result.at(ptr) = get_value("replace", "value", false);
+ break;
+ }
+
+ case patch_operations::move:
+ {
+ const std::string from_path = get_value("move", "from", true);
+ json_pointer from_ptr(from_path);
+
+ // the "from" location must exist - use at()
+ basic_json v = result.at(from_ptr);
+
+ // The move operation is functionally identical to a
+ // "remove" operation on the "from" location, followed
+ // immediately by an "add" operation at the target
+ // location with the value that was just removed.
+ operation_remove(from_ptr);
+ operation_add(ptr, v);
+ break;
+ }
+
+ case patch_operations::copy:
+ {
+ const std::string from_path = get_value("copy", "from", true);;
+ const json_pointer from_ptr(from_path);
+
+ // the "from" location must exist - use at()
+ result[ptr] = result.at(from_ptr);
+ break;
+ }
+
+ case patch_operations::test:
+ {
+ bool success = false;
+ JSON_TRY
+ {
+ // check if "value" matches the one at "path"
+ // the "path" location must exist - use at()
+ success = (result.at(ptr) == get_value("test", "value", false));
+ }
+ JSON_CATCH (std::out_of_range&)
+ {
+ // ignore out of range errors: success remains false
+ }
+
+ // throw an exception if test fails
+ if (not success)
+ {
+ JSON_THROW(std::domain_error("unsuccessful: " + val.dump()));
+ }
+
+ break;
+ }
+
+ case patch_operations::invalid:
+ {
+ // op must be "add", "remove", "replace", "move", "copy", or
+ // "test"
+ JSON_THROW(std::invalid_argument("operation value '" + op + "' is invalid"));
+ }
+ }
+ }
+
+ return result;
+ }
+
+ /*!
+ @brief creates a diff as a JSON patch
+
+ Creates a [JSON Patch](http://jsonpatch.com) so that value @a source can
+ be changed into the value @a target by calling @ref patch function.
+
+ @invariant For two JSON values @a source and @a target, the following code
+ yields always `true`:
+ @code {.cpp}
+ source.patch(diff(source, target)) == target;
+ @endcode
+
+ @note Currently, only `remove`, `add`, and `replace` operations are
+ generated.
+
+ @param[in] source JSON value to compare from
+ @param[in] target JSON value to compare against
+ @param[in] path helper value to create JSON pointers
+
+ @return a JSON patch to convert the @a source to @a target
+
+ @complexity Linear in the lengths of @a source and @a target.
+
+ @liveexample{The following code shows how a JSON patch is created as a
+ diff for two JSON values.,diff}
+
+ @sa @ref patch -- apply a JSON patch
+
+ @sa [RFC 6902 (JSON Patch)](https://tools.ietf.org/html/rfc6902)
+
+ @since version 2.0.0
+ */
+ static basic_json diff(const basic_json& source,
+ const basic_json& target,
+ const std::string& path = "")
+ {
+ // the patch
+ basic_json result(value_t::array);
+
+ // if the values are the same, return empty patch
+ if (source == target)
+ {
+ return result;
+ }
+
+ if (source.type() != target.type())
+ {
+ // different types: replace value
+ result.push_back(
+ {
+ {"op", "replace"},
+ {"path", path},
+ {"value", target}
+ });
+ }
+ else
+ {
+ switch (source.type())
+ {
+ case value_t::array:
+ {
+ // first pass: traverse common elements
+ size_t i = 0;
+ while (i < source.size() and i < target.size())
+ {
+ // recursive call to compare array values at index i
+ auto temp_diff = diff(source[i], target[i], path + "/" + std::to_string(i));
+ result.insert(result.end(), temp_diff.begin(), temp_diff.end());
+ ++i;
+ }
+
+ // i now reached the end of at least one array
+ // in a second pass, traverse the remaining elements
+
+ // remove my remaining elements
+ const auto end_index = static_cast<difference_type>(result.size());
+ while (i < source.size())
+ {
+ // add operations in reverse order to avoid invalid
+ // indices
+ result.insert(result.begin() + end_index, object(
+ {
+ {"op", "remove"},
+ {"path", path + "/" + std::to_string(i)}
+ }));
+ ++i;
+ }
+
+ // add other remaining elements
+ while (i < target.size())
+ {
+ result.push_back(
+ {
+ {"op", "add"},
+ {"path", path + "/" + std::to_string(i)},
+ {"value", target[i]}
+ });
+ ++i;
+ }
+
+ break;
+ }
+
+ case value_t::object:
+ {
+ // first pass: traverse this object's elements
+ for (auto it = source.begin(); it != source.end(); ++it)
+ {
+ // escape the key name to be used in a JSON patch
+ const auto key = json_pointer::escape(it.key());
+
+ if (target.find(it.key()) != target.end())
+ {
+ // recursive call to compare object values at key it
+ auto temp_diff = diff(it.value(), target[it.key()], path + "/" + key);
+ result.insert(result.end(), temp_diff.begin(), temp_diff.end());
+ }
+ else
+ {
+ // found a key that is not in o -> remove it
+ result.push_back(object(
+ {
+ {"op", "remove"},
+ {"path", path + "/" + key}
+ }));
+ }
+ }
+
+ // second pass: traverse other object's elements
+ for (auto it = target.begin(); it != target.end(); ++it)
+ {
+ if (source.find(it.key()) == source.end())
+ {
+ // found a key that is not in this -> add it
+ const auto key = json_pointer::escape(it.key());
+ result.push_back(
+ {
+ {"op", "add"},
+ {"path", path + "/" + key},
+ {"value", it.value()}
+ });
+ }
+ }
+
+ break;
+ }
+
+ default:
+ {
+ // both primitive type: replace value
+ result.push_back(
+ {
+ {"op", "replace"},
+ {"path", path},
+ {"value", target}
+ });
+ break;
+ }
+ }
+ }
+
+ return result;
+ }
+
+ /// @}
+};
+
+/////////////
+// presets //
+/////////////
+
+/*!
+@brief default JSON class
+
+This type is the default specialization of the @ref basic_json class which
+uses the standard template types.
+
+@since version 1.0.0
+*/
+using json = basic_json<>;
+} // namespace nlohmann
+
+
+///////////////////////
+// nonmember support //
+///////////////////////
+
+// specialization of std::swap, and std::hash
+namespace std
+{
+/*!
+@brief exchanges the values of two JSON objects
+
+@since version 1.0.0
+*/
+template<>
+inline void swap(nlohmann::json& j1,
+ nlohmann::json& j2) noexcept(
+ is_nothrow_move_constructible<nlohmann::json>::value and
+ is_nothrow_move_assignable<nlohmann::json>::value
+ )
+{
+ j1.swap(j2);
+}
+
+/// hash value for JSON objects
+template<>
+struct hash<nlohmann::json>
+{
+ /*!
+ @brief return a hash value for a JSON object
+
+ @since version 1.0.0
+ */
+ std::size_t operator()(const nlohmann::json& j) const
+ {
+ // a naive hashing via the string representation
+ const auto& h = hash<nlohmann::json::string_t>();
+ return h(j.dump());
+ }
+};
+} // namespace std
+
+/*!
+@brief user-defined string literal for JSON values
+
+This operator implements a user-defined string literal for JSON objects. It
+can be used by adding `"_json"` to a string literal and returns a JSON object
+if no parse error occurred.
+
+@param[in] s a string representation of a JSON object
+@param[in] n the length of string @a s
+@return a JSON object
+
+@since version 1.0.0
+*/
+inline nlohmann::json operator "" _json(const char* s, std::size_t n)
+{
+ return nlohmann::json::parse(s, s + n);
+}
+
+/*!
+@brief user-defined string literal for JSON pointer
+
+This operator implements a user-defined string literal for JSON Pointers. It
+can be used by adding `"_json_pointer"` to a string literal and returns a JSON pointer
+object if no parse error occurred.
+
+@param[in] s a string representation of a JSON Pointer
+@param[in] n the length of string @a s
+@return a JSON pointer object
+
+@since version 2.0.0
+*/
+inline nlohmann::json::json_pointer operator "" _json_pointer(const char* s, std::size_t n)
+{
+ return nlohmann::json::json_pointer(std::string(s, n));
+}
+
+// clean up
+#undef JSON_CATCH
+#undef JSON_DEPRECATED
+#undef JSON_THROW
+#undef JSON_TRY
+
+#endif
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-\r
-#ifndef XRAN_LIB_WRAP_HPP\r
-#define XRAN_LIB_WRAP_HPP\r
-\r
-#include <exception>\r
-#include <random>\r
-#include <string>\r
-#include <utility>\r
-#include <vector>\r
-\r
-#include <malloc.h>\r
-#include <stdint.h>\r
-\r
-#include "common.hpp"\r
-#include "xran_fh_o_du.h"\r
-#include "xran_common.h"\r
-#include "xran_frame_struct.h"\r
-\r
-\r
-#define XRAN_UT_CFG_FILENAME "conf.json"\r
-\r
-#define XRAN_UT_KEY_GLOBALCFG "GLOBAL"\r
-#define XRAN_UT_KEY_GLOBALCFG_IO "io_cfg"\r
-#define XRAN_UT_KEY_GLOBALCFG_EAXCID "eAxCId_cfg"\r
-#define XRAN_UT_KEY_GLOBALCFG_PRACH "prach_cfg"\r
-#define XRAN_UT_KEY_GLOBALCFG_RU "ru_cfg"\r
-#define XRAN_UT_KEY_GLOBALCFG_SLOT "slotcfg_"\r
-\r
-#define MAX_NUM_OF_XRAN_CTX (2)\r
-\r
-#define SW_FPGA_TOTAL_BUFFER_LEN (4*1024*1024*1024)\r
-#define SW_FPGA_SEGMENT_BUFFER_LEN (1*1024*1024*1024)\r
-#define SW_FPGA_FH_TOTAL_BUFFER_LEN (1*1024*1024*1024)\r
-#define FPGA_TO_SW_PRACH_RX_BUFFER_LEN (8192)\r
-\r
-#define MAX_ANT_CARRIER_SUPPORTED (XRAN_MAX_SECTOR_NR*XRAN_MAX_ANTENNA_NR)\r
-\r
-extern "C"\r
-{\r
-extern uint32_t xran_lib_ota_tti;\r
-extern uint32_t xran_lib_ota_sym;\r
-extern uint32_t xran_lib_ota_sym_idx;\r
-\r
-void sym_ota_cb(struct rte_timer *tim, void *arg);\r
-void tti_ota_cb(struct rte_timer *tim, void *arg);\r
-}\r
-\r
-class xranLibWraper\r
-{\r
-public:\r
- typedef enum\r
- {\r
- XRANFTHTX_OUT = 0,\r
- XRANFTHTX_PRB_MAP_OUT,\r
- XRANFTHTX_SEC_DESC_OUT,\r
- XRANFTHRX_IN,\r
- XRANFTHRX_PRB_MAP_IN,\r
- XRANFTHTX_SEC_DESC_IN,\r
- XRANFTHRACH_IN,\r
- MAX_SW_XRAN_INTERFACE_NUM\r
- } SWXRANInterfaceTypeEnum;\r
-\r
- enum nChBw\r
- {\r
- PHY_BW_5MHZ = 5, PHY_BW_10MHZ = 10, PHY_BW_15MHZ = 15,\r
- PHY_BW_20MHZ = 20, PHY_BW_25MHZ = 25, PHY_BW_30MHZ = 30,\r
- PHY_BW_40MHZ = 40, PHY_BW_50MHZ = 50, PHY_BW_60MHZ = 60,\r
- PHY_BW_70MHZ = 70, PHY_BW_80MHZ = 80, PHY_BW_90MHZ = 90,\r
- PHY_BW_100MHZ = 100, PHY_BW_200MHZ = 200, PHY_BW_400MHZ = 400\r
- };\r
-\r
- // F1 Tables 38.101-1 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB\r
- const uint16_t nNumRbsPerSymF1[3][13] =\r
- {\r
- // 5MHz 10MHz 15MHz 20MHz 25MHz 30MHz 40MHz 50MHz 60MHz 70MHz 80MHz 90MHz 100MHz\r
- { 25, 52, 79, 106, 133, 160, 216, 270, 0, 0, 0, 0, 0 }, // Numerology 0 (15KHz)\r
- { 11, 24, 38, 51, 65, 78, 106, 133, 162, 0, 217, 245, 273 }, // Numerology 1 (30KHz)\r
- { 0, 11, 18, 24, 31, 38, 51, 65, 79, 0, 107, 121, 135 } // Numerology 2 (60KHz)\r
- };\r
-\r
- // F2 Tables 38.101-2 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB\r
- const uint16_t nNumRbsPerSymF2[2][4] =\r
- {\r
- // 50MHz 100MHz 200MHz 400MHz\r
- { 66, 132, 264, 0 }, // Numerology 2 (60KHz)\r
- { 32, 66, 132, 264 } // Numerology 3 (120KHz)\r
- };\r
-\r
-\r
-protected:\r
- char argv[25] = "unittest";\r
-\r
- std::string m_dpdk_dev_up, m_dpdk_dev_cp, m_dpdk_bbdev;\r
-\r
- void *m_xranhandle;\r
-\r
- uint8_t m_du_mac[6] = { 0x00,0x11, 0x22, 0x33, 0x44, 0x66 };\r
- uint8_t m_ru_mac[6] = { 0x00,0x11, 0x22, 0x33, 0x44, 0x55 };\r
- bool m_bSub6;\r
- uint32_t m_nSlots = 10;\r
-\r
- struct xran_fh_config m_xranConf;\r
- struct xran_fh_init m_xranInit;\r
-\r
- struct xran_timer_ctx {\r
- uint32_t tti_to_process;\r
- } m_timer_ctx[MAX_NUM_OF_XRAN_CTX];\r
-\r
- /* io struct */\r
- BbuIoBufCtrlStruct m_sFrontHaulTxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
- BbuIoBufCtrlStruct m_sFrontHaulTxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
- BbuIoBufCtrlStruct m_sFrontHaulRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
- BbuIoBufCtrlStruct m_sFrontHaulRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
- BbuIoBufCtrlStruct m_sFHPrachRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
-\r
- /* buffers lists */\r
- struct xran_flat_buffer m_sFrontHaulTxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];\r
- struct xran_flat_buffer m_sFrontHaulTxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
- struct xran_flat_buffer m_sFrontHaulRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];\r
- struct xran_flat_buffer m_sFrontHaulRxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
- struct xran_flat_buffer m_sFHPrachRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];\r
-\r
- void *m_nInstanceHandle[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR]; // instance per sector\r
- uint32_t m_nBufPoolIndex[XRAN_MAX_SECTOR_NR][MAX_SW_XRAN_INTERFACE_NUM]; // every api owns unique buffer pool\r
-\r
- uint32_t m_nSW_ToFpga_FTH_TxBufferLen;\r
- uint32_t m_nFpgaToSW_FTH_RxBufferLen;\r
-\r
- int32_t m_nSectorIndex[XRAN_MAX_SECTOR_NR];\r
-\r
- int iq_bfw_buffer_size_dl = 0;\r
- int iq_bfw_buffer_size_ul = 0;\r
-\r
- /* beamforming weights for UL (O-DU) */\r
- int16_t *p_tx_dl_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];\r
- int32_t tx_dl_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];\r
- int32_t tx_dl_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];\r
-\r
- /* beamforming weights for UL (O-DU) */\r
- int16_t *p_tx_ul_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];\r
- int32_t tx_ul_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];\r
- int32_t tx_ul_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];\r
-\r
-\r
-private:\r
- json m_global_cfg;\r
-\r
- template<typename T>\r
- T get_globalcfg(const std::string &type, const std::string ¶meter_name)\r
- {\r
- return m_global_cfg[XRAN_UT_KEY_GLOBALCFG][type][parameter_name];\r
- }\r
-\r
- template<typename T>\r
- std::vector<T> get_globalcfg_array(const std::string &type, const std::string ¶meter_name)\r
- {\r
- auto array_size = m_global_cfg[XRAN_UT_KEY_GLOBALCFG][type][parameter_name].size();\r
-\r
- std::vector<T> result(array_size);\r
-\r
- for(unsigned number = 0; number < array_size; number++)\r
- result.at(number) = m_global_cfg[XRAN_UT_KEY_GLOBALCFG][type][parameter_name][number];\r
-\r
- return result;\r
- }\r
-\r
- uint16_t get_eaxcid_mask(int numbit, int shift)\r
- {\r
- uint16_t result = 0;\r
-\r
- for(int i=0; i < numbit; i++) {\r
- result = result << 1; result +=1;\r
- }\r
- return (result << shift);\r
- }\r
-\r
- int init_memory()\r
- {\r
- xran_status_t status;\r
- int32_t i, j, k, z;\r
- SWXRANInterfaceTypeEnum eInterfaceType;\r
- void *ptr;\r
- void *mb;\r
- uint32_t *u32dptr;\r
- uint16_t *u16dptr;\r
- uint8_t *u8dptr;\r
-\r
-\r
- std::cout << "XRAN front haul xran_mm_init" << std::endl;\r
- status = xran_mm_init(m_xranhandle, (uint64_t) SW_FPGA_FH_TOTAL_BUFFER_LEN, SW_FPGA_SEGMENT_BUFFER_LEN);\r
- if(status != XRAN_STATUS_SUCCESS) {\r
- std::cout << "Failed at XRAN front haul xran_mm_init" << std::endl;\r
- return (-1);\r
- }\r
-\r
- /* initialize maximum instances to have flexibility for the tests */\r
- int nInstanceNum = XRAN_MAX_SECTOR_NR;\r
- /* initialize maximum supported CC to have flexibility on the test */\r
- int32_t nSectorNum = 6;//XRAN_MAX_SECTOR_NR;\r
-\r
- for(k = 0; k < XRAN_PORTS_NUM; k++) {\r
- status = xran_sector_get_instances(m_xranhandle, nInstanceNum, &m_nInstanceHandle[k][0]);\r
- if(status != XRAN_STATUS_SUCCESS) {\r
- std::cout << "get sector instance failed " << k << " for XRAN nInstanceNum " << nInstanceNum << std::endl;\r
- return (-1);\r
- }\r
- for (i = 0; i < nInstanceNum; i++)\r
- std::cout << __func__ << " [" << k << "]: CC " << i << " handle " << m_nInstanceHandle[0][i] << std::endl;\r
- }\r
- std::cout << "Sucess xran_mm_init" << std::endl;\r
-\r
- /* Init Memory */\r
- for(i = 0; i<nSectorNum; i++) {\r
- eInterfaceType = XRANFTHTX_OUT;\r
- status = xran_bm_init(m_nInstanceHandle[0][i],\r
- &m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType],\r
- XRAN_N_FE_BUF_LEN * XRAN_MAX_ANTENNA_NR * XRAN_NUM_OF_SYMBOL_PER_SLOT,\r
- m_nSW_ToFpga_FTH_TxBufferLen);\r
- if(status != XRAN_STATUS_SUCCESS) {\r
- std::cout << __LINE__ << " Failed at xran_bm_init, status " << status << std::endl;\r
- return (-1);\r
- }\r
- for(j = 0; j < XRAN_N_FE_BUF_LEN; j++) {\r
- for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){\r
- m_sFrontHaulTxBbuIoBufCtrl[j][i][z].bValid = 0;\r
- m_sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;\r
- m_sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;\r
- m_sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;\r
- m_sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;\r
- m_sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &m_sFrontHaulTxBuffers[j][i][z][0];\r
-\r
- for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++) {\r
- m_sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = m_nSW_ToFpga_FTH_TxBufferLen; // 14 symbols 3200bytes/symbol\r
- m_sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;\r
- m_sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;\r
- status = xran_bm_allocate_buffer(m_nInstanceHandle[0][i], m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType], &ptr, &mb);\r
- if(status != XRAN_STATUS_SUCCESS) {\r
- std::cout << __LINE__ << " Failed at xran_bm_allocate_buffer, status " << status << std::endl;\r
- return (-1);\r
- }\r
- m_sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;\r
- m_sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *)mb;\r
-\r
- if(ptr) {\r
- u32dptr = (uint32_t*)(ptr);\r
- uint8_t *ptr_temp = (uint8_t *)ptr;\r
- memset(u32dptr, 0x0, m_nSW_ToFpga_FTH_TxBufferLen);\r
- }\r
- }\r
- }\r
- }\r
-\r
- /* C-plane DL */\r
- eInterfaceType = XRANFTHTX_SEC_DESC_OUT;\r
- status = xran_bm_init(m_nInstanceHandle[0][i],\r
- &m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType],\r
- XRAN_N_FE_BUF_LEN * XRAN_MAX_ANTENNA_NR * XRAN_NUM_OF_SYMBOL_PER_SLOT*XRAN_MAX_SECTIONS_PER_SYM, sizeof(struct xran_section_desc));\r
- if(XRAN_STATUS_SUCCESS != status) {\r
- std::cout << __LINE__ << " Failed at xran_bm_init, status " << status << std::endl;\r
- return (-1);\r
- }\r
- eInterfaceType = XRANFTHTX_PRB_MAP_OUT;\r
- status = xran_bm_init(m_nInstanceHandle[0][i],\r
- &m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType],\r
- XRAN_N_FE_BUF_LEN * XRAN_MAX_ANTENNA_NR * XRAN_NUM_OF_SYMBOL_PER_SLOT,\r
- sizeof(struct xran_prb_map));\r
- if(status != XRAN_STATUS_SUCCESS) {\r
- std::cout << __LINE__ << " Failed at xran_bm_init, status " << status << std::endl;\r
- return (-1);\r
- }\r
- for(j = 0; j < XRAN_N_FE_BUF_LEN; j++) {\r
- for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++) {\r
- m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].bValid = 0;\r
- m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegGenerated = -1;\r
- m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;\r
- m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred = 0;\r
- m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;\r
- m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &m_sFrontHaulTxPrbMapBuffers[j][i][z];\r
-\r
- m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nElementLenInBytes = sizeof(struct xran_prb_map);\r
- m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nNumberOfElements = 1;\r
- m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nOffsetInBytes = 0;\r
- status = xran_bm_allocate_buffer(m_nInstanceHandle[0][i], m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType], &ptr, &mb);\r
- if(status != XRAN_STATUS_SUCCESS) {\r
- std::cout << __LINE__ << " Failed at xran_bm_allocate_buffer, status " << status << std::endl;\r
- return (-1);\r
- }\r
- m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pData = (uint8_t *)ptr;\r
- m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pCtrl = (void *)mb;\r
- void *sd_ptr;\r
- void *sd_mb;\r
- int elm_id;\r
- struct xran_prb_map * p_rb_map = (struct xran_prb_map *)ptr;\r
- //memcpy(ptr, &startupConfiguration.PrbMap, sizeof(struct xran_prb_map));\r
- for (elm_id = 0; elm_id < XRAN_MAX_SECTIONS_PER_SYM; elm_id++){\r
- struct xran_prb_elm *pPrbElem = &p_rb_map->prbMap[elm_id];\r
- for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++){\r
- status = xran_bm_allocate_buffer(m_nInstanceHandle[0][i], m_nBufPoolIndex[m_nSectorIndex[i]][XRANFTHTX_SEC_DESC_OUT], &sd_ptr, &sd_mb);\r
- if(XRAN_STATUS_SUCCESS != status){\r
- std::cout << __LINE__ << "SD Failed at xran_bm_allocate_buffer , status %d\n" << status << std::endl;\r
- return (-1);\r
- }\r
- pPrbElem->p_sec_desc[k] = (struct xran_section_desc *)sd_ptr;\r
- }\r
- }\r
- }\r
- }\r
- }\r
-\r
- for(i = 0; i<nSectorNum; i++) {\r
- eInterfaceType = XRANFTHRX_IN;\r
- status = xran_bm_init(m_nInstanceHandle[0][i],\r
- &m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType],\r
- XRAN_N_FE_BUF_LEN * XRAN_MAX_ANTENNA_NR * XRAN_NUM_OF_SYMBOL_PER_SLOT,\r
- m_nSW_ToFpga_FTH_TxBufferLen); /* ????, actual alloc size is m_nFpgaToSW_FTH_RxBUfferLen */\r
- if(status != XRAN_STATUS_SUCCESS) {\r
- std::cout << __LINE__ << " Failed at xran_bm_init, status " << status << std::endl;\r
- return (-1);\r
- }\r
-\r
- for(j = 0;j < XRAN_N_FE_BUF_LEN; j++) {\r
- for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++) {\r
- m_sFrontHaulRxBbuIoBufCtrl[j][i][z].bValid = 0;\r
- m_sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;\r
- m_sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;\r
- m_sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;\r
- m_sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;\r
- m_sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &m_sFrontHaulRxBuffers[j][i][z][0];\r
- for(k = 0; k< XRAN_NUM_OF_SYMBOL_PER_SLOT; k++) {\r
- m_sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = m_nFpgaToSW_FTH_RxBufferLen;\r
- m_sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;\r
- m_sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;\r
- status = xran_bm_allocate_buffer(m_nInstanceHandle[0][i], m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType],&ptr, &mb);\r
- if(status != XRAN_STATUS_SUCCESS) {\r
- std::cout << __LINE__ << " Failed at xran_bm_allocate_buffer, status " << status << std::endl;\r
- return (-1);\r
- }\r
- m_sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;\r
- m_sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *) mb;\r
- if(ptr) {\r
- u32dptr = (uint32_t*)(ptr);\r
- uint8_t *ptr_temp = (uint8_t *)ptr;\r
- memset(u32dptr, 0x0, m_nFpgaToSW_FTH_RxBufferLen);\r
- }\r
- }\r
- }\r
- }\r
-\r
- eInterfaceType = XRANFTHTX_SEC_DESC_IN;\r
- status = xran_bm_init(m_nInstanceHandle[0][i],\r
- &m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType],\r
- XRAN_N_FE_BUF_LEN * XRAN_MAX_ANTENNA_NR * XRAN_NUM_OF_SYMBOL_PER_SLOT*XRAN_MAX_SECTIONS_PER_SYM, sizeof(struct xran_section_desc));\r
- if(XRAN_STATUS_SUCCESS != status) {\r
- std::cout << __LINE__ << " Failed at xran_bm_init, status " << status << std::endl;\r
- return (-1);\r
- }\r
- eInterfaceType = XRANFTHRX_PRB_MAP_IN;\r
- status = xran_bm_init(m_nInstanceHandle[0][i],\r
- &m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType],\r
- XRAN_N_FE_BUF_LEN * XRAN_MAX_ANTENNA_NR * XRAN_NUM_OF_SYMBOL_PER_SLOT,\r
- sizeof(struct xran_prb_map));\r
- if(status != XRAN_STATUS_SUCCESS) {\r
- std::cout << __LINE__ << " Failed at xran_bm_init, status " << status << std::endl;\r
- return (-1);\r
- }\r
-\r
- for(j = 0;j < XRAN_N_FE_BUF_LEN; j++) {\r
- for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++) {\r
- m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].bValid = 0;\r
- m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegGenerated = -1;\r
- m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;\r
- m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred = 0;\r
- m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;\r
- m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &m_sFrontHaulRxPrbMapBuffers[j][i][z];\r
-\r
- m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nElementLenInBytes = sizeof(struct xran_prb_map);\r
- m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nNumberOfElements = 1;\r
- m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nOffsetInBytes = 0;\r
- status = xran_bm_allocate_buffer(m_nInstanceHandle[0][i],m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType], &ptr, &mb);\r
- if(status != XRAN_STATUS_SUCCESS) {\r
- std::cout << __LINE__ << " Failed at xran_bm_allocate_buffer , status " << status << std::endl;\r
- return (-1);\r
- }\r
- m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pData = (uint8_t *)ptr;\r
- m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pCtrl = (void *)mb;\r
- void *sd_ptr;\r
- void *sd_mb;\r
- int elm_id;\r
- struct xran_prb_map * p_rb_map = (struct xran_prb_map *)ptr;\r
- //memcpy(ptr, &startupConfiguration.PrbMap, sizeof(struct xran_prb_map));\r
- for (elm_id = 0; elm_id < XRAN_MAX_SECTIONS_PER_SYM; elm_id++){\r
- struct xran_prb_elm *pPrbElem = &p_rb_map->prbMap[elm_id];\r
- for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++){\r
- status = xran_bm_allocate_buffer(m_nInstanceHandle[0][i], m_nBufPoolIndex[m_nSectorIndex[i]][XRANFTHTX_SEC_DESC_IN], &sd_ptr, &sd_mb);\r
- if(XRAN_STATUS_SUCCESS != status){\r
- std::cout << __LINE__ << "SD Failed at xran_bm_allocate_buffer , status %d\n" << status << std::endl;\r
- return (-1);\r
- }\r
- pPrbElem->p_sec_desc[k] = (struct xran_section_desc *)sd_ptr;\r
- }\r
- }\r
- }\r
- }\r
- }\r
-\r
- for(i = 0; i<nSectorNum; i++) {\r
- eInterfaceType = XRANFTHRACH_IN;\r
- status = xran_bm_init(m_nInstanceHandle[0][i],\r
- &m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType],\r
- XRAN_N_FE_BUF_LEN * XRAN_MAX_ANTENNA_NR * XRAN_NUM_OF_SYMBOL_PER_SLOT,\r
- FPGA_TO_SW_PRACH_RX_BUFFER_LEN);\r
- if(status != XRAN_STATUS_SUCCESS) {\r
- std::cout << __LINE__ << " Failed at xran_bm_init, status " << status << std::endl;\r
- return (-1);\r
- }\r
- for(j = 0; j < XRAN_N_FE_BUF_LEN; j++) {\r
- for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++) {\r
- m_sFHPrachRxBbuIoBufCtrl[j][i][z].bValid = 0;\r
- m_sFHPrachRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;\r
- m_sFHPrachRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;\r
- m_sFHPrachRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;\r
- m_sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_MAX_ANTENNA_NR;\r
- m_sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &m_sFHPrachRxBuffers[j][i][z][0];\r
- for(k = 0; k< XRAN_NUM_OF_SYMBOL_PER_SLOT; k++) {\r
- m_sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = FPGA_TO_SW_PRACH_RX_BUFFER_LEN;\r
- m_sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;\r
- m_sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;\r
- status = xran_bm_allocate_buffer(m_nInstanceHandle[0][i], m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType], &ptr, &mb);\r
- if(status != XRAN_STATUS_SUCCESS) {\r
- std::cout << __LINE__ << " Failed at xran_bm_allocate_buffer, status " << status << std::endl;\r
- return (-1);\r
- }\r
- m_sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;\r
- m_sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *)mb;\r
- if(ptr) {\r
- u32dptr = (uint32_t*)(ptr);\r
- memset(u32dptr, 0x0, FPGA_TO_SW_PRACH_RX_BUFFER_LEN);\r
- }\r
- }\r
- }\r
- }\r
- }\r
-\r
- return (0);\r
- }\r
-\r
-\r
-public:\r
- xranLibWraper()\r
- {\r
- int i, temp;\r
- std::string tmpstr;\r
- unsigned int tmp_mac[6];\r
-\r
- m_global_cfg = read_json_from_file(XRAN_UT_CFG_FILENAME);\r
-\r
- memset(&m_xranInit, 0, sizeof(xran_fh_init));\r
-\r
- m_xranInit.io_cfg.id = 0;\r
-\r
- /* DPDK configuration */\r
- m_dpdk_dev_up = get_globalcfg<std::string>(XRAN_UT_KEY_GLOBALCFG_IO, "dpdk_dev_up");\r
- m_dpdk_dev_cp = get_globalcfg<std::string>(XRAN_UT_KEY_GLOBALCFG_IO, "dpdk_dev_cp");\r
- m_xranInit.io_cfg.dpdk_dev[XRAN_UP_VF] = (m_dpdk_dev_up == "") ? NULL : (char *)&m_dpdk_dev_up;\r
- m_xranInit.io_cfg.dpdk_dev[XRAN_CP_VF] = (m_dpdk_dev_cp == "") ? NULL : (char *)&m_dpdk_dev_cp;\r
-\r
- m_xranInit.io_cfg.core = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_IO, "core");\r
- m_xranInit.io_cfg.system_core = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_IO, "system_core");\r
- m_xranInit.io_cfg.pkt_proc_core = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_IO, "pkt_proc_core");\r
- m_xranInit.io_cfg.pkt_aux_core = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_IO, "pkt_aux_core");\r
- m_xranInit.io_cfg.timing_core = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_IO, "timing_core");\r
-\r
- std::string bbdev_mode = get_globalcfg<std::string>(XRAN_UT_KEY_GLOBALCFG_IO, "bbdev_mode");\r
- if(bbdev_mode == "sw")\r
- m_xranInit.io_cfg.bbdev_mode = XRAN_BBDEV_MODE_HW_OFF;\r
- else if(bbdev_mode == "hw")\r
- m_xranInit.io_cfg.bbdev_mode = XRAN_BBDEV_MODE_HW_ON;\r
- else if(bbdev_mode == "none")\r
- m_xranInit.io_cfg.bbdev_mode = XRAN_BBDEV_NOT_USED;\r
- else {\r
- std::cout << "Invalid BBDev mode [" << bbdev_mode << "], bbdev won't be used." << std::endl;\r
- m_xranInit.io_cfg.bbdev_mode = XRAN_BBDEV_NOT_USED;\r
- }\r
-\r
- m_xranInit.dpdkBasebandFecMode = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_IO, "dpdkBasebandFecMode");\r
-\r
- m_dpdk_bbdev = get_globalcfg<std::string>(XRAN_UT_KEY_GLOBALCFG_IO, "dpdkBasebandDevice");\r
- m_xranInit.dpdkBasebandDevice = (m_dpdk_bbdev == "") ? NULL : (char *)&m_dpdk_bbdev;\r
-\r
- /* Network configurations */\r
- m_xranInit.mtu = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_IO, "mtu");\r
-\r
- std::string du_mac_str = get_globalcfg<std::string>(XRAN_UT_KEY_GLOBALCFG_IO, "o_du_macaddr");\r
- std::string ru_mac_str = get_globalcfg<std::string>(XRAN_UT_KEY_GLOBALCFG_IO, "o_ru_macaddr");\r
- /* using temp variables to resolve KW issue */\r
- std::sscanf(du_mac_str.c_str(), "%02x:%02x:%02x:%02x:%02x:%02x",\r
- &tmp_mac[0], &tmp_mac[1], &tmp_mac[2],\r
- &tmp_mac[3], &tmp_mac[4], &tmp_mac[5]);\r
- for(i=0; i<6; i++)\r
- m_du_mac[i] = (uint8_t)tmp_mac[i];\r
- std::sscanf(du_mac_str.c_str(), "%02x:%02x:%02x:%02x:%02x:%02x",\r
- &tmp_mac[0], &tmp_mac[1], &tmp_mac[2],\r
- &tmp_mac[3], &tmp_mac[4], &tmp_mac[5]);\r
- for(i=0; i<6; i++)\r
- m_ru_mac[i] = (uint8_t)tmp_mac[i];\r
- m_xranInit.p_o_du_addr = (int8_t *)m_du_mac;\r
- m_xranInit.p_o_ru_addr = (int8_t *)m_ru_mac;\r
- m_xranInit.cp_vlan_tag = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_IO, "cp_vlan_tag");\r
- m_xranInit.up_vlan_tag = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_IO, "up_vlan_tag");\r
-\r
- /* eAxCID configurations */\r
- int bitnum_cuport = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_EAXCID, "bit_cuPortId");\r
- int bitnum_bandsec = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_EAXCID, "bit_bandSectorId");\r
- int bitnum_ccid = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_EAXCID, "bit_ccId");\r
- int bitnum_ruport = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_EAXCID, "bit_ruPortId");\r
-\r
- m_xranInit.eAxCId_conf.bit_cuPortId = bitnum_bandsec + bitnum_ccid + bitnum_ruport;\r
- m_xranInit.eAxCId_conf.bit_bandSectorId = bitnum_ccid + bitnum_ruport;\r
- m_xranInit.eAxCId_conf.bit_ccId = bitnum_ruport;\r
- m_xranInit.eAxCId_conf.bit_ruPortId = 0;\r
- m_xranInit.eAxCId_conf.mask_cuPortId = get_eaxcid_mask(bitnum_cuport, m_xranInit.eAxCId_conf.bit_cuPortId);\r
- m_xranInit.eAxCId_conf.mask_bandSectorId = get_eaxcid_mask(bitnum_bandsec, m_xranInit.eAxCId_conf.bit_bandSectorId);\r
- m_xranInit.eAxCId_conf.mask_ccId = get_eaxcid_mask(bitnum_ccid, m_xranInit.eAxCId_conf.bit_ccId);\r
- m_xranInit.eAxCId_conf.mask_ruPortId = get_eaxcid_mask(bitnum_ruport, m_xranInit.eAxCId_conf.bit_ruPortId);\r
-\r
- m_xranInit.totalBfWeights = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "totalBfWeights");\r
-\r
- m_xranInit.Tadv_cp_dl = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "Tadv_cp_dl");\r
- m_xranInit.T2a_min_cp_dl = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T2a_min_cp_dl");\r
- m_xranInit.T2a_max_cp_dl = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T2a_max_cp_dl");\r
- m_xranInit.T2a_min_cp_ul = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T2a_min_cp_ul");\r
- m_xranInit.T2a_max_cp_ul = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T2a_max_cp_ul");\r
- m_xranInit.T2a_min_up = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T2a_min_up");\r
- m_xranInit.T2a_max_up = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T2a_max_up");\r
- m_xranInit.Ta3_min = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "Ta3_min");\r
- m_xranInit.Ta3_max = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "Ta3_max");\r
- m_xranInit.T1a_min_cp_dl = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T1a_min_cp_dl");\r
- m_xranInit.T1a_max_cp_dl = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T1a_max_cp_dl");\r
- m_xranInit.T1a_min_cp_ul = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T1a_min_cp_ul");\r
- m_xranInit.T1a_max_cp_ul = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T1a_max_cp_ul");\r
- m_xranInit.T1a_min_up = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T1a_min_up");\r
- m_xranInit.T1a_max_up = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T1a_max_up");\r
- m_xranInit.Ta4_min = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "Ta4_min");\r
- m_xranInit.Ta4_max = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "Ta4_max");\r
-\r
- m_xranInit.enableCP = 1;\r
- m_xranInit.prachEnable = 1;\r
- m_xranInit.debugStop = 0;\r
- m_xranInit.debugStopCount = 0;\r
- m_xranInit.DynamicSectionEna= 0;\r
-\r
- m_xranInit.filePrefix = "wls";\r
-\r
- m_bSub6 = get_globalcfg<bool>(XRAN_UT_KEY_GLOBALCFG_RU, "sub6");\r
-\r
- memset(&m_xranConf, 0, sizeof(struct xran_fh_config));\r
- tmpstr = get_globalcfg<std::string>(XRAN_UT_KEY_GLOBALCFG_RU, "duplex");\r
- if(tmpstr == "FDD") {\r
- m_xranConf.frame_conf.nFrameDuplexType = 0;\r
- }\r
- else if(tmpstr == "TDD") {\r
- m_xranConf.frame_conf.nFrameDuplexType = 1;\r
-\r
- std::string slotcfg_key = get_globalcfg<std::string>(XRAN_UT_KEY_GLOBALCFG_RU, "slot_config");\r
-\r
- int numcfg = get_globalcfg<int>(slotcfg_key, "period");\r
- m_xranConf.frame_conf.nTddPeriod = numcfg;\r
-\r
- for(int i=0; i< numcfg; i++) {\r
- std::stringstream slotcfgname;\r
- slotcfgname << "slot" << i;\r
- std::vector<int> slotcfg = get_globalcfg_array<int>(slotcfg_key, slotcfgname.str());\r
- for(int j=0; j < slotcfg.size(); j++) {\r
- m_xranConf.frame_conf.sSlotConfig[i].nSymbolType[j] = slotcfg[j];\r
- }\r
- m_xranConf.frame_conf.sSlotConfig[i].reserved[0] = 0;\r
- m_xranConf.frame_conf.sSlotConfig[i].reserved[1] = 0;\r
- }\r
- }\r
- else {\r
- std::cout << "*** Invalid Duplex type [" << tmpstr << "] !!!" << std::endl;\r
- std::cout << "****** Set it to FDD... " << std::endl;\r
- m_xranConf.frame_conf.nFrameDuplexType = 0;\r
- }\r
-\r
- m_xranConf.frame_conf.nNumerology = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "mu");\r
- if(m_xranConf.frame_conf.nNumerology > 3) {\r
- std::cout << "*** Invalid Numerology [" << m_xranConf.frame_conf.nNumerology << "] !!!" << std::endl;\r
- m_xranConf.frame_conf.nNumerology = 0;\r
- std::cout << "****** Set it to " << m_xranConf.frame_conf.nNumerology << "..." << std::endl;\r
- }\r
-\r
- m_xranConf.nCC = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "num_cc");\r
- if(m_xranConf.nCC > XRAN_MAX_SECTOR_NR) {\r
- std::cout << "*** Exceeds maximum number of carriers supported [" << m_xranConf.nCC << "] !!!" << std::endl;\r
- m_xranConf.nCC = XRAN_MAX_SECTOR_NR;\r
- std::cout << "****** Adjusted to " << m_xranConf.nCC << "..." << std::endl;\r
- }\r
- m_xranConf.neAxc = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "num_eaxc");\r
- if(m_xranConf.neAxc > XRAN_MAX_ANTENNA_NR) {\r
- std::cout << "*** Exceeds maximum number of antenna supported [" << m_xranConf.neAxc << "] !!!" << std::endl;\r
- m_xranConf.neAxc = XRAN_MAX_ANTENNA_NR;\r
- std::cout << "****** Adjusted to " << m_xranConf.neAxc << "..." << std::endl;\r
- }\r
-\r
- m_bSub6 = get_globalcfg<bool>(XRAN_UT_KEY_GLOBALCFG_RU, "sub6");\r
- temp = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "chbw_dl");\r
- m_xranConf.nDLRBs = get_num_rbs(get_numerology(), temp, m_bSub6);\r
- temp = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "chbw_ul");\r
- m_xranConf.nULRBs = get_num_rbs(get_numerology(), temp, m_bSub6);\r
-\r
- m_xranConf.nAntElmTRx = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "ant_elm_trx");\r
- m_xranConf.nDLFftSize = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "fft_size");\r
- m_xranConf.nULFftSize = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "fft_size");\r
-\r
- m_xranConf.prach_conf.nPrachConfIdx = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_PRACH, "config_id");\r
- m_xranConf.prach_conf.nPrachSubcSpacing = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_PRACH, "scs");\r
- m_xranConf.prach_conf.nPrachFreqStart = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_PRACH, "freq_start");\r
- m_xranConf.prach_conf.nPrachFreqOffset = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_PRACH, "freq_offset");\r
- m_xranConf.prach_conf.nPrachFilterIdx = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_PRACH, "filter_id");\r
- m_xranConf.prach_conf.nPrachZeroCorrConf= 0;\r
- m_xranConf.prach_conf.nPrachRestrictSet = 0;\r
- m_xranConf.prach_conf.nPrachRootSeqIdx = 0;\r
-\r
- tmpstr = get_globalcfg<std::string>(XRAN_UT_KEY_GLOBALCFG_RU, "category");\r
- if(tmpstr == "A")\r
- m_xranConf.ru_conf.xranCat = XRAN_CATEGORY_A;\r
- else if(tmpstr == "B")\r
- m_xranConf.ru_conf.xranCat = XRAN_CATEGORY_B;\r
- else {\r
- std::cout << "*** Invalid RU Category [" << tmpstr << "] !!!" << std::endl;\r
- std::cout << "****** Set it to Category A... " << std::endl;\r
- m_xranConf.ru_conf.xranCat = XRAN_CATEGORY_A;\r
- }\r
-\r
- m_xranConf.ru_conf.iqWidth = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "iq_width");\r
- m_xranConf.ru_conf.compMeth = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "comp_meth");\r
-\r
- temp = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "fft_size");\r
- m_xranConf.ru_conf.fftSize = 0;\r
- while (temp >>= 1)\r
- ++m_xranConf.ru_conf.fftSize;\r
-\r
- m_xranConf.ru_conf.byteOrder = XRAN_NE_BE_BYTE_ORDER;\r
- m_xranConf.ru_conf.iqOrder = XRAN_I_Q_ORDER;\r
-\r
- m_xranConf.log_level = 0;\r
-/*\r
- m_xranConf.bbdev_enc = nullptr;\r
- m_xranConf.bbdev_dec = nullptr;\r
- m_xranConf.ttiCb = nullptr;\r
- m_xranConf.ttiCbParam = nullptr;\r
-*/\r
- }\r
-\r
- ~xranLibWraper()\r
- {\r
- }\r
-\r
- int SetUp()\r
- {\r
- int i;\r
-\r
- printf("O-DU MAC address: %02X:%02X:%02X:%02X:%02X:%02X\n",\r
- m_xranInit.p_o_du_addr[0],\r
- m_xranInit.p_o_du_addr[1],\r
- m_xranInit.p_o_du_addr[2],\r
- m_xranInit.p_o_du_addr[3],\r
- m_xranInit.p_o_du_addr[4],\r
- m_xranInit.p_o_du_addr[5]);\r
-\r
- printf("O-RU MAC address: %02X:%02X:%02X:%02X:%02X:%02X\n",\r
- m_xranInit.p_o_ru_addr[0],\r
- m_xranInit.p_o_ru_addr[1],\r
- m_xranInit.p_o_ru_addr[2],\r
- m_xranInit.p_o_ru_addr[3],\r
- m_xranInit.p_o_ru_addr[4],\r
- m_xranInit.p_o_ru_addr[5]);\r
-\r
- printf("eAxCID - %d:%d:%d:%d (%04x, %04x, %04x, %04x)\n",\r
- m_xranInit.eAxCId_conf.bit_cuPortId,\r
- m_xranInit.eAxCId_conf.bit_bandSectorId,\r
- m_xranInit.eAxCId_conf.bit_ccId,\r
- m_xranInit.eAxCId_conf.bit_ruPortId,\r
- m_xranInit.eAxCId_conf.mask_cuPortId,\r
- m_xranInit.eAxCId_conf.mask_bandSectorId,\r
- m_xranInit.eAxCId_conf.mask_ccId,\r
- m_xranInit.eAxCId_conf.mask_ruPortId);\r
-\r
- printf("Total BF Weights : %d\n", m_xranInit.totalBfWeights);\r
-\r
- xran_init(0, NULL, &m_xranInit, &argv[0], &m_xranhandle);\r
-\r
- for(i = 0; i < XRAN_MAX_SECTOR_NR; i++)\r
- m_nSectorIndex[i] = i;\r
-\r
- /* set to maximum length to support multiple cases */\r
- m_nFpgaToSW_FTH_RxBufferLen = 13168; /* 273*12*4 + 64*/\r
- m_nSW_ToFpga_FTH_TxBufferLen = 13168; /* 273*12*4 + 64*/\r
-\r
- if(init_memory() < 0) {\r
- std::cout << "Fatal Error on Initialization !!!" << std::endl;\r
- std::cout << "INIT FAILED" << std::endl;\r
- return (-1);\r
- }\r
-\r
- std::cout << "INIT DONE" << std::endl;\r
- return (0);\r
- }\r
-\r
- void TearDown()\r
- {\r
- if(m_xranhandle) {\r
- xran_close(m_xranhandle);\r
- m_xranhandle = nullptr;\r
- std::cout << "CLOSE DONE" << std::endl;\r
- }\r
- else\r
- std::cout << "ALREADY CLOSED" << std::endl;\r
- }\r
-\r
- int Init(struct xran_fh_config *pCfg = nullptr)\r
- {\r
- xran_status_t status;\r
- int32_t nSectorNum;\r
- int32_t i, j, k, z;\r
- void *ptr;\r
- void *mb;\r
- uint32_t *u32dptr;\r
- uint16_t *u16dptr;\r
- uint8_t *u8dptr;\r
- SWXRANInterfaceTypeEnum eInterfaceType;\r
- int32_t cc_id, ant_id, sym_id, tti;\r
- int32_t flowId;\r
- char *pos = NULL;\r
- struct xran_prb_map *pRbMap = NULL;\r
-\r
-\r
- /* Update member variables */\r
- if(pCfg)\r
- memcpy(&m_xranConf, pCfg, sizeof(struct xran_fh_config));\r
-\r
- /* Init timer context */\r
- xran_lib_ota_tti = 0;\r
- xran_lib_ota_sym = 0;\r
- xran_lib_ota_sym_idx = 0;\r
- for(i=0; i < MAX_NUM_OF_XRAN_CTX; i++)\r
- m_timer_ctx[i].tti_to_process = i;\r
-\r
- nSectorNum = get_num_cc();\r
-\r
- /* Cat B RU support */\r
- if(get_rucategory() == XRAN_CATEGORY_B) {\r
- /* 10 * [14*32*273*2*2] = 4892160 bytes */\r
- iq_bfw_buffer_size_dl = (m_nSlots * N_SYM_PER_SLOT * get_num_antelmtrx() * get_num_dlrbs() * 4L);\r
- iq_bfw_buffer_size_ul = (m_nSlots * N_SYM_PER_SLOT * get_num_antelmtrx() * get_num_ulrbs() * 4L);\r
-\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(get_num_cc() * get_num_eaxc()); i++) {\r
- p_tx_dl_bfw_buffer[i] = (int16_t*)malloc(iq_bfw_buffer_size_dl);\r
- tx_dl_bfw_buffer_size[i] = (int32_t)iq_bfw_buffer_size_dl;\r
- if(p_tx_dl_bfw_buffer[i] == NULL)\r
- return(-1);\r
-\r
- memset(p_tx_dl_bfw_buffer[i], 'D', iq_bfw_buffer_size_dl);\r
- tx_dl_bfw_buffer_position[i] = 0;\r
-\r
- p_tx_ul_bfw_buffer[i] = (int16_t*)malloc(iq_bfw_buffer_size_ul);\r
- tx_ul_bfw_buffer_size[i] = (int32_t)iq_bfw_buffer_size_ul;\r
- if(p_tx_ul_bfw_buffer[i] == NULL)\r
- return (-1);\r
-\r
- memset(p_tx_ul_bfw_buffer[i], 'U', iq_bfw_buffer_size_ul);\r
- tx_ul_bfw_buffer_position[i] = 0;\r
- }\r
- }\r
-\r
- /* Init RB map */\r
- for(cc_id = 0; cc_id <nSectorNum; cc_id++) {\r
- for(tti = 0; tti < XRAN_N_FE_BUF_LEN; tti ++) {\r
- for(ant_id = 0; ant_id < XRAN_MAX_ANTENNA_NR; ant_id++) {\r
- flowId = XRAN_MAX_ANTENNA_NR*cc_id + ant_id;\r
-\r
- /* C-plane DL */\r
- pRbMap = (struct xran_prb_map *)m_sFrontHaulTxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData;\r
- if(pRbMap) {\r
- pRbMap->dir = XRAN_DIR_DL;\r
- pRbMap->xran_port = 0;\r
- pRbMap->band_id = 0;\r
- pRbMap->cc_id = cc_id;\r
- pRbMap->ru_port_id = ant_id;\r
- pRbMap->tti_id = tti;\r
- pRbMap->start_sym_id = 0;\r
-\r
- pRbMap->nPrbElm = 1;\r
- pRbMap->prbMap[0].nRBStart = 0;\r
- pRbMap->prbMap[0].nRBSize = get_num_dlrbs();\r
- pRbMap->prbMap[0].nStartSymb = 0;\r
- pRbMap->prbMap[0].numSymb = 14;\r
- pRbMap->prbMap[0].nBeamIndex = 0;\r
- pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE;\r
-\r
- if(get_rucategory() == XRAN_CATEGORY_A) {\r
- pRbMap->prbMap[0].BeamFormingType = XRAN_BEAM_ID_BASED;\r
- pRbMap->prbMap[0].bf_weight_update = 0;\r
- //pRbMap->prbMap[0].bf_attribute.weight[];\r
- //pRbMap->prbMap[0].bf_precoding.weight[];\r
- }\r
- else if(get_rucategory() == XRAN_CATEGORY_B) {\r
- int idxElm;\r
- int iPrb;\r
- char *dl_bfw_pos = ((char*)p_tx_dl_bfw_buffer[flowId]) + tx_dl_bfw_buffer_position[flowId];\r
- struct xran_prb_elm* p_prbMap = NULL;\r
- int num_antelm;\r
-\r
- pRbMap->prbMap[0].BeamFormingType = XRAN_BEAM_WEIGHT;\r
- pRbMap->prbMap[0].bf_weight_update = 1;\r
-\r
- num_antelm = get_num_antelmtrx();\r
-#if 0\r
- /* populate beam weights to C-plane for each elm */\r
- pRbMap->bf_weight.nAntElmTRx = num_antelm;\r
- for(idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++){\r
- p_prbMap = &pRbMap->prbMap[idxElm];\r
- for (iPrb = p_prbMap->nRBStart; iPrb < (p_prbMap->nRBStart + p_prbMap->nRBSize); iPrb++) {\r
- /* copy BF W IQs for 1 PRB of */\r
- rte_memcpy(&pRbMap->bf_weight.weight[iPrb][0], (dl_bfw_pos + (iPrb * num_antelm)*4), num_antelm*4);\r
- }\r
- }\r
-#endif\r
- } /* else if(get_rucategory() == XRAN_CATEGORY_B) */\r
- } /* if(pRbMap) */\r
- else {\r
- std::cout << "DL pRbMap ==NULL" << std::endl;\r
- }\r
-\r
- /* C-plane UL */\r
- pRbMap = (struct xran_prb_map *)m_sFrontHaulRxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData;\r
- if(pRbMap) {\r
- pRbMap->dir = XRAN_DIR_UL;\r
- pRbMap->xran_port = 0;\r
- pRbMap->band_id = 0;\r
- pRbMap->cc_id = cc_id;\r
- pRbMap->ru_port_id = ant_id;\r
- pRbMap->tti_id = tti;\r
- pRbMap->start_sym_id = 0;\r
-\r
- pRbMap->nPrbElm = 1;\r
- pRbMap->prbMap[0].nRBStart = 0;\r
- pRbMap->prbMap[0].nRBSize = get_num_ulrbs();\r
- pRbMap->prbMap[0].nStartSymb = 0;\r
- pRbMap->prbMap[0].numSymb = 14;\r
- pRbMap->prbMap[0].nBeamIndex = 0;\r
- pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE;\r
-\r
- if(get_rucategory() == XRAN_CATEGORY_A) {\r
- pRbMap->prbMap[0].BeamFormingType = XRAN_BEAM_ID_BASED;\r
- pRbMap->prbMap[0].bf_weight_update = 0;\r
- //pRbMap->prbMap[0].bf_attribute.weight[];\r
- //pRbMap->prbMap[0].bf_precoding.weight[];\r
- }\r
- else if(get_rucategory() == XRAN_CATEGORY_B) {\r
- int idxElm;\r
- int iPrb;\r
- char *ul_bfw_pos = ((char*)p_tx_ul_bfw_buffer[flowId]) + tx_ul_bfw_buffer_position[flowId];\r
- struct xran_prb_elm* p_prbMap = NULL;\r
- int num_antelm;\r
-\r
- pRbMap->prbMap[0].BeamFormingType = XRAN_BEAM_WEIGHT;\r
- pRbMap->prbMap[0].bf_weight_update = 1;\r
-\r
- num_antelm = get_num_antelmtrx();\r
-#if 0\r
- /* populate beam weights to C-plane for each elm */\r
- pRbMap->bf_weight.nAntElmTRx = num_antelm;\r
- for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++){\r
- p_prbMap = &pRbMap->prbMap[idxElm];\r
- for (iPrb = p_prbMap->nRBStart; iPrb < (p_prbMap->nRBStart + p_prbMap->nRBSize); iPrb++){\r
- /* copy BF W IQs for 1 PRB of */\r
- rte_memcpy(&pRbMap->bf_weight.weight[iPrb][0], (ul_bfw_pos + (iPrb*num_antelm)*4), num_antelm*4);\r
- }\r
- }\r
-#endif\r
- } /* else if(get_rucategory() == XRAN_CATEGORY_B) */\r
-\r
- } /* if(pRbMap) */\r
- else {\r
- std::cout << "UL: pRbMap ==NULL" << std::endl;\r
- }\r
- }\r
- }\r
- }\r
-\r
- return (0);\r
- }\r
-\r
- void Cleanup()\r
- {\r
- int i;\r
-\r
- if(get_rucategory() == XRAN_CATEGORY_B) {\r
- for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(get_num_cc() * get_num_eaxc()); i++) {\r
- if(p_tx_dl_bfw_buffer[i]) {\r
- free(p_tx_dl_bfw_buffer[i]);\r
- p_tx_dl_bfw_buffer[i] == NULL;\r
- }\r
-\r
- if(p_tx_ul_bfw_buffer[i]) {\r
- free(p_tx_ul_bfw_buffer[i]);\r
- p_tx_ul_bfw_buffer[i] == NULL;\r
- }\r
- }\r
- }\r
-\r
- return;\r
- }\r
-\r
-\r
- void Open(xran_ethdi_mbuf_send_fn send_cp, xran_ethdi_mbuf_send_fn send_up,\r
- void *fh_rx_callback, void *fh_rx_prach_callback)\r
- {\r
- struct xran_fh_config *pXranConf;\r
- int32_t nSectorNum;\r
- int i, j, k, z;\r
- struct xran_buffer_list *pFthTxBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];\r
- struct xran_buffer_list *pFthTxPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];\r
- struct xran_buffer_list *pFthRxBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];\r
- struct xran_buffer_list *pFthRxPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];\r
- struct xran_buffer_list *pFthRxRachBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];\r
-\r
-#if 0\r
- xran_reg_physide_cb(xranHandle, physide_dl_tti_call_back, NULL, 10, XRAN_CB_TTI);\r
- xran_reg_physide_cb(xranHandle, physide_ul_half_slot_call_back, NULL, 10, XRAN_CB_HALF_SLOT_RX);\r
- xran_reg_physide_cb(xranHandle, physide_ul_full_slot_call_back, NULL, 10, XRAN_CB_FULL_SLOT_RX);\r
-#endif\r
- nSectorNum = get_num_cc();\r
-\r
- for(i=0; i<nSectorNum; i++) {\r
- for(j=0; j<XRAN_N_FE_BUF_LEN; j++) {\r
- for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++) {\r
- pFthTxBuffer[i][z][j] = &(m_sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList);\r
- pFthTxPrbMapBuffer[i][z][j] = &(m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList);\r
- pFthRxBuffer[i][z][j] = &(m_sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList);\r
- pFthRxPrbMapBuffer[i][z][j] = &(m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList);\r
- pFthRxRachBuffer[i][z][j] = &(m_sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList);\r
- }\r
- }\r
- }\r
-\r
- if(m_nInstanceHandle[0] != NULL) {\r
- for(i = 0; i<nSectorNum; i++) {\r
- xran_5g_fronthault_config(m_nInstanceHandle[0][i],\r
- pFthTxBuffer[i], pFthTxPrbMapBuffer[i],\r
- pFthRxBuffer[i], pFthRxPrbMapBuffer[i],\r
- (void (*)(void *, xran_status_t))fh_rx_callback, &pFthRxBuffer[i][0]);\r
-\r
- xran_5g_prach_req(m_nInstanceHandle[0][i], pFthRxRachBuffer[i],\r
- (void (*)(void *, xran_status_t))fh_rx_prach_callback, &pFthRxRachBuffer[i][0]);\r
- }\r
- }\r
-\r
- xran_register_cb_mbuf2ring(send_cp, send_up);\r
-\r
- xran_open(m_xranhandle, &m_xranConf);\r
- }\r
-\r
- void Close()\r
- {\r
- if(m_xranhandle)\r
- xran_close(m_xranhandle);\r
- }\r
-\r
- int Start()\r
- {\r
- if(m_xranhandle)\r
- return(xran_start(m_xranhandle));\r
- else\r
- return (-1);\r
- }\r
-\r
- int Stop()\r
- {\r
- if(m_xranhandle)\r
- return(xran_stop(m_xranhandle));\r
- else\r
- return (-1);\r
- }\r
-\r
- /* emulation of timer */\r
- void update_tti()\r
- {\r
- tti_ota_cb(nullptr, get_timer_ctx());\r
- }\r
-\r
- void update_symbol_index()\r
- {\r
- xran_lib_ota_sym_idx++;\r
- if((xran_lib_ota_sym_idx % N_SYM_PER_SLOT) == 0) {\r
- update_tti();\r
- }\r
-\r
- xran_lib_ota_sym++;\r
- if(xran_lib_ota_sym >= N_SYM_PER_SLOT)\r
- xran_lib_ota_sym = 0;\r
- }\r
-\r
- int apply_cpenable(bool flag)\r
- {\r
- struct xran_device_ctx *pCtx = xran_dev_get_ctx();\r
-\r
- if(is_running())\r
- return (-1);\r
-\r
- if(pCtx == nullptr)\r
- return (-1);\r
-\r
- if(flag == true) {\r
- m_xranInit.enableCP = 1;\r
- pCtx->enableCP = 1;\r
- }\r
- else {\r
- m_xranInit.enableCP = 0;\r
- pCtx->enableCP = 0;\r
- }\r
-\r
- return (0);\r
- }\r
-\r
-\r
- int get_slot_config(const std::string &cfgname, struct xran_frame_config *pCfg)\r
- {\r
- int numcfg, i, j;\r
- std::vector<int> slotcfg;\r
-\r
- numcfg = get_globalcfg<int>(cfgname, "period");\r
- pCfg->nTddPeriod = numcfg;\r
- for(i=0; i < numcfg; i++) {\r
- std::stringstream slotcfgname;\r
-\r
- slotcfgname << "slot" << i;\r
- std::vector<int> slotcfg = get_globalcfg_array<int>(cfgname, slotcfgname.str());\r
-\r
- for(j=0; j < slotcfg.size(); j++)\r
- pCfg->sSlotConfig[i].nSymbolType[j] = slotcfg[j];\r
- pCfg->sSlotConfig[i].reserved[0] = 0; pCfg->sSlotConfig[i].reserved[1] = 0;\r
- }\r
-\r
- return (numcfg);\r
- }\r
-\r
- int get_num_rbs(uint32_t nNumerology, uint32_t nBandwidth, bool nSub6)\r
- {\r
- if(nNumerology > 3)\r
- return (-1);\r
-\r
- if(nSub6) {\r
- if (nNumerology < 3) {\r
- /* F1 Tables 38.101-1 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB */\r
- switch(nBandwidth) {\r
- case PHY_BW_5MHZ: return(nNumRbsPerSymF1[nNumerology][0]);\r
- case PHY_BW_10MHZ: return(nNumRbsPerSymF1[nNumerology][1]);\r
- case PHY_BW_15MHZ: return(nNumRbsPerSymF1[nNumerology][2]);\r
- case PHY_BW_20MHZ: return(nNumRbsPerSymF1[nNumerology][3]);\r
- case PHY_BW_25MHZ: return(nNumRbsPerSymF1[nNumerology][4]);\r
- case PHY_BW_30MHZ: return(nNumRbsPerSymF1[nNumerology][5]);\r
- case PHY_BW_40MHZ: return(nNumRbsPerSymF1[nNumerology][6]);\r
- case PHY_BW_50MHZ: return(nNumRbsPerSymF1[nNumerology][7]);\r
- case PHY_BW_60MHZ: return(nNumRbsPerSymF1[nNumerology][8]);\r
- case PHY_BW_70MHZ: return(nNumRbsPerSymF1[nNumerology][9]);\r
- case PHY_BW_80MHZ: return(nNumRbsPerSymF1[nNumerology][10]);\r
- case PHY_BW_90MHZ: return(nNumRbsPerSymF1[nNumerology][11]);\r
- case PHY_BW_100MHZ: return(nNumRbsPerSymF1[nNumerology][12]);\r
- }\r
- }\r
- }\r
- else { /* if(nSub6) */\r
- if((nNumerology >= 2) && (nNumerology <= 3)) {\r
- nNumerology -= 2;\r
- /* F2 Tables 38.101-2 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB */\r
- switch(nBandwidth) {\r
- case PHY_BW_50MHZ: return(nNumRbsPerSymF2[nNumerology][0]); break;\r
- case PHY_BW_100MHZ: return(nNumRbsPerSymF2[nNumerology][1]); break;\r
- case PHY_BW_200MHZ: return(nNumRbsPerSymF2[nNumerology][2]); break;\r
- case PHY_BW_400MHZ: return(nNumRbsPerSymF2[nNumerology][3]); break;\r
- }\r
- }\r
- }\r
-\r
- return(-1);\r
- }\r
-\r
- void *get_xranhandle() { return(m_xranhandle); }\r
- void *get_timer_ctx() { return((void *)&m_timer_ctx[0]); }\r
-\r
- int get_symbol_index() { return (xran_lib_ota_sym); }\r
-\r
- bool is_running() { return((xran_get_if_state() == XRAN_RUNNING)?true:false); }\r
-\r
- enum xran_category get_rucategory() { return(m_xranConf.ru_conf.xranCat); }\r
-\r
- int get_numerology() { return(m_xranConf.frame_conf.nNumerology); }\r
- int get_duplextype() { return(m_xranConf.frame_conf.nFrameDuplexType); }\r
- int get_num_cc() { return(m_xranConf.nCC); }\r
- int get_num_eaxc() { return(m_xranConf.neAxc); }\r
- int get_num_dlrbs() { return(m_xranConf.nDLRBs); }\r
- int get_num_ulrbs() { return(m_xranConf.nULRBs); }\r
- int get_num_antelmtrx() { return(m_xranConf.nAntElmTRx); }\r
-\r
- bool is_cpenable() { return(m_xranInit.enableCP); };\r
- bool is_prachenable() { return(m_xranInit.prachEnable); };\r
- bool is_dynamicsection() { return(m_xranInit.DynamicSectionEna?true:false); }\r
-\r
- void get_cfg_prach(struct xran_prach_config *pCfg)\r
- {\r
- if(pCfg)\r
- memcpy(pCfg, &m_xranConf.prach_conf, sizeof(struct xran_prach_config));\r
- }\r
-\r
- void get_cfg_frame(struct xran_frame_config *pCfg)\r
- {\r
- if(pCfg)\r
- memcpy(pCfg, &m_xranConf.frame_conf, sizeof(struct xran_frame_config));\r
- }\r
-\r
- void get_cfg_ru(struct xran_ru_config *pCfg)\r
- {\r
- if(pCfg)\r
- memcpy(pCfg, &m_xranConf.ru_conf, sizeof(struct xran_ru_config));\r
- }\r
-\r
- void get_cfg_fh(struct xran_fh_config *pCfg)\r
- {\r
- if(pCfg)\r
- memcpy(pCfg, &m_xranConf, sizeof(struct xran_fh_config));\r
- }\r
-\r
-};\r
-\r
-\r
-/* external declaration for the instance */\r
-extern xranLibWraper *xranlib;\r
-\r
-\r
-#endif //XRAN_LIB_WRAP_HPP\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+
+#ifndef XRAN_LIB_WRAP_HPP
+#define XRAN_LIB_WRAP_HPP
+
+#include <exception>
+#include <random>
+#include <string>
+#include <utility>
+#include <vector>
+
+#include <malloc.h>
+#include <stdint.h>
+
+#include "common.hpp"
+#include "xran_fh_o_du.h"
+#include "xran_common.h"
+#include "xran_frame_struct.h"
+
+
+#define XRAN_UT_CFG_FILENAME "conf.json"
+
+#define XRAN_UT_KEY_GLOBALCFG "GLOBAL"
+#define XRAN_UT_KEY_GLOBALCFG_IO "io_cfg"
+#define XRAN_UT_KEY_GLOBALCFG_EAXCID "eAxCId_cfg"
+#define XRAN_UT_KEY_GLOBALCFG_PRACH "prach_cfg"
+#define XRAN_UT_KEY_GLOBALCFG_RU "ru_cfg"
+#define XRAN_UT_KEY_GLOBALCFG_SLOT "slotcfg_"
+
+#define MAX_NUM_OF_XRAN_CTX (2)
+
+#define SW_FPGA_TOTAL_BUFFER_LEN (4*1024*1024*1024)
+#define SW_FPGA_SEGMENT_BUFFER_LEN (1*1024*1024*1024)
+#define SW_FPGA_FH_TOTAL_BUFFER_LEN (1*1024*1024*1024)
+#define FPGA_TO_SW_PRACH_RX_BUFFER_LEN (8192)
+
+#define MAX_ANT_CARRIER_SUPPORTED (XRAN_MAX_SECTOR_NR*XRAN_MAX_ANTENNA_NR)
+
+extern "C"
+{
+extern uint32_t xran_lib_ota_tti;
+extern uint32_t xran_lib_ota_sym;
+extern uint32_t xran_lib_ota_sym_idx;
+
+void sym_ota_cb(struct rte_timer *tim, void *arg);
+void tti_ota_cb(struct rte_timer *tim, void *arg);
+}
+
+class xranLibWraper
+{
+public:
+ typedef enum
+ {
+ XRANFTHTX_OUT = 0,
+ XRANFTHTX_PRB_MAP_OUT,
+ XRANFTHTX_SEC_DESC_OUT,
+ XRANFTHRX_IN,
+ XRANFTHRX_PRB_MAP_IN,
+ XRANFTHTX_SEC_DESC_IN,
+ XRANFTHRACH_IN,
+ MAX_SW_XRAN_INTERFACE_NUM
+ } SWXRANInterfaceTypeEnum;
+
+ enum nChBw
+ {
+ PHY_BW_5MHZ = 5, PHY_BW_10MHZ = 10, PHY_BW_15MHZ = 15,
+ PHY_BW_20MHZ = 20, PHY_BW_25MHZ = 25, PHY_BW_30MHZ = 30,
+ PHY_BW_40MHZ = 40, PHY_BW_50MHZ = 50, PHY_BW_60MHZ = 60,
+ PHY_BW_70MHZ = 70, PHY_BW_80MHZ = 80, PHY_BW_90MHZ = 90,
+ PHY_BW_100MHZ = 100, PHY_BW_200MHZ = 200, PHY_BW_400MHZ = 400
+ };
+
+ // F1 Tables 38.101-1 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB
+ const uint16_t nNumRbsPerSymF1[3][13] =
+ {
+ // 5MHz 10MHz 15MHz 20MHz 25MHz 30MHz 40MHz 50MHz 60MHz 70MHz 80MHz 90MHz 100MHz
+ { 25, 52, 79, 106, 133, 160, 216, 270, 0, 0, 0, 0, 0 }, // Numerology 0 (15KHz)
+ { 11, 24, 38, 51, 65, 78, 106, 133, 162, 0, 217, 245, 273 }, // Numerology 1 (30KHz)
+ { 0, 11, 18, 24, 31, 38, 51, 65, 79, 0, 107, 121, 135 } // Numerology 2 (60KHz)
+ };
+
+ // F2 Tables 38.101-2 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB
+ const uint16_t nNumRbsPerSymF2[2][4] =
+ {
+ // 50MHz 100MHz 200MHz 400MHz
+ { 66, 132, 264, 0 }, // Numerology 2 (60KHz)
+ { 32, 66, 132, 264 } // Numerology 3 (120KHz)
+ };
+
+
+protected:
+ char argv[25] = "unittest";
+
+ std::string m_dpdk_dev_up, m_dpdk_dev_cp, m_dpdk_bbdev;
+
+ void *m_xranhandle;
+
+ uint8_t m_du_mac[6] = { 0x00,0x11, 0x22, 0x33, 0x44, 0x66 };
+ uint8_t m_ru_mac[6] = { 0x00,0x11, 0x22, 0x33, 0x44, 0x55 };
+ bool m_bSub6;
+ uint32_t m_nSlots = 10;
+
+ struct xran_fh_config m_xranConf;
+ struct xran_fh_init m_xranInit;
+
+ struct xran_timer_ctx {
+ uint32_t tti_to_process;
+ } m_timer_ctx[MAX_NUM_OF_XRAN_CTX];
+
+ /* io struct */
+ BbuIoBufCtrlStruct m_sFrontHaulTxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
+ BbuIoBufCtrlStruct m_sFrontHaulTxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
+ BbuIoBufCtrlStruct m_sFrontHaulRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
+ BbuIoBufCtrlStruct m_sFrontHaulRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
+ BbuIoBufCtrlStruct m_sFHPrachRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
+
+ /* buffers lists */
+ struct xran_flat_buffer m_sFrontHaulTxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
+ struct xran_flat_buffer m_sFrontHaulTxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
+ struct xran_flat_buffer m_sFrontHaulRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
+ struct xran_flat_buffer m_sFrontHaulRxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
+ struct xran_flat_buffer m_sFHPrachRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
+
+ void *m_nInstanceHandle[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR]; // instance per sector
+ uint32_t m_nBufPoolIndex[XRAN_MAX_SECTOR_NR][MAX_SW_XRAN_INTERFACE_NUM]; // every api owns unique buffer pool
+
+ uint32_t m_nSW_ToFpga_FTH_TxBufferLen;
+ uint32_t m_nFpgaToSW_FTH_RxBufferLen;
+
+ int32_t m_nSectorIndex[XRAN_MAX_SECTOR_NR];
+
+ int iq_bfw_buffer_size_dl = 0;
+ int iq_bfw_buffer_size_ul = 0;
+
+ /* beamforming weights for UL (O-DU) */
+ int16_t *p_tx_dl_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];
+ int32_t tx_dl_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
+ int32_t tx_dl_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
+
+ /* beamforming weights for UL (O-DU) */
+ int16_t *p_tx_ul_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];
+ int32_t tx_ul_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
+ int32_t tx_ul_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
+
+
+private:
+ json m_global_cfg;
+
+ template<typename T>
+ T get_globalcfg(const std::string &type, const std::string ¶meter_name)
+ {
+ return m_global_cfg[XRAN_UT_KEY_GLOBALCFG][type][parameter_name];
+ }
+
+ template<typename T>
+ std::vector<T> get_globalcfg_array(const std::string &type, const std::string ¶meter_name)
+ {
+ auto array_size = m_global_cfg[XRAN_UT_KEY_GLOBALCFG][type][parameter_name].size();
+
+ std::vector<T> result(array_size);
+
+ for(unsigned number = 0; number < array_size; number++)
+ result.at(number) = m_global_cfg[XRAN_UT_KEY_GLOBALCFG][type][parameter_name][number];
+
+ return result;
+ }
+
+ uint16_t get_eaxcid_mask(int numbit, int shift)
+ {
+ uint16_t result = 0;
+
+ for(int i=0; i < numbit; i++) {
+ result = result << 1; result +=1;
+ }
+ return (result << shift);
+ }
+
+ int init_memory()
+ {
+ xran_status_t status;
+ int32_t i, j, k, z;
+ SWXRANInterfaceTypeEnum eInterfaceType;
+ void *ptr;
+ void *mb;
+ uint32_t *u32dptr;
+ uint16_t *u16dptr;
+ uint8_t *u8dptr;
+
+
+ std::cout << "XRAN front haul xran_mm_init" << std::endl;
+ status = xran_mm_init(m_xranhandle, (uint64_t) SW_FPGA_FH_TOTAL_BUFFER_LEN, SW_FPGA_SEGMENT_BUFFER_LEN);
+ if(status != XRAN_STATUS_SUCCESS) {
+ std::cout << "Failed at XRAN front haul xran_mm_init" << std::endl;
+ return (-1);
+ }
+
+ /* initialize maximum instances to have flexibility for the tests */
+ int nInstanceNum = XRAN_MAX_SECTOR_NR;
+ /* initialize maximum supported CC to have flexibility on the test */
+ int32_t nSectorNum = 6;//XRAN_MAX_SECTOR_NR;
+
+ for(k = 0; k < XRAN_PORTS_NUM; k++) {
+ status = xran_sector_get_instances(m_xranhandle, nInstanceNum, &m_nInstanceHandle[k][0]);
+ if(status != XRAN_STATUS_SUCCESS) {
+ std::cout << "get sector instance failed " << k << " for XRAN nInstanceNum " << nInstanceNum << std::endl;
+ return (-1);
+ }
+ for (i = 0; i < nInstanceNum; i++)
+ std::cout << __func__ << " [" << k << "]: CC " << i << " handle " << m_nInstanceHandle[0][i] << std::endl;
+ }
+ std::cout << "Sucess xran_mm_init" << std::endl;
+
+ /* Init Memory */
+ for(i = 0; i<nSectorNum; i++) {
+ eInterfaceType = XRANFTHTX_OUT;
+ status = xran_bm_init(m_nInstanceHandle[0][i],
+ &m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType],
+ XRAN_N_FE_BUF_LEN * XRAN_MAX_ANTENNA_NR * XRAN_NUM_OF_SYMBOL_PER_SLOT,
+ m_nSW_ToFpga_FTH_TxBufferLen);
+ if(status != XRAN_STATUS_SUCCESS) {
+ std::cout << __LINE__ << " Failed at xran_bm_init, status " << status << std::endl;
+ return (-1);
+ }
+ for(j = 0; j < XRAN_N_FE_BUF_LEN; j++) {
+ for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){
+ m_sFrontHaulTxBbuIoBufCtrl[j][i][z].bValid = 0;
+ m_sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
+ m_sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
+ m_sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
+ m_sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;
+ m_sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &m_sFrontHaulTxBuffers[j][i][z][0];
+
+ for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++) {
+ m_sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = m_nSW_ToFpga_FTH_TxBufferLen; // 14 symbols 3200bytes/symbol
+ m_sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;
+ m_sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;
+ status = xran_bm_allocate_buffer(m_nInstanceHandle[0][i], m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType], &ptr, &mb);
+ if(status != XRAN_STATUS_SUCCESS) {
+ std::cout << __LINE__ << " Failed at xran_bm_allocate_buffer, status " << status << std::endl;
+ return (-1);
+ }
+ m_sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;
+ m_sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *)mb;
+
+ if(ptr) {
+ u32dptr = (uint32_t*)(ptr);
+ uint8_t *ptr_temp = (uint8_t *)ptr;
+ memset(u32dptr, 0x0, m_nSW_ToFpga_FTH_TxBufferLen);
+ }
+ }
+ }
+ }
+
+ /* C-plane DL */
+ eInterfaceType = XRANFTHTX_SEC_DESC_OUT;
+ status = xran_bm_init(m_nInstanceHandle[0][i],
+ &m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType],
+ XRAN_N_FE_BUF_LEN * XRAN_MAX_ANTENNA_NR * XRAN_NUM_OF_SYMBOL_PER_SLOT*XRAN_MAX_SECTIONS_PER_SYM, sizeof(struct xran_section_desc));
+ if(XRAN_STATUS_SUCCESS != status) {
+ std::cout << __LINE__ << " Failed at xran_bm_init, status " << status << std::endl;
+ return (-1);
+ }
+ eInterfaceType = XRANFTHTX_PRB_MAP_OUT;
+ status = xran_bm_init(m_nInstanceHandle[0][i],
+ &m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType],
+ XRAN_N_FE_BUF_LEN * XRAN_MAX_ANTENNA_NR * XRAN_NUM_OF_SYMBOL_PER_SLOT,
+ sizeof(struct xran_prb_map));
+ if(status != XRAN_STATUS_SUCCESS) {
+ std::cout << __LINE__ << " Failed at xran_bm_init, status " << status << std::endl;
+ return (-1);
+ }
+ for(j = 0; j < XRAN_N_FE_BUF_LEN; j++) {
+ for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++) {
+ m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].bValid = 0;
+ m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
+ m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
+ m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
+ m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;
+ m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &m_sFrontHaulTxPrbMapBuffers[j][i][z];
+
+ m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nElementLenInBytes = sizeof(struct xran_prb_map);
+ m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nNumberOfElements = 1;
+ m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nOffsetInBytes = 0;
+ status = xran_bm_allocate_buffer(m_nInstanceHandle[0][i], m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType], &ptr, &mb);
+ if(status != XRAN_STATUS_SUCCESS) {
+ std::cout << __LINE__ << " Failed at xran_bm_allocate_buffer, status " << status << std::endl;
+ return (-1);
+ }
+ m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pData = (uint8_t *)ptr;
+ m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pCtrl = (void *)mb;
+ void *sd_ptr;
+ void *sd_mb;
+ int elm_id;
+ struct xran_prb_map * p_rb_map = (struct xran_prb_map *)ptr;
+ //memcpy(ptr, &startupConfiguration.PrbMap, sizeof(struct xran_prb_map));
+ for (elm_id = 0; elm_id < XRAN_MAX_SECTIONS_PER_SYM; elm_id++){
+ struct xran_prb_elm *pPrbElem = &p_rb_map->prbMap[elm_id];
+ for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++){
+ status = xran_bm_allocate_buffer(m_nInstanceHandle[0][i], m_nBufPoolIndex[m_nSectorIndex[i]][XRANFTHTX_SEC_DESC_OUT], &sd_ptr, &sd_mb);
+ if(XRAN_STATUS_SUCCESS != status){
+ std::cout << __LINE__ << "SD Failed at xran_bm_allocate_buffer , status %d\n" << status << std::endl;
+ return (-1);
+ }
+ pPrbElem->p_sec_desc[k] = (struct xran_section_desc *)sd_ptr;
+ }
+ }
+ }
+ }
+ }
+
+ for(i = 0; i<nSectorNum; i++) {
+ eInterfaceType = XRANFTHRX_IN;
+ status = xran_bm_init(m_nInstanceHandle[0][i],
+ &m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType],
+ XRAN_N_FE_BUF_LEN * XRAN_MAX_ANTENNA_NR * XRAN_NUM_OF_SYMBOL_PER_SLOT,
+ m_nSW_ToFpga_FTH_TxBufferLen); /* ????, actual alloc size is m_nFpgaToSW_FTH_RxBUfferLen */
+ if(status != XRAN_STATUS_SUCCESS) {
+ std::cout << __LINE__ << " Failed at xran_bm_init, status " << status << std::endl;
+ return (-1);
+ }
+
+ for(j = 0;j < XRAN_N_FE_BUF_LEN; j++) {
+ for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++) {
+ m_sFrontHaulRxBbuIoBufCtrl[j][i][z].bValid = 0;
+ m_sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
+ m_sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
+ m_sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
+ m_sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;
+ m_sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &m_sFrontHaulRxBuffers[j][i][z][0];
+ for(k = 0; k< XRAN_NUM_OF_SYMBOL_PER_SLOT; k++) {
+ m_sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = m_nFpgaToSW_FTH_RxBufferLen;
+ m_sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;
+ m_sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;
+ status = xran_bm_allocate_buffer(m_nInstanceHandle[0][i], m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType],&ptr, &mb);
+ if(status != XRAN_STATUS_SUCCESS) {
+ std::cout << __LINE__ << " Failed at xran_bm_allocate_buffer, status " << status << std::endl;
+ return (-1);
+ }
+ m_sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;
+ m_sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *) mb;
+ if(ptr) {
+ u32dptr = (uint32_t*)(ptr);
+ uint8_t *ptr_temp = (uint8_t *)ptr;
+ memset(u32dptr, 0x0, m_nFpgaToSW_FTH_RxBufferLen);
+ }
+ }
+ }
+ }
+
+ eInterfaceType = XRANFTHTX_SEC_DESC_IN;
+ status = xran_bm_init(m_nInstanceHandle[0][i],
+ &m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType],
+ XRAN_N_FE_BUF_LEN * XRAN_MAX_ANTENNA_NR * XRAN_NUM_OF_SYMBOL_PER_SLOT*XRAN_MAX_SECTIONS_PER_SYM, sizeof(struct xran_section_desc));
+ if(XRAN_STATUS_SUCCESS != status) {
+ std::cout << __LINE__ << " Failed at xran_bm_init, status " << status << std::endl;
+ return (-1);
+ }
+ eInterfaceType = XRANFTHRX_PRB_MAP_IN;
+ status = xran_bm_init(m_nInstanceHandle[0][i],
+ &m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType],
+ XRAN_N_FE_BUF_LEN * XRAN_MAX_ANTENNA_NR * XRAN_NUM_OF_SYMBOL_PER_SLOT,
+ sizeof(struct xran_prb_map));
+ if(status != XRAN_STATUS_SUCCESS) {
+ std::cout << __LINE__ << " Failed at xran_bm_init, status " << status << std::endl;
+ return (-1);
+ }
+
+ for(j = 0;j < XRAN_N_FE_BUF_LEN; j++) {
+ for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++) {
+ m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].bValid = 0;
+ m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
+ m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
+ m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
+ m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;
+ m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &m_sFrontHaulRxPrbMapBuffers[j][i][z];
+
+ m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nElementLenInBytes = sizeof(struct xran_prb_map);
+ m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nNumberOfElements = 1;
+ m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nOffsetInBytes = 0;
+ status = xran_bm_allocate_buffer(m_nInstanceHandle[0][i],m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType], &ptr, &mb);
+ if(status != XRAN_STATUS_SUCCESS) {
+ std::cout << __LINE__ << " Failed at xran_bm_allocate_buffer , status " << status << std::endl;
+ return (-1);
+ }
+ m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pData = (uint8_t *)ptr;
+ m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pCtrl = (void *)mb;
+ void *sd_ptr;
+ void *sd_mb;
+ int elm_id;
+ struct xran_prb_map * p_rb_map = (struct xran_prb_map *)ptr;
+ //memcpy(ptr, &startupConfiguration.PrbMap, sizeof(struct xran_prb_map));
+ for (elm_id = 0; elm_id < XRAN_MAX_SECTIONS_PER_SYM; elm_id++){
+ struct xran_prb_elm *pPrbElem = &p_rb_map->prbMap[elm_id];
+ for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++){
+ status = xran_bm_allocate_buffer(m_nInstanceHandle[0][i], m_nBufPoolIndex[m_nSectorIndex[i]][XRANFTHTX_SEC_DESC_IN], &sd_ptr, &sd_mb);
+ if(XRAN_STATUS_SUCCESS != status){
+ std::cout << __LINE__ << "SD Failed at xran_bm_allocate_buffer , status %d\n" << status << std::endl;
+ return (-1);
+ }
+ pPrbElem->p_sec_desc[k] = (struct xran_section_desc *)sd_ptr;
+ }
+ }
+ }
+ }
+ }
+
+ for(i = 0; i<nSectorNum; i++) {
+ eInterfaceType = XRANFTHRACH_IN;
+ status = xran_bm_init(m_nInstanceHandle[0][i],
+ &m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType],
+ XRAN_N_FE_BUF_LEN * XRAN_MAX_ANTENNA_NR * XRAN_NUM_OF_SYMBOL_PER_SLOT,
+ FPGA_TO_SW_PRACH_RX_BUFFER_LEN);
+ if(status != XRAN_STATUS_SUCCESS) {
+ std::cout << __LINE__ << " Failed at xran_bm_init, status " << status << std::endl;
+ return (-1);
+ }
+ for(j = 0; j < XRAN_N_FE_BUF_LEN; j++) {
+ for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++) {
+ m_sFHPrachRxBbuIoBufCtrl[j][i][z].bValid = 0;
+ m_sFHPrachRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
+ m_sFHPrachRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
+ m_sFHPrachRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
+ m_sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_MAX_ANTENNA_NR;
+ m_sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &m_sFHPrachRxBuffers[j][i][z][0];
+ for(k = 0; k< XRAN_NUM_OF_SYMBOL_PER_SLOT; k++) {
+ m_sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = FPGA_TO_SW_PRACH_RX_BUFFER_LEN;
+ m_sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;
+ m_sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;
+ status = xran_bm_allocate_buffer(m_nInstanceHandle[0][i], m_nBufPoolIndex[m_nSectorIndex[i]][eInterfaceType], &ptr, &mb);
+ if(status != XRAN_STATUS_SUCCESS) {
+ std::cout << __LINE__ << " Failed at xran_bm_allocate_buffer, status " << status << std::endl;
+ return (-1);
+ }
+ m_sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;
+ m_sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *)mb;
+ if(ptr) {
+ u32dptr = (uint32_t*)(ptr);
+ memset(u32dptr, 0x0, FPGA_TO_SW_PRACH_RX_BUFFER_LEN);
+ }
+ }
+ }
+ }
+ }
+
+ return (0);
+ }
+
+
+public:
+ xranLibWraper()
+ {
+ int i, temp;
+ std::string tmpstr;
+ unsigned int tmp_mac[6];
+
+ m_global_cfg = read_json_from_file(XRAN_UT_CFG_FILENAME);
+
+ memset(&m_xranInit, 0, sizeof(xran_fh_init));
+
+ m_xranInit.io_cfg.id = 0;
+
+ /* DPDK configuration */
+ m_dpdk_dev_up = get_globalcfg<std::string>(XRAN_UT_KEY_GLOBALCFG_IO, "dpdk_dev_up");
+ m_dpdk_dev_cp = get_globalcfg<std::string>(XRAN_UT_KEY_GLOBALCFG_IO, "dpdk_dev_cp");
+ m_xranInit.io_cfg.dpdk_dev[XRAN_UP_VF] = (m_dpdk_dev_up == "") ? NULL : (char *)&m_dpdk_dev_up;
+ m_xranInit.io_cfg.dpdk_dev[XRAN_CP_VF] = (m_dpdk_dev_cp == "") ? NULL : (char *)&m_dpdk_dev_cp;
+
+ m_xranInit.io_cfg.core = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_IO, "core");
+ m_xranInit.io_cfg.system_core = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_IO, "system_core");
+ m_xranInit.io_cfg.pkt_proc_core = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_IO, "pkt_proc_core");
+ m_xranInit.io_cfg.pkt_aux_core = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_IO, "pkt_aux_core");
+ m_xranInit.io_cfg.timing_core = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_IO, "timing_core");
+
+ std::string bbdev_mode = get_globalcfg<std::string>(XRAN_UT_KEY_GLOBALCFG_IO, "bbdev_mode");
+ if(bbdev_mode == "sw")
+ m_xranInit.io_cfg.bbdev_mode = XRAN_BBDEV_MODE_HW_OFF;
+ else if(bbdev_mode == "hw")
+ m_xranInit.io_cfg.bbdev_mode = XRAN_BBDEV_MODE_HW_ON;
+ else if(bbdev_mode == "none")
+ m_xranInit.io_cfg.bbdev_mode = XRAN_BBDEV_NOT_USED;
+ else {
+ std::cout << "Invalid BBDev mode [" << bbdev_mode << "], bbdev won't be used." << std::endl;
+ m_xranInit.io_cfg.bbdev_mode = XRAN_BBDEV_NOT_USED;
+ }
+
+ m_xranInit.dpdkBasebandFecMode = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_IO, "dpdkBasebandFecMode");
+
+ m_dpdk_bbdev = get_globalcfg<std::string>(XRAN_UT_KEY_GLOBALCFG_IO, "dpdkBasebandDevice");
+ m_xranInit.dpdkBasebandDevice = (m_dpdk_bbdev == "") ? NULL : (char *)&m_dpdk_bbdev;
+
+ /* Network configurations */
+ m_xranInit.mtu = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_IO, "mtu");
+
+ std::string du_mac_str = get_globalcfg<std::string>(XRAN_UT_KEY_GLOBALCFG_IO, "o_du_macaddr");
+ std::string ru_mac_str = get_globalcfg<std::string>(XRAN_UT_KEY_GLOBALCFG_IO, "o_ru_macaddr");
+ /* using temp variables to resolve KW issue */
+ std::sscanf(du_mac_str.c_str(), "%02x:%02x:%02x:%02x:%02x:%02x",
+ &tmp_mac[0], &tmp_mac[1], &tmp_mac[2],
+ &tmp_mac[3], &tmp_mac[4], &tmp_mac[5]);
+ for(i=0; i<6; i++)
+ m_du_mac[i] = (uint8_t)tmp_mac[i];
+ std::sscanf(du_mac_str.c_str(), "%02x:%02x:%02x:%02x:%02x:%02x",
+ &tmp_mac[0], &tmp_mac[1], &tmp_mac[2],
+ &tmp_mac[3], &tmp_mac[4], &tmp_mac[5]);
+ for(i=0; i<6; i++)
+ m_ru_mac[i] = (uint8_t)tmp_mac[i];
+ m_xranInit.p_o_du_addr = (int8_t *)m_du_mac;
+ m_xranInit.p_o_ru_addr = (int8_t *)m_ru_mac;
+ m_xranInit.cp_vlan_tag = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_IO, "cp_vlan_tag");
+ m_xranInit.up_vlan_tag = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_IO, "up_vlan_tag");
+
+ /* eAxCID configurations */
+ int bitnum_cuport = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_EAXCID, "bit_cuPortId");
+ int bitnum_bandsec = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_EAXCID, "bit_bandSectorId");
+ int bitnum_ccid = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_EAXCID, "bit_ccId");
+ int bitnum_ruport = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_EAXCID, "bit_ruPortId");
+
+ m_xranInit.eAxCId_conf.bit_cuPortId = bitnum_bandsec + bitnum_ccid + bitnum_ruport;
+ m_xranInit.eAxCId_conf.bit_bandSectorId = bitnum_ccid + bitnum_ruport;
+ m_xranInit.eAxCId_conf.bit_ccId = bitnum_ruport;
+ m_xranInit.eAxCId_conf.bit_ruPortId = 0;
+ m_xranInit.eAxCId_conf.mask_cuPortId = get_eaxcid_mask(bitnum_cuport, m_xranInit.eAxCId_conf.bit_cuPortId);
+ m_xranInit.eAxCId_conf.mask_bandSectorId = get_eaxcid_mask(bitnum_bandsec, m_xranInit.eAxCId_conf.bit_bandSectorId);
+ m_xranInit.eAxCId_conf.mask_ccId = get_eaxcid_mask(bitnum_ccid, m_xranInit.eAxCId_conf.bit_ccId);
+ m_xranInit.eAxCId_conf.mask_ruPortId = get_eaxcid_mask(bitnum_ruport, m_xranInit.eAxCId_conf.bit_ruPortId);
+
+ m_xranInit.totalBfWeights = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "totalBfWeights");
+
+ m_xranInit.Tadv_cp_dl = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "Tadv_cp_dl");
+ m_xranInit.T2a_min_cp_dl = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T2a_min_cp_dl");
+ m_xranInit.T2a_max_cp_dl = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T2a_max_cp_dl");
+ m_xranInit.T2a_min_cp_ul = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T2a_min_cp_ul");
+ m_xranInit.T2a_max_cp_ul = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T2a_max_cp_ul");
+ m_xranInit.T2a_min_up = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T2a_min_up");
+ m_xranInit.T2a_max_up = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T2a_max_up");
+ m_xranInit.Ta3_min = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "Ta3_min");
+ m_xranInit.Ta3_max = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "Ta3_max");
+ m_xranInit.T1a_min_cp_dl = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T1a_min_cp_dl");
+ m_xranInit.T1a_max_cp_dl = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T1a_max_cp_dl");
+ m_xranInit.T1a_min_cp_ul = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T1a_min_cp_ul");
+ m_xranInit.T1a_max_cp_ul = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T1a_max_cp_ul");
+ m_xranInit.T1a_min_up = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T1a_min_up");
+ m_xranInit.T1a_max_up = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "T1a_max_up");
+ m_xranInit.Ta4_min = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "Ta4_min");
+ m_xranInit.Ta4_max = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "Ta4_max");
+
+ m_xranInit.enableCP = 1;
+ m_xranInit.prachEnable = 1;
+ m_xranInit.debugStop = 0;
+ m_xranInit.debugStopCount = 0;
+ m_xranInit.DynamicSectionEna= 0;
+
+ m_xranInit.filePrefix = "wls";
+
+ m_bSub6 = get_globalcfg<bool>(XRAN_UT_KEY_GLOBALCFG_RU, "sub6");
+
+ memset(&m_xranConf, 0, sizeof(struct xran_fh_config));
+ tmpstr = get_globalcfg<std::string>(XRAN_UT_KEY_GLOBALCFG_RU, "duplex");
+ if(tmpstr == "FDD") {
+ m_xranConf.frame_conf.nFrameDuplexType = 0;
+ }
+ else if(tmpstr == "TDD") {
+ m_xranConf.frame_conf.nFrameDuplexType = 1;
+
+ std::string slotcfg_key = get_globalcfg<std::string>(XRAN_UT_KEY_GLOBALCFG_RU, "slot_config");
+
+ int numcfg = get_globalcfg<int>(slotcfg_key, "period");
+ m_xranConf.frame_conf.nTddPeriod = numcfg;
+
+ for(int i=0; i< numcfg; i++) {
+ std::stringstream slotcfgname;
+ slotcfgname << "slot" << i;
+ std::vector<int> slotcfg = get_globalcfg_array<int>(slotcfg_key, slotcfgname.str());
+ for(int j=0; j < slotcfg.size(); j++) {
+ m_xranConf.frame_conf.sSlotConfig[i].nSymbolType[j] = slotcfg[j];
+ }
+ m_xranConf.frame_conf.sSlotConfig[i].reserved[0] = 0;
+ m_xranConf.frame_conf.sSlotConfig[i].reserved[1] = 0;
+ }
+ }
+ else {
+ std::cout << "*** Invalid Duplex type [" << tmpstr << "] !!!" << std::endl;
+ std::cout << "****** Set it to FDD... " << std::endl;
+ m_xranConf.frame_conf.nFrameDuplexType = 0;
+ }
+
+ m_xranConf.frame_conf.nNumerology = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "mu");
+ if(m_xranConf.frame_conf.nNumerology > 3) {
+ std::cout << "*** Invalid Numerology [" << m_xranConf.frame_conf.nNumerology << "] !!!" << std::endl;
+ m_xranConf.frame_conf.nNumerology = 0;
+ std::cout << "****** Set it to " << m_xranConf.frame_conf.nNumerology << "..." << std::endl;
+ }
+
+ m_xranConf.nCC = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "num_cc");
+ if(m_xranConf.nCC > XRAN_MAX_SECTOR_NR) {
+ std::cout << "*** Exceeds maximum number of carriers supported [" << m_xranConf.nCC << "] !!!" << std::endl;
+ m_xranConf.nCC = XRAN_MAX_SECTOR_NR;
+ std::cout << "****** Adjusted to " << m_xranConf.nCC << "..." << std::endl;
+ }
+ m_xranConf.neAxc = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "num_eaxc");
+ if(m_xranConf.neAxc > XRAN_MAX_ANTENNA_NR) {
+ std::cout << "*** Exceeds maximum number of antenna supported [" << m_xranConf.neAxc << "] !!!" << std::endl;
+ m_xranConf.neAxc = XRAN_MAX_ANTENNA_NR;
+ std::cout << "****** Adjusted to " << m_xranConf.neAxc << "..." << std::endl;
+ }
+
+ m_bSub6 = get_globalcfg<bool>(XRAN_UT_KEY_GLOBALCFG_RU, "sub6");
+ temp = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "chbw_dl");
+ m_xranConf.nDLRBs = get_num_rbs(get_numerology(), temp, m_bSub6);
+ temp = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "chbw_ul");
+ m_xranConf.nULRBs = get_num_rbs(get_numerology(), temp, m_bSub6);
+
+ m_xranConf.nAntElmTRx = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "ant_elm_trx");
+ m_xranConf.nDLFftSize = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "fft_size");
+ m_xranConf.nULFftSize = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "fft_size");
+
+ m_xranConf.prach_conf.nPrachConfIdx = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_PRACH, "config_id");
+ m_xranConf.prach_conf.nPrachSubcSpacing = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_PRACH, "scs");
+ m_xranConf.prach_conf.nPrachFreqStart = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_PRACH, "freq_start");
+ m_xranConf.prach_conf.nPrachFreqOffset = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_PRACH, "freq_offset");
+ m_xranConf.prach_conf.nPrachFilterIdx = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_PRACH, "filter_id");
+ m_xranConf.prach_conf.nPrachZeroCorrConf= 0;
+ m_xranConf.prach_conf.nPrachRestrictSet = 0;
+ m_xranConf.prach_conf.nPrachRootSeqIdx = 0;
+
+ tmpstr = get_globalcfg<std::string>(XRAN_UT_KEY_GLOBALCFG_RU, "category");
+ if(tmpstr == "A")
+ m_xranConf.ru_conf.xranCat = XRAN_CATEGORY_A;
+ else if(tmpstr == "B")
+ m_xranConf.ru_conf.xranCat = XRAN_CATEGORY_B;
+ else {
+ std::cout << "*** Invalid RU Category [" << tmpstr << "] !!!" << std::endl;
+ std::cout << "****** Set it to Category A... " << std::endl;
+ m_xranConf.ru_conf.xranCat = XRAN_CATEGORY_A;
+ }
+
+ m_xranConf.ru_conf.iqWidth = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "iq_width");
+ m_xranConf.ru_conf.compMeth = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "comp_meth");
+
+ temp = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "fft_size");
+ m_xranConf.ru_conf.fftSize = 0;
+ while (temp >>= 1)
+ ++m_xranConf.ru_conf.fftSize;
+
+ m_xranConf.ru_conf.byteOrder = XRAN_NE_BE_BYTE_ORDER;
+ m_xranConf.ru_conf.iqOrder = XRAN_I_Q_ORDER;
+
+ m_xranConf.log_level = 0;
+/*
+ m_xranConf.bbdev_enc = nullptr;
+ m_xranConf.bbdev_dec = nullptr;
+ m_xranConf.ttiCb = nullptr;
+ m_xranConf.ttiCbParam = nullptr;
+*/
+ }
+
+ ~xranLibWraper()
+ {
+ }
+
+ int SetUp()
+ {
+ int i;
+
+ printf("O-DU MAC address: %02X:%02X:%02X:%02X:%02X:%02X\n",
+ m_xranInit.p_o_du_addr[0],
+ m_xranInit.p_o_du_addr[1],
+ m_xranInit.p_o_du_addr[2],
+ m_xranInit.p_o_du_addr[3],
+ m_xranInit.p_o_du_addr[4],
+ m_xranInit.p_o_du_addr[5]);
+
+ printf("O-RU MAC address: %02X:%02X:%02X:%02X:%02X:%02X\n",
+ m_xranInit.p_o_ru_addr[0],
+ m_xranInit.p_o_ru_addr[1],
+ m_xranInit.p_o_ru_addr[2],
+ m_xranInit.p_o_ru_addr[3],
+ m_xranInit.p_o_ru_addr[4],
+ m_xranInit.p_o_ru_addr[5]);
+
+ printf("eAxCID - %d:%d:%d:%d (%04x, %04x, %04x, %04x)\n",
+ m_xranInit.eAxCId_conf.bit_cuPortId,
+ m_xranInit.eAxCId_conf.bit_bandSectorId,
+ m_xranInit.eAxCId_conf.bit_ccId,
+ m_xranInit.eAxCId_conf.bit_ruPortId,
+ m_xranInit.eAxCId_conf.mask_cuPortId,
+ m_xranInit.eAxCId_conf.mask_bandSectorId,
+ m_xranInit.eAxCId_conf.mask_ccId,
+ m_xranInit.eAxCId_conf.mask_ruPortId);
+
+ printf("Total BF Weights : %d\n", m_xranInit.totalBfWeights);
+
+ xran_init(0, NULL, &m_xranInit, &argv[0], &m_xranhandle);
+
+ for(i = 0; i < XRAN_MAX_SECTOR_NR; i++)
+ m_nSectorIndex[i] = i;
+
+ /* set to maximum length to support multiple cases */
+ m_nFpgaToSW_FTH_RxBufferLen = 13168; /* 273*12*4 + 64*/
+ m_nSW_ToFpga_FTH_TxBufferLen = 13168; /* 273*12*4 + 64*/
+
+ if(init_memory() < 0) {
+ std::cout << "Fatal Error on Initialization !!!" << std::endl;
+ std::cout << "INIT FAILED" << std::endl;
+ return (-1);
+ }
+
+ std::cout << "INIT DONE" << std::endl;
+ return (0);
+ }
+
+ void TearDown()
+ {
+ if(m_xranhandle) {
+ xran_close(m_xranhandle);
+ m_xranhandle = nullptr;
+ std::cout << "CLOSE DONE" << std::endl;
+ }
+ else
+ std::cout << "ALREADY CLOSED" << std::endl;
+ }
+
+ int Init(struct xran_fh_config *pCfg = nullptr)
+ {
+ xran_status_t status;
+ int32_t nSectorNum;
+ int32_t i, j, k, z;
+ void *ptr;
+ void *mb;
+ uint32_t *u32dptr;
+ uint16_t *u16dptr;
+ uint8_t *u8dptr;
+ SWXRANInterfaceTypeEnum eInterfaceType;
+ int32_t cc_id, ant_id, sym_id, tti;
+ int32_t flowId;
+ char *pos = NULL;
+ struct xran_prb_map *pRbMap = NULL;
+
+
+ /* Update member variables */
+ if(pCfg)
+ memcpy(&m_xranConf, pCfg, sizeof(struct xran_fh_config));
+
+ /* Init timer context */
+ xran_lib_ota_tti = 0;
+ xran_lib_ota_sym = 0;
+ xran_lib_ota_sym_idx = 0;
+ for(i=0; i < MAX_NUM_OF_XRAN_CTX; i++)
+ m_timer_ctx[i].tti_to_process = i;
+
+ nSectorNum = get_num_cc();
+
+ /* Cat B RU support */
+ if(get_rucategory() == XRAN_CATEGORY_B) {
+ /* 10 * [14*32*273*2*2] = 4892160 bytes */
+ iq_bfw_buffer_size_dl = (m_nSlots * N_SYM_PER_SLOT * get_num_antelmtrx() * get_num_dlrbs() * 4L);
+ iq_bfw_buffer_size_ul = (m_nSlots * N_SYM_PER_SLOT * get_num_antelmtrx() * get_num_ulrbs() * 4L);
+
+ for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(get_num_cc() * get_num_eaxc()); i++) {
+ p_tx_dl_bfw_buffer[i] = (int16_t*)malloc(iq_bfw_buffer_size_dl);
+ tx_dl_bfw_buffer_size[i] = (int32_t)iq_bfw_buffer_size_dl;
+ if(p_tx_dl_bfw_buffer[i] == NULL)
+ return(-1);
+
+ memset(p_tx_dl_bfw_buffer[i], 'D', iq_bfw_buffer_size_dl);
+ tx_dl_bfw_buffer_position[i] = 0;
+
+ p_tx_ul_bfw_buffer[i] = (int16_t*)malloc(iq_bfw_buffer_size_ul);
+ tx_ul_bfw_buffer_size[i] = (int32_t)iq_bfw_buffer_size_ul;
+ if(p_tx_ul_bfw_buffer[i] == NULL)
+ return (-1);
+
+ memset(p_tx_ul_bfw_buffer[i], 'U', iq_bfw_buffer_size_ul);
+ tx_ul_bfw_buffer_position[i] = 0;
+ }
+ }
+
+ /* Init RB map */
+ for(cc_id = 0; cc_id <nSectorNum; cc_id++) {
+ for(tti = 0; tti < XRAN_N_FE_BUF_LEN; tti ++) {
+ for(ant_id = 0; ant_id < XRAN_MAX_ANTENNA_NR; ant_id++) {
+ flowId = XRAN_MAX_ANTENNA_NR*cc_id + ant_id;
+
+ /* C-plane DL */
+ pRbMap = (struct xran_prb_map *)m_sFrontHaulTxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData;
+ if(pRbMap) {
+ pRbMap->dir = XRAN_DIR_DL;
+ pRbMap->xran_port = 0;
+ pRbMap->band_id = 0;
+ pRbMap->cc_id = cc_id;
+ pRbMap->ru_port_id = ant_id;
+ pRbMap->tti_id = tti;
+ pRbMap->start_sym_id = 0;
+
+ pRbMap->nPrbElm = 1;
+ pRbMap->prbMap[0].nRBStart = 0;
+ pRbMap->prbMap[0].nRBSize = get_num_dlrbs();
+ pRbMap->prbMap[0].nStartSymb = 0;
+ pRbMap->prbMap[0].numSymb = 14;
+ pRbMap->prbMap[0].nBeamIndex = 0;
+ pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE;
+
+ if(get_rucategory() == XRAN_CATEGORY_A) {
+ pRbMap->prbMap[0].BeamFormingType = XRAN_BEAM_ID_BASED;
+ pRbMap->prbMap[0].bf_weight_update = 0;
+ //pRbMap->prbMap[0].bf_attribute.weight[];
+ //pRbMap->prbMap[0].bf_precoding.weight[];
+ }
+ else if(get_rucategory() == XRAN_CATEGORY_B) {
+ int idxElm;
+ int iPrb;
+ char *dl_bfw_pos = ((char*)p_tx_dl_bfw_buffer[flowId]) + tx_dl_bfw_buffer_position[flowId];
+ struct xran_prb_elm* p_prbMap = NULL;
+ int num_antelm;
+
+ pRbMap->prbMap[0].BeamFormingType = XRAN_BEAM_WEIGHT;
+ pRbMap->prbMap[0].bf_weight_update = 1;
+
+ num_antelm = get_num_antelmtrx();
+#if 0
+ /* populate beam weights to C-plane for each elm */
+ pRbMap->bf_weight.nAntElmTRx = num_antelm;
+ for(idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++){
+ p_prbMap = &pRbMap->prbMap[idxElm];
+ for (iPrb = p_prbMap->nRBStart; iPrb < (p_prbMap->nRBStart + p_prbMap->nRBSize); iPrb++) {
+ /* copy BF W IQs for 1 PRB of */
+ rte_memcpy(&pRbMap->bf_weight.weight[iPrb][0], (dl_bfw_pos + (iPrb * num_antelm)*4), num_antelm*4);
+ }
+ }
+#endif
+ } /* else if(get_rucategory() == XRAN_CATEGORY_B) */
+ } /* if(pRbMap) */
+ else {
+ std::cout << "DL pRbMap ==NULL" << std::endl;
+ }
+
+ /* C-plane UL */
+ pRbMap = (struct xran_prb_map *)m_sFrontHaulRxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData;
+ if(pRbMap) {
+ pRbMap->dir = XRAN_DIR_UL;
+ pRbMap->xran_port = 0;
+ pRbMap->band_id = 0;
+ pRbMap->cc_id = cc_id;
+ pRbMap->ru_port_id = ant_id;
+ pRbMap->tti_id = tti;
+ pRbMap->start_sym_id = 0;
+
+ pRbMap->nPrbElm = 1;
+ pRbMap->prbMap[0].nRBStart = 0;
+ pRbMap->prbMap[0].nRBSize = get_num_ulrbs();
+ pRbMap->prbMap[0].nStartSymb = 0;
+ pRbMap->prbMap[0].numSymb = 14;
+ pRbMap->prbMap[0].nBeamIndex = 0;
+ pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE;
+
+ if(get_rucategory() == XRAN_CATEGORY_A) {
+ pRbMap->prbMap[0].BeamFormingType = XRAN_BEAM_ID_BASED;
+ pRbMap->prbMap[0].bf_weight_update = 0;
+ //pRbMap->prbMap[0].bf_attribute.weight[];
+ //pRbMap->prbMap[0].bf_precoding.weight[];
+ }
+ else if(get_rucategory() == XRAN_CATEGORY_B) {
+ int idxElm;
+ int iPrb;
+ char *ul_bfw_pos = ((char*)p_tx_ul_bfw_buffer[flowId]) + tx_ul_bfw_buffer_position[flowId];
+ struct xran_prb_elm* p_prbMap = NULL;
+ int num_antelm;
+
+ pRbMap->prbMap[0].BeamFormingType = XRAN_BEAM_WEIGHT;
+ pRbMap->prbMap[0].bf_weight_update = 1;
+
+ num_antelm = get_num_antelmtrx();
+#if 0
+ /* populate beam weights to C-plane for each elm */
+ pRbMap->bf_weight.nAntElmTRx = num_antelm;
+ for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++){
+ p_prbMap = &pRbMap->prbMap[idxElm];
+ for (iPrb = p_prbMap->nRBStart; iPrb < (p_prbMap->nRBStart + p_prbMap->nRBSize); iPrb++){
+ /* copy BF W IQs for 1 PRB of */
+ rte_memcpy(&pRbMap->bf_weight.weight[iPrb][0], (ul_bfw_pos + (iPrb*num_antelm)*4), num_antelm*4);
+ }
+ }
+#endif
+ } /* else if(get_rucategory() == XRAN_CATEGORY_B) */
+
+ } /* if(pRbMap) */
+ else {
+ std::cout << "UL: pRbMap ==NULL" << std::endl;
+ }
+ }
+ }
+ }
+
+ return (0);
+ }
+
+ void Cleanup()
+ {
+ int i;
+
+ if(get_rucategory() == XRAN_CATEGORY_B) {
+ for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(get_num_cc() * get_num_eaxc()); i++) {
+ if(p_tx_dl_bfw_buffer[i]) {
+ free(p_tx_dl_bfw_buffer[i]);
+ p_tx_dl_bfw_buffer[i] == NULL;
+ }
+
+ if(p_tx_ul_bfw_buffer[i]) {
+ free(p_tx_ul_bfw_buffer[i]);
+ p_tx_ul_bfw_buffer[i] == NULL;
+ }
+ }
+ }
+
+ return;
+ }
+
+
+ void Open(xran_ethdi_mbuf_send_fn send_cp, xran_ethdi_mbuf_send_fn send_up,
+ void *fh_rx_callback, void *fh_rx_prach_callback)
+ {
+ struct xran_fh_config *pXranConf;
+ int32_t nSectorNum;
+ int i, j, k, z;
+ struct xran_buffer_list *pFthTxBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
+ struct xran_buffer_list *pFthTxPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
+ struct xran_buffer_list *pFthRxBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
+ struct xran_buffer_list *pFthRxPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
+ struct xran_buffer_list *pFthRxRachBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
+
+#if 0
+ xran_reg_physide_cb(xranHandle, physide_dl_tti_call_back, NULL, 10, XRAN_CB_TTI);
+ xran_reg_physide_cb(xranHandle, physide_ul_half_slot_call_back, NULL, 10, XRAN_CB_HALF_SLOT_RX);
+ xran_reg_physide_cb(xranHandle, physide_ul_full_slot_call_back, NULL, 10, XRAN_CB_FULL_SLOT_RX);
+#endif
+ nSectorNum = get_num_cc();
+
+ for(i=0; i<nSectorNum; i++) {
+ for(j=0; j<XRAN_N_FE_BUF_LEN; j++) {
+ for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++) {
+ pFthTxBuffer[i][z][j] = &(m_sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList);
+ pFthTxPrbMapBuffer[i][z][j] = &(m_sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList);
+ pFthRxBuffer[i][z][j] = &(m_sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList);
+ pFthRxPrbMapBuffer[i][z][j] = &(m_sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList);
+ pFthRxRachBuffer[i][z][j] = &(m_sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList);
+ }
+ }
+ }
+
+ if(m_nInstanceHandle[0] != NULL) {
+ for(i = 0; i<nSectorNum; i++) {
+ xran_5g_fronthault_config(m_nInstanceHandle[0][i],
+ pFthTxBuffer[i], pFthTxPrbMapBuffer[i],
+ pFthRxBuffer[i], pFthRxPrbMapBuffer[i],
+ (void (*)(void *, xran_status_t))fh_rx_callback, &pFthRxBuffer[i][0]);
+
+ xran_5g_prach_req(m_nInstanceHandle[0][i], pFthRxRachBuffer[i],
+ (void (*)(void *, xran_status_t))fh_rx_prach_callback, &pFthRxRachBuffer[i][0]);
+ }
+ }
+
+ xran_register_cb_mbuf2ring(send_cp, send_up);
+
+ xran_open(m_xranhandle, &m_xranConf);
+ }
+
+ void Close()
+ {
+ if(m_xranhandle)
+ xran_close(m_xranhandle);
+ }
+
+ int Start()
+ {
+ if(m_xranhandle)
+ return(xran_start(m_xranhandle));
+ else
+ return (-1);
+ }
+
+ int Stop()
+ {
+ if(m_xranhandle)
+ return(xran_stop(m_xranhandle));
+ else
+ return (-1);
+ }
+
+ /* emulation of timer */
+ void update_tti()
+ {
+ tti_ota_cb(nullptr, get_timer_ctx());
+ }
+
+ void update_symbol_index()
+ {
+ xran_lib_ota_sym_idx++;
+ if((xran_lib_ota_sym_idx % N_SYM_PER_SLOT) == 0) {
+ update_tti();
+ }
+
+ xran_lib_ota_sym++;
+ if(xran_lib_ota_sym >= N_SYM_PER_SLOT)
+ xran_lib_ota_sym = 0;
+ }
+
+ int apply_cpenable(bool flag)
+ {
+ struct xran_device_ctx *pCtx = xran_dev_get_ctx();
+
+ if(is_running())
+ return (-1);
+
+ if(pCtx == nullptr)
+ return (-1);
+
+ if(flag == true) {
+ m_xranInit.enableCP = 1;
+ pCtx->enableCP = 1;
+ }
+ else {
+ m_xranInit.enableCP = 0;
+ pCtx->enableCP = 0;
+ }
+
+ return (0);
+ }
+
+
+ int get_slot_config(const std::string &cfgname, struct xran_frame_config *pCfg)
+ {
+ int numcfg, i, j;
+ std::vector<int> slotcfg;
+
+ numcfg = get_globalcfg<int>(cfgname, "period");
+ pCfg->nTddPeriod = numcfg;
+ for(i=0; i < numcfg; i++) {
+ std::stringstream slotcfgname;
+
+ slotcfgname << "slot" << i;
+ std::vector<int> slotcfg = get_globalcfg_array<int>(cfgname, slotcfgname.str());
+
+ for(j=0; j < slotcfg.size(); j++)
+ pCfg->sSlotConfig[i].nSymbolType[j] = slotcfg[j];
+ pCfg->sSlotConfig[i].reserved[0] = 0; pCfg->sSlotConfig[i].reserved[1] = 0;
+ }
+
+ return (numcfg);
+ }
+
+ int get_num_rbs(uint32_t nNumerology, uint32_t nBandwidth, bool nSub6)
+ {
+ if(nNumerology > 3)
+ return (-1);
+
+ if(nSub6) {
+ if (nNumerology < 3) {
+ /* F1 Tables 38.101-1 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB */
+ switch(nBandwidth) {
+ case PHY_BW_5MHZ: return(nNumRbsPerSymF1[nNumerology][0]);
+ case PHY_BW_10MHZ: return(nNumRbsPerSymF1[nNumerology][1]);
+ case PHY_BW_15MHZ: return(nNumRbsPerSymF1[nNumerology][2]);
+ case PHY_BW_20MHZ: return(nNumRbsPerSymF1[nNumerology][3]);
+ case PHY_BW_25MHZ: return(nNumRbsPerSymF1[nNumerology][4]);
+ case PHY_BW_30MHZ: return(nNumRbsPerSymF1[nNumerology][5]);
+ case PHY_BW_40MHZ: return(nNumRbsPerSymF1[nNumerology][6]);
+ case PHY_BW_50MHZ: return(nNumRbsPerSymF1[nNumerology][7]);
+ case PHY_BW_60MHZ: return(nNumRbsPerSymF1[nNumerology][8]);
+ case PHY_BW_70MHZ: return(nNumRbsPerSymF1[nNumerology][9]);
+ case PHY_BW_80MHZ: return(nNumRbsPerSymF1[nNumerology][10]);
+ case PHY_BW_90MHZ: return(nNumRbsPerSymF1[nNumerology][11]);
+ case PHY_BW_100MHZ: return(nNumRbsPerSymF1[nNumerology][12]);
+ }
+ }
+ }
+ else { /* if(nSub6) */
+ if((nNumerology >= 2) && (nNumerology <= 3)) {
+ nNumerology -= 2;
+ /* F2 Tables 38.101-2 Table 5.3.2-1. Maximum transmission bandwidth configuration NRB */
+ switch(nBandwidth) {
+ case PHY_BW_50MHZ: return(nNumRbsPerSymF2[nNumerology][0]); break;
+ case PHY_BW_100MHZ: return(nNumRbsPerSymF2[nNumerology][1]); break;
+ case PHY_BW_200MHZ: return(nNumRbsPerSymF2[nNumerology][2]); break;
+ case PHY_BW_400MHZ: return(nNumRbsPerSymF2[nNumerology][3]); break;
+ }
+ }
+ }
+
+ return(-1);
+ }
+
+ void *get_xranhandle() { return(m_xranhandle); }
+ void *get_timer_ctx() { return((void *)&m_timer_ctx[0]); }
+
+ int get_symbol_index() { return (xran_lib_ota_sym); }
+
+ bool is_running() { return((xran_get_if_state() == XRAN_RUNNING)?true:false); }
+
+ enum xran_category get_rucategory() { return(m_xranConf.ru_conf.xranCat); }
+
+ int get_numerology() { return(m_xranConf.frame_conf.nNumerology); }
+ int get_duplextype() { return(m_xranConf.frame_conf.nFrameDuplexType); }
+ int get_num_cc() { return(m_xranConf.nCC); }
+ int get_num_eaxc() { return(m_xranConf.neAxc); }
+ int get_num_dlrbs() { return(m_xranConf.nDLRBs); }
+ int get_num_ulrbs() { return(m_xranConf.nULRBs); }
+ int get_num_antelmtrx() { return(m_xranConf.nAntElmTRx); }
+
+ bool is_cpenable() { return(m_xranInit.enableCP); };
+ bool is_prachenable() { return(m_xranInit.prachEnable); };
+ bool is_dynamicsection() { return(m_xranInit.DynamicSectionEna?true:false); }
+
+ void get_cfg_prach(struct xran_prach_config *pCfg)
+ {
+ if(pCfg)
+ memcpy(pCfg, &m_xranConf.prach_conf, sizeof(struct xran_prach_config));
+ }
+
+ void get_cfg_frame(struct xran_frame_config *pCfg)
+ {
+ if(pCfg)
+ memcpy(pCfg, &m_xranConf.frame_conf, sizeof(struct xran_frame_config));
+ }
+
+ void get_cfg_ru(struct xran_ru_config *pCfg)
+ {
+ if(pCfg)
+ memcpy(pCfg, &m_xranConf.ru_conf, sizeof(struct xran_ru_config));
+ }
+
+ void get_cfg_fh(struct xran_fh_config *pCfg)
+ {
+ if(pCfg)
+ memcpy(pCfg, &m_xranConf, sizeof(struct xran_fh_config));
+ }
+
+};
+
+
+/* external declaration for the instance */
+extern xranLibWraper *xranlib;
+
+
+#endif //XRAN_LIB_WRAP_HPP
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-#include <rte_config.h>\r
-#include <rte_eal.h>\r
-#include <rte_debug.h>\r
-\r
-#include "common.hpp"\r
-#include "xran_lib_wrap.hpp"\r
-\r
-static int parse_input_parameter(std::string executable, std::string option)\r
-{\r
- std::size_t delim_pos = option.find("=");\r
- std::string param = option.substr(delim_pos + 1);\r
-\r
- try\r
- {\r
- return std::stoi(param);\r
- }\r
- catch(std::logic_error &e)\r
- {\r
- std::cout << executable << ": invalid argument '"<< param << "' for '" << option << "'" << std::endl;\r
- std::cout << "Try '" << executable << " --usage' for more information." << std::endl;\r
- exit(-1);\r
- }\r
-}\r
-\r
-//xranLibWraper xranlib;\r
-xranLibWraper *xranlib;\r
-\r
-int main(int argc, char** argv) {\r
- int all_test_ret = 0;\r
-\r
- /* Enable xml output by default */\r
- ::testing::GTEST_FLAG(output) = "xml:test_results.xml";\r
-\r
- ::testing::InitGoogleTest(&argc, argv);\r
-\r
- const std::string executable = argv[0];\r
-\r
- for(int index = 1; index < argc; index++) {\r
-\r
- const std::string option = argv[index];\r
-\r
- if (option.find("--nb_repetitions=") != std::string::npos)\r
- {\r
- BenchmarkParameters::repetition = parse_input_parameter(executable, option);\r
- }\r
- else if (option.find("--nb_loops=") != std::string::npos)\r
- {\r
- BenchmarkParameters::loop = parse_input_parameter(executable, option);\r
- }\r
- else if (option.find("--cpu_nb=") != std::string::npos)\r
- {\r
- BenchmarkParameters::cpu_id = (unsigned) parse_input_parameter(executable, option);\r
-\r
- if (BenchmarkParameters::cpu_id == 0)\r
- std::cout << std::endl << "Warning: Core #0 is running the VM's OS. "\r
- << "Measurements won't be accurate. It shouldn't be used!"\r
- << std::endl << std::endl;\r
- }\r
- /* --usage used instead of --help to avoid conflict with gtest --help */\r
- else if (!option.compare("--usage"))\r
- {\r
- std::cout << "Usage: " << executable << " [GTEST_OPTION]... [OPTION]..." << std::endl;\r
- std::cout << "Runs unittests with given gtest options." << std::endl;\r
- std::cout << std::endl;\r
- std::cout << "Available options: " << std::endl;\r
- std::cout << "--nb_repetitions=NUMBER Sets how many times results are measured" << std::endl;\r
- std::cout << "--nb_loops=NUMBER Sets how many times function is called per repetition"\r
- << std::endl;\r
- std::cout << "--cpu_nb=NUMBER Sets core number to run tests on" << std::endl;\r
- std::cout << "--usage Prints this message" << std::endl;\r
-\r
- return 0;\r
- }\r
- else\r
- {\r
- std::cout << executable << ": inavlid option " << option << std::endl;\r
- std::cout << "Try '" << executable << " --usage' for more information." << std::endl;\r
-\r
- return -1;\r
- }\r
- }\r
-\r
- xranlib = new xranLibWraper;\r
-\r
- if(xranlib->SetUp() < 0) {\r
- return (-1);\r
- }\r
-\r
- all_test_ret = RUN_ALL_TESTS();\r
-\r
- xranlib->TearDown();\r
-\r
- if(xranlib != nullptr) {\r
- delete xranlib;\r
- xranlib == nullptr;\r
- }\r
-\r
- return all_test_ret;\r
-}\r
-\r
-\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+#include <rte_config.h>
+#include <rte_eal.h>
+#include <rte_debug.h>
+
+#include "common.hpp"
+#include "xran_lib_wrap.hpp"
+
+static int parse_input_parameter(std::string executable, std::string option)
+{
+ std::size_t delim_pos = option.find("=");
+ std::string param = option.substr(delim_pos + 1);
+
+ try
+ {
+ return std::stoi(param);
+ }
+ catch(std::logic_error &e)
+ {
+ std::cout << executable << ": invalid argument '"<< param << "' for '" << option << "'" << std::endl;
+ std::cout << "Try '" << executable << " --usage' for more information." << std::endl;
+ exit(-1);
+ }
+}
+
+//xranLibWraper xranlib;
+xranLibWraper *xranlib;
+
+int main(int argc, char** argv) {
+ int all_test_ret = 0;
+
+ /* Enable xml output by default */
+ ::testing::GTEST_FLAG(output) = "xml:test_results.xml";
+
+ ::testing::InitGoogleTest(&argc, argv);
+
+ const std::string executable = argv[0];
+
+ for(int index = 1; index < argc; index++) {
+
+ const std::string option = argv[index];
+
+ if (option.find("--nb_repetitions=") != std::string::npos)
+ {
+ BenchmarkParameters::repetition = parse_input_parameter(executable, option);
+ }
+ else if (option.find("--nb_loops=") != std::string::npos)
+ {
+ BenchmarkParameters::loop = parse_input_parameter(executable, option);
+ }
+ else if (option.find("--cpu_nb=") != std::string::npos)
+ {
+ BenchmarkParameters::cpu_id = (unsigned) parse_input_parameter(executable, option);
+
+ if (BenchmarkParameters::cpu_id == 0)
+ std::cout << std::endl << "Warning: Core #0 is running the VM's OS. "
+ << "Measurements won't be accurate. It shouldn't be used!"
+ << std::endl << std::endl;
+ }
+ /* --usage used instead of --help to avoid conflict with gtest --help */
+ else if (!option.compare("--usage"))
+ {
+ std::cout << "Usage: " << executable << " [GTEST_OPTION]... [OPTION]..." << std::endl;
+ std::cout << "Runs unittests with given gtest options." << std::endl;
+ std::cout << std::endl;
+ std::cout << "Available options: " << std::endl;
+ std::cout << "--nb_repetitions=NUMBER Sets how many times results are measured" << std::endl;
+ std::cout << "--nb_loops=NUMBER Sets how many times function is called per repetition"
+ << std::endl;
+ std::cout << "--cpu_nb=NUMBER Sets core number to run tests on" << std::endl;
+ std::cout << "--usage Prints this message" << std::endl;
+
+ return 0;
+ }
+ else
+ {
+ std::cout << executable << ": inavlid option " << option << std::endl;
+ std::cout << "Try '" << executable << " --usage' for more information." << std::endl;
+
+ return -1;
+ }
+ }
+
+ xranlib = new xranLibWraper;
+
+ if(xranlib->SetUp() < 0) {
+ return (-1);
+ }
+
+ all_test_ret = RUN_ALL_TESTS();
+
+ xranlib->TearDown();
+
+ if(xranlib != nullptr) {
+ delete xranlib;
+ xranlib == nullptr;
+ }
+
+ return all_test_ret;
+}
+
+
+
-#!/usr/bin/python\r
-#######################################################################\r
-#\r
-# <COPYRIGHT_TAG>\r
-#\r
-#######################################################################\r
-\r
-"""This script run test cases with O-DU and O-RU\r
-"""\r
-import logging\r
-import sys\r
-import argparse\r
-import re\r
-import subprocess\r
-import os\r
-import shutil\r
-from itertools import dropwhile\r
-from datetime import datetime\r
-import json\r
-\r
-nNumRbsPerSymF1 = [\r
- # 5MHz 10MHz 15MHz 20 MHz 25 MHz 30 MHz 40 MHz 50MHz 60 MHz 70 MHz 80 MHz 90 MHz 100 MHz\r
- [25, 52, 79, 106, 133, 160, 216, 270, 0, 0, 0, 0, 0], # Numerology 0 (15KHz)\r
- [11, 24, 38, 51, 65, 78, 106, 133, 162, 0, 217, 245, 273], # Numerology 1 (30KHz)\r
- [0, 11, 18, 24, 31, 38, 51, 65, 79, 0, 107, 121, 135] # Numerology 2 (60KHz)\r
-]\r
-\r
-nNumRbsPerSymF2 = [\r
- # 50Mhz 100MHz 200MHz 400MHz\r
- [66, 132, 264, 0], # Numerology 2 (60KHz)\r
- [32, 66, 132, 264] # Numerology 3 (120KHz)\r
-]\r
-\r
-\r
-nRChBwOptions_keys = ['5','10','15','20', '25', '30', '40', '50', '60','70', '80', '90', '100', '200', '400']\r
-nRChBwOptions_values = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14]\r
-nRChBwOptions = dict(zip(nRChBwOptions_keys, nRChBwOptions_values))\r
-\r
-nRChBwOptions_keys_mu2and3 = ['50', '100', '200', '400']\r
-nRChBwOptions_values_mu2and3 = [0,1,2,3]\r
-nRChBwOptions_mu2and3 = dict(zip(nRChBwOptions_keys_mu2and3, nRChBwOptions_values_mu2and3))\r
-\r
-# table of all test cases\r
-# (cat, mu, bw, test case)\r
-all_test_cases = [(0, 0, 5, 0),\r
- (0, 0, 10, 0),\r
- (0, 0, 20, 0),\r
- (0, 1, 100, 0),\r
- (0, 3, 100, 0),\r
- (1, 1, 100, 0)]\r
-#Cat B\r
-""" all_test_cases = [(1, 1, 100, 0),\r
- (1, 1, 100, 1),\r
- (1, 1, 100, 101),\r
- (1, 1, 100, 102),\r
- (1, 1, 100, 103),\r
- (1, 1, 100, 104),\r
- (1, 1, 100, 105),\r
- #(1, 1, 100, 106), 25G not enough\r
- (1, 1, 100, 107),\r
- (1, 1, 100, 108),\r
- #(1, 1, 100, 109), 25G not enough\r
- (1, 1, 100, 201),\r
- #(1, 1, 100, 202), 25G not enough\r
- (1, 1, 100, 203),\r
- (1, 1, 100, 204),\r
- (1, 1, 100, 205),\r
- (1, 1, 100, 206),\r
- (1, 1, 100, 211),\r
- #(1, 1, 100, 212), 25G not enough\r
- (1, 1, 100, 213),\r
- (1, 1, 100, 214),\r
- (1, 1, 100, 215),\r
- (1, 1, 100, 216)\r
-]\r
- """\r
-dic_dir = dict({0:'DL', 1:'UL'})\r
-dic_xu = dict({0:'o-du', 1:'o-ru'})\r
-\r
-def init_logger(console_level, logfile_level):\r
- """Initializes console and logfile logger with given logging levels"""\r
- # File logger\r
- logging.basicConfig(filename="runtests.log",\r
- filemode='w',\r
- format="%(asctime)s: %(levelname)s: %(message)s",\r
- level=logfile_level)\r
- # Console logger\r
- logger = logging.getLogger()\r
- handler = logging.StreamHandler()\r
- handler.setLevel(console_level)\r
- formatter = logging.Formatter("%(levelname)s: %(message)s")\r
- handler.setFormatter(formatter)\r
- logger.addHandler(handler)\r
-\r
-def parse_args(args):\r
- """Configures parser and parses command line configuration"""\r
- # Parser configuration\r
- parser = argparse.ArgumentParser(description="Run test cases: category numerology bandwidth test_num")\r
-\r
- parser.add_argument("--cat", type=int, default=0, help="Category: 0 (A) or 1 (B)", metavar="cat", dest="category")\r
- parser.add_argument("--mu", type=int, default=0, help="numerology [0,1,3]", metavar="num", dest="numerology")\r
- parser.add_argument("--bw", type=int, default=20, help="bandwidth [5,10,20,100]", metavar="bw", dest="bandwidth")\r
- parser.add_argument("--testcase", type=int, default=0, help="test case number", metavar="testcase", dest="testcase")\r
-\r
- # Parse arguments\r
- options = parser.parse_args(args)\r
- #parser.print_help()\r
- logging.debug("Options: category=%d num=%d bw=%d testcase=%d",\r
- options.category, options.numerology, options.bandwidth, options.testcase)\r
- return options\r
-\r
-def is_comment(s):\r
- """ function to check if a line\r
- starts with some character.\r
- Here # for comment\r
- """\r
- # return true if a line starts with #\r
- return s.startswith('#')\r
-\r
-class GetOutOfLoops( Exception ):\r
- pass\r
-\r
-def compare_resuts(cat, mu, bw, tcase, xran_path, test_cfg, direction):\r
- res = 0\r
-\r
- if mu < 3:\r
- nDlRB = nNumRbsPerSymF1[mu][nRChBwOptions.get(str(nDLBandwidth))]\r
- nUlRB = nNumRbsPerSymF1[mu][nRChBwOptions.get(str(nULBandwidth))]\r
- elif (mu >=2) & (mu <= 3):\r
- nDlRB = nNumRbsPerSymF2[mu - 2][nRChBwOptions_mu2and3.get(str(nDLBandwidth))]\r
- nUlRB = nNumRbsPerSymF2[mu - 2][nRChBwOptions_mu2and3.get(str(nULBandwidth))]\r
- print(nDlRB, nUlRB)\r
- else:\r
- print("Incorrect arguments\n")\r
- res = -1\r
- return res\r
-\r
- if 'compression' in globals():\r
- comp = compression\r
- else:\r
- comp = 0\r
-\r
- print("compare results: {} [compression {}]\n".format(dic_dir.get(direction), comp))\r
-\r
- #if cat == 1:\r
- # print("WARNING: Skip checking IQs and BF Weights for CAT B for now\n");\r
- # return res\r
-\r
- #get slot config\r
- if nFrameDuplexType == 1:\r
- SlotConfig = []\r
- for i in range(nTddPeriod):\r
- if i == 0:\r
- SlotConfig.insert(i, sSlotConfig0)\r
- elif i == 1:\r
- SlotConfig.insert(i, sSlotConfig1)\r
- elif i == 2:\r
- SlotConfig.insert(i, sSlotConfig2)\r
- elif i == 3:\r
- SlotConfig.insert(i, sSlotConfig3)\r
- elif i == 4:\r
- SlotConfig.insert(i, sSlotConfig4)\r
- elif i == 5:\r
- SlotConfig.insert(i, sSlotConfig5)\r
- elif i == 6:\r
- SlotConfig.insert(i, sSlotConfig6)\r
- elif i == 7:\r
- SlotConfig.insert(i, sSlotConfig7)\r
- elif i == 8:\r
- SlotConfig.insert(i, sSlotConfig8)\r
- elif i == 9:\r
- SlotConfig.insert(i, sSlotConfig9)\r
- else :\r
- raise Exception('i should not exceed nTddPeriod %d. The value of i was: {}'.format(nTddPeriod, i))\r
- #print(SlotConfig, type(sSlotConfig0))\r
- try:\r
-\r
- if (direction == 1) & (cat == 1): #UL\r
- flowId = ccNum*antNumUL\r
- else:\r
- flowId = ccNum*antNum\r
-\r
- for i in range(0, flowId):\r
- #read ref and test files\r
- tst = []\r
- ref = []\r
- if direction == 0:\r
- # DL\r
- nRB = nDlRB\r
- file_tst = xran_path+"/app/logs/"+"o-ru-rx_log_ant"+str(i)+".txt"\r
- file_ref = xran_path+"/app/logs/"+"o-du-play_ant"+str(i)+".txt"\r
- elif direction == 1:\r
- # UL\r
- nRB = nUlRB\r
- file_tst = xran_path+"/app/logs/"+"o-du-rx_log_ant"+str(i)+".txt"\r
- file_ref = xran_path+"/app/logs/"+"o-ru-play_ant"+str(i)+".txt"\r
- else:\r
- raise Exception('Direction is not supported %d'.format(direction))\r
-\r
- print("test result :", file_tst)\r
- print("test reference:", file_ref)\r
- if os.path.exists(file_tst):\r
- try:\r
- file_tst = open(file_tst, 'r')\r
- except OSError:\r
- print ("Could not open/read file:", file_tst)\r
- sys.exit()\r
- else:\r
- print(file_tst, "doesn't exist")\r
- res = -1\r
- return res\r
- if os.path.exists(file_ref):\r
- try:\r
- file_ref = open(file_ref, 'r')\r
- except OSError:\r
- print ("Could not open/read file:", file_ref)\r
- sys.exit()\r
- else:\r
- print(file_tst, "doesn't exist")\r
- res = -1\r
- return res\r
-\r
- tst = file_tst.readlines()\r
- ref = file_ref.readlines()\r
-\r
- print(len(tst))\r
- print(len(ref))\r
-\r
- file_tst.close();\r
- file_ref.close();\r
-\r
- print(numSlots)\r
-\r
- for slot_idx in range(0, numSlots):\r
- for sym_idx in range(0, 14):\r
- if nFrameDuplexType==1:\r
- #skip sym if TDD\r
- if direction == 0:\r
- #DL\r
- sym_dir = SlotConfig[slot_idx%nTddPeriod][sym_idx]\r
- if(sym_dir != 0):\r
- continue\r
- elif direction == 1:\r
- #UL\r
- sym_dir = SlotConfig[slot_idx%nTddPeriod][sym_idx]\r
- if(sym_dir != 1):\r
- continue\r
-\r
- #print("Check:","[",i,"]", slot_idx, sym_idx)\r
- for line_idx in range(0, nRB*12):\r
- offset = (slot_idx*nRB*12*14) + sym_idx*nRB*12 + line_idx\r
- line_tst = tst[offset].rstrip()\r
- line_ref = ref[offset].rstrip()\r
- if comp == 1:\r
- # discard LSB bits as BFP compression is not Bit Exact\r
- tst_i_value = int(line_tst.split(" ")[0]) & 0xFF80\r
- tst_q_value = int(line_tst.split(" ")[1]) & 0xFF80\r
- ref_i_value = int(line_ref.split(" ")[0]) & 0xFF80\r
- ref_q_value = int(line_ref.split(" ")[1]) & 0xFF80\r
-\r
- print("check:","ant:[",i,"]:",offset, slot_idx, sym_idx, line_idx,":","tst: ", tst_i_value, " ", tst_q_value, " " , "ref: ", ref_i_value, " ", ref_q_value, " ")\r
- if (tst_i_value != ref_i_value) or (tst_q_value != ref_q_value) :\r
- print("FAIL:","ant:[",i,"]:",offset, slot_idx, sym_idx, line_idx,":","tst: ", tst_i_value, " ", tst_q_value, " " , "ref: ", ref_i_value, " ", ref_q_value, " ")\r
- res = -1\r
- raise GetOutOfLoops\r
- else:\r
- #if line_idx == 0:\r
- #print("Check:", offset,"[",i,"]", slot_idx, sym_idx,":",line_tst, line_ref)\r
- if line_ref != line_tst:\r
- print("FAIL:","ant:[",i,"]:",offset, slot_idx, sym_idx, line_idx,":","tst:", line_tst, "ref:", line_ref)\r
- res = -1\r
- raise GetOutOfLoops\r
- except GetOutOfLoops:\r
- pass\r
-\r
- return res\r
-\r
-def parse_dat_file(cat, mu, bw, tcase, xran_path, test_cfg):\r
- #parse config files\r
- logging.info("parse config files %s\n", test_cfg[0])\r
- lineList = list()\r
- sep = '#'\r
- with open(test_cfg[0],'r') as fh:\r
- for curline in dropwhile(is_comment, fh):\r
- my_line = curline.rstrip().split(sep, 1)[0].strip()\r
- if my_line:\r
- lineList.append(my_line)\r
- global_env = {}\r
- local_env = {}\r
-\r
- for line in lineList:\r
- exe_line = line.replace(":", ",")\r
- if exe_line.find("/") > 0 :\r
- exe_line = exe_line.replace('./', "'")\r
- exe_line = exe_line+"'"\r
-\r
- code = compile(str(exe_line), '<string>', 'exec')\r
- exec (code, global_env, local_env)\r
-\r
- for k, v in local_env.items():\r
- globals()[k] = v\r
- print(k, v)\r
-\r
- return local_env\r
-\r
-def make_copy_mlog(cat, mu, bw, tcase, xran_path):\r
- res = 0\r
-\r
- src_bin = xran_path+"/app/mlog-o-du-c0.bin"\r
- src_csv = xran_path+"/app/mlog-o-du-hist.csv"\r
- dst_bin = xran_path+"/app/mlog-o-du-c0-cat"+str(cat)+"-mu"+str(mu)+"-bw"+str(bw)+"-tcase"+str(tcase)+".bin"\r
- dst_csv = xran_path+"/app/mlog-o-du-hist-cat"+str(cat)+"-mu"+str(mu)+"-bw"+str(bw)+"-tcase"+str(tcase)+".csv"\r
-\r
- try:\r
- d_bin = shutil.copyfile(src_bin, dst_bin)\r
- d_csv = shutil.copyfile(src_csv, dst_csv)\r
- except IOError:\r
- logging.info("MLog is not present\n")\r
- res = 1\r
- else:\r
- logging.info("Mlog was copied\n")\r
-\r
- print("Destination path:", d_bin)\r
- print("Destination path:", d_csv)\r
-\r
- d_bin = shutil.copyfile(src_bin, dst_bin)\r
- d_csv = shutil.copyfile(src_csv, dst_csv)\r
-\r
- #print("After copying file:")\r
- #print(os.listdir(xran_path+"/app/"))\r
-\r
- #print("Destination path:", d_bin)\r
- #print("Destination path:", d_csv)\r
-\r
- src_bin = xran_path+"/app/mlog-o-ru-c0.bin"\r
- src_csv = xran_path+"/app/mlog-o-ru-hist.csv"\r
- dst_bin = xran_path+"/app/mlog-o-ru-c0-cat"+str(cat)+"-mu"+str(mu)+"-bw"+str(bw)+"-tcase"+str(tcase)+".bin"\r
- dst_csv = xran_path+"/app/mlog-o-ru-hist-cat"+str(cat)+"-mu"+str(mu)+"-bw"+str(bw)+"-tcase"+str(tcase)+".csv"\r
-\r
- d_bin = shutil.copyfile(src_bin, dst_bin)\r
- d_csv = shutil.copyfile(src_csv, dst_csv)\r
-\r
- #print("After copying file:")\r
- #print(os.listdir(xran_path+"/app/"))\r
-\r
- #print("Destination path:", d_bin)\r
- #print("Destination path:", d_csv)\r
-\r
- try:\r
- d_bin = shutil.copyfile(src_bin, dst_bin)\r
- d_csv = shutil.copyfile(src_csv, dst_csv)\r
- except IOError:\r
- logging.info("MLog is not present\n")\r
- res = 1\r
- else:\r
- logging.info("Mlog was copied\n")\r
-\r
- #print("After copying file:")\r
- #print(os.listdir(xran_path+"/app/"))\r
-\r
- #print("Destination path:", d_bin)\r
- #print("Destination path:", d_csv)\r
-\r
- return res\r
-\r
-\r
-def run_tcase(cat, mu, bw, tcase, xran_path):\r
- if cat == 1:\r
- test_config = xran_path+"/app/usecase/cat_b/mu{0:d}_{1:d}mhz".format(mu, bw)\r
- elif cat == 0 :\r
- test_config = xran_path+"/app/usecase/mu{0:d}_{1:d}mhz".format(mu, bw)\r
- else:\r
- print("Incorrect arguments\n")\r
-\r
- if(tcase > 0) :\r
- test_config = test_config+"/"+str(tcase)\r
-\r
- app = xran_path+"/app/build/sample-app"\r
-\r
- logging.debug("run: %s %s", app, test_config)\r
- logging.debug("Started script: master.py, XRAN path %s", xran_path)\r
-\r
- test_cfg = []\r
- #TODO: add detection of ETH ports\r
- eth_cp_dev = ["0000:22:02.1", "0000:22:0a.1"]\r
- eth_up_dev = ["0000:22:02.0", "0000:22:0a.0"]\r
-\r
- test_cfg.append(test_config+"/config_file_o_du.dat")\r
- test_cfg.append(test_config+"/config_file_o_ru.dat")\r
-\r
- wd = os.getcwd()\r
- os.chdir(xran_path+"/app/")\r
-\r
- processes = []\r
- logfile_xu = []\r
- log_file_name = []\r
-\r
- os.system('rm -rf ./logs')\r
-\r
- for i in range(2):\r
- log_file_name.append("sampleapp_log_{}_cat_{}_mu{}_{}mhz_tst_{}.log".format(dic_xu.get(i),cat, mu, bw, tcase))\r
- with open(log_file_name[i], "w") as f:\r
- #, stdout=f, stderr=f\r
- p = subprocess.Popen([app, test_cfg[i], eth_up_dev[i], eth_cp_dev[i]], stdout=f, stderr=f)\r
- logfile_xu.insert(i, f)\r
- processes.append((p, logfile_xu[i]))\r
-\r
- logging.info("Running O-DU and O-RU see output in: %s %s\n", logfile_xu[0].name, logfile_xu[1].name)\r
- for p, f in processes:\r
- p.wait()\r
- p.communicate()[0]\r
- if p.returncode != 0:\r
- print("Application {} failed p.returncode:{}".format(dic_xu.get(i), p.returncode))\r
- print("FAIL")\r
- logging.info("FAIL\n")\r
- logging.shutdown()\r
- sys.exit(p.returncode)\r
-\r
- f.close()\r
-\r
- logging.info("O-DU and O-RU are done\n")\r
-\r
- make_copy_mlog(cat, mu, bw, tcase, xran_path)\r
-\r
- usecase_cfg = parse_dat_file(cat, mu, bw, tcase, xran_path, test_cfg)\r
-\r
- res = compare_resuts(cat, mu, bw, tcase, xran_path, test_cfg, 0)\r
- if res != 0:\r
- os.chdir(wd)\r
- print("FAIL")\r
- return res\r
-\r
- res = compare_resuts(cat, mu, bw, tcase, xran_path, test_cfg, 1)\r
- if res != 0:\r
- os.chdir(wd)\r
- print("FAIL")\r
- return res\r
-\r
- os.chdir(wd)\r
- print("PASS")\r
- return res\r
-\r
-def main():\r
- test_results = []\r
- test_executed_total = 0\r
- run_total = 0\r
- cat = 0\r
- mu = 0\r
- bw = 0\r
- tcase = 0\r
- """Processes input files to produce IACA files"""\r
- # Find path to XRAN\r
- xran_path = os.getenv("XRAN_DIR")\r
-\r
- # Set up logging with given level (DEBUG, INFO, ERROR) for console end logfile\r
- init_logger(logging.INFO, logging.DEBUG)\r
- logging.info("Started script: master.py, XRAN path %s", xran_path)\r
-\r
- # Parse input arguments\r
- if len(sys.argv) == 1 :\r
- run_total = len(all_test_cases)\r
- print(run_total)\r
- print("Run All test cases {}\n".format(run_total))\r
- else:\r
- options = parse_args(sys.argv[1:])\r
- cat = options.category\r
- mu = options.numerology\r
- bw = options.bandwidth\r
- tcase = options.testcase\r
-\r
-\r
- if (run_total):\r
- for test_run_ix in range(0, run_total):\r
- cat = all_test_cases[test_run_ix][0]\r
- mu = all_test_cases[test_run_ix][1]\r
- bw = all_test_cases[test_run_ix][2]\r
- tcase = all_test_cases[test_run_ix][3]\r
-\r
- res = run_tcase(cat, mu, bw, tcase, xran_path)\r
- if (res != 0):\r
- test_results.append((cat, mu, bw, tcase,'FAIL'))\r
- break;\r
-\r
- test_results.append((cat, mu, bw, tcase,'PASS'))\r
- else:\r
- res = run_tcase(cat, mu, bw, tcase, xran_path)\r
- if (res != 0):\r
- test_results.append((cat, mu, bw, tcase,'FAIL'))\r
- test_results.append((cat, mu, bw, tcase,'PASS'))\r
-\r
- with open('testresult.txt', 'w') as reshandle:\r
- json.dump(test_results, reshandle)\r
-\r
- return res\r
-\r
-if __name__ == '__main__':\r
- START_TIME = datetime.now()\r
- res = main()\r
- END_TIME = datetime.now()\r
- logging.debug("Start time: %s, end time: %s", START_TIME, END_TIME)\r
- logging.info("Execution time: %s", END_TIME - START_TIME)\r
- logging.shutdown()\r
- sys.exit(res)\r
+#!/usr/bin/python
+#******************************************************************************
+#
+# Copyright (c) 2019 Intel.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#******************************************************************************/
+
+"""This script run test cases with O-DU and O-RU
+"""
+import logging
+import sys
+import argparse
+import re
+import subprocess
+import os
+import shutil
+from itertools import dropwhile
+from datetime import datetime
+import json
+
+nNumRbsPerSymF1 = [
+ # 5MHz 10MHz 15MHz 20 MHz 25 MHz 30 MHz 40 MHz 50MHz 60 MHz 70 MHz 80 MHz 90 MHz 100 MHz
+ [25, 52, 79, 106, 133, 160, 216, 270, 0, 0, 0, 0, 0], # Numerology 0 (15KHz)
+ [11, 24, 38, 51, 65, 78, 106, 133, 162, 0, 217, 245, 273], # Numerology 1 (30KHz)
+ [0, 11, 18, 24, 31, 38, 51, 65, 79, 0, 107, 121, 135] # Numerology 2 (60KHz)
+]
+
+nNumRbsPerSymF2 = [
+ # 50Mhz 100MHz 200MHz 400MHz
+ [66, 132, 264, 0], # Numerology 2 (60KHz)
+ [32, 66, 132, 264] # Numerology 3 (120KHz)
+]
+
+
+nRChBwOptions_keys = ['5','10','15','20', '25', '30', '40', '50', '60','70', '80', '90', '100', '200', '400']
+nRChBwOptions_values = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14]
+nRChBwOptions = dict(zip(nRChBwOptions_keys, nRChBwOptions_values))
+
+nRChBwOptions_keys_mu2and3 = ['50', '100', '200', '400']
+nRChBwOptions_values_mu2and3 = [0,1,2,3]
+nRChBwOptions_mu2and3 = dict(zip(nRChBwOptions_keys_mu2and3, nRChBwOptions_values_mu2and3))
+
+# table of all test cases
+# (cat, mu, bw, test case)
+all_test_cases = [(0, 0, 5, 0),
+ (0, 0, 10, 0),
+ (0, 0, 20, 0),
+ (0, 1, 100, 0),
+ (0, 3, 100, 0),
+ (1, 1, 100, 0)]
+#Cat B
+""" all_test_cases = [(1, 1, 100, 0),
+ (1, 1, 100, 1),
+ (1, 1, 100, 101),
+ (1, 1, 100, 102),
+ (1, 1, 100, 103),
+ (1, 1, 100, 104),
+ (1, 1, 100, 105),
+ #(1, 1, 100, 106), 25G not enough
+ (1, 1, 100, 107),
+ (1, 1, 100, 108),
+ #(1, 1, 100, 109), 25G not enough
+ (1, 1, 100, 201),
+ #(1, 1, 100, 202), 25G not enough
+ (1, 1, 100, 203),
+ (1, 1, 100, 204),
+ (1, 1, 100, 205),
+ (1, 1, 100, 206),
+ (1, 1, 100, 211),
+ #(1, 1, 100, 212), 25G not enough
+ (1, 1, 100, 213),
+ (1, 1, 100, 214),
+ (1, 1, 100, 215),
+ (1, 1, 100, 216)
+]
+ """
+dic_dir = dict({0:'DL', 1:'UL'})
+dic_xu = dict({0:'o-du', 1:'o-ru'})
+
+def init_logger(console_level, logfile_level):
+ """Initializes console and logfile logger with given logging levels"""
+ # File logger
+ logging.basicConfig(filename="runtests.log",
+ filemode='w',
+ format="%(asctime)s: %(levelname)s: %(message)s",
+ level=logfile_level)
+ # Console logger
+ logger = logging.getLogger()
+ handler = logging.StreamHandler()
+ handler.setLevel(console_level)
+ formatter = logging.Formatter("%(levelname)s: %(message)s")
+ handler.setFormatter(formatter)
+ logger.addHandler(handler)
+
+def parse_args(args):
+ """Configures parser and parses command line configuration"""
+ # Parser configuration
+ parser = argparse.ArgumentParser(description="Run test cases: category numerology bandwidth test_num")
+
+ parser.add_argument("--cat", type=int, default=0, help="Category: 0 (A) or 1 (B)", metavar="cat", dest="category")
+ parser.add_argument("--mu", type=int, default=0, help="numerology [0,1,3]", metavar="num", dest="numerology")
+ parser.add_argument("--bw", type=int, default=20, help="bandwidth [5,10,20,100]", metavar="bw", dest="bandwidth")
+ parser.add_argument("--testcase", type=int, default=0, help="test case number", metavar="testcase", dest="testcase")
+
+ # Parse arguments
+ options = parser.parse_args(args)
+ #parser.print_help()
+ logging.debug("Options: category=%d num=%d bw=%d testcase=%d",
+ options.category, options.numerology, options.bandwidth, options.testcase)
+ return options
+
+def is_comment(s):
+ """ function to check if a line
+ starts with some character.
+ Here # for comment
+ """
+ # return true if a line starts with #
+ return s.startswith('#')
+
+class GetOutOfLoops( Exception ):
+ pass
+
+def compare_resuts(cat, mu, bw, tcase, xran_path, test_cfg, direction):
+ res = 0
+
+ if mu < 3:
+ nDlRB = nNumRbsPerSymF1[mu][nRChBwOptions.get(str(nDLBandwidth))]
+ nUlRB = nNumRbsPerSymF1[mu][nRChBwOptions.get(str(nULBandwidth))]
+ elif (mu >=2) & (mu <= 3):
+ nDlRB = nNumRbsPerSymF2[mu - 2][nRChBwOptions_mu2and3.get(str(nDLBandwidth))]
+ nUlRB = nNumRbsPerSymF2[mu - 2][nRChBwOptions_mu2and3.get(str(nULBandwidth))]
+ print(nDlRB, nUlRB)
+ else:
+ print("Incorrect arguments\n")
+ res = -1
+ return res
+
+ if 'compression' in globals():
+ comp = compression
+ else:
+ comp = 0
+
+ print("compare results: {} [compression {}]\n".format(dic_dir.get(direction), comp))
+
+ #if cat == 1:
+ # print("WARNING: Skip checking IQs and BF Weights for CAT B for now\n");
+ # return res
+
+ #get slot config
+ if nFrameDuplexType == 1:
+ SlotConfig = []
+ for i in range(nTddPeriod):
+ if i == 0:
+ SlotConfig.insert(i, sSlotConfig0)
+ elif i == 1:
+ SlotConfig.insert(i, sSlotConfig1)
+ elif i == 2:
+ SlotConfig.insert(i, sSlotConfig2)
+ elif i == 3:
+ SlotConfig.insert(i, sSlotConfig3)
+ elif i == 4:
+ SlotConfig.insert(i, sSlotConfig4)
+ elif i == 5:
+ SlotConfig.insert(i, sSlotConfig5)
+ elif i == 6:
+ SlotConfig.insert(i, sSlotConfig6)
+ elif i == 7:
+ SlotConfig.insert(i, sSlotConfig7)
+ elif i == 8:
+ SlotConfig.insert(i, sSlotConfig8)
+ elif i == 9:
+ SlotConfig.insert(i, sSlotConfig9)
+ else :
+ raise Exception('i should not exceed nTddPeriod %d. The value of i was: {}'.format(nTddPeriod, i))
+ #print(SlotConfig, type(sSlotConfig0))
+ try:
+
+ if (direction == 1) & (cat == 1): #UL
+ flowId = ccNum*antNumUL
+ else:
+ flowId = ccNum*antNum
+
+ for i in range(0, flowId):
+ #read ref and test files
+ tst = []
+ ref = []
+ if direction == 0:
+ # DL
+ nRB = nDlRB
+ file_tst = xran_path+"/app/logs/"+"o-ru-rx_log_ant"+str(i)+".txt"
+ file_ref = xran_path+"/app/logs/"+"o-du-play_ant"+str(i)+".txt"
+ elif direction == 1:
+ # UL
+ nRB = nUlRB
+ file_tst = xran_path+"/app/logs/"+"o-du-rx_log_ant"+str(i)+".txt"
+ file_ref = xran_path+"/app/logs/"+"o-ru-play_ant"+str(i)+".txt"
+ else:
+ raise Exception('Direction is not supported %d'.format(direction))
+
+ print("test result :", file_tst)
+ print("test reference:", file_ref)
+ if os.path.exists(file_tst):
+ try:
+ file_tst = open(file_tst, 'r')
+ except OSError:
+ print ("Could not open/read file:", file_tst)
+ sys.exit()
+ else:
+ print(file_tst, "doesn't exist")
+ res = -1
+ return res
+ if os.path.exists(file_ref):
+ try:
+ file_ref = open(file_ref, 'r')
+ except OSError:
+ print ("Could not open/read file:", file_ref)
+ sys.exit()
+ else:
+ print(file_tst, "doesn't exist")
+ res = -1
+ return res
+
+ tst = file_tst.readlines()
+ ref = file_ref.readlines()
+
+ print(len(tst))
+ print(len(ref))
+
+ file_tst.close();
+ file_ref.close();
+
+ print(numSlots)
+
+ for slot_idx in range(0, numSlots):
+ for sym_idx in range(0, 14):
+ if nFrameDuplexType==1:
+ #skip sym if TDD
+ if direction == 0:
+ #DL
+ sym_dir = SlotConfig[slot_idx%nTddPeriod][sym_idx]
+ if(sym_dir != 0):
+ continue
+ elif direction == 1:
+ #UL
+ sym_dir = SlotConfig[slot_idx%nTddPeriod][sym_idx]
+ if(sym_dir != 1):
+ continue
+
+ #print("Check:","[",i,"]", slot_idx, sym_idx)
+ for line_idx in range(0, nRB*12):
+ offset = (slot_idx*nRB*12*14) + sym_idx*nRB*12 + line_idx
+ line_tst = tst[offset].rstrip()
+ line_ref = ref[offset].rstrip()
+ if comp == 1:
+ # discard LSB bits as BFP compression is not Bit Exact
+ tst_i_value = int(line_tst.split(" ")[0]) & 0xFF80
+ tst_q_value = int(line_tst.split(" ")[1]) & 0xFF80
+ ref_i_value = int(line_ref.split(" ")[0]) & 0xFF80
+ ref_q_value = int(line_ref.split(" ")[1]) & 0xFF80
+
+ print("check:","ant:[",i,"]:",offset, slot_idx, sym_idx, line_idx,":","tst: ", tst_i_value, " ", tst_q_value, " " , "ref: ", ref_i_value, " ", ref_q_value, " ")
+ if (tst_i_value != ref_i_value) or (tst_q_value != ref_q_value) :
+ print("FAIL:","ant:[",i,"]:",offset, slot_idx, sym_idx, line_idx,":","tst: ", tst_i_value, " ", tst_q_value, " " , "ref: ", ref_i_value, " ", ref_q_value, " ")
+ res = -1
+ raise GetOutOfLoops
+ else:
+ #if line_idx == 0:
+ #print("Check:", offset,"[",i,"]", slot_idx, sym_idx,":",line_tst, line_ref)
+ if line_ref != line_tst:
+ print("FAIL:","ant:[",i,"]:",offset, slot_idx, sym_idx, line_idx,":","tst:", line_tst, "ref:", line_ref)
+ res = -1
+ raise GetOutOfLoops
+ except GetOutOfLoops:
+ pass
+
+ return res
+
+def parse_dat_file(cat, mu, bw, tcase, xran_path, test_cfg):
+ #parse config files
+ logging.info("parse config files %s\n", test_cfg[0])
+ lineList = list()
+ sep = '#'
+ with open(test_cfg[0],'r') as fh:
+ for curline in dropwhile(is_comment, fh):
+ my_line = curline.rstrip().split(sep, 1)[0].strip()
+ if my_line:
+ lineList.append(my_line)
+ global_env = {}
+ local_env = {}
+
+ for line in lineList:
+ exe_line = line.replace(":", ",")
+ if exe_line.find("/") > 0 :
+ exe_line = exe_line.replace('./', "'")
+ exe_line = exe_line+"'"
+
+ code = compile(str(exe_line), '<string>', 'exec')
+ exec (code, global_env, local_env)
+
+ for k, v in local_env.items():
+ globals()[k] = v
+ print(k, v)
+
+ return local_env
+
+def make_copy_mlog(cat, mu, bw, tcase, xran_path):
+ res = 0
+
+ src_bin = xran_path+"/app/mlog-o-du-c0.bin"
+ src_csv = xran_path+"/app/mlog-o-du-hist.csv"
+ dst_bin = xran_path+"/app/mlog-o-du-c0-cat"+str(cat)+"-mu"+str(mu)+"-bw"+str(bw)+"-tcase"+str(tcase)+".bin"
+ dst_csv = xran_path+"/app/mlog-o-du-hist-cat"+str(cat)+"-mu"+str(mu)+"-bw"+str(bw)+"-tcase"+str(tcase)+".csv"
+
+ try:
+ d_bin = shutil.copyfile(src_bin, dst_bin)
+ d_csv = shutil.copyfile(src_csv, dst_csv)
+ except IOError:
+ logging.info("MLog is not present\n")
+ res = 1
+ else:
+ logging.info("Mlog was copied\n")
+
+
+ src_bin = xran_path+"/app/mlog-o-ru-c0.bin"
+ src_csv = xran_path+"/app/mlog-o-ru-hist.csv"
+ dst_bin = xran_path+"/app/mlog-o-ru-c0-cat"+str(cat)+"-mu"+str(mu)+"-bw"+str(bw)+"-tcase"+str(tcase)+".bin"
+ dst_csv = xran_path+"/app/mlog-o-ru-hist-cat"+str(cat)+"-mu"+str(mu)+"-bw"+str(bw)+"-tcase"+str(tcase)+".csv"
+
+
+ try:
+ d_bin = shutil.copyfile(src_bin, dst_bin)
+ d_csv = shutil.copyfile(src_csv, dst_csv)
+ except IOError:
+ logging.info("MLog is not present\n")
+ res = 1
+ else:
+ logging.info("Mlog was copied\n")
+
+
+ return res
+
+
+def run_tcase(cat, mu, bw, tcase, xran_path):
+ if cat == 1:
+ test_config = xran_path+"/app/usecase/cat_b/mu{0:d}_{1:d}mhz".format(mu, bw)
+ elif cat == 0 :
+ test_config = xran_path+"/app/usecase/mu{0:d}_{1:d}mhz".format(mu, bw)
+ else:
+ print("Incorrect arguments\n")
+
+ if(tcase > 0) :
+ test_config = test_config+"/"+str(tcase)
+
+ app = xran_path+"/app/build/sample-app"
+
+ logging.debug("run: %s %s", app, test_config)
+ logging.debug("Started script: master.py, XRAN path %s", xran_path)
+
+ test_cfg = []
+ #TODO: add detection of ETH ports
+ eth_cp_dev = ["0000:22:02.1", "0000:22:0a.1"]
+ eth_up_dev = ["0000:22:02.0", "0000:22:0a.0"]
+
+ test_cfg.append(test_config+"/config_file_o_du.dat")
+ test_cfg.append(test_config+"/config_file_o_ru.dat")
+
+ wd = os.getcwd()
+ os.chdir(xran_path+"/app/")
+
+ processes = []
+ logfile_xu = []
+ log_file_name = []
+
+ os.system('rm -rf ./logs')
+
+ for i in range(2):
+ log_file_name.append("sampleapp_log_{}_cat_{}_mu{}_{}mhz_tst_{}.log".format(dic_xu.get(i),cat, mu, bw, tcase))
+ with open(log_file_name[i], "w") as f:
+ #, stdout=f, stderr=f
+ p = subprocess.Popen([app, test_cfg[i], eth_up_dev[i], eth_cp_dev[i]], stdout=f, stderr=f)
+ logfile_xu.insert(i, f)
+ processes.append((p, logfile_xu[i]))
+
+ logging.info("Running O-DU and O-RU see output in: %s %s\n", logfile_xu[0].name, logfile_xu[1].name)
+ for p, f in processes:
+ p.wait()
+ p.communicate()[0]
+ if p.returncode != 0:
+ print("Application {} failed p.returncode:{}".format(dic_xu.get(i), p.returncode))
+ print("FAIL")
+ logging.info("FAIL\n")
+ logging.shutdown()
+ sys.exit(p.returncode)
+
+ f.close()
+
+ logging.info("O-DU and O-RU are done\n")
+
+ make_copy_mlog(cat, mu, bw, tcase, xran_path)
+
+ usecase_cfg = parse_dat_file(cat, mu, bw, tcase, xran_path, test_cfg)
+
+ res = compare_resuts(cat, mu, bw, tcase, xran_path, test_cfg, 0)
+ if res != 0:
+ os.chdir(wd)
+ print("FAIL")
+ return res
+
+ res = compare_resuts(cat, mu, bw, tcase, xran_path, test_cfg, 1)
+ if res != 0:
+ os.chdir(wd)
+ print("FAIL")
+ return res
+
+ os.chdir(wd)
+ print("PASS")
+ return res
+
+def main():
+ test_results = []
+ test_executed_total = 0
+ run_total = 0
+ cat = 0
+ mu = 0
+ bw = 0
+ tcase = 0
+ """Processes input files to produce IACA files"""
+ # Find path to XRAN
+ xran_path = os.getenv("XRAN_DIR")
+
+ # Set up logging with given level (DEBUG, INFO, ERROR) for console end logfile
+ init_logger(logging.INFO, logging.DEBUG)
+ logging.info("Started script: master.py, XRAN path %s", xran_path)
+
+ # Parse input arguments
+ if len(sys.argv) == 1 :
+ run_total = len(all_test_cases)
+ print(run_total)
+ print("Run All test cases {}\n".format(run_total))
+ else:
+ options = parse_args(sys.argv[1:])
+ cat = options.category
+ mu = options.numerology
+ bw = options.bandwidth
+ tcase = options.testcase
+
+
+ if (run_total):
+ for test_run_ix in range(0, run_total):
+ cat = all_test_cases[test_run_ix][0]
+ mu = all_test_cases[test_run_ix][1]
+ bw = all_test_cases[test_run_ix][2]
+ tcase = all_test_cases[test_run_ix][3]
+
+ res = run_tcase(cat, mu, bw, tcase, xran_path)
+ if (res != 0):
+ test_results.append((cat, mu, bw, tcase,'FAIL'))
+ break;
+
+ test_results.append((cat, mu, bw, tcase,'PASS'))
+ else:
+ res = run_tcase(cat, mu, bw, tcase, xran_path)
+ if (res != 0):
+ test_results.append((cat, mu, bw, tcase,'FAIL'))
+ test_results.append((cat, mu, bw, tcase,'PASS'))
+
+ with open('testresult.txt', 'w') as reshandle:
+ json.dump(test_results, reshandle)
+
+ return res
+
+if __name__ == '__main__':
+ START_TIME = datetime.now()
+ res = main()
+ END_TIME = datetime.now()
+ logging.debug("Start time: %s, end time: %s", START_TIME, END_TIME)
+ logging.info("Execution time: %s", END_TIME - START_TIME)
+ logging.shutdown()
+ sys.exit(res)
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-\r
-Download googletest from https://github.com/google/googletest/releases \r
-Untar google test. \r
-The recommended installation folder is /opt/gtest/\r
-\r
-Example build and installation commands:\r
-sudo tar -xvf googletest-release-1.7.0.tar.gz\r
-sudo mv googletest-release-1.7.0 gtest-1.7.0\r
-export GTEST_DIR=/opt/gtest/gtest-1.7.0\r
-cd ${GTEST_DIR}\r
-sudo g++ -isystem ${GTEST_DIR}/include -I${GTEST_DIR} -pthread -c ${GTEST_DIR}/src/gtest-all.cc\r
-sudo ar -rv libgtest.a gtest-all.o\r
-cd ${GTEST_DIR}/build-aux\r
-sudo cmake ${GTEST_DIR}\r
-sudo make\r
-cd ${GTEST_DIR}\r
-sudo ln -s build-aux/libgtest_main.a libgtest_main.a\r
-\r
-setup GTEST_ROOT \r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+
+Download googletest from https://github.com/google/googletest/releases
+Untar google test.
+The recommended installation folder is /opt/gtest/
+
+Example build and installation commands:
+sudo tar -xvf googletest-release-1.7.0.tar.gz
+sudo mv googletest-release-1.7.0 gtest-1.7.0
+export GTEST_DIR=/opt/gtest/gtest-1.7.0
+cd ${GTEST_DIR}
+sudo g++ -isystem ${GTEST_DIR}/include -I${GTEST_DIR} -pthread -c ${GTEST_DIR}/src/gtest-all.cc
+sudo ar -rv libgtest.a gtest-all.o
+cd ${GTEST_DIR}/build-aux
+sudo cmake ${GTEST_DIR}
+sudo make
+cd ${GTEST_DIR}
+sudo ln -s build-aux/libgtest_main.a libgtest_main.a
+
+setup GTEST_ROOT
+
export GTEST_ROOT=/opt/gtest/gtest-1.7.0
\ No newline at end of file
-#/******************************************************************************\r
-#*\r
-#* Copyright (c) 2019 Intel.\r
-#*\r
-#* Licensed under the Apache License, Version 2.0 (the "License");\r
-#* you may not use this file except in compliance with the License.\r
-#* You may obtain a copy of the License at\r
-#*\r
-#* http://www.apache.org/licenses/LICENSE-2.0\r
-#*\r
-#* Unless required by applicable law or agreed to in writing, software\r
-#* distributed under the License is distributed on an "AS IS" BASIS,\r
-#* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-#* See the License for the specific language governing permissions and\r
-#* limitations under the License.\r
-#*\r
-#*******************************************************************************/\r
-\r
-\r
-.SUFFIXES: .o .c .s .i .cpp\r
-\r
-##############################################################\r
-# Tools configuration\r
-##############################################################\r
-CC := icc\r
-CXX := icpc\r
-CPP := icpc\r
-AS := as\r
-AR := ar\r
-LD := icc\r
-OBJDUMP := objdump\r
-\r
-ifeq ($(SHELL),cmd.exe)\r
-MD := mkdir.exe -p\r
-CP := cp.exe -f\r
-RM := rm.exe -rf\r
-else\r
-MD := mkdir -p\r
-CP := cp -f\r
-RM := rm -rf\r
-endif\r
-\r
-ifeq ($(RTE_SDK),)\r
- $(error "Please define RTE_SDK environment variable")\r
-endif\r
-\r
-ifeq ($(MLOG_DIR),)\r
- MLOG_DIR=$(XRAN_DIR)/../mlog\r
-endif\r
-\r
-RTE_TARGET ?= x86_64-native-linuxapp-icc\r
-\r
-RTE_INC := $(RTE_SDK)/$(RTE_TARGET)/include\r
-\r
-# Where to find user code.\r
-COMMON_TEST_DIR = $(XRAN_DIR)/test/common\r
-USER_DIR = $(XRAN_DIR)/lib/src\r
-USER_ETH = $(XRAN_DIR)/lib/ethernet\r
-USER_API = $(XRAN_DIR)/lib/api\r
-\r
-# Flags passed to the preprocessor.\r
-# Set Google Test's header directory as a system directory, such that\r
-# the compiler doesn't generate warnings in Google Test headers.\r
-CPPFLAGS += -isystem $(GTEST_ROOT)/include\r
-\r
-# Flags passed to the C++ compiler.\r
-CXXFLAGS += -g -std=gnu++11 -Wall -Wextra -pthread -I$(USER_API) -I$(USER_DIR) -I$(USER_ETH) -I$(MLOG_DIR)/source -I $(COMMON_TEST_DIR) -I$(RTE_INC)\r
-\r
-# All tests produced by this Makefile. Remember to add new tests you\r
-# created to the list.\r
-TESTS = unittests\r
-\r
-# All Google Test headers. Usually you shouldn't change this\r
-# definition.\r
-GTEST_HEADERS = $(GTEST_ROOT)/include/gtest/*.h \\r
- $(GTEST_ROOT)/include/gtest/internal/*.h\r
-\r
-RTE_LIBS = -L$(RTE_SDK)/$(RTE_TARGET)/lib -Wl,--whole-archive -Wl,-lrte_mempool_ring -Wl,-lrte_pci -Wl,-lrte_bus_pci -Wl,-lrte_bus_vdev -Wl,-lrte_net -Wl,-lrte_distributor -Wl,-lrte_reorder -Wl,-lrte_kni -Wl,-lrte_pipeline -Wl,-lrte_table -Wl,-lrte_port -Wl,-lrte_timer -Wl,-lrte_hash -Wl,-lrte_jobstats -Wl,-lrte_lpm -Wl,-lrte_power -Wl,-lrte_acl -Wl,-lrte_meter -Wl,-lrte_sched -Wl,-lm -Wl,-lrt -Wl,-lrte_vhost -Wl,--start-group -Wl,-lrte_kvargs -Wl,-lrte_mbuf -Wl,-lrte_ip_frag -Wl,-lrte_ethdev -Wl,-lrte_cryptodev -Wl,-lrte_mempool -Wl,-lrte_ring -Wl,-lrte_eal -Wl,-lrte_cmdline -Wl,-lrte_cfgfile -Wl,-lrte_pmd_bond -Wl,-lrte_pmd_vmxnet3_uio -Wl,-lrte_pmd_virtio -Wl,-lrte_pmd_cxgbe -Wl,-lrte_pmd_enic -Wl,-lrte_pmd_i40e -Wl,-lrte_pmd_fm10k -Wl,-lrte_pmd_ixgbe -Wl,-lrte_pmd_e1000 -Wl,-lrte_pmd_ring -Wl,-lrte_pmd_af_packet -Wl,-lrte_pmd_null -Wl,-lrte_pdump -Wl,-lrt -Wl,-lm -Wl,-ldl -Wl,--end-group -Wl,--no-whole-archive\r
-\r
-CFLAGS += -std=gnu11 -Wall -Wno-deprecated-declarations \\r
- -fdata-sections \\r
- -ffunction-sections \\r
- -g \\r
- -Wall \\r
- -Wimplicit-function-declaration \\r
- -wd1786 \\r
- -I$(USER_DIR) -I$(USER_API) -I$(USER_API) -I$(USER_DIR) -I$(USER_ETH) -I$(MLOG_DIR)/source -I$(RTE_INC)\r
-\r
-C_SRC = \\r
- $(USER_ETH)/ethdi.c \\r
- $(USER_ETH)/ethernet.c \\r
- $(USER_DIR)/xran_up_api.c \\r
- $(USER_DIR)/xran_sync_api.c \\r
- $(USER_DIR)/xran_timer.c \\r
- $(USER_DIR)/xran_cp_api.c \\r
- $(USER_DIR)/xran_transport.c \\r
- $(USER_DIR)/xran_common.c \\r
- $(USER_DIR)/xran_ul_tables.c \\r
- $(USER_DIR)/xran_frame_struct.c \\r
- $(USER_DIR)/xran_app_frag.c \\r
- $(USER_DIR)/xran_main.c\r
-\r
-# $(USER_DIR)/xran_compression.c\r
-\r
-CC_SRC = \\r
- $(COMMON_TEST_DIR)/xranlib_unit_test_main.cc \\r
- c_plane_tests.cc \\r
- chain_tests.cc \\r
- prach_functional.cc \\r
- prach_performance.cc \\r
- u_plane_functional.cc \\r
- init_sys_functional.cc \\r
- compander_functional.cc \\r
- unittests.cc\r
-\r
-# u_plane_performance.cc \\r
-\r
-CPP_SRC = $(COMMON_TEST_DIR)/common.cpp \\r
- $(USER_DIR)/xran_compression.cpp\r
-\r
-C_OBJS := $(patsubst %.c,%.o,$(C_SRC))\r
-CC_OBJS := $(patsubst %.cc,%.o,$(CC_SRC))\r
-CPP_OBJS := $(patsubst %.cpp,%.o,$(CPP_SRC))\r
-\r
-CPPFLAGS += -I$(USER_DIR) -I$(USER_API) \r
-\r
-CPP_COMP = -O3 -xcore-avx512 -restrict -g -fasm-blocks\r
-\r
-# House-keeping build targets.\r
-all : echo_start_build $(TESTS)\r
-\r
-clean :\r
- @echo [CLEAN]\r
- rm -f $(TESTS) *.o $(COMMON_TEST_DIR)/*.o $(USER_DIR)/*.o $(USER_ETH)/*.o\r
-\r
-.PHONY : echo_start_build\r
-echo_start_build :\r
- @echo Build Tests with\r
- @echo $(USER_DIR)\r
- @echo $(USER_API)\r
-\r
-$(CC_OBJS) :\r
- @echo "[CC] $@"\r
- @$(CXX) -c $(CPPFLAGS) $(CXXFLAGS) -o"$@" $(patsubst %.o,%.cc,$@)\r
-\r
-$(CPP_OBJS) :\r
- @echo "[CPP] $@"\r
- @$(CXX) -c $(CPPFLAGS) $(CXXFLAGS) $(CPP_COMP) -o"$@" $(patsubst %.o,%.cpp,$@)\r
-\r
-$(C_OBJS) :\r
- @echo "[C] $@"\r
- @$(CC) -c $(CFLAGS) -o"$@" $(patsubst %.o,%.c,$@)\r
-\r
-unittests : $(CC_OBJS) $(CPP_OBJS) $(C_OBJS) $(GTEST_ROOT)/libgtest.a\r
- @echo "[LD] $@"\r
- $(CXX) $(CPPFLAGS) $(CXXFLAGS) -L$(MLOG_DIR)/bin -Wl, $(RTE_LIBS) -lpthread -lnuma $^ -o $@\r
+###############################################################################
+# <COPYRIGHT_TAG>
+###############################################################################
+
+.SUFFIXES: .o .c .s .i .cpp
+
+##############################################################
+# Tools configuration
+##############################################################
+CC := icc
+CXX := icpc
+CPP := icpc
+AS := as
+AR := ar
+LD := icc
+OBJDUMP := objdump
+
+ifeq ($(SHELL),cmd.exe)
+MD := mkdir.exe -p
+CP := cp.exe -f
+RM := rm.exe -rf
+else
+MD := mkdir -p
+CP := cp -f
+RM := rm -rf
+endif
+
+ifeq ($(RTE_SDK),)
+ $(error "Please define RTE_SDK environment variable")
+endif
+
+ifeq ($(MLOG_DIR),)
+ MLOG_DIR=$(XRAN_DIR)/../mlog
+endif
+
+RTE_TARGET ?= x86_64-native-linuxapp-icc
+
+RTE_INC := $(RTE_SDK)/$(RTE_TARGET)/include
+
+# Where to find user code.
+COMMON_TEST_DIR = $(XRAN_DIR)/test/common
+USER_DIR = $(XRAN_DIR)/lib/src
+USER_ETH = $(XRAN_DIR)/lib/ethernet
+USER_API = $(XRAN_DIR)/lib/api
+
+# Flags passed to the preprocessor.
+# Set Google Test's header directory as a system directory, such that
+# the compiler doesn't generate warnings in Google Test headers.
+CPPFLAGS += -isystem $(GTEST_ROOT)/include
+
+# Flags passed to the C++ compiler.
+CXXFLAGS += -g -std=gnu++11 -Wall -Wextra -fstack-protector-strong -z noexecstack -Wformat -Wformat-security -Werror=format-security -fno-strict-overflow -fwrapv -pthread -I$(USER_API) -I$(USER_DIR) -I$(USER_ETH) -I$(MLOG_DIR)/source -I $(COMMON_TEST_DIR) -I$(RTE_INC)
+
+# All tests produced by this Makefile. Remember to add new tests you
+# created to the list.
+TESTS = unittests
+
+# All Google Test headers. Usually you shouldn't change this
+# definition.
+GTEST_HEADERS = $(GTEST_ROOT)/include/gtest/*.h \
+ $(GTEST_ROOT)/include/gtest/internal/*.h
+
+RTE_LIBS = -L$(RTE_SDK)/$(RTE_TARGET)/lib -Wl,--whole-archive -Wl,-lrte_mempool_ring -Wl,-lrte_pci -Wl,-lrte_bus_pci -Wl,-lrte_bus_vdev -Wl,-lrte_net -Wl,-lrte_distributor -Wl,-lrte_reorder -Wl,-lrte_kni -Wl,-lrte_pipeline -Wl,-lrte_table -Wl,-lrte_port -Wl,-lrte_timer -Wl,-lrte_hash -Wl,-lrte_jobstats -Wl,-lrte_lpm -Wl,-lrte_power -Wl,-lrte_acl -Wl,-lrte_meter -Wl,-lrte_sched -Wl,-lm -Wl,-lrt -Wl,-lrte_vhost -Wl,--start-group -Wl,-lrte_kvargs -Wl,-lrte_mbuf -Wl,-lrte_ip_frag -Wl,-lrte_ethdev -Wl,-lrte_cryptodev -Wl,-lrte_mempool -Wl,-lrte_ring -Wl,-lrte_eal -Wl,-lrte_cmdline -Wl,-lrte_cfgfile -Wl,-lrte_pmd_bond -Wl,-lrte_pmd_vmxnet3_uio -Wl,-lrte_pmd_virtio -Wl,-lrte_pmd_cxgbe -Wl,-lrte_pmd_enic -Wl,-lrte_pmd_i40e -Wl,-lrte_pmd_fm10k -Wl,-lrte_pmd_ixgbe -Wl,-lrte_pmd_e1000 -Wl,-lrte_pmd_ring -Wl,-lrte_pmd_af_packet -Wl,-lrte_pmd_null -Wl,-lrte_pdump -Wl,-lrt -Wl,-lm -Wl,-ldl -Wl,--end-group -Wl,--no-whole-archive
+
+CFLAGS += -std=gnu11 -Wall -Wno-deprecated-declarations \
+ -fdata-sections \
+ -ffunction-sections \
+ -g \
+ -Wall \
+ -Wimplicit-function-declaration \
+ -wd1786 \
+ -I$(USER_DIR) -I$(USER_API) -I$(USER_API) -I$(USER_DIR) -I$(USER_ETH) -I$(MLOG_DIR)/source -I$(RTE_INC)
+
+C_SRC = \
+ $(USER_ETH)/ethdi.c \
+ $(USER_ETH)/ethernet.c \
+ $(USER_DIR)/xran_up_api.c \
+ $(USER_DIR)/xran_sync_api.c \
+ $(USER_DIR)/xran_timer.c \
+ $(USER_DIR)/xran_cp_api.c \
+ $(USER_DIR)/xran_transport.c \
+ $(USER_DIR)/xran_common.c \
+ $(USER_DIR)/xran_ul_tables.c \
+ $(USER_DIR)/xran_frame_struct.c \
+ $(USER_DIR)/xran_app_frag.c \
+ $(USER_DIR)/xran_main.c
+
+# $(USER_DIR)/xran_compression.c
+
+CC_SRC = \
+ $(COMMON_TEST_DIR)/xranlib_unit_test_main.cc \
+ c_plane_tests.cc \
+ chain_tests.cc \
+ prach_functional.cc \
+ prach_performance.cc \
+ u_plane_functional.cc \
+ init_sys_functional.cc \
+ compander_functional.cc \
+ unittests.cc
+
+# u_plane_performance.cc \
+
+CPP_SRC = $(COMMON_TEST_DIR)/common.cpp \
+ $(USER_DIR)/xran_compression.cpp
+
+C_OBJS := $(patsubst %.c,%.o,$(C_SRC))
+CC_OBJS := $(patsubst %.cc,%.o,$(CC_SRC))
+CPP_OBJS := $(patsubst %.cpp,%.o,$(CPP_SRC))
+
+CPPFLAGS += -I$(USER_DIR) -I$(USER_API)
+
+CPP_COMP = -O3 -xcore-avx512 -restrict -g -fasm-blocks
+
+# House-keeping build targets.
+all : echo_start_build $(TESTS)
+
+clean :
+ @echo [CLEAN]
+ rm -f $(TESTS) *.o $(COMMON_TEST_DIR)/*.o $(USER_DIR)/*.o $(USER_ETH)/*.o
+
+.PHONY : echo_start_build
+echo_start_build :
+ @echo Build Tests with
+ @echo $(USER_DIR)
+ @echo $(USER_API)
+
+$(CC_OBJS) :
+ @echo "[CC] $@"
+ @$(CXX) -c $(CPPFLAGS) $(CXXFLAGS) -o"$@" $(patsubst %.o,%.cc,$@)
+
+$(CPP_OBJS) :
+ @echo "[CPP] $@"
+ @$(CXX) -c $(CPPFLAGS) $(CXXFLAGS) $(CPP_COMP) -o"$@" $(patsubst %.o,%.cpp,$@)
+
+$(C_OBJS) :
+ @echo "[C] $@"
+ @$(CC) -c $(CFLAGS) -o"$@" $(patsubst %.o,%.c,$@)
+
+unittests : $(CC_OBJS) $(CPP_OBJS) $(C_OBJS) $(GTEST_ROOT)/libgtest.a
+ @echo "[LD] $@"
+ $(CXX) $(CPPFLAGS) $(CXXFLAGS) -L$(MLOG_DIR)/bin -Wl, $(RTE_LIBS) -lpthread -lnuma $^ -o $@
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-\r
-#include "common.hpp"\r
-#include "xran_lib_wrap.hpp"\r
-#include "xran_common.h"\r
-#include "xran_fh_o_du.h"\r
-#include "ethdi.h"\r
-#include "ethernet.h"\r
-#include "xran_transport.h"\r
-#include "xran_cp_api.h"\r
-\r
-#include <stdint.h>\r
-\r
-\r
-const std::string module_name = "C-Plane";\r
-\r
-const uint8_t m_bitmask[] = { 0x00, 0x03, 0x07, 0x0f, 0x1f, 0x3f, 0x7f, 0xff };\r
-\r
-extern "C"\r
-{\r
-\r
-/* wrapper function for performace tests to reset mbuf */\r
-int xran_ut_prepare_cp(struct rte_mbuf *mbuf, struct xran_cp_gen_params *params,\r
- uint8_t cc_id, uint8_t ant_id, uint8_t seq_id)\r
-{\r
- rte_pktmbuf_reset(mbuf);\r
- return(xran_prepare_ctrl_pkt(mbuf, params, cc_id, ant_id, seq_id));\r
-}\r
-\r
-\r
-void cput_fh_rx_callback(void *pCallbackTag, xran_status_t status)\r
-{\r
- return;\r
-}\r
-\r
-void cput_fh_rx_prach_callback(void *pCallbackTag, xran_status_t status)\r
-{\r
- rte_pause();\r
-}\r
-\r
-} /* extern "C" */\r
-\r
-\r
-\r
-class C_plane: public KernelTests\r
-{\r
-private:\r
- struct xran_section_gen_info *m_pSectGenInfo = NULL;\r
- struct xran_section_gen_info *m_pSectResult = NULL;\r
-\r
-\r
-protected:\r
- int m_maxSections = 8; /* not used */\r
- int m_numSections;\r
-\r
- struct rte_mbuf *m_pTestBuffer;\r
-\r
- struct xran_cp_gen_params m_params;\r
- struct xran_recv_packet_info m_pktInfo;\r
- struct xran_cp_gen_params m_result;\r
-\r
- uint8_t m_dir;\r
- std::string m_dirStr;\r
- uint8_t m_sectionType;\r
-\r
- uint8_t m_ccId, m_antId;\r
- uint8_t m_seqId;\r
- uint8_t m_frameId, m_subframeId, m_slotId;\r
- uint8_t m_symStart, m_symNum;\r
- uint16_t *m_prbStart = NULL, *m_prbNum = NULL;\r
-\r
- uint8_t m_iqWidth, m_compMethod;\r
- uint16_t m_beamId;\r
- uint16_t m_reMask = 0xfff;\r
- uint16_t m_sectionId;\r
- uint8_t m_filterIndex;\r
- uint16_t m_timeOffset;\r
- uint8_t m_fftSize;\r
- uint8_t m_scs;\r
- uint16_t m_cpLength;\r
- int m_freqOffset;\r
-\r
- uint16_t m_ext1_dst_len = 0;\r
- int8_t *m_p_ext1_dst = NULL;\r
- int16_t *m_p_bfw_iq_src = NULL;\r
-\r
- struct xran_sectionext1_info m_ext1;\r
- struct xran_sectionext2_info m_ext2;\r
- struct xran_sectionext4_info m_ext4;\r
- struct xran_sectionext5_info m_ext5;\r
-\r
- int16_t m_bfwIQ[XRAN_MAX_BFW_N*2];\r
-\r
-\r
- void SetUp() override\r
- {\r
- int i, j;\r
-\r
- init_test("C_Plane");\r
-\r
- m_numSections = get_input_parameter<int>("num_sections");\r
- ASSERT_FALSE(m_numSections == 0);\r
-\r
- m_dirStr = get_input_parameter<std::string>("direction");\r
-\r
- if(!m_dirStr.compare("DL")) m_dir = XRAN_DIR_DL;\r
- else if(!m_dirStr.compare("UL")) m_dir = XRAN_DIR_UL;\r
- else FAIL() << "Invalid direction!";\r
-\r
- m_sectionType = get_input_parameter<uint8_t>("section_type");\r
- m_ccId = get_input_parameter<uint8_t>("cc_id");\r
- m_antId = get_input_parameter<uint8_t>("ant_id");\r
- m_seqId = get_input_parameter<uint16_t>("seq_id");\r
-\r
- m_frameId = get_input_parameter<uint8_t>("frame_id");\r
- m_subframeId = get_input_parameter<uint8_t>("subframe_id");\r
- m_slotId = get_input_parameter<uint8_t>("slot_id");\r
- m_symStart = get_input_parameter<uint8_t>("symbol_start");\r
- m_compMethod = get_input_parameter<uint8_t>("comp_method");\r
- m_iqWidth = get_input_parameter<uint8_t>("iq_width");\r
-\r
- m_sectionId = get_input_parameter<uint8_t>("section_id");\r
- m_symNum = get_input_parameter<uint8_t>("symbol_num");\r
- m_beamId = get_input_parameter<uint16_t>("beam_id");\r
-\r
- /* reading configurations of start prb and the number of prbs */\r
- std::vector<int> prbstart = get_input_parameter<std::vector<int>>("prb_start");\r
- std::vector<int> prbnum = get_input_parameter<std::vector<int>>("prb_num");\r
- /* number of sections and the pair of start/number of prb shall be matched */\r
- ASSERT_TRUE((m_numSections == prbstart.size())\r
- && (m_numSections == prbnum.size())\r
- && (prbstart.size() == prbnum.size()));\r
-\r
- m_prbStart = new uint16_t [m_numSections];\r
- m_prbNum = new uint16_t [m_numSections];\r
- for(i=0; i < m_numSections; i++) {\r
- m_prbStart[i] = prbstart[i];\r
- m_prbNum[i] = prbnum[i];\r
- }\r
-\r
- switch(m_sectionType) {\r
- case XRAN_CP_SECTIONTYPE_1:\r
- m_filterIndex = XRAN_FILTERINDEX_STANDARD;\r
- break;\r
-\r
- case XRAN_CP_SECTIONTYPE_3:\r
- m_filterIndex = get_input_parameter<uint8_t>("filter_index");\r
- m_timeOffset = get_input_parameter<uint16_t>("time_offset");\r
- m_fftSize = get_input_parameter<uint8_t>("fft_size");\r
- m_scs = get_input_parameter<uint8_t>("scs");\r
- m_cpLength = get_input_parameter<uint16_t>("cp_length");\r
- m_freqOffset = get_input_parameter<int>("freq_offset");\r
- break;\r
-\r
- default:\r
- FAIL() << "Invalid Section Type - " << m_sectionType << "\n";\r
- }\r
-\r
- /* allocate and prepare required data storage */\r
- m_pSectGenInfo = new struct xran_section_gen_info [m_numSections];\r
- ASSERT_NE(m_pSectGenInfo, nullptr);\r
- m_params.sections = m_pSectGenInfo;\r
-\r
- m_pSectResult = new struct xran_section_gen_info [m_numSections];\r
- ASSERT_NE(m_pSectResult, nullptr);\r
- m_result.sections = m_pSectResult;\r
-\r
- m_ext1_dst_len = 9600;\r
- m_p_ext1_dst = new int8_t [m_ext1_dst_len];\r
- m_p_bfw_iq_src = new int16_t [9600/2];\r
-\r
- /* allocating an mbuf for packet generatrion */\r
- m_pTestBuffer = xran_ethdi_mbuf_alloc();\r
-\r
- ASSERT_FALSE(m_pTestBuffer == NULL);\r
- }\r
-\r
- void TearDown() override\r
- {\r
- int i, j;\r
-\r
- if(m_pTestBuffer != NULL)\r
- rte_pktmbuf_free(m_pTestBuffer);\r
-\r
- if(m_prbStart)\r
- delete[] m_prbStart;\r
- if(m_prbNum)\r
- delete[] m_prbNum;\r
-\r
- if(m_p_bfw_iq_src)\r
- delete[] m_p_bfw_iq_src;\r
-\r
- if(m_p_ext1_dst)\r
- delete[] m_p_ext1_dst;\r
-\r
- if(m_pSectGenInfo)\r
- delete[] m_pSectGenInfo;\r
-\r
- if(m_pSectResult) {\r
- delete[] m_pSectResult;\r
- }\r
-\r
- }\r
-\r
- int prepare_sections(bool extflag);\r
- int prepare_extensions(int sect_num);\r
- void verify_sections(void);\r
-\r
-};\r
-\r
-\r
-\r
-int C_plane::prepare_extensions(int sect_num)\r
-{\r
- int i, numext;\r
- int N;\r
-\r
-\r
- N = 8;\r
-\r
- // extension 1\r
- m_ext1.bfwNumber = 4*N; // 4 ant, 8 UEs\r
- m_ext1.bfwiqWidth = 16;\r
- m_ext1.bfwCompMeth = XRAN_BFWCOMPMETHOD_NONE;\r
- /* XRAN_BFWCOMPMETHOD_BLKFLOAT\r
- * XRAN_BFWCOMPMETHOD_BLKSCALE\r
- * XRAN_BFWCOMPMETHOD_ULAW\r
- * XRAN_BFWCOMPMETHOD_BEAMSPACE\r
- */\r
- m_ext1.p_bfwIQ = m_bfwIQ;\r
-\r
- switch (m_ext1.bfwCompMeth) {\r
- case XRAN_BFWCOMPMETHOD_BLKFLOAT:\r
- m_ext1.bfwCompParam.exponent = 0xa;\r
- break;\r
- case XRAN_BFWCOMPMETHOD_BLKSCALE:\r
- m_ext1.bfwCompParam.blockScaler = 0xa5;\r
- break;\r
- case XRAN_BFWCOMPMETHOD_ULAW:\r
- m_ext1.bfwCompParam.compBitWidthShift = 0x55;\r
- case XRAN_BFWCOMPMETHOD_BEAMSPACE:\r
- for(i=0; i<N; i++)\r
- m_ext1.bfwCompParam.activeBeamspaceCoeffMask[i] = 0xa0 + i;\r
- break;\r
- }\r
-\r
- for(i=0; i<N*4; i++) {\r
- m_ext1.p_bfwIQ[i*2] = 0xcafe;\r
- m_ext1.p_bfwIQ[i*2+1] = 0xbeef;\r
- }\r
-\r
- // extension 2\r
- m_ext2.bfAzPtWidth = 7;\r
- m_ext2.bfAzPt = 0x55 & m_bitmask[m_ext2.bfAzPtWidth];\r
- m_ext2.bfZePtWidth = 7;\r
- m_ext2.bfZePt = 0xaa & m_bitmask[m_ext2.bfAzPtWidth];\r
- m_ext2.bfAz3ddWidth = 7;\r
- m_ext2.bfAz3dd = 0x5a & m_bitmask[m_ext2.bfAzPtWidth];\r
- m_ext2.bfZe3ddWidth = 7;\r
- m_ext2.bfZe3dd = 0xa5 & m_bitmask[m_ext2.bfAzPtWidth];\r
- m_ext2.bfAzSI = 0x2 & m_bitmask[3];\r
- m_ext2.bfZeSI = 0x5 & m_bitmask[3];\r
-\r
- // extension 4\r
- m_ext4.csf = 1;\r
- m_ext4.modCompScaler = 0x5aa5;\r
-\r
- // extension 5\r
- m_ext5.num_sets = 2;\r
- for(i=0; i<m_ext5.num_sets; i++) {\r
- m_ext5.mc[i].csf = i%2;\r
- m_ext5.mc[i].mcScaleReMask = 0xa5a + i;\r
- m_ext5.mc[i].mcScaleOffset = 0x5a5a + i;\r
- }\r
-\r
- numext = 0;\r
-\r
- m_params.sections[sect_num].exData[numext].type = XRAN_CP_SECTIONEXTCMD_1;\r
- m_params.sections[sect_num].exData[numext].len = sizeof(m_ext1);\r
- m_params.sections[sect_num].exData[numext].data = &m_ext1;\r
- numext++;\r
-\r
- m_params.sections[sect_num].exData[numext].type = XRAN_CP_SECTIONEXTCMD_2;\r
- m_params.sections[sect_num].exData[numext].len = sizeof(m_ext2);\r
- m_params.sections[sect_num].exData[numext].data = &m_ext2;\r
- numext++;\r
-\r
- m_params.sections[sect_num].exData[numext].type = XRAN_CP_SECTIONEXTCMD_4;\r
- m_params.sections[sect_num].exData[numext].len = sizeof(m_ext4);\r
- m_params.sections[sect_num].exData[numext].data = &m_ext4;\r
- numext++;\r
-\r
- m_params.sections[sect_num].exData[numext].type = XRAN_CP_SECTIONEXTCMD_5;\r
- m_params.sections[sect_num].exData[numext].len = sizeof(m_ext5);\r
- m_params.sections[sect_num].exData[numext].data = &m_ext5;\r
- numext++;\r
-\r
- m_params.sections[sect_num].exDataSize = numext;\r
-\r
- return (0);\r
-}\r
-\r
-int C_plane::prepare_sections(bool extflag)\r
-{\r
- int numsec;\r
-\r
-\r
- /* Preparing input data for packet generation */\r
- m_params.dir = m_dir;\r
- m_params.sectionType = m_sectionType;\r
-\r
- m_params.hdr.filterIdx = m_filterIndex;\r
- m_params.hdr.frameId = m_frameId;\r
- m_params.hdr.subframeId = m_subframeId;\r
- m_params.hdr.slotId = m_slotId;\r
- m_params.hdr.startSymId = m_symStart;\r
- m_params.hdr.iqWidth = XRAN_CONVERT_IQWIDTH(m_iqWidth);\r
- m_params.hdr.compMeth = m_compMethod;\r
-\r
- switch(m_sectionType) {\r
- case XRAN_CP_SECTIONTYPE_1:\r
- break;\r
-\r
- case XRAN_CP_SECTIONTYPE_3:\r
- m_params.hdr.timeOffset = m_timeOffset;\r
- m_params.hdr.fftSize = m_fftSize;\r
- m_params.hdr.scs = m_scs;\r
- m_params.hdr.cpLength = m_cpLength;\r
- break;\r
-\r
- default:\r
- return (-1);\r
- }\r
-\r
- for(numsec=0; numsec < m_numSections; numsec++) {\r
- m_params.sections[numsec].info.type = m_params.sectionType; // for database\r
- m_params.sections[numsec].info.startSymId = m_params.hdr.startSymId; // for database\r
- m_params.sections[numsec].info.iqWidth = m_params.hdr.iqWidth; // for database\r
- m_params.sections[numsec].info.compMeth = m_params.hdr.compMeth; // for database\r
- m_params.sections[numsec].info.id = m_sectionId++;\r
- m_params.sections[numsec].info.rb = XRAN_RBIND_EVERY;\r
- m_params.sections[numsec].info.symInc = XRAN_SYMBOLNUMBER_NOTINC;\r
- m_params.sections[numsec].info.startPrbc = m_prbStart[numsec];\r
- m_params.sections[numsec].info.numPrbc = m_prbNum[numsec];\r
- m_params.sections[numsec].info.numSymbol = m_symNum;\r
- m_params.sections[numsec].info.reMask = m_reMask;\r
- m_params.sections[numsec].info.beamId = m_beamId;\r
- switch(m_sectionType) {\r
- case XRAN_CP_SECTIONTYPE_1:\r
- break;\r
-\r
- case XRAN_CP_SECTIONTYPE_3:\r
- m_params.sections[numsec].info.freqOffset = m_freqOffset;\r
- break;\r
-\r
- default:\r
- return (-1);\r
- }\r
-\r
- /* section extension */\r
- if(/*extflag == true*/0) {\r
- m_params.sections[numsec].info.ef = 1;\r
- prepare_extensions(numsec);\r
- }\r
- else {\r
- m_params.sections[numsec].info.ef = 0;\r
- m_params.sections[numsec].exDataSize = 0;\r
- }\r
- }\r
-\r
- m_params.numSections = numsec;\r
-\r
- return (0);\r
-}\r
-\r
-\r
-void C_plane::verify_sections(void)\r
-{\r
- int i,j;\r
-\r
- /* Verify the result */\r
- EXPECT_TRUE(m_result.dir == m_params.dir);\r
- EXPECT_TRUE(m_result.sectionType == m_params.sectionType);\r
-\r
- EXPECT_TRUE(m_result.hdr.filterIdx == m_params.hdr.filterIdx);\r
- EXPECT_TRUE(m_result.hdr.frameId == m_params.hdr.frameId);\r
- EXPECT_TRUE(m_result.hdr.subframeId == m_params.hdr.subframeId);\r
- EXPECT_TRUE(m_result.hdr.slotId == m_params.hdr.slotId);\r
- EXPECT_TRUE(m_result.hdr.startSymId == m_params.hdr.startSymId);\r
- EXPECT_TRUE(m_result.hdr.iqWidth == m_params.hdr.iqWidth);\r
- EXPECT_TRUE(m_result.hdr.compMeth == m_params.hdr.compMeth);\r
-\r
- switch(m_sectionType) {\r
- case XRAN_CP_SECTIONTYPE_1:\r
- break;\r
-\r
- case XRAN_CP_SECTIONTYPE_3:\r
- EXPECT_TRUE(m_result.hdr.fftSize == m_params.hdr.fftSize);\r
- EXPECT_TRUE(m_result.hdr.scs == m_params.hdr.scs);\r
- EXPECT_TRUE(m_result.hdr.cpLength == m_params.hdr.cpLength);\r
- break;\r
-\r
- default:\r
- FAIL() << "Invalid Section Type - " << m_sectionType << "\n";\r
- }\r
-\r
- ASSERT_TRUE(m_result.numSections == m_params.numSections);\r
- for(i=0; i < m_result.numSections; i++) {\r
- EXPECT_TRUE(m_result.sections[i].info.id == m_params.sections[i].info.id);\r
- EXPECT_TRUE(m_result.sections[i].info.rb == XRAN_RBIND_EVERY);\r
- EXPECT_TRUE(m_result.sections[i].info.symInc == XRAN_SYMBOLNUMBER_NOTINC);\r
- EXPECT_TRUE(m_result.sections[i].info.startPrbc == m_params.sections[i].info.startPrbc);\r
- EXPECT_TRUE(m_result.sections[i].info.numPrbc == m_params.sections[i].info.numPrbc);\r
- EXPECT_TRUE(m_result.sections[i].info.numSymbol == m_params.sections[i].info.numSymbol);\r
- EXPECT_TRUE(m_result.sections[i].info.reMask == m_params.sections[i].info.reMask);\r
- EXPECT_TRUE(m_result.sections[i].info.beamId == m_params.sections[i].info.beamId);\r
- EXPECT_TRUE(m_result.sections[i].info.ef == m_params.sections[i].info.ef);\r
-\r
- switch(m_sectionType) {\r
- case XRAN_CP_SECTIONTYPE_1:\r
- break;\r
-\r
- case XRAN_CP_SECTIONTYPE_3:\r
- EXPECT_TRUE(m_result.sections[i].info.freqOffset == m_params.sections[i].info.freqOffset);\r
- break;\r
-\r
- default:\r
- FAIL() << "Invalid Section Type - " << m_sectionType << "\n";\r
- }\r
-\r
- if(m_params.sections[i].info.ef) {\r
- // printf("[%d] %d == %d\n",i, m_result.sections[i].exDataSize, m_params.sections[i].exDataSize);\r
- EXPECT_TRUE(m_result.sections[i].exDataSize == m_params.sections[i].exDataSize);\r
-\r
- for(j=0; j < m_params.sections[i].exDataSize; j++) {\r
- EXPECT_TRUE(m_result.sections[i].exData[j].type == m_params.sections[i].exData[j].type);\r
-\r
- switch(m_params.sections[i].exData[j].type) {\r
- case XRAN_CP_SECTIONEXTCMD_1:\r
- {\r
- struct xran_sectionext1_info *ext1_params, *ext1_result;\r
- int iq_size, parm_size, N;\r
-\r
- ext1_params = (struct xran_sectionext1_info *)m_params.sections[i].exData[j].data;\r
- ext1_result = (struct xran_sectionext1_info *)m_result.sections[i].exData[j].data;\r
-\r
- EXPECT_TRUE(ext1_result->bfwiqWidth == ext1_params->bfwiqWidth);\r
- EXPECT_TRUE(ext1_result->bfwCompMeth == ext1_params->bfwCompMeth);\r
-\r
- N = ext1_params->bfwNumber;\r
- switch(ext1_params->bfwCompMeth) {\r
- case XRAN_BFWCOMPMETHOD_BLKFLOAT:\r
- EXPECT_TRUE(ext1_result->bfwCompParam.exponent == ext1_params->bfwCompParam.exponent);\r
- break;\r
-\r
- case XRAN_BFWCOMPMETHOD_BLKSCALE:\r
- EXPECT_TRUE(ext1_result->bfwCompParam.blockScaler == ext1_params->bfwCompParam.blockScaler);\r
- break;\r
-\r
- case XRAN_BFWCOMPMETHOD_ULAW:\r
- EXPECT_TRUE(ext1_result->bfwCompParam.compBitWidthShift == ext1_params->bfwCompParam.compBitWidthShift);\r
- break;\r
-\r
- case XRAN_BFWCOMPMETHOD_BEAMSPACE:\r
- parm_size = N>>3; if(N%8) parm_size++; parm_size *= 8;\r
- EXPECT_TRUE(std::memcmp(ext1_result->bfwCompParam.activeBeamspaceCoeffMask, ext1_params->bfwCompParam.activeBeamspaceCoeffMask, parm_size));\r
- break;\r
- }\r
-\r
- /* Get the number of BF weights */\r
- iq_size = N*ext1_params->bfwiqWidth*2; // total in bits\r
- parm_size = iq_size>>3; // total in bytes (/8)\r
- if(iq_size%8) parm_size++; // round up\r
- EXPECT_TRUE(std::memcmp(ext1_result->p_bfwIQ, ext1_params->p_bfwIQ, parm_size));\r
-\r
- }\r
- break;\r
-\r
- case XRAN_CP_SECTIONEXTCMD_2:\r
- {\r
- struct xran_sectionext2_info *ext2_params, *ext2_result;\r
-\r
- ext2_params = (struct xran_sectionext2_info *)m_params.sections[i].exData[j].data;\r
- ext2_result = (struct xran_sectionext2_info *)m_result.sections[i].exData[j].data;\r
-\r
- if(ext2_params->bfAzPtWidth) {\r
- EXPECT_TRUE(ext2_result->bfAzPtWidth == ext2_params->bfAzPtWidth);\r
- EXPECT_TRUE(ext2_result->bfAzPt == ext2_params->bfAzPt);\r
- }\r
-\r
- if(ext2_params->bfZePtWidth) {\r
- EXPECT_TRUE(ext2_result->bfZePtWidth == ext2_params->bfZePtWidth);\r
- EXPECT_TRUE(ext2_result->bfZePt == ext2_params->bfZePt);\r
- }\r
- if(ext2_params->bfAz3ddWidth) {\r
- EXPECT_TRUE(ext2_result->bfAz3ddWidth == ext2_params->bfAz3ddWidth);\r
- EXPECT_TRUE(ext2_result->bfAz3dd == ext2_params->bfAz3dd);\r
- }\r
- if(ext2_params->bfZe3ddWidth) {\r
- EXPECT_TRUE(ext2_result->bfZe3ddWidth == ext2_params->bfZe3ddWidth);\r
- EXPECT_TRUE(ext2_result->bfZe3dd == ext2_params->bfZe3dd);\r
- }\r
-\r
- EXPECT_TRUE(ext2_result->bfAzSI == ext2_params->bfAzSI);\r
- EXPECT_TRUE(ext2_result->bfZeSI == ext2_params->bfZeSI);\r
- }\r
- break;\r
-\r
- case XRAN_CP_SECTIONEXTCMD_4:\r
- {\r
- struct xran_sectionext4_info *ext4_params, *ext4_result;\r
-\r
- ext4_params = (struct xran_sectionext4_info *)m_params.sections[i].exData[j].data;\r
- ext4_result = (struct xran_sectionext4_info *)m_result.sections[i].exData[j].data;\r
-\r
- EXPECT_TRUE(ext4_result->csf == ext4_params->csf);\r
- EXPECT_TRUE(ext4_result->modCompScaler == ext4_params->modCompScaler);\r
- }\r
- break;\r
- case XRAN_CP_SECTIONEXTCMD_5:\r
- {\r
- struct xran_sectionext5_info *ext5_params, *ext5_result;\r
- int idx;\r
-\r
- ext5_params = (struct xran_sectionext5_info *)m_params.sections[i].exData[j].data;\r
- ext5_result = (struct xran_sectionext5_info *)m_result.sections[i].exData[j].data;\r
-\r
- EXPECT_TRUE(ext5_result->num_sets == ext5_params->num_sets);\r
- for(idx=0; idx < ext5_params->num_sets; idx++) {\r
- EXPECT_TRUE(ext5_result->mc[idx].csf == ext5_params->mc[idx].csf);\r
- EXPECT_TRUE(ext5_result->mc[idx].mcScaleReMask == ext5_params->mc[idx].mcScaleReMask);\r
- EXPECT_TRUE(ext5_result->mc[idx].mcScaleOffset == ext5_params->mc[idx].mcScaleOffset);\r
- }\r
- }\r
- break;\r
- }\r
- }\r
- }\r
- }\r
-\r
- return;\r
-}\r
-\r
-\r
-/***************************************************************************\r
- * Functional Test cases\r
- ***************************************************************************/\r
-\r
-TEST_P(C_plane, Section_Ext1)\r
-{\r
- int i = 0, idRb;\r
- int32_t len = 0;\r
- int16_t *ptr = NULL;\r
- int32_t nRbs = 36;\r
- int32_t nAntElm = 32;\r
- int8_t iqWidth = 16;\r
- int8_t compMethod = XRAN_COMPMETHOD_NONE;\r
- int8_t *p_ext1_dst = NULL;\r
- int16_t *bfw_payload = NULL;\r
- int32_t expected_len = (3+1)*nRbs + nAntElm*nRbs*4;\r
-\r
- struct xran_section_gen_info* loc_pSectGenInfo = m_params.sections;\r
- struct xran_sectionext1_info m_ext1;\r
- struct xran_cp_radioapp_section_ext1 *p_ext1;\r
-\r
- /* Configure section information */\r
- if(prepare_sections(false) < 0) {\r
- FAIL() << "Invalid Section configuration\n";\r
- }\r
- ptr = m_p_bfw_iq_src;\r
-\r
- for (idRb =0; idRb < nRbs*nAntElm*2; idRb++){\r
- ptr[idRb] = i;\r
- i++;\r
- }\r
-\r
- len = xran_cp_populate_section_ext_1(m_p_ext1_dst,\r
- m_ext1_dst_len,\r
- m_p_bfw_iq_src,\r
- nRbs,\r
- nAntElm,\r
- iqWidth,\r
- compMethod);\r
-\r
- ASSERT_TRUE(len == expected_len);\r
-\r
- p_ext1_dst = m_p_ext1_dst;\r
- idRb = 0;\r
- do {\r
- p_ext1 = (struct xran_cp_radioapp_section_ext1 *)p_ext1_dst;\r
- bfw_payload = (int16_t*)(p_ext1+1);\r
- p_ext1_dst += p_ext1->extLen*XRAN_SECTIONEXT_ALIGN;\r
- idRb++;\r
- }while(p_ext1->ef != XRAN_EF_F_LAST);\r
-\r
- ASSERT_TRUE(idRb == nRbs);\r
-\r
- /* Update section information */\r
- memset(&m_ext1, 0, sizeof (struct xran_sectionext1_info));\r
- m_ext1.bfwNumber = nAntElm;\r
- m_ext1.bfwiqWidth = iqWidth;\r
- m_ext1.bfwCompMeth = compMethod;\r
- m_ext1.p_bfwIQ = (int16_t*)m_p_ext1_dst;\r
- m_ext1.bfwIQ_sz = len;\r
-\r
- loc_pSectGenInfo->exData[0].type = XRAN_CP_SECTIONEXTCMD_1;\r
- loc_pSectGenInfo->exData[0].len = sizeof(m_ext1);\r
- loc_pSectGenInfo->exData[0].data = &m_ext1;\r
-\r
- loc_pSectGenInfo->info.ef = 1;\r
- loc_pSectGenInfo->exDataSize = 1;\r
-\r
- m_params.numSections = 1;\r
-\r
- /* Generating C-Plane packet */\r
- ASSERT_TRUE(xran_prepare_ctrl_pkt(m_pTestBuffer, &m_params, m_ccId, m_antId, m_seqId) == XRAN_STATUS_SUCCESS);\r
-\r
- /* Parsing generated packet */\r
- EXPECT_TRUE(xran_parse_cp_pkt(m_pTestBuffer, &m_result, &m_pktInfo) == XRAN_STATUS_SUCCESS);\r
-\r
- /* Verify the result */\r
- //verify_sections();\r
-}\r
-\r
-TEST_P(C_plane, Section_Ext1_9bit)\r
-{\r
- int i = 0, idRb;\r
- int32_t len = 0;\r
- int16_t *ptr = NULL;\r
- int32_t nRbs = 36;\r
- int32_t nAntElm = 32;\r
- int8_t iqWidth = 9;\r
- int8_t compMethod = XRAN_COMPMETHOD_BLKFLOAT;\r
- int8_t *p_ext1_dst = NULL;\r
- int16_t *bfw_payload = NULL;\r
- int32_t expected_len = ((nAntElm/16*4*iqWidth)+1)*nRbs + /* bfwCompParam + IQ = */\r
- sizeof(struct xran_cp_radioapp_section_ext1)*nRbs; /* ext1 Headers */\r
-\r
- struct xran_section_gen_info* loc_pSectGenInfo = m_params.sections;\r
- struct xran_sectionext1_info m_ext1;\r
- struct xran_cp_radioapp_section_ext1 *p_ext1;\r
-\r
- /* Configure section information */\r
- if(prepare_sections(false) < 0) {\r
- FAIL() << "Invalid Section configuration\n";\r
- }\r
- ptr = m_p_bfw_iq_src;\r
-\r
- for (idRb =0; idRb < nRbs*nAntElm*2; idRb++){\r
- ptr[idRb] = i;\r
- i++;\r
- }\r
-\r
- len = xran_cp_populate_section_ext_1(m_p_ext1_dst,\r
- m_ext1_dst_len,\r
- m_p_bfw_iq_src,\r
- nRbs,\r
- nAntElm,\r
- iqWidth,\r
- compMethod);\r
-\r
- ASSERT_TRUE(len == expected_len);\r
-\r
- p_ext1_dst = m_p_ext1_dst;\r
- idRb = 0;\r
- do {\r
- p_ext1 = (struct xran_cp_radioapp_section_ext1 *)p_ext1_dst;\r
- bfw_payload = (int16_t*)(p_ext1+1);\r
- p_ext1_dst += p_ext1->extLen*XRAN_SECTIONEXT_ALIGN;\r
- idRb++;\r
- }while(p_ext1->ef != XRAN_EF_F_LAST);\r
-\r
- ASSERT_TRUE(idRb == nRbs);\r
-\r
- /* Update section information */\r
- memset(&m_ext1, 0, sizeof (struct xran_sectionext1_info));\r
- m_ext1.bfwNumber = nAntElm;\r
- m_ext1.bfwiqWidth = iqWidth;\r
- m_ext1.bfwCompMeth = compMethod;\r
- m_ext1.p_bfwIQ = (int16_t*)m_p_ext1_dst;\r
- m_ext1.bfwIQ_sz = len;\r
-\r
- loc_pSectGenInfo->exData[0].type = XRAN_CP_SECTIONEXTCMD_1;\r
- loc_pSectGenInfo->exData[0].len = sizeof(m_ext1);\r
- loc_pSectGenInfo->exData[0].data = &m_ext1;\r
-\r
- loc_pSectGenInfo->info.ef = 1;\r
- loc_pSectGenInfo->exDataSize = 1;\r
-\r
- m_params.numSections = 1;\r
-\r
- /* Generating C-Plane packet */\r
- ASSERT_TRUE(xran_prepare_ctrl_pkt(m_pTestBuffer, &m_params, m_ccId, m_antId, m_seqId) == XRAN_STATUS_SUCCESS);\r
-\r
- /* Parsing generated packet */\r
- EXPECT_TRUE(xran_parse_cp_pkt(m_pTestBuffer, &m_result, &m_pktInfo) == XRAN_STATUS_SUCCESS);\r
-\r
- /* Verify the result */\r
- //verify_sections();\r
-}\r
-\r
-\r
-\r
-TEST_P(C_plane, PacketGen)\r
-{\r
- int i;\r
-\r
-\r
- /* Configure section information */\r
- if(prepare_sections(false) < 0) {\r
- FAIL() << "Invalid Section configuration\n";\r
- }\r
-\r
- /* Generating C-Plane packet */\r
- ASSERT_TRUE(xran_prepare_ctrl_pkt(m_pTestBuffer, &m_params, m_ccId, m_antId, m_seqId) == XRAN_STATUS_SUCCESS);\r
-\r
- /* Parsing generated packet */\r
- EXPECT_TRUE(xran_parse_cp_pkt(m_pTestBuffer, &m_result, &m_pktInfo) == XRAN_STATUS_SUCCESS);\r
-\r
- /* Verify the result */\r
- verify_sections();\r
-}\r
-\r
-\r
-TEST_P(C_plane, PacketGen_Ext)\r
-{\r
- int i;\r
-\r
-\r
- /* Configure section information */\r
- if(prepare_sections(true) < 0) {\r
- FAIL() << "Invalid Section configuration\n";\r
- }\r
-\r
- /* Generating C-Plane packet */\r
- ASSERT_TRUE(xran_prepare_ctrl_pkt(m_pTestBuffer, &m_params, m_ccId, m_antId, m_seqId) == XRAN_STATUS_SUCCESS);\r
-\r
- /* Parsing generated packet */\r
- EXPECT_TRUE(xran_parse_cp_pkt(m_pTestBuffer, &m_result, &m_pktInfo) == XRAN_STATUS_SUCCESS);\r
-\r
- /* Verify the result */\r
- verify_sections();\r
-}\r
-\r
-\r
-/***************************************************************************\r
- * Performance Test cases\r
- ***************************************************************************/\r
-TEST_P(C_plane, Perf)\r
-{\r
- /* Configure section information */\r
- if(prepare_sections(false) < 0) {\r
- FAIL() << "Invalid Section configuration\n";\r
- }\r
-\r
- /* using wrapper function to reset mbuf */\r
- performance("C", module_name,\r
- &xran_ut_prepare_cp, m_pTestBuffer, &m_params, m_ccId, m_antId, m_seqId);\r
-}\r
-\r
-TEST_P(C_plane, Perf_Ext)\r
-{\r
- /* Configure section information */\r
- if(prepare_sections(true) < 0) {\r
- FAIL() << "Invalid Section configuration\n";\r
- }\r
-\r
- /* using wrapper function to reset mbuf */\r
- performance("C", module_name,\r
- &xran_ut_prepare_cp, m_pTestBuffer, &m_params, m_ccId, m_antId, m_seqId);\r
-}\r
-\r
-\r
-INSTANTIATE_TEST_CASE_P(UnitTest, C_plane,\r
- testing::ValuesIn(get_sequence(C_plane::get_number_of_cases("C_Plane"))));\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+
+#include "common.hpp"
+#include "xran_lib_wrap.hpp"
+#include "xran_common.h"
+#include "xran_fh_o_du.h"
+#include "ethdi.h"
+#include "ethernet.h"
+#include "xran_transport.h"
+#include "xran_cp_api.h"
+
+#include <stdint.h>
+
+
+const std::string module_name = "C-Plane";
+
+const uint8_t m_bitmask[] = { 0x00, 0x03, 0x07, 0x0f, 0x1f, 0x3f, 0x7f, 0xff };
+
+extern "C"
+{
+
+/* wrapper function for performace tests to reset mbuf */
+int xran_ut_prepare_cp(struct rte_mbuf *mbuf, struct xran_cp_gen_params *params,
+ uint8_t cc_id, uint8_t ant_id, uint8_t seq_id)
+{
+ rte_pktmbuf_reset(mbuf);
+ return(xran_prepare_ctrl_pkt(mbuf, params, cc_id, ant_id, seq_id));
+}
+
+
+void cput_fh_rx_callback(void *pCallbackTag, xran_status_t status)
+{
+ return;
+}
+
+void cput_fh_rx_prach_callback(void *pCallbackTag, xran_status_t status)
+{
+ rte_pause();
+}
+
+} /* extern "C" */
+
+
+
+class C_plane: public KernelTests
+{
+private:
+ struct xran_section_gen_info *m_pSectGenInfo = NULL;
+ struct xran_section_gen_info *m_pSectResult = NULL;
+
+
+protected:
+ int m_maxSections = 8; /* not used */
+ int m_numSections;
+
+ struct rte_mbuf *m_pTestBuffer;
+
+ struct xran_cp_gen_params m_params;
+ struct xran_recv_packet_info m_pktInfo;
+ struct xran_cp_gen_params m_result;
+
+ uint8_t m_dir;
+ std::string m_dirStr;
+ uint8_t m_sectionType;
+
+ uint8_t m_ccId, m_antId;
+ uint8_t m_seqId;
+ uint8_t m_frameId, m_subframeId, m_slotId;
+ uint8_t m_symStart, m_symNum;
+ uint16_t *m_prbStart = NULL, *m_prbNum = NULL;
+
+ uint8_t m_iqWidth, m_compMethod;
+ uint16_t m_beamId;
+ uint16_t m_reMask = 0xfff;
+ uint16_t m_sectionId;
+ uint8_t m_filterIndex;
+ uint16_t m_timeOffset;
+ uint8_t m_fftSize;
+ uint8_t m_scs;
+ uint16_t m_cpLength;
+ int m_freqOffset;
+
+ uint16_t m_ext1_dst_len = 0;
+ int8_t *m_p_ext1_dst = NULL;
+ int16_t *m_p_bfw_iq_src = NULL;
+
+ struct xran_sectionext1_info m_ext1;
+ struct xran_sectionext2_info m_ext2;
+ struct xran_sectionext4_info m_ext4;
+ struct xran_sectionext5_info m_ext5;
+
+ int16_t m_bfwIQ[XRAN_MAX_BFW_N*2];
+
+
+ void SetUp() override
+ {
+ int i, j;
+
+ init_test("C_Plane");
+
+ m_numSections = get_input_parameter<int>("num_sections");
+ ASSERT_FALSE(m_numSections == 0);
+
+ m_dirStr = get_input_parameter<std::string>("direction");
+
+ if(!m_dirStr.compare("DL")) m_dir = XRAN_DIR_DL;
+ else if(!m_dirStr.compare("UL")) m_dir = XRAN_DIR_UL;
+ else FAIL() << "Invalid direction!";
+
+ m_sectionType = get_input_parameter<uint8_t>("section_type");
+ m_ccId = get_input_parameter<uint8_t>("cc_id");
+ m_antId = get_input_parameter<uint8_t>("ant_id");
+ m_seqId = get_input_parameter<uint16_t>("seq_id");
+
+ m_frameId = get_input_parameter<uint8_t>("frame_id");
+ m_subframeId = get_input_parameter<uint8_t>("subframe_id");
+ m_slotId = get_input_parameter<uint8_t>("slot_id");
+ m_symStart = get_input_parameter<uint8_t>("symbol_start");
+ m_compMethod = get_input_parameter<uint8_t>("comp_method");
+ m_iqWidth = get_input_parameter<uint8_t>("iq_width");
+
+ m_sectionId = get_input_parameter<uint8_t>("section_id");
+ m_symNum = get_input_parameter<uint8_t>("symbol_num");
+ m_beamId = get_input_parameter<uint16_t>("beam_id");
+
+ /* reading configurations of start prb and the number of prbs */
+ std::vector<int> prbstart = get_input_parameter<std::vector<int>>("prb_start");
+ std::vector<int> prbnum = get_input_parameter<std::vector<int>>("prb_num");
+ /* number of sections and the pair of start/number of prb shall be matched */
+ ASSERT_TRUE((m_numSections == prbstart.size())
+ && (m_numSections == prbnum.size())
+ && (prbstart.size() == prbnum.size()));
+
+ m_prbStart = new uint16_t [m_numSections];
+ m_prbNum = new uint16_t [m_numSections];
+ for(i=0; i < m_numSections; i++) {
+ m_prbStart[i] = prbstart[i];
+ m_prbNum[i] = prbnum[i];
+ }
+
+ switch(m_sectionType) {
+ case XRAN_CP_SECTIONTYPE_1:
+ m_filterIndex = XRAN_FILTERINDEX_STANDARD;
+ break;
+
+ case XRAN_CP_SECTIONTYPE_3:
+ m_filterIndex = get_input_parameter<uint8_t>("filter_index");
+ m_timeOffset = get_input_parameter<uint16_t>("time_offset");
+ m_fftSize = get_input_parameter<uint8_t>("fft_size");
+ m_scs = get_input_parameter<uint8_t>("scs");
+ m_cpLength = get_input_parameter<uint16_t>("cp_length");
+ m_freqOffset = get_input_parameter<int>("freq_offset");
+ break;
+
+ default:
+ FAIL() << "Invalid Section Type - " << m_sectionType << "\n";
+ }
+
+ /* allocate and prepare required data storage */
+ m_pSectGenInfo = new struct xran_section_gen_info [m_numSections];
+ ASSERT_NE(m_pSectGenInfo, nullptr);
+ m_params.sections = m_pSectGenInfo;
+
+ m_pSectResult = new struct xran_section_gen_info [m_numSections];
+ ASSERT_NE(m_pSectResult, nullptr);
+ m_result.sections = m_pSectResult;
+
+ m_ext1_dst_len = 9600;
+ m_p_ext1_dst = new int8_t [m_ext1_dst_len];
+ m_p_bfw_iq_src = new int16_t [9600/2];
+
+ /* allocating an mbuf for packet generatrion */
+ m_pTestBuffer = xran_ethdi_mbuf_alloc();
+
+ ASSERT_FALSE(m_pTestBuffer == NULL);
+ }
+
+ void TearDown() override
+ {
+ int i, j;
+
+ if(m_pTestBuffer != NULL)
+ rte_pktmbuf_free(m_pTestBuffer);
+
+ if(m_prbStart)
+ delete[] m_prbStart;
+ if(m_prbNum)
+ delete[] m_prbNum;
+
+ if(m_p_bfw_iq_src)
+ delete[] m_p_bfw_iq_src;
+
+ if(m_p_ext1_dst)
+ delete[] m_p_ext1_dst;
+
+ if(m_pSectGenInfo)
+ delete[] m_pSectGenInfo;
+
+ if(m_pSectResult) {
+ delete[] m_pSectResult;
+ }
+
+ }
+
+ int prepare_sections(bool extflag);
+ int prepare_extensions(int sect_num);
+ void verify_sections(void);
+
+};
+
+
+
+int C_plane::prepare_extensions(int sect_num)
+{
+ int i, numext;
+ int N;
+
+
+ N = 8;
+
+ // extension 1
+ m_ext1.bfwNumber = 4*N; // 4 ant, 8 UEs
+ m_ext1.bfwiqWidth = 16;
+ m_ext1.bfwCompMeth = XRAN_BFWCOMPMETHOD_NONE;
+ /* XRAN_BFWCOMPMETHOD_BLKFLOAT
+ * XRAN_BFWCOMPMETHOD_BLKSCALE
+ * XRAN_BFWCOMPMETHOD_ULAW
+ * XRAN_BFWCOMPMETHOD_BEAMSPACE
+ */
+ m_ext1.p_bfwIQ = m_bfwIQ;
+
+ switch (m_ext1.bfwCompMeth) {
+ case XRAN_BFWCOMPMETHOD_BLKFLOAT:
+ m_ext1.bfwCompParam.exponent = 0xa;
+ break;
+ case XRAN_BFWCOMPMETHOD_BLKSCALE:
+ m_ext1.bfwCompParam.blockScaler = 0xa5;
+ break;
+ case XRAN_BFWCOMPMETHOD_ULAW:
+ m_ext1.bfwCompParam.compBitWidthShift = 0x55;
+ case XRAN_BFWCOMPMETHOD_BEAMSPACE:
+ for(i=0; i<N; i++)
+ m_ext1.bfwCompParam.activeBeamspaceCoeffMask[i] = 0xa0 + i;
+ break;
+ }
+
+ for(i=0; i<N*4; i++) {
+ m_ext1.p_bfwIQ[i*2] = 0xcafe;
+ m_ext1.p_bfwIQ[i*2+1] = 0xbeef;
+ }
+
+ // extension 2
+ m_ext2.bfAzPtWidth = 7;
+ m_ext2.bfAzPt = 0x55 & m_bitmask[m_ext2.bfAzPtWidth];
+ m_ext2.bfZePtWidth = 7;
+ m_ext2.bfZePt = 0xaa & m_bitmask[m_ext2.bfAzPtWidth];
+ m_ext2.bfAz3ddWidth = 7;
+ m_ext2.bfAz3dd = 0x5a & m_bitmask[m_ext2.bfAzPtWidth];
+ m_ext2.bfZe3ddWidth = 7;
+ m_ext2.bfZe3dd = 0xa5 & m_bitmask[m_ext2.bfAzPtWidth];
+ m_ext2.bfAzSI = 0x2 & m_bitmask[3];
+ m_ext2.bfZeSI = 0x5 & m_bitmask[3];
+
+ // extension 4
+ m_ext4.csf = 1;
+ m_ext4.modCompScaler = 0x5aa5;
+
+ // extension 5
+ m_ext5.num_sets = 2;
+ for(i=0; i<m_ext5.num_sets; i++) {
+ m_ext5.mc[i].csf = i%2;
+ m_ext5.mc[i].mcScaleReMask = 0xa5a + i;
+ m_ext5.mc[i].mcScaleOffset = 0x5a5a + i;
+ }
+
+ numext = 0;
+
+ m_params.sections[sect_num].exData[numext].type = XRAN_CP_SECTIONEXTCMD_1;
+ m_params.sections[sect_num].exData[numext].len = sizeof(m_ext1);
+ m_params.sections[sect_num].exData[numext].data = &m_ext1;
+ numext++;
+
+ m_params.sections[sect_num].exData[numext].type = XRAN_CP_SECTIONEXTCMD_2;
+ m_params.sections[sect_num].exData[numext].len = sizeof(m_ext2);
+ m_params.sections[sect_num].exData[numext].data = &m_ext2;
+ numext++;
+
+ m_params.sections[sect_num].exData[numext].type = XRAN_CP_SECTIONEXTCMD_4;
+ m_params.sections[sect_num].exData[numext].len = sizeof(m_ext4);
+ m_params.sections[sect_num].exData[numext].data = &m_ext4;
+ numext++;
+
+ m_params.sections[sect_num].exData[numext].type = XRAN_CP_SECTIONEXTCMD_5;
+ m_params.sections[sect_num].exData[numext].len = sizeof(m_ext5);
+ m_params.sections[sect_num].exData[numext].data = &m_ext5;
+ numext++;
+
+ m_params.sections[sect_num].exDataSize = numext;
+
+ return (0);
+}
+
+int C_plane::prepare_sections(bool extflag)
+{
+ int numsec;
+
+
+ /* Preparing input data for packet generation */
+ m_params.dir = m_dir;
+ m_params.sectionType = m_sectionType;
+
+ m_params.hdr.filterIdx = m_filterIndex;
+ m_params.hdr.frameId = m_frameId;
+ m_params.hdr.subframeId = m_subframeId;
+ m_params.hdr.slotId = m_slotId;
+ m_params.hdr.startSymId = m_symStart;
+ m_params.hdr.iqWidth = XRAN_CONVERT_IQWIDTH(m_iqWidth);
+ m_params.hdr.compMeth = m_compMethod;
+
+ switch(m_sectionType) {
+ case XRAN_CP_SECTIONTYPE_1:
+ break;
+
+ case XRAN_CP_SECTIONTYPE_3:
+ m_params.hdr.timeOffset = m_timeOffset;
+ m_params.hdr.fftSize = m_fftSize;
+ m_params.hdr.scs = m_scs;
+ m_params.hdr.cpLength = m_cpLength;
+ break;
+
+ default:
+ return (-1);
+ }
+
+ for(numsec=0; numsec < m_numSections; numsec++) {
+ m_params.sections[numsec].info.type = m_params.sectionType; // for database
+ m_params.sections[numsec].info.startSymId = m_params.hdr.startSymId; // for database
+ m_params.sections[numsec].info.iqWidth = m_params.hdr.iqWidth; // for database
+ m_params.sections[numsec].info.compMeth = m_params.hdr.compMeth; // for database
+ m_params.sections[numsec].info.id = m_sectionId++;
+ m_params.sections[numsec].info.rb = XRAN_RBIND_EVERY;
+ m_params.sections[numsec].info.symInc = XRAN_SYMBOLNUMBER_NOTINC;
+ m_params.sections[numsec].info.startPrbc = m_prbStart[numsec];
+ m_params.sections[numsec].info.numPrbc = m_prbNum[numsec];
+ m_params.sections[numsec].info.numSymbol = m_symNum;
+ m_params.sections[numsec].info.reMask = m_reMask;
+ m_params.sections[numsec].info.beamId = m_beamId;
+ switch(m_sectionType) {
+ case XRAN_CP_SECTIONTYPE_1:
+ break;
+
+ case XRAN_CP_SECTIONTYPE_3:
+ m_params.sections[numsec].info.freqOffset = m_freqOffset;
+ break;
+
+ default:
+ return (-1);
+ }
+
+ /* section extension */
+ if(/*extflag == true*/0) {
+ m_params.sections[numsec].info.ef = 1;
+ prepare_extensions(numsec);
+ }
+ else {
+ m_params.sections[numsec].info.ef = 0;
+ m_params.sections[numsec].exDataSize = 0;
+ }
+ }
+
+ m_params.numSections = numsec;
+
+ return (0);
+}
+
+
+void C_plane::verify_sections(void)
+{
+ int i,j;
+
+ /* Verify the result */
+ EXPECT_TRUE(m_result.dir == m_params.dir);
+ EXPECT_TRUE(m_result.sectionType == m_params.sectionType);
+
+ EXPECT_TRUE(m_result.hdr.filterIdx == m_params.hdr.filterIdx);
+ EXPECT_TRUE(m_result.hdr.frameId == m_params.hdr.frameId);
+ EXPECT_TRUE(m_result.hdr.subframeId == m_params.hdr.subframeId);
+ EXPECT_TRUE(m_result.hdr.slotId == m_params.hdr.slotId);
+ EXPECT_TRUE(m_result.hdr.startSymId == m_params.hdr.startSymId);
+ EXPECT_TRUE(m_result.hdr.iqWidth == m_params.hdr.iqWidth);
+ EXPECT_TRUE(m_result.hdr.compMeth == m_params.hdr.compMeth);
+
+ switch(m_sectionType) {
+ case XRAN_CP_SECTIONTYPE_1:
+ break;
+
+ case XRAN_CP_SECTIONTYPE_3:
+ EXPECT_TRUE(m_result.hdr.fftSize == m_params.hdr.fftSize);
+ EXPECT_TRUE(m_result.hdr.scs == m_params.hdr.scs);
+ EXPECT_TRUE(m_result.hdr.cpLength == m_params.hdr.cpLength);
+ break;
+
+ default:
+ FAIL() << "Invalid Section Type - " << m_sectionType << "\n";
+ }
+
+ ASSERT_TRUE(m_result.numSections == m_params.numSections);
+ for(i=0; i < m_result.numSections; i++) {
+ EXPECT_TRUE(m_result.sections[i].info.id == m_params.sections[i].info.id);
+ EXPECT_TRUE(m_result.sections[i].info.rb == XRAN_RBIND_EVERY);
+ EXPECT_TRUE(m_result.sections[i].info.symInc == XRAN_SYMBOLNUMBER_NOTINC);
+ EXPECT_TRUE(m_result.sections[i].info.startPrbc == m_params.sections[i].info.startPrbc);
+ EXPECT_TRUE(m_result.sections[i].info.numPrbc == m_params.sections[i].info.numPrbc);
+ EXPECT_TRUE(m_result.sections[i].info.numSymbol == m_params.sections[i].info.numSymbol);
+ EXPECT_TRUE(m_result.sections[i].info.reMask == m_params.sections[i].info.reMask);
+ EXPECT_TRUE(m_result.sections[i].info.beamId == m_params.sections[i].info.beamId);
+ EXPECT_TRUE(m_result.sections[i].info.ef == m_params.sections[i].info.ef);
+
+ switch(m_sectionType) {
+ case XRAN_CP_SECTIONTYPE_1:
+ break;
+
+ case XRAN_CP_SECTIONTYPE_3:
+ EXPECT_TRUE(m_result.sections[i].info.freqOffset == m_params.sections[i].info.freqOffset);
+ break;
+
+ default:
+ FAIL() << "Invalid Section Type - " << m_sectionType << "\n";
+ }
+
+ if(m_params.sections[i].info.ef) {
+ // printf("[%d] %d == %d\n",i, m_result.sections[i].exDataSize, m_params.sections[i].exDataSize);
+ EXPECT_TRUE(m_result.sections[i].exDataSize == m_params.sections[i].exDataSize);
+
+ for(j=0; j < m_params.sections[i].exDataSize; j++) {
+ EXPECT_TRUE(m_result.sections[i].exData[j].type == m_params.sections[i].exData[j].type);
+
+ switch(m_params.sections[i].exData[j].type) {
+ case XRAN_CP_SECTIONEXTCMD_1:
+ {
+ struct xran_sectionext1_info *ext1_params, *ext1_result;
+ int iq_size, parm_size, N;
+
+ ext1_params = (struct xran_sectionext1_info *)m_params.sections[i].exData[j].data;
+ ext1_result = (struct xran_sectionext1_info *)m_result.sections[i].exData[j].data;
+
+ EXPECT_TRUE(ext1_result->bfwiqWidth == ext1_params->bfwiqWidth);
+ EXPECT_TRUE(ext1_result->bfwCompMeth == ext1_params->bfwCompMeth);
+
+ N = ext1_params->bfwNumber;
+ switch(ext1_params->bfwCompMeth) {
+ case XRAN_BFWCOMPMETHOD_BLKFLOAT:
+ EXPECT_TRUE(ext1_result->bfwCompParam.exponent == ext1_params->bfwCompParam.exponent);
+ break;
+
+ case XRAN_BFWCOMPMETHOD_BLKSCALE:
+ EXPECT_TRUE(ext1_result->bfwCompParam.blockScaler == ext1_params->bfwCompParam.blockScaler);
+ break;
+
+ case XRAN_BFWCOMPMETHOD_ULAW:
+ EXPECT_TRUE(ext1_result->bfwCompParam.compBitWidthShift == ext1_params->bfwCompParam.compBitWidthShift);
+ break;
+
+ case XRAN_BFWCOMPMETHOD_BEAMSPACE:
+ parm_size = N>>3; if(N%8) parm_size++; parm_size *= 8;
+ EXPECT_TRUE(std::memcmp(ext1_result->bfwCompParam.activeBeamspaceCoeffMask, ext1_params->bfwCompParam.activeBeamspaceCoeffMask, parm_size));
+ break;
+ }
+
+ /* Get the number of BF weights */
+ iq_size = N*ext1_params->bfwiqWidth*2; // total in bits
+ parm_size = iq_size>>3; // total in bytes (/8)
+ if(iq_size%8) parm_size++; // round up
+ EXPECT_TRUE(std::memcmp(ext1_result->p_bfwIQ, ext1_params->p_bfwIQ, parm_size));
+
+ }
+ break;
+
+ case XRAN_CP_SECTIONEXTCMD_2:
+ {
+ struct xran_sectionext2_info *ext2_params, *ext2_result;
+
+ ext2_params = (struct xran_sectionext2_info *)m_params.sections[i].exData[j].data;
+ ext2_result = (struct xran_sectionext2_info *)m_result.sections[i].exData[j].data;
+
+ if(ext2_params->bfAzPtWidth) {
+ EXPECT_TRUE(ext2_result->bfAzPtWidth == ext2_params->bfAzPtWidth);
+ EXPECT_TRUE(ext2_result->bfAzPt == ext2_params->bfAzPt);
+ }
+
+ if(ext2_params->bfZePtWidth) {
+ EXPECT_TRUE(ext2_result->bfZePtWidth == ext2_params->bfZePtWidth);
+ EXPECT_TRUE(ext2_result->bfZePt == ext2_params->bfZePt);
+ }
+ if(ext2_params->bfAz3ddWidth) {
+ EXPECT_TRUE(ext2_result->bfAz3ddWidth == ext2_params->bfAz3ddWidth);
+ EXPECT_TRUE(ext2_result->bfAz3dd == ext2_params->bfAz3dd);
+ }
+ if(ext2_params->bfZe3ddWidth) {
+ EXPECT_TRUE(ext2_result->bfZe3ddWidth == ext2_params->bfZe3ddWidth);
+ EXPECT_TRUE(ext2_result->bfZe3dd == ext2_params->bfZe3dd);
+ }
+
+ EXPECT_TRUE(ext2_result->bfAzSI == ext2_params->bfAzSI);
+ EXPECT_TRUE(ext2_result->bfZeSI == ext2_params->bfZeSI);
+ }
+ break;
+
+ case XRAN_CP_SECTIONEXTCMD_4:
+ {
+ struct xran_sectionext4_info *ext4_params, *ext4_result;
+
+ ext4_params = (struct xran_sectionext4_info *)m_params.sections[i].exData[j].data;
+ ext4_result = (struct xran_sectionext4_info *)m_result.sections[i].exData[j].data;
+
+ EXPECT_TRUE(ext4_result->csf == ext4_params->csf);
+ EXPECT_TRUE(ext4_result->modCompScaler == ext4_params->modCompScaler);
+ }
+ break;
+ case XRAN_CP_SECTIONEXTCMD_5:
+ {
+ struct xran_sectionext5_info *ext5_params, *ext5_result;
+ int idx;
+
+ ext5_params = (struct xran_sectionext5_info *)m_params.sections[i].exData[j].data;
+ ext5_result = (struct xran_sectionext5_info *)m_result.sections[i].exData[j].data;
+
+ EXPECT_TRUE(ext5_result->num_sets == ext5_params->num_sets);
+ for(idx=0; idx < ext5_params->num_sets; idx++) {
+ EXPECT_TRUE(ext5_result->mc[idx].csf == ext5_params->mc[idx].csf);
+ EXPECT_TRUE(ext5_result->mc[idx].mcScaleReMask == ext5_params->mc[idx].mcScaleReMask);
+ EXPECT_TRUE(ext5_result->mc[idx].mcScaleOffset == ext5_params->mc[idx].mcScaleOffset);
+ }
+ }
+ break;
+ }
+ }
+ }
+ }
+
+ return;
+}
+
+
+/***************************************************************************
+ * Functional Test cases
+ ***************************************************************************/
+
+TEST_P(C_plane, Section_Ext1)
+{
+ int i = 0, idRb;
+ int32_t len = 0;
+ int16_t *ptr = NULL;
+ int32_t nRbs = 36;
+ int32_t nAntElm = 32;
+ int8_t iqWidth = 16;
+ int8_t compMethod = XRAN_COMPMETHOD_NONE;
+ int8_t *p_ext1_dst = NULL;
+ int16_t *bfw_payload = NULL;
+ int32_t expected_len = (3+1)*nRbs + nAntElm*nRbs*4;
+
+ struct xran_section_gen_info* loc_pSectGenInfo = m_params.sections;
+ struct xran_sectionext1_info m_ext1;
+ struct xran_cp_radioapp_section_ext1 *p_ext1;
+
+ /* Configure section information */
+ if(prepare_sections(false) < 0) {
+ FAIL() << "Invalid Section configuration\n";
+ }
+ ptr = m_p_bfw_iq_src;
+
+ for (idRb =0; idRb < nRbs*nAntElm*2; idRb++){
+ ptr[idRb] = i;
+ i++;
+ }
+
+ len = xran_cp_populate_section_ext_1(m_p_ext1_dst,
+ m_ext1_dst_len,
+ m_p_bfw_iq_src,
+ nRbs,
+ nAntElm,
+ iqWidth,
+ compMethod);
+
+ ASSERT_TRUE(len == expected_len);
+
+ p_ext1_dst = m_p_ext1_dst;
+ idRb = 0;
+ do {
+ p_ext1 = (struct xran_cp_radioapp_section_ext1 *)p_ext1_dst;
+ bfw_payload = (int16_t*)(p_ext1+1);
+ p_ext1_dst += p_ext1->extLen*XRAN_SECTIONEXT_ALIGN;
+ idRb++;
+ }while(p_ext1->ef != XRAN_EF_F_LAST);
+
+ ASSERT_TRUE(idRb == nRbs);
+
+ /* Update section information */
+ memset(&m_ext1, 0, sizeof (struct xran_sectionext1_info));
+ m_ext1.bfwNumber = nAntElm;
+ m_ext1.bfwiqWidth = iqWidth;
+ m_ext1.bfwCompMeth = compMethod;
+ m_ext1.p_bfwIQ = (int16_t*)m_p_ext1_dst;
+ m_ext1.bfwIQ_sz = len;
+
+ loc_pSectGenInfo->exData[0].type = XRAN_CP_SECTIONEXTCMD_1;
+ loc_pSectGenInfo->exData[0].len = sizeof(m_ext1);
+ loc_pSectGenInfo->exData[0].data = &m_ext1;
+
+ loc_pSectGenInfo->info.ef = 1;
+ loc_pSectGenInfo->exDataSize = 1;
+
+ m_params.numSections = 1;
+
+ /* Generating C-Plane packet */
+ ASSERT_TRUE(xran_prepare_ctrl_pkt(m_pTestBuffer, &m_params, m_ccId, m_antId, m_seqId) == XRAN_STATUS_SUCCESS);
+
+ /* Parsing generated packet */
+ EXPECT_TRUE(xran_parse_cp_pkt(m_pTestBuffer, &m_result, &m_pktInfo) == XRAN_STATUS_SUCCESS);
+
+ /* Verify the result */
+ //verify_sections();
+}
+
+TEST_P(C_plane, Section_Ext1_9bit)
+{
+ int i = 0, idRb;
+ int32_t len = 0;
+ int16_t *ptr = NULL;
+ int32_t nRbs = 36;
+ int32_t nAntElm = 32;
+ int8_t iqWidth = 9;
+ int8_t compMethod = XRAN_COMPMETHOD_BLKFLOAT;
+ int8_t *p_ext1_dst = NULL;
+ int16_t *bfw_payload = NULL;
+ int32_t expected_len = ((nAntElm/16*4*iqWidth)+1)*nRbs + /* bfwCompParam + IQ = */
+ sizeof(struct xran_cp_radioapp_section_ext1)*nRbs; /* ext1 Headers */
+
+ struct xran_section_gen_info* loc_pSectGenInfo = m_params.sections;
+ struct xran_sectionext1_info m_ext1;
+ struct xran_cp_radioapp_section_ext1 *p_ext1;
+
+ /* Configure section information */
+ if(prepare_sections(false) < 0) {
+ FAIL() << "Invalid Section configuration\n";
+ }
+ ptr = m_p_bfw_iq_src;
+
+ for (idRb =0; idRb < nRbs*nAntElm*2; idRb++){
+ ptr[idRb] = i;
+ i++;
+ }
+
+ len = xran_cp_populate_section_ext_1(m_p_ext1_dst,
+ m_ext1_dst_len,
+ m_p_bfw_iq_src,
+ nRbs,
+ nAntElm,
+ iqWidth,
+ compMethod);
+
+ ASSERT_TRUE(len == expected_len);
+
+ p_ext1_dst = m_p_ext1_dst;
+ idRb = 0;
+ do {
+ p_ext1 = (struct xran_cp_radioapp_section_ext1 *)p_ext1_dst;
+ bfw_payload = (int16_t*)(p_ext1+1);
+ p_ext1_dst += p_ext1->extLen*XRAN_SECTIONEXT_ALIGN;
+ idRb++;
+ }while(p_ext1->ef != XRAN_EF_F_LAST);
+
+ ASSERT_TRUE(idRb == nRbs);
+
+ /* Update section information */
+ memset(&m_ext1, 0, sizeof (struct xran_sectionext1_info));
+ m_ext1.bfwNumber = nAntElm;
+ m_ext1.bfwiqWidth = iqWidth;
+ m_ext1.bfwCompMeth = compMethod;
+ m_ext1.p_bfwIQ = (int16_t*)m_p_ext1_dst;
+ m_ext1.bfwIQ_sz = len;
+
+ loc_pSectGenInfo->exData[0].type = XRAN_CP_SECTIONEXTCMD_1;
+ loc_pSectGenInfo->exData[0].len = sizeof(m_ext1);
+ loc_pSectGenInfo->exData[0].data = &m_ext1;
+
+ loc_pSectGenInfo->info.ef = 1;
+ loc_pSectGenInfo->exDataSize = 1;
+
+ m_params.numSections = 1;
+
+ /* Generating C-Plane packet */
+ ASSERT_TRUE(xran_prepare_ctrl_pkt(m_pTestBuffer, &m_params, m_ccId, m_antId, m_seqId) == XRAN_STATUS_SUCCESS);
+
+ /* Parsing generated packet */
+ EXPECT_TRUE(xran_parse_cp_pkt(m_pTestBuffer, &m_result, &m_pktInfo) == XRAN_STATUS_SUCCESS);
+
+ /* Verify the result */
+ //verify_sections();
+}
+
+
+
+TEST_P(C_plane, PacketGen)
+{
+ int i;
+
+
+ /* Configure section information */
+ if(prepare_sections(false) < 0) {
+ FAIL() << "Invalid Section configuration\n";
+ }
+
+ /* Generating C-Plane packet */
+ ASSERT_TRUE(xran_prepare_ctrl_pkt(m_pTestBuffer, &m_params, m_ccId, m_antId, m_seqId) == XRAN_STATUS_SUCCESS);
+
+ /* Parsing generated packet */
+ EXPECT_TRUE(xran_parse_cp_pkt(m_pTestBuffer, &m_result, &m_pktInfo) == XRAN_STATUS_SUCCESS);
+
+ /* Verify the result */
+ verify_sections();
+}
+
+
+TEST_P(C_plane, PacketGen_Ext)
+{
+ int i;
+
+
+ /* Configure section information */
+ if(prepare_sections(true) < 0) {
+ FAIL() << "Invalid Section configuration\n";
+ }
+
+ /* Generating C-Plane packet */
+ ASSERT_TRUE(xran_prepare_ctrl_pkt(m_pTestBuffer, &m_params, m_ccId, m_antId, m_seqId) == XRAN_STATUS_SUCCESS);
+
+ /* Parsing generated packet */
+ EXPECT_TRUE(xran_parse_cp_pkt(m_pTestBuffer, &m_result, &m_pktInfo) == XRAN_STATUS_SUCCESS);
+
+ /* Verify the result */
+ verify_sections();
+}
+
+
+/***************************************************************************
+ * Performance Test cases
+ ***************************************************************************/
+TEST_P(C_plane, Perf)
+{
+ /* Configure section information */
+ if(prepare_sections(false) < 0) {
+ FAIL() << "Invalid Section configuration\n";
+ }
+
+ /* using wrapper function to reset mbuf */
+ performance("C", module_name,
+ &xran_ut_prepare_cp, m_pTestBuffer, &m_params, m_ccId, m_antId, m_seqId);
+}
+
+TEST_P(C_plane, Perf_Ext)
+{
+ /* Configure section information */
+ if(prepare_sections(true) < 0) {
+ FAIL() << "Invalid Section configuration\n";
+ }
+
+ /* using wrapper function to reset mbuf */
+ performance("C", module_name,
+ &xran_ut_prepare_cp, m_pTestBuffer, &m_params, m_ccId, m_antId, m_seqId);
+}
+
+
+INSTANTIATE_TEST_CASE_P(UnitTest, C_plane,
+ testing::ValuesIn(get_sequence(C_plane::get_number_of_cases("C_Plane"))));
+
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-\r
-#include "common.hpp"\r
-#include "xran_lib_wrap.hpp"\r
-#include "xran_common.h"\r
-#include "xran_fh_o_du.h"\r
-#include "ethdi.h"\r
-#include "ethernet.h"\r
-#include "xran_transport.h"\r
-#include "xran_cp_api.h"\r
-\r
-#include <stdint.h>\r
-\r
-\r
-\r
-const std::string module_name = "C-Plane";\r
-\r
-const uint8_t m_bitmask[] = { 0x00, 0x03, 0x07, 0x0f, 0x1f, 0x3f, 0x7f, 0xff };\r
-\r
-\r
-extern "C"\r
-{\r
-\r
-/* external functions in xRAN library */\r
-void tx_cp_dl_cb(struct rte_timer *tim, void *arg);\r
-void tx_cp_ul_cb(struct rte_timer *tim, void *arg);\r
-int xran_process_tx_sym(void *arg);\r
-int process_mbuf(struct rte_mbuf *pkt);\r
-\r
-\r
-/* wrapper functions for performace tests */\r
-void xran_ut_tx_cp_dl()\r
-{\r
- xranlib->update_tti();\r
- tx_cp_dl_cb(nullptr, xranlib->get_timer_ctx());\r
-}\r
-\r
-void xran_ut_tx_cp_ul()\r
-{\r
- xranlib->update_tti();\r
- tx_cp_ul_cb(nullptr, xranlib->get_timer_ctx());\r
-}\r
-\r
-void xran_ut_tx_up_dl()\r
-{\r
- xranlib->update_symbol_index();\r
- xran_process_tx_sym(xranlib->get_timer_ctx());\r
-}\r
-\r
-void xran_ut_tx_cpup_dl()\r
-{\r
- xranlib->update_symbol_index();\r
-\r
- if(xranlib->get_symbol_index() == 3)\r
- tx_cp_dl_cb(nullptr, xranlib->get_timer_ctx());\r
-\r
- xran_process_tx_sym(xranlib->get_timer_ctx());\r
-}\r
-\r
-#if 0 /* TBD */\r
-void xran_ut_rx_up_ul()\r
-{\r
- process_mbf(mbuf);\r
-}\r
-#endif\r
-\r
-\r
-/* call back functions */\r
-int send_mbuf_up(struct rte_mbuf *mbuf, uint16_t type)\r
-{\r
- rte_pktmbuf_free(mbuf);\r
- return (1);\r
-}\r
-\r
-int send_mbuf_cp_perf(struct rte_mbuf *mbuf, uint16_t type)\r
-{\r
- rte_pktmbuf_free(mbuf);\r
- return (1);\r
-}\r
-\r
-#if 0 /* TBD */\r
-int send_mbuf_cp(struct rte_mbuf *mbuf, uint16_t type)\r
-{\r
-#if 0\r
- xran_parse_cp_pkt(m_pTestBuffer, &m_result, &m_pktInfo);\r
-\r
- /* Verify the result */\r
- verify_sections();\r
-#else\r
- printf("cp\n");\r
-#endif\r
- return (1);\r
-}\r
-#endif\r
-\r
-void utcp_fh_rx_callback(void *pCallbackTag, xran_status_t status)\r
-{\r
- return;\r
-}\r
-\r
-void utcp_fh_rx_prach_callback(void *pCallbackTag, xran_status_t status)\r
-{\r
- rte_pause();\r
-}\r
-\r
-} /* extern "C" */\r
-\r
-\r
-class TestChain: public KernelTests\r
-{\r
-protected:\r
- struct xran_fh_config m_xranConf;\r
- struct xran_fh_init m_xranInit;\r
-\r
- bool m_bSub6;\r
-\r
-\r
- void SetUp() override\r
- {\r
- int temp;\r
- std::string tmpstr;\r
-\r
-\r
- init_test("TestChain");\r
-\r
- xranlib->get_cfg_fh(&m_xranConf);\r
-\r
- tmpstr = get_input_parameter<std::string>("category");\r
- if(tmpstr == "A")\r
- m_xranConf.ru_conf.xranCat = XRAN_CATEGORY_A;\r
- else if(tmpstr == "B")\r
- m_xranConf.ru_conf.xranCat = XRAN_CATEGORY_B;\r
- else {\r
- std::cout << "*** Invalid RU Category [" << tmpstr << "] !!!" << std::endl;\r
- std::cout << "Set it to Category A... " << std::endl;\r
- m_xranConf.ru_conf.xranCat = XRAN_CATEGORY_A;\r
- }\r
-\r
- m_xranConf.frame_conf.nNumerology = get_input_parameter<int>("mu");\r
- if(m_xranConf.frame_conf.nNumerology > 3) {\r
- std::cout << "*** Invalid Numerology [" << m_xranConf.frame_conf.nNumerology << "] !!!" << std::endl;\r
- m_xranConf.frame_conf.nNumerology = 0;\r
- std::cout << "Set it to " << m_xranConf.frame_conf.nNumerology << "..." << std::endl;\r
- }\r
-\r
- tmpstr = get_input_parameter<std::string>("duplex");\r
- if(tmpstr == "FDD")\r
- m_xranConf.frame_conf.nFrameDuplexType = 0;\r
- else if(tmpstr == "TDD") {\r
- m_xranConf.frame_conf.nFrameDuplexType = 1;\r
-\r
- tmpstr = get_input_parameter<std::string>("slot_config");\r
- temp = xranlib->get_slot_config(tmpstr, &m_xranConf.frame_conf);\r
- }\r
- else {\r
- std::cout << "*** Invalid Duplex type [" << tmpstr << "] !!!" << std::endl;\r
- std::cout << "Set it to FDD... " << std::endl;\r
- m_xranConf.frame_conf.nFrameDuplexType = 0;\r
- }\r
-\r
- m_xranConf.nCC = get_input_parameter<int>("num_cc");\r
- if(m_xranConf.nCC > XRAN_MAX_SECTOR_NR) {\r
- std::cout << "*** Exceeds maximum number of carriers supported [" << m_xranConf.nCC << "] !!!" << std::endl;\r
- m_xranConf.nCC = XRAN_MAX_SECTOR_NR;\r
- std::cout << "Set it to " << m_xranConf.nCC << "..." << std::endl;\r
- }\r
- m_xranConf.neAxc = get_input_parameter<int>("num_eaxc");\r
- if(m_xranConf.neAxc > XRAN_MAX_ANTENNA_NR) {\r
- std::cout << "*** Exceeds maximum number of antenna supported [" << m_xranConf.neAxc << "] !!!" << std::endl;\r
- m_xranConf.neAxc = XRAN_MAX_ANTENNA_NR;\r
- std::cout << "Set it to " << m_xranConf.neAxc << "..." << std::endl;\r
- }\r
-\r
- m_bSub6 = get_input_parameter<bool>("sub6");\r
- temp = get_input_parameter<int>("chbw_dl");\r
- m_xranConf.nDLRBs = xranlib->get_num_rbs(m_xranConf.frame_conf.nNumerology, temp, m_bSub6);\r
- temp = get_input_parameter<int>("chbw_ul");\r
- m_xranConf.nULRBs = xranlib->get_num_rbs(m_xranConf.frame_conf.nNumerology, temp, m_bSub6);\r
-\r
- m_xranConf.nAntElmTRx = get_input_parameter<int>("antelm_trx");\r
- m_xranConf.nDLFftSize = get_input_parameter<int>("fftsize_dl");\r
- m_xranConf.nULFftSize = get_input_parameter<int>("fftsize_ul");\r
-\r
-\r
- m_xranConf.ru_conf.iqWidth = get_input_parameter<int>("iq_width");\r
- m_xranConf.ru_conf.compMeth = get_input_parameter<int>("comp_meth");\r
-\r
-#if 0\r
- temp = get_input_parameter<int>("fft_size");\r
- m_xranConf.ru_conf.fftSize = 0;\r
- while (temp >>= 1)\r
- ++m_xranConf.ru_conf.fftSize;\r
-#endif\r
-\r
- }\r
-\r
- void TearDown() override\r
- {\r
- }\r
-};\r
-\r
-\r
-\r
-\r
-/***************************************************************************\r
- * Performance Test cases\r
- ***************************************************************************/\r
-/* C-Plane DL chain (tx_cp_dl_cb) only */\r
-TEST_P(TestChain, CPlaneDLPerf)\r
-{\r
- xranlib->Init(&m_xranConf);\r
- xranlib->Open(send_mbuf_cp_perf, send_mbuf_up,\r
- (void *)utcp_fh_rx_callback, (void *)utcp_fh_rx_prach_callback);\r
-\r
- performance("C", module_name, xran_ut_tx_cp_dl);\r
-\r
- xranlib->Close();\r
- xranlib->Cleanup();\r
-}\r
-\r
-/* C-Plane UL chain (tx_cp_ul_cb) only */\r
-TEST_P(TestChain, CPlaneULPerf)\r
-{\r
- xranlib->Init(&m_xranConf);\r
- xranlib->Open(send_mbuf_cp_perf, send_mbuf_up,\r
- (void *)utcp_fh_rx_callback, (void *)utcp_fh_rx_prach_callback);\r
-\r
- performance("C", module_name, xran_ut_tx_cp_ul);\r
-\r
- xranlib->Close();\r
- xranlib->Cleanup();\r
-}\r
-\r
-/* U-Plane UL chain (process_tx_sym with disable CP) */\r
-TEST_P(TestChain, UPlaneDLPerf)\r
-{\r
- bool flag_cpen;\r
-\r
- xranlib->Init(&m_xranConf);\r
-\r
- /* save current CP enable flag */\r
- flag_cpen = xranlib->is_cpenable()?true:false;\r
-\r
- /* need to disable CP to make U-Plane work without CP */\r
- xranlib->apply_cpenable(false);\r
- xranlib->Open(send_mbuf_cp_perf, send_mbuf_up,\r
- (void *)utcp_fh_rx_callback, (void *)utcp_fh_rx_prach_callback);\r
-\r
- performance("C", module_name, xran_ut_tx_up_dl);\r
-\r
- xranlib->Close();\r
- xranlib->Cleanup();\r
-\r
- /* restore previous CP enable flag */\r
- xranlib->apply_cpenable(flag_cpen);\r
-}\r
-\r
-/* C-Plane and U-Plane DL chain, U-Plane will be generated by C-Plane config */\r
-TEST_P(TestChain, APlaneDLPerf)\r
-{\r
- bool flag_cpen;\r
-\r
- xranlib->Init(&m_xranConf);\r
-\r
- /* save current CP enable flag */\r
- flag_cpen = xranlib->is_cpenable()?true:false;\r
-\r
- /* Enable CP by force to make UP work by CP's section information */\r
- xranlib->apply_cpenable(true);\r
- xranlib->Open(send_mbuf_cp_perf, send_mbuf_up,\r
- (void *)utcp_fh_rx_callback, (void *)utcp_fh_rx_prach_callback);\r
-\r
- performance("C", module_name, xran_ut_tx_cpup_dl);\r
-\r
- xranlib->Close();\r
- xranlib->Cleanup();\r
-\r
- /* restore previous CP enable flag */\r
- xranlib->apply_cpenable(flag_cpen);\r
-}\r
-\r
-#if 0 /* TBD */\r
-TEST_P(TestChain, UPlaneULPerf)\r
-{\r
-}\r
-#endif\r
-\r
-\r
-INSTANTIATE_TEST_CASE_P(UnitTest, TestChain,\r
- testing::ValuesIn(get_sequence(TestChain::get_number_of_cases("TestChain"))));\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+
+#include "common.hpp"
+#include "xran_lib_wrap.hpp"
+#include "xran_common.h"
+#include "xran_fh_o_du.h"
+#include "ethdi.h"
+#include "ethernet.h"
+#include "xran_transport.h"
+#include "xran_cp_api.h"
+
+#include <stdint.h>
+
+
+
+const std::string module_name = "C-Plane";
+
+const uint8_t m_bitmask[] = { 0x00, 0x03, 0x07, 0x0f, 0x1f, 0x3f, 0x7f, 0xff };
+
+
+extern "C"
+{
+
+/* external functions in xRAN library */
+void tx_cp_dl_cb(struct rte_timer *tim, void *arg);
+void tx_cp_ul_cb(struct rte_timer *tim, void *arg);
+int xran_process_tx_sym(void *arg);
+int process_mbuf(struct rte_mbuf *pkt);
+
+
+/* wrapper functions for performace tests */
+void xran_ut_tx_cp_dl()
+{
+ xranlib->update_tti();
+ tx_cp_dl_cb(nullptr, xranlib->get_timer_ctx());
+}
+
+void xran_ut_tx_cp_ul()
+{
+ xranlib->update_tti();
+ tx_cp_ul_cb(nullptr, xranlib->get_timer_ctx());
+}
+
+void xran_ut_tx_up_dl()
+{
+ xranlib->update_symbol_index();
+ xran_process_tx_sym(xranlib->get_timer_ctx());
+}
+
+void xran_ut_tx_cpup_dl()
+{
+ xranlib->update_symbol_index();
+
+ if(xranlib->get_symbol_index() == 3)
+ tx_cp_dl_cb(nullptr, xranlib->get_timer_ctx());
+
+ xran_process_tx_sym(xranlib->get_timer_ctx());
+}
+
+#if 0 /* TBD */
+void xran_ut_rx_up_ul()
+{
+ process_mbf(mbuf);
+}
+#endif
+
+
+/* call back functions */
+int send_mbuf_up(struct rte_mbuf *mbuf, uint16_t type)
+{
+ rte_pktmbuf_free(mbuf);
+ return (1);
+}
+
+int send_mbuf_cp_perf(struct rte_mbuf *mbuf, uint16_t type)
+{
+ rte_pktmbuf_free(mbuf);
+ return (1);
+}
+
+#if 0 /* TBD */
+int send_mbuf_cp(struct rte_mbuf *mbuf, uint16_t type)
+{
+#if 0
+ xran_parse_cp_pkt(m_pTestBuffer, &m_result, &m_pktInfo);
+
+ /* Verify the result */
+ verify_sections();
+#else
+ printf("cp\n");
+#endif
+ return (1);
+}
+#endif
+
+void utcp_fh_rx_callback(void *pCallbackTag, xran_status_t status)
+{
+ return;
+}
+
+void utcp_fh_rx_prach_callback(void *pCallbackTag, xran_status_t status)
+{
+ rte_pause();
+}
+
+} /* extern "C" */
+
+
+class TestChain: public KernelTests
+{
+protected:
+ struct xran_fh_config m_xranConf;
+ struct xran_fh_init m_xranInit;
+
+ bool m_bSub6;
+
+
+ void SetUp() override
+ {
+ int temp;
+ std::string tmpstr;
+
+
+ init_test("TestChain");
+
+ xranlib->get_cfg_fh(&m_xranConf);
+
+ tmpstr = get_input_parameter<std::string>("category");
+ if(tmpstr == "A")
+ m_xranConf.ru_conf.xranCat = XRAN_CATEGORY_A;
+ else if(tmpstr == "B")
+ m_xranConf.ru_conf.xranCat = XRAN_CATEGORY_B;
+ else {
+ std::cout << "*** Invalid RU Category [" << tmpstr << "] !!!" << std::endl;
+ std::cout << "Set it to Category A... " << std::endl;
+ m_xranConf.ru_conf.xranCat = XRAN_CATEGORY_A;
+ }
+
+ m_xranConf.frame_conf.nNumerology = get_input_parameter<int>("mu");
+ if(m_xranConf.frame_conf.nNumerology > 3) {
+ std::cout << "*** Invalid Numerology [" << m_xranConf.frame_conf.nNumerology << "] !!!" << std::endl;
+ m_xranConf.frame_conf.nNumerology = 0;
+ std::cout << "Set it to " << m_xranConf.frame_conf.nNumerology << "..." << std::endl;
+ }
+
+ tmpstr = get_input_parameter<std::string>("duplex");
+ if(tmpstr == "FDD")
+ m_xranConf.frame_conf.nFrameDuplexType = 0;
+ else if(tmpstr == "TDD") {
+ m_xranConf.frame_conf.nFrameDuplexType = 1;
+
+ tmpstr = get_input_parameter<std::string>("slot_config");
+ temp = xranlib->get_slot_config(tmpstr, &m_xranConf.frame_conf);
+ }
+ else {
+ std::cout << "*** Invalid Duplex type [" << tmpstr << "] !!!" << std::endl;
+ std::cout << "Set it to FDD... " << std::endl;
+ m_xranConf.frame_conf.nFrameDuplexType = 0;
+ }
+
+ m_xranConf.nCC = get_input_parameter<int>("num_cc");
+ if(m_xranConf.nCC > XRAN_MAX_SECTOR_NR) {
+ std::cout << "*** Exceeds maximum number of carriers supported [" << m_xranConf.nCC << "] !!!" << std::endl;
+ m_xranConf.nCC = XRAN_MAX_SECTOR_NR;
+ std::cout << "Set it to " << m_xranConf.nCC << "..." << std::endl;
+ }
+ m_xranConf.neAxc = get_input_parameter<int>("num_eaxc");
+ if(m_xranConf.neAxc > XRAN_MAX_ANTENNA_NR) {
+ std::cout << "*** Exceeds maximum number of antenna supported [" << m_xranConf.neAxc << "] !!!" << std::endl;
+ m_xranConf.neAxc = XRAN_MAX_ANTENNA_NR;
+ std::cout << "Set it to " << m_xranConf.neAxc << "..." << std::endl;
+ }
+
+ m_bSub6 = get_input_parameter<bool>("sub6");
+ temp = get_input_parameter<int>("chbw_dl");
+ m_xranConf.nDLRBs = xranlib->get_num_rbs(m_xranConf.frame_conf.nNumerology, temp, m_bSub6);
+ temp = get_input_parameter<int>("chbw_ul");
+ m_xranConf.nULRBs = xranlib->get_num_rbs(m_xranConf.frame_conf.nNumerology, temp, m_bSub6);
+
+ m_xranConf.nAntElmTRx = get_input_parameter<int>("antelm_trx");
+ m_xranConf.nDLFftSize = get_input_parameter<int>("fftsize_dl");
+ m_xranConf.nULFftSize = get_input_parameter<int>("fftsize_ul");
+
+
+ m_xranConf.ru_conf.iqWidth = get_input_parameter<int>("iq_width");
+ m_xranConf.ru_conf.compMeth = get_input_parameter<int>("comp_meth");
+
+#if 0
+ temp = get_input_parameter<int>("fft_size");
+ m_xranConf.ru_conf.fftSize = 0;
+ while (temp >>= 1)
+ ++m_xranConf.ru_conf.fftSize;
+#endif
+
+ }
+
+ void TearDown() override
+ {
+ }
+};
+
+
+
+
+/***************************************************************************
+ * Performance Test cases
+ ***************************************************************************/
+/* C-Plane DL chain (tx_cp_dl_cb) only */
+TEST_P(TestChain, CPlaneDLPerf)
+{
+ xranlib->Init(&m_xranConf);
+ xranlib->Open(send_mbuf_cp_perf, send_mbuf_up,
+ (void *)utcp_fh_rx_callback, (void *)utcp_fh_rx_prach_callback);
+
+ performance("C", module_name, xran_ut_tx_cp_dl);
+
+ xranlib->Close();
+ xranlib->Cleanup();
+}
+
+/* C-Plane UL chain (tx_cp_ul_cb) only */
+TEST_P(TestChain, CPlaneULPerf)
+{
+ xranlib->Init(&m_xranConf);
+ xranlib->Open(send_mbuf_cp_perf, send_mbuf_up,
+ (void *)utcp_fh_rx_callback, (void *)utcp_fh_rx_prach_callback);
+
+ performance("C", module_name, xran_ut_tx_cp_ul);
+
+ xranlib->Close();
+ xranlib->Cleanup();
+}
+
+/* U-Plane UL chain (process_tx_sym with disable CP) */
+TEST_P(TestChain, UPlaneDLPerf)
+{
+ bool flag_cpen;
+
+ xranlib->Init(&m_xranConf);
+
+ /* save current CP enable flag */
+ flag_cpen = xranlib->is_cpenable()?true:false;
+
+ /* need to disable CP to make U-Plane work without CP */
+ xranlib->apply_cpenable(false);
+ xranlib->Open(send_mbuf_cp_perf, send_mbuf_up,
+ (void *)utcp_fh_rx_callback, (void *)utcp_fh_rx_prach_callback);
+
+ performance("C", module_name, xran_ut_tx_up_dl);
+
+ xranlib->Close();
+ xranlib->Cleanup();
+
+ /* restore previous CP enable flag */
+ xranlib->apply_cpenable(flag_cpen);
+}
+
+/* C-Plane and U-Plane DL chain, U-Plane will be generated by C-Plane config */
+TEST_P(TestChain, APlaneDLPerf)
+{
+ bool flag_cpen;
+
+ xranlib->Init(&m_xranConf);
+
+ /* save current CP enable flag */
+ flag_cpen = xranlib->is_cpenable()?true:false;
+
+ /* Enable CP by force to make UP work by CP's section information */
+ xranlib->apply_cpenable(true);
+ xranlib->Open(send_mbuf_cp_perf, send_mbuf_up,
+ (void *)utcp_fh_rx_callback, (void *)utcp_fh_rx_prach_callback);
+
+ performance("C", module_name, xran_ut_tx_cpup_dl);
+
+ xranlib->Close();
+ xranlib->Cleanup();
+
+ /* restore previous CP enable flag */
+ xranlib->apply_cpenable(flag_cpen);
+}
+
+#if 0 /* TBD */
+TEST_P(TestChain, UPlaneULPerf)
+{
+}
+#endif
+
+
+INSTANTIATE_TEST_CASE_P(UnitTest, TestChain,
+ testing::ValuesIn(get_sequence(TestChain::get_number_of_cases("TestChain"))));
+
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-#include "common.hpp"\r
-#include "xran_fh_o_du.h"\r
-#include "xran_compression.h"\r
-#include "xran_compression.hpp"\r
-\r
-#include <stdint.h>\r
-#include <random>\r
-#include <algorithm>\r
-#include <iterator>\r
-#include <iostream>\r
-#include <cstring>\r
-\r
-const std::string module_name = "bfp";\r
-\r
-template <typename T>\r
-int checkData(T* inVec1, T* inVec2, int numVals)\r
-{\r
- int checkSum = 0;\r
- for (int n = 0; n < numVals; ++n)\r
- {\r
- checkSum += std::abs(inVec1[n] - inVec2[n]);\r
- }\r
- if (checkSum == 0)\r
- {\r
- //std::cout << "Test Passed\n";\r
- return 0;\r
- }\r
- else\r
- {\r
- //std::cout << "Test Failed\n";\r
- return 1;\r
- }\r
-}\r
-template int checkData(int8_t*, int8_t*, int);\r
-template int checkData(int16_t*, int16_t*, int);\r
-\r
-int checkDataApprox(int16_t *inVec1, int16_t *inVec2, int numVals)\r
-{\r
- int checkSum = 0;\r
- for (int n = 0; n < numVals; ++n)\r
- {\r
- if (std::abs(inVec1[n] & 0xFF00) - std::abs(inVec2[n] & 0xFF00)){;\r
- printf("%d %d\n", inVec1[n] & 0xFF00, inVec2[n] & 0xFF00);\r
- checkSum += 1;\r
- }\r
- }\r
- if (checkSum == 0)\r
- {\r
- //std::cout << "Test Passed\n";\r
- return 0;\r
- }\r
- else\r
- {\r
- //std::cout << "Test Failed\n";\r
- return 1;\r
- }\r
-}\r
-\r
-\r
-class BfpCheck : public KernelTests\r
-{\r
-protected:\r
- void SetUp() override {\r
- init_test("bfp_functional");\r
- }\r
-\r
- /* It's called after an execution of the each test case.*/\r
- void TearDown() override {\r
- }\r
-};\r
-\r
-class BfpPerf : public KernelTests\r
-{\r
-protected:\r
- void SetUp() override {\r
- init_test("bfp_performace");\r
- }\r
-\r
- /* It's called after an execution of the each test case.*/\r
- void TearDown() override {\r
- }\r
-};\r
-CACHE_ALIGNED int16_t loc_dataExpandedIn[288*BlockFloatCompander::k_numREReal];\r
-CACHE_ALIGNED int16_t loc_dataExpandedRes[288*BlockFloatCompander::k_numREReal];\r
-CACHE_ALIGNED uint8_t loc_dataCompressedDataOut[2*288*BlockFloatCompander::k_numREReal];\r
-\r
-class BfpPerfEx : public KernelTests\r
-{\r
-protected:\r
- struct xranlib_decompress_request bfp_decom_req;\r
- struct xranlib_decompress_response bfp_decom_rsp;\r
- struct xranlib_compress_request bfp_com_req;\r
- struct xranlib_compress_response bfp_com_rsp;\r
-\r
- void SetUp() override {\r
- init_test("bfp_performace_ex");\r
- int32_t resSum = 0;\r
- int16_t len = 0;\r
- int16_t compMethod = XRAN_COMPMETHOD_BLKFLOAT;\r
- int16_t iqWidth = get_input_parameter<int16_t>("iqWidth");\r
- int16_t numRBs = get_input_parameter<int16_t>("nRBsize");\r
- // Create random number generator\r
- std::random_device rd;\r
- std::mt19937 gen(rd()); //Standard mersenne_twister_engine seeded with rd()\r
- std::uniform_int_distribution<int16_t> randInt16(-32768, 32767);\r
- std::uniform_int_distribution<int> randExpShift(0, 4);\r
-\r
- BlockFloatCompander::ExpandedData expandedData;\r
- expandedData.dataExpanded = &loc_dataExpandedIn[0];\r
- BlockFloatCompander::ExpandedData expandedDataRes;\r
- expandedDataRes.dataExpanded = &loc_dataExpandedRes[0];\r
-\r
- //printf("iqWidth %d numRBs %d\n", iqWidth, numRBs);\r
-\r
- for (int m = 0; m < 18*BlockFloatCompander::k_numRB; ++m) {\r
- auto shiftVal = randExpShift(gen);\r
- for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n) {\r
- expandedData.dataExpanded[m*BlockFloatCompander::k_numREReal+n] = int16_t(randInt16(gen) >> shiftVal);\r
- }\r
- }\r
-\r
- BlockFloatCompander::CompressedData compressedData;\r
- compressedData.dataCompressed = &loc_dataCompressedDataOut[0];\r
-\r
- std::memset(&loc_dataCompressedDataOut[0], 0, 288*BlockFloatCompander::k_numREReal);\r
- std::memset(&loc_dataExpandedRes[0], 0, 288*BlockFloatCompander::k_numREReal);\r
-\r
- std::memset(&bfp_com_req, 0, sizeof(struct xranlib_compress_request));\r
- std::memset(&bfp_com_rsp, 0, sizeof(struct xranlib_compress_response));\r
- std::memset(&bfp_decom_req, 0, sizeof(struct xranlib_decompress_request));\r
- std::memset(&bfp_decom_rsp, 0, sizeof(struct xranlib_decompress_response));\r
-\r
- bfp_com_req.data_in = (int16_t *)expandedData.dataExpanded;\r
- bfp_com_req.numRBs = numRBs;\r
- bfp_com_req.len = numRBs*12*2*2;\r
- bfp_com_req.compMethod = compMethod;\r
- bfp_com_req.iqWidth = iqWidth;\r
-\r
- bfp_com_rsp.data_out = (int8_t *)(compressedData.dataCompressed);\r
- bfp_com_rsp.len = 0;\r
-\r
- bfp_decom_req.data_in = (int8_t *)(compressedData.dataCompressed);\r
- bfp_decom_req.numRBs = numRBs;\r
- bfp_decom_req.len = ((3 * iqWidth) + 1) * numRBs;\r
- bfp_decom_req.compMethod = compMethod;\r
- bfp_decom_req.iqWidth = iqWidth;\r
-\r
- bfp_decom_rsp.data_out = (int16_t *)expandedDataRes.dataExpanded;\r
- bfp_decom_rsp.len = 0;\r
- }\r
-\r
- /* It's called after an execution of the each test case.*/\r
- void TearDown() override {\r
-\r
- }\r
-};\r
-\r
-TEST_P(BfpCheck, AVX512_12bit)\r
-{\r
- int resSum = 0;\r
-\r
- // Create random number generator\r
- std::random_device rd;\r
- std::mt19937 gen(rd()); //Standard mersenne_twister_engine seeded with rd()\r
- std::uniform_int_distribution<int16_t> randInt16(-32768, 32767);\r
- std::uniform_int_distribution<int> randExpShift(0, 4);\r
-\r
- // Generate random test data for compression kernel\r
- BlockFloatCompander::ExpandedData expandedDataInput;\r
- expandedDataInput.dataExpanded = &expandedDataInput.dataExpandedIn[0];\r
- for (int m = 0; m < BlockFloatCompander::k_numRB; ++m)\r
- {\r
- auto shiftVal = randExpShift(gen);\r
- for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n)\r
- {\r
- expandedDataInput.dataExpanded[m*BlockFloatCompander::k_numREReal+n] = int16_t(randInt16(gen) >> shiftVal);\r
- }\r
- }\r
-\r
- BlockFloatCompander::CompressedData compressedDataRef;\r
- compressedDataRef.dataCompressed = &compressedDataRef.dataCompressedDataOut[0];\r
- BlockFloatCompander::ExpandedData expandedDataRef;\r
- expandedDataRef.dataExpanded = &expandedDataRef.dataExpandedIn[0];\r
- BlockFloatCompander::CompressedData compressedDataKern;\r
- compressedDataKern.dataCompressed = &compressedDataKern.dataCompressedDataOut[0];\r
- BlockFloatCompander::ExpandedData expandedDataKern;\r
- expandedDataKern.dataExpanded = &expandedDataKern.dataExpandedIn[0];\r
-\r
- //std::cout << "Verifying AVX512 12b iqWidth Kernel\n";\r
- expandedDataInput.iqWidth = 12;\r
- // Generate reference\r
- BlockFloatCompander::BlockFloatCompress_Basic(expandedDataInput, &compressedDataRef);\r
- BlockFloatCompander::BlockFloatExpand_Basic(compressedDataRef, &expandedDataRef);\r
- // Generate kernel output\r
- BlockFloatCompander::BlockFloatCompress_12b_AVX512(expandedDataInput, &compressedDataKern);\r
- BlockFloatCompander::BlockFloatExpand_12b_AVX512(compressedDataRef, &expandedDataKern);\r
- // Verify\r
- auto totNumBytes = ((3 * compressedDataRef.iqWidth) + 1) * BlockFloatCompander::k_numRB;\r
- //std::cout << "Compression: ";\r
- resSum += checkData(compressedDataRef.dataCompressed, compressedDataKern.dataCompressed, totNumBytes);\r
- //std::cout << "Expansion: ";\r
- resSum += checkData(expandedDataRef.dataExpanded, expandedDataKern.dataExpanded, BlockFloatCompander::k_numSampsExpanded);\r
-\r
- ASSERT_EQ(0, resSum);\r
-}\r
-\r
-TEST_P(BfpCheck, AVX512_10bit)\r
-{\r
- int resSum = 0;\r
-\r
- // Create random number generator\r
- std::random_device rd;\r
- std::mt19937 gen(rd()); //Standard mersenne_twister_engine seeded with rd()\r
- std::uniform_int_distribution<int16_t> randInt16(-32768, 32767);\r
- std::uniform_int_distribution<int> randExpShift(0, 4);\r
-\r
- // Generate random test data for compression kernel\r
- BlockFloatCompander::ExpandedData expandedDataInput;\r
- expandedDataInput.dataExpanded = &expandedDataInput.dataExpandedIn[0];\r
- for (int m = 0; m < BlockFloatCompander::k_numRB; ++m)\r
- {\r
- auto shiftVal = randExpShift(gen);\r
- for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n)\r
- {\r
- expandedDataInput.dataExpanded[m*BlockFloatCompander::k_numREReal+n] = int16_t(randInt16(gen) >> shiftVal);\r
- }\r
- }\r
-\r
- BlockFloatCompander::CompressedData compressedDataRef;\r
- compressedDataRef.dataCompressed = &compressedDataRef.dataCompressedDataOut[0];\r
- BlockFloatCompander::ExpandedData expandedDataRef;\r
- expandedDataRef.dataExpanded = &expandedDataRef.dataExpandedIn[0];\r
- BlockFloatCompander::CompressedData compressedDataKern;\r
- compressedDataKern.dataCompressed = &compressedDataKern.dataCompressedDataOut[0];\r
- BlockFloatCompander::ExpandedData expandedDataKern;\r
- expandedDataKern.dataExpanded = &expandedDataKern.dataExpandedIn[0];\r
-\r
- //std::cout << "Verifying AVX512 10b iqWidth Kernel\n";\r
- expandedDataInput.iqWidth = 10;\r
- // Generate reference\r
- BlockFloatCompander::BlockFloatCompress_Basic(expandedDataInput, &compressedDataRef);\r
- BlockFloatCompander::BlockFloatExpand_Basic(compressedDataRef, &expandedDataRef);\r
- // Generate kernel output\r
- BlockFloatCompander::BlockFloatCompress_10b_AVX512(expandedDataInput, &compressedDataKern);\r
- BlockFloatCompander::BlockFloatExpand_10b_AVX512(compressedDataRef, &expandedDataKern);\r
- // Verify\r
- auto totNumBytes = ((3 * compressedDataRef.iqWidth) + 1) * BlockFloatCompander::k_numRB;\r
- //std::cout << "Compression: ";\r
- resSum += checkData(compressedDataRef.dataCompressed, compressedDataKern.dataCompressed, totNumBytes);\r
- //std::cout << "Expansion: ";\r
- resSum += checkData(expandedDataRef.dataExpanded, expandedDataKern.dataExpanded, BlockFloatCompander::k_numSampsExpanded);\r
-\r
- ASSERT_EQ(0, resSum);\r
-\r
-// performance("AVX512", module_name, BlockFloatCompander::BlockFloatCompress_10b_AVX512, expandedDataInput, &compressedDataKern);\r
-}\r
-\r
-TEST_P(BfpCheck, AVX512_9bit)\r
-{\r
- int resSum = 0;\r
-\r
- // Create random number generator\r
- std::random_device rd;\r
- std::mt19937 gen(rd()); //Standard mersenne_twister_engine seeded with rd()\r
- std::uniform_int_distribution<int16_t> randInt16(-32768, 32767);\r
- std::uniform_int_distribution<int> randExpShift(0, 4);\r
-\r
- // Generate random test data for compression kernel\r
- BlockFloatCompander::ExpandedData expandedDataInput;\r
- expandedDataInput.dataExpanded = &expandedDataInput.dataExpandedIn[0];\r
- for (int m = 0; m < BlockFloatCompander::k_numRB; ++m)\r
- {\r
- auto shiftVal = randExpShift(gen);\r
- for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n)\r
- {\r
- expandedDataInput.dataExpanded[m*BlockFloatCompander::k_numREReal+n] = int16_t(randInt16(gen) >> shiftVal);\r
- }\r
- }\r
-\r
- BlockFloatCompander::CompressedData compressedDataRef;\r
- compressedDataRef.dataCompressed = &compressedDataRef.dataCompressedDataOut[0];\r
- BlockFloatCompander::ExpandedData expandedDataRef;\r
- expandedDataRef.dataExpanded = &expandedDataRef.dataExpandedIn[0];\r
- BlockFloatCompander::CompressedData compressedDataKern;\r
- compressedDataKern.dataCompressed = &compressedDataKern.dataCompressedDataOut[0];\r
- BlockFloatCompander::ExpandedData expandedDataKern;\r
- expandedDataKern.dataExpanded = &expandedDataKern.dataExpandedIn[0];\r
-\r
- //std::cout << "Verifying AVX512 9b iqWidth Kernel\n";\r
- expandedDataInput.iqWidth = 9;\r
- // Generate reference\r
- BlockFloatCompander::BlockFloatCompress_Basic(expandedDataInput, &compressedDataRef);\r
- BlockFloatCompander::BlockFloatExpand_Basic(compressedDataRef, &expandedDataRef);\r
- // Generate kernel output\r
- BlockFloatCompander::BlockFloatCompress_9b_AVX512(expandedDataInput, &compressedDataKern);\r
- BlockFloatCompander::BlockFloatExpand_9b_AVX512(compressedDataRef, &expandedDataKern);\r
- // Verify\r
- auto totNumBytes = ((3 * compressedDataRef.iqWidth) + 1) * BlockFloatCompander::k_numRB;\r
- //std::cout << "Compression: ";\r
- resSum += checkData(compressedDataRef.dataCompressed, compressedDataKern.dataCompressed, totNumBytes);\r
- //std::cout << "Expansion: ";\r
- resSum += checkData(expandedDataRef.dataExpanded, expandedDataKern.dataExpanded, BlockFloatCompander::k_numSampsExpanded);\r
-\r
- ASSERT_EQ(0, resSum);\r
-}\r
-\r
-\r
-TEST_P(BfpCheck, AVX512_8bit)\r
-{\r
- int resSum = 0;\r
-\r
- // Create random number generator\r
- std::random_device rd;\r
- std::mt19937 gen(rd()); //Standard mersenne_twister_engine seeded with rd()\r
- std::uniform_int_distribution<int16_t> randInt16(-32768, 32767);\r
- std::uniform_int_distribution<int> randExpShift(0, 4);\r
-\r
- // Generate random test data for compression kernel\r
- BlockFloatCompander::ExpandedData expandedDataInput;\r
- expandedDataInput.dataExpanded = &expandedDataInput.dataExpandedIn[0];\r
- for (int m = 0; m < BlockFloatCompander::k_numRB; ++m)\r
- {\r
- auto shiftVal = randExpShift(gen);\r
- for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n)\r
- {\r
- expandedDataInput.dataExpanded[m*BlockFloatCompander::k_numREReal+n] = int16_t(randInt16(gen) >> shiftVal);\r
- }\r
- }\r
-\r
- BlockFloatCompander::CompressedData compressedDataRef;\r
- compressedDataRef.dataCompressed = &compressedDataRef.dataCompressedDataOut[0];\r
- BlockFloatCompander::ExpandedData expandedDataRef;\r
- expandedDataRef.dataExpanded = &expandedDataRef.dataExpandedIn[0];\r
- BlockFloatCompander::CompressedData compressedDataKern;\r
- compressedDataKern.dataCompressed = &compressedDataKern.dataCompressedDataOut[0];\r
- BlockFloatCompander::ExpandedData expandedDataKern;\r
- expandedDataKern.dataExpanded = &expandedDataKern.dataExpandedIn[0];\r
-\r
- //std::cout << "Verifying AVX512 8bit Kernel\n";\r
- expandedDataInput.iqWidth = 8;\r
- // Generate reference\r
- BlockFloatCompander::BlockFloatCompress_Basic(expandedDataInput, &compressedDataRef);\r
- BlockFloatCompander::BlockFloatExpand_Basic(compressedDataRef, &expandedDataRef);\r
- // Generate kernel output\r
- BlockFloatCompander::BlockFloatCompress_8b_AVX512(expandedDataInput, &compressedDataKern);\r
- BlockFloatCompander::BlockFloatExpand_8b_AVX512(compressedDataRef, &expandedDataKern);\r
- // Verify\r
- auto totNumBytes = ((3 * compressedDataRef.iqWidth) + 1) * BlockFloatCompander::k_numRB;\r
- //std::cout << "Compression: ";\r
- resSum += checkData(compressedDataRef.dataCompressed, compressedDataKern.dataCompressed, totNumBytes);\r
- //std::cout << "Expansion: ";\r
- resSum += checkData(expandedDataRef.dataExpanded, expandedDataKern.dataExpanded, BlockFloatCompander::k_numSampsExpanded);\r
-\r
- ASSERT_EQ(0, resSum);\r
-}\r
-\r
-TEST_P(BfpPerf, AVX512_8bit_compression)\r
-{\r
- int resSum = 0;\r
-\r
- // Create random number generator\r
- std::random_device rd;\r
- std::mt19937 gen(rd()); //Standard mersenne_twister_engine seeded with rd()\r
- std::uniform_int_distribution<int16_t> randInt16(-32768, 32767);\r
- std::uniform_int_distribution<int> randExpShift(0, 4);\r
-\r
- // Generate random test data for compression kernel\r
- BlockFloatCompander::ExpandedData expandedDataInput;\r
- expandedDataInput.dataExpanded = &expandedDataInput.dataExpandedIn[0];\r
- for (int m = 0; m < BlockFloatCompander::k_numRB; ++m)\r
- {\r
- auto shiftVal = randExpShift(gen);\r
- for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n)\r
- {\r
- expandedDataInput.dataExpanded[m*BlockFloatCompander::k_numREReal+n] = int16_t(randInt16(gen) >> shiftVal);\r
- }\r
- }\r
-\r
- BlockFloatCompander::CompressedData compressedDataRef;\r
- compressedDataRef.dataCompressed = &compressedDataRef.dataCompressedDataOut[0];\r
- BlockFloatCompander::ExpandedData expandedDataRef;\r
- expandedDataRef.dataExpanded = &expandedDataRef.dataExpandedIn[0];\r
- BlockFloatCompander::CompressedData compressedDataKern;\r
- compressedDataKern.dataCompressed = &compressedDataKern.dataCompressedDataOut[0];\r
- BlockFloatCompander::ExpandedData expandedDataKern;\r
- expandedDataKern.dataExpanded = &expandedDataKern.dataExpandedIn[0];\r
-\r
- //std::cout << "Verifying AVX512 8bit Kernel\n";\r
- expandedDataInput.iqWidth = 8;\r
- // Generate reference\r
- BlockFloatCompander::BlockFloatCompress_Basic(expandedDataInput, &compressedDataRef);\r
- BlockFloatCompander::BlockFloatExpand_Basic(compressedDataRef, &expandedDataRef);\r
- // Generate kernel output\r
- BlockFloatCompander::BlockFloatCompress_8b_AVX512(expandedDataInput, &compressedDataKern);\r
- BlockFloatCompander::BlockFloatExpand_8b_AVX512(compressedDataRef, &expandedDataKern);\r
- // Verify\r
- auto totNumBytes = ((3 * compressedDataRef.iqWidth) + 1) * BlockFloatCompander::k_numRB;\r
- //std::cout << "Compression: ";\r
- resSum += checkData(compressedDataRef.dataCompressed, compressedDataKern.dataCompressed, totNumBytes);\r
- //std::cout << "Expansion: ";\r
- resSum += checkData(expandedDataRef.dataExpanded, expandedDataKern.dataExpanded, BlockFloatCompander::k_numSampsExpanded);\r
-\r
- ASSERT_EQ(0, resSum);\r
-\r
- performance("AVX512", module_name, BlockFloatCompander::BlockFloatCompress_8b_AVX512, expandedDataInput, &compressedDataKern);\r
-}\r
-\r
-TEST_P(BfpPerf, AVX512_8bit_decompression)\r
-{\r
- int resSum = 0;\r
-\r
- // Create random number generator\r
- std::random_device rd;\r
- std::mt19937 gen(rd()); //Standard mersenne_twister_engine seeded with rd()\r
- std::uniform_int_distribution<int16_t> randInt16(-32768, 32767);\r
- std::uniform_int_distribution<int> randExpShift(0, 4);\r
-\r
- // Generate random test data for compression kernel\r
- BlockFloatCompander::ExpandedData expandedDataInput;\r
- expandedDataInput.dataExpanded = &expandedDataInput.dataExpandedIn[0];\r
- for (int m = 0; m < BlockFloatCompander::k_numRB; ++m)\r
- {\r
- auto shiftVal = randExpShift(gen);\r
- for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n)\r
- {\r
- expandedDataInput.dataExpanded[m*BlockFloatCompander::k_numREReal+n] = int16_t(randInt16(gen) >> shiftVal);\r
- }\r
- }\r
-\r
- BlockFloatCompander::CompressedData compressedDataRef;\r
- compressedDataRef.dataCompressed = &compressedDataRef.dataCompressedDataOut[0];\r
- BlockFloatCompander::ExpandedData expandedDataRef;\r
- expandedDataRef.dataExpanded = &expandedDataRef.dataExpandedIn[0];\r
- BlockFloatCompander::CompressedData compressedDataKern;\r
- compressedDataKern.dataCompressed = &compressedDataKern.dataCompressedDataOut[0];\r
- BlockFloatCompander::ExpandedData expandedDataKern;\r
- expandedDataKern.dataExpanded = &expandedDataKern.dataExpandedIn[0];\r
-\r
- //std::cout << "Verifying AVX512 8bit Kernel\n";\r
- expandedDataInput.iqWidth = 8;\r
- // Generate reference\r
- BlockFloatCompander::BlockFloatCompress_Basic(expandedDataInput, &compressedDataRef);\r
- BlockFloatCompander::BlockFloatExpand_Basic(compressedDataRef, &expandedDataRef);\r
- // Generate kernel output\r
- BlockFloatCompander::BlockFloatCompress_8b_AVX512(expandedDataInput, &compressedDataKern);\r
- BlockFloatCompander::BlockFloatExpand_8b_AVX512(compressedDataRef, &expandedDataKern);\r
- // Verify\r
- auto totNumBytes = ((3 * compressedDataRef.iqWidth) + 1) * BlockFloatCompander::k_numRB;\r
- //std::cout << "Compression: ";\r
- resSum += checkData(compressedDataRef.dataCompressed, compressedDataKern.dataCompressed, totNumBytes);\r
- //std::cout << "Expansion: ";\r
- resSum += checkData(expandedDataRef.dataExpanded, expandedDataKern.dataExpanded, BlockFloatCompander::k_numSampsExpanded);\r
-\r
- ASSERT_EQ(0, resSum);\r
-\r
- performance("AVX512", module_name, BlockFloatCompander::BlockFloatExpand_8b_AVX512, compressedDataRef, &expandedDataKern);\r
-}\r
-\r
-\r
-\r
-TEST_P(BfpPerf, AVX512_9bit_compression)\r
-{\r
- int resSum = 0;\r
-\r
- // Create random number generator\r
- std::random_device rd;\r
- std::mt19937 gen(rd()); //Standard mersenne_twister_engine seeded with rd()\r
- std::uniform_int_distribution<int16_t> randInt16(-32768, 32767);\r
- std::uniform_int_distribution<int> randExpShift(0, 4);\r
-\r
- // Generate random test data for compression kernel\r
- BlockFloatCompander::ExpandedData expandedDataInput;\r
- expandedDataInput.dataExpanded = &expandedDataInput.dataExpandedIn[0];\r
- for (int m = 0; m < BlockFloatCompander::k_numRB; ++m)\r
- {\r
- auto shiftVal = randExpShift(gen);\r
- for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n)\r
- {\r
- expandedDataInput.dataExpanded[m*BlockFloatCompander::k_numREReal+n] = int16_t(randInt16(gen) >> shiftVal);\r
- }\r
- }\r
-\r
- BlockFloatCompander::CompressedData compressedDataRef;\r
- compressedDataRef.dataCompressed = &compressedDataRef.dataCompressedDataOut[0];\r
- BlockFloatCompander::ExpandedData expandedDataRef;\r
- expandedDataRef.dataExpanded = &expandedDataRef.dataExpandedIn[0];\r
- BlockFloatCompander::CompressedData compressedDataKern;\r
- compressedDataKern.dataCompressed = &compressedDataKern.dataCompressedDataOut[0];\r
- BlockFloatCompander::ExpandedData expandedDataKern;\r
- expandedDataKern.dataExpanded = &expandedDataKern.dataExpandedIn[0];\r
-\r
- //std::cout << "Verifying AVX512 8bit Kernel\n";\r
- expandedDataInput.iqWidth = 9;\r
- // Generate reference\r
- BlockFloatCompander::BlockFloatCompress_Basic(expandedDataInput, &compressedDataRef);\r
- BlockFloatCompander::BlockFloatExpand_Basic(compressedDataRef, &expandedDataRef);\r
- // Generate kernel output\r
- BlockFloatCompander::BlockFloatCompress_9b_AVX512(expandedDataInput, &compressedDataKern);\r
- BlockFloatCompander::BlockFloatExpand_9b_AVX512(compressedDataRef, &expandedDataKern);\r
- // Verify\r
- auto totNumBytes = ((3 * compressedDataRef.iqWidth) + 1) * BlockFloatCompander::k_numRB;\r
- //std::cout << "Compression: ";\r
- resSum += checkData(compressedDataRef.dataCompressed, compressedDataKern.dataCompressed, totNumBytes);\r
- //std::cout << "Expansion: ";\r
- resSum += checkData(expandedDataRef.dataExpanded, expandedDataKern.dataExpanded, BlockFloatCompander::k_numSampsExpanded);\r
-\r
- ASSERT_EQ(0, resSum);\r
-\r
- performance("AVX512", module_name, BlockFloatCompander::BlockFloatCompress_9b_AVX512, expandedDataInput, &compressedDataKern);\r
-}\r
-\r
-\r
-TEST_P(BfpPerf, AVX512_9bit_decompression)\r
-{\r
- int resSum = 0;\r
-\r
- // Create random number generator\r
- std::random_device rd;\r
- std::mt19937 gen(rd()); //Standard mersenne_twister_engine seeded with rd()\r
- std::uniform_int_distribution<int16_t> randInt16(-32768, 32767);\r
- std::uniform_int_distribution<int> randExpShift(0, 4);\r
-\r
- // Generate random test data for compression kernel\r
- BlockFloatCompander::ExpandedData expandedDataInput;\r
- expandedDataInput.dataExpanded = &expandedDataInput.dataExpandedIn[0];\r
- for (int m = 0; m < BlockFloatCompander::k_numRB; ++m)\r
- {\r
- auto shiftVal = randExpShift(gen);\r
- for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n)\r
- {\r
- expandedDataInput.dataExpanded[m*BlockFloatCompander::k_numREReal+n] = int16_t(randInt16(gen) >> shiftVal);\r
- }\r
- }\r
-\r
- BlockFloatCompander::CompressedData compressedDataRef;\r
- compressedDataRef.dataCompressed = &compressedDataRef.dataCompressedDataOut[0];\r
- BlockFloatCompander::ExpandedData expandedDataRef;\r
- expandedDataRef.dataExpanded = &expandedDataRef.dataExpandedIn[0];\r
- BlockFloatCompander::CompressedData compressedDataKern;\r
- compressedDataKern.dataCompressed = &compressedDataKern.dataCompressedDataOut[0];\r
- BlockFloatCompander::ExpandedData expandedDataKern;\r
- expandedDataKern.dataExpanded = &expandedDataKern.dataExpandedIn[0];\r
-\r
- //std::cout << "Verifying AVX512 8bit Kernel\n";\r
- expandedDataInput.iqWidth = 9;\r
- // Generate reference\r
- BlockFloatCompander::BlockFloatCompress_Basic(expandedDataInput, &compressedDataRef);\r
- BlockFloatCompander::BlockFloatExpand_Basic(compressedDataRef, &expandedDataRef);\r
- // Generate kernel output\r
- BlockFloatCompander::BlockFloatCompress_9b_AVX512(expandedDataInput, &compressedDataKern);\r
- BlockFloatCompander::BlockFloatExpand_9b_AVX512(compressedDataRef, &expandedDataKern);\r
- // Verify\r
- auto totNumBytes = ((3 * compressedDataRef.iqWidth) + 1) * BlockFloatCompander::k_numRB;\r
- //std::cout << "Compression: ";\r
- resSum += checkData(compressedDataRef.dataCompressed, compressedDataKern.dataCompressed, totNumBytes);\r
- //std::cout << "Expansion: ";\r
- resSum += checkData(expandedDataRef.dataExpanded, expandedDataKern.dataExpanded, BlockFloatCompander::k_numSampsExpanded);\r
-\r
- ASSERT_EQ(0, resSum);\r
-\r
- performance("AVX512", module_name, BlockFloatCompander::BlockFloatExpand_9b_AVX512, compressedDataRef, &expandedDataKern);\r
-}\r
-\r
-\r
-TEST_P(BfpPerf, AVX512_10bit_compression)\r
-{\r
- int resSum = 0;\r
-\r
- // Create random number generator\r
- std::random_device rd;\r
- std::mt19937 gen(rd()); //Standard mersenne_twister_engine seeded with rd()\r
- std::uniform_int_distribution<int16_t> randInt16(-32768, 32767);\r
- std::uniform_int_distribution<int> randExpShift(0, 4);\r
-\r
- // Generate random test data for compression kernel\r
- BlockFloatCompander::ExpandedData expandedDataInput;\r
- expandedDataInput.dataExpanded = &expandedDataInput.dataExpandedIn[0];\r
- for (int m = 0; m < BlockFloatCompander::k_numRB; ++m)\r
- {\r
- auto shiftVal = randExpShift(gen);\r
- for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n)\r
- {\r
- expandedDataInput.dataExpanded[m*BlockFloatCompander::k_numREReal+n] = int16_t(randInt16(gen) >> shiftVal);\r
- }\r
- }\r
-\r
- BlockFloatCompander::CompressedData compressedDataRef;\r
- compressedDataRef.dataCompressed = &compressedDataRef.dataCompressedDataOut[0];\r
- BlockFloatCompander::ExpandedData expandedDataRef;\r
- expandedDataRef.dataExpanded = &expandedDataRef.dataExpandedIn[0];\r
- BlockFloatCompander::CompressedData compressedDataKern;\r
- compressedDataKern.dataCompressed = &compressedDataKern.dataCompressedDataOut[0];\r
- BlockFloatCompander::ExpandedData expandedDataKern;\r
- expandedDataKern.dataExpanded = &expandedDataKern.dataExpandedIn[0];\r
-\r
- //std::cout << "Verifying AVX512 8bit Kernel\n";\r
- expandedDataInput.iqWidth = 10;\r
- // Generate reference\r
- BlockFloatCompander::BlockFloatCompress_Basic(expandedDataInput, &compressedDataRef);\r
- BlockFloatCompander::BlockFloatExpand_Basic(compressedDataRef, &expandedDataRef);\r
- // Generate kernel output\r
- BlockFloatCompander::BlockFloatCompress_10b_AVX512(expandedDataInput, &compressedDataKern);\r
- BlockFloatCompander::BlockFloatExpand_10b_AVX512(compressedDataRef, &expandedDataKern);\r
- // Verify\r
- auto totNumBytes = ((3 * compressedDataRef.iqWidth) + 1) * BlockFloatCompander::k_numRB;\r
- //std::cout << "Compression: ";\r
- resSum += checkData(compressedDataRef.dataCompressed, compressedDataKern.dataCompressed, totNumBytes);\r
- //std::cout << "Expansion: ";\r
- resSum += checkData(expandedDataRef.dataExpanded, expandedDataKern.dataExpanded, BlockFloatCompander::k_numSampsExpanded);\r
-\r
- ASSERT_EQ(0, resSum);\r
-\r
- performance("AVX512", module_name, BlockFloatCompander::BlockFloatCompress_10b_AVX512, expandedDataInput, &compressedDataKern);\r
-}\r
-\r
-TEST_P(BfpPerf, AVX512_10bit_decompression)\r
-{\r
- int resSum = 0;\r
-\r
- // Create random number generator\r
- std::random_device rd;\r
- std::mt19937 gen(rd()); //Standard mersenne_twister_engine seeded with rd()\r
- std::uniform_int_distribution<int16_t> randInt16(-32768, 32767);\r
- std::uniform_int_distribution<int> randExpShift(0, 4);\r
-\r
- // Generate random test data for compression kernel\r
- BlockFloatCompander::ExpandedData expandedDataInput;\r
- expandedDataInput.dataExpanded = &expandedDataInput.dataExpandedIn[0];\r
- for (int m = 0; m < BlockFloatCompander::k_numRB; ++m)\r
- {\r
- auto shiftVal = randExpShift(gen);\r
- for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n)\r
- {\r
- expandedDataInput.dataExpanded[m*BlockFloatCompander::k_numREReal+n] = int16_t(randInt16(gen) >> shiftVal);\r
- }\r
- }\r
-\r
- BlockFloatCompander::CompressedData compressedDataRef;\r
- compressedDataRef.dataCompressed = &compressedDataRef.dataCompressedDataOut[0];\r
- BlockFloatCompander::ExpandedData expandedDataRef;\r
- expandedDataRef.dataExpanded = &expandedDataRef.dataExpandedIn[0];\r
- BlockFloatCompander::CompressedData compressedDataKern;\r
- compressedDataKern.dataCompressed = &compressedDataKern.dataCompressedDataOut[0];\r
- BlockFloatCompander::ExpandedData expandedDataKern;\r
- expandedDataKern.dataExpanded = &expandedDataKern.dataExpandedIn[0];\r
-\r
- //std::cout << "Verifying AVX512 8bit Kernel\n";\r
- expandedDataInput.iqWidth = 10;\r
- // Generate reference\r
- BlockFloatCompander::BlockFloatCompress_Basic(expandedDataInput, &compressedDataRef);\r
- BlockFloatCompander::BlockFloatExpand_Basic(compressedDataRef, &expandedDataRef);\r
- // Generate kernel output\r
- BlockFloatCompander::BlockFloatCompress_10b_AVX512(expandedDataInput, &compressedDataKern);\r
- BlockFloatCompander::BlockFloatExpand_10b_AVX512(compressedDataRef, &expandedDataKern);\r
- // Verify\r
- auto totNumBytes = ((3 * compressedDataRef.iqWidth) + 1) * BlockFloatCompander::k_numRB;\r
- //std::cout << "Compression: ";\r
- resSum += checkData(compressedDataRef.dataCompressed, compressedDataKern.dataCompressed, totNumBytes);\r
- //std::cout << "Expansion: ";\r
- resSum += checkData(expandedDataRef.dataExpanded, expandedDataKern.dataExpanded, BlockFloatCompander::k_numSampsExpanded);\r
-\r
- ASSERT_EQ(0, resSum);\r
-\r
- performance("AVX512", module_name, BlockFloatCompander::BlockFloatExpand_10b_AVX512, compressedDataRef, &expandedDataKern);\r
-}\r
-\r
-TEST_P(BfpPerf, AVX512_12bit_compression)\r
-{\r
- int resSum = 0;\r
-\r
- // Create random number generator\r
- std::random_device rd;\r
- std::mt19937 gen(rd()); //Standard mersenne_twister_engine seeded with rd()\r
- std::uniform_int_distribution<int16_t> randInt16(-32768, 32767);\r
- std::uniform_int_distribution<int> randExpShift(0, 4);\r
-\r
- // Generate random test data for compression kernel\r
- BlockFloatCompander::ExpandedData expandedDataInput;\r
- expandedDataInput.dataExpanded = &expandedDataInput.dataExpandedIn[0];\r
- for (int m = 0; m < BlockFloatCompander::k_numRB; ++m)\r
- {\r
- auto shiftVal = randExpShift(gen);\r
- for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n)\r
- {\r
- expandedDataInput.dataExpanded[m*BlockFloatCompander::k_numREReal+n] = int16_t(randInt16(gen) >> shiftVal);\r
- }\r
- }\r
-\r
- BlockFloatCompander::CompressedData compressedDataRef;\r
- compressedDataRef.dataCompressed = &compressedDataRef.dataCompressedDataOut[0];\r
- BlockFloatCompander::ExpandedData expandedDataRef;\r
- expandedDataRef.dataExpanded = &expandedDataRef.dataExpandedIn[0];\r
- BlockFloatCompander::CompressedData compressedDataKern;\r
- compressedDataKern.dataCompressed = &compressedDataKern.dataCompressedDataOut[0];\r
- BlockFloatCompander::ExpandedData expandedDataKern;\r
- expandedDataKern.dataExpanded = &expandedDataKern.dataExpandedIn[0];\r
-\r
- //std::cout << "Verifying AVX512 8bit Kernel\n";\r
- expandedDataInput.iqWidth = 12;\r
- // Generate reference\r
- BlockFloatCompander::BlockFloatCompress_Basic(expandedDataInput, &compressedDataRef);\r
- BlockFloatCompander::BlockFloatExpand_Basic(compressedDataRef, &expandedDataRef);\r
- // Generate kernel output\r
- BlockFloatCompander::BlockFloatCompress_12b_AVX512(expandedDataInput, &compressedDataKern);\r
- BlockFloatCompander::BlockFloatExpand_12b_AVX512(compressedDataRef, &expandedDataKern);\r
- // Verify\r
- auto totNumBytes = ((3 * compressedDataRef.iqWidth) + 1) * BlockFloatCompander::k_numRB;\r
- //std::cout << "Compression: ";\r
- resSum += checkData(compressedDataRef.dataCompressed, compressedDataKern.dataCompressed, totNumBytes);\r
- //std::cout << "Expansion: ";\r
- resSum += checkData(expandedDataRef.dataExpanded, expandedDataKern.dataExpanded, BlockFloatCompander::k_numSampsExpanded);\r
-\r
- ASSERT_EQ(0, resSum);\r
-\r
- performance("AVX512", module_name, BlockFloatCompander::BlockFloatCompress_12b_AVX512, expandedDataInput, &compressedDataKern);\r
-}\r
-\r
-\r
-TEST_P(BfpPerf, AVX512_12bit_decompression)\r
-{\r
- int resSum = 0;\r
-\r
- // Create random number generator\r
- std::random_device rd;\r
- std::mt19937 gen(rd()); //Standard mersenne_twister_engine seeded with rd()\r
- std::uniform_int_distribution<int16_t> randInt16(-32768, 32767);\r
- std::uniform_int_distribution<int> randExpShift(0, 4);\r
-\r
- // Generate random test data for compression kernel\r
- BlockFloatCompander::ExpandedData expandedDataInput;\r
- expandedDataInput.dataExpanded = &expandedDataInput.dataExpandedIn[0];\r
- for (int m = 0; m < BlockFloatCompander::k_numRB; ++m)\r
- {\r
- auto shiftVal = randExpShift(gen);\r
- for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n)\r
- {\r
- expandedDataInput.dataExpanded[m*BlockFloatCompander::k_numREReal+n] = int16_t(randInt16(gen) >> shiftVal);\r
- }\r
- }\r
-\r
- BlockFloatCompander::CompressedData compressedDataRef;\r
- compressedDataRef.dataCompressed = &compressedDataRef.dataCompressedDataOut[0];\r
- BlockFloatCompander::ExpandedData expandedDataRef;\r
- expandedDataRef.dataExpanded = &expandedDataRef.dataExpandedIn[0];\r
- BlockFloatCompander::CompressedData compressedDataKern;\r
- compressedDataKern.dataCompressed = &compressedDataKern.dataCompressedDataOut[0];\r
- BlockFloatCompander::ExpandedData expandedDataKern;\r
- expandedDataKern.dataExpanded = &expandedDataKern.dataExpandedIn[0];\r
-\r
- //std::cout << "Verifying AVX512 8bit Kernel\n";\r
- expandedDataInput.iqWidth = 12;\r
- // Generate reference\r
- BlockFloatCompander::BlockFloatCompress_Basic(expandedDataInput, &compressedDataRef);\r
- BlockFloatCompander::BlockFloatExpand_Basic(compressedDataRef, &expandedDataRef);\r
- // Generate kernel output\r
- BlockFloatCompander::BlockFloatCompress_12b_AVX512(expandedDataInput, &compressedDataKern);\r
- BlockFloatCompander::BlockFloatExpand_12b_AVX512(compressedDataRef, &expandedDataKern);\r
- // Verify\r
- auto totNumBytes = ((3 * compressedDataRef.iqWidth) + 1) * BlockFloatCompander::k_numRB;\r
- //std::cout << "Compression: ";\r
- resSum += checkData(compressedDataRef.dataCompressed, compressedDataKern.dataCompressed, totNumBytes);\r
- //std::cout << "Expansion: ";\r
- resSum += checkData(expandedDataRef.dataExpanded, expandedDataKern.dataExpanded, BlockFloatCompander::k_numSampsExpanded);\r
-\r
- ASSERT_EQ(0, resSum);\r
-\r
- performance("AVX512", module_name, BlockFloatCompander::BlockFloatExpand_12b_AVX512, compressedDataRef, &expandedDataKern);\r
-}\r
-\r
-TEST_P(BfpCheck, AVX512_sweep_xranlib)\r
-{\r
- int32_t resSum = 0;\r
- int16_t len = 0;\r
-\r
- int16_t compMethod = XRAN_COMPMETHOD_BLKFLOAT;\r
- int16_t iqWidth[] = {8, 9, 10, 12};\r
-\r
- int16_t numRBs[] = {16, 18, 32, 36, 48, 70, 113, 273};\r
- struct xranlib_decompress_request bfp_decom_req;\r
- struct xranlib_decompress_response bfp_decom_rsp;\r
-\r
- struct xranlib_compress_request bfp_com_req;\r
- struct xranlib_compress_response bfp_com_rsp;\r
-\r
- // Create random number generator\r
- std::random_device rd;\r
- std::mt19937 gen(rd()); //Standard mersenne_twister_engine seeded with rd()\r
- std::uniform_int_distribution<int16_t> randInt16(-32768, 32767);\r
- std::uniform_int_distribution<int> randExpShift(0, 4);\r
-\r
- BlockFloatCompander::ExpandedData expandedData;\r
- expandedData.dataExpanded = &loc_dataExpandedIn[0];\r
- BlockFloatCompander::ExpandedData expandedDataRes;\r
- expandedDataRes.dataExpanded = &loc_dataExpandedRes[0];\r
- for (int iq_w_id = 0; iq_w_id < sizeof(iqWidth)/sizeof(iqWidth[0]); iq_w_id ++){\r
- for (int tc = 0; tc < sizeof(numRBs)/sizeof(numRBs[0]); tc ++){\r
-\r
- //printf("[%d]numRBs %d [%d] iqWidth %d\n",tc, numRBs[tc], iq_w_id, iqWidth[iq_w_id]);\r
- // Generate random test data for compression kernel\r
-\r
- for (int m = 0; m < 18*BlockFloatCompander::k_numRB; ++m) {\r
- auto shiftVal = randExpShift(gen);\r
- for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n) {\r
- expandedData.dataExpanded[m*BlockFloatCompander::k_numREReal+n] = int16_t(randInt16(gen) >> shiftVal);\r
- }\r
- }\r
-\r
- BlockFloatCompander::CompressedData compressedData;\r
- compressedData.dataCompressed = &loc_dataCompressedDataOut[0];\r
-\r
- std::memset(&loc_dataCompressedDataOut[0], 0, 288*BlockFloatCompander::k_numREReal);\r
- std::memset(&loc_dataExpandedRes[0], 0, 288*BlockFloatCompander::k_numREReal);\r
-\r
- std::memset(&bfp_com_req, 0, sizeof(struct xranlib_compress_request));\r
- std::memset(&bfp_com_rsp, 0, sizeof(struct xranlib_compress_response));\r
- std::memset(&bfp_decom_req, 0, sizeof(struct xranlib_decompress_request));\r
- std::memset(&bfp_decom_rsp, 0, sizeof(struct xranlib_decompress_response));\r
-\r
- bfp_com_req.data_in = (int16_t *)expandedData.dataExpanded;\r
- bfp_com_req.numRBs = numRBs[tc];\r
- bfp_com_req.len = numRBs[tc]*12*2*2;\r
- bfp_com_req.compMethod = compMethod;\r
- bfp_com_req.iqWidth = iqWidth[iq_w_id];\r
-\r
- bfp_com_rsp.data_out = (int8_t *)(compressedData.dataCompressed);\r
- bfp_com_rsp.len = 0;\r
-\r
- xranlib_compress_avx512(&bfp_com_req, &bfp_com_rsp);\r
-\r
- bfp_decom_req.data_in = (int8_t *)(compressedData.dataCompressed);\r
- bfp_decom_req.numRBs = numRBs[tc];\r
- bfp_decom_req.len = bfp_com_rsp.len;\r
- bfp_decom_req.compMethod = compMethod;\r
- bfp_decom_req.iqWidth = iqWidth[iq_w_id];\r
-\r
- bfp_decom_rsp.data_out = (int16_t *)expandedDataRes.dataExpanded;\r
- bfp_decom_rsp.len = 0;\r
-\r
- xranlib_decompress_avx512(&bfp_decom_req, &bfp_decom_rsp);\r
-\r
- resSum += checkDataApprox(expandedData.dataExpanded, expandedDataRes.dataExpanded, numRBs[tc]*BlockFloatCompander::k_numREReal);\r
-\r
- ASSERT_EQ(numRBs[tc]*12*2*2, bfp_decom_rsp.len);\r
- ASSERT_EQ(0, resSum);\r
- }\r
- }\r
-}\r
-\r
-TEST_P(BfpPerfEx, AVX512_Comp)\r
-{\r
- performance("AVX512", module_name, xranlib_compress_avx512, &bfp_com_req, &bfp_com_rsp);\r
-}\r
-\r
-TEST_P(BfpPerfEx, AVX512_DeComp)\r
-{\r
- performance("AVX512", module_name, xranlib_decompress_avx512, &bfp_decom_req, &bfp_decom_rsp);\r
-}\r
-\r
-INSTANTIATE_TEST_CASE_P(UnitTest, BfpCheck,\r
- testing::ValuesIn(get_sequence(BfpCheck::get_number_of_cases("bfp_functional"))));\r
-\r
-INSTANTIATE_TEST_CASE_P(UnitTest, BfpPerf,\r
- testing::ValuesIn(get_sequence(BfpPerf::get_number_of_cases("bfp_performace"))));\r
-\r
-\r
-INSTANTIATE_TEST_CASE_P(UnitTest, BfpPerfEx,\r
- testing::ValuesIn(get_sequence(BfpPerf::get_number_of_cases("bfp_performace_ex"))));\r
-\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+#include "common.hpp"
+#include "xran_fh_o_du.h"
+#include "xran_compression.h"
+#include "xran_compression.hpp"
+
+#include <stdint.h>
+#include <random>
+#include <algorithm>
+#include <iterator>
+#include <iostream>
+#include <cstring>
+
+const std::string module_name = "bfp";
+
+template <typename T>
+int checkData(T* inVec1, T* inVec2, int numVals)
+{
+ int checkSum = 0;
+ for (int n = 0; n < numVals; ++n)
+ {
+ checkSum += std::abs(inVec1[n] - inVec2[n]);
+ }
+ if (checkSum == 0)
+ {
+ //std::cout << "Test Passed\n";
+ return 0;
+ }
+ else
+ {
+ //std::cout << "Test Failed\n";
+ return 1;
+ }
+}
+template int checkData(int8_t*, int8_t*, int);
+template int checkData(int16_t*, int16_t*, int);
+
+int checkDataApprox(int16_t *inVec1, int16_t *inVec2, int numVals)
+{
+ int checkSum = 0;
+ for (int n = 0; n < numVals; ++n)
+ {
+ if (std::abs(inVec1[n] & 0xFF00) - std::abs(inVec2[n] & 0xFF00)){;
+ printf("%d %d\n", inVec1[n] & 0xFF00, inVec2[n] & 0xFF00);
+ checkSum += 1;
+ }
+ }
+ if (checkSum == 0)
+ {
+ //std::cout << "Test Passed\n";
+ return 0;
+ }
+ else
+ {
+ //std::cout << "Test Failed\n";
+ return 1;
+ }
+}
+
+
+class BfpCheck : public KernelTests
+{
+protected:
+ void SetUp() override {
+ init_test("bfp_functional");
+ }
+
+ /* It's called after an execution of the each test case.*/
+ void TearDown() override {
+ }
+};
+
+class BfpPerf : public KernelTests
+{
+protected:
+ void SetUp() override {
+ init_test("bfp_performace");
+ }
+
+ /* It's called after an execution of the each test case.*/
+ void TearDown() override {
+ }
+};
+CACHE_ALIGNED int16_t loc_dataExpandedIn[288*BlockFloatCompander::k_numREReal];
+CACHE_ALIGNED int16_t loc_dataExpandedRes[288*BlockFloatCompander::k_numREReal];
+CACHE_ALIGNED uint8_t loc_dataCompressedDataOut[2*288*BlockFloatCompander::k_numREReal];
+
+class BfpPerfEx : public KernelTests
+{
+protected:
+ struct xranlib_decompress_request bfp_decom_req;
+ struct xranlib_decompress_response bfp_decom_rsp;
+ struct xranlib_compress_request bfp_com_req;
+ struct xranlib_compress_response bfp_com_rsp;
+
+ void SetUp() override {
+ init_test("bfp_performace_ex");
+ int32_t resSum = 0;
+ int16_t len = 0;
+ int16_t compMethod = XRAN_COMPMETHOD_BLKFLOAT;
+ int16_t iqWidth = get_input_parameter<int16_t>("iqWidth");
+ int16_t numRBs = get_input_parameter<int16_t>("nRBsize");
+ // Create random number generator
+ std::random_device rd;
+ std::mt19937 gen(rd()); //Standard mersenne_twister_engine seeded with rd()
+ std::uniform_int_distribution<int16_t> randInt16(-32768, 32767);
+ std::uniform_int_distribution<int> randExpShift(0, 4);
+
+ BlockFloatCompander::ExpandedData expandedData;
+ expandedData.dataExpanded = &loc_dataExpandedIn[0];
+ BlockFloatCompander::ExpandedData expandedDataRes;
+ expandedDataRes.dataExpanded = &loc_dataExpandedRes[0];
+
+ //printf("iqWidth %d numRBs %d\n", iqWidth, numRBs);
+
+ for (int m = 0; m < 18*BlockFloatCompander::k_numRB; ++m) {
+ auto shiftVal = randExpShift(gen);
+ for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n) {
+ expandedData.dataExpanded[m*BlockFloatCompander::k_numREReal+n] = int16_t(randInt16(gen) >> shiftVal);
+ }
+ }
+
+ BlockFloatCompander::CompressedData compressedData;
+ compressedData.dataCompressed = &loc_dataCompressedDataOut[0];
+
+ std::memset(&loc_dataCompressedDataOut[0], 0, 288*BlockFloatCompander::k_numREReal);
+ std::memset(&loc_dataExpandedRes[0], 0, 288*BlockFloatCompander::k_numREReal);
+
+ std::memset(&bfp_com_req, 0, sizeof(struct xranlib_compress_request));
+ std::memset(&bfp_com_rsp, 0, sizeof(struct xranlib_compress_response));
+ std::memset(&bfp_decom_req, 0, sizeof(struct xranlib_decompress_request));
+ std::memset(&bfp_decom_rsp, 0, sizeof(struct xranlib_decompress_response));
+
+ bfp_com_req.data_in = (int16_t *)expandedData.dataExpanded;
+ bfp_com_req.numRBs = numRBs;
+ bfp_com_req.len = numRBs*12*2*2;
+ bfp_com_req.compMethod = compMethod;
+ bfp_com_req.iqWidth = iqWidth;
+
+ bfp_com_rsp.data_out = (int8_t *)(compressedData.dataCompressed);
+ bfp_com_rsp.len = 0;
+
+ bfp_decom_req.data_in = (int8_t *)(compressedData.dataCompressed);
+ bfp_decom_req.numRBs = numRBs;
+ bfp_decom_req.len = ((3 * iqWidth) + 1) * numRBs;
+ bfp_decom_req.compMethod = compMethod;
+ bfp_decom_req.iqWidth = iqWidth;
+
+ bfp_decom_rsp.data_out = (int16_t *)expandedDataRes.dataExpanded;
+ bfp_decom_rsp.len = 0;
+ }
+
+ /* It's called after an execution of the each test case.*/
+ void TearDown() override {
+
+ }
+};
+
+TEST_P(BfpCheck, AVX512_12bit)
+{
+ int resSum = 0;
+
+ // Create random number generator
+ std::random_device rd;
+ std::mt19937 gen(rd()); //Standard mersenne_twister_engine seeded with rd()
+ std::uniform_int_distribution<int16_t> randInt16(-32768, 32767);
+ std::uniform_int_distribution<int> randExpShift(0, 4);
+
+ // Generate random test data for compression kernel
+ BlockFloatCompander::ExpandedData expandedDataInput;
+ expandedDataInput.dataExpanded = &expandedDataInput.dataExpandedIn[0];
+ for (int m = 0; m < BlockFloatCompander::k_numRB; ++m)
+ {
+ auto shiftVal = randExpShift(gen);
+ for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n)
+ {
+ expandedDataInput.dataExpanded[m*BlockFloatCompander::k_numREReal+n] = int16_t(randInt16(gen) >> shiftVal);
+ }
+ }
+
+ BlockFloatCompander::CompressedData compressedDataRef;
+ compressedDataRef.dataCompressed = &compressedDataRef.dataCompressedDataOut[0];
+ BlockFloatCompander::ExpandedData expandedDataRef;
+ expandedDataRef.dataExpanded = &expandedDataRef.dataExpandedIn[0];
+ BlockFloatCompander::CompressedData compressedDataKern;
+ compressedDataKern.dataCompressed = &compressedDataKern.dataCompressedDataOut[0];
+ BlockFloatCompander::ExpandedData expandedDataKern;
+ expandedDataKern.dataExpanded = &expandedDataKern.dataExpandedIn[0];
+
+ //std::cout << "Verifying AVX512 12b iqWidth Kernel\n";
+ expandedDataInput.iqWidth = 12;
+ // Generate reference
+ BlockFloatCompander::BlockFloatCompress_Basic(expandedDataInput, &compressedDataRef);
+ BlockFloatCompander::BlockFloatExpand_Basic(compressedDataRef, &expandedDataRef);
+ // Generate kernel output
+ BlockFloatCompander::BlockFloatCompress_12b_AVX512(expandedDataInput, &compressedDataKern);
+ BlockFloatCompander::BlockFloatExpand_12b_AVX512(compressedDataRef, &expandedDataKern);
+ // Verify
+ auto totNumBytes = ((3 * compressedDataRef.iqWidth) + 1) * BlockFloatCompander::k_numRB;
+ //std::cout << "Compression: ";
+ resSum += checkData(compressedDataRef.dataCompressed, compressedDataKern.dataCompressed, totNumBytes);
+ //std::cout << "Expansion: ";
+ resSum += checkData(expandedDataRef.dataExpanded, expandedDataKern.dataExpanded, BlockFloatCompander::k_numSampsExpanded);
+
+ ASSERT_EQ(0, resSum);
+}
+
+TEST_P(BfpCheck, AVX512_10bit)
+{
+ int resSum = 0;
+
+ // Create random number generator
+ std::random_device rd;
+ std::mt19937 gen(rd()); //Standard mersenne_twister_engine seeded with rd()
+ std::uniform_int_distribution<int16_t> randInt16(-32768, 32767);
+ std::uniform_int_distribution<int> randExpShift(0, 4);
+
+ // Generate random test data for compression kernel
+ BlockFloatCompander::ExpandedData expandedDataInput;
+ expandedDataInput.dataExpanded = &expandedDataInput.dataExpandedIn[0];
+ for (int m = 0; m < BlockFloatCompander::k_numRB; ++m)
+ {
+ auto shiftVal = randExpShift(gen);
+ for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n)
+ {
+ expandedDataInput.dataExpanded[m*BlockFloatCompander::k_numREReal+n] = int16_t(randInt16(gen) >> shiftVal);
+ }
+ }
+
+ BlockFloatCompander::CompressedData compressedDataRef;
+ compressedDataRef.dataCompressed = &compressedDataRef.dataCompressedDataOut[0];
+ BlockFloatCompander::ExpandedData expandedDataRef;
+ expandedDataRef.dataExpanded = &expandedDataRef.dataExpandedIn[0];
+ BlockFloatCompander::CompressedData compressedDataKern;
+ compressedDataKern.dataCompressed = &compressedDataKern.dataCompressedDataOut[0];
+ BlockFloatCompander::ExpandedData expandedDataKern;
+ expandedDataKern.dataExpanded = &expandedDataKern.dataExpandedIn[0];
+
+ //std::cout << "Verifying AVX512 10b iqWidth Kernel\n";
+ expandedDataInput.iqWidth = 10;
+ // Generate reference
+ BlockFloatCompander::BlockFloatCompress_Basic(expandedDataInput, &compressedDataRef);
+ BlockFloatCompander::BlockFloatExpand_Basic(compressedDataRef, &expandedDataRef);
+ // Generate kernel output
+ BlockFloatCompander::BlockFloatCompress_10b_AVX512(expandedDataInput, &compressedDataKern);
+ BlockFloatCompander::BlockFloatExpand_10b_AVX512(compressedDataRef, &expandedDataKern);
+ // Verify
+ auto totNumBytes = ((3 * compressedDataRef.iqWidth) + 1) * BlockFloatCompander::k_numRB;
+ //std::cout << "Compression: ";
+ resSum += checkData(compressedDataRef.dataCompressed, compressedDataKern.dataCompressed, totNumBytes);
+ //std::cout << "Expansion: ";
+ resSum += checkData(expandedDataRef.dataExpanded, expandedDataKern.dataExpanded, BlockFloatCompander::k_numSampsExpanded);
+
+ ASSERT_EQ(0, resSum);
+
+// performance("AVX512", module_name, BlockFloatCompander::BlockFloatCompress_10b_AVX512, expandedDataInput, &compressedDataKern);
+}
+
+TEST_P(BfpCheck, AVX512_9bit)
+{
+ int resSum = 0;
+
+ // Create random number generator
+ std::random_device rd;
+ std::mt19937 gen(rd()); //Standard mersenne_twister_engine seeded with rd()
+ std::uniform_int_distribution<int16_t> randInt16(-32768, 32767);
+ std::uniform_int_distribution<int> randExpShift(0, 4);
+
+ // Generate random test data for compression kernel
+ BlockFloatCompander::ExpandedData expandedDataInput;
+ expandedDataInput.dataExpanded = &expandedDataInput.dataExpandedIn[0];
+ for (int m = 0; m < BlockFloatCompander::k_numRB; ++m)
+ {
+ auto shiftVal = randExpShift(gen);
+ for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n)
+ {
+ expandedDataInput.dataExpanded[m*BlockFloatCompander::k_numREReal+n] = int16_t(randInt16(gen) >> shiftVal);
+ }
+ }
+
+ BlockFloatCompander::CompressedData compressedDataRef;
+ compressedDataRef.dataCompressed = &compressedDataRef.dataCompressedDataOut[0];
+ BlockFloatCompander::ExpandedData expandedDataRef;
+ expandedDataRef.dataExpanded = &expandedDataRef.dataExpandedIn[0];
+ BlockFloatCompander::CompressedData compressedDataKern;
+ compressedDataKern.dataCompressed = &compressedDataKern.dataCompressedDataOut[0];
+ BlockFloatCompander::ExpandedData expandedDataKern;
+ expandedDataKern.dataExpanded = &expandedDataKern.dataExpandedIn[0];
+
+ //std::cout << "Verifying AVX512 9b iqWidth Kernel\n";
+ expandedDataInput.iqWidth = 9;
+ // Generate reference
+ BlockFloatCompander::BlockFloatCompress_Basic(expandedDataInput, &compressedDataRef);
+ BlockFloatCompander::BlockFloatExpand_Basic(compressedDataRef, &expandedDataRef);
+ // Generate kernel output
+ BlockFloatCompander::BlockFloatCompress_9b_AVX512(expandedDataInput, &compressedDataKern);
+ BlockFloatCompander::BlockFloatExpand_9b_AVX512(compressedDataRef, &expandedDataKern);
+ // Verify
+ auto totNumBytes = ((3 * compressedDataRef.iqWidth) + 1) * BlockFloatCompander::k_numRB;
+ //std::cout << "Compression: ";
+ resSum += checkData(compressedDataRef.dataCompressed, compressedDataKern.dataCompressed, totNumBytes);
+ //std::cout << "Expansion: ";
+ resSum += checkData(expandedDataRef.dataExpanded, expandedDataKern.dataExpanded, BlockFloatCompander::k_numSampsExpanded);
+
+ ASSERT_EQ(0, resSum);
+}
+
+
+TEST_P(BfpCheck, AVX512_8bit)
+{
+ int resSum = 0;
+
+ // Create random number generator
+ std::random_device rd;
+ std::mt19937 gen(rd()); //Standard mersenne_twister_engine seeded with rd()
+ std::uniform_int_distribution<int16_t> randInt16(-32768, 32767);
+ std::uniform_int_distribution<int> randExpShift(0, 4);
+
+ // Generate random test data for compression kernel
+ BlockFloatCompander::ExpandedData expandedDataInput;
+ expandedDataInput.dataExpanded = &expandedDataInput.dataExpandedIn[0];
+ for (int m = 0; m < BlockFloatCompander::k_numRB; ++m)
+ {
+ auto shiftVal = randExpShift(gen);
+ for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n)
+ {
+ expandedDataInput.dataExpanded[m*BlockFloatCompander::k_numREReal+n] = int16_t(randInt16(gen) >> shiftVal);
+ }
+ }
+
+ BlockFloatCompander::CompressedData compressedDataRef;
+ compressedDataRef.dataCompressed = &compressedDataRef.dataCompressedDataOut[0];
+ BlockFloatCompander::ExpandedData expandedDataRef;
+ expandedDataRef.dataExpanded = &expandedDataRef.dataExpandedIn[0];
+ BlockFloatCompander::CompressedData compressedDataKern;
+ compressedDataKern.dataCompressed = &compressedDataKern.dataCompressedDataOut[0];
+ BlockFloatCompander::ExpandedData expandedDataKern;
+ expandedDataKern.dataExpanded = &expandedDataKern.dataExpandedIn[0];
+
+ //std::cout << "Verifying AVX512 8bit Kernel\n";
+ expandedDataInput.iqWidth = 8;
+ // Generate reference
+ BlockFloatCompander::BlockFloatCompress_Basic(expandedDataInput, &compressedDataRef);
+ BlockFloatCompander::BlockFloatExpand_Basic(compressedDataRef, &expandedDataRef);
+ // Generate kernel output
+ BlockFloatCompander::BlockFloatCompress_8b_AVX512(expandedDataInput, &compressedDataKern);
+ BlockFloatCompander::BlockFloatExpand_8b_AVX512(compressedDataRef, &expandedDataKern);
+ // Verify
+ auto totNumBytes = ((3 * compressedDataRef.iqWidth) + 1) * BlockFloatCompander::k_numRB;
+ //std::cout << "Compression: ";
+ resSum += checkData(compressedDataRef.dataCompressed, compressedDataKern.dataCompressed, totNumBytes);
+ //std::cout << "Expansion: ";
+ resSum += checkData(expandedDataRef.dataExpanded, expandedDataKern.dataExpanded, BlockFloatCompander::k_numSampsExpanded);
+
+ ASSERT_EQ(0, resSum);
+}
+
+TEST_P(BfpPerf, AVX512_8bit_compression)
+{
+ int resSum = 0;
+
+ // Create random number generator
+ std::random_device rd;
+ std::mt19937 gen(rd()); //Standard mersenne_twister_engine seeded with rd()
+ std::uniform_int_distribution<int16_t> randInt16(-32768, 32767);
+ std::uniform_int_distribution<int> randExpShift(0, 4);
+
+ // Generate random test data for compression kernel
+ BlockFloatCompander::ExpandedData expandedDataInput;
+ expandedDataInput.dataExpanded = &expandedDataInput.dataExpandedIn[0];
+ for (int m = 0; m < BlockFloatCompander::k_numRB; ++m)
+ {
+ auto shiftVal = randExpShift(gen);
+ for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n)
+ {
+ expandedDataInput.dataExpanded[m*BlockFloatCompander::k_numREReal+n] = int16_t(randInt16(gen) >> shiftVal);
+ }
+ }
+
+ BlockFloatCompander::CompressedData compressedDataRef;
+ compressedDataRef.dataCompressed = &compressedDataRef.dataCompressedDataOut[0];
+ BlockFloatCompander::ExpandedData expandedDataRef;
+ expandedDataRef.dataExpanded = &expandedDataRef.dataExpandedIn[0];
+ BlockFloatCompander::CompressedData compressedDataKern;
+ compressedDataKern.dataCompressed = &compressedDataKern.dataCompressedDataOut[0];
+ BlockFloatCompander::ExpandedData expandedDataKern;
+ expandedDataKern.dataExpanded = &expandedDataKern.dataExpandedIn[0];
+
+ //std::cout << "Verifying AVX512 8bit Kernel\n";
+ expandedDataInput.iqWidth = 8;
+ // Generate reference
+ BlockFloatCompander::BlockFloatCompress_Basic(expandedDataInput, &compressedDataRef);
+ BlockFloatCompander::BlockFloatExpand_Basic(compressedDataRef, &expandedDataRef);
+ // Generate kernel output
+ BlockFloatCompander::BlockFloatCompress_8b_AVX512(expandedDataInput, &compressedDataKern);
+ BlockFloatCompander::BlockFloatExpand_8b_AVX512(compressedDataRef, &expandedDataKern);
+ // Verify
+ auto totNumBytes = ((3 * compressedDataRef.iqWidth) + 1) * BlockFloatCompander::k_numRB;
+ //std::cout << "Compression: ";
+ resSum += checkData(compressedDataRef.dataCompressed, compressedDataKern.dataCompressed, totNumBytes);
+ //std::cout << "Expansion: ";
+ resSum += checkData(expandedDataRef.dataExpanded, expandedDataKern.dataExpanded, BlockFloatCompander::k_numSampsExpanded);
+
+ ASSERT_EQ(0, resSum);
+
+ performance("AVX512", module_name, BlockFloatCompander::BlockFloatCompress_8b_AVX512, expandedDataInput, &compressedDataKern);
+}
+
+TEST_P(BfpPerf, AVX512_8bit_decompression)
+{
+ int resSum = 0;
+
+ // Create random number generator
+ std::random_device rd;
+ std::mt19937 gen(rd()); //Standard mersenne_twister_engine seeded with rd()
+ std::uniform_int_distribution<int16_t> randInt16(-32768, 32767);
+ std::uniform_int_distribution<int> randExpShift(0, 4);
+
+ // Generate random test data for compression kernel
+ BlockFloatCompander::ExpandedData expandedDataInput;
+ expandedDataInput.dataExpanded = &expandedDataInput.dataExpandedIn[0];
+ for (int m = 0; m < BlockFloatCompander::k_numRB; ++m)
+ {
+ auto shiftVal = randExpShift(gen);
+ for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n)
+ {
+ expandedDataInput.dataExpanded[m*BlockFloatCompander::k_numREReal+n] = int16_t(randInt16(gen) >> shiftVal);
+ }
+ }
+
+ BlockFloatCompander::CompressedData compressedDataRef;
+ compressedDataRef.dataCompressed = &compressedDataRef.dataCompressedDataOut[0];
+ BlockFloatCompander::ExpandedData expandedDataRef;
+ expandedDataRef.dataExpanded = &expandedDataRef.dataExpandedIn[0];
+ BlockFloatCompander::CompressedData compressedDataKern;
+ compressedDataKern.dataCompressed = &compressedDataKern.dataCompressedDataOut[0];
+ BlockFloatCompander::ExpandedData expandedDataKern;
+ expandedDataKern.dataExpanded = &expandedDataKern.dataExpandedIn[0];
+
+ //std::cout << "Verifying AVX512 8bit Kernel\n";
+ expandedDataInput.iqWidth = 8;
+ // Generate reference
+ BlockFloatCompander::BlockFloatCompress_Basic(expandedDataInput, &compressedDataRef);
+ BlockFloatCompander::BlockFloatExpand_Basic(compressedDataRef, &expandedDataRef);
+ // Generate kernel output
+ BlockFloatCompander::BlockFloatCompress_8b_AVX512(expandedDataInput, &compressedDataKern);
+ BlockFloatCompander::BlockFloatExpand_8b_AVX512(compressedDataRef, &expandedDataKern);
+ // Verify
+ auto totNumBytes = ((3 * compressedDataRef.iqWidth) + 1) * BlockFloatCompander::k_numRB;
+ //std::cout << "Compression: ";
+ resSum += checkData(compressedDataRef.dataCompressed, compressedDataKern.dataCompressed, totNumBytes);
+ //std::cout << "Expansion: ";
+ resSum += checkData(expandedDataRef.dataExpanded, expandedDataKern.dataExpanded, BlockFloatCompander::k_numSampsExpanded);
+
+ ASSERT_EQ(0, resSum);
+
+ performance("AVX512", module_name, BlockFloatCompander::BlockFloatExpand_8b_AVX512, compressedDataRef, &expandedDataKern);
+}
+
+
+
+TEST_P(BfpPerf, AVX512_9bit_compression)
+{
+ int resSum = 0;
+
+ // Create random number generator
+ std::random_device rd;
+ std::mt19937 gen(rd()); //Standard mersenne_twister_engine seeded with rd()
+ std::uniform_int_distribution<int16_t> randInt16(-32768, 32767);
+ std::uniform_int_distribution<int> randExpShift(0, 4);
+
+ // Generate random test data for compression kernel
+ BlockFloatCompander::ExpandedData expandedDataInput;
+ expandedDataInput.dataExpanded = &expandedDataInput.dataExpandedIn[0];
+ for (int m = 0; m < BlockFloatCompander::k_numRB; ++m)
+ {
+ auto shiftVal = randExpShift(gen);
+ for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n)
+ {
+ expandedDataInput.dataExpanded[m*BlockFloatCompander::k_numREReal+n] = int16_t(randInt16(gen) >> shiftVal);
+ }
+ }
+
+ BlockFloatCompander::CompressedData compressedDataRef;
+ compressedDataRef.dataCompressed = &compressedDataRef.dataCompressedDataOut[0];
+ BlockFloatCompander::ExpandedData expandedDataRef;
+ expandedDataRef.dataExpanded = &expandedDataRef.dataExpandedIn[0];
+ BlockFloatCompander::CompressedData compressedDataKern;
+ compressedDataKern.dataCompressed = &compressedDataKern.dataCompressedDataOut[0];
+ BlockFloatCompander::ExpandedData expandedDataKern;
+ expandedDataKern.dataExpanded = &expandedDataKern.dataExpandedIn[0];
+
+ //std::cout << "Verifying AVX512 8bit Kernel\n";
+ expandedDataInput.iqWidth = 9;
+ // Generate reference
+ BlockFloatCompander::BlockFloatCompress_Basic(expandedDataInput, &compressedDataRef);
+ BlockFloatCompander::BlockFloatExpand_Basic(compressedDataRef, &expandedDataRef);
+ // Generate kernel output
+ BlockFloatCompander::BlockFloatCompress_9b_AVX512(expandedDataInput, &compressedDataKern);
+ BlockFloatCompander::BlockFloatExpand_9b_AVX512(compressedDataRef, &expandedDataKern);
+ // Verify
+ auto totNumBytes = ((3 * compressedDataRef.iqWidth) + 1) * BlockFloatCompander::k_numRB;
+ //std::cout << "Compression: ";
+ resSum += checkData(compressedDataRef.dataCompressed, compressedDataKern.dataCompressed, totNumBytes);
+ //std::cout << "Expansion: ";
+ resSum += checkData(expandedDataRef.dataExpanded, expandedDataKern.dataExpanded, BlockFloatCompander::k_numSampsExpanded);
+
+ ASSERT_EQ(0, resSum);
+
+ performance("AVX512", module_name, BlockFloatCompander::BlockFloatCompress_9b_AVX512, expandedDataInput, &compressedDataKern);
+}
+
+
+TEST_P(BfpPerf, AVX512_9bit_decompression)
+{
+ int resSum = 0;
+
+ // Create random number generator
+ std::random_device rd;
+ std::mt19937 gen(rd()); //Standard mersenne_twister_engine seeded with rd()
+ std::uniform_int_distribution<int16_t> randInt16(-32768, 32767);
+ std::uniform_int_distribution<int> randExpShift(0, 4);
+
+ // Generate random test data for compression kernel
+ BlockFloatCompander::ExpandedData expandedDataInput;
+ expandedDataInput.dataExpanded = &expandedDataInput.dataExpandedIn[0];
+ for (int m = 0; m < BlockFloatCompander::k_numRB; ++m)
+ {
+ auto shiftVal = randExpShift(gen);
+ for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n)
+ {
+ expandedDataInput.dataExpanded[m*BlockFloatCompander::k_numREReal+n] = int16_t(randInt16(gen) >> shiftVal);
+ }
+ }
+
+ BlockFloatCompander::CompressedData compressedDataRef;
+ compressedDataRef.dataCompressed = &compressedDataRef.dataCompressedDataOut[0];
+ BlockFloatCompander::ExpandedData expandedDataRef;
+ expandedDataRef.dataExpanded = &expandedDataRef.dataExpandedIn[0];
+ BlockFloatCompander::CompressedData compressedDataKern;
+ compressedDataKern.dataCompressed = &compressedDataKern.dataCompressedDataOut[0];
+ BlockFloatCompander::ExpandedData expandedDataKern;
+ expandedDataKern.dataExpanded = &expandedDataKern.dataExpandedIn[0];
+
+ //std::cout << "Verifying AVX512 8bit Kernel\n";
+ expandedDataInput.iqWidth = 9;
+ // Generate reference
+ BlockFloatCompander::BlockFloatCompress_Basic(expandedDataInput, &compressedDataRef);
+ BlockFloatCompander::BlockFloatExpand_Basic(compressedDataRef, &expandedDataRef);
+ // Generate kernel output
+ BlockFloatCompander::BlockFloatCompress_9b_AVX512(expandedDataInput, &compressedDataKern);
+ BlockFloatCompander::BlockFloatExpand_9b_AVX512(compressedDataRef, &expandedDataKern);
+ // Verify
+ auto totNumBytes = ((3 * compressedDataRef.iqWidth) + 1) * BlockFloatCompander::k_numRB;
+ //std::cout << "Compression: ";
+ resSum += checkData(compressedDataRef.dataCompressed, compressedDataKern.dataCompressed, totNumBytes);
+ //std::cout << "Expansion: ";
+ resSum += checkData(expandedDataRef.dataExpanded, expandedDataKern.dataExpanded, BlockFloatCompander::k_numSampsExpanded);
+
+ ASSERT_EQ(0, resSum);
+
+ performance("AVX512", module_name, BlockFloatCompander::BlockFloatExpand_9b_AVX512, compressedDataRef, &expandedDataKern);
+}
+
+
+TEST_P(BfpPerf, AVX512_10bit_compression)
+{
+ int resSum = 0;
+
+ // Create random number generator
+ std::random_device rd;
+ std::mt19937 gen(rd()); //Standard mersenne_twister_engine seeded with rd()
+ std::uniform_int_distribution<int16_t> randInt16(-32768, 32767);
+ std::uniform_int_distribution<int> randExpShift(0, 4);
+
+ // Generate random test data for compression kernel
+ BlockFloatCompander::ExpandedData expandedDataInput;
+ expandedDataInput.dataExpanded = &expandedDataInput.dataExpandedIn[0];
+ for (int m = 0; m < BlockFloatCompander::k_numRB; ++m)
+ {
+ auto shiftVal = randExpShift(gen);
+ for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n)
+ {
+ expandedDataInput.dataExpanded[m*BlockFloatCompander::k_numREReal+n] = int16_t(randInt16(gen) >> shiftVal);
+ }
+ }
+
+ BlockFloatCompander::CompressedData compressedDataRef;
+ compressedDataRef.dataCompressed = &compressedDataRef.dataCompressedDataOut[0];
+ BlockFloatCompander::ExpandedData expandedDataRef;
+ expandedDataRef.dataExpanded = &expandedDataRef.dataExpandedIn[0];
+ BlockFloatCompander::CompressedData compressedDataKern;
+ compressedDataKern.dataCompressed = &compressedDataKern.dataCompressedDataOut[0];
+ BlockFloatCompander::ExpandedData expandedDataKern;
+ expandedDataKern.dataExpanded = &expandedDataKern.dataExpandedIn[0];
+
+ //std::cout << "Verifying AVX512 8bit Kernel\n";
+ expandedDataInput.iqWidth = 10;
+ // Generate reference
+ BlockFloatCompander::BlockFloatCompress_Basic(expandedDataInput, &compressedDataRef);
+ BlockFloatCompander::BlockFloatExpand_Basic(compressedDataRef, &expandedDataRef);
+ // Generate kernel output
+ BlockFloatCompander::BlockFloatCompress_10b_AVX512(expandedDataInput, &compressedDataKern);
+ BlockFloatCompander::BlockFloatExpand_10b_AVX512(compressedDataRef, &expandedDataKern);
+ // Verify
+ auto totNumBytes = ((3 * compressedDataRef.iqWidth) + 1) * BlockFloatCompander::k_numRB;
+ //std::cout << "Compression: ";
+ resSum += checkData(compressedDataRef.dataCompressed, compressedDataKern.dataCompressed, totNumBytes);
+ //std::cout << "Expansion: ";
+ resSum += checkData(expandedDataRef.dataExpanded, expandedDataKern.dataExpanded, BlockFloatCompander::k_numSampsExpanded);
+
+ ASSERT_EQ(0, resSum);
+
+ performance("AVX512", module_name, BlockFloatCompander::BlockFloatCompress_10b_AVX512, expandedDataInput, &compressedDataKern);
+}
+
+TEST_P(BfpPerf, AVX512_10bit_decompression)
+{
+ int resSum = 0;
+
+ // Create random number generator
+ std::random_device rd;
+ std::mt19937 gen(rd()); //Standard mersenne_twister_engine seeded with rd()
+ std::uniform_int_distribution<int16_t> randInt16(-32768, 32767);
+ std::uniform_int_distribution<int> randExpShift(0, 4);
+
+ // Generate random test data for compression kernel
+ BlockFloatCompander::ExpandedData expandedDataInput;
+ expandedDataInput.dataExpanded = &expandedDataInput.dataExpandedIn[0];
+ for (int m = 0; m < BlockFloatCompander::k_numRB; ++m)
+ {
+ auto shiftVal = randExpShift(gen);
+ for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n)
+ {
+ expandedDataInput.dataExpanded[m*BlockFloatCompander::k_numREReal+n] = int16_t(randInt16(gen) >> shiftVal);
+ }
+ }
+
+ BlockFloatCompander::CompressedData compressedDataRef;
+ compressedDataRef.dataCompressed = &compressedDataRef.dataCompressedDataOut[0];
+ BlockFloatCompander::ExpandedData expandedDataRef;
+ expandedDataRef.dataExpanded = &expandedDataRef.dataExpandedIn[0];
+ BlockFloatCompander::CompressedData compressedDataKern;
+ compressedDataKern.dataCompressed = &compressedDataKern.dataCompressedDataOut[0];
+ BlockFloatCompander::ExpandedData expandedDataKern;
+ expandedDataKern.dataExpanded = &expandedDataKern.dataExpandedIn[0];
+
+ //std::cout << "Verifying AVX512 8bit Kernel\n";
+ expandedDataInput.iqWidth = 10;
+ // Generate reference
+ BlockFloatCompander::BlockFloatCompress_Basic(expandedDataInput, &compressedDataRef);
+ BlockFloatCompander::BlockFloatExpand_Basic(compressedDataRef, &expandedDataRef);
+ // Generate kernel output
+ BlockFloatCompander::BlockFloatCompress_10b_AVX512(expandedDataInput, &compressedDataKern);
+ BlockFloatCompander::BlockFloatExpand_10b_AVX512(compressedDataRef, &expandedDataKern);
+ // Verify
+ auto totNumBytes = ((3 * compressedDataRef.iqWidth) + 1) * BlockFloatCompander::k_numRB;
+ //std::cout << "Compression: ";
+ resSum += checkData(compressedDataRef.dataCompressed, compressedDataKern.dataCompressed, totNumBytes);
+ //std::cout << "Expansion: ";
+ resSum += checkData(expandedDataRef.dataExpanded, expandedDataKern.dataExpanded, BlockFloatCompander::k_numSampsExpanded);
+
+ ASSERT_EQ(0, resSum);
+
+ performance("AVX512", module_name, BlockFloatCompander::BlockFloatExpand_10b_AVX512, compressedDataRef, &expandedDataKern);
+}
+
+TEST_P(BfpPerf, AVX512_12bit_compression)
+{
+ int resSum = 0;
+
+ // Create random number generator
+ std::random_device rd;
+ std::mt19937 gen(rd()); //Standard mersenne_twister_engine seeded with rd()
+ std::uniform_int_distribution<int16_t> randInt16(-32768, 32767);
+ std::uniform_int_distribution<int> randExpShift(0, 4);
+
+ // Generate random test data for compression kernel
+ BlockFloatCompander::ExpandedData expandedDataInput;
+ expandedDataInput.dataExpanded = &expandedDataInput.dataExpandedIn[0];
+ for (int m = 0; m < BlockFloatCompander::k_numRB; ++m)
+ {
+ auto shiftVal = randExpShift(gen);
+ for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n)
+ {
+ expandedDataInput.dataExpanded[m*BlockFloatCompander::k_numREReal+n] = int16_t(randInt16(gen) >> shiftVal);
+ }
+ }
+
+ BlockFloatCompander::CompressedData compressedDataRef;
+ compressedDataRef.dataCompressed = &compressedDataRef.dataCompressedDataOut[0];
+ BlockFloatCompander::ExpandedData expandedDataRef;
+ expandedDataRef.dataExpanded = &expandedDataRef.dataExpandedIn[0];
+ BlockFloatCompander::CompressedData compressedDataKern;
+ compressedDataKern.dataCompressed = &compressedDataKern.dataCompressedDataOut[0];
+ BlockFloatCompander::ExpandedData expandedDataKern;
+ expandedDataKern.dataExpanded = &expandedDataKern.dataExpandedIn[0];
+
+ //std::cout << "Verifying AVX512 8bit Kernel\n";
+ expandedDataInput.iqWidth = 12;
+ // Generate reference
+ BlockFloatCompander::BlockFloatCompress_Basic(expandedDataInput, &compressedDataRef);
+ BlockFloatCompander::BlockFloatExpand_Basic(compressedDataRef, &expandedDataRef);
+ // Generate kernel output
+ BlockFloatCompander::BlockFloatCompress_12b_AVX512(expandedDataInput, &compressedDataKern);
+ BlockFloatCompander::BlockFloatExpand_12b_AVX512(compressedDataRef, &expandedDataKern);
+ // Verify
+ auto totNumBytes = ((3 * compressedDataRef.iqWidth) + 1) * BlockFloatCompander::k_numRB;
+ //std::cout << "Compression: ";
+ resSum += checkData(compressedDataRef.dataCompressed, compressedDataKern.dataCompressed, totNumBytes);
+ //std::cout << "Expansion: ";
+ resSum += checkData(expandedDataRef.dataExpanded, expandedDataKern.dataExpanded, BlockFloatCompander::k_numSampsExpanded);
+
+ ASSERT_EQ(0, resSum);
+
+ performance("AVX512", module_name, BlockFloatCompander::BlockFloatCompress_12b_AVX512, expandedDataInput, &compressedDataKern);
+}
+
+
+TEST_P(BfpPerf, AVX512_12bit_decompression)
+{
+ int resSum = 0;
+
+ // Create random number generator
+ std::random_device rd;
+ std::mt19937 gen(rd()); //Standard mersenne_twister_engine seeded with rd()
+ std::uniform_int_distribution<int16_t> randInt16(-32768, 32767);
+ std::uniform_int_distribution<int> randExpShift(0, 4);
+
+ // Generate random test data for compression kernel
+ BlockFloatCompander::ExpandedData expandedDataInput;
+ expandedDataInput.dataExpanded = &expandedDataInput.dataExpandedIn[0];
+ for (int m = 0; m < BlockFloatCompander::k_numRB; ++m)
+ {
+ auto shiftVal = randExpShift(gen);
+ for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n)
+ {
+ expandedDataInput.dataExpanded[m*BlockFloatCompander::k_numREReal+n] = int16_t(randInt16(gen) >> shiftVal);
+ }
+ }
+
+ BlockFloatCompander::CompressedData compressedDataRef;
+ compressedDataRef.dataCompressed = &compressedDataRef.dataCompressedDataOut[0];
+ BlockFloatCompander::ExpandedData expandedDataRef;
+ expandedDataRef.dataExpanded = &expandedDataRef.dataExpandedIn[0];
+ BlockFloatCompander::CompressedData compressedDataKern;
+ compressedDataKern.dataCompressed = &compressedDataKern.dataCompressedDataOut[0];
+ BlockFloatCompander::ExpandedData expandedDataKern;
+ expandedDataKern.dataExpanded = &expandedDataKern.dataExpandedIn[0];
+
+ //std::cout << "Verifying AVX512 8bit Kernel\n";
+ expandedDataInput.iqWidth = 12;
+ // Generate reference
+ BlockFloatCompander::BlockFloatCompress_Basic(expandedDataInput, &compressedDataRef);
+ BlockFloatCompander::BlockFloatExpand_Basic(compressedDataRef, &expandedDataRef);
+ // Generate kernel output
+ BlockFloatCompander::BlockFloatCompress_12b_AVX512(expandedDataInput, &compressedDataKern);
+ BlockFloatCompander::BlockFloatExpand_12b_AVX512(compressedDataRef, &expandedDataKern);
+ // Verify
+ auto totNumBytes = ((3 * compressedDataRef.iqWidth) + 1) * BlockFloatCompander::k_numRB;
+ //std::cout << "Compression: ";
+ resSum += checkData(compressedDataRef.dataCompressed, compressedDataKern.dataCompressed, totNumBytes);
+ //std::cout << "Expansion: ";
+ resSum += checkData(expandedDataRef.dataExpanded, expandedDataKern.dataExpanded, BlockFloatCompander::k_numSampsExpanded);
+
+ ASSERT_EQ(0, resSum);
+
+ performance("AVX512", module_name, BlockFloatCompander::BlockFloatExpand_12b_AVX512, compressedDataRef, &expandedDataKern);
+}
+
+TEST_P(BfpCheck, AVX512_sweep_xranlib)
+{
+ int32_t resSum = 0;
+ int16_t len = 0;
+
+ int16_t compMethod = XRAN_COMPMETHOD_BLKFLOAT;
+ int16_t iqWidth[] = {8, 9, 10, 12};
+
+ int16_t numRBs[] = {16, 18, 32, 36, 48, 70, 113, 273};
+ struct xranlib_decompress_request bfp_decom_req;
+ struct xranlib_decompress_response bfp_decom_rsp;
+
+ struct xranlib_compress_request bfp_com_req;
+ struct xranlib_compress_response bfp_com_rsp;
+
+ // Create random number generator
+ std::random_device rd;
+ std::mt19937 gen(rd()); //Standard mersenne_twister_engine seeded with rd()
+ std::uniform_int_distribution<int16_t> randInt16(-32768, 32767);
+ std::uniform_int_distribution<int> randExpShift(0, 4);
+
+ BlockFloatCompander::ExpandedData expandedData;
+ expandedData.dataExpanded = &loc_dataExpandedIn[0];
+ BlockFloatCompander::ExpandedData expandedDataRes;
+ expandedDataRes.dataExpanded = &loc_dataExpandedRes[0];
+ for (int iq_w_id = 0; iq_w_id < sizeof(iqWidth)/sizeof(iqWidth[0]); iq_w_id ++){
+ for (int tc = 0; tc < sizeof(numRBs)/sizeof(numRBs[0]); tc ++){
+
+ //printf("[%d]numRBs %d [%d] iqWidth %d\n",tc, numRBs[tc], iq_w_id, iqWidth[iq_w_id]);
+ // Generate random test data for compression kernel
+
+ for (int m = 0; m < 18*BlockFloatCompander::k_numRB; ++m) {
+ auto shiftVal = randExpShift(gen);
+ for (int n = 0; n < BlockFloatCompander::k_numREReal; ++n) {
+ expandedData.dataExpanded[m*BlockFloatCompander::k_numREReal+n] = int16_t(randInt16(gen) >> shiftVal);
+ }
+ }
+
+ BlockFloatCompander::CompressedData compressedData;
+ compressedData.dataCompressed = &loc_dataCompressedDataOut[0];
+
+ std::memset(&loc_dataCompressedDataOut[0], 0, 288*BlockFloatCompander::k_numREReal);
+ std::memset(&loc_dataExpandedRes[0], 0, 288*BlockFloatCompander::k_numREReal);
+
+ std::memset(&bfp_com_req, 0, sizeof(struct xranlib_compress_request));
+ std::memset(&bfp_com_rsp, 0, sizeof(struct xranlib_compress_response));
+ std::memset(&bfp_decom_req, 0, sizeof(struct xranlib_decompress_request));
+ std::memset(&bfp_decom_rsp, 0, sizeof(struct xranlib_decompress_response));
+
+ bfp_com_req.data_in = (int16_t *)expandedData.dataExpanded;
+ bfp_com_req.numRBs = numRBs[tc];
+ bfp_com_req.len = numRBs[tc]*12*2*2;
+ bfp_com_req.compMethod = compMethod;
+ bfp_com_req.iqWidth = iqWidth[iq_w_id];
+
+ bfp_com_rsp.data_out = (int8_t *)(compressedData.dataCompressed);
+ bfp_com_rsp.len = 0;
+
+ xranlib_compress_avx512(&bfp_com_req, &bfp_com_rsp);
+
+ bfp_decom_req.data_in = (int8_t *)(compressedData.dataCompressed);
+ bfp_decom_req.numRBs = numRBs[tc];
+ bfp_decom_req.len = bfp_com_rsp.len;
+ bfp_decom_req.compMethod = compMethod;
+ bfp_decom_req.iqWidth = iqWidth[iq_w_id];
+
+ bfp_decom_rsp.data_out = (int16_t *)expandedDataRes.dataExpanded;
+ bfp_decom_rsp.len = 0;
+
+ xranlib_decompress_avx512(&bfp_decom_req, &bfp_decom_rsp);
+
+ resSum += checkDataApprox(expandedData.dataExpanded, expandedDataRes.dataExpanded, numRBs[tc]*BlockFloatCompander::k_numREReal);
+
+ ASSERT_EQ(numRBs[tc]*12*2*2, bfp_decom_rsp.len);
+ ASSERT_EQ(0, resSum);
+ }
+ }
+}
+
+TEST_P(BfpPerfEx, AVX512_Comp)
+{
+ performance("AVX512", module_name, xranlib_compress_avx512, &bfp_com_req, &bfp_com_rsp);
+}
+
+TEST_P(BfpPerfEx, AVX512_DeComp)
+{
+ performance("AVX512", module_name, xranlib_decompress_avx512, &bfp_decom_req, &bfp_decom_rsp);
+}
+
+INSTANTIATE_TEST_CASE_P(UnitTest, BfpCheck,
+ testing::ValuesIn(get_sequence(BfpCheck::get_number_of_cases("bfp_functional"))));
+
+INSTANTIATE_TEST_CASE_P(UnitTest, BfpPerf,
+ testing::ValuesIn(get_sequence(BfpPerf::get_number_of_cases("bfp_performace"))));
+
+
+INSTANTIATE_TEST_CASE_P(UnitTest, BfpPerfEx,
+ testing::ValuesIn(get_sequence(BfpPerf::get_number_of_cases("bfp_performace_ex"))));
+
+
-{\r
- "GLOBAL": {\r
- "io_cfg": {\r
- "dpdk_dev_up": "",\r
- "dpdk_dev_cp": "",\r
- "bbdev_mode": "none",\r
- "system_core": 0,\r
- "core": 5,\r
- "pkt_proc_core": 6,\r
- "timing_core": 7,\r
- "pkt_aux_core": 0,\r
- "dpdkBasebandFecMode": 0,\r
- "dpdkBasebandDevice": "",\r
- "mtu": 9600,\r
- "o_du_macaddr": "00:11:22:33:44:66",\r
- "o_ru_macaddr": "00:11:22:33:44:55",\r
- "cp_vlan_tag": 1,\r
- "up_vlan_tag": 2\r
- },\r
-\r
- "eAxCId_cfg": {\r
- "bit_cuPortId": 4,\r
- "bit_bandSectorId": 4,\r
- "bit_ccId": 4,\r
- "bit_ruPortId": 4\r
- },\r
-\r
- "prach_cfg": {\r
- "scs": 0,\r
- "freq_start": 0,\r
- "filter_id": 3,\r
- "config_id": 189,\r
- "freq_offset": 1\r
- },\r
-\r
- "ru_cfg": {\r
- "category": "A",\r
- "duplex": "TDD",\r
- "slot_config": "slotcfg_0",\r
- "sub6": true,\r
- "mu": 0,\r
- "num_cc": 6,\r
- "num_eaxc": 8,\r
- "ant_elm_trx": 32,\r
- "chbw_dl": 20,\r
- "chbw_ul": 20,\r
- "iq_width": 16,\r
- "comp_meth": 0,\r
- "fft_size": 1024,\r
- "totalBfWeights": 32,\r
- "Tadv_cp_dl": 0,\r
- "T2a_min_cp_dl": 0,\r
- "T2a_max_cp_dl": 0,\r
- "T2a_min_cp_ul": 0,\r
- "T2a_max_cp_ul": 0,\r
- "T2a_min_up": 0,\r
- "T2a_max_up": 0,\r
- "Ta3_min": 0,\r
- "Ta3_max": 0,\r
- "T1a_min_cp_dl": 0,\r
- "T1a_max_cp_dl": 0,\r
- "T1a_min_cp_ul": 0,\r
- "T1a_max_cp_ul": 0,\r
- "T1a_min_up": 0,\r
- "T1a_max_up": 0,\r
- "Ta4_min": 0,\r
- "Ta4_max": 0\r
- },\r
- "slotcfg_0": {\r
- "desc": "DDDSUUDDDD_644",\r
- "period": 10,\r
- "slot0": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ],\r
- "slot1": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ],\r
- "slot2": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ],\r
- "slot3": [ 0, 0, 0, 0, 0, 0, 2, 2, 2, 2, 1, 1, 1, 1 ],\r
- "slot4": [ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 ],\r
- "slot5": [ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 ],\r
- "slot6": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ],\r
- "slot7": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ],\r
- "slot8": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ],\r
- "slot9": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]\r
- },\r
- "slotcfg_1": {\r
- "desc": "DDDS_1211",\r
- "period": 4,\r
- "slot0": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ],\r
- "slot1": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ],\r
- "slot2": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ],\r
- "slot3": [ 0, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 ]\r
- }\r
- },\r
-\r
- "u_plane_functional": [\r
- {\r
- "name": "U_plane",\r
- "parameters": {\r
- "test_type": 0,\r
- "input": "test_vectors/u-plane_in.bin",\r
- "input_len": 2400,\r
- "num_of_cases": 1\r
- },\r
-\r
- "references": {\r
- "output": "test_vectors/u-palne_out.bin",\r
- "output_len": 2400\r
- }\r
- }\r
- ],\r
-\r
- "C_Plane": [\r
- {\r
- "name": "DL_SectionType1_SingleSection",\r
- "parameters": {\r
- "direction": "DL",\r
- "section_type": 1,\r
- "num_sections": 1,\r
- "cc_id": 0,\r
- "ant_id": 0,\r
- "seq_id": 0,\r
- "frame_id": 0,\r
- "subframe_id": 0,\r
- "slot_id": 0,\r
- "symbol_start": 0,\r
- "symbol_num": 14,\r
- "prb_start": [ 0 ],\r
- "prb_num": [ 66 ],\r
- "comp_method": 0,\r
- "beam_id": 0,\r
- "section_id": 0,\r
- "iq_width": 16\r
- }\r
- },\r
- {\r
- "name": "UL_SectionType1_SingleSection",\r
- "parameters": {\r
- "direction": "UL",\r
- "section_type": 1,\r
- "num_sections": 1,\r
- "cc_id": 0,\r
- "ant_id": 0,\r
- "seq_id": 0,\r
- "frame_id": 0,\r
- "subframe_id": 0,\r
- "slot_id": 0,\r
- "symbol_start": 0,\r
- "symbol_num": 14,\r
- "prb_start": [ 0 ],\r
- "prb_num": [ 66 ],\r
- "comp_method": 0,\r
- "beam_id": 0,\r
- "section_id": 0,\r
- "iq_width": 16\r
- }\r
- },\r
- {\r
- "name": "DL_SectionType1_MultiSection",\r
- "parameters": {\r
- "direction": "DL",\r
- "section_type": 1,\r
- "num_sections": 3,\r
- "cc_id": 0,\r
- "ant_id": 0,\r
- "seq_id": 0,\r
- "frame_id": 0,\r
- "subframe_id": 0,\r
- "slot_id": 0,\r
- "symbol_start": 0,\r
- "symbol_num": 14,\r
- "prb_start": [ 0, 22, 44 ],\r
- "prb_num": [ 22, 22, 22 ],\r
- "comp_method": 0,\r
- "beam_id": 0,\r
- "section_id": 0,\r
- "iq_width": 16\r
- }\r
- },\r
- {\r
- "name": "UL_SectionType1_MultiSection",\r
- "parameters": {\r
- "direction": "UL",\r
- "section_type": 1,\r
- "num_sections": 4,\r
- "cc_id": 0,\r
- "ant_id": 0,\r
- "seq_id": 0,\r
- "frame_id": 0,\r
- "subframe_id": 0,\r
- "slot_id": 0,\r
- "symbol_start": 0,\r
- "symbol_num": 14,\r
- "prb_start": [ 0, 25, 50, 75 ],\r
- "prb_num": [ 25, 25, 25, 25 ],\r
- "comp_method": 0,\r
- "beam_id": 0,\r
- "section_id": 0,\r
- "iq_width": 16\r
- }\r
- },\r
- {\r
- "name":"UL_SectionType3_SingleSection",\r
- "parameters": {\r
- "direction": "UL",\r
- "section_type": 3,\r
- "num_sections": 1,\r
- "cc_id": 0,\r
- "ant_id": 0,\r
- "seq_id": 0,\r
- "frame_id": 0,\r
- "subframe_id": 0,\r
- "slot_id": 0,\r
- "symbol_start": 7,\r
- "symbol_num": 6,\r
- "prb_start": [ 0 ],\r
- "prb_num": [ 12 ],\r
- "comp_method": 0,\r
- "beam_id": 0,\r
- "section_id": 0,\r
- "iq_width": 16,\r
- "filter_index": 3,\r
- "time_offset": 2026,\r
- "freq_offset": -792,\r
- "fft_size": 10,\r
- "scs": 3,\r
- "cp_length": 0\r
- }\r
- }\r
- ],\r
-\r
- "TestChain": [\r
- {\r
- "name": "FDD_CATA_MU0_20_1CC_4ANT",\r
- "parameters": {\r
- "category": "A",\r
- "sub6": true,\r
- "mu": 0,\r
- "duplex": "FDD",\r
- "slot_config": "slotcfg_0",\r
- "chbw_dl": 20,\r
- "fftsize_dl": 1024,\r
- "chbw_ul": 20,\r
- "fftsize_ul": 1024,\r
- "num_cc": 1,\r
- "num_eaxc": 4,\r
- "antelm_trx": 32,\r
- "iq_width": 16,\r
- "comp_meth": 0,\r
- "totalBfWeights": 32,\r
- "num_slots": 10,\r
- "bfw_prefix_dl": "test_vectors/mu1_100_32/dl_bfw_ue_",\r
- "bfw_prefix_ul": "test_vectors/mu1_100_32/ul_bfw_ue_"\r
- }\r
- },\r
- {\r
- "name": "FDD_CATA_MU0_20_1CC_8ANT",\r
- "parameters": {\r
- "category": "A",\r
- "sub6": true,\r
- "mu": 0,\r
- "duplex": "FDD",\r
- "slot_config": "slotcfg_0",\r
- "chbw_dl": 20,\r
- "fftsize_dl": 1024,\r
- "chbw_ul": 20,\r
- "fftsize_ul": 1024,\r
- "num_cc": 1,\r
- "num_eaxc": 8,\r
- "antelm_trx": 32,\r
- "iq_width": 16,\r
- "comp_meth": 0,\r
- "totalBfWeights": 32,\r
- "num_slots": 10,\r
- "bfw_prefix_dl": "test_vectors/mu1_100_32/dl_bfw_ue_",\r
- "bfw_prefix_ul": "test_vectors/mu1_100_32/ul_bfw_ue_"\r
-\r
- }\r
- },\r
- {\r
- "name": "FDD_CATA_MU0_20_6CC_4ANT",\r
- "parameters": {\r
- "category": "A",\r
- "sub6": true,\r
- "mu": 0,\r
- "duplex": "FDD",\r
- "slot_config": "slotcfg_0",\r
- "chbw_dl": 20,\r
- "fftsize_dl": 1024,\r
- "chbw_ul": 20,\r
- "fftsize_ul": 1024,\r
- "num_cc": 6,\r
- "num_eaxc": 4,\r
- "antelm_trx": 32,\r
- "iq_width": 16,\r
- "comp_meth": 0,\r
- "totalBfWeights": 32,\r
- "num_slots": 10,\r
- "bfw_prefix_dl": "test_vectors/mu1_100_32/dl_bfw_ue_",\r
- "bfw_prefix_ul": "test_vectors/mu1_100_32/ul_bfw_ue_"\r
- }\r
- },\r
- {\r
- "name": "FDD_CATA_MU0_20_6CC_8ANT",\r
- "parameters": {\r
- "category": "A",\r
- "sub6": true,\r
- "mu": 0,\r
- "duplex": "FDD",\r
- "slot_config": "slotcfg_0",\r
- "chbw_dl": 20,\r
- "fftsize_dl": 1024,\r
- "chbw_ul": 20,\r
- "fftsize_ul": 1024,\r
- "num_cc": 6,\r
- "num_eaxc": 8,\r
- "antelm_trx": 32,\r
- "iq_width": 16,\r
- "comp_meth": 0,\r
- "totalBfWeights": 32,\r
- "num_slots": 10,\r
- "bfw_prefix_dl": "test_vectors/mu1_100_32/dl_bfw_ue_",\r
- "bfw_prefix_ul": "test_vectors/mu1_100_32/ul_bfw_ue_"\r
-\r
- }\r
- },\r
- {\r
- "name": "TDD_CATA_MU1_100_1CC_4",\r
- "parameters": {\r
- "category": "A",\r
- "sub6": true,\r
- "mu": 1,\r
- "duplex": "TDD",\r
- "slot_config": "slotcfg_0",\r
- "chbw_dl": 100,\r
- "fftsize_dl": 4096,\r
- "chbw_ul": 100,\r
- "fftsize_ul": 4096,\r
- "num_cc": 1,\r
- "num_eaxc": 4,\r
- "antelm_trx": 32,\r
- "iq_width": 16,\r
- "comp_meth": 0,\r
- "totalBfWeights": 32,\r
- "num_slots": 10,\r
- "bfw_prefix_dl": "test_vectors/mu1_100_32/dl_bfw_ue_",\r
- "bfw_prefix_ul": "test_vectors/mu1_100_32/ul_bfw_ue_"\r
-\r
- }\r
- },\r
- {\r
- "name": "TDD_CATA_MU1_100_1CC_8",\r
- "parameters": {\r
- "category": "A",\r
- "sub6": true,\r
- "mu": 1,\r
- "duplex": "TDD",\r
- "slot_config": "slotcfg_0",\r
- "chbw_dl": 100,\r
- "fftsize_dl": 4096,\r
- "chbw_ul": 100,\r
- "fftsize_ul": 4096,\r
- "num_cc": 1,\r
- "num_eaxc": 8,\r
- "antelm_trx": 32,\r
- "iq_width": 16,\r
- "comp_meth": 0,\r
- "totalBfWeights": 32,\r
- "num_slots": 10,\r
- "bfw_prefix_dl": "test_vectors/mu1_100_32/dl_bfw_ue_",\r
- "bfw_prefix_ul": "test_vectors/mu1_100_32/ul_bfw_ue_"\r
- }\r
- },\r
- {\r
- "name": "TDD_CATA_MU3_100_1CC_4",\r
- "parameters": {\r
- "category": "A",\r
- "sub6": false,\r
- "mu": 3,\r
- "duplex": "TDD",\r
- "slot_config": "slotcfg_1",\r
- "chbw_dl": 100,\r
- "fftsize_dl": 1024,\r
- "chbw_ul": 100,\r
- "fftsize_ul": 1024,\r
- "num_cc": 1,\r
- "num_eaxc": 4,\r
- "antelm_trx": 32,\r
- "iq_width": 16,\r
- "comp_meth": 0,\r
- "totalBfWeights": 32,\r
- "num_slots": 10,\r
- "bfw_prefix_dl": "test_vectors/mu1_100_32/dl_bfw_ue_",\r
- "bfw_prefix_ul": "test_vectors/mu1_100_32/ul_bfw_ue_"\r
- }\r
- },\r
- {\r
- "name": "TDD_CATB_MU1_100_1CC_8",\r
- "parameters": {\r
- "category": "B",\r
- "sub6": true,\r
- "mu": 1,\r
- "duplex": "TDD",\r
- "slot_config": "slotcfg_0",\r
- "chbw_dl": 100,\r
- "fftsize_dl": 4096,\r
- "chbw_ul": 100,\r
- "fftsize_ul": 4096,\r
- "num_cc": 1,\r
- "num_eaxc": 8,\r
- "antelm_trx": 32,\r
- "iq_width": 16,\r
- "comp_meth": 0,\r
- "totalBfWeights": 32,\r
- "num_slots": 10,\r
- "bfw_prefix_dl": "test_vectors/mu1_100_32/dl_bfw_ue_",\r
- "bfw_prefix_ul": "test_vectors/mu1_100_32/ul_bfw_ue_"\r
- }\r
- }\r
- ],\r
-\r
- "init_sys_functional": [\r
- {\r
- "name": "xran_lib_api",\r
- "parameters": {\r
- "id": 0,\r
- "dpdk_dev": [ "0000:d8:02.0", "0000:d8:02.1" ],\r
- "bbdev_dev": "none",\r
- "bbdev_mode": 0,\r
- "core": 5,\r
- "system_core": 0,\r
- "pkt_proc_core": 6,\r
- "pkt_aux_core": 0,\r
- "timing_core": 7,\r
- "port": [ 0, 1 ],\r
- "dpdkBasebandFecMode": 0,\r
- "dpdkBasebandDevice": "none",\r
- "filePrefix": "wls",\r
- "xranCat": 0,\r
- "mtu": 9600,\r
- "p_o_du_addr": "00:11:22:33:44:66",\r
- "p_o_ru_addr": "00:11:22:33:44:55",\r
- "Tadv_cp_dl": 0,\r
- "T2a_min_cp_dl": 0,\r
- "T2a_max_cp_dl": 0,\r
- "T2a_min_cp_ul": 0,\r
- "T2a_max_cp_ul": 0,\r
- "T2a_min_up": 0,\r
- "T2a_max_up": 0,\r
- "Ta3_min": 0,\r
- "Ta3_max": 0,\r
- "T1a_min_cp_dl": 0,\r
- "T1a_max_cp_dl": 0,\r
- "T1a_min_cp_ul": 0,\r
- "T1a_max_cp_ul": 0,\r
- "T1a_min_up": 0,\r
- "T1a_max_up": 0,\r
- "Ta4_min": 0,\r
- "Ta4_max": 0,\r
- "enableCP": 1,\r
- "prachEnable": 1,\r
- "cp_vlan_tag": 2,\r
- "up_vlan_tag": 1,\r
- "debugStop": 0,\r
- "debugStopCount": 0,\r
- "DynamicSectionEna": 0\r
- }\r
- }\r
- ],\r
-\r
- "prach_functional": [\r
- {\r
- "name": "Prach_test",\r
- "parameters": {\r
- "Numerology": 1,\r
- "FrameDuplexType": 0,\r
- "loglevel": 1,\r
- "PrachConfIdx": 189,\r
- "PrachFreqStart": 0,\r
- "PrachFreqOffset": 0,\r
- "PrachSubcSpacing": 1,\r
- "frameId": 0,\r
- "subframeId": 1,\r
- "slotId": 0,\r
- "beamId": 0,\r
- "ccId": 0,\r
- "antId": 0,\r
- "iqWidth": 16,\r
- "compMeth": 0,\r
- "fftSize": 10\r
- },\r
-\r
- "references": {\r
- "filterIdx": 3,\r
- "startSymId": 0,\r
- "startPrbc": 0,\r
- "numPrbc": 12,\r
- "timeOffset": 216,\r
- "freqOffset": 0,\r
- "x_value": 1,\r
- "nrofPrachInSlot": 1,\r
- "y_value": [ 0, 0 ],\r
- "numSymbol": 2,\r
- "occassionsInPrachSlot": 7,\r
- "isPRACHslot": [ 1, 6 ],\r
- "SlotNrNum": 2,\r
- "prach_start_symbol": 0,\r
- "prach_last_symbol": 13,\r
- "m_params_timeOffset": 108,\r
- "id": 0\r
- }\r
- }\r
- ],\r
- "prach_performance": [\r
- {\r
- "name": "Prach_test",\r
- "parameters": {\r
- "Numerology": 1,\r
- "FrameDuplexType": 0,\r
- "loglevel": 1,\r
- "PrachConfIdx": 189,\r
- "PrachFreqStart": 0,\r
- "PrachFreqOffset": 0,\r
- "PrachSubcSpacing": 1,\r
- "frameId": 0,\r
- "subframeId": 1,\r
- "slotId": 0,\r
- "beamId": 0,\r
- "ccId": 0,\r
- "antId": 0\r
- },\r
-\r
- "references": {\r
- "filterIdx": 3,\r
- "startSymId": 0,\r
- "startPrbc": 0,\r
- "numPrbc": 12,\r
- "timeOffset": 216,\r
- "freqOffset": 0,\r
- "x_value": 1,\r
- "nrofPrachInSlot": 1,\r
- "y_value": [ 0, 0 ],\r
-\r
- "numSymbol": 2,\r
- "occassionsInPrachSlot": 7,\r
- "isPRACHslot": [ 1, 6 ],\r
- "SlotNrNum": 2,\r
- "prach_start_symbol": 0,\r
- "prach_last_symbol": 13\r
-\r
- }\r
- }\r
- ],\r
-\r
- "u_plane_perormace": [\r
- {\r
- "name": "U-plane",\r
- "parameters": {\r
- "test_type": 0,\r
- "input": "test_vectors/u-plane_in.bin",\r
- "input_len": 2400,\r
- "num_of_cases": 1\r
- },\r
-\r
- "references": {\r
- "output": "test_vectors/u-palne_out.bin",\r
- "output_len": 2400\r
- }\r
- }\r
- ],\r
-\r
- "bfp_functional": [\r
- {\r
- "name": "COMPRESS_DECOMPRESS",\r
- "parameters": {\r
- }\r
- }\r
- ],\r
-\r
- "bfp_performace": [\r
- {\r
- "name": "COMPRESS_DECOMPRESS",\r
- "parameters": {\r
- }\r
- }\r
- ], \r
-\r
- "bfp_performace_ex": [\r
- {\r
- "name": "RB_16_IQ_8",\r
- "parameters": {\r
- "nRBsize": 16,\r
- "iqWidth": 8 \r
- }\r
- }, \r
- {\r
- "name": "RB_18_IQ_8",\r
- "parameters": {\r
- "nRBsize": 18,\r
- "iqWidth": 8\r
- }\r
- },\r
- {\r
- "name": "RB_32_IQ_8",\r
- "parameters": {\r
- "nRBsize": 32,\r
- "iqWidth": 8 \r
- }\r
- }, \r
- {\r
- "name": "RB_36_IQ_8",\r
- "parameters": {\r
- "nRBsize": 36,\r
- "iqWidth": 8\r
- }\r
- },\r
- {\r
- "name": "RB_48_IQ_8",\r
- "parameters": {\r
- "nRBsize": 48,\r
- "iqWidth": 8 \r
- }\r
- }, \r
- {\r
- "name": "RB_70_IQ_8",\r
- "parameters": {\r
- "nRBsize": 70,\r
- "iqWidth": 8\r
- }\r
- }, \r
- {\r
- "name": "RB_113_IQ_8",\r
- "parameters": {\r
- "nRBsize": 113,\r
- "iqWidth": 8\r
- }\r
- }, \r
- {\r
- "name": "RB_273_IQ_8",\r
- "parameters": {\r
- "nRBsize": 273,\r
- "iqWidth": 8\r
- }\r
- },\r
- {\r
- "name": "RB_6_IQ_9",\r
- "parameters": {\r
- "nRBsize": 6,\r
- "iqWidth": 9 \r
- }\r
- }, \r
- {\r
- "name": "RB_12_IQ_9",\r
- "parameters": {\r
- "nRBsize": 12,\r
- "iqWidth": 9 \r
- }\r
- }, \r
- {\r
- "name": "RB_16_IQ_9",\r
- "parameters": {\r
- "nRBsize": 16,\r
- "iqWidth": 9 \r
- }\r
- }, \r
- {\r
- "name": "RB_18_IQ_9",\r
- "parameters": {\r
- "nRBsize": 18,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_24_IQ_9",\r
- "parameters": {\r
- "nRBsize": 24,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_30_IQ_9",\r
- "parameters": {\r
- "nRBsize": 30,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_32_IQ_9",\r
- "parameters": {\r
- "nRBsize": 32,\r
- "iqWidth": 9 \r
- }\r
- }, \r
- {\r
- "name": "RB_36_IQ_9",\r
- "parameters": {\r
- "nRBsize": 36,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_42_IQ_9",\r
- "parameters": {\r
- "nRBsize": 42,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_48_IQ_9",\r
- "parameters": {\r
- "nRBsize": 48,\r
- "iqWidth": 9 \r
- }\r
- }, \r
- {\r
- "name": "RB_54_IQ_9",\r
- "parameters": {\r
- "nRBsize": 54,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_60_IQ_9",\r
- "parameters": {\r
- "nRBsize": 60,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_66_IQ_9",\r
- "parameters": {\r
- "nRBsize": 66,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_70_IQ_9",\r
- "parameters": {\r
- "nRBsize": 70,\r
- "iqWidth": 9\r
- }\r
- }, \r
- {\r
- "name": "RB_72_IQ_9",\r
- "parameters": {\r
- "nRBsize": 72,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_78_IQ_9",\r
- "parameters": {\r
- "nRBsize": 78,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_84_IQ_9",\r
- "parameters": {\r
- "nRBsize": 84,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_90_IQ_9",\r
- "parameters": {\r
- "nRBsize": 90,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_96_IQ_9",\r
- "parameters": {\r
- "nRBsize": 96,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_102_IQ_9",\r
- "parameters": {\r
- "nRBsize": 102,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_108_IQ_9",\r
- "parameters": {\r
- "nRBsize": 108,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_113_IQ_9",\r
- "parameters": {\r
- "nRBsize": 113,\r
- "iqWidth": 9 \r
- }\r
- }, \r
- {\r
- "name": "RB_114_IQ_9",\r
- "parameters": {\r
- "nRBsize": 114,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_120_IQ_9",\r
- "parameters": {\r
- "nRBsize": 120,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_126_IQ_9",\r
- "parameters": {\r
- "nRBsize": 126,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_132_IQ_9",\r
- "parameters": {\r
- "nRBsize": 132,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_138_IQ_9",\r
- "parameters": {\r
- "nRBsize": 138,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_144_IQ_9",\r
- "parameters": {\r
- "nRBsize": 144,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_150_IQ_9",\r
- "parameters": {\r
- "nRBsize": 150,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_156_IQ_9",\r
- "parameters": {\r
- "nRBsize": 156,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_162_IQ_9",\r
- "parameters": {\r
- "nRBsize": 162,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_168_IQ_9",\r
- "parameters": {\r
- "nRBsize": 168,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_174_IQ_9",\r
- "parameters": {\r
- "nRBsize": 174,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_180_IQ_9",\r
- "parameters": {\r
- "nRBsize": 180,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_186_IQ_9",\r
- "parameters": {\r
- "nRBsize": 186,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_192_IQ_9",\r
- "parameters": {\r
- "nRBsize": 192,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_198_IQ_9",\r
- "parameters": {\r
- "nRBsize": 198,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_204_IQ_9",\r
- "parameters": {\r
- "nRBsize": 204,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_210_IQ_9",\r
- "parameters": {\r
- "nRBsize": 210,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_216_IQ_9",\r
- "parameters": {\r
- "nRBsize": 216,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_222_IQ_9",\r
- "parameters": {\r
- "nRBsize": 222,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_228_IQ_9",\r
- "parameters": {\r
- "nRBsize": 228,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_234_IQ_9",\r
- "parameters": {\r
- "nRBsize": 234,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_240_IQ_9",\r
- "parameters": {\r
- "nRBsize": 240,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_246_IQ_9",\r
- "parameters": {\r
- "nRBsize": 246,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_252_IQ_9",\r
- "parameters": {\r
- "nRBsize": 252,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_258_IQ_9",\r
- "parameters": {\r
- "nRBsize": 258,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_264_IQ_9",\r
- "parameters": {\r
- "nRBsize": 264,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_270_IQ_9",\r
- "parameters": {\r
- "nRBsize": 270,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_273_IQ_9",\r
- "parameters": {\r
- "nRBsize": 273,\r
- "iqWidth": 9\r
- }\r
- },\r
- {\r
- "name": "RB_16_IQ_10",\r
- "parameters": {\r
- "nRBsize": 16,\r
- "iqWidth": 10 \r
- }\r
- }, \r
- {\r
- "name": "RB_18_IQ_10",\r
- "parameters": {\r
- "nRBsize": 18,\r
- "iqWidth": 10\r
- }\r
- },\r
- {\r
- "name": "RB_32_IQ_10",\r
- "parameters": {\r
- "nRBsize": 32,\r
- "iqWidth": 10 \r
- }\r
- }, \r
- {\r
- "name": "RB_36_IQ_10",\r
- "parameters": {\r
- "nRBsize": 36,\r
- "iqWidth": 10\r
- }\r
- },\r
- {\r
- "name": "RB_48_IQ_10",\r
- "parameters": {\r
- "nRBsize": 48,\r
- "iqWidth": 10\r
- }\r
- }, \r
- {\r
- "name": "RB_70_IQ_10",\r
- "parameters": {\r
- "nRBsize": 70,\r
- "iqWidth": 10\r
- }\r
- }, \r
- {\r
- "name": "RB_113_IQ_10",\r
- "parameters": {\r
- "nRBsize": 113,\r
- "iqWidth": 10 \r
- }\r
- }, \r
- {\r
- "name": "RB_273_IQ_10",\r
- "parameters": {\r
- "nRBsize": 273,\r
- "iqWidth": 10\r
- }\r
- },\r
- {\r
- "name": "RB_16_IQ_12",\r
- "parameters": {\r
- "nRBsize": 16,\r
- "iqWidth": 12\r
- }\r
- }, \r
- {\r
- "name": "RB_18_IQ_12",\r
- "parameters": {\r
- "nRBsize": 18,\r
- "iqWidth": 12\r
- }\r
- },\r
- {\r
- "name": "RB_32_IQ_12",\r
- "parameters": {\r
- "nRBsize": 32,\r
- "iqWidth": 12\r
- }\r
- }, \r
- {\r
- "name": "RB_36_IQ_12",\r
- "parameters": {\r
- "nRBsize": 36,\r
- "iqWidth": 12\r
- }\r
- },\r
- {\r
- "name": "RB_48_IQ_12",\r
- "parameters": {\r
- "nRBsize": 48,\r
- "iqWidth": 12\r
- }\r
- }, \r
- {\r
- "name": "RB_70_IQ_12",\r
- "parameters": {\r
- "nRBsize": 70,\r
- "iqWidth": 12\r
- }\r
- }, \r
- {\r
- "name": "RB_113_IQ_12",\r
- "parameters": {\r
- "nRBsize": 113,\r
- "iqWidth": 12 \r
- }\r
- }, \r
- {\r
- "name": "RB_273_IQ_12",\r
- "parameters": {\r
- "nRBsize": 273,\r
- "iqWidth": 12\r
- }\r
- },\r
- {\r
- "name": "RB_16_IQ_14",\r
- "parameters": {\r
- "nRBsize": 16,\r
- "iqWidth": 14\r
- }\r
- }, \r
- {\r
- "name": "RB_18_IQ_14",\r
- "parameters": {\r
- "nRBsize": 18,\r
- "iqWidth": 14\r
- }\r
- },\r
- {\r
- "name": "RB_32_IQ_14",\r
- "parameters": {\r
- "nRBsize": 32,\r
- "iqWidth": 14\r
- }\r
- }, \r
- {\r
- "name": "RB_36_IQ_14",\r
- "parameters": {\r
- "nRBsize": 36,\r
- "iqWidth": 14\r
- }\r
- },\r
- {\r
- "name": "RB_48_IQ_14",\r
- "parameters": {\r
- "nRBsize": 48,\r
- "iqWidth": 14\r
- }\r
- }, \r
- {\r
- "name": "RB_70_IQ_14",\r
- "parameters": {\r
- "nRBsize": 70,\r
- "iqWidth": 14\r
- }\r
- }, \r
- {\r
- "name": "RB_113_IQ_14",\r
- "parameters": {\r
- "nRBsize": 113,\r
- "iqWidth": 14 \r
- }\r
- }, \r
- {\r
- "name": "RB_273_IQ_14",\r
- "parameters": {\r
- "nRBsize": 273,\r
- "iqWidth": 14\r
- }\r
- }\r
- ]\r
-}\r
+{
+ "GLOBAL": {
+ "io_cfg": {
+ "dpdk_dev_up": "",
+ "dpdk_dev_cp": "",
+ "bbdev_mode": "none",
+ "system_core": 0,
+ "core": 5,
+ "pkt_proc_core": 6,
+ "timing_core": 7,
+ "pkt_aux_core": 0,
+ "dpdkBasebandFecMode": 0,
+ "dpdkBasebandDevice": "",
+ "mtu": 9600,
+ "o_du_macaddr": "00:11:22:33:44:66",
+ "o_ru_macaddr": "00:11:22:33:44:55",
+ "cp_vlan_tag": 1,
+ "up_vlan_tag": 2
+ },
+
+ "eAxCId_cfg": {
+ "bit_cuPortId": 4,
+ "bit_bandSectorId": 4,
+ "bit_ccId": 4,
+ "bit_ruPortId": 4
+ },
+
+ "prach_cfg": {
+ "scs": 0,
+ "freq_start": 0,
+ "filter_id": 3,
+ "config_id": 189,
+ "freq_offset": 1
+ },
+
+ "ru_cfg": {
+ "category": "A",
+ "duplex": "TDD",
+ "slot_config": "slotcfg_0",
+ "sub6": true,
+ "mu": 0,
+ "num_cc": 6,
+ "num_eaxc": 8,
+ "ant_elm_trx": 32,
+ "chbw_dl": 20,
+ "chbw_ul": 20,
+ "iq_width": 16,
+ "comp_meth": 0,
+ "fft_size": 1024,
+ "totalBfWeights": 32,
+ "Tadv_cp_dl": 0,
+ "T2a_min_cp_dl": 0,
+ "T2a_max_cp_dl": 0,
+ "T2a_min_cp_ul": 0,
+ "T2a_max_cp_ul": 0,
+ "T2a_min_up": 0,
+ "T2a_max_up": 0,
+ "Ta3_min": 0,
+ "Ta3_max": 0,
+ "T1a_min_cp_dl": 0,
+ "T1a_max_cp_dl": 0,
+ "T1a_min_cp_ul": 0,
+ "T1a_max_cp_ul": 0,
+ "T1a_min_up": 0,
+ "T1a_max_up": 0,
+ "Ta4_min": 0,
+ "Ta4_max": 0
+ },
+ "slotcfg_0": {
+ "desc": "DDDSUUDDDD_644",
+ "period": 10,
+ "slot0": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ],
+ "slot1": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ],
+ "slot2": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ],
+ "slot3": [ 0, 0, 0, 0, 0, 0, 2, 2, 2, 2, 1, 1, 1, 1 ],
+ "slot4": [ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 ],
+ "slot5": [ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 ],
+ "slot6": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ],
+ "slot7": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ],
+ "slot8": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ],
+ "slot9": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]
+ },
+ "slotcfg_1": {
+ "desc": "DDDS_1211",
+ "period": 4,
+ "slot0": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ],
+ "slot1": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ],
+ "slot2": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ],
+ "slot3": [ 0, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 ]
+ }
+ },
+
+ "u_plane_functional": [
+ {
+ "name": "U_plane",
+ "parameters": {
+ "test_type": 0,
+ "input": "test_vectors/u-plane_in.bin",
+ "input_len": 2400,
+ "num_of_cases": 1
+ },
+
+ "references": {
+ "output": "test_vectors/u-palne_out.bin",
+ "output_len": 2400
+ }
+ }
+ ],
+
+ "C_Plane": [
+ {
+ "name": "DL_SectionType1_SingleSection",
+ "parameters": {
+ "direction": "DL",
+ "section_type": 1,
+ "num_sections": 1,
+ "cc_id": 0,
+ "ant_id": 0,
+ "seq_id": 0,
+ "frame_id": 0,
+ "subframe_id": 0,
+ "slot_id": 0,
+ "symbol_start": 0,
+ "symbol_num": 14,
+ "prb_start": [ 0 ],
+ "prb_num": [ 66 ],
+ "comp_method": 0,
+ "beam_id": 0,
+ "section_id": 0,
+ "iq_width": 16
+ }
+ },
+ {
+ "name": "UL_SectionType1_SingleSection",
+ "parameters": {
+ "direction": "UL",
+ "section_type": 1,
+ "num_sections": 1,
+ "cc_id": 0,
+ "ant_id": 0,
+ "seq_id": 0,
+ "frame_id": 0,
+ "subframe_id": 0,
+ "slot_id": 0,
+ "symbol_start": 0,
+ "symbol_num": 14,
+ "prb_start": [ 0 ],
+ "prb_num": [ 66 ],
+ "comp_method": 0,
+ "beam_id": 0,
+ "section_id": 0,
+ "iq_width": 16
+ }
+ },
+ {
+ "name": "DL_SectionType1_MultiSection",
+ "parameters": {
+ "direction": "DL",
+ "section_type": 1,
+ "num_sections": 3,
+ "cc_id": 0,
+ "ant_id": 0,
+ "seq_id": 0,
+ "frame_id": 0,
+ "subframe_id": 0,
+ "slot_id": 0,
+ "symbol_start": 0,
+ "symbol_num": 14,
+ "prb_start": [ 0, 22, 44 ],
+ "prb_num": [ 22, 22, 22 ],
+ "comp_method": 0,
+ "beam_id": 0,
+ "section_id": 0,
+ "iq_width": 16
+ }
+ },
+ {
+ "name": "UL_SectionType1_MultiSection",
+ "parameters": {
+ "direction": "UL",
+ "section_type": 1,
+ "num_sections": 4,
+ "cc_id": 0,
+ "ant_id": 0,
+ "seq_id": 0,
+ "frame_id": 0,
+ "subframe_id": 0,
+ "slot_id": 0,
+ "symbol_start": 0,
+ "symbol_num": 14,
+ "prb_start": [ 0, 25, 50, 75 ],
+ "prb_num": [ 25, 25, 25, 25 ],
+ "comp_method": 0,
+ "beam_id": 0,
+ "section_id": 0,
+ "iq_width": 16
+ }
+ },
+ {
+ "name":"UL_SectionType3_SingleSection",
+ "parameters": {
+ "direction": "UL",
+ "section_type": 3,
+ "num_sections": 1,
+ "cc_id": 0,
+ "ant_id": 0,
+ "seq_id": 0,
+ "frame_id": 0,
+ "subframe_id": 0,
+ "slot_id": 0,
+ "symbol_start": 7,
+ "symbol_num": 6,
+ "prb_start": [ 0 ],
+ "prb_num": [ 12 ],
+ "comp_method": 0,
+ "beam_id": 0,
+ "section_id": 0,
+ "iq_width": 16,
+ "filter_index": 3,
+ "time_offset": 2026,
+ "freq_offset": -792,
+ "fft_size": 10,
+ "scs": 3,
+ "cp_length": 0
+ }
+ }
+ ],
+
+ "TestChain": [
+ {
+ "name": "FDD_CATA_MU0_20_1CC_4ANT",
+ "parameters": {
+ "category": "A",
+ "sub6": true,
+ "mu": 0,
+ "duplex": "FDD",
+ "slot_config": "slotcfg_0",
+ "chbw_dl": 20,
+ "fftsize_dl": 1024,
+ "chbw_ul": 20,
+ "fftsize_ul": 1024,
+ "num_cc": 1,
+ "num_eaxc": 4,
+ "antelm_trx": 32,
+ "iq_width": 16,
+ "comp_meth": 0,
+ "totalBfWeights": 32,
+ "num_slots": 10,
+ "bfw_prefix_dl": "test_vectors/mu1_100_32/dl_bfw_ue_",
+ "bfw_prefix_ul": "test_vectors/mu1_100_32/ul_bfw_ue_"
+ }
+ },
+ {
+ "name": "FDD_CATA_MU0_20_1CC_8ANT",
+ "parameters": {
+ "category": "A",
+ "sub6": true,
+ "mu": 0,
+ "duplex": "FDD",
+ "slot_config": "slotcfg_0",
+ "chbw_dl": 20,
+ "fftsize_dl": 1024,
+ "chbw_ul": 20,
+ "fftsize_ul": 1024,
+ "num_cc": 1,
+ "num_eaxc": 8,
+ "antelm_trx": 32,
+ "iq_width": 16,
+ "comp_meth": 0,
+ "totalBfWeights": 32,
+ "num_slots": 10,
+ "bfw_prefix_dl": "test_vectors/mu1_100_32/dl_bfw_ue_",
+ "bfw_prefix_ul": "test_vectors/mu1_100_32/ul_bfw_ue_"
+
+ }
+ },
+ {
+ "name": "FDD_CATA_MU0_20_6CC_4ANT",
+ "parameters": {
+ "category": "A",
+ "sub6": true,
+ "mu": 0,
+ "duplex": "FDD",
+ "slot_config": "slotcfg_0",
+ "chbw_dl": 20,
+ "fftsize_dl": 1024,
+ "chbw_ul": 20,
+ "fftsize_ul": 1024,
+ "num_cc": 6,
+ "num_eaxc": 4,
+ "antelm_trx": 32,
+ "iq_width": 16,
+ "comp_meth": 0,
+ "totalBfWeights": 32,
+ "num_slots": 10,
+ "bfw_prefix_dl": "test_vectors/mu1_100_32/dl_bfw_ue_",
+ "bfw_prefix_ul": "test_vectors/mu1_100_32/ul_bfw_ue_"
+ }
+ },
+ {
+ "name": "FDD_CATA_MU0_20_6CC_8ANT",
+ "parameters": {
+ "category": "A",
+ "sub6": true,
+ "mu": 0,
+ "duplex": "FDD",
+ "slot_config": "slotcfg_0",
+ "chbw_dl": 20,
+ "fftsize_dl": 1024,
+ "chbw_ul": 20,
+ "fftsize_ul": 1024,
+ "num_cc": 6,
+ "num_eaxc": 8,
+ "antelm_trx": 32,
+ "iq_width": 16,
+ "comp_meth": 0,
+ "totalBfWeights": 32,
+ "num_slots": 10,
+ "bfw_prefix_dl": "test_vectors/mu1_100_32/dl_bfw_ue_",
+ "bfw_prefix_ul": "test_vectors/mu1_100_32/ul_bfw_ue_"
+
+ }
+ },
+ {
+ "name": "TDD_CATA_MU1_100_1CC_4",
+ "parameters": {
+ "category": "A",
+ "sub6": true,
+ "mu": 1,
+ "duplex": "TDD",
+ "slot_config": "slotcfg_0",
+ "chbw_dl": 100,
+ "fftsize_dl": 4096,
+ "chbw_ul": 100,
+ "fftsize_ul": 4096,
+ "num_cc": 1,
+ "num_eaxc": 4,
+ "antelm_trx": 32,
+ "iq_width": 16,
+ "comp_meth": 0,
+ "totalBfWeights": 32,
+ "num_slots": 10,
+ "bfw_prefix_dl": "test_vectors/mu1_100_32/dl_bfw_ue_",
+ "bfw_prefix_ul": "test_vectors/mu1_100_32/ul_bfw_ue_"
+
+ }
+ },
+ {
+ "name": "TDD_CATA_MU1_100_1CC_8",
+ "parameters": {
+ "category": "A",
+ "sub6": true,
+ "mu": 1,
+ "duplex": "TDD",
+ "slot_config": "slotcfg_0",
+ "chbw_dl": 100,
+ "fftsize_dl": 4096,
+ "chbw_ul": 100,
+ "fftsize_ul": 4096,
+ "num_cc": 1,
+ "num_eaxc": 8,
+ "antelm_trx": 32,
+ "iq_width": 16,
+ "comp_meth": 0,
+ "totalBfWeights": 32,
+ "num_slots": 10,
+ "bfw_prefix_dl": "test_vectors/mu1_100_32/dl_bfw_ue_",
+ "bfw_prefix_ul": "test_vectors/mu1_100_32/ul_bfw_ue_"
+ }
+ },
+ {
+ "name": "TDD_CATA_MU3_100_1CC_4",
+ "parameters": {
+ "category": "A",
+ "sub6": false,
+ "mu": 3,
+ "duplex": "TDD",
+ "slot_config": "slotcfg_1",
+ "chbw_dl": 100,
+ "fftsize_dl": 1024,
+ "chbw_ul": 100,
+ "fftsize_ul": 1024,
+ "num_cc": 1,
+ "num_eaxc": 4,
+ "antelm_trx": 32,
+ "iq_width": 16,
+ "comp_meth": 0,
+ "totalBfWeights": 32,
+ "num_slots": 10,
+ "bfw_prefix_dl": "test_vectors/mu1_100_32/dl_bfw_ue_",
+ "bfw_prefix_ul": "test_vectors/mu1_100_32/ul_bfw_ue_"
+ }
+ },
+ {
+ "name": "TDD_CATB_MU1_100_1CC_8",
+ "parameters": {
+ "category": "B",
+ "sub6": true,
+ "mu": 1,
+ "duplex": "TDD",
+ "slot_config": "slotcfg_0",
+ "chbw_dl": 100,
+ "fftsize_dl": 4096,
+ "chbw_ul": 100,
+ "fftsize_ul": 4096,
+ "num_cc": 1,
+ "num_eaxc": 8,
+ "antelm_trx": 32,
+ "iq_width": 16,
+ "comp_meth": 0,
+ "totalBfWeights": 32,
+ "num_slots": 10,
+ "bfw_prefix_dl": "test_vectors/mu1_100_32/dl_bfw_ue_",
+ "bfw_prefix_ul": "test_vectors/mu1_100_32/ul_bfw_ue_"
+ }
+ }
+ ],
+
+ "init_sys_functional": [
+ {
+ "name": "xran_lib_api",
+ "parameters": {
+ "id": 0,
+ "dpdk_dev": [ "0000:d8:02.0", "0000:d8:02.1" ],
+ "bbdev_dev": "none",
+ "bbdev_mode": 0,
+ "core": 5,
+ "system_core": 0,
+ "pkt_proc_core": 6,
+ "pkt_aux_core": 0,
+ "timing_core": 7,
+ "port": [ 0, 1 ],
+ "dpdkBasebandFecMode": 0,
+ "dpdkBasebandDevice": "none",
+ "filePrefix": "wls",
+ "xranCat": 0,
+ "mtu": 9600,
+ "p_o_du_addr": "00:11:22:33:44:66",
+ "p_o_ru_addr": "00:11:22:33:44:55",
+ "Tadv_cp_dl": 0,
+ "T2a_min_cp_dl": 0,
+ "T2a_max_cp_dl": 0,
+ "T2a_min_cp_ul": 0,
+ "T2a_max_cp_ul": 0,
+ "T2a_min_up": 0,
+ "T2a_max_up": 0,
+ "Ta3_min": 0,
+ "Ta3_max": 0,
+ "T1a_min_cp_dl": 0,
+ "T1a_max_cp_dl": 0,
+ "T1a_min_cp_ul": 0,
+ "T1a_max_cp_ul": 0,
+ "T1a_min_up": 0,
+ "T1a_max_up": 0,
+ "Ta4_min": 0,
+ "Ta4_max": 0,
+ "enableCP": 1,
+ "prachEnable": 1,
+ "cp_vlan_tag": 2,
+ "up_vlan_tag": 1,
+ "debugStop": 0,
+ "debugStopCount": 0,
+ "DynamicSectionEna": 0
+ }
+ }
+ ],
+
+ "prach_functional": [
+ {
+ "name": "Prach_test",
+ "parameters": {
+ "Numerology": 1,
+ "FrameDuplexType": 0,
+ "loglevel": 1,
+ "PrachConfIdx": 189,
+ "PrachFreqStart": 0,
+ "PrachFreqOffset": 0,
+ "PrachSubcSpacing": 1,
+ "frameId": 0,
+ "subframeId": 1,
+ "slotId": 0,
+ "beamId": 0,
+ "ccId": 0,
+ "antId": 0,
+ "iqWidth": 16,
+ "compMeth": 0,
+ "fftSize": 10
+ },
+
+ "references": {
+ "filterIdx": 3,
+ "startSymId": 0,
+ "startPrbc": 0,
+ "numPrbc": 12,
+ "timeOffset": 216,
+ "freqOffset": 0,
+ "x_value": 1,
+ "nrofPrachInSlot": 1,
+ "y_value": [ 0, 0 ],
+ "numSymbol": 2,
+ "occassionsInPrachSlot": 7,
+ "isPRACHslot": [ 1, 6 ],
+ "SlotNrNum": 2,
+ "prach_start_symbol": 0,
+ "prach_last_symbol": 13,
+ "m_params_timeOffset": 108,
+ "id": 0
+ }
+ }
+ ],
+ "prach_performance": [
+ {
+ "name": "Prach_test",
+ "parameters": {
+ "Numerology": 1,
+ "FrameDuplexType": 0,
+ "loglevel": 1,
+ "PrachConfIdx": 189,
+ "PrachFreqStart": 0,
+ "PrachFreqOffset": 0,
+ "PrachSubcSpacing": 1,
+ "frameId": 0,
+ "subframeId": 1,
+ "slotId": 0,
+ "beamId": 0,
+ "ccId": 0,
+ "antId": 0
+ },
+
+ "references": {
+ "filterIdx": 3,
+ "startSymId": 0,
+ "startPrbc": 0,
+ "numPrbc": 12,
+ "timeOffset": 216,
+ "freqOffset": 0,
+ "x_value": 1,
+ "nrofPrachInSlot": 1,
+ "y_value": [ 0, 0 ],
+
+ "numSymbol": 2,
+ "occassionsInPrachSlot": 7,
+ "isPRACHslot": [ 1, 6 ],
+ "SlotNrNum": 2,
+ "prach_start_symbol": 0,
+ "prach_last_symbol": 13
+
+ }
+ }
+ ],
+
+ "u_plane_perormace": [
+ {
+ "name": "U-plane",
+ "parameters": {
+ "test_type": 0,
+ "input": "test_vectors/u-plane_in.bin",
+ "input_len": 2400,
+ "num_of_cases": 1
+ },
+
+ "references": {
+ "output": "test_vectors/u-palne_out.bin",
+ "output_len": 2400
+ }
+ }
+ ],
+
+ "bfp_functional": [
+ {
+ "name": "COMPRESS_DECOMPRESS",
+ "parameters": {
+ }
+ }
+ ],
+
+ "bfp_performace": [
+ {
+ "name": "COMPRESS_DECOMPRESS",
+ "parameters": {
+ }
+ }
+ ],
+
+ "bfp_performace_ex": [
+ {
+ "name": "RB_16_IQ_8",
+ "parameters": {
+ "nRBsize": 16,
+ "iqWidth": 8
+ }
+ },
+ {
+ "name": "RB_18_IQ_8",
+ "parameters": {
+ "nRBsize": 18,
+ "iqWidth": 8
+ }
+ },
+ {
+ "name": "RB_32_IQ_8",
+ "parameters": {
+ "nRBsize": 32,
+ "iqWidth": 8
+ }
+ },
+ {
+ "name": "RB_36_IQ_8",
+ "parameters": {
+ "nRBsize": 36,
+ "iqWidth": 8
+ }
+ },
+ {
+ "name": "RB_48_IQ_8",
+ "parameters": {
+ "nRBsize": 48,
+ "iqWidth": 8
+ }
+ },
+ {
+ "name": "RB_70_IQ_8",
+ "parameters": {
+ "nRBsize": 70,
+ "iqWidth": 8
+ }
+ },
+ {
+ "name": "RB_113_IQ_8",
+ "parameters": {
+ "nRBsize": 113,
+ "iqWidth": 8
+ }
+ },
+ {
+ "name": "RB_273_IQ_8",
+ "parameters": {
+ "nRBsize": 273,
+ "iqWidth": 8
+ }
+ },
+ {
+ "name": "RB_6_IQ_9",
+ "parameters": {
+ "nRBsize": 6,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_12_IQ_9",
+ "parameters": {
+ "nRBsize": 12,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_16_IQ_9",
+ "parameters": {
+ "nRBsize": 16,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_18_IQ_9",
+ "parameters": {
+ "nRBsize": 18,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_24_IQ_9",
+ "parameters": {
+ "nRBsize": 24,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_30_IQ_9",
+ "parameters": {
+ "nRBsize": 30,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_32_IQ_9",
+ "parameters": {
+ "nRBsize": 32,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_36_IQ_9",
+ "parameters": {
+ "nRBsize": 36,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_42_IQ_9",
+ "parameters": {
+ "nRBsize": 42,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_48_IQ_9",
+ "parameters": {
+ "nRBsize": 48,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_54_IQ_9",
+ "parameters": {
+ "nRBsize": 54,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_60_IQ_9",
+ "parameters": {
+ "nRBsize": 60,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_66_IQ_9",
+ "parameters": {
+ "nRBsize": 66,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_70_IQ_9",
+ "parameters": {
+ "nRBsize": 70,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_72_IQ_9",
+ "parameters": {
+ "nRBsize": 72,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_78_IQ_9",
+ "parameters": {
+ "nRBsize": 78,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_84_IQ_9",
+ "parameters": {
+ "nRBsize": 84,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_90_IQ_9",
+ "parameters": {
+ "nRBsize": 90,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_96_IQ_9",
+ "parameters": {
+ "nRBsize": 96,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_102_IQ_9",
+ "parameters": {
+ "nRBsize": 102,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_108_IQ_9",
+ "parameters": {
+ "nRBsize": 108,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_113_IQ_9",
+ "parameters": {
+ "nRBsize": 113,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_114_IQ_9",
+ "parameters": {
+ "nRBsize": 114,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_120_IQ_9",
+ "parameters": {
+ "nRBsize": 120,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_126_IQ_9",
+ "parameters": {
+ "nRBsize": 126,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_132_IQ_9",
+ "parameters": {
+ "nRBsize": 132,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_138_IQ_9",
+ "parameters": {
+ "nRBsize": 138,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_144_IQ_9",
+ "parameters": {
+ "nRBsize": 144,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_150_IQ_9",
+ "parameters": {
+ "nRBsize": 150,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_156_IQ_9",
+ "parameters": {
+ "nRBsize": 156,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_162_IQ_9",
+ "parameters": {
+ "nRBsize": 162,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_168_IQ_9",
+ "parameters": {
+ "nRBsize": 168,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_174_IQ_9",
+ "parameters": {
+ "nRBsize": 174,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_180_IQ_9",
+ "parameters": {
+ "nRBsize": 180,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_186_IQ_9",
+ "parameters": {
+ "nRBsize": 186,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_192_IQ_9",
+ "parameters": {
+ "nRBsize": 192,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_198_IQ_9",
+ "parameters": {
+ "nRBsize": 198,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_204_IQ_9",
+ "parameters": {
+ "nRBsize": 204,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_210_IQ_9",
+ "parameters": {
+ "nRBsize": 210,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_216_IQ_9",
+ "parameters": {
+ "nRBsize": 216,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_222_IQ_9",
+ "parameters": {
+ "nRBsize": 222,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_228_IQ_9",
+ "parameters": {
+ "nRBsize": 228,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_234_IQ_9",
+ "parameters": {
+ "nRBsize": 234,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_240_IQ_9",
+ "parameters": {
+ "nRBsize": 240,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_246_IQ_9",
+ "parameters": {
+ "nRBsize": 246,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_252_IQ_9",
+ "parameters": {
+ "nRBsize": 252,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_258_IQ_9",
+ "parameters": {
+ "nRBsize": 258,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_264_IQ_9",
+ "parameters": {
+ "nRBsize": 264,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_270_IQ_9",
+ "parameters": {
+ "nRBsize": 270,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_273_IQ_9",
+ "parameters": {
+ "nRBsize": 273,
+ "iqWidth": 9
+ }
+ },
+ {
+ "name": "RB_16_IQ_10",
+ "parameters": {
+ "nRBsize": 16,
+ "iqWidth": 10
+ }
+ },
+ {
+ "name": "RB_18_IQ_10",
+ "parameters": {
+ "nRBsize": 18,
+ "iqWidth": 10
+ }
+ },
+ {
+ "name": "RB_32_IQ_10",
+ "parameters": {
+ "nRBsize": 32,
+ "iqWidth": 10
+ }
+ },
+ {
+ "name": "RB_36_IQ_10",
+ "parameters": {
+ "nRBsize": 36,
+ "iqWidth": 10
+ }
+ },
+ {
+ "name": "RB_48_IQ_10",
+ "parameters": {
+ "nRBsize": 48,
+ "iqWidth": 10
+ }
+ },
+ {
+ "name": "RB_70_IQ_10",
+ "parameters": {
+ "nRBsize": 70,
+ "iqWidth": 10
+ }
+ },
+ {
+ "name": "RB_113_IQ_10",
+ "parameters": {
+ "nRBsize": 113,
+ "iqWidth": 10
+ }
+ },
+ {
+ "name": "RB_273_IQ_10",
+ "parameters": {
+ "nRBsize": 273,
+ "iqWidth": 10
+ }
+ },
+ {
+ "name": "RB_16_IQ_12",
+ "parameters": {
+ "nRBsize": 16,
+ "iqWidth": 12
+ }
+ },
+ {
+ "name": "RB_18_IQ_12",
+ "parameters": {
+ "nRBsize": 18,
+ "iqWidth": 12
+ }
+ },
+ {
+ "name": "RB_32_IQ_12",
+ "parameters": {
+ "nRBsize": 32,
+ "iqWidth": 12
+ }
+ },
+ {
+ "name": "RB_36_IQ_12",
+ "parameters": {
+ "nRBsize": 36,
+ "iqWidth": 12
+ }
+ },
+ {
+ "name": "RB_48_IQ_12",
+ "parameters": {
+ "nRBsize": 48,
+ "iqWidth": 12
+ }
+ },
+ {
+ "name": "RB_70_IQ_12",
+ "parameters": {
+ "nRBsize": 70,
+ "iqWidth": 12
+ }
+ },
+ {
+ "name": "RB_113_IQ_12",
+ "parameters": {
+ "nRBsize": 113,
+ "iqWidth": 12
+ }
+ },
+ {
+ "name": "RB_273_IQ_12",
+ "parameters": {
+ "nRBsize": 273,
+ "iqWidth": 12
+ }
+ },
+ {
+ "name": "RB_16_IQ_14",
+ "parameters": {
+ "nRBsize": 16,
+ "iqWidth": 14
+ }
+ },
+ {
+ "name": "RB_18_IQ_14",
+ "parameters": {
+ "nRBsize": 18,
+ "iqWidth": 14
+ }
+ },
+ {
+ "name": "RB_32_IQ_14",
+ "parameters": {
+ "nRBsize": 32,
+ "iqWidth": 14
+ }
+ },
+ {
+ "name": "RB_36_IQ_14",
+ "parameters": {
+ "nRBsize": 36,
+ "iqWidth": 14
+ }
+ },
+ {
+ "name": "RB_48_IQ_14",
+ "parameters": {
+ "nRBsize": 48,
+ "iqWidth": 14
+ }
+ },
+ {
+ "name": "RB_70_IQ_14",
+ "parameters": {
+ "nRBsize": 70,
+ "iqWidth": 14
+ }
+ },
+ {
+ "name": "RB_113_IQ_14",
+ "parameters": {
+ "nRBsize": 113,
+ "iqWidth": 14
+ }
+ },
+ {
+ "name": "RB_273_IQ_14",
+ "parameters": {
+ "nRBsize": 273,
+ "iqWidth": 14
+ }
+ }
+ ]
+}
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-\r
-#include "common.hpp"\r
-#include "xran_fh_o_du.h"\r
-#include "xran_cp_api.h"\r
-#include "xran_lib_wrap.hpp"\r
-#include "xran_common.h"\r
-#include "ethdi.h"\r
-\r
-#include <stdint.h>\r
-#include <iostream>\r
-#include <vector>\r
-#include <string>\r
-\r
-\r
-\r
-using namespace std;\r
-const std::string module_name = "init_sys_functional";\r
-\r
-extern enum xran_if_state xran_if_current_state;\r
-\r
-void physide_sym_call_back(void * param)\r
-{\r
- rte_pause();\r
- return;\r
-}\r
-\r
-int physide_dl_tti_call_back(void * param)\r
-{\r
- rte_pause();\r
- return 0;\r
-}\r
-\r
-int physide_ul_half_slot_call_back(void * param)\r
-{\r
- rte_pause();\r
- return 0;\r
-}\r
-\r
-int physide_ul_full_slot_call_back(void * param)\r
-{\r
- rte_pause();\r
- return 0;\r
-}\r
-\r
-void xran_fh_rx_callback(void *pCallbackTag, xran_status_t status)\r
-{\r
- rte_pause();\r
- return;\r
-}\r
-\r
-void xran_fh_rx_prach_callback(void *pCallbackTag, xran_status_t status)\r
-{\r
-\r
- rte_pause();\r
-}\r
-\r
-class Init_Sys_Check : public KernelTests\r
-{\r
-protected:\r
-\r
- void SetUp() override\r
- {\r
- xranlib->Init();\r
- xranlib->Open(nullptr, nullptr, (void *)xran_fh_rx_callback, (void *)xran_fh_rx_prach_callback);\r
- }\r
-\r
- /* It's called after an execution of the each test case.*/\r
- void TearDown() override\r
- {\r
- xranlib->Close();\r
- xranlib->Cleanup();\r
- }\r
-\r
-public:\r
-\r
- BbuIoBufCtrlStruct sFrontHaulTxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
- BbuIoBufCtrlStruct sFrontHaulTxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
- BbuIoBufCtrlStruct sFrontHaulRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
- BbuIoBufCtrlStruct sFrontHaulRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
- BbuIoBufCtrlStruct sFHPrachRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
-\r
- /* buffers lists */\r
- struct xran_flat_buffer sFrontHaulTxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];\r
- struct xran_flat_buffer sFrontHaulTxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
- struct xran_flat_buffer sFrontHaulRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];\r
- struct xran_flat_buffer sFrontHaulRxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
- struct xran_flat_buffer sFHPrachRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];\r
-\r
- void* nInstanceHandle[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR]; // instance per sector\r
- uint32_t nBufPoolIndex[XRAN_MAX_SECTOR_NR][xranLibWraper::MAX_SW_XRAN_INTERFACE_NUM];\r
- uint16_t nInstanceNum;\r
-};\r
-\r
-TEST_P(Init_Sys_Check, Test_Open_Close)\r
-{\r
- struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();\r
- /* check stat of lib */\r
- ASSERT_EQ(1, p_xran_dev_ctx->enableCP);\r
- ASSERT_EQ(1, p_xran_dev_ctx->xran2phy_mem_ready);\r
-}\r
-\r
-TEST_P(Init_Sys_Check, Test_xran_mm_init)\r
-{\r
- int16_t ret = 0;\r
- ret = xran_mm_init (xranlib->get_xranhandle(), (uint64_t) SW_FPGA_FH_TOTAL_BUFFER_LEN, SW_FPGA_SEGMENT_BUFFER_LEN);\r
- ASSERT_EQ(0, ret);\r
-}\r
-\r
-/* this case cannot be tested since memory cannot be initialized twice */\r
-/* memory initialization is moved to the wrapper class */\r
-#if 0\r
-TEST_P(Init_Sys_Check, Test_xran_bm_init_alloc_free)\r
-{\r
- int16_t ret = 0;\r
- void *ptr;\r
- void *mb;\r
- uint32_t nSW_ToFpga_FTH_TxBufferLen = 13168; /* 273*12*4 + 64*/\r
- int16_t k = 0;\r
-\r
-\r
- struct xran_buffer_list *pFthTxBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];\r
- struct xran_buffer_list *pFthTxPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];\r
- struct xran_buffer_list *pFthRxBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];\r
- struct xran_buffer_list *pFthRxPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];\r
- struct xran_buffer_list *pFthRxRachBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];\r
-\r
- Init_Sys_Check::nInstanceNum = xranlib->get_num_cc();\r
-\r
- for (k = 0; k < XRAN_PORTS_NUM; k++) {\r
- ret = xran_sector_get_instances (xranlib->get_xranhandle(), Init_Sys_Check::nInstanceNum, &(Init_Sys_Check::nInstanceHandle[k][0]));\r
- ASSERT_EQ(0, ret);\r
- ASSERT_EQ(1, Init_Sys_Check::nInstanceNum);\r
- }\r
-\r
-\r
- ret = xran_bm_init(Init_Sys_Check::nInstanceHandle[0][0],\r
- &Init_Sys_Check::nBufPoolIndex[0][0],\r
- XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT, nSW_ToFpga_FTH_TxBufferLen);\r
- ASSERT_EQ(0, ret);\r
-\r
- ret = xran_bm_allocate_buffer(Init_Sys_Check::nInstanceHandle[0][0], Init_Sys_Check::nBufPoolIndex[0][0],&ptr, &mb);\r
- ASSERT_EQ(0, ret);\r
- ASSERT_NE(ptr, nullptr);\r
- ASSERT_NE(mb, nullptr);\r
-\r
- ret = xran_bm_free_buffer(Init_Sys_Check::nInstanceHandle[0][0], ptr, mb);\r
- ASSERT_EQ(0, ret);\r
-\r
-\r
-\r
- for(int i=0; i< xranlib->get_num_cc(); i++)\r
- {\r
- for(int j=0; j<XRAN_N_FE_BUF_LEN; j++)\r
- {\r
- for(int z = 0; z < XRAN_MAX_ANTENNA_NR; z++){\r
- pFthTxBuffer[i][z][j] = &(Init_Sys_Check::sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList);\r
- pFthTxPrbMapBuffer[i][z][j] = &(Init_Sys_Check::sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList);\r
- pFthRxBuffer[i][z][j] = &(Init_Sys_Check::sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList);\r
- pFthRxPrbMapBuffer[i][z][j] = &(Init_Sys_Check::sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList);\r
- pFthRxRachBuffer[i][z][j] = &(Init_Sys_Check::sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList);\r
- }\r
- }\r
- }\r
-\r
- if(NULL != Init_Sys_Check::nInstanceHandle[0])\r
- {\r
- for (int i = 0; i < xranlib->get_num_cc(); i++)\r
- {\r
- ret = xran_5g_fronthault_config (Init_Sys_Check::nInstanceHandle[0][i],\r
- pFthTxBuffer[i],\r
- pFthTxPrbMapBuffer[i],\r
- pFthRxBuffer[i],\r
- pFthRxPrbMapBuffer[i],\r
- xran_fh_rx_callback, &pFthRxBuffer[i][0]);\r
-\r
- ASSERT_EQ(0, ret);\r
- }\r
-\r
- // add prach callback here\r
- for (int i = 0; i < xranlib->get_num_cc(); i++)\r
- {\r
- ret = xran_5g_prach_req(Init_Sys_Check::nInstanceHandle[0][i], pFthRxRachBuffer[i],\r
- xran_fh_rx_prach_callback,&pFthRxRachBuffer[i][0]);\r
- ASSERT_EQ(0, ret);\r
- }\r
- }\r
-\r
-\r
-}\r
-#endif\r
-\r
-TEST_P(Init_Sys_Check, Test_xran_get_common_counters)\r
-{\r
- int16_t ret = 0;\r
- struct xran_common_counters x_counters;\r
-\r
- ret = xran_get_common_counters(xranlib->get_xranhandle(), &x_counters);\r
-\r
- ASSERT_EQ(0, ret);\r
- ASSERT_EQ(0, x_counters.Rx_on_time);\r
- ASSERT_EQ(0, x_counters.Rx_early);\r
- ASSERT_EQ(0, x_counters.Rx_late);\r
- ASSERT_EQ(0, x_counters.Rx_corrupt);\r
- ASSERT_EQ(0, x_counters.Rx_pkt_dupl);\r
- ASSERT_EQ(0, x_counters.Total_msgs_rcvd);\r
-}\r
-\r
-TEST_P(Init_Sys_Check, Test_xran_get_slot_idx)\r
-{\r
-#define NUM_OF_SUBFRAME_PER_FRAME 10\r
- int32_t nNrOfSlotInSf = 1;\r
- int32_t nSfIdx = -1;\r
- uint32_t nFrameIdx;\r
- uint32_t nSubframeIdx;\r
- uint32_t nSlotIdx;\r
- uint64_t nSecond;\r
-\r
- uint32_t nXranTime = xran_get_slot_idx(&nFrameIdx, &nSubframeIdx, &nSlotIdx, &nSecond);\r
- nSfIdx = nFrameIdx*NUM_OF_SUBFRAME_PER_FRAME*nNrOfSlotInSf\r
- + nSubframeIdx*nNrOfSlotInSf\r
- + nSlotIdx;\r
-\r
- ASSERT_EQ(0, nSfIdx);\r
-}\r
-\r
-TEST_P(Init_Sys_Check, Test_xran_reg_physide_cb)\r
-{\r
- struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();\r
- int16_t ret = 0;\r
- ret = xran_reg_physide_cb(xranlib->get_xranhandle(), physide_dl_tti_call_back, NULL, 10, XRAN_CB_TTI);\r
- ASSERT_EQ(0,ret);\r
- ASSERT_EQ(physide_dl_tti_call_back, p_xran_dev_ctx->ttiCb[XRAN_CB_TTI]);\r
- ASSERT_EQ(NULL, p_xran_dev_ctx->TtiCbParam[XRAN_CB_TTI]);\r
- ASSERT_EQ(10, p_xran_dev_ctx->SkipTti[XRAN_CB_TTI]);\r
-\r
- ret = xran_reg_physide_cb(xranlib->get_xranhandle(), physide_ul_half_slot_call_back, NULL, 10, XRAN_CB_HALF_SLOT_RX);\r
- ASSERT_EQ(0,ret);\r
- ASSERT_EQ(physide_ul_half_slot_call_back, p_xran_dev_ctx->ttiCb[XRAN_CB_HALF_SLOT_RX]);\r
- ASSERT_EQ(NULL, p_xran_dev_ctx->TtiCbParam[XRAN_CB_HALF_SLOT_RX]);\r
- ASSERT_EQ(10, p_xran_dev_ctx->SkipTti[XRAN_CB_HALF_SLOT_RX]);\r
-\r
- ret = xran_reg_physide_cb(xranlib->get_xranhandle(), physide_ul_full_slot_call_back, NULL, 10, XRAN_CB_FULL_SLOT_RX);\r
- ASSERT_EQ(0,ret);\r
- ASSERT_EQ(physide_ul_full_slot_call_back, p_xran_dev_ctx->ttiCb[XRAN_CB_FULL_SLOT_RX]);\r
- ASSERT_EQ(NULL, p_xran_dev_ctx->TtiCbParam[XRAN_CB_FULL_SLOT_RX]);\r
- ASSERT_EQ(10, p_xran_dev_ctx->SkipTti[XRAN_CB_FULL_SLOT_RX]);\r
-\r
-}\r
-\r
-TEST_P(Init_Sys_Check, Test_xran_reg_sym_cb){\r
- int16_t ret = 0;\r
- ret = xran_reg_sym_cb(xranlib->get_xranhandle(), physide_sym_call_back, NULL, 11, 0);\r
- ASSERT_EQ(-1,ret);\r
-}\r
-\r
-TEST_P(Init_Sys_Check, Test_xran_mm_destroy){\r
- int16_t ret = 0;\r
- ret = xran_mm_destroy(xranlib->get_xranhandle());\r
- ASSERT_EQ(-1,ret);\r
-}\r
-\r
-TEST_P(Init_Sys_Check, Test_xran_start_stop){\r
- int16_t ret = 0;\r
- ASSERT_EQ(XRAN_STOPPED, xran_if_current_state);\r
- ret = xranlib->Start();\r
- ASSERT_EQ(0,ret);\r
- ASSERT_EQ(XRAN_RUNNING, xran_if_current_state);\r
- ret = xranlib->Stop();\r
- ASSERT_EQ(0,ret);\r
- ASSERT_EQ(XRAN_STOPPED, xran_if_current_state);\r
-}\r
-\r
-INSTANTIATE_TEST_CASE_P(UnitTest, Init_Sys_Check,\r
- testing::ValuesIn(get_sequence(Init_Sys_Check::get_number_of_cases("init_sys_functional"))));\r
-\r
-\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+
+#include "common.hpp"
+#include "xran_fh_o_du.h"
+#include "xran_cp_api.h"
+#include "xran_lib_wrap.hpp"
+#include "xran_common.h"
+#include "ethdi.h"
+
+#include <stdint.h>
+#include <iostream>
+#include <vector>
+#include <string>
+
+
+
+using namespace std;
+const std::string module_name = "init_sys_functional";
+
+extern enum xran_if_state xran_if_current_state;
+
+void physide_sym_call_back(void * param)
+{
+ rte_pause();
+ return;
+}
+
+int physide_dl_tti_call_back(void * param)
+{
+ rte_pause();
+ return 0;
+}
+
+int physide_ul_half_slot_call_back(void * param)
+{
+ rte_pause();
+ return 0;
+}
+
+int physide_ul_full_slot_call_back(void * param)
+{
+ rte_pause();
+ return 0;
+}
+
+void xran_fh_rx_callback(void *pCallbackTag, xran_status_t status)
+{
+ rte_pause();
+ return;
+}
+
+void xran_fh_rx_prach_callback(void *pCallbackTag, xran_status_t status)
+{
+
+ rte_pause();
+}
+
+class Init_Sys_Check : public KernelTests
+{
+protected:
+
+ void SetUp() override
+ {
+ xranlib->Init();
+ xranlib->Open(nullptr, nullptr, (void *)xran_fh_rx_callback, (void *)xran_fh_rx_prach_callback);
+ }
+
+ /* It's called after an execution of the each test case.*/
+ void TearDown() override
+ {
+ xranlib->Close();
+ xranlib->Cleanup();
+ }
+
+public:
+
+ BbuIoBufCtrlStruct sFrontHaulTxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
+ BbuIoBufCtrlStruct sFrontHaulTxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
+ BbuIoBufCtrlStruct sFrontHaulRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
+ BbuIoBufCtrlStruct sFrontHaulRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
+ BbuIoBufCtrlStruct sFHPrachRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
+
+ /* buffers lists */
+ struct xran_flat_buffer sFrontHaulTxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
+ struct xran_flat_buffer sFrontHaulTxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
+ struct xran_flat_buffer sFrontHaulRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
+ struct xran_flat_buffer sFrontHaulRxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
+ struct xran_flat_buffer sFHPrachRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
+
+ void* nInstanceHandle[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR]; // instance per sector
+ uint32_t nBufPoolIndex[XRAN_MAX_SECTOR_NR][xranLibWraper::MAX_SW_XRAN_INTERFACE_NUM];
+ uint16_t nInstanceNum;
+};
+
+TEST_P(Init_Sys_Check, Test_Open_Close)
+{
+ struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
+ /* check stat of lib */
+ ASSERT_EQ(1, p_xran_dev_ctx->enableCP);
+ ASSERT_EQ(1, p_xran_dev_ctx->xran2phy_mem_ready);
+}
+
+TEST_P(Init_Sys_Check, Test_xran_mm_init)
+{
+ int16_t ret = 0;
+ ret = xran_mm_init (xranlib->get_xranhandle(), (uint64_t) SW_FPGA_FH_TOTAL_BUFFER_LEN, SW_FPGA_SEGMENT_BUFFER_LEN);
+ ASSERT_EQ(0, ret);
+}
+
+/* this case cannot be tested since memory cannot be initialized twice */
+/* memory initialization is moved to the wrapper class */
+#if 0
+TEST_P(Init_Sys_Check, Test_xran_bm_init_alloc_free)
+{
+ int16_t ret = 0;
+ void *ptr;
+ void *mb;
+ uint32_t nSW_ToFpga_FTH_TxBufferLen = 13168; /* 273*12*4 + 64*/
+ int16_t k = 0;
+
+
+ struct xran_buffer_list *pFthTxBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
+ struct xran_buffer_list *pFthTxPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
+ struct xran_buffer_list *pFthRxBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
+ struct xran_buffer_list *pFthRxPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
+ struct xran_buffer_list *pFthRxRachBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
+
+ Init_Sys_Check::nInstanceNum = xranlib->get_num_cc();
+
+ for (k = 0; k < XRAN_PORTS_NUM; k++) {
+ ret = xran_sector_get_instances (xranlib->get_xranhandle(), Init_Sys_Check::nInstanceNum, &(Init_Sys_Check::nInstanceHandle[k][0]));
+ ASSERT_EQ(0, ret);
+ ASSERT_EQ(1, Init_Sys_Check::nInstanceNum);
+ }
+
+
+ ret = xran_bm_init(Init_Sys_Check::nInstanceHandle[0][0],
+ &Init_Sys_Check::nBufPoolIndex[0][0],
+ XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT, nSW_ToFpga_FTH_TxBufferLen);
+ ASSERT_EQ(0, ret);
+
+ ret = xran_bm_allocate_buffer(Init_Sys_Check::nInstanceHandle[0][0], Init_Sys_Check::nBufPoolIndex[0][0],&ptr, &mb);
+ ASSERT_EQ(0, ret);
+ ASSERT_NE(ptr, nullptr);
+ ASSERT_NE(mb, nullptr);
+
+ ret = xran_bm_free_buffer(Init_Sys_Check::nInstanceHandle[0][0], ptr, mb);
+ ASSERT_EQ(0, ret);
+
+
+
+ for(int i=0; i< xranlib->get_num_cc(); i++)
+ {
+ for(int j=0; j<XRAN_N_FE_BUF_LEN; j++)
+ {
+ for(int z = 0; z < XRAN_MAX_ANTENNA_NR; z++){
+ pFthTxBuffer[i][z][j] = &(Init_Sys_Check::sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList);
+ pFthTxPrbMapBuffer[i][z][j] = &(Init_Sys_Check::sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList);
+ pFthRxBuffer[i][z][j] = &(Init_Sys_Check::sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList);
+ pFthRxPrbMapBuffer[i][z][j] = &(Init_Sys_Check::sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList);
+ pFthRxRachBuffer[i][z][j] = &(Init_Sys_Check::sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList);
+ }
+ }
+ }
+
+ if(NULL != Init_Sys_Check::nInstanceHandle[0])
+ {
+ for (int i = 0; i < xranlib->get_num_cc(); i++)
+ {
+ ret = xran_5g_fronthault_config (Init_Sys_Check::nInstanceHandle[0][i],
+ pFthTxBuffer[i],
+ pFthTxPrbMapBuffer[i],
+ pFthRxBuffer[i],
+ pFthRxPrbMapBuffer[i],
+ xran_fh_rx_callback, &pFthRxBuffer[i][0]);
+
+ ASSERT_EQ(0, ret);
+ }
+
+ // add prach callback here
+ for (int i = 0; i < xranlib->get_num_cc(); i++)
+ {
+ ret = xran_5g_prach_req(Init_Sys_Check::nInstanceHandle[0][i], pFthRxRachBuffer[i],
+ xran_fh_rx_prach_callback,&pFthRxRachBuffer[i][0]);
+ ASSERT_EQ(0, ret);
+ }
+ }
+
+
+}
+#endif
+
+TEST_P(Init_Sys_Check, Test_xran_get_common_counters)
+{
+ int16_t ret = 0;
+ struct xran_common_counters x_counters;
+
+ ret = xran_get_common_counters(xranlib->get_xranhandle(), &x_counters);
+
+ ASSERT_EQ(0, ret);
+ ASSERT_EQ(0, x_counters.Rx_on_time);
+ ASSERT_EQ(0, x_counters.Rx_early);
+ ASSERT_EQ(0, x_counters.Rx_late);
+ ASSERT_EQ(0, x_counters.Rx_corrupt);
+ ASSERT_EQ(0, x_counters.Rx_pkt_dupl);
+ ASSERT_EQ(0, x_counters.Total_msgs_rcvd);
+}
+
+TEST_P(Init_Sys_Check, Test_xran_get_slot_idx)
+{
+#define NUM_OF_SUBFRAME_PER_FRAME 10
+ int32_t nNrOfSlotInSf = 1;
+ int32_t nSfIdx = -1;
+ uint32_t nFrameIdx;
+ uint32_t nSubframeIdx;
+ uint32_t nSlotIdx;
+ uint64_t nSecond;
+
+ uint32_t nXranTime = xran_get_slot_idx(&nFrameIdx, &nSubframeIdx, &nSlotIdx, &nSecond);
+ nSfIdx = nFrameIdx*NUM_OF_SUBFRAME_PER_FRAME*nNrOfSlotInSf
+ + nSubframeIdx*nNrOfSlotInSf
+ + nSlotIdx;
+
+ ASSERT_EQ(0, nSfIdx);
+}
+
+TEST_P(Init_Sys_Check, Test_xran_reg_physide_cb)
+{
+ struct xran_device_ctx * p_xran_dev_ctx = xran_dev_get_ctx();
+ int16_t ret = 0;
+ ret = xran_reg_physide_cb(xranlib->get_xranhandle(), physide_dl_tti_call_back, NULL, 10, XRAN_CB_TTI);
+ ASSERT_EQ(0,ret);
+ ASSERT_EQ(physide_dl_tti_call_back, p_xran_dev_ctx->ttiCb[XRAN_CB_TTI]);
+ ASSERT_EQ(NULL, p_xran_dev_ctx->TtiCbParam[XRAN_CB_TTI]);
+ ASSERT_EQ(10, p_xran_dev_ctx->SkipTti[XRAN_CB_TTI]);
+
+ ret = xran_reg_physide_cb(xranlib->get_xranhandle(), physide_ul_half_slot_call_back, NULL, 10, XRAN_CB_HALF_SLOT_RX);
+ ASSERT_EQ(0,ret);
+ ASSERT_EQ(physide_ul_half_slot_call_back, p_xran_dev_ctx->ttiCb[XRAN_CB_HALF_SLOT_RX]);
+ ASSERT_EQ(NULL, p_xran_dev_ctx->TtiCbParam[XRAN_CB_HALF_SLOT_RX]);
+ ASSERT_EQ(10, p_xran_dev_ctx->SkipTti[XRAN_CB_HALF_SLOT_RX]);
+
+ ret = xran_reg_physide_cb(xranlib->get_xranhandle(), physide_ul_full_slot_call_back, NULL, 10, XRAN_CB_FULL_SLOT_RX);
+ ASSERT_EQ(0,ret);
+ ASSERT_EQ(physide_ul_full_slot_call_back, p_xran_dev_ctx->ttiCb[XRAN_CB_FULL_SLOT_RX]);
+ ASSERT_EQ(NULL, p_xran_dev_ctx->TtiCbParam[XRAN_CB_FULL_SLOT_RX]);
+ ASSERT_EQ(10, p_xran_dev_ctx->SkipTti[XRAN_CB_FULL_SLOT_RX]);
+
+}
+
+TEST_P(Init_Sys_Check, Test_xran_reg_sym_cb){
+ int16_t ret = 0;
+ ret = xran_reg_sym_cb(xranlib->get_xranhandle(), physide_sym_call_back, NULL, 11, 0);
+ ASSERT_EQ(-1,ret);
+}
+
+TEST_P(Init_Sys_Check, Test_xran_mm_destroy){
+ int16_t ret = 0;
+ ret = xran_mm_destroy(xranlib->get_xranhandle());
+ ASSERT_EQ(-1,ret);
+}
+
+TEST_P(Init_Sys_Check, Test_xran_start_stop){
+ int16_t ret = 0;
+ ASSERT_EQ(XRAN_STOPPED, xran_if_current_state);
+ ret = xranlib->Start();
+ ASSERT_EQ(0,ret);
+ ASSERT_EQ(XRAN_RUNNING, xran_if_current_state);
+ ret = xranlib->Stop();
+ ASSERT_EQ(0,ret);
+ ASSERT_EQ(XRAN_STOPPED, xran_if_current_state);
+}
+
+INSTANTIATE_TEST_CASE_P(UnitTest, Init_Sys_Check,
+ testing::ValuesIn(get_sequence(Init_Sys_Check::get_number_of_cases("init_sys_functional"))));
+
+
+
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-\r
-#include "common.hpp"\r
-#include "xran_common.h"\r
-#include "xran_fh_o_du.h"\r
-#include "ethernet.h"\r
-#include "xran_transport.h"\r
-#include "xran_cp_api.h"\r
-\r
-#include <stdint.h>\r
-\r
-\r
-const std::string module_name = "Prach_test";\r
-\r
-\r
-class PrachCheck : public KernelTests\r
-{\r
-private:\r
- struct xran_section_gen_info *m_pSectResult = NULL;\r
-\r
-protected:\r
- struct xran_fh_config *m_xranConf;\r
- struct xran_device_ctx m_xran_dev_ctx;\r
- struct xran_prach_config *m_pPRACHConfig;\r
- struct xran_ru_config *m_pRUConfig;\r
- struct xran_prach_cp_config *m_pPrachCPConfig;\r
-\r
- struct xran_section_gen_info *m_pSectGenInfo = NULL;\r
- int m_maxSections = 8; /* not used */\r
- int lastsymbol;\r
-\r
- struct rte_mbuf *m_pTestBuffer;\r
-\r
- struct xran_cp_gen_params m_params;\r
- struct xran_recv_packet_info m_pktInfo;\r
- struct xran_cp_gen_params m_result;\r
-\r
- uint8_t m_dir;\r
- std::string m_dirStr;\r
- uint8_t m_sectionType;\r
-\r
- uint8_t m_ccId, m_antId;\r
- uint8_t m_seqId;\r
- uint8_t m_frameId, m_subframeId, m_slotId;\r
- uint8_t m_symStart, m_symNum;\r
- uint16_t *m_prbStart = NULL, *m_prbNum = NULL;\r
-\r
- uint8_t m_iqWidth, m_compMethod;\r
- uint16_t m_beamId;\r
- uint16_t m_reMask = 0xfff;\r
- uint16_t m_sectionId;\r
- uint8_t m_filterIndex;\r
- //uint16_t m_timeOffset;\r
- uint8_t m_fftSize;\r
-\r
- //define reference values\r
- uint8_t m_startSymId;\r
- uint8_t m_x;\r
- uint8_t m_filterIdx;\r
- uint16_t m_startPrbc;\r
- uint8_t m_numPrbc;\r
- uint8_t m_numSymbol;\r
- uint16_t m_timeOffset;\r
- int32_t m_freqOffset;\r
- uint8_t m_nrofPrachInSlot;\r
- uint8_t m_occassionsInPrachSlot;\r
- uint8_t m_y[XRAN_PRACH_CANDIDATE_Y];\r
- uint8_t m_isPRACHslot[XRAN_PRACH_CANDIDATE_SLOT];\r
- int m_prach_start_symbol;\r
- int m_prach_last_symbol;\r
- uint8_t m_SlotNrNum;\r
- uint16_t m_m_params_timeOffset;\r
- uint16_t m_id;\r
-\r
- void SetUp() override\r
- {\r
- init_test("prach_functional");\r
- memset(&m_xran_dev_ctx, 0, sizeof(struct xran_device_ctx));\r
- //modify\r
- m_xranConf = &m_xran_dev_ctx.fh_cfg;\r
-\r
- m_pPRACHConfig = &m_xranConf->prach_conf;\r
- m_pRUConfig = &m_xranConf->ru_conf;\r
- m_pPrachCPConfig = &m_xran_dev_ctx.PrachCPConfig;\r
- //initialize input parameters\r
- m_xranConf->frame_conf.nNumerology = get_input_parameter<uint8_t>("Numerology");\r
- m_xranConf->frame_conf.nFrameDuplexType = get_input_parameter<uint8_t>("FrameDuplexType");\r
- m_xranConf->log_level = get_input_parameter<uint32_t>("loglevel");\r
- m_pPRACHConfig->nPrachConfIdx = get_input_parameter<uint8_t>("PrachConfIdx");\r
- m_pPRACHConfig->nPrachFreqStart = get_input_parameter<uint16_t>("PrachFreqStart");\r
- m_pPRACHConfig->nPrachFreqOffset = get_input_parameter<int32_t>("PrachFreqOffset");\r
- m_pPRACHConfig->nPrachSubcSpacing = get_input_parameter<uint8_t>("PrachSubcSpacing");\r
-\r
- m_pRUConfig->iqWidth = get_input_parameter<uint8_t>("iqWidth");\r
- m_pRUConfig->compMeth = get_input_parameter<uint8_t>("compMeth");\r
- m_pRUConfig->fftSize = get_input_parameter<uint8_t>("fftSize");\r
-\r
- m_frameId = get_input_parameter<uint8_t>("frameId");\r
- m_subframeId = get_input_parameter<uint8_t>("subframeId");\r
- m_slotId = get_input_parameter<uint8_t>("slotId");\r
- m_beamId = get_input_parameter<uint16_t>("beamId");\r
- m_ccId = get_input_parameter<uint8_t>("ccId");\r
- m_antId = get_input_parameter<uint8_t>("antId");\r
-\r
- //initialize reference output\r
- m_startSymId = get_reference_parameter<uint8_t>("startSymId");\r
- m_x = get_reference_parameter<uint8_t>("x_value");\r
-\r
- m_filterIdx = get_reference_parameter<uint8_t>("filterIdx");\r
- m_startPrbc = get_reference_parameter<uint16_t>("startPrbc");\r
- m_numPrbc = get_reference_parameter<uint8_t>("numPrbc");\r
- m_timeOffset = get_reference_parameter<uint16_t>("timeOffset");\r
- m_freqOffset = get_reference_parameter<uint32_t>("freqOffset");\r
- m_nrofPrachInSlot = get_reference_parameter<uint8_t>("nrofPrachInSlot");\r
- m_m_params_timeOffset = get_reference_parameter<uint16_t>("m_params_timeOffset");\r
- m_id = get_reference_parameter<uint16_t>("id");\r
- std::vector<uint8_t> y_vec = get_reference_parameter<std::vector<uint8_t>>("y_value");\r
- for(int i=0; i < XRAN_PRACH_CANDIDATE_Y; i++) {\r
- m_y[i] = y_vec[i];\r
- }\r
-\r
- m_numSymbol = get_reference_parameter<uint8_t>("numSymbol");\r
- m_occassionsInPrachSlot = get_reference_parameter<uint8_t>("occassionsInPrachSlot");\r
-\r
- std::vector<uint8_t> index_vec = get_reference_parameter<std::vector<uint8_t>>("isPRACHslot");\r
- m_SlotNrNum = get_reference_parameter<uint8_t>("SlotNrNum");\r
- for(int i = 0; i < XRAN_PRACH_CANDIDATE_SLOT; i++){\r
- m_isPRACHslot[i]=0;\r
- }\r
- for(int i=0; i<m_SlotNrNum;i++){\r
- m_isPRACHslot[index_vec[i]]=1;\r
- }\r
-\r
-\r
- m_prach_start_symbol = get_reference_parameter<int>("prach_start_symbol");\r
- m_prach_last_symbol = get_reference_parameter<int>("prach_last_symbol");\r
-\r
- /* allocate and prepare required data storage */\r
- m_pSectGenInfo = new struct xran_section_gen_info[8];\r
- ASSERT_NE(m_pSectGenInfo, nullptr);\r
- m_params.sections = m_pSectGenInfo;\r
-\r
- /* allocating an mbuf for packet generatrion */\r
- m_pTestBuffer = (struct rte_mbuf*)rte_pktmbuf_alloc(_eth_mbuf_pool);\r
- ASSERT_FALSE(m_pTestBuffer == NULL);\r
-\r
- }\r
-\r
- void TearDown() override\r
- {\r
- if(m_pTestBuffer != NULL)\r
- rte_pktmbuf_free(m_pTestBuffer);\r
- if(m_pSectGenInfo)\r
- delete[] m_pSectGenInfo;\r
- return;\r
- }\r
-};\r
-\r
-\r
-TEST_P(PrachCheck, PacketGen)//TestCaseName TestName\r
-{\r
- int ret;\r
- int32_t i;\r
- void *pHandle = NULL;\r
-\r
- /* Preparing input data for prach config */\r
- ret = xran_init_prach(m_xranConf, &m_xran_dev_ctx);\r
- ASSERT_TRUE(ret == XRAN_STATUS_SUCCESS);\r
-\r
- /* Verify the result */\r
- EXPECT_EQ(m_pPrachCPConfig->filterIdx, m_filterIdx);\r
- EXPECT_EQ(m_pPrachCPConfig->startSymId, m_startSymId);\r
- EXPECT_EQ(m_pPrachCPConfig->startPrbc, m_startPrbc);\r
- EXPECT_EQ(m_pPrachCPConfig->numPrbc, m_numPrbc);\r
- EXPECT_EQ(m_pPrachCPConfig->timeOffset, m_timeOffset);\r
- EXPECT_EQ(m_pPrachCPConfig->freqOffset, m_freqOffset);\r
- EXPECT_EQ(m_pPrachCPConfig->x, m_x);\r
- EXPECT_EQ(m_pPrachCPConfig->nrofPrachInSlot, m_nrofPrachInSlot);\r
- EXPECT_EQ(m_pPrachCPConfig->y[0], m_y[0]);\r
- EXPECT_EQ(m_pPrachCPConfig->y[1], m_y[1]);\r
- EXPECT_EQ(m_pPrachCPConfig->numSymbol, m_numSymbol);\r
- EXPECT_EQ(m_pPrachCPConfig->occassionsInPrachSlot, m_occassionsInPrachSlot);\r
- for (i = 0; i < XRAN_PRACH_CANDIDATE_SLOT; i++){\r
- EXPECT_EQ(m_pPrachCPConfig->isPRACHslot[i], m_isPRACHslot[i]);\r
- }\r
- for (i = 0; i < XRAN_MAX_SECTOR_NR; i++){\r
- EXPECT_EQ(m_xran_dev_ctx.prach_start_symbol[i], m_prach_start_symbol);\r
- EXPECT_EQ(m_xran_dev_ctx.prach_last_symbol[i], m_prach_last_symbol);\r
- }\r
-\r
- ret = xran_open(pHandle, m_xranConf);\r
- ASSERT_TRUE(ret == XRAN_STATUS_SUCCESS);\r
-\r
- ret = generate_cpmsg_prach(pHandle, &m_params, m_pSectGenInfo, m_pTestBuffer, &m_xran_dev_ctx,\r
- m_frameId, m_subframeId, m_slotId,\r
- m_beamId, m_ccId, m_antId, 0);\r
- ASSERT_TRUE(ret == XRAN_STATUS_SUCCESS);\r
- /* Verify the result */\r
- EXPECT_EQ(m_params.sectionType, XRAN_CP_SECTIONTYPE_3);\r
- EXPECT_EQ(m_params.dir, XRAN_DIR_UL);\r
- EXPECT_EQ(m_params.hdr.filterIdx, m_filterIdx);\r
- EXPECT_EQ(m_params.hdr.frameId, m_frameId);\r
- EXPECT_EQ(m_params.hdr.subframeId, m_subframeId);\r
- EXPECT_EQ(m_params.hdr.slotId, m_slotId);\r
- EXPECT_EQ(m_params.hdr.startSymId, m_startSymId);\r
- EXPECT_EQ(m_params.hdr.iqWidth, (m_pRUConfig->iqWidth==16)?0:m_pRUConfig->iqWidth);\r
- EXPECT_EQ(m_params.hdr.compMeth,m_pRUConfig->compMeth );\r
- EXPECT_EQ(m_params.hdr.timeOffset, m_m_params_timeOffset);\r
- EXPECT_EQ(m_params.hdr.fftSize,m_pRUConfig->fftSize);\r
- EXPECT_EQ(m_params.hdr.scs, m_pPRACHConfig->nPrachSubcSpacing);\r
- EXPECT_EQ(m_params.hdr.cpLength, 0);\r
- EXPECT_EQ(m_params.numSections, 1);\r
-\r
- EXPECT_EQ(m_params.sections[0].info.type, XRAN_CP_SECTIONTYPE_3);\r
- EXPECT_EQ(m_params.sections[0].info.startSymId, m_startSymId);\r
- EXPECT_EQ(m_params.sections[0].info.iqWidth, (m_pRUConfig->iqWidth==16)?0:m_pRUConfig->iqWidth);\r
- EXPECT_EQ(m_params.sections[0].info.compMeth, m_pRUConfig->compMeth);\r
-\r
- EXPECT_EQ(m_params.sections[0].info.id, m_id);\r
- EXPECT_EQ(m_params.sections[0].info.rb, XRAN_RBIND_EVERY);\r
- EXPECT_EQ(m_params.sections[0].info.symInc, XRAN_SYMBOLNUMBER_NOTINC);\r
- EXPECT_EQ(m_params.sections[0].info.startPrbc, m_startPrbc);\r
- EXPECT_EQ(m_params.sections[0].info.numPrbc, m_numPrbc);\r
- EXPECT_EQ(m_params.sections[0].info.numSymbol, m_numSymbol*m_occassionsInPrachSlot);\r
- EXPECT_EQ(m_params.sections[0].info.reMask, 0xfff);\r
- EXPECT_EQ(m_params.sections[0].info.beamId, m_beamId);\r
- EXPECT_EQ(m_params.sections[0].info.freqOffset, m_freqOffset);\r
- EXPECT_EQ(m_xran_dev_ctx.prach_last_symbol[m_ccId], m_prach_last_symbol);\r
- EXPECT_EQ(m_params.sections[0].info.ef, 0);\r
- EXPECT_EQ(m_params.sections[0].exDataSize, 0);\r
-\r
-}\r
-\r
-\r
-INSTANTIATE_TEST_CASE_P(UnitTest, PrachCheck,\r
- testing::ValuesIn(get_sequence(PrachCheck::get_number_of_cases("prach_functional"))));\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+
+#include "common.hpp"
+#include "xran_common.h"
+#include "xran_fh_o_du.h"
+#include "ethernet.h"
+#include "xran_transport.h"
+#include "xran_cp_api.h"
+
+#include <stdint.h>
+
+
+const std::string module_name = "Prach_test";
+
+
+class PrachCheck : public KernelTests
+{
+private:
+ struct xran_section_gen_info *m_pSectResult = NULL;
+
+protected:
+ struct xran_fh_config *m_xranConf;
+ struct xran_device_ctx m_xran_dev_ctx;
+ struct xran_prach_config *m_pPRACHConfig;
+ struct xran_ru_config *m_pRUConfig;
+ struct xran_prach_cp_config *m_pPrachCPConfig;
+
+ struct xran_section_gen_info *m_pSectGenInfo = NULL;
+ int m_maxSections = 8; /* not used */
+ int lastsymbol;
+
+ struct rte_mbuf *m_pTestBuffer;
+
+ struct xran_cp_gen_params m_params;
+ struct xran_recv_packet_info m_pktInfo;
+ struct xran_cp_gen_params m_result;
+
+ uint8_t m_dir;
+ std::string m_dirStr;
+ uint8_t m_sectionType;
+
+ uint8_t m_ccId, m_antId;
+ uint8_t m_seqId;
+ uint8_t m_frameId, m_subframeId, m_slotId;
+ uint8_t m_symStart, m_symNum;
+ uint16_t *m_prbStart = NULL, *m_prbNum = NULL;
+
+ uint8_t m_iqWidth, m_compMethod;
+ uint16_t m_beamId;
+ uint16_t m_reMask = 0xfff;
+ uint16_t m_sectionId;
+ uint8_t m_filterIndex;
+ //uint16_t m_timeOffset;
+ uint8_t m_fftSize;
+
+ //define reference values
+ uint8_t m_startSymId;
+ uint8_t m_x;
+ uint8_t m_filterIdx;
+ uint16_t m_startPrbc;
+ uint8_t m_numPrbc;
+ uint8_t m_numSymbol;
+ uint16_t m_timeOffset;
+ int32_t m_freqOffset;
+ uint8_t m_nrofPrachInSlot;
+ uint8_t m_occassionsInPrachSlot;
+ uint8_t m_y[XRAN_PRACH_CANDIDATE_Y];
+ uint8_t m_isPRACHslot[XRAN_PRACH_CANDIDATE_SLOT];
+ int m_prach_start_symbol;
+ int m_prach_last_symbol;
+ uint8_t m_SlotNrNum;
+ uint16_t m_m_params_timeOffset;
+ uint16_t m_id;
+
+ void SetUp() override
+ {
+ init_test("prach_functional");
+ memset(&m_xran_dev_ctx, 0, sizeof(struct xran_device_ctx));
+ //modify
+ m_xranConf = &m_xran_dev_ctx.fh_cfg;
+
+ m_pPRACHConfig = &m_xranConf->prach_conf;
+ m_pRUConfig = &m_xranConf->ru_conf;
+ m_pPrachCPConfig = &m_xran_dev_ctx.PrachCPConfig;
+ //initialize input parameters
+ m_xranConf->frame_conf.nNumerology = get_input_parameter<uint8_t>("Numerology");
+ m_xranConf->frame_conf.nFrameDuplexType = get_input_parameter<uint8_t>("FrameDuplexType");
+ m_xranConf->log_level = get_input_parameter<uint32_t>("loglevel");
+ m_pPRACHConfig->nPrachConfIdx = get_input_parameter<uint8_t>("PrachConfIdx");
+ m_pPRACHConfig->nPrachFreqStart = get_input_parameter<uint16_t>("PrachFreqStart");
+ m_pPRACHConfig->nPrachFreqOffset = get_input_parameter<int32_t>("PrachFreqOffset");
+ m_pPRACHConfig->nPrachSubcSpacing = get_input_parameter<uint8_t>("PrachSubcSpacing");
+
+ m_pRUConfig->iqWidth = get_input_parameter<uint8_t>("iqWidth");
+ m_pRUConfig->compMeth = get_input_parameter<uint8_t>("compMeth");
+ m_pRUConfig->fftSize = get_input_parameter<uint8_t>("fftSize");
+
+ m_frameId = get_input_parameter<uint8_t>("frameId");
+ m_subframeId = get_input_parameter<uint8_t>("subframeId");
+ m_slotId = get_input_parameter<uint8_t>("slotId");
+ m_beamId = get_input_parameter<uint16_t>("beamId");
+ m_ccId = get_input_parameter<uint8_t>("ccId");
+ m_antId = get_input_parameter<uint8_t>("antId");
+
+ //initialize reference output
+ m_startSymId = get_reference_parameter<uint8_t>("startSymId");
+ m_x = get_reference_parameter<uint8_t>("x_value");
+
+ m_filterIdx = get_reference_parameter<uint8_t>("filterIdx");
+ m_startPrbc = get_reference_parameter<uint16_t>("startPrbc");
+ m_numPrbc = get_reference_parameter<uint8_t>("numPrbc");
+ m_timeOffset = get_reference_parameter<uint16_t>("timeOffset");
+ m_freqOffset = get_reference_parameter<uint32_t>("freqOffset");
+ m_nrofPrachInSlot = get_reference_parameter<uint8_t>("nrofPrachInSlot");
+ m_m_params_timeOffset = get_reference_parameter<uint16_t>("m_params_timeOffset");
+ m_id = get_reference_parameter<uint16_t>("id");
+ std::vector<uint8_t> y_vec = get_reference_parameter<std::vector<uint8_t>>("y_value");
+ for(int i=0; i < XRAN_PRACH_CANDIDATE_Y; i++) {
+ m_y[i] = y_vec[i];
+ }
+
+ m_numSymbol = get_reference_parameter<uint8_t>("numSymbol");
+ m_occassionsInPrachSlot = get_reference_parameter<uint8_t>("occassionsInPrachSlot");
+
+ std::vector<uint8_t> index_vec = get_reference_parameter<std::vector<uint8_t>>("isPRACHslot");
+ m_SlotNrNum = get_reference_parameter<uint8_t>("SlotNrNum");
+ for(int i = 0; i < XRAN_PRACH_CANDIDATE_SLOT; i++){
+ m_isPRACHslot[i]=0;
+ }
+ for(int i=0; i<m_SlotNrNum;i++){
+ m_isPRACHslot[index_vec[i]]=1;
+ }
+
+
+ m_prach_start_symbol = get_reference_parameter<int>("prach_start_symbol");
+ m_prach_last_symbol = get_reference_parameter<int>("prach_last_symbol");
+
+ /* allocate and prepare required data storage */
+ m_pSectGenInfo = new struct xran_section_gen_info[8];
+ ASSERT_NE(m_pSectGenInfo, nullptr);
+ m_params.sections = m_pSectGenInfo;
+
+ /* allocating an mbuf for packet generatrion */
+ m_pTestBuffer = (struct rte_mbuf*)rte_pktmbuf_alloc(_eth_mbuf_pool);
+ ASSERT_FALSE(m_pTestBuffer == NULL);
+
+ }
+
+ void TearDown() override
+ {
+ if(m_pTestBuffer != NULL)
+ rte_pktmbuf_free(m_pTestBuffer);
+ if(m_pSectGenInfo)
+ delete[] m_pSectGenInfo;
+ return;
+ }
+};
+
+
+TEST_P(PrachCheck, PacketGen)//TestCaseName TestName
+{
+ int ret;
+ int32_t i;
+ void *pHandle = NULL;
+
+ /* Preparing input data for prach config */
+ ret = xran_init_prach(m_xranConf, &m_xran_dev_ctx);
+ ASSERT_TRUE(ret == XRAN_STATUS_SUCCESS);
+
+ /* Verify the result */
+ EXPECT_EQ(m_pPrachCPConfig->filterIdx, m_filterIdx);
+ EXPECT_EQ(m_pPrachCPConfig->startSymId, m_startSymId);
+ EXPECT_EQ(m_pPrachCPConfig->startPrbc, m_startPrbc);
+ EXPECT_EQ(m_pPrachCPConfig->numPrbc, m_numPrbc);
+ EXPECT_EQ(m_pPrachCPConfig->timeOffset, m_timeOffset);
+ EXPECT_EQ(m_pPrachCPConfig->freqOffset, m_freqOffset);
+ EXPECT_EQ(m_pPrachCPConfig->x, m_x);
+ EXPECT_EQ(m_pPrachCPConfig->nrofPrachInSlot, m_nrofPrachInSlot);
+ EXPECT_EQ(m_pPrachCPConfig->y[0], m_y[0]);
+ EXPECT_EQ(m_pPrachCPConfig->y[1], m_y[1]);
+ EXPECT_EQ(m_pPrachCPConfig->numSymbol, m_numSymbol);
+ EXPECT_EQ(m_pPrachCPConfig->occassionsInPrachSlot, m_occassionsInPrachSlot);
+ for (i = 0; i < XRAN_PRACH_CANDIDATE_SLOT; i++){
+ EXPECT_EQ(m_pPrachCPConfig->isPRACHslot[i], m_isPRACHslot[i]);
+ }
+ for (i = 0; i < XRAN_MAX_SECTOR_NR; i++){
+ EXPECT_EQ(m_xran_dev_ctx.prach_start_symbol[i], m_prach_start_symbol);
+ EXPECT_EQ(m_xran_dev_ctx.prach_last_symbol[i], m_prach_last_symbol);
+ }
+
+ ret = xran_open(pHandle, m_xranConf);
+ ASSERT_TRUE(ret == XRAN_STATUS_SUCCESS);
+
+ ret = generate_cpmsg_prach(pHandle, &m_params, m_pSectGenInfo, m_pTestBuffer, &m_xran_dev_ctx,
+ m_frameId, m_subframeId, m_slotId,
+ m_beamId, m_ccId, m_antId, 0);
+ ASSERT_TRUE(ret == XRAN_STATUS_SUCCESS);
+ /* Verify the result */
+ EXPECT_EQ(m_params.sectionType, XRAN_CP_SECTIONTYPE_3);
+ EXPECT_EQ(m_params.dir, XRAN_DIR_UL);
+ EXPECT_EQ(m_params.hdr.filterIdx, m_filterIdx);
+ EXPECT_EQ(m_params.hdr.frameId, m_frameId);
+ EXPECT_EQ(m_params.hdr.subframeId, m_subframeId);
+ EXPECT_EQ(m_params.hdr.slotId, m_slotId);
+ EXPECT_EQ(m_params.hdr.startSymId, m_startSymId);
+ EXPECT_EQ(m_params.hdr.iqWidth, (m_pRUConfig->iqWidth==16)?0:m_pRUConfig->iqWidth);
+ EXPECT_EQ(m_params.hdr.compMeth,m_pRUConfig->compMeth );
+ EXPECT_EQ(m_params.hdr.timeOffset, m_m_params_timeOffset);
+ EXPECT_EQ(m_params.hdr.fftSize,m_pRUConfig->fftSize);
+ EXPECT_EQ(m_params.hdr.scs, m_pPRACHConfig->nPrachSubcSpacing);
+ EXPECT_EQ(m_params.hdr.cpLength, 0);
+ EXPECT_EQ(m_params.numSections, 1);
+
+ EXPECT_EQ(m_params.sections[0].info.type, XRAN_CP_SECTIONTYPE_3);
+ EXPECT_EQ(m_params.sections[0].info.startSymId, m_startSymId);
+ EXPECT_EQ(m_params.sections[0].info.iqWidth, (m_pRUConfig->iqWidth==16)?0:m_pRUConfig->iqWidth);
+ EXPECT_EQ(m_params.sections[0].info.compMeth, m_pRUConfig->compMeth);
+
+ EXPECT_EQ(m_params.sections[0].info.id, m_id);
+ EXPECT_EQ(m_params.sections[0].info.rb, XRAN_RBIND_EVERY);
+ EXPECT_EQ(m_params.sections[0].info.symInc, XRAN_SYMBOLNUMBER_NOTINC);
+ EXPECT_EQ(m_params.sections[0].info.startPrbc, m_startPrbc);
+ EXPECT_EQ(m_params.sections[0].info.numPrbc, m_numPrbc);
+ EXPECT_EQ(m_params.sections[0].info.numSymbol, m_numSymbol*m_occassionsInPrachSlot);
+ EXPECT_EQ(m_params.sections[0].info.reMask, 0xfff);
+ EXPECT_EQ(m_params.sections[0].info.beamId, m_beamId);
+ EXPECT_EQ(m_params.sections[0].info.freqOffset, m_freqOffset);
+ EXPECT_EQ(m_xran_dev_ctx.prach_last_symbol[m_ccId], m_prach_last_symbol);
+ EXPECT_EQ(m_params.sections[0].info.ef, 0);
+ EXPECT_EQ(m_params.sections[0].exDataSize, 0);
+
+}
+
+
+INSTANTIATE_TEST_CASE_P(UnitTest, PrachCheck,
+ testing::ValuesIn(get_sequence(PrachCheck::get_number_of_cases("prach_functional"))));
+
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-\r
-#include "common.hpp"\r
-#include "xran_common.h"\r
-#include "xran_fh_o_du.h"\r
-#include "ethernet.h"\r
-#include "xran_transport.h"\r
-#include "xran_cp_api.h"\r
-\r
-#include <stdint.h>\r
-\r
-\r
-const std::string module_name = "Prach_test";\r
-\r
-\r
-class PrachPerf : public KernelTests\r
-{\r
-\r
- private:\r
- struct xran_section_gen_info *m_pSectResult = NULL;\r
-\r
- protected:\r
- struct xran_fh_config m_xranConf;\r
- struct xran_device_ctx m_xran_dev_ctx;\r
- struct xran_prach_config *m_pPRACHConfig;\r
- struct xran_prach_cp_config *m_pPrachCPConfig;\r
-\r
- struct xran_section_gen_info *m_pSectGenInfo = NULL;\r
- int m_maxSections = 8; /* not used */\r
- int lastsymbol;\r
-\r
- struct rte_mbuf *m_pTestBuffer;\r
-\r
- struct xran_cp_gen_params m_params;\r
- struct xran_recv_packet_info m_pktInfo;\r
- struct xran_cp_gen_params m_result;\r
-\r
- uint8_t m_dir;\r
- std::string m_dirStr;\r
- uint8_t m_sectionType;\r
-\r
- uint8_t m_ccId, m_antId;\r
- uint8_t m_seqId;\r
- uint8_t m_frameId, m_subframeId, m_slotId;\r
- uint8_t m_symStart, m_symNum;\r
- uint16_t *m_prbStart = NULL, *m_prbNum = NULL;\r
-\r
- uint8_t m_iqWidth, m_compMethod;\r
- uint16_t m_beamId;\r
- uint16_t m_reMask = 0xfff;\r
- uint16_t m_sectionId;\r
- uint8_t m_filterIndex;\r
- //uint16_t m_timeOffset;\r
- uint8_t m_fftSize;\r
-\r
- //define reference values\r
- uint8_t m_startSymId;\r
- uint8_t m_x;\r
- uint8_t m_filterIdx;\r
- uint16_t m_startPrbc;\r
- uint8_t m_numPrbc;\r
- uint8_t m_numSymbol;\r
- uint16_t m_timeOffset;\r
- int32_t m_freqOffset;\r
- uint8_t m_nrofPrachInSlot;\r
- uint8_t m_occassionsInPrachSlot;\r
- uint8_t m_y[XRAN_PRACH_CANDIDATE_Y];\r
- uint8_t m_isPRACHslot[XRAN_PRACH_CANDIDATE_SLOT];\r
- int m_prach_start_symbol;\r
- int m_prach_last_symbol;\r
- uint8_t m_SlotNrNum;\r
-\r
-\r
- void SetUp() override\r
- {\r
- init_test("prach_performance");\r
- memset(&m_xranConf, 0, sizeof(struct xran_fh_config));\r
- memset(&m_xran_dev_ctx, 0, sizeof(struct xran_device_ctx));\r
- m_pPRACHConfig = &m_xranConf.prach_conf;\r
- m_pPrachCPConfig = &m_xran_dev_ctx.PrachCPConfig;\r
-\r
- //initialize input parameters\r
- m_xranConf.frame_conf.nNumerology = get_input_parameter<uint8_t>("Numerology");\r
- m_xranConf.frame_conf.nFrameDuplexType = get_input_parameter<uint8_t>("FrameDuplexType");\r
- m_xranConf.log_level = get_input_parameter<uint32_t>("loglevel");\r
-\r
- m_pPRACHConfig->nPrachConfIdx = get_input_parameter<uint8_t>("PrachConfIdx");\r
- m_pPRACHConfig->nPrachFreqStart = get_input_parameter<uint16_t>("PrachFreqStart");\r
- m_pPRACHConfig->nPrachFreqOffset = get_input_parameter<int32_t>("PrachFreqOffset");\r
- m_pPRACHConfig->nPrachSubcSpacing = get_input_parameter<uint8_t>("PrachSubcSpacing");\r
-\r
-\r
- m_frameId = get_input_parameter<uint8_t>("frameId");\r
- m_subframeId = get_input_parameter<uint8_t>("subframeId");\r
- m_slotId = get_input_parameter<uint8_t>("slotId");\r
- m_beamId = get_input_parameter<uint16_t>("beamId");\r
- m_ccId = get_input_parameter<uint8_t>("ccId");\r
- m_antId = get_input_parameter<uint8_t>("antId");\r
-\r
- //initialize reference output\r
- m_startSymId = get_reference_parameter<uint8_t>("startSymId");\r
- m_x = get_reference_parameter<uint8_t>("x_value");\r
- m_filterIdx = get_reference_parameter<uint8_t>("filterIdx");\r
- m_startPrbc = get_reference_parameter<uint16_t>("startPrbc");\r
- m_numPrbc = get_reference_parameter<uint8_t>("numPrbc");\r
- m_timeOffset = get_reference_parameter<uint16_t>("timeOffset");\r
- m_freqOffset = get_reference_parameter<uint32_t>("freqOffset");\r
- m_nrofPrachInSlot = get_reference_parameter<uint8_t>("nrofPrachInSlot");\r
-\r
- //get the values from a vector\r
- std::vector<uint8_t> y_vec = get_reference_parameter<std::vector<uint8_t>>("y_value");\r
- for(int i=0; i < XRAN_PRACH_CANDIDATE_Y; i++) {\r
- m_y[i] = y_vec[i];\r
- }\r
-\r
- m_numSymbol = get_reference_parameter<uint8_t>("numSymbol");\r
- m_occassionsInPrachSlot = get_reference_parameter<uint8_t>("occassionsInPrachSlot");\r
-\r
- std::vector<uint8_t> index_vec = get_reference_parameter<std::vector<uint8_t>>("isPRACHslot");\r
- m_SlotNrNum = get_reference_parameter<uint8_t>("SlotNrNum");\r
- for(int i = 0; i < XRAN_PRACH_CANDIDATE_SLOT; i++){\r
- m_isPRACHslot[i]=0;\r
- }\r
- for(int i=0; i<m_SlotNrNum;i++){\r
- m_isPRACHslot[index_vec[i]]=1;\r
- }\r
-\r
-\r
- m_prach_start_symbol = get_reference_parameter<int>("prach_start_symbol");\r
- m_prach_last_symbol = get_reference_parameter<int>("prach_last_symbol");\r
-\r
- /* allocate and prepare required data storage */\r
- m_pSectGenInfo = new struct xran_section_gen_info[8];\r
- ASSERT_NE(m_pSectGenInfo, nullptr);\r
- m_params.sections = m_pSectGenInfo;\r
-\r
- /* allocating an mbuf for packet generatrion */\r
- m_pTestBuffer = (struct rte_mbuf*)rte_pktmbuf_alloc(_eth_mbuf_pool);\r
- ASSERT_FALSE(m_pTestBuffer == NULL);\r
-\r
- }\r
-\r
- void TearDown() override\r
- {\r
-\r
- if(m_pTestBuffer != NULL)\r
- rte_pktmbuf_free(m_pTestBuffer);\r
- if(m_pSectGenInfo)\r
- delete[] m_pSectGenInfo;\r
-\r
- return;\r
- }\r
-};\r
-\r
-void performance_cp(void *pHandle,struct xran_cp_gen_params *params, struct xran_section_gen_info *sect_geninfo, struct xran_device_ctx *pxran_lib_ctx,\r
- uint8_t frame_id, uint8_t subframe_id, uint8_t slot_id,\r
- uint16_t beam_id, uint8_t cc_id, uint8_t prach_port_id, uint8_t seq_id)\r
-{\r
- struct rte_mbuf *mbuf;\r
-\r
- mbuf = (struct rte_mbuf*)rte_pktmbuf_alloc(_eth_mbuf_pool);\r
-\r
- generate_cpmsg_prach(pHandle, params, sect_geninfo, mbuf, pxran_lib_ctx,\r
- frame_id, subframe_id, slot_id,\r
- beam_id, cc_id, prach_port_id, seq_id);\r
-\r
- seq_id++;\r
-\r
- rte_pktmbuf_free(mbuf);\r
-}\r
-\r
-TEST_P(PrachPerf, PacketGen)//TestCaseName TestName\r
-{\r
- int ret;\r
- void *pHandle = NULL;\r
-\r
- /* Preparing input data for prach config */\r
- ret = xran_init_prach(&m_xranConf, &m_xran_dev_ctx);\r
- ASSERT_TRUE(ret == XRAN_STATUS_SUCCESS);\r
-\r
-\r
- ret = generate_cpmsg_prach(pHandle, &m_params, m_pSectGenInfo, m_pTestBuffer, &m_xran_dev_ctx,\r
- m_frameId, m_subframeId, m_slotId,\r
- m_beamId, m_ccId, m_antId, 0);\r
- ASSERT_TRUE(ret == XRAN_STATUS_SUCCESS);\r
-\r
-\r
- performance("C", module_name,\r
- &performance_cp, pHandle, &m_params, m_pSectGenInfo, &m_xran_dev_ctx,\r
- m_frameId, m_subframeId, m_slotId,\r
- m_beamId, m_ccId, m_antId, 0);\r
-}\r
-\r
-\r
-INSTANTIATE_TEST_CASE_P(UnitTest, PrachPerf,\r
- testing::ValuesIn(get_sequence(PrachPerf::get_number_of_cases("prach_performance"))));\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+
+#include "common.hpp"
+#include "xran_common.h"
+#include "xran_fh_o_du.h"
+#include "ethernet.h"
+#include "xran_transport.h"
+#include "xran_cp_api.h"
+
+#include <stdint.h>
+
+
+const std::string module_name = "Prach_test";
+
+
+class PrachPerf : public KernelTests
+{
+
+ private:
+ struct xran_section_gen_info *m_pSectResult = NULL;
+
+ protected:
+ struct xran_fh_config m_xranConf;
+ struct xran_device_ctx m_xran_dev_ctx;
+ struct xran_prach_config *m_pPRACHConfig;
+ struct xran_prach_cp_config *m_pPrachCPConfig;
+
+ struct xran_section_gen_info *m_pSectGenInfo = NULL;
+ int m_maxSections = 8; /* not used */
+ int lastsymbol;
+
+ struct rte_mbuf *m_pTestBuffer;
+
+ struct xran_cp_gen_params m_params;
+ struct xran_recv_packet_info m_pktInfo;
+ struct xran_cp_gen_params m_result;
+
+ uint8_t m_dir;
+ std::string m_dirStr;
+ uint8_t m_sectionType;
+
+ uint8_t m_ccId, m_antId;
+ uint8_t m_seqId;
+ uint8_t m_frameId, m_subframeId, m_slotId;
+ uint8_t m_symStart, m_symNum;
+ uint16_t *m_prbStart = NULL, *m_prbNum = NULL;
+
+ uint8_t m_iqWidth, m_compMethod;
+ uint16_t m_beamId;
+ uint16_t m_reMask = 0xfff;
+ uint16_t m_sectionId;
+ uint8_t m_filterIndex;
+ //uint16_t m_timeOffset;
+ uint8_t m_fftSize;
+
+ //define reference values
+ uint8_t m_startSymId;
+ uint8_t m_x;
+ uint8_t m_filterIdx;
+ uint16_t m_startPrbc;
+ uint8_t m_numPrbc;
+ uint8_t m_numSymbol;
+ uint16_t m_timeOffset;
+ int32_t m_freqOffset;
+ uint8_t m_nrofPrachInSlot;
+ uint8_t m_occassionsInPrachSlot;
+ uint8_t m_y[XRAN_PRACH_CANDIDATE_Y];
+ uint8_t m_isPRACHslot[XRAN_PRACH_CANDIDATE_SLOT];
+ int m_prach_start_symbol;
+ int m_prach_last_symbol;
+ uint8_t m_SlotNrNum;
+
+
+ void SetUp() override
+ {
+ init_test("prach_performance");
+ memset(&m_xranConf, 0, sizeof(struct xran_fh_config));
+ memset(&m_xran_dev_ctx, 0, sizeof(struct xran_device_ctx));
+ m_pPRACHConfig = &m_xranConf.prach_conf;
+ m_pPrachCPConfig = &m_xran_dev_ctx.PrachCPConfig;
+
+ //initialize input parameters
+ m_xranConf.frame_conf.nNumerology = get_input_parameter<uint8_t>("Numerology");
+ m_xranConf.frame_conf.nFrameDuplexType = get_input_parameter<uint8_t>("FrameDuplexType");
+ m_xranConf.log_level = get_input_parameter<uint32_t>("loglevel");
+
+ m_pPRACHConfig->nPrachConfIdx = get_input_parameter<uint8_t>("PrachConfIdx");
+ m_pPRACHConfig->nPrachFreqStart = get_input_parameter<uint16_t>("PrachFreqStart");
+ m_pPRACHConfig->nPrachFreqOffset = get_input_parameter<int32_t>("PrachFreqOffset");
+ m_pPRACHConfig->nPrachSubcSpacing = get_input_parameter<uint8_t>("PrachSubcSpacing");
+
+
+ m_frameId = get_input_parameter<uint8_t>("frameId");
+ m_subframeId = get_input_parameter<uint8_t>("subframeId");
+ m_slotId = get_input_parameter<uint8_t>("slotId");
+ m_beamId = get_input_parameter<uint16_t>("beamId");
+ m_ccId = get_input_parameter<uint8_t>("ccId");
+ m_antId = get_input_parameter<uint8_t>("antId");
+
+ //initialize reference output
+ m_startSymId = get_reference_parameter<uint8_t>("startSymId");
+ m_x = get_reference_parameter<uint8_t>("x_value");
+ m_filterIdx = get_reference_parameter<uint8_t>("filterIdx");
+ m_startPrbc = get_reference_parameter<uint16_t>("startPrbc");
+ m_numPrbc = get_reference_parameter<uint8_t>("numPrbc");
+ m_timeOffset = get_reference_parameter<uint16_t>("timeOffset");
+ m_freqOffset = get_reference_parameter<uint32_t>("freqOffset");
+ m_nrofPrachInSlot = get_reference_parameter<uint8_t>("nrofPrachInSlot");
+
+ //get the values from a vector
+ std::vector<uint8_t> y_vec = get_reference_parameter<std::vector<uint8_t>>("y_value");
+ for(int i=0; i < XRAN_PRACH_CANDIDATE_Y; i++) {
+ m_y[i] = y_vec[i];
+ }
+
+ m_numSymbol = get_reference_parameter<uint8_t>("numSymbol");
+ m_occassionsInPrachSlot = get_reference_parameter<uint8_t>("occassionsInPrachSlot");
+
+ std::vector<uint8_t> index_vec = get_reference_parameter<std::vector<uint8_t>>("isPRACHslot");
+ m_SlotNrNum = get_reference_parameter<uint8_t>("SlotNrNum");
+ for(int i = 0; i < XRAN_PRACH_CANDIDATE_SLOT; i++){
+ m_isPRACHslot[i]=0;
+ }
+ for(int i=0; i<m_SlotNrNum;i++){
+ m_isPRACHslot[index_vec[i]]=1;
+ }
+
+
+ m_prach_start_symbol = get_reference_parameter<int>("prach_start_symbol");
+ m_prach_last_symbol = get_reference_parameter<int>("prach_last_symbol");
+
+ /* allocate and prepare required data storage */
+ m_pSectGenInfo = new struct xran_section_gen_info[8];
+ ASSERT_NE(m_pSectGenInfo, nullptr);
+ m_params.sections = m_pSectGenInfo;
+
+ /* allocating an mbuf for packet generatrion */
+ m_pTestBuffer = (struct rte_mbuf*)rte_pktmbuf_alloc(_eth_mbuf_pool);
+ ASSERT_FALSE(m_pTestBuffer == NULL);
+
+ }
+
+ void TearDown() override
+ {
+
+ if(m_pTestBuffer != NULL)
+ rte_pktmbuf_free(m_pTestBuffer);
+ if(m_pSectGenInfo)
+ delete[] m_pSectGenInfo;
+
+ return;
+ }
+};
+
+void performance_cp(void *pHandle,struct xran_cp_gen_params *params, struct xran_section_gen_info *sect_geninfo, struct xran_device_ctx *pxran_lib_ctx,
+ uint8_t frame_id, uint8_t subframe_id, uint8_t slot_id,
+ uint16_t beam_id, uint8_t cc_id, uint8_t prach_port_id, uint8_t seq_id)
+{
+ struct rte_mbuf *mbuf;
+
+ mbuf = (struct rte_mbuf*)rte_pktmbuf_alloc(_eth_mbuf_pool);
+
+ generate_cpmsg_prach(pHandle, params, sect_geninfo, mbuf, pxran_lib_ctx,
+ frame_id, subframe_id, slot_id,
+ beam_id, cc_id, prach_port_id, seq_id);
+
+ seq_id++;
+
+ rte_pktmbuf_free(mbuf);
+}
+
+TEST_P(PrachPerf, PacketGen)//TestCaseName TestName
+{
+ int ret;
+ void *pHandle = NULL;
+
+ /* Preparing input data for prach config */
+ ret = xran_init_prach(&m_xranConf, &m_xran_dev_ctx);
+ ASSERT_TRUE(ret == XRAN_STATUS_SUCCESS);
+
+
+ ret = generate_cpmsg_prach(pHandle, &m_params, m_pSectGenInfo, m_pTestBuffer, &m_xran_dev_ctx,
+ m_frameId, m_subframeId, m_slotId,
+ m_beamId, m_ccId, m_antId, 0);
+ ASSERT_TRUE(ret == XRAN_STATUS_SUCCESS);
+
+
+ performance("C", module_name,
+ &performance_cp, pHandle, &m_params, m_pSectGenInfo, &m_xran_dev_ctx,
+ m_frameId, m_subframeId, m_slotId,
+ m_beamId, m_ccId, m_antId, 0);
+}
+
+
+INSTANTIATE_TEST_CASE_P(UnitTest, PrachPerf,
+ testing::ValuesIn(get_sequence(PrachPerf::get_number_of_cases("prach_performance"))));
+
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-\r
-#include "common.hpp"\r
-#include "xran_common.h"\r
-#include "xran_up_api.h"\r
-#include "xran_fh_o_du.h"\r
-#include "ethernet.h"\r
-\r
-#include <stdint.h>\r
-\r
-const std::string module_name = "u-plane";\r
-\r
-class U_planeCheck : public KernelTests\r
-{\r
-protected:\r
- struct rte_mbuf *test_buffer;\r
- char * iq_offset;\r
- struct rte_mempool *test_eth_mbuf_pool;\r
-\r
- void SetUp() override\r
- {\r
- init_test("u_plane_functional");\r
- test_buffer = (struct rte_mbuf*)rte_pktmbuf_alloc(_eth_mbuf_pool);\r
-\r
- if(test_buffer == NULL) {\r
- std::cout << __func__ << ":" << __LINE__ << " Failed to allocatte a packet buffer!" << std::endl;\r
- return;\r
- }\r
- iq_offset = rte_pktmbuf_mtod(test_buffer, char * );\r
- iq_offset = iq_offset + sizeof(struct ether_hdr) +\r
- sizeof (struct xran_ecpri_hdr) +\r
- sizeof (struct radio_app_common_hdr) +\r
- sizeof(struct data_section_hdr);\r
- }\r
-\r
- /* It's called after an execution of the each test case.*/\r
- void TearDown() override\r
- {\r
- rte_pktmbuf_free(test_buffer);\r
- }\r
-};\r
-\r
-/* simple test of DL and UL functionality */\r
-TEST_P(U_planeCheck, Test_DLUL)\r
-{\r
- enum xran_pkt_dir direction = XRAN_DIR_DL;\r
- uint16_t section_id = 7;\r
- enum xran_input_byte_order iq_buf_byte_order = XRAN_CPU_LE_BYTE_ORDER;\r
- uint8_t frame_id = 99;\r
- uint8_t subframe_id = 9;\r
- uint8_t slot_id = 10;\r
- uint8_t symbol_no = 7;\r
- int prb_start = 0;\r
- int prb_num = 66;\r
- uint8_t CC_ID = 0;\r
- uint8_t RU_Port_ID = 0;\r
- uint8_t seq_id =0;\r
- uint32_t do_copy = 0;\r
- uint8_t compMeth = 0;\r
- uint8_t iqWidth = 16;\r
-\r
- int32_t prep_bytes;\r
- struct xran_ecpri_hdr *ecpri_hdr = NULL;\r
- struct radio_app_common_hdr *app_hdr = NULL;\r
- struct data_section_hdr *section_hdr = NULL;\r
-\r
- char *pChar = NULL;\r
- uint16_t payl_size = 0;\r
- struct data_section_hdr res_sect;\r
-\r
- prep_bytes = prepare_symbol_ex(direction,\r
- section_id,\r
- test_buffer,\r
- (struct rb_map *)iq_offset,\r
- compMeth,\r
- iqWidth,\r
- iq_buf_byte_order,\r
- frame_id,\r
- subframe_id,\r
- slot_id,\r
- symbol_no,\r
- prb_start,\r
- prb_num,\r
- CC_ID,\r
- RU_Port_ID,\r
- seq_id,\r
- do_copy);\r
-\r
- ASSERT_EQ(prep_bytes, 3168);\r
-\r
- pChar = rte_pktmbuf_mtod(test_buffer, char*);\r
-\r
- ecpri_hdr = (struct xran_ecpri_hdr *)(pChar + sizeof(struct ether_hdr));\r
- app_hdr = (struct radio_app_common_hdr *)(pChar + sizeof(struct ether_hdr)\r
- + sizeof (struct xran_ecpri_hdr));\r
- section_hdr = (struct data_section_hdr *)(pChar + sizeof(struct ether_hdr) +\r
- sizeof (struct xran_ecpri_hdr) +\r
- sizeof(struct radio_app_common_hdr));\r
-\r
- ASSERT_EQ (ecpri_hdr->cmnhdr.ecpri_mesg_type, ECPRI_IQ_DATA);\r
- payl_size = rte_be_to_cpu_16(ecpri_hdr->cmnhdr.ecpri_payl_size);\r
- ASSERT_EQ (payl_size, 3180);\r
-\r
- ASSERT_EQ(app_hdr->data_direction, direction);\r
- ASSERT_EQ(app_hdr->frame_id, frame_id);\r
-\r
- res_sect.fields.all_bits = rte_be_to_cpu_32(section_hdr->fields.all_bits);\r
- ASSERT_EQ(res_sect.fields.num_prbu, prb_num);\r
- ASSERT_EQ(res_sect.fields.sect_id, section_id);\r
-\r
- {\r
- /* UL direction */\r
- void *iq_samp_buf;\r
- struct ecpri_seq_id seq;\r
- int num_bytes = 0;\r
-\r
- uint8_t CC_ID = 0;\r
- uint8_t Ant_ID = 0;\r
- uint8_t frame_id = 0;\r
- uint8_t subframe_id = 0;\r
- uint8_t slot_id = 0;\r
- uint8_t symb_id = 0;\r
-\r
- uint8_t compMeth = 0;\r
- uint8_t iqWidth = 0;\r
-\r
-\r
- uint16_t num_prbu;\r
- uint16_t start_prbu;\r
- uint16_t sym_inc;\r
- uint16_t rb;\r
- uint16_t sect_id;\r
-\r
- int32_t prep_bytes;\r
-\r
- char *pChar = NULL;\r
-\r
-\r
- num_bytes = xran_extract_iq_samples(test_buffer,\r
- &iq_samp_buf,\r
- &CC_ID,\r
- &Ant_ID,\r
- &frame_id,\r
- &subframe_id,\r
- &slot_id,\r
- &symb_id,\r
- &seq,\r
- &num_prbu,\r
- &start_prbu,\r
- &sym_inc,\r
- &rb,\r
- §_id,\r
- 0,\r
- &compMeth,\r
- &iqWidth);\r
-\r
- ASSERT_EQ(num_bytes, 3182);\r
- ASSERT_EQ(prb_num, 66);\r
- ASSERT_EQ(CC_ID, 0);\r
- }\r
-}\r
-\r
-INSTANTIATE_TEST_CASE_P(UnitTest, U_planeCheck,\r
- testing::ValuesIn(get_sequence(U_planeCheck::get_number_of_cases("u_plane_functional"))));\r
-\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+
+#include "common.hpp"
+#include "xran_common.h"
+#include "xran_up_api.h"
+#include "xran_fh_o_du.h"
+#include "ethernet.h"
+
+#include <stdint.h>
+
+const std::string module_name = "u-plane";
+
+class U_planeCheck : public KernelTests
+{
+protected:
+ struct rte_mbuf *test_buffer;
+ char * iq_offset;
+ struct rte_mempool *test_eth_mbuf_pool;
+
+ void SetUp() override
+ {
+ init_test("u_plane_functional");
+ test_buffer = (struct rte_mbuf*)rte_pktmbuf_alloc(_eth_mbuf_pool);
+
+ if(test_buffer == NULL) {
+ std::cout << __func__ << ":" << __LINE__ << " Failed to allocatte a packet buffer!" << std::endl;
+ return;
+ }
+ iq_offset = rte_pktmbuf_mtod(test_buffer, char * );
+ iq_offset = iq_offset + sizeof(struct ether_hdr) +
+ sizeof (struct xran_ecpri_hdr) +
+ sizeof (struct radio_app_common_hdr) +
+ sizeof(struct data_section_hdr);
+ }
+
+ /* It's called after an execution of the each test case.*/
+ void TearDown() override
+ {
+ rte_pktmbuf_free(test_buffer);
+ }
+};
+
+/* simple test of DL and UL functionality */
+TEST_P(U_planeCheck, Test_DLUL)
+{
+ enum xran_pkt_dir direction = XRAN_DIR_DL;
+ uint16_t section_id = 7;
+ enum xran_input_byte_order iq_buf_byte_order = XRAN_CPU_LE_BYTE_ORDER;
+ uint8_t frame_id = 99;
+ uint8_t subframe_id = 9;
+ uint8_t slot_id = 10;
+ uint8_t symbol_no = 7;
+ int prb_start = 0;
+ int prb_num = 66;
+ uint8_t CC_ID = 0;
+ uint8_t RU_Port_ID = 0;
+ uint8_t seq_id =0;
+ uint32_t do_copy = 0;
+ uint8_t compMeth = 0;
+ uint8_t iqWidth = 16;
+
+ int32_t prep_bytes;
+ struct xran_ecpri_hdr *ecpri_hdr = NULL;
+ struct radio_app_common_hdr *app_hdr = NULL;
+ struct data_section_hdr *section_hdr = NULL;
+
+ char *pChar = NULL;
+ uint16_t payl_size = 0;
+ struct data_section_hdr res_sect;
+
+ prep_bytes = prepare_symbol_ex(direction,
+ section_id,
+ test_buffer,
+ (struct rb_map *)iq_offset,
+ compMeth,
+ iqWidth,
+ iq_buf_byte_order,
+ frame_id,
+ subframe_id,
+ slot_id,
+ symbol_no,
+ prb_start,
+ prb_num,
+ CC_ID,
+ RU_Port_ID,
+ seq_id,
+ do_copy);
+
+ ASSERT_EQ(prep_bytes, 3168);
+
+ pChar = rte_pktmbuf_mtod(test_buffer, char*);
+
+ ecpri_hdr = (struct xran_ecpri_hdr *)(pChar + sizeof(struct ether_hdr));
+ app_hdr = (struct radio_app_common_hdr *)(pChar + sizeof(struct ether_hdr)
+ + sizeof (struct xran_ecpri_hdr));
+ section_hdr = (struct data_section_hdr *)(pChar + sizeof(struct ether_hdr) +
+ sizeof (struct xran_ecpri_hdr) +
+ sizeof(struct radio_app_common_hdr));
+
+ ASSERT_EQ (ecpri_hdr->cmnhdr.ecpri_mesg_type, ECPRI_IQ_DATA);
+ payl_size = rte_be_to_cpu_16(ecpri_hdr->cmnhdr.ecpri_payl_size);
+ ASSERT_EQ (payl_size, 3180);
+
+ ASSERT_EQ(app_hdr->data_direction, direction);
+ ASSERT_EQ(app_hdr->frame_id, frame_id);
+
+ res_sect.fields.all_bits = rte_be_to_cpu_32(section_hdr->fields.all_bits);
+ ASSERT_EQ(res_sect.fields.num_prbu, prb_num);
+ ASSERT_EQ(res_sect.fields.sect_id, section_id);
+
+ {
+ /* UL direction */
+ void *iq_samp_buf;
+ struct ecpri_seq_id seq;
+ int num_bytes = 0;
+
+ uint8_t CC_ID = 0;
+ uint8_t Ant_ID = 0;
+ uint8_t frame_id = 0;
+ uint8_t subframe_id = 0;
+ uint8_t slot_id = 0;
+ uint8_t symb_id = 0;
+
+ uint8_t compMeth = 0;
+ uint8_t iqWidth = 0;
+
+
+ uint16_t num_prbu;
+ uint16_t start_prbu;
+ uint16_t sym_inc;
+ uint16_t rb;
+ uint16_t sect_id;
+
+ int32_t prep_bytes;
+
+ char *pChar = NULL;
+
+
+ num_bytes = xran_extract_iq_samples(test_buffer,
+ &iq_samp_buf,
+ &CC_ID,
+ &Ant_ID,
+ &frame_id,
+ &subframe_id,
+ &slot_id,
+ &symb_id,
+ &seq,
+ &num_prbu,
+ &start_prbu,
+ &sym_inc,
+ &rb,
+ §_id,
+ 0,
+ &compMeth,
+ &iqWidth);
+
+ ASSERT_EQ(num_bytes, 3182);
+ ASSERT_EQ(prb_num, 66);
+ ASSERT_EQ(CC_ID, 0);
+ }
+}
+
+INSTANTIATE_TEST_CASE_P(UnitTest, U_planeCheck,
+ testing::ValuesIn(get_sequence(U_planeCheck::get_number_of_cases("u_plane_functional"))));
+
+
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-\r
-#include "common.hpp"\r
-\r
-#include "xran_common.h"\r
-#include "xran_fh_o_du.h"\r
-#include "ethernet.h"\r
-\r
-#include <stdint.h>\r
-\r
-const std::string module_name = "u-plane";\r
-\r
-class U_planePerf : public KernelTests\r
-{\r
-\r
-protected:\r
- int32_t request;\r
- int32_t response;\r
-\r
- struct rte_mbuf *test_buffer;\r
- char * iq_offset;\r
- struct rte_mempool *test_eth_mbuf_pool;\r
-\r
- void SetUp() override\r
- {\r
- /* Parameters stored in the functional section will be used. GTest will call\r
- TEST_P (including SetUp and TearDown) for each case in the section. */\r
- init_test("u_plane_performace");\r
- test_eth_mbuf_pool = rte_pktmbuf_pool_create("mempool", NUM_MBUFS,\r
- MBUF_CACHE, 0, MBUF_POOL_ELEMENT, rte_socket_id());\r
-\r
- /* buffer size defined as the maximum size of all inputs/outputs in BYTE */\r
- const int buffer_size = 9600;\r
- test_buffer = (struct rte_mbuf*)rte_pktmbuf_alloc(test_eth_mbuf_pool);\r
-\r
- iq_offset = rte_pktmbuf_mtod(test_buffer, char * );\r
- iq_offset = iq_offset + sizeof(struct ether_hdr) +\r
- sizeof (struct xran_ecpri_hdr) +\r
- sizeof (struct radio_app_common_hdr) +\r
- sizeof(struct data_section_hdr);\r
- }\r
-\r
- /* It's called after an execution of the each test case.*/\r
- void TearDown() override\r
- {\r
- rte_pktmbuf_free(test_buffer);\r
- }\r
-\r
- void fucntional_dl(F function, int32_t* request, int32_t* response)\r
- {\r
- enum xran_pkt_dir direction = XRAN_DIR_DL;\r
- uint16_t section_id = 0;\r
- enum xran_input_byte_order iq_buf_byte_order = XRAN_CPU_LE_BYTE_ORDER;\r
- uint8_t frame_id = 0;\r
- uint8_t subframe_id = 0;\r
- uint8_t slot_id = 0;\r
- uint8_t symbol_no = 0;\r
- int prb_start = 0;\r
- int prb_num = 66;\r
- uint8_t CC_ID = 0;\r
- uint8_t RU_Port_ID = 0;\r
- uint8_t seq_id =0;\r
- uint32_t do_copy = 0;\r
-\r
- int32_t prep_bytes;\r
-\r
- prep_bytes = prepare_symbol_ex(direction,\r
- section_id,\r
- test_buffer,\r
- (struct rb_map *)iq_offset,\r
- iq_buf_byte_order,\r
- frame_id,\r
- subframe_id,\r
- slot_id,\r
- symbol_no,\r
- prb_start,\r
- prb_num,\r
- CC_ID,\r
- RU_Port_ID,\r
- seq_id,\r
- do_copy);\r
-\r
- //ASSERT_EQ(prep_bytes, 3168);\r
- }\r
-};\r
-\r
-TEST_P(U_planePerf, Test_DL)\r
-{\r
- performance("C", module_name, fucntional_dl, &request, &response);\r
-}\r
-\r
-INSTANTIATE_TEST_CASE_P(UnitTest, U_planePerf,\r
- testing::ValuesIn(get_sequence(U_planePerf::get_number_of_cases("u_plane_performance"))));\r
-\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+
+#include "common.hpp"
+
+#include "xran_common.h"
+#include "xran_fh_o_du.h"
+#include "ethernet.h"
+
+#include <stdint.h>
+
+const std::string module_name = "u-plane";
+
+class U_planePerf : public KernelTests
+{
+
+protected:
+ int32_t request;
+ int32_t response;
+
+ struct rte_mbuf *test_buffer;
+ char * iq_offset;
+ struct rte_mempool *test_eth_mbuf_pool;
+
+ void SetUp() override
+ {
+ /* Parameters stored in the functional section will be used. GTest will call
+ TEST_P (including SetUp and TearDown) for each case in the section. */
+ init_test("u_plane_performace");
+ test_eth_mbuf_pool = rte_pktmbuf_pool_create("mempool", NUM_MBUFS,
+ MBUF_CACHE, 0, MBUF_POOL_ELEMENT, rte_socket_id());
+
+ /* buffer size defined as the maximum size of all inputs/outputs in BYTE */
+ const int buffer_size = 9600;
+ test_buffer = (struct rte_mbuf*)rte_pktmbuf_alloc(test_eth_mbuf_pool);
+
+ iq_offset = rte_pktmbuf_mtod(test_buffer, char * );
+ iq_offset = iq_offset + sizeof(struct ether_hdr) +
+ sizeof (struct xran_ecpri_hdr) +
+ sizeof (struct radio_app_common_hdr) +
+ sizeof(struct data_section_hdr);
+ }
+
+ /* It's called after an execution of the each test case.*/
+ void TearDown() override
+ {
+ rte_pktmbuf_free(test_buffer);
+ }
+
+ void fucntional_dl(F function, int32_t* request, int32_t* response)
+ {
+ enum xran_pkt_dir direction = XRAN_DIR_DL;
+ uint16_t section_id = 0;
+ enum xran_input_byte_order iq_buf_byte_order = XRAN_CPU_LE_BYTE_ORDER;
+ uint8_t frame_id = 0;
+ uint8_t subframe_id = 0;
+ uint8_t slot_id = 0;
+ uint8_t symbol_no = 0;
+ int prb_start = 0;
+ int prb_num = 66;
+ uint8_t CC_ID = 0;
+ uint8_t RU_Port_ID = 0;
+ uint8_t seq_id =0;
+ uint32_t do_copy = 0;
+
+ int32_t prep_bytes;
+
+ prep_bytes = prepare_symbol_ex(direction,
+ section_id,
+ test_buffer,
+ (struct rb_map *)iq_offset,
+ iq_buf_byte_order,
+ frame_id,
+ subframe_id,
+ slot_id,
+ symbol_no,
+ prb_start,
+ prb_num,
+ CC_ID,
+ RU_Port_ID,
+ seq_id,
+ do_copy);
+
+ //ASSERT_EQ(prep_bytes, 3168);
+ }
+};
+
+TEST_P(U_planePerf, Test_DL)
+{
+ performance("C", module_name, fucntional_dl, &request, &response);
+}
+
+INSTANTIATE_TEST_CASE_P(UnitTest, U_planePerf,
+ testing::ValuesIn(get_sequence(U_planePerf::get_number_of_cases("u_plane_performance"))));
+
+
-/******************************************************************************\r
-*\r
-* Copyright (c) 2019 Intel.\r
-*\r
-* Licensed under the Apache License, Version 2.0 (the "License");\r
-* you may not use this file except in compliance with the License.\r
-* You may obtain a copy of the License at\r
-*\r
-* http://www.apache.org/licenses/LICENSE-2.0\r
-*\r
-* Unless required by applicable law or agreed to in writing, software\r
-* distributed under the License is distributed on an "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
-* See the License for the specific language governing permissions and\r
-* limitations under the License.\r
-*\r
-*******************************************************************************/\r
-\r
-#include <limits.h>\r
-#include "xran_compression.h"\r
-#include "gtest/gtest.h"\r
-\r
-#define MAX_IQ (273*12*2)// 273 RBs, 12 SC, 32bits IQ\r
-\r
-int8_t iCompressionOutput_AVX_A[MAX_IQ + MAX_IQ/24]; /* 273 RB 8 bits IQ + exponent */\r
-int16_t iDeCompressionOutput_AVX_A[MAX_IQ]; /* 273 RB 16bits IQ */\r
-int16_t iCompressionInput[MAX_IQ]; /* 273 RB 16bits IQ */\r
-int16_t iLength = 273*12*2; // total 16bits IQ\r
-\r
-// Tests\r
-/*\r
-TEST(Compression, Zero) {\r
- EXPECT_EQ(0, xran_bfp_comp_avx512_fun_a(iCompressionInput,iCompressionOutput_AVX_A, iLength));\r
-}\r
-\r
-\r
-\r
-TEST(Decompression, Zero) {\r
- iLength= 24+1;\r
- EXPECT_EQ(0, xran_bfp_decomp_avx512_fun_a(iCompressionOutput_AVX_A,iDeCompressionOutput_AVX_A,iLength));\r
-}*/\r
-\r
-\r
+/******************************************************************************
+*
+* Copyright (c) 2019 Intel.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+*******************************************************************************/
+
+#include <limits.h>
+#include "xran_compression.h"
+#include "gtest/gtest.h"
+
+#define MAX_IQ (273*12*2)// 273 RBs, 12 SC, 32bits IQ
+
+int8_t iCompressionOutput_AVX_A[MAX_IQ + MAX_IQ/24]; /* 273 RB 8 bits IQ + exponent */
+int16_t iDeCompressionOutput_AVX_A[MAX_IQ]; /* 273 RB 16bits IQ */
+int16_t iCompressionInput[MAX_IQ]; /* 273 RB 16bits IQ */
+int16_t iLength = 273*12*2; // total 16bits IQ
+
+// Tests
+/*
+TEST(Compression, Zero) {
+ EXPECT_EQ(0, xran_bfp_comp_avx512_fun_a(iCompressionInput,iCompressionOutput_AVX_A, iLength));
+}
+
+
+
+TEST(Decompression, Zero) {
+ iLength= 24+1;
+ EXPECT_EQ(0, xran_bfp_decomp_avx512_fun_a(iCompressionOutput_AVX_A,iDeCompressionOutput_AVX_A,iLength));
+}*/
+
+
--- /dev/null
+#!/bin/bash
+
+export DIR_ROOT=/home/oran_release
+#set the L1 binary root DIR
+export DIR_ROOT_L1_BIN=$DIR_ROOT/FlexRAN
+#set the phy root DIR
+export DIR_ROOT_PHY=$DIR_ROOT/phy
+#set the FEC SDK root DIR
+export DIR_ROOT_FEC_SDK=$DIR_ROOT/FlexRAN-FEC-SDK-19-04/sdk
+#set the DPDK root DIR
+#export DIR_ROOT_DPDK=$DIR_ROOT/dpdk-18.08
+#set the GTEST root DIR
+#export DIR_ROOT_GTEST=$DIR_ROOT/gtest/gtest-1.7.0
+
+export DIR_WIRELESS_TEST_5G=$DIR_ROOT_L1_BIN/testcase
+export DIR_WIRELESS_SDK=$DIR_ROOT_L1_BIN/sdk/build-avx512-icc
+export DIR_WIRELESS_TABLE_5G=$DIR_ROOT_L1_BIN/l1/bin/nr5g/gnb/l1/table
+#source /opt/intel/system_studio_2019/bin/iccvars.sh intel64 -platform linux
+export XRAN_DIR=$DIR_ROOT_PHY/fhi_lib
+
+export RTE_TARGET=x86_64-native-linuxapp-icc
+#export RTE_SDK=$DIR_ROOT_DPDK
+#export DESTDIR=""
+
+export WIRELESS_SDK_TARGET_ISA=avx512
+export FLEXRAN_SDK=$DIR_ROOT_FEC_SDK/build-avx512-icc/install
+#export GTEST_ROOT=$DIR_ROOT_GTEST
+
+export ORAN_5G_FAPI=true
+export DIR_WIRELESS_WLS=$DIR_ROOT_PHY/wls_lib
+export DEBUG_MODE=true
+export LD_LIBRARY_PATH=$LD_LIBRARY_PATH:$DIR_WIRELESS_WLS
+export DIR_WIRELESS=$DIR_ROOT_L1_BIN/l1
+export DIR_WIRELESS_ORAN_5G_FAPI=$DIR_ROOT_PHY/fapi_5g
+export LD_LIBRARY_PATH=$LD_LIBRARY_PATH:$DIR_ROOT_L1_BIN/libs/cpa_sub6/rec/lib/lib
+
Code Review / o-du / phy.git / commitdiff