X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?p=o-du%2Fphy.git;a=blobdiff_plain;f=fhi_lib%2Flib%2Fapi%2Fxran_fh_o_du.h;fp=fhi_lib%2Flib%2Fapi%2Fxran_fh_o_du.h;h=bacf597693aabbb2baa8b5124e4e308d37634129;hp=7419ae1e1144be79e7aa1f7dc0e664c21417a578;hb=892daba4c616407f16506415d5a69549519ef11d;hpb=76b4495d593ccf45d712db1a3ec96fa9d2d8f5f5 diff --git a/fhi_lib/lib/api/xran_fh_o_du.h b/fhi_lib/lib/api/xran_fh_o_du.h index 7419ae1..bacf597 100644 --- a/fhi_lib/lib/api/xran_fh_o_du.h +++ b/fhi_lib/lib/api/xran_fh_o_du.h @@ -106,9 +106,16 @@ extern "C" { /** Macro to calculate Slot number */ #define XranGetSlotNum(tti, numSlotPerSfn) ((uint32_t)tti % ((uint32_t)numSlotPerSfn)) -#define XRAN_PORTS_NUM (4) /**< number of XRAN ports (aka O-RU|O-DU devices) supported */ +#define XRAN_PORTS_NUM (8) /**< number of XRAN ports (aka O-RU|O-DU devices) supported */ #define XRAN_ETH_PF_LINKS_NUM (4) /**< number of Physical Ethernet links per one O-RU|O-DU */ +#define XRAN_MAX_PRACH_ANT_NUM (4) /**< number of XRAN Prach ports supported */ + +#if defined(XRAN_O_RU_BUILD) + #define XRAN_N_FE_BUF_LEN (20) /**< Number of TTIs (slots) */ +#else #define XRAN_N_FE_BUF_LEN (20) /**< Number of TTIs (slots) */ +#endif + #define XRAN_MAX_SECTOR_NR (16) /**< Max sectors per XRAN port */ #define XRAN_MAX_ANTENNA_NR (16) /**< Max number of extended Antenna-Carriers: a data flow for a single antenna (or spatial stream) for a single carrier in a single sector */ @@ -127,12 +134,14 @@ extern "C" { #define XRAN_MAX_PRBS (275) /**< Max of PRBs per CC per antanna for 5G NR */ #define XRAN_NUM_OF_SC_PER_RB (12) /**< Number of subcarriers per RB */ -#define XRAN_MAX_SECTIONS_PER_SLOT (24) /**< Max number of different sections in single slot (section may be equal to RB allocation for UE) */ +#define XRAN_MAX_DSS_PERIODICITY (15) /**< Max DSS pattern period */ + +#define XRAN_MAX_SECTIONS_PER_SLOT (273) /**< Max number of different sections in single slot (section may be equal to RB allocation for UE) */ #define XRAN_MIN_SECTIONS_PER_SLOT (6) /**< Min number of different sections in single slot (section may be equal to RB allocation for UE) */ #define XRAN_MAX_SECTIONS_PER_SYM (XRAN_MAX_SECTIONS_PER_SLOT) /**< Max number of different sections in single slot (section may be equal to RB allocation for UE) */ #define XRAN_MIN_SECTIONS_PER_SYM (XRAN_MIN_SECTIONS_PER_SLOT) /**< Min number of different sections in single slot (section may be equal to RB allocation for UE) */ -#define XRAN_MAX_FRAGMENT (1) /**< Max number of fragmentations in single symbol */ +#define XRAN_MAX_FRAGMENT (4) /**< Max number of fragmentations in single symbol */ #define XRAN_MAX_SET_BFWS (64) /**< Assumed 64Ant, BFP 9bit with 9K jumbo frame */ #define XRAN_MAX_PKT_BURST (448+4) /**< 4x14x8 symbols per ms */ @@ -162,6 +171,11 @@ extern "C" { #define XRAN_VF_QUEUE_MAX (XRAN_MAX_ANTENNA_NR*2+XRAN_MAX_ANT_ARRAY_ELM_NR) /**< MAX number of HW queues for given VF */ +#define XRAN_HALF_CB_SYM 0 /**< Half of the Slot (offset +7) */ +#define XRAN_THREE_FOURTHS_CB_SYM 3 /**< 2/4 of the Slot (offset +7) */ +#define XRAN_FULL_CB_SYM 7 /**< Full Slot (offset +7) */ +#define XRAN_ONE_FOURTHS_CB_SYM 12 /**< 1/4 of the Slot (offset +7) */ + #ifdef _XRAN_DEBUG #define xran_log_dbg(fmt, ...) \ fprintf(stderr, \ @@ -421,6 +435,7 @@ struct xran_io_cfg { int32_t one_vf_cu_plane; /**< 1 - C-plane and U-plane use one VF */ struct xran_ecpri_del_meas_cmn eowd_cmn[2];/** */ uint8_t puschMaskSlot; /**< specific which slot pusch channel masked> */ uint8_t cp_vlan_tag; /**< C-plane vlan tag */ @@ -681,6 +712,11 @@ struct xran_fh_config { uint16_t max_sections_per_slot; /**< M-Plane settings for section */ uint16_t max_sections_per_symbol; /**< M-Plane settings for section */ + int32_t RunSlotPrbMapBySymbolEnable; /**< enable prb mapping by symbol with multisection*/ + + uint8_t dssEnable; /**< enable DSS (extension-9) */ + uint8_t dssPeriod; /**< DSS pattern period for LTE/NR */ + uint8_t technology[XRAN_MAX_DSS_PERIODICITY]; /**< technology array represents slot is LTE(0)/NR(1) */ }; /** @@ -705,7 +741,10 @@ struct xran_common_counters{ uint64_t rx_pusch_packets[XRAN_MAX_ANTENNA_NR]; uint64_t rx_prach_packets[XRAN_MAX_ANTENNA_NR]; uint64_t rx_srs_packets; + uint64_t rx_invalid_ext1_packets; /**< Counts the invalid extType-1 packets - valid for packets received from O-DU*/ + uint64_t timer_missed_sym; + uint64_t timer_missed_slot; }; /** @@ -732,9 +771,9 @@ struct xran_flat_buffer uint32_t nNumberOfElements; /**< The number of elements in the physical contiguous memory segment */ uint32_t nOffsetInBytes; /**< Offset in bytes to the start of the data in the physical contiguous * memory segment */ - uint32_t nIsPhyAddr; uint8_t *pData; /**< The data pointer is a virtual address */ void *pCtrl; /**< pointer to control section coresponding to data buffer */ + void *pRing; /**< pointer to ring with prepared mbufs */ }; /** @@ -851,6 +890,31 @@ int32_t xran_bm_init (void * pHandle, uint32_t * pPoolIndex, uint32_t nNumberOfB */ int32_t xran_bm_allocate_buffer(void * pHandle, uint32_t nPoolIndex, void **ppData, void **ppCtrl); +/** + * @ingroup xran + * + * Function allocates buffer used between XRAN layer and PHY. In general case it's DPDK mbuf. + * + * @param pHandle + * Pointer to XRAN layer handle for given CC + * @param rng_name_prefix + * prefix of ring name + * @param cc_id + * Component Carrier ID + * @param buff_id + * Buffer id for given ring + * @param ant_id + * Antenna id for given ring + * @param symb_id + * Symbol id for given ring + * @param ppRing + * Pointer to pointer where to store address of internal DDPD ring + * + * @return + * 0 - on success + */ +int32_t xran_bm_allocate_ring(void * pHandle, const char *rng_name_prefix, uint16_t cc_id, uint16_t buff_id, uint16_t ant_id, uint16_t symb_id, void **ppRing); + /** * @ingroup xran * @@ -1082,6 +1146,31 @@ int32_t xran_reg_sym_cb(void *pHandle, xran_callback_sym_fn symCb, void * symCbP */ int32_t xran_reg_physide_cb(void *pHandle, xran_fh_tti_callback_fn Cb, void *cbParam, int skipTtiNum, enum callback_to_phy_id); +/** + * @ingroup xran + * + * Function registers callback to XRAN layer. Function support callbacks align to OTA time. TTI even, half of slot, + * full slot with respect to PTP time. + * + * @param pHandle + * Pointer to XRAN layer handle for given CC + * @param Cb + * pointer to callback function + * @param cbParam + * pointer to Callback Function parameters + * @param skipTtiNum + * number of calls to be skipped before first call + * @param callback_to_phy_id + * call back time identification (see enum callback_to_phy_id) + * @param xran_port_id + * XRAN device ID + * + * @return + * 0 - in case of success + * -1 - in case of failure + */ +int32_t xran_reg_physide_cb_by_dev_id(void *pHandle, xran_fh_tti_callback_fn Cb, void *cbParam, int skipTtiNum, enum callback_to_phy_id, uint8_t xran_port_id); + /** * @ingroup xran * @@ -1221,6 +1310,90 @@ uint8_t *xran_add_cp_hdr_offset(uint8_t *dst); * 0 - on success */ int32_t xran_set_debug_stop(int32_t value, int32_t count); + +/** + * @ingroup xran + * + * function initialize PRB map from config input + * + * @param p_PrbMapIn + * Input PRBmap from config + * @param p_PrbMapOut + * Output PRBmap + * @return + * 0 - on success + */ +int32_t xran_init_PrbMap_from_cfg(struct xran_prb_map* p_PrbMapIn, struct xran_prb_map* p_PrbMapOut, uint32_t mtu); + +/** + * @ingroup xran + * + * function initialize PRB map from config input + * + * @param p_PrbMapIn + * Input PRBmap from config for Rx + * @param p_PrbMapOut + * Output PRBmap + * @return + * 0 - on success + */ + +int32_t xran_init_PrbMap_from_cfg_for_rx(struct xran_prb_map* p_PrbMapIn, struct xran_prb_map* p_PrbMapOut, uint32_t mtu); + +int32_t xran_get_num_prb_elm(struct xran_prb_map* p_PrbMapIn, uint32_t mtu); + +/** + * @ingroup xran + * + * function initialize PRB map from config input by symbol + * + * @param p_PrbMapIn + * Input PRBmap from config + * @param p_PrbMapOut + * Output PRBmap + * @return + * 0 - on success + */ +int32_t xran_init_PrbMap_by_symbol_from_cfg(struct xran_prb_map* p_PrbMapIn, struct xran_prb_map* p_PrbMapOut, uint32_t mtu, uint32_t xran_max_prb); + +/** + * @ingroup xran + * + * Function prepares DL U-plane packets for symbol for O-RAN FH. Enques resulting packet to ring for TX at appropriate time + * + * @param pHandle + * pointer to O-RU port structure + * @return + * 0 - on success + */ +int32_t xran_prepare_up_dl_sym(uint16_t xran_port_id, uint32_t nSlotIdx, uint32_t nCcStart, uint32_t nCcNum, uint32_t nSymMask, uint32_t nAntStart, + uint32_t nAntNum, uint32_t nSymStart, uint32_t nSymNum); +/** + * @ingroup xran + * + * Function prepares DL C-plane packets for slot for O-RAN FH. Enques resulting packet to ring for TX at appropriate time + * + * @param pHandle + * pointer to O-RU port structure + * @return + * 0 - on success + */ +int32_t xran_prepare_cp_dl_slot(uint16_t xran_port_id, uint32_t nSlotIdx, uint32_t nCcStart, uint32_t nCcNum, uint32_t nSymMask, uint32_t nAntStart, + uint32_t nAntNum, uint32_t nSymStart, uint32_t nSymNum); + +/** + * @ingroup xran + * + * Function prepares UL C-plane packets for slot for O-RAN FH. Enques resulting packet to ring for TX at appropriate time + * + * @param pHandle + * pointer to O-RU port structure + * @return + * 0 - on success + */ +int32_t xran_prepare_cp_ul_slot(uint16_t xran_port_id, uint32_t nSlotIdx, uint32_t nCcStart, uint32_t nCcNum, uint32_t nSymMask, uint32_t nAntStart, + uint32_t nAntNum, uint32_t nSymStart, uint32_t nSymNum); + #ifdef __cplusplus } #endif