X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?p=o-du%2Fphy.git;a=blobdiff_plain;f=fapi_5g%2Fsource%2Fapi%2Ffapi2phy%2Fp5%2Fnr5g_fapi_proc_config_req.c;fp=fapi_5g%2Fsource%2Fapi%2Ffapi2phy%2Fp5%2Fnr5g_fapi_proc_config_req.c;h=b21d50b2c6526bafe5ff772da174b146a40bd69b;hp=7b7e68ad2ae6cc7c6f6b2795df63dad9220dbe77;hb=70d9d920dd4e575f085f1f1a9050fefd1c10e127;hpb=331df2273a6667941167c9bcc141a517369bdf43

diff --git a/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_config_req.c b/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_config_req.c
index 7b7e68a..b21d50b 100644
--- a/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_config_req.c
+++ b/fapi_5g/source/api/fapi2phy/p5/nr5g_fapi_proc_config_req.c
@@ -1,5 +1,4 @@
 /******************************************************************************
- << 3)*
 *   Copyright (c) 2019 Intel.
 *
 *   Licensed under the Apache License, Version 2.0 (the "License");
@@ -276,6 +275,8 @@ uint8_t nr5g_fapi_config_req_to_phy_translation(
                 p_ia_config_req->nSSBPrbOffset =
                     GETVLFRM32B(tlvs[i].value, tlvs[i++].tl.length) / (pow(2,
                         p_ia_config_req->nSubcCommon));
+                p_phy_instance->phy_config.nSSBPrbOffset =
+                    p_ia_config_req->nSSBPrbOffset;
                 break;
 
             case FAPI_SSB_PERIOD_TAG: