####################################################################### # # # ####################################################################### # This is simple configuration file. Use '#' sign for comments appMode=1 # lls-CU(0) | RU(1) xranMode=0 # Category A (0) (precoder in lls-CU) | Category B (1) (precoder in RU) ccNum=6 # Number of Componnent Carriers (CC) per ETH port with XRAN protocol (default:1 max: 12) antNum=4 # Number of Antennas per CC (default: 4) ##Numerology mu=0 #15Khz Sub Carrier Spacing ttiPeriod=1000 # in us TTI period (15Khz default 1000us) nDLAbsFrePointA=2645460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 nULAbsFrePointA=2525460 #nAbsFrePointA - Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 nDLBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400 nULBandwidth=20 #Carrier bandwidth for in MHz. Value: 5->400 nDLFftSize=2048 nULFftSize=2048 nFrameDuplexType=0 # 0 - FDD 1 - TDD nTddPeriod=0 #TDD priod e.g. DDDS 4 MTUSize=9600 #maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single #xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) Gps_Alpha=0 #alpha and beta value as in section 9.7.2 of ORAN spec Gps_Beta=0 ioCore=1 llsCUMac=00:11:22:33:44:66 # asigned MAC of lls-CU VF #llsCUMac=3c:fd:fe:a8:e0:70 #lls-CU PF for tcpdump ruMac=00:11:22:33:44:55 #RU VF for RU app numSlots=20 #number of slots per IQ files #fd 10Mhz 2 #antC0=./usecase/mu0_20mhz/12/uliq0.bin #CC0 #antC1=./usecase/mu0_20mhz/12/uliq1.bin #CC0 #antC2=./usecase/mu0_20mhz/12/uliq2.bin #CC0 #antC3=./usecase/mu0_20mhz/12/uliq3.bin #CC0 antC0=./usecase/mu0_20mhz/12/uliq0.bin #CC0 antC1=./usecase/mu0_20mhz/12/uliq1.bin #CC0 antC2=./usecase/mu0_20mhz/12/uliq2.bin #CC0 antC3=./usecase/mu0_20mhz/12/uliq3.bin #CC0 antC4=./usecase/mu0_20mhz/12/uliq0.bin #CC0 antC5=./usecase/mu0_20mhz/12/uliq1.bin #CC0 antC6=./usecase/mu0_20mhz/12/uliq2.bin #CC0 antC7=./usecase/mu0_20mhz/12/uliq3.bin #CC0 antC8=./usecase/mu0_20mhz/12/uliq0.bin #CC0 antC9=./usecase/mu0_20mhz/12/uliq1.bin #CC0 antC10=./usecase/mu0_20mhz/12/uliq2.bin #CC0 antC11=./usecase/mu0_20mhz/12/uliq3.bin #CC0 antC12=./usecase/mu0_20mhz/12/uliq0.bin #CC0 antC13=./usecase/mu0_20mhz/12/uliq1.bin #CC0 antC14=./usecase/mu0_20mhz/12/uliq2.bin #CC0 antC15=./usecase/mu0_20mhz/12/uliq3.bin #CC0 antC16=./usecase/mu0_20mhz/12/uliq0.bin #CC0 antC17=./usecase/mu0_20mhz/12/uliq1.bin #CC0 antC18=./usecase/mu0_20mhz/12/uliq2.bin #CC0 antC19=./usecase/mu0_20mhz/12/uliq3.bin #CC0 antC20=./usecase/mu0_20mhz/12/uliq0.bin #CC0 antC21=./usecase/mu0_20mhz/12/uliq1.bin #CC0 antC22=./usecase/mu0_20mhz/12/uliq2.bin #CC0 antC23=./usecase/mu0_20mhz/12/uliq3.bin #CC0 antC24=./usecase/mu0_20mhz/12/uliq0.bin #CC0 antC25=./usecase/mu0_20mhz/12/uliq1.bin #CC0 antC26=./usecase/mu0_20mhz/12/uliq2.bin #CC0 antC27=./usecase/mu0_20mhz/12/uliq3.bin #CC0 antC28=./usecase/mu0_20mhz/12/uliq0.bin #CC0 antC29=./usecase/mu0_20mhz/12/uliq1.bin #CC0 antC30=./usecase/mu0_20mhz/12/uliq2.bin #CC0 antC31=./usecase/mu0_20mhz/12/uliq3.bin #CC0 antC32=./usecase/mu0_20mhz/12/uliq0.bin #CC0 antC33=./usecase/mu0_20mhz/12/uliq1.bin #CC0 antC34=./usecase/mu0_20mhz/12/uliq2.bin #CC0 antC35=./usecase/mu0_20mhz/12/uliq3.bin #CC0 antC36=./usecase/mu0_20mhz/12/uliq0.bin #CC0 antC37=./usecase/mu0_20mhz/12/uliq1.bin #CC0 antC38=./usecase/mu0_20mhz/12/uliq2.bin #CC0 antC39=./usecase/mu0_20mhz/12/uliq3.bin #CC0 antC40=./usecase/mu0_20mhz/12/uliq0.bin #CC0 antC41=./usecase/mu0_20mhz/12/uliq1.bin #CC0 antC42=./usecase/mu0_20mhz/12/uliq2.bin #CC0 antC43=./usecase/mu0_20mhz/12/uliq3.bin #CC0 antC44=./usecase/mu0_20mhz/12/uliq0.bin #CC0 antC45=./usecase/mu0_20mhz/12/uliq1.bin #CC0 antC46=./usecase/mu0_20mhz/12/uliq2.bin #CC0 antC47=./usecase/mu0_20mhz/12/uliq3.bin #CC0 #antC0=./usecase/mu0_20mhz/12/ant_0.bin #CC0 #antC1=./usecase/mu0_20mhz/12/ant_1.bin #CC0 #antC2=./usecase/mu0_20mhz/12/ant_2.bin #CC0 #antC3=./usecase/mu0_20mhz/12/ant_3.bin #CC0 #antC0=./usecase/mu0_20mhz/12/ant_0.bin #CC0 #antC1=./usecase/mu0_20mhz/12/ant_0.bin #CC0 #antC2=./usecase/mu0_20mhz/12/ant_0.bin #CC0 #antC3=./usecase/mu0_20mhz/12/ant_0.bin #CC0 #antC4=./usecase/mu0_20mhz/12/ant_4.bin #CC1 #antC5=./usecase/mu0_20mhz/12/ant_5.bin #CC1 #antC6=./usecase/mu0_20mhz/12/ant_6.bin #CC1 #antC7=./usecase/mu0_20mhz/12/ant_7.bin #CC1 #antC8=./usecase/mu0_20mhz/12/ant_8.bin #CC2 #antC9=./usecase/mu0_20mhz/12/ant_9.bin #CC2 #antC10=./usecase/mu0_20mhz/12/ant_10.bin #CC2 #antC11=./usecase/mu0_20mhz/12/ant_11.bin #CC2 #antC12=./usecase/mu0_20mhz/12/ant_12.bin #CC3 #antC13=./usecase/mu0_20mhz/12/ant_13.bin #CC3 #antC14=./usecase/mu0_20mhz/12/ant_14.bin #CC3 #antC15=./usecase/mu0_20mhz/12/ant_15.bin #CC3 #antC16=./usecase/mu0_20mhz/12/ant_0.bin #CC4 #antC17=./usecase/mu0_20mhz/12/ant_1.bin #CC4 #antC18=./usecase/mu0_20mhz/12/ant_2.bin #CC4 #antC19=./usecase/mu0_20mhz/12/ant_3.bin #CC4 #antC20=./usecase/mu0_20mhz/12/ant_4.bin #CC5 #antC21=./usecase/mu0_20mhz/12/ant_5.bin #CC5 #antC22=./usecase/mu0_20mhz/12/ant_6.bin #CC5 #antC23=./usecase/mu0_20mhz/12/ant_7.bin #CC5 #antC24=./usecase/mu0_20mhz/12/ant_8.bin #CC6 #antC25=./usecase/mu0_20mhz/12/ant_9.bin #CC6 #antC26=./usecase/mu0_20mhz/12/ant_10.bin #CC6 #antC27=./usecase/mu0_20mhz/12/ant_11.bin #CC6 #antC28=./usecase/mu0_20mhz/12/ant_12.bin #CC7 #antC29=./usecase/mu0_20mhz/12/ant_13.bin #CC7 #antC30=./usecase/mu0_20mhz/12/ant_14.bin #CC7 #antC31=./usecase/mu0_20mhz/12/ant_15.bin #CC7 #antC32=./usecase/mu0_20mhz/12/ant_0.bin #CC8 #antC33=./usecase/mu0_20mhz/12/ant_1.bin #CC8 #antC34=./usecase/mu0_20mhz/12/ant_2.bin #CC8 #antC35=./usecase/mu0_20mhz/12/ant_3.bin #CC8 #antC36=./usecase/mu0_20mhz/12/ant_4.bin #CC9 #antC37=./usecase/mu0_20mhz/12/ant_5.bin #CC9 #antC38=./usecase/mu0_20mhz/12/ant_6.bin #CC9 #antC39=./usecase/mu0_20mhz/12/ant_7.bin #CC9 #antC40=./usecase/mu0_20mhz/12/ant_8.bin #CC10 #antC41=./usecase/mu0_20mhz/12/ant_9.bin #CC10 #antC42=./usecase/mu0_20mhz/12/ant_10.bin #CC10 #antC43=./usecase/mu0_20mhz/12/ant_11.bin #CC10 #antC44=./usecase/mu0_20mhz/12/ant_12.bin #CC11 #antC45=./usecase/mu0_20mhz/12/ant_13.bin #CC11 #antC46=./usecase/mu0_20mhz/12/ant_14.bin #CC11 #antC47=./usecase/mu0_20mhz/12/ant_15.bin #CC11 rachEanble=0 # Enable (1)| disable (0) PRACH configuration prachConfigIndex=189 # PRACH config index as per TS36.211 - Table 5.7.1-2 : PRACH Configuration Index antPrachC0=./usecase/mu0_20mhz/12/ant_0.bin antPrachC1=./usecase/mu0_20mhz/12/ant_1.bin antPrachC2=./usecase/mu0_20mhz/12/ant_2.bin antPrachC3=./usecase/mu0_20mhz/12/ant_3.bin antPrachC4=./usecase/mu0_20mhz/12/ant_4.bin antPrachC5=./usecase/mu0_20mhz/12/ant_5.bin antPrachC6=./usecase/mu0_20mhz/12/ant_6.bin antPrachC7=./usecase/mu0_20mhz/12/ant_7.bin antPrachC8=./usecase/mu0_20mhz/12/ant_8.bin antPrachC9=./usecase/mu0_20mhz/12/ant_9.bin antPrachC10=./usecase/mu0_20mhz/12/ant_10.bin antPrachC11=./usecase/mu0_20mhz/12/ant_11.bin antPrachC12=./usecase/mu0_20mhz/12/ant_12.bin antPrachC13=./usecase/mu0_20mhz/12/ant_13.bin antPrachC14=./usecase/mu0_20mhz/12/ant_14.bin antPrachC15=./usecase/mu0_20mhz/12/ant_15.bin antPrachC16=./usecase/mu0_20mhz/12/ant_0.bin antPrachC17=./usecase/mu0_20mhz/12/ant_1.bin antPrachC18=./usecase/mu0_20mhz/12/ant_2.bin antPrachC19=./usecase/mu0_20mhz/12/ant_3.bin antPrachC20=./usecase/mu0_20mhz/12/ant_4.bin antPrachC21=./usecase/mu0_20mhz/12/ant_5.bin antPrachC22=./usecase/mu0_20mhz/12/ant_6.bin antPrachC23=./usecase/mu0_20mhz/12/ant_7.bin antPrachC24=./usecase/mu0_20mhz/12/ant_8.bin antPrachC25=./usecase/mu0_20mhz/12/ant_9.bin antPrachC26=./usecase/mu0_20mhz/12/ant_10.bin antPrachC27=./usecase/mu0_20mhz/12/ant_11.bin antPrachC28=./usecase/mu0_20mhz/12/ant_12.bin antPrachC29=./usecase/mu0_20mhz/12/ant_13.bin antPrachC30=./usecase/mu0_20mhz/12/ant_14.bin antPrachC31=./usecase/mu0_20mhz/12/ant_15.bin antPrachC32=./usecase/mu0_20mhz/12/ant_0.bin antPrachC33=./usecase/mu0_20mhz/12/ant_1.bin antPrachC34=./usecase/mu0_20mhz/12/ant_2.bin antPrachC35=./usecase/mu0_20mhz/12/ant_3.bin antPrachC36=./usecase/mu0_20mhz/12/ant_4.bin antPrachC37=./usecase/mu0_20mhz/12/ant_5.bin antPrachC38=./usecase/mu0_20mhz/12/ant_6.bin antPrachC39=./usecase/mu0_20mhz/12/ant_7.bin antPrachC40=./usecase/mu0_20mhz/12/ant_8.bin antPrachC41=./usecase/mu0_20mhz/12/ant_9.bin antPrachC42=./usecase/mu0_20mhz/12/ant_10.bin antPrachC43=./usecase/mu0_20mhz/12/ant_11.bin antPrachC44=./usecase/mu0_20mhz/12/ant_12.bin antPrachC45=./usecase/mu0_20mhz/12/ant_13.bin antPrachC46=./usecase/mu0_20mhz/12/ant_14.bin antPrachC47=./usecase/mu0_20mhz/12/ant_15.bin ## control of IQ byte order iqswap=0 #do swap of IQ before send buffer to eth nebyteorderswap=1 #do swap of byte order for each I and Q from CPU byte order to network byte order ##Debug debugStop=0 #stop app on 1pps boundary (gps_second % 30) debugStopCount=0 #if this value is >0 then stop app after x transmission packets, otherwise app will stop at 1pps boundary CPenable=0 #(1) C-Plane is enabled| (0) C-Plane is disabled c_plane_vlan_tag=1 #VLAN Tag used for C-Plane u_plane_vlan_tag=2 #VLAN Tag used for U-Plane ##RU Settings Tadv_cp_dl=25 #in us TODO: update per RU implementation #C-Plane messages must arrive at the RU some amount of time in advance (Tcp_adv_dl) of the corresponding U-Plane messages #Reception Window C-plane DL T2a_min_cp_dl=400 #in us T2a_max_cp_dl=1120 #in us #Reception Window C-plane UL T2a_min_cp_ul=400 #in us T2a_max_cp_ul=1120 #in us #Reception Window U-plane T2a_min_up=200 # in us T2a_max_up=1120 # in us #Transmission Window Ta3_min=160 #in us Ta3_max=256 #in us ########################################################### ##lls-CU Settings #C-plane #Transmission Window Fast C-plane DL T1a_min_cp_dl=560 T1a_max_cp_dl=800 ##Transmission Window Fast C-plane UL T1a_min_cp_ul=480 T1a_max_cp_ul=560 #U-plane ##Transmission Window T1a_min_up=280 T1a_max_up=400 #Reception Window Ta4_min=0 Ta4_max=360 ###########################################################