o-du/phy
Intel O-RAN/X-RAN Generated Doxygen Documentation
sample-app.c
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1 /******************************************************************************
2 *
3 * Copyright (c) 2019 Intel.
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 *******************************************************************************/
18 
19 #define _GNU_SOURCE
20 #include <unistd.h>
21 #include <sys/syscall.h>
22 #include <sched.h>
23 #include <assert.h>
24 #include <err.h>
25 #include <libgen.h>
26 #include <sys/time.h>
27 #include <time.h>
28 #include <unistd.h>
29 #include <stdio.h>
30 #include <fcntl.h>
31 #include <pthread.h>
32 #include <sys/stat.h>
33 #include <unistd.h>
34 
35 
36 #include "common.h"
37 #include "config.h"
38 #include "xran_mlog_lnx.h"
39 
40 #include "xran_fh_o_du.h"
41 #include "xran_compression.h"
42 #include "xran_cp_api.h"
43 #include "xran_sync_api.h"
44 #include "xran_mlog_task_id.h"
45 
46 #define MAX_BBU_POOL_CORE_MASK (4)
47 
48 
49 #define SW_FPGA_TOTAL_BUFFER_LEN 4*1024*1024*1024
50 #define SW_FPGA_SEGMENT_BUFFER_LEN 1*1024*1024*1024
51 #define SW_FPGA_FH_TOTAL_BUFFER_LEN 1*1024*1024*1024
52 #define FPGA_TO_SW_PRACH_RX_BUFFER_LEN (8192)
53 
54 #define NSEC_PER_SEC 1000000000
55 
56 #define MAX_PKT_BURST (448+4) // 4x14x8
57 #define N_MAX_BUFFER_SEGMENT MAX_PKT_BURST
58 
59 #define MAIN_PRIORITY 98
60 #define NUM_OF_SUBFRAME_PER_FRAME (10)
61 
62 enum app_state state;
63 
64 uint64_t tick_per_usec;
65 static volatile uint64_t timer_last_irq_tick = 0;
66 static uint64_t tsc_resolution_hz = 0;
67 
68 RuntimeConfig startupConfiguration = {0};
69 
70 /* buffers size */
71 uint32_t nFpgaToSW_FTH_RxBufferLen;
72 uint32_t nFpgaToSW_PRACH_RxBufferLen;
73 uint32_t nSW_ToFpga_FTH_TxBufferLen;
74 
75 static struct xran_fh_init xranInit;
76 void * xranHandle = NULL;
77 
78 struct xran_fh_config xranConf;
79 struct xran_fh_config *pXranConf = NULL;
80 
81 typedef struct
82 {
83  uint32_t phaseFlag :1;
84  uint32_t NRARFCN :22;
85  uint32_t SULFreShift :1;
86  uint32_t SULFlag :1;
87  uint32_t rsv :7;
88 }FPGAPhaseCompCfg;
89 
90 typedef struct XranLibConfig
91 {
92  uint32_t nDriverCoreId;
93  uint32_t nTimingAdvance;
94  uint32_t nFhConfig;
95  uint32_t nFhBufIntFlag;
96  uint32_t nSectorNum;
97  uint32_t nNrOfSlotInSf;
98  uint32_t nNrofSfInFrame;
99  void * pFthInstanceHandles;
100 }XranLibConfigStruct;
101 typedef enum {
102  XRANFTHTX_OUT = 0,
103  XRANFTHTX_PRB_MAP_OUT,
104  XRANFTHTX_SEC_DESC_OUT,
105  XRANFTHRX_IN,
106  XRANFTHRX_PRB_MAP_IN,
107  XRANFTHTX_SEC_DESC_IN,
108  XRANFTHRACH_IN,
109  XRANSRS_IN,
110  MAX_SW_XRAN_INTERFACE_NUM
111 }SWXRANInterfaceTypeEnum;
112 
113 /*
114  * manage one cell's all Ethernet frames for one DL or UL LTE subframe
115  */
116 typedef struct {
117  /* -1-this subframe is not used in current frame format
118  0-this subframe can be transmitted, i.e., data is ready
119  1-this subframe is waiting transmission, i.e., data is not ready
120  10 - DL transmission missing deadline. When FE needs this subframe data but bValid is still 1,
121  set bValid to 10.
122  */
123  int32_t bValid ; // when UL rx, it is subframe index.
124  int32_t nSegToBeGen;
125  int32_t nSegGenerated; // how many date segment are generated by DL LTE processing or received from FE
126  // -1 means that DL packet to be transmitted is not ready in BS
127  int32_t nSegTransferred; // number of data segments has been transmitted or received
128  struct rte_mbuf *pData[N_MAX_BUFFER_SEGMENT]; // point to DPDK allocated memory pool
129  struct xran_buffer_list sBufferList;
130 } BbuIoBufCtrlStruct;
131 
132 typedef struct {
133  uint64_t nCoreMask;
134  int16_t cpuSocketId;
135  uint8_t nDriverCoreId;
136  uint8_t nFHCoreId;
137 
138  struct rte_mempool *bbuio_buf_pool;
139 
140  /* io struct */
141  BbuIoBufCtrlStruct sFrontHaulTxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
142  BbuIoBufCtrlStruct sFrontHaulTxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
143  BbuIoBufCtrlStruct sFrontHaulRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
144  BbuIoBufCtrlStruct sFrontHaulRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
145  BbuIoBufCtrlStruct sFHPrachRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
146 
147  /* Cat B */
148  BbuIoBufCtrlStruct sFHSrsRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR];
149 
150  /* buffers lists */
151  struct xran_flat_buffer sFrontHaulTxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
152  struct xran_flat_buffer sFrontHaulTxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
153  struct xran_flat_buffer sFrontHaulRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
154  struct xran_flat_buffer sFrontHaulRxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
155  struct xran_flat_buffer sFHPrachRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
156 
157  /* Cat B SRS buffers */
158  struct xran_flat_buffer sFHSrsRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT];
159 
160  void* nInstanceHandle[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR]; // instance per sector
161  uint32_t nBufPoolIndex[XRAN_MAX_SECTOR_NR][MAX_SW_XRAN_INTERFACE_NUM]; // every api owns unique buffer pool
162  uint16_t nInstanceNum;
163 
164  uint64_t nTscTiming[XRAN_N_FE_BUF_LEN]; // records the TSC when a timing packet is received.
165 } BbuXranIoIfStruct;
166 
167 static BbuXranIoIfStruct gsXranIoIf;
168 static XranLibConfigStruct *gpXranLibConfig = NULL;
169 
170 extern long rx_counter;
171 extern long tx_counter;
172 extern long tx_bytes_counter;
173 extern long rx_bytes_counter;
174 extern long tx_bytes_per_sec;
175 extern long rx_bytes_per_sec;
176 long old_rx_counter = 0;
177 long old_tx_counter = 0;
178 
179 
180 
181 #define CPU_HZ tick_per_usec //us
182 
183 /* Application User space functions */
184 void xran_fh_rx_callback(void *pCallbackTag, int32_t status);
185 void xran_fh_rx_prach_callback(void *pCallbackTag, int32_t status);
186 
187 static BbuXranIoIfStruct *xran_get_ctx(void)
188 {
189  return &gsXranIoIf;
190 }
191 
192 static void print_menu()
193 {
194  puts("+---------------------------------------+");
195  puts("| Press 1 to start 5G NR XRAN traffic |");
196  puts("| Press 2 reserved for future use |");
197  puts("| Press 3 to quit |");
198  puts("+---------------------------------------+");
199 }
200 
201 static int32_t get_xran_sfidx(uint8_t nNrOfSlotInSf)
202 {
203  int32_t nSfIdx = -1;
204  uint32_t nFrameIdx;
205  uint32_t nSubframeIdx;
206  uint32_t nSlotIdx;
207  uint64_t nSecond;
208 
209  uint32_t nXranTime = xran_get_slot_idx(&nFrameIdx, &nSubframeIdx, &nSlotIdx, &nSecond);
210  nSfIdx = nFrameIdx*NUM_OF_SUBFRAME_PER_FRAME*nNrOfSlotInSf
211  + nSubframeIdx*nNrOfSlotInSf
212  + nSlotIdx;
213 #if 0
214  printf("\nxranTime is %d, return is %d, radio frame is %d, subframe is %d slot is %d tsc is %llu us",
215  nXranTime,
216  nSfIdx,
217  nFrameIdx,
218  nSubframeIdx,
219  nSlotIdx,
220  __rdtsc()/CPU_HZ);
221 #endif
222 
223  return nSfIdx;
224 }
225 
226 void xran_fh_rx_callback(void *pCallbackTag, xran_status_t status)
227 {
228  uint64_t t1 = MLogTick();
229  uint32_t mlogVar[10];
230  uint32_t mlogVarCnt = 0;
231  uint8_t Numerlogy = xranConf.frame_conf.nNumerology;
232  uint8_t nNrOfSlotInSf = 1<<Numerlogy;
233  int32_t sfIdx = get_xran_sfidx(nNrOfSlotInSf);
234 
235  mlogVar[mlogVarCnt++] = 0xCCCCCCCC;
236  mlogVar[mlogVarCnt++] = status >> 16; /* tti */
237  mlogVar[mlogVarCnt++] = status & 0xFF; /* sym */
238  mlogVar[mlogVarCnt++] = (uint32_t)sfIdx;
239  MLogAddVariables(mlogVarCnt, mlogVar, MLogTick());
240  rte_pause();
241 
242  MLogTask(PID_GNB_SYM_CB, t1, MLogTick());
243  return;
244 }
245 
246 void xran_fh_rx_prach_callback(void *pCallbackTag, xran_status_t status)
247 {
248  uint64_t t1 = MLogTick();
249  uint32_t mlogVar[10];
250  uint32_t mlogVarCnt = 0;
251 
252  mlogVar[mlogVarCnt++] = 0xDDDDDDDD;
253  mlogVar[mlogVarCnt++] = status >> 16; /* tti */
254  mlogVar[mlogVarCnt++] = status & 0xFF; /* sym */
255  MLogAddVariables(mlogVarCnt, mlogVar, MLogTick());
256  rte_pause();
257 
258  MLogTask(PID_GNB_PRACH_CB, t1, MLogTick());
259 }
260 
261 void xran_fh_rx_srs_callback(void *pCallbackTag, xran_status_t status)
262 {
263  uint64_t t1 = MLogTick();
264  uint32_t mlogVar[10];
265  uint32_t mlogVarCnt = 0;
266 
267  mlogVar[mlogVarCnt++] = 0xCCCCCCCC;
268  mlogVar[mlogVarCnt++] = status >> 16; /* tti */
269  mlogVar[mlogVarCnt++] = status & 0xFF; /* sym */
270  MLogAddVariables(mlogVarCnt, mlogVar, MLogTick());
271  rte_pause();
272 
273  MLogTask(PID_GNB_SRS_CB, t1, MLogTick());
274 }
275 
276 
277 //-------------------------------------------------------------------------------------------
288 //-------------------------------------------------------------------------------------------
289 unsigned long timer_get_ticks(void)
290 {
291  unsigned long ret;
292  union
293  {
294  unsigned long tsc_64;
295  struct
296  {
297  uint32_t lo_32;
298  uint32_t hi_32;
299  };
300  } tsc;
301 
302  __asm volatile("rdtsc" :
303  "=a" (tsc.lo_32),
304  "=d" (tsc.hi_32));
305 
306  ret = ((unsigned long)tsc.tsc_64);
307  return ret;
308 }
309 
310 //-------------------------------------------------------------------------------------------
322 //-------------------------------------------------------------------------------------------
323 int timer_set_tsc_freq_from_clock(void)
324 {
325 #define NS_PER_SEC 1E9
326  struct timespec sleeptime = {.tv_nsec = 5E8 }; /* 1/2 second */
327  struct timespec t_start, t_end;
328  uint64_t tsc_resolution_hz = 0;
329 
330  if (clock_gettime(CLOCK_MONOTONIC_RAW, &t_start) == 0)
331  {
332  unsigned long ns, end, start = timer_get_ticks();
333  nanosleep(&sleeptime,NULL);
334  clock_gettime(CLOCK_MONOTONIC_RAW, &t_end);
335  end = timer_get_ticks();
336  ns = ((t_end.tv_sec - t_start.tv_sec) * NS_PER_SEC);
337  ns += (t_end.tv_nsec - t_start.tv_nsec);
338 
339  double secs = (double)ns/NS_PER_SEC;
340  tsc_resolution_hz = (unsigned long)((end - start)/secs);
341 
342  tick_per_usec = (tsc_resolution_hz / 1000000);
343  printf("System clock (rdtsc) resolution %lu [Hz]\n", tsc_resolution_hz);
344  printf("Ticks per us %lu\n", tick_per_usec);
345  return 0;
346  }
347 
348  return -1;
349 }
350 
351 int physide_dl_tti_call_back(void * param)
352 {
353  uint64_t t1 = MLogTick();
354  rte_pause();
355  MLogTask(PID_GNB_PROC_TIMING, t1, MLogTick());
356  return 0;
357 }
358 
359 int physide_ul_half_slot_call_back(void * param)
360 {
361  uint64_t t1 = MLogTick();
362  rte_pause();
363  MLogTask(PID_GNB_PROC_TIMING, t1, MLogTick());
364  return 0;
365 }
366 
367 int physide_ul_full_slot_call_back(void * param)
368 {
369  uint64_t t1 = MLogTick();
370  rte_pause();
371  MLogTask(PID_GNB_PROC_TIMING, t1, MLogTick());
372  return 0;
373 }
374 
375 int32_t init_xran(void)
376 {
377  BbuXranIoIfStruct *psBbuIo = xran_get_ctx();
378  xran_status_t status;
379  int32_t nSectorIndex[XRAN_MAX_SECTOR_NR];
380  int32_t nSectorNum;
381  int32_t i, j, k, z;
382 
383  void *ptr;
384  void *mb;
385  uint32_t *u32dptr;
386  uint16_t *u16dptr;
387  uint8_t *u8dptr;
388 
389  SWXRANInterfaceTypeEnum eInterfaceType;
390 
391  XranLibConfigStruct *ptrLibConfig;
392 
393  struct xran_buffer_list *pFthTxBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
394  struct xran_buffer_list *pFthTxPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
395  struct xran_buffer_list *pFthRxBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
396  struct xran_buffer_list *pFthRxPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
397  struct xran_buffer_list *pFthRxRachBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];
398  struct xran_buffer_list *pFthRxSrsBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_N_FE_BUF_LEN];
399 
400  for (nSectorNum = 0; nSectorNum < XRAN_MAX_SECTOR_NR; nSectorNum++)
401  {
402  nSectorIndex[nSectorNum] = nSectorNum;
403  }
404 
405  nSectorNum = numCCPorts;
406  printf ("XRAN front haul xran_mm_init \n");
407  status = xran_mm_init (xranHandle, (uint64_t) SW_FPGA_FH_TOTAL_BUFFER_LEN, SW_FPGA_SEGMENT_BUFFER_LEN);
408  if (status != XRAN_STATUS_SUCCESS)
409  {
410  printf ("Failed at XRAN front haul xran_mm_init \n");
411  exit(-1);
412  }
413 
414  psBbuIo->nInstanceNum = numCCPorts;
415 
416  for (k = 0; k < XRAN_PORTS_NUM; k++) {
417  status = xran_sector_get_instances (xranHandle, psBbuIo->nInstanceNum,&psBbuIo->nInstanceHandle[k][0]);
418  if (status != XRAN_STATUS_SUCCESS)
419  {
420  printf ("get sector instance failed %d for XRAN nInstanceNum %d\n",k, psBbuIo->nInstanceNum);
421  exit(-1);
422  }
423  for (i = 0; i < psBbuIo->nInstanceNum; i++){
424  printf("%s [%d]: CC %d handle %p\n", __FUNCTION__, k, i, psBbuIo->nInstanceHandle[0][i]);
425  }
426  }
427 
428  printf("Sucess xran_mm_init \n");
429  gpXranLibConfig = (XranLibConfigStruct*)malloc(sizeof(XranLibConfigStruct));
430  ptrLibConfig = gpXranLibConfig;
431  if (ptrLibConfig)
432  {
433  #if 0
434  ptrLibConfig->nDriverCoreId = psBbuIo->nDriverCoreId;
435  ptrLibConfig->pFecInstanceHandles = &(psBbuIo->nInstanceHandle[FPGA_FEC][0]);
436  ptrLibConfig->pFthInstanceHandles = &(psBbuIo->nInstanceHandle[FPGA_FRONTHAUL][0]);
437  ptrLibConfig->nTimingAdvance = psFPGAInitPara->nTimeAdvance;
438  ptrLibConfig->nFhConfig = psFPGAInitPara->nEthPorts;
439  ptrLibConfig->nFhBufIntFlag = 0; //need init fronthaul buffer, then set to 1.
440  ptrLibConfig->nNrofSfInFrame = NUM_OF_SUBFRAME_PER_FRAME;
441  ptrLibConfig->nNrOfSlotInSf = pConfigParams->nNumOfSlotPerSubframe;
442  if (pConfigParams->nNumerology < 3)
443  {
444  ptrLibConfig->nSectorNum = psFPGAInitPara->nSecNum;
445  }
446  #endif
447  }
448  else
449  {
450  printf ("could not allocate ptrLibConfig in init_xran\n");
451  exit(-1);
452  }
453 
454  printf("nSectorNum %d\n", nSectorNum);
455 
456  /* Init Memory */
457  for(i = 0; i<nSectorNum; i++)
458  {
459  eInterfaceType = XRANFTHTX_OUT;
460  printf("nSectorIndex[%d] = %d\n",i, nSectorIndex[i]);
461  status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],
462  XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT, nSW_ToFpga_FTH_TxBufferLen);
463  if(XRAN_STATUS_SUCCESS != status) {
464  rte_panic("Failed at xran_bm_init , status %d\n", status);
465  }
466  for(j = 0; j < XRAN_N_FE_BUF_LEN; j++)
467  {
468  for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){
469  psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].bValid = 0;
470  psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
471  psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
472  psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
473  psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;
474  psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFrontHaulTxBuffers[j][i][z][0];
475 
476  for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++)
477  {
478  psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = nSW_ToFpga_FTH_TxBufferLen; // 14 symbols 3200bytes/symbol
479  psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;
480  psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;
481  status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i], psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);
482  if(XRAN_STATUS_SUCCESS != status){
483  rte_panic("Failed at xran_bm_allocate_buffer , status %d\n",status);
484  }
485  psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;
486  psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *)mb;
487 
488  if(ptr){
489  u32dptr = (uint32_t*)(ptr);
490  uint8_t *ptr_temp = (uint8_t *)ptr;
491  memset(u32dptr, 0x0, nSW_ToFpga_FTH_TxBufferLen);
492  // ptr_temp[0] = j; // TTI
493  // ptr_temp[1] = i; // Sec
494  // ptr_temp[2] = z; // Ant
495  // ptr_temp[3] = k; // sym
496  }
497  }
498  }
499  }
500 
501  /* C-plane DL */
502  eInterfaceType = XRANFTHTX_SEC_DESC_OUT;
503  status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],
504  XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT*XRAN_MAX_SECTIONS_PER_SYM, sizeof(struct xran_section_desc));
505  if(XRAN_STATUS_SUCCESS != status) {
506  rte_panic("Failed at xran_bm_init , status %d\n", status);
507  }
508 
509  eInterfaceType = XRANFTHTX_PRB_MAP_OUT;
510  status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],
511  XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT, sizeof(struct xran_prb_map));
512  if(XRAN_STATUS_SUCCESS != status) {
513  rte_panic("Failed at xran_bm_init , status %d\n", status);
514  }
515 
516  for(j = 0; j < XRAN_N_FE_BUF_LEN; j++)
517  {
518  for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){
519  psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].bValid = 0;
520  psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
521  psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
522  psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
523  psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;
524  psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFrontHaulTxPrbMapBuffers[j][i][z];
525 
526  {
527  psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nElementLenInBytes = sizeof(struct xran_prb_map);
528  psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nNumberOfElements = 1;
529  psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nOffsetInBytes = 0;
530  status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i], psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);
531  if(XRAN_STATUS_SUCCESS != status) {
532  rte_panic("Failed at xran_bm_allocate_buffer , status %d\n",status);
533  }
534  psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pData = (uint8_t *)ptr;
535  psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pCtrl = (void *)mb;
536 
537  if(ptr){
538  void *sd_ptr;
539  void *sd_mb;
540  int elm_id;
541  struct xran_prb_map * p_rb_map = (struct xran_prb_map *)ptr;
542  if (startupConfiguration.appMode == APP_O_DU)
543  memcpy(ptr, &startupConfiguration.PrbMapDl, sizeof(struct xran_prb_map));
544  else
545  memcpy(ptr, &startupConfiguration.PrbMapUl, sizeof(struct xran_prb_map));
546 
547  for (elm_id = 0; elm_id < p_rb_map->nPrbElm; elm_id++){
548  struct xran_prb_elm *pPrbElem = &p_rb_map->prbMap[elm_id];
549  for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++){
550  status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i], psBbuIo->nBufPoolIndex[nSectorIndex[i]][XRANFTHTX_SEC_DESC_OUT],&sd_ptr, &sd_mb);
551  if(XRAN_STATUS_SUCCESS != status){
552  rte_panic("SD Failed at xran_bm_allocate_buffer , status %d\n",status);
553  }
554  pPrbElem->p_sec_desc[k] = sd_ptr;
555  }
556  }
557  }
558  }
559  }
560  }
561  }
562 
563  for(i = 0; i<nSectorNum; i++)
564  {
565  eInterfaceType = XRANFTHRX_IN;
566  status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType], XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT, nSW_ToFpga_FTH_TxBufferLen);
567  if(XRAN_STATUS_SUCCESS != status)
568  {
569  printf("Failed at xran_bm_init, status %d\n", status);
570  iAssert(status == XRAN_STATUS_SUCCESS);
571  }
572 
573  for(j = 0;j < XRAN_N_FE_BUF_LEN; j++)
574  {
575  for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){
576  psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].bValid = 0;
577  psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
578  psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
579  psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
580  psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;
581  psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFrontHaulRxBuffers[j][i][z][0];
582  for(k = 0; k< XRAN_NUM_OF_SYMBOL_PER_SLOT; k++)
583  {
584  psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = nFpgaToSW_FTH_RxBufferLen; // 1 symbols 3200bytes
585  psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;
586  psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;
587  status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i],psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);
588  if(XRAN_STATUS_SUCCESS != status) {
589  rte_panic("Failed at xran_bm_allocate_buffer , status %d\n",status);
590  }
591  psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;
592  psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *) mb;
593  if(ptr){
594  u32dptr = (uint32_t*)(ptr);
595  uint8_t *ptr_temp = (uint8_t *)ptr;
596  memset(u32dptr, 0x0, nFpgaToSW_FTH_RxBufferLen);
597  // ptr_temp[0] = j; // TTI
598  // ptr_temp[1] = i; // Sec
599  // ptr_temp[2] = z; // Ant
600  // ptr_temp[3] = k; // sym
601  }
602  }
603  }
604  }
605 
606  /* C-plane */
607  eInterfaceType = XRANFTHTX_SEC_DESC_IN;
608  status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],
609  XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT*XRAN_MAX_SECTIONS_PER_SYM, sizeof(struct xran_section_desc));
610  if(XRAN_STATUS_SUCCESS != status) {
611  rte_panic("Failed at xran_bm_init , status %d\n", status);
612  }
613  eInterfaceType = XRANFTHRX_PRB_MAP_IN;
614  status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],
615  XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT, sizeof(struct xran_prb_map));
616  if(XRAN_STATUS_SUCCESS != status) {
617  rte_panic("Failed at xran_bm_init, status %d\n", status);
618  }
619 
620  for(j = 0;j < XRAN_N_FE_BUF_LEN; j++) {
621  for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){
622  psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].bValid = 0;
623  psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
624  psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
625  psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
626  psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;
627  psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFrontHaulRxPrbMapBuffers[j][i][z];
628  {
629  psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nElementLenInBytes = sizeof(struct xran_prb_map);
630  psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nNumberOfElements = 1;
631  psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nOffsetInBytes = 0;
632  status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i],psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);
633  if(XRAN_STATUS_SUCCESS != status) {
634  rte_panic("Failed at xran_bm_allocate_buffer , status %d\n",status);
635  }
636  psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pData = (uint8_t *)ptr;
637  psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pCtrl = (void *)mb;
638  if(ptr){
639  void *sd_ptr;
640  void *sd_mb;
641  int elm_id;
642  struct xran_prb_map * p_rb_map = (struct xran_prb_map *)ptr;
643 
644  if (startupConfiguration.appMode == APP_O_DU)
645  memcpy(ptr, &startupConfiguration.PrbMapUl, sizeof(struct xran_prb_map));
646  else
647  memcpy(ptr, &startupConfiguration.PrbMapDl, sizeof(struct xran_prb_map));
648 
649  for (elm_id = 0; elm_id < p_rb_map->nPrbElm; elm_id++){
650  struct xran_prb_elm *pPrbElem = &p_rb_map->prbMap[elm_id];
651  for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++){
652  status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i], psBbuIo->nBufPoolIndex[nSectorIndex[i]][XRANFTHTX_SEC_DESC_IN],&sd_ptr, &sd_mb);
653  if(XRAN_STATUS_SUCCESS != status){
654  rte_panic("SD Failed at xran_bm_allocate_buffer , status %d\n",status);
655  }
656  pPrbElem->p_sec_desc[k] = sd_ptr;
657  }
658  }
659  }
660  }
661  }
662  }
663  }
664 
665 
666  // add prach rx buffer
667  for(i = 0; i<nSectorNum; i++)
668  {
669  eInterfaceType = XRANFTHRACH_IN;
670  status = xran_bm_init(psBbuIo->nInstanceHandle[0][i],&psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT, FPGA_TO_SW_PRACH_RX_BUFFER_LEN);
671  if(XRAN_STATUS_SUCCESS != status) {
672  rte_panic("Failed at xran_bm_init, status %d\n", status);
673  }
674  for(j = 0;j < XRAN_N_FE_BUF_LEN; j++)
675  {
676  for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){
677  psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].bValid = 0;
678  psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
679  psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
680  psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
681  psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_MAX_ANTENNA_NR; // ant number.
682  psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFHPrachRxBuffers[j][i][z][0];
683  for(k = 0; k< XRAN_NUM_OF_SYMBOL_PER_SLOT; k++)
684  {
685  psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = FPGA_TO_SW_PRACH_RX_BUFFER_LEN;
686  psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;
687  psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;
688  status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i],psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);
689  if(XRAN_STATUS_SUCCESS != status) {
690  rte_panic("Failed at xran_bm_allocate_buffer, status %d\n",status);
691  }
692  psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;
693  psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *)mb;
694  if(ptr){
695  u32dptr = (uint32_t*)(ptr);
696  memset(u32dptr, 0x0, FPGA_TO_SW_PRACH_RX_BUFFER_LEN);
697  }
698  }
699  }
700  }
701  }
702 
703  /* add SRS rx buffer */
704  for(i = 0; i<nSectorNum; i++)
705  {
706  eInterfaceType = XRANSRS_IN;
707  status = xran_bm_init(psBbuIo->nInstanceHandle[0][i],&psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],
708  XRAN_N_FE_BUF_LEN*XRAN_MAX_ANT_ARRAY_ELM_NR*XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT, nSW_ToFpga_FTH_TxBufferLen);
709 
710  if(XRAN_STATUS_SUCCESS != status) {
711  rte_panic("Failed at xran_bm_init, status %d\n", status);
712  }
713  for(j = 0; j < XRAN_N_FE_BUF_LEN; j++)
714  {
715  for(z = 0; z < XRAN_MAX_ANT_ARRAY_ELM_NR; z++){
716  psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].bValid = 0;
717  psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;
718  psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;
719  psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;
720  psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_MAX_ANT_ARRAY_ELM_NR; /* ant number */
721  psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFHSrsRxBuffers[j][i][z][0];
722  for(k = 0; k < XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT; k++)
723  {
724  psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = nSW_ToFpga_FTH_TxBufferLen;
725  psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;
726  psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;
727  status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i],psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);
728  if(XRAN_STATUS_SUCCESS != status) {
729  rte_panic("Failed at xran_bm_allocate_buffer, status %d\n",status);
730  }
731  psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;
732  psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *)mb;
733  if(ptr){
734  u32dptr = (uint32_t*)(ptr);
735  memset(u32dptr, 0x0, nSW_ToFpga_FTH_TxBufferLen);
736  }
737  }
738  }
739  }
740  }
741 
742 
743  for(i=0; i<nSectorNum; i++)
744  {
745  for(j=0; j<XRAN_N_FE_BUF_LEN; j++)
746  {
747  for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){
748  pFthTxBuffer[i][z][j] = &(psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList);
749  pFthTxPrbMapBuffer[i][z][j] = &(psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList);
750  pFthRxBuffer[i][z][j] = &(psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList);
751  pFthRxPrbMapBuffer[i][z][j] = &(psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList);
752  pFthRxRachBuffer[i][z][j] = &(psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList);
753  }
754 
755  for(z = 0; z < XRAN_MAX_ANT_ARRAY_ELM_NR; z++){
756  pFthRxSrsBuffer[i][z][j] = &(psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList);
757  }
758  }
759  }
760 
761  if(NULL != psBbuIo->nInstanceHandle[0])
762  {
763  /* add pusch callback */
764  for (i = 0; i<nSectorNum; i++)
765  {
766  xran_5g_fronthault_config (psBbuIo->nInstanceHandle[0][i],
767  pFthTxBuffer[i],
768  pFthTxPrbMapBuffer[i],
769  pFthRxBuffer[i],
770  pFthRxPrbMapBuffer[i],
771  xran_fh_rx_callback, &pFthRxBuffer[i][0]);
772  }
773 
774  /* add prach callback here */
775  for (i = 0; i<nSectorNum; i++)
776  {
777  xran_5g_prach_req(psBbuIo->nInstanceHandle[0][i], pFthRxRachBuffer[i],
778  xran_fh_rx_prach_callback,&pFthRxRachBuffer[i][0]);
779  }
780 
781  /* add SRS callback here */
782  for (i = 0; i<nSectorNum; i++) {
783  xran_5g_srs_req(psBbuIo->nInstanceHandle[0][i], pFthRxSrsBuffer[i],
784  xran_fh_rx_srs_callback,&pFthRxSrsBuffer[i][0]);
785  }
786 
787  ptrLibConfig->nFhBufIntFlag = 1;
788  }
789 
790  return status;
791 }
792 
793 int init_xran_iq_content(void)
794 {
795  BbuXranIoIfStruct *psBbuIo = xran_get_ctx();
796  xran_status_t status;
797  int32_t nSectorIndex[XRAN_MAX_SECTOR_NR];
798  int32_t nSectorNum;
799  int32_t cc_id, ant_id, sym_id, tti;
800  int32_t flowId;
801 
802  uint8_t frame_id = 0;
803  uint8_t subframe_id = 0;
804  uint8_t slot_id = 0;
805  uint8_t sym = 0;
806 
807  void *ptr;
808  uint32_t *u32dptr;
809  uint16_t *u16dptr;
810  uint8_t *u8dptr;
811 
812  char *pos = NULL;
813  struct xran_prb_map *pRbMap = NULL;
814 
815  for (nSectorNum = 0; nSectorNum < XRAN_MAX_SECTOR_NR; nSectorNum++)
816  {
817  nSectorIndex[nSectorNum] = nSectorNum;
818  }
819  nSectorNum = numCCPorts;
820  printf ("init_xran_iq_content\n");
821 
822  /* Init Memory */
823  for(cc_id = 0; cc_id <nSectorNum; cc_id++)
824  {
825  for(tti = 0; tti < XRAN_N_FE_BUF_LEN; tti ++) {
826  for(ant_id = 0; ant_id < XRAN_MAX_ANTENNA_NR; ant_id++){
827  for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) {
828 
829  flowId = XRAN_MAX_ANTENNA_NR*cc_id + ant_id;
830  if(p_tx_play_buffer[flowId]){
831  /* c-plane DL */
832  pRbMap = (struct xran_prb_map *) psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData;
833  if(pRbMap){
834  if (xranInit.DynamicSectionEna == 0){
835  pRbMap->dir = XRAN_DIR_DL;
836  pRbMap->xran_port = 0;
837  pRbMap->band_id = 0;
838  pRbMap->cc_id = cc_id;
839  pRbMap->ru_port_id = ant_id;
840  pRbMap->tti_id = tti;
841  pRbMap->start_sym_id = 0;
842  pRbMap->nPrbElm = 1;
843  pRbMap->prbMap[0].nStartSymb = 0;
844  pRbMap->prbMap[0].numSymb = 14;
845  pRbMap->prbMap[0].nRBStart = 0;
846  pRbMap->prbMap[0].nRBSize = pXranConf->nDLRBs;
847  pRbMap->prbMap[0].nBeamIndex = 0;
848  pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE;
849  pRbMap->prbMap[0].iqWidth = 16;
850  } else if(pXranConf->ru_conf.xranCat == XRAN_CATEGORY_B
851  && startupConfiguration.appMode == APP_O_DU
852  && sym_id == 0){ /* BF Ws are per slot */
853  int idxElm = 0;
854  char* dl_bfw_pos = ((char*)p_tx_dl_bfw_buffer[flowId]) + tx_dl_bfw_buffer_position[flowId];
855  struct xran_prb_elm* p_pRbMapElm = NULL;
856  for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++){
857  p_pRbMapElm = &pRbMap->prbMap[idxElm];
858  p_pRbMapElm->bf_weight.nAntElmTRx = pXranConf->nAntElmTRx;
859  if(p_pRbMapElm->BeamFormingType == XRAN_BEAM_WEIGHT && p_pRbMapElm->bf_weight_update){
860  int16_t ext_len = 9600;
861  int16_t ext_sec_total = 0;
862  int8_t * ext_buf =(int8_t*) xran_malloc(ext_len);
863  int idRb = 0;
864  int16_t *ptr = NULL;
865  int i;
866  if (ext_buf){
867  ext_buf += (RTE_PKTMBUF_HEADROOM +
868  sizeof (struct xran_ecpri_hdr) +
869  sizeof(struct xran_cp_radioapp_section1));
870 
871  ext_len -= (RTE_PKTMBUF_HEADROOM +
872  sizeof (struct xran_ecpri_hdr) +
873  sizeof(struct xran_cp_radioapp_section1));
874  ext_sec_total = xran_cp_populate_section_ext_1((int8_t *)ext_buf,
875  ext_len,
876  (int16_t *) (dl_bfw_pos + (p_pRbMapElm->nRBStart*pXranConf->nAntElmTRx)*4),
877  p_pRbMapElm->nRBSize,
878  pXranConf->nAntElmTRx,
879  p_pRbMapElm->iqWidth, p_pRbMapElm->compMethod);
880  if(ext_sec_total > 0){
881  p_pRbMapElm->bf_weight.p_ext_section = ext_buf;
882  p_pRbMapElm->bf_weight.ext_section_sz = ext_sec_total;
883  }else {
884  rte_panic("xran_cp_populate_section_ext_1 return error [%d]\n", ext_sec_total);
885  }
886  } else {
887  rte_panic("xran_malloc return NULL\n");
888  }
889  }
890  }
891  }
892  } else {
893  printf("DL pRbMap ==NULL\n");
894  exit(-1);
895  }
896 
897  pos = ((char*)p_tx_play_buffer[flowId]) + tx_play_buffer_position[flowId];
898  ptr = psBbuIo->sFrontHaulTxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;
899 
900  if(ptr && pos){
901  int idxElm = 0;
902  u8dptr = (uint8_t*)ptr;
903  int16_t payload_len = 0;
904 
905  uint8_t *dst = (uint8_t *)u8dptr;
906  uint8_t *src = (uint8_t *)pos;
907  struct xran_prb_elm* p_prbMapElm = &pRbMap->prbMap[idxElm];
908  dst = xran_add_hdr_offset(dst, p_prbMapElm->compMethod);
909  for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++) {
910  struct xran_section_desc *p_sec_desc = NULL;
911  p_prbMapElm = &pRbMap->prbMap[idxElm];
912  p_sec_desc = p_prbMapElm->p_sec_desc[sym_id];
913 
914  if(p_sec_desc == NULL){
915  printf ("p_sec_desc == NULL\n");
916  exit(-1);
917  }
918  src = (uint8_t *)(pos + p_prbMapElm->nRBStart*N_SC_PER_PRB*4L);
919 
920  if(p_prbMapElm->compMethod == XRAN_COMPMETHOD_NONE) {
921  payload_len = p_prbMapElm->nRBSize*N_SC_PER_PRB*4L;
922  rte_memcpy(dst, src, payload_len);
923 
924  } else if (p_prbMapElm->compMethod == XRAN_COMPMETHOD_BLKFLOAT) {
925  struct xranlib_compress_request bfp_com_req;
926  struct xranlib_compress_response bfp_com_rsp;
927 
928  memset(&bfp_com_req, 0, sizeof(struct xranlib_compress_request));
929  memset(&bfp_com_rsp, 0, sizeof(struct xranlib_compress_response));
930 
931  bfp_com_req.data_in = (int16_t*)src;
932  bfp_com_req.numRBs = p_prbMapElm->nRBSize;
933  bfp_com_req.len = p_prbMapElm->nRBSize*N_SC_PER_PRB*4L;
934  bfp_com_req.compMethod = p_prbMapElm->compMethod;
935  bfp_com_req.iqWidth = p_prbMapElm->iqWidth;
936 
937  bfp_com_rsp.data_out = (int8_t*)dst;
938  bfp_com_rsp.len = 0;
939 
940  if(xranlib_compress_avx512(&bfp_com_req, &bfp_com_rsp) < 0){
941  printf ("compression failed [%d]\n",
942  p_prbMapElm->compMethod);
943  exit(-1);
944  } else {
945  payload_len = bfp_com_rsp.len;
946  }
947  }else {
948  printf ("p_prbMapElm->compMethod == %d is not supported\n",
949  p_prbMapElm->compMethod);
950  exit(-1);
951  }
952 
953  /* update RB map for given element */
954  p_sec_desc->iq_buffer_offset = RTE_PTR_DIFF(dst, u8dptr);
955  p_sec_desc->iq_buffer_len = payload_len;
956 
957  /* add headroom for ORAN headers between IQs for chunk of RBs*/
958  dst += payload_len;
959  dst = xran_add_hdr_offset(dst, p_prbMapElm->compMethod);
960  }
961  } else {
962  exit(-1);
963  printf("ptr ==NULL\n");
964  }
965 
966 
967  /* c-plane UL */
968  pRbMap = (struct xran_prb_map *) psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData;
969  if(pRbMap){
970  if (xranInit.DynamicSectionEna == 0){
971  pRbMap->dir = XRAN_DIR_UL;
972  pRbMap->xran_port = 0;
973  pRbMap->band_id = 0;
974  pRbMap->cc_id = cc_id;
975  pRbMap->ru_port_id = ant_id;
976  pRbMap->tti_id = tti;
977  pRbMap->start_sym_id = 0;
978  pRbMap->nPrbElm = 1;
979  pRbMap->prbMap[0].nRBStart = 0;
980  pRbMap->prbMap[0].nRBSize = pXranConf->nULRBs;
981  pRbMap->prbMap[0].nStartSymb = 0;
982  pRbMap->prbMap[0].numSymb = 14;
983  pRbMap->prbMap[0].p_sec_desc[sym_id]->iq_buffer_offset = 0;
984  pRbMap->prbMap[0].p_sec_desc[sym_id]->iq_buffer_len = pXranConf->nULRBs *4L;
985  pRbMap->prbMap[0].nBeamIndex = 0;
986  pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE;
987  } else if(pXranConf->ru_conf.xranCat == XRAN_CATEGORY_B
988  && startupConfiguration.appMode == APP_O_DU
989  && sym_id == 0){
990  int idxElm = 0;
991  char * ul_bfw_pos = ((char*)p_tx_ul_bfw_buffer[flowId]) + tx_ul_bfw_buffer_position[flowId];
992  struct xran_prb_elm* p_pRbMapElm = NULL;
993 
994  for (idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++){
995  p_pRbMapElm = &pRbMap->prbMap[idxElm];
996  p_pRbMapElm->bf_weight.nAntElmTRx = pXranConf->nAntElmTRx;
997  if(p_pRbMapElm->BeamFormingType == XRAN_BEAM_WEIGHT && p_pRbMapElm->bf_weight_update){
998  int16_t ext_len = 9600;
999  int16_t ext_sec_total = 0;
1000  int8_t * ext_buf =(int8_t*) xran_malloc(ext_len);
1001  int idRb = 0;
1002  int16_t *ptr = NULL;
1003  int i;
1004  if (ext_buf){
1005  ext_buf += (RTE_PKTMBUF_HEADROOM +
1006  sizeof (struct xran_ecpri_hdr) +
1007  sizeof(struct xran_cp_radioapp_section1));
1008 
1009  ext_len -= (RTE_PKTMBUF_HEADROOM +
1010  sizeof (struct xran_ecpri_hdr) +
1011  sizeof(struct xran_cp_radioapp_section1));
1012  ptr = (int16_t*)(ul_bfw_pos +(p_pRbMapElm->nRBStart*pXranConf->nAntElmTRx)*4);
1013  ext_sec_total = xran_cp_populate_section_ext_1((int8_t *)ext_buf,
1014  ext_len,
1015  (int16_t *) (ul_bfw_pos + (p_pRbMapElm->nRBStart*pXranConf->nAntElmTRx)*4),
1016  p_pRbMapElm->nRBSize,
1017  pXranConf->nAntElmTRx,
1018  p_pRbMapElm->iqWidth, p_pRbMapElm->compMethod);
1019  if(ext_sec_total > 0){
1020  p_pRbMapElm->bf_weight.p_ext_section = ext_buf;
1021  p_pRbMapElm->bf_weight.ext_section_sz = ext_sec_total;
1022  }else {
1023  rte_panic("xran_cp_populate_section_ext_1 return error [%d]\n", ext_sec_total);
1024  }
1025  } else {
1026  rte_panic("xran_malloc return NULL\n");
1027  }
1028  }
1029  }
1030  }
1031  } else {
1032  printf("DL pRbMap ==NULL\n");
1033  exit(-1);
1034  }
1035 
1036  tx_play_buffer_position[flowId] += pXranConf->nDLRBs*N_SC_PER_PRB*4;
1037 
1038  if(tx_play_buffer_position[flowId] >= tx_play_buffer_size[flowId])
1039  tx_play_buffer_position[flowId] = 0;
1040 
1041  if(pXranConf->ru_conf.xranCat == XRAN_CATEGORY_B
1042  && startupConfiguration.appMode == APP_O_DU
1043  && sym_id == 0) {
1044  tx_dl_bfw_buffer_position[flowId] += (pXranConf->nDLRBs*pXranConf->nAntElmTRx)*4;
1045  if(tx_dl_bfw_buffer_position[flowId] >= tx_dl_bfw_buffer_size[flowId])
1046  tx_dl_bfw_buffer_position[flowId] = 0;
1047 
1048  tx_ul_bfw_buffer_position[flowId] += (pXranConf->nULRBs*pXranConf->nAntElmTRx)*4;
1049  if(tx_ul_bfw_buffer_position[flowId] >= tx_ul_bfw_buffer_size[flowId])
1050  tx_ul_bfw_buffer_position[flowId] = 0;
1051  }
1052  } else {
1053  //printf("flowId %d\n", flowId);
1054  }
1055  }
1056  }
1057 
1058  /* prach TX for RU only */
1059  if(startupConfiguration.appMode == APP_O_RU && startupConfiguration.enablePrach){
1060  for(ant_id = 0; ant_id < XRAN_MAX_ANTENNA_NR; ant_id++){
1061  for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) {
1062  flowId = XRAN_MAX_ANTENNA_NR*cc_id + ant_id;
1063 
1064  if(p_tx_prach_play_buffer[flowId]){
1065  pos = ((char*)p_tx_prach_play_buffer[flowId]);
1066 
1067  ptr = psBbuIo->sFHPrachRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;
1068 
1069  if(ptr && pos){
1070  u32dptr = (uint32_t*)(ptr);
1071  /* duplicate full PRACH (repetition * occassions ) in every symbol */
1072  memset(u32dptr,0 , PRACH_PLAYBACK_BUFFER_BYTES);
1073  rte_memcpy(u32dptr, pos, RTE_MIN(PRACH_PLAYBACK_BUFFER_BYTES, tx_prach_play_buffer_size[flowId]));
1074  } else {
1075  exit(-1);
1076  printf("ptr ==NULL\n");
1077  }
1078  } else {
1079  //printf("flowId %d\n", flowId);
1080  }
1081  }
1082  }
1083  }
1084 
1085  /* SRS TX for RU only */
1086  if(startupConfiguration.appMode == APP_O_RU && startupConfiguration.enableSrs){
1087  for(ant_id = 0; ant_id < XRAN_MAX_ANT_ARRAY_ELM_NR; ant_id++){
1088  for(sym_id = 0; sym_id < XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT; sym_id++) {
1089  flowId = XRAN_MAX_ANT_ARRAY_ELM_NR*cc_id + ant_id;
1090 
1091  if(p_tx_srs_play_buffer[flowId]){
1092  pos = ((char*)p_tx_srs_play_buffer[flowId]) + tx_srs_play_buffer_position[flowId];
1093  ptr = psBbuIo->sFHSrsRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;
1094 
1095  if(startupConfiguration.srsSymMask & (1 << sym_id) ){
1096  if(ptr && pos){
1097  u32dptr = (uint32_t*)(ptr);
1098  memset(u32dptr,0 , pXranConf->nULRBs*N_SC_PER_PRB*4);
1099  rte_memcpy(u32dptr, pos, pXranConf->nULRBs*N_SC_PER_PRB*4);
1100  } else {
1101  exit(-1);
1102  printf("ptr ==NULL\n");
1103  }
1104  }
1105 
1106  tx_srs_play_buffer_position[flowId] += pXranConf->nULRBs*N_SC_PER_PRB*4;
1107 
1108  if(tx_srs_play_buffer_position[flowId] >= tx_srs_play_buffer_size[flowId])
1109  tx_srs_play_buffer_position[flowId] = 0;
1110  } else {
1111  //printf("flowId %d\n", flowId);
1112  }
1113  }
1114  }
1115  }
1116  }
1117  }
1118 
1119  return 0;
1120 }
1121 
1122 void stop_xran(void)
1123 {
1124  xran_status_t status = 0;
1125  SWXRANInterfaceTypeEnum eInterfaceType;
1126 
1127  free(gpXranLibConfig);
1128  gpXranLibConfig = NULL;
1129 
1130  status += xran_mm_destroy(xranHandle)*2;
1131 
1132  if(XRAN_STATUS_SUCCESS != status)
1133  {
1134  printf("Failed at xran_mm_destroy, status %d\n",status);
1135  iAssert(status == XRAN_STATUS_SUCCESS);
1136  }
1137 }
1138 
1139 int get_xran_iq_content(void)
1140 {
1141  BbuXranIoIfStruct *psBbuIo = xran_get_ctx();
1142  xran_status_t status;
1143  int32_t nSectorIndex[XRAN_MAX_SECTOR_NR];
1144  int32_t nSectorNum;
1145  int32_t cc_id, ant_id, sym_id, tti;
1146  int32_t flowId;
1147 
1148  uint8_t frame_id = 0;
1149  uint8_t subframe_id = 0;
1150  uint8_t slot_id = 0;
1151  uint8_t sym = 0;
1152 
1153  void *ptr;
1154  uint32_t *u32dptr;
1155  uint16_t *u16dptr;
1156  uint8_t *u8dptr;
1157 
1158  char *pos = NULL;
1159 
1160  for (nSectorNum = 0; nSectorNum < XRAN_MAX_SECTOR_NR; nSectorNum++)
1161  {
1162  nSectorIndex[nSectorNum] = nSectorNum;
1163  }
1164  nSectorNum = numCCPorts;
1165  printf ("get_xran_iq_content\n");
1166 
1167  /* Init Memory */
1168  for(cc_id = 0; cc_id <nSectorNum; cc_id++)
1169  {
1170  for(tti = 0; tti < XRAN_N_FE_BUF_LEN; tti++) {
1171  for(ant_id = 0; ant_id < XRAN_MAX_ANTENNA_NR; ant_id++){
1172  int32_t idxElm = 0;
1173  struct xran_prb_map *pRbMap = NULL;
1174  struct xran_prb_elm *pRbElm = NULL;
1175  struct xran_section_desc *p_sec_desc = NULL;
1176  pRbMap = (struct xran_prb_map *) psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData;
1177  if(pRbMap == NULL)
1178  exit(-1);
1179  flowId = XRAN_MAX_ANTENNA_NR * cc_id + ant_id;
1180  for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) {
1181  pRbElm = &pRbMap->prbMap[0];
1182  if(pRbMap->nPrbElm == 1){
1183  if(p_rx_log_buffer[flowId]) {
1184  pos = ((char*)p_rx_log_buffer[flowId]) + rx_log_buffer_position[flowId];
1185  ptr = psBbuIo->sFrontHaulRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;
1186  if(ptr){
1187  u32dptr = (uint32_t*)(ptr);
1188  char* my_ptr =(char *)ptr;
1189  rte_memcpy(pos + pRbElm->nRBStart*N_SC_PER_PRB*4L , u32dptr, pRbElm->nRBSize*N_SC_PER_PRB*4L);
1190  }else {
1191  printf("[%d][%d][%d][%d]ptr ==NULL\n",tti,cc_id,ant_id, sym_id);
1192  }
1193  }
1194  } else {
1195  for(idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++ ) {
1196  pRbElm = &pRbMap->prbMap[idxElm];
1197  p_sec_desc = pRbElm->p_sec_desc[sym_id];
1198  if(p_rx_log_buffer[flowId] && p_sec_desc){
1199  if(sym_id >= pRbElm->nStartSymb && sym_id < pRbElm->nStartSymb + pRbElm->numSymb){
1200  pos = ((char*)p_rx_log_buffer[flowId]) + rx_log_buffer_position[flowId];
1201  ptr = p_sec_desc->pData;
1202  if(ptr){
1203  int32_t payload_len = 0;
1204  u32dptr = (uint32_t*)(ptr);
1205  if (pRbElm->compMethod != XRAN_COMPMETHOD_NONE){
1206  struct xranlib_decompress_request bfp_decom_req;
1207  struct xranlib_decompress_response bfp_decom_rsp;
1208 
1209  memset(&bfp_decom_req, 0, sizeof(struct xranlib_decompress_request));
1210  memset(&bfp_decom_rsp, 0, sizeof(struct xranlib_decompress_response));
1211 
1212  bfp_decom_req.data_in = (int8_t *)u32dptr;
1213  bfp_decom_req.numRBs = pRbElm->nRBSize;
1214  bfp_decom_req.len = (3* pRbElm->iqWidth + 1)*pRbElm->nRBSize;
1215  bfp_decom_req.compMethod = pRbElm->compMethod;
1216  bfp_decom_req.iqWidth = pRbElm->iqWidth;
1217 
1218  bfp_decom_rsp.data_out = (int16_t *)(pos + pRbElm->nRBStart*N_SC_PER_PRB*4);
1219  bfp_decom_rsp.len = 0;
1220 
1221  if(xranlib_decompress_avx512(&bfp_decom_req, &bfp_decom_rsp) < 0){
1222  printf ("compression failed [%d]\n",
1223  pRbElm->compMethod);
1224  exit(-1);
1225  } else {
1226  payload_len = bfp_decom_rsp.len;
1227  }
1228  } else {
1229  rte_memcpy(pos + pRbElm->nRBStart*N_SC_PER_PRB*4 , u32dptr, pRbElm->nRBSize*N_SC_PER_PRB*4);
1230  }
1231  }
1232  }
1233  }
1234  }
1235  }
1236  rx_log_buffer_position[flowId] += pXranConf->nULRBs*N_SC_PER_PRB*4;
1237 
1238  if(rx_log_buffer_position[flowId] >= rx_log_buffer_size[flowId])
1239  rx_log_buffer_position[flowId] = 0;
1240  }
1241 
1242  /* prach RX for O-DU only */
1243  if(startupConfiguration.appMode == APP_O_DU) {
1244  flowId = XRAN_MAX_ANTENNA_NR * cc_id + ant_id;
1245  for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++){
1246  if(p_prach_log_buffer[flowId]){
1247  /* (0-79 slots) 10ms of IQs */
1248  pos = ((char*)p_prach_log_buffer[flowId]) + prach_log_buffer_position[flowId];
1249  ptr = psBbuIo->sFHPrachRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData; //8192 144
1250  if(ptr){
1251  u32dptr = (uint32_t*)(ptr);
1252  rte_memcpy(pos, u32dptr, PRACH_PLAYBACK_BUFFER_BYTES);
1253  }else
1254  printf("ptr ==NULL\n");
1255 
1256  prach_log_buffer_position[flowId] += PRACH_PLAYBACK_BUFFER_BYTES;
1257 
1258  if(prach_log_buffer_position[flowId] >= prach_log_buffer_size[flowId])
1259  prach_log_buffer_position[flowId] = 0;
1260  } else {
1261  //printf("flowId %d\n", flowId);
1262  }
1263  }
1264  }
1265  }
1266 
1267  /* SRS RX for O-DU only */
1268  if(startupConfiguration.appMode == APP_O_DU) {
1269  for(ant_id = 0; ant_id < XRAN_MAX_ANT_ARRAY_ELM_NR; ant_id++){
1270  flowId = XRAN_MAX_ANT_ARRAY_ELM_NR*cc_id + ant_id;
1271  for(sym_id = 0; sym_id < XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT; sym_id++){
1272  if(p_srs_log_buffer[flowId]){
1273  pos = ((char*)p_srs_log_buffer[flowId]) + srs_log_buffer_position[flowId];
1274  ptr = psBbuIo->sFHSrsRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;
1275  if(ptr){
1276  u32dptr = (uint32_t*)(ptr);
1277  rte_memcpy(pos, u32dptr, pXranConf->nULRBs*N_SC_PER_PRB*4);
1278  }else
1279  printf("ptr ==NULL\n");
1280 
1281  srs_log_buffer_position[flowId] += pXranConf->nULRBs*N_SC_PER_PRB*4;
1282 
1283  if(srs_log_buffer_position[flowId] >= srs_log_buffer_size[flowId])
1284  srs_log_buffer_position[flowId] = 0;
1285  } else {
1286  //printf("flowId %d\n", flowId);
1287  }
1288  }
1289  }
1290  }
1291  }
1292  }
1293 
1294  return 0;
1295 }
1296 
1297 void version_print(void)
1298 {
1299  char sysversion[100];
1300  char *compilation_date = __DATE__;
1301  char *compilation_time = __TIME__;
1302 
1303  uint32_t nLen;
1304  uint32_t i;
1305 
1306  snprintf(sysversion, 99, "Version: %s", VERSIONX);
1307  nLen = strlen(sysversion);
1308 
1309  printf("\n\n");
1310  printf("===========================================================================================================\n");
1311  printf("SAMPLE-APP VERSION\n");
1312  printf("===========================================================================================================\n");
1313 
1314  printf("%s\n", sysversion);
1315  printf("build-date: %s\n", compilation_date);
1316  printf("build-time: %s\n", compilation_time);
1317 }
1318 
1319 int main(int argc, char *argv[])
1320 {
1321  int i;
1322  int j, len;
1323  int lcore_id = 0;
1324  char filename[256];
1325  char prefix_name[256];
1326  uint32_t nCenterFreq;
1327  int32_t xret = 0;
1328  struct stat st = {0};
1329  uint32_t filenameLength = strlen(argv[1]);
1330  char *pCheckName1 = NULL, *pCheckName2 = NULL;
1331  enum xran_if_state xran_curr_if_state = XRAN_INIT;
1332 
1333  uint64_t nMask = (uint64_t)1;
1334  uint16_t nCoreUsage[4*64+1];
1335  uint16_t nCoreId[4*64];
1336  float nTotal = 0.0;
1337  uint64_t nTotalTime;
1338  uint64_t nUsedTime;
1339  uint32_t nCoreUsed;
1340  float nUsedPercent;
1341 
1342 
1343  if (argc == 3)
1344  errx(2, "Need two argument - the PCI address of the network port");
1345  if (filenameLength >= 256)
1346  {
1347  printf("Config file name input is too long, exiting!\n");
1348  exit(-1);
1349  }
1350 
1351  version_print();
1352 
1353  //add for Klocworks
1354  len = strlen(argv[1]) + 1;
1355  if (len > (sizeof(filename) - 10))
1356  len = (sizeof(filename) - 10);
1357  strncpy(filename, argv[1], (sizeof(filename) - 10));
1358  filename[len] = '\0';
1359 
1360  if (xran_is_synchronized() != 0)
1361  printf("Machine is not synchronized using PTP!\n");
1362  else
1363  printf("Machine is synchronized using PTP!\n");
1364 
1365  memset(&startupConfiguration, 0, sizeof(RuntimeConfig));
1366 
1367  if (parseConfigFile(filename, (RuntimeConfig*)&startupConfiguration) != 0) {
1368  printf("Configuration file error.\n");
1369  return -1;
1370  }
1371 
1372  if(startupConfiguration.ant_file[0] == NULL){
1373  printf("it looks like test vector for antennas were not provided\n");
1374  exit(-1);
1375  }
1376 
1377  if (startupConfiguration.numCC > XRAN_MAX_SECTOR_NR) {
1378  printf("Number of cells %d exceeds max number supported %d!\n", startupConfiguration.numCC, XRAN_MAX_SECTOR_NR);
1379  startupConfiguration.numCC = XRAN_MAX_SECTOR_NR;
1380 
1381  }
1382  if (startupConfiguration.antElmTRx > XRAN_MAX_ANT_ARRAY_ELM_NR) {
1383  printf("Number of Antenna elements %d exceeds max number supported %d!\n", startupConfiguration.antElmTRx, XRAN_MAX_ANT_ARRAY_ELM_NR);
1384  startupConfiguration.antElmTRx = XRAN_MAX_ANT_ARRAY_ELM_NR;
1385  }
1386 
1387  numCCPorts = startupConfiguration.numCC;
1388  num_eAxc = startupConfiguration.numAxc;
1389 
1390  printf("numCCPorts %d num_eAxc%d\n", numCCPorts, num_eAxc);
1391 
1392  if (startupConfiguration.mu_number <= 1){
1393  nFpgaToSW_FTH_RxBufferLen = 13168; /* 273*12*4 + 64*/
1394  nFpgaToSW_PRACH_RxBufferLen = 8192;
1395  nSW_ToFpga_FTH_TxBufferLen = 13168 + /* 273*12*4 + 64* + ETH AND ORAN HDRs */
1396  XRAN_MAX_SECTIONS_PER_SYM* (RTE_PKTMBUF_HEADROOM + sizeof(struct ether_hdr) +
1397  sizeof(struct xran_ecpri_hdr) +
1398  sizeof(struct radio_app_common_hdr) +
1399  sizeof(struct data_section_hdr));
1400  } else if (startupConfiguration.mu_number == 3){
1401  nFpgaToSW_FTH_RxBufferLen = 3328;
1402  nFpgaToSW_PRACH_RxBufferLen = 8192;
1403  nSW_ToFpga_FTH_TxBufferLen = 3328 +
1404  XRAN_MAX_SECTIONS_PER_SYM * (RTE_PKTMBUF_HEADROOM + sizeof(struct ether_hdr) +
1405  sizeof(struct xran_ecpri_hdr) +
1406  sizeof(struct radio_app_common_hdr) +
1407  sizeof(struct data_section_hdr));
1408  } else {
1409  printf("given numerology is not supported %d\n", startupConfiguration.mu_number);
1410  exit(-1);
1411  }
1412  printf("nSW_ToFpga_FTH_TxBufferLen %d\n", nSW_ToFpga_FTH_TxBufferLen);
1413 
1414  memset(&xranInit, 0, sizeof(struct xran_fh_init));
1415 
1416  if(startupConfiguration.appMode == APP_O_DU) {
1417  printf("set O-DU\n");
1418  xranInit.io_cfg.id = 0;/* O-DU */
1419  xranInit.io_cfg.core = startupConfiguration.io_core;
1420  xranInit.io_cfg.system_core = 0;
1421  xranInit.io_cfg.pkt_proc_core = startupConfiguration.io_core+1;
1422  xranInit.io_cfg.pkt_aux_core = 0; /* do not start*/
1423  xranInit.io_cfg.timing_core = startupConfiguration.io_core+2;
1424  } else {
1425  printf("set O-RU\n");
1426  xranInit.io_cfg.id = 1; /* O-RU*/
1427  xranInit.io_cfg.core = startupConfiguration.io_core;
1428  xranInit.io_cfg.system_core = 0;
1429  xranInit.io_cfg.pkt_proc_core = startupConfiguration.io_core+1;
1430  xranInit.io_cfg.pkt_aux_core = 0; /* do not start */
1431  xranInit.io_cfg.timing_core = startupConfiguration.io_core+2;
1432  }
1433 
1434  xranInit.io_cfg.bbdev_mode = XRAN_BBDEV_NOT_USED;
1435 
1436  if(startupConfiguration.xranCat == XRAN_CATEGORY_A){
1437  xranInit.eAxCId_conf.mask_cuPortId = 0xf000;
1438  xranInit.eAxCId_conf.mask_bandSectorId = 0x0f00;
1439  xranInit.eAxCId_conf.mask_ccId = 0x00f0;
1440  xranInit.eAxCId_conf.mask_ruPortId = 0x000f;
1441  xranInit.eAxCId_conf.bit_cuPortId = 12;
1442  xranInit.eAxCId_conf.bit_bandSectorId = 8;
1443  xranInit.eAxCId_conf.bit_ccId = 4;
1444  xranInit.eAxCId_conf.bit_ruPortId = 0;
1445  } else {
1446  xranInit.eAxCId_conf.mask_cuPortId = 0xf000;
1447  xranInit.eAxCId_conf.mask_bandSectorId = 0x0c00;
1448  xranInit.eAxCId_conf.mask_ccId = 0x0300;
1449  xranInit.eAxCId_conf.mask_ruPortId = 0x00ff; /* more than [0-127] eAxC */
1450  xranInit.eAxCId_conf.bit_cuPortId = 12;
1451  xranInit.eAxCId_conf.bit_bandSectorId = 10;
1452  xranInit.eAxCId_conf.bit_ccId = 8;
1453  xranInit.eAxCId_conf.bit_ruPortId = 0;
1454  }
1455 
1456  xranInit.io_cfg.dpdk_dev[XRAN_UP_VF] = argv[2];
1457  xranInit.io_cfg.dpdk_dev[XRAN_CP_VF] = argv[3];
1458  xranInit.mtu = startupConfiguration.mtu;
1459 
1460  xranInit.p_o_du_addr = (int8_t *)&startupConfiguration.o_du_addr;
1461  xranInit.p_o_ru_addr = (int8_t *)&startupConfiguration.o_ru_addr;
1462 
1463  sprintf(prefix_name, "wls_%d",startupConfiguration.instance_id);
1464  xranInit.filePrefix = prefix_name;
1465 
1466  xranInit.totalBfWeights = startupConfiguration.totalBfWeights;
1467 
1468  xranInit.Tadv_cp_dl = startupConfiguration.Tadv_cp_dl;
1469  xranInit.T2a_min_cp_dl = startupConfiguration.T2a_min_cp_dl;
1470  xranInit.T2a_max_cp_dl = startupConfiguration.T2a_max_cp_dl;
1471  xranInit.T2a_min_cp_ul = startupConfiguration.T2a_min_cp_ul;
1472  xranInit.T2a_max_cp_ul = startupConfiguration.T2a_max_cp_ul;
1473  xranInit.T2a_min_up = startupConfiguration.T2a_min_up;
1474  xranInit.T2a_max_up = startupConfiguration.T2a_max_up;
1475  xranInit.Ta3_min = startupConfiguration.Ta3_min;
1476  xranInit.Ta3_max = startupConfiguration.Ta3_max;
1477  xranInit.T1a_min_cp_dl = startupConfiguration.T1a_min_cp_dl;
1478  xranInit.T1a_max_cp_dl = startupConfiguration.T1a_max_cp_dl;
1479  xranInit.T1a_min_cp_ul = startupConfiguration.T1a_min_cp_ul;
1480  xranInit.T1a_max_cp_ul = startupConfiguration.T1a_max_cp_ul;
1481  xranInit.T1a_min_up = startupConfiguration.T1a_min_up;
1482  xranInit.T1a_max_up = startupConfiguration.T1a_max_up;
1483  xranInit.Ta4_min = startupConfiguration.Ta4_min;
1484  xranInit.Ta4_max = startupConfiguration.Ta4_max;
1485 
1486  xranInit.enableCP = startupConfiguration.enableCP;
1487  xranInit.prachEnable = startupConfiguration.enablePrach;
1488  xranInit.srsEnable = startupConfiguration.enableSrs;
1489  xranInit.debugStop = startupConfiguration.debugStop;
1490  xranInit.debugStopCount = startupConfiguration.debugStopCount;
1491  xranInit.DynamicSectionEna = startupConfiguration.DynamicSectionEna;
1492  xranInit.io_cfg.bbdev_mode = XRAN_BBDEV_NOT_USED;
1493  xranInit.GPS_Alpha = startupConfiguration.GPS_Alpha;
1494  xranInit.GPS_Beta = startupConfiguration.GPS_Beta;
1495 
1496  xranInit.cp_vlan_tag = startupConfiguration.cp_vlan_tag;
1497  xranInit.up_vlan_tag = startupConfiguration.up_vlan_tag;
1498 
1499  printf("IQ files size is %d slots\n", startupConfiguration.numSlots);
1500 
1501  iq_playback_buffer_size_dl = (startupConfiguration.numSlots * N_SYM_PER_SLOT * N_SC_PER_PRB *
1502  app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nDLBandwidth, startupConfiguration.nDLAbsFrePointA)
1503  *4L);
1504 
1505  iq_playback_buffer_size_ul = (startupConfiguration.numSlots * N_SYM_PER_SLOT * N_SC_PER_PRB *
1506  app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nULBandwidth, startupConfiguration.nULAbsFrePointA)
1507  *4L);
1508 
1509 
1510  /* 10 * [14*32*273*2*2] = 4892160 bytes */
1511  iq_bfw_buffer_size_dl = (startupConfiguration.numSlots * N_SYM_PER_SLOT * startupConfiguration.antElmTRx *
1512  app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nDLBandwidth, startupConfiguration.nDLAbsFrePointA)
1513  *4L);
1514 
1515  /* 10 * [14*32*273*2*2] = 4892160 bytes */
1516  iq_bfw_buffer_size_ul = (startupConfiguration.numSlots * N_SYM_PER_SLOT *
1517  app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nULBandwidth, startupConfiguration.nULAbsFrePointA)
1518  *4L);
1519 
1520  /* 10 * [1*273*2*2] = 349440 bytes */
1521  iq_srs_buffer_size_ul = (startupConfiguration.numSlots * N_SYM_PER_SLOT * N_SC_PER_PRB *
1522  app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nULBandwidth, startupConfiguration.nULAbsFrePointA)
1523  *4L);
1524 
1525  for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
1526  p_tx_play_buffer[i] = (int16_t*)malloc(iq_playback_buffer_size_dl);
1527  tx_play_buffer_size[i] = (int32_t)iq_playback_buffer_size_dl;
1528 
1529  if (p_tx_play_buffer[i] == NULL)
1530  exit(-1);
1531 
1532  tx_play_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.ant_file[i],
1533  "DL IFFT IN IQ Samples in binary format",
1534  (uint8_t*) p_tx_play_buffer[i],
1535  tx_play_buffer_size[i],
1536  1);
1537  tx_play_buffer_position[i] = 0;
1538  }
1539 
1540  if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){
1541  for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
1542 
1543  p_tx_dl_bfw_buffer[i] = (int16_t*)malloc(iq_bfw_buffer_size_dl);
1544  tx_dl_bfw_buffer_size[i] = (int32_t)iq_bfw_buffer_size_dl;
1545 
1546  if (p_tx_dl_bfw_buffer[i] == NULL)
1547  exit(-1);
1548 
1549  tx_dl_bfw_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.dl_bfw_file[i],
1550  "DL BF weights IQ Samples in binary format",
1551  (uint8_t*) p_tx_dl_bfw_buffer[i],
1552  tx_dl_bfw_buffer_size[i],
1553  1);
1554  tx_dl_bfw_buffer_position[i] = 0;
1555  }
1556  }
1557 
1558  if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){
1559 
1560  for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
1561  p_tx_ul_bfw_buffer[i] = (int16_t*)malloc(iq_bfw_buffer_size_ul);
1562  tx_ul_bfw_buffer_size[i] = (int32_t)iq_bfw_buffer_size_ul;
1563 
1564  if (p_tx_ul_bfw_buffer[i] == NULL)
1565  exit(-1);
1566 
1567  tx_ul_bfw_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.ul_bfw_file[i],
1568  "UL BF weights IQ Samples in binary format",
1569  (uint8_t*) p_tx_ul_bfw_buffer[i],
1570  tx_ul_bfw_buffer_size[i],
1571  1);
1572  tx_ul_bfw_buffer_position[i] = 0;
1573  }
1574  }
1575 
1576  if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enablePrach){
1577  for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
1578  p_tx_prach_play_buffer[i] = (int16_t*)malloc(PRACH_PLAYBACK_BUFFER_BYTES);
1579  tx_prach_play_buffer_size[i] = (int32_t)PRACH_PLAYBACK_BUFFER_BYTES;
1580 
1581  if (p_tx_prach_play_buffer[i] == NULL)
1582  exit(-1);
1583 
1584  memset(p_tx_prach_play_buffer[i], 0, PRACH_PLAYBACK_BUFFER_BYTES);
1585 
1586  tx_prach_play_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.prach_file[i],
1587  "PRACH IQ Samples in binary format",
1588  (uint8_t*) p_tx_prach_play_buffer[i],
1589  tx_prach_play_buffer_size[i],
1590  1);
1591  tx_prach_play_buffer_position[i] = 0;
1592  }
1593  }
1594 
1595  if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enableSrs){
1596  for(i = 0;
1597  i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);
1598  i++) {
1599 
1600  p_tx_srs_play_buffer[i] = (int16_t*)malloc(iq_srs_buffer_size_ul);
1601  tx_srs_play_buffer_size[i] = (int32_t)iq_srs_buffer_size_ul;
1602 
1603  if (p_tx_srs_play_buffer[i] == NULL)
1604  exit(-1);
1605 
1606  memset(p_tx_srs_play_buffer[i], 0, iq_srs_buffer_size_ul);
1607  tx_prach_play_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.ul_srs_file[i],
1608  "SRS IQ Samples in binary format",
1609  (uint8_t*) p_tx_srs_play_buffer[i],
1610  tx_srs_play_buffer_size[i],
1611  1);
1612 
1613  tx_srs_play_buffer_position[i] = 0;
1614  }
1615  }
1616 
1617  /* log of ul */
1618  for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
1619 
1620  p_rx_log_buffer[i] = (int16_t*)malloc(iq_playback_buffer_size_ul);
1621  rx_log_buffer_size[i] = (int32_t)iq_playback_buffer_size_ul;
1622 
1623  if (p_rx_log_buffer[i] == NULL)
1624  exit(-1);
1625 
1626  rx_log_buffer_position[i] = 0;
1627 
1628  memset(p_rx_log_buffer[i], 0, rx_log_buffer_size[i]);
1629  }
1630 
1631  /* log of prach */
1632  for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
1633 
1634  p_prach_log_buffer[i] = (int16_t*)malloc(startupConfiguration.numSlots*XRAN_NUM_OF_SYMBOL_PER_SLOT*PRACH_PLAYBACK_BUFFER_BYTES);
1635  prach_log_buffer_size[i] = (int32_t)startupConfiguration.numSlots*XRAN_NUM_OF_SYMBOL_PER_SLOT*PRACH_PLAYBACK_BUFFER_BYTES;
1636 
1637  if (p_prach_log_buffer[i] == NULL)
1638  exit(-1);
1639 
1640  memset(p_prach_log_buffer[i], 0, prach_log_buffer_size[i]);
1641  prach_log_buffer_position[i] = 0;
1642  }
1643 
1644  /* log of SRS */
1645  if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.enableSrs){
1646  for(i = 0;
1647  i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);
1648  i++) {
1649 
1650  p_srs_log_buffer[i] = (int16_t*)malloc(iq_srs_buffer_size_ul);
1651  srs_log_buffer_size[i] = (int32_t)iq_srs_buffer_size_ul;
1652 
1653  if (p_srs_log_buffer[i] == NULL)
1654  exit(-1);
1655 
1656  memset(p_srs_log_buffer[i], 0, iq_srs_buffer_size_ul);
1657  srs_log_buffer_position[i] = 0;
1658  }
1659  }
1660 
1661  if (stat("./logs", &st) == -1) {
1662  mkdir("./logs", 0777);
1663  }
1664 
1665  for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
1666 
1667  sprintf(filename, "./logs/%s-play_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
1668  sys_save_buf_to_file_txt(filename,
1669  "DL IFFT IN IQ Samples in human readable format",
1670  (uint8_t*) p_tx_play_buffer[i],
1671  tx_play_buffer_size[i],
1672  1);
1673 
1674  sprintf(filename, "./logs/%s-play_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
1675  sys_save_buf_to_file(filename,
1676  "DL IFFT IN IQ Samples in binary format",
1677  (uint8_t*) p_tx_play_buffer[i],
1678  tx_play_buffer_size[i]/sizeof(short),
1679  sizeof(short));
1680 
1681 
1682  if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){
1683  sprintf(filename, "./logs/%s-dl_bfw_ue%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
1684  sys_save_buf_to_file_txt(filename,
1685  "DL Beamformig weights IQ Samples in human readable format",
1686  (uint8_t*) p_tx_dl_bfw_buffer[i],
1687  tx_dl_bfw_buffer_size[i],
1688  1);
1689 
1690  sprintf(filename, "./logs/%s-dl_bfw_ue%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
1691  sys_save_buf_to_file(filename,
1692  "DL Beamformig weightsIQ Samples in binary format",
1693  (uint8_t*) p_tx_dl_bfw_buffer[i],
1694  tx_dl_bfw_buffer_size[i]/sizeof(short),
1695  sizeof(short));
1696 
1697 
1698  sprintf(filename, "./logs/%s-ul_bfw_ue%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
1699  sys_save_buf_to_file_txt(filename,
1700  "UL Beamformig weights IQ Samples in human readable format",
1701  (uint8_t*) p_tx_ul_bfw_buffer[i],
1702  tx_ul_bfw_buffer_size[i],
1703  1);
1704 
1705  sprintf(filename, "./logs/%s-ul_bfw_ue%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
1706  sys_save_buf_to_file(filename,
1707  "UL Beamformig weightsIQ Samples in binary format",
1708  (uint8_t*) p_tx_ul_bfw_buffer[i],
1709  tx_ul_bfw_buffer_size[i]/sizeof(short),
1710  sizeof(short));
1711 
1712  }
1713 
1714  if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enablePrach){
1715  sprintf(filename, "./logs/%s-play_prach_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
1716  sys_save_buf_to_file_txt(filename,
1717  "PRACH IQ Samples in human readable format",
1718  (uint8_t*) p_tx_prach_play_buffer[i],
1719  tx_prach_play_buffer_size[i],
1720  1);
1721 
1722  sprintf(filename, "./logs/%s-play_prach_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
1723  sys_save_buf_to_file(filename,
1724  "PRACH IQ Samples in binary format",
1725  (uint8_t*) p_tx_prach_play_buffer[i],
1726  tx_prach_play_buffer_size[i]/sizeof(short),
1727  sizeof(short));
1728  }
1729  }
1730 
1731  if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enableSrs && startupConfiguration.xranCat == XRAN_CATEGORY_B){
1732  for(i = 0;
1733  i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);
1734  i++) {
1735 
1736 
1737  sprintf(filename, "./logs/%s-play_srs_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
1738  sys_save_buf_to_file_txt(filename,
1739  "SRS IQ Samples in human readable format",
1740  (uint8_t*) p_tx_srs_play_buffer[i],
1741  tx_srs_play_buffer_size[i],
1742  1);
1743 
1744  sprintf(filename, "./logs/%s-play_srs_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
1745  sys_save_buf_to_file(filename,
1746  "SRS IQ Samples in binary format",
1747  (uint8_t*) p_tx_srs_play_buffer[i],
1748  tx_srs_play_buffer_size[i]/sizeof(short),
1749  sizeof(short));
1750  }
1751  }
1752 
1753  if (startupConfiguration.iqswap == 1){
1754  for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
1755  printf("TX: Swap I and Q to match RU format: [%d]\n",i);
1756  {
1757  /* swap I and Q */
1758  int32_t j;
1759  signed short *ptr = (signed short *) p_tx_play_buffer[i];
1760  signed short temp;
1761 
1762  for (j = 0; j < (int32_t)(tx_play_buffer_size[i]/sizeof(short)) ; j = j + 2){
1763  temp = ptr[j];
1764  ptr[j] = ptr[j + 1];
1765  ptr[j + 1] = temp;
1766  }
1767  }
1768  if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){
1769  printf("DL BFW: Swap I and Q to match RU format: [%d]\n",i);
1770  {
1771  /* swap I and Q */
1772  int32_t j;
1773  signed short *ptr = (signed short *) p_tx_dl_bfw_buffer[i];
1774  signed short temp;
1775 
1776  for (j = 0; j < (int32_t)(tx_dl_bfw_buffer_size[i]/sizeof(short)) ; j = j + 2){
1777  temp = ptr[j];
1778  ptr[j] = ptr[j + 1];
1779  ptr[j + 1] = temp;
1780  }
1781  }
1782  printf("UL BFW: Swap I and Q to match RU format: [%d]\n",i);
1783  {
1784  /* swap I and Q */
1785  int32_t j;
1786  signed short *ptr = (signed short *) p_tx_ul_bfw_buffer[i];
1787  signed short temp;
1788 
1789  for (j = 0; j < (int32_t)(tx_ul_bfw_buffer_size[i]/sizeof(short)) ; j = j + 2){
1790  temp = ptr[j];
1791  ptr[j] = ptr[j + 1];
1792  ptr[j + 1] = temp;
1793  }
1794  }
1795  }
1796  }
1797 
1798  if (startupConfiguration.appMode == APP_O_RU){
1799  for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
1800  printf("PRACH: Swap I and Q to match RU format: [%d]\n",i);
1801  {
1802  /* swap I and Q */
1803  int32_t j;
1804  signed short *ptr = (signed short *) p_tx_prach_play_buffer[i];
1805  signed short temp;
1806 
1807  for (j = 0; j < (int32_t)(tx_prach_play_buffer_size[i]/sizeof(short)) ; j = j + 2){
1808  temp = ptr[j];
1809  ptr[j] = ptr[j + 1];
1810  ptr[j + 1] = temp;
1811  }
1812  }
1813  }
1814  }
1815 
1816  if (startupConfiguration.appMode == APP_O_RU){
1817  for(i = 0;
1818  i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);
1819  i++) {
1820  printf("SRS: Swap I and Q to match RU format: [%d]\n",i);
1821  {
1822  /* swap I and Q */
1823  int32_t j;
1824  signed short *ptr = (signed short *) p_tx_srs_play_buffer[i];
1825  signed short temp;
1826 
1827  for (j = 0; j < (int32_t)(tx_srs_play_buffer_size[i]/sizeof(short)) ; j = j + 2){
1828  temp = ptr[j];
1829  ptr[j] = ptr[j + 1];
1830  ptr[j + 1] = temp;
1831  }
1832  }
1833  }
1834  }
1835  }
1836 
1837 #if 0
1838  for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
1839 
1840  sprintf(filename, "./logs/swap_IQ_play_ant%d.txt", i);
1841  sys_save_buf_to_file_txt(filename,
1842  "DL IFFT IN IQ Samples in human readable format",
1843  (uint8_t*) p_tx_play_buffer[i],
1844  tx_play_buffer_size[i],
1845  1);
1846  }
1847 #endif
1848  if (startupConfiguration.nebyteorderswap == 1 && startupConfiguration.compression == 0){
1849  for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
1850  printf("TX: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);
1851  for (j = 0; j < tx_play_buffer_size[i]/sizeof(short); j++){
1852  p_tx_play_buffer[i][j] = rte_cpu_to_be_16(p_tx_play_buffer[i][j]);
1853  }
1854 
1855  if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){
1856  printf("DL BFW: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);
1857  for (j = 0; j < tx_dl_bfw_buffer_size[i]/sizeof(short); j++){
1858  p_tx_dl_bfw_buffer[i][j] = rte_cpu_to_be_16(p_tx_dl_bfw_buffer[i][j]);
1859  }
1860  printf("UL BFW: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);
1861  for (j = 0; j < tx_ul_bfw_buffer_size[i]/sizeof(short); j++){
1862  p_tx_ul_bfw_buffer[i][j] = rte_cpu_to_be_16(p_tx_ul_bfw_buffer[i][j]);
1863  }
1864  }
1865  }
1866 
1867  if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enablePrach){
1868  for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
1869  printf("PRACH: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);
1870  for (j = 0; j < tx_prach_play_buffer_size[i]/sizeof(short); j++){
1871  p_tx_prach_play_buffer[i][j] = rte_cpu_to_be_16(p_tx_prach_play_buffer[i][j]);
1872  }
1873  }
1874  }
1875 
1876  if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enableSrs){
1877  for(i = 0;
1878  i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);
1879  i++) {
1880  printf("SRS: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);
1881  for (j = 0; j < tx_srs_play_buffer_size[i]/sizeof(short); j++){
1882  p_tx_srs_play_buffer[i][j] = rte_cpu_to_be_16(p_tx_srs_play_buffer[i][j]);
1883  }
1884  }
1885  }
1886 
1887  }
1888 
1889 #if 0
1890  for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
1891 
1892  sprintf(filename, "./logs/swap_be_play_ant%d.txt", i);
1893  sys_save_buf_to_file_txt(filename,
1894  "DL IFFT IN IQ Samples in human readable format",
1895  (uint8_t*) p_tx_play_buffer[i],
1896  tx_play_buffer_size[i],
1897  1);
1898  }
1899 #endif
1900 
1901  memset(&xranConf, 0, sizeof(struct xran_fh_config));
1902  pXranConf = &xranConf;
1903 
1904  pXranConf->nDLRBs = app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nDLBandwidth, startupConfiguration.nDLAbsFrePointA);
1905  pXranConf->nULRBs = app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nULBandwidth, startupConfiguration.nULAbsFrePointA);
1906 
1907  if(startupConfiguration.DynamicSectionEna == 0){
1908  struct xran_prb_map* pRbMap;
1909 
1910  pRbMap = &startupConfiguration.PrbMapDl;
1911 
1912  pRbMap->dir = XRAN_DIR_DL;
1913  pRbMap->xran_port = 0;
1914  pRbMap->band_id = 0;
1915  pRbMap->cc_id = 0;
1916  pRbMap->ru_port_id = 0;
1917  pRbMap->tti_id = 0;
1918  pRbMap->start_sym_id = 0;
1919  pRbMap->nPrbElm = 1;
1920  pRbMap->prbMap[0].nStartSymb = 0;
1921  pRbMap->prbMap[0].numSymb = 14;
1922  pRbMap->prbMap[0].nRBStart = 0;
1923  pRbMap->prbMap[0].nRBSize = pXranConf->nDLRBs;
1924  pRbMap->prbMap[0].nBeamIndex = 0;
1925  pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE;
1926  pRbMap->prbMap[0].iqWidth = 16;
1927 
1928  pRbMap = &startupConfiguration.PrbMapUl;
1929  pRbMap->dir = XRAN_DIR_UL;
1930  pRbMap->xran_port = 0;
1931  pRbMap->band_id = 0;
1932  pRbMap->cc_id = 0;
1933  pRbMap->ru_port_id = 0;
1934  pRbMap->tti_id = 0;
1935  pRbMap->start_sym_id = 0;
1936  pRbMap->nPrbElm = 1;
1937  pRbMap->prbMap[0].nStartSymb = 0;
1938  pRbMap->prbMap[0].numSymb = 14;
1939  pRbMap->prbMap[0].nRBStart = 0;
1940  pRbMap->prbMap[0].nRBSize = pXranConf->nULRBs;
1941  pRbMap->prbMap[0].nBeamIndex = 0;
1942  pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE;
1943  pRbMap->prbMap[0].iqWidth = 16;
1944  }
1945 
1946  timer_set_tsc_freq_from_clock();
1947  xret = xran_init(argc, argv, &xranInit, argv[0], &xranHandle);
1948  if(xret != XRAN_STATUS_SUCCESS){
1949  printf("xran_init failed %d\n", xret);
1950  exit(-1);
1951  }
1952 
1953  if(xranHandle == NULL)
1954  exit(1);
1955 
1956 
1957  pXranConf->sector_id = 0;
1958  pXranConf->nCC = numCCPorts;
1959  pXranConf->neAxc = num_eAxc;
1960  pXranConf->neAxcUl = startupConfiguration.numUlAxc;
1961  pXranConf->nAntElmTRx = startupConfiguration.antElmTRx;
1962 
1963  pXranConf->frame_conf.nFrameDuplexType = startupConfiguration.nFrameDuplexType;
1964  pXranConf->frame_conf.nNumerology = startupConfiguration.mu_number;
1965  pXranConf->frame_conf.nTddPeriod = startupConfiguration.nTddPeriod;
1966 
1967  for (i = 0; i < startupConfiguration.nTddPeriod; i++){
1968  pXranConf->frame_conf.sSlotConfig[i] = startupConfiguration.sSlotConfig[i];
1969  }
1970 
1971  pXranConf->prach_conf.nPrachSubcSpacing = startupConfiguration.mu_number;
1972  pXranConf->prach_conf.nPrachFreqStart = 0;
1973  pXranConf->prach_conf.nPrachFilterIdx = XRAN_FILTERINDEX_PRACH_ABC;
1974  pXranConf->prach_conf.nPrachConfIdx = startupConfiguration.prachConfigIndex;
1975  pXranConf->prach_conf.nPrachFreqOffset = -792;
1976 
1977  pXranConf->srs_conf.symbMask = startupConfiguration.srsSymMask;
1978  pXranConf->srs_conf.eAxC_offset = 2 * startupConfiguration.numAxc; /* PUSCH, PRACH, SRS */
1979 
1980  pXranConf->ru_conf.xranCat = startupConfiguration.xranCat;
1981  pXranConf->ru_conf.iqWidth = startupConfiguration.PrbMapDl.prbMap[0].iqWidth;
1982 
1983  if (startupConfiguration.compression == 0)
1984  pXranConf->ru_conf.compMeth = XRAN_COMPMETHOD_NONE;
1985  else
1986  pXranConf->ru_conf.compMeth = XRAN_COMPMETHOD_BLKFLOAT;
1987 
1988  pXranConf->ru_conf.fftSize = 0;
1989  while (startupConfiguration.nULFftSize >>= 1)
1990  ++pXranConf->ru_conf.fftSize;
1991 
1992  pXranConf->ru_conf.byteOrder = (startupConfiguration.nebyteorderswap == 1) ? XRAN_NE_BE_BYTE_ORDER : XRAN_CPU_LE_BYTE_ORDER ;
1993  pXranConf->ru_conf.iqOrder = (startupConfiguration.iqswap == 1) ? XRAN_Q_I_ORDER : XRAN_I_Q_ORDER;
1994 
1995  printf("FFT Order %d\n", pXranConf->ru_conf.fftSize);
1996 
1997  nCenterFreq = startupConfiguration.nDLAbsFrePointA + (((pXranConf->nDLRBs * N_SC_PER_PRB) / 2) * app_xran_get_scs(startupConfiguration.mu_number));
1998  pXranConf->nDLCenterFreqARFCN = app_xran_cal_nrarfcn(nCenterFreq);
1999  printf("DL center freq %d DL NR-ARFCN %d\n", nCenterFreq, pXranConf->nDLCenterFreqARFCN);
2000 
2001  nCenterFreq = startupConfiguration.nULAbsFrePointA + (((pXranConf->nULRBs * N_SC_PER_PRB) / 2) * app_xran_get_scs(startupConfiguration.mu_number));
2002  pXranConf->nULCenterFreqARFCN = app_xran_cal_nrarfcn(nCenterFreq);
2003  printf("UL center freq %d UL NR-ARFCN %d\n", nCenterFreq, pXranConf->nULCenterFreqARFCN);
2004 
2005  pXranConf->bbdev_dec = NULL;
2006  pXranConf->bbdev_enc = NULL;
2007 
2008  pXranConf->log_level = 1;
2009 
2010  if(startupConfiguration.maxFrameId)
2011  pXranConf->ru_conf.xran_max_frame = startupConfiguration.maxFrameId;
2012 
2013  if(init_xran() != 0)
2014  exit(-1);
2015 
2016  xran_reg_physide_cb(xranHandle, physide_dl_tti_call_back, NULL, 10, XRAN_CB_TTI);
2017  xran_reg_physide_cb(xranHandle, physide_ul_half_slot_call_back, NULL, 10, XRAN_CB_HALF_SLOT_RX);
2018  xran_reg_physide_cb(xranHandle, physide_ul_full_slot_call_back, NULL, 10, XRAN_CB_FULL_SLOT_RX);
2019 
2020  init_xran_iq_content();
2021 
2022  xret = xran_open(xranHandle, pXranConf);
2023 
2024  if(xret != XRAN_STATUS_SUCCESS){
2025  printf("xran_open failed %d\n", xret);
2026  exit(-1);
2027  }
2028 
2029  sprintf(filename, "mlog-%s", startupConfiguration.appMode == 0 ? "o-du" : "o-ru");
2030 
2031  /* MLogOpen(0, 32, 0, 0xFFFFFFFF, filename);*/
2032 
2033  MLogOpen(256, 3, 20000, 0, filename);
2034  MLogSetMask(0);
2035 
2036  puts("----------------------------------------");
2037  printf("MLog Info: virt=0x%016lx size=%d\n", MLogGetFileLocation(), MLogGetFileSize());
2038  puts("----------------------------------------");
2039 
2040 
2041  uint64_t nActiveCoreMask[MAX_BBU_POOL_CORE_MASK] = {0};
2042  nActiveCoreMask[0] = 1 << xranInit.io_cfg.timing_core;
2043  uint32_t numCarriers = startupConfiguration.numCC;
2044 
2045  MLogAddTestCase(nActiveCoreMask, numCarriers);
2046 
2047  fcntl(0, F_SETFL, fcntl(0, F_GETFL) | O_NONBLOCK);
2048 
2049  state = APP_RUNNING;
2050  printf("Start XRAN traffic\n");
2051  xran_start(xranHandle);
2052  sleep(3);
2053  print_menu();
2054  for (;;) {
2055  struct xran_common_counters x_counters;
2056  char input[10];
2057  sleep(1);
2058  xran_curr_if_state = xran_get_if_state();
2059  if(xran_get_common_counters(xranHandle, &x_counters) == XRAN_STATUS_SUCCESS) {
2060 
2061  xran_get_time_stats(&nTotalTime, &nUsedTime, &nCoreUsed, 1);
2062  nUsedPercent = ((float)nUsedTime * 100.0) / (float)nTotalTime;
2063 
2064  printf("[%s][rx %ld pps %ld kbps %ld][tx %ld pps %ld kbps %ld] [on_time %ld early %ld late %ld corrupt %ld pkt_dupl %ld Total %ld] IO Util: %5.2f %%\n",
2065  ((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"),
2066  rx_counter,
2067  rx_counter-old_rx_counter,
2068  rx_bytes_per_sec*8/1000L,
2069  tx_counter,
2070  tx_counter-old_tx_counter,
2071  tx_bytes_per_sec*8/1000L,
2072  x_counters.Rx_on_time,
2073  x_counters.Rx_early,
2074  x_counters.Rx_late,
2075  x_counters.Rx_corrupt,
2076  x_counters.Rx_pkt_dupl,
2077  x_counters.Total_msgs_rcvd,
2078  nUsedPercent);
2079 
2080  if(rx_counter > old_rx_counter)
2081  old_rx_counter = rx_counter;
2082  if(tx_counter > old_tx_counter)
2083  old_tx_counter = tx_counter;
2084 
2085  if(rx_counter > 0 && tx_counter > 0)
2086  MLogSetMask(0xFFFFFFFF);
2087  } else {
2088  printf("error xran_get_common_counters\n");
2089  }
2090 
2091  if (xran_curr_if_state == XRAN_STOPPED){
2092  break;
2093  }
2094  if (NULL == fgets(input, 10, stdin)) {
2095  continue;
2096  }
2097 
2098  const int sel_opt = atoi(input);
2099  switch (sel_opt) {
2100  case 1:
2101  xran_start(xranHandle);
2102  printf("Start XRAN traffic\n");
2103  break;
2104  case 2:
2105  break;
2106  case 3:
2107  xran_stop(xranHandle);
2108  printf("Stop XRAN traffic\n");
2109  state = APP_STOPPED;
2110  break;
2111  default:
2112  puts("Wrong option passed!");
2113  break;
2114  }
2115  if (APP_STOPPED == state)
2116  break;
2117  }
2118 
2119  get_xran_iq_content();
2120 
2121  puts("Closing l1 app... Ending all threads...");
2122  xran_close(xranHandle);
2123  MLogPrint(NULL);
2124 
2125  stop_xran();
2126  puts("Dump IQs...");
2127 
2128  if (startupConfiguration.iqswap == 1){
2129  for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
2130  printf("RX: Swap I and Q to match CPU format: [%d]\n",i);
2131  {
2132  /* swap I and Q */
2133  int32_t j;
2134  signed short *ptr = (signed short *) p_rx_log_buffer[i];
2135  signed short temp;
2136 
2137  for (j = 0; j < (int32_t)(rx_log_buffer_size[i]/sizeof(short)) ; j = j + 2){
2138  temp = ptr[j];
2139  ptr[j] = ptr[j + 1];
2140  ptr[j + 1] = temp;
2141  }
2142  }
2143  }
2144 
2145  if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.enableSrs){
2146  for(i = 0;
2147  i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);
2148  i++) {
2149  printf("SRS: Swap I and Q to match CPU format: [%d]\n",i);
2150  {
2151  /* swap I and Q */
2152  int32_t j;
2153  signed short *ptr = (signed short *) p_srs_log_buffer[i];
2154  signed short temp;
2155 
2156  for (j = 0; j < (int32_t)(srs_log_buffer_size[i]/sizeof(short)) ; j = j + 2){
2157  temp = ptr[j];
2158  ptr[j] = ptr[j + 1];
2159  ptr[j + 1] = temp;
2160  }
2161  }
2162  }
2163  }
2164  }
2165 
2166  if (startupConfiguration.nebyteorderswap == 1 && startupConfiguration.compression == 0) {
2167 
2168  for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
2169  printf("RX: Convert S16 I and S16 Q to cpu byte order from XRAN Ant: [%d]\n",i);
2170  for (j = 0; j < rx_log_buffer_size[i]/sizeof(short); j++){
2171  p_rx_log_buffer[i][j] = rte_be_to_cpu_16(p_rx_log_buffer[i][j]);
2172  }
2173  }
2174 
2175  if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.enableSrs){
2176  for(i = 0;
2177  i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);
2178  i++) {
2179  printf("SRS: Convert S16 I and S16 Q to cpu byte order from XRAN Ant: [%d]\n",i);
2180  for (j = 0; j < srs_log_buffer_size[i]/sizeof(short); j++){
2181  p_srs_log_buffer[i][j] = rte_be_to_cpu_16(p_srs_log_buffer[i][j]);
2182  }
2183  }
2184  }
2185  }
2186 
2187  for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
2188 
2189  sprintf(filename, "./logs/%s-rx_log_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
2190  sys_save_buf_to_file_txt(filename,
2191  "UL FFT OUT IQ Samples in human readable format",
2192  (uint8_t*) p_rx_log_buffer[i],
2193  rx_log_buffer_size[i],
2194  1);
2195 
2196  sprintf(filename, "./logs/%s-rx_log_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
2197  sys_save_buf_to_file(filename,
2198  "UL FFT OUT IQ Samples in binary format",
2199  (uint8_t*) p_rx_log_buffer[i],
2200  rx_log_buffer_size[i]/sizeof(short),
2201  sizeof(short));
2202  }
2203 
2204  if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.enableSrs){
2205  for(i = 0;
2206  i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);
2207  i++) {
2208  sprintf(filename, "./logs/%s-srs_log_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
2209  sys_save_buf_to_file_txt(filename,
2210  "SRS UL FFT OUT IQ Samples in human readable format",
2211  (uint8_t*) p_srs_log_buffer[i],
2212  srs_log_buffer_size[i],
2213  1);
2214 
2215  sprintf(filename, "./logs/%s-srs_log_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
2216  sys_save_buf_to_file(filename,
2217  "SRS UL FFT OUT IQ Samples in binary format",
2218  (uint8_t*) p_srs_log_buffer[i],
2219  srs_log_buffer_size[i]/sizeof(short),
2220  sizeof(short));
2221  }
2222  }
2223 
2224  if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.enablePrach){
2225  if (startupConfiguration.iqswap == 1){
2226  for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
2227  printf("PRACH: Swap I and Q to match CPU format: [%d]\n",i);
2228  {
2229  /* swap I and Q */
2230  int32_t j;
2231  signed short *ptr = (signed short *) p_prach_log_buffer[i];
2232  signed short temp;
2233 
2234  for (j = 0; j < (int32_t)(prach_log_buffer_size[i]/sizeof(short)) ; j = j + 2){
2235  temp = ptr[j];
2236  ptr[j] = ptr[j + 1];
2237  ptr[j + 1] = temp;
2238  }
2239  }
2240  }
2241  }
2242 
2243 
2244  if (startupConfiguration.nebyteorderswap == 1 && startupConfiguration.compression == 0){
2245  for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
2246  printf("PRACH: Convert S16 I and S16 Q to cpu byte order from XRAN Ant: [%d]\n",i);
2247  for (j = 0; j < prach_log_buffer_size[i]/sizeof(short); j++){
2248  p_prach_log_buffer[i][j] = rte_be_to_cpu_16(p_prach_log_buffer[i][j]);
2249  }
2250  }
2251  }
2252 
2253 
2254  for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {
2255 
2256  sprintf(filename, "./logs/%s-prach_log_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
2257  sys_save_buf_to_file_txt(filename,
2258  "PRACH FFT OUT IQ Samples in human readable format",
2259  (uint8_t*) p_prach_log_buffer[i],
2260  prach_log_buffer_size[i],
2261  1);
2262 
2263  sprintf(filename, "./logs/%s-prach_log_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);
2264  sys_save_buf_to_file(filename,
2265  "PRACH FFT OUT IQ Samples in binary format",
2266  (uint8_t*) p_prach_log_buffer[i],
2267  prach_log_buffer_size[i]/sizeof(short),
2268  sizeof(short));
2269  }
2270  }
2271 
2272  return 0;
2273 }
XRAN_BBDEV_NOT_USED
Definition: xran_fh_o_du.h:280
xran_get_common_counters
int32_t xran_get_common_counters(void *pXranLayerHandle, struct xran_common_counters *pStats)
Definition: xran_main.c:3074
_RuntimeConfig::enablePrach
uint8_t enablePrach
Definition: config.h:68
_RuntimeConfig::DynamicSectionEna
int32_t DynamicSectionEna
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int physide_ul_full_slot_call_back(void *param)
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Definition: xran_fh_o_du.h:130
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MAX_ANT_CARRIER_SUPPORTED
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phy_encoder_poll_fn bbdev_enc
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XRAN_MAX_ANT_ARRAY_ELM_NR
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Definition: xran_fh_o_du.h:118
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Definition: common.c:87
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XRAN_N_FE_BUF_LEN
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Definition: xran_main.c:2756
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Definition: common.h:31
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struct xran_flat_buffer sFHSrsRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT]
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struct xran_flat_buffer sFrontHaulTxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT]
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Definition: config.h:60
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int physide_ul_half_slot_call_back(void *param)
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int xranlib_decompress_avx512(const struct xranlib_decompress_request *request, struct xranlib_decompress_response *response)
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int iq_playback_buffer_size_dl
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enum xran_input_byte_order byteOrder
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struct xran_fh_config * pXranConf
Definition: sample-app.c:79
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xran_fh_init::totalBfWeights
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Definition: xran_fh_o_du.h:336
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Definition: xran_fh_o_du.h:422
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struct xran_prb_map PrbMapDl
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Definition: xran_fh_o_du.h:386
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Request structure containing pointer to data and its length.
Definition: xran_compression.h:59
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Definition: xran_fh_o_du.h:341
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Definition: xran_fh_o_du.h:110
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int32_t xran_get_slot_idx(uint32_t *nFrameIdx, uint32_t *nSubframeIdx, uint32_t *nSlotIdx, uint64_t *nSecond)
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Definition: config.h:86
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uint8_t * xran_add_hdr_offset(uint8_t *dst, int16_t compMethod)
Definition: xran_main.c:2741
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#define MLogAddVariables(x, y, z)
Definition: xran_mlog_lnx.h:49
XRAN_DIR_DL
Definition: xran_pkt.h:149
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Definition: config.h:80
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Definition: xran_fh_o_du.h:491
xran_compression.h
External API for compading with the use BFP algorithm.
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Definition: config.h:62
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Definition: xran_fh_o_du.h:372
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Definition: xran_fh_o_du.h:418
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struct xran_srs_config srs_conf
Definition: xran_fh_o_du.h:516
xran_fh_init::eAxCId_conf
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Definition: xran_fh_o_du.h:325
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Definition: xran_main.c:2841
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Definition: xran_fh_o_du.h:401
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Definition: xran_fh_o_du.h:316
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Definition: xran_fh_o_du.h:441
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Definition: config.h:97
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Definition: xran_fh_o_du.h:345
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Definition: xran_fh_o_du.h:338
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Definition: xran_fh_o_du.h:414
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phy_decoder_poll_fn bbdev_dec
Definition: xran_fh_o_du.h:521
XRAN_MAX_ANTENNA_NR
#define XRAN_MAX_ANTENNA_NR
Definition: xran_fh_o_du.h:111
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void stop_xran(void)
Definition: sample-app.c:1122
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int8_t * p_ext_section
Definition: xran_fh_o_du.h:371
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Definition: xran_compression.h:40
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int init_xran_iq_content(void)
Definition: sample-app.c:793
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int8_t * p_o_ru_addr
Definition: xran_fh_o_du.h:334
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#define XRAN_PORTS_NUM
Definition: xran_fh_o_du.h:108
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Definition: sample-app.c:162
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struct xran_cp_bf_weight bf_weight
Definition: xran_fh_o_du.h:405
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Definition: xran_fh_o_du.h:460
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enum xran_if_state xran_get_if_state(void)
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Definition: config.h:82
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Definition: xran_fh_o_du.h:300
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Definition: xran_fh_o_du.h:421
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Definition: config.h:99
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Definition: xran_fh_o_du.h:420
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Definition: xran_fh_o_du.h:329
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Definition: xran_compression.h:52
xran_fh_init::mtu
uint32_t mtu
Definition: xran_fh_o_du.h:331
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int physide_dl_tti_call_back(void *param)
Definition: sample-app.c:351
xran_flat_buffer::nNumberOfElements
uint32_t nNumberOfElements
Definition: xran_fh_o_du.h:560
_RuntimeConfig::nULBandwidth
uint32_t nULBandwidth
Definition: config.h:117
PRACH_PLAYBACK_BUFFER_BYTES
#define PRACH_PLAYBACK_BUFFER_BYTES
Definition: common.h:60
xran_ru_config::iqOrder
enum xran_input_i_q_order iqOrder
Definition: xran_fh_o_du.h:490
XRAN_UP_VF
Definition: xran_fh_o_du.h:256
xran_fh_init::T1a_max_cp_dl
uint16_t T1a_max_cp_dl
Definition: xran_fh_o_du.h:348
_RuntimeConfig::compression
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Definition: config.h:75
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int sys_load_file_to_buff(char *filename, char *bufname, unsigned char *pBuffer, unsigned int size, unsigned int buffers_num)
Definition: common.c:584
tx_dl_bfw_buffer_size
int32_t tx_dl_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED]
Definition: common.c:82
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uint32_t SULFreShift
Definition: sample-app.c:85
NS_PER_SEC
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struct xran_flat_buffer sFrontHaulRxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR]
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PID_GNB_PROC_TIMING
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Definition: xran_mlog_task_id.h:57
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Definition: config.h:53
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FPGA_TO_SW_PRACH_RX_BUFFER_LEN
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Definition: sample-app.c:52
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int32_t xran_5g_srs_req(void *pHandle, struct xran_buffer_list *pDstBuffer[XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_N_FE_BUF_LEN], xran_transport_callback_fn pCallback, void *pCallbackTag)
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#define PID_GNB_SYM_CB
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sys_save_buf_to_file_txt
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int32_t tx_srs_play_buffer_size[XRAN_MAX_SECTOR_NR *XRAN_MAX_ANT_ARRAY_ELM_NR]
Definition: common.c:59
XranLibConfig::nSectorNum
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uint8_t bit_bandSectorId
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long tx_counter
Definition: xran_common.c:118
xran_fh_config::nULCenterFreqARFCN
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uint8_t nPrachFilterIdx
Definition: xran_fh_o_du.h:443
xran_flat_buffer::nOffsetInBytes
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nFpgaToSW_PRACH_RxBufferLen
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Definition: sample-app.c:72
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void sys_save_buf_to_file(char *filename, char *bufname, unsigned char *pBuffer, unsigned int size, unsigned int buffers_num)
Definition: common.c:550
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Definition: xran_fh_o_du.h:204
xran_5g_prach_req
int32_t xran_5g_prach_req(void *pHandle, struct xran_buffer_list *pDstBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN], xran_transport_callback_fn pCallback, void *pCallbackTag)
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Definition: xran_fh_o_du.h:479
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uint32_t SULFlag
Definition: sample-app.c:86
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struct xran_flat_buffer sFHPrachRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT]
Definition: sample-app.c:155
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#define NUM_OF_SUBFRAME_PER_FRAME
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Definition: config.h:36
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This file provides interface to synchronization related APIs (PTP/1588) for XRAN. ...
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uint16_t app_xran_get_num_rbs(uint32_t nNumerology, uint32_t nBandwidth, uint32_t nAbsFrePointA)
Definition: common.c:213
rx_bytes_per_sec
long rx_bytes_per_sec
Definition: xran_common.c:122
xran_fh_init::Ta3_max
uint16_t Ta3_max
Definition: xran_fh_o_du.h:346
_RuntimeConfig::T1a_max_up
uint16_t T1a_max_up
Definition: config.h:98
xran_fh_init::T2a_min_cp_dl
uint16_t T2a_min_cp_dl
Definition: xran_fh_o_du.h:339
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int16_t * p_tx_ul_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED]
Definition: common.c:86
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int16_t iqWidth
Definition: xran_compression.h:41
nSW_ToFpga_FTH_TxBufferLen
uint32_t nSW_ToFpga_FTH_TxBufferLen
Definition: sample-app.c:73
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#define MAX_BBU_POOL_CORE_MASK
Definition: sample-app.c:46
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uint64_t Total_msgs_rcvd
Definition: xran_fh_o_du.h:535
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Definition: common.c:50
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Definition: config.h:90
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Definition: xran_fh_o_du.h:533
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Definition: xran_fh_o_du.h:497
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void * pCtrl
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uint16_t symbMask
Definition: xran_fh_o_du.h:448
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int timer_set_tsc_freq_from_clock(void)
Definition: sample-app.c:323
xran_fh_init::up_vlan_tag
uint8_t up_vlan_tag
Definition: xran_fh_o_du.h:360
xran_fh_init::T2a_max_cp_dl
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Definition: xran_fh_o_du.h:340
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Definition: xran_fh_o_du.h:566
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struct xran_flat_buffer * pBuffers
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#define SW_FPGA_FH_TOTAL_BUFFER_LEN
Definition: sample-app.c:51
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Definition: xran_compression.h:62
xran_cp_bf_weight::nAntElmTRx
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Definition: xran_fh_o_du.h:370
XRAN_CPU_LE_BYTE_ORDER
Definition: xran_fh_o_du.h:473
BbuXranIoIfStruct::nInstanceHandle
void * nInstanceHandle[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR]
Definition: sample-app.c:160
xran_fh_init::T2a_min_up
uint16_t T2a_min_up
Definition: xran_fh_o_du.h:343
xranlib_decompress_request::len
int32_t len
Definition: xran_compression.h:65
app_xran_cal_nrarfcn
uint32_t app_xran_cal_nrarfcn(uint32_t nCenterFreq)
Definition: common.c:338
xran_bm_allocate_buffer
int32_t xran_bm_allocate_buffer(void *pHandle, uint32_t nPoolIndex, void **ppData, void **ppCtrl)
Definition: xran_main.c:2499
MAX_ANT_CARRIER_SUPPORTED_CAT_B
#define MAX_ANT_CARRIER_SUPPORTED_CAT_B
Definition: common.h:52
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int16_t * p_srs_log_buffer[XRAN_MAX_SECTOR_NR *XRAN_MAX_ANT_ARRAY_ELM_NR]
Definition: common.c:70
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struct xran_prach_config prach_conf
Definition: xran_fh_o_du.h:515
_RuntimeConfig::nDLAbsFrePointA
uint32_t nDLAbsFrePointA
Definition: config.h:114
xran_prb_elm::bf_weight_update
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Definition: xran_fh_o_du.h:399
_RuntimeConfig::totalBfWeights
uint16_t totalBfWeights
Definition: config.h:77
BbuXranIoIfStruct::sFHSrsRxBbuIoBufCtrl
BbuIoBufCtrlStruct sFHSrsRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR]
Definition: sample-app.c:148
xran_frame_config::nNumerology
uint8_t nNumerology
Definition: xran_fh_o_du.h:461
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#define MLogPrint(a)
Definition: xran_mlog_lnx.h:36
_RuntimeConfig::T1a_max_cp_ul
uint16_t T1a_max_cp_ul
Definition: config.h:96
FPGAPhaseCompCfg::rsv
uint32_t rsv
Definition: sample-app.c:87
xran_prb_elm::compMethod
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Definition: xran_fh_o_du.h:400
num_eAxc
uint8_t num_eAxc
Definition: common.c:47
xran_fh_config::neAxcUl
uint32_t neAxcUl
Definition: xran_fh_o_du.h:502
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enum xran_category xranCat
Definition: xran_fh_o_du.h:484
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int32_t xran_stop(void *pHandle)
Definition: xran_main.c:2852
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struct xran_slot_config sSlotConfig[XRAN_MAX_TDD_PERIODICITY]
Definition: xran_fh_o_du.h:465
XRAN_NE_BE_BYTE_ORDER
Definition: xran_fh_o_du.h:472
xran_malloc
void * xran_malloc(size_t buf_len)
Definition: xran_main.c:2736
xran_fh_init::T2a_max_cp_ul
uint16_t T2a_max_cp_ul
Definition: xran_fh_o_du.h:342
_RuntimeConfig::debugStop
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Definition: config.h:106
xran_section_desc::iq_buffer_offset
int16_t iq_buffer_offset
Definition: xran_fh_o_du.h:385
iq_playback_buffer_size_ul
int iq_playback_buffer_size_ul
Definition: common.c:37
xran_prb_elm::nStartSymb
int16_t nStartSymb
Definition: xran_fh_o_du.h:396
prach_log_buffer_size
int32_t prach_log_buffer_size[MAX_ANT_CARRIER_SUPPORTED]
Definition: common.c:67
xran_buffer_list
Definition: xran_fh_o_du.h:592
BbuXranIoIfStruct::sFrontHaulRxBuffers
struct xran_flat_buffer sFrontHaulRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT]
Definition: sample-app.c:153
SWXRANInterfaceTypeEnum
SWXRANInterfaceTypeEnum
Definition: sample-app.c:101
_RuntimeConfig::Ta4_max
uint16_t Ta4_max
Definition: config.h:100
BbuXranIoIfStruct::nDriverCoreId
uint8_t nDriverCoreId
Definition: sample-app.c:135
_RuntimeConfig::T2a_min_up
uint16_t T2a_min_up
Definition: config.h:89
xran_prb_map::band_id
uint16_t band_id
Definition: xran_fh_o_du.h:417
_RuntimeConfig::debugStopCount
int32_t debugStopCount
Definition: config.h:107
xran_fh_config::ru_conf
struct xran_ru_config ru_conf
Definition: xran_fh_o_du.h:518
N_MAX_BUFFER_SEGMENT
#define N_MAX_BUFFER_SEGMENT
Definition: sample-app.c:57
tx_play_buffer_position
int32_t tx_play_buffer_position[MAX_ANT_CARRIER_SUPPORTED]
Definition: common.c:52
xran_fh_init::cp_vlan_tag
uint8_t cp_vlan_tag
Definition: xran_fh_o_du.h:359
xran_prb_elm::p_sec_desc
struct xran_section_desc * p_sec_desc[XRAN_NUM_OF_SYMBOL_PER_SLOT]
Definition: xran_fh_o_du.h:404
xranlib_decompress_request::iqWidth
int16_t iqWidth
Definition: xran_compression.h:63
xran_prb_elm::BeamFormingType
int16_t BeamFormingType
Definition: xran_fh_o_du.h:402
XRAN_STOPPED
Definition: xran_fh_o_du.h:193
_RuntimeConfig::numUlAxc
uint8_t numUlAxc
Definition: config.h:40
tx_bytes_per_sec
long tx_bytes_per_sec
Definition: xran_common.c:121
xranHandle
void * xranHandle
Definition: sample-app.c:76
XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT
#define XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT
Definition: xran_fh_o_du.h:123
_RuntimeConfig::T1a_min_cp_ul
uint16_t T1a_min_cp_ul
Definition: config.h:95
state
enum app_state state
Definition: sample-app.c:62
XRAN_NUM_OF_SYMBOL_PER_SLOT
#define XRAN_NUM_OF_SYMBOL_PER_SLOT
Definition: xran_fh_o_du.h:122
xran_cp_populate_section_ext_1
int32_t xran_cp_populate_section_ext_1(int8_t *p_ext1_dst, uint16_t ext1_dst_len, int16_t *p_bfw_iq_src, uint16_t rbNumber, uint16_t bfwNumber, uint8_t bfwiqWidth, uint8_t bfwCompMeth)
Definition: xran_cp_api.c:387
xranlib_compress_response
Response structure containing pointer to data and its length.
Definition: xran_compression.h:49
xran_fh_init::DynamicSectionEna
int32_t DynamicSectionEna
Definition: xran_fh_o_du.h:363
_RuntimeConfig::ul_bfw_file
char ul_bfw_file[XRAN_MAX_SECTOR_NR *XRAN_MAX_ANTENNA_NR][512]
Definition: config.h:63
tx_prach_play_buffer_position
int32_t tx_prach_play_buffer_position[MAX_ANT_CARRIER_SUPPORTED]
Definition: common.c:56
p_tx_dl_bfw_buffer
int16_t * p_tx_dl_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED]
Definition: common.c:81
XranLibConfig::nFhBufIntFlag
uint32_t nFhBufIntFlag
Definition: sample-app.c:95
numCCPorts
uint8_t numCCPorts
Definition: common.c:44
xran_fh_init::GPS_Alpha
int32_t GPS_Alpha
Definition: xran_fh_o_du.h:364
xran_is_synchronized
int xran_is_synchronized(void)
Function checks if machine is synchronized using PTP for Linux software.
Definition: xran_sync_api.c:113
iAssert
#define iAssert(p)
Definition: common.h:67
_RuntimeConfig::T1a_min_cp_dl
uint16_t T1a_min_cp_dl
Definition: config.h:93
xran_fh_config::neAxc
uint32_t neAxc
Definition: xran_fh_o_du.h:501
app_state
app_state
Definition: common.h:36
xran_io_cfg::dpdk_dev
char * dpdk_dev[XRAN_VF_MAX]
Definition: xran_fh_o_du.h:296
_RuntimeConfig::GPS_Alpha
int32_t GPS_Alpha
Definition: config.h:110
xran_fh_o_du.h
This file provides public interface to xRAN Front Haul layer implementation as defined in the ORAN-WG...
srs_log_buffer_position
int32_t srs_log_buffer_position[XRAN_MAX_SECTOR_NR *XRAN_MAX_ANT_ARRAY_ELM_NR]
Definition: common.c:72
xran_mlog_lnx.h
xran_io_cfg::pkt_proc_core
int32_t pkt_proc_core
Definition: xran_fh_o_du.h:301
xran_sector_get_instances
int32_t xran_sector_get_instances(void *pHandle, uint16_t nNumInstances, xran_cc_handle_t *pSectorInstanceHandles)
Definition: xran_main.c:2408
xran_eaxcid_config::mask_cuPortId
uint16_t mask_cuPortId
Definition: xran_fh_o_du.h:309
iq_srs_buffer_size_ul
int iq_srs_buffer_size_ul
Definition: common.c:42
_RuntimeConfig::nFrameDuplexType
uint8_t nFrameDuplexType
Definition: config.h:122
BbuIoBufCtrlStruct::sBufferList
struct xran_buffer_list sBufferList
Definition: sample-app.c:129
_RuntimeConfig::numCC
uint8_t numCC
Definition: config.h:38
xran_fh_init::T1a_min_cp_dl
uint16_t T1a_min_cp_dl
Definition: xran_fh_o_du.h:347
_RuntimeConfig::nTddPeriod
uint8_t nTddPeriod
Definition: config.h:123
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int16_t * p_tx_prach_play_buffer[MAX_ANT_CARRIER_SUPPORTED]
Definition: common.c:54
_RuntimeConfig::ant_file
char ant_file[XRAN_MAX_SECTOR_NR *XRAN_MAX_ANTENNA_NR][512]
Definition: config.h:59
_RuntimeConfig::T2a_min_cp_dl
uint16_t T2a_min_cp_dl
Definition: config.h:85
xran_frame_config::nTddPeriod
uint8_t nTddPeriod
Definition: xran_fh_o_du.h:464
MLogGetFileLocation
#define MLogGetFileLocation()
Definition: xran_mlog_lnx.h:37
_RuntimeConfig::mu_number
uint8_t mu_number
Definition: config.h:113
xran_fh_rx_srs_callback
void xran_fh_rx_srs_callback(void *pCallbackTag, xran_status_t status)
Definition: sample-app.c:261
xran_fh_init::T1a_max_cp_ul
uint16_t T1a_max_cp_ul
Definition: xran_fh_o_du.h:350
XRAN_COMPMETHOD_BLKFLOAT
Definition: xran_fh_o_du.h:205
xran_flat_buffer
Definition: xran_fh_o_du.h:553
_RuntimeConfig::numAxc
uint8_t numAxc
Definition: config.h:39
xran_fh_config::nCC
uint32_t nCC
Definition: xran_fh_o_du.h:500
xran_ru_config::fftSize
uint8_t fftSize
Definition: xran_fh_o_du.h:488
xran_fh_rx_prach_callback
void xran_fh_rx_prach_callback(void *pCallbackTag, int32_t status)
Definition: sample-app.c:246
_RuntimeConfig::numSlots
int numSlots
Definition: config.h:58
_RuntimeConfig::io_core
uint32_t io_core
Definition: config.h:54
MLogTask
#define MLogTask(w, x, y)
Definition: xran_mlog_lnx.h:44
xran_fh_init::T1a_min_cp_ul
uint16_t T1a_min_cp_ul
Definition: xran_fh_o_du.h:349
_RuntimeConfig::nULFftSize
uint32_t nULFftSize
Definition: config.h:119
xran_fh_init::T2a_max_up
uint16_t T2a_max_up
Definition: xran_fh_o_du.h:344
_RuntimeConfig::antElmTRx
uint32_t antElmTRx
Definition: config.h:41
BbuXranIoIfStruct::sFrontHaulRxPrbMapBbuIoBufCtrl
BbuIoBufCtrlStruct sFrontHaulRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR]
Definition: sample-app.c:144
MLogAddTestCase
#define MLogAddTestCase(a, b)
Definition: xran_mlog_lnx.h:52
xran_common_counters::Rx_early
uint64_t Rx_early
Definition: xran_fh_o_du.h:531
xran_ru_config::iqWidth
uint8_t iqWidth
Definition: xran_fh_o_du.h:486
XRAN_FILTERINDEX_PRACH_ABC
Definition: xran_cp_api.h:69
xranlib_decompress_request::numRBs
int16_t numRBs
Definition: xran_compression.h:61
XRAN_BEAM_WEIGHT
Definition: xran_fh_o_du.h:273
_RuntimeConfig::T1a_max_cp_dl
uint16_t T1a_max_cp_dl
Definition: config.h:94
xran_section_desc::pData
uint8_t * pData
Definition: xran_fh_o_du.h:388
version_print
void version_print(void)
Definition: sample-app.c:1297
rx_log_buffer_position
int32_t rx_log_buffer_position[MAX_ANT_CARRIER_SUPPORTED]
Definition: common.c:64
XranLibConfig::pFthInstanceHandles
void * pFthInstanceHandles
Definition: sample-app.c:99
_RuntimeConfig::enableSrs
uint8_t enableSrs
Definition: config.h:79
iq_bfw_buffer_size_dl
int iq_bfw_buffer_size_dl
Definition: common.c:39
xran_prb_map::prbMap
struct xran_prb_elm prbMap[XRAN_MAX_PRBS]
Definition: xran_fh_o_du.h:423
BbuXranIoIfStruct::sFrontHaulTxBbuIoBufCtrl
BbuIoBufCtrlStruct sFrontHaulTxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR]
Definition: sample-app.c:141
xranlib_decompress_request::data_in
int8_t * data_in
Definition: xran_compression.h:60
timer_get_ticks
unsigned long timer_get_ticks(void)
Definition: sample-app.c:289
BbuXranIoIfStruct::sFrontHaulTxPrbMapBbuIoBufCtrl
BbuIoBufCtrlStruct sFrontHaulTxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR]
Definition: sample-app.c:142
BbuXranIoIfStruct::bbuio_buf_pool
struct rte_mempool * bbuio_buf_pool
Definition: sample-app.c:138
xran_prach_config::nPrachConfIdx
uint8_t nPrachConfIdx
Definition: xran_fh_o_du.h:432
xranConf
struct xran_fh_config xranConf
Definition: sample-app.c:78
tick_per_usec
uint64_t tick_per_usec
Definition: sample-app.c:64
xran_eaxcid_config::mask_ruPortId
uint16_t mask_ruPortId
Definition: xran_fh_o_du.h:312
xran_get_time_stats
uint32_t xran_get_time_stats(uint64_t *total_time, uint64_t *used_time, uint32_t *core_used, uint32_t clear)
Definition: xran_main.c:2721
XRAN_DIR_UL
Definition: xran_pkt.h:148
xran_fh_init
Definition: xran_fh_o_du.h:323
xranlib_compress_response::data_out
int8_t * data_out
Definition: xran_compression.h:50
tx_ul_bfw_buffer_position
int32_t tx_ul_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED]
Definition: common.c:88
tx_play_buffer_size
int32_t tx_play_buffer_size[MAX_ANT_CARRIER_SUPPORTED]
Definition: common.c:51
srs_log_buffer_size
int32_t srs_log_buffer_size[XRAN_MAX_SECTOR_NR *XRAN_MAX_ANT_ARRAY_ELM_NR]
Definition: common.c:71
N_SYM_PER_SLOT
#define N_SYM_PER_SLOT
Definition: common.h:50
MLogGetFileSize
#define MLogGetFileSize()
Definition: xran_mlog_lnx.h:38
xran_cp_api.h
This file provides the definitions for Control Plane Messages APIs.
_RuntimeConfig::PrbMapUl
struct xran_prb_map PrbMapUl
Definition: config.h:126
BbuXranIoIfStruct::nBufPoolIndex
uint32_t nBufPoolIndex[XRAN_MAX_SECTOR_NR][MAX_SW_XRAN_INTERFACE_NUM]
Definition: sample-app.c:161
APP_O_RU
#define APP_O_RU
Definition: common.h:34
MLogTick
#define MLogTick()
Definition: xran_mlog_lnx.h:42
xran_io_cfg::bbdev_mode
int32_t bbdev_mode
Definition: xran_fh_o_du.h:298
xran_eaxcid_config::mask_ccId
uint16_t mask_ccId
Definition: xran_fh_o_du.h:311
FPGAPhaseCompCfg::NRARFCN
uint32_t NRARFCN
Definition: sample-app.c:84
_RuntimeConfig::nULAbsFrePointA
uint32_t nULAbsFrePointA
Definition: config.h:115
rx_bytes_counter
long rx_bytes_counter
Definition: xran_common.c:120
p_prach_log_buffer
int16_t * p_prach_log_buffer[MAX_ANT_CARRIER_SUPPORTED]
Definition: common.c:66
_RuntimeConfig::ul_srs_file
char ul_srs_file[XRAN_MAX_SECTOR_NR *XRAN_MAX_ANT_ARRAY_ELM_NR][512]
Definition: config.h:65
xran_fh_config::nDLCenterFreqARFCN
uint32_t nDLCenterFreqARFCN
Definition: xran_fh_o_du.h:510
xran_prb_elm::numSymb
int16_t numSymb
Definition: xran_fh_o_du.h:397
PID_GNB_SRS_CB
#define PID_GNB_SRS_CB
Definition: xran_mlog_task_id.h:61
XRAN_INIT
Definition: xran_fh_o_du.h:191
xran_reg_physide_cb
int32_t xran_reg_physide_cb(void *pHandle, xran_fh_tti_callback_fn Cb, void *cbParam, int skipTtiNum, enum callback_to_phy_id)
Definition: xran_main.c:2900
XRAN_I_Q_ORDER
Definition: xran_fh_o_du.h:478
xranlib_decompress_response
Response structure containing pointer to data and its length.
Definition: xran_compression.h:72
tx_bytes_counter
long tx_bytes_counter
Definition: xran_common.c:119
_RuntimeConfig::sSlotConfig
struct xran_slot_config sSlotConfig[XRAN_MAX_TDD_PERIODICITY]
Definition: config.h:124
p_tx_srs_play_buffer
int16_t * p_tx_srs_play_buffer[XRAN_MAX_SECTOR_NR *XRAN_MAX_ANT_ARRAY_ELM_NR]
Definition: common.c:58
xran_5g_fronthault_config
int32_t xran_5g_fronthault_config(void *pHandle, struct xran_buffer_list *pSrcBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN], struct xran_buffer_list *pSrcCpBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN], struct xran_buffer_list *pDstBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN], struct xran_buffer_list *pDstCpBuffer[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN], xran_transport_callback_fn pCallback, void *pCallbackTag)
Definition: xran_main.c:2551
nFpgaToSW_FTH_RxBufferLen
uint32_t nFpgaToSW_FTH_RxBufferLen
Definition: sample-app.c:71
xran_prach_config::nPrachSubcSpacing
uint8_t nPrachSubcSpacing
Definition: xran_fh_o_du.h:433
xran_fh_init::p_o_du_addr
int8_t * p_o_du_addr
Definition: xran_fh_o_du.h:333
_RuntimeConfig::enableCP
uint8_t enableCP
Definition: config.h:102
xran_status_t
int32_t xran_status_t
Definition: xran_fh_o_du.h:236
xran_common_counters::Rx_on_time
uint64_t Rx_on_time
Definition: xran_fh_o_du.h:530
FPGAPhaseCompCfg::phaseFlag
uint32_t phaseFlag
Definition: sample-app.c:83
_RuntimeConfig::Ta3_min
uint16_t Ta3_min
Definition: config.h:91
xran_flat_buffer::nElementLenInBytes
uint32_t nElementLenInBytes
Definition: xran_fh_o_du.h:555
_RuntimeConfig::GPS_Beta
int32_t GPS_Beta
Definition: config.h:111
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