1. Update Dockerfile for CI build. But there is dependency on Intel System Studio...
[o-du/phy.git] / fhi_lib / app / src / sample-app.c
1 /******************************************************************************\r
2 *\r
3 *   Copyright (c) 2019 Intel.\r
4 *\r
5 *   Licensed under the Apache License, Version 2.0 (the "License");\r
6 *   you may not use this file except in compliance with the License.\r
7 *   You may obtain a copy of the License at\r
8 *\r
9 *       http://www.apache.org/licenses/LICENSE-2.0\r
10 *\r
11 *   Unless required by applicable law or agreed to in writing, software\r
12 *   distributed under the License is distributed on an "AS IS" BASIS,\r
13 *   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
14 *   See the License for the specific language governing permissions and\r
15 *   limitations under the License.\r
16 *\r
17 *******************************************************************************/\r
18 \r
19 #define _GNU_SOURCE\r
20 #include <unistd.h>\r
21 #include <sys/syscall.h>\r
22 #include <sched.h>\r
23 #include <assert.h>\r
24 #include <err.h>\r
25 #include <libgen.h>\r
26 #include <sys/time.h>\r
27 #include <time.h>\r
28 #include <unistd.h>\r
29 #include <stdio.h>\r
30 #include <fcntl.h>\r
31 #include <pthread.h>\r
32 #include <sys/stat.h>\r
33 #include <unistd.h>\r
34 \r
35 #include "common.h"\r
36 #include "config.h"\r
37 #include "xran_mlog_lnx.h"\r
38 \r
39 #include "xran_fh_o_du.h"\r
40 #include "xran_compression.h"\r
41 #include "xran_cp_api.h"\r
42 #include "xran_sync_api.h"\r
43 #include "xran_mlog_task_id.h"\r
44 \r
45 #define MAX_BBU_POOL_CORE_MASK  (4)\r
46 \r
47 \r
48 #define SW_FPGA_TOTAL_BUFFER_LEN 4*1024*1024*1024\r
49 #define SW_FPGA_SEGMENT_BUFFER_LEN 1*1024*1024*1024\r
50 #define SW_FPGA_FH_TOTAL_BUFFER_LEN 1*1024*1024*1024\r
51 #define FPGA_TO_SW_PRACH_RX_BUFFER_LEN   (8192)\r
52 \r
53 #define NSEC_PER_SEC 1000000000\r
54 \r
55 #define MAX_PKT_BURST (448+4) // 4x14x8\r
56 #define N_MAX_BUFFER_SEGMENT MAX_PKT_BURST\r
57 \r
58 #define MAIN_PRIORITY 98\r
59 #define NUM_OF_SUBFRAME_PER_FRAME (10)\r
60 \r
61 enum app_state state;\r
62 \r
63 uint64_t  tick_per_usec;\r
64 static volatile uint64_t timer_last_irq_tick = 0;\r
65 static uint64_t tsc_resolution_hz = 0;\r
66 \r
67 RuntimeConfig startupConfiguration = {0};\r
68 \r
69 /* buffers size */\r
70 uint32_t    nFpgaToSW_FTH_RxBufferLen;\r
71 uint32_t    nFpgaToSW_PRACH_RxBufferLen;\r
72 uint32_t    nSW_ToFpga_FTH_TxBufferLen;\r
73 \r
74 static struct xran_fh_init xranInit;\r
75 void * xranHandle = NULL;\r
76 \r
77 struct xran_fh_config  xranConf;\r
78 struct xran_fh_config  *pXranConf = NULL;\r
79 \r
80 typedef struct\r
81 {\r
82     uint32_t phaseFlag   :1;\r
83     uint32_t NRARFCN     :22;\r
84     uint32_t SULFreShift :1;\r
85     uint32_t SULFlag     :1;\r
86     uint32_t rsv         :7;\r
87 }FPGAPhaseCompCfg;\r
88 \r
89 typedef struct XranLibConfig\r
90 {\r
91     uint32_t nDriverCoreId;\r
92     uint32_t nTimingAdvance;\r
93     uint32_t nFhConfig;\r
94     uint32_t nFhBufIntFlag;\r
95     uint32_t nSectorNum;\r
96     uint32_t nNrOfSlotInSf;\r
97     uint32_t nNrofSfInFrame;\r
98     void *   pFthInstanceHandles;\r
99 }XranLibConfigStruct;\r
100 typedef enum {\r
101     XRANFTHTX_OUT = 0,\r
102     XRANFTHTX_PRB_MAP_OUT,\r
103     XRANFTHTX_SEC_DESC_OUT,\r
104     XRANFTHRX_IN,\r
105     XRANFTHRX_PRB_MAP_IN,\r
106     XRANFTHTX_SEC_DESC_IN,\r
107     XRANFTHRACH_IN,\r
108     XRANSRS_IN,\r
109     MAX_SW_XRAN_INTERFACE_NUM\r
110 }SWXRANInterfaceTypeEnum;\r
111 \r
112 /*\r
113  * manage one cell's all Ethernet frames for one DL or UL LTE subframe\r
114  */\r
115 typedef struct {\r
116     /* -1-this subframe is not used in current frame format\r
117          0-this subframe can be transmitted, i.e., data is ready\r
118           1-this subframe is waiting transmission, i.e., data is not ready\r
119          10 - DL transmission missing deadline. When FE needs this subframe data but bValid is still 1,\r
120         set bValid to 10.\r
121     */\r
122     int32_t bValid ; // when UL rx, it is subframe index.\r
123     int32_t nSegToBeGen;\r
124     int32_t nSegGenerated; // how many date segment are generated by DL LTE processing or received from FE\r
125                        // -1 means that DL packet to be transmitted is not ready in BS\r
126     int32_t nSegTransferred; // number of data segments has been transmitted or received\r
127     struct rte_mbuf *pData[N_MAX_BUFFER_SEGMENT]; // point to DPDK allocated memory pool\r
128     struct xran_buffer_list sBufferList;\r
129 } BbuIoBufCtrlStruct;\r
130 \r
131 typedef struct  {\r
132     uint64_t nCoreMask;\r
133     int16_t cpuSocketId;\r
134     uint8_t nDriverCoreId;\r
135     uint8_t nFHCoreId;\r
136 \r
137     struct rte_mempool *bbuio_buf_pool;\r
138 \r
139     /* io struct */\r
140     BbuIoBufCtrlStruct sFrontHaulTxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
141     BbuIoBufCtrlStruct sFrontHaulTxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
142     BbuIoBufCtrlStruct sFrontHaulRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
143     BbuIoBufCtrlStruct sFrontHaulRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
144     BbuIoBufCtrlStruct sFHPrachRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
145 \r
146     /* Cat B */\r
147     BbuIoBufCtrlStruct sFHSrsRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR];\r
148 \r
149     /* buffers lists */\r
150     struct xran_flat_buffer sFrontHaulTxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];\r
151     struct xran_flat_buffer sFrontHaulTxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
152     struct xran_flat_buffer sFrontHaulRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];\r
153     struct xran_flat_buffer sFrontHaulRxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];\r
154     struct xran_flat_buffer sFHPrachRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];\r
155 \r
156     /* Cat B SRS buffers */\r
157     struct xran_flat_buffer sFHSrsRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT];\r
158 \r
159     void*    nInstanceHandle[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR]; // instance per sector\r
160     uint32_t nBufPoolIndex[XRAN_MAX_SECTOR_NR][MAX_SW_XRAN_INTERFACE_NUM];   // every api owns unique buffer pool\r
161     uint16_t nInstanceNum;\r
162 \r
163     uint64_t nTscTiming[XRAN_N_FE_BUF_LEN]; // records the TSC when a timing packet is received.\r
164 } BbuXranIoIfStruct;\r
165 \r
166 static BbuXranIoIfStruct    gsXranIoIf;\r
167 static XranLibConfigStruct *gpXranLibConfig = NULL;\r
168 \r
169 extern long rx_counter;\r
170 extern long tx_counter;\r
171 extern long tx_bytes_counter;\r
172 extern long rx_bytes_counter;\r
173 extern long tx_bytes_per_sec;\r
174 extern long rx_bytes_per_sec;\r
175 long old_rx_counter = 0;\r
176 long old_tx_counter = 0;\r
177 \r
178 \r
179 \r
180 #define CPU_HZ tick_per_usec //us\r
181 \r
182 /* Application User space functions */\r
183 void xran_fh_rx_callback(void *pCallbackTag, int32_t status);\r
184 void xran_fh_rx_prach_callback(void *pCallbackTag, int32_t status);\r
185 \r
186 static BbuXranIoIfStruct *xran_get_ctx(void)\r
187 {\r
188     return &gsXranIoIf;\r
189 }\r
190 \r
191 static void print_menu()\r
192 {\r
193     puts("+---------------------------------------+");\r
194     puts("| Press 1 to start 5G NR XRAN traffic   |");\r
195     puts("| Press 2 reserved for future use       |");\r
196     puts("| Press 3 to quit                       |");\r
197     puts("+---------------------------------------+");\r
198 }\r
199 \r
200 static int32_t get_xran_sfidx(uint8_t nNrOfSlotInSf)\r
201 {\r
202     int32_t nSfIdx = -1;\r
203     uint32_t nFrameIdx;\r
204     uint32_t nSubframeIdx;\r
205     uint32_t nSlotIdx;\r
206     uint64_t nSecond;\r
207 \r
208     uint32_t nXranTime  = xran_get_slot_idx(&nFrameIdx, &nSubframeIdx, &nSlotIdx, &nSecond);\r
209     nSfIdx = nFrameIdx*NUM_OF_SUBFRAME_PER_FRAME*nNrOfSlotInSf\r
210         + nSubframeIdx*nNrOfSlotInSf\r
211         + nSlotIdx;\r
212 #if 0\r
213     printf("\nxranTime is %d, return is %d, radio frame is %d, subframe is %d slot is %d tsc is %llu us",\r
214         nXranTime,\r
215         nSfIdx,\r
216         nFrameIdx,\r
217         nSubframeIdx,\r
218         nSlotIdx,\r
219         __rdtsc()/CPU_HZ);\r
220 #endif\r
221 \r
222     return nSfIdx;\r
223 }\r
224 \r
225 void xran_fh_rx_callback(void *pCallbackTag, xran_status_t status)\r
226 {\r
227     uint64_t t1 = MLogTick();\r
228     uint32_t mlogVar[10];\r
229     uint32_t mlogVarCnt = 0;\r
230     uint8_t Numerlogy = xranConf.frame_conf.nNumerology;\r
231     uint8_t nNrOfSlotInSf = 1<<Numerlogy;\r
232     int32_t sfIdx = get_xran_sfidx(nNrOfSlotInSf);\r
233 \r
234     mlogVar[mlogVarCnt++] = 0xCCCCCCCC;\r
235     mlogVar[mlogVarCnt++] = status >> 16; /* tti */\r
236     mlogVar[mlogVarCnt++] = status & 0xFF; /* sym */\r
237     mlogVar[mlogVarCnt++] = (uint32_t)sfIdx;\r
238     MLogAddVariables(mlogVarCnt, mlogVar, MLogTick());\r
239     rte_pause();\r
240 \r
241     MLogTask(PID_GNB_SYM_CB, t1, MLogTick());\r
242     return;\r
243 }\r
244 \r
245 void xran_fh_rx_prach_callback(void *pCallbackTag, xran_status_t status)\r
246 {\r
247     uint64_t t1 = MLogTick();\r
248     uint32_t mlogVar[10];\r
249     uint32_t mlogVarCnt = 0;\r
250 \r
251     mlogVar[mlogVarCnt++] = 0xDDDDDDDD;\r
252     mlogVar[mlogVarCnt++] = status >> 16; /* tti */\r
253     mlogVar[mlogVarCnt++] = status & 0xFF; /* sym */\r
254     MLogAddVariables(mlogVarCnt, mlogVar, MLogTick());\r
255     rte_pause();\r
256 \r
257     MLogTask(PID_GNB_PRACH_CB, t1, MLogTick());\r
258 }\r
259 \r
260 void xran_fh_rx_srs_callback(void *pCallbackTag, xran_status_t status)\r
261 {\r
262     uint64_t t1 = MLogTick();\r
263     uint32_t mlogVar[10];\r
264     uint32_t mlogVarCnt = 0;\r
265 \r
266     mlogVar[mlogVarCnt++] = 0xCCCCCCCC;\r
267     mlogVar[mlogVarCnt++] = status >> 16; /* tti */\r
268     mlogVar[mlogVarCnt++] = status & 0xFF; /* sym */\r
269     MLogAddVariables(mlogVarCnt, mlogVar, MLogTick());\r
270     rte_pause();\r
271 \r
272     MLogTask(PID_GNB_SRS_CB, t1, MLogTick());\r
273 }\r
274 \r
275 \r
276 //-------------------------------------------------------------------------------------------\r
277 /** @ingroup group_nbiot_source_auxlib_timer\r
278  *\r
279  *  @param   void\r
280  *\r
281  *  @return  Ticks\r
282  *\r
283  *  @description\r
284  *  This function reads the rtdsc clock and returns the current value in there.\r
285  *\r
286 **/\r
287 //-------------------------------------------------------------------------------------------\r
288 unsigned long timer_get_ticks(void)\r
289 {\r
290     unsigned long ret;\r
291     union\r
292     {\r
293         unsigned long tsc_64;\r
294         struct\r
295         {\r
296             uint32_t lo_32;\r
297             uint32_t hi_32;\r
298         };\r
299     } tsc;\r
300 \r
301     __asm volatile("rdtsc" :\r
302              "=a" (tsc.lo_32),\r
303              "=d" (tsc.hi_32));\r
304 \r
305      ret = ((unsigned long)tsc.tsc_64);\r
306      return ret;\r
307 }\r
308 \r
309 //-------------------------------------------------------------------------------------------\r
310 /** @ingroup group_lte_source_auxlib_timer\r
311  *\r
312  *  @param   void\r
313  *\r
314  *  @return  0 if SUCCESS\r
315  *\r
316  *  @description\r
317  *  This function gets the clock speed of the core and figures out number of ticks per usec.\r
318  *  It is used by l1app and testmac applications to initialize the mlog utility\r
319  *\r
320 **/\r
321 //-------------------------------------------------------------------------------------------\r
322 int timer_set_tsc_freq_from_clock(void)\r
323 {\r
324 #define NS_PER_SEC 1E9\r
325     struct timespec sleeptime = {.tv_nsec = 5E8 }; /* 1/2 second */\r
326     struct timespec t_start, t_end;\r
327     uint64_t tsc_resolution_hz = 0;\r
328 \r
329     if (clock_gettime(CLOCK_MONOTONIC_RAW, &t_start) == 0)\r
330     {\r
331         unsigned long ns, end, start = timer_get_ticks();\r
332         nanosleep(&sleeptime,NULL);\r
333         clock_gettime(CLOCK_MONOTONIC_RAW, &t_end);\r
334         end = timer_get_ticks();\r
335         ns = ((t_end.tv_sec - t_start.tv_sec) * NS_PER_SEC);\r
336         ns += (t_end.tv_nsec - t_start.tv_nsec);\r
337 \r
338         double secs = (double)ns/NS_PER_SEC;\r
339         tsc_resolution_hz = (unsigned long)((end - start)/secs);\r
340 \r
341         tick_per_usec = (tsc_resolution_hz / 1000000);\r
342         printf("System clock (rdtsc) resolution %lu [Hz]\n", tsc_resolution_hz);\r
343         printf("Ticks per us %lu\n", tick_per_usec);\r
344         return 0;\r
345     }\r
346 \r
347     return -1;\r
348 }\r
349 \r
350 int physide_dl_tti_call_back(void * param)\r
351 {\r
352     uint64_t t1 = MLogTick();\r
353     rte_pause();\r
354     MLogTask(PID_GNB_PROC_TIMING, t1, MLogTick());\r
355     return 0;\r
356 }\r
357 \r
358 int physide_ul_half_slot_call_back(void * param)\r
359 {\r
360     uint64_t t1 = MLogTick();\r
361     rte_pause();\r
362     MLogTask(PID_GNB_PROC_TIMING, t1, MLogTick());\r
363     return 0;\r
364 }\r
365 \r
366 int physide_ul_full_slot_call_back(void * param)\r
367 {\r
368     uint64_t t1 = MLogTick();\r
369     rte_pause();\r
370     MLogTask(PID_GNB_PROC_TIMING, t1, MLogTick());\r
371     return 0;\r
372 }\r
373 \r
374 int32_t init_xran(void)\r
375 {\r
376     BbuXranIoIfStruct *psBbuIo = xran_get_ctx();\r
377     xran_status_t status;\r
378     int32_t nSectorIndex[XRAN_MAX_SECTOR_NR];\r
379     int32_t nSectorNum;\r
380     int32_t i, j, k, z;\r
381 \r
382     void *ptr;\r
383     void *mb;\r
384     uint32_t *u32dptr;\r
385     uint16_t *u16dptr;\r
386     uint8_t  *u8dptr;\r
387 \r
388     SWXRANInterfaceTypeEnum eInterfaceType;\r
389 \r
390     XranLibConfigStruct  *ptrLibConfig;\r
391 \r
392     struct xran_buffer_list *pFthTxBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];\r
393     struct xran_buffer_list *pFthTxPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];\r
394     struct xran_buffer_list *pFthRxBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];\r
395     struct xran_buffer_list *pFthRxPrbMapBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];\r
396     struct xran_buffer_list *pFthRxRachBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN];\r
397     struct xran_buffer_list *pFthRxSrsBuffer[XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_N_FE_BUF_LEN];\r
398 \r
399     for (nSectorNum = 0; nSectorNum < XRAN_MAX_SECTOR_NR; nSectorNum++)\r
400     {\r
401         nSectorIndex[nSectorNum] = nSectorNum;\r
402     }\r
403 \r
404     nSectorNum = numCCPorts;\r
405     printf ("XRAN front haul xran_mm_init \n");\r
406     status = xran_mm_init (xranHandle, (uint64_t) SW_FPGA_FH_TOTAL_BUFFER_LEN, SW_FPGA_SEGMENT_BUFFER_LEN);\r
407     if (status != XRAN_STATUS_SUCCESS)\r
408     {\r
409         printf ("Failed at XRAN front haul xran_mm_init \n");\r
410         exit(-1);\r
411     }\r
412 \r
413     psBbuIo->nInstanceNum = numCCPorts;\r
414 \r
415     for (k = 0; k < XRAN_PORTS_NUM; k++) {\r
416         status = xran_sector_get_instances (xranHandle, psBbuIo->nInstanceNum,&psBbuIo->nInstanceHandle[k][0]);\r
417         if (status != XRAN_STATUS_SUCCESS)\r
418         {\r
419             printf ("get sector instance failed %d for XRAN nInstanceNum %d\n",k, psBbuIo->nInstanceNum);\r
420             exit(-1);\r
421         }\r
422         for (i = 0; i < psBbuIo->nInstanceNum; i++){\r
423             printf("%s [%d]: CC %d handle %p\n", __FUNCTION__, k, i, psBbuIo->nInstanceHandle[0][i]);\r
424         }\r
425     }\r
426 \r
427     printf("Sucess xran_mm_init \n");\r
428     gpXranLibConfig = (XranLibConfigStruct*)malloc(sizeof(XranLibConfigStruct));\r
429     ptrLibConfig = gpXranLibConfig;\r
430     if (ptrLibConfig)\r
431     {\r
432     #if 0\r
433         ptrLibConfig->nDriverCoreId =  psBbuIo->nDriverCoreId;\r
434         ptrLibConfig->pFecInstanceHandles = &(psBbuIo->nInstanceHandle[FPGA_FEC][0]);\r
435         ptrLibConfig->pFthInstanceHandles = &(psBbuIo->nInstanceHandle[FPGA_FRONTHAUL][0]);\r
436         ptrLibConfig->nTimingAdvance = psFPGAInitPara->nTimeAdvance;\r
437         ptrLibConfig->nFhConfig = psFPGAInitPara->nEthPorts;\r
438         ptrLibConfig->nFhBufIntFlag = 0; //need init fronthaul buffer, then set to 1.\r
439         ptrLibConfig->nNrofSfInFrame = NUM_OF_SUBFRAME_PER_FRAME;\r
440         ptrLibConfig->nNrOfSlotInSf = pConfigParams->nNumOfSlotPerSubframe;\r
441         if (pConfigParams->nNumerology < 3)\r
442         {\r
443             ptrLibConfig->nSectorNum = psFPGAInitPara->nSecNum;\r
444         }\r
445     #endif\r
446     }\r
447     else\r
448     {\r
449         printf ("could not allocate ptrLibConfig in init_xran\n");\r
450         exit(-1);\r
451     }\r
452 \r
453     printf("nSectorNum %d\n", nSectorNum);\r
454 \r
455     /* Init Memory */\r
456     for(i = 0; i<nSectorNum; i++)\r
457     {\r
458         eInterfaceType = XRANFTHTX_OUT;\r
459         printf("nSectorIndex[%d] = %d\n",i,  nSectorIndex[i]);\r
460         status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],\r
461             XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT, nSW_ToFpga_FTH_TxBufferLen);\r
462         if(XRAN_STATUS_SUCCESS != status) {\r
463             rte_panic("Failed at  xran_bm_init , status %d\n", status);\r
464         }\r
465         for(j = 0; j < XRAN_N_FE_BUF_LEN; j++)\r
466         {\r
467             for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){\r
468                 psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].bValid = 0;\r
469                 psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;\r
470                 psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;\r
471                 psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;\r
472                 psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;\r
473                 psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFrontHaulTxBuffers[j][i][z][0];\r
474 \r
475                 for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++)\r
476                 {\r
477                     psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = nSW_ToFpga_FTH_TxBufferLen; // 14 symbols 3200bytes/symbol\r
478                     psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;\r
479                     psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;\r
480                     status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i], psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);\r
481                     if(XRAN_STATUS_SUCCESS != status){\r
482                         rte_panic("Failed at  xran_bm_allocate_buffer , status %d\n",status);\r
483                     }\r
484                     psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;\r
485                     psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *)mb;\r
486 \r
487                     if(ptr){\r
488                         u32dptr = (uint32_t*)(ptr);\r
489                         uint8_t *ptr_temp = (uint8_t *)ptr;\r
490                         memset(u32dptr, 0x0, nSW_ToFpga_FTH_TxBufferLen);\r
491                        // ptr_temp[0] = j; // TTI\r
492                        // ptr_temp[1] = i; // Sec\r
493                        // ptr_temp[2] = z; // Ant\r
494                        // ptr_temp[3] = k; // sym\r
495                     }\r
496                 }\r
497             }\r
498         }\r
499 \r
500         /* C-plane DL */\r
501         eInterfaceType = XRANFTHTX_SEC_DESC_OUT;\r
502         status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],\r
503             XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT*XRAN_MAX_SECTIONS_PER_SYM, sizeof(struct xran_section_desc));\r
504         if(XRAN_STATUS_SUCCESS != status) {\r
505             rte_panic("Failed at  xran_bm_init , status %d\n", status);\r
506         }\r
507 \r
508         eInterfaceType = XRANFTHTX_PRB_MAP_OUT;\r
509         status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],\r
510             XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT, sizeof(struct xran_prb_map));\r
511         if(XRAN_STATUS_SUCCESS != status) {\r
512             rte_panic("Failed at  xran_bm_init , status %d\n", status);\r
513         }\r
514 \r
515         for(j = 0; j < XRAN_N_FE_BUF_LEN; j++)\r
516         {\r
517             for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){\r
518                 psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].bValid = 0;\r
519                 psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegGenerated = -1;\r
520                 psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;\r
521                 psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred = 0;\r
522                 psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;\r
523                 psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFrontHaulTxPrbMapBuffers[j][i][z];\r
524 \r
525                 {\r
526                     psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nElementLenInBytes = sizeof(struct xran_prb_map);\r
527                     psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nNumberOfElements = 1;\r
528                     psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nOffsetInBytes = 0;\r
529                     status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i], psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);\r
530                     if(XRAN_STATUS_SUCCESS != status) {\r
531                         rte_panic("Failed at  xran_bm_allocate_buffer , status %d\n",status);\r
532                     }\r
533                     psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pData = (uint8_t *)ptr;\r
534                     psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pCtrl = (void *)mb;\r
535 \r
536                     if(ptr){\r
537                         void *sd_ptr;\r
538                         void *sd_mb;\r
539                         int elm_id;\r
540                         struct xran_prb_map * p_rb_map = (struct xran_prb_map *)ptr;\r
541                         if (startupConfiguration.appMode == APP_O_DU)\r
542                             memcpy(ptr, &startupConfiguration.PrbMapDl, sizeof(struct xran_prb_map));\r
543                         else\r
544                             memcpy(ptr, &startupConfiguration.PrbMapUl, sizeof(struct xran_prb_map));\r
545 \r
546                         for (elm_id = 0; elm_id < p_rb_map->nPrbElm; elm_id++){\r
547                             struct xran_prb_elm *pPrbElem = &p_rb_map->prbMap[elm_id];\r
548                             for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++){\r
549                                 status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i], psBbuIo->nBufPoolIndex[nSectorIndex[i]][XRANFTHTX_SEC_DESC_OUT],&sd_ptr, &sd_mb);\r
550                                 if(XRAN_STATUS_SUCCESS != status){\r
551                                     rte_panic("SD Failed at  xran_bm_allocate_buffer , status %d\n",status);\r
552                                 }\r
553                                 pPrbElem->p_sec_desc[k] = sd_ptr;\r
554                             }\r
555                         }\r
556                     }\r
557                 }\r
558             }\r
559         }\r
560     }\r
561 \r
562     for(i = 0; i<nSectorNum; i++)\r
563     {\r
564         eInterfaceType = XRANFTHRX_IN;\r
565         status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType], XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT, nSW_ToFpga_FTH_TxBufferLen);\r
566         if(XRAN_STATUS_SUCCESS != status)\r
567         {\r
568             printf("Failed at xran_bm_init, status %d\n", status);\r
569             iAssert(status == XRAN_STATUS_SUCCESS);\r
570         }\r
571 \r
572         for(j = 0;j < XRAN_N_FE_BUF_LEN; j++)\r
573         {\r
574             for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){\r
575                 psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].bValid = 0;\r
576                 psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;\r
577                 psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;\r
578                 psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;\r
579                 psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;\r
580                 psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFrontHaulRxBuffers[j][i][z][0];\r
581                 for(k = 0; k< XRAN_NUM_OF_SYMBOL_PER_SLOT; k++)\r
582                 {\r
583                     psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = nFpgaToSW_FTH_RxBufferLen; // 1 symbols 3200bytes\r
584                     psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;\r
585                     psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;\r
586                     status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i],psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);\r
587                     if(XRAN_STATUS_SUCCESS != status) {\r
588                         rte_panic("Failed at  xran_bm_allocate_buffer , status %d\n",status);\r
589                     }\r
590                     psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;\r
591                     psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *) mb;\r
592                     if(ptr){\r
593                         u32dptr = (uint32_t*)(ptr);\r
594                         uint8_t *ptr_temp = (uint8_t *)ptr;\r
595                         memset(u32dptr, 0x0, nFpgaToSW_FTH_RxBufferLen);\r
596                      //   ptr_temp[0] = j; // TTI\r
597                      //   ptr_temp[1] = i; // Sec\r
598                      //   ptr_temp[2] = z; // Ant\r
599                      //   ptr_temp[3] = k; // sym\r
600                     }\r
601                 }\r
602             }\r
603         }\r
604 \r
605         /* C-plane */\r
606         eInterfaceType = XRANFTHTX_SEC_DESC_IN;\r
607         status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],\r
608             XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT*XRAN_MAX_SECTIONS_PER_SYM, sizeof(struct xran_section_desc));\r
609         if(XRAN_STATUS_SUCCESS != status) {\r
610             rte_panic("Failed at  xran_bm_init , status %d\n", status);\r
611         }\r
612         eInterfaceType = XRANFTHRX_PRB_MAP_IN;\r
613         status = xran_bm_init(psBbuIo->nInstanceHandle[0][i], &psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],\r
614                 XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT, sizeof(struct xran_prb_map));\r
615         if(XRAN_STATUS_SUCCESS != status) {\r
616             rte_panic("Failed at xran_bm_init, status %d\n", status);\r
617         }\r
618 \r
619         for(j = 0;j < XRAN_N_FE_BUF_LEN; j++) {\r
620             for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){\r
621                 psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].bValid = 0;\r
622                 psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegGenerated = -1;\r
623                 psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;\r
624                 psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].nSegTransferred = 0;\r
625                 psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_NUM_OF_SYMBOL_PER_SLOT;\r
626                 psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFrontHaulRxPrbMapBuffers[j][i][z];\r
627                 {\r
628                     psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nElementLenInBytes = sizeof(struct xran_prb_map);\r
629                     psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nNumberOfElements = 1;\r
630                     psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->nOffsetInBytes = 0;\r
631                     status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i],psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);\r
632                     if(XRAN_STATUS_SUCCESS != status) {\r
633                         rte_panic("Failed at  xran_bm_allocate_buffer , status %d\n",status);\r
634                     }\r
635                     psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pData = (uint8_t *)ptr;\r
636                     psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList.pBuffers->pCtrl = (void *)mb;\r
637                     if(ptr){\r
638                         void *sd_ptr;\r
639                         void *sd_mb;\r
640                         int elm_id;\r
641                         struct xran_prb_map * p_rb_map = (struct xran_prb_map *)ptr;\r
642 \r
643                         if (startupConfiguration.appMode == APP_O_DU)\r
644                             memcpy(ptr, &startupConfiguration.PrbMapUl, sizeof(struct xran_prb_map));\r
645                         else\r
646                             memcpy(ptr, &startupConfiguration.PrbMapDl, sizeof(struct xran_prb_map));\r
647 \r
648                         for (elm_id = 0; elm_id < p_rb_map->nPrbElm; elm_id++){\r
649                             struct xran_prb_elm *pPrbElem = &p_rb_map->prbMap[elm_id];\r
650                             for(k = 0; k < XRAN_NUM_OF_SYMBOL_PER_SLOT; k++){\r
651                                 status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i], psBbuIo->nBufPoolIndex[nSectorIndex[i]][XRANFTHTX_SEC_DESC_IN],&sd_ptr, &sd_mb);\r
652                                 if(XRAN_STATUS_SUCCESS != status){\r
653                                     rte_panic("SD Failed at  xran_bm_allocate_buffer , status %d\n",status);\r
654                                 }\r
655                                 pPrbElem->p_sec_desc[k] = sd_ptr;\r
656                             }\r
657                         }\r
658                     }\r
659                 }\r
660             }\r
661         }\r
662     }\r
663 \r
664 \r
665     // add prach rx buffer\r
666     for(i = 0; i<nSectorNum; i++)\r
667     {\r
668         eInterfaceType = XRANFTHRACH_IN;\r
669         status = xran_bm_init(psBbuIo->nInstanceHandle[0][i],&psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],XRAN_N_FE_BUF_LEN*XRAN_MAX_ANTENNA_NR*XRAN_NUM_OF_SYMBOL_PER_SLOT, FPGA_TO_SW_PRACH_RX_BUFFER_LEN);\r
670         if(XRAN_STATUS_SUCCESS != status) {\r
671             rte_panic("Failed at xran_bm_init, status %d\n", status);\r
672         }\r
673         for(j = 0;j < XRAN_N_FE_BUF_LEN; j++)\r
674         {\r
675             for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){\r
676                 psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].bValid = 0;\r
677                 psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;\r
678                 psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;\r
679                 psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;\r
680                 psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_MAX_ANTENNA_NR; // ant number.\r
681                 psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFHPrachRxBuffers[j][i][z][0];\r
682                 for(k = 0; k< XRAN_NUM_OF_SYMBOL_PER_SLOT; k++)\r
683                 {\r
684                     psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = FPGA_TO_SW_PRACH_RX_BUFFER_LEN;\r
685                     psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;\r
686                     psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;\r
687                     status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i],psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);\r
688                     if(XRAN_STATUS_SUCCESS != status) {\r
689                         rte_panic("Failed at  xran_bm_allocate_buffer, status %d\n",status);\r
690                     }\r
691                     psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;\r
692                     psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *)mb;\r
693                     if(ptr){\r
694                         u32dptr = (uint32_t*)(ptr);\r
695                         memset(u32dptr, 0x0, FPGA_TO_SW_PRACH_RX_BUFFER_LEN);\r
696                     }\r
697                 }\r
698             }\r
699         }\r
700     }\r
701 \r
702     /* add SRS rx buffer */\r
703     for(i = 0; i<nSectorNum; i++)\r
704     {\r
705         eInterfaceType = XRANSRS_IN;\r
706         status = xran_bm_init(psBbuIo->nInstanceHandle[0][i],&psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],\r
707             XRAN_N_FE_BUF_LEN*XRAN_MAX_ANT_ARRAY_ELM_NR*XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT, nSW_ToFpga_FTH_TxBufferLen);\r
708 \r
709         if(XRAN_STATUS_SUCCESS != status) {\r
710             rte_panic("Failed at xran_bm_init, status %d\n", status);\r
711         }\r
712         for(j = 0; j < XRAN_N_FE_BUF_LEN; j++)\r
713         {\r
714             for(z = 0; z < XRAN_MAX_ANT_ARRAY_ELM_NR; z++){\r
715                 psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].bValid = 0;\r
716                 psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].nSegGenerated = -1;\r
717                 psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].nSegToBeGen = -1;\r
718                 psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].nSegTransferred = 0;\r
719                 psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.nNumBuffers = XRAN_MAX_ANT_ARRAY_ELM_NR; /* ant number */\r
720                 psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers = &psBbuIo->sFHSrsRxBuffers[j][i][z][0];\r
721                 for(k = 0; k < XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT; k++)\r
722                 {\r
723                     psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nElementLenInBytes = nSW_ToFpga_FTH_TxBufferLen;\r
724                     psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nNumberOfElements = 1;\r
725                     psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].nOffsetInBytes = 0;\r
726                     status = xran_bm_allocate_buffer(psBbuIo->nInstanceHandle[0][i],psBbuIo->nBufPoolIndex[nSectorIndex[i]][eInterfaceType],&ptr, &mb);\r
727                     if(XRAN_STATUS_SUCCESS != status) {\r
728                         rte_panic("Failed at  xran_bm_allocate_buffer, status %d\n",status);\r
729                     }\r
730                     psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pData = (uint8_t *)ptr;\r
731                     psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *)mb;\r
732                     if(ptr){\r
733                         u32dptr = (uint32_t*)(ptr);\r
734                         memset(u32dptr, 0x0, nSW_ToFpga_FTH_TxBufferLen);\r
735                     }\r
736                 }\r
737             }\r
738         }\r
739     }\r
740 \r
741 \r
742     for(i=0; i<nSectorNum; i++)\r
743     {\r
744         for(j=0; j<XRAN_N_FE_BUF_LEN; j++)\r
745         {\r
746             for(z = 0; z < XRAN_MAX_ANTENNA_NR; z++){\r
747                 pFthTxBuffer[i][z][j]     = &(psBbuIo->sFrontHaulTxBbuIoBufCtrl[j][i][z].sBufferList);\r
748                 pFthTxPrbMapBuffer[i][z][j]     = &(psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[j][i][z].sBufferList);\r
749                 pFthRxBuffer[i][z][j]     = &(psBbuIo->sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList);\r
750                 pFthRxPrbMapBuffer[i][z][j]     = &(psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[j][i][z].sBufferList);\r
751                 pFthRxRachBuffer[i][z][j] = &(psBbuIo->sFHPrachRxBbuIoBufCtrl[j][i][z].sBufferList);\r
752             }\r
753 \r
754             for(z = 0; z < XRAN_MAX_ANT_ARRAY_ELM_NR; z++){\r
755                 pFthRxSrsBuffer[i][z][j] = &(psBbuIo->sFHSrsRxBbuIoBufCtrl[j][i][z].sBufferList);\r
756             }\r
757         }\r
758     }\r
759 \r
760     if(NULL != psBbuIo->nInstanceHandle[0])\r
761     {\r
762         /* add pusch callback */\r
763         for (i = 0; i<nSectorNum; i++)\r
764         {\r
765             xran_5g_fronthault_config (psBbuIo->nInstanceHandle[0][i],\r
766                 pFthTxBuffer[i],\r
767                 pFthTxPrbMapBuffer[i],\r
768                 pFthRxBuffer[i],\r
769                 pFthRxPrbMapBuffer[i],\r
770                 xran_fh_rx_callback,  &pFthRxBuffer[i][0]);\r
771         }\r
772 \r
773         /* add prach callback here */\r
774         for (i = 0; i<nSectorNum; i++)\r
775         {\r
776             xran_5g_prach_req(psBbuIo->nInstanceHandle[0][i], pFthRxRachBuffer[i],\r
777                 xran_fh_rx_prach_callback,&pFthRxRachBuffer[i][0]);\r
778         }\r
779 \r
780         /* add SRS callback here */\r
781         for (i = 0; i<nSectorNum; i++) {\r
782             xran_5g_srs_req(psBbuIo->nInstanceHandle[0][i], pFthRxSrsBuffer[i],\r
783                 xran_fh_rx_srs_callback,&pFthRxSrsBuffer[i][0]);\r
784         }\r
785 \r
786         ptrLibConfig->nFhBufIntFlag = 1;\r
787     }\r
788 \r
789     return status;\r
790 }\r
791 \r
792 int init_xran_iq_content(void)\r
793 {\r
794     BbuXranIoIfStruct *psBbuIo = xran_get_ctx();\r
795     xran_status_t status;\r
796     int32_t nSectorIndex[XRAN_MAX_SECTOR_NR];\r
797     int32_t nSectorNum;\r
798     int32_t cc_id, ant_id, sym_id, tti;\r
799     int32_t flowId;\r
800 \r
801     uint8_t    frame_id    = 0;\r
802     uint8_t    subframe_id = 0;\r
803     uint8_t    slot_id     = 0;\r
804     uint8_t    sym         = 0;\r
805 \r
806     void *ptr;\r
807     uint32_t *u32dptr;\r
808     uint16_t *u16dptr;\r
809     uint8_t  *u8dptr;\r
810 \r
811     char *pos = NULL;\r
812     struct xran_prb_map *pRbMap = NULL;\r
813 \r
814     for (nSectorNum = 0; nSectorNum < XRAN_MAX_SECTOR_NR; nSectorNum++)\r
815     {\r
816         nSectorIndex[nSectorNum] = nSectorNum;\r
817     }\r
818     nSectorNum = numCCPorts;\r
819     printf ("init_xran_iq_content\n");\r
820 \r
821     /* Init Memory */\r
822     for(cc_id = 0; cc_id <nSectorNum; cc_id++)\r
823     {\r
824         for(tti  = 0; tti  < XRAN_N_FE_BUF_LEN; tti ++) {\r
825             for(ant_id = 0; ant_id < XRAN_MAX_ANTENNA_NR; ant_id++){\r
826                 for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) {\r
827 \r
828                     flowId = XRAN_MAX_ANTENNA_NR*cc_id + ant_id;\r
829                     if(p_tx_play_buffer[flowId]){\r
830                         /* c-plane DL */\r
831                         pRbMap = (struct xran_prb_map *) psBbuIo->sFrontHaulTxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData;\r
832                         if(pRbMap){\r
833                             if (xranInit.DynamicSectionEna == 0){\r
834                                 pRbMap->dir = XRAN_DIR_DL;\r
835                                 pRbMap->xran_port = 0;\r
836                                 pRbMap->band_id = 0;\r
837                                 pRbMap->cc_id = cc_id;\r
838                                 pRbMap->ru_port_id = ant_id;\r
839                                 pRbMap->tti_id = tti;\r
840                                 pRbMap->start_sym_id = 0;\r
841                                 pRbMap->nPrbElm = 1;\r
842                                 pRbMap->prbMap[0].nStartSymb = 0;\r
843                                 pRbMap->prbMap[0].numSymb = 14;\r
844                                 pRbMap->prbMap[0].nRBStart = 0;\r
845                                 pRbMap->prbMap[0].nRBSize = pXranConf->nDLRBs;\r
846                                 pRbMap->prbMap[0].nBeamIndex = 0;\r
847                                 pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE;\r
848                                 pRbMap->prbMap[0].iqWidth    = 16;\r
849                             } else if(pXranConf->ru_conf.xranCat == XRAN_CATEGORY_B\r
850                                       && startupConfiguration.appMode == APP_O_DU\r
851                                       && sym_id == 0){ /* BF Ws are per slot */\r
852                                 int idxElm = 0;\r
853                                 char* dl_bfw_pos  = ((char*)p_tx_dl_bfw_buffer[flowId]) + tx_dl_bfw_buffer_position[flowId];\r
854                                 struct xran_prb_elm* p_pRbMapElm = NULL;\r
855                                 for (idxElm = 0;  idxElm < pRbMap->nPrbElm; idxElm++){\r
856                                     p_pRbMapElm = &pRbMap->prbMap[idxElm];\r
857                                     p_pRbMapElm->bf_weight.nAntElmTRx = pXranConf->nAntElmTRx;\r
858                                     if(p_pRbMapElm->BeamFormingType == XRAN_BEAM_WEIGHT && p_pRbMapElm->bf_weight_update){\r
859                                         int16_t  ext_len       = 9600;\r
860                                         int16_t  ext_sec_total = 0;\r
861                                         int8_t * ext_buf =(int8_t*) xran_malloc(ext_len);\r
862                                         int idRb = 0;\r
863                                         int16_t *ptr = NULL;\r
864                                         int i;\r
865                                         if (ext_buf){\r
866                                             ext_buf += (RTE_PKTMBUF_HEADROOM +\r
867                                                        sizeof (struct xran_ecpri_hdr) +\r
868                                                        sizeof(struct xran_cp_radioapp_section1));\r
869 \r
870                                             ext_len -= (RTE_PKTMBUF_HEADROOM +\r
871                                                         sizeof (struct xran_ecpri_hdr) +\r
872                                                         sizeof(struct xran_cp_radioapp_section1));\r
873                                             ext_sec_total =  xran_cp_populate_section_ext_1((int8_t *)ext_buf,\r
874                                                                       ext_len,\r
875                                                                       (int16_t *) (dl_bfw_pos + (p_pRbMapElm->nRBStart*pXranConf->nAntElmTRx)*4),\r
876                                                                       p_pRbMapElm->nRBSize,\r
877                                                                       pXranConf->nAntElmTRx,\r
878                                                                       p_pRbMapElm->iqWidth, p_pRbMapElm->compMethod);\r
879                                             if(ext_sec_total > 0){\r
880                                                 p_pRbMapElm->bf_weight.p_ext_section  = ext_buf;\r
881                                                 p_pRbMapElm->bf_weight.ext_section_sz = ext_sec_total;\r
882                                             }else {\r
883                                                 rte_panic("xran_cp_populate_section_ext_1 return error [%d]\n", ext_sec_total);\r
884                                             }\r
885                                         } else {\r
886                                             rte_panic("xran_malloc return NULL\n");\r
887                                         }\r
888                                     }\r
889                                 }\r
890                             }\r
891                         } else {\r
892                             printf("DL pRbMap ==NULL\n");\r
893                             exit(-1);\r
894                         }\r
895 \r
896                         pos =  ((char*)p_tx_play_buffer[flowId]) + tx_play_buffer_position[flowId];\r
897                         ptr = psBbuIo->sFrontHaulTxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;\r
898 \r
899                         if(ptr && pos){\r
900                             int idxElm = 0;\r
901                             u8dptr = (uint8_t*)ptr;\r
902                             int16_t payload_len = 0;\r
903 \r
904                             uint8_t  *dst = (uint8_t *)u8dptr;\r
905                             uint8_t  *src = (uint8_t *)pos;\r
906                             struct xran_prb_elm* p_prbMapElm = &pRbMap->prbMap[idxElm];\r
907                             dst =  xran_add_hdr_offset(dst, p_prbMapElm->compMethod);\r
908                             for (idxElm = 0;  idxElm < pRbMap->nPrbElm; idxElm++) {\r
909                                 struct xran_section_desc *p_sec_desc = NULL;\r
910                                 p_prbMapElm = &pRbMap->prbMap[idxElm];\r
911                                 p_sec_desc =  p_prbMapElm->p_sec_desc[sym_id];\r
912 \r
913                                 if(p_sec_desc == NULL){\r
914                                     printf ("p_sec_desc == NULL\n");\r
915                                     exit(-1);\r
916                                 }\r
917                                 src = (uint8_t *)(pos + p_prbMapElm->nRBStart*N_SC_PER_PRB*4L);\r
918 \r
919                                 if(p_prbMapElm->compMethod == XRAN_COMPMETHOD_NONE) {\r
920                                     payload_len = p_prbMapElm->nRBSize*N_SC_PER_PRB*4L;\r
921                                     rte_memcpy(dst, src, payload_len);\r
922 \r
923                                 } else if (p_prbMapElm->compMethod == XRAN_COMPMETHOD_BLKFLOAT) {\r
924                                     struct xranlib_compress_request  bfp_com_req;\r
925                                     struct xranlib_compress_response bfp_com_rsp;\r
926 \r
927                                     memset(&bfp_com_req, 0, sizeof(struct xranlib_compress_request));\r
928                                     memset(&bfp_com_rsp, 0, sizeof(struct xranlib_compress_response));\r
929 \r
930                                     bfp_com_req.data_in    = (int16_t*)src;\r
931                                     bfp_com_req.numRBs     = p_prbMapElm->nRBSize;\r
932                                     bfp_com_req.len        = p_prbMapElm->nRBSize*N_SC_PER_PRB*4L;\r
933                                     bfp_com_req.compMethod = p_prbMapElm->compMethod;\r
934                                     bfp_com_req.iqWidth    = p_prbMapElm->iqWidth;\r
935 \r
936                                     bfp_com_rsp.data_out   = (int8_t*)dst;\r
937                                     bfp_com_rsp.len        = 0;\r
938 \r
939                                     if(xranlib_compress_avx512(&bfp_com_req, &bfp_com_rsp) < 0){\r
940                                         printf ("compression failed [%d]\n",\r
941                                             p_prbMapElm->compMethod);\r
942                                         exit(-1);\r
943                                     } else {\r
944                                         payload_len = bfp_com_rsp.len;\r
945                                     }\r
946                                 }else {\r
947                                     printf ("p_prbMapElm->compMethod == %d is not supported\n",\r
948                                         p_prbMapElm->compMethod);\r
949                                     exit(-1);\r
950                                 }\r
951 \r
952                                 /* update RB map for given element */\r
953                                 p_sec_desc->iq_buffer_offset = RTE_PTR_DIFF(dst, u8dptr);\r
954                                 p_sec_desc->iq_buffer_len = payload_len;\r
955 \r
956                                 /* add headroom for ORAN headers between IQs for chunk of RBs*/\r
957                                 dst += payload_len;\r
958                                 dst  = xran_add_hdr_offset(dst, p_prbMapElm->compMethod);\r
959                             }\r
960                         } else {\r
961                             exit(-1);\r
962                             printf("ptr ==NULL\n");\r
963                         }\r
964 \r
965 \r
966                         /* c-plane UL */\r
967                         pRbMap = (struct xran_prb_map *) psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData;\r
968                         if(pRbMap){\r
969                             if (xranInit.DynamicSectionEna == 0){\r
970                                 pRbMap->dir = XRAN_DIR_UL;\r
971                                 pRbMap->xran_port = 0;\r
972                                 pRbMap->band_id = 0;\r
973                                 pRbMap->cc_id = cc_id;\r
974                                 pRbMap->ru_port_id = ant_id;\r
975                                 pRbMap->tti_id = tti;\r
976                                 pRbMap->start_sym_id = 0;\r
977                                 pRbMap->nPrbElm = 1;\r
978                                 pRbMap->prbMap[0].nRBStart = 0;\r
979                                 pRbMap->prbMap[0].nRBSize = pXranConf->nULRBs;\r
980                                 pRbMap->prbMap[0].nStartSymb = 0;\r
981                                 pRbMap->prbMap[0].numSymb = 14;\r
982                                 pRbMap->prbMap[0].p_sec_desc[sym_id]->iq_buffer_offset = 0;\r
983                                 pRbMap->prbMap[0].p_sec_desc[sym_id]->iq_buffer_len    = pXranConf->nULRBs *4L;\r
984                                 pRbMap->prbMap[0].nBeamIndex = 0;\r
985                                 pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE;\r
986                             } else if(pXranConf->ru_conf.xranCat == XRAN_CATEGORY_B\r
987                                       && startupConfiguration.appMode == APP_O_DU\r
988                                       && sym_id == 0){\r
989                                 int idxElm = 0;\r
990                                 char        * ul_bfw_pos =  ((char*)p_tx_ul_bfw_buffer[flowId]) + tx_ul_bfw_buffer_position[flowId];\r
991                                 struct xran_prb_elm* p_pRbMapElm = NULL;\r
992 \r
993                                 for (idxElm = 0;  idxElm < pRbMap->nPrbElm; idxElm++){\r
994                                     p_pRbMapElm = &pRbMap->prbMap[idxElm];\r
995                                     p_pRbMapElm->bf_weight.nAntElmTRx = pXranConf->nAntElmTRx;\r
996                                     if(p_pRbMapElm->BeamFormingType == XRAN_BEAM_WEIGHT && p_pRbMapElm->bf_weight_update){\r
997                                         int16_t  ext_len       = 9600;\r
998                                         int16_t  ext_sec_total = 0;\r
999                                         int8_t * ext_buf =(int8_t*) xran_malloc(ext_len);\r
1000                                         int idRb = 0;\r
1001                                         int16_t *ptr = NULL;\r
1002                                         int i;\r
1003                                         if (ext_buf){\r
1004                                             ext_buf += (RTE_PKTMBUF_HEADROOM +\r
1005                                                        sizeof (struct xran_ecpri_hdr) +\r
1006                                                        sizeof(struct xran_cp_radioapp_section1));\r
1007 \r
1008                                             ext_len -= (RTE_PKTMBUF_HEADROOM +\r
1009                                                         sizeof (struct xran_ecpri_hdr) +\r
1010                                                         sizeof(struct xran_cp_radioapp_section1));\r
1011                                             ptr = (int16_t*)(ul_bfw_pos +(p_pRbMapElm->nRBStart*pXranConf->nAntElmTRx)*4);\r
1012                                             ext_sec_total =  xran_cp_populate_section_ext_1((int8_t *)ext_buf,\r
1013                                                                       ext_len,\r
1014                                                                       (int16_t *) (ul_bfw_pos + (p_pRbMapElm->nRBStart*pXranConf->nAntElmTRx)*4),\r
1015                                                                       p_pRbMapElm->nRBSize,\r
1016                                                                       pXranConf->nAntElmTRx,\r
1017                                                                       p_pRbMapElm->iqWidth, p_pRbMapElm->compMethod);\r
1018                                             if(ext_sec_total > 0){\r
1019                                                 p_pRbMapElm->bf_weight.p_ext_section  = ext_buf;\r
1020                                                 p_pRbMapElm->bf_weight.ext_section_sz = ext_sec_total;\r
1021                                             }else {\r
1022                                                 rte_panic("xran_cp_populate_section_ext_1 return error [%d]\n", ext_sec_total);\r
1023                                             }\r
1024                                         } else {\r
1025                                             rte_panic("xran_malloc return NULL\n");\r
1026                                         }\r
1027                                     }\r
1028                                 }\r
1029                             }\r
1030                         } else {\r
1031                             printf("DL pRbMap ==NULL\n");\r
1032                             exit(-1);\r
1033                         }\r
1034 \r
1035                         tx_play_buffer_position[flowId] += pXranConf->nDLRBs*N_SC_PER_PRB*4;\r
1036 \r
1037                         if(tx_play_buffer_position[flowId] >= tx_play_buffer_size[flowId])\r
1038                             tx_play_buffer_position[flowId] = 0;\r
1039 \r
1040                         if(pXranConf->ru_conf.xranCat == XRAN_CATEGORY_B\r
1041                            && startupConfiguration.appMode == APP_O_DU\r
1042                            && sym_id == 0) {\r
1043                             tx_dl_bfw_buffer_position[flowId] += (pXranConf->nDLRBs*pXranConf->nAntElmTRx)*4;\r
1044                             if(tx_dl_bfw_buffer_position[flowId] >= tx_dl_bfw_buffer_size[flowId])\r
1045                                 tx_dl_bfw_buffer_position[flowId] = 0;\r
1046 \r
1047                             tx_ul_bfw_buffer_position[flowId] += (pXranConf->nULRBs*pXranConf->nAntElmTRx)*4;\r
1048                             if(tx_ul_bfw_buffer_position[flowId] >= tx_ul_bfw_buffer_size[flowId])\r
1049                                 tx_ul_bfw_buffer_position[flowId] = 0;\r
1050                         }\r
1051                     } else {\r
1052                         //printf("flowId %d\n", flowId);\r
1053                     }\r
1054                 }\r
1055             }\r
1056 \r
1057             /* prach TX for RU only */\r
1058             if(startupConfiguration.appMode == APP_O_RU && startupConfiguration.enablePrach){\r
1059                 for(ant_id = 0; ant_id < XRAN_MAX_ANTENNA_NR; ant_id++){\r
1060                     for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) {\r
1061                         flowId = XRAN_MAX_ANTENNA_NR*cc_id + ant_id;\r
1062 \r
1063                         if(p_tx_prach_play_buffer[flowId]){\r
1064                             pos =  ((char*)p_tx_prach_play_buffer[flowId]);\r
1065 \r
1066                             ptr = psBbuIo->sFHPrachRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;\r
1067 \r
1068                             if(ptr && pos){\r
1069                                 u32dptr = (uint32_t*)(ptr);\r
1070                                 /* duplicate full PRACH (repetition * occassions ) in every symbol */\r
1071                                 memset(u32dptr,0 , PRACH_PLAYBACK_BUFFER_BYTES);\r
1072                                 rte_memcpy(u32dptr, pos, RTE_MIN(PRACH_PLAYBACK_BUFFER_BYTES, tx_prach_play_buffer_size[flowId]));\r
1073                             } else {\r
1074                                 exit(-1);\r
1075                                 printf("ptr ==NULL\n");\r
1076                             }\r
1077                         } else {\r
1078                             //printf("flowId %d\n", flowId);\r
1079                         }\r
1080                     }\r
1081                 }\r
1082             }\r
1083 \r
1084             /* SRS TX for RU only */\r
1085             if(startupConfiguration.appMode == APP_O_RU && startupConfiguration.enableSrs){\r
1086                 for(ant_id = 0; ant_id < XRAN_MAX_ANT_ARRAY_ELM_NR; ant_id++){\r
1087                     for(sym_id = 0; sym_id < XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT; sym_id++) {\r
1088                         flowId = XRAN_MAX_ANT_ARRAY_ELM_NR*cc_id + ant_id;\r
1089 \r
1090                         if(p_tx_srs_play_buffer[flowId]){\r
1091                             pos =  ((char*)p_tx_srs_play_buffer[flowId]) + tx_srs_play_buffer_position[flowId];\r
1092                             ptr = psBbuIo->sFHSrsRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;\r
1093 \r
1094                             if(startupConfiguration.srsSymMask & (1 << sym_id) ){\r
1095                                 if(ptr && pos){\r
1096                                     u32dptr = (uint32_t*)(ptr);\r
1097                                     memset(u32dptr,0 , pXranConf->nULRBs*N_SC_PER_PRB*4);\r
1098                                     rte_memcpy(u32dptr, pos, pXranConf->nULRBs*N_SC_PER_PRB*4);\r
1099                                 } else {\r
1100                                     exit(-1);\r
1101                                     printf("ptr ==NULL\n");\r
1102                                 }\r
1103                             }\r
1104 \r
1105                             tx_srs_play_buffer_position[flowId] += pXranConf->nULRBs*N_SC_PER_PRB*4;\r
1106 \r
1107                             if(tx_srs_play_buffer_position[flowId] >= tx_srs_play_buffer_size[flowId])\r
1108                                 tx_srs_play_buffer_position[flowId] = 0;\r
1109                         } else {\r
1110                             //printf("flowId %d\n", flowId);\r
1111                         }\r
1112                     }\r
1113                 }\r
1114             }\r
1115         }\r
1116     }\r
1117 \r
1118     return 0;\r
1119 }\r
1120 \r
1121 void stop_xran(void)\r
1122 {\r
1123     xran_status_t status = 0;\r
1124     SWXRANInterfaceTypeEnum eInterfaceType;\r
1125 \r
1126     free(gpXranLibConfig);\r
1127     gpXranLibConfig = NULL;\r
1128 \r
1129     status += xran_mm_destroy(xranHandle)*2;\r
1130 \r
1131     if(XRAN_STATUS_SUCCESS != status)\r
1132     {\r
1133         printf("Failed at  xran_mm_destroy, status %d\n",status);\r
1134         iAssert(status == XRAN_STATUS_SUCCESS);\r
1135     }\r
1136 }\r
1137 \r
1138 int get_xran_iq_content(void)\r
1139 {\r
1140     BbuXranIoIfStruct *psBbuIo = xran_get_ctx();\r
1141     xran_status_t status;\r
1142     int32_t nSectorIndex[XRAN_MAX_SECTOR_NR];\r
1143     int32_t nSectorNum;\r
1144     int32_t cc_id, ant_id, sym_id, tti;\r
1145     int32_t flowId;\r
1146 \r
1147     uint8_t    frame_id    = 0;\r
1148     uint8_t    subframe_id = 0;\r
1149     uint8_t    slot_id     = 0;\r
1150     uint8_t    sym         = 0;\r
1151 \r
1152     void *ptr;\r
1153     uint32_t *u32dptr;\r
1154     uint16_t *u16dptr;\r
1155     uint8_t  *u8dptr;\r
1156 \r
1157     char        *pos = NULL;\r
1158 \r
1159     for (nSectorNum = 0; nSectorNum < XRAN_MAX_SECTOR_NR; nSectorNum++)\r
1160     {\r
1161         nSectorIndex[nSectorNum] = nSectorNum;\r
1162     }\r
1163     nSectorNum = numCCPorts;\r
1164     printf ("get_xran_iq_content\n");\r
1165 \r
1166     /* Init Memory */\r
1167     for(cc_id = 0; cc_id <nSectorNum; cc_id++)\r
1168     {\r
1169         for(tti  = 0; tti  < XRAN_N_FE_BUF_LEN; tti++) {\r
1170             for(ant_id = 0; ant_id < XRAN_MAX_ANTENNA_NR; ant_id++){\r
1171                 int32_t idxElm = 0;\r
1172                 struct xran_prb_map *pRbMap = NULL;\r
1173                 struct xran_prb_elm *pRbElm = NULL;\r
1174                 struct xran_section_desc *p_sec_desc = NULL;\r
1175                 pRbMap = (struct xran_prb_map *) psBbuIo->sFrontHaulRxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData;\r
1176                 if(pRbMap == NULL)\r
1177                     exit(-1);\r
1178                 flowId = XRAN_MAX_ANTENNA_NR * cc_id + ant_id;\r
1179                 for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++) {\r
1180                     pRbElm = &pRbMap->prbMap[0];\r
1181                     if(pRbMap->nPrbElm == 1){\r
1182                         if(p_rx_log_buffer[flowId]) {\r
1183                             pos =  ((char*)p_rx_log_buffer[flowId]) + rx_log_buffer_position[flowId];\r
1184                             ptr =  psBbuIo->sFrontHaulRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;\r
1185                             if(ptr){\r
1186                                 u32dptr = (uint32_t*)(ptr);\r
1187                                 char* my_ptr =(char *)ptr;\r
1188                                 rte_memcpy(pos + pRbElm->nRBStart*N_SC_PER_PRB*4L , u32dptr, pRbElm->nRBSize*N_SC_PER_PRB*4L);\r
1189                             }else {\r
1190                                 printf("[%d][%d][%d][%d]ptr ==NULL\n",tti,cc_id,ant_id, sym_id);\r
1191                             }\r
1192                         }\r
1193                     } else {\r
1194                         for(idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++ ) {\r
1195                             pRbElm = &pRbMap->prbMap[idxElm];\r
1196                             p_sec_desc = pRbElm->p_sec_desc[sym_id];\r
1197                             if(p_rx_log_buffer[flowId] && p_sec_desc){\r
1198                                 if(sym_id >= pRbElm->nStartSymb && sym_id < pRbElm->nStartSymb + pRbElm->numSymb){\r
1199                                     pos =  ((char*)p_rx_log_buffer[flowId]) + rx_log_buffer_position[flowId];\r
1200                                     ptr = p_sec_desc->pData;\r
1201                                     if(ptr){\r
1202                                         int32_t payload_len = 0;\r
1203                                         u32dptr = (uint32_t*)(ptr);\r
1204                                         if (pRbElm->compMethod != XRAN_COMPMETHOD_NONE){\r
1205                                             struct xranlib_decompress_request  bfp_decom_req;\r
1206                                             struct xranlib_decompress_response bfp_decom_rsp;\r
1207 \r
1208                                             memset(&bfp_decom_req, 0, sizeof(struct xranlib_decompress_request));\r
1209                                             memset(&bfp_decom_rsp, 0, sizeof(struct xranlib_decompress_response));\r
1210 \r
1211                                             bfp_decom_req.data_in    = (int8_t *)u32dptr;\r
1212                                             bfp_decom_req.numRBs     = pRbElm->nRBSize;\r
1213                                             bfp_decom_req.len        = (3* pRbElm->iqWidth + 1)*pRbElm->nRBSize;\r
1214                                             bfp_decom_req.compMethod = pRbElm->compMethod;\r
1215                                             bfp_decom_req.iqWidth    = pRbElm->iqWidth;\r
1216 \r
1217                                             bfp_decom_rsp.data_out   = (int16_t *)(pos + pRbElm->nRBStart*N_SC_PER_PRB*4);\r
1218                                             bfp_decom_rsp.len        = 0;\r
1219 \r
1220                                             if(xranlib_decompress_avx512(&bfp_decom_req, &bfp_decom_rsp) < 0){\r
1221                                                 printf ("compression failed [%d]\n",\r
1222                                                     pRbElm->compMethod);\r
1223                                                 exit(-1);\r
1224                                             } else {\r
1225                                                 payload_len = bfp_decom_rsp.len;\r
1226                                             }\r
1227                                        } else {\r
1228                                             rte_memcpy(pos + pRbElm->nRBStart*N_SC_PER_PRB*4 , u32dptr, pRbElm->nRBSize*N_SC_PER_PRB*4);\r
1229                                        }\r
1230                                     }\r
1231                                 }\r
1232                             }\r
1233                         }\r
1234                     }\r
1235                     rx_log_buffer_position[flowId] += pXranConf->nULRBs*N_SC_PER_PRB*4;\r
1236 \r
1237                     if(rx_log_buffer_position[flowId] >= rx_log_buffer_size[flowId])\r
1238                         rx_log_buffer_position[flowId] = 0;\r
1239                 }\r
1240 \r
1241                 /* prach RX for O-DU only */\r
1242                 if(startupConfiguration.appMode == APP_O_DU) {\r
1243                     flowId = XRAN_MAX_ANTENNA_NR * cc_id + ant_id;\r
1244                     for(sym_id = 0; sym_id < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_id++){\r
1245                         if(p_prach_log_buffer[flowId]){\r
1246                             /* (0-79 slots) 10ms of IQs */\r
1247                             pos =  ((char*)p_prach_log_buffer[flowId]) + prach_log_buffer_position[flowId];\r
1248                             ptr = psBbuIo->sFHPrachRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData; //8192 144\r
1249                             if(ptr){\r
1250                                 u32dptr = (uint32_t*)(ptr);\r
1251                                 rte_memcpy(pos, u32dptr, PRACH_PLAYBACK_BUFFER_BYTES);\r
1252                             }else\r
1253                                 printf("ptr ==NULL\n");\r
1254 \r
1255                             prach_log_buffer_position[flowId] += PRACH_PLAYBACK_BUFFER_BYTES;\r
1256 \r
1257                             if(prach_log_buffer_position[flowId] >= prach_log_buffer_size[flowId])\r
1258                                 prach_log_buffer_position[flowId] = 0;\r
1259                         } else {\r
1260                             //printf("flowId %d\n", flowId);\r
1261                         }\r
1262                     }\r
1263                 }\r
1264             }\r
1265 \r
1266             /* SRS RX for O-DU only */\r
1267             if(startupConfiguration.appMode == APP_O_DU) {\r
1268                 for(ant_id = 0; ant_id < XRAN_MAX_ANT_ARRAY_ELM_NR; ant_id++){\r
1269                     flowId = XRAN_MAX_ANT_ARRAY_ELM_NR*cc_id + ant_id;\r
1270                     for(sym_id = 0; sym_id < XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT; sym_id++){\r
1271                         if(p_srs_log_buffer[flowId]){\r
1272                             pos =  ((char*)p_srs_log_buffer[flowId]) + srs_log_buffer_position[flowId];\r
1273                             ptr = psBbuIo->sFHSrsRxBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers[sym_id].pData;\r
1274                             if(ptr){\r
1275                                 u32dptr = (uint32_t*)(ptr);\r
1276                                 rte_memcpy(pos, u32dptr, pXranConf->nULRBs*N_SC_PER_PRB*4);\r
1277                             }else\r
1278                                 printf("ptr ==NULL\n");\r
1279 \r
1280                             srs_log_buffer_position[flowId] += pXranConf->nULRBs*N_SC_PER_PRB*4;\r
1281 \r
1282                             if(srs_log_buffer_position[flowId] >= srs_log_buffer_size[flowId])\r
1283                                 srs_log_buffer_position[flowId] = 0;\r
1284                         } else {\r
1285                             //printf("flowId %d\n", flowId);\r
1286                         }\r
1287                     }\r
1288                 }\r
1289             }\r
1290         }\r
1291     }\r
1292 \r
1293     return 0;\r
1294 }\r
1295 \r
1296 void version_print(void)\r
1297 {\r
1298     char            sysversion[100];\r
1299     char           *compilation_date = __DATE__;\r
1300     char           *compilation_time = __TIME__;\r
1301 \r
1302     uint32_t          nLen;\r
1303     uint32_t          i;\r
1304 \r
1305     snprintf(sysversion, 99, "Version: %s", VERSIONX);\r
1306     nLen = strlen(sysversion);\r
1307 \r
1308     printf("\n\n");\r
1309     printf("===========================================================================================================\n");\r
1310     printf("SAMPLE-APP VERSION\n");\r
1311     printf("===========================================================================================================\n");\r
1312 \r
1313     printf("%s\n", sysversion);\r
1314     printf("build-date: %s\n", compilation_date);\r
1315     printf("build-time: %s\n", compilation_time);\r
1316 }\r
1317 \r
1318 int main(int argc, char *argv[])\r
1319 {\r
1320     int i;\r
1321     int j, len;\r
1322     int  lcore_id = 0;\r
1323     char filename[256];\r
1324     char prefix_name[256];\r
1325     uint32_t nCenterFreq;\r
1326     int32_t xret = 0;\r
1327     struct stat st = {0};\r
1328     uint32_t filenameLength = strlen(argv[1]);\r
1329     char *pCheckName1 = NULL, *pCheckName2 = NULL;\r
1330     enum xran_if_state xran_curr_if_state = XRAN_INIT;\r
1331 \r
1332     uint64_t nMask = (uint64_t)1;\r
1333     uint16_t nCoreUsage[4*64+1];\r
1334     uint16_t nCoreId[4*64];\r
1335     float nTotal = 0.0;\r
1336     uint64_t nTotalTime;\r
1337     uint64_t nUsedTime;\r
1338     uint32_t nCoreUsed;\r
1339     float nUsedPercent;\r
1340 \r
1341 \r
1342     if (argc == 3)\r
1343         errx(2, "Need two argument - the PCI address of the network port");\r
1344     if (filenameLength >= 256)\r
1345     {\r
1346         printf("Config file name input is too long, exiting!\n");\r
1347         exit(-1);\r
1348     }\r
1349 \r
1350     version_print();\r
1351 \r
1352     //add for Klocworks\r
1353     len = strlen(argv[1]) + 1;\r
1354     if (len > (sizeof(filename) - 10))\r
1355         len = (sizeof(filename) - 10);\r
1356     strncpy(filename, argv[1], (sizeof(filename) - 10));\r
1357     filename[len] = '\0';\r
1358 \r
1359     if (xran_is_synchronized() != 0)\r
1360         printf("Machine is not synchronized using PTP!\n");\r
1361     else\r
1362         printf("Machine is synchronized using PTP!\n");\r
1363 \r
1364     memset(&startupConfiguration, 0, sizeof(RuntimeConfig));\r
1365 \r
1366     if (parseConfigFile(filename, (RuntimeConfig*)&startupConfiguration) != 0) {\r
1367         printf("Configuration file error.\n");\r
1368         return -1;\r
1369     }\r
1370 \r
1371     if(startupConfiguration.ant_file[0] == NULL){\r
1372         printf("it looks like test vector for antennas were not provided\n");\r
1373         exit(-1);\r
1374     }\r
1375 \r
1376     if (startupConfiguration.numCC > XRAN_MAX_SECTOR_NR) {\r
1377         printf("Number of cells %d exceeds max number supported %d!\n", startupConfiguration.numCC, XRAN_MAX_SECTOR_NR);\r
1378         startupConfiguration.numCC = XRAN_MAX_SECTOR_NR;\r
1379 \r
1380     }\r
1381     if (startupConfiguration.antElmTRx > XRAN_MAX_ANT_ARRAY_ELM_NR) {\r
1382         printf("Number of Antenna elements %d exceeds max number supported %d!\n", startupConfiguration.antElmTRx, XRAN_MAX_ANT_ARRAY_ELM_NR);\r
1383         startupConfiguration.antElmTRx = XRAN_MAX_ANT_ARRAY_ELM_NR;\r
1384     }\r
1385 \r
1386     numCCPorts = startupConfiguration.numCC;\r
1387     num_eAxc   = startupConfiguration.numAxc;\r
1388 \r
1389     printf("numCCPorts %d num_eAxc%d\n", numCCPorts, num_eAxc);\r
1390 \r
1391     if (startupConfiguration.mu_number <= 1){\r
1392         nFpgaToSW_FTH_RxBufferLen    = 13168; /* 273*12*4 + 64*/\r
1393         nFpgaToSW_PRACH_RxBufferLen  = 8192;\r
1394         nSW_ToFpga_FTH_TxBufferLen   = 13168 + /* 273*12*4 + 64* + ETH AND ORAN HDRs */\r
1395                         XRAN_MAX_SECTIONS_PER_SYM* (RTE_PKTMBUF_HEADROOM + sizeof(struct ether_hdr) +\r
1396                         sizeof(struct xran_ecpri_hdr) +\r
1397                         sizeof(struct radio_app_common_hdr) +\r
1398                         sizeof(struct data_section_hdr));\r
1399     } else if (startupConfiguration.mu_number == 3){\r
1400         nFpgaToSW_FTH_RxBufferLen    = 3328;\r
1401         nFpgaToSW_PRACH_RxBufferLen  = 8192;\r
1402         nSW_ToFpga_FTH_TxBufferLen   = 3328 +\r
1403                         XRAN_MAX_SECTIONS_PER_SYM * (RTE_PKTMBUF_HEADROOM + sizeof(struct ether_hdr) +\r
1404                         sizeof(struct xran_ecpri_hdr) +\r
1405                         sizeof(struct radio_app_common_hdr) +\r
1406                         sizeof(struct data_section_hdr));\r
1407     } else {\r
1408         printf("given numerology is not supported %d\n", startupConfiguration.mu_number);\r
1409         exit(-1);\r
1410     }\r
1411     printf("nSW_ToFpga_FTH_TxBufferLen %d\n", nSW_ToFpga_FTH_TxBufferLen);\r
1412 \r
1413     memset(&xranInit, 0, sizeof(struct xran_fh_init));\r
1414 \r
1415     if(startupConfiguration.appMode == APP_O_DU) {\r
1416         printf("set O-DU\n");\r
1417         xranInit.io_cfg.id = 0;/* O-DU */\r
1418         xranInit.io_cfg.core          = startupConfiguration.io_core;\r
1419         xranInit.io_cfg.system_core   = startupConfiguration.system_core;\r
1420         xranInit.io_cfg.pkt_proc_core = startupConfiguration.pkt_proc_core;\r
1421         xranInit.io_cfg.pkt_aux_core  = startupConfiguration.pkt_aux_core; /* do not start*/\r
1422         xranInit.io_cfg.timing_core   = startupConfiguration.timing_core;\r
1423     } else {\r
1424         printf("set O-RU\n");\r
1425         xranInit.io_cfg.id = 1; /* O-RU*/\r
1426         xranInit.io_cfg.core          = startupConfiguration.io_core;\r
1427         xranInit.io_cfg.system_core   = startupConfiguration.system_core;\r
1428         xranInit.io_cfg.pkt_proc_core = startupConfiguration.pkt_proc_core;\r
1429         xranInit.io_cfg.pkt_aux_core  = startupConfiguration.pkt_aux_core; /* do not start*/\r
1430         xranInit.io_cfg.timing_core   = startupConfiguration.timing_core;\r
1431     }\r
1432 \r
1433     cpu_set_t cpuset;\r
1434     pthread_t thread;\r
1435 \r
1436    thread = pthread_self();\r
1437    CPU_ZERO(&cpuset);\r
1438    CPU_SET(xranInit.io_cfg.system_core,&cpuset);\r
1439    pthread_setaffinity_np(thread, sizeof(cpu_set_t), &cpuset);\r
1440 /*       if (s != 0)\r
1441                handle_error_en(s, "pthread_setaffinity_np");\r
1442 */\r
1443 \r
1444     xranInit.io_cfg.bbdev_mode = XRAN_BBDEV_NOT_USED;\r
1445 \r
1446     if(startupConfiguration.xranCat == XRAN_CATEGORY_A){\r
1447         xranInit.eAxCId_conf.mask_cuPortId      = 0xf000;\r
1448         xranInit.eAxCId_conf.mask_bandSectorId  = 0x0f00;\r
1449         xranInit.eAxCId_conf.mask_ccId          = 0x00f0;\r
1450         xranInit.eAxCId_conf.mask_ruPortId      = 0x000f;\r
1451         xranInit.eAxCId_conf.bit_cuPortId       = 12;\r
1452         xranInit.eAxCId_conf.bit_bandSectorId   = 8;\r
1453         xranInit.eAxCId_conf.bit_ccId           = 4;\r
1454         xranInit.eAxCId_conf.bit_ruPortId       = 0;\r
1455     } else {\r
1456         xranInit.eAxCId_conf.mask_cuPortId      = 0xf000;\r
1457         xranInit.eAxCId_conf.mask_bandSectorId  = 0x0c00;\r
1458         xranInit.eAxCId_conf.mask_ccId          = 0x0300;\r
1459         xranInit.eAxCId_conf.mask_ruPortId      = 0x00ff; /* more than [0-127] eAxC */\r
1460         xranInit.eAxCId_conf.bit_cuPortId       = 12;\r
1461         xranInit.eAxCId_conf.bit_bandSectorId   = 10;\r
1462         xranInit.eAxCId_conf.bit_ccId           = 8;\r
1463         xranInit.eAxCId_conf.bit_ruPortId       = 0;\r
1464     }\r
1465 \r
1466     xranInit.io_cfg.dpdk_dev[XRAN_UP_VF]      = argv[2];\r
1467     xranInit.io_cfg.dpdk_dev[XRAN_CP_VF]      = argv[3];\r
1468     xranInit.mtu           = startupConfiguration.mtu;\r
1469 \r
1470     xranInit.p_o_du_addr = (int8_t *)&startupConfiguration.o_du_addr;\r
1471     xranInit.p_o_ru_addr = (int8_t *)&startupConfiguration.o_ru_addr;\r
1472 \r
1473     snprintf(prefix_name, sizeof(prefix_name), "wls_%d",startupConfiguration.instance_id);\r
1474     xranInit.filePrefix  = prefix_name;\r
1475 \r
1476     xranInit.totalBfWeights = startupConfiguration.totalBfWeights;\r
1477 \r
1478     xranInit.Tadv_cp_dl     = startupConfiguration.Tadv_cp_dl;\r
1479     xranInit.T2a_min_cp_dl  = startupConfiguration.T2a_min_cp_dl;\r
1480     xranInit.T2a_max_cp_dl  = startupConfiguration.T2a_max_cp_dl;\r
1481     xranInit.T2a_min_cp_ul  = startupConfiguration.T2a_min_cp_ul;\r
1482     xranInit.T2a_max_cp_ul  = startupConfiguration.T2a_max_cp_ul;\r
1483     xranInit.T2a_min_up     = startupConfiguration.T2a_min_up;\r
1484     xranInit.T2a_max_up     = startupConfiguration.T2a_max_up;\r
1485     xranInit.Ta3_min        = startupConfiguration.Ta3_min;\r
1486     xranInit.Ta3_max        = startupConfiguration.Ta3_max;\r
1487     xranInit.T1a_min_cp_dl  = startupConfiguration.T1a_min_cp_dl;\r
1488     xranInit.T1a_max_cp_dl  = startupConfiguration.T1a_max_cp_dl;\r
1489     xranInit.T1a_min_cp_ul  = startupConfiguration.T1a_min_cp_ul;\r
1490     xranInit.T1a_max_cp_ul  = startupConfiguration.T1a_max_cp_ul;\r
1491     xranInit.T1a_min_up     = startupConfiguration.T1a_min_up;\r
1492     xranInit.T1a_max_up     = startupConfiguration.T1a_max_up;\r
1493     xranInit.Ta4_min        = startupConfiguration.Ta4_min;\r
1494     xranInit.Ta4_max        = startupConfiguration.Ta4_max;\r
1495 \r
1496     xranInit.enableCP       = startupConfiguration.enableCP;\r
1497     xranInit.prachEnable    = startupConfiguration.enablePrach;\r
1498     xranInit.srsEnable      = startupConfiguration.enableSrs;\r
1499     xranInit.debugStop      = startupConfiguration.debugStop;\r
1500     xranInit.debugStopCount = startupConfiguration.debugStopCount;\r
1501     xranInit.DynamicSectionEna = startupConfiguration.DynamicSectionEna;\r
1502     xranInit.io_cfg.bbdev_mode = XRAN_BBDEV_NOT_USED;\r
1503     xranInit.GPS_Alpha         = startupConfiguration.GPS_Alpha;\r
1504     xranInit.GPS_Beta          = startupConfiguration.GPS_Beta;\r
1505 \r
1506     xranInit.cp_vlan_tag    = startupConfiguration.cp_vlan_tag;\r
1507     xranInit.up_vlan_tag    = startupConfiguration.up_vlan_tag;\r
1508 \r
1509     printf("IQ files size is %d slots\n", startupConfiguration.numSlots);\r
1510 \r
1511     iq_playback_buffer_size_dl = (startupConfiguration.numSlots * N_SYM_PER_SLOT * N_SC_PER_PRB *\r
1512                                  app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nDLBandwidth, startupConfiguration.nDLAbsFrePointA)\r
1513                                  *4L);\r
1514 \r
1515     iq_playback_buffer_size_ul = (startupConfiguration.numSlots * N_SYM_PER_SLOT * N_SC_PER_PRB *\r
1516                                  app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nULBandwidth, startupConfiguration.nULAbsFrePointA)\r
1517                                  *4L);\r
1518 \r
1519 \r
1520     /* 10 * [14*32*273*2*2] = 4892160 bytes */\r
1521     iq_bfw_buffer_size_dl = (startupConfiguration.numSlots * N_SYM_PER_SLOT *  startupConfiguration.antElmTRx *\r
1522                                  app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nDLBandwidth, startupConfiguration.nDLAbsFrePointA)\r
1523                                  *4L);\r
1524 \r
1525     /* 10 * [14*32*273*2*2] = 4892160 bytes */\r
1526     iq_bfw_buffer_size_ul = (startupConfiguration.numSlots * N_SYM_PER_SLOT *\r
1527                                  app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nULBandwidth, startupConfiguration.nULAbsFrePointA)\r
1528                                  *4L);\r
1529 \r
1530     /* 10 * [1*273*2*2] = 349440 bytes */\r
1531     iq_srs_buffer_size_ul = (startupConfiguration.numSlots * N_SYM_PER_SLOT * N_SC_PER_PRB *\r
1532                                  app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nULBandwidth, startupConfiguration.nULAbsFrePointA)\r
1533                                  *4L);\r
1534 \r
1535     for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
1536         p_tx_play_buffer[i]    = (int16_t*)malloc(iq_playback_buffer_size_dl);\r
1537         tx_play_buffer_size[i] = (int32_t)iq_playback_buffer_size_dl;\r
1538 \r
1539         if (p_tx_play_buffer[i] == NULL)\r
1540             exit(-1);\r
1541 \r
1542         tx_play_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.ant_file[i],\r
1543                             "DL IFFT IN IQ Samples in binary format",\r
1544                             (uint8_t*) p_tx_play_buffer[i],\r
1545                             tx_play_buffer_size[i],\r
1546                             1);\r
1547         tx_play_buffer_position[i] = 0;\r
1548     }\r
1549 \r
1550     if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){\r
1551         for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
1552 \r
1553             p_tx_dl_bfw_buffer[i]    = (int16_t*)malloc(iq_bfw_buffer_size_dl);\r
1554             tx_dl_bfw_buffer_size[i] = (int32_t)iq_bfw_buffer_size_dl;\r
1555 \r
1556             if (p_tx_dl_bfw_buffer[i] == NULL)\r
1557                 exit(-1);\r
1558 \r
1559             tx_dl_bfw_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.dl_bfw_file[i],\r
1560                                 "DL BF weights IQ Samples in binary format",\r
1561                                 (uint8_t*) p_tx_dl_bfw_buffer[i],\r
1562                                 tx_dl_bfw_buffer_size[i],\r
1563                                 1);\r
1564             tx_dl_bfw_buffer_position[i] = 0;\r
1565         }\r
1566     }\r
1567 \r
1568     if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){\r
1569 \r
1570         for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
1571             p_tx_ul_bfw_buffer[i]    = (int16_t*)malloc(iq_bfw_buffer_size_ul);\r
1572             tx_ul_bfw_buffer_size[i] = (int32_t)iq_bfw_buffer_size_ul;\r
1573 \r
1574             if (p_tx_ul_bfw_buffer[i] == NULL)\r
1575                 exit(-1);\r
1576 \r
1577             tx_ul_bfw_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.ul_bfw_file[i],\r
1578                                 "UL BF weights IQ Samples in binary format",\r
1579                                 (uint8_t*) p_tx_ul_bfw_buffer[i],\r
1580                                 tx_ul_bfw_buffer_size[i],\r
1581                                 1);\r
1582             tx_ul_bfw_buffer_position[i] = 0;\r
1583         }\r
1584     }\r
1585 \r
1586     if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enablePrach){\r
1587          for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
1588              p_tx_prach_play_buffer[i]    = (int16_t*)malloc(PRACH_PLAYBACK_BUFFER_BYTES);\r
1589              tx_prach_play_buffer_size[i] = (int32_t)PRACH_PLAYBACK_BUFFER_BYTES;\r
1590 \r
1591              if (p_tx_prach_play_buffer[i] == NULL)\r
1592                  exit(-1);\r
1593 \r
1594              memset(p_tx_prach_play_buffer[i], 0, PRACH_PLAYBACK_BUFFER_BYTES);\r
1595 \r
1596              tx_prach_play_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.prach_file[i],\r
1597                                  "PRACH IQ Samples in binary format",\r
1598                                  (uint8_t*) p_tx_prach_play_buffer[i],\r
1599                                  tx_prach_play_buffer_size[i],\r
1600                                  1);\r
1601              tx_prach_play_buffer_position[i] = 0;\r
1602          }\r
1603     }\r
1604 \r
1605     if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enableSrs){\r
1606          for(i = 0;\r
1607              i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);\r
1608              i++) {\r
1609 \r
1610              p_tx_srs_play_buffer[i]    = (int16_t*)malloc(iq_srs_buffer_size_ul);\r
1611              tx_srs_play_buffer_size[i] = (int32_t)iq_srs_buffer_size_ul;\r
1612 \r
1613              if (p_tx_srs_play_buffer[i] == NULL)\r
1614                  exit(-1);\r
1615 \r
1616              memset(p_tx_srs_play_buffer[i], 0, iq_srs_buffer_size_ul);\r
1617              tx_prach_play_buffer_size[i] = sys_load_file_to_buff(startupConfiguration.ul_srs_file[i],\r
1618                                  "SRS IQ Samples in binary format",\r
1619                                  (uint8_t*) p_tx_srs_play_buffer[i],\r
1620                                  tx_srs_play_buffer_size[i],\r
1621                                  1);\r
1622 \r
1623              tx_srs_play_buffer_position[i] = 0;\r
1624          }\r
1625     }\r
1626 \r
1627     /* log of ul */\r
1628     for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
1629 \r
1630         p_rx_log_buffer[i]    = (int16_t*)malloc(iq_playback_buffer_size_ul);\r
1631         rx_log_buffer_size[i] = (int32_t)iq_playback_buffer_size_ul;\r
1632 \r
1633         if (p_rx_log_buffer[i] == NULL)\r
1634             exit(-1);\r
1635 \r
1636         rx_log_buffer_position[i] = 0;\r
1637 \r
1638         memset(p_rx_log_buffer[i], 0, rx_log_buffer_size[i]);\r
1639     }\r
1640 \r
1641     /* log of prach */\r
1642     for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
1643 \r
1644         p_prach_log_buffer[i]    = (int16_t*)malloc(startupConfiguration.numSlots*XRAN_NUM_OF_SYMBOL_PER_SLOT*PRACH_PLAYBACK_BUFFER_BYTES);\r
1645         prach_log_buffer_size[i] = (int32_t)startupConfiguration.numSlots*XRAN_NUM_OF_SYMBOL_PER_SLOT*PRACH_PLAYBACK_BUFFER_BYTES;\r
1646 \r
1647         if (p_prach_log_buffer[i] == NULL)\r
1648             exit(-1);\r
1649 \r
1650         memset(p_prach_log_buffer[i], 0, prach_log_buffer_size[i]);\r
1651         prach_log_buffer_position[i] = 0;\r
1652     }\r
1653 \r
1654     /* log of SRS */\r
1655     if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.enableSrs){\r
1656         for(i = 0;\r
1657             i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);\r
1658             i++) {\r
1659 \r
1660              p_srs_log_buffer[i]    = (int16_t*)malloc(iq_srs_buffer_size_ul);\r
1661              srs_log_buffer_size[i] = (int32_t)iq_srs_buffer_size_ul;\r
1662 \r
1663              if (p_srs_log_buffer[i] == NULL)\r
1664                  exit(-1);\r
1665 \r
1666              memset(p_srs_log_buffer[i], 0, iq_srs_buffer_size_ul);\r
1667              srs_log_buffer_position[i] = 0;\r
1668         }\r
1669     }\r
1670 \r
1671     if (stat("./logs", &st) == -1) {\r
1672         mkdir("./logs", 0777);\r
1673     }\r
1674 \r
1675     for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
1676 \r
1677         snprintf(filename, sizeof(filename), "./logs/%s-play_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"),  i);\r
1678         sys_save_buf_to_file_txt(filename,\r
1679                             "DL IFFT IN IQ Samples in human readable format",\r
1680                             (uint8_t*) p_tx_play_buffer[i],\r
1681                             tx_play_buffer_size[i],\r
1682                             1);\r
1683 \r
1684         snprintf(filename, sizeof(filename),"./logs/%s-play_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
1685         sys_save_buf_to_file(filename,\r
1686                             "DL IFFT IN IQ Samples in binary format",\r
1687                             (uint8_t*) p_tx_play_buffer[i],\r
1688                             tx_play_buffer_size[i]/sizeof(short),\r
1689                             sizeof(short));\r
1690 \r
1691 \r
1692         if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){\r
1693             snprintf(filename, sizeof(filename),"./logs/%s-dl_bfw_ue%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"),  i);\r
1694             sys_save_buf_to_file_txt(filename,\r
1695                                 "DL Beamformig weights IQ Samples in human readable format",\r
1696                                 (uint8_t*) p_tx_dl_bfw_buffer[i],\r
1697                                 tx_dl_bfw_buffer_size[i],\r
1698                                 1);\r
1699 \r
1700             snprintf(filename, sizeof(filename),"./logs/%s-dl_bfw_ue%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
1701             sys_save_buf_to_file(filename,\r
1702                                 "DL Beamformig weightsIQ Samples in binary format",\r
1703                                 (uint8_t*) p_tx_dl_bfw_buffer[i],\r
1704                                 tx_dl_bfw_buffer_size[i]/sizeof(short),\r
1705                                 sizeof(short));\r
1706 \r
1707 \r
1708             snprintf(filename, sizeof(filename), "./logs/%s-ul_bfw_ue%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"),  i);\r
1709             sys_save_buf_to_file_txt(filename,\r
1710                                 "UL Beamformig weights IQ Samples in human readable format",\r
1711                                 (uint8_t*) p_tx_ul_bfw_buffer[i],\r
1712                                 tx_ul_bfw_buffer_size[i],\r
1713                                 1);\r
1714 \r
1715             snprintf(filename, sizeof(filename),"./logs/%s-ul_bfw_ue%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
1716             sys_save_buf_to_file(filename,\r
1717                                 "UL Beamformig weightsIQ Samples in binary format",\r
1718                                 (uint8_t*) p_tx_ul_bfw_buffer[i],\r
1719                                 tx_ul_bfw_buffer_size[i]/sizeof(short),\r
1720                                 sizeof(short));\r
1721 \r
1722         }\r
1723 \r
1724         if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enablePrach){\r
1725             snprintf(filename, sizeof(filename), "./logs/%s-play_prach_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"),  i);\r
1726             sys_save_buf_to_file_txt(filename,\r
1727                                 "PRACH IQ Samples in human readable format",\r
1728                                 (uint8_t*) p_tx_prach_play_buffer[i],\r
1729                                 tx_prach_play_buffer_size[i],\r
1730                                 1);\r
1731 \r
1732             snprintf(filename, sizeof(filename), "./logs/%s-play_prach_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
1733             sys_save_buf_to_file(filename,\r
1734                                 "PRACH IQ Samples in binary format",\r
1735                                 (uint8_t*) p_tx_prach_play_buffer[i],\r
1736                                 tx_prach_play_buffer_size[i]/sizeof(short),\r
1737                                 sizeof(short));\r
1738         }\r
1739     }\r
1740 \r
1741     if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enableSrs && startupConfiguration.xranCat == XRAN_CATEGORY_B){\r
1742        for(i = 0;\r
1743            i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);\r
1744            i++) {\r
1745 \r
1746 \r
1747             snprintf(filename, sizeof(filename), "./logs/%s-play_srs_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"),  i);\r
1748             sys_save_buf_to_file_txt(filename,\r
1749                             "SRS IQ Samples in human readable format",\r
1750                             (uint8_t*) p_tx_srs_play_buffer[i],\r
1751                             tx_srs_play_buffer_size[i],\r
1752                             1);\r
1753 \r
1754             snprintf(filename,sizeof(filename), "./logs/%s-play_srs_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
1755             sys_save_buf_to_file(filename,\r
1756                                 "SRS IQ Samples in binary format",\r
1757                                 (uint8_t*) p_tx_srs_play_buffer[i],\r
1758                                 tx_srs_play_buffer_size[i]/sizeof(short),\r
1759                                 sizeof(short));\r
1760         }\r
1761     }\r
1762 \r
1763     if (startupConfiguration.iqswap == 1){\r
1764         for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
1765             printf("TX: Swap I and Q to match RU format: [%d]\n",i);\r
1766             {\r
1767                 /* swap I and Q */\r
1768                 int32_t j;\r
1769                 signed short *ptr = (signed short *)  p_tx_play_buffer[i];\r
1770                 signed short temp;\r
1771 \r
1772                 for (j = 0; j < (int32_t)(tx_play_buffer_size[i]/sizeof(short)) ; j = j + 2){\r
1773                    temp    = ptr[j];\r
1774                    ptr[j]  = ptr[j + 1];\r
1775                    ptr[j + 1] = temp;\r
1776                 }\r
1777             }\r
1778             if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){\r
1779                 printf("DL BFW: Swap I and Q to match RU format: [%d]\n",i);\r
1780                 {\r
1781                     /* swap I and Q */\r
1782                     int32_t j;\r
1783                     signed short *ptr = (signed short *)  p_tx_dl_bfw_buffer[i];\r
1784                     signed short temp;\r
1785 \r
1786                     for (j = 0; j < (int32_t)(tx_dl_bfw_buffer_size[i]/sizeof(short)) ; j = j + 2){\r
1787                        temp    = ptr[j];\r
1788                        ptr[j]  = ptr[j + 1];\r
1789                        ptr[j + 1] = temp;\r
1790                     }\r
1791                 }\r
1792                 printf("UL BFW: Swap I and Q to match RU format: [%d]\n",i);\r
1793                 {\r
1794                     /* swap I and Q */\r
1795                     int32_t j;\r
1796                     signed short *ptr = (signed short *)  p_tx_ul_bfw_buffer[i];\r
1797                     signed short temp;\r
1798 \r
1799                     for (j = 0; j < (int32_t)(tx_ul_bfw_buffer_size[i]/sizeof(short)) ; j = j + 2){\r
1800                        temp    = ptr[j];\r
1801                        ptr[j]  = ptr[j + 1];\r
1802                        ptr[j + 1] = temp;\r
1803                     }\r
1804                 }\r
1805             }\r
1806         }\r
1807 \r
1808         if (startupConfiguration.appMode == APP_O_RU){\r
1809             for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
1810                 printf("PRACH: Swap I and Q to match RU format: [%d]\n",i);\r
1811                 {\r
1812                     /* swap I and Q */\r
1813                     int32_t j;\r
1814                     signed short *ptr = (signed short *)  p_tx_prach_play_buffer[i];\r
1815                     signed short temp;\r
1816 \r
1817                     for (j = 0; j < (int32_t)(tx_prach_play_buffer_size[i]/sizeof(short)) ; j = j + 2){\r
1818                        temp    = ptr[j];\r
1819                        ptr[j]  = ptr[j + 1];\r
1820                        ptr[j + 1] = temp;\r
1821                     }\r
1822                 }\r
1823             }\r
1824         }\r
1825 \r
1826         if (startupConfiguration.appMode == APP_O_RU){\r
1827             for(i = 0;\r
1828                i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);\r
1829                i++) {\r
1830                  printf("SRS: Swap I and Q to match RU format: [%d]\n",i);\r
1831                 {\r
1832                     /* swap I and Q */\r
1833                     int32_t j;\r
1834                     signed short *ptr = (signed short *)  p_tx_srs_play_buffer[i];\r
1835                     signed short temp;\r
1836 \r
1837                     for (j = 0; j < (int32_t)(tx_srs_play_buffer_size[i]/sizeof(short)) ; j = j + 2){\r
1838                        temp    = ptr[j];\r
1839                        ptr[j]  = ptr[j + 1];\r
1840                        ptr[j + 1] = temp;\r
1841                     }\r
1842                 }\r
1843             }\r
1844         }\r
1845     }\r
1846 \r
1847 #if 0\r
1848     for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
1849 \r
1850         sprintf(filename, "./logs/swap_IQ_play_ant%d.txt", i);\r
1851         sys_save_buf_to_file_txt(filename,\r
1852                             "DL IFFT IN IQ Samples in human readable format",\r
1853                             (uint8_t*) p_tx_play_buffer[i],\r
1854                             tx_play_buffer_size[i],\r
1855                             1);\r
1856     }\r
1857 #endif\r
1858     if (startupConfiguration.nebyteorderswap == 1 && startupConfiguration.compression == 0){\r
1859         for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
1860             printf("TX: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);\r
1861             for (j = 0; j < tx_play_buffer_size[i]/sizeof(short); j++){\r
1862                 p_tx_play_buffer[i][j]  = rte_cpu_to_be_16(p_tx_play_buffer[i][j]);\r
1863             }\r
1864 \r
1865             if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.xranCat == XRAN_CATEGORY_B){\r
1866                 printf("DL BFW: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);\r
1867                 for (j = 0; j < tx_dl_bfw_buffer_size[i]/sizeof(short); j++){\r
1868                     p_tx_dl_bfw_buffer[i][j]  = rte_cpu_to_be_16(p_tx_dl_bfw_buffer[i][j]);\r
1869                 }\r
1870                 printf("UL BFW: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);\r
1871                 for (j = 0; j < tx_ul_bfw_buffer_size[i]/sizeof(short); j++){\r
1872                     p_tx_ul_bfw_buffer[i][j]  = rte_cpu_to_be_16(p_tx_ul_bfw_buffer[i][j]);\r
1873                 }\r
1874             }\r
1875         }\r
1876 \r
1877         if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enablePrach){\r
1878             for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
1879                 printf("PRACH: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);\r
1880                 for (j = 0; j < tx_prach_play_buffer_size[i]/sizeof(short); j++){\r
1881                     p_tx_prach_play_buffer[i][j]  = rte_cpu_to_be_16(p_tx_prach_play_buffer[i][j]);\r
1882                 }\r
1883             }\r
1884         }\r
1885 \r
1886         if (startupConfiguration.appMode == APP_O_RU && startupConfiguration.enableSrs){\r
1887                for(i = 0;\r
1888                i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);\r
1889                i++)  {\r
1890                 printf("SRS: Convert S16 I and S16 Q to network byte order for XRAN Ant: [%d]\n",i);\r
1891                 for (j = 0; j < tx_srs_play_buffer_size[i]/sizeof(short); j++){\r
1892                     p_tx_srs_play_buffer[i][j]  = rte_cpu_to_be_16(p_tx_srs_play_buffer[i][j]);\r
1893                 }\r
1894             }\r
1895         }\r
1896 \r
1897     }\r
1898 \r
1899 #if 0\r
1900     for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
1901 \r
1902         sprintf(filename, "./logs/swap_be_play_ant%d.txt", i);\r
1903         sys_save_buf_to_file_txt(filename,\r
1904                             "DL IFFT IN IQ Samples in human readable format",\r
1905                             (uint8_t*) p_tx_play_buffer[i],\r
1906                             tx_play_buffer_size[i],\r
1907                             1);\r
1908     }\r
1909 #endif\r
1910 \r
1911     memset(&xranConf, 0, sizeof(struct xran_fh_config));\r
1912     pXranConf = &xranConf;\r
1913 \r
1914     pXranConf->nDLRBs = app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nDLBandwidth, startupConfiguration.nDLAbsFrePointA);\r
1915     pXranConf->nULRBs = app_xran_get_num_rbs(startupConfiguration.mu_number, startupConfiguration.nULBandwidth, startupConfiguration.nULAbsFrePointA);\r
1916 \r
1917     if(startupConfiguration.DynamicSectionEna == 0){\r
1918         struct xran_prb_map* pRbMap;\r
1919 \r
1920         pRbMap = &startupConfiguration.PrbMapDl;\r
1921 \r
1922         pRbMap->dir = XRAN_DIR_DL;\r
1923         pRbMap->xran_port = 0;\r
1924         pRbMap->band_id = 0;\r
1925         pRbMap->cc_id = 0;\r
1926         pRbMap->ru_port_id = 0;\r
1927         pRbMap->tti_id = 0;\r
1928         pRbMap->start_sym_id = 0;\r
1929         pRbMap->nPrbElm = 1;\r
1930         pRbMap->prbMap[0].nStartSymb = 0;\r
1931         pRbMap->prbMap[0].numSymb = 14;\r
1932         pRbMap->prbMap[0].nRBStart = 0;\r
1933         pRbMap->prbMap[0].nRBSize = pXranConf->nDLRBs;\r
1934         pRbMap->prbMap[0].nBeamIndex = 0;\r
1935         pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE;\r
1936         pRbMap->prbMap[0].iqWidth    = 16;\r
1937 \r
1938         pRbMap = &startupConfiguration.PrbMapUl;\r
1939         pRbMap->dir = XRAN_DIR_UL;\r
1940         pRbMap->xran_port = 0;\r
1941         pRbMap->band_id = 0;\r
1942         pRbMap->cc_id = 0;\r
1943         pRbMap->ru_port_id = 0;\r
1944         pRbMap->tti_id = 0;\r
1945         pRbMap->start_sym_id = 0;\r
1946         pRbMap->nPrbElm = 1;\r
1947         pRbMap->prbMap[0].nStartSymb = 0;\r
1948         pRbMap->prbMap[0].numSymb = 14;\r
1949         pRbMap->prbMap[0].nRBStart = 0;\r
1950         pRbMap->prbMap[0].nRBSize = pXranConf->nULRBs;\r
1951         pRbMap->prbMap[0].nBeamIndex = 0;\r
1952         pRbMap->prbMap[0].compMethod = XRAN_COMPMETHOD_NONE;\r
1953         pRbMap->prbMap[0].iqWidth    = 16;\r
1954     }\r
1955 \r
1956     timer_set_tsc_freq_from_clock();\r
1957     xret =  xran_init(argc, argv, &xranInit, argv[0], &xranHandle);\r
1958     if(xret != XRAN_STATUS_SUCCESS){\r
1959         printf("xran_init failed %d\n", xret);\r
1960         exit(-1);\r
1961     }\r
1962 \r
1963     if(xranHandle == NULL)\r
1964         exit(1);\r
1965 \r
1966 \r
1967     pXranConf->sector_id                        = 0;\r
1968     pXranConf->nCC                              = numCCPorts;\r
1969     pXranConf->neAxc                            = num_eAxc;\r
1970     pXranConf->neAxcUl                          = startupConfiguration.numUlAxc;\r
1971     pXranConf->nAntElmTRx                       = startupConfiguration.antElmTRx;\r
1972 \r
1973     pXranConf->frame_conf.nFrameDuplexType      = startupConfiguration.nFrameDuplexType;\r
1974     pXranConf->frame_conf.nNumerology           = startupConfiguration.mu_number;\r
1975     pXranConf->frame_conf.nTddPeriod            = startupConfiguration.nTddPeriod;\r
1976 \r
1977     for (i = 0; i < startupConfiguration.nTddPeriod; i++){\r
1978         pXranConf->frame_conf.sSlotConfig[i] = startupConfiguration.sSlotConfig[i];\r
1979     }\r
1980 \r
1981     pXranConf->prach_conf.nPrachSubcSpacing     = startupConfiguration.mu_number;\r
1982     pXranConf->prach_conf.nPrachFreqStart       = 0;\r
1983     pXranConf->prach_conf.nPrachFilterIdx       = XRAN_FILTERINDEX_PRACH_ABC;\r
1984     pXranConf->prach_conf.nPrachConfIdx         = startupConfiguration.prachConfigIndex;\r
1985     pXranConf->prach_conf.nPrachFreqOffset      = -792;\r
1986 \r
1987     pXranConf->srs_conf.symbMask                 = startupConfiguration.srsSymMask;\r
1988     pXranConf->srs_conf.eAxC_offset             = 2 * startupConfiguration.numAxc; /* PUSCH, PRACH, SRS */\r
1989 \r
1990     pXranConf->ru_conf.xranCat                  = startupConfiguration.xranCat;\r
1991     pXranConf->ru_conf.iqWidth                  = startupConfiguration.PrbMapDl.prbMap[0].iqWidth;\r
1992 \r
1993     if (startupConfiguration.compression == 0)\r
1994         pXranConf->ru_conf.compMeth                 = XRAN_COMPMETHOD_NONE;\r
1995     else\r
1996         pXranConf->ru_conf.compMeth                 = XRAN_COMPMETHOD_BLKFLOAT;\r
1997 \r
1998     pXranConf->ru_conf.fftSize                  = 0;\r
1999     while (startupConfiguration.nULFftSize >>= 1)\r
2000         ++pXranConf->ru_conf.fftSize;\r
2001 \r
2002     pXranConf->ru_conf.byteOrder = (startupConfiguration.nebyteorderswap == 1) ? XRAN_NE_BE_BYTE_ORDER : XRAN_CPU_LE_BYTE_ORDER  ;\r
2003     pXranConf->ru_conf.iqOrder   = (startupConfiguration.iqswap == 1) ? XRAN_Q_I_ORDER : XRAN_I_Q_ORDER;\r
2004 \r
2005     printf("FFT Order %d\n", pXranConf->ru_conf.fftSize);\r
2006 \r
2007     nCenterFreq = startupConfiguration.nDLAbsFrePointA + (((pXranConf->nDLRBs * N_SC_PER_PRB) / 2) * app_xran_get_scs(startupConfiguration.mu_number));\r
2008     pXranConf->nDLCenterFreqARFCN = app_xran_cal_nrarfcn(nCenterFreq);\r
2009     printf("DL center freq %d DL NR-ARFCN  %d\n", nCenterFreq, pXranConf->nDLCenterFreqARFCN);\r
2010 \r
2011     nCenterFreq = startupConfiguration.nULAbsFrePointA + (((pXranConf->nULRBs * N_SC_PER_PRB) / 2) * app_xran_get_scs(startupConfiguration.mu_number));\r
2012     pXranConf->nULCenterFreqARFCN = app_xran_cal_nrarfcn(nCenterFreq);\r
2013     printf("UL center freq %d UL NR-ARFCN  %d\n", nCenterFreq, pXranConf->nULCenterFreqARFCN);\r
2014 \r
2015     pXranConf->bbdev_dec = NULL;\r
2016     pXranConf->bbdev_enc = NULL;\r
2017 \r
2018     pXranConf->log_level = 1;\r
2019 \r
2020     if(startupConfiguration.maxFrameId)\r
2021         pXranConf->ru_conf.xran_max_frame = startupConfiguration.maxFrameId;\r
2022 \r
2023     if(init_xran() != 0)\r
2024         exit(-1);\r
2025 \r
2026     xran_reg_physide_cb(xranHandle, physide_dl_tti_call_back, NULL, 10, XRAN_CB_TTI);\r
2027     xran_reg_physide_cb(xranHandle, physide_ul_half_slot_call_back, NULL, 10, XRAN_CB_HALF_SLOT_RX);\r
2028     xran_reg_physide_cb(xranHandle, physide_ul_full_slot_call_back, NULL, 10, XRAN_CB_FULL_SLOT_RX);\r
2029 \r
2030     init_xran_iq_content();\r
2031 \r
2032     xret = xran_open(xranHandle, pXranConf);\r
2033 \r
2034     if(xret != XRAN_STATUS_SUCCESS){\r
2035         printf("xran_open failed %d\n", xret);\r
2036         exit(-1);\r
2037     }\r
2038 \r
2039     snprintf(filename, sizeof(filename),"mlog-%s", startupConfiguration.appMode == 0 ? "o-du" : "o-ru");\r
2040 \r
2041     /* MLogOpen(0, 32, 0, 0xFFFFFFFF, filename);*/\r
2042 \r
2043     MLogOpen(256, 3, 20000, 0, filename);\r
2044     MLogSetMask(0);\r
2045 \r
2046     puts("----------------------------------------");\r
2047     printf("MLog Info: virt=0x%016lx size=%d\n", MLogGetFileLocation(), MLogGetFileSize());\r
2048     puts("----------------------------------------");\r
2049 \r
2050 \r
2051     uint64_t nActiveCoreMask[MAX_BBU_POOL_CORE_MASK] = {0};\r
2052      nActiveCoreMask[0] = 1 << xranInit.io_cfg.timing_core;\r
2053     uint32_t numCarriers = startupConfiguration.numCC;\r
2054 \r
2055     MLogAddTestCase(nActiveCoreMask, numCarriers);\r
2056 \r
2057     fcntl(0, F_SETFL, fcntl(0, F_GETFL) | O_NONBLOCK);\r
2058 \r
2059     state = APP_RUNNING;\r
2060     printf("Start XRAN traffic\n");\r
2061     xran_start(xranHandle);\r
2062     sleep(3);\r
2063     print_menu();\r
2064     for (;;) {\r
2065         struct xran_common_counters x_counters;\r
2066         char input[10];\r
2067         sleep(1);\r
2068         xran_curr_if_state = xran_get_if_state();\r
2069         if(xran_get_common_counters(xranHandle, &x_counters) == XRAN_STATUS_SUCCESS) {\r
2070 \r
2071             xran_get_time_stats(&nTotalTime, &nUsedTime, &nCoreUsed, 1);\r
2072             nUsedPercent = ((float)nUsedTime * 100.0) / (float)nTotalTime;\r
2073 \r
2074             printf("[%s][rx %ld pps %ld kbps %ld][tx %ld pps %ld kbps %ld] [on_time %ld early %ld late %ld corrupt %ld pkt_dupl %ld Total %ld] IO Util: %5.2f %%\n",\r
2075                    ((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"),\r
2076                    rx_counter,\r
2077                    rx_counter-old_rx_counter,\r
2078                    rx_bytes_per_sec*8/1000L,\r
2079                    tx_counter,\r
2080                    tx_counter-old_tx_counter,\r
2081                    tx_bytes_per_sec*8/1000L,\r
2082                    x_counters.Rx_on_time,\r
2083                    x_counters.Rx_early,\r
2084                    x_counters.Rx_late,\r
2085                    x_counters.Rx_corrupt,\r
2086                    x_counters.Rx_pkt_dupl,\r
2087                    x_counters.Total_msgs_rcvd,\r
2088                    nUsedPercent);\r
2089 \r
2090             if(rx_counter > old_rx_counter)\r
2091                 old_rx_counter = rx_counter;\r
2092             if(tx_counter > old_tx_counter)\r
2093                 old_tx_counter = tx_counter;\r
2094 \r
2095             if(rx_counter > 0 && tx_counter > 0)\r
2096                 MLogSetMask(0xFFFFFFFF);\r
2097         } else {\r
2098             printf("error xran_get_common_counters\n");\r
2099         }\r
2100 \r
2101         if (xran_curr_if_state == XRAN_STOPPED){\r
2102             break;\r
2103         }\r
2104         if (NULL == fgets(input, 10, stdin)) {\r
2105             continue;\r
2106         }\r
2107 \r
2108         const int sel_opt = atoi(input);\r
2109         switch (sel_opt) {\r
2110             case 1:\r
2111                 xran_start(xranHandle);\r
2112                 printf("Start XRAN traffic\n");\r
2113                 break;\r
2114             case 2:\r
2115                 break;\r
2116             case 3:\r
2117                 xran_stop(xranHandle);\r
2118                 printf("Stop XRAN traffic\n");\r
2119                 state = APP_STOPPED;\r
2120                 break;\r
2121             default:\r
2122                 puts("Wrong option passed!");\r
2123                 break;\r
2124         }\r
2125         if (APP_STOPPED == state)\r
2126             break;\r
2127     }\r
2128 \r
2129     get_xran_iq_content();\r
2130 \r
2131     puts("Closing l1 app... Ending all threads...");\r
2132     xran_close(xranHandle);\r
2133     MLogPrint(NULL);\r
2134 \r
2135     stop_xran();\r
2136     puts("Dump IQs...");\r
2137 \r
2138     if (startupConfiguration.iqswap == 1){\r
2139         for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
2140             printf("RX: Swap I and Q to match CPU format: [%d]\n",i);\r
2141             {\r
2142                 /* swap I and Q */\r
2143                 int32_t j;\r
2144                 signed short *ptr = (signed short *)  p_rx_log_buffer[i];\r
2145                 signed short temp;\r
2146 \r
2147                 for (j = 0; j < (int32_t)(rx_log_buffer_size[i]/sizeof(short)) ; j = j + 2){\r
2148                    temp    = ptr[j];\r
2149                    ptr[j]  = ptr[j + 1];\r
2150                    ptr[j + 1] = temp;\r
2151                 }\r
2152             }\r
2153         }\r
2154 \r
2155         if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.enableSrs){\r
2156             for(i = 0;\r
2157             i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);\r
2158             i++)  {\r
2159                 printf("SRS: Swap I and Q to match CPU format: [%d]\n",i);\r
2160                 {\r
2161                     /* swap I and Q */\r
2162                     int32_t j;\r
2163                     signed short *ptr = (signed short *)  p_srs_log_buffer[i];\r
2164                     signed short temp;\r
2165 \r
2166                     for (j = 0; j < (int32_t)(srs_log_buffer_size[i]/sizeof(short)) ; j = j + 2){\r
2167                        temp    = ptr[j];\r
2168                        ptr[j]  = ptr[j + 1];\r
2169                        ptr[j + 1] = temp;\r
2170                     }\r
2171                 }\r
2172             }\r
2173         }\r
2174     }\r
2175 \r
2176     if (startupConfiguration.nebyteorderswap == 1 && startupConfiguration.compression == 0) {\r
2177 \r
2178         for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
2179             printf("RX: Convert S16 I and S16 Q to cpu byte order from XRAN Ant: [%d]\n",i);\r
2180             for (j = 0; j < rx_log_buffer_size[i]/sizeof(short); j++){\r
2181                 p_rx_log_buffer[i][j]  = rte_be_to_cpu_16(p_rx_log_buffer[i][j]);\r
2182             }\r
2183         }\r
2184 \r
2185         if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.enableSrs){\r
2186             for(i = 0;\r
2187             i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);\r
2188             i++)  {\r
2189                 printf("SRS: Convert S16 I and S16 Q to cpu byte order from XRAN Ant: [%d]\n",i);\r
2190                 for (j = 0; j < srs_log_buffer_size[i]/sizeof(short); j++){\r
2191                     p_srs_log_buffer[i][j]  = rte_be_to_cpu_16(p_srs_log_buffer[i][j]);\r
2192                 }\r
2193             }\r
2194         }\r
2195     }\r
2196 \r
2197     for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
2198 \r
2199         snprintf(filename, sizeof(filename), "./logs/%s-rx_log_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"),  i);\r
2200         sys_save_buf_to_file_txt(filename,\r
2201                             "UL FFT OUT IQ Samples in human readable format",\r
2202                             (uint8_t*) p_rx_log_buffer[i],\r
2203                             rx_log_buffer_size[i],\r
2204                             1);\r
2205 \r
2206         snprintf(filename, sizeof(filename), "./logs/%s-rx_log_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
2207         sys_save_buf_to_file(filename,\r
2208                             "UL FFT OUT IQ Samples in binary format",\r
2209                             (uint8_t*) p_rx_log_buffer[i],\r
2210                             rx_log_buffer_size[i]/sizeof(short),\r
2211                             sizeof(short));\r
2212     }\r
2213 \r
2214     if (startupConfiguration.appMode == APP_O_DU && startupConfiguration.enableSrs){\r
2215         for(i = 0;\r
2216         i < MAX_ANT_CARRIER_SUPPORTED_CAT_B && i < (uint32_t)(numCCPorts * startupConfiguration.antElmTRx);\r
2217         i++) {\r
2218             snprintf(filename, sizeof(filename), "./logs/%s-srs_log_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"),  i);\r
2219             sys_save_buf_to_file_txt(filename,\r
2220                                 "SRS UL FFT OUT IQ Samples in human readable format",\r
2221                                 (uint8_t*) p_srs_log_buffer[i],\r
2222                                 srs_log_buffer_size[i],\r
2223                                 1);\r
2224 \r
2225             snprintf(filename, sizeof(filename),  "./logs/%s-srs_log_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
2226             sys_save_buf_to_file(filename,\r
2227                                 "SRS UL FFT OUT IQ Samples in binary format",\r
2228                                 (uint8_t*) p_srs_log_buffer[i],\r
2229                                 srs_log_buffer_size[i]/sizeof(short),\r
2230                                 sizeof(short));\r
2231         }\r
2232     }\r
2233 \r
2234     if (startupConfiguration.appMode == APP_O_DU &&  startupConfiguration.enablePrach){\r
2235         if (startupConfiguration.iqswap == 1){\r
2236             for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
2237                 printf("PRACH: Swap I and Q to match CPU format: [%d]\n",i);\r
2238                 {\r
2239                     /* swap I and Q */\r
2240                     int32_t j;\r
2241                     signed short *ptr = (signed short *)  p_prach_log_buffer[i];\r
2242                     signed short temp;\r
2243 \r
2244                     for (j = 0; j < (int32_t)(prach_log_buffer_size[i]/sizeof(short)) ; j = j + 2){\r
2245                        temp    = ptr[j];\r
2246                        ptr[j]  = ptr[j + 1];\r
2247                        ptr[j + 1] = temp;\r
2248                     }\r
2249                 }\r
2250             }\r
2251         }\r
2252 \r
2253 \r
2254         if (startupConfiguration.nebyteorderswap == 1 && startupConfiguration.compression == 0){\r
2255             for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
2256                 printf("PRACH: Convert S16 I and S16 Q to cpu byte order from XRAN Ant: [%d]\n",i);\r
2257                 for (j = 0; j < prach_log_buffer_size[i]/sizeof(short); j++){\r
2258                     p_prach_log_buffer[i][j]  = rte_be_to_cpu_16(p_prach_log_buffer[i][j]);\r
2259                 }\r
2260             }\r
2261         }\r
2262 \r
2263 \r
2264         for (i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts * num_eAxc); i++) {\r
2265 \r
2266             snprintf(filename, sizeof(filename), "./logs/%s-prach_log_ant%d.txt",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"),  i);\r
2267             sys_save_buf_to_file_txt(filename,\r
2268                                 "PRACH FFT OUT IQ Samples in human readable format",\r
2269                                 (uint8_t*) p_prach_log_buffer[i],\r
2270                                 prach_log_buffer_size[i],\r
2271                                 1);\r
2272 \r
2273             snprintf(filename, sizeof(filename), "./logs/%s-prach_log_ant%d.bin",((startupConfiguration.appMode == APP_O_DU) ? "o-du" : "o-ru"), i);\r
2274             sys_save_buf_to_file(filename,\r
2275                                 "PRACH FFT OUT IQ Samples in binary format",\r
2276                                 (uint8_t*) p_prach_log_buffer[i],\r
2277                                 prach_log_buffer_size[i]/sizeof(short),\r
2278                                 sizeof(short));\r
2279         }\r
2280     }\r
2281 \r
2282     return 0;\r
2283 }\r