[Epic-ID: ODUHIGH-538][Issue-ID: ODUHIGH-567] Fixes to read MAC Cell configuration...
[o-du/l2.git] / build / config / odu_config.xml
index fa94416..a43b8a3 100644 (file)
       <DEST_F1_EGTP_PORT>2152</DEST_F1_EGTP_PORT>
       <MIN_TEID>1</MIN_TEID>
    </EGTP>
+   <SIB1_PARAMS>
+      <PLMN>
+         <MCC>
+            <PLMN_MCC0>3</PLMN_MCC0>
+            <PLMN_MCC1>1</PLMN_MCC1>
+            <PLMN_MCC2>1</PLMN_MCC2>
+         </MCC>
+         <MNC>
+         <PLMN_MNC0>4</PLMN_MNC0>
+         <PLMN_MNC1>8</PLMN_MNC1>
+         <PLMN_MNC2>0</PLMN_MNC2>
+         </MNC>
+      </PLMN>
+      <TAC>1</TAC>
+      <RANAC>1</RANAC>
+      <CELL_IDENTITY>1</CELL_IDENTITY>
+      <CELL_RESVD_OPUSE>1</CELL_RESVD_OPUSE>
+      <CONN_EST_FAIL_CNT>2</CONN_EST_FAIL_CNT>
+      <CONN_EST_FAIL_OFF_VALID>7</CONN_EST_FAIL_OFF_VALID>
+      <CONN_EST_FAIL_OFFSET>15</CONN_EST_FAIL_OFFSET>
+      <SI_SHED_INFO>
+         <WIN_LEN>0</WIN_LEN>
+         <BROADCAST_STATUS>0</BROADCAST_STATUS>
+         <PERIODICITY>0</PERIODICITY>
+         <SIB_TYPE>0</SIB_TYPE>
+         <SIB1_VALUE_TAG>10</SIB1_VALUE_TAG>
+      </SI_SHED_INFO>
+      <SRV_CELL_CFG_COM_SIB>
+         <NR_SCS>0</NR_SCS>
+         <SSB_POS_INBURST>192</SSB_POS_INBURST>
+         <SSB_PERIODICITY>20</SSB_PERIODICITY>
+         <SSB_PBCH_PWR>0</SSB_PBCH_PWR>
+         <DL_CFG_COMMON>
+            <NR_FREQ_BAND>1</NR_FREQ_BAND>
+            <OFFSET_TO_POINT_A>24</OFFSET_TO_POINT_A>
+            <FREQ_LOC_BW>28875</FREQ_LOC_BW>
+            <SCS_SPEC_CARRIER>
+               <SSB_SUBCARRIER_OFFSET>0</SSB_SUBCARRIER_OFFSET>
+               <NR_SCS>0</NR_SCS>
+               <SCS_BW>20</SCS_BW>
+            </SCS_SPEC_CARRIER>
+            <PDCCH_CFG_COMMON>
+               <PRESENT>2</PRESENT>
+               <CORESET_0_INDEX>0</CORESET_0_INDEX>
+               <SEARCHSPACE_0_INDEX>0</SEARCHSPACE_0_INDEX>
+               <PDCCH_SEARCH_SPACE_ID>1</PDCCH_SEARCH_SPACE_ID>
+               <PDCCH_CTRL_RSRC_SET_ID>0</PDCCH_CTRL_RSRC_SET_ID>
+               <MONITOR_SLOT_PERIOD_OFFSET_PRESENT>1</MONITOR_SLOT_PERIOD_OFFSET_PRESENT>
+               <MONITOR_LIST>
+                  <MONITOR_SYMBOL_IN_SLOT>128</MONITOR_SYMBOL_IN_SLOT>
+                  <MONITOR_SYMBOL_IN_SLOT>0</MONITOR_SYMBOL_IN_SLOT>
+               </MONITOR_LIST>
+               <NUM_CANDIDATE_AGG_LVL_1>7</NUM_CANDIDATE_AGG_LVL_1>
+               <NUM_CANDIDATE_AGG_LVL_2>4</NUM_CANDIDATE_AGG_LVL_2>
+               <NUM_CANDIDATE_AGG_LVL_4>2</NUM_CANDIDATE_AGG_LVL_4>
+               <NUM_CANDIDATE_AGG_LVL_8>1</NUM_CANDIDATE_AGG_LVL_8>
+               <NUM_CANDIDATE_AGG_LVL_16>0</NUM_CANDIDATE_AGG_LVL_16>
+               <SEARCH_SPACE_TYPE>1</SEARCH_SPACE_TYPE>
+               <PDCCH_SEARCH_SPACE_DCI_FORMAT>0</PDCCH_SEARCH_SPACE_DCI_FORMAT>
+               <PDCCH_SEARCH_SPACE_ID_SIB1>1</PDCCH_SEARCH_SPACE_ID_SIB1>
+               <PDCCH_SEARCH_SPACE_ID_PAGING>1</PDCCH_SEARCH_SPACE_ID_PAGING>
+               <PDCCH_SEARCH_SPACE_ID_RA>1</PDCCH_SEARCH_SPACE_ID_RA>
+            </PDCCH_CFG_COMMON>
+            <PDSCH_CFG_COMMON>
+               <PRESENT>2</PRESENT>
+               <NUM_TIME_DOM_RSRS_ALLOC>2</NUM_TIME_DOM_RSRS_ALLOC>
+               <PDSCH_TIME_DOM_RSRC_ALLOC_LIST>
+                  <PDSCH_TIME_DOM_RSRC_ALLOC>
+                     <K0>0</K0>
+                     <MAP_TYPE>0</MAP_TYPE>
+                     <PDSCH_START_SYMBOL>3</PDSCH_START_SYMBOL>
+                     <PDSCH_LENGTH_SYMBOL>11</PDSCH_LENGTH_SYMBOL>
+                  </PDSCH_TIME_DOM_RSRC_ALLOC>
+                  <PDSCH_TIME_DOM_RSRC_ALLOC>
+                     <K0>1</K0>
+                     <MAP_TYPE>0</MAP_TYPE>
+                     <PDSCH_START_SYMBOL>3</PDSCH_START_SYMBOL>
+                     <PDSCH_LENGTH_SYMBOL>11</PDSCH_LENGTH_SYMBOL>
+                  </PDSCH_TIME_DOM_RSRC_ALLOC>
+               </PDSCH_TIME_DOM_RSRC_ALLOC_LIST>
+            </PDSCH_CFG_COMMON>
+            <BCCH_CFG>
+               <MOB_PRD_COEFF>3</MOB_PRD_COEFF>
+            </BCCH_CFG>
+            <PCCH_CFG>
+               <DEFAULT_PAGING_CYCLE>256</DEFAULT_PAGING_CYCLE>
+               <NAND_PAGING_FRAME_OFFSET>1</NAND_PAGING_FRAME_OFFSET>
+               <PAGE_FRAME_OFFSET>0</PAGE_FRAME_OFFSET>
+               <NS>1</NS>
+               <FIRST_PDCCH_MONITORING_TYPE>2</FIRST_PDCCH_MONITORING_TYPE>
+               <FIRST_PDCCH_LIST>
+                  <FIRST_PDCCH_MONITORING_INFO>44</FIRST_PDCCH_MONITORING_INFO>
+               </FIRST_PDCCH_LIST>
+            </PCCH_CFG>
+         </DL_CFG_COMMON>
+         <UL_CFG_COMMON>
+            <NR_FREQ_BAND>1</NR_FREQ_BAND>
+            <UL_P_MAX>23</UL_P_MAX>
+            <FREQ_LOC_BW>28875</FREQ_LOC_BW>
+            <TIME_ALLIGN_TIMER_COMM>7</TIME_ALLIGN_TIMER_COMM>
+            <SCS_SPEC_CARRIER>
+               <SSB_SUBCARRIER_OFFSET>0</SSB_SUBCARRIER_OFFSET>
+               <NR_SCS>0</NR_SCS>
+               <SCS_BW>20</SCS_BW>
+            </SCS_SPEC_CARRIER>
+            <RACH_CFG_COMMON>
+               <PRESENT>2</PRESENT>
+               <PRACH_CONFIG_IDX>16</PRACH_CONFIG_IDX>
+               <MSG_1_FDM>0</MSG_1_FDM>
+               <MAX_NUM_RB>106</MAX_NUM_RB>
+               <PRACH_MAX_PRB>24</PRACH_MAX_PRB>
+               <ZERO_CORRELATION_ZONE_CFG>4</ZERO_CORRELATION_ZONE_CFG>
+               <PRACH_PREAMBLE_RCVD_TGT_PWR>-74</PRACH_PREAMBLE_RCVD_TGT_PWR>
+               <PREAMBLE_TRANS_MAX>10</PREAMBLE_TRANS_MAX>
+               <PWR_RAMPING_STEP>1</PWR_RAMPING_STEP>
+               <RA_RSP_WINDOW>4</RA_RSP_WINDOW>
+               <NUM_RA_PREAMBLE>63</NUM_RA_PREAMBLE>
+               <NUM_SSB_PER_RACH_OCC>4</NUM_SSB_PER_RACH_OCC>
+               <CB_PREAMBLE_PER_SSB>8</CB_PREAMBLE_PER_SSB>
+               <CONT_RES_TIMER>7</CONT_RES_TIMER>
+               <RSRP_THRESHOLD_SSB>31</RSRP_THRESHOLD_SSB>
+               <ROOT_SEQ_IDX_PRESENT>2</ROOT_SEQ_IDX_PRESENT>
+               <ROOT_SEQ_IDX>0</ROOT_SEQ_IDX>
+               <PRACH_SUBCARRIER_SPACING>0</PRACH_SUBCARRIER_SPACING>
+               <PRACH_RESTRICTED_SET_CFG>0</PRACH_RESTRICTED_SET_CFG>
+            </RACH_CFG_COMMON>
+            <PUSCH_CFG_COMMON>
+               <PUSCH_CFG_PRESENT>2</PUSCH_CFG_PRESENT>
+               <PUSCH_MSG3_DELTA_PREAMBLE>0</PUSCH_MSG3_DELTA_PREAMBLE>
+               <PUSCH_P0_NOMINAL_WITH_GRANT>-70</PUSCH_P0_NOMINAL_WITH_GRANT>
+               <NUM_TIME_DOM_RSRC_ALLOC>2</NUM_TIME_DOM_RSRC_ALLOC>
+               <PUSCH_TIME_DOM_RSRC_ALLOC_LIST>
+                  <PUSCH_TIME_DOM_RSRC_ALLOC>
+                     <K2>4</K2>
+                     <MAP_TYPE>0</MAP_TYPE>
+                     <PUSCH_START_SYMBOL>3</PUSCH_START_SYMBOL>
+                     <PUSCH_LENGTH_SYMBOL>11</PUSCH_LENGTH_SYMBOL>
+                  </PUSCH_TIME_DOM_RSRC_ALLOC>
+                  <PUSCH_TIME_DOM_RSRC_ALLOC>
+                     <K2>5</K2>
+                     <MAP_TYPE>0</MAP_TYPE>
+                     <PUSCH_START_SYMBOL>3</PUSCH_START_SYMBOL>
+                     <PUSCH_LENGTH_SYMBOL>11</PUSCH_LENGTH_SYMBOL>
+                  </PUSCH_TIME_DOM_RSRC_ALLOC>
+               </PUSCH_TIME_DOM_RSRC_ALLOC_LIST>
+            </PUSCH_CFG_COMMON>
+            <PUCCH_CFG_COMMON>
+               <PRESENT>2</PRESENT>
+               <PUCCH_RSRC_COMMON>0</PUCCH_RSRC_COMMON>
+               <GRP_HOP>0</GRP_HOP>
+               <PUCCH_P0_NOMINAL>-74</PUCCH_P0_NOMINAL>
+            </PUCCH_CFG_COMMON>
+         </UL_CFG_COMMON>
+         <TDD_UL_DL_CFG_COMMON>
+            <REF_SCS>1</REF_SCS>
+            <TX_PRD>6</TX_PRD>
+            <NUM_DL_SLOTS>7</NUM_DL_SLOTS>
+            <NUM_DL_SYMBOLS>12</NUM_DL_SYMBOLS>
+            <NUM_UL_SLOTS>2</NUM_UL_SLOTS>
+            <NUM_UL_SYMBOLS>1</NUM_UL_SYMBOLS>
+         </TDD_UL_DL_CFG_COMMON>
+      </SRV_CELL_CFG_COM_SIB>
+   </SIB1_PARAMS>
    <F1_DU_SRVD_CELL_INFO>
       <F1_DU_CELL_INFO>
          <F1_CELL_INFO>
          </F1_BRDCST_PLMN_INFO>
       </F1_DU_CELL_INFO>
    </F1_DU_SRVD_CELL_INFO>
-   <F1_RRC_VERSION>
-      <RRC_VER>0</RRC_VER>
-      <EXT_RRC_VER>5</EXT_RRC_VER>
-   </F1_RRC_VERSION>
+   <MIB_PARAMS>
+      <SYS_FRAME_NUM>0</SYS_FRAME_NUM>
+      <SUB_CARR_SPACE>0</SUB_CARR_SPACE>
+      <SSB_SC_OFFSET>0</SSB_SC_OFFSET>
+      <DMRS_TYPEA_POSITION>0</DMRS_TYPEA_POSITION>
+      <CORESET_0_INDEX>0</CORESET_0_INDEX>
+      <SEARCHSPACE_0_INDEX>0</SEARCHSPACE_0_INDEX>
+      <CELL_BARRED>1</CELL_BARRED>
+      <INTRA_FREQ_RESELECT>1</INTRA_FREQ_RESELECT>
+   </MIB_PARAMS>
    <MAC_CELL_CFG>
       <CELL_ID>1</CELL_ID>
       <CARRIER_CFG>
             <F1_SLICE_SUPP_LST>
                <NUM_SUPPORT_SLICE>2</NUM_SUPPORT_SLICE>
                <SNSSAI_LIST>
-                     <NUM_NSSAI>2</NUM_NSSAI>
-                     <LIST>
-                     <SNSSAI>
-                        <SST>1</SST>
-                        <SD_SIZE>
+                  <SNSSAI>
+                     <SST>1</SST>
+                     <SD_SIZE>
                         <SD>2</SD>
                         <SD>3</SD>
                         <SD>4</SD>
-                        </SD_SIZE>
-                     </SNSSAI>
-                     <SNSSAI>
-                        <SST>5</SST>
-                        <SD_SIZE>
+                     </SD_SIZE>
+                  </SNSSAI>
+                  <SNSSAI>
+                     <SST>5</SST>
+                     <SD_SIZE>
                         <SD>6</SD>
                         <SD>7</SD>
                         <SD>8</SD>
-                        </SD_SIZE>
-                     </SNSSAI>
-                     </LIST>
-                  </SNSSAI_LIST>
+                     </SD_SIZE>
+                  </SNSSAI>
+               </SNSSAI_LIST>
             </F1_SLICE_SUPP_LST>
          </PLMN_INFO>
          <NR_PCI>1</NR_PCI>
                      <AGG_LEVEL16>0</AGG_LEVEL16>
                   </CANDIDATE_INFO>
                </SEARCH_SPACE_CFG>
-               <SEARCHSPACE_1_INDEX>1</SEARCHSPACE_1_INDEX>
+               <RA_SEARCH_SPACE_INDEX>1</RA_SEARCH_SPACE_INDEX>
             </PDCCH_CFG_COMMON>
             <PDSCH_CFG_COMMON>
                <NUM_TIME_DOM_RSRC_ALLOC>2</NUM_TIME_DOM_RSRC_ALLOC>
                <PDSCH_COMM_TIME_ALLOC_LIST>
-                  <LIST>
                   <PDSCH_COMM_TIME_ALLOC>
                      <PDSCH_K0_CFG>0</PDSCH_K0_CFG>
                      <PDSCH_MAPPING_TYPE>0</PDSCH_MAPPING_TYPE>
                      <PDSCH_START_SYMBOL>3</PDSCH_START_SYMBOL>
                      <PDSCH_LENGTH_SYMBOL>11</PDSCH_LENGTH_SYMBOL>
                   </PDSCH_COMM_TIME_ALLOC>
-                  </LIST>
                </PDSCH_COMM_TIME_ALLOC_LIST>
             </PDSCH_CFG_COMMON>
          </BWP_DL_CFG>
          <BWP_UL_CFG>
             <BWP_PARAMS>
                <FIRST_PRB>0</FIRST_PRB>
-               <TOTAL_PRB_20MHZ_MU0>106</TOTAL_PRB_20MHZ_MU0>
+               <NUM_PRB>106</NUM_PRB>
                <NR_SCS>0</NR_SCS>
                <NORMAL_CYCLIC_PREFIX>0</NORMAL_CYCLIC_PREFIX>
             </BWP_PARAMS>
             <PUSCH_CFG_COMMON>
                <NUM_TIME_DOM_RSRC_ALLOC>2</NUM_TIME_DOM_RSRC_ALLOC>
                <PUSCH_COMM_TIME_ALLOC_LIST>
-                  <LIST>
                   <PUSCH_COMM_TIME_ALLOC>
-                     <PUSCH_K2_CFG>0</PUSCH_K2_CFG>
+                     <PUSCH_K2_CFG>4</PUSCH_K2_CFG>
                      <PUSCH_MAPPING_TYPE>0</PUSCH_MAPPING_TYPE>
                      <PUSCH_START_SYMBOL>3</PUSCH_START_SYMBOL>
                      <PUSCH_LENGTH_SYMBOL>11</PUSCH_LENGTH_SYMBOL>
                   </PUSCH_COMM_TIME_ALLOC>
                   <PUSCH_COMM_TIME_ALLOC>
-                     <PUSCH_K2_CFG>1</PUSCH_K2_CFG>
+                     <PUSCH_K2_CFG>5</PUSCH_K2_CFG>
                      <PUSCH_MAPPING_TYPE>0</PUSCH_MAPPING_TYPE>
                      <PUSCH_START_SYMBOL>3</PUSCH_START_SYMBOL>
                      <PUSCH_LENGTH_SYMBOL>11</PUSCH_LENGTH_SYMBOL>
                   </PUSCH_COMM_TIME_ALLOC>
-                  </LIST>
                </PUSCH_COMM_TIME_ALLOC_LIST>
             </PUSCH_CFG_COMMON>  
          </BWP_UL_CFG>
       <SSB_CFG>
          <SSB_PBSC_PWR>0</SSB_PBSC_PWR>
          <SCS_CMN>0</SCS_CMN>  <!--SCS_15-->
-         <SSB_OFF_PT_A>24</SSB_OFF_PT_A>
+         <SSB_OFFSET_PT_A>24</SSB_OFFSET_PT_A>
          <SSB_PERIOD>2</SSB_PERIOD>
-         <SSB_SC_OFF>0</SSB_SC_OFF>
-         <SSB_LIST>
+         <SSB_SC_OFFSET>0</SSB_SC_OFFSET>
+         <SSB_MASK_LIST>
             <SSB_MASK>1</SSB_MASK>
-         </SSB_LIST>
-         <NUM_SSB>1</NUM_SSB>
+         </SSB_MASK_LIST>
          <BEAM_LIST>
             <BEAM_ID>0</BEAM_ID>
          </BEAM_LIST>
          <BETA_PSS>0</BETA_PSS>
-         <BCH_PAY_FLAG>1</BCH_PAY_FLAG>
-         <DMRS_TYPE_A_PROS>2</DMRS_TYPE_A_PROS>
+         <BCH_PAYLOAD_FLAG>1</BCH_PAYLOAD_FLAG>
+         <DMRS_TYPE_A_POS>2</DMRS_TYPE_A_POS>
       </SSB_CFG>
       <CSIRS_CFG>
          <CSIRS_FREQ>0</CSIRS_FREQ>
          <PERIODICITY_OFFSET>0</PERIODICITY_OFFSET>
       </CSIRS_CFG>
       <PRACH_CFG>
-         <PRACH_SEQ_LEN>0</PRACH_SEQ_LEN>
-         <NR_SCS>0</NR_SCS>
+         <PRACH_SEQ_LEN>1</PRACH_SEQ_LEN>
+         <NR_SCS>15</NR_SCS>
          <PRACH_CONFIG_IDX>16</PRACH_CONFIG_IDX>
          <NUM_PRACH_FDM>1</NUM_PRACH_FDM>
          <FDM_LIST>
          <RA_RSP_WINDOW>10</RA_RSP_WINDOW>
       </PRACH_CFG>
       <TDD_CFG>
-         <TDD_PERIODICITY>0</TDD_PERIODICITY>
+         <TDD_PERIODICITY>6</TDD_PERIODICITY>
          <NUM_DL_SLOTS>7</NUM_DL_SLOTS>
          <NUM_DL_SYMBOLS>12</NUM_DL_SYMBOLS>
          <NUM_UL_SLOTS>2</NUM_UL_SLOTS>
          <DIGI_AZIMUTH>0</DIGI_AZIMUTH>
       </BEAM_FORM_CFG>
    </MAC_CELL_CFG>
-   <MIB_PARAMS>
-      <SYS_FRAME_NUM>0</SYS_FRAME_NUM>
-      <SUB_CARR_SPACE>0</SUB_CARR_SPACE>
-      <SSB_SC_OFFSET>0</SSB_SC_OFFSET>
-      <DMRS_TYPEA_POSITION>0</DMRS_TYPEA_POSITION>
-      <CORESET_0_INDEX>0</CORESET_0_INDEX>
-      <SEARCHSPACE_0_INDEX>0</SEARCHSPACE_0_INDEX>
-      <CELL_BARRED>1</CELL_BARRED>
-      <INTRA_FREQ_RESELECT>1</INTRA_FREQ_RESELECT>
-   </MIB_PARAMS>
    <SLICE_CFG>
       <NUM_RRM_POLICY>1</NUM_RRM_POLICY>
       <MAC_SLICE_RRM_POLICY>
          </RRM_POLICY_RATIO>
       </MAC_SLICE_RRM_POLICY>
    </SLICE_CFG>
-   <SIB1_PARAMS>
-      <PLMN>
-         <MCC>
-            <PLMN_MCC0>3</PLMN_MCC0>
-            <PLMN_MCC1>1</PLMN_MCC1>
-            <PLMN_MCC2>1</PLMN_MCC2>
-         </MCC>
-         <MNC>
-         <PLMN_MNC0>4</PLMN_MNC0>
-         <PLMN_MNC1>8</PLMN_MNC1>
-         <PLMN_MNC2>0</PLMN_MNC2>
-         </MNC>
-      </PLMN>
-      <TAC>1</TAC>
-      <RANAC>1</RANAC>
-      <CELL_IDENTITY>1</CELL_IDENTITY>
-      <CELL_RESVD_OPUSE>1</CELL_RESVD_OPUSE>
-      <CONN_EST_FAIL_CNT>2</CONN_EST_FAIL_CNT>
-      <CONN_EST_FAIL_OFF_VALID>7</CONN_EST_FAIL_OFF_VALID>
-      <CONN_EST_FAIL_OFFSET>15</CONN_EST_FAIL_OFFSET>
-      <SI_SHED_INFO>
-         <WIN_LEN>0</WIN_LEN>
-         <BROADCAST_STATUS>0</BROADCAST_STATUS>
-         <PERIODICITY>0</PERIODICITY>
-         <SIB_TYPE>0</SIB_TYPE>
-         <SIB1_VALUE_TAG>10</SIB1_VALUE_TAG>
-      </SI_SHED_INFO>
-      <SRV_CELL_CFG_COM_SIB>
-         <NR_SCS>0</NR_SCS>
-         <SSB_POS_INBURST>192</SSB_POS_INBURST>
-         <SSB_PERIODICITY>20</SSB_PERIODICITY>
-         <SSB_PBCH_PWR>0</SSB_PBCH_PWR>
-         <DL_CFG_COMMON>
-            <NR_FREQ_BAND>1</NR_FREQ_BAND>
-            <OFFSET_TO_POINT_A>24</OFFSET_TO_POINT_A>
-            <FREQ_LOC_BW>28875</FREQ_LOC_BW>
-            <SCS_SPEC_CARRIER>
-               <SSB_SUBCARRIER_OFFSET>0</SSB_SUBCARRIER_OFFSET>
-               <NR_SCS>0</NR_SCS>
-               <SCS_BW>20</SCS_BW>
-            </SCS_SPEC_CARRIER>
-            <PDCCH_CFG_COMMON>
-               <PRESENT>2</PRESENT>
-               <CORESET_0_INDEX>0</CORESET_0_INDEX>
-               <SEARCHSPACE_0_INDEX>0</SEARCHSPACE_0_INDEX>
-               <PDCCH_SEARCH_SPACE_ID>1</PDCCH_SEARCH_SPACE_ID>
-               <PDCCH_CTRL_RSRC_SET_ID>0</PDCCH_CTRL_RSRC_SET_ID>
-               <MONITOR_SLOT_PERIOD_OFFSET_PRESENT>1</MONITOR_SLOT_PERIOD_OFFSET_PRESENT>
-               <MONITOR_LIST>
-                  <MONITOR_SYMBOL_IN_SLOT>128</MONITOR_SYMBOL_IN_SLOT>
-                  <MONITOR_SYMBOL_IN_SLOT>0</MONITOR_SYMBOL_IN_SLOT>
-               </MONITOR_LIST>
-               <NUM_CANDIDATE_AGG_LVL_1>7</NUM_CANDIDATE_AGG_LVL_1>
-               <NUM_CANDIDATE_AGG_LVL_2>4</NUM_CANDIDATE_AGG_LVL_2>
-               <NUM_CANDIDATE_AGG_LVL_4>2</NUM_CANDIDATE_AGG_LVL_4>
-               <NUM_CANDIDATE_AGG_LVL_8>1</NUM_CANDIDATE_AGG_LVL_8>
-               <NUM_CANDIDATE_AGG_LVL_16>0</NUM_CANDIDATE_AGG_LVL_16>
-               <SEARCH_SPACE_TYPE>1</SEARCH_SPACE_TYPE>
-               <PDCCH_SEARCH_SPACE_DCI_FORMAT>0</PDCCH_SEARCH_SPACE_DCI_FORMAT>
-               <PDCCH_SEARCH_SPACE_ID_SIB1>1</PDCCH_SEARCH_SPACE_ID_SIB1>
-               <PDCCH_SEARCH_SPACE_ID_PAGING>1</PDCCH_SEARCH_SPACE_ID_PAGING>
-               <PDCCH_SEARCH_SPACE_ID_RA>1</PDCCH_SEARCH_SPACE_ID_RA>
-            </PDCCH_CFG_COMMON>
-            <PDSCH_CFG_COMMON>
-               <PRESENT>2</PRESENT>
-               <NUM_TIME_DOM_RSRS_ALLOC>2</NUM_TIME_DOM_RSRS_ALLOC>
-               <PDSCH_TIME_DOM_RSRC_ALLOC_LIST>
-                  <PDSCH_TIME_DOM_RSRC_ALLOC>
-                     <K0>0</K0>
-                     <MAP_TYPE>0</MAP_TYPE>
-                     <PDSCH_START_SYMBOL>3</PDSCH_START_SYMBOL>
-                     <PDSCH_LENGTH_SYMBOL>11</PDSCH_LENGTH_SYMBOL>
-                  </PDSCH_TIME_DOM_RSRC_ALLOC>
-                  <PDSCH_TIME_DOM_RSRC_ALLOC>
-                     <K0>1</K0>
-                     <MAP_TYPE>0</MAP_TYPE>
-                     <PDSCH_START_SYMBOL>3</PDSCH_START_SYMBOL>
-                     <PDSCH_LENGTH_SYMBOL>11</PDSCH_LENGTH_SYMBOL>
-                  </PDSCH_TIME_DOM_RSRC_ALLOC>
-               </PDSCH_TIME_DOM_RSRC_ALLOC_LIST>
-            </PDSCH_CFG_COMMON>
-            <BCCH_CFG>
-               <MOB_PRD_COEFF>3</MOB_PRD_COEFF>
-            </BCCH_CFG>
-            <PCCH_CFG>
-               <DEFAULT_PAGING_CYCLE>256</DEFAULT_PAGING_CYCLE>
-               <NAND_PAGING_FRAME_OFFSET>1</NAND_PAGING_FRAME_OFFSET>
-               <PAGE_FRAME_OFFSET>0</PAGE_FRAME_OFFSET>
-               <NS>1</NS>
-               <FIRST_PDCCH_MONITORING_TYPE>2</FIRST_PDCCH_MONITORING_TYPE>
-               <FIRST_PDCCH_LIST>
-                  <FIRST_PDCCH_MONITORING_INFO>44</FIRST_PDCCH_MONITORING_INFO>
-               </FIRST_PDCCH_LIST>
-            </PCCH_CFG>
-         </DL_CFG_COMMON>
-         <UL_CFG_COMMON>
-            <NR_FREQ_BAND>1</NR_FREQ_BAND>
-            <UL_P_MAX>23</UL_P_MAX>
-            <FREQ_LOC_BW>28875</FREQ_LOC_BW>
-            <TIME_ALLIGN_TIMER_COMM>7</TIME_ALLIGN_TIMER_COMM>
-            <SCS_SPEC_CARRIER>
-               <SSB_SUBCARRIER_OFFSET>0</SSB_SUBCARRIER_OFFSET>
-               <NR_SCS>0</NR_SCS>
-               <NR_BANDWIDTH>20</NR_BANDWIDTH>
-            </SCS_SPEC_CARRIER>
-            <RACH_CFG_COMMON>
-               <PRESENT>2</PRESENT>
-               <PRACH_CONFIG_IDX>16</PRACH_CONFIG_IDX>
-               <MSG_1_FDM>0</MSG_1_FDM>
-               <MAX_NUM_RB>106</MAX_NUM_RB>
-               <PRACH_MAX_PRB>24</PRACH_MAX_PRB>
-               <ZERO_CORRELATION_ZONE_CFG>4</ZERO_CORRELATION_ZONE_CFG>
-               <PRACH_PREAMBLE_RCVD_TGT_PWR>-74</PRACH_PREAMBLE_RCVD_TGT_PWR>
-               <PREAMBLE_TRANS_MAX>10</PREAMBLE_TRANS_MAX>
-               <PWR_RAMPING_STEP>1</PWR_RAMPING_STEP>
-               <RA_RSP_WINDOW>4</RA_RSP_WINDOW>
-               <NUM_RA_PREAMBLE>63</NUM_RA_PREAMBLE>
-               <NUM_SSB_PER_RACH_OCC>4</NUM_SSB_PER_RACH_OCC>
-               <CB_PREAMBLE_PER_SSB>8</CB_PREAMBLE_PER_SSB>
-               <CONT_RES_TIMER>7</CONT_RES_TIMER>
-               <RSRP_THRESHOLD_SSB>31</RSRP_THRESHOLD_SSB>
-               <ROOT_SEQ_IDX_PRESENT>2</ROOT_SEQ_IDX_PRESENT>
-               <ROOT_SEQ_IDX>0</ROOT_SEQ_IDX>
-               <PRACH_SUBCARRIER_SPACING>0</PRACH_SUBCARRIER_SPACING>
-               <PRACH_RESTRICTED_SET_CFG>0</PRACH_RESTRICTED_SET_CFG>
-            </RACH_CFG_COMMON>
-            <PUSCH_CFG_COMMON>
-               <PUSCH_CFG_PRESENT>2</PUSCH_CFG_PRESENT>
-               <PUSCH_MSG3_DELTA_PREAMBLE>0</PUSCH_MSG3_DELTA_PREAMBLE>
-               <PUSCH_P0_NOMINAL_WITH_GRANT>-70</PUSCH_P0_NOMINAL_WITH_GRANT>
-               <NUM_TIME_DOM_RSRC_ALLOC>2</NUM_TIME_DOM_RSRC_ALLOC>
-               <PUSCH_TIME_DOM_RSRC_ALLOC_LIST>
-                  <PUSCH_TIME_DOM_RSRC_ALLOC>
-                     <K2>4</K2>
-                     <MAP_TYPE>0</MAP_TYPE>
-                     <PUSCH_START_SYMBOL>3</PUSCH_START_SYMBOL>
-                     <PUSCH_LENGTH_SYMBOL>11</PUSCH_LENGTH_SYMBOL>
-                  </PUSCH_TIME_DOM_RSRC_ALLOC>
-                  <PUSCH_TIME_DOM_RSRC_ALLOC>
-                     <K2>5</K2>
-                     <MAP_TYPE>0</MAP_TYPE>
-                     <PUSCH_START_SYMBOL>3</PUSCH_START_SYMBOL>
-                     <PUSCH_LENGTH_SYMBOL>11</PUSCH_LENGTH_SYMBOL>
-                  </PUSCH_TIME_DOM_RSRC_ALLOC>
-               </PUSCH_TIME_DOM_RSRC_ALLOC_LIST>
-            </PUSCH_CFG_COMMON>
-            <PUCCH_CFG_COMMON>
-               <PRESENT>2</PRESENT>
-               <PUCCH_RSRC_COMMON>0</PUCCH_RSRC_COMMON>
-               <GRP_HOP>0</GRP_HOP>
-               <PUCCH_P0_NOMINAL>-74</PUCCH_P0_NOMINAL>
-            </PUCCH_CFG_COMMON>
-         </UL_CFG_COMMON>
-         <TDD_UL_DL_CFG_COMMON>
-            <REF_SCS>1</REF_SCS>
-            <TX_PRD>6</TX_PRD>
-            <NUM_DL_SLOTS>7</NUM_DL_SLOTS>
-            <NUM_DL_SYMBOLS>12</NUM_DL_SYMBOLS>
-            <NUM_UL_SLOTS>2</NUM_UL_SLOTS>
-            <NUM_UL_SYMBOLS>1</NUM_UL_SYMBOLS>
-         </TDD_UL_DL_CFG_COMMON>
-      </SRV_CELL_CFG_COM_SIB>
-   </SIB1_PARAMS>
    <RADIO_FRAME_DURATION>10</RADIO_FRAME_DURATION>
    <MAX_NUM_CELL>2</MAX_NUM_CELL>
    <MAX_NUM_MU>4</MAX_NUM_MU>