From 5d64905a366e340b65b01021ec4eec4f7350a94e Mon Sep 17 00:00:00 2001 From: Balaji Shankaran Date: Wed, 15 Apr 2020 16:08:52 +0530 Subject: [PATCH] FAPI code enclosed under FAPI flag Change-Id: I66b73ed77f73e0e34f70625b8096053c33abb328 Signed-off-by: Balaji Shankaran --- build/odu/makefile | 2 +- src/5gnrmac/fapi.h | 796 ------------------------- src/5gnrmac/fapi_interface.h | 1196 -------------------------------------- src/5gnrmac/lwr_mac.h | 3 + src/5gnrmac/lwr_mac_fsm.c | 34 +- src/5gnrmac/lwr_mac_fsm.h | 6 + src/5gnrmac/lwr_mac_handle_phy.c | 27 + src/5gnrmac/lwr_mac_phy.c | 4 +- src/5gnrmac/mac_msg_hdl.c | 6 +- src/5gnrmac/rg_tom.c | 2 +- src/phy_stub/l1_bdy1.c | 29 +- src/phy_stub/l1_bdy2.c | 25 +- 12 files changed, 123 insertions(+), 2007 deletions(-) delete mode 100644 src/5gnrmac/fapi.h delete mode 100644 src/5gnrmac/fapi_interface.h diff --git a/build/odu/makefile b/build/odu/makefile index 0201c9e37..5df3cfa5b 100644 --- a/build/odu/makefile +++ b/build/odu/makefile @@ -70,7 +70,7 @@ endif # macro for output file name and makefile name # -PLTFRM_FLAGS= -UMSPD -DODU #-DEGTP_TEST -DWLS_MEM +PLTFRM_FLAGS= -UMSPD -DODU #-DFAPI -DEGTP_TEST -DWLS_MEM ifeq ($(MODE),TDD) PLTFRM_FLAGS += -DMODE=TDD diff --git a/src/5gnrmac/fapi.h b/src/5gnrmac/fapi.h deleted file mode 100644 index 6ab2abbb4..000000000 --- a/src/5gnrmac/fapi.h +++ /dev/null @@ -1,796 +0,0 @@ -/****************************************************************************** -* Copyright 2017 Cisco Systems, Inc. -* Copyright (c) 2019 Intel. -* -* Licensed under the Apache License, Version 2.0 (the "License"); -* you may not use this file except in compliance with the License. -* You may obtain a copy of the License at -* -* http://www.apache.org/licenses/LICENSE-2.0 -* -* Unless required by applicable law or agreed to in writing, software -* distributed under the License is distributed on an "AS IS" BASIS, -* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -* See the License for the specific language governing permissions and -* limitations under the License. -* -*******************************************************************************/ -// This file has been modified by Intel in order to support 5G FAPI:PHY API Specification -// Document 222.10.01 dated June 2019 -// Changes made by luis.farias@intel.com -/** - * @file - * This file consist of FAPI configuration APIs macros, structure typedefs and - * prototypes. - * - **/ - -#ifndef _FAPI_H_ -#define _FAPI_H_ - -#include - -#include "fapi_interface.h" -//#include "fapi_vendor_common_defs.h" - -#define RELEASE_15 0x0001 - -// Datatypes typedefs - end - -typedef enum { - FAPI_SUCCESS = 0, - FAPI_FAILURE -} fapiStatus_t; -// Updated per 5G FAPI - - - -// Updated per 5G FAPI -typedef enum { - FAPI_UL_TTI_REQ_PRACH_PDU_TYPE = 0, - FAPI_UL_TTI_REQ_PUSCH_PDU_TYPE, - FAPI_UL_TTI_REQ_PUCCH_PDU_TYPE, - FAPI_UL_TTI_REQ_SRS_PDU_TYPE -}fapiULTtiReqPduType_e; -// Updated per 5G FAPI -typedef enum { - FAPI_UCI_IND_ON_PUSCH_PDU_TYPE = 0, - FAPI_UCI_IND_ON_PUCCH_FMT_0_1_PDU_TYPE, - FAPI_UCI_IND_ON_PUCCH_FMT_2_3_4_PDU_TYPE -}fapiUciIndPdu_Type_e; - -// CRC -enum { - FAPI_CRC_CORRECT = 0, - FAPI_CRC_ERROR = 1 -}; - -//------------------------------------------------------------------------------ -// Fapi Infra Declarations -//------------------------------------------------------------------------------ -// Release/Features support -typedef enum { - FAPI_NOT_SUPPORTED = 0, - FAPI_SUPPORTED, -} fapiSupport_t; - -// FAPI States -/** - * FAPI state is maintained per fapi instance. If FAPI messages are received in - * wrong state an ERROR.indication message will be sent by FAPI. - */ -typedef enum fapiStates -{ - FAPI_STATE_IDLE = 0, - FAPI_STATE_CONFIGURED, - FAPI_STATE_RUNNING -} fapiStates_t; - -// Information of optional and mandatory status for a TLV -typedef enum { - FAPI_IDLE_STATE_ONLY_OPTIONAL = 0, - FAPI_IDLE_STATE_ONLY_MANDATORY, - FAPI_IDLE_AND_CONFIGURED_STATES_OPTIONAL, - FAPI_IDLE_STATE_MANDATORY_CONFIGURED_STATE_OPTIONAL, - FAPI_IDLE_CONFIGURED_AND_RUNNING_STATES_OPTIONAL, - FAPI_IDLE_STATE_MANDATORY_CONFIGURED_AND_RUNNING_STATES_OPTIONAL -} fapiTlvStatus_t; - -// PARAMETERS INFORMATION - -#define FAPI_NORMAL_CYCLIC_PREFIX_MASK 0x01 -#define FAPI_EXTENDED_CYCLIC_PREFIX_MASK 0x02 - -// In 5G FAPI FrameDuplexType as part of Cell Configuration -typedef enum -{ - TDD_DUPLEX = 0, - FDD_DUPLEX -} modes; //Defined now - -// Subcarrier spacing information -#define FAPI_15KHZ_MASK 0x01 -#define FAPI_30KHZ_MASK 0x02 -#define FAPI_60KHZ_MASK 0x04 -#define FAPI_120KHZ_MASK 0x08 - -// Bandwitdth information -#define FAPI_5MHZ_BW_MASK 0x0001 -#define FAPI_10MHZ_BW_MASK 0x0002 -#define FAPI_15MHZ_BW_MASK 0x0004 -#define FAPI_20MHZ_BW_MASK 0x0010 -#define FAPI_40MHZ_BW_MASK 0x0020 -#define FAPI_50MHZ_BW_MASK 0x0040 -#define FAPI_60MHZ_BW_MASK 0x0080 -#define FAPI_70MHZ_BW_MASK 0x0100 -#define FAPI_80MHZ_BW_MASK 0x0200 -#define FAPI_90MHZ_BW_MASK 0x0400 -#define FAPI_100MHZ_BW_MASK 0x0800 -#define FAPI_200MHZ_BW_MASK 0x1000 -#define FAPI_400MHZ_BW_MASK 0x2000 - - -// PDCCH Information -#define FAPI_CCE_MAPPING_INTERLEAVED_MASK 0x01 -#define FAPI_CCE_MAPPING_NONINTERLVD_MASK 0x02 -// Upper Bound for PDCCH Channels per Slot -#define FAPI_MAX_PDCCHS_PER_SLOT_MASK 0xff - -// PUCCH Information -#define FAPI_FORMAT_0_MASK 0x01 -#define FAPI_FORMAT_1_MASK 0x02 -#define FAPI_FORMAT_2_MASK 0x04 -#define FAPI_FORMAT_3_MASK 0x08 -#define FAPI_FORMAT_4_MASK 0x10 -// Upper Bound for PUCCH Channels per Slot -#define FAPI_MAX_PUCCHS_PER_SLOT_MASK 0xff - -// PDSCH Information -#define FAPI_PDSCH_MAPPING_TYPE_A_MASK 0x01 -#define FAPI_PDSCH_MAPPING_TYPE_B_MASK 0x02 -#define FAPI_PDSCH_ALLOC_TYPE_0_MASK 0x01 -#define FAPI_PDSCH_ALLOC_TYPE_1_MASK 0x02 -#define FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK 0x01 -#define FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK 0x02 -#define FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK 0x01 -#define FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK 0x02 -#define FAPI_PDSCH_DMRS_MAX_LENGTH_1 0 -#define FAPI_PDSCH_DMRS_MAX_LENGTH_2 1 -#define FAPI_DMRS_ADDITIONAL_POS_0_MASK 0x01 -#define FAPI_DMRS_ADDITIONAL_POS_1_MASK 0x02 -#define FAPI_DMRS_ADDITIONAL_POS_2_MASK 0x04 -#define FAPI_DMRS_ADDITIONAL_POS_3_MASK 0x08 -//Upper Limit for PDSCHS TBs per Slot -#define FAPI_MAX_PDSCHS_TBS_PER_SLOT_MASK 0xff -#define FAPI_MAX_NUMBERMIMO_LAYERS_PDSCH 2 - -typedef enum modulationOrder { - FAPI_QPSK = 0, - FAPI_16QAM, - FAPI_64QAM, - FAPI_256QAM -} fapiModOrder_t; - -#define FAPI_MAX_MUMIMO_USERS_MASK 0xff - - -// PUSCH Parameters - -#define FAPI_PUSCH_MAPPING_TYPE_A_MASK 0x01 -#define FAPI_PUSCH_MAPPING_TYPE_B_MASK 0x02 -#define FAPI_PUSCH_ALLOC_TYPE_0_MASK 0x01 -#define FAPI_PUSCH_ALLOC_TYPE_1_MASK 0x02 -#define FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK 0x01 -#define FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK 0x02 -#define FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK 0x01 -#define FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK 0x02 -#define FAPI_PUSCH_DMRS_MAX_LENGTH_1 0 -#define FAPI_PUSCH_DMRS_MAX_LENGTH_2 1 -// Upper limit for PUSCHMAXPTRSPORTS -#define FAPI_PUSCH_MAX_PTRS_PORTS_UB 2 -//Upper Limit for PDSCHS TBs per Slot -#define FAPI_MAX_PUSCHS_TBS_PER_SLOT_MASK 0xff - -typedef enum aggregationFactor -{ - FAPI_PUSCH_AGG_FACTOR_1 = 0, - FAPI_PUSCH_AGG_FACTOR_2, - FAPI_PUSCH_AGG_FACTOR_4, - FAPI_PUSCH_AGG_FACTOR_8 -} fapiPuschAggFactor_t; - -// PRACH Parameters -#define FAPI_PRACH_LF_FORMAT_0_MASK 0x01 -#define FAPI_PRACH_LF_FORMAT_1_MASK 0x02 -#define FAPI_PRACH_LF_FORMAT_2_MASK 0x04 -#define FAPI_PRACH_LF_FORMAT_3_MASK 0x08 - -#define FAPI_PRACH_SF_FORMAT_A1_MASK 0x01 -#define FAPI_PRACH_SF_FORMAT_A2_MASK 0x02 -#define FAPI_PRACH_SF_FORMAT_A3_MASK 0x04 -#define FAPI_PRACH_SF_FORMAT_B1_MASK 0x08 -#define FAPI_PRACH_SF_FORMAT_B2_MASK 0x10 -#define FAPI_PRACH_SF_FORMAT_B3_MASK 0x20 -#define FAPI_PRACH_SF_FORMAT_B4_MASK 0x40 -#define FAPI_PRACH_SF_FORMAT_C0_MASK 0x80 -#define FAPI_PRACH_SF_FORMAT_C2_MASK 0x100 - -typedef enum { - FAPI_MAX_PRACH_FD_OCC_IN_A_SLOT_1 = 0, - FAPI_MAX_PRACH_FD_OCC_IN_A_SLOT_2, - FAPI_MAX_PRACH_FD_OCC_IN_A_SLOT_4, - FAPI_MAX_PRACH_FD_OCC_IN_A_SLOT_8 -} fapi_prachMaxFdOccasionsPerSlot_t; - -// Measurement Parameters -#define FAPI_RSSI_REPORT_IN_DBM_MASK 0x01 -#define FAPI_RSSI_REPORT_IN_DBFS_MASK 0x02 - -// CONFIGURATION INFORMATION -// CARRIER CONFIGURATION -// BANDWIDTH -#define FAPI_BANDWIDTH_5_MHZ 5 -#define FAPI_BANDWIDTH_10_MHZ 10 -#define FAPI_BANDWIDTH_15_MHZ 15 -#define FAPI_BANDWIDTH_20_MHZ 20 -#define FAPI_BANDWIDTH_25_MHZ 25 -#define FAPI_BANDWIDTH_30_MHZ 30 -#define FAPI_BANDWIDTH_40_MHZ 40 -#define FAPI_BANDWIDTH_50_MHZ 50 -#define FAPI_BANDWIDTH_60_MHZ 60 -#define FAPI_BANDWIDTH_70_MHZ 70 -#define FAPI_BANDWIDTH_80_MHZ 80 -#define FAPI_BANDWIDTH_90_MHZ 90 -#define FAPI_BANDWIDTH_100_MHZ 100 -#define FAPI_BANDWIDTH_200_MHZ 200 -#define FAPI_BANDWIDTH_400_MHZ 400 - -// Frequency needs to track 38.104 Section 5.2 and 38.211 Section 5.3.1 -// Lower Bound KHz -#define FAPI_MIN_FREQUENCY_PT_A 450000 -// Upper Bound KHz -#define FAPI_MAX_FREQUENCY_PT_A 52600000 -// dlk0, ulk0 per 38.211 Section 5.3.1 -// Upper Bound -#define FAPI_K0_MAX 23699 -// dlGridSize, ulGridSize per 38.211 Section 4.4.2 -// Upper Bound -#define FAPI_GRIDSIZE_MAX 275 -// Number of Transmit Antennas -// Define upper mask based on variable type -#define FAPI_NUM_ANT_MASK 0xffff - -// CELL CONFIGURATION -// Physical Cell ID from 38.211 Section 7.4.2.1 -// Upper Bound -#define FAPI_MAX_CELL_ID 1007 - -// SSB CONFIGURATION -// SSB POWER RANGE in dBm -#define FAPI_SS_PBCH_LOWEST_POWER -60 -#define FAPI_SS_PBCH_MAX_POWER 50 -// BCH PAYLOAD for 5G the MAC always generates the BCH Payload -#define FAPI_BCH_PAYLOAD_GEN_BY_MAC 0 -#define FAPI_BCH_PAYLOAD_WITH_PHY_GEN_TIMING 1 -#define FAPI_BCH_PAYLOAD_ENTIRELY_GEN_BY_PHY 2 -// ScsCommon -#define FAPI_SCSCOMMON_MASK 0x03 - -// PRACH CONFIGURATION -#define FAPI_PRACH_LONG_SEQUENCE 0 -#define FAPI_PRACH_SHORT_SEQUENCE 1 -#define FAPI_PRACH_SUBC_SPACING_MAX 4 -// Restricted Set Configuration -#define FAPI_PRACH_RESTRICTED_SET_UNRESTRICTED 0 -#define FAPI_PRACH_RESTRICTED_SET_TYPE_A 1 -#define FAPI_PRACH_RESTRICTED_SET_TYPE_B 2 -// Root Sequence Index -// Upper Bound -#define FAPI_PRACH_ROOT_SEQ_INDEX_MAX 837 -// k1 -// Upper Bound -#define FAPI_K1_UPPER_BOUND 272 -// PRACH Zero Corr Configuration -// Upper Bound -#define FAPI_PRACHZEROCORRCONF_MASK 0x0f -// Number of Unused Root Sequences Mask -#define FAPI_UNUSEDROOTSEQUENCES_MASK 0x0f -// SSBPERRACH -typedef enum -{ - FAPI_SSB_PER_RACH_1_OVER_8 = 0, - FAPI_SSB_PER_RACH_1_OVER_4, - FAPI_SSB_PER_RACH_1_OVER_2, - FAPI_SSB_PER_RACH_1, - FAPI_SSB_PER_RACH_2, - FAPI_SSB_PER_RACH_4, - FAPI_SSB_PER_RACH_8, - FAPI_SSB_PER_RACH_16 -} fapiSsbPerRach_t; - -// SSB Table -// Ssb Offset Point A max -#define FAPI_SSB_OFFSET_POINTA_MAX 2199 -// betaPSS i.e. PSS EPRE to SSS EPRE in a SS/PBCH Block per 38.213 Section 4.1 -#define FAPI_BETAPSS_0_DB 0 -#define FAPI_BETAPSS_3_DB 1 -// SSB Period in ms -#define FAPI_SSB_PERIOD_5_MS 0 -#define FAPI_SSB_PERIOD_10_MS 1 -#define FAPI_SSB_PERIOD_20_MS 2 -#define FAPI_SSB_PERIOD_40_MS 3 -#define FAPI_SSB_PERIOD_80_MS 4 -#define FAPI_SSB_PERIOD_160_MS 5 - -// Ssb Subcarrier Offset per 38.211 Section 7.4.3.1 -// SsbSubcarrierOffset mask -#define FAPI_SSB_SUBCARRIER_OFFSET_MASK 0x1f -// MIB PAYLOAD MASK -#define MIB_PAYLOAD_MASK 0xfff0 -// BEAM ID MASK -#define FAPI_BEAM_ID_MASK 0x3f - -// TDD Table -// TDD Period -#define FAPI_TDD_PERIOD_0_P_5_MS 0 -#define FAPI_TDD_PERIOD_0_P_625_MS 1 -#define FAPI_TDD_PERIOD_1_MS 2 -#define FAPI_TDD_PERIOD_1_P_25_MS 3 -#define FAPI_TDD_PERIOD_2_MS 4 -#define FAPI_TDD_PERIOD_2_P_5_MS 5 -#define FAPI_TDD_PERIOD_5_MS 6 -#define FAPI_TDD_PERIOD_10_MS 7 - -// Slot Configuration -#define FAPI_DL_SLOT 0 -#define FAPI_UL_SLOT 1 -#define FAPI_GUARD_SLOT 2 - -// Measurement configuration -#define FAPI_NO_RSSI_REPORTING 0 -#define FAPI_RSSI_REPORTED_IN_DBM 1 -#define FAPI_RSSI_REPORTED_IN_DBFS 2 - -// Error Indication -#define FAPI_SFN_MASK 0x03ff - -// Status and Error Codes for either .response or ERROR.indication -// Updated per 5g FAPI Table 3-31 -/* -typedef enum { - MSG_OK = 0, - MSG_INVALID_STATE, - MSG_INVALID_CONFIG, - SFN_OUT_OF_SYNC, - MSG_SLOT_ERR, - MSG_BCH_MISSING, - MSG_INVALID_SFN, - MSG_UL_DCI_ERR, - MSG_TX_ERR - }fapiStatusAndErrorCodes_e; -*/ - // Digital Beam Table (DBT) PDU - // Number of Digital Beam Mask - // Number of TX RUS Mask - // Beam Index Mask - // Digital Beam Index weights Real and Imaginary Mask - - // Precoding Matrix (PM) PDU - // Precoding Matrix ID Mask - // Number of Layers Mask - // Number of Antenna Ports at the precoder output Mask - // Precoder Weights Real and Imaginary Mask - #define FAPI_U16_MASK 0xffff - - // Slot Indication - - #define FAPI_SLOT_MAX_VALUE 319 - - // DL_TTI.request - // nPDUS mask - // nGroup mask - #define FAPI_U8_MASK 0xff - - typedef enum { - FAPI_DL_TTI_REQ_PDCCH_PDU_TYPE = 0, - FAPI_DL_TTI_REQ_PDSCH_PDU_TYPE, - FAPI_DL_TTI_REQ_CSI_RS_PDU_TYPE, - FAPI_DL_TTI_REQ_SSB_PDU_TYPE -}fapiDlTtiReqPduType_e; - -// nUe -// Define Maximum number of Ues per Group -#define FAPI_MAX_NUMBER_OF_UES_PER_GROUP 12 - -// PDCCH PDU -#define FAPI_BWPSIZE_MAX 275 -#define FAPI_BWPSIZE_START_MAX 274 -#define FAPI_SUBCARRIER_SPACING_MAX 4 -#define FAPI_CYCLIC_PREFIX_NORMAL 0 -#define FAPI_CYCLIC_PREFIX_EXTENDED 1 -#define FAPI_MAX_SYMBOL_START_INDEX 13 - -#define FAPI_CORESET_DURATION_1_SYMBOL 1 -#define FAPI_CORESET_DURATION_2_SYMBOLS 2 -#define FAPI_CORESET_DURATION_3_SYMBOLS 3 - -#define FAPI_CCE_REG_MAPPING_TYPE_NON_INTERLEAVED 0 -#define FAPI_CCE_REG_MAPPING_TYPE_INTERLEAVED 1 -#define FAPI_REG_BUNDLE_SIZE_2 2 -#define FAPI_REG_BUNDLE_SIZE_3 3 -#define FAPI_REG_BUNDLE_SIZE_6 6 - -#define FAPI_INTERLEAVER_SIZE_2 2 -#define FAPI_INTERLEAVER_SIZE_3 3 -#define FAPI_INTERLEAVER_SIZE_6 6 - -#define FAPI_CORESET_TYPE_0_CONF_BY_PBCH_OR_SIB1 0 -#define FAPI_CORESET_TYPE_1 1 - -#define FAPI_PREC_GRANULARITY_SAME_AS_REG_BUNDLE 0 -#define FAPI_PREC_GRANULARITY_ALL_CONTIG_RBS 1 - -#define FAPI_CCE_INDEX_MAX 135 -#define FAPI_PDCCH_AGG_LEVEL_1 1 -#define FAPI_PDCCH_AGG_LEVEL_2 2 -#define FAPI_PDCCH_AGG_LEVEL_4 4 -#define FAPI_PDCCH_AGG_LEVEL_8 8 -#define FAPI_PDCCH_AGG_LEVEL_16 16 - -#define FAPI_BETA_PDCCH_1_0_MAX 17 - -#define FAPI_POWER_CTRL_OFF_SS_MINUS_3_DB 0 -#define FAPI_POWER_CTRL_OFF_SS_0_DB 1 -#define FAPI_POWER_CTRL_OFF_SS_3_DB 2 -#define FAPI_POWER_CTRL_OFF_SS_6_DB 3 - -#define FAPI_MAX_NUMBER_OF_CODEWORDS 2 - -#define FAPI_MAX_MCS_INDEX 31 -#define FAPI_MCS_INDEX_MASK 0x1f - -#define FAPI_MCS_TABLE_NOT_QAM_256 0 -#define FAPI_MCS_TABLE_QAM_256 1 -#define FAPI_MCS_TABLE_QAM_64_LOW_SE 2 - -#define FAPI_REDUNDANCY_INDEX_MASK 0x03 -#define FAPI_MAX_DL_LAYERS 8 - -#define FAPI_TRANSMISSION_SCHEME_1 1 - -#define FAPI_REF_POINT_FOR_PDSCH_DMRS_AT_PT_A 0 -#define FAPI_REF_POINT_FOR_PDSCH_DMRS_AT_LOWEST_ALLOC 1 - -#define FAPI_DL_DMRS_SYMB_POS_MASK 0x3fff - -#define FAPI_MAX_DMRS_CDM_GRPS_WO_DATA 3 - -#define FAPI_DMRS_PORTS_MASK 0x0fff - -#define FAPI_RES_ALLOC_TYPE_0 0 -#define FAPI_RES_ALLOC_TYPE_1 1 - -#define FAPI_VRB_TO_PRB_MAP_NON_INTERLVD 0 -#define FAPI_VRB_TO_PRB_MAP_INTERLVD_RB_SIZE_2 1 -#define FAPI_VRB_TO_PRB_MAP_INTERLVD_RB_SIZE_4 2 - -#define FAPI_MAX_START_SYMBOL_INDEX 13 -#define FAPI_MAX_NR_OF_SYMBOLS 14 -#define FAPI_PTRS_PORT_INDEX_MASK 0x3f -#define FAPI_PTRS_TIME_DENSITY_1 0 -#define FAPI_PTRS_TIME_DENSITY_2 1 -#define FAPI_PTRS_TIME_DENSITY_4 2 -#define FAPI_PTRS_FREQ_DENSITY_2 0 -#define FAPI_PTRS_FREQ_DENSITY_4 1 -#define FAPI_PTRS_RE_OFFSET_MASK 0x03 -#define FAPI_EPRE_RATIO_PDSCH_PTRS_MASK 0x03 -// PDSCH Power Control Offset -#define FAPI_PWR_CTRL_OFFSET_MINUS_8_DB 0 -#define FAPI_PWR_CTRL_OFFSET_MINUS_7_DB 1 -#define FAPI_PWR_CTRL_OFFSET_MINUS_6_DB 2 -#define FAPI_PWR_CTRL_OFFSET_MINUS_5_DB 3 -#define FAPI_PWR_CTRL_OFFSET_MINUS_4_DB 4 -#define FAPI_PWR_CTRL_OFFSET_MINUS_3_DB 5 -#define FAPI_PWR_CTRL_OFFSET_MINUS_2_DB 6 -#define FAPI_PWR_CTRL_OFFSET_MINUS_1_DB 7 -#define FAPI_PWR_CTRL_OFFSET_0_DB 8 -#define FAPI_PWR_CTRL_OFFSET_1_DB 9 -#define FAPI_PWR_CTRL_OFFSET_2_DB 10 -#define FAPI_PWR_CTRL_OFFSET_3_DB 11 -#define FAPI_PWR_CTRL_OFFSET_4_DB 12 -#define FAPI_PWR_CTRL_OFFSET_5_DB 13 -#define FAPI_PWR_CTRL_OFFSET_6_DB 14 -#define FAPI_PWR_CTRL_OFFSET_7_DB 15 -#define FAPI_PWR_CTRL_OFFSET_8_DB 16 -#define FAPI_PWR_CTRL_OFFSET_9_DB 17 -#define FAPI_PWR_CTRL_OFFSET_10_DB 18 -#define FAPI_PWR_CTRL_OFFSET_11_DB 19 -#define FAPI_PWR_CTRL_OFFSET_12_DB 20 -#define FAPI_PWR_CTRL_OFFSET_13_DB 21 -#define FAPI_PWR_CTRL_OFFSET_14_DB 22 -#define FAPI_PWR_CTRL_OFFSET_15_DB 23 -// Power Control Offset SS -#define FAPI_PWR_CTRL_OFFSET_SS_MINUS_3_DB 0 -#define FAPI_PWR_CTRL_OFFSET_SS_0_DB 1 -#define FAPI_PWR_CTRL_OFFSET_SS_3_DB 2 -#define FAPI_PWR_CTRL_OFFSET_SS_6_DB 3 -// CSI Type -#define FAPI_CSI_TRS 0 -#define FAPI_CSI_NON_ZERO_POWER 1 -#define FAPI_CSI_ZERO_POWER 2 -// Row entry into CSI Resource Location Table -#define FAPI_CSIRLT_ROW_MAX_VALUE 18 -#define FAPI_CSI_FREQ_DOMAIN_MASK 0x0fff -#define FAPI_CSI_SYMB_L1_MIN 2 -#define FAPI_CSI_SYMB_L1_MAX 12 -// CDM Type -#define FAPI_CDM_TYPE_NO_CDM 0 -#define FAPI_CDM_TYPE_FD_CDM 1 -#define FAPI_CDM_TYPE_CDM4_FD2_TD2 2 -#define FAPI_CDM_TYPE_CDM8_FD2_TD4 3 -// Frequency Density -#define FAPI_FD_DOT5_EVEN_RB 0 -#define FAPI_FD_DOT5_ODD_RB 1 -#define FAPI_FD_ONE 2 -#define FAPI_FD_THREE 3 - -// SSB -#define FAPI_SSB_BLOCK_INDEX_MASK 0x3f -#define FAPI_SSB_SC_OFFSET_MASK 0x1f - -// UL TTI REQUEST -#define FAPI_MAX_NUM_UE_GROUPS_INCLUDED 8 -#define FAPI__MAX_NUM_UE_IN_GROUP 6 -// PRACH PDU -#define FAPI_MAX_NUM_PRACH_OCAS 7 -// PRACH FORMAT -#define FAPI_PRACH_FORMAT_A1 0 -#define FAPI_PRACH_FORMAT_A2 1 -#define FAPI_PRACH_FORMAT_A3 2 -#define FAPI_PRACH_FORMAT_B1 3 -#define FAPI_PRACH_FORMAT_B2 4 -#define FAPI_PRACH_FORMAT_B3 5 -#define FAPI_PRACH_FORMAT_B4 6 -#define FAPI_PRACH_FORMAT_C0 7 -#define FAPI_PRACH_FORMAT_C2 8 - -#define FAPI_MAX_PRACH_FD_OCCASION_INDEX 7 -#define FAPI_MAX_ZC_ZONE_CONFIG_NUMBER 419 - -// PUSCH PDU -#define FAPI_PUSCH_BIT_DATA_PRESENT_MASK 0x0001 -#define FAPI_PUSCH_UCI_DATA_PRESENT_MASK 0x0002 -#define FAPI_PUSCH_PTRS_INCLUDED_FR2_MASK 0x0004 -#define FAPI_PUSCH_DFTS_OFDM_TX_MASK 0x0008 - -#define FAPI_MAX_QAM_MOD_ORDER 8 -#define FAPI_MCS_INDEX_MASK 0x1f - -#define FAPI_MCS_TABLE_NOT_QAM256 0 -#define FAPI_MCS_TABLE_QAM256 1 -#define FAPI_MCS_TABLE_QAM64_LOWSE 2 -#define FAPI_MCS_TABLE_NOT_QAM256_W_XFRM_PRECOD 3 -#define FAPI_MCS_TABLE_QAM64_LOWSE_W_XFRM_PRECOD 4 -#define FAPI_PUSCH_MAX_NUM_LAYERS 4 -// DMRS -#define FAPI_UL_DMRS_SYMB_POS_MASK 0x3fff -#define FAPI_UL_DMRS_CONFIG_TYPE_1 0 -#define FAPI_UL_DMRS_CONFIG_TYPE_2 1 -#define FAPI_MAX_DMRS_CDM_GRPS_NO_DATA 3 -#define FAPI_UL_DMRS_PORTS_MASK 0x07ff -#define FAPI_UL_TX_DIRECT_CURR_LOCATION_MAX 3299 -#define FAPI_UL_TX_DIRECT_CURR_LOC_OUTSIDE_CARRIER 3300 -#define FAPI_UL_TX_DIRECT_CURR_LOC_UNDETERMINED 3301 -// PUSCH DATA -#define FAPI_RV_INDEX_MASK 0x03 -#define FAPI_HARQ_PROCESS_ID_MASK 0x0f -// PUSCH UCI INFO -#define FAPI_HARQ_ACK_CSI_PX_BIT_LEN_SMALL_BLOCK_MAX 11 -#define FAPI_HARQ_ACK_CSI_PX_BIT_LEN_POLAR_MAX 1706 -// ALPHA SCALING -#define FAPI_ALPHA_SCALE_0_5 0 -#define FAPI_ALPHA_SCALE_0_65 1 -#define FAPI_ALPHA_SCALE_0_8 2 -#define FAPI_ALPHA_SCALE_1_0 3 -// BETA OFFSET HARQ ACK -#define FAPI_BETA_OFFSET_HARQ_ACK_MAX 15 -#define FAPI_BETA_OFFSET_CSIX_MAX 18 - -// PUSCH PTRS INFORMATION 38.212 Section 7.3.1.1.2 -#define FAPI_MAX_NUMBER_PTRS_PORT_INDEX 11 // 0..11 -// UL PTRS POWER 5G FAPI Table 3-49 -#define FAPI_UL_PTRS_PWR_0_DB 0 -#define FAPI_UL_PTRS_PWR_3_DB 1 -#define FAPI_UL_PTRS_PWR_4_77_DB 2 -#define FAPI_UL_PTRS_PWR_6_DB 3 -// DFTSOFDM INFO 5g FAPI Table 3-50 -#define FAPI_MAX_LOW_PAPR_GROUP_NUMBER 29 // 0..29 -#define FAPI_MAX_LOW_PAPR_SEQ_NUMBER 87 // 3*LOW_PAPR_GRP_NUM -#define FAPI_MAX_UL PTRS_SAMP_DENSITY 8 -#define FAPI_MAX_UL_PTRS_TD_XFRM_PRECOD 4 - -// PUCCH PDU Table 3-51 -#define FAPI_MAX_PUCCH_FORMAT_TYPE 4 -#define FAPI_MULTI_SLOT_TX_IND_NO_MULTI_SLOT 0 -#define FAPI_MULTI_SLOT_TX_IND_TX_START 1 -#define FAPI_MULTI_SLOT_TX_IND_TX_CONT 2 -#define FAPI_MULTI_SLOT_TX_IND_TX_END 3 -#define FAPI_MAX_NUM_PRB_FOR_A_PUCCH 16 -#define FAPI_MAX_PUCCH_DUR_F0_AND_F2 2 -#define FAPI_MIN_PUCCH_DUR_F1_F3_F4 4 -#define FAPI_MAX_PUCCH_DUR_F1_F3_F4 14 -#define FAPI_MAX_INIT_CYCLIC_SHIFT_F0_F1_F3_F4 11 -#define FAPI_MAX_OCC_INDEX_F1 6 -#define FAPI_MAX_PRE_DFT_OCC_IDX_F4 3 -#define FAPI_MAX_PRE_DFT_OCC_LEN_F4 4 -#define FAPI_MAX_DMRS_CYC_SHIFT_F4 9 -#define FAPI_BIT_LEN_HARQ_PL_ZERO 0 -#define FAPI_BIT_LEN_HARQ_PL_F0_F1_2_BITS 1 -#define FAPI_BIT_LEN_HARQ_PL_F2_F3_F4_1706_BITS 2 -#define FAPI_BIT_LEN_CSI_PX_PL_NO_CSI 0 -#define FAPI_BIT_LEN_CSI_PX_PL_1706_BITS 1 - -// SRS PDU -#define FAPI_1_SRS_ANT_PORT 0 -#define FAPI_2_SRS_ANT_PORTS 1 -#define FAPI_4_SRS_ANT_PORTS 2 -#define FAPI_SRS_NO_REPETITIONS 0 -#define FAPI_SRS_2_REPETITIONS 2 -#define FAPI_SRS_4_REPETITIONS 4 -#define FAPI_SRS_CONFIG_INDEX_MASK 0x3f -#define FAPI_SRS_BW_INDEX_MASK 0x03 -#define FAPI_TX_COMB_SIZE_2 0 -#define FAPI_TX_COMB_SIZE_4 1 -#define FAPI_MAX_SRS_FREQ_POSITION 67 -#define FAPI_MAX_SRS_FD_SHIFT 268 -#define FAPI_SRS_FREQ_HOPPING_MASK 0x03 -#define FAPI_SRS_NO_HOPPING 0 -#define FAPI_SRS_GRP_OR_SEQ_HOPPING 1 -#define FAPI_SRS_SEQ_HOPPING 2 -#define FAPI_SRS_RES_ALLOC_APERIODIC 0 -#define FAPI_SRS_RES_ALLOC_SEMI_PERSISTENT 1 -#define FAPI_SRS_RES_ALLOC_PERIODIC 2 -#define FAPI_MAX_LSOT_OFFSET_VALUE 2559 - -// RX_DATA Indication -#define FAPI_UL_CQI_INVALID 255 -#define FAPI_TIMING_ADVANCE_INVALID 0xffff -#define FAPI_MAX_TIMING_ADVANCE 63 -#define FAPI_MAX_RSSI 1280 - - -// RACH Indication -#define FAPI_RACH_FREQ_INDEX_MAX 7 -#define FAPI_RACH_DETECTED_PREAMBLES_MASK 0x3f -#define FAPI_RACH_TIMING_ADVANCE_MAX 3846 -#define FAPI_RACH_PREAMBLE_POWER_INVALID 0xffffffff -#define FAPI_RACH_PREAMBLE_TIMING_ADVANCE_INVALID 0xffff -#define FAPI_RACH_PREAMBLE_POWER_MAX 170000 - -// SR, HARQ, and CSI Part 1/2 PDUs Table 3-66 -#define FAPI_SR_MASK 0x01 -#define FAPI_HARQ_MASK 0x02 -#define FAPI_CSI_PART1 0x04 -#define FAPI_CSI_PART2 0x08 -#define FAPI_PUCCH_FORMAT2 0 -#define FAPI_PUCCH_FORMAT3 1 -#define FAPI_PUCCH_FORMAT4 2 -#define FAPI_PUCCH_FORMAT_MASK 0x03 - -// SR PDU For Format 0 or 1 Table 3-67 -#define FAPI_SR_CONFIDENCE_LEVEL_GOOD 0 -#define FAPI_SR_CONFIDENCE_LEVEL_BAD 1 -#define FAPI_SR_CONFIDENCE_LEVEL_INVALID 0xff - -// HARQ PDU for Format 0 or 1 Table 3-68 -#define FAPI_HARQ_VALUE_PASS 0 -#define FAPI_HARQ_VALUE_FAIL 1 -#define FAPI_HARQ_VALUE_NOT_PRESENT 2 - -// SR PDU for Format 2,3 or 4 Table 3-69 -#define FAPI_SR_PAYLOAD_MAX 1 - -// HARQ PDU for Format 2,3 or 4 Table 3-70 -#define FAPI_HARQ_CRC_PASS 0 -#define FAPI_HARQ_CRC_FAIL 1 -#define FAPI_HARQ_CRC_NOT_PRESENT 2 -#define FAPI_HARQ_PAYLOAD_MAX 214 - - -// CSI Part 1 PDU Table 3-71 and 3-72 -#define FAPI_CSI_PARTX_CRC_PASS 0 -#define FAPI_CSI_PARTX_CRC_FAIL 1 -#define FAPI_CSI_PARTX_CRC_NOT_PRESENT 2 -#define FAPI_CSI_PARTX_PAYLOAD_MAX 214 - -#if 0 -//------------------------------------------------------------------------------ -// FAPI callback functions to be implemented by the user -//------------------------------------------------------------------------------ -/** - * fapi callback structure is passed as part of ``fapi_create``. FAPI will call - * these functions in response to any received request message. - * - * *Note: vendor specific callbacks are only valid in TIMER_MODE. Must be set - * to NULL in RADIO mode.* - */ -typedef struct { - void (*fapi_param_response) (fapiInstanceHdl_t fapiHdl, - pfapiParamResp_t resp); - void (*fapi_config_response) (fapiInstanceHdl_t fapiHdl, - pfapiConfigResp_t resp); - void (*fapi_stop_ind) (fapiInstanceHdl_t fapiHdl, - pfapiStopInd_t resp); - void (*fapi_error_ind) (fapiInstanceHdl_t fapiHdl, - pfapiErrorInd_t ind); - void (*fapi_subframe_ind) (fapiInstanceHdl_t fapiHdl, - pfapiSubframeInd_t ind); - void (*fapi_harq_ind) (fapiInstanceHdl_t fapiHdl, - pfapiHarqInd_t ind); - void (*fapi_crc_ind) (fapiInstanceHdl_t fapiHdl, - pfapiCrcInd_t ind); - void (*fapi_rx_ulsch_ind) (fapiInstanceHdl_t fapiHdl, - pfapiRxUlschInd_t ind); - void (*fapi_rx_cqi_ind) (fapiInstanceHdl_t fapiHdl, - pfapiRxCqiInd_t ind); - void (*fapi_rx_sr_ind) (fapiInstanceHdl_t fapiHdl, - pfapiRxSrInd_t ind); - void (*fapi_rach_ind) (fapiInstanceHdl_t fapiHdl, - pfapiRachInd_t ind); - void (*fapi_srs_ind) (fapiInstanceHdl_t fapiHdl, - pfapiSrsInd_t ind); -//------------------------------------------------------------------------------ -// Vendor Specific Callbacks -//------------------------------------------------------------------------------ - void (*fapi_rip_measurement) (fapiInstanceHdl_t fapiHdl, - pfapiMeasReport_t pMeasReport); - void (*fapi_start_phy_shutdown) (fapiInstanceHdl_t fapiHdl, - void *pMsgInd); - void (*fapi_shutdown_resp) (fapiInstanceHdl_t fapiHdl, - void *pMsgInd); - void (*fapi_start_cnf) (fapiInstanceHdl_t fapiHdl, - void *pMsgInd); - void (*fapi_ul_iq_samples) (fapiInstanceHdl_t fapiHdl, - void *pMsgInd); - void (*fapi_dl_iq_samples) (fapiInstanceHdl_t fapiHdl, - void *pMsgInd); - void (*fapi_ul_copy_results_ind) (fapiInstanceHdl_t fapiHdl, - void *pMsgInd); - - void (*fapi_endof_phy2mac_processing) (fapiInstanceHdl_t fapiHdl, - void *pMsgInd); -} fapiCb_t, *pfapiCb_t; - -//------------------------------------------------------------------------------ - -fapiStatus_t fapi_init(pfapiInitConfig_t pinitConfig); -fapiStatus_t fapi_destroy(void); -fapiInstanceHdl_t fapi_create(pfapiCb_t callbacks, - pfapiCreateConfig_t pCreateConfig); -fapiStatus_t fapi_delete(fapiInstanceHdl_t fapiHdl); - -//------------------------------------------------------------------------------ -// Fapi P5 Messages -//------------------------------------------------------------------------------ -fapiStatus_t fapi_param_request(fapiInstanceHdl_t fapiHdl, - pfapiParamReq_t req); -fapiStatus_t fapi_config_request(fapiInstanceHdl_t fapiHdl, - pfapiConfigReq_t req); -fapiStatus_t fapi_start_request(fapiInstanceHdl_t fapiHdl, - pfapiStartReq_t req); -fapiStatus_t fapi_stop_request(fapiInstanceHdl_t fapiHdl, - pfapiStopReq_t req); -//------------------------------------------------------------------------------ -// Fapi P7 Messages -//------------------------------------------------------------------------------ -fapiStatus_t fapi_dl_config_request(fapiInstanceHdl_t fapiHdl, - pfapiDlConfigReq_t req); -fapiStatus_t fapi_ul_config_request(fapiInstanceHdl_t fapiHdl, - pfapiUlConfigReq_t req); -fapiStatus_t fapi_hi_dci0_request(fapiInstanceHdl_t fapiHdl, - pfapiHiDci0Req_t req); -fapiStatus_t fapi_tx_request(fapiInstanceHdl_t fapiHdl, pfapiTxReq_t - req); -#endif -#endif //_FAPI_H_ - diff --git a/src/5gnrmac/fapi_interface.h b/src/5gnrmac/fapi_interface.h deleted file mode 100644 index c04751c6c..000000000 --- a/src/5gnrmac/fapi_interface.h +++ /dev/null @@ -1,1196 +0,0 @@ -/****************************************************************************** -* Copyright 2017 Cisco Systems, Inc. -* Copyright (c) 2019 Intel. -* -* Licensed under the Apache License, Version 2.0 (the "License"); -* you may not use this file except in compliance with the License. -* You may obtain a copy of the License at -* -* http://www.apache.org/licenses/LICENSE-2.0 -* -* Unless required by applicable law or agreed to in writing, software -* distributed under the License is distributed on an "AS IS" BASIS, -* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -* See the License for the specific language governing permissions and -* limitations under the License. -* -*******************************************************************************/ -// This file has been modified by Intel in order to support 5G FAPI:PHY API Specification -// Document 222.10.01 dated June 2019 -// Changes made by luis.farias@intel.com - -#ifndef _FAPI_INTERFACE_H_ -#define _FAPI_INTERFACE_H_ - -#if defined(__cplusplus) -extern "C" { -#endif - -typedef signed char int8_t; -typedef unsigned char uint8_t; -typedef int16_t int16_t; -typedef uint16_t uint16_t; -typedef int32_t int32_t; -typedef uint32_t uint32_t; - -// Update for 5G FAPI -#define FAPI_PARAM_REQUEST 0x00 -#define FAPI_PARAM_RESPONSE 0x01 -#define FAPI_CONFIG_REQUEST 0x02 -#define FAPI_CONFIG_RESPONSE 0x03 -#define FAPI_START_REQUEST 0x04 -#define FAPI_STOP_REQUEST 0x05 -#define FAPI_STOP_INDICATION 0x06 -#define FAPI_ERROR_INDICATION 0x07 -// Reserved 0x08 - 0x7f -#define FAPI_DL_TTI_REQUEST 0x80 -#define FAPI_UL_TTI_REQUEST 0x81 -#define FAPI_SLOT_INDICATION 0x82 -#define FAPI_UL_DCI_REQUEST 0x83 -#define FAPI_TX_DATA_REQUEST 0x84 -#define FAPI_RX_DATA_INDICATION 0x85 -#define FAPI_CRC_INDICATION 0x86 -#define FAPI_UCI_INDICATION 0x87 -#define FAPI_SRS_INDICATION 0x88 -#define FAPI_RACH_INDICATION 0x89 -// Reserved 0x8a -0xff - - - -// Tags per 5G FAPI -// Cell Parameters -#define FAPI_RELEASE_CAPABILITY_TAG 0x0001 -#define FAPI_PHY_STATE_TAG 0x0002 -#define FAPI_SKIP_BLANK_DL_CONFIG_TAG 0x0003 -#define FAPI_SKIP_BLANK_UL_CONFIG_TAG 0x0004 -#define FAPI_NUM_CONFIG_TLVS_TO_REPORT_TYPE_TAG 0x0005 -#define FAPI_CYCLIC_PREFIX_TAG 0x0006 -// PDCCH Parameters -#define FAPI_SUPPORTED_SUBCARRIER_SPACING_DL_TAG 0x0007 -#define FAPI_SUPPORTED_BANDWIDTH_DL_TAG 0x0008 -#define FAPI_SUPPORTED_SUBCARRIER_SPACING_UL_TAG 0x0009 -#define FAPI_SUPPORTED_BANDWIDTH_UL_TAG 0x000A -#define FAPI_CCE_MAPPING_TYPE_TAG 0x000B -#define FAPI_CORESET_OUTSIDE_FIRST_3_OFDM_SYMS_OF_SLOT_TAG 0x000c -#define FAPI_PRECODER_GRANULARITY_CORESET_TAG 0x000d -#define FAPI_PDCCH_MU_MIMO_TAG 0x000e -#define FAPI_PDCCH_PRECODER_CYCLING_TAG 0x000f -#define FAPI_MAX_PDCCHS_PER_SLOT_TAG 0x0010 -// PUCCH Parameters -#define FAPI_PUCCH_FORMATS_TAG 0x0011 -#define FAPI_MAX_PUCCHS_PER_SLOT_TAG 0x0012 -// PDSCH Parameters -#define FAPI_PDSCH_MAPPING_TYPE_TAG 0x0013 -#define FAPI_PDSCH_ALLOCATION_TYPES_TAG 0x0014 -#define FAPI_PDSCH_VRB_TO_PRB_MAPPING_TAG 0x0015 -#define FAPI_PDSCH_CBG_TAG 0x0016 -#define FAPI_PDSCH_DMRS_CONFIG_TYPES_TAG 0x0017 -#define FAPI_PDSCH_DMRS_MAX_LENGTH_TAG 0x0018 -#define FAPI_PDSCH_DMRS_ADDITIONAL_POS_TAG 0x0019 -#define FAPI_MAX_PDSCHS_TBS_PER_SLOT_TAG 0x001a -#define FAPI_MAX_NUMBER_MIMO_LAYERS_PDSCH_TAG 0x001b -#define FAPI_SUPPORTED_MAX_MODULATION_ORDER_DL_TAG 0x001c -#define FAPI_MAX_MU_MIMO_USERS_DL_TAG 0x001d -#define FAPI_PDSCH_DATA_IN_DMRS_SYMBOLS_TAG 0x001e -#define FAPI_PREMPTIONSUPPORT_TAG 0x001f -#define FAPI_PDSCH_NON_SLOT_SUPPORT_TAG 0x0020 -// PUSCH Parameters -#define FAPI_UCI_MUX_ULSCH_IN_PUSCH_TAG 0x0021 -#define FAPI_UCI_ONLY_PUSCH_TAG 0x0022 -#define FAPI_PUSCH_FREQUENCY_HOPPING_TAG 0x0023 -#define FAPI_PUSCH_DMRS_CONFIG_TYPES_TAG 0x0024 -#define FAPI_PUSCH_DMRS_MAX_LEN_TAG 0x0025 -#define FAPI_PUSCH_DMRS_ADDITIONAL_POS_TAG 0x0026 -#define FAPI_PUSCH_CBG_TAG 0x0027 -#define FAPI_PUSCH_MAPPING_TYPE_TAG 0x0028 -#define FAPI_PUSCH_ALLOCATION_TYPES_TAG 0x0029 -#define FAPI_PUSCH_VRB_TO_PRB_MAPPING_TAG 0x002a -#define FAPI_PUSCH_MAX_PTRS_PORTS_TAG 0x002b -#define FAPI_MAX_PDUSCHS_TBS_PER_SLOT_TAG 0x002c -#define FAPI_MAX_NUMBER_MIMO_LAYERS_NON_CB_PUSCH_TAG 0x002d -#define FAPI_SUPPORTED_MODULATION_ORDER_UL_TAG 0x002e -#define FAPI_MAX_MU_MIMO_USERS_UL_TAG 0x002f -#define FAPI_DFTS_OFDM_SUPPORT_TAG 0x0030 -#define FAPI_PUSCH_AGGREGATION_FACTOR_TAG 0x0031 -// PRACH Parameters -#define FAPI_PRACH_LONG_FORMATS_TAG 0x0032 -#define FAPI_PRACH_SHORT_FORMATS_TAG 0x0033 -#define FAPI_PRACH_RESTRICTED_SETS_TAG 0x0034 -#define FAPI_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG 0x0035 -// Measurement Parameters -#define FAPI_RSSI_MEASUREMENT_SUPPORT_TAG 0x0036 - -// CONFIG TLV TAGS per 5G FAPI -// Carrier Configuration -#define FAPI_DL_BANDWIDTH_TAG 0x1001 -#define FAPI_DL_FREQUENCY_TAG 0x1002 -#define FAPI_DL_K0_TAG 0x1003 -#define FAPI_DL_GRIDSIZE_TAG 0x1004 -#define FAPI_NUM_TX_ANT_TAG 0x1005 -#define FAPI_UPLINK_BANDWIDTH_TAG 0x1006 -#define FAPI_UPLINK_FREQUENCY_TAG 0x1007 -#define FAPI_UL_K0_TAG 0x1008 -#define FAPI_UL_GRID_SIZE_TAG 0x1009 -#define FAPI_NUM_RX_ANT_TAG 0x100a -#define FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG 0x100b -// Cell Configuration -#define FAPI_PHY_CELL_ID_TAG 0x100c -#define FAPI_FRAME_DUPLEX_TYPE_TAG 0x100d -// SSB Configuration -#define FAPI_SS_PBCH_POWER_TAG 0x100e -#define FAPI_BCH_PAYLOAD_TAG 0x100f -#define FAPI_SCS_COMMON_TAG 0x1010 -// PRACH Configuration -#define FAPI_PRACH_SEQUENCE_LENGTH_TAG 0x1011 -#define FAPI_PRACH_SUBC_SPACING_TAG 0x1012 -#define FAPI_RESTRICTED_SET_CONFIG_TAG 0x1013 -#define FAPI_NUM_PRACH_FD_OCCASIONS_TAG 0x1014 -#define FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG 0x1015 -#define FAPI_NUM_ROOT_SEQUENCES_TAG 0x1016 -#define FAPI_K1_TAG 0x1017 -#define FAPI_PRACH_ZERO_CORR_CONF_TAG 0x1018 -#define FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG 0x1019 -#define FAPI_UNUSED_ROOT_SEQUENCES_TAG 0x101a -#define FAPI_SSB_PER_RACH_TAG 0x101b -#define FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG 0x101c -// SSB Table -#define FAPI_SSB_OFFSET_POINT_A_TAG 0x101d -#define FAPI_BETA_PSS_TAG 0x101e -#define FAPI_SSB_PERIOD_TAG 0x101f -#define FAPI_SSB_SUBCARRIER_OFFSET_TAG 0x1020 -#define FAPI_MIB_TAG 0x1021 -#define FAPI_SSB_MASK_TAG 0x1022 -#define FAPI_BEAM_ID_TAG 0x1023 -#define FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG 0x1024 -#define FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG 0x1025 -// TDD Table -#define FAPI_TDD_PERIOD_TAG 0x1026 -#define FAPI_SLOT_CONFIG_TAG 0x1027 -// Measurement Configuration -#define FAPI_RSSI_MESUREMENT_TAG 0x1028 - -// Error Codes updated per 5G FAPI Table 3-31 -#define FAPI_MSG_OK 0x0 -#define FAPI_MSG_INVALID_STATE 0x1 -#define FAPI_MSG_INVALID_CONFIG 0x2 -#define FAPI_MSG_SFN_OUT_OF_SYNC 0x3 -#define FAPI_MSG_SLOT_ERR 0x4 -#define FAPI_MSG_BCH_MISSING 0x5 -#define FAPI_MSG_INVALID_SFN 0x6 -#define FAPI_MSG_UL_DCI_ERR 0x7 -#define FAPI_MSG_TX_ERR 0x8 - - -// TODO : Work out what the correct maximums should be// Needs Review for 5G -#if 0 -// Number of UL/DL configurations, I, as defined by 36.212 section 5.3.3.1.4 -// todo : work out what the max is -#define FAPI_MAX_UL_DL_CONFIGURATIONS 4 -#define FAPI_MAX_NUM_PHYSICAL_ANTENNAS 4 -#define FAPI_MAX_NUM_SCHEDULED_UES 8 -#define FAPI_MAX_NUM_SUBBANDS 8 -#define FAPI_MAX_ANTENNA_PORT_COUNT 2 -#endif - -// 5G FAPI Definitions -#define NUMEROLOGIES 5 -#define MAX_NUM_UNUSED_ROOT_SEQUENCES 63 // 38.331 page 383 -#define MAX_NUM_PRACH_FD_OCCASIONS 64 // 38.331 page 383 -#define MAX_NUM_OF_SYMBOLS_PER_SLOT 14 -#define MAX_TDD_PERIODICITY 160// 38.212 11.1 for u=4 and P=10 ms -#define MAX_NUMBER_TX_RUS 4 // m=p*q with p number of panels and q number of TxRU/RxRU per panel, depends on - // the RF configuration, currently n=m=4, q=1, p=4 and k=21 (number of beams per pannel). n number of antenna ports -#define MAX_NUMBER_OF_BEAMS 64 // Intel API Page 27 -#define MAX_NUM_ANT_PORTS 8 // Based on current RF -#define MAX_NUM_LAYERS 8 // 38.211 Table 7.3.1.3-1 -#define MAX_NUM_TLVS_CELL_CONFIG 2 // 5G FAPI Table 3-9 (A) -#define MAX_NUM_TLVS_CARRIER_CONFIG 27 // 5G FAPI Table 3-10 (B) -#define MAX_NUM_TLVS_PDCCH_CONFIG 6 // 5G FAPI Table 3-11 (C) -#define MAX_NUM_TLVS_PUCCH_CONFIG 2 // 5G FAPI Table 3-12 (D) -#define MAX_NUM_TLVS_PDSCH_CONFIG 14 // 5G FAPI Table 3-13 (E) -#define MAX_NUM_TLVS_PUSCH_CONFIG 17 // 5G FAPI Table 3-14 (F) -#define MAX_NUM_TLVS_PRACH_CONFIG 4 // 5G FAPI Table 3-15 (G) -#define MAX_NUM_TLVS_MEAS_CONFIG 1 // 5G FAPI Table 3-16 (H) -#define MAX_NUM_TLVS_CONFIG 74 // A+B+C+D+E+F+G+H + Padding -#define MAX_NUMBER_UNSUPPORTED_TLVS 74 -#define MAX_NUMBER_OF_INVALID_IDLE_ONLY_TLVS 74 -#define MAX_NUMBER_OF_INVALID_RUNNING_ONLY_TLVS 74 -#define MAX_NUMBER_OF_MISSING_TLVS 74 -#define MAX_NUM_DIGBFINTERFACES 4 // Based on RF, 5G FAPI says {0,255} -#define MAX_NUM_PRGS_PER_TTI 4 // Based on 38.214 5.1.2.3 -#define DCI_PAYLOAD_BYTE_LEN 32 // Based on Intel API MAX_DCI_BIT_BYTE_LEN -#define MAX_NUMBER_DL_DCI 32 // Based on Intel API MAX_NUM_PDCCH -#define MAX_NUMBER_OF_CODEWORDS_PER_PDU 2 // Based on MAX_DL_CODEWORD -#define MAX_NUMBER_DL_PDUS_PER_TTI 129 // Based on (MAX_NUM_PDSCH*MAX_DL_CODEWORD + MAX_NUM_PDCCH + MAX_NUM_SRS + 1 PBCH/SLOT) -#define MAX_NUMBER_OF_UES_PER_TTI 16 // Per common_ran_parameters.h -#define MAX_NUM_CB_PER_TTI_IN_BYTES 192 // Based on Max Tb size of 1376264 bits + 24 crc over (8848-24) and O/H -#define MAX_NUM_PTRS_PORTS 12 // Per 3GPP 38.212 Table 7.3.1.1.2-21 -#define MAX_NUMBER_OF_GROUPS_PER_TTI 8 // FlexRAN API Table 33 -#define MAX_NUMBER_UL_PDUS_PER_TTI 328 // (MAX_NUM_PUSCH+MAX_NUM_PUCCH+MAX_NUM_SRS+MAX_NUM_PRACH_DET) -#define MAX_NUMBER_DCI_PDUS_PER_TTI 32 // Based on MAX_NUM_PDCCH -#define MAX_NUMBER_OF_TLVS_PER_PDU 32 // Based on FAPI/nFAPI implementation -#define MAX_NUMBER_TX_PDUS_PER_TTI 129 // Same as MAX_NUMBER_DL_PDUS_PER_TTI -#define MAX_PDU_LENGTH 172096 // Based on 38.214 5.1.3.4, the TBS is 1376264 bits and divided by 8 and aligned to 64 bytes -#define MAX_NUMBER_OF_PDUS_PER_TTI 129 // Same as MAX_NUMBER_DL_PDUS_PER_TTI -#define MAX_NUMBER_OF_ULSCH_PDUS_PER_TTI 64 // NUM_PUSCH_CHAN*MAX_NUMBER_OF_CODEWORDS_PER_PDU -#define MAX_NUMBER_OF_CRCS_PER_SLOT 32 // Based on MAX_NUM_UL_CHAN -#define MAX_HARQ_INFO_LEN_BYTES 214 // Based on 5G FAPI Table 3-70 -#define MAX_CSI_PART1_DATA_BYTES 214 // Based on 5G FAPI Table 3-71 -#define MAX_CSI_PART2_DATA_BYTES 214 // Based on 5G FAPI Table 3-72 -#define MAX_NUMBER_OF_HARQS_PER_IND 2 // Based on 5G FAPI Table 3-68 -#define MAX_SR_PAYLOAD_SIZE 1 // Based on 5G FAPI Table 3-69 -#define MAX_HARQ_PAYLOAD_SIZE 214 // Based on 5G FAPI Table 3-70 -#define MAX_NUMBER_UCI_PDUS_PER_SLOT 200 // Based on MAX_NUM_PUCCH -#define MAX_NUMBER_RBS 273 // Based on MAX_NUM_OF_PRB_IN_FULL_BAND -#define MAX_NUMBER_OF_REP_SYMBOLS 4 // Based on 5g FAPI Table 3-73 -#define MAX_NUMBER_SRS_PDUS_PER_SLOT 32 // Based on MAX_NUM_SRS -#define MAX_NUM_PREAMBLES_PER_SLOT 64 // Based on MAX_NUM_PRACH_DET -#define MAX_NUMBER_RACH_PDUS_PER_SLOT 64 // Based on MAX_NUM_PRACH_DET - -// Updated per 5G FAPI -typedef struct { - uint8_t numberOfMessagesIncluded; - uint8_t handle; // Can be used for Phy Id or Carrier Id -} fapi_msg_header_t; -// Updated per 5G FAPI -typedef struct { - uint8_t message_type_id; - uint32_t length; // Length of the message body in bytes -} fapi_msg_t; -// Updated per 5G FAPI -typedef struct { - uint16_t tag; - uint16_t length; -} fapi_tl_t; -// Updated per 5G FAPI -typedef struct { - fapi_tl_t tl; - uint8_t value; -} fapi_uint8_tlv_t; -// Updated per 5G FAPI -typedef struct { - fapi_tl_t tl; - uint16_t value; -} fapi_uint16_tlv_t; -// Updated per 5G FAPI -typedef struct { - fapi_tl_t tl; - int16_t value; -} fapi_int16_tlv_t; -// Updated per 5G FAPI -typedef struct { - fapi_tl_t tl; - uint32_t value; -} fapi_uint32_tlv_t; -// Updated per 5G FAPI -typedef struct { - uint16_t tag; // In 5G FAPI for Cell Params - uint8_t length; - uint8_t value; -} fapi_config_tlv_t; - -// Updated per 5G FAPI -typedef struct { - fapi_msg_t header; // For PARAM.req message length in fapi_msg_t is zero -} fapi_param_req_t; - -// Updated per 5G FAPI -typedef struct { - fapi_uint16_tlv_t releaseCapability; - fapi_uint16_tlv_t phyState; - fapi_uint8_tlv_t skipBlankDlConfig; - fapi_uint8_tlv_t skipBlankUlConfig; - fapi_uint16_tlv_t numTlvsToReport; - //fapi_param_tlv_t tlvStatus[MAX_NUMBER_OF_CONFIG_PARMS]; // Need to define this value based on 5G FAPI -} fapi_cell_parms_t; - -// Updated per 5G FAPI -typedef struct { - fapi_uint8_tlv_t cyclicPrefix; - fapi_uint8_tlv_t supportedSubcarrierSpacingDl; - fapi_uint16_tlv_t supportedBandwidthDl; - fapi_uint8_tlv_t supportedSubcarrierSpecingsUl; - fapi_uint16_tlv_t supportedBandwidthUl; -} fapi_carrier_parms_t; - -// Updated per 5G FAPI -typedef struct { - fapi_uint8_tlv_t cceMappingType; - fapi_uint8_tlv_t coresetOutsideFirst3OfdmSymsOfSlot; - fapi_uint8_tlv_t precoderGranularityCoreset; - fapi_uint8_tlv_t pdcchMuMimo; - fapi_uint8_tlv_t pdcchPrecoderCycling; - fapi_uint8_tlv_t maxPdcchsPerSlot; -} fapi_pdcch_parms_t; - -// Updated per 5G FAPI -typedef struct { - fapi_uint8_tlv_t pucchFormats; - fapi_uint8_tlv_t maxPucchsPerSlot; -} fapi_pucch_parms_t; - -// Updated per 5G FAPI -typedef struct { - fapi_uint8_tlv_t pdschMappingType; - fapi_uint8_tlv_t pdschAllocationTypes; - fapi_uint8_tlv_t pdschVrbToPrbMapping; - fapi_uint8_tlv_t pdschCbg; - fapi_uint8_tlv_t pdschDmrsConfigTypes; - fapi_uint8_tlv_t pdschDmrsMaxLength; - fapi_uint8_tlv_t pdschDmrsAdditionalPos; - fapi_uint8_tlv_t maxPdschsTBsPerSlot; - fapi_uint8_tlv_t maxNumberMimoLayersPdsch; - fapi_uint8_tlv_t supportedMaxModulationOrderDl; - fapi_uint8_tlv_t maxMuMimoUsersDl; - fapi_uint8_tlv_t pdschDataInDmrsSymbols; - fapi_uint8_tlv_t premptionSupport; - fapi_uint8_tlv_t pdschNonSlotSupport; -} fapi_pdsch_parms_t; - -// Updated per 5G FAPI -typedef struct { - fapi_uint8_tlv_t uciMuxUlschInPusch; - fapi_uint8_tlv_t uciOnlyPusch; - fapi_uint8_tlv_t puschFrequencyHopping; - fapi_uint8_tlv_t puschDmrsConfigTypes; - fapi_uint8_tlv_t puschDmrsMaxLen; - fapi_uint8_tlv_t puschDmrsAditionalPos; - fapi_uint8_tlv_t puschCbg; - fapi_uint8_tlv_t puschMappingType; - fapi_uint8_tlv_t puschAllocationTypes; - fapi_uint8_tlv_t puschVrbToPrbMapping; - fapi_uint8_tlv_t puschMaxPtrsPorts; - fapi_uint8_tlv_t maxPduschsTBsPerSlot; - fapi_uint8_tlv_t maxNumberMimoLayersnonCbPusch; - fapi_uint8_tlv_t supportedModulationOrderUl; - fapi_uint8_tlv_t maxMuMimoUsersUl; - fapi_uint8_tlv_t dftsOfdmSupport; - fapi_uint8_tlv_t puschAggregationFactor; -} fapi_pusch_parms_t; - -// Updated per 5G FAPI -typedef struct { - fapi_uint8_tlv_t prachLongFormats; - fapi_uint8_tlv_t prachShortFormats; - fapi_uint8_tlv_t prachRestrictedSets; - fapi_uint8_tlv_t maxPrachFdOccasionsInASlot; -} fapi_prach_parms_t; - -// Updated per 5G FAPI -typedef struct { - fapi_uint8_tlv_t rssiMeasurementSupport; -} fapi_meas_parms_t; - -// Updated per 5G FAPI -typedef struct { - fapi_cell_parms_t cell_parms; - fapi_carrier_parms_t carr_parms; - fapi_pdcch_parms_t pdcch_parms; - fapi_pucch_parms_t pucch_parms; - fapi_pdsch_parms_t pdsch_parms; - fapi_pusch_parms_t pusch_parms; - fapi_prach_parms_t prach_parms; - fapi_meas_parms_t meas_parms; -} fapi_params_t; - -// Updated per 5G FAPI -typedef struct { - fapi_msg_t header; - uint8_t error_code; - uint8_t number_of_tlvs; - fapi_uint16_tlv_t tlvs[MAX_NUM_TLVS_CONFIG]; -} fapi_param_resp_t; - -// Updated per 5G FAPI -typedef struct { - fapi_uint16_tlv_t dlBandwidth; - fapi_uint32_tlv_t dlFrequency; - fapi_uint16_tlv_t dlk0[NUMEROLOGIES]; - fapi_uint16_tlv_t dlGridSize[NUMEROLOGIES]; - fapi_uint16_tlv_t numTxAnt; - fapi_uint16_tlv_t uplinkBandwidth; - fapi_uint32_tlv_t uplinkFrequency; - fapi_uint16_tlv_t ulk0[NUMEROLOGIES]; - fapi_uint16_tlv_t ulGridSize[NUMEROLOGIES]; - fapi_uint16_tlv_t numRxAnt; - fapi_uint8_tlv_t frequencyShift7p5KHz; -} fapi_carrier_config_t; - -// Updated per 5G FAPI -typedef struct { - fapi_uint8_tlv_t phyCellId; - fapi_uint8_tlv_t frameDuplexType; -} fapi_cell_config_t; - -// Updated per 5G FAPI -typedef struct { - fapi_uint32_tlv_t ssPbchPower; - fapi_uint8_tlv_t bchPayload; - fapi_uint8_tlv_t scsCommon; -} fapi_ssb_config_t; - -// Updated per 5G FAPI -typedef struct { - fapi_uint16_tlv_t prachRootSequenceIndex; - fapi_uint8_tlv_t numRootSequences; - fapi_uint8_tlv_t unusedRootSequences[MAX_NUM_UNUSED_ROOT_SEQUENCES]; -} fapi_prachFdOccasion_t; - -// Updated per 5G FAPI -typedef struct { - fapi_uint8_tlv_t prachSequenceLength; - fapi_uint8_tlv_t prachSubCSpacing; - fapi_uint8_tlv_t restrictedSetConfig; - fapi_prachFdOccasion_t prachFdOccasion[MAX_NUM_PRACH_FD_OCCASIONS]; - fapi_uint8_tlv_t ssbPerRach; - fapi_uint8_tlv_t prachMultipleCarriersInABand; -} fapi_prach_configuration_t; - -//Updated per 5G FAPI -typedef struct { - fapi_uint16_tlv_t ssbOffsetPointA; - fapi_uint8_tlv_t betaPss; - fapi_uint8_tlv_t ssbPeriod; - fapi_uint8_tlv_t ssbSubCarrierOffset; - fapi_uint32_tlv_t mib; - fapi_uint32_tlv_t ssbMask[2]; - fapi_uint8_tlv_t beamId[64]; - fapi_uint8_tlv_t ssPbchMultipleCarriersInABand; - fapi_uint8_tlv_t multipleCellsSsPbchInACarrier; -} fapi_ssb_table_t; - -// Updated per 5G FAPI -typedef struct { - fapi_uint8_tlv_t slotConfig[MAX_NUM_OF_SYMBOLS_PER_SLOT]; -} fapi_slotconfig_t; - -// Updated per 5G FAPI -typedef struct { - fapi_uint8_tlv_t tddPeriod; - fapi_slotconfig_t slotConfig[MAX_TDD_PERIODICITY]; -} fapi_tdd_table_t; - -// Updated per 5G FAPI -typedef struct { - fapi_uint8_tlv_t rssiMeasurement; -} fapi_meas_config_t; - -// Updated per 5G FAPI -typedef struct { - int16_t digBeamWeightRe; - int16_t digBeamWeightIm; -} fapi_dig_beam_weight_t; - -// Updated per 5G FAPI -typedef struct { - uint16_t beamIdx; - fapi_dig_beam_weight_t digBeamWeight[MAX_NUMBER_TX_RUS]; -} fapi_dig_beam_config_t; - -// Updated per 5G FAPI -typedef struct { - uint16_t numDigBeams; - uint16_t numTxRus; - fapi_dig_beam_config_t digBeam[MAX_NUMBER_OF_BEAMS]; -} fapi_beamforming_table_t; - -// Updated per 5G FAPI -typedef struct { - int16_t preCoderWeightRe; - int16_t preCoderWeightIm; -} fapi_precoderWeight_t; - -// Updated per 5G FAPI -typedef struct { - fapi_precoderWeight_t precoder_weight[MAX_NUM_ANT_PORTS]; -} fapi_precoder_weight_t; - -// Updated per 5G FAPI -typedef struct { - uint16_t pmIdx; - uint16_t numLayers; - uint16_t numAntPorts; - fapi_precoder_weight_t precoderWeight[MAX_NUM_LAYERS]; -} fapi_precoding_table_t; - -// Updated per 5G FAPI -typedef struct { - fapi_carrier_config_t carrierConfig; - fapi_cell_config_t cellConfig; - fapi_ssb_config_t ssbConfig; - //fapi_prach_config_t prachConfig; //To be defined - fapi_ssb_table_t ssbTable; - fapi_tdd_table_t tddTable; - fapi_meas_config_t measConfig; - fapi_beamforming_table_t beamformingTable; - fapi_precoding_table_t precodingTable; - } fapi_config_t; - -// Updated per 5G FAPI -typedef struct { - fapi_msg_t header; - uint8_t number_of_tlvs; - fapi_uint16_tlv_t tlvs[MAX_NUM_TLVS_CONFIG]; -} fapi_config_req_t; - -// Updated per 5G FAPI -typedef struct { - fapi_msg_t header; - uint8_t error_code; - uint8_t number_of_invalid_tlvs; - uint8_t number_of_inv_tlvs_idle_only; - uint8_t number_of_missing_tlvs; - fapi_uint16_tlv_t tlvs[4*MAX_NUM_TLVS_CONFIG]; - // fapi_uint16_tlv_t unsupported_or_invalid_tlvs[MAX_NUMBER_UNSUPPORTED_TLVS]; - // fapi_uint16_tlv_t invalid_idle_only_tlvs[MAX_NUMBER_OF_INVALID_IDLE_ONLY_TLVS]; - // fapi_uint16_tlv_t invalid_running_only_tlvs[MAX_NUMBER_OF_INVALID_RUNNING_ONLY_TLVS]; - // fapi_uint16_tlv_t missing_tlvs[MAX_NUMBER_OF_MISSING_TLVS]; -} fapi_config_resp_t; - -// Updated per 5G FAPI -typedef struct { - fapi_msg_t header; // Message Length is zero for START.request -} fapi_start_req_t; - -// Updated per 5G FAPI -typedef struct { - fapi_msg_t header; // Message Length is zero for STOP.request -} fapi_stop_req_t; - -// Updated per 5G FAPI -typedef struct { - fapi_msg_t header; // Message Length is zero for STOP.indication -} fapi_stop_ind_t; - -// Updated per 5G FAPI -typedef struct { - fapi_msg_t header; - uint16_t sfn; - uint16_t slot; - uint8_t message_id; - uint8_t error_code; -} fapi_error_ind_t; - -// Updated per 5G FAPI -typedef struct { - fapi_msg_t header; - uint16_t sfn; - uint16_t slot; -} fapi_slot_ind_t; - -// Updated per 5G FAPI -typedef struct { - uint16_t beamidx; -} fapi_bmi_t; - -// Updated per 5G FAPI -typedef struct { - uint16_t pmIdx; - fapi_bmi_t beamIdx[MAX_NUM_DIGBFINTERFACES]; -} fapi_pmi_bfi_t; - -// Updated per 5G FAPI -typedef struct { - uint16_t numPrgs; - uint16_t prgSize; - uint8_t digBfInterfaces; - fapi_pmi_bfi_t pmi_bfi[MAX_NUM_PRGS_PER_TTI]; -} fapi_precoding_bmform_t; - -// Updated per 5G FAPI -typedef struct { - uint16_t rnti; - uint16_t scramblingId; - uint16_t scramblingRnti; - uint8_t cceIndex; - uint8_t aggregationLevel; - fapi_precoding_bmform_t pc_and_bform; - uint8_t beta_pdcch_1_0; - uint8_t powerControlOfssetSS; - uint16_t payloadSizeBits; - uint8_t payload[DCI_PAYLOAD_BYTE_LEN]; -} fapi_dl_dci_t; - -// Updated per 5G FAPI -typedef struct { - uint16_t bwpSize; - uint16_t bwpPart; - uint8_t subCarrierSpacing; - uint8_t cyclicPrefix; - uint8_t startSymbolIndex; - uint8_t durationSymbols; - uint8_t freqDomainResource[6]; - uint8_t cceRegMappingType; - uint8_t regBundleSize; - uint8_t interleaverSize; - uint8_t coreSetSize; - uint16_t shiftIndex; - uint8_t precoderGranularity; - uint16_t numDlDci; - fapi_dl_dci_t* dlDci; - } fapi_dl_pddch_pdu_t; - - // Updated per 5G FAPI - typedef struct { - uint16_t targetCodeRate; - uint8_t qamModOrder; - uint8_t mcsIndex; - uint8_t mcsTable; - uint8_t rvIndex; - uint32_t tbSize; - } fapi_codeword_pdu_t; - - // Updated per 5G FAPI - typedef struct { - uint16_t pduBitMap; - uint16_t rnti; - uint16_t pduIndex; - uint16_t bwpSize; - uint16_t bwpStart; - uint8_t subCarrierSpacing; - uint8_t cyclicPrefix; - uint8_t nrOfCodeWords; - fapi_codeword_pdu_t cwInfo[MAX_NUMBER_OF_CODEWORDS_PER_PDU]; - uint16_t dataScramblingId; - uint8_t nrOfLayers; - uint8_t transmissionScheme; - uint8_t refPoint; - uint16_t dlDmrsSymbPos; - uint8_t dmrsConfigType; - uint16_t dlDmrsScramblingId; - uint8_t scid; - uint8_t numDmrsCdmGrpsNoData; - uint16_t dmrsPorts; - uint8_t resourceAlloc; - uint8_t rbBitmap; - uint16_t rbStart; - uint16_t rbSize; - uint8_t vrbToPrbMapping; - uint8_t startSymbIndex; - uint8_t nrOfSymbols; - uint8_t ptrsPortIndex; - uint8_t ptrsTimeDensity; - uint8_t ptrsFreqDensity; - uint8_t ptrsReOffset; - uint8_t nEpreRatioOfPdschToPtrs; - fapi_precoding_bmform_t preCodingAndBeamforming; - uint8_t powerControlOffset; - uint8_t powerControlOffsetSS; - uint8_t isLastCbPresent; - uint8_t isInlineTbCrc; - uint32_t dlTbCrc; - } fapi_dl_pdsch_pdu_t; - - // Updated per 5G FAPI - typedef struct { - uint16_t bwpSize; - uint16_t bwpStart; - uint8_t subCarrierSpacing; - uint8_t cyclicPrefix; - uint16_t startRb; - uint16_t nrOfRbs; - uint8_t csiType; - uint8_t row; - uint16_t freqDomain; - uint8_t symbL0; - uint8_t symbL1; - uint8_t cdmType; - uint8_t freqDensity; - uint16_t scramId; - uint8_t powerControlOffset; - uint8_t powerControlOffsetSs; - fapi_precoding_bmform_t preCodingAndBeamforming; - } fapi_dl_csi_rs_pdu_t; - -// Updated per 5G FAPI - typedef struct { - uint8_t dmrsTypeAPosition; - uint8_t pdcchConfigSib1; - uint8_t cellBarred; - uint8_t intraFreqReselction; - } fapi_phy_mib_pdu_t; - -// Updated per 5G FAPI - typedef struct { - union - { - uint32_t bchPayload; - fapi_phy_mib_pdu_t phyMibPdu; - }v; - } fapi_bch_payload_t; - - // Updated per 5G FAPI - typedef struct { - - uint16_t physCellId; - uint8_t betaPss; - uint8_t ssbBlockIndex; - uint16_t ssbSubCarrierOffset; - uint8_t ssbOffsetPointA; - uint8_t bchPayloadFlag; - fapi_bch_payload_t bchPayload; - fapi_precoding_bmform_t preCodingAndBeamforming; - } fapi_dl_ssb_pdu_t; - -// Updated per 5G FAPI - typedef struct { - uint16_t pduType; - uint16_t pduSize; - union - { - fapi_dl_pddch_pdu_t pdcch_pdu; - fapi_dl_pdsch_pdu_t pdsch_pdu; - fapi_dl_csi_rs_pdu_t csi_rs_pdu; - fapi_dl_ssb_pdu_t ssb_pdu; - }u; -} fapi_dl_tti_req_pdu_t; - -// Updated per 5G FAPI -typedef struct { - fapi_msg_t header; - uint16_t sfn; - uint16_t slot; - uint8_t nPdus; - uint8_t nGroup; - fapi_dl_tti_req_pdu_t* pdus; -} fapi_dl_tti_req_t; - -// Updated per 5G FAPI -typedef struct { - uint8_t physCellId; - uint8_t numPrachOcas; - uint8_t prachFormat; - uint8_t numRa; - uint8_t prachStartSymbol; - uint8_t numCs; - fapi_precoding_bmform_t beamforming; -} fapi_ul_prach_pdu_t; - -// Updated per 5G FAPI -typedef struct { - uint8_t nUe; - uint8_t pduIdx[MAX_NUMBER_OF_UES_PER_TTI]; -} fapi_ue_info_t; - -// Updated per 5G FAPI -typedef struct { - uint8_t rvIndex; - uint8_t harqProcessId; - uint8_t newDataIndicator; - uint32_t tbSize; - uint16_t numCb; - uint8_t cbPresentAndPosition[MAX_NUM_CB_PER_TTI_IN_BYTES]; -}fapi_pusch_data_t; - -// Updated per 5G FAPI -typedef struct { - uint16_t harqAckBitLength; - uint16_t csiPart1BitLength; - uint16_t csiPart2BitLength; - uint8_t alphaScaling; - uint8_t betaOffsetHarqAck; - uint8_t betaOffsetCsi1; - uint8_t betaOffsetCsi2; -} fapi_pusch_uci_t; - -// Updated per 5G FAPI -typedef struct { - uint16_t ptrsPortIndex; - uint8_t ptrsDmrsPort; - uint8_t ptrsReOffset; -} fapi_ptrs_info_t; - -// Updated per 5G FAPI -typedef struct { - uint8_t numPtrsPorts; - fapi_ptrs_info_t ptrsInfo[MAX_NUM_PTRS_PORTS]; - uint8_t ptrsTimeDensity; - uint8_t ptrsFreqDensity; - uint8_t ulPtrsPower; -} fapi_pusch_ptrs_t; - -// Updated per 5G FAPI -typedef struct { - uint8_t lowPaprGroupNumber; - uint16_t lowPaprSequenceNumber; - uint8_t ulPtrsSampleDensity; - uint8_t ulPtrsTimeDensityTransformPrecoding; -} fapi_dfts_ofdm_t; - -// Updated per 5G FAPI -typedef struct { - uint16_t pduBitMap; - uint16_t rnti; - uint32_t handle; - uint16_t bwpSize; - uint16_t bwpStart; - uint8_t subCarrierSpacing; - uint8_t cyclicPrefix; - uint16_t targetCodeRate; - uint8_t qamModOrder; - uint8_t mcsIndex; - uint8_t mcsTable; - uint8_t transformPrecoding; - uint16_t dataScramblingId; - uint8_t nrOfLayers; - uint16_t ulDmrsSymbPos; - uint8_t dmrsConfigType; - uint16_t ulDmrsScramblingId; - uint8_t scid; - uint8_t numDmrsCdmGrpsNoData; - uint16_t dmrsPorts; - uint8_t resourceAlloc; - uint8_t rbBitmap[36]; - uint16_t rbStart; - uint16_t rbSize; - uint8_t vrbToPrbMapping; - uint8_t frequencyHopping; - uint16_t txDirectCurrentLocation; - uint8_t uplinkFrequencyShift7p5khz; - uint8_t startSymbIndex; - uint8_t nrOfSymbols; - fapi_pusch_data_t puschData; - fapi_pusch_uci_t puschUci; - fapi_pusch_ptrs_t puschPtrs; - fapi_dfts_ofdm_t dftsOfdm; - fapi_precoding_bmform_t beamforming; -} fapi_ul_pusch_pdu_t; - -// Updated per 5G FAPI -typedef struct { - uint16_t rnti; - uint32_t handle; - uint16_t bwpSize; - uint16_t bwpStart; - uint8_t subCarrierSpacing; - uint8_t cyclicPrefix; - uint8_t formatType; - uint8_t multiSlotTxIndicator; - uint8_t pi2Bpsk; - uint16_t prbStart; - uint16_t prbSize; - uint8_t startSymbolIndex; - uint8_t nrOfSymbols; - uint8_t freqHopFlag; - uint16_t secondHopPrb; - uint8_t groupHopFlag; - uint8_t sequenceHopFlag; - uint16_t hoppingId; - uint16_t initialCyclicShift; - uint16_t dataScramblingId; - uint8_t timeDomainOccIdx; - uint8_t preDftOccIdx; - uint8_t preDftOccLen; - uint8_t addDmrsFlag; - uint16_t dmrsScramblingId; - uint8_t dmrsCyclicShift; - uint8_t srFlag; - uint8_t bitLenHarq; - uint16_t bitLenCsiPart1; - uint16_t bitLenCsiPart2; - fapi_precoding_bmform_t beamforming; -} fapi_ul_pucch_pdu_t; - -// Updated per 5G FAPI -typedef struct { - uint16_t rnti; - uint32_t handle; - uint16_t bwpsize; - uint16_t bwpstart; - uint8_t subCarrierSpacing; - uint8_t cyclicPrefix; - uint8_t numAntPorts; - uint8_t numSymbols; - uint8_t numRepetitions; - uint8_t timeStartPosition; - uint8_t configIndex; - uint16_t sequenceId; - uint8_t bandwidthIndex; - uint8_t combSize; - uint8_t combOffset; - uint8_t cyclicShift; - uint8_t frequencyPosition; - uint8_t frequencyShift; - uint8_t frequencyHopping; - uint8_t groupOrSequenceHopping; - uint8_t resourceType; - uint16_t tSrs; - uint16_t tOffset; - fapi_precoding_bmform_t beamforming; -} fapi_ul_srs_pdu_t; - -// Updated per 5G FAPI -typedef struct { - uint16_t pduType; - uint16_t pduSize; - union - { - fapi_ul_prach_pdu_t prach_pdu; - fapi_ul_pusch_pdu_t pusch_pdu; - fapi_ul_pucch_pdu_t pucch_pdu; - fapi_ul_srs_pdu_t srs_pdu; - //fapi_ul_rx_bmform_pdu_t rx_beamforming_pdu; //To be defined - }; - fapi_ue_info_t ueGrpInfo[MAX_NUMBER_OF_GROUPS_PER_TTI]; -} fapi_ul_tti_req_pdu_t; - -// Updated per 5G FAPI -typedef struct { - fapi_msg_t header; - uint16_t sfn; - uint16_t slot; - uint8_t nPdus; - uint8_t rachPresent; - uint8_t nUlsch; - uint8_t nUlcch; - uint8_t nGroup; - fapi_ul_tti_req_pdu_t* pdus; -} fapi_ul_tti_req_t; - -// Updated per 5G FAPI -typedef struct { - uint16_t pduType; - uint16_t pduSize; - //fapi_dl_pdcch_pdu_t pdcchPduConfig; //To be defined - } fapi_dci_pdu_t; - - // Updated per 5G FAPI -typedef struct { - fapi_msg_t header; - uint16_t sfn; - uint16_t slot; - uint8_t numPdus; - fapi_dci_pdu_t* pdus; -} fapi_ul_dci_req_t; - -// Updated per 5G FAPI -typedef struct { - uint16_t pduLength; - uint16_t pduIndex; - uint32_t numTlvs; - fapi_uint32_tlv_t tlvs[MAX_NUMBER_OF_TLVS_PER_PDU]; -} fapi_tx_pdu_desc_t; - -// Updated per 5G FAPI -typedef struct { - fapi_msg_t header; - uint16_t sfn; - uint16_t slot; - uint16_t numPdus; - fapi_tx_pdu_desc_t* pduDesc; -} fapi_tx_data_req_t; - -// Updated per 5G FAPI -typedef struct { - uint32_t handle; - uint16_t rnti; - uint8_t harqId; - uint16_t pduLength; - uint8_t ul_cqi; - uint16_t timingAdvance; - uint16_t rssi; - void* pduData; -} fapi_pdu_ind_info_t; - - // Updated per 5G FAPI -typedef struct { - fapi_msg_t header; - uint16_t sfn; - uint16_t slot; - uint16_t numPdus; - fapi_pdu_ind_info_t pdus[MAX_NUMBER_OF_ULSCH_PDUS_PER_TTI]; -} fapi_rx_data_indication_t; - -// Updated per 5G FAPI -typedef struct { - uint32_t handle; - uint16_t rnti; - uint8_t harqId; - uint8_t tbCrcStatus; - uint16_t numCb; - uint8_t cbCrcStatus[MAX_NUM_CB_PER_TTI_IN_BYTES]; - uint8_t ul_cqi; - uint16_t timingAdvance; - uint16_t rssi; -} fapi_crc_ind_info_t; - -// Updated per 5G FAPI -typedef struct { - fapi_msg_t header; - uint16_t sfn; - uint16_t slot; - uint16_t numCrcs; - fapi_crc_ind_info_t crc[MAX_NUMBER_OF_CRCS_PER_SLOT]; -} fapi_crc_ind_t; - -// Updated per 5G FAPI -typedef struct { - uint8_t harqCrc; - uint16_t harqBitLen; - uint8_t harqPayload[MAX_HARQ_INFO_LEN_BYTES]; -} fapi_harq_info_t; - -// Updated per 5G FAPI -typedef struct { - uint8_t csiPart1Crc; - uint16_t csiPart1BitLen; - uint8_t csiPart1Payload[MAX_CSI_PART1_DATA_BYTES]; -} fapi_csi_p1_info_t; - -// Updated per 5G FAPI -typedef struct { - uint8_t csiPart2Crc; - uint16_t csiPart2BitLen; - uint8_t csiPart2Payload[MAX_CSI_PART2_DATA_BYTES]; -} fapi_csi_p2_info_t; - -// Updated per 5G FAPI -typedef struct { - uint8_t pduBitmap; - uint32_t handle; - uint16_t rnti; - uint8_t ul_cqi; - uint16_t timingAdvance; - uint16_t rssi; -// fapi_harq_info_t harqInfo; // This is included if indicated by the pduBitmap -// fapi_csi_p1_info_t csiPart1info; // This is included if indicated by the pduBitmap -// fapi_csi_p2_info_t csiPart2info; // This is included if indicated by the pduBitmap -} fapi_uci_o_pusch_t; - -// Updated per 5G FAPI -typedef struct { - uint8_t srIndication; - uint8_t srConfidenceLevel; -} fapi_sr_f0f1_info_t; - -// Updated per 5G FAPI -typedef struct { - uint8_t numHarq; - uint8_t harqConfidenceLevel; - uint8_t harqValue[MAX_NUMBER_OF_HARQS_PER_IND]; -} fapi_harq_f0f1_info_t; - -// Updated per 5G FAPI -typedef struct { - uint16_t srBitlen; - uint8_t srPayload[MAX_SR_PAYLOAD_SIZE]; -} fapi_sr_f2f3f4_info_t; - -// Updated per 5G FAPI -typedef struct { - uint16_t harqCrc; - uint16_t harqBitLen; - uint8_t harqPayload[MAX_HARQ_PAYLOAD_SIZE]; -} fapi_harq_f2f3f4_info_t; - -// Updated per 5G FAPI -typedef struct { - uint8_t pduBitmap; - uint32_t handle; - uint16_t rnti; - uint8_t pucchFormat; - uint8_t ul_cqi; - uint16_t timingAdvance; - uint16_t rssi; - // fapi_sr_f2f3f4_info_t srInfo; // This is included if indicated by the pduBitmap - // fapi_harq_f2f3f4_info_t harqInfo; // This is included if indicated by the pduBitmap - // fapi_csi_p1_info_t csiPart1Info; // This is included if indicated by the pduBitmap - // fapi_csi_p2_info_t csiPart2Info; // This is included if indicated by the pduBitmap -} fapi_uci_o_pucch_f2f3f4_t; - -// Updated per 5G FAPI -typedef struct { - uint8_t pduBitmap; - uint32_t handle; - uint16_t rnti; - uint8_t pucchFormat; - uint8_t ul_cqi; - uint16_t timingAdvance; - uint16_t rssi; - // fapi_sr_f0f1_info_t srInfo; // This is included if indicated by the pduBitmap - // fapi_harq_f0f1_info_t harqInfo; // This is included if indicated by the pduBitmap -} fapi_uci_o_pucch_f0f1_t; - -// Updated per 5G FAPI -typedef struct { - uint16_t pduType; - uint16_t pduSize; - union - { - fapi_uci_o_pusch_t uciPusch; - fapi_uci_o_pucch_f0f1_t uciPucchF0F1; - fapi_uci_o_pucch_f2f3f4_t uciPucchF2F3F4; - }; -} fapi_uci_pdu_info_t; - -// Updated per 5G FAPI -typedef struct { - fapi_msg_t header; - uint16_t sfn; - uint16_t slot; - uint16_t numUcis; - fapi_uci_pdu_info_t uciPdu[MAX_NUMBER_UCI_PDUS_PER_SLOT]; -} fapi_uci_indication_t; - -// Updated per 5G FAPI -typedef struct { - uint16_t numRbs; - uint8_t rbSNR[MAX_NUMBER_RBS]; -} fapi_symb_snr_t; - -// Updated per 5G FAPI -typedef struct { - uint32_t handle; - uint16_t rnti; - uint16_t timingAdvance; - uint8_t numSymbols; - uint8_t wideBandSnr; - uint8_t numReportedSymbols; - fapi_symb_snr_t symbSnr[MAX_NUMBER_OF_REP_SYMBOLS]; -} fapi_srs_pdu_t; - -// Updated per 5G FAPI -typedef struct { - fapi_msg_t header; - uint16_t sfn; - uint16_t slot; - uint8_t numPdus; - fapi_srs_pdu_t srsPdus[MAX_NUMBER_SRS_PDUS_PER_SLOT]; -} fapi_srs_indication_t; - -// Updated per 5G FAPI -typedef struct { - uint8_t preambleIndex; - uint16_t timingAdvance; - uint32_t premblePwr; -} fapi_preamble_info_t; - -// Updated per 5G FAPI -typedef struct { - uint16_t physCellId; - uint8_t symbolIndex; - uint8_t slotIndex; - uint8_t freqIndex; - uint8_t avgRssi; - uint8_t avgSnr; - uint8_t numPreamble; - fapi_preamble_info_t preambleInfo[MAX_NUM_PREAMBLES_PER_SLOT]; -} fapi_rach_pdu_t; - -// Updated per 5G FAPI -typedef struct { - fapi_msg_t header; - uint16_t sfn; - uint16_t slot; - uint8_t numPdus; - fapi_rach_pdu_t rachPdu[MAX_NUMBER_RACH_PDUS_PER_SLOT]; -} fapi_rach_indication_t; - - -//------------------------------------------------------------------------------ - -#if defined(__cplusplus) -} -#endif - -#endif diff --git a/src/5gnrmac/lwr_mac.h b/src/5gnrmac/lwr_mac.h index dc6429ada..1b0c5be5f 100644 --- a/src/5gnrmac/lwr_mac.h +++ b/src/5gnrmac/lwr_mac.h @@ -26,10 +26,12 @@ #include "gen.h" #include "ssi.h" #include "cm_hash.h" +#include "cm_lte.h" #include "gen.x" #include "ssi.x" #include "cm_hash.x" +#include "cm_lte.x" #include "cm_lib.x" #include "du_app_mac_inf.h" @@ -48,6 +50,7 @@ typedef enum{ FAPI_CONFIG_REQUEST, FAPI_CONFIG_RESPONSE, FAPI_START_REQUEST, + FAPI_STOP_REQUEST, MAX_EVENT }EventState; diff --git a/src/5gnrmac/lwr_mac_fsm.c b/src/5gnrmac/lwr_mac_fsm.c index 06d37048d..d42b5c40c 100644 --- a/src/5gnrmac/lwr_mac_fsm.c +++ b/src/5gnrmac/lwr_mac_fsm.c @@ -15,6 +15,7 @@ # limitations under the License. # ################################################################################ *******************************************************************************/ + #include #include @@ -91,6 +92,7 @@ S16 lwr_mac_handleInvalidEvt(void *msg) RETVALUE(ROK); } +#ifdef FAPI /******************************************************************* * * @brief Fills FAPI message header @@ -1272,6 +1274,7 @@ uint32_t getParamValue(fapi_uint16_tlv_t *tlv, uint16_t type) return RFAILED; } } +#endif /* FAPI */ /******************************************************************* * * @brief Sends FAPI Param req to PHY @@ -1291,6 +1294,7 @@ uint32_t getParamValue(fapi_uint16_tlv_t *tlv, uint16_t type) S16 lwr_mac_handleParamReqEvt(void *msg) { +#ifdef FAPI /* startGuardTimer(); */ uint32_t msgLen; //Length of message Body msgLen = 0; @@ -1309,6 +1313,9 @@ S16 lwr_mac_handleParamReqEvt(void *msg) DU_LOG("\nLOWER MAC: Failed to allocate memory for Param Request"); return RFAILED; } +#else + return ROK; +#endif } /******************************************************************* @@ -1330,6 +1337,7 @@ S16 lwr_mac_handleParamReqEvt(void *msg) S16 lwr_mac_handleParamRspEvt(void *msg) { +#ifdef FAPI /* stopGuardTimer(); */ uint8_t index; uint32_t encodedVal; @@ -1841,6 +1849,9 @@ S16 lwr_mac_handleParamRspEvt(void *msg) DU_LOG("\nLOWER MAC: Param Response received from PHY is NULL"); return RFAILED; } +#else + return ROK; +#endif } /******************************************************************* @@ -1862,6 +1873,7 @@ S16 lwr_mac_handleParamRspEvt(void *msg) S16 lwr_mac_handleConfigReqEvt(void *msg) { +#ifdef FAPI uint8_t index = 0; uint32_t msgLen = 0; uint32_t configReqSize; @@ -1952,10 +1964,14 @@ S16 lwr_mac_handleConfigReqEvt(void *msg) DU_LOG("\nLOWER_MAC: Failed to allocate memory for config Request"); return RFAILED; } +#else + return ROK; +#endif } S16 lwr_mac_handleConfigRspEvt(void *msg) { +#ifdef FAPI fapi_config_resp_t *configRsp; configRsp = (fapi_config_resp_t *)msg; DU_LOG("\nLOWER MAC: Received EVENT[%d] at STATE[%d]", clGlobalCp.event, clGlobalCp.phyState); @@ -1981,10 +1997,14 @@ S16 lwr_mac_handleConfigRspEvt(void *msg) DU_LOG("\nLOWER_MAC: Config Response received from PHY is NULL"); return RFAILED; } +#else + return ROK; +#endif } S16 lwr_mac_handleStartReqEvt(void *msg) { +#ifdef FAPi uint32_t msgLen = 0; fapi_start_req_t *startReq; MAC_ALLOC(startReq, sizeof(fapi_start_req_t)); @@ -2002,13 +2022,19 @@ S16 lwr_mac_handleStartReqEvt(void *msg) DU_LOG("\nLOWER MAC: Failed to allocate memory for Start Request"); return RFAILED; } +#else + return ROK; +#endif } S16 lwr_mac_handleStopReqEvt(void *msg) { +#ifdef FAPI /* stop TX and RX operation return PHy to configured State send stop.indication to l2/l3 */ +#else RETVALUE(ROK); +#endif } /******************************************************************* @@ -2034,6 +2060,7 @@ PUBLIC void setMibPdu(uint8_t *mibPdu, uint32_t *val) DU_LOG("\nLOWER MAC: value filled %x", *val); } +#ifdef FAPI /******************************************************************* * * @brief fills SSB PDU required for DL TTI info in MAC @@ -2085,7 +2112,7 @@ uint32_t *msgLen) return RFAILED; } } - +#endif /******************************************************************* * * @brief Sends DL TTI Request to PHY @@ -2104,6 +2131,7 @@ uint32_t *msgLen) * ****************************************************************/ S16 handleDlTtiReq(CmLteTimingInfo *dlTtiReqtimingInfo) { +#ifdef FAPI uint32_t msgLen; fapi_dl_tti_req_t *dlTtiReq; fapi_dl_tti_req_pdu_t *dlTtiReqPdu; @@ -2152,6 +2180,9 @@ S16 handleDlTtiReq(CmLteTimingInfo *dlTtiReqtimingInfo) DU_LOG("\nLOWER MAC: Current TTI Info is NULL"); return RFAILED; } +#else + return ROK; +#endif } lwrMacFsmHdlr fapiEvtHdlr[MAX_STATE][MAX_EVENT] = @@ -2205,7 +2236,6 @@ void sendToLowerMac(uint16_t msgType, uint32_t msgLen, void *msg) clGlobalCp.event = msgType; fapiEvtHdlr[clGlobalCp.phyState][clGlobalCp.event](msg); } - /********************************************************************** End of file **********************************************************************/ diff --git a/src/5gnrmac/lwr_mac_fsm.h b/src/5gnrmac/lwr_mac_fsm.h index a458b8147..e0d5c71e4 100644 --- a/src/5gnrmac/lwr_mac_fsm.h +++ b/src/5gnrmac/lwr_mac_fsm.h @@ -15,8 +15,10 @@ # limitations under the License. # ################################################################################ *******************************************************************************/ + #ifndef _LWR_MAC_FSM_H_ #define _LWR_MAC_FSM_H_ + #define FAPI_UINT_8 1 #define FAPI_UINT_16 2 #define FAPI_UINT_32 4 @@ -24,7 +26,10 @@ #include "lwr_mac.h" #include "rg_cl_phy.h" + +#ifdef FAPI #include "fapi.h" +#endif S16 lwr_mac_handleInvalidEvt(void *msg); S16 lwr_mac_handleParamReqEvt(void *msg); @@ -34,6 +39,7 @@ S16 lwr_mac_handleConfigRspEvt(void *msg); S16 lwr_mac_handleStartReqEvt(void *msg); S16 lwr_mac_handleStopReqEvt(void *msg); void sendToLowerMac(U16, U32, void *); +S16 handleDlTtiReq(CmLteTimingInfo *dlTtiReqtimingInfo); typedef S16 (*lwrMacFsmHdlr)(void *); #endif diff --git a/src/5gnrmac/lwr_mac_handle_phy.c b/src/5gnrmac/lwr_mac_handle_phy.c index 67f76d8c1..969a395b8 100644 --- a/src/5gnrmac/lwr_mac_handle_phy.c +++ b/src/5gnrmac/lwr_mac_handle_phy.c @@ -1,3 +1,20 @@ +/******************************************************************************* +################################################################################ +# Copyright (c) [2017-2019] [Radisys] # +# # +# Licensed under the Apache License, Version 2.0 (the "License"); # +# you may not use this file except in compliance with the License. # +# You may obtain a copy of the License at # +# # +# http://www.apache.org/licenses/LICENSE-2.0 # +# # +# Unless required by applicable law or agreed to in writing, software # +# distributed under the License is distributed on an "AS IS" BASIS, # +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # +# See the License for the specific language governing permissions and # +# limitations under the License. # +################################################################################ +*******************************************************************************/ /* header include files (.h) */ #include "envopt.h" /* environment options */ @@ -12,7 +29,9 @@ #include "cm_mblk.h" /* Common LTE Defines */ #include "tfu.h" /* RGU Interface defines */ //#include "rg.h" +#ifdef FAPI #include "fapi.h" +#endif /* header/extern include files (.x) */ #include "gen.x" /* general */ @@ -26,6 +45,7 @@ #include "tfu.x" /* RGU Interface includes */ //#include "rg.x" +#ifdef FAPI /* function pointers for packing macCellCfg Request */ typedef S16 (*packSlotIndMsg) ARGS(( Pst *pst, @@ -90,9 +110,11 @@ U16 handleSlotInd(fapi_slot_ind_t *fapiSlotInd) return (*packSlotIndOpts[pst.selector])(&pst, &slotInd); } +#endif void handlePhyMessages(void *msg) { +#ifdef FAPI /* extract the header */ fapi_msg_t *header; header = (fapi_msg_t *)msg; @@ -131,4 +153,9 @@ void handlePhyMessages(void *msg) break; } } +#endif } + +/********************************************************************** + End of file +**********************************************************************/ diff --git a/src/5gnrmac/lwr_mac_phy.c b/src/5gnrmac/lwr_mac_phy.c index 3def8a374..1ca8e80f9 100644 --- a/src/5gnrmac/lwr_mac_phy.c +++ b/src/5gnrmac/lwr_mac_phy.c @@ -17,6 +17,7 @@ *******************************************************************************/ /* This file contains APIs to send/receive messages from PHY */ + #include #include @@ -24,8 +25,9 @@ #include "ssi.h" #include "rg_cl_phy.h" +#ifdef FAPI #include "fapi.h" - +#endif EXTERN S16 rgClHndlCfgReq ARGS((void *msg)); EXTERN void processFapiRequest ARGS((uint8_t msgType, uint32_t msgLen, void *msg)); diff --git a/src/5gnrmac/mac_msg_hdl.c b/src/5gnrmac/mac_msg_hdl.c index 9a9e3f1a4..1c71db8a1 100644 --- a/src/5gnrmac/mac_msg_hdl.c +++ b/src/5gnrmac/mac_msg_hdl.c @@ -36,6 +36,7 @@ #include "crg.h" #include "rg.h" #include "du_log.h" +#include "lwr_mac.h" /* header/extern include files (.x) */ #include "gen.x" /* general layer typedefs */ @@ -55,7 +56,6 @@ #include "rg_prg.x" #include "du_app_mac_inf.h" #include "rg.x" -#include "fapi_interface.h" /* This file contains message handling functionality for MAC */ @@ -79,7 +79,7 @@ uint16_t MacHdlCellStartReq(Pst *pst, MacCellStartInfo *cellStartInfo) { DU_LOG("\nMAC : Handling cell start request"); - //sendToLowerMac(START_REQ, 0, cellStartInfo); + sendToLowerMac(FAPI_START_REQUEST, 0, cellStartInfo); MAC_FREE_MEM(pst->region, pst->pool, cellStartInfo, \ sizeof(MacCellStartInfo)); @@ -107,7 +107,7 @@ uint16_t MacHdlCellStartReq(Pst *pst, MacCellStartInfo *cellStartInfo) uint16_t MacHdlCellStopReq(Pst *pst, MacCellStopInfo *cellStopInfo) { DU_LOG("\nMAC : Handling cell start request"); - //sendToLowerMac(STOP_REQ, 0, cellStopInfo); + sendToLowerMac(FAPI_STOP_REQUEST, 0, cellStopInfo); MAC_FREE_MEM(pst->region, pst->pool, cellStopInfo, \ sizeof(MacCellStopInfo)); diff --git a/src/5gnrmac/rg_tom.c b/src/5gnrmac/rg_tom.c index 63899952d..a181fd597 100755 --- a/src/5gnrmac/rg_tom.c +++ b/src/5gnrmac/rg_tom.c @@ -78,7 +78,7 @@ invoked by PHY towards MAC #include "du_app_mac_inf.h" #include "mac.h" #include "rg.x" /* typedefs for MAC */ - +#include "lwr_mac_fsm.h" #ifdef MAC_RLC_UL_RBUF #include "ss_rbuf.h" #include "ss_rbuf.x" diff --git a/src/phy_stub/l1_bdy1.c b/src/phy_stub/l1_bdy1.c index 3dfdc9e73..64c5a043f 100644 --- a/src/phy_stub/l1_bdy1.c +++ b/src/phy_stub/l1_bdy1.c @@ -17,6 +17,7 @@ *******************************************************************************/ /*This file contains stub for PHY to handle messages to/from MAC CL */ + #include #include "envdep.h" @@ -28,7 +29,9 @@ #include "rg_cl_phy.h" #include "lwr_mac.h" +#ifdef FAPI #include "fapi.h" +#endif #include "lphy_stub.h" #define MAX_SLOT_VALUE 9 @@ -37,11 +40,14 @@ uint16_t sfnValue = 0; uint16_t slotValue = 0; EXTERN void phyToMac ARGS((uint16_t msgType, uint32_t msgLen,void *msg)); +#ifdef FAPI EXTERN void fillTlvs ARGS((fapi_uint16_tlv_t *tlv, uint16_t tag, uint16_t length, uint16_t value, uint32_t *msgLen)); EXTERN void fillMsgHeader ARGS((fapi_msg_t *hdr, uint16_t msgType, uint16_t msgLen)); +#endif EXTERN void sendToLowerMac ARGS((uint16_t msgType, uint32_t msgLen,void *msg)); EXTERN void handlePhyMessages ARGS((void *msg)); + /******************************************************************* * * @brief Builds and sends param response to MAC CL @@ -58,10 +64,12 @@ EXTERN void handlePhyMessages ARGS((void *msg)); * RFAILED - failure * * ****************************************************************/ -S16 l1BldAndSndParamRsp(fapi_param_resp_t *fapiParamRsp) +S16 l1BldAndSndParamRsp(void *msg) { +#ifdef FAPI uint8_t index = 0; uint32_t msgLen = 0; + fapi_param_resp_t *fapiParamRsp = (fapi_param_resp_t *)msg; /* Cell Params */ fillTlvs(&fapiParamRsp->tlvs[index++], FAPI_RELEASE_CAPABILITY_TAG, sizeof(uint16_t), 1, &msgLen); @@ -140,6 +148,7 @@ S16 l1BldAndSndParamRsp(fapi_param_resp_t *fapiParamRsp) fapiParamRsp->error_code = MSG_OK; printf("\nPHY_STUB: Sending Param Request to Lower Mac"); sendToLowerMac(fapiParamRsp->header.message_type_id, sizeof(fapi_param_resp_t), (void *)fapiParamRsp); +#endif return ROK; } @@ -160,10 +169,12 @@ S16 l1BldAndSndParamRsp(fapi_param_resp_t *fapiParamRsp) * * ****************************************************************/ -S16 l1BldAndSndConfigRsp(fapi_config_resp_t *fapiConfigRsp) +S16 l1BldAndSndConfigRsp(void *msg) { +#ifdef FAPI uint8_t index = 0; uint32_t msgLen = 0; + fapi_config_resp_t *fapiConfigRsp = (fapi_config_resp_t *)msg; if(fapiConfigRsp != NULL) { @@ -177,8 +188,10 @@ S16 l1BldAndSndConfigRsp(fapi_config_resp_t *fapiConfigRsp) sendToLowerMac(fapiConfigRsp->header.message_type_id, sizeof(fapi_config_resp_t), (void *)fapiConfigRsp); return ROK; } +#else + return ROK; +#endif } - /******************************************************************* * * @brief Handles param request received from MAC @@ -200,7 +213,6 @@ S16 l1BldAndSndConfigRsp(fapi_config_resp_t *fapiConfigRsp) PUBLIC void l1HdlParamReq(uint32_t msgLen, void *msg) { printf("\nPHY_STUB: Received Param Request in PHY"); - /* Handling PARAM RESPONSE */ if(l1BldAndSndParamRsp(msg)!= ROK) { @@ -256,6 +268,7 @@ PUBLIC void l1HdlConfigReq(uint32_t msgLen, void *msg) * ****************************************************************/ PUBLIC void buildAndSendSlotIndication() { +#ifdef FAPI fapi_slot_ind_t *slotIndMsg; if(SGetSBuf(0, 0, (Data **)&slotIndMsg, sizeof(slotIndMsg)) != ROK) { @@ -282,6 +295,7 @@ PUBLIC void buildAndSendSlotIndication() handlePhyMessages((void*)slotIndMsg); SPutSBuf(0, 0, (Data *)slotIndMsg, sizeof(slotIndMsg)); } +#endif } /******************************************************************* @@ -307,8 +321,9 @@ PUBLIC void l1HdlStartReq(uint32_t msgLen, void *msg) if(clGlobalCp.phyState == PHY_STATE_CONFIGURED) { duStartSlotIndicaion(); +#ifdef FAPI SPutSBuf(0, 0, (Data *)msg, sizeof(fapi_start_req_t)); - +#endif return ROK; } else @@ -338,6 +353,7 @@ PUBLIC void l1HdlStartReq(uint32_t msgLen, void *msg) PUBLIC void l1HdlDlTtiReq(uint16_t msgLen, void *msg) { +#ifdef FAPI fapi_dl_tti_req_t *dlTtiReq; dlTtiReq = (fapi_dl_tti_req_t *)msg; printf("\nPHY_STUB: Received DL TTI Request in PHY"); @@ -355,6 +371,7 @@ PUBLIC void l1HdlDlTtiReq(uint16_t msgLen, void *msg) printf("\nPHY_STUB: bchPayload %x", dlTtiReq->pdus->u.ssb_pdu.bchPayload); SPutSBuf(0, 0, (Data *)dlTtiReq, sizeof(fapi_dl_tti_req_t)); +#endif return ROK; } /******************************************************************* @@ -380,6 +397,7 @@ void processFapiRequest(uint8_t msgType, uint32_t msgLen, void *msg) { switch(msgType) { +#ifdef FAPI case FAPI_PARAM_REQUEST: l1HdlParamReq(msgLen, msg); break; @@ -395,6 +413,7 @@ void processFapiRequest(uint8_t msgType, uint32_t msgLen, void *msg) default: printf("\nPHY_STUB: Invalid message type[%x] received at PHY", msgType); break; +#endif } } /********************************************************************** diff --git a/src/phy_stub/l1_bdy2.c b/src/phy_stub/l1_bdy2.c index 1877f3c33..523936af4 100644 --- a/src/phy_stub/l1_bdy2.c +++ b/src/phy_stub/l1_bdy2.c @@ -1,4 +1,23 @@ -/* This file handles TTI genertion */ +/******************************************************************************* +################################################################################ +# Copyright (c) [2017-2019] [Radisys] # +# # +# Licensed under the Apache License, Version 2.0 (the "License"); # +# you may not use this file except in compliance with the License. # +# You may obtain a copy of the License at # +# # +# http://www.apache.org/licenses/LICENSE-2.0 # +# # +# Unless required by applicable law or agreed to in writing, software # +# distributed under the License is distributed on an "AS IS" BASIS, # +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # +# See the License for the specific language governing permissions and # +# limitations under the License. # +################################################################################ +*******************************************************************************/ + +/* This file handles slot indication */ + #include #include #include @@ -29,4 +48,6 @@ void duStartSlotIndicaion() } } - +/********************************************************************** + End of file +**********************************************************************/ -- 2.16.6