From 7d68c765516d631f29ffcdbe0f1467eb396fc53d Mon Sep 17 00:00:00 2001 From: svaidhya Date: Thu, 5 Jun 2025 16:13:07 +0000 Subject: [PATCH] [Epic-ID:ODUHIGH-557][Task-ID:ODUHIGH-641] Master Branch Updation from OAI Branch Change-Id: I1afec0ffa713e7c34cc1c213d5b460ca01351be4 Signed-off-by: svaidhya --- build/config/cellConfig.xml | 2 +- build/config/tdd_odu_config_oai.xml | 732 ++++++++ build/odu/makefile | 8 +- src/5gnrmac/lwr_mac_fsm.c | 3037 ++++++++++++++++++++++++++------ src/5gnrmac/lwr_mac_fsm.h | 10 +- src/5gnrmac/lwr_mac_handle_phy.c | 94 +- src/5gnrmac/lwr_mac_util.c | 27 +- src/5gnrmac/lwr_mac_utils.h | 1 - src/5gnrmac/mac_msg_hdl.c | 8 +- src/5gnrmac/mac_slot_ind.c | 6 +- src/5gnrsch/sch.c | 211 ++- src/5gnrsch/sch.h | 19 +- src/5gnrsch/sch_common.c | 2 +- src/5gnrsch/sch_crc.c | 2 +- src/5gnrsch/sch_rach.c | 65 +- src/5gnrsch/sch_utils.c | 19 +- src/5gnrsch/sch_utils.h | 2 +- src/cm/common_def.h | 7 +- src/cm/mac_sch_interface.h | 11 +- src/cm/ssi.h | 18 + src/du_app/du_cfg.c | 21 +- src/du_app/du_f1ap_msg_hdl.c | 4 +- src/du_app/du_sctp.c | 2 +- src/du_app/du_sys_info_hdl.c | 174 +- src/du_app/du_sys_info_hdl.h | 3 + src/du_app/du_ue_mgr.c | 4 + src/intel_fapi/fapi_interface_oai.h | 1303 ++++++++++++++ src/intel_fapi/fapi_vendor_extension.h | 7 +- src/intel_fapi/nfapi_interface.h | 7 +- src/intel_fapi/nr5g_fapi_internal.h | 7 +- src/mt/mt_ss.c | 6 + src/mt/ss_pack.c | 123 ++ 32 files changed, 5276 insertions(+), 666 deletions(-) create mode 100644 build/config/tdd_odu_config_oai.xml create mode 100644 src/intel_fapi/fapi_interface_oai.h diff --git a/build/config/cellConfig.xml b/build/config/cellConfig.xml index cace81ae0..57b8e7374 100644 --- a/build/config/cellConfig.xml +++ b/build/config/cellConfig.xml @@ -58,7 +58,7 @@ 1 3000000 20 - 15 + 30 0 1 CN=John Smith,OU=Sales,O=ACME Limited,L=Moab,ST=Utah,C=US diff --git a/build/config/tdd_odu_config_oai.xml b/build/config/tdd_odu_config_oai.xml new file mode 100644 index 000000000..f85ebc0ed --- /dev/null +++ b/build/config/tdd_odu_config_oai.xml @@ -0,0 +1,732 @@ + + + + + 1 + 2 + 3 + 4 + 5 + 6 + 7 + + 1 + 1 + ORAN OAM DU + 29 + 127.0.0.5 + 127.0.0.4 + 192.168.130.80 + + 38472 + 36421 + 2 + + + 2153 + 2153 + 1 + + + + + 0 + 0 + 1 + + + 0 + 1 + 0 + + + 1 + 1 + 1 + 1 + 2 + 7 + 15 + + 0 + 0 + 0 + 0 + 10 + + + 1 + 128 + 20 + 0 + + 78 + 252 + 1099 + + 0 + 1 + 273 + + + 2 + 12 + 0 + 1 + 0 + 1 + + 128 + 0 + + 7 + 4 + 2 + 1 + 0 + 1 + 0 + 1 + 1 + 1 + + + 2 + 2 + + + 0 + 0 + 1 + 13 + + + 0 + 0 + 1 + 13 + + + + + 3 + + + 256 + 1 + 0 + 1 + 2 + + 44 + + + + + 1 + 23 + 1099 + 7 + + 0 + 1 + 273 + + + 2 + 98 + 0 + 273 + 273 + 12 + -96 + 6 + 1 + 5 + 63 + 3 + 64 + 7 + 19 + 2 + 1 + 1 + 0 + + + 2 + 1 + -90 + 4 + + + 5 + 1 + 0 + 13 + + + 5 + 1 + 0 + 12 + + + 5 + 1 + 10 + 3 + + + 7 + 1 + 10 + 3 + + + + + 2 + 0 + 0 + -70 + + + + 1 + 5 + 3 + 6 + 1 + 4 + + + + + 0 + 1 + 12 + 0 + 12 + 0 + 1 + 1 + + + + + + 1 + + + 0 + 0 + 1 + + + 0 + 1 + 0 + + + + 0 + + + + 0 + 0 + 1 + + + 0 + 1 + 0 + + + + + 0 + 0 + 1 + + + 0 + 1 + 0 + + + + 2 + + + 1 + + 2 + 3 + 4 + + + + 5 + + 6 + 7 + 8 + + + + + + + 1 + 1 + + TDD + + + 390000 + + 100 + + 1 + 14 + + + 2 + + + 1 + + 2 + + + + + + 428000 + + 100 + + 1 + 14 + + + 2 + + + 1 + + 2 + + + + + + 1 + 14 + + + 1 + 14 + + + + + 623400 + + 100 + + 1 + 28 + + + 2 + + + 78 + + 2 + + + + + + 1 + 28 + + + + 4 + 2 + 1 + + + + 0 + 0 + 1 + + + 0 + 1 + 0 + + + + + 0 + 0 + 1 + + + 0 + 1 + 0 + + + 1 + 1 + 150 + + + + + 1 + + 273 + 623400 + 273 + 623400 + 2 + 2 + + + 0 + 1 + 1 + + + + 0 + 0 + 1 + + + 0 + 1 + 0 + + + + 2 + + + 1 + + 2 + 3 + 4 + + + + 5 + + 6 + 7 + 8 + + + + + + 0 + 1 + 3000000 + 1 + 1 + + + 1 + TRUE + 44 + + + 12 + 0 + + + + + 0 + 273 + 1 + 0 + + + + 1 + 0 + 0 + 0 + 8192 + + 8 + 4 + 2 + 1 + 0 + + + 1 + + + 2 + + + 0 + 0 + 3 + 11 + + + 0 + 0 + 3 + 11 + + + + + + + 0 + 273 + 1 + 0 + + + 0 + 0 + + + 2 + + + 4 + 0 + 3 + 11 + + + 5 + 0 + 3 + 11 + + + + + + + 0 + 1 + 252 + 2 + 12 + + 1 + + + 0 + + 0 + 1 + 2 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + 1 + 30 + 98 + 1 + + + 1 + 1 + 0 + 12 + + + 0 + 1 + 63 + 64 + 273 + 24 + 31 + 10 + + + 5 + 3 + 6 + 1 + 4 + + + 1 + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 1 + + 0 + 1 + + + + 0 + 0 + 1 + + + 0 + 1 + 0 + + + + 1 + + 2 + 3 + 4 + + + + + 90 + 30 + 10 + + + + + + 2 + + 1 + + + 1 + 1 + + + 192.168.130.81 + 36421 + 192.168.130.80 + 36421 + 2 + + + 1 + + + 1 + + ORAN-E2SM-KPM + 1.3.6.1.4.1.53148.1.2.2.2 + KPM Monitor + + 0 + 1 + + + 1 + Periodic Report + 1 + + + 1 + + + + 1 + E2 Node Measurement + 1 + + + + 1 + RRU.PrbTotDl + + + 2 + RRU.PrbTotUl + + + + + 1 + 1 + + + + + 10 + 1 + 0 + 5 + 60000 + + + + + diff --git a/build/odu/makefile b/build/odu/makefile index 2715660b1..f72ada986 100644 --- a/build/odu/makefile +++ b/build/odu/makefile @@ -74,7 +74,7 @@ endif # macro for output file name and makefile name # -PLTFRM_FLAGS=-UMSPD -DODU -DINTEL_FAPI -UODU_MEMORY_DEBUG_LOG -DDEBUG_ASN_PRINT -UDEBUG_PRINT -DERROR_PRINT -USTART_DL_UL_DATA -UNR_DRX -UCALL_FLOW_DEBUG_LOG -UODU_SLOT_IND_DEBUG_LOG -UNFAPI_ENABLED -UTHREAD_AFFINITY -UMEM_SIZE_CHECK -UFAPI_DECODER -UCONTAINERIZE +PLTFRM_FLAGS=-UMSPD -DODU -DINTEL_FAPI -UODU_MEMORY_DEBUG_LOG -DDEBUG_ASN_PRINT -UDEBUG_PRINT -DERROR_PRINT -USTART_DL_UL_DATA -UNR_DRX -UCALL_FLOW_DEBUG_LOG -UODU_SLOT_IND_DEBUG_LOG -UNFAPI_ENABLED -DTHREAD_AFFINITY -UMEM_SIZE_CHECK -UFAPI_DECODER -UCONTAINERIZE ifeq ($(MODE),TDD) PLTFRM_FLAGS += -DNR_TDD @@ -88,7 +88,7 @@ ifeq ($(NODE),TEST_STUB) endif ifeq ($(PHY), INTEL_L1) - PLTFRM_FLAGS+=-DSS_USE_WLS_MEM -DINTEL_WLS_MEM -DDEBUG_MODE -DINTEL_L1_V20_03_ONWARDS + PLTFRM_FLAGS+=-DSS_USE_WLS_MEM -DINTEL_WLS_MEM -DDEBUG_MODE -DINTEL_L1_V20_03_ONWARDS -UOAI_TESTING ifeq ($(PHY_MODE),TIMER) PLTFRM_FLAGS+=-DINTEL_TIMER_MODE endif @@ -113,8 +113,8 @@ export I_OPTS L_OPTS+=-lnsl -lrt -lm -lpthread -lsctp -lxml2 ifeq ($(PHY), INTEL_L1) - L_OPTS+=-L/root/Intel-L1-20.11.1/phy/wls_lib/ -lwls \ - -lhugetlbfs -lnuma -ldl -L/root/Intel-L1-20.11.1/dpdk-20.11.1/build/lib \ + L_OPTS+=-L/usr/local/lib -lwls \ + -lhugetlbfs -lnuma -ldl -L/usr/local/lib/x86_64-linux-gnu \ -lrte_gso -lrte_acl -lrte_hash -lrte_bbdev -lrte_ip_frag -lrte_bitratestats -lrte_ipsec \ -lrte_bpf -lrte_jobstats -lrte_telemetry -lrte_kni -lrte_kvargs -lrte_latencystats -lrte_port \ -lrte_lpm -lrte_power -lrte_mbuf -lrte_rawdev -lrte_member -lrte_cfgfile -lrte_mempool \ diff --git a/src/5gnrmac/lwr_mac_fsm.c b/src/5gnrmac/lwr_mac_fsm.c index f7bfc3aa6..0262be6a8 100644 --- a/src/5gnrmac/lwr_mac_fsm.c +++ b/src/5gnrmac/lwr_mac_fsm.c @@ -107,6 +107,19 @@ uint8_t lwr_mac_procInvalidEvt(void *msg) return ROK; } +#ifdef OAI_TESTING +uint16_t reverseBytes16(uint16_t num) { + return (num >> 8) | (num << 8); +} + +uint32_t reverseBytes32(uint32_t num) { + return ((num >> 24) & 0x000000FF) | + ((num >> 8) & 0x0000FF00) | + ((num << 8) & 0x00FF0000) | + ((num << 24) & 0xFF000000); +} +#endif + #ifdef INTEL_FAPI /******************************************************************* * @@ -129,8 +142,13 @@ uint8_t lwr_mac_procInvalidEvt(void *msg) void fillMsgHeader(fapi_msg_t *hdr, uint16_t msgType, uint32_t msgLen) { memset(hdr, 0, sizeof(fapi_msg_t)); - hdr->msg_id = msgType; - hdr->length = msgLen; +#ifdef OAI_TESTING + hdr->msg_id = reverseBytes16(msgType); + hdr->length = reverseBytes32(msgLen); +#else + hdr->msg_id = (msgType); + hdr->length = (msgLen); +#endif } /******************************************************************* @@ -155,10 +173,17 @@ void fillMsgHeader(fapi_msg_t *hdr, uint16_t msgType, uint32_t msgLen) void fillTlvs(fapi_uint32_tlv_t *tlv, uint16_t tag, uint16_t length, uint32_t value, uint32_t *msgLen) { - tlv->tl.tag = tag; - tlv->tl.length = length; - tlv->value = value; +#ifdef OAI_TESTING + tlv->tl.tag = reverseBytes16(tag); + tlv->tl.length = reverseBytes16(length); + tlv->value = reverseBytes32(value); +#else + tlv->tl.tag = (tag); + tlv->tl.length = (length); + tlv->value = (value); +#endif *msgLen = *msgLen + sizeof(tag) + sizeof(length) + length; + } /******************************************************************* * @@ -1305,8 +1330,13 @@ uint32_t getParamValue(fapi_uint16_tlv_t *tlv, uint16_t type) ******************************************************************/ void setMibPdu(uint8_t *mibPdu, uint32_t *val, uint16_t sfn) { +#ifndef OAI_TESTING *mibPdu |= (((uint8_t)(sfn << 2)) & MIB_SFN_BITMASK); *val = (mibPdu[0] << 24 | mibPdu[1] << 16 | mibPdu[2] << 8); +#else + *mibPdu |= ((uint8_t)((sfn >> 4) & 0x3f) << 1); + *val = (mibPdu[2] << 24 | mibPdu[1] << 16 | mibPdu[0] << 8); +#endif DU_LOG("\nDEBUG --> LWR_MAC: MIB PDU %x", *val); } @@ -1976,48 +2006,698 @@ uint8_t lwr_mac_procIqSamplesReqEvt(void *msg) } #endif +#ifdef OAI_TESTING + /******************************************************************* * - * @brief Sends FAPI Config req to PHY + * @brief Pack and send DL TTI message to OAI L1 * * @details * - * Function : lwr_mac_procConfigReqEvt + * Function : packDlTtiReq * * Functionality: - * -Sends FAPI Config Req to PHY + * -Pack and send DL TTI message to OAI L1 * - * @params[in] + * @params[in] fapi_dl_tti_req_t *dlTtiReq,uint8_t *out , uint32_t *len + * @return Void + * + * ****************************************************************/ + +void packDlTtiReq(fapi_dl_tti_req_t *dlTtiReq,uint8_t *out , uint32_t *len) +{ + uint8_t pduIdx = 0, freqIdx = 0, dciIndex = 0, ueGrpIdx = 0; + uint8_t numBytes = 0, ret = ROK; + uint32_t totalLen=0,lenIdx=0, lenDifference=0; + uint8_t *mBuf = out; + + //header + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->header.numMsg, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->header.opaque, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16,dlTtiReq->header.msg_id, &mBuf, &totalLen); + dlTtiReq->header.length = totalLen; // Update header length with the total length + + CMCHKPKLEN(oduPackPostUInt32,dlTtiReq->header.length, &mBuf, &totalLen); + + + CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->sfn, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->slot, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->nPdus, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->nGroup, &mBuf, &totalLen); + for(pduIdx = 0; pduIdx < dlTtiReq->nPdus; pduIdx++) + { + CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pduType, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pduSize, &mBuf, &totalLen); + lenIdx=totalLen; + switch(reverseBytes16(dlTtiReq->pdus[pduIdx].pduType)) + { + case FAPI_PDCCH_PDU_TYPE: + { + CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.bwpSize, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.bwpStart, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.subCarrierSpacing, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.cyclicPrefix, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.startSymbolIndex, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.durationSymbols, &mBuf, &totalLen); + for(freqIdx = 0; freqIdx < 6; freqIdx++) + { + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.freqDomainResource[freqIdx], &mBuf, &totalLen); + } + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.cceRegMappingType, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.regBundleSize, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.interleaverSize, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.coreSetType, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.shiftIndex, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.precoderGranularity, &mBuf, &totalLen); + + CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.numDlDci, &mBuf, &totalLen); + // Extract the pdcch_pdu fields for the given pduIdx + + for(dciIndex = 0; dciIndex < reverseBytes16(dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.numDlDci); dciIndex++) + { + CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].rnti, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].scramblingId, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].scramblingRnti, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].cceIndex, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].aggregationLevel, &mBuf, &totalLen); + + fapi_precoding_bmform_t *preCodingAndBeamforming= &dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].pc_and_bform; + + CMCHKPKLEN(oduPackPostUInt16, reverseBytes16(preCodingAndBeamforming->numPrgs), &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, reverseBytes16(preCodingAndBeamforming->prgSize), &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, preCodingAndBeamforming->digBfInterfaces, &mBuf, &totalLen); + + for(uint16_t prgIdx = 0; prgIdx < preCodingAndBeamforming->numPrgs; prgIdx++) + { + CMCHKPKLEN(oduPackPostUInt16, preCodingAndBeamforming->pmi_bfi[prgIdx].pmIdx, &mBuf, &totalLen); + for(uint8_t digBfIdx = 0; digBfIdx < preCodingAndBeamforming->digBfInterfaces; digBfIdx++) + { + CMCHKPKLEN(oduPackPostUInt16, preCodingAndBeamforming->pmi_bfi[prgIdx].beamIdx[digBfIdx].beamidx, &mBuf, &totalLen); + } + } + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].beta_pdcch_1_0, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].powerControlOffsetSS, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].payloadSizeBits, &mBuf, &totalLen); + numBytes = reverseBytes16(dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].payloadSizeBits) / 8; + + if(reverseBytes16(dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].payloadSizeBits) % 8) + { + numBytes += 1; + } + for(uint8_t payloadIdx = 0; payloadIdx < numBytes; payloadIdx++) + { + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].payload[payloadIdx], &mBuf, &totalLen); + } + } + lenDifference=totalLen- lenIdx; + *((uint16_t *)(out + lenIdx-2)) = reverseBytes16(lenDifference); + break; + } + + case FAPI_PDSCH_PDU_TYPE: + { + + CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.pduBitMap, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.rnti, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.pdu_index, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.bwpSize, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.bwpStart, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.subCarrierSpacing, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.cyclicPrefix, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.nrOfCodeWords, &mBuf, &totalLen); + + for(uint8_t cwIdx = 0; cwIdx < dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.nrOfCodeWords; cwIdx++) + { + CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.cwInfo[cwIdx].targetCodeRate, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.cwInfo[cwIdx].qamModOrder, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.cwInfo[cwIdx].mcsIndex, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.cwInfo[cwIdx].mcsTable, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.cwInfo[cwIdx].rvIndex, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt32, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.cwInfo[cwIdx].tbSize, &mBuf, &totalLen); + } + CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.dataScramblingId, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.nrOfLayers, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.transmissionScheme, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.refPoint, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.dlDmrsSymbPos, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.dmrsConfigType, &mBuf, &totalLen); + + CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.dlDmrsScramblingId, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.scid, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.numDmrsCdmGrpsNoData, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.dmrsPorts, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.resourceAlloc, &mBuf, &totalLen); + for(uint8_t rbBitMapIdx = 0; rbBitMapIdx < 36; rbBitMapIdx++) + { + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.rbBitmap[rbBitMapIdx], &mBuf, &totalLen); + } + + CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.rbStart, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.rbSize, &mBuf, &totalLen); + + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.vrbToPrbMapping, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.startSymbIndex, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.nrOfSymbols, &mBuf, &totalLen); + if (reverseBytes16(dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.pduBitMap) & 0b1) + { + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.ptrsPortIndex, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.ptrsTimeDensity, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.ptrsFreqDensity, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.ptrsReOffset, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.nEpreRatioOfPdschToPtrs, &mBuf, &totalLen); + } + fapi_precoding_bmform_t *preCodingAndBeamforming= &dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.preCodingAndBeamforming; + + CMCHKPKLEN(oduPackPostUInt16, reverseBytes16(preCodingAndBeamforming->numPrgs), &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, reverseBytes16(preCodingAndBeamforming->prgSize), &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, preCodingAndBeamforming->digBfInterfaces, &mBuf, &totalLen); + + for(uint16_t prgIdx = 0; prgIdx < (preCodingAndBeamforming->numPrgs); prgIdx++) + { + CMCHKPKLEN(oduPackPostUInt16, preCodingAndBeamforming->pmi_bfi[prgIdx].pmIdx, &mBuf, &totalLen); + for(uint8_t digBfIdx = 0; digBfIdx < (preCodingAndBeamforming->digBfInterfaces); digBfIdx++) + { + CMCHKPKLEN(oduPackPostUInt16, preCodingAndBeamforming->pmi_bfi[prgIdx].beamIdx[digBfIdx].beamidx, &mBuf, &totalLen); + } + } + + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.powerControlOffset, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.powerControlOffsetSS, &mBuf, &totalLen); + if (reverseBytes16(dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.pduBitMap) & 0b10) + { + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.isLastCbPresent, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.isInlineTbCrc, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt32, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.dlTbCrc, &mBuf, &totalLen); + } + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.maintParamV3.ldpcBaseGraph, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt32, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.maintParamV3.tbSizeLbrmBytes, &mBuf, &totalLen); + lenDifference=totalLen- lenIdx; + *((uint16_t *)(out + lenIdx-2)) = reverseBytes16(lenDifference); + break; + } + + case FAPI_PBCH_PDU_TYPE: + { + CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.ssb_pdu.physCellId, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.ssb_pdu.betaPss, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.ssb_pdu.ssbBlockIndex, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.ssb_pdu.ssbSubCarrierOffset, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.ssb_pdu.ssbOffsetPointA, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.ssb_pdu.bchPayloadFlag, &mBuf, &totalLen); + + CMCHKPKLEN(oduPackPostUInt32, dlTtiReq->pdus[pduIdx].pdu.ssb_pdu.bchPayload.bchPayload, &mBuf, &totalLen); + fapi_precoding_bmform_t *preCodingAndBeamforming= &dlTtiReq->pdus[pduIdx].pdu.ssb_pdu.preCodingAndBeamforming; + CMCHKPKLEN(oduPackPostUInt16, preCodingAndBeamforming->numPrgs, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, preCodingAndBeamforming->prgSize, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, preCodingAndBeamforming->digBfInterfaces, &mBuf, &totalLen); + + for(uint16_t prgIdx = 0; prgIdx < reverseBytes16(preCodingAndBeamforming->numPrgs); prgIdx++) + { + CMCHKPKLEN(oduPackPostUInt16, preCodingAndBeamforming->pmi_bfi[prgIdx].pmIdx, &mBuf, &totalLen); + for(uint8_t digBfIdx = 0; digBfIdx < (preCodingAndBeamforming->digBfInterfaces); digBfIdx++) + { + CMCHKPKLEN(oduPackPostUInt16, preCodingAndBeamforming->pmi_bfi[prgIdx].beamIdx[digBfIdx].beamidx, &mBuf, &totalLen); + } + } + lenDifference=totalLen- lenIdx; + *((uint16_t *)(out + lenIdx-2)) = reverseBytes16(lenDifference); + + break; + } + default: + { + return NULLP; + } + } + } + for(ueGrpIdx = 0; ueGrpIdx < dlTtiReq->nGroup; ueGrpIdx++) + { + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->ue_grp_info[ueGrpIdx].nUe, &mBuf, &totalLen); + + for(uint8_t ueIdx = 0; ueIdx < dlTtiReq->ue_grp_info[ueGrpIdx].nUe; ueIdx++) + { + CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->ue_grp_info[ueGrpIdx].pduIdx[ueIdx], &mBuf, &totalLen); + } + } + if(totalLen !=sizeof(fapi_dl_tti_req_t)) + { + *((uint32_t *)(out + 4)) = reverseBytes32(totalLen); + } + + *len=totalLen; + +} + +/******************************************************************* + * + * @brief Pack and send UL TTI message to OAI L1 + * + * @details + * + * Function : packUlTtiReq + * + * Functionality: + * -Pack and send UL TTI message to OAI L1 + * + * @params[in] fapi_ul_tti_req_t *ulTti,uint8_t *out, uint32_t *len + * @return Void + * + * ****************************************************************/ + +void packUlTtiReq(fapi_ul_tti_req_t *ulTtiReq,uint8_t *out, uint32_t *len) +{ + uint8_t pduIdx = 0, ueGrpIdx = 0, ret = ROK; + uint32_t lenIdx=0, lenDifference=0, totalLen=0; + + + uint8_t *mBuf = out; + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->header.numMsg, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->header.opaque, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16,ulTtiReq->header.msg_id, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt32,ulTtiReq->header.length, &mBuf, &totalLen); + + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->sfn, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->slot, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->nPdus, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->rachPresent, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->nUlsch, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->nUlcch, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->nGroup, &mBuf, &totalLen); + + for(pduIdx = 0; pduIdx < ulTtiReq->nPdus; pduIdx++) + { + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pduType, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pduSize, &mBuf, &totalLen); + lenIdx=totalLen; + switch(reverseBytes16(ulTtiReq->pdus[pduIdx].pduType)) + { + case FAPI_PRACH_PDU_TYPE: + { + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.prach_pdu.physCellId, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.prach_pdu.numPrachOcas, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.prach_pdu.prachFormat, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.prach_pdu.numRa, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.prach_pdu.prachStartSymbol, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.prach_pdu.numCs, &mBuf, &totalLen); + fapi_ul_rx_bmform_pdu_t *ulBmform=&ulTtiReq->pdus[pduIdx].pdu.prach_pdu.beamforming; + CMCHKPKLEN(oduPackPostUInt8, ulBmform->trp_scheme, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulBmform->numPrgs, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulBmform->prgSize, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulBmform->digBfInterface, &mBuf, &totalLen); + + for(uint8_t prgIdx = 0; prgIdx < reverseBytes16(ulBmform->numPrgs); prgIdx++) + { + for(uint8_t digBfIdx = 0; digBfIdx < ulBmform->digBfInterface; digBfIdx++) + { + CMCHKPKLEN(oduPackPostUInt16, ulBmform->rx_bfi[prgIdx].beamIdx[digBfIdx].beamidx, &mBuf, &totalLen); + } + } + lenDifference=totalLen- lenIdx; + *((uint16_t *)(out + lenIdx-2)) = reverseBytes16(lenDifference); + break; + } + case FAPI_PUSCH_PDU_TYPE: + { + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.pduBitMap, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.rnti, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt32, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.handle, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.bwpSize, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.bwpStart, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.subCarrierSpacing, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.cyclicPrefix, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.targetCodeRate, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.qamModOrder, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.mcsIndex, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.mcsTable, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.transformPrecoding, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.dataScramblingId, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.nrOfLayers, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.ulDmrsSymbPos, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.dmrsConfigType, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.ulDmrsScramblingId, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschIdentity, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.scid, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.numDmrsCdmGrpsNoData, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.dmrsPorts, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.resourceAlloc, &mBuf, &totalLen); + for(uint8_t rbBitMapIdx = 0; rbBitMapIdx < 36; rbBitMapIdx++) + { + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.rbBitmap[rbBitMapIdx], &mBuf, &totalLen); + } + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.rbStart, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.rbSize, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.vrbToPrbMapping, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.frequencyHopping, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.txDirectCurrentLocation, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.uplinkFrequencyShift7p5khz, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.startSymbIndex, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.nrOfSymbols, &mBuf, &totalLen); + + //Fill fapi_pusch_data_t + if(reverseBytes16(ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.pduBitMap) &0x01) + { + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschData.rvIndex, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschData.harqProcessId, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschData.newDataIndicator, &mBuf, &totalLen); + + CMCHKPKLEN(oduPackPostUInt32, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschData.tbSize, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschData.numCb, &mBuf, &totalLen); + for(int i=0;ipdus[pduIdx].pdu.pusch_pdu.puschData.numCb);i++) + { + //TODO - Above loop length must be cb length= (numCB+7)/8; + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschData.cbPresentAndPosition[i], &mBuf, &totalLen); + } + } + //Fill fapi_pusch_uci_t + if(reverseBytes16(ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.pduBitMap) &0x02) + { + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschUci.harqAckBitLength, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschUci.csiPart1BitLength, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschUci.csiPart2BitLength, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschUci.alphaScaling, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschUci.betaOffsetHarqAck, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschUci.betaOffsetCsi1, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschUci.betaOffsetCsi2, &mBuf, &totalLen); + } + + //Fill fapi_pusch_ptrs_t + if(reverseBytes16(ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.pduBitMap) &0x04) + { + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschPtrs.numPtrsPorts, &mBuf, &totalLen); + for(uint8_t portIdx = 0; portIdx < ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschPtrs.numPtrsPorts; portIdx++) + { + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschPtrs.ptrsInfo[portIdx].ptrsPortIndex, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschPtrs.ptrsInfo[portIdx].ptrsDmrsPort, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschPtrs.ptrsInfo[portIdx].ptrsReOffset, &mBuf, &totalLen); + } + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschPtrs.ptrsTimeDensity, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschPtrs.ptrsFreqDensity, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.puschPtrs.ulPtrsPower, &mBuf, &totalLen); + } + //Fill fapi_dfts_ofdm_t + if(reverseBytes16(ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.pduBitMap) &0x08) + { + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.dftsOfdm.lowPaprGroupNumber, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.dftsOfdm.lowPaprSequenceNumber, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.dftsOfdm.ulPtrsSampleDensity, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.dftsOfdm.ulPtrsTimeDensityTransformPrecoding, &mBuf, &totalLen); + } + + //Fill fapi_ul_rx_bmform_pdu_t + fapi_ul_rx_bmform_pdu_t *ulBmform=&ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.beamforming; + CMCHKPKLEN(oduPackPostUInt8, ulBmform->trp_scheme, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulBmform->numPrgs, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulBmform->prgSize, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulBmform->digBfInterface, &mBuf, &totalLen); + + for(uint8_t prgIdx = 0; prgIdx < reverseBytes16(ulBmform->numPrgs); prgIdx++) + { + for(uint8_t digBfIdx = 0; digBfIdx < ulBmform->digBfInterface; digBfIdx++) + { + CMCHKPKLEN(oduPackPostUInt16, ulBmform->rx_bfi[prgIdx].beamIdx[digBfIdx].beamidx, &mBuf, &totalLen); + } + } + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.maintParamV3.ldpcBaseGraph, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt32, ulTtiReq->pdus[pduIdx].pdu.pusch_pdu.maintParamV3.tbSizeLbrmBytes, &mBuf, &totalLen); + lenDifference=totalLen- lenIdx; + *((uint16_t *)(out + lenIdx-2)) = reverseBytes16(lenDifference); + break; + } + case FAPI_PUCCH_PDU_TYPE: + { + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.rnti, &mBuf, &totalLen); + + CMCHKPKLEN(oduPackPostUInt32, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.handle, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.bwpSize, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.bwpStart, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.subCarrierSpacing, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.cyclicPrefix, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.formatType, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.multiSlotTxIndicator, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.pi2Bpsk, &mBuf, &totalLen); + + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.prbStart, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.prbSize, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.startSymbolIndex, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.nrOfSymbols, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.freqHopFlag, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.secondHopPrb, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.groupHopFlag, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.sequenceHopFlag, &mBuf, &totalLen); + + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.hoppingId, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.initialCyclicShift, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.dataScramblingId, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.timeDomainOccIdx, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.preDftOccIdx, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.preDftOccLen, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.addDmrsFlag, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.dmrsScramblingId, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.dmrsCyclicShift, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.srFlag, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.bitLenHarq, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.bitLenCsiPart1, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.bitLenCsiPart2, &mBuf, &totalLen); + + //Fill fapi_ul_rx_bmform_pdu_t + fapi_ul_rx_bmform_pdu_t *ulBmform=&ulTtiReq->pdus[pduIdx].pdu.pucch_pdu.beamforming; + CMCHKPKLEN(oduPackPostUInt8, ulBmform->trp_scheme, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulBmform->numPrgs, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, ulBmform->prgSize, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, ulBmform->digBfInterface, &mBuf, &totalLen); + + for(uint8_t prgIdx = 0; prgIdx < reverseBytes16(ulBmform->numPrgs); prgIdx++) + { + for(uint8_t digBfIdx = 0; digBfIdx < ulBmform->digBfInterface; digBfIdx++) + { + CMCHKPKLEN(oduPackPostUInt16, ulBmform->rx_bfi[prgIdx].beamIdx[digBfIdx].beamidx, &mBuf, &totalLen); + } + } + lenDifference=totalLen- lenIdx; + *((uint16_t *)(out + lenIdx-2)) = reverseBytes16(lenDifference); + break; + } + default: + { + return RFAILED; + } + } + } + + for(ueGrpIdx = 0; ueGrpIdx < ulTtiReq->nGroup; ueGrpIdx++) + { + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->ueGrpInfo[ueGrpIdx].nUe, &mBuf, &totalLen); + for(uint8_t ueIdx = 0; ueIdx < ulTtiReq->ueGrpInfo[ueGrpIdx].nUe; ueIdx++) + { + CMCHKPKLEN(oduPackPostUInt8, ulTtiReq->ueGrpInfo[ueGrpIdx].pduIdx[ueIdx], &mBuf, &totalLen); + } + } + + *len=totalLen; + if(totalLen != sizeof(fapi_ul_tti_req_t)) + { + *((uint32_t *)(out + 4)) = reverseBytes32(totalLen); + } + +} + +/******************************************************************* + * + * @brief Pack and send TX Data Req message to OAI L1 + * + * @details + * + * Function : packTxDataReqBuffer + * + * Functionality: + * -Pack and send TX Data Req message to OAI L1 + * + * @params[in] fapi_tx_data_req_t *txdata, uint8_t *mBuf ,uint32_t *len + * @return Void + * + * ****************************************************************/ + +void packTxDataReqBuffer(fapi_tx_data_req_t *txDataReq, uint8_t *mBuf ,uint32_t *len) +{ + uint16_t pduIdx = 0; + uint8_t ret = ROK; + uint16_t payloadSize = 0; + uint32_t totalLen = 0; + + uint8_t *out = mBuf; + + CMCHKPKLEN(oduPackPostUInt8, txDataReq->header.numMsg, &out, &totalLen); + CMCHKPKLEN(oduPackPostUInt8, txDataReq->header.opaque, &out, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, txDataReq->header.msg_id, &out, &totalLen); + CMCHKPKLEN(oduPackPostUInt32, txDataReq->header.length, &out, &totalLen); + + CMCHKPKLEN(oduPackPostUInt16, txDataReq->sfn, &out, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, txDataReq->slot, &out, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, txDataReq->num_pdus, &out, &totalLen); + + for (pduIdx = 0; pduIdx num_pdus); pduIdx++) + { + + CMCHKPKLEN(oduPackPostUInt32, txDataReq->pdu_desc[pduIdx].pdu_length, &out, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, txDataReq->pdu_desc[pduIdx].pdu_index, &out, &totalLen); + CMCHKPKLEN(oduPackPostUInt32, txDataReq->pdu_desc[pduIdx].num_tlvs, &out, &totalLen); + + for (uint32_t tlvIdx = 0; tlvIdx < reverseBytes32(txDataReq->pdu_desc[pduIdx].num_tlvs); tlvIdx++) + { + + CMCHKPKLEN(oduPackPostUInt16, txDataReq->pdu_desc[pduIdx].tlvs[tlvIdx].tag, &out, &totalLen); + CMCHKPKLEN(oduPackPostUInt32, txDataReq->pdu_desc[pduIdx].tlvs[tlvIdx].length, &out, &totalLen); + + payloadSize = reverseBytes32(txDataReq->pdu_desc[pduIdx].tlvs[tlvIdx].length); + payloadSize = (payloadSize + 3 )/4; + for (uint32_t payloadByte = 0; payloadByte < payloadSize; payloadByte++) + { + //TODO- CHeck + CMCHKPKLEN(oduPackPostUInt32_S, txDataReq->pdu_desc[pduIdx].tlvs[tlvIdx].value.direct[payloadByte], &out, &totalLen); + } + } + } + + *len = totalLen; + if(totalLen != sizeof(fapi_tx_data_req_t)) + { + *((uint32_t *)(mBuf + 4)) = reverseBytes32(totalLen); + } +} + +/******************************************************************* + * + * @brief Pack and send Config Req message to OAI L1 + * + * @details + * + * Function : packConfigReq + * + * Functionality: + * -Pack and send Config Req message to OAI L1 + * + * @params[in] fapi_config_req_t *configReq,uint8_t *mBuf,uint32_t *len + * @return Void + * + * ****************************************************************/ + +void packConfigReq(fapi_config_req_t *configReq, uint8_t *mBuf, uint32_t *len) +{ + uint8_t *out = mBuf; + uint32_t msgLen = 0; + uint16_t totalTlv = 0; + uint16_t tlvSize=10;//uint16_t [5] + uint16_t value[5] = {0,273,0,0,0}; + + CMCHKPKLEN(oduPackPostUInt8, configReq->header.numMsg, &out, &msgLen); + CMCHKPKLEN(oduPackPostUInt8, configReq->header.opaque, &out, &msgLen); + CMCHKPKLEN(oduPackPostUInt16, configReq->header.msg_id, &out, &msgLen); + CMCHKPKLEN(oduPackPostUInt32, configReq->header.length, &out, &msgLen); + + totalTlv = configReq->number_of_tlvs; + uint8_t randmTlvCnt= 25; //This value is randomly assigned + CMCHKPKLEN(oduPackPostUInt8, randmTlvCnt, &out, &msgLen); + + for(uint16_t idx=0;idxtlvs[idx]; + + CMCHKPKLEN(oduPackPostUInt16, tlv.tl.tag, &out, &msgLen); + CMCHKPKLEN(oduPackPostUInt16, tlv.tl.length, &out, &msgLen); + switch(reverseBytes16(tlv.tl.length)) + { + case 1: + { + uint8_t val=tlv.value; + CMCHKPKLEN(oduPackPostUInt8, val, &out, &msgLen); + CMCHKPKLEN(oduPackPostUInt8, 0, &out, &msgLen); + CMCHKPKLEN(oduPackPostUInt8, 0, &out, &msgLen); + CMCHKPKLEN(oduPackPostUInt8, 0, &out, &msgLen); + break; + } + case 2: + { + uint16_t val=tlv.value; + CMCHKPKLEN(oduPackPostUInt16, val, &out, &msgLen); + CMCHKPKLEN(oduPackPostUInt16, 0, &out, &msgLen); + break; + } + case 4: + { + uint32_t val=tlv.value; + CMCHKPKLEN(oduPackPostUInt32, val, &out, &msgLen); + break; + } + + + } + } + // adding dlGridSize and ulGridSize tlv + CMCHKPKLEN(oduPackPostUInt16, reverseBytes16(FAPI_DL_GRIDSIZE_TAG), &out, &msgLen); + CMCHKPKLEN(oduPackPostUInt16, reverseBytes16(tlvSize), &out, &msgLen); + for(uint8_t arrIdx=0;arrIdx<5;arrIdx++) + { + CMCHKPKLEN(oduPackPostUInt16, reverseBytes16(value[arrIdx]), &out, &msgLen); + } + CMCHKPKLEN(oduPackPostUInt16, 0, &out, &msgLen); + + CMCHKPKLEN(oduPackPostUInt16, reverseBytes16(FAPI_UL_GRID_SIZE_TAG), &out, &msgLen); + CMCHKPKLEN(oduPackPostUInt16, reverseBytes16(tlvSize), &out, &msgLen); + for(uint8_t arrIdx=0;arrIdx<5;arrIdx++) + { + CMCHKPKLEN(oduPackPostUInt16, reverseBytes16(value[arrIdx]), &out, &msgLen); + } + CMCHKPKLEN(oduPackPostUInt16, 0, &out, &msgLen); + + *len = msgLen; + if(msgLen != sizeof(configReq->header.length)) + { + *((uint32_t *)(mBuf + 4)) = reverseBytes32(msgLen); + } +} + +#define TLV_ALIGN(_tlv_size) (32-_tlv_size) +/******************************************************************* + * + * @brief Build FAPI Config Req as per OAI code and send to PHY + * + * @details + * + * Function : buildAndSendOAIConfigReqToL1 + * + * Functionality: + * -Build FAPI Config Req as per OAI code and send to PHY + * + * @params[in] void *msg * @return ROK - success * RFAILED - failure * * ****************************************************************/ - -uint8_t lwr_mac_procConfigReqEvt(void *msg) +uint8_t buildAndSendOAIConfigReqToL1(void *msg) { #ifdef INTEL_FAPI #ifdef CALL_FLOW_DEBUG_LOG DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : CONFIG_REQ\n"); #endif #ifdef NR_TDD - uint8_t slotIdx = 0; + uint8_t slotIdx = 0; uint8_t symbolIdx =0; uint8_t numSlotsInMaxPeriodicity = 0; /*number of TDD Slots in MAX_PERIODICITY(10ms) as per numerology*/ uint8_t numSlotsInCurrPeriodicity = 0; /*number of TDD Slots in Configured_PERIODICITY(0.5ms to 10ms) as per numerology*/ uint8_t cntSlotCfg = 0; /*number of Slot Cfg repeatition*/ -#endif +#endif + uint16_t totalTlv=0; uint16_t index = 0; uint16_t *cellId =NULLP; uint16_t cellIdx =0; uint32_t msgLen = 0; + uint32_t totalCfgReqMsgLen=0; uint32_t mib = 0; uint32_t dlFreq = 0, ulFreq = 0; MacCellCfg macCfgParams; - fapi_vendor_msg_t *vendorMsg; fapi_config_req_t *configReq; fapi_msg_header_t *msgHeader; p_fapi_api_queue_elem_t headerElem; - p_fapi_api_queue_elem_t vendorMsgQElem; p_fapi_api_queue_elem_t cfgReqQElem; DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \ @@ -2030,9 +2710,13 @@ uint8_t lwr_mac_procConfigReqEvt(void *msg) /* Fill Cell Configuration in lwrMacCb */ memset(&lwrMacCb.cellCb[lwrMacCb.numCell], 0, sizeof(LwrMacCellCb)); lwrMacCb.cellCb[lwrMacCb.numCell].cellId = macCfgParams.cellId; - lwrMacCb.cellCb[lwrMacCb.numCell].phyCellId = macCfgParams.cellCfg.phyCellId; + lwrMacCb.cellCb[lwrMacCb.numCell].phyCellId = macCfgParams.cellCfg.phyCellId; lwrMacCb.numCell++; -#ifdef NR_TDD + uint16_t psize=sizeof(fapi_api_queue_elem_t)+(sizeof(fapi_config_req_t)); + +#ifndef NR_TDD + totalTlv = 24; +#else numSlotsInMaxPeriodicity = MAX_TDD_PERIODICITY * pow(2, macCb.macCell[cellIdx]->numerology); numSlotsInCurrPeriodicity = calcNumSlotsInCurrPeriodicity(macCfgParams.tddCfg.tddPeriod, macCb.macCell[cellIdx]->numerology); @@ -2043,118 +2727,79 @@ uint8_t lwr_mac_procConfigReqEvt(void *msg) } DU_LOG("\nINFO --> LWR_MAC: CONFIG_REQ: numberofTDDSlot in MAX_PERIOICITY(10ms) = %d", numSlotsInMaxPeriodicity); DU_LOG("\nINFO --> LWR_MAC: CONFIG_REQ: numberofTDDSlot in CURRENT PERIOICITY(enumVal = %d) = %d\n", macCfgParams.tddCfg.tddPeriod, numSlotsInCurrPeriodicity); + //configReq->number_of_tlvs = 25 + 1 + MAX_TDD_PERIODICITY_SLOTS * MAX_SYMB_PER_SLOT; + totalTlv = 26 + 1+ numSlotsInMaxPeriodicity * MAX_SYMB_PER_SLOT; #endif - - /* Allocte And fill Vendor msg */ - LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t))); - if(!vendorMsgQElem) - { - DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req"); - return RFAILED; - } - FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t)); - vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1); - fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t)); - vendorMsg->config_req_vendor.hopping_id = 0; - vendorMsg->config_req_vendor.carrier_aggregation_level = 0; - vendorMsg->config_req_vendor.group_hop_flag = 0; - vendorMsg->config_req_vendor.sequence_hop_flag = 0; - vendorMsg->config_req_vendor.urllc_capable = 0; - vendorMsg->config_req_vendor.urllc_mini_slot_mask =0; - vendorMsg->config_req_vendor.nr_of_dl_ports =1; - vendorMsg->config_req_vendor.nr_of_ul_ports =1; - vendorMsg->config_req_vendor.prach_nr_of_rx_ru =1; - vendorMsg->config_req_vendor.ssb_subc_spacing =1; - vendorMsg->config_req_vendor.use_vendor_EpreXSSB = USE_VENDOR_EPREXSSB; - vendorMsg->start_req_vendor.sfn = 0; - vendorMsg->start_req_vendor.slot = 0; - vendorMsg->start_req_vendor.mode = 4; -#ifdef DEBUG_MODE - vendorMsg->start_req_vendor.count = 0; - vendorMsg->start_req_vendor.period = 1; -#endif + /* totalCfgReqMsgLen = size of config req's msg header + size of tlv supporting + size of tlv supporting *sizeof(fapi_uint32_tlv_t) */ + totalCfgReqMsgLen += sizeof(configReq->header) + sizeof( configReq->number_of_tlvs) + totalTlv*sizeof(fapi_uint32_tlv_t); + /* Fill FAPI config req */ - LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t))); - if(!cfgReqQElem) - { - DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for config req"); - LWR_MAC_FREE(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t))); - return RFAILED; - } - FILL_FAPI_LIST_ELEM(cfgReqQElem, vendorMsgQElem, FAPI_CONFIG_REQUEST, 1, \ - sizeof(fapi_config_req_t)); - - configReq = (fapi_config_req_t *)(cfgReqQElem + 1); + LWR_MAC_ALLOC(configReq, sizeof(fapi_config_req_t)); memset(configReq, 0, sizeof(fapi_config_req_t)); - fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, sizeof(fapi_config_req_t)); -#ifndef NR_TDD - configReq->number_of_tlvs = 25; -#else - configReq->number_of_tlvs = 25 + 1 + numSlotsInMaxPeriodicity * MAX_SYMB_PER_SLOT; -#endif - + fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, totalCfgReqMsgLen); + configReq->number_of_tlvs = totalTlv; msgLen = sizeof(configReq->number_of_tlvs); fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG, \ - sizeof(uint32_t), macCfgParams.carrCfg.dlBw, &msgLen); + sizeof(uint16_t), macCfgParams.carrCfg.dlBw << TLV_ALIGN(16) , &msgLen); dlFreq = convertArfcnToFreqKhz(macCfgParams.carrCfg.arfcnDL); fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG, \ - sizeof(uint32_t), dlFreq, &msgLen); - /* Due to bug in Intel FT code, commenting TLVs that are are not + sizeof(uint32_t), dlFreq << TLV_ALIGN(32), &msgLen); + /* Due to bug in Intel FT code, commenting TLVs that are are not * needed to avoid error. Must be uncommented when FT bug is fixed */ //fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG, \ sizeof(uint16_t), macCfgParams.dlCarrCfg.k0[0], &msgLen); //fillTlvs(&configReq->tlvs[index++], FAPI_DL_GRIDSIZE_TAG, \ sizeof(uint16_t), macCfgParams.dlCarrCfg.gridSize[0], &msgLen); fillTlvs(&configReq->tlvs[index++], FAPI_NUM_TX_ANT_TAG, \ - sizeof(uint16_t), macCfgParams.carrCfg.numTxAnt, &msgLen); + sizeof(uint16_t), macCfgParams.carrCfg.numTxAnt << TLV_ALIGN(16), &msgLen); fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG, \ - sizeof(uint32_t), macCfgParams.carrCfg.ulBw, &msgLen); + sizeof(uint16_t), macCfgParams.carrCfg.ulBw << TLV_ALIGN(16), &msgLen); ulFreq = convertArfcnToFreqKhz(macCfgParams.carrCfg.arfcnUL); fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG, \ - sizeof(uint32_t), ulFreq, &msgLen); + sizeof(uint32_t), ulFreq << TLV_ALIGN(32), &msgLen); //fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG, \ sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen); //fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG, \ sizeof(uint16_t), macCfgParams.ulCarrCfg.gridSize[0], &msgLen); fillTlvs(&configReq->tlvs[index++], FAPI_NUM_RX_ANT_TAG, \ - sizeof(uint16_t), macCfgParams.carrCfg.numRxAnt, &msgLen); + sizeof(uint16_t), macCfgParams.carrCfg.numRxAnt << TLV_ALIGN(16), &msgLen); //fillTlvs(&configReq->tlvs[index++], FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG, \ sizeof(uint8_t), macCfgParams.freqShft, &msgLen); /* fill cell config */ fillTlvs(&configReq->tlvs[index++], FAPI_PHY_CELL_ID_TAG, \ - sizeof(uint8_t), macCfgParams.cellCfg.phyCellId, &msgLen); + sizeof(uint16_t), macCfgParams.cellCfg.phyCellId << TLV_ALIGN(16), &msgLen); fillTlvs(&configReq->tlvs[index++], FAPI_FRAME_DUPLEX_TYPE_TAG, \ - sizeof(uint8_t), macCfgParams.cellCfg.dupType, &msgLen); + sizeof(uint8_t), macCfgParams.cellCfg.dupType << TLV_ALIGN(8), &msgLen); /* fill SSB configuration */ fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_POWER_TAG, \ - sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr, &msgLen); - //fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG, \ - sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag, &msgLen); + sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr << TLV_ALIGN(32), &msgLen); + fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG, \ + sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag<tlvs[index++], FAPI_SCS_COMMON_TAG, \ - sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn, &msgLen); + sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn << TLV_ALIGN(8), &msgLen); /* fill PRACH configuration */ - //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG, \ - sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen); + fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG, \ + sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen << TLV_ALIGN(8), &msgLen); fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG, \ - sizeof(uint8_t), convertScsValToScsEnum(macCfgParams.prachCfg.prachSubcSpacing), &msgLen); + sizeof(uint8_t), convertScsValToScsEnum(macCfgParams.prachCfg.prachSubcSpacing) << TLV_ALIGN(8), &msgLen); fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG, \ - sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg, &msgLen); + sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg << TLV_ALIGN(8), &msgLen); fillTlvs(&configReq->tlvs[index++], FAPI_NUM_PRACH_FD_OCCASIONS_TAG, - sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm, &msgLen); + sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm << TLV_ALIGN(8), &msgLen); fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_CONFIG_INDEX_TAG, - sizeof(uint8_t), macCfgParams.prachCfg.prachCfgIdx, &msgLen); + sizeof(uint8_t), macCfgParams.prachCfg.prachCfgIdx << TLV_ALIGN(8), &msgLen); fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG, \ - sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx, &msgLen); - //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG, \ - sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq, &msgLen); + sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx << TLV_ALIGN(16), &msgLen); + fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG, \ + sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq << TLV_ALIGN(8), &msgLen); fillTlvs(&configReq->tlvs[index++], FAPI_K1_TAG, \ - sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1, &msgLen); + sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1 << TLV_ALIGN(16), &msgLen); fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ZERO_CORR_CONF_TAG , \ - sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg, &msgLen); + sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg << TLV_ALIGN(8), &msgLen); //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG, \ sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numUnusedRootSeq, &msgLen); /* if(macCfgParams.prachCfg.fdm[0].numUnusedRootSeq) @@ -2170,28 +2815,28 @@ uint8_t lwr_mac_procConfigReqEvt(void *msg) }*/ fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PER_RACH_TAG, \ - sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach, &msgLen); + sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach << TLV_ALIGN(8), &msgLen); //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \ sizeof(uint8_t), macCfgParams.prachCfg.prachMultCarrBand, &msgLen); /* fill SSB table */ fillTlvs(&configReq->tlvs[index++], FAPI_SSB_OFFSET_POINT_A_TAG, \ - sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA, &msgLen); + sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA << TLV_ALIGN(16), &msgLen); //fillTlvs(&configReq->tlvs[index++], FAPI_BETA_PSS_TAG, \ sizeof(uint8_t), macCfgParams.ssbCfg.betaPss, &msgLen); fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PERIOD_TAG, \ - sizeof(uint8_t), macCfgParams.ssbCfg.ssbPeriod, &msgLen); + sizeof(uint8_t), macCfgParams.ssbCfg.ssbPeriod << TLV_ALIGN(8), &msgLen); fillTlvs(&configReq->tlvs[index++], FAPI_SSB_SUBCARRIER_OFFSET_TAG, \ - sizeof(uint8_t), macCfgParams.ssbCfg.ssbScOffset, &msgLen); + sizeof(uint8_t), macCfgParams.ssbCfg.ssbScOffset << TLV_ALIGN(8), &msgLen); setMibPdu(macCfgParams.ssbCfg.mibPdu, &mib, 0); fillTlvs(&configReq->tlvs[index++], FAPI_MIB_TAG , \ - sizeof(uint32_t), mib, &msgLen); + sizeof(uint32_t), mib << TLV_ALIGN(32), &msgLen); fillTlvs(&configReq->tlvs[index++], FAPI_SSB_MASK_TAG, \ - sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0], &msgLen); + sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0] << TLV_ALIGN(32), &msgLen); fillTlvs(&configReq->tlvs[index++], FAPI_BEAM_ID_TAG, \ - sizeof(uint8_t), macCfgParams.ssbCfg.beamId[0], &msgLen); + sizeof(uint8_t), macCfgParams.ssbCfg.beamId[0] << TLV_ALIGN(8), &msgLen); //fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \ sizeof(uint8_t), macCfgParams.ssbCfg.multCarrBand, &msgLen); //fillTlvs(&configReq->tlvs[index++], FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, \ @@ -2200,7 +2845,7 @@ uint8_t lwr_mac_procConfigReqEvt(void *msg) #ifdef NR_TDD /* fill TDD table */ fillTlvs(&configReq->tlvs[index++], FAPI_TDD_PERIOD_TAG, \ - sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod, &msgLen); + sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod << TLV_ALIGN(8), &msgLen); cntSlotCfg = numSlotsInMaxPeriodicity/numSlotsInCurrPeriodicity; while(cntSlotCfg) @@ -2214,7 +2859,7 @@ uint8_t lwr_mac_procConfigReqEvt(void *msg) (slotIdx == macCfgParams.tddCfg.nrOfDlSlots && symbolIdx < macCfgParams.tddCfg.nrOfDlSymbols)) { fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \ - sizeof(uint8_t), DL_SYMBOL, &msgLen); + sizeof(uint8_t), DL_SYMBOL<< TLV_ALIGN(8), &msgLen); } /*Fill Full-FLEXI SLOT and as well as Flexi Symbols in 1 slot preceding FULL-UL slot*/ @@ -2223,27 +2868,40 @@ uint8_t lwr_mac_procConfigReqEvt(void *msg) symbolIdx < (MAX_SYMB_PER_SLOT - macCfgParams.tddCfg.nrOfUlSymbols))) { fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \ - sizeof(uint8_t), FLEXI_SYMBOL, &msgLen); + sizeof(uint8_t), FLEXI_SYMBOL<< TLV_ALIGN(8), &msgLen); } /*Fill Partial UL symbols and Full-UL slot*/ else { fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \ - sizeof(uint8_t), UL_SYMBOL, &msgLen); + sizeof(uint8_t), UL_SYMBOL<< TLV_ALIGN(8), &msgLen); } } } cntSlotCfg--; } -#endif +#endif /* fill measurement config */ //fillTlvs(&configReq->tlvs[index++], FAPI_RSSI_MEASUREMENT_TAG, \ sizeof(uint8_t), macCfgParams.rssiUnit, &msgLen); /* fill DMRS Type A Pos */ - fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG, \ - sizeof(uint8_t), macCfgParams.ssbCfg.dmrsTypeAPos, &msgLen); + // fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG, \ + sizeof(uint8_t), macCfgParams.ssbCfg.dmrsTypeAPos, &msgLen); + uint32_t bufferLen=0; + uint8_t mBuf[2500]; + packConfigReq(configReq, mBuf, &bufferLen); + //hexdump1(mBuf, bufferLen); + LWR_MAC_ALLOC(cfgReqQElem,(sizeof(fapi_api_queue_elem_t)+bufferLen)); + + if(!cfgReqQElem) + { + DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for config req"); + return RFAILED; + } + FILL_FAPI_LIST_ELEM(cfgReqQElem, NULLP, FAPI_CONFIG_REQUEST, 1, bufferLen); + memcpy((uint8_t *)(cfgReqQElem +1), mBuf, bufferLen); /* Fill message header */ LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t))); @@ -2251,51 +2909,345 @@ uint8_t lwr_mac_procConfigReqEvt(void *msg) { DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req"); LWR_MAC_FREE(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t))); - LWR_MAC_FREE(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t))); return RFAILED; } FILL_FAPI_LIST_ELEM(headerElem, cfgReqQElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \ sizeof(fapi_msg_header_t)); - msgHeader = (fapi_msg_header_t *)(headerElem + 1); - msgHeader->num_msg = 2; /* Config req msg and vendor specific msg */ - msgHeader->handle = 0; - + msgHeader = (fapi_msg_header_t*)(headerElem+1); + msgHeader->num_msg = 1; /* Config req msg */ + msgHeader->handle = 0; + DU_LOG("\nDEBUG --> LWR_MAC: Sending Config Request to Phy"); LwrMacSendToL1(headerElem); -#endif - + LWR_MAC_FREE(configReq, sizeof(fapi_config_req_t)); return ROK; -} /* lwr_mac_handleConfigReqEvt */ +#endif +} +#endif /******************************************************************* * - * @brief Processes config response from phy + * @brief Sends FAPI Config req to PHY * * @details * - * Function : lwr_mac_procConfigRspEvt + * Function : lwr_mac_procConfigReqEvt * * Functionality: - * Processes config response from phy + * -Sends FAPI Config Req to PHY * - * @params[in] FAPI message pointer + * @params[in] * @return ROK - success * RFAILED - failure * * ****************************************************************/ -uint8_t lwr_mac_procConfigRspEvt(void *msg) +uint8_t lwr_mac_procConfigReqEvt(void *msg) { +#ifndef OAI_TESTING #ifdef INTEL_FAPI - fapi_config_resp_t *configRsp; - configRsp = (fapi_config_resp_t *)msg; +#ifdef CALL_FLOW_DEBUG_LOG + DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : CONFIG_REQ\n"); +#endif +#ifdef NR_TDD + uint8_t slotIdx = 0; + uint8_t symbolIdx =0; + uint8_t numSlotsInMaxPeriodicity = 0; /*number of TDD Slots in MAX_PERIODICITY(10ms) as per numerology*/ + uint8_t numSlotsInCurrPeriodicity = 0; /*number of TDD Slots in Configured_PERIODICITY(0.5ms to 10ms) as per numerology*/ + uint8_t cntSlotCfg = 0; /*number of Slot Cfg repeatition*/ +#endif + uint16_t index = 0; + uint16_t *cellId =NULLP; + uint16_t cellIdx =0; + uint32_t msgLen = 0; + uint32_t mib = 0; + uint32_t dlFreq = 0, ulFreq = 0; + MacCellCfg macCfgParams; + fapi_vendor_msg_t *vendorMsg; + fapi_config_req_t *configReq; + fapi_msg_header_t *msgHeader; + p_fapi_api_queue_elem_t headerElem; + p_fapi_api_queue_elem_t vendorMsgQElem; + p_fapi_api_queue_elem_t cfgReqQElem; DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \ - lwrMacCb.phyState); + lwrMacCb.phyState); - if(configRsp != NULL) + cellId = (uint16_t *)msg; + GET_CELL_IDX(*cellId, cellIdx); + macCfgParams = macCb.macCell[cellIdx]->macCellCfg; + + /* Fill Cell Configuration in lwrMacCb */ + memset(&lwrMacCb.cellCb[lwrMacCb.numCell], 0, sizeof(LwrMacCellCb)); + lwrMacCb.cellCb[lwrMacCb.numCell].cellId = macCfgParams.cellId; + lwrMacCb.cellCb[lwrMacCb.numCell].phyCellId = macCfgParams.cellCfg.phyCellId; + lwrMacCb.numCell++; +#ifdef NR_TDD + numSlotsInMaxPeriodicity = MAX_TDD_PERIODICITY * pow(2, macCb.macCell[cellIdx]->numerology); + numSlotsInCurrPeriodicity = calcNumSlotsInCurrPeriodicity(macCfgParams.tddCfg.tddPeriod, macCb.macCell[cellIdx]->numerology); + + if(numSlotsInCurrPeriodicity == 0) { - if(configRsp->error_code == MSG_OK) + DU_LOG("\nERROR --> LWR_MAC: CONFIG_REQ: numSlotsInCurrPeriodicity is 0 thus exiting"); + return RFAILED; + } + DU_LOG("\nINFO --> LWR_MAC: CONFIG_REQ: numberofTDDSlot in MAX_PERIOICITY(10ms) = %d", numSlotsInMaxPeriodicity); + DU_LOG("\nINFO --> LWR_MAC: CONFIG_REQ: numberofTDDSlot in CURRENT PERIOICITY(enumVal = %d) = %d\n", macCfgParams.tddCfg.tddPeriod, numSlotsInCurrPeriodicity); +#endif + + /* Allocte And fill Vendor msg */ + LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t))); + if(!vendorMsgQElem) + { + DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req"); + return RFAILED; + } + FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t)); + vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1); + fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t)); + vendorMsg->config_req_vendor.hopping_id = 0; + vendorMsg->config_req_vendor.carrier_aggregation_level = 0; + vendorMsg->config_req_vendor.group_hop_flag = 0; + vendorMsg->config_req_vendor.sequence_hop_flag = 0; + vendorMsg->config_req_vendor.urllc_capable = 0; + vendorMsg->config_req_vendor.urllc_mini_slot_mask =0; + vendorMsg->config_req_vendor.nr_of_dl_ports =1; + vendorMsg->config_req_vendor.nr_of_ul_ports =1; + vendorMsg->config_req_vendor.prach_nr_of_rx_ru =1; + vendorMsg->config_req_vendor.ssb_subc_spacing =1; + vendorMsg->config_req_vendor.use_vendor_EpreXSSB = USE_VENDOR_EPREXSSB; + vendorMsg->start_req_vendor.sfn = 0; + vendorMsg->start_req_vendor.slot = 0; + vendorMsg->start_req_vendor.mode = 4; +#ifdef DEBUG_MODE + vendorMsg->start_req_vendor.count = 0; + vendorMsg->start_req_vendor.period = 1; +#endif + /* Fill FAPI config req */ + LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t))); + if(!cfgReqQElem) + { + DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for config req"); + LWR_MAC_FREE(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t))); + return RFAILED; + } + FILL_FAPI_LIST_ELEM(cfgReqQElem, vendorMsgQElem, FAPI_CONFIG_REQUEST, 1, \ + sizeof(fapi_config_req_t)); + + configReq = (fapi_config_req_t *)(cfgReqQElem + 1); + memset(configReq, 0, sizeof(fapi_config_req_t)); + fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, sizeof(fapi_config_req_t)); +#ifndef NR_TDD + configReq->number_of_tlvs = 25; +#else + configReq->number_of_tlvs = 25 + 1 + numSlotsInMaxPeriodicity * MAX_SYMB_PER_SLOT; +#endif + + msgLen = sizeof(configReq->number_of_tlvs); + + fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG, \ + sizeof(uint32_t), macCfgParams.carrCfg.dlBw, &msgLen); + dlFreq = convertArfcnToFreqKhz(macCfgParams.carrCfg.arfcnDL); + fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG, \ + sizeof(uint32_t), dlFreq, &msgLen); + /* Due to bug in Intel FT code, commenting TLVs that are are not + * needed to avoid error. Must be uncommented when FT bug is fixed */ + //fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG, \ + sizeof(uint16_t), macCfgParams.dlCarrCfg.k0[0], &msgLen); + //fillTlvs(&configReq->tlvs[index++], FAPI_DL_GRIDSIZE_TAG, \ + sizeof(uint16_t), macCfgParams.dlCarrCfg.gridSize[0], &msgLen); + fillTlvs(&configReq->tlvs[index++], FAPI_NUM_TX_ANT_TAG, \ + sizeof(uint16_t), macCfgParams.carrCfg.numTxAnt, &msgLen); + fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG, \ + sizeof(uint32_t), macCfgParams.carrCfg.ulBw, &msgLen); + ulFreq = convertArfcnToFreqKhz(macCfgParams.carrCfg.arfcnUL); + fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG, \ + sizeof(uint32_t), ulFreq, &msgLen); + //fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG, \ + sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen); + //fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG, \ + sizeof(uint16_t), macCfgParams.ulCarrCfg.gridSize[0], &msgLen); + fillTlvs(&configReq->tlvs[index++], FAPI_NUM_RX_ANT_TAG, \ + sizeof(uint16_t), macCfgParams.carrCfg.numRxAnt, &msgLen); + //fillTlvs(&configReq->tlvs[index++], FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG, \ + sizeof(uint8_t), macCfgParams.freqShft, &msgLen); + + /* fill cell config */ + fillTlvs(&configReq->tlvs[index++], FAPI_PHY_CELL_ID_TAG, \ + sizeof(uint8_t), macCfgParams.cellCfg.phyCellId, &msgLen); + fillTlvs(&configReq->tlvs[index++], FAPI_FRAME_DUPLEX_TYPE_TAG, \ + sizeof(uint8_t), macCfgParams.cellCfg.dupType, &msgLen); + + /* fill SSB configuration */ + fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_POWER_TAG, \ + sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr, &msgLen); + //fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG, \ + sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag, &msgLen); + fillTlvs(&configReq->tlvs[index++], FAPI_SCS_COMMON_TAG, \ + sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn, &msgLen); + + /* fill PRACH configuration */ + //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG, \ + sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen); + fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG, \ + sizeof(uint8_t), convertScsValToScsEnum(macCfgParams.prachCfg.prachSubcSpacing), &msgLen); + fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG, \ + sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg, &msgLen); + fillTlvs(&configReq->tlvs[index++], FAPI_NUM_PRACH_FD_OCCASIONS_TAG, + sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm, &msgLen); + fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_CONFIG_INDEX_TAG, + sizeof(uint8_t), macCfgParams.prachCfg.prachCfgIdx, &msgLen); + fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG, \ + sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx, &msgLen); + //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG, \ + sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq, &msgLen); + fillTlvs(&configReq->tlvs[index++], FAPI_K1_TAG, \ + sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1, &msgLen); + fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ZERO_CORR_CONF_TAG , \ + sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg, &msgLen); + //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG, \ + sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numUnusedRootSeq, &msgLen); + /* if(macCfgParams.prachCfg.fdm[0].numUnusedRootSeq) + { + for(idx = 0; idx < macCfgParams.prachCfg.fdm[0].numUnusedRootSeq; idx++) + fillTlvs(&configReq->tlvs[index++], FAPI_UNUSED_ROOT_SEQUENCES_TAG, \ + sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].unsuedRootSeq[idx], \ + &msgLen); + } + else + { + macCfgParams.prachCfg.fdm[0].unsuedRootSeq = NULL; + }*/ + + fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PER_RACH_TAG, \ + sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach, &msgLen); + //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \ + sizeof(uint8_t), macCfgParams.prachCfg.prachMultCarrBand, &msgLen); + + /* fill SSB table */ + fillTlvs(&configReq->tlvs[index++], FAPI_SSB_OFFSET_POINT_A_TAG, \ + sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA, &msgLen); + //fillTlvs(&configReq->tlvs[index++], FAPI_BETA_PSS_TAG, \ + sizeof(uint8_t), macCfgParams.ssbCfg.betaPss, &msgLen); + fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PERIOD_TAG, \ + sizeof(uint8_t), macCfgParams.ssbCfg.ssbPeriod, &msgLen); + fillTlvs(&configReq->tlvs[index++], FAPI_SSB_SUBCARRIER_OFFSET_TAG, \ + sizeof(uint8_t), macCfgParams.ssbCfg.ssbScOffset, &msgLen); + + setMibPdu(macCfgParams.ssbCfg.mibPdu, &mib, 0); + fillTlvs(&configReq->tlvs[index++], FAPI_MIB_TAG , \ + sizeof(uint32_t), mib, &msgLen); + + fillTlvs(&configReq->tlvs[index++], FAPI_SSB_MASK_TAG, \ + sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0], &msgLen); + fillTlvs(&configReq->tlvs[index++], FAPI_BEAM_ID_TAG, \ + sizeof(uint8_t), macCfgParams.ssbCfg.beamId[0], &msgLen); + //fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \ + sizeof(uint8_t), macCfgParams.ssbCfg.multCarrBand, &msgLen); + //fillTlvs(&configReq->tlvs[index++], FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, \ + sizeof(uint8_t), macCfgParams.ssbCfg.multCellCarr, &msgLen); + +#ifdef NR_TDD + /* fill TDD table */ + fillTlvs(&configReq->tlvs[index++], FAPI_TDD_PERIOD_TAG, \ + sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod, &msgLen); + + cntSlotCfg = numSlotsInMaxPeriodicity/numSlotsInCurrPeriodicity; + while(cntSlotCfg) + { + for(slotIdx =0 ;slotIdx < numSlotsInCurrPeriodicity; slotIdx++) + { + for(symbolIdx = 0; symbolIdx < MAX_SYMB_PER_SLOT; symbolIdx++) + { + /*Fill Full-DL Slots as well as DL symbols ini 1st Flexi Slo*/ + if(slotIdx < macCfgParams.tddCfg.nrOfDlSlots || \ + (slotIdx == macCfgParams.tddCfg.nrOfDlSlots && symbolIdx < macCfgParams.tddCfg.nrOfDlSymbols)) + { + fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \ + sizeof(uint8_t), DL_SYMBOL, &msgLen); + } + + /*Fill Full-FLEXI SLOT and as well as Flexi Symbols in 1 slot preceding FULL-UL slot*/ + else if(slotIdx < (numSlotsInCurrPeriodicity - macCfgParams.tddCfg.nrOfUlSlots -1) || \ + (slotIdx == (numSlotsInCurrPeriodicity - macCfgParams.tddCfg.nrOfUlSlots -1) && \ + symbolIdx < (MAX_SYMB_PER_SLOT - macCfgParams.tddCfg.nrOfUlSymbols))) + { + fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \ + sizeof(uint8_t), FLEXI_SYMBOL, &msgLen); + } + /*Fill Partial UL symbols and Full-UL slot*/ + else + { + fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \ + sizeof(uint8_t), UL_SYMBOL, &msgLen); + } + } + } + cntSlotCfg--; + } +#endif + + /* fill measurement config */ + //fillTlvs(&configReq->tlvs[index++], FAPI_RSSI_MEASUREMENT_TAG, \ + sizeof(uint8_t), macCfgParams.rssiUnit, &msgLen); + + /* fill DMRS Type A Pos */ + fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG, \ + sizeof(uint8_t), macCfgParams.ssbCfg.dmrsTypeAPos, &msgLen); + + /* Fill message header */ + LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t))); + if(!headerElem) + { + DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req"); + LWR_MAC_FREE(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t))); + LWR_MAC_FREE(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t))); + return RFAILED; + } + FILL_FAPI_LIST_ELEM(headerElem, cfgReqQElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \ + sizeof(fapi_msg_header_t)); + msgHeader = (fapi_msg_header_t *)(headerElem + 1); + msgHeader->num_msg = 2; /* Config req msg and vendor specific msg */ + msgHeader->handle = 0; + + DU_LOG("\nDEBUG --> LWR_MAC: Sending Config Request to Phy"); + LwrMacSendToL1(headerElem); +#endif +#else + buildAndSendOAIConfigReqToL1(msg); +#endif + return ROK; +} /* lwr_mac_handleConfigReqEvt */ + +/******************************************************************* + * + * @brief Processes config response from phy + * + * @details + * + * Function : lwr_mac_procConfigRspEvt + * + * Functionality: + * Processes config response from phy + * + * @params[in] FAPI message pointer + * @return ROK - success + * RFAILED - failure + * + * ****************************************************************/ + +uint8_t lwr_mac_procConfigRspEvt(void *msg) +{ +#ifdef INTEL_FAPI + fapi_config_resp_t *configRsp; + configRsp = (fapi_config_resp_t *)msg; + + DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \ + lwrMacCb.phyState); + + if(configRsp != NULL) + { + if(configRsp->error_code == MSG_OK) { DU_LOG("\nDEBUG --> LWR_MAC: PHY has moved to Configured state \n"); lwrMacCb.phyState = PHY_STATE_CONFIGURED; @@ -2340,6 +3292,7 @@ uint8_t lwr_mac_procConfigRspEvt(void *msg) * ****************************************************************/ uint8_t lwr_mac_procStartReqEvt(void *msg) { +#ifndef OAI_TESTING #ifdef INTEL_FAPI #ifdef CALL_FLOW_DEBUG_LOG DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : START_REQ\n"); @@ -2403,6 +3356,40 @@ uint8_t lwr_mac_procStartReqEvt(void *msg) DU_LOG("\nDEBUG --> LWR_MAC: Sending Start Request to Phy"); LwrMacSendToL1(headerElem); #endif +#else + fapi_msg_header_t *msgHeader; + fapi_start_req_t *startReq; + p_fapi_api_queue_elem_t headerElem; + p_fapi_api_queue_elem_t startReqElem; + + /* Fill FAPI config req */ + LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t))); + if(!startReqElem) + { + DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for start req"); + return RFAILED; + } + FILL_FAPI_LIST_ELEM(startReqElem, NULLP, FAPI_START_REQUEST, 1, sizeof(fapi_start_req_t)); + startReq = (fapi_start_req_t *)(startReqElem + 1); + memset(startReq, 0, sizeof(fapi_start_req_t)); + fillMsgHeader(&startReq->header, FAPI_START_REQUEST, sizeof(fapi_start_req_t)); + /* Fill message header */ + LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t))); + if(!headerElem) + { + DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req"); + LWR_MAC_FREE(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t))); + return RFAILED; + } + FILL_FAPI_LIST_ELEM(headerElem, startReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \ + sizeof(fapi_msg_header_t)); + msgHeader = (fapi_msg_header_t *)(headerElem + 1); + msgHeader->num_msg = 1; /* Start req msg */ + msgHeader->handle = 0; + /* Send to PHY */ + DU_LOG("\nDEBUG --> LWR_MAC: Sending Start Request to Phy"); + LwrMacSendToL1(headerElem); +#endif return ROK; } /* lwr_mac_procStartReqEvt */ @@ -2433,9 +3420,10 @@ uint8_t lwr_mac_procStopReqEvt(SlotTimingInfo slotInfo, p_fapi_api_queue_elem_t fapi_stop_req_t *stopReq; p_fapi_api_queue_elem_t stopReqElem; +#ifndef OAI_TESTING vendorMsg->sfn = slotInfo.sfn; vendorMsg->slot = slotInfo.slot; - +#endif /* Fill FAPI stop req */ LWR_MAC_ALLOC(stopReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_stop_req_t))); if(!stopReqElem) @@ -2482,24 +3470,39 @@ uint8_t fillSsbPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, MacCellCfg *macCellCfg, uint32_t mibPayload = 0; if(dlTtiReqPdu != NULL) { - dlTtiReqPdu->pduType = SSB_PDU_TYPE; /* SSB PDU */ - dlTtiReqPdu->pdu.ssb_pdu.physCellId = macCellCfg->cellCfg.phyCellId; +#ifdef OAI_TESTING + dlTtiReqPdu->pduType = reverseBytes16(SSB_PDU_TYPE); /* SSB PDU */ + dlTtiReqPdu->pduSize = reverseBytes16(sizeof(fapi_dl_ssb_pdu_t)); /* Size of SSB PDU */ + dlTtiReqPdu->pdu.ssb_pdu.physCellId = reverseBytes16(macCellCfg->cellCfg.phyCellId); + dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = reverseBytes16(macCellCfg->ssbCfg.ssbOffsetPointA); +#else + dlTtiReqPdu->pduType = (SSB_PDU_TYPE); /* SSB PDU */ + dlTtiReqPdu->pduSize = (sizeof(fapi_dl_ssb_pdu_t)); /* Size of SSB PDU */ + dlTtiReqPdu->pdu.ssb_pdu.physCellId = (macCellCfg->cellCfg.phyCellId); + dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = (macCellCfg->ssbCfg.ssbOffsetPointA); +#endif dlTtiReqPdu->pdu.ssb_pdu.betaPss = macCellCfg->ssbCfg.betaPss; dlTtiReqPdu->pdu.ssb_pdu.ssbBlockIndex = currDlSlot->dlInfo.brdcstAlloc.ssbInfo[ssbIdxCount].ssbIdx; - dlTtiReqPdu->pdu.ssb_pdu.ssbSubCarrierOffset = macCellCfg->ssbCfg.ssbScOffset;; + dlTtiReqPdu->pdu.ssb_pdu.ssbSubCarrierOffset = macCellCfg->ssbCfg.ssbScOffset; /* ssbOfPdufstA to be filled in ssbCfg */ - dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = macCellCfg->ssbCfg.ssbOffsetPointA;; dlTtiReqPdu->pdu.ssb_pdu.bchPayloadFlag = macCellCfg->ssbCfg.bchPayloadFlag; /* Bit manipulation for SFN */ setMibPdu(macCellCfg->ssbCfg.mibPdu, &mibPayload, sfn); - dlTtiReqPdu->pdu.ssb_pdu.bchPayload.bchPayload = mibPayload; +#ifdef OAI_TESTING + dlTtiReqPdu->pdu.ssb_pdu.bchPayload.bchPayload = reverseBytes32(mibPayload); + dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.numPrgs = reverseBytes16(1); + dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.prgSize = reverseBytes16(275); + dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.digBfInterfaces = 1; + dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = reverseBytes16(0); + dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.pmi_bfi[0].beamIdx[0].beamidx = reverseBytes16(macCellCfg->ssbCfg.beamId[0]); +#else + dlTtiReqPdu->pdu.ssb_pdu.bchPayload.bchPayload = (mibPayload); dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.numPrgs = 0; dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.prgSize = 0; dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.digBfInterfaces = 0; dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0; - dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming. \ - pmi_bfi[0].beamIdx[0].beamidx = macCellCfg->ssbCfg.beamId[0]; - dlTtiReqPdu->pduSize = sizeof(fapi_dl_ssb_pdu_t); /* Size of SSB PDU */ + dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.pmi_bfi[0].beamIdx[0].beamidx = macCellCfg->ssbCfg.beamId[0]; +#endif return ROK; } return RFAILED; @@ -2551,18 +3554,27 @@ void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo) uint8_t sysInfoIndSize = 1; uint8_t reservedSize = 15; +#ifdef OAI_TESTING + dlDciPtr[0].rnti = reverseBytes16(sib1PdcchInfo->dci[0].rnti); + dlDciPtr[0].scramblingId = reverseBytes16(sib1PdcchInfo->dci[0].scramblingId); + dlDciPtr[0].scramblingRnti = reverseBytes16(sib1PdcchInfo->dci[0].scramblingRnti); + dlDciPtr[0].pc_and_bform.numPrgs = reverseBytes16(sib1PdcchInfo->dci[0].beamPdcchInfo.numPrgs); + dlDciPtr[0].pc_and_bform.prgSize = reverseBytes16(sib1PdcchInfo->dci[0].beamPdcchInfo.prgSize); + dlDciPtr[0].pc_and_bform.pmi_bfi[0].pmIdx = reverseBytes16(sib1PdcchInfo->dci[0].beamPdcchInfo.prg[0].pmIdx); + dlDciPtr[0].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = reverseBytes16(sib1PdcchInfo->dci[0].beamPdcchInfo.prg[0].beamIdx[0]); +#else dlDciPtr[0].rnti = sib1PdcchInfo->dci[0].rnti; dlDciPtr[0].scramblingId = sib1PdcchInfo->dci[0].scramblingId; dlDciPtr[0].scramblingRnti = sib1PdcchInfo->dci[0].scramblingRnti; - dlDciPtr[0].cceIndex = sib1PdcchInfo->dci[0].cceIndex; - dlDciPtr[0].aggregationLevel = sib1PdcchInfo->dci[0].aggregLevel; dlDciPtr[0].pc_and_bform.numPrgs = sib1PdcchInfo->dci[0].beamPdcchInfo.numPrgs; dlDciPtr[0].pc_and_bform.prgSize = sib1PdcchInfo->dci[0].beamPdcchInfo.prgSize; - dlDciPtr[0].pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci[0].beamPdcchInfo.digBfInterfaces; dlDciPtr[0].pc_and_bform.pmi_bfi[0].pmIdx = sib1PdcchInfo->dci[0].beamPdcchInfo.prg[0].pmIdx; dlDciPtr[0].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->dci[0].beamPdcchInfo.prg[0].beamIdx[0]; +#endif + dlDciPtr[0].pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci[0].beamPdcchInfo.digBfInterfaces; + dlDciPtr[0].cceIndex = sib1PdcchInfo->dci[0].cceIndex; + dlDciPtr[0].aggregationLevel = sib1PdcchInfo->dci[0].aggregLevel; dlDciPtr[0].beta_pdcch_1_0 = sib1PdcchInfo->dci[0].txPdcchPower.beta_pdcch_1_0; - dlDciPtr[0].powerControlOffsetSS = sib1PdcchInfo->dci[0].txPdcchPower.powerControlOffsetSS; /* Calculating freq domain resource allocation field value and size * coreset0Size = Size of coreset 0 @@ -2586,7 +3598,11 @@ void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo) } /* Fetching DCI field values */ +#ifndef OAI_TESTING timeDomResAssign = sib1PdcchInfo->dci[0].pdschCfg.pdschTimeAlloc.rowIndex -1; +#else + timeDomResAssign = sib1PdcchInfo->dci[0].pdschCfg.pdschTimeAlloc.rowIndex; +#endif VRB2PRBMap = sib1PdcchInfo->dci[0].pdschCfg.pdschFreqAlloc.vrbPrbMapping; modNCodScheme = sib1PdcchInfo->dci[0].pdschCfg.codeword[0].mcsIndex; redundancyVer = sib1PdcchInfo->dci[0].pdschCfg.codeword[0].rvIndex; @@ -2594,34 +3610,41 @@ void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo) reserved = 0; /* Reversing bits in each DCI field */ +#ifndef OAI_TESTING freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize); timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize); VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize); modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize); redundancyVer = reverseBits(redundancyVer, redundancyVerSize); sysInfoInd = reverseBits(sysInfoInd, sysInfoIndSize); +#endif /* Calulating total number of bytes in buffer */ dlDciPtr[0].payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\ + VRB2PRBMapSize + modNCodSchemeSize + redundancyVerSize\ + sysInfoIndSize + reservedSize; - numBytes = dlDciPtr[0].payloadSizeBits / 8; if(dlDciPtr[0].payloadSizeBits % 8) - numBytes += 1; + numBytes += 1; if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN) { - DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected"); - return; + DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected"); + return; } - +#ifdef OAI_TESTING + dlDciPtr[0].payloadSizeBits = reverseBytes16(dlDciPtr[0].payloadSizeBits); +#endif /* Initialize buffer */ for(bytePos = 0; bytePos < numBytes; bytePos++) dlDciPtr[0].payload[bytePos] = 0; bytePos = numBytes - 1; +#ifndef OAI_TESTING bitPos = 0; +#else + bitPos = 1; +#endif /* Packing DCI format fields */ fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\ @@ -2691,9 +3714,15 @@ void fillPageDlDciPdu(fapi_dl_dci_t *dlDciPtr, DlPageAlloc *dlPageAlloc, MacCell uint8_t tbScalingSize = 2; uint8_t reservedSize = 6; +#ifdef OAI_TESTING + dlDciPtr[0].rnti = reverseBytes16(P_RNTI); + dlDciPtr[0].scramblingId = reverseBytes16(macCellCfg->cellCfg.phyCellId); + dlDciPtr[0].scramblingRnti = reverseBytes16(0); +#else dlDciPtr[0].rnti = P_RNTI; dlDciPtr[0].scramblingId = macCellCfg->cellCfg.phyCellId; dlDciPtr[0].scramblingRnti = 0; +#endif dlDciPtr[0].cceIndex = dlPageAlloc->pageDlDci.cceIndex; dlDciPtr[0].aggregationLevel = dlPageAlloc->pageDlDci.aggregLevel; dlDciPtr[0].pc_and_bform.numPrgs = 1; @@ -2777,6 +3806,10 @@ void fillPageDlDciPdu(fapi_dl_dci_t *dlDciPtr, DlPageAlloc *dlPageAlloc, MacCell numBytes += 1; } +#ifdef OAI_TESTING + dlDciPtr[0].payloadSizeBits = reverseBytes16(dlDciPtr[0].payloadSizeBits); +#endif + if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN) { DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected"); @@ -2855,16 +3888,26 @@ void fillRarDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *rarPdcchInfo) uint8_t tbScalingSize = 2; uint8_t reservedSize = 16; +#ifdef OAI_TESTING + dlDciPtr[0].rnti = reverseBytes16(rarPdcchInfo->dci[0].rnti); + dlDciPtr[0].scramblingId = reverseBytes16(rarPdcchInfo->dci[0].scramblingId); + dlDciPtr[0].scramblingRnti = reverseBytes16(rarPdcchInfo->dci[0].scramblingRnti); + dlDciPtr[0].pc_and_bform.numPrgs = reverseBytes16(rarPdcchInfo->dci[0].beamPdcchInfo.numPrgs); + dlDciPtr[0].pc_and_bform.prgSize = reverseBytes16(rarPdcchInfo->dci[0].beamPdcchInfo.prgSize); + dlDciPtr[0].pc_and_bform.pmi_bfi[0].pmIdx = reverseBytes16(rarPdcchInfo->dci[0].beamPdcchInfo.prg[0].pmIdx); + dlDciPtr[0].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = reverseBytes16(rarPdcchInfo->dci[0].beamPdcchInfo.prg[0].beamIdx[0]); +#else dlDciPtr[0].rnti = rarPdcchInfo->dci[0].rnti; dlDciPtr[0].scramblingId = rarPdcchInfo->dci[0].scramblingId; dlDciPtr[0].scramblingRnti = rarPdcchInfo->dci[0].scramblingRnti; - dlDciPtr[0].cceIndex = rarPdcchInfo->dci[0].cceIndex; - dlDciPtr[0].aggregationLevel = rarPdcchInfo->dci[0].aggregLevel; dlDciPtr[0].pc_and_bform.numPrgs = rarPdcchInfo->dci[0].beamPdcchInfo.numPrgs; dlDciPtr[0].pc_and_bform.prgSize = rarPdcchInfo->dci[0].beamPdcchInfo.prgSize; - dlDciPtr[0].pc_and_bform.digBfInterfaces = rarPdcchInfo->dci[0].beamPdcchInfo.digBfInterfaces; dlDciPtr[0].pc_and_bform.pmi_bfi[0].pmIdx = rarPdcchInfo->dci[0].beamPdcchInfo.prg[0].pmIdx; dlDciPtr[0].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = rarPdcchInfo->dci[0].beamPdcchInfo.prg[0].beamIdx[0]; +#endif + dlDciPtr[0].cceIndex = rarPdcchInfo->dci[0].cceIndex; + dlDciPtr[0].aggregationLevel = rarPdcchInfo->dci[0].aggregLevel; + dlDciPtr[0].pc_and_bform.digBfInterfaces = rarPdcchInfo->dci[0].beamPdcchInfo.digBfInterfaces; dlDciPtr[0].beta_pdcch_1_0 = rarPdcchInfo->dci[0].txPdcchPower.beta_pdcch_1_0; dlDciPtr[0].powerControlOffsetSS = rarPdcchInfo->dci[0].txPdcchPower.powerControlOffsetSS; @@ -2911,14 +3954,17 @@ void fillRarDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *rarPdcchInfo) numBytes = dlDciPtr[0].payloadSizeBits / 8; if(dlDciPtr[0].payloadSizeBits % 8) - numBytes += 1; + numBytes += 1; if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN) { - DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected"); - return; + DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected"); + return; } +#ifdef OAI_TESTING + dlDciPtr[0].payloadSizeBits = reverseBytes16(39); +#endif /* Initialize buffer */ for(bytePos = 0; bytePos < numBytes; bytePos++) dlDciPtr[0].payload[bytePos] = 0; @@ -2939,6 +3985,10 @@ void fillRarDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *rarPdcchInfo) tbScaling, tbScalingSize); fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\ reserved, reservedSize); +#ifdef OAI_TESTING + dlDciPtr[0].payload[4] = 0x15; +#endif + } } /* fillRarDlDciPdu */ @@ -3000,16 +4050,26 @@ void fillDlMsgDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *pdcchInfo,\ for(dciIndex = 0; dciIndex < pdcchInfo->numDlDci; dciIndex++) { +#ifdef OAI_TESTING + dlDciPtr[dciIndex].rnti = reverseBytes16(pdcchInfo->dci[dciIndex].rnti); + dlDciPtr[dciIndex].scramblingId = reverseBytes16(pdcchInfo->dci[dciIndex].scramblingId); + dlDciPtr[dciIndex].scramblingRnti = reverseBytes16(pdcchInfo->dci[dciIndex].scramblingRnti); + dlDciPtr[dciIndex].pc_and_bform.numPrgs = reverseBytes16(pdcchInfo->dci[dciIndex].beamPdcchInfo.numPrgs); + dlDciPtr[dciIndex].pc_and_bform.prgSize = reverseBytes16(pdcchInfo->dci[dciIndex].beamPdcchInfo.prgSize); + dlDciPtr[dciIndex].pc_and_bform.pmi_bfi[0].pmIdx = reverseBytes16(pdcchInfo->dci[dciIndex].beamPdcchInfo.prg[0].pmIdx); + dlDciPtr[dciIndex].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = reverseBytes16(pdcchInfo->dci[dciIndex].beamPdcchInfo.prg[0].beamIdx[0]); +#else dlDciPtr[dciIndex].rnti = pdcchInfo->dci[dciIndex].rnti; dlDciPtr[dciIndex].scramblingId = pdcchInfo->dci[dciIndex].scramblingId; dlDciPtr[dciIndex].scramblingRnti = pdcchInfo->dci[dciIndex].scramblingRnti; - dlDciPtr[dciIndex].cceIndex = pdcchInfo->dci[dciIndex].cceIndex; - dlDciPtr[dciIndex].aggregationLevel = pdcchInfo->dci[dciIndex].aggregLevel; dlDciPtr[dciIndex].pc_and_bform.numPrgs = pdcchInfo->dci[dciIndex].beamPdcchInfo.numPrgs; dlDciPtr[dciIndex].pc_and_bform.prgSize = pdcchInfo->dci[dciIndex].beamPdcchInfo.prgSize; - dlDciPtr[dciIndex].pc_and_bform.digBfInterfaces = pdcchInfo->dci[dciIndex].beamPdcchInfo.digBfInterfaces; dlDciPtr[dciIndex].pc_and_bform.pmi_bfi[0].pmIdx = pdcchInfo->dci[dciIndex].beamPdcchInfo.prg[0].pmIdx; dlDciPtr[dciIndex].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = pdcchInfo->dci[dciIndex].beamPdcchInfo.prg[0].beamIdx[0]; +#endif + dlDciPtr[dciIndex].cceIndex = pdcchInfo->dci[dciIndex].cceIndex; + dlDciPtr[dciIndex].aggregationLevel = pdcchInfo->dci[dciIndex].aggregLevel; + dlDciPtr[dciIndex].pc_and_bform.digBfInterfaces = pdcchInfo->dci[dciIndex].beamPdcchInfo.digBfInterfaces; dlDciPtr[dciIndex].beta_pdcch_1_0 = pdcchInfo->dci[dciIndex].txPdcchPower.beta_pdcch_1_0; dlDciPtr[dciIndex].powerControlOffsetSS = pdcchInfo->dci[dciIndex].txPdcchPower.powerControlOffsetSS; @@ -3072,6 +4132,10 @@ void fillDlMsgDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *pdcchInfo,\ if(dlDciPtr[dciIndex].payloadSizeBits % 8) numBytes += 1; +#ifdef OAI_TESTING + dlDciPtr[dciIndex].payloadSizeBits = reverseBytes16(dlDciPtr[dciIndex].payloadSizeBits); +#endif + if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN) { DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected"); @@ -3142,10 +4206,30 @@ void fillPagePdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req bwp = &pageAlloc->bwp; fillPageDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pageAlloc, macCellCfg); +#ifdef OAI_TESTING + /* Calculating PDU length. Considering only one dl dci pdu for now */ + dlTtiReqPdu->pduSize = reverseBytes16(sizeof(fapi_dl_pdcch_pdu_t)); + dlTtiReqPdu->pduType = reverseBytes16(PDCCH_PDU_TYPE); + dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = reverseBytes16(bwp->freqAlloc.numPrb); + dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = reverseBytes16(bwp->freqAlloc.startPrb); + dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = reverseBytes16(pageAlloc->pageDlDci.cceReg.interleaved.shiftIndex); + dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = reverseBytes16(1); +#else + /* Calculating PDU length. Considering only one dl dci pdu for now */ dlTtiReqPdu->pduType = PDCCH_PDU_TYPE; - + dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t); dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb; dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb; + dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = pageAlloc->pageDlDci.cceReg.interleaved.shiftIndex; + dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = 1; + + /* Filling Vendor message PDU */ + dlTtiVendorPdu->pdu_type = FAPI_PDCCH_PDU_TYPE; + dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdcch_pdu_t); + dlTtiVendorPdu->pdu.pdcch_pdu.num_dl_dci = dlTtiReqPdu->pdu.pdcch_pdu.numDlDci; + dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_pdcch_to_ssb = 0; + dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_dmrs_to_ssb = 0; +#endif dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing; dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix; @@ -3156,20 +4240,10 @@ void fillPagePdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pageAlloc->pageDlDci.cceRegMappingType; dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pageAlloc->pageDlDci.cceReg.interleaved.regBundleSize; dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pageAlloc->pageDlDci.cceReg.interleaved.interleaverSize; - dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = pageAlloc->pageDlDci.cceReg.interleaved.shiftIndex; dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pageAlloc->pageDlDci.precoderGranularity; - dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = 1; dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = CORESET_TYPE0; - /* Calculating PDU length. Considering only one dl dci pdu for now */ - dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t); - /* Filling Vendor message PDU */ - dlTtiVendorPdu->pdu_type = FAPI_PDCCH_PDU_TYPE; - dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdcch_pdu_t); - dlTtiVendorPdu->pdu.pdcch_pdu.num_dl_dci = dlTtiReqPdu->pdu.pdcch_pdu.numDlDci; - dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_pdcch_to_ssb = 0; - dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_dmrs_to_ssb = 0; } } @@ -3226,27 +4300,39 @@ uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_ return RFAILED; } - dlTtiReqPdu->pduType = PDCCH_PDU_TYPE; - dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb; - dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb; + /* Calculating PDU length. Considering only one dl dci pdu for now */ +#ifdef OAI_TESTING + dlTtiReqPdu->pduSize = reverseBytes16(sizeof(fapi_dl_pdcch_pdu_t)); + dlTtiReqPdu->pduType = reverseBytes16(PDCCH_PDU_TYPE); + dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = reverseBytes16(bwp->freqAlloc.numPrb); + dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = reverseBytes16(bwp->freqAlloc.startPrb); + dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = reverseBytes16(pdcchInfo->coresetCfg.shiftIndex); + dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = reverseBytes16(pdcchInfo->numDlDci); + memcpy(dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource, pdcchInfo->coresetCfg.freqDomainResource, \ + sizeof(uint8_t)*6); +#else + dlTtiReqPdu->pduSize = (sizeof(fapi_dl_pdcch_pdu_t)); + dlTtiReqPdu->pduType = (PDCCH_PDU_TYPE); + dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = (bwp->freqAlloc.numPrb); + dlTtiReqPdu->pdu.pdcch_pdu.bwpStart =(bwp->freqAlloc.startPrb); + dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = (pdcchInfo->coresetCfg.shiftIndex); + dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = (pdcchInfo->numDlDci); + convertFreqDomRsrcMapToIAPIFormat(pdcchInfo->coresetCfg.freqDomainResource,\ + dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource); +#endif dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing; dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix; dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pdcchInfo->coresetCfg.startSymbolIndex; dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pdcchInfo->coresetCfg.durationSymbols; - convertFreqDomRsrcMapToIAPIFormat(pdcchInfo->coresetCfg.freqDomainResource,\ - dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource); dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pdcchInfo->coresetCfg.cceRegMappingType; dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pdcchInfo->coresetCfg.regBundleSize; dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pdcchInfo->coresetCfg.interleaverSize; - dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = pdcchInfo->coresetCfg.shiftIndex; dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pdcchInfo->coresetCfg.precoderGranularity; - dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = pdcchInfo->numDlDci; dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = coreSetType; - /* Calculating PDU length. Considering only one dl dci pdu for now */ - dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t); +#ifndef OAI_TESTING /* Filling Vendor message PDU */ dlTtiVendorPdu->pdu_type = FAPI_PDCCH_PDU_TYPE; dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdcch_pdu_t); @@ -3256,6 +4342,7 @@ uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_ dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[dciIndex].epre_ratio_of_pdcch_to_ssb = 0; dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[dciIndex].epre_ratio_of_dmrs_to_ssb = 0; } +#endif } return ROK; @@ -3286,54 +4373,82 @@ void fillPagePdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req if(dlTtiReqPdu != NULLP) { - dlTtiReqPdu->pduType = PDSCH_PDU_TYPE; memset(&dlTtiReqPdu->pdu.pdsch_pdu, 0, sizeof(fapi_dl_pdsch_pdu_t)); +#ifdef OAI_TESTING + dlTtiReqPdu->pduType = reverseBytes16(PDSCH_PDU_TYPE); + dlTtiReqPdu->pduSize = reverseBytes16(sizeof(fapi_dl_pdsch_pdu_t)); + dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = reverseBytes16(0); /* PTRS and CBG params are excluded */ + dlTtiReqPdu->pdu.pdsch_pdu.rnti = reverseBytes16(P_RNTI); + dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = reverseBytes16(pduIndex); + dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = reverseBytes16(pageAlloc->bwp.freqAlloc.numPrb); + dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = reverseBytes16(pageAlloc->bwp.freqAlloc.startPrb); + dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = reverseBytes16(macCellCfg->cellCfg.phyCellId); + dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = reverseBytes16(DL_DMRS_SYMBOL_POS); + dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = reverseBytes16(macCellCfg->cellCfg.phyCellId); + dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = reverseBytes16(0x0001); + dlTtiReqPdu->pdu.pdsch_pdu.rbStart = reverseBytes16(pageAlloc->pageDlSch.freqAlloc.startPrb); + dlTtiReqPdu->pdu.pdsch_pdu.rbSize = reverseBytes16(pageAlloc->pageDlSch.freqAlloc.numPrb); +#else + dlTtiReqPdu->pduType = PDSCH_PDU_TYPE; + dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t); dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = 0; /* PTRS and CBG params are excluded */ dlTtiReqPdu->pdu.pdsch_pdu.rnti = P_RNTI; dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = pduIndex; dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = pageAlloc->bwp.freqAlloc.numPrb; dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = pageAlloc->bwp.freqAlloc.startPrb; + dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = macCellCfg->cellCfg.phyCellId; + dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = DL_DMRS_SYMBOL_POS; + dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = macCellCfg->cellCfg.phyCellId; + dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = 0x0001; + dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pageAlloc->pageDlSch.freqAlloc.startPrb; + dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pageAlloc->pageDlSch.freqAlloc.numPrb; +#endif dlTtiReqPdu->pdu.pdsch_pdu.subCarrierSpacing = pageAlloc->bwp.subcarrierSpacing; dlTtiReqPdu->pdu.pdsch_pdu.cyclicPrefix = pageAlloc->bwp.cyclicPrefix; dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = 1; for(idx = 0; idx < MAX_CODEWORDS ; idx++) { - dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = 308; dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = 2; dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pageAlloc->pageDlSch.tbInfo.mcs; dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = 0; dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = 0; +#ifdef OAI_TESTING + dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = reverseBytes16(308); + dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = reverseBytes32(pageAlloc->pageDlSch.tbInfo.tbSize); +#else + dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = 308; dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pageAlloc->pageDlSch.tbInfo.tbSize; +#endif } - dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = macCellCfg->cellCfg.phyCellId; dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = 1; dlTtiReqPdu->pdu.pdsch_pdu.transmissionScheme = 0; dlTtiReqPdu->pdu.pdsch_pdu.refPoint = 0; - dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = DL_DMRS_SYMBOL_POS; dlTtiReqPdu->pdu.pdsch_pdu.dmrsConfigType = pageAlloc->pageDlSch.dmrs.dmrsType; - dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = macCellCfg->cellCfg.phyCellId; dlTtiReqPdu->pdu.pdsch_pdu.scid = 0; dlTtiReqPdu->pdu.pdsch_pdu.numDmrsCdmGrpsNoData = 1; - dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = 0x0001; dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = 1; /* since we are using type-1, hence rbBitmap excluded */ - dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pageAlloc->pageDlSch.freqAlloc.startPrb; - dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pageAlloc->pageDlSch.freqAlloc.numPrb; dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pageAlloc->pageDlSch.vrbPrbMapping; dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pageAlloc->pageDlSch.timeAlloc.startSymb; dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pageAlloc->pageDlSch.timeAlloc.numSymb; - dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = 1; - dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = 0; dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = 0; - dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0; - dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].beamIdx[0].beamidx = 0; dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = 0; dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = 0; +#ifndef OAI_TESTING dlTtiReqPdu->pdu.pdsch_pdu.mappingType = pageAlloc->pageDlSch.timeAlloc.mappingType; dlTtiReqPdu->pdu.pdsch_pdu.nrOfDmrsSymbols = pageAlloc->pageDlSch.dmrs.nrOfDmrsSymbols; dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pageAlloc->pageDlSch.dmrs.dmrsAddPos; + dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = 1; + dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = 0; + dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0; + dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].beamIdx[0].beamidx = 0; +#else + dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = reverseBytes16(1); + dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = reverseBytes16(0); + dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = reverseBytes16(0); + dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].beamIdx[0].beamidx = reverseBytes16(0); +#endif - dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t); /* DL TTI Request vendor message */ dlTtiVendorPdu->pdu_type = FAPI_PDSCH_PDU_TYPE; @@ -3372,57 +4487,86 @@ void fillPdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu if(dlTtiReqPdu != NULLP) { - dlTtiReqPdu->pduType = PDSCH_PDU_TYPE; memset(&dlTtiReqPdu->pdu.pdsch_pdu, 0, sizeof(fapi_dl_pdsch_pdu_t)); +#ifdef OAI_TESTING + dlTtiReqPdu->pduType = reverseBytes16(PDSCH_PDU_TYPE); + dlTtiReqPdu->pduSize = reverseBytes16(sizeof(fapi_dl_pdsch_pdu_t)); + dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = reverseBytes16(pdschInfo->pduBitmap); + dlTtiReqPdu->pdu.pdsch_pdu.rnti = reverseBytes16(pdschInfo->rnti); + dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = reverseBytes16(pduIndex); + dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = reverseBytes16(bwp.freqAlloc.numPrb); + dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = reverseBytes16(bwp.freqAlloc.startPrb); + dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = reverseBytes16(pdschInfo->dataScramblingId); + dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = reverseBytes16(pdschInfo->dmrs.dlDmrsSymbPos); + dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = reverseBytes16(pdschInfo->dmrs.dlDmrsScramblingId); + dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = reverseBytes16(pdschInfo->dmrs.dmrsPorts); + dlTtiReqPdu->pdu.pdsch_pdu.rbStart = reverseBytes16(pdschInfo->pdschFreqAlloc.startPrb); + dlTtiReqPdu->pdu.pdsch_pdu.rbSize = reverseBytes16(pdschInfo->pdschFreqAlloc.numPrb); +#else + dlTtiReqPdu->pduType = PDSCH_PDU_TYPE; + dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t); dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = pdschInfo->pduBitmap; dlTtiReqPdu->pdu.pdsch_pdu.rnti = pdschInfo->rnti; dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = pduIndex; dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = bwp.freqAlloc.numPrb; dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = bwp.freqAlloc.startPrb; + dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = pdschInfo->dataScramblingId; + dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = pdschInfo->dmrs.dlDmrsSymbPos; + dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = pdschInfo->dmrs.dlDmrsScramblingId; + dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = pdschInfo->dmrs.dmrsPorts; + dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.startPrb; + dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.numPrb; +#endif dlTtiReqPdu->pdu.pdsch_pdu.subCarrierSpacing = bwp.subcarrierSpacing; dlTtiReqPdu->pdu.pdsch_pdu.cyclicPrefix = bwp.cyclicPrefix; dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = pdschInfo->numCodewords; for(idx = 0; idx < MAX_CODEWORDS ; idx++) { - dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = pdschInfo->codeword[idx].targetCodeRate; dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = pdschInfo->codeword[idx].qamModOrder; dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pdschInfo->codeword[idx].mcsIndex; dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = pdschInfo->codeword[idx].mcsTable; dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = pdschInfo->codeword[idx].rvIndex; +#ifdef OAI_TESTING + dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = reverseBytes16(pdschInfo->codeword[idx].targetCodeRate); + dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = reverseBytes32(pdschInfo->codeword[idx].tbSize); +#else + dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = pdschInfo->codeword[idx].targetCodeRate; dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pdschInfo->codeword[idx].tbSize; +#endif } - dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = pdschInfo->dataScramblingId; dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = pdschInfo->numLayers; dlTtiReqPdu->pdu.pdsch_pdu.transmissionScheme = pdschInfo->transmissionScheme; dlTtiReqPdu->pdu.pdsch_pdu.refPoint = pdschInfo->refPoint; - dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = pdschInfo->dmrs.dlDmrsSymbPos; dlTtiReqPdu->pdu.pdsch_pdu.dmrsConfigType = pdschInfo->dmrs.dmrsConfigType; - dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = pdschInfo->dmrs.dlDmrsScramblingId; dlTtiReqPdu->pdu.pdsch_pdu.scid = pdschInfo->dmrs.scid; dlTtiReqPdu->pdu.pdsch_pdu.numDmrsCdmGrpsNoData = pdschInfo->dmrs.numDmrsCdmGrpsNoData; - dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = pdschInfo->dmrs.dmrsPorts; dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = pdschInfo->pdschFreqAlloc.resourceAllocType; /* since we are using type-1, hence rbBitmap excluded */ - dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.startPrb; - dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.numPrb; dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pdschInfo->pdschFreqAlloc.vrbPrbMapping; dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pdschInfo->pdschTimeAlloc.startSymb; dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pdschInfo->pdschTimeAlloc.numSymb; - dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs; - dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize; - dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces; - dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \ - pmIdx = pdschInfo->beamPdschInfo.prg[0].pmIdx; - dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \ - beamIdx[0].beamidx = pdschInfo->beamPdschInfo.prg[0].beamIdx[0]; dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = pdschInfo->txPdschPower.powerControlOffset; dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = pdschInfo->txPdschPower.powerControlOffsetSS; +#ifdef OAI_TESTING + dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = 1; + dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = reverseBytes16(0); + dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = reverseBytes16(0); + dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = reverseBytes16(pdschInfo->beamPdschInfo.prg[0].pmIdx); + dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].beamIdx[0].beamidx = reverseBytes16(pdschInfo->beamPdschInfo.prg[0].beamIdx[0]); + dlTtiReqPdu->pdu.pdsch_pdu.maintParamV3.ldpcBaseGraph=2; + dlTtiReqPdu->pdu.pdsch_pdu.maintParamV3.tbSizeLbrmBytes=reverseBytes32(57376); +#else + dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces; + dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs; + dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize; + dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = pdschInfo->beamPdschInfo.prg[0].pmIdx; + dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].beamIdx[0].beamidx = pdschInfo->beamPdschInfo.prg[0].beamIdx[0]; dlTtiReqPdu->pdu.pdsch_pdu.mappingType = pdschInfo->dmrs.mappingType; dlTtiReqPdu->pdu.pdsch_pdu.nrOfDmrsSymbols = pdschInfo->dmrs.nrOfDmrsSymbols; dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pdschInfo->dmrs.dmrsAddPos; +#endif - dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t); - +#ifndef OAI_TESTING /* DL TTI Request vendor message */ dlTtiVendorPdu->pdu_type = FAPI_PDSCH_PDU_TYPE; dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdsch_pdu_t); @@ -3431,6 +4575,7 @@ void fillPdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu { dlTtiVendorPdu->pdu.pdsch_pdu.tx_ru_idx[i] =0; } +#endif } } @@ -3542,6 +4687,12 @@ uint8_t calcTxDataReqPduCount(MacDlSlot *dlSlot) return count; } +uint8_t get_tlv_padding(uint16_t tlv_length) +{ + DU_LOG("\nDEBUG --> LWR_MAC: get_tlv_padding tlv_length %u = padding = %d\n",tlv_length, ((4 - (tlv_length % 4)) % 4)); + return (4 - (tlv_length % 4)) % 4; +} + /*********************************************************************** * * @brief fills the SIB1 TX-DATA request message @@ -3563,6 +4714,7 @@ uint8_t calcTxDataReqPduCount(MacDlSlot *dlSlot) uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, MacCellCfg *macCellCfg, PdschCfg *pdschCfg) { +#ifndef OAI_TESTING uint32_t payloadSize = 0; uint8_t *sib1Payload = NULLP; fapi_api_queue_elem_t *payloadElem = NULLP; @@ -3593,14 +4745,36 @@ uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, MacCel #else pduDesc[pduIndex].tlvs[0].value = sib1Payload; #endif - pduDesc[pduIndex].pdu_length = payloadSize; + pduDesc[pduIndex].pdu_length = payloadSize; -#ifdef INTEL_WLS_MEM +#ifdef INTEL_WLS_MEM addWlsBlockToFree(sib1Payload, payloadSize, (lwrMacCb.phySlotIndCntr-1)); #else LWR_MAC_FREE(sib1Payload, payloadSize); #endif + +#else + + uint8_t *sib1Payload = NULLP; + fapi_api_queue_elem_t *payloadElem = NULLP; +#ifdef INTEL_WLS_MEM + void * wlsHdlr = NULLP; +#endif + uint8_t tlvPaddingLen =get_tlv_padding(pdschCfg->codeword[0].tbSize); + uint16_t totalLen= pdschCfg->codeword[0].tbSize + 4; + + pduDesc[pduIndex].pdu_length = totalLen; +#ifdef OAI_TESTING + pduDesc[pduIndex].pdu_length = reverseBytes32(pduDesc[pduIndex].pdu_length); +#endif + pduDesc[pduIndex].pdu_index = reverseBytes16(pduIndex); + pduDesc[pduIndex].num_tlvs = reverseBytes32(1); + pduDesc[pduIndex].tlvs[0].tag = reverseBytes16(FAPI_TX_DATA_PAYLOAD); + pduDesc[pduIndex].tlvs[0].length = reverseBytes32(pdschCfg->codeword[0].tbSize); + memcpy(pduDesc[pduIndex].tlvs[0].value.direct, macCellCfg->cellCfg.sib1Cfg.sib1Pdu, pdschCfg->codeword[0].tbSize); +#endif + return ROK; } @@ -3624,20 +4798,36 @@ uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, MacCel * ********************************************************************/ uint8_t fillPageTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlPageAlloc *pageAllocInfo) { + +#ifndef OAI_TESTING +#ifndef OAI_TESTING uint32_t payloadSize = 0; +#else + uint16_t payloadSize = 0; +#endif + uint8_t *pagePayload = NULLP; fapi_api_queue_elem_t *payloadElem = NULLP; #ifdef INTEL_WLS_MEM void * wlsHdlr = NULLP; #endif + payloadSize = pageAllocInfo->pageDlSch.tbInfo.tbSize; + +#ifndef OAI_TESTING pduDesc[pduIndex].pdu_index = pduIndex; pduDesc[pduIndex].num_tlvs = 1; - /* fill the TLV */ - payloadSize = pageAllocInfo->pageDlSch.tbInfo.tbSize; pduDesc[pduIndex].tlvs[0].tl.tag = ((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_64; pduDesc[pduIndex].tlvs[0].tl.length = (payloadSize & 0x0000ffff); +#else + pduDesc[pduIndex].pdu_index = reverseBytes16(pduIndex); + pduDesc[pduIndex].num_tlvs = reverseBytes32(1); + /* fill the TLV */ + pduDesc[pduIndex].tlvs[0].tag = reverseBytes16(((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_32); + pduDesc[pduIndex].tlvs[0].length = reverseBytes16((payloadSize & 0x0000ffff)); +#endif + LWR_MAC_ALLOC(pagePayload, payloadSize); if(pagePayload == NULLP) { @@ -3647,19 +4837,23 @@ uint8_t fillPageTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlPage FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, \ pageAllocInfo->pageDlSch.dlPagePduLen); memcpy(pagePayload + TX_PAYLOAD_HDR_LEN, pageAllocInfo->pageDlSch.dlPagePdu, pageAllocInfo->pageDlSch.dlPagePduLen); - #ifdef INTEL_WLS_MEM mtGetWlsHdl(&wlsHdlr); pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, pagePayload)); #else pduDesc[pduIndex].tlvs[0].value = pagePayload; #endif + pduDesc[pduIndex].pdu_length = payloadSize; +#ifdef OAI_TESTING + pduDesc[pduIndex].pdu_length = reverseBytes16(pduDesc[pduIndex].pdu_length); +#endif #ifdef INTEL_WLS_MEM addWlsBlockToFree(pagePayload, payloadSize, (lwrMacCb.phySlotIndCntr-1)); #else LWR_MAC_FREE(pagePayload, payloadSize); +#endif #endif return ROK; @@ -3685,20 +4879,22 @@ uint8_t fillPageTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlPage * ********************************************************************/ uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, RarInfo *rarInfo, PdschCfg *pdschCfg) { - uint16_t payloadSize; + +#ifndef OAI_TESTING + uint16_t payloadSize = 0; uint8_t *rarPayload = NULLP; fapi_api_queue_elem_t *payloadElem = NULLP; #ifdef INTEL_WLS_MEM void * wlsHdlr = NULLP; #endif + payloadSize = pdschCfg->codeword[0].tbSize; pduDesc[pduIndex].pdu_index = pduIndex; pduDesc[pduIndex].num_tlvs = 1; - /* fill the TLV */ - payloadSize = pdschCfg->codeword[0].tbSize; pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64; pduDesc[pduIndex].tlvs[0].tl.length = payloadSize; + LWR_MAC_ALLOC(rarPayload, payloadSize); if(rarPayload == NULLP) { @@ -3707,7 +4903,6 @@ uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, RarInfo payloadElem = (fapi_api_queue_elem_t *)rarPayload; FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, rarInfo->rarPduLen); memcpy(rarPayload + TX_PAYLOAD_HDR_LEN, rarInfo->rarPdu, rarInfo->rarPduLen); - #ifdef INTEL_WLS_MEM mtGetWlsHdl(&wlsHdlr); pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, rarPayload)); @@ -3721,6 +4916,23 @@ uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, RarInfo #else LWR_MAC_FREE(rarPayload, payloadSize); #endif + +#else + + uint8_t tlvPaddingLen =get_tlv_padding(rarInfo->rarPduLen); + uint16_t totalLen= rarInfo->rarPduLen +tlvPaddingLen; + pduDesc[pduIndex].pdu_length = totalLen; + pduDesc[pduIndex].pdu_length = reverseBytes32(pduDesc[pduIndex].pdu_length); + + pduDesc[pduIndex].pdu_index = reverseBytes16(pduIndex); + pduDesc[pduIndex].num_tlvs = reverseBytes32(1); + /* fill the TLV */ + pduDesc[pduIndex].tlvs[0].tag = reverseBytes16(FAPI_TX_DATA_PAYLOAD); + pduDesc[pduIndex].tlvs[0].length = reverseBytes32(rarInfo->rarPduLen); + + memcpy(pduDesc[pduIndex].tlvs[0].value.direct, rarInfo->rarPdu, rarInfo->rarPduLen); + +#endif /* FAPI */ return ROK; } @@ -3744,6 +4956,8 @@ uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, RarInfo * ********************************************************************/ uint8_t fillDlMsgTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlMsgSchInfo *dlMsgSchInfo, PdschCfg *pdschCfg) { + +#ifndef OAI_TESTING uint16_t payloadSize; uint8_t *dlMsgPayload = NULLP; fapi_api_queue_elem_t *payloadElem = NULLP; @@ -3751,69 +4965,357 @@ uint8_t fillDlMsgTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlMsg void * wlsHdlr = NULLP; #endif - pduDesc[pduIndex].pdu_index = pduIndex; - pduDesc[pduIndex].num_tlvs = 1; + payloadSize = pdschCfg->codeword[0].tbSize; +#ifndef OAI_TESTING + pduDesc[pduIndex].pdu_index = pduIndex; + pduDesc[pduIndex].num_tlvs = 1; + /* fill the TLV */ + pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64; + pduDesc[pduIndex].tlvs[0].tl.length = payloadSize; +#else + pduDesc[pduIndex].pdu_index = reverseBytes16(pduIndex); + pduDesc[pduIndex].num_tlvs = reverseBytes32(1); + /* fill the TLV */ + pduDesc[pduIndex].tlvs[0].tl.tag = reverseBytes16(FAPI_TX_DATA_PTR_TO_PAYLOAD_32); + pduDesc[pduIndex].tlvs[0].tl.length = reverseBytes16(payloadSize); +#endif + + LWR_MAC_ALLOC(dlMsgPayload, payloadSize); + if(dlMsgPayload == NULLP) + { + return RFAILED; + } + payloadElem = (fapi_api_queue_elem_t *)dlMsgPayload; + FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, dlMsgSchInfo->dlMsgPduLen); + memcpy(dlMsgPayload + TX_PAYLOAD_HDR_LEN, dlMsgSchInfo->dlMsgPdu, dlMsgSchInfo->dlMsgPduLen); + +#ifdef INTEL_WLS_MEM + mtGetWlsHdl(&wlsHdlr); + pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, dlMsgPayload)); +#else + pduDesc[pduIndex].tlvs[0].value = dlMsgPayload; +#endif + + pduDesc[pduIndex].pdu_length = payloadSize; +#ifdef OAI_TESTING + pduDesc[pduIndex].pdu_length = reverseBytes16(pduDesc[pduIndex].pdu_length); +#endif + +#ifdef INTEL_WLS_MEM + addWlsBlockToFree(dlMsgPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1)); +#else + LWR_MAC_FREE(dlMsgPayload, payloadSize); +#endif +#endif /* FAPI */ + return ROK; +} + +#endif /* FAPI */ + +/******************************************************************* + * + * @brief Sends DL TTI Request to PHY + * + * @details + * + * Function : fillDlTtiReq + * + * Functionality: + * -Sends FAPI DL TTI req to PHY + * + * @params[in] timing info + * @return ROK - success + * RFAILED - failure + * + * ****************************************************************/ +uint16_t fillDlTtiReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElemt) +{ +#ifdef CALL_FLOW_DEBUG_LOG + DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : DL_TTI_REQUEST\n"); +#endif + +#ifdef INTEL_FAPI +#ifndef OAI_TESTING + uint8_t idx =0; + uint8_t nPdu = 0; + uint8_t numPduEncoded = 0; + uint8_t ueIdx; + uint16_t cellIdx =0; + uint16_t pduIndex = 0; + + SlotTimingInfo dlTtiReqTimingInfo; + MacDlSlot *currDlSlot = NULLP; + MacCellCfg macCellCfg; + RntiType rntiType; + fapi_dl_tti_req_t *dlTtiReq = NULLP; + fapi_msg_header_t *msgHeader = NULLP; + p_fapi_api_queue_elem_t dlTtiElem; + p_fapi_api_queue_elem_t headerElem; + p_fapi_api_queue_elem_t prevElem; + + if(lwrMacCb.phyState == PHY_STATE_RUNNING) + { + GET_CELL_IDX(currTimingInfo.cellId, cellIdx); + /* consider phy delay */ + ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,gConfigInfo.gPhyDeltaDl, macCb.macCell[cellIdx]->numOfSlots); + dlTtiReqTimingInfo.cellId = currTimingInfo.cellId; + macCellCfg = macCb.macCell[cellIdx]->macCellCfg; + currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot]; + + /* Vendor Message */ + fapi_vendor_msg_t *vendorMsg; + p_fapi_api_queue_elem_t vendorMsgQElem; + /* Allocte And fill Vendor msg */ + LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t))); + if(!vendorMsgQElem) + { + DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req"); + return RFAILED; + } + FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t)); + vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1); + fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t)); + + LWR_MAC_ALLOC(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t))); + if(dlTtiElem) + { + FILL_FAPI_LIST_ELEM(dlTtiElem, NULLP, FAPI_DL_TTI_REQUEST, 1, \ + sizeof(fapi_dl_tti_req_t)); + /* Fill message header */ + LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t))); + if(!headerElem) + { + DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for header in DL TTI req"); + LWR_MAC_FREE(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t))); + return RFAILED; + } + FILL_FAPI_LIST_ELEM(headerElem, dlTtiElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \ + sizeof(fapi_msg_header_t)); + + msgHeader = (fapi_msg_header_t *)(headerElem + 1); + msgHeader->num_msg = 2; + msgHeader->handle = 0; + + /* Fill Dl TTI Request */ + dlTtiReq = (fapi_dl_tti_req_t *)(dlTtiElem +1); + memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t)); + fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, sizeof(fapi_dl_tti_req_t)); + + dlTtiReq->sfn = dlTtiReqTimingInfo.sfn; + dlTtiReq->slot = dlTtiReqTimingInfo.slot; + dlTtiReq->nPdus = calcDlTtiReqPduCount(currDlSlot); /* get total Pdus */ + nPdu = dlTtiReq->nPdus; + + vendorMsg->p7_req_vendor.dl_tti_req.num_pdus = nPdu; + vendorMsg->p7_req_vendor.dl_tti_req.sym = 0; + + dlTtiReq->nGroup = 0; + if(dlTtiReq->nPdus > 0) + { + if(currDlSlot->dlInfo.isBroadcastPres) + { + if(currDlSlot->dlInfo.brdcstAlloc.ssbTransmissionMode) + { + if(dlTtiReq->pdus != NULLP) + { + for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++) + { + fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\ + currDlSlot, idx, dlTtiReq->sfn); + numPduEncoded++; + } + } + DU_LOG("\033[1;31m"); + DU_LOG("\nDEBUG --> LWR_MAC: MIB sent.."); + DU_LOG("\033[0m"); + } + if(currDlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode) + { + /* Filling SIB1 param */ + if(numPduEncoded != nPdu) + { + if(currDlSlot->dlInfo.brdcstAlloc.crnti == SI_RNTI) + rntiType = SI_RNTI_TYPE; + + /* PDCCH PDU */ + fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], + currDlSlot, -1, rntiType, CORESET_TYPE0, MAX_NUM_UE); + numPduEncoded++; + + /* PDSCH PDU */ + fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], + &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg->dci[0].pdschCfg, + currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp, pduIndex); + dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex; + pduIndex++; + numPduEncoded++; + } + DU_LOG("\033[1;34m"); + DU_LOG("\nDEBUG --> LWR_MAC: SIB1 sent..."); + DU_LOG("\033[0m"); + } + } + if(currDlSlot->pageAllocInfo != NULLP) + { + /* Filling DL Paging Alloc param */ + if(numPduEncoded != nPdu) + { + rntiType = P_RNTI_TYPE; + + fillPagePdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], \ + currDlSlot->pageAllocInfo, &macCellCfg); + numPduEncoded++; + + fillPagePdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], + currDlSlot->pageAllocInfo, pduIndex, &macCellCfg); + dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex; + pduIndex++; + numPduEncoded++; + } + DU_LOG("\033[1;34m"); + DU_LOG("\nDEBUG --> LWR_MAC: PAGE sent..."); + DU_LOG("\033[0m"); + } + for(ueIdx=0; ueIdxdlInfo.rarAlloc[ueIdx] != NULLP) + { + /* Filling RAR param */ + rntiType = RA_RNTI_TYPE; + if(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg) + { + + fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], + currDlSlot, -1, rntiType, CORESET_TYPE0, ueIdx); + numPduEncoded++; + MAC_FREE(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg, sizeof(PdcchCfg)); + } + if(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg) + { + fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], + currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg, currDlSlot->dlInfo.rarAlloc[ueIdx]->bwp, pduIndex); + numPduEncoded++; + pduIndex++; + DU_LOG("\033[1;32m"); + DU_LOG("\nDEBUG --> LWR_MAC: RAR sent..."); + DU_LOG("\033[0m"); + } + } + if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP) + { + if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg) \ + { + rntiType = C_RNTI_TYPE; + fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], + currDlSlot, idx, rntiType, currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg->coresetCfg.coreSetType, ueIdx); + numPduEncoded++; + } + if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdu != NULLP) + { + if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg) + { + fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], \ + currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg,\ + currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->bwp, pduIndex); + numPduEncoded++; + pduIndex++; + DU_LOG("\033[1;32m"); + if((macCb.macCell[cellIdx]->macRaCb[ueIdx].macMsg4Status) && \ + (*macCb.macCell[cellIdx]->macRaCb[ueIdx].macMsg4Status == TRUE)) + { + DU_LOG("\nDEBUG --> LWR_MAC: MSG4 sent..."); + MAC_FREE(macCb.macCell[cellIdx]->macRaCb[ueIdx].macMsg4Status, sizeof(bool)); + } + else + { + DU_LOG("\nDEBUG --> LWR_MAC: DL MSG sent..."); + } + DU_LOG("\033[0m"); + } + } + MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg,sizeof(PdcchCfg)); + /* else + { + MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgAlloc)); + currDlSlot->dlInfo.dlMsgAlloc[ueIdx] = NULLP; + } + */ + } + } + dlTtiReq->ue_grp_info[dlTtiReq->nGroup].nUe = MAX_NUM_UE_PER_TTI; + dlTtiReq->nGroup++; +#ifdef ODU_SLOT_IND_DEBUG_LOG + DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request"); +#endif + /* Intel L1 expects UL_TTI.request following DL_TTI.request */ + + fillUlTtiReq(currTimingInfo, dlTtiElem, &(vendorMsg->p7_req_vendor.ul_tti_req)); + msgHeader->num_msg++; + /* Intel L1 expects UL_DCI.request following DL_TTI.request */ + fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next, &(vendorMsg->p7_req_vendor.ul_dci_req)); + msgHeader->num_msg++; + /* send Tx-DATA req message */ + sendTxDataReq(dlTtiReqTimingInfo, currDlSlot, dlTtiElem->p_next->p_next, &(vendorMsg->p7_req_vendor.tx_data_req)); + if(dlTtiElem->p_next->p_next->p_next) + { + msgHeader->num_msg++; + prevElem = dlTtiElem->p_next->p_next->p_next; + } + else + prevElem = dlTtiElem->p_next->p_next; + } + else + { +#ifdef ODU_SLOT_IND_DEBUG_LOG + DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request"); +#endif + /* Intel L1 expects UL_TTI.request following DL_TTI.request */ + fillUlTtiReq(currTimingInfo, dlTtiElem, &(vendorMsg->p7_req_vendor.ul_tti_req)); + msgHeader->num_msg++; + + /* Intel L1 expects UL_DCI.request following DL_TTI.request */ - /* fill the TLV */ - payloadSize = pdschCfg->codeword[0].tbSize; - pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64; - pduDesc[pduIndex].tlvs[0].tl.length = payloadSize; - LWR_MAC_ALLOC(dlMsgPayload, payloadSize); - if(dlMsgPayload == NULLP) + fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next, &(vendorMsg->p7_req_vendor.ul_dci_req)); + msgHeader->num_msg++; + prevElem = dlTtiElem->p_next->p_next; + } + if(macCb.macCell[cellIdx]->state == CELL_TO_BE_STOPPED) + { + /* Intel L1 expects UL_DCI.request following DL_TTI.request */ + lwr_mac_procStopReqEvt(currTimingInfo, prevElem, &(vendorMsg->stop_req_vendor)); + msgHeader->num_msg++; + macCb.macCell[cellIdx]->state = CELL_STOP_IN_PROGRESS; + prevElem = prevElem->p_next; + } + + prevElem->p_next = vendorMsgQElem; + LwrMacSendToL1(headerElem); + memset(currDlSlot, 0, sizeof(MacDlSlot)); + return ROK; + } + else + { + DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for DL TTI Request"); + memset(currDlSlot, 0, sizeof(MacDlSlot)); + return RFAILED; + } + } + else { + lwr_mac_procInvalidEvt(&currTimingInfo); return RFAILED; } - payloadElem = (fapi_api_queue_elem_t *)dlMsgPayload; - FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, dlMsgSchInfo->dlMsgPduLen); - memcpy(dlMsgPayload + TX_PAYLOAD_HDR_LEN, dlMsgSchInfo->dlMsgPdu, dlMsgSchInfo->dlMsgPduLen); - -#ifdef INTEL_WLS_MEM - mtGetWlsHdl(&wlsHdlr); - pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, dlMsgPayload)); -#else - pduDesc[pduIndex].tlvs[0].value = dlMsgPayload; -#endif - pduDesc[pduIndex].pdu_length = payloadSize; -#ifdef INTEL_WLS_MEM - addWlsBlockToFree(dlMsgPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1)); #else - LWR_MAC_FREE(dlMsgPayload, payloadSize); -#endif - return ROK; -} - -#endif /* FAPI */ - -/******************************************************************* - * - * @brief Sends DL TTI Request to PHY - * - * @details - * - * Function : fillDlTtiReq - * - * Functionality: - * -Sends FAPI DL TTI req to PHY - * - * @params[in] timing info - * @return ROK - success - * RFAILED - failure - * - * ****************************************************************/ -uint16_t fillDlTtiReq(SlotTimingInfo currTimingInfo) -{ -#ifdef CALL_FLOW_DEBUG_LOG - DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : DL_TTI_REQUEST\n"); -#endif -#ifdef INTEL_FAPI uint8_t idx =0; - uint8_t nPdu = 0; + uint8_t nPdus = 0; uint8_t numPduEncoded = 0; - uint8_t ueIdx; + uint8_t ueIdx =0; + uint8_t nGroup = 0; uint16_t cellIdx =0; uint16_t pduIndex = 0; + uint32_t msgLen= 0; SlotTimingInfo dlTtiReqTimingInfo; MacDlSlot *currDlSlot = NULLP; @@ -3824,181 +5326,146 @@ uint16_t fillDlTtiReq(SlotTimingInfo currTimingInfo) p_fapi_api_queue_elem_t dlTtiElem; p_fapi_api_queue_elem_t headerElem; p_fapi_api_queue_elem_t prevElem; + if(lwrMacCb.phyState == PHY_STATE_RUNNING) { - GET_CELL_IDX(currTimingInfo.cellId, cellIdx); - /* consider phy delay */ - ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,gConfigInfo.gPhyDeltaDl, macCb.macCell[cellIdx]->numOfSlots); - dlTtiReqTimingInfo.cellId = currTimingInfo.cellId; - - macCellCfg = macCb.macCell[cellIdx]->macCellCfg; - - currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot]; - - /* Vendor Message */ - fapi_vendor_msg_t *vendorMsg; - p_fapi_api_queue_elem_t vendorMsgQElem; - /* Allocte And fill Vendor msg */ - LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t))); - if(!vendorMsgQElem) - { - DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req"); - return RFAILED; - } - FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t)); - vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1); - fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t)); - - LWR_MAC_ALLOC(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t))); - if(dlTtiElem) - { - FILL_FAPI_LIST_ELEM(dlTtiElem, NULLP, FAPI_DL_TTI_REQUEST, 1, \ - sizeof(fapi_dl_tti_req_t)); - /* Fill message header */ - LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t))); - if(!headerElem) - { - DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for header in DL TTI req"); - LWR_MAC_FREE(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t))); - return RFAILED; - } - - FILL_FAPI_LIST_ELEM(headerElem, dlTtiElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \ - sizeof(fapi_msg_header_t)); - msgHeader = (fapi_msg_header_t *)(headerElem + 1); - msgHeader->num_msg = 2; - msgHeader->handle = 0; - - /* Fill Dl TTI Request */ - dlTtiReq = (fapi_dl_tti_req_t *)(dlTtiElem +1); - memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t)); - fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, sizeof(fapi_dl_tti_req_t)); - - dlTtiReq->sfn = dlTtiReqTimingInfo.sfn; - dlTtiReq->slot = dlTtiReqTimingInfo.slot; - dlTtiReq->nPdus = calcDlTtiReqPduCount(currDlSlot); /* get total Pdus */ - nPdu = dlTtiReq->nPdus; - - vendorMsg->p7_req_vendor.dl_tti_req.num_pdus = nPdu; - vendorMsg->p7_req_vendor.dl_tti_req.sym = 0; - - dlTtiReq->nGroup = 0; - if(dlTtiReq->nPdus > 0) - { - if(currDlSlot->dlInfo.isBroadcastPres) - { - if(currDlSlot->dlInfo.brdcstAlloc.ssbTransmissionMode) - { - if(dlTtiReq->pdus != NULLP) - { - for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++) - { - fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\ - currDlSlot, idx, dlTtiReq->sfn); - numPduEncoded++; - } - } - DU_LOG("\033[1;31m"); - DU_LOG("\nDEBUG --> LWR_MAC: MIB sent.."); - DU_LOG("\033[0m"); - } - - if(currDlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode) - { - /* Filling SIB1 param */ - if(numPduEncoded != nPdu) - { + GET_CELL_IDX(currTimingInfo.cellId, cellIdx); + /* consider phy delay */ + ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,gConfigInfo.gPhyDeltaDl, macCb.macCell[cellIdx]->numOfSlots); + dlTtiReqTimingInfo.cellId = currTimingInfo.cellId; + macCellCfg = macCb.macCell[cellIdx]->macCellCfg; + currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot]; + + nPdus = calcDlTtiReqPduCount(currDlSlot); + + if(nPdus>0) + { + nGroup=1; /*As per 5G FAPI: PHY API spec v 222.10.02, section 3.4.2 DL_TTI.request, For SU-MIMO, one group includes one UE only */ + } + else + { + //DU_LOG("\nINFO --> LWR_MAC: NO PDU to be scheduled in DL"); + return ROK; + } + /* Below msg length is calculated based on the parameter present in fapi_dl_tti_req_t structure + * the prameters of fapi_dl_tti_req_t structure are -> + * header = sizeof(fapi_msg_t) , {sfn, slot} = 2*sizeof(uint16_t), + * {numPdus, nGroup} = 2 * sizeof(uint8_t), total number of pdu supproted = numPdus*sizeof(fapi_dl_tti_req_pdu_t) + * and number of Group supported = ngroup * sizeof(fapi_ue_info_t) */ + +// msgLen=sizeof(fapi_msg_t)+ (2*sizeof(uint16_t)) + (2*sizeof(uint8_t)) + (nPdus*sizeof(fapi_dl_tti_req_pdu_t)) + (nGroup * sizeof(fapi_ue_info_t)); + + LWR_MAC_ALLOC(dlTtiReq, (sizeof(fapi_dl_tti_req_t))); + if(dlTtiReq) + { + memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t)); + fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, msgLen); + dlTtiReq->sfn = reverseBytes16(dlTtiReqTimingInfo.sfn); + dlTtiReq->slot = reverseBytes16(dlTtiReqTimingInfo.slot); + dlTtiReq->nPdus = nPdus; /* get total Pdus */ + dlTtiReq->nGroup = nGroup; + + if(dlTtiReq->nPdus > 0) + { + if(currDlSlot->dlInfo.isBroadcastPres) + { + if(currDlSlot->dlInfo.brdcstAlloc.ssbTransmissionMode) + { + if(dlTtiReq->pdus != NULLP) + { + for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++) + { + fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\ + currDlSlot, idx, dlTtiReqTimingInfo.sfn); + numPduEncoded++; + } + } + DU_LOG("\033[1;31m"); + DU_LOG("\nDEBUG --> LWR_MAC: MIB sent.."); + DU_LOG("\033[0m"); + } + if(currDlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode) + { + /* Filling SIB1 param */ + if(numPduEncoded != nPdus) + { if(currDlSlot->dlInfo.brdcstAlloc.crnti == SI_RNTI) rntiType = SI_RNTI_TYPE; + /* PDCCH PDU */ + fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], NULLP, currDlSlot, -1, rntiType, CORESET_TYPE0, MAX_NUM_UE); + + numPduEncoded++; + fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], NULLP, &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg->dci[0].pdschCfg, + currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp, pduIndex); + + dlTtiReq->ue_grp_info[dlTtiReq->nGroup-1].pduIdx[pduIndex] = pduIndex; + pduIndex++; + numPduEncoded++; + } + DU_LOG("\033[1;34m"); + DU_LOG("\nDEBUG --> LWR_MAC: SIB1 sent..."); + DU_LOG("\033[0m"); + } + } + if(currDlSlot->pageAllocInfo != NULLP) + { + /* Filling DL Paging Alloc param */ + if(numPduEncoded != nPdus) + { + rntiType = P_RNTI_TYPE; + fillPagePdcchPdu(&dlTtiReq->pdus[numPduEncoded], NULLP, currDlSlot->pageAllocInfo, &macCellCfg); - /* PDCCH PDU */ - fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], - currDlSlot, -1, rntiType, CORESET_TYPE0, MAX_NUM_UE); - numPduEncoded++; - - /* PDSCH PDU */ - fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], - &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg->dci[0].pdschCfg, - currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp, - pduIndex); - dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex; - pduIndex++; - numPduEncoded++; - } - DU_LOG("\033[1;34m"); - DU_LOG("\nDEBUG --> LWR_MAC: SIB1 sent..."); - DU_LOG("\033[0m"); - } - } - - if(currDlSlot->pageAllocInfo != NULLP) - { - /* Filling DL Paging Alloc param */ - if(numPduEncoded != nPdu) - { - rntiType = P_RNTI_TYPE; - fillPagePdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], \ - currDlSlot->pageAllocInfo, &macCellCfg); - numPduEncoded++; - fillPagePdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], - currDlSlot->pageAllocInfo, pduIndex, &macCellCfg); - dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex; - pduIndex++; - numPduEncoded++; - } - DU_LOG("\033[1;34m"); - DU_LOG("\nDEBUG --> LWR_MAC: PAGE sent..."); - DU_LOG("\033[0m"); - } - - for(ueIdx=0; ueIdxdlInfo.rarAlloc[ueIdx] != NULLP) - { - /* Filling RAR param */ - rntiType = RA_RNTI_TYPE; + numPduEncoded++; + fillPagePdschPdu(&dlTtiReq->pdus[numPduEncoded], NULLP, currDlSlot->pageAllocInfo, pduIndex, &macCellCfg); + + dlTtiReq->ue_grp_info[dlTtiReq->nGroup-1].pduIdx[pduIndex] = pduIndex; + pduIndex++; + numPduEncoded++; + } + DU_LOG("\033[1;34m"); + DU_LOG("\nDEBUG --> LWR_MAC: PAGE sent..."); + DU_LOG("\033[0m"); + } + for(ueIdx=0; ueIdxdlInfo.rarAlloc[ueIdx] != NULLP) + { + /* Filling RAR param */ + rntiType = RA_RNTI_TYPE; if(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg) { - fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], - currDlSlot, -1, rntiType, CORESET_TYPE0, ueIdx); - numPduEncoded++; + fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], NULLP, currDlSlot, -1, rntiType, CORESET_TYPE0, ueIdx); + numPduEncoded++; MAC_FREE(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg, sizeof(PdcchCfg)); } - if(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg) - { - fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], - currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg, - currDlSlot->dlInfo.rarAlloc[ueIdx]->bwp, - pduIndex); - numPduEncoded++; - pduIndex++; - + if(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg) + { + fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], NULLP, + currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg, currDlSlot->dlInfo.rarAlloc[ueIdx]->bwp, pduIndex); + numPduEncoded++; + pduIndex++; DU_LOG("\033[1;32m"); - DU_LOG("\nDEBUG --> LWR_MAC: RAR sent..."); - DU_LOG("\033[0m"); - } - } - - if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP) - { + DU_LOG("\nDEBUG --> LWR_MAC: RAR sent..."); + DU_LOG("\033[0m"); + } + } + if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP) + { if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg) \ { rntiType = C_RNTI_TYPE; - fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], + fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], NULLP, currDlSlot, idx, rntiType, currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg->coresetCfg.coreSetType, ueIdx); numPduEncoded++; } - if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdu != NULLP) { if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg) { - fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], \ - currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg,\ + fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], NULLP, currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg,\ currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->bwp, pduIndex); numPduEncoded++; pduIndex++; - DU_LOG("\033[1;32m"); if((macCb.macCell[cellIdx]->macRaCb[ueIdx].macMsg4Status) && \ (*macCb.macCell[cellIdx]->macRaCb[ueIdx].macMsg4Status == TRUE)) @@ -4012,7 +5479,6 @@ uint16_t fillDlTtiReq(SlotTimingInfo currTimingInfo) } DU_LOG("\033[0m"); } - } MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg,sizeof(PdcchCfg)); /* else @@ -4021,76 +5487,59 @@ uint16_t fillDlTtiReq(SlotTimingInfo currTimingInfo) currDlSlot->dlInfo.dlMsgAlloc[ueIdx] = NULLP; } */ - } - } - - dlTtiReq->ue_grp_info[dlTtiReq->nGroup].nUe = MAX_NUM_UE_PER_TTI; - dlTtiReq->nGroup++; - -#ifdef ODU_SLOT_IND_DEBUG_LOG - DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request"); -#endif - - /* Intel L1 expects UL_TTI.request following DL_TTI.request */ - fillUlTtiReq(currTimingInfo, dlTtiElem, &(vendorMsg->p7_req_vendor.ul_tti_req)); - msgHeader->num_msg++; - - /* Intel L1 expects UL_DCI.request following DL_TTI.request */ - fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next, &(vendorMsg->p7_req_vendor.ul_dci_req)); - msgHeader->num_msg++; - - /* send Tx-DATA req message */ - sendTxDataReq(dlTtiReqTimingInfo, currDlSlot, dlTtiElem->p_next->p_next, &(vendorMsg->p7_req_vendor.tx_data_req)); - if(dlTtiElem->p_next->p_next->p_next) - { - msgHeader->num_msg++; - prevElem = dlTtiElem->p_next->p_next->p_next; - } - else - prevElem = dlTtiElem->p_next->p_next; - } - else - { -#ifdef ODU_SLOT_IND_DEBUG_LOG - DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request"); -#endif - /* Intel L1 expects UL_TTI.request following DL_TTI.request */ - fillUlTtiReq(currTimingInfo, dlTtiElem, &(vendorMsg->p7_req_vendor.ul_tti_req)); - msgHeader->num_msg++; - - /* Intel L1 expects UL_DCI.request following DL_TTI.request */ - fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next, &(vendorMsg->p7_req_vendor.ul_dci_req)); - msgHeader->num_msg++; - - prevElem = dlTtiElem->p_next->p_next; - } - - if(macCb.macCell[cellIdx]->state == CELL_TO_BE_STOPPED) - { - /* Intel L1 expects UL_DCI.request following DL_TTI.request */ - lwr_mac_procStopReqEvt(currTimingInfo, prevElem, &(vendorMsg->stop_req_vendor)); - msgHeader->num_msg++; - macCb.macCell[cellIdx]->state = CELL_STOP_IN_PROGRESS; + } + } + dlTtiReq->ue_grp_info[dlTtiReq->nGroup-1].nUe = MAX_NUM_UE_PER_TTI; + +#ifdef ODU_SLOT_IND_DEBUG_LOG + DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request"); +#endif +#ifdef ODU_SLOT_IND_DEBUG_LOG + DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request"); +#endif + uint32_t bufferLen=0; + uint8_t mBuf[2500]; + packDlTtiReq(dlTtiReq, mBuf, &bufferLen); + LWR_MAC_ALLOC(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + bufferLen)); + if(dlTtiElem==NULLP) + { + DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for DL TTI Request"); + return RFAILED; + } + FILL_FAPI_LIST_ELEM(dlTtiElem, NULLP, FAPI_DL_TTI_REQUEST, 1, bufferLen); + + memcpy((uint8_t *)( dlTtiElem +1), mBuf, bufferLen); + prevElemt->p_next = dlTtiElem; + LWR_MAC_FREE(dlTtiReq, (sizeof(fapi_dl_tti_req_t))); + //LWR_MAC_FREE(mBuf, sizeof(fapi_dl_tti_req_t)); + } + if(macCb.macCell[cellIdx]->state == CELL_TO_BE_STOPPED) + { + /* Intel L1 expects UL_DCI.request following DL_TTI.request */ + lwr_mac_procStopReqEvt(currTimingInfo, prevElem, NULLP); + + macCb.macCell[cellIdx]->state = CELL_STOP_IN_PROGRESS; prevElem = prevElem->p_next; - } - prevElem->p_next = vendorMsgQElem; - LwrMacSendToL1(headerElem); - memset(currDlSlot, 0, sizeof(MacDlSlot)); - return ROK; - } - else - { - DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for DL TTI Request"); - memset(currDlSlot, 0, sizeof(MacDlSlot)); - return RFAILED; - } + } + + return ROK; + } + else + { + DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for DL TTI Request"); + memset(currDlSlot, 0, sizeof(MacDlSlot)); + return RFAILED; + } } else { - lwr_mac_procInvalidEvt(&currTimingInfo); - return RFAILED; + lwr_mac_procInvalidEvt(&currTimingInfo); + return RFAILED; } + +#endif #endif + return ROK; } @@ -4117,6 +5566,7 @@ uint16_t sendTxDataReq(SlotTimingInfo currTimingInfo, MacDlSlot *dlSlot, p_fapi_ DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : TX_DATA_REQ\n"); #endif +#ifndef OAI_TESTING uint8_t nPdu = 0; uint8_t ueIdx=0; uint16_t cellIdx=0; @@ -4143,13 +5593,112 @@ uint16_t sendTxDataReq(SlotTimingInfo currTimingInfo, MacDlSlot *dlSlot, p_fapi_ memset(txDataReq, 0, sizeof(fapi_tx_data_req_t)); fillMsgHeader(&txDataReq->header, FAPI_TX_DATA_REQUEST, sizeof(fapi_tx_data_req_t)); - vendorTxDataReq->sym = 0; - - txDataReq->sfn = currTimingInfo.sfn; - txDataReq->slot = currTimingInfo.slot; + vendorTxDataReq->sym = 0; + + txDataReq->sfn = currTimingInfo.sfn; + txDataReq->slot = currTimingInfo.slot; + if(dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode) + { + fillSib1TxDataReq(txDataReq->pdu_desc, pduIndex, &macCb.macCell[cellIdx]->macCellCfg, \ + &dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg->dci[0].pdschCfg); + pduIndex++; + MAC_FREE(dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg,sizeof(PdcchCfg)); + txDataReq->num_pdus++; + } + if(dlSlot->pageAllocInfo != NULLP) + { + fillPageTxDataReq(txDataReq->pdu_desc, pduIndex, dlSlot->pageAllocInfo); + pduIndex++; + txDataReq->num_pdus++; + MAC_FREE(dlSlot->pageAllocInfo->pageDlSch.dlPagePdu, sizeof(dlSlot->pageAllocInfo->pageDlSch.dlPagePduLen)); + MAC_FREE(dlSlot->pageAllocInfo,sizeof(DlPageAlloc)); + } + + for(ueIdx=0; ueIdxdlInfo.rarAlloc[ueIdx] != NULLP) + { + if((dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg)) + { + fillRarTxDataReq(txDataReq->pdu_desc, pduIndex, &dlSlot->dlInfo.rarAlloc[ueIdx]->rarInfo,\ + dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg); + pduIndex++; + txDataReq->num_pdus++; + MAC_FREE(dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg, sizeof(PdschCfg)); + } + MAC_FREE(dlSlot->dlInfo.rarAlloc[ueIdx],sizeof(RarAlloc)); + } + + if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP) + { + if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg) + { + fillDlMsgTxDataReq(txDataReq->pdu_desc, pduIndex, \ + dlSlot->dlInfo.dlMsgAlloc[ueIdx], \ + dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg); + pduIndex++; + txDataReq->num_pdus++; + MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg,sizeof(PdschCfg)); + } + MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdu, \ + dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPduLen); + dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdu = NULLP; + MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgSchInfo)); + } + } + + /* Fill message header */ + DU_LOG("\nDEBUG --> LWR_MAC: Sending TX DATA Request"); + prevElem->p_next = txDataElem; + } + +#else + uint8_t nPdu = 0; + uint8_t ueIdx=0; + uint16_t cellIdx=0; + uint16_t pduIndex = 0; + uint32_t MsgLen=0; + + fapi_tx_data_req_t *txDataReq =NULLP; + p_fapi_api_queue_elem_t txDataElem = 0; + + GET_CELL_IDX(currTimingInfo.cellId, cellIdx); + + /* send TX_Data request message */ + nPdu = calcTxDataReqPduCount(dlSlot); + if(nPdu == 0) + { + return ROK; + } + + /* Below msg length is calculated based on the parameter present in fapi_tx_data_req_t structure + * the prameters of fapi_tx_data_req_t structure are -> + * header = sizeof(fapi_msg_t) , ((sfn, slot, numpdu) = 3*sizeof(uint16_t)), + * total number of fapi_tx_pdu_desc_t supproted = numPdus*sizeof(fapi_tx_pdu_desc_t)*/ + + MsgLen = sizeof(fapi_msg_t)+ (3*sizeof(uint16_t)) + (nPdu*sizeof(fapi_tx_pdu_desc_t)); + if(nPdu > 0) + { + LWR_MAC_ALLOC(txDataReq, (sizeof(fapi_tx_data_req_t))); + memset(txDataReq, 0, MsgLen); +#if 0 + LWR_MAC_ALLOC(txDataElem, (sizeof(fapi_api_queue_elem_t) + MsgLen)); + if(txDataElem == NULLP) + { + DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for TX data Request"); + return RFAILED; + } + + FILL_FAPI_LIST_ELEM(txDataElem, NULLP, FAPI_TX_DATA_REQUEST, 1, MsgLen); + txDataReq = (fapi_tx_data_req_t *)(txDataElem +1); +#endif + fillMsgHeader(&txDataReq->header, FAPI_TX_DATA_REQUEST, sizeof(fapi_tx_data_req_t)); + + txDataReq->sfn = reverseBytes16(currTimingInfo.sfn); + txDataReq->slot = reverseBytes16(currTimingInfo.slot); if(dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode) { - fillSib1TxDataReq(txDataReq->pdu_desc, pduIndex, &macCb.macCell[cellIdx]->macCellCfg, \ + fillSib1TxDataReq(txDataReq->pdu_desc, pduIndex, &macCb.macCell[cellIdx]->macCellCfg, \ &dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg->dci[0].pdschCfg); pduIndex++; MAC_FREE(dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg,sizeof(PdcchCfg)); @@ -4197,10 +5746,31 @@ uint16_t sendTxDataReq(SlotTimingInfo currTimingInfo, MacDlSlot *dlSlot, p_fapi_ } } + DU_LOG("\nDEBUG --> LWR_MAC: Sending TX DATA Request with total number pdu %u", txDataReq->num_pdus); + txDataReq->num_pdus= reverseBytes16(txDataReq->num_pdus); + DU_LOG("\nDEBUG --> LWR_MAC: After reversing total number pdu %u = ", txDataReq->num_pdus); + /* Fill message header */ - DU_LOG("\nDEBUG --> LWR_MAC: Sending TX DATA Request"); + uint32_t bufferLen=0; + uint8_t mBuf[2500]; + packTxDataReqBuffer(txDataReq, mBuf, &bufferLen); + LWR_MAC_ALLOC(txDataElem, (sizeof(fapi_api_queue_elem_t) + bufferLen)); + if(txDataElem == NULLP) + { + DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for TX data Request"); + return RFAILED; + } + + FILL_FAPI_LIST_ELEM(txDataElem, NULLP, FAPI_TX_DATA_REQUEST, 1, bufferLen); + memcpy((uint8_t *)( txDataElem +1), mBuf, bufferLen); + + + DU_LOG("\nDEBUG --> LWR_MAC: Sending TX DATA Request\n"); prevElem->p_next = txDataElem; + LWR_MAC_FREE(txDataReq, (sizeof(fapi_tx_data_req_t))); + // LWR_MAC_FREE(mBuf, (sizeof(fapi_tx_data_req_t))); } +#endif #endif return ROK; } @@ -4286,8 +5856,12 @@ void setNumCs(uint16_t *numCs, MacCellCfg *macCellCfg) uint8_t idx; if(macCellCfg != NULLP) { - idx = macCellCfg->prachCfg.fdm[0].zeroCorrZoneCfg; + idx = macCellCfg->prachCfg.fdm[0].zeroCorrZoneCfg; +#ifdef OAI_TESTING + *numCs = reverseBytes16(UnrestrictedSetNcsTable[idx]); +#else *numCs = UnrestrictedSetNcsTable[idx]; +#endif } #endif } @@ -4314,8 +5888,17 @@ void fillPrachPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, Ma { if(ulTtiReqPdu != NULLP) { +#ifdef OAI_TESTING + ulTtiReqPdu->pduType = reverseBytes16(PRACH_PDU_TYPE); + ulTtiReqPdu->pduSize = reverseBytes16(sizeof(fapi_ul_prach_pdu_t)); + ulTtiReqPdu->pdu.prach_pdu.physCellId = reverseBytes16(macCellCfg->cellCfg.phyCellId); + setNumCs(&ulTtiReqPdu->pdu.prach_pdu.numCs, macCellCfg); +#else ulTtiReqPdu->pduType = PRACH_PDU_TYPE; + ulTtiReqPdu->pduSize = sizeof(fapi_ul_prach_pdu_t); ulTtiReqPdu->pdu.prach_pdu.physCellId = macCellCfg->cellCfg.phyCellId; + setNumCs(&ulTtiReqPdu->pdu.prach_pdu.numCs, macCellCfg); +#endif ulTtiReqPdu->pdu.prach_pdu.numPrachOcas = \ currUlSlot->ulSchInfo.prachSchInfo.numPrachOcas; ulTtiReqPdu->pdu.prach_pdu.prachFormat = \ @@ -4323,12 +5906,16 @@ void fillPrachPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, Ma ulTtiReqPdu->pdu.prach_pdu.numRa = currUlSlot->ulSchInfo.prachSchInfo.numRa; ulTtiReqPdu->pdu.prach_pdu.prachStartSymbol = \ currUlSlot->ulSchInfo.prachSchInfo.prachStartSymb; - setNumCs(&ulTtiReqPdu->pdu.prach_pdu.numCs, macCellCfg); + ulTtiReqPdu->pdu.prach_pdu.beamforming.digBfInterface = 0; +#ifdef OAI_TESTING + ulTtiReqPdu->pdu.prach_pdu.beamforming.numPrgs = reverseBytes16(0); + ulTtiReqPdu->pdu.prach_pdu.beamforming.prgSize = reverseBytes16(0); + ulTtiReqPdu->pdu.prach_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = reverseBytes16(0); +#else ulTtiReqPdu->pdu.prach_pdu.beamforming.numPrgs = 0; ulTtiReqPdu->pdu.prach_pdu.beamforming.prgSize = 0; - ulTtiReqPdu->pdu.prach_pdu.beamforming.digBfInterface = 0; ulTtiReqPdu->pdu.prach_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0; - ulTtiReqPdu->pduSize = sizeof(fapi_ul_prach_pdu_t); +#endif } } @@ -4352,45 +5939,78 @@ void fillPuschPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, fapi_vendor_ul_tti_req_pdu { if(ulTtiReqPdu != NULLP) { +// memset(&ulTtiReqPdu->pdu.pusch_pdu, 0, sizeof(fapi_ul_pusch_pdu_t)); +#ifdef OAI_TESTING + ulTtiReqPdu->pduType = reverseBytes16(PUSCH_PDU_TYPE); + ulTtiReqPdu->pduSize = reverseBytes16(sizeof(fapi_ul_pusch_pdu_t)); + ulTtiReqPdu->pdu.pusch_pdu.pduBitMap = reverseBytes16(1); + ulTtiReqPdu->pdu.pusch_pdu.rnti = reverseBytes16(puschInfo->crnti); + ulTtiReqPdu->pdu.pusch_pdu.handle = reverseBytes32(100); + /* TODO : Fill handle in raCb when scheduling pusch and access here */ + ulTtiReqPdu->pdu.pusch_pdu.bwpSize = reverseBytes16(macCellCfg->cellCfg.initialUlBwp.bwp.numPrb); + ulTtiReqPdu->pdu.pusch_pdu.bwpStart = reverseBytes16(macCellCfg->cellCfg.initialUlBwp.bwp.firstPrb); + ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = reverseBytes16(308); + ulTtiReqPdu->pdu.pusch_pdu.dataScramblingId = reverseBytes16(macCellCfg->cellId); + ulTtiReqPdu->pdu.pusch_pdu.ulDmrsSymbPos = reverseBytes16(4); + ulTtiReqPdu->pdu.pusch_pdu.ulDmrsScramblingId = reverseBytes16(macCellCfg->cellId); + ulTtiReqPdu->pdu.pusch_pdu.puschIdentity = reverseBytes16(0); + ulTtiReqPdu->pdu.pusch_pdu.dmrsPorts = reverseBytes16(0); + ulTtiReqPdu->pdu.pusch_pdu.rbStart = reverseBytes16(puschInfo->fdAlloc.resAlloc.type1.startPrb); + ulTtiReqPdu->pdu.pusch_pdu.rbSize = reverseBytes16(puschInfo->fdAlloc.resAlloc.type1.numPrb); + ulTtiReqPdu->pdu.pusch_pdu.txDirectCurrentLocation = reverseBytes16(0); +#else ulTtiReqPdu->pduType = PUSCH_PDU_TYPE; - memset(&ulTtiReqPdu->pdu.pusch_pdu, 0, sizeof(fapi_ul_pusch_pdu_t)); + ulTtiReqPdu->pduSize = sizeof(fapi_ul_pusch_pdu_t); ulTtiReqPdu->pdu.pusch_pdu.pduBitMap = 1; ulTtiReqPdu->pdu.pusch_pdu.rnti = puschInfo->crnti; - /* TODO : Fill handle in raCb when scheduling pusch and access here */ ulTtiReqPdu->pdu.pusch_pdu.handle = 100; + /* TODO : Fill handle in raCb when scheduling pusch and access here */ ulTtiReqPdu->pdu.pusch_pdu.bwpSize = macCellCfg->cellCfg.initialUlBwp.bwp.numPrb; ulTtiReqPdu->pdu.pusch_pdu.bwpStart = macCellCfg->cellCfg.initialUlBwp.bwp.firstPrb; + ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = 308; + ulTtiReqPdu->pdu.pusch_pdu.dataScramblingId = macCellCfg->cellId; + ulTtiReqPdu->pdu.pusch_pdu.ulDmrsSymbPos = 4; + ulTtiReqPdu->pdu.pusch_pdu.ulDmrsScramblingId = macCellCfg->cellId; + ulTtiReqPdu->pdu.pusch_pdu.dmrsPorts = 0; + ulTtiReqPdu->pdu.pusch_pdu.rbStart = puschInfo->fdAlloc.resAlloc.type1.startPrb; + ulTtiReqPdu->pdu.pusch_pdu.rbSize = puschInfo->fdAlloc.resAlloc.type1.numPrb; + ulTtiReqPdu->pdu.pusch_pdu.txDirectCurrentLocation = 0; +#endif ulTtiReqPdu->pdu.pusch_pdu.subCarrierSpacing = \ macCellCfg->cellCfg.initialUlBwp.bwp.scs; ulTtiReqPdu->pdu.pusch_pdu.cyclicPrefix = \ macCellCfg->cellCfg.initialUlBwp.bwp.cyclicPrefix; - ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = 308; ulTtiReqPdu->pdu.pusch_pdu.qamModOrder = puschInfo->tbInfo.qamOrder; ulTtiReqPdu->pdu.pusch_pdu.mcsIndex = puschInfo->tbInfo.mcs; ulTtiReqPdu->pdu.pusch_pdu.mcsTable = puschInfo->tbInfo.mcsTable; ulTtiReqPdu->pdu.pusch_pdu.transformPrecoding = 1; - ulTtiReqPdu->pdu.pusch_pdu.dataScramblingId = macCellCfg->cellId; ulTtiReqPdu->pdu.pusch_pdu.nrOfLayers = 1; - ulTtiReqPdu->pdu.pusch_pdu.ulDmrsSymbPos = 4; ulTtiReqPdu->pdu.pusch_pdu.dmrsConfigType = 0; - ulTtiReqPdu->pdu.pusch_pdu.ulDmrsScramblingId = macCellCfg->cellId; ulTtiReqPdu->pdu.pusch_pdu.scid = 0; ulTtiReqPdu->pdu.pusch_pdu.numDmrsCdmGrpsNoData = 1; - ulTtiReqPdu->pdu.pusch_pdu.dmrsPorts = 0; ulTtiReqPdu->pdu.pusch_pdu.resourceAlloc = \ puschInfo->fdAlloc.resAllocType; - ulTtiReqPdu->pdu.pusch_pdu.rbStart = \ - puschInfo->fdAlloc.resAlloc.type1.startPrb; - ulTtiReqPdu->pdu.pusch_pdu.rbSize = \ - puschInfo->fdAlloc.resAlloc.type1.numPrb; ulTtiReqPdu->pdu.pusch_pdu.vrbToPrbMapping = 0; ulTtiReqPdu->pdu.pusch_pdu.frequencyHopping = 0; - ulTtiReqPdu->pdu.pusch_pdu.txDirectCurrentLocation = 0; ulTtiReqPdu->pdu.pusch_pdu.uplinkFrequencyShift7p5khz = 0; ulTtiReqPdu->pdu.pusch_pdu.startSymbIndex = \ puschInfo->tdAlloc.startSymb; ulTtiReqPdu->pdu.pusch_pdu.nrOfSymbols = \ puschInfo->tdAlloc.numSymb; + ulTtiReqPdu->pdu.pusch_pdu.puschData.rvIndex = \ + puschInfo->tbInfo.rv; + ulTtiReqPdu->pdu.pusch_pdu.puschData.harqProcessId = \ + puschInfo->harqProcId; + ulTtiReqPdu->pdu.pusch_pdu.puschData.newDataIndicator = \ + puschInfo->tbInfo.ndi; +#ifdef OAI_TESTING + ulTtiReqPdu->pdu.pusch_pdu.puschData.tbSize = reverseBytes32(puschInfo->tbInfo.tbSize); + /* numCb is 0 for new transmission */ + ulTtiReqPdu->pdu.pusch_pdu.puschData.numCb = reverseBytes16(0); +#else + ulTtiReqPdu->pdu.pusch_pdu.puschData.tbSize = (puschInfo->tbInfo.tbSize); + /* numCb is 0 for new transmission */ + ulTtiReqPdu->pdu.pusch_pdu.puschData.numCb = (0); #ifdef INTEL_FAPI ulTtiReqPdu->pdu.pusch_pdu.mappingType = \ puschInfo->dmrsMappingType; @@ -4399,19 +6019,6 @@ void fillPuschPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, fapi_vendor_ul_tti_req_pdu ulTtiReqPdu->pdu.pusch_pdu.dmrsAddPos = \ puschInfo->dmrsAddPos; #endif - ulTtiReqPdu->pdu.pusch_pdu.puschData.rvIndex = \ - puschInfo->tbInfo.rv; - ulTtiReqPdu->pdu.pusch_pdu.puschData.harqProcessId = \ - puschInfo->harqProcId; - ulTtiReqPdu->pdu.pusch_pdu.puschData.newDataIndicator = \ - puschInfo->tbInfo.ndi; - ulTtiReqPdu->pdu.pusch_pdu.puschData.tbSize = \ - puschInfo->tbInfo.tbSize; - /* numCb is 0 for new transmission */ - ulTtiReqPdu->pdu.pusch_pdu.puschData.numCb = 0; - - ulTtiReqPdu->pduSize = sizeof(fapi_ul_pusch_pdu_t); - /* UL TTI Vendor PDU */ ulTtiVendorPdu->pdu_type = FAPI_PUSCH_PDU_TYPE; ulTtiVendorPdu->pdu.pusch_pdu.nr_of_antenna_ports=1; @@ -4420,6 +6027,7 @@ void fillPuschPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, fapi_vendor_ul_tti_req_pdu { ulTtiVendorPdu->pdu.pusch_pdu.rx_ru_idx[i]=0; } +#endif } } @@ -4443,31 +6051,58 @@ void fillPucchPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, fapi_vendor_ul_tti_req_pdu { if(ulTtiReqPdu != NULLP) { - ulTtiReqPdu->pduType = PUCCH_PDU_TYPE; memset(&ulTtiReqPdu->pdu.pucch_pdu, 0, sizeof(fapi_ul_pucch_pdu_t)); +#ifdef OAI_TESTING + ulTtiReqPdu->pduType = reverseBytes16(PUCCH_PDU_TYPE); + ulTtiReqPdu->pduSize = reverseBytes16(sizeof(fapi_ul_pucch_pdu_t)); + ulTtiReqPdu->pdu.pucch_pdu.rnti = reverseBytes16(pucchInfo->crnti); + /* TODO : Fill handle in raCb when scheduling pucch and access here */ + ulTtiReqPdu->pdu.pucch_pdu.handle = reverseBytes32(100); + ulTtiReqPdu->pdu.pucch_pdu.bwpSize = reverseBytes16(macCellCfg->cellCfg.initialUlBwp.bwp.numPrb); + ulTtiReqPdu->pdu.pucch_pdu.bwpStart = reverseBytes16(macCellCfg->cellCfg.initialUlBwp.bwp.firstPrb); + ulTtiReqPdu->pdu.pucch_pdu.prbStart = reverseBytes16(pucchInfo->fdAlloc.startPrb); + ulTtiReqPdu->pdu.pucch_pdu.prbSize = reverseBytes16(pucchInfo->fdAlloc.numPrb); + ulTtiReqPdu->pdu.pucch_pdu.secondHopPrb = reverseBytes16(pucchInfo->secondPrbHop); + ulTtiReqPdu->pdu.pucch_pdu.hoppingId = reverseBytes16(0); + ulTtiReqPdu->pdu.pucch_pdu.initialCyclicShift = reverseBytes16(pucchInfo->initialCyclicShift); + ulTtiReqPdu->pdu.pucch_pdu.dataScramblingId = reverseBytes16(0); /* Valid for Format 2, 3, 4 */ + ulTtiReqPdu->pdu.pucch_pdu.bitLenHarq = reverseBytes16(pucchInfo->harqInfo.harqBitLength); + ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart1 = reverseBytes16(0); /* Valid for Format 2, 3, 4 */ + ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart2 = reverseBytes16(0); /* Valid for Format 2, 3, 4 */ + ulTtiReqPdu->pdu.pucch_pdu.beamforming.numPrgs = reverseBytes16(pucchInfo->beamPucchInfo.numPrgs); + ulTtiReqPdu->pdu.pucch_pdu.beamforming.prgSize = reverseBytes16(pucchInfo->beamPucchInfo.prgSize); + ulTtiReqPdu->pdu.pucch_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = reverseBytes16(pucchInfo->beamPucchInfo.prg[0].beamIdx[0]); +#else + ulTtiReqPdu->pduType = PUCCH_PDU_TYPE; + ulTtiReqPdu->pduSize = sizeof(fapi_ul_pucch_pdu_t); ulTtiReqPdu->pdu.pucch_pdu.rnti = pucchInfo->crnti; /* TODO : Fill handle in raCb when scheduling pucch and access here */ ulTtiReqPdu->pdu.pucch_pdu.handle = 100; ulTtiReqPdu->pdu.pucch_pdu.bwpSize = macCellCfg->cellCfg.initialUlBwp.bwp.numPrb; ulTtiReqPdu->pdu.pucch_pdu.bwpStart = macCellCfg->cellCfg.initialUlBwp.bwp.firstPrb; + ulTtiReqPdu->pdu.pucch_pdu.prbStart = pucchInfo->fdAlloc.startPrb; + ulTtiReqPdu->pdu.pucch_pdu.prbSize = pucchInfo->fdAlloc.numPrb; + ulTtiReqPdu->pdu.pucch_pdu.secondHopPrb = pucchInfo->secondPrbHop; + ulTtiReqPdu->pdu.pucch_pdu.hoppingId = 0; + ulTtiReqPdu->pdu.pucch_pdu.initialCyclicShift = pucchInfo->initialCyclicShift; + ulTtiReqPdu->pdu.pucch_pdu.dataScramblingId = 0; /* Valid for Format 2, 3, 4 */ + ulTtiReqPdu->pdu.pucch_pdu.bitLenHarq = pucchInfo->harqInfo.harqBitLength; + ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart1 = 0; /* Valid for Format 2, 3, 4 */ + ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart2 = 0; /* Valid for Format 2, 3, 4 */ + ulTtiReqPdu->pdu.pucch_pdu.beamforming.numPrgs = pucchInfo->beamPucchInfo.numPrgs; + ulTtiReqPdu->pdu.pucch_pdu.beamforming.prgSize = pucchInfo->beamPucchInfo.prgSize; + ulTtiReqPdu->pdu.pucch_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = pucchInfo->beamPucchInfo.prg[0].beamIdx[0]; +#endif ulTtiReqPdu->pdu.pucch_pdu.subCarrierSpacing = macCellCfg->cellCfg.initialUlBwp.bwp.scs; ulTtiReqPdu->pdu.pucch_pdu.cyclicPrefix = macCellCfg->cellCfg.initialUlBwp.bwp.cyclicPrefix; ulTtiReqPdu->pdu.pucch_pdu.formatType = pucchInfo->pucchFormat; /* Supporting PUCCH Format 0 */ ulTtiReqPdu->pdu.pucch_pdu.multiSlotTxIndicator = 0; /* No Multi Slot transmission */ - ulTtiReqPdu->pdu.pucch_pdu.prbStart = pucchInfo->fdAlloc.startPrb; - ulTtiReqPdu->pdu.pucch_pdu.prbSize = pucchInfo->fdAlloc.numPrb; ulTtiReqPdu->pdu.pucch_pdu.startSymbolIndex = pucchInfo->tdAlloc.startSymb; ulTtiReqPdu->pdu.pucch_pdu.nrOfSymbols = pucchInfo->tdAlloc.numSymb; ulTtiReqPdu->pdu.pucch_pdu.freqHopFlag = pucchInfo->intraFreqHop; - ulTtiReqPdu->pdu.pucch_pdu.secondHopPrb = pucchInfo->secondPrbHop; ulTtiReqPdu->pdu.pucch_pdu.groupHopFlag = 0; ulTtiReqPdu->pdu.pucch_pdu.sequenceHopFlag = 0; - ulTtiReqPdu->pdu.pucch_pdu.hoppingId = 0; - - ulTtiReqPdu->pdu.pucch_pdu.initialCyclicShift = pucchInfo->initialCyclicShift; - - ulTtiReqPdu->pdu.pucch_pdu.dataScramblingId = 0; /* Valid for Format 2, 3, 4 */ ulTtiReqPdu->pdu.pucch_pdu.timeDomainOccIdx = pucchInfo->timeDomOCC; ulTtiReqPdu->pdu.pucch_pdu.preDftOccIdx = pucchInfo->occIdx; /* Valid for Format 4 only */ ulTtiReqPdu->pdu.pucch_pdu.preDftOccLen = pucchInfo->occLen; /* Valid for Format 4 only */ @@ -4476,15 +6111,8 @@ void fillPucchPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, fapi_vendor_ul_tti_req_pdu ulTtiReqPdu->pdu.pucch_pdu.dmrsScramblingId = 0; /* Valid for Format 2 */ ulTtiReqPdu->pdu.pucch_pdu.dmrsCyclicShift = 0; /* Valid for Format 4 */ ulTtiReqPdu->pdu.pucch_pdu.srFlag = pucchInfo->srFlag; - ulTtiReqPdu->pdu.pucch_pdu.bitLenHarq = pucchInfo->harqInfo.harqBitLength; - ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart1 = 0; /* Valid for Format 2, 3, 4 */ - ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart2 = 0; /* Valid for Format 2, 3, 4 */ - ulTtiReqPdu->pdu.pucch_pdu.beamforming.numPrgs = pucchInfo->beamPucchInfo.numPrgs; - ulTtiReqPdu->pdu.pucch_pdu.beamforming.prgSize = pucchInfo->beamPucchInfo.prgSize; ulTtiReqPdu->pdu.pucch_pdu.beamforming.digBfInterface = pucchInfo->beamPucchInfo.digBfInterfaces; - ulTtiReqPdu->pdu.pucch_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = pucchInfo->beamPucchInfo.prg[0].beamIdx[0]; - ulTtiReqPdu->pduSize = sizeof(fapi_ul_pucch_pdu_t); /* UL TTI Vendor PDU */ ulTtiVendorPdu->pdu_type = FAPI_PUCCH_PDU_TYPE; @@ -4522,6 +6150,7 @@ uint16_t fillUlTtiReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t pre #endif #ifdef INTEL_FAPI +#ifndef OAI_TESTING uint16_t cellIdx =0; uint8_t pduIdx = -1; uint8_t ueIdx = 0; @@ -4615,6 +6244,133 @@ uint16_t fillUlTtiReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t pre { lwr_mac_procInvalidEvt(&currTimingInfo); } + +#else + + uint8_t pduIdx = -1; + uint8_t ueIdx = 0; + uint8_t nPdus = 0; + uint16_t cellIdx =0; + uint32_t msgLen = 0; + + SlotTimingInfo ulTtiReqTimingInfo; + MacUlSlot *currUlSlot = NULLP; + MacCellCfg macCellCfg; + fapi_ul_tti_req_t *ulTtiReq = NULLP; + p_fapi_api_queue_elem_t ulTtiElem; + + if(lwrMacCb.phyState == PHY_STATE_RUNNING) + { + GET_CELL_IDX(currTimingInfo.cellId, cellIdx); + macCellCfg = macCb.macCell[cellIdx]->macCellCfg; + + /* add PHY delta */ + ADD_DELTA_TO_TIME(currTimingInfo,ulTtiReqTimingInfo,gConfigInfo.gPhyDeltaUl, macCb.macCell[cellIdx]->numOfSlots); + currUlSlot = &macCb.macCell[cellIdx]->ulSlot[ulTtiReqTimingInfo.slot % macCb.macCell[cellIdx]->numOfSlots]; + + LWR_MAC_ALLOC(ulTtiReq, (sizeof(fapi_ul_tti_req_t))); + if(ulTtiReq) + { + memset(ulTtiReq, 0, sizeof(fapi_ul_tti_req_t)); + + nPdus=getnPdus(ulTtiReq, currUlSlot); + if(nPdus == 0) + { + LWR_MAC_FREE(ulTtiReq, (sizeof(fapi_ul_tti_req_t))); + return ROK; + } + + /* Below msg length is calculated based on the parameter present in fapi_ul_tti_req_t structure + * the prameters of fapi_ul_tti_req_t structure are -> + * header = sizeof(fapi_msg_t) , {sfn, slot} = 2*sizeof(uint16_t), + * {numPdus, rachPresent, nGroup, nUlsch, nUlcch} = 5 * sizeof(uint8_t), total number of pdu supproted = numPdus*sizeof(fapi_ul_tti_req_pdu_t) + * sizeof(fapi_ue_info_t) */ + + msgLen=sizeof(fapi_msg_t)+ (2*sizeof(uint16_t)) + (5*sizeof(uint8_t)) + (nPdus*sizeof(fapi_ul_tti_req_pdu_t)) + sizeof(fapi_ue_info_t); + + fillMsgHeader(&ulTtiReq->header, FAPI_UL_TTI_REQUEST, msgLen); + ulTtiReq->sfn = reverseBytes16(ulTtiReqTimingInfo.sfn); + ulTtiReq->slot = reverseBytes16(ulTtiReqTimingInfo.slot); + ulTtiReq->nPdus = nPdus; + ulTtiReq->nGroup = 0; + + if(ulTtiReq->nPdus > 0) + { +#ifdef ODU_SLOT_IND_DEBUG_LOG + DU_LOG("\nDEBUG --> LWR_MAC: UL_TTI_REQ, datatype:%d, sfn/slot:%d/%d", currUlSlot->ulSchInfo.dataType, ulTtiReqTimingInfo.sfn, ulTtiReqTimingInfo.slot); +#endif + /* Fill Prach Pdu */ + if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_PRACH) + { + pduIdx++; + fillPrachPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot); + ulTtiReq->rachPresent++; + } + for(ueIdx = 0; ueIdx < MAX_NUM_UE; ueIdx++) + { + /* Fill PUSCH PDU */ + if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_PUSCH) + { + if(currUlSlot->ulSchInfo.schPuschInfo[ueIdx].crnti != 0) + { +#ifdef ODU_SLOT_IND_DEBUG_LOG + DU_LOG("\nDEBUG --> LWR_MAC: UL_TTI_REQ, PUSCH PDU ueId:%d", ueIdx); +#endif + pduIdx++; + fillPuschPdu(&ulTtiReq->pdus[pduIdx], NULLP, &macCellCfg, &currUlSlot->ulSchInfo.schPuschInfo[ueIdx]); + ulTtiReq->nUlsch++; + } + } + /* Fill PUCCH PDU */ + if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_UCI) + { + if(currUlSlot->ulSchInfo.schPucchInfo[ueIdx].crnti != 0) + { + pduIdx++; + fillPucchPdu(&ulTtiReq->pdus[pduIdx], NULLP, &macCellCfg, &currUlSlot->ulSchInfo.schPucchInfo[ueIdx]); + ulTtiReq->nUlcch++; + } + } + } + ulTtiReq->ueGrpInfo[ulTtiReq->nGroup].nUe = MAX_NUM_UE_PER_TTI; + ulTtiReq->nGroup++; + } + uint32_t bufferLen=0; + uint8_t mBuf[2500]; + packUlTtiReq(ulTtiReq, mBuf, &bufferLen); + LWR_MAC_ALLOC(ulTtiElem, (sizeof(fapi_api_queue_elem_t) + bufferLen)); + if(ulTtiElem==NULLP) + { + + DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for UL TTI Request"); + return RFAILED; + } + FILL_FAPI_LIST_ELEM(ulTtiElem, NULLP, FAPI_UL_TTI_REQUEST, 1, bufferLen); + + memcpy((uint8_t *)( ulTtiElem +1), mBuf, bufferLen); +#ifdef ODU_SLOT_IND_DEBUG_LOG + DU_LOG("\nDEBUG --> LWR_MAC: Sending UL TTI Request"); +#endif + prevElem->p_next = ulTtiElem; + + LWR_MAC_FREE(ulTtiReq, (sizeof(fapi_ul_tti_req_t))); + memset(currUlSlot, 0, sizeof(MacUlSlot)); + return ROK; + + } + else + { + DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for UL TTI Request"); + memset(currUlSlot, 0, sizeof(MacUlSlot)); + return RFAILED; + } + } + else + { + lwr_mac_procInvalidEvt(&currTimingInfo); + } + +#endif #endif return ROK; } @@ -4673,16 +6429,26 @@ void fillUlDciPdu(fapi_dl_dci_t *ulDciPtr, DciInfo *schDciInfo) uint8_t puschTpcSize = 2; uint8_t ul_SlIndSize = 1; +#ifndef OAI_TESTING ulDciPtr->rnti = schDciInfo->dciInfo.rnti; ulDciPtr->scramblingId = schDciInfo->dciInfo.scramblingId; ulDciPtr->scramblingRnti = schDciInfo->dciInfo.scramblingRnti; - ulDciPtr->cceIndex = schDciInfo->dciInfo.cceIndex; - ulDciPtr->aggregationLevel = schDciInfo->dciInfo.aggregLevel; ulDciPtr->pc_and_bform.numPrgs = schDciInfo->dciInfo.beamPdcchInfo.numPrgs; ulDciPtr->pc_and_bform.prgSize = schDciInfo->dciInfo.beamPdcchInfo.prgSize; - ulDciPtr->pc_and_bform.digBfInterfaces = schDciInfo->dciInfo.beamPdcchInfo.digBfInterfaces; ulDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx; ulDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0]; +#else + ulDciPtr->rnti = reverseBytes16(schDciInfo->dciInfo.rnti); + ulDciPtr->scramblingId = reverseBytes16(schDciInfo->dciInfo.scramblingId); + ulDciPtr->scramblingRnti = reverseBytes16(schDciInfo->dciInfo.scramblingRnti); + ulDciPtr->pc_and_bform.numPrgs = reverseBytes16(schDciInfo->dciInfo.beamPdcchInfo.numPrgs); + ulDciPtr->pc_and_bform.prgSize = reverseBytes16(schDciInfo->dciInfo.beamPdcchInfo.prgSize); + ulDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = reverseBytes16(schDciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx); + ulDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = reverseBytes16(schDciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0]); +#endif + ulDciPtr->cceIndex = schDciInfo->dciInfo.cceIndex; + ulDciPtr->aggregationLevel = schDciInfo->dciInfo.aggregLevel; + ulDciPtr->pc_and_bform.digBfInterfaces = schDciInfo->dciInfo.beamPdcchInfo.digBfInterfaces; ulDciPtr->beta_pdcch_1_0 = schDciInfo->dciInfo.txPdcchPower.beta_pdcch_1_0; ulDciPtr->powerControlOffsetSS = schDciInfo->dciInfo.txPdcchPower.powerControlOffsetSS; @@ -4738,6 +6504,9 @@ void fillUlDciPdu(fapi_dl_dci_t *ulDciPtr, DciInfo *schDciInfo) if(ulDciPtr->payloadSizeBits % 8) numBytes += 1; +#ifdef OAI_TESTING + ulDciPtr->payloadSizeBits = reverseBytes16(ulDciPtr->payloadSizeBits); +#endif if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN) { DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected"); @@ -4797,9 +6566,24 @@ uint8_t fillUlDciPdcchPdu(fapi_dci_pdu_t *ulDciReqPdu, fapi_vendor_dci_pdu_t *ve { memset(&ulDciReqPdu->pdcchPduConfig, 0, sizeof(fapi_dl_pdcch_pdu_t)); fillUlDciPdu(ulDciReqPdu->pdcchPduConfig.dlDci, dlInfo->ulGrant); + +#ifndef OAI_TESTING + /* Calculating PDU length. Considering only one Ul dci pdu for now */ + ulDciReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t); ulDciReqPdu->pduType = PDCCH_PDU_TYPE; ulDciReqPdu->pdcchPduConfig.bwpSize = dlInfo->ulGrant->bwpCfg.freqAlloc.numPrb; ulDciReqPdu->pdcchPduConfig.bwpStart = dlInfo->ulGrant->bwpCfg.freqAlloc.startPrb; + ulDciReqPdu->pdcchPduConfig.shiftIndex = dlInfo->ulGrant->coresetCfg.shiftIndex; + ulDciReqPdu->pdcchPduConfig.numDlDci = 1; +#else + /* Calculating PDU length. Considering only one Ul dci pdu for now */ + ulDciReqPdu->pduSize = reverseBytes16(sizeof(fapi_dl_pdcch_pdu_t)); + ulDciReqPdu->pduType = reverseBytes16(PDCCH_PDU_TYPE); + ulDciReqPdu->pdcchPduConfig.bwpSize = reverseBytes16(dlInfo->ulGrant->bwpCfg.freqAlloc.numPrb); + ulDciReqPdu->pdcchPduConfig.bwpStart = reverseBytes16(dlInfo->ulGrant->bwpCfg.freqAlloc.startPrb); + ulDciReqPdu->pdcchPduConfig.shiftIndex = reverseBytes16(dlInfo->ulGrant->coresetCfg.shiftIndex); + ulDciReqPdu->pdcchPduConfig.numDlDci = reverseBytes16(1); +#endif ulDciReqPdu->pdcchPduConfig.subCarrierSpacing = dlInfo->ulGrant->bwpCfg.subcarrierSpacing; ulDciReqPdu->pdcchPduConfig.cyclicPrefix = dlInfo->ulGrant->bwpCfg.cyclicPrefix; ulDciReqPdu->pdcchPduConfig.startSymbolIndex = dlInfo->ulGrant->coresetCfg.startSymbolIndex; @@ -4809,18 +6593,16 @@ uint8_t fillUlDciPdcchPdu(fapi_dci_pdu_t *ulDciReqPdu, fapi_vendor_dci_pdu_t *ve ulDciReqPdu->pdcchPduConfig.cceRegMappingType = dlInfo->ulGrant->coresetCfg.cceRegMappingType; ulDciReqPdu->pdcchPduConfig.regBundleSize = dlInfo->ulGrant->coresetCfg.regBundleSize; ulDciReqPdu->pdcchPduConfig.interleaverSize = dlInfo->ulGrant->coresetCfg.interleaverSize; - ulDciReqPdu->pdcchPduConfig.shiftIndex = dlInfo->ulGrant->coresetCfg.shiftIndex; ulDciReqPdu->pdcchPduConfig.precoderGranularity = dlInfo->ulGrant->coresetCfg.precoderGranularity; - ulDciReqPdu->pdcchPduConfig.numDlDci = 1; ulDciReqPdu->pdcchPduConfig.coreSetType = coreSetType; - /* Calculating PDU length. Considering only one Ul dci pdu for now */ - ulDciReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t); +#ifndef OAI_TESTING /* Vendor UL DCI PDU */ vendorUlDciPdu->pdcch_pdu_config.num_dl_dci = ulDciReqPdu->pdcchPduConfig.numDlDci; vendorUlDciPdu->pdcch_pdu_config.dl_dci[0].epre_ratio_of_pdcch_to_ssb = 0; vendorUlDciPdu->pdcch_pdu_config.dl_dci[0].epre_ratio_of_dmrs_to_ssb = 0; +#endif } return ROK; } @@ -4844,6 +6626,7 @@ uint8_t fillUlDciPdcchPdu(fapi_dci_pdu_t *ulDciReqPdu, fapi_vendor_dci_pdu_t *ve uint16_t fillUlDciReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_dci_req_t *vendorUlDciReq) { #ifdef INTEL_FAPI +#ifndef OAI_TESTING uint8_t cellIdx =0; uint8_t numPduEncoded = 0; SlotTimingInfo ulDciReqTimingInfo ={0}; @@ -4857,19 +6640,19 @@ uint16_t fillUlDciReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t pre memcpy(&ulDciReqTimingInfo, &currTimingInfo, sizeof(SlotTimingInfo)); currDlSlot = &macCb.macCell[cellIdx]->dlSlot[ulDciReqTimingInfo.slot % macCb.macCell[cellIdx]->numOfSlots]; - LWR_MAC_ALLOC(ulDciElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_dci_req_t))); - if(ulDciElem) - { - FILL_FAPI_LIST_ELEM(ulDciElem, NULLP, FAPI_UL_DCI_REQUEST, 1, \ - sizeof(fapi_ul_dci_req_t)); - ulDciReq = (fapi_ul_dci_req_t *)(ulDciElem +1); - memset(ulDciReq, 0, sizeof(fapi_ul_dci_req_t)); - fillMsgHeader(&ulDciReq->header, FAPI_UL_DCI_REQUEST, sizeof(fapi_ul_dci_req_t)); - - ulDciReq->sfn = ulDciReqTimingInfo.sfn; - ulDciReq->slot = ulDciReqTimingInfo.slot; - if(currDlSlot->dlInfo.ulGrant != NULLP) - { + LWR_MAC_ALLOC(ulDciElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_dci_req_t))); + if(ulDciElem) + { + FILL_FAPI_LIST_ELEM(ulDciElem, NULLP, FAPI_UL_DCI_REQUEST, 1, \ + sizeof(fapi_ul_dci_req_t)); + ulDciReq = (fapi_ul_dci_req_t *)(ulDciElem +1); + memset(ulDciReq, 0, sizeof(fapi_ul_dci_req_t)); + fillMsgHeader(&ulDciReq->header, FAPI_UL_DCI_REQUEST, sizeof(fapi_ul_dci_req_t)); + + ulDciReq->sfn = ulDciReqTimingInfo.sfn; + ulDciReq->slot = ulDciReqTimingInfo.slot; + if(currDlSlot->dlInfo.ulGrant != NULLP) + { vendorUlDciReq->sym = 0; ulDciReq->numPdus = 1; // No. of PDCCH PDUs vendorUlDciReq->num_pdus = ulDciReq->numPdus; @@ -4878,24 +6661,174 @@ uint16_t fillUlDciReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t pre /* Fill PDCCH configuration Pdu */ fillUlDciPdcchPdu(&ulDciReq->pdus[numPduEncoded], &vendorUlDciReq->pdus[numPduEncoded], &currDlSlot->dlInfo, CORESET_TYPE1); numPduEncoded++; - /* free UL GRANT at SCH */ - MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo)); + /* free UL GRANT at SCH */ + MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo)); } #ifdef ODU_SLOT_IND_DEBUG_LOG - DU_LOG("\nDEBUG --> LWR_MAC: Sending UL DCI Request"); + DU_LOG("\nDEBUG --> LWR_MAC: Sending UL DCI Request"); #endif - } - prevElem->p_next = ulDciElem; + } + prevElem->p_next = ulDciElem; + } + } + else + { + lwr_mac_procInvalidEvt(&currTimingInfo); + } +#else + uint8_t cellIdx =0; + uint8_t numPdus =0; + uint8_t numPduEncoded = 0; + uint32_t msgLen=0; + + SlotTimingInfo ulDciReqTimingInfo ={0}; + MacDlSlot *currDlSlot = NULLP; + fapi_ul_dci_req_t *ulDciReq =NULLP; + p_fapi_api_queue_elem_t ulDciElem; + + if(lwrMacCb.phyState == PHY_STATE_RUNNING) + { + GET_CELL_IDX(currTimingInfo.cellId, cellIdx); + memcpy(&ulDciReqTimingInfo, &currTimingInfo, sizeof(SlotTimingInfo)); + currDlSlot = &macCb.macCell[cellIdx]->dlSlot[ulDciReqTimingInfo.slot % macCb.macCell[cellIdx]->numOfSlots]; + + if(currDlSlot->dlInfo.ulGrant != NULLP) + { + numPdus = 1; + } + else + { + return ROK; + } + + /* Below msg length is calculated based on the parameter present in fapi_ul_dci_req_t structure + * the prameters of fapi_ul_dci_req_t structure are -> + * header = sizeof(fapi_msg_t) ,sfn, slot = 2*sizeof(uint16_t), + * numPdus = sizeof(uint8_t) and total number of fapi_dci_pdu_t supproted = numPdus*sizeof(fapi_dci_pdu_t)*/ + + msgLen = sizeof(fapi_msg_t) + (2*sizeof(uint16_t)) + sizeof(uint8_t) + (numPdus*sizeof(fapi_dci_pdu_t)); + + LWR_MAC_ALLOC(ulDciElem, (sizeof(fapi_api_queue_elem_t) + msgLen)); + if(ulDciElem) + { + FILL_FAPI_LIST_ELEM(ulDciElem, NULLP, FAPI_UL_DCI_REQUEST, 1, msgLen); + + ulDciReq = (fapi_ul_dci_req_t *)(ulDciElem +1); + memset(ulDciReq, 0, msgLen); + fillMsgHeader(&ulDciReq->header, FAPI_UL_DCI_REQUEST, msgLen); + + ulDciReq->sfn = reverseBytes16(ulDciReqTimingInfo.sfn); + ulDciReq->slot = reverseBytes16(ulDciReqTimingInfo.slot); + if(currDlSlot->dlInfo.ulGrant != NULLP) + { + ulDciReq->numPdus = 1; // No. of PDCCH PDUs + if(ulDciReq->numPdus > 0) + { + /* Fill PDCCH configuration Pdu */ + fillUlDciPdcchPdu(&ulDciReq->pdus[numPduEncoded], NULLP, &currDlSlot->dlInfo, CORESET_TYPE1); + numPduEncoded++; + /* free UL GRANT at SCH */ + MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo)); + } +#ifdef ODU_SLOT_IND_DEBUG_LOG + DU_LOG("\nDEBUG --> LWR_MAC: Sending UL DCI Request"); +#endif + } + prevElem->p_next = ulDciElem; } } else { - lwr_mac_procInvalidEvt(&currTimingInfo); + lwr_mac_procInvalidEvt(&currTimingInfo); } + +#endif #endif return ROK; } +#ifdef OAI_TESTING +uint8_t processTtiReq(SlotTimingInfo currTimingInfo) +{ + uint8_t step = 0; + uint16_t cellIdx=0; + MacDlSlot *currDlSlot = NULLP; + SlotTimingInfo dlTtiReqTimingInfo; + fapi_msg_header_t *msgHeader = NULLP; + p_fapi_api_queue_elem_t headerElem, current; + + LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t))); + if(!headerElem) + { + DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for header in DL TTI req"); + return RFAILED; + } + FILL_FAPI_LIST_ELEM(headerElem, NULL, FAPI_VENDOR_MSG_HEADER_IND, 1, sizeof(fapi_msg_header_t)); + + msgHeader = (fapi_msg_header_t *)(headerElem + 1); + msgHeader->num_msg = 1; + msgHeader->handle = 0; + + GET_CELL_IDX(currTimingInfo.cellId, cellIdx); + ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,gConfigInfo.gPhyDeltaDl, macCb.macCell[cellIdx]->numOfSlots); + dlTtiReqTimingInfo.cellId = currTimingInfo.cellId; + currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot]; + + current=headerElem; + while (current != NULL) + { + switch (step) + { + case 0: + { + fillDlTtiReq(currTimingInfo, current); + break; + } + case 1: + { + fillUlTtiReq(currTimingInfo, current, NULLP); + break; + } + + case 2: + { + fillUlDciReq(dlTtiReqTimingInfo, current, NULLP); + break; + } + + case 3: + { + sendTxDataReq(dlTtiReqTimingInfo, currDlSlot, current, NULLP); + break; + } + + default: + current->p_next = NULLP; + break; + } + if(current->p_next) + { + msgHeader->num_msg++; + current = current->p_next; + } + if(step == 4) + break; + step++; + } + + if(msgHeader->num_msg == 1) + { + LWR_MAC_FREE(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t))); + } + else + { + LwrMacSendToL1(headerElem); + memset(currDlSlot, 0, sizeof(MacDlSlot)); + } + return ROK; +} +#endif + lwrMacFsmHdlr fapiEvtHdlr[MAX_STATE][MAX_EVENT] = { { diff --git a/src/5gnrmac/lwr_mac_fsm.h b/src/5gnrmac/lwr_mac_fsm.h index 067a3cd7a..03572c1b1 100644 --- a/src/5gnrmac/lwr_mac_fsm.h +++ b/src/5gnrmac/lwr_mac_fsm.h @@ -19,6 +19,8 @@ #ifndef _LWR_MAC_FSM_H_ #define _LWR_MAC_FSM_H_ +#include "fapi_vendor_extension.h" + #define FAPI_UINT_8 1 #define FAPI_UINT_16 2 #define FAPI_UINT_32 4 @@ -69,10 +71,14 @@ uint8_t lwr_mac_procConfigRspEvt(void *msg); uint8_t lwr_mac_procStartReqEvt(void *msg); void sendToLowerMac(uint16_t, uint32_t, void *); void procPhyMessages(uint16_t msgType, uint32_t msgSize, void *msg); -uint16_t fillDlTtiReq(SlotTimingInfo currTimingInfo); typedef uint8_t (*lwrMacFsmHdlr)(void *); void lwrMacLayerInit(Region region, Pool pool); - +uint16_t fillDlTtiReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElemt); +#ifdef OAI_TESTING +uint16_t reverseBytes16(uint16_t num); +uint32_t reverseBytes32(uint32_t num); +uint8_t processTtiReq(SlotTimingInfo currTimingInfo); +#endif #endif /********************************************************************** diff --git a/src/5gnrmac/lwr_mac_handle_phy.c b/src/5gnrmac/lwr_mac_handle_phy.c index 5c22704f5..36cadb4c3 100644 --- a/src/5gnrmac/lwr_mac_handle_phy.c +++ b/src/5gnrmac/lwr_mac_handle_phy.c @@ -112,8 +112,13 @@ uint8_t procSlotInd(fapi_slot_ind_t *fapiSlotInd) if(slotInd) { slotInd->cellId = lwrMacCb.cellCb[0].cellId; +#ifndef OAI_TESTING slotInd->sfn = fapiSlotInd->sfn; slotInd->slot = fapiSlotInd->slot; +#else + slotInd->sfn = reverseBytes16(fapiSlotInd->sfn); + slotInd->slot = reverseBytes16(fapiSlotInd->slot); +#endif FILL_PST_LWR_MAC_TO_MAC(pst, EVENT_SLOT_IND_TO_MAC); pst.selector = ODU_SELECTOR_LWLC; ret = (*sendSlotIndOpts[pst.selector])(&pst, slotInd); @@ -200,23 +205,37 @@ uint8_t procRachInd(fapi_rach_indication_t *fapiRachInd) return RFAILED; } rachInd->cellId = lwrMacCb.cellCb[0].cellId; +#ifndef OAI_TESTING rachInd->timingInfo.sfn = fapiRachInd->sfn; rachInd->timingInfo.slot = fapiRachInd->slot; +#else + rachInd->timingInfo.sfn = reverseBytes16(fapiRachInd->sfn); + rachInd->timingInfo.slot = reverseBytes16(fapiRachInd->slot); +#endif rachInd->numPdu = fapiRachInd->numPdus; for(pduIdx=0; pduIdx < rachInd->numPdu; pduIdx++) { rachPdu = &rachInd->rachPdu[pduIdx]; +#ifndef OAI_TESTING rachPdu->pci = fapiRachInd->rachPdu[pduIdx].phyCellId; +#else + rachPdu->pci = reverseBytes16(fapiRachInd->rachPdu[pduIdx].phyCellId); +#endif rachPdu->symbolIdx = fapiRachInd->rachPdu[pduIdx].symbolIndex; rachPdu->slotIdx = fapiRachInd->rachPdu[pduIdx].slotIndex; rachPdu->freqIdx = fapiRachInd->rachPdu[pduIdx].freqIndex; - rachPdu->numPream = fapiRachInd->rachPdu[pduIdx].numPreamble; + rachPdu->numPream = fapiRachInd->rachPdu[pduIdx].numPreamble; for(prmbleIdx=0; prmbleIdxnumPream; prmbleIdx++) { rachPdu->preamInfo[prmbleIdx].preamIdx = \ fapiRachInd->rachPdu[pduIdx].preambleInfo[prmbleIdx].preambleIndex; +#ifndef OAI_TESTING rachPdu->preamInfo[prmbleIdx].timingAdv = \ fapiRachInd->rachPdu[pduIdx].preambleInfo[prmbleIdx].timingAdvance; +#else + rachPdu->preamInfo[prmbleIdx].timingAdv = \ + reverseBytes16(fapiRachInd->rachPdu[pduIdx].preambleInfo[prmbleIdx].timingAdvance); +#endif } } @@ -263,26 +282,43 @@ uint8_t procCrcInd(fapi_crc_ind_t *fapiCrcInd) } crcInd->cellId = lwrMacCb.cellCb[0].cellId; +#ifndef OAI_TESTING crcInd->timingInfo.sfn = fapiCrcInd->sfn; crcInd->timingInfo.slot = fapiCrcInd->slot; crcInd->numCrc = fapiCrcInd->numCrcs; +#else + crcInd->timingInfo.sfn = reverseBytes16(fapiCrcInd->sfn); + crcInd->timingInfo.slot = reverseBytes16(fapiCrcInd->slot); + crcInd->numCrc = reverseBytes16(fapiCrcInd->numCrcs); +#endif for(crcInfoIdx = 0; crcInfoIdx < crcInd->numCrc; crcInfoIdx++) { crcIndInfo = &crcInd->crcInfo[crcInfoIdx]; +#ifndef OAI_TESTING crcIndInfo->handle = fapiCrcInd->crc[crcInfoIdx].handle; crcIndInfo->rnti = fapiCrcInd->crc[crcInfoIdx].rnti; + crcIndInfo->numCb = fapiCrcInd->crc[crcInfoIdx].numCb; +#else + crcIndInfo->handle = reverseBytes32(fapiCrcInd->crc[crcInfoIdx].handle); + crcIndInfo->rnti = reverseBytes16(fapiCrcInd->crc[crcInfoIdx].rnti); + crcIndInfo->numCb = reverseBytes16(fapiCrcInd->crc[crcInfoIdx].numCb); +#endif crcIndInfo->harqId = fapiCrcInd->crc[crcInfoIdx].harqId; crcIndInfo->tbCrcStatus = fapiCrcInd->crc[crcInfoIdx].tbCrcStatus; - crcIndInfo->numCb = fapiCrcInd->crc[crcInfoIdx].numCb; - for(crcStatusIdx = 0; crcStatusIdx < crcIndInfo->numCb; crcStatusIdx++) + for(crcStatusIdx = 0; crcStatusIdx < 1; crcStatusIdx++) { crcIndInfo->cbCrcStatus[crcStatusIdx] = \ fapiCrcInd->crc[crcInfoIdx].cbCrcStatus[crcStatusIdx]; } crcIndInfo->ul_cqi = fapiCrcInd->crc[crcInfoIdx].ul_cqi; +#ifndef OAI_TESTING crcIndInfo->timingAdvance = fapiCrcInd->crc[crcInfoIdx].timingAdvance; crcIndInfo->rssi = fapiCrcInd->crc[crcInfoIdx].rssi; +#else + crcIndInfo->timingAdvance = reverseBytes16(fapiCrcInd->crc[crcInfoIdx].timingAdvance); + crcIndInfo->rssi = reverseBytes16(fapiCrcInd->crc[crcInfoIdx].rssi); +#endif } /* Fill post and sent to MAC */ @@ -327,20 +363,33 @@ uint8_t procRxDataInd(fapi_rx_data_indication_t *fapiRxDataInd) } rxDataInd->cellId = lwrMacCb.cellCb[0].cellId; +#ifndef OAI_TESTING rxDataInd->timingInfo.sfn = fapiRxDataInd->sfn; rxDataInd->timingInfo.slot = fapiRxDataInd->slot; rxDataInd->numPdus = fapiRxDataInd->numPdus; - +#else + rxDataInd->timingInfo.sfn = reverseBytes16(fapiRxDataInd->sfn); + rxDataInd->timingInfo.slot = reverseBytes16(fapiRxDataInd->slot); + rxDataInd->numPdus = reverseBytes16(fapiRxDataInd->numPdus); +#endif for(pduIdx = 0; pduIdx < rxDataInd->numPdus; pduIdx++) { pdu = &rxDataInd->pdus[pduIdx]; +#ifndef OAI_TESTING pdu->handle = fapiRxDataInd->pdus[pduIdx].handle; pdu->rnti = fapiRxDataInd->pdus[pduIdx].rnti; - pdu->harqId = fapiRxDataInd->pdus[pduIdx].harqId; pdu->pduLength = fapiRxDataInd->pdus[pduIdx].pdu_length; - pdu->ul_cqi = fapiRxDataInd->pdus[pduIdx].ul_cqi; pdu->timingAdvance = fapiRxDataInd->pdus[pduIdx].timingAdvance; pdu->rssi = fapiRxDataInd->pdus[pduIdx].rssi; +#else + pdu->handle = reverseBytes32(fapiRxDataInd->pdus[pduIdx].handle); + pdu->rnti = reverseBytes16(fapiRxDataInd->pdus[pduIdx].rnti); + pdu->pduLength = reverseBytes32(fapiRxDataInd->pdus[pduIdx].pdu_length); + pdu->timingAdvance = reverseBytes16(fapiRxDataInd->pdus[pduIdx].timingAdvance); + pdu->rssi = reverseBytes16(fapiRxDataInd->pdus[pduIdx].rssi); +#endif + pdu->harqId = fapiRxDataInd->pdus[pduIdx].harqId; + pdu->ul_cqi = fapiRxDataInd->pdus[pduIdx].ul_cqi; MAC_ALLOC_SHRABL_BUF(pdu->pduData, pdu->pduLength); memcpy(pdu->pduData, fapiRxDataInd->pdus[pduIdx].pduData, pdu->pduLength); @@ -377,14 +426,21 @@ uint8_t fillUciIndPucchF0F1(UciPucchF0F1 *pduInfo, fapi_uci_o_pucch_f0f1_t *fapi uint8_t harqIdx; uint8_t ret = ROK; - + +#ifndef OAI_TESTING pduInfo->handle = fapiPduInfo->handle; - pduInfo->pduBitmap = fapiPduInfo->pduBitmap; - pduInfo->pucchFormat = fapiPduInfo->pucchFormat; - pduInfo->ul_cqi = fapiPduInfo->ul_cqi; pduInfo->crnti = fapiPduInfo->rnti; pduInfo->timingAdvance = fapiPduInfo->timingAdvance; pduInfo->rssi = fapiPduInfo->rssi; +#else + pduInfo->handle = reverseBytes32(fapiPduInfo->handle); + pduInfo->crnti = reverseBytes16(fapiPduInfo->rnti); + pduInfo->timingAdvance = reverseBytes16(fapiPduInfo->timingAdvance); + pduInfo->rssi = reverseBytes16(fapiPduInfo->rssi); +#endif + pduInfo->pduBitmap = fapiPduInfo->pduBitmap; + pduInfo->pucchFormat = fapiPduInfo->pucchFormat; + pduInfo->ul_cqi = fapiPduInfo->ul_cqi; if(fapiPduInfo->srInfo.srIndication) { pduInfo->srInfo.srIndPres = fapiPduInfo->srInfo.srIndication; @@ -436,13 +492,24 @@ uint8_t procUciInd(fapi_uci_indication_t *fapiUciInd) DU_LOG("\nDEBUG --> LWR_MAC: Processing UCI Indication"); memset(macUciInd, 0, sizeof(UciInd)); macUciInd->cellId = lwrMacCb.cellCb[0].cellId; +#ifndef OAI_TESTING macUciInd->slotInd.sfn = fapiUciInd->sfn; macUciInd->slotInd.slot = fapiUciInd->slot; macUciInd->numUcis = fapiUciInd->numUcis; - +#else + macUciInd->slotInd.sfn = reverseBytes16(fapiUciInd->sfn); + macUciInd->slotInd.slot = reverseBytes16(fapiUciInd->slot); + macUciInd->numUcis = reverseBytes16(fapiUciInd->numUcis); +#endif for(pduIdx = 0; pduIdx < macUciInd->numUcis; pduIdx++) { +#ifndef OAI_TESTING macUciInd->pdus[pduIdx].pduType = fapiUciInd->uciPdu[pduIdx].pduType; + macUciInd->pdus[pduIdx].pduSize = fapiUciInd->uciPdu[pduIdx].pduSize; +#else + macUciInd->pdus[pduIdx].pduType = reverseBytes16(fapiUciInd->uciPdu[pduIdx].pduType); + macUciInd->pdus[pduIdx].pduSize = reverseBytes16(fapiUciInd->uciPdu[pduIdx].pduSize); +#endif switch(macUciInd->pdus[pduIdx].pduType) { case UCI_IND_PUSCH: @@ -450,7 +517,6 @@ uint8_t procUciInd(fapi_uci_indication_t *fapiUciInd) case UCI_IND_PUCCH_F0F1: { UciPucchF0F1 *pduInfo = NULLP; - macUciInd->pdus[pduIdx].pduSize = fapiUciInd->uciPdu[pduIdx].pduSize; pduInfo = &macUciInd->pdus[pduIdx].uci.uciPucchF0F1; ret = fillUciIndPucchF0F1(pduInfo, &fapiUciInd->uciPdu[pduIdx].uci.uciPucchF0F1); } @@ -558,6 +624,10 @@ void procPhyMessages(uint16_t msgType, uint32_t msgSize, void *msg) fapi_msg_t *header = NULLP; header = (fapi_msg_t *)msg; +#ifdef OAI_TESTING + header->msg_id = reverseBytes16(header->msg_id); + header->length = reverseBytes32(header->length); +#endif #ifdef CALL_FLOW_DEBUG_LOG callFlowFromPhyToLwrMac(header->msg_id); #endif diff --git a/src/5gnrmac/lwr_mac_util.c b/src/5gnrmac/lwr_mac_util.c index 08ab8ac93..98fcd151f 100644 --- a/src/5gnrmac/lwr_mac_util.c +++ b/src/5gnrmac/lwr_mac_util.c @@ -106,12 +106,14 @@ uint32_t reverseBits(uint32_t num, uint8_t numBits) void fillDlDciPayload(uint8_t *buf, uint8_t *bytePos, uint8_t *bitPos,\ uint32_t val, uint8_t valSize) { - uint8_t temp; uint8_t bytePart1; uint32_t bytePart2; uint8_t bytePart1Size; uint8_t bytePart2Size; + +#ifndef OAI_TESTING + uint8_t temp; if(*bitPos + valSize <= 8) { bytePart1 = (uint8_t)val; @@ -133,6 +135,29 @@ void fillDlDciPayload(uint8_t *buf, uint8_t *bytePos, uint8_t *bitPos,\ *bitPos = 0; fillDlDciPayload(buf, bytePos, bitPos, bytePart2, bytePart2Size); } +#else + if(*bitPos + valSize <= 8) + { + bytePart1 = (uint8_t)val; + bytePart1 = ((~((~0) << valSize)) & bytePart1)<< (8 - (*bitPos + valSize)); + buf[*bytePos] |= bytePart1; + *bitPos += valSize; + } + else if(*bitPos + valSize > 8) + { + bytePart1Size = 8 - *bitPos; + bytePart2Size = valSize - bytePart1Size; + + bytePart1 = val >> bytePart2Size; + + buf[*bytePos] |= bytePart1; + (*bytePos)--; + *bitPos = 0; + fillDlDciPayload(buf, bytePos, bitPos, val, bytePart2Size); + } + +#endif + } /* diff --git a/src/5gnrmac/lwr_mac_utils.h b/src/5gnrmac/lwr_mac_utils.h index b56c8c5e3..d583a1b4a 100644 --- a/src/5gnrmac/lwr_mac_utils.h +++ b/src/5gnrmac/lwr_mac_utils.h @@ -64,7 +64,6 @@ void convertFreqDomRsrcMapToIAPIFormat(uint8_t *sourceBitMap, uint8_t *destBitMa #ifdef NR_TDD uint8_t calcNumSlotsInCurrPeriodicity(DlUlTxPeriodicity tddPeriod, uint8_t numerology); #endif - /********************************************************************** End of file **********************************************************************/ diff --git a/src/5gnrmac/mac_msg_hdl.c b/src/5gnrmac/mac_msg_hdl.c index 7f2cf450a..9c9d5f45f 100644 --- a/src/5gnrmac/mac_msg_hdl.c +++ b/src/5gnrmac/mac_msg_hdl.c @@ -25,9 +25,15 @@ #include "rlc_mac_inf.h" #include "mac_upr_inf_api.h" #include "lwr_mac.h" + #ifdef INTEL_FAPI -#include "fapi_interface.h" +#ifdef OAI_TESTING + #include "fapi_interface_oai.h" +#else + #include "fapi_interface.h" +#endif #endif + #include "lwr_mac_fsm.h" #include "lwr_mac_upr_inf.h" #include "mac.h" diff --git a/src/5gnrmac/mac_slot_ind.c b/src/5gnrmac/mac_slot_ind.c index 16b3a9307..679d0718b 100644 --- a/src/5gnrmac/mac_slot_ind.c +++ b/src/5gnrmac/mac_slot_ind.c @@ -501,7 +501,11 @@ uint8_t macProcSlotInd(SlotTimingInfo slotInd) buildAndSendMuxPdu(slotInd); /* Trigger for DL TTI REQ */ - fillDlTtiReq(slotInd); +#ifndef OAI_TESTING + fillDlTtiReq(slotInd, NULLP); +#else + processTtiReq(slotInd); +#endif return ROK; } /* macProcSlotInd */ diff --git a/src/5gnrsch/sch.c b/src/5gnrsch/sch.c index 191aa0f9c..f95d1fe95 100644 --- a/src/5gnrsch/sch.c +++ b/src/5gnrsch/sch.c @@ -622,13 +622,19 @@ uint8_t fillSchSib1Cfg(uint8_t mu, uint8_t bandwidth, uint8_t numSlots,SchPdcchC uint8_t numSymbols = 0; uint8_t offset = 0; uint8_t oValue = 0; + uint8_t mcs = 0; //uint8_t numSearchSpacePerSlot = 0; uint8_t mValue = 0; uint8_t firstSymbol = 0; /* need to calculate using formula mentioned in 38.213 */ uint8_t slotIndex = 0; uint8_t freqDomainResource[FREQ_DOM_RSRC_SIZE] = {0}; uint16_t tbSize = 0; + uint16_t targetCodeRate = 0; + uint8_t qam = 0; uint8_t ssbIdx = 0; +#ifdef OAI_TESTING + uint8_t freqIdx = 0; +#endif PdcchCfg *pdcch; PdschCfg *pdsch; BwpCfg *bwp; @@ -659,6 +665,7 @@ uint8_t fillSchSib1Cfg(uint8_t mu, uint8_t bandwidth, uint8_t numSlots,SchPdcchC slotIndex = (int)((oValue*pow(2, mu)) + floor(ssbIdx*mValue))%numSlots; sib1SchCfg->n0 = slotIndex; +#ifndef OAI_TESTING /* fill BWP */ switch(bandwidth) { @@ -677,7 +684,11 @@ uint8_t fillSchSib1Cfg(uint8_t mu, uint8_t bandwidth, uint8_t numSlots,SchPdcchC } bwp->freqAlloc.startPrb = 0; - bwp->subcarrierSpacing = 0; /* 15Khz */ +#else + bwp->freqAlloc.numPrb = numRbs; + bwp->freqAlloc.startPrb = ((offsetPointA >> mu) - offset); +#endif + bwp->subcarrierSpacing = mu; /* 15Khz */ bwp->cyclicPrefix = 0; /* normal */ /* fill the PDCCH PDU */ @@ -686,7 +697,15 @@ uint8_t fillSchSib1Cfg(uint8_t mu, uint8_t bandwidth, uint8_t numSlots,SchPdcchC pdcch->coresetCfg.durationSymbols = numSymbols; /* Fill Bitmap for PRBs in coreset */ +#ifndef OAI_TESTING fillCoresetFeqDomAllocMap(((offsetPointA-offset)/6), (numRbs/6), freqDomainResource); +#else + freqDomainResource[0] = (numRbs < 48) ? 0xf0 : 0xff; + for(freqIdx = 1; freqIdx < FREQ_DOM_RSRC_SIZE; freqIdx++) + { + freqDomainResource[freqIdx] = (numRbs < (48 * (freqIdx + 1))) ? 0x00 : 0xff; + } +#endif memcpy(pdcch->coresetCfg.freqDomainResource, freqDomainResource, FREQ_DOM_RSRC_SIZE); pdcch->coresetCfg.cceRegMappingType = 1; /* coreset0 is always interleaved */ @@ -701,13 +720,20 @@ uint8_t fillSchSib1Cfg(uint8_t mu, uint8_t bandwidth, uint8_t numSlots,SchPdcchC pdcch->dci[0].scramblingRnti = 0; pdcch->dci[0].cceIndex = 0; pdcch->dci[0].aggregLevel = 4; +#ifndef OAI_TESTING pdcch->dci[0].beamPdcchInfo.numPrgs = 1; pdcch->dci[0].beamPdcchInfo.prgSize = 1; pdcch->dci[0].beamPdcchInfo.digBfInterfaces = 0; + pdcch->dci[0].txPdcchPower.powerControlOffsetSS = 0; +#else + pdcch->dci[0].beamPdcchInfo.numPrgs = 0; + pdcch->dci[0].beamPdcchInfo.prgSize = 0; + pdcch->dci[0].beamPdcchInfo.digBfInterfaces = 1; + pdcch->dci[0].txPdcchPower.powerControlOffsetSS = 1; +#endif pdcch->dci[0].beamPdcchInfo.prg[0].pmIdx = 0; pdcch->dci[0].beamPdcchInfo.prg[0].beamIdx[0] = 0; pdcch->dci[0].txPdcchPower.beta_pdcch_1_0= 0; - pdcch->dci[0].txPdcchPower.powerControlOffsetSS = 0; /* Storing pdschCfg pointer here. Required to access pdsch config while fillig up pdcch pdu */ pdsch = &pdcch->dci[0].pdschCfg; @@ -718,25 +744,52 @@ uint8_t fillSchSib1Cfg(uint8_t mu, uint8_t bandwidth, uint8_t numSlots,SchPdcchC pdsch->rnti = 0xFFFF; /* SI-RNTI */ pdsch->pduIndex = 0; pdsch->numCodewords = 1; + pdsch->pdschFreqAlloc.startPrb = 0; for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++) { - pdsch->codeword[cwCount].targetCodeRate = 308; - pdsch->codeword[cwCount].qamModOrder = 2; - pdsch->codeword[cwCount].mcsIndex = DEFAULT_MCS; + mcs = DEFAULT_MCS; + pdsch->pdschFreqAlloc.numPrb = 0; + qam = 0; + targetCodeRate = 0; + do + { + if(pdsch->pdschFreqAlloc.numPrb < bwp->freqAlloc.numPrb) + { + pdsch->pdschFreqAlloc.numPrb++; + } + else + { + if(mcs < 10) + { + mcs++; + } + else + break; + } + tbSize = (schCalcTbSizeFromNPrb(pdsch->pdschFreqAlloc.numPrb, mcs, 10, &targetCodeRate, &qam) >> 3); + }while(sib1PduLen > tbSize); + + pdsch->codeword[cwCount].targetCodeRate = targetCodeRate; + pdsch->codeword[cwCount].qamModOrder = qam; + pdsch->codeword[cwCount].mcsIndex = mcs; pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */ pdsch->codeword[cwCount].rvIndex = 0; - tbSize = schCalcTbSize(sib1PduLen + TX_PAYLOAD_HDR_LEN); pdsch->codeword[cwCount].tbSize = tbSize; } pdsch->dataScramblingId = pci; pdsch->numLayers = 1; pdsch->transmissionScheme = 0; +#ifndef OAI_TESTING pdsch->refPoint = 0; + pdsch->dmrs.numDmrsCdmGrpsNoData = 1; +#else + pdsch->refPoint = 1; + pdsch->dmrs.numDmrsCdmGrpsNoData = 2; +#endif pdsch->dmrs.dlDmrsSymbPos = DL_DMRS_SYMBOL_POS; pdsch->dmrs.dmrsConfigType = 0; /* type-1 */ pdsch->dmrs.dlDmrsScramblingId = pci; pdsch->dmrs.scid = 0; - pdsch->dmrs.numDmrsCdmGrpsNoData = 1; pdsch->dmrs.dmrsPorts = 0x0001; pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Type-A */ pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS; @@ -744,16 +797,25 @@ uint8_t fillSchSib1Cfg(uint8_t mu, uint8_t bandwidth, uint8_t numSlots,SchPdcchC pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */ /* the RB numbering starts from coreset0, and PDSCH is always above SSB */ +#ifndef OAI_TESTING pdsch->pdschFreqAlloc.startPrb = offsetPointA + SCH_SSB_NUM_PRB; pdsch->pdschFreqAlloc.numPrb = schCalcNumPrb(tbSize, DEFAULT_MCS, NUM_PDSCH_SYMBOL); +#endif pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */ pdsch->pdschTimeAlloc.rowIndex = 1; /* This is Intel's requirement. PDSCH should start after PDSCH DRMS symbol */ - pdsch->pdschTimeAlloc.startSymb = 3; /* spec-38.214, Table 5.1.2.1-1 */ pdsch->pdschTimeAlloc.numSymb = NUM_PDSCH_SYMBOL; +#ifndef OAI_TESTING + pdsch->pdschTimeAlloc.startSymb = 3; /* spec-38.214, Table 5.1.2.1-1 */ pdsch->beamPdschInfo.numPrgs = 1; pdsch->beamPdschInfo.prgSize = 1; pdsch->beamPdschInfo.digBfInterfaces = 0; +#else + pdsch->pdschTimeAlloc.startSymb = 2; /* spec-38.214, Table 5.1.2.1-1 */ + pdsch->beamPdschInfo.numPrgs = 0; + pdsch->beamPdschInfo.prgSize = 0; + pdsch->beamPdschInfo.digBfInterfaces = 1; +#endif pdsch->beamPdschInfo.prg[0].pmIdx = 0; pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0; pdsch->txPdschPower.powerControlOffset = 0; @@ -1351,67 +1413,94 @@ uint8_t allocatePrbDl(SchCellCb *cell, SlotTimingInfo slotTime, \ if(ssbOccasion && sib1Occasion) { - broadcastPrbStart = cell->cellCfg.dlCfgCommon.schFreqInfoDlSib.offsetToPointA; - broadcastPrbEnd = broadcastPrbStart + SCH_SSB_NUM_PRB + cell->sib1SchCfg.sib1PdcchCfg.dci[0].pdschCfg.pdschFreqAlloc.numPrb -1; - } - else if(ssbOccasion) - { - broadcastPrbStart = cell->cellCfg.dlCfgCommon.schFreqInfoDlSib.offsetToPointA; - broadcastPrbEnd = broadcastPrbStart + SCH_SSB_NUM_PRB -1; - } - else if(sib1Occasion) - { - broadcastPrbStart = cell->sib1SchCfg.sib1PdcchCfg.dci[0].pdschCfg.pdschFreqAlloc.startPrb; - broadcastPrbEnd = broadcastPrbStart + cell->sib1SchCfg.sib1PdcchCfg.dci[0].pdschCfg.pdschFreqAlloc.numPrb -1; + /* Iterate through all free PRB blocks */ + freePrbNode = prbAlloc->freePrbBlockList.first; + while(freePrbNode) + { + /* TODO: Check again;because a very rigid condition has been applied that + * freeBlock will be only between SSB and SIB1 when both ocassions are present and + * SIB1 is present on the lower end of PRB range and SSB on the uppermost end of the PRB range. + * This has to be made flexible.*/ + freePrbBlock = (FreePrbBlock *)freePrbNode->node; + + broadcastPrbEnd = cell->sib1SchCfg.sib1PdcchCfg.dci[0].pdschCfg.pdschFreqAlloc.startPrb + \ + cell->sib1SchCfg.sib1PdcchCfg.dci[0].pdschCfg.pdschFreqAlloc.numPrb - 1; + broadcastPrbStart = cell->cellCfg.dlCfgCommon.schFreqInfoDlSib.offsetToPointA + ceil (cell->cellCfg.ssbSubcOffset/12); + + if((freePrbBlock->startPrb <= broadcastPrbStart) && (freePrbBlock->endPrb >= broadcastPrbStart) &&\ + (freePrbBlock->startPrb <= broadcastPrbEnd) && (freePrbBlock->endPrb >= broadcastPrbEnd)) + { + if (freePrbBlock->numFreePrb >= numPrb) + { + *startPrb = freePrbBlock->endPrb - numPrb +1; + } + break; + } + freePrbNode = freePrbNode->next; + continue; + } } - - /* Iterate through all free PRB blocks */ - freePrbNode = prbAlloc->freePrbBlockList.first; - while(freePrbNode) + else { - freePrbBlock = (FreePrbBlock *)freePrbNode->node; + if(ssbOccasion) + { + broadcastPrbStart = cell->cellCfg.dlCfgCommon.schFreqInfoDlSib.offsetToPointA; + broadcastPrbEnd = broadcastPrbStart + SCH_SSB_NUM_PRB -1; + } + else if(sib1Occasion) + { + broadcastPrbStart = cell->sib1SchCfg.sib1PdcchCfg.dci[0].pdschCfg.pdschFreqAlloc.startPrb; + broadcastPrbEnd = broadcastPrbStart + cell->sib1SchCfg.sib1PdcchCfg.dci[0].pdschCfg.pdschFreqAlloc.numPrb -1; + } - /* If broadcast message is scheduled in this slot, then check if its PRBs belong to the current free block. - * Since SSB/SIB1 PRB location is fixed, these PRBs cannot be allocated to other message in same slot */ - if((ssbOccasion || sib1Occasion) && - ((broadcastPrbStart >= freePrbBlock->startPrb) && (broadcastPrbStart <= freePrbBlock->endPrb)) && \ - ((broadcastPrbEnd >= freePrbBlock->startPrb) && (broadcastPrbEnd <= freePrbBlock->endPrb))) + /* Iterate through all free PRB blocks */ + freePrbNode = prbAlloc->freePrbBlockList.first; + while(freePrbNode) { - /* Implmentation is done such that highest-numbered free-RB is allocated first */ - if((freePrbBlock->endPrb > broadcastPrbEnd) && ((freePrbBlock->endPrb - broadcastPrbEnd) >= numPrb)) - { - /* If sufficient free PRBs are available above bradcast message then, - * endPrb = freePrbBlock->endPrb - * startPrb = endPrb - numPrb +1; - */ - *startPrb = freePrbBlock->endPrb - numPrb +1; - break; - } - else if((broadcastPrbStart > freePrbBlock->startPrb) && ((broadcastPrbStart - freePrbBlock->startPrb) >= numPrb)) + freePrbBlock = (FreePrbBlock *)freePrbNode->node; + + /* If broadcast message is scheduled in this slot, then check if its PRBs belong to the current free block. + * Since SSB/SIB1 PRB location is fixed, these PRBs cannot be allocated to other message in same slot */ + if((ssbOccasion || sib1Occasion) && + ((broadcastPrbStart >= freePrbBlock->startPrb) && (broadcastPrbStart <= freePrbBlock->endPrb)) && \ + ((broadcastPrbEnd >= freePrbBlock->startPrb) && (broadcastPrbEnd <= freePrbBlock->endPrb))) { - /* If free PRBs are available below broadcast message then, - * endPrb = broadcastPrbStart - 1 - * startPrb = endPrb - numPrb +1 - */ - *startPrb = broadcastPrbStart - numPrb; - break; + /* Implmentation is done such that highest-numbered free-RB is allocated first */ + if((freePrbBlock->endPrb > broadcastPrbEnd) && ((freePrbBlock->endPrb - broadcastPrbEnd) >= numPrb)) + { + /* If sufficient free PRBs are available above bradcast message then, + * endPrb = freePrbBlock->endPrb + * startPrb = endPrb - numPrb +1; + */ + *startPrb = freePrbBlock->endPrb - numPrb +1; + break; + } + else if((broadcastPrbStart > freePrbBlock->startPrb) && ((broadcastPrbStart - freePrbBlock->startPrb) >= numPrb)) + { + /* If free PRBs are available below broadcast message then, + * endPrb = broadcastPrbStart - 1 + * startPrb = endPrb - numPrb +1 + */ + *startPrb = broadcastPrbStart - numPrb; + break; + } + else + { + freePrbNode = freePrbNode->next; + continue; + } } else { - freePrbNode = freePrbNode->next; - continue; - } - } - else - { - /* Check if requested number of blocks can be allocated from the current block */ - if (freePrbBlock->numFreePrb < numPrb) - { - freePrbNode = freePrbNode->next; - continue; + /* Check if requested number of blocks can be allocated from the current block */ + if (freePrbBlock->numFreePrb < numPrb) + { + freePrbNode = freePrbNode->next; + continue; + } + *startPrb = freePrbBlock->endPrb - numPrb +1; + break; } - *startPrb = freePrbBlock->endPrb - numPrb +1; - break; } } @@ -1440,7 +1529,7 @@ uint8_t allocatePrbDl(SchCellCb *cell, SlotTimingInfo slotTime, \ return RFAILED; } } - + /* Update statistics of PRB usage if stats calculation is enabled */ if(schCb[cell->instIdx].statistics.activeKpiList.dlTotPrbUseList.count) prbAlloc->numPrbAlloc += numPrb; diff --git a/src/5gnrsch/sch.h b/src/5gnrsch/sch.h index 6bbd14315..f9523867a 100644 --- a/src/5gnrsch/sch.h +++ b/src/5gnrsch/sch.h @@ -28,15 +28,30 @@ #define SCH_NUM_SC_PRB 12 /* number of SCs in a PRB */ #define SCH_MAX_SSB_BEAM 8 /* since we are supporting only SCS=15KHz and 30KHz */ #define SCH_SSB_NUM_SYMB 4 -#define SCH_SSB_NUM_PRB 21 /* One extra PRB as buffer */ + +#ifdef OAI_TESTING + #define SCH_SSB_NUM_PRB 20 /* One extra PRB as buffer */ +#else + #define SCH_SSB_NUM_PRB 21 /* One extra PRB as buffer */ +#endif + #define SCHED_DELTA 1 #define BO_DELTA 1 +#ifndef OAI_TESTING #define RAR_DELAY 2 +#else +#define RAR_DELAY 1 +#endif #define MSG4_DELAY 1 #define PDSCH_START_RB 10 /* Considering pdsch region from 3 to 13, DMRS exclued. * Overlapping of PDSCH DRMS and PDSCH not supported by Intel L1 */ -#define NUM_PDSCH_SYMBOL 11 +#ifdef OAI_TESTING + #define NUM_PDSCH_SYMBOL 10 +#else + #define NUM_PDSCH_SYMBOL 11 +#endif + #define PUSCH_START_RB 15 #define PUCCH_NUM_PRB_FORMAT_0_1_4 1 /* number of PRBs in freq domain, spec 38.213 - 9.2.1 */ #define SI_RNTI 0xFFFF diff --git a/src/5gnrsch/sch_common.c b/src/5gnrsch/sch_common.c index 532904076..b6ea4a3fd 100644 --- a/src/5gnrsch/sch_common.c +++ b/src/5gnrsch/sch_common.c @@ -78,7 +78,7 @@ uint8_t schBroadcastSsbAlloc(SchCellCb *cell, SlotTimingInfo slotTime, DlBrdcstA } schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot]; - ssbStartPrb = cell->cellCfg.ssbSubcOffset; //+Kssb + ssbStartPrb = cell->cellCfg.dlCfgCommon.schFreqInfoDlSib.offsetToPointA + ceil(cell->cellCfg.ssbSubcOffset/12); //+Kssb ssbStartSymb = cell->ssbStartSymbArr[dlBrdcstAlloc->ssbIdxSupported-1]; /*since we are supporting only 1 ssb beam */ /* Assign interface structure */ diff --git a/src/5gnrsch/sch_crc.c b/src/5gnrsch/sch_crc.c index a49096dac..7ebe6acd7 100644 --- a/src/5gnrsch/sch_crc.c +++ b/src/5gnrsch/sch_crc.c @@ -49,7 +49,7 @@ uint8_t SchProcCrcInd(Pst *pst, CrcIndInfo *crcInd) SchUlHqProcCb *hqP = NULLP; Inst schInst = pst->dstInst - SCH_INST_START; SchCellCb *cell = schCb[schInst].cells[schInst]; - + while(crcCnt < crcInd->numCrcInd) { GET_UE_ID(crcInd->crnti, ueId); diff --git a/src/5gnrsch/sch_rach.c b/src/5gnrsch/sch_rach.c index 683e924bd..4e1de3a2d 100644 --- a/src/5gnrsch/sch_rach.c +++ b/src/5gnrsch/sch_rach.c @@ -162,8 +162,16 @@ void schPrachResAlloc(SchCellCb *cell, UlSchedInfo *ulSchedInfo, SlotTimingInfo prachCfgIdx = cell->cellCfg.ulCfgCommon.schInitialUlBwp.schRachCfg.prachCfgGeneric.prachCfgIdx; prachFormat = prachCfgIdxTable[prachCfgIdx][0]; prachStartSymbol = prachCfgIdxTable[prachCfgIdx][4]; - prachOcas = prachCfgIdxTable[prachCfgIdx][6]; prachDuration = prachCfgIdxTable[prachCfgIdx][7]; + if(prachFormat>3) + { + prachOcas = prachCfgIdxTable[prachCfgIdx][6]; + } + else + { + /* Note - as per spec 38.211 sec 5.3.2, N(ra,slot) is fixed to 1 for L_RA = 839 (long seq format)*/ + prachOcas = 1; + } /* numRa determined as 𝑛 belonging {0,1,.., M − 1}, * where M is given by msg1Fdm */ @@ -448,7 +456,7 @@ SchPuschInfo* schAllocMsg3Pusch(Inst schInst, uint16_t crnti, uint8_t k2Index, S } cell->schUlSlotInfo[msg3SlotTime.slot]->puschPres = true; tbSize = 0; /* since nPrb has been incremented, recalculating tbSize */ - tbSize = schCalcTbSizeFromNPrb(numRb, mcs, NUM_PDSCH_SYMBOL); + tbSize = schCalcTbSizeFromNPrb(numRb, mcs, NUM_PDSCH_SYMBOL, NULLP, NULLP); tbSize = tbSize / 8 ; /*bits to byte conversion*/ schUlSlotInfo->schPuschInfo[ueId - 1]->harqProcId = msg3HqProc->procId; @@ -904,6 +912,9 @@ uint8_t schFillRar(SchCellCb *cell, SlotTimingInfo rarTime, uint16_t ueId, RarAl uint8_t dmrsStartSymbol, startSymbol, numSymbol ; uint16_t numRbs = 0; uint16_t tbSize = 0; +#ifdef OAI_TESTING + uint8_t freqDomainResource[FREQ_DOM_RSRC_SIZE] = {0}; +#endif PdschCfg *pdsch; SchBwpDlCfg *initialBwp = &cell->cellCfg.dlCfgCommon.schInitialDlBwp; @@ -933,16 +944,27 @@ uint8_t schFillRar(SchCellCb *cell, SlotTimingInfo rarTime, uint16_t ueId, RarAl } /* fill BWP */ +#ifndef OAI_TESTING bwp->freqAlloc.numPrb = initialBwp->bwp.freqAlloc.numPrb; bwp->freqAlloc.startPrb = initialBwp->bwp.freqAlloc.startPrb; + pdcch->coresetCfg.durationSymbols = numSymbols; +#else + bwp->freqAlloc.numPrb = 48; + bwp->freqAlloc.startPrb = 110; + pdcch->coresetCfg.durationSymbols = 1; +#endif bwp->subcarrierSpacing = initialBwp->bwp.scs; bwp->cyclicPrefix = initialBwp->bwp.cyclicPrefix; /* fill the PDCCH PDU */ pdcch->coresetCfg.startSymbolIndex = firstSymbol; - pdcch->coresetCfg.durationSymbols = numSymbols; +#ifndef OAI_TESTING memcpy(pdcch->coresetCfg.freqDomainResource, \ cell->cellCfg.dlCfgCommon.schInitialDlBwp.pdcchCommon.commonSearchSpace.freqDomainRsrc, FREQ_DOM_RSRC_SIZE); +#else + freqDomainResource[0]=255; + memcpy(pdcch->coresetCfg.freqDomainResource,freqDomainResource, FREQ_DOM_RSRC_SIZE); +#endif pdcch->coresetCfg.cceRegMappingType = 1; /* coreset0 is always interleaved */ pdcch->coresetCfg.regBundleSize = 6; /* spec-38.211 sec 7.3.2.2 */ @@ -955,15 +977,23 @@ uint8_t schFillRar(SchCellCb *cell, SlotTimingInfo rarTime, uint16_t ueId, RarAl pdcch->dci[0].rnti = cell->raReq[ueId-1]->raRnti; /* RA-RNTI */ pdcch->dci[0].scramblingId = cell->cellCfg.phyCellId; pdcch->dci[0].scramblingRnti = 0; - pdcch->dci[0].cceIndex = 4; /* considering SIB1 is sent at cce 0-1-2-3 */ pdcch->dci[0].aggregLevel = 4; +#ifndef OAI_TESTING + pdcch->dci[0].cceIndex = 4; /* considering SIB1 is sent at cce 0-1-2-3 */ pdcch->dci[0].beamPdcchInfo.numPrgs = 1; pdcch->dci[0].beamPdcchInfo.prgSize = 1; pdcch->dci[0].beamPdcchInfo.digBfInterfaces = 0; + pdcch->dci[0].txPdcchPower.powerControlOffsetSS = 0; +#else + pdcch->dci[0].cceIndex = 0; /* considering SIB1 is sent at cce 0-1-2-3 */ + pdcch->dci[0].beamPdcchInfo.numPrgs = 0; + pdcch->dci[0].beamPdcchInfo.prgSize = 0; + pdcch->dci[0].beamPdcchInfo.digBfInterfaces = 1; + pdcch->dci[0].txPdcchPower.powerControlOffsetSS = 1; +#endif pdcch->dci[0].beamPdcchInfo.prg[0].pmIdx = 0; pdcch->dci[0].beamPdcchInfo.prg[0].beamIdx[0] = 0; pdcch->dci[0].txPdcchPower.beta_pdcch_1_0 = 0; - pdcch->dci[0].txPdcchPower.powerControlOffsetSS = 0; pdsch = &pdcch->dci[0].pdschCfg; /* fill the PDSCH PDU */ @@ -982,23 +1012,37 @@ uint8_t schFillRar(SchCellCb *cell, SlotTimingInfo rarTime, uint16_t ueId, RarAl /* RAR PDU length and FAPI payload header length */ tbSize = schCalcTbSize(RAR_PAYLOAD_SIZE + TX_PAYLOAD_HDR_LEN); pdsch->codeword[cwCount].tbSize = tbSize; +#ifdef OAI_TESTING + pdsch->codeword[cwCount].tbSize = 28; + pdsch->codeword[cwCount].targetCodeRate = 1200; + pdsch->codeword[cwCount].mcsIndex = 0; /* mcs configured to 4 */ +#endif } pdsch->dataScramblingId = cell->cellCfg.phyCellId; pdsch->numLayers = 1; pdsch->transmissionScheme = 0; pdsch->refPoint = 0; - pdsch->dmrs.dlDmrsSymbPos = DL_DMRS_SYMBOL_POS; pdsch->dmrs.dmrsConfigType = 0; /* type-1 */ pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId; pdsch->dmrs.scid = 0; +#ifndef OAI_TESTING + pdsch->dmrs.dlDmrsSymbPos = DL_DMRS_SYMBOL_POS; pdsch->dmrs.numDmrsCdmGrpsNoData = 1; pdsch->dmrs.dmrsPorts = 0; +#else + pdsch->dmrs.dlDmrsSymbPos = 2180; + pdsch->dmrs.numDmrsCdmGrpsNoData = 2; + pdsch->dmrs.dmrsPorts = 1; +#endif pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Type-A */ pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS; pdsch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS; pdsch->pdschTimeAlloc.rowIndex = k0Index; pdsch->pdschTimeAlloc.startSymb = initialBwp->pdschCommon.timeDomRsrcAllocList[k0Index].startSymbol; +#ifdef OAI_TESTING + pdsch->pdschTimeAlloc.startSymb = 1; +#endif pdsch->pdschTimeAlloc.numSymb = initialBwp->pdschCommon.timeDomRsrcAllocList[k0Index].lengthSymbol; pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */ @@ -1007,6 +1051,10 @@ uint8_t schFillRar(SchCellCb *cell, SlotTimingInfo rarTime, uint16_t ueId, RarAl pdsch->pdschFreqAlloc.numPrb = \ schCalcNumPrb(tbSize, mcs, initialBwp->pdschCommon.timeDomRsrcAllocList[k0Index].lengthSymbol); +#ifdef OAI_TESTING + pdsch->pdschFreqAlloc.startPrb = 0; + pdsch->pdschFreqAlloc.numPrb = 8; +#endif /* Find total symbols occupied including DMRS */ dmrsStartSymbol = findDmrsStartSymbol(pdsch->dmrs.dlDmrsSymbPos); /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT, @@ -1032,8 +1080,13 @@ uint8_t schFillRar(SchCellCb *cell, SlotTimingInfo rarTime, uint16_t ueId, RarAl return RFAILED; } +#ifndef OAI_TESTING pdsch->beamPdschInfo.numPrgs = 1; pdsch->beamPdschInfo.prgSize = 1; +#else + pdsch->beamPdschInfo.numPrgs = 0; + pdsch->beamPdschInfo.prgSize = 0; +#endif pdsch->beamPdschInfo.digBfInterfaces = 0; pdsch->beamPdschInfo.prg[0].pmIdx = 0; pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0; diff --git a/src/5gnrsch/sch_utils.c b/src/5gnrsch/sch_utils.c index 11d0ebb14..76d6ae050 100644 --- a/src/5gnrsch/sch_utils.c +++ b/src/5gnrsch/sch_utils.c @@ -930,7 +930,7 @@ CmLList* isPrbAvailable(CmLListCp *freePrbBlockList, uint16_t startPrb, uint16_t node = node->next; continue; } - + /* Check if requested PRBs belong within the range of current free block */ if(((startPrb >= freeBlock->startPrb) && (startPrb <= freeBlock->endPrb)) && \ ((endPrb >= freeBlock->startPrb) && (endPrb <= freeBlock->endPrb))) @@ -1102,7 +1102,7 @@ uint16_t schCalcNumPrb(uint16_t tbSize, uint16_t mcs, uint8_t numSymbols) * @param[in] number of symbols * @return tbSize **/ -uint16_t schCalcTbSizeFromNPrb(uint16_t numPrb, uint16_t mcs, uint8_t numSymbols) +uint16_t schCalcTbSizeFromNPrb(uint16_t numPrb, uint16_t mcs, uint8_t numSymbols, uint16_t *targeCodeRate, uint8_t *qam) { uint8_t qm = mcsTable[mcs][1]; uint16_t rValue = mcsTable[mcs][2]; @@ -1116,8 +1116,12 @@ uint16_t schCalcTbSizeFromNPrb(uint16_t numPrb, uint16_t mcs, uint8_t numSymbols uint32_t c = 0; const uint8_t numLayer = 1; const uint16_t numRbSc = 12; +#ifndef OAI_TESTING const uint16_t numDmrsRes = 12; - const uint16_t sf = 1; +#else + const uint16_t numDmrsRes = 36; +#endif + // const uint16_t sf = 1;//04june // uint16_t numPrbOvrHead = 0; /* formula used for calculation of rbSize, 38.214 section 5.1.3.2 * @@ -1127,7 +1131,7 @@ uint16_t schCalcTbSizeFromNPrb(uint16_t numPrb, uint16_t mcs, uint8_t numSymbols nreDash = MIN(156, ceil( (numRbSc * numSymbols) - numDmrsRes - 0)); nre = nreDash * numPrb; - nInfo = ceil(nre * qm * numLayer * rValue/(1024.0 * sf)); + nInfo = ceil(nre * qm * numLayer * (rValue *10/5)>>11); if(nInfo <= 3824) { @@ -1162,6 +1166,11 @@ uint16_t schCalcTbSizeFromNPrb(uint16_t numPrb, uint16_t mcs, uint8_t numSymbols } } } + if(targeCodeRate != NULLP && qam != NULLP) + { + *targeCodeRate = rValue * 10; + *qam = qm; + } return tbSize; } @@ -1588,7 +1597,7 @@ uint32_t calculateEstimateTBSize(uint32_t reqBO, uint16_t mcsIdx, uint8_t numSym /*Loop Exit: Either estPRB reaches the maxRB or TBS is found greater than equal to reqBO*/ do { - tbs = schCalcTbSizeFromNPrb(*estPrb, mcsIdx, numSymbols); + tbs = schCalcTbSizeFromNPrb(*estPrb, mcsIdx, numSymbols, NULLP, NULLP); /*TBS size calculated in above function is in Bits. * So to convert it into Bytes , we right shift by 3. diff --git a/src/5gnrsch/sch_utils.h b/src/5gnrsch/sch_utils.h index 035893386..656140fcb 100644 --- a/src/5gnrsch/sch_utils.h +++ b/src/5gnrsch/sch_utils.h @@ -133,7 +133,7 @@ uint8_t calculateSlotPatternLength(uint8_t scs, uint8_t periodicity); /* Functions declarations : Resource allocation handler */ uint16_t schCalcTbSize(uint32_t payLoadSize); uint16_t schCalcNumPrb(uint16_t tbSize, uint16_t mcs, uint8_t numSymbols); -uint16_t schCalcTbSizeFromNPrb(uint16_t numPrb, uint16_t mcs, uint8_t numSymbols); +uint16_t schCalcTbSizeFromNPrb(uint16_t numPrb, uint16_t mcs, uint8_t numSymbols, uint16_t *targeCodeRate, uint8_t* qam); bool fillPrbBitmap(uint64_t *prbBitmap, uint16_t startPrb, uint16_t numPrb); CmLList* isPrbAvailable(CmLListCp *freePrbBlockList, uint16_t startPrb, uint16_t numPrb); void removeAllocatedPrbFromFreePrbList(CmLListCp *freePrbBlockList, CmLList *node, \ diff --git a/src/cm/common_def.h b/src/cm/common_def.h index f98c7e9d3..ca4a7b85f 100644 --- a/src/cm/common_def.h +++ b/src/cm/common_def.h @@ -60,7 +60,11 @@ #define MAX_NUM_CELL 2 /* Changed to 2 to support cell Id 2 even if there is only one cell in DU */ #define MAX_NUM_MU 4 #define MAX_NUM_UE 3 +#ifdef OAI_TESTING +#define MAX_NUM_UE_PER_TTI 1 +#else #define MAX_NUM_UE_PER_TTI 2 +#endif #define MAX_NUM_LC MAX_DRB_LCID + 1 /*Spec 38.331: Sec 6.4: maxLC-ID Keyword*/ #define MAX_NUM_SRB 3 /* Max. no of Srbs */ #define MAX_NUM_DRB 29 /* spec 38.331, maxDRB */ @@ -159,7 +163,8 @@ * However, aligning to fapi_interface.h, setting this macro to 160. * TODO : To support 160, FAPI_MAX_NUM_TLVS_CONFIG in fapi_interface.h * of Intel L1 must be incremented to a higher number */ -#define MAX_TDD_PERIODICITY 10 /*As per Spec SCF222v10.02, TDD Table 10ms is the MAX_PERIODICITY in milli-sec*/ +#define MAX_TDD_PERIODICITY_SLOTS 10 +#define MAX_TDD_PERIODICITY 10 #endif #define GET_UE_ID( _crnti,_ueId) \ diff --git a/src/cm/mac_sch_interface.h b/src/cm/mac_sch_interface.h index abebf239f..9a73cd652 100644 --- a/src/cm/mac_sch_interface.h +++ b/src/cm/mac_sch_interface.h @@ -102,7 +102,11 @@ #define QPSK_MODULATION 2 #define RAR_PAYLOAD_SIZE 10 /* As per spec 38.321, sections 6.1.5 and 6.2.3, RAR PDU is 8 bytes long and 2 bytes of padding */ +#ifdef OAI_TESTING +#define TX_PAYLOAD_HDR_LEN 0 /* OAI L1 requires */ +#else #define TX_PAYLOAD_HDR_LEN 32 /* Intel L1 requires adding a 32 byte header to transmitted payload */ +#endif #define UL_TX_BUFFER_SIZE 5 #define MAX_NUM_CONFIG_SLOTS 160 /*Max number of slots as per the numerology*/ @@ -118,7 +122,12 @@ #define DEFAULT_K2_VALUE_FOR_SCS120 3 #define MAX_PLMN 1 -#define DL_DMRS_SYMBOL_POS 4 /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */ + +#ifdef OAI_TESTING + #define DL_DMRS_SYMBOL_POS 580 +#else + #define DL_DMRS_SYMBOL_POS 4 /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */ +#endif #define MAX_PHR_REPORT 1 /*TODO: Range of PHR reports in multiple PHR.*/ #define MAX_FAILURE_DET_RESOURCES 10 /*Spec 38.331 'maxNrofFailureDetectionResources'*/ diff --git a/src/cm/ssi.h b/src/cm/ssi.h index 3379caeab..2a1581b93 100755 --- a/src/cm/ssi.h +++ b/src/cm/ssi.h @@ -847,6 +847,15 @@ return (ret); \ } +#ifdef OAI_TESTING +#define CMCHKPKLEN(func, val, mBuf, len) \ + { \ + uint8_t ret; \ + if ((ret = func(val, mBuf, len)) != ROK) \ + return (ret); \ + } +#endif + #define CMCHKPKLOG(func, val, mBuf, errCode, pst) \ { \ S16 ret; \ @@ -878,6 +887,15 @@ #define CMCHKPK(func, val, mBuf) \ func(val, mBuf); +#ifdef OAI_TESTING +#define CMCHKPKLEN(func, val, mBuf, len) \ + { \ + uint8_t ret; \ + if ((ret = func(val, mBuf, len)) != ROK) \ + return (ret); \ + } +#endif + #define CMCHKPKLOG(func, val, mBuf, errCode, pst) \ func(val, mBuf); diff --git a/src/du_app/du_cfg.c b/src/du_app/du_cfg.c index deef4c58b..387b772c3 100644 --- a/src/du_app/du_cfg.c +++ b/src/du_app/du_cfg.c @@ -1333,7 +1333,11 @@ uint8_t fillDuSrvdCellSysInfo(F1DuSysInfo *sysInfo) sysInfo->mibLen = encBufSize; /* GNB DU System Info SIB1 msg */ +#ifdef OAI_TESTING + BuildSib1MsgForF1AP(); +#else BuildSib1Msg(); +#endif DU_ALLOC(sysInfo->sib1Msg, encBufSize); if(!(sysInfo->sib1Msg)) { @@ -2349,6 +2353,12 @@ uint8_t parseSib1CellCfg(xmlDocPtr doc, xmlNsPtr ns, xmlNodePtr cur, Sib1CellCfg cur = cur -> next; } +#ifdef OAI_TESTING + BuildSib1Msg(); + DU_ALLOC_SHRABL_BUF(sib1CellCfg->sib1Pdu,encBufSize); + memcpy(sib1CellCfg->sib1Pdu, encBuf,encBufSize); + sib1CellCfg->sib1PduLen = encBufSize; +#else sib1CellCfg->sib1PduLen = duCfgParam.srvdCellLst[0].duSysInfo.sib1Len; if(sib1CellCfg->sib1PduLen > 0) { @@ -2360,6 +2370,7 @@ uint8_t parseSib1CellCfg(xmlDocPtr doc, xmlNsPtr ns, xmlNodePtr cur, Sib1CellCfg } memcpy(sib1CellCfg->sib1Pdu, duCfgParam.srvdCellLst[0].duSysInfo.sib1Msg, sib1CellCfg->sib1PduLen); } +#endif return ROK; } @@ -5373,7 +5384,11 @@ uint8_t parseDuCfgParams(xmlDocPtr doc, xmlNsPtr ns, xmlNodePtr cur) uint8_t duReadCfg() { #ifdef NR_TDD +#ifndef OAI_TESTING const char *filename = "../build/config/tdd_odu_config.xml"; +#else + const char *filename = "../build/config/tdd_odu_config_oai.xml"; +#endif #else const char *filename = "../build/config/fdd_odu_config.xml"; #endif @@ -5559,8 +5574,8 @@ void printDuConfig() egtp = &duCfgParam.egtpParams; DU_LOG("\n ** EGTP PARAMETER ** \n"); - DU_LOG("DU IP Address %u\n", egtp->localIp.ipV4Addr); - DU_LOG("CU IP Address %u\n", egtp->destIp.ipV4Addr); + DU_LOG("DU IP Address %d\n", egtp->localIp.ipV4Addr); + DU_LOG("CU IP Address %d\n", egtp->destIp.ipV4Addr); DU_LOG("EGTP Port at DU %d\n", egtp->localPort); DU_LOG("EGTP Port at CU %d\n", egtp->destPort); DU_LOG("Minimum Tunnel ID %d\n", egtp->minTunnelId); @@ -5842,7 +5857,7 @@ void printDuConfig() DU_LOG("SSB Subcarrier Offset %d\n", ssbCfg->ssbScOffset); for (ssbMaskIdx = 0; ssbMaskIdx < SSB_MASK_SIZE; ssbMaskIdx++) { - DU_LOG("SSB Mask[%d] :%d\n", ssbMaskIdx, ssbCfg->ssbMask[ssbMaskIdx]); + DU_LOG("SSB Mask[%d] :%x\n", ssbMaskIdx, ssbCfg->ssbMask[ssbMaskIdx]); } DU_LOG("Beam ID %d\n", ssbCfg->beamId[0]); DU_LOG("BETA PSS %d\n", ssbCfg->betaPss); diff --git a/src/du_app/du_f1ap_msg_hdl.c b/src/du_app/du_f1ap_msg_hdl.c index 70c6063cd..768a93aad 100644 --- a/src/du_app/du_f1ap_msg_hdl.c +++ b/src/du_app/du_f1ap_msg_hdl.c @@ -550,7 +550,7 @@ uint8_t fillNrTddInfo(TDD_Info_t *tddInfo) freqInfo->freqBandListNr.list.array[freqBandListIdx]->freqBandIndicatorNr = duCfgParam.srvdCellLst[0].duCellInfo.\ f1Mode.mode.tdd.nrFreqInfo.freqBand[0].nrFreqBand; - +#ifndef OAI_TESTING freqInfo->freqBandListNr.list.array[freqBandListIdx]->supportedSULBandList.list.count = elementCnt; freqInfo->freqBandListNr.list.array[freqBandListIdx]->supportedSULBandList.list.size = freqInfo->freqBandListNr.list.array[freqBandListIdx]->\ supportedSULBandList.list.count * sizeof(SupportedSULFreqBandItem_t*); @@ -576,8 +576,8 @@ uint8_t fillNrTddInfo(TDD_Info_t *tddInfo) freqInfo->freqBandListNr.list.array[freqBandListIdx]->supportedSULBandList.list.array[supportedBandIdx]->freqBandIndicatorNr =\ duCfgParam.srvdCellLst[0].duCellInfo.f1Mode.mode.tdd.nrFreqInfo.freqBand[0].sulBand[0]; } +#endif } - tddInfo->transmission_Bandwidth.nRSCS = duCfgParam.srvdCellLst[0].duCellInfo.f1Mode.mode.tdd.nrFreqInfo.sulInfo.sulTxBw.nrScs; tddInfo->transmission_Bandwidth.nRNRB = duCfgParam.srvdCellLst[0].duCellInfo.f1Mode.mode.tdd.nrFreqInfo.sulInfo.sulTxBw.nrb; diff --git a/src/du_app/du_sctp.c b/src/du_app/du_sctp.c index 374ab506b..fb299b8db 100644 --- a/src/du_app/du_sctp.c +++ b/src/du_app/du_sctp.c @@ -871,7 +871,7 @@ uint8_t sctpSend(Buffer *mBuf, uint8_t itfType) #ifdef CALL_FLOW_DEBUG_LOG DU_LOG("\nCall Flow: ENTSCTP -> CU : EVENT_F1AP_MSG_TO_CU\n"); #endif - ret = cmInetSctpSendMsg(&f1Params.sockFd, &f1Params.destIpNetAddr, f1Params.destPort, &memInfo, mBuf, &len, 0, FALSE, 0, 0/*SCT_PROTID_NONE*/, RWOULDBLOCK); + ret = cmInetSctpSendMsg(&f1Params.sockFd, &f1Params.destIpNetAddr, f1Params.destPort, &memInfo, mBuf, &len, 0, FALSE, 0, 62, RWOULDBLOCK); } if(itfType == E2_INTERFACE) diff --git a/src/du_app/du_sys_info_hdl.c b/src/du_app/du_sys_info_hdl.c index 08a86f03b..577e7ab70 100644 --- a/src/du_app/du_sys_info_hdl.c +++ b/src/du_app/du_sys_info_hdl.c @@ -61,6 +61,7 @@ #include "BCCH-DL-SCH-Message.h" #include "du_f1ap_conversions.h" #include "du_sys_info_hdl.h" +#include "UE-TimersAndConstants.h" void FreeSib1Msg(SIB1_t *sib1Msg); uint8_t FreqInfoUlret = RFAILED; @@ -927,7 +928,6 @@ uint8_t BuildCommonSerachSpaceList( struct PDCCH_ConfigCommon__commonSearchSpace * does not have any member parameter lead to decode failure in wireshark. * The issue has been reported to Nokia. * The following code will be uncommented once the issue is resolved */ -#if 0 /* Search Space type and DCI Format */ DU_ALLOC(searchSpace->searchSpaceType, sizeof( struct SearchSpace__searchSpaceType)); if(!searchSpace->searchSpaceType) @@ -978,7 +978,6 @@ uint8_t BuildCommonSerachSpaceList( struct PDCCH_ConfigCommon__commonSearchSpace return RFAILED; } } -#endif return ROK; }/* BuildCommonSerachSpaceList */ @@ -1853,7 +1852,8 @@ uint8_t BuildRachCfgCommon(struct BWP_UplinkCommon__rach_ConfigCommon *rachCfg) } case RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR_oneHalf: { - //TODO + setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->choice.one = \ + convertCbPreamblePerSsbValueToEnum(duRachCfg.numCbPreamblePerSsb); break; } case RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR_one: @@ -2323,7 +2323,11 @@ uint8_t BuildServCellCfgCommonSib(ServingCellConfigCommonSIB_t *srvCellCfg) /* SSB Position in Burst */ ssbPosInBurst = &srvCellCfg->ssb_PositionsInBurst.inOneGroup; +#ifndef OAI_TESTING ssbPosInBurst->size = 1; +#else + ssbPosInBurst->size = 4; +#endif DU_ALLOC(ssbPosInBurst->buf, ssbPosInBurst->size * sizeof(uint8_t)); if(!ssbPosInBurst->buf) { @@ -2373,6 +2377,166 @@ uint8_t BuildServCellCfgCommonSib(ServingCellConfigCommonSIB_t *srvCellCfg) return ROK; } +uint8_t BuildUeTimerAndConstants(UE_TimersAndConstants_t *ue_TimersAndConstants) +{ + ue_TimersAndConstants->t300 = UE_TimersAndConstants__t300_ms400; + ue_TimersAndConstants->t301 = UE_TimersAndConstants__t301_ms400; + ue_TimersAndConstants->t310 = UE_TimersAndConstants__t310_ms2000; + ue_TimersAndConstants->n310 = UE_TimersAndConstants__n310_n10; + ue_TimersAndConstants->t311 = UE_TimersAndConstants__t311_ms3000; + ue_TimersAndConstants->n311 = UE_TimersAndConstants__n311_n1; + ue_TimersAndConstants->t319 = UE_TimersAndConstants__t319_ms400; + + return ROK; +} + +#ifdef OAI_TESTING +uint8_t BuildSib1MsgForF1AP() +{ + SIB1_t *sib1Msg; + CellAccessRelatedInfo_t *cellAccessInfo; + uint8_t elementCnt; + uint8_t ret1; + asn_enc_rval_t encRetVal; + uint8_t ret = RFAILED; + + do + { + DU_ALLOC(sib1Msg, sizeof(SIB1_t)); + + elementCnt = ODU_VALUE_ONE; + + /* Cell Selection Info */ +#if 0 + DU_ALLOC(sib1Msg->cellSelectionInfo, sizeof(struct SIB1__cellSelectionInfo)); + if(!sib1Msg->cellSelectionInfo) + { + DU_LOG("\nERROR --> DU APP: SIB1 Cell Selection Info memory allocation failed"); + break; + } + + sib1Msg->cellSelectionInfo->q_RxLevMin = 0; + + DU_ALLOC(sib1Msg->cellSelectionInfo->q_RxLevMinSUL, sizeof(Q_RxLevMin_t)); + if(!sib1Msg->cellSelectionInfo->q_RxLevMinSUL) + { + DU_LOG("\nERROR --> DU APP: BuildSib1Msg(): Memory allocation failed for q_RxLevMinSUL"); + break; + } + *(sib1Msg->cellSelectionInfo->q_RxLevMinSUL) = -50; + + DU_ALLOC(sib1Msg->cellSelectionInfo->q_QualMin, sizeof(Q_QualMin_t)); + if(!sib1Msg->cellSelectionInfo->q_QualMin) + { + DU_LOG("\nERROR --> DU APP: BuildSib1Msg(): Memory allocation failed for q_QualMin"); + break; + } + *(sib1Msg->cellSelectionInfo->q_QualMin) = -30; +#endif + /* PLMN list */ + cellAccessInfo = &sib1Msg->cellAccessRelatedInfo; + cellAccessInfo->plmn_IdentityList.list.count = elementCnt; + cellAccessInfo->plmn_IdentityList.list.size = elementCnt * sizeof(PLMN_IdentityInfo_t *); + + ret1 = BuildPlmnList(cellAccessInfo); + if(ret1 != ROK) + { + break; + } + /* Connection Establish Failure Control */ + DU_ALLOC(sib1Msg->connEstFailureControl, sizeof(ConnEstFailureControl_t)); + if(!sib1Msg->connEstFailureControl) + { + DU_LOG("\nERROR --> DU APP: sib1Msg->connEstFailureControl memory allocation failure"); + break; + } + sib1Msg->connEstFailureControl->connEstFailCount = duCfgParam.sib1Params.connEstFailCnt; + sib1Msg->connEstFailureControl->connEstFailOffsetValidity = duCfgParam.sib1Params.connEstFailOffValidity; + + DU_ALLOC(sib1Msg->connEstFailureControl->connEstFailOffset, sizeof(long)); + if(!sib1Msg->connEstFailureControl->connEstFailOffset) + { + DU_LOG("\nERROR --> DU APP: BuildSib1Msg(): Memory allocation failed for connEstFailOffset"); + break; + } + *(sib1Msg->connEstFailureControl->connEstFailOffset) = duCfgParam.sib1Params.connEstFailOffset; + + /* SI Scheduling Info */ + DU_ALLOC(sib1Msg->si_SchedulingInfo, sizeof(SI_SchedulingInfo_t)); + if(!sib1Msg->si_SchedulingInfo) + { + DU_LOG("\nERROR --> DU APP: sib1Msg->si_SchedulingInfo memory allocation failure"); + break; + } + elementCnt = ODU_VALUE_ONE; + sib1Msg->si_SchedulingInfo->schedulingInfoList.list.count = elementCnt; + sib1Msg->si_SchedulingInfo->schedulingInfoList.list.size = elementCnt * + sizeof(struct SchedulingInfo *); + ret1 = BuildSiSchedInfoList(&sib1Msg->si_SchedulingInfo->schedulingInfoList); + if(ret1 != ROK) + { + break; + } + sib1Msg->si_SchedulingInfo->si_WindowLength = duCfgParam.sib1Params.siSchedInfo.winLen; + + /* Serving Cell Config Common */ + DU_ALLOC(sib1Msg->servingCellConfigCommon, sizeof(ServingCellConfigCommonSIB_t)); + if(!sib1Msg->servingCellConfigCommon) + { + DU_LOG("\nERROR --> DU APP: sib1Msg->servingCellConfigCommon memory allocation failure"); + break; + } + ret1 = BuildServCellCfgCommonSib(sib1Msg->servingCellConfigCommon); + if(ret1 != ROK) + { + break; + } + DU_ALLOC(sib1Msg->ue_TimersAndConstants, sizeof(UE_TimersAndConstants_t)); + ret1 = BuildUeTimerAndConstants(sib1Msg->ue_TimersAndConstants); +#if 0 + DU_ALLOC(sib1Msg->uac_BarringInfo, sizeof(struct SIB1__uac_BarringInfo)); + DU_ALLOC(sib1Msg->uac_BarringInfo->uac_BarringPerPLMN_List, sizeof(struct UAC_BarringPerPLMN_List)); + sib1Msg->uac_BarringInfo->uac_BarringPerPLMN_List->list.count = 1; + sib1Msg->uac_BarringInfo->uac_BarringPerPLMN_List->list.size = sizeof(struct UAC_BarringPerPLMN *); + DU_ALLOC(sib1Msg->uac_BarringInfo->uac_BarringPerPLMN_List->list.array,sib1Msg->uac_BarringInfo->uac_BarringPerPLMN_List->list.size); + DU_ALLOC(sib1Msg->uac_BarringInfo->uac_BarringPerPLMN_List->list.array[0], sizeof(struct UAC_BarringPerPLMN)); + sib1Msg->uac_BarringInfo->uac_BarringPerPLMN_List->list.array[0]->plmn_IdentityIndex = 0; + + DU_ALLOC(sib1Msg->useFullResumeID, sizeof(long)); + *sib1Msg->useFullResumeID = 0; +#endif + xer_fprint(stdout, &asn_DEF_SIB1, sib1Msg); + + /* Encode the F1SetupRequest type as APER */ + memset(encBuf, 0, ENC_BUF_MAX_LEN); + encBufSize = 0; + encRetVal = uper_encode(&asn_DEF_SIB1, 0, sib1Msg, PrepFinalEncBuf,\ + encBuf); + printf("\nencbufSize: %d\n", encBufSize); + if(encRetVal.encoded == -1) + { + DU_LOG("\nERROR --> DU APP : Could not encode SIB1 structure (at %s)\n",\ + encRetVal.failed_type ? + encRetVal.failed_type->name : + "unknown"); + break; + } +#ifdef DEBUG_ASN_PRINT + for(int i=0; i< encBufSize; i++) + { + printf("%x\t",encBuf[i]); + } + printf("\n"); +#endif + + ret = ROK; + break; + }while(true); + + FreeSib1Msg(sib1Msg); + return ret; +} +#endif /******************************************************************* * * @brief Builds SIB message in Served Cell Info @@ -2501,6 +2665,8 @@ uint8_t BuildSib1Msg() { break; } + DU_ALLOC(sib1Msg->ue_TimersAndConstants, sizeof(UE_TimersAndConstants_t)); + ret1 = BuildUeTimerAndConstants(sib1Msg->ue_TimersAndConstants); xer_fprint(stdout, &asn_DEF_BCCH_DL_SCH_Message, &bcchMsg); @@ -3156,6 +3322,8 @@ void FreeSib1Msg(SIB1_t *sib1Msg) DU_FREE(sib1Msg->servingCellConfigCommon, sizeof(ServingCellConfigCommonSIB_t)); + DU_FREE(sib1Msg->ue_TimersAndConstants, \ + sizeof(UE_TimersAndConstants_t)); } //TODO PBORLA if(sib1Msg->si_SchedulingInfo->schedulingInfoList.list.array) diff --git a/src/du_app/du_sys_info_hdl.h b/src/du_app/du_sys_info_hdl.h index ba0b33096..456dfe43d 100644 --- a/src/du_app/du_sys_info_hdl.h +++ b/src/du_app/du_sys_info_hdl.h @@ -32,6 +32,9 @@ uint8_t BuildMibPdu(); uint8_t BuildMibMsg(); uint8_t BuildSib1Msg(); +#ifdef OAI_TESTING +uint8_t BuildSib1MsgForF1AP(); +#endif uint8_t BuildBwpDlCommon(BWP_DownlinkCommon_t *bwp); uint8_t BuildBwpUlCommon(BWP_UplinkCommon_t *bwp); uint8_t BuildTddUlDlCfgComm(TDD_UL_DL_ConfigCommon_t *tddCfg); diff --git a/src/du_app/du_ue_mgr.c b/src/du_app/du_ue_mgr.c index d6abc166e..ca7705d9f 100644 --- a/src/du_app/du_ue_mgr.c +++ b/src/du_app/du_ue_mgr.c @@ -787,7 +787,11 @@ uint8_t fillDefaultInitDlBwp(InitialDlBwp *initDlBwp) } if(initDlBwp->pdschCfg.timeDomRsrcAllociList[idx].k0) { +#ifndef OAI_TESTING *(initDlBwp->pdschCfg.timeDomRsrcAllociList[idx].k0) = 1; +#else + *(initDlBwp->pdschCfg.timeDomRsrcAllociList[idx].k0) = 0; +#endif } initDlBwp->pdschCfg.timeDomRsrcAllociList[idx].mappingType = MAPPING_TYPEA; initDlBwp->pdschCfg.timeDomRsrcAllociList[idx].startSymbol = PDSCH_START_SYMBOL; diff --git a/src/intel_fapi/fapi_interface_oai.h b/src/intel_fapi/fapi_interface_oai.h new file mode 100644 index 000000000..64aacd0e6 --- /dev/null +++ b/src/intel_fapi/fapi_interface_oai.h @@ -0,0 +1,1303 @@ +/****************************************************************************** +* +* Copyright (c) 2019 Intel. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +* +*******************************************************************************/ + +#ifndef _FAPI_INTERFACE_H_ +#define _FAPI_INTERFACE_H_ + +#if defined(__cplusplus) +extern "C" { +#endif + +#include "stdint.h" + +#define FAPI_PARAM_REQUEST 0x00 +#define FAPI_PARAM_RESPONSE 0x01 +#define FAPI_CONFIG_REQUEST 0x02 +#define FAPI_CONFIG_RESPONSE 0x03 +#define FAPI_START_REQUEST 0x04 +#define FAPI_STOP_REQUEST 0x05 +#define FAPI_STOP_INDICATION 0x06 +#define FAPI_ERROR_INDICATION 0x07 +// Reserved 0x08 - 0x0F and 0x02 - 0x7f +// 0x01 - 0x1F is used in vendor extension + +#define FAPI_DL_TTI_REQUEST 0x80 +#define FAPI_UL_TTI_REQUEST 0x81 +#define FAPI_SLOT_INDICATION 0x82 +#define FAPI_UL_DCI_REQUEST 0x83 +#define FAPI_TX_DATA_REQUEST 0x84 +#define FAPI_RX_DATA_INDICATION 0x85 +#define FAPI_CRC_INDICATION 0x86 +#define FAPI_UCI_INDICATION 0x87 +#define FAPI_SRS_INDICATION 0x88 +#define FAPI_RACH_INDICATION 0x89 +// Reserved 0x8a -0xff + +// Tags per 5G FAPI +// Cell Parameters +#define FAPI_RELEASE_CAPABILITY_TAG 0x0001 +#define FAPI_PHY_STATE_TAG 0x0002 +#define FAPI_SKIP_BLANK_DL_CONFIG_TAG 0x0003 +#define FAPI_SKIP_BLANK_UL_CONFIG_TAG 0x0004 +#define FAPI_NUM_CONFIG_TLVS_TO_REPORT_TYPE_TAG 0x0005 +#define FAPI_CYCLIC_PREFIX_TAG 0x0006 +// PDCCH Parameters +#define FAPI_SUPPORTED_SUBCARRIER_SPACING_DL_TAG 0x0007 +#define FAPI_SUPPORTED_BANDWIDTH_DL_TAG 0x0008 +#define FAPI_SUPPORTED_SUBCARRIER_SPACING_UL_TAG 0x0009 +#define FAPI_SUPPORTED_BANDWIDTH_UL_TAG 0x000A +#define FAPI_CCE_MAPPING_TYPE_TAG 0x000B +#define FAPI_CORESET_OUTSIDE_FIRST_3_OFDM_SYMS_OF_SLOT_TAG 0x000c +#define FAPI_PRECODER_GRANULARITY_CORESET_TAG 0x000d +#define FAPI_PDCCH_MU_MIMO_TAG 0x000e +#define FAPI_PDCCH_PRECODER_CYCLING_TAG 0x000f +#define FAPI_MAX_PDCCHS_PER_SLOT_TAG 0x0010 +// PUCCH Parameters +#define FAPI_PUCCH_FORMATS_TAG 0x0011 +#define FAPI_MAX_PUCCHS_PER_SLOT_TAG 0x0012 +// PDSCH Parameters +#define FAPI_PDSCH_MAPPING_TYPE_TAG 0x0013 +#define FAPI_PDSCH_ALLOCATION_TYPES_TAG 0x0014 +#define FAPI_PDSCH_VRB_TO_PRB_MAPPING_TAG 0x0015 +#define FAPI_PDSCH_CBG_TAG 0x0016 +#define FAPI_PDSCH_DMRS_CONFIG_TYPES_TAG 0x0017 +#define FAPI_PDSCH_DMRS_MAX_LENGTH_TAG 0x0018 +#define FAPI_PDSCH_DMRS_ADDITIONAL_POS_TAG 0x0019 +#define FAPI_MAX_PDSCHS_TBS_PER_SLOT_TAG 0x001a +#define FAPI_MAX_NUMBER_MIMO_LAYERS_PDSCH_TAG 0x001b +#define FAPI_SUPPORTED_MAX_MODULATION_ORDER_DL_TAG 0x001c +#define FAPI_MAX_MU_MIMO_USERS_DL_TAG 0x001d +#define FAPI_PDSCH_DATA_IN_DMRS_SYMBOLS_TAG 0x001e +#define FAPI_PREMPTIONSUPPORT_TAG 0x001f +#define FAPI_PDSCH_NON_SLOT_SUPPORT_TAG 0x0020 +// PUSCH Parameters +#define FAPI_UCI_MUX_ULSCH_IN_PUSCH_TAG 0x0021 +#define FAPI_UCI_ONLY_PUSCH_TAG 0x0022 +#define FAPI_PUSCH_FREQUENCY_HOPPING_TAG 0x0023 +#define FAPI_PUSCH_DMRS_CONFIG_TYPES_TAG 0x0024 +#define FAPI_PUSCH_DMRS_MAX_LEN_TAG 0x0025 +#define FAPI_PUSCH_DMRS_ADDITIONAL_POS_TAG 0x0026 +#define FAPI_PUSCH_CBG_TAG 0x0027 +#define FAPI_PUSCH_MAPPING_TYPE_TAG 0x0028 +#define FAPI_PUSCH_ALLOCATION_TYPES_TAG 0x0029 +#define FAPI_PUSCH_VRB_TO_PRB_MAPPING_TAG 0x002a +#define FAPI_PUSCH_MAX_PTRS_PORTS_TAG 0x002b +#define FAPI_MAX_PDUSCHS_TBS_PER_SLOT_TAG 0x002c +#define FAPI_MAX_NUMBER_MIMO_LAYERS_NON_CB_PUSCH_TAG 0x002d +#define FAPI_SUPPORTED_MODULATION_ORDER_UL_TAG 0x002e +#define FAPI_MAX_MU_MIMO_USERS_UL_TAG 0x002f +#define FAPI_DFTS_OFDM_SUPPORT_TAG 0x0030 +#define FAPI_PUSCH_AGGREGATION_FACTOR_TAG 0x0031 +// PRACH Parameters +#define FAPI_PRACH_LONG_FORMATS_TAG 0x0032 +#define FAPI_PRACH_SHORT_FORMATS_TAG 0x0033 +#define FAPI_PRACH_RESTRICTED_SETS_TAG 0x0034 +#define FAPI_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG 0x0035 +// Measurement Parameters +#define FAPI_RSSI_MEASUREMENT_SUPPORT_TAG 0x0036 + +// CONFIG TLV TAGS per 5G FAPI +// Carrier Configuration +#define FAPI_DL_BANDWIDTH_TAG 0x1001 +#define FAPI_DL_FREQUENCY_TAG 0x1002 +#define FAPI_DL_K0_TAG 0x1003 +#define FAPI_DL_GRIDSIZE_TAG 0x1004 +#define FAPI_NUM_TX_ANT_TAG 0x1005 +#define FAPI_UPLINK_BANDWIDTH_TAG 0x1006 +#define FAPI_UPLINK_FREQUENCY_TAG 0x1007 +#define FAPI_UL_K0_TAG 0x1008 +#define FAPI_UL_GRID_SIZE_TAG 0x1009 +#define FAPI_NUM_RX_ANT_TAG 0x100a +#define FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG 0x100b +// Cell Configuration +#define FAPI_PHY_CELL_ID_TAG 0x100c +#define FAPI_FRAME_DUPLEX_TYPE_TAG 0x100d +// SSB Configuration +#define FAPI_SS_PBCH_POWER_TAG 0x100e +#define FAPI_BCH_PAYLOAD_TAG 0x100f +#define FAPI_SCS_COMMON_TAG 0x1010 +// PRACH Configuration +#define FAPI_PRACH_SEQUENCE_LENGTH_TAG 0x1011 +#define FAPI_PRACH_SUBC_SPACING_TAG 0x1012 +#define FAPI_RESTRICTED_SET_CONFIG_TAG 0x1013 +#define FAPI_NUM_PRACH_FD_OCCASIONS_TAG 0x1014 +#define FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG 0x1015 +#define FAPI_NUM_ROOT_SEQUENCES_TAG 0x1016 +#define FAPI_K1_TAG 0x1017 +#define FAPI_PRACH_ZERO_CORR_CONF_TAG 0x1018 +#define FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG 0x1019 +#define FAPI_UNUSED_ROOT_SEQUENCES_TAG 0x101a +#define FAPI_SSB_PER_RACH_TAG 0x101b +#define FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG 0x101c +// SSB Table +#define FAPI_SSB_OFFSET_POINT_A_TAG 0x101d +#define FAPI_BETA_PSS_TAG 0x101e +#define FAPI_SSB_PERIOD_TAG 0x101f +#define FAPI_SSB_SUBCARRIER_OFFSET_TAG 0x1020 +#define FAPI_MIB_TAG 0x1021 +#define FAPI_SSB_MASK_TAG 0x1022 +#define FAPI_BEAM_ID_TAG 0x1023 +#define FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG 0x1024 +#define FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG 0x1025 +// TDD Table +#define FAPI_TDD_PERIOD_TAG 0x1026 +#define FAPI_SLOT_CONFIG_TAG 0x1027 +// Measurement Configuration +#define FAPI_RSSI_MEASUREMENT_TAG 0x1028 +// Prach Configuration Index +#define FAPI_PRACH_CONFIG_INDEX_TAG 0x1029 +// DMRS-TypeA Pos +#define FAPI_DMRS_TYPE_A_POS_TAG 0x102A + +// Error Codes updated per 5G FAPI Table 3-31 +#define FAPI_MSG_OK 0x0 +#define FAPI_MSG_INVALID_STATE 0x1 +#define FAPI_MSG_INVALID_CONFIG 0x2 +#define FAPI_MSG_SFN_OUT_OF_SYNC 0x3 +#define FAPI_MSG_SLOT_ERR 0x4 +#define FAPI_MSG_BCH_MISSING 0x5 +#define FAPI_MSG_INVALID_SFN 0x6 +#define FAPI_MSG_UL_DCI_ERR 0x7 +#define FAPI_MSG_TX_ERR 0x8 + +// 5G FAPI Definitions +#define FAPI_NUMEROLOGIES 5 +#define FAPI_MAX_NUM_UNUSED_ROOT_SEQUENCES 63 // 38.331 page 383 +#define FAPI_MAX_NUM_PRACH_FD_OCCASIONS 64 // 38.331 page 383 +#define FAPI_MAX_NUM_OF_SYMBOLS_PER_SLOT 14 +#define FAPI_MAX_TDD_PERIODICITY 160 // 38.212 11.1 for u=4 and P=10 ms +// m=p*q with p number of panels and q number of TxRU/RxRU per panel, +// depends on the RF configuration, currently n=m=4, q=1, p=4 and k=21 +// (number of beams per pannel). n number of antenna ports +#define FAPI_MAX_NUMBER_TX_RUS 4 +#define FAPI_MAX_NUMBER_OF_BEAMS 64 // Intel API Page 27 +#define FAPI_MAX_NUM_ANT_PORTS 8 // Based on current RF +#define FAPI_MAX_NUM_LAYERS 8 // 38.211 Table 7.3.1.3-1 +#define FAPI_MAX_NUM_TLVS_CELL_PARMS 1505 // 5G FAPI Table 3-9 (A) +#define FAPI_MAX_NUM_TLVS_CARRIER_PARMS 27 // 5G FAPI Table 3-10 (B) +#define FAPI_MAX_NUM_TLVS_PDCCH_PARMS 6 // 5G FAPI Table 3-11 (C) +#define FAPI_MAX_NUM_TLVS_PUCCH_PARMS 2 // 5G FAPI Table 3-12 (D) +#define FAPI_MAX_NUM_TLVS_PDSCH_PARMS 14 // 5G FAPI Table 3-13 (E) +#define FAPI_MAX_NUM_TLVS_PUSCH_PARMS 17 // 5G FAPI Table 3-14 (F) +#define FAPI_MAX_NUM_TLVS_PRACH_PARMS 4 // 5G FAPI Table 3-15 (G) +#define FAPI_MAX_NUM_TLVS_MEAS_PARMS 1 // 5G FAPI Table 3-16 (H) +#define FAPI_MAX_NUM_TLVS_PARAMS 1576 // A+B+C+D+E+F+G+H + Padding +// Carrier Table 11 + Cell Config 2 + SSB Config 3 + PRACH Config 414 + SSB +// Table 71 + TDD Table 141 + Measurements 1 +#define FAPI_MAX_NUM_TLVS_CONFIG 1500 + +#define FAPI_UL_DCI_REQUEST_PDCCH_PDU 0 + +#define FAPI_MAX_NUMBER_UNSUPPORTED_TLVS 74 +#define FAPI_MAX_NUMBER_OF_INVALID_IDLE_ONLY_TLVS 74 +#define FAPI_MAX_NUMBER_OF_INVALID_RUNNING_ONLY_TLVS 74 +#define FAPI_MAX_NUMBER_OF_MISSING_TLVS 74 +#define FAPI_MAX_NUM_DIGBFINTERFACES 4 // Based on RF, 5G FAPI says {0,255} +#define FAPI_MAX_NUM_PRGS_PER_TTI 4 // Based on 38.214 5.1.2.3 +#define FAPI_DCI_PAYLOAD_BYTE_LEN 32 // Based on Intel API MAX_DCI_BIT_BYTE_LEN +#define FAPI_MAX_NUMBER_DL_DCI 1 // Based on Intel API MAX_NUM_PDCCH +#define FAPI_MAX_NUMBER_OF_CODEWORDS_PER_PDU 2 // Based on MAX_DL_CODEWORD +// Based on (MAX_NUM_PDSCH*MAX_DL_CODEWORD + MAX_NUM_PDCCH + MAX_NUM_SRS + +// 1 PBCH/SLOT) +#define FAPI_MAX_NUMBER_DL_PDUS_PER_TTI 15 + +#define FAPI_MAX_NUMBER_OF_UES_PER_TTI 16 // Per common_ran_parameters.h +// Based on Max Tb size of 1376264 bits + 24 crc over (8848-24) and O/H +#define FAPI_MAX_NUM_CB_PER_TTI_IN_BYTES 192 + +#define FAPI_MAX_NUM_PTRS_PORTS 2 // Per 3GPP 38.212 Table 7.3.1.1.2-21 +#define FAPI_MAX_NUMBER_OF_GROUPS_PER_TTI 16 // FlexRAN API Table 33 +#define FAPI_MAX_NUMBER_UL_PDUS_PER_TTI 328 // (MAX_NUM_PUSCH+MAX_NUM_PUCCH+MAX_NUM_SRS+MAX_NUM_PRACH_DET) +#define FAPI_MAX_NUMBER_DCI_PDUS_PER_TTI 32 // Based on MAX_NUM_PDCCH +#define FAPI_MAX_NUMBER_OF_TLVS_PER_PDU 1 // one for each codeword +#define FAPI_MAX_NUMBER_TX_PDUS_PER_TTI 129 // Same as FAPI_MAX_NUMBER_DL_PDUS_PER_TTI +// Based on 38.214 5.1.3.4, the TBS is 1376264 bits and divided by 8 and +// aligned to 64 bytes +#define FAPI_MAX_PDU_LENGTH 172096 +#define FAPI_TX_DATA_PAYLOAD 0x00 +#define FAPI_TX_DATA_PTR_TO_PAYLOAD_32 0x01 +#define FAPI_TX_DATA_OFFSET_TO_PAYLOAD 0x02 +#define FAPI_TX_DATA_PTR_TO_PAYLOAD_64 0x03 + +#define FAPI_MAX_NUMBER_OF_PDUS_PER_TTI 129 // Same as FAPI_MAX_NUMBER_DL_PDUS_PER_TTI +#define FAPI_MAX_NUMBER_OF_ULSCH_PDUS_PER_SLOT 64 // NUM_PUSCH_CHAN*FAPI_MAX_NUMBER_OF_CODEWORDS_PER_PDU +#define FAPI_MAX_NUMBER_OF_CRCS_PER_SLOT 32 // Based on MAX_NUM_UL_CHAN +#define FAPI_MAX_HARQ_INFO_LEN_BYTES 214 // Based on 5G FAPI Table 3-70 +#define FAPI_MAX_CSI_PART1_DATA_BYTES 214 // Based on 5G FAPI Table 3-71 +#define FAPI_MAX_CSI_PART2_DATA_BYTES 214 // Based on 5G FAPI Table 3-72 +#define FAPI_MAX_NUMBER_OF_HARQS_PER_IND 2 // Based on 5G FAPI Table 3-68 +#define FAPI_MAX_SR_PAYLOAD_SIZE 1 // Based on 5G FAPI Table 3-69 +#define FAPI_MAX_HARQ_PAYLOAD_SIZE 214 // Based on 5G FAPI Table 3-70 +#define FAPI_MAX_NUMBER_UCI_PDUS_PER_SLOT 200 // Based on MAX_NUM_PUCCH +#define FAPI_MAX_NUMBER_RBS 273 // Based on MAX_NUM_OF_PRB_IN_FULL_BAND +#define FAPI_MAX_NUMBER_OF_REP_SYMBOLS 4 // Based on 5g FAPI Table 3-73 +#define FAPI_MAX_NUMBER_SRS_PDUS_PER_SLOT 32 // Based on MAX_NUM_SRS +#define FAPI_MAX_NUM_PREAMBLES_PER_SLOT 64 // Based on MAX_NUM_PRACH_DET +#define FAPI_MAX_NUMBER_RACH_PDUS_PER_SLOT 64 // Based on MAX_NUM_PRACH_DET +#define FAPI_MAX_PDUS_PER_SLOT 64 +#define FAPI_MAX_NUM_TLVS_START 3 // Based on Timer Mode requirement. +#define FAPI_MAX_NUM_TLVS_SHUTDOWN 1 // Based on Timer Mode requirement. +#define FAPI_MAX_UCI_BIT_BYTE_LEN 256 + + enum ul_tti_pdu_type_e { + FAPI_PRACH_PDU_TYPE = 0, + FAPI_PUSCH_PDU_TYPE, + FAPI_PUCCH_PDU_TYPE, + FAPI_SRS_PDU_TYPE, + FAPI_UL_TTI_PDU_TYPE_MAX + }; + + enum dl_tti_pdu_type_e { + FAPI_PDCCH_PDU_TYPE = 0, + FAPI_PDSCH_PDU_TYPE, + FAPI_CSIRS_PDU_TYPE, + FAPI_PBCH_PDU_TYPE, + FAPI_DL_TTI_PDU_TYPE_MAX + }; + +//------------------------------------------------------------------------------------------------------------ +// Updated per 5G FAPI + typedef struct { + uint8_t num_msg; + // Can be used for Phy Id or Carrier Id 5G FAPI Table 3-2 + uint8_t handle; + } __attribute__((packed)) fapi_msg_header_t, *p_fapi_msg_header_t; + +// Updated per 5G FAPI + typedef struct { + uint8_t numMsg; + uint8_t opaque; + uint16_t msg_id; + uint32_t length; // Length of the message body in bytes 5G FAPI Table 3-3 + } __attribute__((packed)) fapi_msg_t; + +// Updated per 5G FAPI + typedef struct { + uint16_t tag; + uint16_t length; // 5G FAPI Table 3-7 Fixed part + } __attribute__((packed)) fapi_tl_t; + +// Updated per 5G FAPI + typedef struct { + fapi_tl_t tl; + uint8_t value; // TLV with byte value + uint8_t rsv[3]; // Per 5g FAPI 3.3.1.4 the lenght of the value parameter must be 32 bits + } __attribute__((packed)) fapi_uint8_tlv_t; + + typedef struct { + fapi_tl_t tl; + uint8_t *value; // TLV with unsigned 32 bit value + } __attribute__((packed)) fapi_uint8_ptr_tlv_t; + + typedef struct { + uint16_t tag; + uint32_t length; // 5G FAPI Table 3-7 Fixed part + union + { + uint32_t *ptr; // TLV with unsigned 32 bit value + uint32_t direct[1000]; // TLV with unsigned 32 bit value + }value; + } __attribute__((packed)) fapi_uint32_ptr_tlv_t; + +// Updated per 5G FAPI + typedef struct { + fapi_tl_t tl; + uint16_t value; // TLV with unsigned 16 bit value + uint8_t rsv[2]; // Per 5g FAPI 3.3.1.4 the lenght of the value parameter must be 32 bits + } __attribute__((packed)) fapi_uint16_tlv_t; + +// Updated per 5G FAPI + typedef struct { + fapi_tl_t tl; + int16_t value; // TLV with signed 16 bit value + uint8_t rsv[2]; // Per 5g FAPI 3.3.1.4 the lenght of the value parameter must be 32 bits + } __attribute__((packed)) fapi_int16_tlv_t; + +// Updated per 5G FAPI + typedef struct { + fapi_tl_t tl; + uint32_t value; // TLV with unsigned 32 bit value + } __attribute__((packed)) fapi_uint32_tlv_t; + +// Updated per 5G FAPI + typedef struct { + uint16_t tag; // In 5G FAPI for Cell Params inside Table 3-9 under NumConfigTLVsToReport Loop + uint8_t length; + uint8_t value; + } __attribute__((packed)) fapi_config_tlv_t; + + typedef struct { + fapi_tl_t tl; + uint16_t value[FAPI_NUMEROLOGIES]; + uint16_t rsv; // To be 32-bit aligned, if FAPI_NUMEROLOGIES changes to some other value than 5 please ensure 32 bit alignment + } __attribute__((packed)) fapi_config_num_tlv_t; + +// Updated per 5G FAPI + typedef struct { + fapi_msg_t header; // For PARAM.req message length in fapi_msg_t is zero per 5G FAPI 3.3.1.1 + } __attribute__((packed)) fapi_param_req_t; + +// Updated per 5G FAPI + typedef struct { + fapi_uint16_tlv_t releaseCapability; + fapi_uint16_tlv_t phyState; + fapi_uint8_tlv_t skipBlankDlConfig; + fapi_uint8_tlv_t skipBlankUlConfig; + fapi_uint16_tlv_t numTlvsToReport; + fapi_config_tlv_t tlvStatus[FAPI_MAX_NUM_TLVS_CONFIG]; // 5G FAPI Table 3-9 + } __attribute__((packed)) fapi_cell_parms_t; + +// Updated per 5G FAPI + typedef struct { + fapi_uint8_tlv_t cyclicPrefix; + fapi_uint8_tlv_t supportedSubcarrierSpacingDl; + fapi_uint16_tlv_t supportedBandwidthDl; + fapi_uint8_tlv_t supportedSubcarrierSpecingsUl; + fapi_uint16_tlv_t supportedBandwidthUl; // 5G FAPI Table 3-10 + } __attribute__((packed)) fapi_carrier_parms_t; + +// Updated per 5G FAPI + typedef struct { + fapi_uint8_tlv_t cceMappingType; + fapi_uint8_tlv_t coresetOutsideFirst3OfdmSymsOfSlot; + fapi_uint8_tlv_t precoderGranularityCoreset; + fapi_uint8_tlv_t pdcchMuMimo; + fapi_uint8_tlv_t pdcchPrecoderCycling; + fapi_uint8_tlv_t maxPdcchsPerSlot; // 5G FAPI Table 3-11 + } __attribute__((packed)) fapi_pdcch_parms_t; + +// Updated per 5G FAPI + typedef struct { + fapi_uint8_tlv_t pucchFormats; + fapi_uint8_tlv_t maxPucchsPerSlot; // 5G FAPI Table 3-12 + } __attribute__((packed)) fapi_pucch_parms_t; + +// Updated per 5G FAPI + typedef struct { + fapi_uint8_tlv_t pdschMappingType; + fapi_uint8_tlv_t pdschAllocationTypes; + fapi_uint8_tlv_t pdschVrbToPrbMapping; + fapi_uint8_tlv_t pdschCbg; + fapi_uint8_tlv_t pdschDmrsConfigTypes; + fapi_uint8_tlv_t pdschDmrsMaxLength; + fapi_uint8_tlv_t pdschDmrsAdditionalPos; + fapi_uint8_tlv_t maxPdschsTBsPerSlot; + fapi_uint8_tlv_t maxNumberMimoLayersPdsch; + fapi_uint8_tlv_t supportedMaxModulationOrderDl; + fapi_uint8_tlv_t maxMuMimoUsersDl; + fapi_uint8_tlv_t pdschDataInDmrsSymbols; + fapi_uint8_tlv_t premptionSupport; + fapi_uint8_tlv_t pdschNonSlotSupport; // 5G FAPI Table 3-13 + } __attribute__((packed)) fapi_pdsch_parms_t; + +// Updated per 5G FAPI + typedef struct { + fapi_uint8_tlv_t uciMuxUlschInPusch; + fapi_uint8_tlv_t uciOnlyPusch; + fapi_uint8_tlv_t puschFrequencyHopping; + fapi_uint8_tlv_t puschDmrsConfigTypes; + fapi_uint8_tlv_t puschDmrsMaxLen; + fapi_uint8_tlv_t puschDmrsAdditionalPos; + fapi_uint8_tlv_t puschCbg; + fapi_uint8_tlv_t puschMappingType; + fapi_uint8_tlv_t puschAllocationTypes; + fapi_uint8_tlv_t puschVrbToPrbMapping; + fapi_uint8_tlv_t puschMaxPtrsPorts; + fapi_uint8_tlv_t maxPduschsTBsPerSlot; + fapi_uint8_tlv_t maxNumberMimoLayersNonCbPusch; + fapi_uint8_tlv_t supportedModulationOrderUl; + fapi_uint8_tlv_t maxMuMimoUsersUl; + fapi_uint8_tlv_t dftsOfdmSupport; + fapi_uint8_tlv_t puschAggregationFactor; // 5G FAPI Table 3-14 + } __attribute__((packed)) fapi_pusch_parms_t; + +// Updated per 5G FAPI + typedef struct { + fapi_uint8_tlv_t prachLongFormats; + fapi_uint16_tlv_t prachShortFormats; + fapi_uint8_tlv_t prachRestrictedSets; + fapi_uint8_tlv_t maxPrachFdOccasionsInASlot; // 5G FAPI Table 3-15 + } __attribute__((packed)) fapi_prach_parms_t; + +// Updated per 5G FAPI + typedef struct { + fapi_uint8_tlv_t rssiMeasurementSupport; // 5G FAPI Table 3-16 + } __attribute__((packed)) fapi_meas_parms_t; + +// Updated per 5G FAPI + typedef struct { + fapi_cell_parms_t cell_parms; + fapi_carrier_parms_t carr_parms; + fapi_pdcch_parms_t pdcch_parms; + fapi_pucch_parms_t pucch_parms; + fapi_pdsch_parms_t pdsch_parms; + fapi_pusch_parms_t pusch_parms; + fapi_prach_parms_t prach_parms; + fapi_meas_parms_t meas_parms; // 5G FAPI Table 3-8 + } __attribute__((packed)) fapi_params_t; + +// Updated per 5G FAPI + typedef struct { + fapi_msg_t header; + uint8_t error_code; + uint8_t number_of_tlvs; + fapi_uint16_tlv_t tlvs[FAPI_MAX_NUM_TLVS_PARAMS]; // 5G FAPI Table 3-5 + } __attribute__((packed)) fapi_param_resp_t; + +// Updated per 5G FAPI + typedef struct { + fapi_uint16_tlv_t dlBandwidth; + fapi_uint32_tlv_t dlFrequency; + fapi_config_num_tlv_t dlk0; + fapi_config_num_tlv_t dlGridSize; + fapi_uint16_tlv_t numTxAnt; + fapi_uint16_tlv_t uplinkBandwidth; + fapi_uint32_tlv_t uplinkFrequency; + fapi_config_num_tlv_t ulk0; + fapi_config_num_tlv_t ulGridSize; + fapi_uint16_tlv_t numRxAnt; + fapi_uint8_tlv_t frequencyShift7p5KHz; // 5G FAPI Table 3-21 + } __attribute__((packed)) fapi_carrier_config_t; + +// Updated per 5G FAPI + typedef struct { + fapi_uint8_tlv_t phyCellId; + fapi_uint8_tlv_t frameDuplexType; // 5G FAPI Table 3-22 + } __attribute__((packed)) fapi_cell_config_t; + +// Updated per 5G FAPI + typedef struct { + fapi_uint32_tlv_t ssPbchPower; + fapi_uint8_tlv_t bchPayload; + fapi_uint8_tlv_t scsCommon; // 5G FAPI Table 3-23 + } __attribute__((packed)) fapi_ssb_config_t; + +// Updated per 5G FAPI + typedef struct { + fapi_uint16_tlv_t prachRootSequenceIndex; + fapi_uint8_tlv_t numRootSequences; + fapi_uint16_tlv_t k1; + fapi_uint8_tlv_t prachZeroCorrConf; + fapi_uint16_tlv_t numUnusedRootSequences; // 5G FAPI Table 3-24 Subset + fapi_uint16_tlv_t unusedRootSequences[FAPI_MAX_NUM_UNUSED_ROOT_SEQUENCES]; + } __attribute__((packed)) fapi_prachFdOccasion_t; + +// Updated per 5G FAPI_ + typedef struct { + fapi_uint8_tlv_t prachSequenceLength; + fapi_uint8_tlv_t prachSubCSpacing; + fapi_uint8_tlv_t restrictedSetConfig; + fapi_uint8_tlv_t numPrachFdOccasions; + fapi_uint8_tlv_t prachConfigIndex; + fapi_prachFdOccasion_t prachFdOccasion[FAPI_MAX_NUM_PRACH_FD_OCCASIONS]; + fapi_uint8_tlv_t ssbPerRach; + fapi_uint8_tlv_t prachMultipleCarriersInABand; // 5G FAPI Table 3-24 + } __attribute__((packed)) fapi_prach_configuration_t; + +//Updated per 5G FAPI + typedef struct { + fapi_uint16_tlv_t ssbOffsetPointA; + fapi_uint8_tlv_t betaPss; + fapi_uint8_tlv_t ssbPeriod; + fapi_uint8_tlv_t ssbSubCarrierOffset; + fapi_uint32_tlv_t mib; + fapi_uint32_tlv_t ssbMask[2]; + fapi_uint8_tlv_t beamId[64]; + fapi_uint8_tlv_t ssPbchMultipleCarriersInABand; + fapi_uint8_tlv_t multipleCellsSsPbchInACarrier; // 5G FAPI Table 3-25 + } __attribute__((packed)) fapi_ssb_table_t; + +// Updated per 5G FAPI + typedef struct { + fapi_uint8_tlv_t slotConfig[FAPI_MAX_NUM_OF_SYMBOLS_PER_SLOT]; // 5G FAPI Table 3-26 Subset + } __attribute__((packed)) fapi_slotconfig_t; + +// Updated per 5G FAPI + typedef struct { + fapi_uint8_tlv_t tddPeriod; + fapi_slotconfig_t slotConfig[FAPI_MAX_TDD_PERIODICITY]; // 5G FAPI Table 3-26 + } __attribute__((packed)) fapi_tdd_table_t; + +// Updated per 5G FAPI + typedef struct { + fapi_uint8_tlv_t rssiMeasurement; // 5G FAPI Table 3-27 + } __attribute__((packed)) fapi_meas_config_t; + +// Updated per 5G FAPI + typedef struct { + int16_t digBeamWeightRe; + int16_t digBeamWeightIm; // 5G FAPI Table 3-32 Subset + } __attribute__((packed)) fapi_dig_beam_weight_t; + +// Updated per 5G FAPI + typedef struct { + uint16_t beamIdx; + fapi_dig_beam_weight_t digBeamWeight[FAPI_MAX_NUMBER_TX_RUS]; // 5G FAPI Table 3-32 Subset + } __attribute__((packed)) fapi_dig_beam_config_t; + +// Updated per 5G FAPI + typedef struct { + uint16_t numDigBeams; + uint16_t numTxRus; + fapi_dig_beam_config_t digBeam[FAPI_MAX_NUMBER_OF_BEAMS]; // 5G FAPI Table 3-32 + } __attribute__((packed)) fapi_beamforming_table_t; + typedef struct { + int16_t preCoderWeightRe; + int16_t preCoderWeightIm; // 5G FAPI Table 3-33 Subset + } __attribute__((packed)) fapi_precoderWeight_t; + +// Updated per 5G FAPI + typedef struct { + fapi_precoderWeight_t precoder_weight[FAPI_MAX_NUM_ANT_PORTS]; // 5G FAPI Table 3-33 Subset + } __attribute__((packed)) fapi_precoder_weight_t; + +// Updated per 5G FAPI + typedef struct { + uint16_t pmIdx; + uint16_t numLayers; + uint16_t numAntPorts; + fapi_precoder_weight_t precoderWeight[FAPI_MAX_NUM_LAYERS]; // 5G FAPI Table 3-33 + } __attribute__((packed)) fapi_precoding_table_t; + +// Updated per 5G FAPI + typedef struct { + fapi_carrier_config_t carrierConfig; + fapi_cell_config_t cellConfig; + fapi_ssb_config_t ssbConfig; + fapi_prach_configuration_t prachConfig; + fapi_ssb_table_t ssbTable; + fapi_tdd_table_t tddTable; + fapi_meas_config_t measConfig; + fapi_beamforming_table_t beamformingTable; + fapi_precoding_table_t precodingTable; // 5G FAPI Table 3-20 + } __attribute__((packed)) fapi_config_t; + typedef struct { + fapi_msg_t header; + uint16_t number_of_tlvs; + fapi_uint32_tlv_t tlvs[FAPI_MAX_NUM_TLVS_CONFIG]; // 5G FAPI Table 3-17 + } __attribute__((packed)) fapi_config_req_t; + +// Updated per 5G FAPI + typedef struct { + fapi_msg_t header; + uint8_t error_code; + uint8_t number_of_invalid_tlvs; + uint8_t number_of_inv_tlvs_idle_only; + uint8_t number_of_inv_tlvs_running_only; + uint8_t number_of_missing_tlvs; + fapi_uint16_tlv_t tlvs[4 * FAPI_MAX_NUM_TLVS_CONFIG]; // 5G FAPI Table 3-18 + // fapi_uint16_tlv_t unsupported_or_invalid_tlvs[FAPI_MAX_NUMBER_UNSUPPORTED_TLVS]; + // fapi_uint16_tlv_t invalid_idle_only_tlvs[FAPI_MAX_NUMBER_OF_INVALID_IDLE_ONLY_TLVS]; + // fapi_uint16_tlv_t invalid_running_only_tlvs[FAPI_MAX_NUMBER_OF_INVALID_RUNNING_ONLY_TLVS]; + // fapi_uint16_tlv_t missing_tlvs[FAPI_MAX_NUMBER_OF_MISSING_TLVS]; + } __attribute__((packed)) fapi_config_resp_t; + +// Updated per 5G FAPI + typedef struct { + fapi_msg_t header; + } __attribute__((packed)) fapi_start_req_t; + +// Updated per 5G FAPI + typedef struct { + fapi_msg_t header; // Message Length is zero for STOP.request + } __attribute__((packed)) fapi_stop_req_t; + +// Updated per 5G FAPI + typedef struct { + fapi_msg_t header; // Message Length is zero for STOP.indication + } __attribute__((packed)) fapi_stop_ind_t; + +// Updated per 5G FAPI + typedef struct { + fapi_msg_t header; + uint16_t sfn; + uint16_t slot; + uint8_t message_id; + uint8_t error_code; // 5G FAPI Table 3-30 + } __attribute__((packed)) fapi_error_ind_t; + +// Updated per 5G FAPI + typedef struct { + fapi_msg_t header; + uint16_t sfn; + uint16_t slot; // 5G FAPI Table 3-34 + } __attribute__((packed)) fapi_slot_ind_t; + +// Updated per 5G FAPI + typedef struct { + uint16_t beamidx; // 5G FAPI Table 3-43 subset + } __attribute__((packed)) fapi_bmi_t; + +// Updated per 5G FAPI + typedef struct { + uint16_t pmIdx; + fapi_bmi_t beamIdx[FAPI_MAX_NUM_DIGBFINTERFACES]; // 5G FAPI Table 3-43 subset + } __attribute__((packed)) fapi_pmi_bfi_t; + +// Updated per 5G FAPI + typedef struct { + uint16_t numPrgs; + uint16_t prgSize; + uint8_t digBfInterfaces; + fapi_pmi_bfi_t pmi_bfi[FAPI_MAX_NUM_PRGS_PER_TTI]; // 5G FAPI Table 3-43 + } __attribute__((packed)) fapi_precoding_bmform_t; + +// Updated per 5G FAPI + typedef struct { + uint16_t rnti; + uint16_t scramblingId; + uint16_t scramblingRnti; + uint8_t cceIndex; + uint8_t aggregationLevel; + fapi_precoding_bmform_t pc_and_bform; + uint8_t beta_pdcch_1_0; + uint8_t powerControlOffsetSS; + uint16_t payloadSizeBits; + uint8_t payload[FAPI_DCI_PAYLOAD_BYTE_LEN]; // 5G FAPI Table 3-37 + } __attribute__((packed)) fapi_dl_dci_t; + +// Updated per 5G FAPI + typedef struct { + uint16_t bwpSize; + uint16_t bwpStart; + uint8_t subCarrierSpacing; + uint8_t cyclicPrefix; + uint8_t startSymbolIndex; + uint8_t durationSymbols; + uint8_t freqDomainResource[6]; + uint8_t cceRegMappingType; + uint8_t regBundleSize; + uint8_t interleaverSize; + uint8_t coreSetType; + uint16_t shiftIndex; + uint8_t precoderGranularity; + uint16_t numDlDci; // 5G FAPI Table 3-36 + fapi_dl_dci_t dlDci[FAPI_MAX_NUMBER_DL_DCI]; + } __attribute__((packed)) fapi_dl_pdcch_pdu_t; + + // Updated per 5G FAPI + typedef struct { + uint16_t targetCodeRate; + uint8_t qamModOrder; + uint8_t mcsIndex; + uint8_t mcsTable; + uint8_t rvIndex; + uint32_t tbSize; // 5G FAPI Table 3-38 Subset + } __attribute__((packed)) fapi_codeword_pdu_t; + + typedef struct + { + uint8_t ldpcBaseGraph; + uint32_t tbSizeLbrmBytes; + } __attribute__((packed))fapi_pdsch_maintenance_param_v3; + + // Updated per 5G FAPI + typedef struct { + uint16_t pduBitMap; + uint16_t rnti; + uint16_t pdu_index; + uint16_t bwpSize; + uint16_t bwpStart; + uint8_t subCarrierSpacing; + uint8_t cyclicPrefix; + uint8_t nrOfCodeWords; + fapi_codeword_pdu_t cwInfo[FAPI_MAX_NUMBER_OF_CODEWORDS_PER_PDU]; + uint16_t dataScramblingId; + uint8_t nrOfLayers; + uint8_t transmissionScheme; + uint8_t refPoint; + uint16_t dlDmrsSymbPos; + uint8_t dmrsConfigType; + uint16_t dlDmrsScramblingId; + uint8_t scid; + uint8_t numDmrsCdmGrpsNoData; + uint16_t dmrsPorts; + uint8_t resourceAlloc; + uint8_t rbBitmap[36]; + uint16_t rbStart; + uint16_t rbSize; + uint8_t vrbToPrbMapping; + uint8_t startSymbIndex; + uint8_t nrOfSymbols; + uint8_t ptrsPortIndex; + uint8_t ptrsTimeDensity; + uint8_t ptrsFreqDensity; + uint8_t ptrsReOffset; + uint8_t nEpreRatioOfPdschToPtrs; + fapi_precoding_bmform_t preCodingAndBeamforming; + uint8_t powerControlOffset; + uint8_t powerControlOffsetSS; + uint8_t isLastCbPresent; + uint8_t isInlineTbCrc; + uint32_t dlTbCrc; // 5G FAPI Table 3-38 + fapi_pdsch_maintenance_param_v3 maintParamV3; + } __attribute__((packed)) fapi_dl_pdsch_pdu_t; + + // Updated per 5G FAPI + typedef struct { + uint16_t bwpSize; + uint16_t bwpStart; + uint8_t subCarrierSpacing; + uint8_t cyclicPrefix; + uint16_t startRb; + uint16_t nrOfRbs; + uint8_t csiType; + uint8_t row; + uint16_t freqDomain; + uint8_t symbL0; + uint8_t symbL1; + uint8_t cdmType; + uint8_t freqDensity; + uint16_t scramId; + uint8_t powerControlOffset; + uint8_t powerControlOffsetSs; + fapi_precoding_bmform_t preCodingAndBeamforming; // 5G FAPI Table 3-39 + } __attribute__((packed)) fapi_dl_csi_rs_pdu_t; + +// Updated per 5G FAPI + typedef struct { + uint8_t dmrsTypeAPosition; + uint8_t pdcchConfigSib1; + uint8_t cellBarred; + uint8_t intraFreqReselection; // 5G FAPI Table 3-42 + } __attribute__((packed)) fapi_phy_mib_pdu_t; + +// Updated per 5G FAPI + typedef struct { + union { + uint32_t bchPayload; + fapi_phy_mib_pdu_t phyMibPdu; // 5G FAPI Table 3-40 Subset + }; + } __attribute__((packed)) fapi_bch_payload_t; + + // Updated per 5G FAPI + typedef struct { + uint16_t physCellId; + uint8_t betaPss; + uint8_t ssbBlockIndex; + uint8_t ssbSubCarrierOffset; + uint16_t ssbOffsetPointA; + uint8_t bchPayloadFlag; + fapi_bch_payload_t bchPayload; + fapi_precoding_bmform_t preCodingAndBeamforming; // 5G FAPI Table 3-40 + } __attribute__((packed)) fapi_dl_ssb_pdu_t; + +// Updated per 5G FAPI + typedef struct { + uint16_t pduType; + uint16_t pduSize; + union { + fapi_dl_pdcch_pdu_t pdcch_pdu; + fapi_dl_pdsch_pdu_t pdsch_pdu; + fapi_dl_csi_rs_pdu_t csi_rs_pdu; + fapi_dl_ssb_pdu_t ssb_pdu; // 5G FAPI Table 3-35 Subset + } pdu; + } __attribute__((packed)) fapi_dl_tti_req_pdu_t; + +// Updated per 5G FAPI + typedef struct { + uint8_t nUe; + uint8_t pduIdx[FAPI_MAX_NUMBER_OF_UES_PER_TTI]; // 5G FAPI Subset Table 3-35 and Table 3-44 + } __attribute__((packed)) fapi_ue_info_t; + +// Updated per 5G FAPI + typedef struct { + fapi_msg_t header; + uint16_t sfn; + uint16_t slot; + uint8_t nPdus; + uint8_t nGroup; + fapi_dl_tti_req_pdu_t pdus[FAPI_MAX_PDUS_PER_SLOT]; // 5G FAPI Table 3-35 + fapi_ue_info_t ue_grp_info[FAPI_MAX_NUMBER_OF_GROUPS_PER_TTI]; + } __attribute__((packed)) fapi_dl_tti_req_t; + +// Updated per 5G FAPI + typedef struct { + uint8_t rvIndex; + uint8_t harqProcessId; + uint8_t newDataIndicator; + uint32_t tbSize; + uint16_t numCb; // 5G FAPI Table 3-47 + uint8_t cbPresentAndPosition[2]; // Since the maximum number of Code Blocks per TCB in a CBG is 8 for 1 CW or 4 for 2CW and this is a bit field with pading to align to 32 bits + } __attribute__((packed)) fapi_pusch_data_t; + +// Updated per 5G FAPI + typedef struct { + uint16_t harqAckBitLength; + uint16_t csiPart1BitLength; + uint16_t csiPart2BitLength; + uint8_t alphaScaling; + uint8_t betaOffsetHarqAck; + uint8_t betaOffsetCsi1; + uint8_t betaOffsetCsi2; // 5G FAPI Table 3-48 + } __attribute__((packed)) fapi_pusch_uci_t; + +// Updated per 5G FAPI + typedef struct { + uint16_t ptrsPortIndex; + uint8_t ptrsDmrsPort; + uint8_t ptrsReOffset; // 5G FAPI Table 3-49 Subset + } __attribute__((packed)) fapi_ptrs_info_t; + +// Updated per 5G FAPI + typedef struct { + uint8_t numPtrsPorts; + fapi_ptrs_info_t ptrsInfo[FAPI_MAX_NUM_PTRS_PORTS]; + uint8_t ptrsTimeDensity; + uint8_t ptrsFreqDensity; // 5G FAPI Table 3-49 Subset + uint8_t ulPtrsPower; + } __attribute__((packed)) fapi_pusch_ptrs_t; + +// Updated per 5G FAPI + typedef struct { + uint8_t lowPaprGroupNumber; + uint16_t lowPaprSequenceNumber; + uint8_t ulPtrsSampleDensity; + uint8_t ulPtrsTimeDensityTransformPrecoding; + } __attribute__((packed)) fapi_dfts_ofdm_t; + +// Updated per 5G FAPI + typedef struct { + fapi_bmi_t beamIdx[FAPI_MAX_NUM_DIGBFINTERFACES]; + } __attribute__((packed)) fapi_rx_bfi_t; + +// Updated per 5G FAPI + typedef struct { + uint8_t trp_scheme; + uint16_t numPrgs; + uint16_t prgSize; + uint8_t digBfInterface; + fapi_rx_bfi_t rx_bfi[FAPI_MAX_NUM_PRGS_PER_TTI]; // 5G FAPI Table 3-53 + } __attribute__((packed)) fapi_ul_rx_bmform_pdu_t; + +// Updated per 5G FAPI + typedef struct { + uint16_t physCellId; + uint8_t numPrachOcas; + uint8_t prachFormat; + uint8_t numRa; + uint8_t prachStartSymbol; + uint16_t numCs; + fapi_ul_rx_bmform_pdu_t beamforming; + } __attribute__((packed)) fapi_ul_prach_pdu_t; + +// Updated per 5G FAPI + typedef struct { + uint16_t pduBitMap; + uint16_t rnti; + uint32_t handle; + uint16_t bwpSize; + uint16_t bwpStart; + uint8_t subCarrierSpacing; + uint8_t cyclicPrefix; + uint16_t targetCodeRate; + uint8_t qamModOrder; + uint8_t mcsIndex; + uint8_t mcsTable; + uint8_t transformPrecoding; + uint16_t dataScramblingId; + uint8_t nrOfLayers; + uint16_t ulDmrsSymbPos; + uint8_t dmrsConfigType; + uint16_t ulDmrsScramblingId; + uint16_t puschIdentity; //ADDED as per : 55G FAPI: PHY API Version: 222.10.02 + uint8_t scid; + uint8_t numDmrsCdmGrpsNoData; + uint16_t dmrsPorts; + uint8_t resourceAlloc; + uint8_t rbBitmap[36]; + uint16_t rbStart; + uint16_t rbSize; + uint8_t vrbToPrbMapping; + uint8_t frequencyHopping; + uint16_t txDirectCurrentLocation; + uint8_t uplinkFrequencyShift7p5khz; + uint8_t startSymbIndex; + uint8_t nrOfSymbols; + fapi_pusch_data_t puschData; + fapi_pusch_uci_t puschUci; + fapi_pusch_ptrs_t puschPtrs; + fapi_dfts_ofdm_t dftsOfdm; + fapi_ul_rx_bmform_pdu_t beamforming; // 5G FAPI Table 3-46 + fapi_pdsch_maintenance_param_v3 maintParamV3; + } __attribute__((packed)) fapi_ul_pusch_pdu_t; + +// Updated per 5G FAPI + typedef struct { + uint16_t rnti; + uint32_t handle; + uint16_t bwpSize; + uint16_t bwpStart; + uint8_t subCarrierSpacing; + uint8_t cyclicPrefix; + uint8_t formatType; + uint8_t multiSlotTxIndicator; + uint8_t pi2Bpsk; + uint16_t prbStart; + uint16_t prbSize; + uint8_t startSymbolIndex; + uint8_t nrOfSymbols; + uint8_t freqHopFlag; + uint16_t secondHopPrb; + uint8_t groupHopFlag; + uint8_t sequenceHopFlag; + uint16_t hoppingId; + uint16_t initialCyclicShift; + uint16_t dataScramblingId; + uint8_t timeDomainOccIdx; + uint8_t preDftOccIdx; + uint8_t preDftOccLen; + uint8_t addDmrsFlag; + uint16_t dmrsScramblingId; + uint8_t dmrsCyclicShift; + uint8_t srFlag; + uint16_t bitLenHarq; + uint16_t bitLenCsiPart1; + uint16_t bitLenCsiPart2; + fapi_ul_rx_bmform_pdu_t beamforming; // 5G FAPI Table 3-51 + } __attribute__((packed)) fapi_ul_pucch_pdu_t; + + typedef struct { + uint16_t srs_bandwidth_start; + uint8_t sequence_group; + uint8_t sequence_number; + } __attribute__((packed)) fapi_v4_srs_param_symbols_t; + + typedef struct { + uint16_t srs_bandwidth_size; + fapi_v4_srs_param_symbols_t symbol_list[4]; + uint32_t usage; + uint8_t report_type[4]; + uint8_t singular_Value_representation; + uint8_t iq_representation; + uint16_t prg_size; + uint8_t num_total_ue_antennas; + uint32_t ue_antennas_in_this_srs_resource_set; + uint32_t sampled_ue_antennas; + uint8_t report_scope; + uint8_t num_ul_spatial_streams_ports; + uint8_t Ul_spatial_stream_ports[2]; + } __attribute__((packed)) fapi_v4_srs_parameters_t; + +// Updated per 5G FAPI + typedef struct { + uint16_t rnti; + uint32_t handle; + uint16_t bwpSize; + uint16_t bwpStart; + uint8_t subCarrierSpacing; + uint8_t cyclicPrefix; + uint8_t numAntPorts; + uint8_t numSymbols; + uint8_t numRepetitions; + uint8_t timeStartPosition; + uint8_t configIndex; + uint16_t sequenceId; + uint8_t bandwidthIndex; + uint8_t combSize; + uint8_t combOffset; + uint8_t cyclicShift; + uint8_t frequencyPosition; + uint16_t frequencyShift; + uint8_t frequencyHopping; + uint8_t groupOrSequenceHopping; + uint8_t resourceType; + uint16_t tSrs; + uint16_t tOffset; + fapi_ul_rx_bmform_pdu_t beamforming; // 5G FAPI Table 3-52 + fapi_v4_srs_parameters_t v4SrsParam; + } __attribute__((packed)) fapi_ul_srs_pdu_t; + +// Updated per 5G FAPI + typedef struct { + uint16_t pduType; + uint16_t pduSize; + union { + fapi_ul_prach_pdu_t prach_pdu; + fapi_ul_pusch_pdu_t pusch_pdu; + fapi_ul_pucch_pdu_t pucch_pdu; + fapi_ul_srs_pdu_t srs_pdu; + } pdu; + } __attribute__((packed)) fapi_ul_tti_req_pdu_t; + +// Updated per 5G FAPI + typedef struct { + fapi_msg_t header; + uint16_t sfn; + uint16_t slot; + uint8_t nPdus; + uint8_t rachPresent; + uint8_t nUlsch; + uint8_t nUlcch; + uint8_t nGroup; + fapi_ul_tti_req_pdu_t pdus[FAPI_MAX_NUMBER_UL_PDUS_PER_TTI]; // 5G FAPI Table 3-44 + fapi_ue_info_t ueGrpInfo[FAPI_MAX_NUMBER_OF_GROUPS_PER_TTI]; + } __attribute__((packed)) fapi_ul_tti_req_t; + +// Updated per 5G FAPI + typedef struct { + uint16_t pduType; + uint16_t pduSize; + fapi_dl_pdcch_pdu_t pdcchPduConfig; // 5G FAPI Table 3-54 Subset + } __attribute__((packed)) fapi_dci_pdu_t; + + // Updated per 5G FAPI + typedef struct { + fapi_msg_t header; + uint16_t sfn; + uint16_t slot; + uint8_t numPdus; + fapi_dci_pdu_t pdus[FAPI_MAX_NUMBER_UCI_PDUS_PER_SLOT]; // 5G FAPI Table 3-54 + } __attribute__((packed)) fapi_ul_dci_req_t; + +// Updated per 5G FAPI +typedef struct { + uint32_t pdu_length; + uint16_t pdu_index; + uint32_t num_tlvs; + fapi_uint32_ptr_tlv_t tlvs[FAPI_MAX_NUMBER_OF_TLVS_PER_PDU]; // 5G FAPI Table 3-58 Subset + } __attribute__((packed)) fapi_tx_pdu_desc_t; + +// Updated per 5G FAPI + typedef struct { + fapi_msg_t header; + uint16_t sfn; + uint16_t slot; + uint16_t num_pdus; + fapi_tx_pdu_desc_t pdu_desc[FAPI_MAX_NUMBER_DL_PDUS_PER_TTI]; // 5G FAPI Table 3-58 + } __attribute__((packed)) fapi_tx_data_req_t; + +// Updated per 5G FAPI + typedef struct { + uint32_t handle; + uint16_t rnti; + uint8_t harqId; + uint32_t pdu_length; + uint8_t ul_cqi; + uint16_t timingAdvance; + uint16_t rssi; + void *pduData; // 5G FAPI Table 3-61 Subset + } __attribute__((packed)) fapi_pdu_ind_info_t; + + // Updated per 5G FAPI + typedef struct { + fapi_msg_t header; + uint16_t sfn; + uint16_t slot; + uint16_t numPdus; + fapi_pdu_ind_info_t pdus[FAPI_MAX_NUMBER_OF_ULSCH_PDUS_PER_SLOT]; // 5G FAPI Table 3-61 + } __attribute__((packed)) fapi_rx_data_indication_t; + +// Updated per 5G FAPI + typedef struct { + uint32_t handle; + uint16_t rnti; + uint8_t harqId; + uint8_t tbCrcStatus; + uint16_t numCb; + uint8_t cbCrcStatus[FAPI_MAX_NUM_CB_PER_TTI_IN_BYTES]; // 5G FAPI Table 3-62 subset + uint8_t ul_cqi; + uint16_t timingAdvance; + uint16_t rssi; + } __attribute__((packed)) fapi_crc_ind_info_t; + +// Updated per 5G FAPI + typedef struct { + fapi_msg_t header; + uint16_t sfn; + uint16_t slot; + uint16_t numCrcs; + fapi_crc_ind_info_t crc[FAPI_MAX_NUMBER_OF_CRCS_PER_SLOT]; // 5G FAPI Table 3-62 + } __attribute__((packed)) fapi_crc_ind_t; + +// Updated per 5G FAPI + typedef struct { + uint8_t harqCrc; + uint16_t harqBitLen; + uint8_t harqPayload[FAPI_MAX_HARQ_INFO_LEN_BYTES]; // 5G FAPI Table 3-70 + } __attribute__((packed)) fapi_harq_info_t; + +// Updated per 5G FAPI + typedef struct { + uint8_t csiPart1Crc; + uint16_t csiPart1BitLen; + uint8_t csiPart1Payload[FAPI_MAX_CSI_PART1_DATA_BYTES]; // 5G FAPI Table 3-71 + } __attribute__((packed)) fapi_csi_p1_info_t; + +// Updated per 5G FAPI + typedef struct { + uint8_t csiPart2Crc; + uint16_t csiPart2BitLen; + uint8_t csiPart2Payload[FAPI_MAX_CSI_PART2_DATA_BYTES]; // 5G FAPI Table 3-72 + } __attribute__((packed)) fapi_csi_p2_info_t; + +// Updated per 5G FAPI + typedef struct { + uint8_t pduBitmap; + uint32_t handle; + uint16_t rnti; + uint8_t ul_cqi; + uint16_t timingAdvance; + uint16_t rssi; // 5G FAPI Table 3-64 + fapi_harq_info_t harqInfo; // This is included if indicated by the pduBitmap + fapi_csi_p1_info_t csiPart1info; // This is included if indicated by the pduBitmap + fapi_csi_p2_info_t csiPart2info; // This is included if indicated by the pduBitmap + } __attribute__((packed)) fapi_uci_o_pusch_t; + +// Updated per 5G FAPI + typedef struct { + uint8_t srIndication; + uint8_t srConfidenceLevel; // 5G FAPI Table 3-67 + } __attribute__((packed)) fapi_sr_f0f1_info_t; + +// Updated per 5G FAPI + typedef struct { + uint8_t numHarq; + uint8_t harqConfidenceLevel; + uint8_t harqValue[FAPI_MAX_NUMBER_OF_HARQS_PER_IND]; // 5G FAPI Table 3-68 + } __attribute__((packed)) fapi_harq_f0f1_info_t; + +// Updated per 5G FAPI + typedef struct { + uint16_t srBitlen; + uint8_t srPayload[FAPI_MAX_SR_PAYLOAD_SIZE + 1]; // 5G FAPI Table 3-69 + } __attribute__((packed)) fapi_sr_f2f3f4_info_t; + +// Updated per 5G FAPI + typedef struct { + uint8_t harqCrc; + uint16_t harqBitLen; + uint8_t harqPayload[FAPI_MAX_HARQ_PAYLOAD_SIZE + 2]; // 5G FAPI Table 3-70 + } __attribute__((packed)) fapi_harq_f2f3f4_info_t; + +// Updated per 5G FAPI + typedef struct { + uint8_t pduBitmap; + uint32_t handle; + uint16_t rnti; + uint8_t pucchFormat; + uint8_t ul_cqi; + uint16_t timingAdvance; + uint16_t rssi; // 5G FAPI Table 3-66 + fapi_sr_f2f3f4_info_t srF2F3F4Info; //ADDED as per : 55G FAPI: PHY API Version: 222.10.02 + fapi_harq_f2f3f4_info_t harqF2F3F4Info; + fapi_csi_p1_info_t csiP1Info; + fapi_csi_p2_info_t csiP2Info; + } __attribute__((packed)) fapi_uci_o_pucch_f2f3f4_t; + +// Updated per 5G FAPI + typedef struct { + uint8_t pduBitmap; + uint32_t handle; + uint16_t rnti; + uint8_t pucchFormat; + uint8_t ul_cqi; + uint16_t timingAdvance; + uint16_t rssi; // 5G FAPI Table 3-65 + fapi_sr_f0f1_info_t srInfo; // This is included if indicated by the pduBitmap + fapi_harq_f0f1_info_t harqInfo; // This is included if indicated by the pduBitmap + } __attribute__((packed)) fapi_uci_o_pucch_f0f1_t; + +// Updated per 5G FAPI + typedef struct { + uint16_t pduType; + uint16_t pduSize; + union { + fapi_uci_o_pusch_t uciPusch; + fapi_uci_o_pucch_f0f1_t uciPucchF0F1; + fapi_uci_o_pucch_f2f3f4_t uciPucchF2F3F4; // 5G FAPI Table 3-63 subset + } uci; + } __attribute__((packed)) fapi_uci_pdu_info_t; + +// Updated per 5G FAPI + typedef struct { + fapi_msg_t header; + uint16_t sfn; + uint16_t slot; + uint16_t numUcis; // 5G FAPI Table 3-63 + fapi_uci_pdu_info_t uciPdu[FAPI_MAX_NUMBER_UCI_PDUS_PER_SLOT]; + } __attribute__((packed)) fapi_uci_indication_t; + +// Updated per 5G FAPI + typedef struct { + uint16_t numRbs; + uint8_t rbSNR[FAPI_MAX_NUMBER_RBS]; // 5G FAPI Table 3-73 Subset + } __attribute__((packed)) fapi_symb_snr_t; + + typedef struct + { + uint16_t tag; + uint32_t length; + uint32_t *value; + } __attribute__((packed)) fapi_srs_report_tlv_t; + +// Updated per 5G FAPI + typedef struct { + uint32_t handle; + uint16_t rnti; + uint16_t timingAdvance; + int16_t timingAdvanceOffsetNsec; + uint8_t srsUsage; + uint8_t reportType; + fapi_srs_report_tlv_t report_tlv; + } __attribute__((packed)) fapi_srs_pdu_t; + +// Updated per 5G FAPI + typedef struct { + fapi_msg_t header; + uint16_t sfn; + uint16_t slot; + uint16_t controlLen; + uint8_t numPdus; + fapi_srs_pdu_t srsPdus[FAPI_MAX_NUMBER_SRS_PDUS_PER_SLOT]; // 5G FAPI Table 3-73 + } __attribute__((packed)) fapi_srs_indication_t; + +// Updated per 5G FAPI + typedef struct { + uint8_t preambleIndex; + uint16_t timingAdvance; + uint32_t preamblePwr; // 5G FAPI Table 3-74 Subset + } __attribute__((packed)) fapi_preamble_info_t; + +// Updated per 5G FAPI + typedef struct { + uint16_t phyCellId; + uint8_t symbolIndex; + uint8_t slotIndex; + uint8_t freqIndex; + uint8_t avgRssi; + uint8_t avgSnr; + uint8_t numPreamble; + fapi_preamble_info_t preambleInfo[FAPI_MAX_NUM_PREAMBLES_PER_SLOT]; // 5G FAPI Table 3-74 Subset + } __attribute__((packed)) fapi_rach_pdu_t; + +// Updated per 5G FAPI + typedef struct { + fapi_msg_t header; + uint16_t sfn; + uint16_t slot; + uint8_t numPdus; + fapi_rach_pdu_t rachPdu[FAPI_MAX_NUMBER_RACH_PDUS_PER_SLOT]; // 5G FAPI Table 3-74 + } __attribute__((packed)) fapi_rach_indication_t; + +//------------------------------------------------------------------------------ + +#if defined(__cplusplus) +} +#endif +#endif diff --git a/src/intel_fapi/fapi_vendor_extension.h b/src/intel_fapi/fapi_vendor_extension.h index aa0069b24..f87eb1365 100644 --- a/src/intel_fapi/fapi_vendor_extension.h +++ b/src/intel_fapi/fapi_vendor_extension.h @@ -25,7 +25,12 @@ extern "C" { #include -#include "fapi_interface.h" +#ifdef OAI_TESTING + #include "fapi_interface_oai.h" +#else + #include "fapi_interface.h" +#endif + #define FAPI_VENDOR_MESSAGE 0x10 #define FAPI_VENDOR_EXT_SHUTDOWN_REQUEST 0x11 diff --git a/src/intel_fapi/nfapi_interface.h b/src/intel_fapi/nfapi_interface.h index d29c9ef0c..cc960b41a 100644 --- a/src/intel_fapi/nfapi_interface.h +++ b/src/intel_fapi/nfapi_interface.h @@ -21,7 +21,12 @@ #ifndef _NFAPI_INTERFACE_H #define _NFAPI_INTERFACE_H -#include "fapi_interface.h" +#ifdef OAI_TESTING + #include "fapi_interface_oai.h" +#else + #include "fapi_interface.h" +#endif + /*Table 2-7 Dedicated NFAPI message IDs*/ /*P5 Messages*/ diff --git a/src/intel_fapi/nr5g_fapi_internal.h b/src/intel_fapi/nr5g_fapi_internal.h index a1d72c2ec..4118416fd 100644 --- a/src/intel_fapi/nr5g_fapi_internal.h +++ b/src/intel_fapi/nr5g_fapi_internal.h @@ -24,7 +24,12 @@ #ifndef _NR5G_FAPI_INTELNAL_H_ #define _NR5G_FAPI_INTELNAL_H_ -#include "fapi_interface.h" +#ifdef OAI_TESTING + #include "fapi_interface_oai.h" +#else + #include "fapi_interface.h" +#endif + #include "nr5g_fapi_common_types.h" #define MAX_UL_SLOT_INFO_COUNT 20 //Maximum no of Slots for which UL_TTI.request info has to diff --git a/src/mt/mt_ss.c b/src/mt/mt_ss.c index 3579275fd..72e81872e 100644 --- a/src/mt/mt_ss.c +++ b/src/mt/mt_ss.c @@ -923,9 +923,15 @@ static int SOpenWlsIntf() { uint8_t i; void *hdl = NULLP; +#ifndef OAI_TESTING #define WLS_DEVICE_NAME "wls0" char *my_argv[] = {"gnodeb", "-c3", "--proc-type=auto", "--file-prefix", "gnb0", "--iova-mode=pa"}; +#else +#define WLS_DEVICE_NAME "wls" + + char *my_argv[] = {"gnodeb", "-c3", "--proc-type=auto", "--file-prefix", "wls", "--iova-mode=pa"}; +#endif printf("\nCalling rte_eal_init: "); for (i = 0; i < RTE_DIM(my_argv); i++) { diff --git a/src/mt/ss_pack.c b/src/mt/ss_pack.c index d02f6900b..f2ecf18c7 100644 --- a/src/mt/ss_pack.c +++ b/src/mt/ss_pack.c @@ -859,6 +859,129 @@ Buffer *mBuf /* message buffer */ } /* end of SUnpkF64 */ #endif /* SS_FLOAT */ +#ifdef OAI_TESTING +/* +* +* Fun: oduPackPostUInt8 +* +* Desc: This function packs an unsigned 8 bit value into a message. +* +* Ret: ROK - ok +* RFAILED - failed, general (optional) +* ROUTRES - failed, out of resources (optional) +* +* Notes: None +* +* File: ss_pack.c +* +*/ +uint8_t oduPackPostUInt8 +( + uint8_t in, uint8_t **out, uint16_t *total_length +) +{ + uint8_t *pOut = *out; + pOut[0] = in; + (*out) += 1; + (*total_length) += 1; // Increment the total length by 1 + return ROK; +} /* end of oduPackPostUInt8 */ + +/* +* +* Fun: oduPackPostUInt16 +* +* Desc: This function packs an unsigned 16 bit value into a message. +* +* Ret: ROK - ok +* RFAILED - failed, general (optional) +* ROUTRES - failed, out of resources (optional) +* +* Notes: None +* +* File: ss_pack.c +* +*/ + +uint8_t oduPackPostUInt16 +( + uint16_t in, uint8_t **out, uint16_t *total_length +) +{ + uint8_t *pOut = *out; + + pOut[1] = (in & 0xFF00) >> 8; + pOut[0] = (in & 0xFF); + (*out) += 2; + (*total_length) += 2; // Increment the total length by 2i + return ROK; +} /* end of oduPackPostUInt16 */ + +/* +* +* Fun: oduPackPostUInt32 +* +* Desc: This function packs an unsigned 32 bit value into a message. +* +* Ret: ROK - ok +* RFAILED - failed, general (optional) +* ROUTRES - failed, out of resources (optional) +* +* Notes: None +* +* File: ss_pack.c +* +*/ + +uint8_t oduPackPostUInt32( uint32_t in, uint8_t **out, uint16_t *total_length) +{ + uint8_t *pOut = *out; + + pOut[3] = (in & 0xFF000000) >> 24; + pOut[2] = (in & 0xFF0000) >> 16; + pOut[1] = (in & 0xFF00) >> 8; + pOut[0] = (in & 0xFF); + (*out) += 4; + + (*total_length) += 4; // Increment the total length by 4 + return ROK; + +} /* end of oduPackPostUInt32 */ + +/* +* +* Fun: oduPackPostUInt32 +* +* Desc: This function packs an unsigned 32 bit value into a message. +* This functionality is reversal of the above "oduPackPostUInt32". +* Here pOut[0th] ->MSB and so on +* +* Ret: ROK - ok +* RFAILED - failed, general (optional) +* ROUTRES - failed, out of resources (optional) +* +* Notes: None +* +* File: ss_pack.c +* +*/ + +uint8_t oduPackPostUInt32_S( uint32_t in, uint8_t **out, uint16_t *total_length) +{ + uint8_t *pOut = *out; + + pOut[0] = (in & 0xFF000000) >> 24; + pOut[1] = (in & 0xFF0000) >> 16; + pOut[2] = (in & 0xFF00) >> 8; + pOut[3] = (in & 0xFF); + (*out) += 4; + + (*total_length) += 4; // Increment the total length by 4 + return ROK; + +} /* end of oduPackPostUInt32 */ +#endif + /********************************************************************** End of file **********************************************************************/ -- 2.16.6