From d76403d03e7b7f60cd515f1b834d28278685a70b Mon Sep 17 00:00:00 2001 From: sphoorthi Date: Tue, 25 May 2021 15:05:39 +0530 Subject: [PATCH] Fix for DMRS symbols overlap with PDSCH/PUSCH symbols (as per ODU-Low limitation) [Issue-ID: ODUHIGH-339] Change-Id: I89edf8d9072152d4f6c12a76d166ab62c6c01d3d Signed-off-by: lal.harshita --- build/odu/makefile | 3 -- docs/README | 67 ++++++++++++++++++++++++++-------------- src/5gnrmac/lwr_mac_handle_phy.c | 27 ++++++++++------ src/5gnrmac/lwr_mac_phy.c | 1 - src/5gnrmac/mac_msg_hdl.c | 3 +- src/5gnrrlc/rlc_cfg_dl.c | 1 - src/5gnrsch/sch.c | 4 ++- src/5gnrsch/sch.h | 5 ++- src/5gnrsch/sch_common.c | 44 ++++++++++++++++---------- src/5gnrsch/sch_rach.c | 27 +++++++++++----- src/5gnrsch/sch_slot_ind.c | 8 ++--- src/5gnrsch/sch_ue_mgr.c | 5 ++- src/cu_stub/cu_f1ap_msg_hdl.c | 4 +-- src/du_app/du_cfg.h | 8 ++--- src/du_app/du_ue_mgr.c | 40 ++++++++++++++++++------ 15 files changed, 160 insertions(+), 87 deletions(-) diff --git a/build/odu/makefile b/build/odu/makefile index 072009364..9652f5d35 100644 --- a/build/odu/makefile +++ b/build/odu/makefile @@ -86,9 +86,6 @@ ifeq ($(PHY), INTEL_L1) PLTFRM_FLAGS+=-DSS_USE_WLS_MEM -DINTEL_WLS_MEM -DDEBUG_MODE ifeq ($(PHY_MODE),TIMER) PLTFRM_FLAGS+=-DINTEL_TIMER_MODE -else - #TODO: Remove below flag for testing RACH.indication onward - PLTFRM_FLAGS+=-DTEMP_INTG_FLAG endif endif diff --git a/docs/README b/docs/README index cc9d63803..cb5ebfa4b 100644 --- a/docs/README +++ b/docs/README @@ -71,31 +71,47 @@ C. Pre-requisite for O1 Interface (Required only if run with O1 interface enable D. How to Clean and Build: -------------------------- -1. Building ODU binary: +1. Build commands: + a. odu - Builds all components of ODU + b. cu_stub - Builds all CU Stub + c. ric_stub - Builds all RIC_Stub + d. clean_odu - clean up ODU + e. clean_cu - clean up CU Stub + f. clean_ric - clean up RIC Stub + g. clean_all - cleanup everything + h. options: + i. MACHINE=BIT64/BIT32 - Specify underlying machine type. Default is BIT32 + ii. NODE=TEST_STUB - Specify if it is a test node. Mandatory for cu_stub/ric_stub. Must not be used for odu + iii. MODE=FDD/TDD - Specify duplex mode. Default is FDD + iv. PHY=INTEL_L1 - Specify type of phy. If not specified, PHY stub is used + v. PHY_MODE=TIMER - Specify mode of phy. Used only if PHY=INTEL_L1. Default is radio mode + vi. O1_ENABLE=YES - Specify if O1 interface is enabled. If not specified, it is disabled + +2. Building ODU binary: a. Build folder cd l2/build/odu b. Building ODU binary - make odu MACHINE=BIT64 MODE=FDD + make odu MACHINE= MODE= c. Cleaning ODU binary - make clean_odu MACHINE=BIT64 MODE=FDD + make clean_odu MACHINE= MODE= -2. Building CU Stub binary: +3. Building CU Stub binary: a. Build folder cd l2/build/odu b. Building CU Stub binary - make cu_stub NODE=TEST_STUB MACHINE=BIT64 MODE=FDD + make cu_stub NODE= MACHINE= MODE= c. Cleaning CU Stub binary - make clean_cu NODE=TEST_STUB MACHINE=BIT64 MODE=FDD + make clean_cu NODE= MACHINE= MODE= -3. Building RIC Stub binary: +4. Building RIC Stub binary: a. Build folder cd l2/build/odu b. Building RIC Stub binary - make ric_stub NODE=TEST_STUB MACHINE=BIT64 MODE=FDD + make ric_stub NODE= MACHINE= MODE= c. Cleaning RIC Stub binary - make clean_ric NODE=TEST_STUB MACHINE=BIT64 MODE=FDD + make clean_ric NODE= MACHINE= MODE= -4. Cleaning ODU, CU Stub and RIC Stub: +5. Cleaning ODU, CU Stub and RIC Stub: make clean_all @@ -106,25 +122,25 @@ E. How to Clean and Build with O1 interface enabled (Requires pre-requisite step a. Build folder cd l2/build/odu b. Building ODU binary - make odu MACHINE=BIT64 MODE=FDD O1_ENABLE=YES + make odu MACHINE= MODE= O1_ENABLE= c. Cleaning ODU binary - make clean_odu MACHINE=BIT64 MODE=FDD O1_ENABLE=YES + make clean_odu MACHINE= MODE= O1_ENABLE= 2. Building CU Stub binary: a. Build folder cd l2/build/odu b. Building CU Stub binary - make cu_stub NODE=TEST_STUB MACHINE=BIT64 MODE=FDD O1_ENABLE=YES + make cu_stub NODE= MACHINE= MODE= O1_ENABLE= c. Cleaning CU Stub binary - make clean_cu NODE=TEST_STUB MACHINE=BIT64 MODE=FDD O1_ENABLE=YES + make clean_cu NODE= MACHINE= MODE= O1_ENABLE= 3. Building RIC Stub binary: a. Build folder cd l2/build/odu b. Building RIC Stub binary - make ric_stub NODE=TEST_STUB MACHINE=BIT64 MODE=FDD O1_ENABLE=YES + make ric_stub NODE= MACHINE= MODE= O1_ENABLE= c. Cleaning RIC Stub binary - make clean_ric NODE=TEST_STUB MACHINE=BIT64 MODE=FDD O1_ENABLE=YES + make clean_ric NODE= MACHINE= MODE= O1_ENABLE= 4. Cleaning ODU, CU Stub and RIC Stub: make clean_all @@ -182,19 +198,24 @@ I. Compilation c. Build folder cd l2/build/odu d. Build ODU Binary: - make odu PHY=INTEL_L1 PHY_MODE=TIMER MACHINE=BIT64 MODE=FDD + make odu PHY= PHY_MODE= MACHINE= MODE= 2. Build CU Stub and RIC Stub: - a. Execute steps in sections D.2 and D.3. + a. Execute steps in sections D.3 and D.4 II. Execution - 1. Execute L1: + 1. Refer to below link for assumptions, dependencies, pre-requisites etc for ODU-Low execution + https://docs.o-ran-sc.org/projects/o-ran-sc-o-du-phy/en/latest/ + + 2. Execute L1: a. Setup environment: cd /phy/ source ./setupenv.sh b. Run L1 binary : cd /FlexRAN/l1/bin/nr5g/gnb/l1 - To run in timer mode : ./l1.sh -e + To run + i. In timer mode : ./l1.sh -e + ii. In radio mode : ./l1.sh -xran L1 is up when console prints follow: Non BBU threads in application @@ -205,7 +226,7 @@ II. Execution   PHY>welcome to application console - 2. Execute FAPI Translator: + 3. Execute FAPI Translator: a. Setup environment: cd /phy/ source ./setupenv.sh @@ -213,10 +234,10 @@ II. Execution cd /phy/fapi_5g/bin/ ./oran_5g_fapi --cfg=oran_5g_fapi.cfg - 3. Execute CU Stub and RIC Stub: + 4. Execute CU Stub and RIC Stub: a. Run steps in sections E.1-E.3 - 4. Execute DU: + 5. Execute DU: a. DU execution folder cd l2/bin/odu b. Export WLS library path diff --git a/src/5gnrmac/lwr_mac_handle_phy.c b/src/5gnrmac/lwr_mac_handle_phy.c index ebcd761ff..d8d1dd84a 100644 --- a/src/5gnrmac/lwr_mac_handle_phy.c +++ b/src/5gnrmac/lwr_mac_handle_phy.c @@ -180,9 +180,6 @@ uint8_t procStopInd() * ****************************************************************/ uint8_t procRachInd(fapi_rach_indication_t *fapiRachInd) { -/* TODO : Remove the following #ifndef TEMP_INTG_FLAG, when testing - * RACH.indication in radio mode integration */ -#ifndef TEMP_INTG_FLAG Pst pst; uint8_t pduIdx; uint8_t prmbleIdx; @@ -192,9 +189,14 @@ uint8_t procRachInd(fapi_rach_indication_t *fapiRachInd) MAC_ALLOC_SHRABL_BUF(rachInd, sizeof(RachInd)); if(!rachInd) { - DU_LOG("\nERROR --> LWR_MAC: Memory Allocation failed in procRachInd"); + DU_LOG("\nERROR --> LWR_MAC : Memory Allocation failed in procRachInd"); return RFAILED; } + if(!fapiRachInd->numPdus) + { + DU_LOG("\nDEBUG --> LWR_MAC : No PDU in RACH.indication at [%d, %d]", fapiRachInd->sfn, fapiRachInd->slot); + return ROK; + } rachInd->cellId = lwrMacCb.cellCb[0].cellId; rachInd->timingInfo.sfn = fapiRachInd->sfn; @@ -220,9 +222,6 @@ uint8_t procRachInd(fapi_rach_indication_t *fapiRachInd) /* Fill post and sent to MAC */ FILL_PST_LWR_MAC_TO_MAC(pst, EVENT_RACH_IND_TO_MAC); return (*sendRachIndOpts[pst.selector])(&pst, rachInd); -#else - return ROK; -#endif }/* handleRachInd */ /******************************************************************* @@ -253,9 +252,14 @@ uint8_t procCrcInd(fapi_crc_ind_t *fapiCrcInd) MAC_ALLOC_SHRABL_BUF(crcInd, sizeof(CrcInd)); if(!crcInd) { - DU_LOG("\nERROR --> LWR_MAC: Memory Allocation failed in procCrcInd"); + DU_LOG("\nERROR --> LWR_MAC : Memory Allocation failed in procCrcInd"); return RFAILED; } + if(!fapiCrcInd->numCrcs) + { + DU_LOG("\nDEBUG --> LWR_MAC : No CRC PDUs in CRC.indication at [%d, %d]", fapiCrcInd->sfn, fapiCrcInd->slot); + return ROK; + } crcInd->cellId = lwrMacCb.cellCb[0].cellId; crcInd->timingInfo.sfn = fapiCrcInd->sfn; @@ -312,9 +316,14 @@ uint8_t procRxDataInd(fapi_rx_data_indication_t *fapiRxDataInd) MAC_ALLOC_SHRABL_BUF(rxDataInd, sizeof(RxDataInd)); if(!rxDataInd) { - DU_LOG("\nERROR --> LWR_MAC: Memory Allocation failed in procRxDataInd"); + DU_LOG("\nERROR --> LWR_MAC : Memory Allocation failed in procRxDataInd"); return RFAILED; } + if(!fapiRxDataInd->numPdus) + { + DU_LOG("\nDEBUG --> LWR_MAC : No PDU in RX_Data.indication at [%d, %d]", fapiRxDataInd->sfn, fapiRxDataInd->slot); + return ROK; + } rxDataInd->cellId = lwrMacCb.cellCb[0].cellId; rxDataInd->timingInfo.sfn = fapiRxDataInd->sfn; diff --git a/src/5gnrmac/lwr_mac_phy.c b/src/5gnrmac/lwr_mac_phy.c index 46d68d5dc..4d22edae4 100644 --- a/src/5gnrmac/lwr_mac_phy.c +++ b/src/5gnrmac/lwr_mac_phy.c @@ -227,7 +227,6 @@ void LwrMacRecvPhyMsg() continue; } - DU_LOG("\nDEBUG --> LWR_MAC : numMsgToGet %d", numMsgToGet); while(numMsgToGet--) { currElem = NULLP; diff --git a/src/5gnrmac/mac_msg_hdl.c b/src/5gnrmac/mac_msg_hdl.c index bb8773092..c3a4b80c1 100644 --- a/src/5gnrmac/mac_msg_hdl.c +++ b/src/5gnrmac/mac_msg_hdl.c @@ -525,7 +525,8 @@ uint8_t MacProcDlCcchInd(Pst *pst, DlCcchIndInfo *dlCcchIndInfo) if(dlCcchIndInfo->msgType == RRC_SETUP) { dlBoInfo.lcId = SRB0_LCID; // SRB ID 0 for msg4 - dlBoInfo.dataVolume = dlCcchIndInfo->dlCcchMsgLen; + /* (MSG4 pdu + 3 bytes sub-header) + (Contention resolution id MAC CE + 1b byte sub-header) */ + dlBoInfo.dataVolume = (dlCcchIndInfo->dlCcchMsgLen + 3) + (MAX_CRI_SIZE + 1); /* storing Msg4 Pdu in raCb */ GET_UE_IDX(dlBoInfo.crnti, ueIdx); diff --git a/src/5gnrrlc/rlc_cfg_dl.c b/src/5gnrrlc/rlc_cfg_dl.c index 9c24eb424..dcc1a2c4b 100755 --- a/src/5gnrrlc/rlc_cfg_dl.c +++ b/src/5gnrrlc/rlc_cfg_dl.c @@ -712,7 +712,6 @@ RlcEntCfgCfmInfo *entCfm if((rlcChkTmr(gCb, (PTR)(&gCb->rlcThpt), EVENT_RLC_THROUGHPUT_TMR)) == FALSE) { - printf("\nHLAL Starting Throughput timer"); rlcStartTmr(gCb, (PTR)(&gCb->rlcThpt), EVENT_RLC_THROUGHPUT_TMR); } } diff --git a/src/5gnrsch/sch.c b/src/5gnrsch/sch.c index f68015dcf..ef72d1a03 100644 --- a/src/5gnrsch/sch.c +++ b/src/5gnrsch/sch.c @@ -947,8 +947,10 @@ uint8_t MacSchDlRlcBoInfo(Pst *pst, DlRlcBoInfo *dlBoInfo) schDlSlotInfo->dlMsgInfo->harqFeedbackInd = 0; schDlSlotInfo->dlMsgInfo->dciFormatId = 1; if(lcId == SRB0_LCID) + { schDlSlotInfo->dlMsgInfo->isMsg4Pdu = true; - + schDlSlotInfo->dlMsgInfo->dlMsgPduLen = dlBoInfo->dataVolume; + } return ROK; } diff --git a/src/5gnrsch/sch.h b/src/5gnrsch/sch.h index 9bfc6edf3..478cc3cf3 100644 --- a/src/5gnrsch/sch.h +++ b/src/5gnrsch/sch.h @@ -41,6 +41,7 @@ #define BO_DELTA 1 #define RAR_DELAY 2 #define MSG4_DELAY 1 +#define PDSCH_START_RB 10 #define PUSCH_START_RB 15 #define PUCCH_NUM_PRB_FORMAT_0_1_4 1 /* number of PRBs in freq domain, spec 38.213 - 9.2.1 */ #define SI_RNTI 0xFFFF @@ -50,6 +51,7 @@ #define DMRS_ADDITIONAL_POS 0 #define SCH_DEFAULT_K1 1 #define SCH_TQ_SIZE 10 +#define SCH_RAR_PAYLOAD_SIZE 10 /* As per spec 38.321, sections 6.1.5 and 6.2.3, RAR PDU is 8 bytes long and 2 bytes of padding */ #define CRC_FAILED 0 #define CRC_PASSED 1 @@ -258,7 +260,7 @@ short int schActvTmr(Ent ent,Inst inst); uint8_t schBroadcastAlloc(SchCellCb *cell, DlBrdcstAlloc *dlBrdcstAlloc,uint16_t slot); uint8_t schProcessSlotInd(SlotIndInfo *slotInd, Inst inst); uint8_t schUlResAlloc(SchCellCb *cell, Inst schInst); -uint8_t schDlRsrcAllocMsg4(DlMsgAlloc *msg4Alloc, SchCellCb *cell, uint16_t slot); +uint8_t schDlRsrcAllocMsg4(DlMsgAlloc *msg4Alloc, SchCellCb *cell, uint16_t slot, bool ssbPresent, bool sib1Present); uint16_t schCalcTbSize(uint32_t payLoadSize); uint16_t schCalcNumPrb(uint16_t tbSize, uint16_t mcs, uint8_t numSymbols); uint16_t schAllocPucchResource(SchCellCb *cell, uint16_t crnti, uint16_t slot); @@ -268,6 +270,7 @@ uint8_t schFillPuschAlloc(SchUeCb *ueCb, uint16_t pdcchSlot, uint32_t dataVol, S uint8_t schDlRsrcAllocDlMsg(DlMsgAlloc *dlMsgAlloc, SchCellCb *cell, uint16_t crnti, uint32_t *accumalatedSize, uint16_t slot); uint16_t schAccumalateLcBoSize(SchCellCb *cell, uint16_t ueIdx); +uint8_t schFillRar(RarAlloc *rarAlloc, uint16_t raRnti, uint16_t pci, uint8_t offsetPointA, bool ssbPresent, bool sib1Present); /********************************************************************** End of file diff --git a/src/5gnrsch/sch_common.c b/src/5gnrsch/sch_common.c index e064b8376..431c5e02a 100644 --- a/src/5gnrsch/sch_common.c +++ b/src/5gnrsch/sch_common.c @@ -556,7 +556,7 @@ uint8_t schUlResAlloc(SchCellCb *cell, Inst schInst) * RFAILED - failure * * ****************************************************************/ -uint8_t schDlRsrcAllocMsg4(DlMsgAlloc *msg4Alloc, SchCellCb *cell, uint16_t slot) +uint8_t schDlRsrcAllocMsg4(DlMsgAlloc *msg4Alloc, SchCellCb *cell, uint16_t slot, bool ssbPresent, bool sib1Present) { uint8_t coreset0Idx = 0; uint8_t numRbs = 0; @@ -566,9 +566,10 @@ uint8_t schDlRsrcAllocMsg4(DlMsgAlloc *msg4Alloc, SchCellCb *cell, uint16_t slot uint8_t offsetPointA; uint8_t FreqDomainResource[6] = {0}; uint16_t tbSize = 0; - uint8_t numPdschSymbols = 12; /* considering pdsch region from 2 to 13 */ - uint8_t mcs = 4; /* MCS fixed to 4 */ + uint8_t numPdschSymbols = 11; /* considering pdsch region from 3 to 13 */ + uint8_t mcs = 4; /* MCS fixed to 4 */ SchBwpDlCfg *initialBwp; + FreqDomainAlloc *sib1PdschFreqAlloc = NULL; PdcchCfg *pdcch = &msg4Alloc->dlMsgPdcchCfg; PdschCfg *pdsch = &msg4Alloc->dlMsgPdschCfg; @@ -640,16 +641,14 @@ uint8_t schDlRsrcAllocMsg4(DlMsgAlloc *msg4Alloc, SchCellCb *cell, uint16_t slot pdsch->codeword[cwCount].mcsIndex = mcs; /* mcs configured to 4 */ pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */ pdsch->codeword[cwCount].rvIndex = 0; - /* 38.214: Table 5.1.3.2-1, divided by 8 to get the value in bytes */ - /* TODO : Calculate tbSize based of DL CCCH msg size */ - tbSize = schCalcTbSize(2664/8); /* send this value to the func in bytes when considering msg4 size */ + tbSize = schCalcTbSize(msg4Alloc->dlMsgInfo.dlMsgPduLen + TX_PAYLOAD_HDR_LEN); /* MSG4 size + FAPI header size*/ pdsch->codeword[cwCount].tbSize = tbSize; } pdsch->dataScramblingId = cell->cellCfg.phyCellId; pdsch->numLayers = 1; pdsch->transmissionScheme = 0; pdsch->refPoint = 0; - pdsch->dmrs.dlDmrsSymbPos = 2; + pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */ pdsch->dmrs.dmrsConfigType = 0; /* type-1 */ pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId; pdsch->dmrs.scid = 0; @@ -659,12 +658,23 @@ uint8_t schDlRsrcAllocMsg4(DlMsgAlloc *msg4Alloc, SchCellCb *cell, uint16_t slot pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS; pdsch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS; pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */ - /* the RB numbering starts from coreset0, and PDSCH is always above SSB */ - pdsch->pdschFreqAlloc.freqAlloc.startPrb = offset + SCH_SSB_NUM_PRB; - pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize,mcs,numPdschSymbols); + /* The RB numbering starts from coreset0 */ + pdsch->pdschFreqAlloc.freqAlloc.startPrb = PDSCH_START_RB; + if(ssbPresent) + { + /* PDSCH is always above SSB */ + pdsch->pdschFreqAlloc.freqAlloc.startPrb = offsetPointA + SCH_SSB_NUM_PRB + 1; + } + if(sib1Present) + { + /* Must not overlap with SIB1 */ + sib1PdschFreqAlloc = &cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschFreqAlloc.freqAlloc; + pdsch->pdschFreqAlloc.freqAlloc.startPrb = sib1PdschFreqAlloc->startPrb + sib1PdschFreqAlloc->numPrb + 1; + } + pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, mcs, numPdschSymbols); pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */ - pdsch->pdschTimeAlloc.timeAlloc.startSymb = 2; /* spec-38.214, Table 5.1.2.1-1 */ - pdsch->pdschTimeAlloc.timeAlloc.numSymb = 12; + pdsch->pdschTimeAlloc.timeAlloc.startSymb = 3; /* spec-38.214, Table 5.1.2.1-1 */ + pdsch->pdschTimeAlloc.timeAlloc.numSymb = numPdschSymbols; pdsch->beamPdschInfo.numPrgs = 1; pdsch->beamPdschInfo.prgSize = 1; pdsch->beamPdschInfo.digBfInterfaces = 0; @@ -731,7 +741,6 @@ uint8_t schDlRsrcAllocDlMsg(DlMsgAlloc *dlMsgAlloc, SchCellCb *cell, uint16_t cr { uint8_t ueIdx; uint16_t tbSize = 0; - uint8_t numPdschSymbols = 12; /* considering pdsch region from 2 to 13 */ PdcchCfg *pdcch = NULLP; PdschCfg *pdsch = NULLP; BwpCfg *bwp = NULLP; @@ -794,7 +803,7 @@ uint8_t schDlRsrcAllocDlMsg(DlMsgAlloc *dlMsgAlloc, SchCellCb *cell, uint16_t cr pdsch->codeword[cwCount].mcsIndex = ueCb.ueCfg.dlModInfo.mcsIndex; pdsch->codeword[cwCount].mcsTable = ueCb.ueCfg.dlModInfo.mcsTable; pdsch->codeword[cwCount].rvIndex = 0; - tbSize = schCalcTbSize(*accumalatedSize); + tbSize = schCalcTbSize(*accumalatedSize + TX_PAYLOAD_HDR_LEN); if(tbSize < *accumalatedSize) *accumalatedSize = tbSize; pdsch->codeword[cwCount].tbSize = tbSize; @@ -803,7 +812,7 @@ uint8_t schDlRsrcAllocDlMsg(DlMsgAlloc *dlMsgAlloc, SchCellCb *cell, uint16_t cr pdsch->numLayers = 1; pdsch->transmissionScheme = 0; pdsch->refPoint = 0; - pdsch->dmrs.dlDmrsSymbPos = 2; + pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */ pdsch->dmrs.dmrsConfigType = 0; /* type-1 */ pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId; pdsch->dmrs.scid = 0; @@ -813,8 +822,9 @@ uint8_t schDlRsrcAllocDlMsg(DlMsgAlloc *dlMsgAlloc, SchCellCb *cell, uint16_t cr pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS; pdsch->dmrs.dmrsAddPos = pdschCfg.dmrsDlCfgForPdschMapTypeA.addPos; pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */ - pdsch->pdschFreqAlloc.freqAlloc.startPrb = 1; - pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, ueCb.ueCfg.dlModInfo.mcsIndex, numPdschSymbols); + pdsch->pdschFreqAlloc.freqAlloc.startPrb = PDSCH_START_RB; + pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, ueCb.ueCfg.dlModInfo.mcsIndex, \ + pdschCfg.timeDomRsrcAllociList[0].symbolLength); pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */ pdsch->pdschTimeAlloc.timeAlloc.startSymb = pdschCfg.timeDomRsrcAllociList[0].startSymbol; pdsch->pdschTimeAlloc.timeAlloc.numSymb = pdschCfg.timeDomRsrcAllociList[0].symbolLength; diff --git a/src/5gnrsch/sch_rach.c b/src/5gnrsch/sch_rach.c index d3ea542ed..819ce1f3c 100644 --- a/src/5gnrsch/sch_rach.c +++ b/src/5gnrsch/sch_rach.c @@ -279,7 +279,8 @@ uint8_t schProcessRachInd(RachIndInfo *rachInd, Inst schInst) * @param[in] offset to pointA to determine freq alloc * @return ROK **/ -uint8_t schFillRar(RarAlloc *rarAlloc, uint16_t raRnti, uint16_t pci, uint8_t offsetPointA) +uint8_t schFillRar(RarAlloc *rarAlloc, uint16_t raRnti, uint16_t pci, uint8_t offsetPointA, \ +bool ssbPresent, bool sib1Present) { Inst inst = 0; uint8_t coreset0Idx = 0; @@ -289,14 +290,13 @@ uint8_t schFillRar(RarAlloc *rarAlloc, uint16_t raRnti, uint16_t pci, uint8_t of uint8_t offset = 0; uint8_t FreqDomainResource[6] = {0}; uint16_t tbSize = 0; - uint8_t numPdschSymbols = 12; /* considering pdsch region from 2 to 13 */ uint8_t mcs = 4; /* MCS fixed to 4 */ SchBwpDlCfg *initialBwp = &schCb[inst].cells[inst]->cellCfg.schInitialDlBwp; - PdcchCfg *pdcch = &rarAlloc->rarPdcchCfg; PdschCfg *pdsch = &rarAlloc->rarPdschCfg; BwpCfg *bwp = &rarAlloc->bwp; + FreqDomainAlloc *sib1PdschFreqAlloc = NULL; coreset0Idx = initialBwp->pdcchCommon.commonSearchSpace.coresetId; @@ -363,14 +363,15 @@ uint8_t schFillRar(RarAlloc *rarAlloc, uint16_t raRnti, uint16_t pci, uint8_t of pdsch->codeword[cwCount].mcsIndex = mcs; /* mcs configured to 4 */ pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */ pdsch->codeword[cwCount].rvIndex = 0; - tbSize = schCalcTbSize(10); /* 8 bytes RAR and 2 bytes padding */ + /* RAR PDU length and FAPI payload header length */ + tbSize = schCalcTbSize(SCH_RAR_PAYLOAD_SIZE + TX_PAYLOAD_HDR_LEN); pdsch->codeword[cwCount].tbSize = tbSize; } pdsch->dataScramblingId = pci; pdsch->numLayers = 1; pdsch->transmissionScheme = 0; pdsch->refPoint = 0; - pdsch->dmrs.dlDmrsSymbPos = 2; + pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */ pdsch->dmrs.dmrsConfigType = 0; /* type-1 */ pdsch->dmrs.dlDmrsScramblingId = pci; pdsch->dmrs.scid = 0; @@ -380,8 +381,20 @@ uint8_t schFillRar(RarAlloc *rarAlloc, uint16_t raRnti, uint16_t pci, uint8_t of pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS; pdsch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS; pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */ - pdsch->pdschFreqAlloc.freqAlloc.startPrb = offset + SCH_SSB_NUM_PRB; /* the RB numbering starts from coreset0, and PDSCH is always above SSB */ - pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize,mcs,numPdschSymbols); + /* The RB numbering starts from coreset0 */ + pdsch->pdschFreqAlloc.freqAlloc.startPrb = PDSCH_START_RB; + if(ssbPresent) + { + /* PDSCH is always above SSB */ + pdsch->pdschFreqAlloc.freqAlloc.startPrb = offsetPointA + SCH_SSB_NUM_PRB + 1; + } + if(sib1Present) + { + /* Must not overlap with SIB1 */ + sib1PdschFreqAlloc = &schCb[inst].cells[inst]->cellCfg.sib1SchCfg.sib1PdschCfg.pdschFreqAlloc.freqAlloc; + pdsch->pdschFreqAlloc.freqAlloc.startPrb = sib1PdschFreqAlloc->startPrb + sib1PdschFreqAlloc->numPrb + 1; + } + pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, mcs, initialBwp->pdschCommon.lengthSymbol); pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */ pdsch->pdschTimeAlloc.timeAlloc.startSymb = initialBwp->pdschCommon.startSymbol; pdsch->pdschTimeAlloc.timeAlloc.numSymb = initialBwp->pdschCommon.lengthSymbol; diff --git a/src/5gnrsch/sch_slot_ind.c b/src/5gnrsch/sch_slot_ind.c index 281cd2112..42679065e 100644 --- a/src/5gnrsch/sch_slot_ind.c +++ b/src/5gnrsch/sch_slot_ind.c @@ -50,8 +50,6 @@ SchMacDlAllocFunc schMacDlAllocOpts[] = }; SchCb schCb[SCH_MAX_INST]; -int schFillRar(RarAlloc *rarAlloc, uint16_t raRnti, uint16_t pci, uint8_t - offsetPointA); /******************************************************************* * @@ -323,7 +321,9 @@ uint8_t schProcessSlotInd(SlotIndInfo *slotInd, Inst schInst) schFillRar(rarAlloc, cell->schDlSlotInfo[slot]->rarInfo->raRnti, cell->cellCfg.phyCellId, - cell->cellCfg.ssbSchCfg.ssbOffsetPointA); + cell->cellCfg.ssbSchCfg.ssbOffsetPointA, + dlBrdcstAlloc->ssbTrans, + dlBrdcstAlloc->sib1Trans); SCH_FREE(cell->schDlSlotInfo[slot]->rarInfo,sizeof(RarAlloc)); cell->schDlSlotInfo[slot]->rarInfo = NULLP; @@ -349,7 +349,7 @@ uint8_t schProcessSlotInd(SlotIndInfo *slotInd, Inst schInst) sizeof(DlMsgInfo)); /* pdcch and pdsch data is filled */ - schDlRsrcAllocMsg4(msg4Alloc, cell, dlSchedInfo.schSlotValue.dlMsgTime.slot); + schDlRsrcAllocMsg4(msg4Alloc, cell, dlSchedInfo.schSlotValue.dlMsgTime.slot, dlBrdcstAlloc->ssbTrans, dlBrdcstAlloc->sib1Trans); /* PUCCH resource */ schAllocPucchResource(cell, msg4Alloc->dlMsgInfo.crnti, dlSchedInfo.schSlotValue.dlMsgTime.slot); diff --git a/src/5gnrsch/sch_ue_mgr.c b/src/5gnrsch/sch_ue_mgr.c index a3a0c5529..a64658928 100644 --- a/src/5gnrsch/sch_ue_mgr.c +++ b/src/5gnrsch/sch_ue_mgr.c @@ -422,13 +422,12 @@ uint8_t schFillPuschAlloc(SchUeCb *ueCb, uint16_t pdcchSlot, uint32_t dataVol, S uint16_t puschSlot = 0; uint16_t startRb = 0; uint8_t numRb = 0; - uint8_t numPdschSymbols= 14; uint16_t tbSize = 0; uint8_t buffer = 5; uint8_t idx = 0; SchCellCb *cellCb = ueCb->cellCb; SchUlSlotInfo *schUlSlotInfo = NULLP; - uint8_t k2=0, startSymb=0 , symbLen=0; + uint8_t k2=0, startSymb=0 , symbLen=11; if(ueCb->ueCfg.spCellCfgPres == true) { @@ -440,7 +439,7 @@ uint8_t schFillPuschAlloc(SchUeCb *ueCb, uint16_t pdcchSlot, uint32_t dataVol, S startRb = cellCb->schUlSlotInfo[puschSlot]->puschCurrentPrb; tbSize = schCalcTbSize(dataVol + buffer); /* 2 bytes header + some buffer */ - numRb = schCalcNumPrb(tbSize, ueCb->ueCfg.ulModInfo.mcsIndex, numPdschSymbols); + numRb = schCalcNumPrb(tbSize, ueCb->ueCfg.ulModInfo.mcsIndex, symbLen); /* increment PUSCH PRB */ cellCb->schUlSlotInfo[puschSlot]->puschCurrentPrb += numRb; diff --git a/src/cu_stub/cu_f1ap_msg_hdl.c b/src/cu_stub/cu_f1ap_msg_hdl.c index ed7194f4f..9c40c0e1d 100644 --- a/src/cu_stub/cu_f1ap_msg_hdl.c +++ b/src/cu_stub/cu_f1ap_msg_hdl.c @@ -3225,7 +3225,7 @@ uint8_t BuildTCIStatesToAddModList(struct PDSCH_Config__tci_StatesToAddModList * timeDomAlloc->k0 = NULLP; timeDomAlloc->mappingType = PDSCH_MAPPING_TYPE_A; - timeDomAlloc->startSymbolAndLength = 53; + timeDomAlloc->startSymbolAndLength = 66; return ROK; } @@ -3567,7 +3567,7 @@ uint8_t BuildInitialDlBWP(BWP_DownlinkDedicated_t *dlBwp) } *(timeDomAlloc->k2) = PUSCH_K2; timeDomAlloc->mappingType = PUSCH_MAPPING_TYPE_A; - timeDomAlloc->startSymbolAndLength = 27; + timeDomAlloc->startSymbolAndLength = 66; return ROK; } diff --git a/src/du_app/du_cfg.h b/src/du_app/du_cfg.h index 2a2b1abe5..a08ed645b 100644 --- a/src/du_app/du_cfg.h +++ b/src/du_app/du_cfg.h @@ -149,8 +149,8 @@ /* MACRO Ddefine for PDSCH Configuration */ #define PDSCH_K0 0 -#define PDSCH_START_SYMBOL 2 -#define PDSCH_LENGTH_SYMBOL 12 +#define PDSCH_START_SYMBOL 3 +#define PDSCH_LENGTH_SYMBOL 11 #define PDSCH_RES_ALLOC_TYPE 1 /* Resource allocation type */ #define PDSCH_MAX_CODEWORD_SCH_BY_DCI 0 /* Max num of codewords scheduled by DCI */ #define PDSCH_RBG_SIZE 0 /* 0: config1 */ @@ -158,8 +158,8 @@ /* MACRO Define for PUSCH Configuration */ #define PUSCH_K2 3 -#define PUSCH_START_SYMBOL 0 -#define PUSCH_LENGTH_SYMBOL 14 +#define PUSCH_START_SYMBOL 3 +#define PUSCH_LENGTH_SYMBOL 11 #define PUSCH_MSG3_DELTA_PREAMBLE 0 #define PUSCH_P0_NOMINAL_WITH_GRANT -70 diff --git a/src/du_app/du_ue_mgr.c b/src/du_app/du_ue_mgr.c index 920afca36..2ef2d741b 100644 --- a/src/du_app/du_ue_mgr.c +++ b/src/du_app/du_ue_mgr.c @@ -728,14 +728,21 @@ void fillDefaultInitUlBwp(InitialUlBwp *initUlBwp) * * Functionality: Fills Sp Cell Group Info * - * @params[in] SpCellCfg *spCell + * @params[in] MacUeCfg *macUeCfg * @return void * *****************************************************************/ -void fillDefaultSpCellGrpInfo(SpCellCfg *spCell) +void fillDefaultSpCellGrpInfo(MacUeCfg *macUeCfg) { + SpCellCfg *spCell = NULL; + + if(macUeCfg) + spCell = &macUeCfg->spCellCfg; + if(spCell) { + macUeCfg->spCellCfgPres = true; + spCell->servCellIdx = SERV_CELL_IDX; /* Filling Initial Dl Bwp */ fillDefaultInitDlBwp(&spCell->servCellCfg.initDlBwp); @@ -771,14 +778,20 @@ void fillDefaultSpCellGrpInfo(SpCellCfg *spCell) * * Functionality: Fills Physical Cell Group Info * - * @params[in] PhyCellGrpCfg *cellGrp + * @params[in] MacUeCfg *macUeCfg * @return void * *****************************************************************/ -void fillDefaultPhyCellGrpInfo(PhyCellGrpCfg *cellGrp) +void fillDefaultPhyCellGrpInfo(MacUeCfg *macUeCfg) { + PhyCellGrpCfg *cellGrp = NULL; + + if(macUeCfg) + cellGrp = &macUeCfg->phyCellGrpCfg; + if(cellGrp) { + macUeCfg->phyCellGrpCfgPres = true; cellGrp->pdschHarqAckCodebook = PDSCH_HARQ_ACK_CODEBOOK_DYNAMIC; cellGrp->pNrFr1 = P_NR_FR1; } @@ -798,16 +811,22 @@ void fillDefaultPhyCellGrpInfo(PhyCellGrpCfg *cellGrp) * * Functionality: Fills Mac Cell Group Info * - * @params[in] MacCellGrpCfg *cellGrp + * @params[in] MacUeCfg *macUeCfg * @return void * *****************************************************************/ -void fillDefaultMacCellGrpInfo(MacCellGrpCfg *cellGrp) +void fillDefaultMacCellGrpInfo(MacUeCfg *macUeCfg) { uint8_t idx; + MacCellGrpCfg *cellGrp = NULL; + + if(macUeCfg) + cellGrp = &macUeCfg->macCellGrpCfg; if(cellGrp) { + macUeCfg->macCellGrpCfgPres = true; + /* Filling Scheduling Request Config */ cellGrp->schReqCfg.addModListCount = 1; if(cellGrp->schReqCfg.addModListCount <= MAX_NUM_SR_CFG_PER_CELL_GRP) @@ -1131,12 +1150,13 @@ uint8_t fillMacUeCfg(uint16_t cellId, uint8_t ueIdx, uint16_t crnti, \ macUeCfg->cellId = cellId; macUeCfg->ueIdx = ueIdx; macUeCfg->crnti = crnti; - fillDefaultMacCellGrpInfo(&macUeCfg->macCellGrpCfg); - fillDefaultPhyCellGrpInfo(&macUeCfg->phyCellGrpCfg); - fillDefaultSpCellGrpInfo(&macUeCfg->spCellCfg); + + fillDefaultMacCellGrpInfo(macUeCfg); + fillDefaultPhyCellGrpInfo(macUeCfg); + fillDefaultSpCellGrpInfo(macUeCfg); macUeCfg->ambrCfg = NULLP; - fillMacSrb1LcCfg(&macUeCfg->lcCfgList[0]); fillDefaultModulation(macUeCfg); + fillMacSrb1LcCfg(&macUeCfg->lcCfgList[0]); macUeCfg->numLcs++; } else -- 2.16.6