From 176a9131121aa261c0205c524c8158b3db724b12 Mon Sep 17 00:00:00 2001 From: Balaji Shankaran Date: Tue, 21 Apr 2020 21:43:46 +0530 Subject: [PATCH] DCI format encoding in PDCCH PDU Change-Id: I8cedda1dfbd395bb083598e7eeb34edb53c904d3 Signed-off-by: Balaji Shankaran --- src/5gnrmac/lwr_mac_fsm.c | 111 +++++++++++++++++++++++++++++++++++++++++++-- src/5gnrmac/lwr_mac_util.c | 82 +++++++++++++++++++++++++++++++++ src/5gnrsch/sch.c | 7 ++- src/cm/mac_sch_interface.h | 92 +++++++++++++++++++------------------ 4 files changed, 243 insertions(+), 49 deletions(-) diff --git a/src/5gnrmac/lwr_mac_fsm.c b/src/5gnrmac/lwr_mac_fsm.c index fdc7e3cac..abb4340ee 100644 --- a/src/5gnrmac/lwr_mac_fsm.c +++ b/src/5gnrmac/lwr_mac_fsm.c @@ -2138,6 +2138,31 @@ void fillDlDciPdu(fapi_dl_dci_t *dlDciPtr, Sib1PdcchCfg *sib1PdcchInfo) { if(dlDciPtr != NULLP) { + uint8_t numBytes; + uint8_t bytePos; + uint8_t bitPos; + + uint16_t coreset0Size; + uint16_t rbStart; + uint16_t rbLen; + uint32_t freqDomResAssign; + uint32_t timeDomResAssign; + uint8_t VRB2PRBMap; + uint32_t modNCodScheme; + uint8_t redundancyVer; + uint32_t sysInfoInd; + uint32_t reserved; + + /* Size(in bits) of each field in DCI format 0_1 + * as mentioned in spec 38.214 */ + uint8_t freqDomResAssignSize; + uint8_t timeDomResAssignSize = 4; + uint8_t VRB2PRBMapSize = 1; + uint8_t modNCodSchemeSize = 5; + uint8_t redundancyVerSize = 2; + uint8_t sysInfoIndSize = 1; + uint8_t reservedSize = 15; + dlDciPtr->rnti = sib1PdcchInfo->sib1DlDci.rnti; dlDciPtr->scramblingId = sib1PdcchInfo->sib1DlDci.scramblingId; dlDciPtr->scramblingRnti = sib1PdcchInfo->sib1DlDci.scramblingRnti; @@ -2150,10 +2175,88 @@ void fillDlDciPdu(fapi_dl_dci_t *dlDciPtr, Sib1PdcchCfg *sib1PdcchInfo) dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->sib1DlDci.beamPdcchInfo.prg[0].beamIdx[0]; dlDciPtr->beta_pdcch_1_0 = sib1PdcchInfo->sib1DlDci.txPdcchPower.powerValue; dlDciPtr->powerControlOfssetSS = sib1PdcchInfo->sib1DlDci.txPdcchPower.powerControlOffsetSS; - //dlDciPtr->payloadSizeBits; - //dlDciPtr->payload[DCI_PAYLOAD_BYTE_LEN]; - } -} + + /* Calculating freq domain resource allocation field value and size + * coreset0Size = Size of coreset 0 + * RBStart = Starting Virtual Rsource block + * RBLen = length of contiguously allocted RBs + * Spec 38.214 Sec 5.1.2.2.2 + */ + coreset0Size= sib1PdcchInfo->sib1Coreset0Cfg.coreSet0Size; + rbStart = 0; /* For SIB1 */ + //rbStart = sib1PdcchInfo->sib1DlDci.pdschCfg->sib1FreqAlloc.rbStart; + rbLen = sib1PdcchInfo->sib1DlDci.pdschCfg->sib1FreqAlloc.rbSize; + + if((rbLen >=1) && (rbLen <= coreset0Size - rbStart)) + { + if((rbLen - 1) <= floor(coreset0Size / 2)) + freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart; + else + freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \ + + (coreset0Size - 1 - rbStart); + + freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2)); + } + + /* Fetching DCI field values */ + timeDomResAssign = sib1PdcchInfo->sib1DlDci.pdschCfg->sib1TimeAlloc. + rowIndex -1; + VRB2PRBMap = sib1PdcchInfo->sib1DlDci.pdschCfg->sib1FreqAlloc.\ + vrbPrbMapping; + modNCodScheme = sib1PdcchInfo->sib1DlDci.pdschCfg->codeword[0].mcsIndex; + redundancyVer = sib1PdcchInfo->sib1DlDci.pdschCfg->codeword[0].rvIndex; + sysInfoInd = 0; /* 0 for SIB1; 1 for SI messages */ + reserved = 0; + + /* Reversing bits in each DCI field */ + freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize); + timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize); + VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize); + modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize); + redundancyVer = reverseBits(redundancyVer, redundancyVerSize); + sysInfoInd = reverseBits(sysInfoInd, sysInfoIndSize); + reserved = reverseBits(reserved, reservedSize); + + /* Calulating total number of bytes in buffer */ + dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\ + + VRB2PRBMapSize + modNCodSchemeSize + redundancyVerSize\ + + sysInfoIndSize + reservedSize; + + numBytes = dlDciPtr->payloadSizeBits / 8; + if(dlDciPtr->payloadSizeBits % 8) + numBytes += 1; + + if(numBytes > DCI_PAYLOAD_BYTE_LEN) + { + DU_LOG("\nLOWER MAC : Total bytes for DCI is more than expected"); + return; + } + + /* Initialize buffer */ + for(bytePos = 0; bytePos < numBytes; bytePos++) + dlDciPtr->payload[bytePos] = 0; + + bytePos = numBytes - 1; + bitPos = 0; + + /* Packing DCI format fields */ + fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\ + freqDomResAssign, freqDomResAssignSize); + fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\ + timeDomResAssign, timeDomResAssignSize); + fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\ + VRB2PRBMap, VRB2PRBMapSize); + fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\ + modNCodScheme, modNCodSchemeSize); + fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\ + redundancyVer, redundancyVerSize); + fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\ + sysInfoInd, sysInfoIndSize); + fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\ + reserved, reservedSize); + + } +} /* fillDlDciPdu */ /******************************************************************* * diff --git a/src/5gnrmac/lwr_mac_util.c b/src/5gnrmac/lwr_mac_util.c index 0bba51cf3..7071432ac 100644 --- a/src/5gnrmac/lwr_mac_util.c +++ b/src/5gnrmac/lwr_mac_util.c @@ -64,6 +64,88 @@ PUBLIC ClCellCb * rgClUtlGetCellCb RETVALUE(cellCb); } +/******************************************************************* + * + * @brief Reverses bits in a number + * + * @details + * + * Function : reverseBits + * + * Functionality: + * Reverses bits in a number + * + * @params[in] Number to be reversed + * Number of bits to be reversed + * @return Reversed number + * + * ****************************************************************/ +uint32_t reverseBits(uint32_t num, uint8_t numBits) +{ + uint32_t reverse_num = 0; + int i; + for (i = 0; i < numBits; i++) + { + if((num & (1 << i))) + reverse_num |= 1 << ((numBits - 1) - i); + } + return reverse_num; +} + +/******************************************************************* + * + * @brief Fills DL DCI payload byte by byte + * + * @details + * + * Function : fillDlDciPayload + * + * Functionality: + * Fills DL DCI payload byte by byte + * + * @params[in] Payload buffer pointer + * Current Byte position in buffer + * Current Bit Position in current byte + * Value to be filled + * Number of bits in value + * @return void + * + * ****************************************************************/ + +void fillDlDciPayload(uint8_t *buf, uint8_t *bytePos, uint8_t *bitPos,\ + uint32_t val, uint8_t valSize) +{ + uint8_t temp; + uint8_t bytePart1; + uint32_t bytePart2; + uint8_t bytePart1Size; + uint8_t bytePart2Size; + + if(*bitPos + valSize <= 8) + { + bytePart1 = (uint8_t)val; + bytePart1 = (~((~0) << valSize)) & bytePart1; + buf[*bytePos] |= bytePart1; + *bitPos += valSize; + } + else if(*bitPos + valSize > 8) + { + temp = (uint8_t)val; + bytePart1Size = 8 - *bitPos; + bytePart2Size = valSize - bytePart1Size; + + bytePart1 = ((~((~0) << bytePart1Size)) & temp) << *bitPos; + bytePart2 = val >> bytePart1Size; + + buf[*bytePos] |= bytePart1; + (*bytePos)--; + *bitPos = 0; + fillDlDciPayload(buf, bytePos, bitPos, bytePart2, bytePart2Size); + } +} + + + /********************************************************************** End of file **********************************************************************/ diff --git a/src/5gnrsch/sch.c b/src/5gnrsch/sch.c index 0ef44b8ce..42146731b 100644 --- a/src/5gnrsch/sch.c +++ b/src/5gnrsch/sch.c @@ -428,6 +428,7 @@ uint8_t offsetPointA pdcch->sib1PdcchBwpCfg.BWPStart = 0; pdcch->sib1PdcchBwpCfg.subcarrierSpacing = 0; /* 15Khz */ pdcch->sib1PdcchBwpCfg.cyclicPrefix = 0; /* normal */ + pdcch->sib1Coreset0Cfg.coreSet0Size = numRbs; pdcch->sib1Coreset0Cfg.startSymbolIndex = firstSymbol; pdcch->sib1Coreset0Cfg.durationSymbols = numSymbols; memcpy(pdcch->sib1Coreset0Cfg.freqDomainResource,FreqDomainResource,6); @@ -450,6 +451,9 @@ uint8_t offsetPointA pdcch->sib1DlDci.beamPdcchInfo.prg[0].beamIdx[0] = 0; pdcch->sib1DlDci.txPdcchPower.powerValue = 0; pdcch->sib1DlDci.txPdcchPower.powerControlOffsetSS = 0; + /* Storing pdschCfg pointer here. Required to access pdsch config while + fillig up pdcch pdu */ + pdcch->sib1DlDci.pdschCfg = pdsch; /* fill the PDSCH PDU */ uint8_t cwCount = 0; @@ -486,6 +490,7 @@ uint8_t offsetPointA * Nre = min(156,Nre') . nPrb */ pdsch->sib1FreqAlloc.rbSize = 10; /* This value is calculated from above formulae */ pdsch->sib1FreqAlloc.vrbPrbMapping = 0; /* non-interleaved */ + pdsch->sib1TimeAlloc.rowIndex = 1; pdsch->sib1TimeAlloc.startSymbolIndex = 2; /* spec-38.214, Table 5.1.2.1-1 */ pdsch->sib1TimeAlloc.numSymbols = 12; pdsch->beamPdschInfo.numPrgs = 1; @@ -528,7 +533,6 @@ SchCellCfg *schCellCfg InitSchCellCb(inst, schCellCfg); cellCb = schCb[inst].cells[inst]; //cells is of MAX_CELLS, why inst cellCb->macInst = pst->srcInst; - memcpy(&cellCb->cellCfg, schCellCfg, sizeof(SchCellCfg)); /* derive the SIB1 config parameters */ fillSchSib1Cfg( @@ -536,6 +540,7 @@ SchCellCfg *schCellCfg &(schCellCfg->sib1SchCfg), schCellCfg->phyCellId, schCellCfg->ssbSchCfg.ssbOffsetPointA); + memcpy(&cellCb->cellCfg, schCellCfg, sizeof(SchCellCfg)); memset(&rspPst, 0, sizeof(Pst)); SCH_FILL_RSP_PST(rspPst, inst); diff --git a/src/cm/mac_sch_interface.h b/src/cm/mac_sch_interface.h index 1a5c9e9a8..bb2759d4f 100644 --- a/src/cm/mac_sch_interface.h +++ b/src/cm/mac_sch_interface.h @@ -58,7 +58,6 @@ typedef struct uint32_t nSSBMask[SSB_MASK_SIZE]; /* Bitmap for actually transmitted SSB. */ }SchSsbCfg; -/* SIB1 interface structure */ typedef struct bwpCfg { uint8_t subcarrierSpacing; @@ -67,21 +66,6 @@ typedef struct bwpCfg uint16_t BWPStart; }BwpCfg; -typedef struct coresetCfg -{ - uint8_t startSymbolIndex; - uint8_t durationSymbols; - uint8_t freqDomainResource[6]; - uint8_t cceRegMappingType; - uint8_t regBundleSize; - uint8_t interleaverSize; - uint8_t coreSetType; - uint16_t shiftIndex; - uint8_t precoderGranularity; - uint8_t cceIndex; - uint8_t aggregationLevel; -} CoresetCfg; - typedef struct prg { uint16_t pmIdx; @@ -96,34 +80,6 @@ typedef struct beamformingInfo Prg prg[MAX_NUM_PRG]; } BeamformingInfo; -typedef struct txPowerPdcchInfo -{ - uint8_t powerValue; - uint8_t powerControlOffsetSS; -} TxPowerPdcchInfo; - -typedef struct dlDCI -{ - uint16_t rnti; - uint16_t scramblingId; - uint16_t scramblingRnti; - uint8_t cceIndex; - uint8_t aggregLevel; - BeamformingInfo beamPdcchInfo; - TxPowerPdcchInfo txPdcchPower; -} DlDCI; - -typedef struct sib1PdcchCfg -{ - BwpCfg sib1PdcchBwpCfg; - /* coreset-0 configuration */ - CoresetCfg sib1Coreset0Cfg; - - uint16_t numDlDci; - DlDCI sib1DlDci; /* as of now its only one DCI, later it will be numDlCi */ -} Sib1PdcchCfg; -/* end of SIB1 PDCCH structures */ - /* SIB1 PDSCH structures */ typedef struct codewordinfo @@ -157,6 +113,7 @@ typedef struct pdschFreqAlloc typedef struct pdschTimeAlloc { + uint8_t rowIndex; uint8_t startSymbolIndex; uint8_t numSymbols; } PdschTimeAlloc; @@ -187,6 +144,53 @@ typedef struct sib1PdschCfg } Sib1PdschCfg; /* SIB1 PDSCH structures end */ +/* SIB1 interface structure */ + +typedef struct coresetCfg +{ + uint8_t coreSet0Size; + uint8_t startSymbolIndex; + uint8_t durationSymbols; + uint8_t freqDomainResource[6]; + uint8_t cceRegMappingType; + uint8_t regBundleSize; + uint8_t interleaverSize; + uint8_t coreSetType; + uint16_t shiftIndex; + uint8_t precoderGranularity; + uint8_t cceIndex; + uint8_t aggregationLevel; +} CoresetCfg; + +typedef struct txPowerPdcchInfo +{ + uint8_t powerValue; + uint8_t powerControlOffsetSS; +} TxPowerPdcchInfo; + +typedef struct dlDCI +{ + uint16_t rnti; + uint16_t scramblingId; + uint16_t scramblingRnti; + uint8_t cceIndex; + uint8_t aggregLevel; + BeamformingInfo beamPdcchInfo; + TxPowerPdcchInfo txPdcchPower; + Sib1PdschCfg *pdschCfg; +} DlDCI; + +typedef struct sib1PdcchCfg +{ + BwpCfg sib1PdcchBwpCfg; + /* coreset-0 configuration */ + CoresetCfg sib1Coreset0Cfg; + + uint16_t numDlDci; + DlDCI sib1DlDci; /* as of now its only one DCI, later it will be numDlCi */ +} Sib1PdcchCfg; +/* end of SIB1 PDCCH structures */ + typedef struct { /* parameters recieved from DU-APP */ -- 2.16.6