From 2a05694263fa633b9b051cb249d0e43128d5a760 Mon Sep 17 00:00:00 2001
From: sphoorthi <sphoorthi.dayanand@radisys.com>
Date: Fri, 12 Mar 2021 10:22:25 +0530
Subject: [PATCH] Added fix for SSB and SIB1 repeatition

Change-Id: I825955e0d07e264bbaf7764061b8302cc3c941ac
Signed-off-by: sphoorthi <sphoorthi.dayanand@radisys.com>
---
 src/5gnrsch/sch.c               | 2 ++
 src/5gnrsch/sch.h               | 2 ++
 src/5gnrsch/sch_slot_ind.c      | 8 ++++++--
 src/phy_stub/phy_stub_msg_hdl.c | 2 +-
 4 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/src/5gnrsch/sch.c b/src/5gnrsch/sch.c
index afbcb183e..08f399728 100644
--- a/src/5gnrsch/sch.c
+++ b/src/5gnrsch/sch.c
@@ -678,6 +678,8 @@ uint8_t schInitCellCb(Inst inst, SchCellCfg *schCellCfg)
       cell->schUlSlotInfo[idx] = schUlSlotInfo;
 
    }
+   cell->firstSsbTransmitted = false;
+   cell->firstSib1Transmitted = false;
    fillSsbStartSymb(cell);
    schCb[inst].cells[inst] = cell;
 
diff --git a/src/5gnrsch/sch.h b/src/5gnrsch/sch.h
index 900a7f25e..11ec5016a 100644
--- a/src/5gnrsch/sch.h
+++ b/src/5gnrsch/sch.h
@@ -199,6 +199,8 @@ typedef struct schCellCb
    SchDlSlotInfo **schDlSlotInfo;                   /*!< SCH resource allocations in DL */
    SchUlSlotInfo **schUlSlotInfo;                   /*!< SCH resource allocations in UL */
    SchCellCfg    cellCfg;                           /*!< Cell ocnfiguration */
+   bool          firstSsbTransmitted;
+   bool          firstSib1Transmitted;
    uint8_t       ssbStartSymbArr[SCH_MAX_SSB_BEAM]; /*!<start symbol per SSB beam */
    SchRaCb       raCb[MAX_NUM_UE];                  /*!< Rach Cb */
    uint16_t      numActvUe;                         /*!<Number of active UEs */
diff --git a/src/5gnrsch/sch_slot_ind.c b/src/5gnrsch/sch_slot_ind.c
index 2c8a853ed..935d22c1a 100644
--- a/src/5gnrsch/sch_slot_ind.c
+++ b/src/5gnrsch/sch_slot_ind.c
@@ -251,8 +251,10 @@ uint8_t schProcessSlotInd(SlotIndInfo *slotInd, Inst schInst)
    if (sfnSlot % SCH_MIB_TRANS == 0)
    {
       dlBrdcstAlloc->ssbTrans = SSB_TRANSMISSION;
+      if(!cell->firstSsbTransmitted)
+         cell->firstSsbTransmitted = true;
    }
-   else if (sfnSlot % ssb_rep == 0)
+   else if (cell->firstSsbTransmitted && (sfnSlot % ssb_rep == 0))
    {
       dlBrdcstAlloc->ssbTrans = SSB_REPEAT;
    }
@@ -265,8 +267,10 @@ uint8_t schProcessSlotInd(SlotIndInfo *slotInd, Inst schInst)
    if(sfnSlot % cell->cellCfg.sib1SchCfg.sib1NewTxPeriod == 0)
    {
       dlBrdcstAlloc->sib1Trans = SIB1_TRANSMISSION;
+      if(!cell->firstSib1Transmitted)
+         cell->firstSib1Transmitted = true;
    }
-   else if (sfnSlot % cell->cellCfg.sib1SchCfg.sib1RepetitionPeriod == 0)
+   else if (cell->firstSib1Transmitted && (sfnSlot % cell->cellCfg.sib1SchCfg.sib1RepetitionPeriod == 0))
    {
       dlBrdcstAlloc->sib1Trans = SIB1_REPITITION;
    }
diff --git a/src/phy_stub/phy_stub_msg_hdl.c b/src/phy_stub/phy_stub_msg_hdl.c
index 1974165e2..98fa2a652 100644
--- a/src/phy_stub/phy_stub_msg_hdl.c
+++ b/src/phy_stub/phy_stub_msg_hdl.c
@@ -1023,7 +1023,7 @@ S16 l1HdlUlTtiReq(uint16_t msgLen, void *msg)
       numPdus--;
    }
 
-   if(rachIndSent == false && ulTtiReq->sfn == 2 && ulTtiReq->slot == 6)
+   if(rachIndSent == false && ulTtiReq->sfn == 16 && ulTtiReq->slot == 6)
    {
       rachIndSent = true;
       l1BuildAndSendRachInd(ulTtiReq->slot, ulTtiReq->sfn);
-- 
2.16.6