From: svaidhya Date: Tue, 19 Aug 2025 05:47:24 +0000 (+0000) Subject: [ODUHIGH-557][ODUHIGH-651]Corrected Muxing of MSG4 in ODU| MSG4/RRC Setup not reachin... X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=commitdiff_plain;h=refs%2Fheads%2Foai-integration;p=o-du%2Fl2.git [ODUHIGH-557][ODUHIGH-651]Corrected Muxing of MSG4 in ODU| MSG4/RRC Setup not reaching OAI-UE Change-Id: I4c87870c83fd04e0bda3d48c110553cbe997a82a Signed-off-by: svaidhya --- diff --git a/src/5gnrmac/lwr_mac_fsm.c b/src/5gnrmac/lwr_mac_fsm.c index 71e670d93..35da075dc 100644 --- a/src/5gnrmac/lwr_mac_fsm.c +++ b/src/5gnrmac/lwr_mac_fsm.c @@ -2095,11 +2095,11 @@ void packDlTtiReq(fapi_dl_tti_req_t *dlTtiReq,uint8_t *out , uint32_t *len) fapi_precoding_bmform_t *preCodingAndBeamforming= &dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].pc_and_bform; - CMCHKPKLEN(oduPackPostUInt16, reverseBytes16(preCodingAndBeamforming->numPrgs), &mBuf, &totalLen); - CMCHKPKLEN(oduPackPostUInt16, reverseBytes16(preCodingAndBeamforming->prgSize), &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, preCodingAndBeamforming->numPrgs, &mBuf, &totalLen); + CMCHKPKLEN(oduPackPostUInt16, preCodingAndBeamforming->prgSize, &mBuf, &totalLen); CMCHKPKLEN(oduPackPostUInt8, preCodingAndBeamforming->digBfInterfaces, &mBuf, &totalLen); - for(uint16_t prgIdx = 0; prgIdx < preCodingAndBeamforming->numPrgs; prgIdx++) + for(uint16_t prgIdx = 0; prgIdx < reverseBytes16(preCodingAndBeamforming->numPrgs); prgIdx++) { CMCHKPKLEN(oduPackPostUInt16, preCodingAndBeamforming->pmi_bfi[prgIdx].pmIdx, &mBuf, &totalLen); for(uint8_t digBfIdx = 0; digBfIdx < preCodingAndBeamforming->digBfInterfaces; digBfIdx++) @@ -4083,7 +4083,7 @@ void fillDlMsgDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *pdcchInfo,\ /* Fetching DCI field values */ dciFormatId = dlMsgSchInfo->dciFormatId; /* Always set to 1 for DL */ - timeDomResAssign = pdcchInfo->dci[dciIndex].pdschCfg.pdschTimeAlloc.rowIndex -1; + timeDomResAssign = pdcchInfo->dci[dciIndex].pdschCfg.pdschTimeAlloc.rowIndex; VRB2PRBMap = pdcchInfo->dci[dciIndex].pdschCfg.pdschFreqAlloc.vrbPrbMapping; modNCodScheme = pdcchInfo->dci[dciIndex].pdschCfg.codeword[0].mcsIndex; ndi = dlMsgSchInfo->transportBlock[0].ndi; @@ -4095,6 +4095,7 @@ void fillDlMsgDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *pdcchInfo,\ harqFeedbackInd = dlMsgSchInfo->harqFeedbackInd; /* Reversing bits in each DCI field */ +#ifndef OAI_TESTING dciFormatId = reverseBits(dciFormatId, dciFormatIdSize); freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize); timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize); @@ -4107,7 +4108,7 @@ void fillDlMsgDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *pdcchInfo,\ pucchTpc = reverseBits(pucchTpc, pucchTpcSize); pucchResoInd = reverseBits(pucchResoInd, pucchResoIndSize); harqFeedbackInd = reverseBits(harqFeedbackInd, harqFeedbackIndSize); - +#endif /* Calulating total number of bytes in buffer */ dlDciPtr[dciIndex].payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\ @@ -4134,7 +4135,11 @@ void fillDlMsgDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *pdcchInfo,\ dlDciPtr[dciIndex].payload[bytePos] = 0; bytePos = numBytes - 1; +#ifdef OAI_TESTING + bitPos = 1; +#else bitPos = 0; +#endif /* Packing DCI format fields */ fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\ @@ -4151,8 +4156,6 @@ void fillDlMsgDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *pdcchInfo,\ ndi, ndiSize); fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\ redundancyVer, redundancyVerSize); - fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\ - redundancyVer, redundancyVerSize); fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\ harqProcessNum, harqProcessNumSize); fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\ @@ -4541,8 +4544,8 @@ void fillPdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = reverseBytes16(pdschInfo->beamPdschInfo.prg[0].pmIdx); dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].beamIdx[0].beamidx = reverseBytes16(pdschInfo->beamPdschInfo.prg[0].beamIdx[0]); - dlTtiReqPdu->pdu.pdsch_pdu.maintParamV3.ldpcBaseGraph=2; - dlTtiReqPdu->pdu.pdsch_pdu.maintParamV3.tbSizeLbrmBytes=reverseBytes32(57376); + dlTtiReqPdu->pdu.pdsch_pdu.maintParamV3.ldpcBaseGraph = pdschInfo->maintParamV3.ldpcBaseGraph; + dlTtiReqPdu->pdu.pdsch_pdu.maintParamV3.tbSizeLbrmBytes = reverseBytes32(pdschInfo->maintParamV3.tbSizeLbrmBytes); #else dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces; dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs; @@ -5003,7 +5006,25 @@ uint8_t fillDlMsgTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlMsg #else LWR_MAC_FREE(dlMsgPayload, payloadSize); #endif + +#else + + uint8_t tlvPaddingLen =get_tlv_padding(dlMsgSchInfo->dlMsgPduLen); + uint16_t totalLen= dlMsgSchInfo->dlMsgPduLen +tlvPaddingLen; + + pduDesc[pduIndex].pdu_length = totalLen; + pduDesc[pduIndex].pdu_length = reverseBytes32(pduDesc[pduIndex].pdu_length); + + pduDesc[pduIndex].pdu_index = reverseBytes16(pduIndex); + pduDesc[pduIndex].num_tlvs = reverseBytes32(1); + /* fill the TLV */ + pduDesc[pduIndex].tlvs[0].tag = reverseBytes16(FAPI_TX_DATA_PAYLOAD); + pduDesc[pduIndex].tlvs[0].length = reverseBytes32(dlMsgSchInfo->dlMsgPduLen); + + memcpy(pduDesc[pduIndex].tlvs[0].value.direct, dlMsgSchInfo->dlMsgPdu, dlMsgSchInfo->dlMsgPduLen); + #endif /* FAPI */ + return ROK; } diff --git a/src/5gnrmac/mac_mux.c b/src/5gnrmac/mac_mux.c index 038ab2852..379b904bb 100644 --- a/src/5gnrmac/mac_mux.c +++ b/src/5gnrmac/mac_mux.c @@ -322,7 +322,11 @@ void fillMacCe(MacCeInfo *macCeInfo, uint8_t *msg3Pdu) void macMuxPdu(MacDlData *dlData, MacCeInfo *macCeData, uint8_t *txPdu, uint16_t tbSize) { uint16_t bytePos = 0; +#ifndef OAI_TESTING uint8_t bitPos = 7; +#else + uint8_t bitPos = 0; +#endif uint8_t pduIdx = 0; uint8_t macPdu[tbSize]; memset(macPdu, 0, (tbSize * sizeof(uint8_t))); @@ -352,9 +356,10 @@ void macMuxPdu(MacDlData *dlData, MacCeInfo *macCeData, uint8_t *txPdu, uint16_t /* Packing fields into MAC PDU R/R/LCID */ packBytes(macPdu, &bytePos, &bitPos, RBit, (RBitSize * 2)); packBytes(macPdu, &bytePos, &bitPos, lcid, lcidSize); - memcpy(&macPdu[bytePos], macCeData->macCe[pduIdx].macCeValue,\ - MAX_CRI_SIZE); - bytePos += MAX_CRI_SIZE; + bytePos++; + memcpy(&macPdu[bytePos], macCeData->macCe[pduIdx].macCeValue,\ + MAX_CRI_SIZE); + bytePos += (MAX_CRI_SIZE - 1); break; } default: @@ -390,8 +395,9 @@ void macMuxPdu(MacDlData *dlData, MacCeInfo *macCeData, uint8_t *txPdu, uint16_t packBytes(macPdu, &bytePos, &bitPos, FBit, FBitSize); packBytes(macPdu, &bytePos, &bitPos, lcid, lcidSize); packBytes(macPdu, &bytePos, &bitPos, lenField, lenFieldSize); + bytePos++; memcpy(&macPdu[bytePos], dlData->pduInfo[pduIdx].dlPdu, lenField); - bytePos += lenField; + bytePos += (lenField - 1); break; } diff --git a/src/5gnrsch/sch.c b/src/5gnrsch/sch.c index abfa5fe53..065c6f530 100644 --- a/src/5gnrsch/sch.c +++ b/src/5gnrsch/sch.c @@ -767,7 +767,8 @@ uint8_t fillSchSib1Cfg(uint8_t mu, uint8_t bandwidth, uint8_t numSlots,SchPdcchC pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0; pdsch->txPdschPower.powerControlOffset = 0; pdsch->txPdschPower.powerControlOffsetSS = 0; - + pdsch->maintParamV3.ldpcBaseGraph = 2; + pdsch->maintParamV3.tbSizeLbrmBytes = 57376; return ROK; } @@ -1366,7 +1367,7 @@ uint8_t allocatePrbDl(SchCellCb *cell, SlotTimingInfo slotTime, \ { if (freePrbBlock->numFreePrb >= numPrb) { - *startPrb = freePrbBlock->endPrb - numPrb +1; + *startPrb = freePrbBlock->startPrb; } break; } @@ -1406,7 +1407,7 @@ uint8_t allocatePrbDl(SchCellCb *cell, SlotTimingInfo slotTime, \ * endPrb = freePrbBlock->endPrb * startPrb = endPrb - numPrb +1; */ - *startPrb = freePrbBlock->endPrb - numPrb +1; + *startPrb = freePrbBlock->startPrb; break; } else if((broadcastPrbStart > freePrbBlock->startPrb) && ((broadcastPrbStart - freePrbBlock->startPrb) >= numPrb)) @@ -1432,7 +1433,7 @@ uint8_t allocatePrbDl(SchCellCb *cell, SlotTimingInfo slotTime, \ freePrbNode = freePrbNode->next; continue; } - *startPrb = freePrbBlock->endPrb - numPrb +1; + *startPrb = freePrbBlock->startPrb; break; } } diff --git a/src/5gnrsch/sch.h b/src/5gnrsch/sch.h index 11a770267..8a89ca062 100644 --- a/src/5gnrsch/sch.h +++ b/src/5gnrsch/sch.h @@ -35,7 +35,11 @@ #define SCH_SSB_NUM_PRB 21 /* One extra PRB as buffer */ #endif +#ifndef OAI_TESTING #define SCHED_DELTA 1 +#else +#define SCHED_DELTA 0 +#endif #define BO_DELTA 1 #define RAR_DELAY 1 #define MSG4_DELAY 1 @@ -793,12 +797,12 @@ bool schFillBoGrantDlSchedInfo(SchCellCb *cell, SlotTimingInfo currTime, uint8_t uint8_t schDlRsrcAllocDlMsg(SchCellCb *cell, SlotTimingInfo slotTime, uint16_t crnti, uint32_t tbSize, DlMsgSchInfo *dlMsgAlloc,\ uint16_t startPRB, uint8_t pdschStartSymbol, uint8_t pdschNumSymbols,bool isRetx, SchDlHqProcCb* hqP, SchPdcchAllocInfo pdcchAllocInfo); uint8_t schDlRsrcAllocMsg4(SchCellCb *cell, SlotTimingInfo msg4Time, uint8_t ueId, DlMsgSchInfo *msg4Alloc,\ -uint8_t pdschStartSymbol, uint8_t pdschNumSymbols, bool isRetx, SchDlHqProcCb *hqP); + uint8_t pdschStartSymbol, uint8_t pdschNumSymbols, bool isRetx, SchDlHqProcCb *hqP, uint8_t k0Index); uint8_t allocatePrbDl(SchCellCb *cell, SlotTimingInfo slotTime, uint8_t startSymbol, uint8_t symbolLength, \ uint16_t *startPrb, uint16_t numPrb); void fillDlMsgInfo(DlMsgSchInfo *dlMsgInfo, uint16_t crnti, bool isRetx, SchDlHqProcCb* hqP); /*AS per 38.473 V15.3.0, Section 9.3.1.32 crnti value range is b/w 0..65535*/ bool findValidK0K1Value(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId, bool dedMsg, uint8_t *pdschStartSymbol, uint8_t *pdschSymblLen,\ - SlotTimingInfo *pdcchTime, SlotTimingInfo *pdschTime, SlotTimingInfo *pucchTime, bool isRetx, SchDlHqProcCb *hqP, SchPdcchAllocInfo *pdcchAllocInfo); + SlotTimingInfo *pdcchTime, SlotTimingInfo *pdschTime, SlotTimingInfo *pucchTime, bool isRetx, SchDlHqProcCb *hqP, SchPdcchAllocInfo *pdcchAllocInfo, uint8_t *k0Index); RaRspWindowStatus isInRaRspWindow(SchRaReq *raReq, SlotTimingInfo frameToCheck, uint16_t numSlotsPerSystemFrame); /* UL scheduling related function declarations */ diff --git a/src/5gnrsch/sch_common.c b/src/5gnrsch/sch_common.c index 6893e3823..e6a89b25f 100644 --- a/src/5gnrsch/sch_common.c +++ b/src/5gnrsch/sch_common.c @@ -159,6 +159,10 @@ uint8_t schBroadcastSib1Alloc(SchCellCb *cell, SlotTimingInfo slotTime, DlBrdcst startSymbol = dmrsStartSymbol; numSymbol = dmrs.nrOfDmrsSymbols + timeAlloc.numSymb; } + if((startSymbol + numSymbol) > MAX_SYMB_PER_SLOT) + { + numSymbol = (MAX_SYMB_PER_SLOT - startSymbol); + } /* Allocate PRB */ if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol, &freqAlloc.startPrb, freqAlloc.numPrb)) != ROK) @@ -614,15 +618,20 @@ uint8_t schUlResAlloc(SchCellCb *cell, Inst schInst) * * ****************************************************************/ uint8_t schDlRsrcAllocMsg4(SchCellCb *cell, SlotTimingInfo msg4Time, uint8_t ueId, DlMsgSchInfo *dlMsgAlloc,\ - uint8_t pdschStartSymbol, uint8_t pdschNumSymbols, bool isRetx, SchDlHqProcCb *hqP) + uint8_t pdschStartSymbol, uint8_t pdschNumSymbols, bool isRetx, SchDlHqProcCb *hqP, uint8_t k0Index) { uint8_t coreset0Idx = 0; uint8_t firstSymbol = 0; uint8_t numSymbols = 0; - uint8_t mcs = DEFAULT_MCS; /* MCS fixed to 4 */ - uint8_t dmrsStartSymbol = 0, startSymbol = 0, numSymbol = 0; + uint8_t mcs = 1; + uint8_t dmrsStartSymbol = 0, numDmrsSymbol = 0, startSymbol = 0, numSymbol = 0; uint16_t tbSize = 0; uint16_t numRbs; + uint16_t offsetToPointA = 0; + uint8_t freqDomainResource[FREQ_DOM_RSRC_SIZE] = {0}; + uint16_t targetCodeRate = 0; + uint8_t qam = 0; + uint16_t msg4PduLen = 0; SchBwpDlCfg *initialBwp = NULLP; PdcchCfg *pdcch = NULLP; PdschCfg *pdsch = NULLP; @@ -641,6 +650,7 @@ uint8_t schDlRsrcAllocMsg4(SchCellCb *cell, SlotTimingInfo msg4Time, uint8_t ueI return RFAILED; } + offsetToPointA = cell->cellCfg.dlCfgCommon.schFreqInfoDlSib.offsetToPointA; msg4Alloc = dlMsgAlloc; initialBwp = &cell->cellCfg.dlCfgCommon.schInitialDlBwp; SCH_ALLOC(msg4Alloc->dlMsgPdcchCfg, sizeof(PdcchCfg)); @@ -652,12 +662,12 @@ uint8_t schDlRsrcAllocMsg4(SchCellCb *cell, SlotTimingInfo msg4Time, uint8_t ueI } pdcch = msg4Alloc->dlMsgPdcchCfg; bwp = &msg4Alloc->bwp; - coreset0Idx = initialBwp->pdcchCommon.commonSearchSpace.coresetId; fillDlMsgInfo(msg4Alloc, cell->raCb[ueId-1].tcrnti, isRetx, hqP); msg4Alloc->dlMsgPduLen = cell->raCb[ueId-1].dlMsgPduLen; /* derive the sib1 coreset0 params from table 13-1 spec 38.213 */ + coreset0Idx = initialBwp->pdcchCommon.commonSearchSpace.coresetId; numRbs = coresetIdxTable[coreset0Idx][1]; numSymbols = coresetIdxTable[coreset0Idx][2]; @@ -672,16 +682,26 @@ uint8_t schDlRsrcAllocMsg4(SchCellCb *cell, SlotTimingInfo msg4Time, uint8_t ueI } /* fill BWP */ +#ifndef OAI_TESTING bwp->freqAlloc.numPrb = initialBwp->bwp.freqAlloc.numPrb; bwp->freqAlloc.startPrb = initialBwp->bwp.freqAlloc.startPrb; +#else + bwp->freqAlloc.numPrb = numRbs; + bwp->freqAlloc.startPrb = ((offsetToPointA >> initialBwp->bwp.scs) - coresetIdxTable[coreset0Idx][3]); +#endif bwp->subcarrierSpacing = initialBwp->bwp.scs; bwp->cyclicPrefix = initialBwp->bwp.cyclicPrefix; /* fill the PDCCH PDU */ pdcch->coresetCfg.startSymbolIndex = firstSymbol; pdcch->coresetCfg.durationSymbols = numSymbols; +#ifndef OAI_TESTING memcpy(pdcch->coresetCfg.freqDomainResource, \ cell->cellCfg.dlCfgCommon.schInitialDlBwp.pdcchCommon.commonSearchSpace.freqDomainRsrc, FREQ_DOM_RSRC_SIZE); +#else + freqDomainResource[0]=255; + memcpy(pdcch->coresetCfg.freqDomainResource,freqDomainResource, FREQ_DOM_RSRC_SIZE); +#endif pdcch->coresetCfg.cceRegMappingType = 1; /* coreset0 is always interleaved */ pdcch->coresetCfg.regBundleSize = 6; /* spec-38.211 sec 7.3.2.2 */ @@ -694,15 +714,15 @@ uint8_t schDlRsrcAllocMsg4(SchCellCb *cell, SlotTimingInfo msg4Time, uint8_t ueI pdcch->dci[0].rnti = cell->raCb[ueId-1].tcrnti; pdcch->dci[0].scramblingId = cell->cellCfg.phyCellId; pdcch->dci[0].scramblingRnti = 0; - pdcch->dci[0].cceIndex = 4; /* considering SIB1 is sent at cce 0-1-2-3 */ + pdcch->dci[0].cceIndex = 0; pdcch->dci[0].aggregLevel = 4; - pdcch->dci[0].beamPdcchInfo.numPrgs = 1; - pdcch->dci[0].beamPdcchInfo.prgSize = 1; - pdcch->dci[0].beamPdcchInfo.digBfInterfaces = 0; + pdcch->dci[0].beamPdcchInfo.numPrgs = 0; + pdcch->dci[0].beamPdcchInfo.prgSize = 0; + pdcch->dci[0].beamPdcchInfo.digBfInterfaces = 1; pdcch->dci[0].beamPdcchInfo.prg[0].pmIdx = 0; pdcch->dci[0].beamPdcchInfo.prg[0].beamIdx[0] = 0; pdcch->dci[0].txPdcchPower.beta_pdcch_1_0 = 0; - pdcch->dci[0].txPdcchPower.powerControlOffsetSS = 0; + pdcch->dci[0].txPdcchPower.powerControlOffsetSS = 1; pdsch = &pdcch->dci[0].pdschCfg; /* fill the PDSCH PDU */ @@ -711,20 +731,48 @@ uint8_t schDlRsrcAllocMsg4(SchCellCb *cell, SlotTimingInfo msg4Time, uint8_t ueI pdsch->rnti = cell->raCb[ueId-1].tcrnti; pdsch->pduIndex = 0; pdsch->numCodewords = 1; + pdsch->dmrs.dlDmrsSymbPos = 2180; + numDmrsSymbol = findNumDmrsSymbol(pdsch->dmrs.dlDmrsSymbPos); for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++) { - pdsch->codeword[cwCount].targetCodeRate = 308; - pdsch->codeword[cwCount].qamModOrder = 2; - pdsch->codeword[cwCount].mcsIndex = mcs; /* mcs configured to 4 */ - pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */ if(isRetx != TRUE) { - tbSize = schCalcTbSize(msg4Alloc->dlMsgPduLen + TX_PAYLOAD_HDR_LEN); /* MSG4 size + FAPI header size*/ + msg4PduLen = msg4Alloc->dlMsgPduLen + TX_PAYLOAD_HDR_LEN; + mcs = 1; + pdsch->pdschFreqAlloc.numPrb = 0; + qam = 0; + targetCodeRate = 0; + do + { + if(pdsch->pdschFreqAlloc.numPrb < bwp->freqAlloc.numPrb) + { + pdsch->pdschFreqAlloc.numPrb++; + } + else + { + if(mcs < 10) + { + mcs++; + } + else + break; + } + tbSize = (schCalcTbSizeFromNPrb(pdsch->pdschFreqAlloc.numPrb, mcs, 13, numDmrsSymbol, &targetCodeRate, &qam) >> 3); + }while(msg4PduLen > tbSize); + hqP->tbInfo[cwCount].tbSzReq = tbSize; pdsch->codeword[cwCount].rvIndex = 0; + pdsch->codeword[cwCount].targetCodeRate = targetCodeRate; + pdsch->codeword[cwCount].qamModOrder = qam; + pdsch->codeword[cwCount].mcsIndex = mcs; /* mcs configured to 4 */ + pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */ } else { + pdsch->codeword[cwCount].targetCodeRate = 308; + pdsch->codeword[cwCount].qamModOrder = 2; + pdsch->codeword[cwCount].mcsIndex = DEFAULT_MCS; /* mcs configured to 4 */ + pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */ pdsch->codeword[cwCount].rvIndex = (pdsch->codeword[cwCount].rvIndex +1) & 0x03; tbSize = hqP->tbInfo[cwCount].tbSzReq; } @@ -734,12 +782,11 @@ uint8_t schDlRsrcAllocMsg4(SchCellCb *cell, SlotTimingInfo msg4Time, uint8_t ueI pdsch->numLayers = 1; pdsch->transmissionScheme = 0; pdsch->refPoint = 0; - pdsch->dmrs.dlDmrsSymbPos = DL_DMRS_SYMBOL_POS; pdsch->dmrs.dmrsConfigType = 0; /* type-1 */ pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId; pdsch->dmrs.scid = 0; - pdsch->dmrs.numDmrsCdmGrpsNoData = 1; - pdsch->dmrs.dmrsPorts = 0; + pdsch->dmrs.numDmrsCdmGrpsNoData = 2; + pdsch->dmrs.dmrsPorts = 1; pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Setting to Type-A */ pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS; pdsch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS; @@ -749,8 +796,8 @@ uint8_t schDlRsrcAllocMsg4(SchCellCb *cell, SlotTimingInfo msg4Time, uint8_t ueI pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */ pdsch->pdschFreqAlloc.startPrb = MAX_NUM_RB; - pdsch->pdschFreqAlloc.numPrb = schCalcNumPrb(tbSize, mcs, pdschNumSymbols); pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */ + pdsch->pdschTimeAlloc.rowIndex = k0Index; /* Find total symbols occupied including DMRS */ dmrsStartSymbol = findDmrsStartSymbol(pdsch->dmrs.dlDmrsSymbPos); @@ -767,6 +814,10 @@ uint8_t schDlRsrcAllocMsg4(SchCellCb *cell, SlotTimingInfo msg4Time, uint8_t ueI startSymbol = dmrsStartSymbol; numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.numSymb; } + if((startSymbol + numSymbol) > MAX_SYMB_PER_SLOT) + { + numSymbol = (MAX_SYMB_PER_SLOT - startSymbol); + } /* Allocate the number of PRBs required for RAR PDSCH */ if((allocatePrbDl(cell, msg4Time, startSymbol, numSymbol,\ @@ -777,13 +828,15 @@ uint8_t schDlRsrcAllocMsg4(SchCellCb *cell, SlotTimingInfo msg4Time, uint8_t ueI return RFAILED; } - pdsch->beamPdschInfo.numPrgs = 1; - pdsch->beamPdschInfo.prgSize = 1; + pdsch->beamPdschInfo.numPrgs = 0; + pdsch->beamPdschInfo.prgSize = 48; pdsch->beamPdschInfo.digBfInterfaces = 0; pdsch->beamPdschInfo.prg[0].pmIdx = 0; pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0; pdsch->txPdschPower.powerControlOffset = 0; pdsch->txPdschPower.powerControlOffsetSS = 0; + pdsch->maintParamV3.ldpcBaseGraph = 2; + pdsch->maintParamV3.tbSizeLbrmBytes = 237776; return ROK; } @@ -1019,6 +1072,10 @@ uint8_t schDlRsrcAllocDlMsg(SchCellCb *cell, SlotTimingInfo slotTime, uint16_t c startSymbol = dmrsStartSymbol; numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.numSymb; } + if((startSymbol + numSymbol) > MAX_SYMB_PER_SLOT) + { + numSymbol = (MAX_SYMB_PER_SLOT - startSymbol); + } /* Allocate the number of PRBs required for DL PDSCH */ if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol,\ @@ -1812,7 +1869,7 @@ void fillDlMsgInfo(DlMsgSchInfo *dlMsgSchInfo, uint16_t crnti, bool isRetx, SchD dlMsgSchInfo->dlAssignIdx = 0; dlMsgSchInfo->pucchTpc = 0; dlMsgSchInfo->pucchResInd = PUCCH_RES_IND; - dlMsgSchInfo->harqFeedbackInd = hqP->k1; + dlMsgSchInfo->harqFeedbackInd = 7; dlMsgSchInfo->dciFormatId = 1; } @@ -1839,7 +1896,7 @@ void fillDlMsgInfo(DlMsgSchInfo *dlMsgSchInfo, uint16_t crnti, bool isRetx, SchD uint8_t schProcessMsg4Req(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId, bool isRetxMsg4, SchDlHqProcCb **msg4HqProc) { - uint8_t pdschStartSymbol = 0, pdschNumSymbols = 0; + uint8_t pdschStartSymbol = 0, pdschNumSymbols = 0, k0Index = 0; SlotTimingInfo pdcchTime, pdschTime, pucchTime; DlMsgSchInfo *dciSlotAlloc = NULLP; /* Stores info for transmission of PDCCH for Msg4 */ DlMsgSchInfo *msg4SlotAlloc = NULLP; /* Stores info for transmission of PDSCH for Msg4 */ @@ -1860,7 +1917,7 @@ uint8_t schProcessMsg4Req(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId } if(findValidK0K1Value(cell, currTime, ueId, false, &pdschStartSymbol, &pdschNumSymbols, &pdcchTime, &pdschTime,\ - &pucchTime, isRetxMsg4, *msg4HqProc, NULLP) != true ) + &pucchTime, isRetxMsg4, *msg4HqProc, NULLP, &k0Index) != true ) { DU_LOG("\nERROR --> SCH: schProcessMsg4Req() : k0 k1 not found"); return RFAILED; @@ -1881,7 +1938,7 @@ uint8_t schProcessMsg4Req(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId dciSlotAlloc = cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1]; /* Fill PDCCH and PDSCH scheduling information for Msg4 */ - if((schDlRsrcAllocMsg4(cell, pdschTime, ueId, dciSlotAlloc, pdschStartSymbol, pdschNumSymbols, isRetxMsg4, *msg4HqProc)) != ROK) + if((schDlRsrcAllocMsg4(cell, pdschTime, ueId, dciSlotAlloc, pdschStartSymbol, pdschNumSymbols, isRetxMsg4, *msg4HqProc, k0Index)) != ROK) { DU_LOG("\nERROR --> SCH: Scheduling of Msg4 failed in slot [%d]", pdschTime.slot); if(!dciSlotAlloc->dlMsgPdschCfg) @@ -2078,7 +2135,7 @@ bool schProcessSrOrBsrReq(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId /* Calculating time frame to send DCI for SR */ ADD_DELTA_TO_TIME(currTime, dciTime, gConfigInfo.gPhyDeltaDl + SCHED_DELTA, cell->numSlots); #ifdef NR_TDD - if(schGetSlotSymbFrmt(dciTime.slot, cell->slotFrmtBitMap) == DL_SLOT) + if(schGetSlotSymbFrmt((dciTime.slot % cell->numSlotsInPeriodicity), cell->slotFrmtBitMap) == DL_SLOT) #endif { if(ueCb->k2TblPrsnt) @@ -2106,7 +2163,7 @@ bool schProcessSrOrBsrReq(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId /* Calculating time frame to send PUSCH for SR */ ADD_DELTA_TO_TIME(dciTime, puschTime, k2Val, cell->numSlots); #ifdef NR_TDD - if(schGetSlotSymbFrmt(puschTime.slot, cell->slotFrmtBitMap) == DL_SLOT) + if(schGetSlotSymbFrmt((puschTime.slot % cell->numSlotsInPeriodicity), cell->slotFrmtBitMap) == DL_SLOT) continue; #endif if((cell->schUlSlotInfo[puschTime.slot]->schPuschInfo[ueId - 1] != NULLP) @@ -2223,6 +2280,10 @@ uint8_t schFillPagePdschCfg(SchCellCb *cell, PageDlSch *pageDlSch, SlotTimingInf startSymbol = dmrsStartSymbol; numSymbol = pageDlSch->dmrs.nrOfDmrsSymbols + pageDlSch->timeAlloc.numSymb; } + if((startSymbol + numSymbol) > MAX_SYMB_PER_SLOT) + { + numSymbol = (MAX_SYMB_PER_SLOT - startSymbol); + } /* Allocate the number of PRBs required for DL PDSCH */ if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol,\ @@ -2263,7 +2324,7 @@ uint8_t schMsg3RetxSchedulingForUe(SchRaCb *raCb) ADD_DELTA_TO_TIME(currTime, dciTime, gConfigInfo.gPhyDeltaDl + SCHED_DELTA, cell->numSlots); #ifdef NR_TDD /* Consider this slot for sending DCI, only if it is a DL slot */ - if(schGetSlotSymbFrmt(dciSlot, raCb->cell->slotFrmtBitMap) == DL_SLOT) + if(schGetSlotSymbFrmt((dciSlot % cell->numSlotsInPeriodicity), raCb->cell->slotFrmtBitMap) == DL_SLOT) #endif { /* If PDCCH is already scheduled on this slot, cannot schedule PDSCH for another UE here. */ diff --git a/src/5gnrsch/sch_rach.c b/src/5gnrsch/sch_rach.c index cce509b70..2af7fc556 100644 --- a/src/5gnrsch/sch_rach.c +++ b/src/5gnrsch/sch_rach.c @@ -615,7 +615,7 @@ bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin dciSlot = dciTime.slot; #ifdef NR_TDD /* Consider this slot for sending DCI, only if it is a DL slot */ - if(schGetSlotSymbFrmt(dciSlot, cell->slotFrmtBitMap) == DL_SLOT) + if(schGetSlotSymbFrmt((dciSlot % cell->numSlotsInPeriodicity), cell->slotFrmtBitMap) == DL_SLOT) #endif { /* If PDCCH is already scheduled on this slot, cannot schedule PDSCH for another UE here. */ @@ -659,7 +659,7 @@ bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin ADD_DELTA_TO_TIME(rarTime, pucchTime, k1, cell->numSlots); #ifdef NR_TDD - if(schGetSlotSymbFrmt(pucchTime.slot, cell->slotFrmtBitMap) == DL_SLOT) + if(schGetSlotSymbFrmt((pucchTime.slot % cell->numSlotsInPeriodicity), cell->slotFrmtBitMap) == DL_SLOT) continue; #endif /*In this pucchTime, this particular UE/CRNTI is already scheduled thus checking @@ -1098,10 +1098,10 @@ uint8_t schFillRar(SchCellCb *cell, SlotTimingInfo rarTime, uint16_t ueId, RarAl { startSymbol = dmrsStartSymbol; numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.numSymb; - if(numSymbol >= MAX_SYMB_PER_SLOT) - { - numSymbol = (MAX_SYMB_PER_SLOT - 1); - } + } + if((startSymbol + numSymbol) > MAX_SYMB_PER_SLOT) + { + numSymbol = (MAX_SYMB_PER_SLOT - startSymbol); } /* Allocate the number of PRBs required for RAR PDSCH */ @@ -1120,6 +1120,8 @@ uint8_t schFillRar(SchCellCb *cell, SlotTimingInfo rarTime, uint16_t ueId, RarAl pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0; pdsch->txPdschPower.powerControlOffset = 0; pdsch->txPdschPower.powerControlOffsetSS = 0; + pdsch->maintParamV3.ldpcBaseGraph = 2; + pdsch->maintParamV3.tbSizeLbrmBytes = 237776; return ROK; } diff --git a/src/5gnrsch/sch_slot_ind.c b/src/5gnrsch/sch_slot_ind.c index 0efd930a5..b37f3fab3 100644 --- a/src/5gnrsch/sch_slot_ind.c +++ b/src/5gnrsch/sch_slot_ind.c @@ -92,7 +92,7 @@ uint8_t sendDlAllocToMac(DlSchedInfo *dlSchedInfo, Inst inst) * ****************************************************************/ bool schFillBoGrantDlSchedInfo(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId, bool isRetx, SchDlHqProcCb **hqP) { - uint8_t pdschNumSymbols = 0, pdschStartSymbol = 0; + uint8_t pdschNumSymbols = 0, pdschStartSymbol = 0, k0Index = 0; uint8_t lcIdx = 0; uint16_t startPrb = 0; uint16_t crnti = 0; @@ -116,7 +116,7 @@ bool schFillBoGrantDlSchedInfo(SchCellCb *cell, SlotTimingInfo currTime, uint8_t memset(&pdcchAllocInfo,0,sizeof(SchPdcchAllocInfo)); if(findValidK0K1Value(cell, currTime, ueId, ueCb->k0K1TblPrsnt,\ &pdschStartSymbol, &pdschNumSymbols, &pdcchTime, &pdschTime, \ - &pucchTime, isRetx, *hqP, &pdcchAllocInfo) != true ) + &pucchTime, isRetx, *hqP, &pdcchAllocInfo, &k0Index) != true ) { /* If a valid combination of slots to scheduled PDCCH, PDSCH and PUCCH is * not found, do not perform resource allocation. Return from here. */ @@ -414,9 +414,9 @@ PduTxOccsaion schCheckSib1Occ(SchCellCb *cell, SlotTimingInfo slotTime) bool findValidK0K1Value(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId, bool dedMsg, uint8_t *pdschStartSymbol, uint8_t *pdschSymblLen, SlotTimingInfo *pdcchTime, SlotTimingInfo *pdschTime, SlotTimingInfo *pucchTime, bool isRetx, SchDlHqProcCb *hqP, - SchPdcchAllocInfo *pdcchAllocInfo) + SchPdcchAllocInfo *pdcchAllocInfo, uint8_t *k0Index) { - uint8_t numK0 = 0, k0TblIdx = 0, k0Val = 0, k0Index =0 ; + uint8_t numK0 = 0, k0TblIdx = 0, k0Val = 0; uint8_t k1TblIdx = 0, k1Index = 0, k1Val = 0, numK1 = 0; uint8_t ret = RFAILED; uint16_t crnti = 0; @@ -425,13 +425,14 @@ bool findValidK0K1Value(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId, ADD_DELTA_TO_TIME(currTime, (*pdcchTime), gConfigInfo.gPhyDeltaDl + SCHED_DELTA, cell->numSlots); #ifdef NR_TDD - if(schGetSlotSymbFrmt(pdcchTime->slot, cell->slotFrmtBitMap) != DL_SLOT) + if(schGetSlotSymbFrmt((pdcchTime->slot % cell->numSlotsInPeriodicity) , cell->slotFrmtBitMap) != DL_SLOT) { /* If it is not a DL slot, cannot schedule PDCCH. Return from here. */ return false; } #endif + *k0Index = 0; ueCb = &cell->ueCb[ueId-1]; GET_CRNTI(crnti, ueId); if(dedMsg == true) @@ -451,32 +452,32 @@ bool findValidK0K1Value(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId, numK0 = k0K1InfoTbl->k0k1TimingInfo[pdcchTime->slot].numK0; for(k0TblIdx = 0; k0TblIdx < numK0; k0TblIdx++) { - k0Index = k0K1InfoTbl->k0k1TimingInfo[pdcchTime->slot].k0Indexes[k0TblIdx].k0Index; + *k0Index = k0K1InfoTbl->k0k1TimingInfo[pdcchTime->slot].k0Indexes[k0TblIdx].k0Index; if(dedMsg != true) { - k0Val = cell->cellCfg.dlCfgCommon.schInitialDlBwp.pdschCommon.timeDomRsrcAllocList[k0Index].k0; - *pdschStartSymbol = cell->cellCfg.dlCfgCommon.schInitialDlBwp.pdschCommon.timeDomRsrcAllocList[k0Index].startSymbol; - *pdschSymblLen = cell->cellCfg.dlCfgCommon.schInitialDlBwp.pdschCommon.timeDomRsrcAllocList[k0Index].lengthSymbol; + k0Val = cell->cellCfg.dlCfgCommon.schInitialDlBwp.pdschCommon.timeDomRsrcAllocList[*k0Index].k0; + *pdschStartSymbol = cell->cellCfg.dlCfgCommon.schInitialDlBwp.pdschCommon.timeDomRsrcAllocList[*k0Index].startSymbol; + *pdschSymblLen = cell->cellCfg.dlCfgCommon.schInitialDlBwp.pdschCommon.timeDomRsrcAllocList[*k0Index].lengthSymbol; } else { - if(ueCb->ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdschCfg.timeDomRsrcAllociList[k0Index].k0 != NULLP) + if(ueCb->ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdschCfg.timeDomRsrcAllociList[*k0Index].k0 != NULLP) { - k0Val = *(ueCb->ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdschCfg.timeDomRsrcAllociList[k0Index].k0); - *pdschStartSymbol = ueCb->ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdschCfg.timeDomRsrcAllociList[k0Index].startSymbol; - *pdschSymblLen = ueCb->ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdschCfg.timeDomRsrcAllociList[k0Index].symbolLength; + k0Val = *(ueCb->ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdschCfg.timeDomRsrcAllociList[*k0Index].k0); + *pdschStartSymbol = ueCb->ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdschCfg.timeDomRsrcAllociList[*k0Index].startSymbol; + *pdschSymblLen = ueCb->ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdschCfg.timeDomRsrcAllociList[*k0Index].symbolLength; } else { - k0Val = cell->cellCfg.dlCfgCommon.schInitialDlBwp.pdschCommon.timeDomRsrcAllocList[k0Index].k0; - *pdschStartSymbol = cell->cellCfg.dlCfgCommon.schInitialDlBwp.pdschCommon.timeDomRsrcAllocList[k0Index].startSymbol; - *pdschSymblLen = cell->cellCfg.dlCfgCommon.schInitialDlBwp.pdschCommon.timeDomRsrcAllocList[k0Index].lengthSymbol; + k0Val = cell->cellCfg.dlCfgCommon.schInitialDlBwp.pdschCommon.timeDomRsrcAllocList[*k0Index].k0; + *pdschStartSymbol = cell->cellCfg.dlCfgCommon.schInitialDlBwp.pdschCommon.timeDomRsrcAllocList[*k0Index].startSymbol; + *pdschSymblLen = cell->cellCfg.dlCfgCommon.schInitialDlBwp.pdschCommon.timeDomRsrcAllocList[*k0Index].lengthSymbol; } } ADD_DELTA_TO_TIME((*pdcchTime), (*pdschTime), k0Val, cell->numSlots); #ifdef NR_TDD - if(schGetSlotSymbFrmt(pdschTime->slot, cell->slotFrmtBitMap) != DL_SLOT) + if(schGetSlotSymbFrmt((pdschTime->slot % cell->numSlotsInPeriodicity), cell->slotFrmtBitMap) != DL_SLOT) { continue; } @@ -503,7 +504,7 @@ bool findValidK0K1Value(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId, } ADD_DELTA_TO_TIME((*pdschTime),(*pucchTime), k1Val, cell->numSlots); #ifdef NR_TDD - if(schGetSlotSymbFrmt(pucchTime->slot, cell->slotFrmtBitMap) == DL_SLOT) + if(schGetSlotSymbFrmt((pucchTime->slot % cell->numSlotsInPeriodicity), cell->slotFrmtBitMap) == DL_SLOT) { continue; } diff --git a/src/cm/mac_sch_interface.h b/src/cm/mac_sch_interface.h index e65790047..afbf508d5 100644 --- a/src/cm/mac_sch_interface.h +++ b/src/cm/mac_sch_interface.h @@ -574,6 +574,12 @@ typedef struct txPowerPdschInfo uint8_t powerControlOffsetSS; } TxPowerPdschInfo; +typedef struct pdschMaintParamV3 +{ + uint8_t ldpcBaseGraph; + uint32_t tbSizeLbrmBytes; +}PdschMaintParamV3; + /* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-43 PDSCH Configuration */ typedef struct pdschCfg { @@ -591,6 +597,7 @@ typedef struct pdschCfg PdschTimeAlloc pdschTimeAlloc; BeamformingInfo beamPdschInfo; TxPowerPdschInfo txPdschPower; + PdschMaintParamV3 maintParamV3; } PdschCfg; /* SIB1 PDSCH structures end */