From: svaidhya Date: Mon, 24 Feb 2025 16:57:33 +0000 (+0000) Subject: [Epic-Id: ODUHIGH-557][Task-Id: ODUHIGH-633] Corrected SIB1 pdcch and pdsch parameter... X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=commitdiff_plain;h=refs%2Fchanges%2F06%2F14206%2F1;p=o-du%2Fl2.git [Epic-Id: ODUHIGH-557][Task-Id: ODUHIGH-633] Corrected SIB1 pdcch and pdsch parameters and UE_timerConstantsAndConstraints IE added Change-Id: Ie2518c96fa4f1904a8dadd7c8aa99ebc11e042e0 Signed-off-by: svaidhya --- diff --git a/build/config/tdd_odu_config.xml b/build/config/tdd_odu_config.xml index 409caf826..8e92e1e38 100644 --- a/build/config/tdd_odu_config.xml +++ b/build/config/tdd_odu_config.xml @@ -60,17 +60,17 @@ 20 0 - 1 - 24 - 28875 + 78 + 252 + 1099 0 1 - 100 + 273 2 - 0 + 12 0 1 0 @@ -97,14 +97,14 @@ 0 0 - 3 - 11 + 1 + 13 1 0 - 3 - 11 + 1 + 13 @@ -130,7 +130,7 @@ 0 1 - 100 + 273 2 @@ -193,9 +193,9 @@ 0 1 - 0 + 12 0 - 0 + 12 0 1 1 @@ -218,7 +218,7 @@ - 1 + 0 @@ -428,7 +428,7 @@ - 1 + 0 1 3000000 1 @@ -440,7 +440,7 @@ 44 - 0 + 12 0 @@ -519,9 +519,9 @@ 0 1 - 24 + 252 2 - 0 + 12 1 diff --git a/src/5gnrmac/lwr_mac_fsm.c b/src/5gnrmac/lwr_mac_fsm.c index 0b6e5937b..1632de6d8 100644 --- a/src/5gnrmac/lwr_mac_fsm.c +++ b/src/5gnrmac/lwr_mac_fsm.c @@ -2087,7 +2087,6 @@ void packDlTtiReq(fapi_dl_tti_req_t *dlTtiReq,uint8_t *out , uint32_t *len) for(dciIndex = 0; dciIndex < reverseBytes16(dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.numDlDci); dciIndex++) { - dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].scramblingId =0; CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].rnti, &mBuf, &totalLen); CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].scramblingId, &mBuf, &totalLen); CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].scramblingRnti, &mBuf, &totalLen); @@ -2108,13 +2107,15 @@ void packDlTtiReq(fapi_dl_tti_req_t *dlTtiReq,uint8_t *out , uint32_t *len) CMCHKPKLEN(oduPackPostUInt16, preCodingAndBeamforming->pmi_bfi[prgIdx].beamIdx[digBfIdx].beamidx, &mBuf, &totalLen); } } - CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].beta_pdcch_1_0, &mBuf, &totalLen); CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].powerControlOffsetSS, &mBuf, &totalLen); CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].payloadSizeBits, &mBuf, &totalLen); numBytes = reverseBytes16(dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].payloadSizeBits) / 8; + if(reverseBytes16(dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].payloadSizeBits) % 8) - numBytes += 1; + { + numBytes += 1; + } for(uint8_t payloadIdx = 0; payloadIdx < numBytes; payloadIdx++) { CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdcch_pdu.dlDci[dciIndex].payload[payloadIdx], &mBuf, &totalLen); @@ -2127,6 +2128,7 @@ void packDlTtiReq(fapi_dl_tti_req_t *dlTtiReq,uint8_t *out , uint32_t *len) case FAPI_PDSCH_PDU_TYPE: { + CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.pduBitMap, &mBuf, &totalLen); CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.rnti, &mBuf, &totalLen); CMCHKPKLEN(oduPackPostUInt16, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.pdu_index, &mBuf, &totalLen); @@ -2176,8 +2178,8 @@ void packDlTtiReq(fapi_dl_tti_req_t *dlTtiReq,uint8_t *out , uint32_t *len) CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.ptrsReOffset, &mBuf, &totalLen); CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.nEpreRatioOfPdschToPtrs, &mBuf, &totalLen); } - - fapi_precoding_bmform_t *preCodingAndBeamforming= &dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.preCodingAndBeamforming; + fapi_precoding_bmform_t *preCodingAndBeamforming= &dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.preCodingAndBeamforming; + CMCHKPKLEN(oduPackPostUInt16, reverseBytes16(preCodingAndBeamforming->numPrgs), &mBuf, &totalLen); CMCHKPKLEN(oduPackPostUInt16, reverseBytes16(preCodingAndBeamforming->prgSize), &mBuf, &totalLen); CMCHKPKLEN(oduPackPostUInt8, preCodingAndBeamforming->digBfInterfaces, &mBuf, &totalLen); @@ -2199,7 +2201,6 @@ void packDlTtiReq(fapi_dl_tti_req_t *dlTtiReq,uint8_t *out , uint32_t *len) CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.isInlineTbCrc, &mBuf, &totalLen); CMCHKPKLEN(oduPackPostUInt32, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.dlTbCrc, &mBuf, &totalLen); } - dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.maintParamV3.ldpcBaseGraph=1; CMCHKPKLEN(oduPackPostUInt8, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.maintParamV3.ldpcBaseGraph, &mBuf, &totalLen); CMCHKPKLEN(oduPackPostUInt32, dlTtiReq->pdus[pduIdx].pdu.pdsch_pdu.maintParamV3.tbSizeLbrmBytes, &mBuf, &totalLen); lenDifference=totalLen- lenIdx; @@ -2560,11 +2561,11 @@ void packTxDataReqBuffer(fapi_tx_data_req_t *txDataReq, uint8_t *mBuf ,uint32_t CMCHKPKLEN(oduPackPostUInt32, txDataReq->pdu_desc[pduIdx].tlvs[tlvIdx].length, &out, &totalLen); payloadSize = reverseBytes32(txDataReq->pdu_desc[pduIdx].tlvs[tlvIdx].length); + payloadSize = (payloadSize + 3 )/4; for (uint32_t payloadByte = 0; payloadByte < payloadSize; payloadByte++) { //TODO- CHeck - //CMCHKPKLEN(oduPackPostUInt32, txDataReq->pdu_desc[pduIdx].tlvs[tlvIdx].value.direct[payloadByte], &out, &totalLen); - CMCHKPKLEN(oduPackPostUInt8, txDataReq->pdu_desc[pduIdx].tlvs[tlvIdx].value.direct[payloadByte], &out, &totalLen); + CMCHKPKLEN(oduPackPostUInt32_S, txDataReq->pdu_desc[pduIdx].tlvs[tlvIdx].value.direct[payloadByte], &out, &totalLen); } } } @@ -3549,12 +3550,10 @@ void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo) dlDciPtr[0].rnti = reverseBytes16(sib1PdcchInfo->dci[0].rnti); dlDciPtr[0].scramblingId = reverseBytes16(sib1PdcchInfo->dci[0].scramblingId); dlDciPtr[0].scramblingRnti = reverseBytes16(sib1PdcchInfo->dci[0].scramblingRnti); - dlDciPtr[0].pc_and_bform.numPrgs = reverseBytes16(0); - dlDciPtr[0].pc_and_bform.prgSize = reverseBytes16(0); - dlDciPtr[0].pc_and_bform.digBfInterfaces = 1; + dlDciPtr[0].pc_and_bform.numPrgs = reverseBytes16(sib1PdcchInfo->dci[0].beamPdcchInfo.numPrgs); + dlDciPtr[0].pc_and_bform.prgSize = reverseBytes16(sib1PdcchInfo->dci[0].beamPdcchInfo.prgSize); dlDciPtr[0].pc_and_bform.pmi_bfi[0].pmIdx = reverseBytes16(sib1PdcchInfo->dci[0].beamPdcchInfo.prg[0].pmIdx); dlDciPtr[0].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = reverseBytes16(sib1PdcchInfo->dci[0].beamPdcchInfo.prg[0].beamIdx[0]); - dlDciPtr[0].powerControlOffsetSS = 1; #else dlDciPtr[0].rnti = sib1PdcchInfo->dci[0].rnti; dlDciPtr[0].scramblingId = sib1PdcchInfo->dci[0].scramblingId; @@ -3563,9 +3562,8 @@ void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo) dlDciPtr[0].pc_and_bform.prgSize = sib1PdcchInfo->dci[0].beamPdcchInfo.prgSize; dlDciPtr[0].pc_and_bform.pmi_bfi[0].pmIdx = sib1PdcchInfo->dci[0].beamPdcchInfo.prg[0].pmIdx; dlDciPtr[0].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->dci[0].beamPdcchInfo.prg[0].beamIdx[0]; - dlDciPtr[0].pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci[0].beamPdcchInfo.digBfInterfaces; - dlDciPtr[0].powerControlOffsetSS = sib1PdcchInfo->dci[0].txPdcchPower.powerControlOffsetSS; #endif + dlDciPtr[0].pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci[0].beamPdcchInfo.digBfInterfaces; dlDciPtr[0].cceIndex = sib1PdcchInfo->dci[0].cceIndex; dlDciPtr[0].aggregationLevel = sib1PdcchInfo->dci[0].aggregLevel; dlDciPtr[0].beta_pdcch_1_0 = sib1PdcchInfo->dci[0].txPdcchPower.beta_pdcch_1_0; @@ -3592,7 +3590,7 @@ void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo) } /* Fetching DCI field values */ - timeDomResAssign = sib1PdcchInfo->dci[0].pdschCfg.pdschTimeAlloc.rowIndex -1; + timeDomResAssign = sib1PdcchInfo->dci[0].pdschCfg.pdschTimeAlloc.rowIndex; VRB2PRBMap = sib1PdcchInfo->dci[0].pdschCfg.pdschFreqAlloc.vrbPrbMapping; modNCodScheme = sib1PdcchInfo->dci[0].pdschCfg.codeword[0].mcsIndex; redundancyVer = sib1PdcchInfo->dci[0].pdschCfg.codeword[0].rvIndex; @@ -3600,18 +3598,19 @@ void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo) reserved = 0; /* Reversing bits in each DCI field */ +#ifndef OAI_TESTING freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize); timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize); VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize); modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize); redundancyVer = reverseBits(redundancyVer, redundancyVerSize); sysInfoInd = reverseBits(sysInfoInd, sysInfoIndSize); +#endif /* Calulating total number of bytes in buffer */ dlDciPtr[0].payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\ + VRB2PRBMapSize + modNCodSchemeSize + redundancyVerSize\ + sysInfoIndSize + reservedSize; - numBytes = dlDciPtr[0].payloadSizeBits / 8; if(dlDciPtr[0].payloadSizeBits % 8) numBytes += 1; @@ -3629,7 +3628,7 @@ void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo) dlDciPtr[0].payload[bytePos] = 0; bytePos = numBytes - 1; - bitPos = 0; + bitPos = 1; /* Packing DCI format fields */ fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\ @@ -4289,6 +4288,8 @@ uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_ dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = reverseBytes16(bwp->freqAlloc.startPrb); dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = reverseBytes16(pdcchInfo->coresetCfg.shiftIndex); dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = reverseBytes16(pdcchInfo->numDlDci); + memcpy(dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource, pdcchInfo->coresetCfg.freqDomainResource, \ + sizeof(uint8_t)*6); #else dlTtiReqPdu->pduSize = (sizeof(fapi_dl_pdcch_pdu_t)); dlTtiReqPdu->pduType = (PDCCH_PDU_TYPE); @@ -4296,14 +4297,14 @@ uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_ dlTtiReqPdu->pdu.pdcch_pdu.bwpStart =(bwp->freqAlloc.startPrb); dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = (pdcchInfo->coresetCfg.shiftIndex); dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = (pdcchInfo->numDlDci); + convertFreqDomRsrcMapToIAPIFormat(pdcchInfo->coresetCfg.freqDomainResource,\ + dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource); #endif dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing; dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix; dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pdcchInfo->coresetCfg.startSymbolIndex; dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pdcchInfo->coresetCfg.durationSymbols; - convertFreqDomRsrcMapToIAPIFormat(pdcchInfo->coresetCfg.freqDomainResource,\ - dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource); dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pdcchInfo->coresetCfg.cceRegMappingType; dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pdcchInfo->coresetCfg.regBundleSize; dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pdcchInfo->coresetCfg.interleaverSize; @@ -4532,6 +4533,8 @@ void fillPdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = reverseBytes16(0); dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = reverseBytes16(pdschInfo->beamPdschInfo.prg[0].pmIdx); dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].beamIdx[0].beamidx = reverseBytes16(pdschInfo->beamPdschInfo.prg[0].beamIdx[0]); + dlTtiReqPdu->pdu.pdsch_pdu.maintParamV3.ldpcBaseGraph=2; + dlTtiReqPdu->pdu.pdsch_pdu.maintParamV3.tbSizeLbrmBytes=reverseBytes32(57376); #else dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces; dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs; @@ -4738,8 +4741,8 @@ uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, MacCel #ifdef INTEL_WLS_MEM void * wlsHdlr = NULLP; #endif - uint8_t tlvPaddingLen =get_tlv_padding(macCellCfg->cellCfg.sib1Cfg.sib1PduLen); - uint16_t totalLen= macCellCfg->cellCfg.sib1Cfg.sib1PduLen+tlvPaddingLen+4; + uint8_t tlvPaddingLen =get_tlv_padding(pdschCfg->codeword[0].tbSize); + uint16_t totalLen= pdschCfg->codeword[0].tbSize + 4; pduDesc[pduIndex].pdu_length = totalLen; #ifdef OAI_TESTING @@ -4748,9 +4751,8 @@ uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, MacCel pduDesc[pduIndex].pdu_index = reverseBytes16(pduIndex); pduDesc[pduIndex].num_tlvs = reverseBytes32(1); pduDesc[pduIndex].tlvs[0].tag = reverseBytes16(FAPI_TX_DATA_PAYLOAD); - pduDesc[pduIndex].tlvs[0].length = reverseBytes32(macCellCfg->cellCfg.sib1Cfg.sib1PduLen); - memcpy(pduDesc[pduIndex].tlvs[0].value.direct, macCellCfg->cellCfg.sib1Cfg.sib1Pdu, macCellCfg->cellCfg.sib1Cfg.sib1PduLen); - + pduDesc[pduIndex].tlvs[0].length = reverseBytes32(pdschCfg->codeword[0].tbSize); + memcpy(pduDesc[pduIndex].tlvs[0].value.direct, macCellCfg->cellCfg.sib1Cfg.sib1Pdu, pdschCfg->codeword[0].tbSize); #endif return ROK; diff --git a/src/5gnrmac/lwr_mac_util.c b/src/5gnrmac/lwr_mac_util.c index 08ab8ac93..98fcd151f 100644 --- a/src/5gnrmac/lwr_mac_util.c +++ b/src/5gnrmac/lwr_mac_util.c @@ -106,12 +106,14 @@ uint32_t reverseBits(uint32_t num, uint8_t numBits) void fillDlDciPayload(uint8_t *buf, uint8_t *bytePos, uint8_t *bitPos,\ uint32_t val, uint8_t valSize) { - uint8_t temp; uint8_t bytePart1; uint32_t bytePart2; uint8_t bytePart1Size; uint8_t bytePart2Size; + +#ifndef OAI_TESTING + uint8_t temp; if(*bitPos + valSize <= 8) { bytePart1 = (uint8_t)val; @@ -133,6 +135,29 @@ void fillDlDciPayload(uint8_t *buf, uint8_t *bytePos, uint8_t *bitPos,\ *bitPos = 0; fillDlDciPayload(buf, bytePos, bitPos, bytePart2, bytePart2Size); } +#else + if(*bitPos + valSize <= 8) + { + bytePart1 = (uint8_t)val; + bytePart1 = ((~((~0) << valSize)) & bytePart1)<< (8 - (*bitPos + valSize)); + buf[*bytePos] |= bytePart1; + *bitPos += valSize; + } + else if(*bitPos + valSize > 8) + { + bytePart1Size = 8 - *bitPos; + bytePart2Size = valSize - bytePart1Size; + + bytePart1 = val >> bytePart2Size; + + buf[*bytePos] |= bytePart1; + (*bytePos)--; + *bitPos = 0; + fillDlDciPayload(buf, bytePos, bitPos, val, bytePart2Size); + } + +#endif + } /* diff --git a/src/5gnrsch/sch.c b/src/5gnrsch/sch.c index 40a745c6b..1c1d31627 100644 --- a/src/5gnrsch/sch.c +++ b/src/5gnrsch/sch.c @@ -592,13 +592,17 @@ uint8_t fillSchSib1Cfg(uint8_t mu, uint8_t bandwidth, uint8_t numSlots,SchPdcchC uint8_t numSymbols = 0; uint8_t offset = 0; uint8_t oValue = 0; + uint8_t mcs = 0; //uint8_t numSearchSpacePerSlot = 0; uint8_t mValue = 0; uint8_t firstSymbol = 0; /* need to calculate using formula mentioned in 38.213 */ uint8_t slotIndex = 0; uint8_t freqDomainResource[FREQ_DOM_RSRC_SIZE] = {0}; uint16_t tbSize = 0; + uint16_t targetCodeRate = 0; + uint8_t qam = 0; uint8_t ssbIdx = 0; + uint8_t freqIdx = 0; PdcchCfg *pdcch; PdschCfg *pdsch; BwpCfg *bwp; @@ -629,6 +633,7 @@ uint8_t fillSchSib1Cfg(uint8_t mu, uint8_t bandwidth, uint8_t numSlots,SchPdcchC slotIndex = (int)((oValue*pow(2, mu)) + floor(ssbIdx*mValue))%numSlots; sib1SchCfg->n0 = slotIndex; +#ifndef OAI_TESTING /* fill BWP */ switch(bandwidth) { @@ -647,7 +652,11 @@ uint8_t fillSchSib1Cfg(uint8_t mu, uint8_t bandwidth, uint8_t numSlots,SchPdcchC } bwp->freqAlloc.startPrb = 0; - bwp->subcarrierSpacing = 0; /* 15Khz */ +#else + bwp->freqAlloc.numPrb = numRbs; + bwp->freqAlloc.startPrb = ((offsetPointA >> mu) - offset); +#endif + bwp->subcarrierSpacing = mu; /* 15Khz */ bwp->cyclicPrefix = 0; /* normal */ /* fill the PDCCH PDU */ @@ -656,7 +665,15 @@ uint8_t fillSchSib1Cfg(uint8_t mu, uint8_t bandwidth, uint8_t numSlots,SchPdcchC pdcch->coresetCfg.durationSymbols = numSymbols; /* Fill Bitmap for PRBs in coreset */ +#ifndef OAI_TESTING fillCoresetFeqDomAllocMap(((offsetPointA-offset)/6), (numRbs/6), freqDomainResource); +#else + freqDomainResource[0] = (numRbs < 48) ? 0xf0 : 0xff; + for(freqIdx = 1; freqIdx < FREQ_DOM_RSRC_SIZE; freqIdx++) + { + freqDomainResource[freqIdx] = (numRbs < (48 * (freqIdx + 1))) ? 0x00 : 0xff; + } +#endif memcpy(pdcch->coresetCfg.freqDomainResource, freqDomainResource, FREQ_DOM_RSRC_SIZE); pdcch->coresetCfg.cceRegMappingType = 1; /* coreset0 is always interleaved */ @@ -671,13 +688,13 @@ uint8_t fillSchSib1Cfg(uint8_t mu, uint8_t bandwidth, uint8_t numSlots,SchPdcchC pdcch->dci[0].scramblingRnti = 0; pdcch->dci[0].cceIndex = 0; pdcch->dci[0].aggregLevel = 4; - pdcch->dci[0].beamPdcchInfo.numPrgs = 1; - pdcch->dci[0].beamPdcchInfo.prgSize = 1; - pdcch->dci[0].beamPdcchInfo.digBfInterfaces = 0; + pdcch->dci[0].beamPdcchInfo.numPrgs = 0; + pdcch->dci[0].beamPdcchInfo.prgSize = 0; + pdcch->dci[0].beamPdcchInfo.digBfInterfaces = 1; pdcch->dci[0].beamPdcchInfo.prg[0].pmIdx = 0; pdcch->dci[0].beamPdcchInfo.prg[0].beamIdx[0] = 0; pdcch->dci[0].txPdcchPower.beta_pdcch_1_0= 0; - pdcch->dci[0].txPdcchPower.powerControlOffsetSS = 0; + pdcch->dci[0].txPdcchPower.powerControlOffsetSS = 1; /* Storing pdschCfg pointer here. Required to access pdsch config while fillig up pdcch pdu */ pdsch = &pdcch->dci[0].pdschCfg; @@ -688,42 +705,62 @@ uint8_t fillSchSib1Cfg(uint8_t mu, uint8_t bandwidth, uint8_t numSlots,SchPdcchC pdsch->rnti = 0xFFFF; /* SI-RNTI */ pdsch->pduIndex = 0; pdsch->numCodewords = 1; + pdsch->pdschFreqAlloc.startPrb = 0; for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++) { - pdsch->codeword[cwCount].targetCodeRate = 308; - pdsch->codeword[cwCount].qamModOrder = 2; - pdsch->codeword[cwCount].mcsIndex = DEFAULT_MCS; + mcs = DEFAULT_MCS; + pdsch->pdschFreqAlloc.numPrb = 0; + qam = 0; + targetCodeRate = 0; + do + { + if(pdsch->pdschFreqAlloc.numPrb < bwp->freqAlloc.numPrb) + { + pdsch->pdschFreqAlloc.numPrb++; + } + else + { + if(mcs < 10) + { + mcs++; + } + else + break; + } + tbSize = (schCalcTbSizeFromNPrb(pdsch->pdschFreqAlloc.numPrb, mcs, 10, &targetCodeRate, &qam) >> 3); + }while(sib1PduLen > tbSize); + + pdsch->codeword[cwCount].targetCodeRate = targetCodeRate; + pdsch->codeword[cwCount].qamModOrder = qam; + pdsch->codeword[cwCount].mcsIndex = mcs; pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */ pdsch->codeword[cwCount].rvIndex = 0; - tbSize = schCalcTbSize(sib1PduLen + TX_PAYLOAD_HDR_LEN); pdsch->codeword[cwCount].tbSize = tbSize; } pdsch->dataScramblingId = pci; pdsch->numLayers = 1; pdsch->transmissionScheme = 0; - pdsch->refPoint = 0; + pdsch->refPoint = 1; pdsch->dmrs.dlDmrsSymbPos = DL_DMRS_SYMBOL_POS; pdsch->dmrs.dmrsConfigType = 0; /* type-1 */ pdsch->dmrs.dlDmrsScramblingId = pci; pdsch->dmrs.scid = 0; - pdsch->dmrs.numDmrsCdmGrpsNoData = 1; + pdsch->dmrs.numDmrsCdmGrpsNoData = 2; pdsch->dmrs.dmrsPorts = 0x0001; pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Type-A */ pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS; pdsch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS; pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */ - /* the RB numbering starts from coreset0, and PDSCH is always above SSB */ - pdsch->pdschFreqAlloc.startPrb = offsetPointA + SCH_SSB_NUM_PRB; - pdsch->pdschFreqAlloc.numPrb = schCalcNumPrb(tbSize, DEFAULT_MCS, NUM_PDSCH_SYMBOL); + pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */ pdsch->pdschTimeAlloc.rowIndex = 1; /* This is Intel's requirement. PDSCH should start after PDSCH DRMS symbol */ - pdsch->pdschTimeAlloc.startSymb = 3; /* spec-38.214, Table 5.1.2.1-1 */ + pdsch->pdschTimeAlloc.startSymb = 2; /* spec-38.214, Table 5.1.2.1-1 */ pdsch->pdschTimeAlloc.numSymb = NUM_PDSCH_SYMBOL; - pdsch->beamPdschInfo.numPrgs = 1; - pdsch->beamPdschInfo.prgSize = 1; - pdsch->beamPdschInfo.digBfInterfaces = 0; + pdsch->beamPdschInfo.numPrgs = 0; + pdsch->beamPdschInfo.prgSize = 0; + pdsch->beamPdschInfo.digBfInterfaces = 1; pdsch->beamPdschInfo.prg[0].pmIdx = 0; pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0; pdsch->txPdschPower.powerControlOffset = 0; @@ -1308,67 +1345,94 @@ uint8_t allocatePrbDl(SchCellCb *cell, SlotTimingInfo slotTime, \ if(ssbOccasion && sib1Occasion) { - broadcastPrbStart = cell->cellCfg.dlCfgCommon.schFreqInfoDlSib.offsetToPointA; - broadcastPrbEnd = broadcastPrbStart + SCH_SSB_NUM_PRB + cell->sib1SchCfg.sib1PdcchCfg.dci[0].pdschCfg.pdschFreqAlloc.numPrb -1; - } - else if(ssbOccasion) - { - broadcastPrbStart = cell->cellCfg.dlCfgCommon.schFreqInfoDlSib.offsetToPointA; - broadcastPrbEnd = broadcastPrbStart + SCH_SSB_NUM_PRB -1; - } - else if(sib1Occasion) - { - broadcastPrbStart = cell->sib1SchCfg.sib1PdcchCfg.dci[0].pdschCfg.pdschFreqAlloc.startPrb; - broadcastPrbEnd = broadcastPrbStart + cell->sib1SchCfg.sib1PdcchCfg.dci[0].pdschCfg.pdschFreqAlloc.numPrb -1; + /* Iterate through all free PRB blocks */ + freePrbNode = prbAlloc->freePrbBlockList.first; + while(freePrbNode) + { + /* TODO: Check again;because a very rigid condition has been applied that + * freeBlock will be only between SSB and SIB1 when both ocassions are present and + * SIB1 is present on the lower end of PRB range and SSB on the uppermost end of the PRB range. + * This has to be made flexible.*/ + freePrbBlock = (FreePrbBlock *)freePrbNode->node; + + broadcastPrbEnd = cell->sib1SchCfg.sib1PdcchCfg.dci[0].pdschCfg.pdschFreqAlloc.startPrb + \ + cell->sib1SchCfg.sib1PdcchCfg.dci[0].pdschCfg.pdschFreqAlloc.numPrb - 1; + broadcastPrbStart = cell->cellCfg.dlCfgCommon.schFreqInfoDlSib.offsetToPointA + ceil (cell->cellCfg.ssbSubcOffset/12); + + if((freePrbBlock->startPrb <= broadcastPrbStart) && (freePrbBlock->endPrb >= broadcastPrbStart) &&\ + (freePrbBlock->startPrb <= broadcastPrbEnd) && (freePrbBlock->endPrb >= broadcastPrbEnd)) + { + if (freePrbBlock->numFreePrb >= numPrb) + { + *startPrb = freePrbBlock->endPrb - numPrb +1; + } + break; + } + freePrbNode = freePrbNode->next; + continue; + } } - - /* Iterate through all free PRB blocks */ - freePrbNode = prbAlloc->freePrbBlockList.first; - while(freePrbNode) + else { - freePrbBlock = (FreePrbBlock *)freePrbNode->node; + if(ssbOccasion) + { + broadcastPrbStart = cell->cellCfg.dlCfgCommon.schFreqInfoDlSib.offsetToPointA; + broadcastPrbEnd = broadcastPrbStart + SCH_SSB_NUM_PRB -1; + } + else if(sib1Occasion) + { + broadcastPrbStart = cell->sib1SchCfg.sib1PdcchCfg.dci[0].pdschCfg.pdschFreqAlloc.startPrb; + broadcastPrbEnd = broadcastPrbStart + cell->sib1SchCfg.sib1PdcchCfg.dci[0].pdschCfg.pdschFreqAlloc.numPrb -1; + } - /* If broadcast message is scheduled in this slot, then check if its PRBs belong to the current free block. - * Since SSB/SIB1 PRB location is fixed, these PRBs cannot be allocated to other message in same slot */ - if((ssbOccasion || sib1Occasion) && - ((broadcastPrbStart >= freePrbBlock->startPrb) && (broadcastPrbStart <= freePrbBlock->endPrb)) && \ - ((broadcastPrbEnd >= freePrbBlock->startPrb) && (broadcastPrbEnd <= freePrbBlock->endPrb))) + /* Iterate through all free PRB blocks */ + freePrbNode = prbAlloc->freePrbBlockList.first; + while(freePrbNode) { - /* Implmentation is done such that highest-numbered free-RB is allocated first */ - if((freePrbBlock->endPrb > broadcastPrbEnd) && ((freePrbBlock->endPrb - broadcastPrbEnd) >= numPrb)) - { - /* If sufficient free PRBs are available above bradcast message then, - * endPrb = freePrbBlock->endPrb - * startPrb = endPrb - numPrb +1; - */ - *startPrb = freePrbBlock->endPrb - numPrb +1; - break; - } - else if((broadcastPrbStart > freePrbBlock->startPrb) && ((broadcastPrbStart - freePrbBlock->startPrb) >= numPrb)) + freePrbBlock = (FreePrbBlock *)freePrbNode->node; + + /* If broadcast message is scheduled in this slot, then check if its PRBs belong to the current free block. + * Since SSB/SIB1 PRB location is fixed, these PRBs cannot be allocated to other message in same slot */ + if((ssbOccasion || sib1Occasion) && + ((broadcastPrbStart >= freePrbBlock->startPrb) && (broadcastPrbStart <= freePrbBlock->endPrb)) && \ + ((broadcastPrbEnd >= freePrbBlock->startPrb) && (broadcastPrbEnd <= freePrbBlock->endPrb))) { - /* If free PRBs are available below broadcast message then, - * endPrb = broadcastPrbStart - 1 - * startPrb = endPrb - numPrb +1 - */ - *startPrb = broadcastPrbStart - numPrb; - break; + /* Implmentation is done such that highest-numbered free-RB is allocated first */ + if((freePrbBlock->endPrb > broadcastPrbEnd) && ((freePrbBlock->endPrb - broadcastPrbEnd) >= numPrb)) + { + /* If sufficient free PRBs are available above bradcast message then, + * endPrb = freePrbBlock->endPrb + * startPrb = endPrb - numPrb +1; + */ + *startPrb = freePrbBlock->endPrb - numPrb +1; + break; + } + else if((broadcastPrbStart > freePrbBlock->startPrb) && ((broadcastPrbStart - freePrbBlock->startPrb) >= numPrb)) + { + /* If free PRBs are available below broadcast message then, + * endPrb = broadcastPrbStart - 1 + * startPrb = endPrb - numPrb +1 + */ + *startPrb = broadcastPrbStart - numPrb; + break; + } + else + { + freePrbNode = freePrbNode->next; + continue; + } } else { - freePrbNode = freePrbNode->next; - continue; - } - } - else - { - /* Check if requested number of blocks can be allocated from the current block */ - if (freePrbBlock->numFreePrb < numPrb) - { - freePrbNode = freePrbNode->next; - continue; + /* Check if requested number of blocks can be allocated from the current block */ + if (freePrbBlock->numFreePrb < numPrb) + { + freePrbNode = freePrbNode->next; + continue; + } + *startPrb = freePrbBlock->endPrb - numPrb +1; + break; } - *startPrb = freePrbBlock->endPrb - numPrb +1; - break; } } @@ -1397,7 +1461,7 @@ uint8_t allocatePrbDl(SchCellCb *cell, SlotTimingInfo slotTime, \ return RFAILED; } } - + /* Update statistics of PRB usage if stats calculation is enabled */ if(schCb[cell->instIdx].statistics.activeKpiList.dlTotPrbUseList.count) prbAlloc->numPrbAlloc += numPrb; diff --git a/src/5gnrsch/sch.h b/src/5gnrsch/sch.h index 328b80ff6..20ff586e7 100644 --- a/src/5gnrsch/sch.h +++ b/src/5gnrsch/sch.h @@ -28,7 +28,13 @@ #define SCH_NUM_SC_PRB 12 /* number of SCs in a PRB */ #define SCH_MAX_SSB_BEAM 8 /* since we are supporting only SCS=15KHz and 30KHz */ #define SCH_SSB_NUM_SYMB 4 -#define SCH_SSB_NUM_PRB 21 /* One extra PRB as buffer */ + +#ifdef OAI_TESTING + #define SCH_SSB_NUM_PRB 20 /* One extra PRB as buffer */ +#else + #define SCH_SSB_NUM_PRB 21 /* One extra PRB as buffer */ +#endif + #define SCHED_DELTA 1 #define BO_DELTA 1 #define RAR_DELAY 2 @@ -36,7 +42,12 @@ #define PDSCH_START_RB 10 /* Considering pdsch region from 3 to 13, DMRS exclued. * Overlapping of PDSCH DRMS and PDSCH not supported by Intel L1 */ -#define NUM_PDSCH_SYMBOL 11 +#ifdef OAI_TESTING + #define NUM_PDSCH_SYMBOL 10 +#else + #define NUM_PDSCH_SYMBOL 11 +#endif + #define PUSCH_START_RB 15 #define PUCCH_NUM_PRB_FORMAT_0_1_4 1 /* number of PRBs in freq domain, spec 38.213 - 9.2.1 */ #define SI_RNTI 0xFFFF diff --git a/src/5gnrsch/sch_common.c b/src/5gnrsch/sch_common.c index c9967d888..6893e3823 100644 --- a/src/5gnrsch/sch_common.c +++ b/src/5gnrsch/sch_common.c @@ -78,7 +78,7 @@ uint8_t schBroadcastSsbAlloc(SchCellCb *cell, SlotTimingInfo slotTime, DlBrdcstA } schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot]; - ssbStartPrb = cell->cellCfg.ssbSubcOffset; //+Kssb + ssbStartPrb = cell->cellCfg.dlCfgCommon.schFreqInfoDlSib.offsetToPointA + ceil(cell->cellCfg.ssbSubcOffset/12); //+Kssb ssbStartSymb = cell->ssbStartSymbArr[dlBrdcstAlloc->ssbIdxSupported-1]; /*since we are supporting only 1 ssb beam */ /* Assign interface structure */ diff --git a/src/5gnrsch/sch_rach.c b/src/5gnrsch/sch_rach.c index 4c5d8f526..5b8b42cc1 100644 --- a/src/5gnrsch/sch_rach.c +++ b/src/5gnrsch/sch_rach.c @@ -456,7 +456,7 @@ SchPuschInfo* schAllocMsg3Pusch(Inst schInst, uint16_t crnti, uint8_t k2Index, S } cell->schUlSlotInfo[msg3SlotTime.slot]->puschPres = true; tbSize = 0; /* since nPrb has been incremented, recalculating tbSize */ - tbSize = schCalcTbSizeFromNPrb(numRb, mcs, NUM_PDSCH_SYMBOL); + tbSize = schCalcTbSizeFromNPrb(numRb, mcs, NUM_PDSCH_SYMBOL, NULLP, NULLP); tbSize = tbSize / 8 ; /*bits to byte conversion*/ schUlSlotInfo->schPuschInfo[ueId - 1]->harqProcId = msg3HqProc->procId; diff --git a/src/5gnrsch/sch_utils.c b/src/5gnrsch/sch_utils.c index 3e8b23afd..a35ed7e0a 100644 --- a/src/5gnrsch/sch_utils.c +++ b/src/5gnrsch/sch_utils.c @@ -1102,7 +1102,7 @@ uint16_t schCalcNumPrb(uint16_t tbSize, uint16_t mcs, uint8_t numSymbols) * @param[in] number of symbols * @return tbSize **/ -uint16_t schCalcTbSizeFromNPrb(uint16_t numPrb, uint16_t mcs, uint8_t numSymbols) +uint16_t schCalcTbSizeFromNPrb(uint16_t numPrb, uint16_t mcs, uint8_t numSymbols, uint16_t *targeCodeRate, uint8_t *qam) { uint8_t qm = mcsTable[mcs][1]; uint16_t rValue = mcsTable[mcs][2]; @@ -1116,8 +1116,7 @@ uint16_t schCalcTbSizeFromNPrb(uint16_t numPrb, uint16_t mcs, uint8_t numSymbols uint32_t c = 0; const uint8_t numLayer = 1; const uint16_t numRbSc = 12; - const uint16_t numDmrsRes = 12; - const uint16_t sf = 1; + const uint16_t numDmrsRes = 36; // uint16_t numPrbOvrHead = 0; /* formula used for calculation of rbSize, 38.214 section 5.1.3.2 * @@ -1127,7 +1126,7 @@ uint16_t schCalcTbSizeFromNPrb(uint16_t numPrb, uint16_t mcs, uint8_t numSymbols nreDash = MIN(156, ceil( (numRbSc * numSymbols) - numDmrsRes - 0)); nre = nreDash * numPrb; - nInfo = ceil(nre * qm * numLayer * rValue/(1024.0 * sf)); + nInfo = ceil(nre * qm * numLayer * (rValue *10/5)>>11); if(nInfo <= 3824) { @@ -1162,6 +1161,11 @@ uint16_t schCalcTbSizeFromNPrb(uint16_t numPrb, uint16_t mcs, uint8_t numSymbols } } } + if(targeCodeRate != NULLP && qam != NULLP) + { + *targeCodeRate = rValue * 10; + *qam = qm; + } return tbSize; } @@ -1588,7 +1592,7 @@ uint32_t calculateEstimateTBSize(uint32_t reqBO, uint16_t mcsIdx, uint8_t numSym /*Loop Exit: Either estPRB reaches the maxRB or TBS is found greater than equal to reqBO*/ do { - tbs = schCalcTbSizeFromNPrb(*estPrb, mcsIdx, numSymbols); + tbs = schCalcTbSizeFromNPrb(*estPrb, mcsIdx, numSymbols, NULLP, NULLP); /*TBS size calculated in above function is in Bits. * So to convert it into Bytes , we right shift by 3. diff --git a/src/5gnrsch/sch_utils.h b/src/5gnrsch/sch_utils.h index c47a5adba..5d2ac3a1d 100644 --- a/src/5gnrsch/sch_utils.h +++ b/src/5gnrsch/sch_utils.h @@ -133,7 +133,7 @@ uint8_t calculateSlotPatternLength(uint8_t scs, uint8_t periodicity); /* Functions declarations : Resource allocation handler */ uint16_t schCalcTbSize(uint32_t payLoadSize); uint16_t schCalcNumPrb(uint16_t tbSize, uint16_t mcs, uint8_t numSymbols); -uint16_t schCalcTbSizeFromNPrb(uint16_t numPrb, uint16_t mcs, uint8_t numSymbols); +uint16_t schCalcTbSizeFromNPrb(uint16_t numPrb, uint16_t mcs, uint8_t numSymbols, uint16_t *targeCodeRate, uint8_t* qam); bool fillPrbBitmap(uint64_t *prbBitmap, uint16_t startPrb, uint16_t numPrb); CmLList* isPrbAvailable(CmLListCp *freePrbBlockList, uint16_t startPrb, uint16_t numPrb); void removeAllocatedPrbFromFreePrbList(CmLListCp *freePrbBlockList, CmLList *node, \ diff --git a/src/cm/common_def.h b/src/cm/common_def.h index 1d6ba6b95..0743e3395 100644 --- a/src/cm/common_def.h +++ b/src/cm/common_def.h @@ -95,7 +95,11 @@ #define PUCCH_FORMAT_3 3 #define PUCCH_FORMAT_4 4 +#ifdef OAI_TESTING +#define DEFAULT_MCS 4 +#else #define DEFAULT_MCS 4 +#endif #define BANDWIDTH_20MHZ 20 #define BANDWIDTH_100MHZ 100 diff --git a/src/cm/mac_sch_interface.h b/src/cm/mac_sch_interface.h index 46ed5b101..b42aad5d6 100644 --- a/src/cm/mac_sch_interface.h +++ b/src/cm/mac_sch_interface.h @@ -122,7 +122,12 @@ #define DEFAULT_K2_VALUE_FOR_SCS120 3 #define MAX_PLMN 1 -#define DL_DMRS_SYMBOL_POS 4 /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */ + +#ifdef OAI_TESTING + #define DL_DMRS_SYMBOL_POS 580 +#else + #define DL_DMRS_SYMBOL_POS 4 /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */ +#endif #define MAX_PHR_REPORT 1 /*TODO: Range of PHR reports in multiple PHR.*/ #define MAX_FAILURE_DET_RESOURCES 10 /*Spec 38.331 'maxNrofFailureDetectionResources'*/ diff --git a/src/du_app/du_sys_info_hdl.c b/src/du_app/du_sys_info_hdl.c index 08a86f03b..0a4eb3b09 100644 --- a/src/du_app/du_sys_info_hdl.c +++ b/src/du_app/du_sys_info_hdl.c @@ -61,6 +61,7 @@ #include "BCCH-DL-SCH-Message.h" #include "du_f1ap_conversions.h" #include "du_sys_info_hdl.h" +#include "UE-TimersAndConstants.h" void FreeSib1Msg(SIB1_t *sib1Msg); uint8_t FreqInfoUlret = RFAILED; @@ -2373,6 +2374,19 @@ uint8_t BuildServCellCfgCommonSib(ServingCellConfigCommonSIB_t *srvCellCfg) return ROK; } +uint8_t BuildUeTimerAndConstants(UE_TimersAndConstants_t *ue_TimersAndConstants) +{ + ue_TimersAndConstants->t300 = UE_TimersAndConstants__t300_ms400; + ue_TimersAndConstants->t301 = UE_TimersAndConstants__t301_ms400; + ue_TimersAndConstants->t310 = UE_TimersAndConstants__t310_ms2000; + ue_TimersAndConstants->n310 = UE_TimersAndConstants__n310_n10; + ue_TimersAndConstants->t311 = UE_TimersAndConstants__t311_ms3000; + ue_TimersAndConstants->n311 = UE_TimersAndConstants__n311_n1; + ue_TimersAndConstants->t319 = UE_TimersAndConstants__t319_ms400; + + return ROK; +} + /******************************************************************* * * @brief Builds SIB message in Served Cell Info @@ -2501,6 +2515,8 @@ uint8_t BuildSib1Msg() { break; } + DU_ALLOC(sib1Msg->ue_TimersAndConstants, sizeof(UE_TimersAndConstants_t)); + ret1 = BuildUeTimerAndConstants(sib1Msg->ue_TimersAndConstants); xer_fprint(stdout, &asn_DEF_BCCH_DL_SCH_Message, &bcchMsg); @@ -3156,6 +3172,8 @@ void FreeSib1Msg(SIB1_t *sib1Msg) DU_FREE(sib1Msg->servingCellConfigCommon, sizeof(ServingCellConfigCommonSIB_t)); + DU_FREE(sib1Msg->ue_TimersAndConstants, \ + sizeof(UE_TimersAndConstants_t)); } //TODO PBORLA if(sib1Msg->si_SchedulingInfo->schedulingInfoList.list.array) diff --git a/src/mt/ss_pack.c b/src/mt/ss_pack.c index a27ed04d2..f2ecf18c7 100644 --- a/src/mt/ss_pack.c +++ b/src/mt/ss_pack.c @@ -948,7 +948,38 @@ uint8_t oduPackPostUInt32( uint32_t in, uint8_t **out, uint16_t *total_length) } /* end of oduPackPostUInt32 */ +/* +* +* Fun: oduPackPostUInt32 +* +* Desc: This function packs an unsigned 32 bit value into a message. +* This functionality is reversal of the above "oduPackPostUInt32". +* Here pOut[0th] ->MSB and so on +* +* Ret: ROK - ok +* RFAILED - failed, general (optional) +* ROUTRES - failed, out of resources (optional) +* +* Notes: None +* +* File: ss_pack.c +* +*/ + +uint8_t oduPackPostUInt32_S( uint32_t in, uint8_t **out, uint16_t *total_length) +{ + uint8_t *pOut = *out; + pOut[0] = (in & 0xFF000000) >> 24; + pOut[1] = (in & 0xFF0000) >> 16; + pOut[2] = (in & 0xFF00) >> 8; + pOut[3] = (in & 0xFF); + (*out) += 4; + + (*total_length) += 4; // Increment the total length by 4 + return ROK; + +} /* end of oduPackPostUInt32 */ #endif /**********************************************************************