From: Harshita Lal Date: Mon, 13 Jun 2022 09:47:49 +0000 (+0000) Subject: Merge "[Issue Id-ODUHIGH-457] Fixes related to slice configuration in Ue Context... X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=commitdiff_plain;h=e0ab592152182a8a00aa8e7968209d2c4152e1e9;hp=-c;p=o-du%2Fl2.git Merge "[Issue Id-ODUHIGH-457] Fixes related to slice configuration in Ue Context Setup" --- e0ab592152182a8a00aa8e7968209d2c4152e1e9 diff --combined src/phy_stub/phy_stub_msg_hdl.c index 830333350,2c14f2ba8..5e462f4bc --- a/src/phy_stub/phy_stub_msg_hdl.c +++ b/src/phy_stub/phy_stub_msg_hdl.c @@@ -285,36 -285,10 +285,36 @@@ void l1HdlConfigReq(uint32_t msgLen, vo * RFAILED - failure * * ****************************************************************/ -uint16_t l1BuildAndSendCrcInd(uint16_t slot, uint16_t sfn) +uint16_t l1BuildAndSendCrcInd(uint16_t slot, uint16_t sfn, fapi_ul_pusch_pdu_t puschPdu) { + uint8_t result[]={0,//MSG3 + 0,//BSR + 0,//MSG5 RRC Setup Complete + 0,//Security Mode Complete + 0,//Registraion Complete + 0,//RRC Reconfiguration Complete + 0,//UL DATA -1 + 0,//UL DATA -2 + 0,//UL DATA -3 + 0,//UL DATA -4 + 0,0,0,0,0, + 0,0,0,0,0, + 0,0,0,0,0, + 0,0,0,0,0, + 0,0,0,0,0, + 0,0,0,0,0, + 0,0,0,0,0, + 0,0,0,0,0, + 0,0,0,0,0, + 0,0,0,0,0, + 0,0,0,0,0, + 0,0,0,0,0, + 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}; + #ifdef INTEL_FAPI uint8_t idx = 0; + static uint8_t ind=0; + uint16_t ret = ROK; fapi_crc_ind_t *crcInd; MAC_ALLOC(crcInd, sizeof(fapi_crc_ind_t)); @@@ -330,17 -304,12 +330,17 @@@ crcInd->slot = slot; crcInd->numCrcs = 1; - crcInd->crc[idx].handle = 0; - crcInd->crc[idx].rnti = 0; - crcInd->crc[idx].harqId = 0; + crcInd->crc[idx].handle = puschPdu.handle; + crcInd->crc[idx].rnti = puschPdu.rnti; + crcInd->crc[idx].harqId = puschPdu.puschData.harqProcessId; crcInd->crc[idx].tbCrcStatus = 0; crcInd->crc[idx].numCb = 1; - crcInd->crc[idx].cbCrcStatus[0] = 0; + crcInd->crc[idx].cbCrcStatus[0] = result[ind%50]; + ret = (0== crcInd->crc[idx].cbCrcStatus[0])?ROK:RFAILED; + /*TBD: To use crc ind with random number and percentage */ + //crcInd->crc[idx].cbCrcStatus[0] = (crcPassPer >= rand()%(100))?0:1; + + ind++; crcInd->crc[idx].ul_cqi = 0; crcInd->crc[idx].timingAdvance = 0; crcInd->crc[idx].rssi = 0; @@@ -348,12 -317,12 +348,12 @@@ fillMsgHeader(&crcInd->header, FAPI_CRC_INDICATION, \ sizeof(fapi_crc_ind_t) - sizeof(fapi_msg_t)); - /* Sending RACH indication to MAC */ + /* Sending CRC indication to MAC */ DU_LOG("\nINFO --> PHY STUB: Sending CRC Indication to MAC"); procPhyMessages(crcInd->header.msg_id, sizeof(fapi_crc_ind_t), (void *)crcInd); MAC_FREE(crcInd, sizeof(fapi_crc_ind_t)); #endif - return ROK; + return ret; } /* l1BuildAndSendCrcInd */ #ifdef INTEL_FAPI @@@ -387,12 -356,17 +387,17 @@@ uint16_t l1BuildAndSendRxDataInd(uint16 GET_UE_ID(puschPdu.rnti, ueId); if(phyDb.ueDb.ueCb[ueId-1].isCFRA) { - /* In CF-RA in case of handover, RRC Reconfiguration Complete is sent - * by UE once RAR is received from DU */ - phyDb.ueDb.ueCb[ueId-1].ueId = ueId; - phyDb.ueDb.ueCb[ueId-1].crnti = puschPdu.rnti; - phyDb.ueDb.ueCb[ueId-1].msgRrcReconfigComp = true; - type = MSG_TYPE_RRC_RECONFIG_COMPLETE; + if(!phyDb.ueDb.ueCb[ueId-1].msgRrcReconfigComp) + { + /* In CF-RA in case of handover, RRC Reconfiguration Complete is sent + * by UE once RAR is received from DU */ + phyDb.ueDb.ueCb[ueId-1].ueId = ueId; + phyDb.ueDb.ueCb[ueId-1].crnti = puschPdu.rnti; + phyDb.ueDb.ueCb[ueId-1].msgRrcReconfigComp = true; + type = MSG_TYPE_RRC_RECONFIG_COMPLETE; + } + else + return ROK; } else { @@@ -430,7 -404,7 +435,7 @@@ type = MSG_TYPE_RRC_RECONFIG_COMPLETE; } else - return RFAILED; + return ROK; } MAC_ALLOC(rxDataInd, sizeof(fapi_rx_data_indication_t)); @@@ -921,35 -895,9 +926,35 @@@ S16 l1HdlTxDataReq(uint16_t msgLen, voi uint8_t fillPucchF0F1PduInfo(fapi_uci_o_pucch_f0f1_t *pduInfo, fapi_ul_pucch_pdu_t pucchPdu) { uint8_t idx = 0; + static uint8_t ind=0; + uint8_t result[]={0,//msg4 + 0,//Security Mode Command + 0,//Registration Accept + 0,//RRC Reconfiguration + 0,//Data 1 + 0,//Data 2 + 0,//Data 3 + 0,//Data 4 + 0,0,0,0,0, + 0,0,0,0,0, + 0,0,0,0,0, + 0,0,0,0,0, + 0,0,0,0,0, + 0,0,0,0,0, + 0,0,0,0,0, + 0,0,0,0,0, + 0,0,0,0,0, + 0,0,0,0,0, + 0,0,0,0,0, + 0,0,0,0,0, + 0,0,0,0,0,}; pduInfo->handle = pucchPdu.handle; pduInfo->pduBitmap = 1; //hardcoded for SR + if (pucchPdu.bitLenHarq) + { + pduInfo->pduBitmap |= HARQ_PDU_BITMASK; + } pduInfo->pucchFormat = pucchPdu.formatType; pduInfo->ul_cqi = 0; pduInfo->rnti = pucchPdu.rnti; @@@ -957,11 -905,8 +962,11 @@@ pduInfo->rssi = 0; if(pduInfo->pduBitmap & SR_PDU_BITMASK) { - pduInfo->srInfo.srIndication = SR_DETECTED; - pduInfo->srInfo.srConfidenceLevel = CONFDC_LEVEL_GOOD; + if (result[ind%50] == 0) + { + pduInfo->srInfo.srIndication = SR_DETECTED; + pduInfo->srInfo.srConfidenceLevel = CONFDC_LEVEL_GOOD; + } } if(pduInfo->pduBitmap & HARQ_PDU_BITMASK) { @@@ -969,10 -914,7 +974,10 @@@ pduInfo->harqInfo.harqConfidenceLevel = CONFDC_LEVEL_GOOD; for(idx = 0; idx < pduInfo->harqInfo.numHarq; idx++) { - pduInfo->harqInfo.harqValue[idx] = HARQ_PASS; + pduInfo->harqInfo.harqValue[idx] = result[ind%50]; + ind++; + /*TBD: To use harq ind with random number and percentage*/ + //pduInfo->harqInfo.harqValue[idx] = (dlHqPassPer >= rand()%(100))?HARQ_PASS:HARQ_FAIL; } } return ROK; @@@ -1125,10 -1067,7 +1130,10 @@@ S16 l1HdlUlTtiReq(uint16_t msgLen, voi if(ulTtiReq->pdus[numPdus-1].pduType == 1) { DU_LOG("\nINFO --> PHY STUB: PUSCH PDU"); - l1BuildAndSendRxDataInd(ulTtiReq->slot, ulTtiReq->sfn, ulTtiReq->pdus[numPdus-1].pdu.pusch_pdu); + if (ROK == l1BuildAndSendCrcInd(ulTtiReq->slot, ulTtiReq->sfn,ulTtiReq->pdus[numPdus-1].pdu.pusch_pdu)) + { + l1BuildAndSendRxDataInd(ulTtiReq->slot, ulTtiReq->sfn, ulTtiReq->pdus[numPdus-1].pdu.pusch_pdu); + } } if(ulTtiReq->pdus[numPdus-1].pduType == 2) { @@@ -1154,7 -1093,6 +1159,7 @@@ l1BuildAndSendRachInd(ulTtiReq->slot, ulTtiReq->sfn, CB_RA_PREAMBLE_IDX); phyDb.ueDb.numActvUe++; } + #if 0 /* Send RACH Ind to L2 for second UE */ if(phyDb.ueDb.ueCb[UE_IDX_1].rachIndSent == false && ulTtiReq->sfn == 304 && ulTtiReq->slot == 0)