From: Balaji Shankaran Date: Mon, 13 Jul 2020 14:40:36 +0000 (+0000) Subject: Merge "MIB periodicity fix Jira ID : ODUHIGH-183" X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=commitdiff_plain;h=bda786455110d7444fc56a308a387968f14eb382;hp=51bd2af5867794ba058365581a7ad3c2eba0d1c3;p=o-du%2Fl2.git Merge "MIB periodicity fix Jira ID : ODUHIGH-183" --- diff --git a/src/5gnrmac/lwr_mac_fsm.c b/src/5gnrmac/lwr_mac_fsm.c index 56224e16f..355c98ba1 100644 --- a/src/5gnrmac/lwr_mac_fsm.c +++ b/src/5gnrmac/lwr_mac_fsm.c @@ -3282,11 +3282,13 @@ uint16_t handleDlTtiReq(SlotIndInfo currTimingInfo) fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, msgLen); LwrMacSendToPhy(dlTtiReq->header.message_type_id, dlTtiReqMsgSize, (void *)dlTtiReq); } + memset(currDlSlot, 0, sizeof(MacDlSlot)); return ROK; } else { DU_LOG("\nLWR_MAC: Failed to allocate memory for DL TTI Request"); + memset(currDlSlot, 0, sizeof(MacDlSlot)); return RFAILED; } } diff --git a/src/du_app/du_cfg.c b/src/du_app/du_cfg.c index 30939597b..4bc03401a 100644 --- a/src/du_app/du_cfg.c +++ b/src/du_app/du_cfg.c @@ -159,7 +159,7 @@ S16 readMacCfg() duCfgParam.macCellCfg.ssbCfg.scsCmn = SUBCARRIER_SPACING; duCfgParam.macCellCfg.ssbCfg.ssbOffsetPointA = OFFSET_TO_POINT_A; duCfgParam.macCellCfg.ssbCfg.betaPss = BETA_PSS; - duCfgParam.macCellCfg.ssbCfg.ssbPeriod = SSB_PERIODICITY; + duCfgParam.macCellCfg.ssbCfg.ssbPeriod = SSB_PERIODICITY_20MS; duCfgParam.macCellCfg.ssbCfg.ssbScOffset = SSB_SUBCARRIER_OFFSET; duCfgParam.macCellCfg.ssbCfg.ssbMask[0] = 1; /* only one SSB is transmitted */ duCfgParam.macCellCfg.ssbCfg.ssbMask[1] = 0; @@ -471,7 +471,7 @@ S16 fillServCellCfgCommSib(SrvCellCfgCommSib *srvCellCfgComm) srvCellCfgComm->tddCfg = tddCfg; srvCellCfgComm->ssbPosInBurst = 192; - srvCellCfgComm->ssbPrdServingCell = SSB_PERIODICITY; + srvCellCfgComm->ssbPrdServingCell = SSB_PERIODICITY_20MS; srvCellCfgComm->ssPbchBlockPwr = SSB_PBCH_PWR; return ROK; diff --git a/src/du_app/du_cfg.h b/src/du_app/du_cfg.h index 3c2f0a908..e3b96ba95 100644 --- a/src/du_app/du_cfg.h +++ b/src/du_app/du_cfg.h @@ -66,7 +66,12 @@ #define SCS_CARRIER_BANDWIDTH 273 /* Subcarrier spacing- carrier bandwidth */ #define OFFSET_TO_POINT_A 24 /* PRB Offset to Point A */ #define BETA_PSS BETA_PSS_0DB -#define SSB_PERIODICITY 2 +#define SSB_PERIODICITY_5MS 5 +#define SSB_PERIODICITY_10MS 10 +#define SSB_PERIODICITY_20MS 20 +#define SSB_PERIODICITY_40MS 40 +#define SSB_PERIODICITY_80MS 80 +#define SSB_PERIODICITY_160MS 160 #define SSB_SUBCARRIER_OFFSET 0 #define SSB_MULT_CARRIER_BAND FALSE #define MULT_CELL_CARRIER FALSE diff --git a/src/du_app/du_sys_info_hdl.c b/src/du_app/du_sys_info_hdl.c index 90f4203e0..f1c01ef89 100644 --- a/src/du_app/du_sys_info_hdl.c +++ b/src/du_app/du_sys_info_hdl.c @@ -2175,7 +2175,34 @@ uint8_t BuildServCellCfgCommonSib(ServingCellConfigCommonSIB_t *srvCellCfg) ssbPosInBurst->buf[0] = duSrvCellCfg.ssbPosInBurst; ssbPosInBurst->bits_unused = 0; - srvCellCfg->ssb_PeriodicityServingCell = duSrvCellCfg.ssbPrdServingCell; + switch(duSrvCellCfg.ssbPrdServingCell) + { + case SSB_PERIODICITY_5MS: + srvCellCfg->ssb_PeriodicityServingCell = \ + ServingCellConfigCommonSIB__ssb_PeriodicityServingCell_ms5; + break; + case SSB_PERIODICITY_10MS: + srvCellCfg->ssb_PeriodicityServingCell = \ + ServingCellConfigCommonSIB__ssb_PeriodicityServingCell_ms10; + break; + case SSB_PERIODICITY_20MS: + srvCellCfg->ssb_PeriodicityServingCell = \ + ServingCellConfigCommonSIB__ssb_PeriodicityServingCell_ms20; + break; + case SSB_PERIODICITY_40MS: + srvCellCfg->ssb_PeriodicityServingCell = \ + ServingCellConfigCommonSIB__ssb_PeriodicityServingCell_ms40; + break; + case SSB_PERIODICITY_80MS: + srvCellCfg->ssb_PeriodicityServingCell = \ + ServingCellConfigCommonSIB__ssb_PeriodicityServingCell_ms80; + break; + case SSB_PERIODICITY_160MS: + srvCellCfg->ssb_PeriodicityServingCell = \ + ServingCellConfigCommonSIB__ssb_PeriodicityServingCell_ms160; + break; + } + srvCellCfg->ss_PBCH_BlockPower = duSrvCellCfg.ssPbchBlockPwr; /* Downlink config common */