From: svaidhya <svaidhya@radisys.com>
Date: Tue, 11 Mar 2025 07:47:04 +0000 (+0000)
Subject: [Epic-Id: ODUHIGH-557][Task-Id: ODUHIGH-634] RACH fixes
X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=commitdiff_plain;h=95498e1c371e897a34c28cd29881b65f3cb01b5e;p=o-du%2Fl2.git

[Epic-Id: ODUHIGH-557][Task-Id: ODUHIGH-634] RACH fixes

Change-Id: Ic200fb8cc24f34b6625366e57e5e2f01cd8ae314
Signed-off-by: svaidhya <svaidhya@radisys.com>
---

diff --git a/build/config/tdd_odu_config.xml b/build/config/tdd_odu_config.xml
index 8e92e1e38..42a332905 100644
--- a/build/config/tdd_odu_config.xml
+++ b/build/config/tdd_odu_config.xml
@@ -56,7 +56,7 @@
       </SI_SHED_INFO>
       <SRV_CELL_CFG_COM_SIB>
          <NR_SCS>1</NR_SCS>
-         <SSB_POS_INBURST>192</SSB_POS_INBURST>
+         <SSB_POS_INBURST>128</SSB_POS_INBURST>
          <SSB_PERIODICITY>20</SSB_PERIODICITY>
          <SSB_PBCH_PWR>0</SSB_PBCH_PWR>
          <DL_CFG_COMMON>
@@ -125,7 +125,7 @@
          <UL_CFG_COMMON>
             <NR_FREQ_BAND>1</NR_FREQ_BAND>
             <UL_P_MAX>23</UL_P_MAX>
-            <FREQ_LOC_BW>28875</FREQ_LOC_BW>
+            <FREQ_LOC_BW>1099</FREQ_LOC_BW>
             <TIME_ALLIGN_TIMER_COMM>7</TIME_ALLIGN_TIMER_COMM>
             <SCS_SPEC_CARRIER>
                <SSB_SUBCARRIER_OFFSET>0</SSB_SUBCARRIER_OFFSET>
@@ -134,42 +134,54 @@
             </SCS_SPEC_CARRIER>
             <RACH_CFG_COMMON>
                <PRESENT>2</PRESENT>
-               <PRACH_CONFIG_IDX>66</PRACH_CONFIG_IDX>
+               <PRACH_CONFIG_IDX>98</PRACH_CONFIG_IDX>
                <MSG_1_FDM>0</MSG_1_FDM>
                <MAX_NUM_RB>273</MAX_NUM_RB>
-               <PRACH_MAX_PRB>24</PRACH_MAX_PRB>
-               <ZERO_CORRELATION_ZONE_CFG>4</ZERO_CORRELATION_ZONE_CFG>
-               <PRACH_PREAMBLE_RCVD_TGT_PWR>-74</PRACH_PREAMBLE_RCVD_TGT_PWR>
-               <PREAMBLE_TRANS_MAX>10</PREAMBLE_TRANS_MAX>
+               <PRACH_MAX_PRB>273</PRACH_MAX_PRB>
+               <ZERO_CORRELATION_ZONE_CFG>12</ZERO_CORRELATION_ZONE_CFG>
+               <PRACH_PREAMBLE_RCVD_TGT_PWR>-96</PRACH_PREAMBLE_RCVD_TGT_PWR>
+               <PREAMBLE_TRANS_MAX>6</PREAMBLE_TRANS_MAX>
                <PWR_RAMPING_STEP>1</PWR_RAMPING_STEP>
-               <RA_RSP_WINDOW>4</RA_RSP_WINDOW>
+               <RA_RSP_WINDOW>5</RA_RSP_WINDOW>
                <NUM_RA_PREAMBLE>63</NUM_RA_PREAMBLE>
-               <NUM_SSB_PER_RACH_OCC>4</NUM_SSB_PER_RACH_OCC>
-               <CB_PREAMBLE_PER_SSB>8</CB_PREAMBLE_PER_SSB>
+               <NUM_SSB_PER_RACH_OCC>3</NUM_SSB_PER_RACH_OCC>
+               <CB_PREAMBLE_PER_SSB>64</CB_PREAMBLE_PER_SSB>
                <CONT_RES_TIMER>7</CONT_RES_TIMER>
-               <RSRP_THRESHOLD_SSB>31</RSRP_THRESHOLD_SSB>
+               <RSRP_THRESHOLD_SSB>19</RSRP_THRESHOLD_SSB>
                <ROOT_SEQ_IDX_PRESENT>2</ROOT_SEQ_IDX_PRESENT>
-               <ROOT_SEQ_IDX>0</ROOT_SEQ_IDX>
+               <ROOT_SEQ_IDX>1</ROOT_SEQ_IDX>
                <PRACH_SUBCARRIER_SPACING>1</PRACH_SUBCARRIER_SPACING>
                <PRACH_RESTRICTED_SET_CFG>0</PRACH_RESTRICTED_SET_CFG>
             </RACH_CFG_COMMON>
             <PUSCH_CFG_COMMON>
                <PUSCH_CFG_PRESENT>2</PUSCH_CFG_PRESENT>
-               <PUSCH_MSG3_DELTA_PREAMBLE>0</PUSCH_MSG3_DELTA_PREAMBLE>
-               <PUSCH_P0_NOMINAL_WITH_GRANT>-70</PUSCH_P0_NOMINAL_WITH_GRANT>
-               <NUM_TIME_DOM_RSRC_ALLOC>2</NUM_TIME_DOM_RSRC_ALLOC>
+               <PUSCH_MSG3_DELTA_PREAMBLE>1</PUSCH_MSG3_DELTA_PREAMBLE>
+               <PUSCH_P0_NOMINAL_WITH_GRANT>-90</PUSCH_P0_NOMINAL_WITH_GRANT>
+               <NUM_TIME_DOM_RSRC_ALLOC>4</NUM_TIME_DOM_RSRC_ALLOC>
                <PUSCH_TIME_DOM_RSRC_ALLOC_LIST>
                   <PUSCH_TIME_DOM_RSRC_ALLOC>
-                     <K2>4</K2>
-                     <MAP_TYPE>0</MAP_TYPE>
-                     <PUSCH_START_SYMBOL>3</PUSCH_START_SYMBOL>
-                     <PUSCH_LENGTH_SYMBOL>11</PUSCH_LENGTH_SYMBOL>
+                     <K2>5</K2>
+                     <MAP_TYPE>1</MAP_TYPE>
+                     <PUSCH_START_SYMBOL>0</PUSCH_START_SYMBOL>
+                     <PUSCH_LENGTH_SYMBOL>13</PUSCH_LENGTH_SYMBOL>
                   </PUSCH_TIME_DOM_RSRC_ALLOC>
                   <PUSCH_TIME_DOM_RSRC_ALLOC>
                      <K2>5</K2>
-                     <MAP_TYPE>0</MAP_TYPE>
-                     <PUSCH_START_SYMBOL>3</PUSCH_START_SYMBOL>
-                     <PUSCH_LENGTH_SYMBOL>11</PUSCH_LENGTH_SYMBOL>
+                     <MAP_TYPE>1</MAP_TYPE>
+                     <PUSCH_START_SYMBOL>0</PUSCH_START_SYMBOL>
+                     <PUSCH_LENGTH_SYMBOL>12</PUSCH_LENGTH_SYMBOL>
+                  </PUSCH_TIME_DOM_RSRC_ALLOC>
+                  <PUSCH_TIME_DOM_RSRC_ALLOC>
+                     <K2>5</K2>
+                     <MAP_TYPE>1</MAP_TYPE>
+                     <PUSCH_START_SYMBOL>10</PUSCH_START_SYMBOL>
+                     <PUSCH_LENGTH_SYMBOL>3</PUSCH_LENGTH_SYMBOL>
+                  </PUSCH_TIME_DOM_RSRC_ALLOC>
+                  <PUSCH_TIME_DOM_RSRC_ALLOC>
+                     <K2>7</K2>
+                     <MAP_TYPE>1</MAP_TYPE>
+                     <PUSCH_START_SYMBOL>10</PUSCH_START_SYMBOL>
+                     <PUSCH_LENGTH_SYMBOL>3</PUSCH_LENGTH_SYMBOL>
                   </PUSCH_TIME_DOM_RSRC_ALLOC>
                </PUSCH_TIME_DOM_RSRC_ALLOC_LIST>
             </PUSCH_CFG_COMMON>
@@ -177,16 +189,16 @@
                <PRESENT>2</PRESENT>
                <PUCCH_RSRC_COMMON>0</PUCCH_RSRC_COMMON>
                <GRP_HOP>0</GRP_HOP>
-               <PUCCH_P0_NOMINAL>-74</PUCCH_P0_NOMINAL>
+               <PUCCH_P0_NOMINAL>-70</PUCCH_P0_NOMINAL>
             </PUCCH_CFG_COMMON>
          </UL_CFG_COMMON>
          <TDD_UL_DL_CFG_COMMON>
             <REF_SCS>1</REF_SCS>
-            <TX_PRD>6</TX_PRD>
-            <NUM_DL_SLOTS>7</NUM_DL_SLOTS>
-            <NUM_DL_SYMBOLS>12</NUM_DL_SYMBOLS>
-            <NUM_UL_SLOTS>2</NUM_UL_SLOTS>
-            <NUM_UL_SYMBOLS>1</NUM_UL_SYMBOLS>
+            <TX_PRD>5</TX_PRD>
+            <NUM_DL_SLOTS>3</NUM_DL_SLOTS>
+            <NUM_DL_SYMBOLS>6</NUM_DL_SYMBOLS>
+            <NUM_UL_SLOTS>1</NUM_UL_SLOTS>
+            <NUM_UL_SYMBOLS>4</NUM_UL_SYMBOLS>
          </TDD_UL_DL_CFG_COMMON>
       </SRV_CELL_CFG_COM_SIB>
    </SIB1_PARAMS>
@@ -547,7 +559,7 @@
       <PRACH_CFG>
          <PRACH_SEQ_LEN>1</PRACH_SEQ_LEN>
          <NR_SCS>30</NR_SCS>
-         <PRACH_CONFIG_IDX>66</PRACH_CONFIG_IDX>
+         <PRACH_CONFIG_IDX>98</PRACH_CONFIG_IDX>
          <NUM_PRACH_FDM>1</NUM_PRACH_FDM>
          <FDM_LIST>
             <FDM_INFO>
@@ -560,7 +572,7 @@
          <PRACH_RESTRICTED_SET_CFG>0</PRACH_RESTRICTED_SET_CFG>
          <SSB_PER_RACH>1</SSB_PER_RACH>
          <NUM_RA_PREAMBLE>63</NUM_RA_PREAMBLE>
-         <CB_PREAMBLE_PER_SSB>8</CB_PREAMBLE_PER_SSB>
+         <CB_PREAMBLE_PER_SSB>64</CB_PREAMBLE_PER_SSB>
          <MAX_NUM_RB>273</MAX_NUM_RB>
          <PRACH_MAX_PRB>24</PRACH_MAX_PRB>
          <RSRP_THRESHOLD_SSB>31</RSRP_THRESHOLD_SSB>
diff --git a/src/5gnrmac/lwr_mac_fsm.c b/src/5gnrmac/lwr_mac_fsm.c
index 1632de6d8..d11ca4f61 100644
--- a/src/5gnrmac/lwr_mac_fsm.c
+++ b/src/5gnrmac/lwr_mac_fsm.c
@@ -2740,7 +2740,7 @@ uint8_t buildAndSendOAIConfigReqToL1(void *msg)
    DU_LOG("\nINFO   --> LWR_MAC: CONFIG_REQ: numberofTDDSlot in MAX_PERIOICITY(10ms) = %d", numSlotsInMaxPeriodicity);
    DU_LOG("\nINFO   --> LWR_MAC: CONFIG_REQ: numberofTDDSlot in CURRENT PERIOICITY(enumVal = %d) = %d\n", macCfgParams.tddCfg.tddPeriod, numSlotsInCurrPeriodicity);
    //configReq->number_of_tlvs = 25 + 1 + MAX_TDD_PERIODICITY_SLOTS * MAX_SYMB_PER_SLOT;
-   totalTlv = 25 + 1+ numSlotsInMaxPeriodicity * MAX_SYMB_PER_SLOT;
+   totalTlv = 26 + 1+ numSlotsInMaxPeriodicity * MAX_SYMB_PER_SLOT;
 #endif
    /* totalCfgReqMsgLen = size of config req's msg header + size of tlv supporting + size of tlv supporting *sizeof(fapi_uint32_tlv_t)   */
    totalCfgReqMsgLen += sizeof(configReq->header) + sizeof( configReq->number_of_tlvs) + totalTlv*sizeof(fapi_uint32_tlv_t);
@@ -2794,8 +2794,8 @@ uint8_t buildAndSendOAIConfigReqToL1(void *msg)
          sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn << TLV_ALIGN(8), &msgLen);
 
    /* fill PRACH configuration */
-   //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG,     \
-   sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen);
+   fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG,     \
+   sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen << TLV_ALIGN(8), &msgLen);
    fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG,        \
          sizeof(uint8_t), convertScsValToScsEnum(macCfgParams.prachCfg.prachSubcSpacing) << TLV_ALIGN(8), &msgLen);
    fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG,     \
diff --git a/src/cm/common_def.h b/src/cm/common_def.h
index 0743e3395..1d6ba6b95 100644
--- a/src/cm/common_def.h
+++ b/src/cm/common_def.h
@@ -95,11 +95,7 @@
 #define PUCCH_FORMAT_3 3 
 #define PUCCH_FORMAT_4 4
 
-#ifdef OAI_TESTING
-#define DEFAULT_MCS 4
-#else
 #define DEFAULT_MCS 4
-#endif
 
 #define BANDWIDTH_20MHZ 20
 #define BANDWIDTH_100MHZ 100
diff --git a/src/du_app/du_cfg.c b/src/du_app/du_cfg.c
index 239285ab2..6e2d84401 100644
--- a/src/du_app/du_cfg.c
+++ b/src/du_app/du_cfg.c
@@ -5842,7 +5842,7 @@ void printDuConfig()
    DU_LOG("SSB Subcarrier Offset %d\n", ssbCfg->ssbScOffset);
    for (ssbMaskIdx = 0; ssbMaskIdx < SSB_MASK_SIZE; ssbMaskIdx++)
    {
-      DU_LOG("SSB Mask[%d] :%d\n", ssbMaskIdx, ssbCfg->ssbMask[ssbMaskIdx]);
+      DU_LOG("SSB Mask[%d] :%x\n", ssbMaskIdx, ssbCfg->ssbMask[ssbMaskIdx]);
    }
    DU_LOG("Beam ID %d\n", ssbCfg->beamId[0]);
    DU_LOG("BETA PSS %d\n", ssbCfg->betaPss);
diff --git a/src/du_app/du_sys_info_hdl.c b/src/du_app/du_sys_info_hdl.c
index 0a4eb3b09..65067cdd8 100644
--- a/src/du_app/du_sys_info_hdl.c
+++ b/src/du_app/du_sys_info_hdl.c
@@ -1854,7 +1854,8 @@ uint8_t  BuildRachCfgCommon(struct BWP_UplinkCommon__rach_ConfigCommon *rachCfg)
                   }
                case RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR_oneHalf:
                   {
-                     //TODO
+                     setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->choice.one = \
+                        convertCbPreamblePerSsbValueToEnum(duRachCfg.numCbPreamblePerSsb);
                      break;
                   }
                case RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR_one:
@@ -2324,7 +2325,7 @@ uint8_t BuildServCellCfgCommonSib(ServingCellConfigCommonSIB_t *srvCellCfg)
 
    /* SSB Position in Burst */
    ssbPosInBurst = &srvCellCfg->ssb_PositionsInBurst.inOneGroup;
-   ssbPosInBurst->size = 1;
+   ssbPosInBurst->size = 4;
    DU_ALLOC(ssbPosInBurst->buf, ssbPosInBurst->size * sizeof(uint8_t));
    if(!ssbPosInBurst->buf)
    {