From: Balaji Shankaran Date: Fri, 26 Jun 2020 09:57:16 +0000 (+0530) Subject: Addressing flow wise comments X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=commitdiff_plain;h=49dec2270f1b3c03b36a801e153bf0786edffc24;hp=180692ac45aac62b3207635a7cb36773e74e499f;p=o-du%2Fl2.git Addressing flow wise comments Change-Id: Ib07d4f44e2daf1f0201e7fd6589fe62e6e098c49 Signed-off-by: Balaji Shankaran --- diff --git a/src/5gnrmac/lwr_mac_fsm.c b/src/5gnrmac/lwr_mac_fsm.c index 96cd18e4e..04a6c9c92 100644 --- a/src/5gnrmac/lwr_mac_fsm.c +++ b/src/5gnrmac/lwr_mac_fsm.c @@ -2322,8 +2322,8 @@ void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo) */ coreset0Size= sib1PdcchInfo->coreset0Cfg.coreSet0Size; rbStart = 0; /* For SIB1 */ - //rbStart = sib1PdcchInfo->dci.pdschCfg->freqAlloc.rbStart; - rbLen = sib1PdcchInfo->dci.pdschCfg->freqAlloc.rbSize; + //rbStart = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb; + rbLen = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb; if((rbLen >=1) && (rbLen <= coreset0Size - rbStart)) { @@ -2337,9 +2337,9 @@ void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo) } /* Fetching DCI field values */ - timeDomResAssign = sib1PdcchInfo->dci.pdschCfg->timeAlloc. + timeDomResAssign = sib1PdcchInfo->dci.pdschCfg->pdschTimeAlloc. rowIndex -1; - VRB2PRBMap = sib1PdcchInfo->dci.pdschCfg->freqAlloc.\ + VRB2PRBMap = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.\ vrbPrbMapping; modNCodScheme = sib1PdcchInfo->dci.pdschCfg->codeword[0].mcsIndex; redundancyVer = sib1PdcchInfo->dci.pdschCfg->codeword[0].rvIndex; @@ -2462,7 +2462,7 @@ void fillRarDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *rarPdcchInfo) coreset0Size= rarPdcchInfo->coreset0Cfg.coreSet0Size; rbStart = 0; /* For SIB1 */ //rbStart = rarPdcchInfo->dci.pdschCfg->freqAlloc.rbStart; - rbLen = rarPdcchInfo->dci.pdschCfg->freqAlloc.rbSize; + rbLen = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb; if((rbLen >=1) && (rbLen <= coreset0Size - rbStart)) { @@ -2476,8 +2476,8 @@ void fillRarDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *rarPdcchInfo) } /* Fetching DCI field values */ - timeDomResAssign = rarPdcchInfo->dci.pdschCfg->timeAlloc.rowIndex -1; - VRB2PRBMap = rarPdcchInfo->dci.pdschCfg->freqAlloc.vrbPrbMapping; + timeDomResAssign = rarPdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1; + VRB2PRBMap = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping; modNCodScheme = rarPdcchInfo->dci.pdschCfg->codeword[0].mcsIndex; tbScaling = 0; /* configured to 0 scaling */ reserved = 0; @@ -2604,7 +2604,7 @@ Msg4Info *msg4Info) /* TODO: Fill values of coreset0Size, rbStart and rbLen */ coreset0Size = msg4PdcchInfo->coreset0Cfg.coreSet0Size; //rbStart = msg4PdcchInfo->dci.pdschCfg->freqAlloc.rbStart; - rbLen = msg4PdcchInfo->dci.pdschCfg->freqAlloc.rbSize; + rbLen = msg4PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb; if((rbLen >=1) && (rbLen <= coreset0Size - rbStart)) { @@ -2619,8 +2619,8 @@ Msg4Info *msg4Info) /* Fetching DCI field values */ dciFormatId = msg4Info->dciFormatId; /* DCI indentifier for DL */ - timeDomResAssign = msg4PdcchInfo->dci.pdschCfg->timeAlloc.rowIndex -1; - VRB2PRBMap = msg4PdcchInfo->dci.pdschCfg->freqAlloc.vrbPrbMapping; + timeDomResAssign = msg4PdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1; + VRB2PRBMap = msg4PdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping; modNCodScheme = msg4PdcchInfo->dci.pdschCfg->codeword[0].mcsIndex; ndi = msg4Info->ndi; redundancyVer = msg4PdcchInfo->dci.pdschCfg->codeword[0].rvIndex; @@ -2752,8 +2752,8 @@ S16 fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, DlSchedInfo *dlInfo, uint32 return RFAILED;; } dlTtiReqPdu->pduType = PDCCH_PDU_TYPE; - dlTtiReqPdu->u.pdcch_pdu.bwpSize = bwp->BWPSize; - dlTtiReqPdu->u.pdcch_pdu.bwpPart = bwp->BWPStart; + dlTtiReqPdu->u.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb; + dlTtiReqPdu->u.pdcch_pdu.bwpPart = bwp->freqAlloc.startPrb; dlTtiReqPdu->u.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing; dlTtiReqPdu->u.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix; dlTtiReqPdu->u.pdcch_pdu.startSymbolIndex = pdcchInfo->coreset0Cfg.startSymbolIndex; @@ -2807,8 +2807,8 @@ void fillPdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, PdschCfg *pdschInfo, dlTtiReqPdu->u.pdsch_pdu.pduBitMap = pdschInfo->pduBitmap; dlTtiReqPdu->u.pdsch_pdu.rnti = pdschInfo->rnti; dlTtiReqPdu->u.pdsch_pdu.pduIndex = pduIndex; - dlTtiReqPdu->u.pdsch_pdu.bwpSize = bwp.BWPSize; - dlTtiReqPdu->u.pdsch_pdu.bwpStart = bwp.BWPStart; + dlTtiReqPdu->u.pdsch_pdu.bwpSize = bwp.freqAlloc.numPrb; + dlTtiReqPdu->u.pdsch_pdu.bwpStart = bwp.freqAlloc.startPrb; dlTtiReqPdu->u.pdsch_pdu.subCarrierSpacing = bwp.subcarrierSpacing; dlTtiReqPdu->u.pdsch_pdu.cyclicPrefix = bwp.cyclicPrefix; dlTtiReqPdu->u.pdsch_pdu.nrOfCodeWords = pdschInfo->numCodewords; @@ -2831,13 +2831,13 @@ void fillPdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, PdschCfg *pdschInfo, dlTtiReqPdu->u.pdsch_pdu.scid = pdschInfo->dmrs.scid; dlTtiReqPdu->u.pdsch_pdu.numDmrsCdmGrpsNoData = pdschInfo->dmrs.numDmrsCdmGrpsNoData; dlTtiReqPdu->u.pdsch_pdu.dmrsPorts = pdschInfo->dmrs.dmrsPorts; - dlTtiReqPdu->u.pdsch_pdu.resourceAlloc = pdschInfo->freqAlloc.resourceAlloc; + dlTtiReqPdu->u.pdsch_pdu.resourceAlloc = pdschInfo->pdschFreqAlloc.resourceAllocType; /* since we are using type-1, hence rbBitmap excluded */ - dlTtiReqPdu->u.pdsch_pdu.rbStart = pdschInfo->freqAlloc.rbStart; - dlTtiReqPdu->u.pdsch_pdu.rbSize = pdschInfo->freqAlloc.rbSize; - dlTtiReqPdu->u.pdsch_pdu.vrbToPrbMapping = pdschInfo->freqAlloc.vrbPrbMapping; - dlTtiReqPdu->u.pdsch_pdu.startSymbIndex = pdschInfo->timeAlloc.startSymbolIndex; - dlTtiReqPdu->u.pdsch_pdu.nrOfSymbols = pdschInfo->timeAlloc.numSymbols; + dlTtiReqPdu->u.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.freqAlloc.startPrb; + dlTtiReqPdu->u.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.freqAlloc.numPrb; + dlTtiReqPdu->u.pdsch_pdu.vrbToPrbMapping = pdschInfo->pdschFreqAlloc.vrbPrbMapping; + dlTtiReqPdu->u.pdsch_pdu.startSymbIndex = pdschInfo->pdschTimeAlloc.timeAlloc.startSymb; + dlTtiReqPdu->u.pdsch_pdu.nrOfSymbols = pdschInfo->pdschTimeAlloc.timeAlloc.numSymb; dlTtiReqPdu->u.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs; dlTtiReqPdu->u.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize; dlTtiReqPdu->u.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces; @@ -3408,37 +3408,34 @@ uint8_t getnPdus(fapi_ul_tti_req_t *ulTtiReq, MacUlSlot *currUlSlot) { uint8_t pduCount = 0; - if(currUlSlot != NULLP) - { - if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH) - { - pduCount++; - if(ulTtiReq) - ulTtiReq->rachPresent = PDU_PRESENT; - } + if(ulTtiReq && currUlSlot) + { + if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH) + { + pduCount++; + ulTtiReq->rachPresent = PDU_PRESENT; + } if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH) { - pduCount++; - if(ulTtiReq) - ulTtiReq->nUlsch++; + pduCount++; + ulTtiReq->nUlsch++; } if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH_UCI) { - pduCount++; - if(ulTtiReq) - ulTtiReq->nUlsch = PDU_PRESENT; - } - if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI) - { - pduCount++; - if(ulTtiReq) - ulTtiReq->nUlcch = PDU_PRESENT; - } - if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_SRS) - { - pduCount++; - } - } + pduCount++; + ulTtiReq->nUlsch++; + ulTtiReq->nUlsch = PDU_PRESENT; + } + if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI) + { + pduCount++; + ulTtiReq->nUlcch = PDU_PRESENT; + } + if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_SRS) + { + pduCount++; + } + } return pduCount; } #endif diff --git a/src/5gnrmac/mac_mux.c b/src/5gnrmac/mac_mux.c index 266a57258..dcab8fdb8 100644 --- a/src/5gnrmac/mac_mux.c +++ b/src/5gnrmac/mac_mux.c @@ -313,7 +313,6 @@ void macMuxPdu(MacDlData *dlData, MacCeInfo *macCeData, uint16_t tbSize) uint8_t FBitSize = 1; uint8_t lcidSize = 6; uint8_t lenFieldSize = 0; /* 8-bit or 16-bit L field */ - uint8_t criSize = 8; /* PACK ALL MAC CE */ for(idx = 0; idx < macCeData->numCes; idx++) diff --git a/src/5gnrmac/rg_lmm.c b/src/5gnrmac/rg_lmm.c index 8502480ae..9e49c55ef 100755 --- a/src/5gnrmac/rg_lmm.c +++ b/src/5gnrmac/rg_lmm.c @@ -2208,6 +2208,7 @@ int MacSchCellCfgReq macCellCfg->prachCfg.prachSubcSpacing; schCellCfg.schRachCfg.msg1FreqStart = macCellCfg->prachCfg.msg1FreqStart; schCellCfg.schRachCfg.msg1Fdm = macCellCfg->prachCfg.msg1Fdm; + schCellCfg.schRachCfg.rootSeqLen = macCellCfg->prachCfg.rootSeqLen; schCellCfg.schRachCfg.rootSeqIdx = macCellCfg->prachCfg.fdm[0].rootSeqIdx; schCellCfg.schRachCfg.numRootSeq = macCellCfg->prachCfg.fdm[0].numRootSeq; schCellCfg.schRachCfg.k1 = macCellCfg->prachCfg.fdm[0].k1; @@ -2219,8 +2220,8 @@ int MacSchCellCfgReq schCellCfg.schRachCfg.raRspWindow = macCellCfg->prachCfg.raRspWindow; /* fill initial DL BWP */ - schCellCfg.schInitialDlBwp.bwp.firstPrb = macCellCfg->initialDlBwp.bwp.firstPrb; - schCellCfg.schInitialDlBwp.bwp.numPrb = macCellCfg->initialDlBwp.bwp.numPrb; + schCellCfg.schInitialDlBwp.bwp.freqAlloc.startPrb = macCellCfg->initialDlBwp.bwp.firstPrb; + schCellCfg.schInitialDlBwp.bwp.freqAlloc.numPrb = macCellCfg->initialDlBwp.bwp.numPrb; schCellCfg.schInitialDlBwp.bwp.scs = macCellCfg->initialDlBwp.bwp.scs; schCellCfg.schInitialDlBwp.bwp.cyclicPrefix = macCellCfg->initialDlBwp.bwp.cyclicPrefix; schCellCfg.schInitialDlBwp.pdcchCommon.commonSearchSpace.searchSpaceId = @@ -2251,9 +2252,9 @@ int MacSchCellCfgReq schCellCfg.schInitialDlBwp.pdschCommon.lengthSymbol = macCellCfg->initialDlBwp.pdschCommon.lengthSymbol; - /* fill initial DL BWP */ - schCellCfg.schInitialUlBwp.bwp.firstPrb = macCellCfg->initialUlBwp.bwp.firstPrb; - schCellCfg.schInitialUlBwp.bwp.numPrb = macCellCfg->initialUlBwp.bwp.numPrb; + /* fill initial UL BWP */ + schCellCfg.schInitialUlBwp.bwp.freqAlloc.startPrb = macCellCfg->initialUlBwp.bwp.firstPrb; + schCellCfg.schInitialUlBwp.bwp.freqAlloc.numPrb = macCellCfg->initialUlBwp.bwp.numPrb; schCellCfg.schInitialUlBwp.bwp.scs = macCellCfg->initialUlBwp.bwp.scs; schCellCfg.schInitialUlBwp.bwp.cyclicPrefix = macCellCfg->initialUlBwp.bwp.cyclicPrefix; schCellCfg.schInitialUlBwp.puschCommon.k2 = macCellCfg->initialUlBwp.puschCommon.k2; diff --git a/src/5gnrsch/sch.c b/src/5gnrsch/sch.c index 7fe972958..503a90bff 100644 --- a/src/5gnrsch/sch.c +++ b/src/5gnrsch/sch.c @@ -424,6 +424,9 @@ int InitSchCellCb(Inst inst, SchCellCfg *schCellCfg) return RFAILED; } + memset(schDlSlotInfo, 0, sizeof(SchDlSlotInfo)); + memset(schUlSlotInfo, 0, sizeof(SchUlSlotInfo)); + schDlSlotInfo->totalPrb = schUlSlotInfo->totalPrb = MAX_NUM_RB; for(uint8_t itr=0; itrn0 = slotIndex; /* calculate the PRBs */ - calculatePRB( ((offsetPointA-offset)/6), (numRbs/6), FreqDomainResource); + schAllocFreqDomRscType0(((offsetPointA-offset)/6), (numRbs/6), FreqDomainResource); /* fill BWP */ - bwp->BWPSize = MAX_NUM_RB; /* whole of BW */ - bwp->BWPStart = 0; - bwp->subcarrierSpacing = 0; /* 15Khz */ - bwp->cyclicPrefix = 0; /* normal */ + bwp->freqAlloc.numPrb = MAX_NUM_RB; /* whole of BW */ + bwp->freqAlloc.startPrb = 0; + bwp->subcarrierSpacing = 0; /* 15Khz */ + bwp->cyclicPrefix = 0; /* normal */ /* fill the PDCCH PDU */ pdcch->coreset0Cfg.coreSet0Size = numRbs; @@ -551,30 +554,76 @@ uint8_t offsetPointA tbSize = schCalcTbSize(sib1SchCfg->sib1PduLen); pdsch->codeword[cwCount].tbSize = tbSize; } - pdsch->dataScramblingId = pci; - pdsch->numLayers = 1; - pdsch->transmissionScheme = 0; - pdsch->refPoint = 0; - pdsch->dmrs.dlDmrsSymbPos = 2; - pdsch->dmrs.dmrsConfigType = 0; /* type-1 */ - pdsch->dmrs.dlDmrsScramblingId = pci; - pdsch->dmrs.scid = 0; - pdsch->dmrs.numDmrsCdmGrpsNoData = 1; - pdsch->dmrs.dmrsPorts = 0; - pdsch->freqAlloc.resourceAlloc = 1; /* RAT type-1 RIV format */ - pdsch->freqAlloc.rbStart = offset + SCH_SSB_PRB_DURATION; /* the RB numbering starts from coreset0, and PDSCH is always above SSB */ - pdsch->freqAlloc.rbSize = schCalcNumPrb(tbSize,sib1SchCfg->sib1Mcs,numPdschSymbols); - pdsch->freqAlloc.vrbPrbMapping = 0; /* non-interleaved */ - pdsch->timeAlloc.rowIndex = 1; - pdsch->timeAlloc.startSymbolIndex = 2; /* spec-38.214, Table 5.1.2.1-1 */ - pdsch->timeAlloc.numSymbols = numPdschSymbols; - pdsch->beamPdschInfo.numPrgs = 1; - pdsch->beamPdschInfo.prgSize = 1; - pdsch->beamPdschInfo.digBfInterfaces = 0; - pdsch->beamPdschInfo.prg[0].pmIdx = 0; - pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0; - pdsch->txPdschPower.powerControlOffset = 0; - pdsch->txPdschPower.powerControlOffsetSS = 0; + pdsch->dataScramblingId = pci; + pdsch->numLayers = 1; + pdsch->transmissionScheme = 0; + pdsch->refPoint = 0; + pdsch->dmrs.dlDmrsSymbPos = 2; + pdsch->dmrs.dmrsConfigType = 0; /* type-1 */ + pdsch->dmrs.dlDmrsScramblingId = pci; + pdsch->dmrs.scid = 0; + pdsch->dmrs.numDmrsCdmGrpsNoData = 1; + pdsch->dmrs.dmrsPorts = 0; + pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */ + pdsch->pdschFreqAlloc.freqAlloc.startPrb = offset + SCH_SSB_NUM_PRB; /* the RB numbering starts from coreset0, + and PDSCH is always above SSB */ + pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize,sib1SchCfg->sib1Mcs,numPdschSymbols); + pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */ + pdsch->pdschTimeAlloc.rowIndex = 1; + pdsch->pdschTimeAlloc.timeAlloc.startSymb = 2; /* spec-38.214, Table 5.1.2.1-1 */ + pdsch->pdschTimeAlloc.timeAlloc.numSymb = numPdschSymbols; + pdsch->beamPdschInfo.numPrgs = 1; + pdsch->beamPdschInfo.prgSize = 1; + pdsch->beamPdschInfo.digBfInterfaces = 0; + pdsch->beamPdschInfo.prg[0].pmIdx = 0; + pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0; + pdsch->txPdschPower.powerControlOffset = 0; + pdsch->txPdschPower.powerControlOffsetSS = 0; + +} + +/** + * @brief Fill SSB start symbol + * + * @details + * + * Function : fillSsbStartSymb + * + * This API stores SSB start index per beam + * + * @param[in] SchCellCb *cellCb + * @return int + * -# ROK + * -# RFAILED + **/ +void fillSsbStartSymb(SchCellCb *cellCb) +{ + uint8_t cnt, scs; + + scs = cellCb->cellCfg.ssbSchCfg.scsCommon; + uint8_t ssbStartSymbArr[SCH_MAX_SSB_BEAM]; + + memset(ssbStartSymbArr, 0, sizeof(SCH_MAX_SSB_BEAM)); + /* Determine value of "n" based on Section 4.1 of 3GPP TS 38.213 */ + switch(scs) + { + case SCH_SCS_15KHZ: + { + uint8_t symbIdx=0; + cnt = 2;/* n = 0, 1 for SCS = 15KHz */ + for(uint8_t idx=0; idxssbStartSymbArr, 0, sizeof(SCH_MAX_SSB_BEAM)); + memcpy(cellCb->ssbStartSymbArr, ssbStartSymbArr, SCH_MAX_SSB_BEAM); } diff --git a/src/5gnrsch/sch.h b/src/5gnrsch/sch.h index 96f3d225f..bb1d39b05 100644 --- a/src/5gnrsch/sch.h +++ b/src/5gnrsch/sch.h @@ -25,11 +25,11 @@ #define MAX_NUM_RB 106 /* value for numerology 0 15Khz */ #define SCH_MIB_TRANS 80 #define SCH_NUM_SC_PRB 12 /* number of SCs in a PRB */ -#define SCH_MAX_SSB_BEAM 4 /* since we are supporting only SCS=15KHz */ #define SCH_SCS_15KHZ 0 /* numerology 0 and 15Khz */ #define SCH_SYMBOL_PER_SLOT 14 -#define SCH_SSB_SYMB_DURATION 4 -#define SCH_SSB_PRB_DURATION 20 +#define SCH_SSB_NUM_SYMB 4 +#define SCH_SSB_NUM_PRB 20 +#define SCH_MAX_SSB_BEAM 4 /* since we are supporting only SCS=15KHz */ #define SCH_MEM_REGION 4 #define SCH_POOL 1 #define SCHED_DELTA 1 @@ -94,15 +94,14 @@ typedef struct schGenCb */ typedef struct schDlSlotInfo { - uint16_t totalPrb; /*!< Number of RBs in the cell */ - uint16_t assignedPrb[SCH_SYMBOL_PER_SLOT]; /*!< Num RBs and corresponding symbols allocated */ - bool ssbPres; /*!< Flag to determine if SSB is present in this slot */ - uint8_t ssbIdxSupported; /*!< Max SSB index */ - SsbInfo ssbInfo[MAX_SSB_IDX]; /*!< SSB info */ - bool sib1Pres; - //bool rarPres; - RarInfo *rarInfo; - Msg4Info *msg4Info; + uint16_t totalPrb; /*!< Number of RBs in the cell */ + uint16_t assignedPrb[SCH_SYMBOL_PER_SLOT]; /*!< Num RBs and corresponding symbols allocated */ + bool ssbPres; /*!< Flag to determine if SSB is present in this slot */ + uint8_t ssbIdxSupported; /*!< Max SSB index */ + SsbInfo ssbInfo[MAX_SSB_IDX]; /*!< SSB info */ + bool sib1Pres; /*!< Flag to determine if SIB1 is present in this slot */ + RarInfo *rarInfo; /*!< RAR info */ + Msg4Info *msg4Info; /*!< msg4 info */ }SchDlSlotInfo; typedef struct schRaCb @@ -128,15 +127,16 @@ typedef struct schUlSlotInfo */ typedef struct schCellCb { - uint16_t cellId; /*!< Cell ID */ - Inst instIdx; /*!< Index of the scheduler instance */ - Inst macInst; /*!< Index of the MAC instance */ - uint8_t numSlots; /*!< Number of slots in current frame */ - SlotIndInfo slotInfo; /*!< SFN, Slot info being processed*/ - SchDlSlotInfo *schDlSlotInfo[SCH_NUM_SLOTS]; /*!< SCH resource allocations in DL */ - SchUlSlotInfo *schUlSlotInfo[SCH_NUM_SLOTS]; /*!< SCH resource allocations in UL */ - SchCellCfg cellCfg; /*!< Cell ocnfiguration */ - SchRaCb raCb[SCH_MAX_UE]; + uint16_t cellId; /*!< Cell ID */ + Inst instIdx; /*!< Index of the scheduler instance */ + Inst macInst; /*!< Index of the MAC instance */ + uint8_t numSlots; /*!< Number of slots in current frame */ + SlotIndInfo slotInfo; /*!< SFN, Slot info being processed*/ + SchDlSlotInfo *schDlSlotInfo[SCH_NUM_SLOTS]; /*!< SCH resource allocations in DL */ + SchUlSlotInfo *schUlSlotInfo[SCH_NUM_SLOTS]; /*!< SCH resource allocations in UL */ + SchCellCfg cellCfg; /*!< Cell ocnfiguration */ + uint8_t ssbStartSymbArr[SCH_MAX_SSB_BEAM]; /*!schDlSlotInfo[slot]; if(dlBrdcstAlloc->ssbTrans) { - scs = cell->cellCfg.ssbSchCfg.scsCommon; ssbStartPrb = cell->cellCfg.ssbSchCfg.ssbOffsetPointA; + ssbStartSymb = cell->ssbStartSymbArr[dlBrdcstAlloc->ssbIdxSupported-1]; /*since we are + supporting only 1 ssb beam */ - memset(ssbStartSymbArr, 0, SCH_MAX_SSB_BEAM); - ssbDlTdAlloc(scs, ssbStartSymbArr); - ssbStartSymb = ssbStartSymbArr[dlBrdcstAlloc->ssbIdxSupported-1]; /*since we are supporting only 1 ssb beam */ /* Assign interface structure */ for(idx=0; idxssbIdxSupported; idx++) { - ssbInfo.ssbIdx = idx; - ssbInfo.fdAlloc.startPrb = ssbStartPrb; - ssbInfo.fdAlloc.numPrb = SCH_SSB_PRB_DURATION; - ssbInfo.tdAlloc.startSymb = ssbStartSymb; - ssbInfo.tdAlloc.numSymb = SCH_SSB_SYMB_DURATION; + ssbInfo.ssbIdx = idx; + ssbInfo.fdAlloc.startPrb = ssbStartPrb; + ssbInfo.fdAlloc.numPrb = SCH_SSB_NUM_PRB; + ssbInfo.tdAlloc.startSymb = ssbStartSymb; + ssbInfo.tdAlloc.numSymb = SCH_SSB_NUM_SYMB; dlBrdcstAlloc->ssbInfo[idx] = ssbInfo; schDlSlotInfo->ssbInfo[idx] = ssbInfo; } schDlSlotInfo->ssbPres = true; schDlSlotInfo->ssbIdxSupported = dlBrdcstAlloc->ssbIdxSupported; - for(idx=ssbStartSymb; idxassignedPrb[idx] = ssbStartPrb + SCH_SSB_PRB_DURATION + 1; /* +1 for kSsb */ + schDlSlotInfo->assignedPrb[idx] = ssbStartPrb + SCH_SSB_NUM_PRB + 1; /* +1 for kSsb */ } } @@ -166,7 +128,7 @@ uint8_t schBroadcastAlloc(SchCellCb *cell, DlBrdcstAlloc *dlBrdcstAlloc, schDlSlotInfo->sib1Pres = true; for(idx=0; idxassignedPrb[idx] = ssbStartPrb + SCH_SSB_PRB_DURATION + 1 + 10; /* 10 PRBs for sib1 */ + schDlSlotInfo->assignedPrb[idx] = ssbStartPrb + SCH_SSB_NUM_PRB + 1 + 10; /* 10 PRBs for sib1 */ } memcpy(&dlBrdcstAlloc->sib1Alloc.bwp, &cell->cellCfg.sib1SchCfg.bwp, sizeof(BwpCfg)); memcpy(&dlBrdcstAlloc->sib1Alloc.sib1PdcchCfg, &cell->cellCfg.sib1SchCfg.sib1PdcchCfg, sizeof(PdcchCfg)); @@ -216,6 +178,7 @@ int sendUlSchInfoToMac(UlSchedInfo *ulSchedInfo, Inst inst) **/ int schPrachResAlloc(SchCellCb *cell, UlSchedInfo *ulSchedInfo, SlotIndInfo prachOccasionTimingInfo) { + uint8_t puschScs; uint8_t numPrachRb = 0; uint8_t numRa = 0; uint8_t freqStart = 0; @@ -230,8 +193,9 @@ int schPrachResAlloc(SchCellCb *cell, UlSchedInfo *ulSchedInfo, SlotIndInfo prac uint8_t idx = 0; SchUlSlotInfo *schUlSlotInfo = NULLP; + puschScs = cell->cellCfg.schInitialUlBwp.bwp.scs; schUlSlotInfo = cell->schUlSlotInfo[prachOccasionTimingInfo.slot]; - prachCfgIdx = cell->cellCfg.schRachCfg.prachCfgIdx; + prachCfgIdx = cell->cellCfg.schRachCfg.prachCfgIdx; /* derive the prachCfgIdx table paramters */ x = prachCfgIdxTable[prachCfgIdx][1]; @@ -260,9 +224,19 @@ int schPrachResAlloc(SchCellCb *cell, UlSchedInfo *ulSchedInfo, SlotIndInfo prac numRa = (cell->cellCfg.schRachCfg.msg1Fdm - 1); for(idx=0; idxcellCfg.schRachCfg.rootSeqIdx) - break; + if(numRbForPrachTable[idx][0] == cell->cellCfg.schRachCfg.rootSeqLen) + { + if(numRbForPrachTable[idx][1] == cell->cellCfg.schRachCfg.prachSubcSpacing) + { + if(numRbForPrachTable[idx][2] == puschScs) + { + break; + } + } + } + } + numPrachRb = numRbForPrachTable[idx][3]; dataType |= SCH_DATATYPE_PRACH; /* Considering first slot in the frame for PRACH */ @@ -328,6 +302,8 @@ uint8_t schUlResAlloc(SchCellCb *cell, Inst schInst) DU_LOG("\nSending UL Sch info from SCH to MAC failed"); } + memset(cell->schUlSlotInfo[ulTimingInfo.slot], 0, sizeof(SchUlSlotInfo)); + return ret; } @@ -356,6 +332,9 @@ uint8_t schDlRsrcAllocMsg4(Msg4Alloc *msg4Alloc, SchCellCb *cell, uint16_t slot) uint8_t offset = 0; uint8_t offsetPointA; uint8_t FreqDomainResource[6] = {0}; + uint16_t tbSize = 0; + uint8_t numPdschSymbols = 12; /* considering pdsch region from 2 to 13 */ + uint8_t mcs = 4; /* MCS fixed to 4 */ SchBwpDlCfg *initialBwp; PdcchCfg *pdcch = &msg4Alloc->msg4PdcchCfg; @@ -382,13 +361,13 @@ uint8_t schDlRsrcAllocMsg4(Msg4Alloc *msg4Alloc, SchCellCb *cell, uint16_t slot) } /* calculate the PRBs */ - calculatePRB( ((offsetPointA-offset)/6), (numRbs/6), FreqDomainResource); + schAllocFreqDomRscType0(((offsetPointA-offset)/6), (numRbs/6), FreqDomainResource); /* fill BWP */ - bwp->BWPSize = initialBwp->bwp.numPrb; - bwp->BWPStart = initialBwp->bwp.firstPrb; - bwp->subcarrierSpacing = initialBwp->bwp.scs; - bwp->cyclicPrefix = initialBwp->bwp.cyclicPrefix; + bwp->freqAlloc.numPrb = initialBwp->bwp.freqAlloc.numPrb; + bwp->freqAlloc.startPrb = initialBwp->bwp.freqAlloc.startPrb; + bwp->subcarrierSpacing = initialBwp->bwp.scs; + bwp->cyclicPrefix = initialBwp->bwp.cyclicPrefix; /* fill the PDCCH PDU */ pdcch->coreset0Cfg.startSymbolIndex = firstSymbol; @@ -425,12 +404,13 @@ uint8_t schDlRsrcAllocMsg4(Msg4Alloc *msg4Alloc, SchCellCb *cell, uint16_t slot) { pdsch->codeword[cwCount].targetCodeRate = 308; pdsch->codeword[cwCount].qamModOrder = 2; - pdsch->codeword[cwCount].mcsIndex = 4; /* mcs configured to 4 */ + pdsch->codeword[cwCount].mcsIndex = mcs; /* mcs configured to 4 */ pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */ pdsch->codeword[cwCount].rvIndex = 0; /* 38.214: Table 5.1.3.2-1, divided by 8 to get the value in bytes */ /* TODO : Calculate tbSize based of DL CCCH msg size */ - pdsch->codeword[cwCount].tbSize = 2664/8; + tbSize = schCalcTbSize(2664/8); /* send this value to the func in bytes when considering msg4 size */ + pdsch->codeword[cwCount].tbSize = tbSize; } pdsch->dataScramblingId = cell->cellCfg.phyCellId; pdsch->numLayers = 1; @@ -442,18 +422,13 @@ uint8_t schDlRsrcAllocMsg4(Msg4Alloc *msg4Alloc, SchCellCb *cell, uint16_t slot) pdsch->dmrs.scid = 0; pdsch->dmrs.numDmrsCdmGrpsNoData = 1; pdsch->dmrs.dmrsPorts = 0; - pdsch->freqAlloc.resourceAlloc = 1; /* RAT type-1 RIV format */ + pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */ /* the RB numbering starts from coreset0, and PDSCH is always above SSB */ - pdsch->freqAlloc.rbStart = offset + SCH_SSB_PRB_DURATION; - /* formula used for calculation of rbSize, 38.213 section 5.1.3.2 * - * Ninfo = S . Nre . R . Qm . v * - * Nre' = Nsc . NsymPdsch - NdmrsSymb - Noh * - * Nre = min(156,Nre') . nPrb */ - /* TODO : Calculate rbSize based on tbSize calculated */ - pdsch->freqAlloc.rbSize = 34; - pdsch->freqAlloc.vrbPrbMapping = 0; /* non-interleaved */ - pdsch->timeAlloc.startSymbolIndex = 2; /* spec-38.214, Table 5.1.2.1-1 */ - pdsch->timeAlloc.numSymbols = 12; + pdsch->pdschFreqAlloc.freqAlloc.startPrb = offset + SCH_SSB_NUM_PRB; + pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize,mcs,numPdschSymbols); + pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */ + pdsch->pdschTimeAlloc.timeAlloc.startSymb = 2; /* spec-38.214, Table 5.1.2.1-1 */ + pdsch->pdschTimeAlloc.timeAlloc.numSymb = 12; pdsch->beamPdschInfo.numPrgs = 1; pdsch->beamPdschInfo.prgSize = 1; pdsch->beamPdschInfo.digBfInterfaces = 0; diff --git a/src/5gnrsch/sch_rach.c b/src/5gnrsch/sch_rach.c index 177c4e0c9..65d3e40b4 100644 --- a/src/5gnrsch/sch_rach.c +++ b/src/5gnrsch/sch_rach.c @@ -240,12 +240,12 @@ uint8_t schProcessRachInd(RachIndInfo *rachInd, Inst schInst) if(ret == ROK) { /* fill RAR info */ - rarInfo->raRnti = raRnti; - rarInfo->tcrnti = rachInd->crnti; - rarInfo->RAPID = rachInd->preambleIdx; - rarInfo->ta = rachInd->timingAdv; - rarInfo->msg3StartRb = msg3StartRb; - rarInfo->msg3NumRb = msg3NumRb; + rarInfo->raRnti = raRnti; + rarInfo->tcrnti = rachInd->crnti; + rarInfo->RAPID = rachInd->preambleIdx; + rarInfo->ta = rachInd->timingAdv; + rarInfo->msg3FreqAlloc.startPrb = msg3StartRb; + rarInfo->msg3FreqAlloc.numPrb = msg3NumRb; } return ret; } @@ -303,13 +303,13 @@ uint8_t schFillRar(RarAlloc *rarAlloc, uint16_t raRnti, uint16_t pci, uint8_t of } /* calculate the PRBs */ - calculatePRB( ((offsetPointA-offset)/6), (numRbs/6), FreqDomainResource); + schAllocFreqDomRscType0(((offsetPointA-offset)/6), (numRbs/6), FreqDomainResource); /* fill BWP */ - bwp->BWPSize = initialBwp->bwp.numPrb; - bwp->BWPStart = initialBwp->bwp.firstPrb; - bwp->subcarrierSpacing = initialBwp->bwp.scs; - bwp->cyclicPrefix = initialBwp->bwp.cyclicPrefix; + bwp->freqAlloc.numPrb = initialBwp->bwp.freqAlloc.numPrb; + bwp->freqAlloc.startPrb = initialBwp->bwp.freqAlloc.startPrb; + bwp->subcarrierSpacing = initialBwp->bwp.scs; + bwp->cyclicPrefix = initialBwp->bwp.cyclicPrefix; /* fill the PDCCH PDU */ pdcch->coreset0Cfg.startSymbolIndex = firstSymbol; @@ -362,12 +362,12 @@ uint8_t schFillRar(RarAlloc *rarAlloc, uint16_t raRnti, uint16_t pci, uint8_t of pdsch->dmrs.scid = 0; pdsch->dmrs.numDmrsCdmGrpsNoData = 1; pdsch->dmrs.dmrsPorts = 0; - pdsch->freqAlloc.resourceAlloc = 1; /* RAT type-1 RIV format */ - pdsch->freqAlloc.rbStart = offset + SCH_SSB_PRB_DURATION; /* the RB numbering starts from coreset0, and PDSCH is always above SSB */ - pdsch->freqAlloc.rbSize = schCalcNumPrb(tbSize,mcs,numPdschSymbols); - pdsch->freqAlloc.vrbPrbMapping = 0; /* non-interleaved */ - pdsch->timeAlloc.startSymbolIndex = initialBwp->pdschCommon.startSymbol; - pdsch->timeAlloc.numSymbols = initialBwp->pdschCommon.lengthSymbol; + pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */ + pdsch->pdschFreqAlloc.freqAlloc.startPrb = offset + SCH_SSB_NUM_PRB; /* the RB numbering starts from coreset0, and PDSCH is always above SSB */ + pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize,mcs,numPdschSymbols); + pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */ + pdsch->pdschTimeAlloc.timeAlloc.startSymb = initialBwp->pdschCommon.startSymbol; + pdsch->pdschTimeAlloc.timeAlloc.numSymb = initialBwp->pdschCommon.lengthSymbol; pdsch->beamPdschInfo.numPrgs = 1; pdsch->beamPdschInfo.prgSize = 1; pdsch->beamPdschInfo.digBfInterfaces = 0; diff --git a/src/5gnrsch/sch_slot_ind.c b/src/5gnrsch/sch_slot_ind.c index bb62aa265..e3fb9d909 100644 --- a/src/5gnrsch/sch_slot_ind.c +++ b/src/5gnrsch/sch_slot_ind.c @@ -161,7 +161,7 @@ uint8_t schProcessSlotInd(SlotIndInfo *slotInd, Inst schInst) { int ret = ROK; uint8_t ssb_rep; - uint16_t sfnSlot = 0; + uint16_t slot, sfnSlot = 0; DlSchedInfo dlSchedInfo; memset(&dlSchedInfo,0,sizeof(DlSchedInfo)); DlBrdcstAlloc *dlBrdcstAlloc = &dlSchedInfo.brdcstAlloc; @@ -181,6 +181,8 @@ uint8_t schProcessSlotInd(SlotIndInfo *slotInd, Inst schInst) sfnSlot = ((dlSchedInfo.schSlotValue.broadcastTime.sfn * 10) + dlSchedInfo.schSlotValue.broadcastTime.slot); + slot = dlSchedInfo.schSlotValue.currentTime.slot; + dlSchedInfo.cellId = cell->cellId; /* Identify SSB ocassion*/ @@ -214,7 +216,8 @@ uint8_t schProcessSlotInd(SlotIndInfo *slotInd, Inst schInst) if(dlBrdcstAlloc->ssbTrans || dlBrdcstAlloc->sib1Trans) { dlSchedInfo.isBroadcastPres = true; - ret = schBroadcastAlloc(cell,dlBrdcstAlloc,dlSchedInfo.schSlotValue.broadcastTime.slot); + slot = dlSchedInfo.schSlotValue.broadcastTime.slot; + ret = schBroadcastAlloc(cell,dlBrdcstAlloc,slot); if(ret != ROK) { DU_LOG("\nschBroadcastAlloc failed"); @@ -225,6 +228,7 @@ uint8_t schProcessSlotInd(SlotIndInfo *slotInd, Inst schInst) /* check for RAR */ if(cell->schDlSlotInfo[dlSchedInfo.schSlotValue.rarTime.slot]->rarInfo != NULLP) { + slot = dlSchedInfo.schSlotValue.rarTime.slot; SCH_ALLOC(rarAlloc, sizeof(RarAlloc)); if(!rarAlloc) { @@ -235,22 +239,22 @@ uint8_t schProcessSlotInd(SlotIndInfo *slotInd, Inst schInst) dlSchedInfo.rarAlloc = rarAlloc; /* RAR info is copied, this was earlier filled in schProcessRachInd */ - memcpy(&rarAlloc->rarInfo,cell->schDlSlotInfo[dlSchedInfo.schSlotValue.rarTime.slot]->rarInfo, \ - sizeof(RarInfo)); + memcpy(&rarAlloc->rarInfo,cell->schDlSlotInfo[slot]->rarInfo, sizeof(RarInfo)); /* pdcch and pdsch data is filled */ schFillRar(rarAlloc, - cell->schDlSlotInfo[dlSchedInfo.schSlotValue.rarTime.slot]->rarInfo->raRnti, + cell->schDlSlotInfo[slot]->rarInfo->raRnti, cell->cellCfg.phyCellId, cell->cellCfg.ssbSchCfg.ssbOffsetPointA); - SCH_FREE(cell->schDlSlotInfo[dlSchedInfo.schSlotValue.rarTime.slot]->rarInfo,sizeof(RarAlloc)); - cell->schDlSlotInfo[dlSchedInfo.schSlotValue.rarTime.slot]->rarInfo = NULLP; + SCH_FREE(cell->schDlSlotInfo[slot]->rarInfo,sizeof(RarAlloc)); + cell->schDlSlotInfo[slot]->rarInfo = NULLP; } /* check for MSG4 */ if(cell->schDlSlotInfo[dlSchedInfo.schSlotValue.msg4Time.slot]->msg4Info != NULLP) { + slot = dlSchedInfo.schSlotValue.msg4Time.slot; SCH_ALLOC(msg4Alloc, sizeof(Msg4Alloc)); if(!msg4Alloc) { @@ -261,13 +265,13 @@ uint8_t schProcessSlotInd(SlotIndInfo *slotInd, Inst schInst) dlSchedInfo.msg4Alloc = msg4Alloc; /* Msg4 info is copied, this was earlier filled in macSchDlRlcBoInfo */ - memcpy(&msg4Alloc->msg4Info, cell->schDlSlotInfo[dlSchedInfo.schSlotValue.msg4Time.slot]->msg4Info, \ + memcpy(&msg4Alloc->msg4Info, cell->schDlSlotInfo[slot]->msg4Info, \ sizeof(Msg4Info)); /* pdcch and pdsch data is filled */ - schDlRsrcAllocMsg4(msg4Alloc, cell, dlSchedInfo.schSlotValue.msg4Time.slot); - SCH_FREE(cell->schDlSlotInfo[dlSchedInfo.schSlotValue.msg4Time.slot]->msg4Info, sizeof(Msg4Info)); - cell->schDlSlotInfo[dlSchedInfo.schSlotValue.msg4Time.slot]->msg4Info = NULL; + schDlRsrcAllocMsg4(msg4Alloc, cell, slot); + SCH_FREE(cell->schDlSlotInfo[slot]->msg4Info, sizeof(Msg4Info)); + cell->schDlSlotInfo[slot]->msg4Info = NULL; } @@ -281,6 +285,8 @@ uint8_t schProcessSlotInd(SlotIndInfo *slotInd, Inst schInst) schUlResAlloc(cell, schInst); + memset(cell->schDlSlotInfo[slot], 0, sizeof(SchDlSlotInfo)); + return ret; } diff --git a/src/5gnrsch/sch_utils.c b/src/5gnrsch/sch_utils.c index b3d038d88..1397c65d8 100644 --- a/src/5gnrsch/sch_utils.c +++ b/src/5gnrsch/sch_utils.c @@ -34,6 +34,7 @@ /* header files */ #include "sch_utils.h" +#include "math.h" /* spec-38.213 Table 13-1 */ int8_t coresetIdxTable[MAX_CORESET_INDEX][4] = { @@ -433,17 +434,17 @@ uint16_t mcsTable[32][3] = { * * @details * - * Function: calculatePRB + * Function: schAllocFreqDomRscType0 * - * This function does allocation in frequency domain resource. using - * bitwise operator, the bits are set for the PRBs. + * This function does allocation in frequency domain resource. + * This is a bitmap defining non-overlapping groups of 6 PRBs in ascending order. * * @param[in] startPrb - start PRB from where the freq alloc starts. * @param[in] prbSize - number of PRBs to be allocted. * @param[in] freqDomain - 6 bytes of info, each bit represents a group of 6 PRB. * @return void **/ -void calculatePRB(uint16_t startPrb, uint16_t prbSize, uint8_t *freqDomain) +void schAllocFreqDomRscType0(uint16_t startPrb, uint16_t prbSize, uint8_t *freqDomain) { uint8_t remBits = prbSize; /* each bit represents 6 PRBs */ uint8_t firstByte = 1; diff --git a/src/5gnrsch/sch_utils.h b/src/5gnrsch/sch_utils.h index 5d86c4eec..b4a3acb88 100644 --- a/src/5gnrsch/sch_utils.h +++ b/src/5gnrsch/sch_utils.h @@ -31,7 +31,9 @@ } /* functions declarations */ -void calculatePRB(uint16_t startPrb, uint16_t prbSize, uint8_t *freqDomain); +void schAllocFreqDomRscType0(uint16_t startPrb, uint16_t prbSize, uint8_t *freqDomain); +uint16_t schCalcTbSize(uint16_t payLoadSize); +uint16_t schCalcNumPrb(uint16_t tbSize, uint16_t mcs, uint8_t numSymbols); extern int8_t coresetIdxTable[MAX_CORESET_INDEX][4]; extern int8_t searchSpaceIdxTable[MAX_SEARCH_SPACE_INDEX][4]; diff --git a/src/cm/du_app_mac_inf.h b/src/cm/du_app_mac_inf.h index 907573c27..e43872547 100644 --- a/src/cm/du_app_mac_inf.h +++ b/src/cm/du_app_mac_inf.h @@ -176,6 +176,7 @@ typedef struct prachCfg RstSetCfg prachRstSetCfg; /* PRACH restricted set config */ uint16_t msg1FreqStart; /* Msg1-FrequencyStart */ uint8_t msg1Fdm; /* PRACH FDM (1,2,4,8) */ + uint8_t rootSeqLen; /* Root sequence length */ PrachFdmInfo fdm[8]; /* FDM info */ uint8_t ssbPerRach; /* SSB per RACH occassion */ Bool prachMultCarrBand; /* Multiple carriers in Band */ @@ -271,22 +272,22 @@ typedef struct bwpUlConfig typedef struct macCellCfg { - U16 transId; - U16 cellId; /* Cell Id */ - U8 numTlv; /* Number of configuration TLVs */ - U8 carrierId; /* Carrired Index */ - U16 phyCellId; /* Physical cell id */ - DuplexMode dupType; /* Duplex type: TDD/FDD */ - CarrierCfg dlCarrCfg; /* DL Carrier configuration */ - CarrierCfg ulCarrCfg; /* UL Carrier configuration */ - Bool freqShft; /* Indicates presence of 7.5kHz frequency shift */ - SsbCfg ssbCfg; /* SSB configuration */ - PrachCfg prachCfg; /* PRACH Configuration */ - TDDCfg tddCfg; /* TDD periodicity and slot configuration */ - RSSIMeasUnit rssiUnit; /* RSSI measurement unit */ - Sib1CellCfg sib1Cfg; - BwpDlConfig initialDlBwp; - BwpUlConfig initialUlBwp; + U16 transId; /* Trans Id */ + U16 cellId; /* Cell Id */ + U8 numTlv; /* Number of configuration TLVs */ + U8 carrierId; /* Carrired Index */ + U16 phyCellId; /* Physical cell id */ + DuplexMode dupType; /* Duplex type: TDD/FDD */ + CarrierCfg dlCarrCfg; /* DL Carrier configuration */ + CarrierCfg ulCarrCfg; /* UL Carrier configuration */ + Bool freqShft; /* Indicates presence of 7.5kHz frequency shift */ + SsbCfg ssbCfg; /* SSB configuration */ + PrachCfg prachCfg; /* PRACH Configuration */ + TDDCfg tddCfg; /* TDD periodicity and slot configuration */ + RSSIMeasUnit rssiUnit; /* RSSI measurement unit */ + Sib1CellCfg sib1Cfg; /* SIB1 config */ + BwpDlConfig initialDlBwp; /* Initial DL BWP */ + BwpUlConfig initialUlBwp; /* Initial UL BWP */ }MacCellCfg; typedef struct macCellCfgCfm diff --git a/src/cm/mac_sch_interface.h b/src/cm/mac_sch_interface.h index 78faf021a..677e846ef 100644 --- a/src/cm/mac_sch_interface.h +++ b/src/cm/mac_sch_interface.h @@ -79,6 +79,19 @@ typedef enum RSP_NOK }schMacRsp; +typedef struct timeDomainAlloc +{ + uint16_t startSymb; + uint16_t numSymb; +}TimeDomainAlloc; + +typedef struct freqDomainAlloc +{ + uint16_t startPrb; + uint16_t numPrb; +}FreqDomainAlloc; + + typedef struct { uint32_t ssbPbchPwr; /* SSB block power */ @@ -91,10 +104,9 @@ typedef struct typedef struct bwpCfg { - uint8_t subcarrierSpacing; - uint8_t cyclicPrefix; - uint16_t BWPSize; - uint16_t BWPStart; + uint8_t subcarrierSpacing; + uint8_t cyclicPrefix; + FreqDomainAlloc freqAlloc; }BwpCfg; typedef struct prg @@ -135,18 +147,16 @@ typedef struct dmrsInfo typedef struct pdschFreqAlloc { - uint8_t resourceAlloc; + uint8_t resourceAllocType; /* since we are using type-1, hence rbBitmap excluded */ - uint16_t rbStart; - uint16_t rbSize; + FreqDomainAlloc freqAlloc; uint8_t vrbPrbMapping; } PdschFreqAlloc; typedef struct pdschTimeAlloc { - uint8_t rowIndex; - uint8_t startSymbolIndex; - uint8_t numSymbols; + uint8_t rowIndex; + TimeDomainAlloc timeAlloc; } PdschTimeAlloc; typedef struct txPowerPdschInfo @@ -157,19 +167,19 @@ typedef struct txPowerPdschInfo typedef struct pdschCfg { - uint16_t pduBitmap; - uint16_t rnti; - uint16_t pduIndex; - uint8_t numCodewords; - CodewordInfo codeword[MAX_CODEWORDS]; - uint16_t dataScramblingId; - uint8_t numLayers; - uint8_t transmissionScheme; - uint8_t refPoint; - DmrsInfo dmrs; - PdschFreqAlloc freqAlloc; - PdschTimeAlloc timeAlloc; - BeamformingInfo beamPdschInfo; + uint16_t pduBitmap; + uint16_t rnti; + uint16_t pduIndex; + uint8_t numCodewords; + CodewordInfo codeword[MAX_CODEWORDS]; + uint16_t dataScramblingId; + uint8_t numLayers; + uint8_t transmissionScheme; + uint8_t refPoint; + DmrsInfo dmrs; + PdschFreqAlloc pdschFreqAlloc; + PdschTimeAlloc pdschTimeAlloc; + BeamformingInfo beamPdschInfo; TxPowerPdschInfo txPdschPower; } PdschCfg; /* SIB1 PDSCH structures end */ @@ -239,26 +249,26 @@ typedef struct typedef struct schRachCfg { - uint8_t prachCfgIdx; /* PRACH config idx */ - uint8_t prachSubcSpacing; /* Subcarrier spacing of RACH */ + uint8_t prachCfgIdx; /* PRACH config idx */ + uint8_t prachSubcSpacing; /* Subcarrier spacing of RACH */ uint16_t msg1FreqStart; /* Msg1-FrequencyStart */ - uint8_t msg1Fdm; /* PRACH FDM (1,2,4,8) */ + uint8_t msg1Fdm; /* PRACH FDM (1,2,4,8) */ + uint8_t rootSeqLen; /* root sequence length */ uint16_t rootSeqIdx; /* Root sequence index */ uint8_t numRootSeq; /* Number of root sequences required for FD */ uint16_t k1; /* Frequency Offset for each FD */ - uint8_t ssbPerRach; /* SSB per RACH occassion */ - uint8_t prachMultCarrBand; /* Presence of Multiple carriers in Band */ - uint8_t raContResTmr; /* RA Contention Resoultion Timer */ - uint8_t rsrpThreshSsb; /* RSRP Threshold SSB */ - uint8_t raRspWindow; /* RA Response Window */ + uint8_t ssbPerRach; /* SSB per RACH occassion */ + uint8_t prachMultCarrBand; /* Presence of Multiple carriers in Band */ + uint8_t raContResTmr; /* RA Contention Resoultion Timer */ + uint8_t rsrpThreshSsb; /* RSRP Threshold SSB */ + uint8_t raRspWindow; /* RA Response Window */ }SchRachCfg; typedef struct schBwpParams { - uint16_t firstPrb; - uint16_t numPrb; - uint8_t scs; - uint8_t cyclicPrefix; + FreqDomainAlloc freqAlloc; + uint8_t scs; + uint8_t cyclicPrefix; }SchBwpParams; typedef struct schCandidatesInfo @@ -317,16 +327,16 @@ typedef struct schBwpUlCfg typedef struct schCellCfg { - uint16_t cellId; /* Cell Id */ - uint16_t phyCellId; /* Physical cell id */ - uint8_t bandwidth; /* Supported B/W */ - DuplexMode dupMode; /* Duplex type: TDD/FDD */ - SchSsbCfg ssbSchCfg; /* SSB config */ - SchSib1Cfg sib1SchCfg; /* SIB1 config */ - SchRachCfg schRachCfg; /* PRACH config */ - SchBwpDlCfg schInitialDlBwp; /* Initial DL BWP */ - SchBwpUlCfg schInitialUlBwp; /* Initial UL BWP */ - uint8_t puschMu; /* PUSCH MU */ + uint16_t cellId; /* Cell Id */ + uint16_t phyCellId; /* Physical cell id */ + uint8_t bandwidth; /* Supported B/W */ + DuplexMode dupMode; /* Duplex type: TDD/FDD */ + SchSsbCfg ssbSchCfg; /* SSB config */ + SchSib1Cfg sib1SchCfg; /* SIB1 config */ + SchRachCfg schRachCfg; /* PRACH config */ + SchBwpDlCfg schInitialDlBwp; /* Initial DL BWP */ + SchBwpUlCfg schInitialUlBwp; /* Initial UL BWP */ + uint8_t puschMu; /* PUSCH MU */ }SchCellCfg; typedef struct schCellCfgCfm @@ -335,21 +345,9 @@ typedef struct schCellCfgCfm schMacRsp rsp; }SchCellCfgCfm; -typedef struct timeDomainAlloc -{ - uint16_t startSymb; - uint16_t numSymb; -}TimeDomainAlloc; - -typedef struct freqDomainAlloc -{ - uint16_t startPrb; - uint16_t numPrb; -}FreqDomainAlloc; - typedef struct ssbInfo { - uint8_t ssbIdx; /* SSB Index */ + uint8_t ssbIdx; /* SSB Index */ TimeDomainAlloc tdAlloc; /* Time domain allocation */ FreqDomainAlloc fdAlloc; /* Freq domain allocation */ }SsbInfo; @@ -389,14 +387,13 @@ typedef struct dlBrdcstAlloc typedef struct rarInfo { - uint16_t raRnti; - uint8_t RAPID; - uint16_t ta; - uint16_t msg3StartRb; - uint8_t msg3NumRb; - uint16_t tcrnti; - uint8_t rarPdu[8]; - uint8_t rarPduLen; + uint16_t raRnti; + uint8_t RAPID; + uint16_t ta; + FreqDomainAlloc msg3FreqAlloc; + uint16_t tcrnti; + uint8_t rarPdu[8]; + uint8_t rarPduLen; }RarInfo; typedef struct rarAlloc diff --git a/src/du_app/du_cfg.c b/src/du_app/du_cfg.c index b1ebacb0d..3afa2c772 100644 --- a/src/du_app/du_cfg.c +++ b/src/du_app/du_cfg.c @@ -186,6 +186,7 @@ S16 readMacCfg() duCfgParam.macCellCfg.prachCfg.prachRstSetCfg = PRACH_RESTRICTED_SET_CFG; duCfgParam.macCellCfg.prachCfg.msg1Fdm = NUM_PRACH_FDM; duCfgParam.macCellCfg.prachCfg.msg1FreqStart = PRACH_FREQ_START; + duCfgParam.macCellCfg.prachCfg.rootSeqLen = ROOT_SEQ_LEN; duCfgParam.macCellCfg.prachCfg.fdm[0].rootSeqIdx = ROOT_SEQ_IDX; duCfgParam.macCellCfg.prachCfg.fdm[0].numRootSeq = NUM_ROOT_SEQ; duCfgParam.macCellCfg.prachCfg.fdm[0].k1 = 1; @@ -273,7 +274,6 @@ S16 readMacCfg() duCfgParam.macCellCfg.initialUlBwp.puschCommon.lengthSymbol = PUSCH_LENGTH_SYMBOL; - /* This should be calculated based on (number of mandatory parameters) + (number of otional parameters being filled) */ duCfgParam.macCellCfg.numTlv = 39; diff --git a/src/du_app/du_cfg.h b/src/du_app/du_cfg.h index 53f8352ca..4a52efba2 100644 --- a/src/du_app/du_cfg.h +++ b/src/du_app/du_cfg.h @@ -27,12 +27,12 @@ /* MACROS */ #define DU_INST 0 #define DU_ID 1 -#define DU_IP_V4_ADDR "192.168.130.81" +#define DU_IP_V4_ADDR "10.0.2.20" #define CU_IP_V4_ADDR "10.0.2.25" -#define RIC_IP_V4_ADDR "192.168.130.80" +#define RIC_IP_V4_ADDR "10.0.2.30" #define DU_PORT 38472 #define CU_PORT 38472 -#define RIC_PORT 36422 +#define RIC_PORT 38482 #define DU_EGTP_PORT 39001 #define CU_EGTP_PORT 39002 #define NR_PCI 1 @@ -96,7 +96,7 @@ #define RA_CONT_RES_TIMER 64 #define RA_RSP_WINDOW 180 #define PRACH_RESTRICTED_SET 0 /* Unrestricted */ - +#define ROOT_SEQ_LEN 139 /* MACRCO Ddefine for PDCCH Configuration */ #define PDCCH_CTRL_RSRC_SET_ZERO 13 /* Control resouce set zero */