From: lal.harshita Date: Sat, 10 Apr 2021 18:50:53 +0000 (+0530) Subject: Fixes for SSB transmission in Radio mode integration [Issue-ID: ODUHIGH-267] X-Git-Url: https://gerrit.o-ran-sc.org/r/gitweb?a=commitdiff_plain;h=2324a199636bc2e127af6bb3beefef668b4f45d7;p=o-du%2Fl2.git Fixes for SSB transmission in Radio mode integration [Issue-ID: ODUHIGH-267] Change-Id: Ic6ff67ff6ec187cddd63d0283b7c1ffc89f0eede Signed-off-by: lal.harshita Signed-off-by: lal.harshita --- diff --git a/src/5gnrmac/lwr_mac.h b/src/5gnrmac/lwr_mac.h index 0d4e04d5a..fff604359 100644 --- a/src/5gnrmac/lwr_mac.h +++ b/src/5gnrmac/lwr_mac.h @@ -66,6 +66,7 @@ typedef struct lwrMacGlobalCb Region region; Pool pool; bool clCfgDone; /* CL configuration done */ + uint8_t phySlotIndCntr; LwrMacCellCb cellCb[MAX_NUM_CELL]; /* List of Cells configured */ uint8_t numCell; /* Number of Cells configured */ PhyState phyState; /* State of PHY */ @@ -273,7 +274,6 @@ LwrMacCellCb * lwrMacGetCellCb ARGS((uint16_t cellId)); uint32_t reverseBits(uint32_t num, uint8_t numBits); void fillDlDciPayload(uint8_t *buf, uint8_t *bytePos, uint8_t *bitPos,\ uint32_t val, uint8_t valSize); -void lwrMacLayerInit(); #endif diff --git a/src/5gnrmac/lwr_mac_ex_ms.c b/src/5gnrmac/lwr_mac_ex_ms.c index f446545f7..052e450c9 100644 --- a/src/5gnrmac/lwr_mac_ex_ms.c +++ b/src/5gnrmac/lwr_mac_ex_ms.c @@ -19,6 +19,7 @@ /* This file is the entry point for Lower MAC */ #include "common_def.h" +#include "lwr_mac_fsm.h" #include "lwr_mac_phy.h" /************************************************************************** @@ -79,7 +80,12 @@ uint8_t lwrMacActvTsk(Pst *pst, Buffer *mBuf) #ifdef INTEL_WLS_MEM case EVT_START_WLS_RCVR: { - SPutMsg(mBuf); + ODU_PUT_MSG_BUF(mBuf); + + /* Allocate memory for intial UL transmission */ + LwrMacEnqueueWlsBlock(); + + /* Start thread to receive from L1 */ DU_LOG("\nINFO --> LWR MAC: Starting WLS receiver thread"); LwrMacRecvPhyMsg(); break; diff --git a/src/5gnrmac/lwr_mac_fsm.c b/src/5gnrmac/lwr_mac_fsm.c index bbef58b7b..164f0388e 100644 --- a/src/5gnrmac/lwr_mac_fsm.c +++ b/src/5gnrmac/lwr_mac_fsm.c @@ -25,7 +25,6 @@ #include "mac_sch_interface.h" #include "lwr_mac_upr_inf.h" #include "mac.h" -#include "lwr_mac_phy.h" #include "lwr_mac.h" #ifdef INTEL_FAPI #include "fapi.h" @@ -35,6 +34,7 @@ #include "wls_lib.h" #endif #include "lwr_mac_fsm.h" +#include "lwr_mac_phy.h" #include "mac_utils.h" #define MIB_SFN_BITMASK 0xFC @@ -47,20 +47,30 @@ #define PDU_PRESENT 1 #define SET_MSG_LEN(x, size) x += size -void fapiMacConfigRsp(uint16_t cellId); -uint8_t UnrestrictedSetNcsTable[MAX_ZERO_CORR_CFG_IDX]; - /* Global variables */ -uint8_t slotIndIdx; -uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo); +LwrMacCb lwrMacCb; + +uint8_t UnrestrictedSetNcsTable[MAX_ZERO_CORR_CFG_IDX]; +void fapiMacConfigRsp(uint16_t cellId); +uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo, p_fapi_api_queue_elem_t headerElem); +uint16_t fillUlTtiReq(SlotIndInfo currTimingInfo, p_fapi_api_queue_elem_t headerElem); -void lwrMacLayerInit() +void lwrMacLayerInit(Region region, Pool pool) { #ifdef INTEL_WLS_MEM - uint8_t idx; + uint8_t idx; +#endif + + memset(&lwrMacCb, 0, sizeof(LwrMacCb)); + lwrMacCb.region = region; + lwrMacCb.pool = pool; + lwrMacCb.clCfgDone = TRUE; + lwrMacCb.numCell = 0; + lwrMacCb.phyState = PHY_STATE_IDLE; +#ifdef INTEL_WLS_MEM /* Initializing WLS free mem list */ - slotIndIdx = 1; + lwrMacCb.phySlotIndCntr = 1; for(idx = 0; idx < WLS_MEM_FREE_PRD; idx++) { cmLListInit(&wlsBlockToFreeList[idx]); @@ -1288,7 +1298,7 @@ uint32_t getParamValue(fapi_uint16_tlv_t *tlv, uint16_t type) ******************************************************************/ void setMibPdu(uint8_t *mibPdu, uint32_t *val, uint16_t sfn) { - *mibPdu |= (((uint8_t)(sfn >> 2)) & MIB_SFN_BITMASK); + *mibPdu |= (((uint8_t)(sfn << 2)) & MIB_SFN_BITMASK); *val = (mibPdu[0] << 24 | mibPdu[1] << 16 | mibPdu[2] << 8); DU_LOG("\nDEBUG --> LWR_MAC: MIB PDU %x", *val); } @@ -2019,7 +2029,13 @@ uint8_t lwr_mac_procConfigReqEvt(void *msg) vendorMsg->config_req_vendor.carrier_aggregation_level = 0; vendorMsg->config_req_vendor.group_hop_flag = 0; vendorMsg->config_req_vendor.sequence_hop_flag = 0; - + vendorMsg->start_req_vendor.sfn = 0; + vendorMsg->start_req_vendor.slot = 0; + vendorMsg->start_req_vendor.mode = 4; +#ifdef DEBUG_MODE + vendorMsg->start_req_vendor.count = 0; + vendorMsg->start_req_vendor.period = 1; +#endif /* Fill FAPI config req */ LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t))); if(!cfgReqQElem) @@ -2280,7 +2296,7 @@ uint8_t lwr_mac_procStartReqEvt(void *msg) fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t)); vendorMsg->start_req_vendor.sfn = 0; vendorMsg->start_req_vendor.slot = 0; - vendorMsg->start_req_vendor.mode = 1; /* for FDD */ + vendorMsg->start_req_vendor.mode = 4; /* for Radio mode */ #ifdef DEBUG_MODE vendorMsg->start_req_vendor.count = 0; vendorMsg->start_req_vendor.period = 1; @@ -2959,7 +2975,7 @@ uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, DlSchedInfo *dlInfo, \ dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pdcchInfo->coresetCfg.precoderGranularity; dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = pdcchInfo->numDlDci; dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = coreSetType; - + /* Calculating PDU length. Considering only one dl dci pdu for now */ dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t); } @@ -3157,7 +3173,7 @@ uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc,MacCellCfg *macCellCfg, /* fill the TLV */ /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */ - pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */ + pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64; pduDesc[pduIndex].tlvs[0].tl.length = macCellCfg->sib1Cfg.sib1PduLen; LWR_MAC_ALLOC(sib1TxdataValue,macCellCfg->sib1Cfg.sib1PduLen); if(sib1TxdataValue == NULLP) @@ -3174,7 +3190,7 @@ uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc,MacCellCfg *macCellCfg, pduDesc[pduIndex].pdu_length = pduLen; #ifdef INTEL_WLS_MEM - addWlsBlockToFree(sib1TxdataValue, macCellCfg->sib1Cfg.sib1PduLen, (slotIndIdx-1)); + addWlsBlockToFree(sib1TxdataValue, macCellCfg->sib1Cfg.sib1PduLen, (lwrMacCb.phySlotIndCntr-1)); #else LWR_MAC_FREE(sib1TxdataValue, macCellCfg->sib1Cfg.sib1PduLen); #endif @@ -3211,7 +3227,7 @@ uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, RarInfo *rarInfo, /* fill the TLV */ /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */ - pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */ + pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64; pduDesc[pduIndex].tlvs[0].tl.length = rarInfo->rarPduLen; LWR_MAC_ALLOC(rarTxdataValue,rarInfo->rarPduLen); if(rarTxdataValue == NULLP) @@ -3230,7 +3246,7 @@ uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, RarInfo *rarInfo, * But since we did not implement WLS, this has to be done here */ #ifdef INTEL_WLS_MEM - addWlsBlockToFree(rarTxdataValue, rarInfo->rarPduLen, (slotIndIdx-1)); + addWlsBlockToFree(rarTxdataValue, rarInfo->rarPduLen, (lwrMacCb.phySlotIndCntr-1)); #else LWR_MAC_FREE(rarTxdataValue, rarInfo->rarPduLen); #endif @@ -3267,7 +3283,7 @@ uint8_t fillDlMsgTxDataReq(fapi_tx_pdu_desc_t *pduDesc, DlMsgInfo *dlMsgInfo, /* fill the TLV */ /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */ - pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */ + pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64; pduDesc[pduIndex].tlvs[0].tl.length = dlMsgInfo->dlMsgPduLen; LWR_MAC_ALLOC(dedMsgTxDataValue, dlMsgInfo->dlMsgPduLen); if(dedMsgTxDataValue == NULLP) @@ -3286,7 +3302,7 @@ uint8_t fillDlMsgTxDataReq(fapi_tx_pdu_desc_t *pduDesc, DlMsgInfo *dlMsgInfo, * But since we did not implement WLS, this has to be done here */ #ifdef INTEL_WLS_MEM - addWlsBlockToFree(dedMsgTxDataValue, dlMsgInfo->dlMsgPduLen, (slotIndIdx-1)); + addWlsBlockToFree(dedMsgTxDataValue, dlMsgInfo->dlMsgPduLen, (lwrMacCb.phySlotIndCntr-1)); #else LWR_MAC_FREE(dedMsgTxDataValue, dlMsgInfo->dlMsgPduLen); #endif @@ -3334,7 +3350,8 @@ uint16_t fillDlTtiReq(SlotIndInfo currTimingInfo) { GET_CELL_IDX(currTimingInfo.cellId, cellIdx); /* consider phy delay */ - ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,PHY_DELTA); + ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,PHY_DELTA_DL); + dlTtiReqTimingInfo.cellId = currTimingInfo.cellId; macCellCfg = macCb.macCell[cellIdx]->macCellCfg; @@ -3469,16 +3486,20 @@ uint16_t fillDlTtiReq(SlotIndInfo currTimingInfo) #ifdef ODU_SLOT_IND_DEBUG_LOG DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request"); #endif - LwrMacSendToL1(headerElem); - + /* Intel L1 expects UL_TTI.request following DL_TTI.request */ + fillUlTtiReq(currTimingInfo, headerElem); /* send Tx-DATA req message */ - sendTxDataReq(currTimingInfo, &currDlSlot->dlInfo); + sendTxDataReq(dlTtiReqTimingInfo, &currDlSlot->dlInfo, headerElem); + LwrMacSendToL1(headerElem); } else { #ifdef ODU_SLOT_IND_DEBUG_LOG DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request"); #endif + + /* Intel L1 expects UL_TTI.request following DL_TTI.request */ + fillUlTtiReq(currTimingInfo, headerElem); LwrMacSendToL1(headerElem); } memset(currDlSlot, 0, sizeof(MacDlSlot)); @@ -3516,7 +3537,7 @@ uint16_t fillDlTtiReq(SlotIndInfo currTimingInfo) * RFAILED - failure * * ****************************************************************/ -uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo) +uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo, p_fapi_api_queue_elem_t headerElem) { #ifdef INTEL_FAPI uint8_t nPdu = 0; @@ -3525,7 +3546,6 @@ uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo) fapi_tx_data_req_t *txDataReq =NULLP; fapi_msg_header_t *msgHeader =NULLP; p_fapi_api_queue_elem_t txDataElem = 0; - p_fapi_api_queue_elem_t headerElem =0; GET_CELL_IDX(currTimingInfo.cellId, cellIdx); @@ -3579,21 +3599,10 @@ uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo) } /* Fill message header */ - LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t))); - if(!headerElem) - { - DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for TxDataReq header"); - LWR_MAC_FREE(txDataElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_tx_data_req_t))); - return RFAILED; - } - FILL_FAPI_LIST_ELEM(headerElem, txDataElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \ - sizeof(fapi_msg_header_t)); - msgHeader = (fapi_msg_header_t *)(headerElem + 1); - msgHeader->num_msg = 1; - msgHeader->handle = 0; - DU_LOG("\nDEBUG --> LWR_MAC: Sending TX DATA Request"); - LwrMacSendToL1(headerElem); + msgHeader = (fapi_msg_header_t *)(headerElem + 1); + msgHeader->num_msg++; + headerElem->p_next->p_next->p_next = txDataElem; } #endif return ROK; @@ -3879,7 +3888,7 @@ void fillPucchPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg,\ * RFAILED - failure * ******************************************************************/ -uint16_t fillUlTtiReq(SlotIndInfo currTimingInfo) +uint16_t fillUlTtiReq(SlotIndInfo currTimingInfo, p_fapi_api_queue_elem_t headerElem) { #ifdef INTEL_FAPI uint16_t cellIdx =0; @@ -3890,7 +3899,6 @@ uint16_t fillUlTtiReq(SlotIndInfo currTimingInfo) fapi_ul_tti_req_t *ulTtiReq = NULLP; fapi_msg_header_t *msgHeader = NULLP; p_fapi_api_queue_elem_t ulTtiElem; - p_fapi_api_queue_elem_t headerElem; if(lwrMacCb.phyState == PHY_STATE_RUNNING) { @@ -3898,7 +3906,7 @@ uint16_t fillUlTtiReq(SlotIndInfo currTimingInfo) macCellCfg = macCb.macCell[cellIdx]->macCellCfg; /* add PHY delta */ - ADD_DELTA_TO_TIME(currTimingInfo,ulTtiReqTimingInfo,PHY_DELTA); + ADD_DELTA_TO_TIME(currTimingInfo,ulTtiReqTimingInfo,PHY_DELTA_UL); currUlSlot = &macCb.macCell[cellIdx]->ulSlot[ulTtiReqTimingInfo.slot % MAX_SLOTS]; LWR_MAC_ALLOC(ulTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_tti_req_t))); @@ -3936,23 +3944,14 @@ uint16_t fillUlTtiReq(SlotIndInfo currTimingInfo) } } - /* Fill message header */ - LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t))); - if(!headerElem) - { - DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for UL TTI req header"); - LWR_MAC_FREE(ulTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_tti_req_t))); - return RFAILED; - } - FILL_FAPI_LIST_ELEM(headerElem, ulTtiElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \ - sizeof(fapi_msg_header_t)); - msgHeader = (fapi_msg_header_t *)(headerElem + 1); - msgHeader->num_msg = 1; - msgHeader->handle = 0; #ifdef ODU_SLOT_IND_DEBUG_LOG DU_LOG("\nDEBUG --> LWR_MAC: Sending UL TTI Request"); #endif - LwrMacSendToL1(headerElem); + + /* Fill message header */ + msgHeader = (fapi_msg_header_t *)(headerElem + 1); + msgHeader->num_msg++; + headerElem->p_next->p_next = ulTtiElem; memset(currUlSlot, 0, sizeof(MacUlSlot)); return ROK; diff --git a/src/5gnrmac/lwr_mac_fsm.h b/src/5gnrmac/lwr_mac_fsm.h index 606e65d11..96cff0582 100644 --- a/src/5gnrmac/lwr_mac_fsm.h +++ b/src/5gnrmac/lwr_mac_fsm.h @@ -29,6 +29,10 @@ #define CORESET_TYPE2 2 #define CORESET_TYPE3 3 +#ifdef INTEL_WLS_MEM +#define WLS_MEM_FREE_PRD 10 /* Free memory after 10 slot ind */ +#endif + #define FILL_FAPI_LIST_ELEM(_currElem, _nextElem, _msgType, _numMsgInBlock, _alignOffset)\ {\ _currElem->msg_type = (uint8_t) _msgType;\ @@ -56,11 +60,11 @@ uint8_t lwr_mac_procStartReqEvt(void *msg); uint8_t lwr_mac_procStopReqEvt(void *msg); void sendToLowerMac(uint16_t, uint32_t, void *); void procPhyMessages(uint16_t msgType, uint32_t msgSize, void *msg); -uint16_t fillUlTtiReq(SlotIndInfo currTimingInfo); uint16_t fillDlTtiReq(SlotIndInfo currTimingInfo); uint16_t fillUlDciReq(SlotIndInfo currTimingInfo); - typedef uint8_t (*lwrMacFsmHdlr)(void *); +void lwrMacLayerInit(Region region, Pool pool); + #endif /********************************************************************** diff --git a/src/5gnrmac/lwr_mac_handle_phy.c b/src/5gnrmac/lwr_mac_handle_phy.c index b07ac4060..54a664395 100644 --- a/src/5gnrmac/lwr_mac_handle_phy.c +++ b/src/5gnrmac/lwr_mac_handle_phy.c @@ -123,15 +123,6 @@ uint8_t procSlotInd(fapi_slot_ind_t *fapiSlotInd) DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed in procSlotInd"); ret = RFAILED; } - -#ifdef INTEL_WLS_MEM - slotIndIdx++; - if(slotIndIdx > WLS_MEM_FREE_PRD) - { - slotIndIdx = 1; - } - freeWlsBlockList(slotIndIdx - 1); -#endif return ret; } diff --git a/src/5gnrmac/lwr_mac_phy.c b/src/5gnrmac/lwr_mac_phy.c index 519de20fd..46d68d5dc 100644 --- a/src/5gnrmac/lwr_mac_phy.c +++ b/src/5gnrmac/lwr_mac_phy.c @@ -25,8 +25,8 @@ #include "mac_sch_interface.h" #include "lwr_mac_upr_inf.h" #include "mac.h" -#include "lwr_mac_phy.h" #include "lwr_mac_fsm.h" +#include "lwr_mac_phy.h" #include "mac_utils.h" #include "lwr_mac_utils.h" #include "lwr_mac.h" @@ -283,7 +283,7 @@ uint8_t LwrMacSendToL1(void *msg) { currMsg = (p_fapi_api_queue_elem_t)msg; msgLen = currMsg->msg_len + sizeof(fapi_api_queue_elem_t); - addWlsBlockToFree(currMsg, msgLen, (slotIndIdx-1)); + addWlsBlockToFree(currMsg, msgLen, (lwrMacCb.phySlotIndCntr-1)); if(currMsg->p_next == NULLP) { DU_LOG("\nERROR --> LWR MAC : There cannot be only one block to send"); @@ -303,7 +303,7 @@ uint8_t LwrMacSendToL1(void *msg) { /* Sending the next msg */ msgLen = currMsg->msg_len + sizeof(fapi_api_queue_elem_t); - addWlsBlockToFree(currMsg, msgLen, (slotIndIdx-1)); + addWlsBlockToFree(currMsg, msgLen, (lwrMacCb.phySlotIndCntr-1)); if(currMsg->p_next != NULLP) { ret = WLS_Put(wlsHdlr, WLS_VA2PA(wlsHdlr, currMsg), msgLen, currMsg->msg_type, WLS_SG_NEXT); diff --git a/src/5gnrmac/lwr_mac_phy.h b/src/5gnrmac/lwr_mac_phy.h index ee1d65f81..456d8c5fa 100644 --- a/src/5gnrmac/lwr_mac_phy.h +++ b/src/5gnrmac/lwr_mac_phy.h @@ -33,7 +33,6 @@ typedef enum }ErrorCode; #ifdef INTEL_WLS_MEM -#define WLS_MEM_FREE_PRD 10 /* Free memory after 10 slot ind */ #define LWR_MAC_WLS_BUF_SIZE 32000 /* Size of WLS memory block */ #define EVT_START_WLS_RCVR 1 @@ -51,7 +50,10 @@ typedef enum /* free a static buffer from WLS memory*/ #define WLS_MEM_FREE(_datPtr, _size) \ if(_datPtr) \ - SPutSBufWls(0, 0, (Data *)_datPtr, _size); + { \ + SPutSBufWls(0, 0, (Data *)_datPtr, _size); \ + _datPtr = NULLP; \ + } typedef struct wlsBlockToFree { @@ -60,7 +62,6 @@ typedef struct wlsBlockToFree }WlsBlockToFree; CmLListCp wlsBlockToFreeList[WLS_MEM_FREE_PRD]; -uint8_t slotIndIdx; void freeWlsBlockList(uint8_t idx); void LwrMacEnqueueWlsBlock(); diff --git a/src/5gnrmac/mac_slot_ind.c b/src/5gnrmac/mac_slot_ind.c index 95a21c259..37cb68751 100644 --- a/src/5gnrmac/mac_slot_ind.c +++ b/src/5gnrmac/mac_slot_ind.c @@ -25,6 +25,7 @@ #include "rlc_mac_inf.h" #include "mac.h" #include "mac_upr_inf_api.h" +#include "lwr_mac.h" #include "lwr_mac_fsm.h" #include "mac_utils.h" @@ -203,7 +204,7 @@ void buildAndSendMuxPdu(SlotIndInfo currTimingInfo) GET_CELL_IDX(currTimingInfo.cellId, cellIdx); - ADD_DELTA_TO_TIME(currTimingInfo, muxTimingInfo, PHY_DELTA); + ADD_DELTA_TO_TIME(currTimingInfo, muxTimingInfo, PHY_DELTA_DL); currDlSlot = &macCb.macCell[cellIdx]->dlSlot[muxTimingInfo.slot]; if(currDlSlot->dlInfo.dlMsgAlloc) { @@ -314,9 +315,8 @@ uint8_t macProcSlotInd(SlotIndInfo slotInd) /* Trigger for DL TTI REQ */ fillDlTtiReq(slotInd); - /* Trigger for UL TTI REQ */ - fillUlTtiReq(slotInd); - + /* TODO : check if this too needs to be sent in sequence with Dl and Ul TTI req. + * If so , move trigger for fillUlDciReq to lower mac */ /* Trigger for UL DCI REQ */ fillUlDciReq(slotInd); @@ -345,7 +345,7 @@ uint8_t fapiMacSlotInd(Pst *pst, SlotIndInfo *slotInd) volatile uint32_t startTime=0; #ifdef ODU_SLOT_IND_DEBUG_LOG - DU_LOG("\nDEBUG --> MAC : Slot Indication received"); + DU_LOG("\nDEBUG --> MAC : Slot Indication received. [%d : %d]", slotInd->sfn, slotInd->slot); #endif /*starting Task*/ ODU_START_TASK(&startTime, PID_MAC_TTI_IND); @@ -387,6 +387,16 @@ uint8_t fapiMacSlotInd(Pst *pst, SlotIndInfo *slotInd) /*stoping Task*/ ODU_STOP_TASK(startTime, PID_MAC_TTI_IND); MAC_FREE_SHRABL_BUF(pst->region, pst->pool, slotInd, sizeof(SlotIndInfo)); + +#ifdef INTEL_WLS_MEM + lwrMacCb.phySlotIndCntr++; + if(lwrMacCb.phySlotIndCntr > WLS_MEM_FREE_PRD) + { + lwrMacCb.phySlotIndCntr = 1; + } + freeWlsBlockList(lwrMacCb.phySlotIndCntr - 1); +#endif + return ret; } /* fapiMacSlotInd */ diff --git a/src/5gnrmac/rg_lmm.c b/src/5gnrmac/rg_lmm.c index 1f22ac366..fc5944759 100755 --- a/src/5gnrmac/rg_lmm.c +++ b/src/5gnrmac/rg_lmm.c @@ -61,12 +61,11 @@ #endif #include "ss_rbuf.h" #include "ss_rbuf.x" -#include "lwr_mac.h" /* MAC CL defines */ #include "mac_sch_interface.h" #include "lwr_mac_upr_inf.h" #include "mac.h" -#include "lwr_mac_phy.h" #include "lwr_mac_fsm.h" +#include "lwr_mac_phy.h" #ifdef __cplusplus extern "C" { @@ -77,7 +76,6 @@ Void rgGetSId ARGS((SystemId *s)); #endif /* __cplusplus */ /* Public variable declaration */ -LwrMacCb lwrMacCb; MacCb macCb; /* forward references */ @@ -186,19 +184,11 @@ Reason reason /* reason */ SAttachSRngBuf(SS_RNG_BUF_ULMAC_TO_ULRLC, SS_RBUF_ENT_ULRLC,SS_RNG_RX); #endif - /* Initializing CL control block */ - memset(&lwrMacCb, 0, sizeof(LwrMacCb)); - lwrMacCb.region = region; - lwrMacCb.pool = 0; - lwrMacCb.clCfgDone = TRUE; - lwrMacCb.numCell = 0; - lwrMacCb.phyState = PHY_STATE_IDLE; - /* Initialize Scheduler as well */ schActvInit(ENTMAC, (DEFAULT_CELLS + SCH_INST_START), DFLT_REGION, PWR_UP); /* Initialize lower mac */ - lwrMacLayerInit(); + lwrMacLayerInit(region, 0); return ROK; @@ -258,8 +248,6 @@ RgMngmt *cfg /* config structure */ #ifdef INTEL_WLS_MEM /* Start WLS message receiver thread */ LwrMacStartWlsRcvr(); - /* Allocate memory for UL transmissions */ - LwrMacEnqueueWlsBlock(); #endif reason = rgLMMGenCfg(inst,&cfg->t.cfg); break; diff --git a/src/5gnrsch/sch.c b/src/5gnrsch/sch.c index 9c10ceb41..881f93a76 100644 --- a/src/5gnrsch/sch.c +++ b/src/5gnrsch/sch.c @@ -831,7 +831,7 @@ void fillSchSib1Cfg(uint8_t bandwidth, uint8_t numSlots, SchSib1Cfg *sib1SchCfg, pdsch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS; pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */ - pdsch->pdschFreqAlloc.freqAlloc.startPrb = offset + SCH_SSB_NUM_PRB; /* the RB numbering starts from coreset0, + pdsch->pdschFreqAlloc.freqAlloc.startPrb = offsetPointA + SCH_SSB_NUM_PRB + 1; /* the RB numbering starts from coreset0, and PDSCH is always above SSB */ pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize,sib1SchCfg->sib1Mcs,numPdschSymbols); pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */ @@ -944,7 +944,7 @@ uint8_t MacSchDlRlcBoInfo(Pst *pst, DlRlcBoInfo *dlBoInfo) return RFAILED; } - slot = (cell->slotInfo.slot + SCHED_DELTA + PHY_DELTA + BO_DELTA) % cell->numSlots; + slot = (cell->slotInfo.slot + SCHED_DELTA + PHY_DELTA_DL + BO_DELTA) % cell->numSlots; schDlSlotInfo = cell->schDlSlotInfo[slot]; SCH_ALLOC(schDlSlotInfo->dlMsgInfo, sizeof(DlMsgInfo)); diff --git a/src/5gnrsch/sch_common.c b/src/5gnrsch/sch_common.c index 22c4dc53a..d92d513ae 100644 --- a/src/5gnrsch/sch_common.c +++ b/src/5gnrsch/sch_common.c @@ -483,7 +483,7 @@ uint8_t schUlResAlloc(SchCellCb *cell, Inst schInst) memset(&ulSchedInfo, 0, sizeof(UlSchedInfo)); /* add PHY delta */ - ADD_DELTA_TO_TIME(cell->slotInfo,ulTimingInfo,PHY_DELTA+SCHED_DELTA); + ADD_DELTA_TO_TIME(cell->slotInfo,ulTimingInfo,PHY_DELTA_UL+SCHED_DELTA); ulSchedInfo.cellId = cell->cellId; ulSchedInfo.slotIndInfo.cellId = ulSchedInfo.cellId; @@ -491,7 +491,8 @@ uint8_t schUlResAlloc(SchCellCb *cell, Inst schInst) ulSchedInfo.slotIndInfo.slot = ulTimingInfo.slot; /* Schedule resources for PRACH */ - schPrachResAlloc(cell, &ulSchedInfo, ulTimingInfo); + if(cell->firstSib1Transmitted) + schPrachResAlloc(cell, &ulSchedInfo, ulTimingInfo); schUlSlotInfo = cell->schUlSlotInfo[ulTimingInfo.slot]; if(schUlSlotInfo->schPuschInfo) diff --git a/src/5gnrsch/sch_rach.c b/src/5gnrsch/sch_rach.c index 079d01af5..2681a0df8 100644 --- a/src/5gnrsch/sch_rach.c +++ b/src/5gnrsch/sch_rach.c @@ -206,7 +206,7 @@ uint8_t schProcessRachInd(RachIndInfo *rachInd, Inst schInst) uint8_t ret = ROK; /* RAR will sent with a delay of RAR_DELAY */ - rarSlot = (rachInd->timingInfo.slot+RAR_DELAY+PHY_DELTA)%cell->numSlots; + rarSlot = (rachInd->timingInfo.slot+RAR_DELAY+PHY_DELTA_DL)%cell->numSlots; SchDlSlotInfo *schDlSlotInfo = cell->schDlSlotInfo[rarSlot]; /* RAR will sent in the next slot */ diff --git a/src/5gnrsch/sch_slot_ind.c b/src/5gnrsch/sch_slot_ind.c index b61bd2927..281cd2112 100644 --- a/src/5gnrsch/sch_slot_ind.c +++ b/src/5gnrsch/sch_slot_ind.c @@ -113,10 +113,10 @@ void schCalcSlotValues(SlotIndInfo slotInd, SchSlotValue *schSlotValue) * on PHY_DELTA + SCHED_DELTA + BO_DELTA * ****************************************************************/ - ADD_DELTA_TO_TIME(slotInd, schSlotValue->currentTime, PHY_DELTA); - ADD_DELTA_TO_TIME(slotInd, schSlotValue->broadcastTime, PHY_DELTA + SCHED_DELTA); - ADD_DELTA_TO_TIME(slotInd, schSlotValue->rarTime, PHY_DELTA + SCHED_DELTA); - ADD_DELTA_TO_TIME(slotInd, schSlotValue->dlMsgTime, PHY_DELTA + SCHED_DELTA); + ADD_DELTA_TO_TIME(slotInd, schSlotValue->currentTime, PHY_DELTA_DL); + ADD_DELTA_TO_TIME(slotInd, schSlotValue->broadcastTime, PHY_DELTA_DL + SCHED_DELTA); + ADD_DELTA_TO_TIME(slotInd, schSlotValue->rarTime, PHY_DELTA_DL + SCHED_DELTA); + ADD_DELTA_TO_TIME(slotInd, schSlotValue->dlMsgTime, PHY_DELTA_DL + SCHED_DELTA); } /******************************************************************* diff --git a/src/cm/common_def.h b/src/cm/common_def.h index 1d3fa7087..9fe214dbf 100644 --- a/src/cm/common_def.h +++ b/src/cm/common_def.h @@ -63,7 +63,8 @@ #define MAX_NUM_DRB 29 /* spec 38.331, maxDRB */ /* 5G ORAN phy delay */ -#define PHY_DELTA 2 +#define PHY_DELTA_DL 1 +#define PHY_DELTA_UL 0 /* SELECTORS */ #define ODU_SELECTOR_LC 0 diff --git a/src/du_app/du_mgr_main.c b/src/du_app/du_mgr_main.c index 13ef27237..9846736ad 100644 --- a/src/du_app/du_mgr_main.c +++ b/src/du_app/du_mgr_main.c @@ -290,13 +290,14 @@ uint8_t commonInit() ODU_SET_PROC_ID(DU_PROC); + /* Intel L1 using core 0-15. ODU-High using 16-21 */ /* system task for DU APP */ if(ODU_CREATE_TASK(PRIOR0, &du_app_stsk) != ROK) { DU_LOG("\nERROR --> DU_APP : System Task creation for DU APP failed"); return RFAILED; } - ODU_SET_THREAD_AFFINITY(&du_app_stsk, SS_AFFINITY_MODE_EXCL, 15, 0); + ODU_SET_THREAD_AFFINITY(&du_app_stsk, SS_AFFINITY_MODE_EXCL, 16, 0); /* system task for EGTP */ if(ODU_CREATE_TASK(PRIOR0, &egtp_stsk) != ROK) @@ -304,7 +305,7 @@ uint8_t commonInit() DU_LOG("\nERROR --> DU_APP : System Task creation for EGTP failed"); return RFAILED; } - ODU_SET_THREAD_AFFINITY(&egtp_stsk, SS_AFFINITY_MODE_EXCL, 16, 0); + ODU_SET_THREAD_AFFINITY(&egtp_stsk, SS_AFFINITY_MODE_EXCL, 17, 0); /* system task for RLC_DL and MAC */ if(ODU_CREATE_TASK(PRIOR0, &rlc_mac_cl_stsk) != ROK) @@ -314,7 +315,7 @@ uint8_t commonInit() } pthread_attr_init(&attr); pthread_attr_setdetachstate(&attr, PTHREAD_CREATE_DETACHED); - ODU_SET_THREAD_AFFINITY(&rlc_mac_cl_stsk, SS_AFFINITY_MODE_EXCL, 17, 0); + ODU_SET_THREAD_AFFINITY(&rlc_mac_cl_stsk, SS_AFFINITY_MODE_EXCL, 18, 0); /* system task for RLC UL */ if(ODU_CREATE_TASK(PRIOR1, &rlc_ul_stsk) != ROK) @@ -322,7 +323,7 @@ uint8_t commonInit() DU_LOG("\nERROR --> DU_APP : System Task creation for RLC UL failed"); return RFAILED; } - ODU_SET_THREAD_AFFINITY(&rlc_ul_stsk, SS_AFFINITY_MODE_EXCL, 18, 0); + ODU_SET_THREAD_AFFINITY(&rlc_ul_stsk, SS_AFFINITY_MODE_EXCL, 19, 0); /* system task for SCTP receiver thread */ if(ODU_CREATE_TASK(PRIOR0, &sctp_stsk) != ROK) @@ -330,7 +331,7 @@ uint8_t commonInit() DU_LOG("\nERROR --> DU_APP : System Task creation for SCTP failed"); return RFAILED; } - ODU_SET_THREAD_AFFINITY(&sctp_stsk, SS_AFFINITY_MODE_EXCL, 19, 0); + ODU_SET_THREAD_AFFINITY(&sctp_stsk, SS_AFFINITY_MODE_EXCL, 20, 0); /* system task for lower-mac receiver thread */ if(ODU_CREATE_TASK(PRIOR0, &lwr_mac_stsk) != ROK) @@ -338,7 +339,7 @@ uint8_t commonInit() DU_LOG("\nERROR --> DU_APP : System Task creation for Lower MAC failed"); return RFAILED; } - ODU_SET_THREAD_AFFINITY(&lwr_mac_stsk, SS_AFFINITY_MODE_EXCL, 20, 0); + ODU_SET_THREAD_AFFINITY(&lwr_mac_stsk, SS_AFFINITY_MODE_EXCL, 21, 0); /* Create TAPA tasks */ if(duAppInit(du_app_stsk) != ROK) diff --git a/src/phy_stub/phy_stub_msg_hdl.c b/src/phy_stub/phy_stub_msg_hdl.c index 98fa2a652..8ee5d1bfa 100644 --- a/src/phy_stub/phy_stub_msg_hdl.c +++ b/src/phy_stub/phy_stub_msg_hdl.c @@ -24,6 +24,7 @@ #include "du_app_mac_inf.h" #include "mac_sch_interface.h" #include "lwr_mac.h" +#include "lwr_mac_fsm.h" #include "lwr_mac_phy.h" #ifdef INTEL_FAPI #include "fapi.h"