return ROK;
}
+uint16_t reverseBytes16(uint16_t num) {
+ return (num >> 8) | (num << 8);
+}
+
+uint32_t reverseBytes32(uint32_t num) {
+ return ((num >> 24) & 0x000000FF) |
+ ((num >> 8) & 0x0000FF00) |
+ ((num << 8) & 0x00FF0000) |
+ ((num << 24) & 0xFF000000);
+}
#ifdef INTEL_FAPI
/*******************************************************************
*
void fillMsgHeader(fapi_msg_t *hdr, uint16_t msgType, uint32_t msgLen)
{
memset(hdr, 0, sizeof(fapi_msg_t));
- hdr->msg_id = msgType;
- hdr->length = msgLen;
+#ifdef OAI_TESTING
+ hdr->msg_id = reverseBytes16(msgType);
+ hdr->length = reverseBytes32(msgLen);
+#else
+ hdr->msg_id = (msgType);
+ hdr->length = (msgLen);
+#endif
}
/*******************************************************************
void fillTlvs(fapi_uint32_tlv_t *tlv, uint16_t tag, uint16_t length,
uint32_t value, uint32_t *msgLen)
{
- tlv->tl.tag = tag;
- tlv->tl.length = length;
- tlv->value = value;
+#ifdef OAI_TESTING
+ tlv->tl.tag = reverseBytes16(tag);
+ tlv->tl.length = reverseBytes16(length);
+ tlv->value = reverseBytes32(value);
+#else
+ tlv->tl.tag = (tag);
+ tlv->tl.length = (length);
+ tlv->value = (value);
+#endif
*msgLen = *msgLen + sizeof(tag) + sizeof(length) + length;
+
}
/*******************************************************************
*
return ROK;
}
#endif
+
+#ifdef OAI_TESTING
+/*******************************************************************
+ *
+ * @brief Build FAPI Config Req as per OAI code and send to PHY
+ *
+ * @details
+ *
+ * Function : buildAndSendOAIConfigReqToL1
+ *
+ * Functionality:
+ * -Build FAPI Config Req as per OAI code and send to PHY
+ *
+ * @params[in] void *msg
+ * @return ROK - success
+ * RFAILED - failure
+ *
+ * ****************************************************************/
+uint8_t buildAndSendOAIConfigReqToL1(void *msg)
+{
+#ifdef INTEL_FAPI
+#ifdef CALL_FLOW_DEBUG_LOG
+ DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : CONFIG_REQ\n");
+#endif
+#ifdef NR_TDD
+ uint8_t slotIdx = 0;
+ uint8_t symbolIdx =0;
+#endif
+ uint8_t totalTlv=0;
+ uint16_t index = 0;
+ uint16_t *cellId =NULLP;
+ uint16_t cellIdx =0;
+ uint32_t msgLen = 0;
+ uint32_t totalCfgReqMsgLen=0;
+ uint32_t mib = 0;
+ uint32_t dlFreq = 0, ulFreq = 0;
+ MacCellCfg macCfgParams;
+ fapi_config_req_t *configReq;
+ fapi_msg_header_t *msgHeader;
+ p_fapi_api_queue_elem_t headerElem;
+ p_fapi_api_queue_elem_t cfgReqQElem;
+
+ DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
+ lwrMacCb.phyState);
+
+ cellId = (uint16_t *)msg;
+ GET_CELL_IDX(*cellId, cellIdx);
+ macCfgParams = macCb.macCell[cellIdx]->macCellCfg;
+
+ /* Fill Cell Configuration in lwrMacCb */
+ memset(&lwrMacCb.cellCb[lwrMacCb.numCell], 0, sizeof(LwrMacCellCb));
+ lwrMacCb.cellCb[lwrMacCb.numCell].cellId = macCfgParams.cellId;
+ lwrMacCb.cellCb[lwrMacCb.numCell].phyCellId = macCfgParams.cellCfg.phyCellId;
+ lwrMacCb.numCell++;
+ uint16_t psize=sizeof(fapi_api_queue_elem_t)+(sizeof(fapi_config_req_t));
+
+#ifndef NR_TDD
+ totalTlv = 24;
+#else
+ //configReq->number_of_tlvs = 25 + 1 + MAX_TDD_PERIODICITY_SLOTS * MAX_SYMB_PER_SLOT;
+ totalTlv = 24 + 1+ MAX_TDD_PERIODICITY_SLOTS * MAX_SYMB_PER_SLOT;
+#endif
+ /* totalCfgReqMsgLen = size of config req's msg header + size of tlv supporting + size of tlv supporting *sizeof(fapi_uint32_tlv_t) */
+ totalCfgReqMsgLen += sizeof(configReq->header) + sizeof( configReq->number_of_tlvs) + totalTlv*sizeof(fapi_uint32_tlv_t);
+
+ /* Fill FAPI config req */
+ LWR_MAC_ALLOC(cfgReqQElem,(sizeof(fapi_api_queue_elem_t)+totalCfgReqMsgLen));
+
+ if(!cfgReqQElem)
+ {
+ DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for config req");
+ return RFAILED;
+ }
+ FILL_FAPI_LIST_ELEM(cfgReqQElem, NULLP, FAPI_CONFIG_REQUEST, 1, totalCfgReqMsgLen);
+ configReq = (fapi_config_req_t *)(cfgReqQElem + 1);
+ memset(configReq, 0, sizeof(fapi_config_req_t));
+ fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, totalCfgReqMsgLen);
+ configReq->number_of_tlvs = totalTlv;
+ msgLen = sizeof(configReq->number_of_tlvs);
+
+ fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG, \
+ sizeof(uint16_t), macCfgParams.carrCfg.dlBw, &msgLen);
+ dlFreq = convertArfcnToFreqKhz(macCfgParams.carrCfg.arfcnDL);
+ fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG, \
+ sizeof(uint32_t), dlFreq, &msgLen);
+ /* Due to bug in Intel FT code, commenting TLVs that are are not
+ * needed to avoid error. Must be uncommented when FT bug is fixed */
+ //fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG, \
+ sizeof(uint16_t), macCfgParams.dlCarrCfg.k0[0], &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_DL_GRIDSIZE_TAG, \
+ sizeof(uint16_t), macCfgParams.dlCarrCfg.gridSize[0], &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_NUM_TX_ANT_TAG, \
+ sizeof(uint16_t), macCfgParams.carrCfg.numTxAnt, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG, \
+ sizeof(uint16_t), macCfgParams.carrCfg.ulBw, &msgLen);
+ ulFreq = convertArfcnToFreqKhz(macCfgParams.carrCfg.arfcnUL);
+ fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG, \
+ sizeof(uint32_t), ulFreq, &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG, \
+ sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG, \
+ sizeof(uint16_t), macCfgParams.ulCarrCfg.gridSize[0], &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_NUM_RX_ANT_TAG, \
+ sizeof(uint16_t), macCfgParams.carrCfg.numRxAnt, &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG, \
+ sizeof(uint8_t), macCfgParams.freqShft, &msgLen);
+
+ /* fill cell config */
+ fillTlvs(&configReq->tlvs[index++], FAPI_PHY_CELL_ID_TAG, \
+ sizeof(uint16_t), macCfgParams.cellCfg.phyCellId, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_FRAME_DUPLEX_TYPE_TAG, \
+ sizeof(uint8_t), macCfgParams.cellCfg.dupType, &msgLen);
+
+ /* fill SSB configuration */
+ fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_POWER_TAG, \
+ sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr, &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG, \
+ sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_SCS_COMMON_TAG, \
+ sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn, &msgLen);
+
+ /* fill PRACH configuration */
+ //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG, \
+ sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG, \
+ sizeof(uint8_t), convertScsValToScsEnum(macCfgParams.prachCfg.prachSubcSpacing), &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG, \
+ sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_NUM_PRACH_FD_OCCASIONS_TAG,
+ sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_CONFIG_INDEX_TAG,
+ sizeof(uint8_t), macCfgParams.prachCfg.prachCfgIdx, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG, \
+ sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx, &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG, \
+ sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_K1_TAG, \
+ sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ZERO_CORR_CONF_TAG , \
+ sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg, &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG, \
+ sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numUnusedRootSeq, &msgLen);
+ /* if(macCfgParams.prachCfg.fdm[0].numUnusedRootSeq)
+ {
+ for(idx = 0; idx < macCfgParams.prachCfg.fdm[0].numUnusedRootSeq; idx++)
+ fillTlvs(&configReq->tlvs[index++], FAPI_UNUSED_ROOT_SEQUENCES_TAG, \
+ sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].unsuedRootSeq[idx], \
+ &msgLen);
+ }
+ else
+ {
+ macCfgParams.prachCfg.fdm[0].unsuedRootSeq = NULL;
+ }*/
+
+ fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PER_RACH_TAG, \
+ sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach, &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
+ sizeof(uint8_t), macCfgParams.prachCfg.prachMultCarrBand, &msgLen);
+
+ /* fill SSB table */
+ fillTlvs(&configReq->tlvs[index++], FAPI_SSB_OFFSET_POINT_A_TAG, \
+ sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA, &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_BETA_PSS_TAG, \
+ sizeof(uint8_t), macCfgParams.ssbCfg.betaPss, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PERIOD_TAG, \
+ sizeof(uint8_t), macCfgParams.ssbCfg.ssbPeriod, &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_SSB_SUBCARRIER_OFFSET_TAG, \
+ sizeof(uint8_t), macCfgParams.ssbCfg.ssbScOffset, &msgLen);
+
+ setMibPdu(macCfgParams.ssbCfg.mibPdu, &mib, 0);
+ fillTlvs(&configReq->tlvs[index++], FAPI_MIB_TAG , \
+ sizeof(uint32_t), mib, &msgLen);
+
+ fillTlvs(&configReq->tlvs[index++], FAPI_SSB_MASK_TAG, \
+ sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0], &msgLen);
+ fillTlvs(&configReq->tlvs[index++], FAPI_BEAM_ID_TAG, \
+ sizeof(uint8_t), macCfgParams.ssbCfg.beamId[0], &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
+ sizeof(uint8_t), macCfgParams.ssbCfg.multCarrBand, &msgLen);
+ //fillTlvs(&configReq->tlvs[index++], FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, \
+ sizeof(uint8_t), macCfgParams.ssbCfg.multCellCarr, &msgLen);
+
+#ifdef NR_TDD
+ /* fill TDD table */
+ fillTlvs(&configReq->tlvs[index++], FAPI_TDD_PERIOD_TAG, \
+ sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod, &msgLen);
+ for(slotIdx =0 ;slotIdx < MAX_TDD_PERIODICITY_SLOTS; slotIdx++)
+ {
+ for(symbolIdx = 0; symbolIdx < MAX_SYMB_PER_SLOT; symbolIdx++)
+ {
+ /*Fill Full-DL Slots as well as DL symbols ini 1st Flexi Slo*/
+ if(slotIdx < macCfgParams.tddCfg.nrOfDlSlots || \
+ (slotIdx == macCfgParams.tddCfg.nrOfDlSlots && symbolIdx < macCfgParams.tddCfg.nrOfDlSymbols))
+ {
+ fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
+ sizeof(uint8_t), DL_SYMBOL, &msgLen);
+ }
+
+ /*Fill Full-FLEXI SLOT and as well as Flexi Symbols in 1 slot preceding FULL-UL slot*/
+ else if(slotIdx < (MAX_TDD_PERIODICITY_SLOTS - macCfgParams.tddCfg.nrOfUlSlots -1) || \
+ (slotIdx == (MAX_TDD_PERIODICITY_SLOTS - macCfgParams.tddCfg.nrOfUlSlots -1) && \
+ symbolIdx < (MAX_SYMB_PER_SLOT - macCfgParams.tddCfg.nrOfUlSymbols)))
+ {
+ fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
+ sizeof(uint8_t), FLEXI_SYMBOL, &msgLen);
+ }
+ /*Fill Partial UL symbols and Full-UL slot*/
+ else
+ {
+ fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
+ sizeof(uint8_t), UL_SYMBOL, &msgLen);
+ }
+ }
+ }
+#endif
+
+ /* fill measurement config */
+ //fillTlvs(&configReq->tlvs[index++], FAPI_RSSI_MEASUREMENT_TAG, \
+ sizeof(uint8_t), macCfgParams.rssiUnit, &msgLen);
+
+ /* fill DMRS Type A Pos */
+ // fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG, \
+ sizeof(uint8_t), macCfgParams.ssbCfg.dmrsTypeAPos, &msgLen);
+
+ /* Fill message header */
+ LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
+ if(!headerElem)
+ {
+ DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
+ LWR_MAC_FREE(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
+ return RFAILED;
+ }
+ FILL_FAPI_LIST_ELEM(headerElem, cfgReqQElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
+ sizeof(fapi_msg_header_t));
+ msgHeader = (fapi_msg_header_t*)(headerElem+1);
+ msgHeader->num_msg = 1; /* Config req msg */
+ msgHeader->handle = 0;
+
+ DU_LOG("\nDEBUG --> LWR_MAC: Sending Config Request to Phy");
+ LwrMacSendToL1(headerElem);
+ return ROK;
+#endif
+}
+#endif
/*******************************************************************
*
uint8_t lwr_mac_procConfigReqEvt(void *msg)
{
+#ifndef OAI_TESTING
#ifdef INTEL_FAPI
#ifdef CALL_FLOW_DEBUG_LOG
DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : CONFIG_REQ\n");
DU_LOG("\nDEBUG --> LWR_MAC: Sending Config Request to Phy");
LwrMacSendToL1(headerElem);
#endif
-
+#else
+ buildAndSendOAIConfigReqToL1(msg);
+#endif
return ROK;
} /* lwr_mac_handleConfigReqEvt */
uint8_t num_msg;
// Can be used for Phy Id or Carrier Id 5G FAPI Table 3-2
uint8_t handle;
- uint8_t pad[2];
+ //uint8_t pad[2];
} fapi_msg_header_t,
*p_fapi_msg_header_t;
// Updated per 5G FAPI
typedef struct {
+#ifdef OAI_TESTING
+ uint8_t numMsg;
+ uint8_t opaque;
+#endif
uint16_t msg_id;
- uint16_t pad;
uint32_t length; // Length of the message body in bytes 5G FAPI Table 3-3
- } fapi_msg_t;
+ //uint16_t pad;
+ }fapi_msg_t;
// Updated per 5G FAPI
typedef struct {
uint16_t tag;
fapi_msg_t header;
uint8_t error_code;
uint8_t number_of_tlvs;
- uint8_t pad[2];
+ //uint8_t pad[2];
fapi_uint16_tlv_t tlvs[FAPI_MAX_NUM_TLVS_PARAMS]; // 5G FAPI Table 3-5
} fapi_param_resp_t;
uint16_t pmIdx;
uint16_t numLayers;
uint16_t numAntPorts;
- uint16_t pad[1];
+ //uint16_t pad[1];
fapi_precoder_weight_t precoderWeight[FAPI_MAX_NUM_LAYERS]; // 5G FAPI Table 3-33
} fapi_precoding_table_t;
typedef struct {
fapi_msg_t header;
uint8_t number_of_tlvs;
- uint8_t pad[3];
+ //uint8_t pad[3];
fapi_uint32_tlv_t tlvs[FAPI_MAX_NUM_TLVS_CONFIG]; // 5G FAPI Table 3-17
- } fapi_config_req_t;
+ } __attribute__((packed)) fapi_config_req_t;
// Updated per 5G FAPI
typedef struct {
uint8_t number_of_inv_tlvs_idle_only;
uint8_t number_of_inv_tlvs_running_only;
uint8_t number_of_missing_tlvs;
- uint8_t pad[3];
+ //uint8_t pad[3];
fapi_uint16_tlv_t tlvs[4 * FAPI_MAX_NUM_TLVS_CONFIG]; // 5G FAPI Table 3-18
// fapi_uint16_tlv_t unsupported_or_invalid_tlvs[FAPI_MAX_NUMBER_UNSUPPORTED_TLVS];
// fapi_uint16_tlv_t invalid_idle_only_tlvs[FAPI_MAX_NUMBER_OF_INVALID_IDLE_ONLY_TLVS];
uint16_t slot;
uint8_t message_id;
uint8_t error_code; // 5G FAPI Table 3-30
- uint8_t pad[2];
+ //uint8_t pad[2];
} fapi_error_ind_t;
// Updated per 5G FAPI
// Updated per 5G FAPI
typedef struct {
uint16_t pmIdx;
- uint8_t pad[2];
+ //uint8_t pad[2];
fapi_bmi_t beamIdx[FAPI_MAX_NUM_DIGBFINTERFACES]; // 5G FAPI Table 3-43 subset
} fapi_pmi_bfi_t;
uint16_t numPrgs;
uint16_t prgSize;
uint8_t digBfInterfaces;
- uint8_t pad[3];
+ //uint8_t pad[3];
fapi_pmi_bfi_t pmi_bfi[FAPI_MAX_NUM_PRGS_PER_TTI]; // 5G FAPI Table 3-43
} fapi_precoding_bmform_t;
uint8_t coreSetType;
uint16_t shiftIndex;
uint8_t precoderGranularity;
- uint8_t pad;
+ //uint8_t pad;
uint16_t numDlDci; // 5G FAPI Table 3-36
fapi_dl_dci_t dlDci[FAPI_MAX_NUMBER_DL_DCI];
} fapi_dl_pdcch_pdu_t;
uint8_t mcsIndex;
uint8_t mcsTable;
uint8_t rvIndex;
- uint8_t pad[2];
+ //uint8_t pad[2];
uint32_t tbSize; // 5G FAPI Table 3-38 Subset
} fapi_codeword_pdu_t;
uint8_t subCarrierSpacing;
uint8_t cyclicPrefix;
uint8_t nrOfCodeWords;
- uint8_t pad[3];
+ //uint8_t pad[3];
fapi_codeword_pdu_t cwInfo[FAPI_MAX_NUMBER_OF_CODEWORDS_PER_PDU];
uint16_t dataScramblingId;
uint8_t nrOfLayers;
uint8_t scid;
uint8_t numDmrsCdmGrpsNoData;
uint8_t resourceAlloc;
- uint8_t pad1;
+ //uint8_t pad1;
uint16_t dlDmrsScramblingId;
uint16_t dmrsPorts;
uint16_t rbStart;
uint8_t mappingType;
uint8_t nrOfDmrsSymbols;
uint8_t dmrsAddPos;
- uint8_t pad2;
+ //uint8_t pad2;
} fapi_dl_pdsch_pdu_t;
// Updated per 5G FAPI
uint16_t scramId;
uint8_t powerControlOffset;
uint8_t powerControlOffsetSs;
- uint8_t pad[2];
+ //uint8_t pad[2];
fapi_precoding_bmform_t preCodingAndBeamforming; // 5G FAPI Table 3-39
} fapi_dl_csi_rs_pdu_t;
// Updated per 5G FAPI
typedef struct {
uint8_t nUe;
- uint8_t pad[3];
+ //uint8_t pad[3];
uint8_t pduIdx[FAPI_MAX_NUMBER_OF_UES_PER_TTI]; // 5G FAPI Subset Table 3-35 and Table 3-44
} fapi_ue_info_t;
uint16_t slot;
uint8_t nPdus;
uint8_t nGroup;
- uint8_t pad[2];
+ //uint8_t pad[2];
fapi_dl_tti_req_pdu_t pdus[FAPI_MAX_PDUS_PER_SLOT]; // 5G FAPI Table 3-35
fapi_ue_info_t ue_grp_info[FAPI_MAX_NUMBER_OF_GROUPS_PER_TTI];
} fapi_dl_tti_req_t;
uint8_t rvIndex;
uint8_t harqProcessId;
uint8_t newDataIndicator;
- uint8_t pad;
+ //uint8_t pad;
uint32_t tbSize;
uint16_t numCb; // 5G FAPI Table 3-47
uint8_t cbPresentAndPosition[2]; // Since the maximum number of Code Blocks per TCB in a CBG is 8 for 1 CW or 4 for 2CW and this is a bit field with pading to align to 32 bits
uint8_t betaOffsetHarqAck;
uint8_t betaOffsetCsi1;
uint8_t betaOffsetCsi2; // 5G FAPI Table 3-48
- uint8_t pad[2];
+ //uint8_t pad[2];
} fapi_pusch_uci_t;
// Updated per 5G FAPI
uint8_t lowPaprGroupNumber;
uint8_t ulPtrsSampleDensity;
uint8_t ulPtrsTimeDensityTransformPrecoding;
- uint8_t pad; // 5G FAPI Table 3-50
+ //uint8_t pad; // 5G FAPI Table 3-50
} fapi_dfts_ofdm_t;
// Updated per 5G FAPI
uint16_t numPrgs;
uint16_t prgSize;
uint8_t digBfInterface;
- uint8_t pad[3];
+ //uint8_t pad[3];
fapi_rx_bfi_t rx_bfi[FAPI_MAX_NUM_PRGS_PER_TTI]; // 5G FAPI Table 3-53
} fapi_ul_rx_bmform_pdu_t;
uint8_t mappingType;
uint8_t nrOfDmrsSymbols;
uint8_t dmrsAddPos;
- uint8_t pad;
+ //uint8_t pad;
fapi_pusch_data_t puschData;
fapi_pusch_uci_t puschUci;
// Updated per 5G FAPI
typedef struct {
uint16_t rnti;
- uint8_t pad1[2];
+ //uint8_t pad1[2];
uint32_t handle;
uint16_t bwpSize;
uint16_t bwpStart;
uint8_t formatType;
uint8_t multiSlotTxIndicator;
uint8_t pi2Bpsk;
- uint8_t pad2;
+ //uint8_t pad2;
uint16_t prbStart;
uint16_t prbSize;
uint8_t startSymbolIndex;
uint8_t freqHopFlag;
uint8_t groupHopFlag;
uint8_t sequenceHopFlag;
- uint8_t pad3;
+ //uint8_t pad3;
uint16_t secondHopPrb;
uint16_t hoppingId;
uint16_t initialCyclicShift;
uint8_t dmrsCyclicShift;
uint8_t srFlag;
uint16_t bitLenHarq;
- uint8_t pad4[2];
+ //uint8_t pad4[2];
uint16_t bitLenCsiPart1;
uint16_t bitLenCsiPart2;
fapi_ul_rx_bmform_pdu_t beamforming; // 5G FAPI Table 3-51
// Updated per 5G FAPI
typedef struct {
uint16_t rnti;
- uint8_t pad[2];
+ //uint8_t pad[2];
uint32_t handle;
uint16_t bwpSize;
uint16_t bwpStart;
uint8_t frequencyHopping;
uint8_t groupOrSequenceHopping;
uint8_t resourceType;
- uint8_t pad1[2];
+ //uint8_t pad1[2];
uint16_t tSrs;
uint16_t tOffset;
fapi_ul_rx_bmform_pdu_t beamforming; // 5G FAPI Table 3-52
uint8_t nUlsch;
uint8_t nUlcch;
uint8_t nGroup;
- uint8_t pad[3];
+ //uint8_t pad[3];
fapi_ul_tti_req_pdu_t pdus[FAPI_MAX_NUMBER_UL_PDUS_PER_TTI]; // 5G FAPI Table 3-44
fapi_ue_info_t ueGrpInfo[FAPI_MAX_NUMBER_OF_GROUPS_PER_TTI];
} fapi_ul_tti_req_t;
uint16_t sfn;
uint16_t slot;
uint8_t numPdus;
- uint8_t pad[3];
+ //uint8_t pad[3];
fapi_dci_pdu_t pdus[FAPI_MAX_NUMBER_UCI_PDUS_PER_SLOT]; // 5G FAPI Table 3-54
} fapi_ul_dci_req_t;
uint16_t sfn;
uint16_t slot;
uint16_t num_pdus;
- uint8_t pad[2];
+ //uint8_t pad[2];
fapi_tx_pdu_desc_t pdu_desc[FAPI_MAX_NUMBER_DL_PDUS_PER_TTI]; // 5G FAPI Table 3-58
} fapi_tx_data_req_t;
uint16_t timingAdvance;
uint16_t rssi;
uint16_t pdu_length;
- uint8_t pad[2];
+ //uint8_t pad[2];
void *pduData; // 5G FAPI Table 3-61 Subset
} fapi_pdu_ind_info_t;
uint16_t sfn;
uint16_t slot;
uint16_t numPdus;
- uint8_t pad[2];
+ //uint8_t pad[2];
fapi_pdu_ind_info_t pdus[FAPI_MAX_NUMBER_OF_ULSCH_PDUS_PER_SLOT]; // 5G FAPI Table 3-61
} fapi_rx_data_indication_t;
uint8_t harqId;
uint8_t tbCrcStatus;
uint8_t ul_cqi;
- uint8_t pad;
+ //uint8_t pad;
uint16_t numCb;
uint16_t timingAdvance;
uint16_t rssi;
uint16_t sfn;
uint16_t slot;
uint16_t numCrcs;
- uint8_t pad[2];
+ //uint8_t pad[2];
fapi_crc_ind_info_t crc[FAPI_MAX_NUMBER_OF_CRCS_PER_SLOT]; // 5G FAPI Table 3-62
} fapi_crc_ind_t;
// Updated per 5G FAPI
typedef struct {
uint8_t harqCrc;
- uint8_t pad;
+ //uint8_t pad;
uint16_t harqBitLen;
uint8_t harqPayload[FAPI_MAX_HARQ_INFO_LEN_BYTES]; // 5G FAPI Table 3-70
} fapi_harq_info_t;
// Updated per 5G FAPI
typedef struct {
uint8_t csiPart1Crc;
- uint8_t pad;
+ //uint8_t pad;
uint16_t csiPart1BitLen;
uint8_t csiPart1Payload[FAPI_MAX_CSI_PART1_DATA_BYTES]; // 5G FAPI Table 3-71
} fapi_csi_p1_info_t;
// Updated per 5G FAPI
typedef struct {
uint8_t csiPart2Crc;
- uint8_t pad;
+ //uint8_t pad;
uint16_t csiPart2BitLen;
uint8_t csiPart2Payload[FAPI_MAX_CSI_PART2_DATA_BYTES]; // 5G FAPI Table 3-72
} fapi_csi_p2_info_t;
typedef struct {
uint8_t srIndication;
uint8_t srConfidenceLevel; // 5G FAPI Table 3-67
- uint8_t pad[2];
+ //uint8_t pad[2];
} fapi_sr_f0f1_info_t;
// Updated per 5G FAPI
// Updated per 5G FAPI
typedef struct {
uint8_t harqCrc;
- uint8_t pad;
+ //uint8_t pad;
uint16_t harqBitLen;
uint8_t harqPayload[FAPI_MAX_HARQ_PAYLOAD_SIZE + 2]; // 5G FAPI Table 3-70
} fapi_harq_f2f3f4_info_t;
uint8_t pduBitmap;
uint8_t pucchFormat;
uint8_t ul_cqi;
- uint8_t pad;
+ //uint8_t pad;
uint16_t rnti;
uint16_t timingAdvance;
uint16_t rssi; // 5G FAPI Table 3-66
uint8_t pduBitmap;
uint8_t pucchFormat;
uint8_t ul_cqi;
- uint8_t pad;
+ //uint8_t pad;
uint16_t rnti;
uint16_t timingAdvance;
uint16_t rssi; // 5G FAPI Table 3-65
- uint8_t pad1[2];
+ //uint8_t pad1[2];
fapi_sr_f0f1_info_t srInfo; // This is included if indicated by the pduBitmap
fapi_harq_f0f1_info_t harqInfo; // This is included if indicated by the pduBitmap
} fapi_uci_o_pucch_f0f1_t;
uint16_t sfn;
uint16_t slot;
uint16_t numUcis; // 5G FAPI Table 3-63
- uint8_t pad[2];
+ //uint8_t pad[2];
fapi_uci_pdu_info_t uciPdu[FAPI_MAX_NUMBER_UCI_PDUS_PER_SLOT];
} fapi_uci_indication_t;
// Updated per 5G FAPI
typedef struct {
uint16_t numRbs;
- uint8_t pad[2];
+ //uint8_t pad[2];
uint8_t rbSNR[FAPI_MAX_NUMBER_RBS]; // 5G FAPI Table 3-73 Subset
} fapi_symb_snr_t;
uint8_t numSymbols;
uint8_t wideBandSnr;
uint8_t numReportedSymbols;
- uint8_t pad;
+ //uint8_t pad;
fapi_symb_snr_t symbSnr[FAPI_MAX_NUMBER_OF_REP_SYMBOLS]; // 5G FAPI Table 3-73 subset
} fapi_srs_pdu_t;
uint16_t sfn;
uint16_t slot;
uint8_t numPdus;
- uint8_t pad[3];
+ //uint8_t pad[3];
fapi_srs_pdu_t srsPdus[FAPI_MAX_NUMBER_SRS_PDUS_PER_SLOT]; // 5G FAPI Table 3-73
} fapi_srs_indication_t;
// Updated per 5G FAPI
typedef struct {
uint8_t preambleIndex;
- uint8_t pad;
+ //uint8_t pad;
uint16_t timingAdvance;
uint32_t preamblePwr; // 5G FAPI Table 3-74 Subset
} fapi_preamble_info_t;
uint16_t sfn;
uint16_t slot;
uint8_t numPdus;
- uint8_t pad[3];
+ //uint8_t pad[3];
fapi_rach_pdu_t rachPdu[FAPI_MAX_NUMBER_RACH_PDUS_PER_SLOT]; // 5G FAPI Table 3-74
} fapi_rach_indication_t;
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