[Epic-ID: ODUHIGH-538][Issue-ID: ODUHIGH-567] Fixes to read MAC Cell configuration... 60/12560/1
authorlal.harshita <Harshita.Lal@radisys.com>
Thu, 22 Feb 2024 07:58:12 +0000 (13:28 +0530)
committerlal.harshita <Harshita.Lal@radisys.com>
Thu, 22 Feb 2024 07:58:33 +0000 (13:28 +0530)
Change-Id: I145e9d41fcfacab7489ddbca44db708a6d796569
Signed-off-by: lal.harshita <Harshita.Lal@radisys.com>
build/config/odu_config.xml
src/cm/du_app_mac_inf.h
src/du_app/du_cfg.c
src/du_app/du_cfg.h

index fa94416..a43b8a3 100644 (file)
       <DEST_F1_EGTP_PORT>2152</DEST_F1_EGTP_PORT>
       <MIN_TEID>1</MIN_TEID>
    </EGTP>
+   <SIB1_PARAMS>
+      <PLMN>
+         <MCC>
+            <PLMN_MCC0>3</PLMN_MCC0>
+            <PLMN_MCC1>1</PLMN_MCC1>
+            <PLMN_MCC2>1</PLMN_MCC2>
+         </MCC>
+         <MNC>
+         <PLMN_MNC0>4</PLMN_MNC0>
+         <PLMN_MNC1>8</PLMN_MNC1>
+         <PLMN_MNC2>0</PLMN_MNC2>
+         </MNC>
+      </PLMN>
+      <TAC>1</TAC>
+      <RANAC>1</RANAC>
+      <CELL_IDENTITY>1</CELL_IDENTITY>
+      <CELL_RESVD_OPUSE>1</CELL_RESVD_OPUSE>
+      <CONN_EST_FAIL_CNT>2</CONN_EST_FAIL_CNT>
+      <CONN_EST_FAIL_OFF_VALID>7</CONN_EST_FAIL_OFF_VALID>
+      <CONN_EST_FAIL_OFFSET>15</CONN_EST_FAIL_OFFSET>
+      <SI_SHED_INFO>
+         <WIN_LEN>0</WIN_LEN>
+         <BROADCAST_STATUS>0</BROADCAST_STATUS>
+         <PERIODICITY>0</PERIODICITY>
+         <SIB_TYPE>0</SIB_TYPE>
+         <SIB1_VALUE_TAG>10</SIB1_VALUE_TAG>
+      </SI_SHED_INFO>
+      <SRV_CELL_CFG_COM_SIB>
+         <NR_SCS>0</NR_SCS>
+         <SSB_POS_INBURST>192</SSB_POS_INBURST>
+         <SSB_PERIODICITY>20</SSB_PERIODICITY>
+         <SSB_PBCH_PWR>0</SSB_PBCH_PWR>
+         <DL_CFG_COMMON>
+            <NR_FREQ_BAND>1</NR_FREQ_BAND>
+            <OFFSET_TO_POINT_A>24</OFFSET_TO_POINT_A>
+            <FREQ_LOC_BW>28875</FREQ_LOC_BW>
+            <SCS_SPEC_CARRIER>
+               <SSB_SUBCARRIER_OFFSET>0</SSB_SUBCARRIER_OFFSET>
+               <NR_SCS>0</NR_SCS>
+               <SCS_BW>20</SCS_BW>
+            </SCS_SPEC_CARRIER>
+            <PDCCH_CFG_COMMON>
+               <PRESENT>2</PRESENT>
+               <CORESET_0_INDEX>0</CORESET_0_INDEX>
+               <SEARCHSPACE_0_INDEX>0</SEARCHSPACE_0_INDEX>
+               <PDCCH_SEARCH_SPACE_ID>1</PDCCH_SEARCH_SPACE_ID>
+               <PDCCH_CTRL_RSRC_SET_ID>0</PDCCH_CTRL_RSRC_SET_ID>
+               <MONITOR_SLOT_PERIOD_OFFSET_PRESENT>1</MONITOR_SLOT_PERIOD_OFFSET_PRESENT>
+               <MONITOR_LIST>
+                  <MONITOR_SYMBOL_IN_SLOT>128</MONITOR_SYMBOL_IN_SLOT>
+                  <MONITOR_SYMBOL_IN_SLOT>0</MONITOR_SYMBOL_IN_SLOT>
+               </MONITOR_LIST>
+               <NUM_CANDIDATE_AGG_LVL_1>7</NUM_CANDIDATE_AGG_LVL_1>
+               <NUM_CANDIDATE_AGG_LVL_2>4</NUM_CANDIDATE_AGG_LVL_2>
+               <NUM_CANDIDATE_AGG_LVL_4>2</NUM_CANDIDATE_AGG_LVL_4>
+               <NUM_CANDIDATE_AGG_LVL_8>1</NUM_CANDIDATE_AGG_LVL_8>
+               <NUM_CANDIDATE_AGG_LVL_16>0</NUM_CANDIDATE_AGG_LVL_16>
+               <SEARCH_SPACE_TYPE>1</SEARCH_SPACE_TYPE>
+               <PDCCH_SEARCH_SPACE_DCI_FORMAT>0</PDCCH_SEARCH_SPACE_DCI_FORMAT>
+               <PDCCH_SEARCH_SPACE_ID_SIB1>1</PDCCH_SEARCH_SPACE_ID_SIB1>
+               <PDCCH_SEARCH_SPACE_ID_PAGING>1</PDCCH_SEARCH_SPACE_ID_PAGING>
+               <PDCCH_SEARCH_SPACE_ID_RA>1</PDCCH_SEARCH_SPACE_ID_RA>
+            </PDCCH_CFG_COMMON>
+            <PDSCH_CFG_COMMON>
+               <PRESENT>2</PRESENT>
+               <NUM_TIME_DOM_RSRS_ALLOC>2</NUM_TIME_DOM_RSRS_ALLOC>
+               <PDSCH_TIME_DOM_RSRC_ALLOC_LIST>
+                  <PDSCH_TIME_DOM_RSRC_ALLOC>
+                     <K0>0</K0>
+                     <MAP_TYPE>0</MAP_TYPE>
+                     <PDSCH_START_SYMBOL>3</PDSCH_START_SYMBOL>
+                     <PDSCH_LENGTH_SYMBOL>11</PDSCH_LENGTH_SYMBOL>
+                  </PDSCH_TIME_DOM_RSRC_ALLOC>
+                  <PDSCH_TIME_DOM_RSRC_ALLOC>
+                     <K0>1</K0>
+                     <MAP_TYPE>0</MAP_TYPE>
+                     <PDSCH_START_SYMBOL>3</PDSCH_START_SYMBOL>
+                     <PDSCH_LENGTH_SYMBOL>11</PDSCH_LENGTH_SYMBOL>
+                  </PDSCH_TIME_DOM_RSRC_ALLOC>
+               </PDSCH_TIME_DOM_RSRC_ALLOC_LIST>
+            </PDSCH_CFG_COMMON>
+            <BCCH_CFG>
+               <MOB_PRD_COEFF>3</MOB_PRD_COEFF>
+            </BCCH_CFG>
+            <PCCH_CFG>
+               <DEFAULT_PAGING_CYCLE>256</DEFAULT_PAGING_CYCLE>
+               <NAND_PAGING_FRAME_OFFSET>1</NAND_PAGING_FRAME_OFFSET>
+               <PAGE_FRAME_OFFSET>0</PAGE_FRAME_OFFSET>
+               <NS>1</NS>
+               <FIRST_PDCCH_MONITORING_TYPE>2</FIRST_PDCCH_MONITORING_TYPE>
+               <FIRST_PDCCH_LIST>
+                  <FIRST_PDCCH_MONITORING_INFO>44</FIRST_PDCCH_MONITORING_INFO>
+               </FIRST_PDCCH_LIST>
+            </PCCH_CFG>
+         </DL_CFG_COMMON>
+         <UL_CFG_COMMON>
+            <NR_FREQ_BAND>1</NR_FREQ_BAND>
+            <UL_P_MAX>23</UL_P_MAX>
+            <FREQ_LOC_BW>28875</FREQ_LOC_BW>
+            <TIME_ALLIGN_TIMER_COMM>7</TIME_ALLIGN_TIMER_COMM>
+            <SCS_SPEC_CARRIER>
+               <SSB_SUBCARRIER_OFFSET>0</SSB_SUBCARRIER_OFFSET>
+               <NR_SCS>0</NR_SCS>
+               <SCS_BW>20</SCS_BW>
+            </SCS_SPEC_CARRIER>
+            <RACH_CFG_COMMON>
+               <PRESENT>2</PRESENT>
+               <PRACH_CONFIG_IDX>16</PRACH_CONFIG_IDX>
+               <MSG_1_FDM>0</MSG_1_FDM>
+               <MAX_NUM_RB>106</MAX_NUM_RB>
+               <PRACH_MAX_PRB>24</PRACH_MAX_PRB>
+               <ZERO_CORRELATION_ZONE_CFG>4</ZERO_CORRELATION_ZONE_CFG>
+               <PRACH_PREAMBLE_RCVD_TGT_PWR>-74</PRACH_PREAMBLE_RCVD_TGT_PWR>
+               <PREAMBLE_TRANS_MAX>10</PREAMBLE_TRANS_MAX>
+               <PWR_RAMPING_STEP>1</PWR_RAMPING_STEP>
+               <RA_RSP_WINDOW>4</RA_RSP_WINDOW>
+               <NUM_RA_PREAMBLE>63</NUM_RA_PREAMBLE>
+               <NUM_SSB_PER_RACH_OCC>4</NUM_SSB_PER_RACH_OCC>
+               <CB_PREAMBLE_PER_SSB>8</CB_PREAMBLE_PER_SSB>
+               <CONT_RES_TIMER>7</CONT_RES_TIMER>
+               <RSRP_THRESHOLD_SSB>31</RSRP_THRESHOLD_SSB>
+               <ROOT_SEQ_IDX_PRESENT>2</ROOT_SEQ_IDX_PRESENT>
+               <ROOT_SEQ_IDX>0</ROOT_SEQ_IDX>
+               <PRACH_SUBCARRIER_SPACING>0</PRACH_SUBCARRIER_SPACING>
+               <PRACH_RESTRICTED_SET_CFG>0</PRACH_RESTRICTED_SET_CFG>
+            </RACH_CFG_COMMON>
+            <PUSCH_CFG_COMMON>
+               <PUSCH_CFG_PRESENT>2</PUSCH_CFG_PRESENT>
+               <PUSCH_MSG3_DELTA_PREAMBLE>0</PUSCH_MSG3_DELTA_PREAMBLE>
+               <PUSCH_P0_NOMINAL_WITH_GRANT>-70</PUSCH_P0_NOMINAL_WITH_GRANT>
+               <NUM_TIME_DOM_RSRC_ALLOC>2</NUM_TIME_DOM_RSRC_ALLOC>
+               <PUSCH_TIME_DOM_RSRC_ALLOC_LIST>
+                  <PUSCH_TIME_DOM_RSRC_ALLOC>
+                     <K2>4</K2>
+                     <MAP_TYPE>0</MAP_TYPE>
+                     <PUSCH_START_SYMBOL>3</PUSCH_START_SYMBOL>
+                     <PUSCH_LENGTH_SYMBOL>11</PUSCH_LENGTH_SYMBOL>
+                  </PUSCH_TIME_DOM_RSRC_ALLOC>
+                  <PUSCH_TIME_DOM_RSRC_ALLOC>
+                     <K2>5</K2>
+                     <MAP_TYPE>0</MAP_TYPE>
+                     <PUSCH_START_SYMBOL>3</PUSCH_START_SYMBOL>
+                     <PUSCH_LENGTH_SYMBOL>11</PUSCH_LENGTH_SYMBOL>
+                  </PUSCH_TIME_DOM_RSRC_ALLOC>
+               </PUSCH_TIME_DOM_RSRC_ALLOC_LIST>
+            </PUSCH_CFG_COMMON>
+            <PUCCH_CFG_COMMON>
+               <PRESENT>2</PRESENT>
+               <PUCCH_RSRC_COMMON>0</PUCCH_RSRC_COMMON>
+               <GRP_HOP>0</GRP_HOP>
+               <PUCCH_P0_NOMINAL>-74</PUCCH_P0_NOMINAL>
+            </PUCCH_CFG_COMMON>
+         </UL_CFG_COMMON>
+         <TDD_UL_DL_CFG_COMMON>
+            <REF_SCS>1</REF_SCS>
+            <TX_PRD>6</TX_PRD>
+            <NUM_DL_SLOTS>7</NUM_DL_SLOTS>
+            <NUM_DL_SYMBOLS>12</NUM_DL_SYMBOLS>
+            <NUM_UL_SLOTS>2</NUM_UL_SLOTS>
+            <NUM_UL_SYMBOLS>1</NUM_UL_SYMBOLS>
+         </TDD_UL_DL_CFG_COMMON>
+      </SRV_CELL_CFG_COM_SIB>
+   </SIB1_PARAMS>
    <F1_DU_SRVD_CELL_INFO>
       <F1_DU_CELL_INFO>
          <F1_CELL_INFO>
          </F1_BRDCST_PLMN_INFO>
       </F1_DU_CELL_INFO>
    </F1_DU_SRVD_CELL_INFO>
-   <F1_RRC_VERSION>
-      <RRC_VER>0</RRC_VER>
-      <EXT_RRC_VER>5</EXT_RRC_VER>
-   </F1_RRC_VERSION>
+   <MIB_PARAMS>
+      <SYS_FRAME_NUM>0</SYS_FRAME_NUM>
+      <SUB_CARR_SPACE>0</SUB_CARR_SPACE>
+      <SSB_SC_OFFSET>0</SSB_SC_OFFSET>
+      <DMRS_TYPEA_POSITION>0</DMRS_TYPEA_POSITION>
+      <CORESET_0_INDEX>0</CORESET_0_INDEX>
+      <SEARCHSPACE_0_INDEX>0</SEARCHSPACE_0_INDEX>
+      <CELL_BARRED>1</CELL_BARRED>
+      <INTRA_FREQ_RESELECT>1</INTRA_FREQ_RESELECT>
+   </MIB_PARAMS>
    <MAC_CELL_CFG>
       <CELL_ID>1</CELL_ID>
       <CARRIER_CFG>
             <F1_SLICE_SUPP_LST>
                <NUM_SUPPORT_SLICE>2</NUM_SUPPORT_SLICE>
                <SNSSAI_LIST>
-                     <NUM_NSSAI>2</NUM_NSSAI>
-                     <LIST>
-                     <SNSSAI>
-                        <SST>1</SST>
-                        <SD_SIZE>
+                  <SNSSAI>
+                     <SST>1</SST>
+                     <SD_SIZE>
                         <SD>2</SD>
                         <SD>3</SD>
                         <SD>4</SD>
-                        </SD_SIZE>
-                     </SNSSAI>
-                     <SNSSAI>
-                        <SST>5</SST>
-                        <SD_SIZE>
+                     </SD_SIZE>
+                  </SNSSAI>
+                  <SNSSAI>
+                     <SST>5</SST>
+                     <SD_SIZE>
                         <SD>6</SD>
                         <SD>7</SD>
                         <SD>8</SD>
-                        </SD_SIZE>
-                     </SNSSAI>
-                     </LIST>
-                  </SNSSAI_LIST>
+                     </SD_SIZE>
+                  </SNSSAI>
+               </SNSSAI_LIST>
             </F1_SLICE_SUPP_LST>
          </PLMN_INFO>
          <NR_PCI>1</NR_PCI>
                      <AGG_LEVEL16>0</AGG_LEVEL16>
                   </CANDIDATE_INFO>
                </SEARCH_SPACE_CFG>
-               <SEARCHSPACE_1_INDEX>1</SEARCHSPACE_1_INDEX>
+               <RA_SEARCH_SPACE_INDEX>1</RA_SEARCH_SPACE_INDEX>
             </PDCCH_CFG_COMMON>
             <PDSCH_CFG_COMMON>
                <NUM_TIME_DOM_RSRC_ALLOC>2</NUM_TIME_DOM_RSRC_ALLOC>
                <PDSCH_COMM_TIME_ALLOC_LIST>
-                  <LIST>
                   <PDSCH_COMM_TIME_ALLOC>
                      <PDSCH_K0_CFG>0</PDSCH_K0_CFG>
                      <PDSCH_MAPPING_TYPE>0</PDSCH_MAPPING_TYPE>
                      <PDSCH_START_SYMBOL>3</PDSCH_START_SYMBOL>
                      <PDSCH_LENGTH_SYMBOL>11</PDSCH_LENGTH_SYMBOL>
                   </PDSCH_COMM_TIME_ALLOC>
-                  </LIST>
                </PDSCH_COMM_TIME_ALLOC_LIST>
             </PDSCH_CFG_COMMON>
          </BWP_DL_CFG>
          <BWP_UL_CFG>
             <BWP_PARAMS>
                <FIRST_PRB>0</FIRST_PRB>
-               <TOTAL_PRB_20MHZ_MU0>106</TOTAL_PRB_20MHZ_MU0>
+               <NUM_PRB>106</NUM_PRB>
                <NR_SCS>0</NR_SCS>
                <NORMAL_CYCLIC_PREFIX>0</NORMAL_CYCLIC_PREFIX>
             </BWP_PARAMS>
             <PUSCH_CFG_COMMON>
                <NUM_TIME_DOM_RSRC_ALLOC>2</NUM_TIME_DOM_RSRC_ALLOC>
                <PUSCH_COMM_TIME_ALLOC_LIST>
-                  <LIST>
                   <PUSCH_COMM_TIME_ALLOC>
-                     <PUSCH_K2_CFG>0</PUSCH_K2_CFG>
+                     <PUSCH_K2_CFG>4</PUSCH_K2_CFG>
                      <PUSCH_MAPPING_TYPE>0</PUSCH_MAPPING_TYPE>
                      <PUSCH_START_SYMBOL>3</PUSCH_START_SYMBOL>
                      <PUSCH_LENGTH_SYMBOL>11</PUSCH_LENGTH_SYMBOL>
                   </PUSCH_COMM_TIME_ALLOC>
                   <PUSCH_COMM_TIME_ALLOC>
-                     <PUSCH_K2_CFG>1</PUSCH_K2_CFG>
+                     <PUSCH_K2_CFG>5</PUSCH_K2_CFG>
                      <PUSCH_MAPPING_TYPE>0</PUSCH_MAPPING_TYPE>
                      <PUSCH_START_SYMBOL>3</PUSCH_START_SYMBOL>
                      <PUSCH_LENGTH_SYMBOL>11</PUSCH_LENGTH_SYMBOL>
                   </PUSCH_COMM_TIME_ALLOC>
-                  </LIST>
                </PUSCH_COMM_TIME_ALLOC_LIST>
             </PUSCH_CFG_COMMON>  
          </BWP_UL_CFG>
       <SSB_CFG>
          <SSB_PBSC_PWR>0</SSB_PBSC_PWR>
          <SCS_CMN>0</SCS_CMN>  <!--SCS_15-->
-         <SSB_OFF_PT_A>24</SSB_OFF_PT_A>
+         <SSB_OFFSET_PT_A>24</SSB_OFFSET_PT_A>
          <SSB_PERIOD>2</SSB_PERIOD>
-         <SSB_SC_OFF>0</SSB_SC_OFF>
-         <SSB_LIST>
+         <SSB_SC_OFFSET>0</SSB_SC_OFFSET>
+         <SSB_MASK_LIST>
             <SSB_MASK>1</SSB_MASK>
-         </SSB_LIST>
-         <NUM_SSB>1</NUM_SSB>
+         </SSB_MASK_LIST>
          <BEAM_LIST>
             <BEAM_ID>0</BEAM_ID>
          </BEAM_LIST>
          <BETA_PSS>0</BETA_PSS>
-         <BCH_PAY_FLAG>1</BCH_PAY_FLAG>
-         <DMRS_TYPE_A_PROS>2</DMRS_TYPE_A_PROS>
+         <BCH_PAYLOAD_FLAG>1</BCH_PAYLOAD_FLAG>
+         <DMRS_TYPE_A_POS>2</DMRS_TYPE_A_POS>
       </SSB_CFG>
       <CSIRS_CFG>
          <CSIRS_FREQ>0</CSIRS_FREQ>
          <PERIODICITY_OFFSET>0</PERIODICITY_OFFSET>
       </CSIRS_CFG>
       <PRACH_CFG>
-         <PRACH_SEQ_LEN>0</PRACH_SEQ_LEN>
-         <NR_SCS>0</NR_SCS>
+         <PRACH_SEQ_LEN>1</PRACH_SEQ_LEN>
+         <NR_SCS>15</NR_SCS>
          <PRACH_CONFIG_IDX>16</PRACH_CONFIG_IDX>
          <NUM_PRACH_FDM>1</NUM_PRACH_FDM>
          <FDM_LIST>
          <RA_RSP_WINDOW>10</RA_RSP_WINDOW>
       </PRACH_CFG>
       <TDD_CFG>
-         <TDD_PERIODICITY>0</TDD_PERIODICITY>
+         <TDD_PERIODICITY>6</TDD_PERIODICITY>
          <NUM_DL_SLOTS>7</NUM_DL_SLOTS>
          <NUM_DL_SYMBOLS>12</NUM_DL_SYMBOLS>
          <NUM_UL_SLOTS>2</NUM_UL_SLOTS>
          <DIGI_AZIMUTH>0</DIGI_AZIMUTH>
       </BEAM_FORM_CFG>
    </MAC_CELL_CFG>
-   <MIB_PARAMS>
-      <SYS_FRAME_NUM>0</SYS_FRAME_NUM>
-      <SUB_CARR_SPACE>0</SUB_CARR_SPACE>
-      <SSB_SC_OFFSET>0</SSB_SC_OFFSET>
-      <DMRS_TYPEA_POSITION>0</DMRS_TYPEA_POSITION>
-      <CORESET_0_INDEX>0</CORESET_0_INDEX>
-      <SEARCHSPACE_0_INDEX>0</SEARCHSPACE_0_INDEX>
-      <CELL_BARRED>1</CELL_BARRED>
-      <INTRA_FREQ_RESELECT>1</INTRA_FREQ_RESELECT>
-   </MIB_PARAMS>
    <SLICE_CFG>
       <NUM_RRM_POLICY>1</NUM_RRM_POLICY>
       <MAC_SLICE_RRM_POLICY>
          </RRM_POLICY_RATIO>
       </MAC_SLICE_RRM_POLICY>
    </SLICE_CFG>
-   <SIB1_PARAMS>
-      <PLMN>
-         <MCC>
-            <PLMN_MCC0>3</PLMN_MCC0>
-            <PLMN_MCC1>1</PLMN_MCC1>
-            <PLMN_MCC2>1</PLMN_MCC2>
-         </MCC>
-         <MNC>
-         <PLMN_MNC0>4</PLMN_MNC0>
-         <PLMN_MNC1>8</PLMN_MNC1>
-         <PLMN_MNC2>0</PLMN_MNC2>
-         </MNC>
-      </PLMN>
-      <TAC>1</TAC>
-      <RANAC>1</RANAC>
-      <CELL_IDENTITY>1</CELL_IDENTITY>
-      <CELL_RESVD_OPUSE>1</CELL_RESVD_OPUSE>
-      <CONN_EST_FAIL_CNT>2</CONN_EST_FAIL_CNT>
-      <CONN_EST_FAIL_OFF_VALID>7</CONN_EST_FAIL_OFF_VALID>
-      <CONN_EST_FAIL_OFFSET>15</CONN_EST_FAIL_OFFSET>
-      <SI_SHED_INFO>
-         <WIN_LEN>0</WIN_LEN>
-         <BROADCAST_STATUS>0</BROADCAST_STATUS>
-         <PERIODICITY>0</PERIODICITY>
-         <SIB_TYPE>0</SIB_TYPE>
-         <SIB1_VALUE_TAG>10</SIB1_VALUE_TAG>
-      </SI_SHED_INFO>
-      <SRV_CELL_CFG_COM_SIB>
-         <NR_SCS>0</NR_SCS>
-         <SSB_POS_INBURST>192</SSB_POS_INBURST>
-         <SSB_PERIODICITY>20</SSB_PERIODICITY>
-         <SSB_PBCH_PWR>0</SSB_PBCH_PWR>
-         <DL_CFG_COMMON>
-            <NR_FREQ_BAND>1</NR_FREQ_BAND>
-            <OFFSET_TO_POINT_A>24</OFFSET_TO_POINT_A>
-            <FREQ_LOC_BW>28875</FREQ_LOC_BW>
-            <SCS_SPEC_CARRIER>
-               <SSB_SUBCARRIER_OFFSET>0</SSB_SUBCARRIER_OFFSET>
-               <NR_SCS>0</NR_SCS>
-               <SCS_BW>20</SCS_BW>
-            </SCS_SPEC_CARRIER>
-            <PDCCH_CFG_COMMON>
-               <PRESENT>2</PRESENT>
-               <CORESET_0_INDEX>0</CORESET_0_INDEX>
-               <SEARCHSPACE_0_INDEX>0</SEARCHSPACE_0_INDEX>
-               <PDCCH_SEARCH_SPACE_ID>1</PDCCH_SEARCH_SPACE_ID>
-               <PDCCH_CTRL_RSRC_SET_ID>0</PDCCH_CTRL_RSRC_SET_ID>
-               <MONITOR_SLOT_PERIOD_OFFSET_PRESENT>1</MONITOR_SLOT_PERIOD_OFFSET_PRESENT>
-               <MONITOR_LIST>
-                  <MONITOR_SYMBOL_IN_SLOT>128</MONITOR_SYMBOL_IN_SLOT>
-                  <MONITOR_SYMBOL_IN_SLOT>0</MONITOR_SYMBOL_IN_SLOT>
-               </MONITOR_LIST>
-               <NUM_CANDIDATE_AGG_LVL_1>7</NUM_CANDIDATE_AGG_LVL_1>
-               <NUM_CANDIDATE_AGG_LVL_2>4</NUM_CANDIDATE_AGG_LVL_2>
-               <NUM_CANDIDATE_AGG_LVL_4>2</NUM_CANDIDATE_AGG_LVL_4>
-               <NUM_CANDIDATE_AGG_LVL_8>1</NUM_CANDIDATE_AGG_LVL_8>
-               <NUM_CANDIDATE_AGG_LVL_16>0</NUM_CANDIDATE_AGG_LVL_16>
-               <SEARCH_SPACE_TYPE>1</SEARCH_SPACE_TYPE>
-               <PDCCH_SEARCH_SPACE_DCI_FORMAT>0</PDCCH_SEARCH_SPACE_DCI_FORMAT>
-               <PDCCH_SEARCH_SPACE_ID_SIB1>1</PDCCH_SEARCH_SPACE_ID_SIB1>
-               <PDCCH_SEARCH_SPACE_ID_PAGING>1</PDCCH_SEARCH_SPACE_ID_PAGING>
-               <PDCCH_SEARCH_SPACE_ID_RA>1</PDCCH_SEARCH_SPACE_ID_RA>
-            </PDCCH_CFG_COMMON>
-            <PDSCH_CFG_COMMON>
-               <PRESENT>2</PRESENT>
-               <NUM_TIME_DOM_RSRS_ALLOC>2</NUM_TIME_DOM_RSRS_ALLOC>
-               <PDSCH_TIME_DOM_RSRC_ALLOC_LIST>
-                  <PDSCH_TIME_DOM_RSRC_ALLOC>
-                     <K0>0</K0>
-                     <MAP_TYPE>0</MAP_TYPE>
-                     <PDSCH_START_SYMBOL>3</PDSCH_START_SYMBOL>
-                     <PDSCH_LENGTH_SYMBOL>11</PDSCH_LENGTH_SYMBOL>
-                  </PDSCH_TIME_DOM_RSRC_ALLOC>
-                  <PDSCH_TIME_DOM_RSRC_ALLOC>
-                     <K0>1</K0>
-                     <MAP_TYPE>0</MAP_TYPE>
-                     <PDSCH_START_SYMBOL>3</PDSCH_START_SYMBOL>
-                     <PDSCH_LENGTH_SYMBOL>11</PDSCH_LENGTH_SYMBOL>
-                  </PDSCH_TIME_DOM_RSRC_ALLOC>
-               </PDSCH_TIME_DOM_RSRC_ALLOC_LIST>
-            </PDSCH_CFG_COMMON>
-            <BCCH_CFG>
-               <MOB_PRD_COEFF>3</MOB_PRD_COEFF>
-            </BCCH_CFG>
-            <PCCH_CFG>
-               <DEFAULT_PAGING_CYCLE>256</DEFAULT_PAGING_CYCLE>
-               <NAND_PAGING_FRAME_OFFSET>1</NAND_PAGING_FRAME_OFFSET>
-               <PAGE_FRAME_OFFSET>0</PAGE_FRAME_OFFSET>
-               <NS>1</NS>
-               <FIRST_PDCCH_MONITORING_TYPE>2</FIRST_PDCCH_MONITORING_TYPE>
-               <FIRST_PDCCH_LIST>
-                  <FIRST_PDCCH_MONITORING_INFO>44</FIRST_PDCCH_MONITORING_INFO>
-               </FIRST_PDCCH_LIST>
-            </PCCH_CFG>
-         </DL_CFG_COMMON>
-         <UL_CFG_COMMON>
-            <NR_FREQ_BAND>1</NR_FREQ_BAND>
-            <UL_P_MAX>23</UL_P_MAX>
-            <FREQ_LOC_BW>28875</FREQ_LOC_BW>
-            <TIME_ALLIGN_TIMER_COMM>7</TIME_ALLIGN_TIMER_COMM>
-            <SCS_SPEC_CARRIER>
-               <SSB_SUBCARRIER_OFFSET>0</SSB_SUBCARRIER_OFFSET>
-               <NR_SCS>0</NR_SCS>
-               <NR_BANDWIDTH>20</NR_BANDWIDTH>
-            </SCS_SPEC_CARRIER>
-            <RACH_CFG_COMMON>
-               <PRESENT>2</PRESENT>
-               <PRACH_CONFIG_IDX>16</PRACH_CONFIG_IDX>
-               <MSG_1_FDM>0</MSG_1_FDM>
-               <MAX_NUM_RB>106</MAX_NUM_RB>
-               <PRACH_MAX_PRB>24</PRACH_MAX_PRB>
-               <ZERO_CORRELATION_ZONE_CFG>4</ZERO_CORRELATION_ZONE_CFG>
-               <PRACH_PREAMBLE_RCVD_TGT_PWR>-74</PRACH_PREAMBLE_RCVD_TGT_PWR>
-               <PREAMBLE_TRANS_MAX>10</PREAMBLE_TRANS_MAX>
-               <PWR_RAMPING_STEP>1</PWR_RAMPING_STEP>
-               <RA_RSP_WINDOW>4</RA_RSP_WINDOW>
-               <NUM_RA_PREAMBLE>63</NUM_RA_PREAMBLE>
-               <NUM_SSB_PER_RACH_OCC>4</NUM_SSB_PER_RACH_OCC>
-               <CB_PREAMBLE_PER_SSB>8</CB_PREAMBLE_PER_SSB>
-               <CONT_RES_TIMER>7</CONT_RES_TIMER>
-               <RSRP_THRESHOLD_SSB>31</RSRP_THRESHOLD_SSB>
-               <ROOT_SEQ_IDX_PRESENT>2</ROOT_SEQ_IDX_PRESENT>
-               <ROOT_SEQ_IDX>0</ROOT_SEQ_IDX>
-               <PRACH_SUBCARRIER_SPACING>0</PRACH_SUBCARRIER_SPACING>
-               <PRACH_RESTRICTED_SET_CFG>0</PRACH_RESTRICTED_SET_CFG>
-            </RACH_CFG_COMMON>
-            <PUSCH_CFG_COMMON>
-               <PUSCH_CFG_PRESENT>2</PUSCH_CFG_PRESENT>
-               <PUSCH_MSG3_DELTA_PREAMBLE>0</PUSCH_MSG3_DELTA_PREAMBLE>
-               <PUSCH_P0_NOMINAL_WITH_GRANT>-70</PUSCH_P0_NOMINAL_WITH_GRANT>
-               <NUM_TIME_DOM_RSRC_ALLOC>2</NUM_TIME_DOM_RSRC_ALLOC>
-               <PUSCH_TIME_DOM_RSRC_ALLOC_LIST>
-                  <PUSCH_TIME_DOM_RSRC_ALLOC>
-                     <K2>4</K2>
-                     <MAP_TYPE>0</MAP_TYPE>
-                     <PUSCH_START_SYMBOL>3</PUSCH_START_SYMBOL>
-                     <PUSCH_LENGTH_SYMBOL>11</PUSCH_LENGTH_SYMBOL>
-                  </PUSCH_TIME_DOM_RSRC_ALLOC>
-                  <PUSCH_TIME_DOM_RSRC_ALLOC>
-                     <K2>5</K2>
-                     <MAP_TYPE>0</MAP_TYPE>
-                     <PUSCH_START_SYMBOL>3</PUSCH_START_SYMBOL>
-                     <PUSCH_LENGTH_SYMBOL>11</PUSCH_LENGTH_SYMBOL>
-                  </PUSCH_TIME_DOM_RSRC_ALLOC>
-               </PUSCH_TIME_DOM_RSRC_ALLOC_LIST>
-            </PUSCH_CFG_COMMON>
-            <PUCCH_CFG_COMMON>
-               <PRESENT>2</PRESENT>
-               <PUCCH_RSRC_COMMON>0</PUCCH_RSRC_COMMON>
-               <GRP_HOP>0</GRP_HOP>
-               <PUCCH_P0_NOMINAL>-74</PUCCH_P0_NOMINAL>
-            </PUCCH_CFG_COMMON>
-         </UL_CFG_COMMON>
-         <TDD_UL_DL_CFG_COMMON>
-            <REF_SCS>1</REF_SCS>
-            <TX_PRD>6</TX_PRD>
-            <NUM_DL_SLOTS>7</NUM_DL_SLOTS>
-            <NUM_DL_SYMBOLS>12</NUM_DL_SYMBOLS>
-            <NUM_UL_SLOTS>2</NUM_UL_SLOTS>
-            <NUM_UL_SYMBOLS>1</NUM_UL_SYMBOLS>
-         </TDD_UL_DL_CFG_COMMON>
-      </SRV_CELL_CFG_COM_SIB>
-   </SIB1_PARAMS>
    <RADIO_FRAME_DURATION>10</RADIO_FRAME_DURATION>
    <MAX_NUM_CELL>2</MAX_NUM_CELL>
    <MAX_NUM_MU>4</MAX_NUM_MU>
index dc13eab..c7db184 100644 (file)
 #define NUM_SSB                1       /* max value is 64 */
 #define SSB_MASK_SIZE  1       /* SSB mask size is 32bit for sub6 */
 #define SIB1_REPETITION_PERIOD   20
-#define CORESET_0_INDEX      0
 #define CORESET_1_INDEX      1
 #define CORESET_2_INDEX      2
 #define CORESET_3_INDEX      3
 #define CORESET_4_INDEX      4
 #define SEARCHSPACE_0_INDEX   0
-#define SEARCHSPACE_1_INDEX   1
 #define SEARCHSPACE_2_INDEX   2
 #define SEARCHSPACE_3_INDEX   3
 #define SEARCHSPACE_4_INDEX   4
-#define SS_MONITORING_SLOT_SL1   0 /* all slots */
-#define SS_MONITORING_SYMBOL     0x2000; /* symbol-0, set 14th bit */
 
 /* Macro for Ue Context */
 #define MAX_NUM_SR_CFG_PER_CELL_GRP 8   /* Max number of scheduling request config per cell group */
index 9f50ac0..f73c392 100644 (file)
@@ -71,264 +71,6 @@ extern NRCellDU cellParams;
 
 char encBuf[ENC_BUF_MAX_LEN];
 
-
-/* Filling Slot configuration as :
- * Slot Sym 0 Sym 1 Sym 2 Sym 3 Sym 4 Sym 5 Sym 6 Sym 7 Sym 8 Sym 9 Sym10 Sym11 Sym12 Sym13
- *   0   DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL
- *   1   DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL
- *   2   DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL
-     3   DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL
-     4   DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL
-     5   DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL
-     6   DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL
-     7   DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    DL    F     UL
-     8   UL    UL    UL    UL    UL    UL    UL    UL    UL    UL    UL    UL    UL    UL
-     9   UL    UL    UL    UL    UL    UL    UL    UL    UL    UL    UL    UL    UL    UL  
- */
-
-/*******************************************************************
- * @brief Reads the CL Configuration.
- *
- * @details
- *
- *    Function : readMacCfg
- *
- *    Functionality:
- *       - Fills up the cell configuration for CL.
- *       - Calls FillSlotConfig()  
- *
- * @params[in] void
- * @return ROK     - success
- *         RFAILED - failure
- *
- * ****************************************************************/
-
-uint8_t readMacCfg()
-{
-   uint8_t idx=0, sliceIdx=0,plmnIdx = 0;
-   SupportedSliceList *taiSliceSuppLst;
-
-   /* DL carrier configuration */
-#ifdef O1_ENABLE
-   duCfgParam.macCellCfg.cellId = cellParams.cellLocalId;
-   duCfgParam.macCellCfg.carrCfg.dlBw = cellParams.bSChannelBwDL;
-   duCfgParam.macCellCfg.carrCfg.arfcnDL = cellParams.arfcnDL;
-#else
-   duCfgParam.macCellCfg.cellId = NR_CELL_ID;
-   duCfgParam.macCellCfg.carrCfg.dlBw = NR_BANDWIDTH;
-   duCfgParam.macCellCfg.carrCfg.arfcnDL  = NR_DL_ARFCN;
-#endif
-   duCfgParam.macCellCfg.carrCfg.numTxAnt = NUM_TX_ANT;
-   /* UL Carrier configuration */
-#ifdef O1_ENABLE
-   duCfgParam.macCellCfg.carrCfg.ulBw = cellParams.bSChannelBwUL;
-   duCfgParam.macCellCfg.carrCfg.arfcnUL = cellParams.arfcnUL;
-#else   
-   duCfgParam.macCellCfg.carrCfg.ulBw = NR_BANDWIDTH;
-   duCfgParam.macCellCfg.carrCfg.arfcnUL =  NR_UL_ARFCN;
-#endif   
-   duCfgParam.macCellCfg.carrCfg.numRxAnt = NUM_RX_ANT;
-
-   /* Cell configuration */
-#ifdef O1_ENABLE
-   duCfgParam.macCellCfg.cellCfg.opState    = cellParams.operationalState;
-   duCfgParam.macCellCfg.cellCfg.adminState = cellParams.administrativeState;
-   duCfgParam.macCellCfg.cellCfg.cellState  = cellParams.cellState;
-   duCfgParam.macCellCfg.cellCfg.phyCellId  = cellParams.nRPCI;
-   duCfgParam.macCellCfg.cellCfg.tac        = cellParams.nRTAC;
-   duCfgParam.macCellCfg.cellCfg.ssbFreq    = cellParams.ssbFrequency;
-#else
-   duCfgParam.macCellCfg.cellCfg.opState    = OP_DISABLED; 
-   duCfgParam.macCellCfg.cellCfg.adminState = ADMIN_UNLOCKED;
-   duCfgParam.macCellCfg.cellCfg.cellState  = CELL_INACTIVE;
-   duCfgParam.macCellCfg.cellCfg.phyCellId  = NR_PCI;
-   duCfgParam.macCellCfg.cellCfg.tac        = DU_TAC; 
-   duCfgParam.macCellCfg.cellCfg.ssbFreq    = SSB_FREQUENCY;
-#endif
-   /* Plmn And SNSSAI Configuration */
-   for(plmnIdx = 0; plmnIdx < MAX_PLMN; plmnIdx++)
-   {
-      memcpy(&duCfgParam.macCellCfg.cellCfg.plmnInfoList[plmnIdx].plmn, &duCfgParam.srvdCellLst[0].duCellInfo.cellInfo.srvdPlmn[plmnIdx].plmn,\
-            sizeof(Plmn));
-      taiSliceSuppLst = &duCfgParam.srvdCellLst[0].duCellInfo.cellInfo.srvdPlmn[plmnIdx].taiSliceSuppLst;
-      duCfgParam.macCellCfg.cellCfg.plmnInfoList[plmnIdx].suppSliceList.numSupportedSlices = taiSliceSuppLst->numSupportedSlices;
-      if(taiSliceSuppLst->snssai)
-      {
-         DU_ALLOC_SHRABL_BUF(duCfgParam.macCellCfg.cellCfg.plmnInfoList[plmnIdx].suppSliceList.snssai, (duCfgParam.macCellCfg.cellCfg.plmnInfoList[plmnIdx].suppSliceList.numSupportedSlices) * sizeof(Snssai*));
-         if(duCfgParam.macCellCfg.cellCfg.plmnInfoList[plmnIdx].suppSliceList.snssai == NULLP)
-         {
-            DU_LOG("\nERROR  --> DU_APP: Memory allocation failed at readMacCfg");
-            return RFAILED;
-         }
-      }
-      for(sliceIdx=0; sliceIdx < taiSliceSuppLst->numSupportedSlices; sliceIdx++)
-      {
-         if(taiSliceSuppLst->snssai[sliceIdx] != NULLP)
-         {
-            DU_ALLOC_SHRABL_BUF(duCfgParam.macCellCfg.cellCfg.plmnInfoList[plmnIdx].suppSliceList.snssai[sliceIdx], sizeof(Snssai));
-            if(duCfgParam.macCellCfg.cellCfg.plmnInfoList[plmnIdx].suppSliceList.snssai[sliceIdx] == NULLP)
-            {
-               DU_LOG("\nERROR  --> DU_APP: Memory allocation failed at readMacCfg");
-               return RFAILED;
-            }
-            memcpy(duCfgParam.macCellCfg.cellCfg.plmnInfoList[plmnIdx].suppSliceList.snssai[sliceIdx], taiSliceSuppLst->snssai[sliceIdx], sizeof(Snssai));
-         }
-      }
-   }
-   duCfgParam.macCellCfg.cellCfg.subCarrSpacing = NR_SCS;
-   duCfgParam.macCellCfg.cellCfg.dupType    = DUPLEX_MODE;
-
-   /* SSB configuration */
-   duCfgParam.macCellCfg.ssbCfg.ssbPbchPwr = SSB_PBCH_PWR;
-   duCfgParam.macCellCfg.ssbCfg.bchPayloadFlag = BCH_PAYLOAD;
-   duCfgParam.macCellCfg.ssbCfg.ssbOffsetPointA = OFFSET_TO_POINT_A;
-   duCfgParam.macCellCfg.ssbCfg.betaPss = BETA_PSS;
-#ifdef O1_ENABLE
-   duCfgParam.macCellCfg.ssbCfg.scsCmn = convertScsValToScsEnum(cellParams.ssbSubCarrierSpacing);
-   duCfgParam.macCellCfg.ssbCfg.ssbPeriod = convertSSBPeriodicityToEnum(cellParams.ssbPeriodicity);
-   duCfgParam.macCellCfg.ssbCfg.ssbScOffset = cellParams.ssbOffset;
-#else
-   duCfgParam.macCellCfg.ssbCfg.scsCmn = NR_SCS;
-   duCfgParam.macCellCfg.ssbCfg.ssbPeriod = SSB_PRDCTY_MS_20;
-   duCfgParam.macCellCfg.ssbCfg.ssbScOffset = SSB_SUBCARRIER_OFFSET;
-#endif
-   duCfgParam.macCellCfg.ssbCfg.ssbMask[0] = 1; /* only one SSB is transmitted */
-   if(BuildMibPdu() != ROK)
-   {
-      DU_LOG("\nERROR  -->  Failed to build MIB PDU");
-      memset(&duCfgParam.macCellCfg.ssbCfg.mibPdu, 0, 3*sizeof(uint8_t));
-   }
-   else
-   {
-      memcpy(&duCfgParam.macCellCfg.ssbCfg.mibPdu, encBuf,encBufSize);
-   }
-
-   /* PRACH configuration */
-   duCfgParam.macCellCfg.prachCfg.prachSeqLen = PRACH_SEQ_LEN;
-   duCfgParam.macCellCfg.prachCfg.prachSubcSpacing = convertScsEnumValToScsVal(PRACH_SUBCARRIER_SPACING);
-   duCfgParam.macCellCfg.prachCfg.prachCfgIdx = PRACH_CONFIG_IDX;
-   duCfgParam.macCellCfg.prachCfg.msg1Fdm = NUM_PRACH_FDM;
-   duCfgParam.macCellCfg.prachCfg.fdm[0].rootSeqIdx = ROOT_SEQ_IDX;
-   duCfgParam.macCellCfg.prachCfg.fdm[0].numRootSeq = NUM_ROOT_SEQ;
-   duCfgParam.macCellCfg.prachCfg.fdm[0].k1 = 0;
-   duCfgParam.macCellCfg.prachCfg.fdm[0].zeroCorrZoneCfg = ZERO_CORRELATION_ZONE_CFG;
-   duCfgParam.macCellCfg.prachCfg.prachRstSetCfg = PRACH_RESTRICTED_SET_CFG;
-   duCfgParam.macCellCfg.prachCfg.ssbPerRach = SSB_PER_RACH;
-   duCfgParam.macCellCfg.prachCfg.msg1FreqStart = PRACH_FREQ_START;
-
-   duCfgParam.macCellCfg.prachCfg.totalNumRaPreamble = NUM_RA_PREAMBLE;
-   duCfgParam.macCellCfg.prachCfg.numCbPreamblePerSsb = CB_PREAMBLE_PER_SSB;
-   duCfgParam.macCellCfg.prachCfg.raRspWindow = RA_RSP_WINDOW;
-   
-   /* TDD configuration */
-#ifdef NR_TDD   
-   duCfgParam.macCellCfg.tddCfg.tddPeriod = TDD_PERIODICITY;
-   duCfgParam.macCellCfg.tddCfg.nrOfDlSlots = NUM_DL_SLOTS;
-   duCfgParam.macCellCfg.tddCfg.nrOfDlSymbols = NUM_DL_SYMBOLS;
-   duCfgParam.macCellCfg.tddCfg.nrOfUlSlots = NUM_UL_SLOTS;
-   duCfgParam.macCellCfg.tddCfg.nrOfUlSymbols = NUM_UL_SYMBOLS;
-
-   //FillSlotConfig();
-
-#endif
-
-   /* fill SIB1 configuration */
-   duCfgParam.macCellCfg.cellCfg.sib1Cfg.sib1PduLen = duCfgParam.srvdCellLst[0].duSysInfo.sib1Len;
-   DU_ALLOC_SHRABL_BUF(duCfgParam.macCellCfg.cellCfg.sib1Cfg.sib1Pdu,duCfgParam.srvdCellLst[0].duSysInfo.sib1Len);
-   memcpy(duCfgParam.macCellCfg.cellCfg.sib1Cfg.sib1Pdu, duCfgParam.srvdCellLst[0].duSysInfo.sib1Msg, \
-         duCfgParam.srvdCellLst[0].duSysInfo.sib1Len);
-   duCfgParam.macCellCfg.cellCfg.sib1Cfg.pdcchCfgSib1.coresetZeroIndex = CORESET_0_INDEX;
-   duCfgParam.macCellCfg.cellCfg.sib1Cfg.pdcchCfgSib1.searchSpaceZeroIndex = SEARCHSPACE_0_INDEX;
-
-   duCfgParam.macCellCfg.cellCfg.sib1Cfg.pagingCfg.numPO = duCfgParam.sib1Params.srvCellCfgCommSib.dlCfg.pcchCfg.ns;
-   if((duCfgParam.sib1Params.srvCellCfgCommSib.dlCfg.pcchCfg.firstPDCCHMontioringType != \
-            PCCH_Config__firstPDCCH_MonitoringOccasionOfPO_PR_NOTHING) && (duCfgParam.macCellCfg.cellCfg.sib1Cfg.pagingCfg.numPO != 0))
-   {
-      duCfgParam.macCellCfg.cellCfg.sib1Cfg.pagingCfg.poPresent = TRUE;
-      memcpy(duCfgParam.macCellCfg.cellCfg.sib1Cfg.pagingCfg.pagingOcc, 
-            duCfgParam.sib1Params.srvCellCfgCommSib.dlCfg.pcchCfg.firstPDCCHMontioringInfo,MAX_PO_PER_PF);
-   }
-   else
-   {
-      duCfgParam.macCellCfg.cellCfg.sib1Cfg.pagingCfg.poPresent = FALSE;
-   }
-
-   /* fill Intial DL BWP */
-   duCfgParam.macCellCfg.cellCfg.initialDlBwp.bwp.firstPrb = 0;
-   duCfgParam.macCellCfg.cellCfg.initialDlBwp.bwp.numPrb = MAX_NUM_RB; /* configured to total BW */
-   duCfgParam.macCellCfg.cellCfg.initialDlBwp.bwp.scs = duCfgParam.macCellCfg.ssbCfg.scsCmn;
-   duCfgParam.macCellCfg.cellCfg.initialDlBwp.bwp.cyclicPrefix = NORMAL_CYCLIC_PREFIX;
-   duCfgParam.macCellCfg.cellCfg.initialDlBwp.pdcchCommon.commonSearchSpace.searchSpaceId = SEARCHSPACE_1_INDEX;
-   duCfgParam.macCellCfg.cellCfg.initialDlBwp.pdcchCommon.commonSearchSpace.coresetId = CORESET_0_INDEX;
-   duCfgParam.macCellCfg.cellCfg.initialDlBwp.pdcchCommon.commonSearchSpace.monitoringSlot =
-      SS_MONITORING_SLOT_SL1; /* sl1 - all slots */
-   duCfgParam.macCellCfg.cellCfg.initialDlBwp.pdcchCommon.commonSearchSpace.duration = 0;
-   duCfgParam.macCellCfg.cellCfg.initialDlBwp.pdcchCommon.commonSearchSpace.monitoringSymbol =
-      SS_MONITORING_SYMBOL;
-   duCfgParam.macCellCfg.cellCfg.initialDlBwp.pdcchCommon.commonSearchSpace.
-      candidate.aggLevel1      = 8;
-   duCfgParam.macCellCfg.cellCfg.initialDlBwp.pdcchCommon.commonSearchSpace.
-      candidate.aggLevel2      = 4;
-   duCfgParam.macCellCfg.cellCfg.initialDlBwp.pdcchCommon.commonSearchSpace.
-      candidate.aggLevel4      = 2;
-   duCfgParam.macCellCfg.cellCfg.initialDlBwp.pdcchCommon.commonSearchSpace.
-      candidate.aggLevel8      = 1;
-   duCfgParam.macCellCfg.cellCfg.initialDlBwp.pdcchCommon.commonSearchSpace.
-      candidate.aggLevel16     = 0;
-
-   duCfgParam.macCellCfg.cellCfg.initialDlBwp.pdschCommon.numTimeDomAlloc = NUM_TIME_DOM_RSRC_ALLOC;
-   idx = 0;
-   duCfgParam.macCellCfg.cellCfg.initialDlBwp.pdschCommon.timeDomRsrcAllocList[idx].k0 = PDSCH_K0_CFG1;
-   duCfgParam.macCellCfg.cellCfg.initialDlBwp.pdschCommon.timeDomRsrcAllocList[idx].mappingType = 
-      PDSCH_MAPPING_TYPE_A;
-   duCfgParam.macCellCfg.cellCfg.initialDlBwp.pdschCommon.timeDomRsrcAllocList[idx].startSymbol = 
-      PDSCH_START_SYMBOL;
-   duCfgParam.macCellCfg.cellCfg.initialDlBwp.pdschCommon.timeDomRsrcAllocList[idx].lengthSymbol =
-      PDSCH_LENGTH_SYMBOL;
-
-   idx++;
-   duCfgParam.macCellCfg.cellCfg.initialDlBwp.pdschCommon.timeDomRsrcAllocList[idx].k0 = PDSCH_K0_CFG2;
-   duCfgParam.macCellCfg.cellCfg.initialDlBwp.pdschCommon.timeDomRsrcAllocList[idx].mappingType = 
-      PDSCH_MAPPING_TYPE_A;
-   duCfgParam.macCellCfg.cellCfg.initialDlBwp.pdschCommon.timeDomRsrcAllocList[idx].startSymbol = 
-      PDSCH_START_SYMBOL;
-   duCfgParam.macCellCfg.cellCfg.initialDlBwp.pdschCommon.timeDomRsrcAllocList[idx].lengthSymbol =
-      PDSCH_LENGTH_SYMBOL;
-
-   /* ra-searchSpace ID is set to 1 */
-   duCfgParam.macCellCfg.cellCfg.initialDlBwp.pdcchCommon.raSearchSpaceId = SEARCHSPACE_1_INDEX;
-
-   /* fill Intial UL BWP */
-   duCfgParam.macCellCfg.cellCfg.initialUlBwp.bwp.firstPrb = 0;
-   duCfgParam.macCellCfg.cellCfg.initialUlBwp.bwp.numPrb = MAX_NUM_RB; /* configured to total BW */
-   duCfgParam.macCellCfg.cellCfg.initialUlBwp.bwp.scs = duCfgParam.macCellCfg.ssbCfg.scsCmn;
-   duCfgParam.macCellCfg.cellCfg.initialUlBwp.bwp.cyclicPrefix = NORMAL_CYCLIC_PREFIX;
-   duCfgParam.macCellCfg.cellCfg.initialUlBwp.puschCommon.numTimeDomRsrcAlloc = 2;
-   duCfgParam.macCellCfg.cellCfg.initialUlBwp.puschCommon.timeDomRsrcAllocList[0].k2 = PUSCH_K2_CFG1;
-   duCfgParam.macCellCfg.cellCfg.initialUlBwp.puschCommon.timeDomRsrcAllocList[0].mappingType = 
-      PUSCH_MAPPING_TYPE_A;
-   duCfgParam.macCellCfg.cellCfg.initialUlBwp.puschCommon.timeDomRsrcAllocList[0].startSymbol = 
-      PUSCH_START_SYMBOL;
-   duCfgParam.macCellCfg.cellCfg.initialUlBwp.puschCommon.timeDomRsrcAllocList[0].symbolLength =
-      PUSCH_LENGTH_SYMBOL;
-
-   duCfgParam.macCellCfg.cellCfg.initialUlBwp.puschCommon.timeDomRsrcAllocList[1].k2 = PUSCH_K2_CFG2;
-   duCfgParam.macCellCfg.cellCfg.initialUlBwp.puschCommon.timeDomRsrcAllocList[1].mappingType = 
-      PUSCH_MAPPING_TYPE_A;
-   duCfgParam.macCellCfg.cellCfg.initialUlBwp.puschCommon.timeDomRsrcAllocList[1].startSymbol = 
-      PUSCH_START_SYMBOL;
-   duCfgParam.macCellCfg.cellCfg.initialUlBwp.puschCommon.timeDomRsrcAllocList[1].symbolLength =
-      PUSCH_LENGTH_SYMBOL;
-
-   duCfgParam.macCellCfg.ssbCfg.dmrsTypeAPos = DMRS_TYPE_A_POS; 
-
-   /* fill PUCCH config common */
-   duCfgParam.macCellCfg.cellCfg.initialUlBwp.pucchCommon.pucchResourceCommon = PUCCH_RSRC_COMMON;
-   duCfgParam.macCellCfg.cellCfg.initialUlBwp.pucchCommon.pucchGroupHopping = PUCCH_NEITHER_HOPPING;
-
-   return ROK;
-}
-
 /*******************************************************************
  *
  * @brief Configures the DU Parameters
@@ -700,12 +442,6 @@ uint8_t readCfg()
 
    }
 
-   if(readMacCfg() != ROK)
-   {
-      DU_LOG("\nERROR  -->  DU_APP : Failed while reading MAC config");
-      return RFAILED;
-   }
-
    return ROK;
 }
 
@@ -1125,7 +861,6 @@ uint8_t parseSnssai(xmlDocPtr doc, xmlNsPtr ns, xmlNodePtr cur, Snssai *snssai)
    return ROK;
 }
 
-#ifdef XML_BASED_CONFIG
 /*******************************************************************
  *
  * @brief Fill Supported Slice List
@@ -1148,7 +883,6 @@ uint8_t parseSupportedSliceList(xmlDocPtr doc, xmlNsPtr ns, xmlNodePtr cur, Supp
 {
    uint8_t sliceIdx = 0;
    xmlNodePtr child = NULLP;
-   xmlNodePtr snssaiNode = NULLP;
 
    memset(sliceSuppLst, 0, sizeof(SupportedSliceList));
    cur = cur->xmlChildrenNode;
@@ -1192,25 +926,17 @@ uint8_t parseSupportedSliceList(xmlDocPtr doc, xmlNsPtr ns, xmlNodePtr cur, Supp
          }
 
 #ifndef O1_ENABLE
+         sliceIdx = 0;
          child = cur->xmlChildrenNode;
          while (child != NULL)
          {
-            if ((!xmlStrcmp(child->name, (const xmlChar *)"LIST")) && (child->ns == ns))
-            {     
-               sliceIdx = 0;
-               snssaiNode = child->xmlChildrenNode;
-               while (snssaiNode != NULL)
+            if ((!xmlStrcmp(child->name, (const xmlChar *)"SNSSAI")) && (child->ns == ns))
+            {
+               if(parseSnssai(doc, ns, child, sliceSuppLst->snssai[sliceIdx]) != ROK)
                {
-                  if ((!xmlStrcmp(snssaiNode->name, (const xmlChar *)"SNSSAI")) && (snssaiNode->ns == ns))
-                  {
-                     if(parseSnssai(doc, ns, snssaiNode, sliceSuppLst->snssai[sliceIdx]) != ROK)
-                     {
-                        return RFAILED;
-                     }
-                     sliceIdx++;
-                  }
-                  snssaiNode = snssaiNode->next;
+                  return RFAILED;
                }
+               sliceIdx++;
             }
             child = child->next;
          }
@@ -1222,6 +948,7 @@ uint8_t parseSupportedSliceList(xmlDocPtr doc, xmlNsPtr ns, xmlNodePtr cur, Supp
    return ROK;
 }
 
+#ifdef XML_BASED_CONFIG
 /*******************************************************************
  *
  * @brief Fill Served PLMN
@@ -1996,6 +1723,7 @@ void fillPlmnFromO1(Plmn *PLMN, uint8_t srvdPlmnIdx)
    PLMN->mnc[2] = cellParams.plmnList[srvdPlmnIdx].mnc[2];
 }
 #endif
+#endif
 
 /*******************************************************************
  *
@@ -2252,7 +1980,7 @@ uint8_t parsePrachCfg(xmlDocPtr doc, xmlNsPtr ns, xmlNodePtr cur, PrachCfg *prac
 
       if ((!xmlStrcmp(cur->name, (const xmlChar *)"CB_PREAMBLE_PER_SSB")) && (cur->ns == ns))
       {
-         prachCfg->totalNumRaPreamble = atoi((char *)xmlNodeListGetString(doc, cur->xmlChildrenNode, 1));
+         prachCfg->numCbPreamblePerSsb = atoi((char *)xmlNodeListGetString(doc, cur->xmlChildrenNode, 1));
       }
 
       if ((!xmlStrcmp(cur->name, (const xmlChar *)"MAX_NUM_RB")) && (cur->ns == ns))
@@ -2388,32 +2116,38 @@ uint8_t parseSsbCfg(xmlDocPtr doc, xmlNsPtr ns, xmlNodePtr cur, SsbCfg *ssbCfg)
    cur = cur -> xmlChildrenNode;
    while(cur != NULL)
    {
-      if ((!xmlStrcmp(cur->name, (const xmlChar *)"SSB_PBSC_PWR")) && (cur->ns == ns))
+#ifdef O1_ENABLE
+      ssbCfg->scsCmn = convertScsValToScsEnum(cellParams.ssbSubCarrierSpacing);
+      ssbCfg->ssbPeriod = convertSSBPeriodicityToEnum(cellParams.ssbPeriodicity);
+      ssbCfg->ssbScOffset = cellParams.ssbOffset;
+#else
+      if ((!xmlStrcmp(cur->name, (const xmlChar *)"SCS_CMN")) && (cur->ns == ns))
       {
-         ssbCfg->ssbPbchPwr = atoi((char *)xmlNodeListGetString(doc, cur->xmlChildrenNode, 1));
+         ssbCfg->scsCmn = atoi((char *)xmlNodeListGetString(doc, cur->xmlChildrenNode, 1));
       }
 
-      if ((!xmlStrcmp(cur->name, (const xmlChar *)"SCS_CMN")) && (cur->ns == ns))
+      if ((!xmlStrcmp(cur->name, (const xmlChar *)"SSB_PERIOD")) && (cur->ns == ns))
       {
-         ssbCfg->scsCmn = atoi((char *)xmlNodeListGetString(doc, cur->xmlChildrenNode, 1));
+         ssbCfg->ssbPeriod = atoi((char *)xmlNodeListGetString(doc, cur->xmlChildrenNode, 1));
       }
 
-      if ((!xmlStrcmp(cur->name, (const xmlChar *)"SSB_OFF_PT_A")) && (cur->ns == ns))
+      if ((!xmlStrcmp(cur->name, (const xmlChar *)"SSB_SC_OFFSET")) && (cur->ns == ns))
       {
-         ssbCfg->ssbOffsetPointA = atoi((char *)xmlNodeListGetString(doc, cur->xmlChildrenNode, 1));
+         ssbCfg->ssbScOffset = atoi((char *)xmlNodeListGetString(doc, cur->xmlChildrenNode, 1));
       }
+#endif
 
-      if ((!xmlStrcmp(cur->name, (const xmlChar *)"SSB_PERIOD")) && (cur->ns == ns))
+      if ((!xmlStrcmp(cur->name, (const xmlChar *)"SSB_OFFSET_PT_A")) && (cur->ns == ns))
       {
-         ssbCfg->ssbPeriod = atoi((char *)xmlNodeListGetString(doc, cur->xmlChildrenNode, 1));
+         ssbCfg->ssbOffsetPointA = atoi((char *)xmlNodeListGetString(doc, cur->xmlChildrenNode, 1));
       }
 
-      if ((!xmlStrcmp(cur->name, (const xmlChar *)"SSB_SC_OFF")) && (cur->ns == ns))
+      if ((!xmlStrcmp(cur->name, (const xmlChar *)"SSB_PBSC_PWR")) && (cur->ns == ns))
       {
-         ssbCfg->ssbScOffset = atoi((char *)xmlNodeListGetString(doc, cur->xmlChildrenNode, 1));
+         ssbCfg->ssbPbchPwr = atoi((char *)xmlNodeListGetString(doc, cur->xmlChildrenNode, 1));
       }
 
-      if ((!xmlStrcmp(cur->name, (const xmlChar *)"SSB_LIST")) && (cur->ns == ns))
+      if ((!xmlStrcmp(cur->name, (const xmlChar *)"SSB_MASK_LIST")) && (cur->ns == ns))
       {
          child = cur -> xmlChildrenNode;
          while(child != NULL)
@@ -2437,18 +2171,29 @@ uint8_t parseSsbCfg(xmlDocPtr doc, xmlNsPtr ns, xmlNodePtr cur, SsbCfg *ssbCfg)
          ssbCfg->betaPss = atoi((char *)xmlNodeListGetString(doc, cur->xmlChildrenNode, 1));
       }
 
-      if ((!xmlStrcmp(cur->name, (const xmlChar *)"BCH_PAY_FLAG")) && (cur->ns == ns))
+      if ((!xmlStrcmp(cur->name, (const xmlChar *)"BCH_PAYLOAD_FLAG")) && (cur->ns == ns))
       {
          ssbCfg->bchPayloadFlag = atoi((char *)xmlNodeListGetString(doc, cur->xmlChildrenNode, 1));
       }
 
-      if ((!xmlStrcmp(cur->name, (const xmlChar *)"DMRS_TYPE_A_PROS")) && (cur->ns == ns))
+      if ((!xmlStrcmp(cur->name, (const xmlChar *)"DMRS_TYPE_A_POS")) && (cur->ns == ns))
       {
          ssbCfg->dmrsTypeAPos = atoi((char *)xmlNodeListGetString(doc, cur->xmlChildrenNode, 1));
       }
 
       cur = cur -> next;
    }
+
+   if(BuildMibPdu() != ROK)
+   {
+      DU_LOG("\nERROR  -->  Failed to build MIB PDU");
+      memset(&ssbCfg->mibPdu, 0, 3*sizeof(uint8_t));
+   }
+   else
+   {
+      memcpy(&ssbCfg->mibPdu, encBuf, encBufSize);
+   }
+
    return ROK;
 }
 
@@ -2476,6 +2221,12 @@ uint8_t parseCarrierCfg(xmlDocPtr doc, xmlNsPtr ns, xmlNodePtr cur,CarrierCfg *c
    cur = cur -> xmlChildrenNode;
    while(cur != NULL)
    {
+#ifdef O1_ENABLE
+      carrierCfg->dlBw = cellParams.bSChannelBwDL;
+      carrierCfg->arfcnDL = cellParams.arfcnDL;
+      carrierCfg->ulBw = cellParams.bSChannelBwUL;
+      carrierCfg->arfcnUL = cellParams.arfcnUL;
+#else
       if ((!xmlStrcmp(cur->name, (const xmlChar *)"DL_BW")) && (cur->ns == ns))
       {
          carrierCfg->dlBw = atoi((char *)xmlNodeListGetString(doc, cur->xmlChildrenNode, 1));
@@ -2495,6 +2246,7 @@ uint8_t parseCarrierCfg(xmlDocPtr doc, xmlNsPtr ns, xmlNodePtr cur,CarrierCfg *c
       {
          carrierCfg->arfcnUL = convertArfcnToFreqKhz(atoi((char *)xmlNodeListGetString(doc, cur->xmlChildrenNode, 1)));
       }
+#endif
 
       if ((!xmlStrcmp(cur->name, (const xmlChar *)"NUM_TX_ANT")) && (cur->ns == ns))
       {
@@ -2670,7 +2422,6 @@ uint8_t parsePuschConfigCommon(xmlDocPtr doc, xmlNsPtr ns, xmlNodePtr cur,PuschC
 {
    uint8_t idx = 0;
    xmlNodePtr child = NULLP;
-   xmlNodePtr pdschNode = NULLP;
 
    memset(puschCfgCmn, 0, sizeof(PuschConfigCommon));
    cur = cur -> xmlChildrenNode;
@@ -2686,23 +2437,14 @@ uint8_t parsePuschConfigCommon(xmlDocPtr doc, xmlNsPtr ns, xmlNodePtr cur,PuschC
          child = cur->xmlChildrenNode;
          while(child != NULL)
          {
-            if ((!xmlStrcmp(cur->name, (const xmlChar *)"LIST")) && (cur->ns == ns))
+            if ((!xmlStrcmp(child->name, (const xmlChar *)"PUSCH_COMM_TIME_ALLOC")) && (child->ns == ns))
             {
-               pdschNode = child->xmlChildrenNode;
-               while(pdschNode != NULL)
+               if(parsePuschTimeDomRsrcAlloc(doc, ns, child, &puschCfgCmn->timeDomRsrcAllocList[idx]) != ROK)
                {
-                  if ((!xmlStrcmp(pdschNode->name, (const xmlChar *)"PUSCH_COMM_TIME_ALLOC")) && (pdschNode->ns == ns))
-                  {
-                     if(parsePuschTimeDomRsrcAlloc(doc, ns, child,&puschCfgCmn->timeDomRsrcAllocList[idx]) != ROK)
-                     {
-                        return RFAILED;
-                     }
-                     idx++;
-                  }
-                  pdschNode = pdschNode -> next;
+                  return RFAILED;
                }
+               idx++;
             }
-
             child = child -> next;
          }
       }
@@ -2947,6 +2689,18 @@ uint8_t parseSib1CellCfg(xmlDocPtr doc, xmlNsPtr ns, xmlNodePtr cur, Sib1CellCfg
 
       cur = cur -> next;
    }
+
+   sib1CellCfg->sib1PduLen = duCfgParam.srvdCellLst[0].duSysInfo.sib1Len;
+   if(sib1CellCfg->sib1PduLen > 0)
+   {
+      DU_ALLOC_SHRABL_BUF(sib1CellCfg->sib1Pdu, sib1CellCfg->sib1PduLen);
+      if(!sib1CellCfg->sib1Pdu)
+      {
+         DU_LOG("\nERROR  --> DU APP : %s: Memory allocation failed at line %d", __func__, __LINE__);
+         return RFAILED;
+      }
+      memcpy(sib1CellCfg->sib1Pdu, duCfgParam.srvdCellLst[0].duSysInfo.sib1Msg, sib1CellCfg->sib1PduLen);
+   }
    return ROK;
 }
 
@@ -3098,7 +2852,7 @@ uint8_t parsePdcchCfgCommon(xmlDocPtr doc, xmlNsPtr ns, xmlNodePtr cur,PdcchConf
          }
       }
 
-      if ((!xmlStrcmp(cur->name, (const xmlChar *)"SEARCHSPACE_1_INDEX")) && (cur->ns == ns))
+      if ((!xmlStrcmp(cur->name, (const xmlChar *)"RA_SEARCH_SPACE_INDEX")) && (cur->ns == ns))
       {
          pdcchCfgCm->raSearchSpaceId = atoi((char *)xmlNodeListGetString(doc, cur->xmlChildrenNode, 1));
       }
@@ -3194,23 +2948,14 @@ uint8_t parsePdschConfigCommon(xmlDocPtr doc, xmlNsPtr ns, xmlNodePtr cur, Pdsch
          child = cur->xmlChildrenNode;
          while(child != NULL)  
          {
-            if ((!xmlStrcmp(cur->name, (const xmlChar *)"LIST")) && (cur->ns == ns))
-            {
-               pdschNode = child->xmlChildrenNode;
-               while(pdschNode != NULL)
+            if ((!xmlStrcmp(child->name, (const xmlChar *)"PDSCH_COMM_TIME_ALLOC")) && (child->ns == ns))
+            {   
+               if(parsePdschCmnTimeDomRsrcAlloc(doc, ns, child, &pdschCfgCmn->timeDomRsrcAllocList[idx]) != ROK)
                {
-                  if ((!xmlStrcmp(pdschNode->name, (const xmlChar *)"PDSCH_COMM_TIME_ALLOC")) && (pdschNode->ns == ns))
-                  {   
-                     if(parsePdschCmnTimeDomRsrcAlloc(doc, ns, child, &pdschCfgCmn->timeDomRsrcAllocList[idx]) != ROK)
-                     {
-                        return RFAILED;
-                     }
-                     idx++;
-                  }
-                  pdschNode = pdschNode -> next;
+                  return RFAILED;
                }
+               idx++;
             }
-
             child = child -> next;
          }
       }
@@ -3296,6 +3041,14 @@ uint8_t parseCellCfg(xmlDocPtr doc, xmlNsPtr ns, xmlNodePtr cur,CellCfg *cellCfg
    cur = cur -> xmlChildrenNode;
    while(cur != NULL)
    {
+#ifdef O1_ENABLE   
+      cellCfg->opState = cellParams.operationalState;
+      cellCfg->adminState = cellParams.administrativeState;
+      cellCfg->cellState = cellParams.cellState;
+      cellCfg->phyCellId = cellParams.nRPCI;
+      cellCfg->tac = cellParams.nRTAC;
+      cellCfg->ssbFreq = cellParams.ssbFrequency;
+#else
       if ((!xmlStrcmp(cur->name, (const xmlChar *)"MAC_OP_STATE")) && (cur->ns == ns))
       {
          cellCfg->opState = atoi((char *)xmlNodeListGetString(doc, cur->xmlChildrenNode, 1));
@@ -3311,14 +3064,6 @@ uint8_t parseCellCfg(xmlDocPtr doc, xmlNsPtr ns, xmlNodePtr cur,CellCfg *cellCfg
          cellCfg->cellState = atoi((char *)xmlNodeListGetString(doc, cur->xmlChildrenNode, 1));
       }
 
-      if ((!xmlStrcmp(cur->name, (const xmlChar *)"PLMN_INFO")) && (cur->ns == ns))
-      {
-         if(parsePlmnInfo(doc, ns, cur, &cellCfg->plmnInfoList[0]) != ROK)
-         {
-            return RFAILED;
-         }
-      }
-
       if ((!xmlStrcmp(cur->name, (const xmlChar *)"NR_PCI")) && (cur->ns == ns))
       {
          cellCfg->phyCellId = atoi((char *)xmlNodeListGetString(doc, cur->xmlChildrenNode, 1));
@@ -3333,6 +3078,15 @@ uint8_t parseCellCfg(xmlDocPtr doc, xmlNsPtr ns, xmlNodePtr cur,CellCfg *cellCfg
       {
          cellCfg->ssbFreq = atoi((char *)xmlNodeListGetString(doc, cur->xmlChildrenNode, 1));
       }
+#endif
+
+      if ((!xmlStrcmp(cur->name, (const xmlChar *)"PLMN_INFO")) && (cur->ns == ns))
+      {
+         if(parsePlmnInfo(doc, ns, cur, &cellCfg->plmnInfoList[0]) != ROK)
+         {
+            return RFAILED;
+         }
+      }
 
       if ((!xmlStrcmp(cur->name, (const xmlChar *)"NR_SCS")) && (cur->ns == ns))
       {
@@ -3367,7 +3121,6 @@ uint8_t parseCellCfg(xmlDocPtr doc, xmlNsPtr ns, xmlNodePtr cur,CellCfg *cellCfg
             return RFAILED;
          }
       }
-
       cur = cur -> next;
    }
    return ROK;
@@ -3453,10 +3206,14 @@ uint8_t parseMacCellCfg(xmlDocPtr doc, xmlNsPtr ns, xmlNodePtr cur,MacCellCfg *m
    cur = cur -> xmlChildrenNode;
    while(cur != NULL)
    {
+#ifdef O1_ENABLE
+      macCellCfg->cellId = cellParams.cellLocalId;
+#else
       if ((!xmlStrcmp(cur->name, (const xmlChar *)"CELL_ID")) && (cur->ns == ns))
       {
          macCellCfg->cellId = atoi((char *)xmlNodeListGetString(doc, cur->xmlChildrenNode, 1));
       }
+#endif
 
       if ((!xmlStrcmp(cur->name, (const xmlChar *)"CARRIER_CFG")) && (cur->ns == ns))
       {
@@ -3528,7 +3285,6 @@ uint8_t parseMacCellCfg(xmlDocPtr doc, xmlNsPtr ns, xmlNodePtr cur,MacCellCfg *m
    }
    return ROK;
 }
-#endif
 
 /*******************************************************************
  *
@@ -4038,7 +3794,6 @@ uint8_t parseTddUlDlCfgCommon(xmlDocPtr doc, xmlNsPtr ns, xmlNodePtr cur, TddUlD
 uint8_t parsePcchCfg(xmlDocPtr doc, xmlNsPtr ns, xmlNodePtr cur,PcchCfg *pcchCfg)
 {
    xmlNodePtr child = NULLP;
-   xmlNodePtr firstPdcchNode = NULLP;
    uint8_t  idx = 0;
 
    memset(pcchCfg, 0, sizeof(PcchCfg));
@@ -5322,6 +5077,7 @@ uint8_t parseDuCfgParams(xmlDocPtr doc, xmlNsPtr ns, xmlNodePtr cur)
             return RFAILED;
          }
       }
+#endif      
 
       if ((!xmlStrcmp(cur->name, (const xmlChar *)"MAC_CELL_CFG")) && (cur->ns == ns))
       {
@@ -5330,7 +5086,6 @@ uint8_t parseDuCfgParams(xmlDocPtr doc, xmlNsPtr ns, xmlNodePtr cur)
             return RFAILED;
          }
       }
-#endif      
 
 #ifndef O1_ENABLE
       if ((!xmlStrcmp(cur->name, (const xmlChar *)"SLICE_CFG")) && (cur->ns == ns))
@@ -5751,8 +5506,8 @@ void printDuConfig()
    
    DU_LOG("\n ** MAC Cell Configuration : Cell Configuration : SIB1 ** \n");
    sib1Cfg = &cellCfg->sib1Cfg;
-   DU_LOG("SIB1 PDU Length %d", sib1Cfg->sib1PduLen);
-   DU_LOG("SIB1 PDU %s", sib1Cfg->sib1Pdu);
+   DU_LOG("SIB1 PDU Length %d\n", sib1Cfg->sib1PduLen);
+   DU_LOG("SIB1 PDU %s\n", sib1Cfg->sib1Pdu);
 
    DU_LOG("\n ** MAC Cell Configuration : Cell Configuration : SIB1 : Paging Configuration ** \n");
    pageCfg = &sib1Cfg->pagingCfg;
@@ -5858,7 +5613,7 @@ void printDuConfig()
    DU_LOG("Beam ID %d\n", ssbCfg->beamId[0]);
    DU_LOG("BETA PSS %d\n", ssbCfg->betaPss);
    DU_LOG("BCH Payloag Flag %d\n", ssbCfg->bchPayloadFlag);
-   DU_LOG("MIB PDU %d %d %d", ssbCfg->mibPdu[0], ssbCfg->mibPdu[1], ssbCfg->mibPdu[2]);
+   DU_LOG("MIB PDU %d %d %d \n", ssbCfg->mibPdu[0], ssbCfg->mibPdu[1], ssbCfg->mibPdu[2]);
    DU_LOG("DMRS Type-A Position %d\n", ssbCfg->dmrsTypeAPos);
 
    DU_LOG("\n ** MAC Cell Configuration : CSI RS Configuration ** \n");
index 9c73218..8453061 100644 (file)
 
 //TODO: while testing for TDD, Mu1 and 100 MHz, this flag must be enabled
 #ifdef NR_TDD
-#define DUPLEX_MODE DUP_MODE_TDD
 #define NR_DL_ARFCN 623400
 #define NR_UL_ARFCN 623400
 #define NR_FREQ_BAND 78
 #define NR_SCS SCS_30KHZ
-#define NR_BANDWIDTH BANDWIDTH_100MHZ
 #else
-#define DUPLEX_MODE DUP_MODE_FDD
 #define NR_DL_ARFCN 428000
 #define NR_UL_ARFCN 390000
 #define NR_FREQ_BAND 1
 #define NR_SCS SCS_15KHZ
-#define NR_BANDWIDTH BANDWIDTH_20MHZ
 #endif
 
 #define TRANS_ID 1
 #define TIME_CFG 4
 #define MEAS_TIMING_ARFCN 630432
 #define CARRIER_IDX 1
-#define NUM_TX_ANT 2
-#define NUM_RX_ANT 2
 #define FREQ_SHIFT_7P5KHZ FALSE
-#define SSB_PBCH_PWR 0
-#define BCH_PAYLOAD PHY_GEN_TIMING_PBCH_BIT
-#define NORMAL_CYCLIC_PREFIX 0
-#define OFFSET_TO_POINT_A 24                     /* PRB Offset to Point A */
-#define BETA_PSS BETA_PSS_0DB  
-#define SSB_SUBCARRIER_OFFSET 0         
-#define SSB_FREQUENCY  3000000   /*ssbFrequency in kHz*/
 #define SSB_MULT_CARRIER_BAND FALSE
 #define MULT_CELL_CARRIER FALSE
-#define DMRS_TYPE_A_POS 2
 #define NUM_SYMBOLS_PER_SLOT 14       /* Number of symbols within a slot */
 #define CORESET0_END_PRB   48
 #define CORESET1_NUM_PRB   24
 
 /* MACRO defines for PRACH Configuration */
-#ifndef NR_TDD
-#define PRACH_CONFIG_IDX   16
-#else
-#define PRACH_CONFIG_IDX   88
-#endif
 #define PRACH_MAX_PRB  24  /* As per (spec 38.211-Table 6.3.3.2-1), max allocated PRBs can go upto 24 */
-#define PRACH_FREQ_START  (MAX_NUM_RB - PRACH_MAX_PRB) /* In order to allocate PRACH from end of the resource grid */
-#define PRACH_SEQ_LEN SHORT_SEQUENCE
-#define PRACH_SUBCARRIER_SPACING NR_SCS
-#define PRACH_RESTRICTED_SET_CFG 0
-#define NUM_PRACH_FDM 1
-#define ROOT_SEQ_IDX 0
-#define NUM_ROOT_SEQ 1
-#define ZERO_CORRELATION_ZONE_CFG 4
 #define NUM_UNUSED_ROOT_SEQ 0
 #define UNUSED_ROOT_SEQ 1
-#define SSB_PER_RACH 1
-#define CB_PREAMBLE_PER_SSB 8
 #define PRACH_MULT_CARRIER_BAND FALSE
-#define NUM_RA_PREAMBLE  63
-
-#ifdef NR_TDD
-#define TDD_PERIODICITY TX_PRDCTY_MS_5 
-#endif
 
 #define RSS_MEASUREMENT_UNIT DONT_REPORT_RSSI
 #define RA_CONT_RES_TIMER 64
-#define RA_RSP_WINDOW 10
 
 /* MACRCO Ddefine for PDCCH Configuration */
 #define PDCCH_CTRL_RSRC_SET_ONE_ID  1
 
 /* MACRO Ddefine for PDSCH Configuration */
 #define NUM_TIME_DOM_RSRC_ALLOC 2
-#define PDSCH_K0_CFG1  0
-#define PDSCH_K0_CFG2  1
 #define PDSCH_START_SYMBOL  3
 #define PDSCH_LENGTH_SYMBOL 11
 #define PDSCH_RES_ALLOC_TYPE       1          /* Resource allocation type */
 #define PUSCH_MAX_MIMO_LAYERS       1
 #define PUSCH_PROCESS_TYPE2_ENABLED false
 
-/* Macro define for PUCCH Configuration */
-#define PUCCH_RSRC_COMMON  0
-#define PUCCH_NEITHER_HOPPING 0 /* Neither sequence hopping nor group hopping */
-
-/* MACRO defines for TDD DL-UL Configuration */
-#define NUM_DL_SLOTS 7
-#define NUM_DL_SYMBOLS 12 
-#define NUM_UL_SLOTS 2
-#define NUM_UL_SYMBOLS 1
-#define GUARD_SLOT_IDX 7
-
 /* MACRO defines for SRC config */
 #define SRS_RSRC_ID  1
 #define SRS_RSET_ID  1