PLTFRM_FLAGS= -UMSPD -DODU -DINTEL_FAPI #-DODU_SLOT_IND_DEBUG_LOG -DEGTP_TEST
ifeq ($(MODE),TDD)
- PLTFRM_FLAGS += -DMODE=TDD
+ PLTFRM_FLAGS += -DNR_TDD
endif
ifeq ($(CA_ENABLE),YES)
PLTFRM_FLAGS += -DCA_ENABLE=YES
@echo -e "$(OPTS) NODE=TEST_STUB - Mandatory option for cu_stub/ric_stub$(NORM)"
@echo -e "$(OPTS) MODE=TDD - If not specified, MODE=FDD$(NORM)"
@echo -e "$(OPTS) PHY=INTEL_L1 - If not specified, Phy stub is used$(NORM)"
- @echo -e "$(OPTS) PHY_MODE=TIMER - Testing mode for INTEL_L1
+ @echo -e "$(OPTS) PHY_MODE=TIMER - Testing mode for INTEL_L1"
@echo -e "******************************************************************"
prepare_dirs:
macCellCfg->initialUlBwp.puschCommon.startSymbol;
schCellCfg.schInitialUlBwp.puschCommon.lengthSymbol =
macCellCfg->initialUlBwp.puschCommon.lengthSymbol;
+#ifdef NR_TDD
+ memcpy(&schCellCfg.tddCfg, &macCellCfg->tddCfg, sizeof(TDDCfg));
+#endif
FILL_PST_MAC_TO_SCH(cfgPst, EVENT_SCH_CELL_CFG);
- DU_LOG("\nINFO --> MAC : Received CfgReq for MAC layer, Entity = %d, Instance = %d\n", pst->srcEnt, pst->srcInst,0,0);
+ DU_LOG("\nINFO --> MAC : Received CfgReq for MAC layer, Entity = %d, Instance = %d", pst->srcEnt, pst->srcInst);
RG_IS_INST_VALID(pst->dstInst);
inst = pst->dstInst - RG_INST_START;
return ROK;
}
#endif/*RGR_SI_SCH*/
-
+ UNUSED(inst);
pcch = rgDBMGetPcch(cell);
if ((pcch) && (pcch->lcId == datReq->lcId))
{
return ROK;
}
+#ifdef NR_TDD
+/**
+ *@brief Returns TDD periodicity in micro seconds
+ *
+ * @details
+ *
+ * Function : schGetPeriodicityInMsec
+ *
+ * This API retunrs TDD periodicity in micro seconds
+ *
+ * @param[in] DlUlTxPeriodicity
+ * @return periodicityInMsec
+ * **/
+
+uint16_t schGetPeriodicityInMsec(DlUlTxPeriodicity tddPeriod)
+{
+ uint16_t periodicityInMsec = 0;
+ switch(tddPeriod)
+ {
+ case TX_PRDCTY_MS_0P5:
+ {
+ periodicityInMsec = 500;
+ break;
+ }
+ case TX_PRDCTY_MS_0P625:
+ {
+ periodicityInMsec = 625;
+ break;
+ }
+ case TX_PRDCTY_MS_1:
+ {
+ periodicityInMsec = 1000;
+ break;
+ }
+ case TX_PRDCTY_MS_1P25:
+ {
+ periodicityInMsec = 1250;
+ break;
+ }
+ case TX_PRDCTY_MS_2:
+ {
+ periodicityInMsec = 2000;
+ break;
+ }
+ case TX_PRDCTY_MS_2P5:
+ {
+ periodicityInMsec = 2500;
+ break;
+ }
+ case TX_PRDCTY_MS_5:
+ {
+ periodicityInMsec = 5000;
+ break;
+ }
+ case TX_PRDCTY_MS_10:
+ {
+ periodicityInMsec = 10000;
+ break;
+ }
+ default:
+ {
+ DU_LOG("\nERROR --> SCH : Invalid DlUlTxPeriodicity:%d", tddPeriod);
+ }
+ }
+
+ return periodicityInMsec;
+}
+
/**
- * @brief inti cellCb based on cellCfg
+ * @brief init TDD slot config
+ *
+ * @details
+ *
+ * Function : schInitTddSlotCfg
+ *
+ * This API is invoked after receiving schCellCfg
+ *
+ * @param[in] schCellCb *cell
+ * @param[in] SchCellCfg *schCellCfg
+ * @return int
+ * -# ROK
+ * -# RFAILED
+ **/
+void schInitTddSlotCfg(SchCellCb *cell, SchCellCfg *schCellCfg)
+{
+ uint16_t periodicityInMicroSec = 0;
+ uint32_t slotBitPos, symbBitPos, bitMask;
+ int8_t slotIdx, symbIdx;
+
+ periodicityInMicroSec = schGetPeriodicityInMsec(schCellCfg->tddCfg.tddPeriod);
+ schCellCfg->numerology = 1; //TODO: Remove this
+ cell->numSlotsInPeriodicity = (periodicityInMicroSec * pow(2, schCellCfg->numerology))/1000;
+cell->slotFrmtBitMap = 0;
+ cell->symbFrmtBitMap = 0;
+ slotBitPos = (cell->numSlotsInPeriodicity*2)-1; /* considering 2 bits to represent a slot */
+ symbBitPos = (MAX_SYMB_PER_SLOT*2)-1; /* considering 2 bits to represent a symbol */
+ for(slotIdx = cell->numSlotsInPeriodicity-1; slotIdx >= 0; slotIdx--)
+ {
+ symbIdx = 0;
+ /* If the first and last symbol are the same, the entire slot is the same type */
+ if((schCellCfg->tddCfg.slotCfg[slotIdx][symbIdx] == schCellCfg->tddCfg.slotCfg[slotIdx][MAX_SYMB_PER_SLOT-1]) &&
+ schCellCfg->tddCfg.slotCfg[slotIdx][symbIdx] != FLEXI_SLOT)
+ {
+ switch(schCellCfg->tddCfg.slotCfg[slotIdx][symbIdx])
+ {
+ case DL_SLOT:
+ {
+ /*BitMap to be set to 00 */
+ bitMask = 1<<slotBitPos;
+ cell->slotFrmtBitMap = (cell->slotFrmtBitMap & ~(bitMask)) | ((0<<slotBitPos) & bitMask);
+ slotBitPos--;
+ bitMask = 1<<slotBitPos;
+ cell->slotFrmtBitMap = (cell->slotFrmtBitMap & ~(bitMask)) | ((0<<slotBitPos) & bitMask);
+ slotBitPos--;
+ break;
+ }
+ case UL_SLOT:
+ {
+ /*BitMap to be set to 01 */
+ bitMask = 1<<slotBitPos;
+ cell->slotFrmtBitMap = (cell->slotFrmtBitMap & ~(bitMask)) | ((0<<slotBitPos) & bitMask);
+ slotBitPos--;
+ bitMask = 1<<slotBitPos;
+ cell->slotFrmtBitMap = (cell->slotFrmtBitMap & ~(bitMask)) | ((1<<slotBitPos) & bitMask);
+ slotBitPos--;
+ break;
+ }
+ default:
+ DU_LOG("\nERROR --> SCH : Invalid slot Config in schInitTddSlotCfg");
+ }
+ continue;
+ }
+ /* slot config is flexible. First set slotBitMap to 10 */
+ bitMask = 1<<slotBitPos;
+ cell->slotFrmtBitMap = (cell->slotFrmtBitMap & ~(bitMask)) | ((1<<slotBitPos) & bitMask);
+ slotBitPos--;
+ bitMask = 1<<slotBitPos;
+ cell->slotFrmtBitMap = (cell->slotFrmtBitMap & ~(bitMask)) | ((0<<slotBitPos) & bitMask);
+ slotBitPos--;
+ /* Now set symbol bitmap */
+ for(symbIdx = MAX_SYMB_PER_SLOT-1; symbIdx >= 0; symbIdx--)
+ {
+ switch(schCellCfg->tddCfg.slotCfg[slotIdx][symbIdx])
+ {
+ case DL_SLOT:
+ {
+ /*symbol BitMap to be set to 00 */
+ bitMask = 1<<symbBitPos;
+ cell->symbFrmtBitMap = (cell->symbFrmtBitMap & ~(bitMask)) | ((0<<symbBitPos) & bitMask);
+ symbBitPos--;
+ bitMask = 1<<symbBitPos;
+ cell->symbFrmtBitMap = (cell->symbFrmtBitMap & ~(bitMask)) | ((0<<symbBitPos) & bitMask);
+ symbBitPos--;
+ break;
+ }
+ case UL_SLOT:
+ {
+ /*symbol BitMap to be set to 01 */
+ bitMask = 1<<symbBitPos;
+ cell->symbFrmtBitMap = (cell->symbFrmtBitMap & ~(bitMask)) | ((0<<symbBitPos) & bitMask);
+ symbBitPos--;
+ bitMask = 1<<symbBitPos;
+ cell->symbFrmtBitMap = (cell->symbFrmtBitMap & ~(bitMask)) | ((1<<symbBitPos) & bitMask);
+ symbBitPos--;
+ break;
+ }
+ case FLEXI_SLOT:
+ {
+ /*symbol BitMap to be set to 10 */
+ bitMask = 1<<symbBitPos;
+ cell->symbFrmtBitMap = (cell->symbFrmtBitMap & ~(bitMask)) | ((1<<symbBitPos) & bitMask);
+ symbBitPos--;
+ bitMask = 1<<symbBitPos;
+ cell->symbFrmtBitMap = (cell->symbFrmtBitMap & ~(bitMask)) | ((0<<symbBitPos) & bitMask);
+ symbBitPos--;
+ break;
+ }
+ default:
+ DU_LOG("\nERROR --> SCH : Invalid slot Config in schInitTddSlotCfg");
+ }
+ }
+ }
+
+}
+#endif
+
+
+/**
+ * @brief init cellCb based on cellCfg
*
* @details
*
**/
uint8_t schInitCellCb(Inst inst, SchCellCfg *schCellCfg)
{
- SchCellCb *cell;
+ SchCellCb *cell= NULLP;
SCH_ALLOC(cell, sizeof(SchCellCb));
if(!cell)
{
default:
DU_LOG("\nERROR --> SCH : Numerology %d not supported", schCellCfg->numerology);
}
+#ifdef NR_TDD
+ schInitTddSlotCfg(cell, schCellCfg);
+#endif
SCH_ALLOC(cell->schDlSlotInfo, cell->numSlots * sizeof(SchDlSlotInfo*));
if(!cell->schDlSlotInfo)
uint32_t actvUeBitMap; /*!<Bit map to find active UEs */
uint32_t boIndBitMap; /*!<Bit map to indicate UEs that have recevied BO */
SchUeCb ueCb[MAX_NUM_UE]; /*!<Pointer to UE contexts of this cell */
+#ifdef NR_TDD
+ uint8_t numSlotsInPeriodicity; /*!< number of slots in configured periodicity and SCS */
+ uint32_t slotFrmtBitMap; /*!< 2 bits must be read together to determine D/U/S slots. 00-D, 01-U, 10-S */
+ uint32_t symbFrmtBitMap; /*!< 2 bits must be read together to determine D/U/S symbols. 00-D, 01-U, 10-S */
+#endif
}SchCellCb;
/**
S32 ret =0; /* temporary return value */
S32 retVal =0; /* temporary return value */
S16 i =0; /* loop index */
- CmInetIovec txArr[CM_INET_MAX_DBUF] = {0}; /* scatter vector */
+ CmInetIovec txArr[CM_INET_MAX_DBUF] = {{0}}; /* scatter vector */
S16 numDBufs =0; /* number of dBufs in message */
struct msghdr msg ={0}; /* sendmsg() message header */
MsgLen msgLen =0; /* message length */
S32 ret; /* temporary return value */
S32 retVal; /* temporary return value */
S16 i; /* loop index */
- CmInetIovec txArr[CM_INET_MAX_DBUF] ={0}; /* scatter vector */
+ CmInetIovec txArr[CM_INET_MAX_DBUF] ={{0}}; /* scatter vector */
S16 numDBufs; /* number of dBufs in message */
struct msghdr msg; /* sendmsg() message header */
MsgLen msgLen; /* message length */
struct msghdr msg = {0}; /* message header */
/* cm_inet_c_001.main_54: Fix for Klockworks issue */
Buffer *tempMsg = NULLP; /* temporary message */
- CmInetIovec rxArr[CM_INET_MAX_DBUF]= {0}; /* dynamic gather array */
+ CmInetIovec rxArr[CM_INET_MAX_DBUF]= {{0}}; /* dynamic gather array */
Buffer **dBufs = NULLP; /* dynamic array with allocated dBufs */
S16 numDBufs =0; /* number of allocated dBufs */
#define ODU_SET_THREAD_AFFINITY SSetAffinity
#define ODU_CREATE_TASK SCreateSTsk
+#ifdef NR_TDD
+/* Maximum slots for max periodicity and highest numerology is 320.
+ * However, aligning to fapi_interface.h, setting this macro to 160 */
+#define MAX_TDD_PERIODICITY_SLOTS 160
+#define MAX_SYMB_PER_SLOT 14
+#endif
+
#define GET_UE_IDX( _crnti,_ueIdx) \
{ \
_ueIdx = _crnti - ODU_START_CRNTI + 1; \
CONFIG_DEL
}ConfigType;
+#ifdef NR_TDD
+typedef enum
+{
+ DL_SLOT,
+ UL_SLOT,
+ FLEXI_SLOT
+}SlotConfig;
+
+typedef enum
+{
+ TX_PRDCTY_MS_0P5,
+ TX_PRDCTY_MS_0P625,
+ TX_PRDCTY_MS_1,
+ TX_PRDCTY_MS_1P25,
+ TX_PRDCTY_MS_2,
+ TX_PRDCTY_MS_2P5,
+ TX_PRDCTY_MS_5,
+ TX_PRDCTY_MS_10
+}DlUlTxPeriodicity;
+#endif
+
typedef struct slotIndInfo
{
uint16_t cellId;
uint16_t cellId;
}OduCellId;
+#ifdef NR_TDD
+typedef struct tddCfg
+{
+ bool pres;
+ DlUlTxPeriodicity tddPeriod; /* DL UL Transmission periodicity */
+ SlotConfig slotCfg[MAX_TDD_PERIODICITY_SLOTS][MAX_SYMB_PER_SLOT];
+}TDDCfg;
+#endif
+
+
uint64_t gSlotCount;
void freqDomRscAllocType0(uint16_t startPrb, uint16_t prbSize, uint8_t *freqDomain);
#define __MACINT_H__
#define NUM_NUMEROLOGY 5 /* Number of numerology */
-#define MAXIMUM_TDD_PERIODICITY 10
-#define MAX_SYMB_PER_SLOT 14
#define NUM_SSB 1 /* max value is 64 */
#define SSB_MASK_SIZE 1 /* SSB mask size is 32bit for sub6 */
RSSI_UNIT_DBFS
}RSSIMeasUnit;
-typedef enum
-{
- DL_SLOT,
- UL_SLOT,
- GUARD_SLOT
-}SlotConfig;
-
-typedef enum
-{
- TX_PRDCTY_MS_0P5,
- TX_PRDCTY_MS_0P625,
- TX_PRDCTY_MS_1,
- TX_PRDCTY_MS_1P25,
- TX_PRDCTY_MS_2,
- TX_PRDCTY_MS_2P5,
- TX_PRDCTY_MS_5,
- TX_PRDCTY_MS_10
-}DlUlTxPeriodicity;
-
typedef enum
{
BETA_PSS_0DB,
uint8_t raRspWindow; /* RA Response Window */
}PrachCfg;
-typedef struct tddCfg
-{
- bool pres;
- DlUlTxPeriodicity tddPeriod; /* DL UL Transmission periodicity */
- SlotConfig slotCfg[MAXIMUM_TDD_PERIODICITY][MAX_SYMB_PER_SLOT];
-}TDDCfg;
-
typedef struct sib1CellCfg
{
uint8_t *sib1Pdu;
bool freqShft; /* Indicates presence of 7.5kHz frequency shift */
SsbCfg ssbCfg; /* SSB configuration */
PrachCfg prachCfg; /* PRACH Configuration */
+#ifdef NR_TDD
TDDCfg tddCfg; /* TDD periodicity and slot configuration */
+#endif
RSSIMeasUnit rssiUnit; /* RSSI measurement unit */
Sib1CellCfg sib1Cfg; /* SIB1 config */
BwpDlConfig initialDlBwp; /* Initial DL BWP */
SchRachCfg schRachCfg; /* PRACH config */
SchBwpDlCfg schInitialDlBwp; /* Initial DL BWP */
SchBwpUlCfg schInitialUlBwp; /* Initial UL BWP */
+#ifdef NR_TDD
+ TDDCfg tddCfg; /* TDD Cfg */
+#endif
}SchCellCfg;
typedef struct schCellCfgCfm
uint8_t slot = 0;
uint8_t symbol =0;
- memset(duCfgParam.macCellCfg.tddCfg.slotCfg, 0, sizeof(duCfgParam.macCellCfg.tddCfg.slotCfg[0][0]*\
- MAXIMUM_TDD_PERIODICITY*MAX_SYMB_PER_SLOT));
+ memset(duCfgParam.macCellCfg.tddCfg.slotCfg, 0, sizeof(duCfgParam.macCellCfg.tddCfg.slotCfg[slot][symbol]* \
+ MAX_TDD_PERIODICITY_SLOTS*MAX_SYMB_PER_SLOT));
- //Filling the DL Slots
- for(slot =0; slot < NUM_DL_SLOTS; slot++)
+ //Filling the DL Slots and initializing flexi slot
+ for(slot = 0; slot <= NUM_DL_SLOTS; slot++)
{
for(symbol =0; symbol < MAX_SYMB_PER_SLOT; symbol++)
{
duCfgParam.macCellCfg.tddCfg.slotCfg[slot][symbol] = DL_SLOT;
}
}
-
- //Filling the Flexi Slot
- for(symbol =0; symbol < NUM_DL_SYMBOLS; symbol++)
- {
- duCfgParam.macCellCfg.tddCfg.slotCfg[GUARD_SLOT_IDX][symbol] = DL_SLOT;
- }
- duCfgParam.macCellCfg.tddCfg.slotCfg[GUARD_SLOT_IDX][symbol] = GUARD_SLOT;
- symbol++;
- duCfgParam.macCellCfg.tddCfg.slotCfg[GUARD_SLOT_IDX][symbol] = UL_SLOT;
-
- //Filling the UL Slot
- for(slot = GUARD_SLOT_IDX + 1; slot < MAXIMUM_TDD_PERIODICITY; slot++)
+
+ //Filling UL Slots
+ for(slot = NUM_DL_SLOTS+1; slot <= NUM_DL_SLOTS+NUM_UL_SLOTS; slot++)
{
- for(symbol =0; symbol < MAX_SYMB_PER_SLOT; symbol++)
- {
+ for(symbol = 0; symbol < MAX_SYMB_PER_SLOT; symbol++)
duCfgParam.macCellCfg.tddCfg.slotCfg[slot][symbol] = UL_SLOT;
- }
- }
+ }
+ //Updating Flexi Slot
+ slot = NUM_DL_SLOTS;
+ duCfgParam.macCellCfg.tddCfg.slotCfg[slot][12] = FLEXI_SLOT;
+ duCfgParam.macCellCfg.tddCfg.slotCfg[slot][13] = UL_SLOT;
}
#endif